obtained gcc-4.6.4.tar.bz2 from upstream website;upstream

verified gcc-4.6.4.tar.bz2.sig;
imported gcc-4.6.4 source tree from verified upstream tarball.

downloading a git-generated archive based on the 'upstream' tag
should provide you with a source tree that is binary identical
to the one extracted from the above tarball.

if you have obtained the source via the command 'git clone',
however, do note that line-endings of files in your working
directory might differ from line-endings of the respective
files in the upstream repository.

80 files changed, 278598 insertions, 0 deletions

diff --git a/gcc/doc/aot-compile.1 b/gcc/doc/aot-compile.1
new file mode 100644
index 000000000..debf952c8
--- /dev/null
+++ b/gcc/doc/aot-compile.1
@@ -0,0 +1,200 @@
+.\" Automatically generated by Pod::Man 2.25 (Pod::Simple 3.16)
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+.if n .sp
+..
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+.nf
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+..
+.de Ve \" End verbatim text
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+.fi
+..
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+.    ds L" ``
+.    ds R" ''
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+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
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+.    rr F
+.\}
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+..
+.\}
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+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
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+.    ds ' \&
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+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
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+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
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+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
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+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "AOT-COMPILE 1"
+.TH AOT-COMPILE 1 "2013-04-12" "gcc-4.6.4" "GNU"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+aot\-compile \- Compile bytecode to native and generate databases
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+aot-compile [\fB\s-1OPTION\s0\fR] ... \fI\s-1SRCDIR\s0\fR \fI\s-1DSTDIR\s0\fR
+.PP
+aot-compile [\fB\-M, \-\-make\fR=\fI\s-1PATH\s0\fR] [\fB\-C, \-\-gcj\fR=\fI\s-1PATH\s0\fR]
+  [\fB\-D, \-\-dbtool\fR=\fI\s-1PATH\s0\fR] [\fB\-m, \-\-makeflags\fR=\fI\s-1FLAGS\s0\fR] 
+  [\fB\-c, \-\-gcjflags\fR=\fI\s-1FLAGS\s0\fR] [\fB\-l, \-\-ldflags\fR=\fI\s-1FLAGS\s0\fR] 
+  [\fB\-e, \-\-exclude\fR=\fI\s-1PATH\s0\fR]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\f(CW\*(C`aot\-compile\*(C'\fR is a script that searches a directory for Java bytecode
+(as class files, or in jars) and uses \f(CW\*(C`gcj\*(C'\fR to compile it to native
+code and generate the databases from it.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-M, \-\-make=\fR\fI\s-1PATH\s0\fR" 4
+.IX Item "-M, --make=PATH"
+Specify the path to the \f(CW\*(C`make\*(C'\fR executable to use.
+.IP "\fB\-C, \-\-gcj=\fR\fI\s-1PATH\s0\fR" 4
+.IX Item "-C, --gcj=PATH"
+Specify the path to the \f(CW\*(C`gcj\*(C'\fR executable to use.
+.IP "\fB\-D, \-\-dbtool=\fR\fI\s-1PATH\s0\fR" 4
+.IX Item "-D, --dbtool=PATH"
+Specify the path to the \f(CW\*(C`gcj\-dbtool\*(C'\fR executable to use.
+.IP "\fB\-m, \-\-makeflags=\fR\fI\s-1FLAGS\s0\fR" 4
+.IX Item "-m, --makeflags=FLAGS"
+Specify flags to pass to \f(CW\*(C`make\*(C'\fR during the build.
+.IP "\fB\-c, \-\-gcjflags=\fR\fI\s-1FLAGS\s0\fR" 4
+.IX Item "-c, --gcjflags=FLAGS"
+Specify flags to pass to \f(CW\*(C`gcj\*(C'\fR during compilation, in addition to
+\&'\-fPIC \-findirect\-dispatch \-fjni'.
+.IP "\fB\-l, \-\-ldflags=\fR\fI\s-1FLAGS\s0\fR" 4
+.IX Item "-l, --ldflags=FLAGS"
+Specify flags to pass to \f(CW\*(C`gcj\*(C'\fR during linking, in addition to
+\&'\-Wl,\-Bsymbolic'.
+.IP "\fB\-e, \-\-exclude=\fR\fI\s-1PATH\s0\fR" 4
+.IX Item "-e, --exclude=PATH"
+Do not compile \fI\s-1PATH\s0\fR.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgcc\fR\|(1), \fIgcj\fR\|(1), \fIgcjh\fR\|(1), \fIjcf\-dump\fR\|(1), \fIgfdl\fR\|(7),
+and the Info entries for \fIgcj\fR and \fIgcc\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, the Front-Cover Texts being (a) (see below), and
+with the Back-Cover Texts being (b) (see below).
+A copy of the license is included in the
+man page \fIgfdl\fR\|(7).
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\&     A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\&     You have freedom to copy and modify this GNU Manual, like GNU
+\&     software.  Copies published by the Free Software Foundation raise
+\&     funds for GNU development.
+.Ve
diff --git a/gcc/doc/arm-neon-intrinsics.texi b/gcc/doc/arm-neon-intrinsics.texi
new file mode 100644
index 000000000..a75e5821e
--- /dev/null
+++ b/gcc/doc/arm-neon-intrinsics.texi
@@ -0,0 +1,11265 @@
+@c Copyright (C) 2006 Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@c This file is generated automatically using gcc/config/arm/neon-docgen.ml
+@c Please do not edit manually.
+@subsubsection Addition
+
+@itemize @bullet
+@item uint32x2_t vadd_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vadd.i32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vadd_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vadd.i16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vadd_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vadd.i8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vadd_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vadd.i32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vadd_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vadd.i16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vadd_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vadd.i8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vadd_f32 (float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vadd.f32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vadd_u64 (uint64x1_t, uint64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vadd_s64 (int64x1_t, int64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vaddq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vadd.i32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vaddq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vadd.i16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vaddq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vadd.i8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vaddq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vadd.i32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vaddq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vadd.i16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vaddq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vadd.i8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vaddq_u64 (uint64x2_t, uint64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vadd.i64 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vaddq_s64 (int64x2_t, int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vadd.i64 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vaddq_f32 (float32x4_t, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vadd.f32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vaddl_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vaddl.u32 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vaddl_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vaddl.u16 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vaddl_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vaddl.u8 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vaddl_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vaddl.s32 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vaddl_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vaddl.s16 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vaddl_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vaddl.s8 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vaddw_u32 (uint64x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vaddw.u32 @var{q0}, @var{q0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vaddw_u16 (uint32x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vaddw.u16 @var{q0}, @var{q0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vaddw_u8 (uint16x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vaddw.u8 @var{q0}, @var{q0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vaddw_s32 (int64x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vaddw.s32 @var{q0}, @var{q0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vaddw_s16 (int32x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vaddw.s16 @var{q0}, @var{q0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vaddw_s8 (int16x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vaddw.s8 @var{q0}, @var{q0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vhadd_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vhadd.u32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vhadd_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vhadd.u16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vhadd_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vhadd.u8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vhadd_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vhadd.s32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vhadd_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vhadd.s16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vhadd_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vhadd.s8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vhaddq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vhadd.u32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vhaddq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vhadd.u16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vhaddq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vhadd.u8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vhaddq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vhadd.s32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vhaddq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vhadd.s16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vhaddq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vhadd.s8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vrhadd_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vrhadd.u32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vrhadd_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrhadd.u16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vrhadd_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrhadd.u8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vrhadd_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vrhadd.s32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vrhadd_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrhadd.s16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vrhadd_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrhadd.s8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vrhaddq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrhadd.u32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vrhaddq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrhadd.u16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vrhaddq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vrhadd.u8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vrhaddq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrhadd.s32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vrhaddq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrhadd.s16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vrhaddq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vrhadd.s8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vqadd_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqadd.u32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vqadd_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqadd.u16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vqadd_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqadd.u8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vqadd_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqadd.s32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vqadd_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqadd.s16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vqadd_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqadd.s8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vqadd_u64 (uint64x1_t, uint64x1_t)
+@*@emph{Form of expected instruction(s):} @code{vqadd.u64 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vqadd_s64 (int64x1_t, int64x1_t)
+@*@emph{Form of expected instruction(s):} @code{vqadd.s64 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vqaddq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqadd.u32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vqaddq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqadd.u16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vqaddq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vqadd.u8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vqaddq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqadd.s32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vqaddq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqadd.s16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vqaddq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vqadd.s8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vqaddq_u64 (uint64x2_t, uint64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqadd.u64 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vqaddq_s64 (int64x2_t, int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqadd.s64 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vaddhn_u64 (uint64x2_t, uint64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vaddhn.i64 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vaddhn_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vaddhn.i32 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vaddhn_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vaddhn.i16 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vaddhn_s64 (int64x2_t, int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vaddhn.i64 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vaddhn_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vaddhn.i32 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vaddhn_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vaddhn.i16 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vraddhn_u64 (uint64x2_t, uint64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vraddhn.i64 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vraddhn_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vraddhn.i32 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vraddhn_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vraddhn.i16 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vraddhn_s64 (int64x2_t, int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vraddhn.i64 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vraddhn_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vraddhn.i32 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vraddhn_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vraddhn.i16 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Multiplication
+
+@itemize @bullet
+@item uint32x2_t vmul_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.i32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vmul_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.i16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vmul_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.i8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vmul_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.i32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vmul_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.i16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vmul_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.i8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vmul_f32 (float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.f32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vmul_p8 (poly8x8_t, poly8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.p8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vmulq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.i32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vmulq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.i16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vmulq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.i8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vmulq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.i32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vmulq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.i16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vmulq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.i8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vmulq_f32 (float32x4_t, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.f32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vmulq_p8 (poly8x16_t, poly8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.p8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vqdmulh_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqdmulh.s32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vqdmulh_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqdmulh.s16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vqdmulhq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqdmulh.s32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vqdmulhq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqdmulh.s16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vqrdmulh_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqrdmulh.s32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vqrdmulh_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqrdmulh.s16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vqrdmulhq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqrdmulh.s32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vqrdmulhq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqrdmulh.s16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vmull_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmull.u32 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vmull_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmull.u16 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vmull_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmull.u8 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vmull_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmull.s32 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vmull_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmull.s16 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vmull_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmull.s8 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vmull_p8 (poly8x8_t, poly8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmull.p8 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vqdmull_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqdmull.s32 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vqdmull_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqdmull.s16 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+
+
+@subsubsection Multiply-accumulate
+
+@itemize @bullet
+@item uint32x2_t vmla_u32 (uint32x2_t, uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.i32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vmla_u16 (uint16x4_t, uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.i16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vmla_u8 (uint8x8_t, uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.i8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vmla_s32 (int32x2_t, int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.i32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vmla_s16 (int16x4_t, int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.i16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vmla_s8 (int8x8_t, int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.i8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vmla_f32 (float32x2_t, float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.f32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vmlaq_u32 (uint32x4_t, uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.i32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vmlaq_u16 (uint16x8_t, uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.i16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vmlaq_u8 (uint8x16_t, uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.i8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vmlaq_s32 (int32x4_t, int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.i32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vmlaq_s16 (int16x8_t, int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.i16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vmlaq_s8 (int8x16_t, int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.i8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vmlaq_f32 (float32x4_t, float32x4_t, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.f32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vmlal_u32 (uint64x2_t, uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmlal.u32 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vmlal_u16 (uint32x4_t, uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmlal.u16 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vmlal_u8 (uint16x8_t, uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmlal.u8 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vmlal_s32 (int64x2_t, int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmlal.s32 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vmlal_s16 (int32x4_t, int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmlal.s16 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vmlal_s8 (int16x8_t, int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmlal.s8 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vqdmlal_s32 (int64x2_t, int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqdmlal.s32 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vqdmlal_s16 (int32x4_t, int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqdmlal.s16 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+
+
+@subsubsection Multiply-subtract
+
+@itemize @bullet
+@item uint32x2_t vmls_u32 (uint32x2_t, uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.i32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vmls_u16 (uint16x4_t, uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.i16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vmls_u8 (uint8x8_t, uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.i8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vmls_s32 (int32x2_t, int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.i32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vmls_s16 (int16x4_t, int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.i16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vmls_s8 (int8x8_t, int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.i8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vmls_f32 (float32x2_t, float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.f32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vmlsq_u32 (uint32x4_t, uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.i32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vmlsq_u16 (uint16x8_t, uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.i16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vmlsq_u8 (uint8x16_t, uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.i8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vmlsq_s32 (int32x4_t, int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.i32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vmlsq_s16 (int16x8_t, int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.i16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vmlsq_s8 (int8x16_t, int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.i8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vmlsq_f32 (float32x4_t, float32x4_t, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.f32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vmlsl_u32 (uint64x2_t, uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmlsl.u32 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vmlsl_u16 (uint32x4_t, uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmlsl.u16 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vmlsl_u8 (uint16x8_t, uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmlsl.u8 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vmlsl_s32 (int64x2_t, int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmlsl.s32 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vmlsl_s16 (int32x4_t, int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmlsl.s16 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vmlsl_s8 (int16x8_t, int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmlsl.s8 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vqdmlsl_s32 (int64x2_t, int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqdmlsl.s32 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vqdmlsl_s16 (int32x4_t, int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqdmlsl.s16 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+
+
+@subsubsection Subtraction
+
+@itemize @bullet
+@item uint32x2_t vsub_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vsub.i32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vsub_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vsub.i16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vsub_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vsub.i8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vsub_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vsub.i32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vsub_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vsub.i16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vsub_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vsub.i8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vsub_f32 (float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vsub.f32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vsub_u64 (uint64x1_t, uint64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vsub_s64 (int64x1_t, int64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vsubq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vsub.i32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vsubq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vsub.i16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vsubq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vsub.i8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vsubq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vsub.i32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vsubq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vsub.i16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vsubq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vsub.i8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vsubq_u64 (uint64x2_t, uint64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vsub.i64 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vsubq_s64 (int64x2_t, int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vsub.i64 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vsubq_f32 (float32x4_t, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vsub.f32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vsubl_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vsubl.u32 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vsubl_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vsubl.u16 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vsubl_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vsubl.u8 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vsubl_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vsubl.s32 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vsubl_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vsubl.s16 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vsubl_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vsubl.s8 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vsubw_u32 (uint64x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vsubw.u32 @var{q0}, @var{q0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vsubw_u16 (uint32x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vsubw.u16 @var{q0}, @var{q0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vsubw_u8 (uint16x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vsubw.u8 @var{q0}, @var{q0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vsubw_s32 (int64x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vsubw.s32 @var{q0}, @var{q0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vsubw_s16 (int32x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vsubw.s16 @var{q0}, @var{q0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vsubw_s8 (int16x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vsubw.s8 @var{q0}, @var{q0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vhsub_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vhsub.u32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vhsub_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vhsub.u16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vhsub_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vhsub.u8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vhsub_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vhsub.s32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vhsub_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vhsub.s16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vhsub_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vhsub.s8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vhsubq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vhsub.u32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vhsubq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vhsub.u16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vhsubq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vhsub.u8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vhsubq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vhsub.s32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vhsubq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vhsub.s16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vhsubq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vhsub.s8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vqsub_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqsub.u32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vqsub_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqsub.u16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vqsub_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqsub.u8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vqsub_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqsub.s32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vqsub_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqsub.s16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vqsub_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqsub.s8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vqsub_u64 (uint64x1_t, uint64x1_t)
+@*@emph{Form of expected instruction(s):} @code{vqsub.u64 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vqsub_s64 (int64x1_t, int64x1_t)
+@*@emph{Form of expected instruction(s):} @code{vqsub.s64 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vqsubq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqsub.u32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vqsubq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqsub.u16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vqsubq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vqsub.u8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vqsubq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqsub.s32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vqsubq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqsub.s16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vqsubq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vqsub.s8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vqsubq_u64 (uint64x2_t, uint64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqsub.u64 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vqsubq_s64 (int64x2_t, int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqsub.s64 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vsubhn_u64 (uint64x2_t, uint64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vsubhn.i64 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vsubhn_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vsubhn.i32 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vsubhn_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vsubhn.i16 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vsubhn_s64 (int64x2_t, int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vsubhn.i64 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vsubhn_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vsubhn.i32 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vsubhn_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vsubhn.i16 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vrsubhn_u64 (uint64x2_t, uint64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vrsubhn.i64 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vrsubhn_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrsubhn.i32 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vrsubhn_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrsubhn.i16 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vrsubhn_s64 (int64x2_t, int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vrsubhn.i64 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vrsubhn_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrsubhn.i32 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vrsubhn_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrsubhn.i16 @var{d0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Comparison (equal-to)
+
+@itemize @bullet
+@item uint32x2_t vceq_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vceq.i32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vceq_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vceq.i16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vceq_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vceq.i8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vceq_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vceq.i32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vceq_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vceq.i16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vceq_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vceq.i8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vceq_f32 (float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vceq.f32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vceq_p8 (poly8x8_t, poly8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vceq.i8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vceqq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vceq.i32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vceqq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vceq.i16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vceqq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vceq.i8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vceqq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vceq.i32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vceqq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vceq.i16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vceqq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vceq.i8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vceqq_f32 (float32x4_t, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vceq.f32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vceqq_p8 (poly8x16_t, poly8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vceq.i8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Comparison (greater-than-or-equal-to)
+
+@itemize @bullet
+@item uint32x2_t vcge_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.u32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vcge_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.u16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vcge_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.u8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vcge_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.s32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vcge_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.s16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vcge_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.s8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vcge_f32 (float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.f32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vcgeq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.u32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vcgeq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.u16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vcgeq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.u8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vcgeq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.s32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vcgeq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.s16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vcgeq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.s8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vcgeq_f32 (float32x4_t, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.f32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Comparison (less-than-or-equal-to)
+
+@itemize @bullet
+@item uint32x2_t vcle_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.u32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vcle_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.u16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vcle_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.u8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vcle_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.s32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vcle_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.s16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vcle_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.s8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vcle_f32 (float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.f32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vcleq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.u32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vcleq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.u16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vcleq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.u8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vcleq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.s32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vcleq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.s16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vcleq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.s8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vcleq_f32 (float32x4_t, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcge.f32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Comparison (greater-than)
+
+@itemize @bullet
+@item uint32x2_t vcgt_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.u32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vcgt_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.u16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vcgt_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.u8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vcgt_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.s32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vcgt_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.s16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vcgt_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.s8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vcgt_f32 (float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.f32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vcgtq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.u32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vcgtq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.u16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vcgtq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.u8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vcgtq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.s32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vcgtq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.s16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vcgtq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.s8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vcgtq_f32 (float32x4_t, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.f32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Comparison (less-than)
+
+@itemize @bullet
+@item uint32x2_t vclt_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.u32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vclt_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.u16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vclt_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.u8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vclt_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.s32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vclt_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.s16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vclt_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.s8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vclt_f32 (float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.f32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vcltq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.u32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vcltq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.u16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vcltq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.u8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vcltq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.s32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vcltq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.s16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vcltq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.s8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vcltq_f32 (float32x4_t, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcgt.f32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Comparison (absolute greater-than-or-equal-to)
+
+@itemize @bullet
+@item uint32x2_t vcage_f32 (float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vacge.f32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vcageq_f32 (float32x4_t, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vacge.f32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Comparison (absolute less-than-or-equal-to)
+
+@itemize @bullet
+@item uint32x2_t vcale_f32 (float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vacge.f32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vcaleq_f32 (float32x4_t, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vacge.f32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Comparison (absolute greater-than)
+
+@itemize @bullet
+@item uint32x2_t vcagt_f32 (float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vacgt.f32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vcagtq_f32 (float32x4_t, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vacgt.f32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Comparison (absolute less-than)
+
+@itemize @bullet
+@item uint32x2_t vcalt_f32 (float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vacgt.f32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vcaltq_f32 (float32x4_t, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vacgt.f32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Test bits
+
+@itemize @bullet
+@item uint32x2_t vtst_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vtst.32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vtst_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vtst.16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vtst_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtst.8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vtst_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vtst.32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vtst_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vtst.16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vtst_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtst.8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vtst_p8 (poly8x8_t, poly8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtst.8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vtstq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vtst.32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vtstq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtst.16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vtstq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vtst.8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vtstq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vtst.32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vtstq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtst.16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vtstq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vtst.8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vtstq_p8 (poly8x16_t, poly8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vtst.8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Absolute difference
+
+@itemize @bullet
+@item uint32x2_t vabd_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vabd.u32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vabd_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vabd.u16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vabd_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vabd.u8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vabd_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vabd.s32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vabd_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vabd.s16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vabd_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vabd.s8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vabd_f32 (float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vabd.f32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vabdq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vabd.u32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vabdq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vabd.u16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vabdq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vabd.u8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vabdq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vabd.s32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vabdq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vabd.s16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vabdq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vabd.s8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vabdq_f32 (float32x4_t, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vabd.f32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vabdl_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vabdl.u32 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vabdl_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vabdl.u16 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vabdl_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vabdl.u8 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vabdl_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vabdl.s32 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vabdl_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vabdl.s16 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vabdl_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vabdl.s8 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+
+
+@subsubsection Absolute difference and accumulate
+
+@itemize @bullet
+@item uint32x2_t vaba_u32 (uint32x2_t, uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vaba.u32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vaba_u16 (uint16x4_t, uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vaba.u16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vaba_u8 (uint8x8_t, uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vaba.u8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vaba_s32 (int32x2_t, int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vaba.s32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vaba_s16 (int16x4_t, int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vaba.s16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vaba_s8 (int8x8_t, int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vaba.s8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vabaq_u32 (uint32x4_t, uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vaba.u32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vabaq_u16 (uint16x8_t, uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vaba.u16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vabaq_u8 (uint8x16_t, uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vaba.u8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vabaq_s32 (int32x4_t, int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vaba.s32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vabaq_s16 (int16x8_t, int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vaba.s16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vabaq_s8 (int8x16_t, int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vaba.s8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vabal_u32 (uint64x2_t, uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vabal.u32 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vabal_u16 (uint32x4_t, uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vabal.u16 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vabal_u8 (uint16x8_t, uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vabal.u8 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vabal_s32 (int64x2_t, int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vabal.s32 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vabal_s16 (int32x4_t, int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vabal.s16 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vabal_s8 (int16x8_t, int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vabal.s8 @var{q0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+
+
+@subsubsection Maximum
+
+@itemize @bullet
+@item uint32x2_t vmax_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmax.u32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vmax_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmax.u16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vmax_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmax.u8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vmax_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmax.s32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vmax_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmax.s16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vmax_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmax.s8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vmax_f32 (float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmax.f32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vmaxq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmax.u32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vmaxq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmax.u16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vmaxq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vmax.u8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vmaxq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmax.s32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vmaxq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmax.s16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vmaxq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vmax.s8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vmaxq_f32 (float32x4_t, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmax.f32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Minimum
+
+@itemize @bullet
+@item uint32x2_t vmin_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmin.u32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vmin_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmin.u16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vmin_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmin.u8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vmin_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmin.s32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vmin_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmin.s16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vmin_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmin.s8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vmin_f32 (float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmin.f32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vminq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmin.u32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vminq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmin.u16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vminq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vmin.u8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vminq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmin.s32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vminq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmin.s16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vminq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vmin.s8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vminq_f32 (float32x4_t, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmin.f32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Pairwise add
+
+@itemize @bullet
+@item uint32x2_t vpadd_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vpadd.i32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vpadd_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vpadd.i16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vpadd_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vpadd.i8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vpadd_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vpadd.i32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vpadd_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vpadd.i16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vpadd_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vpadd.i8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vpadd_f32 (float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vpadd.f32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vpaddl_u32 (uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vpaddl.u32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vpaddl_u16 (uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vpaddl.u16 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vpaddl_u8 (uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vpaddl.u8 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vpaddl_s32 (int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vpaddl.s32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vpaddl_s16 (int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vpaddl.s16 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vpaddl_s8 (int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vpaddl.s8 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vpaddlq_u32 (uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vpaddl.u32 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vpaddlq_u16 (uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vpaddl.u16 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vpaddlq_u8 (uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vpaddl.u8 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vpaddlq_s32 (int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vpaddl.s32 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vpaddlq_s16 (int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vpaddl.s16 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vpaddlq_s8 (int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vpaddl.s8 @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Pairwise add, single_opcode widen and accumulate
+
+@itemize @bullet
+@item uint64x1_t vpadal_u32 (uint64x1_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vpadal.u32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vpadal_u16 (uint32x2_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vpadal.u16 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vpadal_u8 (uint16x4_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vpadal.u8 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vpadal_s32 (int64x1_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vpadal.s32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vpadal_s16 (int32x2_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vpadal.s16 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vpadal_s8 (int16x4_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vpadal.s8 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vpadalq_u32 (uint64x2_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vpadal.u32 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vpadalq_u16 (uint32x4_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vpadal.u16 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vpadalq_u8 (uint16x8_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vpadal.u8 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vpadalq_s32 (int64x2_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vpadal.s32 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vpadalq_s16 (int32x4_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vpadal.s16 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vpadalq_s8 (int16x8_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vpadal.s8 @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Folding maximum
+
+@itemize @bullet
+@item uint32x2_t vpmax_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vpmax.u32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vpmax_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vpmax.u16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vpmax_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vpmax.u8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vpmax_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vpmax.s32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vpmax_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vpmax.s16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vpmax_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vpmax.s8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vpmax_f32 (float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vpmax.f32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+
+
+@subsubsection Folding minimum
+
+@itemize @bullet
+@item uint32x2_t vpmin_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vpmin.u32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vpmin_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vpmin.u16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vpmin_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vpmin.u8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vpmin_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vpmin.s32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vpmin_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vpmin.s16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vpmin_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vpmin.s8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vpmin_f32 (float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vpmin.f32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+
+
+@subsubsection Reciprocal step
+
+@itemize @bullet
+@item float32x2_t vrecps_f32 (float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vrecps.f32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vrecpsq_f32 (float32x4_t, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrecps.f32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vrsqrts_f32 (float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vrsqrts.f32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vrsqrtsq_f32 (float32x4_t, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrsqrts.f32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Vector shift left
+
+@itemize @bullet
+@item uint32x2_t vshl_u32 (uint32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vshl.u32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vshl_u16 (uint16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vshl.u16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vshl_u8 (uint8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vshl.u8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vshl_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vshl.s32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vshl_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vshl.s16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vshl_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vshl.s8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vshl_u64 (uint64x1_t, int64x1_t)
+@*@emph{Form of expected instruction(s):} @code{vshl.u64 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vshl_s64 (int64x1_t, int64x1_t)
+@*@emph{Form of expected instruction(s):} @code{vshl.s64 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vshlq_u32 (uint32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vshl.u32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vshlq_u16 (uint16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vshl.u16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vshlq_u8 (uint8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vshl.u8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vshlq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vshl.s32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vshlq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vshl.s16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vshlq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vshl.s8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vshlq_u64 (uint64x2_t, int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vshl.u64 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vshlq_s64 (int64x2_t, int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vshl.s64 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vrshl_u32 (uint32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vrshl.u32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vrshl_u16 (uint16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrshl.u16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vrshl_u8 (uint8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrshl.u8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vrshl_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vrshl.s32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vrshl_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrshl.s16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vrshl_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrshl.s8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vrshl_u64 (uint64x1_t, int64x1_t)
+@*@emph{Form of expected instruction(s):} @code{vrshl.u64 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vrshl_s64 (int64x1_t, int64x1_t)
+@*@emph{Form of expected instruction(s):} @code{vrshl.s64 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vrshlq_u32 (uint32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrshl.u32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vrshlq_u16 (uint16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrshl.u16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vrshlq_u8 (uint8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vrshl.u8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vrshlq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrshl.s32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vrshlq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrshl.s16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vrshlq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vrshl.s8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vrshlq_u64 (uint64x2_t, int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vrshl.u64 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vrshlq_s64 (int64x2_t, int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vrshl.s64 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vqshl_u32 (uint32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqshl.u32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vqshl_u16 (uint16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqshl.u16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vqshl_u8 (uint8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqshl.u8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vqshl_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqshl.s32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vqshl_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqshl.s16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vqshl_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqshl.s8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vqshl_u64 (uint64x1_t, int64x1_t)
+@*@emph{Form of expected instruction(s):} @code{vqshl.u64 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vqshl_s64 (int64x1_t, int64x1_t)
+@*@emph{Form of expected instruction(s):} @code{vqshl.s64 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vqshlq_u32 (uint32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqshl.u32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vqshlq_u16 (uint16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqshl.u16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vqshlq_u8 (uint8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vqshl.u8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vqshlq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqshl.s32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vqshlq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqshl.s16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vqshlq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vqshl.s8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vqshlq_u64 (uint64x2_t, int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqshl.u64 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vqshlq_s64 (int64x2_t, int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqshl.s64 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vqrshl_u32 (uint32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqrshl.u32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vqrshl_u16 (uint16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqrshl.u16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vqrshl_u8 (uint8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqrshl.u8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vqrshl_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqrshl.s32 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vqrshl_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqrshl.s16 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vqrshl_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqrshl.s8 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vqrshl_u64 (uint64x1_t, int64x1_t)
+@*@emph{Form of expected instruction(s):} @code{vqrshl.u64 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vqrshl_s64 (int64x1_t, int64x1_t)
+@*@emph{Form of expected instruction(s):} @code{vqrshl.s64 @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vqrshlq_u32 (uint32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqrshl.u32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vqrshlq_u16 (uint16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqrshl.u16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vqrshlq_u8 (uint8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vqrshl.u8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vqrshlq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqrshl.s32 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vqrshlq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqrshl.s16 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vqrshlq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vqrshl.s8 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vqrshlq_u64 (uint64x2_t, int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqrshl.u64 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vqrshlq_s64 (int64x2_t, int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqrshl.s64 @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Vector shift left by constant
+
+@itemize @bullet
+@item uint32x2_t vshl_n_u32 (uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshl.i32 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vshl_n_u16 (uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshl.i16 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vshl_n_u8 (uint8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshl.i8 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vshl_n_s32 (int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshl.i32 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vshl_n_s16 (int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshl.i16 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vshl_n_s8 (int8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshl.i8 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vshl_n_u64 (uint64x1_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshl.i64 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vshl_n_s64 (int64x1_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshl.i64 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vshlq_n_u32 (uint32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshl.i32 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vshlq_n_u16 (uint16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshl.i16 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vshlq_n_u8 (uint8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshl.i8 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vshlq_n_s32 (int32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshl.i32 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vshlq_n_s16 (int16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshl.i16 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vshlq_n_s8 (int8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshl.i8 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vshlq_n_u64 (uint64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshl.i64 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vshlq_n_s64 (int64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshl.i64 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vqshl_n_u32 (uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshl.u32 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vqshl_n_u16 (uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshl.u16 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vqshl_n_u8 (uint8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshl.u8 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vqshl_n_s32 (int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshl.s32 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vqshl_n_s16 (int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshl.s16 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vqshl_n_s8 (int8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshl.s8 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vqshl_n_u64 (uint64x1_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshl.u64 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vqshl_n_s64 (int64x1_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshl.s64 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vqshlq_n_u32 (uint32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshl.u32 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vqshlq_n_u16 (uint16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshl.u16 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vqshlq_n_u8 (uint8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshl.u8 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vqshlq_n_s32 (int32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshl.s32 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vqshlq_n_s16 (int16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshl.s16 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vqshlq_n_s8 (int8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshl.s8 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vqshlq_n_u64 (uint64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshl.u64 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vqshlq_n_s64 (int64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshl.s64 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vqshlu_n_s64 (int64x1_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshlu.s64 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vqshlu_n_s32 (int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshlu.s32 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vqshlu_n_s16 (int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshlu.s16 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vqshlu_n_s8 (int8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshlu.s8 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vqshluq_n_s64 (int64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshlu.s64 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vqshluq_n_s32 (int32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshlu.s32 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vqshluq_n_s16 (int16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshlu.s16 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vqshluq_n_s8 (int8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshlu.s8 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vshll_n_u32 (uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshll.u32 @var{q0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vshll_n_u16 (uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshll.u16 @var{q0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vshll_n_u8 (uint8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshll.u8 @var{q0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vshll_n_s32 (int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshll.s32 @var{q0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vshll_n_s16 (int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshll.s16 @var{q0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vshll_n_s8 (int8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshll.s8 @var{q0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+
+
+@subsubsection Vector shift right by constant
+
+@itemize @bullet
+@item uint32x2_t vshr_n_u32 (uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshr.u32 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vshr_n_u16 (uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshr.u16 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vshr_n_u8 (uint8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshr.u8 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vshr_n_s32 (int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshr.s32 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vshr_n_s16 (int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshr.s16 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vshr_n_s8 (int8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshr.s8 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vshr_n_u64 (uint64x1_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshr.u64 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vshr_n_s64 (int64x1_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshr.s64 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vshrq_n_u32 (uint32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshr.u32 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vshrq_n_u16 (uint16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshr.u16 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vshrq_n_u8 (uint8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshr.u8 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vshrq_n_s32 (int32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshr.s32 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vshrq_n_s16 (int16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshr.s16 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vshrq_n_s8 (int8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshr.s8 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vshrq_n_u64 (uint64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshr.u64 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vshrq_n_s64 (int64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshr.s64 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vrshr_n_u32 (uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrshr.u32 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vrshr_n_u16 (uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrshr.u16 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vrshr_n_u8 (uint8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrshr.u8 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vrshr_n_s32 (int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrshr.s32 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vrshr_n_s16 (int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrshr.s16 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vrshr_n_s8 (int8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrshr.s8 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vrshr_n_u64 (uint64x1_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrshr.u64 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vrshr_n_s64 (int64x1_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrshr.s64 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vrshrq_n_u32 (uint32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrshr.u32 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vrshrq_n_u16 (uint16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrshr.u16 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vrshrq_n_u8 (uint8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrshr.u8 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vrshrq_n_s32 (int32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrshr.s32 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vrshrq_n_s16 (int16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrshr.s16 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vrshrq_n_s8 (int8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrshr.s8 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vrshrq_n_u64 (uint64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrshr.u64 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vrshrq_n_s64 (int64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrshr.s64 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vshrn_n_u64 (uint64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshrn.i64 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vshrn_n_u32 (uint32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshrn.i32 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vshrn_n_u16 (uint16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshrn.i16 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vshrn_n_s64 (int64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshrn.i64 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vshrn_n_s32 (int32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshrn.i32 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vshrn_n_s16 (int16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vshrn.i16 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vrshrn_n_u64 (uint64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrshrn.i64 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vrshrn_n_u32 (uint32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrshrn.i32 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vrshrn_n_u16 (uint16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrshrn.i16 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vrshrn_n_s64 (int64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrshrn.i64 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vrshrn_n_s32 (int32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrshrn.i32 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vrshrn_n_s16 (int16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrshrn.i16 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vqshrn_n_u64 (uint64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshrn.u64 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vqshrn_n_u32 (uint32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshrn.u32 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vqshrn_n_u16 (uint16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshrn.u16 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vqshrn_n_s64 (int64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshrn.s64 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vqshrn_n_s32 (int32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshrn.s32 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vqshrn_n_s16 (int16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshrn.s16 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vqrshrn_n_u64 (uint64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqrshrn.u64 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vqrshrn_n_u32 (uint32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqrshrn.u32 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vqrshrn_n_u16 (uint16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqrshrn.u16 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vqrshrn_n_s64 (int64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqrshrn.s64 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vqrshrn_n_s32 (int32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqrshrn.s32 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vqrshrn_n_s16 (int16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqrshrn.s16 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vqshrun_n_s64 (int64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshrun.s64 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vqshrun_n_s32 (int32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshrun.s32 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vqshrun_n_s16 (int16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqshrun.s16 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vqrshrun_n_s64 (int64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqrshrun.s64 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vqrshrun_n_s32 (int32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqrshrun.s32 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vqrshrun_n_s16 (int16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqrshrun.s16 @var{d0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+
+
+@subsubsection Vector shift right by constant and accumulate
+
+@itemize @bullet
+@item uint32x2_t vsra_n_u32 (uint32x2_t, uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsra.u32 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vsra_n_u16 (uint16x4_t, uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsra.u16 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vsra_n_u8 (uint8x8_t, uint8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsra.u8 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vsra_n_s32 (int32x2_t, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsra.s32 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vsra_n_s16 (int16x4_t, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsra.s16 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vsra_n_s8 (int8x8_t, int8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsra.s8 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vsra_n_u64 (uint64x1_t, uint64x1_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsra.u64 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vsra_n_s64 (int64x1_t, int64x1_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsra.s64 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vsraq_n_u32 (uint32x4_t, uint32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsra.u32 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vsraq_n_u16 (uint16x8_t, uint16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsra.u16 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vsraq_n_u8 (uint8x16_t, uint8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsra.u8 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vsraq_n_s32 (int32x4_t, int32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsra.s32 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vsraq_n_s16 (int16x8_t, int16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsra.s16 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vsraq_n_s8 (int8x16_t, int8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsra.s8 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vsraq_n_u64 (uint64x2_t, uint64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsra.u64 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vsraq_n_s64 (int64x2_t, int64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsra.s64 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vrsra_n_u32 (uint32x2_t, uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrsra.u32 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vrsra_n_u16 (uint16x4_t, uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrsra.u16 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vrsra_n_u8 (uint8x8_t, uint8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrsra.u8 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vrsra_n_s32 (int32x2_t, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrsra.s32 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vrsra_n_s16 (int16x4_t, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrsra.s16 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vrsra_n_s8 (int8x8_t, int8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrsra.s8 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vrsra_n_u64 (uint64x1_t, uint64x1_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrsra.u64 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vrsra_n_s64 (int64x1_t, int64x1_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrsra.s64 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vrsraq_n_u32 (uint32x4_t, uint32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrsra.u32 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vrsraq_n_u16 (uint16x8_t, uint16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrsra.u16 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vrsraq_n_u8 (uint8x16_t, uint8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrsra.u8 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vrsraq_n_s32 (int32x4_t, int32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrsra.s32 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vrsraq_n_s16 (int16x8_t, int16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrsra.s16 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vrsraq_n_s8 (int8x16_t, int8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrsra.s8 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vrsraq_n_u64 (uint64x2_t, uint64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrsra.u64 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vrsraq_n_s64 (int64x2_t, int64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vrsra.s64 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+
+
+@subsubsection Vector shift right and insert
+
+@itemize @bullet
+@item uint32x2_t vsri_n_u32 (uint32x2_t, uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsri.32 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vsri_n_u16 (uint16x4_t, uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsri.16 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vsri_n_u8 (uint8x8_t, uint8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsri.8 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vsri_n_s32 (int32x2_t, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsri.32 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vsri_n_s16 (int16x4_t, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsri.16 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vsri_n_s8 (int8x8_t, int8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsri.8 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vsri_n_u64 (uint64x1_t, uint64x1_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsri.64 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vsri_n_s64 (int64x1_t, int64x1_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsri.64 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vsri_n_p16 (poly16x4_t, poly16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsri.16 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vsri_n_p8 (poly8x8_t, poly8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsri.8 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vsriq_n_u32 (uint32x4_t, uint32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsri.32 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vsriq_n_u16 (uint16x8_t, uint16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsri.16 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vsriq_n_u8 (uint8x16_t, uint8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsri.8 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vsriq_n_s32 (int32x4_t, int32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsri.32 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vsriq_n_s16 (int16x8_t, int16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsri.16 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vsriq_n_s8 (int8x16_t, int8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsri.8 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vsriq_n_u64 (uint64x2_t, uint64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsri.64 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vsriq_n_s64 (int64x2_t, int64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsri.64 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vsriq_n_p16 (poly16x8_t, poly16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsri.16 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vsriq_n_p8 (poly8x16_t, poly8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsri.8 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+
+
+@subsubsection Vector shift left and insert
+
+@itemize @bullet
+@item uint32x2_t vsli_n_u32 (uint32x2_t, uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsli.32 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vsli_n_u16 (uint16x4_t, uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsli.16 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vsli_n_u8 (uint8x8_t, uint8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsli.8 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vsli_n_s32 (int32x2_t, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsli.32 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vsli_n_s16 (int16x4_t, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsli.16 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vsli_n_s8 (int8x8_t, int8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsli.8 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vsli_n_u64 (uint64x1_t, uint64x1_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsli.64 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vsli_n_s64 (int64x1_t, int64x1_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsli.64 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vsli_n_p16 (poly16x4_t, poly16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsli.16 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vsli_n_p8 (poly8x8_t, poly8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsli.8 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vsliq_n_u32 (uint32x4_t, uint32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsli.32 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vsliq_n_u16 (uint16x8_t, uint16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsli.16 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vsliq_n_u8 (uint8x16_t, uint8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsli.8 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vsliq_n_s32 (int32x4_t, int32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsli.32 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vsliq_n_s16 (int16x8_t, int16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsli.16 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vsliq_n_s8 (int8x16_t, int8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsli.8 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vsliq_n_u64 (uint64x2_t, uint64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsli.64 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vsliq_n_s64 (int64x2_t, int64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsli.64 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vsliq_n_p16 (poly16x8_t, poly16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsli.16 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vsliq_n_p8 (poly8x16_t, poly8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vsli.8 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+
+
+@subsubsection Absolute value
+
+@itemize @bullet
+@item float32x2_t vabs_f32 (float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vabs.f32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vabs_s32 (int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vabs.s32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vabs_s16 (int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vabs.s16 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vabs_s8 (int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vabs.s8 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vabsq_f32 (float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vabs.f32 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vabsq_s32 (int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vabs.s32 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vabsq_s16 (int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vabs.s16 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vabsq_s8 (int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vabs.s8 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vqabs_s32 (int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqabs.s32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vqabs_s16 (int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqabs.s16 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vqabs_s8 (int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqabs.s8 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vqabsq_s32 (int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqabs.s32 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vqabsq_s16 (int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqabs.s16 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vqabsq_s8 (int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vqabs.s8 @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Negation
+
+@itemize @bullet
+@item float32x2_t vneg_f32 (float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vneg.f32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vneg_s32 (int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vneg.s32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vneg_s16 (int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vneg.s16 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vneg_s8 (int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vneg.s8 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vnegq_f32 (float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vneg.f32 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vnegq_s32 (int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vneg.s32 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vnegq_s16 (int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vneg.s16 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vnegq_s8 (int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vneg.s8 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vqneg_s32 (int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqneg.s32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vqneg_s16 (int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqneg.s16 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vqneg_s8 (int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqneg.s8 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vqnegq_s32 (int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqneg.s32 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vqnegq_s16 (int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqneg.s16 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vqnegq_s8 (int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vqneg.s8 @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Bitwise not
+
+@itemize @bullet
+@item uint32x2_t vmvn_u32 (uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmvn @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vmvn_u16 (uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmvn @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vmvn_u8 (uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmvn @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vmvn_s32 (int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmvn @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vmvn_s16 (int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmvn @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vmvn_s8 (int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmvn @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vmvn_p8 (poly8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmvn @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vmvnq_u32 (uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmvn @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vmvnq_u16 (uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmvn @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vmvnq_u8 (uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vmvn @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vmvnq_s32 (int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmvn @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vmvnq_s16 (int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmvn @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vmvnq_s8 (int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vmvn @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vmvnq_p8 (poly8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vmvn @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Count leading sign bits
+
+@itemize @bullet
+@item int32x2_t vcls_s32 (int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vcls.s32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vcls_s16 (int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcls.s16 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vcls_s8 (int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vcls.s8 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vclsq_s32 (int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcls.s32 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vclsq_s16 (int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vcls.s16 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vclsq_s8 (int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vcls.s8 @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Count leading zeros
+
+@itemize @bullet
+@item uint32x2_t vclz_u32 (uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vclz.i32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vclz_u16 (uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vclz.i16 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vclz_u8 (uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vclz.i8 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vclz_s32 (int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vclz.i32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vclz_s16 (int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vclz.i16 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vclz_s8 (int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vclz.i8 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vclzq_u32 (uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vclz.i32 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vclzq_u16 (uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vclz.i16 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vclzq_u8 (uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vclz.i8 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vclzq_s32 (int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vclz.i32 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vclzq_s16 (int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vclz.i16 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vclzq_s8 (int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vclz.i8 @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Count number of set bits
+
+@itemize @bullet
+@item uint8x8_t vcnt_u8 (uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vcnt.8 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vcnt_s8 (int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vcnt.8 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vcnt_p8 (poly8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vcnt.8 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vcntq_u8 (uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vcnt.8 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vcntq_s8 (int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vcnt.8 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vcntq_p8 (poly8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vcnt.8 @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Reciprocal estimate
+
+@itemize @bullet
+@item float32x2_t vrecpe_f32 (float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vrecpe.f32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vrecpe_u32 (uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vrecpe.u32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vrecpeq_f32 (float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrecpe.f32 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vrecpeq_u32 (uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrecpe.u32 @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Reciprocal square-root estimate
+
+@itemize @bullet
+@item float32x2_t vrsqrte_f32 (float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vrsqrte.f32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vrsqrte_u32 (uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vrsqrte.u32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vrsqrteq_f32 (float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrsqrte.f32 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vrsqrteq_u32 (uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrsqrte.u32 @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Get lanes from a vector
+
+@itemize @bullet
+@item uint32_t vget_lane_u32 (uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.32 @var{r0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16_t vget_lane_u16 (uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.u16 @var{r0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint8_t vget_lane_u8 (uint8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.u8 @var{r0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32_t vget_lane_s32 (int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.32 @var{r0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16_t vget_lane_s16 (int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.s16 @var{r0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int8_t vget_lane_s8 (int8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.s8 @var{r0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32_t vget_lane_f32 (float32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.32 @var{r0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16_t vget_lane_p16 (poly16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.u16 @var{r0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly8_t vget_lane_p8 (poly8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.u8 @var{r0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint64_t vget_lane_u64 (uint64x1_t, const int)
+@end itemize
+
+
+@itemize @bullet
+@item int64_t vget_lane_s64 (int64x1_t, const int)
+@end itemize
+
+
+@itemize @bullet
+@item uint32_t vgetq_lane_u32 (uint32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.32 @var{r0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16_t vgetq_lane_u16 (uint16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.u16 @var{r0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint8_t vgetq_lane_u8 (uint8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.u8 @var{r0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32_t vgetq_lane_s32 (int32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.32 @var{r0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16_t vgetq_lane_s16 (int16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.s16 @var{r0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int8_t vgetq_lane_s8 (int8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.s8 @var{r0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32_t vgetq_lane_f32 (float32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.32 @var{r0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16_t vgetq_lane_p16 (poly16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.u16 @var{r0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly8_t vgetq_lane_p8 (poly8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.u8 @var{r0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint64_t vgetq_lane_u64 (uint64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov @var{r0}, @var{r0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64_t vgetq_lane_s64 (int64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov @var{r0}, @var{r0}, @var{d0}}
+@end itemize
+
+
+
+
+@subsubsection Set lanes in a vector
+
+@itemize @bullet
+@item uint32x2_t vset_lane_u32 (uint32_t, uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.32 @var{d0}[@var{0}], @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vset_lane_u16 (uint16_t, uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.16 @var{d0}[@var{0}], @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vset_lane_u8 (uint8_t, uint8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.8 @var{d0}[@var{0}], @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vset_lane_s32 (int32_t, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.32 @var{d0}[@var{0}], @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vset_lane_s16 (int16_t, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.16 @var{d0}[@var{0}], @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vset_lane_s8 (int8_t, int8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.8 @var{d0}[@var{0}], @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vset_lane_f32 (float32_t, float32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.32 @var{d0}[@var{0}], @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vset_lane_p16 (poly16_t, poly16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.16 @var{d0}[@var{0}], @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vset_lane_p8 (poly8_t, poly8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.8 @var{d0}[@var{0}], @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vset_lane_u64 (uint64_t, uint64x1_t, const int)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vset_lane_s64 (int64_t, int64x1_t, const int)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vsetq_lane_u32 (uint32_t, uint32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.32 @var{d0}[@var{0}], @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vsetq_lane_u16 (uint16_t, uint16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.16 @var{d0}[@var{0}], @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vsetq_lane_u8 (uint8_t, uint8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.8 @var{d0}[@var{0}], @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vsetq_lane_s32 (int32_t, int32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.32 @var{d0}[@var{0}], @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vsetq_lane_s16 (int16_t, int16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.16 @var{d0}[@var{0}], @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vsetq_lane_s8 (int8_t, int8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.8 @var{d0}[@var{0}], @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vsetq_lane_f32 (float32_t, float32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.32 @var{d0}[@var{0}], @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vsetq_lane_p16 (poly16_t, poly16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.16 @var{d0}[@var{0}], @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vsetq_lane_p8 (poly8_t, poly8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov.8 @var{d0}[@var{0}], @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vsetq_lane_u64 (uint64_t, uint64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{r0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vsetq_lane_s64 (int64_t, int64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{r0}, @var{r0}}
+@end itemize
+
+
+
+
+@subsubsection Create vector from literal bit pattern
+
+@itemize @bullet
+@item uint32x2_t vcreate_u32 (uint64_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vcreate_u16 (uint64_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vcreate_u8 (uint64_t)
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vcreate_s32 (uint64_t)
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vcreate_s16 (uint64_t)
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vcreate_s8 (uint64_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vcreate_u64 (uint64_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vcreate_s64 (uint64_t)
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vcreate_f32 (uint64_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vcreate_p16 (uint64_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vcreate_p8 (uint64_t)
+@end itemize
+
+
+
+
+@subsubsection Set all lanes to the same value
+
+@itemize @bullet
+@item uint32x2_t vdup_n_u32 (uint32_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.32 @var{d0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vdup_n_u16 (uint16_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.16 @var{d0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vdup_n_u8 (uint8_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.8 @var{d0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vdup_n_s32 (int32_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.32 @var{d0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vdup_n_s16 (int16_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.16 @var{d0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vdup_n_s8 (int8_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.8 @var{d0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vdup_n_f32 (float32_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.32 @var{d0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vdup_n_p16 (poly16_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.16 @var{d0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vdup_n_p8 (poly8_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.8 @var{d0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vdup_n_u64 (uint64_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vdup_n_s64 (int64_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vdupq_n_u32 (uint32_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.32 @var{q0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vdupq_n_u16 (uint16_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.16 @var{q0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vdupq_n_u8 (uint8_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.8 @var{q0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vdupq_n_s32 (int32_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.32 @var{q0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vdupq_n_s16 (int16_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.16 @var{q0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vdupq_n_s8 (int8_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.8 @var{q0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vdupq_n_f32 (float32_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.32 @var{q0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vdupq_n_p16 (poly16_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.16 @var{q0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vdupq_n_p8 (poly8_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.8 @var{q0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vdupq_n_u64 (uint64_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vdupq_n_s64 (int64_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vmov_n_u32 (uint32_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.32 @var{d0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vmov_n_u16 (uint16_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.16 @var{d0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vmov_n_u8 (uint8_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.8 @var{d0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vmov_n_s32 (int32_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.32 @var{d0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vmov_n_s16 (int16_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.16 @var{d0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vmov_n_s8 (int8_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.8 @var{d0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vmov_n_f32 (float32_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.32 @var{d0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vmov_n_p16 (poly16_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.16 @var{d0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vmov_n_p8 (poly8_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.8 @var{d0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vmov_n_u64 (uint64_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vmov_n_s64 (int64_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vmovq_n_u32 (uint32_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.32 @var{q0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vmovq_n_u16 (uint16_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.16 @var{q0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vmovq_n_u8 (uint8_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.8 @var{q0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vmovq_n_s32 (int32_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.32 @var{q0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vmovq_n_s16 (int16_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.16 @var{q0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vmovq_n_s8 (int8_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.8 @var{q0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vmovq_n_f32 (float32_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.32 @var{q0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vmovq_n_p16 (poly16_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.16 @var{q0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vmovq_n_p8 (poly8_t)
+@*@emph{Form of expected instruction(s):} @code{vdup.8 @var{q0}, @var{r0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vmovq_n_u64 (uint64_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vmovq_n_s64 (int64_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vdup_lane_u32 (uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vdup.32 @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vdup_lane_u16 (uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vdup.16 @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vdup_lane_u8 (uint8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vdup.8 @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vdup_lane_s32 (int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vdup.32 @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vdup_lane_s16 (int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vdup.16 @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vdup_lane_s8 (int8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vdup.8 @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vdup_lane_f32 (float32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vdup.32 @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vdup_lane_p16 (poly16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vdup.16 @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vdup_lane_p8 (poly8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vdup.8 @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vdup_lane_u64 (uint64x1_t, const int)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vdup_lane_s64 (int64x1_t, const int)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vdupq_lane_u32 (uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vdup.32 @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vdupq_lane_u16 (uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vdup.16 @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vdupq_lane_u8 (uint8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vdup.8 @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vdupq_lane_s32 (int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vdup.32 @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vdupq_lane_s16 (int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vdup.16 @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vdupq_lane_s8 (int8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vdup.8 @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vdupq_lane_f32 (float32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vdup.32 @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vdupq_lane_p16 (poly16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vdup.16 @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vdupq_lane_p8 (poly8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vdup.8 @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vdupq_lane_u64 (uint64x1_t, const int)
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vdupq_lane_s64 (int64x1_t, const int)
+@end itemize
+
+
+
+
+@subsubsection Combining vectors
+
+@itemize @bullet
+@item uint32x4_t vcombine_u32 (uint32x2_t, uint32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vcombine_u16 (uint16x4_t, uint16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vcombine_u8 (uint8x8_t, uint8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vcombine_s32 (int32x2_t, int32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vcombine_s16 (int16x4_t, int16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vcombine_s8 (int8x8_t, int8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vcombine_u64 (uint64x1_t, uint64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vcombine_s64 (int64x1_t, int64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vcombine_f32 (float32x2_t, float32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vcombine_p16 (poly16x4_t, poly16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vcombine_p8 (poly8x8_t, poly8x8_t)
+@end itemize
+
+
+
+
+@subsubsection Splitting vectors
+
+@itemize @bullet
+@item uint32x2_t vget_high_u32 (uint32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vget_high_u16 (uint16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vget_high_u8 (uint8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vget_high_s32 (int32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vget_high_s16 (int16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vget_high_s8 (int8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vget_high_u64 (uint64x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vget_high_s64 (int64x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vget_high_f32 (float32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vget_high_p16 (poly16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vget_high_p8 (poly8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vget_low_u32 (uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vget_low_u16 (uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vget_low_u8 (uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vget_low_s32 (int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vget_low_s16 (int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vget_low_s8 (int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vget_low_f32 (float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vget_low_p16 (poly16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vget_low_p8 (poly8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vget_low_u64 (uint64x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vget_low_s64 (int64x2_t)
+@end itemize
+
+
+
+
+@subsubsection Conversions
+
+@itemize @bullet
+@item float32x2_t vcvt_f32_u32 (uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vcvt.f32.u32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vcvt_f32_s32 (int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vcvt.f32.s32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vcvt_u32_f32 (float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vcvt.u32.f32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vcvt_s32_f32 (float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vcvt.s32.f32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vcvtq_f32_u32 (uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcvt.f32.u32 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vcvtq_f32_s32 (int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcvt.f32.s32 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vcvtq_u32_f32 (float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcvt.u32.f32 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vcvtq_s32_f32 (float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vcvt.s32.f32 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vcvt_n_f32_u32 (uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vcvt.f32.u32 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vcvt_n_f32_s32 (int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vcvt.f32.s32 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vcvt_n_u32_f32 (float32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vcvt.u32.f32 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vcvt_n_s32_f32 (float32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vcvt.s32.f32 @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vcvtq_n_f32_u32 (uint32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vcvt.f32.u32 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vcvtq_n_f32_s32 (int32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vcvt.f32.s32 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vcvtq_n_u32_f32 (float32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vcvt.u32.f32 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vcvtq_n_s32_f32 (float32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vcvt.s32.f32 @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+
+
+@subsubsection Move, single_opcode narrowing
+
+@itemize @bullet
+@item uint32x2_t vmovn_u64 (uint64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmovn.i64 @var{d0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vmovn_u32 (uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmovn.i32 @var{d0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vmovn_u16 (uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmovn.i16 @var{d0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vmovn_s64 (int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmovn.i64 @var{d0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vmovn_s32 (int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmovn.i32 @var{d0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vmovn_s16 (int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmovn.i16 @var{d0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vqmovn_u64 (uint64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqmovn.u64 @var{d0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vqmovn_u32 (uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqmovn.u32 @var{d0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vqmovn_u16 (uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqmovn.u16 @var{d0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vqmovn_s64 (int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqmovn.s64 @var{d0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vqmovn_s32 (int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqmovn.s32 @var{d0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vqmovn_s16 (int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqmovn.s16 @var{d0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vqmovun_s64 (int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vqmovun.s64 @var{d0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vqmovun_s32 (int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vqmovun.s32 @var{d0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vqmovun_s16 (int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vqmovun.s16 @var{d0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Move, single_opcode long
+
+@itemize @bullet
+@item uint64x2_t vmovl_u32 (uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmovl.u32 @var{q0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vmovl_u16 (uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmovl.u16 @var{q0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vmovl_u8 (uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmovl.u8 @var{q0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vmovl_s32 (int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vmovl.s32 @var{q0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vmovl_s16 (int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vmovl.s16 @var{q0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vmovl_s8 (int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vmovl.s8 @var{q0}, @var{d0}}
+@end itemize
+
+
+
+
+@subsubsection Table lookup
+
+@itemize @bullet
+@item poly8x8_t vtbl1_p8 (poly8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbl.8 @var{d0}, @{@var{d0}@}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vtbl1_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbl.8 @var{d0}, @{@var{d0}@}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vtbl1_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbl.8 @var{d0}, @{@var{d0}@}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vtbl2_p8 (poly8x8x2_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbl.8 @var{d0}, @{@var{d0}, @var{d1}@}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vtbl2_s8 (int8x8x2_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbl.8 @var{d0}, @{@var{d0}, @var{d1}@}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vtbl2_u8 (uint8x8x2_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbl.8 @var{d0}, @{@var{d0}, @var{d1}@}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vtbl3_p8 (poly8x8x3_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbl.8 @var{d0}, @{@var{d0}, @var{d1}, @var{d2}@}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vtbl3_s8 (int8x8x3_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbl.8 @var{d0}, @{@var{d0}, @var{d1}, @var{d2}@}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vtbl3_u8 (uint8x8x3_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbl.8 @var{d0}, @{@var{d0}, @var{d1}, @var{d2}@}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vtbl4_p8 (poly8x8x4_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbl.8 @var{d0}, @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vtbl4_s8 (int8x8x4_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbl.8 @var{d0}, @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vtbl4_u8 (uint8x8x4_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbl.8 @var{d0}, @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, @var{d0}}
+@end itemize
+
+
+
+
+@subsubsection Extended table lookup
+
+@itemize @bullet
+@item poly8x8_t vtbx1_p8 (poly8x8_t, poly8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbx.8 @var{d0}, @{@var{d0}@}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vtbx1_s8 (int8x8_t, int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbx.8 @var{d0}, @{@var{d0}@}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vtbx1_u8 (uint8x8_t, uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbx.8 @var{d0}, @{@var{d0}@}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vtbx2_p8 (poly8x8_t, poly8x8x2_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbx.8 @var{d0}, @{@var{d0}, @var{d1}@}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vtbx2_s8 (int8x8_t, int8x8x2_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbx.8 @var{d0}, @{@var{d0}, @var{d1}@}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vtbx2_u8 (uint8x8_t, uint8x8x2_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbx.8 @var{d0}, @{@var{d0}, @var{d1}@}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vtbx3_p8 (poly8x8_t, poly8x8x3_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbx.8 @var{d0}, @{@var{d0}, @var{d1}, @var{d2}@}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vtbx3_s8 (int8x8_t, int8x8x3_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbx.8 @var{d0}, @{@var{d0}, @var{d1}, @var{d2}@}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vtbx3_u8 (uint8x8_t, uint8x8x3_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbx.8 @var{d0}, @{@var{d0}, @var{d1}, @var{d2}@}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vtbx4_p8 (poly8x8_t, poly8x8x4_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbx.8 @var{d0}, @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vtbx4_s8 (int8x8_t, int8x8x4_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbx.8 @var{d0}, @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vtbx4_u8 (uint8x8_t, uint8x8x4_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtbx.8 @var{d0}, @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, @var{d0}}
+@end itemize
+
+
+
+
+@subsubsection Multiply, lane
+
+@itemize @bullet
+@item float32x2_t vmul_lane_f32 (float32x2_t, float32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmul.f32 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vmul_lane_u32 (uint32x2_t, uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmul.i32 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vmul_lane_u16 (uint16x4_t, uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmul.i16 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vmul_lane_s32 (int32x2_t, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmul.i32 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vmul_lane_s16 (int16x4_t, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmul.i16 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vmulq_lane_f32 (float32x4_t, float32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmul.f32 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vmulq_lane_u32 (uint32x4_t, uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmul.i32 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vmulq_lane_u16 (uint16x8_t, uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmul.i16 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vmulq_lane_s32 (int32x4_t, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmul.i32 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vmulq_lane_s16 (int16x8_t, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmul.i16 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+
+
+@subsubsection Long multiply, lane
+
+@itemize @bullet
+@item uint64x2_t vmull_lane_u32 (uint32x2_t, uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmull.u32 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vmull_lane_u16 (uint16x4_t, uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmull.u16 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vmull_lane_s32 (int32x2_t, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmull.s32 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vmull_lane_s16 (int16x4_t, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmull.s16 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+
+
+@subsubsection Saturating doubling long multiply, lane
+
+@itemize @bullet
+@item int64x2_t vqdmull_lane_s32 (int32x2_t, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqdmull.s32 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vqdmull_lane_s16 (int16x4_t, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqdmull.s16 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+
+
+@subsubsection Saturating doubling multiply high, lane
+
+@itemize @bullet
+@item int32x4_t vqdmulhq_lane_s32 (int32x4_t, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqdmulh.s32 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vqdmulhq_lane_s16 (int16x8_t, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqdmulh.s16 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vqdmulh_lane_s32 (int32x2_t, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqdmulh.s32 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vqdmulh_lane_s16 (int16x4_t, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqdmulh.s16 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vqrdmulhq_lane_s32 (int32x4_t, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqrdmulh.s32 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vqrdmulhq_lane_s16 (int16x8_t, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqrdmulh.s16 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vqrdmulh_lane_s32 (int32x2_t, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqrdmulh.s32 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vqrdmulh_lane_s16 (int16x4_t, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqrdmulh.s16 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+
+
+@subsubsection Multiply-accumulate, lane
+
+@itemize @bullet
+@item float32x2_t vmla_lane_f32 (float32x2_t, float32x2_t, float32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmla.f32 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vmla_lane_u32 (uint32x2_t, uint32x2_t, uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmla.i32 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vmla_lane_u16 (uint16x4_t, uint16x4_t, uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmla.i16 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vmla_lane_s32 (int32x2_t, int32x2_t, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmla.i32 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vmla_lane_s16 (int16x4_t, int16x4_t, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmla.i16 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vmlaq_lane_f32 (float32x4_t, float32x4_t, float32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmla.f32 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vmlaq_lane_u32 (uint32x4_t, uint32x4_t, uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmla.i32 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vmlaq_lane_u16 (uint16x8_t, uint16x8_t, uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmla.i16 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vmlaq_lane_s32 (int32x4_t, int32x4_t, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmla.i32 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vmlaq_lane_s16 (int16x8_t, int16x8_t, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmla.i16 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vmlal_lane_u32 (uint64x2_t, uint32x2_t, uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmlal.u32 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vmlal_lane_u16 (uint32x4_t, uint16x4_t, uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmlal.u16 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vmlal_lane_s32 (int64x2_t, int32x2_t, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmlal.s32 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vmlal_lane_s16 (int32x4_t, int16x4_t, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmlal.s16 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vqdmlal_lane_s32 (int64x2_t, int32x2_t, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqdmlal.s32 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vqdmlal_lane_s16 (int32x4_t, int16x4_t, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqdmlal.s16 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+
+
+@subsubsection Multiply-subtract, lane
+
+@itemize @bullet
+@item float32x2_t vmls_lane_f32 (float32x2_t, float32x2_t, float32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmls.f32 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vmls_lane_u32 (uint32x2_t, uint32x2_t, uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmls.i32 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vmls_lane_u16 (uint16x4_t, uint16x4_t, uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmls.i16 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vmls_lane_s32 (int32x2_t, int32x2_t, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmls.i32 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vmls_lane_s16 (int16x4_t, int16x4_t, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmls.i16 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vmlsq_lane_f32 (float32x4_t, float32x4_t, float32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmls.f32 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vmlsq_lane_u32 (uint32x4_t, uint32x4_t, uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmls.i32 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vmlsq_lane_u16 (uint16x8_t, uint16x8_t, uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmls.i16 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vmlsq_lane_s32 (int32x4_t, int32x4_t, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmls.i32 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vmlsq_lane_s16 (int16x8_t, int16x8_t, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmls.i16 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vmlsl_lane_u32 (uint64x2_t, uint32x2_t, uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmlsl.u32 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vmlsl_lane_u16 (uint32x4_t, uint16x4_t, uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmlsl.u16 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vmlsl_lane_s32 (int64x2_t, int32x2_t, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmlsl.s32 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vmlsl_lane_s16 (int32x4_t, int16x4_t, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vmlsl.s16 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vqdmlsl_lane_s32 (int64x2_t, int32x2_t, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqdmlsl.s32 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vqdmlsl_lane_s16 (int32x4_t, int16x4_t, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vqdmlsl.s16 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+
+
+@subsubsection Vector multiply by scalar
+
+@itemize @bullet
+@item float32x2_t vmul_n_f32 (float32x2_t, float32_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.f32 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vmul_n_u32 (uint32x2_t, uint32_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.i32 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vmul_n_u16 (uint16x4_t, uint16_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.i16 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vmul_n_s32 (int32x2_t, int32_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.i32 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vmul_n_s16 (int16x4_t, int16_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.i16 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vmulq_n_f32 (float32x4_t, float32_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.f32 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vmulq_n_u32 (uint32x4_t, uint32_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.i32 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vmulq_n_u16 (uint16x8_t, uint16_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.i16 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vmulq_n_s32 (int32x4_t, int32_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.i32 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vmulq_n_s16 (int16x8_t, int16_t)
+@*@emph{Form of expected instruction(s):} @code{vmul.i16 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+
+
+@subsubsection Vector long multiply by scalar
+
+@itemize @bullet
+@item uint64x2_t vmull_n_u32 (uint32x2_t, uint32_t)
+@*@emph{Form of expected instruction(s):} @code{vmull.u32 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vmull_n_u16 (uint16x4_t, uint16_t)
+@*@emph{Form of expected instruction(s):} @code{vmull.u16 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vmull_n_s32 (int32x2_t, int32_t)
+@*@emph{Form of expected instruction(s):} @code{vmull.s32 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vmull_n_s16 (int16x4_t, int16_t)
+@*@emph{Form of expected instruction(s):} @code{vmull.s16 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+
+
+@subsubsection Vector saturating doubling long multiply by scalar
+
+@itemize @bullet
+@item int64x2_t vqdmull_n_s32 (int32x2_t, int32_t)
+@*@emph{Form of expected instruction(s):} @code{vqdmull.s32 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vqdmull_n_s16 (int16x4_t, int16_t)
+@*@emph{Form of expected instruction(s):} @code{vqdmull.s16 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+
+
+@subsubsection Vector saturating doubling multiply high by scalar
+
+@itemize @bullet
+@item int32x4_t vqdmulhq_n_s32 (int32x4_t, int32_t)
+@*@emph{Form of expected instruction(s):} @code{vqdmulh.s32 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vqdmulhq_n_s16 (int16x8_t, int16_t)
+@*@emph{Form of expected instruction(s):} @code{vqdmulh.s16 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vqdmulh_n_s32 (int32x2_t, int32_t)
+@*@emph{Form of expected instruction(s):} @code{vqdmulh.s32 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vqdmulh_n_s16 (int16x4_t, int16_t)
+@*@emph{Form of expected instruction(s):} @code{vqdmulh.s16 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vqrdmulhq_n_s32 (int32x4_t, int32_t)
+@*@emph{Form of expected instruction(s):} @code{vqrdmulh.s32 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vqrdmulhq_n_s16 (int16x8_t, int16_t)
+@*@emph{Form of expected instruction(s):} @code{vqrdmulh.s16 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vqrdmulh_n_s32 (int32x2_t, int32_t)
+@*@emph{Form of expected instruction(s):} @code{vqrdmulh.s32 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vqrdmulh_n_s16 (int16x4_t, int16_t)
+@*@emph{Form of expected instruction(s):} @code{vqrdmulh.s16 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+
+
+@subsubsection Vector multiply-accumulate by scalar
+
+@itemize @bullet
+@item float32x2_t vmla_n_f32 (float32x2_t, float32x2_t, float32_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.f32 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vmla_n_u32 (uint32x2_t, uint32x2_t, uint32_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.i32 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vmla_n_u16 (uint16x4_t, uint16x4_t, uint16_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.i16 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vmla_n_s32 (int32x2_t, int32x2_t, int32_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.i32 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vmla_n_s16 (int16x4_t, int16x4_t, int16_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.i16 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vmlaq_n_f32 (float32x4_t, float32x4_t, float32_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.f32 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vmlaq_n_u32 (uint32x4_t, uint32x4_t, uint32_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.i32 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vmlaq_n_u16 (uint16x8_t, uint16x8_t, uint16_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.i16 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vmlaq_n_s32 (int32x4_t, int32x4_t, int32_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.i32 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vmlaq_n_s16 (int16x8_t, int16x8_t, int16_t)
+@*@emph{Form of expected instruction(s):} @code{vmla.i16 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vmlal_n_u32 (uint64x2_t, uint32x2_t, uint32_t)
+@*@emph{Form of expected instruction(s):} @code{vmlal.u32 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vmlal_n_u16 (uint32x4_t, uint16x4_t, uint16_t)
+@*@emph{Form of expected instruction(s):} @code{vmlal.u16 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vmlal_n_s32 (int64x2_t, int32x2_t, int32_t)
+@*@emph{Form of expected instruction(s):} @code{vmlal.s32 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vmlal_n_s16 (int32x4_t, int16x4_t, int16_t)
+@*@emph{Form of expected instruction(s):} @code{vmlal.s16 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vqdmlal_n_s32 (int64x2_t, int32x2_t, int32_t)
+@*@emph{Form of expected instruction(s):} @code{vqdmlal.s32 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vqdmlal_n_s16 (int32x4_t, int16x4_t, int16_t)
+@*@emph{Form of expected instruction(s):} @code{vqdmlal.s16 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+
+
+@subsubsection Vector multiply-subtract by scalar
+
+@itemize @bullet
+@item float32x2_t vmls_n_f32 (float32x2_t, float32x2_t, float32_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.f32 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vmls_n_u32 (uint32x2_t, uint32x2_t, uint32_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.i32 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vmls_n_u16 (uint16x4_t, uint16x4_t, uint16_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.i16 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vmls_n_s32 (int32x2_t, int32x2_t, int32_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.i32 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vmls_n_s16 (int16x4_t, int16x4_t, int16_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.i16 @var{d0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vmlsq_n_f32 (float32x4_t, float32x4_t, float32_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.f32 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vmlsq_n_u32 (uint32x4_t, uint32x4_t, uint32_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.i32 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vmlsq_n_u16 (uint16x8_t, uint16x8_t, uint16_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.i16 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vmlsq_n_s32 (int32x4_t, int32x4_t, int32_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.i32 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vmlsq_n_s16 (int16x8_t, int16x8_t, int16_t)
+@*@emph{Form of expected instruction(s):} @code{vmls.i16 @var{q0}, @var{q0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vmlsl_n_u32 (uint64x2_t, uint32x2_t, uint32_t)
+@*@emph{Form of expected instruction(s):} @code{vmlsl.u32 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vmlsl_n_u16 (uint32x4_t, uint16x4_t, uint16_t)
+@*@emph{Form of expected instruction(s):} @code{vmlsl.u16 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vmlsl_n_s32 (int64x2_t, int32x2_t, int32_t)
+@*@emph{Form of expected instruction(s):} @code{vmlsl.s32 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vmlsl_n_s16 (int32x4_t, int16x4_t, int16_t)
+@*@emph{Form of expected instruction(s):} @code{vmlsl.s16 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vqdmlsl_n_s32 (int64x2_t, int32x2_t, int32_t)
+@*@emph{Form of expected instruction(s):} @code{vqdmlsl.s32 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vqdmlsl_n_s16 (int32x4_t, int16x4_t, int16_t)
+@*@emph{Form of expected instruction(s):} @code{vqdmlsl.s16 @var{q0}, @var{d0}, @var{d0}[@var{0}]}
+@end itemize
+
+
+
+
+@subsubsection Vector extract
+
+@itemize @bullet
+@item uint32x2_t vext_u32 (uint32x2_t, uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vext.32 @var{d0}, @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vext_u16 (uint16x4_t, uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vext.16 @var{d0}, @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vext_u8 (uint8x8_t, uint8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vext.8 @var{d0}, @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vext_s32 (int32x2_t, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vext.32 @var{d0}, @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vext_s16 (int16x4_t, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vext.16 @var{d0}, @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vext_s8 (int8x8_t, int8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vext.8 @var{d0}, @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vext_u64 (uint64x1_t, uint64x1_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vext.64 @var{d0}, @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vext_s64 (int64x1_t, int64x1_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vext.64 @var{d0}, @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vext_f32 (float32x2_t, float32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vext.32 @var{d0}, @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vext_p16 (poly16x4_t, poly16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vext.16 @var{d0}, @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vext_p8 (poly8x8_t, poly8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vext.8 @var{d0}, @var{d0}, @var{d0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vextq_u32 (uint32x4_t, uint32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vext.32 @var{q0}, @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vextq_u16 (uint16x8_t, uint16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vext.16 @var{q0}, @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vextq_u8 (uint8x16_t, uint8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vext.8 @var{q0}, @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vextq_s32 (int32x4_t, int32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vext.32 @var{q0}, @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vextq_s16 (int16x8_t, int16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vext.16 @var{q0}, @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vextq_s8 (int8x16_t, int8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vext.8 @var{q0}, @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vextq_u64 (uint64x2_t, uint64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vext.64 @var{q0}, @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vextq_s64 (int64x2_t, int64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vext.64 @var{q0}, @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vextq_f32 (float32x4_t, float32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vext.32 @var{q0}, @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vextq_p16 (poly16x8_t, poly16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vext.16 @var{q0}, @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vextq_p8 (poly8x16_t, poly8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vext.8 @var{q0}, @var{q0}, @var{q0}, #@var{0}}
+@end itemize
+
+
+
+
+@subsubsection Reverse elements
+
+@itemize @bullet
+@item uint32x2_t vrev64_u32 (uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vrev64.32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vrev64_u16 (uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrev64.16 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vrev64_u8 (uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrev64.8 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vrev64_s32 (int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vrev64.32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vrev64_s16 (int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrev64.16 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vrev64_s8 (int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrev64.8 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vrev64_f32 (float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vrev64.32 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vrev64_p16 (poly16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrev64.16 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vrev64_p8 (poly8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrev64.8 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vrev64q_u32 (uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrev64.32 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vrev64q_u16 (uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrev64.16 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vrev64q_u8 (uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vrev64.8 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vrev64q_s32 (int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrev64.32 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vrev64q_s16 (int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrev64.16 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vrev64q_s8 (int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vrev64.8 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vrev64q_f32 (float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrev64.32 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vrev64q_p16 (poly16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrev64.16 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vrev64q_p8 (poly8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vrev64.8 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vrev32_u16 (uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrev32.16 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vrev32_s16 (int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrev32.16 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vrev32_u8 (uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrev32.8 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vrev32_s8 (int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrev32.8 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vrev32_p16 (poly16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vrev32.16 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vrev32_p8 (poly8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrev32.8 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vrev32q_u16 (uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrev32.16 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vrev32q_s16 (int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrev32.16 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vrev32q_u8 (uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vrev32.8 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vrev32q_s8 (int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vrev32.8 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vrev32q_p16 (poly16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrev32.16 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vrev32q_p8 (poly8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vrev32.8 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vrev16_u8 (uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrev16.8 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vrev16_s8 (int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrev16.8 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vrev16_p8 (poly8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vrev16.8 @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vrev16q_u8 (uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vrev16.8 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vrev16q_s8 (int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vrev16.8 @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vrev16q_p8 (poly8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vrev16.8 @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Bit selection
+
+@itemize @bullet
+@item uint32x2_t vbsl_u32 (uint32x2_t, uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vbsl @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbit @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbif @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vbsl_u16 (uint16x4_t, uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vbsl @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbit @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbif @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vbsl_u8 (uint8x8_t, uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vbsl @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbit @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbif @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vbsl_s32 (uint32x2_t, int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vbsl @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbit @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbif @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vbsl_s16 (uint16x4_t, int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vbsl @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbit @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbif @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vbsl_s8 (uint8x8_t, int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vbsl @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbit @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbif @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vbsl_u64 (uint64x1_t, uint64x1_t, uint64x1_t)
+@*@emph{Form of expected instruction(s):} @code{vbsl @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbit @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbif @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vbsl_s64 (uint64x1_t, int64x1_t, int64x1_t)
+@*@emph{Form of expected instruction(s):} @code{vbsl @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbit @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbif @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vbsl_f32 (uint32x2_t, float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vbsl @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbit @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbif @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vbsl_p16 (uint16x4_t, poly16x4_t, poly16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vbsl @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbit @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbif @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vbsl_p8 (uint8x8_t, poly8x8_t, poly8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vbsl @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbit @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbif @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vbslq_u32 (uint32x4_t, uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vbsl @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbit @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbif @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vbslq_u16 (uint16x8_t, uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vbsl @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbit @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbif @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vbslq_u8 (uint8x16_t, uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vbsl @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbit @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbif @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vbslq_s32 (uint32x4_t, int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vbsl @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbit @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbif @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vbslq_s16 (uint16x8_t, int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vbsl @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbit @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbif @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vbslq_s8 (uint8x16_t, int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vbsl @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbit @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbif @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vbslq_u64 (uint64x2_t, uint64x2_t, uint64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vbsl @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbit @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbif @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vbslq_s64 (uint64x2_t, int64x2_t, int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vbsl @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbit @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbif @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vbslq_f32 (uint32x4_t, float32x4_t, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vbsl @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbit @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbif @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vbslq_p16 (uint16x8_t, poly16x8_t, poly16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vbsl @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbit @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbif @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vbslq_p8 (uint8x16_t, poly8x16_t, poly8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vbsl @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbit @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbif @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Transpose elements
+
+@itemize @bullet
+@item uint32x2x2_t vtrn_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vtrn.32 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4x2_t vtrn_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vtrn.16 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8x2_t vtrn_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtrn.8 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2x2_t vtrn_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vtrn.32 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4x2_t vtrn_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vtrn.16 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8x2_t vtrn_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtrn.8 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2x2_t vtrn_f32 (float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vtrn.32 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4x2_t vtrn_p16 (poly16x4_t, poly16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vtrn.16 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8x2_t vtrn_p8 (poly8x8_t, poly8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtrn.8 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4x2_t vtrnq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vtrn.32 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8x2_t vtrnq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtrn.16 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16x2_t vtrnq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vtrn.8 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4x2_t vtrnq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vtrn.32 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8x2_t vtrnq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtrn.16 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16x2_t vtrnq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vtrn.8 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4x2_t vtrnq_f32 (float32x4_t, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vtrn.32 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8x2_t vtrnq_p16 (poly16x8_t, poly16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vtrn.16 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16x2_t vtrnq_p8 (poly8x16_t, poly8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vtrn.8 @var{q0}, @var{q1}}
+@end itemize
+
+
+
+
+@subsubsection Zip elements
+
+@itemize @bullet
+@item uint32x2x2_t vzip_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vzip.32 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4x2_t vzip_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vzip.16 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8x2_t vzip_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vzip.8 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2x2_t vzip_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vzip.32 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4x2_t vzip_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vzip.16 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8x2_t vzip_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vzip.8 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2x2_t vzip_f32 (float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vzip.32 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4x2_t vzip_p16 (poly16x4_t, poly16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vzip.16 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8x2_t vzip_p8 (poly8x8_t, poly8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vzip.8 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4x2_t vzipq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vzip.32 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8x2_t vzipq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vzip.16 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16x2_t vzipq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vzip.8 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4x2_t vzipq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vzip.32 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8x2_t vzipq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vzip.16 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16x2_t vzipq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vzip.8 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4x2_t vzipq_f32 (float32x4_t, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vzip.32 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8x2_t vzipq_p16 (poly16x8_t, poly16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vzip.16 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16x2_t vzipq_p8 (poly8x16_t, poly8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vzip.8 @var{q0}, @var{q1}}
+@end itemize
+
+
+
+
+@subsubsection Unzip elements
+
+@itemize @bullet
+@item uint32x2x2_t vuzp_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vuzp.32 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4x2_t vuzp_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vuzp.16 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8x2_t vuzp_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vuzp.8 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2x2_t vuzp_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vuzp.32 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4x2_t vuzp_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vuzp.16 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8x2_t vuzp_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vuzp.8 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2x2_t vuzp_f32 (float32x2_t, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vuzp.32 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4x2_t vuzp_p16 (poly16x4_t, poly16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vuzp.16 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8x2_t vuzp_p8 (poly8x8_t, poly8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vuzp.8 @var{d0}, @var{d1}}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4x2_t vuzpq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vuzp.32 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8x2_t vuzpq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vuzp.16 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16x2_t vuzpq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vuzp.8 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4x2_t vuzpq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vuzp.32 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8x2_t vuzpq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vuzp.16 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16x2_t vuzpq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vuzp.8 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4x2_t vuzpq_f32 (float32x4_t, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vuzp.32 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8x2_t vuzpq_p16 (poly16x8_t, poly16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vuzp.16 @var{q0}, @var{q1}}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16x2_t vuzpq_p8 (poly8x16_t, poly8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vuzp.8 @var{q0}, @var{q1}}
+@end itemize
+
+
+
+
+@subsubsection Element/structure loads, VLD1 variants
+
+@itemize @bullet
+@item uint32x2_t vld1_u32 (const uint32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.32 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vld1_u16 (const uint16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.16 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vld1_u8 (const uint8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.8 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vld1_s32 (const int32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.32 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vld1_s16 (const int16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.16 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vld1_s8 (const int8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.8 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vld1_u64 (const uint64_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vld1_s64 (const int64_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vld1_f32 (const float32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.32 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vld1_p16 (const poly16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.16 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vld1_p8 (const poly8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.8 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vld1q_u32 (const uint32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.32 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vld1q_u16 (const uint16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.16 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vld1q_u8 (const uint8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.8 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vld1q_s32 (const int32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.32 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vld1q_s16 (const int16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.16 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vld1q_s8 (const int8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.8 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vld1q_u64 (const uint64_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vld1q_s64 (const int64_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vld1q_f32 (const float32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.32 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vld1q_p16 (const poly16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.16 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vld1q_p8 (const poly8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.8 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vld1_lane_u32 (const uint32_t *, uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld1.32 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vld1_lane_u16 (const uint16_t *, uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld1.16 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vld1_lane_u8 (const uint8_t *, uint8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld1.8 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vld1_lane_s32 (const int32_t *, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld1.32 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vld1_lane_s16 (const int16_t *, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld1.16 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vld1_lane_s8 (const int8_t *, int8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld1.8 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vld1_lane_f32 (const float32_t *, float32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld1.32 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vld1_lane_p16 (const poly16_t *, poly16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld1.16 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vld1_lane_p8 (const poly8_t *, poly8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld1.8 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vld1_lane_u64 (const uint64_t *, uint64x1_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vld1_lane_s64 (const int64_t *, int64x1_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vld1q_lane_u32 (const uint32_t *, uint32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld1.32 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vld1q_lane_u16 (const uint16_t *, uint16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld1.16 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vld1q_lane_u8 (const uint8_t *, uint8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld1.8 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vld1q_lane_s32 (const int32_t *, int32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld1.32 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vld1q_lane_s16 (const int16_t *, int16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld1.16 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vld1q_lane_s8 (const int8_t *, int8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld1.8 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vld1q_lane_f32 (const float32_t *, float32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld1.32 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vld1q_lane_p16 (const poly16_t *, poly16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld1.16 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vld1q_lane_p8 (const poly8_t *, poly8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld1.8 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vld1q_lane_u64 (const uint64_t *, uint64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vld1q_lane_s64 (const int64_t *, int64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vld1_dup_u32 (const uint32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.32 @{@var{d0}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vld1_dup_u16 (const uint16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.16 @{@var{d0}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vld1_dup_u8 (const uint8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.8 @{@var{d0}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vld1_dup_s32 (const int32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.32 @{@var{d0}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vld1_dup_s16 (const int16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.16 @{@var{d0}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vld1_dup_s8 (const int8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.8 @{@var{d0}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vld1_dup_f32 (const float32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.32 @{@var{d0}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vld1_dup_p16 (const poly16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.16 @{@var{d0}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vld1_dup_p8 (const poly8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.8 @{@var{d0}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vld1_dup_u64 (const uint64_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vld1_dup_s64 (const int64_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vld1q_dup_u32 (const uint32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.32 @{@var{d0}[], @var{d1}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vld1q_dup_u16 (const uint16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.16 @{@var{d0}[], @var{d1}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vld1q_dup_u8 (const uint8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.8 @{@var{d0}[], @var{d1}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vld1q_dup_s32 (const int32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.32 @{@var{d0}[], @var{d1}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vld1q_dup_s16 (const int16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.16 @{@var{d0}[], @var{d1}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vld1q_dup_s8 (const int8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.8 @{@var{d0}[], @var{d1}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vld1q_dup_f32 (const float32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.32 @{@var{d0}[], @var{d1}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vld1q_dup_p16 (const poly16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.16 @{@var{d0}[], @var{d1}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vld1q_dup_p8 (const poly8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.8 @{@var{d0}[], @var{d1}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vld1q_dup_u64 (const uint64_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vld1q_dup_s64 (const int64_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+
+
+@subsubsection Element/structure stores, VST1 variants
+
+@itemize @bullet
+@item void vst1_u32 (uint32_t *, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.32 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1_u16 (uint16_t *, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.16 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1_u8 (uint8_t *, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.8 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1_s32 (int32_t *, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.32 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1_s16 (int16_t *, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.16 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1_s8 (int8_t *, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.8 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1_u64 (uint64_t *, uint64x1_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1_s64 (int64_t *, int64x1_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1_f32 (float32_t *, float32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.32 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1_p16 (poly16_t *, poly16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.16 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1_p8 (poly8_t *, poly8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.8 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1q_u32 (uint32_t *, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.32 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1q_u16 (uint16_t *, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.16 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1q_u8 (uint8_t *, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.8 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1q_s32 (int32_t *, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.32 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1q_s16 (int16_t *, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.16 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1q_s8 (int8_t *, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.8 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1q_u64 (uint64_t *, uint64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1q_s64 (int64_t *, int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1q_f32 (float32_t *, float32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.32 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1q_p16 (poly16_t *, poly16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.16 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1q_p8 (poly8_t *, poly8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.8 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1_lane_u32 (uint32_t *, uint32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst1.32 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1_lane_u16 (uint16_t *, uint16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst1.16 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1_lane_u8 (uint8_t *, uint8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst1.8 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1_lane_s32 (int32_t *, int32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst1.32 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1_lane_s16 (int16_t *, int16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst1.16 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1_lane_s8 (int8_t *, int8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst1.8 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1_lane_f32 (float32_t *, float32x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst1.32 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1_lane_p16 (poly16_t *, poly16x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst1.16 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1_lane_p8 (poly8_t *, poly8x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst1.8 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1_lane_s64 (int64_t *, int64x1_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1_lane_u64 (uint64_t *, uint64x1_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1q_lane_u32 (uint32_t *, uint32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst1.32 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1q_lane_u16 (uint16_t *, uint16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst1.16 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1q_lane_u8 (uint8_t *, uint8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst1.8 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1q_lane_s32 (int32_t *, int32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst1.32 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1q_lane_s16 (int16_t *, int16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst1.16 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1q_lane_s8 (int8_t *, int8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst1.8 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1q_lane_f32 (float32_t *, float32x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst1.32 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1q_lane_p16 (poly16_t *, poly16x8_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst1.16 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1q_lane_p8 (poly8_t *, poly8x16_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst1.8 @{@var{d0}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1q_lane_s64 (int64_t *, int64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst1q_lane_u64 (uint64_t *, uint64x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}@}, [@var{r0}]}
+@end itemize
+
+
+
+
+@subsubsection Element/structure loads, VLD2 variants
+
+@itemize @bullet
+@item uint32x2x2_t vld2_u32 (const uint32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.32 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4x2_t vld2_u16 (const uint16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.16 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8x2_t vld2_u8 (const uint8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.8 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2x2_t vld2_s32 (const int32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.32 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4x2_t vld2_s16 (const int16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.16 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8x2_t vld2_s8 (const int8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.8 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2x2_t vld2_f32 (const float32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.32 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4x2_t vld2_p16 (const poly16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.16 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8x2_t vld2_p8 (const poly8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.8 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1x2_t vld2_u64 (const uint64_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1x2_t vld2_s64 (const int64_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4x2_t vld2q_u32 (const uint32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.32 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8x2_t vld2q_u16 (const uint16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.16 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16x2_t vld2q_u8 (const uint8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.8 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4x2_t vld2q_s32 (const int32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.32 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8x2_t vld2q_s16 (const int16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.16 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16x2_t vld2q_s8 (const int8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.8 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4x2_t vld2q_f32 (const float32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.32 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8x2_t vld2q_p16 (const poly16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.16 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16x2_t vld2q_p8 (const poly8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.8 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2x2_t vld2_lane_u32 (const uint32_t *, uint32x2x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld2.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4x2_t vld2_lane_u16 (const uint16_t *, uint16x4x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld2.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8x2_t vld2_lane_u8 (const uint8_t *, uint8x8x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld2.8 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2x2_t vld2_lane_s32 (const int32_t *, int32x2x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld2.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4x2_t vld2_lane_s16 (const int16_t *, int16x4x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld2.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8x2_t vld2_lane_s8 (const int8_t *, int8x8x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld2.8 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2x2_t vld2_lane_f32 (const float32_t *, float32x2x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld2.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4x2_t vld2_lane_p16 (const poly16_t *, poly16x4x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld2.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8x2_t vld2_lane_p8 (const poly8_t *, poly8x8x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld2.8 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4x2_t vld2q_lane_s32 (const int32_t *, int32x4x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld2.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8x2_t vld2q_lane_s16 (const int16_t *, int16x8x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld2.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4x2_t vld2q_lane_u32 (const uint32_t *, uint32x4x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld2.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8x2_t vld2q_lane_u16 (const uint16_t *, uint16x8x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld2.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4x2_t vld2q_lane_f32 (const float32_t *, float32x4x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld2.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8x2_t vld2q_lane_p16 (const poly16_t *, poly16x8x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld2.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2x2_t vld2_dup_u32 (const uint32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.32 @{@var{d0}[], @var{d1}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4x2_t vld2_dup_u16 (const uint16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.16 @{@var{d0}[], @var{d1}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8x2_t vld2_dup_u8 (const uint8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.8 @{@var{d0}[], @var{d1}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2x2_t vld2_dup_s32 (const int32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.32 @{@var{d0}[], @var{d1}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4x2_t vld2_dup_s16 (const int16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.16 @{@var{d0}[], @var{d1}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8x2_t vld2_dup_s8 (const int8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.8 @{@var{d0}[], @var{d1}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2x2_t vld2_dup_f32 (const float32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.32 @{@var{d0}[], @var{d1}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4x2_t vld2_dup_p16 (const poly16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.16 @{@var{d0}[], @var{d1}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8x2_t vld2_dup_p8 (const poly8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld2.8 @{@var{d0}[], @var{d1}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1x2_t vld2_dup_u64 (const uint64_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1x2_t vld2_dup_s64 (const int64_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+
+
+@subsubsection Element/structure stores, VST2 variants
+
+@itemize @bullet
+@item void vst2_u32 (uint32_t *, uint32x2x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst2.32 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2_u16 (uint16_t *, uint16x4x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst2.16 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2_u8 (uint8_t *, uint8x8x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst2.8 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2_s32 (int32_t *, int32x2x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst2.32 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2_s16 (int16_t *, int16x4x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst2.16 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2_s8 (int8_t *, int8x8x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst2.8 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2_f32 (float32_t *, float32x2x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst2.32 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2_p16 (poly16_t *, poly16x4x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst2.16 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2_p8 (poly8_t *, poly8x8x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst2.8 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2_u64 (uint64_t *, uint64x1x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2_s64 (int64_t *, int64x1x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2q_u32 (uint32_t *, uint32x4x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst2.32 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2q_u16 (uint16_t *, uint16x8x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst2.16 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2q_u8 (uint8_t *, uint8x16x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst2.8 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2q_s32 (int32_t *, int32x4x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst2.32 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2q_s16 (int16_t *, int16x8x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst2.16 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2q_s8 (int8_t *, int8x16x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst2.8 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2q_f32 (float32_t *, float32x4x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst2.32 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2q_p16 (poly16_t *, poly16x8x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst2.16 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2q_p8 (poly8_t *, poly8x16x2_t)
+@*@emph{Form of expected instruction(s):} @code{vst2.8 @{@var{d0}, @var{d1}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2_lane_u32 (uint32_t *, uint32x2x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst2.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2_lane_u16 (uint16_t *, uint16x4x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst2.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2_lane_u8 (uint8_t *, uint8x8x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst2.8 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2_lane_s32 (int32_t *, int32x2x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst2.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2_lane_s16 (int16_t *, int16x4x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst2.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2_lane_s8 (int8_t *, int8x8x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst2.8 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2_lane_f32 (float32_t *, float32x2x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst2.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2_lane_p16 (poly16_t *, poly16x4x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst2.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2_lane_p8 (poly8_t *, poly8x8x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst2.8 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2q_lane_s32 (int32_t *, int32x4x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst2.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2q_lane_s16 (int16_t *, int16x8x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst2.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2q_lane_u32 (uint32_t *, uint32x4x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst2.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2q_lane_u16 (uint16_t *, uint16x8x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst2.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2q_lane_f32 (float32_t *, float32x4x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst2.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst2q_lane_p16 (poly16_t *, poly16x8x2_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst2.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+
+
+@subsubsection Element/structure loads, VLD3 variants
+
+@itemize @bullet
+@item uint32x2x3_t vld3_u32 (const uint32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.32 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4x3_t vld3_u16 (const uint16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.16 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8x3_t vld3_u8 (const uint8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.8 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2x3_t vld3_s32 (const int32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.32 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4x3_t vld3_s16 (const int16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.16 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8x3_t vld3_s8 (const int8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.8 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2x3_t vld3_f32 (const float32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.32 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4x3_t vld3_p16 (const poly16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.16 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8x3_t vld3_p8 (const poly8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.8 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1x3_t vld3_u64 (const uint64_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1x3_t vld3_s64 (const int64_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4x3_t vld3q_u32 (const uint32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.32 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8x3_t vld3q_u16 (const uint16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.16 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16x3_t vld3q_u8 (const uint8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.8 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4x3_t vld3q_s32 (const int32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.32 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8x3_t vld3q_s16 (const int16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.16 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16x3_t vld3q_s8 (const int8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.8 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4x3_t vld3q_f32 (const float32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.32 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8x3_t vld3q_p16 (const poly16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.16 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16x3_t vld3q_p8 (const poly8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.8 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2x3_t vld3_lane_u32 (const uint32_t *, uint32x2x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld3.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4x3_t vld3_lane_u16 (const uint16_t *, uint16x4x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld3.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8x3_t vld3_lane_u8 (const uint8_t *, uint8x8x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld3.8 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2x3_t vld3_lane_s32 (const int32_t *, int32x2x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld3.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4x3_t vld3_lane_s16 (const int16_t *, int16x4x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld3.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8x3_t vld3_lane_s8 (const int8_t *, int8x8x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld3.8 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2x3_t vld3_lane_f32 (const float32_t *, float32x2x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld3.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4x3_t vld3_lane_p16 (const poly16_t *, poly16x4x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld3.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8x3_t vld3_lane_p8 (const poly8_t *, poly8x8x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld3.8 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4x3_t vld3q_lane_s32 (const int32_t *, int32x4x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld3.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8x3_t vld3q_lane_s16 (const int16_t *, int16x8x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld3.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4x3_t vld3q_lane_u32 (const uint32_t *, uint32x4x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld3.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8x3_t vld3q_lane_u16 (const uint16_t *, uint16x8x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld3.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4x3_t vld3q_lane_f32 (const float32_t *, float32x4x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld3.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8x3_t vld3q_lane_p16 (const poly16_t *, poly16x8x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld3.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2x3_t vld3_dup_u32 (const uint32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.32 @{@var{d0}[], @var{d1}[], @var{d2}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4x3_t vld3_dup_u16 (const uint16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.16 @{@var{d0}[], @var{d1}[], @var{d2}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8x3_t vld3_dup_u8 (const uint8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.8 @{@var{d0}[], @var{d1}[], @var{d2}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2x3_t vld3_dup_s32 (const int32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.32 @{@var{d0}[], @var{d1}[], @var{d2}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4x3_t vld3_dup_s16 (const int16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.16 @{@var{d0}[], @var{d1}[], @var{d2}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8x3_t vld3_dup_s8 (const int8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.8 @{@var{d0}[], @var{d1}[], @var{d2}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2x3_t vld3_dup_f32 (const float32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.32 @{@var{d0}[], @var{d1}[], @var{d2}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4x3_t vld3_dup_p16 (const poly16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.16 @{@var{d0}[], @var{d1}[], @var{d2}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8x3_t vld3_dup_p8 (const poly8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld3.8 @{@var{d0}[], @var{d1}[], @var{d2}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1x3_t vld3_dup_u64 (const uint64_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1x3_t vld3_dup_s64 (const int64_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+
+
+@subsubsection Element/structure stores, VST3 variants
+
+@itemize @bullet
+@item void vst3_u32 (uint32_t *, uint32x2x3_t)
+@*@emph{Form of expected instruction(s):} @code{vst3.32 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3_u16 (uint16_t *, uint16x4x3_t)
+@*@emph{Form of expected instruction(s):} @code{vst3.16 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3_u8 (uint8_t *, uint8x8x3_t)
+@*@emph{Form of expected instruction(s):} @code{vst3.8 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3_s32 (int32_t *, int32x2x3_t)
+@*@emph{Form of expected instruction(s):} @code{vst3.32 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3_s16 (int16_t *, int16x4x3_t)
+@*@emph{Form of expected instruction(s):} @code{vst3.16 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3_s8 (int8_t *, int8x8x3_t)
+@*@emph{Form of expected instruction(s):} @code{vst3.8 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3_f32 (float32_t *, float32x2x3_t)
+@*@emph{Form of expected instruction(s):} @code{vst3.32 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3_p16 (poly16_t *, poly16x4x3_t)
+@*@emph{Form of expected instruction(s):} @code{vst3.16 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3_p8 (poly8_t *, poly8x8x3_t)
+@*@emph{Form of expected instruction(s):} @code{vst3.8 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3_u64 (uint64_t *, uint64x1x3_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3_s64 (int64_t *, int64x1x3_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3q_u32 (uint32_t *, uint32x4x3_t)
+@*@emph{Form of expected instruction(s):} @code{vst3.32 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3q_u16 (uint16_t *, uint16x8x3_t)
+@*@emph{Form of expected instruction(s):} @code{vst3.16 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3q_u8 (uint8_t *, uint8x16x3_t)
+@*@emph{Form of expected instruction(s):} @code{vst3.8 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3q_s32 (int32_t *, int32x4x3_t)
+@*@emph{Form of expected instruction(s):} @code{vst3.32 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3q_s16 (int16_t *, int16x8x3_t)
+@*@emph{Form of expected instruction(s):} @code{vst3.16 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3q_s8 (int8_t *, int8x16x3_t)
+@*@emph{Form of expected instruction(s):} @code{vst3.8 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3q_f32 (float32_t *, float32x4x3_t)
+@*@emph{Form of expected instruction(s):} @code{vst3.32 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3q_p16 (poly16_t *, poly16x8x3_t)
+@*@emph{Form of expected instruction(s):} @code{vst3.16 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3q_p8 (poly8_t *, poly8x16x3_t)
+@*@emph{Form of expected instruction(s):} @code{vst3.8 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3_lane_u32 (uint32_t *, uint32x2x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst3.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3_lane_u16 (uint16_t *, uint16x4x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst3.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3_lane_u8 (uint8_t *, uint8x8x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst3.8 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3_lane_s32 (int32_t *, int32x2x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst3.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3_lane_s16 (int16_t *, int16x4x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst3.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3_lane_s8 (int8_t *, int8x8x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst3.8 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3_lane_f32 (float32_t *, float32x2x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst3.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3_lane_p16 (poly16_t *, poly16x4x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst3.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3_lane_p8 (poly8_t *, poly8x8x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst3.8 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3q_lane_s32 (int32_t *, int32x4x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst3.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3q_lane_s16 (int16_t *, int16x8x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst3.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3q_lane_u32 (uint32_t *, uint32x4x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst3.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3q_lane_u16 (uint16_t *, uint16x8x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst3.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3q_lane_f32 (float32_t *, float32x4x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst3.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst3q_lane_p16 (poly16_t *, poly16x8x3_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst3.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+
+
+@subsubsection Element/structure loads, VLD4 variants
+
+@itemize @bullet
+@item uint32x2x4_t vld4_u32 (const uint32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.32 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4x4_t vld4_u16 (const uint16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.16 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8x4_t vld4_u8 (const uint8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.8 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2x4_t vld4_s32 (const int32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.32 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4x4_t vld4_s16 (const int16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.16 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8x4_t vld4_s8 (const int8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.8 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2x4_t vld4_f32 (const float32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.32 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4x4_t vld4_p16 (const poly16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.16 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8x4_t vld4_p8 (const poly8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.8 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1x4_t vld4_u64 (const uint64_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1x4_t vld4_s64 (const int64_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4x4_t vld4q_u32 (const uint32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.32 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8x4_t vld4q_u16 (const uint16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.16 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16x4_t vld4q_u8 (const uint8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.8 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4x4_t vld4q_s32 (const int32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.32 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8x4_t vld4q_s16 (const int16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.16 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16x4_t vld4q_s8 (const int8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.8 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4x4_t vld4q_f32 (const float32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.32 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8x4_t vld4q_p16 (const poly16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.16 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16x4_t vld4q_p8 (const poly8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.8 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2x4_t vld4_lane_u32 (const uint32_t *, uint32x2x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld4.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4x4_t vld4_lane_u16 (const uint16_t *, uint16x4x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld4.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8x4_t vld4_lane_u8 (const uint8_t *, uint8x8x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld4.8 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2x4_t vld4_lane_s32 (const int32_t *, int32x2x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld4.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4x4_t vld4_lane_s16 (const int16_t *, int16x4x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld4.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8x4_t vld4_lane_s8 (const int8_t *, int8x8x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld4.8 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2x4_t vld4_lane_f32 (const float32_t *, float32x2x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld4.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4x4_t vld4_lane_p16 (const poly16_t *, poly16x4x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld4.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8x4_t vld4_lane_p8 (const poly8_t *, poly8x8x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld4.8 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4x4_t vld4q_lane_s32 (const int32_t *, int32x4x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld4.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8x4_t vld4q_lane_s16 (const int16_t *, int16x8x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld4.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4x4_t vld4q_lane_u32 (const uint32_t *, uint32x4x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld4.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8x4_t vld4q_lane_u16 (const uint16_t *, uint16x8x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld4.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x4x4_t vld4q_lane_f32 (const float32_t *, float32x4x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld4.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8x4_t vld4q_lane_p16 (const poly16_t *, poly16x8x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vld4.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2x4_t vld4_dup_u32 (const uint32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.32 @{@var{d0}[], @var{d1}[], @var{d2}[], @var{d3}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4x4_t vld4_dup_u16 (const uint16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.16 @{@var{d0}[], @var{d1}[], @var{d2}[], @var{d3}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8x4_t vld4_dup_u8 (const uint8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.8 @{@var{d0}[], @var{d1}[], @var{d2}[], @var{d3}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2x4_t vld4_dup_s32 (const int32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.32 @{@var{d0}[], @var{d1}[], @var{d2}[], @var{d3}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4x4_t vld4_dup_s16 (const int16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.16 @{@var{d0}[], @var{d1}[], @var{d2}[], @var{d3}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8x4_t vld4_dup_s8 (const int8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.8 @{@var{d0}[], @var{d1}[], @var{d2}[], @var{d3}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item float32x2x4_t vld4_dup_f32 (const float32_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.32 @{@var{d0}[], @var{d1}[], @var{d2}[], @var{d3}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4x4_t vld4_dup_p16 (const poly16_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.16 @{@var{d0}[], @var{d1}[], @var{d2}[], @var{d3}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8x4_t vld4_dup_p8 (const poly8_t *)
+@*@emph{Form of expected instruction(s):} @code{vld4.8 @{@var{d0}[], @var{d1}[], @var{d2}[], @var{d3}[]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1x4_t vld4_dup_u64 (const uint64_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item int64x1x4_t vld4_dup_s64 (const int64_t *)
+@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+
+
+@subsubsection Element/structure stores, VST4 variants
+
+@itemize @bullet
+@item void vst4_u32 (uint32_t *, uint32x2x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst4.32 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4_u16 (uint16_t *, uint16x4x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst4.16 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4_u8 (uint8_t *, uint8x8x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst4.8 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4_s32 (int32_t *, int32x2x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst4.32 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4_s16 (int16_t *, int16x4x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst4.16 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4_s8 (int8_t *, int8x8x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst4.8 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4_f32 (float32_t *, float32x2x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst4.32 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4_p16 (poly16_t *, poly16x4x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst4.16 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4_p8 (poly8_t *, poly8x8x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst4.8 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4_u64 (uint64_t *, uint64x1x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4_s64 (int64_t *, int64x1x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4q_u32 (uint32_t *, uint32x4x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst4.32 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4q_u16 (uint16_t *, uint16x8x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst4.16 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4q_u8 (uint8_t *, uint8x16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst4.8 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4q_s32 (int32_t *, int32x4x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst4.32 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4q_s16 (int16_t *, int16x8x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst4.16 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4q_s8 (int8_t *, int8x16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst4.8 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4q_f32 (float32_t *, float32x4x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst4.32 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4q_p16 (poly16_t *, poly16x8x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst4.16 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4q_p8 (poly8_t *, poly8x16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vst4.8 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4_lane_u32 (uint32_t *, uint32x2x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst4.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4_lane_u16 (uint16_t *, uint16x4x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst4.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4_lane_u8 (uint8_t *, uint8x8x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst4.8 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4_lane_s32 (int32_t *, int32x2x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst4.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4_lane_s16 (int16_t *, int16x4x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst4.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4_lane_s8 (int8_t *, int8x8x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst4.8 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4_lane_f32 (float32_t *, float32x2x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst4.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4_lane_p16 (poly16_t *, poly16x4x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst4.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4_lane_p8 (poly8_t *, poly8x8x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst4.8 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4q_lane_s32 (int32_t *, int32x4x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst4.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4q_lane_s16 (int16_t *, int16x8x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst4.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4q_lane_u32 (uint32_t *, uint32x4x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst4.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4q_lane_u16 (uint16_t *, uint16x8x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst4.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4q_lane_f32 (float32_t *, float32x4x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst4.32 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+@itemize @bullet
+@item void vst4q_lane_p16 (poly16_t *, poly16x8x4_t, const int)
+@*@emph{Form of expected instruction(s):} @code{vst4.16 @{@var{d0}[@var{0}], @var{d1}[@var{0}], @var{d2}[@var{0}], @var{d3}[@var{0}]@}, [@var{r0}]}
+@end itemize
+
+
+
+
+@subsubsection Logical operations (AND)
+
+@itemize @bullet
+@item uint32x2_t vand_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vand @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vand_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vand @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vand_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vand @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vand_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vand @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vand_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vand @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vand_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vand @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vand_u64 (uint64x1_t, uint64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vand_s64 (int64x1_t, int64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vandq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vand @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vandq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vand @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vandq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vand @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vandq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vand @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vandq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vand @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vandq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vand @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vandq_u64 (uint64x2_t, uint64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vand @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vandq_s64 (int64x2_t, int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vand @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Logical operations (OR)
+
+@itemize @bullet
+@item uint32x2_t vorr_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vorr @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vorr_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vorr @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vorr_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vorr @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vorr_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vorr @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vorr_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vorr @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vorr_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vorr @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vorr_u64 (uint64x1_t, uint64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vorr_s64 (int64x1_t, int64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vorrq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vorr @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vorrq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vorr @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vorrq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vorr @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vorrq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vorr @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vorrq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vorr @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vorrq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vorr @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vorrq_u64 (uint64x2_t, uint64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vorr @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vorrq_s64 (int64x2_t, int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vorr @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Logical operations (exclusive OR)
+
+@itemize @bullet
+@item uint32x2_t veor_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{veor @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t veor_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{veor @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t veor_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{veor @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t veor_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{veor @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t veor_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{veor @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t veor_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{veor @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t veor_u64 (uint64x1_t, uint64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t veor_s64 (int64x1_t, int64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t veorq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{veor @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t veorq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{veor @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t veorq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{veor @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t veorq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{veor @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t veorq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{veor @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t veorq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{veor @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t veorq_u64 (uint64x2_t, uint64x2_t)
+@*@emph{Form of expected instruction(s):} @code{veor @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t veorq_s64 (int64x2_t, int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{veor @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Logical operations (AND-NOT)
+
+@itemize @bullet
+@item uint32x2_t vbic_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vbic @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vbic_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vbic @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vbic_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vbic @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vbic_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vbic @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vbic_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vbic @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vbic_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vbic @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vbic_u64 (uint64x1_t, uint64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vbic_s64 (int64x1_t, int64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vbicq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vbic @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vbicq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vbic @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vbicq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vbic @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vbicq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vbic @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vbicq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vbic @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vbicq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vbic @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vbicq_u64 (uint64x2_t, uint64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vbic @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vbicq_s64 (int64x2_t, int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vbic @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Logical operations (OR-NOT)
+
+@itemize @bullet
+@item uint32x2_t vorn_u32 (uint32x2_t, uint32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vorn @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vorn_u16 (uint16x4_t, uint16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vorn @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vorn_u8 (uint8x8_t, uint8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vorn @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vorn_s32 (int32x2_t, int32x2_t)
+@*@emph{Form of expected instruction(s):} @code{vorn @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vorn_s16 (int16x4_t, int16x4_t)
+@*@emph{Form of expected instruction(s):} @code{vorn @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vorn_s8 (int8x8_t, int8x8_t)
+@*@emph{Form of expected instruction(s):} @code{vorn @var{d0}, @var{d0}, @var{d0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vorn_u64 (uint64x1_t, uint64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vorn_s64 (int64x1_t, int64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vornq_u32 (uint32x4_t, uint32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vorn @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vornq_u16 (uint16x8_t, uint16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vorn @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vornq_u8 (uint8x16_t, uint8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vorn @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vornq_s32 (int32x4_t, int32x4_t)
+@*@emph{Form of expected instruction(s):} @code{vorn @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vornq_s16 (int16x8_t, int16x8_t)
+@*@emph{Form of expected instruction(s):} @code{vorn @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vornq_s8 (int8x16_t, int8x16_t)
+@*@emph{Form of expected instruction(s):} @code{vorn @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vornq_u64 (uint64x2_t, uint64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vorn @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vornq_s64 (int64x2_t, int64x2_t)
+@*@emph{Form of expected instruction(s):} @code{vorn @var{q0}, @var{q0}, @var{q0}}
+@end itemize
+
+
+
+
+@subsubsection Reinterpret casts
+
+@itemize @bullet
+@item poly8x8_t vreinterpret_p8_u32 (uint32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vreinterpret_p8_u16 (uint16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vreinterpret_p8_u8 (uint8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vreinterpret_p8_s32 (int32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vreinterpret_p8_s16 (int16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vreinterpret_p8_s8 (int8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vreinterpret_p8_u64 (uint64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vreinterpret_p8_s64 (int64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vreinterpret_p8_f32 (float32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly8x8_t vreinterpret_p8_p16 (poly16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vreinterpretq_p8_u32 (uint32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vreinterpretq_p8_u16 (uint16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vreinterpretq_p8_u8 (uint8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vreinterpretq_p8_s32 (int32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vreinterpretq_p8_s16 (int16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vreinterpretq_p8_s8 (int8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vreinterpretq_p8_u64 (uint64x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vreinterpretq_p8_s64 (int64x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vreinterpretq_p8_f32 (float32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly8x16_t vreinterpretq_p8_p16 (poly16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vreinterpret_p16_u32 (uint32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vreinterpret_p16_u16 (uint16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vreinterpret_p16_u8 (uint8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vreinterpret_p16_s32 (int32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vreinterpret_p16_s16 (int16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vreinterpret_p16_s8 (int8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vreinterpret_p16_u64 (uint64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vreinterpret_p16_s64 (int64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vreinterpret_p16_f32 (float32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly16x4_t vreinterpret_p16_p8 (poly8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vreinterpretq_p16_u32 (uint32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vreinterpretq_p16_u16 (uint16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vreinterpretq_p16_u8 (uint8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vreinterpretq_p16_s32 (int32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vreinterpretq_p16_s16 (int16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vreinterpretq_p16_s8 (int8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vreinterpretq_p16_u64 (uint64x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vreinterpretq_p16_s64 (int64x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vreinterpretq_p16_f32 (float32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item poly16x8_t vreinterpretq_p16_p8 (poly8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vreinterpret_f32_u32 (uint32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vreinterpret_f32_u16 (uint16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vreinterpret_f32_u8 (uint8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vreinterpret_f32_s32 (int32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vreinterpret_f32_s16 (int16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vreinterpret_f32_s8 (int8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vreinterpret_f32_u64 (uint64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vreinterpret_f32_s64 (int64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vreinterpret_f32_p16 (poly16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item float32x2_t vreinterpret_f32_p8 (poly8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vreinterpretq_f32_u32 (uint32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vreinterpretq_f32_u16 (uint16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vreinterpretq_f32_u8 (uint8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vreinterpretq_f32_s32 (int32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vreinterpretq_f32_s16 (int16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vreinterpretq_f32_s8 (int8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vreinterpretq_f32_u64 (uint64x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vreinterpretq_f32_s64 (int64x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vreinterpretq_f32_p16 (poly16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item float32x4_t vreinterpretq_f32_p8 (poly8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vreinterpret_s64_u32 (uint32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vreinterpret_s64_u16 (uint16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vreinterpret_s64_u8 (uint8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vreinterpret_s64_s32 (int32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vreinterpret_s64_s16 (int16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vreinterpret_s64_s8 (int8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vreinterpret_s64_u64 (uint64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vreinterpret_s64_f32 (float32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vreinterpret_s64_p16 (poly16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x1_t vreinterpret_s64_p8 (poly8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vreinterpretq_s64_u32 (uint32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vreinterpretq_s64_u16 (uint16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vreinterpretq_s64_u8 (uint8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vreinterpretq_s64_s32 (int32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vreinterpretq_s64_s16 (int16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vreinterpretq_s64_s8 (int8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vreinterpretq_s64_u64 (uint64x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vreinterpretq_s64_f32 (float32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vreinterpretq_s64_p16 (poly16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int64x2_t vreinterpretq_s64_p8 (poly8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vreinterpret_u64_u32 (uint32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vreinterpret_u64_u16 (uint16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vreinterpret_u64_u8 (uint8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vreinterpret_u64_s32 (int32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vreinterpret_u64_s16 (int16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vreinterpret_u64_s8 (int8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vreinterpret_u64_s64 (int64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vreinterpret_u64_f32 (float32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vreinterpret_u64_p16 (poly16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint64x1_t vreinterpret_u64_p8 (poly8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vreinterpretq_u64_u32 (uint32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vreinterpretq_u64_u16 (uint16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vreinterpretq_u64_u8 (uint8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vreinterpretq_u64_s32 (int32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vreinterpretq_u64_s16 (int16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vreinterpretq_u64_s8 (int8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vreinterpretq_u64_s64 (int64x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vreinterpretq_u64_f32 (float32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vreinterpretq_u64_p16 (poly16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint64x2_t vreinterpretq_u64_p8 (poly8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vreinterpret_s8_u32 (uint32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vreinterpret_s8_u16 (uint16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vreinterpret_s8_u8 (uint8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vreinterpret_s8_s32 (int32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vreinterpret_s8_s16 (int16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vreinterpret_s8_u64 (uint64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vreinterpret_s8_s64 (int64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vreinterpret_s8_f32 (float32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vreinterpret_s8_p16 (poly16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int8x8_t vreinterpret_s8_p8 (poly8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vreinterpretq_s8_u32 (uint32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vreinterpretq_s8_u16 (uint16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vreinterpretq_s8_u8 (uint8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vreinterpretq_s8_s32 (int32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vreinterpretq_s8_s16 (int16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vreinterpretq_s8_u64 (uint64x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vreinterpretq_s8_s64 (int64x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vreinterpretq_s8_f32 (float32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vreinterpretq_s8_p16 (poly16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int8x16_t vreinterpretq_s8_p8 (poly8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vreinterpret_s16_u32 (uint32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vreinterpret_s16_u16 (uint16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vreinterpret_s16_u8 (uint8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vreinterpret_s16_s32 (int32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vreinterpret_s16_s8 (int8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vreinterpret_s16_u64 (uint64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vreinterpret_s16_s64 (int64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vreinterpret_s16_f32 (float32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vreinterpret_s16_p16 (poly16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int16x4_t vreinterpret_s16_p8 (poly8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vreinterpretq_s16_u32 (uint32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vreinterpretq_s16_u16 (uint16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vreinterpretq_s16_u8 (uint8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vreinterpretq_s16_s32 (int32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vreinterpretq_s16_s8 (int8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vreinterpretq_s16_u64 (uint64x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vreinterpretq_s16_s64 (int64x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vreinterpretq_s16_f32 (float32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vreinterpretq_s16_p16 (poly16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int16x8_t vreinterpretq_s16_p8 (poly8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vreinterpret_s32_u32 (uint32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vreinterpret_s32_u16 (uint16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vreinterpret_s32_u8 (uint8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vreinterpret_s32_s16 (int16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vreinterpret_s32_s8 (int8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vreinterpret_s32_u64 (uint64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vreinterpret_s32_s64 (int64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vreinterpret_s32_f32 (float32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vreinterpret_s32_p16 (poly16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int32x2_t vreinterpret_s32_p8 (poly8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vreinterpretq_s32_u32 (uint32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vreinterpretq_s32_u16 (uint16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vreinterpretq_s32_u8 (uint8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vreinterpretq_s32_s16 (int16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vreinterpretq_s32_s8 (int8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vreinterpretq_s32_u64 (uint64x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vreinterpretq_s32_s64 (int64x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vreinterpretq_s32_f32 (float32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vreinterpretq_s32_p16 (poly16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item int32x4_t vreinterpretq_s32_p8 (poly8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vreinterpret_u8_u32 (uint32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vreinterpret_u8_u16 (uint16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vreinterpret_u8_s32 (int32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vreinterpret_u8_s16 (int16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vreinterpret_u8_s8 (int8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vreinterpret_u8_u64 (uint64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vreinterpret_u8_s64 (int64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vreinterpret_u8_f32 (float32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vreinterpret_u8_p16 (poly16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint8x8_t vreinterpret_u8_p8 (poly8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vreinterpretq_u8_u32 (uint32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vreinterpretq_u8_u16 (uint16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vreinterpretq_u8_s32 (int32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vreinterpretq_u8_s16 (int16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vreinterpretq_u8_s8 (int8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vreinterpretq_u8_u64 (uint64x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vreinterpretq_u8_s64 (int64x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vreinterpretq_u8_f32 (float32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vreinterpretq_u8_p16 (poly16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint8x16_t vreinterpretq_u8_p8 (poly8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vreinterpret_u16_u32 (uint32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vreinterpret_u16_u8 (uint8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vreinterpret_u16_s32 (int32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vreinterpret_u16_s16 (int16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vreinterpret_u16_s8 (int8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vreinterpret_u16_u64 (uint64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vreinterpret_u16_s64 (int64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vreinterpret_u16_f32 (float32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vreinterpret_u16_p16 (poly16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint16x4_t vreinterpret_u16_p8 (poly8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vreinterpretq_u16_u32 (uint32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vreinterpretq_u16_u8 (uint8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vreinterpretq_u16_s32 (int32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vreinterpretq_u16_s16 (int16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vreinterpretq_u16_s8 (int8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vreinterpretq_u16_u64 (uint64x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vreinterpretq_u16_s64 (int64x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vreinterpretq_u16_f32 (float32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vreinterpretq_u16_p16 (poly16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint16x8_t vreinterpretq_u16_p8 (poly8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vreinterpret_u32_u16 (uint16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vreinterpret_u32_u8 (uint8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vreinterpret_u32_s32 (int32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vreinterpret_u32_s16 (int16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vreinterpret_u32_s8 (int8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vreinterpret_u32_u64 (uint64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vreinterpret_u32_s64 (int64x1_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vreinterpret_u32_f32 (float32x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vreinterpret_u32_p16 (poly16x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x2_t vreinterpret_u32_p8 (poly8x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vreinterpretq_u32_u16 (uint16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vreinterpretq_u32_u8 (uint8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vreinterpretq_u32_s32 (int32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vreinterpretq_u32_s16 (int16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vreinterpretq_u32_s8 (int8x16_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vreinterpretq_u32_u64 (uint64x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vreinterpretq_u32_s64 (int64x2_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vreinterpretq_u32_f32 (float32x4_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vreinterpretq_u32_p16 (poly16x8_t)
+@end itemize
+
+
+@itemize @bullet
+@item uint32x4_t vreinterpretq_u32_p8 (poly8x16_t)
+@end itemize
+
+
+
+
diff --git a/gcc/doc/bugreport.texi b/gcc/doc/bugreport.texi
new file mode 100644
index 000000000..536f934b0
--- /dev/null
+++ b/gcc/doc/bugreport.texi
@@ -0,0 +1,91 @@
+@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+@c 1999, 2000, 2001, 2003, 2004, 2007 Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Bugs
+@chapter Reporting Bugs
+@cindex bugs
+@cindex reporting bugs
+
+Your bug reports play an essential role in making GCC reliable.
+
+When you encounter a problem, the first thing to do is to see if it is
+already known.  @xref{Trouble}.  If it isn't known, then you should
+report the problem.
+
+@menu
+* Criteria:  Bug Criteria.   Have you really found a bug?
+* Reporting: Bug Reporting.  How to report a bug effectively.
+* Known: Trouble.            Known problems.
+* Help: Service.             Where to ask for help.
+@end menu
+
+@node Bug Criteria,Bug Reporting,,Bugs
+@section Have You Found a Bug?
+@cindex bug criteria
+
+If you are not sure whether you have found a bug, here are some guidelines:
+
+@itemize @bullet
+@cindex fatal signal
+@cindex core dump
+@item
+If the compiler gets a fatal signal, for any input whatever, that is a
+compiler bug.  Reliable compilers never crash.
+
+@cindex invalid assembly code
+@cindex assembly code, invalid
+@item
+If the compiler produces invalid assembly code, for any input whatever
+(except an @code{asm} statement), that is a compiler bug, unless the
+compiler reports errors (not just warnings) which would ordinarily
+prevent the assembler from being run.
+
+@cindex undefined behavior
+@cindex undefined function value
+@cindex increment operators
+@item
+If the compiler produces valid assembly code that does not correctly
+execute the input source code, that is a compiler bug.
+
+However, you must double-check to make sure, because you may have a
+program whose behavior is undefined, which happened by chance to give
+the desired results with another C or C++ compiler.
+
+For example, in many nonoptimizing compilers, you can write @samp{x;}
+at the end of a function instead of @samp{return x;}, with the same
+results.  But the value of the function is undefined if @code{return}
+is omitted; it is not a bug when GCC produces different results.
+
+Problems often result from expressions with two increment operators,
+as in @code{f (*p++, *p++)}.  Your previous compiler might have
+interpreted that expression the way you intended; GCC might
+interpret it another way.  Neither compiler is wrong.  The bug is
+in your code.
+
+After you have localized the error to a single source line, it should
+be easy to check for these things.  If your program is correct and
+well defined, you have found a compiler bug.
+
+@item
+If the compiler produces an error message for valid input, that is a
+compiler bug.
+
+@cindex invalid input
+@item
+If the compiler does not produce an error message for invalid input,
+that is a compiler bug.  However, you should note that your idea of
+``invalid input'' might be someone else's idea of ``an extension'' or
+``support for traditional practice''.
+
+@item
+If you are an experienced user of one of the languages GCC supports, your
+suggestions for improvement of GCC are welcome in any case.
+@end itemize
+
+@node Bug Reporting,,Bug Criteria,Bugs
+@section How and where to Report Bugs
+@cindex compiler bugs, reporting
+
+Bugs should be reported to the bug database at @value{BUGURL}.
diff --git a/gcc/doc/cfg.texi b/gcc/doc/cfg.texi
new file mode 100644
index 000000000..7f9364832
--- /dev/null
+++ b/gcc/doc/cfg.texi
@@ -0,0 +1,659 @@
+@c -*-texinfo-*-
+@c Copyright (C) 2001, 2003, 2004, 2005, 2006, 2007, 2008 Free Software
+@c Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@c ---------------------------------------------------------------------
+@c Control Flow Graph
+@c ---------------------------------------------------------------------
+
+@node Control Flow
+@chapter Control Flow Graph
+@cindex CFG, Control Flow Graph
+@findex basic-block.h
+
+A control flow graph (CFG) is a data structure built on top of the
+intermediate code representation (the RTL or @code{tree} instruction
+stream) abstracting the control flow behavior of a function that is
+being compiled.  The CFG is a directed graph where the vertices
+represent basic blocks and edges represent possible transfer of
+control flow from one basic block to another.  The data structures
+used to represent the control flow graph are defined in
+@file{basic-block.h}.
+
+@menu
+* Basic Blocks::           The definition and representation of basic blocks.
+* Edges::                  Types of edges and their representation.
+* Profile information::    Representation of frequencies and probabilities.
+* Maintaining the CFG::    Keeping the control flow graph and up to date.
+* Liveness information::   Using and maintaining liveness information.
+@end menu
+
+
+@node Basic Blocks
+@section Basic Blocks
+
+@cindex basic block
+@findex basic_block
+A basic block is a straight-line sequence of code with only one entry
+point and only one exit.  In GCC, basic blocks are represented using
+the @code{basic_block} data type.
+
+@findex next_bb, prev_bb, FOR_EACH_BB
+Two pointer members of the @code{basic_block} structure are the
+pointers @code{next_bb} and @code{prev_bb}.  These are used to keep
+doubly linked chain of basic blocks in the same order as the
+underlying instruction stream.  The chain of basic blocks is updated
+transparently by the provided API for manipulating the CFG@.  The macro
+@code{FOR_EACH_BB} can be used to visit all the basic blocks in
+lexicographical order.  Dominator traversals are also possible using
+@code{walk_dominator_tree}.  Given two basic blocks A and B, block A
+dominates block B if A is @emph{always} executed before B@.
+
+@findex BASIC_BLOCK
+The @code{BASIC_BLOCK} array contains all basic blocks in an
+unspecified order.  Each @code{basic_block} structure has a field
+that holds a unique integer identifier @code{index} that is the
+index of the block in the @code{BASIC_BLOCK} array.
+The total number of basic blocks in the function is
+@code{n_basic_blocks}.  Both the basic block indices and
+the total number of basic blocks may vary during the compilation
+process, as passes reorder, create, duplicate, and destroy basic
+blocks.  The index for any block should never be greater than
+@code{last_basic_block}.
+
+@findex ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR
+Special basic blocks represent possible entry and exit points of a
+function.  These blocks are called @code{ENTRY_BLOCK_PTR} and
+@code{EXIT_BLOCK_PTR}.  These blocks do not contain any code, and are
+not elements of the @code{BASIC_BLOCK} array.  Therefore they have
+been assigned unique, negative index numbers.
+
+Each @code{basic_block} also contains pointers to the first
+instruction (the @dfn{head}) and the last instruction (the @dfn{tail})
+or @dfn{end} of the instruction stream contained in a basic block.  In
+fact, since the @code{basic_block} data type is used to represent
+blocks in both major intermediate representations of GCC (@code{tree}
+and RTL), there are pointers to the head and end of a basic block for
+both representations.
+
+@findex NOTE_INSN_BASIC_BLOCK, CODE_LABEL, notes
+For RTL, these pointers are @code{rtx head, end}.  In the RTL function
+representation, the head pointer always points either to a
+@code{NOTE_INSN_BASIC_BLOCK} or to a @code{CODE_LABEL}, if present.
+In the RTL representation of a function, the instruction stream
+contains not only the ``real'' instructions, but also @dfn{notes}.
+Any function that moves or duplicates the basic blocks needs
+to take care of updating of these notes.  Many of these notes expect
+that the instruction stream consists of linear regions, making such
+updates difficult.   The @code{NOTE_INSN_BASIC_BLOCK} note is the only
+kind of note that may appear in the instruction stream contained in a
+basic block.  The instruction stream of a basic block always follows a
+@code{NOTE_INSN_BASIC_BLOCK},  but zero or more @code{CODE_LABEL}
+nodes can precede the block note.   A basic block ends by control flow
+instruction or last instruction before following @code{CODE_LABEL} or
+@code{NOTE_INSN_BASIC_BLOCK}.  A @code{CODE_LABEL} cannot appear in
+the instruction stream of a basic block.
+
+@findex can_fallthru
+@cindex table jump
+In addition to notes, the jump table vectors are also represented as
+``pseudo-instructions'' inside the insn stream.  These vectors never
+appear in the basic block and should always be placed just after the
+table jump instructions referencing them.  After removing the
+table-jump it is often difficult to eliminate the code computing the
+address and referencing the vector, so cleaning up these vectors is
+postponed until after liveness analysis.   Thus the jump table vectors
+may appear in the insn stream unreferenced and without any purpose.
+Before any edge is made @dfn{fall-thru}, the existence of such
+construct in the way needs to be checked by calling
+@code{can_fallthru} function.
+
+@cindex block statement iterators
+For the @code{tree} representation, the head and end of the basic block
+are being pointed to by the @code{stmt_list} field, but this special
+@code{tree} should never be referenced directly.  Instead, at the tree
+level abstract containers and iterators are used to access statements
+and expressions in basic blocks.  These iterators are called
+@dfn{block statement iterators} (BSIs).  Grep for @code{^bsi}
+in the various @file{tree-*} files.
+The following snippet will pretty-print all the statements of the
+program in the GIMPLE representation.
+
+@smallexample
+FOR_EACH_BB (bb)
+  @{
+     block_stmt_iterator si;
+
+     for (si = bsi_start (bb); !bsi_end_p (si); bsi_next (&si))
+       @{
+          tree stmt = bsi_stmt (si);
+          print_generic_stmt (stderr, stmt, 0);
+       @}
+  @}
+@end smallexample
+
+
+@node Edges
+@section Edges
+
+@cindex edge in the flow graph
+@findex edge
+Edges represent possible control flow transfers from the end of some
+basic block A to the head of another basic block B@.  We say that A is
+a predecessor of B, and B is a successor of A@.  Edges are represented
+in GCC with the @code{edge} data type.  Each @code{edge} acts as a
+link between two basic blocks: the @code{src} member of an edge
+points to the predecessor basic block of the @code{dest} basic block.
+The members @code{preds} and @code{succs} of the @code{basic_block} data
+type point to type-safe vectors of edges to the predecessors and
+successors of the block.
+
+@cindex edge iterators
+When walking the edges in an edge vector, @dfn{edge iterators} should
+be used.  Edge iterators are constructed using the
+@code{edge_iterator} data structure and several methods are available
+to operate on them:
+
+@ftable @code
+@item ei_start
+This function initializes an @code{edge_iterator} that points to the
+first edge in a vector of edges.
+
+@item ei_last
+This function initializes an @code{edge_iterator} that points to the
+last edge in a vector of edges.
+
+@item ei_end_p
+This predicate is @code{true} if an @code{edge_iterator} represents
+the last edge in an edge vector.
+
+@item ei_one_before_end_p
+This predicate is @code{true} if an @code{edge_iterator} represents
+the second last edge in an edge vector.
+
+@item ei_next
+This function takes a pointer to an @code{edge_iterator} and makes it
+point to the next edge in the sequence.
+
+@item ei_prev
+This function takes a pointer to an @code{edge_iterator} and makes it
+point to the previous edge in the sequence.
+
+@item ei_edge
+This function returns the @code{edge} currently pointed to by an
+@code{edge_iterator}.
+
+@item ei_safe_safe
+This function returns the @code{edge} currently pointed to by an
+@code{edge_iterator}, but returns @code{NULL} if the iterator is
+pointing at the end of the sequence.  This function has been provided
+for existing code makes the assumption that a @code{NULL} edge
+indicates the end of the sequence.
+
+@end ftable
+
+The convenience macro @code{FOR_EACH_EDGE} can be used to visit all of
+the edges in a sequence of predecessor or successor edges.  It must
+not be used when an element might be removed during the traversal,
+otherwise elements will be missed.  Here is an example of how to use
+the macro:
+
+@smallexample
+edge e;
+edge_iterator ei;
+
+FOR_EACH_EDGE (e, ei, bb->succs)
+  @{
+     if (e->flags & EDGE_FALLTHRU)
+       break;
+  @}
+@end smallexample
+
+@findex fall-thru
+There are various reasons why control flow may transfer from one block
+to another.  One possibility is that some instruction, for example a
+@code{CODE_LABEL}, in a linearized instruction stream just always
+starts a new basic block.  In this case a @dfn{fall-thru} edge links
+the basic block to the first following basic block.  But there are
+several other reasons why edges may be created.  The @code{flags}
+field of the @code{edge} data type is used to store information
+about the type of edge we are dealing with.  Each edge is of one of
+the following types:
+
+@table @emph
+@item jump
+No type flags are set for edges corresponding to jump instructions.
+These edges are used for unconditional or conditional jumps and in
+RTL also for table jumps.  They are the easiest to manipulate as they
+may be freely redirected when the flow graph is not in SSA form.
+
+@item fall-thru
+@findex EDGE_FALLTHRU, force_nonfallthru
+Fall-thru edges are present in case where the basic block may continue
+execution to the following one without branching.  These edges have
+the @code{EDGE_FALLTHRU} flag set.  Unlike other types of edges, these
+edges must come into the basic block immediately following in the
+instruction stream.  The function @code{force_nonfallthru} is
+available to insert an unconditional jump in the case that redirection
+is needed.  Note that this may require creation of a new basic block.
+
+@item exception handling
+@cindex exception handling
+@findex EDGE_ABNORMAL, EDGE_EH
+Exception handling edges represent possible control transfers from a
+trapping instruction to an exception handler.  The definition of
+``trapping'' varies.  In C++, only function calls can throw, but for
+Java, exceptions like division by zero or segmentation fault are
+defined and thus each instruction possibly throwing this kind of
+exception needs to be handled as control flow instruction.  Exception
+edges have the @code{EDGE_ABNORMAL} and @code{EDGE_EH} flags set.
+
+@findex purge_dead_edges
+When updating the instruction stream it is easy to change possibly
+trapping instruction to non-trapping, by simply removing the exception
+edge.  The opposite conversion is difficult, but should not happen
+anyway.  The edges can be eliminated via @code{purge_dead_edges} call.
+
+@findex REG_EH_REGION, EDGE_ABNORMAL_CALL
+In the RTL representation, the destination of an exception edge is
+specified by @code{REG_EH_REGION} note attached to the insn.
+In case of a trapping call the @code{EDGE_ABNORMAL_CALL} flag is set
+too.  In the @code{tree} representation, this extra flag is not set.
+
+@findex may_trap_p, tree_could_trap_p
+In the RTL representation, the predicate @code{may_trap_p} may be used
+to check whether instruction still may trap or not.  For the tree
+representation, the @code{tree_could_trap_p} predicate is available,
+but this predicate only checks for possible memory traps, as in
+dereferencing an invalid pointer location.
+
+
+@item sibling calls
+@cindex sibling call
+@findex EDGE_ABNORMAL, EDGE_SIBCALL
+Sibling calls or tail calls terminate the function in a non-standard
+way and thus an edge to the exit must be present.
+@code{EDGE_SIBCALL} and @code{EDGE_ABNORMAL} are set in such case.
+These edges only exist in the RTL representation.
+
+@item computed jumps
+@cindex computed jump
+@findex EDGE_ABNORMAL
+Computed jumps contain edges to all labels in the function referenced
+from the code.  All those edges have @code{EDGE_ABNORMAL} flag set.
+The edges used to represent computed jumps often cause compile time
+performance problems, since functions consisting of many taken labels
+and many computed jumps may have @emph{very} dense flow graphs, so
+these edges need to be handled with special care.  During the earlier
+stages of the compilation process, GCC tries to avoid such dense flow
+graphs by factoring computed jumps.  For example, given the following
+series of jumps,
+
+@smallexample
+  goto *x;
+  [ @dots{} ]
+
+  goto *x;
+  [ @dots{} ]
+
+  goto *x;
+  [ @dots{} ]
+@end smallexample
+
+@noindent
+factoring the computed jumps results in the following code sequence
+which has a much simpler flow graph:
+
+@smallexample
+  goto y;
+  [ @dots{} ]
+
+  goto y;
+  [ @dots{} ]
+
+  goto y;
+  [ @dots{} ]
+
+y:
+  goto *x;
+@end smallexample
+
+However, the classic problem with this transformation is that it has a
+runtime cost in there resulting code: An extra jump.  Therefore, the
+computed jumps are un-factored in the later passes of the compiler.
+Be aware of that when you work on passes in that area.  There have
+been numerous examples already where the compile time for code with
+unfactored computed jumps caused some serious headaches.
+
+@item nonlocal goto handlers
+@cindex nonlocal goto handler
+@findex EDGE_ABNORMAL, EDGE_ABNORMAL_CALL
+GCC allows nested functions to return into caller using a @code{goto}
+to a label passed to as an argument to the callee.  The labels passed
+to nested functions contain special code to cleanup after function
+call.  Such sections of code are referred to as ``nonlocal goto
+receivers''.  If a function contains such nonlocal goto receivers, an
+edge from the call to the label is created with the
+@code{EDGE_ABNORMAL} and @code{EDGE_ABNORMAL_CALL} flags set.
+
+@item function entry points
+@cindex function entry point, alternate function entry point
+@findex LABEL_ALTERNATE_NAME
+By definition, execution of function starts at basic block 0, so there
+is always an edge from the @code{ENTRY_BLOCK_PTR} to basic block 0.
+There is no @code{tree} representation for alternate entry points at
+this moment.  In RTL, alternate entry points are specified by
+@code{CODE_LABEL} with @code{LABEL_ALTERNATE_NAME} defined.  This
+feature is currently used for multiple entry point prologues and is
+limited to post-reload passes only.  This can be used by back-ends to
+emit alternate prologues for functions called from different contexts.
+In future full support for multiple entry functions defined by Fortran
+90 needs to be implemented.
+
+@item function exits
+In the pre-reload representation a function terminates after the last
+instruction in the insn chain and no explicit return instructions are
+used.  This corresponds to the fall-thru edge into exit block.  After
+reload, optimal RTL epilogues are used that use explicit (conditional)
+return instructions that are represented by edges with no flags set.
+
+@end table
+
+
+@node Profile information
+@section Profile information
+
+@cindex profile representation
+In many cases a compiler must make a choice whether to trade speed in
+one part of code for speed in another, or to trade code size for code
+speed.  In such cases it is useful to know information about how often
+some given block will be executed.  That is the purpose for
+maintaining profile within the flow graph.
+GCC can handle profile information obtained through @dfn{profile
+feedback}, but it can also  estimate branch probabilities based on
+statics and heuristics.
+
+@cindex profile feedback
+The feedback based profile is produced by compiling the program with
+instrumentation, executing it on a train run and reading the numbers
+of executions of basic blocks and edges back to the compiler while
+re-compiling the program to produce the final executable.  This method
+provides very accurate information about where a program spends most
+of its time on the train run.  Whether it matches the average run of
+course depends on the choice of train data set, but several studies
+have shown that the behavior of a program usually changes just
+marginally over different data sets.
+
+@cindex Static profile estimation
+@cindex branch prediction
+@findex predict.def
+When profile feedback is not available, the compiler may be asked to
+attempt to predict the behavior of each branch in the program using a
+set of heuristics (see @file{predict.def} for details) and compute
+estimated frequencies of each basic block by propagating the
+probabilities over the graph.
+
+@findex frequency, count, BB_FREQ_BASE
+Each @code{basic_block} contains two integer fields to represent
+profile information: @code{frequency} and @code{count}.  The
+@code{frequency} is an estimation how often is basic block executed
+within a function.  It is represented as an integer scaled in the
+range from 0 to @code{BB_FREQ_BASE}.  The most frequently executed
+basic block in function is initially set to @code{BB_FREQ_BASE} and
+the rest of frequencies are scaled accordingly.  During optimization,
+the frequency of the most frequent basic block can both decrease (for
+instance by loop unrolling) or grow (for instance by cross-jumping
+optimization), so scaling sometimes has to be performed multiple
+times.
+
+@findex gcov_type
+The @code{count} contains hard-counted numbers of execution measured
+during training runs and is nonzero only when profile feedback is
+available.  This value is represented as the host's widest integer
+(typically a 64 bit integer) of the special type @code{gcov_type}.
+
+Most optimization passes can use only the frequency information of a
+basic block, but a few passes may want to know hard execution counts.
+The frequencies should always match the counts after scaling, however
+during updating of the profile information numerical error may
+accumulate into quite large errors.
+
+@findex REG_BR_PROB_BASE, EDGE_FREQUENCY
+Each edge also contains a branch probability field: an integer in the
+range from 0 to @code{REG_BR_PROB_BASE}.  It represents probability of
+passing control from the end of the @code{src} basic block to the
+@code{dest} basic block, i.e.@: the probability that control will flow
+along this edge.   The @code{EDGE_FREQUENCY} macro is available to
+compute how frequently a given edge is taken.  There is a @code{count}
+field for each edge as well, representing same information as for a
+basic block.
+
+The basic block frequencies are not represented in the instruction
+stream, but in the RTL representation the edge frequencies are
+represented for conditional jumps (via the @code{REG_BR_PROB}
+macro) since they are used when instructions are output to the
+assembly file and the flow graph is no longer maintained.
+
+@cindex reverse probability
+The probability that control flow arrives via a given edge to its
+destination basic block is called @dfn{reverse probability} and is not
+directly represented, but it may be easily computed from frequencies
+of basic blocks.
+
+@findex redirect_edge_and_branch
+Updating profile information is a delicate task that can unfortunately
+not be easily integrated with the CFG manipulation API@.  Many of the
+functions and hooks to modify the CFG, such as
+@code{redirect_edge_and_branch}, do not have enough information to
+easily update the profile, so updating it is in the majority of cases
+left up to the caller.  It is difficult to uncover bugs in the profile
+updating code, because they manifest themselves only by producing
+worse code, and checking profile consistency is not possible because
+of numeric error accumulation.  Hence special attention needs to be
+given to this issue in each pass that modifies the CFG@.
+
+@findex REG_BR_PROB_BASE, BB_FREQ_BASE, count
+It is important to point out that @code{REG_BR_PROB_BASE} and
+@code{BB_FREQ_BASE} are both set low enough to be possible to compute
+second power of any frequency or probability in the flow graph, it is
+not possible to even square the @code{count} field, as modern CPUs are
+fast enough to execute $2^32$ operations quickly.
+
+
+@node Maintaining the CFG
+@section Maintaining the CFG
+@findex cfghooks.h
+
+An important task of each compiler pass is to keep both the control
+flow graph and all profile information up-to-date.  Reconstruction of
+the control flow graph after each pass is not an option, since it may be
+very expensive and lost profile information cannot be reconstructed at
+all.
+
+GCC has two major intermediate representations, and both use the
+@code{basic_block} and @code{edge} data types to represent control
+flow.  Both representations share as much of the CFG maintenance code
+as possible.  For each representation, a set of @dfn{hooks} is defined
+so that each representation can provide its own implementation of CFG
+manipulation routines when necessary.  These hooks are defined in
+@file{cfghooks.h}.  There are hooks for almost all common CFG
+manipulations, including block splitting and merging, edge redirection
+and creating and deleting basic blocks.  These hooks should provide
+everything you need to maintain and manipulate the CFG in both the RTL
+and @code{tree} representation.
+
+At the moment, the basic block boundaries are maintained transparently
+when modifying instructions, so there rarely is a need to move them
+manually (such as in case someone wants to output instruction outside
+basic block explicitly).
+Often the CFG may be better viewed as integral part of instruction
+chain, than structure built on the top of it.  However, in principle
+the control flow graph for the @code{tree} representation is
+@emph{not} an integral part of the representation, in that a function
+tree may be expanded without first building a  flow graph for the
+@code{tree} representation at all.  This happens when compiling
+without any @code{tree} optimization enabled.  When the @code{tree}
+optimizations are enabled and the instruction stream is rewritten in
+SSA form, the CFG is very tightly coupled with the instruction stream.
+In particular, statement insertion and removal has to be done with
+care.  In fact, the whole @code{tree} representation can not be easily
+used or maintained without proper maintenance of the CFG
+simultaneously.
+
+@findex BLOCK_FOR_INSN, bb_for_stmt
+In the RTL representation, each instruction has a
+@code{BLOCK_FOR_INSN} value that represents pointer to the basic block
+that contains the instruction.  In the @code{tree} representation, the
+function @code{bb_for_stmt} returns a pointer to the basic block
+containing the queried statement.
+
+@cindex block statement iterators
+When changes need to be applied to a function in its @code{tree}
+representation, @dfn{block statement iterators} should be used.  These
+iterators provide an integrated abstraction of the flow graph and the
+instruction stream.  Block statement iterators are constructed using
+the @code{block_stmt_iterator} data structure and several modifier are
+available, including the following:
+
+@ftable @code
+@item bsi_start
+This function initializes a @code{block_stmt_iterator} that points to
+the first non-empty statement in a basic block.
+
+@item bsi_last
+This function initializes a @code{block_stmt_iterator} that points to
+the last statement in a basic block.
+
+@item bsi_end_p
+This predicate is @code{true} if a @code{block_stmt_iterator}
+represents the end of a basic block.
+
+@item bsi_next
+This function takes a @code{block_stmt_iterator} and makes it point to
+its successor.
+
+@item bsi_prev
+This function takes a @code{block_stmt_iterator} and makes it point to
+its predecessor.
+
+@item bsi_insert_after
+This function inserts a statement after the @code{block_stmt_iterator}
+passed in.  The final parameter determines whether the statement
+iterator is updated to point to the newly inserted statement, or left
+pointing to the original statement.
+
+@item bsi_insert_before
+This function inserts a statement before the @code{block_stmt_iterator}
+passed in.  The final parameter determines whether the statement
+iterator is updated to point to the newly inserted statement, or left
+pointing to the original  statement.
+
+@item bsi_remove
+This function removes the @code{block_stmt_iterator} passed in and
+rechains the remaining statements in a basic block, if any.
+@end ftable
+
+@findex BB_HEAD, BB_END
+In the RTL representation, the macros @code{BB_HEAD} and @code{BB_END}
+may be used to get the head and end @code{rtx} of a basic block.  No
+abstract iterators are defined for traversing the insn chain, but you
+can just use @code{NEXT_INSN} and @code{PREV_INSN} instead.  @xref{Insns}.
+
+@findex purge_dead_edges
+Usually a code manipulating pass simplifies the instruction stream and
+the flow of control, possibly eliminating some edges.  This may for
+example happen when a conditional jump is replaced with an
+unconditional jump, but also when simplifying possibly trapping
+instruction to non-trapping while compiling Java.  Updating of edges
+is not transparent and each optimization pass is required to do so
+manually.  However only few cases occur in practice.  The pass may
+call @code{purge_dead_edges} on a given basic block to remove
+superfluous edges, if any.
+
+@findex redirect_edge_and_branch, redirect_jump
+Another common scenario is redirection of branch instructions, but
+this is best modeled as redirection of edges in the control flow graph
+and thus use of @code{redirect_edge_and_branch} is preferred over more
+low level functions, such as @code{redirect_jump} that operate on RTL
+chain only.  The CFG hooks defined in @file{cfghooks.h} should provide
+the complete API required for manipulating and maintaining the CFG@.
+
+@findex split_block
+It is also possible that a pass has to insert control flow instruction
+into the middle of a basic block, thus creating an entry point in the
+middle of the basic block, which is impossible by definition: The
+block must be split to make sure it only has one entry point, i.e.@: the
+head of the basic block.  The CFG hook @code{split_block} may be used
+when an instruction in the middle of a basic block has to become the
+target of a jump or branch instruction.
+
+@findex insert_insn_on_edge
+@findex commit_edge_insertions
+@findex bsi_insert_on_edge
+@findex bsi_commit_edge_inserts
+@cindex edge splitting
+For a global optimizer, a common operation is to split edges in the
+flow graph and insert instructions on them.  In the RTL
+representation, this can be easily done using the
+@code{insert_insn_on_edge} function that emits an instruction
+``on the edge'', caching it for a later @code{commit_edge_insertions}
+call that will take care of moving the inserted instructions off the
+edge into the instruction stream contained in a basic block.  This
+includes the creation of new basic blocks where needed.  In the
+@code{tree} representation, the equivalent functions are
+@code{bsi_insert_on_edge} which inserts a block statement
+iterator on an edge, and @code{bsi_commit_edge_inserts} which flushes
+the instruction to actual instruction stream.
+
+While debugging the optimization pass, a @code{verify_flow_info}
+function may be useful to find bugs in the control flow graph updating
+code.
+
+Note that at present, the representation of control flow in the
+@code{tree} representation is discarded before expanding to RTL@.
+Long term the CFG should be maintained and ``expanded'' to the
+RTL representation along with the function @code{tree} itself.
+
+
+@node Liveness information
+@section Liveness information
+@cindex Liveness representation
+Liveness information is useful to determine whether some register is
+``live'' at given point of program, i.e.@: that it contains a value that
+may be used at a later point in the program.  This information is
+used, for instance, during register allocation, as the pseudo
+registers only need to be assigned to a unique hard register or to a
+stack slot if they are live.  The hard registers and stack slots may
+be freely reused for other values when a register is dead.  
+
+Liveness information is available in the back end starting with
+@code{pass_df_initialize} and ending with @code{pass_df_finish}.  Three
+flavors of live analysis are available: With @code{LR}, it is possible
+to determine at any point @code{P} in the function if the register may be
+used on some path from @code{P} to the end of the function.  With
+@code{UR}, it is possible to determine if there is a path from the
+beginning of the function to @code{P} that defines the variable.  
+@code{LIVE} is the intersection of the @code{LR} and @code{UR} and a
+variable is live at @code{P} if there is both an assignment that reaches
+it from the beginning of the function and a use that can be reached on
+some path from @code{P} to the end of the function.
+
+In general @code{LIVE} is the most useful of the three.  The macros
+@code{DF_[LR,UR,LIVE]_[IN,OUT]} can be used to access this information.
+The macros take a basic block number and return a bitmap that is indexed
+by the register number.  This information is only guaranteed to be up to
+date after calls are made to @code{df_analyze}.  See the file
+@code{df-core.c} for details on using the dataflow.  
+
+
+@findex REG_DEAD, REG_UNUSED
+The liveness information is stored partly in the RTL instruction stream
+and partly in the flow graph.  Local information is stored in the
+instruction stream: Each instruction may contain @code{REG_DEAD} notes
+representing that the value of a given register is no longer needed, or
+@code{REG_UNUSED} notes representing that the value computed by the
+instruction is never used.  The second is useful for instructions
+computing multiple values at once.
+
diff --git a/gcc/doc/collect2.texi b/gcc/doc/collect2.texi
new file mode 100644
index 000000000..7cd5c9355
--- /dev/null
+++ b/gcc/doc/collect2.texi
@@ -0,0 +1,89 @@
+@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Collect2
+@chapter @code{collect2}
+
+GCC uses a utility called @code{collect2} on nearly all systems to arrange
+to call various initialization functions at start time.
+
+The program @code{collect2} works by linking the program once and
+looking through the linker output file for symbols with particular names
+indicating they are constructor functions.  If it finds any, it
+creates a new temporary @samp{.c} file containing a table of them,
+compiles it, and links the program a second time including that file.
+
+@findex __main
+@cindex constructors, automatic calls
+The actual calls to the constructors are carried out by a subroutine
+called @code{__main}, which is called (automatically) at the beginning
+of the body of @code{main} (provided @code{main} was compiled with GNU
+CC)@.  Calling @code{__main} is necessary, even when compiling C code, to
+allow linking C and C++ object code together.  (If you use
+@option{-nostdlib}, you get an unresolved reference to @code{__main},
+since it's defined in the standard GCC library.  Include @option{-lgcc} at
+the end of your compiler command line to resolve this reference.)
+
+The program @code{collect2} is installed as @code{ld} in the directory
+where the passes of the compiler are installed.  When @code{collect2}
+needs to find the @emph{real} @code{ld}, it tries the following file
+names:
+
+@itemize @bullet
+@item
+a hard coded linker file name, if GCC was configured with the
+@option{--with-ld} option.
+
+@item
+@file{real-ld} in the directories listed in the compiler's search
+directories.
+
+@item
+@file{real-ld} in the directories listed in the environment variable
+@code{PATH}.
+
+@item
+The file specified in the @code{REAL_LD_FILE_NAME} configuration macro,
+if specified.
+
+@item
+@file{ld} in the compiler's search directories, except that
+@code{collect2} will not execute itself recursively.
+
+@item
+@file{ld} in @code{PATH}.
+@end itemize
+
+``The compiler's search directories'' means all the directories where
+@command{gcc} searches for passes of the compiler.  This includes
+directories that you specify with @option{-B}.
+
+Cross-compilers search a little differently:
+
+@itemize @bullet
+@item
+@file{real-ld} in the compiler's search directories.
+
+@item
+@file{@var{target}-real-ld} in @code{PATH}.
+
+@item
+The file specified in the @code{REAL_LD_FILE_NAME} configuration macro,
+if specified.
+
+@item
+@file{ld} in the compiler's search directories.
+
+@item
+@file{@var{target}-ld} in @code{PATH}.
+@end itemize
+
+@code{collect2} explicitly avoids running @code{ld} using the file name
+under which @code{collect2} itself was invoked.  In fact, it remembers
+up a list of such names---in case one copy of @code{collect2} finds
+another copy (or version) of @code{collect2} installed as @code{ld} in a
+second place in the search path.
+
+@code{collect2} searches for the utilities @code{nm} and @code{strip}
+using the same algorithm as above for @code{ld}.
diff --git a/gcc/doc/compat.texi b/gcc/doc/compat.texi
new file mode 100644
index 000000000..4e65b4582
--- /dev/null
+++ b/gcc/doc/compat.texi
@@ -0,0 +1,156 @@
+@c Copyright (C) 2002, 2004 Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Compatibility
+@chapter Binary Compatibility
+@cindex binary compatibility
+@cindex ABI
+@cindex application binary interface
+
+Binary compatibility encompasses several related concepts:
+
+@table @dfn
+@item application binary interface (ABI)
+The set of runtime conventions followed by all of the tools that deal
+with binary representations of a program, including compilers, assemblers,
+linkers, and language runtime support.
+Some ABIs are formal with a written specification, possibly designed
+by multiple interested parties.  Others are simply the way things are
+actually done by a particular set of tools.
+
+@item ABI conformance
+A compiler conforms to an ABI if it generates code that follows all of
+the specifications enumerated by that ABI@.
+A library conforms to an ABI if it is implemented according to that ABI@.
+An application conforms to an ABI if it is built using tools that conform
+to that ABI and does not contain source code that specifically changes
+behavior specified by the ABI@.
+
+@item calling conventions
+Calling conventions are a subset of an ABI that specify of how arguments
+are passed and function results are returned.
+
+@item interoperability
+Different sets of tools are interoperable if they generate files that
+can be used in the same program.  The set of tools includes compilers,
+assemblers, linkers, libraries, header files, startup files, and debuggers.
+Binaries produced by different sets of tools are not interoperable unless
+they implement the same ABI@.  This applies to different versions of the
+same tools as well as tools from different vendors.
+
+@item intercallability
+Whether a function in a binary built by one set of tools can call a
+function in a binary built by a different set of tools is a subset
+of interoperability.
+
+@item implementation-defined features
+Language standards include lists of implementation-defined features whose
+behavior can vary from one implementation to another.  Some of these
+features are normally covered by a platform's ABI and others are not.
+The features that are not covered by an ABI generally affect how a
+program behaves, but not intercallability.
+
+@item compatibility
+Conformance to the same ABI and the same behavior of implementation-defined
+features are both relevant for compatibility.
+@end table
+
+The application binary interface implemented by a C or C++ compiler
+affects code generation and runtime support for:
+
+@itemize @bullet
+@item
+size and alignment of data types
+@item
+layout of structured types
+@item
+calling conventions
+@item
+register usage conventions
+@item
+interfaces for runtime arithmetic support
+@item
+object file formats
+@end itemize
+
+In addition, the application binary interface implemented by a C++ compiler
+affects code generation and runtime support for:
+@itemize @bullet
+@item
+name mangling
+@item
+exception handling
+@item
+invoking constructors and destructors
+@item
+layout, alignment, and padding of classes
+@item
+layout and alignment of virtual tables
+@end itemize
+
+Some GCC compilation options cause the compiler to generate code that
+does not conform to the platform's default ABI@.  Other options cause
+different program behavior for implementation-defined features that are
+not covered by an ABI@.  These options are provided for consistency with
+other compilers that do not follow the platform's default ABI or the
+usual behavior of implementation-defined features for the platform.
+Be very careful about using such options.
+
+Most platforms have a well-defined ABI that covers C code, but ABIs
+that cover C++ functionality are not yet common.
+
+Starting with GCC 3.2, GCC binary conventions for C++ are based on a
+written, vendor-neutral C++ ABI that was designed to be specific to
+64-bit Itanium but also includes generic specifications that apply to
+any platform.
+This C++ ABI is also implemented by other compiler vendors on some
+platforms, notably GNU/Linux and BSD systems.
+We have tried hard to provide a stable ABI that will be compatible with
+future GCC releases, but it is possible that we will encounter problems
+that make this difficult.  Such problems could include different
+interpretations of the C++ ABI by different vendors, bugs in the ABI, or
+bugs in the implementation of the ABI in different compilers.
+GCC's @option{-Wabi} switch warns when G++ generates code that is
+probably not compatible with the C++ ABI@.
+
+The C++ library used with a C++ compiler includes the Standard C++
+Library, with functionality defined in the C++ Standard, plus language
+runtime support.  The runtime support is included in a C++ ABI, but there
+is no formal ABI for the Standard C++ Library.  Two implementations
+of that library are interoperable if one follows the de-facto ABI of the
+other and if they are both built with the same compiler, or with compilers
+that conform to the same ABI for C++ compiler and runtime support.
+
+When G++ and another C++ compiler conform to the same C++ ABI, but the
+implementations of the Standard C++ Library that they normally use do not
+follow the same ABI for the Standard C++ Library, object files built with
+those compilers can be used in the same program only if they use the same
+C++ library.  This requires specifying the location of the C++ library
+header files when invoking the compiler whose usual library is not being
+used.  The location of GCC's C++ header files depends on how the GCC
+build was configured, but can be seen by using the G++ @option{-v} option.
+With default configuration options for G++ 3.3 the compile line for a
+different C++ compiler needs to include
+
+@smallexample
+    -I@var{gcc_install_directory}/include/c++/3.3
+@end smallexample
+
+Similarly, compiling code with G++ that must use a C++ library other
+than the GNU C++ library requires specifying the location of the header
+files for that other library.
+
+The most straightforward way to link a program to use a particular
+C++ library is to use a C++ driver that specifies that C++ library by
+default.  The @command{g++} driver, for example, tells the linker where
+to find GCC's C++ library (@file{libstdc++}) plus the other libraries
+and startup files it needs, in the proper order.
+
+If a program must use a different C++ library and it's not possible
+to do the final link using a C++ driver that uses that library by default,
+it is necessary to tell @command{g++} the location and name of that
+library.  It might also be necessary to specify different startup files
+and other runtime support libraries, and to suppress the use of GCC's
+support libraries with one or more of the options @option{-nostdlib},
+@option{-nostartfiles}, and @option{-nodefaultlibs}.
diff --git a/gcc/doc/configfiles.texi b/gcc/doc/configfiles.texi
new file mode 100644
index 000000000..d122225f3
--- /dev/null
+++ b/gcc/doc/configfiles.texi
@@ -0,0 +1,64 @@
+@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+@c 1999, 2000, 2001, 2002, 2010 Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Configuration Files
+@subsubsection Files Created by @code{configure}
+
+Here we spell out what files will be set up by @file{configure} in the
+@file{gcc} directory.  Some other files are created as temporary files
+in the configuration process, and are not used in the subsequent
+build; these are not documented.
+
+@itemize @bullet
+@item
+@file{Makefile} is constructed from @file{Makefile.in}, together with
+the host and target fragments (@pxref{Fragments, , Makefile
+Fragments}) @file{t-@var{target}} and @file{x-@var{host}} from
+@file{config}, if any, and language Makefile fragments
+@file{@var{language}/Make-lang.in}.
+@item
+@file{auto-host.h} contains information about the host machine
+determined by @file{configure}.  If the host machine is different from
+the build machine, then @file{auto-build.h} is also created,
+containing such information about the build machine.
+@item
+@file{config.status} is a script that may be run to recreate the
+current configuration.
+@item
+@file{configargs.h} is a header containing details of the arguments
+passed to @file{configure} to configure GCC, and of the thread model
+used.
+@item
+@file{cstamp-h} is used as a timestamp.
+@item
+If a language @file{config-lang.in} file (@pxref{Front End Config, ,
+The Front End @file{config-lang.in} File}) sets @code{outputs}, then
+the files listed in @code{outputs} there are also generated.
+@end itemize
+
+The following configuration headers are created from the Makefile,
+using @file{mkconfig.sh}, rather than directly by @file{configure}.
+@file{config.h}, @file{bconfig.h} and @file{tconfig.h} all contain the
+@file{xm-@var{machine}.h} header, if any, appropriate to the host,
+build and target machines respectively, the configuration headers for
+the target, and some definitions; for the host and build machines,
+these include the autoconfigured headers generated by
+@file{configure}.  The other configuration headers are determined by
+@file{config.gcc}.  They also contain the typedefs for @code{rtx},
+@code{rtvec} and @code{tree}.
+
+@itemize @bullet
+@item
+@file{config.h}, for use in programs that run on the host machine.
+@item
+@file{bconfig.h}, for use in programs that run on the build machine.
+@item
+@file{tconfig.h}, for use in programs and libraries for the target
+machine.
+@item
+@file{tm_p.h}, which includes the header @file{@var{machine}-protos.h}
+that contains prototypes for functions in the target @file{.c} file.
+FIXME: why is such a separate header necessary?
+@end itemize
diff --git a/gcc/doc/configterms.texi b/gcc/doc/configterms.texi
new file mode 100644
index 000000000..d24416992
--- /dev/null
+++ b/gcc/doc/configterms.texi
@@ -0,0 +1,61 @@
+@c Copyright (C) 2001, 2002, 2004, 2008 Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Configure Terms
+@section Configure Terms and History
+@cindex configure terms
+@cindex canadian
+
+The configure and build process has a long and colorful history, and can
+be confusing to anyone who doesn't know why things are the way they are.
+While there are other documents which describe the configuration process
+in detail, here are a few things that everyone working on GCC should
+know.
+
+There are three system names that the build knows about: the machine you
+are building on (@dfn{build}), the machine that you are building for
+(@dfn{host}), and the machine that GCC will produce code for
+(@dfn{target}).  When you configure GCC, you specify these with
+@option{--build=}, @option{--host=}, and @option{--target=}.
+
+Specifying the host without specifying the build should be avoided, as
+@command{configure} may (and once did) assume that the host you specify
+is also the build, which may not be true.
+
+If build, host, and target are all the same, this is called a
+@dfn{native}.  If build and host are the same but target is different,
+this is called a @dfn{cross}.  If build, host, and target are all
+different this is called a @dfn{canadian} (for obscure reasons dealing
+with Canada's political party and the background of the person working
+on the build at that time).  If host and target are the same, but build
+is different, you are using a cross-compiler to build a native for a
+different system.  Some people call this a @dfn{host-x-host},
+@dfn{crossed native}, or @dfn{cross-built native}.  If build and target
+are the same, but host is different, you are using a cross compiler to
+build a cross compiler that produces code for the machine you're
+building on.  This is rare, so there is no common way of describing it.
+There is a proposal to call this a @dfn{crossback}.
+
+If build and host are the same, the GCC you are building will also be
+used to build the target libraries (like @code{libstdc++}).  If build and host
+are different, you must have already built and installed a cross
+compiler that will be used to build the target libraries (if you
+configured with @option{--target=foo-bar}, this compiler will be called
+@command{foo-bar-gcc}).
+
+In the case of target libraries, the machine you're building for is the
+machine you specified with @option{--target}.  So, build is the machine
+you're building on (no change there), host is the machine you're
+building for (the target libraries are built for the target, so host is
+the target you specified), and target doesn't apply (because you're not
+building a compiler, you're building libraries).  The configure/make
+process will adjust these variables as needed.  It also sets
+@code{$with_cross_host} to the original @option{--host} value in case you
+need it.
+
+The @code{libiberty} support library is built up to three times: once
+for the host, once for the target (even if they are the same), and once
+for the build if build and host are different.  This allows it to be
+used by all programs which are generated in the course of the build
+process.
diff --git a/gcc/doc/contrib.texi b/gcc/doc/contrib.texi
new file mode 100644
index 000000000..e52dcf9be
--- /dev/null
+++ b/gcc/doc/contrib.texi
@@ -0,0 +1,1636 @@
+@c Copyright (C) 1988,1989,1992,1993,1994,1995,1996,1997,1998,1999,2000,
+@c 2001,2002,2003,2004,2005,2006,2007,2008,2009, 2010
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Contributors
+@unnumbered Contributors to GCC
+@cindex contributors
+
+The GCC project would like to thank its many contributors.  Without them the
+project would not have been nearly as successful as it has been.  Any omissions
+in this list are accidental.  Feel free to contact
+@email{law@@redhat.com} or @email{gerald@@pfeifer.com} if you have been left
+out or some of your contributions are not listed.  Please keep this list in
+alphabetical order.
+
+@itemize @bullet
+
+@item
+Analog Devices helped implement the support for complex data types
+and iterators.
+
+@item
+John David Anglin for threading-related fixes and improvements to
+libstdc++-v3, and the HP-UX port.
+
+@item
+James van Artsdalen wrote the code that makes efficient use of
+the Intel 80387 register stack.
+
+@item
+Abramo and Roberto Bagnara for the SysV68 Motorola 3300 Delta Series
+port.
+
+@item
+Alasdair Baird for various bug fixes.
+
+@item
+Giovanni Bajo for analyzing lots of complicated C++ problem reports.
+
+@item
+Peter Barada for his work to improve code generation for new
+ColdFire cores.
+
+@item
+Gerald Baumgartner added the signature extension to the C++ front end.
+
+@item
+Godmar Back for his Java improvements and encouragement.
+
+@item
+Scott Bambrough for help porting the Java compiler.
+
+@item
+Wolfgang Bangerth for processing tons of bug reports.
+
+@item
+Jon Beniston for his Microsoft Windows port of Java and port to Lattice Mico32.
+
+@item
+Daniel Berlin for better DWARF2 support, faster/better optimizations,
+improved alias analysis, plus migrating GCC to Bugzilla.
+
+@item
+Geoff Berry for his Java object serialization work and various patches.
+
+@item
+Uros Bizjak for the implementation of x87 math built-in functions and
+for various middle end and i386 back end improvements and bug fixes.
+
+@item
+Eric Blake for helping to make GCJ and libgcj conform to the
+specifications.
+
+@item
+Janne Blomqvist for contributions to GNU Fortran.
+
+@item
+Segher Boessenkool for various fixes.
+
+@item
+Hans-J. Boehm for his @uref{http://www.hpl.hp.com/@/personal/@/Hans_Boehm/@/gc/,,
+garbage collector}, IA-64 libffi port, and other Java work.
+
+@item
+Neil Booth for work on cpplib, lang hooks, debug hooks and other
+miscellaneous clean-ups.
+
+@item
+Steven Bosscher for integrating the GNU Fortran front end into GCC and for
+contributing to the tree-ssa branch.
+
+@item
+Eric Botcazou for fixing middle- and backend bugs left and right.
+
+@item
+Per Bothner for his direction via the steering committee and various
+improvements to the infrastructure for supporting new languages.  Chill
+front end implementation.  Initial implementations of
+cpplib, fix-header, config.guess, libio, and past C++ library (libg++)
+maintainer.  Dreaming up, designing and implementing much of GCJ@.
+
+@item
+Devon Bowen helped port GCC to the Tahoe.
+
+@item
+Don Bowman for mips-vxworks contributions.
+
+@item
+Dave Brolley for work on cpplib and Chill.
+
+@item
+Paul Brook for work on the ARM architecture and maintaining GNU Fortran.
+
+@item
+Robert Brown implemented the support for Encore 32000 systems.
+
+@item
+Christian Bruel for improvements to local store elimination.
+
+@item
+Herman A.J. ten Brugge for various fixes.
+
+@item
+Joerg Brunsmann for Java compiler hacking and help with the GCJ FAQ@.
+
+@item
+Joe Buck for his direction via the steering committee.
+
+@item
+Craig Burley for leadership of the G77 Fortran effort.
+
+@item
+Stephan Buys for contributing Doxygen notes for libstdc++.
+
+@item
+Paolo Carlini for libstdc++ work: lots of efficiency improvements to
+the C++ strings, streambufs and formatted I/O, hard detective work on
+the frustrating localization issues, and keeping up with the problem reports.
+
+@item
+John Carr for his alias work, SPARC hacking, infrastructure improvements,
+previous contributions to the steering committee, loop optimizations, etc.
+
+@item
+Stephane Carrez for 68HC11 and 68HC12 ports.
+
+@item
+Steve Chamberlain for support for the Renesas SH and H8 processors
+and the PicoJava processor, and for GCJ config fixes.
+
+@item
+Glenn Chambers for help with the GCJ FAQ@.
+
+@item
+John-Marc Chandonia for various libgcj patches.
+
+@item
+Denis Chertykov for contributing and maintaining the AVR port, the first GCC port
+for an 8-bit architecture.
+
+@item
+Scott Christley for his Objective-C contributions.
+
+@item
+Eric Christopher for his Java porting help and clean-ups.
+
+@item
+Branko Cibej for more warning contributions.
+
+@item
+The @uref{http://www.gnu.org/software/classpath/,,GNU Classpath project}
+for all of their merged runtime code.
+
+@item
+Nick Clifton for arm, mcore, fr30, v850, m32r, rx work,
+@option{--help}, and other random hacking.
+
+@item
+Michael Cook for libstdc++ cleanup patches to reduce warnings.
+
+@item
+R. Kelley Cook for making GCC buildable from a read-only directory as
+well as other miscellaneous build process and documentation clean-ups.
+
+@item
+Ralf Corsepius for SH testing and minor bug fixing.
+
+@item
+Stan Cox for care and feeding of the x86 port and lots of behind
+the scenes hacking.
+
+@item
+Alex Crain provided changes for the 3b1.
+
+@item
+Ian Dall for major improvements to the NS32k port.
+
+@item
+Paul Dale for his work to add uClinux platform support to the
+m68k backend.
+
+@item
+Dario Dariol contributed the four varieties of sample programs
+that print a copy of their source.
+
+@item
+Russell Davidson for fstream and stringstream fixes in libstdc++.
+
+@item
+Bud Davis for work on the G77 and GNU Fortran compilers.
+
+@item
+Mo DeJong for GCJ and libgcj bug fixes.
+
+@item
+DJ Delorie for the DJGPP port, build and libiberty maintenance,
+various bug fixes, and the M32C and MeP ports.
+
+@item
+Arnaud Desitter for helping to debug GNU Fortran.
+
+@item
+Gabriel Dos Reis for contributions to G++, contributions and
+maintenance of GCC diagnostics infrastructure, libstdc++-v3,
+including @code{valarray<>}, @code{complex<>}, maintaining the numerics library
+(including that pesky @code{<limits>} :-) and keeping up-to-date anything
+to do with numbers.
+
+@item
+Ulrich Drepper for his work on glibc, testing of GCC using glibc, ISO C99
+support, CFG dumping support, etc., plus support of the C++ runtime
+libraries including for all kinds of C interface issues, contributing and
+maintaining @code{complex<>}, sanity checking and disbursement, configuration
+architecture, libio maintenance, and early math work.
+
+@item
+Zdenek Dvorak for a new loop unroller and various fixes.
+
+@item
+Michael Eager for his work on the Xilinx MicroBlaze port.
+
+@item
+Richard Earnshaw for his ongoing work with the ARM@.
+
+@item
+David Edelsohn for his direction via the steering committee, ongoing work
+with the RS6000/PowerPC port, help cleaning up Haifa loop changes,
+doing the entire AIX port of libstdc++ with his bare hands, and for
+ensuring GCC properly keeps working on AIX@.
+
+@item
+Kevin Ediger for the floating point formatting of num_put::do_put in
+libstdc++.
+
+@item
+Phil Edwards for libstdc++ work including configuration hackery,
+documentation maintainer, chief breaker of the web pages, the occasional
+iostream bug fix, and work on shared library symbol versioning.
+
+@item
+Paul Eggert for random hacking all over GCC@.
+
+@item
+Mark Elbrecht for various DJGPP improvements, and for libstdc++
+configuration support for locales and fstream-related fixes.
+
+@item
+Vadim Egorov for libstdc++ fixes in strings, streambufs, and iostreams.
+
+@item
+Christian Ehrhardt for dealing with bug reports.
+
+@item
+Ben Elliston for his work to move the Objective-C runtime into its
+own subdirectory and for his work on autoconf.
+
+@item
+Revital Eres for work on the PowerPC 750CL port.
+
+@item
+Marc Espie for OpenBSD support.
+
+@item
+Doug Evans for much of the global optimization framework, arc, m32r,
+and SPARC work.
+
+@item
+Christopher Faylor for his work on the Cygwin port and for caring and
+feeding the gcc.gnu.org box and saving its users tons of spam.
+
+@item
+Fred Fish for BeOS support and Ada fixes.
+
+@item
+Ivan Fontes Garcia for the Portuguese translation of the GCJ FAQ@.
+
+@item
+Peter Gerwinski for various bug fixes and the Pascal front end.
+
+@item
+Kaveh R.@: Ghazi for his direction via the steering committee, amazing
+work to make @samp{-W -Wall -W* -Werror} useful, and continuously
+testing GCC on a plethora of platforms.  Kaveh extends his gratitude to
+the @uref{http://www.caip.rutgers.edu,,CAIP Center} at Rutgers
+University for providing him with computing resources to work on Free
+Software since the late 1980s.
+
+@item
+John Gilmore for a donation to the FSF earmarked improving GNU Java.
+
+@item
+Judy Goldberg for c++ contributions.
+
+@item
+Torbjorn Granlund for various fixes and the c-torture testsuite,
+multiply- and divide-by-constant optimization, improved long long
+support, improved leaf function register allocation, and his direction
+via the steering committee.
+
+@item
+Anthony Green for his @option{-Os} contributions, the moxie port, and
+Java front end work.
+
+@item
+Stu Grossman for gdb hacking, allowing GCJ developers to debug Java code.
+
+@item
+Michael K. Gschwind contributed the port to the PDP-11.
+
+@item
+Richard Guenther for his ongoing middle-end contributions and bug fixes
+and for release management.
+
+@item
+Ron Guilmette implemented the @command{protoize} and @command{unprotoize}
+tools, the support for Dwarf symbolic debugging information, and much of
+the support for System V Release 4.  He has also worked heavily on the
+Intel 386 and 860 support.
+
+@item
+Mostafa Hagog for Swing Modulo Scheduling (SMS) and post reload GCSE@.
+
+@item
+Bruno Haible for improvements in the runtime overhead for EH, new
+warnings and assorted bug fixes.
+
+@item
+Andrew Haley for his amazing Java compiler and library efforts.
+
+@item
+Chris Hanson assisted in making GCC work on HP-UX for the 9000 series 300.
+
+@item
+Michael Hayes for various thankless work he's done trying to get
+the c30/c40 ports functional.  Lots of loop and unroll improvements and
+fixes.
+
+@item
+Dara Hazeghi for wading through myriads of target-specific bug reports.
+
+@item
+Kate Hedstrom for staking the G77 folks with an initial testsuite.
+
+@item
+Richard Henderson for his ongoing SPARC, alpha, ia32, and ia64 work, loop
+opts, and generally fixing lots of old problems we've ignored for
+years, flow rewrite and lots of further stuff, including reviewing
+tons of patches.
+
+@item
+Aldy Hernandez for working on the PowerPC port, SIMD support, and
+various fixes.
+
+@item
+Nobuyuki Hikichi of Software Research Associates, Tokyo, contributed
+the support for the Sony NEWS machine.
+
+@item
+Kazu Hirata for caring and feeding the Renesas H8/300 port and various fixes.
+
+@item
+Katherine Holcomb for work on GNU Fortran.
+
+@item
+Manfred Hollstein for his ongoing work to keep the m88k alive, lots
+of testing and bug fixing, particularly of GCC configury code.
+
+@item
+Steve Holmgren for MachTen patches.
+
+@item
+Jan Hubicka for his x86 port improvements.
+
+@item
+Falk Hueffner for working on C and optimization bug reports.
+
+@item
+Bernardo Innocenti for his m68k work, including merging of
+ColdFire improvements and uClinux support.
+
+@item
+Christian Iseli for various bug fixes.
+
+@item
+Kamil Iskra for general m68k hacking.
+
+@item
+Lee Iverson for random fixes and MIPS testing.
+
+@item
+Andreas Jaeger for testing and benchmarking of GCC and various bug fixes.
+
+@item
+Jakub Jelinek for his SPARC work and sibling call optimizations as well
+as lots of bug fixes and test cases, and for improving the Java build
+system.
+
+@item
+Janis Johnson for ia64 testing and fixes, her quality improvement
+sidetracks, and web page maintenance.
+
+@item
+Kean Johnston for SCO OpenServer support and various fixes.
+
+@item
+Tim Josling for the sample language treelang based originally on Richard
+Kenner's ``toy'' language.
+
+@item
+Nicolai Josuttis for additional libstdc++ documentation.
+
+@item
+Klaus Kaempf for his ongoing work to make alpha-vms a viable target.
+
+@item
+Steven G. Kargl for work on GNU Fortran.
+
+@item
+David Kashtan of SRI adapted GCC to VMS@.
+
+@item
+Ryszard Kabatek for many, many libstdc++ bug fixes and optimizations of
+strings, especially member functions, and for auto_ptr fixes.
+
+@item
+Geoffrey Keating for his ongoing work to make the PPC work for GNU/Linux
+and his automatic regression tester.
+
+@item
+Brendan Kehoe for his ongoing work with G++ and for a lot of early work
+in just about every part of libstdc++.
+
+@item
+Oliver M. Kellogg of Deutsche Aerospace contributed the port to the
+MIL-STD-1750A@.
+
+@item
+Richard Kenner of the New York University Ultracomputer Research
+Laboratory wrote the machine descriptions for the AMD 29000, the DEC
+Alpha, the IBM RT PC, and the IBM RS/6000 as well as the support for
+instruction attributes.  He also made changes to better support RISC
+processors including changes to common subexpression elimination,
+strength reduction, function calling sequence handling, and condition
+code support, in addition to generalizing the code for frame pointer
+elimination and delay slot scheduling.  Richard Kenner was also the
+head maintainer of GCC for several years.
+
+@item
+Mumit Khan for various contributions to the Cygwin and Mingw32 ports and
+maintaining binary releases for Microsoft Windows hosts, and for massive libstdc++
+porting work to Cygwin/Mingw32.
+
+@item
+Robin Kirkham for cpu32 support.
+
+@item
+Mark Klein for PA improvements.
+
+@item
+Thomas Koenig for various bug fixes.
+
+@item
+Bruce Korb for the new and improved fixincludes code.
+
+@item
+Benjamin Kosnik for his G++ work and for leading the libstdc++-v3 effort.
+
+@item
+Charles LaBrec contributed the support for the Integrated Solutions
+68020 system.
+
+@item
+Asher Langton and Mike Kumbera for contributing Cray pointer support
+to GNU Fortran, and for other GNU Fortran improvements.
+
+@item
+Jeff Law for his direction via the steering committee, coordinating the
+entire egcs project and GCC 2.95, rolling out snapshots and releases,
+handling merges from GCC2, reviewing tons of patches that might have
+fallen through the cracks else, and random but extensive hacking.
+
+@item
+Marc Lehmann for his direction via the steering committee and helping
+with analysis and improvements of x86 performance.
+
+@item
+Victor Leikehman for work on GNU Fortran.
+
+@item
+Ted Lemon wrote parts of the RTL reader and printer.
+
+@item
+Kriang Lerdsuwanakij for C++ improvements including template as template
+parameter support, and many C++ fixes.
+
+@item
+Warren Levy for tremendous work on libgcj (Java Runtime Library) and
+random work on the Java front end.
+
+@item
+Alain Lichnewsky ported GCC to the MIPS CPU@.
+
+@item
+Oskar Liljeblad for hacking on AWT and his many Java bug reports and
+patches.
+
+@item
+Robert Lipe for OpenServer support, new testsuites, testing, etc.
+
+@item
+Chen Liqin for various S+core related fixes/improvement, and for
+maintaining the S+core port.
+
+@item
+Weiwen Liu for testing and various bug fixes.
+
+@item
+Manuel L@'opez-Ib@'a@~nez for improving @option{-Wconversion} and
+many other diagnostics fixes and improvements.
+
+@item
+Dave Love for his ongoing work with the Fortran front end and
+runtime libraries.
+
+@item
+Martin von L@"owis for internal consistency checking infrastructure,
+various C++ improvements including namespace support, and tons of
+assistance with libstdc++/compiler merges.
+
+@item
+H.J. Lu for his previous contributions to the steering committee, many x86
+bug reports, prototype patches, and keeping the GNU/Linux ports working.
+
+@item
+Greg McGary for random fixes and (someday) bounded pointers.
+
+@item
+Andrew MacLeod for his ongoing work in building a real EH system,
+various code generation improvements, work on the global optimizer, etc.
+
+@item
+Vladimir Makarov for hacking some ugly i960 problems, PowerPC hacking
+improvements to compile-time performance, overall knowledge and
+direction in the area of instruction scheduling, and design and
+implementation of the automaton based instruction scheduler.
+
+@item
+Bob Manson for his behind the scenes work on dejagnu.
+
+@item
+Philip Martin for lots of libstdc++ string and vector iterator fixes and
+improvements, and string clean up and testsuites.
+
+@item
+All of the Mauve project
+@uref{http://sourceware.org/cgi-bin/cvsweb.cgi/~checkout~/mauve/THANKS?rev=1.2&cvsroot=mauve&only_with_tag=HEAD,,contributors},
+for Java test code.
+
+@item
+Bryce McKinlay for numerous GCJ and libgcj fixes and improvements.
+
+@item
+Adam Megacz for his work on the Microsoft Windows port of GCJ@.
+
+@item
+Michael Meissner for LRS framework, ia32, m32r, v850, m88k, MIPS,
+powerpc, haifa, ECOFF debug support, and other assorted hacking.
+
+@item
+Jason Merrill for his direction via the steering committee and leading
+the G++ effort.
+
+@item
+Martin Michlmayr for testing GCC on several architectures using the
+entire Debian archive.
+
+@item
+David Miller for his direction via the steering committee, lots of
+SPARC work, improvements in jump.c and interfacing with the Linux kernel
+developers.
+
+@item
+Gary Miller ported GCC to Charles River Data Systems machines.
+
+@item
+Alfred Minarik for libstdc++ string and ios bug fixes, and turning the
+entire libstdc++ testsuite namespace-compatible.
+
+@item
+Mark Mitchell for his direction via the steering committee, mountains of
+C++ work, load/store hoisting out of loops, alias analysis improvements,
+ISO C @code{restrict} support, and serving as release manager for GCC 3.x.
+
+@item
+Alan Modra for various GNU/Linux bits and testing.
+
+@item
+Toon Moene for his direction via the steering committee, Fortran
+maintenance, and his ongoing work to make us make Fortran run fast.
+
+@item
+Jason Molenda for major help in the care and feeding of all the services
+on the gcc.gnu.org (formerly egcs.cygnus.com) machine---mail, web
+services, ftp services, etc etc.  Doing all this work on scrap paper and
+the backs of envelopes would have been@dots{} difficult.
+
+@item
+Catherine Moore for fixing various ugly problems we have sent her
+way, including the haifa bug which was killing the Alpha & PowerPC
+Linux kernels.
+
+@item
+Mike Moreton for his various Java patches.
+
+@item
+David Mosberger-Tang for various Alpha improvements, and for the initial
+IA-64 port.
+
+@item
+Stephen Moshier contributed the floating point emulator that assists in
+cross-compilation and permits support for floating point numbers wider
+than 64 bits and for ISO C99 support.
+
+@item
+Bill Moyer for his behind the scenes work on various issues.
+
+@item
+Philippe De Muyter for his work on the m68k port.
+
+@item
+Joseph S. Myers for his work on the PDP-11 port, format checking and ISO
+C99 support, and continuous emphasis on (and contributions to) documentation.
+
+@item
+Nathan Myers for his work on libstdc++-v3: architecture and authorship
+through the first three snapshots, including implementation of locale
+infrastructure, string, shadow C headers, and the initial project
+documentation (DESIGN, CHECKLIST, and so forth).  Later, more work on
+MT-safe string and shadow headers.
+
+@item
+Felix Natter for documentation on porting libstdc++.
+
+@item
+Nathanael Nerode for cleaning up the configuration/build process.
+
+@item
+NeXT, Inc.@: donated the front end that supports the Objective-C
+language.
+
+@item
+Hans-Peter Nilsson for the CRIS and MMIX ports, improvements to the search
+engine setup, various documentation fixes and other small fixes.
+
+@item
+Geoff Noer for his work on getting cygwin native builds working.
+
+@item
+Diego Novillo for his work on Tree SSA, OpenMP, SPEC performance
+tracking web pages, GIMPLE tuples, and assorted fixes.
+
+@item
+David O'Brien for the FreeBSD/alpha, FreeBSD/AMD x86-64, FreeBSD/ARM,
+FreeBSD/PowerPC, and FreeBSD/SPARC64 ports and related infrastructure
+improvements.
+
+@item
+Alexandre Oliva for various build infrastructure improvements, scripts and
+amazing testing work, including keeping libtool issues sane and happy.
+
+@item
+Stefan Olsson for work on mt_alloc.
+
+@item
+Melissa O'Neill for various NeXT fixes.
+
+@item
+Rainer Orth for random MIPS work, including improvements to GCC's o32
+ABI support, improvements to dejagnu's MIPS support, Java configuration
+clean-ups and porting work, and maintaining the IRIX, Solaris 2, and
+Tru64 UNIX ports.
+
+@item
+Hartmut Penner for work on the s390 port.
+
+@item
+Paul Petersen wrote the machine description for the Alliant FX/8.
+
+@item
+Alexandre Petit-Bianco for implementing much of the Java compiler and
+continued Java maintainership.
+
+@item
+Matthias Pfaller for major improvements to the NS32k port.
+
+@item
+Gerald Pfeifer for his direction via the steering committee, pointing
+out lots of problems we need to solve, maintenance of the web pages, and
+taking care of documentation maintenance in general.
+
+@item
+Andrew Pinski for processing bug reports by the dozen.
+
+@item
+Ovidiu Predescu for his work on the Objective-C front end and runtime
+libraries.
+
+@item
+Jerry Quinn for major performance improvements in C++ formatted I/O@.
+
+@item
+Ken Raeburn for various improvements to checker, MIPS ports and various
+cleanups in the compiler.
+
+@item
+Rolf W. Rasmussen for hacking on AWT@.
+
+@item
+David Reese of Sun Microsystems contributed to the Solaris on PowerPC
+port.
+
+@item
+Volker Reichelt for keeping up with the problem reports.
+
+@item
+Joern Rennecke for maintaining the sh port, loop, regmove & reload
+hacking.
+
+@item
+Loren J. Rittle for improvements to libstdc++-v3 including the FreeBSD
+port, threading fixes, thread-related configury changes, critical
+threading documentation, and solutions to really tricky I/O problems,
+as well as keeping GCC properly working on FreeBSD and continuous testing.
+
+@item
+Craig Rodrigues for processing tons of bug reports.
+
+@item
+Ola R@"onnerup for work on mt_alloc.
+
+@item
+Gavin Romig-Koch for lots of behind the scenes MIPS work.
+
+@item
+David Ronis inspired and encouraged Craig to rewrite the G77
+documentation in texinfo format by contributing a first pass at a
+translation of the old @file{g77-0.5.16/f/DOC} file.
+
+@item
+Ken Rose for fixes to GCC's delay slot filling code.
+
+@item
+Paul Rubin wrote most of the preprocessor.
+
+@item
+P@'etur Run@'olfsson for major performance improvements in C++ formatted I/O and
+large file support in C++ filebuf.
+
+@item
+Chip Salzenberg for libstdc++ patches and improvements to locales, traits,
+Makefiles, libio, libtool hackery, and ``long long'' support.
+
+@item
+Juha Sarlin for improvements to the H8 code generator.
+
+@item
+Greg Satz assisted in making GCC work on HP-UX for the 9000 series 300.
+
+@item
+Roger Sayle for improvements to constant folding and GCC's RTL optimizers
+as well as for fixing numerous bugs.
+
+@item
+Bradley Schatz for his work on the GCJ FAQ@.
+
+@item
+Peter Schauer wrote the code to allow debugging to work on the Alpha.
+
+@item
+William Schelter did most of the work on the Intel 80386 support.
+
+@item
+Tobias Schl@"uter for work on GNU Fortran.
+
+@item
+Bernd Schmidt for various code generation improvements and major
+work in the reload pass as well a serving as release manager for
+GCC 2.95.3.
+
+@item
+Peter Schmid for constant testing of libstdc++---especially application
+testing, going above and beyond what was requested for the release
+criteria---and libstdc++ header file tweaks.
+
+@item
+Jason Schroeder for jcf-dump patches.
+
+@item
+Andreas Schwab for his work on the m68k port.
+
+@item
+Lars Segerlund for work on GNU Fortran.
+
+@item
+Dodji Seketeli for numerous C++ bug fixes and debug info improvements.
+
+@item
+Joel Sherrill for his direction via the steering committee, RTEMS
+contributions and RTEMS testing.
+
+@item
+Nathan Sidwell for many C++ fixes/improvements.
+
+@item
+Jeffrey Siegal for helping RMS with the original design of GCC, some
+code which handles the parse tree and RTL data structures, constant
+folding and help with the original VAX & m68k ports.
+
+@item
+Kenny Simpson for prompting libstdc++ fixes due to defect reports from
+the LWG (thereby keeping GCC in line with updates from the ISO)@.
+
+@item
+Franz Sirl for his ongoing work with making the PPC port stable
+for GNU/Linux.
+
+@item
+Andrey Slepuhin for assorted AIX hacking.
+
+@item
+Trevor Smigiel for contributing the SPU port.
+
+@item
+Christopher Smith did the port for Convex machines.
+
+@item
+Danny Smith for his major efforts on the Mingw (and Cygwin) ports.
+
+@item
+Randy Smith finished the Sun FPA support.
+
+@item
+Scott Snyder for queue, iterator, istream, and string fixes and libstdc++
+testsuite entries.  Also for providing the patch to G77 to add
+rudimentary support for @code{INTEGER*1}, @code{INTEGER*2}, and
+@code{LOGICAL*1}.
+
+@item
+Brad Spencer for contributions to the GLIBCPP_FORCE_NEW technique.
+
+@item
+Richard Stallman, for writing the original GCC and launching the GNU project.
+
+@item
+Jan Stein of the Chalmers Computer Society provided support for
+Genix, as well as part of the 32000 machine description.
+
+@item
+Nigel Stephens for various mips16 related fixes/improvements.
+
+@item
+Jonathan Stone wrote the machine description for the Pyramid computer.
+
+@item
+Graham Stott for various infrastructure improvements.
+
+@item
+John Stracke for his Java HTTP protocol fixes.
+
+@item
+Mike Stump for his Elxsi port, G++ contributions over the years and more
+recently his vxworks contributions
+
+@item
+Jeff Sturm for Java porting help, bug fixes, and encouragement.
+
+@item
+Shigeya Suzuki for this fixes for the bsdi platforms.
+
+@item
+Ian Lance Taylor for the Go frontend, the initial mips16 and mips64
+support, general configury hacking, fixincludes, etc.
+
+@item
+Holger Teutsch provided the support for the Clipper CPU@.
+
+@item
+Gary Thomas for his ongoing work to make the PPC work for GNU/Linux.
+
+@item
+Philipp Thomas for random bug fixes throughout the compiler
+
+@item
+Jason Thorpe for thread support in libstdc++ on NetBSD@.
+
+@item
+Kresten Krab Thorup wrote the run time support for the Objective-C
+language and the fantastic Java bytecode interpreter.
+
+@item
+Michael Tiemann for random bug fixes, the first instruction scheduler,
+initial C++ support, function integration, NS32k, SPARC and M88k
+machine description work, delay slot scheduling.
+
+@item
+Andreas Tobler for his work porting libgcj to Darwin.
+
+@item
+Teemu Torma for thread safe exception handling support.
+
+@item
+Leonard Tower wrote parts of the parser, RTL generator, and RTL
+definitions, and of the VAX machine description.
+
+@item 
+Daniel Towner and Hariharan Sandanagobalane contributed and 
+maintain the picoChip port.
+
+@item
+Tom Tromey for internationalization support and for his many Java
+contributions and libgcj maintainership.
+
+@item
+Lassi Tuura for improvements to config.guess to determine HP processor
+types.
+
+@item
+Petter Urkedal for libstdc++ CXXFLAGS, math, and algorithms fixes.
+
+@item
+Andy Vaught for the design and initial implementation of the GNU Fortran
+front end.
+
+@item
+Brent Verner for work with the libstdc++ cshadow files and their
+associated configure steps.
+
+@item
+Todd Vierling for contributions for NetBSD ports.
+
+@item
+Jonathan Wakely for contributing libstdc++ Doxygen notes and XHTML
+guidance.
+
+@item
+Dean Wakerley for converting the install documentation from HTML to texinfo
+in time for GCC 3.0.
+
+@item
+Krister Walfridsson for random bug fixes.
+
+@item
+Feng Wang for contributions to GNU Fortran.
+
+@item
+Stephen M. Webb for time and effort on making libstdc++ shadow files
+work with the tricky Solaris 8+ headers, and for pushing the build-time
+header tree.
+
+@item
+John Wehle for various improvements for the x86 code generator,
+related infrastructure improvements to help x86 code generation,
+value range propagation and other work, WE32k port.
+
+@item
+Ulrich Weigand for work on the s390 port.
+
+@item
+Zack Weinberg for major work on cpplib and various other bug fixes.
+
+@item
+Matt Welsh for help with Linux Threads support in GCJ@.
+
+@item
+Urban Widmark for help fixing java.io.
+
+@item
+Mark Wielaard for new Java library code and his work integrating with
+Classpath.
+
+@item
+Dale Wiles helped port GCC to the Tahoe.
+
+@item
+Bob Wilson from Tensilica, Inc.@: for the Xtensa port.
+
+@item
+Jim Wilson for his direction via the steering committee, tackling hard
+problems in various places that nobody else wanted to work on, strength
+reduction and other loop optimizations.
+
+@item
+Paul Woegerer and Tal Agmon for the CRX port.
+
+@item
+Carlo Wood for various fixes.
+
+@item
+Tom Wood for work on the m88k port.
+
+@item
+Canqun Yang for work on GNU Fortran.
+
+@item
+Masanobu Yuhara of Fujitsu Laboratories implemented the machine
+description for the Tron architecture (specifically, the Gmicro).
+
+@item
+Kevin Zachmann helped port GCC to the Tahoe.
+
+@item
+Ayal Zaks for Swing Modulo Scheduling (SMS).
+
+@item
+Xiaoqiang Zhang for work on GNU Fortran.
+
+@item
+Gilles Zunino for help porting Java to Irix.
+
+@end itemize
+
+The following people are recognized for their contributions to GNAT,
+the Ada front end of GCC:
+@itemize @bullet
+@item
+Bernard Banner
+
+@item
+Romain Berrendonner
+
+@item
+Geert Bosch
+
+@item
+Emmanuel Briot
+
+@item
+Joel Brobecker
+
+@item
+Ben Brosgol
+
+@item
+Vincent Celier
+
+@item
+Arnaud Charlet
+
+@item
+Chien Chieng
+
+@item
+Cyrille Comar
+
+@item
+Cyrille Crozes
+
+@item
+Robert Dewar
+
+@item
+Gary Dismukes
+
+@item
+Robert Duff
+
+@item
+Ed Falis
+
+@item
+Ramon Fernandez
+
+@item
+Sam Figueroa
+
+@item
+Vasiliy Fofanov
+
+@item
+Michael Friess
+
+@item
+Franco Gasperoni
+
+@item
+Ted Giering
+
+@item
+Matthew Gingell
+
+@item
+Laurent Guerby
+
+@item
+Jerome Guitton
+
+@item
+Olivier Hainque
+
+@item
+Jerome Hugues
+
+@item
+Hristian Kirtchev
+
+@item
+Jerome Lambourg
+
+@item
+Bruno Leclerc
+
+@item
+Albert Lee
+
+@item
+Sean McNeil
+
+@item
+Javier Miranda
+
+@item
+Laurent Nana
+
+@item
+Pascal Obry
+
+@item
+Dong-Ik Oh
+
+@item
+Laurent Pautet
+
+@item
+Brett Porter
+
+@item
+Thomas Quinot
+
+@item
+Nicolas Roche
+
+@item
+Pat Rogers
+
+@item
+Jose Ruiz
+
+@item
+Douglas Rupp
+
+@item
+Sergey Rybin
+
+@item
+Gail Schenker
+
+@item
+Ed Schonberg
+
+@item
+Nicolas Setton
+
+@item
+Samuel Tardieu
+
+@end itemize
+
+
+The following people are recognized for their contributions of new
+features, bug reports, testing and integration of classpath/libgcj for
+GCC version 4.1:
+@itemize @bullet
+@item
+Lillian Angel for @code{JTree} implementation and lots Free Swing
+additions and bug fixes.
+
+@item
+Wolfgang Baer for @code{GapContent} bug fixes.
+
+@item
+Anthony Balkissoon for @code{JList}, Free Swing 1.5 updates and mouse event
+fixes, lots of Free Swing work including @code{JTable} editing.
+
+@item
+Stuart Ballard for RMI constant fixes.
+
+@item
+Goffredo Baroncelli for @code{HTTPURLConnection} fixes.
+
+@item
+Gary Benson for @code{MessageFormat} fixes.
+
+@item
+Daniel Bonniot for @code{Serialization} fixes.
+
+@item
+Chris Burdess for lots of gnu.xml and http protocol fixes, @code{StAX}
+and @code{DOM xml:id} support.
+
+@item
+Ka-Hing Cheung for @code{TreePath} and @code{TreeSelection} fixes.
+
+@item
+Archie Cobbs for build fixes, VM interface updates,
+@code{URLClassLoader} updates.
+
+@item
+Kelley Cook for build fixes.
+
+@item
+Martin Cordova for Suggestions for better @code{SocketTimeoutException}.
+
+@item
+David Daney for @code{BitSet} bug fixes, @code{HttpURLConnection}
+rewrite and improvements.
+
+@item
+Thomas Fitzsimmons for lots of upgrades to the gtk+ AWT and Cairo 2D
+support. Lots of imageio framework additions, lots of AWT and Free
+Swing bug fixes.
+
+@item
+Jeroen Frijters for @code{ClassLoader} and nio cleanups, serialization fixes,
+better @code{Proxy} support, bug fixes and IKVM integration.
+
+@item
+Santiago Gala for @code{AccessControlContext} fixes.
+
+@item
+Nicolas Geoffray for @code{VMClassLoader} and @code{AccessController}
+improvements.
+
+@item
+David Gilbert for @code{basic} and @code{metal} icon and plaf support
+and lots of documenting, Lots of Free Swing and metal theme
+additions. @code{MetalIconFactory} implementation.
+
+@item
+Anthony Green for @code{MIDI} framework, @code{ALSA} and @code{DSSI}
+providers.
+
+@item
+Andrew Haley for @code{Serialization} and @code{URLClassLoader} fixes,
+gcj build speedups.
+
+@item
+Kim Ho for @code{JFileChooser} implementation.
+
+@item
+Andrew John Hughes for @code{Locale} and net fixes, URI RFC2986
+updates, @code{Serialization} fixes, @code{Properties} XML support and
+generic branch work, VMIntegration guide update.
+
+@item
+Bastiaan Huisman for @code{TimeZone} bug fixing.
+
+@item
+Andreas Jaeger for mprec updates.
+
+@item
+Paul Jenner for better @option{-Werror} support.
+
+@item
+Ito Kazumitsu for @code{NetworkInterface} implementation and updates.
+
+@item
+Roman Kennke for @code{BoxLayout}, @code{GrayFilter} and
+@code{SplitPane}, plus bug fixes all over. Lots of Free Swing work
+including styled text.
+
+@item
+Simon Kitching for @code{String} cleanups and optimization suggestions.
+
+@item
+Michael Koch for configuration fixes, @code{Locale} updates, bug and
+build fixes.
+
+@item
+Guilhem Lavaux for configuration, thread and channel fixes and Kaffe
+integration. JCL native @code{Pointer} updates. Logger bug fixes.
+
+@item
+David Lichteblau for JCL support library global/local reference
+cleanups.
+
+@item
+Aaron Luchko for JDWP updates and documentation fixes.
+
+@item
+Ziga Mahkovec for @code{Graphics2D} upgraded to Cairo 0.5 and new regex
+features.
+
+@item
+Sven de Marothy for BMP imageio support, CSS and @code{TextLayout}
+fixes. @code{GtkImage} rewrite, 2D, awt, free swing and date/time fixes and
+implementing the Qt4 peers.
+
+@item
+Casey Marshall for crypto algorithm fixes, @code{FileChannel} lock,
+@code{SystemLogger} and @code{FileHandler} rotate implementations, NIO
+@code{FileChannel.map} support, security and policy updates.
+
+@item
+Bryce McKinlay for RMI work.
+
+@item
+Audrius Meskauskas for lots of Free Corba, RMI and HTML work plus
+testing and documenting.
+
+@item
+Kalle Olavi Niemitalo for build fixes.
+
+@item
+Rainer Orth for build fixes.
+
+@item
+Andrew Overholt for @code{File} locking fixes.
+
+@item
+Ingo Proetel for @code{Image}, @code{Logger} and @code{URLClassLoader}
+updates.
+
+@item
+Olga Rodimina for @code{MenuSelectionManager} implementation.
+
+@item
+Jan Roehrich for @code{BasicTreeUI} and @code{JTree} fixes.
+
+@item
+Julian Scheid for documentation updates and gjdoc support.
+
+@item
+Christian Schlichtherle for zip fixes and cleanups.
+
+@item
+Robert Schuster for documentation updates and beans fixes,
+@code{TreeNode} enumerations and @code{ActionCommand} and various
+fixes, XML and URL, AWT and Free Swing bug fixes.
+
+@item
+Keith Seitz for lots of JDWP work.
+
+@item
+Christian Thalinger for 64-bit cleanups, Configuration and VM
+interface fixes and @code{CACAO} integration, @code{fdlibm} updates.
+
+@item
+Gael Thomas for @code{VMClassLoader} boot packages support suggestions.
+
+@item
+Andreas Tobler for Darwin and Solaris testing and fixing, @code{Qt4}
+support for Darwin/OS X, @code{Graphics2D} support, @code{gtk+}
+updates.
+
+@item
+Dalibor Topic for better @code{DEBUG} support, build cleanups and
+Kaffe integration. @code{Qt4} build infrastructure, @code{SHA1PRNG}
+and @code{GdkPixbugDecoder} updates.
+
+@item
+Tom Tromey for Eclipse integration, generics work, lots of bug fixes
+and gcj integration including coordinating The Big Merge.
+
+@item
+Mark Wielaard for bug fixes, packaging and release management,
+@code{Clipboard} implementation, system call interrupts and network
+timeouts and @code{GdkPixpufDecoder} fixes.
+
+@end itemize
+
+
+In addition to the above, all of which also contributed time and energy in
+testing GCC, we would like to thank the following for their contributions
+to testing:
+
+@itemize @bullet
+@item
+Michael Abd-El-Malek
+
+@item
+Thomas Arend
+
+@item
+Bonzo Armstrong
+
+@item
+Steven Ashe
+
+@item
+Chris Baldwin
+
+@item
+David Billinghurst
+
+@item
+Jim Blandy
+
+@item
+Stephane Bortzmeyer
+
+@item
+Horst von Brand
+
+@item
+Frank Braun
+
+@item
+Rodney Brown
+
+@item
+Sidney Cadot
+
+@item
+Bradford Castalia
+
+@item
+Robert Clark
+
+@item
+Jonathan Corbet
+
+@item
+Ralph Doncaster
+
+@item
+Richard Emberson
+
+@item
+Levente Farkas
+
+@item
+Graham Fawcett
+
+@item
+Mark Fernyhough
+
+@item
+Robert A. French
+
+@item
+J@"orgen Freyh
+
+@item
+Mark K. Gardner
+
+@item
+Charles-Antoine Gauthier
+
+@item
+Yung Shing Gene
+
+@item
+David Gilbert
+
+@item
+Simon Gornall
+
+@item
+Fred Gray
+
+@item
+John Griffin
+
+@item
+Patrik Hagglund
+
+@item
+Phil Hargett
+
+@item
+Amancio Hasty
+
+@item
+Takafumi Hayashi
+
+@item
+Bryan W. Headley
+
+@item
+Kevin B. Hendricks
+
+@item
+Joep Jansen
+
+@item
+Christian Joensson
+
+@item
+Michel Kern
+
+@item
+David Kidd
+
+@item
+Tobias Kuipers
+
+@item
+Anand Krishnaswamy
+
+@item
+A. O. V. Le Blanc
+
+@item
+llewelly
+
+@item
+Damon Love
+
+@item
+Brad Lucier
+
+@item
+Matthias Klose
+
+@item
+Martin Knoblauch
+
+@item
+Rick Lutowski
+
+@item
+Jesse Macnish
+
+@item
+Stefan Morrell
+
+@item
+Anon A. Mous
+
+@item
+Matthias Mueller
+
+@item
+Pekka Nikander
+
+@item
+Rick Niles
+
+@item
+Jon Olson
+
+@item
+Magnus Persson
+
+@item
+Chris Pollard
+
+@item
+Richard Polton
+
+@item
+Derk Reefman
+
+@item
+David Rees
+
+@item
+Paul Reilly
+
+@item
+Tom Reilly
+
+@item
+Torsten Rueger
+
+@item
+Danny Sadinoff
+
+@item
+Marc Schifer
+
+@item
+Erik Schnetter
+
+@item
+Wayne K. Schroll
+
+@item
+David Schuler
+
+@item
+Vin Shelton
+
+@item
+Tim Souder
+
+@item
+Adam Sulmicki
+
+@item
+Bill Thorson
+
+@item
+George Talbot
+
+@item
+Pedro A. M. Vazquez
+
+@item
+Gregory Warnes
+
+@item
+Ian Watson
+
+@item
+David E. Young
+
+@item
+And many others
+@end itemize
+
+And finally we'd like to thank everyone who uses the compiler, provides
+feedback and generally reminds us why we're doing this work in the first
+place.
diff --git a/gcc/doc/contribute.texi b/gcc/doc/contribute.texi
new file mode 100644
index 000000000..55049f1b7
--- /dev/null
+++ b/gcc/doc/contribute.texi
@@ -0,0 +1,25 @@
+@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+@c 1999, 2000, 2001, 2004, 2006 Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Contributing
+@chapter Contributing to GCC Development
+
+If you would like to help pretest GCC releases to assure they work well,
+current development sources are available by SVN (see
+@uref{http://gcc.gnu.org/svn.html}).  Source and binary snapshots are
+also available for FTP; see @uref{http://gcc.gnu.org/snapshots.html}.
+
+If you would like to work on improvements to GCC, please read the
+advice at these URLs:
+
+@smallexample
+@uref{http://gcc.gnu.org/contribute.html}
+@uref{http://gcc.gnu.org/contributewhy.html}
+@end smallexample
+
+@noindent
+for information on how to make useful contributions and avoid
+duplication of effort.  Suggested projects are listed at
+@uref{http://gcc.gnu.org/projects/}.
diff --git a/gcc/doc/cpp.1 b/gcc/doc/cpp.1
new file mode 100644
index 000000000..2f4065f9b
--- /dev/null
+++ b/gcc/doc/cpp.1
@@ -0,0 +1,992 @@
+.\" Automatically generated by Pod::Man 2.25 (Pod::Simple 3.16)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  \*(C+ will
+.\" give a nicer C++.  Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available.  \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
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+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
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+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "CPP 1"
+.TH CPP 1 "2013-04-12" "gcc-4.6.4" "GNU"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+cpp \- The C Preprocessor
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+cpp [\fB\-D\fR\fImacro\fR[=\fIdefn\fR]...] [\fB\-U\fR\fImacro\fR]
+    [\fB\-I\fR\fIdir\fR...] [\fB\-iquote\fR\fIdir\fR...]
+    [\fB\-W\fR\fIwarn\fR...]
+    [\fB\-M\fR|\fB\-MM\fR] [\fB\-MG\fR] [\fB\-MF\fR \fIfilename\fR]
+    [\fB\-MP\fR] [\fB\-MQ\fR \fItarget\fR...]
+    [\fB\-MT\fR \fItarget\fR...]
+    [\fB\-P\fR] [\fB\-fno\-working\-directory\fR]
+    [\fB\-x\fR \fIlanguage\fR] [\fB\-std=\fR\fIstandard\fR]
+    \fIinfile\fR \fIoutfile\fR
+.PP
+Only the most useful options are listed here; see below for the remainder.
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+The C preprocessor, often known as \fIcpp\fR, is a \fImacro processor\fR
+that is used automatically by the C compiler to transform your program
+before compilation.  It is called a macro processor because it allows
+you to define \fImacros\fR, which are brief abbreviations for longer
+constructs.
+.PP
+The C preprocessor is intended to be used only with C, \*(C+, and
+Objective-C source code.  In the past, it has been abused as a general
+text processor.  It will choke on input which does not obey C's lexical
+rules.  For example, apostrophes will be interpreted as the beginning of
+character constants, and cause errors.  Also, you cannot rely on it
+preserving characteristics of the input which are not significant to
+C\-family languages.  If a Makefile is preprocessed, all the hard tabs
+will be removed, and the Makefile will not work.
+.PP
+Having said that, you can often get away with using cpp on things which
+are not C.  Other Algol-ish programming languages are often safe
+(Pascal, Ada, etc.) So is assembly, with caution.  \fB\-traditional\-cpp\fR
+mode preserves more white space, and is otherwise more permissive.  Many
+of the problems can be avoided by writing C or \*(C+ style comments
+instead of native language comments, and keeping macros simple.
+.PP
+Wherever possible, you should use a preprocessor geared to the language
+you are writing in.  Modern versions of the \s-1GNU\s0 assembler have macro
+facilities.  Most high level programming languages have their own
+conditional compilation and inclusion mechanism.  If all else fails,
+try a true general text processor, such as \s-1GNU\s0 M4.
+.PP
+C preprocessors vary in some details.  This manual discusses the \s-1GNU\s0 C
+preprocessor, which provides a small superset of the features of \s-1ISO\s0
+Standard C.  In its default mode, the \s-1GNU\s0 C preprocessor does not do a
+few things required by the standard.  These are features which are
+rarely, if ever, used, and may cause surprising changes to the meaning
+of a program which does not expect them.  To get strict \s-1ISO\s0 Standard C,
+you should use the \fB\-std=c90\fR, \fB\-std=c99\fR or
+\&\fB\-std=c1x\fR options, depending
+on which version of the standard you want.  To get all the mandatory
+diagnostics, you must also use \fB\-pedantic\fR.
+.PP
+This manual describes the behavior of the \s-1ISO\s0 preprocessor.  To
+minimize gratuitous differences, where the \s-1ISO\s0 preprocessor's
+behavior does not conflict with traditional semantics, the
+traditional preprocessor should behave the same way.  The various
+differences that do exist are detailed in the section \fBTraditional
+Mode\fR.
+.PP
+For clarity, unless noted otherwise, references to \fB\s-1CPP\s0\fR in this
+manual refer to \s-1GNU\s0 \s-1CPP\s0.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The C preprocessor expects two file names as arguments, \fIinfile\fR and
+\&\fIoutfile\fR.  The preprocessor reads \fIinfile\fR together with any
+other files it specifies with \fB#include\fR.  All the output generated
+by the combined input files is written in \fIoutfile\fR.
+.PP
+Either \fIinfile\fR or \fIoutfile\fR may be \fB\-\fR, which as
+\&\fIinfile\fR means to read from standard input and as \fIoutfile\fR
+means to write to standard output.  Also, if either file is omitted, it
+means the same as if \fB\-\fR had been specified for that file.
+.PP
+Unless otherwise noted, or the option ends in \fB=\fR, all options
+which take an argument may have that argument appear either immediately
+after the option, or with a space between option and argument:
+\&\fB\-Ifoo\fR and \fB\-I foo\fR have the same effect.
+.PP
+Many options have multi-letter names; therefore multiple single-letter
+options may \fInot\fR be grouped: \fB\-dM\fR is very different from
+\&\fB\-d\ \-M\fR.
+.IP "\fB\-D\fR \fIname\fR" 4
+.IX Item "-D name"
+Predefine \fIname\fR as a macro, with definition \f(CW1\fR.
+.IP "\fB\-D\fR \fIname\fR\fB=\fR\fIdefinition\fR" 4
+.IX Item "-D name=definition"
+The contents of \fIdefinition\fR are tokenized and processed as if
+they appeared during translation phase three in a \fB#define\fR
+directive.  In particular, the definition will be truncated by
+embedded newline characters.
+.Sp
+If you are invoking the preprocessor from a shell or shell-like
+program you may need to use the shell's quoting syntax to protect
+characters such as spaces that have a meaning in the shell syntax.
+.Sp
+If you wish to define a function-like macro on the command line, write
+its argument list with surrounding parentheses before the equals sign
+(if any).  Parentheses are meaningful to most shells, so you will need
+to quote the option.  With \fBsh\fR and \fBcsh\fR,
+\&\fB\-D'\fR\fIname\fR\fB(\fR\fIargs...\fR\fB)=\fR\fIdefinition\fR\fB'\fR works.
+.Sp
+\&\fB\-D\fR and \fB\-U\fR options are processed in the order they
+are given on the command line.  All \fB\-imacros\fR \fIfile\fR and
+\&\fB\-include\fR \fIfile\fR options are processed after all
+\&\fB\-D\fR and \fB\-U\fR options.
+.IP "\fB\-U\fR \fIname\fR" 4
+.IX Item "-U name"
+Cancel any previous definition of \fIname\fR, either built in or
+provided with a \fB\-D\fR option.
+.IP "\fB\-undef\fR" 4
+.IX Item "-undef"
+Do not predefine any system-specific or GCC-specific macros.  The
+standard predefined macros remain defined.
+.IP "\fB\-I\fR \fIdir\fR" 4
+.IX Item "-I dir"
+Add the directory \fIdir\fR to the list of directories to be searched
+for header files.
+.Sp
+Directories named by \fB\-I\fR are searched before the standard
+system include directories.  If the directory \fIdir\fR is a standard
+system include directory, the option is ignored to ensure that the
+default search order for system directories and the special treatment
+of system headers are not defeated
+\&.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-o\fR \fIfile\fR" 4
+.IX Item "-o file"
+Write output to \fIfile\fR.  This is the same as specifying \fIfile\fR
+as the second non-option argument to \fBcpp\fR.  \fBgcc\fR has a
+different interpretation of a second non-option argument, so you must
+use \fB\-o\fR to specify the output file.
+.IP "\fB\-Wall\fR" 4
+.IX Item "-Wall"
+Turns on all optional warnings which are desirable for normal code.
+At present this is \fB\-Wcomment\fR, \fB\-Wtrigraphs\fR,
+\&\fB\-Wmultichar\fR and a warning about integer promotion causing a
+change of sign in \f(CW\*(C`#if\*(C'\fR expressions.  Note that many of the
+preprocessor's warnings are on by default and have no options to
+control them.
+.IP "\fB\-Wcomment\fR" 4
+.IX Item "-Wcomment"
+.PD 0
+.IP "\fB\-Wcomments\fR" 4
+.IX Item "-Wcomments"
+.PD
+Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
+comment, or whenever a backslash-newline appears in a \fB//\fR comment.
+(Both forms have the same effect.)
+.IP "\fB\-Wtrigraphs\fR" 4
+.IX Item "-Wtrigraphs"
+Most trigraphs in comments cannot affect the meaning of the program.
+However, a trigraph that would form an escaped newline (\fB??/\fR at
+the end of a line) can, by changing where the comment begins or ends.
+Therefore, only trigraphs that would form escaped newlines produce
+warnings inside a comment.
+.Sp
+This option is implied by \fB\-Wall\fR.  If \fB\-Wall\fR is not
+given, this option is still enabled unless trigraphs are enabled.  To
+get trigraph conversion without warnings, but get the other
+\&\fB\-Wall\fR warnings, use \fB\-trigraphs \-Wall \-Wno\-trigraphs\fR.
+.IP "\fB\-Wtraditional\fR" 4
+.IX Item "-Wtraditional"
+Warn about certain constructs that behave differently in traditional and
+\&\s-1ISO\s0 C.  Also warn about \s-1ISO\s0 C constructs that have no traditional C
+equivalent, and problematic constructs which should be avoided.
+.IP "\fB\-Wundef\fR" 4
+.IX Item "-Wundef"
+Warn whenever an identifier which is not a macro is encountered in an
+\&\fB#if\fR directive, outside of \fBdefined\fR.  Such identifiers are
+replaced with zero.
+.IP "\fB\-Wunused\-macros\fR" 4
+.IX Item "-Wunused-macros"
+Warn about macros defined in the main file that are unused.  A macro
+is \fIused\fR if it is expanded or tested for existence at least once.
+The preprocessor will also warn if the macro has not been used at the
+time it is redefined or undefined.
+.Sp
+Built-in macros, macros defined on the command line, and macros
+defined in include files are not warned about.
+.Sp
+\&\fINote:\fR If a macro is actually used, but only used in skipped
+conditional blocks, then \s-1CPP\s0 will report it as unused.  To avoid the
+warning in such a case, you might improve the scope of the macro's
+definition by, for example, moving it into the first skipped block.
+Alternatively, you could provide a dummy use with something like:
+.Sp
+.Vb 2
+\&        #if defined the_macro_causing_the_warning
+\&        #endif
+.Ve
+.IP "\fB\-Wendif\-labels\fR" 4
+.IX Item "-Wendif-labels"
+Warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
+This usually happens in code of the form
+.Sp
+.Vb 5
+\&        #if FOO
+\&        ...
+\&        #else FOO
+\&        ...
+\&        #endif FOO
+.Ve
+.Sp
+The second and third \f(CW\*(C`FOO\*(C'\fR should be in comments, but often are not
+in older programs.  This warning is on by default.
+.IP "\fB\-Werror\fR" 4
+.IX Item "-Werror"
+Make all warnings into hard errors.  Source code which triggers warnings
+will be rejected.
+.IP "\fB\-Wsystem\-headers\fR" 4
+.IX Item "-Wsystem-headers"
+Issue warnings for code in system headers.  These are normally unhelpful
+in finding bugs in your own code, therefore suppressed.  If you are
+responsible for the system library, you may want to see them.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+Suppress all warnings, including those which \s-1GNU\s0 \s-1CPP\s0 issues by default.
+.IP "\fB\-pedantic\fR" 4
+.IX Item "-pedantic"
+Issue all the mandatory diagnostics listed in the C standard.  Some of
+them are left out by default, since they trigger frequently on harmless
+code.
+.IP "\fB\-pedantic\-errors\fR" 4
+.IX Item "-pedantic-errors"
+Issue all the mandatory diagnostics, and make all mandatory diagnostics
+into errors.  This includes mandatory diagnostics that \s-1GCC\s0 issues
+without \fB\-pedantic\fR but treats as warnings.
+.IP "\fB\-M\fR" 4
+.IX Item "-M"
+Instead of outputting the result of preprocessing, output a rule
+suitable for \fBmake\fR describing the dependencies of the main
+source file.  The preprocessor outputs one \fBmake\fR rule containing
+the object file name for that source file, a colon, and the names of all
+the included files, including those coming from \fB\-include\fR or
+\&\fB\-imacros\fR command line options.
+.Sp
+Unless specified explicitly (with \fB\-MT\fR or \fB\-MQ\fR), the
+object file name consists of the name of the source file with any
+suffix replaced with object file suffix and with any leading directory
+parts removed.  If there are many included files then the rule is
+split into several lines using \fB\e\fR\-newline.  The rule has no
+commands.
+.Sp
+This option does not suppress the preprocessor's debug output, such as
+\&\fB\-dM\fR.  To avoid mixing such debug output with the dependency
+rules you should explicitly specify the dependency output file with
+\&\fB\-MF\fR, or use an environment variable like
+\&\fB\s-1DEPENDENCIES_OUTPUT\s0\fR.  Debug output
+will still be sent to the regular output stream as normal.
+.Sp
+Passing \fB\-M\fR to the driver implies \fB\-E\fR, and suppresses
+warnings with an implicit \fB\-w\fR.
+.IP "\fB\-MM\fR" 4
+.IX Item "-MM"
+Like \fB\-M\fR but do not mention header files that are found in
+system header directories, nor header files that are included,
+directly or indirectly, from such a header.
+.Sp
+This implies that the choice of angle brackets or double quotes in an
+\&\fB#include\fR directive does not in itself determine whether that
+header will appear in \fB\-MM\fR dependency output.  This is a
+slight change in semantics from \s-1GCC\s0 versions 3.0 and earlier.
+.IP "\fB\-MF\fR \fIfile\fR" 4
+.IX Item "-MF file"
+When used with \fB\-M\fR or \fB\-MM\fR, specifies a
+file to write the dependencies to.  If no \fB\-MF\fR switch is given
+the preprocessor sends the rules to the same place it would have sent
+preprocessed output.
+.Sp
+When used with the driver options \fB\-MD\fR or \fB\-MMD\fR,
+\&\fB\-MF\fR overrides the default dependency output file.
+.IP "\fB\-MG\fR" 4
+.IX Item "-MG"
+In conjunction with an option such as \fB\-M\fR requesting
+dependency generation, \fB\-MG\fR assumes missing header files are
+generated files and adds them to the dependency list without raising
+an error.  The dependency filename is taken directly from the
+\&\f(CW\*(C`#include\*(C'\fR directive without prepending any path.  \fB\-MG\fR
+also suppresses preprocessed output, as a missing header file renders
+this useless.
+.Sp
+This feature is used in automatic updating of makefiles.
+.IP "\fB\-MP\fR" 4
+.IX Item "-MP"
+This option instructs \s-1CPP\s0 to add a phony target for each dependency
+other than the main file, causing each to depend on nothing.  These
+dummy rules work around errors \fBmake\fR gives if you remove header
+files without updating the \fIMakefile\fR to match.
+.Sp
+This is typical output:
+.Sp
+.Vb 1
+\&        test.o: test.c test.h
+\&        
+\&        test.h:
+.Ve
+.IP "\fB\-MT\fR \fItarget\fR" 4
+.IX Item "-MT target"
+Change the target of the rule emitted by dependency generation.  By
+default \s-1CPP\s0 takes the name of the main input file, deletes any
+directory components and any file suffix such as \fB.c\fR, and
+appends the platform's usual object suffix.  The result is the target.
+.Sp
+An \fB\-MT\fR option will set the target to be exactly the string you
+specify.  If you want multiple targets, you can specify them as a single
+argument to \fB\-MT\fR, or use multiple \fB\-MT\fR options.
+.Sp
+For example, \fB\-MT\ '$(objpfx)foo.o'\fR might give
+.Sp
+.Vb 1
+\&        $(objpfx)foo.o: foo.c
+.Ve
+.IP "\fB\-MQ\fR \fItarget\fR" 4
+.IX Item "-MQ target"
+Same as \fB\-MT\fR, but it quotes any characters which are special to
+Make.  \fB\-MQ\ '$(objpfx)foo.o'\fR gives
+.Sp
+.Vb 1
+\&        $$(objpfx)foo.o: foo.c
+.Ve
+.Sp
+The default target is automatically quoted, as if it were given with
+\&\fB\-MQ\fR.
+.IP "\fB\-MD\fR" 4
+.IX Item "-MD"
+\&\fB\-MD\fR is equivalent to \fB\-M \-MF\fR \fIfile\fR, except that
+\&\fB\-E\fR is not implied.  The driver determines \fIfile\fR based on
+whether an \fB\-o\fR option is given.  If it is, the driver uses its
+argument but with a suffix of \fI.d\fR, otherwise it takes the name
+of the input file, removes any directory components and suffix, and
+applies a \fI.d\fR suffix.
+.Sp
+If \fB\-MD\fR is used in conjunction with \fB\-E\fR, any
+\&\fB\-o\fR switch is understood to specify the dependency output file, but if used without \fB\-E\fR, each \fB\-o\fR
+is understood to specify a target object file.
+.Sp
+Since \fB\-E\fR is not implied, \fB\-MD\fR can be used to generate
+a dependency output file as a side-effect of the compilation process.
+.IP "\fB\-MMD\fR" 4
+.IX Item "-MMD"
+Like \fB\-MD\fR except mention only user header files, not system
+header files.
+.IP "\fB\-x c\fR" 4
+.IX Item "-x c"
+.PD 0
+.IP "\fB\-x c++\fR" 4
+.IX Item "-x c++"
+.IP "\fB\-x objective-c\fR" 4
+.IX Item "-x objective-c"
+.IP "\fB\-x assembler-with-cpp\fR" 4
+.IX Item "-x assembler-with-cpp"
+.PD
+Specify the source language: C, \*(C+, Objective-C, or assembly.  This has
+nothing to do with standards conformance or extensions; it merely
+selects which base syntax to expect.  If you give none of these options,
+cpp will deduce the language from the extension of the source file:
+\&\fB.c\fR, \fB.cc\fR, \fB.m\fR, or \fB.S\fR.  Some other common
+extensions for \*(C+ and assembly are also recognized.  If cpp does not
+recognize the extension, it will treat the file as C; this is the most
+generic mode.
+.Sp
+\&\fINote:\fR Previous versions of cpp accepted a \fB\-lang\fR option
+which selected both the language and the standards conformance level.
+This option has been removed, because it conflicts with the \fB\-l\fR
+option.
+.IP "\fB\-std=\fR\fIstandard\fR" 4
+.IX Item "-std=standard"
+.PD 0
+.IP "\fB\-ansi\fR" 4
+.IX Item "-ansi"
+.PD
+Specify the standard to which the code should conform.  Currently \s-1CPP\s0
+knows about C and \*(C+ standards; others may be added in the future.
+.Sp
+\&\fIstandard\fR
+may be one of:
+.RS 4
+.ie n .IP """c90""" 4
+.el .IP "\f(CWc90\fR" 4
+.IX Item "c90"
+.PD 0
+.ie n .IP """c89""" 4
+.el .IP "\f(CWc89\fR" 4
+.IX Item "c89"
+.ie n .IP """iso9899:1990""" 4
+.el .IP "\f(CWiso9899:1990\fR" 4
+.IX Item "iso9899:1990"
+.PD
+The \s-1ISO\s0 C standard from 1990.  \fBc90\fR is the customary shorthand for
+this version of the standard.
+.Sp
+The \fB\-ansi\fR option is equivalent to \fB\-std=c90\fR.
+.ie n .IP """iso9899:199409""" 4
+.el .IP "\f(CWiso9899:199409\fR" 4
+.IX Item "iso9899:199409"
+The 1990 C standard, as amended in 1994.
+.ie n .IP """iso9899:1999""" 4
+.el .IP "\f(CWiso9899:1999\fR" 4
+.IX Item "iso9899:1999"
+.PD 0
+.ie n .IP """c99""" 4
+.el .IP "\f(CWc99\fR" 4
+.IX Item "c99"
+.ie n .IP """iso9899:199x""" 4
+.el .IP "\f(CWiso9899:199x\fR" 4
+.IX Item "iso9899:199x"
+.ie n .IP """c9x""" 4
+.el .IP "\f(CWc9x\fR" 4
+.IX Item "c9x"
+.PD
+The revised \s-1ISO\s0 C standard, published in December 1999.  Before
+publication, this was known as C9X.
+.ie n .IP """c1x""" 4
+.el .IP "\f(CWc1x\fR" 4
+.IX Item "c1x"
+The next version of the \s-1ISO\s0 C standard, still under development.
+.ie n .IP """gnu90""" 4
+.el .IP "\f(CWgnu90\fR" 4
+.IX Item "gnu90"
+.PD 0
+.ie n .IP """gnu89""" 4
+.el .IP "\f(CWgnu89\fR" 4
+.IX Item "gnu89"
+.PD
+The 1990 C standard plus \s-1GNU\s0 extensions.  This is the default.
+.ie n .IP """gnu99""" 4
+.el .IP "\f(CWgnu99\fR" 4
+.IX Item "gnu99"
+.PD 0
+.ie n .IP """gnu9x""" 4
+.el .IP "\f(CWgnu9x\fR" 4
+.IX Item "gnu9x"
+.PD
+The 1999 C standard plus \s-1GNU\s0 extensions.
+.ie n .IP """gnu1x""" 4
+.el .IP "\f(CWgnu1x\fR" 4
+.IX Item "gnu1x"
+The next version of the \s-1ISO\s0 C standard, still under development, plus
+\&\s-1GNU\s0 extensions.
+.ie n .IP """c++98""" 4
+.el .IP "\f(CWc++98\fR" 4
+.IX Item "c++98"
+The 1998 \s-1ISO\s0 \*(C+ standard plus amendments.
+.ie n .IP """gnu++98""" 4
+.el .IP "\f(CWgnu++98\fR" 4
+.IX Item "gnu++98"
+The same as \fB\-std=c++98\fR plus \s-1GNU\s0 extensions.  This is the
+default for \*(C+ code.
+.RE
+.RS 4
+.RE
+.IP "\fB\-I\-\fR" 4
+.IX Item "-I-"
+Split the include path.  Any directories specified with \fB\-I\fR
+options before \fB\-I\-\fR are searched only for headers requested with
+\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
+\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR.  If additional directories are
+specified with \fB\-I\fR options after the \fB\-I\-\fR, those
+directories are searched for all \fB#include\fR directives.
+.Sp
+In addition, \fB\-I\-\fR inhibits the use of the directory of the current
+file directory as the first search directory for \f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR.
+.Sp
+This option has been deprecated.
+.IP "\fB\-nostdinc\fR" 4
+.IX Item "-nostdinc"
+Do not search the standard system directories for header files.
+Only the directories you have specified with \fB\-I\fR options
+(and the directory of the current file, if appropriate) are searched.
+.IP "\fB\-nostdinc++\fR" 4
+.IX Item "-nostdinc++"
+Do not search for header files in the \*(C+\-specific standard directories,
+but do still search the other standard directories.  (This option is
+used when building the \*(C+ library.)
+.IP "\fB\-include\fR \fIfile\fR" 4
+.IX Item "-include file"
+Process \fIfile\fR as if \f(CW\*(C`#include "file"\*(C'\fR appeared as the first
+line of the primary source file.  However, the first directory searched
+for \fIfile\fR is the preprocessor's working directory \fIinstead of\fR
+the directory containing the main source file.  If not found there, it
+is searched for in the remainder of the \f(CW\*(C`#include "..."\*(C'\fR search
+chain as normal.
+.Sp
+If multiple \fB\-include\fR options are given, the files are included
+in the order they appear on the command line.
+.IP "\fB\-imacros\fR \fIfile\fR" 4
+.IX Item "-imacros file"
+Exactly like \fB\-include\fR, except that any output produced by
+scanning \fIfile\fR is thrown away.  Macros it defines remain defined.
+This allows you to acquire all the macros from a header without also
+processing its declarations.
+.Sp
+All files specified by \fB\-imacros\fR are processed before all files
+specified by \fB\-include\fR.
+.IP "\fB\-idirafter\fR \fIdir\fR" 4
+.IX Item "-idirafter dir"
+Search \fIdir\fR for header files, but do it \fIafter\fR all
+directories specified with \fB\-I\fR and the standard system directories
+have been exhausted.  \fIdir\fR is treated as a system include directory.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-iprefix\fR \fIprefix\fR" 4
+.IX Item "-iprefix prefix"
+Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR
+options.  If the prefix represents a directory, you should include the
+final \fB/\fR.
+.IP "\fB\-iwithprefix\fR \fIdir\fR" 4
+.IX Item "-iwithprefix dir"
+.PD 0
+.IP "\fB\-iwithprefixbefore\fR \fIdir\fR" 4
+.IX Item "-iwithprefixbefore dir"
+.PD
+Append \fIdir\fR to the prefix specified previously with
+\&\fB\-iprefix\fR, and add the resulting directory to the include search
+path.  \fB\-iwithprefixbefore\fR puts it in the same place \fB\-I\fR
+would; \fB\-iwithprefix\fR puts it where \fB\-idirafter\fR would.
+.IP "\fB\-isysroot\fR \fIdir\fR" 4
+.IX Item "-isysroot dir"
+This option is like the \fB\-\-sysroot\fR option, but applies only to
+header files (except for Darwin targets, where it applies to both header
+files and libraries).  See the \fB\-\-sysroot\fR option for more
+information.
+.IP "\fB\-imultilib\fR \fIdir\fR" 4
+.IX Item "-imultilib dir"
+Use \fIdir\fR as a subdirectory of the directory containing
+target-specific \*(C+ headers.
+.IP "\fB\-isystem\fR \fIdir\fR" 4
+.IX Item "-isystem dir"
+Search \fIdir\fR for header files, after all directories specified by
+\&\fB\-I\fR but before the standard system directories.  Mark it
+as a system directory, so that it gets the same special treatment as
+is applied to the standard system directories.
+.Sp
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-iquote\fR \fIdir\fR" 4
+.IX Item "-iquote dir"
+Search \fIdir\fR only for header files requested with
+\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
+\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR, before all directories specified by
+\&\fB\-I\fR and before the standard system directories.
+.Sp
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-fdirectives\-only\fR" 4
+.IX Item "-fdirectives-only"
+When preprocessing, handle directives, but do not expand macros.
+.Sp
+The option's behavior depends on the \fB\-E\fR and \fB\-fpreprocessed\fR
+options.
+.Sp
+With \fB\-E\fR, preprocessing is limited to the handling of directives
+such as \f(CW\*(C`#define\*(C'\fR, \f(CW\*(C`#ifdef\*(C'\fR, and \f(CW\*(C`#error\*(C'\fR.  Other
+preprocessor operations, such as macro expansion and trigraph
+conversion are not performed.  In addition, the \fB\-dD\fR option is
+implicitly enabled.
+.Sp
+With \fB\-fpreprocessed\fR, predefinition of command line and most
+builtin macros is disabled.  Macros such as \f(CW\*(C`_\|_LINE_\|_\*(C'\fR, which are
+contextually dependent, are handled normally.  This enables compilation of
+files previously preprocessed with \f(CW\*(C`\-E \-fdirectives\-only\*(C'\fR.
+.Sp
+With both \fB\-E\fR and \fB\-fpreprocessed\fR, the rules for
+\&\fB\-fpreprocessed\fR take precedence.  This enables full preprocessing of
+files previously preprocessed with \f(CW\*(C`\-E \-fdirectives\-only\*(C'\fR.
+.IP "\fB\-fdollars\-in\-identifiers\fR" 4
+.IX Item "-fdollars-in-identifiers"
+Accept \fB$\fR in identifiers.
+.IP "\fB\-fextended\-identifiers\fR" 4
+.IX Item "-fextended-identifiers"
+Accept universal character names in identifiers.  This option is
+experimental; in a future version of \s-1GCC\s0, it will be enabled by
+default for C99 and \*(C+.
+.IP "\fB\-fpreprocessed\fR" 4
+.IX Item "-fpreprocessed"
+Indicate to the preprocessor that the input file has already been
+preprocessed.  This suppresses things like macro expansion, trigraph
+conversion, escaped newline splicing, and processing of most directives.
+The preprocessor still recognizes and removes comments, so that you can
+pass a file preprocessed with \fB\-C\fR to the compiler without
+problems.  In this mode the integrated preprocessor is little more than
+a tokenizer for the front ends.
+.Sp
+\&\fB\-fpreprocessed\fR is implicit if the input file has one of the
+extensions \fB.i\fR, \fB.ii\fR or \fB.mi\fR.  These are the
+extensions that \s-1GCC\s0 uses for preprocessed files created by
+\&\fB\-save\-temps\fR.
+.IP "\fB\-ftabstop=\fR\fIwidth\fR" 4
+.IX Item "-ftabstop=width"
+Set the distance between tab stops.  This helps the preprocessor report
+correct column numbers in warnings or errors, even if tabs appear on the
+line.  If the value is less than 1 or greater than 100, the option is
+ignored.  The default is 8.
+.IP "\fB\-fexec\-charset=\fR\fIcharset\fR" 4
+.IX Item "-fexec-charset=charset"
+Set the execution character set, used for string and character
+constants.  The default is \s-1UTF\-8\s0.  \fIcharset\fR can be any encoding
+supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
+.IP "\fB\-fwide\-exec\-charset=\fR\fIcharset\fR" 4
+.IX Item "-fwide-exec-charset=charset"
+Set the wide execution character set, used for wide string and
+character constants.  The default is \s-1UTF\-32\s0 or \s-1UTF\-16\s0, whichever
+corresponds to the width of \f(CW\*(C`wchar_t\*(C'\fR.  As with
+\&\fB\-fexec\-charset\fR, \fIcharset\fR can be any encoding supported
+by the system's \f(CW\*(C`iconv\*(C'\fR library routine; however, you will have
+problems with encodings that do not fit exactly in \f(CW\*(C`wchar_t\*(C'\fR.
+.IP "\fB\-finput\-charset=\fR\fIcharset\fR" 4
+.IX Item "-finput-charset=charset"
+Set the input character set, used for translation from the character
+set of the input file to the source character set used by \s-1GCC\s0.  If the
+locale does not specify, or \s-1GCC\s0 cannot get this information from the
+locale, the default is \s-1UTF\-8\s0.  This can be overridden by either the locale
+or this command line option.  Currently the command line option takes
+precedence if there's a conflict.  \fIcharset\fR can be any encoding
+supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
+.IP "\fB\-fworking\-directory\fR" 4
+.IX Item "-fworking-directory"
+Enable generation of linemarkers in the preprocessor output that will
+let the compiler know the current working directory at the time of
+preprocessing.  When this option is enabled, the preprocessor will
+emit, after the initial linemarker, a second linemarker with the
+current working directory followed by two slashes.  \s-1GCC\s0 will use this
+directory, when it's present in the preprocessed input, as the
+directory emitted as the current working directory in some debugging
+information formats.  This option is implicitly enabled if debugging
+information is enabled, but this can be inhibited with the negated
+form \fB\-fno\-working\-directory\fR.  If the \fB\-P\fR flag is
+present in the command line, this option has no effect, since no
+\&\f(CW\*(C`#line\*(C'\fR directives are emitted whatsoever.
+.IP "\fB\-fno\-show\-column\fR" 4
+.IX Item "-fno-show-column"
+Do not print column numbers in diagnostics.  This may be necessary if
+diagnostics are being scanned by a program that does not understand the
+column numbers, such as \fBdejagnu\fR.
+.IP "\fB\-A\fR \fIpredicate\fR\fB=\fR\fIanswer\fR" 4
+.IX Item "-A predicate=answer"
+Make an assertion with the predicate \fIpredicate\fR and answer
+\&\fIanswer\fR.  This form is preferred to the older form \fB\-A\fR
+\&\fIpredicate\fR\fB(\fR\fIanswer\fR\fB)\fR, which is still supported, because
+it does not use shell special characters.
+.IP "\fB\-A \-\fR\fIpredicate\fR\fB=\fR\fIanswer\fR" 4
+.IX Item "-A -predicate=answer"
+Cancel an assertion with the predicate \fIpredicate\fR and answer
+\&\fIanswer\fR.
+.IP "\fB\-dCHARS\fR" 4
+.IX Item "-dCHARS"
+\&\fI\s-1CHARS\s0\fR is a sequence of one or more of the following characters,
+and must not be preceded by a space.  Other characters are interpreted
+by the compiler proper, or reserved for future versions of \s-1GCC\s0, and so
+are silently ignored.  If you specify characters whose behavior
+conflicts, the result is undefined.
+.RS 4
+.IP "\fBM\fR" 4
+.IX Item "M"
+Instead of the normal output, generate a list of \fB#define\fR
+directives for all the macros defined during the execution of the
+preprocessor, including predefined macros.  This gives you a way of
+finding out what is predefined in your version of the preprocessor.
+Assuming you have no file \fIfoo.h\fR, the command
+.Sp
+.Vb 1
+\&        touch foo.h; cpp \-dM foo.h
+.Ve
+.Sp
+will show all the predefined macros.
+.Sp
+If you use \fB\-dM\fR without the \fB\-E\fR option, \fB\-dM\fR is
+interpreted as a synonym for \fB\-fdump\-rtl\-mach\fR.
+.IP "\fBD\fR" 4
+.IX Item "D"
+Like \fBM\fR except in two respects: it does \fInot\fR include the
+predefined macros, and it outputs \fIboth\fR the \fB#define\fR
+directives and the result of preprocessing.  Both kinds of output go to
+the standard output file.
+.IP "\fBN\fR" 4
+.IX Item "N"
+Like \fBD\fR, but emit only the macro names, not their expansions.
+.IP "\fBI\fR" 4
+.IX Item "I"
+Output \fB#include\fR directives in addition to the result of
+preprocessing.
+.IP "\fBU\fR" 4
+.IX Item "U"
+Like \fBD\fR except that only macros that are expanded, or whose
+definedness is tested in preprocessor directives, are output; the
+output is delayed until the use or test of the macro; and
+\&\fB#undef\fR directives are also output for macros tested but
+undefined at the time.
+.RE
+.RS 4
+.RE
+.IP "\fB\-P\fR" 4
+.IX Item "-P"
+Inhibit generation of linemarkers in the output from the preprocessor.
+This might be useful when running the preprocessor on something that is
+not C code, and will be sent to a program which might be confused by the
+linemarkers.
+.IP "\fB\-C\fR" 4
+.IX Item "-C"
+Do not discard comments.  All comments are passed through to the output
+file, except for comments in processed directives, which are deleted
+along with the directive.
+.Sp
+You should be prepared for side effects when using \fB\-C\fR; it
+causes the preprocessor to treat comments as tokens in their own right.
+For example, comments appearing at the start of what would be a
+directive line have the effect of turning that line into an ordinary
+source line, since the first token on the line is no longer a \fB#\fR.
+.IP "\fB\-CC\fR" 4
+.IX Item "-CC"
+Do not discard comments, including during macro expansion.  This is
+like \fB\-C\fR, except that comments contained within macros are
+also passed through to the output file where the macro is expanded.
+.Sp
+In addition to the side-effects of the \fB\-C\fR option, the
+\&\fB\-CC\fR option causes all \*(C+\-style comments inside a macro
+to be converted to C\-style comments.  This is to prevent later use
+of that macro from inadvertently commenting out the remainder of
+the source line.
+.Sp
+The \fB\-CC\fR option is generally used to support lint comments.
+.IP "\fB\-traditional\-cpp\fR" 4
+.IX Item "-traditional-cpp"
+Try to imitate the behavior of old-fashioned C preprocessors, as
+opposed to \s-1ISO\s0 C preprocessors.
+.IP "\fB\-trigraphs\fR" 4
+.IX Item "-trigraphs"
+Process trigraph sequences.
+.IP "\fB\-remap\fR" 4
+.IX Item "-remap"
+Enable special code to work around file systems which only permit very
+short file names, such as MS-DOS.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD 0
+.IP "\fB\-\-target\-help\fR" 4
+.IX Item "--target-help"
+.PD
+Print text describing all the command line options instead of
+preprocessing anything.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+Verbose mode.  Print out \s-1GNU\s0 \s-1CPP\s0's version number at the beginning of
+execution, and report the final form of the include path.
+.IP "\fB\-H\fR" 4
+.IX Item "-H"
+Print the name of each header file used, in addition to other normal
+activities.  Each name is indented to show how deep in the
+\&\fB#include\fR stack it is.  Precompiled header files are also
+printed, even if they are found to be invalid; an invalid precompiled
+header file is printed with \fB...x\fR and a valid one with \fB...!\fR .
+.IP "\fB\-version\fR" 4
+.IX Item "-version"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Print out \s-1GNU\s0 \s-1CPP\s0's version number.  With one dash, proceed to
+preprocess as normal.  With two dashes, exit immediately.
+.SH "ENVIRONMENT"
+.IX Header "ENVIRONMENT"
+This section describes the environment variables that affect how \s-1CPP\s0
+operates.  You can use them to specify directories or prefixes to use
+when searching for include files, or to control dependency output.
+.PP
+Note that you can also specify places to search using options such as
+\&\fB\-I\fR, and control dependency output with options like
+\&\fB\-M\fR.  These take precedence over
+environment variables, which in turn take precedence over the
+configuration of \s-1GCC\s0.
+.IP "\fB\s-1CPATH\s0\fR" 4
+.IX Item "CPATH"
+.PD 0
+.IP "\fBC_INCLUDE_PATH\fR" 4
+.IX Item "C_INCLUDE_PATH"
+.IP "\fB\s-1CPLUS_INCLUDE_PATH\s0\fR" 4
+.IX Item "CPLUS_INCLUDE_PATH"
+.IP "\fB\s-1OBJC_INCLUDE_PATH\s0\fR" 4
+.IX Item "OBJC_INCLUDE_PATH"
+.PD
+Each variable's value is a list of directories separated by a special
+character, much like \fB\s-1PATH\s0\fR, in which to look for header files.
+The special character, \f(CW\*(C`PATH_SEPARATOR\*(C'\fR, is target-dependent and
+determined at \s-1GCC\s0 build time.  For Microsoft Windows-based targets it is a
+semicolon, and for almost all other targets it is a colon.
+.Sp
+\&\fB\s-1CPATH\s0\fR specifies a list of directories to be searched as if
+specified with \fB\-I\fR, but after any paths given with \fB\-I\fR
+options on the command line.  This environment variable is used
+regardless of which language is being preprocessed.
+.Sp
+The remaining environment variables apply only when preprocessing the
+particular language indicated.  Each specifies a list of directories
+to be searched as if specified with \fB\-isystem\fR, but after any
+paths given with \fB\-isystem\fR options on the command line.
+.Sp
+In all these variables, an empty element instructs the compiler to
+search its current working directory.  Empty elements can appear at the
+beginning or end of a path.  For instance, if the value of
+\&\fB\s-1CPATH\s0\fR is \f(CW\*(C`:/special/include\*(C'\fR, that has the same
+effect as \fB\-I.\ \-I/special/include\fR.
+.IP "\fB\s-1DEPENDENCIES_OUTPUT\s0\fR" 4
+.IX Item "DEPENDENCIES_OUTPUT"
+If this variable is set, its value specifies how to output
+dependencies for Make based on the non-system header files processed
+by the compiler.  System header files are ignored in the dependency
+output.
+.Sp
+The value of \fB\s-1DEPENDENCIES_OUTPUT\s0\fR can be just a file name, in
+which case the Make rules are written to that file, guessing the target
+name from the source file name.  Or the value can have the form
+\&\fIfile\fR\fB \fR\fItarget\fR, in which case the rules are written to
+file \fIfile\fR using \fItarget\fR as the target name.
+.Sp
+In other words, this environment variable is equivalent to combining
+the options \fB\-MM\fR and \fB\-MF\fR,
+with an optional \fB\-MT\fR switch too.
+.IP "\fB\s-1SUNPRO_DEPENDENCIES\s0\fR" 4
+.IX Item "SUNPRO_DEPENDENCIES"
+This variable is the same as \fB\s-1DEPENDENCIES_OUTPUT\s0\fR (see above),
+except that system header files are not ignored, so it implies
+\&\fB\-M\fR rather than \fB\-MM\fR.  However, the dependence on the
+main input file is omitted.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
+\&\fIgcc\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), and the Info entries for \fIcpp\fR, \fIgcc\fR, and
+\&\fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996,
+1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
+2008, 2009, 2010, 2011
+Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation.  A copy of
+the license is included in the
+man page \fIgfdl\fR\|(7).
+This manual contains no Invariant Sections.  The Front-Cover Texts are
+(a) (see below), and the Back-Cover Texts are (b) (see below).
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\&     A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\&     You have freedom to copy and modify this GNU Manual, like GNU
+\&     software.  Copies published by the Free Software Foundation raise
+\&     funds for GNU development.
+.Ve
diff --git a/gcc/doc/cpp.info b/gcc/doc/cpp.info
new file mode 100644
index 000000000..6f042b002
--- /dev/null
+++ b/gcc/doc/cpp.info
@@ -0,0 +1,5549 @@
+This is doc/cpp.info, produced by makeinfo version 4.13 from
+/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/doc/cpp.texi.
+
+Copyright (C) 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
+1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
+2010, 2011 Free Software Foundation, Inc.
+
+   Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation.  A copy of
+the license is included in the section entitled "GNU Free Documentation
+License".
+
+   This manual contains no Invariant Sections.  The Front-Cover Texts
+are (a) (see below), and the Back-Cover Texts are (b) (see below).
+
+   (a) The FSF's Front-Cover Text is:
+
+   A GNU Manual
+
+   (b) The FSF's Back-Cover Text is:
+
+   You have freedom to copy and modify this GNU Manual, like GNU
+software.  Copies published by the Free Software Foundation raise
+funds for GNU development.
+
+INFO-DIR-SECTION Software development
+START-INFO-DIR-ENTRY
+* Cpp: (cpp).                  The GNU C preprocessor.
+END-INFO-DIR-ENTRY
+
+
+File: cpp.info,  Node: Top,  Next: Overview,  Up: (dir)
+
+The C Preprocessor
+******************
+
+The C preprocessor implements the macro language used to transform C,
+C++, and Objective-C programs before they are compiled.  It can also be
+useful on its own.
+
+* Menu:
+
+* Overview::
+* Header Files::
+* Macros::
+* Conditionals::
+* Diagnostics::
+* Line Control::
+* Pragmas::
+* Other Directives::
+* Preprocessor Output::
+* Traditional Mode::
+* Implementation Details::
+* Invocation::
+* Environment Variables::
+* GNU Free Documentation License::
+* Index of Directives::
+* Option Index::
+* Concept Index::
+
+ --- The Detailed Node Listing ---
+
+Overview
+
+* Character sets::
+* Initial processing::
+* Tokenization::
+* The preprocessing language::
+
+Header Files
+
+* Include Syntax::
+* Include Operation::
+* Search Path::
+* Once-Only Headers::
+* Alternatives to Wrapper #ifndef::
+* Computed Includes::
+* Wrapper Headers::
+* System Headers::
+
+Macros
+
+* Object-like Macros::
+* Function-like Macros::
+* Macro Arguments::
+* Stringification::
+* Concatenation::
+* Variadic Macros::
+* Predefined Macros::
+* Undefining and Redefining Macros::
+* Directives Within Macro Arguments::
+* Macro Pitfalls::
+
+Predefined Macros
+
+* Standard Predefined Macros::
+* Common Predefined Macros::
+* System-specific Predefined Macros::
+* C++ Named Operators::
+
+Macro Pitfalls
+
+* Misnesting::
+* Operator Precedence Problems::
+* Swallowing the Semicolon::
+* Duplication of Side Effects::
+* Self-Referential Macros::
+* Argument Prescan::
+* Newlines in Arguments::
+
+Conditionals
+
+* Conditional Uses::
+* Conditional Syntax::
+* Deleted Code::
+
+Conditional Syntax
+
+* Ifdef::
+* If::
+* Defined::
+* Else::
+* Elif::
+
+Implementation Details
+
+* Implementation-defined behavior::
+* Implementation limits::
+* Obsolete Features::
+* Differences from previous versions::
+
+Obsolete Features
+
+* Obsolete Features::
+
+   Copyright (C) 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
+1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
+2010, 2011 Free Software Foundation, Inc.
+
+   Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation.  A copy of
+the license is included in the section entitled "GNU Free Documentation
+License".
+
+   This manual contains no Invariant Sections.  The Front-Cover Texts
+are (a) (see below), and the Back-Cover Texts are (b) (see below).
+
+   (a) The FSF's Front-Cover Text is:
+
+   A GNU Manual
+
+   (b) The FSF's Back-Cover Text is:
+
+   You have freedom to copy and modify this GNU Manual, like GNU
+software.  Copies published by the Free Software Foundation raise
+funds for GNU development.
+
+
+File: cpp.info,  Node: Overview,  Next: Header Files,  Prev: Top,  Up: Top
+
+1 Overview
+**********
+
+The C preprocessor, often known as "cpp", is a "macro processor" that
+is used automatically by the C compiler to transform your program
+before compilation.  It is called a macro processor because it allows
+you to define "macros", which are brief abbreviations for longer
+constructs.
+
+   The C preprocessor is intended to be used only with C, C++, and
+Objective-C source code.  In the past, it has been abused as a general
+text processor.  It will choke on input which does not obey C's lexical
+rules.  For example, apostrophes will be interpreted as the beginning of
+character constants, and cause errors.  Also, you cannot rely on it
+preserving characteristics of the input which are not significant to
+C-family languages.  If a Makefile is preprocessed, all the hard tabs
+will be removed, and the Makefile will not work.
+
+   Having said that, you can often get away with using cpp on things
+which are not C.  Other Algol-ish programming languages are often safe
+(Pascal, Ada, etc.) So is assembly, with caution.  `-traditional-cpp'
+mode preserves more white space, and is otherwise more permissive.  Many
+of the problems can be avoided by writing C or C++ style comments
+instead of native language comments, and keeping macros simple.
+
+   Wherever possible, you should use a preprocessor geared to the
+language you are writing in.  Modern versions of the GNU assembler have
+macro facilities.  Most high level programming languages have their own
+conditional compilation and inclusion mechanism.  If all else fails,
+try a true general text processor, such as GNU M4.
+
+   C preprocessors vary in some details.  This manual discusses the GNU
+C preprocessor, which provides a small superset of the features of ISO
+Standard C.  In its default mode, the GNU C preprocessor does not do a
+few things required by the standard.  These are features which are
+rarely, if ever, used, and may cause surprising changes to the meaning
+of a program which does not expect them.  To get strict ISO Standard C,
+you should use the `-std=c90', `-std=c99' or `-std=c1x' options,
+depending on which version of the standard you want.  To get all the
+mandatory diagnostics, you must also use `-pedantic'.  *Note
+Invocation::.
+
+   This manual describes the behavior of the ISO preprocessor.  To
+minimize gratuitous differences, where the ISO preprocessor's behavior
+does not conflict with traditional semantics, the traditional
+preprocessor should behave the same way.  The various differences that
+do exist are detailed in the section *note Traditional Mode::.
+
+   For clarity, unless noted otherwise, references to `CPP' in this
+manual refer to GNU CPP.
+
+* Menu:
+
+* Character sets::
+* Initial processing::
+* Tokenization::
+* The preprocessing language::
+
+
+File: cpp.info,  Node: Character sets,  Next: Initial processing,  Up: Overview
+
+1.1 Character sets
+==================
+
+Source code character set processing in C and related languages is
+rather complicated.  The C standard discusses two character sets, but
+there are really at least four.
+
+   The files input to CPP might be in any character set at all.  CPP's
+very first action, before it even looks for line boundaries, is to
+convert the file into the character set it uses for internal
+processing.  That set is what the C standard calls the "source"
+character set.  It must be isomorphic with ISO 10646, also known as
+Unicode.  CPP uses the UTF-8 encoding of Unicode.
+
+   The character sets of the input files are specified using the
+`-finput-charset=' option.
+
+   All preprocessing work (the subject of the rest of this manual) is
+carried out in the source character set.  If you request textual output
+from the preprocessor with the `-E' option, it will be in UTF-8.
+
+   After preprocessing is complete, string and character constants are
+converted again, into the "execution" character set.  This character
+set is under control of the user; the default is UTF-8, matching the
+source character set.  Wide string and character constants have their
+own character set, which is not called out specifically in the
+standard.  Again, it is under control of the user.  The default is
+UTF-16 or UTF-32, whichever fits in the target's `wchar_t' type, in the
+target machine's byte order.(1)  Octal and hexadecimal escape sequences
+do not undergo conversion; '\x12' has the value 0x12 regardless of the
+currently selected execution character set.  All other escapes are
+replaced by the character in the source character set that they
+represent, then converted to the execution character set, just like
+unescaped characters.
+
+   Unless the experimental `-fextended-identifiers' option is used, GCC
+does not permit the use of characters outside the ASCII range, nor `\u'
+and `\U' escapes, in identifiers.  Even with that option, characters
+outside the ASCII range can only be specified with the `\u' and `\U'
+escapes, not used directly in identifiers.
+
+   ---------- Footnotes ----------
+
+   (1) UTF-16 does not meet the requirements of the C standard for a
+wide character set, but the choice of 16-bit `wchar_t' is enshrined in
+some system ABIs so we cannot fix this.
+
+
+File: cpp.info,  Node: Initial processing,  Next: Tokenization,  Prev: Character sets,  Up: Overview
+
+1.2 Initial processing
+======================
+
+The preprocessor performs a series of textual transformations on its
+input.  These happen before all other processing.  Conceptually, they
+happen in a rigid order, and the entire file is run through each
+transformation before the next one begins.  CPP actually does them all
+at once, for performance reasons.  These transformations correspond
+roughly to the first three "phases of translation" described in the C
+standard.
+
+  1. The input file is read into memory and broken into lines.
+
+     Different systems use different conventions to indicate the end of
+     a line.  GCC accepts the ASCII control sequences `LF', `CR LF' and
+     `CR' as end-of-line markers.  These are the canonical sequences
+     used by Unix, DOS and VMS, and the classic Mac OS (before OSX)
+     respectively.  You may therefore safely copy source code written
+     on any of those systems to a different one and use it without
+     conversion.  (GCC may lose track of the current line number if a
+     file doesn't consistently use one convention, as sometimes happens
+     when it is edited on computers with different conventions that
+     share a network file system.)
+
+     If the last line of any input file lacks an end-of-line marker,
+     the end of the file is considered to implicitly supply one.  The C
+     standard says that this condition provokes undefined behavior, so
+     GCC will emit a warning message.
+
+  2. If trigraphs are enabled, they are replaced by their corresponding
+     single characters.  By default GCC ignores trigraphs, but if you
+     request a strictly conforming mode with the `-std' option, or you
+     specify the `-trigraphs' option, then it converts them.
+
+     These are nine three-character sequences, all starting with `??',
+     that are defined by ISO C to stand for single characters.  They
+     permit obsolete systems that lack some of C's punctuation to use
+     C.  For example, `??/' stands for `\', so '??/n' is a character
+     constant for a newline.
+
+     Trigraphs are not popular and many compilers implement them
+     incorrectly.  Portable code should not rely on trigraphs being
+     either converted or ignored.  With `-Wtrigraphs' GCC will warn you
+     when a trigraph may change the meaning of your program if it were
+     converted.  *Note Wtrigraphs::.
+
+     In a string constant, you can prevent a sequence of question marks
+     from being confused with a trigraph by inserting a backslash
+     between the question marks, or by separating the string literal at
+     the trigraph and making use of string literal concatenation.
+     "(??\?)"  is the string `(???)', not `(?]'.  Traditional C
+     compilers do not recognize these idioms.
+
+     The nine trigraphs and their replacements are
+
+          Trigraph:       ??(  ??)  ??<  ??>  ??=  ??/  ??'  ??!  ??-
+          Replacement:      [    ]    {    }    #    \    ^    |    ~
+
+  3. Continued lines are merged into one long line.
+
+     A continued line is a line which ends with a backslash, `\'.  The
+     backslash is removed and the following line is joined with the
+     current one.  No space is inserted, so you may split a line
+     anywhere, even in the middle of a word.  (It is generally more
+     readable to split lines only at white space.)
+
+     The trailing backslash on a continued line is commonly referred to
+     as a "backslash-newline".
+
+     If there is white space between a backslash and the end of a line,
+     that is still a continued line.  However, as this is usually the
+     result of an editing mistake, and many compilers will not accept
+     it as a continued line, GCC will warn you about it.
+
+  4. All comments are replaced with single spaces.
+
+     There are two kinds of comments.  "Block comments" begin with `/*'
+     and continue until the next `*/'.  Block comments do not nest:
+
+          /* this is /* one comment */ text outside comment
+
+     "Line comments" begin with `//' and continue to the end of the
+     current line.  Line comments do not nest either, but it does not
+     matter, because they would end in the same place anyway.
+
+          // this is // one comment
+          text outside comment
+
+   It is safe to put line comments inside block comments, or vice versa.
+
+     /* block comment
+        // contains line comment
+        yet more comment
+      */ outside comment
+
+     // line comment /* contains block comment */
+
+   But beware of commenting out one end of a block comment with a line
+comment.
+
+      // l.c.  /* block comment begins
+         oops! this isn't a comment anymore */
+
+   Comments are not recognized within string literals.  "/* blah */" is
+the string constant `/* blah */', not an empty string.
+
+   Line comments are not in the 1989 edition of the C standard, but they
+are recognized by GCC as an extension.  In C++ and in the 1999 edition
+of the C standard, they are an official part of the language.
+
+   Since these transformations happen before all other processing, you
+can split a line mechanically with backslash-newline anywhere.  You can
+comment out the end of a line.  You can continue a line comment onto the
+next line with backslash-newline.  You can even split `/*', `*/', and
+`//' onto multiple lines with backslash-newline.  For example:
+
+     /\
+     *
+     */ # /*
+     */ defi\
+     ne FO\
+     O 10\
+     20
+
+is equivalent to `#define FOO 1020'.  All these tricks are extremely
+confusing and should not be used in code intended to be readable.
+
+   There is no way to prevent a backslash at the end of a line from
+being interpreted as a backslash-newline.  This cannot affect any
+correct program, however.
+
+
+File: cpp.info,  Node: Tokenization,  Next: The preprocessing language,  Prev: Initial processing,  Up: Overview
+
+1.3 Tokenization
+================
+
+After the textual transformations are finished, the input file is
+converted into a sequence of "preprocessing tokens".  These mostly
+correspond to the syntactic tokens used by the C compiler, but there are
+a few differences.  White space separates tokens; it is not itself a
+token of any kind.  Tokens do not have to be separated by white space,
+but it is often necessary to avoid ambiguities.
+
+   When faced with a sequence of characters that has more than one
+possible tokenization, the preprocessor is greedy.  It always makes
+each token, starting from the left, as big as possible before moving on
+to the next token.  For instance, `a+++++b' is interpreted as
+`a ++ ++ + b', not as `a ++ + ++ b', even though the latter
+tokenization could be part of a valid C program and the former could
+not.
+
+   Once the input file is broken into tokens, the token boundaries never
+change, except when the `##' preprocessing operator is used to paste
+tokens together.  *Note Concatenation::.  For example,
+
+     #define foo() bar
+     foo()baz
+          ==> bar baz
+     _not_
+          ==> barbaz
+
+   The compiler does not re-tokenize the preprocessor's output.  Each
+preprocessing token becomes one compiler token.
+
+   Preprocessing tokens fall into five broad classes: identifiers,
+preprocessing numbers, string literals, punctuators, and other.  An
+"identifier" is the same as an identifier in C: any sequence of
+letters, digits, or underscores, which begins with a letter or
+underscore.  Keywords of C have no significance to the preprocessor;
+they are ordinary identifiers.  You can define a macro whose name is a
+keyword, for instance.  The only identifier which can be considered a
+preprocessing keyword is `defined'.  *Note Defined::.
+
+   This is mostly true of other languages which use the C preprocessor.
+However, a few of the keywords of C++ are significant even in the
+preprocessor.  *Note C++ Named Operators::.
+
+   In the 1999 C standard, identifiers may contain letters which are not
+part of the "basic source character set", at the implementation's
+discretion (such as accented Latin letters, Greek letters, or Chinese
+ideograms).  This may be done with an extended character set, or the
+`\u' and `\U' escape sequences.  The implementation of this feature in
+GCC is experimental; such characters are only accepted in the `\u' and
+`\U' forms and only if `-fextended-identifiers' is used.
+
+   As an extension, GCC treats `$' as a letter.  This is for
+compatibility with some systems, such as VMS, where `$' is commonly
+used in system-defined function and object names.  `$' is not a letter
+in strictly conforming mode, or if you specify the `-$' option.  *Note
+Invocation::.
+
+   A "preprocessing number" has a rather bizarre definition.  The
+category includes all the normal integer and floating point constants
+one expects of C, but also a number of other things one might not
+initially recognize as a number.  Formally, preprocessing numbers begin
+with an optional period, a required decimal digit, and then continue
+with any sequence of letters, digits, underscores, periods, and
+exponents.  Exponents are the two-character sequences `e+', `e-', `E+',
+`E-', `p+', `p-', `P+', and `P-'.  (The exponents that begin with `p'
+or `P' are new to C99.  They are used for hexadecimal floating-point
+constants.)
+
+   The purpose of this unusual definition is to isolate the preprocessor
+from the full complexity of numeric constants.  It does not have to
+distinguish between lexically valid and invalid floating-point numbers,
+which is complicated.  The definition also permits you to split an
+identifier at any position and get exactly two tokens, which can then be
+pasted back together with the `##' operator.
+
+   It's possible for preprocessing numbers to cause programs to be
+misinterpreted.  For example, `0xE+12' is a preprocessing number which
+does not translate to any valid numeric constant, therefore a syntax
+error.  It does not mean `0xE + 12', which is what you might have
+intended.
+
+   "String literals" are string constants, character constants, and
+header file names (the argument of `#include').(1)  String constants
+and character constants are straightforward: "..." or '...'.  In either
+case embedded quotes should be escaped with a backslash: '\'' is the
+character constant for `''.  There is no limit on the length of a
+character constant, but the value of a character constant that contains
+more than one character is implementation-defined.  *Note
+Implementation Details::.
+
+   Header file names either look like string constants, "...", or are
+written with angle brackets instead, <...>.  In either case, backslash
+is an ordinary character.  There is no way to escape the closing quote
+or angle bracket.  The preprocessor looks for the header file in
+different places depending on which form you use.  *Note Include
+Operation::.
+
+   No string literal may extend past the end of a line.  Older versions
+of GCC accepted multi-line string constants.  You may use continued
+lines instead, or string constant concatenation.  *Note Differences
+from previous versions::.
+
+   "Punctuators" are all the usual bits of punctuation which are
+meaningful to C and C++.  All but three of the punctuation characters in
+ASCII are C punctuators.  The exceptions are `@', `$', and ``'.  In
+addition, all the two- and three-character operators are punctuators.
+There are also six "digraphs", which the C++ standard calls
+"alternative tokens", which are merely alternate ways to spell other
+punctuators.  This is a second attempt to work around missing
+punctuation in obsolete systems.  It has no negative side effects,
+unlike trigraphs, but does not cover as much ground.  The digraphs and
+their corresponding normal punctuators are:
+
+     Digraph:        <%  %>  <:  :>  %:  %:%:
+     Punctuator:      {   }   [   ]   #    ##
+
+   Any other single character is considered "other".  It is passed on to
+the preprocessor's output unmolested.  The C compiler will almost
+certainly reject source code containing "other" tokens.  In ASCII, the
+only other characters are `@', `$', ``', and control characters other
+than NUL (all bits zero).  (Note that `$' is normally considered a
+letter.)  All characters with the high bit set (numeric range
+0x7F-0xFF) are also "other" in the present implementation.  This will
+change when proper support for international character sets is added to
+GCC.
+
+   NUL is a special case because of the high probability that its
+appearance is accidental, and because it may be invisible to the user
+(many terminals do not display NUL at all).  Within comments, NULs are
+silently ignored, just as any other character would be.  In running
+text, NUL is considered white space.  For example, these two directives
+have the same meaning.
+
+     #define X^@1
+     #define X 1
+
+(where `^@' is ASCII NUL).  Within string or character constants, NULs
+are preserved.  In the latter two cases the preprocessor emits a
+warning message.
+
+   ---------- Footnotes ----------
+
+   (1) The C standard uses the term "string literal" to refer only to
+what we are calling "string constants".
+
+
+File: cpp.info,  Node: The preprocessing language,  Prev: Tokenization,  Up: Overview
+
+1.4 The preprocessing language
+==============================
+
+After tokenization, the stream of tokens may simply be passed straight
+to the compiler's parser.  However, if it contains any operations in the
+"preprocessing language", it will be transformed first.  This stage
+corresponds roughly to the standard's "translation phase 4" and is what
+most people think of as the preprocessor's job.
+
+   The preprocessing language consists of "directives" to be executed
+and "macros" to be expanded.  Its primary capabilities are:
+
+   * Inclusion of header files.  These are files of declarations that
+     can be substituted into your program.
+
+   * Macro expansion.  You can define "macros", which are abbreviations
+     for arbitrary fragments of C code.  The preprocessor will replace
+     the macros with their definitions throughout the program.  Some
+     macros are automatically defined for you.
+
+   * Conditional compilation.  You can include or exclude parts of the
+     program according to various conditions.
+
+   * Line control.  If you use a program to combine or rearrange source
+     files into an intermediate file which is then compiled, you can
+     use line control to inform the compiler where each source line
+     originally came from.
+
+   * Diagnostics.  You can detect problems at compile time and issue
+     errors or warnings.
+
+   There are a few more, less useful, features.
+
+   Except for expansion of predefined macros, all these operations are
+triggered with "preprocessing directives".  Preprocessing directives
+are lines in your program that start with `#'.  Whitespace is allowed
+before and after the `#'.  The `#' is followed by an identifier, the
+"directive name".  It specifies the operation to perform.  Directives
+are commonly referred to as `#NAME' where NAME is the directive name.
+For example, `#define' is the directive that defines a macro.
+
+   The `#' which begins a directive cannot come from a macro expansion.
+Also, the directive name is not macro expanded.  Thus, if `foo' is
+defined as a macro expanding to `define', that does not make `#foo' a
+valid preprocessing directive.
+
+   The set of valid directive names is fixed.  Programs cannot define
+new preprocessing directives.
+
+   Some directives require arguments; these make up the rest of the
+directive line and must be separated from the directive name by
+whitespace.  For example, `#define' must be followed by a macro name
+and the intended expansion of the macro.
+
+   A preprocessing directive cannot cover more than one line.  The line
+may, however, be continued with backslash-newline, or by a block comment
+which extends past the end of the line.  In either case, when the
+directive is processed, the continuations have already been merged with
+the first line to make one long line.
+
+
+File: cpp.info,  Node: Header Files,  Next: Macros,  Prev: Overview,  Up: Top
+
+2 Header Files
+**************
+
+A header file is a file containing C declarations and macro definitions
+(*note Macros::) to be shared between several source files.  You request
+the use of a header file in your program by "including" it, with the C
+preprocessing directive `#include'.
+
+   Header files serve two purposes.
+
+   * System header files declare the interfaces to parts of the
+     operating system.  You include them in your program to supply the
+     definitions and declarations you need to invoke system calls and
+     libraries.
+
+   * Your own header files contain declarations for interfaces between
+     the source files of your program.  Each time you have a group of
+     related declarations and macro definitions all or most of which
+     are needed in several different source files, it is a good idea to
+     create a header file for them.
+
+   Including a header file produces the same results as copying the
+header file into each source file that needs it.  Such copying would be
+time-consuming and error-prone.  With a header file, the related
+declarations appear in only one place.  If they need to be changed, they
+can be changed in one place, and programs that include the header file
+will automatically use the new version when next recompiled.  The header
+file eliminates the labor of finding and changing all the copies as well
+as the risk that a failure to find one copy will result in
+inconsistencies within a program.
+
+   In C, the usual convention is to give header files names that end
+with `.h'.  It is most portable to use only letters, digits, dashes, and
+underscores in header file names, and at most one dot.
+
+* Menu:
+
+* Include Syntax::
+* Include Operation::
+* Search Path::
+* Once-Only Headers::
+* Alternatives to Wrapper #ifndef::
+* Computed Includes::
+* Wrapper Headers::
+* System Headers::
+
+
+File: cpp.info,  Node: Include Syntax,  Next: Include Operation,  Up: Header Files
+
+2.1 Include Syntax
+==================
+
+Both user and system header files are included using the preprocessing
+directive `#include'.  It has two variants:
+
+`#include <FILE>'
+     This variant is used for system header files.  It searches for a
+     file named FILE in a standard list of system directories.  You can
+     prepend directories to this list with the `-I' option (*note
+     Invocation::).
+
+`#include "FILE"'
+     This variant is used for header files of your own program.  It
+     searches for a file named FILE first in the directory containing
+     the current file, then in the quote directories and then the same
+     directories used for `<FILE>'.  You can prepend directories to the
+     list of quote directories with the `-iquote' option.
+
+   The argument of `#include', whether delimited with quote marks or
+angle brackets, behaves like a string constant in that comments are not
+recognized, and macro names are not expanded.  Thus, `#include <x/*y>'
+specifies inclusion of a system header file named `x/*y'.
+
+   However, if backslashes occur within FILE, they are considered
+ordinary text characters, not escape characters.  None of the character
+escape sequences appropriate to string constants in C are processed.
+Thus, `#include "x\n\\y"' specifies a filename containing three
+backslashes.  (Some systems interpret `\' as a pathname separator.  All
+of these also interpret `/' the same way.  It is most portable to use
+only `/'.)
+
+   It is an error if there is anything (other than comments) on the line
+after the file name.
+
+
+File: cpp.info,  Node: Include Operation,  Next: Search Path,  Prev: Include Syntax,  Up: Header Files
+
+2.2 Include Operation
+=====================
+
+The `#include' directive works by directing the C preprocessor to scan
+the specified file as input before continuing with the rest of the
+current file.  The output from the preprocessor contains the output
+already generated, followed by the output resulting from the included
+file, followed by the output that comes from the text after the
+`#include' directive.  For example, if you have a header file
+`header.h' as follows,
+
+     char *test (void);
+
+and a main program called `program.c' that uses the header file, like
+this,
+
+     int x;
+     #include "header.h"
+
+     int
+     main (void)
+     {
+       puts (test ());
+     }
+
+the compiler will see the same token stream as it would if `program.c'
+read
+
+     int x;
+     char *test (void);
+
+     int
+     main (void)
+     {
+       puts (test ());
+     }
+
+   Included files are not limited to declarations and macro definitions;
+those are merely the typical uses.  Any fragment of a C program can be
+included from another file.  The include file could even contain the
+beginning of a statement that is concluded in the containing file, or
+the end of a statement that was started in the including file.  However,
+an included file must consist of complete tokens.  Comments and string
+literals which have not been closed by the end of an included file are
+invalid.  For error recovery, they are considered to end at the end of
+the file.
+
+   To avoid confusion, it is best if header files contain only complete
+syntactic units--function declarations or definitions, type
+declarations, etc.
+
+   The line following the `#include' directive is always treated as a
+separate line by the C preprocessor, even if the included file lacks a
+final newline.
+
+
+File: cpp.info,  Node: Search Path,  Next: Once-Only Headers,  Prev: Include Operation,  Up: Header Files
+
+2.3 Search Path
+===============
+
+GCC looks in several different places for headers.  On a normal Unix
+system, if you do not instruct it otherwise, it will look for headers
+requested with `#include <FILE>' in:
+
+     /usr/local/include
+     LIBDIR/gcc/TARGET/VERSION/include
+     /usr/TARGET/include
+     /usr/include
+
+   For C++ programs, it will also look in `/usr/include/g++-v3', first.
+In the above, TARGET is the canonical name of the system GCC was
+configured to compile code for; often but not always the same as the
+canonical name of the system it runs on.  VERSION is the version of GCC
+in use.
+
+   You can add to this list with the `-IDIR' command line option.  All
+the directories named by `-I' are searched, in left-to-right order,
+_before_ the default directories.  The only exception is when `dir' is
+already searched by default.  In this case, the option is ignored and
+the search order for system directories remains unchanged.
+
+   Duplicate directories are removed from the quote and bracket search
+chains before the two chains are merged to make the final search chain.
+Thus, it is possible for a directory to occur twice in the final search
+chain if it was specified in both the quote and bracket chains.
+
+   You can prevent GCC from searching any of the default directories
+with the `-nostdinc' option.  This is useful when you are compiling an
+operating system kernel or some other program that does not use the
+standard C library facilities, or the standard C library itself.  `-I'
+options are not ignored as described above when `-nostdinc' is in
+effect.
+
+   GCC looks for headers requested with `#include "FILE"' first in the
+directory containing the current file, then in the directories as
+specified by `-iquote' options, then in the same places it would have
+looked for a header requested with angle brackets.  For example, if
+`/usr/include/sys/stat.h' contains `#include "types.h"', GCC looks for
+`types.h' first in `/usr/include/sys', then in its usual search path.
+
+   `#line' (*note Line Control::) does not change GCC's idea of the
+directory containing the current file.
+
+   You may put `-I-' at any point in your list of `-I' options.  This
+has two effects.  First, directories appearing before the `-I-' in the
+list are searched only for headers requested with quote marks.
+Directories after `-I-' are searched for all headers.  Second, the
+directory containing the current file is not searched for anything,
+unless it happens to be one of the directories named by an `-I' switch.
+`-I-' is deprecated, `-iquote' should be used instead.
+
+   `-I. -I-' is not the same as no `-I' options at all, and does not
+cause the same behavior for `<>' includes that `""' includes get with
+no special options.  `-I.' searches the compiler's current working
+directory for header files.  That may or may not be the same as the
+directory containing the current file.
+
+   If you need to look for headers in a directory named `-', write
+`-I./-'.
+
+   There are several more ways to adjust the header search path.  They
+are generally less useful.  *Note Invocation::.
+
+
+File: cpp.info,  Node: Once-Only Headers,  Next: Alternatives to Wrapper #ifndef,  Prev: Search Path,  Up: Header Files
+
+2.4 Once-Only Headers
+=====================
+
+If a header file happens to be included twice, the compiler will process
+its contents twice.  This is very likely to cause an error, e.g. when
+the compiler sees the same structure definition twice.  Even if it does
+not, it will certainly waste time.
+
+   The standard way to prevent this is to enclose the entire real
+contents of the file in a conditional, like this:
+
+     /* File foo.  */
+     #ifndef FILE_FOO_SEEN
+     #define FILE_FOO_SEEN
+
+     THE ENTIRE FILE
+
+     #endif /* !FILE_FOO_SEEN */
+
+   This construct is commonly known as a "wrapper #ifndef".  When the
+header is included again, the conditional will be false, because
+`FILE_FOO_SEEN' is defined.  The preprocessor will skip over the entire
+contents of the file, and the compiler will not see it twice.
+
+   CPP optimizes even further.  It remembers when a header file has a
+wrapper `#ifndef'.  If a subsequent `#include' specifies that header,
+and the macro in the `#ifndef' is still defined, it does not bother to
+rescan the file at all.
+
+   You can put comments outside the wrapper.  They will not interfere
+with this optimization.
+
+   The macro `FILE_FOO_SEEN' is called the "controlling macro" or
+"guard macro".  In a user header file, the macro name should not begin
+with `_'.  In a system header file, it should begin with `__' to avoid
+conflicts with user programs.  In any kind of header file, the macro
+name should contain the name of the file and some additional text, to
+avoid conflicts with other header files.
+
+
+File: cpp.info,  Node: Alternatives to Wrapper #ifndef,  Next: Computed Includes,  Prev: Once-Only Headers,  Up: Header Files
+
+2.5 Alternatives to Wrapper #ifndef
+===================================
+
+CPP supports two more ways of indicating that a header file should be
+read only once.  Neither one is as portable as a wrapper `#ifndef' and
+we recommend you do not use them in new programs, with the caveat that
+`#import' is standard practice in Objective-C.
+
+   CPP supports a variant of `#include' called `#import' which includes
+a file, but does so at most once.  If you use `#import' instead of
+`#include', then you don't need the conditionals inside the header file
+to prevent multiple inclusion of the contents.  `#import' is standard
+in Objective-C, but is considered a deprecated extension in C and C++.
+
+   `#import' is not a well designed feature.  It requires the users of
+a header file to know that it should only be included once.  It is much
+better for the header file's implementor to write the file so that users
+don't need to know this.  Using a wrapper `#ifndef' accomplishes this
+goal.
+
+   In the present implementation, a single use of `#import' will
+prevent the file from ever being read again, by either `#import' or
+`#include'.  You should not rely on this; do not use both `#import' and
+`#include' to refer to the same header file.
+
+   Another way to prevent a header file from being included more than
+once is with the `#pragma once' directive.  If `#pragma once' is seen
+when scanning a header file, that file will never be read again, no
+matter what.
+
+   `#pragma once' does not have the problems that `#import' does, but
+it is not recognized by all preprocessors, so you cannot rely on it in
+a portable program.
+
+
+File: cpp.info,  Node: Computed Includes,  Next: Wrapper Headers,  Prev: Alternatives to Wrapper #ifndef,  Up: Header Files
+
+2.6 Computed Includes
+=====================
+
+Sometimes it is necessary to select one of several different header
+files to be included into your program.  They might specify
+configuration parameters to be used on different sorts of operating
+systems, for instance.  You could do this with a series of conditionals,
+
+     #if SYSTEM_1
+     # include "system_1.h"
+     #elif SYSTEM_2
+     # include "system_2.h"
+     #elif SYSTEM_3
+     ...
+     #endif
+
+   That rapidly becomes tedious.  Instead, the preprocessor offers the
+ability to use a macro for the header name.  This is called a "computed
+include".  Instead of writing a header name as the direct argument of
+`#include', you simply put a macro name there instead:
+
+     #define SYSTEM_H "system_1.h"
+     ...
+     #include SYSTEM_H
+
+`SYSTEM_H' will be expanded, and the preprocessor will look for
+`system_1.h' as if the `#include' had been written that way originally.
+`SYSTEM_H' could be defined by your Makefile with a `-D' option.
+
+   You must be careful when you define the macro.  `#define' saves
+tokens, not text.  The preprocessor has no way of knowing that the macro
+will be used as the argument of `#include', so it generates ordinary
+tokens, not a header name.  This is unlikely to cause problems if you
+use double-quote includes, which are close enough to string constants.
+If you use angle brackets, however, you may have trouble.
+
+   The syntax of a computed include is actually a bit more general than
+the above.  If the first non-whitespace character after `#include' is
+not `"' or `<', then the entire line is macro-expanded like running
+text would be.
+
+   If the line expands to a single string constant, the contents of that
+string constant are the file to be included.  CPP does not re-examine
+the string for embedded quotes, but neither does it process backslash
+escapes in the string.  Therefore
+
+     #define HEADER "a\"b"
+     #include HEADER
+
+looks for a file named `a\"b'.  CPP searches for the file according to
+the rules for double-quoted includes.
+
+   If the line expands to a token stream beginning with a `<' token and
+including a `>' token, then the tokens between the `<' and the first
+`>' are combined to form the filename to be included.  Any whitespace
+between tokens is reduced to a single space; then any space after the
+initial `<' is retained, but a trailing space before the closing `>' is
+ignored.  CPP searches for the file according to the rules for
+angle-bracket includes.
+
+   In either case, if there are any tokens on the line after the file
+name, an error occurs and the directive is not processed.  It is also
+an error if the result of expansion does not match either of the two
+expected forms.
+
+   These rules are implementation-defined behavior according to the C
+standard.  To minimize the risk of different compilers interpreting your
+computed includes differently, we recommend you use only a single
+object-like macro which expands to a string constant.  This will also
+minimize confusion for people reading your program.
+
+
+File: cpp.info,  Node: Wrapper Headers,  Next: System Headers,  Prev: Computed Includes,  Up: Header Files
+
+2.7 Wrapper Headers
+===================
+
+Sometimes it is necessary to adjust the contents of a system-provided
+header file without editing it directly.  GCC's `fixincludes' operation
+does this, for example.  One way to do that would be to create a new
+header file with the same name and insert it in the search path before
+the original header.  That works fine as long as you're willing to
+replace the old header entirely.  But what if you want to refer to the
+old header from the new one?
+
+   You cannot simply include the old header with `#include'.  That will
+start from the beginning, and find your new header again.  If your
+header is not protected from multiple inclusion (*note Once-Only
+Headers::), it will recurse infinitely and cause a fatal error.
+
+   You could include the old header with an absolute pathname:
+     #include "/usr/include/old-header.h"
+   This works, but is not clean; should the system headers ever move,
+you would have to edit the new headers to match.
+
+   There is no way to solve this problem within the C standard, but you
+can use the GNU extension `#include_next'.  It means, "Include the
+_next_ file with this name".  This directive works like `#include'
+except in searching for the specified file: it starts searching the
+list of header file directories _after_ the directory in which the
+current file was found.
+
+   Suppose you specify `-I /usr/local/include', and the list of
+directories to search also includes `/usr/include'; and suppose both
+directories contain `signal.h'.  Ordinary `#include <signal.h>' finds
+the file under `/usr/local/include'.  If that file contains
+`#include_next <signal.h>', it starts searching after that directory,
+and finds the file in `/usr/include'.
+
+   `#include_next' does not distinguish between `<FILE>' and `"FILE"'
+inclusion, nor does it check that the file you specify has the same
+name as the current file.  It simply looks for the file named, starting
+with the directory in the search path after the one where the current
+file was found.
+
+   The use of `#include_next' can lead to great confusion.  We
+recommend it be used only when there is no other alternative.  In
+particular, it should not be used in the headers belonging to a specific
+program; it should be used only to make global corrections along the
+lines of `fixincludes'.
+
+
+File: cpp.info,  Node: System Headers,  Prev: Wrapper Headers,  Up: Header Files
+
+2.8 System Headers
+==================
+
+The header files declaring interfaces to the operating system and
+runtime libraries often cannot be written in strictly conforming C.
+Therefore, GCC gives code found in "system headers" special treatment.
+All warnings, other than those generated by `#warning' (*note
+Diagnostics::), are suppressed while GCC is processing a system header.
+Macros defined in a system header are immune to a few warnings wherever
+they are expanded.  This immunity is granted on an ad-hoc basis, when
+we find that a warning generates lots of false positives because of
+code in macros defined in system headers.
+
+   Normally, only the headers found in specific directories are
+considered system headers.  These directories are determined when GCC
+is compiled.  There are, however, two ways to make normal headers into
+system headers.
+
+   The `-isystem' command line option adds its argument to the list of
+directories to search for headers, just like `-I'.  Any headers found
+in that directory will be considered system headers.
+
+   All directories named by `-isystem' are searched _after_ all
+directories named by `-I', no matter what their order was on the
+command line.  If the same directory is named by both `-I' and
+`-isystem', the `-I' option is ignored.  GCC provides an informative
+message when this occurs if `-v' is used.
+
+   There is also a directive, `#pragma GCC system_header', which tells
+GCC to consider the rest of the current include file a system header,
+no matter where it was found.  Code that comes before the `#pragma' in
+the file will not be affected.  `#pragma GCC system_header' has no
+effect in the primary source file.
+
+   On very old systems, some of the pre-defined system header
+directories get even more special treatment.  GNU C++ considers code in
+headers found in those directories to be surrounded by an `extern "C"'
+block.  There is no way to request this behavior with a `#pragma', or
+from the command line.
+
+
+File: cpp.info,  Node: Macros,  Next: Conditionals,  Prev: Header Files,  Up: Top
+
+3 Macros
+********
+
+A "macro" is a fragment of code which has been given a name.  Whenever
+the name is used, it is replaced by the contents of the macro.  There
+are two kinds of macros.  They differ mostly in what they look like
+when they are used.  "Object-like" macros resemble data objects when
+used, "function-like" macros resemble function calls.
+
+   You may define any valid identifier as a macro, even if it is a C
+keyword.  The preprocessor does not know anything about keywords.  This
+can be useful if you wish to hide a keyword such as `const' from an
+older compiler that does not understand it.  However, the preprocessor
+operator `defined' (*note Defined::) can never be defined as a macro,
+and C++'s named operators (*note C++ Named Operators::) cannot be
+macros when you are compiling C++.
+
+* Menu:
+
+* Object-like Macros::
+* Function-like Macros::
+* Macro Arguments::
+* Stringification::
+* Concatenation::
+* Variadic Macros::
+* Predefined Macros::
+* Undefining and Redefining Macros::
+* Directives Within Macro Arguments::
+* Macro Pitfalls::
+
+
+File: cpp.info,  Node: Object-like Macros,  Next: Function-like Macros,  Up: Macros
+
+3.1 Object-like Macros
+======================
+
+An "object-like macro" is a simple identifier which will be replaced by
+a code fragment.  It is called object-like because it looks like a data
+object in code that uses it.  They are most commonly used to give
+symbolic names to numeric constants.
+
+   You create macros with the `#define' directive.  `#define' is
+followed by the name of the macro and then the token sequence it should
+be an abbreviation for, which is variously referred to as the macro's
+"body", "expansion" or "replacement list".  For example,
+
+     #define BUFFER_SIZE 1024
+
+defines a macro named `BUFFER_SIZE' as an abbreviation for the token
+`1024'.  If somewhere after this `#define' directive there comes a C
+statement of the form
+
+     foo = (char *) malloc (BUFFER_SIZE);
+
+then the C preprocessor will recognize and "expand" the macro
+`BUFFER_SIZE'.  The C compiler will see the same tokens as it would if
+you had written
+
+     foo = (char *) malloc (1024);
+
+   By convention, macro names are written in uppercase.  Programs are
+easier to read when it is possible to tell at a glance which names are
+macros.
+
+   The macro's body ends at the end of the `#define' line.  You may
+continue the definition onto multiple lines, if necessary, using
+backslash-newline.  When the macro is expanded, however, it will all
+come out on one line.  For example,
+
+     #define NUMBERS 1, \
+                     2, \
+                     3
+     int x[] = { NUMBERS };
+          ==> int x[] = { 1, 2, 3 };
+
+The most common visible consequence of this is surprising line numbers
+in error messages.
+
+   There is no restriction on what can go in a macro body provided it
+decomposes into valid preprocessing tokens.  Parentheses need not
+balance, and the body need not resemble valid C code.  (If it does not,
+you may get error messages from the C compiler when you use the macro.)
+
+   The C preprocessor scans your program sequentially.  Macro
+definitions take effect at the place you write them.  Therefore, the
+following input to the C preprocessor
+
+     foo = X;
+     #define X 4
+     bar = X;
+
+produces
+
+     foo = X;
+     bar = 4;
+
+   When the preprocessor expands a macro name, the macro's expansion
+replaces the macro invocation, then the expansion is examined for more
+macros to expand.  For example,
+
+     #define TABLESIZE BUFSIZE
+     #define BUFSIZE 1024
+     TABLESIZE
+          ==> BUFSIZE
+          ==> 1024
+
+`TABLESIZE' is expanded first to produce `BUFSIZE', then that macro is
+expanded to produce the final result, `1024'.
+
+   Notice that `BUFSIZE' was not defined when `TABLESIZE' was defined.
+The `#define' for `TABLESIZE' uses exactly the expansion you
+specify--in this case, `BUFSIZE'--and does not check to see whether it
+too contains macro names.  Only when you _use_ `TABLESIZE' is the
+result of its expansion scanned for more macro names.
+
+   This makes a difference if you change the definition of `BUFSIZE' at
+some point in the source file.  `TABLESIZE', defined as shown, will
+always expand using the definition of `BUFSIZE' that is currently in
+effect:
+
+     #define BUFSIZE 1020
+     #define TABLESIZE BUFSIZE
+     #undef BUFSIZE
+     #define BUFSIZE 37
+
+Now `TABLESIZE' expands (in two stages) to `37'.
+
+   If the expansion of a macro contains its own name, either directly or
+via intermediate macros, it is not expanded again when the expansion is
+examined for more macros.  This prevents infinite recursion.  *Note
+Self-Referential Macros::, for the precise details.
+
+
+File: cpp.info,  Node: Function-like Macros,  Next: Macro Arguments,  Prev: Object-like Macros,  Up: Macros
+
+3.2 Function-like Macros
+========================
+
+You can also define macros whose use looks like a function call.  These
+are called "function-like macros".  To define a function-like macro,
+you use the same `#define' directive, but you put a pair of parentheses
+immediately after the macro name.  For example,
+
+     #define lang_init()  c_init()
+     lang_init()
+          ==> c_init()
+
+   A function-like macro is only expanded if its name appears with a
+pair of parentheses after it.  If you write just the name, it is left
+alone.  This can be useful when you have a function and a macro of the
+same name, and you wish to use the function sometimes.
+
+     extern void foo(void);
+     #define foo() /* optimized inline version */
+     ...
+       foo();
+       funcptr = foo;
+
+   Here the call to `foo()' will use the macro, but the function
+pointer will get the address of the real function.  If the macro were to
+be expanded, it would cause a syntax error.
+
+   If you put spaces between the macro name and the parentheses in the
+macro definition, that does not define a function-like macro, it defines
+an object-like macro whose expansion happens to begin with a pair of
+parentheses.
+
+     #define lang_init ()    c_init()
+     lang_init()
+          ==> () c_init()()
+
+   The first two pairs of parentheses in this expansion come from the
+macro.  The third is the pair that was originally after the macro
+invocation.  Since `lang_init' is an object-like macro, it does not
+consume those parentheses.
+
+
+File: cpp.info,  Node: Macro Arguments,  Next: Stringification,  Prev: Function-like Macros,  Up: Macros
+
+3.3 Macro Arguments
+===================
+
+Function-like macros can take "arguments", just like true functions.
+To define a macro that uses arguments, you insert "parameters" between
+the pair of parentheses in the macro definition that make the macro
+function-like.  The parameters must be valid C identifiers, separated
+by commas and optionally whitespace.
+
+   To invoke a macro that takes arguments, you write the name of the
+macro followed by a list of "actual arguments" in parentheses, separated
+by commas.  The invocation of the macro need not be restricted to a
+single logical line--it can cross as many lines in the source file as
+you wish.  The number of arguments you give must match the number of
+parameters in the macro definition.  When the macro is expanded, each
+use of a parameter in its body is replaced by the tokens of the
+corresponding argument.  (You need not use all of the parameters in the
+macro body.)
+
+   As an example, here is a macro that computes the minimum of two
+numeric values, as it is defined in many C programs, and some uses.
+
+     #define min(X, Y)  ((X) < (Y) ? (X) : (Y))
+       x = min(a, b);          ==>  x = ((a) < (b) ? (a) : (b));
+       y = min(1, 2);          ==>  y = ((1) < (2) ? (1) : (2));
+       z = min(a + 28, *p);    ==>  z = ((a + 28) < (*p) ? (a + 28) : (*p));
+
+(In this small example you can already see several of the dangers of
+macro arguments.  *Note Macro Pitfalls::, for detailed explanations.)
+
+   Leading and trailing whitespace in each argument is dropped, and all
+whitespace between the tokens of an argument is reduced to a single
+space.  Parentheses within each argument must balance; a comma within
+such parentheses does not end the argument.  However, there is no
+requirement for square brackets or braces to balance, and they do not
+prevent a comma from separating arguments.  Thus,
+
+     macro (array[x = y, x + 1])
+
+passes two arguments to `macro': `array[x = y' and `x + 1]'.  If you
+want to supply `array[x = y, x + 1]' as an argument, you can write it
+as `array[(x = y, x + 1)]', which is equivalent C code.
+
+   All arguments to a macro are completely macro-expanded before they
+are substituted into the macro body.  After substitution, the complete
+text is scanned again for macros to expand, including the arguments.
+This rule may seem strange, but it is carefully designed so you need
+not worry about whether any function call is actually a macro
+invocation.  You can run into trouble if you try to be too clever,
+though.  *Note Argument Prescan::, for detailed discussion.
+
+   For example, `min (min (a, b), c)' is first expanded to
+
+       min (((a) < (b) ? (a) : (b)), (c))
+
+and then to
+
+     ((((a) < (b) ? (a) : (b))) < (c)
+      ? (((a) < (b) ? (a) : (b)))
+      : (c))
+
+(Line breaks shown here for clarity would not actually be generated.)
+
+   You can leave macro arguments empty; this is not an error to the
+preprocessor (but many macros will then expand to invalid code).  You
+cannot leave out arguments entirely; if a macro takes two arguments,
+there must be exactly one comma at the top level of its argument list.
+Here are some silly examples using `min':
+
+     min(, b)        ==> ((   ) < (b) ? (   ) : (b))
+     min(a, )        ==> ((a  ) < ( ) ? (a  ) : ( ))
+     min(,)          ==> ((   ) < ( ) ? (   ) : ( ))
+     min((,),)       ==> (((,)) < ( ) ? ((,)) : ( ))
+
+     min()      error--> macro "min" requires 2 arguments, but only 1 given
+     min(,,)    error--> macro "min" passed 3 arguments, but takes just 2
+
+   Whitespace is not a preprocessing token, so if a macro `foo' takes
+one argument, `foo ()' and `foo ( )' both supply it an empty argument.
+Previous GNU preprocessor implementations and documentation were
+incorrect on this point, insisting that a function-like macro that
+takes a single argument be passed a space if an empty argument was
+required.
+
+   Macro parameters appearing inside string literals are not replaced by
+their corresponding actual arguments.
+
+     #define foo(x) x, "x"
+     foo(bar)        ==> bar, "x"
+
+
+File: cpp.info,  Node: Stringification,  Next: Concatenation,  Prev: Macro Arguments,  Up: Macros
+
+3.4 Stringification
+===================
+
+Sometimes you may want to convert a macro argument into a string
+constant.  Parameters are not replaced inside string constants, but you
+can use the `#' preprocessing operator instead.  When a macro parameter
+is used with a leading `#', the preprocessor replaces it with the
+literal text of the actual argument, converted to a string constant.
+Unlike normal parameter replacement, the argument is not macro-expanded
+first.  This is called "stringification".
+
+   There is no way to combine an argument with surrounding text and
+stringify it all together.  Instead, you can write a series of adjacent
+string constants and stringified arguments.  The preprocessor will
+replace the stringified arguments with string constants.  The C
+compiler will then combine all the adjacent string constants into one
+long string.
+
+   Here is an example of a macro definition that uses stringification:
+
+     #define WARN_IF(EXP) \
+     do { if (EXP) \
+             fprintf (stderr, "Warning: " #EXP "\n"); } \
+     while (0)
+     WARN_IF (x == 0);
+          ==> do { if (x == 0)
+                fprintf (stderr, "Warning: " "x == 0" "\n"); } while (0);
+
+The argument for `EXP' is substituted once, as-is, into the `if'
+statement, and once, stringified, into the argument to `fprintf'.  If
+`x' were a macro, it would be expanded in the `if' statement, but not
+in the string.
+
+   The `do' and `while (0)' are a kludge to make it possible to write
+`WARN_IF (ARG);', which the resemblance of `WARN_IF' to a function
+would make C programmers want to do; see *note Swallowing the
+Semicolon::.
+
+   Stringification in C involves more than putting double-quote
+characters around the fragment.  The preprocessor backslash-escapes the
+quotes surrounding embedded string constants, and all backslashes
+within string and character constants, in order to get a valid C string
+constant with the proper contents.  Thus, stringifying `p = "foo\n";'
+results in "p = \"foo\\n\";".  However, backslashes that are not inside
+string or character constants are not duplicated: `\n' by itself
+stringifies to "\n".
+
+   All leading and trailing whitespace in text being stringified is
+ignored.  Any sequence of whitespace in the middle of the text is
+converted to a single space in the stringified result.  Comments are
+replaced by whitespace long before stringification happens, so they
+never appear in stringified text.
+
+   There is no way to convert a macro argument into a character
+constant.
+
+   If you want to stringify the result of expansion of a macro argument,
+you have to use two levels of macros.
+
+     #define xstr(s) str(s)
+     #define str(s) #s
+     #define foo 4
+     str (foo)
+          ==> "foo"
+     xstr (foo)
+          ==> xstr (4)
+          ==> str (4)
+          ==> "4"
+
+   `s' is stringified when it is used in `str', so it is not
+macro-expanded first.  But `s' is an ordinary argument to `xstr', so it
+is completely macro-expanded before `xstr' itself is expanded (*note
+Argument Prescan::).  Therefore, by the time `str' gets to its
+argument, it has already been macro-expanded.
+
+
+File: cpp.info,  Node: Concatenation,  Next: Variadic Macros,  Prev: Stringification,  Up: Macros
+
+3.5 Concatenation
+=================
+
+It is often useful to merge two tokens into one while expanding macros.
+This is called "token pasting" or "token concatenation".  The `##'
+preprocessing operator performs token pasting.  When a macro is
+expanded, the two tokens on either side of each `##' operator are
+combined into a single token, which then replaces the `##' and the two
+original tokens in the macro expansion.  Usually both will be
+identifiers, or one will be an identifier and the other a preprocessing
+number.  When pasted, they make a longer identifier.  This isn't the
+only valid case.  It is also possible to concatenate two numbers (or a
+number and a name, such as `1.5' and `e3') into a number.  Also,
+multi-character operators such as `+=' can be formed by token pasting.
+
+   However, two tokens that don't together form a valid token cannot be
+pasted together.  For example, you cannot concatenate `x' with `+' in
+either order.  If you try, the preprocessor issues a warning and emits
+the two tokens.  Whether it puts white space between the tokens is
+undefined.  It is common to find unnecessary uses of `##' in complex
+macros.  If you get this warning, it is likely that you can simply
+remove the `##'.
+
+   Both the tokens combined by `##' could come from the macro body, but
+you could just as well write them as one token in the first place.
+Token pasting is most useful when one or both of the tokens comes from a
+macro argument.  If either of the tokens next to an `##' is a parameter
+name, it is replaced by its actual argument before `##' executes.  As
+with stringification, the actual argument is not macro-expanded first.
+If the argument is empty, that `##' has no effect.
+
+   Keep in mind that the C preprocessor converts comments to whitespace
+before macros are even considered.  Therefore, you cannot create a
+comment by concatenating `/' and `*'.  You can put as much whitespace
+between `##' and its operands as you like, including comments, and you
+can put comments in arguments that will be concatenated.  However, it
+is an error if `##' appears at either end of a macro body.
+
+   Consider a C program that interprets named commands.  There probably
+needs to be a table of commands, perhaps an array of structures declared
+as follows:
+
+     struct command
+     {
+       char *name;
+       void (*function) (void);
+     };
+
+     struct command commands[] =
+     {
+       { "quit", quit_command },
+       { "help", help_command },
+       ...
+     };
+
+   It would be cleaner not to have to give each command name twice,
+once in the string constant and once in the function name.  A macro
+which takes the name of a command as an argument can make this
+unnecessary.  The string constant can be created with stringification,
+and the function name by concatenating the argument with `_command'.
+Here is how it is done:
+
+     #define COMMAND(NAME)  { #NAME, NAME ## _command }
+
+     struct command commands[] =
+     {
+       COMMAND (quit),
+       COMMAND (help),
+       ...
+     };
+
+
+File: cpp.info,  Node: Variadic Macros,  Next: Predefined Macros,  Prev: Concatenation,  Up: Macros
+
+3.6 Variadic Macros
+===================
+
+A macro can be declared to accept a variable number of arguments much as
+a function can.  The syntax for defining the macro is similar to that of
+a function.  Here is an example:
+
+     #define eprintf(...) fprintf (stderr, __VA_ARGS__)
+
+   This kind of macro is called "variadic".  When the macro is invoked,
+all the tokens in its argument list after the last named argument (this
+macro has none), including any commas, become the "variable argument".
+This sequence of tokens replaces the identifier `__VA_ARGS__' in the
+macro body wherever it appears.  Thus, we have this expansion:
+
+     eprintf ("%s:%d: ", input_file, lineno)
+          ==>  fprintf (stderr, "%s:%d: ", input_file, lineno)
+
+   The variable argument is completely macro-expanded before it is
+inserted into the macro expansion, just like an ordinary argument.  You
+may use the `#' and `##' operators to stringify the variable argument
+or to paste its leading or trailing token with another token.  (But see
+below for an important special case for `##'.)
+
+   If your macro is complicated, you may want a more descriptive name
+for the variable argument than `__VA_ARGS__'.  CPP permits this, as an
+extension.  You may write an argument name immediately before the
+`...'; that name is used for the variable argument.  The `eprintf'
+macro above could be written
+
+     #define eprintf(args...) fprintf (stderr, args)
+
+using this extension.  You cannot use `__VA_ARGS__' and this extension
+in the same macro.
+
+   You can have named arguments as well as variable arguments in a
+variadic macro.  We could define `eprintf' like this, instead:
+
+     #define eprintf(format, ...) fprintf (stderr, format, __VA_ARGS__)
+
+This formulation looks more descriptive, but unfortunately it is less
+flexible: you must now supply at least one argument after the format
+string.  In standard C, you cannot omit the comma separating the named
+argument from the variable arguments.  Furthermore, if you leave the
+variable argument empty, you will get a syntax error, because there
+will be an extra comma after the format string.
+
+     eprintf("success!\n", );
+          ==> fprintf(stderr, "success!\n", );
+
+   GNU CPP has a pair of extensions which deal with this problem.
+First, you are allowed to leave the variable argument out entirely:
+
+     eprintf ("success!\n")
+          ==> fprintf(stderr, "success!\n", );
+
+Second, the `##' token paste operator has a special meaning when placed
+between a comma and a variable argument.  If you write
+
+     #define eprintf(format, ...) fprintf (stderr, format, ##__VA_ARGS__)
+
+and the variable argument is left out when the `eprintf' macro is used,
+then the comma before the `##' will be deleted.  This does _not_ happen
+if you pass an empty argument, nor does it happen if the token
+preceding `##' is anything other than a comma.
+
+     eprintf ("success!\n")
+          ==> fprintf(stderr, "success!\n");
+
+The above explanation is ambiguous about the case where the only macro
+parameter is a variable arguments parameter, as it is meaningless to
+try to distinguish whether no argument at all is an empty argument or a
+missing argument.  In this case the C99 standard is clear that the
+comma must remain, however the existing GCC extension used to swallow
+the comma.  So CPP retains the comma when conforming to a specific C
+standard, and drops it otherwise.
+
+   C99 mandates that the only place the identifier `__VA_ARGS__' can
+appear is in the replacement list of a variadic macro.  It may not be
+used as a macro name, macro argument name, or within a different type
+of macro.  It may also be forbidden in open text; the standard is
+ambiguous.  We recommend you avoid using it except for its defined
+purpose.
+
+   Variadic macros are a new feature in C99.  GNU CPP has supported them
+for a long time, but only with a named variable argument (`args...',
+not `...' and `__VA_ARGS__').  If you are concerned with portability to
+previous versions of GCC, you should use only named variable arguments.
+On the other hand, if you are concerned with portability to other
+conforming implementations of C99, you should use only `__VA_ARGS__'.
+
+   Previous versions of CPP implemented the comma-deletion extension
+much more generally.  We have restricted it in this release to minimize
+the differences from C99.  To get the same effect with both this and
+previous versions of GCC, the token preceding the special `##' must be
+a comma, and there must be white space between that comma and whatever
+comes immediately before it:
+
+     #define eprintf(format, args...) fprintf (stderr, format , ##args)
+
+*Note Differences from previous versions::, for the gory details.
+
+
+File: cpp.info,  Node: Predefined Macros,  Next: Undefining and Redefining Macros,  Prev: Variadic Macros,  Up: Macros
+
+3.7 Predefined Macros
+=====================
+
+Several object-like macros are predefined; you use them without
+supplying their definitions.  They fall into three classes: standard,
+common, and system-specific.
+
+   In C++, there is a fourth category, the named operators.  They act
+like predefined macros, but you cannot undefine them.
+
+* Menu:
+
+* Standard Predefined Macros::
+* Common Predefined Macros::
+* System-specific Predefined Macros::
+* C++ Named Operators::
+
+
+File: cpp.info,  Node: Standard Predefined Macros,  Next: Common Predefined Macros,  Up: Predefined Macros
+
+3.7.1 Standard Predefined Macros
+--------------------------------
+
+The standard predefined macros are specified by the relevant language
+standards, so they are available with all compilers that implement
+those standards.  Older compilers may not provide all of them.  Their
+names all start with double underscores.
+
+`__FILE__'
+     This macro expands to the name of the current input file, in the
+     form of a C string constant.  This is the path by which the
+     preprocessor opened the file, not the short name specified in
+     `#include' or as the input file name argument.  For example,
+     `"/usr/local/include/myheader.h"' is a possible expansion of this
+     macro.
+
+`__LINE__'
+     This macro expands to the current input line number, in the form
+     of a decimal integer constant.  While we call it a predefined
+     macro, it's a pretty strange macro, since its "definition" changes
+     with each new line of source code.
+
+   `__FILE__' and `__LINE__' are useful in generating an error message
+to report an inconsistency detected by the program; the message can
+state the source line at which the inconsistency was detected.  For
+example,
+
+     fprintf (stderr, "Internal error: "
+                      "negative string length "
+                      "%d at %s, line %d.",
+              length, __FILE__, __LINE__);
+
+   An `#include' directive changes the expansions of `__FILE__' and
+`__LINE__' to correspond to the included file.  At the end of that
+file, when processing resumes on the input file that contained the
+`#include' directive, the expansions of `__FILE__' and `__LINE__'
+revert to the values they had before the `#include' (but `__LINE__' is
+then incremented by one as processing moves to the line after the
+`#include').
+
+   A `#line' directive changes `__LINE__', and may change `__FILE__' as
+well.  *Note Line Control::.
+
+   C99 introduces `__func__', and GCC has provided `__FUNCTION__' for a
+long time.  Both of these are strings containing the name of the
+current function (there are slight semantic differences; see the GCC
+manual).  Neither of them is a macro; the preprocessor does not know the
+name of the current function.  They tend to be useful in conjunction
+with `__FILE__' and `__LINE__', though.
+
+`__DATE__'
+     This macro expands to a string constant that describes the date on
+     which the preprocessor is being run.  The string constant contains
+     eleven characters and looks like `"Feb 12 1996"'.  If the day of
+     the month is less than 10, it is padded with a space on the left.
+
+     If GCC cannot determine the current date, it will emit a warning
+     message (once per compilation) and `__DATE__' will expand to
+     `"??? ?? ????"'.
+
+`__TIME__'
+     This macro expands to a string constant that describes the time at
+     which the preprocessor is being run.  The string constant contains
+     eight characters and looks like `"23:59:01"'.
+
+     If GCC cannot determine the current time, it will emit a warning
+     message (once per compilation) and `__TIME__' will expand to
+     `"??:??:??"'.
+
+`__STDC__'
+     In normal operation, this macro expands to the constant 1, to
+     signify that this compiler conforms to ISO Standard C.  If GNU CPP
+     is used with a compiler other than GCC, this is not necessarily
+     true; however, the preprocessor always conforms to the standard
+     unless the `-traditional-cpp' option is used.
+
+     This macro is not defined if the `-traditional-cpp' option is used.
+
+     On some hosts, the system compiler uses a different convention,
+     where `__STDC__' is normally 0, but is 1 if the user specifies
+     strict conformance to the C Standard.  CPP follows the host
+     convention when processing system header files, but when
+     processing user files `__STDC__' is always 1.  This has been
+     reported to cause problems; for instance, some versions of Solaris
+     provide X Windows headers that expect `__STDC__' to be either
+     undefined or 1.  *Note Invocation::.
+
+`__STDC_VERSION__'
+     This macro expands to the C Standard's version number, a long
+     integer constant of the form `YYYYMML' where YYYY and MM are the
+     year and month of the Standard version.  This signifies which
+     version of the C Standard the compiler conforms to.  Like
+     `__STDC__', this is not necessarily accurate for the entire
+     implementation, unless GNU CPP is being used with GCC.
+
+     The value `199409L' signifies the 1989 C standard as amended in
+     1994, which is the current default; the value `199901L' signifies
+     the 1999 revision of the C standard.  Support for the 1999
+     revision is not yet complete.
+
+     This macro is not defined if the `-traditional-cpp' option is
+     used, nor when compiling C++ or Objective-C.
+
+`__STDC_HOSTED__'
+     This macro is defined, with value 1, if the compiler's target is a
+     "hosted environment".  A hosted environment has the complete
+     facilities of the standard C library available.
+
+`__cplusplus'
+     This macro is defined when the C++ compiler is in use.  You can use
+     `__cplusplus' to test whether a header is compiled by a C compiler
+     or a C++ compiler.  This macro is similar to `__STDC_VERSION__', in
+     that it expands to a version number.  A fully conforming
+     implementation of the 1998 C++ standard will define this macro to
+     `199711L'.  The GNU C++ compiler is not yet fully conforming, so
+     it uses `1' instead.  It is hoped to complete the implementation
+     of standard C++ in the near future.
+
+`__OBJC__'
+     This macro is defined, with value 1, when the Objective-C compiler
+     is in use.  You can use `__OBJC__' to test whether a header is
+     compiled by a C compiler or an Objective-C compiler.
+
+`__ASSEMBLER__'
+     This macro is defined with value 1 when preprocessing assembly
+     language.
+
+
+
+File: cpp.info,  Node: Common Predefined Macros,  Next: System-specific Predefined Macros,  Prev: Standard Predefined Macros,  Up: Predefined Macros
+
+3.7.2 Common Predefined Macros
+------------------------------
+
+The common predefined macros are GNU C extensions.  They are available
+with the same meanings regardless of the machine or operating system on
+which you are using GNU C or GNU Fortran.  Their names all start with
+double underscores.
+
+`__COUNTER__'
+     This macro expands to sequential integral values starting from 0.
+     In conjunction with the `##' operator, this provides a convenient
+     means to generate unique identifiers.  Care must be taken to
+     ensure that `__COUNTER__' is not expanded prior to inclusion of
+     precompiled headers which use it.  Otherwise, the precompiled
+     headers will not be used.
+
+`__GFORTRAN__'
+     The GNU Fortran compiler defines this.
+
+`__GNUC__'
+`__GNUC_MINOR__'
+`__GNUC_PATCHLEVEL__'
+     These macros are defined by all GNU compilers that use the C
+     preprocessor: C, C++, Objective-C and Fortran.  Their values are
+     the major version, minor version, and patch level of the compiler,
+     as integer constants.  For example, GCC 3.2.1 will define
+     `__GNUC__' to 3, `__GNUC_MINOR__' to 2, and `__GNUC_PATCHLEVEL__'
+     to 1.  These macros are also defined if you invoke the
+     preprocessor directly.
+
+     `__GNUC_PATCHLEVEL__' is new to GCC 3.0; it is also present in the
+     widely-used development snapshots leading up to 3.0 (which identify
+     themselves as GCC 2.96 or 2.97, depending on which snapshot you
+     have).
+
+     If all you need to know is whether or not your program is being
+     compiled by GCC, or a non-GCC compiler that claims to accept the
+     GNU C dialects, you can simply test `__GNUC__'.  If you need to
+     write code which depends on a specific version, you must be more
+     careful.  Each time the minor version is increased, the patch
+     level is reset to zero; each time the major version is increased
+     (which happens rarely), the minor version and patch level are
+     reset.  If you wish to use the predefined macros directly in the
+     conditional, you will need to write it like this:
+
+          /* Test for GCC > 3.2.0 */
+          #if __GNUC__ > 3 || \
+              (__GNUC__ == 3 && (__GNUC_MINOR__ > 2 || \
+                                 (__GNUC_MINOR__ == 2 && \
+                                  __GNUC_PATCHLEVEL__ > 0))
+
+     Another approach is to use the predefined macros to calculate a
+     single number, then compare that against a threshold:
+
+          #define GCC_VERSION (__GNUC__ * 10000 \
+                               + __GNUC_MINOR__ * 100 \
+                               + __GNUC_PATCHLEVEL__)
+          ...
+          /* Test for GCC > 3.2.0 */
+          #if GCC_VERSION > 30200
+
+     Many people find this form easier to understand.
+
+`__GNUG__'
+     The GNU C++ compiler defines this.  Testing it is equivalent to
+     testing `(__GNUC__ && __cplusplus)'.
+
+`__STRICT_ANSI__'
+     GCC defines this macro if and only if the `-ansi' switch, or a
+     `-std' switch specifying strict conformance to some version of ISO
+     C, was specified when GCC was invoked.  It is defined to `1'.
+     This macro exists primarily to direct GNU libc's header files to
+     restrict their definitions to the minimal set found in the 1989 C
+     standard.
+
+`__BASE_FILE__'
+     This macro expands to the name of the main input file, in the form
+     of a C string constant.  This is the source file that was specified
+     on the command line of the preprocessor or C compiler.
+
+`__INCLUDE_LEVEL__'
+     This macro expands to a decimal integer constant that represents
+     the depth of nesting in include files.  The value of this macro is
+     incremented on every `#include' directive and decremented at the
+     end of every included file.  It starts out at 0, its value within
+     the base file specified on the command line.
+
+`__ELF__'
+     This macro is defined if the target uses the ELF object format.
+
+`__VERSION__'
+     This macro expands to a string constant which describes the
+     version of the compiler in use.  You should not rely on its
+     contents having any particular form, but it can be counted on to
+     contain at least the release number.
+
+`__OPTIMIZE__'
+`__OPTIMIZE_SIZE__'
+`__NO_INLINE__'
+     These macros describe the compilation mode.  `__OPTIMIZE__' is
+     defined in all optimizing compilations.  `__OPTIMIZE_SIZE__' is
+     defined if the compiler is optimizing for size, not speed.
+     `__NO_INLINE__' is defined if no functions will be inlined into
+     their callers (when not optimizing, or when inlining has been
+     specifically disabled by `-fno-inline').
+
+     These macros cause certain GNU header files to provide optimized
+     definitions, using macros or inline functions, of system library
+     functions.  You should not use these macros in any way unless you
+     make sure that programs will execute with the same effect whether
+     or not they are defined.  If they are defined, their value is 1.
+
+`__GNUC_GNU_INLINE__'
+     GCC defines this macro if functions declared `inline' will be
+     handled in GCC's traditional gnu90 mode.  Object files will contain
+     externally visible definitions of all functions declared `inline'
+     without `extern' or `static'.  They will not contain any
+     definitions of any functions declared `extern inline'.
+
+`__GNUC_STDC_INLINE__'
+     GCC defines this macro if functions declared `inline' will be
+     handled according to the ISO C99 standard.  Object files will
+     contain externally visible definitions of all functions declared
+     `extern inline'.  They will not contain definitions of any
+     functions declared `inline' without `extern'.
+
+     If this macro is defined, GCC supports the `gnu_inline' function
+     attribute as a way to always get the gnu90 behavior.  Support for
+     this and `__GNUC_GNU_INLINE__' was added in GCC 4.1.3.  If neither
+     macro is defined, an older version of GCC is being used: `inline'
+     functions will be compiled in gnu90 mode, and the `gnu_inline'
+     function attribute will not be recognized.
+
+`__CHAR_UNSIGNED__'
+     GCC defines this macro if and only if the data type `char' is
+     unsigned on the target machine.  It exists to cause the standard
+     header file `limits.h' to work correctly.  You should not use this
+     macro yourself; instead, refer to the standard macros defined in
+     `limits.h'.
+
+`__WCHAR_UNSIGNED__'
+     Like `__CHAR_UNSIGNED__', this macro is defined if and only if the
+     data type `wchar_t' is unsigned and the front-end is in C++ mode.
+
+`__REGISTER_PREFIX__'
+     This macro expands to a single token (not a string constant) which
+     is the prefix applied to CPU register names in assembly language
+     for this target.  You can use it to write assembly that is usable
+     in multiple environments.  For example, in the `m68k-aout'
+     environment it expands to nothing, but in the `m68k-coff'
+     environment it expands to a single `%'.
+
+`__USER_LABEL_PREFIX__'
+     This macro expands to a single token which is the prefix applied to
+     user labels (symbols visible to C code) in assembly.  For example,
+     in the `m68k-aout' environment it expands to an `_', but in the
+     `m68k-coff' environment it expands to nothing.
+
+     This macro will have the correct definition even if
+     `-f(no-)underscores' is in use, but it will not be correct if
+     target-specific options that adjust this prefix are used (e.g. the
+     OSF/rose `-mno-underscores' option).
+
+`__SIZE_TYPE__'
+`__PTRDIFF_TYPE__'
+`__WCHAR_TYPE__'
+`__WINT_TYPE__'
+`__INTMAX_TYPE__'
+`__UINTMAX_TYPE__'
+`__SIG_ATOMIC_TYPE__'
+`__INT8_TYPE__'
+`__INT16_TYPE__'
+`__INT32_TYPE__'
+`__INT64_TYPE__'
+`__UINT8_TYPE__'
+`__UINT16_TYPE__'
+`__UINT32_TYPE__'
+`__UINT64_TYPE__'
+`__INT_LEAST8_TYPE__'
+`__INT_LEAST16_TYPE__'
+`__INT_LEAST32_TYPE__'
+`__INT_LEAST64_TYPE__'
+`__UINT_LEAST8_TYPE__'
+`__UINT_LEAST16_TYPE__'
+`__UINT_LEAST32_TYPE__'
+`__UINT_LEAST64_TYPE__'
+`__INT_FAST8_TYPE__'
+`__INT_FAST16_TYPE__'
+`__INT_FAST32_TYPE__'
+`__INT_FAST64_TYPE__'
+`__UINT_FAST8_TYPE__'
+`__UINT_FAST16_TYPE__'
+`__UINT_FAST32_TYPE__'
+`__UINT_FAST64_TYPE__'
+`__INTPTR_TYPE__'
+`__UINTPTR_TYPE__'
+     These macros are defined to the correct underlying types for the
+     `size_t', `ptrdiff_t', `wchar_t', `wint_t', `intmax_t',
+     `uintmax_t', `sig_atomic_t', `int8_t', `int16_t', `int32_t',
+     `int64_t', `uint8_t', `uint16_t', `uint32_t', `uint64_t',
+     `int_least8_t', `int_least16_t', `int_least32_t', `int_least64_t',
+     `uint_least8_t', `uint_least16_t', `uint_least32_t',
+     `uint_least64_t', `int_fast8_t', `int_fast16_t', `int_fast32_t',
+     `int_fast64_t', `uint_fast8_t', `uint_fast16_t', `uint_fast32_t',
+     `uint_fast64_t', `intptr_t', and `uintptr_t' typedefs,
+     respectively.  They exist to make the standard header files
+     `stddef.h', `stdint.h', and `wchar.h' work correctly.  You should
+     not use these macros directly; instead, include the appropriate
+     headers and use the typedefs.  Some of these macros may not be
+     defined on particular systems if GCC does not provide a `stdint.h'
+     header on those systems.
+
+`__CHAR_BIT__'
+     Defined to the number of bits used in the representation of the
+     `char' data type.  It exists to make the standard header given
+     numerical limits work correctly.  You should not use this macro
+     directly; instead, include the appropriate headers.
+
+`__SCHAR_MAX__'
+`__WCHAR_MAX__'
+`__SHRT_MAX__'
+`__INT_MAX__'
+`__LONG_MAX__'
+`__LONG_LONG_MAX__'
+`__WINT_MAX__'
+`__SIZE_MAX__'
+`__PTRDIFF_MAX__'
+`__INTMAX_MAX__'
+`__UINTMAX_MAX__'
+`__SIG_ATOMIC_MAX__'
+`__INT8_MAX__'
+`__INT16_MAX__'
+`__INT32_MAX__'
+`__INT64_MAX__'
+`__UINT8_MAX__'
+`__UINT16_MAX__'
+`__UINT32_MAX__'
+`__UINT64_MAX__'
+`__INT_LEAST8_MAX__'
+`__INT_LEAST16_MAX__'
+`__INT_LEAST32_MAX__'
+`__INT_LEAST64_MAX__'
+`__UINT_LEAST8_MAX__'
+`__UINT_LEAST16_MAX__'
+`__UINT_LEAST32_MAX__'
+`__UINT_LEAST64_MAX__'
+`__INT_FAST8_MAX__'
+`__INT_FAST16_MAX__'
+`__INT_FAST32_MAX__'
+`__INT_FAST64_MAX__'
+`__UINT_FAST8_MAX__'
+`__UINT_FAST16_MAX__'
+`__UINT_FAST32_MAX__'
+`__UINT_FAST64_MAX__'
+`__INTPTR_MAX__'
+`__UINTPTR_MAX__'
+`__WCHAR_MIN__'
+`__WINT_MIN__'
+`__SIG_ATOMIC_MIN__'
+     Defined to the maximum value of the `signed char', `wchar_t',
+     `signed short', `signed int', `signed long', `signed long long',
+     `wint_t', `size_t', `ptrdiff_t', `intmax_t', `uintmax_t',
+     `sig_atomic_t', `int8_t', `int16_t', `int32_t', `int64_t',
+     `uint8_t', `uint16_t', `uint32_t', `uint64_t', `int_least8_t',
+     `int_least16_t', `int_least32_t', `int_least64_t',
+     `uint_least8_t', `uint_least16_t', `uint_least32_t',
+     `uint_least64_t', `int_fast8_t', `int_fast16_t', `int_fast32_t',
+     `int_fast64_t', `uint_fast8_t', `uint_fast16_t', `uint_fast32_t',
+     `uint_fast64_t', `intptr_t', and `uintptr_t' types and to the
+     minimum value of the `wchar_t', `wint_t', and `sig_atomic_t' types
+     respectively.  They exist to make the standard header given
+     numerical limits work correctly.  You should not use these macros
+     directly; instead, include the appropriate headers.  Some of these
+     macros may not be defined on particular systems if GCC does not
+     provide a `stdint.h' header on those systems.
+
+`__INT8_C'
+`__INT16_C'
+`__INT32_C'
+`__INT64_C'
+`__UINT8_C'
+`__UINT16_C'
+`__UINT32_C'
+`__UINT64_C'
+`__INTMAX_C'
+`__UINTMAX_C'
+     Defined to implementations of the standard `stdint.h' macros with
+     the same names without the leading `__'.  They exist the make the
+     implementation of that header work correctly.  You should not use
+     these macros directly; instead, include the appropriate headers.
+     Some of these macros may not be defined on particular systems if
+     GCC does not provide a `stdint.h' header on those systems.
+
+`__SIZEOF_INT__'
+`__SIZEOF_LONG__'
+`__SIZEOF_LONG_LONG__'
+`__SIZEOF_SHORT__'
+`__SIZEOF_POINTER__'
+`__SIZEOF_FLOAT__'
+`__SIZEOF_DOUBLE__'
+`__SIZEOF_LONG_DOUBLE__'
+`__SIZEOF_SIZE_T__'
+`__SIZEOF_WCHAR_T__'
+`__SIZEOF_WINT_T__'
+`__SIZEOF_PTRDIFF_T__'
+     Defined to the number of bytes of the C standard data types: `int',
+     `long', `long long', `short', `void *', `float', `double', `long
+     double', `size_t', `wchar_t', `wint_t' and `ptrdiff_t'.
+
+`__BYTE_ORDER__'
+`__ORDER_LITTLE_ENDIAN__'
+`__ORDER_BIG_ENDIAN__'
+`__ORDER_PDP_ENDIAN__'
+     `__BYTE_ORDER__' is defined to one of the values
+     `__ORDER_LITTLE_ENDIAN__', `__ORDER_BIG_ENDIAN__', or
+     `__ORDER_PDP_ENDIAN__' to reflect the layout of multi-byte and
+     multi-word quantities in memory.  If `__BYTE_ORDER__' is equal to
+     `__ORDER_LITTLE_ENDIAN__' or `__ORDER_BIG_ENDIAN__', then
+     multi-byte and multi-word quantities are laid out identically: the
+     byte (word) at the lowest address is the least significant or most
+     significant byte (word) of the quantity, respectively.  If
+     `__BYTE_ORDER__' is equal to `__ORDER_PDP_ENDIAN__', then bytes in
+     16-bit words are laid out in a little-endian fashion, whereas the
+     16-bit subwords of a 32-bit quantity are laid out in big-endian
+     fashion.
+
+     You should use these macros for testing like this:
+
+          /* Test for a little-endian machine */
+          #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+
+`__FLOAT_WORD_ORDER__'
+     `__FLOAT_WORD_ORDER__' is defined to one of the values
+     `__ORDER_LITTLE_ENDIAN__' or `__ORDER_BIG_ENDIAN__' to reflect the
+     layout of the words of multi-word floating-point quantities.
+
+`__DEPRECATED'
+     This macro is defined, with value 1, when compiling a C++ source
+     file with warnings about deprecated constructs enabled.  These
+     warnings are enabled by default, but can be disabled with
+     `-Wno-deprecated'.
+
+`__EXCEPTIONS'
+     This macro is defined, with value 1, when compiling a C++ source
+     file with exceptions enabled.  If `-fno-exceptions' is used when
+     compiling the file, then this macro is not defined.
+
+`__GXX_RTTI'
+     This macro is defined, with value 1, when compiling a C++ source
+     file with runtime type identification enabled.  If `-fno-rtti' is
+     used when compiling the file, then this macro is not defined.
+
+`__USING_SJLJ_EXCEPTIONS__'
+     This macro is defined, with value 1, if the compiler uses the old
+     mechanism based on `setjmp' and `longjmp' for exception handling.
+
+`__GXX_EXPERIMENTAL_CXX0X__'
+     This macro is defined when compiling a C++ source file with the
+     option `-std=c++0x' or `-std=gnu++0x'. It indicates that some
+     features likely to be included in C++0x are available. Note that
+     these features are experimental, and may change or be removed in
+     future versions of GCC.
+
+`__GXX_WEAK__'
+     This macro is defined when compiling a C++ source file.  It has the
+     value 1 if the compiler will use weak symbols, COMDAT sections, or
+     other similar techniques to collapse symbols with "vague linkage"
+     that are defined in multiple translation units.  If the compiler
+     will not collapse such symbols, this macro is defined with value
+     0.  In general, user code should not need to make use of this
+     macro; the purpose of this macro is to ease implementation of the
+     C++ runtime library provided with G++.
+
+`__NEXT_RUNTIME__'
+     This macro is defined, with value 1, if (and only if) the NeXT
+     runtime (as in `-fnext-runtime') is in use for Objective-C.  If
+     the GNU runtime is used, this macro is not defined, so that you
+     can use this macro to determine which runtime (NeXT or GNU) is
+     being used.
+
+`__LP64__'
+`_LP64'
+     These macros are defined, with value 1, if (and only if) the
+     compilation is for a target where `long int' and pointer both use
+     64-bits and `int' uses 32-bit.
+
+`__SSP__'
+     This macro is defined, with value 1, when `-fstack-protector' is in
+     use.
+
+`__SSP_ALL__'
+     This macro is defined, with value 2, when `-fstack-protector-all'
+     is in use.
+
+`__TIMESTAMP__'
+     This macro expands to a string constant that describes the date
+     and time of the last modification of the current source file. The
+     string constant contains abbreviated day of the week, month, day
+     of the month, time in hh:mm:ss form, year and looks like
+     `"Sun Sep 16 01:03:52 1973"'.  If the day of the month is less
+     than 10, it is padded with a space on the left.
+
+     If GCC cannot determine the current date, it will emit a warning
+     message (once per compilation) and `__TIMESTAMP__' will expand to
+     `"??? ??? ?? ??:??:?? ????"'.
+
+`__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1'
+`__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2'
+`__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4'
+`__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8'
+`__GCC_HAVE_SYNC_COMPARE_AND_SWAP_16'
+     These macros are defined when the target processor supports atomic
+     compare and swap operations on operands 1, 2, 4, 8 or 16 bytes in
+     length, respectively.
+
+`__GCC_HAVE_DWARF2_CFI_ASM'
+     This macro is defined when the compiler is emitting Dwarf2 CFI
+     directives to the assembler.  When this is defined, it is possible
+     to emit those same directives in inline assembly.
+
+`__FP_FAST_FMA'
+`__FP_FAST_FMAF'
+`__FP_FAST_FMAL'
+     These macros are defined with value 1 if the backend supports the
+     `fma', `fmaf', and `fmal' builtin functions, so that the include
+     file `math.h' can define the macros `FP_FAST_FMA', `FP_FAST_FMAF',
+     and `FP_FAST_FMAL' for compatibility with the 1999 C standard.
+
+
+File: cpp.info,  Node: System-specific Predefined Macros,  Next: C++ Named Operators,  Prev: Common Predefined Macros,  Up: Predefined Macros
+
+3.7.3 System-specific Predefined Macros
+---------------------------------------
+
+The C preprocessor normally predefines several macros that indicate what
+type of system and machine is in use.  They are obviously different on
+each target supported by GCC.  This manual, being for all systems and
+machines, cannot tell you what their names are, but you can use `cpp
+-dM' to see them all.  *Note Invocation::.  All system-specific
+predefined macros expand to the constant 1, so you can test them with
+either `#ifdef' or `#if'.
+
+   The C standard requires that all system-specific macros be part of
+the "reserved namespace".  All names which begin with two underscores,
+or an underscore and a capital letter, are reserved for the compiler and
+library to use as they wish.  However, historically system-specific
+macros have had names with no special prefix; for instance, it is common
+to find `unix' defined on Unix systems.  For all such macros, GCC
+provides a parallel macro with two underscores added at the beginning
+and the end.  If `unix' is defined, `__unix__' will be defined too.
+There will never be more than two underscores; the parallel of `_mips'
+is `__mips__'.
+
+   When the `-ansi' option, or any `-std' option that requests strict
+conformance, is given to the compiler, all the system-specific
+predefined macros outside the reserved namespace are suppressed.  The
+parallel macros, inside the reserved namespace, remain defined.
+
+   We are slowly phasing out all predefined macros which are outside the
+reserved namespace.  You should never use them in new programs, and we
+encourage you to correct older code to use the parallel macros whenever
+you find it.  We don't recommend you use the system-specific macros that
+are in the reserved namespace, either.  It is better in the long run to
+check specifically for features you need, using a tool such as
+`autoconf'.
+
+
+File: cpp.info,  Node: C++ Named Operators,  Prev: System-specific Predefined Macros,  Up: Predefined Macros
+
+3.7.4 C++ Named Operators
+-------------------------
+
+In C++, there are eleven keywords which are simply alternate spellings
+of operators normally written with punctuation.  These keywords are
+treated as such even in the preprocessor.  They function as operators in
+`#if', and they cannot be defined as macros or poisoned.  In C, you can
+request that those keywords take their C++ meaning by including
+`iso646.h'.  That header defines each one as a normal object-like macro
+expanding to the appropriate punctuator.
+
+   These are the named operators and their corresponding punctuators:
+
+Named Operator   Punctuator
+`and'            `&&'
+`and_eq'         `&='
+`bitand'         `&'
+`bitor'          `|'
+`compl'          `~'
+`not'            `!'
+`not_eq'         `!='
+`or'             `||'
+`or_eq'          `|='
+`xor'            `^'
+`xor_eq'         `^='
+
+
+File: cpp.info,  Node: Undefining and Redefining Macros,  Next: Directives Within Macro Arguments,  Prev: Predefined Macros,  Up: Macros
+
+3.8 Undefining and Redefining Macros
+====================================
+
+If a macro ceases to be useful, it may be "undefined" with the `#undef'
+directive.  `#undef' takes a single argument, the name of the macro to
+undefine.  You use the bare macro name, even if the macro is
+function-like.  It is an error if anything appears on the line after
+the macro name.  `#undef' has no effect if the name is not a macro.
+
+     #define FOO 4
+     x = FOO;        ==> x = 4;
+     #undef FOO
+     x = FOO;        ==> x = FOO;
+
+   Once a macro has been undefined, that identifier may be "redefined"
+as a macro by a subsequent `#define' directive.  The new definition
+need not have any resemblance to the old definition.
+
+   However, if an identifier which is currently a macro is redefined,
+then the new definition must be "effectively the same" as the old one.
+Two macro definitions are effectively the same if:
+   * Both are the same type of macro (object- or function-like).
+
+   * All the tokens of the replacement list are the same.
+
+   * If there are any parameters, they are the same.
+
+   * Whitespace appears in the same places in both.  It need not be
+     exactly the same amount of whitespace, though.  Remember that
+     comments count as whitespace.
+
+These definitions are effectively the same:
+     #define FOUR (2 + 2)
+     #define FOUR         (2    +    2)
+     #define FOUR (2 /* two */ + 2)
+   but these are not:
+     #define FOUR (2 + 2)
+     #define FOUR ( 2+2 )
+     #define FOUR (2 * 2)
+     #define FOUR(score,and,seven,years,ago) (2 + 2)
+
+   If a macro is redefined with a definition that is not effectively the
+same as the old one, the preprocessor issues a warning and changes the
+macro to use the new definition.  If the new definition is effectively
+the same, the redefinition is silently ignored.  This allows, for
+instance, two different headers to define a common macro.  The
+preprocessor will only complain if the definitions do not match.
+
+
+File: cpp.info,  Node: Directives Within Macro Arguments,  Next: Macro Pitfalls,  Prev: Undefining and Redefining Macros,  Up: Macros
+
+3.9 Directives Within Macro Arguments
+=====================================
+
+Occasionally it is convenient to use preprocessor directives within the
+arguments of a macro.  The C and C++ standards declare that behavior in
+these cases is undefined.
+
+   Versions of CPP prior to 3.2 would reject such constructs with an
+error message.  This was the only syntactic difference between normal
+functions and function-like macros, so it seemed attractive to remove
+this limitation, and people would often be surprised that they could
+not use macros in this way.  Moreover, sometimes people would use
+conditional compilation in the argument list to a normal library
+function like `printf', only to find that after a library upgrade
+`printf' had changed to be a function-like macro, and their code would
+no longer compile.  So from version 3.2 we changed CPP to successfully
+process arbitrary directives within macro arguments in exactly the same
+way as it would have processed the directive were the function-like
+macro invocation not present.
+
+   If, within a macro invocation, that macro is redefined, then the new
+definition takes effect in time for argument pre-expansion, but the
+original definition is still used for argument replacement.  Here is a
+pathological example:
+
+     #define f(x) x x
+     f (1
+     #undef f
+     #define f 2
+     f)
+
+which expands to
+
+     1 2 1 2
+
+with the semantics described above.
+
+
+File: cpp.info,  Node: Macro Pitfalls,  Prev: Directives Within Macro Arguments,  Up: Macros
+
+3.10 Macro Pitfalls
+===================
+
+In this section we describe some special rules that apply to macros and
+macro expansion, and point out certain cases in which the rules have
+counter-intuitive consequences that you must watch out for.
+
+* Menu:
+
+* Misnesting::
+* Operator Precedence Problems::
+* Swallowing the Semicolon::
+* Duplication of Side Effects::
+* Self-Referential Macros::
+* Argument Prescan::
+* Newlines in Arguments::
+
+
+File: cpp.info,  Node: Misnesting,  Next: Operator Precedence Problems,  Up: Macro Pitfalls
+
+3.10.1 Misnesting
+-----------------
+
+When a macro is called with arguments, the arguments are substituted
+into the macro body and the result is checked, together with the rest of
+the input file, for more macro calls.  It is possible to piece together
+a macro call coming partially from the macro body and partially from the
+arguments.  For example,
+
+     #define twice(x) (2*(x))
+     #define call_with_1(x) x(1)
+     call_with_1 (twice)
+          ==> twice(1)
+          ==> (2*(1))
+
+   Macro definitions do not have to have balanced parentheses.  By
+writing an unbalanced open parenthesis in a macro body, it is possible
+to create a macro call that begins inside the macro body but ends
+outside of it.  For example,
+
+     #define strange(file) fprintf (file, "%s %d",
+     ...
+     strange(stderr) p, 35)
+          ==> fprintf (stderr, "%s %d", p, 35)
+
+   The ability to piece together a macro call can be useful, but the
+use of unbalanced open parentheses in a macro body is just confusing,
+and should be avoided.
+
+
+File: cpp.info,  Node: Operator Precedence Problems,  Next: Swallowing the Semicolon,  Prev: Misnesting,  Up: Macro Pitfalls
+
+3.10.2 Operator Precedence Problems
+-----------------------------------
+
+You may have noticed that in most of the macro definition examples shown
+above, each occurrence of a macro argument name had parentheses around
+it.  In addition, another pair of parentheses usually surround the
+entire macro definition.  Here is why it is best to write macros that
+way.
+
+   Suppose you define a macro as follows,
+
+     #define ceil_div(x, y) (x + y - 1) / y
+
+whose purpose is to divide, rounding up.  (One use for this operation is
+to compute how many `int' objects are needed to hold a certain number
+of `char' objects.)  Then suppose it is used as follows:
+
+     a = ceil_div (b & c, sizeof (int));
+          ==> a = (b & c + sizeof (int) - 1) / sizeof (int);
+
+This does not do what is intended.  The operator-precedence rules of C
+make it equivalent to this:
+
+     a = (b & (c + sizeof (int) - 1)) / sizeof (int);
+
+What we want is this:
+
+     a = ((b & c) + sizeof (int) - 1)) / sizeof (int);
+
+Defining the macro as
+
+     #define ceil_div(x, y) ((x) + (y) - 1) / (y)
+
+provides the desired result.
+
+   Unintended grouping can result in another way.  Consider `sizeof
+ceil_div(1, 2)'.  That has the appearance of a C expression that would
+compute the size of the type of `ceil_div (1, 2)', but in fact it means
+something very different.  Here is what it expands to:
+
+     sizeof ((1) + (2) - 1) / (2)
+
+This would take the size of an integer and divide it by two.  The
+precedence rules have put the division outside the `sizeof' when it was
+intended to be inside.
+
+   Parentheses around the entire macro definition prevent such problems.
+Here, then, is the recommended way to define `ceil_div':
+
+     #define ceil_div(x, y) (((x) + (y) - 1) / (y))
+
+
+File: cpp.info,  Node: Swallowing the Semicolon,  Next: Duplication of Side Effects,  Prev: Operator Precedence Problems,  Up: Macro Pitfalls
+
+3.10.3 Swallowing the Semicolon
+-------------------------------
+
+Often it is desirable to define a macro that expands into a compound
+statement.  Consider, for example, the following macro, that advances a
+pointer (the argument `p' says where to find it) across whitespace
+characters:
+
+     #define SKIP_SPACES(p, limit)  \
+     { char *lim = (limit);         \
+       while (p < lim) {            \
+         if (*p++ != ' ') {         \
+           p--; break; }}}
+
+Here backslash-newline is used to split the macro definition, which must
+be a single logical line, so that it resembles the way such code would
+be laid out if not part of a macro definition.
+
+   A call to this macro might be `SKIP_SPACES (p, lim)'.  Strictly
+speaking, the call expands to a compound statement, which is a complete
+statement with no need for a semicolon to end it.  However, since it
+looks like a function call, it minimizes confusion if you can use it
+like a function call, writing a semicolon afterward, as in `SKIP_SPACES
+(p, lim);'
+
+   This can cause trouble before `else' statements, because the
+semicolon is actually a null statement.  Suppose you write
+
+     if (*p != 0)
+       SKIP_SPACES (p, lim);
+     else ...
+
+The presence of two statements--the compound statement and a null
+statement--in between the `if' condition and the `else' makes invalid C
+code.
+
+   The definition of the macro `SKIP_SPACES' can be altered to solve
+this problem, using a `do ... while' statement.  Here is how:
+
+     #define SKIP_SPACES(p, limit)     \
+     do { char *lim = (limit);         \
+          while (p < lim) {            \
+            if (*p++ != ' ') {         \
+              p--; break; }}}          \
+     while (0)
+
+   Now `SKIP_SPACES (p, lim);' expands into
+
+     do {...} while (0);
+
+which is one statement.  The loop executes exactly once; most compilers
+generate no extra code for it.
+
+
+File: cpp.info,  Node: Duplication of Side Effects,  Next: Self-Referential Macros,  Prev: Swallowing the Semicolon,  Up: Macro Pitfalls
+
+3.10.4 Duplication of Side Effects
+----------------------------------
+
+Many C programs define a macro `min', for "minimum", like this:
+
+     #define min(X, Y)  ((X) < (Y) ? (X) : (Y))
+
+   When you use this macro with an argument containing a side effect,
+as shown here,
+
+     next = min (x + y, foo (z));
+
+it expands as follows:
+
+     next = ((x + y) < (foo (z)) ? (x + y) : (foo (z)));
+
+where `x + y' has been substituted for `X' and `foo (z)' for `Y'.
+
+   The function `foo' is used only once in the statement as it appears
+in the program, but the expression `foo (z)' has been substituted twice
+into the macro expansion.  As a result, `foo' might be called two times
+when the statement is executed.  If it has side effects or if it takes
+a long time to compute, the results might not be what you intended.  We
+say that `min' is an "unsafe" macro.
+
+   The best solution to this problem is to define `min' in a way that
+computes the value of `foo (z)' only once.  The C language offers no
+standard way to do this, but it can be done with GNU extensions as
+follows:
+
+     #define min(X, Y)                \
+     ({ typeof (X) x_ = (X);          \
+        typeof (Y) y_ = (Y);          \
+        (x_ < y_) ? x_ : y_; })
+
+   The `({ ... })' notation produces a compound statement that acts as
+an expression.  Its value is the value of its last statement.  This
+permits us to define local variables and assign each argument to one.
+The local variables have underscores after their names to reduce the
+risk of conflict with an identifier of wider scope (it is impossible to
+avoid this entirely).  Now each argument is evaluated exactly once.
+
+   If you do not wish to use GNU C extensions, the only solution is to
+be careful when _using_ the macro `min'.  For example, you can
+calculate the value of `foo (z)', save it in a variable, and use that
+variable in `min':
+
+     #define min(X, Y)  ((X) < (Y) ? (X) : (Y))
+     ...
+     {
+       int tem = foo (z);
+       next = min (x + y, tem);
+     }
+
+(where we assume that `foo' returns type `int').
+
+
+File: cpp.info,  Node: Self-Referential Macros,  Next: Argument Prescan,  Prev: Duplication of Side Effects,  Up: Macro Pitfalls
+
+3.10.5 Self-Referential Macros
+------------------------------
+
+A "self-referential" macro is one whose name appears in its definition.
+Recall that all macro definitions are rescanned for more macros to
+replace.  If the self-reference were considered a use of the macro, it
+would produce an infinitely large expansion.  To prevent this, the
+self-reference is not considered a macro call.  It is passed into the
+preprocessor output unchanged.  Consider an example:
+
+     #define foo (4 + foo)
+
+where `foo' is also a variable in your program.
+
+   Following the ordinary rules, each reference to `foo' will expand
+into `(4 + foo)'; then this will be rescanned and will expand into `(4
++ (4 + foo))'; and so on until the computer runs out of memory.
+
+   The self-reference rule cuts this process short after one step, at
+`(4 + foo)'.  Therefore, this macro definition has the possibly useful
+effect of causing the program to add 4 to the value of `foo' wherever
+`foo' is referred to.
+
+   In most cases, it is a bad idea to take advantage of this feature.  A
+person reading the program who sees that `foo' is a variable will not
+expect that it is a macro as well.  The reader will come across the
+identifier `foo' in the program and think its value should be that of
+the variable `foo', whereas in fact the value is four greater.
+
+   One common, useful use of self-reference is to create a macro which
+expands to itself.  If you write
+
+     #define EPERM EPERM
+
+then the macro `EPERM' expands to `EPERM'.  Effectively, it is left
+alone by the preprocessor whenever it's used in running text.  You can
+tell that it's a macro with `#ifdef'.  You might do this if you want to
+define numeric constants with an `enum', but have `#ifdef' be true for
+each constant.
+
+   If a macro `x' expands to use a macro `y', and the expansion of `y'
+refers to the macro `x', that is an "indirect self-reference" of `x'.
+`x' is not expanded in this case either.  Thus, if we have
+
+     #define x (4 + y)
+     #define y (2 * x)
+
+then `x' and `y' expand as follows:
+
+     x    ==> (4 + y)
+          ==> (4 + (2 * x))
+
+     y    ==> (2 * x)
+          ==> (2 * (4 + y))
+
+Each macro is expanded when it appears in the definition of the other
+macro, but not when it indirectly appears in its own definition.
+
+
+File: cpp.info,  Node: Argument Prescan,  Next: Newlines in Arguments,  Prev: Self-Referential Macros,  Up: Macro Pitfalls
+
+3.10.6 Argument Prescan
+-----------------------
+
+Macro arguments are completely macro-expanded before they are
+substituted into a macro body, unless they are stringified or pasted
+with other tokens.  After substitution, the entire macro body, including
+the substituted arguments, is scanned again for macros to be expanded.
+The result is that the arguments are scanned _twice_ to expand macro
+calls in them.
+
+   Most of the time, this has no effect.  If the argument contained any
+macro calls, they are expanded during the first scan.  The result
+therefore contains no macro calls, so the second scan does not change
+it.  If the argument were substituted as given, with no prescan, the
+single remaining scan would find the same macro calls and produce the
+same results.
+
+   You might expect the double scan to change the results when a
+self-referential macro is used in an argument of another macro (*note
+Self-Referential Macros::): the self-referential macro would be
+expanded once in the first scan, and a second time in the second scan.
+However, this is not what happens.  The self-references that do not
+expand in the first scan are marked so that they will not expand in the
+second scan either.
+
+   You might wonder, "Why mention the prescan, if it makes no
+difference?  And why not skip it and make the preprocessor faster?"
+The answer is that the prescan does make a difference in three special
+cases:
+
+   * Nested calls to a macro.
+
+     We say that "nested" calls to a macro occur when a macro's argument
+     contains a call to that very macro.  For example, if `f' is a macro
+     that expects one argument, `f (f (1))' is a nested pair of calls to
+     `f'.  The desired expansion is made by expanding `f (1)' and
+     substituting that into the definition of `f'.  The prescan causes
+     the expected result to happen.  Without the prescan, `f (1)' itself
+     would be substituted as an argument, and the inner use of `f' would
+     appear during the main scan as an indirect self-reference and
+     would not be expanded.
+
+   * Macros that call other macros that stringify or concatenate.
+
+     If an argument is stringified or concatenated, the prescan does not
+     occur.  If you _want_ to expand a macro, then stringify or
+     concatenate its expansion, you can do that by causing one macro to
+     call another macro that does the stringification or concatenation.
+     For instance, if you have
+
+          #define AFTERX(x) X_ ## x
+          #define XAFTERX(x) AFTERX(x)
+          #define TABLESIZE 1024
+          #define BUFSIZE TABLESIZE
+
+     then `AFTERX(BUFSIZE)' expands to `X_BUFSIZE', and
+     `XAFTERX(BUFSIZE)' expands to `X_1024'.  (Not to `X_TABLESIZE'.
+     Prescan always does a complete expansion.)
+
+   * Macros used in arguments, whose expansions contain unshielded
+     commas.
+
+     This can cause a macro expanded on the second scan to be called
+     with the wrong number of arguments.  Here is an example:
+
+          #define foo  a,b
+          #define bar(x) lose(x)
+          #define lose(x) (1 + (x))
+
+     We would like `bar(foo)' to turn into `(1 + (foo))', which would
+     then turn into `(1 + (a,b))'.  Instead, `bar(foo)' expands into
+     `lose(a,b)', and you get an error because `lose' requires a single
+     argument.  In this case, the problem is easily solved by the same
+     parentheses that ought to be used to prevent misnesting of
+     arithmetic operations:
+
+          #define foo (a,b)
+     or
+          #define bar(x) lose((x))
+
+     The extra pair of parentheses prevents the comma in `foo''s
+     definition from being interpreted as an argument separator.
+
+
+
+File: cpp.info,  Node: Newlines in Arguments,  Prev: Argument Prescan,  Up: Macro Pitfalls
+
+3.10.7 Newlines in Arguments
+----------------------------
+
+The invocation of a function-like macro can extend over many logical
+lines.  However, in the present implementation, the entire expansion
+comes out on one line.  Thus line numbers emitted by the compiler or
+debugger refer to the line the invocation started on, which might be
+different to the line containing the argument causing the problem.
+
+   Here is an example illustrating this:
+
+     #define ignore_second_arg(a,b,c) a; c
+
+     ignore_second_arg (foo (),
+                        ignored (),
+                        syntax error);
+
+The syntax error triggered by the tokens `syntax error' results in an
+error message citing line three--the line of ignore_second_arg-- even
+though the problematic code comes from line five.
+
+   We consider this a bug, and intend to fix it in the near future.
+
+
+File: cpp.info,  Node: Conditionals,  Next: Diagnostics,  Prev: Macros,  Up: Top
+
+4 Conditionals
+**************
+
+A "conditional" is a directive that instructs the preprocessor to
+select whether or not to include a chunk of code in the final token
+stream passed to the compiler.  Preprocessor conditionals can test
+arithmetic expressions, or whether a name is defined as a macro, or both
+simultaneously using the special `defined' operator.
+
+   A conditional in the C preprocessor resembles in some ways an `if'
+statement in C, but it is important to understand the difference between
+them.  The condition in an `if' statement is tested during the
+execution of your program.  Its purpose is to allow your program to
+behave differently from run to run, depending on the data it is
+operating on.  The condition in a preprocessing conditional directive is
+tested when your program is compiled.  Its purpose is to allow different
+code to be included in the program depending on the situation at the
+time of compilation.
+
+   However, the distinction is becoming less clear.  Modern compilers
+often do test `if' statements when a program is compiled, if their
+conditions are known not to vary at run time, and eliminate code which
+can never be executed.  If you can count on your compiler to do this,
+you may find that your program is more readable if you use `if'
+statements with constant conditions (perhaps determined by macros).  Of
+course, you can only use this to exclude code, not type definitions or
+other preprocessing directives, and you can only do it if the code
+remains syntactically valid when it is not to be used.
+
+   GCC version 3 eliminates this kind of never-executed code even when
+not optimizing.  Older versions did it only when optimizing.
+
+* Menu:
+
+* Conditional Uses::
+* Conditional Syntax::
+* Deleted Code::
+
+
+File: cpp.info,  Node: Conditional Uses,  Next: Conditional Syntax,  Up: Conditionals
+
+4.1 Conditional Uses
+====================
+
+There are three general reasons to use a conditional.
+
+   * A program may need to use different code depending on the machine
+     or operating system it is to run on.  In some cases the code for
+     one operating system may be erroneous on another operating system;
+     for example, it might refer to data types or constants that do not
+     exist on the other system.  When this happens, it is not enough to
+     avoid executing the invalid code.  Its mere presence will cause
+     the compiler to reject the program.  With a preprocessing
+     conditional, the offending code can be effectively excised from
+     the program when it is not valid.
+
+   * You may want to be able to compile the same source file into two
+     different programs.  One version might make frequent time-consuming
+     consistency checks on its intermediate data, or print the values of
+     those data for debugging, and the other not.
+
+   * A conditional whose condition is always false is one way to
+     exclude code from the program but keep it as a sort of comment for
+     future reference.
+
+   Simple programs that do not need system-specific logic or complex
+debugging hooks generally will not need to use preprocessing
+conditionals.
+
+
+File: cpp.info,  Node: Conditional Syntax,  Next: Deleted Code,  Prev: Conditional Uses,  Up: Conditionals
+
+4.2 Conditional Syntax
+======================
+
+A conditional in the C preprocessor begins with a "conditional
+directive": `#if', `#ifdef' or `#ifndef'.
+
+* Menu:
+
+* Ifdef::
+* If::
+* Defined::
+* Else::
+* Elif::
+
+
+File: cpp.info,  Node: Ifdef,  Next: If,  Up: Conditional Syntax
+
+4.2.1 Ifdef
+-----------
+
+The simplest sort of conditional is
+
+     #ifdef MACRO
+
+     CONTROLLED TEXT
+
+     #endif /* MACRO */
+
+   This block is called a "conditional group".  CONTROLLED TEXT will be
+included in the output of the preprocessor if and only if MACRO is
+defined.  We say that the conditional "succeeds" if MACRO is defined,
+"fails" if it is not.
+
+   The CONTROLLED TEXT inside of a conditional can include
+preprocessing directives.  They are executed only if the conditional
+succeeds.  You can nest conditional groups inside other conditional
+groups, but they must be completely nested.  In other words, `#endif'
+always matches the nearest `#ifdef' (or `#ifndef', or `#if').  Also,
+you cannot start a conditional group in one file and end it in another.
+
+   Even if a conditional fails, the CONTROLLED TEXT inside it is still
+run through initial transformations and tokenization.  Therefore, it
+must all be lexically valid C.  Normally the only way this matters is
+that all comments and string literals inside a failing conditional group
+must still be properly ended.
+
+   The comment following the `#endif' is not required, but it is a good
+practice if there is a lot of CONTROLLED TEXT, because it helps people
+match the `#endif' to the corresponding `#ifdef'.  Older programs
+sometimes put MACRO directly after the `#endif' without enclosing it in
+a comment.  This is invalid code according to the C standard.  CPP
+accepts it with a warning.  It never affects which `#ifndef' the
+`#endif' matches.
+
+   Sometimes you wish to use some code if a macro is _not_ defined.
+You can do this by writing `#ifndef' instead of `#ifdef'.  One common
+use of `#ifndef' is to include code only the first time a header file
+is included.  *Note Once-Only Headers::.
+
+   Macro definitions can vary between compilations for several reasons.
+Here are some samples.
+
+   * Some macros are predefined on each kind of machine (*note
+     System-specific Predefined Macros::).  This allows you to provide
+     code specially tuned for a particular machine.
+
+   * System header files define more macros, associated with the
+     features they implement.  You can test these macros with
+     conditionals to avoid using a system feature on a machine where it
+     is not implemented.
+
+   * Macros can be defined or undefined with the `-D' and `-U' command
+     line options when you compile the program.  You can arrange to
+     compile the same source file into two different programs by
+     choosing a macro name to specify which program you want, writing
+     conditionals to test whether or how this macro is defined, and
+     then controlling the state of the macro with command line options,
+     perhaps set in the Makefile.  *Note Invocation::.
+
+   * Your program might have a special header file (often called
+     `config.h') that is adjusted when the program is compiled.  It can
+     define or not define macros depending on the features of the
+     system and the desired capabilities of the program.  The
+     adjustment can be automated by a tool such as `autoconf', or done
+     by hand.
+
+
+File: cpp.info,  Node: If,  Next: Defined,  Prev: Ifdef,  Up: Conditional Syntax
+
+4.2.2 If
+--------
+
+The `#if' directive allows you to test the value of an arithmetic
+expression, rather than the mere existence of one macro.  Its syntax is
+
+     #if EXPRESSION
+
+     CONTROLLED TEXT
+
+     #endif /* EXPRESSION */
+
+   EXPRESSION is a C expression of integer type, subject to stringent
+restrictions.  It may contain
+
+   * Integer constants.
+
+   * Character constants, which are interpreted as they would be in
+     normal code.
+
+   * Arithmetic operators for addition, subtraction, multiplication,
+     division, bitwise operations, shifts, comparisons, and logical
+     operations (`&&' and `||').  The latter two obey the usual
+     short-circuiting rules of standard C.
+
+   * Macros.  All macros in the expression are expanded before actual
+     computation of the expression's value begins.
+
+   * Uses of the `defined' operator, which lets you check whether macros
+     are defined in the middle of an `#if'.
+
+   * Identifiers that are not macros, which are all considered to be the
+     number zero.  This allows you to write `#if MACRO' instead of
+     `#ifdef MACRO', if you know that MACRO, when defined, will always
+     have a nonzero value.  Function-like macros used without their
+     function call parentheses are also treated as zero.
+
+     In some contexts this shortcut is undesirable.  The `-Wundef'
+     option causes GCC to warn whenever it encounters an identifier
+     which is not a macro in an `#if'.
+
+   The preprocessor does not know anything about types in the language.
+Therefore, `sizeof' operators are not recognized in `#if', and neither
+are `enum' constants.  They will be taken as identifiers which are not
+macros, and replaced by zero.  In the case of `sizeof', this is likely
+to cause the expression to be invalid.
+
+   The preprocessor calculates the value of EXPRESSION.  It carries out
+all calculations in the widest integer type known to the compiler; on
+most machines supported by GCC this is 64 bits.  This is not the same
+rule as the compiler uses to calculate the value of a constant
+expression, and may give different results in some cases.  If the value
+comes out to be nonzero, the `#if' succeeds and the CONTROLLED TEXT is
+included; otherwise it is skipped.
+
+
+File: cpp.info,  Node: Defined,  Next: Else,  Prev: If,  Up: Conditional Syntax
+
+4.2.3 Defined
+-------------
+
+The special operator `defined' is used in `#if' and `#elif' expressions
+to test whether a certain name is defined as a macro.  `defined NAME'
+and `defined (NAME)' are both expressions whose value is 1 if NAME is
+defined as a macro at the current point in the program, and 0
+otherwise.  Thus,  `#if defined MACRO' is precisely equivalent to
+`#ifdef MACRO'.
+
+   `defined' is useful when you wish to test more than one macro for
+existence at once.  For example,
+
+     #if defined (__vax__) || defined (__ns16000__)
+
+would succeed if either of the names `__vax__' or `__ns16000__' is
+defined as a macro.
+
+   Conditionals written like this:
+
+     #if defined BUFSIZE && BUFSIZE >= 1024
+
+can generally be simplified to just `#if BUFSIZE >= 1024', since if
+`BUFSIZE' is not defined, it will be interpreted as having the value
+zero.
+
+   If the `defined' operator appears as a result of a macro expansion,
+the C standard says the behavior is undefined.  GNU cpp treats it as a
+genuine `defined' operator and evaluates it normally.  It will warn
+wherever your code uses this feature if you use the command-line option
+`-pedantic', since other compilers may handle it differently.
+
+
+File: cpp.info,  Node: Else,  Next: Elif,  Prev: Defined,  Up: Conditional Syntax
+
+4.2.4 Else
+----------
+
+The `#else' directive can be added to a conditional to provide
+alternative text to be used if the condition fails.  This is what it
+looks like:
+
+     #if EXPRESSION
+     TEXT-IF-TRUE
+     #else /* Not EXPRESSION */
+     TEXT-IF-FALSE
+     #endif /* Not EXPRESSION */
+
+If EXPRESSION is nonzero, the TEXT-IF-TRUE is included and the
+TEXT-IF-FALSE is skipped.  If EXPRESSION is zero, the opposite happens.
+
+   You can use `#else' with `#ifdef' and `#ifndef', too.
+
+
+File: cpp.info,  Node: Elif,  Prev: Else,  Up: Conditional Syntax
+
+4.2.5 Elif
+----------
+
+One common case of nested conditionals is used to check for more than
+two possible alternatives.  For example, you might have
+
+     #if X == 1
+     ...
+     #else /* X != 1 */
+     #if X == 2
+     ...
+     #else /* X != 2 */
+     ...
+     #endif /* X != 2 */
+     #endif /* X != 1 */
+
+   Another conditional directive, `#elif', allows this to be
+abbreviated as follows:
+
+     #if X == 1
+     ...
+     #elif X == 2
+     ...
+     #else /* X != 2 and X != 1*/
+     ...
+     #endif /* X != 2 and X != 1*/
+
+   `#elif' stands for "else if".  Like `#else', it goes in the middle
+of a conditional group and subdivides it; it does not require a
+matching `#endif' of its own.  Like `#if', the `#elif' directive
+includes an expression to be tested.  The text following the `#elif' is
+processed only if the original `#if'-condition failed and the `#elif'
+condition succeeds.
+
+   More than one `#elif' can go in the same conditional group.  Then
+the text after each `#elif' is processed only if the `#elif' condition
+succeeds after the original `#if' and all previous `#elif' directives
+within it have failed.
+
+   `#else' is allowed after any number of `#elif' directives, but
+`#elif' may not follow `#else'.
+
+
+File: cpp.info,  Node: Deleted Code,  Prev: Conditional Syntax,  Up: Conditionals
+
+4.3 Deleted Code
+================
+
+If you replace or delete a part of the program but want to keep the old
+code around for future reference, you often cannot simply comment it
+out.  Block comments do not nest, so the first comment inside the old
+code will end the commenting-out.  The probable result is a flood of
+syntax errors.
+
+   One way to avoid this problem is to use an always-false conditional
+instead.  For instance, put `#if 0' before the deleted code and
+`#endif' after it.  This works even if the code being turned off
+contains conditionals, but they must be entire conditionals (balanced
+`#if' and `#endif').
+
+   Some people use `#ifdef notdef' instead.  This is risky, because
+`notdef' might be accidentally defined as a macro, and then the
+conditional would succeed.  `#if 0' can be counted on to fail.
+
+   Do not use `#if 0' for comments which are not C code.  Use a real
+comment, instead.  The interior of `#if 0' must consist of complete
+tokens; in particular, single-quote characters must balance.  Comments
+often contain unbalanced single-quote characters (known in English as
+apostrophes).  These confuse `#if 0'.  They don't confuse `/*'.
+
+
+File: cpp.info,  Node: Diagnostics,  Next: Line Control,  Prev: Conditionals,  Up: Top
+
+5 Diagnostics
+*************
+
+The directive `#error' causes the preprocessor to report a fatal error.
+The tokens forming the rest of the line following `#error' are used as
+the error message.
+
+   You would use `#error' inside of a conditional that detects a
+combination of parameters which you know the program does not properly
+support.  For example, if you know that the program will not run
+properly on a VAX, you might write
+
+     #ifdef __vax__
+     #error "Won't work on VAXen.  See comments at get_last_object."
+     #endif
+
+   If you have several configuration parameters that must be set up by
+the installation in a consistent way, you can use conditionals to detect
+an inconsistency and report it with `#error'.  For example,
+
+     #if !defined(UNALIGNED_INT_ASM_OP) && defined(DWARF2_DEBUGGING_INFO)
+     #error "DWARF2_DEBUGGING_INFO requires UNALIGNED_INT_ASM_OP."
+     #endif
+
+   The directive `#warning' is like `#error', but causes the
+preprocessor to issue a warning and continue preprocessing.  The tokens
+following `#warning' are used as the warning message.
+
+   You might use `#warning' in obsolete header files, with a message
+directing the user to the header file which should be used instead.
+
+   Neither `#error' nor `#warning' macro-expands its argument.
+Internal whitespace sequences are each replaced with a single space.
+The line must consist of complete tokens.  It is wisest to make the
+argument of these directives be a single string constant; this avoids
+problems with apostrophes and the like.
+
+
+File: cpp.info,  Node: Line Control,  Next: Pragmas,  Prev: Diagnostics,  Up: Top
+
+6 Line Control
+**************
+
+The C preprocessor informs the C compiler of the location in your source
+code where each token came from.  Presently, this is just the file name
+and line number.  All the tokens resulting from macro expansion are
+reported as having appeared on the line of the source file where the
+outermost macro was used.  We intend to be more accurate in the future.
+
+   If you write a program which generates source code, such as the
+`bison' parser generator, you may want to adjust the preprocessor's
+notion of the current file name and line number by hand.  Parts of the
+output from `bison' are generated from scratch, other parts come from a
+standard parser file.  The rest are copied verbatim from `bison''s
+input.  You would like compiler error messages and symbolic debuggers
+to be able to refer to `bison''s input file.
+
+   `bison' or any such program can arrange this by writing `#line'
+directives into the output file.  `#line' is a directive that specifies
+the original line number and source file name for subsequent input in
+the current preprocessor input file.  `#line' has three variants:
+
+`#line LINENUM'
+     LINENUM is a non-negative decimal integer constant.  It specifies
+     the line number which should be reported for the following line of
+     input.  Subsequent lines are counted from LINENUM.
+
+`#line LINENUM FILENAME'
+     LINENUM is the same as for the first form, and has the same
+     effect.  In addition, FILENAME is a string constant.  The
+     following line and all subsequent lines are reported to come from
+     the file it specifies, until something else happens to change that.
+     FILENAME is interpreted according to the normal rules for a string
+     constant: backslash escapes are interpreted.  This is different
+     from `#include'.
+
+     Previous versions of CPP did not interpret escapes in `#line'; we
+     have changed it because the standard requires they be interpreted,
+     and most other compilers do.
+
+`#line ANYTHING ELSE'
+     ANYTHING ELSE is checked for macro calls, which are expanded.  The
+     result should match one of the above two forms.
+
+   `#line' directives alter the results of the `__FILE__' and
+`__LINE__' predefined macros from that point on.  *Note Standard
+Predefined Macros::.  They do not have any effect on `#include''s idea
+of the directory containing the current file.  This is a change from
+GCC 2.95.  Previously, a file reading
+
+     #line 1 "../src/gram.y"
+     #include "gram.h"
+
+   would search for `gram.h' in `../src', then the `-I' chain; the
+directory containing the physical source file would not be searched.
+In GCC 3.0 and later, the `#include' is not affected by the presence of
+a `#line' referring to a different directory.
+
+   We made this change because the old behavior caused problems when
+generated source files were transported between machines.  For instance,
+it is common practice to ship generated parsers with a source release,
+so that people building the distribution do not need to have yacc or
+Bison installed.  These files frequently have `#line' directives
+referring to the directory tree of the system where the distribution was
+created.  If GCC tries to search for headers in those directories, the
+build is likely to fail.
+
+   The new behavior can cause failures too, if the generated file is not
+in the same directory as its source and it attempts to include a header
+which would be visible searching from the directory containing the
+source file.  However, this problem is easily solved with an additional
+`-I' switch on the command line.  The failures caused by the old
+semantics could sometimes be corrected only by editing the generated
+files, which is difficult and error-prone.
+
+
+File: cpp.info,  Node: Pragmas,  Next: Other Directives,  Prev: Line Control,  Up: Top
+
+7 Pragmas
+*********
+
+The `#pragma' directive is the method specified by the C standard for
+providing additional information to the compiler, beyond what is
+conveyed in the language itself.  Three forms of this directive
+(commonly known as "pragmas") are specified by the 1999 C standard.  A
+C compiler is free to attach any meaning it likes to other pragmas.
+
+   GCC has historically preferred to use extensions to the syntax of the
+language, such as `__attribute__', for this purpose.  However, GCC does
+define a few pragmas of its own.  These mostly have effects on the
+entire translation unit or source file.
+
+   In GCC version 3, all GNU-defined, supported pragmas have been given
+a `GCC' prefix.  This is in line with the `STDC' prefix on all pragmas
+defined by C99.  For backward compatibility, pragmas which were
+recognized by previous versions are still recognized without the `GCC'
+prefix, but that usage is deprecated.  Some older pragmas are
+deprecated in their entirety.  They are not recognized with the `GCC'
+prefix.  *Note Obsolete Features::.
+
+   C99 introduces the `_Pragma' operator.  This feature addresses a
+major problem with `#pragma': being a directive, it cannot be produced
+as the result of macro expansion.  `_Pragma' is an operator, much like
+`sizeof' or `defined', and can be embedded in a macro.
+
+   Its syntax is `_Pragma (STRING-LITERAL)', where STRING-LITERAL can
+be either a normal or wide-character string literal.  It is
+destringized, by replacing all `\\' with a single `\' and all `\"' with
+a `"'.  The result is then processed as if it had appeared as the right
+hand side of a `#pragma' directive.  For example,
+
+     _Pragma ("GCC dependency \"parse.y\"")
+
+has the same effect as `#pragma GCC dependency "parse.y"'.  The same
+effect could be achieved using macros, for example
+
+     #define DO_PRAGMA(x) _Pragma (#x)
+     DO_PRAGMA (GCC dependency "parse.y")
+
+   The standard is unclear on where a `_Pragma' operator can appear.
+The preprocessor does not accept it within a preprocessing conditional
+directive like `#if'.  To be safe, you are probably best keeping it out
+of directives other than `#define', and putting it on a line of its own.
+
+   This manual documents the pragmas which are meaningful to the
+preprocessor itself.  Other pragmas are meaningful to the C or C++
+compilers.  They are documented in the GCC manual.
+
+   GCC plugins may provide their own pragmas.
+
+`#pragma GCC dependency'
+     `#pragma GCC dependency' allows you to check the relative dates of
+     the current file and another file.  If the other file is more
+     recent than the current file, a warning is issued.  This is useful
+     if the current file is derived from the other file, and should be
+     regenerated.  The other file is searched for using the normal
+     include search path.  Optional trailing text can be used to give
+     more information in the warning message.
+
+          #pragma GCC dependency "parse.y"
+          #pragma GCC dependency "/usr/include/time.h" rerun fixincludes
+
+`#pragma GCC poison'
+     Sometimes, there is an identifier that you want to remove
+     completely from your program, and make sure that it never creeps
+     back in.  To enforce this, you can "poison" the identifier with
+     this pragma.  `#pragma GCC poison' is followed by a list of
+     identifiers to poison.  If any of those identifiers appears
+     anywhere in the source after the directive, it is a hard error.
+     For example,
+
+          #pragma GCC poison printf sprintf fprintf
+          sprintf(some_string, "hello");
+
+     will produce an error.
+
+     If a poisoned identifier appears as part of the expansion of a
+     macro which was defined before the identifier was poisoned, it
+     will _not_ cause an error.  This lets you poison an identifier
+     without worrying about system headers defining macros that use it.
+
+     For example,
+
+          #define strrchr rindex
+          #pragma GCC poison rindex
+          strrchr(some_string, 'h');
+
+     will not produce an error.
+
+`#pragma GCC system_header'
+     This pragma takes no arguments.  It causes the rest of the code in
+     the current file to be treated as if it came from a system header.
+     *Note System Headers::.
+
+
+
+File: cpp.info,  Node: Other Directives,  Next: Preprocessor Output,  Prev: Pragmas,  Up: Top
+
+8 Other Directives
+******************
+
+The `#ident' directive takes one argument, a string constant.  On some
+systems, that string constant is copied into a special segment of the
+object file.  On other systems, the directive is ignored.  The `#sccs'
+directive is a synonym for `#ident'.
+
+   These directives are not part of the C standard, but they are not
+official GNU extensions either.  What historical information we have
+been able to find, suggests they originated with System V.
+
+   The "null directive" consists of a `#' followed by a newline, with
+only whitespace (including comments) in between.  A null directive is
+understood as a preprocessing directive but has no effect on the
+preprocessor output.  The primary significance of the existence of the
+null directive is that an input line consisting of just a `#' will
+produce no output, rather than a line of output containing just a `#'.
+Supposedly some old C programs contain such lines.
+
+
+File: cpp.info,  Node: Preprocessor Output,  Next: Traditional Mode,  Prev: Other Directives,  Up: Top
+
+9 Preprocessor Output
+*********************
+
+When the C preprocessor is used with the C, C++, or Objective-C
+compilers, it is integrated into the compiler and communicates a stream
+of binary tokens directly to the compiler's parser.  However, it can
+also be used in the more conventional standalone mode, where it produces
+textual output.
+
+   The output from the C preprocessor looks much like the input, except
+that all preprocessing directive lines have been replaced with blank
+lines and all comments with spaces.  Long runs of blank lines are
+discarded.
+
+   The ISO standard specifies that it is implementation defined whether
+a preprocessor preserves whitespace between tokens, or replaces it with
+e.g. a single space.  In GNU CPP, whitespace between tokens is collapsed
+to become a single space, with the exception that the first token on a
+non-directive line is preceded with sufficient spaces that it appears in
+the same column in the preprocessed output that it appeared in the
+original source file.  This is so the output is easy to read.  *Note
+Differences from previous versions::.  CPP does not insert any
+whitespace where there was none in the original source, except where
+necessary to prevent an accidental token paste.
+
+   Source file name and line number information is conveyed by lines of
+the form
+
+     # LINENUM FILENAME FLAGS
+
+These are called "linemarkers".  They are inserted as needed into the
+output (but never within a string or character constant).  They mean
+that the following line originated in file FILENAME at line LINENUM.
+FILENAME will never contain any non-printing characters; they are
+replaced with octal escape sequences.
+
+   After the file name comes zero or more flags, which are `1', `2',
+`3', or `4'.  If there are multiple flags, spaces separate them.  Here
+is what the flags mean:
+
+`1'
+     This indicates the start of a new file.
+
+`2'
+     This indicates returning to a file (after having included another
+     file).
+
+`3'
+     This indicates that the following text comes from a system header
+     file, so certain warnings should be suppressed.
+
+`4'
+     This indicates that the following text should be treated as being
+     wrapped in an implicit `extern "C"' block.
+
+   As an extension, the preprocessor accepts linemarkers in
+non-assembler input files.  They are treated like the corresponding
+`#line' directive, (*note Line Control::), except that trailing flags
+are permitted, and are interpreted with the meanings described above.
+If multiple flags are given, they must be in ascending order.
+
+   Some directives may be duplicated in the output of the preprocessor.
+These are `#ident' (always), `#pragma' (only if the preprocessor does
+not handle the pragma itself), and `#define' and `#undef' (with certain
+debugging options).  If this happens, the `#' of the directive will
+always be in the first column, and there will be no space between the
+`#' and the directive name.  If macro expansion happens to generate
+tokens which might be mistaken for a duplicated directive, a space will
+be inserted between the `#' and the directive name.
+
+
+File: cpp.info,  Node: Traditional Mode,  Next: Implementation Details,  Prev: Preprocessor Output,  Up: Top
+
+10 Traditional Mode
+*******************
+
+Traditional (pre-standard) C preprocessing is rather different from the
+preprocessing specified by the standard.  When GCC is given the
+`-traditional-cpp' option, it attempts to emulate a traditional
+preprocessor.
+
+   GCC versions 3.2 and later only support traditional mode semantics in
+the preprocessor, and not in the compiler front ends.  This chapter
+outlines the traditional preprocessor semantics we implemented.
+
+   The implementation does not correspond precisely to the behavior of
+earlier versions of GCC, nor to any true traditional preprocessor.
+After all, inconsistencies among traditional implementations were a
+major motivation for C standardization.  However, we intend that it
+should be compatible with true traditional preprocessors in all ways
+that actually matter.
+
+* Menu:
+
+* Traditional lexical analysis::
+* Traditional macros::
+* Traditional miscellany::
+* Traditional warnings::
+
+
+File: cpp.info,  Node: Traditional lexical analysis,  Next: Traditional macros,  Up: Traditional Mode
+
+10.1 Traditional lexical analysis
+=================================
+
+The traditional preprocessor does not decompose its input into tokens
+the same way a standards-conforming preprocessor does.  The input is
+simply treated as a stream of text with minimal internal form.
+
+   This implementation does not treat trigraphs (*note trigraphs::)
+specially since they were an invention of the standards committee.  It
+handles arbitrarily-positioned escaped newlines properly and splices
+the lines as you would expect; many traditional preprocessors did not
+do this.
+
+   The form of horizontal whitespace in the input file is preserved in
+the output.  In particular, hard tabs remain hard tabs.  This can be
+useful if, for example, you are preprocessing a Makefile.
+
+   Traditional CPP only recognizes C-style block comments, and treats
+the `/*' sequence as introducing a comment only if it lies outside
+quoted text.  Quoted text is introduced by the usual single and double
+quotes, and also by an initial `<' in a `#include' directive.
+
+   Traditionally, comments are completely removed and are not replaced
+with a space.  Since a traditional compiler does its own tokenization
+of the output of the preprocessor, this means that comments can
+effectively be used as token paste operators.  However, comments behave
+like separators for text handled by the preprocessor itself, since it
+doesn't re-lex its input.  For example, in
+
+     #if foo/**/bar
+
+`foo' and `bar' are distinct identifiers and expanded separately if
+they happen to be macros.  In other words, this directive is equivalent
+to
+
+     #if foo bar
+
+rather than
+
+     #if foobar
+
+   Generally speaking, in traditional mode an opening quote need not
+have a matching closing quote.  In particular, a macro may be defined
+with replacement text that contains an unmatched quote.  Of course, if
+you attempt to compile preprocessed output containing an unmatched quote
+you will get a syntax error.
+
+   However, all preprocessing directives other than `#define' require
+matching quotes.  For example:
+
+     #define m This macro's fine and has an unmatched quote
+     "/* This is not a comment.  */
+     /* This is a comment.  The following #include directive
+        is ill-formed.  */
+     #include <stdio.h
+
+   Just as for the ISO preprocessor, what would be a closing quote can
+be escaped with a backslash to prevent the quoted text from closing.
+
+
+File: cpp.info,  Node: Traditional macros,  Next: Traditional miscellany,  Prev: Traditional lexical analysis,  Up: Traditional Mode
+
+10.2 Traditional macros
+=======================
+
+The major difference between traditional and ISO macros is that the
+former expand to text rather than to a token sequence.  CPP removes all
+leading and trailing horizontal whitespace from a macro's replacement
+text before storing it, but preserves the form of internal whitespace.
+
+   One consequence is that it is legitimate for the replacement text to
+contain an unmatched quote (*note Traditional lexical analysis::).  An
+unclosed string or character constant continues into the text following
+the macro call.  Similarly, the text at the end of a macro's expansion
+can run together with the text after the macro invocation to produce a
+single token.
+
+   Normally comments are removed from the replacement text after the
+macro is expanded, but if the `-CC' option is passed on the command
+line comments are preserved.  (In fact, the current implementation
+removes comments even before saving the macro replacement text, but it
+careful to do it in such a way that the observed effect is identical
+even in the function-like macro case.)
+
+   The ISO stringification operator `#' and token paste operator `##'
+have no special meaning.  As explained later, an effect similar to
+these operators can be obtained in a different way.  Macro names that
+are embedded in quotes, either from the main file or after macro
+replacement, do not expand.
+
+   CPP replaces an unquoted object-like macro name with its replacement
+text, and then rescans it for further macros to replace.  Unlike
+standard macro expansion, traditional macro expansion has no provision
+to prevent recursion.  If an object-like macro appears unquoted in its
+replacement text, it will be replaced again during the rescan pass, and
+so on _ad infinitum_.  GCC detects when it is expanding recursive
+macros, emits an error message, and continues after the offending macro
+invocation.
+
+     #define PLUS +
+     #define INC(x) PLUS+x
+     INC(foo);
+          ==> ++foo;
+
+   Function-like macros are similar in form but quite different in
+behavior to their ISO counterparts.  Their arguments are contained
+within parentheses, are comma-separated, and can cross physical lines.
+Commas within nested parentheses are not treated as argument
+separators.  Similarly, a quote in an argument cannot be left unclosed;
+a following comma or parenthesis that comes before the closing quote is
+treated like any other character.  There is no facility for handling
+variadic macros.
+
+   This implementation removes all comments from macro arguments, unless
+the `-C' option is given.  The form of all other horizontal whitespace
+in arguments is preserved, including leading and trailing whitespace.
+In particular
+
+     f( )
+
+is treated as an invocation of the macro `f' with a single argument
+consisting of a single space.  If you want to invoke a function-like
+macro that takes no arguments, you must not leave any whitespace
+between the parentheses.
+
+   If a macro argument crosses a new line, the new line is replaced with
+a space when forming the argument.  If the previous line contained an
+unterminated quote, the following line inherits the quoted state.
+
+   Traditional preprocessors replace parameters in the replacement text
+with their arguments regardless of whether the parameters are within
+quotes or not.  This provides a way to stringize arguments.  For example
+
+     #define str(x) "x"
+     str(/* A comment */some text )
+          ==> "some text "
+
+Note that the comment is removed, but that the trailing space is
+preserved.  Here is an example of using a comment to effect token
+pasting.
+
+     #define suffix(x) foo_/**/x
+     suffix(bar)
+          ==> foo_bar
+
+
+File: cpp.info,  Node: Traditional miscellany,  Next: Traditional warnings,  Prev: Traditional macros,  Up: Traditional Mode
+
+10.3 Traditional miscellany
+===========================
+
+Here are some things to be aware of when using the traditional
+preprocessor.
+
+   * Preprocessing directives are recognized only when their leading
+     `#' appears in the first column.  There can be no whitespace
+     between the beginning of the line and the `#', but whitespace can
+     follow the `#'.
+
+   * A true traditional C preprocessor does not recognize `#error' or
+     `#pragma', and may not recognize `#elif'.  CPP supports all the
+     directives in traditional mode that it supports in ISO mode,
+     including extensions, with the exception that the effects of
+     `#pragma GCC poison' are undefined.
+
+   * __STDC__ is not defined.
+
+   * If you use digraphs the behavior is undefined.
+
+   * If a line that looks like a directive appears within macro
+     arguments, the behavior is undefined.
+
+
+
+File: cpp.info,  Node: Traditional warnings,  Prev: Traditional miscellany,  Up: Traditional Mode
+
+10.4 Traditional warnings
+=========================
+
+You can request warnings about features that did not exist, or worked
+differently, in traditional C with the `-Wtraditional' option.  GCC
+does not warn about features of ISO C which you must use when you are
+using a conforming compiler, such as the `#' and `##' operators.
+
+   Presently `-Wtraditional' warns about:
+
+   * Macro parameters that appear within string literals in the macro
+     body.  In traditional C macro replacement takes place within
+     string literals, but does not in ISO C.
+
+   * In traditional C, some preprocessor directives did not exist.
+     Traditional preprocessors would only consider a line to be a
+     directive if the `#' appeared in column 1 on the line.  Therefore
+     `-Wtraditional' warns about directives that traditional C
+     understands but would ignore because the `#' does not appear as the
+     first character on the line.  It also suggests you hide directives
+     like `#pragma' not understood by traditional C by indenting them.
+     Some traditional implementations would not recognize `#elif', so it
+     suggests avoiding it altogether.
+
+   * A function-like macro that appears without an argument list.  In
+     some traditional preprocessors this was an error.  In ISO C it
+     merely means that the macro is not expanded.
+
+   * The unary plus operator.  This did not exist in traditional C.
+
+   * The `U' and `LL' integer constant suffixes, which were not
+     available in traditional C.  (Traditional C does support the `L'
+     suffix for simple long integer constants.)  You are not warned
+     about uses of these suffixes in macros defined in system headers.
+     For instance, `UINT_MAX' may well be defined as `4294967295U', but
+     you will not be warned if you use `UINT_MAX'.
+
+     You can usually avoid the warning, and the related warning about
+     constants which are so large that they are unsigned, by writing the
+     integer constant in question in hexadecimal, with no U suffix.
+     Take care, though, because this gives the wrong result in exotic
+     cases.
+
+
+File: cpp.info,  Node: Implementation Details,  Next: Invocation,  Prev: Traditional Mode,  Up: Top
+
+11 Implementation Details
+*************************
+
+Here we document details of how the preprocessor's implementation
+affects its user-visible behavior.  You should try to avoid undue
+reliance on behavior described here, as it is possible that it will
+change subtly in future implementations.
+
+   Also documented here are obsolete features and changes from previous
+versions of CPP.
+
+* Menu:
+
+* Implementation-defined behavior::
+* Implementation limits::
+* Obsolete Features::
+* Differences from previous versions::
+
+
+File: cpp.info,  Node: Implementation-defined behavior,  Next: Implementation limits,  Up: Implementation Details
+
+11.1 Implementation-defined behavior
+====================================
+
+This is how CPP behaves in all the cases which the C standard describes
+as "implementation-defined".  This term means that the implementation
+is free to do what it likes, but must document its choice and stick to
+it.
+
+   * The mapping of physical source file multi-byte characters to the
+     execution character set.
+
+     The input character set can be specified using the
+     `-finput-charset' option, while the execution character set may be
+     controlled using the `-fexec-charset' and `-fwide-exec-charset'
+     options.
+
+   * Identifier characters.  The C and C++ standards allow identifiers
+     to be composed of `_' and the alphanumeric characters.  C++ and
+     C99 also allow universal character names, and C99 further permits
+     implementation-defined characters.  GCC currently only permits
+     universal character names if `-fextended-identifiers' is used,
+     because the implementation of universal character names in
+     identifiers is experimental.
+
+     GCC allows the `$' character in identifiers as an extension for
+     most targets.  This is true regardless of the `std=' switch, since
+     this extension cannot conflict with standards-conforming programs.
+     When preprocessing assembler, however, dollars are not identifier
+     characters by default.
+
+     Currently the targets that by default do not permit `$' are AVR,
+     IP2K, MMIX, MIPS Irix 3, ARM aout, and PowerPC targets for the AIX
+     operating system.
+
+     You can override the default with `-fdollars-in-identifiers' or
+     `fno-dollars-in-identifiers'.  *Note fdollars-in-identifiers::.
+
+   * Non-empty sequences of whitespace characters.
+
+     In textual output, each whitespace sequence is collapsed to a
+     single space.  For aesthetic reasons, the first token on each
+     non-directive line of output is preceded with sufficient spaces
+     that it appears in the same column as it did in the original
+     source file.
+
+   * The numeric value of character constants in preprocessor
+     expressions.
+
+     The preprocessor and compiler interpret character constants in the
+     same way; i.e. escape sequences such as `\a' are given the values
+     they would have on the target machine.
+
+     The compiler evaluates a multi-character character constant a
+     character at a time, shifting the previous value left by the
+     number of bits per target character, and then or-ing in the
+     bit-pattern of the new character truncated to the width of a
+     target character.  The final bit-pattern is given type `int', and
+     is therefore signed, regardless of whether single characters are
+     signed or not (a slight change from versions 3.1 and earlier of
+     GCC).  If there are more characters in the constant than would fit
+     in the target `int' the compiler issues a warning, and the excess
+     leading characters are ignored.
+
+     For example, `'ab'' for a target with an 8-bit `char' would be
+     interpreted as
+     `(int) ((unsigned char) 'a' * 256 + (unsigned char) 'b')', and
+     `'\234a'' as
+     `(int) ((unsigned char) '\234' * 256 + (unsigned char) 'a')'.
+
+   * Source file inclusion.
+
+     For a discussion on how the preprocessor locates header files,
+     *note Include Operation::.
+
+   * Interpretation of the filename resulting from a macro-expanded
+     `#include' directive.
+
+     *Note Computed Includes::.
+
+   * Treatment of a `#pragma' directive that after macro-expansion
+     results in a standard pragma.
+
+     No macro expansion occurs on any `#pragma' directive line, so the
+     question does not arise.
+
+     Note that GCC does not yet implement any of the standard pragmas.
+
+
+
+File: cpp.info,  Node: Implementation limits,  Next: Obsolete Features,  Prev: Implementation-defined behavior,  Up: Implementation Details
+
+11.2 Implementation limits
+==========================
+
+CPP has a small number of internal limits.  This section lists the
+limits which the C standard requires to be no lower than some minimum,
+and all the others known.  It is intended that there should be as few
+limits as possible.  If you encounter an undocumented or inconvenient
+limit, please report that as a bug.  *Note Reporting Bugs: (gcc)Bugs.
+
+   Where we say something is limited "only by available memory", that
+means that internal data structures impose no intrinsic limit, and space
+is allocated with `malloc' or equivalent.  The actual limit will
+therefore depend on many things, such as the size of other things
+allocated by the compiler at the same time, the amount of memory
+consumed by other processes on the same computer, etc.
+
+   * Nesting levels of `#include' files.
+
+     We impose an arbitrary limit of 200 levels, to avoid runaway
+     recursion.  The standard requires at least 15 levels.
+
+   * Nesting levels of conditional inclusion.
+
+     The C standard mandates this be at least 63.  CPP is limited only
+     by available memory.
+
+   * Levels of parenthesized expressions within a full expression.
+
+     The C standard requires this to be at least 63.  In preprocessor
+     conditional expressions, it is limited only by available memory.
+
+   * Significant initial characters in an identifier or macro name.
+
+     The preprocessor treats all characters as significant.  The C
+     standard requires only that the first 63 be significant.
+
+   * Number of macros simultaneously defined in a single translation
+     unit.
+
+     The standard requires at least 4095 be possible.  CPP is limited
+     only by available memory.
+
+   * Number of parameters in a macro definition and arguments in a
+     macro call.
+
+     We allow `USHRT_MAX', which is no smaller than 65,535.  The minimum
+     required by the standard is 127.
+
+   * Number of characters on a logical source line.
+
+     The C standard requires a minimum of 4096 be permitted.  CPP places
+     no limits on this, but you may get incorrect column numbers
+     reported in diagnostics for lines longer than 65,535 characters.
+
+   * Maximum size of a source file.
+
+     The standard does not specify any lower limit on the maximum size
+     of a source file.  GNU cpp maps files into memory, so it is
+     limited by the available address space.  This is generally at
+     least two gigabytes.  Depending on the operating system, the size
+     of physical memory may or may not be a limitation.
+
+
+
+File: cpp.info,  Node: Obsolete Features,  Next: Differences from previous versions,  Prev: Implementation limits,  Up: Implementation Details
+
+11.3 Obsolete Features
+======================
+
+CPP has some features which are present mainly for compatibility with
+older programs.  We discourage their use in new code.  In some cases,
+we plan to remove the feature in a future version of GCC.
+
+11.3.1 Assertions
+-----------------
+
+"Assertions" are a deprecated alternative to macros in writing
+conditionals to test what sort of computer or system the compiled
+program will run on.  Assertions are usually predefined, but you can
+define them with preprocessing directives or command-line options.
+
+   Assertions were intended to provide a more systematic way to describe
+the compiler's target system and we added them for compatibility with
+existing compilers.  In practice they are just as unpredictable as the
+system-specific predefined macros.  In addition, they are not part of
+any standard, and only a few compilers support them.  Therefore, the
+use of assertions is *less* portable than the use of system-specific
+predefined macros.  We recommend you do not use them at all.
+
+   An assertion looks like this:
+
+     #PREDICATE (ANSWER)
+
+PREDICATE must be a single identifier.  ANSWER can be any sequence of
+tokens; all characters are significant except for leading and trailing
+whitespace, and differences in internal whitespace sequences are
+ignored.  (This is similar to the rules governing macro redefinition.)
+Thus, `(x + y)' is different from `(x+y)' but equivalent to
+`( x + y )'.  Parentheses do not nest inside an answer.
+
+   To test an assertion, you write it in an `#if'.  For example, this
+conditional succeeds if either `vax' or `ns16000' has been asserted as
+an answer for `machine'.
+
+     #if #machine (vax) || #machine (ns16000)
+
+You can test whether _any_ answer is asserted for a predicate by
+omitting the answer in the conditional:
+
+     #if #machine
+
+   Assertions are made with the `#assert' directive.  Its sole argument
+is the assertion to make, without the leading `#' that identifies
+assertions in conditionals.
+
+     #assert PREDICATE (ANSWER)
+
+You may make several assertions with the same predicate and different
+answers.  Subsequent assertions do not override previous ones for the
+same predicate.  All the answers for any given predicate are
+simultaneously true.
+
+   Assertions can be canceled with the `#unassert' directive.  It has
+the same syntax as `#assert'.  In that form it cancels only the answer
+which was specified on the `#unassert' line; other answers for that
+predicate remain true.  You can cancel an entire predicate by leaving
+out the answer:
+
+     #unassert PREDICATE
+
+In either form, if no such assertion has been made, `#unassert' has no
+effect.
+
+   You can also make or cancel assertions using command line options.
+*Note Invocation::.
+
+
+File: cpp.info,  Node: Differences from previous versions,  Prev: Obsolete Features,  Up: Implementation Details
+
+11.4 Differences from previous versions
+=======================================
+
+This section details behavior which has changed from previous versions
+of CPP.  We do not plan to change it again in the near future, but we
+do not promise not to, either.
+
+   The "previous versions" discussed here are 2.95 and before.  The
+behavior of GCC 3.0 is mostly the same as the behavior of the widely
+used 2.96 and 2.97 development snapshots.  Where there are differences,
+they generally represent bugs in the snapshots.
+
+   * -I- deprecated
+
+     This option has been deprecated in 4.0.  `-iquote' is meant to
+     replace the need for this option.
+
+   * Order of evaluation of `#' and `##' operators
+
+     The standard does not specify the order of evaluation of a chain of
+     `##' operators, nor whether `#' is evaluated before, after, or at
+     the same time as `##'.  You should therefore not write any code
+     which depends on any specific ordering.  It is possible to
+     guarantee an ordering, if you need one, by suitable use of nested
+     macros.
+
+     An example of where this might matter is pasting the arguments `1',
+     `e' and `-2'.  This would be fine for left-to-right pasting, but
+     right-to-left pasting would produce an invalid token `e-2'.
+
+     GCC 3.0 evaluates `#' and `##' at the same time and strictly left
+     to right.  Older versions evaluated all `#' operators first, then
+     all `##' operators, in an unreliable order.
+
+   * The form of whitespace between tokens in preprocessor output
+
+     *Note Preprocessor Output::, for the current textual format.  This
+     is also the format used by stringification.  Normally, the
+     preprocessor communicates tokens directly to the compiler's
+     parser, and whitespace does not come up at all.
+
+     Older versions of GCC preserved all whitespace provided by the
+     user and inserted lots more whitespace of their own, because they
+     could not accurately predict when extra spaces were needed to
+     prevent accidental token pasting.
+
+   * Optional argument when invoking rest argument macros
+
+     As an extension, GCC permits you to omit the variable arguments
+     entirely when you use a variable argument macro.  This is
+     forbidden by the 1999 C standard, and will provoke a pedantic
+     warning with GCC 3.0.  Previous versions accepted it silently.
+
+   * `##' swallowing preceding text in rest argument macros
+
+     Formerly, in a macro expansion, if `##' appeared before a variable
+     arguments parameter, and the set of tokens specified for that
+     argument in the macro invocation was empty, previous versions of
+     CPP would back up and remove the preceding sequence of
+     non-whitespace characters (*not* the preceding token).  This
+     extension is in direct conflict with the 1999 C standard and has
+     been drastically pared back.
+
+     In the current version of the preprocessor, if `##' appears between
+     a comma and a variable arguments parameter, and the variable
+     argument is omitted entirely, the comma will be removed from the
+     expansion.  If the variable argument is empty, or the token before
+     `##' is not a comma, then `##' behaves as a normal token paste.
+
+   * `#line' and `#include'
+
+     The `#line' directive used to change GCC's notion of the
+     "directory containing the current file", used by `#include' with a
+     double-quoted header file name.  In 3.0 and later, it does not.
+     *Note Line Control::, for further explanation.
+
+   * Syntax of `#line'
+
+     In GCC 2.95 and previous, the string constant argument to `#line'
+     was treated the same way as the argument to `#include': backslash
+     escapes were not honored, and the string ended at the second `"'.
+     This is not compliant with the C standard.  In GCC 3.0, an attempt
+     was made to correct the behavior, so that the string was treated
+     as a real string constant, but it turned out to be buggy.  In 3.1,
+     the bugs have been fixed.  (We are not fixing the bugs in 3.0
+     because they affect relatively few people and the fix is quite
+     invasive.)
+
+
+
+File: cpp.info,  Node: Invocation,  Next: Environment Variables,  Prev: Implementation Details,  Up: Top
+
+12 Invocation
+*************
+
+Most often when you use the C preprocessor you will not have to invoke
+it explicitly: the C compiler will do so automatically.  However, the
+preprocessor is sometimes useful on its own.  All the options listed
+here are also acceptable to the C compiler and have the same meaning,
+except that the C compiler has different rules for specifying the output
+file.
+
+   _Note:_ Whether you use the preprocessor by way of `gcc' or `cpp',
+the "compiler driver" is run first.  This program's purpose is to
+translate your command into invocations of the programs that do the
+actual work.  Their command line interfaces are similar but not
+identical to the documented interface, and may change without notice.
+
+   The C preprocessor expects two file names as arguments, INFILE and
+OUTFILE.  The preprocessor reads INFILE together with any other files
+it specifies with `#include'.  All the output generated by the combined
+input files is written in OUTFILE.
+
+   Either INFILE or OUTFILE may be `-', which as INFILE means to read
+from standard input and as OUTFILE means to write to standard output.
+Also, if either file is omitted, it means the same as if `-' had been
+specified for that file.
+
+   Unless otherwise noted, or the option ends in `=', all options which
+take an argument may have that argument appear either immediately after
+the option, or with a space between option and argument: `-Ifoo' and
+`-I foo' have the same effect.
+
+   Many options have multi-letter names; therefore multiple
+single-letter options may _not_ be grouped: `-dM' is very different from
+`-d -M'.
+
+`-D NAME'
+     Predefine NAME as a macro, with definition `1'.
+
+`-D NAME=DEFINITION'
+     The contents of DEFINITION are tokenized and processed as if they
+     appeared during translation phase three in a `#define' directive.
+     In particular, the definition will be truncated by embedded
+     newline characters.
+
+     If you are invoking the preprocessor from a shell or shell-like
+     program you may need to use the shell's quoting syntax to protect
+     characters such as spaces that have a meaning in the shell syntax.
+
+     If you wish to define a function-like macro on the command line,
+     write its argument list with surrounding parentheses before the
+     equals sign (if any).  Parentheses are meaningful to most shells,
+     so you will need to quote the option.  With `sh' and `csh',
+     `-D'NAME(ARGS...)=DEFINITION'' works.
+
+     `-D' and `-U' options are processed in the order they are given on
+     the command line.  All `-imacros FILE' and `-include FILE' options
+     are processed after all `-D' and `-U' options.
+
+`-U NAME'
+     Cancel any previous definition of NAME, either built in or
+     provided with a `-D' option.
+
+`-undef'
+     Do not predefine any system-specific or GCC-specific macros.  The
+     standard predefined macros remain defined.  *Note Standard
+     Predefined Macros::.
+
+`-I DIR'
+     Add the directory DIR to the list of directories to be searched
+     for header files.  *Note Search Path::.  Directories named by `-I'
+     are searched before the standard system include directories.  If
+     the directory DIR is a standard system include directory, the
+     option is ignored to ensure that the default search order for
+     system directories and the special treatment of system headers are
+     not defeated (*note System Headers::) .  If DIR begins with `=',
+     then the `=' will be replaced by the sysroot prefix; see
+     `--sysroot' and `-isysroot'.
+
+`-o FILE'
+     Write output to FILE.  This is the same as specifying FILE as the
+     second non-option argument to `cpp'.  `gcc' has a different
+     interpretation of a second non-option argument, so you must use
+     `-o' to specify the output file.
+
+`-Wall'
+     Turns on all optional warnings which are desirable for normal code.
+     At present this is `-Wcomment', `-Wtrigraphs', `-Wmultichar' and a
+     warning about integer promotion causing a change of sign in `#if'
+     expressions.  Note that many of the preprocessor's warnings are on
+     by default and have no options to control them.
+
+`-Wcomment'
+`-Wcomments'
+     Warn whenever a comment-start sequence `/*' appears in a `/*'
+     comment, or whenever a backslash-newline appears in a `//' comment.
+     (Both forms have the same effect.)
+
+`-Wtrigraphs'
+     Most trigraphs in comments cannot affect the meaning of the
+     program.  However, a trigraph that would form an escaped newline
+     (`??/' at the end of a line) can, by changing where the comment
+     begins or ends.  Therefore, only trigraphs that would form escaped
+     newlines produce warnings inside a comment.
+
+     This option is implied by `-Wall'.  If `-Wall' is not given, this
+     option is still enabled unless trigraphs are enabled.  To get
+     trigraph conversion without warnings, but get the other `-Wall'
+     warnings, use `-trigraphs -Wall -Wno-trigraphs'.
+
+`-Wtraditional'
+     Warn about certain constructs that behave differently in
+     traditional and ISO C.  Also warn about ISO C constructs that have
+     no traditional C equivalent, and problematic constructs which
+     should be avoided.  *Note Traditional Mode::.
+
+`-Wundef'
+     Warn whenever an identifier which is not a macro is encountered in
+     an `#if' directive, outside of `defined'.  Such identifiers are
+     replaced with zero.
+
+`-Wunused-macros'
+     Warn about macros defined in the main file that are unused.  A
+     macro is "used" if it is expanded or tested for existence at least
+     once.  The preprocessor will also warn if the macro has not been
+     used at the time it is redefined or undefined.
+
+     Built-in macros, macros defined on the command line, and macros
+     defined in include files are not warned about.
+
+     _Note:_ If a macro is actually used, but only used in skipped
+     conditional blocks, then CPP will report it as unused.  To avoid
+     the warning in such a case, you might improve the scope of the
+     macro's definition by, for example, moving it into the first
+     skipped block.  Alternatively, you could provide a dummy use with
+     something like:
+
+          #if defined the_macro_causing_the_warning
+          #endif
+
+`-Wendif-labels'
+     Warn whenever an `#else' or an `#endif' are followed by text.
+     This usually happens in code of the form
+
+          #if FOO
+          ...
+          #else FOO
+          ...
+          #endif FOO
+
+     The second and third `FOO' should be in comments, but often are not
+     in older programs.  This warning is on by default.
+
+`-Werror'
+     Make all warnings into hard errors.  Source code which triggers
+     warnings will be rejected.
+
+`-Wsystem-headers'
+     Issue warnings for code in system headers.  These are normally
+     unhelpful in finding bugs in your own code, therefore suppressed.
+     If you are responsible for the system library, you may want to see
+     them.
+
+`-w'
+     Suppress all warnings, including those which GNU CPP issues by
+     default.
+
+`-pedantic'
+     Issue all the mandatory diagnostics listed in the C standard.
+     Some of them are left out by default, since they trigger
+     frequently on harmless code.
+
+`-pedantic-errors'
+     Issue all the mandatory diagnostics, and make all mandatory
+     diagnostics into errors.  This includes mandatory diagnostics that
+     GCC issues without `-pedantic' but treats as warnings.
+
+`-M'
+     Instead of outputting the result of preprocessing, output a rule
+     suitable for `make' describing the dependencies of the main source
+     file.  The preprocessor outputs one `make' rule containing the
+     object file name for that source file, a colon, and the names of
+     all the included files, including those coming from `-include' or
+     `-imacros' command line options.
+
+     Unless specified explicitly (with `-MT' or `-MQ'), the object file
+     name consists of the name of the source file with any suffix
+     replaced with object file suffix and with any leading directory
+     parts removed.  If there are many included files then the rule is
+     split into several lines using `\'-newline.  The rule has no
+     commands.
+
+     This option does not suppress the preprocessor's debug output,
+     such as `-dM'.  To avoid mixing such debug output with the
+     dependency rules you should explicitly specify the dependency
+     output file with `-MF', or use an environment variable like
+     `DEPENDENCIES_OUTPUT' (*note Environment Variables::).  Debug
+     output will still be sent to the regular output stream as normal.
+
+     Passing `-M' to the driver implies `-E', and suppresses warnings
+     with an implicit `-w'.
+
+`-MM'
+     Like `-M' but do not mention header files that are found in system
+     header directories, nor header files that are included, directly
+     or indirectly, from such a header.
+
+     This implies that the choice of angle brackets or double quotes in
+     an `#include' directive does not in itself determine whether that
+     header will appear in `-MM' dependency output.  This is a slight
+     change in semantics from GCC versions 3.0 and earlier.
+
+`-MF FILE'
+     When used with `-M' or `-MM', specifies a file to write the
+     dependencies to.  If no `-MF' switch is given the preprocessor
+     sends the rules to the same place it would have sent preprocessed
+     output.
+
+     When used with the driver options `-MD' or `-MMD', `-MF' overrides
+     the default dependency output file.
+
+`-MG'
+     In conjunction with an option such as `-M' requesting dependency
+     generation, `-MG' assumes missing header files are generated files
+     and adds them to the dependency list without raising an error.
+     The dependency filename is taken directly from the `#include'
+     directive without prepending any path.  `-MG' also suppresses
+     preprocessed output, as a missing header file renders this useless.
+
+     This feature is used in automatic updating of makefiles.
+
+`-MP'
+     This option instructs CPP to add a phony target for each dependency
+     other than the main file, causing each to depend on nothing.  These
+     dummy rules work around errors `make' gives if you remove header
+     files without updating the `Makefile' to match.
+
+     This is typical output:
+
+          test.o: test.c test.h
+
+          test.h:
+
+`-MT TARGET'
+     Change the target of the rule emitted by dependency generation.  By
+     default CPP takes the name of the main input file, deletes any
+     directory components and any file suffix such as `.c', and appends
+     the platform's usual object suffix.  The result is the target.
+
+     An `-MT' option will set the target to be exactly the string you
+     specify.  If you want multiple targets, you can specify them as a
+     single argument to `-MT', or use multiple `-MT' options.
+
+     For example, `-MT '$(objpfx)foo.o'' might give
+
+          $(objpfx)foo.o: foo.c
+
+`-MQ TARGET'
+     Same as `-MT', but it quotes any characters which are special to
+     Make.  `-MQ '$(objpfx)foo.o'' gives
+
+          $$(objpfx)foo.o: foo.c
+
+     The default target is automatically quoted, as if it were given
+     with `-MQ'.
+
+`-MD'
+     `-MD' is equivalent to `-M -MF FILE', except that `-E' is not
+     implied.  The driver determines FILE based on whether an `-o'
+     option is given.  If it is, the driver uses its argument but with
+     a suffix of `.d', otherwise it takes the name of the input file,
+     removes any directory components and suffix, and applies a `.d'
+     suffix.
+
+     If `-MD' is used in conjunction with `-E', any `-o' switch is
+     understood to specify the dependency output file (*note -MF:
+     dashMF.), but if used without `-E', each `-o' is understood to
+     specify a target object file.
+
+     Since `-E' is not implied, `-MD' can be used to generate a
+     dependency output file as a side-effect of the compilation process.
+
+`-MMD'
+     Like `-MD' except mention only user header files, not system
+     header files.
+
+`-x c'
+`-x c++'
+`-x objective-c'
+`-x assembler-with-cpp'
+     Specify the source language: C, C++, Objective-C, or assembly.
+     This has nothing to do with standards conformance or extensions;
+     it merely selects which base syntax to expect.  If you give none
+     of these options, cpp will deduce the language from the extension
+     of the source file: `.c', `.cc', `.m', or `.S'.  Some other common
+     extensions for C++ and assembly are also recognized.  If cpp does
+     not recognize the extension, it will treat the file as C; this is
+     the most generic mode.
+
+     _Note:_ Previous versions of cpp accepted a `-lang' option which
+     selected both the language and the standards conformance level.
+     This option has been removed, because it conflicts with the `-l'
+     option.
+
+`-std=STANDARD'
+`-ansi'
+     Specify the standard to which the code should conform.  Currently
+     CPP knows about C and C++ standards; others may be added in the
+     future.
+
+     STANDARD may be one of:
+    `c90'
+    `c89'
+    `iso9899:1990'
+          The ISO C standard from 1990.  `c90' is the customary
+          shorthand for this version of the standard.
+
+          The `-ansi' option is equivalent to `-std=c90'.
+
+    `iso9899:199409'
+          The 1990 C standard, as amended in 1994.
+
+    `iso9899:1999'
+    `c99'
+    `iso9899:199x'
+    `c9x'
+          The revised ISO C standard, published in December 1999.
+          Before publication, this was known as C9X.
+
+    `c1x'
+          The next version of the ISO C standard, still under
+          development.
+
+    `gnu90'
+    `gnu89'
+          The 1990 C standard plus GNU extensions.  This is the default.
+
+    `gnu99'
+    `gnu9x'
+          The 1999 C standard plus GNU extensions.
+
+    `gnu1x'
+          The next version of the ISO C standard, still under
+          development, plus GNU extensions.
+
+    `c++98'
+          The 1998 ISO C++ standard plus amendments.
+
+    `gnu++98'
+          The same as `-std=c++98' plus GNU extensions.  This is the
+          default for C++ code.
+
+`-I-'
+     Split the include path.  Any directories specified with `-I'
+     options before `-I-' are searched only for headers requested with
+     `#include "FILE"'; they are not searched for `#include <FILE>'.
+     If additional directories are specified with `-I' options after
+     the `-I-', those directories are searched for all `#include'
+     directives.
+
+     In addition, `-I-' inhibits the use of the directory of the current
+     file directory as the first search directory for `#include "FILE"'.
+     *Note Search Path::.  This option has been deprecated.
+
+`-nostdinc'
+     Do not search the standard system directories for header files.
+     Only the directories you have specified with `-I' options (and the
+     directory of the current file, if appropriate) are searched.
+
+`-nostdinc++'
+     Do not search for header files in the C++-specific standard
+     directories, but do still search the other standard directories.
+     (This option is used when building the C++ library.)
+
+`-include FILE'
+     Process FILE as if `#include "file"' appeared as the first line of
+     the primary source file.  However, the first directory searched
+     for FILE is the preprocessor's working directory _instead of_ the
+     directory containing the main source file.  If not found there, it
+     is searched for in the remainder of the `#include "..."' search
+     chain as normal.
+
+     If multiple `-include' options are given, the files are included
+     in the order they appear on the command line.
+
+`-imacros FILE'
+     Exactly like `-include', except that any output produced by
+     scanning FILE is thrown away.  Macros it defines remain defined.
+     This allows you to acquire all the macros from a header without
+     also processing its declarations.
+
+     All files specified by `-imacros' are processed before all files
+     specified by `-include'.
+
+`-idirafter DIR'
+     Search DIR for header files, but do it _after_ all directories
+     specified with `-I' and the standard system directories have been
+     exhausted.  DIR is treated as a system include directory.  If DIR
+     begins with `=', then the `=' will be replaced by the sysroot
+     prefix; see `--sysroot' and `-isysroot'.
+
+`-iprefix PREFIX'
+     Specify PREFIX as the prefix for subsequent `-iwithprefix'
+     options.  If the prefix represents a directory, you should include
+     the final `/'.
+
+`-iwithprefix DIR'
+`-iwithprefixbefore DIR'
+     Append DIR to the prefix specified previously with `-iprefix', and
+     add the resulting directory to the include search path.
+     `-iwithprefixbefore' puts it in the same place `-I' would;
+     `-iwithprefix' puts it where `-idirafter' would.
+
+`-isysroot DIR'
+     This option is like the `--sysroot' option, but applies only to
+     header files (except for Darwin targets, where it applies to both
+     header files and libraries).  See the `--sysroot' option for more
+     information.
+
+`-imultilib DIR'
+     Use DIR as a subdirectory of the directory containing
+     target-specific C++ headers.
+
+`-isystem DIR'
+     Search DIR for header files, after all directories specified by
+     `-I' but before the standard system directories.  Mark it as a
+     system directory, so that it gets the same special treatment as is
+     applied to the standard system directories.  *Note System
+     Headers::.  If DIR begins with `=', then the `=' will be replaced
+     by the sysroot prefix; see `--sysroot' and `-isysroot'.
+
+`-iquote DIR'
+     Search DIR only for header files requested with `#include "FILE"';
+     they are not searched for `#include <FILE>', before all
+     directories specified by `-I' and before the standard system
+     directories.  *Note Search Path::.  If DIR begins with `=', then
+     the `=' will be replaced by the sysroot prefix; see `--sysroot'
+     and `-isysroot'.
+
+`-fdirectives-only'
+     When preprocessing, handle directives, but do not expand macros.
+
+     The option's behavior depends on the `-E' and `-fpreprocessed'
+     options.
+
+     With `-E', preprocessing is limited to the handling of directives
+     such as `#define', `#ifdef', and `#error'.  Other preprocessor
+     operations, such as macro expansion and trigraph conversion are
+     not performed.  In addition, the `-dD' option is implicitly
+     enabled.
+
+     With `-fpreprocessed', predefinition of command line and most
+     builtin macros is disabled.  Macros such as `__LINE__', which are
+     contextually dependent, are handled normally.  This enables
+     compilation of files previously preprocessed with `-E
+     -fdirectives-only'.
+
+     With both `-E' and `-fpreprocessed', the rules for
+     `-fpreprocessed' take precedence.  This enables full preprocessing
+     of files previously preprocessed with `-E -fdirectives-only'.
+
+`-fdollars-in-identifiers'
+     Accept `$' in identifiers.  *Note Identifier characters::.
+
+`-fextended-identifiers'
+     Accept universal character names in identifiers.  This option is
+     experimental; in a future version of GCC, it will be enabled by
+     default for C99 and C++.
+
+`-fpreprocessed'
+     Indicate to the preprocessor that the input file has already been
+     preprocessed.  This suppresses things like macro expansion,
+     trigraph conversion, escaped newline splicing, and processing of
+     most directives.  The preprocessor still recognizes and removes
+     comments, so that you can pass a file preprocessed with `-C' to
+     the compiler without problems.  In this mode the integrated
+     preprocessor is little more than a tokenizer for the front ends.
+
+     `-fpreprocessed' is implicit if the input file has one of the
+     extensions `.i', `.ii' or `.mi'.  These are the extensions that
+     GCC uses for preprocessed files created by `-save-temps'.
+
+`-ftabstop=WIDTH'
+     Set the distance between tab stops.  This helps the preprocessor
+     report correct column numbers in warnings or errors, even if tabs
+     appear on the line.  If the value is less than 1 or greater than
+     100, the option is ignored.  The default is 8.
+
+`-fexec-charset=CHARSET'
+     Set the execution character set, used for string and character
+     constants.  The default is UTF-8.  CHARSET can be any encoding
+     supported by the system's `iconv' library routine.
+
+`-fwide-exec-charset=CHARSET'
+     Set the wide execution character set, used for wide string and
+     character constants.  The default is UTF-32 or UTF-16, whichever
+     corresponds to the width of `wchar_t'.  As with `-fexec-charset',
+     CHARSET can be any encoding supported by the system's `iconv'
+     library routine; however, you will have problems with encodings
+     that do not fit exactly in `wchar_t'.
+
+`-finput-charset=CHARSET'
+     Set the input character set, used for translation from the
+     character set of the input file to the source character set used
+     by GCC.  If the locale does not specify, or GCC cannot get this
+     information from the locale, the default is UTF-8.  This can be
+     overridden by either the locale or this command line option.
+     Currently the command line option takes precedence if there's a
+     conflict.  CHARSET can be any encoding supported by the system's
+     `iconv' library routine.
+
+`-fworking-directory'
+     Enable generation of linemarkers in the preprocessor output that
+     will let the compiler know the current working directory at the
+     time of preprocessing.  When this option is enabled, the
+     preprocessor will emit, after the initial linemarker, a second
+     linemarker with the current working directory followed by two
+     slashes.  GCC will use this directory, when it's present in the
+     preprocessed input, as the directory emitted as the current
+     working directory in some debugging information formats.  This
+     option is implicitly enabled if debugging information is enabled,
+     but this can be inhibited with the negated form
+     `-fno-working-directory'.  If the `-P' flag is present in the
+     command line, this option has no effect, since no `#line'
+     directives are emitted whatsoever.
+
+`-fno-show-column'
+     Do not print column numbers in diagnostics.  This may be necessary
+     if diagnostics are being scanned by a program that does not
+     understand the column numbers, such as `dejagnu'.
+
+`-A PREDICATE=ANSWER'
+     Make an assertion with the predicate PREDICATE and answer ANSWER.
+     This form is preferred to the older form `-A PREDICATE(ANSWER)',
+     which is still supported, because it does not use shell special
+     characters.  *Note Obsolete Features::.
+
+`-A -PREDICATE=ANSWER'
+     Cancel an assertion with the predicate PREDICATE and answer ANSWER.
+
+`-dCHARS'
+     CHARS is a sequence of one or more of the following characters,
+     and must not be preceded by a space.  Other characters are
+     interpreted by the compiler proper, or reserved for future
+     versions of GCC, and so are silently ignored.  If you specify
+     characters whose behavior conflicts, the result is undefined.
+
+    `M'
+          Instead of the normal output, generate a list of `#define'
+          directives for all the macros defined during the execution of
+          the preprocessor, including predefined macros.  This gives
+          you a way of finding out what is predefined in your version
+          of the preprocessor.  Assuming you have no file `foo.h', the
+          command
+
+               touch foo.h; cpp -dM foo.h
+
+          will show all the predefined macros.
+
+          If you use `-dM' without the `-E' option, `-dM' is
+          interpreted as a synonym for `-fdump-rtl-mach'.  *Note
+          Debugging Options: (gcc)Debugging Options.
+
+    `D'
+          Like `M' except in two respects: it does _not_ include the
+          predefined macros, and it outputs _both_ the `#define'
+          directives and the result of preprocessing.  Both kinds of
+          output go to the standard output file.
+
+    `N'
+          Like `D', but emit only the macro names, not their expansions.
+
+    `I'
+          Output `#include' directives in addition to the result of
+          preprocessing.
+
+    `U'
+          Like `D' except that only macros that are expanded, or whose
+          definedness is tested in preprocessor directives, are output;
+          the output is delayed until the use or test of the macro; and
+          `#undef' directives are also output for macros tested but
+          undefined at the time.
+
+`-P'
+     Inhibit generation of linemarkers in the output from the
+     preprocessor.  This might be useful when running the preprocessor
+     on something that is not C code, and will be sent to a program
+     which might be confused by the linemarkers.  *Note Preprocessor
+     Output::.
+
+`-C'
+     Do not discard comments.  All comments are passed through to the
+     output file, except for comments in processed directives, which
+     are deleted along with the directive.
+
+     You should be prepared for side effects when using `-C'; it causes
+     the preprocessor to treat comments as tokens in their own right.
+     For example, comments appearing at the start of what would be a
+     directive line have the effect of turning that line into an
+     ordinary source line, since the first token on the line is no
+     longer a `#'.
+
+`-CC'
+     Do not discard comments, including during macro expansion.  This is
+     like `-C', except that comments contained within macros are also
+     passed through to the output file where the macro is expanded.
+
+     In addition to the side-effects of the `-C' option, the `-CC'
+     option causes all C++-style comments inside a macro to be
+     converted to C-style comments.  This is to prevent later use of
+     that macro from inadvertently commenting out the remainder of the
+     source line.
+
+     The `-CC' option is generally used to support lint comments.
+
+`-traditional-cpp'
+     Try to imitate the behavior of old-fashioned C preprocessors, as
+     opposed to ISO C preprocessors.  *Note Traditional Mode::.
+
+`-trigraphs'
+     Process trigraph sequences.  *Note Initial processing::.
+
+`-remap'
+     Enable special code to work around file systems which only permit
+     very short file names, such as MS-DOS.
+
+`--help'
+`--target-help'
+     Print text describing all the command line options instead of
+     preprocessing anything.
+
+`-v'
+     Verbose mode.  Print out GNU CPP's version number at the beginning
+     of execution, and report the final form of the include path.
+
+`-H'
+     Print the name of each header file used, in addition to other
+     normal activities.  Each name is indented to show how deep in the
+     `#include' stack it is.  Precompiled header files are also
+     printed, even if they are found to be invalid; an invalid
+     precompiled header file is printed with `...x' and a valid one
+     with `...!' .
+
+`-version'
+`--version'
+     Print out GNU CPP's version number.  With one dash, proceed to
+     preprocess as normal.  With two dashes, exit immediately.
+
+
+File: cpp.info,  Node: Environment Variables,  Next: GNU Free Documentation License,  Prev: Invocation,  Up: Top
+
+13 Environment Variables
+************************
+
+This section describes the environment variables that affect how CPP
+operates.  You can use them to specify directories or prefixes to use
+when searching for include files, or to control dependency output.
+
+   Note that you can also specify places to search using options such as
+`-I', and control dependency output with options like `-M' (*note
+Invocation::).  These take precedence over environment variables, which
+in turn take precedence over the configuration of GCC.
+
+`CPATH'
+`C_INCLUDE_PATH'
+`CPLUS_INCLUDE_PATH'
+`OBJC_INCLUDE_PATH'
+     Each variable's value is a list of directories separated by a
+     special character, much like `PATH', in which to look for header
+     files.  The special character, `PATH_SEPARATOR', is
+     target-dependent and determined at GCC build time.  For Microsoft
+     Windows-based targets it is a semicolon, and for almost all other
+     targets it is a colon.
+
+     `CPATH' specifies a list of directories to be searched as if
+     specified with `-I', but after any paths given with `-I' options
+     on the command line.  This environment variable is used regardless
+     of which language is being preprocessed.
+
+     The remaining environment variables apply only when preprocessing
+     the particular language indicated.  Each specifies a list of
+     directories to be searched as if specified with `-isystem', but
+     after any paths given with `-isystem' options on the command line.
+
+     In all these variables, an empty element instructs the compiler to
+     search its current working directory.  Empty elements can appear
+     at the beginning or end of a path.  For instance, if the value of
+     `CPATH' is `:/special/include', that has the same effect as
+     `-I. -I/special/include'.
+
+     See also *note Search Path::.
+
+`DEPENDENCIES_OUTPUT'
+     If this variable is set, its value specifies how to output
+     dependencies for Make based on the non-system header files
+     processed by the compiler.  System header files are ignored in the
+     dependency output.
+
+     The value of `DEPENDENCIES_OUTPUT' can be just a file name, in
+     which case the Make rules are written to that file, guessing the
+     target name from the source file name.  Or the value can have the
+     form `FILE TARGET', in which case the rules are written to file
+     FILE using TARGET as the target name.
+
+     In other words, this environment variable is equivalent to
+     combining the options `-MM' and `-MF' (*note Invocation::), with
+     an optional `-MT' switch too.
+
+`SUNPRO_DEPENDENCIES'
+     This variable is the same as `DEPENDENCIES_OUTPUT' (see above),
+     except that system header files are not ignored, so it implies
+     `-M' rather than `-MM'.  However, the dependence on the main input
+     file is omitted.  *Note Invocation::.
+
+
+File: cpp.info,  Node: GNU Free Documentation License,  Next: Index of Directives,  Prev: Environment Variables,  Up: Top
+
+GNU Free Documentation License
+******************************
+
+                     Version 1.3, 3 November 2008
+
+     Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
+     `http://fsf.org/'
+
+     Everyone is permitted to copy and distribute verbatim copies
+     of this license document, but changing it is not allowed.
+
+  0. PREAMBLE
+
+     The purpose of this License is to make a manual, textbook, or other
+     functional and useful document "free" in the sense of freedom: to
+     assure everyone the effective freedom to copy and redistribute it,
+     with or without modifying it, either commercially or
+     noncommercially.  Secondarily, this License preserves for the
+     author and publisher a way to get credit for their work, while not
+     being considered responsible for modifications made by others.
+
+     This License is a kind of "copyleft", which means that derivative
+     works of the document must themselves be free in the same sense.
+     It complements the GNU General Public License, which is a copyleft
+     license designed for free software.
+
+     We have designed this License in order to use it for manuals for
+     free software, because free software needs free documentation: a
+     free program should come with manuals providing the same freedoms
+     that the software does.  But this License is not limited to
+     software manuals; it can be used for any textual work, regardless
+     of subject matter or whether it is published as a printed book.
+     We recommend this License principally for works whose purpose is
+     instruction or reference.
+
+  1. APPLICABILITY AND DEFINITIONS
+
+     This License applies to any manual or other work, in any medium,
+     that contains a notice placed by the copyright holder saying it
+     can be distributed under the terms of this License.  Such a notice
+     grants a world-wide, royalty-free license, unlimited in duration,
+     to use that work under the conditions stated herein.  The
+     "Document", below, refers to any such manual or work.  Any member
+     of the public is a licensee, and is addressed as "you".  You
+     accept the license if you copy, modify or distribute the work in a
+     way requiring permission under copyright law.
+
+     A "Modified Version" of the Document means any work containing the
+     Document or a portion of it, either copied verbatim, or with
+     modifications and/or translated into another language.
+
+     A "Secondary Section" is a named appendix or a front-matter section
+     of the Document that deals exclusively with the relationship of the
+     publishers or authors of the Document to the Document's overall
+     subject (or to related matters) and contains nothing that could
+     fall directly within that overall subject.  (Thus, if the Document
+     is in part a textbook of mathematics, a Secondary Section may not
+     explain any mathematics.)  The relationship could be a matter of
+     historical connection with the subject or with related matters, or
+     of legal, commercial, philosophical, ethical or political position
+     regarding them.
+
+     The "Invariant Sections" are certain Secondary Sections whose
+     titles are designated, as being those of Invariant Sections, in
+     the notice that says that the Document is released under this
+     License.  If a section does not fit the above definition of
+     Secondary then it is not allowed to be designated as Invariant.
+     The Document may contain zero Invariant Sections.  If the Document
+     does not identify any Invariant Sections then there are none.
+
+     The "Cover Texts" are certain short passages of text that are
+     listed, as Front-Cover Texts or Back-Cover Texts, in the notice
+     that says that the Document is released under this License.  A
+     Front-Cover Text may be at most 5 words, and a Back-Cover Text may
+     be at most 25 words.
+
+     A "Transparent" copy of the Document means a machine-readable copy,
+     represented in a format whose specification is available to the
+     general public, that is suitable for revising the document
+     straightforwardly with generic text editors or (for images
+     composed of pixels) generic paint programs or (for drawings) some
+     widely available drawing editor, and that is suitable for input to
+     text formatters or for automatic translation to a variety of
+     formats suitable for input to text formatters.  A copy made in an
+     otherwise Transparent file format whose markup, or absence of
+     markup, has been arranged to thwart or discourage subsequent
+     modification by readers is not Transparent.  An image format is
+     not Transparent if used for any substantial amount of text.  A
+     copy that is not "Transparent" is called "Opaque".
+
+     Examples of suitable formats for Transparent copies include plain
+     ASCII without markup, Texinfo input format, LaTeX input format,
+     SGML or XML using a publicly available DTD, and
+     standard-conforming simple HTML, PostScript or PDF designed for
+     human modification.  Examples of transparent image formats include
+     PNG, XCF and JPG.  Opaque formats include proprietary formats that
+     can be read and edited only by proprietary word processors, SGML or
+     XML for which the DTD and/or processing tools are not generally
+     available, and the machine-generated HTML, PostScript or PDF
+     produced by some word processors for output purposes only.
+
+     The "Title Page" means, for a printed book, the title page itself,
+     plus such following pages as are needed to hold, legibly, the
+     material this License requires to appear in the title page.  For
+     works in formats which do not have any title page as such, "Title
+     Page" means the text near the most prominent appearance of the
+     work's title, preceding the beginning of the body of the text.
+
+     The "publisher" means any person or entity that distributes copies
+     of the Document to the public.
+
+     A section "Entitled XYZ" means a named subunit of the Document
+     whose title either is precisely XYZ or contains XYZ in parentheses
+     following text that translates XYZ in another language.  (Here XYZ
+     stands for a specific section name mentioned below, such as
+     "Acknowledgements", "Dedications", "Endorsements", or "History".)
+     To "Preserve the Title" of such a section when you modify the
+     Document means that it remains a section "Entitled XYZ" according
+     to this definition.
+
+     The Document may include Warranty Disclaimers next to the notice
+     which states that this License applies to the Document.  These
+     Warranty Disclaimers are considered to be included by reference in
+     this License, but only as regards disclaiming warranties: any other
+     implication that these Warranty Disclaimers may have is void and
+     has no effect on the meaning of this License.
+
+  2. VERBATIM COPYING
+
+     You may copy and distribute the Document in any medium, either
+     commercially or noncommercially, provided that this License, the
+     copyright notices, and the license notice saying this License
+     applies to the Document are reproduced in all copies, and that you
+     add no other conditions whatsoever to those of this License.  You
+     may not use technical measures to obstruct or control the reading
+     or further copying of the copies you make or distribute.  However,
+     you may accept compensation in exchange for copies.  If you
+     distribute a large enough number of copies you must also follow
+     the conditions in section 3.
+
+     You may also lend copies, under the same conditions stated above,
+     and you may publicly display copies.
+
+  3. COPYING IN QUANTITY
+
+     If you publish printed copies (or copies in media that commonly
+     have printed covers) of the Document, numbering more than 100, and
+     the Document's license notice requires Cover Texts, you must
+     enclose the copies in covers that carry, clearly and legibly, all
+     these Cover Texts: Front-Cover Texts on the front cover, and
+     Back-Cover Texts on the back cover.  Both covers must also clearly
+     and legibly identify you as the publisher of these copies.  The
+     front cover must present the full title with all words of the
+     title equally prominent and visible.  You may add other material
+     on the covers in addition.  Copying with changes limited to the
+     covers, as long as they preserve the title of the Document and
+     satisfy these conditions, can be treated as verbatim copying in
+     other respects.
+
+     If the required texts for either cover are too voluminous to fit
+     legibly, you should put the first ones listed (as many as fit
+     reasonably) on the actual cover, and continue the rest onto
+     adjacent pages.
+
+     If you publish or distribute Opaque copies of the Document
+     numbering more than 100, you must either include a
+     machine-readable Transparent copy along with each Opaque copy, or
+     state in or with each Opaque copy a computer-network location from
+     which the general network-using public has access to download
+     using public-standard network protocols a complete Transparent
+     copy of the Document, free of added material.  If you use the
+     latter option, you must take reasonably prudent steps, when you
+     begin distribution of Opaque copies in quantity, to ensure that
+     this Transparent copy will remain thus accessible at the stated
+     location until at least one year after the last time you
+     distribute an Opaque copy (directly or through your agents or
+     retailers) of that edition to the public.
+
+     It is requested, but not required, that you contact the authors of
+     the Document well before redistributing any large number of
+     copies, to give them a chance to provide you with an updated
+     version of the Document.
+
+  4. MODIFICATIONS
+
+     You may copy and distribute a Modified Version of the Document
+     under the conditions of sections 2 and 3 above, provided that you
+     release the Modified Version under precisely this License, with
+     the Modified Version filling the role of the Document, thus
+     licensing distribution and modification of the Modified Version to
+     whoever possesses a copy of it.  In addition, you must do these
+     things in the Modified Version:
+
+       A. Use in the Title Page (and on the covers, if any) a title
+          distinct from that of the Document, and from those of
+          previous versions (which should, if there were any, be listed
+          in the History section of the Document).  You may use the
+          same title as a previous version if the original publisher of
+          that version gives permission.
+
+       B. List on the Title Page, as authors, one or more persons or
+          entities responsible for authorship of the modifications in
+          the Modified Version, together with at least five of the
+          principal authors of the Document (all of its principal
+          authors, if it has fewer than five), unless they release you
+          from this requirement.
+
+       C. State on the Title page the name of the publisher of the
+          Modified Version, as the publisher.
+
+       D. Preserve all the copyright notices of the Document.
+
+       E. Add an appropriate copyright notice for your modifications
+          adjacent to the other copyright notices.
+
+       F. Include, immediately after the copyright notices, a license
+          notice giving the public permission to use the Modified
+          Version under the terms of this License, in the form shown in
+          the Addendum below.
+
+       G. Preserve in that license notice the full lists of Invariant
+          Sections and required Cover Texts given in the Document's
+          license notice.
+
+       H. Include an unaltered copy of this License.
+
+       I. Preserve the section Entitled "History", Preserve its Title,
+          and add to it an item stating at least the title, year, new
+          authors, and publisher of the Modified Version as given on
+          the Title Page.  If there is no section Entitled "History" in
+          the Document, create one stating the title, year, authors,
+          and publisher of the Document as given on its Title Page,
+          then add an item describing the Modified Version as stated in
+          the previous sentence.
+
+       J. Preserve the network location, if any, given in the Document
+          for public access to a Transparent copy of the Document, and
+          likewise the network locations given in the Document for
+          previous versions it was based on.  These may be placed in
+          the "History" section.  You may omit a network location for a
+          work that was published at least four years before the
+          Document itself, or if the original publisher of the version
+          it refers to gives permission.
+
+       K. For any section Entitled "Acknowledgements" or "Dedications",
+          Preserve the Title of the section, and preserve in the
+          section all the substance and tone of each of the contributor
+          acknowledgements and/or dedications given therein.
+
+       L. Preserve all the Invariant Sections of the Document,
+          unaltered in their text and in their titles.  Section numbers
+          or the equivalent are not considered part of the section
+          titles.
+
+       M. Delete any section Entitled "Endorsements".  Such a section
+          may not be included in the Modified Version.
+
+       N. Do not retitle any existing section to be Entitled
+          "Endorsements" or to conflict in title with any Invariant
+          Section.
+
+       O. Preserve any Warranty Disclaimers.
+
+     If the Modified Version includes new front-matter sections or
+     appendices that qualify as Secondary Sections and contain no
+     material copied from the Document, you may at your option
+     designate some or all of these sections as invariant.  To do this,
+     add their titles to the list of Invariant Sections in the Modified
+     Version's license notice.  These titles must be distinct from any
+     other section titles.
+
+     You may add a section Entitled "Endorsements", provided it contains
+     nothing but endorsements of your Modified Version by various
+     parties--for example, statements of peer review or that the text
+     has been approved by an organization as the authoritative
+     definition of a standard.
+
+     You may add a passage of up to five words as a Front-Cover Text,
+     and a passage of up to 25 words as a Back-Cover Text, to the end
+     of the list of Cover Texts in the Modified Version.  Only one
+     passage of Front-Cover Text and one of Back-Cover Text may be
+     added by (or through arrangements made by) any one entity.  If the
+     Document already includes a cover text for the same cover,
+     previously added by you or by arrangement made by the same entity
+     you are acting on behalf of, you may not add another; but you may
+     replace the old one, on explicit permission from the previous
+     publisher that added the old one.
+
+     The author(s) and publisher(s) of the Document do not by this
+     License give permission to use their names for publicity for or to
+     assert or imply endorsement of any Modified Version.
+
+  5. COMBINING DOCUMENTS
+
+     You may combine the Document with other documents released under
+     this License, under the terms defined in section 4 above for
+     modified versions, provided that you include in the combination
+     all of the Invariant Sections of all of the original documents,
+     unmodified, and list them all as Invariant Sections of your
+     combined work in its license notice, and that you preserve all
+     their Warranty Disclaimers.
+
+     The combined work need only contain one copy of this License, and
+     multiple identical Invariant Sections may be replaced with a single
+     copy.  If there are multiple Invariant Sections with the same name
+     but different contents, make the title of each such section unique
+     by adding at the end of it, in parentheses, the name of the
+     original author or publisher of that section if known, or else a
+     unique number.  Make the same adjustment to the section titles in
+     the list of Invariant Sections in the license notice of the
+     combined work.
+
+     In the combination, you must combine any sections Entitled
+     "History" in the various original documents, forming one section
+     Entitled "History"; likewise combine any sections Entitled
+     "Acknowledgements", and any sections Entitled "Dedications".  You
+     must delete all sections Entitled "Endorsements."
+
+  6. COLLECTIONS OF DOCUMENTS
+
+     You may make a collection consisting of the Document and other
+     documents released under this License, and replace the individual
+     copies of this License in the various documents with a single copy
+     that is included in the collection, provided that you follow the
+     rules of this License for verbatim copying of each of the
+     documents in all other respects.
+
+     You may extract a single document from such a collection, and
+     distribute it individually under this License, provided you insert
+     a copy of this License into the extracted document, and follow
+     this License in all other respects regarding verbatim copying of
+     that document.
+
+  7. AGGREGATION WITH INDEPENDENT WORKS
+
+     A compilation of the Document or its derivatives with other
+     separate and independent documents or works, in or on a volume of
+     a storage or distribution medium, is called an "aggregate" if the
+     copyright resulting from the compilation is not used to limit the
+     legal rights of the compilation's users beyond what the individual
+     works permit.  When the Document is included in an aggregate, this
+     License does not apply to the other works in the aggregate which
+     are not themselves derivative works of the Document.
+
+     If the Cover Text requirement of section 3 is applicable to these
+     copies of the Document, then if the Document is less than one half
+     of the entire aggregate, the Document's Cover Texts may be placed
+     on covers that bracket the Document within the aggregate, or the
+     electronic equivalent of covers if the Document is in electronic
+     form.  Otherwise they must appear on printed covers that bracket
+     the whole aggregate.
+
+  8. TRANSLATION
+
+     Translation is considered a kind of modification, so you may
+     distribute translations of the Document under the terms of section
+     4.  Replacing Invariant Sections with translations requires special
+     permission from their copyright holders, but you may include
+     translations of some or all Invariant Sections in addition to the
+     original versions of these Invariant Sections.  You may include a
+     translation of this License, and all the license notices in the
+     Document, and any Warranty Disclaimers, provided that you also
+     include the original English version of this License and the
+     original versions of those notices and disclaimers.  In case of a
+     disagreement between the translation and the original version of
+     this License or a notice or disclaimer, the original version will
+     prevail.
+
+     If a section in the Document is Entitled "Acknowledgements",
+     "Dedications", or "History", the requirement (section 4) to
+     Preserve its Title (section 1) will typically require changing the
+     actual title.
+
+  9. TERMINATION
+
+     You may not copy, modify, sublicense, or distribute the Document
+     except as expressly provided under this License.  Any attempt
+     otherwise to copy, modify, sublicense, or distribute it is void,
+     and will automatically terminate your rights under this License.
+
+     However, if you cease all violation of this License, then your
+     license from a particular copyright holder is reinstated (a)
+     provisionally, unless and until the copyright holder explicitly
+     and finally terminates your license, and (b) permanently, if the
+     copyright holder fails to notify you of the violation by some
+     reasonable means prior to 60 days after the cessation.
+
+     Moreover, your license from a particular copyright holder is
+     reinstated permanently if the copyright holder notifies you of the
+     violation by some reasonable means, this is the first time you have
+     received notice of violation of this License (for any work) from
+     that copyright holder, and you cure the violation prior to 30 days
+     after your receipt of the notice.
+
+     Termination of your rights under this section does not terminate
+     the licenses of parties who have received copies or rights from
+     you under this License.  If your rights have been terminated and
+     not permanently reinstated, receipt of a copy of some or all of
+     the same material does not give you any rights to use it.
+
+ 10. FUTURE REVISIONS OF THIS LICENSE
+
+     The Free Software Foundation may publish new, revised versions of
+     the GNU Free Documentation License from time to time.  Such new
+     versions will be similar in spirit to the present version, but may
+     differ in detail to address new problems or concerns.  See
+     `http://www.gnu.org/copyleft/'.
+
+     Each version of the License is given a distinguishing version
+     number.  If the Document specifies that a particular numbered
+     version of this License "or any later version" applies to it, you
+     have the option of following the terms and conditions either of
+     that specified version or of any later version that has been
+     published (not as a draft) by the Free Software Foundation.  If
+     the Document does not specify a version number of this License,
+     you may choose any version ever published (not as a draft) by the
+     Free Software Foundation.  If the Document specifies that a proxy
+     can decide which future versions of this License can be used, that
+     proxy's public statement of acceptance of a version permanently
+     authorizes you to choose that version for the Document.
+
+ 11. RELICENSING
+
+     "Massive Multiauthor Collaboration Site" (or "MMC Site") means any
+     World Wide Web server that publishes copyrightable works and also
+     provides prominent facilities for anybody to edit those works.  A
+     public wiki that anybody can edit is an example of such a server.
+     A "Massive Multiauthor Collaboration" (or "MMC") contained in the
+     site means any set of copyrightable works thus published on the MMC
+     site.
+
+     "CC-BY-SA" means the Creative Commons Attribution-Share Alike 3.0
+     license published by Creative Commons Corporation, a not-for-profit
+     corporation with a principal place of business in San Francisco,
+     California, as well as future copyleft versions of that license
+     published by that same organization.
+
+     "Incorporate" means to publish or republish a Document, in whole or
+     in part, as part of another Document.
+
+     An MMC is "eligible for relicensing" if it is licensed under this
+     License, and if all works that were first published under this
+     License somewhere other than this MMC, and subsequently
+     incorporated in whole or in part into the MMC, (1) had no cover
+     texts or invariant sections, and (2) were thus incorporated prior
+     to November 1, 2008.
+
+     The operator of an MMC Site may republish an MMC contained in the
+     site under CC-BY-SA on the same site at any time before August 1,
+     2009, provided the MMC is eligible for relicensing.
+
+
+ADDENDUM: How to use this License for your documents
+====================================================
+
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and license
+notices just after the title page:
+
+       Copyright (C)  YEAR  YOUR NAME.
+       Permission is granted to copy, distribute and/or modify this document
+       under the terms of the GNU Free Documentation License, Version 1.3
+       or any later version published by the Free Software Foundation;
+       with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
+       Texts.  A copy of the license is included in the section entitled ``GNU
+       Free Documentation License''.
+
+   If you have Invariant Sections, Front-Cover Texts and Back-Cover
+Texts, replace the "with...Texts." line with this:
+
+         with the Invariant Sections being LIST THEIR TITLES, with
+         the Front-Cover Texts being LIST, and with the Back-Cover Texts
+         being LIST.
+
+   If you have Invariant Sections without Cover Texts, or some other
+combination of the three, merge those two alternatives to suit the
+situation.
+
+   If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
+free software license, such as the GNU General Public License, to
+permit their use in free software.
+
+
+File: cpp.info,  Node: Index of Directives,  Next: Option Index,  Prev: GNU Free Documentation License,  Up: Top
+
+Index of Directives
+*******************
+
+
+* Menu:
+
+* #assert:                               Obsolete Features.    (line 48)
+* #define:                               Object-like Macros.   (line 11)
+* #elif:                                 Elif.                 (line  6)
+* #else:                                 Else.                 (line  6)
+* #endif:                                Ifdef.                (line  6)
+* #error:                                Diagnostics.          (line  6)
+* #ident:                                Other Directives.     (line  6)
+* #if:                                   Conditional Syntax.   (line  6)
+* #ifdef:                                Ifdef.                (line  6)
+* #ifndef:                               Ifdef.                (line 40)
+* #import:                               Alternatives to Wrapper #ifndef.
+                                                               (line 11)
+* #include:                              Include Syntax.       (line  6)
+* #include_next:                         Wrapper Headers.      (line  6)
+* #line:                                 Line Control.         (line 20)
+* #pragma GCC dependency:                Pragmas.              (line 55)
+* #pragma GCC poison:                    Pragmas.              (line 67)
+* #pragma GCC system_header <1>:         Pragmas.              (line 94)
+* #pragma GCC system_header:             System Headers.       (line 31)
+* #sccs:                                 Other Directives.     (line  6)
+* #unassert:                             Obsolete Features.    (line 59)
+* #undef:                                Undefining and Redefining Macros.
+                                                               (line  6)
+* #warning:                              Diagnostics.          (line 27)
+
+
+File: cpp.info,  Node: Option Index,  Next: Concept Index,  Prev: Index of Directives,  Up: Top
+
+Option Index
+************
+
+CPP's command line options and environment variables are indexed here
+without any initial `-' or `--'.
+
+
+* Menu:
+
+* A:                                     Invocation.          (line 534)
+* ansi:                                  Invocation.          (line 308)
+* C:                                     Invocation.          (line 593)
+* C_INCLUDE_PATH:                        Environment Variables.
+                                                              (line  16)
+* CPATH:                                 Environment Variables.
+                                                              (line  15)
+* CPLUS_INCLUDE_PATH:                    Environment Variables.
+                                                              (line  17)
+* D:                                     Invocation.          (line  39)
+* dD:                                    Invocation.          (line 566)
+* DEPENDENCIES_OUTPUT:                   Environment Variables.
+                                                              (line  44)
+* dI:                                    Invocation.          (line 575)
+* dM:                                    Invocation.          (line 550)
+* dN:                                    Invocation.          (line 572)
+* dU:                                    Invocation.          (line 579)
+* fdirectives-only:                      Invocation.          (line 442)
+* fdollars-in-identifiers:               Invocation.          (line 464)
+* fexec-charset:                         Invocation.          (line 491)
+* fextended-identifiers:                 Invocation.          (line 467)
+* finput-charset:                        Invocation.          (line 504)
+* fno-show-column:                       Invocation.          (line 529)
+* fno-working-directory:                 Invocation.          (line 514)
+* fpreprocessed:                         Invocation.          (line 472)
+* ftabstop:                              Invocation.          (line 485)
+* fwide-exec-charset:                    Invocation.          (line 496)
+* fworking-directory:                    Invocation.          (line 514)
+* H:                                     Invocation.          (line 638)
+* help:                                  Invocation.          (line 630)
+* I:                                     Invocation.          (line  71)
+* I-:                                    Invocation.          (line 355)
+* idirafter:                             Invocation.          (line 397)
+* imacros:                               Invocation.          (line 388)
+* imultilib:                             Invocation.          (line 422)
+* include:                               Invocation.          (line 377)
+* iprefix:                               Invocation.          (line 404)
+* iquote:                                Invocation.          (line 434)
+* isysroot:                              Invocation.          (line 416)
+* isystem:                               Invocation.          (line 426)
+* iwithprefix:                           Invocation.          (line 410)
+* iwithprefixbefore:                     Invocation.          (line 410)
+* M:                                     Invocation.          (line 180)
+* MD:                                    Invocation.          (line 269)
+* MF:                                    Invocation.          (line 215)
+* MG:                                    Invocation.          (line 224)
+* MM:                                    Invocation.          (line 205)
+* MMD:                                   Invocation.          (line 285)
+* MP:                                    Invocation.          (line 234)
+* MQ:                                    Invocation.          (line 260)
+* MT:                                    Invocation.          (line 246)
+* nostdinc:                              Invocation.          (line 367)
+* nostdinc++:                            Invocation.          (line 372)
+* o:                                     Invocation.          (line  82)
+* OBJC_INCLUDE_PATH:                     Environment Variables.
+                                                              (line  18)
+* P:                                     Invocation.          (line 586)
+* pedantic:                              Invocation.          (line 170)
+* pedantic-errors:                       Invocation.          (line 175)
+* remap:                                 Invocation.          (line 625)
+* std=:                                  Invocation.          (line 308)
+* SUNPRO_DEPENDENCIES:                   Environment Variables.
+                                                              (line  60)
+* target-help:                           Invocation.          (line 630)
+* traditional-cpp:                       Invocation.          (line 618)
+* trigraphs:                             Invocation.          (line 622)
+* U:                                     Invocation.          (line  62)
+* undef:                                 Invocation.          (line  66)
+* v:                                     Invocation.          (line 634)
+* version:                               Invocation.          (line 647)
+* w:                                     Invocation.          (line 166)
+* Wall:                                  Invocation.          (line  88)
+* Wcomment:                              Invocation.          (line  96)
+* Wcomments:                             Invocation.          (line  96)
+* Wendif-labels:                         Invocation.          (line 143)
+* Werror:                                Invocation.          (line 156)
+* Wsystem-headers:                       Invocation.          (line 160)
+* Wtraditional:                          Invocation.          (line 113)
+* Wtrigraphs:                            Invocation.          (line 101)
+* Wundef:                                Invocation.          (line 119)
+* Wunused-macros:                        Invocation.          (line 124)
+* x:                                     Invocation.          (line 292)
+
+
+File: cpp.info,  Node: Concept Index,  Prev: Option Index,  Up: Top
+
+Concept Index
+*************
+
+
+* Menu:
+
+* # operator:                            Stringification.     (line   6)
+* ## operator:                           Concatenation.       (line   6)
+* _Pragma:                               Pragmas.             (line  25)
+* alternative tokens:                    Tokenization.        (line 106)
+* arguments:                             Macro Arguments.     (line   6)
+* arguments in macro definitions:        Macro Arguments.     (line   6)
+* assertions:                            Obsolete Features.   (line  13)
+* assertions, canceling:                 Obsolete Features.   (line  59)
+* backslash-newline:                     Initial processing.  (line  61)
+* block comments:                        Initial processing.  (line  77)
+* C++ named operators:                   C++ Named Operators. (line   6)
+* character constants:                   Tokenization.        (line  85)
+* character set, execution:              Invocation.          (line 491)
+* character set, input:                  Invocation.          (line 504)
+* character set, wide execution:         Invocation.          (line 496)
+* command line:                          Invocation.          (line   6)
+* commenting out code:                   Deleted Code.        (line   6)
+* comments:                              Initial processing.  (line  77)
+* common predefined macros:              Common Predefined Macros.
+                                                              (line   6)
+* computed includes:                     Computed Includes.   (line   6)
+* concatenation:                         Concatenation.       (line   6)
+* conditional group:                     Ifdef.               (line  14)
+* conditionals:                          Conditionals.        (line   6)
+* continued lines:                       Initial processing.  (line  61)
+* controlling macro:                     Once-Only Headers.   (line  35)
+* defined:                               Defined.             (line   6)
+* dependencies for make as output:       Environment Variables.
+                                                              (line  45)
+* dependencies, make:                    Invocation.          (line 180)
+* diagnostic:                            Diagnostics.         (line   6)
+* differences from previous versions:    Differences from previous versions.
+                                                              (line   6)
+* digraphs:                              Tokenization.        (line 106)
+* directive line:                        The preprocessing language.
+                                                              (line   6)
+* directive name:                        The preprocessing language.
+                                                              (line   6)
+* directives:                            The preprocessing language.
+                                                              (line   6)
+* empty macro arguments:                 Macro Arguments.     (line  66)
+* environment variables:                 Environment Variables.
+                                                              (line   6)
+* expansion of arguments:                Argument Prescan.    (line   6)
+* FDL, GNU Free Documentation License:   GNU Free Documentation License.
+                                                              (line   6)
+* function-like macros:                  Function-like Macros.
+                                                              (line   6)
+* grouping options:                      Invocation.          (line  34)
+* guard macro:                           Once-Only Headers.   (line  35)
+* header file:                           Header Files.        (line   6)
+* header file names:                     Tokenization.        (line  85)
+* identifiers:                           Tokenization.        (line  34)
+* implementation limits:                 Implementation limits.
+                                                              (line   6)
+* implementation-defined behavior:       Implementation-defined behavior.
+                                                              (line   6)
+* including just once:                   Once-Only Headers.   (line   6)
+* invocation:                            Invocation.          (line   6)
+* iso646.h:                              C++ Named Operators. (line   6)
+* line comments:                         Initial processing.  (line  77)
+* line control:                          Line Control.        (line   6)
+* line endings:                          Initial processing.  (line  14)
+* linemarkers:                           Preprocessor Output. (line  28)
+* macro argument expansion:              Argument Prescan.    (line   6)
+* macro arguments and directives:        Directives Within Macro Arguments.
+                                                              (line   6)
+* macros in include:                     Computed Includes.   (line   6)
+* macros with arguments:                 Macro Arguments.     (line   6)
+* macros with variable arguments:        Variadic Macros.     (line   6)
+* make:                                  Invocation.          (line 180)
+* manifest constants:                    Object-like Macros.  (line   6)
+* named operators:                       C++ Named Operators. (line   6)
+* newlines in macro arguments:           Newlines in Arguments.
+                                                              (line   6)
+* null directive:                        Other Directives.    (line  15)
+* numbers:                               Tokenization.        (line  61)
+* object-like macro:                     Object-like Macros.  (line   6)
+* options:                               Invocation.          (line  38)
+* options, grouping:                     Invocation.          (line  34)
+* other tokens:                          Tokenization.        (line 120)
+* output format:                         Preprocessor Output. (line  12)
+* overriding a header file:              Wrapper Headers.     (line   6)
+* parentheses in macro bodies:           Operator Precedence Problems.
+                                                              (line   6)
+* pitfalls of macros:                    Macro Pitfalls.      (line   6)
+* predefined macros:                     Predefined Macros.   (line   6)
+* predefined macros, system-specific:    System-specific Predefined Macros.
+                                                              (line   6)
+* predicates:                            Obsolete Features.   (line  26)
+* preprocessing directives:              The preprocessing language.
+                                                              (line   6)
+* preprocessing numbers:                 Tokenization.        (line  61)
+* preprocessing tokens:                  Tokenization.        (line   6)
+* prescan of macro arguments:            Argument Prescan.    (line   6)
+* problems with macros:                  Macro Pitfalls.      (line   6)
+* punctuators:                           Tokenization.        (line 106)
+* redefining macros:                     Undefining and Redefining Macros.
+                                                              (line   6)
+* repeated inclusion:                    Once-Only Headers.   (line   6)
+* reporting errors:                      Diagnostics.         (line   6)
+* reporting warnings:                    Diagnostics.         (line   6)
+* reserved namespace:                    System-specific Predefined Macros.
+                                                              (line   6)
+* self-reference:                        Self-Referential Macros.
+                                                              (line   6)
+* semicolons (after macro calls):        Swallowing the Semicolon.
+                                                              (line   6)
+* side effects (in macro arguments):     Duplication of Side Effects.
+                                                              (line   6)
+* standard predefined macros.:           Standard Predefined Macros.
+                                                              (line   6)
+* string constants:                      Tokenization.        (line  85)
+* string literals:                       Tokenization.        (line  85)
+* stringification:                       Stringification.     (line   6)
+* symbolic constants:                    Object-like Macros.  (line   6)
+* system header files <1>:               System Headers.      (line   6)
+* system header files:                   Header Files.        (line  13)
+* system-specific predefined macros:     System-specific Predefined Macros.
+                                                              (line   6)
+* testing predicates:                    Obsolete Features.   (line  37)
+* token concatenation:                   Concatenation.       (line   6)
+* token pasting:                         Concatenation.       (line   6)
+* tokens:                                Tokenization.        (line   6)
+* trigraphs:                             Initial processing.  (line  32)
+* undefining macros:                     Undefining and Redefining Macros.
+                                                              (line   6)
+* unsafe macros:                         Duplication of Side Effects.
+                                                              (line   6)
+* variable number of arguments:          Variadic Macros.     (line   6)
+* variadic macros:                       Variadic Macros.     (line   6)
+* wrapper #ifndef:                       Once-Only Headers.   (line   6)
+* wrapper headers:                       Wrapper Headers.     (line   6)
+
+
+
+Tag Table:
+Node: Top1118
+Node: Overview3850
+Node: Character sets6683
+Ref: Character sets-Footnote-18866
+Node: Initial processing9047
+Ref: trigraphs10606
+Node: Tokenization14808
+Ref: Tokenization-Footnote-121944
+Node: The preprocessing language22055
+Node: Header Files24933
+Node: Include Syntax26849
+Node: Include Operation28486
+Node: Search Path30334
+Node: Once-Only Headers33524
+Node: Alternatives to Wrapper #ifndef35183
+Node: Computed Includes36926
+Node: Wrapper Headers40084
+Node: System Headers42510
+Node: Macros44560
+Node: Object-like Macros45701
+Node: Function-like Macros49291
+Node: Macro Arguments50907
+Node: Stringification55052
+Node: Concatenation58258
+Node: Variadic Macros61366
+Node: Predefined Macros66153
+Node: Standard Predefined Macros66741
+Node: Common Predefined Macros72678
+Node: System-specific Predefined Macros90181
+Node: C++ Named Operators92202
+Node: Undefining and Redefining Macros93166
+Node: Directives Within Macro Arguments95270
+Node: Macro Pitfalls96818
+Node: Misnesting97351
+Node: Operator Precedence Problems98463
+Node: Swallowing the Semicolon100329
+Node: Duplication of Side Effects102352
+Node: Self-Referential Macros104535
+Node: Argument Prescan106944
+Node: Newlines in Arguments110698
+Node: Conditionals111649
+Node: Conditional Uses113479
+Node: Conditional Syntax114837
+Node: Ifdef115157
+Node: If118318
+Node: Defined120622
+Node: Else121905
+Node: Elif122475
+Node: Deleted Code123764
+Node: Diagnostics125011
+Node: Line Control126628
+Node: Pragmas130432
+Node: Other Directives134749
+Node: Preprocessor Output135799
+Node: Traditional Mode139000
+Node: Traditional lexical analysis140058
+Node: Traditional macros142561
+Node: Traditional miscellany146363
+Node: Traditional warnings147360
+Node: Implementation Details149557
+Node: Implementation-defined behavior150178
+Ref: Identifier characters150930
+Node: Implementation limits154008
+Node: Obsolete Features156682
+Node: Differences from previous versions159570
+Node: Invocation163778
+Ref: Wtrigraphs168230
+Ref: dashMF173005
+Ref: fdollars-in-identifiers182716
+Node: Environment Variables190879
+Node: GNU Free Documentation License193845
+Node: Index of Directives219009
+Node: Option Index220943
+Node: Concept Index227127
+
+End Tag Table
diff --git a/gcc/doc/cpp.texi b/gcc/doc/cpp.texi
new file mode 100644
index 000000000..03cd00fa1
--- /dev/null
+++ b/gcc/doc/cpp.texi
@@ -0,0 +1,4472 @@
+\input texinfo
+@setfilename cpp.info
+@settitle The C Preprocessor
+@setchapternewpage off
+@c @smallbook
+@c @cropmarks
+@c @finalout
+
+@include gcc-common.texi
+
+@copying
+@c man begin COPYRIGHT
+Copyright @copyright{} 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996,
+1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
+2008, 2009, 2010, 2011
+Free Software Foundation, Inc.
+
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation.  A copy of
+the license is included in the
+@c man end
+section entitled ``GNU Free Documentation License''.
+@ignore
+@c man begin COPYRIGHT
+man page gfdl(7).
+@c man end
+@end ignore
+
+@c man begin COPYRIGHT
+This manual contains no Invariant Sections.  The Front-Cover Texts are
+(a) (see below), and the Back-Cover Texts are (b) (see below).
+
+(a) The FSF's Front-Cover Text is:
+
+     A GNU Manual
+
+(b) The FSF's Back-Cover Text is:
+
+     You have freedom to copy and modify this GNU Manual, like GNU
+     software.  Copies published by the Free Software Foundation raise
+     funds for GNU development.
+@c man end
+@end copying
+
+@c Create a separate index for command line options.
+@defcodeindex op
+@syncodeindex vr op
+
+@c Used in cppopts.texi and cppenv.texi.
+@set cppmanual
+
+@ifinfo
+@dircategory Software development
+@direntry
+* Cpp: (cpp).                  The GNU C preprocessor.
+@end direntry
+@end ifinfo
+
+@titlepage
+@title The C Preprocessor
+@versionsubtitle
+@author Richard M. Stallman, Zachary Weinberg
+@page
+@c There is a fill at the bottom of the page, so we need a filll to
+@c override it.
+@vskip 0pt plus 1filll
+@insertcopying
+@end titlepage
+@contents
+@page
+
+@ifnottex
+@node Top
+@top
+The C preprocessor implements the macro language used to transform C,
+C++, and Objective-C programs before they are compiled.  It can also be
+useful on its own.
+
+@menu
+* Overview::
+* Header Files::
+* Macros::
+* Conditionals::
+* Diagnostics::
+* Line Control::
+* Pragmas::
+* Other Directives::
+* Preprocessor Output::
+* Traditional Mode::
+* Implementation Details::
+* Invocation::
+* Environment Variables::
+* GNU Free Documentation License::
+* Index of Directives::
+* Option Index::
+* Concept Index::
+
+@detailmenu
+ --- The Detailed Node Listing ---
+
+Overview
+
+* Character sets::
+* Initial processing::
+* Tokenization::
+* The preprocessing language::
+
+Header Files
+
+* Include Syntax::
+* Include Operation::
+* Search Path::
+* Once-Only Headers::
+* Alternatives to Wrapper #ifndef::
+* Computed Includes::
+* Wrapper Headers::
+* System Headers::
+
+Macros
+
+* Object-like Macros::
+* Function-like Macros::
+* Macro Arguments::
+* Stringification::
+* Concatenation::
+* Variadic Macros::
+* Predefined Macros::
+* Undefining and Redefining Macros::
+* Directives Within Macro Arguments::
+* Macro Pitfalls::
+
+Predefined Macros
+
+* Standard Predefined Macros::
+* Common Predefined Macros::
+* System-specific Predefined Macros::
+* C++ Named Operators::
+
+Macro Pitfalls
+
+* Misnesting::
+* Operator Precedence Problems::
+* Swallowing the Semicolon::
+* Duplication of Side Effects::
+* Self-Referential Macros::
+* Argument Prescan::
+* Newlines in Arguments::
+
+Conditionals
+
+* Conditional Uses::
+* Conditional Syntax::
+* Deleted Code::
+
+Conditional Syntax
+
+* Ifdef::
+* If::
+* Defined::
+* Else::
+* Elif::
+
+Implementation Details
+
+* Implementation-defined behavior::
+* Implementation limits::
+* Obsolete Features::
+* Differences from previous versions::
+
+Obsolete Features
+
+* Obsolete Features::
+
+@end detailmenu
+@end menu
+
+@insertcopying
+@end ifnottex
+
+@node Overview
+@chapter Overview
+@c man begin DESCRIPTION
+The C preprocessor, often known as @dfn{cpp}, is a @dfn{macro processor}
+that is used automatically by the C compiler to transform your program
+before compilation.  It is called a macro processor because it allows
+you to define @dfn{macros}, which are brief abbreviations for longer
+constructs.
+
+The C preprocessor is intended to be used only with C, C++, and
+Objective-C source code.  In the past, it has been abused as a general
+text processor.  It will choke on input which does not obey C's lexical
+rules.  For example, apostrophes will be interpreted as the beginning of
+character constants, and cause errors.  Also, you cannot rely on it
+preserving characteristics of the input which are not significant to
+C-family languages.  If a Makefile is preprocessed, all the hard tabs
+will be removed, and the Makefile will not work.
+
+Having said that, you can often get away with using cpp on things which
+are not C@.  Other Algol-ish programming languages are often safe
+(Pascal, Ada, etc.) So is assembly, with caution.  @option{-traditional-cpp}
+mode preserves more white space, and is otherwise more permissive.  Many
+of the problems can be avoided by writing C or C++ style comments
+instead of native language comments, and keeping macros simple.
+
+Wherever possible, you should use a preprocessor geared to the language
+you are writing in.  Modern versions of the GNU assembler have macro
+facilities.  Most high level programming languages have their own
+conditional compilation and inclusion mechanism.  If all else fails,
+try a true general text processor, such as GNU M4.
+
+C preprocessors vary in some details.  This manual discusses the GNU C
+preprocessor, which provides a small superset of the features of ISO
+Standard C@.  In its default mode, the GNU C preprocessor does not do a
+few things required by the standard.  These are features which are
+rarely, if ever, used, and may cause surprising changes to the meaning
+of a program which does not expect them.  To get strict ISO Standard C,
+you should use the @option{-std=c90}, @option{-std=c99} or
+@option{-std=c1x} options, depending
+on which version of the standard you want.  To get all the mandatory
+diagnostics, you must also use @option{-pedantic}.  @xref{Invocation}.
+
+This manual describes the behavior of the ISO preprocessor.  To
+minimize gratuitous differences, where the ISO preprocessor's
+behavior does not conflict with traditional semantics, the
+traditional preprocessor should behave the same way.  The various
+differences that do exist are detailed in the section @ref{Traditional
+Mode}.
+
+For clarity, unless noted otherwise, references to @samp{CPP} in this
+manual refer to GNU CPP@.
+@c man end
+
+@menu
+* Character sets::
+* Initial processing::
+* Tokenization::
+* The preprocessing language::
+@end menu
+
+@node Character sets
+@section Character sets
+
+Source code character set processing in C and related languages is
+rather complicated.  The C standard discusses two character sets, but
+there are really at least four.
+
+The files input to CPP might be in any character set at all.  CPP's
+very first action, before it even looks for line boundaries, is to
+convert the file into the character set it uses for internal
+processing.  That set is what the C standard calls the @dfn{source}
+character set.  It must be isomorphic with ISO 10646, also known as
+Unicode.  CPP uses the UTF-8 encoding of Unicode.
+
+The character sets of the input files are specified using the
+@option{-finput-charset=} option.
+
+All preprocessing work (the subject of the rest of this manual) is
+carried out in the source character set.  If you request textual
+output from the preprocessor with the @option{-E} option, it will be
+in UTF-8.
+
+After preprocessing is complete, string and character constants are
+converted again, into the @dfn{execution} character set.  This
+character set is under control of the user; the default is UTF-8,
+matching the source character set.  Wide string and character
+constants have their own character set, which is not called out
+specifically in the standard.  Again, it is under control of the user.
+The default is UTF-16 or UTF-32, whichever fits in the target's
+@code{wchar_t} type, in the target machine's byte
+order.@footnote{UTF-16 does not meet the requirements of the C
+standard for a wide character set, but the choice of 16-bit
+@code{wchar_t} is enshrined in some system ABIs so we cannot fix
+this.}  Octal and hexadecimal escape sequences do not undergo
+conversion; @t{'\x12'} has the value 0x12 regardless of the currently
+selected execution character set.  All other escapes are replaced by
+the character in the source character set that they represent, then
+converted to the execution character set, just like unescaped
+characters.
+
+Unless the experimental @option{-fextended-identifiers} option is used,
+GCC does not permit the use of characters outside the ASCII range, nor
+@samp{\u} and @samp{\U} escapes, in identifiers.  Even with that
+option, characters outside the ASCII range can only be specified with
+the @samp{\u} and @samp{\U} escapes, not used directly in identifiers.
+
+@node Initial processing
+@section Initial processing
+
+The preprocessor performs a series of textual transformations on its
+input.  These happen before all other processing.  Conceptually, they
+happen in a rigid order, and the entire file is run through each
+transformation before the next one begins.  CPP actually does them
+all at once, for performance reasons.  These transformations correspond
+roughly to the first three ``phases of translation'' described in the C
+standard.
+
+@enumerate
+@item
+@cindex line endings
+The input file is read into memory and broken into lines.
+
+Different systems use different conventions to indicate the end of a
+line.  GCC accepts the ASCII control sequences @kbd{LF}, @kbd{@w{CR
+LF}} and @kbd{CR} as end-of-line markers.  These are the canonical
+sequences used by Unix, DOS and VMS, and the classic Mac OS (before
+OSX) respectively.  You may therefore safely copy source code written
+on any of those systems to a different one and use it without
+conversion.  (GCC may lose track of the current line number if a file
+doesn't consistently use one convention, as sometimes happens when it
+is edited on computers with different conventions that share a network
+file system.)
+
+If the last line of any input file lacks an end-of-line marker, the end
+of the file is considered to implicitly supply one.  The C standard says
+that this condition provokes undefined behavior, so GCC will emit a
+warning message.
+
+@item
+@cindex trigraphs
+@anchor{trigraphs}If trigraphs are enabled, they are replaced by their
+corresponding single characters.  By default GCC ignores trigraphs,
+but if you request a strictly conforming mode with the @option{-std}
+option, or you specify the @option{-trigraphs} option, then it
+converts them.
+
+These are nine three-character sequences, all starting with @samp{??},
+that are defined by ISO C to stand for single characters.  They permit
+obsolete systems that lack some of C's punctuation to use C@.  For
+example, @samp{??/} stands for @samp{\}, so @t{'??/n'} is a character
+constant for a newline.
+
+Trigraphs are not popular and many compilers implement them
+incorrectly.  Portable code should not rely on trigraphs being either
+converted or ignored.  With @option{-Wtrigraphs} GCC will warn you
+when a trigraph may change the meaning of your program if it were
+converted.  @xref{Wtrigraphs}.
+
+In a string constant, you can prevent a sequence of question marks
+from being confused with a trigraph by inserting a backslash between
+the question marks, or by separating the string literal at the
+trigraph and making use of string literal concatenation.  @t{"(??\?)"}
+is the string @samp{(???)}, not @samp{(?]}.  Traditional C compilers
+do not recognize these idioms.
+
+The nine trigraphs and their replacements are
+
+@smallexample
+Trigraph:       ??(  ??)  ??<  ??>  ??=  ??/  ??'  ??!  ??-
+Replacement:      [    ]    @{    @}    #    \    ^    |    ~
+@end smallexample
+
+@item
+@cindex continued lines
+@cindex backslash-newline
+Continued lines are merged into one long line.
+
+A continued line is a line which ends with a backslash, @samp{\}.  The
+backslash is removed and the following line is joined with the current
+one.  No space is inserted, so you may split a line anywhere, even in
+the middle of a word.  (It is generally more readable to split lines
+only at white space.)
+
+The trailing backslash on a continued line is commonly referred to as a
+@dfn{backslash-newline}.
+
+If there is white space between a backslash and the end of a line, that
+is still a continued line.  However, as this is usually the result of an
+editing mistake, and many compilers will not accept it as a continued
+line, GCC will warn you about it.
+
+@item
+@cindex comments
+@cindex line comments
+@cindex block comments
+All comments are replaced with single spaces.
+
+There are two kinds of comments.  @dfn{Block comments} begin with
+@samp{/*} and continue until the next @samp{*/}.  Block comments do not
+nest:
+
+@smallexample
+/* @r{this is} /* @r{one comment} */ @r{text outside comment}
+@end smallexample
+
+@dfn{Line comments} begin with @samp{//} and continue to the end of the
+current line.  Line comments do not nest either, but it does not matter,
+because they would end in the same place anyway.
+
+@smallexample
+// @r{this is} // @r{one comment}
+@r{text outside comment}
+@end smallexample
+@end enumerate
+
+It is safe to put line comments inside block comments, or vice versa.
+
+@smallexample
+@group
+/* @r{block comment}
+   // @r{contains line comment}
+   @r{yet more comment}
+ */ @r{outside comment}
+
+// @r{line comment} /* @r{contains block comment} */
+@end group
+@end smallexample
+
+But beware of commenting out one end of a block comment with a line
+comment.
+
+@smallexample
+@group
+ // @r{l.c.}  /* @r{block comment begins}
+    @r{oops! this isn't a comment anymore} */
+@end group
+@end smallexample
+
+Comments are not recognized within string literals.
+@t{@w{"/* blah */"}} is the string constant @samp{@w{/* blah */}}, not
+an empty string.
+
+Line comments are not in the 1989 edition of the C standard, but they
+are recognized by GCC as an extension.  In C++ and in the 1999 edition
+of the C standard, they are an official part of the language.
+
+Since these transformations happen before all other processing, you can
+split a line mechanically with backslash-newline anywhere.  You can
+comment out the end of a line.  You can continue a line comment onto the
+next line with backslash-newline.  You can even split @samp{/*},
+@samp{*/}, and @samp{//} onto multiple lines with backslash-newline.
+For example:
+
+@smallexample
+@group
+/\
+*
+*/ # /*
+*/ defi\
+ne FO\
+O 10\
+20
+@end group
+@end smallexample
+
+@noindent
+is equivalent to @code{@w{#define FOO 1020}}.  All these tricks are
+extremely confusing and should not be used in code intended to be
+readable.
+
+There is no way to prevent a backslash at the end of a line from being
+interpreted as a backslash-newline.  This cannot affect any correct
+program, however.
+
+@node Tokenization
+@section Tokenization
+
+@cindex tokens
+@cindex preprocessing tokens
+After the textual transformations are finished, the input file is
+converted into a sequence of @dfn{preprocessing tokens}.  These mostly
+correspond to the syntactic tokens used by the C compiler, but there are
+a few differences.  White space separates tokens; it is not itself a
+token of any kind.  Tokens do not have to be separated by white space,
+but it is often necessary to avoid ambiguities.
+
+When faced with a sequence of characters that has more than one possible
+tokenization, the preprocessor is greedy.  It always makes each token,
+starting from the left, as big as possible before moving on to the next
+token.  For instance, @code{a+++++b} is interpreted as
+@code{@w{a ++ ++ + b}}, not as @code{@w{a ++ + ++ b}}, even though the
+latter tokenization could be part of a valid C program and the former
+could not.
+
+Once the input file is broken into tokens, the token boundaries never
+change, except when the @samp{##} preprocessing operator is used to paste
+tokens together.  @xref{Concatenation}.  For example,
+
+@smallexample
+@group
+#define foo() bar
+foo()baz
+     @expansion{} bar baz
+@emph{not}
+     @expansion{} barbaz
+@end group
+@end smallexample
+
+The compiler does not re-tokenize the preprocessor's output.  Each
+preprocessing token becomes one compiler token.
+
+@cindex identifiers
+Preprocessing tokens fall into five broad classes: identifiers,
+preprocessing numbers, string literals, punctuators, and other.  An
+@dfn{identifier} is the same as an identifier in C: any sequence of
+letters, digits, or underscores, which begins with a letter or
+underscore.  Keywords of C have no significance to the preprocessor;
+they are ordinary identifiers.  You can define a macro whose name is a
+keyword, for instance.  The only identifier which can be considered a
+preprocessing keyword is @code{defined}.  @xref{Defined}.
+
+This is mostly true of other languages which use the C preprocessor.
+However, a few of the keywords of C++ are significant even in the
+preprocessor.  @xref{C++ Named Operators}.
+
+In the 1999 C standard, identifiers may contain letters which are not
+part of the ``basic source character set'', at the implementation's
+discretion (such as accented Latin letters, Greek letters, or Chinese
+ideograms).  This may be done with an extended character set, or the
+@samp{\u} and @samp{\U} escape sequences.  The implementation of this
+feature in GCC is experimental; such characters are only accepted in
+the @samp{\u} and @samp{\U} forms and only if
+@option{-fextended-identifiers} is used.
+
+As an extension, GCC treats @samp{$} as a letter.  This is for
+compatibility with some systems, such as VMS, where @samp{$} is commonly
+used in system-defined function and object names.  @samp{$} is not a
+letter in strictly conforming mode, or if you specify the @option{-$}
+option.  @xref{Invocation}.
+
+@cindex numbers
+@cindex preprocessing numbers
+A @dfn{preprocessing number} has a rather bizarre definition.  The
+category includes all the normal integer and floating point constants
+one expects of C, but also a number of other things one might not
+initially recognize as a number.  Formally, preprocessing numbers begin
+with an optional period, a required decimal digit, and then continue
+with any sequence of letters, digits, underscores, periods, and
+exponents.  Exponents are the two-character sequences @samp{e+},
+@samp{e-}, @samp{E+}, @samp{E-}, @samp{p+}, @samp{p-}, @samp{P+}, and
+@samp{P-}.  (The exponents that begin with @samp{p} or @samp{P} are new
+to C99.  They are used for hexadecimal floating-point constants.)
+
+The purpose of this unusual definition is to isolate the preprocessor
+from the full complexity of numeric constants.  It does not have to
+distinguish between lexically valid and invalid floating-point numbers,
+which is complicated.  The definition also permits you to split an
+identifier at any position and get exactly two tokens, which can then be
+pasted back together with the @samp{##} operator.
+
+It's possible for preprocessing numbers to cause programs to be
+misinterpreted.  For example, @code{0xE+12} is a preprocessing number
+which does not translate to any valid numeric constant, therefore a
+syntax error.  It does not mean @code{@w{0xE + 12}}, which is what you
+might have intended.
+
+@cindex string literals
+@cindex string constants
+@cindex character constants
+@cindex header file names
+@c the @: prevents makeinfo from turning '' into ".
+@dfn{String literals} are string constants, character constants, and
+header file names (the argument of @samp{#include}).@footnote{The C
+standard uses the term @dfn{string literal} to refer only to what we are
+calling @dfn{string constants}.}  String constants and character
+constants are straightforward: @t{"@dots{}"} or @t{'@dots{}'}.  In
+either case embedded quotes should be escaped with a backslash:
+@t{'\'@:'} is the character constant for @samp{'}.  There is no limit on
+the length of a character constant, but the value of a character
+constant that contains more than one character is
+implementation-defined.  @xref{Implementation Details}.
+
+Header file names either look like string constants, @t{"@dots{}"}, or are
+written with angle brackets instead, @t{<@dots{}>}.  In either case,
+backslash is an ordinary character.  There is no way to escape the
+closing quote or angle bracket.  The preprocessor looks for the header
+file in different places depending on which form you use.  @xref{Include
+Operation}.
+
+No string literal may extend past the end of a line.  Older versions
+of GCC accepted multi-line string constants.  You may use continued
+lines instead, or string constant concatenation.  @xref{Differences
+from previous versions}.
+
+@cindex punctuators
+@cindex digraphs
+@cindex alternative tokens
+@dfn{Punctuators} are all the usual bits of punctuation which are
+meaningful to C and C++.  All but three of the punctuation characters in
+ASCII are C punctuators.  The exceptions are @samp{@@}, @samp{$}, and
+@samp{`}.  In addition, all the two- and three-character operators are
+punctuators.  There are also six @dfn{digraphs}, which the C++ standard
+calls @dfn{alternative tokens}, which are merely alternate ways to spell
+other punctuators.  This is a second attempt to work around missing
+punctuation in obsolete systems.  It has no negative side effects,
+unlike trigraphs, but does not cover as much ground.  The digraphs and
+their corresponding normal punctuators are:
+
+@smallexample
+Digraph:        <%  %>  <:  :>  %:  %:%:
+Punctuator:      @{   @}   [   ]   #    ##
+@end smallexample
+
+@cindex other tokens
+Any other single character is considered ``other''.  It is passed on to
+the preprocessor's output unmolested.  The C compiler will almost
+certainly reject source code containing ``other'' tokens.  In ASCII, the
+only other characters are @samp{@@}, @samp{$}, @samp{`}, and control
+characters other than NUL (all bits zero).  (Note that @samp{$} is
+normally considered a letter.)  All characters with the high bit set
+(numeric range 0x7F--0xFF) are also ``other'' in the present
+implementation.  This will change when proper support for international
+character sets is added to GCC@.
+
+NUL is a special case because of the high probability that its
+appearance is accidental, and because it may be invisible to the user
+(many terminals do not display NUL at all).  Within comments, NULs are
+silently ignored, just as any other character would be.  In running
+text, NUL is considered white space.  For example, these two directives
+have the same meaning.
+
+@smallexample
+#define X^@@1
+#define X 1
+@end smallexample
+
+@noindent
+(where @samp{^@@} is ASCII NUL)@.  Within string or character constants,
+NULs are preserved.  In the latter two cases the preprocessor emits a
+warning message.
+
+@node The preprocessing language
+@section The preprocessing language
+@cindex directives
+@cindex preprocessing directives
+@cindex directive line
+@cindex directive name
+
+After tokenization, the stream of tokens may simply be passed straight
+to the compiler's parser.  However, if it contains any operations in the
+@dfn{preprocessing language}, it will be transformed first.  This stage
+corresponds roughly to the standard's ``translation phase 4'' and is
+what most people think of as the preprocessor's job.
+
+The preprocessing language consists of @dfn{directives} to be executed
+and @dfn{macros} to be expanded.  Its primary capabilities are:
+
+@itemize @bullet
+@item
+Inclusion of header files.  These are files of declarations that can be
+substituted into your program.
+
+@item
+Macro expansion.  You can define @dfn{macros}, which are abbreviations
+for arbitrary fragments of C code.  The preprocessor will replace the
+macros with their definitions throughout the program.  Some macros are
+automatically defined for you.
+
+@item
+Conditional compilation.  You can include or exclude parts of the
+program according to various conditions.
+
+@item
+Line control.  If you use a program to combine or rearrange source files
+into an intermediate file which is then compiled, you can use line
+control to inform the compiler where each source line originally came
+from.
+
+@item
+Diagnostics.  You can detect problems at compile time and issue errors
+or warnings.
+@end itemize
+
+There are a few more, less useful, features.
+
+Except for expansion of predefined macros, all these operations are
+triggered with @dfn{preprocessing directives}.  Preprocessing directives
+are lines in your program that start with @samp{#}.  Whitespace is
+allowed before and after the @samp{#}.  The @samp{#} is followed by an
+identifier, the @dfn{directive name}.  It specifies the operation to
+perform.  Directives are commonly referred to as @samp{#@var{name}}
+where @var{name} is the directive name.  For example, @samp{#define} is
+the directive that defines a macro.
+
+The @samp{#} which begins a directive cannot come from a macro
+expansion.  Also, the directive name is not macro expanded.  Thus, if
+@code{foo} is defined as a macro expanding to @code{define}, that does
+not make @samp{#foo} a valid preprocessing directive.
+
+The set of valid directive names is fixed.  Programs cannot define new
+preprocessing directives.
+
+Some directives require arguments; these make up the rest of the
+directive line and must be separated from the directive name by
+whitespace.  For example, @samp{#define} must be followed by a macro
+name and the intended expansion of the macro.
+
+A preprocessing directive cannot cover more than one line.  The line
+may, however, be continued with backslash-newline, or by a block comment
+which extends past the end of the line.  In either case, when the
+directive is processed, the continuations have already been merged with
+the first line to make one long line.
+
+@node Header Files
+@chapter Header Files
+
+@cindex header file
+A header file is a file containing C declarations and macro definitions
+(@pxref{Macros}) to be shared between several source files.  You request
+the use of a header file in your program by @dfn{including} it, with the
+C preprocessing directive @samp{#include}.
+
+Header files serve two purposes.
+
+@itemize @bullet
+@item
+@cindex system header files
+System header files declare the interfaces to parts of the operating
+system.  You include them in your program to supply the definitions and
+declarations you need to invoke system calls and libraries.
+
+@item
+Your own header files contain declarations for interfaces between the
+source files of your program.  Each time you have a group of related
+declarations and macro definitions all or most of which are needed in
+several different source files, it is a good idea to create a header
+file for them.
+@end itemize
+
+Including a header file produces the same results as copying the header
+file into each source file that needs it.  Such copying would be
+time-consuming and error-prone.  With a header file, the related
+declarations appear in only one place.  If they need to be changed, they
+can be changed in one place, and programs that include the header file
+will automatically use the new version when next recompiled.  The header
+file eliminates the labor of finding and changing all the copies as well
+as the risk that a failure to find one copy will result in
+inconsistencies within a program.
+
+In C, the usual convention is to give header files names that end with
+@file{.h}.  It is most portable to use only letters, digits, dashes, and
+underscores in header file names, and at most one dot.
+
+@menu
+* Include Syntax::
+* Include Operation::
+* Search Path::
+* Once-Only Headers::
+* Alternatives to Wrapper #ifndef::
+* Computed Includes::
+* Wrapper Headers::
+* System Headers::
+@end menu
+
+@node Include Syntax
+@section Include Syntax
+
+@findex #include
+Both user and system header files are included using the preprocessing
+directive @samp{#include}.  It has two variants:
+
+@table @code
+@item #include <@var{file}>
+This variant is used for system header files.  It searches for a file
+named @var{file} in a standard list of system directories.  You can prepend
+directories to this list with the @option{-I} option (@pxref{Invocation}).
+
+@item #include "@var{file}"
+This variant is used for header files of your own program.  It
+searches for a file named @var{file} first in the directory containing
+the current file, then in the quote directories and then the same
+directories used for @code{<@var{file}>}.  You can prepend directories
+to the list of quote directories with the @option{-iquote} option.
+@end table
+
+The argument of @samp{#include}, whether delimited with quote marks or
+angle brackets, behaves like a string constant in that comments are not
+recognized, and macro names are not expanded.  Thus, @code{@w{#include
+<x/*y>}} specifies inclusion of a system header file named @file{x/*y}.
+
+However, if backslashes occur within @var{file}, they are considered
+ordinary text characters, not escape characters.  None of the character
+escape sequences appropriate to string constants in C are processed.
+Thus, @code{@w{#include "x\n\\y"}} specifies a filename containing three
+backslashes.  (Some systems interpret @samp{\} as a pathname separator.
+All of these also interpret @samp{/} the same way.  It is most portable
+to use only @samp{/}.)
+
+It is an error if there is anything (other than comments) on the line
+after the file name.
+
+@node Include Operation
+@section Include Operation
+
+The @samp{#include} directive works by directing the C preprocessor to
+scan the specified file as input before continuing with the rest of the
+current file.  The output from the preprocessor contains the output
+already generated, followed by the output resulting from the included
+file, followed by the output that comes from the text after the
+@samp{#include} directive.  For example, if you have a header file
+@file{header.h} as follows,
+
+@smallexample
+char *test (void);
+@end smallexample
+
+@noindent
+and a main program called @file{program.c} that uses the header file,
+like this,
+
+@smallexample
+int x;
+#include "header.h"
+
+int
+main (void)
+@{
+  puts (test ());
+@}
+@end smallexample
+
+@noindent
+the compiler will see the same token stream as it would if
+@file{program.c} read
+
+@smallexample
+int x;
+char *test (void);
+
+int
+main (void)
+@{
+  puts (test ());
+@}
+@end smallexample
+
+Included files are not limited to declarations and macro definitions;
+those are merely the typical uses.  Any fragment of a C program can be
+included from another file.  The include file could even contain the
+beginning of a statement that is concluded in the containing file, or
+the end of a statement that was started in the including file.  However,
+an included file must consist of complete tokens.  Comments and string
+literals which have not been closed by the end of an included file are
+invalid.  For error recovery, they are considered to end at the end of
+the file.
+
+To avoid confusion, it is best if header files contain only complete
+syntactic units---function declarations or definitions, type
+declarations, etc.
+
+The line following the @samp{#include} directive is always treated as a
+separate line by the C preprocessor, even if the included file lacks a
+final newline.
+
+@node Search Path
+@section Search Path
+
+GCC looks in several different places for headers.  On a normal Unix
+system, if you do not instruct it otherwise, it will look for headers
+requested with @code{@w{#include <@var{file}>}} in:
+
+@smallexample
+/usr/local/include
+@var{libdir}/gcc/@var{target}/@var{version}/include
+/usr/@var{target}/include
+/usr/include
+@end smallexample
+
+For C++ programs, it will also look in @file{/usr/include/g++-v3},
+first.  In the above, @var{target} is the canonical name of the system
+GCC was configured to compile code for; often but not always the same as
+the canonical name of the system it runs on.  @var{version} is the
+version of GCC in use.
+
+You can add to this list with the @option{-I@var{dir}} command line
+option.  All the directories named by @option{-I} are searched, in
+left-to-right order, @emph{before} the default directories.  The only
+exception is when @file{dir} is already searched by default.  In
+this case, the option is ignored and the search order for system
+directories remains unchanged.
+
+Duplicate directories are removed from the quote and bracket search
+chains before the two chains are merged to make the final search chain.
+Thus, it is possible for a directory to occur twice in the final search
+chain if it was specified in both the quote and bracket chains.
+
+You can prevent GCC from searching any of the default directories with
+the @option{-nostdinc} option.  This is useful when you are compiling an
+operating system kernel or some other program that does not use the
+standard C library facilities, or the standard C library itself.
+@option{-I} options are not ignored as described above when
+@option{-nostdinc} is in effect.
+
+GCC looks for headers requested with @code{@w{#include "@var{file}"}}
+first in the directory containing the current file, then in the
+directories as specified by @option{-iquote} options, then in the same
+places it would have looked for a header requested with angle
+brackets.  For example, if @file{/usr/include/sys/stat.h} contains
+@code{@w{#include "types.h"}}, GCC looks for @file{types.h} first in
+@file{/usr/include/sys}, then in its usual search path.
+
+@samp{#line} (@pxref{Line Control}) does not change GCC's idea of the
+directory containing the current file.
+
+You may put @option{-I-} at any point in your list of @option{-I} options.
+This has two effects.  First, directories appearing before the
+@option{-I-} in the list are searched only for headers requested with
+quote marks.  Directories after @option{-I-} are searched for all
+headers.  Second, the directory containing the current file is not
+searched for anything, unless it happens to be one of the directories
+named by an @option{-I} switch.  @option{-I-} is deprecated, @option{-iquote}
+should be used instead.
+
+@option{-I. -I-} is not the same as no @option{-I} options at all, and does
+not cause the same behavior for @samp{<>} includes that @samp{""}
+includes get with no special options.  @option{-I.} searches the
+compiler's current working directory for header files.  That may or may
+not be the same as the directory containing the current file.
+
+If you need to look for headers in a directory named @file{-}, write
+@option{-I./-}.
+
+There are several more ways to adjust the header search path.  They are
+generally less useful.  @xref{Invocation}.
+
+@node Once-Only Headers
+@section Once-Only Headers
+@cindex repeated inclusion
+@cindex including just once
+@cindex wrapper @code{#ifndef}
+
+If a header file happens to be included twice, the compiler will process
+its contents twice.  This is very likely to cause an error, e.g.@: when the
+compiler sees the same structure definition twice.  Even if it does not,
+it will certainly waste time.
+
+The standard way to prevent this is to enclose the entire real contents
+of the file in a conditional, like this:
+
+@smallexample
+@group
+/* File foo.  */
+#ifndef FILE_FOO_SEEN
+#define FILE_FOO_SEEN
+
+@var{the entire file}
+
+#endif /* !FILE_FOO_SEEN */
+@end group
+@end smallexample
+
+This construct is commonly known as a @dfn{wrapper #ifndef}.
+When the header is included again, the conditional will be false,
+because @code{FILE_FOO_SEEN} is defined.  The preprocessor will skip
+over the entire contents of the file, and the compiler will not see it
+twice.
+
+CPP optimizes even further.  It remembers when a header file has a
+wrapper @samp{#ifndef}.  If a subsequent @samp{#include} specifies that
+header, and the macro in the @samp{#ifndef} is still defined, it does
+not bother to rescan the file at all.
+
+You can put comments outside the wrapper.  They will not interfere with
+this optimization.
+
+@cindex controlling macro
+@cindex guard macro
+The macro @code{FILE_FOO_SEEN} is called the @dfn{controlling macro} or
+@dfn{guard macro}.  In a user header file, the macro name should not
+begin with @samp{_}.  In a system header file, it should begin with
+@samp{__} to avoid conflicts with user programs.  In any kind of header
+file, the macro name should contain the name of the file and some
+additional text, to avoid conflicts with other header files.
+
+@node Alternatives to Wrapper #ifndef
+@section Alternatives to Wrapper #ifndef
+
+CPP supports two more ways of indicating that a header file should be
+read only once.  Neither one is as portable as a wrapper @samp{#ifndef}
+and we recommend you do not use them in new programs, with the caveat
+that @samp{#import} is standard practice in Objective-C.
+
+@findex #import
+CPP supports a variant of @samp{#include} called @samp{#import} which
+includes a file, but does so at most once.  If you use @samp{#import}
+instead of @samp{#include}, then you don't need the conditionals
+inside the header file to prevent multiple inclusion of the contents.
+@samp{#import} is standard in Objective-C, but is considered a
+deprecated extension in C and C++.
+
+@samp{#import} is not a well designed feature.  It requires the users of
+a header file to know that it should only be included once.  It is much
+better for the header file's implementor to write the file so that users
+don't need to know this.  Using a wrapper @samp{#ifndef} accomplishes
+this goal.
+
+In the present implementation, a single use of @samp{#import} will
+prevent the file from ever being read again, by either @samp{#import} or
+@samp{#include}.  You should not rely on this; do not use both
+@samp{#import} and @samp{#include} to refer to the same header file.
+
+Another way to prevent a header file from being included more than once
+is with the @samp{#pragma once} directive.  If @samp{#pragma once} is
+seen when scanning a header file, that file will never be read again, no
+matter what.
+
+@samp{#pragma once} does not have the problems that @samp{#import} does,
+but it is not recognized by all preprocessors, so you cannot rely on it
+in a portable program.
+
+@node Computed Includes
+@section Computed Includes
+@cindex computed includes
+@cindex macros in include
+
+Sometimes it is necessary to select one of several different header
+files to be included into your program.  They might specify
+configuration parameters to be used on different sorts of operating
+systems, for instance.  You could do this with a series of conditionals,
+
+@smallexample
+#if SYSTEM_1
+# include "system_1.h"
+#elif SYSTEM_2
+# include "system_2.h"
+#elif SYSTEM_3
+@dots{}
+#endif
+@end smallexample
+
+That rapidly becomes tedious.  Instead, the preprocessor offers the
+ability to use a macro for the header name.  This is called a
+@dfn{computed include}.  Instead of writing a header name as the direct
+argument of @samp{#include}, you simply put a macro name there instead:
+
+@smallexample
+#define SYSTEM_H "system_1.h"
+@dots{}
+#include SYSTEM_H
+@end smallexample
+
+@noindent
+@code{SYSTEM_H} will be expanded, and the preprocessor will look for
+@file{system_1.h} as if the @samp{#include} had been written that way
+originally.  @code{SYSTEM_H} could be defined by your Makefile with a
+@option{-D} option.
+
+You must be careful when you define the macro.  @samp{#define} saves
+tokens, not text.  The preprocessor has no way of knowing that the macro
+will be used as the argument of @samp{#include}, so it generates
+ordinary tokens, not a header name.  This is unlikely to cause problems
+if you use double-quote includes, which are close enough to string
+constants.  If you use angle brackets, however, you may have trouble.
+
+The syntax of a computed include is actually a bit more general than the
+above.  If the first non-whitespace character after @samp{#include} is
+not @samp{"} or @samp{<}, then the entire line is macro-expanded
+like running text would be.
+
+If the line expands to a single string constant, the contents of that
+string constant are the file to be included.  CPP does not re-examine the
+string for embedded quotes, but neither does it process backslash
+escapes in the string.  Therefore
+
+@smallexample
+#define HEADER "a\"b"
+#include HEADER
+@end smallexample
+
+@noindent
+looks for a file named @file{a\"b}.  CPP searches for the file according
+to the rules for double-quoted includes.
+
+If the line expands to a token stream beginning with a @samp{<} token
+and including a @samp{>} token, then the tokens between the @samp{<} and
+the first @samp{>} are combined to form the filename to be included.
+Any whitespace between tokens is reduced to a single space; then any
+space after the initial @samp{<} is retained, but a trailing space
+before the closing @samp{>} is ignored.  CPP searches for the file
+according to the rules for angle-bracket includes.
+
+In either case, if there are any tokens on the line after the file name,
+an error occurs and the directive is not processed.  It is also an error
+if the result of expansion does not match either of the two expected
+forms.
+
+These rules are implementation-defined behavior according to the C
+standard.  To minimize the risk of different compilers interpreting your
+computed includes differently, we recommend you use only a single
+object-like macro which expands to a string constant.  This will also
+minimize confusion for people reading your program.
+
+@node Wrapper Headers
+@section Wrapper Headers
+@cindex wrapper headers
+@cindex overriding a header file
+@findex #include_next
+
+Sometimes it is necessary to adjust the contents of a system-provided
+header file without editing it directly.  GCC's @command{fixincludes}
+operation does this, for example.  One way to do that would be to create
+a new header file with the same name and insert it in the search path
+before the original header.  That works fine as long as you're willing
+to replace the old header entirely.  But what if you want to refer to
+the old header from the new one?
+
+You cannot simply include the old header with @samp{#include}.  That
+will start from the beginning, and find your new header again.  If your
+header is not protected from multiple inclusion (@pxref{Once-Only
+Headers}), it will recurse infinitely and cause a fatal error.
+
+You could include the old header with an absolute pathname:
+@smallexample
+#include "/usr/include/old-header.h"
+@end smallexample
+@noindent
+This works, but is not clean; should the system headers ever move, you
+would have to edit the new headers to match.
+
+There is no way to solve this problem within the C standard, but you can
+use the GNU extension @samp{#include_next}.  It means, ``Include the
+@emph{next} file with this name''.  This directive works like
+@samp{#include} except in searching for the specified file: it starts
+searching the list of header file directories @emph{after} the directory
+in which the current file was found.
+
+Suppose you specify @option{-I /usr/local/include}, and the list of
+directories to search also includes @file{/usr/include}; and suppose
+both directories contain @file{signal.h}.  Ordinary @code{@w{#include
+<signal.h>}} finds the file under @file{/usr/local/include}.  If that
+file contains @code{@w{#include_next <signal.h>}}, it starts searching
+after that directory, and finds the file in @file{/usr/include}.
+
+@samp{#include_next} does not distinguish between @code{<@var{file}>}
+and @code{"@var{file}"} inclusion, nor does it check that the file you
+specify has the same name as the current file.  It simply looks for the
+file named, starting with the directory in the search path after the one
+where the current file was found.
+
+The use of @samp{#include_next} can lead to great confusion.  We
+recommend it be used only when there is no other alternative.  In
+particular, it should not be used in the headers belonging to a specific
+program; it should be used only to make global corrections along the
+lines of @command{fixincludes}.
+
+@node System Headers
+@section System Headers
+@cindex system header files
+
+The header files declaring interfaces to the operating system and
+runtime libraries often cannot be written in strictly conforming C@.
+Therefore, GCC gives code found in @dfn{system headers} special
+treatment.  All warnings, other than those generated by @samp{#warning}
+(@pxref{Diagnostics}), are suppressed while GCC is processing a system
+header.  Macros defined in a system header are immune to a few warnings
+wherever they are expanded.  This immunity is granted on an ad-hoc
+basis, when we find that a warning generates lots of false positives
+because of code in macros defined in system headers.
+
+Normally, only the headers found in specific directories are considered
+system headers.  These directories are determined when GCC is compiled.
+There are, however, two ways to make normal headers into system headers.
+
+The @option{-isystem} command line option adds its argument to the list of
+directories to search for headers, just like @option{-I}.  Any headers
+found in that directory will be considered system headers.
+
+All directories named by @option{-isystem} are searched @emph{after} all
+directories named by @option{-I}, no matter what their order was on the
+command line.  If the same directory is named by both @option{-I} and
+@option{-isystem}, the @option{-I} option is ignored.  GCC provides an
+informative message when this occurs if @option{-v} is used.
+
+@findex #pragma GCC system_header
+There is also a directive, @code{@w{#pragma GCC system_header}}, which
+tells GCC to consider the rest of the current include file a system
+header, no matter where it was found.  Code that comes before the
+@samp{#pragma} in the file will not be affected.  @code{@w{#pragma GCC
+system_header}} has no effect in the primary source file.
+
+On very old systems, some of the pre-defined system header directories
+get even more special treatment.  GNU C++ considers code in headers
+found in those directories to be surrounded by an @code{@w{extern "C"}}
+block.  There is no way to request this behavior with a @samp{#pragma},
+or from the command line.
+
+@node Macros
+@chapter Macros
+
+A @dfn{macro} is a fragment of code which has been given a name.
+Whenever the name is used, it is replaced by the contents of the macro.
+There are two kinds of macros.  They differ mostly in what they look
+like when they are used.  @dfn{Object-like} macros resemble data objects
+when used, @dfn{function-like} macros resemble function calls.
+
+You may define any valid identifier as a macro, even if it is a C
+keyword.  The preprocessor does not know anything about keywords.  This
+can be useful if you wish to hide a keyword such as @code{const} from an
+older compiler that does not understand it.  However, the preprocessor
+operator @code{defined} (@pxref{Defined}) can never be defined as a
+macro, and C++'s named operators (@pxref{C++ Named Operators}) cannot be
+macros when you are compiling C++.
+
+@menu
+* Object-like Macros::
+* Function-like Macros::
+* Macro Arguments::
+* Stringification::
+* Concatenation::
+* Variadic Macros::
+* Predefined Macros::
+* Undefining and Redefining Macros::
+* Directives Within Macro Arguments::
+* Macro Pitfalls::
+@end menu
+
+@node Object-like Macros
+@section Object-like Macros
+@cindex object-like macro
+@cindex symbolic constants
+@cindex manifest constants
+
+An @dfn{object-like macro} is a simple identifier which will be replaced
+by a code fragment.  It is called object-like because it looks like a
+data object in code that uses it.  They are most commonly used to give
+symbolic names to numeric constants.
+
+@findex #define
+You create macros with the @samp{#define} directive.  @samp{#define} is
+followed by the name of the macro and then the token sequence it should
+be an abbreviation for, which is variously referred to as the macro's
+@dfn{body}, @dfn{expansion} or @dfn{replacement list}.  For example,
+
+@smallexample
+#define BUFFER_SIZE 1024
+@end smallexample
+
+@noindent
+defines a macro named @code{BUFFER_SIZE} as an abbreviation for the
+token @code{1024}.  If somewhere after this @samp{#define} directive
+there comes a C statement of the form
+
+@smallexample
+foo = (char *) malloc (BUFFER_SIZE);
+@end smallexample
+
+@noindent
+then the C preprocessor will recognize and @dfn{expand} the macro
+@code{BUFFER_SIZE}.  The C compiler will see the same tokens as it would
+if you had written
+
+@smallexample
+foo = (char *) malloc (1024);
+@end smallexample
+
+By convention, macro names are written in uppercase.  Programs are
+easier to read when it is possible to tell at a glance which names are
+macros.
+
+The macro's body ends at the end of the @samp{#define} line.  You may
+continue the definition onto multiple lines, if necessary, using
+backslash-newline.  When the macro is expanded, however, it will all
+come out on one line.  For example,
+
+@smallexample
+#define NUMBERS 1, \
+                2, \
+                3
+int x[] = @{ NUMBERS @};
+     @expansion{} int x[] = @{ 1, 2, 3 @};
+@end smallexample
+
+@noindent
+The most common visible consequence of this is surprising line numbers
+in error messages.
+
+There is no restriction on what can go in a macro body provided it
+decomposes into valid preprocessing tokens.  Parentheses need not
+balance, and the body need not resemble valid C code.  (If it does not,
+you may get error messages from the C compiler when you use the macro.)
+
+The C preprocessor scans your program sequentially.  Macro definitions
+take effect at the place you write them.  Therefore, the following input
+to the C preprocessor
+
+@smallexample
+foo = X;
+#define X 4
+bar = X;
+@end smallexample
+
+@noindent
+produces
+
+@smallexample
+foo = X;
+bar = 4;
+@end smallexample
+
+When the preprocessor expands a macro name, the macro's expansion
+replaces the macro invocation, then the expansion is examined for more
+macros to expand.  For example,
+
+@smallexample
+@group
+#define TABLESIZE BUFSIZE
+#define BUFSIZE 1024
+TABLESIZE
+     @expansion{} BUFSIZE
+     @expansion{} 1024
+@end group
+@end smallexample
+
+@noindent
+@code{TABLESIZE} is expanded first to produce @code{BUFSIZE}, then that
+macro is expanded to produce the final result, @code{1024}.
+
+Notice that @code{BUFSIZE} was not defined when @code{TABLESIZE} was
+defined.  The @samp{#define} for @code{TABLESIZE} uses exactly the
+expansion you specify---in this case, @code{BUFSIZE}---and does not
+check to see whether it too contains macro names.  Only when you
+@emph{use} @code{TABLESIZE} is the result of its expansion scanned for
+more macro names.
+
+This makes a difference if you change the definition of @code{BUFSIZE}
+at some point in the source file.  @code{TABLESIZE}, defined as shown,
+will always expand using the definition of @code{BUFSIZE} that is
+currently in effect:
+
+@smallexample
+#define BUFSIZE 1020
+#define TABLESIZE BUFSIZE
+#undef BUFSIZE
+#define BUFSIZE 37
+@end smallexample
+
+@noindent
+Now @code{TABLESIZE} expands (in two stages) to @code{37}.
+
+If the expansion of a macro contains its own name, either directly or
+via intermediate macros, it is not expanded again when the expansion is
+examined for more macros.  This prevents infinite recursion.
+@xref{Self-Referential Macros}, for the precise details.
+
+@node Function-like Macros
+@section Function-like Macros
+@cindex function-like macros
+
+You can also define macros whose use looks like a function call.  These
+are called @dfn{function-like macros}.  To define a function-like macro,
+you use the same @samp{#define} directive, but you put a pair of
+parentheses immediately after the macro name.  For example,
+
+@smallexample
+#define lang_init()  c_init()
+lang_init()
+     @expansion{} c_init()
+@end smallexample
+
+A function-like macro is only expanded if its name appears with a pair
+of parentheses after it.  If you write just the name, it is left alone.
+This can be useful when you have a function and a macro of the same
+name, and you wish to use the function sometimes.
+
+@smallexample
+extern void foo(void);
+#define foo() /* @r{optimized inline version} */
+@dots{}
+  foo();
+  funcptr = foo;
+@end smallexample
+
+Here the call to @code{foo()} will use the macro, but the function
+pointer will get the address of the real function.  If the macro were to
+be expanded, it would cause a syntax error.
+
+If you put spaces between the macro name and the parentheses in the
+macro definition, that does not define a function-like macro, it defines
+an object-like macro whose expansion happens to begin with a pair of
+parentheses.
+
+@smallexample
+#define lang_init ()    c_init()
+lang_init()
+     @expansion{} () c_init()()
+@end smallexample
+
+The first two pairs of parentheses in this expansion come from the
+macro.  The third is the pair that was originally after the macro
+invocation.  Since @code{lang_init} is an object-like macro, it does not
+consume those parentheses.
+
+@node Macro Arguments
+@section Macro Arguments
+@cindex arguments
+@cindex macros with arguments
+@cindex arguments in macro definitions
+
+Function-like macros can take @dfn{arguments}, just like true functions.
+To define a macro that uses arguments, you insert @dfn{parameters}
+between the pair of parentheses in the macro definition that make the
+macro function-like.  The parameters must be valid C identifiers,
+separated by commas and optionally whitespace.
+
+To invoke a macro that takes arguments, you write the name of the macro
+followed by a list of @dfn{actual arguments} in parentheses, separated
+by commas.  The invocation of the macro need not be restricted to a
+single logical line---it can cross as many lines in the source file as
+you wish.  The number of arguments you give must match the number of
+parameters in the macro definition.  When the macro is expanded, each
+use of a parameter in its body is replaced by the tokens of the
+corresponding argument.  (You need not use all of the parameters in the
+macro body.)
+
+As an example, here is a macro that computes the minimum of two numeric
+values, as it is defined in many C programs, and some uses.
+
+@smallexample
+#define min(X, Y)  ((X) < (Y) ? (X) : (Y))
+  x = min(a, b);          @expansion{}  x = ((a) < (b) ? (a) : (b));
+  y = min(1, 2);          @expansion{}  y = ((1) < (2) ? (1) : (2));
+  z = min(a + 28, *p);    @expansion{}  z = ((a + 28) < (*p) ? (a + 28) : (*p));
+@end smallexample
+
+@noindent
+(In this small example you can already see several of the dangers of
+macro arguments.  @xref{Macro Pitfalls}, for detailed explanations.)
+
+Leading and trailing whitespace in each argument is dropped, and all
+whitespace between the tokens of an argument is reduced to a single
+space.  Parentheses within each argument must balance; a comma within
+such parentheses does not end the argument.  However, there is no
+requirement for square brackets or braces to balance, and they do not
+prevent a comma from separating arguments.  Thus,
+
+@smallexample
+macro (array[x = y, x + 1])
+@end smallexample
+
+@noindent
+passes two arguments to @code{macro}: @code{array[x = y} and @code{x +
+1]}.  If you want to supply @code{array[x = y, x + 1]} as an argument,
+you can write it as @code{array[(x = y, x + 1)]}, which is equivalent C
+code.
+
+All arguments to a macro are completely macro-expanded before they are
+substituted into the macro body.  After substitution, the complete text
+is scanned again for macros to expand, including the arguments.  This rule
+may seem strange, but it is carefully designed so you need not worry
+about whether any function call is actually a macro invocation.  You can
+run into trouble if you try to be too clever, though.  @xref{Argument
+Prescan}, for detailed discussion.
+
+For example, @code{min (min (a, b), c)} is first expanded to
+
+@smallexample
+  min (((a) < (b) ? (a) : (b)), (c))
+@end smallexample
+
+@noindent
+and then to
+
+@smallexample
+@group
+((((a) < (b) ? (a) : (b))) < (c)
+ ? (((a) < (b) ? (a) : (b)))
+ : (c))
+@end group
+@end smallexample
+
+@noindent
+(Line breaks shown here for clarity would not actually be generated.)
+
+@cindex empty macro arguments
+You can leave macro arguments empty; this is not an error to the
+preprocessor (but many macros will then expand to invalid code).
+You cannot leave out arguments entirely; if a macro takes two arguments,
+there must be exactly one comma at the top level of its argument list.
+Here are some silly examples using @code{min}:
+
+@smallexample
+min(, b)        @expansion{} ((   ) < (b) ? (   ) : (b))
+min(a, )        @expansion{} ((a  ) < ( ) ? (a  ) : ( ))
+min(,)          @expansion{} ((   ) < ( ) ? (   ) : ( ))
+min((,),)       @expansion{} (((,)) < ( ) ? ((,)) : ( ))
+
+min()      @error{} macro "min" requires 2 arguments, but only 1 given
+min(,,)    @error{} macro "min" passed 3 arguments, but takes just 2
+@end smallexample
+
+Whitespace is not a preprocessing token, so if a macro @code{foo} takes
+one argument, @code{@w{foo ()}} and @code{@w{foo ( )}} both supply it an
+empty argument.  Previous GNU preprocessor implementations and
+documentation were incorrect on this point, insisting that a
+function-like macro that takes a single argument be passed a space if an
+empty argument was required.
+
+Macro parameters appearing inside string literals are not replaced by
+their corresponding actual arguments.
+
+@smallexample
+#define foo(x) x, "x"
+foo(bar)        @expansion{} bar, "x"
+@end smallexample
+
+@node Stringification
+@section Stringification
+@cindex stringification
+@cindex @samp{#} operator
+
+Sometimes you may want to convert a macro argument into a string
+constant.  Parameters are not replaced inside string constants, but you
+can use the @samp{#} preprocessing operator instead.  When a macro
+parameter is used with a leading @samp{#}, the preprocessor replaces it
+with the literal text of the actual argument, converted to a string
+constant.  Unlike normal parameter replacement, the argument is not
+macro-expanded first.  This is called @dfn{stringification}.
+
+There is no way to combine an argument with surrounding text and
+stringify it all together.  Instead, you can write a series of adjacent
+string constants and stringified arguments.  The preprocessor will
+replace the stringified arguments with string constants.  The C
+compiler will then combine all the adjacent string constants into one
+long string.
+
+Here is an example of a macro definition that uses stringification:
+
+@smallexample
+@group
+#define WARN_IF(EXP) \
+do @{ if (EXP) \
+        fprintf (stderr, "Warning: " #EXP "\n"); @} \
+while (0)
+WARN_IF (x == 0);
+     @expansion{} do @{ if (x == 0)
+           fprintf (stderr, "Warning: " "x == 0" "\n"); @} while (0);
+@end group
+@end smallexample
+
+@noindent
+The argument for @code{EXP} is substituted once, as-is, into the
+@code{if} statement, and once, stringified, into the argument to
+@code{fprintf}.  If @code{x} were a macro, it would be expanded in the
+@code{if} statement, but not in the string.
+
+The @code{do} and @code{while (0)} are a kludge to make it possible to
+write @code{WARN_IF (@var{arg});}, which the resemblance of
+@code{WARN_IF} to a function would make C programmers want to do; see
+@ref{Swallowing the Semicolon}.
+
+Stringification in C involves more than putting double-quote characters
+around the fragment.  The preprocessor backslash-escapes the quotes
+surrounding embedded string constants, and all backslashes within string and
+character constants, in order to get a valid C string constant with the
+proper contents.  Thus, stringifying @code{@w{p = "foo\n";}} results in
+@t{@w{"p = \"foo\\n\";"}}.  However, backslashes that are not inside string
+or character constants are not duplicated: @samp{\n} by itself
+stringifies to @t{"\n"}.
+
+All leading and trailing whitespace in text being stringified is
+ignored.  Any sequence of whitespace in the middle of the text is
+converted to a single space in the stringified result.  Comments are
+replaced by whitespace long before stringification happens, so they
+never appear in stringified text.
+
+There is no way to convert a macro argument into a character constant.
+
+If you want to stringify the result of expansion of a macro argument,
+you have to use two levels of macros.
+
+@smallexample
+#define xstr(s) str(s)
+#define str(s) #s
+#define foo 4
+str (foo)
+     @expansion{} "foo"
+xstr (foo)
+     @expansion{} xstr (4)
+     @expansion{} str (4)
+     @expansion{} "4"
+@end smallexample
+
+@code{s} is stringified when it is used in @code{str}, so it is not
+macro-expanded first.  But @code{s} is an ordinary argument to
+@code{xstr}, so it is completely macro-expanded before @code{xstr}
+itself is expanded (@pxref{Argument Prescan}).  Therefore, by the time
+@code{str} gets to its argument, it has already been macro-expanded.
+
+@node Concatenation
+@section Concatenation
+@cindex concatenation
+@cindex token pasting
+@cindex token concatenation
+@cindex @samp{##} operator
+
+It is often useful to merge two tokens into one while expanding macros.
+This is called @dfn{token pasting} or @dfn{token concatenation}.  The
+@samp{##} preprocessing operator performs token pasting.  When a macro
+is expanded, the two tokens on either side of each @samp{##} operator
+are combined into a single token, which then replaces the @samp{##} and
+the two original tokens in the macro expansion.  Usually both will be
+identifiers, or one will be an identifier and the other a preprocessing
+number.  When pasted, they make a longer identifier.  This isn't the
+only valid case.  It is also possible to concatenate two numbers (or a
+number and a name, such as @code{1.5} and @code{e3}) into a number.
+Also, multi-character operators such as @code{+=} can be formed by
+token pasting.
+
+However, two tokens that don't together form a valid token cannot be
+pasted together.  For example, you cannot concatenate @code{x} with
+@code{+} in either order.  If you try, the preprocessor issues a warning
+and emits the two tokens.  Whether it puts white space between the
+tokens is undefined.  It is common to find unnecessary uses of @samp{##}
+in complex macros.  If you get this warning, it is likely that you can
+simply remove the @samp{##}.
+
+Both the tokens combined by @samp{##} could come from the macro body,
+but you could just as well write them as one token in the first place.
+Token pasting is most useful when one or both of the tokens comes from a
+macro argument.  If either of the tokens next to an @samp{##} is a
+parameter name, it is replaced by its actual argument before @samp{##}
+executes.  As with stringification, the actual argument is not
+macro-expanded first.  If the argument is empty, that @samp{##} has no
+effect.
+
+Keep in mind that the C preprocessor converts comments to whitespace
+before macros are even considered.  Therefore, you cannot create a
+comment by concatenating @samp{/} and @samp{*}.  You can put as much
+whitespace between @samp{##} and its operands as you like, including
+comments, and you can put comments in arguments that will be
+concatenated.  However, it is an error if @samp{##} appears at either
+end of a macro body.
+
+Consider a C program that interprets named commands.  There probably
+needs to be a table of commands, perhaps an array of structures declared
+as follows:
+
+@smallexample
+@group
+struct command
+@{
+  char *name;
+  void (*function) (void);
+@};
+@end group
+
+@group
+struct command commands[] =
+@{
+  @{ "quit", quit_command @},
+  @{ "help", help_command @},
+  @dots{}
+@};
+@end group
+@end smallexample
+
+It would be cleaner not to have to give each command name twice, once in
+the string constant and once in the function name.  A macro which takes the
+name of a command as an argument can make this unnecessary.  The string
+constant can be created with stringification, and the function name by
+concatenating the argument with @samp{_command}.  Here is how it is done:
+
+@smallexample
+#define COMMAND(NAME)  @{ #NAME, NAME ## _command @}
+
+struct command commands[] =
+@{
+  COMMAND (quit),
+  COMMAND (help),
+  @dots{}
+@};
+@end smallexample
+
+@node Variadic Macros
+@section Variadic Macros
+@cindex variable number of arguments
+@cindex macros with variable arguments
+@cindex variadic macros
+
+A macro can be declared to accept a variable number of arguments much as
+a function can.  The syntax for defining the macro is similar to that of
+a function.  Here is an example:
+
+@smallexample
+#define eprintf(@dots{}) fprintf (stderr, __VA_ARGS__)
+@end smallexample
+
+This kind of macro is called @dfn{variadic}.  When the macro is invoked,
+all the tokens in its argument list after the last named argument (this
+macro has none), including any commas, become the @dfn{variable
+argument}.  This sequence of tokens replaces the identifier
+@code{@w{__VA_ARGS__}} in the macro body wherever it appears.  Thus, we
+have this expansion:
+
+@smallexample
+eprintf ("%s:%d: ", input_file, lineno)
+     @expansion{}  fprintf (stderr, "%s:%d: ", input_file, lineno)
+@end smallexample
+
+The variable argument is completely macro-expanded before it is inserted
+into the macro expansion, just like an ordinary argument.  You may use
+the @samp{#} and @samp{##} operators to stringify the variable argument
+or to paste its leading or trailing token with another token.  (But see
+below for an important special case for @samp{##}.)
+
+If your macro is complicated, you may want a more descriptive name for
+the variable argument than @code{@w{__VA_ARGS__}}.  CPP permits
+this, as an extension.  You may write an argument name immediately
+before the @samp{@dots{}}; that name is used for the variable argument.
+The @code{eprintf} macro above could be written
+
+@smallexample
+#define eprintf(args@dots{}) fprintf (stderr, args)
+@end smallexample
+
+@noindent
+using this extension.  You cannot use @code{@w{__VA_ARGS__}} and this
+extension in the same macro.
+
+You can have named arguments as well as variable arguments in a variadic
+macro.  We could define @code{eprintf} like this, instead:
+
+@smallexample
+#define eprintf(format, @dots{}) fprintf (stderr, format, __VA_ARGS__)
+@end smallexample
+
+@noindent
+This formulation looks more descriptive, but unfortunately it is less
+flexible: you must now supply at least one argument after the format
+string.  In standard C, you cannot omit the comma separating the named
+argument from the variable arguments.  Furthermore, if you leave the
+variable argument empty, you will get a syntax error, because
+there will be an extra comma after the format string.
+
+@smallexample
+eprintf("success!\n", );
+     @expansion{} fprintf(stderr, "success!\n", );
+@end smallexample
+
+GNU CPP has a pair of extensions which deal with this problem.  First,
+you are allowed to leave the variable argument out entirely:
+
+@smallexample
+eprintf ("success!\n")
+     @expansion{} fprintf(stderr, "success!\n", );
+@end smallexample
+
+@noindent
+Second, the @samp{##} token paste operator has a special meaning when
+placed between a comma and a variable argument.  If you write
+
+@smallexample
+#define eprintf(format, @dots{}) fprintf (stderr, format, ##__VA_ARGS__)
+@end smallexample
+
+@noindent
+and the variable argument is left out when the @code{eprintf} macro is
+used, then the comma before the @samp{##} will be deleted.  This does
+@emph{not} happen if you pass an empty argument, nor does it happen if
+the token preceding @samp{##} is anything other than a comma.
+
+@smallexample
+eprintf ("success!\n")
+     @expansion{} fprintf(stderr, "success!\n");
+@end smallexample
+
+@noindent
+The above explanation is ambiguous about the case where the only macro
+parameter is a variable arguments parameter, as it is meaningless to
+try to distinguish whether no argument at all is an empty argument or
+a missing argument.  In this case the C99 standard is clear that the
+comma must remain, however the existing GCC extension used to swallow
+the comma.  So CPP retains the comma when conforming to a specific C
+standard, and drops it otherwise.
+
+C99 mandates that the only place the identifier @code{@w{__VA_ARGS__}}
+can appear is in the replacement list of a variadic macro.  It may not
+be used as a macro name, macro argument name, or within a different type
+of macro.  It may also be forbidden in open text; the standard is
+ambiguous.  We recommend you avoid using it except for its defined
+purpose.
+
+Variadic macros are a new feature in C99.  GNU CPP has supported them
+for a long time, but only with a named variable argument
+(@samp{args@dots{}}, not @samp{@dots{}} and @code{@w{__VA_ARGS__}}).  If you are
+concerned with portability to previous versions of GCC, you should use
+only named variable arguments.  On the other hand, if you are concerned
+with portability to other conforming implementations of C99, you should
+use only @code{@w{__VA_ARGS__}}.
+
+Previous versions of CPP implemented the comma-deletion extension
+much more generally.  We have restricted it in this release to minimize
+the differences from C99.  To get the same effect with both this and
+previous versions of GCC, the token preceding the special @samp{##} must
+be a comma, and there must be white space between that comma and
+whatever comes immediately before it:
+
+@smallexample
+#define eprintf(format, args@dots{}) fprintf (stderr, format , ##args)
+@end smallexample
+
+@noindent
+@xref{Differences from previous versions}, for the gory details.
+
+@node Predefined Macros
+@section Predefined Macros
+
+@cindex predefined macros
+Several object-like macros are predefined; you use them without
+supplying their definitions.  They fall into three classes: standard,
+common, and system-specific.
+
+In C++, there is a fourth category, the named operators.  They act like
+predefined macros, but you cannot undefine them.
+
+@menu
+* Standard Predefined Macros::
+* Common Predefined Macros::
+* System-specific Predefined Macros::
+* C++ Named Operators::
+@end menu
+
+@node Standard Predefined Macros
+@subsection Standard Predefined Macros
+@cindex standard predefined macros.
+
+The standard predefined macros are specified by the relevant
+language standards, so they are available with all compilers that
+implement those standards.  Older compilers may not provide all of
+them.  Their names all start with double underscores.
+
+@table @code
+@item __FILE__
+This macro expands to the name of the current input file, in the form of
+a C string constant.  This is the path by which the preprocessor opened
+the file, not the short name specified in @samp{#include} or as the
+input file name argument.  For example,
+@code{"/usr/local/include/myheader.h"} is a possible expansion of this
+macro.
+
+@item __LINE__
+This macro expands to the current input line number, in the form of a
+decimal integer constant.  While we call it a predefined macro, it's
+a pretty strange macro, since its ``definition'' changes with each
+new line of source code.
+@end table
+
+@code{__FILE__} and @code{__LINE__} are useful in generating an error
+message to report an inconsistency detected by the program; the message
+can state the source line at which the inconsistency was detected.  For
+example,
+
+@smallexample
+fprintf (stderr, "Internal error: "
+                 "negative string length "
+                 "%d at %s, line %d.",
+         length, __FILE__, __LINE__);
+@end smallexample
+
+An @samp{#include} directive changes the expansions of @code{__FILE__}
+and @code{__LINE__} to correspond to the included file.  At the end of
+that file, when processing resumes on the input file that contained
+the @samp{#include} directive, the expansions of @code{__FILE__} and
+@code{__LINE__} revert to the values they had before the
+@samp{#include} (but @code{__LINE__} is then incremented by one as
+processing moves to the line after the @samp{#include}).
+
+A @samp{#line} directive changes @code{__LINE__}, and may change
+@code{__FILE__} as well.  @xref{Line Control}.
+
+C99 introduces @code{__func__}, and GCC has provided @code{__FUNCTION__}
+for a long time.  Both of these are strings containing the name of the
+current function (there are slight semantic differences; see the GCC
+manual).  Neither of them is a macro; the preprocessor does not know the
+name of the current function.  They tend to be useful in conjunction
+with @code{__FILE__} and @code{__LINE__}, though.
+
+@table @code
+
+@item __DATE__
+This macro expands to a string constant that describes the date on which
+the preprocessor is being run.  The string constant contains eleven
+characters and looks like @code{@w{"Feb 12 1996"}}.  If the day of the
+month is less than 10, it is padded with a space on the left.
+
+If GCC cannot determine the current date, it will emit a warning message
+(once per compilation) and @code{__DATE__} will expand to
+@code{@w{"??? ?? ????"}}.
+
+@item __TIME__
+This macro expands to a string constant that describes the time at
+which the preprocessor is being run.  The string constant contains
+eight characters and looks like @code{"23:59:01"}.
+
+If GCC cannot determine the current time, it will emit a warning message
+(once per compilation) and @code{__TIME__} will expand to
+@code{"??:??:??"}.
+
+@item __STDC__
+In normal operation, this macro expands to the constant 1, to signify
+that this compiler conforms to ISO Standard C@.  If GNU CPP is used with
+a compiler other than GCC, this is not necessarily true; however, the
+preprocessor always conforms to the standard unless the
+@option{-traditional-cpp} option is used.
+
+This macro is not defined if the @option{-traditional-cpp} option is used.
+
+On some hosts, the system compiler uses a different convention, where
+@code{__STDC__} is normally 0, but is 1 if the user specifies strict
+conformance to the C Standard.  CPP follows the host convention when
+processing system header files, but when processing user files
+@code{__STDC__} is always 1.  This has been reported to cause problems;
+for instance, some versions of Solaris provide X Windows headers that
+expect @code{__STDC__} to be either undefined or 1.  @xref{Invocation}.
+
+@item __STDC_VERSION__
+This macro expands to the C Standard's version number, a long integer
+constant of the form @code{@var{yyyy}@var{mm}L} where @var{yyyy} and
+@var{mm} are the year and month of the Standard version.  This signifies
+which version of the C Standard the compiler conforms to.  Like
+@code{__STDC__}, this is not necessarily accurate for the entire
+implementation, unless GNU CPP is being used with GCC@.
+
+The value @code{199409L} signifies the 1989 C standard as amended in
+1994, which is the current default; the value @code{199901L} signifies
+the 1999 revision of the C standard.  Support for the 1999 revision is
+not yet complete.
+
+This macro is not defined if the @option{-traditional-cpp} option is
+used, nor when compiling C++ or Objective-C@.
+
+@item __STDC_HOSTED__
+This macro is defined, with value 1, if the compiler's target is a
+@dfn{hosted environment}.  A hosted environment has the complete
+facilities of the standard C library available.
+
+@item __cplusplus
+This macro is defined when the C++ compiler is in use.  You can use
+@code{__cplusplus} to test whether a header is compiled by a C compiler
+or a C++ compiler.  This macro is similar to @code{__STDC_VERSION__}, in
+that it expands to a version number.  A fully conforming implementation
+of the 1998 C++ standard will define this macro to @code{199711L}.  The
+GNU C++ compiler is not yet fully conforming, so it uses @code{1}
+instead.  It is hoped to complete the implementation of standard C++
+in the near future.
+
+@item __OBJC__
+This macro is defined, with value 1, when the Objective-C compiler is in
+use.  You can use @code{__OBJC__} to test whether a header is compiled
+by a C compiler or an Objective-C compiler.
+
+@item __ASSEMBLER__
+This macro is defined with value 1 when preprocessing assembly
+language.
+
+@end table
+
+@node Common Predefined Macros
+@subsection Common Predefined Macros
+@cindex common predefined macros
+
+The common predefined macros are GNU C extensions.  They are available
+with the same meanings regardless of the machine or operating system on
+which you are using GNU C or GNU Fortran.  Their names all start with
+double underscores.
+
+@table @code
+
+@item __COUNTER__
+This macro expands to sequential integral values starting from 0.  In
+conjunction with the @code{##} operator, this provides a convenient means to
+generate unique identifiers.  Care must be taken to ensure that
+@code{__COUNTER__} is not expanded prior to inclusion of precompiled headers
+which use it.  Otherwise, the precompiled headers will not be used.
+
+@item __GFORTRAN__
+The GNU Fortran compiler defines this. 
+
+@item __GNUC__
+@itemx __GNUC_MINOR__
+@itemx __GNUC_PATCHLEVEL__
+These macros are defined by all GNU compilers that use the C
+preprocessor: C, C++, Objective-C and Fortran.  Their values are the major
+version, minor version, and patch level of the compiler, as integer
+constants.  For example, GCC 3.2.1 will define @code{__GNUC__} to 3,
+@code{__GNUC_MINOR__} to 2, and @code{__GNUC_PATCHLEVEL__} to 1.  These
+macros are also defined if you invoke the preprocessor directly.
+
+@code{__GNUC_PATCHLEVEL__} is new to GCC 3.0; it is also present in the
+widely-used development snapshots leading up to 3.0 (which identify
+themselves as GCC 2.96 or 2.97, depending on which snapshot you have).
+
+If all you need to know is whether or not your program is being compiled
+by GCC, or a non-GCC compiler that claims to accept the GNU C dialects,
+you can simply test @code{__GNUC__}.  If you need to write code
+which depends on a specific version, you must be more careful.  Each
+time the minor version is increased, the patch level is reset to zero;
+each time the major version is increased (which happens rarely), the
+minor version and patch level are reset.  If you wish to use the
+predefined macros directly in the conditional, you will need to write it
+like this:
+
+@smallexample
+/* @r{Test for GCC > 3.2.0} */
+#if __GNUC__ > 3 || \
+    (__GNUC__ == 3 && (__GNUC_MINOR__ > 2 || \
+                       (__GNUC_MINOR__ == 2 && \
+                        __GNUC_PATCHLEVEL__ > 0))
+@end smallexample
+
+@noindent
+Another approach is to use the predefined macros to
+calculate a single number, then compare that against a threshold:
+
+@smallexample
+#define GCC_VERSION (__GNUC__ * 10000 \
+                     + __GNUC_MINOR__ * 100 \
+                     + __GNUC_PATCHLEVEL__)
+@dots{}
+/* @r{Test for GCC > 3.2.0} */
+#if GCC_VERSION > 30200
+@end smallexample
+
+@noindent
+Many people find this form easier to understand.
+
+@item __GNUG__
+The GNU C++ compiler defines this.  Testing it is equivalent to
+testing @code{@w{(__GNUC__ && __cplusplus)}}.
+
+@item __STRICT_ANSI__
+GCC defines this macro if and only if the @option{-ansi} switch, or a
+@option{-std} switch specifying strict conformance to some version of ISO C,
+was specified when GCC was invoked.  It is defined to @samp{1}.
+This macro exists primarily to direct GNU libc's header files to
+restrict their definitions to the minimal set found in the 1989 C
+standard.
+
+@item __BASE_FILE__
+This macro expands to the name of the main input file, in the form
+of a C string constant.  This is the source file that was specified
+on the command line of the preprocessor or C compiler.
+
+@item __INCLUDE_LEVEL__
+This macro expands to a decimal integer constant that represents the
+depth of nesting in include files.  The value of this macro is
+incremented on every @samp{#include} directive and decremented at the
+end of every included file.  It starts out at 0, its value within the
+base file specified on the command line.
+
+@item __ELF__
+This macro is defined if the target uses the ELF object format.
+
+@item __VERSION__
+This macro expands to a string constant which describes the version of
+the compiler in use.  You should not rely on its contents having any
+particular form, but it can be counted on to contain at least the
+release number.
+
+@item __OPTIMIZE__
+@itemx __OPTIMIZE_SIZE__
+@itemx __NO_INLINE__
+These macros describe the compilation mode.  @code{__OPTIMIZE__} is
+defined in all optimizing compilations.  @code{__OPTIMIZE_SIZE__} is
+defined if the compiler is optimizing for size, not speed.
+@code{__NO_INLINE__} is defined if no functions will be inlined into
+their callers (when not optimizing, or when inlining has been
+specifically disabled by @option{-fno-inline}).
+
+These macros cause certain GNU header files to provide optimized
+definitions, using macros or inline functions, of system library
+functions.  You should not use these macros in any way unless you make
+sure that programs will execute with the same effect whether or not they
+are defined.  If they are defined, their value is 1.
+
+@item __GNUC_GNU_INLINE__
+GCC defines this macro if functions declared @code{inline} will be
+handled in GCC's traditional gnu90 mode.  Object files will contain
+externally visible definitions of all functions declared @code{inline}
+without @code{extern} or @code{static}.  They will not contain any
+definitions of any functions declared @code{extern inline}.
+
+@item __GNUC_STDC_INLINE__
+GCC defines this macro if functions declared @code{inline} will be
+handled according to the ISO C99 standard.  Object files will contain
+externally visible definitions of all functions declared @code{extern
+inline}.  They will not contain definitions of any functions declared
+@code{inline} without @code{extern}.
+
+If this macro is defined, GCC supports the @code{gnu_inline} function
+attribute as a way to always get the gnu90 behavior.  Support for
+this and @code{__GNUC_GNU_INLINE__} was added in GCC 4.1.3.  If
+neither macro is defined, an older version of GCC is being used:
+@code{inline} functions will be compiled in gnu90 mode, and the
+@code{gnu_inline} function attribute will not be recognized.
+
+@item __CHAR_UNSIGNED__
+GCC defines this macro if and only if the data type @code{char} is
+unsigned on the target machine.  It exists to cause the standard header
+file @file{limits.h} to work correctly.  You should not use this macro
+yourself; instead, refer to the standard macros defined in @file{limits.h}.
+
+@item __WCHAR_UNSIGNED__
+Like @code{__CHAR_UNSIGNED__}, this macro is defined if and only if the
+data type @code{wchar_t} is unsigned and the front-end is in C++ mode.
+
+@item __REGISTER_PREFIX__
+This macro expands to a single token (not a string constant) which is
+the prefix applied to CPU register names in assembly language for this
+target.  You can use it to write assembly that is usable in multiple
+environments.  For example, in the @code{m68k-aout} environment it
+expands to nothing, but in the @code{m68k-coff} environment it expands
+to a single @samp{%}.
+
+@item __USER_LABEL_PREFIX__
+This macro expands to a single token which is the prefix applied to
+user labels (symbols visible to C code) in assembly.  For example, in
+the @code{m68k-aout} environment it expands to an @samp{_}, but in the
+@code{m68k-coff} environment it expands to nothing.
+
+This macro will have the correct definition even if
+@option{-f(no-)underscores} is in use, but it will not be correct if
+target-specific options that adjust this prefix are used (e.g.@: the
+OSF/rose @option{-mno-underscores} option).
+
+@item __SIZE_TYPE__
+@itemx __PTRDIFF_TYPE__
+@itemx __WCHAR_TYPE__
+@itemx __WINT_TYPE__
+@itemx __INTMAX_TYPE__
+@itemx __UINTMAX_TYPE__
+@itemx __SIG_ATOMIC_TYPE__
+@itemx __INT8_TYPE__
+@itemx __INT16_TYPE__
+@itemx __INT32_TYPE__
+@itemx __INT64_TYPE__
+@itemx __UINT8_TYPE__
+@itemx __UINT16_TYPE__
+@itemx __UINT32_TYPE__
+@itemx __UINT64_TYPE__
+@itemx __INT_LEAST8_TYPE__
+@itemx __INT_LEAST16_TYPE__
+@itemx __INT_LEAST32_TYPE__
+@itemx __INT_LEAST64_TYPE__
+@itemx __UINT_LEAST8_TYPE__
+@itemx __UINT_LEAST16_TYPE__
+@itemx __UINT_LEAST32_TYPE__
+@itemx __UINT_LEAST64_TYPE__
+@itemx __INT_FAST8_TYPE__
+@itemx __INT_FAST16_TYPE__
+@itemx __INT_FAST32_TYPE__
+@itemx __INT_FAST64_TYPE__
+@itemx __UINT_FAST8_TYPE__
+@itemx __UINT_FAST16_TYPE__
+@itemx __UINT_FAST32_TYPE__
+@itemx __UINT_FAST64_TYPE__
+@itemx __INTPTR_TYPE__
+@itemx __UINTPTR_TYPE__
+These macros are defined to the correct underlying types for the
+@code{size_t}, @code{ptrdiff_t}, @code{wchar_t}, @code{wint_t},
+@code{intmax_t}, @code{uintmax_t}, @code{sig_atomic_t}, @code{int8_t},
+@code{int16_t}, @code{int32_t}, @code{int64_t}, @code{uint8_t},
+@code{uint16_t}, @code{uint32_t}, @code{uint64_t},
+@code{int_least8_t}, @code{int_least16_t}, @code{int_least32_t},
+@code{int_least64_t}, @code{uint_least8_t}, @code{uint_least16_t},
+@code{uint_least32_t}, @code{uint_least64_t}, @code{int_fast8_t},
+@code{int_fast16_t}, @code{int_fast32_t}, @code{int_fast64_t},
+@code{uint_fast8_t}, @code{uint_fast16_t}, @code{uint_fast32_t},
+@code{uint_fast64_t}, @code{intptr_t}, and @code{uintptr_t} typedefs,
+respectively.  They exist to make the standard header files
+@file{stddef.h}, @file{stdint.h}, and @file{wchar.h} work correctly.
+You should not use these macros directly; instead, include the
+appropriate headers and use the typedefs.  Some of these macros may
+not be defined on particular systems if GCC does not provide a
+@file{stdint.h} header on those systems.
+
+@item __CHAR_BIT__
+Defined to the number of bits used in the representation of the
+@code{char} data type.  It exists to make the standard header given
+numerical limits work correctly.  You should not use
+this macro directly; instead, include the appropriate headers.
+
+@item __SCHAR_MAX__
+@itemx __WCHAR_MAX__
+@itemx __SHRT_MAX__
+@itemx __INT_MAX__
+@itemx __LONG_MAX__
+@itemx __LONG_LONG_MAX__
+@itemx __WINT_MAX__
+@itemx __SIZE_MAX__
+@itemx __PTRDIFF_MAX__
+@itemx __INTMAX_MAX__
+@itemx __UINTMAX_MAX__
+@itemx __SIG_ATOMIC_MAX__
+@itemx __INT8_MAX__
+@itemx __INT16_MAX__
+@itemx __INT32_MAX__
+@itemx __INT64_MAX__
+@itemx __UINT8_MAX__
+@itemx __UINT16_MAX__
+@itemx __UINT32_MAX__
+@itemx __UINT64_MAX__
+@itemx __INT_LEAST8_MAX__
+@itemx __INT_LEAST16_MAX__
+@itemx __INT_LEAST32_MAX__
+@itemx __INT_LEAST64_MAX__
+@itemx __UINT_LEAST8_MAX__
+@itemx __UINT_LEAST16_MAX__
+@itemx __UINT_LEAST32_MAX__
+@itemx __UINT_LEAST64_MAX__
+@itemx __INT_FAST8_MAX__
+@itemx __INT_FAST16_MAX__
+@itemx __INT_FAST32_MAX__
+@itemx __INT_FAST64_MAX__
+@itemx __UINT_FAST8_MAX__
+@itemx __UINT_FAST16_MAX__
+@itemx __UINT_FAST32_MAX__
+@itemx __UINT_FAST64_MAX__
+@itemx __INTPTR_MAX__
+@itemx __UINTPTR_MAX__
+@itemx __WCHAR_MIN__
+@itemx __WINT_MIN__
+@itemx __SIG_ATOMIC_MIN__
+Defined to the maximum value of the @code{signed char}, @code{wchar_t},
+@code{signed short},
+@code{signed int}, @code{signed long}, @code{signed long long},
+@code{wint_t}, @code{size_t}, @code{ptrdiff_t},
+@code{intmax_t}, @code{uintmax_t}, @code{sig_atomic_t}, @code{int8_t},
+@code{int16_t}, @code{int32_t}, @code{int64_t}, @code{uint8_t},
+@code{uint16_t}, @code{uint32_t}, @code{uint64_t},
+@code{int_least8_t}, @code{int_least16_t}, @code{int_least32_t},
+@code{int_least64_t}, @code{uint_least8_t}, @code{uint_least16_t},
+@code{uint_least32_t}, @code{uint_least64_t}, @code{int_fast8_t},
+@code{int_fast16_t}, @code{int_fast32_t}, @code{int_fast64_t},
+@code{uint_fast8_t}, @code{uint_fast16_t}, @code{uint_fast32_t},
+@code{uint_fast64_t}, @code{intptr_t}, and @code{uintptr_t} types and
+to the minimum value of the @code{wchar_t}, @code{wint_t}, and
+@code{sig_atomic_t} types respectively.  They exist to make the
+standard header given numerical limits work correctly.  You should not
+use these macros directly; instead, include the appropriate headers.
+Some of these macros may not be defined on particular systems if GCC
+does not provide a @file{stdint.h} header on those systems.
+
+@item __INT8_C
+@itemx __INT16_C
+@itemx __INT32_C
+@itemx __INT64_C
+@itemx __UINT8_C
+@itemx __UINT16_C
+@itemx __UINT32_C
+@itemx __UINT64_C
+@itemx __INTMAX_C
+@itemx __UINTMAX_C
+Defined to implementations of the standard @file{stdint.h} macros with
+the same names without the leading @code{__}.  They exist the make the
+implementation of that header work correctly.  You should not use
+these macros directly; instead, include the appropriate headers.  Some
+of these macros may not be defined on particular systems if GCC does
+not provide a @file{stdint.h} header on those systems.
+
+@item __SIZEOF_INT__
+@itemx __SIZEOF_LONG__
+@itemx __SIZEOF_LONG_LONG__
+@itemx __SIZEOF_SHORT__
+@itemx __SIZEOF_POINTER__
+@itemx __SIZEOF_FLOAT__
+@itemx __SIZEOF_DOUBLE__
+@itemx __SIZEOF_LONG_DOUBLE__
+@itemx __SIZEOF_SIZE_T__
+@itemx __SIZEOF_WCHAR_T__
+@itemx __SIZEOF_WINT_T__
+@itemx __SIZEOF_PTRDIFF_T__
+Defined to the number of bytes of the C standard data types: @code{int},
+@code{long}, @code{long long}, @code{short}, @code{void *}, @code{float},
+@code{double}, @code{long double}, @code{size_t}, @code{wchar_t}, @code{wint_t}
+and @code{ptrdiff_t}.
+
+@item __BYTE_ORDER__
+@itemx __ORDER_LITTLE_ENDIAN__
+@itemx __ORDER_BIG_ENDIAN__
+@itemx __ORDER_PDP_ENDIAN__
+@code{__BYTE_ORDER__} is defined to one of the values
+@code{__ORDER_LITTLE_ENDIAN__}, @code{__ORDER_BIG_ENDIAN__}, or
+@code{__ORDER_PDP_ENDIAN__} to reflect the layout of multi-byte and
+multi-word quantities in memory.  If @code{__BYTE_ORDER__} is equal to
+@code{__ORDER_LITTLE_ENDIAN__} or @code{__ORDER_BIG_ENDIAN__}, then
+multi-byte and multi-word quantities are laid out identically: the
+byte (word) at the lowest address is the least significant or most
+significant byte (word) of the quantity, respectively.  If
+@code{__BYTE_ORDER__} is equal to @code{__ORDER_PDP_ENDIAN__}, then
+bytes in 16-bit words are laid out in a little-endian fashion, whereas
+the 16-bit subwords of a 32-bit quantity are laid out in big-endian
+fashion.
+
+You should use these macros for testing like this:
+
+@smallexample
+/* @r{Test for a little-endian machine} */
+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+@end smallexample
+
+@item __FLOAT_WORD_ORDER__
+@code{__FLOAT_WORD_ORDER__} is defined to one of the values
+@code{__ORDER_LITTLE_ENDIAN__} or @code{__ORDER_BIG_ENDIAN__} to reflect
+the layout of the words of multi-word floating-point quantities.
+
+@item __DEPRECATED
+This macro is defined, with value 1, when compiling a C++ source file
+with warnings about deprecated constructs enabled.  These warnings are
+enabled by default, but can be disabled with @option{-Wno-deprecated}.
+
+@item __EXCEPTIONS
+This macro is defined, with value 1, when compiling a C++ source file
+with exceptions enabled.  If @option{-fno-exceptions} is used when
+compiling the file, then this macro is not defined.
+
+@item __GXX_RTTI
+This macro is defined, with value 1, when compiling a C++ source file
+with runtime type identification enabled.  If @option{-fno-rtti} is
+used when compiling the file, then this macro is not defined.
+
+@item __USING_SJLJ_EXCEPTIONS__
+This macro is defined, with value 1, if the compiler uses the old
+mechanism based on @code{setjmp} and @code{longjmp} for exception
+handling.
+
+@item __GXX_EXPERIMENTAL_CXX0X__
+This macro is defined when compiling a C++ source file with the option
+@option{-std=c++0x} or @option{-std=gnu++0x}. It indicates that some
+features likely to be included in C++0x are available. Note that these
+features are experimental, and may change or be removed in future
+versions of GCC.
+
+@item __GXX_WEAK__
+This macro is defined when compiling a C++ source file.  It has the
+value 1 if the compiler will use weak symbols, COMDAT sections, or
+other similar techniques to collapse symbols with ``vague linkage''
+that are defined in multiple translation units.  If the compiler will
+not collapse such symbols, this macro is defined with value 0.  In
+general, user code should not need to make use of this macro; the
+purpose of this macro is to ease implementation of the C++ runtime
+library provided with G++.
+
+@item __NEXT_RUNTIME__
+This macro is defined, with value 1, if (and only if) the NeXT runtime
+(as in @option{-fnext-runtime}) is in use for Objective-C@.  If the GNU
+runtime is used, this macro is not defined, so that you can use this
+macro to determine which runtime (NeXT or GNU) is being used.
+
+@item __LP64__
+@itemx _LP64
+These macros are defined, with value 1, if (and only if) the compilation
+is for a target where @code{long int} and pointer both use 64-bits and
+@code{int} uses 32-bit.
+
+@item __SSP__
+This macro is defined, with value 1, when @option{-fstack-protector} is in
+use.
+
+@item __SSP_ALL__
+This macro is defined, with value 2, when @option{-fstack-protector-all} is
+in use.
+
+@item __TIMESTAMP__
+This macro expands to a string constant that describes the date and time
+of the last modification of the current source file. The string constant
+contains abbreviated day of the week, month, day of the month, time in
+hh:mm:ss form, year and looks like @code{@w{"Sun Sep 16 01:03:52 1973"}}.
+If the day of the month is less than 10, it is padded with a space on the left.
+
+If GCC cannot determine the current date, it will emit a warning message
+(once per compilation) and @code{__TIMESTAMP__} will expand to
+@code{@w{"??? ??? ?? ??:??:?? ????"}}.
+
+@item __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
+@itemx __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
+@itemx __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
+@itemx __GCC_HAVE_SYNC_COMPARE_AND_SWAP_8
+@itemx __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16
+These macros are defined when the target processor supports atomic compare
+and swap operations on operands 1, 2, 4, 8 or 16 bytes in length, respectively.
+
+@item __GCC_HAVE_DWARF2_CFI_ASM
+This macro is defined when the compiler is emitting Dwarf2 CFI directives
+to the assembler.  When this is defined, it is possible to emit those same
+directives in inline assembly.
+
+@item __FP_FAST_FMA
+@itemx __FP_FAST_FMAF
+@itemx __FP_FAST_FMAL
+These macros are defined with value 1 if the backend supports the
+@code{fma}, @code{fmaf}, and @code{fmal} builtin functions, so that
+the include file @file{math.h} can define the macros
+@code{FP_FAST_FMA}, @code{FP_FAST_FMAF}, and @code{FP_FAST_FMAL}
+for compatibility with the 1999 C standard.
+@end table
+
+@node System-specific Predefined Macros
+@subsection System-specific Predefined Macros
+
+@cindex system-specific predefined macros
+@cindex predefined macros, system-specific
+@cindex reserved namespace
+
+The C preprocessor normally predefines several macros that indicate what
+type of system and machine is in use.  They are obviously different on
+each target supported by GCC@.  This manual, being for all systems and
+machines, cannot tell you what their names are, but you can use
+@command{cpp -dM} to see them all.  @xref{Invocation}.  All system-specific
+predefined macros expand to the constant 1, so you can test them with
+either @samp{#ifdef} or @samp{#if}.
+
+The C standard requires that all system-specific macros be part of the
+@dfn{reserved namespace}.  All names which begin with two underscores,
+or an underscore and a capital letter, are reserved for the compiler and
+library to use as they wish.  However, historically system-specific
+macros have had names with no special prefix; for instance, it is common
+to find @code{unix} defined on Unix systems.  For all such macros, GCC
+provides a parallel macro with two underscores added at the beginning
+and the end.  If @code{unix} is defined, @code{__unix__} will be defined
+too.  There will never be more than two underscores; the parallel of
+@code{_mips} is @code{__mips__}.
+
+When the @option{-ansi} option, or any @option{-std} option that
+requests strict conformance, is given to the compiler, all the
+system-specific predefined macros outside the reserved namespace are
+suppressed.  The parallel macros, inside the reserved namespace, remain
+defined.
+
+We are slowly phasing out all predefined macros which are outside the
+reserved namespace.  You should never use them in new programs, and we
+encourage you to correct older code to use the parallel macros whenever
+you find it.  We don't recommend you use the system-specific macros that
+are in the reserved namespace, either.  It is better in the long run to
+check specifically for features you need, using a tool such as
+@command{autoconf}.
+
+@node C++ Named Operators
+@subsection C++ Named Operators
+@cindex named operators
+@cindex C++ named operators
+@cindex @file{iso646.h}
+
+In C++, there are eleven keywords which are simply alternate spellings
+of operators normally written with punctuation.  These keywords are
+treated as such even in the preprocessor.  They function as operators in
+@samp{#if}, and they cannot be defined as macros or poisoned.  In C, you
+can request that those keywords take their C++ meaning by including
+@file{iso646.h}.  That header defines each one as a normal object-like
+macro expanding to the appropriate punctuator.
+
+These are the named operators and their corresponding punctuators:
+
+@multitable {Named Operator} {Punctuator}
+@item Named Operator @tab Punctuator
+@item @code{and}    @tab @code{&&}
+@item @code{and_eq} @tab @code{&=}
+@item @code{bitand} @tab @code{&}
+@item @code{bitor}  @tab @code{|}
+@item @code{compl}  @tab @code{~}
+@item @code{not}    @tab @code{!}
+@item @code{not_eq} @tab @code{!=}
+@item @code{or}     @tab @code{||}
+@item @code{or_eq}  @tab @code{|=}
+@item @code{xor}    @tab @code{^}
+@item @code{xor_eq} @tab @code{^=}
+@end multitable
+
+@node Undefining and Redefining Macros
+@section Undefining and Redefining Macros
+@cindex undefining macros
+@cindex redefining macros
+@findex #undef
+
+If a macro ceases to be useful, it may be @dfn{undefined} with the
+@samp{#undef} directive.  @samp{#undef} takes a single argument, the
+name of the macro to undefine.  You use the bare macro name, even if the
+macro is function-like.  It is an error if anything appears on the line
+after the macro name.  @samp{#undef} has no effect if the name is not a
+macro.
+
+@smallexample
+#define FOO 4
+x = FOO;        @expansion{} x = 4;
+#undef FOO
+x = FOO;        @expansion{} x = FOO;
+@end smallexample
+
+Once a macro has been undefined, that identifier may be @dfn{redefined}
+as a macro by a subsequent @samp{#define} directive.  The new definition
+need not have any resemblance to the old definition.
+
+However, if an identifier which is currently a macro is redefined, then
+the new definition must be @dfn{effectively the same} as the old one.
+Two macro definitions are effectively the same if:
+@itemize @bullet
+@item Both are the same type of macro (object- or function-like).
+@item All the tokens of the replacement list are the same.
+@item If there are any parameters, they are the same.
+@item Whitespace appears in the same places in both.  It need not be
+exactly the same amount of whitespace, though.  Remember that comments
+count as whitespace.
+@end itemize
+
+@noindent
+These definitions are effectively the same:
+@smallexample
+#define FOUR (2 + 2)
+#define FOUR         (2    +    2)
+#define FOUR (2 /* @r{two} */ + 2)
+@end smallexample
+@noindent
+but these are not:
+@smallexample
+#define FOUR (2 + 2)
+#define FOUR ( 2+2 )
+#define FOUR (2 * 2)
+#define FOUR(score,and,seven,years,ago) (2 + 2)
+@end smallexample
+
+If a macro is redefined with a definition that is not effectively the
+same as the old one, the preprocessor issues a warning and changes the
+macro to use the new definition.  If the new definition is effectively
+the same, the redefinition is silently ignored.  This allows, for
+instance, two different headers to define a common macro.  The
+preprocessor will only complain if the definitions do not match.
+
+@node Directives Within Macro Arguments
+@section Directives Within Macro Arguments
+@cindex macro arguments and directives
+
+Occasionally it is convenient to use preprocessor directives within
+the arguments of a macro.  The C and C++ standards declare that
+behavior in these cases is undefined.
+
+Versions of CPP prior to 3.2 would reject such constructs with an
+error message.  This was the only syntactic difference between normal
+functions and function-like macros, so it seemed attractive to remove
+this limitation, and people would often be surprised that they could
+not use macros in this way.  Moreover, sometimes people would use
+conditional compilation in the argument list to a normal library
+function like @samp{printf}, only to find that after a library upgrade
+@samp{printf} had changed to be a function-like macro, and their code
+would no longer compile.  So from version 3.2 we changed CPP to
+successfully process arbitrary directives within macro arguments in
+exactly the same way as it would have processed the directive were the
+function-like macro invocation not present.
+
+If, within a macro invocation, that macro is redefined, then the new
+definition takes effect in time for argument pre-expansion, but the
+original definition is still used for argument replacement.  Here is a
+pathological example:
+
+@smallexample
+#define f(x) x x
+f (1
+#undef f
+#define f 2
+f)
+@end smallexample
+
+@noindent
+which expands to
+
+@smallexample
+1 2 1 2
+@end smallexample
+
+@noindent
+with the semantics described above.
+
+@node Macro Pitfalls
+@section Macro Pitfalls
+@cindex problems with macros
+@cindex pitfalls of macros
+
+In this section we describe some special rules that apply to macros and
+macro expansion, and point out certain cases in which the rules have
+counter-intuitive consequences that you must watch out for.
+
+@menu
+* Misnesting::
+* Operator Precedence Problems::
+* Swallowing the Semicolon::
+* Duplication of Side Effects::
+* Self-Referential Macros::
+* Argument Prescan::
+* Newlines in Arguments::
+@end menu
+
+@node Misnesting
+@subsection Misnesting
+
+When a macro is called with arguments, the arguments are substituted
+into the macro body and the result is checked, together with the rest of
+the input file, for more macro calls.  It is possible to piece together
+a macro call coming partially from the macro body and partially from the
+arguments.  For example,
+
+@smallexample
+#define twice(x) (2*(x))
+#define call_with_1(x) x(1)
+call_with_1 (twice)
+     @expansion{} twice(1)
+     @expansion{} (2*(1))
+@end smallexample
+
+Macro definitions do not have to have balanced parentheses.  By writing
+an unbalanced open parenthesis in a macro body, it is possible to create
+a macro call that begins inside the macro body but ends outside of it.
+For example,
+
+@smallexample
+#define strange(file) fprintf (file, "%s %d",
+@dots{}
+strange(stderr) p, 35)
+     @expansion{} fprintf (stderr, "%s %d", p, 35)
+@end smallexample
+
+The ability to piece together a macro call can be useful, but the use of
+unbalanced open parentheses in a macro body is just confusing, and
+should be avoided.
+
+@node Operator Precedence Problems
+@subsection Operator Precedence Problems
+@cindex parentheses in macro bodies
+
+You may have noticed that in most of the macro definition examples shown
+above, each occurrence of a macro argument name had parentheses around
+it.  In addition, another pair of parentheses usually surround the
+entire macro definition.  Here is why it is best to write macros that
+way.
+
+Suppose you define a macro as follows,
+
+@smallexample
+#define ceil_div(x, y) (x + y - 1) / y
+@end smallexample
+
+@noindent
+whose purpose is to divide, rounding up.  (One use for this operation is
+to compute how many @code{int} objects are needed to hold a certain
+number of @code{char} objects.)  Then suppose it is used as follows:
+
+@smallexample
+a = ceil_div (b & c, sizeof (int));
+     @expansion{} a = (b & c + sizeof (int) - 1) / sizeof (int);
+@end smallexample
+
+@noindent
+This does not do what is intended.  The operator-precedence rules of
+C make it equivalent to this:
+
+@smallexample
+a = (b & (c + sizeof (int) - 1)) / sizeof (int);
+@end smallexample
+
+@noindent
+What we want is this:
+
+@smallexample
+a = ((b & c) + sizeof (int) - 1)) / sizeof (int);
+@end smallexample
+
+@noindent
+Defining the macro as
+
+@smallexample
+#define ceil_div(x, y) ((x) + (y) - 1) / (y)
+@end smallexample
+
+@noindent
+provides the desired result.
+
+Unintended grouping can result in another way.  Consider @code{sizeof
+ceil_div(1, 2)}.  That has the appearance of a C expression that would
+compute the size of the type of @code{ceil_div (1, 2)}, but in fact it
+means something very different.  Here is what it expands to:
+
+@smallexample
+sizeof ((1) + (2) - 1) / (2)
+@end smallexample
+
+@noindent
+This would take the size of an integer and divide it by two.  The
+precedence rules have put the division outside the @code{sizeof} when it
+was intended to be inside.
+
+Parentheses around the entire macro definition prevent such problems.
+Here, then, is the recommended way to define @code{ceil_div}:
+
+@smallexample
+#define ceil_div(x, y) (((x) + (y) - 1) / (y))
+@end smallexample
+
+@node Swallowing the Semicolon
+@subsection Swallowing the Semicolon
+@cindex semicolons (after macro calls)
+
+Often it is desirable to define a macro that expands into a compound
+statement.  Consider, for example, the following macro, that advances a
+pointer (the argument @code{p} says where to find it) across whitespace
+characters:
+
+@smallexample
+#define SKIP_SPACES(p, limit)  \
+@{ char *lim = (limit);         \
+  while (p < lim) @{            \
+    if (*p++ != ' ') @{         \
+      p--; break; @}@}@}
+@end smallexample
+
+@noindent
+Here backslash-newline is used to split the macro definition, which must
+be a single logical line, so that it resembles the way such code would
+be laid out if not part of a macro definition.
+
+A call to this macro might be @code{SKIP_SPACES (p, lim)}.  Strictly
+speaking, the call expands to a compound statement, which is a complete
+statement with no need for a semicolon to end it.  However, since it
+looks like a function call, it minimizes confusion if you can use it
+like a function call, writing a semicolon afterward, as in
+@code{SKIP_SPACES (p, lim);}
+
+This can cause trouble before @code{else} statements, because the
+semicolon is actually a null statement.  Suppose you write
+
+@smallexample
+if (*p != 0)
+  SKIP_SPACES (p, lim);
+else @dots{}
+@end smallexample
+
+@noindent
+The presence of two statements---the compound statement and a null
+statement---in between the @code{if} condition and the @code{else}
+makes invalid C code.
+
+The definition of the macro @code{SKIP_SPACES} can be altered to solve
+this problem, using a @code{do @dots{} while} statement.  Here is how:
+
+@smallexample
+#define SKIP_SPACES(p, limit)     \
+do @{ char *lim = (limit);         \
+     while (p < lim) @{            \
+       if (*p++ != ' ') @{         \
+         p--; break; @}@}@}          \
+while (0)
+@end smallexample
+
+Now @code{SKIP_SPACES (p, lim);} expands into
+
+@smallexample
+do @{@dots{}@} while (0);
+@end smallexample
+
+@noindent
+which is one statement.  The loop executes exactly once; most compilers
+generate no extra code for it.
+
+@node Duplication of Side Effects
+@subsection Duplication of Side Effects
+
+@cindex side effects (in macro arguments)
+@cindex unsafe macros
+Many C programs define a macro @code{min}, for ``minimum'', like this:
+
+@smallexample
+#define min(X, Y)  ((X) < (Y) ? (X) : (Y))
+@end smallexample
+
+When you use this macro with an argument containing a side effect,
+as shown here,
+
+@smallexample
+next = min (x + y, foo (z));
+@end smallexample
+
+@noindent
+it expands as follows:
+
+@smallexample
+next = ((x + y) < (foo (z)) ? (x + y) : (foo (z)));
+@end smallexample
+
+@noindent
+where @code{x + y} has been substituted for @code{X} and @code{foo (z)}
+for @code{Y}.
+
+The function @code{foo} is used only once in the statement as it appears
+in the program, but the expression @code{foo (z)} has been substituted
+twice into the macro expansion.  As a result, @code{foo} might be called
+two times when the statement is executed.  If it has side effects or if
+it takes a long time to compute, the results might not be what you
+intended.  We say that @code{min} is an @dfn{unsafe} macro.
+
+The best solution to this problem is to define @code{min} in a way that
+computes the value of @code{foo (z)} only once.  The C language offers
+no standard way to do this, but it can be done with GNU extensions as
+follows:
+
+@smallexample
+#define min(X, Y)                \
+(@{ typeof (X) x_ = (X);          \
+   typeof (Y) y_ = (Y);          \
+   (x_ < y_) ? x_ : y_; @})
+@end smallexample
+
+The @samp{(@{ @dots{} @})} notation produces a compound statement that
+acts as an expression.  Its value is the value of its last statement.
+This permits us to define local variables and assign each argument to
+one.  The local variables have underscores after their names to reduce
+the risk of conflict with an identifier of wider scope (it is impossible
+to avoid this entirely).  Now each argument is evaluated exactly once.
+
+If you do not wish to use GNU C extensions, the only solution is to be
+careful when @emph{using} the macro @code{min}.  For example, you can
+calculate the value of @code{foo (z)}, save it in a variable, and use
+that variable in @code{min}:
+
+@smallexample
+@group
+#define min(X, Y)  ((X) < (Y) ? (X) : (Y))
+@dots{}
+@{
+  int tem = foo (z);
+  next = min (x + y, tem);
+@}
+@end group
+@end smallexample
+
+@noindent
+(where we assume that @code{foo} returns type @code{int}).
+
+@node Self-Referential Macros
+@subsection Self-Referential Macros
+@cindex self-reference
+
+A @dfn{self-referential} macro is one whose name appears in its
+definition.  Recall that all macro definitions are rescanned for more
+macros to replace.  If the self-reference were considered a use of the
+macro, it would produce an infinitely large expansion.  To prevent this,
+the self-reference is not considered a macro call.  It is passed into
+the preprocessor output unchanged.  Consider an example:
+
+@smallexample
+#define foo (4 + foo)
+@end smallexample
+
+@noindent
+where @code{foo} is also a variable in your program.
+
+Following the ordinary rules, each reference to @code{foo} will expand
+into @code{(4 + foo)}; then this will be rescanned and will expand into
+@code{(4 + (4 + foo))}; and so on until the computer runs out of memory.
+
+The self-reference rule cuts this process short after one step, at
+@code{(4 + foo)}.  Therefore, this macro definition has the possibly
+useful effect of causing the program to add 4 to the value of @code{foo}
+wherever @code{foo} is referred to.
+
+In most cases, it is a bad idea to take advantage of this feature.  A
+person reading the program who sees that @code{foo} is a variable will
+not expect that it is a macro as well.  The reader will come across the
+identifier @code{foo} in the program and think its value should be that
+of the variable @code{foo}, whereas in fact the value is four greater.
+
+One common, useful use of self-reference is to create a macro which
+expands to itself.  If you write
+
+@smallexample
+#define EPERM EPERM
+@end smallexample
+
+@noindent
+then the macro @code{EPERM} expands to @code{EPERM}.  Effectively, it is
+left alone by the preprocessor whenever it's used in running text.  You
+can tell that it's a macro with @samp{#ifdef}.  You might do this if you
+want to define numeric constants with an @code{enum}, but have
+@samp{#ifdef} be true for each constant.
+
+If a macro @code{x} expands to use a macro @code{y}, and the expansion of
+@code{y} refers to the macro @code{x}, that is an @dfn{indirect
+self-reference} of @code{x}.  @code{x} is not expanded in this case
+either.  Thus, if we have
+
+@smallexample
+#define x (4 + y)
+#define y (2 * x)
+@end smallexample
+
+@noindent
+then @code{x} and @code{y} expand as follows:
+
+@smallexample
+@group
+x    @expansion{} (4 + y)
+     @expansion{} (4 + (2 * x))
+
+y    @expansion{} (2 * x)
+     @expansion{} (2 * (4 + y))
+@end group
+@end smallexample
+
+@noindent
+Each macro is expanded when it appears in the definition of the other
+macro, but not when it indirectly appears in its own definition.
+
+@node Argument Prescan
+@subsection Argument Prescan
+@cindex expansion of arguments
+@cindex macro argument expansion
+@cindex prescan of macro arguments
+
+Macro arguments are completely macro-expanded before they are
+substituted into a macro body, unless they are stringified or pasted
+with other tokens.  After substitution, the entire macro body, including
+the substituted arguments, is scanned again for macros to be expanded.
+The result is that the arguments are scanned @emph{twice} to expand
+macro calls in them.
+
+Most of the time, this has no effect.  If the argument contained any
+macro calls, they are expanded during the first scan.  The result
+therefore contains no macro calls, so the second scan does not change
+it.  If the argument were substituted as given, with no prescan, the
+single remaining scan would find the same macro calls and produce the
+same results.
+
+You might expect the double scan to change the results when a
+self-referential macro is used in an argument of another macro
+(@pxref{Self-Referential Macros}): the self-referential macro would be
+expanded once in the first scan, and a second time in the second scan.
+However, this is not what happens.  The self-references that do not
+expand in the first scan are marked so that they will not expand in the
+second scan either.
+
+You might wonder, ``Why mention the prescan, if it makes no difference?
+And why not skip it and make the preprocessor faster?''  The answer is
+that the prescan does make a difference in three special cases:
+
+@itemize @bullet
+@item
+Nested calls to a macro.
+
+We say that @dfn{nested} calls to a macro occur when a macro's argument
+contains a call to that very macro.  For example, if @code{f} is a macro
+that expects one argument, @code{f (f (1))} is a nested pair of calls to
+@code{f}.  The desired expansion is made by expanding @code{f (1)} and
+substituting that into the definition of @code{f}.  The prescan causes
+the expected result to happen.  Without the prescan, @code{f (1)} itself
+would be substituted as an argument, and the inner use of @code{f} would
+appear during the main scan as an indirect self-reference and would not
+be expanded.
+
+@item
+Macros that call other macros that stringify or concatenate.
+
+If an argument is stringified or concatenated, the prescan does not
+occur.  If you @emph{want} to expand a macro, then stringify or
+concatenate its expansion, you can do that by causing one macro to call
+another macro that does the stringification or concatenation.  For
+instance, if you have
+
+@smallexample
+#define AFTERX(x) X_ ## x
+#define XAFTERX(x) AFTERX(x)
+#define TABLESIZE 1024
+#define BUFSIZE TABLESIZE
+@end smallexample
+
+then @code{AFTERX(BUFSIZE)} expands to @code{X_BUFSIZE}, and
+@code{XAFTERX(BUFSIZE)} expands to @code{X_1024}.  (Not to
+@code{X_TABLESIZE}.  Prescan always does a complete expansion.)
+
+@item
+Macros used in arguments, whose expansions contain unshielded commas.
+
+This can cause a macro expanded on the second scan to be called with the
+wrong number of arguments.  Here is an example:
+
+@smallexample
+#define foo  a,b
+#define bar(x) lose(x)
+#define lose(x) (1 + (x))
+@end smallexample
+
+We would like @code{bar(foo)} to turn into @code{(1 + (foo))}, which
+would then turn into @code{(1 + (a,b))}.  Instead, @code{bar(foo)}
+expands into @code{lose(a,b)}, and you get an error because @code{lose}
+requires a single argument.  In this case, the problem is easily solved
+by the same parentheses that ought to be used to prevent misnesting of
+arithmetic operations:
+
+@smallexample
+#define foo (a,b)
+@exdent or
+#define bar(x) lose((x))
+@end smallexample
+
+The extra pair of parentheses prevents the comma in @code{foo}'s
+definition from being interpreted as an argument separator.
+
+@end itemize
+
+@node Newlines in Arguments
+@subsection Newlines in Arguments
+@cindex newlines in macro arguments
+
+The invocation of a function-like macro can extend over many logical
+lines.  However, in the present implementation, the entire expansion
+comes out on one line.  Thus line numbers emitted by the compiler or
+debugger refer to the line the invocation started on, which might be
+different to the line containing the argument causing the problem.
+
+Here is an example illustrating this:
+
+@smallexample
+#define ignore_second_arg(a,b,c) a; c
+
+ignore_second_arg (foo (),
+                   ignored (),
+                   syntax error);
+@end smallexample
+
+@noindent
+The syntax error triggered by the tokens @code{syntax error} results in
+an error message citing line three---the line of ignore_second_arg---
+even though the problematic code comes from line five.
+
+We consider this a bug, and intend to fix it in the near future.
+
+@node Conditionals
+@chapter Conditionals
+@cindex conditionals
+
+A @dfn{conditional} is a directive that instructs the preprocessor to
+select whether or not to include a chunk of code in the final token
+stream passed to the compiler.  Preprocessor conditionals can test
+arithmetic expressions, or whether a name is defined as a macro, or both
+simultaneously using the special @code{defined} operator.
+
+A conditional in the C preprocessor resembles in some ways an @code{if}
+statement in C, but it is important to understand the difference between
+them.  The condition in an @code{if} statement is tested during the
+execution of your program.  Its purpose is to allow your program to
+behave differently from run to run, depending on the data it is
+operating on.  The condition in a preprocessing conditional directive is
+tested when your program is compiled.  Its purpose is to allow different
+code to be included in the program depending on the situation at the
+time of compilation.
+
+However, the distinction is becoming less clear.  Modern compilers often
+do test @code{if} statements when a program is compiled, if their
+conditions are known not to vary at run time, and eliminate code which
+can never be executed.  If you can count on your compiler to do this,
+you may find that your program is more readable if you use @code{if}
+statements with constant conditions (perhaps determined by macros).  Of
+course, you can only use this to exclude code, not type definitions or
+other preprocessing directives, and you can only do it if the code
+remains syntactically valid when it is not to be used.
+
+GCC version 3 eliminates this kind of never-executed code even when
+not optimizing.  Older versions did it only when optimizing.
+
+@menu
+* Conditional Uses::
+* Conditional Syntax::
+* Deleted Code::
+@end menu
+
+@node Conditional Uses
+@section Conditional Uses
+
+There are three general reasons to use a conditional.
+
+@itemize @bullet
+@item
+A program may need to use different code depending on the machine or
+operating system it is to run on.  In some cases the code for one
+operating system may be erroneous on another operating system; for
+example, it might refer to data types or constants that do not exist on
+the other system.  When this happens, it is not enough to avoid
+executing the invalid code.  Its mere presence will cause the compiler
+to reject the program.  With a preprocessing conditional, the offending
+code can be effectively excised from the program when it is not valid.
+
+@item
+You may want to be able to compile the same source file into two
+different programs.  One version might make frequent time-consuming
+consistency checks on its intermediate data, or print the values of
+those data for debugging, and the other not.
+
+@item
+A conditional whose condition is always false is one way to exclude code
+from the program but keep it as a sort of comment for future reference.
+@end itemize
+
+Simple programs that do not need system-specific logic or complex
+debugging hooks generally will not need to use preprocessing
+conditionals.
+
+@node Conditional Syntax
+@section Conditional Syntax
+
+@findex #if
+A conditional in the C preprocessor begins with a @dfn{conditional
+directive}: @samp{#if}, @samp{#ifdef} or @samp{#ifndef}.
+
+@menu
+* Ifdef::
+* If::
+* Defined::
+* Else::
+* Elif::
+@end menu
+
+@node Ifdef
+@subsection Ifdef
+@findex #ifdef
+@findex #endif
+
+The simplest sort of conditional is
+
+@smallexample
+@group
+#ifdef @var{MACRO}
+
+@var{controlled text}
+
+#endif /* @var{MACRO} */
+@end group
+@end smallexample
+
+@cindex conditional group
+This block is called a @dfn{conditional group}.  @var{controlled text}
+will be included in the output of the preprocessor if and only if
+@var{MACRO} is defined.  We say that the conditional @dfn{succeeds} if
+@var{MACRO} is defined, @dfn{fails} if it is not.
+
+The @var{controlled text} inside of a conditional can include
+preprocessing directives.  They are executed only if the conditional
+succeeds.  You can nest conditional groups inside other conditional
+groups, but they must be completely nested.  In other words,
+@samp{#endif} always matches the nearest @samp{#ifdef} (or
+@samp{#ifndef}, or @samp{#if}).  Also, you cannot start a conditional
+group in one file and end it in another.
+
+Even if a conditional fails, the @var{controlled text} inside it is
+still run through initial transformations and tokenization.  Therefore,
+it must all be lexically valid C@.  Normally the only way this matters is
+that all comments and string literals inside a failing conditional group
+must still be properly ended.
+
+The comment following the @samp{#endif} is not required, but it is a
+good practice if there is a lot of @var{controlled text}, because it
+helps people match the @samp{#endif} to the corresponding @samp{#ifdef}.
+Older programs sometimes put @var{MACRO} directly after the
+@samp{#endif} without enclosing it in a comment.  This is invalid code
+according to the C standard.  CPP accepts it with a warning.  It
+never affects which @samp{#ifndef} the @samp{#endif} matches.
+
+@findex #ifndef
+Sometimes you wish to use some code if a macro is @emph{not} defined.
+You can do this by writing @samp{#ifndef} instead of @samp{#ifdef}.
+One common use of @samp{#ifndef} is to include code only the first
+time a header file is included.  @xref{Once-Only Headers}.
+
+Macro definitions can vary between compilations for several reasons.
+Here are some samples.
+
+@itemize @bullet
+@item
+Some macros are predefined on each kind of machine
+(@pxref{System-specific Predefined Macros}).  This allows you to provide
+code specially tuned for a particular machine.
+
+@item
+System header files define more macros, associated with the features
+they implement.  You can test these macros with conditionals to avoid
+using a system feature on a machine where it is not implemented.
+
+@item
+Macros can be defined or undefined with the @option{-D} and @option{-U}
+command line options when you compile the program.  You can arrange to
+compile the same source file into two different programs by choosing a
+macro name to specify which program you want, writing conditionals to
+test whether or how this macro is defined, and then controlling the
+state of the macro with command line options, perhaps set in the
+Makefile.  @xref{Invocation}.
+
+@item
+Your program might have a special header file (often called
+@file{config.h}) that is adjusted when the program is compiled.  It can
+define or not define macros depending on the features of the system and
+the desired capabilities of the program.  The adjustment can be
+automated by a tool such as @command{autoconf}, or done by hand.
+@end itemize
+
+@node If
+@subsection If
+
+The @samp{#if} directive allows you to test the value of an arithmetic
+expression, rather than the mere existence of one macro.  Its syntax is
+
+@smallexample
+@group
+#if @var{expression}
+
+@var{controlled text}
+
+#endif /* @var{expression} */
+@end group
+@end smallexample
+
+@var{expression} is a C expression of integer type, subject to stringent
+restrictions.  It may contain
+
+@itemize @bullet
+@item
+Integer constants.
+
+@item
+Character constants, which are interpreted as they would be in normal
+code.
+
+@item
+Arithmetic operators for addition, subtraction, multiplication,
+division, bitwise operations, shifts, comparisons, and logical
+operations (@code{&&} and @code{||}).  The latter two obey the usual
+short-circuiting rules of standard C@.
+
+@item
+Macros.  All macros in the expression are expanded before actual
+computation of the expression's value begins.
+
+@item
+Uses of the @code{defined} operator, which lets you check whether macros
+are defined in the middle of an @samp{#if}.
+
+@item
+Identifiers that are not macros, which are all considered to be the
+number zero.  This allows you to write @code{@w{#if MACRO}} instead of
+@code{@w{#ifdef MACRO}}, if you know that MACRO, when defined, will
+always have a nonzero value.  Function-like macros used without their
+function call parentheses are also treated as zero.
+
+In some contexts this shortcut is undesirable.  The @option{-Wundef}
+option causes GCC to warn whenever it encounters an identifier which is
+not a macro in an @samp{#if}.
+@end itemize
+
+The preprocessor does not know anything about types in the language.
+Therefore, @code{sizeof} operators are not recognized in @samp{#if}, and
+neither are @code{enum} constants.  They will be taken as identifiers
+which are not macros, and replaced by zero.  In the case of
+@code{sizeof}, this is likely to cause the expression to be invalid.
+
+The preprocessor calculates the value of @var{expression}.  It carries
+out all calculations in the widest integer type known to the compiler;
+on most machines supported by GCC this is 64 bits.  This is not the same
+rule as the compiler uses to calculate the value of a constant
+expression, and may give different results in some cases.  If the value
+comes out to be nonzero, the @samp{#if} succeeds and the @var{controlled
+text} is included; otherwise it is skipped.
+
+@node Defined
+@subsection Defined
+
+@cindex @code{defined}
+The special operator @code{defined} is used in @samp{#if} and
+@samp{#elif} expressions to test whether a certain name is defined as a
+macro.  @code{defined @var{name}} and @code{defined (@var{name})} are
+both expressions whose value is 1 if @var{name} is defined as a macro at
+the current point in the program, and 0 otherwise.  Thus,  @code{@w{#if
+defined MACRO}} is precisely equivalent to @code{@w{#ifdef MACRO}}.
+
+@code{defined} is useful when you wish to test more than one macro for
+existence at once.  For example,
+
+@smallexample
+#if defined (__vax__) || defined (__ns16000__)
+@end smallexample
+
+@noindent
+would succeed if either of the names @code{__vax__} or
+@code{__ns16000__} is defined as a macro.
+
+Conditionals written like this:
+
+@smallexample
+#if defined BUFSIZE && BUFSIZE >= 1024
+@end smallexample
+
+@noindent
+can generally be simplified to just @code{@w{#if BUFSIZE >= 1024}},
+since if @code{BUFSIZE} is not defined, it will be interpreted as having
+the value zero.
+
+If the @code{defined} operator appears as a result of a macro expansion,
+the C standard says the behavior is undefined.  GNU cpp treats it as a
+genuine @code{defined} operator and evaluates it normally.  It will warn
+wherever your code uses this feature if you use the command-line option
+@option{-pedantic}, since other compilers may handle it differently.
+
+@node Else
+@subsection Else
+
+@findex #else
+The @samp{#else} directive can be added to a conditional to provide
+alternative text to be used if the condition fails.  This is what it
+looks like:
+
+@smallexample
+@group
+#if @var{expression}
+@var{text-if-true}
+#else /* Not @var{expression} */
+@var{text-if-false}
+#endif /* Not @var{expression} */
+@end group
+@end smallexample
+
+@noindent
+If @var{expression} is nonzero, the @var{text-if-true} is included and
+the @var{text-if-false} is skipped.  If @var{expression} is zero, the
+opposite happens.
+
+You can use @samp{#else} with @samp{#ifdef} and @samp{#ifndef}, too.
+
+@node Elif
+@subsection Elif
+
+@findex #elif
+One common case of nested conditionals is used to check for more than two
+possible alternatives.  For example, you might have
+
+@smallexample
+#if X == 1
+@dots{}
+#else /* X != 1 */
+#if X == 2
+@dots{}
+#else /* X != 2 */
+@dots{}
+#endif /* X != 2 */
+#endif /* X != 1 */
+@end smallexample
+
+Another conditional directive, @samp{#elif}, allows this to be
+abbreviated as follows:
+
+@smallexample
+#if X == 1
+@dots{}
+#elif X == 2
+@dots{}
+#else /* X != 2 and X != 1*/
+@dots{}
+#endif /* X != 2 and X != 1*/
+@end smallexample
+
+@samp{#elif} stands for ``else if''.  Like @samp{#else}, it goes in the
+middle of a conditional group and subdivides it; it does not require a
+matching @samp{#endif} of its own.  Like @samp{#if}, the @samp{#elif}
+directive includes an expression to be tested.  The text following the
+@samp{#elif} is processed only if the original @samp{#if}-condition
+failed and the @samp{#elif} condition succeeds.
+
+More than one @samp{#elif} can go in the same conditional group.  Then
+the text after each @samp{#elif} is processed only if the @samp{#elif}
+condition succeeds after the original @samp{#if} and all previous
+@samp{#elif} directives within it have failed.
+
+@samp{#else} is allowed after any number of @samp{#elif} directives, but
+@samp{#elif} may not follow @samp{#else}.
+
+@node Deleted Code
+@section Deleted Code
+@cindex commenting out code
+
+If you replace or delete a part of the program but want to keep the old
+code around for future reference, you often cannot simply comment it
+out.  Block comments do not nest, so the first comment inside the old
+code will end the commenting-out.  The probable result is a flood of
+syntax errors.
+
+One way to avoid this problem is to use an always-false conditional
+instead.  For instance, put @code{#if 0} before the deleted code and
+@code{#endif} after it.  This works even if the code being turned
+off contains conditionals, but they must be entire conditionals
+(balanced @samp{#if} and @samp{#endif}).
+
+Some people use @code{#ifdef notdef} instead.  This is risky, because
+@code{notdef} might be accidentally defined as a macro, and then the
+conditional would succeed.  @code{#if 0} can be counted on to fail.
+
+Do not use @code{#if 0} for comments which are not C code.  Use a real
+comment, instead.  The interior of @code{#if 0} must consist of complete
+tokens; in particular, single-quote characters must balance.  Comments
+often contain unbalanced single-quote characters (known in English as
+apostrophes).  These confuse @code{#if 0}.  They don't confuse
+@samp{/*}.
+
+@node Diagnostics
+@chapter Diagnostics
+@cindex diagnostic
+@cindex reporting errors
+@cindex reporting warnings
+
+@findex #error
+The directive @samp{#error} causes the preprocessor to report a fatal
+error.  The tokens forming the rest of the line following @samp{#error}
+are used as the error message.
+
+You would use @samp{#error} inside of a conditional that detects a
+combination of parameters which you know the program does not properly
+support.  For example, if you know that the program will not run
+properly on a VAX, you might write
+
+@smallexample
+@group
+#ifdef __vax__
+#error "Won't work on VAXen.  See comments at get_last_object."
+#endif
+@end group
+@end smallexample
+
+If you have several configuration parameters that must be set up by
+the installation in a consistent way, you can use conditionals to detect
+an inconsistency and report it with @samp{#error}.  For example,
+
+@smallexample
+#if !defined(UNALIGNED_INT_ASM_OP) && defined(DWARF2_DEBUGGING_INFO)
+#error "DWARF2_DEBUGGING_INFO requires UNALIGNED_INT_ASM_OP."
+#endif
+@end smallexample
+
+@findex #warning
+The directive @samp{#warning} is like @samp{#error}, but causes the
+preprocessor to issue a warning and continue preprocessing.  The tokens
+following @samp{#warning} are used as the warning message.
+
+You might use @samp{#warning} in obsolete header files, with a message
+directing the user to the header file which should be used instead.
+
+Neither @samp{#error} nor @samp{#warning} macro-expands its argument.
+Internal whitespace sequences are each replaced with a single space.
+The line must consist of complete tokens.  It is wisest to make the
+argument of these directives be a single string constant; this avoids
+problems with apostrophes and the like.
+
+@node Line Control
+@chapter Line Control
+@cindex line control
+
+The C preprocessor informs the C compiler of the location in your source
+code where each token came from.  Presently, this is just the file name
+and line number.  All the tokens resulting from macro expansion are
+reported as having appeared on the line of the source file where the
+outermost macro was used.  We intend to be more accurate in the future.
+
+If you write a program which generates source code, such as the
+@command{bison} parser generator, you may want to adjust the preprocessor's
+notion of the current file name and line number by hand.  Parts of the
+output from @command{bison} are generated from scratch, other parts come
+from a standard parser file.  The rest are copied verbatim from
+@command{bison}'s input.  You would like compiler error messages and
+symbolic debuggers to be able to refer to @code{bison}'s input file.
+
+@findex #line
+@command{bison} or any such program can arrange this by writing
+@samp{#line} directives into the output file.  @samp{#line} is a
+directive that specifies the original line number and source file name
+for subsequent input in the current preprocessor input file.
+@samp{#line} has three variants:
+
+@table @code
+@item #line @var{linenum}
+@var{linenum} is a non-negative decimal integer constant.  It specifies
+the line number which should be reported for the following line of
+input.  Subsequent lines are counted from @var{linenum}.
+
+@item #line @var{linenum} @var{filename}
+@var{linenum} is the same as for the first form, and has the same
+effect.  In addition, @var{filename} is a string constant.  The
+following line and all subsequent lines are reported to come from the
+file it specifies, until something else happens to change that.
+@var{filename} is interpreted according to the normal rules for a string
+constant: backslash escapes are interpreted.  This is different from
+@samp{#include}.
+
+Previous versions of CPP did not interpret escapes in @samp{#line};
+we have changed it because the standard requires they be interpreted,
+and most other compilers do.
+
+@item #line @var{anything else}
+@var{anything else} is checked for macro calls, which are expanded.
+The result should match one of the above two forms.
+@end table
+
+@samp{#line} directives alter the results of the @code{__FILE__} and
+@code{__LINE__} predefined macros from that point on.  @xref{Standard
+Predefined Macros}.  They do not have any effect on @samp{#include}'s
+idea of the directory containing the current file.  This is a change
+from GCC 2.95.  Previously, a file reading
+
+@smallexample
+#line 1 "../src/gram.y"
+#include "gram.h"
+@end smallexample
+
+would search for @file{gram.h} in @file{../src}, then the @option{-I}
+chain; the directory containing the physical source file would not be
+searched.  In GCC 3.0 and later, the @samp{#include} is not affected by
+the presence of a @samp{#line} referring to a different directory.
+
+We made this change because the old behavior caused problems when
+generated source files were transported between machines.  For instance,
+it is common practice to ship generated parsers with a source release,
+so that people building the distribution do not need to have yacc or
+Bison installed.  These files frequently have @samp{#line} directives
+referring to the directory tree of the system where the distribution was
+created.  If GCC tries to search for headers in those directories, the
+build is likely to fail.
+
+The new behavior can cause failures too, if the generated file is not
+in the same directory as its source and it attempts to include a header
+which would be visible searching from the directory containing the
+source file.  However, this problem is easily solved with an additional
+@option{-I} switch on the command line.  The failures caused by the old
+semantics could sometimes be corrected only by editing the generated
+files, which is difficult and error-prone.
+
+@node Pragmas
+@chapter Pragmas
+
+The @samp{#pragma} directive is the method specified by the C standard
+for providing additional information to the compiler, beyond what is
+conveyed in the language itself.  Three forms of this directive
+(commonly known as @dfn{pragmas}) are specified by the 1999 C standard.
+A C compiler is free to attach any meaning it likes to other pragmas.
+
+GCC has historically preferred to use extensions to the syntax of the
+language, such as @code{__attribute__}, for this purpose.  However, GCC
+does define a few pragmas of its own.  These mostly have effects on the
+entire translation unit or source file.
+
+In GCC version 3, all GNU-defined, supported pragmas have been given a
+@code{GCC} prefix.  This is in line with the @code{STDC} prefix on all
+pragmas defined by C99.  For backward compatibility, pragmas which were
+recognized by previous versions are still recognized without the
+@code{GCC} prefix, but that usage is deprecated.  Some older pragmas are
+deprecated in their entirety.  They are not recognized with the
+@code{GCC} prefix.  @xref{Obsolete Features}.
+
+@cindex @code{_Pragma}
+C99 introduces the @code{@w{_Pragma}} operator.  This feature addresses a
+major problem with @samp{#pragma}: being a directive, it cannot be
+produced as the result of macro expansion.  @code{@w{_Pragma}} is an
+operator, much like @code{sizeof} or @code{defined}, and can be embedded
+in a macro.
+
+Its syntax is @code{@w{_Pragma (@var{string-literal})}}, where
+@var{string-literal} can be either a normal or wide-character string
+literal.  It is destringized, by replacing all @samp{\\} with a single
+@samp{\} and all @samp{\"} with a @samp{"}.  The result is then
+processed as if it had appeared as the right hand side of a
+@samp{#pragma} directive.  For example,
+
+@smallexample
+_Pragma ("GCC dependency \"parse.y\"")
+@end smallexample
+
+@noindent
+has the same effect as @code{#pragma GCC dependency "parse.y"}.  The
+same effect could be achieved using macros, for example
+
+@smallexample
+#define DO_PRAGMA(x) _Pragma (#x)
+DO_PRAGMA (GCC dependency "parse.y")
+@end smallexample
+
+The standard is unclear on where a @code{_Pragma} operator can appear.
+The preprocessor does not accept it within a preprocessing conditional
+directive like @samp{#if}.  To be safe, you are probably best keeping it
+out of directives other than @samp{#define}, and putting it on a line of
+its own.
+
+This manual documents the pragmas which are meaningful to the
+preprocessor itself.  Other pragmas are meaningful to the C or C++
+compilers.  They are documented in the GCC manual.
+
+GCC plugins may provide their own pragmas.
+
+@ftable @code
+@item #pragma GCC dependency
+@code{#pragma GCC dependency} allows you to check the relative dates of
+the current file and another file.  If the other file is more recent than
+the current file, a warning is issued.  This is useful if the current
+file is derived from the other file, and should be regenerated.  The
+other file is searched for using the normal include search path.
+Optional trailing text can be used to give more information in the
+warning message.
+
+@smallexample
+#pragma GCC dependency "parse.y"
+#pragma GCC dependency "/usr/include/time.h" rerun fixincludes
+@end smallexample
+
+@item #pragma GCC poison
+Sometimes, there is an identifier that you want to remove completely
+from your program, and make sure that it never creeps back in.  To
+enforce this, you can @dfn{poison} the identifier with this pragma.
+@code{#pragma GCC poison} is followed by a list of identifiers to
+poison.  If any of those identifiers appears anywhere in the source
+after the directive, it is a hard error.  For example,
+
+@smallexample
+#pragma GCC poison printf sprintf fprintf
+sprintf(some_string, "hello");
+@end smallexample
+
+@noindent
+will produce an error.
+
+If a poisoned identifier appears as part of the expansion of a macro
+which was defined before the identifier was poisoned, it will @emph{not}
+cause an error.  This lets you poison an identifier without worrying
+about system headers defining macros that use it.
+
+For example,
+
+@smallexample
+#define strrchr rindex
+#pragma GCC poison rindex
+strrchr(some_string, 'h');
+@end smallexample
+
+@noindent
+will not produce an error.
+
+@item #pragma GCC system_header
+This pragma takes no arguments.  It causes the rest of the code in the
+current file to be treated as if it came from a system header.
+@xref{System Headers}.
+
+@end ftable
+
+@node Other Directives
+@chapter Other Directives
+
+@findex #ident
+@findex #sccs
+The @samp{#ident} directive takes one argument, a string constant.  On
+some systems, that string constant is copied into a special segment of
+the object file.  On other systems, the directive is ignored.  The
+@samp{#sccs} directive is a synonym for @samp{#ident}.
+
+These directives are not part of the C standard, but they are not
+official GNU extensions either.  What historical information we have
+been able to find, suggests they originated with System V@.
+
+@cindex null directive
+The @dfn{null directive} consists of a @samp{#} followed by a newline,
+with only whitespace (including comments) in between.  A null directive
+is understood as a preprocessing directive but has no effect on the
+preprocessor output.  The primary significance of the existence of the
+null directive is that an input line consisting of just a @samp{#} will
+produce no output, rather than a line of output containing just a
+@samp{#}.  Supposedly some old C programs contain such lines.
+
+@node Preprocessor Output
+@chapter Preprocessor Output
+
+When the C preprocessor is used with the C, C++, or Objective-C
+compilers, it is integrated into the compiler and communicates a stream
+of binary tokens directly to the compiler's parser.  However, it can
+also be used in the more conventional standalone mode, where it produces
+textual output.
+@c FIXME: Document the library interface.
+
+@cindex output format
+The output from the C preprocessor looks much like the input, except
+that all preprocessing directive lines have been replaced with blank
+lines and all comments with spaces.  Long runs of blank lines are
+discarded.
+
+The ISO standard specifies that it is implementation defined whether a
+preprocessor preserves whitespace between tokens, or replaces it with
+e.g.@: a single space.  In GNU CPP, whitespace between tokens is collapsed
+to become a single space, with the exception that the first token on a
+non-directive line is preceded with sufficient spaces that it appears in
+the same column in the preprocessed output that it appeared in the
+original source file.  This is so the output is easy to read.
+@xref{Differences from previous versions}.  CPP does not insert any
+whitespace where there was none in the original source, except where
+necessary to prevent an accidental token paste.
+
+@cindex linemarkers
+Source file name and line number information is conveyed by lines
+of the form
+
+@smallexample
+# @var{linenum} @var{filename} @var{flags}
+@end smallexample
+
+@noindent
+These are called @dfn{linemarkers}.  They are inserted as needed into
+the output (but never within a string or character constant).  They mean
+that the following line originated in file @var{filename} at line
+@var{linenum}.  @var{filename} will never contain any non-printing
+characters; they are replaced with octal escape sequences.
+
+After the file name comes zero or more flags, which are @samp{1},
+@samp{2}, @samp{3}, or @samp{4}.  If there are multiple flags, spaces
+separate them.  Here is what the flags mean:
+
+@table @samp
+@item 1
+This indicates the start of a new file.
+@item 2
+This indicates returning to a file (after having included another file).
+@item 3
+This indicates that the following text comes from a system header file,
+so certain warnings should be suppressed.
+@item 4
+This indicates that the following text should be treated as being
+wrapped in an implicit @code{extern "C"} block.
+@c maybe cross reference NO_IMPLICIT_EXTERN_C
+@end table
+
+As an extension, the preprocessor accepts linemarkers in non-assembler
+input files.  They are treated like the corresponding @samp{#line}
+directive, (@pxref{Line Control}), except that trailing flags are
+permitted, and are interpreted with the meanings described above.  If
+multiple flags are given, they must be in ascending order.
+
+Some directives may be duplicated in the output of the preprocessor.
+These are @samp{#ident} (always), @samp{#pragma} (only if the
+preprocessor does not handle the pragma itself), and @samp{#define} and
+@samp{#undef} (with certain debugging options).  If this happens, the
+@samp{#} of the directive will always be in the first column, and there
+will be no space between the @samp{#} and the directive name.  If macro
+expansion happens to generate tokens which might be mistaken for a
+duplicated directive, a space will be inserted between the @samp{#} and
+the directive name.
+
+@node Traditional Mode
+@chapter Traditional Mode
+
+Traditional (pre-standard) C preprocessing is rather different from
+the preprocessing specified by the standard.  When GCC is given the
+@option{-traditional-cpp} option, it attempts to emulate a traditional
+preprocessor.
+
+GCC versions 3.2 and later only support traditional mode semantics in
+the preprocessor, and not in the compiler front ends.  This chapter
+outlines the traditional preprocessor semantics we implemented.
+
+The implementation does not correspond precisely to the behavior of
+earlier versions of GCC, nor to any true traditional preprocessor.
+After all, inconsistencies among traditional implementations were a
+major motivation for C standardization.  However, we intend that it
+should be compatible with true traditional preprocessors in all ways
+that actually matter.
+
+@menu
+* Traditional lexical analysis::
+* Traditional macros::
+* Traditional miscellany::
+* Traditional warnings::
+@end menu
+
+@node Traditional lexical analysis
+@section Traditional lexical analysis
+
+The traditional preprocessor does not decompose its input into tokens
+the same way a standards-conforming preprocessor does.  The input is
+simply treated as a stream of text with minimal internal form.
+
+This implementation does not treat trigraphs (@pxref{trigraphs})
+specially since they were an invention of the standards committee.  It
+handles arbitrarily-positioned escaped newlines properly and splices
+the lines as you would expect; many traditional preprocessors did not
+do this.
+
+The form of horizontal whitespace in the input file is preserved in
+the output.  In particular, hard tabs remain hard tabs.  This can be
+useful if, for example, you are preprocessing a Makefile.
+
+Traditional CPP only recognizes C-style block comments, and treats the
+@samp{/*} sequence as introducing a comment only if it lies outside
+quoted text.  Quoted text is introduced by the usual single and double
+quotes, and also by an initial @samp{<} in a @code{#include}
+directive.
+
+Traditionally, comments are completely removed and are not replaced
+with a space.  Since a traditional compiler does its own tokenization
+of the output of the preprocessor, this means that comments can
+effectively be used as token paste operators.  However, comments
+behave like separators for text handled by the preprocessor itself,
+since it doesn't re-lex its input.  For example, in
+
+@smallexample
+#if foo/**/bar
+@end smallexample
+
+@noindent
+@samp{foo} and @samp{bar} are distinct identifiers and expanded
+separately if they happen to be macros.  In other words, this
+directive is equivalent to
+
+@smallexample
+#if foo bar
+@end smallexample
+
+@noindent
+rather than
+
+@smallexample
+#if foobar
+@end smallexample
+
+Generally speaking, in traditional mode an opening quote need not have
+a matching closing quote.  In particular, a macro may be defined with
+replacement text that contains an unmatched quote.  Of course, if you
+attempt to compile preprocessed output containing an unmatched quote
+you will get a syntax error.
+
+However, all preprocessing directives other than @code{#define}
+require matching quotes.  For example:
+
+@smallexample
+#define m This macro's fine and has an unmatched quote
+"/* This is not a comment.  */
+/* @r{This is a comment.  The following #include directive
+   is ill-formed.}  */
+#include <stdio.h
+@end smallexample
+
+Just as for the ISO preprocessor, what would be a closing quote can be
+escaped with a backslash to prevent the quoted text from closing.
+
+@node Traditional macros
+@section Traditional macros
+
+The major difference between traditional and ISO macros is that the
+former expand to text rather than to a token sequence.  CPP removes
+all leading and trailing horizontal whitespace from a macro's
+replacement text before storing it, but preserves the form of internal
+whitespace.
+
+One consequence is that it is legitimate for the replacement text to
+contain an unmatched quote (@pxref{Traditional lexical analysis}).  An
+unclosed string or character constant continues into the text
+following the macro call.  Similarly, the text at the end of a macro's
+expansion can run together with the text after the macro invocation to
+produce a single token.
+
+Normally comments are removed from the replacement text after the
+macro is expanded, but if the @option{-CC} option is passed on the
+command line comments are preserved.  (In fact, the current
+implementation removes comments even before saving the macro
+replacement text, but it careful to do it in such a way that the
+observed effect is identical even in the function-like macro case.)
+
+The ISO stringification operator @samp{#} and token paste operator
+@samp{##} have no special meaning.  As explained later, an effect
+similar to these operators can be obtained in a different way.  Macro
+names that are embedded in quotes, either from the main file or after
+macro replacement, do not expand.
+
+CPP replaces an unquoted object-like macro name with its replacement
+text, and then rescans it for further macros to replace.  Unlike
+standard macro expansion, traditional macro expansion has no provision
+to prevent recursion.  If an object-like macro appears unquoted in its
+replacement text, it will be replaced again during the rescan pass,
+and so on @emph{ad infinitum}.  GCC detects when it is expanding
+recursive macros, emits an error message, and continues after the
+offending macro invocation.
+
+@smallexample
+#define PLUS +
+#define INC(x) PLUS+x
+INC(foo);
+     @expansion{} ++foo;
+@end smallexample
+
+Function-like macros are similar in form but quite different in
+behavior to their ISO counterparts.  Their arguments are contained
+within parentheses, are comma-separated, and can cross physical lines.
+Commas within nested parentheses are not treated as argument
+separators.  Similarly, a quote in an argument cannot be left
+unclosed; a following comma or parenthesis that comes before the
+closing quote is treated like any other character.  There is no
+facility for handling variadic macros.
+
+This implementation removes all comments from macro arguments, unless
+the @option{-C} option is given.  The form of all other horizontal
+whitespace in arguments is preserved, including leading and trailing
+whitespace.  In particular
+
+@smallexample
+f( )
+@end smallexample
+
+@noindent
+is treated as an invocation of the macro @samp{f} with a single
+argument consisting of a single space.  If you want to invoke a
+function-like macro that takes no arguments, you must not leave any
+whitespace between the parentheses.
+
+If a macro argument crosses a new line, the new line is replaced with
+a space when forming the argument.  If the previous line contained an
+unterminated quote, the following line inherits the quoted state.
+
+Traditional preprocessors replace parameters in the replacement text
+with their arguments regardless of whether the parameters are within
+quotes or not.  This provides a way to stringize arguments.  For
+example
+
+@smallexample
+#define str(x) "x"
+str(/* @r{A comment} */some text )
+     @expansion{} "some text "
+@end smallexample
+
+@noindent
+Note that the comment is removed, but that the trailing space is
+preserved.  Here is an example of using a comment to effect token
+pasting.
+
+@smallexample
+#define suffix(x) foo_/**/x
+suffix(bar)
+     @expansion{} foo_bar
+@end smallexample
+
+@node Traditional miscellany
+@section Traditional miscellany
+
+Here are some things to be aware of when using the traditional
+preprocessor.
+
+@itemize @bullet
+@item
+Preprocessing directives are recognized only when their leading
+@samp{#} appears in the first column.  There can be no whitespace
+between the beginning of the line and the @samp{#}, but whitespace can
+follow the @samp{#}.
+
+@item
+A true traditional C preprocessor does not recognize @samp{#error} or
+@samp{#pragma}, and may not recognize @samp{#elif}.  CPP supports all
+the directives in traditional mode that it supports in ISO mode,
+including extensions, with the exception that the effects of
+@samp{#pragma GCC poison} are undefined.
+
+@item
+__STDC__ is not defined.
+
+@item
+If you use digraphs the behavior is undefined.
+
+@item
+If a line that looks like a directive appears within macro arguments,
+the behavior is undefined.
+
+@end itemize
+
+@node Traditional warnings
+@section Traditional warnings
+You can request warnings about features that did not exist, or worked
+differently, in traditional C with the @option{-Wtraditional} option.
+GCC does not warn about features of ISO C which you must use when you
+are using a conforming compiler, such as the @samp{#} and @samp{##}
+operators.
+
+Presently @option{-Wtraditional} warns about:
+
+@itemize @bullet
+@item
+Macro parameters that appear within string literals in the macro body.
+In traditional C macro replacement takes place within string literals,
+but does not in ISO C@.
+
+@item
+In traditional C, some preprocessor directives did not exist.
+Traditional preprocessors would only consider a line to be a directive
+if the @samp{#} appeared in column 1 on the line.  Therefore
+@option{-Wtraditional} warns about directives that traditional C
+understands but would ignore because the @samp{#} does not appear as the
+first character on the line.  It also suggests you hide directives like
+@samp{#pragma} not understood by traditional C by indenting them.  Some
+traditional implementations would not recognize @samp{#elif}, so it
+suggests avoiding it altogether.
+
+@item
+A function-like macro that appears without an argument list.  In some
+traditional preprocessors this was an error.  In ISO C it merely means
+that the macro is not expanded.
+
+@item
+The unary plus operator.  This did not exist in traditional C@.
+
+@item
+The @samp{U} and @samp{LL} integer constant suffixes, which were not
+available in traditional C@.  (Traditional C does support the @samp{L}
+suffix for simple long integer constants.)  You are not warned about
+uses of these suffixes in macros defined in system headers.  For
+instance, @code{UINT_MAX} may well be defined as @code{4294967295U}, but
+you will not be warned if you use @code{UINT_MAX}.
+
+You can usually avoid the warning, and the related warning about
+constants which are so large that they are unsigned, by writing the
+integer constant in question in hexadecimal, with no U suffix.  Take
+care, though, because this gives the wrong result in exotic cases.
+@end itemize
+
+@node Implementation Details
+@chapter Implementation Details
+
+Here we document details of how the preprocessor's implementation
+affects its user-visible behavior.  You should try to avoid undue
+reliance on behavior described here, as it is possible that it will
+change subtly in future implementations.
+
+Also documented here are obsolete features and changes from previous
+versions of CPP@.
+
+@menu
+* Implementation-defined behavior::
+* Implementation limits::
+* Obsolete Features::
+* Differences from previous versions::
+@end menu
+
+@node Implementation-defined behavior
+@section Implementation-defined behavior
+@cindex implementation-defined behavior
+
+This is how CPP behaves in all the cases which the C standard
+describes as @dfn{implementation-defined}.  This term means that the
+implementation is free to do what it likes, but must document its choice
+and stick to it.
+@c FIXME: Check the C++ standard for more implementation-defined stuff.
+
+@itemize @bullet
+@need 1000
+@item The mapping of physical source file multi-byte characters to the
+execution character set.
+
+The input character set can be specified using the
+@option{-finput-charset} option, while the execution character set may
+be controlled using the @option{-fexec-charset} and
+@option{-fwide-exec-charset} options.
+
+@item Identifier characters.
+@anchor{Identifier characters}
+
+The C and C++ standards allow identifiers to be composed of @samp{_}
+and the alphanumeric characters.  C++ and C99 also allow universal
+character names, and C99 further permits implementation-defined
+characters.  GCC currently only permits universal character names if
+@option{-fextended-identifiers} is used, because the implementation of
+universal character names in identifiers is experimental.
+
+GCC allows the @samp{$} character in identifiers as an extension for
+most targets.  This is true regardless of the @option{std=} switch,
+since this extension cannot conflict with standards-conforming
+programs.  When preprocessing assembler, however, dollars are not
+identifier characters by default.
+
+Currently the targets that by default do not permit @samp{$} are AVR,
+IP2K, MMIX, MIPS Irix 3, ARM aout, and PowerPC targets for the AIX
+operating system.
+
+You can override the default with @option{-fdollars-in-identifiers} or
+@option{fno-dollars-in-identifiers}.  @xref{fdollars-in-identifiers}.
+
+@item Non-empty sequences of whitespace characters.
+
+In textual output, each whitespace sequence is collapsed to a single
+space.  For aesthetic reasons, the first token on each non-directive
+line of output is preceded with sufficient spaces that it appears in the
+same column as it did in the original source file.
+
+@item The numeric value of character constants in preprocessor expressions.
+
+The preprocessor and compiler interpret character constants in the
+same way; i.e.@: escape sequences such as @samp{\a} are given the
+values they would have on the target machine.
+
+The compiler evaluates a multi-character character constant a character
+at a time, shifting the previous value left by the number of bits per
+target character, and then or-ing in the bit-pattern of the new
+character truncated to the width of a target character.  The final
+bit-pattern is given type @code{int}, and is therefore signed,
+regardless of whether single characters are signed or not (a slight
+change from versions 3.1 and earlier of GCC)@.  If there are more
+characters in the constant than would fit in the target @code{int} the
+compiler issues a warning, and the excess leading characters are
+ignored.
+
+For example, @code{'ab'} for a target with an 8-bit @code{char} would be
+interpreted as @w{@samp{(int) ((unsigned char) 'a' * 256 + (unsigned char)
+'b')}}, and @code{'\234a'} as @w{@samp{(int) ((unsigned char) '\234' *
+256 + (unsigned char) 'a')}}.
+
+@item Source file inclusion.
+
+For a discussion on how the preprocessor locates header files,
+@ref{Include Operation}.
+
+@item Interpretation of the filename resulting from a macro-expanded
+@samp{#include} directive.
+
+@xref{Computed Includes}.
+
+@item Treatment of a @samp{#pragma} directive that after macro-expansion
+results in a standard pragma.
+
+No macro expansion occurs on any @samp{#pragma} directive line, so the
+question does not arise.
+
+Note that GCC does not yet implement any of the standard
+pragmas.
+
+@end itemize
+
+@node Implementation limits
+@section Implementation limits
+@cindex implementation limits
+
+CPP has a small number of internal limits.  This section lists the
+limits which the C standard requires to be no lower than some minimum,
+and all the others known.  It is intended that there should be as few limits
+as possible.  If you encounter an undocumented or inconvenient limit,
+please report that as a bug.  @xref{Bugs, , Reporting Bugs, gcc, Using
+the GNU Compiler Collection (GCC)}.
+
+Where we say something is limited @dfn{only by available memory}, that
+means that internal data structures impose no intrinsic limit, and space
+is allocated with @code{malloc} or equivalent.  The actual limit will
+therefore depend on many things, such as the size of other things
+allocated by the compiler at the same time, the amount of memory
+consumed by other processes on the same computer, etc.
+
+@itemize @bullet
+
+@item Nesting levels of @samp{#include} files.
+
+We impose an arbitrary limit of 200 levels, to avoid runaway recursion.
+The standard requires at least 15 levels.
+
+@item Nesting levels of conditional inclusion.
+
+The C standard mandates this be at least 63.  CPP is limited only by
+available memory.
+
+@item Levels of parenthesized expressions within a full expression.
+
+The C standard requires this to be at least 63.  In preprocessor
+conditional expressions, it is limited only by available memory.
+
+@item Significant initial characters in an identifier or macro name.
+
+The preprocessor treats all characters as significant.  The C standard
+requires only that the first 63 be significant.
+
+@item Number of macros simultaneously defined in a single translation unit.
+
+The standard requires at least 4095 be possible.  CPP is limited only
+by available memory.
+
+@item Number of parameters in a macro definition and arguments in a macro call.
+
+We allow @code{USHRT_MAX}, which is no smaller than 65,535.  The minimum
+required by the standard is 127.
+
+@item Number of characters on a logical source line.
+
+The C standard requires a minimum of 4096 be permitted.  CPP places
+no limits on this, but you may get incorrect column numbers reported in
+diagnostics for lines longer than 65,535 characters.
+
+@item Maximum size of a source file.
+
+The standard does not specify any lower limit on the maximum size of a
+source file.  GNU cpp maps files into memory, so it is limited by the
+available address space.  This is generally at least two gigabytes.
+Depending on the operating system, the size of physical memory may or
+may not be a limitation.
+
+@end itemize
+
+@node Obsolete Features
+@section Obsolete Features
+
+CPP has some features which are present mainly for compatibility with
+older programs.  We discourage their use in new code.  In some cases,
+we plan to remove the feature in a future version of GCC@.
+
+@subsection Assertions
+@cindex assertions
+
+@dfn{Assertions} are a deprecated alternative to macros in writing
+conditionals to test what sort of computer or system the compiled
+program will run on.  Assertions are usually predefined, but you can
+define them with preprocessing directives or command-line options.
+
+Assertions were intended to provide a more systematic way to describe
+the compiler's target system and we added them for compatibility with
+existing compilers.  In practice they are just as unpredictable as the
+system-specific predefined macros.  In addition, they are not part of
+any standard, and only a few compilers support them.
+Therefore, the use of assertions is @strong{less} portable than the use
+of system-specific predefined macros.  We recommend you do not use them at
+all.
+
+@cindex predicates
+An assertion looks like this:
+
+@smallexample
+#@var{predicate} (@var{answer})
+@end smallexample
+
+@noindent
+@var{predicate} must be a single identifier.  @var{answer} can be any
+sequence of tokens; all characters are significant except for leading
+and trailing whitespace, and differences in internal whitespace
+sequences are ignored.  (This is similar to the rules governing macro
+redefinition.)  Thus, @code{(x + y)} is different from @code{(x+y)} but
+equivalent to @code{@w{( x + y )}}.  Parentheses do not nest inside an
+answer.
+
+@cindex testing predicates
+To test an assertion, you write it in an @samp{#if}.  For example, this
+conditional succeeds if either @code{vax} or @code{ns16000} has been
+asserted as an answer for @code{machine}.
+
+@smallexample
+#if #machine (vax) || #machine (ns16000)
+@end smallexample
+
+@noindent
+You can test whether @emph{any} answer is asserted for a predicate by
+omitting the answer in the conditional:
+
+@smallexample
+#if #machine
+@end smallexample
+
+@findex #assert
+Assertions are made with the @samp{#assert} directive.  Its sole
+argument is the assertion to make, without the leading @samp{#} that
+identifies assertions in conditionals.
+
+@smallexample
+#assert @var{predicate} (@var{answer})
+@end smallexample
+
+@noindent
+You may make several assertions with the same predicate and different
+answers.  Subsequent assertions do not override previous ones for the
+same predicate.  All the answers for any given predicate are
+simultaneously true.
+
+@cindex assertions, canceling
+@findex #unassert
+Assertions can be canceled with the @samp{#unassert} directive.  It
+has the same syntax as @samp{#assert}.  In that form it cancels only the
+answer which was specified on the @samp{#unassert} line; other answers
+for that predicate remain true.  You can cancel an entire predicate by
+leaving out the answer:
+
+@smallexample
+#unassert @var{predicate}
+@end smallexample
+
+@noindent
+In either form, if no such assertion has been made, @samp{#unassert} has
+no effect.
+
+You can also make or cancel assertions using command line options.
+@xref{Invocation}.
+
+@node Differences from previous versions
+@section Differences from previous versions
+@cindex differences from previous versions
+
+This section details behavior which has changed from previous versions
+of CPP@.  We do not plan to change it again in the near future, but
+we do not promise not to, either.
+
+The ``previous versions'' discussed here are 2.95 and before.  The
+behavior of GCC 3.0 is mostly the same as the behavior of the widely
+used 2.96 and 2.97 development snapshots.  Where there are differences,
+they generally represent bugs in the snapshots.
+
+@itemize @bullet
+
+@item -I- deprecated
+
+This option has been deprecated in 4.0.  @option{-iquote} is meant to
+replace the need for this option.
+
+@item Order of evaluation of @samp{#} and @samp{##} operators
+
+The standard does not specify the order of evaluation of a chain of
+@samp{##} operators, nor whether @samp{#} is evaluated before, after, or
+at the same time as @samp{##}.  You should therefore not write any code
+which depends on any specific ordering.  It is possible to guarantee an
+ordering, if you need one, by suitable use of nested macros.
+
+An example of where this might matter is pasting the arguments @samp{1},
+@samp{e} and @samp{-2}.  This would be fine for left-to-right pasting,
+but right-to-left pasting would produce an invalid token @samp{e-2}.
+
+GCC 3.0 evaluates @samp{#} and @samp{##} at the same time and strictly
+left to right.  Older versions evaluated all @samp{#} operators first,
+then all @samp{##} operators, in an unreliable order.
+
+@item The form of whitespace between tokens in preprocessor output
+
+@xref{Preprocessor Output}, for the current textual format.  This is
+also the format used by stringification.  Normally, the preprocessor
+communicates tokens directly to the compiler's parser, and whitespace
+does not come up at all.
+
+Older versions of GCC preserved all whitespace provided by the user and
+inserted lots more whitespace of their own, because they could not
+accurately predict when extra spaces were needed to prevent accidental
+token pasting.
+
+@item Optional argument when invoking rest argument macros
+
+As an extension, GCC permits you to omit the variable arguments entirely
+when you use a variable argument macro.  This is forbidden by the 1999 C
+standard, and will provoke a pedantic warning with GCC 3.0.  Previous
+versions accepted it silently.
+
+@item @samp{##} swallowing preceding text in rest argument macros
+
+Formerly, in a macro expansion, if @samp{##} appeared before a variable
+arguments parameter, and the set of tokens specified for that argument
+in the macro invocation was empty, previous versions of CPP would
+back up and remove the preceding sequence of non-whitespace characters
+(@strong{not} the preceding token).  This extension is in direct
+conflict with the 1999 C standard and has been drastically pared back.
+
+In the current version of the preprocessor, if @samp{##} appears between
+a comma and a variable arguments parameter, and the variable argument is
+omitted entirely, the comma will be removed from the expansion.  If the
+variable argument is empty, or the token before @samp{##} is not a
+comma, then @samp{##} behaves as a normal token paste.
+
+@item @samp{#line} and @samp{#include}
+
+The @samp{#line} directive used to change GCC's notion of the
+``directory containing the current file'', used by @samp{#include} with
+a double-quoted header file name.  In 3.0 and later, it does not.
+@xref{Line Control}, for further explanation.
+
+@item Syntax of @samp{#line}
+
+In GCC 2.95 and previous, the string constant argument to @samp{#line}
+was treated the same way as the argument to @samp{#include}: backslash
+escapes were not honored, and the string ended at the second @samp{"}.
+This is not compliant with the C standard.  In GCC 3.0, an attempt was
+made to correct the behavior, so that the string was treated as a real
+string constant, but it turned out to be buggy.  In 3.1, the bugs have
+been fixed.  (We are not fixing the bugs in 3.0 because they affect
+relatively few people and the fix is quite invasive.)
+
+@end itemize
+
+@node Invocation
+@chapter Invocation
+@cindex invocation
+@cindex command line
+
+Most often when you use the C preprocessor you will not have to invoke it
+explicitly: the C compiler will do so automatically.  However, the
+preprocessor is sometimes useful on its own.  All the options listed
+here are also acceptable to the C compiler and have the same meaning,
+except that the C compiler has different rules for specifying the output
+file.
+
+@emph{Note:} Whether you use the preprocessor by way of @command{gcc}
+or @command{cpp}, the @dfn{compiler driver} is run first.  This
+program's purpose is to translate your command into invocations of the
+programs that do the actual work.  Their command line interfaces are
+similar but not identical to the documented interface, and may change
+without notice.
+
+@ignore
+@c man begin SYNOPSIS
+cpp [@option{-D}@var{macro}[=@var{defn}]@dots{}] [@option{-U}@var{macro}]
+    [@option{-I}@var{dir}@dots{}] [@option{-iquote}@var{dir}@dots{}]
+    [@option{-W}@var{warn}@dots{}]
+    [@option{-M}|@option{-MM}] [@option{-MG}] [@option{-MF} @var{filename}]
+    [@option{-MP}] [@option{-MQ} @var{target}@dots{}]
+    [@option{-MT} @var{target}@dots{}]
+    [@option{-P}] [@option{-fno-working-directory}]
+    [@option{-x} @var{language}] [@option{-std=}@var{standard}]
+    @var{infile} @var{outfile}
+
+Only the most useful options are listed here; see below for the remainder.
+@c man end
+@c man begin SEEALSO
+gpl(7), gfdl(7), fsf-funding(7),
+gcc(1), as(1), ld(1), and the Info entries for @file{cpp}, @file{gcc}, and
+@file{binutils}.
+@c man end
+@end ignore
+
+@c man begin OPTIONS
+The C preprocessor expects two file names as arguments, @var{infile} and
+@var{outfile}.  The preprocessor reads @var{infile} together with any
+other files it specifies with @samp{#include}.  All the output generated
+by the combined input files is written in @var{outfile}.
+
+Either @var{infile} or @var{outfile} may be @option{-}, which as
+@var{infile} means to read from standard input and as @var{outfile}
+means to write to standard output.  Also, if either file is omitted, it
+means the same as if @option{-} had been specified for that file.
+
+Unless otherwise noted, or the option ends in @samp{=}, all options
+which take an argument may have that argument appear either immediately
+after the option, or with a space between option and argument:
+@option{-Ifoo} and @option{-I foo} have the same effect.
+
+@cindex grouping options
+@cindex options, grouping
+Many options have multi-letter names; therefore multiple single-letter
+options may @emph{not} be grouped: @option{-dM} is very different from
+@w{@samp{-d -M}}.
+
+@cindex options
+@include cppopts.texi
+@c man end
+
+@node Environment Variables
+@chapter Environment Variables
+@cindex environment variables
+@c man begin ENVIRONMENT
+
+This section describes the environment variables that affect how CPP
+operates.  You can use them to specify directories or prefixes to use
+when searching for include files, or to control dependency output.
+
+Note that you can also specify places to search using options such as
+@option{-I}, and control dependency output with options like
+@option{-M} (@pxref{Invocation}).  These take precedence over
+environment variables, which in turn take precedence over the
+configuration of GCC@.
+
+@include cppenv.texi
+@c man end
+
+@page
+@include fdl.texi
+
+@page
+@node Index of Directives
+@unnumbered Index of Directives
+@printindex fn
+
+@node Option Index
+@unnumbered Option Index
+@noindent
+CPP's command line options and environment variables are indexed here
+without any initial @samp{-} or @samp{--}.
+@printindex op
+
+@page
+@node Concept Index
+@unnumbered Concept Index
+@printindex cp
+
+@bye
diff --git a/gcc/doc/cppenv.texi b/gcc/doc/cppenv.texi
new file mode 100644
index 000000000..bb29cb2d1
--- /dev/null
+++ b/gcc/doc/cppenv.texi
@@ -0,0 +1,83 @@
+@c Copyright (c) 1999, 2000, 2001, 2002, 2004
+@c Free Software Foundation, Inc.
+@c This is part of the CPP and GCC manuals.
+@c For copying conditions, see the file gcc.texi.
+
+@c ---------------------------------------------------------------------
+@c Environment variables affecting the preprocessor
+@c ---------------------------------------------------------------------
+
+@c If this file is included with the flag ``cppmanual'' set, it is
+@c formatted for inclusion in the CPP manual; otherwise the main GCC manual.
+
+@vtable @env
+@item CPATH
+@itemx C_INCLUDE_PATH
+@itemx CPLUS_INCLUDE_PATH
+@itemx OBJC_INCLUDE_PATH
+@c Commented out until ObjC++ is part of GCC:
+@c @itemx OBJCPLUS_INCLUDE_PATH
+Each variable's value is a list of directories separated by a special
+character, much like @env{PATH}, in which to look for header files.
+The special character, @code{PATH_SEPARATOR}, is target-dependent and
+determined at GCC build time.  For Microsoft Windows-based targets it is a
+semicolon, and for almost all other targets it is a colon.
+
+@env{CPATH} specifies a list of directories to be searched as if
+specified with @option{-I}, but after any paths given with @option{-I}
+options on the command line.  This environment variable is used
+regardless of which language is being preprocessed.
+
+The remaining environment variables apply only when preprocessing the
+particular language indicated.  Each specifies a list of directories
+to be searched as if specified with @option{-isystem}, but after any
+paths given with @option{-isystem} options on the command line.
+
+In all these variables, an empty element instructs the compiler to
+search its current working directory.  Empty elements can appear at the
+beginning or end of a path.  For instance, if the value of
+@env{CPATH} is @code{:/special/include}, that has the same
+effect as @samp{@w{-I. -I/special/include}}.
+
+@c man end
+@ifset cppmanual
+See also @ref{Search Path}.
+@end ifset
+@c man begin ENVIRONMENT
+
+@item DEPENDENCIES_OUTPUT
+@cindex dependencies for make as output
+If this variable is set, its value specifies how to output
+dependencies for Make based on the non-system header files processed
+by the compiler.  System header files are ignored in the dependency
+output.
+
+The value of @env{DEPENDENCIES_OUTPUT} can be just a file name, in
+which case the Make rules are written to that file, guessing the target
+name from the source file name.  Or the value can have the form
+@samp{@var{file} @var{target}}, in which case the rules are written to
+file @var{file} using @var{target} as the target name.
+
+In other words, this environment variable is equivalent to combining
+the options @option{-MM} and @option{-MF}
+@ifset cppmanual
+(@pxref{Invocation}),
+@end ifset
+@ifclear cppmanual
+(@pxref{Preprocessor Options}),
+@end ifclear
+with an optional @option{-MT} switch too.
+
+@item SUNPRO_DEPENDENCIES
+@cindex dependencies for make as output
+This variable is the same as @env{DEPENDENCIES_OUTPUT} (see above),
+except that system header files are not ignored, so it implies
+@option{-M} rather than @option{-MM}.  However, the dependence on the
+main input file is omitted.
+@ifset cppmanual
+@xref{Invocation}.
+@end ifset
+@ifclear cppmanual
+@xref{Preprocessor Options}.
+@end ifclear
+@end vtable
diff --git a/gcc/doc/cppinternals.info b/gcc/doc/cppinternals.info
new file mode 100644
index 000000000..bc466ae76
--- /dev/null
+++ b/gcc/doc/cppinternals.info
@@ -0,0 +1,1036 @@
+This is doc/cppinternals.info, produced by makeinfo version 4.13 from
+/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/doc/cppinternals.texi.
+
+INFO-DIR-SECTION Software development
+START-INFO-DIR-ENTRY
+* Cpplib: (cppinternals).      Cpplib internals.
+END-INFO-DIR-ENTRY
+
+   This file documents the internals of the GNU C Preprocessor.
+
+   Copyright 2000, 2001, 2002, 2004, 2005, 2006, 2007 Free Software
+Foundation, Inc.
+
+   Permission is granted to make and distribute verbatim copies of this
+manual provided the copyright notice and this permission notice are
+preserved on all copies.
+
+   Permission is granted to copy and distribute modified versions of
+this manual under the conditions for verbatim copying, provided also
+that the entire resulting derived work is distributed under the terms
+of a permission notice identical to this one.
+
+   Permission is granted to copy and distribute translations of this
+manual into another language, under the above conditions for modified
+versions.
+
+
+File: cppinternals.info,  Node: Top,  Next: Conventions,  Up: (dir)
+
+The GNU C Preprocessor Internals
+********************************
+
+1 Cpplib--the GNU C Preprocessor
+********************************
+
+The GNU C preprocessor is implemented as a library, "cpplib", so it can
+be easily shared between a stand-alone preprocessor, and a preprocessor
+integrated with the C, C++ and Objective-C front ends.  It is also
+available for use by other programs, though this is not recommended as
+its exposed interface has not yet reached a point of reasonable
+stability.
+
+   The library has been written to be re-entrant, so that it can be used
+to preprocess many files simultaneously if necessary.  It has also been
+written with the preprocessing token as the fundamental unit; the
+preprocessor in previous versions of GCC would operate on text strings
+as the fundamental unit.
+
+   This brief manual documents the internals of cpplib, and explains
+some of the tricky issues.  It is intended that, along with the
+comments in the source code, a reasonably competent C programmer should
+be able to figure out what the code is doing, and why things have been
+implemented the way they have.
+
+* Menu:
+
+* Conventions::         Conventions used in the code.
+* Lexer::               The combined C, C++ and Objective-C Lexer.
+* Hash Nodes::          All identifiers are entered into a hash table.
+* Macro Expansion::     Macro expansion algorithm.
+* Token Spacing::       Spacing and paste avoidance issues.
+* Line Numbering::      Tracking location within files.
+* Guard Macros::        Optimizing header files with guard macros.
+* Files::               File handling.
+* Concept Index::       Index.
+
+
+File: cppinternals.info,  Node: Conventions,  Next: Lexer,  Prev: Top,  Up: Top
+
+Conventions
+***********
+
+cpplib has two interfaces--one is exposed internally only, and the
+other is for both internal and external use.
+
+   The convention is that functions and types that are exposed to
+multiple files internally are prefixed with `_cpp_', and are to be
+found in the file `internal.h'.  Functions and types exposed to external
+clients are in `cpplib.h', and prefixed with `cpp_'.  For historical
+reasons this is no longer quite true, but we should strive to stick to
+it.
+
+   We are striving to reduce the information exposed in `cpplib.h' to
+the bare minimum necessary, and then to keep it there.  This makes clear
+exactly what external clients are entitled to assume, and allows us to
+change internals in the future without worrying whether library clients
+are perhaps relying on some kind of undocumented implementation-specific
+behavior.
+
+
+File: cppinternals.info,  Node: Lexer,  Next: Hash Nodes,  Prev: Conventions,  Up: Top
+
+The Lexer
+*********
+
+Overview
+========
+
+The lexer is contained in the file `lex.c'.  It is a hand-coded lexer,
+and not implemented as a state machine.  It can understand C, C++ and
+Objective-C source code, and has been extended to allow reasonably
+successful preprocessing of assembly language.  The lexer does not make
+an initial pass to strip out trigraphs and escaped newlines, but handles
+them as they are encountered in a single pass of the input file.  It
+returns preprocessing tokens individually, not a line at a time.
+
+   It is mostly transparent to users of the library, since the library's
+interface for obtaining the next token, `cpp_get_token', takes care of
+lexing new tokens, handling directives, and expanding macros as
+necessary.  However, the lexer does expose some functionality so that
+clients of the library can easily spell a given token, such as
+`cpp_spell_token' and `cpp_token_len'.  These functions are useful when
+generating diagnostics, and for emitting the preprocessed output.
+
+Lexing a token
+==============
+
+Lexing of an individual token is handled by `_cpp_lex_direct' and its
+subroutines.  In its current form the code is quite complicated, with
+read ahead characters and such-like, since it strives to not step back
+in the character stream in preparation for handling non-ASCII file
+encodings.  The current plan is to convert any such files to UTF-8
+before processing them.  This complexity is therefore unnecessary and
+will be removed, so I'll not discuss it further here.
+
+   The job of `_cpp_lex_direct' is simply to lex a token.  It is not
+responsible for issues like directive handling, returning lookahead
+tokens directly, multiple-include optimization, or conditional block
+skipping.  It necessarily has a minor ro^le to play in memory
+management of lexed lines.  I discuss these issues in a separate section
+(*note Lexing a line::).
+
+   The lexer places the token it lexes into storage pointed to by the
+variable `cur_token', and then increments it.  This variable is
+important for correct diagnostic positioning.  Unless a specific line
+and column are passed to the diagnostic routines, they will examine the
+`line' and `col' values of the token just before the location that
+`cur_token' points to, and use that location to report the diagnostic.
+
+   The lexer does not consider whitespace to be a token in its own
+right.  If whitespace (other than a new line) precedes a token, it sets
+the `PREV_WHITE' bit in the token's flags.  Each token has its `line'
+and `col' variables set to the line and column of the first character
+of the token.  This line number is the line number in the translation
+unit, and can be converted to a source (file, line) pair using the line
+map code.
+
+   The first token on a logical, i.e. unescaped, line has the flag
+`BOL' set for beginning-of-line.  This flag is intended for internal
+use, both to distinguish a `#' that begins a directive from one that
+doesn't, and to generate a call-back to clients that want to be
+notified about the start of every non-directive line with tokens on it.
+Clients cannot reliably determine this for themselves: the first token
+might be a macro, and the tokens of a macro expansion do not have the
+`BOL' flag set.  The macro expansion may even be empty, and the next
+token on the line certainly won't have the `BOL' flag set.
+
+   New lines are treated specially; exactly how the lexer handles them
+is context-dependent.  The C standard mandates that directives are
+terminated by the first unescaped newline character, even if it appears
+in the middle of a macro expansion.  Therefore, if the state variable
+`in_directive' is set, the lexer returns a `CPP_EOF' token, which is
+normally used to indicate end-of-file, to indicate end-of-directive.
+In a directive a `CPP_EOF' token never means end-of-file.
+Conveniently, if the caller was `collect_args', it already handles
+`CPP_EOF' as if it were end-of-file, and reports an error about an
+unterminated macro argument list.
+
+   The C standard also specifies that a new line in the middle of the
+arguments to a macro is treated as whitespace.  This white space is
+important in case the macro argument is stringified.  The state variable
+`parsing_args' is nonzero when the preprocessor is collecting the
+arguments to a macro call.  It is set to 1 when looking for the opening
+parenthesis to a function-like macro, and 2 when collecting the actual
+arguments up to the closing parenthesis, since these two cases need to
+be distinguished sometimes.  One such time is here: the lexer sets the
+`PREV_WHITE' flag of a token if it meets a new line when `parsing_args'
+is set to 2.  It doesn't set it if it meets a new line when
+`parsing_args' is 1, since then code like
+
+     #define foo() bar
+     foo
+     baz
+
+would be output with an erroneous space before `baz':
+
+     foo
+      baz
+
+   This is a good example of the subtlety of getting token spacing
+correct in the preprocessor; there are plenty of tests in the testsuite
+for corner cases like this.
+
+   The lexer is written to treat each of `\r', `\n', `\r\n' and `\n\r'
+as a single new line indicator.  This allows it to transparently
+preprocess MS-DOS, Macintosh and Unix files without their needing to
+pass through a special filter beforehand.
+
+   We also decided to treat a backslash, either `\' or the trigraph
+`??/', separated from one of the above newline indicators by
+non-comment whitespace only, as intending to escape the newline.  It
+tends to be a typing mistake, and cannot reasonably be mistaken for
+anything else in any of the C-family grammars.  Since handling it this
+way is not strictly conforming to the ISO standard, the library issues a
+warning wherever it encounters it.
+
+   Handling newlines like this is made simpler by doing it in one place
+only.  The function `handle_newline' takes care of all newline
+characters, and `skip_escaped_newlines' takes care of arbitrarily long
+sequences of escaped newlines, deferring to `handle_newline' to handle
+the newlines themselves.
+
+   The most painful aspect of lexing ISO-standard C and C++ is handling
+trigraphs and backlash-escaped newlines.  Trigraphs are processed before
+any interpretation of the meaning of a character is made, and
+unfortunately there is a trigraph representation for a backslash, so it
+is possible for the trigraph `??/' to introduce an escaped newline.
+
+   Escaped newlines are tedious because theoretically they can occur
+anywhere--between the `+' and `=' of the `+=' token, within the
+characters of an identifier, and even between the `*' and `/' that
+terminates a comment.  Moreover, you cannot be sure there is just
+one--there might be an arbitrarily long sequence of them.
+
+   So, for example, the routine that lexes a number, `parse_number',
+cannot assume that it can scan forwards until the first non-number
+character and be done with it, because this could be the `\'
+introducing an escaped newline, or the `?' introducing the trigraph
+sequence that represents the `\' of an escaped newline.  If it
+encounters a `?' or `\', it calls `skip_escaped_newlines' to skip over
+any potential escaped newlines before checking whether the number has
+been finished.
+
+   Similarly code in the main body of `_cpp_lex_direct' cannot simply
+check for a `=' after a `+' character to determine whether it has a
+`+=' token; it needs to be prepared for an escaped newline of some
+sort.  Such cases use the function `get_effective_char', which returns
+the first character after any intervening escaped newlines.
+
+   The lexer needs to keep track of the correct column position,
+including counting tabs as specified by the `-ftabstop=' option.  This
+should be done even within C-style comments; they can appear in the
+middle of a line, and we want to report diagnostics in the correct
+position for text appearing after the end of the comment.
+
+   Some identifiers, such as `__VA_ARGS__' and poisoned identifiers,
+may be invalid and require a diagnostic.  However, if they appear in a
+macro expansion we don't want to complain with each use of the macro.
+It is therefore best to catch them during the lexing stage, in
+`parse_identifier'.  In both cases, whether a diagnostic is needed or
+not is dependent upon the lexer's state.  For example, we don't want to
+issue a diagnostic for re-poisoning a poisoned identifier, or for using
+`__VA_ARGS__' in the expansion of a variable-argument macro.  Therefore
+`parse_identifier' makes use of state flags to determine whether a
+diagnostic is appropriate.  Since we change state on a per-token basis,
+and don't lex whole lines at a time, this is not a problem.
+
+   Another place where state flags are used to change behavior is whilst
+lexing header names.  Normally, a `<' would be lexed as a single token.
+After a `#include' directive, though, it should be lexed as a single
+token as far as the nearest `>' character.  Note that we don't allow
+the terminators of header names to be escaped; the first `"' or `>'
+terminates the header name.
+
+   Interpretation of some character sequences depends upon whether we
+are lexing C, C++ or Objective-C, and on the revision of the standard in
+force.  For example, `::' is a single token in C++, but in C it is two
+separate `:' tokens and almost certainly a syntax error.  Such cases
+are handled by `_cpp_lex_direct' based upon command-line flags stored
+in the `cpp_options' structure.
+
+   Once a token has been lexed, it leads an independent existence.  The
+spelling of numbers, identifiers and strings is copied to permanent
+storage from the original input buffer, so a token remains valid and
+correct even if its source buffer is freed with `_cpp_pop_buffer'.  The
+storage holding the spellings of such tokens remains until the client
+program calls cpp_destroy, probably at the end of the translation unit.
+
+Lexing a line
+=============
+
+When the preprocessor was changed to return pointers to tokens, one
+feature I wanted was some sort of guarantee regarding how long a
+returned pointer remains valid.  This is important to the stand-alone
+preprocessor, the future direction of the C family front ends, and even
+to cpplib itself internally.
+
+   Occasionally the preprocessor wants to be able to peek ahead in the
+token stream.  For example, after the name of a function-like macro, it
+wants to check the next token to see if it is an opening parenthesis.
+Another example is that, after reading the first few tokens of a
+`#pragma' directive and not recognizing it as a registered pragma, it
+wants to backtrack and allow the user-defined handler for unknown
+pragmas to access the full `#pragma' token stream.  The stand-alone
+preprocessor wants to be able to test the current token with the
+previous one to see if a space needs to be inserted to preserve their
+separate tokenization upon re-lexing (paste avoidance), so it needs to
+be sure the pointer to the previous token is still valid.  The
+recursive-descent C++ parser wants to be able to perform tentative
+parsing arbitrarily far ahead in the token stream, and then to be able
+to jump back to a prior position in that stream if necessary.
+
+   The rule I chose, which is fairly natural, is to arrange that the
+preprocessor lex all tokens on a line consecutively into a token buffer,
+which I call a "token run", and when meeting an unescaped new line
+(newlines within comments do not count either), to start lexing back at
+the beginning of the run.  Note that we do _not_ lex a line of tokens
+at once; if we did that `parse_identifier' would not have state flags
+available to warn about invalid identifiers (*note Invalid
+identifiers::).
+
+   In other words, accessing tokens that appeared earlier in the current
+line is valid, but since each logical line overwrites the tokens of the
+previous line, tokens from prior lines are unavailable.  In particular,
+since a directive only occupies a single logical line, this means that
+the directive handlers like the `#pragma' handler can jump around in
+the directive's tokens if necessary.
+
+   Two issues remain: what about tokens that arise from macro
+expansions, and what happens when we have a long line that overflows
+the token run?
+
+   Since we promise clients that we preserve the validity of pointers
+that we have already returned for tokens that appeared earlier in the
+line, we cannot reallocate the run.  Instead, on overflow it is
+expanded by chaining a new token run on to the end of the existing one.
+
+   The tokens forming a macro's replacement list are collected by the
+`#define' handler, and placed in storage that is only freed by
+`cpp_destroy'.  So if a macro is expanded in the line of tokens, the
+pointers to the tokens of its expansion that are returned will always
+remain valid.  However, macros are a little trickier than that, since
+they give rise to three sources of fresh tokens.  They are the built-in
+macros like `__LINE__', and the `#' and `##' operators for
+stringification and token pasting.  I handled this by allocating space
+for these tokens from the lexer's token run chain.  This means they
+automatically receive the same lifetime guarantees as lexed tokens, and
+we don't need to concern ourselves with freeing them.
+
+   Lexing into a line of tokens solves some of the token memory
+management issues, but not all.  The opening parenthesis after a
+function-like macro name might lie on a different line, and the front
+ends definitely want the ability to look ahead past the end of the
+current line.  So cpplib only moves back to the start of the token run
+at the end of a line if the variable `keep_tokens' is zero.
+Line-buffering is quite natural for the preprocessor, and as a result
+the only time cpplib needs to increment this variable is whilst looking
+for the opening parenthesis to, and reading the arguments of, a
+function-like macro.  In the near future cpplib will export an
+interface to increment and decrement this variable, so that clients can
+share full control over the lifetime of token pointers too.
+
+   The routine `_cpp_lex_token' handles moving to new token runs,
+calling `_cpp_lex_direct' to lex new tokens, or returning
+previously-lexed tokens if we stepped back in the token stream.  It also
+checks each token for the `BOL' flag, which might indicate a directive
+that needs to be handled, or require a start-of-line call-back to be
+made.  `_cpp_lex_token' also handles skipping over tokens in failed
+conditional blocks, and invalidates the control macro of the
+multiple-include optimization if a token was successfully lexed outside
+a directive.  In other words, its callers do not need to concern
+themselves with such issues.
+
+
+File: cppinternals.info,  Node: Hash Nodes,  Next: Macro Expansion,  Prev: Lexer,  Up: Top
+
+Hash Nodes
+**********
+
+When cpplib encounters an "identifier", it generates a hash code for it
+and stores it in the hash table.  By "identifier" we mean tokens with
+type `CPP_NAME'; this includes identifiers in the usual C sense, as
+well as keywords, directive names, macro names and so on.  For example,
+all of `pragma', `int', `foo' and `__GNUC__' are identifiers and hashed
+when lexed.
+
+   Each node in the hash table contain various information about the
+identifier it represents.  For example, its length and type.  At any one
+time, each identifier falls into exactly one of three categories:
+
+   * Macros
+
+     These have been declared to be macros, either on the command line
+     or with `#define'.  A few, such as `__TIME__' are built-ins
+     entered in the hash table during initialization.  The hash node
+     for a normal macro points to a structure with more information
+     about the macro, such as whether it is function-like, how many
+     arguments it takes, and its expansion.  Built-in macros are
+     flagged as special, and instead contain an enum indicating which
+     of the various built-in macros it is.
+
+   * Assertions
+
+     Assertions are in a separate namespace to macros.  To enforce
+     this, cpp actually prepends a `#' character before hashing and
+     entering it in the hash table.  An assertion's node points to a
+     chain of answers to that assertion.
+
+   * Void
+
+     Everything else falls into this category--an identifier that is not
+     currently a macro, or a macro that has since been undefined with
+     `#undef'.
+
+     When preprocessing C++, this category also includes the named
+     operators, such as `xor'.  In expressions these behave like the
+     operators they represent, but in contexts where the spelling of a
+     token matters they are spelt differently.  This spelling
+     distinction is relevant when they are operands of the stringizing
+     and pasting macro operators `#' and `##'.  Named operator hash
+     nodes are flagged, both to catch the spelling distinction and to
+     prevent them from being defined as macros.
+
+   The same identifiers share the same hash node.  Since each identifier
+token, after lexing, contains a pointer to its hash node, this is used
+to provide rapid lookup of various information.  For example, when
+parsing a `#define' statement, CPP flags each argument's identifier
+hash node with the index of that argument.  This makes duplicated
+argument checking an O(1) operation for each argument.  Similarly, for
+each identifier in the macro's expansion, lookup to see if it is an
+argument, and which argument it is, is also an O(1) operation.  Further,
+each directive name, such as `endif', has an associated directive enum
+stored in its hash node, so that directive lookup is also O(1).
+
+
+File: cppinternals.info,  Node: Macro Expansion,  Next: Token Spacing,  Prev: Hash Nodes,  Up: Top
+
+Macro Expansion Algorithm
+*************************
+
+Macro expansion is a tricky operation, fraught with nasty corner cases
+and situations that render what you thought was a nifty way to optimize
+the preprocessor's expansion algorithm wrong in quite subtle ways.
+
+   I strongly recommend you have a good grasp of how the C and C++
+standards require macros to be expanded before diving into this
+section, let alone the code!.  If you don't have a clear mental picture
+of how things like nested macro expansion, stringification and token
+pasting are supposed to work, damage to your sanity can quickly result.
+
+Internal representation of macros
+=================================
+
+The preprocessor stores macro expansions in tokenized form.  This saves
+repeated lexing passes during expansion, at the cost of a small
+increase in memory consumption on average.  The tokens are stored
+contiguously in memory, so a pointer to the first one and a token count
+is all you need to get the replacement list of a macro.
+
+   If the macro is a function-like macro the preprocessor also stores
+its parameters, in the form of an ordered list of pointers to the hash
+table entry of each parameter's identifier.  Further, in the macro's
+stored expansion each occurrence of a parameter is replaced with a
+special token of type `CPP_MACRO_ARG'.  Each such token holds the index
+of the parameter it represents in the parameter list, which allows
+rapid replacement of parameters with their arguments during expansion.
+Despite this optimization it is still necessary to store the original
+parameters to the macro, both for dumping with e.g., `-dD', and to warn
+about non-trivial macro redefinitions when the parameter names have
+changed.
+
+Macro expansion overview
+========================
+
+The preprocessor maintains a "context stack", implemented as a linked
+list of `cpp_context' structures, which together represent the macro
+expansion state at any one time.  The `struct cpp_reader' member
+variable `context' points to the current top of this stack.  The top
+normally holds the unexpanded replacement list of the innermost macro
+under expansion, except when cpplib is about to pre-expand an argument,
+in which case it holds that argument's unexpanded tokens.
+
+   When there are no macros under expansion, cpplib is in "base
+context".  All contexts other than the base context contain a
+contiguous list of tokens delimited by a starting and ending token.
+When not in base context, cpplib obtains the next token from the list
+of the top context.  If there are no tokens left in the list, it pops
+that context off the stack, and subsequent ones if necessary, until an
+unexhausted context is found or it returns to base context.  In base
+context, cpplib reads tokens directly from the lexer.
+
+   If it encounters an identifier that is both a macro and enabled for
+expansion, cpplib prepares to push a new context for that macro on the
+stack by calling the routine `enter_macro_context'.  When this routine
+returns, the new context will contain the unexpanded tokens of the
+replacement list of that macro.  In the case of function-like macros,
+`enter_macro_context' also replaces any parameters in the replacement
+list, stored as `CPP_MACRO_ARG' tokens, with the appropriate macro
+argument.  If the standard requires that the parameter be replaced with
+its expanded argument, the argument will have been fully macro expanded
+first.
+
+   `enter_macro_context' also handles special macros like `__LINE__'.
+Although these macros expand to a single token which cannot contain any
+further macros, for reasons of token spacing (*note Token Spacing::)
+and simplicity of implementation, cpplib handles these special macros
+by pushing a context containing just that one token.
+
+   The final thing that `enter_macro_context' does before returning is
+to mark the macro disabled for expansion (except for special macros
+like `__TIME__').  The macro is re-enabled when its context is later
+popped from the context stack, as described above.  This strict
+ordering ensures that a macro is disabled whilst its expansion is being
+scanned, but that it is _not_ disabled whilst any arguments to it are
+being expanded.
+
+Scanning the replacement list for macros to expand
+==================================================
+
+The C standard states that, after any parameters have been replaced
+with their possibly-expanded arguments, the replacement list is scanned
+for nested macros.  Further, any identifiers in the replacement list
+that are not expanded during this scan are never again eligible for
+expansion in the future, if the reason they were not expanded is that
+the macro in question was disabled.
+
+   Clearly this latter condition can only apply to tokens resulting from
+argument pre-expansion.  Other tokens never have an opportunity to be
+re-tested for expansion.  It is possible for identifiers that are
+function-like macros to not expand initially but to expand during a
+later scan.  This occurs when the identifier is the last token of an
+argument (and therefore originally followed by a comma or a closing
+parenthesis in its macro's argument list), and when it replaces its
+parameter in the macro's replacement list, the subsequent token happens
+to be an opening parenthesis (itself possibly the first token of an
+argument).
+
+   It is important to note that when cpplib reads the last token of a
+given context, that context still remains on the stack.  Only when
+looking for the _next_ token do we pop it off the stack and drop to a
+lower context.  This makes backing up by one token easy, but more
+importantly ensures that the macro corresponding to the current context
+is still disabled when we are considering the last token of its
+replacement list for expansion (or indeed expanding it).  As an
+example, which illustrates many of the points above, consider
+
+     #define foo(x) bar x
+     foo(foo) (2)
+
+which fully expands to `bar foo (2)'.  During pre-expansion of the
+argument, `foo' does not expand even though the macro is enabled, since
+it has no following parenthesis [pre-expansion of an argument only uses
+tokens from that argument; it cannot take tokens from whatever follows
+the macro invocation].  This still leaves the argument token `foo'
+eligible for future expansion.  Then, when re-scanning after argument
+replacement, the token `foo' is rejected for expansion, and marked
+ineligible for future expansion, since the macro is now disabled.  It
+is disabled because the replacement list `bar foo' of the macro is
+still on the context stack.
+
+   If instead the algorithm looked for an opening parenthesis first and
+then tested whether the macro were disabled it would be subtly wrong.
+In the example above, the replacement list of `foo' would be popped in
+the process of finding the parenthesis, re-enabling `foo' and expanding
+it a second time.
+
+Looking for a function-like macro's opening parenthesis
+=======================================================
+
+Function-like macros only expand when immediately followed by a
+parenthesis.  To do this cpplib needs to temporarily disable macros and
+read the next token.  Unfortunately, because of spacing issues (*note
+Token Spacing::), there can be fake padding tokens in-between, and if
+the next real token is not a parenthesis cpplib needs to be able to
+back up that one token as well as retain the information in any
+intervening padding tokens.
+
+   Backing up more than one token when macros are involved is not
+permitted by cpplib, because in general it might involve issues like
+restoring popped contexts onto the context stack, which are too hard.
+Instead, searching for the parenthesis is handled by a special
+function, `funlike_invocation_p', which remembers padding information
+as it reads tokens.  If the next real token is not an opening
+parenthesis, it backs up that one token, and then pushes an extra
+context just containing the padding information if necessary.
+
+Marking tokens ineligible for future expansion
+==============================================
+
+As discussed above, cpplib needs a way of marking tokens as
+unexpandable.  Since the tokens cpplib handles are read-only once they
+have been lexed, it instead makes a copy of the token and adds the flag
+`NO_EXPAND' to the copy.
+
+   For efficiency and to simplify memory management by avoiding having
+to remember to free these tokens, they are allocated as temporary tokens
+from the lexer's current token run (*note Lexing a line::) using the
+function `_cpp_temp_token'.  The tokens are then re-used once the
+current line of tokens has been read in.
+
+   This might sound unsafe.  However, tokens runs are not re-used at the
+end of a line if it happens to be in the middle of a macro argument
+list, and cpplib only wants to back-up more than one lexer token in
+situations where no macro expansion is involved, so the optimization is
+safe.
+
+
+File: cppinternals.info,  Node: Token Spacing,  Next: Line Numbering,  Prev: Macro Expansion,  Up: Top
+
+Token Spacing
+*************
+
+First, consider an issue that only concerns the stand-alone
+preprocessor: there needs to be a guarantee that re-reading its
+preprocessed output results in an identical token stream.  Without
+taking special measures, this might not be the case because of macro
+substitution.  For example:
+
+     #define PLUS +
+     #define EMPTY
+     #define f(x) =x=
+     +PLUS -EMPTY- PLUS+ f(=)
+             ==> + + - - + + = = =
+     _not_
+             ==> ++ -- ++ ===
+
+   One solution would be to simply insert a space between all adjacent
+tokens.  However, we would like to keep space insertion to a minimum,
+both for aesthetic reasons and because it causes problems for people who
+still try to abuse the preprocessor for things like Fortran source and
+Makefiles.
+
+   For now, just notice that when tokens are added (or removed, as
+shown by the `EMPTY' example) from the original lexed token stream, we
+need to check for accidental token pasting.  We call this "paste
+avoidance".  Token addition and removal can only occur because of macro
+expansion, but accidental pasting can occur in many places: both before
+and after each macro replacement, each argument replacement, and
+additionally each token created by the `#' and `##' operators.
+
+   Look at how the preprocessor gets whitespace output correct
+normally.  The `cpp_token' structure contains a flags byte, and one of
+those flags is `PREV_WHITE'.  This is flagged by the lexer, and
+indicates that the token was preceded by whitespace of some form other
+than a new line.  The stand-alone preprocessor can use this flag to
+decide whether to insert a space between tokens in the output.
+
+   Now consider the result of the following macro expansion:
+
+     #define add(x, y, z) x + y +z;
+     sum = add (1,2, 3);
+             ==> sum = 1 + 2 +3;
+
+   The interesting thing here is that the tokens `1' and `2' are output
+with a preceding space, and `3' is output without a preceding space,
+but when lexed none of these tokens had that property.  Careful
+consideration reveals that `1' gets its preceding whitespace from the
+space preceding `add' in the macro invocation, _not_ replacement list.
+`2' gets its whitespace from the space preceding the parameter `y' in
+the macro replacement list, and `3' has no preceding space because
+parameter `z' has none in the replacement list.
+
+   Once lexed, tokens are effectively fixed and cannot be altered, since
+pointers to them might be held in many places, in particular by
+in-progress macro expansions.  So instead of modifying the two tokens
+above, the preprocessor inserts a special token, which I call a
+"padding token", into the token stream to indicate that spacing of the
+subsequent token is special.  The preprocessor inserts padding tokens
+in front of every macro expansion and expanded macro argument.  These
+point to a "source token" from which the subsequent real token should
+inherit its spacing.  In the above example, the source tokens are `add'
+in the macro invocation, and `y' and `z' in the macro replacement list,
+respectively.
+
+   It is quite easy to get multiple padding tokens in a row, for
+example if a macro's first replacement token expands straight into
+another macro.
+
+     #define foo bar
+     #define bar baz
+     [foo]
+             ==> [baz]
+
+   Here, two padding tokens are generated with sources the `foo' token
+between the brackets, and the `bar' token from foo's replacement list,
+respectively.  Clearly the first padding token is the one to use, so
+the output code should contain a rule that the first padding token in a
+sequence is the one that matters.
+
+   But what if a macro expansion is left?  Adjusting the above example
+slightly:
+
+     #define foo bar
+     #define bar EMPTY baz
+     #define EMPTY
+     [foo] EMPTY;
+             ==> [ baz] ;
+
+   As shown, now there should be a space before `baz' and the semicolon
+in the output.
+
+   The rules we decided above fail for `baz': we generate three padding
+tokens, one per macro invocation, before the token `baz'.  We would
+then have it take its spacing from the first of these, which carries
+source token `foo' with no leading space.
+
+   It is vital that cpplib get spacing correct in these examples since
+any of these macro expansions could be stringified, where spacing
+matters.
+
+   So, this demonstrates that not just entering macro and argument
+expansions, but leaving them requires special handling too.  I made
+cpplib insert a padding token with a `NULL' source token when leaving
+macro expansions, as well as after each replaced argument in a macro's
+replacement list.  It also inserts appropriate padding tokens on either
+side of tokens created by the `#' and `##' operators.  I expanded the
+rule so that, if we see a padding token with a `NULL' source token,
+_and_ that source token has no leading space, then we behave as if we
+have seen no padding tokens at all.  A quick check shows this rule will
+then get the above example correct as well.
+
+   Now a relationship with paste avoidance is apparent: we have to be
+careful about paste avoidance in exactly the same locations we have
+padding tokens in order to get white space correct.  This makes
+implementation of paste avoidance easy: wherever the stand-alone
+preprocessor is fixing up spacing because of padding tokens, and it
+turns out that no space is needed, it has to take the extra step to
+check that a space is not needed after all to avoid an accidental paste.
+The function `cpp_avoid_paste' advises whether a space is required
+between two consecutive tokens.  To avoid excessive spacing, it tries
+hard to only require a space if one is likely to be necessary, but for
+reasons of efficiency it is slightly conservative and might recommend a
+space where one is not strictly needed.
+
+
+File: cppinternals.info,  Node: Line Numbering,  Next: Guard Macros,  Prev: Token Spacing,  Up: Top
+
+Line numbering
+**************
+
+Just which line number anyway?
+==============================
+
+There are three reasonable requirements a cpplib client might have for
+the line number of a token passed to it:
+
+   * The source line it was lexed on.
+
+   * The line it is output on.  This can be different to the line it was
+     lexed on if, for example, there are intervening escaped newlines or
+     C-style comments.  For example:
+
+          foo /* A long
+          comment */ bar \
+          baz
+          =>
+          foo bar baz
+
+   * If the token results from a macro expansion, the line of the macro
+     name, or possibly the line of the closing parenthesis in the case
+     of function-like macro expansion.
+
+   The `cpp_token' structure contains `line' and `col' members.  The
+lexer fills these in with the line and column of the first character of
+the token.  Consequently, but maybe unexpectedly, a token from the
+replacement list of a macro expansion carries the location of the token
+within the `#define' directive, because cpplib expands a macro by
+returning pointers to the tokens in its replacement list.  The current
+implementation of cpplib assigns tokens created from built-in macros
+and the `#' and `##' operators the location of the most recently lexed
+token.  This is a because they are allocated from the lexer's token
+runs, and because of the way the diagnostic routines infer the
+appropriate location to report.
+
+   The diagnostic routines in cpplib display the location of the most
+recently _lexed_ token, unless they are passed a specific line and
+column to report.  For diagnostics regarding tokens that arise from
+macro expansions, it might also be helpful for the user to see the
+original location in the macro definition that the token came from.
+Since that is exactly the information each token carries, such an
+enhancement could be made relatively easily in future.
+
+   The stand-alone preprocessor faces a similar problem when determining
+the correct line to output the token on: the position attached to a
+token is fairly useless if the token came from a macro expansion.  All
+tokens on a logical line should be output on its first physical line, so
+the token's reported location is also wrong if it is part of a physical
+line other than the first.
+
+   To solve these issues, cpplib provides a callback that is generated
+whenever it lexes a preprocessing token that starts a new logical line
+other than a directive.  It passes this token (which may be a `CPP_EOF'
+token indicating the end of the translation unit) to the callback
+routine, which can then use the line and column of this token to
+produce correct output.
+
+Representation of line numbers
+==============================
+
+As mentioned above, cpplib stores with each token the line number that
+it was lexed on.  In fact, this number is not the number of the line in
+the source file, but instead bears more resemblance to the number of the
+line in the translation unit.
+
+   The preprocessor maintains a monotonic increasing line count, which
+is incremented at every new line character (and also at the end of any
+buffer that does not end in a new line).  Since a line number of zero is
+useful to indicate certain special states and conditions, this variable
+starts counting from one.
+
+   This variable therefore uniquely enumerates each line in the
+translation unit.  With some simple infrastructure, it is straight
+forward to map from this to the original source file and line number
+pair, saving space whenever line number information needs to be saved.
+The code the implements this mapping lies in the files `line-map.c' and
+`line-map.h'.
+
+   Command-line macros and assertions are implemented by pushing a
+buffer containing the right hand side of an equivalent `#define' or
+`#assert' directive.  Some built-in macros are handled similarly.
+Since these are all processed before the first line of the main input
+file, it will typically have an assigned line closer to twenty than to
+one.
+
+
+File: cppinternals.info,  Node: Guard Macros,  Next: Files,  Prev: Line Numbering,  Up: Top
+
+The Multiple-Include Optimization
+*********************************
+
+Header files are often of the form
+
+     #ifndef FOO
+     #define FOO
+     ...
+     #endif
+
+to prevent the compiler from processing them more than once.  The
+preprocessor notices such header files, so that if the header file
+appears in a subsequent `#include' directive and `FOO' is defined, then
+it is ignored and it doesn't preprocess or even re-open the file a
+second time.  This is referred to as the "multiple include
+optimization".
+
+   Under what circumstances is such an optimization valid?  If the file
+were included a second time, it can only be optimized away if that
+inclusion would result in no tokens to return, and no relevant
+directives to process.  Therefore the current implementation imposes
+requirements and makes some allowances as follows:
+
+  1. There must be no tokens outside the controlling `#if'-`#endif'
+     pair, but whitespace and comments are permitted.
+
+  2. There must be no directives outside the controlling directive
+     pair, but the "null directive" (a line containing nothing other
+     than a single `#' and possibly whitespace) is permitted.
+
+  3. The opening directive must be of the form
+
+          #ifndef FOO
+
+     or
+
+          #if !defined FOO     [equivalently, #if !defined(FOO)]
+
+  4. In the second form above, the tokens forming the `#if' expression
+     must have come directly from the source file--no macro expansion
+     must have been involved.  This is because macro definitions can
+     change, and tracking whether or not a relevant change has been
+     made is not worth the implementation cost.
+
+  5. There can be no `#else' or `#elif' directives at the outer
+     conditional block level, because they would probably contain
+     something of interest to a subsequent pass.
+
+   First, when pushing a new file on the buffer stack,
+`_stack_include_file' sets the controlling macro `mi_cmacro' to `NULL',
+and sets `mi_valid' to `true'.  This indicates that the preprocessor
+has not yet encountered anything that would invalidate the
+multiple-include optimization.  As described in the next few
+paragraphs, these two variables having these values effectively
+indicates top-of-file.
+
+   When about to return a token that is not part of a directive,
+`_cpp_lex_token' sets `mi_valid' to `false'.  This enforces the
+constraint that tokens outside the controlling conditional block
+invalidate the optimization.
+
+   The `do_if', when appropriate, and `do_ifndef' directive handlers
+pass the controlling macro to the function `push_conditional'.  cpplib
+maintains a stack of nested conditional blocks, and after processing
+every opening conditional this function pushes an `if_stack' structure
+onto the stack.  In this structure it records the controlling macro for
+the block, provided there is one and we're at top-of-file (as described
+above).  If an `#elif' or `#else' directive is encountered, the
+controlling macro for that block is cleared to `NULL'.  Otherwise, it
+survives until the `#endif' closing the block, upon which `do_endif'
+sets `mi_valid' to true and stores the controlling macro in `mi_cmacro'.
+
+   `_cpp_handle_directive' clears `mi_valid' when processing any
+directive other than an opening conditional and the null directive.
+With this, and requiring top-of-file to record a controlling macro, and
+no `#else' or `#elif' for it to survive and be copied to `mi_cmacro' by
+`do_endif', we have enforced the absence of directives outside the main
+conditional block for the optimization to be on.
+
+   Note that whilst we are inside the conditional block, `mi_valid' is
+likely to be reset to `false', but this does not matter since the
+closing `#endif' restores it to `true' if appropriate.
+
+   Finally, since `_cpp_lex_direct' pops the file off the buffer stack
+at `EOF' without returning a token, if the `#endif' directive was not
+followed by any tokens, `mi_valid' is `true' and `_cpp_pop_file_buffer'
+remembers the controlling macro associated with the file.  Subsequent
+calls to `stack_include_file' result in no buffer being pushed if the
+controlling macro is defined, effecting the optimization.
+
+   A quick word on how we handle the
+
+     #if !defined FOO
+
+case.  `_cpp_parse_expr' and `parse_defined' take steps to see whether
+the three stages `!', `defined-expression' and `end-of-directive' occur
+in order in a `#if' expression.  If so, they return the guard macro to
+`do_if' in the variable `mi_ind_cmacro', and otherwise set it to `NULL'.
+`enter_macro_context' sets `mi_valid' to false, so if a macro was
+expanded whilst parsing any part of the expression, then the
+top-of-file test in `push_conditional' fails and the optimization is
+turned off.
+
+
+File: cppinternals.info,  Node: Files,  Next: Concept Index,  Prev: Guard Macros,  Up: Top
+
+File Handling
+*************
+
+Fairly obviously, the file handling code of cpplib resides in the file
+`files.c'.  It takes care of the details of file searching, opening,
+reading and caching, for both the main source file and all the headers
+it recursively includes.
+
+   The basic strategy is to minimize the number of system calls.  On
+many systems, the basic `open ()' and `fstat ()' system calls can be
+quite expensive.  For every `#include'-d file, we need to try all the
+directories in the search path until we find a match.  Some projects,
+such as glibc, pass twenty or thirty include paths on the command line,
+so this can rapidly become time consuming.
+
+   For a header file we have not encountered before we have little
+choice but to do this.  However, it is often the case that the same
+headers are repeatedly included, and in these cases we try to avoid
+repeating the filesystem queries whilst searching for the correct file.
+
+   For each file we try to open, we store the constructed path in a
+splay tree.  This path first undergoes simplification by the function
+`_cpp_simplify_pathname'.  For example, `/usr/include/bits/../foo.h' is
+simplified to `/usr/include/foo.h' before we enter it in the splay tree
+and try to `open ()' the file.  CPP will then find subsequent uses of
+`foo.h', even as `/usr/include/foo.h', in the splay tree and save
+system calls.
+
+   Further, it is likely the file contents have also been cached,
+saving a `read ()' system call.  We don't bother caching the contents of
+header files that are re-inclusion protected, and whose re-inclusion
+macro is defined when we leave the header file for the first time.  If
+the host supports it, we try to map suitably large files into memory,
+rather than reading them in directly.
+
+   The include paths are internally stored on a null-terminated
+singly-linked list, starting with the `"header.h"' directory search
+chain, which then links into the `<header.h>' directory chain.
+
+   Files included with the `<foo.h>' syntax start the lookup directly
+in the second half of this chain.  However, files included with the
+`"foo.h"' syntax start at the beginning of the chain, but with one
+extra directory prepended.  This is the directory of the current file;
+the one containing the `#include' directive.  Prepending this directory
+on a per-file basis is handled by the function `search_from'.
+
+   Note that a header included with a directory component, such as
+`#include "mydir/foo.h"' and opened as
+`/usr/local/include/mydir/foo.h', will have the complete path minus the
+basename `foo.h' as the current directory.
+
+   Enough information is stored in the splay tree that CPP can
+immediately tell whether it can skip the header file because of the
+multiple include optimization, whether the file didn't exist or
+couldn't be opened for some reason, or whether the header was flagged
+not to be re-used, as it is with the obsolete `#import' directive.
+
+   For the benefit of MS-DOS filesystems with an 8.3 filename
+limitation, CPP offers the ability to treat various include file names
+as aliases for the real header files with shorter names.  The map from
+one to the other is found in a special file called `header.gcc', stored
+in the command line (or system) include directories to which the mapping
+applies.  This may be higher up the directory tree than the full path to
+the file minus the base name.
+
+
+File: cppinternals.info,  Node: Concept Index,  Prev: Files,  Up: Top
+
+Concept Index
+*************
+
+
+* Menu:
+
+* assertions:                            Hash Nodes.          (line   6)
+* controlling macros:                    Guard Macros.        (line   6)
+* escaped newlines:                      Lexer.               (line   6)
+* files:                                 Files.               (line   6)
+* guard macros:                          Guard Macros.        (line   6)
+* hash table:                            Hash Nodes.          (line   6)
+* header files:                          Conventions.         (line   6)
+* identifiers:                           Hash Nodes.          (line   6)
+* interface:                             Conventions.         (line   6)
+* lexer:                                 Lexer.               (line   6)
+* line numbers:                          Line Numbering.      (line   6)
+* macro expansion:                       Macro Expansion.     (line   6)
+* macro representation (internal):       Macro Expansion.     (line  19)
+* macros:                                Hash Nodes.          (line   6)
+* multiple-include optimization:         Guard Macros.        (line   6)
+* named operators:                       Hash Nodes.          (line   6)
+* newlines:                              Lexer.               (line   6)
+* paste avoidance:                       Token Spacing.       (line   6)
+* spacing:                               Token Spacing.       (line   6)
+* token run:                             Lexer.               (line 192)
+* token spacing:                         Token Spacing.       (line   6)
+
+
+
+Tag Table:
+Node: Top980
+Node: Conventions2665
+Node: Lexer3607
+Ref: Invalid identifiers11520
+Ref: Lexing a line13469
+Node: Hash Nodes18242
+Node: Macro Expansion21121
+Node: Token Spacing30068
+Node: Line Numbering35928
+Node: Guard Macros40013
+Node: Files44804
+Node: Concept Index48270
+
+End Tag Table
diff --git a/gcc/doc/cppinternals.texi b/gcc/doc/cppinternals.texi
new file mode 100644
index 000000000..a22ef0d42
--- /dev/null
+++ b/gcc/doc/cppinternals.texi
@@ -0,0 +1,1068 @@
+\input texinfo
+@setfilename cppinternals.info
+@settitle The GNU C Preprocessor Internals
+
+@include gcc-common.texi
+
+@ifinfo
+@dircategory Software development
+@direntry
+* Cpplib: (cppinternals).      Cpplib internals.
+@end direntry
+@end ifinfo
+
+@c @smallbook
+@c @cropmarks
+@c @finalout
+@setchapternewpage odd
+@ifinfo
+This file documents the internals of the GNU C Preprocessor.
+
+Copyright 2000, 2001, 2002, 2004, 2005, 2006, 2007 Free Software
+Foundation, Inc.
+
+Permission is granted to make and distribute verbatim copies of
+this manual provided the copyright notice and this permission notice
+are preserved on all copies.
+
+@ignore
+Permission is granted to process this file through Tex and print the
+results, provided the printed document carries copying permission
+notice identical to this one except for the removal of this paragraph
+(this paragraph not being relevant to the printed manual).
+
+@end ignore
+Permission is granted to copy and distribute modified versions of this
+manual under the conditions for verbatim copying, provided also that
+the entire resulting derived work is distributed under the terms of a
+permission notice identical to this one.
+
+Permission is granted to copy and distribute translations of this manual
+into another language, under the above conditions for modified versions.
+@end ifinfo
+
+@titlepage
+@title Cpplib Internals
+@versionsubtitle
+@author Neil Booth
+@page
+@vskip 0pt plus 1filll
+@c man begin COPYRIGHT
+Copyright @copyright{} 2000, 2001, 2002, 2004, 2005
+Free Software Foundation, Inc.
+
+Permission is granted to make and distribute verbatim copies of
+this manual provided the copyright notice and this permission notice
+are preserved on all copies.
+
+Permission is granted to copy and distribute modified versions of this
+manual under the conditions for verbatim copying, provided also that
+the entire resulting derived work is distributed under the terms of a
+permission notice identical to this one.
+
+Permission is granted to copy and distribute translations of this manual
+into another language, under the above conditions for modified versions.
+@c man end
+@end titlepage
+@contents
+@page
+
+@ifnottex
+@node Top
+@top
+@chapter Cpplib---the GNU C Preprocessor
+
+The GNU C preprocessor is
+implemented as a library, @dfn{cpplib}, so it can be easily shared between
+a stand-alone preprocessor, and a preprocessor integrated with the C,
+C++ and Objective-C front ends.  It is also available for use by other
+programs, though this is not recommended as its exposed interface has
+not yet reached a point of reasonable stability.
+
+The library has been written to be re-entrant, so that it can be used
+to preprocess many files simultaneously if necessary.  It has also been
+written with the preprocessing token as the fundamental unit; the
+preprocessor in previous versions of GCC would operate on text strings
+as the fundamental unit.
+
+This brief manual documents the internals of cpplib, and explains some
+of the tricky issues.  It is intended that, along with the comments in
+the source code, a reasonably competent C programmer should be able to
+figure out what the code is doing, and why things have been implemented
+the way they have.
+
+@menu
+* Conventions::         Conventions used in the code.
+* Lexer::               The combined C, C++ and Objective-C Lexer.
+* Hash Nodes::          All identifiers are entered into a hash table.
+* Macro Expansion::     Macro expansion algorithm.
+* Token Spacing::       Spacing and paste avoidance issues.
+* Line Numbering::      Tracking location within files.
+* Guard Macros::        Optimizing header files with guard macros.
+* Files::               File handling.
+* Concept Index::       Index.
+@end menu
+@end ifnottex
+
+@node Conventions
+@unnumbered Conventions
+@cindex interface
+@cindex header files
+
+cpplib has two interfaces---one is exposed internally only, and the
+other is for both internal and external use.
+
+The convention is that functions and types that are exposed to multiple
+files internally are prefixed with @samp{_cpp_}, and are to be found in
+the file @file{internal.h}.  Functions and types exposed to external
+clients are in @file{cpplib.h}, and prefixed with @samp{cpp_}.  For
+historical reasons this is no longer quite true, but we should strive to
+stick to it.
+
+We are striving to reduce the information exposed in @file{cpplib.h} to the
+bare minimum necessary, and then to keep it there.  This makes clear
+exactly what external clients are entitled to assume, and allows us to
+change internals in the future without worrying whether library clients
+are perhaps relying on some kind of undocumented implementation-specific
+behavior.
+
+@node Lexer
+@unnumbered The Lexer
+@cindex lexer
+@cindex newlines
+@cindex escaped newlines
+
+@section Overview
+The lexer is contained in the file @file{lex.c}.  It is a hand-coded
+lexer, and not implemented as a state machine.  It can understand C, C++
+and Objective-C source code, and has been extended to allow reasonably
+successful preprocessing of assembly language.  The lexer does not make
+an initial pass to strip out trigraphs and escaped newlines, but handles
+them as they are encountered in a single pass of the input file.  It
+returns preprocessing tokens individually, not a line at a time.
+
+It is mostly transparent to users of the library, since the library's
+interface for obtaining the next token, @code{cpp_get_token}, takes care
+of lexing new tokens, handling directives, and expanding macros as
+necessary.  However, the lexer does expose some functionality so that
+clients of the library can easily spell a given token, such as
+@code{cpp_spell_token} and @code{cpp_token_len}.  These functions are
+useful when generating diagnostics, and for emitting the preprocessed
+output.
+
+@section Lexing a token
+Lexing of an individual token is handled by @code{_cpp_lex_direct} and
+its subroutines.  In its current form the code is quite complicated,
+with read ahead characters and such-like, since it strives to not step
+back in the character stream in preparation for handling non-ASCII file
+encodings.  The current plan is to convert any such files to UTF-8
+before processing them.  This complexity is therefore unnecessary and
+will be removed, so I'll not discuss it further here.
+
+The job of @code{_cpp_lex_direct} is simply to lex a token.  It is not
+responsible for issues like directive handling, returning lookahead
+tokens directly, multiple-include optimization, or conditional block
+skipping.  It necessarily has a minor r@^ole to play in memory
+management of lexed lines.  I discuss these issues in a separate section
+(@pxref{Lexing a line}).
+
+The lexer places the token it lexes into storage pointed to by the
+variable @code{cur_token}, and then increments it.  This variable is
+important for correct diagnostic positioning.  Unless a specific line
+and column are passed to the diagnostic routines, they will examine the
+@code{line} and @code{col} values of the token just before the location
+that @code{cur_token} points to, and use that location to report the
+diagnostic.
+
+The lexer does not consider whitespace to be a token in its own right.
+If whitespace (other than a new line) precedes a token, it sets the
+@code{PREV_WHITE} bit in the token's flags.  Each token has its
+@code{line} and @code{col} variables set to the line and column of the
+first character of the token.  This line number is the line number in
+the translation unit, and can be converted to a source (file, line) pair
+using the line map code.
+
+The first token on a logical, i.e.@: unescaped, line has the flag
+@code{BOL} set for beginning-of-line.  This flag is intended for
+internal use, both to distinguish a @samp{#} that begins a directive
+from one that doesn't, and to generate a call-back to clients that want
+to be notified about the start of every non-directive line with tokens
+on it.  Clients cannot reliably determine this for themselves: the first
+token might be a macro, and the tokens of a macro expansion do not have
+the @code{BOL} flag set.  The macro expansion may even be empty, and the
+next token on the line certainly won't have the @code{BOL} flag set.
+
+New lines are treated specially; exactly how the lexer handles them is
+context-dependent.  The C standard mandates that directives are
+terminated by the first unescaped newline character, even if it appears
+in the middle of a macro expansion.  Therefore, if the state variable
+@code{in_directive} is set, the lexer returns a @code{CPP_EOF} token,
+which is normally used to indicate end-of-file, to indicate
+end-of-directive.  In a directive a @code{CPP_EOF} token never means
+end-of-file.  Conveniently, if the caller was @code{collect_args}, it
+already handles @code{CPP_EOF} as if it were end-of-file, and reports an
+error about an unterminated macro argument list.
+
+The C standard also specifies that a new line in the middle of the
+arguments to a macro is treated as whitespace.  This white space is
+important in case the macro argument is stringified.  The state variable
+@code{parsing_args} is nonzero when the preprocessor is collecting the
+arguments to a macro call.  It is set to 1 when looking for the opening
+parenthesis to a function-like macro, and 2 when collecting the actual
+arguments up to the closing parenthesis, since these two cases need to
+be distinguished sometimes.  One such time is here: the lexer sets the
+@code{PREV_WHITE} flag of a token if it meets a new line when
+@code{parsing_args} is set to 2.  It doesn't set it if it meets a new
+line when @code{parsing_args} is 1, since then code like
+
+@smallexample
+#define foo() bar
+foo
+baz
+@end smallexample
+
+@noindent would be output with an erroneous space before @samp{baz}:
+
+@smallexample
+foo
+ baz
+@end smallexample
+
+This is a good example of the subtlety of getting token spacing correct
+in the preprocessor; there are plenty of tests in the testsuite for
+corner cases like this.
+
+The lexer is written to treat each of @samp{\r}, @samp{\n}, @samp{\r\n}
+and @samp{\n\r} as a single new line indicator.  This allows it to
+transparently preprocess MS-DOS, Macintosh and Unix files without their
+needing to pass through a special filter beforehand.
+
+We also decided to treat a backslash, either @samp{\} or the trigraph
+@samp{??/}, separated from one of the above newline indicators by
+non-comment whitespace only, as intending to escape the newline.  It
+tends to be a typing mistake, and cannot reasonably be mistaken for
+anything else in any of the C-family grammars.  Since handling it this
+way is not strictly conforming to the ISO standard, the library issues a
+warning wherever it encounters it.
+
+Handling newlines like this is made simpler by doing it in one place
+only.  The function @code{handle_newline} takes care of all newline
+characters, and @code{skip_escaped_newlines} takes care of arbitrarily
+long sequences of escaped newlines, deferring to @code{handle_newline}
+to handle the newlines themselves.
+
+The most painful aspect of lexing ISO-standard C and C++ is handling
+trigraphs and backlash-escaped newlines.  Trigraphs are processed before
+any interpretation of the meaning of a character is made, and unfortunately
+there is a trigraph representation for a backslash, so it is possible for
+the trigraph @samp{??/} to introduce an escaped newline.
+
+Escaped newlines are tedious because theoretically they can occur
+anywhere---between the @samp{+} and @samp{=} of the @samp{+=} token,
+within the characters of an identifier, and even between the @samp{*}
+and @samp{/} that terminates a comment.  Moreover, you cannot be sure
+there is just one---there might be an arbitrarily long sequence of them.
+
+So, for example, the routine that lexes a number, @code{parse_number},
+cannot assume that it can scan forwards until the first non-number
+character and be done with it, because this could be the @samp{\}
+introducing an escaped newline, or the @samp{?} introducing the trigraph
+sequence that represents the @samp{\} of an escaped newline.  If it
+encounters a @samp{?} or @samp{\}, it calls @code{skip_escaped_newlines}
+to skip over any potential escaped newlines before checking whether the
+number has been finished.
+
+Similarly code in the main body of @code{_cpp_lex_direct} cannot simply
+check for a @samp{=} after a @samp{+} character to determine whether it
+has a @samp{+=} token; it needs to be prepared for an escaped newline of
+some sort.  Such cases use the function @code{get_effective_char}, which
+returns the first character after any intervening escaped newlines.
+
+The lexer needs to keep track of the correct column position, including
+counting tabs as specified by the @option{-ftabstop=} option.  This
+should be done even within C-style comments; they can appear in the
+middle of a line, and we want to report diagnostics in the correct
+position for text appearing after the end of the comment.
+
+@anchor{Invalid identifiers}
+Some identifiers, such as @code{__VA_ARGS__} and poisoned identifiers,
+may be invalid and require a diagnostic.  However, if they appear in a
+macro expansion we don't want to complain with each use of the macro.
+It is therefore best to catch them during the lexing stage, in
+@code{parse_identifier}.  In both cases, whether a diagnostic is needed
+or not is dependent upon the lexer's state.  For example, we don't want
+to issue a diagnostic for re-poisoning a poisoned identifier, or for
+using @code{__VA_ARGS__} in the expansion of a variable-argument macro.
+Therefore @code{parse_identifier} makes use of state flags to determine
+whether a diagnostic is appropriate.  Since we change state on a
+per-token basis, and don't lex whole lines at a time, this is not a
+problem.
+
+Another place where state flags are used to change behavior is whilst
+lexing header names.  Normally, a @samp{<} would be lexed as a single
+token.  After a @code{#include} directive, though, it should be lexed as
+a single token as far as the nearest @samp{>} character.  Note that we
+don't allow the terminators of header names to be escaped; the first
+@samp{"} or @samp{>} terminates the header name.
+
+Interpretation of some character sequences depends upon whether we are
+lexing C, C++ or Objective-C, and on the revision of the standard in
+force.  For example, @samp{::} is a single token in C++, but in C it is
+two separate @samp{:} tokens and almost certainly a syntax error.  Such
+cases are handled by @code{_cpp_lex_direct} based upon command-line
+flags stored in the @code{cpp_options} structure.
+
+Once a token has been lexed, it leads an independent existence.  The
+spelling of numbers, identifiers and strings is copied to permanent
+storage from the original input buffer, so a token remains valid and
+correct even if its source buffer is freed with @code{_cpp_pop_buffer}.
+The storage holding the spellings of such tokens remains until the
+client program calls cpp_destroy, probably at the end of the translation
+unit.
+
+@anchor{Lexing a line}
+@section Lexing a line
+@cindex token run
+
+When the preprocessor was changed to return pointers to tokens, one
+feature I wanted was some sort of guarantee regarding how long a
+returned pointer remains valid.  This is important to the stand-alone
+preprocessor, the future direction of the C family front ends, and even
+to cpplib itself internally.
+
+Occasionally the preprocessor wants to be able to peek ahead in the
+token stream.  For example, after the name of a function-like macro, it
+wants to check the next token to see if it is an opening parenthesis.
+Another example is that, after reading the first few tokens of a
+@code{#pragma} directive and not recognizing it as a registered pragma,
+it wants to backtrack and allow the user-defined handler for unknown
+pragmas to access the full @code{#pragma} token stream.  The stand-alone
+preprocessor wants to be able to test the current token with the
+previous one to see if a space needs to be inserted to preserve their
+separate tokenization upon re-lexing (paste avoidance), so it needs to
+be sure the pointer to the previous token is still valid.  The
+recursive-descent C++ parser wants to be able to perform tentative
+parsing arbitrarily far ahead in the token stream, and then to be able
+to jump back to a prior position in that stream if necessary.
+
+The rule I chose, which is fairly natural, is to arrange that the
+preprocessor lex all tokens on a line consecutively into a token buffer,
+which I call a @dfn{token run}, and when meeting an unescaped new line
+(newlines within comments do not count either), to start lexing back at
+the beginning of the run.  Note that we do @emph{not} lex a line of
+tokens at once; if we did that @code{parse_identifier} would not have
+state flags available to warn about invalid identifiers (@pxref{Invalid
+identifiers}).
+
+In other words, accessing tokens that appeared earlier in the current
+line is valid, but since each logical line overwrites the tokens of the
+previous line, tokens from prior lines are unavailable.  In particular,
+since a directive only occupies a single logical line, this means that
+the directive handlers like the @code{#pragma} handler can jump around
+in the directive's tokens if necessary.
+
+Two issues remain: what about tokens that arise from macro expansions,
+and what happens when we have a long line that overflows the token run?
+
+Since we promise clients that we preserve the validity of pointers that
+we have already returned for tokens that appeared earlier in the line,
+we cannot reallocate the run.  Instead, on overflow it is expanded by
+chaining a new token run on to the end of the existing one.
+
+The tokens forming a macro's replacement list are collected by the
+@code{#define} handler, and placed in storage that is only freed by
+@code{cpp_destroy}.  So if a macro is expanded in the line of tokens,
+the pointers to the tokens of its expansion that are returned will always
+remain valid.  However, macros are a little trickier than that, since
+they give rise to three sources of fresh tokens.  They are the built-in
+macros like @code{__LINE__}, and the @samp{#} and @samp{##} operators
+for stringification and token pasting.  I handled this by allocating
+space for these tokens from the lexer's token run chain.  This means
+they automatically receive the same lifetime guarantees as lexed tokens,
+and we don't need to concern ourselves with freeing them.
+
+Lexing into a line of tokens solves some of the token memory management
+issues, but not all.  The opening parenthesis after a function-like
+macro name might lie on a different line, and the front ends definitely
+want the ability to look ahead past the end of the current line.  So
+cpplib only moves back to the start of the token run at the end of a
+line if the variable @code{keep_tokens} is zero.  Line-buffering is
+quite natural for the preprocessor, and as a result the only time cpplib
+needs to increment this variable is whilst looking for the opening
+parenthesis to, and reading the arguments of, a function-like macro.  In
+the near future cpplib will export an interface to increment and
+decrement this variable, so that clients can share full control over the
+lifetime of token pointers too.
+
+The routine @code{_cpp_lex_token} handles moving to new token runs,
+calling @code{_cpp_lex_direct} to lex new tokens, or returning
+previously-lexed tokens if we stepped back in the token stream.  It also
+checks each token for the @code{BOL} flag, which might indicate a
+directive that needs to be handled, or require a start-of-line call-back
+to be made.  @code{_cpp_lex_token} also handles skipping over tokens in
+failed conditional blocks, and invalidates the control macro of the
+multiple-include optimization if a token was successfully lexed outside
+a directive.  In other words, its callers do not need to concern
+themselves with such issues.
+
+@node Hash Nodes
+@unnumbered Hash Nodes
+@cindex hash table
+@cindex identifiers
+@cindex macros
+@cindex assertions
+@cindex named operators
+
+When cpplib encounters an ``identifier'', it generates a hash code for
+it and stores it in the hash table.  By ``identifier'' we mean tokens
+with type @code{CPP_NAME}; this includes identifiers in the usual C
+sense, as well as keywords, directive names, macro names and so on.  For
+example, all of @code{pragma}, @code{int}, @code{foo} and
+@code{__GNUC__} are identifiers and hashed when lexed.
+
+Each node in the hash table contain various information about the
+identifier it represents.  For example, its length and type.  At any one
+time, each identifier falls into exactly one of three categories:
+
+@itemize @bullet
+@item Macros
+
+These have been declared to be macros, either on the command line or
+with @code{#define}.  A few, such as @code{__TIME__} are built-ins
+entered in the hash table during initialization.  The hash node for a
+normal macro points to a structure with more information about the
+macro, such as whether it is function-like, how many arguments it takes,
+and its expansion.  Built-in macros are flagged as special, and instead
+contain an enum indicating which of the various built-in macros it is.
+
+@item Assertions
+
+Assertions are in a separate namespace to macros.  To enforce this, cpp
+actually prepends a @code{#} character before hashing and entering it in
+the hash table.  An assertion's node points to a chain of answers to
+that assertion.
+
+@item Void
+
+Everything else falls into this category---an identifier that is not
+currently a macro, or a macro that has since been undefined with
+@code{#undef}.
+
+When preprocessing C++, this category also includes the named operators,
+such as @code{xor}.  In expressions these behave like the operators they
+represent, but in contexts where the spelling of a token matters they
+are spelt differently.  This spelling distinction is relevant when they
+are operands of the stringizing and pasting macro operators @code{#} and
+@code{##}.  Named operator hash nodes are flagged, both to catch the
+spelling distinction and to prevent them from being defined as macros.
+@end itemize
+
+The same identifiers share the same hash node.  Since each identifier
+token, after lexing, contains a pointer to its hash node, this is used
+to provide rapid lookup of various information.  For example, when
+parsing a @code{#define} statement, CPP flags each argument's identifier
+hash node with the index of that argument.  This makes duplicated
+argument checking an O(1) operation for each argument.  Similarly, for
+each identifier in the macro's expansion, lookup to see if it is an
+argument, and which argument it is, is also an O(1) operation.  Further,
+each directive name, such as @code{endif}, has an associated directive
+enum stored in its hash node, so that directive lookup is also O(1).
+
+@node Macro Expansion
+@unnumbered Macro Expansion Algorithm
+@cindex macro expansion
+
+Macro expansion is a tricky operation, fraught with nasty corner cases
+and situations that render what you thought was a nifty way to
+optimize the preprocessor's expansion algorithm wrong in quite subtle
+ways.
+
+I strongly recommend you have a good grasp of how the C and C++
+standards require macros to be expanded before diving into this
+section, let alone the code!.  If you don't have a clear mental
+picture of how things like nested macro expansion, stringification and
+token pasting are supposed to work, damage to your sanity can quickly
+result.
+
+@section Internal representation of macros
+@cindex macro representation (internal)
+
+The preprocessor stores macro expansions in tokenized form.  This
+saves repeated lexing passes during expansion, at the cost of a small
+increase in memory consumption on average.  The tokens are stored
+contiguously in memory, so a pointer to the first one and a token
+count is all you need to get the replacement list of a macro.
+
+If the macro is a function-like macro the preprocessor also stores its
+parameters, in the form of an ordered list of pointers to the hash
+table entry of each parameter's identifier.  Further, in the macro's
+stored expansion each occurrence of a parameter is replaced with a
+special token of type @code{CPP_MACRO_ARG}.  Each such token holds the
+index of the parameter it represents in the parameter list, which
+allows rapid replacement of parameters with their arguments during
+expansion.  Despite this optimization it is still necessary to store
+the original parameters to the macro, both for dumping with e.g.,
+@option{-dD}, and to warn about non-trivial macro redefinitions when
+the parameter names have changed.
+
+@section Macro expansion overview
+The preprocessor maintains a @dfn{context stack}, implemented as a
+linked list of @code{cpp_context} structures, which together represent
+the macro expansion state at any one time.  The @code{struct
+cpp_reader} member variable @code{context} points to the current top
+of this stack.  The top normally holds the unexpanded replacement list
+of the innermost macro under expansion, except when cpplib is about to
+pre-expand an argument, in which case it holds that argument's
+unexpanded tokens.
+
+When there are no macros under expansion, cpplib is in @dfn{base
+context}.  All contexts other than the base context contain a
+contiguous list of tokens delimited by a starting and ending token.
+When not in base context, cpplib obtains the next token from the list
+of the top context.  If there are no tokens left in the list, it pops
+that context off the stack, and subsequent ones if necessary, until an
+unexhausted context is found or it returns to base context.  In base
+context, cpplib reads tokens directly from the lexer.
+
+If it encounters an identifier that is both a macro and enabled for
+expansion, cpplib prepares to push a new context for that macro on the
+stack by calling the routine @code{enter_macro_context}.  When this
+routine returns, the new context will contain the unexpanded tokens of
+the replacement list of that macro.  In the case of function-like
+macros, @code{enter_macro_context} also replaces any parameters in the
+replacement list, stored as @code{CPP_MACRO_ARG} tokens, with the
+appropriate macro argument.  If the standard requires that the
+parameter be replaced with its expanded argument, the argument will
+have been fully macro expanded first.
+
+@code{enter_macro_context} also handles special macros like
+@code{__LINE__}.  Although these macros expand to a single token which
+cannot contain any further macros, for reasons of token spacing
+(@pxref{Token Spacing}) and simplicity of implementation, cpplib
+handles these special macros by pushing a context containing just that
+one token.
+
+The final thing that @code{enter_macro_context} does before returning
+is to mark the macro disabled for expansion (except for special macros
+like @code{__TIME__}).  The macro is re-enabled when its context is
+later popped from the context stack, as described above.  This strict
+ordering ensures that a macro is disabled whilst its expansion is
+being scanned, but that it is @emph{not} disabled whilst any arguments
+to it are being expanded.
+
+@section Scanning the replacement list for macros to expand
+The C standard states that, after any parameters have been replaced
+with their possibly-expanded arguments, the replacement list is
+scanned for nested macros.  Further, any identifiers in the
+replacement list that are not expanded during this scan are never
+again eligible for expansion in the future, if the reason they were
+not expanded is that the macro in question was disabled.
+
+Clearly this latter condition can only apply to tokens resulting from
+argument pre-expansion.  Other tokens never have an opportunity to be
+re-tested for expansion.  It is possible for identifiers that are
+function-like macros to not expand initially but to expand during a
+later scan.  This occurs when the identifier is the last token of an
+argument (and therefore originally followed by a comma or a closing
+parenthesis in its macro's argument list), and when it replaces its
+parameter in the macro's replacement list, the subsequent token
+happens to be an opening parenthesis (itself possibly the first token
+of an argument).
+
+It is important to note that when cpplib reads the last token of a
+given context, that context still remains on the stack.  Only when
+looking for the @emph{next} token do we pop it off the stack and drop
+to a lower context.  This makes backing up by one token easy, but more
+importantly ensures that the macro corresponding to the current
+context is still disabled when we are considering the last token of
+its replacement list for expansion (or indeed expanding it).  As an
+example, which illustrates many of the points above, consider
+
+@smallexample
+#define foo(x) bar x
+foo(foo) (2)
+@end smallexample
+
+@noindent which fully expands to @samp{bar foo (2)}.  During pre-expansion
+of the argument, @samp{foo} does not expand even though the macro is
+enabled, since it has no following parenthesis [pre-expansion of an
+argument only uses tokens from that argument; it cannot take tokens
+from whatever follows the macro invocation].  This still leaves the
+argument token @samp{foo} eligible for future expansion.  Then, when
+re-scanning after argument replacement, the token @samp{foo} is
+rejected for expansion, and marked ineligible for future expansion,
+since the macro is now disabled.  It is disabled because the
+replacement list @samp{bar foo} of the macro is still on the context
+stack.
+
+If instead the algorithm looked for an opening parenthesis first and
+then tested whether the macro were disabled it would be subtly wrong.
+In the example above, the replacement list of @samp{foo} would be
+popped in the process of finding the parenthesis, re-enabling
+@samp{foo} and expanding it a second time.
+
+@section Looking for a function-like macro's opening parenthesis
+Function-like macros only expand when immediately followed by a
+parenthesis.  To do this cpplib needs to temporarily disable macros
+and read the next token.  Unfortunately, because of spacing issues
+(@pxref{Token Spacing}), there can be fake padding tokens in-between,
+and if the next real token is not a parenthesis cpplib needs to be
+able to back up that one token as well as retain the information in
+any intervening padding tokens.
+
+Backing up more than one token when macros are involved is not
+permitted by cpplib, because in general it might involve issues like
+restoring popped contexts onto the context stack, which are too hard.
+Instead, searching for the parenthesis is handled by a special
+function, @code{funlike_invocation_p}, which remembers padding
+information as it reads tokens.  If the next real token is not an
+opening parenthesis, it backs up that one token, and then pushes an
+extra context just containing the padding information if necessary.
+
+@section Marking tokens ineligible for future expansion
+As discussed above, cpplib needs a way of marking tokens as
+unexpandable.  Since the tokens cpplib handles are read-only once they
+have been lexed, it instead makes a copy of the token and adds the
+flag @code{NO_EXPAND} to the copy.
+
+For efficiency and to simplify memory management by avoiding having to
+remember to free these tokens, they are allocated as temporary tokens
+from the lexer's current token run (@pxref{Lexing a line}) using the
+function @code{_cpp_temp_token}.  The tokens are then re-used once the
+current line of tokens has been read in.
+
+This might sound unsafe.  However, tokens runs are not re-used at the
+end of a line if it happens to be in the middle of a macro argument
+list, and cpplib only wants to back-up more than one lexer token in
+situations where no macro expansion is involved, so the optimization
+is safe.
+
+@node Token Spacing
+@unnumbered Token Spacing
+@cindex paste avoidance
+@cindex spacing
+@cindex token spacing
+
+First, consider an issue that only concerns the stand-alone
+preprocessor: there needs to be a guarantee that re-reading its preprocessed
+output results in an identical token stream.  Without taking special
+measures, this might not be the case because of macro substitution.
+For example:
+
+@smallexample
+#define PLUS +
+#define EMPTY
+#define f(x) =x=
++PLUS -EMPTY- PLUS+ f(=)
+        @expansion{} + + - - + + = = =
+@emph{not}
+        @expansion{} ++ -- ++ ===
+@end smallexample
+
+One solution would be to simply insert a space between all adjacent
+tokens.  However, we would like to keep space insertion to a minimum,
+both for aesthetic reasons and because it causes problems for people who
+still try to abuse the preprocessor for things like Fortran source and
+Makefiles.
+
+For now, just notice that when tokens are added (or removed, as shown by
+the @code{EMPTY} example) from the original lexed token stream, we need
+to check for accidental token pasting.  We call this @dfn{paste
+avoidance}.  Token addition and removal can only occur because of macro
+expansion, but accidental pasting can occur in many places: both before
+and after each macro replacement, each argument replacement, and
+additionally each token created by the @samp{#} and @samp{##} operators.
+
+Look at how the preprocessor gets whitespace output correct
+normally.  The @code{cpp_token} structure contains a flags byte, and one
+of those flags is @code{PREV_WHITE}.  This is flagged by the lexer, and
+indicates that the token was preceded by whitespace of some form other
+than a new line.  The stand-alone preprocessor can use this flag to
+decide whether to insert a space between tokens in the output.
+
+Now consider the result of the following macro expansion:
+
+@smallexample
+#define add(x, y, z) x + y +z;
+sum = add (1,2, 3);
+        @expansion{} sum = 1 + 2 +3;
+@end smallexample
+
+The interesting thing here is that the tokens @samp{1} and @samp{2} are
+output with a preceding space, and @samp{3} is output without a
+preceding space, but when lexed none of these tokens had that property.
+Careful consideration reveals that @samp{1} gets its preceding
+whitespace from the space preceding @samp{add} in the macro invocation,
+@emph{not} replacement list.  @samp{2} gets its whitespace from the
+space preceding the parameter @samp{y} in the macro replacement list,
+and @samp{3} has no preceding space because parameter @samp{z} has none
+in the replacement list.
+
+Once lexed, tokens are effectively fixed and cannot be altered, since
+pointers to them might be held in many places, in particular by
+in-progress macro expansions.  So instead of modifying the two tokens
+above, the preprocessor inserts a special token, which I call a
+@dfn{padding token}, into the token stream to indicate that spacing of
+the subsequent token is special.  The preprocessor inserts padding
+tokens in front of every macro expansion and expanded macro argument.
+These point to a @dfn{source token} from which the subsequent real token
+should inherit its spacing.  In the above example, the source tokens are
+@samp{add} in the macro invocation, and @samp{y} and @samp{z} in the
+macro replacement list, respectively.
+
+It is quite easy to get multiple padding tokens in a row, for example if
+a macro's first replacement token expands straight into another macro.
+
+@smallexample
+#define foo bar
+#define bar baz
+[foo]
+        @expansion{} [baz]
+@end smallexample
+
+Here, two padding tokens are generated with sources the @samp{foo} token
+between the brackets, and the @samp{bar} token from foo's replacement
+list, respectively.  Clearly the first padding token is the one to
+use, so the output code should contain a rule that the first
+padding token in a sequence is the one that matters.
+
+But what if a macro expansion is left?  Adjusting the above
+example slightly:
+
+@smallexample
+#define foo bar
+#define bar EMPTY baz
+#define EMPTY
+[foo] EMPTY;
+        @expansion{} [ baz] ;
+@end smallexample
+
+As shown, now there should be a space before @samp{baz} and the
+semicolon in the output.
+
+The rules we decided above fail for @samp{baz}: we generate three
+padding tokens, one per macro invocation, before the token @samp{baz}.
+We would then have it take its spacing from the first of these, which
+carries source token @samp{foo} with no leading space.
+
+It is vital that cpplib get spacing correct in these examples since any
+of these macro expansions could be stringified, where spacing matters.
+
+So, this demonstrates that not just entering macro and argument
+expansions, but leaving them requires special handling too.  I made
+cpplib insert a padding token with a @code{NULL} source token when
+leaving macro expansions, as well as after each replaced argument in a
+macro's replacement list.  It also inserts appropriate padding tokens on
+either side of tokens created by the @samp{#} and @samp{##} operators.
+I expanded the rule so that, if we see a padding token with a
+@code{NULL} source token, @emph{and} that source token has no leading
+space, then we behave as if we have seen no padding tokens at all.  A
+quick check shows this rule will then get the above example correct as
+well.
+
+Now a relationship with paste avoidance is apparent: we have to be
+careful about paste avoidance in exactly the same locations we have
+padding tokens in order to get white space correct.  This makes
+implementation of paste avoidance easy: wherever the stand-alone
+preprocessor is fixing up spacing because of padding tokens, and it
+turns out that no space is needed, it has to take the extra step to
+check that a space is not needed after all to avoid an accidental paste.
+The function @code{cpp_avoid_paste} advises whether a space is required
+between two consecutive tokens.  To avoid excessive spacing, it tries
+hard to only require a space if one is likely to be necessary, but for
+reasons of efficiency it is slightly conservative and might recommend a
+space where one is not strictly needed.
+
+@node Line Numbering
+@unnumbered Line numbering
+@cindex line numbers
+
+@section Just which line number anyway?
+
+There are three reasonable requirements a cpplib client might have for
+the line number of a token passed to it:
+
+@itemize @bullet
+@item
+The source line it was lexed on.
+@item
+The line it is output on.  This can be different to the line it was
+lexed on if, for example, there are intervening escaped newlines or
+C-style comments.  For example:
+
+@smallexample
+foo /* @r{A long
+comment} */ bar \
+baz
+@result{}
+foo bar baz
+@end smallexample
+
+@item
+If the token results from a macro expansion, the line of the macro name,
+or possibly the line of the closing parenthesis in the case of
+function-like macro expansion.
+@end itemize
+
+The @code{cpp_token} structure contains @code{line} and @code{col}
+members.  The lexer fills these in with the line and column of the first
+character of the token.  Consequently, but maybe unexpectedly, a token
+from the replacement list of a macro expansion carries the location of
+the token within the @code{#define} directive, because cpplib expands a
+macro by returning pointers to the tokens in its replacement list.  The
+current implementation of cpplib assigns tokens created from built-in
+macros and the @samp{#} and @samp{##} operators the location of the most
+recently lexed token.  This is a because they are allocated from the
+lexer's token runs, and because of the way the diagnostic routines infer
+the appropriate location to report.
+
+The diagnostic routines in cpplib display the location of the most
+recently @emph{lexed} token, unless they are passed a specific line and
+column to report.  For diagnostics regarding tokens that arise from
+macro expansions, it might also be helpful for the user to see the
+original location in the macro definition that the token came from.
+Since that is exactly the information each token carries, such an
+enhancement could be made relatively easily in future.
+
+The stand-alone preprocessor faces a similar problem when determining
+the correct line to output the token on: the position attached to a
+token is fairly useless if the token came from a macro expansion.  All
+tokens on a logical line should be output on its first physical line, so
+the token's reported location is also wrong if it is part of a physical
+line other than the first.
+
+To solve these issues, cpplib provides a callback that is generated
+whenever it lexes a preprocessing token that starts a new logical line
+other than a directive.  It passes this token (which may be a
+@code{CPP_EOF} token indicating the end of the translation unit) to the
+callback routine, which can then use the line and column of this token
+to produce correct output.
+
+@section Representation of line numbers
+
+As mentioned above, cpplib stores with each token the line number that
+it was lexed on.  In fact, this number is not the number of the line in
+the source file, but instead bears more resemblance to the number of the
+line in the translation unit.
+
+The preprocessor maintains a monotonic increasing line count, which is
+incremented at every new line character (and also at the end of any
+buffer that does not end in a new line).  Since a line number of zero is
+useful to indicate certain special states and conditions, this variable
+starts counting from one.
+
+This variable therefore uniquely enumerates each line in the translation
+unit.  With some simple infrastructure, it is straight forward to map
+from this to the original source file and line number pair, saving space
+whenever line number information needs to be saved.  The code the
+implements this mapping lies in the files @file{line-map.c} and
+@file{line-map.h}.
+
+Command-line macros and assertions are implemented by pushing a buffer
+containing the right hand side of an equivalent @code{#define} or
+@code{#assert} directive.  Some built-in macros are handled similarly.
+Since these are all processed before the first line of the main input
+file, it will typically have an assigned line closer to twenty than to
+one.
+
+@node Guard Macros
+@unnumbered The Multiple-Include Optimization
+@cindex guard macros
+@cindex controlling macros
+@cindex multiple-include optimization
+
+Header files are often of the form
+
+@smallexample
+#ifndef FOO
+#define FOO
+@dots{}
+#endif
+@end smallexample
+
+@noindent
+to prevent the compiler from processing them more than once.  The
+preprocessor notices such header files, so that if the header file
+appears in a subsequent @code{#include} directive and @code{FOO} is
+defined, then it is ignored and it doesn't preprocess or even re-open
+the file a second time.  This is referred to as the @dfn{multiple
+include optimization}.
+
+Under what circumstances is such an optimization valid?  If the file
+were included a second time, it can only be optimized away if that
+inclusion would result in no tokens to return, and no relevant
+directives to process.  Therefore the current implementation imposes
+requirements and makes some allowances as follows:
+
+@enumerate
+@item
+There must be no tokens outside the controlling @code{#if}-@code{#endif}
+pair, but whitespace and comments are permitted.
+
+@item
+There must be no directives outside the controlling directive pair, but
+the @dfn{null directive} (a line containing nothing other than a single
+@samp{#} and possibly whitespace) is permitted.
+
+@item
+The opening directive must be of the form
+
+@smallexample
+#ifndef FOO
+@end smallexample
+
+or
+
+@smallexample
+#if !defined FOO     [equivalently, #if !defined(FOO)]
+@end smallexample
+
+@item
+In the second form above, the tokens forming the @code{#if} expression
+must have come directly from the source file---no macro expansion must
+have been involved.  This is because macro definitions can change, and
+tracking whether or not a relevant change has been made is not worth the
+implementation cost.
+
+@item
+There can be no @code{#else} or @code{#elif} directives at the outer
+conditional block level, because they would probably contain something
+of interest to a subsequent pass.
+@end enumerate
+
+First, when pushing a new file on the buffer stack,
+@code{_stack_include_file} sets the controlling macro @code{mi_cmacro} to
+@code{NULL}, and sets @code{mi_valid} to @code{true}.  This indicates
+that the preprocessor has not yet encountered anything that would
+invalidate the multiple-include optimization.  As described in the next
+few paragraphs, these two variables having these values effectively
+indicates top-of-file.
+
+When about to return a token that is not part of a directive,
+@code{_cpp_lex_token} sets @code{mi_valid} to @code{false}.  This
+enforces the constraint that tokens outside the controlling conditional
+block invalidate the optimization.
+
+The @code{do_if}, when appropriate, and @code{do_ifndef} directive
+handlers pass the controlling macro to the function
+@code{push_conditional}.  cpplib maintains a stack of nested conditional
+blocks, and after processing every opening conditional this function
+pushes an @code{if_stack} structure onto the stack.  In this structure
+it records the controlling macro for the block, provided there is one
+and we're at top-of-file (as described above).  If an @code{#elif} or
+@code{#else} directive is encountered, the controlling macro for that
+block is cleared to @code{NULL}.  Otherwise, it survives until the
+@code{#endif} closing the block, upon which @code{do_endif} sets
+@code{mi_valid} to true and stores the controlling macro in
+@code{mi_cmacro}.
+
+@code{_cpp_handle_directive} clears @code{mi_valid} when processing any
+directive other than an opening conditional and the null directive.
+With this, and requiring top-of-file to record a controlling macro, and
+no @code{#else} or @code{#elif} for it to survive and be copied to
+@code{mi_cmacro} by @code{do_endif}, we have enforced the absence of
+directives outside the main conditional block for the optimization to be
+on.
+
+Note that whilst we are inside the conditional block, @code{mi_valid} is
+likely to be reset to @code{false}, but this does not matter since
+the closing @code{#endif} restores it to @code{true} if appropriate.
+
+Finally, since @code{_cpp_lex_direct} pops the file off the buffer stack
+at @code{EOF} without returning a token, if the @code{#endif} directive
+was not followed by any tokens, @code{mi_valid} is @code{true} and
+@code{_cpp_pop_file_buffer} remembers the controlling macro associated
+with the file.  Subsequent calls to @code{stack_include_file} result in
+no buffer being pushed if the controlling macro is defined, effecting
+the optimization.
+
+A quick word on how we handle the
+
+@smallexample
+#if !defined FOO
+@end smallexample
+
+@noindent
+case.  @code{_cpp_parse_expr} and @code{parse_defined} take steps to see
+whether the three stages @samp{!}, @samp{defined-expression} and
+@samp{end-of-directive} occur in order in a @code{#if} expression.  If
+so, they return the guard macro to @code{do_if} in the variable
+@code{mi_ind_cmacro}, and otherwise set it to @code{NULL}.
+@code{enter_macro_context} sets @code{mi_valid} to false, so if a macro
+was expanded whilst parsing any part of the expression, then the
+top-of-file test in @code{push_conditional} fails and the optimization
+is turned off.
+
+@node Files
+@unnumbered File Handling
+@cindex files
+
+Fairly obviously, the file handling code of cpplib resides in the file
+@file{files.c}.  It takes care of the details of file searching,
+opening, reading and caching, for both the main source file and all the
+headers it recursively includes.
+
+The basic strategy is to minimize the number of system calls.  On many
+systems, the basic @code{open ()} and @code{fstat ()} system calls can
+be quite expensive.  For every @code{#include}-d file, we need to try
+all the directories in the search path until we find a match.  Some
+projects, such as glibc, pass twenty or thirty include paths on the
+command line, so this can rapidly become time consuming.
+
+For a header file we have not encountered before we have little choice
+but to do this.  However, it is often the case that the same headers are
+repeatedly included, and in these cases we try to avoid repeating the
+filesystem queries whilst searching for the correct file.
+
+For each file we try to open, we store the constructed path in a splay
+tree.  This path first undergoes simplification by the function
+@code{_cpp_simplify_pathname}.  For example,
+@file{/usr/include/bits/../foo.h} is simplified to
+@file{/usr/include/foo.h} before we enter it in the splay tree and try
+to @code{open ()} the file.  CPP will then find subsequent uses of
+@file{foo.h}, even as @file{/usr/include/foo.h}, in the splay tree and
+save system calls.
+
+Further, it is likely the file contents have also been cached, saving a
+@code{read ()} system call.  We don't bother caching the contents of
+header files that are re-inclusion protected, and whose re-inclusion
+macro is defined when we leave the header file for the first time.  If
+the host supports it, we try to map suitably large files into memory,
+rather than reading them in directly.
+
+The include paths are internally stored on a null-terminated
+singly-linked list, starting with the @code{"header.h"} directory search
+chain, which then links into the @code{<header.h>} directory chain.
+
+Files included with the @code{<foo.h>} syntax start the lookup directly
+in the second half of this chain.  However, files included with the
+@code{"foo.h"} syntax start at the beginning of the chain, but with one
+extra directory prepended.  This is the directory of the current file;
+the one containing the @code{#include} directive.  Prepending this
+directory on a per-file basis is handled by the function
+@code{search_from}.
+
+Note that a header included with a directory component, such as
+@code{#include "mydir/foo.h"} and opened as
+@file{/usr/local/include/mydir/foo.h}, will have the complete path minus
+the basename @samp{foo.h} as the current directory.
+
+Enough information is stored in the splay tree that CPP can immediately
+tell whether it can skip the header file because of the multiple include
+optimization, whether the file didn't exist or couldn't be opened for
+some reason, or whether the header was flagged not to be re-used, as it
+is with the obsolete @code{#import} directive.
+
+For the benefit of MS-DOS filesystems with an 8.3 filename limitation,
+CPP offers the ability to treat various include file names as aliases
+for the real header files with shorter names.  The map from one to the
+other is found in a special file called @samp{header.gcc}, stored in the
+command line (or system) include directories to which the mapping
+applies.  This may be higher up the directory tree than the full path to
+the file minus the base name.
+
+@node Concept Index
+@unnumbered Concept Index
+@printindex cp
+
+@bye
diff --git a/gcc/doc/cppopts.texi b/gcc/doc/cppopts.texi
new file mode 100644
index 000000000..52d59973a
--- /dev/null
+++ b/gcc/doc/cppopts.texi
@@ -0,0 +1,797 @@
+@c Copyright (c) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
+@c 2010, Free Software Foundation, Inc.
+@c This is part of the CPP and GCC manuals.
+@c For copying conditions, see the file gcc.texi.
+
+@c ---------------------------------------------------------------------
+@c Options affecting the preprocessor
+@c ---------------------------------------------------------------------
+
+@c If this file is included with the flag ``cppmanual'' set, it is
+@c formatted for inclusion in the CPP manual; otherwise the main GCC manual.
+
+@table @gcctabopt
+@item -D @var{name}
+@opindex D
+Predefine @var{name} as a macro, with definition @code{1}.
+
+@item -D @var{name}=@var{definition}
+The contents of @var{definition} are tokenized and processed as if
+they appeared during translation phase three in a @samp{#define}
+directive.  In particular, the definition will be truncated by
+embedded newline characters.
+
+If you are invoking the preprocessor from a shell or shell-like
+program you may need to use the shell's quoting syntax to protect
+characters such as spaces that have a meaning in the shell syntax.
+
+If you wish to define a function-like macro on the command line, write
+its argument list with surrounding parentheses before the equals sign
+(if any).  Parentheses are meaningful to most shells, so you will need
+to quote the option.  With @command{sh} and @command{csh},
+@option{-D'@var{name}(@var{args@dots{}})=@var{definition}'} works.
+
+@option{-D} and @option{-U} options are processed in the order they
+are given on the command line.  All @option{-imacros @var{file}} and
+@option{-include @var{file}} options are processed after all
+@option{-D} and @option{-U} options.
+
+@item -U @var{name}
+@opindex U
+Cancel any previous definition of @var{name}, either built in or
+provided with a @option{-D} option.
+
+@item -undef
+@opindex undef
+Do not predefine any system-specific or GCC-specific macros.  The
+standard predefined macros remain defined.
+@ifset cppmanual
+@xref{Standard Predefined Macros}.
+@end ifset
+
+@item -I @var{dir}
+@opindex I
+Add the directory @var{dir} to the list of directories to be searched
+for header files.
+@ifset cppmanual
+@xref{Search Path}.
+@end ifset
+Directories named by @option{-I} are searched before the standard
+system include directories.  If the directory @var{dir} is a standard
+system include directory, the option is ignored to ensure that the
+default search order for system directories and the special treatment
+of system headers are not defeated
+@ifset cppmanual
+(@pxref{System Headers})
+@end ifset
+.
+If @var{dir} begins with @code{=}, then the @code{=} will be replaced
+by the sysroot prefix; see @option{--sysroot} and @option{-isysroot}.
+
+@item -o @var{file}
+@opindex o
+Write output to @var{file}.  This is the same as specifying @var{file}
+as the second non-option argument to @command{cpp}.  @command{gcc} has a
+different interpretation of a second non-option argument, so you must
+use @option{-o} to specify the output file.
+
+@item -Wall
+@opindex Wall
+Turns on all optional warnings which are desirable for normal code.
+At present this is @option{-Wcomment}, @option{-Wtrigraphs},
+@option{-Wmultichar} and a warning about integer promotion causing a
+change of sign in @code{#if} expressions.  Note that many of the
+preprocessor's warnings are on by default and have no options to
+control them.
+
+@item -Wcomment
+@itemx -Wcomments
+@opindex Wcomment
+@opindex Wcomments
+Warn whenever a comment-start sequence @samp{/*} appears in a @samp{/*}
+comment, or whenever a backslash-newline appears in a @samp{//} comment.
+(Both forms have the same effect.)
+
+@item -Wtrigraphs
+@opindex Wtrigraphs
+@anchor{Wtrigraphs}
+Most trigraphs in comments cannot affect the meaning of the program.
+However, a trigraph that would form an escaped newline (@samp{??/} at
+the end of a line) can, by changing where the comment begins or ends.
+Therefore, only trigraphs that would form escaped newlines produce
+warnings inside a comment.
+
+This option is implied by @option{-Wall}.  If @option{-Wall} is not
+given, this option is still enabled unless trigraphs are enabled.  To
+get trigraph conversion without warnings, but get the other
+@option{-Wall} warnings, use @samp{-trigraphs -Wall -Wno-trigraphs}.
+
+@item -Wtraditional
+@opindex Wtraditional
+Warn about certain constructs that behave differently in traditional and
+ISO C@.  Also warn about ISO C constructs that have no traditional C
+equivalent, and problematic constructs which should be avoided.
+@ifset cppmanual
+@xref{Traditional Mode}.
+@end ifset
+
+@item -Wundef
+@opindex Wundef
+Warn whenever an identifier which is not a macro is encountered in an
+@samp{#if} directive, outside of @samp{defined}.  Such identifiers are
+replaced with zero.
+
+@item -Wunused-macros
+@opindex Wunused-macros
+Warn about macros defined in the main file that are unused.  A macro
+is @dfn{used} if it is expanded or tested for existence at least once.
+The preprocessor will also warn if the macro has not been used at the
+time it is redefined or undefined.
+
+Built-in macros, macros defined on the command line, and macros
+defined in include files are not warned about.
+
+@emph{Note:} If a macro is actually used, but only used in skipped
+conditional blocks, then CPP will report it as unused.  To avoid the
+warning in such a case, you might improve the scope of the macro's
+definition by, for example, moving it into the first skipped block.
+Alternatively, you could provide a dummy use with something like:
+
+@smallexample
+#if defined the_macro_causing_the_warning
+#endif
+@end smallexample
+
+@item -Wendif-labels
+@opindex Wendif-labels
+Warn whenever an @samp{#else} or an @samp{#endif} are followed by text.
+This usually happens in code of the form
+
+@smallexample
+#if FOO
+@dots{}
+#else FOO
+@dots{}
+#endif FOO
+@end smallexample
+
+@noindent
+The second and third @code{FOO} should be in comments, but often are not
+in older programs.  This warning is on by default.
+
+@item -Werror
+@opindex Werror
+Make all warnings into hard errors.  Source code which triggers warnings
+will be rejected.
+
+@item -Wsystem-headers
+@opindex Wsystem-headers
+Issue warnings for code in system headers.  These are normally unhelpful
+in finding bugs in your own code, therefore suppressed.  If you are
+responsible for the system library, you may want to see them.
+
+@item -w
+@opindex w
+Suppress all warnings, including those which GNU CPP issues by default.
+
+@item -pedantic
+@opindex pedantic
+Issue all the mandatory diagnostics listed in the C standard.  Some of
+them are left out by default, since they trigger frequently on harmless
+code.
+
+@item -pedantic-errors
+@opindex pedantic-errors
+Issue all the mandatory diagnostics, and make all mandatory diagnostics
+into errors.  This includes mandatory diagnostics that GCC issues
+without @samp{-pedantic} but treats as warnings.
+
+@item -M
+@opindex M
+@cindex @command{make}
+@cindex dependencies, @command{make}
+Instead of outputting the result of preprocessing, output a rule
+suitable for @command{make} describing the dependencies of the main
+source file.  The preprocessor outputs one @command{make} rule containing
+the object file name for that source file, a colon, and the names of all
+the included files, including those coming from @option{-include} or
+@option{-imacros} command line options.
+
+Unless specified explicitly (with @option{-MT} or @option{-MQ}), the
+object file name consists of the name of the source file with any
+suffix replaced with object file suffix and with any leading directory
+parts removed.  If there are many included files then the rule is
+split into several lines using @samp{\}-newline.  The rule has no
+commands.
+
+This option does not suppress the preprocessor's debug output, such as
+@option{-dM}.  To avoid mixing such debug output with the dependency
+rules you should explicitly specify the dependency output file with
+@option{-MF}, or use an environment variable like
+@env{DEPENDENCIES_OUTPUT} (@pxref{Environment Variables}).  Debug output
+will still be sent to the regular output stream as normal.
+
+Passing @option{-M} to the driver implies @option{-E}, and suppresses
+warnings with an implicit @option{-w}.
+
+@item -MM
+@opindex MM
+Like @option{-M} but do not mention header files that are found in
+system header directories, nor header files that are included,
+directly or indirectly, from such a header.
+
+This implies that the choice of angle brackets or double quotes in an
+@samp{#include} directive does not in itself determine whether that
+header will appear in @option{-MM} dependency output.  This is a
+slight change in semantics from GCC versions 3.0 and earlier.
+
+@anchor{dashMF}
+@item -MF @var{file}
+@opindex MF
+When used with @option{-M} or @option{-MM}, specifies a
+file to write the dependencies to.  If no @option{-MF} switch is given
+the preprocessor sends the rules to the same place it would have sent
+preprocessed output.
+
+When used with the driver options @option{-MD} or @option{-MMD},
+@option{-MF} overrides the default dependency output file.
+
+@item -MG
+@opindex MG
+In conjunction with an option such as @option{-M} requesting
+dependency generation, @option{-MG} assumes missing header files are
+generated files and adds them to the dependency list without raising
+an error.  The dependency filename is taken directly from the
+@code{#include} directive without prepending any path.  @option{-MG}
+also suppresses preprocessed output, as a missing header file renders
+this useless.
+
+This feature is used in automatic updating of makefiles.
+
+@item -MP
+@opindex MP
+This option instructs CPP to add a phony target for each dependency
+other than the main file, causing each to depend on nothing.  These
+dummy rules work around errors @command{make} gives if you remove header
+files without updating the @file{Makefile} to match.
+
+This is typical output:
+
+@smallexample
+test.o: test.c test.h
+
+test.h:
+@end smallexample
+
+@item -MT @var{target}
+@opindex MT
+
+Change the target of the rule emitted by dependency generation.  By
+default CPP takes the name of the main input file, deletes any
+directory components and any file suffix such as @samp{.c}, and
+appends the platform's usual object suffix.  The result is the target.
+
+An @option{-MT} option will set the target to be exactly the string you
+specify.  If you want multiple targets, you can specify them as a single
+argument to @option{-MT}, or use multiple @option{-MT} options.
+
+For example, @option{@w{-MT '$(objpfx)foo.o'}} might give
+
+@smallexample
+$(objpfx)foo.o: foo.c
+@end smallexample
+
+@item -MQ @var{target}
+@opindex MQ
+
+Same as @option{-MT}, but it quotes any characters which are special to
+Make.  @option{@w{-MQ '$(objpfx)foo.o'}} gives
+
+@smallexample
+$$(objpfx)foo.o: foo.c
+@end smallexample
+
+The default target is automatically quoted, as if it were given with
+@option{-MQ}.
+
+@item -MD
+@opindex MD
+@option{-MD} is equivalent to @option{-M -MF @var{file}}, except that
+@option{-E} is not implied.  The driver determines @var{file} based on
+whether an @option{-o} option is given.  If it is, the driver uses its
+argument but with a suffix of @file{.d}, otherwise it takes the name
+of the input file, removes any directory components and suffix, and
+applies a @file{.d} suffix.
+
+If @option{-MD} is used in conjunction with @option{-E}, any
+@option{-o} switch is understood to specify the dependency output file
+(@pxref{dashMF,,-MF}), but if used without @option{-E}, each @option{-o}
+is understood to specify a target object file.
+
+Since @option{-E} is not implied, @option{-MD} can be used to generate
+a dependency output file as a side-effect of the compilation process.
+
+@item -MMD
+@opindex MMD
+Like @option{-MD} except mention only user header files, not system
+header files.
+
+@ifclear cppmanual
+@item -fpch-deps
+@opindex fpch-deps
+When using precompiled headers (@pxref{Precompiled Headers}), this flag
+will cause the dependency-output flags to also list the files from the
+precompiled header's dependencies.  If not specified only the
+precompiled header would be listed and not the files that were used to
+create it because those files are not consulted when a precompiled
+header is used.
+
+@item -fpch-preprocess
+@opindex fpch-preprocess
+This option allows use of a precompiled header (@pxref{Precompiled
+Headers}) together with @option{-E}.  It inserts a special @code{#pragma},
+@code{#pragma GCC pch_preprocess "@var{filename}"} in the output to mark
+the place where the precompiled header was found, and its @var{filename}.
+When @option{-fpreprocessed} is in use, GCC recognizes this @code{#pragma}
+and loads the PCH@.
+
+This option is off by default, because the resulting preprocessed output
+is only really suitable as input to GCC@.  It is switched on by
+@option{-save-temps}.
+
+You should not write this @code{#pragma} in your own code, but it is
+safe to edit the filename if the PCH file is available in a different
+location.  The filename may be absolute or it may be relative to GCC's
+current directory.
+
+@end ifclear
+@item -x c
+@itemx -x c++
+@itemx -x objective-c
+@itemx -x assembler-with-cpp
+@opindex x
+Specify the source language: C, C++, Objective-C, or assembly.  This has
+nothing to do with standards conformance or extensions; it merely
+selects which base syntax to expect.  If you give none of these options,
+cpp will deduce the language from the extension of the source file:
+@samp{.c}, @samp{.cc}, @samp{.m}, or @samp{.S}.  Some other common
+extensions for C++ and assembly are also recognized.  If cpp does not
+recognize the extension, it will treat the file as C; this is the most
+generic mode.
+
+@emph{Note:} Previous versions of cpp accepted a @option{-lang} option
+which selected both the language and the standards conformance level.
+This option has been removed, because it conflicts with the @option{-l}
+option.
+
+@item -std=@var{standard}
+@itemx -ansi
+@opindex ansi
+@opindex std=
+Specify the standard to which the code should conform.  Currently CPP
+knows about C and C++ standards; others may be added in the future.
+
+@var{standard}
+may be one of:
+@table @code
+@item c90
+@itemx c89
+@itemx iso9899:1990
+The ISO C standard from 1990.  @samp{c90} is the customary shorthand for
+this version of the standard.
+
+The @option{-ansi} option is equivalent to @option{-std=c90}.
+
+@item iso9899:199409
+The 1990 C standard, as amended in 1994.
+
+@item iso9899:1999
+@itemx c99
+@itemx iso9899:199x
+@itemx c9x
+The revised ISO C standard, published in December 1999.  Before
+publication, this was known as C9X@.
+
+@item c1x
+The next version of the ISO C standard, still under development.
+
+@item gnu90
+@itemx gnu89
+The 1990 C standard plus GNU extensions.  This is the default.
+
+@item gnu99
+@itemx gnu9x
+The 1999 C standard plus GNU extensions.
+
+@item gnu1x
+The next version of the ISO C standard, still under development, plus
+GNU extensions.
+
+@item c++98
+The 1998 ISO C++ standard plus amendments.
+
+@item gnu++98
+The same as @option{-std=c++98} plus GNU extensions.  This is the
+default for C++ code.
+@end table
+
+@item -I-
+@opindex I-
+Split the include path.  Any directories specified with @option{-I}
+options before @option{-I-} are searched only for headers requested with
+@code{@w{#include "@var{file}"}}; they are not searched for
+@code{@w{#include <@var{file}>}}.  If additional directories are
+specified with @option{-I} options after the @option{-I-}, those
+directories are searched for all @samp{#include} directives.
+
+In addition, @option{-I-} inhibits the use of the directory of the current
+file directory as the first search directory for @code{@w{#include
+"@var{file}"}}.
+@ifset cppmanual
+@xref{Search Path}.
+@end ifset
+This option has been deprecated.
+
+@item -nostdinc
+@opindex nostdinc
+Do not search the standard system directories for header files.
+Only the directories you have specified with @option{-I} options
+(and the directory of the current file, if appropriate) are searched.
+
+@item -nostdinc++
+@opindex nostdinc++
+Do not search for header files in the C++-specific standard directories,
+but do still search the other standard directories.  (This option is
+used when building the C++ library.)
+
+@item -include @var{file}
+@opindex include
+Process @var{file} as if @code{#include "file"} appeared as the first
+line of the primary source file.  However, the first directory searched
+for @var{file} is the preprocessor's working directory @emph{instead of}
+the directory containing the main source file.  If not found there, it
+is searched for in the remainder of the @code{#include "@dots{}"} search
+chain as normal.
+
+If multiple @option{-include} options are given, the files are included
+in the order they appear on the command line.
+
+@item -imacros @var{file}
+@opindex imacros
+Exactly like @option{-include}, except that any output produced by
+scanning @var{file} is thrown away.  Macros it defines remain defined.
+This allows you to acquire all the macros from a header without also
+processing its declarations.
+
+All files specified by @option{-imacros} are processed before all files
+specified by @option{-include}.
+
+@item -idirafter @var{dir}
+@opindex idirafter
+Search @var{dir} for header files, but do it @emph{after} all
+directories specified with @option{-I} and the standard system directories
+have been exhausted.  @var{dir} is treated as a system include directory.
+If @var{dir} begins with @code{=}, then the @code{=} will be replaced
+by the sysroot prefix; see @option{--sysroot} and @option{-isysroot}.
+
+@item -iprefix @var{prefix}
+@opindex iprefix
+Specify @var{prefix} as the prefix for subsequent @option{-iwithprefix}
+options.  If the prefix represents a directory, you should include the
+final @samp{/}.
+
+@item -iwithprefix @var{dir}
+@itemx -iwithprefixbefore @var{dir}
+@opindex iwithprefix
+@opindex iwithprefixbefore
+Append @var{dir} to the prefix specified previously with
+@option{-iprefix}, and add the resulting directory to the include search
+path.  @option{-iwithprefixbefore} puts it in the same place @option{-I}
+would; @option{-iwithprefix} puts it where @option{-idirafter} would.
+
+@item -isysroot @var{dir}
+@opindex isysroot
+This option is like the @option{--sysroot} option, but applies only to
+header files (except for Darwin targets, where it applies to both header
+files and libraries).  See the @option{--sysroot} option for more
+information.
+
+@item -imultilib @var{dir}
+@opindex imultilib
+Use @var{dir} as a subdirectory of the directory containing
+target-specific C++ headers.
+
+@item -isystem @var{dir}
+@opindex isystem
+Search @var{dir} for header files, after all directories specified by
+@option{-I} but before the standard system directories.  Mark it
+as a system directory, so that it gets the same special treatment as
+is applied to the standard system directories.
+@ifset cppmanual
+@xref{System Headers}.
+@end ifset
+If @var{dir} begins with @code{=}, then the @code{=} will be replaced
+by the sysroot prefix; see @option{--sysroot} and @option{-isysroot}.
+
+@item -iquote @var{dir}
+@opindex iquote
+Search @var{dir} only for header files requested with
+@code{@w{#include "@var{file}"}}; they are not searched for
+@code{@w{#include <@var{file}>}}, before all directories specified by
+@option{-I} and before the standard system directories.
+@ifset cppmanual
+@xref{Search Path}.
+@end ifset
+If @var{dir} begins with @code{=}, then the @code{=} will be replaced
+by the sysroot prefix; see @option{--sysroot} and @option{-isysroot}.
+
+@item -fdirectives-only
+@opindex fdirectives-only
+When preprocessing, handle directives, but do not expand macros.
+
+The option's behavior depends on the @option{-E} and @option{-fpreprocessed}
+options.
+
+With @option{-E}, preprocessing is limited to the handling of directives
+such as @code{#define}, @code{#ifdef}, and @code{#error}.  Other
+preprocessor operations, such as macro expansion and trigraph
+conversion are not performed.  In addition, the @option{-dD} option is
+implicitly enabled.
+
+With @option{-fpreprocessed}, predefinition of command line and most
+builtin macros is disabled.  Macros such as @code{__LINE__}, which are
+contextually dependent, are handled normally.  This enables compilation of
+files previously preprocessed with @code{-E -fdirectives-only}.
+
+With both @option{-E} and @option{-fpreprocessed}, the rules for
+@option{-fpreprocessed} take precedence.  This enables full preprocessing of
+files previously preprocessed with @code{-E -fdirectives-only}.
+
+@item -fdollars-in-identifiers
+@opindex fdollars-in-identifiers
+@anchor{fdollars-in-identifiers}
+Accept @samp{$} in identifiers.
+@ifset cppmanual
+@xref{Identifier characters}.
+@end ifset
+
+@item -fextended-identifiers
+@opindex fextended-identifiers
+Accept universal character names in identifiers.  This option is
+experimental; in a future version of GCC, it will be enabled by
+default for C99 and C++.
+
+@item -fpreprocessed
+@opindex fpreprocessed
+Indicate to the preprocessor that the input file has already been
+preprocessed.  This suppresses things like macro expansion, trigraph
+conversion, escaped newline splicing, and processing of most directives.
+The preprocessor still recognizes and removes comments, so that you can
+pass a file preprocessed with @option{-C} to the compiler without
+problems.  In this mode the integrated preprocessor is little more than
+a tokenizer for the front ends.
+
+@option{-fpreprocessed} is implicit if the input file has one of the
+extensions @samp{.i}, @samp{.ii} or @samp{.mi}.  These are the
+extensions that GCC uses for preprocessed files created by
+@option{-save-temps}.
+
+@item -ftabstop=@var{width}
+@opindex ftabstop
+Set the distance between tab stops.  This helps the preprocessor report
+correct column numbers in warnings or errors, even if tabs appear on the
+line.  If the value is less than 1 or greater than 100, the option is
+ignored.  The default is 8.
+
+@item -fexec-charset=@var{charset}
+@opindex fexec-charset
+@cindex character set, execution
+Set the execution character set, used for string and character
+constants.  The default is UTF-8.  @var{charset} can be any encoding
+supported by the system's @code{iconv} library routine.
+
+@item -fwide-exec-charset=@var{charset}
+@opindex fwide-exec-charset
+@cindex character set, wide execution
+Set the wide execution character set, used for wide string and
+character constants.  The default is UTF-32 or UTF-16, whichever
+corresponds to the width of @code{wchar_t}.  As with
+@option{-fexec-charset}, @var{charset} can be any encoding supported
+by the system's @code{iconv} library routine; however, you will have
+problems with encodings that do not fit exactly in @code{wchar_t}.
+
+@item -finput-charset=@var{charset}
+@opindex finput-charset
+@cindex character set, input
+Set the input character set, used for translation from the character
+set of the input file to the source character set used by GCC@.  If the
+locale does not specify, or GCC cannot get this information from the
+locale, the default is UTF-8.  This can be overridden by either the locale
+or this command line option.  Currently the command line option takes
+precedence if there's a conflict.  @var{charset} can be any encoding
+supported by the system's @code{iconv} library routine.
+
+@item -fworking-directory
+@opindex fworking-directory
+@opindex fno-working-directory
+Enable generation of linemarkers in the preprocessor output that will
+let the compiler know the current working directory at the time of
+preprocessing.  When this option is enabled, the preprocessor will
+emit, after the initial linemarker, a second linemarker with the
+current working directory followed by two slashes.  GCC will use this
+directory, when it's present in the preprocessed input, as the
+directory emitted as the current working directory in some debugging
+information formats.  This option is implicitly enabled if debugging
+information is enabled, but this can be inhibited with the negated
+form @option{-fno-working-directory}.  If the @option{-P} flag is
+present in the command line, this option has no effect, since no
+@code{#line} directives are emitted whatsoever.
+
+@item -fno-show-column
+@opindex fno-show-column
+Do not print column numbers in diagnostics.  This may be necessary if
+diagnostics are being scanned by a program that does not understand the
+column numbers, such as @command{dejagnu}.
+
+@item -A @var{predicate}=@var{answer}
+@opindex A
+Make an assertion with the predicate @var{predicate} and answer
+@var{answer}.  This form is preferred to the older form @option{-A
+@var{predicate}(@var{answer})}, which is still supported, because
+it does not use shell special characters.
+@ifset cppmanual
+@xref{Obsolete Features}.
+@end ifset
+
+@item -A -@var{predicate}=@var{answer}
+Cancel an assertion with the predicate @var{predicate} and answer
+@var{answer}.
+
+@item -dCHARS
+@var{CHARS} is a sequence of one or more of the following characters,
+and must not be preceded by a space.  Other characters are interpreted
+by the compiler proper, or reserved for future versions of GCC, and so
+are silently ignored.  If you specify characters whose behavior
+conflicts, the result is undefined.
+
+@table @samp
+@item M
+@opindex dM
+Instead of the normal output, generate a list of @samp{#define}
+directives for all the macros defined during the execution of the
+preprocessor, including predefined macros.  This gives you a way of
+finding out what is predefined in your version of the preprocessor.
+Assuming you have no file @file{foo.h}, the command
+
+@smallexample
+touch foo.h; cpp -dM foo.h
+@end smallexample
+
+@noindent
+will show all the predefined macros.
+
+If you use @option{-dM} without the @option{-E} option, @option{-dM} is
+interpreted as a synonym for @option{-fdump-rtl-mach}.
+@xref{Debugging Options, , ,gcc}.
+
+@item D
+@opindex dD
+Like @samp{M} except in two respects: it does @emph{not} include the
+predefined macros, and it outputs @emph{both} the @samp{#define}
+directives and the result of preprocessing.  Both kinds of output go to
+the standard output file.
+
+@item N
+@opindex dN
+Like @samp{D}, but emit only the macro names, not their expansions.
+
+@item I
+@opindex dI
+Output @samp{#include} directives in addition to the result of
+preprocessing.
+
+@item U
+@opindex dU
+Like @samp{D} except that only macros that are expanded, or whose
+definedness is tested in preprocessor directives, are output; the
+output is delayed until the use or test of the macro; and
+@samp{#undef} directives are also output for macros tested but
+undefined at the time.
+@end table
+
+@item -P
+@opindex P
+Inhibit generation of linemarkers in the output from the preprocessor.
+This might be useful when running the preprocessor on something that is
+not C code, and will be sent to a program which might be confused by the
+linemarkers.
+@ifset cppmanual
+@xref{Preprocessor Output}.
+@end ifset
+
+@item -C
+@opindex C
+Do not discard comments.  All comments are passed through to the output
+file, except for comments in processed directives, which are deleted
+along with the directive.
+
+You should be prepared for side effects when using @option{-C}; it
+causes the preprocessor to treat comments as tokens in their own right.
+For example, comments appearing at the start of what would be a
+directive line have the effect of turning that line into an ordinary
+source line, since the first token on the line is no longer a @samp{#}.
+
+@item -CC
+Do not discard comments, including during macro expansion.  This is
+like @option{-C}, except that comments contained within macros are
+also passed through to the output file where the macro is expanded.
+
+In addition to the side-effects of the @option{-C} option, the
+@option{-CC} option causes all C++-style comments inside a macro
+to be converted to C-style comments.  This is to prevent later use
+of that macro from inadvertently commenting out the remainder of
+the source line.
+
+The @option{-CC} option is generally used to support lint comments.
+
+@item -traditional-cpp
+@opindex traditional-cpp
+Try to imitate the behavior of old-fashioned C preprocessors, as
+opposed to ISO C preprocessors.
+@ifset cppmanual
+@xref{Traditional Mode}.
+@end ifset
+
+@item -trigraphs
+@opindex trigraphs
+Process trigraph sequences.
+@ifset cppmanual
+@xref{Initial processing}.
+@end ifset
+@ifclear cppmanual
+These are three-character sequences, all starting with @samp{??}, that
+are defined by ISO C to stand for single characters.  For example,
+@samp{??/} stands for @samp{\}, so @samp{'??/n'} is a character
+constant for a newline.  By default, GCC ignores trigraphs, but in
+standard-conforming modes it converts them.  See the @option{-std} and
+@option{-ansi} options.
+
+The nine trigraphs and their replacements are
+
+@smallexample
+Trigraph:       ??(  ??)  ??<  ??>  ??=  ??/  ??'  ??!  ??-
+Replacement:      [    ]    @{    @}    #    \    ^    |    ~
+@end smallexample
+@end ifclear
+
+@item -remap
+@opindex remap
+Enable special code to work around file systems which only permit very
+short file names, such as MS-DOS@.
+
+@item --help
+@itemx --target-help
+@opindex help
+@opindex target-help
+Print text describing all the command line options instead of
+preprocessing anything.
+
+@item -v
+@opindex v
+Verbose mode.  Print out GNU CPP's version number at the beginning of
+execution, and report the final form of the include path.
+
+@item -H
+@opindex H
+Print the name of each header file used, in addition to other normal
+activities.  Each name is indented to show how deep in the
+@samp{#include} stack it is.  Precompiled header files are also
+printed, even if they are found to be invalid; an invalid precompiled
+header file is printed with @samp{...x} and a valid one with @samp{...!} .
+
+@item -version
+@itemx --version
+@opindex version
+Print out GNU CPP's version number.  With one dash, proceed to
+preprocess as normal.  With two dashes, exit immediately.
+@end table
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
new file mode 100644
index 000000000..be1c32cc1
--- /dev/null
+++ b/gcc/doc/extend.texi
@@ -0,0 +1,14546 @@
+@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1996, 1998, 1999, 2000, 2001,
+@c 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
+@c Free Software Foundation, Inc.
+
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node C Extensions
+@chapter Extensions to the C Language Family
+@cindex extensions, C language
+@cindex C language extensions
+
+@opindex pedantic
+GNU C provides several language features not found in ISO standard C@.
+(The @option{-pedantic} option directs GCC to print a warning message if
+any of these features is used.)  To test for the availability of these
+features in conditional compilation, check for a predefined macro
+@code{__GNUC__}, which is always defined under GCC@.
+
+These extensions are available in C and Objective-C@.  Most of them are
+also available in C++.  @xref{C++ Extensions,,Extensions to the
+C++ Language}, for extensions that apply @emph{only} to C++.
+
+Some features that are in ISO C99 but not C90 or C++ are also, as
+extensions, accepted by GCC in C90 mode and in C++.
+
+@menu
+* Statement Exprs::     Putting statements and declarations inside expressions.
+* Local Labels::        Labels local to a block.
+* Labels as Values::    Getting pointers to labels, and computed gotos.
+* Nested Functions::    As in Algol and Pascal, lexical scoping of functions.
+* Constructing Calls::  Dispatching a call to another function.
+* Typeof::              @code{typeof}: referring to the type of an expression.
+* Conditionals::        Omitting the middle operand of a @samp{?:} expression.
+* Long Long::           Double-word integers---@code{long long int}.
+* __int128::			128-bit integers---@code{__int128}.
+* Complex::             Data types for complex numbers.
+* Floating Types::      Additional Floating Types.
+* Half-Precision::      Half-Precision Floating Point.
+* Decimal Float::       Decimal Floating Types. 
+* Hex Floats::          Hexadecimal floating-point constants.
+* Fixed-Point::         Fixed-Point Types.
+* Named Address Spaces::Named address spaces.
+* Zero Length::         Zero-length arrays.
+* Variable Length::     Arrays whose length is computed at run time.
+* Empty Structures::    Structures with no members.
+* Variadic Macros::     Macros with a variable number of arguments.
+* Escaped Newlines::    Slightly looser rules for escaped newlines.
+* Subscripting::        Any array can be subscripted, even if not an lvalue.
+* Pointer Arith::       Arithmetic on @code{void}-pointers and function pointers.
+* Initializers::        Non-constant initializers.
+* Compound Literals::   Compound literals give structures, unions
+                        or arrays as values.
+* Designated Inits::    Labeling elements of initializers.
+* Cast to Union::       Casting to union type from any member of the union.
+* Case Ranges::         `case 1 ... 9' and such.
+* Mixed Declarations::  Mixing declarations and code.
+* Function Attributes:: Declaring that functions have no side effects,
+                        or that they can never return.
+* Attribute Syntax::    Formal syntax for attributes.
+* Function Prototypes:: Prototype declarations and old-style definitions.
+* C++ Comments::        C++ comments are recognized.
+* Dollar Signs::        Dollar sign is allowed in identifiers.
+* Character Escapes::   @samp{\e} stands for the character @key{ESC}.
+* Variable Attributes:: Specifying attributes of variables.
+* Type Attributes::     Specifying attributes of types.
+* Alignment::           Inquiring about the alignment of a type or variable.
+* Inline::              Defining inline functions (as fast as macros).
+* Volatiles::           What constitutes an access to a volatile object.
+* Extended Asm::        Assembler instructions with C expressions as operands.
+                        (With them you can define ``built-in'' functions.)
+* Constraints::         Constraints for asm operands
+* Asm Labels::          Specifying the assembler name to use for a C symbol.
+* Explicit Reg Vars::   Defining variables residing in specified registers.
+* Alternate Keywords::  @code{__const__}, @code{__asm__}, etc., for header files.
+* Incomplete Enums::    @code{enum foo;}, with details to follow.
+* Function Names::      Printable strings which are the name of the current
+                        function.
+* Return Address::      Getting the return or frame address of a function.
+* Vector Extensions::   Using vector instructions through built-in functions.
+* Offsetof::            Special syntax for implementing @code{offsetof}.
+* Atomic Builtins::     Built-in functions for atomic memory access.
+* Object Size Checking:: Built-in functions for limited buffer overflow
+                        checking.
+* Other Builtins::      Other built-in functions.
+* Target Builtins::     Built-in functions specific to particular targets.
+* Target Format Checks:: Format checks specific to particular targets.
+* Pragmas::             Pragmas accepted by GCC.
+* Unnamed Fields::      Unnamed struct/union fields within structs/unions.
+* Thread-Local::        Per-thread variables.
+* Binary constants::    Binary constants using the @samp{0b} prefix.
+@end menu
+
+@node Statement Exprs
+@section Statements and Declarations in Expressions
+@cindex statements inside expressions
+@cindex declarations inside expressions
+@cindex expressions containing statements
+@cindex macros, statements in expressions
+
+@c the above section title wrapped and causes an underfull hbox.. i
+@c changed it from "within" to "in". --mew 4feb93
+A compound statement enclosed in parentheses may appear as an expression
+in GNU C@.  This allows you to use loops, switches, and local variables
+within an expression.
+
+Recall that a compound statement is a sequence of statements surrounded
+by braces; in this construct, parentheses go around the braces.  For
+example:
+
+@smallexample
+(@{ int y = foo (); int z;
+   if (y > 0) z = y;
+   else z = - y;
+   z; @})
+@end smallexample
+
+@noindent
+is a valid (though slightly more complex than necessary) expression
+for the absolute value of @code{foo ()}.
+
+The last thing in the compound statement should be an expression
+followed by a semicolon; the value of this subexpression serves as the
+value of the entire construct.  (If you use some other kind of statement
+last within the braces, the construct has type @code{void}, and thus
+effectively no value.)
+
+This feature is especially useful in making macro definitions ``safe'' (so
+that they evaluate each operand exactly once).  For example, the
+``maximum'' function is commonly defined as a macro in standard C as
+follows:
+
+@smallexample
+#define max(a,b) ((a) > (b) ? (a) : (b))
+@end smallexample
+
+@noindent
+@cindex side effects, macro argument
+But this definition computes either @var{a} or @var{b} twice, with bad
+results if the operand has side effects.  In GNU C, if you know the
+type of the operands (here taken as @code{int}), you can define
+the macro safely as follows:
+
+@smallexample
+#define maxint(a,b) \
+  (@{int _a = (a), _b = (b); _a > _b ? _a : _b; @})
+@end smallexample
+
+Embedded statements are not allowed in constant expressions, such as
+the value of an enumeration constant, the width of a bit-field, or
+the initial value of a static variable.
+
+If you don't know the type of the operand, you can still do this, but you
+must use @code{typeof} (@pxref{Typeof}).
+
+In G++, the result value of a statement expression undergoes array and
+function pointer decay, and is returned by value to the enclosing
+expression.  For instance, if @code{A} is a class, then
+
+@smallexample
+        A a;
+
+        (@{a;@}).Foo ()
+@end smallexample
+
+@noindent
+will construct a temporary @code{A} object to hold the result of the
+statement expression, and that will be used to invoke @code{Foo}.
+Therefore the @code{this} pointer observed by @code{Foo} will not be the
+address of @code{a}.
+
+Any temporaries created within a statement within a statement expression
+will be destroyed at the statement's end.  This makes statement
+expressions inside macros slightly different from function calls.  In
+the latter case temporaries introduced during argument evaluation will
+be destroyed at the end of the statement that includes the function
+call.  In the statement expression case they will be destroyed during
+the statement expression.  For instance,
+
+@smallexample
+#define macro(a)  (@{__typeof__(a) b = (a); b + 3; @})
+template<typename T> T function(T a) @{ T b = a; return b + 3; @}
+
+void foo ()
+@{
+  macro (X ());
+  function (X ());
+@}
+@end smallexample
+
+@noindent
+will have different places where temporaries are destroyed.  For the
+@code{macro} case, the temporary @code{X} will be destroyed just after
+the initialization of @code{b}.  In the @code{function} case that
+temporary will be destroyed when the function returns.
+
+These considerations mean that it is probably a bad idea to use
+statement-expressions of this form in header files that are designed to
+work with C++.  (Note that some versions of the GNU C Library contained
+header files using statement-expression that lead to precisely this
+bug.)
+
+Jumping into a statement expression with @code{goto} or using a
+@code{switch} statement outside the statement expression with a
+@code{case} or @code{default} label inside the statement expression is
+not permitted.  Jumping into a statement expression with a computed
+@code{goto} (@pxref{Labels as Values}) yields undefined behavior.
+Jumping out of a statement expression is permitted, but if the
+statement expression is part of a larger expression then it is
+unspecified which other subexpressions of that expression have been
+evaluated except where the language definition requires certain
+subexpressions to be evaluated before or after the statement
+expression.  In any case, as with a function call the evaluation of a
+statement expression is not interleaved with the evaluation of other
+parts of the containing expression.  For example,
+
+@smallexample
+  foo (), ((@{ bar1 (); goto a; 0; @}) + bar2 ()), baz();
+@end smallexample
+
+@noindent
+will call @code{foo} and @code{bar1} and will not call @code{baz} but
+may or may not call @code{bar2}.  If @code{bar2} is called, it will be
+called after @code{foo} and before @code{bar1}
+
+@node Local Labels
+@section Locally Declared Labels
+@cindex local labels
+@cindex macros, local labels
+
+GCC allows you to declare @dfn{local labels} in any nested block
+scope.  A local label is just like an ordinary label, but you can
+only reference it (with a @code{goto} statement, or by taking its
+address) within the block in which it was declared.
+
+A local label declaration looks like this:
+
+@smallexample
+__label__ @var{label};
+@end smallexample
+
+@noindent
+or
+
+@smallexample
+__label__ @var{label1}, @var{label2}, /* @r{@dots{}} */;
+@end smallexample
+
+Local label declarations must come at the beginning of the block,
+before any ordinary declarations or statements.
+
+The label declaration defines the label @emph{name}, but does not define
+the label itself.  You must do this in the usual way, with
+@code{@var{label}:}, within the statements of the statement expression.
+
+The local label feature is useful for complex macros.  If a macro
+contains nested loops, a @code{goto} can be useful for breaking out of
+them.  However, an ordinary label whose scope is the whole function
+cannot be used: if the macro can be expanded several times in one
+function, the label will be multiply defined in that function.  A
+local label avoids this problem.  For example:
+
+@smallexample
+#define SEARCH(value, array, target)              \
+do @{                                              \
+  __label__ found;                                \
+  typeof (target) _SEARCH_target = (target);      \
+  typeof (*(array)) *_SEARCH_array = (array);     \
+  int i, j;                                       \
+  int value;                                      \
+  for (i = 0; i < max; i++)                       \
+    for (j = 0; j < max; j++)                     \
+      if (_SEARCH_array[i][j] == _SEARCH_target)  \
+        @{ (value) = i; goto found; @}              \
+  (value) = -1;                                   \
+ found:;                                          \
+@} while (0)
+@end smallexample
+
+This could also be written using a statement-expression:
+
+@smallexample
+#define SEARCH(array, target)                     \
+(@{                                                \
+  __label__ found;                                \
+  typeof (target) _SEARCH_target = (target);      \
+  typeof (*(array)) *_SEARCH_array = (array);     \
+  int i, j;                                       \
+  int value;                                      \
+  for (i = 0; i < max; i++)                       \
+    for (j = 0; j < max; j++)                     \
+      if (_SEARCH_array[i][j] == _SEARCH_target)  \
+        @{ value = i; goto found; @}                \
+  value = -1;                                     \
+ found:                                           \
+  value;                                          \
+@})
+@end smallexample
+
+Local label declarations also make the labels they declare visible to
+nested functions, if there are any.  @xref{Nested Functions}, for details.
+
+@node Labels as Values
+@section Labels as Values
+@cindex labels as values
+@cindex computed gotos
+@cindex goto with computed label
+@cindex address of a label
+
+You can get the address of a label defined in the current function
+(or a containing function) with the unary operator @samp{&&}.  The
+value has type @code{void *}.  This value is a constant and can be used
+wherever a constant of that type is valid.  For example:
+
+@smallexample
+void *ptr;
+/* @r{@dots{}} */
+ptr = &&foo;
+@end smallexample
+
+To use these values, you need to be able to jump to one.  This is done
+with the computed goto statement@footnote{The analogous feature in
+Fortran is called an assigned goto, but that name seems inappropriate in
+C, where one can do more than simply store label addresses in label
+variables.}, @code{goto *@var{exp};}.  For example,
+
+@smallexample
+goto *ptr;
+@end smallexample
+
+@noindent
+Any expression of type @code{void *} is allowed.
+
+One way of using these constants is in initializing a static array that
+will serve as a jump table:
+
+@smallexample
+static void *array[] = @{ &&foo, &&bar, &&hack @};
+@end smallexample
+
+Then you can select a label with indexing, like this:
+
+@smallexample
+goto *array[i];
+@end smallexample
+
+@noindent
+Note that this does not check whether the subscript is in bounds---array
+indexing in C never does that.
+
+Such an array of label values serves a purpose much like that of the
+@code{switch} statement.  The @code{switch} statement is cleaner, so
+use that rather than an array unless the problem does not fit a
+@code{switch} statement very well.
+
+Another use of label values is in an interpreter for threaded code.
+The labels within the interpreter function can be stored in the
+threaded code for super-fast dispatching.
+
+You may not use this mechanism to jump to code in a different function.
+If you do that, totally unpredictable things will happen.  The best way to
+avoid this is to store the label address only in automatic variables and
+never pass it as an argument.
+
+An alternate way to write the above example is
+
+@smallexample
+static const int array[] = @{ &&foo - &&foo, &&bar - &&foo,
+                             &&hack - &&foo @};
+goto *(&&foo + array[i]);
+@end smallexample
+
+@noindent
+This is more friendly to code living in shared libraries, as it reduces
+the number of dynamic relocations that are needed, and by consequence,
+allows the data to be read-only.
+
+The @code{&&foo} expressions for the same label might have different
+values if the containing function is inlined or cloned.  If a program
+relies on them being always the same,
+@code{__attribute__((__noinline__,__noclone__))} should be used to
+prevent inlining and cloning.  If @code{&&foo} is used in a static
+variable initializer, inlining and cloning is forbidden.
+
+@node Nested Functions
+@section Nested Functions
+@cindex nested functions
+@cindex downward funargs
+@cindex thunks
+
+A @dfn{nested function} is a function defined inside another function.
+(Nested functions are not supported for GNU C++.)  The nested function's
+name is local to the block where it is defined.  For example, here we
+define a nested function named @code{square}, and call it twice:
+
+@smallexample
+@group
+foo (double a, double b)
+@{
+  double square (double z) @{ return z * z; @}
+
+  return square (a) + square (b);
+@}
+@end group
+@end smallexample
+
+The nested function can access all the variables of the containing
+function that are visible at the point of its definition.  This is
+called @dfn{lexical scoping}.  For example, here we show a nested
+function which uses an inherited variable named @code{offset}:
+
+@smallexample
+@group
+bar (int *array, int offset, int size)
+@{
+  int access (int *array, int index)
+    @{ return array[index + offset]; @}
+  int i;
+  /* @r{@dots{}} */
+  for (i = 0; i < size; i++)
+    /* @r{@dots{}} */ access (array, i) /* @r{@dots{}} */
+@}
+@end group
+@end smallexample
+
+Nested function definitions are permitted within functions in the places
+where variable definitions are allowed; that is, in any block, mixed
+with the other declarations and statements in the block.
+
+It is possible to call the nested function from outside the scope of its
+name by storing its address or passing the address to another function:
+
+@smallexample
+hack (int *array, int size)
+@{
+  void store (int index, int value)
+    @{ array[index] = value; @}
+
+  intermediate (store, size);
+@}
+@end smallexample
+
+Here, the function @code{intermediate} receives the address of
+@code{store} as an argument.  If @code{intermediate} calls @code{store},
+the arguments given to @code{store} are used to store into @code{array}.
+But this technique works only so long as the containing function
+(@code{hack}, in this example) does not exit.
+
+If you try to call the nested function through its address after the
+containing function has exited, all hell will break loose.  If you try
+to call it after a containing scope level has exited, and if it refers
+to some of the variables that are no longer in scope, you may be lucky,
+but it's not wise to take the risk.  If, however, the nested function
+does not refer to anything that has gone out of scope, you should be
+safe.
+
+GCC implements taking the address of a nested function using a technique
+called @dfn{trampolines}.  This technique was described in 
+@cite{Lexical Closures for C++} (Thomas M. Breuel, USENIX
+C++ Conference Proceedings, October 17-21, 1988).
+
+A nested function can jump to a label inherited from a containing
+function, provided the label was explicitly declared in the containing
+function (@pxref{Local Labels}).  Such a jump returns instantly to the
+containing function, exiting the nested function which did the
+@code{goto} and any intermediate functions as well.  Here is an example:
+
+@smallexample
+@group
+bar (int *array, int offset, int size)
+@{
+  __label__ failure;
+  int access (int *array, int index)
+    @{
+      if (index > size)
+        goto failure;
+      return array[index + offset];
+    @}
+  int i;
+  /* @r{@dots{}} */
+  for (i = 0; i < size; i++)
+    /* @r{@dots{}} */ access (array, i) /* @r{@dots{}} */
+  /* @r{@dots{}} */
+  return 0;
+
+ /* @r{Control comes here from @code{access}
+    if it detects an error.}  */
+ failure:
+  return -1;
+@}
+@end group
+@end smallexample
+
+A nested function always has no linkage.  Declaring one with
+@code{extern} or @code{static} is erroneous.  If you need to declare the nested function
+before its definition, use @code{auto} (which is otherwise meaningless
+for function declarations).
+
+@smallexample
+bar (int *array, int offset, int size)
+@{
+  __label__ failure;
+  auto int access (int *, int);
+  /* @r{@dots{}} */
+  int access (int *array, int index)
+    @{
+      if (index > size)
+        goto failure;
+      return array[index + offset];
+    @}
+  /* @r{@dots{}} */
+@}
+@end smallexample
+
+@node Constructing Calls
+@section Constructing Function Calls
+@cindex constructing calls
+@cindex forwarding calls
+
+Using the built-in functions described below, you can record
+the arguments a function received, and call another function
+with the same arguments, without knowing the number or types
+of the arguments.
+
+You can also record the return value of that function call,
+and later return that value, without knowing what data type
+the function tried to return (as long as your caller expects
+that data type).
+
+However, these built-in functions may interact badly with some
+sophisticated features or other extensions of the language.  It
+is, therefore, not recommended to use them outside very simple
+functions acting as mere forwarders for their arguments.
+
+@deftypefn {Built-in Function} {void *} __builtin_apply_args ()
+This built-in function returns a pointer to data
+describing how to perform a call with the same arguments as were passed
+to the current function.
+
+The function saves the arg pointer register, structure value address,
+and all registers that might be used to pass arguments to a function
+into a block of memory allocated on the stack.  Then it returns the
+address of that block.
+@end deftypefn
+
+@deftypefn {Built-in Function} {void *} __builtin_apply (void (*@var{function})(), void *@var{arguments}, size_t @var{size})
+This built-in function invokes @var{function}
+with a copy of the parameters described by @var{arguments}
+and @var{size}.
+
+The value of @var{arguments} should be the value returned by
+@code{__builtin_apply_args}.  The argument @var{size} specifies the size
+of the stack argument data, in bytes.
+
+This function returns a pointer to data describing
+how to return whatever value was returned by @var{function}.  The data
+is saved in a block of memory allocated on the stack.
+
+It is not always simple to compute the proper value for @var{size}.  The
+value is used by @code{__builtin_apply} to compute the amount of data
+that should be pushed on the stack and copied from the incoming argument
+area.
+@end deftypefn
+
+@deftypefn {Built-in Function} {void} __builtin_return (void *@var{result})
+This built-in function returns the value described by @var{result} from
+the containing function.  You should specify, for @var{result}, a value
+returned by @code{__builtin_apply}.
+@end deftypefn
+
+@deftypefn {Built-in Function} {} __builtin_va_arg_pack ()
+This built-in function represents all anonymous arguments of an inline
+function.  It can be used only in inline functions which will be always
+inlined, never compiled as a separate function, such as those using
+@code{__attribute__ ((__always_inline__))} or
+@code{__attribute__ ((__gnu_inline__))} extern inline functions.
+It must be only passed as last argument to some other function
+with variable arguments.  This is useful for writing small wrapper
+inlines for variable argument functions, when using preprocessor
+macros is undesirable.  For example:
+@smallexample
+extern int myprintf (FILE *f, const char *format, ...);
+extern inline __attribute__ ((__gnu_inline__)) int
+myprintf (FILE *f, const char *format, ...)
+@{
+  int r = fprintf (f, "myprintf: ");
+  if (r < 0)
+    return r;
+  int s = fprintf (f, format, __builtin_va_arg_pack ());
+  if (s < 0)
+    return s;
+  return r + s;
+@}
+@end smallexample
+@end deftypefn
+
+@deftypefn {Built-in Function} {size_t} __builtin_va_arg_pack_len ()
+This built-in function returns the number of anonymous arguments of
+an inline function.  It can be used only in inline functions which
+will be always inlined, never compiled as a separate function, such
+as those using @code{__attribute__ ((__always_inline__))} or
+@code{__attribute__ ((__gnu_inline__))} extern inline functions.
+For example following will do link or runtime checking of open
+arguments for optimized code:
+@smallexample
+#ifdef __OPTIMIZE__
+extern inline __attribute__((__gnu_inline__)) int
+myopen (const char *path, int oflag, ...)
+@{
+  if (__builtin_va_arg_pack_len () > 1)
+    warn_open_too_many_arguments ();
+
+  if (__builtin_constant_p (oflag))
+    @{
+      if ((oflag & O_CREAT) != 0 && __builtin_va_arg_pack_len () < 1)
+        @{
+          warn_open_missing_mode ();
+          return __open_2 (path, oflag);
+        @}
+      return open (path, oflag, __builtin_va_arg_pack ());
+    @}
+    
+  if (__builtin_va_arg_pack_len () < 1)
+    return __open_2 (path, oflag);
+
+  return open (path, oflag, __builtin_va_arg_pack ());
+@}
+#endif
+@end smallexample
+@end deftypefn
+
+@node Typeof
+@section Referring to a Type with @code{typeof}
+@findex typeof
+@findex sizeof
+@cindex macros, types of arguments
+
+Another way to refer to the type of an expression is with @code{typeof}.
+The syntax of using of this keyword looks like @code{sizeof}, but the
+construct acts semantically like a type name defined with @code{typedef}.
+
+There are two ways of writing the argument to @code{typeof}: with an
+expression or with a type.  Here is an example with an expression:
+
+@smallexample
+typeof (x[0](1))
+@end smallexample
+
+@noindent
+This assumes that @code{x} is an array of pointers to functions;
+the type described is that of the values of the functions.
+
+Here is an example with a typename as the argument:
+
+@smallexample
+typeof (int *)
+@end smallexample
+
+@noindent
+Here the type described is that of pointers to @code{int}.
+
+If you are writing a header file that must work when included in ISO C
+programs, write @code{__typeof__} instead of @code{typeof}.
+@xref{Alternate Keywords}.
+
+A @code{typeof}-construct can be used anywhere a typedef name could be
+used.  For example, you can use it in a declaration, in a cast, or inside
+of @code{sizeof} or @code{typeof}.
+
+The operand of @code{typeof} is evaluated for its side effects if and
+only if it is an expression of variably modified type or the name of
+such a type.
+
+@code{typeof} is often useful in conjunction with the
+statements-within-expressions feature.  Here is how the two together can
+be used to define a safe ``maximum'' macro that operates on any
+arithmetic type and evaluates each of its arguments exactly once:
+
+@smallexample
+#define max(a,b) \
+  (@{ typeof (a) _a = (a); \
+      typeof (b) _b = (b); \
+    _a > _b ? _a : _b; @})
+@end smallexample
+
+@cindex underscores in variables in macros
+@cindex @samp{_} in variables in macros
+@cindex local variables in macros
+@cindex variables, local, in macros
+@cindex macros, local variables in
+
+The reason for using names that start with underscores for the local
+variables is to avoid conflicts with variable names that occur within the
+expressions that are substituted for @code{a} and @code{b}.  Eventually we
+hope to design a new form of declaration syntax that allows you to declare
+variables whose scopes start only after their initializers; this will be a
+more reliable way to prevent such conflicts.
+
+@noindent
+Some more examples of the use of @code{typeof}:
+
+@itemize @bullet
+@item
+This declares @code{y} with the type of what @code{x} points to.
+
+@smallexample
+typeof (*x) y;
+@end smallexample
+
+@item
+This declares @code{y} as an array of such values.
+
+@smallexample
+typeof (*x) y[4];
+@end smallexample
+
+@item
+This declares @code{y} as an array of pointers to characters:
+
+@smallexample
+typeof (typeof (char *)[4]) y;
+@end smallexample
+
+@noindent
+It is equivalent to the following traditional C declaration:
+
+@smallexample
+char *y[4];
+@end smallexample
+
+To see the meaning of the declaration using @code{typeof}, and why it
+might be a useful way to write, rewrite it with these macros:
+
+@smallexample
+#define pointer(T)  typeof(T *)
+#define array(T, N) typeof(T [N])
+@end smallexample
+
+@noindent
+Now the declaration can be rewritten this way:
+
+@smallexample
+array (pointer (char), 4) y;
+@end smallexample
+
+@noindent
+Thus, @code{array (pointer (char), 4)} is the type of arrays of 4
+pointers to @code{char}.
+@end itemize
+
+@emph{Compatibility Note:} In addition to @code{typeof}, GCC 2 supported
+a more limited extension which permitted one to write
+
+@smallexample
+typedef @var{T} = @var{expr};
+@end smallexample
+
+@noindent
+with the effect of declaring @var{T} to have the type of the expression
+@var{expr}.  This extension does not work with GCC 3 (versions between
+3.0 and 3.2 will crash; 3.2.1 and later give an error).  Code which
+relies on it should be rewritten to use @code{typeof}:
+
+@smallexample
+typedef typeof(@var{expr}) @var{T};
+@end smallexample
+
+@noindent
+This will work with all versions of GCC@.
+
+@node Conditionals
+@section Conditionals with Omitted Operands
+@cindex conditional expressions, extensions
+@cindex omitted middle-operands
+@cindex middle-operands, omitted
+@cindex extensions, @code{?:}
+@cindex @code{?:} extensions
+
+The middle operand in a conditional expression may be omitted.  Then
+if the first operand is nonzero, its value is the value of the conditional
+expression.
+
+Therefore, the expression
+
+@smallexample
+x ? : y
+@end smallexample
+
+@noindent
+has the value of @code{x} if that is nonzero; otherwise, the value of
+@code{y}.
+
+This example is perfectly equivalent to
+
+@smallexample
+x ? x : y
+@end smallexample
+
+@cindex side effect in @code{?:}
+@cindex @code{?:} side effect
+@noindent
+In this simple case, the ability to omit the middle operand is not
+especially useful.  When it becomes useful is when the first operand does,
+or may (if it is a macro argument), contain a side effect.  Then repeating
+the operand in the middle would perform the side effect twice.  Omitting
+the middle operand uses the value already computed without the undesirable
+effects of recomputing it.
+
+@node __int128
+@section 128-bits integers
+@cindex @code{__int128} data types
+
+As an extension the integer scalar type @code{__int128} is supported for
+targets having an integer mode wide enough to hold 128-bit.
+Simply write @code{__int128} for a signed 128-bit integer, or
+@code{unsigned __int128} for an unsigned 128-bit integer.  There is no
+support in GCC to express an integer constant of type @code{__int128}
+for targets having @code{long long} integer with less then 128 bit width.
+
+@node Long Long
+@section Double-Word Integers
+@cindex @code{long long} data types
+@cindex double-word arithmetic
+@cindex multiprecision arithmetic
+@cindex @code{LL} integer suffix
+@cindex @code{ULL} integer suffix
+
+ISO C99 supports data types for integers that are at least 64 bits wide,
+and as an extension GCC supports them in C90 mode and in C++.
+Simply write @code{long long int} for a signed integer, or
+@code{unsigned long long int} for an unsigned integer.  To make an
+integer constant of type @code{long long int}, add the suffix @samp{LL}
+to the integer.  To make an integer constant of type @code{unsigned long
+long int}, add the suffix @samp{ULL} to the integer.
+
+You can use these types in arithmetic like any other integer types.
+Addition, subtraction, and bitwise boolean operations on these types
+are open-coded on all types of machines.  Multiplication is open-coded
+if the machine supports fullword-to-doubleword a widening multiply
+instruction.  Division and shifts are open-coded only on machines that
+provide special support.  The operations that are not open-coded use
+special library routines that come with GCC@.
+
+There may be pitfalls when you use @code{long long} types for function
+arguments, unless you declare function prototypes.  If a function
+expects type @code{int} for its argument, and you pass a value of type
+@code{long long int}, confusion will result because the caller and the
+subroutine will disagree about the number of bytes for the argument.
+Likewise, if the function expects @code{long long int} and you pass
+@code{int}.  The best way to avoid such problems is to use prototypes.
+
+@node Complex
+@section Complex Numbers
+@cindex complex numbers
+@cindex @code{_Complex} keyword
+@cindex @code{__complex__} keyword
+
+ISO C99 supports complex floating data types, and as an extension GCC
+supports them in C90 mode and in C++, and supports complex integer data
+types which are not part of ISO C99.  You can declare complex types
+using the keyword @code{_Complex}.  As an extension, the older GNU
+keyword @code{__complex__} is also supported.
+
+For example, @samp{_Complex double x;} declares @code{x} as a
+variable whose real part and imaginary part are both of type
+@code{double}.  @samp{_Complex short int y;} declares @code{y} to
+have real and imaginary parts of type @code{short int}; this is not
+likely to be useful, but it shows that the set of complex types is
+complete.
+
+To write a constant with a complex data type, use the suffix @samp{i} or
+@samp{j} (either one; they are equivalent).  For example, @code{2.5fi}
+has type @code{_Complex float} and @code{3i} has type
+@code{_Complex int}.  Such a constant always has a pure imaginary
+value, but you can form any complex value you like by adding one to a
+real constant.  This is a GNU extension; if you have an ISO C99
+conforming C library (such as GNU libc), and want to construct complex
+constants of floating type, you should include @code{<complex.h>} and
+use the macros @code{I} or @code{_Complex_I} instead.
+
+@cindex @code{__real__} keyword
+@cindex @code{__imag__} keyword
+To extract the real part of a complex-valued expression @var{exp}, write
+@code{__real__ @var{exp}}.  Likewise, use @code{__imag__} to
+extract the imaginary part.  This is a GNU extension; for values of
+floating type, you should use the ISO C99 functions @code{crealf},
+@code{creal}, @code{creall}, @code{cimagf}, @code{cimag} and
+@code{cimagl}, declared in @code{<complex.h>} and also provided as
+built-in functions by GCC@.
+
+@cindex complex conjugation
+The operator @samp{~} performs complex conjugation when used on a value
+with a complex type.  This is a GNU extension; for values of
+floating type, you should use the ISO C99 functions @code{conjf},
+@code{conj} and @code{conjl}, declared in @code{<complex.h>} and also
+provided as built-in functions by GCC@.
+
+GCC can allocate complex automatic variables in a noncontiguous
+fashion; it's even possible for the real part to be in a register while
+the imaginary part is on the stack (or vice-versa).  Only the DWARF2
+debug info format can represent this, so use of DWARF2 is recommended.
+If you are using the stabs debug info format, GCC describes a noncontiguous
+complex variable as if it were two separate variables of noncomplex type.
+If the variable's actual name is @code{foo}, the two fictitious
+variables are named @code{foo$real} and @code{foo$imag}.  You can
+examine and set these two fictitious variables with your debugger.
+
+@node Floating Types
+@section Additional Floating Types
+@cindex additional floating types
+@cindex @code{__float80} data type
+@cindex @code{__float128} data type
+@cindex @code{w} floating point suffix
+@cindex @code{q} floating point suffix
+@cindex @code{W} floating point suffix
+@cindex @code{Q} floating point suffix
+
+As an extension, the GNU C compiler supports additional floating
+types, @code{__float80} and @code{__float128} to support 80bit
+(@code{XFmode}) and 128 bit (@code{TFmode}) floating types.
+Support for additional types includes the arithmetic operators:
+add, subtract, multiply, divide; unary arithmetic operators;
+relational operators; equality operators; and conversions to and from
+integer and other floating types.  Use a suffix @samp{w} or @samp{W}
+in a literal constant of type @code{__float80} and @samp{q} or @samp{Q}
+for @code{_float128}.  You can declare complex types using the
+corresponding internal complex type, @code{XCmode} for @code{__float80}
+type and @code{TCmode} for @code{__float128} type:
+
+@smallexample
+typedef _Complex float __attribute__((mode(TC))) _Complex128;
+typedef _Complex float __attribute__((mode(XC))) _Complex80;
+@end smallexample
+
+Not all targets support additional floating point types.  @code{__float80}
+and @code{__float128} types are supported on i386, x86_64 and ia64 targets.
+The @code{__float128} type is supported on hppa HP-UX targets.
+
+@node Half-Precision
+@section Half-Precision Floating Point
+@cindex half-precision floating point
+@cindex @code{__fp16} data type
+
+On ARM targets, GCC supports half-precision (16-bit) floating point via
+the @code{__fp16} type.  You must enable this type explicitly 
+with the @option{-mfp16-format} command-line option in order to use it.
+
+ARM supports two incompatible representations for half-precision
+floating-point values.  You must choose one of the representations and
+use it consistently in your program.
+
+Specifying @option{-mfp16-format=ieee} selects the IEEE 754-2008 format.
+This format can represent normalized values in the range of @math{2^{-14}} to 65504.
+There are 11 bits of significand precision, approximately 3
+decimal digits.
+
+Specifying @option{-mfp16-format=alternative} selects the ARM
+alternative format.  This representation is similar to the IEEE
+format, but does not support infinities or NaNs.  Instead, the range
+of exponents is extended, so that this format can represent normalized
+values in the range of @math{2^{-14}} to 131008.
+
+The @code{__fp16} type is a storage format only.  For purposes
+of arithmetic and other operations, @code{__fp16} values in C or C++
+expressions are automatically promoted to @code{float}.  In addition,
+you cannot declare a function with a return value or parameters 
+of type @code{__fp16}.
+
+Note that conversions from @code{double} to @code{__fp16}
+involve an intermediate conversion to @code{float}.  Because
+of rounding, this can sometimes produce a different result than a
+direct conversion.
+
+ARM provides hardware support for conversions between 
+@code{__fp16} and @code{float} values
+as an extension to VFP and NEON (Advanced SIMD).  GCC generates
+code using these hardware instructions if you compile with
+options to select an FPU that provides them; 
+for example, @option{-mfpu=neon-fp16 -mfloat-abi=softfp},
+in addition to the @option{-mfp16-format} option to select
+a half-precision format.  
+
+Language-level support for the @code{__fp16} data type is
+independent of whether GCC generates code using hardware floating-point
+instructions.  In cases where hardware support is not specified, GCC
+implements conversions between @code{__fp16} and @code{float} values
+as library calls.
+
+@node Decimal Float
+@section Decimal Floating Types
+@cindex decimal floating types
+@cindex @code{_Decimal32} data type
+@cindex @code{_Decimal64} data type
+@cindex @code{_Decimal128} data type
+@cindex @code{df} integer suffix
+@cindex @code{dd} integer suffix
+@cindex @code{dl} integer suffix
+@cindex @code{DF} integer suffix
+@cindex @code{DD} integer suffix
+@cindex @code{DL} integer suffix
+
+As an extension, the GNU C compiler supports decimal floating types as
+defined in the N1312 draft of ISO/IEC WDTR24732.  Support for decimal
+floating types in GCC will evolve as the draft technical report changes.
+Calling conventions for any target might also change.  Not all targets
+support decimal floating types.
+
+The decimal floating types are @code{_Decimal32}, @code{_Decimal64}, and
+@code{_Decimal128}.  They use a radix of ten, unlike the floating types
+@code{float}, @code{double}, and @code{long double} whose radix is not
+specified by the C standard but is usually two.
+
+Support for decimal floating types includes the arithmetic operators
+add, subtract, multiply, divide; unary arithmetic operators;
+relational operators; equality operators; and conversions to and from
+integer and other floating types.  Use a suffix @samp{df} or
+@samp{DF} in a literal constant of type @code{_Decimal32}, @samp{dd}
+or @samp{DD} for @code{_Decimal64}, and @samp{dl} or @samp{DL} for
+@code{_Decimal128}.
+
+GCC support of decimal float as specified by the draft technical report
+is incomplete:
+
+@itemize @bullet
+@item
+When the value of a decimal floating type cannot be represented in the
+integer type to which it is being converted, the result is undefined
+rather than the result value specified by the draft technical report.
+
+@item
+GCC does not provide the C library functionality associated with
+@file{math.h}, @file{fenv.h}, @file{stdio.h}, @file{stdlib.h}, and
+@file{wchar.h}, which must come from a separate C library implementation.
+Because of this the GNU C compiler does not define macro
+@code{__STDC_DEC_FP__} to indicate that the implementation conforms to
+the technical report.
+@end itemize
+
+Types @code{_Decimal32}, @code{_Decimal64}, and @code{_Decimal128}
+are supported by the DWARF2 debug information format.
+
+@node Hex Floats
+@section Hex Floats
+@cindex hex floats
+
+ISO C99 supports floating-point numbers written not only in the usual
+decimal notation, such as @code{1.55e1}, but also numbers such as
+@code{0x1.fp3} written in hexadecimal format.  As a GNU extension, GCC
+supports this in C90 mode (except in some cases when strictly
+conforming) and in C++.  In that format the
+@samp{0x} hex introducer and the @samp{p} or @samp{P} exponent field are
+mandatory.  The exponent is a decimal number that indicates the power of
+2 by which the significant part will be multiplied.  Thus @samp{0x1.f} is
+@tex
+$1 {15\over16}$,
+@end tex
+@ifnottex
+1 15/16,
+@end ifnottex
+@samp{p3} multiplies it by 8, and the value of @code{0x1.fp3}
+is the same as @code{1.55e1}.
+
+Unlike for floating-point numbers in the decimal notation the exponent
+is always required in the hexadecimal notation.  Otherwise the compiler
+would not be able to resolve the ambiguity of, e.g., @code{0x1.f}.  This
+could mean @code{1.0f} or @code{1.9375} since @samp{f} is also the
+extension for floating-point constants of type @code{float}.
+
+@node Fixed-Point
+@section Fixed-Point Types
+@cindex fixed-point types
+@cindex @code{_Fract} data type
+@cindex @code{_Accum} data type
+@cindex @code{_Sat} data type
+@cindex @code{hr} fixed-suffix
+@cindex @code{r} fixed-suffix
+@cindex @code{lr} fixed-suffix
+@cindex @code{llr} fixed-suffix
+@cindex @code{uhr} fixed-suffix
+@cindex @code{ur} fixed-suffix
+@cindex @code{ulr} fixed-suffix
+@cindex @code{ullr} fixed-suffix
+@cindex @code{hk} fixed-suffix
+@cindex @code{k} fixed-suffix
+@cindex @code{lk} fixed-suffix
+@cindex @code{llk} fixed-suffix
+@cindex @code{uhk} fixed-suffix
+@cindex @code{uk} fixed-suffix
+@cindex @code{ulk} fixed-suffix
+@cindex @code{ullk} fixed-suffix
+@cindex @code{HR} fixed-suffix
+@cindex @code{R} fixed-suffix
+@cindex @code{LR} fixed-suffix
+@cindex @code{LLR} fixed-suffix
+@cindex @code{UHR} fixed-suffix
+@cindex @code{UR} fixed-suffix
+@cindex @code{ULR} fixed-suffix
+@cindex @code{ULLR} fixed-suffix
+@cindex @code{HK} fixed-suffix
+@cindex @code{K} fixed-suffix
+@cindex @code{LK} fixed-suffix
+@cindex @code{LLK} fixed-suffix
+@cindex @code{UHK} fixed-suffix
+@cindex @code{UK} fixed-suffix
+@cindex @code{ULK} fixed-suffix
+@cindex @code{ULLK} fixed-suffix
+
+As an extension, the GNU C compiler supports fixed-point types as
+defined in the N1169 draft of ISO/IEC DTR 18037.  Support for fixed-point
+types in GCC will evolve as the draft technical report changes.
+Calling conventions for any target might also change.  Not all targets
+support fixed-point types.
+
+The fixed-point types are
+@code{short _Fract},
+@code{_Fract},
+@code{long _Fract},
+@code{long long _Fract},
+@code{unsigned short _Fract},
+@code{unsigned _Fract},
+@code{unsigned long _Fract},
+@code{unsigned long long _Fract},
+@code{_Sat short _Fract},
+@code{_Sat _Fract},
+@code{_Sat long _Fract},
+@code{_Sat long long _Fract},
+@code{_Sat unsigned short _Fract},
+@code{_Sat unsigned _Fract},
+@code{_Sat unsigned long _Fract},
+@code{_Sat unsigned long long _Fract},
+@code{short _Accum},
+@code{_Accum},
+@code{long _Accum},
+@code{long long _Accum},
+@code{unsigned short _Accum},
+@code{unsigned _Accum},
+@code{unsigned long _Accum},
+@code{unsigned long long _Accum},
+@code{_Sat short _Accum},
+@code{_Sat _Accum},
+@code{_Sat long _Accum},
+@code{_Sat long long _Accum},
+@code{_Sat unsigned short _Accum},
+@code{_Sat unsigned _Accum},
+@code{_Sat unsigned long _Accum},
+@code{_Sat unsigned long long _Accum}.
+
+Fixed-point data values contain fractional and optional integral parts.
+The format of fixed-point data varies and depends on the target machine.
+
+Support for fixed-point types includes:
+@itemize @bullet
+@item
+prefix and postfix increment and decrement operators (@code{++}, @code{--})
+@item
+unary arithmetic operators (@code{+}, @code{-}, @code{!})
+@item
+binary arithmetic operators (@code{+}, @code{-}, @code{*}, @code{/})
+@item
+binary shift operators (@code{<<}, @code{>>})
+@item
+relational operators (@code{<}, @code{<=}, @code{>=}, @code{>})
+@item
+equality operators (@code{==}, @code{!=})
+@item
+assignment operators (@code{+=}, @code{-=}, @code{*=}, @code{/=},
+@code{<<=}, @code{>>=})
+@item
+conversions to and from integer, floating-point, or fixed-point types
+@end itemize
+
+Use a suffix in a fixed-point literal constant:
+@itemize
+@item @samp{hr} or @samp{HR} for @code{short _Fract} and
+@code{_Sat short _Fract}
+@item @samp{r} or @samp{R} for @code{_Fract} and @code{_Sat _Fract}
+@item @samp{lr} or @samp{LR} for @code{long _Fract} and
+@code{_Sat long _Fract}
+@item @samp{llr} or @samp{LLR} for @code{long long _Fract} and
+@code{_Sat long long _Fract}
+@item @samp{uhr} or @samp{UHR} for @code{unsigned short _Fract} and
+@code{_Sat unsigned short _Fract}
+@item @samp{ur} or @samp{UR} for @code{unsigned _Fract} and
+@code{_Sat unsigned _Fract}
+@item @samp{ulr} or @samp{ULR} for @code{unsigned long _Fract} and
+@code{_Sat unsigned long _Fract}
+@item @samp{ullr} or @samp{ULLR} for @code{unsigned long long _Fract}
+and @code{_Sat unsigned long long _Fract}
+@item @samp{hk} or @samp{HK} for @code{short _Accum} and
+@code{_Sat short _Accum}
+@item @samp{k} or @samp{K} for @code{_Accum} and @code{_Sat _Accum}
+@item @samp{lk} or @samp{LK} for @code{long _Accum} and
+@code{_Sat long _Accum}
+@item @samp{llk} or @samp{LLK} for @code{long long _Accum} and
+@code{_Sat long long _Accum}
+@item @samp{uhk} or @samp{UHK} for @code{unsigned short _Accum} and
+@code{_Sat unsigned short _Accum}
+@item @samp{uk} or @samp{UK} for @code{unsigned _Accum} and
+@code{_Sat unsigned _Accum}
+@item @samp{ulk} or @samp{ULK} for @code{unsigned long _Accum} and
+@code{_Sat unsigned long _Accum}
+@item @samp{ullk} or @samp{ULLK} for @code{unsigned long long _Accum}
+and @code{_Sat unsigned long long _Accum}
+@end itemize
+
+GCC support of fixed-point types as specified by the draft technical report
+is incomplete:
+
+@itemize @bullet
+@item
+Pragmas to control overflow and rounding behaviors are not implemented.
+@end itemize
+
+Fixed-point types are supported by the DWARF2 debug information format.
+
+@node Named Address Spaces
+@section Named address spaces
+@cindex named address spaces
+
+As an extension, the GNU C compiler supports named address spaces as
+defined in the N1275 draft of ISO/IEC DTR 18037.  Support for named
+address spaces in GCC will evolve as the draft technical report changes.
+Calling conventions for any target might also change.  At present, only
+the SPU and M32C targets support other address spaces.  On the SPU target, for
+example, variables may be declared as belonging to another address space
+by qualifying the type with the @code{__ea} address space identifier:
+
+@smallexample
+extern int __ea i;
+@end smallexample
+
+When the variable @code{i} is accessed, the compiler will generate
+special code to access this variable.  It may use runtime library
+support, or generate special machine instructions to access that address
+space.
+
+The @code{__ea} identifier may be used exactly like any other C type
+qualifier (e.g., @code{const} or @code{volatile}).  See the N1275
+document for more details.
+
+On the M32C target, with the R8C and M16C cpu variants, variables
+qualified with @code{__far} are accessed using 32-bit addresses in
+order to access memory beyond the first 64k bytes.  If @code{__far} is
+used with the M32CM or M32C cpu variants, it has no effect.
+
+@node Zero Length
+@section Arrays of Length Zero
+@cindex arrays of length zero
+@cindex zero-length arrays
+@cindex length-zero arrays
+@cindex flexible array members
+
+Zero-length arrays are allowed in GNU C@.  They are very useful as the
+last element of a structure which is really a header for a variable-length
+object:
+
+@smallexample
+struct line @{
+  int length;
+  char contents[0];
+@};
+
+struct line *thisline = (struct line *)
+  malloc (sizeof (struct line) + this_length);
+thisline->length = this_length;
+@end smallexample
+
+In ISO C90, you would have to give @code{contents} a length of 1, which
+means either you waste space or complicate the argument to @code{malloc}.
+
+In ISO C99, you would use a @dfn{flexible array member}, which is
+slightly different in syntax and semantics:
+
+@itemize @bullet
+@item
+Flexible array members are written as @code{contents[]} without
+the @code{0}.
+
+@item
+Flexible array members have incomplete type, and so the @code{sizeof}
+operator may not be applied.  As a quirk of the original implementation
+of zero-length arrays, @code{sizeof} evaluates to zero.
+
+@item
+Flexible array members may only appear as the last member of a
+@code{struct} that is otherwise non-empty.
+
+@item
+A structure containing a flexible array member, or a union containing
+such a structure (possibly recursively), may not be a member of a
+structure or an element of an array.  (However, these uses are
+permitted by GCC as extensions.)
+@end itemize
+
+GCC versions before 3.0 allowed zero-length arrays to be statically
+initialized, as if they were flexible arrays.  In addition to those
+cases that were useful, it also allowed initializations in situations
+that would corrupt later data.  Non-empty initialization of zero-length
+arrays is now treated like any case where there are more initializer
+elements than the array holds, in that a suitable warning about "excess
+elements in array" is given, and the excess elements (all of them, in
+this case) are ignored.
+
+Instead GCC allows static initialization of flexible array members.
+This is equivalent to defining a new structure containing the original
+structure followed by an array of sufficient size to contain the data.
+I.e.@: in the following, @code{f1} is constructed as if it were declared
+like @code{f2}.
+
+@smallexample
+struct f1 @{
+  int x; int y[];
+@} f1 = @{ 1, @{ 2, 3, 4 @} @};
+
+struct f2 @{
+  struct f1 f1; int data[3];
+@} f2 = @{ @{ 1 @}, @{ 2, 3, 4 @} @};
+@end smallexample
+
+@noindent
+The convenience of this extension is that @code{f1} has the desired
+type, eliminating the need to consistently refer to @code{f2.f1}.
+
+This has symmetry with normal static arrays, in that an array of
+unknown size is also written with @code{[]}.
+
+Of course, this extension only makes sense if the extra data comes at
+the end of a top-level object, as otherwise we would be overwriting
+data at subsequent offsets.  To avoid undue complication and confusion
+with initialization of deeply nested arrays, we simply disallow any
+non-empty initialization except when the structure is the top-level
+object.  For example:
+
+@smallexample
+struct foo @{ int x; int y[]; @};
+struct bar @{ struct foo z; @};
+
+struct foo a = @{ 1, @{ 2, 3, 4 @} @};        // @r{Valid.}
+struct bar b = @{ @{ 1, @{ 2, 3, 4 @} @} @};    // @r{Invalid.}
+struct bar c = @{ @{ 1, @{ @} @} @};            // @r{Valid.}
+struct foo d[1] = @{ @{ 1 @{ 2, 3, 4 @} @} @};  // @r{Invalid.}
+@end smallexample
+
+@node Empty Structures
+@section Structures With No Members
+@cindex empty structures
+@cindex zero-size structures
+
+GCC permits a C structure to have no members:
+
+@smallexample
+struct empty @{
+@};
+@end smallexample
+
+The structure will have size zero.  In C++, empty structures are part
+of the language.  G++ treats empty structures as if they had a single
+member of type @code{char}.
+
+@node Variable Length
+@section Arrays of Variable Length
+@cindex variable-length arrays
+@cindex arrays of variable length
+@cindex VLAs
+
+Variable-length automatic arrays are allowed in ISO C99, and as an
+extension GCC accepts them in C90 mode and in C++.  These arrays are
+declared like any other automatic arrays, but with a length that is not
+a constant expression.  The storage is allocated at the point of
+declaration and deallocated when the brace-level is exited.  For
+example:
+
+@smallexample
+FILE *
+concat_fopen (char *s1, char *s2, char *mode)
+@{
+  char str[strlen (s1) + strlen (s2) + 1];
+  strcpy (str, s1);
+  strcat (str, s2);
+  return fopen (str, mode);
+@}
+@end smallexample
+
+@cindex scope of a variable length array
+@cindex variable-length array scope
+@cindex deallocating variable length arrays
+Jumping or breaking out of the scope of the array name deallocates the
+storage.  Jumping into the scope is not allowed; you get an error
+message for it.
+
+@cindex @code{alloca} vs variable-length arrays
+You can use the function @code{alloca} to get an effect much like
+variable-length arrays.  The function @code{alloca} is available in
+many other C implementations (but not in all).  On the other hand,
+variable-length arrays are more elegant.
+
+There are other differences between these two methods.  Space allocated
+with @code{alloca} exists until the containing @emph{function} returns.
+The space for a variable-length array is deallocated as soon as the array
+name's scope ends.  (If you use both variable-length arrays and
+@code{alloca} in the same function, deallocation of a variable-length array
+will also deallocate anything more recently allocated with @code{alloca}.)
+
+You can also use variable-length arrays as arguments to functions:
+
+@smallexample
+struct entry
+tester (int len, char data[len][len])
+@{
+  /* @r{@dots{}} */
+@}
+@end smallexample
+
+The length of an array is computed once when the storage is allocated
+and is remembered for the scope of the array in case you access it with
+@code{sizeof}.
+
+If you want to pass the array first and the length afterward, you can
+use a forward declaration in the parameter list---another GNU extension.
+
+@smallexample
+struct entry
+tester (int len; char data[len][len], int len)
+@{
+  /* @r{@dots{}} */
+@}
+@end smallexample
+
+@cindex parameter forward declaration
+The @samp{int len} before the semicolon is a @dfn{parameter forward
+declaration}, and it serves the purpose of making the name @code{len}
+known when the declaration of @code{data} is parsed.
+
+You can write any number of such parameter forward declarations in the
+parameter list.  They can be separated by commas or semicolons, but the
+last one must end with a semicolon, which is followed by the ``real''
+parameter declarations.  Each forward declaration must match a ``real''
+declaration in parameter name and data type.  ISO C99 does not support
+parameter forward declarations.
+
+@node Variadic Macros
+@section Macros with a Variable Number of Arguments.
+@cindex variable number of arguments
+@cindex macro with variable arguments
+@cindex rest argument (in macro)
+@cindex variadic macros
+
+In the ISO C standard of 1999, a macro can be declared to accept a
+variable number of arguments much as a function can.  The syntax for
+defining the macro is similar to that of a function.  Here is an
+example:
+
+@smallexample
+#define debug(format, ...) fprintf (stderr, format, __VA_ARGS__)
+@end smallexample
+
+Here @samp{@dots{}} is a @dfn{variable argument}.  In the invocation of
+such a macro, it represents the zero or more tokens until the closing
+parenthesis that ends the invocation, including any commas.  This set of
+tokens replaces the identifier @code{__VA_ARGS__} in the macro body
+wherever it appears.  See the CPP manual for more information.
+
+GCC has long supported variadic macros, and used a different syntax that
+allowed you to give a name to the variable arguments just like any other
+argument.  Here is an example:
+
+@smallexample
+#define debug(format, args...) fprintf (stderr, format, args)
+@end smallexample
+
+This is in all ways equivalent to the ISO C example above, but arguably
+more readable and descriptive.
+
+GNU CPP has two further variadic macro extensions, and permits them to
+be used with either of the above forms of macro definition.
+
+In standard C, you are not allowed to leave the variable argument out
+entirely; but you are allowed to pass an empty argument.  For example,
+this invocation is invalid in ISO C, because there is no comma after
+the string:
+
+@smallexample
+debug ("A message")
+@end smallexample
+
+GNU CPP permits you to completely omit the variable arguments in this
+way.  In the above examples, the compiler would complain, though since
+the expansion of the macro still has the extra comma after the format
+string.
+
+To help solve this problem, CPP behaves specially for variable arguments
+used with the token paste operator, @samp{##}.  If instead you write
+
+@smallexample
+#define debug(format, ...) fprintf (stderr, format, ## __VA_ARGS__)
+@end smallexample
+
+and if the variable arguments are omitted or empty, the @samp{##}
+operator causes the preprocessor to remove the comma before it.  If you
+do provide some variable arguments in your macro invocation, GNU CPP
+does not complain about the paste operation and instead places the
+variable arguments after the comma.  Just like any other pasted macro
+argument, these arguments are not macro expanded.
+
+@node Escaped Newlines
+@section Slightly Looser Rules for Escaped Newlines
+@cindex escaped newlines
+@cindex newlines (escaped)
+
+Recently, the preprocessor has relaxed its treatment of escaped
+newlines.  Previously, the newline had to immediately follow a
+backslash.  The current implementation allows whitespace in the form
+of spaces, horizontal and vertical tabs, and form feeds between the
+backslash and the subsequent newline.  The preprocessor issues a
+warning, but treats it as a valid escaped newline and combines the two
+lines to form a single logical line.  This works within comments and
+tokens, as well as between tokens.  Comments are @emph{not} treated as
+whitespace for the purposes of this relaxation, since they have not
+yet been replaced with spaces.
+
+@node Subscripting
+@section Non-Lvalue Arrays May Have Subscripts
+@cindex subscripting
+@cindex arrays, non-lvalue
+
+@cindex subscripting and function values
+In ISO C99, arrays that are not lvalues still decay to pointers, and
+may be subscripted, although they may not be modified or used after
+the next sequence point and the unary @samp{&} operator may not be
+applied to them.  As an extension, GCC allows such arrays to be
+subscripted in C90 mode, though otherwise they do not decay to
+pointers outside C99 mode.  For example,
+this is valid in GNU C though not valid in C90:
+
+@smallexample
+@group
+struct foo @{int a[4];@};
+
+struct foo f();
+
+bar (int index)
+@{
+  return f().a[index];
+@}
+@end group
+@end smallexample
+
+@node Pointer Arith
+@section Arithmetic on @code{void}- and Function-Pointers
+@cindex void pointers, arithmetic
+@cindex void, size of pointer to
+@cindex function pointers, arithmetic
+@cindex function, size of pointer to
+
+In GNU C, addition and subtraction operations are supported on pointers to
+@code{void} and on pointers to functions.  This is done by treating the
+size of a @code{void} or of a function as 1.
+
+A consequence of this is that @code{sizeof} is also allowed on @code{void}
+and on function types, and returns 1.
+
+@opindex Wpointer-arith
+The option @option{-Wpointer-arith} requests a warning if these extensions
+are used.
+
+@node Initializers
+@section Non-Constant Initializers
+@cindex initializers, non-constant
+@cindex non-constant initializers
+
+As in standard C++ and ISO C99, the elements of an aggregate initializer for an
+automatic variable are not required to be constant expressions in GNU C@.
+Here is an example of an initializer with run-time varying elements:
+
+@smallexample
+foo (float f, float g)
+@{
+  float beat_freqs[2] = @{ f-g, f+g @};
+  /* @r{@dots{}} */
+@}
+@end smallexample
+
+@node Compound Literals
+@section Compound Literals
+@cindex constructor expressions
+@cindex initializations in expressions
+@cindex structures, constructor expression
+@cindex expressions, constructor
+@cindex compound literals
+@c The GNU C name for what C99 calls compound literals was "constructor expressions".
+
+ISO C99 supports compound literals.  A compound literal looks like
+a cast containing an initializer.  Its value is an object of the
+type specified in the cast, containing the elements specified in
+the initializer; it is an lvalue.  As an extension, GCC supports
+compound literals in C90 mode and in C++.
+
+Usually, the specified type is a structure.  Assume that
+@code{struct foo} and @code{structure} are declared as shown:
+
+@smallexample
+struct foo @{int a; char b[2];@} structure;
+@end smallexample
+
+@noindent
+Here is an example of constructing a @code{struct foo} with a compound literal:
+
+@smallexample
+structure = ((struct foo) @{x + y, 'a', 0@});
+@end smallexample
+
+@noindent
+This is equivalent to writing the following:
+
+@smallexample
+@{
+  struct foo temp = @{x + y, 'a', 0@};
+  structure = temp;
+@}
+@end smallexample
+
+You can also construct an array.  If all the elements of the compound literal
+are (made up of) simple constant expressions, suitable for use in
+initializers of objects of static storage duration, then the compound
+literal can be coerced to a pointer to its first element and used in
+such an initializer, as shown here:
+
+@smallexample
+char **foo = (char *[]) @{ "x", "y", "z" @};
+@end smallexample
+
+Compound literals for scalar types and union types are is
+also allowed, but then the compound literal is equivalent
+to a cast.
+
+As a GNU extension, GCC allows initialization of objects with static storage
+duration by compound literals (which is not possible in ISO C99, because
+the initializer is not a constant).
+It is handled as if the object was initialized only with the bracket
+enclosed list if the types of the compound literal and the object match.
+The initializer list of the compound literal must be constant.
+If the object being initialized has array type of unknown size, the size is
+determined by compound literal size.
+
+@smallexample
+static struct foo x = (struct foo) @{1, 'a', 'b'@};
+static int y[] = (int []) @{1, 2, 3@};
+static int z[] = (int [3]) @{1@};
+@end smallexample
+
+@noindent
+The above lines are equivalent to the following:
+@smallexample
+static struct foo x = @{1, 'a', 'b'@};
+static int y[] = @{1, 2, 3@};
+static int z[] = @{1, 0, 0@};
+@end smallexample
+
+@node Designated Inits
+@section Designated Initializers
+@cindex initializers with labeled elements
+@cindex labeled elements in initializers
+@cindex case labels in initializers
+@cindex designated initializers
+
+Standard C90 requires the elements of an initializer to appear in a fixed
+order, the same as the order of the elements in the array or structure
+being initialized.
+
+In ISO C99 you can give the elements in any order, specifying the array
+indices or structure field names they apply to, and GNU C allows this as
+an extension in C90 mode as well.  This extension is not
+implemented in GNU C++.
+
+To specify an array index, write
+@samp{[@var{index}] =} before the element value.  For example,
+
+@smallexample
+int a[6] = @{ [4] = 29, [2] = 15 @};
+@end smallexample
+
+@noindent
+is equivalent to
+
+@smallexample
+int a[6] = @{ 0, 0, 15, 0, 29, 0 @};
+@end smallexample
+
+@noindent
+The index values must be constant expressions, even if the array being
+initialized is automatic.
+
+An alternative syntax for this which has been obsolete since GCC 2.5 but
+GCC still accepts is to write @samp{[@var{index}]} before the element
+value, with no @samp{=}.
+
+To initialize a range of elements to the same value, write
+@samp{[@var{first} ... @var{last}] = @var{value}}.  This is a GNU
+extension.  For example,
+
+@smallexample
+int widths[] = @{ [0 ... 9] = 1, [10 ... 99] = 2, [100] = 3 @};
+@end smallexample
+
+@noindent
+If the value in it has side-effects, the side-effects will happen only once,
+not for each initialized field by the range initializer.
+
+@noindent
+Note that the length of the array is the highest value specified
+plus one.
+
+In a structure initializer, specify the name of a field to initialize
+with @samp{.@var{fieldname} =} before the element value.  For example,
+given the following structure,
+
+@smallexample
+struct point @{ int x, y; @};
+@end smallexample
+
+@noindent
+the following initialization
+
+@smallexample
+struct point p = @{ .y = yvalue, .x = xvalue @};
+@end smallexample
+
+@noindent
+is equivalent to
+
+@smallexample
+struct point p = @{ xvalue, yvalue @};
+@end smallexample
+
+Another syntax which has the same meaning, obsolete since GCC 2.5, is
+@samp{@var{fieldname}:}, as shown here:
+
+@smallexample
+struct point p = @{ y: yvalue, x: xvalue @};
+@end smallexample
+
+@cindex designators
+The @samp{[@var{index}]} or @samp{.@var{fieldname}} is known as a
+@dfn{designator}.  You can also use a designator (or the obsolete colon
+syntax) when initializing a union, to specify which element of the union
+should be used.  For example,
+
+@smallexample
+union foo @{ int i; double d; @};
+
+union foo f = @{ .d = 4 @};
+@end smallexample
+
+@noindent
+will convert 4 to a @code{double} to store it in the union using
+the second element.  By contrast, casting 4 to type @code{union foo}
+would store it into the union as the integer @code{i}, since it is
+an integer.  (@xref{Cast to Union}.)
+
+You can combine this technique of naming elements with ordinary C
+initialization of successive elements.  Each initializer element that
+does not have a designator applies to the next consecutive element of the
+array or structure.  For example,
+
+@smallexample
+int a[6] = @{ [1] = v1, v2, [4] = v4 @};
+@end smallexample
+
+@noindent
+is equivalent to
+
+@smallexample
+int a[6] = @{ 0, v1, v2, 0, v4, 0 @};
+@end smallexample
+
+Labeling the elements of an array initializer is especially useful
+when the indices are characters or belong to an @code{enum} type.
+For example:
+
+@smallexample
+int whitespace[256]
+  = @{ [' '] = 1, ['\t'] = 1, ['\h'] = 1,
+      ['\f'] = 1, ['\n'] = 1, ['\r'] = 1 @};
+@end smallexample
+
+@cindex designator lists
+You can also write a series of @samp{.@var{fieldname}} and
+@samp{[@var{index}]} designators before an @samp{=} to specify a
+nested subobject to initialize; the list is taken relative to the
+subobject corresponding to the closest surrounding brace pair.  For
+example, with the @samp{struct point} declaration above:
+
+@smallexample
+struct point ptarray[10] = @{ [2].y = yv2, [2].x = xv2, [0].x = xv0 @};
+@end smallexample
+
+@noindent
+If the same field is initialized multiple times, it will have value from
+the last initialization.  If any such overridden initialization has
+side-effect, it is unspecified whether the side-effect happens or not.
+Currently, GCC will discard them and issue a warning.
+
+@node Case Ranges
+@section Case Ranges
+@cindex case ranges
+@cindex ranges in case statements
+
+You can specify a range of consecutive values in a single @code{case} label,
+like this:
+
+@smallexample
+case @var{low} ... @var{high}:
+@end smallexample
+
+@noindent
+This has the same effect as the proper number of individual @code{case}
+labels, one for each integer value from @var{low} to @var{high}, inclusive.
+
+This feature is especially useful for ranges of ASCII character codes:
+
+@smallexample
+case 'A' ... 'Z':
+@end smallexample
+
+@strong{Be careful:} Write spaces around the @code{...}, for otherwise
+it may be parsed wrong when you use it with integer values.  For example,
+write this:
+
+@smallexample
+case 1 ... 5:
+@end smallexample
+
+@noindent
+rather than this:
+
+@smallexample
+case 1...5:
+@end smallexample
+
+@node Cast to Union
+@section Cast to a Union Type
+@cindex cast to a union
+@cindex union, casting to a
+
+A cast to union type is similar to other casts, except that the type
+specified is a union type.  You can specify the type either with
+@code{union @var{tag}} or with a typedef name.  A cast to union is actually
+a constructor though, not a cast, and hence does not yield an lvalue like
+normal casts.  (@xref{Compound Literals}.)
+
+The types that may be cast to the union type are those of the members
+of the union.  Thus, given the following union and variables:
+
+@smallexample
+union foo @{ int i; double d; @};
+int x;
+double y;
+@end smallexample
+
+@noindent
+both @code{x} and @code{y} can be cast to type @code{union foo}.
+
+Using the cast as the right-hand side of an assignment to a variable of
+union type is equivalent to storing in a member of the union:
+
+@smallexample
+union foo u;
+/* @r{@dots{}} */
+u = (union foo) x  @equiv{}  u.i = x
+u = (union foo) y  @equiv{}  u.d = y
+@end smallexample
+
+You can also use the union cast as a function argument:
+
+@smallexample
+void hack (union foo);
+/* @r{@dots{}} */
+hack ((union foo) x);
+@end smallexample
+
+@node Mixed Declarations
+@section Mixed Declarations and Code
+@cindex mixed declarations and code
+@cindex declarations, mixed with code
+@cindex code, mixed with declarations
+
+ISO C99 and ISO C++ allow declarations and code to be freely mixed
+within compound statements.  As an extension, GCC also allows this in
+C90 mode.  For example, you could do:
+
+@smallexample
+int i;
+/* @r{@dots{}} */
+i++;
+int j = i + 2;
+@end smallexample
+
+Each identifier is visible from where it is declared until the end of
+the enclosing block.
+
+@node Function Attributes
+@section Declaring Attributes of Functions
+@cindex function attributes
+@cindex declaring attributes of functions
+@cindex functions that never return
+@cindex functions that return more than once
+@cindex functions that have no side effects
+@cindex functions in arbitrary sections
+@cindex functions that behave like malloc
+@cindex @code{volatile} applied to function
+@cindex @code{const} applied to function
+@cindex functions with @code{printf}, @code{scanf}, @code{strftime} or @code{strfmon} style arguments
+@cindex functions with non-null pointer arguments
+@cindex functions that are passed arguments in registers on the 386
+@cindex functions that pop the argument stack on the 386
+@cindex functions that do not pop the argument stack on the 386
+@cindex functions that have different compilation options on the 386
+@cindex functions that have different optimization options
+@cindex functions that are dynamically resolved
+
+In GNU C, you declare certain things about functions called in your program
+which help the compiler optimize function calls and check your code more
+carefully.
+
+The keyword @code{__attribute__} allows you to specify special
+attributes when making a declaration.  This keyword is followed by an
+attribute specification inside double parentheses.  The following
+attributes are currently defined for functions on all targets:
+@code{aligned}, @code{alloc_size}, @code{noreturn},
+@code{returns_twice}, @code{noinline}, @code{noclone},
+@code{always_inline}, @code{flatten}, @code{pure}, @code{const},
+@code{nothrow}, @code{sentinel}, @code{format}, @code{format_arg},
+@code{no_instrument_function}, @code{no_split_stack},
+@code{section}, @code{constructor},
+@code{destructor}, @code{used}, @code{unused}, @code{deprecated},
+@code{weak}, @code{malloc}, @code{alias}, @code{ifunc},
+@code{warn_unused_result}, @code{nonnull}, @code{gnu_inline},
+@code{externally_visible}, @code{hot}, @code{cold}, @code{artificial},
+@code{error} and @code{warning}.  Several other attributes are defined
+for functions on particular target systems.  Other attributes,
+including @code{section} are supported for variables declarations
+(@pxref{Variable Attributes}) and for types (@pxref{Type Attributes}).
+
+GCC plugins may provide their own attributes.
+
+You may also specify attributes with @samp{__} preceding and following
+each keyword.  This allows you to use them in header files without
+being concerned about a possible macro of the same name.  For example,
+you may use @code{__noreturn__} instead of @code{noreturn}.
+
+@xref{Attribute Syntax}, for details of the exact syntax for using
+attributes.
+
+@table @code
+@c Keep this table alphabetized by attribute name.  Treat _ as space.
+
+@item alias ("@var{target}")
+@cindex @code{alias} attribute
+The @code{alias} attribute causes the declaration to be emitted as an
+alias for another symbol, which must be specified.  For instance,
+
+@smallexample
+void __f () @{ /* @r{Do something.} */; @}
+void f () __attribute__ ((weak, alias ("__f")));
+@end smallexample
+
+defines @samp{f} to be a weak alias for @samp{__f}.  In C++, the
+mangled name for the target must be used.  It is an error if @samp{__f}
+is not defined in the same translation unit.
+
+Not all target machines support this attribute.
+
+@item aligned (@var{alignment})
+@cindex @code{aligned} attribute
+This attribute specifies a minimum alignment for the function,
+measured in bytes.
+
+You cannot use this attribute to decrease the alignment of a function,
+only to increase it.  However, when you explicitly specify a function
+alignment this will override the effect of the
+@option{-falign-functions} (@pxref{Optimize Options}) option for this
+function.
+
+Note that the effectiveness of @code{aligned} attributes may be
+limited by inherent limitations in your linker.  On many systems, the
+linker is only able to arrange for functions to be aligned up to a
+certain maximum alignment.  (For some linkers, the maximum supported
+alignment may be very very small.)  See your linker documentation for
+further information.
+
+The @code{aligned} attribute can also be used for variables and fields
+(@pxref{Variable Attributes}.)
+
+@item alloc_size
+@cindex @code{alloc_size} attribute
+The @code{alloc_size} attribute is used to tell the compiler that the
+function return value points to memory, where the size is given by
+one or two of the functions parameters.  GCC uses this 
+information to improve the correctness of @code{__builtin_object_size}.
+
+The function parameter(s) denoting the allocated size are specified by
+one or two integer arguments supplied to the attribute.  The allocated size
+is either the value of the single function argument specified or the product
+of the two function arguments specified.  Argument numbering starts at
+one.
+
+For instance, 
+
+@smallexample
+void* my_calloc(size_t, size_t) __attribute__((alloc_size(1,2)))
+void my_realloc(void*, size_t) __attribute__((alloc_size(2)))
+@end smallexample
+
+declares that my_calloc will return memory of the size given by
+the product of parameter 1 and 2 and that my_realloc will return memory
+of the size given by parameter 2.
+
+@item always_inline
+@cindex @code{always_inline} function attribute
+Generally, functions are not inlined unless optimization is specified.
+For functions declared inline, this attribute inlines the function even
+if no optimization level was specified.
+
+@item gnu_inline
+@cindex @code{gnu_inline} function attribute
+This attribute should be used with a function which is also declared
+with the @code{inline} keyword.  It directs GCC to treat the function
+as if it were defined in gnu90 mode even when compiling in C99 or
+gnu99 mode.
+
+If the function is declared @code{extern}, then this definition of the
+function is used only for inlining.  In no case is the function
+compiled as a standalone function, not even if you take its address
+explicitly.  Such an address becomes an external reference, as if you
+had only declared the function, and had not defined it.  This has
+almost the effect of a macro.  The way to use this is to put a
+function definition in a header file with this attribute, and put
+another copy of the function, without @code{extern}, in a library
+file.  The definition in the header file will cause most calls to the
+function to be inlined.  If any uses of the function remain, they will
+refer to the single copy in the library.  Note that the two
+definitions of the functions need not be precisely the same, although
+if they do not have the same effect your program may behave oddly.
+
+In C, if the function is neither @code{extern} nor @code{static}, then
+the function is compiled as a standalone function, as well as being
+inlined where possible.
+
+This is how GCC traditionally handled functions declared
+@code{inline}.  Since ISO C99 specifies a different semantics for
+@code{inline}, this function attribute is provided as a transition
+measure and as a useful feature in its own right.  This attribute is
+available in GCC 4.1.3 and later.  It is available if either of the
+preprocessor macros @code{__GNUC_GNU_INLINE__} or
+@code{__GNUC_STDC_INLINE__} are defined.  @xref{Inline,,An Inline
+Function is As Fast As a Macro}.
+
+In C++, this attribute does not depend on @code{extern} in any way,
+but it still requires the @code{inline} keyword to enable its special
+behavior.
+
+@item artificial
+@cindex @code{artificial} function attribute
+This attribute is useful for small inline wrappers which if possible
+should appear during debugging as a unit, depending on the debug
+info format it will either mean marking the function as artificial
+or using the caller location for all instructions within the inlined
+body.
+
+@item bank_switch
+@cindex interrupt handler functions
+When added to an interrupt handler with the M32C port, causes the
+prologue and epilogue to use bank switching to preserve the registers
+rather than saving them on the stack.
+
+@item flatten
+@cindex @code{flatten} function attribute
+Generally, inlining into a function is limited.  For a function marked with
+this attribute, every call inside this function will be inlined, if possible.
+Whether the function itself is considered for inlining depends on its size and
+the current inlining parameters.
+
+@item error ("@var{message}")
+@cindex @code{error} function attribute
+If this attribute is used on a function declaration and a call to such a function
+is not eliminated through dead code elimination or other optimizations, an error
+which will include @var{message} will be diagnosed.  This is useful
+for compile time checking, especially together with @code{__builtin_constant_p}
+and inline functions where checking the inline function arguments is not
+possible through @code{extern char [(condition) ? 1 : -1];} tricks.
+While it is possible to leave the function undefined and thus invoke
+a link failure, when using this attribute the problem will be diagnosed
+earlier and with exact location of the call even in presence of inline
+functions or when not emitting debugging information.
+
+@item warning ("@var{message}")
+@cindex @code{warning} function attribute
+If this attribute is used on a function declaration and a call to such a function
+is not eliminated through dead code elimination or other optimizations, a warning
+which will include @var{message} will be diagnosed.  This is useful
+for compile time checking, especially together with @code{__builtin_constant_p}
+and inline functions.  While it is possible to define the function with
+a message in @code{.gnu.warning*} section, when using this attribute the problem
+will be diagnosed earlier and with exact location of the call even in presence
+of inline functions or when not emitting debugging information.
+
+@item cdecl
+@cindex functions that do pop the argument stack on the 386
+@opindex mrtd
+On the Intel 386, the @code{cdecl} attribute causes the compiler to
+assume that the calling function will pop off the stack space used to
+pass arguments.  This is
+useful to override the effects of the @option{-mrtd} switch.
+
+@item const
+@cindex @code{const} function attribute
+Many functions do not examine any values except their arguments, and
+have no effects except the return value.  Basically this is just slightly
+more strict class than the @code{pure} attribute below, since function is not
+allowed to read global memory.
+
+@cindex pointer arguments
+Note that a function that has pointer arguments and examines the data
+pointed to must @emph{not} be declared @code{const}.  Likewise, a
+function that calls a non-@code{const} function usually must not be
+@code{const}.  It does not make sense for a @code{const} function to
+return @code{void}.
+
+The attribute @code{const} is not implemented in GCC versions earlier
+than 2.5.  An alternative way to declare that a function has no side
+effects, which works in the current version and in some older versions,
+is as follows:
+
+@smallexample
+typedef int intfn ();
+
+extern const intfn square;
+@end smallexample
+
+This approach does not work in GNU C++ from 2.6.0 on, since the language
+specifies that the @samp{const} must be attached to the return value.
+
+@item constructor
+@itemx destructor
+@itemx constructor (@var{priority})
+@itemx destructor (@var{priority})
+@cindex @code{constructor} function attribute
+@cindex @code{destructor} function attribute
+The @code{constructor} attribute causes the function to be called
+automatically before execution enters @code{main ()}.  Similarly, the
+@code{destructor} attribute causes the function to be called
+automatically after @code{main ()} has completed or @code{exit ()} has
+been called.  Functions with these attributes are useful for
+initializing data that will be used implicitly during the execution of
+the program.
+
+You may provide an optional integer priority to control the order in
+which constructor and destructor functions are run.  A constructor
+with a smaller priority number runs before a constructor with a larger
+priority number; the opposite relationship holds for destructors.  So,
+if you have a constructor that allocates a resource and a destructor
+that deallocates the same resource, both functions typically have the
+same priority.  The priorities for constructor and destructor
+functions are the same as those specified for namespace-scope C++
+objects (@pxref{C++ Attributes}).
+
+These attributes are not currently implemented for Objective-C@.
+
+@item deprecated
+@itemx deprecated (@var{msg})
+@cindex @code{deprecated} attribute.
+The @code{deprecated} attribute results in a warning if the function
+is used anywhere in the source file.  This is useful when identifying
+functions that are expected to be removed in a future version of a
+program.  The warning also includes the location of the declaration
+of the deprecated function, to enable users to easily find further
+information about why the function is deprecated, or what they should
+do instead.  Note that the warnings only occurs for uses:
+
+@smallexample
+int old_fn () __attribute__ ((deprecated));
+int old_fn ();
+int (*fn_ptr)() = old_fn;
+@end smallexample
+
+results in a warning on line 3 but not line 2.  The optional msg
+argument, which must be a string, will be printed in the warning if
+present.
+
+The @code{deprecated} attribute can also be used for variables and
+types (@pxref{Variable Attributes}, @pxref{Type Attributes}.)
+
+@item disinterrupt
+@cindex @code{disinterrupt} attribute
+On MeP targets, this attribute causes the compiler to emit
+instructions to disable interrupts for the duration of the given
+function.
+
+@item dllexport
+@cindex @code{__declspec(dllexport)}
+On Microsoft Windows targets and Symbian OS targets the
+@code{dllexport} attribute causes the compiler to provide a global
+pointer to a pointer in a DLL, so that it can be referenced with the
+@code{dllimport} attribute.  On Microsoft Windows targets, the pointer
+name is formed by combining @code{_imp__} and the function or variable
+name.
+
+You can use @code{__declspec(dllexport)} as a synonym for
+@code{__attribute__ ((dllexport))} for compatibility with other
+compilers.
+
+On systems that support the @code{visibility} attribute, this
+attribute also implies ``default'' visibility.  It is an error to
+explicitly specify any other visibility.
+
+In previous versions of GCC, the @code{dllexport} attribute was ignored 
+for inlined functions, unless the @option{-fkeep-inline-functions} flag
+had been used.  The default behaviour now is to emit all dllexported
+inline functions; however, this can cause object file-size bloat, in
+which case the old behaviour can be restored by using
+@option{-fno-keep-inline-dllexport}.
+
+The attribute is also ignored for undefined symbols.
+
+When applied to C++ classes, the attribute marks defined non-inlined
+member functions and static data members as exports.  Static consts
+initialized in-class are not marked unless they are also defined
+out-of-class.
+
+For Microsoft Windows targets there are alternative methods for
+including the symbol in the DLL's export table such as using a
+@file{.def} file with an @code{EXPORTS} section or, with GNU ld, using
+the @option{--export-all} linker flag.
+
+@item dllimport
+@cindex @code{__declspec(dllimport)}
+On Microsoft Windows and Symbian OS targets, the @code{dllimport}
+attribute causes the compiler to reference a function or variable via
+a global pointer to a pointer that is set up by the DLL exporting the
+symbol.  The attribute implies @code{extern}.  On Microsoft Windows
+targets, the pointer name is formed by combining @code{_imp__} and the
+function or variable name.
+
+You can use @code{__declspec(dllimport)} as a synonym for
+@code{__attribute__ ((dllimport))} for compatibility with other
+compilers.
+
+On systems that support the @code{visibility} attribute, this
+attribute also implies ``default'' visibility.  It is an error to
+explicitly specify any other visibility.
+
+Currently, the attribute is ignored for inlined functions.  If the
+attribute is applied to a symbol @emph{definition}, an error is reported.
+If a symbol previously declared @code{dllimport} is later defined, the
+attribute is ignored in subsequent references, and a warning is emitted.
+The attribute is also overridden by a subsequent declaration as
+@code{dllexport}.
+
+When applied to C++ classes, the attribute marks non-inlined
+member functions and static data members as imports.  However, the
+attribute is ignored for virtual methods to allow creation of vtables
+using thunks.
+
+On the SH Symbian OS target the @code{dllimport} attribute also has
+another affect---it can cause the vtable and run-time type information
+for a class to be exported.  This happens when the class has a
+dllimport'ed constructor or a non-inline, non-pure virtual function
+and, for either of those two conditions, the class also has an inline
+constructor or destructor and has a key function that is defined in
+the current translation unit.
+
+For Microsoft Windows based targets the use of the @code{dllimport}
+attribute on functions is not necessary, but provides a small
+performance benefit by eliminating a thunk in the DLL@.  The use of the
+@code{dllimport} attribute on imported variables was required on older
+versions of the GNU linker, but can now be avoided by passing the
+@option{--enable-auto-import} switch to the GNU linker.  As with
+functions, using the attribute for a variable eliminates a thunk in
+the DLL@.
+
+One drawback to using this attribute is that a pointer to a
+@emph{variable} marked as @code{dllimport} cannot be used as a constant
+address. However, a pointer to a @emph{function} with the
+@code{dllimport} attribute can be used as a constant initializer; in
+this case, the address of a stub function in the import lib is
+referenced.  On Microsoft Windows targets, the attribute can be disabled
+for functions by setting the @option{-mnop-fun-dllimport} flag.
+
+@item eightbit_data
+@cindex eight bit data on the H8/300, H8/300H, and H8S
+Use this attribute on the H8/300, H8/300H, and H8S to indicate that the specified
+variable should be placed into the eight bit data section.
+The compiler will generate more efficient code for certain operations
+on data in the eight bit data area.  Note the eight bit data area is limited to
+256 bytes of data.
+
+You must use GAS and GLD from GNU binutils version 2.7 or later for
+this attribute to work correctly.
+
+@item exception_handler
+@cindex exception handler functions on the Blackfin processor
+Use this attribute on the Blackfin to indicate that the specified function
+is an exception handler.  The compiler will generate function entry and
+exit sequences suitable for use in an exception handler when this
+attribute is present.
+
+@item externally_visible
+@cindex @code{externally_visible} attribute.
+This attribute, attached to a global variable or function, nullifies
+the effect of the @option{-fwhole-program} command-line option, so the
+object remains visible outside the current compilation unit. If @option{-fwhole-program} is used together with @option{-flto} and @command{gold} is used as the linker plugin, @code{externally_visible} attributes are automatically added to functions (not variable yet due to a current @command{gold} issue) that are accessed outside of LTO objects according to resolution file produced by @command{gold}.  For other linkers that cannot generate resolution file, explicit @code{externally_visible} attributes are still necessary.
+
+@item far
+@cindex functions which handle memory bank switching
+On 68HC11 and 68HC12 the @code{far} attribute causes the compiler to
+use a calling convention that takes care of switching memory banks when
+entering and leaving a function.  This calling convention is also the
+default when using the @option{-mlong-calls} option.
+
+On 68HC12 the compiler will use the @code{call} and @code{rtc} instructions
+to call and return from a function.
+
+On 68HC11 the compiler will generate a sequence of instructions
+to invoke a board-specific routine to switch the memory bank and call the
+real function.  The board-specific routine simulates a @code{call}.
+At the end of a function, it will jump to a board-specific routine
+instead of using @code{rts}.  The board-specific return routine simulates
+the @code{rtc}.
+
+On MeP targets this causes the compiler to use a calling convention
+which assumes the called function is too far away for the built-in
+addressing modes.
+
+@item fast_interrupt
+@cindex interrupt handler functions
+Use this attribute on the M32C and RX ports to indicate that the specified
+function is a fast interrupt handler.  This is just like the
+@code{interrupt} attribute, except that @code{freit} is used to return
+instead of @code{reit}.
+
+@item fastcall
+@cindex functions that pop the argument stack on the 386
+On the Intel 386, the @code{fastcall} attribute causes the compiler to
+pass the first argument (if of integral type) in the register ECX and
+the second argument (if of integral type) in the register EDX@.  Subsequent
+and other typed arguments are passed on the stack.  The called function will
+pop the arguments off the stack.  If the number of arguments is variable all
+arguments are pushed on the stack.
+
+@item thiscall
+@cindex functions that pop the argument stack on the 386
+On the Intel 386, the @code{thiscall} attribute causes the compiler to
+pass the first argument (if of integral type) in the register ECX.
+Subsequent and other typed arguments are passed on the stack. The called
+function will pop the arguments off the stack.
+If the number of arguments is variable all arguments are pushed on the
+stack.
+The @code{thiscall} attribute is intended for C++ non-static member functions.
+As gcc extension this calling convention can be used for C-functions
+and for static member methods.
+
+@item format (@var{archetype}, @var{string-index}, @var{first-to-check})
+@cindex @code{format} function attribute
+@opindex Wformat
+The @code{format} attribute specifies that a function takes @code{printf},
+@code{scanf}, @code{strftime} or @code{strfmon} style arguments which
+should be type-checked against a format string.  For example, the
+declaration:
+
+@smallexample
+extern int
+my_printf (void *my_object, const char *my_format, ...)
+      __attribute__ ((format (printf, 2, 3)));
+@end smallexample
+
+@noindent
+causes the compiler to check the arguments in calls to @code{my_printf}
+for consistency with the @code{printf} style format string argument
+@code{my_format}.
+
+The parameter @var{archetype} determines how the format string is
+interpreted, and should be @code{printf}, @code{scanf}, @code{strftime},
+@code{gnu_printf}, @code{gnu_scanf}, @code{gnu_strftime} or
+@code{strfmon}.  (You can also use @code{__printf__},
+@code{__scanf__}, @code{__strftime__} or @code{__strfmon__}.)  On
+MinGW targets, @code{ms_printf}, @code{ms_scanf}, and
+@code{ms_strftime} are also present.
+@var{archtype} values such as @code{printf} refer to the formats accepted
+by the system's C run-time library, while @code{gnu_} values always refer
+to the formats accepted by the GNU C Library.  On Microsoft Windows
+targets, @code{ms_} values refer to the formats accepted by the
+@file{msvcrt.dll} library.
+The parameter @var{string-index}
+specifies which argument is the format string argument (starting
+from 1), while @var{first-to-check} is the number of the first
+argument to check against the format string.  For functions
+where the arguments are not available to be checked (such as
+@code{vprintf}), specify the third parameter as zero.  In this case the
+compiler only checks the format string for consistency.  For
+@code{strftime} formats, the third parameter is required to be zero.
+Since non-static C++ methods have an implicit @code{this} argument, the
+arguments of such methods should be counted from two, not one, when
+giving values for @var{string-index} and @var{first-to-check}.
+
+In the example above, the format string (@code{my_format}) is the second
+argument of the function @code{my_print}, and the arguments to check
+start with the third argument, so the correct parameters for the format
+attribute are 2 and 3.
+
+@opindex ffreestanding
+@opindex fno-builtin
+The @code{format} attribute allows you to identify your own functions
+which take format strings as arguments, so that GCC can check the
+calls to these functions for errors.  The compiler always (unless
+@option{-ffreestanding} or @option{-fno-builtin} is used) checks formats
+for the standard library functions @code{printf}, @code{fprintf},
+@code{sprintf}, @code{scanf}, @code{fscanf}, @code{sscanf}, @code{strftime},
+@code{vprintf}, @code{vfprintf} and @code{vsprintf} whenever such
+warnings are requested (using @option{-Wformat}), so there is no need to
+modify the header file @file{stdio.h}.  In C99 mode, the functions
+@code{snprintf}, @code{vsnprintf}, @code{vscanf}, @code{vfscanf} and
+@code{vsscanf} are also checked.  Except in strictly conforming C
+standard modes, the X/Open function @code{strfmon} is also checked as
+are @code{printf_unlocked} and @code{fprintf_unlocked}.
+@xref{C Dialect Options,,Options Controlling C Dialect}.
+
+For Objective-C dialects, @code{NSString} (or @code{__NSString__}) is 
+recognized in the same context.  Declarations including these format attributes
+will be parsed for correct syntax, however the result of checking of such format
+strings is not yet defined, and will not be carried out by this version of the 
+compiler.
+
+The target may also provide additional types of format checks.
+@xref{Target Format Checks,,Format Checks Specific to Particular
+Target Machines}.
+
+@item format_arg (@var{string-index})
+@cindex @code{format_arg} function attribute
+@opindex Wformat-nonliteral
+The @code{format_arg} attribute specifies that a function takes a format
+string for a @code{printf}, @code{scanf}, @code{strftime} or
+@code{strfmon} style function and modifies it (for example, to translate
+it into another language), so the result can be passed to a
+@code{printf}, @code{scanf}, @code{strftime} or @code{strfmon} style
+function (with the remaining arguments to the format function the same
+as they would have been for the unmodified string).  For example, the
+declaration:
+
+@smallexample
+extern char *
+my_dgettext (char *my_domain, const char *my_format)
+      __attribute__ ((format_arg (2)));
+@end smallexample
+
+@noindent
+causes the compiler to check the arguments in calls to a @code{printf},
+@code{scanf}, @code{strftime} or @code{strfmon} type function, whose
+format string argument is a call to the @code{my_dgettext} function, for
+consistency with the format string argument @code{my_format}.  If the
+@code{format_arg} attribute had not been specified, all the compiler
+could tell in such calls to format functions would be that the format
+string argument is not constant; this would generate a warning when
+@option{-Wformat-nonliteral} is used, but the calls could not be checked
+without the attribute.
+
+The parameter @var{string-index} specifies which argument is the format
+string argument (starting from one).  Since non-static C++ methods have
+an implicit @code{this} argument, the arguments of such methods should
+be counted from two.
+
+The @code{format-arg} attribute allows you to identify your own
+functions which modify format strings, so that GCC can check the
+calls to @code{printf}, @code{scanf}, @code{strftime} or @code{strfmon}
+type function whose operands are a call to one of your own function.
+The compiler always treats @code{gettext}, @code{dgettext}, and
+@code{dcgettext} in this manner except when strict ISO C support is
+requested by @option{-ansi} or an appropriate @option{-std} option, or
+@option{-ffreestanding} or @option{-fno-builtin}
+is used.  @xref{C Dialect Options,,Options
+Controlling C Dialect}.
+
+For Objective-C dialects, the @code{format-arg} attribute may refer to an
+@code{NSString} reference for compatibility with the @code{format} attribute
+above.
+
+The target may also allow additional types in @code{format-arg} attributes.
+@xref{Target Format Checks,,Format Checks Specific to Particular
+Target Machines}.
+
+@item function_vector
+@cindex calling functions through the function vector on H8/300, M16C, M32C and SH2A processors
+Use this attribute on the H8/300, H8/300H, and H8S to indicate that the specified
+function should be called through the function vector.  Calling a
+function through the function vector will reduce code size, however;
+the function vector has a limited size (maximum 128 entries on the H8/300
+and 64 entries on the H8/300H and H8S) and shares space with the interrupt vector.
+
+In SH2A target, this attribute declares a function to be called using the
+TBR relative addressing mode.  The argument to this attribute is the entry
+number of the same function in a vector table containing all the TBR
+relative addressable functions.  For the successful jump, register TBR
+should contain the start address of this TBR relative vector table.
+In the startup routine of the user application, user needs to care of this
+TBR register initialization.  The TBR relative vector table can have at
+max 256 function entries.  The jumps to these functions will be generated
+using a SH2A specific, non delayed branch instruction JSR/N @@(disp8,TBR).
+You must use GAS and GLD from GNU binutils version 2.7 or later for
+this attribute to work correctly.
+
+Please refer the example of M16C target, to see the use of this
+attribute while declaring a function,
+
+In an application, for a function being called once, this attribute will
+save at least 8 bytes of code; and if other successive calls are being
+made to the same function, it will save 2 bytes of code per each of these
+calls.
+
+On M16C/M32C targets, the @code{function_vector} attribute declares a
+special page subroutine call function. Use of this attribute reduces
+the code size by 2 bytes for each call generated to the
+subroutine. The argument to the attribute is the vector number entry
+from the special page vector table which contains the 16 low-order
+bits of the subroutine's entry address. Each vector table has special
+page number (18 to 255) which are used in @code{jsrs} instruction.
+Jump addresses of the routines are generated by adding 0x0F0000 (in
+case of M16C targets) or 0xFF0000 (in case of M32C targets), to the 2
+byte addresses set in the vector table. Therefore you need to ensure
+that all the special page vector routines should get mapped within the
+address range 0x0F0000 to 0x0FFFFF (for M16C) and 0xFF0000 to 0xFFFFFF
+(for M32C).
+
+In the following example 2 bytes will be saved for each call to
+function @code{foo}.
+
+@smallexample
+void foo (void) __attribute__((function_vector(0x18)));
+void foo (void)
+@{
+@}
+
+void bar (void)
+@{
+    foo();
+@}
+@end smallexample
+
+If functions are defined in one file and are called in another file,
+then be sure to write this declaration in both files.
+
+This attribute is ignored for R8C target.
+
+@item interrupt
+@cindex interrupt handler functions
+Use this attribute on the ARM, AVR, CRX, M32C, M32R/D, m68k, MeP, MIPS,
+RX and Xstormy16 ports to indicate that the specified function is an
+interrupt handler.  The compiler will generate function entry and exit
+sequences suitable for use in an interrupt handler when this attribute
+is present.
+
+Note, interrupt handlers for the Blackfin, H8/300, H8/300H, H8S, MicroBlaze,
+and SH processors can be specified via the @code{interrupt_handler} attribute.
+
+Note, on the AVR, interrupts will be enabled inside the function.
+
+Note, for the ARM, you can specify the kind of interrupt to be handled by
+adding an optional parameter to the interrupt attribute like this:
+
+@smallexample
+void f () __attribute__ ((interrupt ("IRQ")));
+@end smallexample
+
+Permissible values for this parameter are: IRQ, FIQ, SWI, ABORT and UNDEF@.
+
+On ARMv7-M the interrupt type is ignored, and the attribute means the function
+may be called with a word aligned stack pointer.
+
+On MIPS targets, you can use the following attributes to modify the behavior
+of an interrupt handler:
+@table @code
+@item use_shadow_register_set
+@cindex @code{use_shadow_register_set} attribute
+Assume that the handler uses a shadow register set, instead of
+the main general-purpose registers.
+
+@item keep_interrupts_masked
+@cindex @code{keep_interrupts_masked} attribute
+Keep interrupts masked for the whole function.  Without this attribute,
+GCC tries to reenable interrupts for as much of the function as it can.
+
+@item use_debug_exception_return
+@cindex @code{use_debug_exception_return} attribute
+Return using the @code{deret} instruction.  Interrupt handlers that don't
+have this attribute return using @code{eret} instead.
+@end table
+
+You can use any combination of these attributes, as shown below:
+@smallexample
+void __attribute__ ((interrupt)) v0 ();
+void __attribute__ ((interrupt, use_shadow_register_set)) v1 ();
+void __attribute__ ((interrupt, keep_interrupts_masked)) v2 ();
+void __attribute__ ((interrupt, use_debug_exception_return)) v3 ();
+void __attribute__ ((interrupt, use_shadow_register_set,
+                     keep_interrupts_masked)) v4 ();
+void __attribute__ ((interrupt, use_shadow_register_set,
+                     use_debug_exception_return)) v5 ();
+void __attribute__ ((interrupt, keep_interrupts_masked,
+                     use_debug_exception_return)) v6 ();
+void __attribute__ ((interrupt, use_shadow_register_set,
+                     keep_interrupts_masked,
+                     use_debug_exception_return)) v7 ();
+@end smallexample
+
+@item ifunc ("@var{resolver}")
+@cindex @code{ifunc} attribute
+The @code{ifunc} attribute is used to mark a function as an indirect
+function using the STT_GNU_IFUNC symbol type extension to the ELF
+standard.  This allows the resolution of the symbol value to be
+determined dynamically at load time, and an optimized version of the
+routine can be selected for the particular processor or other system
+characteristics determined then.  To use this attribute, first define
+the implementation functions available, and a resolver function that
+returns a pointer to the selected implementation function.  The
+implementation functions' declarations must match the API of the
+function being implemented, the resolver's declaration is be a
+function returning pointer to void function returning void:
+
+@smallexample
+void *my_memcpy (void *dst, const void *src, size_t len)
+@{
+  @dots{}
+@}
+
+static void (*resolve_memcpy (void)) (void)
+@{
+  return my_memcpy; // we'll just always select this routine
+@}
+@end smallexample
+
+The exported header file declaring the function the user calls would
+contain:
+
+@smallexample
+extern void *memcpy (void *, const void *, size_t);
+@end smallexample
+
+allowing the user to call this as a regular function, unaware of the
+implementation.  Finally, the indirect function needs to be defined in
+the same translation unit as the resolver function:
+
+@smallexample
+void *memcpy (void *, const void *, size_t)
+     __attribute__ ((ifunc ("resolve_memcpy")));
+@end smallexample
+
+Indirect functions cannot be weak, and require a recent binutils (at
+least version 2.20.1), and GNU C library (at least version 2.11.1).
+
+@item interrupt_handler
+@cindex interrupt handler functions on the Blackfin, m68k, H8/300 and SH processors
+Use this attribute on the Blackfin, m68k, H8/300, H8/300H, H8S, and SH to
+indicate that the specified function is an interrupt handler.  The compiler
+will generate function entry and exit sequences suitable for use in an
+interrupt handler when this attribute is present.
+
+@item interrupt_thread
+@cindex interrupt thread functions on fido
+Use this attribute on fido, a subarchitecture of the m68k, to indicate
+that the specified function is an interrupt handler that is designed
+to run as a thread.  The compiler omits generate prologue/epilogue
+sequences and replaces the return instruction with a @code{sleep}
+instruction.  This attribute is available only on fido.
+
+@item isr
+@cindex interrupt service routines on ARM
+Use this attribute on ARM to write Interrupt Service Routines. This is an
+alias to the @code{interrupt} attribute above.
+
+@item kspisusp
+@cindex User stack pointer in interrupts on the Blackfin
+When used together with @code{interrupt_handler}, @code{exception_handler}
+or @code{nmi_handler}, code will be generated to load the stack pointer
+from the USP register in the function prologue.
+
+@item l1_text
+@cindex @code{l1_text} function attribute
+This attribute specifies a function to be placed into L1 Instruction
+SRAM@. The function will be put into a specific section named @code{.l1.text}.
+With @option{-mfdpic}, function calls with a such function as the callee
+or caller will use inlined PLT.
+
+@item l2
+@cindex @code{l2} function attribute
+On the Blackfin, this attribute specifies a function to be placed into L2
+SRAM. The function will be put into a specific section named
+@code{.l1.text}. With @option{-mfdpic}, callers of such functions will use
+an inlined PLT.
+
+@item leaf
+@cindex @code{leaf} function attribute
+Calls to external functions with this attribute must return to the current
+compilation unit only by return or by exception handling.  In particular, leaf
+functions are not allowed to call callback function passed to it from the current
+compilation unit or directly call functions exported by the unit or longjmp
+into the unit.  Leaf function might still call functions from other compilation
+units and thus they are not necessarily leaf in the sense that they contain no
+function calls at all.
+
+The attribute is intended for library functions to improve dataflow analysis.
+The compiler takes the hint that any data not escaping the current compilation unit can
+not be used or modified by the leaf function.  For example, the @code{sin} function
+is a leaf function, but @code{qsort} is not.
+
+Note that leaf functions might invoke signals and signal handlers might be
+defined in the current compilation unit and use static variables.  The only
+compliant way to write such a signal handler is to declare such variables
+@code{volatile}.
+
+The attribute has no effect on functions defined within the current compilation
+unit.  This is to allow easy merging of multiple compilation units into one,
+for example, by using the link time optimization.  For this reason the
+attribute is not allowed on types to annotate indirect calls.
+
+@item long_call/short_call
+@cindex indirect calls on ARM
+This attribute specifies how a particular function is called on
+ARM@.  Both attributes override the @option{-mlong-calls} (@pxref{ARM Options})
+command-line switch and @code{#pragma long_calls} settings.  The
+@code{long_call} attribute indicates that the function might be far
+away from the call site and require a different (more expensive)
+calling sequence.   The @code{short_call} attribute always places
+the offset to the function from the call site into the @samp{BL}
+instruction directly.
+
+@item longcall/shortcall
+@cindex functions called via pointer on the RS/6000 and PowerPC
+On the Blackfin, RS/6000 and PowerPC, the @code{longcall} attribute
+indicates that the function might be far away from the call site and
+require a different (more expensive) calling sequence.  The
+@code{shortcall} attribute indicates that the function is always close
+enough for the shorter calling sequence to be used.  These attributes
+override both the @option{-mlongcall} switch and, on the RS/6000 and
+PowerPC, the @code{#pragma longcall} setting.
+
+@xref{RS/6000 and PowerPC Options}, for more information on whether long
+calls are necessary.
+
+@item long_call/near/far
+@cindex indirect calls on MIPS
+These attributes specify how a particular function is called on MIPS@.
+The attributes override the @option{-mlong-calls} (@pxref{MIPS Options})
+command-line switch.  The @code{long_call} and @code{far} attributes are
+synonyms, and cause the compiler to always call
+the function by first loading its address into a register, and then using
+the contents of that register.  The @code{near} attribute has the opposite
+effect; it specifies that non-PIC calls should be made using the more 
+efficient @code{jal} instruction.
+
+@item malloc
+@cindex @code{malloc} attribute
+The @code{malloc} attribute is used to tell the compiler that a function
+may be treated as if any non-@code{NULL} pointer it returns cannot
+alias any other pointer valid when the function returns.
+This will often improve optimization.
+Standard functions with this property include @code{malloc} and
+@code{calloc}.  @code{realloc}-like functions have this property as
+long as the old pointer is never referred to (including comparing it
+to the new pointer) after the function returns a non-@code{NULL}
+value.
+
+@item mips16/nomips16
+@cindex @code{mips16} attribute
+@cindex @code{nomips16} attribute
+
+On MIPS targets, you can use the @code{mips16} and @code{nomips16}
+function attributes to locally select or turn off MIPS16 code generation.
+A function with the @code{mips16} attribute is emitted as MIPS16 code, 
+while MIPS16 code generation is disabled for functions with the 
+@code{nomips16} attribute.  These attributes override the 
+@option{-mips16} and @option{-mno-mips16} options on the command line
+(@pxref{MIPS Options}).  
+
+When compiling files containing mixed MIPS16 and non-MIPS16 code, the
+preprocessor symbol @code{__mips16} reflects the setting on the command line,
+not that within individual functions.  Mixed MIPS16 and non-MIPS16 code
+may interact badly with some GCC extensions such as @code{__builtin_apply}
+(@pxref{Constructing Calls}).
+
+@item model (@var{model-name})
+@cindex function addressability on the M32R/D
+@cindex variable addressability on the IA-64
+
+On the M32R/D, use this attribute to set the addressability of an
+object, and of the code generated for a function.  The identifier
+@var{model-name} is one of @code{small}, @code{medium}, or
+@code{large}, representing each of the code models.
+
+Small model objects live in the lower 16MB of memory (so that their
+addresses can be loaded with the @code{ld24} instruction), and are
+callable with the @code{bl} instruction.
+
+Medium model objects may live anywhere in the 32-bit address space (the
+compiler will generate @code{seth/add3} instructions to load their addresses),
+and are callable with the @code{bl} instruction.
+
+Large model objects may live anywhere in the 32-bit address space (the
+compiler will generate @code{seth/add3} instructions to load their addresses),
+and may not be reachable with the @code{bl} instruction (the compiler will
+generate the much slower @code{seth/add3/jl} instruction sequence).
+
+On IA-64, use this attribute to set the addressability of an object.
+At present, the only supported identifier for @var{model-name} is
+@code{small}, indicating addressability via ``small'' (22-bit)
+addresses (so that their addresses can be loaded with the @code{addl}
+instruction).  Caveat: such addressing is by definition not position
+independent and hence this attribute must not be used for objects
+defined by shared libraries.
+
+@item ms_abi/sysv_abi
+@cindex @code{ms_abi} attribute
+@cindex @code{sysv_abi} attribute
+
+On 64-bit x86_64-*-* targets, you can use an ABI attribute to indicate
+which calling convention should be used for a function.  The @code{ms_abi}
+attribute tells the compiler to use the Microsoft ABI, while the
+@code{sysv_abi} attribute tells the compiler to use the ABI used on
+GNU/Linux and other systems.  The default is to use the Microsoft ABI
+when targeting Windows.  On all other systems, the default is the AMD ABI.
+
+Note, the @code{ms_abi} attribute for Windows targets currently requires
+the @option{-maccumulate-outgoing-args} option.
+
+@item callee_pop_aggregate_return (@var{number})
+@cindex @code{callee_pop_aggregate_return} attribute
+
+On 32-bit i?86-*-* targets, you can control by those attribute for
+aggregate return in memory, if the caller is responsible to pop the hidden
+pointer together with the rest of the arguments - @var{number} equal to
+zero -, or if the callee is responsible to pop hidden pointer - @var{number}
+equal to one.
+
+For i?86-netware, the caller pops the stack for the hidden arguments pointing
+to aggregate return value.  This differs from the default i386 ABI which assumes
+that the callee pops the stack for hidden pointer.
+
+@item ms_hook_prologue
+@cindex @code{ms_hook_prologue} attribute
+
+On 32 bit i[34567]86-*-* targets and 64 bit x86_64-*-* targets, you can use
+this function attribute to make gcc generate the "hot-patching" function
+prologue used in Win32 API functions in Microsoft Windows XP Service Pack 2
+and newer.
+
+@item naked
+@cindex function without a prologue/epilogue code
+Use this attribute on the ARM, AVR, MCORE, RX and SPU ports to indicate that
+the specified function does not need prologue/epilogue sequences generated by
+the compiler.  It is up to the programmer to provide these sequences. The 
+only statements that can be safely included in naked functions are 
+@code{asm} statements that do not have operands.  All other statements,
+including declarations of local variables, @code{if} statements, and so 
+forth, should be avoided.  Naked functions should be used to implement the 
+body of an assembly function, while allowing the compiler to construct
+the requisite function declaration for the assembler.
+
+@item near
+@cindex functions which do not handle memory bank switching on 68HC11/68HC12
+On 68HC11 and 68HC12 the @code{near} attribute causes the compiler to
+use the normal calling convention based on @code{jsr} and @code{rts}.
+This attribute can be used to cancel the effect of the @option{-mlong-calls}
+option.
+
+On MeP targets this attribute causes the compiler to assume the called
+function is close enough to use the normal calling convention,
+overriding the @code{-mtf} command line option.
+
+@item nesting
+@cindex Allow nesting in an interrupt handler on the Blackfin processor.
+Use this attribute together with @code{interrupt_handler},
+@code{exception_handler} or @code{nmi_handler} to indicate that the function
+entry code should enable nested interrupts or exceptions.
+
+@item nmi_handler
+@cindex NMI handler functions on the Blackfin processor
+Use this attribute on the Blackfin to indicate that the specified function
+is an NMI handler.  The compiler will generate function entry and
+exit sequences suitable for use in an NMI handler when this
+attribute is present.
+
+@item no_instrument_function
+@cindex @code{no_instrument_function} function attribute
+@opindex finstrument-functions
+If @option{-finstrument-functions} is given, profiling function calls will
+be generated at entry and exit of most user-compiled functions.
+Functions with this attribute will not be so instrumented.
+
+@item no_split_stack
+@cindex @code{no_split_stack} function attribute
+@opindex fsplit-stack
+If @option{-fsplit-stack} is given, functions will have a small
+prologue which decides whether to split the stack.  Functions with the
+@code{no_split_stack} attribute will not have that prologue, and thus
+may run with only a small amount of stack space available.
+
+@item noinline
+@cindex @code{noinline} function attribute
+This function attribute prevents a function from being considered for
+inlining.
+@c Don't enumerate the optimizations by name here; we try to be
+@c future-compatible with this mechanism.
+If the function does not have side-effects, there are optimizations
+other than inlining that causes function calls to be optimized away,
+although the function call is live.  To keep such calls from being
+optimized away, put
+@smallexample
+asm ("");
+@end smallexample
+(@pxref{Extended Asm}) in the called function, to serve as a special
+side-effect.
+
+@item noclone
+@cindex @code{noclone} function attribute
+This function attribute prevents a function from being considered for
+cloning - a mechanism which produces specialized copies of functions
+and which is (currently) performed by interprocedural constant
+propagation.
+
+@item nonnull (@var{arg-index}, @dots{})
+@cindex @code{nonnull} function attribute
+The @code{nonnull} attribute specifies that some function parameters should
+be non-null pointers.  For instance, the declaration:
+
+@smallexample
+extern void *
+my_memcpy (void *dest, const void *src, size_t len)
+        __attribute__((nonnull (1, 2)));
+@end smallexample
+
+@noindent
+causes the compiler to check that, in calls to @code{my_memcpy},
+arguments @var{dest} and @var{src} are non-null.  If the compiler
+determines that a null pointer is passed in an argument slot marked
+as non-null, and the @option{-Wnonnull} option is enabled, a warning
+is issued.  The compiler may also choose to make optimizations based
+on the knowledge that certain function arguments will not be null.
+
+If no argument index list is given to the @code{nonnull} attribute,
+all pointer arguments are marked as non-null.  To illustrate, the
+following declaration is equivalent to the previous example:
+
+@smallexample
+extern void *
+my_memcpy (void *dest, const void *src, size_t len)
+        __attribute__((nonnull));
+@end smallexample
+
+@item noreturn
+@cindex @code{noreturn} function attribute
+A few standard library functions, such as @code{abort} and @code{exit},
+cannot return.  GCC knows this automatically.  Some programs define
+their own functions that never return.  You can declare them
+@code{noreturn} to tell the compiler this fact.  For example,
+
+@smallexample
+@group
+void fatal () __attribute__ ((noreturn));
+
+void
+fatal (/* @r{@dots{}} */)
+@{
+  /* @r{@dots{}} */ /* @r{Print error message.} */ /* @r{@dots{}} */
+  exit (1);
+@}
+@end group
+@end smallexample
+
+The @code{noreturn} keyword tells the compiler to assume that
+@code{fatal} cannot return.  It can then optimize without regard to what
+would happen if @code{fatal} ever did return.  This makes slightly
+better code.  More importantly, it helps avoid spurious warnings of
+uninitialized variables.
+
+The @code{noreturn} keyword does not affect the exceptional path when that
+applies: a @code{noreturn}-marked function may still return to the caller
+by throwing an exception or calling @code{longjmp}.
+
+Do not assume that registers saved by the calling function are
+restored before calling the @code{noreturn} function.
+
+It does not make sense for a @code{noreturn} function to have a return
+type other than @code{void}.
+
+The attribute @code{noreturn} is not implemented in GCC versions
+earlier than 2.5.  An alternative way to declare that a function does
+not return, which works in the current version and in some older
+versions, is as follows:
+
+@smallexample
+typedef void voidfn ();
+
+volatile voidfn fatal;
+@end smallexample
+
+This approach does not work in GNU C++.
+
+@item nothrow
+@cindex @code{nothrow} function attribute
+The @code{nothrow} attribute is used to inform the compiler that a
+function cannot throw an exception.  For example, most functions in
+the standard C library can be guaranteed not to throw an exception
+with the notable exceptions of @code{qsort} and @code{bsearch} that
+take function pointer arguments.  The @code{nothrow} attribute is not
+implemented in GCC versions earlier than 3.3.
+
+@item optimize
+@cindex @code{optimize} function attribute
+The @code{optimize} attribute is used to specify that a function is to
+be compiled with different optimization options than specified on the
+command line.  Arguments can either be numbers or strings.  Numbers
+are assumed to be an optimization level.  Strings that begin with
+@code{O} are assumed to be an optimization option, while other options
+are assumed to be used with a @code{-f} prefix.  You can also use the
+@samp{#pragma GCC optimize} pragma to set the optimization options
+that affect more than one function.
+@xref{Function Specific Option Pragmas}, for details about the
+@samp{#pragma GCC optimize} pragma.
+
+This can be used for instance to have frequently executed functions
+compiled with more aggressive optimization options that produce faster
+and larger code, while other functions can be called with less
+aggressive options.
+
+@item OS_main/OS_task
+@cindex @code{OS_main} AVR function attribute
+@cindex @code{OS_task} AVR function attribute
+On AVR, functions with the @code{OS_main} or @code{OS_task} attribute
+do not save/restore any call-saved register in their prologue/epilogue.
+
+The @code{OS_main} attribute can be used when there @emph{is
+guarantee} that interrupts are disabled at the time when the function
+is entered.  This will save resources when the stack pointer has to be
+changed to set up a frame for local variables.
+
+The @code{OS_task} attribute can be used when there is @emph{no
+guarantee} that interrupts are disabled at that time when the function
+is entered like for, e@.g@. task functions in a multi-threading operating
+system. In that case, changing the stack pointer register will be
+guarded by save/clear/restore of the global interrupt enable flag.
+
+The differences to the @code{naked} function attrubute are:
+@itemize @bullet
+@item @code{naked} functions do not have a return instruction whereas 
+@code{OS_main} and @code{OS_task} functions will have a @code{RET} or
+@code{RETI} return instruction.
+@item @code{naked} functions do not set up a frame for local variables
+or a frame pointer whereas @code{OS_main} and @code{OS_task} do this
+as needed.
+@end itemize
+
+@item pcs
+@cindex @code{pcs} function attribute
+
+The @code{pcs} attribute can be used to control the calling convention
+used for a function on ARM.  The attribute takes an argument that specifies
+the calling convention to use.
+
+When compiling using the AAPCS ABI (or a variant of that) then valid
+values for the argument are @code{"aapcs"} and @code{"aapcs-vfp"}.  In
+order to use a variant other than @code{"aapcs"} then the compiler must
+be permitted to use the appropriate co-processor registers (i.e., the
+VFP registers must be available in order to use @code{"aapcs-vfp"}).
+For example,
+
+@smallexample
+/* Argument passed in r0, and result returned in r0+r1.  */
+double f2d (float) __attribute__((pcs("aapcs")));
+@end smallexample
+
+Variadic functions always use the @code{"aapcs"} calling convention and
+the compiler will reject attempts to specify an alternative.
+
+@item pure
+@cindex @code{pure} function attribute
+Many functions have no effects except the return value and their
+return value depends only on the parameters and/or global variables.
+Such a function can be subject
+to common subexpression elimination and loop optimization just as an
+arithmetic operator would be.  These functions should be declared
+with the attribute @code{pure}.  For example,
+
+@smallexample
+int square (int) __attribute__ ((pure));
+@end smallexample
+
+@noindent
+says that the hypothetical function @code{square} is safe to call
+fewer times than the program says.
+
+Some of common examples of pure functions are @code{strlen} or @code{memcmp}.
+Interesting non-pure functions are functions with infinite loops or those
+depending on volatile memory or other system resource, that may change between
+two consecutive calls (such as @code{feof} in a multithreading environment).
+
+The attribute @code{pure} is not implemented in GCC versions earlier
+than 2.96.
+
+@item hot
+@cindex @code{hot} function attribute
+The @code{hot} attribute is used to inform the compiler that a function is a
+hot spot of the compiled program.  The function is optimized more aggressively
+and on many target it is placed into special subsection of the text section so
+all hot functions appears close together improving locality.
+
+When profile feedback is available, via @option{-fprofile-use}, hot functions
+are automatically detected and this attribute is ignored.
+
+The @code{hot} attribute is not implemented in GCC versions earlier
+than 4.3.
+
+@item cold
+@cindex @code{cold} function attribute
+The @code{cold} attribute is used to inform the compiler that a function is
+unlikely executed.  The function is optimized for size rather than speed and on
+many targets it is placed into special subsection of the text section so all
+cold functions appears close together improving code locality of non-cold parts
+of program.  The paths leading to call of cold functions within code are marked
+as unlikely by the branch prediction mechanism. It is thus useful to mark
+functions used to handle unlikely conditions, such as @code{perror}, as cold to
+improve optimization of hot functions that do call marked functions in rare
+occasions.
+
+When profile feedback is available, via @option{-fprofile-use}, hot functions
+are automatically detected and this attribute is ignored.
+
+The @code{cold} attribute is not implemented in GCC versions earlier than 4.3.
+
+@item regparm (@var{number})
+@cindex @code{regparm} attribute
+@cindex functions that are passed arguments in registers on the 386
+On the Intel 386, the @code{regparm} attribute causes the compiler to
+pass arguments number one to @var{number} if they are of integral type
+in registers EAX, EDX, and ECX instead of on the stack.  Functions that
+take a variable number of arguments will continue to be passed all of their
+arguments on the stack.
+
+Beware that on some ELF systems this attribute is unsuitable for
+global functions in shared libraries with lazy binding (which is the
+default).  Lazy binding will send the first call via resolving code in
+the loader, which might assume EAX, EDX and ECX can be clobbered, as
+per the standard calling conventions.  Solaris 8 is affected by this.
+GNU systems with GLIBC 2.1 or higher, and FreeBSD, are believed to be
+safe since the loaders there save EAX, EDX and ECX.  (Lazy binding can be
+disabled with the linker or the loader if desired, to avoid the
+problem.)
+
+@item sseregparm
+@cindex @code{sseregparm} attribute
+On the Intel 386 with SSE support, the @code{sseregparm} attribute
+causes the compiler to pass up to 3 floating point arguments in
+SSE registers instead of on the stack.  Functions that take a
+variable number of arguments will continue to pass all of their
+floating point arguments on the stack.
+
+@item force_align_arg_pointer
+@cindex @code{force_align_arg_pointer} attribute
+On the Intel x86, the @code{force_align_arg_pointer} attribute may be
+applied to individual function definitions, generating an alternate
+prologue and epilogue that realigns the runtime stack if necessary.
+This supports mixing legacy codes that run with a 4-byte aligned stack
+with modern codes that keep a 16-byte stack for SSE compatibility.
+
+@item resbank
+@cindex @code{resbank} attribute
+On the SH2A target, this attribute enables the high-speed register
+saving and restoration using a register bank for @code{interrupt_handler}
+routines.  Saving to the bank is performed automatically after the CPU
+accepts an interrupt that uses a register bank.
+
+The nineteen 32-bit registers comprising general register R0 to R14,
+control register GBR, and system registers MACH, MACL, and PR and the
+vector table address offset are saved into a register bank.  Register
+banks are stacked in first-in last-out (FILO) sequence.  Restoration
+from the bank is executed by issuing a RESBANK instruction.
+
+@item returns_twice
+@cindex @code{returns_twice} attribute
+The @code{returns_twice} attribute tells the compiler that a function may
+return more than one time.  The compiler will ensure that all registers
+are dead before calling such a function and will emit a warning about
+the variables that may be clobbered after the second return from the
+function.  Examples of such functions are @code{setjmp} and @code{vfork}.
+The @code{longjmp}-like counterpart of such function, if any, might need
+to be marked with the @code{noreturn} attribute.
+
+@item saveall
+@cindex save all registers on the Blackfin, H8/300, H8/300H, and H8S
+Use this attribute on the Blackfin, H8/300, H8/300H, and H8S to indicate that
+all registers except the stack pointer should be saved in the prologue
+regardless of whether they are used or not.
+
+@item save_volatiles
+@cindex save volatile registers on the MicroBlaze
+Use this attribute on the MicroBlaze to indicate that the function is
+an interrupt handler.  All volatile registers (in addition to non-volatile 
+registers) will be saved in the function prologue.  If the function is a leaf 
+function, only volatiles used by the function are saved.  A normal function 
+return is generated instead of a return from interrupt.  
+
+@item section ("@var{section-name}")
+@cindex @code{section} function attribute
+Normally, the compiler places the code it generates in the @code{text} section.
+Sometimes, however, you need additional sections, or you need certain
+particular functions to appear in special sections.  The @code{section}
+attribute specifies that a function lives in a particular section.
+For example, the declaration:
+
+@smallexample
+extern void foobar (void) __attribute__ ((section ("bar")));
+@end smallexample
+
+@noindent
+puts the function @code{foobar} in the @code{bar} section.
+
+Some file formats do not support arbitrary sections so the @code{section}
+attribute is not available on all platforms.
+If you need to map the entire contents of a module to a particular
+section, consider using the facilities of the linker instead.
+
+@item sentinel
+@cindex @code{sentinel} function attribute
+This function attribute ensures that a parameter in a function call is
+an explicit @code{NULL}.  The attribute is only valid on variadic
+functions.  By default, the sentinel is located at position zero, the
+last parameter of the function call.  If an optional integer position
+argument P is supplied to the attribute, the sentinel must be located at
+position P counting backwards from the end of the argument list.
+
+@smallexample
+__attribute__ ((sentinel))
+is equivalent to
+__attribute__ ((sentinel(0)))
+@end smallexample
+
+The attribute is automatically set with a position of 0 for the built-in
+functions @code{execl} and @code{execlp}.  The built-in function
+@code{execle} has the attribute set with a position of 1.
+
+A valid @code{NULL} in this context is defined as zero with any pointer
+type.  If your system defines the @code{NULL} macro with an integer type
+then you need to add an explicit cast.  GCC replaces @code{stddef.h}
+with a copy that redefines NULL appropriately.
+
+The warnings for missing or incorrect sentinels are enabled with
+@option{-Wformat}.
+
+@item short_call
+See long_call/short_call.
+
+@item shortcall
+See longcall/shortcall.
+
+@item signal
+@cindex signal handler functions on the AVR processors
+Use this attribute on the AVR to indicate that the specified
+function is a signal handler.  The compiler will generate function
+entry and exit sequences suitable for use in a signal handler when this
+attribute is present.  Interrupts will be disabled inside the function.
+
+@item sp_switch
+Use this attribute on the SH to indicate an @code{interrupt_handler}
+function should switch to an alternate stack.  It expects a string
+argument that names a global variable holding the address of the
+alternate stack.
+
+@smallexample
+void *alt_stack;
+void f () __attribute__ ((interrupt_handler,
+                          sp_switch ("alt_stack")));
+@end smallexample
+
+@item stdcall
+@cindex functions that pop the argument stack on the 386
+On the Intel 386, the @code{stdcall} attribute causes the compiler to
+assume that the called function will pop off the stack space used to
+pass arguments, unless it takes a variable number of arguments.
+
+@item syscall_linkage
+@cindex @code{syscall_linkage} attribute
+This attribute is used to modify the IA64 calling convention by marking
+all input registers as live at all function exits.  This makes it possible
+to restart a system call after an interrupt without having to save/restore
+the input registers.  This also prevents kernel data from leaking into
+application code.
+
+@item target
+@cindex @code{target} function attribute
+The @code{target} attribute is used to specify that a function is to
+be compiled with different target options than specified on the
+command line.  This can be used for instance to have functions
+compiled with a different ISA (instruction set architecture) than the
+default.  You can also use the @samp{#pragma GCC target} pragma to set
+more than one function to be compiled with specific target options.
+@xref{Function Specific Option Pragmas}, for details about the
+@samp{#pragma GCC target} pragma.
+
+For instance on a 386, you could compile one function with
+@code{target("sse4.1,arch=core2")} and another with
+@code{target("sse4a,arch=amdfam10")} that would be equivalent to
+compiling the first function with @option{-msse4.1} and
+@option{-march=core2} options, and the second function with
+@option{-msse4a} and @option{-march=amdfam10} options.  It is up to the
+user to make sure that a function is only invoked on a machine that
+supports the particular ISA it was compiled for (for example by using
+@code{cpuid} on 386 to determine what feature bits and architecture
+family are used).
+
+@smallexample
+int core2_func (void) __attribute__ ((__target__ ("arch=core2")));
+int sse3_func (void) __attribute__ ((__target__ ("sse3")));
+@end smallexample
+
+On the 386, the following options are allowed:
+
+@table @samp
+@item abm
+@itemx no-abm
+@cindex @code{target("abm")} attribute
+Enable/disable the generation of the advanced bit instructions.
+
+@item aes
+@itemx no-aes
+@cindex @code{target("aes")} attribute
+Enable/disable the generation of the AES instructions.
+
+@item mmx
+@itemx no-mmx
+@cindex @code{target("mmx")} attribute
+Enable/disable the generation of the MMX instructions.
+
+@item pclmul
+@itemx no-pclmul
+@cindex @code{target("pclmul")} attribute
+Enable/disable the generation of the PCLMUL instructions.
+
+@item popcnt
+@itemx no-popcnt
+@cindex @code{target("popcnt")} attribute
+Enable/disable the generation of the POPCNT instruction.
+
+@item sse
+@itemx no-sse
+@cindex @code{target("sse")} attribute
+Enable/disable the generation of the SSE instructions.
+
+@item sse2
+@itemx no-sse2
+@cindex @code{target("sse2")} attribute
+Enable/disable the generation of the SSE2 instructions.
+
+@item sse3
+@itemx no-sse3
+@cindex @code{target("sse3")} attribute
+Enable/disable the generation of the SSE3 instructions.
+
+@item sse4
+@itemx no-sse4
+@cindex @code{target("sse4")} attribute
+Enable/disable the generation of the SSE4 instructions (both SSE4.1
+and SSE4.2).
+
+@item sse4.1
+@itemx no-sse4.1
+@cindex @code{target("sse4.1")} attribute
+Enable/disable the generation of the sse4.1 instructions.
+
+@item sse4.2
+@itemx no-sse4.2
+@cindex @code{target("sse4.2")} attribute
+Enable/disable the generation of the sse4.2 instructions.
+
+@item sse4a
+@itemx no-sse4a
+@cindex @code{target("sse4a")} attribute
+Enable/disable the generation of the SSE4A instructions.
+
+@item fma4
+@itemx no-fma4
+@cindex @code{target("fma4")} attribute
+Enable/disable the generation of the FMA4 instructions.
+
+@item xop
+@itemx no-xop
+@cindex @code{target("xop")} attribute
+Enable/disable the generation of the XOP instructions.
+
+@item lwp
+@itemx no-lwp
+@cindex @code{target("lwp")} attribute
+Enable/disable the generation of the LWP instructions.
+
+@item ssse3
+@itemx no-ssse3
+@cindex @code{target("ssse3")} attribute
+Enable/disable the generation of the SSSE3 instructions.
+
+@item cld
+@itemx no-cld
+@cindex @code{target("cld")} attribute
+Enable/disable the generation of the CLD before string moves.
+
+@item fancy-math-387
+@itemx no-fancy-math-387
+@cindex @code{target("fancy-math-387")} attribute
+Enable/disable the generation of the @code{sin}, @code{cos}, and
+@code{sqrt} instructions on the 387 floating point unit.
+
+@item fused-madd
+@itemx no-fused-madd
+@cindex @code{target("fused-madd")} attribute
+Enable/disable the generation of the fused multiply/add instructions.
+
+@item ieee-fp
+@itemx no-ieee-fp
+@cindex @code{target("ieee-fp")} attribute
+Enable/disable the generation of floating point that depends on IEEE arithmetic.
+
+@item inline-all-stringops
+@itemx no-inline-all-stringops
+@cindex @code{target("inline-all-stringops")} attribute
+Enable/disable inlining of string operations.
+
+@item inline-stringops-dynamically
+@itemx no-inline-stringops-dynamically
+@cindex @code{target("inline-stringops-dynamically")} attribute
+Enable/disable the generation of the inline code to do small string
+operations and calling the library routines for large operations.
+
+@item align-stringops
+@itemx no-align-stringops
+@cindex @code{target("align-stringops")} attribute
+Do/do not align destination of inlined string operations.
+
+@item recip
+@itemx no-recip
+@cindex @code{target("recip")} attribute
+Enable/disable the generation of RCPSS, RCPPS, RSQRTSS and RSQRTPS
+instructions followed an additional Newton-Raphson step instead of
+doing a floating point division.
+
+@item arch=@var{ARCH}
+@cindex @code{target("arch=@var{ARCH}")} attribute
+Specify the architecture to generate code for in compiling the function.
+
+@item tune=@var{TUNE}
+@cindex @code{target("tune=@var{TUNE}")} attribute
+Specify the architecture to tune for in compiling the function.
+
+@item fpmath=@var{FPMATH}
+@cindex @code{target("fpmath=@var{FPMATH}")} attribute
+Specify which floating point unit to use.  The
+@code{target("fpmath=sse,387")} option must be specified as
+@code{target("fpmath=sse+387")} because the comma would separate
+different options.
+@end table
+
+On the PowerPC, the following options are allowed:
+
+@table @samp
+@item altivec
+@itemx no-altivec
+@cindex @code{target("altivec")} attribute
+Generate code that uses (does not use) AltiVec instructions.  In
+32-bit code, you cannot enable Altivec instructions unless
+@option{-mabi=altivec} was used on the command line.
+
+@item cmpb
+@itemx no-cmpb
+@cindex @code{target("cmpb")} attribute
+Generate code that uses (does not use) the compare bytes instruction
+implemented on the POWER6 processor and other processors that support
+the PowerPC V2.05 architecture.
+
+@item dlmzb
+@itemx no-dlmzb
+@cindex @code{target("dlmzb")} attribute
+Generate code that uses (does not use) the string-search @samp{dlmzb}
+instruction on the IBM 405, 440, 464 and 476 processors.  This instruction is
+generated by default when targetting those processors.
+
+@item fprnd
+@itemx no-fprnd
+@cindex @code{target("fprnd")} attribute
+Generate code that uses (does not use) the FP round to integer
+instructions implemented on the POWER5+ processor and other processors
+that support the PowerPC V2.03 architecture.
+
+@item hard-dfp
+@itemx no-hard-dfp
+@cindex @code{target("hard-dfp")} attribute
+Generate code that uses (does not use) the decimal floating point
+instructions implemented on some POWER processors.
+
+@item isel
+@itemx no-isel
+@cindex @code{target("isel")} attribute
+Generate code that uses (does not use) ISEL instruction.
+
+@item mfcrf
+@itemx no-mfcrf
+@cindex @code{target("mfcrf")} attribute
+Generate code that uses (does not use) the move from condition
+register field instruction implemented on the POWER4 processor and
+other processors that support the PowerPC V2.01 architecture.
+
+@item mfpgpr
+@itemx no-mfpgpr
+@cindex @code{target("mfpgpr")} attribute
+Generate code that uses (does not use) the FP move to/from general
+purpose register instructions implemented on the POWER6X processor and
+other processors that support the extended PowerPC V2.05 architecture.
+
+@item mulhw
+@itemx no-mulhw
+@cindex @code{target("mulhw")} attribute
+Generate code that uses (does not use) the half-word multiply and
+multiply-accumulate instructions on the IBM 405, 440, 464 and 476 processors.
+These instructions are generated by default when targetting those
+processors.
+
+@item multiple
+@itemx no-multiple
+@cindex @code{target("multiple")} attribute
+Generate code that uses (does not use) the load multiple word
+instructions and the store multiple word instructions.
+
+@item update
+@itemx no-update
+@cindex @code{target("update")} attribute
+Generate code that uses (does not use) the load or store instructions
+that update the base register to the address of the calculated memory
+location.
+
+@item popcntb
+@itemx no-popcntb
+@cindex @code{target("popcntb")} attribute
+Generate code that uses (does not use) the popcount and double
+precision FP reciprocal estimate instruction implemented on the POWER5
+processor and other processors that support the PowerPC V2.02
+architecture.
+
+@item popcntd
+@itemx no-popcntd
+@cindex @code{target("popcntd")} attribute
+Generate code that uses (does not use) the popcount instruction
+implemented on the POWER7 processor and other processors that support
+the PowerPC V2.06 architecture.
+
+@item powerpc-gfxopt
+@itemx no-powerpc-gfxopt
+@cindex @code{target("powerpc-gfxopt")} attribute
+Generate code that uses (does not use) the optional PowerPC
+architecture instructions in the Graphics group, including
+floating-point select.
+
+@item powerpc-gpopt
+@itemx no-powerpc-gpopt
+@cindex @code{target("powerpc-gpopt")} attribute
+Generate code that uses (does not use) the optional PowerPC
+architecture instructions in the General Purpose group, including
+floating-point square root.
+
+@item recip-precision
+@itemx no-recip-precision
+@cindex @code{target("recip-precision")} attribute
+Assume (do not assume) that the reciprocal estimate instructions
+provide higher precision estimates than is mandated by the powerpc
+ABI.
+
+@item string
+@itemx no-string
+@cindex @code{target("string")} attribute
+Generate code that uses (does not use) the load string instructions
+and the store string word instructions to save multiple registers and
+do small block moves.
+
+@item vsx
+@itemx no-vsx
+@cindex @code{target("vsx")} attribute
+Generate code that uses (does not use) vector/scalar (VSX)
+instructions, and also enable the use of built-in functions that allow
+more direct access to the VSX instruction set.  In 32-bit code, you
+cannot enable VSX or Altivec instructions unless
+@option{-mabi=altivec} was used on the command line.
+
+@item friz
+@itemx no-friz
+@cindex @code{target("friz")} attribute
+Generate (do not generate) the @code{friz} instruction when the
+@option{-funsafe-math-optimizations} option is used to optimize
+rounding a floating point value to 64-bit integer and back to floating
+point.  The @code{friz} instruction does not return the same value if
+the floating point number is too large to fit in an integer.
+
+@item avoid-indexed-addresses
+@itemx no-avoid-indexed-addresses
+@cindex @code{target("avoid-indexed-addresses")} attribute
+Generate code that tries to avoid (not avoid) the use of indexed load
+or store instructions.
+
+@item paired
+@itemx no-paired
+@cindex @code{target("paired")} attribute
+Generate code that uses (does not use) the generation of PAIRED simd
+instructions.
+
+@item longcall
+@itemx no-longcall
+@cindex @code{target("longcall")} attribute
+Generate code that assumes (does not assume) that all calls are far
+away so that a longer more expensive calling sequence is required.
+
+@item cpu=@var{CPU}
+@cindex @code{target("cpu=@var{CPU}")} attribute
+Specify the architecture to generate code for when compiling the
+function.  If you select the @code{"target("cpu=power7)"} attribute when
+generating 32-bit code, VSX and Altivec instructions are not generated
+unless you use the @option{-mabi=altivec} option on the command line.
+
+@item tune=@var{TUNE}
+@cindex @code{target("tune=@var{TUNE}")} attribute
+Specify the architecture to tune for when compiling the function.  If
+you do not specify the @code{target("tune=@var{TUNE}")} attribute and
+you do specify the @code{target("cpu=@var{CPU}")} attribute,
+compilation will tune for the @var{CPU} architecture, and not the
+default tuning specified on the command line.
+@end table
+
+On the 386/x86_64 and PowerPC backends, you can use either multiple
+strings to specify multiple options, or you can separate the option
+with a comma (@code{,}).
+
+On the 386/x86_64 and PowerPC backends, the inliner will not inline a
+function that has different target options than the caller, unless the
+callee has a subset of the target options of the caller.  For example
+a function declared with @code{target("sse3")} can inline a function
+with @code{target("sse2")}, since @code{-msse3} implies @code{-msse2}.
+
+The @code{target} attribute is not implemented in GCC versions earlier
+than 4.4 for the i386/x86_64 and 4.6 for the PowerPC backends.  It is
+not currently implemented for other backends.
+
+@item tiny_data
+@cindex tiny data section on the H8/300H and H8S
+Use this attribute on the H8/300H and H8S to indicate that the specified
+variable should be placed into the tiny data section.
+The compiler will generate more efficient code for loads and stores
+on data in the tiny data section.  Note the tiny data area is limited to
+slightly under 32kbytes of data.
+
+@item trap_exit
+Use this attribute on the SH for an @code{interrupt_handler} to return using
+@code{trapa} instead of @code{rte}.  This attribute expects an integer
+argument specifying the trap number to be used.
+
+@item unused
+@cindex @code{unused} attribute.
+This attribute, attached to a function, means that the function is meant
+to be possibly unused.  GCC will not produce a warning for this
+function.
+
+@item used
+@cindex @code{used} attribute.
+This attribute, attached to a function, means that code must be emitted
+for the function even if it appears that the function is not referenced.
+This is useful, for example, when the function is referenced only in
+inline assembly.
+
+@item version_id
+@cindex @code{version_id} attribute
+This IA64 HP-UX attribute, attached to a global variable or function, renames a
+symbol to contain a version string, thus allowing for function level
+versioning.  HP-UX system header files may use version level functioning
+for some system calls.
+
+@smallexample
+extern int foo () __attribute__((version_id ("20040821")));
+@end smallexample
+
+Calls to @var{foo} will be mapped to calls to @var{foo@{20040821@}}.
+
+@item visibility ("@var{visibility_type}")
+@cindex @code{visibility} attribute
+This attribute affects the linkage of the declaration to which it is attached.
+There are four supported @var{visibility_type} values: default,
+hidden, protected or internal visibility.
+
+@smallexample
+void __attribute__ ((visibility ("protected")))
+f () @{ /* @r{Do something.} */; @}
+int i __attribute__ ((visibility ("hidden")));
+@end smallexample
+
+The possible values of @var{visibility_type} correspond to the
+visibility settings in the ELF gABI.
+
+@table @dfn
+@c keep this list of visibilities in alphabetical order.
+
+@item default
+Default visibility is the normal case for the object file format.
+This value is available for the visibility attribute to override other
+options that may change the assumed visibility of entities.
+
+On ELF, default visibility means that the declaration is visible to other
+modules and, in shared libraries, means that the declared entity may be
+overridden.
+
+On Darwin, default visibility means that the declaration is visible to
+other modules.
+
+Default visibility corresponds to ``external linkage'' in the language.
+
+@item hidden
+Hidden visibility indicates that the entity declared will have a new
+form of linkage, which we'll call ``hidden linkage''.  Two
+declarations of an object with hidden linkage refer to the same object
+if they are in the same shared object.
+
+@item internal
+Internal visibility is like hidden visibility, but with additional
+processor specific semantics.  Unless otherwise specified by the
+psABI, GCC defines internal visibility to mean that a function is
+@emph{never} called from another module.  Compare this with hidden
+functions which, while they cannot be referenced directly by other
+modules, can be referenced indirectly via function pointers.  By
+indicating that a function cannot be called from outside the module,
+GCC may for instance omit the load of a PIC register since it is known
+that the calling function loaded the correct value.
+
+@item protected
+Protected visibility is like default visibility except that it
+indicates that references within the defining module will bind to the
+definition in that module.  That is, the declared entity cannot be
+overridden by another module.
+
+@end table
+
+All visibilities are supported on many, but not all, ELF targets
+(supported when the assembler supports the @samp{.visibility}
+pseudo-op).  Default visibility is supported everywhere.  Hidden
+visibility is supported on Darwin targets.
+
+The visibility attribute should be applied only to declarations which
+would otherwise have external linkage.  The attribute should be applied
+consistently, so that the same entity should not be declared with
+different settings of the attribute.
+
+In C++, the visibility attribute applies to types as well as functions
+and objects, because in C++ types have linkage.  A class must not have
+greater visibility than its non-static data member types and bases,
+and class members default to the visibility of their class.  Also, a
+declaration without explicit visibility is limited to the visibility
+of its type.
+
+In C++, you can mark member functions and static member variables of a
+class with the visibility attribute.  This is useful if you know a
+particular method or static member variable should only be used from
+one shared object; then you can mark it hidden while the rest of the
+class has default visibility.  Care must be taken to avoid breaking
+the One Definition Rule; for example, it is usually not useful to mark
+an inline method as hidden without marking the whole class as hidden.
+
+A C++ namespace declaration can also have the visibility attribute.
+This attribute applies only to the particular namespace body, not to
+other definitions of the same namespace; it is equivalent to using
+@samp{#pragma GCC visibility} before and after the namespace
+definition (@pxref{Visibility Pragmas}).
+
+In C++, if a template argument has limited visibility, this
+restriction is implicitly propagated to the template instantiation.
+Otherwise, template instantiations and specializations default to the
+visibility of their template.
+
+If both the template and enclosing class have explicit visibility, the
+visibility from the template is used.
+
+@item vliw
+@cindex @code{vliw} attribute
+On MeP, the @code{vliw} attribute tells the compiler to emit
+instructions in VLIW mode instead of core mode.  Note that this
+attribute is not allowed unless a VLIW coprocessor has been configured
+and enabled through command line options.
+
+@item warn_unused_result
+@cindex @code{warn_unused_result} attribute
+The @code{warn_unused_result} attribute causes a warning to be emitted
+if a caller of the function with this attribute does not use its
+return value.  This is useful for functions where not checking
+the result is either a security problem or always a bug, such as
+@code{realloc}.
+
+@smallexample
+int fn () __attribute__ ((warn_unused_result));
+int foo ()
+@{
+  if (fn () < 0) return -1;
+  fn ();
+  return 0;
+@}
+@end smallexample
+
+results in warning on line 5.
+
+@item weak
+@cindex @code{weak} attribute
+The @code{weak} attribute causes the declaration to be emitted as a weak
+symbol rather than a global.  This is primarily useful in defining
+library functions which can be overridden in user code, though it can
+also be used with non-function declarations.  Weak symbols are supported
+for ELF targets, and also for a.out targets when using the GNU assembler
+and linker.
+
+@item weakref
+@itemx weakref ("@var{target}")
+@cindex @code{weakref} attribute
+The @code{weakref} attribute marks a declaration as a weak reference.
+Without arguments, it should be accompanied by an @code{alias} attribute
+naming the target symbol.  Optionally, the @var{target} may be given as
+an argument to @code{weakref} itself.  In either case, @code{weakref}
+implicitly marks the declaration as @code{weak}.  Without a
+@var{target}, given as an argument to @code{weakref} or to @code{alias},
+@code{weakref} is equivalent to @code{weak}.
+
+@smallexample
+static int x() __attribute__ ((weakref ("y")));
+/* is equivalent to... */
+static int x() __attribute__ ((weak, weakref, alias ("y")));
+/* and to... */
+static int x() __attribute__ ((weakref));
+static int x() __attribute__ ((alias ("y")));
+@end smallexample
+
+A weak reference is an alias that does not by itself require a
+definition to be given for the target symbol.  If the target symbol is
+only referenced through weak references, then it becomes a @code{weak}
+undefined symbol.  If it is directly referenced, however, then such
+strong references prevail, and a definition will be required for the
+symbol, not necessarily in the same translation unit.
+
+The effect is equivalent to moving all references to the alias to a
+separate translation unit, renaming the alias to the aliased symbol,
+declaring it as weak, compiling the two separate translation units and
+performing a reloadable link on them.
+
+At present, a declaration to which @code{weakref} is attached can
+only be @code{static}.
+
+@end table
+
+You can specify multiple attributes in a declaration by separating them
+by commas within the double parentheses or by immediately following an
+attribute declaration with another attribute declaration.
+
+@cindex @code{#pragma}, reason for not using
+@cindex pragma, reason for not using
+Some people object to the @code{__attribute__} feature, suggesting that
+ISO C's @code{#pragma} should be used instead.  At the time
+@code{__attribute__} was designed, there were two reasons for not doing
+this.
+
+@enumerate
+@item
+It is impossible to generate @code{#pragma} commands from a macro.
+
+@item
+There is no telling what the same @code{#pragma} might mean in another
+compiler.
+@end enumerate
+
+These two reasons applied to almost any application that might have been
+proposed for @code{#pragma}.  It was basically a mistake to use
+@code{#pragma} for @emph{anything}.
+
+The ISO C99 standard includes @code{_Pragma}, which now allows pragmas
+to be generated from macros.  In addition, a @code{#pragma GCC}
+namespace is now in use for GCC-specific pragmas.  However, it has been
+found convenient to use @code{__attribute__} to achieve a natural
+attachment of attributes to their corresponding declarations, whereas
+@code{#pragma GCC} is of use for constructs that do not naturally form
+part of the grammar.  @xref{Other Directives,,Miscellaneous
+Preprocessing Directives, cpp, The GNU C Preprocessor}.
+
+@node Attribute Syntax
+@section Attribute Syntax
+@cindex attribute syntax
+
+This section describes the syntax with which @code{__attribute__} may be
+used, and the constructs to which attribute specifiers bind, for the C
+language.  Some details may vary for C++ and Objective-C@.  Because of
+infelicities in the grammar for attributes, some forms described here
+may not be successfully parsed in all cases.
+
+There are some problems with the semantics of attributes in C++.  For
+example, there are no manglings for attributes, although they may affect
+code generation, so problems may arise when attributed types are used in
+conjunction with templates or overloading.  Similarly, @code{typeid}
+does not distinguish between types with different attributes.  Support
+for attributes in C++ may be restricted in future to attributes on
+declarations only, but not on nested declarators.
+
+@xref{Function Attributes}, for details of the semantics of attributes
+applying to functions.  @xref{Variable Attributes}, for details of the
+semantics of attributes applying to variables.  @xref{Type Attributes},
+for details of the semantics of attributes applying to structure, union
+and enumerated types.
+
+An @dfn{attribute specifier} is of the form
+@code{__attribute__ ((@var{attribute-list}))}.  An @dfn{attribute list}
+is a possibly empty comma-separated sequence of @dfn{attributes}, where
+each attribute is one of the following:
+
+@itemize @bullet
+@item
+Empty.  Empty attributes are ignored.
+
+@item
+A word (which may be an identifier such as @code{unused}, or a reserved
+word such as @code{const}).
+
+@item
+A word, followed by, in parentheses, parameters for the attribute.
+These parameters take one of the following forms:
+
+@itemize @bullet
+@item
+An identifier.  For example, @code{mode} attributes use this form.
+
+@item
+An identifier followed by a comma and a non-empty comma-separated list
+of expressions.  For example, @code{format} attributes use this form.
+
+@item
+A possibly empty comma-separated list of expressions.  For example,
+@code{format_arg} attributes use this form with the list being a single
+integer constant expression, and @code{alias} attributes use this form
+with the list being a single string constant.
+@end itemize
+@end itemize
+
+An @dfn{attribute specifier list} is a sequence of one or more attribute
+specifiers, not separated by any other tokens.
+
+In GNU C, an attribute specifier list may appear after the colon following a
+label, other than a @code{case} or @code{default} label.  The only
+attribute it makes sense to use after a label is @code{unused}.  This
+feature is intended for code generated by programs which contains labels
+that may be unused but which is compiled with @option{-Wall}.  It would
+not normally be appropriate to use in it human-written code, though it
+could be useful in cases where the code that jumps to the label is
+contained within an @code{#ifdef} conditional.  GNU C++ only permits
+attributes on labels if the attribute specifier is immediately
+followed by a semicolon (i.e., the label applies to an empty
+statement).  If the semicolon is missing, C++ label attributes are
+ambiguous, as it is permissible for a declaration, which could begin
+with an attribute list, to be labelled in C++.  Declarations cannot be
+labelled in C90 or C99, so the ambiguity does not arise there.
+
+An attribute specifier list may appear as part of a @code{struct},
+@code{union} or @code{enum} specifier.  It may go either immediately
+after the @code{struct}, @code{union} or @code{enum} keyword, or after
+the closing brace.  The former syntax is preferred.
+Where attribute specifiers follow the closing brace, they are considered
+to relate to the structure, union or enumerated type defined, not to any
+enclosing declaration the type specifier appears in, and the type
+defined is not complete until after the attribute specifiers.
+@c Otherwise, there would be the following problems: a shift/reduce
+@c conflict between attributes binding the struct/union/enum and
+@c binding to the list of specifiers/qualifiers; and "aligned"
+@c attributes could use sizeof for the structure, but the size could be
+@c changed later by "packed" attributes.
+
+Otherwise, an attribute specifier appears as part of a declaration,
+counting declarations of unnamed parameters and type names, and relates
+to that declaration (which may be nested in another declaration, for
+example in the case of a parameter declaration), or to a particular declarator
+within a declaration.  Where an
+attribute specifier is applied to a parameter declared as a function or
+an array, it should apply to the function or array rather than the
+pointer to which the parameter is implicitly converted, but this is not
+yet correctly implemented.
+
+Any list of specifiers and qualifiers at the start of a declaration may
+contain attribute specifiers, whether or not such a list may in that
+context contain storage class specifiers.  (Some attributes, however,
+are essentially in the nature of storage class specifiers, and only make
+sense where storage class specifiers may be used; for example,
+@code{section}.)  There is one necessary limitation to this syntax: the
+first old-style parameter declaration in a function definition cannot
+begin with an attribute specifier, because such an attribute applies to
+the function instead by syntax described below (which, however, is not
+yet implemented in this case).  In some other cases, attribute
+specifiers are permitted by this grammar but not yet supported by the
+compiler.  All attribute specifiers in this place relate to the
+declaration as a whole.  In the obsolescent usage where a type of
+@code{int} is implied by the absence of type specifiers, such a list of
+specifiers and qualifiers may be an attribute specifier list with no
+other specifiers or qualifiers.
+
+At present, the first parameter in a function prototype must have some
+type specifier which is not an attribute specifier; this resolves an
+ambiguity in the interpretation of @code{void f(int
+(__attribute__((foo)) x))}, but is subject to change.  At present, if
+the parentheses of a function declarator contain only attributes then
+those attributes are ignored, rather than yielding an error or warning
+or implying a single parameter of type int, but this is subject to
+change.
+
+An attribute specifier list may appear immediately before a declarator
+(other than the first) in a comma-separated list of declarators in a
+declaration of more than one identifier using a single list of
+specifiers and qualifiers.  Such attribute specifiers apply
+only to the identifier before whose declarator they appear.  For
+example, in
+
+@smallexample
+__attribute__((noreturn)) void d0 (void),
+    __attribute__((format(printf, 1, 2))) d1 (const char *, ...),
+     d2 (void)
+@end smallexample
+
+@noindent
+the @code{noreturn} attribute applies to all the functions
+declared; the @code{format} attribute only applies to @code{d1}.
+
+An attribute specifier list may appear immediately before the comma,
+@code{=} or semicolon terminating the declaration of an identifier other
+than a function definition.  Such attribute specifiers apply
+to the declared object or function.  Where an
+assembler name for an object or function is specified (@pxref{Asm
+Labels}), the attribute must follow the @code{asm}
+specification.
+
+An attribute specifier list may, in future, be permitted to appear after
+the declarator in a function definition (before any old-style parameter
+declarations or the function body).
+
+Attribute specifiers may be mixed with type qualifiers appearing inside
+the @code{[]} of a parameter array declarator, in the C99 construct by
+which such qualifiers are applied to the pointer to which the array is
+implicitly converted.  Such attribute specifiers apply to the pointer,
+not to the array, but at present this is not implemented and they are
+ignored.
+
+An attribute specifier list may appear at the start of a nested
+declarator.  At present, there are some limitations in this usage: the
+attributes correctly apply to the declarator, but for most individual
+attributes the semantics this implies are not implemented.
+When attribute specifiers follow the @code{*} of a pointer
+declarator, they may be mixed with any type qualifiers present.
+The following describes the formal semantics of this syntax.  It will make the
+most sense if you are familiar with the formal specification of
+declarators in the ISO C standard.
+
+Consider (as in C99 subclause 6.7.5 paragraph 4) a declaration @code{T
+D1}, where @code{T} contains declaration specifiers that specify a type
+@var{Type} (such as @code{int}) and @code{D1} is a declarator that
+contains an identifier @var{ident}.  The type specified for @var{ident}
+for derived declarators whose type does not include an attribute
+specifier is as in the ISO C standard.
+
+If @code{D1} has the form @code{( @var{attribute-specifier-list} D )},
+and the declaration @code{T D} specifies the type
+``@var{derived-declarator-type-list} @var{Type}'' for @var{ident}, then
+@code{T D1} specifies the type ``@var{derived-declarator-type-list}
+@var{attribute-specifier-list} @var{Type}'' for @var{ident}.
+
+If @code{D1} has the form @code{*
+@var{type-qualifier-and-attribute-specifier-list} D}, and the
+declaration @code{T D} specifies the type
+``@var{derived-declarator-type-list} @var{Type}'' for @var{ident}, then
+@code{T D1} specifies the type ``@var{derived-declarator-type-list}
+@var{type-qualifier-and-attribute-specifier-list} pointer to @var{Type}'' for
+@var{ident}.
+
+For example,
+
+@smallexample
+void (__attribute__((noreturn)) ****f) (void);
+@end smallexample
+
+@noindent
+specifies the type ``pointer to pointer to pointer to pointer to
+non-returning function returning @code{void}''.  As another example,
+
+@smallexample
+char *__attribute__((aligned(8))) *f;
+@end smallexample
+
+@noindent
+specifies the type ``pointer to 8-byte-aligned pointer to @code{char}''.
+Note again that this does not work with most attributes; for example,
+the usage of @samp{aligned} and @samp{noreturn} attributes given above
+is not yet supported.
+
+For compatibility with existing code written for compiler versions that
+did not implement attributes on nested declarators, some laxity is
+allowed in the placing of attributes.  If an attribute that only applies
+to types is applied to a declaration, it will be treated as applying to
+the type of that declaration.  If an attribute that only applies to
+declarations is applied to the type of a declaration, it will be treated
+as applying to that declaration; and, for compatibility with code
+placing the attributes immediately before the identifier declared, such
+an attribute applied to a function return type will be treated as
+applying to the function type, and such an attribute applied to an array
+element type will be treated as applying to the array type.  If an
+attribute that only applies to function types is applied to a
+pointer-to-function type, it will be treated as applying to the pointer
+target type; if such an attribute is applied to a function return type
+that is not a pointer-to-function type, it will be treated as applying
+to the function type.
+
+@node Function Prototypes
+@section Prototypes and Old-Style Function Definitions
+@cindex function prototype declarations
+@cindex old-style function definitions
+@cindex promotion of formal parameters
+
+GNU C extends ISO C to allow a function prototype to override a later
+old-style non-prototype definition.  Consider the following example:
+
+@smallexample
+/* @r{Use prototypes unless the compiler is old-fashioned.}  */
+#ifdef __STDC__
+#define P(x) x
+#else
+#define P(x) ()
+#endif
+
+/* @r{Prototype function declaration.}  */
+int isroot P((uid_t));
+
+/* @r{Old-style function definition.}  */
+int
+isroot (x)   /* @r{??? lossage here ???} */
+     uid_t x;
+@{
+  return x == 0;
+@}
+@end smallexample
+
+Suppose the type @code{uid_t} happens to be @code{short}.  ISO C does
+not allow this example, because subword arguments in old-style
+non-prototype definitions are promoted.  Therefore in this example the
+function definition's argument is really an @code{int}, which does not
+match the prototype argument type of @code{short}.
+
+This restriction of ISO C makes it hard to write code that is portable
+to traditional C compilers, because the programmer does not know
+whether the @code{uid_t} type is @code{short}, @code{int}, or
+@code{long}.  Therefore, in cases like these GNU C allows a prototype
+to override a later old-style definition.  More precisely, in GNU C, a
+function prototype argument type overrides the argument type specified
+by a later old-style definition if the former type is the same as the
+latter type before promotion.  Thus in GNU C the above example is
+equivalent to the following:
+
+@smallexample
+int isroot (uid_t);
+
+int
+isroot (uid_t x)
+@{
+  return x == 0;
+@}
+@end smallexample
+
+@noindent
+GNU C++ does not support old-style function definitions, so this
+extension is irrelevant.
+
+@node C++ Comments
+@section C++ Style Comments
+@cindex @code{//}
+@cindex C++ comments
+@cindex comments, C++ style
+
+In GNU C, you may use C++ style comments, which start with @samp{//} and
+continue until the end of the line.  Many other C implementations allow
+such comments, and they are included in the 1999 C standard.  However,
+C++ style comments are not recognized if you specify an @option{-std}
+option specifying a version of ISO C before C99, or @option{-ansi}
+(equivalent to @option{-std=c90}).
+
+@node Dollar Signs
+@section Dollar Signs in Identifier Names
+@cindex $
+@cindex dollar signs in identifier names
+@cindex identifier names, dollar signs in
+
+In GNU C, you may normally use dollar signs in identifier names.
+This is because many traditional C implementations allow such identifiers.
+However, dollar signs in identifiers are not supported on a few target
+machines, typically because the target assembler does not allow them.
+
+@node Character Escapes
+@section The Character @key{ESC} in Constants
+
+You can use the sequence @samp{\e} in a string or character constant to
+stand for the ASCII character @key{ESC}.
+
+@node Variable Attributes
+@section Specifying Attributes of Variables
+@cindex attribute of variables
+@cindex variable attributes
+
+The keyword @code{__attribute__} allows you to specify special
+attributes of variables or structure fields.  This keyword is followed
+by an attribute specification inside double parentheses.  Some
+attributes are currently defined generically for variables.
+Other attributes are defined for variables on particular target
+systems.  Other attributes are available for functions
+(@pxref{Function Attributes}) and for types (@pxref{Type Attributes}).
+Other front ends might define more attributes
+(@pxref{C++ Extensions,,Extensions to the C++ Language}).
+
+You may also specify attributes with @samp{__} preceding and following
+each keyword.  This allows you to use them in header files without
+being concerned about a possible macro of the same name.  For example,
+you may use @code{__aligned__} instead of @code{aligned}.
+
+@xref{Attribute Syntax}, for details of the exact syntax for using
+attributes.
+
+@table @code
+@cindex @code{aligned} attribute
+@item aligned (@var{alignment})
+This attribute specifies a minimum alignment for the variable or
+structure field, measured in bytes.  For example, the declaration:
+
+@smallexample
+int x __attribute__ ((aligned (16))) = 0;
+@end smallexample
+
+@noindent
+causes the compiler to allocate the global variable @code{x} on a
+16-byte boundary.  On a 68040, this could be used in conjunction with
+an @code{asm} expression to access the @code{move16} instruction which
+requires 16-byte aligned operands.
+
+You can also specify the alignment of structure fields.  For example, to
+create a double-word aligned @code{int} pair, you could write:
+
+@smallexample
+struct foo @{ int x[2] __attribute__ ((aligned (8))); @};
+@end smallexample
+
+@noindent
+This is an alternative to creating a union with a @code{double} member
+that forces the union to be double-word aligned.
+
+As in the preceding examples, you can explicitly specify the alignment
+(in bytes) that you wish the compiler to use for a given variable or
+structure field.  Alternatively, you can leave out the alignment factor
+and just ask the compiler to align a variable or field to the
+default alignment for the target architecture you are compiling for.
+The default alignment is sufficient for all scalar types, but may not be
+enough for all vector types on a target which supports vector operations.
+The default alignment is fixed for a particular target ABI.
+
+Gcc also provides a target specific macro @code{__BIGGEST_ALIGNMENT__},
+which is the largest alignment ever used for any data type on the
+target machine you are compiling for.  For example, you could write:
+
+@smallexample
+short array[3] __attribute__ ((aligned (__BIGGEST_ALIGNMENT__)));
+@end smallexample
+
+The compiler automatically sets the alignment for the declared
+variable or field to @code{__BIGGEST_ALIGNMENT__}.  Doing this can
+often make copy operations more efficient, because the compiler can
+use whatever instructions copy the biggest chunks of memory when
+performing copies to or from the variables or fields that you have
+aligned this way.  Note that the value of @code{__BIGGEST_ALIGNMENT__}
+may change depending on command line options.
+
+When used on a struct, or struct member, the @code{aligned} attribute can
+only increase the alignment; in order to decrease it, the @code{packed}
+attribute must be specified as well.  When used as part of a typedef, the
+@code{aligned} attribute can both increase and decrease alignment, and
+specifying the @code{packed} attribute will generate a warning.
+
+Note that the effectiveness of @code{aligned} attributes may be limited
+by inherent limitations in your linker.  On many systems, the linker is
+only able to arrange for variables to be aligned up to a certain maximum
+alignment.  (For some linkers, the maximum supported alignment may
+be very very small.)  If your linker is only able to align variables
+up to a maximum of 8 byte alignment, then specifying @code{aligned(16)}
+in an @code{__attribute__} will still only provide you with 8 byte
+alignment.  See your linker documentation for further information.
+
+The @code{aligned} attribute can also be used for functions 
+(@pxref{Function Attributes}.)
+
+@item cleanup (@var{cleanup_function})
+@cindex @code{cleanup} attribute
+The @code{cleanup} attribute runs a function when the variable goes
+out of scope.  This attribute can only be applied to auto function
+scope variables; it may not be applied to parameters or variables
+with static storage duration.  The function must take one parameter,
+a pointer to a type compatible with the variable.  The return value
+of the function (if any) is ignored.
+
+If @option{-fexceptions} is enabled, then @var{cleanup_function}
+will be run during the stack unwinding that happens during the
+processing of the exception.  Note that the @code{cleanup} attribute
+does not allow the exception to be caught, only to perform an action.
+It is undefined what happens if @var{cleanup_function} does not
+return normally.
+
+@item common
+@itemx nocommon
+@cindex @code{common} attribute
+@cindex @code{nocommon} attribute
+@opindex fcommon
+@opindex fno-common
+The @code{common} attribute requests GCC to place a variable in
+``common'' storage.  The @code{nocommon} attribute requests the
+opposite---to allocate space for it directly.
+
+These attributes override the default chosen by the
+@option{-fno-common} and @option{-fcommon} flags respectively.
+
+@item deprecated
+@itemx deprecated (@var{msg})
+@cindex @code{deprecated} attribute
+The @code{deprecated} attribute results in a warning if the variable
+is used anywhere in the source file.  This is useful when identifying
+variables that are expected to be removed in a future version of a
+program.  The warning also includes the location of the declaration
+of the deprecated variable, to enable users to easily find further
+information about why the variable is deprecated, or what they should
+do instead.  Note that the warning only occurs for uses:
+
+@smallexample
+extern int old_var __attribute__ ((deprecated));
+extern int old_var;
+int new_fn () @{ return old_var; @}
+@end smallexample
+
+results in a warning on line 3 but not line 2.  The optional msg
+argument, which must be a string, will be printed in the warning if
+present.
+
+The @code{deprecated} attribute can also be used for functions and
+types (@pxref{Function Attributes}, @pxref{Type Attributes}.)
+
+@item mode (@var{mode})
+@cindex @code{mode} attribute
+This attribute specifies the data type for the declaration---whichever
+type corresponds to the mode @var{mode}.  This in effect lets you
+request an integer or floating point type according to its width.
+
+You may also specify a mode of @samp{byte} or @samp{__byte__} to
+indicate the mode corresponding to a one-byte integer, @samp{word} or
+@samp{__word__} for the mode of a one-word integer, and @samp{pointer}
+or @samp{__pointer__} for the mode used to represent pointers.
+
+@item packed
+@cindex @code{packed} attribute
+The @code{packed} attribute specifies that a variable or structure field
+should have the smallest possible alignment---one byte for a variable,
+and one bit for a field, unless you specify a larger value with the
+@code{aligned} attribute.
+
+Here is a structure in which the field @code{x} is packed, so that it
+immediately follows @code{a}:
+
+@smallexample
+struct foo
+@{
+  char a;
+  int x[2] __attribute__ ((packed));
+@};
+@end smallexample
+
+@emph{Note:} The 4.1, 4.2 and 4.3 series of GCC ignore the
+@code{packed} attribute on bit-fields of type @code{char}.  This has
+been fixed in GCC 4.4 but the change can lead to differences in the
+structure layout.  See the documentation of
+@option{-Wpacked-bitfield-compat} for more information.
+
+@item section ("@var{section-name}")
+@cindex @code{section} variable attribute
+Normally, the compiler places the objects it generates in sections like
+@code{data} and @code{bss}.  Sometimes, however, you need additional sections,
+or you need certain particular variables to appear in special sections,
+for example to map to special hardware.  The @code{section}
+attribute specifies that a variable (or function) lives in a particular
+section.  For example, this small program uses several specific section names:
+
+@smallexample
+struct duart a __attribute__ ((section ("DUART_A"))) = @{ 0 @};
+struct duart b __attribute__ ((section ("DUART_B"))) = @{ 0 @};
+char stack[10000] __attribute__ ((section ("STACK"))) = @{ 0 @};
+int init_data __attribute__ ((section ("INITDATA")));
+
+main()
+@{
+  /* @r{Initialize stack pointer} */
+  init_sp (stack + sizeof (stack));
+
+  /* @r{Initialize initialized data} */
+  memcpy (&init_data, &data, &edata - &data);
+
+  /* @r{Turn on the serial ports} */
+  init_duart (&a);
+  init_duart (&b);
+@}
+@end smallexample
+
+@noindent
+Use the @code{section} attribute with
+@emph{global} variables and not @emph{local} variables,
+as shown in the example.
+
+You may use the @code{section} attribute with initialized or
+uninitialized global variables but the linker requires
+each object be defined once, with the exception that uninitialized
+variables tentatively go in the @code{common} (or @code{bss}) section
+and can be multiply ``defined''.  Using the @code{section} attribute
+will change what section the variable goes into and may cause the
+linker to issue an error if an uninitialized variable has multiple
+definitions.  You can force a variable to be initialized with the
+@option{-fno-common} flag or the @code{nocommon} attribute.
+
+Some file formats do not support arbitrary sections so the @code{section}
+attribute is not available on all platforms.
+If you need to map the entire contents of a module to a particular
+section, consider using the facilities of the linker instead.
+
+@item shared
+@cindex @code{shared} variable attribute
+On Microsoft Windows, in addition to putting variable definitions in a named
+section, the section can also be shared among all running copies of an
+executable or DLL@.  For example, this small program defines shared data
+by putting it in a named section @code{shared} and marking the section
+shareable:
+
+@smallexample
+int foo __attribute__((section ("shared"), shared)) = 0;
+
+int
+main()
+@{
+  /* @r{Read and write foo.  All running
+     copies see the same value.}  */
+  return 0;
+@}
+@end smallexample
+
+@noindent
+You may only use the @code{shared} attribute along with @code{section}
+attribute with a fully initialized global definition because of the way
+linkers work.  See @code{section} attribute for more information.
+
+The @code{shared} attribute is only available on Microsoft Windows@.
+
+@item tls_model ("@var{tls_model}")
+@cindex @code{tls_model} attribute
+The @code{tls_model} attribute sets thread-local storage model
+(@pxref{Thread-Local}) of a particular @code{__thread} variable,
+overriding @option{-ftls-model=} command-line switch on a per-variable
+basis.
+The @var{tls_model} argument should be one of @code{global-dynamic},
+@code{local-dynamic}, @code{initial-exec} or @code{local-exec}.
+
+Not all targets support this attribute.
+
+@item unused
+This attribute, attached to a variable, means that the variable is meant
+to be possibly unused.  GCC will not produce a warning for this
+variable.
+
+@item used
+This attribute, attached to a variable, means that the variable must be
+emitted even if it appears that the variable is not referenced.
+
+@item vector_size (@var{bytes})
+This attribute specifies the vector size for the variable, measured in
+bytes.  For example, the declaration:
+
+@smallexample
+int foo __attribute__ ((vector_size (16)));
+@end smallexample
+
+@noindent
+causes the compiler to set the mode for @code{foo}, to be 16 bytes,
+divided into @code{int} sized units.  Assuming a 32-bit int (a vector of
+4 units of 4 bytes), the corresponding mode of @code{foo} will be V4SI@.
+
+This attribute is only applicable to integral and float scalars,
+although arrays, pointers, and function return values are allowed in
+conjunction with this construct.
+
+Aggregates with this attribute are invalid, even if they are of the same
+size as a corresponding scalar.  For example, the declaration:
+
+@smallexample
+struct S @{ int a; @};
+struct S  __attribute__ ((vector_size (16))) foo;
+@end smallexample
+
+@noindent
+is invalid even if the size of the structure is the same as the size of
+the @code{int}.
+
+@item selectany
+The @code{selectany} attribute causes an initialized global variable to
+have link-once semantics.  When multiple definitions of the variable are
+encountered by the linker, the first is selected and the remainder are
+discarded.  Following usage by the Microsoft compiler, the linker is told
+@emph{not} to warn about size or content differences of the multiple
+definitions.
+
+Although the primary usage of this attribute is for POD types, the
+attribute can also be applied to global C++ objects that are initialized
+by a constructor.  In this case, the static initialization and destruction
+code for the object is emitted in each translation defining the object,
+but the calls to the constructor and destructor are protected by a
+link-once guard variable.
+
+The @code{selectany} attribute is only available on Microsoft Windows
+targets.  You can use @code{__declspec (selectany)} as a synonym for
+@code{__attribute__ ((selectany))} for compatibility with other
+compilers.
+
+@item weak
+The @code{weak} attribute is described in @ref{Function Attributes}.
+
+@item dllimport
+The @code{dllimport} attribute is described in @ref{Function Attributes}.
+
+@item dllexport
+The @code{dllexport} attribute is described in @ref{Function Attributes}.
+
+@end table
+
+@subsection AVR Variable Attributes
+
+@table @code
+@item progmem
+@cindex @code{progmem} AVR variable attribute
+The @code{progmem} attribute is used on the AVR to place data in the program
+memory address space (flash). This is accomplished by putting
+respective variables into a section whose name starts with @code{.progmem}.
+
+AVR is a Harvard architecture processor and data and reas only data
+normally resides in the data memory address space (RAM).
+@end table
+
+@subsection Blackfin Variable Attributes
+
+Three attributes are currently defined for the Blackfin.
+
+@table @code
+@item l1_data
+@itemx l1_data_A
+@itemx l1_data_B
+@cindex @code{l1_data} variable attribute
+@cindex @code{l1_data_A} variable attribute
+@cindex @code{l1_data_B} variable attribute
+Use these attributes on the Blackfin to place the variable into L1 Data SRAM.
+Variables with @code{l1_data} attribute will be put into the specific section
+named @code{.l1.data}. Those with @code{l1_data_A} attribute will be put into
+the specific section named @code{.l1.data.A}. Those with @code{l1_data_B}
+attribute will be put into the specific section named @code{.l1.data.B}.
+
+@item l2
+@cindex @code{l2} variable attribute
+Use this attribute on the Blackfin to place the variable into L2 SRAM.
+Variables with @code{l2} attribute will be put into the specific section
+named @code{.l2.data}.
+@end table
+
+@subsection M32R/D Variable Attributes
+
+One attribute is currently defined for the M32R/D@.
+
+@table @code
+@item model (@var{model-name})
+@cindex variable addressability on the M32R/D
+Use this attribute on the M32R/D to set the addressability of an object.
+The identifier @var{model-name} is one of @code{small}, @code{medium},
+or @code{large}, representing each of the code models.
+
+Small model objects live in the lower 16MB of memory (so that their
+addresses can be loaded with the @code{ld24} instruction).
+
+Medium and large model objects may live anywhere in the 32-bit address space
+(the compiler will generate @code{seth/add3} instructions to load their
+addresses).
+@end table
+
+@anchor{MeP Variable Attributes}
+@subsection MeP Variable Attributes
+
+The MeP target has a number of addressing modes and busses.  The
+@code{near} space spans the standard memory space's first 16 megabytes
+(24 bits).  The @code{far} space spans the entire 32-bit memory space.
+The @code{based} space is a 128 byte region in the memory space which
+is addressed relative to the @code{$tp} register.  The @code{tiny}
+space is a 65536 byte region relative to the @code{$gp} register.  In
+addition to these memory regions, the MeP target has a separate 16-bit
+control bus which is specified with @code{cb} attributes.
+
+@table @code
+
+@item based
+Any variable with the @code{based} attribute will be assigned to the
+@code{.based} section, and will be accessed with relative to the
+@code{$tp} register.
+
+@item tiny
+Likewise, the @code{tiny} attribute assigned variables to the
+@code{.tiny} section, relative to the @code{$gp} register.
+
+@item near
+Variables with the @code{near} attribute are assumed to have addresses
+that fit in a 24-bit addressing mode.  This is the default for large
+variables (@code{-mtiny=4} is the default) but this attribute can
+override @code{-mtiny=} for small variables, or override @code{-ml}.
+
+@item far
+Variables with the @code{far} attribute are addressed using a full
+32-bit address.  Since this covers the entire memory space, this
+allows modules to make no assumptions about where variables might be
+stored.
+
+@item io
+@itemx io (@var{addr})
+Variables with the @code{io} attribute are used to address
+memory-mapped peripherals.  If an address is specified, the variable
+is assigned that address, else it is not assigned an address (it is
+assumed some other module will assign an address).  Example:
+
+@example
+int timer_count __attribute__((io(0x123)));
+@end example
+
+@item cb
+@itemx cb (@var{addr})
+Variables with the @code{cb} attribute are used to access the control
+bus, using special instructions.  @code{addr} indicates the control bus
+address.  Example:
+
+@example
+int cpu_clock __attribute__((cb(0x123)));
+@end example
+
+@end table
+
+@anchor{i386 Variable Attributes}
+@subsection i386 Variable Attributes
+
+Two attributes are currently defined for i386 configurations:
+@code{ms_struct} and @code{gcc_struct}
+
+@table @code
+@item ms_struct
+@itemx gcc_struct
+@cindex @code{ms_struct} attribute
+@cindex @code{gcc_struct} attribute
+
+If @code{packed} is used on a structure, or if bit-fields are used
+it may be that the Microsoft ABI packs them differently
+than GCC would normally pack them.  Particularly when moving packed
+data between functions compiled with GCC and the native Microsoft compiler
+(either via function call or as data in a file), it may be necessary to access
+either format.
+
+Currently @option{-m[no-]ms-bitfields} is provided for the Microsoft Windows X86
+compilers to match the native Microsoft compiler.
+
+The Microsoft structure layout algorithm is fairly simple with the exception
+of the bitfield packing:
+
+The padding and alignment of members of structures and whether a bit field
+can straddle a storage-unit boundary
+
+@enumerate
+@item Structure members are stored sequentially in the order in which they are
+declared: the first member has the lowest memory address and the last member
+the highest.
+
+@item Every data object has an alignment-requirement. The alignment-requirement
+for all data except structures, unions, and arrays is either the size of the
+object or the current packing size (specified with either the aligned attribute
+or the pack pragma), whichever is less. For structures,  unions, and arrays,
+the alignment-requirement is the largest alignment-requirement of its members.
+Every object is allocated an offset so that:
+
+offset %  alignment-requirement == 0
+
+@item Adjacent bit fields are packed into the same 1-, 2-, or 4-byte allocation
+unit if the integral types are the same size and if the next bit field fits
+into the current allocation unit without crossing the boundary imposed by the
+common alignment requirements of the bit fields.
+@end enumerate
+
+Handling of zero-length bitfields:
+
+MSVC interprets zero-length bitfields in the following ways:
+
+@enumerate
+@item If a zero-length bitfield is inserted between two bitfields that would
+normally be coalesced, the bitfields will not be coalesced.
+
+For example:
+
+@smallexample
+struct
+ @{
+   unsigned long bf_1 : 12;
+   unsigned long : 0;
+   unsigned long bf_2 : 12;
+ @} t1;
+@end smallexample
+
+The size of @code{t1} would be 8 bytes with the zero-length bitfield.  If the
+zero-length bitfield were removed, @code{t1}'s size would be 4 bytes.
+
+@item If a zero-length bitfield is inserted after a bitfield, @code{foo}, and the
+alignment of the zero-length bitfield is greater than the member that follows it,
+@code{bar}, @code{bar} will be aligned as the type of the zero-length bitfield.
+
+For example:
+
+@smallexample
+struct
+ @{
+   char foo : 4;
+   short : 0;
+   char bar;
+ @} t2;
+
+struct
+ @{
+   char foo : 4;
+   short : 0;
+   double bar;
+ @} t3;
+@end smallexample
+
+For @code{t2}, @code{bar} will be placed at offset 2, rather than offset 1.
+Accordingly, the size of @code{t2} will be 4.  For @code{t3}, the zero-length
+bitfield will not affect the alignment of @code{bar} or, as a result, the size
+of the structure.
+
+Taking this into account, it is important to note the following:
+
+@enumerate
+@item If a zero-length bitfield follows a normal bitfield, the type of the
+zero-length bitfield may affect the alignment of the structure as whole. For
+example, @code{t2} has a size of 4 bytes, since the zero-length bitfield follows a
+normal bitfield, and is of type short.
+
+@item Even if a zero-length bitfield is not followed by a normal bitfield, it may
+still affect the alignment of the structure:
+
+@smallexample
+struct
+ @{
+   char foo : 6;
+   long : 0;
+ @} t4;
+@end smallexample
+
+Here, @code{t4} will take up 4 bytes.
+@end enumerate
+
+@item Zero-length bitfields following non-bitfield members are ignored:
+
+@smallexample
+struct
+ @{
+   char foo;
+   long : 0;
+   char bar;
+ @} t5;
+@end smallexample
+
+Here, @code{t5} will take up 2 bytes.
+@end enumerate
+@end table
+
+@subsection PowerPC Variable Attributes
+
+Three attributes currently are defined for PowerPC configurations:
+@code{altivec}, @code{ms_struct} and @code{gcc_struct}.
+
+For full documentation of the struct attributes please see the
+documentation in @ref{i386 Variable Attributes}.
+
+For documentation of @code{altivec} attribute please see the
+documentation in @ref{PowerPC Type Attributes}.
+
+@subsection SPU Variable Attributes
+
+The SPU supports the @code{spu_vector} attribute for variables.  For
+documentation of this attribute please see the documentation in
+@ref{SPU Type Attributes}.
+
+@subsection Xstormy16 Variable Attributes
+
+One attribute is currently defined for xstormy16 configurations:
+@code{below100}.
+
+@table @code
+@item below100
+@cindex @code{below100} attribute
+
+If a variable has the @code{below100} attribute (@code{BELOW100} is
+allowed also), GCC will place the variable in the first 0x100 bytes of
+memory and use special opcodes to access it.  Such variables will be
+placed in either the @code{.bss_below100} section or the
+@code{.data_below100} section.
+
+@end table
+
+@node Type Attributes
+@section Specifying Attributes of Types
+@cindex attribute of types
+@cindex type attributes
+
+The keyword @code{__attribute__} allows you to specify special
+attributes of @code{struct} and @code{union} types when you define
+such types.  This keyword is followed by an attribute specification
+inside double parentheses.  Seven attributes are currently defined for
+types: @code{aligned}, @code{packed}, @code{transparent_union},
+@code{unused}, @code{deprecated}, @code{visibility}, and
+@code{may_alias}.  Other attributes are defined for functions
+(@pxref{Function Attributes}) and for variables (@pxref{Variable
+Attributes}).
+
+You may also specify any one of these attributes with @samp{__}
+preceding and following its keyword.  This allows you to use these
+attributes in header files without being concerned about a possible
+macro of the same name.  For example, you may use @code{__aligned__}
+instead of @code{aligned}.
+
+You may specify type attributes in an enum, struct or union type
+declaration or definition, or for other types in a @code{typedef}
+declaration.
+
+For an enum, struct or union type, you may specify attributes either
+between the enum, struct or union tag and the name of the type, or
+just past the closing curly brace of the @emph{definition}.  The
+former syntax is preferred.
+
+@xref{Attribute Syntax}, for details of the exact syntax for using
+attributes.
+
+@table @code
+@cindex @code{aligned} attribute
+@item aligned (@var{alignment})
+This attribute specifies a minimum alignment (in bytes) for variables
+of the specified type.  For example, the declarations:
+
+@smallexample
+struct S @{ short f[3]; @} __attribute__ ((aligned (8)));
+typedef int more_aligned_int __attribute__ ((aligned (8)));
+@end smallexample
+
+@noindent
+force the compiler to insure (as far as it can) that each variable whose
+type is @code{struct S} or @code{more_aligned_int} will be allocated and
+aligned @emph{at least} on a 8-byte boundary.  On a SPARC, having all
+variables of type @code{struct S} aligned to 8-byte boundaries allows
+the compiler to use the @code{ldd} and @code{std} (doubleword load and
+store) instructions when copying one variable of type @code{struct S} to
+another, thus improving run-time efficiency.
+
+Note that the alignment of any given @code{struct} or @code{union} type
+is required by the ISO C standard to be at least a perfect multiple of
+the lowest common multiple of the alignments of all of the members of
+the @code{struct} or @code{union} in question.  This means that you @emph{can}
+effectively adjust the alignment of a @code{struct} or @code{union}
+type by attaching an @code{aligned} attribute to any one of the members
+of such a type, but the notation illustrated in the example above is a
+more obvious, intuitive, and readable way to request the compiler to
+adjust the alignment of an entire @code{struct} or @code{union} type.
+
+As in the preceding example, you can explicitly specify the alignment
+(in bytes) that you wish the compiler to use for a given @code{struct}
+or @code{union} type.  Alternatively, you can leave out the alignment factor
+and just ask the compiler to align a type to the maximum
+useful alignment for the target machine you are compiling for.  For
+example, you could write:
+
+@smallexample
+struct S @{ short f[3]; @} __attribute__ ((aligned));
+@end smallexample
+
+Whenever you leave out the alignment factor in an @code{aligned}
+attribute specification, the compiler automatically sets the alignment
+for the type to the largest alignment which is ever used for any data
+type on the target machine you are compiling for.  Doing this can often
+make copy operations more efficient, because the compiler can use
+whatever instructions copy the biggest chunks of memory when performing
+copies to or from the variables which have types that you have aligned
+this way.
+
+In the example above, if the size of each @code{short} is 2 bytes, then
+the size of the entire @code{struct S} type is 6 bytes.  The smallest
+power of two which is greater than or equal to that is 8, so the
+compiler sets the alignment for the entire @code{struct S} type to 8
+bytes.
+
+Note that although you can ask the compiler to select a time-efficient
+alignment for a given type and then declare only individual stand-alone
+objects of that type, the compiler's ability to select a time-efficient
+alignment is primarily useful only when you plan to create arrays of
+variables having the relevant (efficiently aligned) type.  If you
+declare or use arrays of variables of an efficiently-aligned type, then
+it is likely that your program will also be doing pointer arithmetic (or
+subscripting, which amounts to the same thing) on pointers to the
+relevant type, and the code that the compiler generates for these
+pointer arithmetic operations will often be more efficient for
+efficiently-aligned types than for other types.
+
+The @code{aligned} attribute can only increase the alignment; but you
+can decrease it by specifying @code{packed} as well.  See below.
+
+Note that the effectiveness of @code{aligned} attributes may be limited
+by inherent limitations in your linker.  On many systems, the linker is
+only able to arrange for variables to be aligned up to a certain maximum
+alignment.  (For some linkers, the maximum supported alignment may
+be very very small.)  If your linker is only able to align variables
+up to a maximum of 8 byte alignment, then specifying @code{aligned(16)}
+in an @code{__attribute__} will still only provide you with 8 byte
+alignment.  See your linker documentation for further information.
+
+@item packed
+This attribute, attached to @code{struct} or @code{union} type
+definition, specifies that each member (other than zero-width bitfields)
+of the structure or union is placed to minimize the memory required.  When
+attached to an @code{enum} definition, it indicates that the smallest
+integral type should be used.
+
+@opindex fshort-enums
+Specifying this attribute for @code{struct} and @code{union} types is
+equivalent to specifying the @code{packed} attribute on each of the
+structure or union members.  Specifying the @option{-fshort-enums}
+flag on the line is equivalent to specifying the @code{packed}
+attribute on all @code{enum} definitions.
+
+In the following example @code{struct my_packed_struct}'s members are
+packed closely together, but the internal layout of its @code{s} member
+is not packed---to do that, @code{struct my_unpacked_struct} would need to
+be packed too.
+
+@smallexample
+struct my_unpacked_struct
+ @{
+    char c;
+    int i;
+ @};
+
+struct __attribute__ ((__packed__)) my_packed_struct
+  @{
+     char c;
+     int  i;
+     struct my_unpacked_struct s;
+  @};
+@end smallexample
+
+You may only specify this attribute on the definition of an @code{enum},
+@code{struct} or @code{union}, not on a @code{typedef} which does not
+also define the enumerated type, structure or union.
+
+@item transparent_union
+This attribute, attached to a @code{union} type definition, indicates
+that any function parameter having that union type causes calls to that
+function to be treated in a special way.
+
+First, the argument corresponding to a transparent union type can be of
+any type in the union; no cast is required.  Also, if the union contains
+a pointer type, the corresponding argument can be a null pointer
+constant or a void pointer expression; and if the union contains a void
+pointer type, the corresponding argument can be any pointer expression.
+If the union member type is a pointer, qualifiers like @code{const} on
+the referenced type must be respected, just as with normal pointer
+conversions.
+
+Second, the argument is passed to the function using the calling
+conventions of the first member of the transparent union, not the calling
+conventions of the union itself.  All members of the union must have the
+same machine representation; this is necessary for this argument passing
+to work properly.
+
+Transparent unions are designed for library functions that have multiple
+interfaces for compatibility reasons.  For example, suppose the
+@code{wait} function must accept either a value of type @code{int *} to
+comply with Posix, or a value of type @code{union wait *} to comply with
+the 4.1BSD interface.  If @code{wait}'s parameter were @code{void *},
+@code{wait} would accept both kinds of arguments, but it would also
+accept any other pointer type and this would make argument type checking
+less useful.  Instead, @code{<sys/wait.h>} might define the interface
+as follows:
+
+@smallexample
+typedef union __attribute__ ((__transparent_union__))
+  @{
+    int *__ip;
+    union wait *__up;
+  @} wait_status_ptr_t;
+
+pid_t wait (wait_status_ptr_t);
+@end smallexample
+
+This interface allows either @code{int *} or @code{union wait *}
+arguments to be passed, using the @code{int *} calling convention.
+The program can call @code{wait} with arguments of either type:
+
+@smallexample
+int w1 () @{ int w; return wait (&w); @}
+int w2 () @{ union wait w; return wait (&w); @}
+@end smallexample
+
+With this interface, @code{wait}'s implementation might look like this:
+
+@smallexample
+pid_t wait (wait_status_ptr_t p)
+@{
+  return waitpid (-1, p.__ip, 0);
+@}
+@end smallexample
+
+@item unused
+When attached to a type (including a @code{union} or a @code{struct}),
+this attribute means that variables of that type are meant to appear
+possibly unused.  GCC will not produce a warning for any variables of
+that type, even if the variable appears to do nothing.  This is often
+the case with lock or thread classes, which are usually defined and then
+not referenced, but contain constructors and destructors that have
+nontrivial bookkeeping functions.
+
+@item deprecated
+@itemx deprecated (@var{msg})
+The @code{deprecated} attribute results in a warning if the type
+is used anywhere in the source file.  This is useful when identifying
+types that are expected to be removed in a future version of a program.
+If possible, the warning also includes the location of the declaration
+of the deprecated type, to enable users to easily find further
+information about why the type is deprecated, or what they should do
+instead.  Note that the warnings only occur for uses and then only
+if the type is being applied to an identifier that itself is not being
+declared as deprecated.
+
+@smallexample
+typedef int T1 __attribute__ ((deprecated));
+T1 x;
+typedef T1 T2;
+T2 y;
+typedef T1 T3 __attribute__ ((deprecated));
+T3 z __attribute__ ((deprecated));
+@end smallexample
+
+results in a warning on line 2 and 3 but not lines 4, 5, or 6.  No
+warning is issued for line 4 because T2 is not explicitly
+deprecated.  Line 5 has no warning because T3 is explicitly
+deprecated.  Similarly for line 6.  The optional msg
+argument, which must be a string, will be printed in the warning if
+present.
+
+The @code{deprecated} attribute can also be used for functions and
+variables (@pxref{Function Attributes}, @pxref{Variable Attributes}.)
+
+@item may_alias
+Accesses through pointers to types with this attribute are not subject
+to type-based alias analysis, but are instead assumed to be able to alias
+any other type of objects.  In the context of 6.5/7 an lvalue expression
+dereferencing such a pointer is treated like having a character type.
+See @option{-fstrict-aliasing} for more information on aliasing issues.
+This extension exists to support some vector APIs, in which pointers to
+one vector type are permitted to alias pointers to a different vector type.
+
+Note that an object of a type with this attribute does not have any
+special semantics.
+
+Example of use:
+
+@smallexample
+typedef short __attribute__((__may_alias__)) short_a;
+
+int
+main (void)
+@{
+  int a = 0x12345678;
+  short_a *b = (short_a *) &a;
+
+  b[1] = 0;
+
+  if (a == 0x12345678)
+    abort();
+
+  exit(0);
+@}
+@end smallexample
+
+If you replaced @code{short_a} with @code{short} in the variable
+declaration, the above program would abort when compiled with
+@option{-fstrict-aliasing}, which is on by default at @option{-O2} or
+above in recent GCC versions.
+
+@item visibility
+In C++, attribute visibility (@pxref{Function Attributes}) can also be
+applied to class, struct, union and enum types.  Unlike other type
+attributes, the attribute must appear between the initial keyword and
+the name of the type; it cannot appear after the body of the type.
+
+Note that the type visibility is applied to vague linkage entities
+associated with the class (vtable, typeinfo node, etc.).  In
+particular, if a class is thrown as an exception in one shared object
+and caught in another, the class must have default visibility.
+Otherwise the two shared objects will be unable to use the same
+typeinfo node and exception handling will break.
+
+@end table
+
+@subsection ARM Type Attributes
+
+On those ARM targets that support @code{dllimport} (such as Symbian
+OS), you can use the @code{notshared} attribute to indicate that the
+virtual table and other similar data for a class should not be
+exported from a DLL@.  For example:
+
+@smallexample
+class __declspec(notshared) C @{
+public:
+  __declspec(dllimport) C();
+  virtual void f();
+@}
+
+__declspec(dllexport)
+C::C() @{@}
+@end smallexample
+
+In this code, @code{C::C} is exported from the current DLL, but the
+virtual table for @code{C} is not exported.  (You can use
+@code{__attribute__} instead of @code{__declspec} if you prefer, but
+most Symbian OS code uses @code{__declspec}.)
+
+@anchor{MeP Type Attributes}
+@subsection MeP Type Attributes
+
+Many of the MeP variable attributes may be applied to types as well.
+Specifically, the @code{based}, @code{tiny}, @code{near}, and
+@code{far} attributes may be applied to either.  The @code{io} and
+@code{cb} attributes may not be applied to types.
+
+@anchor{i386 Type Attributes}
+@subsection i386 Type Attributes
+
+Two attributes are currently defined for i386 configurations:
+@code{ms_struct} and @code{gcc_struct}.
+
+@table @code
+
+@item ms_struct
+@itemx gcc_struct
+@cindex @code{ms_struct}
+@cindex @code{gcc_struct}
+
+If @code{packed} is used on a structure, or if bit-fields are used
+it may be that the Microsoft ABI packs them differently
+than GCC would normally pack them.  Particularly when moving packed
+data between functions compiled with GCC and the native Microsoft compiler
+(either via function call or as data in a file), it may be necessary to access
+either format.
+
+Currently @option{-m[no-]ms-bitfields} is provided for the Microsoft Windows X86
+compilers to match the native Microsoft compiler.
+@end table
+
+To specify multiple attributes, separate them by commas within the
+double parentheses: for example, @samp{__attribute__ ((aligned (16),
+packed))}.
+
+@anchor{PowerPC Type Attributes}
+@subsection PowerPC Type Attributes
+
+Three attributes currently are defined for PowerPC configurations:
+@code{altivec}, @code{ms_struct} and @code{gcc_struct}.
+
+For full documentation of the @code{ms_struct} and @code{gcc_struct} 
+attributes please see the documentation in @ref{i386 Type Attributes}.
+
+The @code{altivec} attribute allows one to declare AltiVec vector data
+types supported by the AltiVec Programming Interface Manual.  The
+attribute requires an argument to specify one of three vector types:
+@code{vector__}, @code{pixel__} (always followed by unsigned short),
+and @code{bool__} (always followed by unsigned).
+
+@smallexample
+__attribute__((altivec(vector__)))
+__attribute__((altivec(pixel__))) unsigned short
+__attribute__((altivec(bool__))) unsigned
+@end smallexample
+
+These attributes mainly are intended to support the @code{__vector},
+@code{__pixel}, and @code{__bool} AltiVec keywords.
+
+@anchor{SPU Type Attributes}
+@subsection SPU Type Attributes
+
+The SPU supports the @code{spu_vector} attribute for types.  This attribute
+allows one to declare vector data types supported by the Sony/Toshiba/IBM SPU
+Language Extensions Specification.  It is intended to support the
+@code{__vector} keyword.
+
+@node Alignment
+@section Inquiring on Alignment of Types or Variables
+@cindex alignment
+@cindex type alignment
+@cindex variable alignment
+
+The keyword @code{__alignof__} allows you to inquire about how an object
+is aligned, or the minimum alignment usually required by a type.  Its
+syntax is just like @code{sizeof}.
+
+For example, if the target machine requires a @code{double} value to be
+aligned on an 8-byte boundary, then @code{__alignof__ (double)} is 8.
+This is true on many RISC machines.  On more traditional machine
+designs, @code{__alignof__ (double)} is 4 or even 2.
+
+Some machines never actually require alignment; they allow reference to any
+data type even at an odd address.  For these machines, @code{__alignof__}
+reports the smallest alignment that GCC will give the data type, usually as
+mandated by the target ABI.
+
+If the operand of @code{__alignof__} is an lvalue rather than a type,
+its value is the required alignment for its type, taking into account
+any minimum alignment specified with GCC's @code{__attribute__}
+extension (@pxref{Variable Attributes}).  For example, after this
+declaration:
+
+@smallexample
+struct foo @{ int x; char y; @} foo1;
+@end smallexample
+
+@noindent
+the value of @code{__alignof__ (foo1.y)} is 1, even though its actual
+alignment is probably 2 or 4, the same as @code{__alignof__ (int)}.
+
+It is an error to ask for the alignment of an incomplete type.
+
+
+@node Inline
+@section An Inline Function is As Fast As a Macro
+@cindex inline functions
+@cindex integrating function code
+@cindex open coding
+@cindex macros, inline alternative
+
+By declaring a function inline, you can direct GCC to make
+calls to that function faster.  One way GCC can achieve this is to
+integrate that function's code into the code for its callers.  This
+makes execution faster by eliminating the function-call overhead; in
+addition, if any of the actual argument values are constant, their
+known values may permit simplifications at compile time so that not
+all of the inline function's code needs to be included.  The effect on
+code size is less predictable; object code may be larger or smaller
+with function inlining, depending on the particular case.  You can
+also direct GCC to try to integrate all ``simple enough'' functions
+into their callers with the option @option{-finline-functions}.
+
+GCC implements three different semantics of declaring a function
+inline.  One is available with @option{-std=gnu89} or
+@option{-fgnu89-inline} or when @code{gnu_inline} attribute is present
+on all inline declarations, another when
+@option{-std=c99}, @option{-std=c1x},
+@option{-std=gnu99} or @option{-std=gnu1x}
+(without @option{-fgnu89-inline}), and the third
+is used when compiling C++.
+
+To declare a function inline, use the @code{inline} keyword in its
+declaration, like this:
+
+@smallexample
+static inline int
+inc (int *a)
+@{
+  return (*a)++;
+@}
+@end smallexample
+
+If you are writing a header file to be included in ISO C90 programs, write
+@code{__inline__} instead of @code{inline}.  @xref{Alternate Keywords}.
+
+The three types of inlining behave similarly in two important cases:
+when the @code{inline} keyword is used on a @code{static} function,
+like the example above, and when a function is first declared without
+using the @code{inline} keyword and then is defined with
+@code{inline}, like this:
+
+@smallexample
+extern int inc (int *a);
+inline int
+inc (int *a)
+@{
+  return (*a)++;
+@}
+@end smallexample
+
+In both of these common cases, the program behaves the same as if you
+had not used the @code{inline} keyword, except for its speed.
+
+@cindex inline functions, omission of
+@opindex fkeep-inline-functions
+When a function is both inline and @code{static}, if all calls to the
+function are integrated into the caller, and the function's address is
+never used, then the function's own assembler code is never referenced.
+In this case, GCC does not actually output assembler code for the
+function, unless you specify the option @option{-fkeep-inline-functions}.
+Some calls cannot be integrated for various reasons (in particular,
+calls that precede the function's definition cannot be integrated, and
+neither can recursive calls within the definition).  If there is a
+nonintegrated call, then the function is compiled to assembler code as
+usual.  The function must also be compiled as usual if the program
+refers to its address, because that can't be inlined.
+
+@opindex Winline
+Note that certain usages in a function definition can make it unsuitable
+for inline substitution.  Among these usages are: use of varargs, use of
+alloca, use of variable sized data types (@pxref{Variable Length}),
+use of computed goto (@pxref{Labels as Values}), use of nonlocal goto,
+and nested functions (@pxref{Nested Functions}).  Using @option{-Winline}
+will warn when a function marked @code{inline} could not be substituted,
+and will give the reason for the failure.
+
+@cindex automatic @code{inline} for C++ member fns
+@cindex @code{inline} automatic for C++ member fns
+@cindex member fns, automatically @code{inline}
+@cindex C++ member fns, automatically @code{inline}
+@opindex fno-default-inline
+As required by ISO C++, GCC considers member functions defined within
+the body of a class to be marked inline even if they are
+not explicitly declared with the @code{inline} keyword.  You can
+override this with @option{-fno-default-inline}; @pxref{C++ Dialect
+Options,,Options Controlling C++ Dialect}.
+
+GCC does not inline any functions when not optimizing unless you specify
+the @samp{always_inline} attribute for the function, like this:
+
+@smallexample
+/* @r{Prototype.}  */
+inline void foo (const char) __attribute__((always_inline));
+@end smallexample
+
+The remainder of this section is specific to GNU C90 inlining.
+
+@cindex non-static inline function
+When an inline function is not @code{static}, then the compiler must assume
+that there may be calls from other source files; since a global symbol can
+be defined only once in any program, the function must not be defined in
+the other source files, so the calls therein cannot be integrated.
+Therefore, a non-@code{static} inline function is always compiled on its
+own in the usual fashion.
+
+If you specify both @code{inline} and @code{extern} in the function
+definition, then the definition is used only for inlining.  In no case
+is the function compiled on its own, not even if you refer to its
+address explicitly.  Such an address becomes an external reference, as
+if you had only declared the function, and had not defined it.
+
+This combination of @code{inline} and @code{extern} has almost the
+effect of a macro.  The way to use it is to put a function definition in
+a header file with these keywords, and put another copy of the
+definition (lacking @code{inline} and @code{extern}) in a library file.
+The definition in the header file will cause most calls to the function
+to be inlined.  If any uses of the function remain, they will refer to
+the single copy in the library.
+
+@node Volatiles
+@section When is a Volatile Object Accessed?
+@cindex accessing volatiles
+@cindex volatile read
+@cindex volatile write
+@cindex volatile access
+
+C has the concept of volatile objects.  These are normally accessed by
+pointers and used for accessing hardware or inter-thread
+communication.  The standard encourages compilers to refrain from
+optimizations concerning accesses to volatile objects, but leaves it
+implementation defined as to what constitutes a volatile access.  The
+minimum requirement is that at a sequence point all previous accesses
+to volatile objects have stabilized and no subsequent accesses have
+occurred.  Thus an implementation is free to reorder and combine
+volatile accesses which occur between sequence points, but cannot do
+so for accesses across a sequence point.  The use of volatile does
+not allow you to violate the restriction on updating objects multiple
+times between two sequence points.
+
+Accesses to non-volatile objects are not ordered with respect to
+volatile accesses.  You cannot use a volatile object as a memory
+barrier to order a sequence of writes to non-volatile memory.  For
+instance:
+
+@smallexample
+int *ptr = @var{something};
+volatile int vobj;
+*ptr = @var{something};
+vobj = 1;
+@end smallexample
+
+Unless @var{*ptr} and @var{vobj} can be aliased, it is not guaranteed
+that the write to @var{*ptr} will have occurred by the time the update
+of @var{vobj} has happened.  If you need this guarantee, you must use
+a stronger memory barrier such as:
+
+@smallexample
+int *ptr = @var{something};
+volatile int vobj;
+*ptr = @var{something};
+asm volatile ("" : : : "memory");
+vobj = 1;
+@end smallexample
+
+A scalar volatile object is read when it is accessed in a void context:
+
+@smallexample
+volatile int *src = @var{somevalue};
+*src;
+@end smallexample
+
+Such expressions are rvalues, and GCC implements this as a
+read of the volatile object being pointed to.
+
+Assignments are also expressions and have an rvalue.  However when
+assigning to a scalar volatile, the volatile object is not reread,
+regardless of whether the assignment expression's rvalue is used or
+not.  If the assignment's rvalue is used, the value is that assigned
+to the volatile object.  For instance, there is no read of @var{vobj}
+in all the following cases:
+
+@smallexample
+int obj;
+volatile int vobj;
+vobj = @var{something};
+obj = vobj = @var{something};
+obj ? vobj = @var{onething} : vobj = @var{anotherthing};
+obj = (@var{something}, vobj = @var{anotherthing});
+@end smallexample
+
+If you need to read the volatile object after an assignment has
+occurred, you must use a separate expression with an intervening
+sequence point.
+
+As bitfields are not individually addressable, volatile bitfields may
+be implicitly read when written to, or when adjacent bitfields are
+accessed.  Bitfield operations may be optimized such that adjacent
+bitfields are only partially accessed, if they straddle a storage unit
+boundary.  For these reasons it is unwise to use volatile bitfields to
+access hardware.
+
+@node Extended Asm
+@section Assembler Instructions with C Expression Operands
+@cindex extended @code{asm}
+@cindex @code{asm} expressions
+@cindex assembler instructions
+@cindex registers
+
+In an assembler instruction using @code{asm}, you can specify the
+operands of the instruction using C expressions.  This means you need not
+guess which registers or memory locations will contain the data you want
+to use.
+
+You must specify an assembler instruction template much like what
+appears in a machine description, plus an operand constraint string for
+each operand.
+
+For example, here is how to use the 68881's @code{fsinx} instruction:
+
+@smallexample
+asm ("fsinx %1,%0" : "=f" (result) : "f" (angle));
+@end smallexample
+
+@noindent
+Here @code{angle} is the C expression for the input operand while
+@code{result} is that of the output operand.  Each has @samp{"f"} as its
+operand constraint, saying that a floating point register is required.
+The @samp{=} in @samp{=f} indicates that the operand is an output; all
+output operands' constraints must use @samp{=}.  The constraints use the
+same language used in the machine description (@pxref{Constraints}).
+
+Each operand is described by an operand-constraint string followed by
+the C expression in parentheses.  A colon separates the assembler
+template from the first output operand and another separates the last
+output operand from the first input, if any.  Commas separate the
+operands within each group.  The total number of operands is currently
+limited to 30; this limitation may be lifted in some future version of
+GCC@.
+
+If there are no output operands but there are input operands, you must
+place two consecutive colons surrounding the place where the output
+operands would go.
+
+As of GCC version 3.1, it is also possible to specify input and output
+operands using symbolic names which can be referenced within the
+assembler code.  These names are specified inside square brackets
+preceding the constraint string, and can be referenced inside the
+assembler code using @code{%[@var{name}]} instead of a percentage sign
+followed by the operand number.  Using named operands the above example
+could look like:
+
+@smallexample
+asm ("fsinx %[angle],%[output]"
+     : [output] "=f" (result)
+     : [angle] "f" (angle));
+@end smallexample
+
+@noindent
+Note that the symbolic operand names have no relation whatsoever to
+other C identifiers.  You may use any name you like, even those of
+existing C symbols, but you must ensure that no two operands within the same
+assembler construct use the same symbolic name.
+
+Output operand expressions must be lvalues; the compiler can check this.
+The input operands need not be lvalues.  The compiler cannot check
+whether the operands have data types that are reasonable for the
+instruction being executed.  It does not parse the assembler instruction
+template and does not know what it means or even whether it is valid
+assembler input.  The extended @code{asm} feature is most often used for
+machine instructions the compiler itself does not know exist.  If
+the output expression cannot be directly addressed (for example, it is a
+bit-field), your constraint must allow a register.  In that case, GCC
+will use the register as the output of the @code{asm}, and then store
+that register into the output.
+
+The ordinary output operands must be write-only; GCC will assume that
+the values in these operands before the instruction are dead and need
+not be generated.  Extended asm supports input-output or read-write
+operands.  Use the constraint character @samp{+} to indicate such an
+operand and list it with the output operands.  You should only use
+read-write operands when the constraints for the operand (or the
+operand in which only some of the bits are to be changed) allow a
+register.
+
+You may, as an alternative, logically split its function into two
+separate operands, one input operand and one write-only output
+operand.  The connection between them is expressed by constraints
+which say they need to be in the same location when the instruction
+executes.  You can use the same C expression for both operands, or
+different expressions.  For example, here we write the (fictitious)
+@samp{combine} instruction with @code{bar} as its read-only source
+operand and @code{foo} as its read-write destination:
+
+@smallexample
+asm ("combine %2,%0" : "=r" (foo) : "0" (foo), "g" (bar));
+@end smallexample
+
+@noindent
+The constraint @samp{"0"} for operand 1 says that it must occupy the
+same location as operand 0.  A number in constraint is allowed only in
+an input operand and it must refer to an output operand.
+
+Only a number in the constraint can guarantee that one operand will be in
+the same place as another.  The mere fact that @code{foo} is the value
+of both operands is not enough to guarantee that they will be in the
+same place in the generated assembler code.  The following would not
+work reliably:
+
+@smallexample
+asm ("combine %2,%0" : "=r" (foo) : "r" (foo), "g" (bar));
+@end smallexample
+
+Various optimizations or reloading could cause operands 0 and 1 to be in
+different registers; GCC knows no reason not to do so.  For example, the
+compiler might find a copy of the value of @code{foo} in one register and
+use it for operand 1, but generate the output operand 0 in a different
+register (copying it afterward to @code{foo}'s own address).  Of course,
+since the register for operand 1 is not even mentioned in the assembler
+code, the result will not work, but GCC can't tell that.
+
+As of GCC version 3.1, one may write @code{[@var{name}]} instead of
+the operand number for a matching constraint.  For example:
+
+@smallexample
+asm ("cmoveq %1,%2,%[result]"
+     : [result] "=r"(result)
+     : "r" (test), "r"(new), "[result]"(old));
+@end smallexample
+
+Sometimes you need to make an @code{asm} operand be a specific register,
+but there's no matching constraint letter for that register @emph{by
+itself}.  To force the operand into that register, use a local variable
+for the operand and specify the register in the variable declaration.
+@xref{Explicit Reg Vars}.  Then for the @code{asm} operand, use any
+register constraint letter that matches the register:
+
+@smallexample
+register int *p1 asm ("r0") = @dots{};
+register int *p2 asm ("r1") = @dots{};
+register int *result asm ("r0");
+asm ("sysint" : "=r" (result) : "0" (p1), "r" (p2));
+@end smallexample
+
+@anchor{Example of asm with clobbered asm reg}
+In the above example, beware that a register that is call-clobbered by
+the target ABI will be overwritten by any function call in the
+assignment, including library calls for arithmetic operators.
+Also a register may be clobbered when generating some operations,
+like variable shift, memory copy or memory move on x86.
+Assuming it is a call-clobbered register, this may happen to @code{r0}
+above by the assignment to @code{p2}.  If you have to use such a
+register, use temporary variables for expressions between the register
+assignment and use:
+
+@smallexample
+int t1 = @dots{};
+register int *p1 asm ("r0") = @dots{};
+register int *p2 asm ("r1") = t1;
+register int *result asm ("r0");
+asm ("sysint" : "=r" (result) : "0" (p1), "r" (p2));
+@end smallexample
+
+Some instructions clobber specific hard registers.  To describe this,
+write a third colon after the input operands, followed by the names of
+the clobbered hard registers (given as strings).  Here is a realistic
+example for the VAX:
+
+@smallexample
+asm volatile ("movc3 %0,%1,%2"
+              : /* @r{no outputs} */
+              : "g" (from), "g" (to), "g" (count)
+              : "r0", "r1", "r2", "r3", "r4", "r5");
+@end smallexample
+
+You may not write a clobber description in a way that overlaps with an
+input or output operand.  For example, you may not have an operand
+describing a register class with one member if you mention that register
+in the clobber list.  Variables declared to live in specific registers
+(@pxref{Explicit Reg Vars}), and used as asm input or output operands must
+have no part mentioned in the clobber description.
+There is no way for you to specify that an input
+operand is modified without also specifying it as an output
+operand.  Note that if all the output operands you specify are for this
+purpose (and hence unused), you will then also need to specify
+@code{volatile} for the @code{asm} construct, as described below, to
+prevent GCC from deleting the @code{asm} statement as unused.
+
+If you refer to a particular hardware register from the assembler code,
+you will probably have to list the register after the third colon to
+tell the compiler the register's value is modified.  In some assemblers,
+the register names begin with @samp{%}; to produce one @samp{%} in the
+assembler code, you must write @samp{%%} in the input.
+
+If your assembler instruction can alter the condition code register, add
+@samp{cc} to the list of clobbered registers.  GCC on some machines
+represents the condition codes as a specific hardware register;
+@samp{cc} serves to name this register.  On other machines, the
+condition code is handled differently, and specifying @samp{cc} has no
+effect.  But it is valid no matter what the machine.
+
+If your assembler instructions access memory in an unpredictable
+fashion, add @samp{memory} to the list of clobbered registers.  This
+will cause GCC to not keep memory values cached in registers across the
+assembler instruction and not optimize stores or loads to that memory.
+You will also want to add the @code{volatile} keyword if the memory
+affected is not listed in the inputs or outputs of the @code{asm}, as
+the @samp{memory} clobber does not count as a side-effect of the
+@code{asm}.  If you know how large the accessed memory is, you can add
+it as input or output but if this is not known, you should add
+@samp{memory}.  As an example, if you access ten bytes of a string, you
+can use a memory input like:
+
+@smallexample
+@{"m"( (@{ struct @{ char x[10]; @} *p = (void *)ptr ; *p; @}) )@}.
+@end smallexample
+
+Note that in the following example the memory input is necessary,
+otherwise GCC might optimize the store to @code{x} away:
+@smallexample
+int foo ()
+@{
+  int x = 42;
+  int *y = &x;
+  int result;
+  asm ("magic stuff accessing an 'int' pointed to by '%1'"
+        "=&d" (r) : "a" (y), "m" (*y));
+  return result;
+@}
+@end smallexample
+
+You can put multiple assembler instructions together in a single
+@code{asm} template, separated by the characters normally used in assembly
+code for the system.  A combination that works in most places is a newline
+to break the line, plus a tab character to move to the instruction field
+(written as @samp{\n\t}).  Sometimes semicolons can be used, if the
+assembler allows semicolons as a line-breaking character.  Note that some
+assembler dialects use semicolons to start a comment.
+The input operands are guaranteed not to use any of the clobbered
+registers, and neither will the output operands' addresses, so you can
+read and write the clobbered registers as many times as you like.  Here
+is an example of multiple instructions in a template; it assumes the
+subroutine @code{_foo} accepts arguments in registers 9 and 10:
+
+@smallexample
+asm ("movl %0,r9\n\tmovl %1,r10\n\tcall _foo"
+     : /* no outputs */
+     : "g" (from), "g" (to)
+     : "r9", "r10");
+@end smallexample
+
+Unless an output operand has the @samp{&} constraint modifier, GCC
+may allocate it in the same register as an unrelated input operand, on
+the assumption the inputs are consumed before the outputs are produced.
+This assumption may be false if the assembler code actually consists of
+more than one instruction.  In such a case, use @samp{&} for each output
+operand that may not overlap an input.  @xref{Modifiers}.
+
+If you want to test the condition code produced by an assembler
+instruction, you must include a branch and a label in the @code{asm}
+construct, as follows:
+
+@smallexample
+asm ("clr %0\n\tfrob %1\n\tbeq 0f\n\tmov #1,%0\n0:"
+     : "g" (result)
+     : "g" (input));
+@end smallexample
+
+@noindent
+This assumes your assembler supports local labels, as the GNU assembler
+and most Unix assemblers do.
+
+Speaking of labels, jumps from one @code{asm} to another are not
+supported.  The compiler's optimizers do not know about these jumps, and
+therefore they cannot take account of them when deciding how to
+optimize.  @xref{Extended asm with goto}.
+
+@cindex macros containing @code{asm}
+Usually the most convenient way to use these @code{asm} instructions is to
+encapsulate them in macros that look like functions.  For example,
+
+@smallexample
+#define sin(x)       \
+(@{ double __value, __arg = (x);   \
+   asm ("fsinx %1,%0": "=f" (__value): "f" (__arg));  \
+   __value; @})
+@end smallexample
+
+@noindent
+Here the variable @code{__arg} is used to make sure that the instruction
+operates on a proper @code{double} value, and to accept only those
+arguments @code{x} which can convert automatically to a @code{double}.
+
+Another way to make sure the instruction operates on the correct data
+type is to use a cast in the @code{asm}.  This is different from using a
+variable @code{__arg} in that it converts more different types.  For
+example, if the desired type were @code{int}, casting the argument to
+@code{int} would accept a pointer with no complaint, while assigning the
+argument to an @code{int} variable named @code{__arg} would warn about
+using a pointer unless the caller explicitly casts it.
+
+If an @code{asm} has output operands, GCC assumes for optimization
+purposes the instruction has no side effects except to change the output
+operands.  This does not mean instructions with a side effect cannot be
+used, but you must be careful, because the compiler may eliminate them
+if the output operands aren't used, or move them out of loops, or
+replace two with one if they constitute a common subexpression.  Also,
+if your instruction does have a side effect on a variable that otherwise
+appears not to change, the old value of the variable may be reused later
+if it happens to be found in a register.
+
+You can prevent an @code{asm} instruction from being deleted
+by writing the keyword @code{volatile} after
+the @code{asm}.  For example:
+
+@smallexample
+#define get_and_set_priority(new)              \
+(@{ int __old;                                  \
+   asm volatile ("get_and_set_priority %0, %1" \
+                 : "=g" (__old) : "g" (new));  \
+   __old; @})
+@end smallexample
+
+@noindent
+The @code{volatile} keyword indicates that the instruction has
+important side-effects.  GCC will not delete a volatile @code{asm} if
+it is reachable.  (The instruction can still be deleted if GCC can
+prove that control-flow will never reach the location of the
+instruction.)  Note that even a volatile @code{asm} instruction
+can be moved relative to other code, including across jump
+instructions.  For example, on many targets there is a system
+register which can be set to control the rounding mode of
+floating point operations.  You might try
+setting it with a volatile @code{asm}, like this PowerPC example:
+
+@smallexample
+       asm volatile("mtfsf 255,%0" : : "f" (fpenv));
+       sum = x + y;
+@end smallexample
+
+@noindent
+This will not work reliably, as the compiler may move the addition back
+before the volatile @code{asm}.  To make it work you need to add an
+artificial dependency to the @code{asm} referencing a variable in the code
+you don't want moved, for example:
+
+@smallexample
+    asm volatile ("mtfsf 255,%1" : "=X"(sum): "f"(fpenv));
+    sum = x + y;
+@end smallexample
+
+Similarly, you can't expect a
+sequence of volatile @code{asm} instructions to remain perfectly
+consecutive.  If you want consecutive output, use a single @code{asm}.
+Also, GCC will perform some optimizations across a volatile @code{asm}
+instruction; GCC does not ``forget everything'' when it encounters
+a volatile @code{asm} instruction the way some other compilers do.
+
+An @code{asm} instruction without any output operands will be treated
+identically to a volatile @code{asm} instruction.
+
+It is a natural idea to look for a way to give access to the condition
+code left by the assembler instruction.  However, when we attempted to
+implement this, we found no way to make it work reliably.  The problem
+is that output operands might need reloading, which would result in
+additional following ``store'' instructions.  On most machines, these
+instructions would alter the condition code before there was time to
+test it.  This problem doesn't arise for ordinary ``test'' and
+``compare'' instructions because they don't have any output operands.
+
+For reasons similar to those described above, it is not possible to give
+an assembler instruction access to the condition code left by previous
+instructions.
+
+@anchor{Extended asm with goto}
+As of GCC version 4.5, @code{asm goto} may be used to have the assembly
+jump to one or more C labels.  In this form, a fifth section after the
+clobber list contains a list of all C labels to which the assembly may jump.
+Each label operand is implicitly self-named.  The @code{asm} is also assumed
+to fall through to the next statement.
+
+This form of @code{asm} is restricted to not have outputs.  This is due
+to a internal restriction in the compiler that control transfer instructions
+cannot have outputs.  This restriction on @code{asm goto} may be lifted
+in some future version of the compiler.  In the mean time, @code{asm goto}
+may include a memory clobber, and so leave outputs in memory.
+
+@smallexample
+int frob(int x)
+@{
+  int y;
+  asm goto ("frob %%r5, %1; jc %l[error]; mov (%2), %%r5"
+            : : "r"(x), "r"(&y) : "r5", "memory" : error);
+  return y;
+ error:
+  return -1;
+@}
+@end smallexample
+
+In this (inefficient) example, the @code{frob} instruction sets the
+carry bit to indicate an error.  The @code{jc} instruction detects
+this and branches to the @code{error} label.  Finally, the output 
+of the @code{frob} instruction (@code{%r5}) is stored into the memory
+for variable @code{y}, which is later read by the @code{return} statement.
+
+@smallexample
+void doit(void)
+@{
+  int i = 0;
+  asm goto ("mfsr %%r1, 123; jmp %%r1;"
+            ".pushsection doit_table;"
+            ".long %l0, %l1, %l2, %l3;"
+            ".popsection"
+            : : : "r1" : label1, label2, label3, label4);
+  __builtin_unreachable ();
+
+ label1:
+  f1();
+  return;
+ label2:
+  f2();
+  return;
+ label3:
+  i = 1;
+ label4:
+  f3(i);
+@}
+@end smallexample
+
+In this (also inefficient) example, the @code{mfsr} instruction reads
+an address from some out-of-band machine register, and the following
+@code{jmp} instruction branches to that address.  The address read by
+the @code{mfsr} instruction is assumed to have been previously set via
+some application-specific mechanism to be one of the four values stored
+in the @code{doit_table} section.  Finally, the @code{asm} is followed
+by a call to @code{__builtin_unreachable} to indicate that the @code{asm}
+does not in fact fall through.
+
+@smallexample
+#define TRACE1(NUM)                         \
+  do @{                                      \
+    asm goto ("0: nop;"                     \
+              ".pushsection trace_table;"   \
+              ".long 0b, %l0;"              \
+              ".popsection"                 \
+              : : : : trace#NUM);           \
+    if (0) @{ trace#NUM: trace(); @}          \
+  @} while (0)
+#define TRACE  TRACE1(__COUNTER__)
+@end smallexample
+
+In this example (which in fact inspired the @code{asm goto} feature)
+we want on rare occasions to call the @code{trace} function; on other
+occasions we'd like to keep the overhead to the absolute minimum.
+The normal code path consists of a single @code{nop} instruction.
+However, we record the address of this @code{nop} together with the
+address of a label that calls the @code{trace} function.  This allows
+the @code{nop} instruction to be patched at runtime to be an 
+unconditional branch to the stored label.  It is assumed that an
+optimizing compiler will move the labeled block out of line, to
+optimize the fall through path from the @code{asm}.
+
+If you are writing a header file that should be includable in ISO C
+programs, write @code{__asm__} instead of @code{asm}.  @xref{Alternate
+Keywords}.
+
+@subsection Size of an @code{asm}
+
+Some targets require that GCC track the size of each instruction used in
+order to generate correct code.  Because the final length of an
+@code{asm} is only known by the assembler, GCC must make an estimate as
+to how big it will be.  The estimate is formed by counting the number of
+statements in the pattern of the @code{asm} and multiplying that by the
+length of the longest instruction on that processor.  Statements in the
+@code{asm} are identified by newline characters and whatever statement
+separator characters are supported by the assembler; on most processors
+this is the `@code{;}' character.
+
+Normally, GCC's estimate is perfectly adequate to ensure that correct
+code is generated, but it is possible to confuse the compiler if you use
+pseudo instructions or assembler macros that expand into multiple real
+instructions or if you use assembler directives that expand to more
+space in the object file than would be needed for a single instruction.
+If this happens then the assembler will produce a diagnostic saying that
+a label is unreachable.
+
+@subsection i386 floating point asm operands
+
+There are several rules on the usage of stack-like regs in
+asm_operands insns.  These rules apply only to the operands that are
+stack-like regs:
+
+@enumerate
+@item
+Given a set of input regs that die in an asm_operands, it is
+necessary to know which are implicitly popped by the asm, and
+which must be explicitly popped by gcc.
+
+An input reg that is implicitly popped by the asm must be
+explicitly clobbered, unless it is constrained to match an
+output operand.
+
+@item
+For any input reg that is implicitly popped by an asm, it is
+necessary to know how to adjust the stack to compensate for the pop.
+If any non-popped input is closer to the top of the reg-stack than
+the implicitly popped reg, it would not be possible to know what the
+stack looked like---it's not clear how the rest of the stack ``slides
+up''.
+
+All implicitly popped input regs must be closer to the top of
+the reg-stack than any input that is not implicitly popped.
+
+It is possible that if an input dies in an insn, reload might
+use the input reg for an output reload.  Consider this example:
+
+@smallexample
+asm ("foo" : "=t" (a) : "f" (b));
+@end smallexample
+
+This asm says that input B is not popped by the asm, and that
+the asm pushes a result onto the reg-stack, i.e., the stack is one
+deeper after the asm than it was before.  But, it is possible that
+reload will think that it can use the same reg for both the input and
+the output, if input B dies in this insn.
+
+If any input operand uses the @code{f} constraint, all output reg
+constraints must use the @code{&} earlyclobber.
+
+The asm above would be written as
+
+@smallexample
+asm ("foo" : "=&t" (a) : "f" (b));
+@end smallexample
+
+@item
+Some operands need to be in particular places on the stack.  All
+output operands fall in this category---there is no other way to
+know which regs the outputs appear in unless the user indicates
+this in the constraints.
+
+Output operands must specifically indicate which reg an output
+appears in after an asm.  @code{=f} is not allowed: the operand
+constraints must select a class with a single reg.
+
+@item
+Output operands may not be ``inserted'' between existing stack regs.
+Since no 387 opcode uses a read/write operand, all output operands
+are dead before the asm_operands, and are pushed by the asm_operands.
+It makes no sense to push anywhere but the top of the reg-stack.
+
+Output operands must start at the top of the reg-stack: output
+operands may not ``skip'' a reg.
+
+@item
+Some asm statements may need extra stack space for internal
+calculations.  This can be guaranteed by clobbering stack registers
+unrelated to the inputs and outputs.
+
+@end enumerate
+
+Here are a couple of reasonable asms to want to write.  This asm
+takes one input, which is internally popped, and produces two outputs.
+
+@smallexample
+asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
+@end smallexample
+
+This asm takes two inputs, which are popped by the @code{fyl2xp1} opcode,
+and replaces them with one output.  The user must code the @code{st(1)}
+clobber for reg-stack.c to know that @code{fyl2xp1} pops both inputs.
+
+@smallexample
+asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
+@end smallexample
+
+@include md.texi
+
+@node Asm Labels
+@section Controlling Names Used in Assembler Code
+@cindex assembler names for identifiers
+@cindex names used in assembler code
+@cindex identifiers, names in assembler code
+
+You can specify the name to be used in the assembler code for a C
+function or variable by writing the @code{asm} (or @code{__asm__})
+keyword after the declarator as follows:
+
+@smallexample
+int foo asm ("myfoo") = 2;
+@end smallexample
+
+@noindent
+This specifies that the name to be used for the variable @code{foo} in
+the assembler code should be @samp{myfoo} rather than the usual
+@samp{_foo}.
+
+On systems where an underscore is normally prepended to the name of a C
+function or variable, this feature allows you to define names for the
+linker that do not start with an underscore.
+
+It does not make sense to use this feature with a non-static local
+variable since such variables do not have assembler names.  If you are
+trying to put the variable in a particular register, see @ref{Explicit
+Reg Vars}.  GCC presently accepts such code with a warning, but will
+probably be changed to issue an error, rather than a warning, in the
+future.
+
+You cannot use @code{asm} in this way in a function @emph{definition}; but
+you can get the same effect by writing a declaration for the function
+before its definition and putting @code{asm} there, like this:
+
+@smallexample
+extern func () asm ("FUNC");
+
+func (x, y)
+     int x, y;
+/* @r{@dots{}} */
+@end smallexample
+
+It is up to you to make sure that the assembler names you choose do not
+conflict with any other assembler symbols.  Also, you must not use a
+register name; that would produce completely invalid assembler code.  GCC
+does not as yet have the ability to store static variables in registers.
+Perhaps that will be added.
+
+@node Explicit Reg Vars
+@section Variables in Specified Registers
+@cindex explicit register variables
+@cindex variables in specified registers
+@cindex specified registers
+@cindex registers, global allocation
+
+GNU C allows you to put a few global variables into specified hardware
+registers.  You can also specify the register in which an ordinary
+register variable should be allocated.
+
+@itemize @bullet
+@item
+Global register variables reserve registers throughout the program.
+This may be useful in programs such as programming language
+interpreters which have a couple of global variables that are accessed
+very often.
+
+@item
+Local register variables in specific registers do not reserve the
+registers, except at the point where they are used as input or output
+operands in an @code{asm} statement and the @code{asm} statement itself is
+not deleted.  The compiler's data flow analysis is capable of determining
+where the specified registers contain live values, and where they are
+available for other uses.  Stores into local register variables may be deleted
+when they appear to be dead according to dataflow analysis.  References
+to local register variables may be deleted or moved or simplified.
+
+These local variables are sometimes convenient for use with the extended
+@code{asm} feature (@pxref{Extended Asm}), if you want to write one
+output of the assembler instruction directly into a particular register.
+(This will work provided the register you specify fits the constraints
+specified for that operand in the @code{asm}.)
+@end itemize
+
+@menu
+* Global Reg Vars::
+* Local Reg Vars::
+@end menu
+
+@node Global Reg Vars
+@subsection Defining Global Register Variables
+@cindex global register variables
+@cindex registers, global variables in
+
+You can define a global register variable in GNU C like this:
+
+@smallexample
+register int *foo asm ("a5");
+@end smallexample
+
+@noindent
+Here @code{a5} is the name of the register which should be used.  Choose a
+register which is normally saved and restored by function calls on your
+machine, so that library routines will not clobber it.
+
+Naturally the register name is cpu-dependent, so you would need to
+conditionalize your program according to cpu type.  The register
+@code{a5} would be a good choice on a 68000 for a variable of pointer
+type.  On machines with register windows, be sure to choose a ``global''
+register that is not affected magically by the function call mechanism.
+
+In addition, operating systems on one type of cpu may differ in how they
+name the registers; then you would need additional conditionals.  For
+example, some 68000 operating systems call this register @code{%a5}.
+
+Eventually there may be a way of asking the compiler to choose a register
+automatically, but first we need to figure out how it should choose and
+how to enable you to guide the choice.  No solution is evident.
+
+Defining a global register variable in a certain register reserves that
+register entirely for this use, at least within the current compilation.
+The register will not be allocated for any other purpose in the functions
+in the current compilation.  The register will not be saved and restored by
+these functions.  Stores into this register are never deleted even if they
+would appear to be dead, but references may be deleted or moved or
+simplified.
+
+It is not safe to access the global register variables from signal
+handlers, or from more than one thread of control, because the system
+library routines may temporarily use the register for other things (unless
+you recompile them specially for the task at hand).
+
+@cindex @code{qsort}, and global register variables
+It is not safe for one function that uses a global register variable to
+call another such function @code{foo} by way of a third function
+@code{lose} that was compiled without knowledge of this variable (i.e.@: in a
+different source file in which the variable wasn't declared).  This is
+because @code{lose} might save the register and put some other value there.
+For example, you can't expect a global register variable to be available in
+the comparison-function that you pass to @code{qsort}, since @code{qsort}
+might have put something else in that register.  (If you are prepared to
+recompile @code{qsort} with the same global register variable, you can
+solve this problem.)
+
+If you want to recompile @code{qsort} or other source files which do not
+actually use your global register variable, so that they will not use that
+register for any other purpose, then it suffices to specify the compiler
+option @option{-ffixed-@var{reg}}.  You need not actually add a global
+register declaration to their source code.
+
+A function which can alter the value of a global register variable cannot
+safely be called from a function compiled without this variable, because it
+could clobber the value the caller expects to find there on return.
+Therefore, the function which is the entry point into the part of the
+program that uses the global register variable must explicitly save and
+restore the value which belongs to its caller.
+
+@cindex register variable after @code{longjmp}
+@cindex global register after @code{longjmp}
+@cindex value after @code{longjmp}
+@findex longjmp
+@findex setjmp
+On most machines, @code{longjmp} will restore to each global register
+variable the value it had at the time of the @code{setjmp}.  On some
+machines, however, @code{longjmp} will not change the value of global
+register variables.  To be portable, the function that called @code{setjmp}
+should make other arrangements to save the values of the global register
+variables, and to restore them in a @code{longjmp}.  This way, the same
+thing will happen regardless of what @code{longjmp} does.
+
+All global register variable declarations must precede all function
+definitions.  If such a declaration could appear after function
+definitions, the declaration would be too late to prevent the register from
+being used for other purposes in the preceding functions.
+
+Global register variables may not have initial values, because an
+executable file has no means to supply initial contents for a register.
+
+On the SPARC, there are reports that g3 @dots{} g7 are suitable
+registers, but certain library functions, such as @code{getwd}, as well
+as the subroutines for division and remainder, modify g3 and g4.  g1 and
+g2 are local temporaries.
+
+On the 68000, a2 @dots{} a5 should be suitable, as should d2 @dots{} d7.
+Of course, it will not do to use more than a few of those.
+
+@node Local Reg Vars
+@subsection Specifying Registers for Local Variables
+@cindex local variables, specifying registers
+@cindex specifying registers for local variables
+@cindex registers for local variables
+
+You can define a local register variable with a specified register
+like this:
+
+@smallexample
+register int *foo asm ("a5");
+@end smallexample
+
+@noindent
+Here @code{a5} is the name of the register which should be used.  Note
+that this is the same syntax used for defining global register
+variables, but for a local variable it would appear within a function.
+
+Naturally the register name is cpu-dependent, but this is not a
+problem, since specific registers are most often useful with explicit
+assembler instructions (@pxref{Extended Asm}).  Both of these things
+generally require that you conditionalize your program according to
+cpu type.
+
+In addition, operating systems on one type of cpu may differ in how they
+name the registers; then you would need additional conditionals.  For
+example, some 68000 operating systems call this register @code{%a5}.
+
+Defining such a register variable does not reserve the register; it
+remains available for other uses in places where flow control determines
+the variable's value is not live.
+
+This option does not guarantee that GCC will generate code that has
+this variable in the register you specify at all times.  You may not
+code an explicit reference to this register in the @emph{assembler
+instruction template} part of an @code{asm} statement and assume it will
+always refer to this variable.  However, using the variable as an
+@code{asm} @emph{operand} guarantees that the specified register is used
+for the operand.
+
+Stores into local register variables may be deleted when they appear to be dead
+according to dataflow analysis.  References to local register variables may
+be deleted or moved or simplified.
+
+As for global register variables, it's recommended that you choose a
+register which is normally saved and restored by function calls on
+your machine, so that library routines will not clobber it.  A common
+pitfall is to initialize multiple call-clobbered registers with
+arbitrary expressions, where a function call or library call for an
+arithmetic operator will overwrite a register value from a previous
+assignment, for example @code{r0} below:
+@smallexample
+register int *p1 asm ("r0") = @dots{};
+register int *p2 asm ("r1") = @dots{};
+@end smallexample
+In those cases, a solution is to use a temporary variable for
+each arbitrary expression.   @xref{Example of asm with clobbered asm reg}.
+
+@node Alternate Keywords
+@section Alternate Keywords
+@cindex alternate keywords
+@cindex keywords, alternate
+
+@option{-ansi} and the various @option{-std} options disable certain
+keywords.  This causes trouble when you want to use GNU C extensions, or
+a general-purpose header file that should be usable by all programs,
+including ISO C programs.  The keywords @code{asm}, @code{typeof} and
+@code{inline} are not available in programs compiled with
+@option{-ansi} or @option{-std} (although @code{inline} can be used in a
+program compiled with @option{-std=c99} or @option{-std=c1x}).  The
+ISO C99 keyword
+@code{restrict} is only available when @option{-std=gnu99} (which will
+eventually be the default) or @option{-std=c99} (or the equivalent
+@option{-std=iso9899:1999}), or an option for a later standard
+version, is used.
+
+The way to solve these problems is to put @samp{__} at the beginning and
+end of each problematical keyword.  For example, use @code{__asm__}
+instead of @code{asm}, and @code{__inline__} instead of @code{inline}.
+
+Other C compilers won't accept these alternative keywords; if you want to
+compile with another compiler, you can define the alternate keywords as
+macros to replace them with the customary keywords.  It looks like this:
+
+@smallexample
+#ifndef __GNUC__
+#define __asm__ asm
+#endif
+@end smallexample
+
+@findex __extension__
+@opindex pedantic
+@option{-pedantic} and other options cause warnings for many GNU C extensions.
+You can
+prevent such warnings within one expression by writing
+@code{__extension__} before the expression.  @code{__extension__} has no
+effect aside from this.
+
+@node Incomplete Enums
+@section Incomplete @code{enum} Types
+
+You can define an @code{enum} tag without specifying its possible values.
+This results in an incomplete type, much like what you get if you write
+@code{struct foo} without describing the elements.  A later declaration
+which does specify the possible values completes the type.
+
+You can't allocate variables or storage using the type while it is
+incomplete.  However, you can work with pointers to that type.
+
+This extension may not be very useful, but it makes the handling of
+@code{enum} more consistent with the way @code{struct} and @code{union}
+are handled.
+
+This extension is not supported by GNU C++.
+
+@node Function Names
+@section Function Names as Strings
+@cindex @code{__func__} identifier
+@cindex @code{__FUNCTION__} identifier
+@cindex @code{__PRETTY_FUNCTION__} identifier
+
+GCC provides three magic variables which hold the name of the current
+function, as a string.  The first of these is @code{__func__}, which
+is part of the C99 standard:
+
+The identifier @code{__func__} is implicitly declared by the translator
+as if, immediately following the opening brace of each function
+definition, the declaration
+
+@smallexample
+static const char __func__[] = "function-name";
+@end smallexample
+
+@noindent
+appeared, where function-name is the name of the lexically-enclosing
+function.  This name is the unadorned name of the function.
+
+@code{__FUNCTION__} is another name for @code{__func__}.  Older
+versions of GCC recognize only this name.  However, it is not
+standardized.  For maximum portability, we recommend you use
+@code{__func__}, but provide a fallback definition with the
+preprocessor:
+
+@smallexample
+#if __STDC_VERSION__ < 199901L
+# if __GNUC__ >= 2
+#  define __func__ __FUNCTION__
+# else
+#  define __func__ "<unknown>"
+# endif
+#endif
+@end smallexample
+
+In C, @code{__PRETTY_FUNCTION__} is yet another name for
+@code{__func__}.  However, in C++, @code{__PRETTY_FUNCTION__} contains
+the type signature of the function as well as its bare name.  For
+example, this program:
+
+@smallexample
+extern "C" @{
+extern int printf (char *, ...);
+@}
+
+class a @{
+ public:
+  void sub (int i)
+    @{
+      printf ("__FUNCTION__ = %s\n", __FUNCTION__);
+      printf ("__PRETTY_FUNCTION__ = %s\n", __PRETTY_FUNCTION__);
+    @}
+@};
+
+int
+main (void)
+@{
+  a ax;
+  ax.sub (0);
+  return 0;
+@}
+@end smallexample
+
+@noindent
+gives this output:
+
+@smallexample
+__FUNCTION__ = sub
+__PRETTY_FUNCTION__ = void a::sub(int)
+@end smallexample
+
+These identifiers are not preprocessor macros.  In GCC 3.3 and
+earlier, in C only, @code{__FUNCTION__} and @code{__PRETTY_FUNCTION__}
+were treated as string literals; they could be used to initialize
+@code{char} arrays, and they could be concatenated with other string
+literals.  GCC 3.4 and later treat them as variables, like
+@code{__func__}.  In C++, @code{__FUNCTION__} and
+@code{__PRETTY_FUNCTION__} have always been variables.
+
+@node Return Address
+@section Getting the Return or Frame Address of a Function
+
+These functions may be used to get information about the callers of a
+function.
+
+@deftypefn {Built-in Function} {void *} __builtin_return_address (unsigned int @var{level})
+This function returns the return address of the current function, or of
+one of its callers.  The @var{level} argument is number of frames to
+scan up the call stack.  A value of @code{0} yields the return address
+of the current function, a value of @code{1} yields the return address
+of the caller of the current function, and so forth.  When inlining
+the expected behavior is that the function will return the address of
+the function that will be returned to.  To work around this behavior use
+the @code{noinline} function attribute.
+
+The @var{level} argument must be a constant integer.
+
+On some machines it may be impossible to determine the return address of
+any function other than the current one; in such cases, or when the top
+of the stack has been reached, this function will return @code{0} or a
+random value.  In addition, @code{__builtin_frame_address} may be used
+to determine if the top of the stack has been reached.
+
+Additional post-processing of the returned value may be needed, see
+@code{__builtin_extract_return_address}.
+
+This function should only be used with a nonzero argument for debugging
+purposes.
+@end deftypefn
+
+@deftypefn {Built-in Function} {void *} __builtin_extract_return_address (void *@var{addr})
+The address as returned by @code{__builtin_return_address} may have to be fed
+through this function to get the actual encoded address.  For example, on the
+31-bit S/390 platform the highest bit has to be masked out, or on SPARC
+platforms an offset has to be added for the true next instruction to be
+executed.
+
+If no fixup is needed, this function simply passes through @var{addr}.
+@end deftypefn
+
+@deftypefn {Built-in Function} {void *} __builtin_frob_return_address (void *@var{addr})
+This function does the reverse of @code{__builtin_extract_return_address}.
+@end deftypefn
+
+@deftypefn {Built-in Function} {void *} __builtin_frame_address (unsigned int @var{level})
+This function is similar to @code{__builtin_return_address}, but it
+returns the address of the function frame rather than the return address
+of the function.  Calling @code{__builtin_frame_address} with a value of
+@code{0} yields the frame address of the current function, a value of
+@code{1} yields the frame address of the caller of the current function,
+and so forth.
+
+The frame is the area on the stack which holds local variables and saved
+registers.  The frame address is normally the address of the first word
+pushed on to the stack by the function.  However, the exact definition
+depends upon the processor and the calling convention.  If the processor
+has a dedicated frame pointer register, and the function has a frame,
+then @code{__builtin_frame_address} will return the value of the frame
+pointer register.
+
+On some machines it may be impossible to determine the frame address of
+any function other than the current one; in such cases, or when the top
+of the stack has been reached, this function will return @code{0} if
+the first frame pointer is properly initialized by the startup code.
+
+This function should only be used with a nonzero argument for debugging
+purposes.
+@end deftypefn
+
+@node Vector Extensions
+@section Using vector instructions through built-in functions
+
+On some targets, the instruction set contains SIMD vector instructions that
+operate on multiple values contained in one large register at the same time.
+For example, on the i386 the MMX, 3DNow!@: and SSE extensions can be used
+this way.
+
+The first step in using these extensions is to provide the necessary data
+types.  This should be done using an appropriate @code{typedef}:
+
+@smallexample
+typedef int v4si __attribute__ ((vector_size (16)));
+@end smallexample
+
+The @code{int} type specifies the base type, while the attribute specifies
+the vector size for the variable, measured in bytes.  For example, the
+declaration above causes the compiler to set the mode for the @code{v4si}
+type to be 16 bytes wide and divided into @code{int} sized units.  For
+a 32-bit @code{int} this means a vector of 4 units of 4 bytes, and the
+corresponding mode of @code{foo} will be @acronym{V4SI}.
+
+The @code{vector_size} attribute is only applicable to integral and
+float scalars, although arrays, pointers, and function return values
+are allowed in conjunction with this construct.
+
+All the basic integer types can be used as base types, both as signed
+and as unsigned: @code{char}, @code{short}, @code{int}, @code{long},
+@code{long long}.  In addition, @code{float} and @code{double} can be
+used to build floating-point vector types.
+
+Specifying a combination that is not valid for the current architecture
+will cause GCC to synthesize the instructions using a narrower mode.
+For example, if you specify a variable of type @code{V4SI} and your
+architecture does not allow for this specific SIMD type, GCC will
+produce code that uses 4 @code{SIs}.
+
+The types defined in this manner can be used with a subset of normal C
+operations.  Currently, GCC will allow using the following operators
+on these types: @code{+, -, *, /, unary minus, ^, |, &, ~, %}@.
+
+The operations behave like C++ @code{valarrays}.  Addition is defined as
+the addition of the corresponding elements of the operands.  For
+example, in the code below, each of the 4 elements in @var{a} will be
+added to the corresponding 4 elements in @var{b} and the resulting
+vector will be stored in @var{c}.
+
+@smallexample
+typedef int v4si __attribute__ ((vector_size (16)));
+
+v4si a, b, c;
+
+c = a + b;
+@end smallexample
+
+Subtraction, multiplication, division, and the logical operations
+operate in a similar manner.  Likewise, the result of using the unary
+minus or complement operators on a vector type is a vector whose
+elements are the negative or complemented values of the corresponding
+elements in the operand.
+
+In C it is possible to use shifting operators @code{<<}, @code{>>} on
+integer-type vectors. The operation is defined as following: @code{@{a0,
+a1, @dots{}, an@} >> @{b0, b1, @dots{}, bn@} == @{a0 >> b0, a1 >> b1,
+@dots{}, an >> bn@}}@. Vector operands must have the same number of
+elements.  Additionally second operands can be a scalar integer in which
+case the scalar is converted to the type used by the vector operand (with
+possible truncation) and each element of this new vector is the scalar's
+value.
+Consider the following code.
+
+@smallexample
+typedef int v4si __attribute__ ((vector_size (16)));
+
+v4si a, b;
+
+b = a >> 1;     /* b = a >> @{1,1,1,1@}; */
+@end smallexample
+
+In C vectors can be subscripted as if the vector were an array with
+the same number of elements and base type.  Out of bound accesses
+invoke undefined behavior at runtime.  Warnings for out of bound
+accesses for vector subscription can be enabled with
+@option{-Warray-bounds}.
+
+You can declare variables and use them in function calls and returns, as
+well as in assignments and some casts.  You can specify a vector type as
+a return type for a function.  Vector types can also be used as function
+arguments.  It is possible to cast from one vector type to another,
+provided they are of the same size (in fact, you can also cast vectors
+to and from other datatypes of the same size).
+
+You cannot operate between vectors of different lengths or different
+signedness without a cast.
+
+A port that supports hardware vector operations, usually provides a set
+of built-in functions that can be used to operate on vectors.  For
+example, a function to add two vectors and multiply the result by a
+third could look like this:
+
+@smallexample
+v4si f (v4si a, v4si b, v4si c)
+@{
+  v4si tmp = __builtin_addv4si (a, b);
+  return __builtin_mulv4si (tmp, c);
+@}
+
+@end smallexample
+
+@node Offsetof
+@section Offsetof
+@findex __builtin_offsetof
+
+GCC implements for both C and C++ a syntactic extension to implement
+the @code{offsetof} macro.
+
+@smallexample
+primary:
+        "__builtin_offsetof" "(" @code{typename} "," offsetof_member_designator ")"
+
+offsetof_member_designator:
+          @code{identifier}
+        | offsetof_member_designator "." @code{identifier}
+        | offsetof_member_designator "[" @code{expr} "]"
+@end smallexample
+
+This extension is sufficient such that
+
+@smallexample
+#define offsetof(@var{type}, @var{member})  __builtin_offsetof (@var{type}, @var{member})
+@end smallexample
+
+is a suitable definition of the @code{offsetof} macro.  In C++, @var{type}
+may be dependent.  In either case, @var{member} may consist of a single
+identifier, or a sequence of member accesses and array references.
+
+@node Atomic Builtins
+@section Built-in functions for atomic memory access
+
+The following builtins are intended to be compatible with those described
+in the @cite{Intel Itanium Processor-specific Application Binary Interface},
+section 7.4.  As such, they depart from the normal GCC practice of using
+the ``__builtin_'' prefix, and further that they are overloaded such that
+they work on multiple types.
+
+The definition given in the Intel documentation allows only for the use of
+the types @code{int}, @code{long}, @code{long long} as well as their unsigned
+counterparts.  GCC will allow any integral scalar or pointer type that is
+1, 2, 4 or 8 bytes in length.
+
+Not all operations are supported by all target processors.  If a particular
+operation cannot be implemented on the target processor, a warning will be
+generated and a call an external function will be generated.  The external
+function will carry the same name as the builtin, with an additional suffix
+@samp{_@var{n}} where @var{n} is the size of the data type.
+
+@c ??? Should we have a mechanism to suppress this warning?  This is almost
+@c useful for implementing the operation under the control of an external
+@c mutex.
+
+In most cases, these builtins are considered a @dfn{full barrier}.  That is,
+no memory operand will be moved across the operation, either forward or
+backward.  Further, instructions will be issued as necessary to prevent the
+processor from speculating loads across the operation and from queuing stores
+after the operation.
+
+All of the routines are described in the Intel documentation to take
+``an optional list of variables protected by the memory barrier''.  It's
+not clear what is meant by that; it could mean that @emph{only} the
+following variables are protected, or it could mean that these variables
+should in addition be protected.  At present GCC ignores this list and
+protects all variables which are globally accessible.  If in the future
+we make some use of this list, an empty list will continue to mean all
+globally accessible variables.
+
+@table @code
+@item @var{type} __sync_fetch_and_add (@var{type} *ptr, @var{type} value, ...)
+@itemx @var{type} __sync_fetch_and_sub (@var{type} *ptr, @var{type} value, ...)
+@itemx @var{type} __sync_fetch_and_or (@var{type} *ptr, @var{type} value, ...)
+@itemx @var{type} __sync_fetch_and_and (@var{type} *ptr, @var{type} value, ...)
+@itemx @var{type} __sync_fetch_and_xor (@var{type} *ptr, @var{type} value, ...)
+@itemx @var{type} __sync_fetch_and_nand (@var{type} *ptr, @var{type} value, ...)
+@findex __sync_fetch_and_add
+@findex __sync_fetch_and_sub
+@findex __sync_fetch_and_or
+@findex __sync_fetch_and_and
+@findex __sync_fetch_and_xor
+@findex __sync_fetch_and_nand
+These builtins perform the operation suggested by the name, and
+returns the value that had previously been in memory.  That is,
+
+@smallexample
+@{ tmp = *ptr; *ptr @var{op}= value; return tmp; @}
+@{ tmp = *ptr; *ptr = ~(tmp & value); return tmp; @}   // nand
+@end smallexample
+
+@emph{Note:} GCC 4.4 and later implement @code{__sync_fetch_and_nand}
+builtin as @code{*ptr = ~(tmp & value)} instead of @code{*ptr = ~tmp & value}.
+
+@item @var{type} __sync_add_and_fetch (@var{type} *ptr, @var{type} value, ...)
+@itemx @var{type} __sync_sub_and_fetch (@var{type} *ptr, @var{type} value, ...)
+@itemx @var{type} __sync_or_and_fetch (@var{type} *ptr, @var{type} value, ...)
+@itemx @var{type} __sync_and_and_fetch (@var{type} *ptr, @var{type} value, ...)
+@itemx @var{type} __sync_xor_and_fetch (@var{type} *ptr, @var{type} value, ...)
+@itemx @var{type} __sync_nand_and_fetch (@var{type} *ptr, @var{type} value, ...)
+@findex __sync_add_and_fetch
+@findex __sync_sub_and_fetch
+@findex __sync_or_and_fetch
+@findex __sync_and_and_fetch
+@findex __sync_xor_and_fetch
+@findex __sync_nand_and_fetch
+These builtins perform the operation suggested by the name, and
+return the new value.  That is,
+
+@smallexample
+@{ *ptr @var{op}= value; return *ptr; @}
+@{ *ptr = ~(*ptr & value); return *ptr; @}   // nand
+@end smallexample
+
+@emph{Note:} GCC 4.4 and later implement @code{__sync_nand_and_fetch}
+builtin as @code{*ptr = ~(*ptr & value)} instead of
+@code{*ptr = ~*ptr & value}.
+
+@item bool __sync_bool_compare_and_swap (@var{type} *ptr, @var{type} oldval @var{type} newval, ...)
+@itemx @var{type} __sync_val_compare_and_swap (@var{type} *ptr, @var{type} oldval @var{type} newval, ...)
+@findex __sync_bool_compare_and_swap
+@findex __sync_val_compare_and_swap
+These builtins perform an atomic compare and swap.  That is, if the current
+value of @code{*@var{ptr}} is @var{oldval}, then write @var{newval} into
+@code{*@var{ptr}}.
+
+The ``bool'' version returns true if the comparison is successful and
+@var{newval} was written.  The ``val'' version returns the contents
+of @code{*@var{ptr}} before the operation.
+
+@item __sync_synchronize (...)
+@findex __sync_synchronize
+This builtin issues a full memory barrier.
+
+@item @var{type} __sync_lock_test_and_set (@var{type} *ptr, @var{type} value, ...)
+@findex __sync_lock_test_and_set
+This builtin, as described by Intel, is not a traditional test-and-set
+operation, but rather an atomic exchange operation.  It writes @var{value}
+into @code{*@var{ptr}}, and returns the previous contents of
+@code{*@var{ptr}}.
+
+Many targets have only minimal support for such locks, and do not support
+a full exchange operation.  In this case, a target may support reduced
+functionality here by which the @emph{only} valid value to store is the
+immediate constant 1.  The exact value actually stored in @code{*@var{ptr}}
+is implementation defined.
+
+This builtin is not a full barrier, but rather an @dfn{acquire barrier}.
+This means that references after the builtin cannot move to (or be
+speculated to) before the builtin, but previous memory stores may not
+be globally visible yet, and previous memory loads may not yet be
+satisfied.
+
+@item void __sync_lock_release (@var{type} *ptr, ...)
+@findex __sync_lock_release
+This builtin releases the lock acquired by @code{__sync_lock_test_and_set}.
+Normally this means writing the constant 0 to @code{*@var{ptr}}.
+
+This builtin is not a full barrier, but rather a @dfn{release barrier}.
+This means that all previous memory stores are globally visible, and all
+previous memory loads have been satisfied, but following memory reads
+are not prevented from being speculated to before the barrier.
+@end table
+
+@node Object Size Checking
+@section Object Size Checking Builtins
+@findex __builtin_object_size
+@findex __builtin___memcpy_chk
+@findex __builtin___mempcpy_chk
+@findex __builtin___memmove_chk
+@findex __builtin___memset_chk
+@findex __builtin___strcpy_chk
+@findex __builtin___stpcpy_chk
+@findex __builtin___strncpy_chk
+@findex __builtin___strcat_chk
+@findex __builtin___strncat_chk
+@findex __builtin___sprintf_chk
+@findex __builtin___snprintf_chk
+@findex __builtin___vsprintf_chk
+@findex __builtin___vsnprintf_chk
+@findex __builtin___printf_chk
+@findex __builtin___vprintf_chk
+@findex __builtin___fprintf_chk
+@findex __builtin___vfprintf_chk
+
+GCC implements a limited buffer overflow protection mechanism
+that can prevent some buffer overflow attacks.
+
+@deftypefn {Built-in Function} {size_t} __builtin_object_size (void * @var{ptr}, int @var{type})
+is a built-in construct that returns a constant number of bytes from
+@var{ptr} to the end of the object @var{ptr} pointer points to
+(if known at compile time).  @code{__builtin_object_size} never evaluates
+its arguments for side-effects.  If there are any side-effects in them, it
+returns @code{(size_t) -1} for @var{type} 0 or 1 and @code{(size_t) 0}
+for @var{type} 2 or 3.  If there are multiple objects @var{ptr} can
+point to and all of them are known at compile time, the returned number
+is the maximum of remaining byte counts in those objects if @var{type} & 2 is
+0 and minimum if nonzero.  If it is not possible to determine which objects
+@var{ptr} points to at compile time, @code{__builtin_object_size} should
+return @code{(size_t) -1} for @var{type} 0 or 1 and @code{(size_t) 0}
+for @var{type} 2 or 3.
+
+@var{type} is an integer constant from 0 to 3.  If the least significant
+bit is clear, objects are whole variables, if it is set, a closest
+surrounding subobject is considered the object a pointer points to.
+The second bit determines if maximum or minimum of remaining bytes
+is computed.
+
+@smallexample
+struct V @{ char buf1[10]; int b; char buf2[10]; @} var;
+char *p = &var.buf1[1], *q = &var.b;
+
+/* Here the object p points to is var.  */
+assert (__builtin_object_size (p, 0) == sizeof (var) - 1);
+/* The subobject p points to is var.buf1.  */
+assert (__builtin_object_size (p, 1) == sizeof (var.buf1) - 1);
+/* The object q points to is var.  */
+assert (__builtin_object_size (q, 0)
+        == (char *) (&var + 1) - (char *) &var.b);
+/* The subobject q points to is var.b.  */
+assert (__builtin_object_size (q, 1) == sizeof (var.b));
+@end smallexample
+@end deftypefn
+
+There are built-in functions added for many common string operation
+functions, e.g., for @code{memcpy} @code{__builtin___memcpy_chk}
+built-in is provided.  This built-in has an additional last argument,
+which is the number of bytes remaining in object the @var{dest}
+argument points to or @code{(size_t) -1} if the size is not known.
+
+The built-in functions are optimized into the normal string functions
+like @code{memcpy} if the last argument is @code{(size_t) -1} or if
+it is known at compile time that the destination object will not
+be overflown.  If the compiler can determine at compile time the
+object will be always overflown, it issues a warning.
+
+The intended use can be e.g.
+
+@smallexample
+#undef memcpy
+#define bos0(dest) __builtin_object_size (dest, 0)
+#define memcpy(dest, src, n) \
+  __builtin___memcpy_chk (dest, src, n, bos0 (dest))
+
+char *volatile p;
+char buf[10];
+/* It is unknown what object p points to, so this is optimized
+   into plain memcpy - no checking is possible.  */
+memcpy (p, "abcde", n);
+/* Destination is known and length too.  It is known at compile
+   time there will be no overflow.  */
+memcpy (&buf[5], "abcde", 5);
+/* Destination is known, but the length is not known at compile time.
+   This will result in __memcpy_chk call that can check for overflow
+   at runtime.  */
+memcpy (&buf[5], "abcde", n);
+/* Destination is known and it is known at compile time there will
+   be overflow.  There will be a warning and __memcpy_chk call that
+   will abort the program at runtime.  */
+memcpy (&buf[6], "abcde", 5);
+@end smallexample
+
+Such built-in functions are provided for @code{memcpy}, @code{mempcpy},
+@code{memmove}, @code{memset}, @code{strcpy}, @code{stpcpy}, @code{strncpy},
+@code{strcat} and @code{strncat}.
+
+There are also checking built-in functions for formatted output functions.
+@smallexample
+int __builtin___sprintf_chk (char *s, int flag, size_t os, const char *fmt, ...);
+int __builtin___snprintf_chk (char *s, size_t maxlen, int flag, size_t os,
+                              const char *fmt, ...);
+int __builtin___vsprintf_chk (char *s, int flag, size_t os, const char *fmt,
+                              va_list ap);
+int __builtin___vsnprintf_chk (char *s, size_t maxlen, int flag, size_t os,
+                               const char *fmt, va_list ap);
+@end smallexample
+
+The added @var{flag} argument is passed unchanged to @code{__sprintf_chk}
+etc.@: functions and can contain implementation specific flags on what
+additional security measures the checking function might take, such as
+handling @code{%n} differently.
+
+The @var{os} argument is the object size @var{s} points to, like in the
+other built-in functions.  There is a small difference in the behavior
+though, if @var{os} is @code{(size_t) -1}, the built-in functions are
+optimized into the non-checking functions only if @var{flag} is 0, otherwise
+the checking function is called with @var{os} argument set to
+@code{(size_t) -1}.
+
+In addition to this, there are checking built-in functions
+@code{__builtin___printf_chk}, @code{__builtin___vprintf_chk},
+@code{__builtin___fprintf_chk} and @code{__builtin___vfprintf_chk}.
+These have just one additional argument, @var{flag}, right before
+format string @var{fmt}.  If the compiler is able to optimize them to
+@code{fputc} etc.@: functions, it will, otherwise the checking function
+should be called and the @var{flag} argument passed to it.
+
+@node Other Builtins
+@section Other built-in functions provided by GCC
+@cindex built-in functions
+@findex __builtin_fpclassify
+@findex __builtin_isfinite
+@findex __builtin_isnormal
+@findex __builtin_isgreater
+@findex __builtin_isgreaterequal
+@findex __builtin_isinf_sign
+@findex __builtin_isless
+@findex __builtin_islessequal
+@findex __builtin_islessgreater
+@findex __builtin_isunordered
+@findex __builtin_powi
+@findex __builtin_powif
+@findex __builtin_powil
+@findex _Exit
+@findex _exit
+@findex abort
+@findex abs
+@findex acos
+@findex acosf
+@findex acosh
+@findex acoshf
+@findex acoshl
+@findex acosl
+@findex alloca
+@findex asin
+@findex asinf
+@findex asinh
+@findex asinhf
+@findex asinhl
+@findex asinl
+@findex atan
+@findex atan2
+@findex atan2f
+@findex atan2l
+@findex atanf
+@findex atanh
+@findex atanhf
+@findex atanhl
+@findex atanl
+@findex bcmp
+@findex bzero
+@findex cabs
+@findex cabsf
+@findex cabsl
+@findex cacos
+@findex cacosf
+@findex cacosh
+@findex cacoshf
+@findex cacoshl
+@findex cacosl
+@findex calloc
+@findex carg
+@findex cargf
+@findex cargl
+@findex casin
+@findex casinf
+@findex casinh
+@findex casinhf
+@findex casinhl
+@findex casinl
+@findex catan
+@findex catanf
+@findex catanh
+@findex catanhf
+@findex catanhl
+@findex catanl
+@findex cbrt
+@findex cbrtf
+@findex cbrtl
+@findex ccos
+@findex ccosf
+@findex ccosh
+@findex ccoshf
+@findex ccoshl
+@findex ccosl
+@findex ceil
+@findex ceilf
+@findex ceill
+@findex cexp
+@findex cexpf
+@findex cexpl
+@findex cimag
+@findex cimagf
+@findex cimagl
+@findex clog
+@findex clogf
+@findex clogl
+@findex conj
+@findex conjf
+@findex conjl
+@findex copysign
+@findex copysignf
+@findex copysignl
+@findex cos
+@findex cosf
+@findex cosh
+@findex coshf
+@findex coshl
+@findex cosl
+@findex cpow
+@findex cpowf
+@findex cpowl
+@findex cproj
+@findex cprojf
+@findex cprojl
+@findex creal
+@findex crealf
+@findex creall
+@findex csin
+@findex csinf
+@findex csinh
+@findex csinhf
+@findex csinhl
+@findex csinl
+@findex csqrt
+@findex csqrtf
+@findex csqrtl
+@findex ctan
+@findex ctanf
+@findex ctanh
+@findex ctanhf
+@findex ctanhl
+@findex ctanl
+@findex dcgettext
+@findex dgettext
+@findex drem
+@findex dremf
+@findex dreml
+@findex erf
+@findex erfc
+@findex erfcf
+@findex erfcl
+@findex erff
+@findex erfl
+@findex exit
+@findex exp
+@findex exp10
+@findex exp10f
+@findex exp10l
+@findex exp2
+@findex exp2f
+@findex exp2l
+@findex expf
+@findex expl
+@findex expm1
+@findex expm1f
+@findex expm1l
+@findex fabs
+@findex fabsf
+@findex fabsl
+@findex fdim
+@findex fdimf
+@findex fdiml
+@findex ffs
+@findex floor
+@findex floorf
+@findex floorl
+@findex fma
+@findex fmaf
+@findex fmal
+@findex fmax
+@findex fmaxf
+@findex fmaxl
+@findex fmin
+@findex fminf
+@findex fminl
+@findex fmod
+@findex fmodf
+@findex fmodl
+@findex fprintf
+@findex fprintf_unlocked
+@findex fputs
+@findex fputs_unlocked
+@findex frexp
+@findex frexpf
+@findex frexpl
+@findex fscanf
+@findex gamma
+@findex gammaf
+@findex gammal
+@findex gamma_r
+@findex gammaf_r
+@findex gammal_r
+@findex gettext
+@findex hypot
+@findex hypotf
+@findex hypotl
+@findex ilogb
+@findex ilogbf
+@findex ilogbl
+@findex imaxabs
+@findex index
+@findex isalnum
+@findex isalpha
+@findex isascii
+@findex isblank
+@findex iscntrl
+@findex isdigit
+@findex isgraph
+@findex islower
+@findex isprint
+@findex ispunct
+@findex isspace
+@findex isupper
+@findex iswalnum
+@findex iswalpha
+@findex iswblank
+@findex iswcntrl
+@findex iswdigit
+@findex iswgraph
+@findex iswlower
+@findex iswprint
+@findex iswpunct
+@findex iswspace
+@findex iswupper
+@findex iswxdigit
+@findex isxdigit
+@findex j0
+@findex j0f
+@findex j0l
+@findex j1
+@findex j1f
+@findex j1l
+@findex jn
+@findex jnf
+@findex jnl
+@findex labs
+@findex ldexp
+@findex ldexpf
+@findex ldexpl
+@findex lgamma
+@findex lgammaf
+@findex lgammal
+@findex lgamma_r
+@findex lgammaf_r
+@findex lgammal_r
+@findex llabs
+@findex llrint
+@findex llrintf
+@findex llrintl
+@findex llround
+@findex llroundf
+@findex llroundl
+@findex log
+@findex log10
+@findex log10f
+@findex log10l
+@findex log1p
+@findex log1pf
+@findex log1pl
+@findex log2
+@findex log2f
+@findex log2l
+@findex logb
+@findex logbf
+@findex logbl
+@findex logf
+@findex logl
+@findex lrint
+@findex lrintf
+@findex lrintl
+@findex lround
+@findex lroundf
+@findex lroundl
+@findex malloc
+@findex memchr
+@findex memcmp
+@findex memcpy
+@findex mempcpy
+@findex memset
+@findex modf
+@findex modff
+@findex modfl
+@findex nearbyint
+@findex nearbyintf
+@findex nearbyintl
+@findex nextafter
+@findex nextafterf
+@findex nextafterl
+@findex nexttoward
+@findex nexttowardf
+@findex nexttowardl
+@findex pow
+@findex pow10
+@findex pow10f
+@findex pow10l
+@findex powf
+@findex powl
+@findex printf
+@findex printf_unlocked
+@findex putchar
+@findex puts
+@findex remainder
+@findex remainderf
+@findex remainderl
+@findex remquo
+@findex remquof
+@findex remquol
+@findex rindex
+@findex rint
+@findex rintf
+@findex rintl
+@findex round
+@findex roundf
+@findex roundl
+@findex scalb
+@findex scalbf
+@findex scalbl
+@findex scalbln
+@findex scalblnf
+@findex scalblnf
+@findex scalbn
+@findex scalbnf
+@findex scanfnl
+@findex signbit
+@findex signbitf
+@findex signbitl
+@findex signbitd32
+@findex signbitd64
+@findex signbitd128
+@findex significand
+@findex significandf
+@findex significandl
+@findex sin
+@findex sincos
+@findex sincosf
+@findex sincosl
+@findex sinf
+@findex sinh
+@findex sinhf
+@findex sinhl
+@findex sinl
+@findex snprintf
+@findex sprintf
+@findex sqrt
+@findex sqrtf
+@findex sqrtl
+@findex sscanf
+@findex stpcpy
+@findex stpncpy
+@findex strcasecmp
+@findex strcat
+@findex strchr
+@findex strcmp
+@findex strcpy
+@findex strcspn
+@findex strdup
+@findex strfmon
+@findex strftime
+@findex strlen
+@findex strncasecmp
+@findex strncat
+@findex strncmp
+@findex strncpy
+@findex strndup
+@findex strpbrk
+@findex strrchr
+@findex strspn
+@findex strstr
+@findex tan
+@findex tanf
+@findex tanh
+@findex tanhf
+@findex tanhl
+@findex tanl
+@findex tgamma
+@findex tgammaf
+@findex tgammal
+@findex toascii
+@findex tolower
+@findex toupper
+@findex towlower
+@findex towupper
+@findex trunc
+@findex truncf
+@findex truncl
+@findex vfprintf
+@findex vfscanf
+@findex vprintf
+@findex vscanf
+@findex vsnprintf
+@findex vsprintf
+@findex vsscanf
+@findex y0
+@findex y0f
+@findex y0l
+@findex y1
+@findex y1f
+@findex y1l
+@findex yn
+@findex ynf
+@findex ynl
+
+GCC provides a large number of built-in functions other than the ones
+mentioned above.  Some of these are for internal use in the processing
+of exceptions or variable-length argument lists and will not be
+documented here because they may change from time to time; we do not
+recommend general use of these functions.
+
+The remaining functions are provided for optimization purposes.
+
+@opindex fno-builtin
+GCC includes built-in versions of many of the functions in the standard
+C library.  The versions prefixed with @code{__builtin_} will always be
+treated as having the same meaning as the C library function even if you
+specify the @option{-fno-builtin} option.  (@pxref{C Dialect Options})
+Many of these functions are only optimized in certain cases; if they are
+not optimized in a particular case, a call to the library function will
+be emitted.
+
+@opindex ansi
+@opindex std
+Outside strict ISO C mode (@option{-ansi}, @option{-std=c90},
+@option{-std=c99} or @option{-std=c1x}), the functions
+@code{_exit}, @code{alloca}, @code{bcmp}, @code{bzero},
+@code{dcgettext}, @code{dgettext}, @code{dremf}, @code{dreml},
+@code{drem}, @code{exp10f}, @code{exp10l}, @code{exp10}, @code{ffsll},
+@code{ffsl}, @code{ffs}, @code{fprintf_unlocked},
+@code{fputs_unlocked}, @code{gammaf}, @code{gammal}, @code{gamma},
+@code{gammaf_r}, @code{gammal_r}, @code{gamma_r}, @code{gettext},
+@code{index}, @code{isascii}, @code{j0f}, @code{j0l}, @code{j0},
+@code{j1f}, @code{j1l}, @code{j1}, @code{jnf}, @code{jnl}, @code{jn},
+@code{lgammaf_r}, @code{lgammal_r}, @code{lgamma_r}, @code{mempcpy},
+@code{pow10f}, @code{pow10l}, @code{pow10}, @code{printf_unlocked},
+@code{rindex}, @code{scalbf}, @code{scalbl}, @code{scalb},
+@code{signbit}, @code{signbitf}, @code{signbitl}, @code{signbitd32},
+@code{signbitd64}, @code{signbitd128}, @code{significandf},
+@code{significandl}, @code{significand}, @code{sincosf},
+@code{sincosl}, @code{sincos}, @code{stpcpy}, @code{stpncpy},
+@code{strcasecmp}, @code{strdup}, @code{strfmon}, @code{strncasecmp},
+@code{strndup}, @code{toascii}, @code{y0f}, @code{y0l}, @code{y0},
+@code{y1f}, @code{y1l}, @code{y1}, @code{ynf}, @code{ynl} and
+@code{yn}
+may be handled as built-in functions.
+All these functions have corresponding versions
+prefixed with @code{__builtin_}, which may be used even in strict C90
+mode.
+
+The ISO C99 functions
+@code{_Exit}, @code{acoshf}, @code{acoshl}, @code{acosh}, @code{asinhf},
+@code{asinhl}, @code{asinh}, @code{atanhf}, @code{atanhl}, @code{atanh},
+@code{cabsf}, @code{cabsl}, @code{cabs}, @code{cacosf}, @code{cacoshf},
+@code{cacoshl}, @code{cacosh}, @code{cacosl}, @code{cacos},
+@code{cargf}, @code{cargl}, @code{carg}, @code{casinf}, @code{casinhf},
+@code{casinhl}, @code{casinh}, @code{casinl}, @code{casin},
+@code{catanf}, @code{catanhf}, @code{catanhl}, @code{catanh},
+@code{catanl}, @code{catan}, @code{cbrtf}, @code{cbrtl}, @code{cbrt},
+@code{ccosf}, @code{ccoshf}, @code{ccoshl}, @code{ccosh}, @code{ccosl},
+@code{ccos}, @code{cexpf}, @code{cexpl}, @code{cexp}, @code{cimagf},
+@code{cimagl}, @code{cimag}, @code{clogf}, @code{clogl}, @code{clog},
+@code{conjf}, @code{conjl}, @code{conj}, @code{copysignf}, @code{copysignl},
+@code{copysign}, @code{cpowf}, @code{cpowl}, @code{cpow}, @code{cprojf},
+@code{cprojl}, @code{cproj}, @code{crealf}, @code{creall}, @code{creal},
+@code{csinf}, @code{csinhf}, @code{csinhl}, @code{csinh}, @code{csinl},
+@code{csin}, @code{csqrtf}, @code{csqrtl}, @code{csqrt}, @code{ctanf},
+@code{ctanhf}, @code{ctanhl}, @code{ctanh}, @code{ctanl}, @code{ctan},
+@code{erfcf}, @code{erfcl}, @code{erfc}, @code{erff}, @code{erfl},
+@code{erf}, @code{exp2f}, @code{exp2l}, @code{exp2}, @code{expm1f},
+@code{expm1l}, @code{expm1}, @code{fdimf}, @code{fdiml}, @code{fdim},
+@code{fmaf}, @code{fmal}, @code{fmaxf}, @code{fmaxl}, @code{fmax},
+@code{fma}, @code{fminf}, @code{fminl}, @code{fmin}, @code{hypotf},
+@code{hypotl}, @code{hypot}, @code{ilogbf}, @code{ilogbl}, @code{ilogb},
+@code{imaxabs}, @code{isblank}, @code{iswblank}, @code{lgammaf},
+@code{lgammal}, @code{lgamma}, @code{llabs}, @code{llrintf}, @code{llrintl},
+@code{llrint}, @code{llroundf}, @code{llroundl}, @code{llround},
+@code{log1pf}, @code{log1pl}, @code{log1p}, @code{log2f}, @code{log2l},
+@code{log2}, @code{logbf}, @code{logbl}, @code{logb}, @code{lrintf},
+@code{lrintl}, @code{lrint}, @code{lroundf}, @code{lroundl},
+@code{lround}, @code{nearbyintf}, @code{nearbyintl}, @code{nearbyint},
+@code{nextafterf}, @code{nextafterl}, @code{nextafter},
+@code{nexttowardf}, @code{nexttowardl}, @code{nexttoward},
+@code{remainderf}, @code{remainderl}, @code{remainder}, @code{remquof},
+@code{remquol}, @code{remquo}, @code{rintf}, @code{rintl}, @code{rint},
+@code{roundf}, @code{roundl}, @code{round}, @code{scalblnf},
+@code{scalblnl}, @code{scalbln}, @code{scalbnf}, @code{scalbnl},
+@code{scalbn}, @code{snprintf}, @code{tgammaf}, @code{tgammal},
+@code{tgamma}, @code{truncf}, @code{truncl}, @code{trunc},
+@code{vfscanf}, @code{vscanf}, @code{vsnprintf} and @code{vsscanf}
+are handled as built-in functions
+except in strict ISO C90 mode (@option{-ansi} or @option{-std=c90}).
+
+There are also built-in versions of the ISO C99 functions
+@code{acosf}, @code{acosl}, @code{asinf}, @code{asinl}, @code{atan2f},
+@code{atan2l}, @code{atanf}, @code{atanl}, @code{ceilf}, @code{ceill},
+@code{cosf}, @code{coshf}, @code{coshl}, @code{cosl}, @code{expf},
+@code{expl}, @code{fabsf}, @code{fabsl}, @code{floorf}, @code{floorl},
+@code{fmodf}, @code{fmodl}, @code{frexpf}, @code{frexpl}, @code{ldexpf},
+@code{ldexpl}, @code{log10f}, @code{log10l}, @code{logf}, @code{logl},
+@code{modfl}, @code{modf}, @code{powf}, @code{powl}, @code{sinf},
+@code{sinhf}, @code{sinhl}, @code{sinl}, @code{sqrtf}, @code{sqrtl},
+@code{tanf}, @code{tanhf}, @code{tanhl} and @code{tanl}
+that are recognized in any mode since ISO C90 reserves these names for
+the purpose to which ISO C99 puts them.  All these functions have
+corresponding versions prefixed with @code{__builtin_}.
+
+The ISO C94 functions
+@code{iswalnum}, @code{iswalpha}, @code{iswcntrl}, @code{iswdigit},
+@code{iswgraph}, @code{iswlower}, @code{iswprint}, @code{iswpunct},
+@code{iswspace}, @code{iswupper}, @code{iswxdigit}, @code{towlower} and
+@code{towupper}
+are handled as built-in functions
+except in strict ISO C90 mode (@option{-ansi} or @option{-std=c90}).
+
+The ISO C90 functions
+@code{abort}, @code{abs}, @code{acos}, @code{asin}, @code{atan2},
+@code{atan}, @code{calloc}, @code{ceil}, @code{cosh}, @code{cos},
+@code{exit}, @code{exp}, @code{fabs}, @code{floor}, @code{fmod},
+@code{fprintf}, @code{fputs}, @code{frexp}, @code{fscanf},
+@code{isalnum}, @code{isalpha}, @code{iscntrl}, @code{isdigit},
+@code{isgraph}, @code{islower}, @code{isprint}, @code{ispunct},
+@code{isspace}, @code{isupper}, @code{isxdigit}, @code{tolower},
+@code{toupper}, @code{labs}, @code{ldexp}, @code{log10}, @code{log},
+@code{malloc}, @code{memchr}, @code{memcmp}, @code{memcpy},
+@code{memset}, @code{modf}, @code{pow}, @code{printf}, @code{putchar},
+@code{puts}, @code{scanf}, @code{sinh}, @code{sin}, @code{snprintf},
+@code{sprintf}, @code{sqrt}, @code{sscanf}, @code{strcat},
+@code{strchr}, @code{strcmp}, @code{strcpy}, @code{strcspn},
+@code{strlen}, @code{strncat}, @code{strncmp}, @code{strncpy},
+@code{strpbrk}, @code{strrchr}, @code{strspn}, @code{strstr},
+@code{tanh}, @code{tan}, @code{vfprintf}, @code{vprintf} and @code{vsprintf}
+are all recognized as built-in functions unless
+@option{-fno-builtin} is specified (or @option{-fno-builtin-@var{function}}
+is specified for an individual function).  All of these functions have
+corresponding versions prefixed with @code{__builtin_}.
+
+GCC provides built-in versions of the ISO C99 floating point comparison
+macros that avoid raising exceptions for unordered operands.  They have
+the same names as the standard macros ( @code{isgreater},
+@code{isgreaterequal}, @code{isless}, @code{islessequal},
+@code{islessgreater}, and @code{isunordered}) , with @code{__builtin_}
+prefixed.  We intend for a library implementor to be able to simply
+@code{#define} each standard macro to its built-in equivalent.
+In the same fashion, GCC provides @code{fpclassify}, @code{isfinite},
+@code{isinf_sign} and @code{isnormal} built-ins used with
+@code{__builtin_} prefixed.  The @code{isinf} and @code{isnan}
+builtins appear both with and without the @code{__builtin_} prefix.
+
+@deftypefn {Built-in Function} int __builtin_types_compatible_p (@var{type1}, @var{type2})
+
+You can use the built-in function @code{__builtin_types_compatible_p} to
+determine whether two types are the same.
+
+This built-in function returns 1 if the unqualified versions of the
+types @var{type1} and @var{type2} (which are types, not expressions) are
+compatible, 0 otherwise.  The result of this built-in function can be
+used in integer constant expressions.
+
+This built-in function ignores top level qualifiers (e.g., @code{const},
+@code{volatile}).  For example, @code{int} is equivalent to @code{const
+int}.
+
+The type @code{int[]} and @code{int[5]} are compatible.  On the other
+hand, @code{int} and @code{char *} are not compatible, even if the size
+of their types, on the particular architecture are the same.  Also, the
+amount of pointer indirection is taken into account when determining
+similarity.  Consequently, @code{short *} is not similar to
+@code{short **}.  Furthermore, two types that are typedefed are
+considered compatible if their underlying types are compatible.
+
+An @code{enum} type is not considered to be compatible with another
+@code{enum} type even if both are compatible with the same integer
+type; this is what the C standard specifies.
+For example, @code{enum @{foo, bar@}} is not similar to
+@code{enum @{hot, dog@}}.
+
+You would typically use this function in code whose execution varies
+depending on the arguments' types.  For example:
+
+@smallexample
+#define foo(x)                                                  \
+  (@{                                                           \
+    typeof (x) tmp = (x);                                       \
+    if (__builtin_types_compatible_p (typeof (x), long double)) \
+      tmp = foo_long_double (tmp);                              \
+    else if (__builtin_types_compatible_p (typeof (x), double)) \
+      tmp = foo_double (tmp);                                   \
+    else if (__builtin_types_compatible_p (typeof (x), float))  \
+      tmp = foo_float (tmp);                                    \
+    else                                                        \
+      abort ();                                                 \
+    tmp;                                                        \
+  @})
+@end smallexample
+
+@emph{Note:} This construct is only available for C@.
+
+@end deftypefn
+
+@deftypefn {Built-in Function} @var{type} __builtin_choose_expr (@var{const_exp}, @var{exp1}, @var{exp2})
+
+You can use the built-in function @code{__builtin_choose_expr} to
+evaluate code depending on the value of a constant expression.  This
+built-in function returns @var{exp1} if @var{const_exp}, which is an
+integer constant expression, is nonzero.  Otherwise it returns @var{exp2}.
+
+This built-in function is analogous to the @samp{? :} operator in C,
+except that the expression returned has its type unaltered by promotion
+rules.  Also, the built-in function does not evaluate the expression
+that was not chosen.  For example, if @var{const_exp} evaluates to true,
+@var{exp2} is not evaluated even if it has side-effects.
+
+This built-in function can return an lvalue if the chosen argument is an
+lvalue.
+
+If @var{exp1} is returned, the return type is the same as @var{exp1}'s
+type.  Similarly, if @var{exp2} is returned, its return type is the same
+as @var{exp2}.
+
+Example:
+
+@smallexample
+#define foo(x)                                                    \
+  __builtin_choose_expr (                                         \
+    __builtin_types_compatible_p (typeof (x), double),            \
+    foo_double (x),                                               \
+    __builtin_choose_expr (                                       \
+      __builtin_types_compatible_p (typeof (x), float),           \
+      foo_float (x),                                              \
+      /* @r{The void expression results in a compile-time error}  \
+         @r{when assigning the result to something.}  */          \
+      (void)0))
+@end smallexample
+
+@emph{Note:} This construct is only available for C@.  Furthermore, the
+unused expression (@var{exp1} or @var{exp2} depending on the value of
+@var{const_exp}) may still generate syntax errors.  This may change in
+future revisions.
+
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_constant_p (@var{exp})
+You can use the built-in function @code{__builtin_constant_p} to
+determine if a value is known to be constant at compile-time and hence
+that GCC can perform constant-folding on expressions involving that
+value.  The argument of the function is the value to test.  The function
+returns the integer 1 if the argument is known to be a compile-time
+constant and 0 if it is not known to be a compile-time constant.  A
+return of 0 does not indicate that the value is @emph{not} a constant,
+but merely that GCC cannot prove it is a constant with the specified
+value of the @option{-O} option.
+
+You would typically use this function in an embedded application where
+memory was a critical resource.  If you have some complex calculation,
+you may want it to be folded if it involves constants, but need to call
+a function if it does not.  For example:
+
+@smallexample
+#define Scale_Value(X)      \
+  (__builtin_constant_p (X) \
+  ? ((X) * SCALE + OFFSET) : Scale (X))
+@end smallexample
+
+You may use this built-in function in either a macro or an inline
+function.  However, if you use it in an inlined function and pass an
+argument of the function as the argument to the built-in, GCC will
+never return 1 when you call the inline function with a string constant
+or compound literal (@pxref{Compound Literals}) and will not return 1
+when you pass a constant numeric value to the inline function unless you
+specify the @option{-O} option.
+
+You may also use @code{__builtin_constant_p} in initializers for static
+data.  For instance, you can write
+
+@smallexample
+static const int table[] = @{
+   __builtin_constant_p (EXPRESSION) ? (EXPRESSION) : -1,
+   /* @r{@dots{}} */
+@};
+@end smallexample
+
+@noindent
+This is an acceptable initializer even if @var{EXPRESSION} is not a
+constant expression, including the case where
+@code{__builtin_constant_p} returns 1 because @var{EXPRESSION} can be
+folded to a constant but @var{EXPRESSION} contains operands that would
+not otherwise be permitted in a static initializer (for example,
+@code{0 && foo ()}).  GCC must be more conservative about evaluating the
+built-in in this case, because it has no opportunity to perform
+optimization.
+
+Previous versions of GCC did not accept this built-in in data
+initializers.  The earliest version where it is completely safe is
+3.0.1.
+@end deftypefn
+
+@deftypefn {Built-in Function} long __builtin_expect (long @var{exp}, long @var{c})
+@opindex fprofile-arcs
+You may use @code{__builtin_expect} to provide the compiler with
+branch prediction information.  In general, you should prefer to
+use actual profile feedback for this (@option{-fprofile-arcs}), as
+programmers are notoriously bad at predicting how their programs
+actually perform.  However, there are applications in which this
+data is hard to collect.
+
+The return value is the value of @var{exp}, which should be an integral
+expression.  The semantics of the built-in are that it is expected that
+@var{exp} == @var{c}.  For example:
+
+@smallexample
+if (__builtin_expect (x, 0))
+  foo ();
+@end smallexample
+
+@noindent
+would indicate that we do not expect to call @code{foo}, since
+we expect @code{x} to be zero.  Since you are limited to integral
+expressions for @var{exp}, you should use constructions such as
+
+@smallexample
+if (__builtin_expect (ptr != NULL, 1))
+  error ();
+@end smallexample
+
+@noindent
+when testing pointer or floating-point values.
+@end deftypefn
+
+@deftypefn {Built-in Function} void __builtin_trap (void)
+This function causes the program to exit abnormally.  GCC implements
+this function by using a target-dependent mechanism (such as
+intentionally executing an illegal instruction) or by calling
+@code{abort}.  The mechanism used may vary from release to release so
+you should not rely on any particular implementation.
+@end deftypefn
+
+@deftypefn {Built-in Function} void __builtin_unreachable (void)
+If control flow reaches the point of the @code{__builtin_unreachable},
+the program is undefined.  It is useful in situations where the
+compiler cannot deduce the unreachability of the code.
+
+One such case is immediately following an @code{asm} statement that
+will either never terminate, or one that transfers control elsewhere
+and never returns.  In this example, without the
+@code{__builtin_unreachable}, GCC would issue a warning that control
+reaches the end of a non-void function.  It would also generate code
+to return after the @code{asm}.
+
+@smallexample
+int f (int c, int v)
+@{
+  if (c)
+    @{
+      return v;
+    @}
+  else
+    @{
+      asm("jmp error_handler");
+      __builtin_unreachable ();
+    @}
+@}
+@end smallexample
+
+Because the @code{asm} statement unconditionally transfers control out
+of the function, control will never reach the end of the function
+body.  The @code{__builtin_unreachable} is in fact unreachable and
+communicates this fact to the compiler.
+
+Another use for @code{__builtin_unreachable} is following a call a
+function that never returns but that is not declared
+@code{__attribute__((noreturn))}, as in this example:
+
+@smallexample
+void function_that_never_returns (void);
+
+int g (int c)
+@{
+  if (c)
+    @{
+      return 1;
+    @}
+  else
+    @{
+      function_that_never_returns ();
+      __builtin_unreachable ();
+    @}
+@}
+@end smallexample
+
+@end deftypefn
+
+@deftypefn {Built-in Function} void __builtin___clear_cache (char *@var{begin}, char *@var{end})
+This function is used to flush the processor's instruction cache for
+the region of memory between @var{begin} inclusive and @var{end}
+exclusive.  Some targets require that the instruction cache be
+flushed, after modifying memory containing code, in order to obtain
+deterministic behavior.
+
+If the target does not require instruction cache flushes,
+@code{__builtin___clear_cache} has no effect.  Otherwise either
+instructions are emitted in-line to clear the instruction cache or a
+call to the @code{__clear_cache} function in libgcc is made.
+@end deftypefn
+
+@deftypefn {Built-in Function} void __builtin_prefetch (const void *@var{addr}, ...)
+This function is used to minimize cache-miss latency by moving data into
+a cache before it is accessed.
+You can insert calls to @code{__builtin_prefetch} into code for which
+you know addresses of data in memory that is likely to be accessed soon.
+If the target supports them, data prefetch instructions will be generated.
+If the prefetch is done early enough before the access then the data will
+be in the cache by the time it is accessed.
+
+The value of @var{addr} is the address of the memory to prefetch.
+There are two optional arguments, @var{rw} and @var{locality}.
+The value of @var{rw} is a compile-time constant one or zero; one
+means that the prefetch is preparing for a write to the memory address
+and zero, the default, means that the prefetch is preparing for a read.
+The value @var{locality} must be a compile-time constant integer between
+zero and three.  A value of zero means that the data has no temporal
+locality, so it need not be left in the cache after the access.  A value
+of three means that the data has a high degree of temporal locality and
+should be left in all levels of cache possible.  Values of one and two
+mean, respectively, a low or moderate degree of temporal locality.  The
+default is three.
+
+@smallexample
+for (i = 0; i < n; i++)
+  @{
+    a[i] = a[i] + b[i];
+    __builtin_prefetch (&a[i+j], 1, 1);
+    __builtin_prefetch (&b[i+j], 0, 1);
+    /* @r{@dots{}} */
+  @}
+@end smallexample
+
+Data prefetch does not generate faults if @var{addr} is invalid, but
+the address expression itself must be valid.  For example, a prefetch
+of @code{p->next} will not fault if @code{p->next} is not a valid
+address, but evaluation will fault if @code{p} is not a valid address.
+
+If the target does not support data prefetch, the address expression
+is evaluated if it includes side effects but no other code is generated
+and GCC does not issue a warning.
+@end deftypefn
+
+@deftypefn {Built-in Function} double __builtin_huge_val (void)
+Returns a positive infinity, if supported by the floating-point format,
+else @code{DBL_MAX}.  This function is suitable for implementing the
+ISO C macro @code{HUGE_VAL}.
+@end deftypefn
+
+@deftypefn {Built-in Function} float __builtin_huge_valf (void)
+Similar to @code{__builtin_huge_val}, except the return type is @code{float}.
+@end deftypefn
+
+@deftypefn {Built-in Function} {long double} __builtin_huge_vall (void)
+Similar to @code{__builtin_huge_val}, except the return
+type is @code{long double}.
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_fpclassify (int, int, int, int, int, ...)
+This built-in implements the C99 fpclassify functionality.  The first
+five int arguments should be the target library's notion of the
+possible FP classes and are used for return values.  They must be
+constant values and they must appear in this order: @code{FP_NAN},
+@code{FP_INFINITE}, @code{FP_NORMAL}, @code{FP_SUBNORMAL} and
+@code{FP_ZERO}.  The ellipsis is for exactly one floating point value
+to classify.  GCC treats the last argument as type-generic, which
+means it does not do default promotion from float to double.
+@end deftypefn
+
+@deftypefn {Built-in Function} double __builtin_inf (void)
+Similar to @code{__builtin_huge_val}, except a warning is generated
+if the target floating-point format does not support infinities.
+@end deftypefn
+
+@deftypefn {Built-in Function} _Decimal32 __builtin_infd32 (void)
+Similar to @code{__builtin_inf}, except the return type is @code{_Decimal32}.
+@end deftypefn
+
+@deftypefn {Built-in Function} _Decimal64 __builtin_infd64 (void)
+Similar to @code{__builtin_inf}, except the return type is @code{_Decimal64}.
+@end deftypefn
+
+@deftypefn {Built-in Function} _Decimal128 __builtin_infd128 (void)
+Similar to @code{__builtin_inf}, except the return type is @code{_Decimal128}.
+@end deftypefn
+
+@deftypefn {Built-in Function} float __builtin_inff (void)
+Similar to @code{__builtin_inf}, except the return type is @code{float}.
+This function is suitable for implementing the ISO C99 macro @code{INFINITY}.
+@end deftypefn
+
+@deftypefn {Built-in Function} {long double} __builtin_infl (void)
+Similar to @code{__builtin_inf}, except the return
+type is @code{long double}.
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_isinf_sign (...)
+Similar to @code{isinf}, except the return value will be negative for
+an argument of @code{-Inf}.  Note while the parameter list is an
+ellipsis, this function only accepts exactly one floating point
+argument.  GCC treats this parameter as type-generic, which means it
+does not do default promotion from float to double.
+@end deftypefn
+
+@deftypefn {Built-in Function} double __builtin_nan (const char *str)
+This is an implementation of the ISO C99 function @code{nan}.
+
+Since ISO C99 defines this function in terms of @code{strtod}, which we
+do not implement, a description of the parsing is in order.  The string
+is parsed as by @code{strtol}; that is, the base is recognized by
+leading @samp{0} or @samp{0x} prefixes.  The number parsed is placed
+in the significand such that the least significant bit of the number
+is at the least significant bit of the significand.  The number is
+truncated to fit the significand field provided.  The significand is
+forced to be a quiet NaN@.
+
+This function, if given a string literal all of which would have been
+consumed by strtol, is evaluated early enough that it is considered a
+compile-time constant.
+@end deftypefn
+
+@deftypefn {Built-in Function} _Decimal32 __builtin_nand32 (const char *str)
+Similar to @code{__builtin_nan}, except the return type is @code{_Decimal32}.
+@end deftypefn
+
+@deftypefn {Built-in Function} _Decimal64 __builtin_nand64 (const char *str)
+Similar to @code{__builtin_nan}, except the return type is @code{_Decimal64}.
+@end deftypefn
+
+@deftypefn {Built-in Function} _Decimal128 __builtin_nand128 (const char *str)
+Similar to @code{__builtin_nan}, except the return type is @code{_Decimal128}.
+@end deftypefn
+
+@deftypefn {Built-in Function} float __builtin_nanf (const char *str)
+Similar to @code{__builtin_nan}, except the return type is @code{float}.
+@end deftypefn
+
+@deftypefn {Built-in Function} {long double} __builtin_nanl (const char *str)
+Similar to @code{__builtin_nan}, except the return type is @code{long double}.
+@end deftypefn
+
+@deftypefn {Built-in Function} double __builtin_nans (const char *str)
+Similar to @code{__builtin_nan}, except the significand is forced
+to be a signaling NaN@.  The @code{nans} function is proposed by
+@uref{http://www.open-std.org/jtc1/sc22/wg14/www/docs/n965.htm,,WG14 N965}.
+@end deftypefn
+
+@deftypefn {Built-in Function} float __builtin_nansf (const char *str)
+Similar to @code{__builtin_nans}, except the return type is @code{float}.
+@end deftypefn
+
+@deftypefn {Built-in Function} {long double} __builtin_nansl (const char *str)
+Similar to @code{__builtin_nans}, except the return type is @code{long double}.
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_ffs (unsigned int x)
+Returns one plus the index of the least significant 1-bit of @var{x}, or
+if @var{x} is zero, returns zero.
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_clz (unsigned int x)
+Returns the number of leading 0-bits in @var{x}, starting at the most
+significant bit position.  If @var{x} is 0, the result is undefined.
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_ctz (unsigned int x)
+Returns the number of trailing 0-bits in @var{x}, starting at the least
+significant bit position.  If @var{x} is 0, the result is undefined.
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_popcount (unsigned int x)
+Returns the number of 1-bits in @var{x}.
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_parity (unsigned int x)
+Returns the parity of @var{x}, i.e.@: the number of 1-bits in @var{x}
+modulo 2.
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_ffsl (unsigned long)
+Similar to @code{__builtin_ffs}, except the argument type is
+@code{unsigned long}.
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_clzl (unsigned long)
+Similar to @code{__builtin_clz}, except the argument type is
+@code{unsigned long}.
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_ctzl (unsigned long)
+Similar to @code{__builtin_ctz}, except the argument type is
+@code{unsigned long}.
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_popcountl (unsigned long)
+Similar to @code{__builtin_popcount}, except the argument type is
+@code{unsigned long}.
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_parityl (unsigned long)
+Similar to @code{__builtin_parity}, except the argument type is
+@code{unsigned long}.
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_ffsll (unsigned long long)
+Similar to @code{__builtin_ffs}, except the argument type is
+@code{unsigned long long}.
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_clzll (unsigned long long)
+Similar to @code{__builtin_clz}, except the argument type is
+@code{unsigned long long}.
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_ctzll (unsigned long long)
+Similar to @code{__builtin_ctz}, except the argument type is
+@code{unsigned long long}.
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_popcountll (unsigned long long)
+Similar to @code{__builtin_popcount}, except the argument type is
+@code{unsigned long long}.
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_parityll (unsigned long long)
+Similar to @code{__builtin_parity}, except the argument type is
+@code{unsigned long long}.
+@end deftypefn
+
+@deftypefn {Built-in Function} double __builtin_powi (double, int)
+Returns the first argument raised to the power of the second.  Unlike the
+@code{pow} function no guarantees about precision and rounding are made.
+@end deftypefn
+
+@deftypefn {Built-in Function} float __builtin_powif (float, int)
+Similar to @code{__builtin_powi}, except the argument and return types
+are @code{float}.
+@end deftypefn
+
+@deftypefn {Built-in Function} {long double} __builtin_powil (long double, int)
+Similar to @code{__builtin_powi}, except the argument and return types
+are @code{long double}.
+@end deftypefn
+
+@deftypefn {Built-in Function} int32_t __builtin_bswap32 (int32_t x)
+Returns @var{x} with the order of the bytes reversed; for example,
+@code{0xaabbccdd} becomes @code{0xddccbbaa}.  Byte here always means
+exactly 8 bits.
+@end deftypefn
+
+@deftypefn {Built-in Function} int64_t __builtin_bswap64 (int64_t x)
+Similar to @code{__builtin_bswap32}, except the argument and return types
+are 64-bit.
+@end deftypefn
+
+@node Target Builtins
+@section Built-in Functions Specific to Particular Target Machines
+
+On some target machines, GCC supports many built-in functions specific
+to those machines.  Generally these generate calls to specific machine
+instructions, but allow the compiler to schedule those calls.
+
+@menu
+* Alpha Built-in Functions::
+* ARM iWMMXt Built-in Functions::
+* ARM NEON Intrinsics::
+* Blackfin Built-in Functions::
+* FR-V Built-in Functions::
+* X86 Built-in Functions::
+* MIPS DSP Built-in Functions::
+* MIPS Paired-Single Support::
+* MIPS Loongson Built-in Functions::
+* Other MIPS Built-in Functions::
+* picoChip Built-in Functions::
+* PowerPC AltiVec/VSX Built-in Functions::
+* RX Built-in Functions::
+* SPARC VIS Built-in Functions::
+* SPU Built-in Functions::
+@end menu
+
+@node Alpha Built-in Functions
+@subsection Alpha Built-in Functions
+
+These built-in functions are available for the Alpha family of
+processors, depending on the command-line switches used.
+
+The following built-in functions are always available.  They
+all generate the machine instruction that is part of the name.
+
+@smallexample
+long __builtin_alpha_implver (void)
+long __builtin_alpha_rpcc (void)
+long __builtin_alpha_amask (long)
+long __builtin_alpha_cmpbge (long, long)
+long __builtin_alpha_extbl (long, long)
+long __builtin_alpha_extwl (long, long)
+long __builtin_alpha_extll (long, long)
+long __builtin_alpha_extql (long, long)
+long __builtin_alpha_extwh (long, long)
+long __builtin_alpha_extlh (long, long)
+long __builtin_alpha_extqh (long, long)
+long __builtin_alpha_insbl (long, long)
+long __builtin_alpha_inswl (long, long)
+long __builtin_alpha_insll (long, long)
+long __builtin_alpha_insql (long, long)
+long __builtin_alpha_inswh (long, long)
+long __builtin_alpha_inslh (long, long)
+long __builtin_alpha_insqh (long, long)
+long __builtin_alpha_mskbl (long, long)
+long __builtin_alpha_mskwl (long, long)
+long __builtin_alpha_mskll (long, long)
+long __builtin_alpha_mskql (long, long)
+long __builtin_alpha_mskwh (long, long)
+long __builtin_alpha_msklh (long, long)
+long __builtin_alpha_mskqh (long, long)
+long __builtin_alpha_umulh (long, long)
+long __builtin_alpha_zap (long, long)
+long __builtin_alpha_zapnot (long, long)
+@end smallexample
+
+The following built-in functions are always with @option{-mmax}
+or @option{-mcpu=@var{cpu}} where @var{cpu} is @code{pca56} or
+later.  They all generate the machine instruction that is part
+of the name.
+
+@smallexample
+long __builtin_alpha_pklb (long)
+long __builtin_alpha_pkwb (long)
+long __builtin_alpha_unpkbl (long)
+long __builtin_alpha_unpkbw (long)
+long __builtin_alpha_minub8 (long, long)
+long __builtin_alpha_minsb8 (long, long)
+long __builtin_alpha_minuw4 (long, long)
+long __builtin_alpha_minsw4 (long, long)
+long __builtin_alpha_maxub8 (long, long)
+long __builtin_alpha_maxsb8 (long, long)
+long __builtin_alpha_maxuw4 (long, long)
+long __builtin_alpha_maxsw4 (long, long)
+long __builtin_alpha_perr (long, long)
+@end smallexample
+
+The following built-in functions are always with @option{-mcix}
+or @option{-mcpu=@var{cpu}} where @var{cpu} is @code{ev67} or
+later.  They all generate the machine instruction that is part
+of the name.
+
+@smallexample
+long __builtin_alpha_cttz (long)
+long __builtin_alpha_ctlz (long)
+long __builtin_alpha_ctpop (long)
+@end smallexample
+
+The following builtins are available on systems that use the OSF/1
+PALcode.  Normally they invoke the @code{rduniq} and @code{wruniq}
+PAL calls, but when invoked with @option{-mtls-kernel}, they invoke
+@code{rdval} and @code{wrval}.
+
+@smallexample
+void *__builtin_thread_pointer (void)
+void __builtin_set_thread_pointer (void *)
+@end smallexample
+
+@node ARM iWMMXt Built-in Functions
+@subsection ARM iWMMXt Built-in Functions
+
+These built-in functions are available for the ARM family of
+processors when the @option{-mcpu=iwmmxt} switch is used:
+
+@smallexample
+typedef int v2si __attribute__ ((vector_size (8)));
+typedef short v4hi __attribute__ ((vector_size (8)));
+typedef char v8qi __attribute__ ((vector_size (8)));
+
+int __builtin_arm_getwcx (int)
+void __builtin_arm_setwcx (int, int)
+int __builtin_arm_textrmsb (v8qi, int)
+int __builtin_arm_textrmsh (v4hi, int)
+int __builtin_arm_textrmsw (v2si, int)
+int __builtin_arm_textrmub (v8qi, int)
+int __builtin_arm_textrmuh (v4hi, int)
+int __builtin_arm_textrmuw (v2si, int)
+v8qi __builtin_arm_tinsrb (v8qi, int)
+v4hi __builtin_arm_tinsrh (v4hi, int)
+v2si __builtin_arm_tinsrw (v2si, int)
+long long __builtin_arm_tmia (long long, int, int)
+long long __builtin_arm_tmiabb (long long, int, int)
+long long __builtin_arm_tmiabt (long long, int, int)
+long long __builtin_arm_tmiaph (long long, int, int)
+long long __builtin_arm_tmiatb (long long, int, int)
+long long __builtin_arm_tmiatt (long long, int, int)
+int __builtin_arm_tmovmskb (v8qi)
+int __builtin_arm_tmovmskh (v4hi)
+int __builtin_arm_tmovmskw (v2si)
+long long __builtin_arm_waccb (v8qi)
+long long __builtin_arm_wacch (v4hi)
+long long __builtin_arm_waccw (v2si)
+v8qi __builtin_arm_waddb (v8qi, v8qi)
+v8qi __builtin_arm_waddbss (v8qi, v8qi)
+v8qi __builtin_arm_waddbus (v8qi, v8qi)
+v4hi __builtin_arm_waddh (v4hi, v4hi)
+v4hi __builtin_arm_waddhss (v4hi, v4hi)
+v4hi __builtin_arm_waddhus (v4hi, v4hi)
+v2si __builtin_arm_waddw (v2si, v2si)
+v2si __builtin_arm_waddwss (v2si, v2si)
+v2si __builtin_arm_waddwus (v2si, v2si)
+v8qi __builtin_arm_walign (v8qi, v8qi, int)
+long long __builtin_arm_wand(long long, long long)
+long long __builtin_arm_wandn (long long, long long)
+v8qi __builtin_arm_wavg2b (v8qi, v8qi)
+v8qi __builtin_arm_wavg2br (v8qi, v8qi)
+v4hi __builtin_arm_wavg2h (v4hi, v4hi)
+v4hi __builtin_arm_wavg2hr (v4hi, v4hi)
+v8qi __builtin_arm_wcmpeqb (v8qi, v8qi)
+v4hi __builtin_arm_wcmpeqh (v4hi, v4hi)
+v2si __builtin_arm_wcmpeqw (v2si, v2si)
+v8qi __builtin_arm_wcmpgtsb (v8qi, v8qi)
+v4hi __builtin_arm_wcmpgtsh (v4hi, v4hi)
+v2si __builtin_arm_wcmpgtsw (v2si, v2si)
+v8qi __builtin_arm_wcmpgtub (v8qi, v8qi)
+v4hi __builtin_arm_wcmpgtuh (v4hi, v4hi)
+v2si __builtin_arm_wcmpgtuw (v2si, v2si)
+long long __builtin_arm_wmacs (long long, v4hi, v4hi)
+long long __builtin_arm_wmacsz (v4hi, v4hi)
+long long __builtin_arm_wmacu (long long, v4hi, v4hi)
+long long __builtin_arm_wmacuz (v4hi, v4hi)
+v4hi __builtin_arm_wmadds (v4hi, v4hi)
+v4hi __builtin_arm_wmaddu (v4hi, v4hi)
+v8qi __builtin_arm_wmaxsb (v8qi, v8qi)
+v4hi __builtin_arm_wmaxsh (v4hi, v4hi)
+v2si __builtin_arm_wmaxsw (v2si, v2si)
+v8qi __builtin_arm_wmaxub (v8qi, v8qi)
+v4hi __builtin_arm_wmaxuh (v4hi, v4hi)
+v2si __builtin_arm_wmaxuw (v2si, v2si)
+v8qi __builtin_arm_wminsb (v8qi, v8qi)
+v4hi __builtin_arm_wminsh (v4hi, v4hi)
+v2si __builtin_arm_wminsw (v2si, v2si)
+v8qi __builtin_arm_wminub (v8qi, v8qi)
+v4hi __builtin_arm_wminuh (v4hi, v4hi)
+v2si __builtin_arm_wminuw (v2si, v2si)
+v4hi __builtin_arm_wmulsm (v4hi, v4hi)
+v4hi __builtin_arm_wmulul (v4hi, v4hi)
+v4hi __builtin_arm_wmulum (v4hi, v4hi)
+long long __builtin_arm_wor (long long, long long)
+v2si __builtin_arm_wpackdss (long long, long long)
+v2si __builtin_arm_wpackdus (long long, long long)
+v8qi __builtin_arm_wpackhss (v4hi, v4hi)
+v8qi __builtin_arm_wpackhus (v4hi, v4hi)
+v4hi __builtin_arm_wpackwss (v2si, v2si)
+v4hi __builtin_arm_wpackwus (v2si, v2si)
+long long __builtin_arm_wrord (long long, long long)
+long long __builtin_arm_wrordi (long long, int)
+v4hi __builtin_arm_wrorh (v4hi, long long)
+v4hi __builtin_arm_wrorhi (v4hi, int)
+v2si __builtin_arm_wrorw (v2si, long long)
+v2si __builtin_arm_wrorwi (v2si, int)
+v2si __builtin_arm_wsadb (v8qi, v8qi)
+v2si __builtin_arm_wsadbz (v8qi, v8qi)
+v2si __builtin_arm_wsadh (v4hi, v4hi)
+v2si __builtin_arm_wsadhz (v4hi, v4hi)
+v4hi __builtin_arm_wshufh (v4hi, int)
+long long __builtin_arm_wslld (long long, long long)
+long long __builtin_arm_wslldi (long long, int)
+v4hi __builtin_arm_wsllh (v4hi, long long)
+v4hi __builtin_arm_wsllhi (v4hi, int)
+v2si __builtin_arm_wsllw (v2si, long long)
+v2si __builtin_arm_wsllwi (v2si, int)
+long long __builtin_arm_wsrad (long long, long long)
+long long __builtin_arm_wsradi (long long, int)
+v4hi __builtin_arm_wsrah (v4hi, long long)
+v4hi __builtin_arm_wsrahi (v4hi, int)
+v2si __builtin_arm_wsraw (v2si, long long)
+v2si __builtin_arm_wsrawi (v2si, int)
+long long __builtin_arm_wsrld (long long, long long)
+long long __builtin_arm_wsrldi (long long, int)
+v4hi __builtin_arm_wsrlh (v4hi, long long)
+v4hi __builtin_arm_wsrlhi (v4hi, int)
+v2si __builtin_arm_wsrlw (v2si, long long)
+v2si __builtin_arm_wsrlwi (v2si, int)
+v8qi __builtin_arm_wsubb (v8qi, v8qi)
+v8qi __builtin_arm_wsubbss (v8qi, v8qi)
+v8qi __builtin_arm_wsubbus (v8qi, v8qi)
+v4hi __builtin_arm_wsubh (v4hi, v4hi)
+v4hi __builtin_arm_wsubhss (v4hi, v4hi)
+v4hi __builtin_arm_wsubhus (v4hi, v4hi)
+v2si __builtin_arm_wsubw (v2si, v2si)
+v2si __builtin_arm_wsubwss (v2si, v2si)
+v2si __builtin_arm_wsubwus (v2si, v2si)
+v4hi __builtin_arm_wunpckehsb (v8qi)
+v2si __builtin_arm_wunpckehsh (v4hi)
+long long __builtin_arm_wunpckehsw (v2si)
+v4hi __builtin_arm_wunpckehub (v8qi)
+v2si __builtin_arm_wunpckehuh (v4hi)
+long long __builtin_arm_wunpckehuw (v2si)
+v4hi __builtin_arm_wunpckelsb (v8qi)
+v2si __builtin_arm_wunpckelsh (v4hi)
+long long __builtin_arm_wunpckelsw (v2si)
+v4hi __builtin_arm_wunpckelub (v8qi)
+v2si __builtin_arm_wunpckeluh (v4hi)
+long long __builtin_arm_wunpckeluw (v2si)
+v8qi __builtin_arm_wunpckihb (v8qi, v8qi)
+v4hi __builtin_arm_wunpckihh (v4hi, v4hi)
+v2si __builtin_arm_wunpckihw (v2si, v2si)
+v8qi __builtin_arm_wunpckilb (v8qi, v8qi)
+v4hi __builtin_arm_wunpckilh (v4hi, v4hi)
+v2si __builtin_arm_wunpckilw (v2si, v2si)
+long long __builtin_arm_wxor (long long, long long)
+long long __builtin_arm_wzero ()
+@end smallexample
+
+@node ARM NEON Intrinsics
+@subsection ARM NEON Intrinsics
+
+These built-in intrinsics for the ARM Advanced SIMD extension are available
+when the @option{-mfpu=neon} switch is used:
+
+@include arm-neon-intrinsics.texi
+
+@node Blackfin Built-in Functions
+@subsection Blackfin Built-in Functions
+
+Currently, there are two Blackfin-specific built-in functions.  These are
+used for generating @code{CSYNC} and @code{SSYNC} machine insns without
+using inline assembly; by using these built-in functions the compiler can
+automatically add workarounds for hardware errata involving these
+instructions.  These functions are named as follows:
+
+@smallexample
+void __builtin_bfin_csync (void)
+void __builtin_bfin_ssync (void)
+@end smallexample
+
+@node FR-V Built-in Functions
+@subsection FR-V Built-in Functions
+
+GCC provides many FR-V-specific built-in functions.  In general,
+these functions are intended to be compatible with those described
+by @cite{FR-V Family, Softune C/C++ Compiler Manual (V6), Fujitsu
+Semiconductor}.  The two exceptions are @code{__MDUNPACKH} and
+@code{__MBTOHE}, the gcc forms of which pass 128-bit values by
+pointer rather than by value.
+
+Most of the functions are named after specific FR-V instructions.
+Such functions are said to be ``directly mapped'' and are summarized
+here in tabular form.
+
+@menu
+* Argument Types::
+* Directly-mapped Integer Functions::
+* Directly-mapped Media Functions::
+* Raw read/write Functions::
+* Other Built-in Functions::
+@end menu
+
+@node Argument Types
+@subsubsection Argument Types
+
+The arguments to the built-in functions can be divided into three groups:
+register numbers, compile-time constants and run-time values.  In order
+to make this classification clear at a glance, the arguments and return
+values are given the following pseudo types:
+
+@multitable @columnfractions .20 .30 .15 .35
+@item Pseudo type @tab Real C type @tab Constant? @tab Description
+@item @code{uh} @tab @code{unsigned short} @tab No @tab an unsigned halfword
+@item @code{uw1} @tab @code{unsigned int} @tab No @tab an unsigned word
+@item @code{sw1} @tab @code{int} @tab No @tab a signed word
+@item @code{uw2} @tab @code{unsigned long long} @tab No
+@tab an unsigned doubleword
+@item @code{sw2} @tab @code{long long} @tab No @tab a signed doubleword
+@item @code{const} @tab @code{int} @tab Yes @tab an integer constant
+@item @code{acc} @tab @code{int} @tab Yes @tab an ACC register number
+@item @code{iacc} @tab @code{int} @tab Yes @tab an IACC register number
+@end multitable
+
+These pseudo types are not defined by GCC, they are simply a notational
+convenience used in this manual.
+
+Arguments of type @code{uh}, @code{uw1}, @code{sw1}, @code{uw2}
+and @code{sw2} are evaluated at run time.  They correspond to
+register operands in the underlying FR-V instructions.
+
+@code{const} arguments represent immediate operands in the underlying
+FR-V instructions.  They must be compile-time constants.
+
+@code{acc} arguments are evaluated at compile time and specify the number
+of an accumulator register.  For example, an @code{acc} argument of 2
+will select the ACC2 register.
+
+@code{iacc} arguments are similar to @code{acc} arguments but specify the
+number of an IACC register.  See @pxref{Other Built-in Functions}
+for more details.
+
+@node Directly-mapped Integer Functions
+@subsubsection Directly-mapped Integer Functions
+
+The functions listed below map directly to FR-V I-type instructions.
+
+@multitable @columnfractions .45 .32 .23
+@item Function prototype @tab Example usage @tab Assembly output
+@item @code{sw1 __ADDSS (sw1, sw1)}
+@tab @code{@var{c} = __ADDSS (@var{a}, @var{b})}
+@tab @code{ADDSS @var{a},@var{b},@var{c}}
+@item @code{sw1 __SCAN (sw1, sw1)}
+@tab @code{@var{c} = __SCAN (@var{a}, @var{b})}
+@tab @code{SCAN @var{a},@var{b},@var{c}}
+@item @code{sw1 __SCUTSS (sw1)}
+@tab @code{@var{b} = __SCUTSS (@var{a})}
+@tab @code{SCUTSS @var{a},@var{b}}
+@item @code{sw1 __SLASS (sw1, sw1)}
+@tab @code{@var{c} = __SLASS (@var{a}, @var{b})}
+@tab @code{SLASS @var{a},@var{b},@var{c}}
+@item @code{void __SMASS (sw1, sw1)}
+@tab @code{__SMASS (@var{a}, @var{b})}
+@tab @code{SMASS @var{a},@var{b}}
+@item @code{void __SMSSS (sw1, sw1)}
+@tab @code{__SMSSS (@var{a}, @var{b})}
+@tab @code{SMSSS @var{a},@var{b}}
+@item @code{void __SMU (sw1, sw1)}
+@tab @code{__SMU (@var{a}, @var{b})}
+@tab @code{SMU @var{a},@var{b}}
+@item @code{sw2 __SMUL (sw1, sw1)}
+@tab @code{@var{c} = __SMUL (@var{a}, @var{b})}
+@tab @code{SMUL @var{a},@var{b},@var{c}}
+@item @code{sw1 __SUBSS (sw1, sw1)}
+@tab @code{@var{c} = __SUBSS (@var{a}, @var{b})}
+@tab @code{SUBSS @var{a},@var{b},@var{c}}
+@item @code{uw2 __UMUL (uw1, uw1)}
+@tab @code{@var{c} = __UMUL (@var{a}, @var{b})}
+@tab @code{UMUL @var{a},@var{b},@var{c}}
+@end multitable
+
+@node Directly-mapped Media Functions
+@subsubsection Directly-mapped Media Functions
+
+The functions listed below map directly to FR-V M-type instructions.
+
+@multitable @columnfractions .45 .32 .23
+@item Function prototype @tab Example usage @tab Assembly output
+@item @code{uw1 __MABSHS (sw1)}
+@tab @code{@var{b} = __MABSHS (@var{a})}
+@tab @code{MABSHS @var{a},@var{b}}
+@item @code{void __MADDACCS (acc, acc)}
+@tab @code{__MADDACCS (@var{b}, @var{a})}
+@tab @code{MADDACCS @var{a},@var{b}}
+@item @code{sw1 __MADDHSS (sw1, sw1)}
+@tab @code{@var{c} = __MADDHSS (@var{a}, @var{b})}
+@tab @code{MADDHSS @var{a},@var{b},@var{c}}
+@item @code{uw1 __MADDHUS (uw1, uw1)}
+@tab @code{@var{c} = __MADDHUS (@var{a}, @var{b})}
+@tab @code{MADDHUS @var{a},@var{b},@var{c}}
+@item @code{uw1 __MAND (uw1, uw1)}
+@tab @code{@var{c} = __MAND (@var{a}, @var{b})}
+@tab @code{MAND @var{a},@var{b},@var{c}}
+@item @code{void __MASACCS (acc, acc)}
+@tab @code{__MASACCS (@var{b}, @var{a})}
+@tab @code{MASACCS @var{a},@var{b}}
+@item @code{uw1 __MAVEH (uw1, uw1)}
+@tab @code{@var{c} = __MAVEH (@var{a}, @var{b})}
+@tab @code{MAVEH @var{a},@var{b},@var{c}}
+@item @code{uw2 __MBTOH (uw1)}
+@tab @code{@var{b} = __MBTOH (@var{a})}
+@tab @code{MBTOH @var{a},@var{b}}
+@item @code{void __MBTOHE (uw1 *, uw1)}
+@tab @code{__MBTOHE (&@var{b}, @var{a})}
+@tab @code{MBTOHE @var{a},@var{b}}
+@item @code{void __MCLRACC (acc)}
+@tab @code{__MCLRACC (@var{a})}
+@tab @code{MCLRACC @var{a}}
+@item @code{void __MCLRACCA (void)}
+@tab @code{__MCLRACCA ()}
+@tab @code{MCLRACCA}
+@item @code{uw1 __Mcop1 (uw1, uw1)}
+@tab @code{@var{c} = __Mcop1 (@var{a}, @var{b})}
+@tab @code{Mcop1 @var{a},@var{b},@var{c}}
+@item @code{uw1 __Mcop2 (uw1, uw1)}
+@tab @code{@var{c} = __Mcop2 (@var{a}, @var{b})}
+@tab @code{Mcop2 @var{a},@var{b},@var{c}}
+@item @code{uw1 __MCPLHI (uw2, const)}
+@tab @code{@var{c} = __MCPLHI (@var{a}, @var{b})}
+@tab @code{MCPLHI @var{a},#@var{b},@var{c}}
+@item @code{uw1 __MCPLI (uw2, const)}
+@tab @code{@var{c} = __MCPLI (@var{a}, @var{b})}
+@tab @code{MCPLI @var{a},#@var{b},@var{c}}
+@item @code{void __MCPXIS (acc, sw1, sw1)}
+@tab @code{__MCPXIS (@var{c}, @var{a}, @var{b})}
+@tab @code{MCPXIS @var{a},@var{b},@var{c}}
+@item @code{void __MCPXIU (acc, uw1, uw1)}
+@tab @code{__MCPXIU (@var{c}, @var{a}, @var{b})}
+@tab @code{MCPXIU @var{a},@var{b},@var{c}}
+@item @code{void __MCPXRS (acc, sw1, sw1)}
+@tab @code{__MCPXRS (@var{c}, @var{a}, @var{b})}
+@tab @code{MCPXRS @var{a},@var{b},@var{c}}
+@item @code{void __MCPXRU (acc, uw1, uw1)}
+@tab @code{__MCPXRU (@var{c}, @var{a}, @var{b})}
+@tab @code{MCPXRU @var{a},@var{b},@var{c}}
+@item @code{uw1 __MCUT (acc, uw1)}
+@tab @code{@var{c} = __MCUT (@var{a}, @var{b})}
+@tab @code{MCUT @var{a},@var{b},@var{c}}
+@item @code{uw1 __MCUTSS (acc, sw1)}
+@tab @code{@var{c} = __MCUTSS (@var{a}, @var{b})}
+@tab @code{MCUTSS @var{a},@var{b},@var{c}}
+@item @code{void __MDADDACCS (acc, acc)}
+@tab @code{__MDADDACCS (@var{b}, @var{a})}
+@tab @code{MDADDACCS @var{a},@var{b}}
+@item @code{void __MDASACCS (acc, acc)}
+@tab @code{__MDASACCS (@var{b}, @var{a})}
+@tab @code{MDASACCS @var{a},@var{b}}
+@item @code{uw2 __MDCUTSSI (acc, const)}
+@tab @code{@var{c} = __MDCUTSSI (@var{a}, @var{b})}
+@tab @code{MDCUTSSI @var{a},#@var{b},@var{c}}
+@item @code{uw2 __MDPACKH (uw2, uw2)}
+@tab @code{@var{c} = __MDPACKH (@var{a}, @var{b})}
+@tab @code{MDPACKH @var{a},@var{b},@var{c}}
+@item @code{uw2 __MDROTLI (uw2, const)}
+@tab @code{@var{c} = __MDROTLI (@var{a}, @var{b})}
+@tab @code{MDROTLI @var{a},#@var{b},@var{c}}
+@item @code{void __MDSUBACCS (acc, acc)}
+@tab @code{__MDSUBACCS (@var{b}, @var{a})}
+@tab @code{MDSUBACCS @var{a},@var{b}}
+@item @code{void __MDUNPACKH (uw1 *, uw2)}
+@tab @code{__MDUNPACKH (&@var{b}, @var{a})}
+@tab @code{MDUNPACKH @var{a},@var{b}}
+@item @code{uw2 __MEXPDHD (uw1, const)}
+@tab @code{@var{c} = __MEXPDHD (@var{a}, @var{b})}
+@tab @code{MEXPDHD @var{a},#@var{b},@var{c}}
+@item @code{uw1 __MEXPDHW (uw1, const)}
+@tab @code{@var{c} = __MEXPDHW (@var{a}, @var{b})}
+@tab @code{MEXPDHW @var{a},#@var{b},@var{c}}
+@item @code{uw1 __MHDSETH (uw1, const)}
+@tab @code{@var{c} = __MHDSETH (@var{a}, @var{b})}
+@tab @code{MHDSETH @var{a},#@var{b},@var{c}}
+@item @code{sw1 __MHDSETS (const)}
+@tab @code{@var{b} = __MHDSETS (@var{a})}
+@tab @code{MHDSETS #@var{a},@var{b}}
+@item @code{uw1 __MHSETHIH (uw1, const)}
+@tab @code{@var{b} = __MHSETHIH (@var{b}, @var{a})}
+@tab @code{MHSETHIH #@var{a},@var{b}}
+@item @code{sw1 __MHSETHIS (sw1, const)}
+@tab @code{@var{b} = __MHSETHIS (@var{b}, @var{a})}
+@tab @code{MHSETHIS #@var{a},@var{b}}
+@item @code{uw1 __MHSETLOH (uw1, const)}
+@tab @code{@var{b} = __MHSETLOH (@var{b}, @var{a})}
+@tab @code{MHSETLOH #@var{a},@var{b}}
+@item @code{sw1 __MHSETLOS (sw1, const)}
+@tab @code{@var{b} = __MHSETLOS (@var{b}, @var{a})}
+@tab @code{MHSETLOS #@var{a},@var{b}}
+@item @code{uw1 __MHTOB (uw2)}
+@tab @code{@var{b} = __MHTOB (@var{a})}
+@tab @code{MHTOB @var{a},@var{b}}
+@item @code{void __MMACHS (acc, sw1, sw1)}
+@tab @code{__MMACHS (@var{c}, @var{a}, @var{b})}
+@tab @code{MMACHS @var{a},@var{b},@var{c}}
+@item @code{void __MMACHU (acc, uw1, uw1)}
+@tab @code{__MMACHU (@var{c}, @var{a}, @var{b})}
+@tab @code{MMACHU @var{a},@var{b},@var{c}}
+@item @code{void __MMRDHS (acc, sw1, sw1)}
+@tab @code{__MMRDHS (@var{c}, @var{a}, @var{b})}
+@tab @code{MMRDHS @var{a},@var{b},@var{c}}
+@item @code{void __MMRDHU (acc, uw1, uw1)}
+@tab @code{__MMRDHU (@var{c}, @var{a}, @var{b})}
+@tab @code{MMRDHU @var{a},@var{b},@var{c}}
+@item @code{void __MMULHS (acc, sw1, sw1)}
+@tab @code{__MMULHS (@var{c}, @var{a}, @var{b})}
+@tab @code{MMULHS @var{a},@var{b},@var{c}}
+@item @code{void __MMULHU (acc, uw1, uw1)}
+@tab @code{__MMULHU (@var{c}, @var{a}, @var{b})}
+@tab @code{MMULHU @var{a},@var{b},@var{c}}
+@item @code{void __MMULXHS (acc, sw1, sw1)}
+@tab @code{__MMULXHS (@var{c}, @var{a}, @var{b})}
+@tab @code{MMULXHS @var{a},@var{b},@var{c}}
+@item @code{void __MMULXHU (acc, uw1, uw1)}
+@tab @code{__MMULXHU (@var{c}, @var{a}, @var{b})}
+@tab @code{MMULXHU @var{a},@var{b},@var{c}}
+@item @code{uw1 __MNOT (uw1)}
+@tab @code{@var{b} = __MNOT (@var{a})}
+@tab @code{MNOT @var{a},@var{b}}
+@item @code{uw1 __MOR (uw1, uw1)}
+@tab @code{@var{c} = __MOR (@var{a}, @var{b})}
+@tab @code{MOR @var{a},@var{b},@var{c}}
+@item @code{uw1 __MPACKH (uh, uh)}
+@tab @code{@var{c} = __MPACKH (@var{a}, @var{b})}
+@tab @code{MPACKH @var{a},@var{b},@var{c}}
+@item @code{sw2 __MQADDHSS (sw2, sw2)}
+@tab @code{@var{c} = __MQADDHSS (@var{a}, @var{b})}
+@tab @code{MQADDHSS @var{a},@var{b},@var{c}}
+@item @code{uw2 __MQADDHUS (uw2, uw2)}
+@tab @code{@var{c} = __MQADDHUS (@var{a}, @var{b})}
+@tab @code{MQADDHUS @var{a},@var{b},@var{c}}
+@item @code{void __MQCPXIS (acc, sw2, sw2)}
+@tab @code{__MQCPXIS (@var{c}, @var{a}, @var{b})}
+@tab @code{MQCPXIS @var{a},@var{b},@var{c}}
+@item @code{void __MQCPXIU (acc, uw2, uw2)}
+@tab @code{__MQCPXIU (@var{c}, @var{a}, @var{b})}
+@tab @code{MQCPXIU @var{a},@var{b},@var{c}}
+@item @code{void __MQCPXRS (acc, sw2, sw2)}
+@tab @code{__MQCPXRS (@var{c}, @var{a}, @var{b})}
+@tab @code{MQCPXRS @var{a},@var{b},@var{c}}
+@item @code{void __MQCPXRU (acc, uw2, uw2)}
+@tab @code{__MQCPXRU (@var{c}, @var{a}, @var{b})}
+@tab @code{MQCPXRU @var{a},@var{b},@var{c}}
+@item @code{sw2 __MQLCLRHS (sw2, sw2)}
+@tab @code{@var{c} = __MQLCLRHS (@var{a}, @var{b})}
+@tab @code{MQLCLRHS @var{a},@var{b},@var{c}}
+@item @code{sw2 __MQLMTHS (sw2, sw2)}
+@tab @code{@var{c} = __MQLMTHS (@var{a}, @var{b})}
+@tab @code{MQLMTHS @var{a},@var{b},@var{c}}
+@item @code{void __MQMACHS (acc, sw2, sw2)}
+@tab @code{__MQMACHS (@var{c}, @var{a}, @var{b})}
+@tab @code{MQMACHS @var{a},@var{b},@var{c}}
+@item @code{void __MQMACHU (acc, uw2, uw2)}
+@tab @code{__MQMACHU (@var{c}, @var{a}, @var{b})}
+@tab @code{MQMACHU @var{a},@var{b},@var{c}}
+@item @code{void __MQMACXHS (acc, sw2, sw2)}
+@tab @code{__MQMACXHS (@var{c}, @var{a}, @var{b})}
+@tab @code{MQMACXHS @var{a},@var{b},@var{c}}
+@item @code{void __MQMULHS (acc, sw2, sw2)}
+@tab @code{__MQMULHS (@var{c}, @var{a}, @var{b})}
+@tab @code{MQMULHS @var{a},@var{b},@var{c}}
+@item @code{void __MQMULHU (acc, uw2, uw2)}
+@tab @code{__MQMULHU (@var{c}, @var{a}, @var{b})}
+@tab @code{MQMULHU @var{a},@var{b},@var{c}}
+@item @code{void __MQMULXHS (acc, sw2, sw2)}
+@tab @code{__MQMULXHS (@var{c}, @var{a}, @var{b})}
+@tab @code{MQMULXHS @var{a},@var{b},@var{c}}
+@item @code{void __MQMULXHU (acc, uw2, uw2)}
+@tab @code{__MQMULXHU (@var{c}, @var{a}, @var{b})}
+@tab @code{MQMULXHU @var{a},@var{b},@var{c}}
+@item @code{sw2 __MQSATHS (sw2, sw2)}
+@tab @code{@var{c} = __MQSATHS (@var{a}, @var{b})}
+@tab @code{MQSATHS @var{a},@var{b},@var{c}}
+@item @code{uw2 __MQSLLHI (uw2, int)}
+@tab @code{@var{c} = __MQSLLHI (@var{a}, @var{b})}
+@tab @code{MQSLLHI @var{a},@var{b},@var{c}}
+@item @code{sw2 __MQSRAHI (sw2, int)}
+@tab @code{@var{c} = __MQSRAHI (@var{a}, @var{b})}
+@tab @code{MQSRAHI @var{a},@var{b},@var{c}}
+@item @code{sw2 __MQSUBHSS (sw2, sw2)}
+@tab @code{@var{c} = __MQSUBHSS (@var{a}, @var{b})}
+@tab @code{MQSUBHSS @var{a},@var{b},@var{c}}
+@item @code{uw2 __MQSUBHUS (uw2, uw2)}
+@tab @code{@var{c} = __MQSUBHUS (@var{a}, @var{b})}
+@tab @code{MQSUBHUS @var{a},@var{b},@var{c}}
+@item @code{void __MQXMACHS (acc, sw2, sw2)}
+@tab @code{__MQXMACHS (@var{c}, @var{a}, @var{b})}
+@tab @code{MQXMACHS @var{a},@var{b},@var{c}}
+@item @code{void __MQXMACXHS (acc, sw2, sw2)}
+@tab @code{__MQXMACXHS (@var{c}, @var{a}, @var{b})}
+@tab @code{MQXMACXHS @var{a},@var{b},@var{c}}
+@item @code{uw1 __MRDACC (acc)}
+@tab @code{@var{b} = __MRDACC (@var{a})}
+@tab @code{MRDACC @var{a},@var{b}}
+@item @code{uw1 __MRDACCG (acc)}
+@tab @code{@var{b} = __MRDACCG (@var{a})}
+@tab @code{MRDACCG @var{a},@var{b}}
+@item @code{uw1 __MROTLI (uw1, const)}
+@tab @code{@var{c} = __MROTLI (@var{a}, @var{b})}
+@tab @code{MROTLI @var{a},#@var{b},@var{c}}
+@item @code{uw1 __MROTRI (uw1, const)}
+@tab @code{@var{c} = __MROTRI (@var{a}, @var{b})}
+@tab @code{MROTRI @var{a},#@var{b},@var{c}}
+@item @code{sw1 __MSATHS (sw1, sw1)}
+@tab @code{@var{c} = __MSATHS (@var{a}, @var{b})}
+@tab @code{MSATHS @var{a},@var{b},@var{c}}
+@item @code{uw1 __MSATHU (uw1, uw1)}
+@tab @code{@var{c} = __MSATHU (@var{a}, @var{b})}
+@tab @code{MSATHU @var{a},@var{b},@var{c}}
+@item @code{uw1 __MSLLHI (uw1, const)}
+@tab @code{@var{c} = __MSLLHI (@var{a}, @var{b})}
+@tab @code{MSLLHI @var{a},#@var{b},@var{c}}
+@item @code{sw1 __MSRAHI (sw1, const)}
+@tab @code{@var{c} = __MSRAHI (@var{a}, @var{b})}
+@tab @code{MSRAHI @var{a},#@var{b},@var{c}}
+@item @code{uw1 __MSRLHI (uw1, const)}
+@tab @code{@var{c} = __MSRLHI (@var{a}, @var{b})}
+@tab @code{MSRLHI @var{a},#@var{b},@var{c}}
+@item @code{void __MSUBACCS (acc, acc)}
+@tab @code{__MSUBACCS (@var{b}, @var{a})}
+@tab @code{MSUBACCS @var{a},@var{b}}
+@item @code{sw1 __MSUBHSS (sw1, sw1)}
+@tab @code{@var{c} = __MSUBHSS (@var{a}, @var{b})}
+@tab @code{MSUBHSS @var{a},@var{b},@var{c}}
+@item @code{uw1 __MSUBHUS (uw1, uw1)}
+@tab @code{@var{c} = __MSUBHUS (@var{a}, @var{b})}
+@tab @code{MSUBHUS @var{a},@var{b},@var{c}}
+@item @code{void __MTRAP (void)}
+@tab @code{__MTRAP ()}
+@tab @code{MTRAP}
+@item @code{uw2 __MUNPACKH (uw1)}
+@tab @code{@var{b} = __MUNPACKH (@var{a})}
+@tab @code{MUNPACKH @var{a},@var{b}}
+@item @code{uw1 __MWCUT (uw2, uw1)}
+@tab @code{@var{c} = __MWCUT (@var{a}, @var{b})}
+@tab @code{MWCUT @var{a},@var{b},@var{c}}
+@item @code{void __MWTACC (acc, uw1)}
+@tab @code{__MWTACC (@var{b}, @var{a})}
+@tab @code{MWTACC @var{a},@var{b}}
+@item @code{void __MWTACCG (acc, uw1)}
+@tab @code{__MWTACCG (@var{b}, @var{a})}
+@tab @code{MWTACCG @var{a},@var{b}}
+@item @code{uw1 __MXOR (uw1, uw1)}
+@tab @code{@var{c} = __MXOR (@var{a}, @var{b})}
+@tab @code{MXOR @var{a},@var{b},@var{c}}
+@end multitable
+
+@node Raw read/write Functions
+@subsubsection Raw read/write Functions
+
+This sections describes built-in functions related to read and write
+instructions to access memory.  These functions generate
+@code{membar} instructions to flush the I/O load and stores where
+appropriate, as described in Fujitsu's manual described above.
+
+@table @code
+
+@item unsigned char __builtin_read8 (void *@var{data})
+@item unsigned short __builtin_read16 (void *@var{data})
+@item unsigned long __builtin_read32 (void *@var{data})
+@item unsigned long long __builtin_read64 (void *@var{data})
+
+@item void __builtin_write8 (void *@var{data}, unsigned char @var{datum})
+@item void __builtin_write16 (void *@var{data}, unsigned short @var{datum})
+@item void __builtin_write32 (void *@var{data}, unsigned long @var{datum})
+@item void __builtin_write64 (void *@var{data}, unsigned long long @var{datum})
+@end table
+
+@node Other Built-in Functions
+@subsubsection Other Built-in Functions
+
+This section describes built-in functions that are not named after
+a specific FR-V instruction.
+
+@table @code
+@item sw2 __IACCreadll (iacc @var{reg})
+Return the full 64-bit value of IACC0@.  The @var{reg} argument is reserved
+for future expansion and must be 0.
+
+@item sw1 __IACCreadl (iacc @var{reg})
+Return the value of IACC0H if @var{reg} is 0 and IACC0L if @var{reg} is 1.
+Other values of @var{reg} are rejected as invalid.
+
+@item void __IACCsetll (iacc @var{reg}, sw2 @var{x})
+Set the full 64-bit value of IACC0 to @var{x}.  The @var{reg} argument
+is reserved for future expansion and must be 0.
+
+@item void __IACCsetl (iacc @var{reg}, sw1 @var{x})
+Set IACC0H to @var{x} if @var{reg} is 0 and IACC0L to @var{x} if @var{reg}
+is 1.  Other values of @var{reg} are rejected as invalid.
+
+@item void __data_prefetch0 (const void *@var{x})
+Use the @code{dcpl} instruction to load the contents of address @var{x}
+into the data cache.
+
+@item void __data_prefetch (const void *@var{x})
+Use the @code{nldub} instruction to load the contents of address @var{x}
+into the data cache.  The instruction will be issued in slot I1@.
+@end table
+
+@node X86 Built-in Functions
+@subsection X86 Built-in Functions
+
+These built-in functions are available for the i386 and x86-64 family
+of computers, depending on the command-line switches used.
+
+Note that, if you specify command-line switches such as @option{-msse},
+the compiler could use the extended instruction sets even if the built-ins
+are not used explicitly in the program.  For this reason, applications
+which perform runtime CPU detection must compile separate files for each
+supported architecture, using the appropriate flags.  In particular,
+the file containing the CPU detection code should be compiled without
+these options.
+
+The following machine modes are available for use with MMX built-in functions
+(@pxref{Vector Extensions}): @code{V2SI} for a vector of two 32-bit integers,
+@code{V4HI} for a vector of four 16-bit integers, and @code{V8QI} for a
+vector of eight 8-bit integers.  Some of the built-in functions operate on
+MMX registers as a whole 64-bit entity, these use @code{V1DI} as their mode.
+
+If 3DNow!@: extensions are enabled, @code{V2SF} is used as a mode for a vector
+of two 32-bit floating point values.
+
+If SSE extensions are enabled, @code{V4SF} is used for a vector of four 32-bit
+floating point values.  Some instructions use a vector of four 32-bit
+integers, these use @code{V4SI}.  Finally, some instructions operate on an
+entire vector register, interpreting it as a 128-bit integer, these use mode
+@code{TI}.
+
+In 64-bit mode, the x86-64 family of processors uses additional built-in
+functions for efficient use of @code{TF} (@code{__float128}) 128-bit
+floating point and @code{TC} 128-bit complex floating point values.
+
+The following floating point built-in functions are available in 64-bit
+mode.  All of them implement the function that is part of the name.
+
+@smallexample
+__float128 __builtin_fabsq (__float128)
+__float128 __builtin_copysignq (__float128, __float128)
+@end smallexample
+
+The following floating point built-in functions are made available in the
+64-bit mode.
+
+@table @code
+@item __float128 __builtin_infq (void)
+Similar to @code{__builtin_inf}, except the return type is @code{__float128}.
+@findex __builtin_infq
+
+@item __float128 __builtin_huge_valq (void)
+Similar to @code{__builtin_huge_val}, except the return type is @code{__float128}.
+@findex __builtin_huge_valq
+@end table
+
+The following built-in functions are made available by @option{-mmmx}.
+All of them generate the machine instruction that is part of the name.
+
+@smallexample
+v8qi __builtin_ia32_paddb (v8qi, v8qi)
+v4hi __builtin_ia32_paddw (v4hi, v4hi)
+v2si __builtin_ia32_paddd (v2si, v2si)
+v8qi __builtin_ia32_psubb (v8qi, v8qi)
+v4hi __builtin_ia32_psubw (v4hi, v4hi)
+v2si __builtin_ia32_psubd (v2si, v2si)
+v8qi __builtin_ia32_paddsb (v8qi, v8qi)
+v4hi __builtin_ia32_paddsw (v4hi, v4hi)
+v8qi __builtin_ia32_psubsb (v8qi, v8qi)
+v4hi __builtin_ia32_psubsw (v4hi, v4hi)
+v8qi __builtin_ia32_paddusb (v8qi, v8qi)
+v4hi __builtin_ia32_paddusw (v4hi, v4hi)
+v8qi __builtin_ia32_psubusb (v8qi, v8qi)
+v4hi __builtin_ia32_psubusw (v4hi, v4hi)
+v4hi __builtin_ia32_pmullw (v4hi, v4hi)
+v4hi __builtin_ia32_pmulhw (v4hi, v4hi)
+di __builtin_ia32_pand (di, di)
+di __builtin_ia32_pandn (di,di)
+di __builtin_ia32_por (di, di)
+di __builtin_ia32_pxor (di, di)
+v8qi __builtin_ia32_pcmpeqb (v8qi, v8qi)
+v4hi __builtin_ia32_pcmpeqw (v4hi, v4hi)
+v2si __builtin_ia32_pcmpeqd (v2si, v2si)
+v8qi __builtin_ia32_pcmpgtb (v8qi, v8qi)
+v4hi __builtin_ia32_pcmpgtw (v4hi, v4hi)
+v2si __builtin_ia32_pcmpgtd (v2si, v2si)
+v8qi __builtin_ia32_punpckhbw (v8qi, v8qi)
+v4hi __builtin_ia32_punpckhwd (v4hi, v4hi)
+v2si __builtin_ia32_punpckhdq (v2si, v2si)
+v8qi __builtin_ia32_punpcklbw (v8qi, v8qi)
+v4hi __builtin_ia32_punpcklwd (v4hi, v4hi)
+v2si __builtin_ia32_punpckldq (v2si, v2si)
+v8qi __builtin_ia32_packsswb (v4hi, v4hi)
+v4hi __builtin_ia32_packssdw (v2si, v2si)
+v8qi __builtin_ia32_packuswb (v4hi, v4hi)
+
+v4hi __builtin_ia32_psllw (v4hi, v4hi)
+v2si __builtin_ia32_pslld (v2si, v2si)
+v1di __builtin_ia32_psllq (v1di, v1di)
+v4hi __builtin_ia32_psrlw (v4hi, v4hi)
+v2si __builtin_ia32_psrld (v2si, v2si)
+v1di __builtin_ia32_psrlq (v1di, v1di)
+v4hi __builtin_ia32_psraw (v4hi, v4hi)
+v2si __builtin_ia32_psrad (v2si, v2si)
+v4hi __builtin_ia32_psllwi (v4hi, int)
+v2si __builtin_ia32_pslldi (v2si, int)
+v1di __builtin_ia32_psllqi (v1di, int)
+v4hi __builtin_ia32_psrlwi (v4hi, int)
+v2si __builtin_ia32_psrldi (v2si, int)
+v1di __builtin_ia32_psrlqi (v1di, int)
+v4hi __builtin_ia32_psrawi (v4hi, int)
+v2si __builtin_ia32_psradi (v2si, int)
+
+@end smallexample
+
+The following built-in functions are made available either with
+@option{-msse}, or with a combination of @option{-m3dnow} and
+@option{-march=athlon}.  All of them generate the machine
+instruction that is part of the name.
+
+@smallexample
+v4hi __builtin_ia32_pmulhuw (v4hi, v4hi)
+v8qi __builtin_ia32_pavgb (v8qi, v8qi)
+v4hi __builtin_ia32_pavgw (v4hi, v4hi)
+v1di __builtin_ia32_psadbw (v8qi, v8qi)
+v8qi __builtin_ia32_pmaxub (v8qi, v8qi)
+v4hi __builtin_ia32_pmaxsw (v4hi, v4hi)
+v8qi __builtin_ia32_pminub (v8qi, v8qi)
+v4hi __builtin_ia32_pminsw (v4hi, v4hi)
+int __builtin_ia32_pextrw (v4hi, int)
+v4hi __builtin_ia32_pinsrw (v4hi, int, int)
+int __builtin_ia32_pmovmskb (v8qi)
+void __builtin_ia32_maskmovq (v8qi, v8qi, char *)
+void __builtin_ia32_movntq (di *, di)
+void __builtin_ia32_sfence (void)
+@end smallexample
+
+The following built-in functions are available when @option{-msse} is used.
+All of them generate the machine instruction that is part of the name.
+
+@smallexample
+int __builtin_ia32_comieq (v4sf, v4sf)
+int __builtin_ia32_comineq (v4sf, v4sf)
+int __builtin_ia32_comilt (v4sf, v4sf)
+int __builtin_ia32_comile (v4sf, v4sf)
+int __builtin_ia32_comigt (v4sf, v4sf)
+int __builtin_ia32_comige (v4sf, v4sf)
+int __builtin_ia32_ucomieq (v4sf, v4sf)
+int __builtin_ia32_ucomineq (v4sf, v4sf)
+int __builtin_ia32_ucomilt (v4sf, v4sf)
+int __builtin_ia32_ucomile (v4sf, v4sf)
+int __builtin_ia32_ucomigt (v4sf, v4sf)
+int __builtin_ia32_ucomige (v4sf, v4sf)
+v4sf __builtin_ia32_addps (v4sf, v4sf)
+v4sf __builtin_ia32_subps (v4sf, v4sf)
+v4sf __builtin_ia32_mulps (v4sf, v4sf)
+v4sf __builtin_ia32_divps (v4sf, v4sf)
+v4sf __builtin_ia32_addss (v4sf, v4sf)
+v4sf __builtin_ia32_subss (v4sf, v4sf)
+v4sf __builtin_ia32_mulss (v4sf, v4sf)
+v4sf __builtin_ia32_divss (v4sf, v4sf)
+v4si __builtin_ia32_cmpeqps (v4sf, v4sf)
+v4si __builtin_ia32_cmpltps (v4sf, v4sf)
+v4si __builtin_ia32_cmpleps (v4sf, v4sf)
+v4si __builtin_ia32_cmpgtps (v4sf, v4sf)
+v4si __builtin_ia32_cmpgeps (v4sf, v4sf)
+v4si __builtin_ia32_cmpunordps (v4sf, v4sf)
+v4si __builtin_ia32_cmpneqps (v4sf, v4sf)
+v4si __builtin_ia32_cmpnltps (v4sf, v4sf)
+v4si __builtin_ia32_cmpnleps (v4sf, v4sf)
+v4si __builtin_ia32_cmpngtps (v4sf, v4sf)
+v4si __builtin_ia32_cmpngeps (v4sf, v4sf)
+v4si __builtin_ia32_cmpordps (v4sf, v4sf)
+v4si __builtin_ia32_cmpeqss (v4sf, v4sf)
+v4si __builtin_ia32_cmpltss (v4sf, v4sf)
+v4si __builtin_ia32_cmpless (v4sf, v4sf)
+v4si __builtin_ia32_cmpunordss (v4sf, v4sf)
+v4si __builtin_ia32_cmpneqss (v4sf, v4sf)
+v4si __builtin_ia32_cmpnlts (v4sf, v4sf)
+v4si __builtin_ia32_cmpnless (v4sf, v4sf)
+v4si __builtin_ia32_cmpordss (v4sf, v4sf)
+v4sf __builtin_ia32_maxps (v4sf, v4sf)
+v4sf __builtin_ia32_maxss (v4sf, v4sf)
+v4sf __builtin_ia32_minps (v4sf, v4sf)
+v4sf __builtin_ia32_minss (v4sf, v4sf)
+v4sf __builtin_ia32_andps (v4sf, v4sf)
+v4sf __builtin_ia32_andnps (v4sf, v4sf)
+v4sf __builtin_ia32_orps (v4sf, v4sf)
+v4sf __builtin_ia32_xorps (v4sf, v4sf)
+v4sf __builtin_ia32_movss (v4sf, v4sf)
+v4sf __builtin_ia32_movhlps (v4sf, v4sf)
+v4sf __builtin_ia32_movlhps (v4sf, v4sf)
+v4sf __builtin_ia32_unpckhps (v4sf, v4sf)
+v4sf __builtin_ia32_unpcklps (v4sf, v4sf)
+v4sf __builtin_ia32_cvtpi2ps (v4sf, v2si)
+v4sf __builtin_ia32_cvtsi2ss (v4sf, int)
+v2si __builtin_ia32_cvtps2pi (v4sf)
+int __builtin_ia32_cvtss2si (v4sf)
+v2si __builtin_ia32_cvttps2pi (v4sf)
+int __builtin_ia32_cvttss2si (v4sf)
+v4sf __builtin_ia32_rcpps (v4sf)
+v4sf __builtin_ia32_rsqrtps (v4sf)
+v4sf __builtin_ia32_sqrtps (v4sf)
+v4sf __builtin_ia32_rcpss (v4sf)
+v4sf __builtin_ia32_rsqrtss (v4sf)
+v4sf __builtin_ia32_sqrtss (v4sf)
+v4sf __builtin_ia32_shufps (v4sf, v4sf, int)
+void __builtin_ia32_movntps (float *, v4sf)
+int __builtin_ia32_movmskps (v4sf)
+@end smallexample
+
+The following built-in functions are available when @option{-msse} is used.
+
+@table @code
+@item v4sf __builtin_ia32_loadaps (float *)
+Generates the @code{movaps} machine instruction as a load from memory.
+@item void __builtin_ia32_storeaps (float *, v4sf)
+Generates the @code{movaps} machine instruction as a store to memory.
+@item v4sf __builtin_ia32_loadups (float *)
+Generates the @code{movups} machine instruction as a load from memory.
+@item void __builtin_ia32_storeups (float *, v4sf)
+Generates the @code{movups} machine instruction as a store to memory.
+@item v4sf __builtin_ia32_loadsss (float *)
+Generates the @code{movss} machine instruction as a load from memory.
+@item void __builtin_ia32_storess (float *, v4sf)
+Generates the @code{movss} machine instruction as a store to memory.
+@item v4sf __builtin_ia32_loadhps (v4sf, const v2sf *)
+Generates the @code{movhps} machine instruction as a load from memory.
+@item v4sf __builtin_ia32_loadlps (v4sf, const v2sf *)
+Generates the @code{movlps} machine instruction as a load from memory
+@item void __builtin_ia32_storehps (v2sf *, v4sf)
+Generates the @code{movhps} machine instruction as a store to memory.
+@item void __builtin_ia32_storelps (v2sf *, v4sf)
+Generates the @code{movlps} machine instruction as a store to memory.
+@end table
+
+The following built-in functions are available when @option{-msse2} is used.
+All of them generate the machine instruction that is part of the name.
+
+@smallexample
+int __builtin_ia32_comisdeq (v2df, v2df)
+int __builtin_ia32_comisdlt (v2df, v2df)
+int __builtin_ia32_comisdle (v2df, v2df)
+int __builtin_ia32_comisdgt (v2df, v2df)
+int __builtin_ia32_comisdge (v2df, v2df)
+int __builtin_ia32_comisdneq (v2df, v2df)
+int __builtin_ia32_ucomisdeq (v2df, v2df)
+int __builtin_ia32_ucomisdlt (v2df, v2df)
+int __builtin_ia32_ucomisdle (v2df, v2df)
+int __builtin_ia32_ucomisdgt (v2df, v2df)
+int __builtin_ia32_ucomisdge (v2df, v2df)
+int __builtin_ia32_ucomisdneq (v2df, v2df)
+v2df __builtin_ia32_cmpeqpd (v2df, v2df)
+v2df __builtin_ia32_cmpltpd (v2df, v2df)
+v2df __builtin_ia32_cmplepd (v2df, v2df)
+v2df __builtin_ia32_cmpgtpd (v2df, v2df)
+v2df __builtin_ia32_cmpgepd (v2df, v2df)
+v2df __builtin_ia32_cmpunordpd (v2df, v2df)
+v2df __builtin_ia32_cmpneqpd (v2df, v2df)
+v2df __builtin_ia32_cmpnltpd (v2df, v2df)
+v2df __builtin_ia32_cmpnlepd (v2df, v2df)
+v2df __builtin_ia32_cmpngtpd (v2df, v2df)
+v2df __builtin_ia32_cmpngepd (v2df, v2df)
+v2df __builtin_ia32_cmpordpd (v2df, v2df)
+v2df __builtin_ia32_cmpeqsd (v2df, v2df)
+v2df __builtin_ia32_cmpltsd (v2df, v2df)
+v2df __builtin_ia32_cmplesd (v2df, v2df)
+v2df __builtin_ia32_cmpunordsd (v2df, v2df)
+v2df __builtin_ia32_cmpneqsd (v2df, v2df)
+v2df __builtin_ia32_cmpnltsd (v2df, v2df)
+v2df __builtin_ia32_cmpnlesd (v2df, v2df)
+v2df __builtin_ia32_cmpordsd (v2df, v2df)
+v2di __builtin_ia32_paddq (v2di, v2di)
+v2di __builtin_ia32_psubq (v2di, v2di)
+v2df __builtin_ia32_addpd (v2df, v2df)
+v2df __builtin_ia32_subpd (v2df, v2df)
+v2df __builtin_ia32_mulpd (v2df, v2df)
+v2df __builtin_ia32_divpd (v2df, v2df)
+v2df __builtin_ia32_addsd (v2df, v2df)
+v2df __builtin_ia32_subsd (v2df, v2df)
+v2df __builtin_ia32_mulsd (v2df, v2df)
+v2df __builtin_ia32_divsd (v2df, v2df)
+v2df __builtin_ia32_minpd (v2df, v2df)
+v2df __builtin_ia32_maxpd (v2df, v2df)
+v2df __builtin_ia32_minsd (v2df, v2df)
+v2df __builtin_ia32_maxsd (v2df, v2df)
+v2df __builtin_ia32_andpd (v2df, v2df)
+v2df __builtin_ia32_andnpd (v2df, v2df)
+v2df __builtin_ia32_orpd (v2df, v2df)
+v2df __builtin_ia32_xorpd (v2df, v2df)
+v2df __builtin_ia32_movsd (v2df, v2df)
+v2df __builtin_ia32_unpckhpd (v2df, v2df)
+v2df __builtin_ia32_unpcklpd (v2df, v2df)
+v16qi __builtin_ia32_paddb128 (v16qi, v16qi)
+v8hi __builtin_ia32_paddw128 (v8hi, v8hi)
+v4si __builtin_ia32_paddd128 (v4si, v4si)
+v2di __builtin_ia32_paddq128 (v2di, v2di)
+v16qi __builtin_ia32_psubb128 (v16qi, v16qi)
+v8hi __builtin_ia32_psubw128 (v8hi, v8hi)
+v4si __builtin_ia32_psubd128 (v4si, v4si)
+v2di __builtin_ia32_psubq128 (v2di, v2di)
+v8hi __builtin_ia32_pmullw128 (v8hi, v8hi)
+v8hi __builtin_ia32_pmulhw128 (v8hi, v8hi)
+v2di __builtin_ia32_pand128 (v2di, v2di)
+v2di __builtin_ia32_pandn128 (v2di, v2di)
+v2di __builtin_ia32_por128 (v2di, v2di)
+v2di __builtin_ia32_pxor128 (v2di, v2di)
+v16qi __builtin_ia32_pavgb128 (v16qi, v16qi)
+v8hi __builtin_ia32_pavgw128 (v8hi, v8hi)
+v16qi __builtin_ia32_pcmpeqb128 (v16qi, v16qi)
+v8hi __builtin_ia32_pcmpeqw128 (v8hi, v8hi)
+v4si __builtin_ia32_pcmpeqd128 (v4si, v4si)
+v16qi __builtin_ia32_pcmpgtb128 (v16qi, v16qi)
+v8hi __builtin_ia32_pcmpgtw128 (v8hi, v8hi)
+v4si __builtin_ia32_pcmpgtd128 (v4si, v4si)
+v16qi __builtin_ia32_pmaxub128 (v16qi, v16qi)
+v8hi __builtin_ia32_pmaxsw128 (v8hi, v8hi)
+v16qi __builtin_ia32_pminub128 (v16qi, v16qi)
+v8hi __builtin_ia32_pminsw128 (v8hi, v8hi)
+v16qi __builtin_ia32_punpckhbw128 (v16qi, v16qi)
+v8hi __builtin_ia32_punpckhwd128 (v8hi, v8hi)
+v4si __builtin_ia32_punpckhdq128 (v4si, v4si)
+v2di __builtin_ia32_punpckhqdq128 (v2di, v2di)
+v16qi __builtin_ia32_punpcklbw128 (v16qi, v16qi)
+v8hi __builtin_ia32_punpcklwd128 (v8hi, v8hi)
+v4si __builtin_ia32_punpckldq128 (v4si, v4si)
+v2di __builtin_ia32_punpcklqdq128 (v2di, v2di)
+v16qi __builtin_ia32_packsswb128 (v8hi, v8hi)
+v8hi __builtin_ia32_packssdw128 (v4si, v4si)
+v16qi __builtin_ia32_packuswb128 (v8hi, v8hi)
+v8hi __builtin_ia32_pmulhuw128 (v8hi, v8hi)
+void __builtin_ia32_maskmovdqu (v16qi, v16qi)
+v2df __builtin_ia32_loadupd (double *)
+void __builtin_ia32_storeupd (double *, v2df)
+v2df __builtin_ia32_loadhpd (v2df, double const *)
+v2df __builtin_ia32_loadlpd (v2df, double const *)
+int __builtin_ia32_movmskpd (v2df)
+int __builtin_ia32_pmovmskb128 (v16qi)
+void __builtin_ia32_movnti (int *, int)
+void __builtin_ia32_movntpd (double *, v2df)
+void __builtin_ia32_movntdq (v2df *, v2df)
+v4si __builtin_ia32_pshufd (v4si, int)
+v8hi __builtin_ia32_pshuflw (v8hi, int)
+v8hi __builtin_ia32_pshufhw (v8hi, int)
+v2di __builtin_ia32_psadbw128 (v16qi, v16qi)
+v2df __builtin_ia32_sqrtpd (v2df)
+v2df __builtin_ia32_sqrtsd (v2df)
+v2df __builtin_ia32_shufpd (v2df, v2df, int)
+v2df __builtin_ia32_cvtdq2pd (v4si)
+v4sf __builtin_ia32_cvtdq2ps (v4si)
+v4si __builtin_ia32_cvtpd2dq (v2df)
+v2si __builtin_ia32_cvtpd2pi (v2df)
+v4sf __builtin_ia32_cvtpd2ps (v2df)
+v4si __builtin_ia32_cvttpd2dq (v2df)
+v2si __builtin_ia32_cvttpd2pi (v2df)
+v2df __builtin_ia32_cvtpi2pd (v2si)
+int __builtin_ia32_cvtsd2si (v2df)
+int __builtin_ia32_cvttsd2si (v2df)
+long long __builtin_ia32_cvtsd2si64 (v2df)
+long long __builtin_ia32_cvttsd2si64 (v2df)
+v4si __builtin_ia32_cvtps2dq (v4sf)
+v2df __builtin_ia32_cvtps2pd (v4sf)
+v4si __builtin_ia32_cvttps2dq (v4sf)
+v2df __builtin_ia32_cvtsi2sd (v2df, int)
+v2df __builtin_ia32_cvtsi642sd (v2df, long long)
+v4sf __builtin_ia32_cvtsd2ss (v4sf, v2df)
+v2df __builtin_ia32_cvtss2sd (v2df, v4sf)
+void __builtin_ia32_clflush (const void *)
+void __builtin_ia32_lfence (void)
+void __builtin_ia32_mfence (void)
+v16qi __builtin_ia32_loaddqu (const char *)
+void __builtin_ia32_storedqu (char *, v16qi)
+v1di __builtin_ia32_pmuludq (v2si, v2si)
+v2di __builtin_ia32_pmuludq128 (v4si, v4si)
+v8hi __builtin_ia32_psllw128 (v8hi, v8hi)
+v4si __builtin_ia32_pslld128 (v4si, v4si)
+v2di __builtin_ia32_psllq128 (v2di, v2di)
+v8hi __builtin_ia32_psrlw128 (v8hi, v8hi)
+v4si __builtin_ia32_psrld128 (v4si, v4si)
+v2di __builtin_ia32_psrlq128 (v2di, v2di)
+v8hi __builtin_ia32_psraw128 (v8hi, v8hi)
+v4si __builtin_ia32_psrad128 (v4si, v4si)
+v2di __builtin_ia32_pslldqi128 (v2di, int)
+v8hi __builtin_ia32_psllwi128 (v8hi, int)
+v4si __builtin_ia32_pslldi128 (v4si, int)
+v2di __builtin_ia32_psllqi128 (v2di, int)
+v2di __builtin_ia32_psrldqi128 (v2di, int)
+v8hi __builtin_ia32_psrlwi128 (v8hi, int)
+v4si __builtin_ia32_psrldi128 (v4si, int)
+v2di __builtin_ia32_psrlqi128 (v2di, int)
+v8hi __builtin_ia32_psrawi128 (v8hi, int)
+v4si __builtin_ia32_psradi128 (v4si, int)
+v4si __builtin_ia32_pmaddwd128 (v8hi, v8hi)
+v2di __builtin_ia32_movq128 (v2di)
+@end smallexample
+
+The following built-in functions are available when @option{-msse3} is used.
+All of them generate the machine instruction that is part of the name.
+
+@smallexample
+v2df __builtin_ia32_addsubpd (v2df, v2df)
+v4sf __builtin_ia32_addsubps (v4sf, v4sf)
+v2df __builtin_ia32_haddpd (v2df, v2df)
+v4sf __builtin_ia32_haddps (v4sf, v4sf)
+v2df __builtin_ia32_hsubpd (v2df, v2df)
+v4sf __builtin_ia32_hsubps (v4sf, v4sf)
+v16qi __builtin_ia32_lddqu (char const *)
+void __builtin_ia32_monitor (void *, unsigned int, unsigned int)
+v2df __builtin_ia32_movddup (v2df)
+v4sf __builtin_ia32_movshdup (v4sf)
+v4sf __builtin_ia32_movsldup (v4sf)
+void __builtin_ia32_mwait (unsigned int, unsigned int)
+@end smallexample
+
+The following built-in functions are available when @option{-msse3} is used.
+
+@table @code
+@item v2df __builtin_ia32_loadddup (double const *)
+Generates the @code{movddup} machine instruction as a load from memory.
+@end table
+
+The following built-in functions are available when @option{-mssse3} is used.
+All of them generate the machine instruction that is part of the name
+with MMX registers.
+
+@smallexample
+v2si __builtin_ia32_phaddd (v2si, v2si)
+v4hi __builtin_ia32_phaddw (v4hi, v4hi)
+v4hi __builtin_ia32_phaddsw (v4hi, v4hi)
+v2si __builtin_ia32_phsubd (v2si, v2si)
+v4hi __builtin_ia32_phsubw (v4hi, v4hi)
+v4hi __builtin_ia32_phsubsw (v4hi, v4hi)
+v4hi __builtin_ia32_pmaddubsw (v8qi, v8qi)
+v4hi __builtin_ia32_pmulhrsw (v4hi, v4hi)
+v8qi __builtin_ia32_pshufb (v8qi, v8qi)
+v8qi __builtin_ia32_psignb (v8qi, v8qi)
+v2si __builtin_ia32_psignd (v2si, v2si)
+v4hi __builtin_ia32_psignw (v4hi, v4hi)
+v1di __builtin_ia32_palignr (v1di, v1di, int)
+v8qi __builtin_ia32_pabsb (v8qi)
+v2si __builtin_ia32_pabsd (v2si)
+v4hi __builtin_ia32_pabsw (v4hi)
+@end smallexample
+
+The following built-in functions are available when @option{-mssse3} is used.
+All of them generate the machine instruction that is part of the name
+with SSE registers.
+
+@smallexample
+v4si __builtin_ia32_phaddd128 (v4si, v4si)
+v8hi __builtin_ia32_phaddw128 (v8hi, v8hi)
+v8hi __builtin_ia32_phaddsw128 (v8hi, v8hi)
+v4si __builtin_ia32_phsubd128 (v4si, v4si)
+v8hi __builtin_ia32_phsubw128 (v8hi, v8hi)
+v8hi __builtin_ia32_phsubsw128 (v8hi, v8hi)
+v8hi __builtin_ia32_pmaddubsw128 (v16qi, v16qi)
+v8hi __builtin_ia32_pmulhrsw128 (v8hi, v8hi)
+v16qi __builtin_ia32_pshufb128 (v16qi, v16qi)
+v16qi __builtin_ia32_psignb128 (v16qi, v16qi)
+v4si __builtin_ia32_psignd128 (v4si, v4si)
+v8hi __builtin_ia32_psignw128 (v8hi, v8hi)
+v2di __builtin_ia32_palignr128 (v2di, v2di, int)
+v16qi __builtin_ia32_pabsb128 (v16qi)
+v4si __builtin_ia32_pabsd128 (v4si)
+v8hi __builtin_ia32_pabsw128 (v8hi)
+@end smallexample
+
+The following built-in functions are available when @option{-msse4.1} is
+used.  All of them generate the machine instruction that is part of the
+name.
+
+@smallexample
+v2df __builtin_ia32_blendpd (v2df, v2df, const int)
+v4sf __builtin_ia32_blendps (v4sf, v4sf, const int)
+v2df __builtin_ia32_blendvpd (v2df, v2df, v2df)
+v4sf __builtin_ia32_blendvps (v4sf, v4sf, v4sf)
+v2df __builtin_ia32_dppd (v2df, v2df, const int)
+v4sf __builtin_ia32_dpps (v4sf, v4sf, const int)
+v4sf __builtin_ia32_insertps128 (v4sf, v4sf, const int)
+v2di __builtin_ia32_movntdqa (v2di *);
+v16qi __builtin_ia32_mpsadbw128 (v16qi, v16qi, const int)
+v8hi __builtin_ia32_packusdw128 (v4si, v4si)
+v16qi __builtin_ia32_pblendvb128 (v16qi, v16qi, v16qi)
+v8hi __builtin_ia32_pblendw128 (v8hi, v8hi, const int)
+v2di __builtin_ia32_pcmpeqq (v2di, v2di)
+v8hi __builtin_ia32_phminposuw128 (v8hi)
+v16qi __builtin_ia32_pmaxsb128 (v16qi, v16qi)
+v4si __builtin_ia32_pmaxsd128 (v4si, v4si)
+v4si __builtin_ia32_pmaxud128 (v4si, v4si)
+v8hi __builtin_ia32_pmaxuw128 (v8hi, v8hi)
+v16qi __builtin_ia32_pminsb128 (v16qi, v16qi)
+v4si __builtin_ia32_pminsd128 (v4si, v4si)
+v4si __builtin_ia32_pminud128 (v4si, v4si)
+v8hi __builtin_ia32_pminuw128 (v8hi, v8hi)
+v4si __builtin_ia32_pmovsxbd128 (v16qi)
+v2di __builtin_ia32_pmovsxbq128 (v16qi)
+v8hi __builtin_ia32_pmovsxbw128 (v16qi)
+v2di __builtin_ia32_pmovsxdq128 (v4si)
+v4si __builtin_ia32_pmovsxwd128 (v8hi)
+v2di __builtin_ia32_pmovsxwq128 (v8hi)
+v4si __builtin_ia32_pmovzxbd128 (v16qi)
+v2di __builtin_ia32_pmovzxbq128 (v16qi)
+v8hi __builtin_ia32_pmovzxbw128 (v16qi)
+v2di __builtin_ia32_pmovzxdq128 (v4si)
+v4si __builtin_ia32_pmovzxwd128 (v8hi)
+v2di __builtin_ia32_pmovzxwq128 (v8hi)
+v2di __builtin_ia32_pmuldq128 (v4si, v4si)
+v4si __builtin_ia32_pmulld128 (v4si, v4si)
+int __builtin_ia32_ptestc128 (v2di, v2di)
+int __builtin_ia32_ptestnzc128 (v2di, v2di)
+int __builtin_ia32_ptestz128 (v2di, v2di)
+v2df __builtin_ia32_roundpd (v2df, const int)
+v4sf __builtin_ia32_roundps (v4sf, const int)
+v2df __builtin_ia32_roundsd (v2df, v2df, const int)
+v4sf __builtin_ia32_roundss (v4sf, v4sf, const int)
+@end smallexample
+
+The following built-in functions are available when @option{-msse4.1} is
+used.
+
+@table @code
+@item v4sf __builtin_ia32_vec_set_v4sf (v4sf, float, const int)
+Generates the @code{insertps} machine instruction.
+@item int __builtin_ia32_vec_ext_v16qi (v16qi, const int)
+Generates the @code{pextrb} machine instruction.
+@item v16qi __builtin_ia32_vec_set_v16qi (v16qi, int, const int)
+Generates the @code{pinsrb} machine instruction.
+@item v4si __builtin_ia32_vec_set_v4si (v4si, int, const int)
+Generates the @code{pinsrd} machine instruction.
+@item v2di __builtin_ia32_vec_set_v2di (v2di, long long, const int)
+Generates the @code{pinsrq} machine instruction in 64bit mode.
+@end table
+
+The following built-in functions are changed to generate new SSE4.1
+instructions when @option{-msse4.1} is used.
+
+@table @code
+@item float __builtin_ia32_vec_ext_v4sf (v4sf, const int)
+Generates the @code{extractps} machine instruction.
+@item int __builtin_ia32_vec_ext_v4si (v4si, const int)
+Generates the @code{pextrd} machine instruction.
+@item long long __builtin_ia32_vec_ext_v2di (v2di, const int)
+Generates the @code{pextrq} machine instruction in 64bit mode.
+@end table
+
+The following built-in functions are available when @option{-msse4.2} is
+used.  All of them generate the machine instruction that is part of the
+name.
+
+@smallexample
+v16qi __builtin_ia32_pcmpestrm128 (v16qi, int, v16qi, int, const int)
+int __builtin_ia32_pcmpestri128 (v16qi, int, v16qi, int, const int)
+int __builtin_ia32_pcmpestria128 (v16qi, int, v16qi, int, const int)
+int __builtin_ia32_pcmpestric128 (v16qi, int, v16qi, int, const int)
+int __builtin_ia32_pcmpestrio128 (v16qi, int, v16qi, int, const int)
+int __builtin_ia32_pcmpestris128 (v16qi, int, v16qi, int, const int)
+int __builtin_ia32_pcmpestriz128 (v16qi, int, v16qi, int, const int)
+v16qi __builtin_ia32_pcmpistrm128 (v16qi, v16qi, const int)
+int __builtin_ia32_pcmpistri128 (v16qi, v16qi, const int)
+int __builtin_ia32_pcmpistria128 (v16qi, v16qi, const int)
+int __builtin_ia32_pcmpistric128 (v16qi, v16qi, const int)
+int __builtin_ia32_pcmpistrio128 (v16qi, v16qi, const int)
+int __builtin_ia32_pcmpistris128 (v16qi, v16qi, const int)
+int __builtin_ia32_pcmpistriz128 (v16qi, v16qi, const int)
+v2di __builtin_ia32_pcmpgtq (v2di, v2di)
+@end smallexample
+
+The following built-in functions are available when @option{-msse4.2} is
+used.
+
+@table @code
+@item unsigned int __builtin_ia32_crc32qi (unsigned int, unsigned char)
+Generates the @code{crc32b} machine instruction.
+@item unsigned int __builtin_ia32_crc32hi (unsigned int, unsigned short)
+Generates the @code{crc32w} machine instruction.
+@item unsigned int __builtin_ia32_crc32si (unsigned int, unsigned int)
+Generates the @code{crc32l} machine instruction.
+@item unsigned long long __builtin_ia32_crc32di (unsigned long long, unsigned long long)
+Generates the @code{crc32q} machine instruction.
+@end table
+
+The following built-in functions are changed to generate new SSE4.2
+instructions when @option{-msse4.2} is used.
+
+@table @code
+@item int __builtin_popcount (unsigned int)
+Generates the @code{popcntl} machine instruction.
+@item int __builtin_popcountl (unsigned long)
+Generates the @code{popcntl} or @code{popcntq} machine instruction,
+depending on the size of @code{unsigned long}.
+@item int __builtin_popcountll (unsigned long long)
+Generates the @code{popcntq} machine instruction.
+@end table
+
+The following built-in functions are available when @option{-mavx} is
+used. All of them generate the machine instruction that is part of the
+name.
+
+@smallexample
+v4df __builtin_ia32_addpd256 (v4df,v4df)
+v8sf __builtin_ia32_addps256 (v8sf,v8sf)
+v4df __builtin_ia32_addsubpd256 (v4df,v4df)
+v8sf __builtin_ia32_addsubps256 (v8sf,v8sf)
+v4df __builtin_ia32_andnpd256 (v4df,v4df)
+v8sf __builtin_ia32_andnps256 (v8sf,v8sf)
+v4df __builtin_ia32_andpd256 (v4df,v4df)
+v8sf __builtin_ia32_andps256 (v8sf,v8sf)
+v4df __builtin_ia32_blendpd256 (v4df,v4df,int)
+v8sf __builtin_ia32_blendps256 (v8sf,v8sf,int)
+v4df __builtin_ia32_blendvpd256 (v4df,v4df,v4df)
+v8sf __builtin_ia32_blendvps256 (v8sf,v8sf,v8sf)
+v2df __builtin_ia32_cmppd (v2df,v2df,int)
+v4df __builtin_ia32_cmppd256 (v4df,v4df,int)
+v4sf __builtin_ia32_cmpps (v4sf,v4sf,int)
+v8sf __builtin_ia32_cmpps256 (v8sf,v8sf,int)
+v2df __builtin_ia32_cmpsd (v2df,v2df,int)
+v4sf __builtin_ia32_cmpss (v4sf,v4sf,int)
+v4df __builtin_ia32_cvtdq2pd256 (v4si)
+v8sf __builtin_ia32_cvtdq2ps256 (v8si)
+v4si __builtin_ia32_cvtpd2dq256 (v4df)
+v4sf __builtin_ia32_cvtpd2ps256 (v4df)
+v8si __builtin_ia32_cvtps2dq256 (v8sf)
+v4df __builtin_ia32_cvtps2pd256 (v4sf)
+v4si __builtin_ia32_cvttpd2dq256 (v4df)
+v8si __builtin_ia32_cvttps2dq256 (v8sf)
+v4df __builtin_ia32_divpd256 (v4df,v4df)
+v8sf __builtin_ia32_divps256 (v8sf,v8sf)
+v8sf __builtin_ia32_dpps256 (v8sf,v8sf,int)
+v4df __builtin_ia32_haddpd256 (v4df,v4df)
+v8sf __builtin_ia32_haddps256 (v8sf,v8sf)
+v4df __builtin_ia32_hsubpd256 (v4df,v4df)
+v8sf __builtin_ia32_hsubps256 (v8sf,v8sf)
+v32qi __builtin_ia32_lddqu256 (pcchar)
+v32qi __builtin_ia32_loaddqu256 (pcchar)
+v4df __builtin_ia32_loadupd256 (pcdouble)
+v8sf __builtin_ia32_loadups256 (pcfloat)
+v2df __builtin_ia32_maskloadpd (pcv2df,v2df)
+v4df __builtin_ia32_maskloadpd256 (pcv4df,v4df)
+v4sf __builtin_ia32_maskloadps (pcv4sf,v4sf)
+v8sf __builtin_ia32_maskloadps256 (pcv8sf,v8sf)
+void __builtin_ia32_maskstorepd (pv2df,v2df,v2df)
+void __builtin_ia32_maskstorepd256 (pv4df,v4df,v4df)
+void __builtin_ia32_maskstoreps (pv4sf,v4sf,v4sf)
+void __builtin_ia32_maskstoreps256 (pv8sf,v8sf,v8sf)
+v4df __builtin_ia32_maxpd256 (v4df,v4df)
+v8sf __builtin_ia32_maxps256 (v8sf,v8sf)
+v4df __builtin_ia32_minpd256 (v4df,v4df)
+v8sf __builtin_ia32_minps256 (v8sf,v8sf)
+v4df __builtin_ia32_movddup256 (v4df)
+int __builtin_ia32_movmskpd256 (v4df)
+int __builtin_ia32_movmskps256 (v8sf)
+v8sf __builtin_ia32_movshdup256 (v8sf)
+v8sf __builtin_ia32_movsldup256 (v8sf)
+v4df __builtin_ia32_mulpd256 (v4df,v4df)
+v8sf __builtin_ia32_mulps256 (v8sf,v8sf)
+v4df __builtin_ia32_orpd256 (v4df,v4df)
+v8sf __builtin_ia32_orps256 (v8sf,v8sf)
+v2df __builtin_ia32_pd_pd256 (v4df)
+v4df __builtin_ia32_pd256_pd (v2df)
+v4sf __builtin_ia32_ps_ps256 (v8sf)
+v8sf __builtin_ia32_ps256_ps (v4sf)
+int __builtin_ia32_ptestc256 (v4di,v4di,ptest)
+int __builtin_ia32_ptestnzc256 (v4di,v4di,ptest)
+int __builtin_ia32_ptestz256 (v4di,v4di,ptest)
+v8sf __builtin_ia32_rcpps256 (v8sf)
+v4df __builtin_ia32_roundpd256 (v4df,int)
+v8sf __builtin_ia32_roundps256 (v8sf,int)
+v8sf __builtin_ia32_rsqrtps_nr256 (v8sf)
+v8sf __builtin_ia32_rsqrtps256 (v8sf)
+v4df __builtin_ia32_shufpd256 (v4df,v4df,int)
+v8sf __builtin_ia32_shufps256 (v8sf,v8sf,int)
+v4si __builtin_ia32_si_si256 (v8si)
+v8si __builtin_ia32_si256_si (v4si)
+v4df __builtin_ia32_sqrtpd256 (v4df)
+v8sf __builtin_ia32_sqrtps_nr256 (v8sf)
+v8sf __builtin_ia32_sqrtps256 (v8sf)
+void __builtin_ia32_storedqu256 (pchar,v32qi)
+void __builtin_ia32_storeupd256 (pdouble,v4df)
+void __builtin_ia32_storeups256 (pfloat,v8sf)
+v4df __builtin_ia32_subpd256 (v4df,v4df)
+v8sf __builtin_ia32_subps256 (v8sf,v8sf)
+v4df __builtin_ia32_unpckhpd256 (v4df,v4df)
+v8sf __builtin_ia32_unpckhps256 (v8sf,v8sf)
+v4df __builtin_ia32_unpcklpd256 (v4df,v4df)
+v8sf __builtin_ia32_unpcklps256 (v8sf,v8sf)
+v4df __builtin_ia32_vbroadcastf128_pd256 (pcv2df)
+v8sf __builtin_ia32_vbroadcastf128_ps256 (pcv4sf)
+v4df __builtin_ia32_vbroadcastsd256 (pcdouble)
+v4sf __builtin_ia32_vbroadcastss (pcfloat)
+v8sf __builtin_ia32_vbroadcastss256 (pcfloat)
+v2df __builtin_ia32_vextractf128_pd256 (v4df,int)
+v4sf __builtin_ia32_vextractf128_ps256 (v8sf,int)
+v4si __builtin_ia32_vextractf128_si256 (v8si,int)
+v4df __builtin_ia32_vinsertf128_pd256 (v4df,v2df,int)
+v8sf __builtin_ia32_vinsertf128_ps256 (v8sf,v4sf,int)
+v8si __builtin_ia32_vinsertf128_si256 (v8si,v4si,int)
+v4df __builtin_ia32_vperm2f128_pd256 (v4df,v4df,int)
+v8sf __builtin_ia32_vperm2f128_ps256 (v8sf,v8sf,int)
+v8si __builtin_ia32_vperm2f128_si256 (v8si,v8si,int)
+v2df __builtin_ia32_vpermil2pd (v2df,v2df,v2di,int)
+v4df __builtin_ia32_vpermil2pd256 (v4df,v4df,v4di,int)
+v4sf __builtin_ia32_vpermil2ps (v4sf,v4sf,v4si,int)
+v8sf __builtin_ia32_vpermil2ps256 (v8sf,v8sf,v8si,int)
+v2df __builtin_ia32_vpermilpd (v2df,int)
+v4df __builtin_ia32_vpermilpd256 (v4df,int)
+v4sf __builtin_ia32_vpermilps (v4sf,int)
+v8sf __builtin_ia32_vpermilps256 (v8sf,int)
+v2df __builtin_ia32_vpermilvarpd (v2df,v2di)
+v4df __builtin_ia32_vpermilvarpd256 (v4df,v4di)
+v4sf __builtin_ia32_vpermilvarps (v4sf,v4si)
+v8sf __builtin_ia32_vpermilvarps256 (v8sf,v8si)
+int __builtin_ia32_vtestcpd (v2df,v2df,ptest)
+int __builtin_ia32_vtestcpd256 (v4df,v4df,ptest)
+int __builtin_ia32_vtestcps (v4sf,v4sf,ptest)
+int __builtin_ia32_vtestcps256 (v8sf,v8sf,ptest)
+int __builtin_ia32_vtestnzcpd (v2df,v2df,ptest)
+int __builtin_ia32_vtestnzcpd256 (v4df,v4df,ptest)
+int __builtin_ia32_vtestnzcps (v4sf,v4sf,ptest)
+int __builtin_ia32_vtestnzcps256 (v8sf,v8sf,ptest)
+int __builtin_ia32_vtestzpd (v2df,v2df,ptest)
+int __builtin_ia32_vtestzpd256 (v4df,v4df,ptest)
+int __builtin_ia32_vtestzps (v4sf,v4sf,ptest)
+int __builtin_ia32_vtestzps256 (v8sf,v8sf,ptest)
+void __builtin_ia32_vzeroall (void)
+void __builtin_ia32_vzeroupper (void)
+v4df __builtin_ia32_xorpd256 (v4df,v4df)
+v8sf __builtin_ia32_xorps256 (v8sf,v8sf)
+@end smallexample
+
+The following built-in functions are available when @option{-maes} is
+used.  All of them generate the machine instruction that is part of the
+name.
+
+@smallexample
+v2di __builtin_ia32_aesenc128 (v2di, v2di)
+v2di __builtin_ia32_aesenclast128 (v2di, v2di)
+v2di __builtin_ia32_aesdec128 (v2di, v2di)
+v2di __builtin_ia32_aesdeclast128 (v2di, v2di)
+v2di __builtin_ia32_aeskeygenassist128 (v2di, const int)
+v2di __builtin_ia32_aesimc128 (v2di)
+@end smallexample
+
+The following built-in function is available when @option{-mpclmul} is
+used.
+
+@table @code
+@item v2di __builtin_ia32_pclmulqdq128 (v2di, v2di, const int)
+Generates the @code{pclmulqdq} machine instruction.
+@end table
+
+The following built-in function is available when @option{-mfsgsbase} is
+used.  All of them generate the machine instruction that is part of the
+name.
+
+@smallexample
+unsigned int __builtin_ia32_rdfsbase32 (void)
+unsigned long long __builtin_ia32_rdfsbase64 (void)
+unsigned int __builtin_ia32_rdgsbase32 (void)
+unsigned long long __builtin_ia32_rdgsbase64 (void)
+void _writefsbase_u32 (unsigned int)
+void _writefsbase_u64 (unsigned long long)
+void _writegsbase_u32 (unsigned int)
+void _writegsbase_u64 (unsigned long long)
+@end smallexample
+
+The following built-in function is available when @option{-mrdrnd} is
+used.  All of them generate the machine instruction that is part of the
+name.
+
+@smallexample
+unsigned int __builtin_ia32_rdrand16_step (unsigned short *)
+unsigned int __builtin_ia32_rdrand32_step (unsigned int *)
+unsigned int __builtin_ia32_rdrand64_step (unsigned long long *)
+@end smallexample
+
+The following built-in functions are available when @option{-msse4a} is used.
+All of them generate the machine instruction that is part of the name.
+
+@smallexample
+void __builtin_ia32_movntsd (double *, v2df)
+void __builtin_ia32_movntss (float *, v4sf)
+v2di __builtin_ia32_extrq  (v2di, v16qi)
+v2di __builtin_ia32_extrqi (v2di, const unsigned int, const unsigned int)
+v2di __builtin_ia32_insertq (v2di, v2di)
+v2di __builtin_ia32_insertqi (v2di, v2di, const unsigned int, const unsigned int)
+@end smallexample
+
+The following built-in functions are available when @option{-mxop} is used.
+@smallexample
+v2df __builtin_ia32_vfrczpd (v2df)
+v4sf __builtin_ia32_vfrczps (v4sf)
+v2df __builtin_ia32_vfrczsd (v2df, v2df)
+v4sf __builtin_ia32_vfrczss (v4sf, v4sf)
+v4df __builtin_ia32_vfrczpd256 (v4df)
+v8sf __builtin_ia32_vfrczps256 (v8sf)
+v2di __builtin_ia32_vpcmov (v2di, v2di, v2di)
+v2di __builtin_ia32_vpcmov_v2di (v2di, v2di, v2di)
+v4si __builtin_ia32_vpcmov_v4si (v4si, v4si, v4si)
+v8hi __builtin_ia32_vpcmov_v8hi (v8hi, v8hi, v8hi)
+v16qi __builtin_ia32_vpcmov_v16qi (v16qi, v16qi, v16qi)
+v2df __builtin_ia32_vpcmov_v2df (v2df, v2df, v2df)
+v4sf __builtin_ia32_vpcmov_v4sf (v4sf, v4sf, v4sf)
+v4di __builtin_ia32_vpcmov_v4di256 (v4di, v4di, v4di)
+v8si __builtin_ia32_vpcmov_v8si256 (v8si, v8si, v8si)
+v16hi __builtin_ia32_vpcmov_v16hi256 (v16hi, v16hi, v16hi)
+v32qi __builtin_ia32_vpcmov_v32qi256 (v32qi, v32qi, v32qi)
+v4df __builtin_ia32_vpcmov_v4df256 (v4df, v4df, v4df)
+v8sf __builtin_ia32_vpcmov_v8sf256 (v8sf, v8sf, v8sf)
+v16qi __builtin_ia32_vpcomeqb (v16qi, v16qi)
+v8hi __builtin_ia32_vpcomeqw (v8hi, v8hi)
+v4si __builtin_ia32_vpcomeqd (v4si, v4si)
+v2di __builtin_ia32_vpcomeqq (v2di, v2di)
+v16qi __builtin_ia32_vpcomequb (v16qi, v16qi)
+v4si __builtin_ia32_vpcomequd (v4si, v4si)
+v2di __builtin_ia32_vpcomequq (v2di, v2di)
+v8hi __builtin_ia32_vpcomequw (v8hi, v8hi)
+v8hi __builtin_ia32_vpcomeqw (v8hi, v8hi)
+v16qi __builtin_ia32_vpcomfalseb (v16qi, v16qi)
+v4si __builtin_ia32_vpcomfalsed (v4si, v4si)
+v2di __builtin_ia32_vpcomfalseq (v2di, v2di)
+v16qi __builtin_ia32_vpcomfalseub (v16qi, v16qi)
+v4si __builtin_ia32_vpcomfalseud (v4si, v4si)
+v2di __builtin_ia32_vpcomfalseuq (v2di, v2di)
+v8hi __builtin_ia32_vpcomfalseuw (v8hi, v8hi)
+v8hi __builtin_ia32_vpcomfalsew (v8hi, v8hi)
+v16qi __builtin_ia32_vpcomgeb (v16qi, v16qi)
+v4si __builtin_ia32_vpcomged (v4si, v4si)
+v2di __builtin_ia32_vpcomgeq (v2di, v2di)
+v16qi __builtin_ia32_vpcomgeub (v16qi, v16qi)
+v4si __builtin_ia32_vpcomgeud (v4si, v4si)
+v2di __builtin_ia32_vpcomgeuq (v2di, v2di)
+v8hi __builtin_ia32_vpcomgeuw (v8hi, v8hi)
+v8hi __builtin_ia32_vpcomgew (v8hi, v8hi)
+v16qi __builtin_ia32_vpcomgtb (v16qi, v16qi)
+v4si __builtin_ia32_vpcomgtd (v4si, v4si)
+v2di __builtin_ia32_vpcomgtq (v2di, v2di)
+v16qi __builtin_ia32_vpcomgtub (v16qi, v16qi)
+v4si __builtin_ia32_vpcomgtud (v4si, v4si)
+v2di __builtin_ia32_vpcomgtuq (v2di, v2di)
+v8hi __builtin_ia32_vpcomgtuw (v8hi, v8hi)
+v8hi __builtin_ia32_vpcomgtw (v8hi, v8hi)
+v16qi __builtin_ia32_vpcomleb (v16qi, v16qi)
+v4si __builtin_ia32_vpcomled (v4si, v4si)
+v2di __builtin_ia32_vpcomleq (v2di, v2di)
+v16qi __builtin_ia32_vpcomleub (v16qi, v16qi)
+v4si __builtin_ia32_vpcomleud (v4si, v4si)
+v2di __builtin_ia32_vpcomleuq (v2di, v2di)
+v8hi __builtin_ia32_vpcomleuw (v8hi, v8hi)
+v8hi __builtin_ia32_vpcomlew (v8hi, v8hi)
+v16qi __builtin_ia32_vpcomltb (v16qi, v16qi)
+v4si __builtin_ia32_vpcomltd (v4si, v4si)
+v2di __builtin_ia32_vpcomltq (v2di, v2di)
+v16qi __builtin_ia32_vpcomltub (v16qi, v16qi)
+v4si __builtin_ia32_vpcomltud (v4si, v4si)
+v2di __builtin_ia32_vpcomltuq (v2di, v2di)
+v8hi __builtin_ia32_vpcomltuw (v8hi, v8hi)
+v8hi __builtin_ia32_vpcomltw (v8hi, v8hi)
+v16qi __builtin_ia32_vpcomneb (v16qi, v16qi)
+v4si __builtin_ia32_vpcomned (v4si, v4si)
+v2di __builtin_ia32_vpcomneq (v2di, v2di)
+v16qi __builtin_ia32_vpcomneub (v16qi, v16qi)
+v4si __builtin_ia32_vpcomneud (v4si, v4si)
+v2di __builtin_ia32_vpcomneuq (v2di, v2di)
+v8hi __builtin_ia32_vpcomneuw (v8hi, v8hi)
+v8hi __builtin_ia32_vpcomnew (v8hi, v8hi)
+v16qi __builtin_ia32_vpcomtrueb (v16qi, v16qi)
+v4si __builtin_ia32_vpcomtrued (v4si, v4si)
+v2di __builtin_ia32_vpcomtrueq (v2di, v2di)
+v16qi __builtin_ia32_vpcomtrueub (v16qi, v16qi)
+v4si __builtin_ia32_vpcomtrueud (v4si, v4si)
+v2di __builtin_ia32_vpcomtrueuq (v2di, v2di)
+v8hi __builtin_ia32_vpcomtrueuw (v8hi, v8hi)
+v8hi __builtin_ia32_vpcomtruew (v8hi, v8hi)
+v4si __builtin_ia32_vphaddbd (v16qi)
+v2di __builtin_ia32_vphaddbq (v16qi)
+v8hi __builtin_ia32_vphaddbw (v16qi)
+v2di __builtin_ia32_vphadddq (v4si)
+v4si __builtin_ia32_vphaddubd (v16qi)
+v2di __builtin_ia32_vphaddubq (v16qi)
+v8hi __builtin_ia32_vphaddubw (v16qi)
+v2di __builtin_ia32_vphaddudq (v4si)
+v4si __builtin_ia32_vphadduwd (v8hi)
+v2di __builtin_ia32_vphadduwq (v8hi)
+v4si __builtin_ia32_vphaddwd (v8hi)
+v2di __builtin_ia32_vphaddwq (v8hi)
+v8hi __builtin_ia32_vphsubbw (v16qi)
+v2di __builtin_ia32_vphsubdq (v4si)
+v4si __builtin_ia32_vphsubwd (v8hi)
+v4si __builtin_ia32_vpmacsdd (v4si, v4si, v4si)
+v2di __builtin_ia32_vpmacsdqh (v4si, v4si, v2di)
+v2di __builtin_ia32_vpmacsdql (v4si, v4si, v2di)
+v4si __builtin_ia32_vpmacssdd (v4si, v4si, v4si)
+v2di __builtin_ia32_vpmacssdqh (v4si, v4si, v2di)
+v2di __builtin_ia32_vpmacssdql (v4si, v4si, v2di)
+v4si __builtin_ia32_vpmacsswd (v8hi, v8hi, v4si)
+v8hi __builtin_ia32_vpmacssww (v8hi, v8hi, v8hi)
+v4si __builtin_ia32_vpmacswd (v8hi, v8hi, v4si)
+v8hi __builtin_ia32_vpmacsww (v8hi, v8hi, v8hi)
+v4si __builtin_ia32_vpmadcsswd (v8hi, v8hi, v4si)
+v4si __builtin_ia32_vpmadcswd (v8hi, v8hi, v4si)
+v16qi __builtin_ia32_vpperm (v16qi, v16qi, v16qi)
+v16qi __builtin_ia32_vprotb (v16qi, v16qi)
+v4si __builtin_ia32_vprotd (v4si, v4si)
+v2di __builtin_ia32_vprotq (v2di, v2di)
+v8hi __builtin_ia32_vprotw (v8hi, v8hi)
+v16qi __builtin_ia32_vpshab (v16qi, v16qi)
+v4si __builtin_ia32_vpshad (v4si, v4si)
+v2di __builtin_ia32_vpshaq (v2di, v2di)
+v8hi __builtin_ia32_vpshaw (v8hi, v8hi)
+v16qi __builtin_ia32_vpshlb (v16qi, v16qi)
+v4si __builtin_ia32_vpshld (v4si, v4si)
+v2di __builtin_ia32_vpshlq (v2di, v2di)
+v8hi __builtin_ia32_vpshlw (v8hi, v8hi)
+@end smallexample
+
+The following built-in functions are available when @option{-mfma4} is used.
+All of them generate the machine instruction that is part of the name
+with MMX registers.
+
+@smallexample
+v2df __builtin_ia32_fmaddpd (v2df, v2df, v2df)
+v4sf __builtin_ia32_fmaddps (v4sf, v4sf, v4sf)
+v2df __builtin_ia32_fmaddsd (v2df, v2df, v2df)
+v4sf __builtin_ia32_fmaddss (v4sf, v4sf, v4sf)
+v2df __builtin_ia32_fmsubpd (v2df, v2df, v2df)
+v4sf __builtin_ia32_fmsubps (v4sf, v4sf, v4sf)
+v2df __builtin_ia32_fmsubsd (v2df, v2df, v2df)
+v4sf __builtin_ia32_fmsubss (v4sf, v4sf, v4sf)
+v2df __builtin_ia32_fnmaddpd (v2df, v2df, v2df)
+v4sf __builtin_ia32_fnmaddps (v4sf, v4sf, v4sf)
+v2df __builtin_ia32_fnmaddsd (v2df, v2df, v2df)
+v4sf __builtin_ia32_fnmaddss (v4sf, v4sf, v4sf)
+v2df __builtin_ia32_fnmsubpd (v2df, v2df, v2df)
+v4sf __builtin_ia32_fnmsubps (v4sf, v4sf, v4sf)
+v2df __builtin_ia32_fnmsubsd (v2df, v2df, v2df)
+v4sf __builtin_ia32_fnmsubss (v4sf, v4sf, v4sf)
+v2df __builtin_ia32_fmaddsubpd  (v2df, v2df, v2df)
+v4sf __builtin_ia32_fmaddsubps  (v4sf, v4sf, v4sf)
+v2df __builtin_ia32_fmsubaddpd  (v2df, v2df, v2df)
+v4sf __builtin_ia32_fmsubaddps  (v4sf, v4sf, v4sf)
+v4df __builtin_ia32_fmaddpd256 (v4df, v4df, v4df)
+v8sf __builtin_ia32_fmaddps256 (v8sf, v8sf, v8sf)
+v4df __builtin_ia32_fmsubpd256 (v4df, v4df, v4df)
+v8sf __builtin_ia32_fmsubps256 (v8sf, v8sf, v8sf)
+v4df __builtin_ia32_fnmaddpd256 (v4df, v4df, v4df)
+v8sf __builtin_ia32_fnmaddps256 (v8sf, v8sf, v8sf)
+v4df __builtin_ia32_fnmsubpd256 (v4df, v4df, v4df)
+v8sf __builtin_ia32_fnmsubps256 (v8sf, v8sf, v8sf)
+v4df __builtin_ia32_fmaddsubpd256 (v4df, v4df, v4df)
+v8sf __builtin_ia32_fmaddsubps256 (v8sf, v8sf, v8sf)
+v4df __builtin_ia32_fmsubaddpd256 (v4df, v4df, v4df)
+v8sf __builtin_ia32_fmsubaddps256 (v8sf, v8sf, v8sf)
+
+@end smallexample
+
+The following built-in functions are available when @option{-mlwp} is used.
+
+@smallexample
+void __builtin_ia32_llwpcb16 (void *);
+void __builtin_ia32_llwpcb32 (void *);
+void __builtin_ia32_llwpcb64 (void *);
+void * __builtin_ia32_llwpcb16 (void);
+void * __builtin_ia32_llwpcb32 (void);
+void * __builtin_ia32_llwpcb64 (void);
+void __builtin_ia32_lwpval16 (unsigned short, unsigned int, unsigned short)
+void __builtin_ia32_lwpval32 (unsigned int, unsigned int, unsigned int)
+void __builtin_ia32_lwpval64 (unsigned __int64, unsigned int, unsigned int)
+unsigned char __builtin_ia32_lwpins16 (unsigned short, unsigned int, unsigned short)
+unsigned char __builtin_ia32_lwpins32 (unsigned int, unsigned int, unsigned int)
+unsigned char __builtin_ia32_lwpins64 (unsigned __int64, unsigned int, unsigned int)
+@end smallexample
+
+The following built-in functions are available when @option{-mbmi} is used.
+All of them generate the machine instruction that is part of the name.
+@smallexample
+unsigned int __builtin_ia32_bextr_u32(unsigned int, unsigned int);
+unsigned long long __builtin_ia32_bextr_u64 (unsigned long long, unsigned long long);
+unsigned short __builtin_ia32_lzcnt_16(unsigned short);
+unsigned int __builtin_ia32_lzcnt_u32(unsigned int);
+unsigned long long __builtin_ia32_lzcnt_u64 (unsigned long long);
+@end smallexample
+
+The following built-in functions are available when @option{-mtbm} is used.
+Both of them generate the immediate form of the bextr machine instruction.
+@smallexample
+unsigned int __builtin_ia32_bextri_u32 (unsigned int, const unsigned int);
+unsigned long long __builtin_ia32_bextri_u64 (unsigned long long, const unsigned long long);
+@end smallexample
+
+
+The following built-in functions are available when @option{-m3dnow} is used.
+All of them generate the machine instruction that is part of the name.
+
+@smallexample
+void __builtin_ia32_femms (void)
+v8qi __builtin_ia32_pavgusb (v8qi, v8qi)
+v2si __builtin_ia32_pf2id (v2sf)
+v2sf __builtin_ia32_pfacc (v2sf, v2sf)
+v2sf __builtin_ia32_pfadd (v2sf, v2sf)
+v2si __builtin_ia32_pfcmpeq (v2sf, v2sf)
+v2si __builtin_ia32_pfcmpge (v2sf, v2sf)
+v2si __builtin_ia32_pfcmpgt (v2sf, v2sf)
+v2sf __builtin_ia32_pfmax (v2sf, v2sf)
+v2sf __builtin_ia32_pfmin (v2sf, v2sf)
+v2sf __builtin_ia32_pfmul (v2sf, v2sf)
+v2sf __builtin_ia32_pfrcp (v2sf)
+v2sf __builtin_ia32_pfrcpit1 (v2sf, v2sf)
+v2sf __builtin_ia32_pfrcpit2 (v2sf, v2sf)
+v2sf __builtin_ia32_pfrsqrt (v2sf)
+v2sf __builtin_ia32_pfrsqrtit1 (v2sf, v2sf)
+v2sf __builtin_ia32_pfsub (v2sf, v2sf)
+v2sf __builtin_ia32_pfsubr (v2sf, v2sf)
+v2sf __builtin_ia32_pi2fd (v2si)
+v4hi __builtin_ia32_pmulhrw (v4hi, v4hi)
+@end smallexample
+
+The following built-in functions are available when both @option{-m3dnow}
+and @option{-march=athlon} are used.  All of them generate the machine
+instruction that is part of the name.
+
+@smallexample
+v2si __builtin_ia32_pf2iw (v2sf)
+v2sf __builtin_ia32_pfnacc (v2sf, v2sf)
+v2sf __builtin_ia32_pfpnacc (v2sf, v2sf)
+v2sf __builtin_ia32_pi2fw (v2si)
+v2sf __builtin_ia32_pswapdsf (v2sf)
+v2si __builtin_ia32_pswapdsi (v2si)
+@end smallexample
+
+@node MIPS DSP Built-in Functions
+@subsection MIPS DSP Built-in Functions
+
+The MIPS DSP Application-Specific Extension (ASE) includes new
+instructions that are designed to improve the performance of DSP and
+media applications.  It provides instructions that operate on packed
+8-bit/16-bit integer data, Q7, Q15 and Q31 fractional data.
+
+GCC supports MIPS DSP operations using both the generic
+vector extensions (@pxref{Vector Extensions}) and a collection of
+MIPS-specific built-in functions.  Both kinds of support are
+enabled by the @option{-mdsp} command-line option.
+
+Revision 2 of the ASE was introduced in the second half of 2006.
+This revision adds extra instructions to the original ASE, but is
+otherwise backwards-compatible with it.  You can select revision 2
+using the command-line option @option{-mdspr2}; this option implies
+@option{-mdsp}.
+
+The SCOUNT and POS bits of the DSP control register are global.  The
+WRDSP, EXTPDP, EXTPDPV and MTHLIP instructions modify the SCOUNT and
+POS bits.  During optimization, the compiler will not delete these
+instructions and it will not delete calls to functions containing
+these instructions.
+
+At present, GCC only provides support for operations on 32-bit
+vectors.  The vector type associated with 8-bit integer data is
+usually called @code{v4i8}, the vector type associated with Q7
+is usually called @code{v4q7}, the vector type associated with 16-bit
+integer data is usually called @code{v2i16}, and the vector type
+associated with Q15 is usually called @code{v2q15}.  They can be
+defined in C as follows:
+
+@smallexample
+typedef signed char v4i8 __attribute__ ((vector_size(4)));
+typedef signed char v4q7 __attribute__ ((vector_size(4)));
+typedef short v2i16 __attribute__ ((vector_size(4)));
+typedef short v2q15 __attribute__ ((vector_size(4)));
+@end smallexample
+
+@code{v4i8}, @code{v4q7}, @code{v2i16} and @code{v2q15} values are
+initialized in the same way as aggregates.  For example:
+
+@smallexample
+v4i8 a = @{1, 2, 3, 4@};
+v4i8 b;
+b = (v4i8) @{5, 6, 7, 8@};
+
+v2q15 c = @{0x0fcb, 0x3a75@};
+v2q15 d;
+d = (v2q15) @{0.1234 * 0x1.0p15, 0.4567 * 0x1.0p15@};
+@end smallexample
+
+@emph{Note:} The CPU's endianness determines the order in which values
+are packed.  On little-endian targets, the first value is the least
+significant and the last value is the most significant.  The opposite
+order applies to big-endian targets.  For example, the code above will
+set the lowest byte of @code{a} to @code{1} on little-endian targets
+and @code{4} on big-endian targets.
+
+@emph{Note:} Q7, Q15 and Q31 values must be initialized with their integer
+representation.  As shown in this example, the integer representation
+of a Q7 value can be obtained by multiplying the fractional value by
+@code{0x1.0p7}.  The equivalent for Q15 values is to multiply by
+@code{0x1.0p15}.  The equivalent for Q31 values is to multiply by
+@code{0x1.0p31}.
+
+The table below lists the @code{v4i8} and @code{v2q15} operations for which
+hardware support exists.  @code{a} and @code{b} are @code{v4i8} values,
+and @code{c} and @code{d} are @code{v2q15} values.
+
+@multitable @columnfractions .50 .50
+@item C code @tab MIPS instruction
+@item @code{a + b} @tab @code{addu.qb}
+@item @code{c + d} @tab @code{addq.ph}
+@item @code{a - b} @tab @code{subu.qb}
+@item @code{c - d} @tab @code{subq.ph}
+@end multitable
+
+The table below lists the @code{v2i16} operation for which
+hardware support exists for the DSP ASE REV 2.  @code{e} and @code{f} are
+@code{v2i16} values.
+
+@multitable @columnfractions .50 .50
+@item C code @tab MIPS instruction
+@item @code{e * f} @tab @code{mul.ph}
+@end multitable
+
+It is easier to describe the DSP built-in functions if we first define
+the following types:
+
+@smallexample
+typedef int q31;
+typedef int i32;
+typedef unsigned int ui32;
+typedef long long a64;
+@end smallexample
+
+@code{q31} and @code{i32} are actually the same as @code{int}, but we
+use @code{q31} to indicate a Q31 fractional value and @code{i32} to
+indicate a 32-bit integer value.  Similarly, @code{a64} is the same as
+@code{long long}, but we use @code{a64} to indicate values that will
+be placed in one of the four DSP accumulators (@code{$ac0},
+@code{$ac1}, @code{$ac2} or @code{$ac3}).
+
+Also, some built-in functions prefer or require immediate numbers as
+parameters, because the corresponding DSP instructions accept both immediate
+numbers and register operands, or accept immediate numbers only.  The
+immediate parameters are listed as follows.
+
+@smallexample
+imm0_3: 0 to 3.
+imm0_7: 0 to 7.
+imm0_15: 0 to 15.
+imm0_31: 0 to 31.
+imm0_63: 0 to 63.
+imm0_255: 0 to 255.
+imm_n32_31: -32 to 31.
+imm_n512_511: -512 to 511.
+@end smallexample
+
+The following built-in functions map directly to a particular MIPS DSP
+instruction.  Please refer to the architecture specification
+for details on what each instruction does.
+
+@smallexample
+v2q15 __builtin_mips_addq_ph (v2q15, v2q15)
+v2q15 __builtin_mips_addq_s_ph (v2q15, v2q15)
+q31 __builtin_mips_addq_s_w (q31, q31)
+v4i8 __builtin_mips_addu_qb (v4i8, v4i8)
+v4i8 __builtin_mips_addu_s_qb (v4i8, v4i8)
+v2q15 __builtin_mips_subq_ph (v2q15, v2q15)
+v2q15 __builtin_mips_subq_s_ph (v2q15, v2q15)
+q31 __builtin_mips_subq_s_w (q31, q31)
+v4i8 __builtin_mips_subu_qb (v4i8, v4i8)
+v4i8 __builtin_mips_subu_s_qb (v4i8, v4i8)
+i32 __builtin_mips_addsc (i32, i32)
+i32 __builtin_mips_addwc (i32, i32)
+i32 __builtin_mips_modsub (i32, i32)
+i32 __builtin_mips_raddu_w_qb (v4i8)
+v2q15 __builtin_mips_absq_s_ph (v2q15)
+q31 __builtin_mips_absq_s_w (q31)
+v4i8 __builtin_mips_precrq_qb_ph (v2q15, v2q15)
+v2q15 __builtin_mips_precrq_ph_w (q31, q31)
+v2q15 __builtin_mips_precrq_rs_ph_w (q31, q31)
+v4i8 __builtin_mips_precrqu_s_qb_ph (v2q15, v2q15)
+q31 __builtin_mips_preceq_w_phl (v2q15)
+q31 __builtin_mips_preceq_w_phr (v2q15)
+v2q15 __builtin_mips_precequ_ph_qbl (v4i8)
+v2q15 __builtin_mips_precequ_ph_qbr (v4i8)
+v2q15 __builtin_mips_precequ_ph_qbla (v4i8)
+v2q15 __builtin_mips_precequ_ph_qbra (v4i8)
+v2q15 __builtin_mips_preceu_ph_qbl (v4i8)
+v2q15 __builtin_mips_preceu_ph_qbr (v4i8)
+v2q15 __builtin_mips_preceu_ph_qbla (v4i8)
+v2q15 __builtin_mips_preceu_ph_qbra (v4i8)
+v4i8 __builtin_mips_shll_qb (v4i8, imm0_7)
+v4i8 __builtin_mips_shll_qb (v4i8, i32)
+v2q15 __builtin_mips_shll_ph (v2q15, imm0_15)
+v2q15 __builtin_mips_shll_ph (v2q15, i32)
+v2q15 __builtin_mips_shll_s_ph (v2q15, imm0_15)
+v2q15 __builtin_mips_shll_s_ph (v2q15, i32)
+q31 __builtin_mips_shll_s_w (q31, imm0_31)
+q31 __builtin_mips_shll_s_w (q31, i32)
+v4i8 __builtin_mips_shrl_qb (v4i8, imm0_7)
+v4i8 __builtin_mips_shrl_qb (v4i8, i32)
+v2q15 __builtin_mips_shra_ph (v2q15, imm0_15)
+v2q15 __builtin_mips_shra_ph (v2q15, i32)
+v2q15 __builtin_mips_shra_r_ph (v2q15, imm0_15)
+v2q15 __builtin_mips_shra_r_ph (v2q15, i32)
+q31 __builtin_mips_shra_r_w (q31, imm0_31)
+q31 __builtin_mips_shra_r_w (q31, i32)
+v2q15 __builtin_mips_muleu_s_ph_qbl (v4i8, v2q15)
+v2q15 __builtin_mips_muleu_s_ph_qbr (v4i8, v2q15)
+v2q15 __builtin_mips_mulq_rs_ph (v2q15, v2q15)
+q31 __builtin_mips_muleq_s_w_phl (v2q15, v2q15)
+q31 __builtin_mips_muleq_s_w_phr (v2q15, v2q15)
+a64 __builtin_mips_dpau_h_qbl (a64, v4i8, v4i8)
+a64 __builtin_mips_dpau_h_qbr (a64, v4i8, v4i8)
+a64 __builtin_mips_dpsu_h_qbl (a64, v4i8, v4i8)
+a64 __builtin_mips_dpsu_h_qbr (a64, v4i8, v4i8)
+a64 __builtin_mips_dpaq_s_w_ph (a64, v2q15, v2q15)
+a64 __builtin_mips_dpaq_sa_l_w (a64, q31, q31)
+a64 __builtin_mips_dpsq_s_w_ph (a64, v2q15, v2q15)
+a64 __builtin_mips_dpsq_sa_l_w (a64, q31, q31)
+a64 __builtin_mips_mulsaq_s_w_ph (a64, v2q15, v2q15)
+a64 __builtin_mips_maq_s_w_phl (a64, v2q15, v2q15)
+a64 __builtin_mips_maq_s_w_phr (a64, v2q15, v2q15)
+a64 __builtin_mips_maq_sa_w_phl (a64, v2q15, v2q15)
+a64 __builtin_mips_maq_sa_w_phr (a64, v2q15, v2q15)
+i32 __builtin_mips_bitrev (i32)
+i32 __builtin_mips_insv (i32, i32)
+v4i8 __builtin_mips_repl_qb (imm0_255)
+v4i8 __builtin_mips_repl_qb (i32)
+v2q15 __builtin_mips_repl_ph (imm_n512_511)
+v2q15 __builtin_mips_repl_ph (i32)
+void __builtin_mips_cmpu_eq_qb (v4i8, v4i8)
+void __builtin_mips_cmpu_lt_qb (v4i8, v4i8)
+void __builtin_mips_cmpu_le_qb (v4i8, v4i8)
+i32 __builtin_mips_cmpgu_eq_qb (v4i8, v4i8)
+i32 __builtin_mips_cmpgu_lt_qb (v4i8, v4i8)
+i32 __builtin_mips_cmpgu_le_qb (v4i8, v4i8)
+void __builtin_mips_cmp_eq_ph (v2q15, v2q15)
+void __builtin_mips_cmp_lt_ph (v2q15, v2q15)
+void __builtin_mips_cmp_le_ph (v2q15, v2q15)
+v4i8 __builtin_mips_pick_qb (v4i8, v4i8)
+v2q15 __builtin_mips_pick_ph (v2q15, v2q15)
+v2q15 __builtin_mips_packrl_ph (v2q15, v2q15)
+i32 __builtin_mips_extr_w (a64, imm0_31)
+i32 __builtin_mips_extr_w (a64, i32)
+i32 __builtin_mips_extr_r_w (a64, imm0_31)
+i32 __builtin_mips_extr_s_h (a64, i32)
+i32 __builtin_mips_extr_rs_w (a64, imm0_31)
+i32 __builtin_mips_extr_rs_w (a64, i32)
+i32 __builtin_mips_extr_s_h (a64, imm0_31)
+i32 __builtin_mips_extr_r_w (a64, i32)
+i32 __builtin_mips_extp (a64, imm0_31)
+i32 __builtin_mips_extp (a64, i32)
+i32 __builtin_mips_extpdp (a64, imm0_31)
+i32 __builtin_mips_extpdp (a64, i32)
+a64 __builtin_mips_shilo (a64, imm_n32_31)
+a64 __builtin_mips_shilo (a64, i32)
+a64 __builtin_mips_mthlip (a64, i32)
+void __builtin_mips_wrdsp (i32, imm0_63)
+i32 __builtin_mips_rddsp (imm0_63)
+i32 __builtin_mips_lbux (void *, i32)
+i32 __builtin_mips_lhx (void *, i32)
+i32 __builtin_mips_lwx (void *, i32)
+i32 __builtin_mips_bposge32 (void)
+a64 __builtin_mips_madd (a64, i32, i32);
+a64 __builtin_mips_maddu (a64, ui32, ui32);
+a64 __builtin_mips_msub (a64, i32, i32);
+a64 __builtin_mips_msubu (a64, ui32, ui32);
+a64 __builtin_mips_mult (i32, i32);
+a64 __builtin_mips_multu (ui32, ui32);
+@end smallexample
+
+The following built-in functions map directly to a particular MIPS DSP REV 2
+instruction.  Please refer to the architecture specification
+for details on what each instruction does.
+
+@smallexample
+v4q7 __builtin_mips_absq_s_qb (v4q7);
+v2i16 __builtin_mips_addu_ph (v2i16, v2i16);
+v2i16 __builtin_mips_addu_s_ph (v2i16, v2i16);
+v4i8 __builtin_mips_adduh_qb (v4i8, v4i8);
+v4i8 __builtin_mips_adduh_r_qb (v4i8, v4i8);
+i32 __builtin_mips_append (i32, i32, imm0_31);
+i32 __builtin_mips_balign (i32, i32, imm0_3);
+i32 __builtin_mips_cmpgdu_eq_qb (v4i8, v4i8);
+i32 __builtin_mips_cmpgdu_lt_qb (v4i8, v4i8);
+i32 __builtin_mips_cmpgdu_le_qb (v4i8, v4i8);
+a64 __builtin_mips_dpa_w_ph (a64, v2i16, v2i16);
+a64 __builtin_mips_dps_w_ph (a64, v2i16, v2i16);
+v2i16 __builtin_mips_mul_ph (v2i16, v2i16);
+v2i16 __builtin_mips_mul_s_ph (v2i16, v2i16);
+q31 __builtin_mips_mulq_rs_w (q31, q31);
+v2q15 __builtin_mips_mulq_s_ph (v2q15, v2q15);
+q31 __builtin_mips_mulq_s_w (q31, q31);
+a64 __builtin_mips_mulsa_w_ph (a64, v2i16, v2i16);
+v4i8 __builtin_mips_precr_qb_ph (v2i16, v2i16);
+v2i16 __builtin_mips_precr_sra_ph_w (i32, i32, imm0_31);
+v2i16 __builtin_mips_precr_sra_r_ph_w (i32, i32, imm0_31);
+i32 __builtin_mips_prepend (i32, i32, imm0_31);
+v4i8 __builtin_mips_shra_qb (v4i8, imm0_7);
+v4i8 __builtin_mips_shra_r_qb (v4i8, imm0_7);
+v4i8 __builtin_mips_shra_qb (v4i8, i32);
+v4i8 __builtin_mips_shra_r_qb (v4i8, i32);
+v2i16 __builtin_mips_shrl_ph (v2i16, imm0_15);
+v2i16 __builtin_mips_shrl_ph (v2i16, i32);
+v2i16 __builtin_mips_subu_ph (v2i16, v2i16);
+v2i16 __builtin_mips_subu_s_ph (v2i16, v2i16);
+v4i8 __builtin_mips_subuh_qb (v4i8, v4i8);
+v4i8 __builtin_mips_subuh_r_qb (v4i8, v4i8);
+v2q15 __builtin_mips_addqh_ph (v2q15, v2q15);
+v2q15 __builtin_mips_addqh_r_ph (v2q15, v2q15);
+q31 __builtin_mips_addqh_w (q31, q31);
+q31 __builtin_mips_addqh_r_w (q31, q31);
+v2q15 __builtin_mips_subqh_ph (v2q15, v2q15);
+v2q15 __builtin_mips_subqh_r_ph (v2q15, v2q15);
+q31 __builtin_mips_subqh_w (q31, q31);
+q31 __builtin_mips_subqh_r_w (q31, q31);
+a64 __builtin_mips_dpax_w_ph (a64, v2i16, v2i16);
+a64 __builtin_mips_dpsx_w_ph (a64, v2i16, v2i16);
+a64 __builtin_mips_dpaqx_s_w_ph (a64, v2q15, v2q15);
+a64 __builtin_mips_dpaqx_sa_w_ph (a64, v2q15, v2q15);
+a64 __builtin_mips_dpsqx_s_w_ph (a64, v2q15, v2q15);
+a64 __builtin_mips_dpsqx_sa_w_ph (a64, v2q15, v2q15);
+@end smallexample
+
+
+@node MIPS Paired-Single Support
+@subsection MIPS Paired-Single Support
+
+The MIPS64 architecture includes a number of instructions that
+operate on pairs of single-precision floating-point values.
+Each pair is packed into a 64-bit floating-point register,
+with one element being designated the ``upper half'' and
+the other being designated the ``lower half''.
+
+GCC supports paired-single operations using both the generic
+vector extensions (@pxref{Vector Extensions}) and a collection of
+MIPS-specific built-in functions.  Both kinds of support are
+enabled by the @option{-mpaired-single} command-line option.
+
+The vector type associated with paired-single values is usually
+called @code{v2sf}.  It can be defined in C as follows:
+
+@smallexample
+typedef float v2sf __attribute__ ((vector_size (8)));
+@end smallexample
+
+@code{v2sf} values are initialized in the same way as aggregates.
+For example:
+
+@smallexample
+v2sf a = @{1.5, 9.1@};
+v2sf b;
+float e, f;
+b = (v2sf) @{e, f@};
+@end smallexample
+
+@emph{Note:} The CPU's endianness determines which value is stored in
+the upper half of a register and which value is stored in the lower half.
+On little-endian targets, the first value is the lower one and the second
+value is the upper one.  The opposite order applies to big-endian targets.
+For example, the code above will set the lower half of @code{a} to
+@code{1.5} on little-endian targets and @code{9.1} on big-endian targets.
+
+@node MIPS Loongson Built-in Functions
+@subsection MIPS Loongson Built-in Functions
+
+GCC provides intrinsics to access the SIMD instructions provided by the
+ST Microelectronics Loongson-2E and -2F processors.  These intrinsics,
+available after inclusion of the @code{loongson.h} header file,
+operate on the following 64-bit vector types:
+
+@itemize
+@item @code{uint8x8_t}, a vector of eight unsigned 8-bit integers;
+@item @code{uint16x4_t}, a vector of four unsigned 16-bit integers;
+@item @code{uint32x2_t}, a vector of two unsigned 32-bit integers;
+@item @code{int8x8_t}, a vector of eight signed 8-bit integers;
+@item @code{int16x4_t}, a vector of four signed 16-bit integers;
+@item @code{int32x2_t}, a vector of two signed 32-bit integers.
+@end itemize
+
+The intrinsics provided are listed below; each is named after the
+machine instruction to which it corresponds, with suffixes added as
+appropriate to distinguish intrinsics that expand to the same machine
+instruction yet have different argument types.  Refer to the architecture
+documentation for a description of the functionality of each
+instruction.
+
+@smallexample
+int16x4_t packsswh (int32x2_t s, int32x2_t t);
+int8x8_t packsshb (int16x4_t s, int16x4_t t);
+uint8x8_t packushb (uint16x4_t s, uint16x4_t t);
+uint32x2_t paddw_u (uint32x2_t s, uint32x2_t t);
+uint16x4_t paddh_u (uint16x4_t s, uint16x4_t t);
+uint8x8_t paddb_u (uint8x8_t s, uint8x8_t t);
+int32x2_t paddw_s (int32x2_t s, int32x2_t t);
+int16x4_t paddh_s (int16x4_t s, int16x4_t t);
+int8x8_t paddb_s (int8x8_t s, int8x8_t t);
+uint64_t paddd_u (uint64_t s, uint64_t t);
+int64_t paddd_s (int64_t s, int64_t t);
+int16x4_t paddsh (int16x4_t s, int16x4_t t);
+int8x8_t paddsb (int8x8_t s, int8x8_t t);
+uint16x4_t paddush (uint16x4_t s, uint16x4_t t);
+uint8x8_t paddusb (uint8x8_t s, uint8x8_t t);
+uint64_t pandn_ud (uint64_t s, uint64_t t);
+uint32x2_t pandn_uw (uint32x2_t s, uint32x2_t t);
+uint16x4_t pandn_uh (uint16x4_t s, uint16x4_t t);
+uint8x8_t pandn_ub (uint8x8_t s, uint8x8_t t);
+int64_t pandn_sd (int64_t s, int64_t t);
+int32x2_t pandn_sw (int32x2_t s, int32x2_t t);
+int16x4_t pandn_sh (int16x4_t s, int16x4_t t);
+int8x8_t pandn_sb (int8x8_t s, int8x8_t t);
+uint16x4_t pavgh (uint16x4_t s, uint16x4_t t);
+uint8x8_t pavgb (uint8x8_t s, uint8x8_t t);
+uint32x2_t pcmpeqw_u (uint32x2_t s, uint32x2_t t);
+uint16x4_t pcmpeqh_u (uint16x4_t s, uint16x4_t t);
+uint8x8_t pcmpeqb_u (uint8x8_t s, uint8x8_t t);
+int32x2_t pcmpeqw_s (int32x2_t s, int32x2_t t);
+int16x4_t pcmpeqh_s (int16x4_t s, int16x4_t t);
+int8x8_t pcmpeqb_s (int8x8_t s, int8x8_t t);
+uint32x2_t pcmpgtw_u (uint32x2_t s, uint32x2_t t);
+uint16x4_t pcmpgth_u (uint16x4_t s, uint16x4_t t);
+uint8x8_t pcmpgtb_u (uint8x8_t s, uint8x8_t t);
+int32x2_t pcmpgtw_s (int32x2_t s, int32x2_t t);
+int16x4_t pcmpgth_s (int16x4_t s, int16x4_t t);
+int8x8_t pcmpgtb_s (int8x8_t s, int8x8_t t);
+uint16x4_t pextrh_u (uint16x4_t s, int field);
+int16x4_t pextrh_s (int16x4_t s, int field);
+uint16x4_t pinsrh_0_u (uint16x4_t s, uint16x4_t t);
+uint16x4_t pinsrh_1_u (uint16x4_t s, uint16x4_t t);
+uint16x4_t pinsrh_2_u (uint16x4_t s, uint16x4_t t);
+uint16x4_t pinsrh_3_u (uint16x4_t s, uint16x4_t t);
+int16x4_t pinsrh_0_s (int16x4_t s, int16x4_t t);
+int16x4_t pinsrh_1_s (int16x4_t s, int16x4_t t);
+int16x4_t pinsrh_2_s (int16x4_t s, int16x4_t t);
+int16x4_t pinsrh_3_s (int16x4_t s, int16x4_t t);
+int32x2_t pmaddhw (int16x4_t s, int16x4_t t);
+int16x4_t pmaxsh (int16x4_t s, int16x4_t t);
+uint8x8_t pmaxub (uint8x8_t s, uint8x8_t t);
+int16x4_t pminsh (int16x4_t s, int16x4_t t);
+uint8x8_t pminub (uint8x8_t s, uint8x8_t t);
+uint8x8_t pmovmskb_u (uint8x8_t s);
+int8x8_t pmovmskb_s (int8x8_t s);
+uint16x4_t pmulhuh (uint16x4_t s, uint16x4_t t);
+int16x4_t pmulhh (int16x4_t s, int16x4_t t);
+int16x4_t pmullh (int16x4_t s, int16x4_t t);
+int64_t pmuluw (uint32x2_t s, uint32x2_t t);
+uint8x8_t pasubub (uint8x8_t s, uint8x8_t t);
+uint16x4_t biadd (uint8x8_t s);
+uint16x4_t psadbh (uint8x8_t s, uint8x8_t t);
+uint16x4_t pshufh_u (uint16x4_t dest, uint16x4_t s, uint8_t order);
+int16x4_t pshufh_s (int16x4_t dest, int16x4_t s, uint8_t order);
+uint16x4_t psllh_u (uint16x4_t s, uint8_t amount);
+int16x4_t psllh_s (int16x4_t s, uint8_t amount);
+uint32x2_t psllw_u (uint32x2_t s, uint8_t amount);
+int32x2_t psllw_s (int32x2_t s, uint8_t amount);
+uint16x4_t psrlh_u (uint16x4_t s, uint8_t amount);
+int16x4_t psrlh_s (int16x4_t s, uint8_t amount);
+uint32x2_t psrlw_u (uint32x2_t s, uint8_t amount);
+int32x2_t psrlw_s (int32x2_t s, uint8_t amount);
+uint16x4_t psrah_u (uint16x4_t s, uint8_t amount);
+int16x4_t psrah_s (int16x4_t s, uint8_t amount);
+uint32x2_t psraw_u (uint32x2_t s, uint8_t amount);
+int32x2_t psraw_s (int32x2_t s, uint8_t amount);
+uint32x2_t psubw_u (uint32x2_t s, uint32x2_t t);
+uint16x4_t psubh_u (uint16x4_t s, uint16x4_t t);
+uint8x8_t psubb_u (uint8x8_t s, uint8x8_t t);
+int32x2_t psubw_s (int32x2_t s, int32x2_t t);
+int16x4_t psubh_s (int16x4_t s, int16x4_t t);
+int8x8_t psubb_s (int8x8_t s, int8x8_t t);
+uint64_t psubd_u (uint64_t s, uint64_t t);
+int64_t psubd_s (int64_t s, int64_t t);
+int16x4_t psubsh (int16x4_t s, int16x4_t t);
+int8x8_t psubsb (int8x8_t s, int8x8_t t);
+uint16x4_t psubush (uint16x4_t s, uint16x4_t t);
+uint8x8_t psubusb (uint8x8_t s, uint8x8_t t);
+uint32x2_t punpckhwd_u (uint32x2_t s, uint32x2_t t);
+uint16x4_t punpckhhw_u (uint16x4_t s, uint16x4_t t);
+uint8x8_t punpckhbh_u (uint8x8_t s, uint8x8_t t);
+int32x2_t punpckhwd_s (int32x2_t s, int32x2_t t);
+int16x4_t punpckhhw_s (int16x4_t s, int16x4_t t);
+int8x8_t punpckhbh_s (int8x8_t s, int8x8_t t);
+uint32x2_t punpcklwd_u (uint32x2_t s, uint32x2_t t);
+uint16x4_t punpcklhw_u (uint16x4_t s, uint16x4_t t);
+uint8x8_t punpcklbh_u (uint8x8_t s, uint8x8_t t);
+int32x2_t punpcklwd_s (int32x2_t s, int32x2_t t);
+int16x4_t punpcklhw_s (int16x4_t s, int16x4_t t);
+int8x8_t punpcklbh_s (int8x8_t s, int8x8_t t);
+@end smallexample
+
+@menu
+* Paired-Single Arithmetic::
+* Paired-Single Built-in Functions::
+* MIPS-3D Built-in Functions::
+@end menu
+
+@node Paired-Single Arithmetic
+@subsubsection Paired-Single Arithmetic
+
+The table below lists the @code{v2sf} operations for which hardware
+support exists.  @code{a}, @code{b} and @code{c} are @code{v2sf}
+values and @code{x} is an integral value.
+
+@multitable @columnfractions .50 .50
+@item C code @tab MIPS instruction
+@item @code{a + b} @tab @code{add.ps}
+@item @code{a - b} @tab @code{sub.ps}
+@item @code{-a} @tab @code{neg.ps}
+@item @code{a * b} @tab @code{mul.ps}
+@item @code{a * b + c} @tab @code{madd.ps}
+@item @code{a * b - c} @tab @code{msub.ps}
+@item @code{-(a * b + c)} @tab @code{nmadd.ps}
+@item @code{-(a * b - c)} @tab @code{nmsub.ps}
+@item @code{x ? a : b} @tab @code{movn.ps}/@code{movz.ps}
+@end multitable
+
+Note that the multiply-accumulate instructions can be disabled
+using the command-line option @code{-mno-fused-madd}.
+
+@node Paired-Single Built-in Functions
+@subsubsection Paired-Single Built-in Functions
+
+The following paired-single functions map directly to a particular
+MIPS instruction.  Please refer to the architecture specification
+for details on what each instruction does.
+
+@table @code
+@item v2sf __builtin_mips_pll_ps (v2sf, v2sf)
+Pair lower lower (@code{pll.ps}).
+
+@item v2sf __builtin_mips_pul_ps (v2sf, v2sf)
+Pair upper lower (@code{pul.ps}).
+
+@item v2sf __builtin_mips_plu_ps (v2sf, v2sf)
+Pair lower upper (@code{plu.ps}).
+
+@item v2sf __builtin_mips_puu_ps (v2sf, v2sf)
+Pair upper upper (@code{puu.ps}).
+
+@item v2sf __builtin_mips_cvt_ps_s (float, float)
+Convert pair to paired single (@code{cvt.ps.s}).
+
+@item float __builtin_mips_cvt_s_pl (v2sf)
+Convert pair lower to single (@code{cvt.s.pl}).
+
+@item float __builtin_mips_cvt_s_pu (v2sf)
+Convert pair upper to single (@code{cvt.s.pu}).
+
+@item v2sf __builtin_mips_abs_ps (v2sf)
+Absolute value (@code{abs.ps}).
+
+@item v2sf __builtin_mips_alnv_ps (v2sf, v2sf, int)
+Align variable (@code{alnv.ps}).
+
+@emph{Note:} The value of the third parameter must be 0 or 4
+modulo 8, otherwise the result will be unpredictable.  Please read the
+instruction description for details.
+@end table
+
+The following multi-instruction functions are also available.
+In each case, @var{cond} can be any of the 16 floating-point conditions:
+@code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, @code{ult},
+@code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq}, @code{ngl},
+@code{lt}, @code{nge}, @code{le} or @code{ngt}.
+
+@table @code
+@item v2sf __builtin_mips_movt_c_@var{cond}_ps (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
+@itemx v2sf __builtin_mips_movf_c_@var{cond}_ps (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
+Conditional move based on floating point comparison (@code{c.@var{cond}.ps},
+@code{movt.ps}/@code{movf.ps}).
+
+The @code{movt} functions return the value @var{x} computed by:
+
+@smallexample
+c.@var{cond}.ps @var{cc},@var{a},@var{b}
+mov.ps @var{x},@var{c}
+movt.ps @var{x},@var{d},@var{cc}
+@end smallexample
+
+The @code{movf} functions are similar but use @code{movf.ps} instead
+of @code{movt.ps}.
+
+@item int __builtin_mips_upper_c_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
+@itemx int __builtin_mips_lower_c_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
+Comparison of two paired-single values (@code{c.@var{cond}.ps},
+@code{bc1t}/@code{bc1f}).
+
+These functions compare @var{a} and @var{b} using @code{c.@var{cond}.ps}
+and return either the upper or lower half of the result.  For example:
+
+@smallexample
+v2sf a, b;
+if (__builtin_mips_upper_c_eq_ps (a, b))
+  upper_halves_are_equal ();
+else
+  upper_halves_are_unequal ();
+
+if (__builtin_mips_lower_c_eq_ps (a, b))
+  lower_halves_are_equal ();
+else
+  lower_halves_are_unequal ();
+@end smallexample
+@end table
+
+@node MIPS-3D Built-in Functions
+@subsubsection MIPS-3D Built-in Functions
+
+The MIPS-3D Application-Specific Extension (ASE) includes additional
+paired-single instructions that are designed to improve the performance
+of 3D graphics operations.  Support for these instructions is controlled
+by the @option{-mips3d} command-line option.
+
+The functions listed below map directly to a particular MIPS-3D
+instruction.  Please refer to the architecture specification for
+more details on what each instruction does.
+
+@table @code
+@item v2sf __builtin_mips_addr_ps (v2sf, v2sf)
+Reduction add (@code{addr.ps}).
+
+@item v2sf __builtin_mips_mulr_ps (v2sf, v2sf)
+Reduction multiply (@code{mulr.ps}).
+
+@item v2sf __builtin_mips_cvt_pw_ps (v2sf)
+Convert paired single to paired word (@code{cvt.pw.ps}).
+
+@item v2sf __builtin_mips_cvt_ps_pw (v2sf)
+Convert paired word to paired single (@code{cvt.ps.pw}).
+
+@item float __builtin_mips_recip1_s (float)
+@itemx double __builtin_mips_recip1_d (double)
+@itemx v2sf __builtin_mips_recip1_ps (v2sf)
+Reduced precision reciprocal (sequence step 1) (@code{recip1.@var{fmt}}).
+
+@item float __builtin_mips_recip2_s (float, float)
+@itemx double __builtin_mips_recip2_d (double, double)
+@itemx v2sf __builtin_mips_recip2_ps (v2sf, v2sf)
+Reduced precision reciprocal (sequence step 2) (@code{recip2.@var{fmt}}).
+
+@item float __builtin_mips_rsqrt1_s (float)
+@itemx double __builtin_mips_rsqrt1_d (double)
+@itemx v2sf __builtin_mips_rsqrt1_ps (v2sf)
+Reduced precision reciprocal square root (sequence step 1)
+(@code{rsqrt1.@var{fmt}}).
+
+@item float __builtin_mips_rsqrt2_s (float, float)
+@itemx double __builtin_mips_rsqrt2_d (double, double)
+@itemx v2sf __builtin_mips_rsqrt2_ps (v2sf, v2sf)
+Reduced precision reciprocal square root (sequence step 2)
+(@code{rsqrt2.@var{fmt}}).
+@end table
+
+The following multi-instruction functions are also available.
+In each case, @var{cond} can be any of the 16 floating-point conditions:
+@code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, @code{ult},
+@code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq},
+@code{ngl}, @code{lt}, @code{nge}, @code{le} or @code{ngt}.
+
+@table @code
+@item int __builtin_mips_cabs_@var{cond}_s (float @var{a}, float @var{b})
+@itemx int __builtin_mips_cabs_@var{cond}_d (double @var{a}, double @var{b})
+Absolute comparison of two scalar values (@code{cabs.@var{cond}.@var{fmt}},
+@code{bc1t}/@code{bc1f}).
+
+These functions compare @var{a} and @var{b} using @code{cabs.@var{cond}.s}
+or @code{cabs.@var{cond}.d} and return the result as a boolean value.
+For example:
+
+@smallexample
+float a, b;
+if (__builtin_mips_cabs_eq_s (a, b))
+  true ();
+else
+  false ();
+@end smallexample
+
+@item int __builtin_mips_upper_cabs_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
+@itemx int __builtin_mips_lower_cabs_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
+Absolute comparison of two paired-single values (@code{cabs.@var{cond}.ps},
+@code{bc1t}/@code{bc1f}).
+
+These functions compare @var{a} and @var{b} using @code{cabs.@var{cond}.ps}
+and return either the upper or lower half of the result.  For example:
+
+@smallexample
+v2sf a, b;
+if (__builtin_mips_upper_cabs_eq_ps (a, b))
+  upper_halves_are_equal ();
+else
+  upper_halves_are_unequal ();
+
+if (__builtin_mips_lower_cabs_eq_ps (a, b))
+  lower_halves_are_equal ();
+else
+  lower_halves_are_unequal ();
+@end smallexample
+
+@item v2sf __builtin_mips_movt_cabs_@var{cond}_ps (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
+@itemx v2sf __builtin_mips_movf_cabs_@var{cond}_ps (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
+Conditional move based on absolute comparison (@code{cabs.@var{cond}.ps},
+@code{movt.ps}/@code{movf.ps}).
+
+The @code{movt} functions return the value @var{x} computed by:
+
+@smallexample
+cabs.@var{cond}.ps @var{cc},@var{a},@var{b}
+mov.ps @var{x},@var{c}
+movt.ps @var{x},@var{d},@var{cc}
+@end smallexample
+
+The @code{movf} functions are similar but use @code{movf.ps} instead
+of @code{movt.ps}.
+
+@item int __builtin_mips_any_c_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
+@itemx int __builtin_mips_all_c_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
+@itemx int __builtin_mips_any_cabs_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
+@itemx int __builtin_mips_all_cabs_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
+Comparison of two paired-single values
+(@code{c.@var{cond}.ps}/@code{cabs.@var{cond}.ps},
+@code{bc1any2t}/@code{bc1any2f}).
+
+These functions compare @var{a} and @var{b} using @code{c.@var{cond}.ps}
+or @code{cabs.@var{cond}.ps}.  The @code{any} forms return true if either
+result is true and the @code{all} forms return true if both results are true.
+For example:
+
+@smallexample
+v2sf a, b;
+if (__builtin_mips_any_c_eq_ps (a, b))
+  one_is_true ();
+else
+  both_are_false ();
+
+if (__builtin_mips_all_c_eq_ps (a, b))
+  both_are_true ();
+else
+  one_is_false ();
+@end smallexample
+
+@item int __builtin_mips_any_c_@var{cond}_4s (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
+@itemx int __builtin_mips_all_c_@var{cond}_4s (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
+@itemx int __builtin_mips_any_cabs_@var{cond}_4s (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
+@itemx int __builtin_mips_all_cabs_@var{cond}_4s (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
+Comparison of four paired-single values
+(@code{c.@var{cond}.ps}/@code{cabs.@var{cond}.ps},
+@code{bc1any4t}/@code{bc1any4f}).
+
+These functions use @code{c.@var{cond}.ps} or @code{cabs.@var{cond}.ps}
+to compare @var{a} with @var{b} and to compare @var{c} with @var{d}.
+The @code{any} forms return true if any of the four results are true
+and the @code{all} forms return true if all four results are true.
+For example:
+
+@smallexample
+v2sf a, b, c, d;
+if (__builtin_mips_any_c_eq_4s (a, b, c, d))
+  some_are_true ();
+else
+  all_are_false ();
+
+if (__builtin_mips_all_c_eq_4s (a, b, c, d))
+  all_are_true ();
+else
+  some_are_false ();
+@end smallexample
+@end table
+
+@node picoChip Built-in Functions
+@subsection picoChip Built-in Functions
+
+GCC provides an interface to selected machine instructions from the
+picoChip instruction set.
+
+@table @code
+@item int __builtin_sbc (int @var{value})
+Sign bit count.  Return the number of consecutive bits in @var{value}
+which have the same value as the sign-bit.  The result is the number of
+leading sign bits minus one, giving the number of redundant sign bits in
+@var{value}.
+
+@item int __builtin_byteswap (int @var{value})
+Byte swap.  Return the result of swapping the upper and lower bytes of
+@var{value}.
+
+@item int __builtin_brev (int @var{value})
+Bit reversal.  Return the result of reversing the bits in
+@var{value}.  Bit 15 is swapped with bit 0, bit 14 is swapped with bit 1,
+and so on.
+
+@item int __builtin_adds (int @var{x}, int @var{y})
+Saturating addition.  Return the result of adding @var{x} and @var{y},
+storing the value 32767 if the result overflows.
+
+@item int __builtin_subs (int @var{x}, int @var{y})
+Saturating subtraction.  Return the result of subtracting @var{y} from
+@var{x}, storing the value @minus{}32768 if the result overflows.
+
+@item void __builtin_halt (void)
+Halt.  The processor will stop execution.  This built-in is useful for
+implementing assertions.
+
+@end table
+
+@node Other MIPS Built-in Functions
+@subsection Other MIPS Built-in Functions
+
+GCC provides other MIPS-specific built-in functions:
+
+@table @code
+@item void __builtin_mips_cache (int @var{op}, const volatile void *@var{addr})
+Insert a @samp{cache} instruction with operands @var{op} and @var{addr}.
+GCC defines the preprocessor macro @code{___GCC_HAVE_BUILTIN_MIPS_CACHE}
+when this function is available.
+@end table
+
+@node PowerPC AltiVec/VSX Built-in Functions
+@subsection PowerPC AltiVec Built-in Functions
+
+GCC provides an interface for the PowerPC family of processors to access
+the AltiVec operations described in Motorola's AltiVec Programming
+Interface Manual.  The interface is made available by including
+@code{<altivec.h>} and using @option{-maltivec} and
+@option{-mabi=altivec}.  The interface supports the following vector
+types.
+
+@smallexample
+vector unsigned char
+vector signed char
+vector bool char
+
+vector unsigned short
+vector signed short
+vector bool short
+vector pixel
+
+vector unsigned int
+vector signed int
+vector bool int
+vector float
+@end smallexample
+
+If @option{-mvsx} is used the following additional vector types are
+implemented.
+
+@smallexample
+vector unsigned long
+vector signed long
+vector double
+@end smallexample
+
+The long types are only implemented for 64-bit code generation, and
+the long type is only used in the floating point/integer conversion
+instructions.
+
+GCC's implementation of the high-level language interface available from
+C and C++ code differs from Motorola's documentation in several ways.
+
+@itemize @bullet
+
+@item
+A vector constant is a list of constant expressions within curly braces.
+
+@item
+A vector initializer requires no cast if the vector constant is of the
+same type as the variable it is initializing.
+
+@item
+If @code{signed} or @code{unsigned} is omitted, the signedness of the
+vector type is the default signedness of the base type.  The default
+varies depending on the operating system, so a portable program should
+always specify the signedness.
+
+@item
+Compiling with @option{-maltivec} adds keywords @code{__vector},
+@code{vector}, @code{__pixel}, @code{pixel}, @code{__bool} and
+@code{bool}.  When compiling ISO C, the context-sensitive substitution
+of the keywords @code{vector}, @code{pixel} and @code{bool} is
+disabled.  To use them, you must include @code{<altivec.h>} instead.
+
+@item
+GCC allows using a @code{typedef} name as the type specifier for a
+vector type.
+
+@item
+For C, overloaded functions are implemented with macros so the following
+does not work:
+
+@smallexample
+  vec_add ((vector signed int)@{1, 2, 3, 4@}, foo);
+@end smallexample
+
+Since @code{vec_add} is a macro, the vector constant in the example
+is treated as four separate arguments.  Wrap the entire argument in
+parentheses for this to work.
+@end itemize
+
+@emph{Note:} Only the @code{<altivec.h>} interface is supported.
+Internally, GCC uses built-in functions to achieve the functionality in
+the aforementioned header file, but they are not supported and are
+subject to change without notice.
+
+The following interfaces are supported for the generic and specific
+AltiVec operations and the AltiVec predicates.  In cases where there
+is a direct mapping between generic and specific operations, only the
+generic names are shown here, although the specific operations can also
+be used.
+
+Arguments that are documented as @code{const int} require literal
+integral values within the range required for that operation.
+
+@smallexample
+vector signed char vec_abs (vector signed char);
+vector signed short vec_abs (vector signed short);
+vector signed int vec_abs (vector signed int);
+vector float vec_abs (vector float);
+
+vector signed char vec_abss (vector signed char);
+vector signed short vec_abss (vector signed short);
+vector signed int vec_abss (vector signed int);
+
+vector signed char vec_add (vector bool char, vector signed char);
+vector signed char vec_add (vector signed char, vector bool char);
+vector signed char vec_add (vector signed char, vector signed char);
+vector unsigned char vec_add (vector bool char, vector unsigned char);
+vector unsigned char vec_add (vector unsigned char, vector bool char);
+vector unsigned char vec_add (vector unsigned char,
+                              vector unsigned char);
+vector signed short vec_add (vector bool short, vector signed short);
+vector signed short vec_add (vector signed short, vector bool short);
+vector signed short vec_add (vector signed short, vector signed short);
+vector unsigned short vec_add (vector bool short,
+                               vector unsigned short);
+vector unsigned short vec_add (vector unsigned short,
+                               vector bool short);
+vector unsigned short vec_add (vector unsigned short,
+                               vector unsigned short);
+vector signed int vec_add (vector bool int, vector signed int);
+vector signed int vec_add (vector signed int, vector bool int);
+vector signed int vec_add (vector signed int, vector signed int);
+vector unsigned int vec_add (vector bool int, vector unsigned int);
+vector unsigned int vec_add (vector unsigned int, vector bool int);
+vector unsigned int vec_add (vector unsigned int, vector unsigned int);
+vector float vec_add (vector float, vector float);
+
+vector float vec_vaddfp (vector float, vector float);
+
+vector signed int vec_vadduwm (vector bool int, vector signed int);
+vector signed int vec_vadduwm (vector signed int, vector bool int);
+vector signed int vec_vadduwm (vector signed int, vector signed int);
+vector unsigned int vec_vadduwm (vector bool int, vector unsigned int);
+vector unsigned int vec_vadduwm (vector unsigned int, vector bool int);
+vector unsigned int vec_vadduwm (vector unsigned int,
+                                 vector unsigned int);
+
+vector signed short vec_vadduhm (vector bool short,
+                                 vector signed short);
+vector signed short vec_vadduhm (vector signed short,
+                                 vector bool short);
+vector signed short vec_vadduhm (vector signed short,
+                                 vector signed short);
+vector unsigned short vec_vadduhm (vector bool short,
+                                   vector unsigned short);
+vector unsigned short vec_vadduhm (vector unsigned short,
+                                   vector bool short);
+vector unsigned short vec_vadduhm (vector unsigned short,
+                                   vector unsigned short);
+
+vector signed char vec_vaddubm (vector bool char, vector signed char);
+vector signed char vec_vaddubm (vector signed char, vector bool char);
+vector signed char vec_vaddubm (vector signed char, vector signed char);
+vector unsigned char vec_vaddubm (vector bool char,
+                                  vector unsigned char);
+vector unsigned char vec_vaddubm (vector unsigned char,
+                                  vector bool char);
+vector unsigned char vec_vaddubm (vector unsigned char,
+                                  vector unsigned char);
+
+vector unsigned int vec_addc (vector unsigned int, vector unsigned int);
+
+vector unsigned char vec_adds (vector bool char, vector unsigned char);
+vector unsigned char vec_adds (vector unsigned char, vector bool char);
+vector unsigned char vec_adds (vector unsigned char,
+                               vector unsigned char);
+vector signed char vec_adds (vector bool char, vector signed char);
+vector signed char vec_adds (vector signed char, vector bool char);
+vector signed char vec_adds (vector signed char, vector signed char);
+vector unsigned short vec_adds (vector bool short,
+                                vector unsigned short);
+vector unsigned short vec_adds (vector unsigned short,
+                                vector bool short);
+vector unsigned short vec_adds (vector unsigned short,
+                                vector unsigned short);
+vector signed short vec_adds (vector bool short, vector signed short);
+vector signed short vec_adds (vector signed short, vector bool short);
+vector signed short vec_adds (vector signed short, vector signed short);
+vector unsigned int vec_adds (vector bool int, vector unsigned int);
+vector unsigned int vec_adds (vector unsigned int, vector bool int);
+vector unsigned int vec_adds (vector unsigned int, vector unsigned int);
+vector signed int vec_adds (vector bool int, vector signed int);
+vector signed int vec_adds (vector signed int, vector bool int);
+vector signed int vec_adds (vector signed int, vector signed int);
+
+vector signed int vec_vaddsws (vector bool int, vector signed int);
+vector signed int vec_vaddsws (vector signed int, vector bool int);
+vector signed int vec_vaddsws (vector signed int, vector signed int);
+
+vector unsigned int vec_vadduws (vector bool int, vector unsigned int);
+vector unsigned int vec_vadduws (vector unsigned int, vector bool int);
+vector unsigned int vec_vadduws (vector unsigned int,
+                                 vector unsigned int);
+
+vector signed short vec_vaddshs (vector bool short,
+                                 vector signed short);
+vector signed short vec_vaddshs (vector signed short,
+                                 vector bool short);
+vector signed short vec_vaddshs (vector signed short,
+                                 vector signed short);
+
+vector unsigned short vec_vadduhs (vector bool short,
+                                   vector unsigned short);
+vector unsigned short vec_vadduhs (vector unsigned short,
+                                   vector bool short);
+vector unsigned short vec_vadduhs (vector unsigned short,
+                                   vector unsigned short);
+
+vector signed char vec_vaddsbs (vector bool char, vector signed char);
+vector signed char vec_vaddsbs (vector signed char, vector bool char);
+vector signed char vec_vaddsbs (vector signed char, vector signed char);
+
+vector unsigned char vec_vaddubs (vector bool char,
+                                  vector unsigned char);
+vector unsigned char vec_vaddubs (vector unsigned char,
+                                  vector bool char);
+vector unsigned char vec_vaddubs (vector unsigned char,
+                                  vector unsigned char);
+
+vector float vec_and (vector float, vector float);
+vector float vec_and (vector float, vector bool int);
+vector float vec_and (vector bool int, vector float);
+vector bool int vec_and (vector bool int, vector bool int);
+vector signed int vec_and (vector bool int, vector signed int);
+vector signed int vec_and (vector signed int, vector bool int);
+vector signed int vec_and (vector signed int, vector signed int);
+vector unsigned int vec_and (vector bool int, vector unsigned int);
+vector unsigned int vec_and (vector unsigned int, vector bool int);
+vector unsigned int vec_and (vector unsigned int, vector unsigned int);
+vector bool short vec_and (vector bool short, vector bool short);
+vector signed short vec_and (vector bool short, vector signed short);
+vector signed short vec_and (vector signed short, vector bool short);
+vector signed short vec_and (vector signed short, vector signed short);
+vector unsigned short vec_and (vector bool short,
+                               vector unsigned short);
+vector unsigned short vec_and (vector unsigned short,
+                               vector bool short);
+vector unsigned short vec_and (vector unsigned short,
+                               vector unsigned short);
+vector signed char vec_and (vector bool char, vector signed char);
+vector bool char vec_and (vector bool char, vector bool char);
+vector signed char vec_and (vector signed char, vector bool char);
+vector signed char vec_and (vector signed char, vector signed char);
+vector unsigned char vec_and (vector bool char, vector unsigned char);
+vector unsigned char vec_and (vector unsigned char, vector bool char);
+vector unsigned char vec_and (vector unsigned char,
+                              vector unsigned char);
+
+vector float vec_andc (vector float, vector float);
+vector float vec_andc (vector float, vector bool int);
+vector float vec_andc (vector bool int, vector float);
+vector bool int vec_andc (vector bool int, vector bool int);
+vector signed int vec_andc (vector bool int, vector signed int);
+vector signed int vec_andc (vector signed int, vector bool int);
+vector signed int vec_andc (vector signed int, vector signed int);
+vector unsigned int vec_andc (vector bool int, vector unsigned int);
+vector unsigned int vec_andc (vector unsigned int, vector bool int);
+vector unsigned int vec_andc (vector unsigned int, vector unsigned int);
+vector bool short vec_andc (vector bool short, vector bool short);
+vector signed short vec_andc (vector bool short, vector signed short);
+vector signed short vec_andc (vector signed short, vector bool short);
+vector signed short vec_andc (vector signed short, vector signed short);
+vector unsigned short vec_andc (vector bool short,
+                                vector unsigned short);
+vector unsigned short vec_andc (vector unsigned short,
+                                vector bool short);
+vector unsigned short vec_andc (vector unsigned short,
+                                vector unsigned short);
+vector signed char vec_andc (vector bool char, vector signed char);
+vector bool char vec_andc (vector bool char, vector bool char);
+vector signed char vec_andc (vector signed char, vector bool char);
+vector signed char vec_andc (vector signed char, vector signed char);
+vector unsigned char vec_andc (vector bool char, vector unsigned char);
+vector unsigned char vec_andc (vector unsigned char, vector bool char);
+vector unsigned char vec_andc (vector unsigned char,
+                               vector unsigned char);
+
+vector unsigned char vec_avg (vector unsigned char,
+                              vector unsigned char);
+vector signed char vec_avg (vector signed char, vector signed char);
+vector unsigned short vec_avg (vector unsigned short,
+                               vector unsigned short);
+vector signed short vec_avg (vector signed short, vector signed short);
+vector unsigned int vec_avg (vector unsigned int, vector unsigned int);
+vector signed int vec_avg (vector signed int, vector signed int);
+
+vector signed int vec_vavgsw (vector signed int, vector signed int);
+
+vector unsigned int vec_vavguw (vector unsigned int,
+                                vector unsigned int);
+
+vector signed short vec_vavgsh (vector signed short,
+                                vector signed short);
+
+vector unsigned short vec_vavguh (vector unsigned short,
+                                  vector unsigned short);
+
+vector signed char vec_vavgsb (vector signed char, vector signed char);
+
+vector unsigned char vec_vavgub (vector unsigned char,
+                                 vector unsigned char);
+
+vector float vec_copysign (vector float);
+
+vector float vec_ceil (vector float);
+
+vector signed int vec_cmpb (vector float, vector float);
+
+vector bool char vec_cmpeq (vector signed char, vector signed char);
+vector bool char vec_cmpeq (vector unsigned char, vector unsigned char);
+vector bool short vec_cmpeq (vector signed short, vector signed short);
+vector bool short vec_cmpeq (vector unsigned short,
+                             vector unsigned short);
+vector bool int vec_cmpeq (vector signed int, vector signed int);
+vector bool int vec_cmpeq (vector unsigned int, vector unsigned int);
+vector bool int vec_cmpeq (vector float, vector float);
+
+vector bool int vec_vcmpeqfp (vector float, vector float);
+
+vector bool int vec_vcmpequw (vector signed int, vector signed int);
+vector bool int vec_vcmpequw (vector unsigned int, vector unsigned int);
+
+vector bool short vec_vcmpequh (vector signed short,
+                                vector signed short);
+vector bool short vec_vcmpequh (vector unsigned short,
+                                vector unsigned short);
+
+vector bool char vec_vcmpequb (vector signed char, vector signed char);
+vector bool char vec_vcmpequb (vector unsigned char,
+                               vector unsigned char);
+
+vector bool int vec_cmpge (vector float, vector float);
+
+vector bool char vec_cmpgt (vector unsigned char, vector unsigned char);
+vector bool char vec_cmpgt (vector signed char, vector signed char);
+vector bool short vec_cmpgt (vector unsigned short,
+                             vector unsigned short);
+vector bool short vec_cmpgt (vector signed short, vector signed short);
+vector bool int vec_cmpgt (vector unsigned int, vector unsigned int);
+vector bool int vec_cmpgt (vector signed int, vector signed int);
+vector bool int vec_cmpgt (vector float, vector float);
+
+vector bool int vec_vcmpgtfp (vector float, vector float);
+
+vector bool int vec_vcmpgtsw (vector signed int, vector signed int);
+
+vector bool int vec_vcmpgtuw (vector unsigned int, vector unsigned int);
+
+vector bool short vec_vcmpgtsh (vector signed short,
+                                vector signed short);
+
+vector bool short vec_vcmpgtuh (vector unsigned short,
+                                vector unsigned short);
+
+vector bool char vec_vcmpgtsb (vector signed char, vector signed char);
+
+vector bool char vec_vcmpgtub (vector unsigned char,
+                               vector unsigned char);
+
+vector bool int vec_cmple (vector float, vector float);
+
+vector bool char vec_cmplt (vector unsigned char, vector unsigned char);
+vector bool char vec_cmplt (vector signed char, vector signed char);
+vector bool short vec_cmplt (vector unsigned short,
+                             vector unsigned short);
+vector bool short vec_cmplt (vector signed short, vector signed short);
+vector bool int vec_cmplt (vector unsigned int, vector unsigned int);
+vector bool int vec_cmplt (vector signed int, vector signed int);
+vector bool int vec_cmplt (vector float, vector float);
+
+vector float vec_ctf (vector unsigned int, const int);
+vector float vec_ctf (vector signed int, const int);
+
+vector float vec_vcfsx (vector signed int, const int);
+
+vector float vec_vcfux (vector unsigned int, const int);
+
+vector signed int vec_cts (vector float, const int);
+
+vector unsigned int vec_ctu (vector float, const int);
+
+void vec_dss (const int);
+
+void vec_dssall (void);
+
+void vec_dst (const vector unsigned char *, int, const int);
+void vec_dst (const vector signed char *, int, const int);
+void vec_dst (const vector bool char *, int, const int);
+void vec_dst (const vector unsigned short *, int, const int);
+void vec_dst (const vector signed short *, int, const int);
+void vec_dst (const vector bool short *, int, const int);
+void vec_dst (const vector pixel *, int, const int);
+void vec_dst (const vector unsigned int *, int, const int);
+void vec_dst (const vector signed int *, int, const int);
+void vec_dst (const vector bool int *, int, const int);
+void vec_dst (const vector float *, int, const int);
+void vec_dst (const unsigned char *, int, const int);
+void vec_dst (const signed char *, int, const int);
+void vec_dst (const unsigned short *, int, const int);
+void vec_dst (const short *, int, const int);
+void vec_dst (const unsigned int *, int, const int);
+void vec_dst (const int *, int, const int);
+void vec_dst (const unsigned long *, int, const int);
+void vec_dst (const long *, int, const int);
+void vec_dst (const float *, int, const int);
+
+void vec_dstst (const vector unsigned char *, int, const int);
+void vec_dstst (const vector signed char *, int, const int);
+void vec_dstst (const vector bool char *, int, const int);
+void vec_dstst (const vector unsigned short *, int, const int);
+void vec_dstst (const vector signed short *, int, const int);
+void vec_dstst (const vector bool short *, int, const int);
+void vec_dstst (const vector pixel *, int, const int);
+void vec_dstst (const vector unsigned int *, int, const int);
+void vec_dstst (const vector signed int *, int, const int);
+void vec_dstst (const vector bool int *, int, const int);
+void vec_dstst (const vector float *, int, const int);
+void vec_dstst (const unsigned char *, int, const int);
+void vec_dstst (const signed char *, int, const int);
+void vec_dstst (const unsigned short *, int, const int);
+void vec_dstst (const short *, int, const int);
+void vec_dstst (const unsigned int *, int, const int);
+void vec_dstst (const int *, int, const int);
+void vec_dstst (const unsigned long *, int, const int);
+void vec_dstst (const long *, int, const int);
+void vec_dstst (const float *, int, const int);
+
+void vec_dststt (const vector unsigned char *, int, const int);
+void vec_dststt (const vector signed char *, int, const int);
+void vec_dststt (const vector bool char *, int, const int);
+void vec_dststt (const vector unsigned short *, int, const int);
+void vec_dststt (const vector signed short *, int, const int);
+void vec_dststt (const vector bool short *, int, const int);
+void vec_dststt (const vector pixel *, int, const int);
+void vec_dststt (const vector unsigned int *, int, const int);
+void vec_dststt (const vector signed int *, int, const int);
+void vec_dststt (const vector bool int *, int, const int);
+void vec_dststt (const vector float *, int, const int);
+void vec_dststt (const unsigned char *, int, const int);
+void vec_dststt (const signed char *, int, const int);
+void vec_dststt (const unsigned short *, int, const int);
+void vec_dststt (const short *, int, const int);
+void vec_dststt (const unsigned int *, int, const int);
+void vec_dststt (const int *, int, const int);
+void vec_dststt (const unsigned long *, int, const int);
+void vec_dststt (const long *, int, const int);
+void vec_dststt (const float *, int, const int);
+
+void vec_dstt (const vector unsigned char *, int, const int);
+void vec_dstt (const vector signed char *, int, const int);
+void vec_dstt (const vector bool char *, int, const int);
+void vec_dstt (const vector unsigned short *, int, const int);
+void vec_dstt (const vector signed short *, int, const int);
+void vec_dstt (const vector bool short *, int, const int);
+void vec_dstt (const vector pixel *, int, const int);
+void vec_dstt (const vector unsigned int *, int, const int);
+void vec_dstt (const vector signed int *, int, const int);
+void vec_dstt (const vector bool int *, int, const int);
+void vec_dstt (const vector float *, int, const int);
+void vec_dstt (const unsigned char *, int, const int);
+void vec_dstt (const signed char *, int, const int);
+void vec_dstt (const unsigned short *, int, const int);
+void vec_dstt (const short *, int, const int);
+void vec_dstt (const unsigned int *, int, const int);
+void vec_dstt (const int *, int, const int);
+void vec_dstt (const unsigned long *, int, const int);
+void vec_dstt (const long *, int, const int);
+void vec_dstt (const float *, int, const int);
+
+vector float vec_expte (vector float);
+
+vector float vec_floor (vector float);
+
+vector float vec_ld (int, const vector float *);
+vector float vec_ld (int, const float *);
+vector bool int vec_ld (int, const vector bool int *);
+vector signed int vec_ld (int, const vector signed int *);
+vector signed int vec_ld (int, const int *);
+vector signed int vec_ld (int, const long *);
+vector unsigned int vec_ld (int, const vector unsigned int *);
+vector unsigned int vec_ld (int, const unsigned int *);
+vector unsigned int vec_ld (int, const unsigned long *);
+vector bool short vec_ld (int, const vector bool short *);
+vector pixel vec_ld (int, const vector pixel *);
+vector signed short vec_ld (int, const vector signed short *);
+vector signed short vec_ld (int, const short *);
+vector unsigned short vec_ld (int, const vector unsigned short *);
+vector unsigned short vec_ld (int, const unsigned short *);
+vector bool char vec_ld (int, const vector bool char *);
+vector signed char vec_ld (int, const vector signed char *);
+vector signed char vec_ld (int, const signed char *);
+vector unsigned char vec_ld (int, const vector unsigned char *);
+vector unsigned char vec_ld (int, const unsigned char *);
+
+vector signed char vec_lde (int, const signed char *);
+vector unsigned char vec_lde (int, const unsigned char *);
+vector signed short vec_lde (int, const short *);
+vector unsigned short vec_lde (int, const unsigned short *);
+vector float vec_lde (int, const float *);
+vector signed int vec_lde (int, const int *);
+vector unsigned int vec_lde (int, const unsigned int *);
+vector signed int vec_lde (int, const long *);
+vector unsigned int vec_lde (int, const unsigned long *);
+
+vector float vec_lvewx (int, float *);
+vector signed int vec_lvewx (int, int *);
+vector unsigned int vec_lvewx (int, unsigned int *);
+vector signed int vec_lvewx (int, long *);
+vector unsigned int vec_lvewx (int, unsigned long *);
+
+vector signed short vec_lvehx (int, short *);
+vector unsigned short vec_lvehx (int, unsigned short *);
+
+vector signed char vec_lvebx (int, char *);
+vector unsigned char vec_lvebx (int, unsigned char *);
+
+vector float vec_ldl (int, const vector float *);
+vector float vec_ldl (int, const float *);
+vector bool int vec_ldl (int, const vector bool int *);
+vector signed int vec_ldl (int, const vector signed int *);
+vector signed int vec_ldl (int, const int *);
+vector signed int vec_ldl (int, const long *);
+vector unsigned int vec_ldl (int, const vector unsigned int *);
+vector unsigned int vec_ldl (int, const unsigned int *);
+vector unsigned int vec_ldl (int, const unsigned long *);
+vector bool short vec_ldl (int, const vector bool short *);
+vector pixel vec_ldl (int, const vector pixel *);
+vector signed short vec_ldl (int, const vector signed short *);
+vector signed short vec_ldl (int, const short *);
+vector unsigned short vec_ldl (int, const vector unsigned short *);
+vector unsigned short vec_ldl (int, const unsigned short *);
+vector bool char vec_ldl (int, const vector bool char *);
+vector signed char vec_ldl (int, const vector signed char *);
+vector signed char vec_ldl (int, const signed char *);
+vector unsigned char vec_ldl (int, const vector unsigned char *);
+vector unsigned char vec_ldl (int, const unsigned char *);
+
+vector float vec_loge (vector float);
+
+vector unsigned char vec_lvsl (int, const volatile unsigned char *);
+vector unsigned char vec_lvsl (int, const volatile signed char *);
+vector unsigned char vec_lvsl (int, const volatile unsigned short *);
+vector unsigned char vec_lvsl (int, const volatile short *);
+vector unsigned char vec_lvsl (int, const volatile unsigned int *);
+vector unsigned char vec_lvsl (int, const volatile int *);
+vector unsigned char vec_lvsl (int, const volatile unsigned long *);
+vector unsigned char vec_lvsl (int, const volatile long *);
+vector unsigned char vec_lvsl (int, const volatile float *);
+
+vector unsigned char vec_lvsr (int, const volatile unsigned char *);
+vector unsigned char vec_lvsr (int, const volatile signed char *);
+vector unsigned char vec_lvsr (int, const volatile unsigned short *);
+vector unsigned char vec_lvsr (int, const volatile short *);
+vector unsigned char vec_lvsr (int, const volatile unsigned int *);
+vector unsigned char vec_lvsr (int, const volatile int *);
+vector unsigned char vec_lvsr (int, const volatile unsigned long *);
+vector unsigned char vec_lvsr (int, const volatile long *);
+vector unsigned char vec_lvsr (int, const volatile float *);
+
+vector float vec_madd (vector float, vector float, vector float);
+
+vector signed short vec_madds (vector signed short,
+                               vector signed short,
+                               vector signed short);
+
+vector unsigned char vec_max (vector bool char, vector unsigned char);
+vector unsigned char vec_max (vector unsigned char, vector bool char);
+vector unsigned char vec_max (vector unsigned char,
+                              vector unsigned char);
+vector signed char vec_max (vector bool char, vector signed char);
+vector signed char vec_max (vector signed char, vector bool char);
+vector signed char vec_max (vector signed char, vector signed char);
+vector unsigned short vec_max (vector bool short,
+                               vector unsigned short);
+vector unsigned short vec_max (vector unsigned short,
+                               vector bool short);
+vector unsigned short vec_max (vector unsigned short,
+                               vector unsigned short);
+vector signed short vec_max (vector bool short, vector signed short);
+vector signed short vec_max (vector signed short, vector bool short);
+vector signed short vec_max (vector signed short, vector signed short);
+vector unsigned int vec_max (vector bool int, vector unsigned int);
+vector unsigned int vec_max (vector unsigned int, vector bool int);
+vector unsigned int vec_max (vector unsigned int, vector unsigned int);
+vector signed int vec_max (vector bool int, vector signed int);
+vector signed int vec_max (vector signed int, vector bool int);
+vector signed int vec_max (vector signed int, vector signed int);
+vector float vec_max (vector float, vector float);
+
+vector float vec_vmaxfp (vector float, vector float);
+
+vector signed int vec_vmaxsw (vector bool int, vector signed int);
+vector signed int vec_vmaxsw (vector signed int, vector bool int);
+vector signed int vec_vmaxsw (vector signed int, vector signed int);
+
+vector unsigned int vec_vmaxuw (vector bool int, vector unsigned int);
+vector unsigned int vec_vmaxuw (vector unsigned int, vector bool int);
+vector unsigned int vec_vmaxuw (vector unsigned int,
+                                vector unsigned int);
+
+vector signed short vec_vmaxsh (vector bool short, vector signed short);
+vector signed short vec_vmaxsh (vector signed short, vector bool short);
+vector signed short vec_vmaxsh (vector signed short,
+                                vector signed short);
+
+vector unsigned short vec_vmaxuh (vector bool short,
+                                  vector unsigned short);
+vector unsigned short vec_vmaxuh (vector unsigned short,
+                                  vector bool short);
+vector unsigned short vec_vmaxuh (vector unsigned short,
+                                  vector unsigned short);
+
+vector signed char vec_vmaxsb (vector bool char, vector signed char);
+vector signed char vec_vmaxsb (vector signed char, vector bool char);
+vector signed char vec_vmaxsb (vector signed char, vector signed char);
+
+vector unsigned char vec_vmaxub (vector bool char,
+                                 vector unsigned char);
+vector unsigned char vec_vmaxub (vector unsigned char,
+                                 vector bool char);
+vector unsigned char vec_vmaxub (vector unsigned char,
+                                 vector unsigned char);
+
+vector bool char vec_mergeh (vector bool char, vector bool char);
+vector signed char vec_mergeh (vector signed char, vector signed char);
+vector unsigned char vec_mergeh (vector unsigned char,
+                                 vector unsigned char);
+vector bool short vec_mergeh (vector bool short, vector bool short);
+vector pixel vec_mergeh (vector pixel, vector pixel);
+vector signed short vec_mergeh (vector signed short,
+                                vector signed short);
+vector unsigned short vec_mergeh (vector unsigned short,
+                                  vector unsigned short);
+vector float vec_mergeh (vector float, vector float);
+vector bool int vec_mergeh (vector bool int, vector bool int);
+vector signed int vec_mergeh (vector signed int, vector signed int);
+vector unsigned int vec_mergeh (vector unsigned int,
+                                vector unsigned int);
+
+vector float vec_vmrghw (vector float, vector float);
+vector bool int vec_vmrghw (vector bool int, vector bool int);
+vector signed int vec_vmrghw (vector signed int, vector signed int);
+vector unsigned int vec_vmrghw (vector unsigned int,
+                                vector unsigned int);
+
+vector bool short vec_vmrghh (vector bool short, vector bool short);
+vector signed short vec_vmrghh (vector signed short,
+                                vector signed short);
+vector unsigned short vec_vmrghh (vector unsigned short,
+                                  vector unsigned short);
+vector pixel vec_vmrghh (vector pixel, vector pixel);
+
+vector bool char vec_vmrghb (vector bool char, vector bool char);
+vector signed char vec_vmrghb (vector signed char, vector signed char);
+vector unsigned char vec_vmrghb (vector unsigned char,
+                                 vector unsigned char);
+
+vector bool char vec_mergel (vector bool char, vector bool char);
+vector signed char vec_mergel (vector signed char, vector signed char);
+vector unsigned char vec_mergel (vector unsigned char,
+                                 vector unsigned char);
+vector bool short vec_mergel (vector bool short, vector bool short);
+vector pixel vec_mergel (vector pixel, vector pixel);
+vector signed short vec_mergel (vector signed short,
+                                vector signed short);
+vector unsigned short vec_mergel (vector unsigned short,
+                                  vector unsigned short);
+vector float vec_mergel (vector float, vector float);
+vector bool int vec_mergel (vector bool int, vector bool int);
+vector signed int vec_mergel (vector signed int, vector signed int);
+vector unsigned int vec_mergel (vector unsigned int,
+                                vector unsigned int);
+
+vector float vec_vmrglw (vector float, vector float);
+vector signed int vec_vmrglw (vector signed int, vector signed int);
+vector unsigned int vec_vmrglw (vector unsigned int,
+                                vector unsigned int);
+vector bool int vec_vmrglw (vector bool int, vector bool int);
+
+vector bool short vec_vmrglh (vector bool short, vector bool short);
+vector signed short vec_vmrglh (vector signed short,
+                                vector signed short);
+vector unsigned short vec_vmrglh (vector unsigned short,
+                                  vector unsigned short);
+vector pixel vec_vmrglh (vector pixel, vector pixel);
+
+vector bool char vec_vmrglb (vector bool char, vector bool char);
+vector signed char vec_vmrglb (vector signed char, vector signed char);
+vector unsigned char vec_vmrglb (vector unsigned char,
+                                 vector unsigned char);
+
+vector unsigned short vec_mfvscr (void);
+
+vector unsigned char vec_min (vector bool char, vector unsigned char);
+vector unsigned char vec_min (vector unsigned char, vector bool char);
+vector unsigned char vec_min (vector unsigned char,
+                              vector unsigned char);
+vector signed char vec_min (vector bool char, vector signed char);
+vector signed char vec_min (vector signed char, vector bool char);
+vector signed char vec_min (vector signed char, vector signed char);
+vector unsigned short vec_min (vector bool short,
+                               vector unsigned short);
+vector unsigned short vec_min (vector unsigned short,
+                               vector bool short);
+vector unsigned short vec_min (vector unsigned short,
+                               vector unsigned short);
+vector signed short vec_min (vector bool short, vector signed short);
+vector signed short vec_min (vector signed short, vector bool short);
+vector signed short vec_min (vector signed short, vector signed short);
+vector unsigned int vec_min (vector bool int, vector unsigned int);
+vector unsigned int vec_min (vector unsigned int, vector bool int);
+vector unsigned int vec_min (vector unsigned int, vector unsigned int);
+vector signed int vec_min (vector bool int, vector signed int);
+vector signed int vec_min (vector signed int, vector bool int);
+vector signed int vec_min (vector signed int, vector signed int);
+vector float vec_min (vector float, vector float);
+
+vector float vec_vminfp (vector float, vector float);
+
+vector signed int vec_vminsw (vector bool int, vector signed int);
+vector signed int vec_vminsw (vector signed int, vector bool int);
+vector signed int vec_vminsw (vector signed int, vector signed int);
+
+vector unsigned int vec_vminuw (vector bool int, vector unsigned int);
+vector unsigned int vec_vminuw (vector unsigned int, vector bool int);
+vector unsigned int vec_vminuw (vector unsigned int,
+                                vector unsigned int);
+
+vector signed short vec_vminsh (vector bool short, vector signed short);
+vector signed short vec_vminsh (vector signed short, vector bool short);
+vector signed short vec_vminsh (vector signed short,
+                                vector signed short);
+
+vector unsigned short vec_vminuh (vector bool short,
+                                  vector unsigned short);
+vector unsigned short vec_vminuh (vector unsigned short,
+                                  vector bool short);
+vector unsigned short vec_vminuh (vector unsigned short,
+                                  vector unsigned short);
+
+vector signed char vec_vminsb (vector bool char, vector signed char);
+vector signed char vec_vminsb (vector signed char, vector bool char);
+vector signed char vec_vminsb (vector signed char, vector signed char);
+
+vector unsigned char vec_vminub (vector bool char,
+                                 vector unsigned char);
+vector unsigned char vec_vminub (vector unsigned char,
+                                 vector bool char);
+vector unsigned char vec_vminub (vector unsigned char,
+                                 vector unsigned char);
+
+vector signed short vec_mladd (vector signed short,
+                               vector signed short,
+                               vector signed short);
+vector signed short vec_mladd (vector signed short,
+                               vector unsigned short,
+                               vector unsigned short);
+vector signed short vec_mladd (vector unsigned short,
+                               vector signed short,
+                               vector signed short);
+vector unsigned short vec_mladd (vector unsigned short,
+                                 vector unsigned short,
+                                 vector unsigned short);
+
+vector signed short vec_mradds (vector signed short,
+                                vector signed short,
+                                vector signed short);
+
+vector unsigned int vec_msum (vector unsigned char,
+                              vector unsigned char,
+                              vector unsigned int);
+vector signed int vec_msum (vector signed char,
+                            vector unsigned char,
+                            vector signed int);
+vector unsigned int vec_msum (vector unsigned short,
+                              vector unsigned short,
+                              vector unsigned int);
+vector signed int vec_msum (vector signed short,
+                            vector signed short,
+                            vector signed int);
+
+vector signed int vec_vmsumshm (vector signed short,
+                                vector signed short,
+                                vector signed int);
+
+vector unsigned int vec_vmsumuhm (vector unsigned short,
+                                  vector unsigned short,
+                                  vector unsigned int);
+
+vector signed int vec_vmsummbm (vector signed char,
+                                vector unsigned char,
+                                vector signed int);
+
+vector unsigned int vec_vmsumubm (vector unsigned char,
+                                  vector unsigned char,
+                                  vector unsigned int);
+
+vector unsigned int vec_msums (vector unsigned short,
+                               vector unsigned short,
+                               vector unsigned int);
+vector signed int vec_msums (vector signed short,
+                             vector signed short,
+                             vector signed int);
+
+vector signed int vec_vmsumshs (vector signed short,
+                                vector signed short,
+                                vector signed int);
+
+vector unsigned int vec_vmsumuhs (vector unsigned short,
+                                  vector unsigned short,
+                                  vector unsigned int);
+
+void vec_mtvscr (vector signed int);
+void vec_mtvscr (vector unsigned int);
+void vec_mtvscr (vector bool int);
+void vec_mtvscr (vector signed short);
+void vec_mtvscr (vector unsigned short);
+void vec_mtvscr (vector bool short);
+void vec_mtvscr (vector pixel);
+void vec_mtvscr (vector signed char);
+void vec_mtvscr (vector unsigned char);
+void vec_mtvscr (vector bool char);
+
+vector unsigned short vec_mule (vector unsigned char,
+                                vector unsigned char);
+vector signed short vec_mule (vector signed char,
+                              vector signed char);
+vector unsigned int vec_mule (vector unsigned short,
+                              vector unsigned short);
+vector signed int vec_mule (vector signed short, vector signed short);
+
+vector signed int vec_vmulesh (vector signed short,
+                               vector signed short);
+
+vector unsigned int vec_vmuleuh (vector unsigned short,
+                                 vector unsigned short);
+
+vector signed short vec_vmulesb (vector signed char,
+                                 vector signed char);
+
+vector unsigned short vec_vmuleub (vector unsigned char,
+                                  vector unsigned char);
+
+vector unsigned short vec_mulo (vector unsigned char,
+                                vector unsigned char);
+vector signed short vec_mulo (vector signed char, vector signed char);
+vector unsigned int vec_mulo (vector unsigned short,
+                              vector unsigned short);
+vector signed int vec_mulo (vector signed short, vector signed short);
+
+vector signed int vec_vmulosh (vector signed short,
+                               vector signed short);
+
+vector unsigned int vec_vmulouh (vector unsigned short,
+                                 vector unsigned short);
+
+vector signed short vec_vmulosb (vector signed char,
+                                 vector signed char);
+
+vector unsigned short vec_vmuloub (vector unsigned char,
+                                   vector unsigned char);
+
+vector float vec_nmsub (vector float, vector float, vector float);
+
+vector float vec_nor (vector float, vector float);
+vector signed int vec_nor (vector signed int, vector signed int);
+vector unsigned int vec_nor (vector unsigned int, vector unsigned int);
+vector bool int vec_nor (vector bool int, vector bool int);
+vector signed short vec_nor (vector signed short, vector signed short);
+vector unsigned short vec_nor (vector unsigned short,
+                               vector unsigned short);
+vector bool short vec_nor (vector bool short, vector bool short);
+vector signed char vec_nor (vector signed char, vector signed char);
+vector unsigned char vec_nor (vector unsigned char,
+                              vector unsigned char);
+vector bool char vec_nor (vector bool char, vector bool char);
+
+vector float vec_or (vector float, vector float);
+vector float vec_or (vector float, vector bool int);
+vector float vec_or (vector bool int, vector float);
+vector bool int vec_or (vector bool int, vector bool int);
+vector signed int vec_or (vector bool int, vector signed int);
+vector signed int vec_or (vector signed int, vector bool int);
+vector signed int vec_or (vector signed int, vector signed int);
+vector unsigned int vec_or (vector bool int, vector unsigned int);
+vector unsigned int vec_or (vector unsigned int, vector bool int);
+vector unsigned int vec_or (vector unsigned int, vector unsigned int);
+vector bool short vec_or (vector bool short, vector bool short);
+vector signed short vec_or (vector bool short, vector signed short);
+vector signed short vec_or (vector signed short, vector bool short);
+vector signed short vec_or (vector signed short, vector signed short);
+vector unsigned short vec_or (vector bool short, vector unsigned short);
+vector unsigned short vec_or (vector unsigned short, vector bool short);
+vector unsigned short vec_or (vector unsigned short,
+                              vector unsigned short);
+vector signed char vec_or (vector bool char, vector signed char);
+vector bool char vec_or (vector bool char, vector bool char);
+vector signed char vec_or (vector signed char, vector bool char);
+vector signed char vec_or (vector signed char, vector signed char);
+vector unsigned char vec_or (vector bool char, vector unsigned char);
+vector unsigned char vec_or (vector unsigned char, vector bool char);
+vector unsigned char vec_or (vector unsigned char,
+                             vector unsigned char);
+
+vector signed char vec_pack (vector signed short, vector signed short);
+vector unsigned char vec_pack (vector unsigned short,
+                               vector unsigned short);
+vector bool char vec_pack (vector bool short, vector bool short);
+vector signed short vec_pack (vector signed int, vector signed int);
+vector unsigned short vec_pack (vector unsigned int,
+                                vector unsigned int);
+vector bool short vec_pack (vector bool int, vector bool int);
+
+vector bool short vec_vpkuwum (vector bool int, vector bool int);
+vector signed short vec_vpkuwum (vector signed int, vector signed int);
+vector unsigned short vec_vpkuwum (vector unsigned int,
+                                   vector unsigned int);
+
+vector bool char vec_vpkuhum (vector bool short, vector bool short);
+vector signed char vec_vpkuhum (vector signed short,
+                                vector signed short);
+vector unsigned char vec_vpkuhum (vector unsigned short,
+                                  vector unsigned short);
+
+vector pixel vec_packpx (vector unsigned int, vector unsigned int);
+
+vector unsigned char vec_packs (vector unsigned short,
+                                vector unsigned short);
+vector signed char vec_packs (vector signed short, vector signed short);
+vector unsigned short vec_packs (vector unsigned int,
+                                 vector unsigned int);
+vector signed short vec_packs (vector signed int, vector signed int);
+
+vector signed short vec_vpkswss (vector signed int, vector signed int);
+
+vector unsigned short vec_vpkuwus (vector unsigned int,
+                                   vector unsigned int);
+
+vector signed char vec_vpkshss (vector signed short,
+                                vector signed short);
+
+vector unsigned char vec_vpkuhus (vector unsigned short,
+                                  vector unsigned short);
+
+vector unsigned char vec_packsu (vector unsigned short,
+                                 vector unsigned short);
+vector unsigned char vec_packsu (vector signed short,
+                                 vector signed short);
+vector unsigned short vec_packsu (vector unsigned int,
+                                  vector unsigned int);
+vector unsigned short vec_packsu (vector signed int, vector signed int);
+
+vector unsigned short vec_vpkswus (vector signed int,
+                                   vector signed int);
+
+vector unsigned char vec_vpkshus (vector signed short,
+                                  vector signed short);
+
+vector float vec_perm (vector float,
+                       vector float,
+                       vector unsigned char);
+vector signed int vec_perm (vector signed int,
+                            vector signed int,
+                            vector unsigned char);
+vector unsigned int vec_perm (vector unsigned int,
+                              vector unsigned int,
+                              vector unsigned char);
+vector bool int vec_perm (vector bool int,
+                          vector bool int,
+                          vector unsigned char);
+vector signed short vec_perm (vector signed short,
+                              vector signed short,
+                              vector unsigned char);
+vector unsigned short vec_perm (vector unsigned short,
+                                vector unsigned short,
+                                vector unsigned char);
+vector bool short vec_perm (vector bool short,
+                            vector bool short,
+                            vector unsigned char);
+vector pixel vec_perm (vector pixel,
+                       vector pixel,
+                       vector unsigned char);
+vector signed char vec_perm (vector signed char,
+                             vector signed char,
+                             vector unsigned char);
+vector unsigned char vec_perm (vector unsigned char,
+                               vector unsigned char,
+                               vector unsigned char);
+vector bool char vec_perm (vector bool char,
+                           vector bool char,
+                           vector unsigned char);
+
+vector float vec_re (vector float);
+
+vector signed char vec_rl (vector signed char,
+                           vector unsigned char);
+vector unsigned char vec_rl (vector unsigned char,
+                             vector unsigned char);
+vector signed short vec_rl (vector signed short, vector unsigned short);
+vector unsigned short vec_rl (vector unsigned short,
+                              vector unsigned short);
+vector signed int vec_rl (vector signed int, vector unsigned int);
+vector unsigned int vec_rl (vector unsigned int, vector unsigned int);
+
+vector signed int vec_vrlw (vector signed int, vector unsigned int);
+vector unsigned int vec_vrlw (vector unsigned int, vector unsigned int);
+
+vector signed short vec_vrlh (vector signed short,
+                              vector unsigned short);
+vector unsigned short vec_vrlh (vector unsigned short,
+                                vector unsigned short);
+
+vector signed char vec_vrlb (vector signed char, vector unsigned char);
+vector unsigned char vec_vrlb (vector unsigned char,
+                               vector unsigned char);
+
+vector float vec_round (vector float);
+
+vector float vec_recip (vector float, vector float);
+
+vector float vec_rsqrt (vector float);
+
+vector float vec_rsqrte (vector float);
+
+vector float vec_sel (vector float, vector float, vector bool int);
+vector float vec_sel (vector float, vector float, vector unsigned int);
+vector signed int vec_sel (vector signed int,
+                           vector signed int,
+                           vector bool int);
+vector signed int vec_sel (vector signed int,
+                           vector signed int,
+                           vector unsigned int);
+vector unsigned int vec_sel (vector unsigned int,
+                             vector unsigned int,
+                             vector bool int);
+vector unsigned int vec_sel (vector unsigned int,
+                             vector unsigned int,
+                             vector unsigned int);
+vector bool int vec_sel (vector bool int,
+                         vector bool int,
+                         vector bool int);
+vector bool int vec_sel (vector bool int,
+                         vector bool int,
+                         vector unsigned int);
+vector signed short vec_sel (vector signed short,
+                             vector signed short,
+                             vector bool short);
+vector signed short vec_sel (vector signed short,
+                             vector signed short,
+                             vector unsigned short);
+vector unsigned short vec_sel (vector unsigned short,
+                               vector unsigned short,
+                               vector bool short);
+vector unsigned short vec_sel (vector unsigned short,
+                               vector unsigned short,
+                               vector unsigned short);
+vector bool short vec_sel (vector bool short,
+                           vector bool short,
+                           vector bool short);
+vector bool short vec_sel (vector bool short,
+                           vector bool short,
+                           vector unsigned short);
+vector signed char vec_sel (vector signed char,
+                            vector signed char,
+                            vector bool char);
+vector signed char vec_sel (vector signed char,
+                            vector signed char,
+                            vector unsigned char);
+vector unsigned char vec_sel (vector unsigned char,
+                              vector unsigned char,
+                              vector bool char);
+vector unsigned char vec_sel (vector unsigned char,
+                              vector unsigned char,
+                              vector unsigned char);
+vector bool char vec_sel (vector bool char,
+                          vector bool char,
+                          vector bool char);
+vector bool char vec_sel (vector bool char,
+                          vector bool char,
+                          vector unsigned char);
+
+vector signed char vec_sl (vector signed char,
+                           vector unsigned char);
+vector unsigned char vec_sl (vector unsigned char,
+                             vector unsigned char);
+vector signed short vec_sl (vector signed short, vector unsigned short);
+vector unsigned short vec_sl (vector unsigned short,
+                              vector unsigned short);
+vector signed int vec_sl (vector signed int, vector unsigned int);
+vector unsigned int vec_sl (vector unsigned int, vector unsigned int);
+
+vector signed int vec_vslw (vector signed int, vector unsigned int);
+vector unsigned int vec_vslw (vector unsigned int, vector unsigned int);
+
+vector signed short vec_vslh (vector signed short,
+                              vector unsigned short);
+vector unsigned short vec_vslh (vector unsigned short,
+                                vector unsigned short);
+
+vector signed char vec_vslb (vector signed char, vector unsigned char);
+vector unsigned char vec_vslb (vector unsigned char,
+                               vector unsigned char);
+
+vector float vec_sld (vector float, vector float, const int);
+vector signed int vec_sld (vector signed int,
+                           vector signed int,
+                           const int);
+vector unsigned int vec_sld (vector unsigned int,
+                             vector unsigned int,
+                             const int);
+vector bool int vec_sld (vector bool int,
+                         vector bool int,
+                         const int);
+vector signed short vec_sld (vector signed short,
+                             vector signed short,
+                             const int);
+vector unsigned short vec_sld (vector unsigned short,
+                               vector unsigned short,
+                               const int);
+vector bool short vec_sld (vector bool short,
+                           vector bool short,
+                           const int);
+vector pixel vec_sld (vector pixel,
+                      vector pixel,
+                      const int);
+vector signed char vec_sld (vector signed char,
+                            vector signed char,
+                            const int);
+vector unsigned char vec_sld (vector unsigned char,
+                              vector unsigned char,
+                              const int);
+vector bool char vec_sld (vector bool char,
+                          vector bool char,
+                          const int);
+
+vector signed int vec_sll (vector signed int,
+                           vector unsigned int);
+vector signed int vec_sll (vector signed int,
+                           vector unsigned short);
+vector signed int vec_sll (vector signed int,
+                           vector unsigned char);
+vector unsigned int vec_sll (vector unsigned int,
+                             vector unsigned int);
+vector unsigned int vec_sll (vector unsigned int,
+                             vector unsigned short);
+vector unsigned int vec_sll (vector unsigned int,
+                             vector unsigned char);
+vector bool int vec_sll (vector bool int,
+                         vector unsigned int);
+vector bool int vec_sll (vector bool int,
+                         vector unsigned short);
+vector bool int vec_sll (vector bool int,
+                         vector unsigned char);
+vector signed short vec_sll (vector signed short,
+                             vector unsigned int);
+vector signed short vec_sll (vector signed short,
+                             vector unsigned short);
+vector signed short vec_sll (vector signed short,
+                             vector unsigned char);
+vector unsigned short vec_sll (vector unsigned short,
+                               vector unsigned int);
+vector unsigned short vec_sll (vector unsigned short,
+                               vector unsigned short);
+vector unsigned short vec_sll (vector unsigned short,
+                               vector unsigned char);
+vector bool short vec_sll (vector bool short, vector unsigned int);
+vector bool short vec_sll (vector bool short, vector unsigned short);
+vector bool short vec_sll (vector bool short, vector unsigned char);
+vector pixel vec_sll (vector pixel, vector unsigned int);
+vector pixel vec_sll (vector pixel, vector unsigned short);
+vector pixel vec_sll (vector pixel, vector unsigned char);
+vector signed char vec_sll (vector signed char, vector unsigned int);
+vector signed char vec_sll (vector signed char, vector unsigned short);
+vector signed char vec_sll (vector signed char, vector unsigned char);
+vector unsigned char vec_sll (vector unsigned char,
+                              vector unsigned int);
+vector unsigned char vec_sll (vector unsigned char,
+                              vector unsigned short);
+vector unsigned char vec_sll (vector unsigned char,
+                              vector unsigned char);
+vector bool char vec_sll (vector bool char, vector unsigned int);
+vector bool char vec_sll (vector bool char, vector unsigned short);
+vector bool char vec_sll (vector bool char, vector unsigned char);
+
+vector float vec_slo (vector float, vector signed char);
+vector float vec_slo (vector float, vector unsigned char);
+vector signed int vec_slo (vector signed int, vector signed char);
+vector signed int vec_slo (vector signed int, vector unsigned char);
+vector unsigned int vec_slo (vector unsigned int, vector signed char);
+vector unsigned int vec_slo (vector unsigned int, vector unsigned char);
+vector signed short vec_slo (vector signed short, vector signed char);
+vector signed short vec_slo (vector signed short, vector unsigned char);
+vector unsigned short vec_slo (vector unsigned short,
+                               vector signed char);
+vector unsigned short vec_slo (vector unsigned short,
+                               vector unsigned char);
+vector pixel vec_slo (vector pixel, vector signed char);
+vector pixel vec_slo (vector pixel, vector unsigned char);
+vector signed char vec_slo (vector signed char, vector signed char);
+vector signed char vec_slo (vector signed char, vector unsigned char);
+vector unsigned char vec_slo (vector unsigned char, vector signed char);
+vector unsigned char vec_slo (vector unsigned char,
+                              vector unsigned char);
+
+vector signed char vec_splat (vector signed char, const int);
+vector unsigned char vec_splat (vector unsigned char, const int);
+vector bool char vec_splat (vector bool char, const int);
+vector signed short vec_splat (vector signed short, const int);
+vector unsigned short vec_splat (vector unsigned short, const int);
+vector bool short vec_splat (vector bool short, const int);
+vector pixel vec_splat (vector pixel, const int);
+vector float vec_splat (vector float, const int);
+vector signed int vec_splat (vector signed int, const int);
+vector unsigned int vec_splat (vector unsigned int, const int);
+vector bool int vec_splat (vector bool int, const int);
+
+vector float vec_vspltw (vector float, const int);
+vector signed int vec_vspltw (vector signed int, const int);
+vector unsigned int vec_vspltw (vector unsigned int, const int);
+vector bool int vec_vspltw (vector bool int, const int);
+
+vector bool short vec_vsplth (vector bool short, const int);
+vector signed short vec_vsplth (vector signed short, const int);
+vector unsigned short vec_vsplth (vector unsigned short, const int);
+vector pixel vec_vsplth (vector pixel, const int);
+
+vector signed char vec_vspltb (vector signed char, const int);
+vector unsigned char vec_vspltb (vector unsigned char, const int);
+vector bool char vec_vspltb (vector bool char, const int);
+
+vector signed char vec_splat_s8 (const int);
+
+vector signed short vec_splat_s16 (const int);
+
+vector signed int vec_splat_s32 (const int);
+
+vector unsigned char vec_splat_u8 (const int);
+
+vector unsigned short vec_splat_u16 (const int);
+
+vector unsigned int vec_splat_u32 (const int);
+
+vector signed char vec_sr (vector signed char, vector unsigned char);
+vector unsigned char vec_sr (vector unsigned char,
+                             vector unsigned char);
+vector signed short vec_sr (vector signed short,
+                            vector unsigned short);
+vector unsigned short vec_sr (vector unsigned short,
+                              vector unsigned short);
+vector signed int vec_sr (vector signed int, vector unsigned int);
+vector unsigned int vec_sr (vector unsigned int, vector unsigned int);
+
+vector signed int vec_vsrw (vector signed int, vector unsigned int);
+vector unsigned int vec_vsrw (vector unsigned int, vector unsigned int);
+
+vector signed short vec_vsrh (vector signed short,
+                              vector unsigned short);
+vector unsigned short vec_vsrh (vector unsigned short,
+                                vector unsigned short);
+
+vector signed char vec_vsrb (vector signed char, vector unsigned char);
+vector unsigned char vec_vsrb (vector unsigned char,
+                               vector unsigned char);
+
+vector signed char vec_sra (vector signed char, vector unsigned char);
+vector unsigned char vec_sra (vector unsigned char,
+                              vector unsigned char);
+vector signed short vec_sra (vector signed short,
+                             vector unsigned short);
+vector unsigned short vec_sra (vector unsigned short,
+                               vector unsigned short);
+vector signed int vec_sra (vector signed int, vector unsigned int);
+vector unsigned int vec_sra (vector unsigned int, vector unsigned int);
+
+vector signed int vec_vsraw (vector signed int, vector unsigned int);
+vector unsigned int vec_vsraw (vector unsigned int,
+                               vector unsigned int);
+
+vector signed short vec_vsrah (vector signed short,
+                               vector unsigned short);
+vector unsigned short vec_vsrah (vector unsigned short,
+                                 vector unsigned short);
+
+vector signed char vec_vsrab (vector signed char, vector unsigned char);
+vector unsigned char vec_vsrab (vector unsigned char,
+                                vector unsigned char);
+
+vector signed int vec_srl (vector signed int, vector unsigned int);
+vector signed int vec_srl (vector signed int, vector unsigned short);
+vector signed int vec_srl (vector signed int, vector unsigned char);
+vector unsigned int vec_srl (vector unsigned int, vector unsigned int);
+vector unsigned int vec_srl (vector unsigned int,
+                             vector unsigned short);
+vector unsigned int vec_srl (vector unsigned int, vector unsigned char);
+vector bool int vec_srl (vector bool int, vector unsigned int);
+vector bool int vec_srl (vector bool int, vector unsigned short);
+vector bool int vec_srl (vector bool int, vector unsigned char);
+vector signed short vec_srl (vector signed short, vector unsigned int);
+vector signed short vec_srl (vector signed short,
+                             vector unsigned short);
+vector signed short vec_srl (vector signed short, vector unsigned char);
+vector unsigned short vec_srl (vector unsigned short,
+                               vector unsigned int);
+vector unsigned short vec_srl (vector unsigned short,
+                               vector unsigned short);
+vector unsigned short vec_srl (vector unsigned short,
+                               vector unsigned char);
+vector bool short vec_srl (vector bool short, vector unsigned int);
+vector bool short vec_srl (vector bool short, vector unsigned short);
+vector bool short vec_srl (vector bool short, vector unsigned char);
+vector pixel vec_srl (vector pixel, vector unsigned int);
+vector pixel vec_srl (vector pixel, vector unsigned short);
+vector pixel vec_srl (vector pixel, vector unsigned char);
+vector signed char vec_srl (vector signed char, vector unsigned int);
+vector signed char vec_srl (vector signed char, vector unsigned short);
+vector signed char vec_srl (vector signed char, vector unsigned char);
+vector unsigned char vec_srl (vector unsigned char,
+                              vector unsigned int);
+vector unsigned char vec_srl (vector unsigned char,
+                              vector unsigned short);
+vector unsigned char vec_srl (vector unsigned char,
+                              vector unsigned char);
+vector bool char vec_srl (vector bool char, vector unsigned int);
+vector bool char vec_srl (vector bool char, vector unsigned short);
+vector bool char vec_srl (vector bool char, vector unsigned char);
+
+vector float vec_sro (vector float, vector signed char);
+vector float vec_sro (vector float, vector unsigned char);
+vector signed int vec_sro (vector signed int, vector signed char);
+vector signed int vec_sro (vector signed int, vector unsigned char);
+vector unsigned int vec_sro (vector unsigned int, vector signed char);
+vector unsigned int vec_sro (vector unsigned int, vector unsigned char);
+vector signed short vec_sro (vector signed short, vector signed char);
+vector signed short vec_sro (vector signed short, vector unsigned char);
+vector unsigned short vec_sro (vector unsigned short,
+                               vector signed char);
+vector unsigned short vec_sro (vector unsigned short,
+                               vector unsigned char);
+vector pixel vec_sro (vector pixel, vector signed char);
+vector pixel vec_sro (vector pixel, vector unsigned char);
+vector signed char vec_sro (vector signed char, vector signed char);
+vector signed char vec_sro (vector signed char, vector unsigned char);
+vector unsigned char vec_sro (vector unsigned char, vector signed char);
+vector unsigned char vec_sro (vector unsigned char,
+                              vector unsigned char);
+
+void vec_st (vector float, int, vector float *);
+void vec_st (vector float, int, float *);
+void vec_st (vector signed int, int, vector signed int *);
+void vec_st (vector signed int, int, int *);
+void vec_st (vector unsigned int, int, vector unsigned int *);
+void vec_st (vector unsigned int, int, unsigned int *);
+void vec_st (vector bool int, int, vector bool int *);
+void vec_st (vector bool int, int, unsigned int *);
+void vec_st (vector bool int, int, int *);
+void vec_st (vector signed short, int, vector signed short *);
+void vec_st (vector signed short, int, short *);
+void vec_st (vector unsigned short, int, vector unsigned short *);
+void vec_st (vector unsigned short, int, unsigned short *);
+void vec_st (vector bool short, int, vector bool short *);
+void vec_st (vector bool short, int, unsigned short *);
+void vec_st (vector pixel, int, vector pixel *);
+void vec_st (vector pixel, int, unsigned short *);
+void vec_st (vector pixel, int, short *);
+void vec_st (vector bool short, int, short *);
+void vec_st (vector signed char, int, vector signed char *);
+void vec_st (vector signed char, int, signed char *);
+void vec_st (vector unsigned char, int, vector unsigned char *);
+void vec_st (vector unsigned char, int, unsigned char *);
+void vec_st (vector bool char, int, vector bool char *);
+void vec_st (vector bool char, int, unsigned char *);
+void vec_st (vector bool char, int, signed char *);
+
+void vec_ste (vector signed char, int, signed char *);
+void vec_ste (vector unsigned char, int, unsigned char *);
+void vec_ste (vector bool char, int, signed char *);
+void vec_ste (vector bool char, int, unsigned char *);
+void vec_ste (vector signed short, int, short *);
+void vec_ste (vector unsigned short, int, unsigned short *);
+void vec_ste (vector bool short, int, short *);
+void vec_ste (vector bool short, int, unsigned short *);
+void vec_ste (vector pixel, int, short *);
+void vec_ste (vector pixel, int, unsigned short *);
+void vec_ste (vector float, int, float *);
+void vec_ste (vector signed int, int, int *);
+void vec_ste (vector unsigned int, int, unsigned int *);
+void vec_ste (vector bool int, int, int *);
+void vec_ste (vector bool int, int, unsigned int *);
+
+void vec_stvewx (vector float, int, float *);
+void vec_stvewx (vector signed int, int, int *);
+void vec_stvewx (vector unsigned int, int, unsigned int *);
+void vec_stvewx (vector bool int, int, int *);
+void vec_stvewx (vector bool int, int, unsigned int *);
+
+void vec_stvehx (vector signed short, int, short *);
+void vec_stvehx (vector unsigned short, int, unsigned short *);
+void vec_stvehx (vector bool short, int, short *);
+void vec_stvehx (vector bool short, int, unsigned short *);
+void vec_stvehx (vector pixel, int, short *);
+void vec_stvehx (vector pixel, int, unsigned short *);
+
+void vec_stvebx (vector signed char, int, signed char *);
+void vec_stvebx (vector unsigned char, int, unsigned char *);
+void vec_stvebx (vector bool char, int, signed char *);
+void vec_stvebx (vector bool char, int, unsigned char *);
+
+void vec_stl (vector float, int, vector float *);
+void vec_stl (vector float, int, float *);
+void vec_stl (vector signed int, int, vector signed int *);
+void vec_stl (vector signed int, int, int *);
+void vec_stl (vector unsigned int, int, vector unsigned int *);
+void vec_stl (vector unsigned int, int, unsigned int *);
+void vec_stl (vector bool int, int, vector bool int *);
+void vec_stl (vector bool int, int, unsigned int *);
+void vec_stl (vector bool int, int, int *);
+void vec_stl (vector signed short, int, vector signed short *);
+void vec_stl (vector signed short, int, short *);
+void vec_stl (vector unsigned short, int, vector unsigned short *);
+void vec_stl (vector unsigned short, int, unsigned short *);
+void vec_stl (vector bool short, int, vector bool short *);
+void vec_stl (vector bool short, int, unsigned short *);
+void vec_stl (vector bool short, int, short *);
+void vec_stl (vector pixel, int, vector pixel *);
+void vec_stl (vector pixel, int, unsigned short *);
+void vec_stl (vector pixel, int, short *);
+void vec_stl (vector signed char, int, vector signed char *);
+void vec_stl (vector signed char, int, signed char *);
+void vec_stl (vector unsigned char, int, vector unsigned char *);
+void vec_stl (vector unsigned char, int, unsigned char *);
+void vec_stl (vector bool char, int, vector bool char *);
+void vec_stl (vector bool char, int, unsigned char *);
+void vec_stl (vector bool char, int, signed char *);
+
+vector signed char vec_sub (vector bool char, vector signed char);
+vector signed char vec_sub (vector signed char, vector bool char);
+vector signed char vec_sub (vector signed char, vector signed char);
+vector unsigned char vec_sub (vector bool char, vector unsigned char);
+vector unsigned char vec_sub (vector unsigned char, vector bool char);
+vector unsigned char vec_sub (vector unsigned char,
+                              vector unsigned char);
+vector signed short vec_sub (vector bool short, vector signed short);
+vector signed short vec_sub (vector signed short, vector bool short);
+vector signed short vec_sub (vector signed short, vector signed short);
+vector unsigned short vec_sub (vector bool short,
+                               vector unsigned short);
+vector unsigned short vec_sub (vector unsigned short,
+                               vector bool short);
+vector unsigned short vec_sub (vector unsigned short,
+                               vector unsigned short);
+vector signed int vec_sub (vector bool int, vector signed int);
+vector signed int vec_sub (vector signed int, vector bool int);
+vector signed int vec_sub (vector signed int, vector signed int);
+vector unsigned int vec_sub (vector bool int, vector unsigned int);
+vector unsigned int vec_sub (vector unsigned int, vector bool int);
+vector unsigned int vec_sub (vector unsigned int, vector unsigned int);
+vector float vec_sub (vector float, vector float);
+
+vector float vec_vsubfp (vector float, vector float);
+
+vector signed int vec_vsubuwm (vector bool int, vector signed int);
+vector signed int vec_vsubuwm (vector signed int, vector bool int);
+vector signed int vec_vsubuwm (vector signed int, vector signed int);
+vector unsigned int vec_vsubuwm (vector bool int, vector unsigned int);
+vector unsigned int vec_vsubuwm (vector unsigned int, vector bool int);
+vector unsigned int vec_vsubuwm (vector unsigned int,
+                                 vector unsigned int);
+
+vector signed short vec_vsubuhm (vector bool short,
+                                 vector signed short);
+vector signed short vec_vsubuhm (vector signed short,
+                                 vector bool short);
+vector signed short vec_vsubuhm (vector signed short,
+                                 vector signed short);
+vector unsigned short vec_vsubuhm (vector bool short,
+                                   vector unsigned short);
+vector unsigned short vec_vsubuhm (vector unsigned short,
+                                   vector bool short);
+vector unsigned short vec_vsubuhm (vector unsigned short,
+                                   vector unsigned short);
+
+vector signed char vec_vsububm (vector bool char, vector signed char);
+vector signed char vec_vsububm (vector signed char, vector bool char);
+vector signed char vec_vsububm (vector signed char, vector signed char);
+vector unsigned char vec_vsububm (vector bool char,
+                                  vector unsigned char);
+vector unsigned char vec_vsububm (vector unsigned char,
+                                  vector bool char);
+vector unsigned char vec_vsububm (vector unsigned char,
+                                  vector unsigned char);
+
+vector unsigned int vec_subc (vector unsigned int, vector unsigned int);
+
+vector unsigned char vec_subs (vector bool char, vector unsigned char);
+vector unsigned char vec_subs (vector unsigned char, vector bool char);
+vector unsigned char vec_subs (vector unsigned char,
+                               vector unsigned char);
+vector signed char vec_subs (vector bool char, vector signed char);
+vector signed char vec_subs (vector signed char, vector bool char);
+vector signed char vec_subs (vector signed char, vector signed char);
+vector unsigned short vec_subs (vector bool short,
+                                vector unsigned short);
+vector unsigned short vec_subs (vector unsigned short,
+                                vector bool short);
+vector unsigned short vec_subs (vector unsigned short,
+                                vector unsigned short);
+vector signed short vec_subs (vector bool short, vector signed short);
+vector signed short vec_subs (vector signed short, vector bool short);
+vector signed short vec_subs (vector signed short, vector signed short);
+vector unsigned int vec_subs (vector bool int, vector unsigned int);
+vector unsigned int vec_subs (vector unsigned int, vector bool int);
+vector unsigned int vec_subs (vector unsigned int, vector unsigned int);
+vector signed int vec_subs (vector bool int, vector signed int);
+vector signed int vec_subs (vector signed int, vector bool int);
+vector signed int vec_subs (vector signed int, vector signed int);
+
+vector signed int vec_vsubsws (vector bool int, vector signed int);
+vector signed int vec_vsubsws (vector signed int, vector bool int);
+vector signed int vec_vsubsws (vector signed int, vector signed int);
+
+vector unsigned int vec_vsubuws (vector bool int, vector unsigned int);
+vector unsigned int vec_vsubuws (vector unsigned int, vector bool int);
+vector unsigned int vec_vsubuws (vector unsigned int,
+                                 vector unsigned int);
+
+vector signed short vec_vsubshs (vector bool short,
+                                 vector signed short);
+vector signed short vec_vsubshs (vector signed short,
+                                 vector bool short);
+vector signed short vec_vsubshs (vector signed short,
+                                 vector signed short);
+
+vector unsigned short vec_vsubuhs (vector bool short,
+                                   vector unsigned short);
+vector unsigned short vec_vsubuhs (vector unsigned short,
+                                   vector bool short);
+vector unsigned short vec_vsubuhs (vector unsigned short,
+                                   vector unsigned short);
+
+vector signed char vec_vsubsbs (vector bool char, vector signed char);
+vector signed char vec_vsubsbs (vector signed char, vector bool char);
+vector signed char vec_vsubsbs (vector signed char, vector signed char);
+
+vector unsigned char vec_vsububs (vector bool char,
+                                  vector unsigned char);
+vector unsigned char vec_vsububs (vector unsigned char,
+                                  vector bool char);
+vector unsigned char vec_vsububs (vector unsigned char,
+                                  vector unsigned char);
+
+vector unsigned int vec_sum4s (vector unsigned char,
+                               vector unsigned int);
+vector signed int vec_sum4s (vector signed char, vector signed int);
+vector signed int vec_sum4s (vector signed short, vector signed int);
+
+vector signed int vec_vsum4shs (vector signed short, vector signed int);
+
+vector signed int vec_vsum4sbs (vector signed char, vector signed int);
+
+vector unsigned int vec_vsum4ubs (vector unsigned char,
+                                  vector unsigned int);
+
+vector signed int vec_sum2s (vector signed int, vector signed int);
+
+vector signed int vec_sums (vector signed int, vector signed int);
+
+vector float vec_trunc (vector float);
+
+vector signed short vec_unpackh (vector signed char);
+vector bool short vec_unpackh (vector bool char);
+vector signed int vec_unpackh (vector signed short);
+vector bool int vec_unpackh (vector bool short);
+vector unsigned int vec_unpackh (vector pixel);
+
+vector bool int vec_vupkhsh (vector bool short);
+vector signed int vec_vupkhsh (vector signed short);
+
+vector unsigned int vec_vupkhpx (vector pixel);
+
+vector bool short vec_vupkhsb (vector bool char);
+vector signed short vec_vupkhsb (vector signed char);
+
+vector signed short vec_unpackl (vector signed char);
+vector bool short vec_unpackl (vector bool char);
+vector unsigned int vec_unpackl (vector pixel);
+vector signed int vec_unpackl (vector signed short);
+vector bool int vec_unpackl (vector bool short);
+
+vector unsigned int vec_vupklpx (vector pixel);
+
+vector bool int vec_vupklsh (vector bool short);
+vector signed int vec_vupklsh (vector signed short);
+
+vector bool short vec_vupklsb (vector bool char);
+vector signed short vec_vupklsb (vector signed char);
+
+vector float vec_xor (vector float, vector float);
+vector float vec_xor (vector float, vector bool int);
+vector float vec_xor (vector bool int, vector float);
+vector bool int vec_xor (vector bool int, vector bool int);
+vector signed int vec_xor (vector bool int, vector signed int);
+vector signed int vec_xor (vector signed int, vector bool int);
+vector signed int vec_xor (vector signed int, vector signed int);
+vector unsigned int vec_xor (vector bool int, vector unsigned int);
+vector unsigned int vec_xor (vector unsigned int, vector bool int);
+vector unsigned int vec_xor (vector unsigned int, vector unsigned int);
+vector bool short vec_xor (vector bool short, vector bool short);
+vector signed short vec_xor (vector bool short, vector signed short);
+vector signed short vec_xor (vector signed short, vector bool short);
+vector signed short vec_xor (vector signed short, vector signed short);
+vector unsigned short vec_xor (vector bool short,
+                               vector unsigned short);
+vector unsigned short vec_xor (vector unsigned short,
+                               vector bool short);
+vector unsigned short vec_xor (vector unsigned short,
+                               vector unsigned short);
+vector signed char vec_xor (vector bool char, vector signed char);
+vector bool char vec_xor (vector bool char, vector bool char);
+vector signed char vec_xor (vector signed char, vector bool char);
+vector signed char vec_xor (vector signed char, vector signed char);
+vector unsigned char vec_xor (vector bool char, vector unsigned char);
+vector unsigned char vec_xor (vector unsigned char, vector bool char);
+vector unsigned char vec_xor (vector unsigned char,
+                              vector unsigned char);
+
+int vec_all_eq (vector signed char, vector bool char);
+int vec_all_eq (vector signed char, vector signed char);
+int vec_all_eq (vector unsigned char, vector bool char);
+int vec_all_eq (vector unsigned char, vector unsigned char);
+int vec_all_eq (vector bool char, vector bool char);
+int vec_all_eq (vector bool char, vector unsigned char);
+int vec_all_eq (vector bool char, vector signed char);
+int vec_all_eq (vector signed short, vector bool short);
+int vec_all_eq (vector signed short, vector signed short);
+int vec_all_eq (vector unsigned short, vector bool short);
+int vec_all_eq (vector unsigned short, vector unsigned short);
+int vec_all_eq (vector bool short, vector bool short);
+int vec_all_eq (vector bool short, vector unsigned short);
+int vec_all_eq (vector bool short, vector signed short);
+int vec_all_eq (vector pixel, vector pixel);
+int vec_all_eq (vector signed int, vector bool int);
+int vec_all_eq (vector signed int, vector signed int);
+int vec_all_eq (vector unsigned int, vector bool int);
+int vec_all_eq (vector unsigned int, vector unsigned int);
+int vec_all_eq (vector bool int, vector bool int);
+int vec_all_eq (vector bool int, vector unsigned int);
+int vec_all_eq (vector bool int, vector signed int);
+int vec_all_eq (vector float, vector float);
+
+int vec_all_ge (vector bool char, vector unsigned char);
+int vec_all_ge (vector unsigned char, vector bool char);
+int vec_all_ge (vector unsigned char, vector unsigned char);
+int vec_all_ge (vector bool char, vector signed char);
+int vec_all_ge (vector signed char, vector bool char);
+int vec_all_ge (vector signed char, vector signed char);
+int vec_all_ge (vector bool short, vector unsigned short);
+int vec_all_ge (vector unsigned short, vector bool short);
+int vec_all_ge (vector unsigned short, vector unsigned short);
+int vec_all_ge (vector signed short, vector signed short);
+int vec_all_ge (vector bool short, vector signed short);
+int vec_all_ge (vector signed short, vector bool short);
+int vec_all_ge (vector bool int, vector unsigned int);
+int vec_all_ge (vector unsigned int, vector bool int);
+int vec_all_ge (vector unsigned int, vector unsigned int);
+int vec_all_ge (vector bool int, vector signed int);
+int vec_all_ge (vector signed int, vector bool int);
+int vec_all_ge (vector signed int, vector signed int);
+int vec_all_ge (vector float, vector float);
+
+int vec_all_gt (vector bool char, vector unsigned char);
+int vec_all_gt (vector unsigned char, vector bool char);
+int vec_all_gt (vector unsigned char, vector unsigned char);
+int vec_all_gt (vector bool char, vector signed char);
+int vec_all_gt (vector signed char, vector bool char);
+int vec_all_gt (vector signed char, vector signed char);
+int vec_all_gt (vector bool short, vector unsigned short);
+int vec_all_gt (vector unsigned short, vector bool short);
+int vec_all_gt (vector unsigned short, vector unsigned short);
+int vec_all_gt (vector bool short, vector signed short);
+int vec_all_gt (vector signed short, vector bool short);
+int vec_all_gt (vector signed short, vector signed short);
+int vec_all_gt (vector bool int, vector unsigned int);
+int vec_all_gt (vector unsigned int, vector bool int);
+int vec_all_gt (vector unsigned int, vector unsigned int);
+int vec_all_gt (vector bool int, vector signed int);
+int vec_all_gt (vector signed int, vector bool int);
+int vec_all_gt (vector signed int, vector signed int);
+int vec_all_gt (vector float, vector float);
+
+int vec_all_in (vector float, vector float);
+
+int vec_all_le (vector bool char, vector unsigned char);
+int vec_all_le (vector unsigned char, vector bool char);
+int vec_all_le (vector unsigned char, vector unsigned char);
+int vec_all_le (vector bool char, vector signed char);
+int vec_all_le (vector signed char, vector bool char);
+int vec_all_le (vector signed char, vector signed char);
+int vec_all_le (vector bool short, vector unsigned short);
+int vec_all_le (vector unsigned short, vector bool short);
+int vec_all_le (vector unsigned short, vector unsigned short);
+int vec_all_le (vector bool short, vector signed short);
+int vec_all_le (vector signed short, vector bool short);
+int vec_all_le (vector signed short, vector signed short);
+int vec_all_le (vector bool int, vector unsigned int);
+int vec_all_le (vector unsigned int, vector bool int);
+int vec_all_le (vector unsigned int, vector unsigned int);
+int vec_all_le (vector bool int, vector signed int);
+int vec_all_le (vector signed int, vector bool int);
+int vec_all_le (vector signed int, vector signed int);
+int vec_all_le (vector float, vector float);
+
+int vec_all_lt (vector bool char, vector unsigned char);
+int vec_all_lt (vector unsigned char, vector bool char);
+int vec_all_lt (vector unsigned char, vector unsigned char);
+int vec_all_lt (vector bool char, vector signed char);
+int vec_all_lt (vector signed char, vector bool char);
+int vec_all_lt (vector signed char, vector signed char);
+int vec_all_lt (vector bool short, vector unsigned short);
+int vec_all_lt (vector unsigned short, vector bool short);
+int vec_all_lt (vector unsigned short, vector unsigned short);
+int vec_all_lt (vector bool short, vector signed short);
+int vec_all_lt (vector signed short, vector bool short);
+int vec_all_lt (vector signed short, vector signed short);
+int vec_all_lt (vector bool int, vector unsigned int);
+int vec_all_lt (vector unsigned int, vector bool int);
+int vec_all_lt (vector unsigned int, vector unsigned int);
+int vec_all_lt (vector bool int, vector signed int);
+int vec_all_lt (vector signed int, vector bool int);
+int vec_all_lt (vector signed int, vector signed int);
+int vec_all_lt (vector float, vector float);
+
+int vec_all_nan (vector float);
+
+int vec_all_ne (vector signed char, vector bool char);
+int vec_all_ne (vector signed char, vector signed char);
+int vec_all_ne (vector unsigned char, vector bool char);
+int vec_all_ne (vector unsigned char, vector unsigned char);
+int vec_all_ne (vector bool char, vector bool char);
+int vec_all_ne (vector bool char, vector unsigned char);
+int vec_all_ne (vector bool char, vector signed char);
+int vec_all_ne (vector signed short, vector bool short);
+int vec_all_ne (vector signed short, vector signed short);
+int vec_all_ne (vector unsigned short, vector bool short);
+int vec_all_ne (vector unsigned short, vector unsigned short);
+int vec_all_ne (vector bool short, vector bool short);
+int vec_all_ne (vector bool short, vector unsigned short);
+int vec_all_ne (vector bool short, vector signed short);
+int vec_all_ne (vector pixel, vector pixel);
+int vec_all_ne (vector signed int, vector bool int);
+int vec_all_ne (vector signed int, vector signed int);
+int vec_all_ne (vector unsigned int, vector bool int);
+int vec_all_ne (vector unsigned int, vector unsigned int);
+int vec_all_ne (vector bool int, vector bool int);
+int vec_all_ne (vector bool int, vector unsigned int);
+int vec_all_ne (vector bool int, vector signed int);
+int vec_all_ne (vector float, vector float);
+
+int vec_all_nge (vector float, vector float);
+
+int vec_all_ngt (vector float, vector float);
+
+int vec_all_nle (vector float, vector float);
+
+int vec_all_nlt (vector float, vector float);
+
+int vec_all_numeric (vector float);
+
+int vec_any_eq (vector signed char, vector bool char);
+int vec_any_eq (vector signed char, vector signed char);
+int vec_any_eq (vector unsigned char, vector bool char);
+int vec_any_eq (vector unsigned char, vector unsigned char);
+int vec_any_eq (vector bool char, vector bool char);
+int vec_any_eq (vector bool char, vector unsigned char);
+int vec_any_eq (vector bool char, vector signed char);
+int vec_any_eq (vector signed short, vector bool short);
+int vec_any_eq (vector signed short, vector signed short);
+int vec_any_eq (vector unsigned short, vector bool short);
+int vec_any_eq (vector unsigned short, vector unsigned short);
+int vec_any_eq (vector bool short, vector bool short);
+int vec_any_eq (vector bool short, vector unsigned short);
+int vec_any_eq (vector bool short, vector signed short);
+int vec_any_eq (vector pixel, vector pixel);
+int vec_any_eq (vector signed int, vector bool int);
+int vec_any_eq (vector signed int, vector signed int);
+int vec_any_eq (vector unsigned int, vector bool int);
+int vec_any_eq (vector unsigned int, vector unsigned int);
+int vec_any_eq (vector bool int, vector bool int);
+int vec_any_eq (vector bool int, vector unsigned int);
+int vec_any_eq (vector bool int, vector signed int);
+int vec_any_eq (vector float, vector float);
+
+int vec_any_ge (vector signed char, vector bool char);
+int vec_any_ge (vector unsigned char, vector bool char);
+int vec_any_ge (vector unsigned char, vector unsigned char);
+int vec_any_ge (vector signed char, vector signed char);
+int vec_any_ge (vector bool char, vector unsigned char);
+int vec_any_ge (vector bool char, vector signed char);
+int vec_any_ge (vector unsigned short, vector bool short);
+int vec_any_ge (vector unsigned short, vector unsigned short);
+int vec_any_ge (vector signed short, vector signed short);
+int vec_any_ge (vector signed short, vector bool short);
+int vec_any_ge (vector bool short, vector unsigned short);
+int vec_any_ge (vector bool short, vector signed short);
+int vec_any_ge (vector signed int, vector bool int);
+int vec_any_ge (vector unsigned int, vector bool int);
+int vec_any_ge (vector unsigned int, vector unsigned int);
+int vec_any_ge (vector signed int, vector signed int);
+int vec_any_ge (vector bool int, vector unsigned int);
+int vec_any_ge (vector bool int, vector signed int);
+int vec_any_ge (vector float, vector float);
+
+int vec_any_gt (vector bool char, vector unsigned char);
+int vec_any_gt (vector unsigned char, vector bool char);
+int vec_any_gt (vector unsigned char, vector unsigned char);
+int vec_any_gt (vector bool char, vector signed char);
+int vec_any_gt (vector signed char, vector bool char);
+int vec_any_gt (vector signed char, vector signed char);
+int vec_any_gt (vector bool short, vector unsigned short);
+int vec_any_gt (vector unsigned short, vector bool short);
+int vec_any_gt (vector unsigned short, vector unsigned short);
+int vec_any_gt (vector bool short, vector signed short);
+int vec_any_gt (vector signed short, vector bool short);
+int vec_any_gt (vector signed short, vector signed short);
+int vec_any_gt (vector bool int, vector unsigned int);
+int vec_any_gt (vector unsigned int, vector bool int);
+int vec_any_gt (vector unsigned int, vector unsigned int);
+int vec_any_gt (vector bool int, vector signed int);
+int vec_any_gt (vector signed int, vector bool int);
+int vec_any_gt (vector signed int, vector signed int);
+int vec_any_gt (vector float, vector float);
+
+int vec_any_le (vector bool char, vector unsigned char);
+int vec_any_le (vector unsigned char, vector bool char);
+int vec_any_le (vector unsigned char, vector unsigned char);
+int vec_any_le (vector bool char, vector signed char);
+int vec_any_le (vector signed char, vector bool char);
+int vec_any_le (vector signed char, vector signed char);
+int vec_any_le (vector bool short, vector unsigned short);
+int vec_any_le (vector unsigned short, vector bool short);
+int vec_any_le (vector unsigned short, vector unsigned short);
+int vec_any_le (vector bool short, vector signed short);
+int vec_any_le (vector signed short, vector bool short);
+int vec_any_le (vector signed short, vector signed short);
+int vec_any_le (vector bool int, vector unsigned int);
+int vec_any_le (vector unsigned int, vector bool int);
+int vec_any_le (vector unsigned int, vector unsigned int);
+int vec_any_le (vector bool int, vector signed int);
+int vec_any_le (vector signed int, vector bool int);
+int vec_any_le (vector signed int, vector signed int);
+int vec_any_le (vector float, vector float);
+
+int vec_any_lt (vector bool char, vector unsigned char);
+int vec_any_lt (vector unsigned char, vector bool char);
+int vec_any_lt (vector unsigned char, vector unsigned char);
+int vec_any_lt (vector bool char, vector signed char);
+int vec_any_lt (vector signed char, vector bool char);
+int vec_any_lt (vector signed char, vector signed char);
+int vec_any_lt (vector bool short, vector unsigned short);
+int vec_any_lt (vector unsigned short, vector bool short);
+int vec_any_lt (vector unsigned short, vector unsigned short);
+int vec_any_lt (vector bool short, vector signed short);
+int vec_any_lt (vector signed short, vector bool short);
+int vec_any_lt (vector signed short, vector signed short);
+int vec_any_lt (vector bool int, vector unsigned int);
+int vec_any_lt (vector unsigned int, vector bool int);
+int vec_any_lt (vector unsigned int, vector unsigned int);
+int vec_any_lt (vector bool int, vector signed int);
+int vec_any_lt (vector signed int, vector bool int);
+int vec_any_lt (vector signed int, vector signed int);
+int vec_any_lt (vector float, vector float);
+
+int vec_any_nan (vector float);
+
+int vec_any_ne (vector signed char, vector bool char);
+int vec_any_ne (vector signed char, vector signed char);
+int vec_any_ne (vector unsigned char, vector bool char);
+int vec_any_ne (vector unsigned char, vector unsigned char);
+int vec_any_ne (vector bool char, vector bool char);
+int vec_any_ne (vector bool char, vector unsigned char);
+int vec_any_ne (vector bool char, vector signed char);
+int vec_any_ne (vector signed short, vector bool short);
+int vec_any_ne (vector signed short, vector signed short);
+int vec_any_ne (vector unsigned short, vector bool short);
+int vec_any_ne (vector unsigned short, vector unsigned short);
+int vec_any_ne (vector bool short, vector bool short);
+int vec_any_ne (vector bool short, vector unsigned short);
+int vec_any_ne (vector bool short, vector signed short);
+int vec_any_ne (vector pixel, vector pixel);
+int vec_any_ne (vector signed int, vector bool int);
+int vec_any_ne (vector signed int, vector signed int);
+int vec_any_ne (vector unsigned int, vector bool int);
+int vec_any_ne (vector unsigned int, vector unsigned int);
+int vec_any_ne (vector bool int, vector bool int);
+int vec_any_ne (vector bool int, vector unsigned int);
+int vec_any_ne (vector bool int, vector signed int);
+int vec_any_ne (vector float, vector float);
+
+int vec_any_nge (vector float, vector float);
+
+int vec_any_ngt (vector float, vector float);
+
+int vec_any_nle (vector float, vector float);
+
+int vec_any_nlt (vector float, vector float);
+
+int vec_any_numeric (vector float);
+
+int vec_any_out (vector float, vector float);
+@end smallexample
+
+If the vector/scalar (VSX) instruction set is available, the following
+additional functions are available:
+
+@smallexample
+vector double vec_abs (vector double);
+vector double vec_add (vector double, vector double);
+vector double vec_and (vector double, vector double);
+vector double vec_and (vector double, vector bool long);
+vector double vec_and (vector bool long, vector double);
+vector double vec_andc (vector double, vector double);
+vector double vec_andc (vector double, vector bool long);
+vector double vec_andc (vector bool long, vector double);
+vector double vec_ceil (vector double);
+vector bool long vec_cmpeq (vector double, vector double);
+vector bool long vec_cmpge (vector double, vector double);
+vector bool long vec_cmpgt (vector double, vector double);
+vector bool long vec_cmple (vector double, vector double);
+vector bool long vec_cmplt (vector double, vector double);
+vector float vec_div (vector float, vector float);
+vector double vec_div (vector double, vector double);
+vector double vec_floor (vector double);
+vector double vec_ld (int, const vector double *);
+vector double vec_ld (int, const double *);
+vector double vec_ldl (int, const vector double *);
+vector double vec_ldl (int, const double *);
+vector unsigned char vec_lvsl (int, const volatile double *);
+vector unsigned char vec_lvsr (int, const volatile double *);
+vector double vec_madd (vector double, vector double, vector double);
+vector double vec_max (vector double, vector double);
+vector double vec_min (vector double, vector double);
+vector float vec_msub (vector float, vector float, vector float);
+vector double vec_msub (vector double, vector double, vector double);
+vector float vec_mul (vector float, vector float);
+vector double vec_mul (vector double, vector double);
+vector float vec_nearbyint (vector float);
+vector double vec_nearbyint (vector double);
+vector float vec_nmadd (vector float, vector float, vector float);
+vector double vec_nmadd (vector double, vector double, vector double);
+vector double vec_nmsub (vector double, vector double, vector double);
+vector double vec_nor (vector double, vector double);
+vector double vec_or (vector double, vector double);
+vector double vec_or (vector double, vector bool long);
+vector double vec_or (vector bool long, vector double);
+vector double vec_perm (vector double,
+                        vector double,
+                        vector unsigned char);
+vector double vec_rint (vector double);
+vector double vec_recip (vector double, vector double);
+vector double vec_rsqrt (vector double);
+vector double vec_rsqrte (vector double);
+vector double vec_sel (vector double, vector double, vector bool long);
+vector double vec_sel (vector double, vector double, vector unsigned long);
+vector double vec_sub (vector double, vector double);
+vector float vec_sqrt (vector float);
+vector double vec_sqrt (vector double);
+void vec_st (vector double, int, vector double *);
+void vec_st (vector double, int, double *);
+vector double vec_trunc (vector double);
+vector double vec_xor (vector double, vector double);
+vector double vec_xor (vector double, vector bool long);
+vector double vec_xor (vector bool long, vector double);
+int vec_all_eq (vector double, vector double);
+int vec_all_ge (vector double, vector double);
+int vec_all_gt (vector double, vector double);
+int vec_all_le (vector double, vector double);
+int vec_all_lt (vector double, vector double);
+int vec_all_nan (vector double);
+int vec_all_ne (vector double, vector double);
+int vec_all_nge (vector double, vector double);
+int vec_all_ngt (vector double, vector double);
+int vec_all_nle (vector double, vector double);
+int vec_all_nlt (vector double, vector double);
+int vec_all_numeric (vector double);
+int vec_any_eq (vector double, vector double);
+int vec_any_ge (vector double, vector double);
+int vec_any_gt (vector double, vector double);
+int vec_any_le (vector double, vector double);
+int vec_any_lt (vector double, vector double);
+int vec_any_nan (vector double);
+int vec_any_ne (vector double, vector double);
+int vec_any_nge (vector double, vector double);
+int vec_any_ngt (vector double, vector double);
+int vec_any_nle (vector double, vector double);
+int vec_any_nlt (vector double, vector double);
+int vec_any_numeric (vector double);
+
+vector double vec_vsx_ld (int, const vector double *);
+vector double vec_vsx_ld (int, const double *);
+vector float vec_vsx_ld (int, const vector float *);
+vector float vec_vsx_ld (int, const float *);
+vector bool int vec_vsx_ld (int, const vector bool int *);
+vector signed int vec_vsx_ld (int, const vector signed int *);
+vector signed int vec_vsx_ld (int, const int *);
+vector signed int vec_vsx_ld (int, const long *);
+vector unsigned int vec_vsx_ld (int, const vector unsigned int *);
+vector unsigned int vec_vsx_ld (int, const unsigned int *);
+vector unsigned int vec_vsx_ld (int, const unsigned long *);
+vector bool short vec_vsx_ld (int, const vector bool short *);
+vector pixel vec_vsx_ld (int, const vector pixel *);
+vector signed short vec_vsx_ld (int, const vector signed short *);
+vector signed short vec_vsx_ld (int, const short *);
+vector unsigned short vec_vsx_ld (int, const vector unsigned short *);
+vector unsigned short vec_vsx_ld (int, const unsigned short *);
+vector bool char vec_vsx_ld (int, const vector bool char *);
+vector signed char vec_vsx_ld (int, const vector signed char *);
+vector signed char vec_vsx_ld (int, const signed char *);
+vector unsigned char vec_vsx_ld (int, const vector unsigned char *);
+vector unsigned char vec_vsx_ld (int, const unsigned char *);
+
+void vec_vsx_st (vector double, int, vector double *);
+void vec_vsx_st (vector double, int, double *);
+void vec_vsx_st (vector float, int, vector float *);
+void vec_vsx_st (vector float, int, float *);
+void vec_vsx_st (vector signed int, int, vector signed int *);
+void vec_vsx_st (vector signed int, int, int *);
+void vec_vsx_st (vector unsigned int, int, vector unsigned int *);
+void vec_vsx_st (vector unsigned int, int, unsigned int *);
+void vec_vsx_st (vector bool int, int, vector bool int *);
+void vec_vsx_st (vector bool int, int, unsigned int *);
+void vec_vsx_st (vector bool int, int, int *);
+void vec_vsx_st (vector signed short, int, vector signed short *);
+void vec_vsx_st (vector signed short, int, short *);
+void vec_vsx_st (vector unsigned short, int, vector unsigned short *);
+void vec_vsx_st (vector unsigned short, int, unsigned short *);
+void vec_vsx_st (vector bool short, int, vector bool short *);
+void vec_vsx_st (vector bool short, int, unsigned short *);
+void vec_vsx_st (vector pixel, int, vector pixel *);
+void vec_vsx_st (vector pixel, int, unsigned short *);
+void vec_vsx_st (vector pixel, int, short *);
+void vec_vsx_st (vector bool short, int, short *);
+void vec_vsx_st (vector signed char, int, vector signed char *);
+void vec_vsx_st (vector signed char, int, signed char *);
+void vec_vsx_st (vector unsigned char, int, vector unsigned char *);
+void vec_vsx_st (vector unsigned char, int, unsigned char *);
+void vec_vsx_st (vector bool char, int, vector bool char *);
+void vec_vsx_st (vector bool char, int, unsigned char *);
+void vec_vsx_st (vector bool char, int, signed char *);
+@end smallexample
+
+Note that the @samp{vec_ld} and @samp{vec_st} builtins will always
+generate the Altivec @samp{LVX} and @samp{STVX} instructions even
+if the VSX instruction set is available.  The @samp{vec_vsx_ld} and
+@samp{vec_vsx_st} builtins will always generate the VSX @samp{LXVD2X},
+@samp{LXVW4X}, @samp{STXVD2X}, and @samp{STXVW4X} instructions.
+
+GCC provides a few other builtins on Powerpc to access certain instructions:
+@smallexample
+float __builtin_recipdivf (float, float);
+float __builtin_rsqrtf (float);
+double __builtin_recipdiv (double, double);
+double __builtin_rsqrt (double);
+long __builtin_bpermd (long, long);
+int __builtin_bswap16 (int);
+@end smallexample
+
+The @code{vec_rsqrt}, @code{__builtin_rsqrt}, and
+@code{__builtin_rsqrtf} functions generate multiple instructions to
+implement the reciprocal sqrt functionality using reciprocal sqrt
+estimate instructions.
+
+The @code{__builtin_recipdiv}, and @code{__builtin_recipdivf}
+functions generate multiple instructions to implement division using
+the reciprocal estimate instructions.
+
+@node RX Built-in Functions
+@subsection RX Built-in Functions
+GCC supports some of the RX instructions which cannot be expressed in
+the C programming language via the use of built-in functions.  The
+following functions are supported:
+
+@deftypefn {Built-in Function}  void __builtin_rx_brk (void)
+Generates the @code{brk} machine instruction.
+@end deftypefn
+
+@deftypefn {Built-in Function}  void __builtin_rx_clrpsw (int)
+Generates the @code{clrpsw} machine instruction to clear the specified
+bit in the processor status word.
+@end deftypefn
+
+@deftypefn {Built-in Function}  void __builtin_rx_int (int)
+Generates the @code{int} machine instruction to generate an interrupt
+with the specified value.
+@end deftypefn
+
+@deftypefn {Built-in Function}  void __builtin_rx_machi (int, int)
+Generates the @code{machi} machine instruction to add the result of
+multiplying the top 16-bits of the two arguments into the
+accumulator.
+@end deftypefn
+
+@deftypefn {Built-in Function}  void __builtin_rx_maclo (int, int)
+Generates the @code{maclo} machine instruction to add the result of
+multiplying the bottom 16-bits of the two arguments into the
+accumulator.
+@end deftypefn
+
+@deftypefn {Built-in Function}  void __builtin_rx_mulhi (int, int)
+Generates the @code{mulhi} machine instruction to place the result of
+multiplying the top 16-bits of the two arguments into the
+accumulator.
+@end deftypefn
+
+@deftypefn {Built-in Function}  void __builtin_rx_mullo (int, int)
+Generates the @code{mullo} machine instruction to place the result of
+multiplying the bottom 16-bits of the two arguments into the
+accumulator.
+@end deftypefn
+
+@deftypefn {Built-in Function}  int  __builtin_rx_mvfachi (void)
+Generates the @code{mvfachi} machine instruction to read the top
+32-bits of the accumulator.
+@end deftypefn
+
+@deftypefn {Built-in Function}  int  __builtin_rx_mvfacmi (void)
+Generates the @code{mvfacmi} machine instruction to read the middle
+32-bits of the accumulator.
+@end deftypefn
+
+@deftypefn {Built-in Function}  int __builtin_rx_mvfc (int)
+Generates the @code{mvfc} machine instruction which reads the control
+register specified in its argument and returns its value.
+@end deftypefn
+
+@deftypefn {Built-in Function}  void __builtin_rx_mvtachi (int)
+Generates the @code{mvtachi} machine instruction to set the top
+32-bits of the accumulator.
+@end deftypefn
+
+@deftypefn {Built-in Function}  void __builtin_rx_mvtaclo (int)
+Generates the @code{mvtaclo} machine instruction to set the bottom
+32-bits of the accumulator.
+@end deftypefn
+
+@deftypefn {Built-in Function}  void __builtin_rx_mvtc (int reg, int val)
+Generates the @code{mvtc} machine instruction which sets control
+register number @code{reg} to @code{val}.
+@end deftypefn
+
+@deftypefn {Built-in Function}  void __builtin_rx_mvtipl (int)
+Generates the @code{mvtipl} machine instruction set the interrupt
+priority level.
+@end deftypefn
+
+@deftypefn {Built-in Function}  void __builtin_rx_racw (int)
+Generates the @code{racw} machine instruction to round the accumulator
+according to the specified mode.
+@end deftypefn
+
+@deftypefn {Built-in Function}  int __builtin_rx_revw (int)
+Generates the @code{revw} machine instruction which swaps the bytes in
+the argument so that bits 0--7 now occupy bits 8--15 and vice versa,
+and also bits 16--23 occupy bits 24--31 and vice versa.
+@end deftypefn
+
+@deftypefn {Built-in Function}  void __builtin_rx_rmpa (void)
+Generates the @code{rmpa} machine instruction which initiates a
+repeated multiply and accumulate sequence.
+@end deftypefn
+
+@deftypefn {Built-in Function}  void __builtin_rx_round (float)
+Generates the @code{round} machine instruction which returns the
+floating point argument rounded according to the current rounding mode
+set in the floating point status word register.
+@end deftypefn
+
+@deftypefn {Built-in Function}  int __builtin_rx_sat (int)
+Generates the @code{sat} machine instruction which returns the
+saturated value of the argument.
+@end deftypefn
+
+@deftypefn {Built-in Function}  void __builtin_rx_setpsw (int)
+Generates the @code{setpsw} machine instruction to set the specified
+bit in the processor status word.
+@end deftypefn
+
+@deftypefn {Built-in Function}  void __builtin_rx_wait (void)
+Generates the @code{wait} machine instruction.
+@end deftypefn
+
+@node SPARC VIS Built-in Functions
+@subsection SPARC VIS Built-in Functions
+
+GCC supports SIMD operations on the SPARC using both the generic vector
+extensions (@pxref{Vector Extensions}) as well as built-in functions for
+the SPARC Visual Instruction Set (VIS).  When you use the @option{-mvis}
+switch, the VIS extension is exposed as the following built-in functions:
+
+@smallexample
+typedef int v2si __attribute__ ((vector_size (8)));
+typedef short v4hi __attribute__ ((vector_size (8)));
+typedef short v2hi __attribute__ ((vector_size (4)));
+typedef char v8qi __attribute__ ((vector_size (8)));
+typedef char v4qi __attribute__ ((vector_size (4)));
+
+void * __builtin_vis_alignaddr (void *, long);
+int64_t __builtin_vis_faligndatadi (int64_t, int64_t);
+v2si __builtin_vis_faligndatav2si (v2si, v2si);
+v4hi __builtin_vis_faligndatav4hi (v4si, v4si);
+v8qi __builtin_vis_faligndatav8qi (v8qi, v8qi);
+
+v4hi __builtin_vis_fexpand (v4qi);
+
+v4hi __builtin_vis_fmul8x16 (v4qi, v4hi);
+v4hi __builtin_vis_fmul8x16au (v4qi, v4hi);
+v4hi __builtin_vis_fmul8x16al (v4qi, v4hi);
+v4hi __builtin_vis_fmul8sux16 (v8qi, v4hi);
+v4hi __builtin_vis_fmul8ulx16 (v8qi, v4hi);
+v2si __builtin_vis_fmuld8sux16 (v4qi, v2hi);
+v2si __builtin_vis_fmuld8ulx16 (v4qi, v2hi);
+
+v4qi __builtin_vis_fpack16 (v4hi);
+v8qi __builtin_vis_fpack32 (v2si, v2si);
+v2hi __builtin_vis_fpackfix (v2si);
+v8qi __builtin_vis_fpmerge (v4qi, v4qi);
+
+int64_t __builtin_vis_pdist (v8qi, v8qi, int64_t);
+@end smallexample
+
+@node SPU Built-in Functions
+@subsection SPU Built-in Functions
+
+GCC provides extensions for the SPU processor as described in the
+Sony/Toshiba/IBM SPU Language Extensions Specification, which can be
+found at @uref{http://cell.scei.co.jp/} or
+@uref{http://www.ibm.com/developerworks/power/cell/}.  GCC's
+implementation differs in several ways.
+
+@itemize @bullet
+
+@item
+The optional extension of specifying vector constants in parentheses is
+not supported.
+
+@item
+A vector initializer requires no cast if the vector constant is of the
+same type as the variable it is initializing.
+
+@item
+If @code{signed} or @code{unsigned} is omitted, the signedness of the
+vector type is the default signedness of the base type.  The default
+varies depending on the operating system, so a portable program should
+always specify the signedness.
+
+@item
+By default, the keyword @code{__vector} is added. The macro
+@code{vector} is defined in @code{<spu_intrinsics.h>} and can be
+undefined.
+
+@item
+GCC allows using a @code{typedef} name as the type specifier for a
+vector type.
+
+@item
+For C, overloaded functions are implemented with macros so the following
+does not work:
+
+@smallexample
+  spu_add ((vector signed int)@{1, 2, 3, 4@}, foo);
+@end smallexample
+
+Since @code{spu_add} is a macro, the vector constant in the example
+is treated as four separate arguments.  Wrap the entire argument in
+parentheses for this to work.
+
+@item
+The extended version of @code{__builtin_expect} is not supported.
+
+@end itemize
+
+@emph{Note:} Only the interface described in the aforementioned
+specification is supported. Internally, GCC uses built-in functions to
+implement the required functionality, but these are not supported and
+are subject to change without notice.
+
+@node Target Format Checks
+@section Format Checks Specific to Particular Target Machines
+
+For some target machines, GCC supports additional options to the
+format attribute
+(@pxref{Function Attributes,,Declaring Attributes of Functions}).
+
+@menu
+* Solaris Format Checks::
+* Darwin Format Checks::
+@end menu
+
+@node Solaris Format Checks
+@subsection Solaris Format Checks
+
+Solaris targets support the @code{cmn_err} (or @code{__cmn_err__}) format
+check.  @code{cmn_err} accepts a subset of the standard @code{printf}
+conversions, and the two-argument @code{%b} conversion for displaying
+bit-fields.  See the Solaris man page for @code{cmn_err} for more information.
+
+@node Darwin Format Checks
+@subsection Darwin Format Checks
+
+Darwin targets support the @code{CFString} (or @code{__CFString__}) in the format 
+attribute context.  Declarations made with such attribution will be parsed for correct syntax
+and format argument types.  However, parsing of the format string itself is currently undefined
+and will not be carried out by this version of the compiler.  
+
+Additionally, @code{CFStringRefs} (defined by the @code{CoreFoundation} headers) may
+also be used as format arguments.  Note that the relevant headers are only likely to be
+available on Darwin (OSX) installations.  On such installations, the XCode and system
+documentation provide descriptions of @code{CFString}, @code{CFStringRefs} and
+associated functions.
+
+@node Pragmas
+@section Pragmas Accepted by GCC
+@cindex pragmas
+@cindex @code{#pragma}
+
+GCC supports several types of pragmas, primarily in order to compile
+code originally written for other compilers.  Note that in general
+we do not recommend the use of pragmas; @xref{Function Attributes},
+for further explanation.
+
+@menu
+* ARM Pragmas::
+* M32C Pragmas::
+* MeP Pragmas::
+* RS/6000 and PowerPC Pragmas::
+* Darwin Pragmas::
+* Solaris Pragmas::
+* Symbol-Renaming Pragmas::
+* Structure-Packing Pragmas::
+* Weak Pragmas::
+* Diagnostic Pragmas::
+* Visibility Pragmas::
+* Push/Pop Macro Pragmas::
+* Function Specific Option Pragmas::
+@end menu
+
+@node ARM Pragmas
+@subsection ARM Pragmas
+
+The ARM target defines pragmas for controlling the default addition of
+@code{long_call} and @code{short_call} attributes to functions.
+@xref{Function Attributes}, for information about the effects of these
+attributes.
+
+@table @code
+@item long_calls
+@cindex pragma, long_calls
+Set all subsequent functions to have the @code{long_call} attribute.
+
+@item no_long_calls
+@cindex pragma, no_long_calls
+Set all subsequent functions to have the @code{short_call} attribute.
+
+@item long_calls_off
+@cindex pragma, long_calls_off
+Do not affect the @code{long_call} or @code{short_call} attributes of
+subsequent functions.
+@end table
+
+@node M32C Pragmas
+@subsection M32C Pragmas
+
+@table @code
+@item GCC memregs @var{number}
+@cindex pragma, memregs
+Overrides the command-line option @code{-memregs=} for the current
+file.  Use with care!  This pragma must be before any function in the
+file, and mixing different memregs values in different objects may
+make them incompatible.  This pragma is useful when a
+performance-critical function uses a memreg for temporary values,
+as it may allow you to reduce the number of memregs used.
+
+@item ADDRESS @var{name} @var{address}
+@cindex pragma, address
+For any declared symbols matching @var{name}, this does three things
+to that symbol: it forces the symbol to be located at the given
+address (a number), it forces the symbol to be volatile, and it
+changes the symbol's scope to be static.  This pragma exists for
+compatibility with other compilers, but note that the common
+@code{1234H} numeric syntax is not supported (use @code{0x1234}
+instead).  Example:
+
+@example
+#pragma ADDRESS port3 0x103
+char port3;
+@end example
+
+@end table
+
+@node MeP Pragmas
+@subsection MeP Pragmas
+
+@table @code
+
+@item custom io_volatile (on|off)
+@cindex pragma, custom io_volatile
+Overrides the command line option @code{-mio-volatile} for the current
+file.  Note that for compatibility with future GCC releases, this
+option should only be used once before any @code{io} variables in each
+file.
+
+@item GCC coprocessor available @var{registers}
+@cindex pragma, coprocessor available
+Specifies which coprocessor registers are available to the register
+allocator.  @var{registers} may be a single register, register range
+separated by ellipses, or comma-separated list of those.  Example:
+
+@example
+#pragma GCC coprocessor available $c0...$c10, $c28
+@end example
+
+@item GCC coprocessor call_saved @var{registers}
+@cindex pragma, coprocessor call_saved
+Specifies which coprocessor registers are to be saved and restored by
+any function using them.  @var{registers} may be a single register,
+register range separated by ellipses, or comma-separated list of
+those.  Example:
+
+@example
+#pragma GCC coprocessor call_saved $c4...$c6, $c31
+@end example
+
+@item GCC coprocessor subclass '(A|B|C|D)' = @var{registers}
+@cindex pragma, coprocessor subclass
+Creates and defines a register class.  These register classes can be
+used by inline @code{asm} constructs.  @var{registers} may be a single
+register, register range separated by ellipses, or comma-separated
+list of those.  Example:
+
+@example
+#pragma GCC coprocessor subclass 'B' = $c2, $c4, $c6
+
+asm ("cpfoo %0" : "=B" (x));
+@end example
+
+@item GCC disinterrupt @var{name} , @var{name} @dots{}
+@cindex pragma, disinterrupt
+For the named functions, the compiler adds code to disable interrupts
+for the duration of those functions.  Any functions so named, which
+are not encountered in the source, cause a warning that the pragma was
+not used.  Examples:
+
+@example
+#pragma disinterrupt foo
+#pragma disinterrupt bar, grill
+int foo () @{ @dots{} @}
+@end example
+
+@item GCC call @var{name} , @var{name} @dots{}
+@cindex pragma, call
+For the named functions, the compiler always uses a register-indirect
+call model when calling the named functions.  Examples:
+
+@example
+extern int foo ();
+#pragma call foo
+@end example
+
+@end table
+
+@node RS/6000 and PowerPC Pragmas
+@subsection RS/6000 and PowerPC Pragmas
+
+The RS/6000 and PowerPC targets define one pragma for controlling
+whether or not the @code{longcall} attribute is added to function
+declarations by default.  This pragma overrides the @option{-mlongcall}
+option, but not the @code{longcall} and @code{shortcall} attributes.
+@xref{RS/6000 and PowerPC Options}, for more information about when long
+calls are and are not necessary.
+
+@table @code
+@item longcall (1)
+@cindex pragma, longcall
+Apply the @code{longcall} attribute to all subsequent function
+declarations.
+
+@item longcall (0)
+Do not apply the @code{longcall} attribute to subsequent function
+declarations.
+@end table
+
+@c Describe h8300 pragmas here.
+@c Describe sh pragmas here.
+@c Describe v850 pragmas here.
+
+@node Darwin Pragmas
+@subsection Darwin Pragmas
+
+The following pragmas are available for all architectures running the
+Darwin operating system.  These are useful for compatibility with other
+Mac OS compilers.
+
+@table @code
+@item mark @var{tokens}@dots{}
+@cindex pragma, mark
+This pragma is accepted, but has no effect.
+
+@item options align=@var{alignment}
+@cindex pragma, options align
+This pragma sets the alignment of fields in structures.  The values of
+@var{alignment} may be @code{mac68k}, to emulate m68k alignment, or
+@code{power}, to emulate PowerPC alignment.  Uses of this pragma nest
+properly; to restore the previous setting, use @code{reset} for the
+@var{alignment}.
+
+@item segment @var{tokens}@dots{}
+@cindex pragma, segment
+This pragma is accepted, but has no effect.
+
+@item unused (@var{var} [, @var{var}]@dots{})
+@cindex pragma, unused
+This pragma declares variables to be possibly unused.  GCC will not
+produce warnings for the listed variables.  The effect is similar to
+that of the @code{unused} attribute, except that this pragma may appear
+anywhere within the variables' scopes.
+@end table
+
+@node Solaris Pragmas
+@subsection Solaris Pragmas
+
+The Solaris target supports @code{#pragma redefine_extname}
+(@pxref{Symbol-Renaming Pragmas}).  It also supports additional
+@code{#pragma} directives for compatibility with the system compiler.
+
+@table @code
+@item align @var{alignment} (@var{variable} [, @var{variable}]...)
+@cindex pragma, align
+
+Increase the minimum alignment of each @var{variable} to @var{alignment}.
+This is the same as GCC's @code{aligned} attribute @pxref{Variable
+Attributes}).  Macro expansion occurs on the arguments to this pragma
+when compiling C and Objective-C@.  It does not currently occur when
+compiling C++, but this is a bug which may be fixed in a future
+release.
+
+@item fini (@var{function} [, @var{function}]...)
+@cindex pragma, fini
+
+This pragma causes each listed @var{function} to be called after
+main, or during shared module unloading, by adding a call to the
+@code{.fini} section.
+
+@item init (@var{function} [, @var{function}]...)
+@cindex pragma, init
+
+This pragma causes each listed @var{function} to be called during
+initialization (before @code{main}) or during shared module loading, by
+adding a call to the @code{.init} section.
+
+@end table
+
+@node Symbol-Renaming Pragmas
+@subsection Symbol-Renaming Pragmas
+
+For compatibility with the Solaris and Tru64 UNIX system headers, GCC
+supports two @code{#pragma} directives which change the name used in
+assembly for a given declaration.  @code{#pragma extern_prefix} is only 
+available on platforms whose system headers need it. To get this effect 
+on all platforms supported by GCC, use the asm labels extension (@pxref{Asm
+Labels}).
+
+@table @code
+@item redefine_extname @var{oldname} @var{newname}
+@cindex pragma, redefine_extname
+
+This pragma gives the C function @var{oldname} the assembly symbol
+@var{newname}.  The preprocessor macro @code{__PRAGMA_REDEFINE_EXTNAME}
+will be defined if this pragma is available (currently on all platforms).
+
+@item extern_prefix @var{string}
+@cindex pragma, extern_prefix
+
+This pragma causes all subsequent external function and variable
+declarations to have @var{string} prepended to their assembly symbols.
+This effect may be terminated with another @code{extern_prefix} pragma
+whose argument is an empty string.  The preprocessor macro
+@code{__PRAGMA_EXTERN_PREFIX} will be defined if this pragma is
+available (currently only on Tru64 UNIX)@.
+@end table
+
+These pragmas and the asm labels extension interact in a complicated
+manner.  Here are some corner cases you may want to be aware of.
+
+@enumerate
+@item Both pragmas silently apply only to declarations with external
+linkage.  Asm labels do not have this restriction.
+
+@item In C++, both pragmas silently apply only to declarations with
+``C'' linkage.  Again, asm labels do not have this restriction.
+
+@item If any of the three ways of changing the assembly name of a
+declaration is applied to a declaration whose assembly name has
+already been determined (either by a previous use of one of these
+features, or because the compiler needed the assembly name in order to
+generate code), and the new name is different, a warning issues and
+the name does not change.
+
+@item The @var{oldname} used by @code{#pragma redefine_extname} is
+always the C-language name.
+
+@item If @code{#pragma extern_prefix} is in effect, and a declaration
+occurs with an asm label attached, the prefix is silently ignored for
+that declaration.
+
+@item If @code{#pragma extern_prefix} and @code{#pragma redefine_extname}
+apply to the same declaration, whichever triggered first wins, and a
+warning issues if they contradict each other.  (We would like to have
+@code{#pragma redefine_extname} always win, for consistency with asm
+labels, but if @code{#pragma extern_prefix} triggers first we have no
+way of knowing that that happened.)
+@end enumerate
+
+@node Structure-Packing Pragmas
+@subsection Structure-Packing Pragmas
+
+For compatibility with Microsoft Windows compilers, GCC supports a
+set of @code{#pragma} directives which change the maximum alignment of
+members of structures (other than zero-width bitfields), unions, and
+classes subsequently defined. The @var{n} value below always is required
+to be a small power of two and specifies the new alignment in bytes.
+
+@enumerate
+@item @code{#pragma pack(@var{n})} simply sets the new alignment.
+@item @code{#pragma pack()} sets the alignment to the one that was in
+effect when compilation started (see also command-line option
+@option{-fpack-struct[=@var{n}]} @pxref{Code Gen Options}).
+@item @code{#pragma pack(push[,@var{n}])} pushes the current alignment
+setting on an internal stack and then optionally sets the new alignment.
+@item @code{#pragma pack(pop)} restores the alignment setting to the one
+saved at the top of the internal stack (and removes that stack entry).
+Note that @code{#pragma pack([@var{n}])} does not influence this internal
+stack; thus it is possible to have @code{#pragma pack(push)} followed by
+multiple @code{#pragma pack(@var{n})} instances and finalized by a single
+@code{#pragma pack(pop)}.
+@end enumerate
+
+Some targets, e.g.@: i386 and powerpc, support the @code{ms_struct}
+@code{#pragma} which lays out a structure as the documented
+@code{__attribute__ ((ms_struct))}.
+@enumerate
+@item @code{#pragma ms_struct on} turns on the layout for structures
+declared.
+@item @code{#pragma ms_struct off} turns off the layout for structures
+declared.
+@item @code{#pragma ms_struct reset} goes back to the default layout.
+@end enumerate
+
+@node Weak Pragmas
+@subsection Weak Pragmas
+
+For compatibility with SVR4, GCC supports a set of @code{#pragma}
+directives for declaring symbols to be weak, and defining weak
+aliases.
+
+@table @code
+@item #pragma weak @var{symbol}
+@cindex pragma, weak
+This pragma declares @var{symbol} to be weak, as if the declaration
+had the attribute of the same name.  The pragma may appear before
+or after the declaration of @var{symbol}.  It is not an error for
+@var{symbol} to never be defined at all.
+
+@item #pragma weak @var{symbol1} = @var{symbol2}
+This pragma declares @var{symbol1} to be a weak alias of @var{symbol2}.
+It is an error if @var{symbol2} is not defined in the current
+translation unit.
+@end table
+
+@node Diagnostic Pragmas
+@subsection Diagnostic Pragmas
+
+GCC allows the user to selectively enable or disable certain types of
+diagnostics, and change the kind of the diagnostic.  For example, a
+project's policy might require that all sources compile with
+@option{-Werror} but certain files might have exceptions allowing
+specific types of warnings.  Or, a project might selectively enable
+diagnostics and treat them as errors depending on which preprocessor
+macros are defined.
+
+@table @code
+@item #pragma GCC diagnostic @var{kind} @var{option}
+@cindex pragma, diagnostic
+
+Modifies the disposition of a diagnostic.  Note that not all
+diagnostics are modifiable; at the moment only warnings (normally
+controlled by @samp{-W@dots{}}) can be controlled, and not all of them.
+Use @option{-fdiagnostics-show-option} to determine which diagnostics
+are controllable and which option controls them.
+
+@var{kind} is @samp{error} to treat this diagnostic as an error,
+@samp{warning} to treat it like a warning (even if @option{-Werror} is
+in effect), or @samp{ignored} if the diagnostic is to be ignored.
+@var{option} is a double quoted string which matches the command-line
+option.
+
+@example
+#pragma GCC diagnostic warning "-Wformat"
+#pragma GCC diagnostic error "-Wformat"
+#pragma GCC diagnostic ignored "-Wformat"
+@end example
+
+Note that these pragmas override any command-line options.  GCC keeps
+track of the location of each pragma, and issues diagnostics according
+to the state as of that point in the source file.  Thus, pragmas occurring
+after a line do not affect diagnostics caused by that line.
+
+@item #pragma GCC diagnostic push
+@itemx #pragma GCC diagnostic pop
+
+Causes GCC to remember the state of the diagnostics as of each
+@code{push}, and restore to that point at each @code{pop}.  If a
+@code{pop} has no matching @code{push}, the command line options are
+restored.
+
+@example
+#pragma GCC diagnostic error "-Wuninitialized"
+  foo(a);			/* error is given for this one */
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wuninitialized"
+  foo(b);			/* no diagnostic for this one */
+#pragma GCC diagnostic pop
+  foo(c);			/* error is given for this one */
+#pragma GCC diagnostic pop
+  foo(d);			/* depends on command line options */
+@end example
+
+@end table
+
+GCC also offers a simple mechanism for printing messages during
+compilation.
+
+@table @code
+@item #pragma message @var{string}
+@cindex pragma, diagnostic
+
+Prints @var{string} as a compiler message on compilation.  The message
+is informational only, and is neither a compilation warning nor an error.
+
+@smallexample
+#pragma message "Compiling " __FILE__ "..."
+@end smallexample
+
+@var{string} may be parenthesized, and is printed with location
+information.  For example,
+
+@smallexample
+#define DO_PRAGMA(x) _Pragma (#x)
+#define TODO(x) DO_PRAGMA(message ("TODO - " #x))
+
+TODO(Remember to fix this)
+@end smallexample
+
+prints @samp{/tmp/file.c:4: note: #pragma message:
+TODO - Remember to fix this}.
+
+@end table
+
+@node Visibility Pragmas
+@subsection Visibility Pragmas
+
+@table @code
+@item #pragma GCC visibility push(@var{visibility})
+@itemx #pragma GCC visibility pop
+@cindex pragma, visibility
+
+This pragma allows the user to set the visibility for multiple
+declarations without having to give each a visibility attribute
+@xref{Function Attributes}, for more information about visibility and
+the attribute syntax.
+
+In C++, @samp{#pragma GCC visibility} affects only namespace-scope
+declarations.  Class members and template specializations are not
+affected; if you want to override the visibility for a particular
+member or instantiation, you must use an attribute.
+
+@end table
+
+
+@node Push/Pop Macro Pragmas
+@subsection Push/Pop Macro Pragmas
+
+For compatibility with Microsoft Windows compilers, GCC supports
+@samp{#pragma push_macro(@var{"macro_name"})}
+and @samp{#pragma pop_macro(@var{"macro_name"})}.
+
+@table @code
+@item #pragma push_macro(@var{"macro_name"})
+@cindex pragma, push_macro
+This pragma saves the value of the macro named as @var{macro_name} to
+the top of the stack for this macro.
+
+@item #pragma pop_macro(@var{"macro_name"})
+@cindex pragma, pop_macro
+This pragma sets the value of the macro named as @var{macro_name} to
+the value on top of the stack for this macro. If the stack for
+@var{macro_name} is empty, the value of the macro remains unchanged.
+@end table
+
+For example:
+
+@smallexample
+#define X  1
+#pragma push_macro("X")
+#undef X
+#define X -1
+#pragma pop_macro("X")
+int x [X]; 
+@end smallexample
+
+In this example, the definition of X as 1 is saved by @code{#pragma
+push_macro} and restored by @code{#pragma pop_macro}.
+
+@node Function Specific Option Pragmas
+@subsection Function Specific Option Pragmas
+
+@table @code
+@item #pragma GCC target (@var{"string"}...)
+@cindex pragma GCC target
+
+This pragma allows you to set target specific options for functions
+defined later in the source file.  One or more strings can be
+specified.  Each function that is defined after this point will be as
+if @code{attribute((target("STRING")))} was specified for that
+function.  The parenthesis around the options is optional.
+@xref{Function Attributes}, for more information about the
+@code{target} attribute and the attribute syntax.
+
+The @code{#pragma GCC target} attribute is not implemented in GCC versions earlier
+than 4.4 for the i386/x86_64 and 4.6 for the PowerPC backends.  At
+present, it is not implemented for other backends.
+@end table
+
+@table @code
+@item #pragma GCC optimize (@var{"string"}...)
+@cindex pragma GCC optimize
+
+This pragma allows you to set global optimization options for functions
+defined later in the source file.  One or more strings can be
+specified.  Each function that is defined after this point will be as
+if @code{attribute((optimize("STRING")))} was specified for that
+function.  The parenthesis around the options is optional.
+@xref{Function Attributes}, for more information about the
+@code{optimize} attribute and the attribute syntax.
+
+The @samp{#pragma GCC optimize} pragma is not implemented in GCC
+versions earlier than 4.4.
+@end table
+
+@table @code
+@item #pragma GCC push_options
+@itemx #pragma GCC pop_options
+@cindex pragma GCC push_options
+@cindex pragma GCC pop_options
+
+These pragmas maintain a stack of the current target and optimization
+options.  It is intended for include files where you temporarily want
+to switch to using a different @samp{#pragma GCC target} or
+@samp{#pragma GCC optimize} and then to pop back to the previous
+options.
+
+The @samp{#pragma GCC push_options} and @samp{#pragma GCC pop_options}
+pragmas are not implemented in GCC versions earlier than 4.4.
+@end table
+
+@table @code
+@item #pragma GCC reset_options
+@cindex pragma GCC reset_options
+
+This pragma clears the current @code{#pragma GCC target} and
+@code{#pragma GCC optimize} to use the default switches as specified
+on the command line.
+
+The @samp{#pragma GCC reset_options} pragma is not implemented in GCC
+versions earlier than 4.4.
+@end table
+
+@node Unnamed Fields
+@section Unnamed struct/union fields within structs/unions
+@cindex @code{struct}
+@cindex @code{union}
+
+As permitted by ISO C1X and for compatibility with other compilers,
+GCC allows you to define
+a structure or union that contains, as fields, structures and unions
+without names.  For example:
+
+@smallexample
+struct @{
+  int a;
+  union @{
+    int b;
+    float c;
+  @};
+  int d;
+@} foo;
+@end smallexample
+
+In this example, the user would be able to access members of the unnamed
+union with code like @samp{foo.b}.  Note that only unnamed structs and
+unions are allowed, you may not have, for example, an unnamed
+@code{int}.
+
+You must never create such structures that cause ambiguous field definitions.
+For example, this structure:
+
+@smallexample
+struct @{
+  int a;
+  struct @{
+    int a;
+  @};
+@} foo;
+@end smallexample
+
+It is ambiguous which @code{a} is being referred to with @samp{foo.a}.
+The compiler gives errors for such constructs.
+
+@opindex fms-extensions
+Unless @option{-fms-extensions} is used, the unnamed field must be a
+structure or union definition without a tag (for example, @samp{struct
+@{ int a; @};}).  If @option{-fms-extensions} is used, the field may
+also be a definition with a tag such as @samp{struct foo @{ int a;
+@};}, a reference to a previously defined structure or union such as
+@samp{struct foo;}, or a reference to a @code{typedef} name for a
+previously defined structure or union type.
+
+@opindex fplan9-extensions
+The option @option{-fplan9-extensions} enables
+@option{-fms-extensions} as well as two other extensions.  First, a
+pointer to a structure is automatically converted to a pointer to an
+anonymous field for assignments and function calls.  For example:
+
+@smallexample
+struct s1 @{ int a; @};
+struct s2 @{ struct s1; @};
+extern void f1 (struct s1 *);
+void f2 (struct s2 *p) @{ f1 (p); @}
+@end smallexample
+
+In the call to @code{f1} inside @code{f2}, the pointer @code{p} is
+converted into a pointer to the anonymous field.
+
+Second, when the type of an anonymous field is a @code{typedef} for a
+@code{struct} or @code{union}, code may refer to the field using the
+name of the @code{typedef}.
+
+@smallexample
+typedef struct @{ int a; @} s1;
+struct s2 @{ s1; @};
+s1 f1 (struct s2 *p) @{ return p->s1; @}
+@end smallexample
+
+These usages are only permitted when they are not ambiguous.
+
+@node Thread-Local
+@section Thread-Local Storage
+@cindex Thread-Local Storage
+@cindex @acronym{TLS}
+@cindex @code{__thread}
+
+Thread-local storage (@acronym{TLS}) is a mechanism by which variables
+are allocated such that there is one instance of the variable per extant
+thread.  The run-time model GCC uses to implement this originates
+in the IA-64 processor-specific ABI, but has since been migrated
+to other processors as well.  It requires significant support from
+the linker (@command{ld}), dynamic linker (@command{ld.so}), and
+system libraries (@file{libc.so} and @file{libpthread.so}), so it
+is not available everywhere.
+
+At the user level, the extension is visible with a new storage
+class keyword: @code{__thread}.  For example:
+
+@smallexample
+__thread int i;
+extern __thread struct state s;
+static __thread char *p;
+@end smallexample
+
+The @code{__thread} specifier may be used alone, with the @code{extern}
+or @code{static} specifiers, but with no other storage class specifier.
+When used with @code{extern} or @code{static}, @code{__thread} must appear
+immediately after the other storage class specifier.
+
+The @code{__thread} specifier may be applied to any global, file-scoped
+static, function-scoped static, or static data member of a class.  It may
+not be applied to block-scoped automatic or non-static data member.
+
+When the address-of operator is applied to a thread-local variable, it is
+evaluated at run-time and returns the address of the current thread's
+instance of that variable.  An address so obtained may be used by any
+thread.  When a thread terminates, any pointers to thread-local variables
+in that thread become invalid.
+
+No static initialization may refer to the address of a thread-local variable.
+
+In C++, if an initializer is present for a thread-local variable, it must
+be a @var{constant-expression}, as defined in 5.19.2 of the ANSI/ISO C++
+standard.
+
+See @uref{http://www.akkadia.org/drepper/tls.pdf,
+ELF Handling For Thread-Local Storage} for a detailed explanation of
+the four thread-local storage addressing models, and how the run-time
+is expected to function.
+
+@menu
+* C99 Thread-Local Edits::
+* C++98 Thread-Local Edits::
+@end menu
+
+@node C99 Thread-Local Edits
+@subsection ISO/IEC 9899:1999 Edits for Thread-Local Storage
+
+The following are a set of changes to ISO/IEC 9899:1999 (aka C99)
+that document the exact semantics of the language extension.
+
+@itemize @bullet
+@item
+@cite{5.1.2  Execution environments}
+
+Add new text after paragraph 1
+
+@quotation
+Within either execution environment, a @dfn{thread} is a flow of
+control within a program.  It is implementation defined whether
+or not there may be more than one thread associated with a program.
+It is implementation defined how threads beyond the first are
+created, the name and type of the function called at thread
+startup, and how threads may be terminated.  However, objects
+with thread storage duration shall be initialized before thread
+startup.
+@end quotation
+
+@item
+@cite{6.2.4  Storage durations of objects}
+
+Add new text before paragraph 3
+
+@quotation
+An object whose identifier is declared with the storage-class
+specifier @w{@code{__thread}} has @dfn{thread storage duration}.
+Its lifetime is the entire execution of the thread, and its
+stored value is initialized only once, prior to thread startup.
+@end quotation
+
+@item
+@cite{6.4.1  Keywords}
+
+Add @code{__thread}.
+
+@item
+@cite{6.7.1  Storage-class specifiers}
+
+Add @code{__thread} to the list of storage class specifiers in
+paragraph 1.
+
+Change paragraph 2 to
+
+@quotation
+With the exception of @code{__thread}, at most one storage-class
+specifier may be given [@dots{}].  The @code{__thread} specifier may
+be used alone, or immediately following @code{extern} or
+@code{static}.
+@end quotation
+
+Add new text after paragraph 6
+
+@quotation
+The declaration of an identifier for a variable that has
+block scope that specifies @code{__thread} shall also
+specify either @code{extern} or @code{static}.
+
+The @code{__thread} specifier shall be used only with
+variables.
+@end quotation
+@end itemize
+
+@node C++98 Thread-Local Edits
+@subsection ISO/IEC 14882:1998 Edits for Thread-Local Storage
+
+The following are a set of changes to ISO/IEC 14882:1998 (aka C++98)
+that document the exact semantics of the language extension.
+
+@itemize @bullet
+@item
+@b{[intro.execution]}
+
+New text after paragraph 4
+
+@quotation
+A @dfn{thread} is a flow of control within the abstract machine.
+It is implementation defined whether or not there may be more than
+one thread.
+@end quotation
+
+New text after paragraph 7
+
+@quotation
+It is unspecified whether additional action must be taken to
+ensure when and whether side effects are visible to other threads.
+@end quotation
+
+@item
+@b{[lex.key]}
+
+Add @code{__thread}.
+
+@item
+@b{[basic.start.main]}
+
+Add after paragraph 5
+
+@quotation
+The thread that begins execution at the @code{main} function is called
+the @dfn{main thread}.  It is implementation defined how functions
+beginning threads other than the main thread are designated or typed.
+A function so designated, as well as the @code{main} function, is called
+a @dfn{thread startup function}.  It is implementation defined what
+happens if a thread startup function returns.  It is implementation
+defined what happens to other threads when any thread calls @code{exit}.
+@end quotation
+
+@item
+@b{[basic.start.init]}
+
+Add after paragraph 4
+
+@quotation
+The storage for an object of thread storage duration shall be
+statically initialized before the first statement of the thread startup
+function.  An object of thread storage duration shall not require
+dynamic initialization.
+@end quotation
+
+@item
+@b{[basic.start.term]}
+
+Add after paragraph 3
+
+@quotation
+The type of an object with thread storage duration shall not have a
+non-trivial destructor, nor shall it be an array type whose elements
+(directly or indirectly) have non-trivial destructors.
+@end quotation
+
+@item
+@b{[basic.stc]}
+
+Add ``thread storage duration'' to the list in paragraph 1.
+
+Change paragraph 2
+
+@quotation
+Thread, static, and automatic storage durations are associated with
+objects introduced by declarations [@dots{}].
+@end quotation
+
+Add @code{__thread} to the list of specifiers in paragraph 3.
+
+@item
+@b{[basic.stc.thread]}
+
+New section before @b{[basic.stc.static]}
+
+@quotation
+The keyword @code{__thread} applied to a non-local object gives the
+object thread storage duration.
+
+A local variable or class data member declared both @code{static}
+and @code{__thread} gives the variable or member thread storage
+duration.
+@end quotation
+
+@item
+@b{[basic.stc.static]}
+
+Change paragraph 1
+
+@quotation
+All objects which have neither thread storage duration, dynamic
+storage duration nor are local [@dots{}].
+@end quotation
+
+@item
+@b{[dcl.stc]}
+
+Add @code{__thread} to the list in paragraph 1.
+
+Change paragraph 1
+
+@quotation
+With the exception of @code{__thread}, at most one
+@var{storage-class-specifier} shall appear in a given
+@var{decl-specifier-seq}.  The @code{__thread} specifier may
+be used alone, or immediately following the @code{extern} or
+@code{static} specifiers.  [@dots{}]
+@end quotation
+
+Add after paragraph 5
+
+@quotation
+The @code{__thread} specifier can be applied only to the names of objects
+and to anonymous unions.
+@end quotation
+
+@item
+@b{[class.mem]}
+
+Add after paragraph 6
+
+@quotation
+Non-@code{static} members shall not be @code{__thread}.
+@end quotation
+@end itemize
+
+@node Binary constants
+@section Binary constants using the @samp{0b} prefix
+@cindex Binary constants using the @samp{0b} prefix
+
+Integer constants can be written as binary constants, consisting of a
+sequence of @samp{0} and @samp{1} digits, prefixed by @samp{0b} or
+@samp{0B}.  This is particularly useful in environments that operate a
+lot on the bit-level (like microcontrollers).
+
+The following statements are identical:
+
+@smallexample
+i =       42;
+i =     0x2a;
+i =      052;
+i = 0b101010;
+@end smallexample
+
+The type of these constants follows the same rules as for octal or
+hexadecimal integer constants, so suffixes like @samp{L} or @samp{UL}
+can be applied.
+
+@node C++ Extensions
+@chapter Extensions to the C++ Language
+@cindex extensions, C++ language
+@cindex C++ language extensions
+
+The GNU compiler provides these extensions to the C++ language (and you
+can also use most of the C language extensions in your C++ programs).  If you
+want to write code that checks whether these features are available, you can
+test for the GNU compiler the same way as for C programs: check for a
+predefined macro @code{__GNUC__}.  You can also use @code{__GNUG__} to
+test specifically for GNU C++ (@pxref{Common Predefined Macros,,
+Predefined Macros,cpp,The GNU C Preprocessor}).
+
+@menu
+* C++ Volatiles::       What constitutes an access to a volatile object.
+* Restricted Pointers:: C99 restricted pointers and references.
+* Vague Linkage::       Where G++ puts inlines, vtables and such.
+* C++ Interface::       You can use a single C++ header file for both
+                        declarations and definitions.
+* Template Instantiation:: Methods for ensuring that exactly one copy of
+                        each needed template instantiation is emitted.
+* Bound member functions:: You can extract a function pointer to the
+                        method denoted by a @samp{->*} or @samp{.*} expression.
+* C++ Attributes::      Variable, function, and type attributes for C++ only.
+* Namespace Association:: Strong using-directives for namespace association.
+* Type Traits::         Compiler support for type traits
+* Java Exceptions::     Tweaking exception handling to work with Java.
+* Deprecated Features:: Things will disappear from g++.
+* Backwards Compatibility:: Compatibilities with earlier definitions of C++.
+@end menu
+
+@node C++ Volatiles
+@section When is a Volatile C++ Object Accessed?
+@cindex accessing volatiles
+@cindex volatile read
+@cindex volatile write
+@cindex volatile access
+
+The C++ standard differs from the C standard in its treatment of
+volatile objects.  It fails to specify what constitutes a volatile
+access, except to say that C++ should behave in a similar manner to C
+with respect to volatiles, where possible.  However, the different
+lvalueness of expressions between C and C++ complicate the behavior.
+G++ behaves the same as GCC for volatile access, @xref{C
+Extensions,,Volatiles}, for a description of GCC's behavior.
+
+The C and C++ language specifications differ when an object is
+accessed in a void context:
+
+@smallexample
+volatile int *src = @var{somevalue};
+*src;
+@end smallexample
+
+The C++ standard specifies that such expressions do not undergo lvalue
+to rvalue conversion, and that the type of the dereferenced object may
+be incomplete.  The C++ standard does not specify explicitly that it
+is lvalue to rvalue conversion which is responsible for causing an
+access.  There is reason to believe that it is, because otherwise
+certain simple expressions become undefined.  However, because it
+would surprise most programmers, G++ treats dereferencing a pointer to
+volatile object of complete type as GCC would do for an equivalent
+type in C@.  When the object has incomplete type, G++ issues a
+warning; if you wish to force an error, you must force a conversion to
+rvalue with, for instance, a static cast.
+
+When using a reference to volatile, G++ does not treat equivalent
+expressions as accesses to volatiles, but instead issues a warning that
+no volatile is accessed.  The rationale for this is that otherwise it
+becomes difficult to determine where volatile access occur, and not
+possible to ignore the return value from functions returning volatile
+references.  Again, if you wish to force a read, cast the reference to
+an rvalue.
+
+G++ implements the same behavior as GCC does when assigning to a
+volatile object -- there is no reread of the assigned-to object, the
+assigned rvalue is reused.  Note that in C++ assignment expressions
+are lvalues, and if used as an lvalue, the volatile object will be
+referred to.  For instance, @var{vref} will refer to @var{vobj}, as
+expected, in the following example:
+
+@smallexample
+volatile int vobj;
+volatile int &vref = vobj = @var{something};
+@end smallexample
+
+@node Restricted Pointers
+@section Restricting Pointer Aliasing
+@cindex restricted pointers
+@cindex restricted references
+@cindex restricted this pointer
+
+As with the C front end, G++ understands the C99 feature of restricted pointers,
+specified with the @code{__restrict__}, or @code{__restrict} type
+qualifier.  Because you cannot compile C++ by specifying the @option{-std=c99}
+language flag, @code{restrict} is not a keyword in C++.
+
+In addition to allowing restricted pointers, you can specify restricted
+references, which indicate that the reference is not aliased in the local
+context.
+
+@smallexample
+void fn (int *__restrict__ rptr, int &__restrict__ rref)
+@{
+  /* @r{@dots{}} */
+@}
+@end smallexample
+
+@noindent
+In the body of @code{fn}, @var{rptr} points to an unaliased integer and
+@var{rref} refers to a (different) unaliased integer.
+
+You may also specify whether a member function's @var{this} pointer is
+unaliased by using @code{__restrict__} as a member function qualifier.
+
+@smallexample
+void T::fn () __restrict__
+@{
+  /* @r{@dots{}} */
+@}
+@end smallexample
+
+@noindent
+Within the body of @code{T::fn}, @var{this} will have the effective
+definition @code{T *__restrict__ const this}.  Notice that the
+interpretation of a @code{__restrict__} member function qualifier is
+different to that of @code{const} or @code{volatile} qualifier, in that it
+is applied to the pointer rather than the object.  This is consistent with
+other compilers which implement restricted pointers.
+
+As with all outermost parameter qualifiers, @code{__restrict__} is
+ignored in function definition matching.  This means you only need to
+specify @code{__restrict__} in a function definition, rather than
+in a function prototype as well.
+
+@node Vague Linkage
+@section Vague Linkage
+@cindex vague linkage
+
+There are several constructs in C++ which require space in the object
+file but are not clearly tied to a single translation unit.  We say that
+these constructs have ``vague linkage''.  Typically such constructs are
+emitted wherever they are needed, though sometimes we can be more
+clever.
+
+@table @asis
+@item Inline Functions
+Inline functions are typically defined in a header file which can be
+included in many different compilations.  Hopefully they can usually be
+inlined, but sometimes an out-of-line copy is necessary, if the address
+of the function is taken or if inlining fails.  In general, we emit an
+out-of-line copy in all translation units where one is needed.  As an
+exception, we only emit inline virtual functions with the vtable, since
+it will always require a copy.
+
+Local static variables and string constants used in an inline function
+are also considered to have vague linkage, since they must be shared
+between all inlined and out-of-line instances of the function.
+
+@item VTables
+@cindex vtable
+C++ virtual functions are implemented in most compilers using a lookup
+table, known as a vtable.  The vtable contains pointers to the virtual
+functions provided by a class, and each object of the class contains a
+pointer to its vtable (or vtables, in some multiple-inheritance
+situations).  If the class declares any non-inline, non-pure virtual
+functions, the first one is chosen as the ``key method'' for the class,
+and the vtable is only emitted in the translation unit where the key
+method is defined.
+
+@emph{Note:} If the chosen key method is later defined as inline, the
+vtable will still be emitted in every translation unit which defines it.
+Make sure that any inline virtuals are declared inline in the class
+body, even if they are not defined there.
+
+@item @code{type_info} objects
+@cindex @code{type_info}
+@cindex RTTI
+C++ requires information about types to be written out in order to
+implement @samp{dynamic_cast}, @samp{typeid} and exception handling.
+For polymorphic classes (classes with virtual functions), the @samp{type_info}
+object is written out along with the vtable so that @samp{dynamic_cast}
+can determine the dynamic type of a class object at runtime.  For all
+other types, we write out the @samp{type_info} object when it is used: when
+applying @samp{typeid} to an expression, throwing an object, or
+referring to a type in a catch clause or exception specification.
+
+@item Template Instantiations
+Most everything in this section also applies to template instantiations,
+but there are other options as well.
+@xref{Template Instantiation,,Where's the Template?}.
+
+@end table
+
+When used with GNU ld version 2.8 or later on an ELF system such as
+GNU/Linux or Solaris 2, or on Microsoft Windows, duplicate copies of
+these constructs will be discarded at link time.  This is known as
+COMDAT support.
+
+On targets that don't support COMDAT, but do support weak symbols, GCC
+will use them.  This way one copy will override all the others, but
+the unused copies will still take up space in the executable.
+
+For targets which do not support either COMDAT or weak symbols,
+most entities with vague linkage will be emitted as local symbols to
+avoid duplicate definition errors from the linker.  This will not happen
+for local statics in inlines, however, as having multiple copies will
+almost certainly break things.
+
+@xref{C++ Interface,,Declarations and Definitions in One Header}, for
+another way to control placement of these constructs.
+
+@node C++ Interface
+@section #pragma interface and implementation
+
+@cindex interface and implementation headers, C++
+@cindex C++ interface and implementation headers
+@cindex pragmas, interface and implementation
+
+@code{#pragma interface} and @code{#pragma implementation} provide the
+user with a way of explicitly directing the compiler to emit entities
+with vague linkage (and debugging information) in a particular
+translation unit.
+
+@emph{Note:} As of GCC 2.7.2, these @code{#pragma}s are not useful in
+most cases, because of COMDAT support and the ``key method'' heuristic
+mentioned in @ref{Vague Linkage}.  Using them can actually cause your
+program to grow due to unnecessary out-of-line copies of inline
+functions.  Currently (3.4) the only benefit of these
+@code{#pragma}s is reduced duplication of debugging information, and
+that should be addressed soon on DWARF 2 targets with the use of
+COMDAT groups.
+
+@table @code
+@item #pragma interface
+@itemx #pragma interface "@var{subdir}/@var{objects}.h"
+@kindex #pragma interface
+Use this directive in @emph{header files} that define object classes, to save
+space in most of the object files that use those classes.  Normally,
+local copies of certain information (backup copies of inline member
+functions, debugging information, and the internal tables that implement
+virtual functions) must be kept in each object file that includes class
+definitions.  You can use this pragma to avoid such duplication.  When a
+header file containing @samp{#pragma interface} is included in a
+compilation, this auxiliary information will not be generated (unless
+the main input source file itself uses @samp{#pragma implementation}).
+Instead, the object files will contain references to be resolved at link
+time.
+
+The second form of this directive is useful for the case where you have
+multiple headers with the same name in different directories.  If you
+use this form, you must specify the same string to @samp{#pragma
+implementation}.
+
+@item #pragma implementation
+@itemx #pragma implementation "@var{objects}.h"
+@kindex #pragma implementation
+Use this pragma in a @emph{main input file}, when you want full output from
+included header files to be generated (and made globally visible).  The
+included header file, in turn, should use @samp{#pragma interface}.
+Backup copies of inline member functions, debugging information, and the
+internal tables used to implement virtual functions are all generated in
+implementation files.
+
+@cindex implied @code{#pragma implementation}
+@cindex @code{#pragma implementation}, implied
+@cindex naming convention, implementation headers
+If you use @samp{#pragma implementation} with no argument, it applies to
+an include file with the same basename@footnote{A file's @dfn{basename}
+was the name stripped of all leading path information and of trailing
+suffixes, such as @samp{.h} or @samp{.C} or @samp{.cc}.} as your source
+file.  For example, in @file{allclass.cc}, giving just
+@samp{#pragma implementation}
+by itself is equivalent to @samp{#pragma implementation "allclass.h"}.
+
+In versions of GNU C++ prior to 2.6.0 @file{allclass.h} was treated as
+an implementation file whenever you would include it from
+@file{allclass.cc} even if you never specified @samp{#pragma
+implementation}.  This was deemed to be more trouble than it was worth,
+however, and disabled.
+
+Use the string argument if you want a single implementation file to
+include code from multiple header files.  (You must also use
+@samp{#include} to include the header file; @samp{#pragma
+implementation} only specifies how to use the file---it doesn't actually
+include it.)
+
+There is no way to split up the contents of a single header file into
+multiple implementation files.
+@end table
+
+@cindex inlining and C++ pragmas
+@cindex C++ pragmas, effect on inlining
+@cindex pragmas in C++, effect on inlining
+@samp{#pragma implementation} and @samp{#pragma interface} also have an
+effect on function inlining.
+
+If you define a class in a header file marked with @samp{#pragma
+interface}, the effect on an inline function defined in that class is
+similar to an explicit @code{extern} declaration---the compiler emits
+no code at all to define an independent version of the function.  Its
+definition is used only for inlining with its callers.
+
+@opindex fno-implement-inlines
+Conversely, when you include the same header file in a main source file
+that declares it as @samp{#pragma implementation}, the compiler emits
+code for the function itself; this defines a version of the function
+that can be found via pointers (or by callers compiled without
+inlining).  If all calls to the function can be inlined, you can avoid
+emitting the function by compiling with @option{-fno-implement-inlines}.
+If any calls were not inlined, you will get linker errors.
+
+@node Template Instantiation
+@section Where's the Template?
+@cindex template instantiation
+
+C++ templates are the first language feature to require more
+intelligence from the environment than one usually finds on a UNIX
+system.  Somehow the compiler and linker have to make sure that each
+template instance occurs exactly once in the executable if it is needed,
+and not at all otherwise.  There are two basic approaches to this
+problem, which are referred to as the Borland model and the Cfront model.
+
+@table @asis
+@item Borland model
+Borland C++ solved the template instantiation problem by adding the code
+equivalent of common blocks to their linker; the compiler emits template
+instances in each translation unit that uses them, and the linker
+collapses them together.  The advantage of this model is that the linker
+only has to consider the object files themselves; there is no external
+complexity to worry about.  This disadvantage is that compilation time
+is increased because the template code is being compiled repeatedly.
+Code written for this model tends to include definitions of all
+templates in the header file, since they must be seen to be
+instantiated.
+
+@item Cfront model
+The AT&T C++ translator, Cfront, solved the template instantiation
+problem by creating the notion of a template repository, an
+automatically maintained place where template instances are stored.  A
+more modern version of the repository works as follows: As individual
+object files are built, the compiler places any template definitions and
+instantiations encountered in the repository.  At link time, the link
+wrapper adds in the objects in the repository and compiles any needed
+instances that were not previously emitted.  The advantages of this
+model are more optimal compilation speed and the ability to use the
+system linker; to implement the Borland model a compiler vendor also
+needs to replace the linker.  The disadvantages are vastly increased
+complexity, and thus potential for error; for some code this can be
+just as transparent, but in practice it can been very difficult to build
+multiple programs in one directory and one program in multiple
+directories.  Code written for this model tends to separate definitions
+of non-inline member templates into a separate file, which should be
+compiled separately.
+@end table
+
+When used with GNU ld version 2.8 or later on an ELF system such as
+GNU/Linux or Solaris 2, or on Microsoft Windows, G++ supports the
+Borland model.  On other systems, G++ implements neither automatic
+model.
+
+A future version of G++ will support a hybrid model whereby the compiler
+will emit any instantiations for which the template definition is
+included in the compile, and store template definitions and
+instantiation context information into the object file for the rest.
+The link wrapper will extract that information as necessary and invoke
+the compiler to produce the remaining instantiations.  The linker will
+then combine duplicate instantiations.
+
+In the mean time, you have the following options for dealing with
+template instantiations:
+
+@enumerate
+@item
+@opindex frepo
+Compile your template-using code with @option{-frepo}.  The compiler will
+generate files with the extension @samp{.rpo} listing all of the
+template instantiations used in the corresponding object files which
+could be instantiated there; the link wrapper, @samp{collect2}, will
+then update the @samp{.rpo} files to tell the compiler where to place
+those instantiations and rebuild any affected object files.  The
+link-time overhead is negligible after the first pass, as the compiler
+will continue to place the instantiations in the same files.
+
+This is your best option for application code written for the Borland
+model, as it will just work.  Code written for the Cfront model will
+need to be modified so that the template definitions are available at
+one or more points of instantiation; usually this is as simple as adding
+@code{#include <tmethods.cc>} to the end of each template header.
+
+For library code, if you want the library to provide all of the template
+instantiations it needs, just try to link all of its object files
+together; the link will fail, but cause the instantiations to be
+generated as a side effect.  Be warned, however, that this may cause
+conflicts if multiple libraries try to provide the same instantiations.
+For greater control, use explicit instantiation as described in the next
+option.
+
+@item
+@opindex fno-implicit-templates
+Compile your code with @option{-fno-implicit-templates} to disable the
+implicit generation of template instances, and explicitly instantiate
+all the ones you use.  This approach requires more knowledge of exactly
+which instances you need than do the others, but it's less
+mysterious and allows greater control.  You can scatter the explicit
+instantiations throughout your program, perhaps putting them in the
+translation units where the instances are used or the translation units
+that define the templates themselves; you can put all of the explicit
+instantiations you need into one big file; or you can create small files
+like
+
+@smallexample
+#include "Foo.h"
+#include "Foo.cc"
+
+template class Foo<int>;
+template ostream& operator <<
+                (ostream&, const Foo<int>&);
+@end smallexample
+
+for each of the instances you need, and create a template instantiation
+library from those.
+
+If you are using Cfront-model code, you can probably get away with not
+using @option{-fno-implicit-templates} when compiling files that don't
+@samp{#include} the member template definitions.
+
+If you use one big file to do the instantiations, you may want to
+compile it without @option{-fno-implicit-templates} so you get all of the
+instances required by your explicit instantiations (but not by any
+other files) without having to specify them as well.
+
+G++ has extended the template instantiation syntax given in the ISO
+standard to allow forward declaration of explicit instantiations
+(with @code{extern}), instantiation of the compiler support data for a
+template class (i.e.@: the vtable) without instantiating any of its
+members (with @code{inline}), and instantiation of only the static data
+members of a template class, without the support data or member
+functions (with (@code{static}):
+
+@smallexample
+extern template int max (int, int);
+inline template class Foo<int>;
+static template class Foo<int>;
+@end smallexample
+
+@item
+Do nothing.  Pretend G++ does implement automatic instantiation
+management.  Code written for the Borland model will work fine, but
+each translation unit will contain instances of each of the templates it
+uses.  In a large program, this can lead to an unacceptable amount of code
+duplication.
+@end enumerate
+
+@node Bound member functions
+@section Extracting the function pointer from a bound pointer to member function
+@cindex pmf
+@cindex pointer to member function
+@cindex bound pointer to member function
+
+In C++, pointer to member functions (PMFs) are implemented using a wide
+pointer of sorts to handle all the possible call mechanisms; the PMF
+needs to store information about how to adjust the @samp{this} pointer,
+and if the function pointed to is virtual, where to find the vtable, and
+where in the vtable to look for the member function.  If you are using
+PMFs in an inner loop, you should really reconsider that decision.  If
+that is not an option, you can extract the pointer to the function that
+would be called for a given object/PMF pair and call it directly inside
+the inner loop, to save a bit of time.
+
+Note that you will still be paying the penalty for the call through a
+function pointer; on most modern architectures, such a call defeats the
+branch prediction features of the CPU@.  This is also true of normal
+virtual function calls.
+
+The syntax for this extension is
+
+@smallexample
+extern A a;
+extern int (A::*fp)();
+typedef int (*fptr)(A *);
+
+fptr p = (fptr)(a.*fp);
+@end smallexample
+
+For PMF constants (i.e.@: expressions of the form @samp{&Klasse::Member}),
+no object is needed to obtain the address of the function.  They can be
+converted to function pointers directly:
+
+@smallexample
+fptr p1 = (fptr)(&A::foo);
+@end smallexample
+
+@opindex Wno-pmf-conversions
+You must specify @option{-Wno-pmf-conversions} to use this extension.
+
+@node C++ Attributes
+@section C++-Specific Variable, Function, and Type Attributes
+
+Some attributes only make sense for C++ programs.
+
+@table @code
+@item init_priority (@var{priority})
+@cindex @code{init_priority} attribute
+
+
+In Standard C++, objects defined at namespace scope are guaranteed to be
+initialized in an order in strict accordance with that of their definitions
+@emph{in a given translation unit}.  No guarantee is made for initializations
+across translation units.  However, GNU C++ allows users to control the
+order of initialization of objects defined at namespace scope with the
+@code{init_priority} attribute by specifying a relative @var{priority},
+a constant integral expression currently bounded between 101 and 65535
+inclusive.  Lower numbers indicate a higher priority.
+
+In the following example, @code{A} would normally be created before
+@code{B}, but the @code{init_priority} attribute has reversed that order:
+
+@smallexample
+Some_Class  A  __attribute__ ((init_priority (2000)));
+Some_Class  B  __attribute__ ((init_priority (543)));
+@end smallexample
+
+@noindent
+Note that the particular values of @var{priority} do not matter; only their
+relative ordering.
+
+@item java_interface
+@cindex @code{java_interface} attribute
+
+This type attribute informs C++ that the class is a Java interface.  It may
+only be applied to classes declared within an @code{extern "Java"} block.
+Calls to methods declared in this interface will be dispatched using GCJ's
+interface table mechanism, instead of regular virtual table dispatch.
+
+@end table
+
+See also @ref{Namespace Association}.
+
+@node Namespace Association
+@section Namespace Association
+
+@strong{Caution:} The semantics of this extension are not fully
+defined.  Users should refrain from using this extension as its
+semantics may change subtly over time.  It is possible that this
+extension will be removed in future versions of G++.
+
+A using-directive with @code{__attribute ((strong))} is stronger
+than a normal using-directive in two ways:
+
+@itemize @bullet
+@item
+Templates from the used namespace can be specialized and explicitly
+instantiated as though they were members of the using namespace.
+
+@item
+The using namespace is considered an associated namespace of all
+templates in the used namespace for purposes of argument-dependent
+name lookup.
+@end itemize
+
+The used namespace must be nested within the using namespace so that
+normal unqualified lookup works properly.
+
+This is useful for composing a namespace transparently from
+implementation namespaces.  For example:
+
+@smallexample
+namespace std @{
+  namespace debug @{
+    template <class T> struct A @{ @};
+  @}
+  using namespace debug __attribute ((__strong__));
+  template <> struct A<int> @{ @};   // @r{ok to specialize}
+
+  template <class T> void f (A<T>);
+@}
+
+int main()
+@{
+  f (std::A<float>());             // @r{lookup finds} std::f
+  f (std::A<int>());
+@}
+@end smallexample
+
+@node Type Traits
+@section Type Traits
+
+The C++ front-end implements syntactic extensions that allow to
+determine at compile time various characteristics of a type (or of a
+pair of types).
+
+@table @code
+@item __has_nothrow_assign (type)
+If @code{type} is const qualified or is a reference type then the trait is
+false.  Otherwise if @code{__has_trivial_assign (type)} is true then the trait
+is true, else if @code{type} is a cv class or union type with copy assignment
+operators that are known not to throw an exception then the trait is true,
+else it is false.  Requires: @code{type} shall be a complete type, 
+(possibly cv-qualified) @code{void}, or an array of unknown bound.
+
+@item __has_nothrow_copy (type)
+If @code{__has_trivial_copy (type)} is true then the trait is true, else if
+@code{type} is a cv class or union type with copy constructors that
+are known not to throw an exception then the trait is true, else it is false.
+Requires: @code{type} shall be a complete type, (possibly cv-qualified)
+@code{void}, or an array of unknown bound.
+
+@item __has_nothrow_constructor (type)
+If @code{__has_trivial_constructor (type)} is true then the trait is
+true, else if @code{type} is a cv class or union type (or array
+thereof) with a default constructor that is known not to throw an
+exception then the trait is true, else it is false.  Requires: 
+@code{type} shall be a complete type, (possibly cv-qualified) 
+@code{void}, or an array of unknown bound.
+
+@item __has_trivial_assign (type)
+If @code{type} is const qualified or is a reference type then the trait is
+false.  Otherwise if @code{__is_pod (type)} is true then the trait is
+true, else if @code{type} is a cv class or union type with a trivial
+copy assignment ([class.copy]) then the trait is true, else it is
+false.  Requires: @code{type} shall be a complete type, (possibly 
+cv-qualified) @code{void}, or an array of unknown bound.
+
+@item __has_trivial_copy (type)
+If @code{__is_pod (type)} is true or @code{type} is a reference type 
+then the trait is true, else if @code{type} is a cv class or union type
+with a trivial copy constructor ([class.copy]) then the trait
+is true, else it is false.  Requires: @code{type} shall be a complete
+type, (possibly cv-qualified) @code{void}, or an array of unknown bound.
+
+@item __has_trivial_constructor (type)
+If @code{__is_pod (type)} is true then the trait is true, else if
+@code{type} is a cv class or union type (or array thereof) with a
+trivial default constructor ([class.ctor]) then the trait is true,
+else it is false.  Requires: @code{type} shall be a complete
+type, (possibly cv-qualified) @code{void}, or an array of unknown bound.
+
+@item __has_trivial_destructor (type)
+If @code{__is_pod (type)} is true or @code{type} is a reference type then
+the trait is true, else if @code{type} is a cv class or union type (or
+array thereof) with a trivial destructor ([class.dtor]) then the trait
+is true, else it is false.  Requires: @code{type} shall be a complete
+type, (possibly cv-qualified) @code{void}, or an array of unknown bound.
+
+@item __has_virtual_destructor (type)
+If @code{type} is a class type with a virtual destructor
+([class.dtor]) then the trait is true, else it is false.  Requires:
+@code{type} shall be a complete type, (possibly cv-qualified)
+@code{void}, or an array of unknown bound.
+
+@item __is_abstract (type)
+If @code{type} is an abstract class ([class.abstract]) then the trait
+is true, else it is false.  Requires: @code{type} shall be a complete
+type, (possibly cv-qualified) @code{void}, or an array of unknown bound.
+
+@item __is_base_of (base_type, derived_type)
+If @code{base_type} is a base class of @code{derived_type}
+([class.derived]) then the trait is true, otherwise it is false.
+Top-level cv qualifications of @code{base_type} and
+@code{derived_type} are ignored.  For the purposes of this trait, a
+class type is considered is own base.  Requires: if @code{__is_class
+(base_type)} and @code{__is_class (derived_type)} are true and
+@code{base_type} and @code{derived_type} are not the same type
+(disregarding cv-qualifiers), @code{derived_type} shall be a complete
+type.  Diagnostic is produced if this requirement is not met.
+
+@item __is_class (type)
+If @code{type} is a cv class type, and not a union type
+([basic.compound]) the trait is true, else it is false.
+
+@item __is_empty (type)
+If @code{__is_class (type)} is false then the trait is false.
+Otherwise @code{type} is considered empty if and only if: @code{type}
+has no non-static data members, or all non-static data members, if
+any, are bit-fields of length 0, and @code{type} has no virtual
+members, and @code{type} has no virtual base classes, and @code{type}
+has no base classes @code{base_type} for which 
+@code{__is_empty (base_type)} is false.  Requires: @code{type} shall
+be a complete type, (possibly cv-qualified) @code{void}, or an array
+of unknown bound.
+
+@item __is_enum (type)
+If @code{type} is a cv enumeration type ([basic.compound]) the trait is
+true, else it is false.
+
+@item __is_literal_type (type)
+If @code{type} is a literal type ([basic.types]) the trait is
+true, else it is false.  Requires: @code{type} shall be a complete type,
+(possibly cv-qualified) @code{void}, or an array of unknown bound.
+
+@item __is_pod (type)
+If @code{type} is a cv POD type ([basic.types]) then the trait is true,
+else it is false.  Requires: @code{type} shall be a complete type,
+(possibly cv-qualified) @code{void}, or an array of unknown bound.
+
+@item __is_polymorphic (type)
+If @code{type} is a polymorphic class ([class.virtual]) then the trait
+is true, else it is false.  Requires: @code{type} shall be a complete
+type, (possibly cv-qualified) @code{void}, or an array of unknown bound.
+
+@item __is_standard_layout (type)
+If @code{type} is a standard-layout type ([basic.types]) the trait is
+true, else it is false.  Requires: @code{type} shall be a complete
+type, (possibly cv-qualified) @code{void}, or an array of unknown bound.
+
+@item __is_trivial (type)
+If @code{type} is a trivial type ([basic.types]) the trait is
+true, else it is false.  Requires: @code{type} shall be a complete
+type, (possibly cv-qualified) @code{void}, or an array of unknown bound.
+
+@item __is_union (type)
+If @code{type} is a cv union type ([basic.compound]) the trait is
+true, else it is false.
+
+@end table
+
+@node Java Exceptions
+@section Java Exceptions
+
+The Java language uses a slightly different exception handling model
+from C++.  Normally, GNU C++ will automatically detect when you are
+writing C++ code that uses Java exceptions, and handle them
+appropriately.  However, if C++ code only needs to execute destructors
+when Java exceptions are thrown through it, GCC will guess incorrectly.
+Sample problematic code is:
+
+@smallexample
+  struct S @{ ~S(); @};
+  extern void bar();    // @r{is written in Java, and may throw exceptions}
+  void foo()
+  @{
+    S s;
+    bar();
+  @}
+@end smallexample
+
+@noindent
+The usual effect of an incorrect guess is a link failure, complaining of
+a missing routine called @samp{__gxx_personality_v0}.
+
+You can inform the compiler that Java exceptions are to be used in a
+translation unit, irrespective of what it might think, by writing
+@samp{@w{#pragma GCC java_exceptions}} at the head of the file.  This
+@samp{#pragma} must appear before any functions that throw or catch
+exceptions, or run destructors when exceptions are thrown through them.
+
+You cannot mix Java and C++ exceptions in the same translation unit.  It
+is believed to be safe to throw a C++ exception from one file through
+another file compiled for the Java exception model, or vice versa, but
+there may be bugs in this area.
+
+@node Deprecated Features
+@section Deprecated Features
+
+In the past, the GNU C++ compiler was extended to experiment with new
+features, at a time when the C++ language was still evolving.  Now that
+the C++ standard is complete, some of those features are superseded by
+superior alternatives.  Using the old features might cause a warning in
+some cases that the feature will be dropped in the future.  In other
+cases, the feature might be gone already.
+
+While the list below is not exhaustive, it documents some of the options
+that are now deprecated:
+
+@table @code
+@item -fexternal-templates
+@itemx -falt-external-templates
+These are two of the many ways for G++ to implement template
+instantiation.  @xref{Template Instantiation}.  The C++ standard clearly
+defines how template definitions have to be organized across
+implementation units.  G++ has an implicit instantiation mechanism that
+should work just fine for standard-conforming code.
+
+@item -fstrict-prototype
+@itemx -fno-strict-prototype
+Previously it was possible to use an empty prototype parameter list to
+indicate an unspecified number of parameters (like C), rather than no
+parameters, as C++ demands.  This feature has been removed, except where
+it is required for backwards compatibility.   @xref{Backwards Compatibility}.
+@end table
+
+G++ allows a virtual function returning @samp{void *} to be overridden
+by one returning a different pointer type.  This extension to the
+covariant return type rules is now deprecated and will be removed from a
+future version.
+
+The G++ minimum and maximum operators (@samp{<?} and @samp{>?}) and
+their compound forms (@samp{<?=}) and @samp{>?=}) have been deprecated
+and are now removed from G++.  Code using these operators should be
+modified to use @code{std::min} and @code{std::max} instead.
+
+The named return value extension has been deprecated, and is now
+removed from G++.
+
+The use of initializer lists with new expressions has been deprecated,
+and is now removed from G++.
+
+Floating and complex non-type template parameters have been deprecated,
+and are now removed from G++.
+
+The implicit typename extension has been deprecated and is now
+removed from G++.
+
+The use of default arguments in function pointers, function typedefs
+and other places where they are not permitted by the standard is
+deprecated and will be removed from a future version of G++.
+
+G++ allows floating-point literals to appear in integral constant expressions,
+e.g. @samp{ enum E @{ e = int(2.2 * 3.7) @} }
+This extension is deprecated and will be removed from a future version.
+
+G++ allows static data members of const floating-point type to be declared
+with an initializer in a class definition. The standard only allows
+initializers for static members of const integral types and const
+enumeration types so this extension has been deprecated and will be removed
+from a future version.
+
+@node Backwards Compatibility
+@section Backwards Compatibility
+@cindex Backwards Compatibility
+@cindex ARM [Annotated C++ Reference Manual]
+
+Now that there is a definitive ISO standard C++, G++ has a specification
+to adhere to.  The C++ language evolved over time, and features that
+used to be acceptable in previous drafts of the standard, such as the ARM
+[Annotated C++ Reference Manual], are no longer accepted.  In order to allow
+compilation of C++ written to such drafts, G++ contains some backwards
+compatibilities.  @emph{All such backwards compatibility features are
+liable to disappear in future versions of G++.} They should be considered
+deprecated.   @xref{Deprecated Features}.
+
+@table @code
+@item For scope
+If a variable is declared at for scope, it used to remain in scope until
+the end of the scope which contained the for statement (rather than just
+within the for scope).  G++ retains this, but issues a warning, if such a
+variable is accessed outside the for scope.
+
+@item Implicit C language
+Old C system header files did not contain an @code{extern "C" @{@dots{}@}}
+scope to set the language.  On such systems, all header files are
+implicitly scoped inside a C language scope.  Also, an empty prototype
+@code{()} will be treated as an unspecified number of arguments, rather
+than no arguments, as C++ demands.
+@end table
diff --git a/gcc/doc/fragments.texi b/gcc/doc/fragments.texi
new file mode 100644
index 000000000..76f27925e
--- /dev/null
+++ b/gcc/doc/fragments.texi
@@ -0,0 +1,248 @@
+@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+@c 1999, 2000, 2001, 2003, 2004, 2005, 2008, 2012 Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Fragments
+@chapter Makefile Fragments
+@cindex makefile fragment
+
+When you configure GCC using the @file{configure} script, it will
+construct the file @file{Makefile} from the template file
+@file{Makefile.in}.  When it does this, it can incorporate makefile
+fragments from the @file{config} directory.  These are used to set
+Makefile parameters that are not amenable to being calculated by
+autoconf.  The list of fragments to incorporate is set by
+@file{config.gcc} (and occasionally @file{config.build}
+and @file{config.host}); @xref{System Config}.
+
+Fragments are named either @file{t-@var{target}} or @file{x-@var{host}},
+depending on whether they are relevant to configuring GCC to produce
+code for a particular target, or to configuring GCC to run on a
+particular host.  Here @var{target} and @var{host} are mnemonics
+which usually have some relationship to the canonical system name, but
+no formal connection.
+
+If these files do not exist, it means nothing needs to be added for a
+given target or host.  Most targets need a few @file{t-@var{target}}
+fragments, but needing @file{x-@var{host}} fragments is rare.
+
+@menu
+* Target Fragment:: Writing @file{t-@var{target}} files.
+* Host Fragment::   Writing @file{x-@var{host}} files.
+@end menu
+
+@node Target Fragment
+@section Target Makefile Fragments
+@cindex target makefile fragment
+@cindex @file{t-@var{target}}
+
+Target makefile fragments can set these Makefile variables.
+
+@table @code
+@findex LIBGCC2_CFLAGS
+@item LIBGCC2_CFLAGS
+Compiler flags to use when compiling @file{libgcc2.c}.
+
+@findex LIB2FUNCS_EXTRA
+@item LIB2FUNCS_EXTRA
+A list of source file names to be compiled or assembled and inserted
+into @file{libgcc.a}.
+
+@findex Floating Point Emulation
+@item Floating Point Emulation
+To have GCC include software floating point libraries in @file{libgcc.a}
+define @code{FPBIT} and @code{DPBIT} along with a few rules as follows:
+@smallexample
+# We want fine grained libraries, so use the new code
+# to build the floating point emulation libraries.
+FPBIT = fp-bit.c
+DPBIT = dp-bit.c
+
+
+fp-bit.c: $(srcdir)/config/fp-bit.c
+        echo '#define FLOAT' > fp-bit.c
+        cat $(srcdir)/config/fp-bit.c >> fp-bit.c
+
+dp-bit.c: $(srcdir)/config/fp-bit.c
+        cat $(srcdir)/config/fp-bit.c > dp-bit.c
+@end smallexample
+
+You may need to provide additional #defines at the beginning of @file{fp-bit.c}
+and @file{dp-bit.c} to control target endianness and other options.
+
+
+@findex CRTSTUFF_T_CFLAGS
+@item CRTSTUFF_T_CFLAGS
+Special flags used when compiling @file{crtstuff.c}.
+@xref{Initialization}.
+
+@findex CRTSTUFF_T_CFLAGS_S
+@item CRTSTUFF_T_CFLAGS_S
+Special flags used when compiling @file{crtstuff.c} for shared
+linking.  Used if you use @file{crtbeginS.o} and @file{crtendS.o}
+in @code{EXTRA-PARTS}.
+@xref{Initialization}.
+
+@findex MULTILIB_OPTIONS
+@item MULTILIB_OPTIONS
+For some targets, invoking GCC in different ways produces objects
+that can not be linked together.  For example, for some targets GCC
+produces both big and little endian code.  For these targets, you must
+arrange for multiple versions of @file{libgcc.a} to be compiled, one for
+each set of incompatible options.  When GCC invokes the linker, it
+arranges to link in the right version of @file{libgcc.a}, based on
+the command line options used.
+
+The @code{MULTILIB_OPTIONS} macro lists the set of options for which
+special versions of @file{libgcc.a} must be built.  Write options that
+are mutually incompatible side by side, separated by a slash.  Write
+options that may be used together separated by a space.  The build
+procedure will build all combinations of compatible options.
+
+For example, if you set @code{MULTILIB_OPTIONS} to @samp{m68000/m68020
+msoft-float}, @file{Makefile} will build special versions of
+@file{libgcc.a} using the following sets of options:  @option{-m68000},
+@option{-m68020}, @option{-msoft-float}, @samp{-m68000 -msoft-float}, and
+@samp{-m68020 -msoft-float}.
+
+@findex MULTILIB_DIRNAMES
+@item MULTILIB_DIRNAMES
+If @code{MULTILIB_OPTIONS} is used, this variable specifies the
+directory names that should be used to hold the various libraries.
+Write one element in @code{MULTILIB_DIRNAMES} for each element in
+@code{MULTILIB_OPTIONS}.  If @code{MULTILIB_DIRNAMES} is not used, the
+default value will be @code{MULTILIB_OPTIONS}, with all slashes treated
+as spaces.
+
+@code{MULTILIB_DIRNAMES} describes the multilib directories using GCC
+conventions and is applied to directories that are part of the GCC
+installation.  When multilib-enabled, the compiler will add a
+subdirectory of the form @var{prefix}/@var{multilib} before each
+directory in the search path for libraries and crt files.
+
+For example, if @code{MULTILIB_OPTIONS} is set to @samp{m68000/m68020
+msoft-float}, then the default value of @code{MULTILIB_DIRNAMES} is
+@samp{m68000 m68020 msoft-float}.  You may specify a different value if
+you desire a different set of directory names.
+
+@findex MULTILIB_MATCHES
+@item MULTILIB_MATCHES
+Sometimes the same option may be written in two different ways.  If an
+option is listed in @code{MULTILIB_OPTIONS}, GCC needs to know about
+any synonyms.  In that case, set @code{MULTILIB_MATCHES} to a list of
+items of the form @samp{option=option} to describe all relevant
+synonyms.  For example, @samp{m68000=mc68000 m68020=mc68020}.
+
+@findex MULTILIB_EXCEPTIONS
+@item MULTILIB_EXCEPTIONS
+Sometimes when there are multiple sets of @code{MULTILIB_OPTIONS} being
+specified, there are combinations that should not be built.  In that
+case, set @code{MULTILIB_EXCEPTIONS} to be all of the switch exceptions
+in shell case syntax that should not be built.
+
+For example the ARM processor cannot execute both hardware floating
+point instructions and the reduced size THUMB instructions at the same
+time, so there is no need to build libraries with both of these
+options enabled.  Therefore @code{MULTILIB_EXCEPTIONS} is set to:
+@smallexample
+*mthumb/*mhard-float*
+@end smallexample
+
+@findex MULTILIB_EXTRA_OPTS
+@item MULTILIB_EXTRA_OPTS
+Sometimes it is desirable that when building multiple versions of
+@file{libgcc.a} certain options should always be passed on to the
+compiler.  In that case, set @code{MULTILIB_EXTRA_OPTS} to be the list
+of options to be used for all builds.  If you set this, you should
+probably set @code{CRTSTUFF_T_CFLAGS} to a dash followed by it.
+
+@findex NATIVE_SYSTEM_HEADER_DIR
+@item NATIVE_SYSTEM_HEADER_DIR
+If the default location for system headers is not @file{/usr/include},
+you must set this to the directory containing the headers.  This value
+should match the value of the @code{SYSTEM_INCLUDE_DIR} macro.
+
+@findex MULTILIB_OSDIRNAMES
+@item MULTILIB_OSDIRNAMES
+If @code{MULTILIB_OPTIONS} is used, this variable specifies 
+a list of subdirectory names, that are used to modify the search
+path depending on the chosen multilib.  Unlike @code{MULTILIB_DIRNAMES},
+@code{MULTILIB_OSDIRNAMES} describes the multilib directories using
+operating systems conventions, and is applied to the directories such as
+@code{lib} or those in the @env{LIBRARY_PATH} environment variable.
+The format is either the same as of
+@code{MULTILIB_DIRNAMES}, or a set of mappings.  When it is the same
+as @code{MULTILIB_DIRNAMES}, it describes the multilib directories
+using operating system conventions, rather than GCC conventions.  When it is a set
+of mappings of the form @var{gccdir}=@var{osdir}, the left side gives
+the GCC convention and the right gives the equivalent OS defined
+location.  If the @var{osdir} part begins with a @samp{!},
+GCC will not search in the non-multilib directory and use
+exclusively the multilib directory.  Otherwise, the compiler will
+examine the search path for libraries and crt files twice; the first
+time it will add @var{multilib} to each directory in the search path,
+the second it will not.
+
+For configurations that support both multilib and multiarch,
+@code{MULTILIB_OSDIRNAMES} also encodes the multiarch name, thus
+subsuming @code{MULTIARCH_DIRNAME}.  The multiarch name is appended to
+each directory name, separated by a colon (e.g.
+@samp{../lib32:i386-linux-gnu}).
+
+Each multiarch subdirectory will be searched before the corresponding OS
+multilib directory, for example @samp{/lib/i386-linux-gnu} before
+@samp{/lib/../lib32}.  The multiarch name will also be used to modify the
+system header search path, as explained for @code{MULTIARCH_DIRNAME}.
+
+@findex MULTIARCH_DIRNAME
+@item MULTIARCH_DIRNAME
+This variable specifies the multiarch name for configurations that are
+multiarch-enabled but not multilibbed configurations.
+
+The multiarch name is used to augment the search path for libraries, crt
+files and system header files with additional locations.  The compiler
+will add a multiarch subdirectory of the form
+@var{prefix}/@var{multiarch} before each directory in the library and
+crt search path.  It will also add two directories
+@code{LOCAL_INCLUDE_DIR}/@var{multiarch} and
+@code{NATIVE_SYSTEM_HEADER_DIR}/@var{multiarch}) to the system header
+search path, respectively before @code{LOCAL_INCLUDE_DIR} and
+@code{NATIVE_SYSTEM_HEADER_DIR}.
+
+@code{MULTIARCH_DIRNAME} is not used for configurations that support
+both multilib and multiarch.  In that case, multiarch names are encoded
+in @code{MULTILIB_OSDIRNAMES} instead.
+
+More documentation about multiarch can be found at
+@uref{http://wiki.debian.org/Multiarch}.
+
+@findex SPECS
+@item SPECS
+Unfortunately, setting @code{MULTILIB_EXTRA_OPTS} is not enough, since
+it does not affect the build of target libraries, at least not the
+build of the default multilib.  One possible work-around is to use
+@code{DRIVER_SELF_SPECS} to bring options from the @file{specs} file
+as if they had been passed in the compiler driver command line.
+However, you don't want to be adding these options after the toolchain
+is installed, so you can instead tweak the @file{specs} file that will
+be used during the toolchain build, while you still install the
+original, built-in @file{specs}.  The trick is to set @code{SPECS} to
+some other filename (say @file{specs.install}), that will then be
+created out of the built-in specs, and introduce a @file{Makefile}
+rule to generate the @file{specs} file that's going to be used at
+build time out of your @file{specs.install}.
+
+@item T_CFLAGS
+These are extra flags to pass to the C compiler.  They are used both
+when building GCC, and when compiling things with the just-built GCC@.
+This variable is deprecated and should not be used.
+@end table
+
+@node Host Fragment
+@section Host Makefile Fragments
+@cindex host makefile fragment
+@cindex @file{x-@var{host}}
+
+The use of @file{x-@var{host}} fragments is discouraged.  You should only
+use it for makefile dependencies.
diff --git a/gcc/doc/frontends.texi b/gcc/doc/frontends.texi
new file mode 100644
index 000000000..6268c196e
--- /dev/null
+++ b/gcc/doc/frontends.texi
@@ -0,0 +1,63 @@
+@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+@c 1999, 2000, 2001, 2002, 2004, 2008, 2010 Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node G++ and GCC
+@chapter Programming Languages Supported by GCC
+
+@cindex GCC
+@cindex GNU Compiler Collection
+@cindex GNU C Compiler
+@cindex Ada
+@cindex Fortran
+@cindex Go
+@cindex Java
+@cindex Objective-C
+@cindex Objective-C++
+GCC stands for ``GNU Compiler Collection''.  GCC is an integrated
+distribution of compilers for several major programming languages.  These
+languages currently include C, C++, Objective-C, Objective-C++, Java,
+Fortran, Ada, and Go.
+
+The abbreviation @dfn{GCC} has multiple meanings in common use.  The
+current official meaning is ``GNU Compiler Collection'', which refers
+generically to the complete suite of tools.  The name historically stood
+for ``GNU C Compiler'', and this usage is still common when the emphasis
+is on compiling C programs.  Finally, the name is also used when speaking
+of the @dfn{language-independent} component of GCC: code shared among the
+compilers for all supported languages.
+
+The language-independent component of GCC includes the majority of the
+optimizers, as well as the ``back ends'' that generate machine code for
+various processors.
+
+@cindex COBOL
+@cindex Mercury
+@cindex Pascal
+The part of a compiler that is specific to a particular language is
+called the ``front end''.  In addition to the front ends that are
+integrated components of GCC, there are several other front ends that
+are maintained separately.  These support languages such as Pascal,
+Mercury, and COBOL@.  To use these, they must be built together with
+GCC proper.
+
+@cindex C++
+@cindex G++
+@cindex Ada
+@cindex GNAT
+Most of the compilers for languages other than C have their own names.
+The C++ compiler is G++, the Ada compiler is GNAT, and so on.  When we
+talk about compiling one of those languages, we might refer to that
+compiler by its own name, or as GCC@.  Either is correct.
+
+@cindex compiler compared to C++ preprocessor
+@cindex intermediate C version, nonexistent
+@cindex C intermediate output, nonexistent
+Historically, compilers for many languages, including C++ and Fortran,
+have been implemented as ``preprocessors'' which emit another high
+level language such as C@.  None of the compilers included in GCC are
+implemented this way; they all generate machine code directly.  This
+sort of preprocessor should not be confused with the @dfn{C
+preprocessor}, which is an integral feature of the C, C++, Objective-C
+and Objective-C++ languages.
diff --git a/gcc/doc/fsf-funding.7 b/gcc/doc/fsf-funding.7
new file mode 100644
index 000000000..1e3595d52
--- /dev/null
+++ b/gcc/doc/fsf-funding.7
@@ -0,0 +1,184 @@
+.\" Automatically generated by Pod::Man 2.25 (Pod::Simple 3.16)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  \*(C+ will
+.\" give a nicer C++.  Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available.  \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "FSF-FUNDING 7"
+.TH FSF-FUNDING 7 "2013-04-12" "gcc-4.6.4" "GNU"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+fsf\-funding \- Funding Free Software
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+.SS "Funding Free Software"
+.IX Subsection "Funding Free Software"
+If you want to have more free software a few years from now, it makes
+sense for you to help encourage people to contribute funds for its
+development.  The most effective approach known is to encourage
+commercial redistributors to donate.
+.PP
+Users of free software systems can boost the pace of development by
+encouraging for-a-fee distributors to donate part of their selling price
+to free software developers\-\-\-the Free Software Foundation, and others.
+.PP
+The way to convince distributors to do this is to demand it and expect
+it from them.  So when you compare distributors, judge them partly by
+how much they give to free software development.  Show distributors
+they must compete to be the one who gives the most.
+.PP
+To make this approach work, you must insist on numbers that you can
+compare, such as, \*(L"We will donate ten dollars to the Frobnitz project
+for each disk sold.\*(R"  Don't be satisfied with a vague promise, such as
+\&\*(L"A portion of the profits are donated,\*(R" since it doesn't give a basis
+for comparison.
+.PP
+Even a precise fraction \*(L"of the profits from this disk\*(R" is not very
+meaningful, since creative accounting and unrelated business decisions
+can greatly alter what fraction of the sales price counts as profit.
+If the price you pay is \f(CW$50\fR, ten percent of the profit is probably
+less than a dollar; it might be a few cents, or nothing at all.
+.PP
+Some redistributors do development work themselves.  This is useful too;
+but to keep everyone honest, you need to inquire how much they do, and
+what kind.  Some kinds of development make much more long-term
+difference than others.  For example, maintaining a separate version of
+a program contributes very little; maintaining the standard version of a
+program for the whole community contributes much.  Easy new ports
+contribute little, since someone else would surely do them; difficult
+ports such as adding a new \s-1CPU\s0 to the \s-1GNU\s0 Compiler Collection contribute more;
+major new features or packages contribute the most.
+.PP
+By establishing the idea that supporting further development is \*(L"the
+proper thing to do\*(R" when distributing free software for a fee, we can
+assure a steady flow of resources into making more free software.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7).
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1994 Free Software Foundation, Inc.
+Verbatim copying and redistribution of this section is permitted
+without royalty; alteration is not permitted.
diff --git a/gcc/doc/g++.1 b/gcc/doc/g++.1
new file mode 100644
index 000000000..37b7abdd4
--- /dev/null
+++ b/gcc/doc/g++.1
@@ -0,0 +1,17436 @@
+.\" Automatically generated by Pod::Man 2.25 (Pod::Simple 3.16)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  \*(C+ will
+.\" give a nicer C++.  Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available.  \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GCC 1"
+.TH GCC 1 "2013-04-12" "gcc-4.6.4" "GNU"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+gcc \- GNU project C and C++ compiler
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+gcc [\fB\-c\fR|\fB\-S\fR|\fB\-E\fR] [\fB\-std=\fR\fIstandard\fR]
+    [\fB\-g\fR] [\fB\-pg\fR] [\fB\-O\fR\fIlevel\fR]
+    [\fB\-W\fR\fIwarn\fR...] [\fB\-pedantic\fR]
+    [\fB\-I\fR\fIdir\fR...] [\fB\-L\fR\fIdir\fR...]
+    [\fB\-D\fR\fImacro\fR[=\fIdefn\fR]...] [\fB\-U\fR\fImacro\fR]
+    [\fB\-f\fR\fIoption\fR...] [\fB\-m\fR\fImachine-option\fR...]
+    [\fB\-o\fR \fIoutfile\fR] [@\fIfile\fR] \fIinfile\fR...
+.PP
+Only the most useful options are listed here; see below for the
+remainder.  \fBg++\fR accepts mostly the same options as \fBgcc\fR.
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+When you invoke \s-1GCC\s0, it normally does preprocessing, compilation,
+assembly and linking.  The \*(L"overall options\*(R" allow you to stop this
+process at an intermediate stage.  For example, the \fB\-c\fR option
+says not to run the linker.  Then the output consists of object files
+output by the assembler.
+.PP
+Other options are passed on to one stage of processing.  Some options
+control the preprocessor and others the compiler itself.  Yet other
+options control the assembler and linker; most of these are not
+documented here, since you rarely need to use any of them.
+.PP
+Most of the command line options that you can use with \s-1GCC\s0 are useful
+for C programs; when an option is only useful with another language
+(usually \*(C+), the explanation says so explicitly.  If the description
+for a particular option does not mention a source language, you can use
+that option with all supported languages.
+.PP
+The \fBgcc\fR program accepts options and file names as operands.  Many
+options have multi-letter names; therefore multiple single-letter options
+may \fInot\fR be grouped: \fB\-dv\fR is very different from \fB\-d\ \-v\fR.
+.PP
+You can mix options and other arguments.  For the most part, the order
+you use doesn't matter.  Order does matter when you use several
+options of the same kind; for example, if you specify \fB\-L\fR more
+than once, the directories are searched in the order specified.  Also,
+the placement of the \fB\-l\fR option is significant.
+.PP
+Many options have long names starting with \fB\-f\fR or with
+\&\fB\-W\fR\-\-\-for example,
+\&\fB\-fmove\-loop\-invariants\fR, \fB\-Wformat\fR and so on.  Most of
+these have both positive and negative forms; the negative form of
+\&\fB\-ffoo\fR would be \fB\-fno\-foo\fR.  This manual documents
+only one of these two forms, whichever one is not the default.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.SS "Option Summary"
+.IX Subsection "Option Summary"
+Here is a summary of all the options, grouped by type.  Explanations are
+in the following sections.
+.IP "\fIOverall Options\fR" 4
+.IX Item "Overall Options"
+\&\fB\-c  \-S  \-E  \-o\fR \fIfile\fR  \fB\-no\-canonical\-prefixes  
+\&\-pipe  \-pass\-exit\-codes  
+\&\-x\fR \fIlanguage\fR  \fB\-v  \-###  \-\-help\fR[\fB=\fR\fIclass\fR[\fB,...\fR]]  \fB\-\-target\-help  
+\&\-\-version \-wrapper @\fR\fIfile\fR \fB\-fplugin=\fR\fIfile\fR \fB\-fplugin\-arg\-\fR\fIname\fR\fB=\fR\fIarg\fR  
+\&\fB\-fdump\-ada\-spec\fR[\fB\-slim\fR] \fB\-fdump\-go\-spec=\fR\fIfile\fR
+.IP "\fIC Language Options\fR" 4
+.IX Item "C Language Options"
+\&\fB\-ansi  \-std=\fR\fIstandard\fR  \fB\-fgnu89\-inline 
+\&\-aux\-info\fR \fIfilename\fR 
+\&\fB\-fno\-asm  \-fno\-builtin  \-fno\-builtin\-\fR\fIfunction\fR 
+\&\fB\-fhosted  \-ffreestanding \-fopenmp \-fms\-extensions \-fplan9\-extensions 
+\&\-trigraphs  \-no\-integrated\-cpp  \-traditional  \-traditional\-cpp 
+\&\-fallow\-single\-precision  \-fcond\-mismatch \-flax\-vector\-conversions 
+\&\-fsigned\-bitfields  \-fsigned\-char 
+\&\-funsigned\-bitfields  \-funsigned\-char\fR
+.IP "\fI\*(C+ Language Options\fR" 4
+.IX Item " Language Options"
+\&\fB\-fabi\-version=\fR\fIn\fR  \fB\-fno\-access\-control  \-fcheck\-new 
+\&\-fconserve\-space  \-fconstexpr\-depth=\fR\fIn\fR  \fB\-ffriend\-injection 
+\&\-fno\-elide\-constructors 
+\&\-fno\-enforce\-eh\-specs 
+\&\-ffor\-scope  \-fno\-for\-scope  \-fno\-gnu\-keywords 
+\&\-fno\-implicit\-templates 
+\&\-fno\-implicit\-inline\-templates 
+\&\-fno\-implement\-inlines  \-fms\-extensions 
+\&\-fno\-nonansi\-builtins  \-fnothrow\-opt  \-fno\-operator\-names 
+\&\-fno\-optional\-diags  \-fpermissive 
+\&\-fno\-pretty\-templates 
+\&\-frepo  \-fno\-rtti  \-fstats  \-ftemplate\-depth=\fR\fIn\fR 
+\&\fB\-fno\-threadsafe\-statics \-fuse\-cxa\-atexit  \-fno\-weak  \-nostdinc++ 
+\&\-fno\-default\-inline  \-fvisibility\-inlines\-hidden 
+\&\-fvisibility\-ms\-compat 
+\&\-Wabi  \-Wconversion\-null  \-Wctor\-dtor\-privacy 
+\&\-Wnoexcept \-Wnon\-virtual\-dtor  \-Wreorder 
+\&\-Weffc++  \-Wstrict\-null\-sentinel 
+\&\-Wno\-non\-template\-friend  \-Wold\-style\-cast 
+\&\-Woverloaded\-virtual  \-Wno\-pmf\-conversions 
+\&\-Wsign\-promo\fR
+.IP "\fIObjective-C and Objective\-\*(C+ Language Options\fR" 4
+.IX Item "Objective-C and Objective- Language Options"
+\&\fB\-fconstant\-string\-class=\fR\fIclass-name\fR 
+\&\fB\-fgnu\-runtime  \-fnext\-runtime 
+\&\-fno\-nil\-receivers 
+\&\-fobjc\-abi\-version=\fR\fIn\fR 
+\&\fB\-fobjc\-call\-cxx\-cdtors 
+\&\-fobjc\-direct\-dispatch 
+\&\-fobjc\-exceptions 
+\&\-fobjc\-gc 
+\&\-fobjc\-nilcheck 
+\&\-fobjc\-std=objc1 
+\&\-freplace\-objc\-classes 
+\&\-fzero\-link 
+\&\-gen\-decls 
+\&\-Wassign\-intercept 
+\&\-Wno\-protocol  \-Wselector 
+\&\-Wstrict\-selector\-match 
+\&\-Wundeclared\-selector\fR
+.IP "\fILanguage Independent Options\fR" 4
+.IX Item "Language Independent Options"
+\&\fB\-fmessage\-length=\fR\fIn\fR  
+\&\fB\-fdiagnostics\-show\-location=\fR[\fBonce\fR|\fBevery-line\fR]  
+\&\fB\-fno\-diagnostics\-show\-option\fR
+.IP "\fIWarning Options\fR" 4
+.IX Item "Warning Options"
+\&\fB\-fsyntax\-only  \-fmax\-errors=\fR\fIn\fR  \fB\-pedantic 
+\&\-pedantic\-errors 
+\&\-w  \-Wextra  \-Wall  \-Waddress  \-Waggregate\-return  \-Warray\-bounds 
+\&\-Wno\-attributes \-Wno\-builtin\-macro\-redefined 
+\&\-Wc++\-compat \-Wc++0x\-compat \-Wcast\-align  \-Wcast\-qual  
+\&\-Wchar\-subscripts \-Wclobbered  \-Wcomment 
+\&\-Wconversion  \-Wcoverage\-mismatch  \-Wno\-cpp  \-Wno\-deprecated  
+\&\-Wno\-deprecated\-declarations \-Wdisabled\-optimization  
+\&\-Wno\-div\-by\-zero \-Wdouble\-promotion \-Wempty\-body  \-Wenum\-compare 
+\&\-Wno\-endif\-labels \-Werror  \-Werror=* 
+\&\-Wfatal\-errors  \-Wfloat\-equal  \-Wformat  \-Wformat=2 
+\&\-Wno\-format\-contains\-nul \-Wno\-format\-extra\-args \-Wformat\-nonliteral 
+\&\-Wformat\-security  \-Wformat\-y2k 
+\&\-Wframe\-larger\-than=\fR\fIlen\fR \fB\-Wjump\-misses\-init \-Wignored\-qualifiers 
+\&\-Wimplicit  \-Wimplicit\-function\-declaration  \-Wimplicit\-int 
+\&\-Winit\-self  \-Winline 
+\&\-Wno\-int\-to\-pointer\-cast \-Wno\-invalid\-offsetof 
+\&\-Winvalid\-pch \-Wlarger\-than=\fR\fIlen\fR  \fB\-Wunsafe\-loop\-optimizations 
+\&\-Wlogical\-op \-Wlong\-long 
+\&\-Wmain  \-Wmissing\-braces  \-Wmissing\-field\-initializers 
+\&\-Wmissing\-format\-attribute  \-Wmissing\-include\-dirs 
+\&\-Wno\-mudflap 
+\&\-Wno\-multichar  \-Wnonnull  \-Wno\-overflow 
+\&\-Woverlength\-strings  \-Wpacked  \-Wpacked\-bitfield\-compat  \-Wpadded 
+\&\-Wparentheses  \-Wpedantic\-ms\-format \-Wno\-pedantic\-ms\-format 
+\&\-Wpointer\-arith  \-Wno\-pointer\-to\-int\-cast 
+\&\-Wredundant\-decls 
+\&\-Wreturn\-type  \-Wsequence\-point  \-Wshadow 
+\&\-Wsign\-compare  \-Wsign\-conversion  \-Wstack\-protector 
+\&\-Wstrict\-aliasing \-Wstrict\-aliasing=n 
+\&\-Wstrict\-overflow \-Wstrict\-overflow=\fR\fIn\fR 
+\&\fB\-Wsuggest\-attribute=\fR[\fBpure\fR|\fBconst\fR|\fBnoreturn\fR] 
+\&\fB\-Wswitch  \-Wswitch\-default  \-Wswitch\-enum \-Wsync\-nand 
+\&\-Wsystem\-headers  \-Wtrampolines  \-Wtrigraphs  \-Wtype\-limits  \-Wundef 
+\&\-Wuninitialized  \-Wunknown\-pragmas  \-Wno\-pragmas 
+\&\-Wunsuffixed\-float\-constants  \-Wunused  \-Wunused\-function 
+\&\-Wunused\-label  \-Wunused\-parameter \-Wno\-unused\-result \-Wunused\-value 
+\&\-Wunused\-variable \-Wunused\-but\-set\-parameter \-Wunused\-but\-set\-variable 
+\&\-Wvariadic\-macros \-Wvla \-Wvolatile\-register\-var  \-Wwrite\-strings\fR
+.IP "\fIC and Objective-C-only Warning Options\fR" 4
+.IX Item "C and Objective-C-only Warning Options"
+\&\fB\-Wbad\-function\-cast  \-Wmissing\-declarations 
+\&\-Wmissing\-parameter\-type  \-Wmissing\-prototypes  \-Wnested\-externs 
+\&\-Wold\-style\-declaration  \-Wold\-style\-definition 
+\&\-Wstrict\-prototypes  \-Wtraditional  \-Wtraditional\-conversion 
+\&\-Wdeclaration\-after\-statement \-Wpointer\-sign\fR
+.IP "\fIDebugging Options\fR" 4
+.IX Item "Debugging Options"
+\&\fB\-d\fR\fIletters\fR  \fB\-dumpspecs  \-dumpmachine  \-dumpversion 
+\&\-fdbg\-cnt\-list \-fdbg\-cnt=\fR\fIcounter-value-list\fR 
+\&\fB\-fdump\-noaddr \-fdump\-unnumbered \-fdump\-unnumbered\-links 
+\&\-fdump\-translation\-unit\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-class\-hierarchy\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-ipa\-all \-fdump\-ipa\-cgraph \-fdump\-ipa\-inline 
+\&\-fdump\-statistics 
+\&\-fdump\-tree\-all 
+\&\-fdump\-tree\-original\fR[\fB\-\fR\fIn\fR]  
+\&\fB\-fdump\-tree\-optimized\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-cfg \-fdump\-tree\-vcg \-fdump\-tree\-alias 
+\&\-fdump\-tree\-ch 
+\&\-fdump\-tree\-ssa\fR[\fB\-\fR\fIn\fR] \fB\-fdump\-tree\-pre\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-ccp\fR[\fB\-\fR\fIn\fR] \fB\-fdump\-tree\-dce\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-gimple\fR[\fB\-raw\fR] \fB\-fdump\-tree\-mudflap\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-dom\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-dse\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-phiprop\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-phiopt\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-forwprop\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-copyrename\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-nrv \-fdump\-tree\-vect 
+\&\-fdump\-tree\-sink 
+\&\-fdump\-tree\-sra\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-forwprop\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-fre\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-vrp\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-ftree\-vectorizer\-verbose=\fR\fIn\fR 
+\&\fB\-fdump\-tree\-storeccp\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-final\-insns=\fR\fIfile\fR 
+\&\fB\-fcompare\-debug\fR[\fB=\fR\fIopts\fR]  \fB\-fcompare\-debug\-second 
+\&\-feliminate\-dwarf2\-dups \-feliminate\-unused\-debug\-types 
+\&\-feliminate\-unused\-debug\-symbols \-femit\-class\-debug\-always 
+\&\-fenable\-icf\-debug 
+\&\-fmem\-report \-fpre\-ipa\-mem\-report \-fpost\-ipa\-mem\-report \-fprofile\-arcs 
+\&\-frandom\-seed=\fR\fIstring\fR \fB\-fsched\-verbose=\fR\fIn\fR 
+\&\fB\-fsel\-sched\-verbose \-fsel\-sched\-dump\-cfg \-fsel\-sched\-pipelining\-verbose 
+\&\-fstack\-usage  \-ftest\-coverage  \-ftime\-report \-fvar\-tracking 
+\&\-fvar\-tracking\-assignments  \-fvar\-tracking\-assignments\-toggle 
+\&\-g  \-g\fR\fIlevel\fR  \fB\-gtoggle  \-gcoff  \-gdwarf\-\fR\fIversion\fR 
+\&\fB\-ggdb  \-gstabs  \-gstabs+  \-gstrict\-dwarf  \-gno\-strict\-dwarf 
+\&\-gvms  \-gxcoff  \-gxcoff+ 
+\&\-fno\-merge\-debug\-strings \-fno\-dwarf2\-cfi\-asm 
+\&\-fdebug\-prefix\-map=\fR\fIold\fR\fB=\fR\fInew\fR 
+\&\fB\-femit\-struct\-debug\-baseonly \-femit\-struct\-debug\-reduced 
+\&\-femit\-struct\-debug\-detailed\fR[\fB=\fR\fIspec-list\fR] 
+\&\fB\-p  \-pg  \-print\-file\-name=\fR\fIlibrary\fR  \fB\-print\-libgcc\-file\-name 
+\&\-print\-multi\-directory  \-print\-multi\-lib  \-print\-multi\-os\-directory 
+\&\-print\-prog\-name=\fR\fIprogram\fR  \fB\-print\-search\-dirs  \-Q 
+\&\-print\-sysroot \-print\-sysroot\-headers\-suffix 
+\&\-save\-temps \-save\-temps=cwd \-save\-temps=obj \-time\fR[\fB=\fR\fIfile\fR]
+.IP "\fIOptimization Options\fR" 4
+.IX Item "Optimization Options"
+\&\fB\-falign\-functions[=\fR\fIn\fR\fB] \-falign\-jumps[=\fR\fIn\fR\fB] 
+\&\-falign\-labels[=\fR\fIn\fR\fB] \-falign\-loops[=\fR\fIn\fR\fB] \-fassociative\-math 
+\&\-fauto\-inc\-dec \-fbranch\-probabilities \-fbranch\-target\-load\-optimize 
+\&\-fbranch\-target\-load\-optimize2 \-fbtr\-bb\-exclusive \-fcaller\-saves 
+\&\-fcheck\-data\-deps \-fcombine\-stack\-adjustments \-fconserve\-stack 
+\&\-fcompare\-elim \-fcprop\-registers \-fcrossjumping 
+\&\-fcse\-follow\-jumps \-fcse\-skip\-blocks \-fcx\-fortran\-rules 
+\&\-fcx\-limited\-range 
+\&\-fdata\-sections \-fdce \-fdce \-fdelayed\-branch 
+\&\-fdelete\-null\-pointer\-checks \-fdse \-fdevirtualize \-fdse 
+\&\-fearly\-inlining \-fipa\-sra \-fexpensive\-optimizations \-ffast\-math 
+\&\-ffinite\-math\-only \-ffloat\-store \-fexcess\-precision=\fR\fIstyle\fR 
+\&\fB\-fforward\-propagate \-ffp\-contract=\fR\fIstyle\fR \fB\-ffunction\-sections 
+\&\-fgcse \-fgcse\-after\-reload \-fgcse\-las \-fgcse\-lm \-fgraphite\-identity 
+\&\-fgcse\-sm \-fif\-conversion \-fif\-conversion2 \-findirect\-inlining 
+\&\-finline\-functions \-finline\-functions\-called\-once \-finline\-limit=\fR\fIn\fR 
+\&\fB\-finline\-small\-functions \-fipa\-cp \-fipa\-cp\-clone \-fipa\-matrix\-reorg 
+\&\-fipa\-pta \-fipa\-profile \-fipa\-pure\-const \-fipa\-reference 
+\&\-fipa\-struct\-reorg \-fira\-algorithm=\fR\fIalgorithm\fR 
+\&\fB\-fira\-region=\fR\fIregion\fR 
+\&\fB\-fira\-loop\-pressure \-fno\-ira\-share\-save\-slots 
+\&\-fno\-ira\-share\-spill\-slots \-fira\-verbose=\fR\fIn\fR 
+\&\fB\-fivopts \-fkeep\-inline\-functions \-fkeep\-static\-consts 
+\&\-floop\-block \-floop\-flatten \-floop\-interchange \-floop\-strip\-mine 
+\&\-floop\-parallelize\-all \-flto \-flto\-compression\-level
+\&\-flto\-partition=\fR\fIalg\fR \fB\-flto\-report \-fmerge\-all\-constants 
+\&\-fmerge\-constants \-fmodulo\-sched \-fmodulo\-sched\-allow\-regmoves 
+\&\-fmove\-loop\-invariants fmudflap \-fmudflapir \-fmudflapth \-fno\-branch\-count\-reg 
+\&\-fno\-default\-inline 
+\&\-fno\-defer\-pop \-fno\-function\-cse \-fno\-guess\-branch\-probability 
+\&\-fno\-inline \-fno\-math\-errno \-fno\-peephole \-fno\-peephole2 
+\&\-fno\-sched\-interblock \-fno\-sched\-spec \-fno\-signed\-zeros 
+\&\-fno\-toplevel\-reorder \-fno\-trapping\-math \-fno\-zero\-initialized\-in\-bss 
+\&\-fomit\-frame\-pointer \-foptimize\-register\-move \-foptimize\-sibling\-calls 
+\&\-fpartial\-inlining \-fpeel\-loops \-fpredictive\-commoning 
+\&\-fprefetch\-loop\-arrays 
+\&\-fprofile\-correction \-fprofile\-dir=\fR\fIpath\fR \fB\-fprofile\-generate 
+\&\-fprofile\-generate=\fR\fIpath\fR 
+\&\fB\-fprofile\-use \-fprofile\-use=\fR\fIpath\fR \fB\-fprofile\-values 
+\&\-freciprocal\-math \-fregmove \-frename\-registers \-freorder\-blocks 
+\&\-freorder\-blocks\-and\-partition \-freorder\-functions 
+\&\-frerun\-cse\-after\-loop \-freschedule\-modulo\-scheduled\-loops 
+\&\-frounding\-math \-fsched2\-use\-superblocks \-fsched\-pressure 
+\&\-fsched\-spec\-load \-fsched\-spec\-load\-dangerous 
+\&\-fsched\-stalled\-insns\-dep[=\fR\fIn\fR\fB] \-fsched\-stalled\-insns[=\fR\fIn\fR\fB] 
+\&\-fsched\-group\-heuristic \-fsched\-critical\-path\-heuristic 
+\&\-fsched\-spec\-insn\-heuristic \-fsched\-rank\-heuristic 
+\&\-fsched\-last\-insn\-heuristic \-fsched\-dep\-count\-heuristic 
+\&\-fschedule\-insns \-fschedule\-insns2 \-fsection\-anchors 
+\&\-fselective\-scheduling \-fselective\-scheduling2 
+\&\-fsel\-sched\-pipelining \-fsel\-sched\-pipelining\-outer\-loops 
+\&\-fsignaling\-nans \-fsingle\-precision\-constant \-fsplit\-ivs\-in\-unroller 
+\&\-fsplit\-wide\-types \-fstack\-protector \-fstack\-protector\-all 
+\&\-fstrict\-aliasing \-fstrict\-overflow \-fthread\-jumps \-ftracer 
+\&\-ftree\-bit\-ccp 
+\&\-ftree\-builtin\-call\-dce \-ftree\-ccp \-ftree\-ch \-ftree\-copy\-prop 
+\&\-ftree\-copyrename \-ftree\-dce \-ftree\-dominator\-opts \-ftree\-dse 
+\&\-ftree\-forwprop \-ftree\-fre \-ftree\-loop\-if\-convert 
+\&\-ftree\-loop\-if\-convert\-stores \-ftree\-loop\-im 
+\&\-ftree\-phiprop \-ftree\-loop\-distribution \-ftree\-loop\-distribute\-patterns 
+\&\-ftree\-loop\-ivcanon \-ftree\-loop\-linear \-ftree\-loop\-optimize 
+\&\-ftree\-parallelize\-loops=\fR\fIn\fR \fB\-ftree\-pre \-ftree\-pta \-ftree\-reassoc 
+\&\-ftree\-sink \-ftree\-sra \-ftree\-switch\-conversion 
+\&\-ftree\-ter \-ftree\-vect\-loop\-version \-ftree\-vectorize \-ftree\-vrp 
+\&\-funit\-at\-a\-time \-funroll\-all\-loops \-funroll\-loops 
+\&\-funsafe\-loop\-optimizations \-funsafe\-math\-optimizations \-funswitch\-loops 
+\&\-fvariable\-expansion\-in\-unroller \-fvect\-cost\-model \-fvpt \-fweb 
+\&\-fwhole\-program \-fwpa \-fuse\-linker\-plugin 
+\&\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR
+\&\fB\-O  \-O0  \-O1  \-O2  \-O3  \-Os \-Ofast\fR
+.IP "\fIPreprocessor Options\fR" 4
+.IX Item "Preprocessor Options"
+\&\fB\-A\fR\fIquestion\fR\fB=\fR\fIanswer\fR 
+\&\fB\-A\-\fR\fIquestion\fR[\fB=\fR\fIanswer\fR] 
+\&\fB\-C  \-dD  \-dI  \-dM  \-dN 
+\&\-D\fR\fImacro\fR[\fB=\fR\fIdefn\fR]  \fB\-E  \-H 
+\&\-idirafter\fR \fIdir\fR 
+\&\fB\-include\fR \fIfile\fR  \fB\-imacros\fR \fIfile\fR 
+\&\fB\-iprefix\fR \fIfile\fR  \fB\-iwithprefix\fR \fIdir\fR 
+\&\fB\-iwithprefixbefore\fR \fIdir\fR  \fB\-isystem\fR \fIdir\fR 
+\&\fB\-imultilib\fR \fIdir\fR \fB\-isysroot\fR \fIdir\fR 
+\&\fB\-M  \-MM  \-MF  \-MG  \-MP  \-MQ  \-MT  \-nostdinc  
+\&\-P  \-fworking\-directory  \-remap 
+\&\-trigraphs  \-undef  \-U\fR\fImacro\fR  \fB\-Wp,\fR\fIoption\fR 
+\&\fB\-Xpreprocessor\fR \fIoption\fR
+.IP "\fIAssembler Option\fR" 4
+.IX Item "Assembler Option"
+\&\fB\-Wa,\fR\fIoption\fR  \fB\-Xassembler\fR \fIoption\fR
+.IP "\fILinker Options\fR" 4
+.IX Item "Linker Options"
+\&\fIobject-file-name\fR  \fB\-l\fR\fIlibrary\fR 
+\&\fB\-nostartfiles  \-nodefaultlibs  \-nostdlib \-pie \-rdynamic 
+\&\-s  \-static  \-static\-libgcc  \-static\-libstdc++ \-shared  
+\&\-shared\-libgcc  \-symbolic 
+\&\-T\fR \fIscript\fR  \fB\-Wl,\fR\fIoption\fR  \fB\-Xlinker\fR \fIoption\fR 
+\&\fB\-u\fR \fIsymbol\fR
+.IP "\fIDirectory Options\fR" 4
+.IX Item "Directory Options"
+\&\fB\-B\fR\fIprefix\fR \fB\-I\fR\fIdir\fR \fB\-iplugindir=\fR\fIdir\fR
+\&\-iquote\fIdir\fR \-L\fIdir\fR \-specs=\fIfile\fR \-I\-
+\&\-\-sysroot=\fIdir\fR
+.IP "\fIMachine Dependent Options\fR" 4
+.IX Item "Machine Dependent Options"
+\&\fI\s-1ARC\s0 Options\fR
+\&\fB\-EB  \-EL 
+\&\-mmangle\-cpu  \-mcpu=\fR\fIcpu\fR  \fB\-mtext=\fR\fItext-section\fR 
+\&\fB\-mdata=\fR\fIdata-section\fR  \fB\-mrodata=\fR\fIreadonly-data-section\fR
+.Sp
+\&\fI\s-1ARM\s0 Options\fR
+\&\fB\-mapcs\-frame  \-mno\-apcs\-frame 
+\&\-mabi=\fR\fIname\fR 
+\&\fB\-mapcs\-stack\-check  \-mno\-apcs\-stack\-check 
+\&\-mapcs\-float  \-mno\-apcs\-float 
+\&\-mapcs\-reentrant  \-mno\-apcs\-reentrant 
+\&\-msched\-prolog  \-mno\-sched\-prolog 
+\&\-mlittle\-endian  \-mbig\-endian  \-mwords\-little\-endian 
+\&\-mfloat\-abi=\fR\fIname\fR  \fB\-msoft\-float  \-mhard\-float  \-mfpe 
+\&\-mfp16\-format=\fR\fIname\fR
+\&\fB\-mthumb\-interwork  \-mno\-thumb\-interwork 
+\&\-mcpu=\fR\fIname\fR  \fB\-march=\fR\fIname\fR  \fB\-mfpu=\fR\fIname\fR  
+\&\fB\-mstructure\-size\-boundary=\fR\fIn\fR 
+\&\fB\-mabort\-on\-noreturn 
+\&\-mlong\-calls  \-mno\-long\-calls 
+\&\-msingle\-pic\-base  \-mno\-single\-pic\-base 
+\&\-mpic\-register=\fR\fIreg\fR 
+\&\fB\-mnop\-fun\-dllimport 
+\&\-mcirrus\-fix\-invalid\-insns \-mno\-cirrus\-fix\-invalid\-insns 
+\&\-mpoke\-function\-name 
+\&\-mthumb  \-marm 
+\&\-mtpcs\-frame  \-mtpcs\-leaf\-frame 
+\&\-mcaller\-super\-interworking  \-mcallee\-super\-interworking 
+\&\-mtp=\fR\fIname\fR 
+\&\fB\-mword\-relocations 
+\&\-mfix\-cortex\-m3\-ldrd\fR
+.Sp
+\&\fI\s-1AVR\s0 Options\fR
+\&\fB\-mmcu=\fR\fImcu\fR  \fB\-mno\-interrupts 
+\&\-mcall\-prologues  \-mtiny\-stack  \-mint8\fR
+.Sp
+\&\fIBlackfin Options\fR
+\&\fB\-mcpu=\fR\fIcpu\fR[\fB\-\fR\fIsirevision\fR] 
+\&\fB\-msim \-momit\-leaf\-frame\-pointer  \-mno\-omit\-leaf\-frame\-pointer 
+\&\-mspecld\-anomaly  \-mno\-specld\-anomaly  \-mcsync\-anomaly  \-mno\-csync\-anomaly 
+\&\-mlow\-64k \-mno\-low64k  \-mstack\-check\-l1  \-mid\-shared\-library 
+\&\-mno\-id\-shared\-library  \-mshared\-library\-id=\fR\fIn\fR 
+\&\fB\-mleaf\-id\-shared\-library  \-mno\-leaf\-id\-shared\-library 
+\&\-msep\-data  \-mno\-sep\-data  \-mlong\-calls  \-mno\-long\-calls 
+\&\-mfast\-fp \-minline\-plt \-mmulticore  \-mcorea  \-mcoreb  \-msdram 
+\&\-micplb\fR
+.Sp
+\&\fI\s-1CRIS\s0 Options\fR
+\&\fB\-mcpu=\fR\fIcpu\fR  \fB\-march=\fR\fIcpu\fR  \fB\-mtune=\fR\fIcpu\fR 
+\&\fB\-mmax\-stack\-frame=\fR\fIn\fR  \fB\-melinux\-stacksize=\fR\fIn\fR 
+\&\fB\-metrax4  \-metrax100  \-mpdebug  \-mcc\-init  \-mno\-side\-effects 
+\&\-mstack\-align  \-mdata\-align  \-mconst\-align 
+\&\-m32\-bit  \-m16\-bit  \-m8\-bit  \-mno\-prologue\-epilogue  \-mno\-gotplt 
+\&\-melf  \-maout  \-melinux  \-mlinux  \-sim  \-sim2 
+\&\-mmul\-bug\-workaround  \-mno\-mul\-bug\-workaround\fR
+.Sp
+\&\fI\s-1CRX\s0 Options\fR
+\&\fB\-mmac \-mpush\-args\fR
+.Sp
+\&\fIDarwin Options\fR
+\&\fB\-all_load  \-allowable_client  \-arch  \-arch_errors_fatal 
+\&\-arch_only  \-bind_at_load  \-bundle  \-bundle_loader 
+\&\-client_name  \-compatibility_version  \-current_version 
+\&\-dead_strip 
+\&\-dependency\-file  \-dylib_file  \-dylinker_install_name 
+\&\-dynamic  \-dynamiclib  \-exported_symbols_list 
+\&\-filelist  \-flat_namespace  \-force_cpusubtype_ALL 
+\&\-force_flat_namespace  \-headerpad_max_install_names 
+\&\-iframework 
+\&\-image_base  \-init  \-install_name  \-keep_private_externs 
+\&\-multi_module  \-multiply_defined  \-multiply_defined_unused 
+\&\-noall_load   \-no_dead_strip_inits_and_terms 
+\&\-nofixprebinding \-nomultidefs  \-noprebind  \-noseglinkedit 
+\&\-pagezero_size  \-prebind  \-prebind_all_twolevel_modules 
+\&\-private_bundle  \-read_only_relocs  \-sectalign 
+\&\-sectobjectsymbols  \-whyload  \-seg1addr 
+\&\-sectcreate  \-sectobjectsymbols  \-sectorder 
+\&\-segaddr \-segs_read_only_addr \-segs_read_write_addr 
+\&\-seg_addr_table  \-seg_addr_table_filename  \-seglinkedit 
+\&\-segprot  \-segs_read_only_addr  \-segs_read_write_addr 
+\&\-single_module  \-static  \-sub_library  \-sub_umbrella 
+\&\-twolevel_namespace  \-umbrella  \-undefined 
+\&\-unexported_symbols_list  \-weak_reference_mismatches 
+\&\-whatsloaded \-F \-gused \-gfull \-mmacosx\-version\-min=\fR\fIversion\fR 
+\&\fB\-mkernel \-mone\-byte\-bool\fR
+.Sp
+\&\fI\s-1DEC\s0 Alpha Options\fR
+\&\fB\-mno\-fp\-regs  \-msoft\-float  \-malpha\-as  \-mgas 
+\&\-mieee  \-mieee\-with\-inexact  \-mieee\-conformant 
+\&\-mfp\-trap\-mode=\fR\fImode\fR  \fB\-mfp\-rounding\-mode=\fR\fImode\fR 
+\&\fB\-mtrap\-precision=\fR\fImode\fR  \fB\-mbuild\-constants 
+\&\-mcpu=\fR\fIcpu-type\fR  \fB\-mtune=\fR\fIcpu-type\fR 
+\&\fB\-mbwx  \-mmax  \-mfix  \-mcix 
+\&\-mfloat\-vax  \-mfloat\-ieee 
+\&\-mexplicit\-relocs  \-msmall\-data  \-mlarge\-data 
+\&\-msmall\-text  \-mlarge\-text 
+\&\-mmemory\-latency=\fR\fItime\fR
+.Sp
+\&\fI\s-1DEC\s0 Alpha/VMS Options\fR
+\&\fB\-mvms\-return\-codes \-mdebug\-main=\fR\fIprefix\fR \fB\-mmalloc64\fR
+.Sp
+\&\fI\s-1FR30\s0 Options\fR
+\&\fB\-msmall\-model \-mno\-lsim\fR
+.Sp
+\&\fI\s-1FRV\s0 Options\fR
+\&\fB\-mgpr\-32  \-mgpr\-64  \-mfpr\-32  \-mfpr\-64 
+\&\-mhard\-float  \-msoft\-float 
+\&\-malloc\-cc  \-mfixed\-cc  \-mdword  \-mno\-dword 
+\&\-mdouble  \-mno\-double 
+\&\-mmedia  \-mno\-media  \-mmuladd  \-mno\-muladd 
+\&\-mfdpic  \-minline\-plt \-mgprel\-ro  \-multilib\-library\-pic 
+\&\-mlinked\-fp  \-mlong\-calls  \-malign\-labels 
+\&\-mlibrary\-pic  \-macc\-4  \-macc\-8 
+\&\-mpack  \-mno\-pack  \-mno\-eflags  \-mcond\-move  \-mno\-cond\-move 
+\&\-moptimize\-membar \-mno\-optimize\-membar 
+\&\-mscc  \-mno\-scc  \-mcond\-exec  \-mno\-cond\-exec 
+\&\-mvliw\-branch  \-mno\-vliw\-branch 
+\&\-mmulti\-cond\-exec  \-mno\-multi\-cond\-exec  \-mnested\-cond\-exec 
+\&\-mno\-nested\-cond\-exec  \-mtomcat\-stats 
+\&\-mTLS \-mtls 
+\&\-mcpu=\fR\fIcpu\fR
+.Sp
+\&\fIGNU/Linux Options\fR
+\&\fB\-mglibc \-muclibc \-mbionic \-mandroid 
+\&\-tno\-android\-cc \-tno\-android\-ld\fR
+.Sp
+\&\fIH8/300 Options\fR
+\&\fB\-mrelax  \-mh  \-ms  \-mn  \-mint32  \-malign\-300\fR
+.Sp
+\&\fI\s-1HPPA\s0 Options\fR
+\&\fB\-march=\fR\fIarchitecture-type\fR 
+\&\fB\-mbig\-switch  \-mdisable\-fpregs  \-mdisable\-indexing 
+\&\-mfast\-indirect\-calls  \-mgas  \-mgnu\-ld   \-mhp\-ld 
+\&\-mfixed\-range=\fR\fIregister-range\fR 
+\&\fB\-mjump\-in\-delay \-mlinker\-opt \-mlong\-calls 
+\&\-mlong\-load\-store  \-mno\-big\-switch  \-mno\-disable\-fpregs 
+\&\-mno\-disable\-indexing  \-mno\-fast\-indirect\-calls  \-mno\-gas 
+\&\-mno\-jump\-in\-delay  \-mno\-long\-load\-store 
+\&\-mno\-portable\-runtime  \-mno\-soft\-float 
+\&\-mno\-space\-regs  \-msoft\-float  \-mpa\-risc\-1\-0 
+\&\-mpa\-risc\-1\-1  \-mpa\-risc\-2\-0  \-mportable\-runtime 
+\&\-mschedule=\fR\fIcpu-type\fR  \fB\-mspace\-regs  \-msio  \-mwsio 
+\&\-munix=\fR\fIunix-std\fR  \fB\-nolibdld  \-static  \-threads\fR
+.Sp
+\&\fIi386 and x86\-64 Options\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR  \fB\-march=\fR\fIcpu-type\fR 
+\&\fB\-mfpmath=\fR\fIunit\fR 
+\&\fB\-masm=\fR\fIdialect\fR  \fB\-mno\-fancy\-math\-387 
+\&\-mno\-fp\-ret\-in\-387  \-msoft\-float 
+\&\-mno\-wide\-multiply  \-mrtd  \-malign\-double 
+\&\-mpreferred\-stack\-boundary=\fR\fInum\fR
+\&\fB\-mincoming\-stack\-boundary=\fR\fInum\fR 
+\&\fB\-mcld \-mcx16 \-msahf \-mmovbe \-mcrc32 \-mrecip 
+\&\-mvzeroupper \-mprefer\-avx128 
+\&\-mmmx  \-msse  \-msse2 \-msse3 \-mssse3 \-msse4.1 \-msse4.2 \-msse4 \-mavx 
+\&\-maes \-mpclmul \-mfsgsbase \-mrdrnd \-mf16c \-mfused\-madd 
+\&\-msse4a \-m3dnow \-mpopcnt \-mabm \-mbmi \-mtbm \-mfma4 \-mxop \-mlwp 
+\&\-mthreads  \-mno\-align\-stringops  \-minline\-all\-stringops 
+\&\-minline\-stringops\-dynamically \-mstringop\-strategy=\fR\fIalg\fR 
+\&\fB\-mpush\-args  \-maccumulate\-outgoing\-args  \-m128bit\-long\-double 
+\&\-m96bit\-long\-double  \-mregparm=\fR\fInum\fR  \fB\-msseregparm 
+\&\-mveclibabi=\fR\fItype\fR \fB\-mvect8\-ret\-in\-mem 
+\&\-mpc32 \-mpc64 \-mpc80 \-mstackrealign 
+\&\-momit\-leaf\-frame\-pointer  \-mno\-red\-zone \-mno\-tls\-direct\-seg\-refs 
+\&\-mcmodel=\fR\fIcode-model\fR \fB\-mabi=\fR\fIname\fR 
+\&\fB\-m32  \-m64 \-mlarge\-data\-threshold=\fR\fInum\fR 
+\&\fB\-msse2avx \-mfentry \-m8bit\-idiv 
+\&\-mavx256\-split\-unaligned\-load \-mavx256\-split\-unaligned\-store\fR
+.Sp
+\&\fIi386 and x86\-64 Windows Options\fR
+\&\fB\-mconsole \-mcygwin \-mno\-cygwin \-mdll
+\&\-mnop\-fun\-dllimport \-mthread 
+\&\-municode \-mwin32 \-mwindows \-fno\-set\-stack\-executable\fR
+.Sp
+\&\fI\s-1IA\-64\s0 Options\fR
+\&\fB\-mbig\-endian  \-mlittle\-endian  \-mgnu\-as  \-mgnu\-ld  \-mno\-pic 
+\&\-mvolatile\-asm\-stop  \-mregister\-names  \-msdata \-mno\-sdata 
+\&\-mconstant\-gp  \-mauto\-pic  \-mfused\-madd 
+\&\-minline\-float\-divide\-min\-latency 
+\&\-minline\-float\-divide\-max\-throughput 
+\&\-mno\-inline\-float\-divide 
+\&\-minline\-int\-divide\-min\-latency 
+\&\-minline\-int\-divide\-max\-throughput  
+\&\-mno\-inline\-int\-divide 
+\&\-minline\-sqrt\-min\-latency \-minline\-sqrt\-max\-throughput 
+\&\-mno\-inline\-sqrt 
+\&\-mdwarf2\-asm \-mearly\-stop\-bits 
+\&\-mfixed\-range=\fR\fIregister-range\fR \fB\-mtls\-size=\fR\fItls-size\fR 
+\&\fB\-mtune=\fR\fIcpu-type\fR \fB\-milp32 \-mlp64 
+\&\-msched\-br\-data\-spec \-msched\-ar\-data\-spec \-msched\-control\-spec 
+\&\-msched\-br\-in\-data\-spec \-msched\-ar\-in\-data\-spec \-msched\-in\-control\-spec 
+\&\-msched\-spec\-ldc \-msched\-spec\-control\-ldc 
+\&\-msched\-prefer\-non\-data\-spec\-insns \-msched\-prefer\-non\-control\-spec\-insns 
+\&\-msched\-stop\-bits\-after\-every\-cycle \-msched\-count\-spec\-in\-critical\-path 
+\&\-msel\-sched\-dont\-check\-control\-spec \-msched\-fp\-mem\-deps\-zero\-cost 
+\&\-msched\-max\-memory\-insns\-hard\-limit \-msched\-max\-memory\-insns=\fR\fImax-insns\fR
+.Sp
+\&\fI\s-1IA\-64/VMS\s0 Options\fR
+\&\fB\-mvms\-return\-codes \-mdebug\-main=\fR\fIprefix\fR \fB\-mmalloc64\fR
+.Sp
+\&\fI\s-1LM32\s0 Options\fR
+\&\fB\-mbarrel\-shift\-enabled \-mdivide\-enabled \-mmultiply\-enabled 
+\&\-msign\-extend\-enabled \-muser\-enabled\fR
+.Sp
+\&\fIM32R/D Options\fR
+\&\fB\-m32r2 \-m32rx \-m32r 
+\&\-mdebug 
+\&\-malign\-loops \-mno\-align\-loops 
+\&\-missue\-rate=\fR\fInumber\fR 
+\&\fB\-mbranch\-cost=\fR\fInumber\fR 
+\&\fB\-mmodel=\fR\fIcode-size-model-type\fR 
+\&\fB\-msdata=\fR\fIsdata-type\fR 
+\&\fB\-mno\-flush\-func \-mflush\-func=\fR\fIname\fR 
+\&\fB\-mno\-flush\-trap \-mflush\-trap=\fR\fInumber\fR 
+\&\fB\-G\fR \fInum\fR
+.Sp
+\&\fIM32C Options\fR
+\&\fB\-mcpu=\fR\fIcpu\fR \fB\-msim \-memregs=\fR\fInumber\fR
+.Sp
+\&\fIM680x0 Options\fR
+\&\fB\-march=\fR\fIarch\fR  \fB\-mcpu=\fR\fIcpu\fR  \fB\-mtune=\fR\fItune\fR
+\&\fB\-m68000  \-m68020  \-m68020\-40  \-m68020\-60  \-m68030  \-m68040 
+\&\-m68060  \-mcpu32  \-m5200  \-m5206e  \-m528x  \-m5307  \-m5407 
+\&\-mcfv4e  \-mbitfield  \-mno\-bitfield  \-mc68000  \-mc68020 
+\&\-mnobitfield  \-mrtd  \-mno\-rtd  \-mdiv  \-mno\-div  \-mshort 
+\&\-mno\-short  \-mhard\-float  \-m68881  \-msoft\-float  \-mpcrel 
+\&\-malign\-int  \-mstrict\-align  \-msep\-data  \-mno\-sep\-data 
+\&\-mshared\-library\-id=n  \-mid\-shared\-library  \-mno\-id\-shared\-library 
+\&\-mxgot \-mno\-xgot\fR
+.Sp
+\&\fIM68hc1x Options\fR
+\&\fB\-m6811  \-m6812  \-m68hc11  \-m68hc12   \-m68hcs12 
+\&\-mauto\-incdec  \-minmax  \-mlong\-calls  \-mshort 
+\&\-msoft\-reg\-count=\fR\fIcount\fR
+.Sp
+\&\fIMCore Options\fR
+\&\fB\-mhardlit  \-mno\-hardlit  \-mdiv  \-mno\-div  \-mrelax\-immediates 
+\&\-mno\-relax\-immediates  \-mwide\-bitfields  \-mno\-wide\-bitfields 
+\&\-m4byte\-functions  \-mno\-4byte\-functions  \-mcallgraph\-data 
+\&\-mno\-callgraph\-data  \-mslow\-bytes  \-mno\-slow\-bytes  \-mno\-lsim 
+\&\-mlittle\-endian  \-mbig\-endian  \-m210  \-m340  \-mstack\-increment\fR
+.Sp
+\&\fIMeP Options\fR
+\&\fB\-mabsdiff \-mall\-opts \-maverage \-mbased=\fR\fIn\fR \fB\-mbitops 
+\&\-mc=\fR\fIn\fR \fB\-mclip \-mconfig=\fR\fIname\fR \fB\-mcop \-mcop32 \-mcop64 \-mivc2 
+\&\-mdc \-mdiv \-meb \-mel \-mio\-volatile \-ml \-mleadz \-mm \-mminmax 
+\&\-mmult \-mno\-opts \-mrepeat \-ms \-msatur \-msdram \-msim \-msimnovec \-mtf 
+\&\-mtiny=\fR\fIn\fR
+.Sp
+\&\fIMicroBlaze Options\fR
+\&\fB\-msoft\-float \-mhard\-float \-msmall\-divides \-mcpu=\fR\fIcpu\fR 
+\&\fB\-mmemcpy \-mxl\-soft\-mul \-mxl\-soft\-div \-mxl\-barrel\-shift 
+\&\-mxl\-pattern\-compare \-mxl\-stack\-check \-mxl\-gp\-opt \-mno\-clearbss 
+\&\-mxl\-multiply\-high \-mxl\-float\-convert \-mxl\-float\-sqrt 
+\&\-mxl\-mode\-\fR\fIapp-model\fR
+.Sp
+\&\fI\s-1MIPS\s0 Options\fR
+\&\fB\-EL  \-EB  \-march=\fR\fIarch\fR  \fB\-mtune=\fR\fIarch\fR 
+\&\fB\-mips1  \-mips2  \-mips3  \-mips4  \-mips32  \-mips32r2 
+\&\-mips64  \-mips64r2 
+\&\-mips16  \-mno\-mips16  \-mflip\-mips16 
+\&\-minterlink\-mips16  \-mno\-interlink\-mips16 
+\&\-mabi=\fR\fIabi\fR  \fB\-mabicalls  \-mno\-abicalls 
+\&\-mshared  \-mno\-shared  \-mplt  \-mno\-plt  \-mxgot  \-mno\-xgot 
+\&\-mgp32  \-mgp64  \-mfp32  \-mfp64  \-mhard\-float  \-msoft\-float 
+\&\-msingle\-float  \-mdouble\-float  \-mdsp  \-mno\-dsp  \-mdspr2  \-mno\-dspr2 
+\&\-mfpu=\fR\fIfpu-type\fR 
+\&\fB\-msmartmips  \-mno\-smartmips 
+\&\-mpaired\-single  \-mno\-paired\-single  \-mdmx  \-mno\-mdmx 
+\&\-mips3d  \-mno\-mips3d  \-mmt  \-mno\-mt  \-mllsc  \-mno\-llsc 
+\&\-mlong64  \-mlong32  \-msym32  \-mno\-sym32 
+\&\-G\fR\fInum\fR  \fB\-mlocal\-sdata  \-mno\-local\-sdata 
+\&\-mextern\-sdata  \-mno\-extern\-sdata  \-mgpopt  \-mno\-gopt 
+\&\-membedded\-data  \-mno\-embedded\-data 
+\&\-muninit\-const\-in\-rodata  \-mno\-uninit\-const\-in\-rodata 
+\&\-mcode\-readable=\fR\fIsetting\fR 
+\&\fB\-msplit\-addresses  \-mno\-split\-addresses 
+\&\-mexplicit\-relocs  \-mno\-explicit\-relocs 
+\&\-mcheck\-zero\-division  \-mno\-check\-zero\-division 
+\&\-mdivide\-traps  \-mdivide\-breaks 
+\&\-mmemcpy  \-mno\-memcpy  \-mlong\-calls  \-mno\-long\-calls 
+\&\-mmad  \-mno\-mad  \-mfused\-madd  \-mno\-fused\-madd  \-nocpp 
+\&\-mfix\-r4000  \-mno\-fix\-r4000  \-mfix\-r4400  \-mno\-fix\-r4400 
+\&\-mfix\-r10000 \-mno\-fix\-r10000  \-mfix\-vr4120  \-mno\-fix\-vr4120 
+\&\-mfix\-vr4130  \-mno\-fix\-vr4130  \-mfix\-sb1  \-mno\-fix\-sb1 
+\&\-mflush\-func=\fR\fIfunc\fR  \fB\-mno\-flush\-func 
+\&\-mbranch\-cost=\fR\fInum\fR  \fB\-mbranch\-likely  \-mno\-branch\-likely 
+\&\-mfp\-exceptions \-mno\-fp\-exceptions 
+\&\-mvr4130\-align \-mno\-vr4130\-align \-msynci \-mno\-synci 
+\&\-mrelax\-pic\-calls \-mno\-relax\-pic\-calls \-mmcount\-ra\-address\fR
+.Sp
+\&\fI\s-1MMIX\s0 Options\fR
+\&\fB\-mlibfuncs  \-mno\-libfuncs  \-mepsilon  \-mno\-epsilon  \-mabi=gnu 
+\&\-mabi=mmixware  \-mzero\-extend  \-mknuthdiv  \-mtoplevel\-symbols 
+\&\-melf  \-mbranch\-predict  \-mno\-branch\-predict  \-mbase\-addresses 
+\&\-mno\-base\-addresses  \-msingle\-exit  \-mno\-single\-exit\fR
+.Sp
+\&\fI\s-1MN10300\s0 Options\fR
+\&\fB\-mmult\-bug  \-mno\-mult\-bug 
+\&\-mno\-am33 \-mam33 \-mam33\-2 \-mam34 
+\&\-mtune=\fR\fIcpu-type\fR 
+\&\fB\-mreturn\-pointer\-on\-d0 
+\&\-mno\-crt0  \-mrelax \-mliw\fR
+.Sp
+\&\fI\s-1PDP\-11\s0 Options\fR
+\&\fB\-mfpu  \-msoft\-float  \-mac0  \-mno\-ac0  \-m40  \-m45  \-m10 
+\&\-mbcopy  \-mbcopy\-builtin  \-mint32  \-mno\-int16 
+\&\-mint16  \-mno\-int32  \-mfloat32  \-mno\-float64 
+\&\-mfloat64  \-mno\-float32  \-mabshi  \-mno\-abshi 
+\&\-mbranch\-expensive  \-mbranch\-cheap 
+\&\-munix\-asm  \-mdec\-asm\fR
+.Sp
+\&\fIpicoChip Options\fR
+\&\fB\-mae=\fR\fIae_type\fR \fB\-mvliw\-lookahead=\fR\fIN\fR 
+\&\fB\-msymbol\-as\-address \-mno\-inefficient\-warnings\fR
+.Sp
+\&\fIPowerPC Options\fR
+See \s-1RS/6000\s0 and PowerPC Options.
+.Sp
+\&\fI\s-1RS/6000\s0 and PowerPC Options\fR
+\&\fB\-mcpu=\fR\fIcpu-type\fR 
+\&\fB\-mtune=\fR\fIcpu-type\fR 
+\&\fB\-mcmodel=\fR\fIcode-model\fR 
+\&\fB\-mpower  \-mno\-power  \-mpower2  \-mno\-power2 
+\&\-mpowerpc  \-mpowerpc64  \-mno\-powerpc 
+\&\-maltivec  \-mno\-altivec 
+\&\-mpowerpc\-gpopt  \-mno\-powerpc\-gpopt 
+\&\-mpowerpc\-gfxopt  \-mno\-powerpc\-gfxopt 
+\&\-mmfcrf  \-mno\-mfcrf  \-mpopcntb  \-mno\-popcntb \-mpopcntd \-mno\-popcntd 
+\&\-mfprnd  \-mno\-fprnd 
+\&\-mcmpb \-mno\-cmpb \-mmfpgpr \-mno\-mfpgpr \-mhard\-dfp \-mno\-hard\-dfp 
+\&\-mnew\-mnemonics  \-mold\-mnemonics 
+\&\-mfull\-toc   \-mminimal\-toc  \-mno\-fp\-in\-toc  \-mno\-sum\-in\-toc 
+\&\-m64  \-m32  \-mxl\-compat  \-mno\-xl\-compat  \-mpe 
+\&\-malign\-power  \-malign\-natural 
+\&\-msoft\-float  \-mhard\-float  \-mmultiple  \-mno\-multiple 
+\&\-msingle\-float \-mdouble\-float \-msimple\-fpu 
+\&\-mstring  \-mno\-string  \-mupdate  \-mno\-update 
+\&\-mavoid\-indexed\-addresses  \-mno\-avoid\-indexed\-addresses 
+\&\-mfused\-madd  \-mno\-fused\-madd  \-mbit\-align  \-mno\-bit\-align 
+\&\-mstrict\-align  \-mno\-strict\-align  \-mrelocatable 
+\&\-mno\-relocatable  \-mrelocatable\-lib  \-mno\-relocatable\-lib 
+\&\-mtoc  \-mno\-toc  \-mlittle  \-mlittle\-endian  \-mbig  \-mbig\-endian 
+\&\-mdynamic\-no\-pic  \-maltivec \-mswdiv  \-msingle\-pic\-base 
+\&\-mprioritize\-restricted\-insns=\fR\fIpriority\fR 
+\&\fB\-msched\-costly\-dep=\fR\fIdependence_type\fR 
+\&\fB\-minsert\-sched\-nops=\fR\fIscheme\fR 
+\&\fB\-mcall\-sysv  \-mcall\-netbsd 
+\&\-maix\-struct\-return  \-msvr4\-struct\-return 
+\&\-mabi=\fR\fIabi-type\fR \fB\-msecure\-plt \-mbss\-plt 
+\&\-mblock\-move\-inline\-limit=\fR\fInum\fR 
+\&\fB\-misel \-mno\-isel 
+\&\-misel=yes  \-misel=no 
+\&\-mspe \-mno\-spe 
+\&\-mspe=yes  \-mspe=no 
+\&\-mpaired 
+\&\-mgen\-cell\-microcode \-mwarn\-cell\-microcode 
+\&\-mvrsave \-mno\-vrsave 
+\&\-mmulhw \-mno\-mulhw 
+\&\-mdlmzb \-mno\-dlmzb 
+\&\-mfloat\-gprs=yes  \-mfloat\-gprs=no \-mfloat\-gprs=single \-mfloat\-gprs=double 
+\&\-mprototype  \-mno\-prototype 
+\&\-msim  \-mmvme  \-mads  \-myellowknife  \-memb  \-msdata 
+\&\-msdata=\fR\fIopt\fR  \fB\-mvxworks  \-G\fR \fInum\fR  \fB\-pthread 
+\&\-mrecip \-mrecip=\fR\fIopt\fR \fB\-mno\-recip \-mrecip\-precision
+\&\-mno\-recip\-precision 
+\&\-mveclibabi=\fR\fItype\fR \fB\-mfriz \-mno\-friz\fR
+.Sp
+\&\fI\s-1RX\s0 Options\fR
+\&\fB\-m64bit\-doubles  \-m32bit\-doubles  \-fpu  \-nofpu
+\&\-mcpu=
+\&\-mbig\-endian\-data \-mlittle\-endian\-data 
+\&\-msmall\-data 
+\&\-msim  \-mno\-sim
+\&\-mas100\-syntax \-mno\-as100\-syntax
+\&\-mrelax
+\&\-mmax\-constant\-size=
+\&\-mint\-register=
+\&\-msave\-acc\-in\-interrupts\fR
+.Sp
+\&\fIS/390 and zSeries Options\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR  \fB\-march=\fR\fIcpu-type\fR 
+\&\fB\-mhard\-float  \-msoft\-float  \-mhard\-dfp \-mno\-hard\-dfp 
+\&\-mlong\-double\-64 \-mlong\-double\-128 
+\&\-mbackchain  \-mno\-backchain \-mpacked\-stack  \-mno\-packed\-stack 
+\&\-msmall\-exec  \-mno\-small\-exec  \-mmvcle \-mno\-mvcle 
+\&\-m64  \-m31  \-mdebug  \-mno\-debug  \-mesa  \-mzarch 
+\&\-mtpf\-trace \-mno\-tpf\-trace  \-mfused\-madd  \-mno\-fused\-madd 
+\&\-mwarn\-framesize  \-mwarn\-dynamicstack  \-mstack\-size \-mstack\-guard\fR
+.Sp
+\&\fIScore Options\fR
+\&\fB\-meb \-mel 
+\&\-mnhwloop 
+\&\-muls 
+\&\-mmac 
+\&\-mscore5 \-mscore5u \-mscore7 \-mscore7d\fR
+.Sp
+\&\fI\s-1SH\s0 Options\fR
+\&\fB\-m1  \-m2  \-m2e 
+\&\-m2a\-nofpu \-m2a\-single\-only \-m2a\-single \-m2a 
+\&\-m3  \-m3e 
+\&\-m4\-nofpu  \-m4\-single\-only  \-m4\-single  \-m4 
+\&\-m4a\-nofpu \-m4a\-single\-only \-m4a\-single \-m4a \-m4al 
+\&\-m5\-64media  \-m5\-64media\-nofpu 
+\&\-m5\-32media  \-m5\-32media\-nofpu 
+\&\-m5\-compact  \-m5\-compact\-nofpu 
+\&\-mb  \-ml  \-mdalign  \-mrelax 
+\&\-mbigtable \-mfmovd \-mhitachi \-mrenesas \-mno\-renesas \-mnomacsave 
+\&\-mieee \-mno\-ieee \-mbitops  \-misize  \-minline\-ic_invalidate \-mpadstruct 
+\&\-mspace \-mprefergot  \-musermode \-multcost=\fR\fInumber\fR \fB\-mdiv=\fR\fIstrategy\fR 
+\&\fB\-mdivsi3_libfunc=\fR\fIname\fR \fB\-mfixed\-range=\fR\fIregister-range\fR 
+\&\fB\-madjust\-unroll \-mindexed\-addressing \-mgettrcost=\fR\fInumber\fR \fB\-mpt\-fixed 
+\&\-maccumulate\-outgoing\-args \-minvalid\-symbols\fR
+.Sp
+\&\fISolaris 2 Options\fR
+\&\fB\-mimpure\-text  \-mno\-impure\-text 
+\&\-threads \-pthreads \-pthread\fR
+.Sp
+\&\fI\s-1SPARC\s0 Options\fR
+\&\fB\-mcpu=\fR\fIcpu-type\fR 
+\&\fB\-mtune=\fR\fIcpu-type\fR 
+\&\fB\-mcmodel=\fR\fIcode-model\fR 
+\&\fB\-m32  \-m64  \-mapp\-regs  \-mno\-app\-regs 
+\&\-mfaster\-structs  \-mno\-faster\-structs 
+\&\-mfpu  \-mno\-fpu  \-mhard\-float  \-msoft\-float 
+\&\-mhard\-quad\-float  \-msoft\-quad\-float 
+\&\-mlittle\-endian 
+\&\-mstack\-bias  \-mno\-stack\-bias 
+\&\-munaligned\-doubles  \-mno\-unaligned\-doubles 
+\&\-mv8plus  \-mno\-v8plus  \-mvis  \-mno\-vis 
+\&\-mfix\-at697f\fR
+.Sp
+\&\fI\s-1SPU\s0 Options\fR
+\&\fB\-mwarn\-reloc \-merror\-reloc 
+\&\-msafe\-dma \-munsafe\-dma 
+\&\-mbranch\-hints 
+\&\-msmall\-mem \-mlarge\-mem \-mstdmain 
+\&\-mfixed\-range=\fR\fIregister-range\fR 
+\&\fB\-mea32 \-mea64 
+\&\-maddress\-space\-conversion \-mno\-address\-space\-conversion 
+\&\-mcache\-size=\fR\fIcache-size\fR 
+\&\fB\-matomic\-updates \-mno\-atomic\-updates\fR
+.Sp
+\&\fISystem V Options\fR
+\&\fB\-Qy  \-Qn  \-YP,\fR\fIpaths\fR  \fB\-Ym,\fR\fIdir\fR
+.Sp
+\&\fIV850 Options\fR
+\&\fB\-mlong\-calls  \-mno\-long\-calls  \-mep  \-mno\-ep 
+\&\-mprolog\-function  \-mno\-prolog\-function  \-mspace 
+\&\-mtda=\fR\fIn\fR  \fB\-msda=\fR\fIn\fR  \fB\-mzda=\fR\fIn\fR 
+\&\fB\-mapp\-regs  \-mno\-app\-regs 
+\&\-mdisable\-callt  \-mno\-disable\-callt 
+\&\-mv850e2v3 
+\&\-mv850e2 
+\&\-mv850e1 \-mv850es 
+\&\-mv850e 
+\&\-mv850  \-mbig\-switch\fR
+.Sp
+\&\fI\s-1VAX\s0 Options\fR
+\&\fB\-mg  \-mgnu  \-munix\fR
+.Sp
+\&\fIVxWorks Options\fR
+\&\fB\-mrtp  \-non\-static  \-Bstatic  \-Bdynamic 
+\&\-Xbind\-lazy  \-Xbind\-now\fR
+.Sp
+\&\fIx86\-64 Options\fR
+See i386 and x86\-64 Options.
+.Sp
+\&\fIXstormy16 Options\fR
+\&\fB\-msim\fR
+.Sp
+\&\fIXtensa Options\fR
+\&\fB\-mconst16 \-mno\-const16 
+\&\-mfused\-madd  \-mno\-fused\-madd 
+\&\-mforce\-no\-pic 
+\&\-mserialize\-volatile  \-mno\-serialize\-volatile 
+\&\-mtext\-section\-literals  \-mno\-text\-section\-literals 
+\&\-mtarget\-align  \-mno\-target\-align 
+\&\-mlongcalls  \-mno\-longcalls\fR
+.Sp
+\&\fIzSeries Options\fR
+See S/390 and zSeries Options.
+.IP "\fICode Generation Options\fR" 4
+.IX Item "Code Generation Options"
+\&\fB\-fcall\-saved\-\fR\fIreg\fR  \fB\-fcall\-used\-\fR\fIreg\fR 
+\&\fB\-ffixed\-\fR\fIreg\fR  \fB\-fexceptions 
+\&\-fnon\-call\-exceptions  \-funwind\-tables 
+\&\-fasynchronous\-unwind\-tables 
+\&\-finhibit\-size\-directive  \-finstrument\-functions 
+\&\-finstrument\-functions\-exclude\-function\-list=\fR\fIsym\fR\fB,\fR\fIsym\fR\fB,... 
+\&\-finstrument\-functions\-exclude\-file\-list=\fR\fIfile\fR\fB,\fR\fIfile\fR\fB,... 
+\&\-fno\-common  \-fno\-ident 
+\&\-fpcc\-struct\-return  \-fpic  \-fPIC \-fpie \-fPIE 
+\&\-fno\-jump\-tables 
+\&\-frecord\-gcc\-switches 
+\&\-freg\-struct\-return  \-fshort\-enums 
+\&\-fshort\-double  \-fshort\-wchar 
+\&\-fverbose\-asm  \-fpack\-struct[=\fR\fIn\fR\fB]  \-fstack\-check 
+\&\-fstack\-limit\-register=\fR\fIreg\fR  \fB\-fstack\-limit\-symbol=\fR\fIsym\fR 
+\&\fB\-fno\-stack\-limit \-fsplit\-stack 
+\&\-fleading\-underscore  \-ftls\-model=\fR\fImodel\fR 
+\&\fB\-ftrapv  \-fwrapv  \-fbounds\-check 
+\&\-fvisibility \-fstrict\-volatile\-bitfields\fR
+.SS "Options Controlling the Kind of Output"
+.IX Subsection "Options Controlling the Kind of Output"
+Compilation can involve up to four stages: preprocessing, compilation
+proper, assembly and linking, always in that order.  \s-1GCC\s0 is capable of
+preprocessing and compiling several files either into several
+assembler input files, or into one assembler input file; then each
+assembler input file produces an object file, and linking combines all
+the object files (those newly compiled, and those specified as input)
+into an executable file.
+.PP
+For any given input file, the file name suffix determines what kind of
+compilation is done:
+.IP "\fIfile\fR\fB.c\fR" 4
+.IX Item "file.c"
+C source code which must be preprocessed.
+.IP "\fIfile\fR\fB.i\fR" 4
+.IX Item "file.i"
+C source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.ii\fR" 4
+.IX Item "file.ii"
+\&\*(C+ source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.m\fR" 4
+.IX Item "file.m"
+Objective-C source code.  Note that you must link with the \fIlibobjc\fR
+library to make an Objective-C program work.
+.IP "\fIfile\fR\fB.mi\fR" 4
+.IX Item "file.mi"
+Objective-C source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.mm\fR" 4
+.IX Item "file.mm"
+.PD 0
+.IP "\fIfile\fR\fB.M\fR" 4
+.IX Item "file.M"
+.PD
+Objective\-\*(C+ source code.  Note that you must link with the \fIlibobjc\fR
+library to make an Objective\-\*(C+ program work.  Note that \fB.M\fR refers
+to a literal capital M.
+.IP "\fIfile\fR\fB.mii\fR" 4
+.IX Item "file.mii"
+Objective\-\*(C+ source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.h\fR" 4
+.IX Item "file.h"
+C, \*(C+, Objective-C or Objective\-\*(C+ header file to be turned into a
+precompiled header (default), or C, \*(C+ header file to be turned into an
+Ada spec (via the \fB\-fdump\-ada\-spec\fR switch).
+.IP "\fIfile\fR\fB.cc\fR" 4
+.IX Item "file.cc"
+.PD 0
+.IP "\fIfile\fR\fB.cp\fR" 4
+.IX Item "file.cp"
+.IP "\fIfile\fR\fB.cxx\fR" 4
+.IX Item "file.cxx"
+.IP "\fIfile\fR\fB.cpp\fR" 4
+.IX Item "file.cpp"
+.IP "\fIfile\fR\fB.CPP\fR" 4
+.IX Item "file.CPP"
+.IP "\fIfile\fR\fB.c++\fR" 4
+.IX Item "file.c++"
+.IP "\fIfile\fR\fB.C\fR" 4
+.IX Item "file.C"
+.PD
+\&\*(C+ source code which must be preprocessed.  Note that in \fB.cxx\fR,
+the last two letters must both be literally \fBx\fR.  Likewise,
+\&\fB.C\fR refers to a literal capital C.
+.IP "\fIfile\fR\fB.mm\fR" 4
+.IX Item "file.mm"
+.PD 0
+.IP "\fIfile\fR\fB.M\fR" 4
+.IX Item "file.M"
+.PD
+Objective\-\*(C+ source code which must be preprocessed.
+.IP "\fIfile\fR\fB.mii\fR" 4
+.IX Item "file.mii"
+Objective\-\*(C+ source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.hh\fR" 4
+.IX Item "file.hh"
+.PD 0
+.IP "\fIfile\fR\fB.H\fR" 4
+.IX Item "file.H"
+.IP "\fIfile\fR\fB.hp\fR" 4
+.IX Item "file.hp"
+.IP "\fIfile\fR\fB.hxx\fR" 4
+.IX Item "file.hxx"
+.IP "\fIfile\fR\fB.hpp\fR" 4
+.IX Item "file.hpp"
+.IP "\fIfile\fR\fB.HPP\fR" 4
+.IX Item "file.HPP"
+.IP "\fIfile\fR\fB.h++\fR" 4
+.IX Item "file.h++"
+.IP "\fIfile\fR\fB.tcc\fR" 4
+.IX Item "file.tcc"
+.PD
+\&\*(C+ header file to be turned into a precompiled header or Ada spec.
+.IP "\fIfile\fR\fB.f\fR" 4
+.IX Item "file.f"
+.PD 0
+.IP "\fIfile\fR\fB.for\fR" 4
+.IX Item "file.for"
+.IP "\fIfile\fR\fB.ftn\fR" 4
+.IX Item "file.ftn"
+.PD
+Fixed form Fortran source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.F\fR" 4
+.IX Item "file.F"
+.PD 0
+.IP "\fIfile\fR\fB.FOR\fR" 4
+.IX Item "file.FOR"
+.IP "\fIfile\fR\fB.fpp\fR" 4
+.IX Item "file.fpp"
+.IP "\fIfile\fR\fB.FPP\fR" 4
+.IX Item "file.FPP"
+.IP "\fIfile\fR\fB.FTN\fR" 4
+.IX Item "file.FTN"
+.PD
+Fixed form Fortran source code which must be preprocessed (with the traditional
+preprocessor).
+.IP "\fIfile\fR\fB.f90\fR" 4
+.IX Item "file.f90"
+.PD 0
+.IP "\fIfile\fR\fB.f95\fR" 4
+.IX Item "file.f95"
+.IP "\fIfile\fR\fB.f03\fR" 4
+.IX Item "file.f03"
+.IP "\fIfile\fR\fB.f08\fR" 4
+.IX Item "file.f08"
+.PD
+Free form Fortran source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.F90\fR" 4
+.IX Item "file.F90"
+.PD 0
+.IP "\fIfile\fR\fB.F95\fR" 4
+.IX Item "file.F95"
+.IP "\fIfile\fR\fB.F03\fR" 4
+.IX Item "file.F03"
+.IP "\fIfile\fR\fB.F08\fR" 4
+.IX Item "file.F08"
+.PD
+Free form Fortran source code which must be preprocessed (with the
+traditional preprocessor).
+.IP "\fIfile\fR\fB.go\fR" 4
+.IX Item "file.go"
+Go source code.
+.IP "\fIfile\fR\fB.ads\fR" 4
+.IX Item "file.ads"
+Ada source code file which contains a library unit declaration (a
+declaration of a package, subprogram, or generic, or a generic
+instantiation), or a library unit renaming declaration (a package,
+generic, or subprogram renaming declaration).  Such files are also
+called \fIspecs\fR.
+.IP "\fIfile\fR\fB.adb\fR" 4
+.IX Item "file.adb"
+Ada source code file containing a library unit body (a subprogram or
+package body).  Such files are also called \fIbodies\fR.
+.IP "\fIfile\fR\fB.s\fR" 4
+.IX Item "file.s"
+Assembler code.
+.IP "\fIfile\fR\fB.S\fR" 4
+.IX Item "file.S"
+.PD 0
+.IP "\fIfile\fR\fB.sx\fR" 4
+.IX Item "file.sx"
+.PD
+Assembler code which must be preprocessed.
+.IP "\fIother\fR" 4
+.IX Item "other"
+An object file to be fed straight into linking.
+Any file name with no recognized suffix is treated this way.
+.PP
+You can specify the input language explicitly with the \fB\-x\fR option:
+.IP "\fB\-x\fR \fIlanguage\fR" 4
+.IX Item "-x language"
+Specify explicitly the \fIlanguage\fR for the following input files
+(rather than letting the compiler choose a default based on the file
+name suffix).  This option applies to all following input files until
+the next \fB\-x\fR option.  Possible values for \fIlanguage\fR are:
+.Sp
+.Vb 9
+\&        c  c\-header  cpp\-output
+\&        c++  c++\-header  c++\-cpp\-output
+\&        objective\-c  objective\-c\-header  objective\-c\-cpp\-output
+\&        objective\-c++ objective\-c++\-header objective\-c++\-cpp\-output
+\&        assembler  assembler\-with\-cpp
+\&        ada
+\&        f77  f77\-cpp\-input f95  f95\-cpp\-input
+\&        go
+\&        java
+.Ve
+.IP "\fB\-x none\fR" 4
+.IX Item "-x none"
+Turn off any specification of a language, so that subsequent files are
+handled according to their file name suffixes (as they are if \fB\-x\fR
+has not been used at all).
+.IP "\fB\-pass\-exit\-codes\fR" 4
+.IX Item "-pass-exit-codes"
+Normally the \fBgcc\fR program will exit with the code of 1 if any
+phase of the compiler returns a non-success return code.  If you specify
+\&\fB\-pass\-exit\-codes\fR, the \fBgcc\fR program will instead return with
+numerically highest error produced by any phase that returned an error
+indication.  The C, \*(C+, and Fortran frontends return 4, if an internal
+compiler error is encountered.
+.PP
+If you only want some of the stages of compilation, you can use
+\&\fB\-x\fR (or filename suffixes) to tell \fBgcc\fR where to start, and
+one of the options \fB\-c\fR, \fB\-S\fR, or \fB\-E\fR to say where
+\&\fBgcc\fR is to stop.  Note that some combinations (for example,
+\&\fB\-x cpp-output \-E\fR) instruct \fBgcc\fR to do nothing at all.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+Compile or assemble the source files, but do not link.  The linking
+stage simply is not done.  The ultimate output is in the form of an
+object file for each source file.
+.Sp
+By default, the object file name for a source file is made by replacing
+the suffix \fB.c\fR, \fB.i\fR, \fB.s\fR, etc., with \fB.o\fR.
+.Sp
+Unrecognized input files, not requiring compilation or assembly, are
+ignored.
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+Stop after the stage of compilation proper; do not assemble.  The output
+is in the form of an assembler code file for each non-assembler input
+file specified.
+.Sp
+By default, the assembler file name for a source file is made by
+replacing the suffix \fB.c\fR, \fB.i\fR, etc., with \fB.s\fR.
+.Sp
+Input files that don't require compilation are ignored.
+.IP "\fB\-E\fR" 4
+.IX Item "-E"
+Stop after the preprocessing stage; do not run the compiler proper.  The
+output is in the form of preprocessed source code, which is sent to the
+standard output.
+.Sp
+Input files which don't require preprocessing are ignored.
+.IP "\fB\-o\fR \fIfile\fR" 4
+.IX Item "-o file"
+Place output in file \fIfile\fR.  This applies regardless to whatever
+sort of output is being produced, whether it be an executable file,
+an object file, an assembler file or preprocessed C code.
+.Sp
+If \fB\-o\fR is not specified, the default is to put an executable
+file in \fIa.out\fR, the object file for
+\&\fI\fIsource\fI.\fIsuffix\fI\fR in \fI\fIsource\fI.o\fR, its
+assembler file in \fI\fIsource\fI.s\fR, a precompiled header file in
+\&\fI\fIsource\fI.\fIsuffix\fI.gch\fR, and all preprocessed C source on
+standard output.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+Print (on standard error output) the commands executed to run the stages
+of compilation.  Also print the version number of the compiler driver
+program and of the preprocessor and the compiler proper.
+.IP "\fB\-###\fR" 4
+.IX Item "-###"
+Like \fB\-v\fR except the commands are not executed and arguments
+are quoted unless they contain only alphanumeric characters or \f(CW\*(C`./\-_\*(C'\fR.
+This is useful for shell scripts to capture the driver-generated command lines.
+.IP "\fB\-pipe\fR" 4
+.IX Item "-pipe"
+Use pipes rather than temporary files for communication between the
+various stages of compilation.  This fails to work on some systems where
+the assembler is unable to read from a pipe; but the \s-1GNU\s0 assembler has
+no trouble.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Print (on the standard output) a description of the command line options
+understood by \fBgcc\fR.  If the \fB\-v\fR option is also specified
+then \fB\-\-help\fR will also be passed on to the various processes
+invoked by \fBgcc\fR, so that they can display the command line options
+they accept.  If the \fB\-Wextra\fR option has also been specified
+(prior to the \fB\-\-help\fR option), then command line options which
+have no documentation associated with them will also be displayed.
+.IP "\fB\-\-target\-help\fR" 4
+.IX Item "--target-help"
+Print (on the standard output) a description of target-specific command
+line options for each tool.  For some targets extra target-specific
+information may also be printed.
+.IP "\fB\-\-help={\fR\fIclass\fR|[\fB^\fR]\fIqualifier\fR\fB}\fR[\fB,...\fR]" 4
+.IX Item "--help={class|[^]qualifier}[,...]"
+Print (on the standard output) a description of the command line
+options understood by the compiler that fit into all specified classes
+and qualifiers.  These are the supported classes:
+.RS 4
+.IP "\fBoptimizers\fR" 4
+.IX Item "optimizers"
+This will display all of the optimization options supported by the
+compiler.
+.IP "\fBwarnings\fR" 4
+.IX Item "warnings"
+This will display all of the options controlling warning messages
+produced by the compiler.
+.IP "\fBtarget\fR" 4
+.IX Item "target"
+This will display target-specific options.  Unlike the
+\&\fB\-\-target\-help\fR option however, target-specific options of the
+linker and assembler will not be displayed.  This is because those
+tools do not currently support the extended \fB\-\-help=\fR syntax.
+.IP "\fBparams\fR" 4
+.IX Item "params"
+This will display the values recognized by the \fB\-\-param\fR
+option.
+.IP "\fIlanguage\fR" 4
+.IX Item "language"
+This will display the options supported for \fIlanguage\fR, where
+\&\fIlanguage\fR is the name of one of the languages supported in this
+version of \s-1GCC\s0.
+.IP "\fBcommon\fR" 4
+.IX Item "common"
+This will display the options that are common to all languages.
+.RE
+.RS 4
+.Sp
+These are the supported qualifiers:
+.IP "\fBundocumented\fR" 4
+.IX Item "undocumented"
+Display only those options which are undocumented.
+.IP "\fBjoined\fR" 4
+.IX Item "joined"
+Display options which take an argument that appears after an equal
+sign in the same continuous piece of text, such as:
+\&\fB\-\-help=target\fR.
+.IP "\fBseparate\fR" 4
+.IX Item "separate"
+Display options which take an argument that appears as a separate word
+following the original option, such as: \fB\-o output-file\fR.
+.RE
+.RS 4
+.Sp
+Thus for example to display all the undocumented target-specific
+switches supported by the compiler the following can be used:
+.Sp
+.Vb 1
+\&        \-\-help=target,undocumented
+.Ve
+.Sp
+The sense of a qualifier can be inverted by prefixing it with the
+\&\fB^\fR character, so for example to display all binary warning
+options (i.e., ones that are either on or off and that do not take an
+argument), which have a description the following can be used:
+.Sp
+.Vb 1
+\&        \-\-help=warnings,^joined,^undocumented
+.Ve
+.Sp
+The argument to \fB\-\-help=\fR should not consist solely of inverted
+qualifiers.
+.Sp
+Combining several classes is possible, although this usually
+restricts the output by so much that there is nothing to display.  One
+case where it does work however is when one of the classes is
+\&\fItarget\fR.  So for example to display all the target-specific
+optimization options the following can be used:
+.Sp
+.Vb 1
+\&        \-\-help=target,optimizers
+.Ve
+.Sp
+The \fB\-\-help=\fR option can be repeated on the command line.  Each
+successive use will display its requested class of options, skipping
+those that have already been displayed.
+.Sp
+If the \fB\-Q\fR option appears on the command line before the
+\&\fB\-\-help=\fR option, then the descriptive text displayed by
+\&\fB\-\-help=\fR is changed.  Instead of describing the displayed
+options, an indication is given as to whether the option is enabled,
+disabled or set to a specific value (assuming that the compiler
+knows this at the point where the \fB\-\-help=\fR option is used).
+.Sp
+Here is a truncated example from the \s-1ARM\s0 port of \fBgcc\fR:
+.Sp
+.Vb 5
+\&          % gcc \-Q \-mabi=2 \-\-help=target \-c
+\&          The following options are target specific:
+\&          \-mabi=                                2
+\&          \-mabort\-on\-noreturn                   [disabled]
+\&          \-mapcs                                [disabled]
+.Ve
+.Sp
+The output is sensitive to the effects of previous command line
+options, so for example it is possible to find out which optimizations
+are enabled at \fB\-O2\fR by using:
+.Sp
+.Vb 1
+\&        \-Q \-O2 \-\-help=optimizers
+.Ve
+.Sp
+Alternatively you can discover which binary optimizations are enabled
+by \fB\-O3\fR by using:
+.Sp
+.Vb 3
+\&        gcc \-c \-Q \-O3 \-\-help=optimizers > /tmp/O3\-opts
+\&        gcc \-c \-Q \-O2 \-\-help=optimizers > /tmp/O2\-opts
+\&        diff /tmp/O2\-opts /tmp/O3\-opts | grep enabled
+.Ve
+.RE
+.IP "\fB\-no\-canonical\-prefixes\fR" 4
+.IX Item "-no-canonical-prefixes"
+Do not expand any symbolic links, resolve references to \fB/../\fR
+or \fB/./\fR, or make the path absolute when generating a relative
+prefix.
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+Display the version number and copyrights of the invoked \s-1GCC\s0.
+.IP "\fB\-wrapper\fR" 4
+.IX Item "-wrapper"
+Invoke all subcommands under a wrapper program.  The name of the
+wrapper program and its parameters are passed as a comma separated
+list.
+.Sp
+.Vb 1
+\&        gcc \-c t.c \-wrapper gdb,\-\-args
+.Ve
+.Sp
+This will invoke all subprograms of \fBgcc\fR under
+\&\fBgdb \-\-args\fR, thus the invocation of \fBcc1\fR will be
+\&\fBgdb \-\-args cc1 ...\fR.
+.IP "\fB\-fplugin=\fR\fIname\fR\fB.so\fR" 4
+.IX Item "-fplugin=name.so"
+Load the plugin code in file \fIname\fR.so, assumed to be a
+shared object to be dlopen'd by the compiler.  The base name of
+the shared object file is used to identify the plugin for the
+purposes of argument parsing (See
+\&\fB\-fplugin\-arg\-\fR\fIname\fR\fB\-\fR\fIkey\fR\fB=\fR\fIvalue\fR below).
+Each plugin should define the callback functions specified in the
+Plugins \s-1API\s0.
+.IP "\fB\-fplugin\-arg\-\fR\fIname\fR\fB\-\fR\fIkey\fR\fB=\fR\fIvalue\fR" 4
+.IX Item "-fplugin-arg-name-key=value"
+Define an argument called \fIkey\fR with a value of \fIvalue\fR
+for the plugin called \fIname\fR.
+.IP "\fB\-fdump\-ada\-spec\fR[\fB\-slim\fR]" 4
+.IX Item "-fdump-ada-spec[-slim]"
+For C and \*(C+ source and include files, generate corresponding Ada
+specs.
+.IP "\fB\-fdump\-go\-spec=\fR\fIfile\fR" 4
+.IX Item "-fdump-go-spec=file"
+For input files in any language, generate corresponding Go
+declarations in \fIfile\fR.  This generates Go \f(CW\*(C`const\*(C'\fR,
+\&\f(CW\*(C`type\*(C'\fR, \f(CW\*(C`var\*(C'\fR, and \f(CW\*(C`func\*(C'\fR declarations which may be a
+useful way to start writing a Go interface to code written in some
+other language.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR.  The options read are
+inserted in place of the original @\fIfile\fR option.  If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace.  A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes.  Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash.  The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SS "Compiling \*(C+ Programs"
+.IX Subsection "Compiling  Programs"
+\&\*(C+ source files conventionally use one of the suffixes \fB.C\fR,
+\&\fB.cc\fR, \fB.cpp\fR, \fB.CPP\fR, \fB.c++\fR, \fB.cp\fR, or
+\&\fB.cxx\fR; \*(C+ header files often use \fB.hh\fR, \fB.hpp\fR,
+\&\fB.H\fR, or (for shared template code) \fB.tcc\fR; and
+preprocessed \*(C+ files use the suffix \fB.ii\fR.  \s-1GCC\s0 recognizes
+files with these names and compiles them as \*(C+ programs even if you
+call the compiler the same way as for compiling C programs (usually
+with the name \fBgcc\fR).
+.PP
+However, the use of \fBgcc\fR does not add the \*(C+ library.
+\&\fBg++\fR is a program that calls \s-1GCC\s0 and treats \fB.c\fR,
+\&\fB.h\fR and \fB.i\fR files as \*(C+ source files instead of C source
+files unless \fB\-x\fR is used, and automatically specifies linking
+against the \*(C+ library.  This program is also useful when
+precompiling a C header file with a \fB.h\fR extension for use in \*(C+
+compilations.  On many systems, \fBg++\fR is also installed with
+the name \fBc++\fR.
+.PP
+When you compile \*(C+ programs, you may specify many of the same
+command-line options that you use for compiling programs in any
+language; or command-line options meaningful for C and related
+languages; or options that are meaningful only for \*(C+ programs.
+.SS "Options Controlling C Dialect"
+.IX Subsection "Options Controlling C Dialect"
+The following options control the dialect of C (or languages derived
+from C, such as \*(C+, Objective-C and Objective\-\*(C+) that the compiler
+accepts:
+.IP "\fB\-ansi\fR" 4
+.IX Item "-ansi"
+In C mode, this is equivalent to \fB\-std=c90\fR. In \*(C+ mode, it is
+equivalent to \fB\-std=c++98\fR.
+.Sp
+This turns off certain features of \s-1GCC\s0 that are incompatible with \s-1ISO\s0
+C90 (when compiling C code), or of standard \*(C+ (when compiling \*(C+ code),
+such as the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, and
+predefined macros such as \f(CW\*(C`unix\*(C'\fR and \f(CW\*(C`vax\*(C'\fR that identify the
+type of system you are using.  It also enables the undesirable and
+rarely used \s-1ISO\s0 trigraph feature.  For the C compiler,
+it disables recognition of \*(C+ style \fB//\fR comments as well as
+the \f(CW\*(C`inline\*(C'\fR keyword.
+.Sp
+The alternate keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_extension_\|_\*(C'\fR,
+\&\f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR continue to work despite
+\&\fB\-ansi\fR.  You would not want to use them in an \s-1ISO\s0 C program, of
+course, but it is useful to put them in header files that might be included
+in compilations done with \fB\-ansi\fR.  Alternate predefined macros
+such as \f(CW\*(C`_\|_unix_\|_\*(C'\fR and \f(CW\*(C`_\|_vax_\|_\*(C'\fR are also available, with or
+without \fB\-ansi\fR.
+.Sp
+The \fB\-ansi\fR option does not cause non-ISO programs to be
+rejected gratuitously.  For that, \fB\-pedantic\fR is required in
+addition to \fB\-ansi\fR.
+.Sp
+The macro \f(CW\*(C`_\|_STRICT_ANSI_\|_\*(C'\fR is predefined when the \fB\-ansi\fR
+option is used.  Some header files may notice this macro and refrain
+from declaring certain functions or defining certain macros that the
+\&\s-1ISO\s0 standard doesn't call for; this is to avoid interfering with any
+programs that might use these names for other things.
+.Sp
+Functions that would normally be built in but do not have semantics
+defined by \s-1ISO\s0 C (such as \f(CW\*(C`alloca\*(C'\fR and \f(CW\*(C`ffs\*(C'\fR) are not built-in
+functions when \fB\-ansi\fR is used.
+.IP "\fB\-std=\fR" 4
+.IX Item "-std="
+Determine the language standard.   This option
+is currently only supported when compiling C or \*(C+.
+.Sp
+The compiler can accept several base standards, such as \fBc90\fR or
+\&\fBc++98\fR, and \s-1GNU\s0 dialects of those standards, such as
+\&\fBgnu90\fR or \fBgnu++98\fR.  By specifying a base standard, the
+compiler will accept all programs following that standard and those
+using \s-1GNU\s0 extensions that do not contradict it.  For example,
+\&\fB\-std=c90\fR turns off certain features of \s-1GCC\s0 that are
+incompatible with \s-1ISO\s0 C90, such as the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR
+keywords, but not other \s-1GNU\s0 extensions that do not have a meaning in
+\&\s-1ISO\s0 C90, such as omitting the middle term of a \f(CW\*(C`?:\*(C'\fR
+expression. On the other hand, by specifying a \s-1GNU\s0 dialect of a
+standard, all features the compiler support are enabled, even when
+those features change the meaning of the base standard and some
+strict-conforming programs may be rejected.  The particular standard
+is used by \fB\-pedantic\fR to identify which features are \s-1GNU\s0
+extensions given that version of the standard. For example
+\&\fB\-std=gnu90 \-pedantic\fR would warn about \*(C+ style \fB//\fR
+comments, while \fB\-std=gnu99 \-pedantic\fR would not.
+.Sp
+A value for this option must be provided; possible values are
+.RS 4
+.IP "\fBc90\fR" 4
+.IX Item "c90"
+.PD 0
+.IP "\fBc89\fR" 4
+.IX Item "c89"
+.IP "\fBiso9899:1990\fR" 4
+.IX Item "iso9899:1990"
+.PD
+Support all \s-1ISO\s0 C90 programs (certain \s-1GNU\s0 extensions that conflict
+with \s-1ISO\s0 C90 are disabled). Same as \fB\-ansi\fR for C code.
+.IP "\fBiso9899:199409\fR" 4
+.IX Item "iso9899:199409"
+\&\s-1ISO\s0 C90 as modified in amendment 1.
+.IP "\fBc99\fR" 4
+.IX Item "c99"
+.PD 0
+.IP "\fBc9x\fR" 4
+.IX Item "c9x"
+.IP "\fBiso9899:1999\fR" 4
+.IX Item "iso9899:1999"
+.IP "\fBiso9899:199x\fR" 4
+.IX Item "iso9899:199x"
+.PD
+\&\s-1ISO\s0 C99.  Note that this standard is not yet fully supported; see
+<\fBhttp://gcc.gnu.org/gcc\-4.6/c99status.html\fR> for more information.  The
+names \fBc9x\fR and \fBiso9899:199x\fR are deprecated.
+.IP "\fBc1x\fR" 4
+.IX Item "c1x"
+\&\s-1ISO\s0 C1X, the draft of the next revision of the \s-1ISO\s0 C standard.
+Support is limited and experimental and features enabled by this
+option may be changed or removed if changed in or removed from the
+standard draft.
+.IP "\fBgnu90\fR" 4
+.IX Item "gnu90"
+.PD 0
+.IP "\fBgnu89\fR" 4
+.IX Item "gnu89"
+.PD
+\&\s-1GNU\s0 dialect of \s-1ISO\s0 C90 (including some C99 features). This
+is the default for C code.
+.IP "\fBgnu99\fR" 4
+.IX Item "gnu99"
+.PD 0
+.IP "\fBgnu9x\fR" 4
+.IX Item "gnu9x"
+.PD
+\&\s-1GNU\s0 dialect of \s-1ISO\s0 C99.  When \s-1ISO\s0 C99 is fully implemented in \s-1GCC\s0,
+this will become the default.  The name \fBgnu9x\fR is deprecated.
+.IP "\fBgnu1x\fR" 4
+.IX Item "gnu1x"
+\&\s-1GNU\s0 dialect of \s-1ISO\s0 C1X.  Support is limited and experimental and
+features enabled by this option may be changed or removed if changed
+in or removed from the standard draft.
+.IP "\fBc++98\fR" 4
+.IX Item "c++98"
+The 1998 \s-1ISO\s0 \*(C+ standard plus amendments. Same as \fB\-ansi\fR for
+\&\*(C+ code.
+.IP "\fBgnu++98\fR" 4
+.IX Item "gnu++98"
+\&\s-1GNU\s0 dialect of \fB\-std=c++98\fR.  This is the default for
+\&\*(C+ code.
+.IP "\fBc++0x\fR" 4
+.IX Item "c++0x"
+The working draft of the upcoming \s-1ISO\s0 \*(C+0x standard. This option
+enables experimental features that are likely to be included in
+\&\*(C+0x. The working draft is constantly changing, and any feature that is
+enabled by this flag may be removed from future versions of \s-1GCC\s0 if it is
+not part of the \*(C+0x standard.
+.IP "\fBgnu++0x\fR" 4
+.IX Item "gnu++0x"
+\&\s-1GNU\s0 dialect of \fB\-std=c++0x\fR. This option enables
+experimental features that may be removed in future versions of \s-1GCC\s0.
+.RE
+.RS 4
+.RE
+.IP "\fB\-fgnu89\-inline\fR" 4
+.IX Item "-fgnu89-inline"
+The option \fB\-fgnu89\-inline\fR tells \s-1GCC\s0 to use the traditional
+\&\s-1GNU\s0 semantics for \f(CW\*(C`inline\*(C'\fR functions when in C99 mode.
+  This option
+is accepted and ignored by \s-1GCC\s0 versions 4.1.3 up to but not including
+4.3.  In \s-1GCC\s0 versions 4.3 and later it changes the behavior of \s-1GCC\s0 in
+C99 mode.  Using this option is roughly equivalent to adding the
+\&\f(CW\*(C`gnu_inline\*(C'\fR function attribute to all inline functions.
+.Sp
+The option \fB\-fno\-gnu89\-inline\fR explicitly tells \s-1GCC\s0 to use the
+C99 semantics for \f(CW\*(C`inline\*(C'\fR when in C99 or gnu99 mode (i.e., it
+specifies the default behavior).  This option was first supported in
+\&\s-1GCC\s0 4.3.  This option is not supported in \fB\-std=c90\fR or
+\&\fB\-std=gnu90\fR mode.
+.Sp
+The preprocessor macros \f(CW\*(C`_\|_GNUC_GNU_INLINE_\|_\*(C'\fR and
+\&\f(CW\*(C`_\|_GNUC_STDC_INLINE_\|_\*(C'\fR may be used to check which semantics are
+in effect for \f(CW\*(C`inline\*(C'\fR functions.
+.IP "\fB\-aux\-info\fR \fIfilename\fR" 4
+.IX Item "-aux-info filename"
+Output to the given filename prototyped declarations for all functions
+declared and/or defined in a translation unit, including those in header
+files.  This option is silently ignored in any language other than C.
+.Sp
+Besides declarations, the file indicates, in comments, the origin of
+each declaration (source file and line), whether the declaration was
+implicit, prototyped or unprototyped (\fBI\fR, \fBN\fR for new or
+\&\fBO\fR for old, respectively, in the first character after the line
+number and the colon), and whether it came from a declaration or a
+definition (\fBC\fR or \fBF\fR, respectively, in the following
+character).  In the case of function definitions, a K&R\-style list of
+arguments followed by their declarations is also provided, inside
+comments, after the declaration.
+.IP "\fB\-fno\-asm\fR" 4
+.IX Item "-fno-asm"
+Do not recognize \f(CW\*(C`asm\*(C'\fR, \f(CW\*(C`inline\*(C'\fR or \f(CW\*(C`typeof\*(C'\fR as a
+keyword, so that code can use these words as identifiers.  You can use
+the keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR
+instead.  \fB\-ansi\fR implies \fB\-fno\-asm\fR.
+.Sp
+In \*(C+, this switch only affects the \f(CW\*(C`typeof\*(C'\fR keyword, since
+\&\f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`inline\*(C'\fR are standard keywords.  You may want to
+use the \fB\-fno\-gnu\-keywords\fR flag instead, which has the same
+effect.  In C99 mode (\fB\-std=c99\fR or \fB\-std=gnu99\fR), this
+switch only affects the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, since
+\&\f(CW\*(C`inline\*(C'\fR is a standard keyword in \s-1ISO\s0 C99.
+.IP "\fB\-fno\-builtin\fR" 4
+.IX Item "-fno-builtin"
+.PD 0
+.IP "\fB\-fno\-builtin\-\fR\fIfunction\fR" 4
+.IX Item "-fno-builtin-function"
+.PD
+Don't recognize built-in functions that do not begin with
+\&\fB_\|_builtin_\fR as prefix.
+.Sp
+\&\s-1GCC\s0 normally generates special code to handle certain built-in functions
+more efficiently; for instance, calls to \f(CW\*(C`alloca\*(C'\fR may become single
+instructions that adjust the stack directly, and calls to \f(CW\*(C`memcpy\*(C'\fR
+may become inline copy loops.  The resulting code is often both smaller
+and faster, but since the function calls no longer appear as such, you
+cannot set a breakpoint on those calls, nor can you change the behavior
+of the functions by linking with a different library.  In addition,
+when a function is recognized as a built-in function, \s-1GCC\s0 may use
+information about that function to warn about problems with calls to
+that function, or to generate more efficient code, even if the
+resulting code still contains calls to that function.  For example,
+warnings are given with \fB\-Wformat\fR for bad calls to
+\&\f(CW\*(C`printf\*(C'\fR, when \f(CW\*(C`printf\*(C'\fR is built in, and \f(CW\*(C`strlen\*(C'\fR is
+known not to modify global memory.
+.Sp
+With the \fB\-fno\-builtin\-\fR\fIfunction\fR option
+only the built-in function \fIfunction\fR is
+disabled.  \fIfunction\fR must not begin with \fB_\|_builtin_\fR.  If a
+function is named that is not built-in in this version of \s-1GCC\s0, this
+option is ignored.  There is no corresponding
+\&\fB\-fbuiltin\-\fR\fIfunction\fR option; if you wish to enable
+built-in functions selectively when using \fB\-fno\-builtin\fR or
+\&\fB\-ffreestanding\fR, you may define macros such as:
+.Sp
+.Vb 2
+\&        #define abs(n)          _\|_builtin_abs ((n))
+\&        #define strcpy(d, s)    _\|_builtin_strcpy ((d), (s))
+.Ve
+.IP "\fB\-fhosted\fR" 4
+.IX Item "-fhosted"
+Assert that compilation takes place in a hosted environment.  This implies
+\&\fB\-fbuiltin\fR.  A hosted environment is one in which the
+entire standard library is available, and in which \f(CW\*(C`main\*(C'\fR has a return
+type of \f(CW\*(C`int\*(C'\fR.  Examples are nearly everything except a kernel.
+This is equivalent to \fB\-fno\-freestanding\fR.
+.IP "\fB\-ffreestanding\fR" 4
+.IX Item "-ffreestanding"
+Assert that compilation takes place in a freestanding environment.  This
+implies \fB\-fno\-builtin\fR.  A freestanding environment
+is one in which the standard library may not exist, and program startup may
+not necessarily be at \f(CW\*(C`main\*(C'\fR.  The most obvious example is an \s-1OS\s0 kernel.
+This is equivalent to \fB\-fno\-hosted\fR.
+.IP "\fB\-fopenmp\fR" 4
+.IX Item "-fopenmp"
+Enable handling of OpenMP directives \f(CW\*(C`#pragma omp\*(C'\fR in C/\*(C+ and
+\&\f(CW\*(C`!$omp\*(C'\fR in Fortran.  When \fB\-fopenmp\fR is specified, the
+compiler generates parallel code according to the OpenMP Application
+Program Interface v3.0 <\fBhttp://www.openmp.org/\fR>.  This option
+implies \fB\-pthread\fR, and thus is only supported on targets that
+have support for \fB\-pthread\fR.
+.IP "\fB\-fms\-extensions\fR" 4
+.IX Item "-fms-extensions"
+Accept some non-standard constructs used in Microsoft header files.
+.Sp
+In \*(C+ code, this allows member names in structures to be similar
+to previous types declarations.
+.Sp
+.Vb 4
+\&        typedef int UOW;
+\&        struct ABC {
+\&          UOW UOW;
+\&        };
+.Ve
+.Sp
+Some cases of unnamed fields in structures and unions are only
+accepted with this option.
+.IP "\fB\-fplan9\-extensions\fR" 4
+.IX Item "-fplan9-extensions"
+Accept some non-standard constructs used in Plan 9 code.
+.Sp
+This enables \fB\-fms\-extensions\fR, permits passing pointers to
+structures with anonymous fields to functions which expect pointers to
+elements of the type of the field, and permits referring to anonymous
+fields declared using a typedef.    This is only
+supported for C, not \*(C+.
+.IP "\fB\-trigraphs\fR" 4
+.IX Item "-trigraphs"
+Support \s-1ISO\s0 C trigraphs.  The \fB\-ansi\fR option (and \fB\-std\fR
+options for strict \s-1ISO\s0 C conformance) implies \fB\-trigraphs\fR.
+.IP "\fB\-no\-integrated\-cpp\fR" 4
+.IX Item "-no-integrated-cpp"
+Performs a compilation in two passes: preprocessing and compiling.  This
+option allows a user supplied \*(L"cc1\*(R", \*(L"cc1plus\*(R", or \*(L"cc1obj\*(R" via the
+\&\fB\-B\fR option.  The user supplied compilation step can then add in
+an additional preprocessing step after normal preprocessing but before
+compiling.  The default is to use the integrated cpp (internal cpp)
+.Sp
+The semantics of this option will change if \*(L"cc1\*(R", \*(L"cc1plus\*(R", and
+\&\*(L"cc1obj\*(R" are merged.
+.IP "\fB\-traditional\fR" 4
+.IX Item "-traditional"
+.PD 0
+.IP "\fB\-traditional\-cpp\fR" 4
+.IX Item "-traditional-cpp"
+.PD
+Formerly, these options caused \s-1GCC\s0 to attempt to emulate a pre-standard
+C compiler.  They are now only supported with the \fB\-E\fR switch.
+The preprocessor continues to support a pre-standard mode.  See the \s-1GNU\s0
+\&\s-1CPP\s0 manual for details.
+.IP "\fB\-fcond\-mismatch\fR" 4
+.IX Item "-fcond-mismatch"
+Allow conditional expressions with mismatched types in the second and
+third arguments.  The value of such an expression is void.  This option
+is not supported for \*(C+.
+.IP "\fB\-flax\-vector\-conversions\fR" 4
+.IX Item "-flax-vector-conversions"
+Allow implicit conversions between vectors with differing numbers of
+elements and/or incompatible element types.  This option should not be
+used for new code.
+.IP "\fB\-funsigned\-char\fR" 4
+.IX Item "-funsigned-char"
+Let the type \f(CW\*(C`char\*(C'\fR be unsigned, like \f(CW\*(C`unsigned char\*(C'\fR.
+.Sp
+Each kind of machine has a default for what \f(CW\*(C`char\*(C'\fR should
+be.  It is either like \f(CW\*(C`unsigned char\*(C'\fR by default or like
+\&\f(CW\*(C`signed char\*(C'\fR by default.
+.Sp
+Ideally, a portable program should always use \f(CW\*(C`signed char\*(C'\fR or
+\&\f(CW\*(C`unsigned char\*(C'\fR when it depends on the signedness of an object.
+But many programs have been written to use plain \f(CW\*(C`char\*(C'\fR and
+expect it to be signed, or expect it to be unsigned, depending on the
+machines they were written for.  This option, and its inverse, let you
+make such a program work with the opposite default.
+.Sp
+The type \f(CW\*(C`char\*(C'\fR is always a distinct type from each of
+\&\f(CW\*(C`signed char\*(C'\fR or \f(CW\*(C`unsigned char\*(C'\fR, even though its behavior
+is always just like one of those two.
+.IP "\fB\-fsigned\-char\fR" 4
+.IX Item "-fsigned-char"
+Let the type \f(CW\*(C`char\*(C'\fR be signed, like \f(CW\*(C`signed char\*(C'\fR.
+.Sp
+Note that this is equivalent to \fB\-fno\-unsigned\-char\fR, which is
+the negative form of \fB\-funsigned\-char\fR.  Likewise, the option
+\&\fB\-fno\-signed\-char\fR is equivalent to \fB\-funsigned\-char\fR.
+.IP "\fB\-fsigned\-bitfields\fR" 4
+.IX Item "-fsigned-bitfields"
+.PD 0
+.IP "\fB\-funsigned\-bitfields\fR" 4
+.IX Item "-funsigned-bitfields"
+.IP "\fB\-fno\-signed\-bitfields\fR" 4
+.IX Item "-fno-signed-bitfields"
+.IP "\fB\-fno\-unsigned\-bitfields\fR" 4
+.IX Item "-fno-unsigned-bitfields"
+.PD
+These options control whether a bit-field is signed or unsigned, when the
+declaration does not use either \f(CW\*(C`signed\*(C'\fR or \f(CW\*(C`unsigned\*(C'\fR.  By
+default, such a bit-field is signed, because this is consistent: the
+basic integer types such as \f(CW\*(C`int\*(C'\fR are signed types.
+.SS "Options Controlling \*(C+ Dialect"
+.IX Subsection "Options Controlling  Dialect"
+This section describes the command-line options that are only meaningful
+for \*(C+ programs; but you can also use most of the \s-1GNU\s0 compiler options
+regardless of what language your program is in.  For example, you
+might compile a file \f(CW\*(C`firstClass.C\*(C'\fR like this:
+.PP
+.Vb 1
+\&        g++ \-g \-frepo \-O \-c firstClass.C
+.Ve
+.PP
+In this example, only \fB\-frepo\fR is an option meant
+only for \*(C+ programs; you can use the other options with any
+language supported by \s-1GCC\s0.
+.PP
+Here is a list of options that are \fIonly\fR for compiling \*(C+ programs:
+.IP "\fB\-fabi\-version=\fR\fIn\fR" 4
+.IX Item "-fabi-version=n"
+Use version \fIn\fR of the \*(C+ \s-1ABI\s0.  Version 2 is the version of the
+\&\*(C+ \s-1ABI\s0 that first appeared in G++ 3.4.  Version 1 is the version of
+the \*(C+ \s-1ABI\s0 that first appeared in G++ 3.2.  Version 0 will always be
+the version that conforms most closely to the \*(C+ \s-1ABI\s0 specification.
+Therefore, the \s-1ABI\s0 obtained using version 0 will change as \s-1ABI\s0 bugs
+are fixed.
+.Sp
+The default is version 2.
+.Sp
+Version 3 corrects an error in mangling a constant address as a
+template argument.
+.Sp
+Version 4 implements a standard mangling for vector types.
+.Sp
+Version 5 corrects the mangling of attribute const/volatile on
+function pointer types, decltype of a plain decl, and use of a
+function parameter in the declaration of another parameter.
+.Sp
+See also \fB\-Wabi\fR.
+.IP "\fB\-fno\-access\-control\fR" 4
+.IX Item "-fno-access-control"
+Turn off all access checking.  This switch is mainly useful for working
+around bugs in the access control code.
+.IP "\fB\-fcheck\-new\fR" 4
+.IX Item "-fcheck-new"
+Check that the pointer returned by \f(CW\*(C`operator new\*(C'\fR is non-null
+before attempting to modify the storage allocated.  This check is
+normally unnecessary because the \*(C+ standard specifies that
+\&\f(CW\*(C`operator new\*(C'\fR will only return \f(CW0\fR if it is declared
+\&\fB\f(BIthrow()\fB\fR, in which case the compiler will always check the
+return value even without this option.  In all other cases, when
+\&\f(CW\*(C`operator new\*(C'\fR has a non-empty exception specification, memory
+exhaustion is signalled by throwing \f(CW\*(C`std::bad_alloc\*(C'\fR.  See also
+\&\fBnew (nothrow)\fR.
+.IP "\fB\-fconserve\-space\fR" 4
+.IX Item "-fconserve-space"
+Put uninitialized or runtime-initialized global variables into the
+common segment, as C does.  This saves space in the executable at the
+cost of not diagnosing duplicate definitions.  If you compile with this
+flag and your program mysteriously crashes after \f(CW\*(C`main()\*(C'\fR has
+completed, you may have an object that is being destroyed twice because
+two definitions were merged.
+.Sp
+This option is no longer useful on most targets, now that support has
+been added for putting variables into \s-1BSS\s0 without making them common.
+.IP "\fB\-fconstexpr\-depth=\fR\fIn\fR" 4
+.IX Item "-fconstexpr-depth=n"
+Set the maximum nested evaluation depth for \*(C+0x constexpr functions
+to \fIn\fR.  A limit is needed to detect endless recursion during
+constant expression evaluation.  The minimum specified by the standard
+is 512.
+.IP "\fB\-fno\-deduce\-init\-list\fR" 4
+.IX Item "-fno-deduce-init-list"
+Disable deduction of a template type parameter as
+std::initializer_list from a brace-enclosed initializer list, i.e.
+.Sp
+.Vb 4
+\&        template <class T> auto forward(T t) \-> decltype (realfn (t))
+\&        {
+\&          return realfn (t);
+\&        }
+\&        
+\&        void f()
+\&        {
+\&          forward({1,2}); // call forward<std::initializer_list<int>>
+\&        }
+.Ve
+.Sp
+This option is present because this deduction is an extension to the
+current specification in the \*(C+0x working draft, and there was
+some concern about potential overload resolution problems.
+.IP "\fB\-ffriend\-injection\fR" 4
+.IX Item "-ffriend-injection"
+Inject friend functions into the enclosing namespace, so that they are
+visible outside the scope of the class in which they are declared.
+Friend functions were documented to work this way in the old Annotated
+\&\*(C+ Reference Manual, and versions of G++ before 4.1 always worked
+that way.  However, in \s-1ISO\s0 \*(C+ a friend function which is not declared
+in an enclosing scope can only be found using argument dependent
+lookup.  This option causes friends to be injected as they were in
+earlier releases.
+.Sp
+This option is for compatibility, and may be removed in a future
+release of G++.
+.IP "\fB\-fno\-elide\-constructors\fR" 4
+.IX Item "-fno-elide-constructors"
+The \*(C+ standard allows an implementation to omit creating a temporary
+which is only used to initialize another object of the same type.
+Specifying this option disables that optimization, and forces G++ to
+call the copy constructor in all cases.
+.IP "\fB\-fno\-enforce\-eh\-specs\fR" 4
+.IX Item "-fno-enforce-eh-specs"
+Don't generate code to check for violation of exception specifications
+at runtime.  This option violates the \*(C+ standard, but may be useful
+for reducing code size in production builds, much like defining
+\&\fB\s-1NDEBUG\s0\fR.  This does not give user code permission to throw
+exceptions in violation of the exception specifications; the compiler
+will still optimize based on the specifications, so throwing an
+unexpected exception will result in undefined behavior.
+.IP "\fB\-ffor\-scope\fR" 4
+.IX Item "-ffor-scope"
+.PD 0
+.IP "\fB\-fno\-for\-scope\fR" 4
+.IX Item "-fno-for-scope"
+.PD
+If \fB\-ffor\-scope\fR is specified, the scope of variables declared in
+a \fIfor-init-statement\fR is limited to the \fBfor\fR loop itself,
+as specified by the \*(C+ standard.
+If \fB\-fno\-for\-scope\fR is specified, the scope of variables declared in
+a \fIfor-init-statement\fR extends to the end of the enclosing scope,
+as was the case in old versions of G++, and other (traditional)
+implementations of \*(C+.
+.Sp
+The default if neither flag is given to follow the standard,
+but to allow and give a warning for old-style code that would
+otherwise be invalid, or have different behavior.
+.IP "\fB\-fno\-gnu\-keywords\fR" 4
+.IX Item "-fno-gnu-keywords"
+Do not recognize \f(CW\*(C`typeof\*(C'\fR as a keyword, so that code can use this
+word as an identifier.  You can use the keyword \f(CW\*(C`_\|_typeof_\|_\*(C'\fR instead.
+\&\fB\-ansi\fR implies \fB\-fno\-gnu\-keywords\fR.
+.IP "\fB\-fno\-implicit\-templates\fR" 4
+.IX Item "-fno-implicit-templates"
+Never emit code for non-inline templates which are instantiated
+implicitly (i.e. by use); only emit code for explicit instantiations.
+.IP "\fB\-fno\-implicit\-inline\-templates\fR" 4
+.IX Item "-fno-implicit-inline-templates"
+Don't emit code for implicit instantiations of inline templates, either.
+The default is to handle inlines differently so that compiles with and
+without optimization will need the same set of explicit instantiations.
+.IP "\fB\-fno\-implement\-inlines\fR" 4
+.IX Item "-fno-implement-inlines"
+To save space, do not emit out-of-line copies of inline functions
+controlled by \fB#pragma implementation\fR.  This will cause linker
+errors if these functions are not inlined everywhere they are called.
+.IP "\fB\-fms\-extensions\fR" 4
+.IX Item "-fms-extensions"
+Disable pedantic warnings about constructs used in \s-1MFC\s0, such as implicit
+int and getting a pointer to member function via non-standard syntax.
+.IP "\fB\-fno\-nonansi\-builtins\fR" 4
+.IX Item "-fno-nonansi-builtins"
+Disable built-in declarations of functions that are not mandated by
+\&\s-1ANSI/ISO\s0 C.  These include \f(CW\*(C`ffs\*(C'\fR, \f(CW\*(C`alloca\*(C'\fR, \f(CW\*(C`_exit\*(C'\fR,
+\&\f(CW\*(C`index\*(C'\fR, \f(CW\*(C`bzero\*(C'\fR, \f(CW\*(C`conjf\*(C'\fR, and other related functions.
+.IP "\fB\-fnothrow\-opt\fR" 4
+.IX Item "-fnothrow-opt"
+Treat a \f(CW\*(C`throw()\*(C'\fR exception specification as though it were a
+\&\f(CW\*(C`noexcept\*(C'\fR specification to reduce or eliminate the text size
+overhead relative to a function with no exception specification.  If
+the function has local variables of types with non-trivial
+destructors, the exception specification will actually make the
+function smaller because the \s-1EH\s0 cleanups for those variables can be
+optimized away.  The semantic effect is that an exception thrown out of
+a function with such an exception specification will result in a call
+to \f(CW\*(C`terminate\*(C'\fR rather than \f(CW\*(C`unexpected\*(C'\fR.
+.IP "\fB\-fno\-operator\-names\fR" 4
+.IX Item "-fno-operator-names"
+Do not treat the operator name keywords \f(CW\*(C`and\*(C'\fR, \f(CW\*(C`bitand\*(C'\fR,
+\&\f(CW\*(C`bitor\*(C'\fR, \f(CW\*(C`compl\*(C'\fR, \f(CW\*(C`not\*(C'\fR, \f(CW\*(C`or\*(C'\fR and \f(CW\*(C`xor\*(C'\fR as
+synonyms as keywords.
+.IP "\fB\-fno\-optional\-diags\fR" 4
+.IX Item "-fno-optional-diags"
+Disable diagnostics that the standard says a compiler does not need to
+issue.  Currently, the only such diagnostic issued by G++ is the one for
+a name having multiple meanings within a class.
+.IP "\fB\-fpermissive\fR" 4
+.IX Item "-fpermissive"
+Downgrade some diagnostics about nonconformant code from errors to
+warnings.  Thus, using \fB\-fpermissive\fR will allow some
+nonconforming code to compile.
+.IP "\fB\-fno\-pretty\-templates\fR" 4
+.IX Item "-fno-pretty-templates"
+When an error message refers to a specialization of a function
+template, the compiler will normally print the signature of the
+template followed by the template arguments and any typedefs or
+typenames in the signature (e.g. \f(CW\*(C`void f(T) [with T = int]\*(C'\fR
+rather than \f(CW\*(C`void f(int)\*(C'\fR) so that it's clear which template is
+involved.  When an error message refers to a specialization of a class
+template, the compiler will omit any template arguments which match
+the default template arguments for that template.  If either of these
+behaviors make it harder to understand the error message rather than
+easier, using \fB\-fno\-pretty\-templates\fR will disable them.
+.IP "\fB\-frepo\fR" 4
+.IX Item "-frepo"
+Enable automatic template instantiation at link time.  This option also
+implies \fB\-fno\-implicit\-templates\fR.
+.IP "\fB\-fno\-rtti\fR" 4
+.IX Item "-fno-rtti"
+Disable generation of information about every class with virtual
+functions for use by the \*(C+ runtime type identification features
+(\fBdynamic_cast\fR and \fBtypeid\fR).  If you don't use those parts
+of the language, you can save some space by using this flag.  Note that
+exception handling uses the same information, but it will generate it as
+needed. The \fBdynamic_cast\fR operator can still be used for casts that
+do not require runtime type information, i.e. casts to \f(CW\*(C`void *\*(C'\fR or to
+unambiguous base classes.
+.IP "\fB\-fstats\fR" 4
+.IX Item "-fstats"
+Emit statistics about front-end processing at the end of the compilation.
+This information is generally only useful to the G++ development team.
+.IP "\fB\-fstrict\-enums\fR" 4
+.IX Item "-fstrict-enums"
+Allow the compiler to optimize using the assumption that a value of
+enumeration type can only be one of the values of the enumeration (as
+defined in the \*(C+ standard; basically, a value which can be
+represented in the minimum number of bits needed to represent all the
+enumerators).  This assumption may not be valid if the program uses a
+cast to convert an arbitrary integer value to the enumeration type.
+.IP "\fB\-ftemplate\-depth=\fR\fIn\fR" 4
+.IX Item "-ftemplate-depth=n"
+Set the maximum instantiation depth for template classes to \fIn\fR.
+A limit on the template instantiation depth is needed to detect
+endless recursions during template class instantiation.  \s-1ANSI/ISO\s0 \*(C+
+conforming programs must not rely on a maximum depth greater than 17
+(changed to 1024 in \*(C+0x).
+.IP "\fB\-fno\-threadsafe\-statics\fR" 4
+.IX Item "-fno-threadsafe-statics"
+Do not emit the extra code to use the routines specified in the \*(C+
+\&\s-1ABI\s0 for thread-safe initialization of local statics.  You can use this
+option to reduce code size slightly in code that doesn't need to be
+thread-safe.
+.IP "\fB\-fuse\-cxa\-atexit\fR" 4
+.IX Item "-fuse-cxa-atexit"
+Register destructors for objects with static storage duration with the
+\&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR function rather than the \f(CW\*(C`atexit\*(C'\fR function.
+This option is required for fully standards-compliant handling of static
+destructors, but will only work if your C library supports
+\&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR.
+.IP "\fB\-fno\-use\-cxa\-get\-exception\-ptr\fR" 4
+.IX Item "-fno-use-cxa-get-exception-ptr"
+Don't use the \f(CW\*(C`_\|_cxa_get_exception_ptr\*(C'\fR runtime routine.  This
+will cause \f(CW\*(C`std::uncaught_exception\*(C'\fR to be incorrect, but is necessary
+if the runtime routine is not available.
+.IP "\fB\-fvisibility\-inlines\-hidden\fR" 4
+.IX Item "-fvisibility-inlines-hidden"
+This switch declares that the user does not attempt to compare
+pointers to inline methods where the addresses of the two functions
+were taken in different shared objects.
+.Sp
+The effect of this is that \s-1GCC\s0 may, effectively, mark inline methods with
+\&\f(CW\*(C`_\|_attribute_\|_ ((visibility ("hidden")))\*(C'\fR so that they do not
+appear in the export table of a \s-1DSO\s0 and do not require a \s-1PLT\s0 indirection
+when used within the \s-1DSO\s0.  Enabling this option can have a dramatic effect
+on load and link times of a \s-1DSO\s0 as it massively reduces the size of the
+dynamic export table when the library makes heavy use of templates.
+.Sp
+The behavior of this switch is not quite the same as marking the
+methods as hidden directly, because it does not affect static variables
+local to the function or cause the compiler to deduce that
+the function is defined in only one shared object.
+.Sp
+You may mark a method as having a visibility explicitly to negate the
+effect of the switch for that method.  For example, if you do want to
+compare pointers to a particular inline method, you might mark it as
+having default visibility.  Marking the enclosing class with explicit
+visibility will have no effect.
+.Sp
+Explicitly instantiated inline methods are unaffected by this option
+as their linkage might otherwise cross a shared library boundary.
+.IP "\fB\-fvisibility\-ms\-compat\fR" 4
+.IX Item "-fvisibility-ms-compat"
+This flag attempts to use visibility settings to make \s-1GCC\s0's \*(C+
+linkage model compatible with that of Microsoft Visual Studio.
+.Sp
+The flag makes these changes to \s-1GCC\s0's linkage model:
+.RS 4
+.IP "1." 4
+It sets the default visibility to \f(CW\*(C`hidden\*(C'\fR, like
+\&\fB\-fvisibility=hidden\fR.
+.IP "2." 4
+Types, but not their members, are not hidden by default.
+.IP "3." 4
+The One Definition Rule is relaxed for types without explicit
+visibility specifications which are defined in more than one different
+shared object: those declarations are permitted if they would have
+been permitted when this option was not used.
+.RE
+.RS 4
+.Sp
+In new code it is better to use \fB\-fvisibility=hidden\fR and
+export those classes which are intended to be externally visible.
+Unfortunately it is possible for code to rely, perhaps accidentally,
+on the Visual Studio behavior.
+.Sp
+Among the consequences of these changes are that static data members
+of the same type with the same name but defined in different shared
+objects will be different, so changing one will not change the other;
+and that pointers to function members defined in different shared
+objects may not compare equal.  When this flag is given, it is a
+violation of the \s-1ODR\s0 to define types with the same name differently.
+.RE
+.IP "\fB\-fno\-weak\fR" 4
+.IX Item "-fno-weak"
+Do not use weak symbol support, even if it is provided by the linker.
+By default, G++ will use weak symbols if they are available.  This
+option exists only for testing, and should not be used by end-users;
+it will result in inferior code and has no benefits.  This option may
+be removed in a future release of G++.
+.IP "\fB\-nostdinc++\fR" 4
+.IX Item "-nostdinc++"
+Do not search for header files in the standard directories specific to
+\&\*(C+, but do still search the other standard directories.  (This option
+is used when building the \*(C+ library.)
+.PP
+In addition, these optimization, warning, and code generation options
+have meanings only for \*(C+ programs:
+.IP "\fB\-fno\-default\-inline\fR" 4
+.IX Item "-fno-default-inline"
+Do not assume \fBinline\fR for functions defined inside a class scope.
+  Note that these
+functions will have linkage like inline functions; they just won't be
+inlined by default.
+.IP "\fB\-Wabi\fR (C, Objective-C, \*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wabi (C, Objective-C,  and Objective- only)"
+Warn when G++ generates code that is probably not compatible with the
+vendor-neutral \*(C+ \s-1ABI\s0.  Although an effort has been made to warn about
+all such cases, there are probably some cases that are not warned about,
+even though G++ is generating incompatible code.  There may also be
+cases where warnings are emitted even though the code that is generated
+will be compatible.
+.Sp
+You should rewrite your code to avoid these warnings if you are
+concerned about the fact that code generated by G++ may not be binary
+compatible with code generated by other compilers.
+.Sp
+The known incompatibilities in \fB\-fabi\-version=2\fR (the default) include:
+.RS 4
+.IP "\(bu" 4
+A template with a non-type template parameter of reference type is
+mangled incorrectly:
+.Sp
+.Vb 3
+\&        extern int N;
+\&        template <int &> struct S {};
+\&        void n (S<N>) {2}
+.Ve
+.Sp
+This is fixed in \fB\-fabi\-version=3\fR.
+.IP "\(bu" 4
+\&\s-1SIMD\s0 vector types declared using \f(CW\*(C`_\|_attribute ((vector_size))\*(C'\fR are
+mangled in a non-standard way that does not allow for overloading of
+functions taking vectors of different sizes.
+.Sp
+The mangling is changed in \fB\-fabi\-version=4\fR.
+.RE
+.RS 4
+.Sp
+The known incompatibilities in \fB\-fabi\-version=1\fR include:
+.IP "\(bu" 4
+Incorrect handling of tail-padding for bit-fields.  G++ may attempt to
+pack data into the same byte as a base class.  For example:
+.Sp
+.Vb 2
+\&        struct A { virtual void f(); int f1 : 1; };
+\&        struct B : public A { int f2 : 1; };
+.Ve
+.Sp
+In this case, G++ will place \f(CW\*(C`B::f2\*(C'\fR into the same byte
+as\f(CW\*(C`A::f1\*(C'\fR; other compilers will not.  You can avoid this problem
+by explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of the
+byte size on your platform; that will cause G++ and other compilers to
+layout \f(CW\*(C`B\*(C'\fR identically.
+.IP "\(bu" 4
+Incorrect handling of tail-padding for virtual bases.  G++ does not use
+tail padding when laying out virtual bases.  For example:
+.Sp
+.Vb 3
+\&        struct A { virtual void f(); char c1; };
+\&        struct B { B(); char c2; };
+\&        struct C : public A, public virtual B {};
+.Ve
+.Sp
+In this case, G++ will not place \f(CW\*(C`B\*(C'\fR into the tail-padding for
+\&\f(CW\*(C`A\*(C'\fR; other compilers will.  You can avoid this problem by
+explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of its
+alignment (ignoring virtual base classes); that will cause G++ and other
+compilers to layout \f(CW\*(C`C\*(C'\fR identically.
+.IP "\(bu" 4
+Incorrect handling of bit-fields with declared widths greater than that
+of their underlying types, when the bit-fields appear in a union.  For
+example:
+.Sp
+.Vb 1
+\&        union U { int i : 4096; };
+.Ve
+.Sp
+Assuming that an \f(CW\*(C`int\*(C'\fR does not have 4096 bits, G++ will make the
+union too small by the number of bits in an \f(CW\*(C`int\*(C'\fR.
+.IP "\(bu" 4
+Empty classes can be placed at incorrect offsets.  For example:
+.Sp
+.Vb 1
+\&        struct A {};
+\&        
+\&        struct B {
+\&          A a;
+\&          virtual void f ();
+\&        };
+\&        
+\&        struct C : public B, public A {};
+.Ve
+.Sp
+G++ will place the \f(CW\*(C`A\*(C'\fR base class of \f(CW\*(C`C\*(C'\fR at a nonzero offset;
+it should be placed at offset zero.  G++ mistakenly believes that the
+\&\f(CW\*(C`A\*(C'\fR data member of \f(CW\*(C`B\*(C'\fR is already at offset zero.
+.IP "\(bu" 4
+Names of template functions whose types involve \f(CW\*(C`typename\*(C'\fR or
+template template parameters can be mangled incorrectly.
+.Sp
+.Vb 2
+\&        template <typename Q>
+\&        void f(typename Q::X) {}
+\&        
+\&        template <template <typename> class Q>
+\&        void f(typename Q<int>::X) {}
+.Ve
+.Sp
+Instantiations of these templates may be mangled incorrectly.
+.RE
+.RS 4
+.Sp
+It also warns psABI related changes.  The known psABI changes at this
+point include:
+.IP "\(bu" 4
+For SYSV/x86\-64, when passing union with long double, it is changed to
+pass in memory as specified in psABI.  For example:
+.Sp
+.Vb 4
+\&        union U {
+\&          long double ld;
+\&          int i;
+\&        };
+.Ve
+.Sp
+\&\f(CW\*(C`union U\*(C'\fR will always be passed in memory.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Wctor\-dtor\-privacy\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wctor-dtor-privacy ( and Objective- only)"
+Warn when a class seems unusable because all the constructors or
+destructors in that class are private, and it has neither friends nor
+public static member functions.
+.IP "\fB\-Wnoexcept\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wnoexcept ( and Objective- only)"
+Warn when a noexcept-expression evaluates to false because of a call
+to a function that does not have a non-throwing exception
+specification (i.e. \fB\f(BIthrow()\fB\fR or \fBnoexcept\fR) but is known by
+the compiler to never throw an exception.
+.IP "\fB\-Wnon\-virtual\-dtor\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wnon-virtual-dtor ( and Objective- only)"
+Warn when a class has virtual functions and accessible non-virtual
+destructor, in which case it would be possible but unsafe to delete
+an instance of a derived class through a pointer to the base class.
+This warning is also enabled if \-Weffc++ is specified.
+.IP "\fB\-Wreorder\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wreorder ( and Objective- only)"
+Warn when the order of member initializers given in the code does not
+match the order in which they must be executed.  For instance:
+.Sp
+.Vb 5
+\&        struct A {
+\&          int i;
+\&          int j;
+\&          A(): j (0), i (1) { }
+\&        };
+.Ve
+.Sp
+The compiler will rearrange the member initializers for \fBi\fR
+and \fBj\fR to match the declaration order of the members, emitting
+a warning to that effect.  This warning is enabled by \fB\-Wall\fR.
+.PP
+The following \fB\-W...\fR options are not affected by \fB\-Wall\fR.
+.IP "\fB\-Weffc++\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Weffc++ ( and Objective- only)"
+Warn about violations of the following style guidelines from Scott Meyers'
+\&\fIEffective \*(C+\fR book:
+.RS 4
+.IP "\(bu" 4
+Item 11:  Define a copy constructor and an assignment operator for classes
+with dynamically allocated memory.
+.IP "\(bu" 4
+Item 12:  Prefer initialization to assignment in constructors.
+.IP "\(bu" 4
+Item 14:  Make destructors virtual in base classes.
+.IP "\(bu" 4
+Item 15:  Have \f(CW\*(C`operator=\*(C'\fR return a reference to \f(CW*this\fR.
+.IP "\(bu" 4
+Item 23:  Don't try to return a reference when you must return an object.
+.RE
+.RS 4
+.Sp
+Also warn about violations of the following style guidelines from
+Scott Meyers' \fIMore Effective \*(C+\fR book:
+.IP "\(bu" 4
+Item 6:  Distinguish between prefix and postfix forms of increment and
+decrement operators.
+.IP "\(bu" 4
+Item 7:  Never overload \f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, or \f(CW\*(C`,\*(C'\fR.
+.RE
+.RS 4
+.Sp
+When selecting this option, be aware that the standard library
+headers do not obey all of these guidelines; use \fBgrep \-v\fR
+to filter out those warnings.
+.RE
+.IP "\fB\-Wstrict\-null\-sentinel\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wstrict-null-sentinel ( and Objective- only)"
+Warn also about the use of an uncasted \f(CW\*(C`NULL\*(C'\fR as sentinel.  When
+compiling only with \s-1GCC\s0 this is a valid sentinel, as \f(CW\*(C`NULL\*(C'\fR is defined
+to \f(CW\*(C`_\|_null\*(C'\fR.  Although it is a null pointer constant not a null pointer,
+it is guaranteed to be of the same size as a pointer.  But this use is
+not portable across different compilers.
+.IP "\fB\-Wno\-non\-template\-friend\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-non-template-friend ( and Objective- only)"
+Disable warnings when non-templatized friend functions are declared
+within a template.  Since the advent of explicit template specification
+support in G++, if the name of the friend is an unqualified-id (i.e.,
+\&\fBfriend foo(int)\fR), the \*(C+ language specification demands that the
+friend declare or define an ordinary, nontemplate function.  (Section
+14.5.3).  Before G++ implemented explicit specification, unqualified-ids
+could be interpreted as a particular specialization of a templatized
+function.  Because this non-conforming behavior is no longer the default
+behavior for G++, \fB\-Wnon\-template\-friend\fR allows the compiler to
+check existing code for potential trouble spots and is on by default.
+This new compiler behavior can be turned off with
+\&\fB\-Wno\-non\-template\-friend\fR which keeps the conformant compiler code
+but disables the helpful warning.
+.IP "\fB\-Wold\-style\-cast\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wold-style-cast ( and Objective- only)"
+Warn if an old-style (C\-style) cast to a non-void type is used within
+a \*(C+ program.  The new-style casts (\fBdynamic_cast\fR,
+\&\fBstatic_cast\fR, \fBreinterpret_cast\fR, and \fBconst_cast\fR) are
+less vulnerable to unintended effects and much easier to search for.
+.IP "\fB\-Woverloaded\-virtual\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Woverloaded-virtual ( and Objective- only)"
+Warn when a function declaration hides virtual functions from a
+base class.  For example, in:
+.Sp
+.Vb 3
+\&        struct A {
+\&          virtual void f();
+\&        };
+\&        
+\&        struct B: public A {
+\&          void f(int);
+\&        };
+.Ve
+.Sp
+the \f(CW\*(C`A\*(C'\fR class version of \f(CW\*(C`f\*(C'\fR is hidden in \f(CW\*(C`B\*(C'\fR, and code
+like:
+.Sp
+.Vb 2
+\&        B* b;
+\&        b\->f();
+.Ve
+.Sp
+will fail to compile.
+.IP "\fB\-Wno\-pmf\-conversions\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-pmf-conversions ( and Objective- only)"
+Disable the diagnostic for converting a bound pointer to member function
+to a plain pointer.
+.IP "\fB\-Wsign\-promo\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wsign-promo ( and Objective- only)"
+Warn when overload resolution chooses a promotion from unsigned or
+enumerated type to a signed type, over a conversion to an unsigned type of
+the same size.  Previous versions of G++ would try to preserve
+unsignedness, but the standard mandates the current behavior.
+.Sp
+.Vb 4
+\&        struct A {
+\&          operator int ();
+\&          A& operator = (int);
+\&        };
+\&        
+\&        main ()
+\&        {
+\&          A a,b;
+\&          a = b;
+\&        }
+.Ve
+.Sp
+In this example, G++ will synthesize a default \fBA& operator =
+(const A&);\fR, while cfront will use the user-defined \fBoperator =\fR.
+.SS "Options Controlling Objective-C and Objective\-\*(C+ Dialects"
+.IX Subsection "Options Controlling Objective-C and Objective- Dialects"
+(\s-1NOTE:\s0 This manual does not describe the Objective-C and Objective\-\*(C+
+languages themselves.
+.PP
+This section describes the command-line options that are only meaningful
+for Objective-C and Objective\-\*(C+ programs, but you can also use most of
+the language-independent \s-1GNU\s0 compiler options.
+For example, you might compile a file \f(CW\*(C`some_class.m\*(C'\fR like this:
+.PP
+.Vb 1
+\&        gcc \-g \-fgnu\-runtime \-O \-c some_class.m
+.Ve
+.PP
+In this example, \fB\-fgnu\-runtime\fR is an option meant only for
+Objective-C and Objective\-\*(C+ programs; you can use the other options with
+any language supported by \s-1GCC\s0.
+.PP
+Note that since Objective-C is an extension of the C language, Objective-C
+compilations may also use options specific to the C front-end (e.g.,
+\&\fB\-Wtraditional\fR).  Similarly, Objective\-\*(C+ compilations may use
+\&\*(C+\-specific options (e.g., \fB\-Wabi\fR).
+.PP
+Here is a list of options that are \fIonly\fR for compiling Objective-C
+and Objective\-\*(C+ programs:
+.IP "\fB\-fconstant\-string\-class=\fR\fIclass-name\fR" 4
+.IX Item "-fconstant-string-class=class-name"
+Use \fIclass-name\fR as the name of the class to instantiate for each
+literal string specified with the syntax \f(CW\*(C`@"..."\*(C'\fR.  The default
+class name is \f(CW\*(C`NXConstantString\*(C'\fR if the \s-1GNU\s0 runtime is being used, and
+\&\f(CW\*(C`NSConstantString\*(C'\fR if the NeXT runtime is being used (see below).  The
+\&\fB\-fconstant\-cfstrings\fR option, if also present, will override the
+\&\fB\-fconstant\-string\-class\fR setting and cause \f(CW\*(C`@"..."\*(C'\fR literals
+to be laid out as constant CoreFoundation strings.
+.IP "\fB\-fgnu\-runtime\fR" 4
+.IX Item "-fgnu-runtime"
+Generate object code compatible with the standard \s-1GNU\s0 Objective-C
+runtime.  This is the default for most types of systems.
+.IP "\fB\-fnext\-runtime\fR" 4
+.IX Item "-fnext-runtime"
+Generate output compatible with the NeXT runtime.  This is the default
+for NeXT-based systems, including Darwin and Mac \s-1OS\s0 X.  The macro
+\&\f(CW\*(C`_\|_NEXT_RUNTIME_\|_\*(C'\fR is predefined if (and only if) this option is
+used.
+.IP "\fB\-fno\-nil\-receivers\fR" 4
+.IX Item "-fno-nil-receivers"
+Assume that all Objective-C message dispatches (\f(CW\*(C`[receiver
+message:arg]\*(C'\fR) in this translation unit ensure that the receiver is
+not \f(CW\*(C`nil\*(C'\fR.  This allows for more efficient entry points in the
+runtime to be used.  This option is only available in conjunction with
+the NeXT runtime and \s-1ABI\s0 version 0 or 1.
+.IP "\fB\-fobjc\-abi\-version=\fR\fIn\fR" 4
+.IX Item "-fobjc-abi-version=n"
+Use version \fIn\fR of the Objective-C \s-1ABI\s0 for the selected runtime.
+This option is currently supported only for the NeXT runtime.  In that
+case, Version 0 is the traditional (32\-bit) \s-1ABI\s0 without support for
+properties and other Objective-C 2.0 additions.  Version 1 is the
+traditional (32\-bit) \s-1ABI\s0 with support for properties and other
+Objective-C 2.0 additions.  Version 2 is the modern (64\-bit) \s-1ABI\s0.  If
+nothing is specified, the default is Version 0 on 32\-bit target
+machines, and Version 2 on 64\-bit target machines.
+.IP "\fB\-fobjc\-call\-cxx\-cdtors\fR" 4
+.IX Item "-fobjc-call-cxx-cdtors"
+For each Objective-C class, check if any of its instance variables is a
+\&\*(C+ object with a non-trivial default constructor.  If so, synthesize a
+special \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR instance method that will run
+non-trivial default constructors on any such instance variables, in order,
+and then return \f(CW\*(C`self\*(C'\fR.  Similarly, check if any instance variable
+is a \*(C+ object with a non-trivial destructor, and if so, synthesize a
+special \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR method that will run
+all such default destructors, in reverse order.
+.Sp
+The \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR and \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR
+methods thusly generated will only operate on instance variables
+declared in the current Objective-C class, and not those inherited
+from superclasses.  It is the responsibility of the Objective-C
+runtime to invoke all such methods in an object's inheritance
+hierarchy.  The \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR methods will be invoked
+by the runtime immediately after a new object instance is allocated;
+the \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods will be invoked immediately
+before the runtime deallocates an object instance.
+.Sp
+As of this writing, only the NeXT runtime on Mac \s-1OS\s0 X 10.4 and later has
+support for invoking the \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR and
+\&\f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods.
+.IP "\fB\-fobjc\-direct\-dispatch\fR" 4
+.IX Item "-fobjc-direct-dispatch"
+Allow fast jumps to the message dispatcher.  On Darwin this is
+accomplished via the comm page.
+.IP "\fB\-fobjc\-exceptions\fR" 4
+.IX Item "-fobjc-exceptions"
+Enable syntactic support for structured exception handling in
+Objective-C, similar to what is offered by \*(C+ and Java.  This option
+is required to use the Objective-C keywords \f(CW@try\fR,
+\&\f(CW@throw\fR, \f(CW@catch\fR, \f(CW@finally\fR and
+\&\f(CW@synchronized\fR.  This option is available with both the \s-1GNU\s0
+runtime and the NeXT runtime (but not available in conjunction with
+the NeXT runtime on Mac \s-1OS\s0 X 10.2 and earlier).
+.IP "\fB\-fobjc\-gc\fR" 4
+.IX Item "-fobjc-gc"
+Enable garbage collection (\s-1GC\s0) in Objective-C and Objective\-\*(C+
+programs.  This option is only available with the NeXT runtime; the
+\&\s-1GNU\s0 runtime has a different garbage collection implementation that
+does not require special compiler flags.
+.IP "\fB\-fobjc\-nilcheck\fR" 4
+.IX Item "-fobjc-nilcheck"
+For the NeXT runtime with version 2 of the \s-1ABI\s0, check for a nil
+receiver in method invocations before doing the actual method call.
+This is the default and can be disabled using
+\&\fB\-fno\-objc\-nilcheck\fR.  Class methods and super calls are never
+checked for nil in this way no matter what this flag is set to.
+Currently this flag does nothing when the \s-1GNU\s0 runtime, or an older
+version of the NeXT runtime \s-1ABI\s0, is used.
+.IP "\fB\-fobjc\-std=objc1\fR" 4
+.IX Item "-fobjc-std=objc1"
+Conform to the language syntax of Objective-C 1.0, the language
+recognized by \s-1GCC\s0 4.0.  This only affects the Objective-C additions to
+the C/\*(C+ language; it does not affect conformance to C/\*(C+ standards,
+which is controlled by the separate C/\*(C+ dialect option flags.  When
+this option is used with the Objective-C or Objective\-\*(C+ compiler,
+any Objective-C syntax that is not recognized by \s-1GCC\s0 4.0 is rejected.
+This is useful if you need to make sure that your Objective-C code can
+be compiled with older versions of \s-1GCC\s0.
+.IP "\fB\-freplace\-objc\-classes\fR" 4
+.IX Item "-freplace-objc-classes"
+Emit a special marker instructing \fB\f(BIld\fB\|(1)\fR not to statically link in
+the resulting object file, and allow \fB\f(BIdyld\fB\|(1)\fR to load it in at
+run time instead.  This is used in conjunction with the Fix-and-Continue
+debugging mode, where the object file in question may be recompiled and
+dynamically reloaded in the course of program execution, without the need
+to restart the program itself.  Currently, Fix-and-Continue functionality
+is only available in conjunction with the NeXT runtime on Mac \s-1OS\s0 X 10.3
+and later.
+.IP "\fB\-fzero\-link\fR" 4
+.IX Item "-fzero-link"
+When compiling for the NeXT runtime, the compiler ordinarily replaces calls
+to \f(CW\*(C`objc_getClass("...")\*(C'\fR (when the name of the class is known at
+compile time) with static class references that get initialized at load time,
+which improves run-time performance.  Specifying the \fB\-fzero\-link\fR flag
+suppresses this behavior and causes calls to \f(CW\*(C`objc_getClass("...")\*(C'\fR
+to be retained.  This is useful in Zero-Link debugging mode, since it allows
+for individual class implementations to be modified during program execution.
+The \s-1GNU\s0 runtime currently always retains calls to \f(CW\*(C`objc_get_class("...")\*(C'\fR
+regardless of command line options.
+.IP "\fB\-gen\-decls\fR" 4
+.IX Item "-gen-decls"
+Dump interface declarations for all classes seen in the source file to a
+file named \fI\fIsourcename\fI.decl\fR.
+.IP "\fB\-Wassign\-intercept\fR (Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wassign-intercept (Objective-C and Objective- only)"
+Warn whenever an Objective-C assignment is being intercepted by the
+garbage collector.
+.IP "\fB\-Wno\-protocol\fR (Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-protocol (Objective-C and Objective- only)"
+If a class is declared to implement a protocol, a warning is issued for
+every method in the protocol that is not implemented by the class.  The
+default behavior is to issue a warning for every method not explicitly
+implemented in the class, even if a method implementation is inherited
+from the superclass.  If you use the \fB\-Wno\-protocol\fR option, then
+methods inherited from the superclass are considered to be implemented,
+and no warning is issued for them.
+.IP "\fB\-Wselector\fR (Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wselector (Objective-C and Objective- only)"
+Warn if multiple methods of different types for the same selector are
+found during compilation.  The check is performed on the list of methods
+in the final stage of compilation.  Additionally, a check is performed
+for each selector appearing in a \f(CW\*(C`@selector(...)\*(C'\fR
+expression, and a corresponding method for that selector has been found
+during compilation.  Because these checks scan the method table only at
+the end of compilation, these warnings are not produced if the final
+stage of compilation is not reached, for example because an error is
+found during compilation, or because the \fB\-fsyntax\-only\fR option is
+being used.
+.IP "\fB\-Wstrict\-selector\-match\fR (Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wstrict-selector-match (Objective-C and Objective- only)"
+Warn if multiple methods with differing argument and/or return types are
+found for a given selector when attempting to send a message using this
+selector to a receiver of type \f(CW\*(C`id\*(C'\fR or \f(CW\*(C`Class\*(C'\fR.  When this flag
+is off (which is the default behavior), the compiler will omit such warnings
+if any differences found are confined to types which share the same size
+and alignment.
+.IP "\fB\-Wundeclared\-selector\fR (Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wundeclared-selector (Objective-C and Objective- only)"
+Warn if a \f(CW\*(C`@selector(...)\*(C'\fR expression referring to an
+undeclared selector is found.  A selector is considered undeclared if no
+method with that name has been declared before the
+\&\f(CW\*(C`@selector(...)\*(C'\fR expression, either explicitly in an
+\&\f(CW@interface\fR or \f(CW@protocol\fR declaration, or implicitly in
+an \f(CW@implementation\fR section.  This option always performs its
+checks as soon as a \f(CW\*(C`@selector(...)\*(C'\fR expression is found,
+while \fB\-Wselector\fR only performs its checks in the final stage of
+compilation.  This also enforces the coding style convention
+that methods and selectors must be declared before being used.
+.IP "\fB\-print\-objc\-runtime\-info\fR" 4
+.IX Item "-print-objc-runtime-info"
+Generate C header describing the largest structure that is passed by
+value, if any.
+.SS "Options to Control Diagnostic Messages Formatting"
+.IX Subsection "Options to Control Diagnostic Messages Formatting"
+Traditionally, diagnostic messages have been formatted irrespective of
+the output device's aspect (e.g. its width, ...).  The options described
+below can be used to control the diagnostic messages formatting
+algorithm, e.g. how many characters per line, how often source location
+information should be reported.  Right now, only the \*(C+ front end can
+honor these options.  However it is expected, in the near future, that
+the remaining front ends would be able to digest them correctly.
+.IP "\fB\-fmessage\-length=\fR\fIn\fR" 4
+.IX Item "-fmessage-length=n"
+Try to format error messages so that they fit on lines of about \fIn\fR
+characters.  The default is 72 characters for \fBg++\fR and 0 for the rest of
+the front ends supported by \s-1GCC\s0.  If \fIn\fR is zero, then no
+line-wrapping will be done; each error message will appear on a single
+line.
+.IP "\fB\-fdiagnostics\-show\-location=once\fR" 4
+.IX Item "-fdiagnostics-show-location=once"
+Only meaningful in line-wrapping mode.  Instructs the diagnostic messages
+reporter to emit \fIonce\fR source location information; that is, in
+case the message is too long to fit on a single physical line and has to
+be wrapped, the source location won't be emitted (as prefix) again,
+over and over, in subsequent continuation lines.  This is the default
+behavior.
+.IP "\fB\-fdiagnostics\-show\-location=every\-line\fR" 4
+.IX Item "-fdiagnostics-show-location=every-line"
+Only meaningful in line-wrapping mode.  Instructs the diagnostic
+messages reporter to emit the same source location information (as
+prefix) for physical lines that result from the process of breaking
+a message which is too long to fit on a single line.
+.IP "\fB\-fno\-diagnostics\-show\-option\fR" 4
+.IX Item "-fno-diagnostics-show-option"
+By default, each diagnostic emitted includes text which indicates the
+command line option that directly controls the diagnostic (if such an
+option is known to the diagnostic machinery).  Specifying the
+\&\fB\-fno\-diagnostics\-show\-option\fR flag suppresses that behavior.
+.IP "\fB\-Wcoverage\-mismatch\fR" 4
+.IX Item "-Wcoverage-mismatch"
+Warn if feedback profiles do not match when using the
+\&\fB\-fprofile\-use\fR option.
+If a source file was changed between \fB\-fprofile\-gen\fR and
+\&\fB\-fprofile\-use\fR, the files with the profile feedback can fail
+to match the source file and \s-1GCC\s0 can not use the profile feedback
+information.  By default, this warning is enabled and is treated as an
+error.  \fB\-Wno\-coverage\-mismatch\fR can be used to disable the
+warning or \fB\-Wno\-error=coverage\-mismatch\fR can be used to
+disable the error.  Disable the error for this warning can result in
+poorly optimized code, so disabling the error is useful only in the
+case of very minor changes such as bug fixes to an existing code-base.
+Completely disabling the warning is not recommended.
+.SS "Options to Request or Suppress Warnings"
+.IX Subsection "Options to Request or Suppress Warnings"
+Warnings are diagnostic messages that report constructions which
+are not inherently erroneous but which are risky or suggest there
+may have been an error.
+.PP
+The following language-independent options do not enable specific
+warnings but control the kinds of diagnostics produced by \s-1GCC\s0.
+.IP "\fB\-fsyntax\-only\fR" 4
+.IX Item "-fsyntax-only"
+Check the code for syntax errors, but don't do anything beyond that.
+.IP "\fB\-fmax\-errors=\fR\fIn\fR" 4
+.IX Item "-fmax-errors=n"
+Limits the maximum number of error messages to \fIn\fR, at which point
+\&\s-1GCC\s0 bails out rather than attempting to continue processing the source
+code.  If \fIn\fR is 0 (the default), there is no limit on the number
+of error messages produced.  If \fB\-Wfatal\-errors\fR is also
+specified, then \fB\-Wfatal\-errors\fR takes precedence over this
+option.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+Inhibit all warning messages.
+.IP "\fB\-Werror\fR" 4
+.IX Item "-Werror"
+Make all warnings into errors.
+.IP "\fB\-Werror=\fR" 4
+.IX Item "-Werror="
+Make the specified warning into an error.  The specifier for a warning
+is appended, for example \fB\-Werror=switch\fR turns the warnings
+controlled by \fB\-Wswitch\fR into errors.  This switch takes a
+negative form, to be used to negate \fB\-Werror\fR for specific
+warnings, for example \fB\-Wno\-error=switch\fR makes
+\&\fB\-Wswitch\fR warnings not be errors, even when \fB\-Werror\fR
+is in effect.
+.Sp
+The warning message for each controllable warning includes the
+option which controls the warning.  That option can then be used with
+\&\fB\-Werror=\fR and \fB\-Wno\-error=\fR as described above.
+(Printing of the option in the warning message can be disabled using the
+\&\fB\-fno\-diagnostics\-show\-option\fR flag.)
+.Sp
+Note that specifying \fB\-Werror=\fR\fIfoo\fR automatically implies
+\&\fB\-W\fR\fIfoo\fR.  However, \fB\-Wno\-error=\fR\fIfoo\fR does not
+imply anything.
+.IP "\fB\-Wfatal\-errors\fR" 4
+.IX Item "-Wfatal-errors"
+This option causes the compiler to abort compilation on the first error
+occurred rather than trying to keep going and printing further error
+messages.
+.PP
+You can request many specific warnings with options beginning
+\&\fB\-W\fR, for example \fB\-Wimplicit\fR to request warnings on
+implicit declarations.  Each of these specific warning options also
+has a negative form beginning \fB\-Wno\-\fR to turn off warnings; for
+example, \fB\-Wno\-implicit\fR.  This manual lists only one of the
+two forms, whichever is not the default.  For further,
+language-specific options also refer to \fB\*(C+ Dialect Options\fR and
+\&\fBObjective-C and Objective\-\*(C+ Dialect Options\fR.
+.PP
+When an unrecognized warning option is requested (e.g.,
+\&\fB\-Wunknown\-warning\fR), \s-1GCC\s0 will emit a diagnostic stating
+that the option is not recognized.  However, if the \fB\-Wno\-\fR form
+is used, the behavior is slightly different: No diagnostic will be
+produced for \fB\-Wno\-unknown\-warning\fR unless other diagnostics
+are being produced.  This allows the use of new \fB\-Wno\-\fR options
+with old compilers, but if something goes wrong, the compiler will
+warn that an unrecognized option was used.
+.IP "\fB\-pedantic\fR" 4
+.IX Item "-pedantic"
+Issue all the warnings demanded by strict \s-1ISO\s0 C and \s-1ISO\s0 \*(C+;
+reject all programs that use forbidden extensions, and some other
+programs that do not follow \s-1ISO\s0 C and \s-1ISO\s0 \*(C+.  For \s-1ISO\s0 C, follows the
+version of the \s-1ISO\s0 C standard specified by any \fB\-std\fR option used.
+.Sp
+Valid \s-1ISO\s0 C and \s-1ISO\s0 \*(C+ programs should compile properly with or without
+this option (though a rare few will require \fB\-ansi\fR or a
+\&\fB\-std\fR option specifying the required version of \s-1ISO\s0 C).  However,
+without this option, certain \s-1GNU\s0 extensions and traditional C and \*(C+
+features are supported as well.  With this option, they are rejected.
+.Sp
+\&\fB\-pedantic\fR does not cause warning messages for use of the
+alternate keywords whose names begin and end with \fB_\|_\fR.  Pedantic
+warnings are also disabled in the expression that follows
+\&\f(CW\*(C`_\|_extension_\|_\*(C'\fR.  However, only system header files should use
+these escape routes; application programs should avoid them.
+.Sp
+Some users try to use \fB\-pedantic\fR to check programs for strict \s-1ISO\s0
+C conformance.  They soon find that it does not do quite what they want:
+it finds some non-ISO practices, but not all\-\-\-only those for which
+\&\s-1ISO\s0 C \fIrequires\fR a diagnostic, and some others for which
+diagnostics have been added.
+.Sp
+A feature to report any failure to conform to \s-1ISO\s0 C might be useful in
+some instances, but would require considerable additional work and would
+be quite different from \fB\-pedantic\fR.  We don't have plans to
+support such a feature in the near future.
+.Sp
+Where the standard specified with \fB\-std\fR represents a \s-1GNU\s0
+extended dialect of C, such as \fBgnu90\fR or \fBgnu99\fR, there is a
+corresponding \fIbase standard\fR, the version of \s-1ISO\s0 C on which the \s-1GNU\s0
+extended dialect is based.  Warnings from \fB\-pedantic\fR are given
+where they are required by the base standard.  (It would not make sense
+for such warnings to be given only for features not in the specified \s-1GNU\s0
+C dialect, since by definition the \s-1GNU\s0 dialects of C include all
+features the compiler supports with the given option, and there would be
+nothing to warn about.)
+.IP "\fB\-pedantic\-errors\fR" 4
+.IX Item "-pedantic-errors"
+Like \fB\-pedantic\fR, except that errors are produced rather than
+warnings.
+.IP "\fB\-Wall\fR" 4
+.IX Item "-Wall"
+This enables all the warnings about constructions that some users
+consider questionable, and that are easy to avoid (or modify to
+prevent the warning), even in conjunction with macros.  This also
+enables some language-specific warnings described in \fB\*(C+ Dialect
+Options\fR and \fBObjective-C and Objective\-\*(C+ Dialect Options\fR.
+.Sp
+\&\fB\-Wall\fR turns on the following warning flags:
+.Sp
+\&\fB\-Waddress   
+\&\-Warray\-bounds\fR (only with\fB \fR\fB\-O2\fR)  
+\&\fB\-Wc++0x\-compat  
+\&\-Wchar\-subscripts  
+\&\-Wenum\-compare\fR (in C/Objc; this is on by default in \*(C+) 
+\&\fB\-Wimplicit\-int\fR (C and Objective-C only) 
+\&\fB\-Wimplicit\-function\-declaration\fR (C and Objective-C only) 
+\&\fB\-Wcomment  
+\&\-Wformat   
+\&\-Wmain\fR (only for C/ObjC and unless\fB \fR\fB\-ffreestanding\fR)  
+\&\fB\-Wmissing\-braces  
+\&\-Wnonnull  
+\&\-Wparentheses  
+\&\-Wpointer\-sign  
+\&\-Wreorder   
+\&\-Wreturn\-type  
+\&\-Wsequence\-point  
+\&\-Wsign\-compare\fR (only in \*(C+)  
+\&\fB\-Wstrict\-aliasing  
+\&\-Wstrict\-overflow=1  
+\&\-Wswitch  
+\&\-Wtrigraphs  
+\&\-Wuninitialized  
+\&\-Wunknown\-pragmas  
+\&\-Wunused\-function  
+\&\-Wunused\-label     
+\&\-Wunused\-value     
+\&\-Wunused\-variable  
+\&\-Wvolatile\-register\-var\fR
+.Sp
+Note that some warning flags are not implied by \fB\-Wall\fR.  Some of
+them warn about constructions that users generally do not consider
+questionable, but which occasionally you might wish to check for;
+others warn about constructions that are necessary or hard to avoid in
+some cases, and there is no simple way to modify the code to suppress
+the warning. Some of them are enabled by \fB\-Wextra\fR but many of
+them must be enabled individually.
+.IP "\fB\-Wextra\fR" 4
+.IX Item "-Wextra"
+This enables some extra warning flags that are not enabled by
+\&\fB\-Wall\fR. (This option used to be called \fB\-W\fR.  The older
+name is still supported, but the newer name is more descriptive.)
+.Sp
+\&\fB\-Wclobbered  
+\&\-Wempty\-body  
+\&\-Wignored\-qualifiers 
+\&\-Wmissing\-field\-initializers  
+\&\-Wmissing\-parameter\-type\fR (C only)  
+\&\fB\-Wold\-style\-declaration\fR (C only)  
+\&\fB\-Woverride\-init  
+\&\-Wsign\-compare  
+\&\-Wtype\-limits  
+\&\-Wuninitialized  
+\&\-Wunused\-parameter\fR (only with\fB \fR\fB\-Wunused\fR\fB \fRor\fB \fR\fB\-Wall\fR) 
+\&\fB\-Wunused\-but\-set\-parameter\fR (only with\fB \fR\fB\-Wunused\fR\fB \fRor\fB \fR\fB\-Wall\fR)  \fB \fR
+.Sp
+The option \fB\-Wextra\fR also prints warning messages for the
+following cases:
+.RS 4
+.IP "\(bu" 4
+A pointer is compared against integer zero with \fB<\fR, \fB<=\fR,
+\&\fB>\fR, or \fB>=\fR.
+.IP "\(bu" 4
+(\*(C+ only) An enumerator and a non-enumerator both appear in a
+conditional expression.
+.IP "\(bu" 4
+(\*(C+ only) Ambiguous virtual bases.
+.IP "\(bu" 4
+(\*(C+ only) Subscripting an array which has been declared \fBregister\fR.
+.IP "\(bu" 4
+(\*(C+ only) Taking the address of a variable which has been declared
+\&\fBregister\fR.
+.IP "\(bu" 4
+(\*(C+ only) A base class is not initialized in a derived class' copy
+constructor.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Wchar\-subscripts\fR" 4
+.IX Item "-Wchar-subscripts"
+Warn if an array subscript has type \f(CW\*(C`char\*(C'\fR.  This is a common cause
+of error, as programmers often forget that this type is signed on some
+machines.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wcomment\fR" 4
+.IX Item "-Wcomment"
+Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
+comment, or whenever a Backslash-Newline appears in a \fB//\fR comment.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wno\-cpp\fR" 4
+.IX Item "-Wno-cpp"
+(C, Objective-C, \*(C+, Objective\-\*(C+ and Fortran only)
+.Sp
+Suppress warning messages emitted by \f(CW\*(C`#warning\*(C'\fR directives.
+.IP "\fB\-Wdouble\-promotion\fR (C, \*(C+, Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wdouble-promotion (C, , Objective-C and Objective- only)"
+Give a warning when a value of type \f(CW\*(C`float\*(C'\fR is implicitly
+promoted to \f(CW\*(C`double\*(C'\fR.  CPUs with a 32\-bit \*(L"single-precision\*(R"
+floating-point unit implement \f(CW\*(C`float\*(C'\fR in hardware, but emulate
+\&\f(CW\*(C`double\*(C'\fR in software.  On such a machine, doing computations
+using \f(CW\*(C`double\*(C'\fR values is much more expensive because of the
+overhead required for software emulation.
+.Sp
+It is easy to accidentally do computations with \f(CW\*(C`double\*(C'\fR because
+floating-point literals are implicitly of type \f(CW\*(C`double\*(C'\fR.  For
+example, in:
+.Sp
+.Vb 4
+\&        float area(float radius)
+\&        {
+\&           return 3.14159 * radius * radius;        
+\&        }
+.Ve
+.Sp
+the compiler will perform the entire computation with \f(CW\*(C`double\*(C'\fR
+because the floating-point literal is a \f(CW\*(C`double\*(C'\fR.
+.IP "\fB\-Wformat\fR" 4
+.IX Item "-Wformat"
+Check calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR, etc., to make sure that
+the arguments supplied have types appropriate to the format string
+specified, and that the conversions specified in the format string make
+sense.  This includes standard functions, and others specified by format
+attributes, in the \f(CW\*(C`printf\*(C'\fR,
+\&\f(CW\*(C`scanf\*(C'\fR, \f(CW\*(C`strftime\*(C'\fR and \f(CW\*(C`strfmon\*(C'\fR (an X/Open extension,
+not in the C standard) families (or other target-specific families).
+Which functions are checked without format attributes having been
+specified depends on the standard version selected, and such checks of
+functions without the attribute specified are disabled by
+\&\fB\-ffreestanding\fR or \fB\-fno\-builtin\fR.
+.Sp
+The formats are checked against the format features supported by \s-1GNU\s0
+libc version 2.2.  These include all \s-1ISO\s0 C90 and C99 features, as well
+as features from the Single Unix Specification and some \s-1BSD\s0 and \s-1GNU\s0
+extensions.  Other library implementations may not support all these
+features; \s-1GCC\s0 does not support warning about features that go beyond a
+particular library's limitations.  However, if \fB\-pedantic\fR is used
+with \fB\-Wformat\fR, warnings will be given about format features not
+in the selected standard version (but not for \f(CW\*(C`strfmon\*(C'\fR formats,
+since those are not in any version of the C standard).
+.Sp
+Since \fB\-Wformat\fR also checks for null format arguments for
+several functions, \fB\-Wformat\fR also implies \fB\-Wnonnull\fR.
+.Sp
+\&\fB\-Wformat\fR is included in \fB\-Wall\fR.  For more control over some
+aspects of format checking, the options \fB\-Wformat\-y2k\fR,
+\&\fB\-Wno\-format\-extra\-args\fR, \fB\-Wno\-format\-zero\-length\fR,
+\&\fB\-Wformat\-nonliteral\fR, \fB\-Wformat\-security\fR, and
+\&\fB\-Wformat=2\fR are available, but are not included in \fB\-Wall\fR.
+.IP "\fB\-Wformat\-y2k\fR" 4
+.IX Item "-Wformat-y2k"
+If \fB\-Wformat\fR is specified, also warn about \f(CW\*(C`strftime\*(C'\fR
+formats which may yield only a two-digit year.
+.IP "\fB\-Wno\-format\-contains\-nul\fR" 4
+.IX Item "-Wno-format-contains-nul"
+If \fB\-Wformat\fR is specified, do not warn about format strings that
+contain \s-1NUL\s0 bytes.
+.IP "\fB\-Wno\-format\-extra\-args\fR" 4
+.IX Item "-Wno-format-extra-args"
+If \fB\-Wformat\fR is specified, do not warn about excess arguments to a
+\&\f(CW\*(C`printf\*(C'\fR or \f(CW\*(C`scanf\*(C'\fR format function.  The C standard specifies
+that such arguments are ignored.
+.Sp
+Where the unused arguments lie between used arguments that are
+specified with \fB$\fR operand number specifications, normally
+warnings are still given, since the implementation could not know what
+type to pass to \f(CW\*(C`va_arg\*(C'\fR to skip the unused arguments.  However,
+in the case of \f(CW\*(C`scanf\*(C'\fR formats, this option will suppress the
+warning if the unused arguments are all pointers, since the Single
+Unix Specification says that such unused arguments are allowed.
+.IP "\fB\-Wno\-format\-zero\-length\fR (C and Objective-C only)" 4
+.IX Item "-Wno-format-zero-length (C and Objective-C only)"
+If \fB\-Wformat\fR is specified, do not warn about zero-length formats.
+The C standard specifies that zero-length formats are allowed.
+.IP "\fB\-Wformat\-nonliteral\fR" 4
+.IX Item "-Wformat-nonliteral"
+If \fB\-Wformat\fR is specified, also warn if the format string is not a
+string literal and so cannot be checked, unless the format function
+takes its format arguments as a \f(CW\*(C`va_list\*(C'\fR.
+.IP "\fB\-Wformat\-security\fR" 4
+.IX Item "-Wformat-security"
+If \fB\-Wformat\fR is specified, also warn about uses of format
+functions that represent possible security problems.  At present, this
+warns about calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR functions where the
+format string is not a string literal and there are no format arguments,
+as in \f(CW\*(C`printf (foo);\*(C'\fR.  This may be a security hole if the format
+string came from untrusted input and contains \fB\f(CB%n\fB\fR.  (This is
+currently a subset of what \fB\-Wformat\-nonliteral\fR warns about, but
+in future warnings may be added to \fB\-Wformat\-security\fR that are not
+included in \fB\-Wformat\-nonliteral\fR.)
+.IP "\fB\-Wformat=2\fR" 4
+.IX Item "-Wformat=2"
+Enable \fB\-Wformat\fR plus format checks not included in
+\&\fB\-Wformat\fR.  Currently equivalent to \fB\-Wformat
+\&\-Wformat\-nonliteral \-Wformat\-security \-Wformat\-y2k\fR.
+.IP "\fB\-Wnonnull\fR (C and Objective-C only)" 4
+.IX Item "-Wnonnull (C and Objective-C only)"
+Warn about passing a null pointer for arguments marked as
+requiring a non-null value by the \f(CW\*(C`nonnull\*(C'\fR function attribute.
+.Sp
+\&\fB\-Wnonnull\fR is included in \fB\-Wall\fR and \fB\-Wformat\fR.  It
+can be disabled with the \fB\-Wno\-nonnull\fR option.
+.IP "\fB\-Winit\-self\fR (C, \*(C+, Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Winit-self (C, , Objective-C and Objective- only)"
+Warn about uninitialized variables which are initialized with themselves.
+Note this option can only be used with the \fB\-Wuninitialized\fR option.
+.Sp
+For example, \s-1GCC\s0 will warn about \f(CW\*(C`i\*(C'\fR being uninitialized in the
+following snippet only when \fB\-Winit\-self\fR has been specified:
+.Sp
+.Vb 5
+\&        int f()
+\&        {
+\&          int i = i;
+\&          return i;
+\&        }
+.Ve
+.IP "\fB\-Wimplicit\-int\fR (C and Objective-C only)" 4
+.IX Item "-Wimplicit-int (C and Objective-C only)"
+Warn when a declaration does not specify a type.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wimplicit\-function\-declaration\fR (C and Objective-C only)" 4
+.IX Item "-Wimplicit-function-declaration (C and Objective-C only)"
+Give a warning whenever a function is used before being declared. In
+C99 mode (\fB\-std=c99\fR or \fB\-std=gnu99\fR), this warning is
+enabled by default and it is made into an error by
+\&\fB\-pedantic\-errors\fR. This warning is also enabled by
+\&\fB\-Wall\fR.
+.IP "\fB\-Wimplicit\fR (C and Objective-C only)" 4
+.IX Item "-Wimplicit (C and Objective-C only)"
+Same as \fB\-Wimplicit\-int\fR and \fB\-Wimplicit\-function\-declaration\fR.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wignored\-qualifiers\fR (C and \*(C+ only)" 4
+.IX Item "-Wignored-qualifiers (C and  only)"
+Warn if the return type of a function has a type qualifier
+such as \f(CW\*(C`const\*(C'\fR.  For \s-1ISO\s0 C such a type qualifier has no effect,
+since the value returned by a function is not an lvalue.
+For \*(C+, the warning is only emitted for scalar types or \f(CW\*(C`void\*(C'\fR.
+\&\s-1ISO\s0 C prohibits qualified \f(CW\*(C`void\*(C'\fR return types on function
+definitions, so such return types always receive a warning
+even without this option.
+.Sp
+This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wmain\fR" 4
+.IX Item "-Wmain"
+Warn if the type of \fBmain\fR is suspicious.  \fBmain\fR should be
+a function with external linkage, returning int, taking either zero
+arguments, two, or three arguments of appropriate types.  This warning
+is enabled by default in \*(C+ and is enabled by either \fB\-Wall\fR
+or \fB\-pedantic\fR.
+.IP "\fB\-Wmissing\-braces\fR" 4
+.IX Item "-Wmissing-braces"
+Warn if an aggregate or union initializer is not fully bracketed.  In
+the following example, the initializer for \fBa\fR is not fully
+bracketed, but that for \fBb\fR is fully bracketed.
+.Sp
+.Vb 2
+\&        int a[2][2] = { 0, 1, 2, 3 };
+\&        int b[2][2] = { { 0, 1 }, { 2, 3 } };
+.Ve
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wmissing\-include\-dirs\fR (C, \*(C+, Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wmissing-include-dirs (C, , Objective-C and Objective- only)"
+Warn if a user-supplied include directory does not exist.
+.IP "\fB\-Wparentheses\fR" 4
+.IX Item "-Wparentheses"
+Warn if parentheses are omitted in certain contexts, such
+as when there is an assignment in a context where a truth value
+is expected, or when operators are nested whose precedence people
+often get confused about.
+.Sp
+Also warn if a comparison like \fBx<=y<=z\fR appears; this is
+equivalent to \fB(x<=y ? 1 : 0) <= z\fR, which is a different
+interpretation from that of ordinary mathematical notation.
+.Sp
+Also warn about constructions where there may be confusion to which
+\&\f(CW\*(C`if\*(C'\fR statement an \f(CW\*(C`else\*(C'\fR branch belongs.  Here is an example of
+such a case:
+.Sp
+.Vb 7
+\&        {
+\&          if (a)
+\&            if (b)
+\&              foo ();
+\&          else
+\&            bar ();
+\&        }
+.Ve
+.Sp
+In C/\*(C+, every \f(CW\*(C`else\*(C'\fR branch belongs to the innermost possible
+\&\f(CW\*(C`if\*(C'\fR statement, which in this example is \f(CW\*(C`if (b)\*(C'\fR.  This is
+often not what the programmer expected, as illustrated in the above
+example by indentation the programmer chose.  When there is the
+potential for this confusion, \s-1GCC\s0 will issue a warning when this flag
+is specified.  To eliminate the warning, add explicit braces around
+the innermost \f(CW\*(C`if\*(C'\fR statement so there is no way the \f(CW\*(C`else\*(C'\fR
+could belong to the enclosing \f(CW\*(C`if\*(C'\fR.  The resulting code would
+look like this:
+.Sp
+.Vb 9
+\&        {
+\&          if (a)
+\&            {
+\&              if (b)
+\&                foo ();
+\&              else
+\&                bar ();
+\&            }
+\&        }
+.Ve
+.Sp
+Also warn for dangerous uses of the 
+?: with omitted middle operand \s-1GNU\s0 extension. When the condition
+in the ?: operator is a boolean expression the omitted value will
+be always 1. Often the user expects it to be a value computed
+inside the conditional expression instead.
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wsequence\-point\fR" 4
+.IX Item "-Wsequence-point"
+Warn about code that may have undefined semantics because of violations
+of sequence point rules in the C and \*(C+ standards.
+.Sp
+The C and \*(C+ standards defines the order in which expressions in a C/\*(C+
+program are evaluated in terms of \fIsequence points\fR, which represent
+a partial ordering between the execution of parts of the program: those
+executed before the sequence point, and those executed after it.  These
+occur after the evaluation of a full expression (one which is not part
+of a larger expression), after the evaluation of the first operand of a
+\&\f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, \f(CW\*(C`? :\*(C'\fR or \f(CW\*(C`,\*(C'\fR (comma) operator, before a
+function is called (but after the evaluation of its arguments and the
+expression denoting the called function), and in certain other places.
+Other than as expressed by the sequence point rules, the order of
+evaluation of subexpressions of an expression is not specified.  All
+these rules describe only a partial order rather than a total order,
+since, for example, if two functions are called within one expression
+with no sequence point between them, the order in which the functions
+are called is not specified.  However, the standards committee have
+ruled that function calls do not overlap.
+.Sp
+It is not specified when between sequence points modifications to the
+values of objects take effect.  Programs whose behavior depends on this
+have undefined behavior; the C and \*(C+ standards specify that \*(L"Between
+the previous and next sequence point an object shall have its stored
+value modified at most once by the evaluation of an expression.
+Furthermore, the prior value shall be read only to determine the value
+to be stored.\*(R".  If a program breaks these rules, the results on any
+particular implementation are entirely unpredictable.
+.Sp
+Examples of code with undefined behavior are \f(CW\*(C`a = a++;\*(C'\fR, \f(CW\*(C`a[n]
+= b[n++]\*(C'\fR and \f(CW\*(C`a[i++] = i;\*(C'\fR.  Some more complicated cases are not
+diagnosed by this option, and it may give an occasional false positive
+result, but in general it has been found fairly effective at detecting
+this sort of problem in programs.
+.Sp
+The standard is worded confusingly, therefore there is some debate
+over the precise meaning of the sequence point rules in subtle cases.
+Links to discussions of the problem, including proposed formal
+definitions, may be found on the \s-1GCC\s0 readings page, at
+<\fBhttp://gcc.gnu.org/readings.html\fR>.
+.Sp
+This warning is enabled by \fB\-Wall\fR for C and \*(C+.
+.IP "\fB\-Wreturn\-type\fR" 4
+.IX Item "-Wreturn-type"
+Warn whenever a function is defined with a return-type that defaults
+to \f(CW\*(C`int\*(C'\fR.  Also warn about any \f(CW\*(C`return\*(C'\fR statement with no
+return-value in a function whose return-type is not \f(CW\*(C`void\*(C'\fR
+(falling off the end of the function body is considered returning
+without a value), and about a \f(CW\*(C`return\*(C'\fR statement with an
+expression in a function whose return-type is \f(CW\*(C`void\*(C'\fR.
+.Sp
+For \*(C+, a function without return type always produces a diagnostic
+message, even when \fB\-Wno\-return\-type\fR is specified.  The only
+exceptions are \fBmain\fR and functions defined in system headers.
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wswitch\fR" 4
+.IX Item "-Wswitch"
+Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type
+and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that
+enumeration.  (The presence of a \f(CW\*(C`default\*(C'\fR label prevents this
+warning.)  \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also
+provoke warnings when this option is used (even if there is a
+\&\f(CW\*(C`default\*(C'\fR label).
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wswitch\-default\fR" 4
+.IX Item "-Wswitch-default"
+Warn whenever a \f(CW\*(C`switch\*(C'\fR statement does not have a \f(CW\*(C`default\*(C'\fR
+case.
+.IP "\fB\-Wswitch\-enum\fR" 4
+.IX Item "-Wswitch-enum"
+Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type
+and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that
+enumeration.  \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also
+provoke warnings when this option is used.  The only difference
+between \fB\-Wswitch\fR and this option is that this option gives a
+warning about an omitted enumeration code even if there is a
+\&\f(CW\*(C`default\*(C'\fR label.
+.IP "\fB\-Wsync\-nand\fR (C and \*(C+ only)" 4
+.IX Item "-Wsync-nand (C and  only)"
+Warn when \f(CW\*(C`_\|_sync_fetch_and_nand\*(C'\fR and \f(CW\*(C`_\|_sync_nand_and_fetch\*(C'\fR
+built-in functions are used.  These functions changed semantics in \s-1GCC\s0 4.4.
+.IP "\fB\-Wtrigraphs\fR" 4
+.IX Item "-Wtrigraphs"
+Warn if any trigraphs are encountered that might change the meaning of
+the program (trigraphs within comments are not warned about).
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wunused\-but\-set\-parameter\fR" 4
+.IX Item "-Wunused-but-set-parameter"
+Warn whenever a function parameter is assigned to, but otherwise unused
+(aside from its declaration).
+.Sp
+To suppress this warning use the \fBunused\fR attribute.
+.Sp
+This warning is also enabled by \fB\-Wunused\fR together with
+\&\fB\-Wextra\fR.
+.IP "\fB\-Wunused\-but\-set\-variable\fR" 4
+.IX Item "-Wunused-but-set-variable"
+Warn whenever a local variable is assigned to, but otherwise unused
+(aside from its declaration).
+This warning is enabled by \fB\-Wall\fR.
+.Sp
+To suppress this warning use the \fBunused\fR attribute.
+.Sp
+This warning is also enabled by \fB\-Wunused\fR, which is enabled
+by \fB\-Wall\fR.
+.IP "\fB\-Wunused\-function\fR" 4
+.IX Item "-Wunused-function"
+Warn whenever a static function is declared but not defined or a
+non-inline static function is unused.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wunused\-label\fR" 4
+.IX Item "-Wunused-label"
+Warn whenever a label is declared but not used.
+This warning is enabled by \fB\-Wall\fR.
+.Sp
+To suppress this warning use the \fBunused\fR attribute.
+.IP "\fB\-Wunused\-parameter\fR" 4
+.IX Item "-Wunused-parameter"
+Warn whenever a function parameter is unused aside from its declaration.
+.Sp
+To suppress this warning use the \fBunused\fR attribute.
+.IP "\fB\-Wno\-unused\-result\fR" 4
+.IX Item "-Wno-unused-result"
+Do not warn if a caller of a function marked with attribute
+\&\f(CW\*(C`warn_unused_result\*(C'\fR does not use
+its return value. The default is \fB\-Wunused\-result\fR.
+.IP "\fB\-Wunused\-variable\fR" 4
+.IX Item "-Wunused-variable"
+Warn whenever a local variable or non-constant static variable is unused
+aside from its declaration.
+This warning is enabled by \fB\-Wall\fR.
+.Sp
+To suppress this warning use the \fBunused\fR attribute.
+.IP "\fB\-Wunused\-value\fR" 4
+.IX Item "-Wunused-value"
+Warn whenever a statement computes a result that is explicitly not
+used. To suppress this warning cast the unused expression to
+\&\fBvoid\fR. This includes an expression-statement or the left-hand
+side of a comma expression that contains no side effects. For example,
+an expression such as \fBx[i,j]\fR will cause a warning, while
+\&\fBx[(void)i,j]\fR will not.
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wunused\fR" 4
+.IX Item "-Wunused"
+All the above \fB\-Wunused\fR options combined.
+.Sp
+In order to get a warning about an unused function parameter, you must
+either specify \fB\-Wextra \-Wunused\fR (note that \fB\-Wall\fR implies
+\&\fB\-Wunused\fR), or separately specify \fB\-Wunused\-parameter\fR.
+.IP "\fB\-Wuninitialized\fR" 4
+.IX Item "-Wuninitialized"
+Warn if an automatic variable is used without first being initialized
+or if a variable may be clobbered by a \f(CW\*(C`setjmp\*(C'\fR call. In \*(C+,
+warn if a non-static reference or non-static \fBconst\fR member
+appears in a class without constructors.
+.Sp
+If you want to warn about code which uses the uninitialized value of the
+variable in its own initializer, use the \fB\-Winit\-self\fR option.
+.Sp
+These warnings occur for individual uninitialized or clobbered
+elements of structure, union or array variables as well as for
+variables which are uninitialized or clobbered as a whole.  They do
+not occur for variables or elements declared \f(CW\*(C`volatile\*(C'\fR.  Because
+these warnings depend on optimization, the exact variables or elements
+for which there are warnings will depend on the precise optimization
+options and version of \s-1GCC\s0 used.
+.Sp
+Note that there may be no warning about a variable that is used only
+to compute a value that itself is never used, because such
+computations may be deleted by data flow analysis before the warnings
+are printed.
+.Sp
+These warnings are made optional because \s-1GCC\s0 is not smart
+enough to see all the reasons why the code might be correct
+despite appearing to have an error.  Here is one example of how
+this can happen:
+.Sp
+.Vb 12
+\&        {
+\&          int x;
+\&          switch (y)
+\&            {
+\&            case 1: x = 1;
+\&              break;
+\&            case 2: x = 4;
+\&              break;
+\&            case 3: x = 5;
+\&            }
+\&          foo (x);
+\&        }
+.Ve
+.Sp
+If the value of \f(CW\*(C`y\*(C'\fR is always 1, 2 or 3, then \f(CW\*(C`x\*(C'\fR is
+always initialized, but \s-1GCC\s0 doesn't know this.  Here is
+another common case:
+.Sp
+.Vb 6
+\&        {
+\&          int save_y;
+\&          if (change_y) save_y = y, y = new_y;
+\&          ...
+\&          if (change_y) y = save_y;
+\&        }
+.Ve
+.Sp
+This has no bug because \f(CW\*(C`save_y\*(C'\fR is used only if it is set.
+.Sp
+This option also warns when a non-volatile automatic variable might be
+changed by a call to \f(CW\*(C`longjmp\*(C'\fR.  These warnings as well are possible
+only in optimizing compilation.
+.Sp
+The compiler sees only the calls to \f(CW\*(C`setjmp\*(C'\fR.  It cannot know
+where \f(CW\*(C`longjmp\*(C'\fR will be called; in fact, a signal handler could
+call it at any point in the code.  As a result, you may get a warning
+even when there is in fact no problem because \f(CW\*(C`longjmp\*(C'\fR cannot
+in fact be called at the place which would cause a problem.
+.Sp
+Some spurious warnings can be avoided if you declare all the functions
+you use that never return as \f(CW\*(C`noreturn\*(C'\fR.
+.Sp
+This warning is enabled by \fB\-Wall\fR or \fB\-Wextra\fR.
+.IP "\fB\-Wunknown\-pragmas\fR" 4
+.IX Item "-Wunknown-pragmas"
+Warn when a #pragma directive is encountered which is not understood by
+\&\s-1GCC\s0.  If this command line option is used, warnings will even be issued
+for unknown pragmas in system header files.  This is not the case if
+the warnings were only enabled by the \fB\-Wall\fR command line option.
+.IP "\fB\-Wno\-pragmas\fR" 4
+.IX Item "-Wno-pragmas"
+Do not warn about misuses of pragmas, such as incorrect parameters,
+invalid syntax, or conflicts between pragmas.  See also
+\&\fB\-Wunknown\-pragmas\fR.
+.IP "\fB\-Wstrict\-aliasing\fR" 4
+.IX Item "-Wstrict-aliasing"
+This option is only active when \fB\-fstrict\-aliasing\fR is active.
+It warns about code which might break the strict aliasing rules that the
+compiler is using for optimization.  The warning does not catch all
+cases, but does attempt to catch the more common pitfalls.  It is
+included in \fB\-Wall\fR.
+It is equivalent to \fB\-Wstrict\-aliasing=3\fR
+.IP "\fB\-Wstrict\-aliasing=n\fR" 4
+.IX Item "-Wstrict-aliasing=n"
+This option is only active when \fB\-fstrict\-aliasing\fR is active.
+It warns about code which might break the strict aliasing rules that the
+compiler is using for optimization.
+Higher levels correspond to higher accuracy (fewer false positives).
+Higher levels also correspond to more effort, similar to the way \-O works.
+\&\fB\-Wstrict\-aliasing\fR is equivalent to \fB\-Wstrict\-aliasing=n\fR,
+with n=3.
+.Sp
+Level 1: Most aggressive, quick, least accurate.
+Possibly useful when higher levels
+do not warn but \-fstrict\-aliasing still breaks the code, as it has very few
+false negatives.  However, it has many false positives.
+Warns for all pointer conversions between possibly incompatible types,
+even if never dereferenced.  Runs in the frontend only.
+.Sp
+Level 2: Aggressive, quick, not too precise.
+May still have many false positives (not as many as level 1 though),
+and few false negatives (but possibly more than level 1).
+Unlike level 1, it only warns when an address is taken.  Warns about
+incomplete types.  Runs in the frontend only.
+.Sp
+Level 3 (default for \fB\-Wstrict\-aliasing\fR):
+Should have very few false positives and few false
+negatives.  Slightly slower than levels 1 or 2 when optimization is enabled.
+Takes care of the common pun+dereference pattern in the frontend:
+\&\f(CW\*(C`*(int*)&some_float\*(C'\fR.
+If optimization is enabled, it also runs in the backend, where it deals
+with multiple statement cases using flow-sensitive points-to information.
+Only warns when the converted pointer is dereferenced.
+Does not warn about incomplete types.
+.IP "\fB\-Wstrict\-overflow\fR" 4
+.IX Item "-Wstrict-overflow"
+.PD 0
+.IP "\fB\-Wstrict\-overflow=\fR\fIn\fR" 4
+.IX Item "-Wstrict-overflow=n"
+.PD
+This option is only active when \fB\-fstrict\-overflow\fR is active.
+It warns about cases where the compiler optimizes based on the
+assumption that signed overflow does not occur.  Note that it does not
+warn about all cases where the code might overflow: it only warns
+about cases where the compiler implements some optimization.  Thus
+this warning depends on the optimization level.
+.Sp
+An optimization which assumes that signed overflow does not occur is
+perfectly safe if the values of the variables involved are such that
+overflow never does, in fact, occur.  Therefore this warning can
+easily give a false positive: a warning about code which is not
+actually a problem.  To help focus on important issues, several
+warning levels are defined.  No warnings are issued for the use of
+undefined signed overflow when estimating how many iterations a loop
+will require, in particular when determining whether a loop will be
+executed at all.
+.RS 4
+.IP "\fB\-Wstrict\-overflow=1\fR" 4
+.IX Item "-Wstrict-overflow=1"
+Warn about cases which are both questionable and easy to avoid.  For
+example: \f(CW\*(C`x + 1 > x\*(C'\fR; with \fB\-fstrict\-overflow\fR, the
+compiler will simplify this to \f(CW1\fR.  This level of
+\&\fB\-Wstrict\-overflow\fR is enabled by \fB\-Wall\fR; higher levels
+are not, and must be explicitly requested.
+.IP "\fB\-Wstrict\-overflow=2\fR" 4
+.IX Item "-Wstrict-overflow=2"
+Also warn about other cases where a comparison is simplified to a
+constant.  For example: \f(CW\*(C`abs (x) >= 0\*(C'\fR.  This can only be
+simplified when \fB\-fstrict\-overflow\fR is in effect, because
+\&\f(CW\*(C`abs (INT_MIN)\*(C'\fR overflows to \f(CW\*(C`INT_MIN\*(C'\fR, which is less than
+zero.  \fB\-Wstrict\-overflow\fR (with no level) is the same as
+\&\fB\-Wstrict\-overflow=2\fR.
+.IP "\fB\-Wstrict\-overflow=3\fR" 4
+.IX Item "-Wstrict-overflow=3"
+Also warn about other cases where a comparison is simplified.  For
+example: \f(CW\*(C`x + 1 > 1\*(C'\fR will be simplified to \f(CW\*(C`x > 0\*(C'\fR.
+.IP "\fB\-Wstrict\-overflow=4\fR" 4
+.IX Item "-Wstrict-overflow=4"
+Also warn about other simplifications not covered by the above cases.
+For example: \f(CW\*(C`(x * 10) / 5\*(C'\fR will be simplified to \f(CW\*(C`x * 2\*(C'\fR.
+.IP "\fB\-Wstrict\-overflow=5\fR" 4
+.IX Item "-Wstrict-overflow=5"
+Also warn about cases where the compiler reduces the magnitude of a
+constant involved in a comparison.  For example: \f(CW\*(C`x + 2 > y\*(C'\fR will
+be simplified to \f(CW\*(C`x + 1 >= y\*(C'\fR.  This is reported only at the
+highest warning level because this simplification applies to many
+comparisons, so this warning level will give a very large number of
+false positives.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Wsuggest\-attribute=\fR[\fBpure\fR|\fBconst\fR|\fBnoreturn\fR]" 4
+.IX Item "-Wsuggest-attribute=[pure|const|noreturn]"
+Warn for cases where adding an attribute may be beneficial. The
+attributes currently supported are listed below.
+.RS 4
+.IP "\fB\-Wsuggest\-attribute=pure\fR" 4
+.IX Item "-Wsuggest-attribute=pure"
+.PD 0
+.IP "\fB\-Wsuggest\-attribute=const\fR" 4
+.IX Item "-Wsuggest-attribute=const"
+.IP "\fB\-Wsuggest\-attribute=noreturn\fR" 4
+.IX Item "-Wsuggest-attribute=noreturn"
+.PD
+Warn about functions which might be candidates for attributes
+\&\f(CW\*(C`pure\*(C'\fR, \f(CW\*(C`const\*(C'\fR or \f(CW\*(C`noreturn\*(C'\fR.  The compiler only warns for
+functions visible in other compilation units or (in the case of \f(CW\*(C`pure\*(C'\fR and
+\&\f(CW\*(C`const\*(C'\fR) if it cannot prove that the function returns normally. A function
+returns normally if it doesn't contain an infinite loop nor returns abnormally
+by throwing, calling \f(CW\*(C`abort()\*(C'\fR or trapping.  This analysis requires option
+\&\fB\-fipa\-pure\-const\fR, which is enabled by default at \fB\-O\fR and
+higher.  Higher optimization levels improve the accuracy of the analysis.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Warray\-bounds\fR" 4
+.IX Item "-Warray-bounds"
+This option is only active when \fB\-ftree\-vrp\fR is active
+(default for \fB\-O2\fR and above). It warns about subscripts to arrays
+that are always out of bounds. This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wno\-div\-by\-zero\fR" 4
+.IX Item "-Wno-div-by-zero"
+Do not warn about compile-time integer division by zero.  Floating point
+division by zero is not warned about, as it can be a legitimate way of
+obtaining infinities and NaNs.
+.IP "\fB\-Wsystem\-headers\fR" 4
+.IX Item "-Wsystem-headers"
+Print warning messages for constructs found in system header files.
+Warnings from system headers are normally suppressed, on the assumption
+that they usually do not indicate real problems and would only make the
+compiler output harder to read.  Using this command line option tells
+\&\s-1GCC\s0 to emit warnings from system headers as if they occurred in user
+code.  However, note that using \fB\-Wall\fR in conjunction with this
+option will \fInot\fR warn about unknown pragmas in system
+headers\-\-\-for that, \fB\-Wunknown\-pragmas\fR must also be used.
+.IP "\fB\-Wtrampolines\fR" 4
+.IX Item "-Wtrampolines"
+.Vb 1
+\& Warn about trampolines generated for pointers to nested functions.
+\& 
+\& A trampoline is a small piece of data or code that is created at run
+\& time on the stack when the address of a nested function is taken, and
+\& is used to call the nested function indirectly.  For some targets, it
+\& is made up of data only and thus requires no special treatment.  But,
+\& for most targets, it is made up of code and thus requires the stack
+\& to be made executable in order for the program to work properly.
+.Ve
+.IP "\fB\-Wfloat\-equal\fR" 4
+.IX Item "-Wfloat-equal"
+Warn if floating point values are used in equality comparisons.
+.Sp
+The idea behind this is that sometimes it is convenient (for the
+programmer) to consider floating-point values as approximations to
+infinitely precise real numbers.  If you are doing this, then you need
+to compute (by analyzing the code, or in some other way) the maximum or
+likely maximum error that the computation introduces, and allow for it
+when performing comparisons (and when producing output, but that's a
+different problem).  In particular, instead of testing for equality, you
+would check to see whether the two values have ranges that overlap; and
+this is done with the relational operators, so equality comparisons are
+probably mistaken.
+.IP "\fB\-Wtraditional\fR (C and Objective-C only)" 4
+.IX Item "-Wtraditional (C and Objective-C only)"
+Warn about certain constructs that behave differently in traditional and
+\&\s-1ISO\s0 C.  Also warn about \s-1ISO\s0 C constructs that have no traditional C
+equivalent, and/or problematic constructs which should be avoided.
+.RS 4
+.IP "\(bu" 4
+Macro parameters that appear within string literals in the macro body.
+In traditional C macro replacement takes place within string literals,
+but does not in \s-1ISO\s0 C.
+.IP "\(bu" 4
+In traditional C, some preprocessor directives did not exist.
+Traditional preprocessors would only consider a line to be a directive
+if the \fB#\fR appeared in column 1 on the line.  Therefore
+\&\fB\-Wtraditional\fR warns about directives that traditional C
+understands but would ignore because the \fB#\fR does not appear as the
+first character on the line.  It also suggests you hide directives like
+\&\fB#pragma\fR not understood by traditional C by indenting them.  Some
+traditional implementations would not recognize \fB#elif\fR, so it
+suggests avoiding it altogether.
+.IP "\(bu" 4
+A function-like macro that appears without arguments.
+.IP "\(bu" 4
+The unary plus operator.
+.IP "\(bu" 4
+The \fBU\fR integer constant suffix, or the \fBF\fR or \fBL\fR floating point
+constant suffixes.  (Traditional C does support the \fBL\fR suffix on integer
+constants.)  Note, these suffixes appear in macros defined in the system
+headers of most modern systems, e.g. the \fB_MIN\fR/\fB_MAX\fR macros in \f(CW\*(C`<limits.h>\*(C'\fR.
+Use of these macros in user code might normally lead to spurious
+warnings, however \s-1GCC\s0's integrated preprocessor has enough context to
+avoid warning in these cases.
+.IP "\(bu" 4
+A function declared external in one block and then used after the end of
+the block.
+.IP "\(bu" 4
+A \f(CW\*(C`switch\*(C'\fR statement has an operand of type \f(CW\*(C`long\*(C'\fR.
+.IP "\(bu" 4
+A non\-\f(CW\*(C`static\*(C'\fR function declaration follows a \f(CW\*(C`static\*(C'\fR one.
+This construct is not accepted by some traditional C compilers.
+.IP "\(bu" 4
+The \s-1ISO\s0 type of an integer constant has a different width or
+signedness from its traditional type.  This warning is only issued if
+the base of the constant is ten.  I.e. hexadecimal or octal values, which
+typically represent bit patterns, are not warned about.
+.IP "\(bu" 4
+Usage of \s-1ISO\s0 string concatenation is detected.
+.IP "\(bu" 4
+Initialization of automatic aggregates.
+.IP "\(bu" 4
+Identifier conflicts with labels.  Traditional C lacks a separate
+namespace for labels.
+.IP "\(bu" 4
+Initialization of unions.  If the initializer is zero, the warning is
+omitted.  This is done under the assumption that the zero initializer in
+user code appears conditioned on e.g. \f(CW\*(C`_\|_STDC_\|_\*(C'\fR to avoid missing
+initializer warnings and relies on default initialization to zero in the
+traditional C case.
+.IP "\(bu" 4
+Conversions by prototypes between fixed/floating point values and vice
+versa.  The absence of these prototypes when compiling with traditional
+C would cause serious problems.  This is a subset of the possible
+conversion warnings, for the full set use \fB\-Wtraditional\-conversion\fR.
+.IP "\(bu" 4
+Use of \s-1ISO\s0 C style function definitions.  This warning intentionally is
+\&\fInot\fR issued for prototype declarations or variadic functions
+because these \s-1ISO\s0 C features will appear in your code when using
+libiberty's traditional C compatibility macros, \f(CW\*(C`PARAMS\*(C'\fR and
+\&\f(CW\*(C`VPARAMS\*(C'\fR.  This warning is also bypassed for nested functions
+because that feature is already a \s-1GCC\s0 extension and thus not relevant to
+traditional C compatibility.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Wtraditional\-conversion\fR (C and Objective-C only)" 4
+.IX Item "-Wtraditional-conversion (C and Objective-C only)"
+Warn if a prototype causes a type conversion that is different from what
+would happen to the same argument in the absence of a prototype.  This
+includes conversions of fixed point to floating and vice versa, and
+conversions changing the width or signedness of a fixed point argument
+except when the same as the default promotion.
+.IP "\fB\-Wdeclaration\-after\-statement\fR (C and Objective-C only)" 4
+.IX Item "-Wdeclaration-after-statement (C and Objective-C only)"
+Warn when a declaration is found after a statement in a block.  This
+construct, known from \*(C+, was introduced with \s-1ISO\s0 C99 and is by default
+allowed in \s-1GCC\s0.  It is not supported by \s-1ISO\s0 C90 and was not supported by
+\&\s-1GCC\s0 versions before \s-1GCC\s0 3.0.
+.IP "\fB\-Wundef\fR" 4
+.IX Item "-Wundef"
+Warn if an undefined identifier is evaluated in an \fB#if\fR directive.
+.IP "\fB\-Wno\-endif\-labels\fR" 4
+.IX Item "-Wno-endif-labels"
+Do not warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
+.IP "\fB\-Wshadow\fR" 4
+.IX Item "-Wshadow"
+Warn whenever a local variable or type declaration shadows another variable,
+parameter, type, or class member (in \*(C+), or whenever a built-in function
+is shadowed. Note that in \*(C+, the compiler will not warn if a local variable
+shadows a struct/class/enum, but will warn if it shadows an explicit typedef.
+.IP "\fB\-Wlarger\-than=\fR\fIlen\fR" 4
+.IX Item "-Wlarger-than=len"
+Warn whenever an object of larger than \fIlen\fR bytes is defined.
+.IP "\fB\-Wframe\-larger\-than=\fR\fIlen\fR" 4
+.IX Item "-Wframe-larger-than=len"
+Warn if the size of a function frame is larger than \fIlen\fR bytes.
+The computation done to determine the stack frame size is approximate
+and not conservative.
+The actual requirements may be somewhat greater than \fIlen\fR
+even if you do not get a warning.  In addition, any space allocated
+via \f(CW\*(C`alloca\*(C'\fR, variable-length arrays, or related constructs
+is not included by the compiler when determining
+whether or not to issue a warning.
+.IP "\fB\-Wunsafe\-loop\-optimizations\fR" 4
+.IX Item "-Wunsafe-loop-optimizations"
+Warn if the loop cannot be optimized because the compiler could not
+assume anything on the bounds of the loop indices.  With
+\&\fB\-funsafe\-loop\-optimizations\fR warn if the compiler made
+such assumptions.
+.IP "\fB\-Wno\-pedantic\-ms\-format\fR (MinGW targets only)" 4
+.IX Item "-Wno-pedantic-ms-format (MinGW targets only)"
+Disables the warnings about non-ISO \f(CW\*(C`printf\*(C'\fR / \f(CW\*(C`scanf\*(C'\fR format
+width specifiers \f(CW\*(C`I32\*(C'\fR, \f(CW\*(C`I64\*(C'\fR, and \f(CW\*(C`I\*(C'\fR used on Windows targets
+depending on the \s-1MS\s0 runtime, when you are using the options \fB\-Wformat\fR
+and \fB\-pedantic\fR without gnu-extensions.
+.IP "\fB\-Wpointer\-arith\fR" 4
+.IX Item "-Wpointer-arith"
+Warn about anything that depends on the \*(L"size of\*(R" a function type or
+of \f(CW\*(C`void\*(C'\fR.  \s-1GNU\s0 C assigns these types a size of 1, for
+convenience in calculations with \f(CW\*(C`void *\*(C'\fR pointers and pointers
+to functions.  In \*(C+, warn also when an arithmetic operation involves
+\&\f(CW\*(C`NULL\*(C'\fR.  This warning is also enabled by \fB\-pedantic\fR.
+.IP "\fB\-Wtype\-limits\fR" 4
+.IX Item "-Wtype-limits"
+Warn if a comparison is always true or always false due to the limited
+range of the data type, but do not warn for constant expressions.  For
+example, warn if an unsigned variable is compared against zero with
+\&\fB<\fR or \fB>=\fR.  This warning is also enabled by
+\&\fB\-Wextra\fR.
+.IP "\fB\-Wbad\-function\-cast\fR (C and Objective-C only)" 4
+.IX Item "-Wbad-function-cast (C and Objective-C only)"
+Warn whenever a function call is cast to a non-matching type.
+For example, warn if \f(CW\*(C`int malloc()\*(C'\fR is cast to \f(CW\*(C`anything *\*(C'\fR.
+.IP "\fB\-Wc++\-compat\fR (C and Objective-C only)" 4
+.IX Item "-Wc++-compat (C and Objective-C only)"
+Warn about \s-1ISO\s0 C constructs that are outside of the common subset of
+\&\s-1ISO\s0 C and \s-1ISO\s0 \*(C+, e.g. request for implicit conversion from
+\&\f(CW\*(C`void *\*(C'\fR to a pointer to non\-\f(CW\*(C`void\*(C'\fR type.
+.IP "\fB\-Wc++0x\-compat\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wc++0x-compat ( and Objective- only)"
+Warn about \*(C+ constructs whose meaning differs between \s-1ISO\s0 \*(C+ 1998 and
+\&\s-1ISO\s0 \*(C+ 200x, e.g., identifiers in \s-1ISO\s0 \*(C+ 1998 that will become keywords
+in \s-1ISO\s0 \*(C+ 200x.  This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wcast\-qual\fR" 4
+.IX Item "-Wcast-qual"
+Warn whenever a pointer is cast so as to remove a type qualifier from
+the target type.  For example, warn if a \f(CW\*(C`const char *\*(C'\fR is cast
+to an ordinary \f(CW\*(C`char *\*(C'\fR.
+.Sp
+Also warn when making a cast which introduces a type qualifier in an
+unsafe way.  For example, casting \f(CW\*(C`char **\*(C'\fR to \f(CW\*(C`const char **\*(C'\fR
+is unsafe, as in this example:
+.Sp
+.Vb 6
+\&          /* p is char ** value.  */
+\&          const char **q = (const char **) p;
+\&          /* Assignment of readonly string to const char * is OK.  */
+\&          *q = "string";
+\&          /* Now char** pointer points to read\-only memory.  */
+\&          **p = \*(Aqb\*(Aq;
+.Ve
+.IP "\fB\-Wcast\-align\fR" 4
+.IX Item "-Wcast-align"
+Warn whenever a pointer is cast such that the required alignment of the
+target is increased.  For example, warn if a \f(CW\*(C`char *\*(C'\fR is cast to
+an \f(CW\*(C`int *\*(C'\fR on machines where integers can only be accessed at
+two\- or four-byte boundaries.
+.IP "\fB\-Wwrite\-strings\fR" 4
+.IX Item "-Wwrite-strings"
+When compiling C, give string constants the type \f(CW\*(C`const
+char[\f(CIlength\f(CW]\*(C'\fR so that copying the address of one into a
+non\-\f(CW\*(C`const\*(C'\fR \f(CW\*(C`char *\*(C'\fR pointer will get a warning.  These
+warnings will help you find at compile time code that can try to write
+into a string constant, but only if you have been very careful about
+using \f(CW\*(C`const\*(C'\fR in declarations and prototypes.  Otherwise, it will
+just be a nuisance. This is why we did not make \fB\-Wall\fR request
+these warnings.
+.Sp
+When compiling \*(C+, warn about the deprecated conversion from string
+literals to \f(CW\*(C`char *\*(C'\fR.  This warning is enabled by default for \*(C+
+programs.
+.IP "\fB\-Wclobbered\fR" 4
+.IX Item "-Wclobbered"
+Warn for variables that might be changed by \fBlongjmp\fR or
+\&\fBvfork\fR.  This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wconversion\fR" 4
+.IX Item "-Wconversion"
+Warn for implicit conversions that may alter a value. This includes
+conversions between real and integer, like \f(CW\*(C`abs (x)\*(C'\fR when
+\&\f(CW\*(C`x\*(C'\fR is \f(CW\*(C`double\*(C'\fR; conversions between signed and unsigned,
+like \f(CW\*(C`unsigned ui = \-1\*(C'\fR; and conversions to smaller types, like
+\&\f(CW\*(C`sqrtf (M_PI)\*(C'\fR. Do not warn for explicit casts like \f(CW\*(C`abs
+((int) x)\*(C'\fR and \f(CW\*(C`ui = (unsigned) \-1\*(C'\fR, or if the value is not
+changed by the conversion like in \f(CW\*(C`abs (2.0)\*(C'\fR.  Warnings about
+conversions between signed and unsigned integers can be disabled by
+using \fB\-Wno\-sign\-conversion\fR.
+.Sp
+For \*(C+, also warn for confusing overload resolution for user-defined
+conversions; and conversions that will never use a type conversion
+operator: conversions to \f(CW\*(C`void\*(C'\fR, the same type, a base class or a
+reference to them. Warnings about conversions between signed and
+unsigned integers are disabled by default in \*(C+ unless
+\&\fB\-Wsign\-conversion\fR is explicitly enabled.
+.IP "\fB\-Wno\-conversion\-null\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-conversion-null ( and Objective- only)"
+Do not warn for conversions between \f(CW\*(C`NULL\*(C'\fR and non-pointer
+types. \fB\-Wconversion\-null\fR is enabled by default.
+.IP "\fB\-Wempty\-body\fR" 4
+.IX Item "-Wempty-body"
+Warn if an empty body occurs in an \fBif\fR, \fBelse\fR or \fBdo
+while\fR statement.  This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wenum\-compare\fR" 4
+.IX Item "-Wenum-compare"
+Warn about a comparison between values of different enum types. In \*(C+
+this warning is enabled by default.  In C this warning is enabled by
+\&\fB\-Wall\fR.
+.IP "\fB\-Wjump\-misses\-init\fR (C, Objective-C only)" 4
+.IX Item "-Wjump-misses-init (C, Objective-C only)"
+Warn if a \f(CW\*(C`goto\*(C'\fR statement or a \f(CW\*(C`switch\*(C'\fR statement jumps
+forward across the initialization of a variable, or jumps backward to a
+label after the variable has been initialized.  This only warns about
+variables which are initialized when they are declared.  This warning is
+only supported for C and Objective C; in \*(C+ this sort of branch is an
+error in any case.
+.Sp
+\&\fB\-Wjump\-misses\-init\fR is included in \fB\-Wc++\-compat\fR.  It
+can be disabled with the \fB\-Wno\-jump\-misses\-init\fR option.
+.IP "\fB\-Wsign\-compare\fR" 4
+.IX Item "-Wsign-compare"
+Warn when a comparison between signed and unsigned values could produce
+an incorrect result when the signed value is converted to unsigned.
+This warning is also enabled by \fB\-Wextra\fR; to get the other warnings
+of \fB\-Wextra\fR without this warning, use \fB\-Wextra \-Wno\-sign\-compare\fR.
+.IP "\fB\-Wsign\-conversion\fR" 4
+.IX Item "-Wsign-conversion"
+Warn for implicit conversions that may change the sign of an integer
+value, like assigning a signed integer expression to an unsigned
+integer variable. An explicit cast silences the warning. In C, this
+option is enabled also by \fB\-Wconversion\fR.
+.IP "\fB\-Waddress\fR" 4
+.IX Item "-Waddress"
+Warn about suspicious uses of memory addresses. These include using
+the address of a function in a conditional expression, such as
+\&\f(CW\*(C`void func(void); if (func)\*(C'\fR, and comparisons against the memory
+address of a string literal, such as \f(CW\*(C`if (x == "abc")\*(C'\fR.  Such
+uses typically indicate a programmer error: the address of a function
+always evaluates to true, so their use in a conditional usually
+indicate that the programmer forgot the parentheses in a function
+call; and comparisons against string literals result in unspecified
+behavior and are not portable in C, so they usually indicate that the
+programmer intended to use \f(CW\*(C`strcmp\*(C'\fR.  This warning is enabled by
+\&\fB\-Wall\fR.
+.IP "\fB\-Wlogical\-op\fR" 4
+.IX Item "-Wlogical-op"
+Warn about suspicious uses of logical operators in expressions.
+This includes using logical operators in contexts where a
+bit-wise operator is likely to be expected.
+.IP "\fB\-Waggregate\-return\fR" 4
+.IX Item "-Waggregate-return"
+Warn if any functions that return structures or unions are defined or
+called.  (In languages where you can return an array, this also elicits
+a warning.)
+.IP "\fB\-Wno\-attributes\fR" 4
+.IX Item "-Wno-attributes"
+Do not warn if an unexpected \f(CW\*(C`_\|_attribute_\|_\*(C'\fR is used, such as
+unrecognized attributes, function attributes applied to variables,
+etc.  This will not stop errors for incorrect use of supported
+attributes.
+.IP "\fB\-Wno\-builtin\-macro\-redefined\fR" 4
+.IX Item "-Wno-builtin-macro-redefined"
+Do not warn if certain built-in macros are redefined.  This suppresses
+warnings for redefinition of \f(CW\*(C`_\|_TIMESTAMP_\|_\*(C'\fR, \f(CW\*(C`_\|_TIME_\|_\*(C'\fR,
+\&\f(CW\*(C`_\|_DATE_\|_\*(C'\fR, \f(CW\*(C`_\|_FILE_\|_\*(C'\fR, and \f(CW\*(C`_\|_BASE_FILE_\|_\*(C'\fR.
+.IP "\fB\-Wstrict\-prototypes\fR (C and Objective-C only)" 4
+.IX Item "-Wstrict-prototypes (C and Objective-C only)"
+Warn if a function is declared or defined without specifying the
+argument types.  (An old-style function definition is permitted without
+a warning if preceded by a declaration which specifies the argument
+types.)
+.IP "\fB\-Wold\-style\-declaration\fR (C and Objective-C only)" 4
+.IX Item "-Wold-style-declaration (C and Objective-C only)"
+Warn for obsolescent usages, according to the C Standard, in a
+declaration. For example, warn if storage-class specifiers like
+\&\f(CW\*(C`static\*(C'\fR are not the first things in a declaration.  This warning
+is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wold\-style\-definition\fR (C and Objective-C only)" 4
+.IX Item "-Wold-style-definition (C and Objective-C only)"
+Warn if an old-style function definition is used.  A warning is given
+even if there is a previous prototype.
+.IP "\fB\-Wmissing\-parameter\-type\fR (C and Objective-C only)" 4
+.IX Item "-Wmissing-parameter-type (C and Objective-C only)"
+A function parameter is declared without a type specifier in K&R\-style
+functions:
+.Sp
+.Vb 1
+\&        void foo(bar) { }
+.Ve
+.Sp
+This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wmissing\-prototypes\fR (C and Objective-C only)" 4
+.IX Item "-Wmissing-prototypes (C and Objective-C only)"
+Warn if a global function is defined without a previous prototype
+declaration.  This warning is issued even if the definition itself
+provides a prototype.  The aim is to detect global functions that fail
+to be declared in header files.
+.IP "\fB\-Wmissing\-declarations\fR" 4
+.IX Item "-Wmissing-declarations"
+Warn if a global function is defined without a previous declaration.
+Do so even if the definition itself provides a prototype.
+Use this option to detect global functions that are not declared in
+header files.  In \*(C+, no warnings are issued for function templates,
+or for inline functions, or for functions in anonymous namespaces.
+.IP "\fB\-Wmissing\-field\-initializers\fR" 4
+.IX Item "-Wmissing-field-initializers"
+Warn if a structure's initializer has some fields missing.  For
+example, the following code would cause such a warning, because
+\&\f(CW\*(C`x.h\*(C'\fR is implicitly zero:
+.Sp
+.Vb 2
+\&        struct s { int f, g, h; };
+\&        struct s x = { 3, 4 };
+.Ve
+.Sp
+This option does not warn about designated initializers, so the following
+modification would not trigger a warning:
+.Sp
+.Vb 2
+\&        struct s { int f, g, h; };
+\&        struct s x = { .f = 3, .g = 4 };
+.Ve
+.Sp
+This warning is included in \fB\-Wextra\fR.  To get other \fB\-Wextra\fR
+warnings without this one, use \fB\-Wextra \-Wno\-missing\-field\-initializers\fR.
+.IP "\fB\-Wmissing\-format\-attribute\fR" 4
+.IX Item "-Wmissing-format-attribute"
+Warn about function pointers which might be candidates for \f(CW\*(C`format\*(C'\fR
+attributes.  Note these are only possible candidates, not absolute ones.
+\&\s-1GCC\s0 will guess that function pointers with \f(CW\*(C`format\*(C'\fR attributes that
+are used in assignment, initialization, parameter passing or return
+statements should have a corresponding \f(CW\*(C`format\*(C'\fR attribute in the
+resulting type.  I.e. the left-hand side of the assignment or
+initialization, the type of the parameter variable, or the return type
+of the containing function respectively should also have a \f(CW\*(C`format\*(C'\fR
+attribute to avoid the warning.
+.Sp
+\&\s-1GCC\s0 will also warn about function definitions which might be
+candidates for \f(CW\*(C`format\*(C'\fR attributes.  Again, these are only
+possible candidates.  \s-1GCC\s0 will guess that \f(CW\*(C`format\*(C'\fR attributes
+might be appropriate for any function that calls a function like
+\&\f(CW\*(C`vprintf\*(C'\fR or \f(CW\*(C`vscanf\*(C'\fR, but this might not always be the
+case, and some functions for which \f(CW\*(C`format\*(C'\fR attributes are
+appropriate may not be detected.
+.IP "\fB\-Wno\-multichar\fR" 4
+.IX Item "-Wno-multichar"
+Do not warn if a multicharacter constant (\fB'\s-1FOOF\s0'\fR) is used.
+Usually they indicate a typo in the user's code, as they have
+implementation-defined values, and should not be used in portable code.
+.IP "\fB\-Wnormalized=<none|id|nfc|nfkc>\fR" 4
+.IX Item "-Wnormalized=<none|id|nfc|nfkc>"
+In \s-1ISO\s0 C and \s-1ISO\s0 \*(C+, two identifiers are different if they are
+different sequences of characters.  However, sometimes when characters
+outside the basic \s-1ASCII\s0 character set are used, you can have two
+different character sequences that look the same.  To avoid confusion,
+the \s-1ISO\s0 10646 standard sets out some \fInormalization rules\fR which
+when applied ensure that two sequences that look the same are turned into
+the same sequence.  \s-1GCC\s0 can warn you if you are using identifiers which
+have not been normalized; this option controls that warning.
+.Sp
+There are four levels of warning that \s-1GCC\s0 supports.  The default is
+\&\fB\-Wnormalized=nfc\fR, which warns about any identifier which is
+not in the \s-1ISO\s0 10646 \*(L"C\*(R" normalized form, \fI\s-1NFC\s0\fR.  \s-1NFC\s0 is the
+recommended form for most uses.
+.Sp
+Unfortunately, there are some characters which \s-1ISO\s0 C and \s-1ISO\s0 \*(C+ allow
+in identifiers that when turned into \s-1NFC\s0 aren't allowable as
+identifiers.  That is, there's no way to use these symbols in portable
+\&\s-1ISO\s0 C or \*(C+ and have all your identifiers in \s-1NFC\s0.
+\&\fB\-Wnormalized=id\fR suppresses the warning for these characters.
+It is hoped that future versions of the standards involved will correct
+this, which is why this option is not the default.
+.Sp
+You can switch the warning off for all characters by writing
+\&\fB\-Wnormalized=none\fR.  You would only want to do this if you
+were using some other normalization scheme (like \*(L"D\*(R"), because
+otherwise you can easily create bugs that are literally impossible to see.
+.Sp
+Some characters in \s-1ISO\s0 10646 have distinct meanings but look identical
+in some fonts or display methodologies, especially once formatting has
+been applied.  For instance \f(CW\*(C`\eu207F\*(C'\fR, \*(L"\s-1SUPERSCRIPT\s0 \s-1LATIN\s0 \s-1SMALL\s0
+\&\s-1LETTER\s0 N\*(R", will display just like a regular \f(CW\*(C`n\*(C'\fR which has been
+placed in a superscript.  \s-1ISO\s0 10646 defines the \fI\s-1NFKC\s0\fR
+normalization scheme to convert all these into a standard form as
+well, and \s-1GCC\s0 will warn if your code is not in \s-1NFKC\s0 if you use
+\&\fB\-Wnormalized=nfkc\fR.  This warning is comparable to warning
+about every identifier that contains the letter O because it might be
+confused with the digit 0, and so is not the default, but may be
+useful as a local coding convention if the programming environment is
+unable to be fixed to display these characters distinctly.
+.IP "\fB\-Wno\-deprecated\fR" 4
+.IX Item "-Wno-deprecated"
+Do not warn about usage of deprecated features.
+.IP "\fB\-Wno\-deprecated\-declarations\fR" 4
+.IX Item "-Wno-deprecated-declarations"
+Do not warn about uses of functions,
+variables, and types marked as deprecated by using the \f(CW\*(C`deprecated\*(C'\fR
+attribute.
+.IP "\fB\-Wno\-overflow\fR" 4
+.IX Item "-Wno-overflow"
+Do not warn about compile-time overflow in constant expressions.
+.IP "\fB\-Woverride\-init\fR (C and Objective-C only)" 4
+.IX Item "-Woverride-init (C and Objective-C only)"
+Warn if an initialized field without side effects is overridden when
+using designated initializers.
+.Sp
+This warning is included in \fB\-Wextra\fR.  To get other
+\&\fB\-Wextra\fR warnings without this one, use \fB\-Wextra
+\&\-Wno\-override\-init\fR.
+.IP "\fB\-Wpacked\fR" 4
+.IX Item "-Wpacked"
+Warn if a structure is given the packed attribute, but the packed
+attribute has no effect on the layout or size of the structure.
+Such structures may be mis-aligned for little benefit.  For
+instance, in this code, the variable \f(CW\*(C`f.x\*(C'\fR in \f(CW\*(C`struct bar\*(C'\fR
+will be misaligned even though \f(CW\*(C`struct bar\*(C'\fR does not itself
+have the packed attribute:
+.Sp
+.Vb 8
+\&        struct foo {
+\&          int x;
+\&          char a, b, c, d;
+\&        } _\|_attribute_\|_((packed));
+\&        struct bar {
+\&          char z;
+\&          struct foo f;
+\&        };
+.Ve
+.IP "\fB\-Wpacked\-bitfield\-compat\fR" 4
+.IX Item "-Wpacked-bitfield-compat"
+The 4.1, 4.2 and 4.3 series of \s-1GCC\s0 ignore the \f(CW\*(C`packed\*(C'\fR attribute
+on bit-fields of type \f(CW\*(C`char\*(C'\fR.  This has been fixed in \s-1GCC\s0 4.4 but
+the change can lead to differences in the structure layout.  \s-1GCC\s0
+informs you when the offset of such a field has changed in \s-1GCC\s0 4.4.
+For example there is no longer a 4\-bit padding between field \f(CW\*(C`a\*(C'\fR
+and \f(CW\*(C`b\*(C'\fR in this structure:
+.Sp
+.Vb 5
+\&        struct foo
+\&        {
+\&          char a:4;
+\&          char b:8;
+\&        } _\|_attribute_\|_ ((packed));
+.Ve
+.Sp
+This warning is enabled by default.  Use
+\&\fB\-Wno\-packed\-bitfield\-compat\fR to disable this warning.
+.IP "\fB\-Wpadded\fR" 4
+.IX Item "-Wpadded"
+Warn if padding is included in a structure, either to align an element
+of the structure or to align the whole structure.  Sometimes when this
+happens it is possible to rearrange the fields of the structure to
+reduce the padding and so make the structure smaller.
+.IP "\fB\-Wredundant\-decls\fR" 4
+.IX Item "-Wredundant-decls"
+Warn if anything is declared more than once in the same scope, even in
+cases where multiple declaration is valid and changes nothing.
+.IP "\fB\-Wnested\-externs\fR (C and Objective-C only)" 4
+.IX Item "-Wnested-externs (C and Objective-C only)"
+Warn if an \f(CW\*(C`extern\*(C'\fR declaration is encountered within a function.
+.IP "\fB\-Winline\fR" 4
+.IX Item "-Winline"
+Warn if a function can not be inlined and it was declared as inline.
+Even with this option, the compiler will not warn about failures to
+inline functions declared in system headers.
+.Sp
+The compiler uses a variety of heuristics to determine whether or not
+to inline a function.  For example, the compiler takes into account
+the size of the function being inlined and the amount of inlining
+that has already been done in the current function.  Therefore,
+seemingly insignificant changes in the source program can cause the
+warnings produced by \fB\-Winline\fR to appear or disappear.
+.IP "\fB\-Wno\-invalid\-offsetof\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-invalid-offsetof ( and Objective- only)"
+Suppress warnings from applying the \fBoffsetof\fR macro to a non-POD
+type.  According to the 1998 \s-1ISO\s0 \*(C+ standard, applying \fBoffsetof\fR
+to a non-POD type is undefined.  In existing \*(C+ implementations,
+however, \fBoffsetof\fR typically gives meaningful results even when
+applied to certain kinds of non-POD types. (Such as a simple
+\&\fBstruct\fR that fails to be a \s-1POD\s0 type only by virtue of having a
+constructor.)  This flag is for users who are aware that they are
+writing nonportable code and who have deliberately chosen to ignore the
+warning about it.
+.Sp
+The restrictions on \fBoffsetof\fR may be relaxed in a future version
+of the \*(C+ standard.
+.IP "\fB\-Wno\-int\-to\-pointer\-cast\fR" 4
+.IX Item "-Wno-int-to-pointer-cast"
+Suppress warnings from casts to pointer type of an integer of a
+different size. In \*(C+, casting to a pointer type of smaller size is
+an error. \fBWint-to-pointer-cast\fR is enabled by default.
+.IP "\fB\-Wno\-pointer\-to\-int\-cast\fR (C and Objective-C only)" 4
+.IX Item "-Wno-pointer-to-int-cast (C and Objective-C only)"
+Suppress warnings from casts from a pointer to an integer type of a
+different size.
+.IP "\fB\-Winvalid\-pch\fR" 4
+.IX Item "-Winvalid-pch"
+Warn if a precompiled header is found in
+the search path but can't be used.
+.IP "\fB\-Wlong\-long\fR" 4
+.IX Item "-Wlong-long"
+Warn if \fBlong long\fR type is used.  This is enabled by either
+\&\fB\-pedantic\fR or \fB\-Wtraditional\fR in \s-1ISO\s0 C90 and \*(C+98
+modes.  To inhibit the warning messages, use \fB\-Wno\-long\-long\fR.
+.IP "\fB\-Wvariadic\-macros\fR" 4
+.IX Item "-Wvariadic-macros"
+Warn if variadic macros are used in pedantic \s-1ISO\s0 C90 mode, or the \s-1GNU\s0
+alternate syntax when in pedantic \s-1ISO\s0 C99 mode.  This is default.
+To inhibit the warning messages, use \fB\-Wno\-variadic\-macros\fR.
+.IP "\fB\-Wvla\fR" 4
+.IX Item "-Wvla"
+Warn if variable length array is used in the code.
+\&\fB\-Wno\-vla\fR will prevent the \fB\-pedantic\fR warning of
+the variable length array.
+.IP "\fB\-Wvolatile\-register\-var\fR" 4
+.IX Item "-Wvolatile-register-var"
+Warn if a register variable is declared volatile.  The volatile
+modifier does not inhibit all optimizations that may eliminate reads
+and/or writes to register variables.  This warning is enabled by
+\&\fB\-Wall\fR.
+.IP "\fB\-Wdisabled\-optimization\fR" 4
+.IX Item "-Wdisabled-optimization"
+Warn if a requested optimization pass is disabled.  This warning does
+not generally indicate that there is anything wrong with your code; it
+merely indicates that \s-1GCC\s0's optimizers were unable to handle the code
+effectively.  Often, the problem is that your code is too big or too
+complex; \s-1GCC\s0 will refuse to optimize programs when the optimization
+itself is likely to take inordinate amounts of time.
+.IP "\fB\-Wpointer\-sign\fR (C and Objective-C only)" 4
+.IX Item "-Wpointer-sign (C and Objective-C only)"
+Warn for pointer argument passing or assignment with different signedness.
+This option is only supported for C and Objective-C.  It is implied by
+\&\fB\-Wall\fR and by \fB\-pedantic\fR, which can be disabled with
+\&\fB\-Wno\-pointer\-sign\fR.
+.IP "\fB\-Wstack\-protector\fR" 4
+.IX Item "-Wstack-protector"
+This option is only active when \fB\-fstack\-protector\fR is active.  It
+warns about functions that will not be protected against stack smashing.
+.IP "\fB\-Wno\-mudflap\fR" 4
+.IX Item "-Wno-mudflap"
+Suppress warnings about constructs that cannot be instrumented by
+\&\fB\-fmudflap\fR.
+.IP "\fB\-Woverlength\-strings\fR" 4
+.IX Item "-Woverlength-strings"
+Warn about string constants which are longer than the \*(L"minimum
+maximum\*(R" length specified in the C standard.  Modern compilers
+generally allow string constants which are much longer than the
+standard's minimum limit, but very portable programs should avoid
+using longer strings.
+.Sp
+The limit applies \fIafter\fR string constant concatenation, and does
+not count the trailing \s-1NUL\s0.  In C90, the limit was 509 characters; in
+C99, it was raised to 4095.  \*(C+98 does not specify a normative
+minimum maximum, so we do not diagnose overlength strings in \*(C+.
+.Sp
+This option is implied by \fB\-pedantic\fR, and can be disabled with
+\&\fB\-Wno\-overlength\-strings\fR.
+.IP "\fB\-Wunsuffixed\-float\-constants\fR (C and Objective-C only)" 4
+.IX Item "-Wunsuffixed-float-constants (C and Objective-C only)"
+\&\s-1GCC\s0 will issue a warning for any floating constant that does not have
+a suffix.  When used together with \fB\-Wsystem\-headers\fR it will
+warn about such constants in system header files.  This can be useful
+when preparing code to use with the \f(CW\*(C`FLOAT_CONST_DECIMAL64\*(C'\fR pragma
+from the decimal floating-point extension to C99.
+.SS "Options for Debugging Your Program or \s-1GCC\s0"
+.IX Subsection "Options for Debugging Your Program or GCC"
+\&\s-1GCC\s0 has various special options that are used for debugging
+either your program or \s-1GCC:\s0
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+Produce debugging information in the operating system's native format
+(stabs, \s-1COFF\s0, \s-1XCOFF\s0, or \s-1DWARF\s0 2).  \s-1GDB\s0 can work with this debugging
+information.
+.Sp
+On most systems that use stabs format, \fB\-g\fR enables use of extra
+debugging information that only \s-1GDB\s0 can use; this extra information
+makes debugging work better in \s-1GDB\s0 but will probably make other debuggers
+crash or
+refuse to read the program.  If you want to control for certain whether
+to generate the extra information, use \fB\-gstabs+\fR, \fB\-gstabs\fR,
+\&\fB\-gxcoff+\fR, \fB\-gxcoff\fR, or \fB\-gvms\fR (see below).
+.Sp
+\&\s-1GCC\s0 allows you to use \fB\-g\fR with
+\&\fB\-O\fR.  The shortcuts taken by optimized code may occasionally
+produce surprising results: some variables you declared may not exist
+at all; flow of control may briefly move where you did not expect it;
+some statements may not be executed because they compute constant
+results or their values were already at hand; some statements may
+execute in different places because they were moved out of loops.
+.Sp
+Nevertheless it proves possible to debug optimized output.  This makes
+it reasonable to use the optimizer for programs that might have bugs.
+.Sp
+The following options are useful when \s-1GCC\s0 is generated with the
+capability for more than one debugging format.
+.IP "\fB\-ggdb\fR" 4
+.IX Item "-ggdb"
+Produce debugging information for use by \s-1GDB\s0.  This means to use the
+most expressive format available (\s-1DWARF\s0 2, stabs, or the native format
+if neither of those are supported), including \s-1GDB\s0 extensions if at all
+possible.
+.IP "\fB\-gstabs\fR" 4
+.IX Item "-gstabs"
+Produce debugging information in stabs format (if that is supported),
+without \s-1GDB\s0 extensions.  This is the format used by \s-1DBX\s0 on most \s-1BSD\s0
+systems.  On \s-1MIPS\s0, Alpha and System V Release 4 systems this option
+produces stabs debugging output which is not understood by \s-1DBX\s0 or \s-1SDB\s0.
+On System V Release 4 systems this option requires the \s-1GNU\s0 assembler.
+.IP "\fB\-feliminate\-unused\-debug\-symbols\fR" 4
+.IX Item "-feliminate-unused-debug-symbols"
+Produce debugging information in stabs format (if that is supported),
+for only symbols that are actually used.
+.IP "\fB\-femit\-class\-debug\-always\fR" 4
+.IX Item "-femit-class-debug-always"
+Instead of emitting debugging information for a \*(C+ class in only one
+object file, emit it in all object files using the class.  This option
+should be used only with debuggers that are unable to handle the way \s-1GCC\s0
+normally emits debugging information for classes because using this
+option will increase the size of debugging information by as much as a
+factor of two.
+.IP "\fB\-gstabs+\fR" 4
+.IX Item "-gstabs+"
+Produce debugging information in stabs format (if that is supported),
+using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0).  The
+use of these extensions is likely to make other debuggers crash or
+refuse to read the program.
+.IP "\fB\-gcoff\fR" 4
+.IX Item "-gcoff"
+Produce debugging information in \s-1COFF\s0 format (if that is supported).
+This is the format used by \s-1SDB\s0 on most System V systems prior to
+System V Release 4.
+.IP "\fB\-gxcoff\fR" 4
+.IX Item "-gxcoff"
+Produce debugging information in \s-1XCOFF\s0 format (if that is supported).
+This is the format used by the \s-1DBX\s0 debugger on \s-1IBM\s0 \s-1RS/6000\s0 systems.
+.IP "\fB\-gxcoff+\fR" 4
+.IX Item "-gxcoff+"
+Produce debugging information in \s-1XCOFF\s0 format (if that is supported),
+using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0).  The
+use of these extensions is likely to make other debuggers crash or
+refuse to read the program, and may cause assemblers other than the \s-1GNU\s0
+assembler (\s-1GAS\s0) to fail with an error.
+.IP "\fB\-gdwarf\-\fR\fIversion\fR" 4
+.IX Item "-gdwarf-version"
+Produce debugging information in \s-1DWARF\s0 format (if that is
+supported).  This is the format used by \s-1DBX\s0 on \s-1IRIX\s0 6.  The value
+of \fIversion\fR may be either 2, 3 or 4; the default version is 2.
+.Sp
+Note that with \s-1DWARF\s0 version 2 some ports require, and will always
+use, some non-conflicting \s-1DWARF\s0 3 extensions in the unwind tables.
+.Sp
+Version 4 may require \s-1GDB\s0 7.0 and \fB\-fvar\-tracking\-assignments\fR
+for maximum benefit.
+.IP "\fB\-gstrict\-dwarf\fR" 4
+.IX Item "-gstrict-dwarf"
+Disallow using extensions of later \s-1DWARF\s0 standard version than selected
+with \fB\-gdwarf\-\fR\fIversion\fR.  On most targets using non-conflicting
+\&\s-1DWARF\s0 extensions from later standard versions is allowed.
+.IP "\fB\-gno\-strict\-dwarf\fR" 4
+.IX Item "-gno-strict-dwarf"
+Allow using extensions of later \s-1DWARF\s0 standard version than selected with
+\&\fB\-gdwarf\-\fR\fIversion\fR.
+.IP "\fB\-gvms\fR" 4
+.IX Item "-gvms"
+Produce debugging information in \s-1VMS\s0 debug format (if that is
+supported).  This is the format used by \s-1DEBUG\s0 on \s-1VMS\s0 systems.
+.IP "\fB\-g\fR\fIlevel\fR" 4
+.IX Item "-glevel"
+.PD 0
+.IP "\fB\-ggdb\fR\fIlevel\fR" 4
+.IX Item "-ggdblevel"
+.IP "\fB\-gstabs\fR\fIlevel\fR" 4
+.IX Item "-gstabslevel"
+.IP "\fB\-gcoff\fR\fIlevel\fR" 4
+.IX Item "-gcofflevel"
+.IP "\fB\-gxcoff\fR\fIlevel\fR" 4
+.IX Item "-gxcofflevel"
+.IP "\fB\-gvms\fR\fIlevel\fR" 4
+.IX Item "-gvmslevel"
+.PD
+Request debugging information and also use \fIlevel\fR to specify how
+much information.  The default level is 2.
+.Sp
+Level 0 produces no debug information at all.  Thus, \fB\-g0\fR negates
+\&\fB\-g\fR.
+.Sp
+Level 1 produces minimal information, enough for making backtraces in
+parts of the program that you don't plan to debug.  This includes
+descriptions of functions and external variables, but no information
+about local variables and no line numbers.
+.Sp
+Level 3 includes extra information, such as all the macro definitions
+present in the program.  Some debuggers support macro expansion when
+you use \fB\-g3\fR.
+.Sp
+\&\fB\-gdwarf\-2\fR does not accept a concatenated debug level, because
+\&\s-1GCC\s0 used to support an option \fB\-gdwarf\fR that meant to generate
+debug information in version 1 of the \s-1DWARF\s0 format (which is very
+different from version 2), and it would have been too confusing.  That
+debug format is long obsolete, but the option cannot be changed now.
+Instead use an additional \fB\-g\fR\fIlevel\fR option to change the
+debug level for \s-1DWARF\s0.
+.IP "\fB\-gtoggle\fR" 4
+.IX Item "-gtoggle"
+Turn off generation of debug info, if leaving out this option would have
+generated it, or turn it on at level 2 otherwise.  The position of this
+argument in the command line does not matter, it takes effect after all
+other options are processed, and it does so only once, no matter how
+many times it is given.  This is mainly intended to be used with
+\&\fB\-fcompare\-debug\fR.
+.IP "\fB\-fdump\-final\-insns\fR[\fB=\fR\fIfile\fR]" 4
+.IX Item "-fdump-final-insns[=file]"
+Dump the final internal representation (\s-1RTL\s0) to \fIfile\fR.  If the
+optional argument is omitted (or if \fIfile\fR is \f(CW\*(C`.\*(C'\fR), the name
+of the dump file will be determined by appending \f(CW\*(C`.gkd\*(C'\fR to the
+compilation output file name.
+.IP "\fB\-fcompare\-debug\fR[\fB=\fR\fIopts\fR]" 4
+.IX Item "-fcompare-debug[=opts]"
+If no error occurs during compilation, run the compiler a second time,
+adding \fIopts\fR and \fB\-fcompare\-debug\-second\fR to the arguments
+passed to the second compilation.  Dump the final internal
+representation in both compilations, and print an error if they differ.
+.Sp
+If the equal sign is omitted, the default \fB\-gtoggle\fR is used.
+.Sp
+The environment variable \fB\s-1GCC_COMPARE_DEBUG\s0\fR, if defined, non-empty
+and nonzero, implicitly enables \fB\-fcompare\-debug\fR.  If
+\&\fB\s-1GCC_COMPARE_DEBUG\s0\fR is defined to a string starting with a dash,
+then it is used for \fIopts\fR, otherwise the default \fB\-gtoggle\fR
+is used.
+.Sp
+\&\fB\-fcompare\-debug=\fR, with the equal sign but without \fIopts\fR,
+is equivalent to \fB\-fno\-compare\-debug\fR, which disables the dumping
+of the final representation and the second compilation, preventing even
+\&\fB\s-1GCC_COMPARE_DEBUG\s0\fR from taking effect.
+.Sp
+To verify full coverage during \fB\-fcompare\-debug\fR testing, set
+\&\fB\s-1GCC_COMPARE_DEBUG\s0\fR to say \fB\-fcompare\-debug\-not\-overridden\fR,
+which \s-1GCC\s0 will reject as an invalid option in any actual compilation
+(rather than preprocessing, assembly or linking).  To get just a
+warning, setting \fB\s-1GCC_COMPARE_DEBUG\s0\fR to \fB\-w%n\-fcompare\-debug
+not overridden\fR will do.
+.IP "\fB\-fcompare\-debug\-second\fR" 4
+.IX Item "-fcompare-debug-second"
+This option is implicitly passed to the compiler for the second
+compilation requested by \fB\-fcompare\-debug\fR, along with options to
+silence warnings, and omitting other options that would cause
+side-effect compiler outputs to files or to the standard output.  Dump
+files and preserved temporary files are renamed so as to contain the
+\&\f(CW\*(C`.gk\*(C'\fR additional extension during the second compilation, to avoid
+overwriting those generated by the first.
+.Sp
+When this option is passed to the compiler driver, it causes the
+\&\fIfirst\fR compilation to be skipped, which makes it useful for little
+other than debugging the compiler proper.
+.IP "\fB\-feliminate\-dwarf2\-dups\fR" 4
+.IX Item "-feliminate-dwarf2-dups"
+Compress \s-1DWARF2\s0 debugging information by eliminating duplicated
+information about each symbol.  This option only makes sense when
+generating \s-1DWARF2\s0 debugging information with \fB\-gdwarf\-2\fR.
+.IP "\fB\-femit\-struct\-debug\-baseonly\fR" 4
+.IX Item "-femit-struct-debug-baseonly"
+Emit debug information for struct-like types
+only when the base name of the compilation source file
+matches the base name of file in which the struct was defined.
+.Sp
+This option substantially reduces the size of debugging information,
+but at significant potential loss in type information to the debugger.
+See \fB\-femit\-struct\-debug\-reduced\fR for a less aggressive option.
+See \fB\-femit\-struct\-debug\-detailed\fR for more detailed control.
+.Sp
+This option works only with \s-1DWARF\s0 2.
+.IP "\fB\-femit\-struct\-debug\-reduced\fR" 4
+.IX Item "-femit-struct-debug-reduced"
+Emit debug information for struct-like types
+only when the base name of the compilation source file
+matches the base name of file in which the type was defined,
+unless the struct is a template or defined in a system header.
+.Sp
+This option significantly reduces the size of debugging information,
+with some potential loss in type information to the debugger.
+See \fB\-femit\-struct\-debug\-baseonly\fR for a more aggressive option.
+See \fB\-femit\-struct\-debug\-detailed\fR for more detailed control.
+.Sp
+This option works only with \s-1DWARF\s0 2.
+.IP "\fB\-femit\-struct\-debug\-detailed\fR[\fB=\fR\fIspec-list\fR]" 4
+.IX Item "-femit-struct-debug-detailed[=spec-list]"
+Specify the struct-like types
+for which the compiler will generate debug information.
+The intent is to reduce duplicate struct debug information
+between different object files within the same program.
+.Sp
+This option is a detailed version of
+\&\fB\-femit\-struct\-debug\-reduced\fR and \fB\-femit\-struct\-debug\-baseonly\fR,
+which will serve for most needs.
+.Sp
+A specification has the syntax[\fBdir:\fR|\fBind:\fR][\fBord:\fR|\fBgen:\fR](\fBany\fR|\fBsys\fR|\fBbase\fR|\fBnone\fR)
+.Sp
+The optional first word limits the specification to
+structs that are used directly (\fBdir:\fR) or used indirectly (\fBind:\fR).
+A struct type is used directly when it is the type of a variable, member.
+Indirect uses arise through pointers to structs.
+That is, when use of an incomplete struct would be legal, the use is indirect.
+An example is
+\&\fBstruct one direct; struct two * indirect;\fR.
+.Sp
+The optional second word limits the specification to
+ordinary structs (\fBord:\fR) or generic structs (\fBgen:\fR).
+Generic structs are a bit complicated to explain.
+For \*(C+, these are non-explicit specializations of template classes,
+or non-template classes within the above.
+Other programming languages have generics,
+but \fB\-femit\-struct\-debug\-detailed\fR does not yet implement them.
+.Sp
+The third word specifies the source files for those
+structs for which the compiler will emit debug information.
+The values \fBnone\fR and \fBany\fR have the normal meaning.
+The value \fBbase\fR means that
+the base of name of the file in which the type declaration appears
+must match the base of the name of the main compilation file.
+In practice, this means that
+types declared in \fIfoo.c\fR and \fIfoo.h\fR will have debug information,
+but types declared in other header will not.
+The value \fBsys\fR means those types satisfying \fBbase\fR
+or declared in system or compiler headers.
+.Sp
+You may need to experiment to determine the best settings for your application.
+.Sp
+The default is \fB\-femit\-struct\-debug\-detailed=all\fR.
+.Sp
+This option works only with \s-1DWARF\s0 2.
+.IP "\fB\-fenable\-icf\-debug\fR" 4
+.IX Item "-fenable-icf-debug"
+Generate additional debug information to support identical code folding (\s-1ICF\s0).
+This option only works with \s-1DWARF\s0 version 2 or higher.
+.IP "\fB\-fno\-merge\-debug\-strings\fR" 4
+.IX Item "-fno-merge-debug-strings"
+Direct the linker to not merge together strings in the debugging
+information which are identical in different object files.  Merging is
+not supported by all assemblers or linkers.  Merging decreases the size
+of the debug information in the output file at the cost of increasing
+link processing time.  Merging is enabled by default.
+.IP "\fB\-fdebug\-prefix\-map=\fR\fIold\fR\fB=\fR\fInew\fR" 4
+.IX Item "-fdebug-prefix-map=old=new"
+When compiling files in directory \fI\fIold\fI\fR, record debugging
+information describing them as in \fI\fInew\fI\fR instead.
+.IP "\fB\-fno\-dwarf2\-cfi\-asm\fR" 4
+.IX Item "-fno-dwarf2-cfi-asm"
+Emit \s-1DWARF\s0 2 unwind info as compiler generated \f(CW\*(C`.eh_frame\*(C'\fR section
+instead of using \s-1GAS\s0 \f(CW\*(C`.cfi_*\*(C'\fR directives.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+Generate extra code to write profile information suitable for the
+analysis program \fBprof\fR.  You must use this option when compiling
+the source files you want data about, and you must also use it when
+linking.
+.IP "\fB\-pg\fR" 4
+.IX Item "-pg"
+Generate extra code to write profile information suitable for the
+analysis program \fBgprof\fR.  You must use this option when compiling
+the source files you want data about, and you must also use it when
+linking.
+.IP "\fB\-Q\fR" 4
+.IX Item "-Q"
+Makes the compiler print out each function name as it is compiled, and
+print some statistics about each pass when it finishes.
+.IP "\fB\-ftime\-report\fR" 4
+.IX Item "-ftime-report"
+Makes the compiler print some statistics about the time consumed by each
+pass when it finishes.
+.IP "\fB\-fmem\-report\fR" 4
+.IX Item "-fmem-report"
+Makes the compiler print some statistics about permanent memory
+allocation when it finishes.
+.IP "\fB\-fpre\-ipa\-mem\-report\fR" 4
+.IX Item "-fpre-ipa-mem-report"
+.PD 0
+.IP "\fB\-fpost\-ipa\-mem\-report\fR" 4
+.IX Item "-fpost-ipa-mem-report"
+.PD
+Makes the compiler print some statistics about permanent memory
+allocation before or after interprocedural optimization.
+.IP "\fB\-fstack\-usage\fR" 4
+.IX Item "-fstack-usage"
+Makes the compiler output stack usage information for the program, on a
+per-function basis.  The filename for the dump is made by appending
+\&\fI.su\fR to the \fIauxname\fR.  \fIauxname\fR is generated from the name of
+the output file, if explicitly specified and it is not an executable,
+otherwise it is the basename of the source file.  An entry is made up
+of three fields:
+.RS 4
+.IP "\(bu" 4
+The name of the function.
+.IP "\(bu" 4
+A number of bytes.
+.IP "\(bu" 4
+One or more qualifiers: \f(CW\*(C`static\*(C'\fR, \f(CW\*(C`dynamic\*(C'\fR, \f(CW\*(C`bounded\*(C'\fR.
+.RE
+.RS 4
+.Sp
+The qualifier \f(CW\*(C`static\*(C'\fR means that the function manipulates the stack
+statically: a fixed number of bytes are allocated for the frame on function
+entry and released on function exit; no stack adjustments are otherwise made
+in the function.  The second field is this fixed number of bytes.
+.Sp
+The qualifier \f(CW\*(C`dynamic\*(C'\fR means that the function manipulates the stack
+dynamically: in addition to the static allocation described above, stack
+adjustments are made in the body of the function, for example to push/pop
+arguments around function calls.  If the qualifier \f(CW\*(C`bounded\*(C'\fR is also
+present, the amount of these adjustments is bounded at compile-time and
+the second field is an upper bound of the total amount of stack used by
+the function.  If it is not present, the amount of these adjustments is
+not bounded at compile-time and the second field only represents the
+bounded part.
+.RE
+.IP "\fB\-fprofile\-arcs\fR" 4
+.IX Item "-fprofile-arcs"
+Add code so that program flow \fIarcs\fR are instrumented.  During
+execution the program records how many times each branch and call is
+executed and how many times it is taken or returns.  When the compiled
+program exits it saves this data to a file called
+\&\fI\fIauxname\fI.gcda\fR for each source file.  The data may be used for
+profile-directed optimizations (\fB\-fbranch\-probabilities\fR), or for
+test coverage analysis (\fB\-ftest\-coverage\fR).  Each object file's
+\&\fIauxname\fR is generated from the name of the output file, if
+explicitly specified and it is not the final executable, otherwise it is
+the basename of the source file.  In both cases any suffix is removed
+(e.g. \fIfoo.gcda\fR for input file \fIdir/foo.c\fR, or
+\&\fIdir/foo.gcda\fR for output file specified as \fB\-o dir/foo.o\fR).
+.IP "\fB\-\-coverage\fR" 4
+.IX Item "--coverage"
+This option is used to compile and link code instrumented for coverage
+analysis.  The option is a synonym for \fB\-fprofile\-arcs\fR
+\&\fB\-ftest\-coverage\fR (when compiling) and \fB\-lgcov\fR (when
+linking).  See the documentation for those options for more details.
+.RS 4
+.IP "\(bu" 4
+Compile the source files with \fB\-fprofile\-arcs\fR plus optimization
+and code generation options.  For test coverage analysis, use the
+additional \fB\-ftest\-coverage\fR option.  You do not need to profile
+every source file in a program.
+.IP "\(bu" 4
+Link your object files with \fB\-lgcov\fR or \fB\-fprofile\-arcs\fR
+(the latter implies the former).
+.IP "\(bu" 4
+Run the program on a representative workload to generate the arc profile
+information.  This may be repeated any number of times.  You can run
+concurrent instances of your program, and provided that the file system
+supports locking, the data files will be correctly updated.  Also
+\&\f(CW\*(C`fork\*(C'\fR calls are detected and correctly handled (double counting
+will not happen).
+.IP "\(bu" 4
+For profile-directed optimizations, compile the source files again with
+the same optimization and code generation options plus
+\&\fB\-fbranch\-probabilities\fR.
+.IP "\(bu" 4
+For test coverage analysis, use \fBgcov\fR to produce human readable
+information from the \fI.gcno\fR and \fI.gcda\fR files.  Refer to the
+\&\fBgcov\fR documentation for further information.
+.RE
+.RS 4
+.Sp
+With \fB\-fprofile\-arcs\fR, for each function of your program \s-1GCC\s0
+creates a program flow graph, then finds a spanning tree for the graph.
+Only arcs that are not on the spanning tree have to be instrumented: the
+compiler adds code to count the number of times that these arcs are
+executed.  When an arc is the only exit or only entrance to a block, the
+instrumentation code can be added to the block; otherwise, a new basic
+block must be created to hold the instrumentation code.
+.RE
+.IP "\fB\-ftest\-coverage\fR" 4
+.IX Item "-ftest-coverage"
+Produce a notes file that the \fBgcov\fR code-coverage utility can use to
+show program coverage.  Each source file's note file is called
+\&\fI\fIauxname\fI.gcno\fR.  Refer to the \fB\-fprofile\-arcs\fR option
+above for a description of \fIauxname\fR and instructions on how to
+generate test coverage data.  Coverage data will match the source files
+more closely, if you do not optimize.
+.IP "\fB\-fdbg\-cnt\-list\fR" 4
+.IX Item "-fdbg-cnt-list"
+Print the name and the counter upper bound for all debug counters.
+.IP "\fB\-fdbg\-cnt=\fR\fIcounter-value-list\fR" 4
+.IX Item "-fdbg-cnt=counter-value-list"
+Set the internal debug counter upper bound.  \fIcounter-value-list\fR
+is a comma-separated list of \fIname\fR:\fIvalue\fR pairs
+which sets the upper bound of each debug counter \fIname\fR to \fIvalue\fR.
+All debug counters have the initial upper bound of \fI\s-1UINT_MAX\s0\fR,
+thus \fIdbg_cnt()\fR returns true always unless the upper bound is set by this option.
+e.g. With \-fdbg\-cnt=dce:10,tail_call:0
+dbg_cnt(dce) will return true only for first 10 invocations
+and dbg_cnt(tail_call) will return false always.
+.IP "\fB\-d\fR\fIletters\fR" 4
+.IX Item "-dletters"
+.PD 0
+.IP "\fB\-fdump\-rtl\-\fR\fIpass\fR" 4
+.IX Item "-fdump-rtl-pass"
+.PD
+Says to make debugging dumps during compilation at times specified by
+\&\fIletters\fR.  This is used for debugging the RTL-based passes of the
+compiler.  The file names for most of the dumps are made by appending
+a pass number and a word to the \fIdumpname\fR, and the files are
+created in the directory of the output file.  Note that the pass
+number is computed statically as passes get registered into the pass
+manager.  Thus the numbering is not related to the dynamic order of
+execution of passes.  In particular, a pass installed by a plugin
+could have a number over 200 even if it executed quite early.
+\&\fIdumpname\fR is generated from the name of the output file, if
+explicitly specified and it is not an executable, otherwise it is the
+basename of the source file. These switches may have different effects
+when \fB\-E\fR is used for preprocessing.
+.Sp
+Debug dumps can be enabled with a \fB\-fdump\-rtl\fR switch or some
+\&\fB\-d\fR option \fIletters\fR.  Here are the possible
+letters for use in \fIpass\fR and \fIletters\fR, and their meanings:
+.RS 4
+.IP "\fB\-fdump\-rtl\-alignments\fR" 4
+.IX Item "-fdump-rtl-alignments"
+Dump after branch alignments have been computed.
+.IP "\fB\-fdump\-rtl\-asmcons\fR" 4
+.IX Item "-fdump-rtl-asmcons"
+Dump after fixing rtl statements that have unsatisfied in/out constraints.
+.IP "\fB\-fdump\-rtl\-auto_inc_dec\fR" 4
+.IX Item "-fdump-rtl-auto_inc_dec"
+Dump after auto-inc-dec discovery.  This pass is only run on
+architectures that have auto inc or auto dec instructions.
+.IP "\fB\-fdump\-rtl\-barriers\fR" 4
+.IX Item "-fdump-rtl-barriers"
+Dump after cleaning up the barrier instructions.
+.IP "\fB\-fdump\-rtl\-bbpart\fR" 4
+.IX Item "-fdump-rtl-bbpart"
+Dump after partitioning hot and cold basic blocks.
+.IP "\fB\-fdump\-rtl\-bbro\fR" 4
+.IX Item "-fdump-rtl-bbro"
+Dump after block reordering.
+.IP "\fB\-fdump\-rtl\-btl1\fR" 4
+.IX Item "-fdump-rtl-btl1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-btl2\fR" 4
+.IX Item "-fdump-rtl-btl2"
+.PD
+\&\fB\-fdump\-rtl\-btl1\fR and \fB\-fdump\-rtl\-btl2\fR enable dumping
+after the two branch
+target load optimization passes.
+.IP "\fB\-fdump\-rtl\-bypass\fR" 4
+.IX Item "-fdump-rtl-bypass"
+Dump after jump bypassing and control flow optimizations.
+.IP "\fB\-fdump\-rtl\-combine\fR" 4
+.IX Item "-fdump-rtl-combine"
+Dump after the \s-1RTL\s0 instruction combination pass.
+.IP "\fB\-fdump\-rtl\-compgotos\fR" 4
+.IX Item "-fdump-rtl-compgotos"
+Dump after duplicating the computed gotos.
+.IP "\fB\-fdump\-rtl\-ce1\fR" 4
+.IX Item "-fdump-rtl-ce1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-ce2\fR" 4
+.IX Item "-fdump-rtl-ce2"
+.IP "\fB\-fdump\-rtl\-ce3\fR" 4
+.IX Item "-fdump-rtl-ce3"
+.PD
+\&\fB\-fdump\-rtl\-ce1\fR, \fB\-fdump\-rtl\-ce2\fR, and
+\&\fB\-fdump\-rtl\-ce3\fR enable dumping after the three
+if conversion passes.
+.IP "\fB\-fdump\-rtl\-cprop_hardreg\fR" 4
+.IX Item "-fdump-rtl-cprop_hardreg"
+Dump after hard register copy propagation.
+.IP "\fB\-fdump\-rtl\-csa\fR" 4
+.IX Item "-fdump-rtl-csa"
+Dump after combining stack adjustments.
+.IP "\fB\-fdump\-rtl\-cse1\fR" 4
+.IX Item "-fdump-rtl-cse1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-cse2\fR" 4
+.IX Item "-fdump-rtl-cse2"
+.PD
+\&\fB\-fdump\-rtl\-cse1\fR and \fB\-fdump\-rtl\-cse2\fR enable dumping after
+the two common sub-expression elimination passes.
+.IP "\fB\-fdump\-rtl\-dce\fR" 4
+.IX Item "-fdump-rtl-dce"
+Dump after the standalone dead code elimination passes.
+.IP "\fB\-fdump\-rtl\-dbr\fR" 4
+.IX Item "-fdump-rtl-dbr"
+Dump after delayed branch scheduling.
+.IP "\fB\-fdump\-rtl\-dce1\fR" 4
+.IX Item "-fdump-rtl-dce1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-dce2\fR" 4
+.IX Item "-fdump-rtl-dce2"
+.PD
+\&\fB\-fdump\-rtl\-dce1\fR and \fB\-fdump\-rtl\-dce2\fR enable dumping after
+the two dead store elimination passes.
+.IP "\fB\-fdump\-rtl\-eh\fR" 4
+.IX Item "-fdump-rtl-eh"
+Dump after finalization of \s-1EH\s0 handling code.
+.IP "\fB\-fdump\-rtl\-eh_ranges\fR" 4
+.IX Item "-fdump-rtl-eh_ranges"
+Dump after conversion of \s-1EH\s0 handling range regions.
+.IP "\fB\-fdump\-rtl\-expand\fR" 4
+.IX Item "-fdump-rtl-expand"
+Dump after \s-1RTL\s0 generation.
+.IP "\fB\-fdump\-rtl\-fwprop1\fR" 4
+.IX Item "-fdump-rtl-fwprop1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-fwprop2\fR" 4
+.IX Item "-fdump-rtl-fwprop2"
+.PD
+\&\fB\-fdump\-rtl\-fwprop1\fR and \fB\-fdump\-rtl\-fwprop2\fR enable
+dumping after the two forward propagation passes.
+.IP "\fB\-fdump\-rtl\-gcse1\fR" 4
+.IX Item "-fdump-rtl-gcse1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-gcse2\fR" 4
+.IX Item "-fdump-rtl-gcse2"
+.PD
+\&\fB\-fdump\-rtl\-gcse1\fR and \fB\-fdump\-rtl\-gcse2\fR enable dumping
+after global common subexpression elimination.
+.IP "\fB\-fdump\-rtl\-init\-regs\fR" 4
+.IX Item "-fdump-rtl-init-regs"
+Dump after the initialization of the registers.
+.IP "\fB\-fdump\-rtl\-initvals\fR" 4
+.IX Item "-fdump-rtl-initvals"
+Dump after the computation of the initial value sets.
+.IP "\fB\-fdump\-rtl\-into_cfglayout\fR" 4
+.IX Item "-fdump-rtl-into_cfglayout"
+Dump after converting to cfglayout mode.
+.IP "\fB\-fdump\-rtl\-ira\fR" 4
+.IX Item "-fdump-rtl-ira"
+Dump after iterated register allocation.
+.IP "\fB\-fdump\-rtl\-jump\fR" 4
+.IX Item "-fdump-rtl-jump"
+Dump after the second jump optimization.
+.IP "\fB\-fdump\-rtl\-loop2\fR" 4
+.IX Item "-fdump-rtl-loop2"
+\&\fB\-fdump\-rtl\-loop2\fR enables dumping after the rtl
+loop optimization passes.
+.IP "\fB\-fdump\-rtl\-mach\fR" 4
+.IX Item "-fdump-rtl-mach"
+Dump after performing the machine dependent reorganization pass, if that
+pass exists.
+.IP "\fB\-fdump\-rtl\-mode_sw\fR" 4
+.IX Item "-fdump-rtl-mode_sw"
+Dump after removing redundant mode switches.
+.IP "\fB\-fdump\-rtl\-rnreg\fR" 4
+.IX Item "-fdump-rtl-rnreg"
+Dump after register renumbering.
+.IP "\fB\-fdump\-rtl\-outof_cfglayout\fR" 4
+.IX Item "-fdump-rtl-outof_cfglayout"
+Dump after converting from cfglayout mode.
+.IP "\fB\-fdump\-rtl\-peephole2\fR" 4
+.IX Item "-fdump-rtl-peephole2"
+Dump after the peephole pass.
+.IP "\fB\-fdump\-rtl\-postreload\fR" 4
+.IX Item "-fdump-rtl-postreload"
+Dump after post-reload optimizations.
+.IP "\fB\-fdump\-rtl\-pro_and_epilogue\fR" 4
+.IX Item "-fdump-rtl-pro_and_epilogue"
+Dump after generating the function pro and epilogues.
+.IP "\fB\-fdump\-rtl\-regmove\fR" 4
+.IX Item "-fdump-rtl-regmove"
+Dump after the register move pass.
+.IP "\fB\-fdump\-rtl\-sched1\fR" 4
+.IX Item "-fdump-rtl-sched1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-sched2\fR" 4
+.IX Item "-fdump-rtl-sched2"
+.PD
+\&\fB\-fdump\-rtl\-sched1\fR and \fB\-fdump\-rtl\-sched2\fR enable dumping
+after the basic block scheduling passes.
+.IP "\fB\-fdump\-rtl\-see\fR" 4
+.IX Item "-fdump-rtl-see"
+Dump after sign extension elimination.
+.IP "\fB\-fdump\-rtl\-seqabstr\fR" 4
+.IX Item "-fdump-rtl-seqabstr"
+Dump after common sequence discovery.
+.IP "\fB\-fdump\-rtl\-shorten\fR" 4
+.IX Item "-fdump-rtl-shorten"
+Dump after shortening branches.
+.IP "\fB\-fdump\-rtl\-sibling\fR" 4
+.IX Item "-fdump-rtl-sibling"
+Dump after sibling call optimizations.
+.IP "\fB\-fdump\-rtl\-split1\fR" 4
+.IX Item "-fdump-rtl-split1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-split2\fR" 4
+.IX Item "-fdump-rtl-split2"
+.IP "\fB\-fdump\-rtl\-split3\fR" 4
+.IX Item "-fdump-rtl-split3"
+.IP "\fB\-fdump\-rtl\-split4\fR" 4
+.IX Item "-fdump-rtl-split4"
+.IP "\fB\-fdump\-rtl\-split5\fR" 4
+.IX Item "-fdump-rtl-split5"
+.PD
+\&\fB\-fdump\-rtl\-split1\fR, \fB\-fdump\-rtl\-split2\fR,
+\&\fB\-fdump\-rtl\-split3\fR, \fB\-fdump\-rtl\-split4\fR and
+\&\fB\-fdump\-rtl\-split5\fR enable dumping after five rounds of
+instruction splitting.
+.IP "\fB\-fdump\-rtl\-sms\fR" 4
+.IX Item "-fdump-rtl-sms"
+Dump after modulo scheduling.  This pass is only run on some
+architectures.
+.IP "\fB\-fdump\-rtl\-stack\fR" 4
+.IX Item "-fdump-rtl-stack"
+Dump after conversion from \s-1GCC\s0's \*(L"flat register file\*(R" registers to the
+x87's stack-like registers.  This pass is only run on x86 variants.
+.IP "\fB\-fdump\-rtl\-subreg1\fR" 4
+.IX Item "-fdump-rtl-subreg1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-subreg2\fR" 4
+.IX Item "-fdump-rtl-subreg2"
+.PD
+\&\fB\-fdump\-rtl\-subreg1\fR and \fB\-fdump\-rtl\-subreg2\fR enable dumping after
+the two subreg expansion passes.
+.IP "\fB\-fdump\-rtl\-unshare\fR" 4
+.IX Item "-fdump-rtl-unshare"
+Dump after all rtl has been unshared.
+.IP "\fB\-fdump\-rtl\-vartrack\fR" 4
+.IX Item "-fdump-rtl-vartrack"
+Dump after variable tracking.
+.IP "\fB\-fdump\-rtl\-vregs\fR" 4
+.IX Item "-fdump-rtl-vregs"
+Dump after converting virtual registers to hard registers.
+.IP "\fB\-fdump\-rtl\-web\fR" 4
+.IX Item "-fdump-rtl-web"
+Dump after live range splitting.
+.IP "\fB\-fdump\-rtl\-regclass\fR" 4
+.IX Item "-fdump-rtl-regclass"
+.PD 0
+.IP "\fB\-fdump\-rtl\-subregs_of_mode_init\fR" 4
+.IX Item "-fdump-rtl-subregs_of_mode_init"
+.IP "\fB\-fdump\-rtl\-subregs_of_mode_finish\fR" 4
+.IX Item "-fdump-rtl-subregs_of_mode_finish"
+.IP "\fB\-fdump\-rtl\-dfinit\fR" 4
+.IX Item "-fdump-rtl-dfinit"
+.IP "\fB\-fdump\-rtl\-dfinish\fR" 4
+.IX Item "-fdump-rtl-dfinish"
+.PD
+These dumps are defined but always produce empty files.
+.IP "\fB\-da\fR" 4
+.IX Item "-da"
+.PD 0
+.IP "\fB\-fdump\-rtl\-all\fR" 4
+.IX Item "-fdump-rtl-all"
+.PD
+Produce all the dumps listed above.
+.IP "\fB\-dA\fR" 4
+.IX Item "-dA"
+Annotate the assembler output with miscellaneous debugging information.
+.IP "\fB\-dD\fR" 4
+.IX Item "-dD"
+Dump all macro definitions, at the end of preprocessing, in addition to
+normal output.
+.IP "\fB\-dH\fR" 4
+.IX Item "-dH"
+Produce a core dump whenever an error occurs.
+.IP "\fB\-dp\fR" 4
+.IX Item "-dp"
+Annotate the assembler output with a comment indicating which
+pattern and alternative was used.  The length of each instruction is
+also printed.
+.IP "\fB\-dP\fR" 4
+.IX Item "-dP"
+Dump the \s-1RTL\s0 in the assembler output as a comment before each instruction.
+Also turns on \fB\-dp\fR annotation.
+.IP "\fB\-dv\fR" 4
+.IX Item "-dv"
+For each of the other indicated dump files (\fB\-fdump\-rtl\-\fR\fIpass\fR),
+dump a representation of the control flow graph suitable for viewing with \s-1VCG\s0
+to \fI\fIfile\fI.\fIpass\fI.vcg\fR.
+.IP "\fB\-dx\fR" 4
+.IX Item "-dx"
+Just generate \s-1RTL\s0 for a function instead of compiling it.  Usually used
+with \fB\-fdump\-rtl\-expand\fR.
+.RE
+.RS 4
+.RE
+.IP "\fB\-fdump\-noaddr\fR" 4
+.IX Item "-fdump-noaddr"
+When doing debugging dumps, suppress address output.  This makes it more
+feasible to use diff on debugging dumps for compiler invocations with
+different compiler binaries and/or different
+text / bss / data / heap / stack / dso start locations.
+.IP "\fB\-fdump\-unnumbered\fR" 4
+.IX Item "-fdump-unnumbered"
+When doing debugging dumps, suppress instruction numbers and address output.
+This makes it more feasible to use diff on debugging dumps for compiler
+invocations with different options, in particular with and without
+\&\fB\-g\fR.
+.IP "\fB\-fdump\-unnumbered\-links\fR" 4
+.IX Item "-fdump-unnumbered-links"
+When doing debugging dumps (see \fB\-d\fR option above), suppress
+instruction numbers for the links to the previous and next instructions
+in a sequence.
+.IP "\fB\-fdump\-translation\-unit\fR (\*(C+ only)" 4
+.IX Item "-fdump-translation-unit ( only)"
+.PD 0
+.IP "\fB\-fdump\-translation\-unit\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
+.IX Item "-fdump-translation-unit-options ( only)"
+.PD
+Dump a representation of the tree structure for the entire translation
+unit to a file.  The file name is made by appending \fI.tu\fR to the
+source file name, and the file is created in the same directory as the
+output file.  If the \fB\-\fR\fIoptions\fR form is used, \fIoptions\fR
+controls the details of the dump as described for the
+\&\fB\-fdump\-tree\fR options.
+.IP "\fB\-fdump\-class\-hierarchy\fR (\*(C+ only)" 4
+.IX Item "-fdump-class-hierarchy ( only)"
+.PD 0
+.IP "\fB\-fdump\-class\-hierarchy\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
+.IX Item "-fdump-class-hierarchy-options ( only)"
+.PD
+Dump a representation of each class's hierarchy and virtual function
+table layout to a file.  The file name is made by appending
+\&\fI.class\fR to the source file name, and the file is created in the
+same directory as the output file.  If the \fB\-\fR\fIoptions\fR form
+is used, \fIoptions\fR controls the details of the dump as described
+for the \fB\-fdump\-tree\fR options.
+.IP "\fB\-fdump\-ipa\-\fR\fIswitch\fR" 4
+.IX Item "-fdump-ipa-switch"
+Control the dumping at various stages of inter-procedural analysis
+language tree to a file.  The file name is generated by appending a
+switch specific suffix to the source file name, and the file is created
+in the same directory as the output file.  The following dumps are
+possible:
+.RS 4
+.IP "\fBall\fR" 4
+.IX Item "all"
+Enables all inter-procedural analysis dumps.
+.IP "\fBcgraph\fR" 4
+.IX Item "cgraph"
+Dumps information about call-graph optimization, unused function removal,
+and inlining decisions.
+.IP "\fBinline\fR" 4
+.IX Item "inline"
+Dump after function inlining.
+.RE
+.RS 4
+.RE
+.IP "\fB\-fdump\-statistics\-\fR\fIoption\fR" 4
+.IX Item "-fdump-statistics-option"
+Enable and control dumping of pass statistics in a separate file.  The
+file name is generated by appending a suffix ending in
+\&\fB.statistics\fR to the source file name, and the file is created in
+the same directory as the output file.  If the \fB\-\fR\fIoption\fR
+form is used, \fB\-stats\fR will cause counters to be summed over the
+whole compilation unit while \fB\-details\fR will dump every event as
+the passes generate them.  The default with no option is to sum
+counters for each function compiled.
+.IP "\fB\-fdump\-tree\-\fR\fIswitch\fR" 4
+.IX Item "-fdump-tree-switch"
+.PD 0
+.IP "\fB\-fdump\-tree\-\fR\fIswitch\fR\fB\-\fR\fIoptions\fR" 4
+.IX Item "-fdump-tree-switch-options"
+.PD
+Control the dumping at various stages of processing the intermediate
+language tree to a file.  The file name is generated by appending a
+switch specific suffix to the source file name, and the file is
+created in the same directory as the output file.  If the
+\&\fB\-\fR\fIoptions\fR form is used, \fIoptions\fR is a list of
+\&\fB\-\fR separated options that control the details of the dump.  Not
+all options are applicable to all dumps, those which are not
+meaningful will be ignored.  The following options are available
+.RS 4
+.IP "\fBaddress\fR" 4
+.IX Item "address"
+Print the address of each node.  Usually this is not meaningful as it
+changes according to the environment and source file.  Its primary use
+is for tying up a dump file with a debug environment.
+.IP "\fBasmname\fR" 4
+.IX Item "asmname"
+If \f(CW\*(C`DECL_ASSEMBLER_NAME\*(C'\fR has been set for a given decl, use that
+in the dump instead of \f(CW\*(C`DECL_NAME\*(C'\fR.  Its primary use is ease of
+use working backward from mangled names in the assembly file.
+.IP "\fBslim\fR" 4
+.IX Item "slim"
+Inhibit dumping of members of a scope or body of a function merely
+because that scope has been reached.  Only dump such items when they
+are directly reachable by some other path.  When dumping pretty-printed
+trees, this option inhibits dumping the bodies of control structures.
+.IP "\fBraw\fR" 4
+.IX Item "raw"
+Print a raw representation of the tree.  By default, trees are
+pretty-printed into a C\-like representation.
+.IP "\fBdetails\fR" 4
+.IX Item "details"
+Enable more detailed dumps (not honored by every dump option).
+.IP "\fBstats\fR" 4
+.IX Item "stats"
+Enable dumping various statistics about the pass (not honored by every dump
+option).
+.IP "\fBblocks\fR" 4
+.IX Item "blocks"
+Enable showing basic block boundaries (disabled in raw dumps).
+.IP "\fBvops\fR" 4
+.IX Item "vops"
+Enable showing virtual operands for every statement.
+.IP "\fBlineno\fR" 4
+.IX Item "lineno"
+Enable showing line numbers for statements.
+.IP "\fBuid\fR" 4
+.IX Item "uid"
+Enable showing the unique \s-1ID\s0 (\f(CW\*(C`DECL_UID\*(C'\fR) for each variable.
+.IP "\fBverbose\fR" 4
+.IX Item "verbose"
+Enable showing the tree dump for each statement.
+.IP "\fBeh\fR" 4
+.IX Item "eh"
+Enable showing the \s-1EH\s0 region number holding each statement.
+.IP "\fBall\fR" 4
+.IX Item "all"
+Turn on all options, except \fBraw\fR, \fBslim\fR, \fBverbose\fR
+and \fBlineno\fR.
+.RE
+.RS 4
+.Sp
+The following tree dumps are possible:
+.IP "\fBoriginal\fR" 4
+.IX Item "original"
+Dump before any tree based optimization, to \fI\fIfile\fI.original\fR.
+.IP "\fBoptimized\fR" 4
+.IX Item "optimized"
+Dump after all tree based optimization, to \fI\fIfile\fI.optimized\fR.
+.IP "\fBgimple\fR" 4
+.IX Item "gimple"
+Dump each function before and after the gimplification pass to a file.  The
+file name is made by appending \fI.gimple\fR to the source file name.
+.IP "\fBcfg\fR" 4
+.IX Item "cfg"
+Dump the control flow graph of each function to a file.  The file name is
+made by appending \fI.cfg\fR to the source file name.
+.IP "\fBvcg\fR" 4
+.IX Item "vcg"
+Dump the control flow graph of each function to a file in \s-1VCG\s0 format.  The
+file name is made by appending \fI.vcg\fR to the source file name.  Note
+that if the file contains more than one function, the generated file cannot
+be used directly by \s-1VCG\s0.  You will need to cut and paste each function's
+graph into its own separate file first.
+.IP "\fBch\fR" 4
+.IX Item "ch"
+Dump each function after copying loop headers.  The file name is made by
+appending \fI.ch\fR to the source file name.
+.IP "\fBssa\fR" 4
+.IX Item "ssa"
+Dump \s-1SSA\s0 related information to a file.  The file name is made by appending
+\&\fI.ssa\fR to the source file name.
+.IP "\fBalias\fR" 4
+.IX Item "alias"
+Dump aliasing information for each function.  The file name is made by
+appending \fI.alias\fR to the source file name.
+.IP "\fBccp\fR" 4
+.IX Item "ccp"
+Dump each function after \s-1CCP\s0.  The file name is made by appending
+\&\fI.ccp\fR to the source file name.
+.IP "\fBstoreccp\fR" 4
+.IX Item "storeccp"
+Dump each function after STORE-CCP.  The file name is made by appending
+\&\fI.storeccp\fR to the source file name.
+.IP "\fBpre\fR" 4
+.IX Item "pre"
+Dump trees after partial redundancy elimination.  The file name is made
+by appending \fI.pre\fR to the source file name.
+.IP "\fBfre\fR" 4
+.IX Item "fre"
+Dump trees after full redundancy elimination.  The file name is made
+by appending \fI.fre\fR to the source file name.
+.IP "\fBcopyprop\fR" 4
+.IX Item "copyprop"
+Dump trees after copy propagation.  The file name is made
+by appending \fI.copyprop\fR to the source file name.
+.IP "\fBstore_copyprop\fR" 4
+.IX Item "store_copyprop"
+Dump trees after store copy-propagation.  The file name is made
+by appending \fI.store_copyprop\fR to the source file name.
+.IP "\fBdce\fR" 4
+.IX Item "dce"
+Dump each function after dead code elimination.  The file name is made by
+appending \fI.dce\fR to the source file name.
+.IP "\fBmudflap\fR" 4
+.IX Item "mudflap"
+Dump each function after adding mudflap instrumentation.  The file name is
+made by appending \fI.mudflap\fR to the source file name.
+.IP "\fBsra\fR" 4
+.IX Item "sra"
+Dump each function after performing scalar replacement of aggregates.  The
+file name is made by appending \fI.sra\fR to the source file name.
+.IP "\fBsink\fR" 4
+.IX Item "sink"
+Dump each function after performing code sinking.  The file name is made
+by appending \fI.sink\fR to the source file name.
+.IP "\fBdom\fR" 4
+.IX Item "dom"
+Dump each function after applying dominator tree optimizations.  The file
+name is made by appending \fI.dom\fR to the source file name.
+.IP "\fBdse\fR" 4
+.IX Item "dse"
+Dump each function after applying dead store elimination.  The file
+name is made by appending \fI.dse\fR to the source file name.
+.IP "\fBphiopt\fR" 4
+.IX Item "phiopt"
+Dump each function after optimizing \s-1PHI\s0 nodes into straightline code.  The file
+name is made by appending \fI.phiopt\fR to the source file name.
+.IP "\fBforwprop\fR" 4
+.IX Item "forwprop"
+Dump each function after forward propagating single use variables.  The file
+name is made by appending \fI.forwprop\fR to the source file name.
+.IP "\fBcopyrename\fR" 4
+.IX Item "copyrename"
+Dump each function after applying the copy rename optimization.  The file
+name is made by appending \fI.copyrename\fR to the source file name.
+.IP "\fBnrv\fR" 4
+.IX Item "nrv"
+Dump each function after applying the named return value optimization on
+generic trees.  The file name is made by appending \fI.nrv\fR to the source
+file name.
+.IP "\fBvect\fR" 4
+.IX Item "vect"
+Dump each function after applying vectorization of loops.  The file name is
+made by appending \fI.vect\fR to the source file name.
+.IP "\fBslp\fR" 4
+.IX Item "slp"
+Dump each function after applying vectorization of basic blocks.  The file name
+is made by appending \fI.slp\fR to the source file name.
+.IP "\fBvrp\fR" 4
+.IX Item "vrp"
+Dump each function after Value Range Propagation (\s-1VRP\s0).  The file name
+is made by appending \fI.vrp\fR to the source file name.
+.IP "\fBall\fR" 4
+.IX Item "all"
+Enable all the available tree dumps with the flags provided in this option.
+.RE
+.RS 4
+.RE
+.IP "\fB\-ftree\-vectorizer\-verbose=\fR\fIn\fR" 4
+.IX Item "-ftree-vectorizer-verbose=n"
+This option controls the amount of debugging output the vectorizer prints.
+This information is written to standard error, unless
+\&\fB\-fdump\-tree\-all\fR or \fB\-fdump\-tree\-vect\fR is specified,
+in which case it is output to the usual dump listing file, \fI.vect\fR.
+For \fIn\fR=0 no diagnostic information is reported.
+If \fIn\fR=1 the vectorizer reports each loop that got vectorized,
+and the total number of loops that got vectorized.
+If \fIn\fR=2 the vectorizer also reports non-vectorized loops that passed
+the first analysis phase (vect_analyze_loop_form) \- i.e. countable,
+inner-most, single-bb, single\-entry/exit loops.  This is the same verbosity
+level that \fB\-fdump\-tree\-vect\-stats\fR uses.
+Higher verbosity levels mean either more information dumped for each
+reported loop, or same amount of information reported for more loops:
+if \fIn\fR=3, vectorizer cost model information is reported.
+If \fIn\fR=4, alignment related information is added to the reports.
+If \fIn\fR=5, data-references related information (e.g. memory dependences,
+memory access-patterns) is added to the reports.
+If \fIn\fR=6, the vectorizer reports also non-vectorized inner-most loops
+that did not pass the first analysis phase (i.e., may not be countable, or
+may have complicated control-flow).
+If \fIn\fR=7, the vectorizer reports also non-vectorized nested loops.
+If \fIn\fR=8, \s-1SLP\s0 related information is added to the reports.
+For \fIn\fR=9, all the information the vectorizer generates during its
+analysis and transformation is reported.  This is the same verbosity level
+that \fB\-fdump\-tree\-vect\-details\fR uses.
+.IP "\fB\-frandom\-seed=\fR\fIstring\fR" 4
+.IX Item "-frandom-seed=string"
+This option provides a seed that \s-1GCC\s0 uses when it would otherwise use
+random numbers.  It is used to generate certain symbol names
+that have to be different in every compiled file.  It is also used to
+place unique stamps in coverage data files and the object files that
+produce them.  You can use the \fB\-frandom\-seed\fR option to produce
+reproducibly identical object files.
+.Sp
+The \fIstring\fR should be different for every file you compile.
+.IP "\fB\-fsched\-verbose=\fR\fIn\fR" 4
+.IX Item "-fsched-verbose=n"
+On targets that use instruction scheduling, this option controls the
+amount of debugging output the scheduler prints.  This information is
+written to standard error, unless \fB\-fdump\-rtl\-sched1\fR or
+\&\fB\-fdump\-rtl\-sched2\fR is specified, in which case it is output
+to the usual dump listing file, \fI.sched1\fR or \fI.sched2\fR
+respectively.  However for \fIn\fR greater than nine, the output is
+always printed to standard error.
+.Sp
+For \fIn\fR greater than zero, \fB\-fsched\-verbose\fR outputs the
+same information as \fB\-fdump\-rtl\-sched1\fR and \fB\-fdump\-rtl\-sched2\fR.
+For \fIn\fR greater than one, it also output basic block probabilities,
+detailed ready list information and unit/insn info.  For \fIn\fR greater
+than two, it includes \s-1RTL\s0 at abort point, control-flow and regions info.
+And for \fIn\fR over four, \fB\-fsched\-verbose\fR also includes
+dependence info.
+.IP "\fB\-save\-temps\fR" 4
+.IX Item "-save-temps"
+.PD 0
+.IP "\fB\-save\-temps=cwd\fR" 4
+.IX Item "-save-temps=cwd"
+.PD
+Store the usual \*(L"temporary\*(R" intermediate files permanently; place them
+in the current directory and name them based on the source file.  Thus,
+compiling \fIfoo.c\fR with \fB\-c \-save\-temps\fR would produce files
+\&\fIfoo.i\fR and \fIfoo.s\fR, as well as \fIfoo.o\fR.  This creates a
+preprocessed \fIfoo.i\fR output file even though the compiler now
+normally uses an integrated preprocessor.
+.Sp
+When used in combination with the \fB\-x\fR command line option,
+\&\fB\-save\-temps\fR is sensible enough to avoid over writing an
+input source file with the same extension as an intermediate file.
+The corresponding intermediate file may be obtained by renaming the
+source file before using \fB\-save\-temps\fR.
+.Sp
+If you invoke \s-1GCC\s0 in parallel, compiling several different source
+files that share a common base name in different subdirectories or the
+same source file compiled for multiple output destinations, it is
+likely that the different parallel compilers will interfere with each
+other, and overwrite the temporary files.  For instance:
+.Sp
+.Vb 2
+\&        gcc \-save\-temps \-o outdir1/foo.o indir1/foo.c&
+\&        gcc \-save\-temps \-o outdir2/foo.o indir2/foo.c&
+.Ve
+.Sp
+may result in \fIfoo.i\fR and \fIfoo.o\fR being written to
+simultaneously by both compilers.
+.IP "\fB\-save\-temps=obj\fR" 4
+.IX Item "-save-temps=obj"
+Store the usual \*(L"temporary\*(R" intermediate files permanently.  If the
+\&\fB\-o\fR option is used, the temporary files are based on the
+object file.  If the \fB\-o\fR option is not used, the
+\&\fB\-save\-temps=obj\fR switch behaves like \fB\-save\-temps\fR.
+.Sp
+For example:
+.Sp
+.Vb 3
+\&        gcc \-save\-temps=obj \-c foo.c
+\&        gcc \-save\-temps=obj \-c bar.c \-o dir/xbar.o
+\&        gcc \-save\-temps=obj foobar.c \-o dir2/yfoobar
+.Ve
+.Sp
+would create \fIfoo.i\fR, \fIfoo.s\fR, \fIdir/xbar.i\fR,
+\&\fIdir/xbar.s\fR, \fIdir2/yfoobar.i\fR, \fIdir2/yfoobar.s\fR, and
+\&\fIdir2/yfoobar.o\fR.
+.IP "\fB\-time\fR[\fB=\fR\fIfile\fR]" 4
+.IX Item "-time[=file]"
+Report the \s-1CPU\s0 time taken by each subprocess in the compilation
+sequence.  For C source files, this is the compiler proper and assembler
+(plus the linker if linking is done).
+.Sp
+Without the specification of an output file, the output looks like this:
+.Sp
+.Vb 2
+\&        # cc1 0.12 0.01
+\&        # as 0.00 0.01
+.Ve
+.Sp
+The first number on each line is the \*(L"user time\*(R", that is time spent
+executing the program itself.  The second number is \*(L"system time\*(R",
+time spent executing operating system routines on behalf of the program.
+Both numbers are in seconds.
+.Sp
+With the specification of an output file, the output is appended to the
+named file, and it looks like this:
+.Sp
+.Vb 2
+\&        0.12 0.01 cc1 <options>
+\&        0.00 0.01 as <options>
+.Ve
+.Sp
+The \*(L"user time\*(R" and the \*(L"system time\*(R" are moved before the program
+name, and the options passed to the program are displayed, so that one
+can later tell what file was being compiled, and with which options.
+.IP "\fB\-fvar\-tracking\fR" 4
+.IX Item "-fvar-tracking"
+Run variable tracking pass.  It computes where variables are stored at each
+position in code.  Better debugging information is then generated
+(if the debugging information format supports this information).
+.Sp
+It is enabled by default when compiling with optimization (\fB\-Os\fR,
+\&\fB\-O\fR, \fB\-O2\fR, ...), debugging information (\fB\-g\fR) and
+the debug info format supports it.
+.IP "\fB\-fvar\-tracking\-assignments\fR" 4
+.IX Item "-fvar-tracking-assignments"
+Annotate assignments to user variables early in the compilation and
+attempt to carry the annotations over throughout the compilation all the
+way to the end, in an attempt to improve debug information while
+optimizing.  Use of \fB\-gdwarf\-4\fR is recommended along with it.
+.Sp
+It can be enabled even if var-tracking is disabled, in which case
+annotations will be created and maintained, but discarded at the end.
+.IP "\fB\-fvar\-tracking\-assignments\-toggle\fR" 4
+.IX Item "-fvar-tracking-assignments-toggle"
+Toggle \fB\-fvar\-tracking\-assignments\fR, in the same way that
+\&\fB\-gtoggle\fR toggles \fB\-g\fR.
+.IP "\fB\-print\-file\-name=\fR\fIlibrary\fR" 4
+.IX Item "-print-file-name=library"
+Print the full absolute name of the library file \fIlibrary\fR that
+would be used when linking\-\-\-and don't do anything else.  With this
+option, \s-1GCC\s0 does not compile or link anything; it just prints the
+file name.
+.IP "\fB\-print\-multi\-directory\fR" 4
+.IX Item "-print-multi-directory"
+Print the directory name corresponding to the multilib selected by any
+other switches present in the command line.  This directory is supposed
+to exist in \fB\s-1GCC_EXEC_PREFIX\s0\fR.
+.IP "\fB\-print\-multi\-lib\fR" 4
+.IX Item "-print-multi-lib"
+Print the mapping from multilib directory names to compiler switches
+that enable them.  The directory name is separated from the switches by
+\&\fB;\fR, and each switch starts with an \fB@\fR instead of the
+\&\fB\-\fR, without spaces between multiple switches.  This is supposed to
+ease shell-processing.
+.IP "\fB\-print\-multi\-os\-directory\fR" 4
+.IX Item "-print-multi-os-directory"
+Print the path to \s-1OS\s0 libraries for the selected
+multilib, relative to some \fIlib\fR subdirectory.  If \s-1OS\s0 libraries are
+present in the \fIlib\fR subdirectory and no multilibs are used, this is
+usually just \fI.\fR, if \s-1OS\s0 libraries are present in \fIlib\fIsuffix\fI\fR
+sibling directories this prints e.g. \fI../lib64\fR, \fI../lib\fR or
+\&\fI../lib32\fR, or if \s-1OS\s0 libraries are present in \fIlib/\fIsubdir\fI\fR
+subdirectories it prints e.g. \fIamd64\fR, \fIsparcv9\fR or \fIev6\fR.
+.IP "\fB\-print\-multiarch\fR" 4
+.IX Item "-print-multiarch"
+Print the path to \s-1OS\s0 libraries for the selected multiarch,
+relative to some \fIlib\fR subdirectory.
+.IP "\fB\-print\-prog\-name=\fR\fIprogram\fR" 4
+.IX Item "-print-prog-name=program"
+Like \fB\-print\-file\-name\fR, but searches for a program such as \fBcpp\fR.
+.IP "\fB\-print\-libgcc\-file\-name\fR" 4
+.IX Item "-print-libgcc-file-name"
+Same as \fB\-print\-file\-name=libgcc.a\fR.
+.Sp
+This is useful when you use \fB\-nostdlib\fR or \fB\-nodefaultlibs\fR
+but you do want to link with \fIlibgcc.a\fR.  You can do
+.Sp
+.Vb 1
+\&        gcc \-nostdlib <files>... \`gcc \-print\-libgcc\-file\-name\`
+.Ve
+.IP "\fB\-print\-search\-dirs\fR" 4
+.IX Item "-print-search-dirs"
+Print the name of the configured installation directory and a list of
+program and library directories \fBgcc\fR will search\-\-\-and don't do anything else.
+.Sp
+This is useful when \fBgcc\fR prints the error message
+\&\fBinstallation problem, cannot exec cpp0: No such file or directory\fR.
+To resolve this you either need to put \fIcpp0\fR and the other compiler
+components where \fBgcc\fR expects to find them, or you can set the environment
+variable \fB\s-1GCC_EXEC_PREFIX\s0\fR to the directory where you installed them.
+Don't forget the trailing \fB/\fR.
+.IP "\fB\-print\-sysroot\fR" 4
+.IX Item "-print-sysroot"
+Print the target sysroot directory that will be used during
+compilation.  This is the target sysroot specified either at configure
+time or using the \fB\-\-sysroot\fR option, possibly with an extra
+suffix that depends on compilation options.  If no target sysroot is
+specified, the option prints nothing.
+.IP "\fB\-print\-sysroot\-headers\-suffix\fR" 4
+.IX Item "-print-sysroot-headers-suffix"
+Print the suffix added to the target sysroot when searching for
+headers, or give an error if the compiler is not configured with such
+a suffix\-\-\-and don't do anything else.
+.IP "\fB\-dumpmachine\fR" 4
+.IX Item "-dumpmachine"
+Print the compiler's target machine (for example,
+\&\fBi686\-pc\-linux\-gnu\fR)\-\-\-and don't do anything else.
+.IP "\fB\-dumpversion\fR" 4
+.IX Item "-dumpversion"
+Print the compiler version (for example, \fB3.0\fR)\-\-\-and don't do
+anything else.
+.IP "\fB\-dumpspecs\fR" 4
+.IX Item "-dumpspecs"
+Print the compiler's built-in specs\-\-\-and don't do anything else.  (This
+is used when \s-1GCC\s0 itself is being built.)
+.IP "\fB\-feliminate\-unused\-debug\-types\fR" 4
+.IX Item "-feliminate-unused-debug-types"
+Normally, when producing \s-1DWARF2\s0 output, \s-1GCC\s0 will emit debugging
+information for all types declared in a compilation
+unit, regardless of whether or not they are actually used
+in that compilation unit.  Sometimes this is useful, such as
+if, in the debugger, you want to cast a value to a type that is
+not actually used in your program (but is declared).  More often,
+however, this results in a significant amount of wasted space.
+With this option, \s-1GCC\s0 will avoid producing debug symbol output
+for types that are nowhere used in the source file being compiled.
+.SS "Options That Control Optimization"
+.IX Subsection "Options That Control Optimization"
+These options control various sorts of optimizations.
+.PP
+Without any optimization option, the compiler's goal is to reduce the
+cost of compilation and to make debugging produce the expected
+results.  Statements are independent: if you stop the program with a
+breakpoint between statements, you can then assign a new value to any
+variable or change the program counter to any other statement in the
+function and get exactly the results you would expect from the source
+code.
+.PP
+Turning on optimization flags makes the compiler attempt to improve
+the performance and/or code size at the expense of compilation time
+and possibly the ability to debug the program.
+.PP
+The compiler performs optimization based on the knowledge it has of the
+program.  Compiling multiple files at once to a single output file mode allows
+the compiler to use information gained from all of the files when compiling
+each of them.
+.PP
+Not all optimizations are controlled directly by a flag.  Only
+optimizations that have a flag are listed in this section.
+.PP
+Most optimizations are only enabled if an \fB\-O\fR level is set on
+the command line.  Otherwise they are disabled, even if individual             
+optimization flags are specified.
+.PP
+Depending on the target and how \s-1GCC\s0 was configured, a slightly different
+set of optimizations may be enabled at each \fB\-O\fR level than
+those listed here.  You can invoke \s-1GCC\s0 with \fB\-Q \-\-help=optimizers\fR
+to find out the exact set of optimizations that are enabled at each level.
+.IP "\fB\-O\fR" 4
+.IX Item "-O"
+.PD 0
+.IP "\fB\-O1\fR" 4
+.IX Item "-O1"
+.PD
+Optimize.  Optimizing compilation takes somewhat more time, and a lot
+more memory for a large function.
+.Sp
+With \fB\-O\fR, the compiler tries to reduce code size and execution
+time, without performing any optimizations that take a great deal of
+compilation time.
+.Sp
+\&\fB\-O\fR turns on the following optimization flags:
+.Sp
+\&\fB\-fauto\-inc\-dec 
+\&\-fcompare\-elim 
+\&\-fcprop\-registers 
+\&\-fdce 
+\&\-fdefer\-pop 
+\&\-fdelayed\-branch 
+\&\-fdse 
+\&\-fguess\-branch\-probability 
+\&\-fif\-conversion2 
+\&\-fif\-conversion 
+\&\-fipa\-pure\-const 
+\&\-fipa\-profile 
+\&\-fipa\-reference 
+\&\-fmerge\-constants
+\&\-fsplit\-wide\-types 
+\&\-ftree\-bit\-ccp 
+\&\-ftree\-builtin\-call\-dce 
+\&\-ftree\-ccp 
+\&\-ftree\-ch 
+\&\-ftree\-copyrename 
+\&\-ftree\-dce 
+\&\-ftree\-dominator\-opts 
+\&\-ftree\-dse 
+\&\-ftree\-forwprop 
+\&\-ftree\-fre 
+\&\-ftree\-phiprop 
+\&\-ftree\-sra 
+\&\-ftree\-pta 
+\&\-ftree\-ter 
+\&\-funit\-at\-a\-time\fR
+.Sp
+\&\fB\-O\fR also turns on \fB\-fomit\-frame\-pointer\fR on machines
+where doing so does not interfere with debugging.
+.IP "\fB\-O2\fR" 4
+.IX Item "-O2"
+Optimize even more.  \s-1GCC\s0 performs nearly all supported optimizations
+that do not involve a space-speed tradeoff.
+As compared to \fB\-O\fR, this option increases both compilation time
+and the performance of the generated code.
+.Sp
+\&\fB\-O2\fR turns on all optimization flags specified by \fB\-O\fR.  It
+also turns on the following optimization flags:
+\&\fB\-fthread\-jumps 
+\&\-falign\-functions  \-falign\-jumps 
+\&\-falign\-loops  \-falign\-labels 
+\&\-fcaller\-saves 
+\&\-fcrossjumping 
+\&\-fcse\-follow\-jumps  \-fcse\-skip\-blocks 
+\&\-fdelete\-null\-pointer\-checks 
+\&\-fdevirtualize 
+\&\-fexpensive\-optimizations 
+\&\-fgcse  \-fgcse\-lm  
+\&\-finline\-small\-functions 
+\&\-findirect\-inlining 
+\&\-fipa\-sra 
+\&\-foptimize\-sibling\-calls 
+\&\-fpartial\-inlining 
+\&\-fpeephole2 
+\&\-fregmove 
+\&\-freorder\-blocks  \-freorder\-functions 
+\&\-frerun\-cse\-after\-loop  
+\&\-fsched\-interblock  \-fsched\-spec 
+\&\-fschedule\-insns  \-fschedule\-insns2 
+\&\-fstrict\-aliasing \-fstrict\-overflow 
+\&\-ftree\-switch\-conversion 
+\&\-ftree\-pre 
+\&\-ftree\-vrp\fR
+.Sp
+Please note the warning under \fB\-fgcse\fR about
+invoking \fB\-O2\fR on programs that use computed gotos.
+.IP "\fB\-O3\fR" 4
+.IX Item "-O3"
+Optimize yet more.  \fB\-O3\fR turns on all optimizations specified
+by \fB\-O2\fR and also turns on the \fB\-finline\-functions\fR,
+\&\fB\-funswitch\-loops\fR, \fB\-fpredictive\-commoning\fR,
+\&\fB\-fgcse\-after\-reload\fR, \fB\-ftree\-vectorize\fR and
+\&\fB\-fipa\-cp\-clone\fR options.
+.IP "\fB\-O0\fR" 4
+.IX Item "-O0"
+Reduce compilation time and make debugging produce the expected
+results.  This is the default.
+.IP "\fB\-Os\fR" 4
+.IX Item "-Os"
+Optimize for size.  \fB\-Os\fR enables all \fB\-O2\fR optimizations that
+do not typically increase code size.  It also performs further
+optimizations designed to reduce code size.
+.Sp
+\&\fB\-Os\fR disables the following optimization flags:
+\&\fB\-falign\-functions  \-falign\-jumps  \-falign\-loops 
+\&\-falign\-labels  \-freorder\-blocks  \-freorder\-blocks\-and\-partition 
+\&\-fprefetch\-loop\-arrays  \-ftree\-vect\-loop\-version\fR
+.IP "\fB\-Ofast\fR" 4
+.IX Item "-Ofast"
+Disregard strict standards compliance.  \fB\-Ofast\fR enables all
+\&\fB\-O3\fR optimizations.  It also enables optimizations that are not
+valid for all standard compliant programs.
+It turns on \fB\-ffast\-math\fR.
+.Sp
+If you use multiple \fB\-O\fR options, with or without level numbers,
+the last such option is the one that is effective.
+.PP
+Options of the form \fB\-f\fR\fIflag\fR specify machine-independent
+flags.  Most flags have both positive and negative forms; the negative
+form of \fB\-ffoo\fR would be \fB\-fno\-foo\fR.  In the table
+below, only one of the forms is listed\-\-\-the one you typically will
+use.  You can figure out the other form by either removing \fBno\-\fR
+or adding it.
+.PP
+The following options control specific optimizations.  They are either
+activated by \fB\-O\fR options or are related to ones that are.  You
+can use the following flags in the rare cases when \*(L"fine-tuning\*(R" of
+optimizations to be performed is desired.
+.IP "\fB\-fno\-default\-inline\fR" 4
+.IX Item "-fno-default-inline"
+Do not make member functions inline by default merely because they are
+defined inside the class scope (\*(C+ only).  Otherwise, when you specify
+\&\fB\-O\fR, member functions defined inside class scope are compiled
+inline by default; i.e., you don't need to add \fBinline\fR in front of
+the member function name.
+.IP "\fB\-fno\-defer\-pop\fR" 4
+.IX Item "-fno-defer-pop"
+Always pop the arguments to each function call as soon as that function
+returns.  For machines which must pop arguments after a function call,
+the compiler normally lets arguments accumulate on the stack for several
+function calls and pops them all at once.
+.Sp
+Disabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fforward\-propagate\fR" 4
+.IX Item "-fforward-propagate"
+Perform a forward propagation pass on \s-1RTL\s0.  The pass tries to combine two
+instructions and checks if the result can be simplified.  If loop unrolling
+is active, two passes are performed and the second is scheduled after
+loop unrolling.
+.Sp
+This option is enabled by default at optimization levels \fB\-O\fR,
+\&\fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-ffp\-contract=\fR\fIstyle\fR" 4
+.IX Item "-ffp-contract=style"
+\&\fB\-ffp\-contract=off\fR disables floating-point expression contraction.
+\&\fB\-ffp\-contract=fast\fR enables floating-point expression contraction
+such as forming of fused multiply-add operations if the target has
+native support for them.
+\&\fB\-ffp\-contract=on\fR enables floating-point expression contraction
+if allowed by the language standard.  This is currently not implemented
+and treated equal to \fB\-ffp\-contract=off\fR.
+.Sp
+The default is \fB\-ffp\-contract=fast\fR.
+.IP "\fB\-fomit\-frame\-pointer\fR" 4
+.IX Item "-fomit-frame-pointer"
+Don't keep the frame pointer in a register for functions that
+don't need one.  This avoids the instructions to save, set up and
+restore frame pointers; it also makes an extra register available
+in many functions.  \fBIt also makes debugging impossible on
+some machines.\fR
+.Sp
+On some machines, such as the \s-1VAX\s0, this flag has no effect, because
+the standard calling sequence automatically handles the frame pointer
+and nothing is saved by pretending it doesn't exist.  The
+machine-description macro \f(CW\*(C`FRAME_POINTER_REQUIRED\*(C'\fR controls
+whether a target machine supports this flag.
+.Sp
+Starting with \s-1GCC\s0 version 4.6, the default setting (when not optimizing for
+size) for 32\-bit Linux x86 and 32\-bit Darwin x86 targets has been changed to
+\&\fB\-fomit\-frame\-pointer\fR.  The default can be reverted to
+\&\fB\-fno\-omit\-frame\-pointer\fR by configuring \s-1GCC\s0 with the
+\&\fB\-\-enable\-frame\-pointer\fR configure option.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-foptimize\-sibling\-calls\fR" 4
+.IX Item "-foptimize-sibling-calls"
+Optimize sibling and tail recursive calls.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fno\-inline\fR" 4
+.IX Item "-fno-inline"
+Don't pay attention to the \f(CW\*(C`inline\*(C'\fR keyword.  Normally this option
+is used to keep the compiler from expanding any functions inline.
+Note that if you are not optimizing, no functions can be expanded inline.
+.IP "\fB\-finline\-small\-functions\fR" 4
+.IX Item "-finline-small-functions"
+Integrate functions into their callers when their body is smaller than expected
+function call code (so overall size of program gets smaller).  The compiler
+heuristically decides which functions are simple enough to be worth integrating
+in this way.
+.Sp
+Enabled at level \fB\-O2\fR.
+.IP "\fB\-findirect\-inlining\fR" 4
+.IX Item "-findirect-inlining"
+Inline also indirect calls that are discovered to be known at compile
+time thanks to previous inlining.  This option has any effect only
+when inlining itself is turned on by the \fB\-finline\-functions\fR
+or \fB\-finline\-small\-functions\fR options.
+.Sp
+Enabled at level \fB\-O2\fR.
+.IP "\fB\-finline\-functions\fR" 4
+.IX Item "-finline-functions"
+Integrate all simple functions into their callers.  The compiler
+heuristically decides which functions are simple enough to be worth
+integrating in this way.
+.Sp
+If all calls to a given function are integrated, and the function is
+declared \f(CW\*(C`static\*(C'\fR, then the function is normally not output as
+assembler code in its own right.
+.Sp
+Enabled at level \fB\-O3\fR.
+.IP "\fB\-finline\-functions\-called\-once\fR" 4
+.IX Item "-finline-functions-called-once"
+Consider all \f(CW\*(C`static\*(C'\fR functions called once for inlining into their
+caller even if they are not marked \f(CW\*(C`inline\*(C'\fR.  If a call to a given
+function is integrated, then the function is not output as assembler code
+in its own right.
+.Sp
+Enabled at levels \fB\-O1\fR, \fB\-O2\fR, \fB\-O3\fR and \fB\-Os\fR.
+.IP "\fB\-fearly\-inlining\fR" 4
+.IX Item "-fearly-inlining"
+Inline functions marked by \f(CW\*(C`always_inline\*(C'\fR and functions whose body seems
+smaller than the function call overhead early before doing
+\&\fB\-fprofile\-generate\fR instrumentation and real inlining pass.  Doing so
+makes profiling significantly cheaper and usually inlining faster on programs
+having large chains of nested wrapper functions.
+.Sp
+Enabled by default.
+.IP "\fB\-fipa\-sra\fR" 4
+.IX Item "-fipa-sra"
+Perform interprocedural scalar replacement of aggregates, removal of
+unused parameters and replacement of parameters passed by reference
+by parameters passed by value.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR and \fB\-Os\fR.
+.IP "\fB\-finline\-limit=\fR\fIn\fR" 4
+.IX Item "-finline-limit=n"
+By default, \s-1GCC\s0 limits the size of functions that can be inlined.  This flag
+allows coarse control of this limit.  \fIn\fR is the size of functions that
+can be inlined in number of pseudo instructions.
+.Sp
+Inlining is actually controlled by a number of parameters, which may be
+specified individually by using \fB\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR.
+The \fB\-finline\-limit=\fR\fIn\fR option sets some of these parameters
+as follows:
+.RS 4
+.IP "\fBmax-inline-insns-single\fR" 4
+.IX Item "max-inline-insns-single"
+is set to \fIn\fR/2.
+.IP "\fBmax-inline-insns-auto\fR" 4
+.IX Item "max-inline-insns-auto"
+is set to \fIn\fR/2.
+.RE
+.RS 4
+.Sp
+See below for a documentation of the individual
+parameters controlling inlining and for the defaults of these parameters.
+.Sp
+\&\fINote:\fR there may be no value to \fB\-finline\-limit\fR that results
+in default behavior.
+.Sp
+\&\fINote:\fR pseudo instruction represents, in this particular context, an
+abstract measurement of function's size.  In no way does it represent a count
+of assembly instructions and as such its exact meaning might change from one
+release to an another.
+.RE
+.IP "\fB\-fno\-keep\-inline\-dllexport\fR" 4
+.IX Item "-fno-keep-inline-dllexport"
+This is a more fine-grained version of \fB\-fkeep\-inline\-functions\fR,
+which applies only to functions that are declared using the \f(CW\*(C`dllexport\*(C'\fR
+attribute or declspec
+.IP "\fB\-fkeep\-inline\-functions\fR" 4
+.IX Item "-fkeep-inline-functions"
+In C, emit \f(CW\*(C`static\*(C'\fR functions that are declared \f(CW\*(C`inline\*(C'\fR
+into the object file, even if the function has been inlined into all
+of its callers.  This switch does not affect functions using the
+\&\f(CW\*(C`extern inline\*(C'\fR extension in \s-1GNU\s0 C90.  In \*(C+, emit any and all
+inline functions into the object file.
+.IP "\fB\-fkeep\-static\-consts\fR" 4
+.IX Item "-fkeep-static-consts"
+Emit variables declared \f(CW\*(C`static const\*(C'\fR when optimization isn't turned
+on, even if the variables aren't referenced.
+.Sp
+\&\s-1GCC\s0 enables this option by default.  If you want to force the compiler to
+check if the variable was referenced, regardless of whether or not
+optimization is turned on, use the \fB\-fno\-keep\-static\-consts\fR option.
+.IP "\fB\-fmerge\-constants\fR" 4
+.IX Item "-fmerge-constants"
+Attempt to merge identical constants (string constants and floating point
+constants) across compilation units.
+.Sp
+This option is the default for optimized compilation if the assembler and
+linker support it.  Use \fB\-fno\-merge\-constants\fR to inhibit this
+behavior.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fmerge\-all\-constants\fR" 4
+.IX Item "-fmerge-all-constants"
+Attempt to merge identical constants and identical variables.
+.Sp
+This option implies \fB\-fmerge\-constants\fR.  In addition to
+\&\fB\-fmerge\-constants\fR this considers e.g. even constant initialized
+arrays or initialized constant variables with integral or floating point
+types.  Languages like C or \*(C+ require each variable, including multiple
+instances of the same variable in recursive calls, to have distinct locations,
+so using this option will result in non-conforming
+behavior.
+.IP "\fB\-fmodulo\-sched\fR" 4
+.IX Item "-fmodulo-sched"
+Perform swing modulo scheduling immediately before the first scheduling
+pass.  This pass looks at innermost loops and reorders their
+instructions by overlapping different iterations.
+.IP "\fB\-fmodulo\-sched\-allow\-regmoves\fR" 4
+.IX Item "-fmodulo-sched-allow-regmoves"
+Perform more aggressive \s-1SMS\s0 based modulo scheduling with register moves
+allowed.  By setting this flag certain anti-dependences edges will be
+deleted which will trigger the generation of reg-moves based on the
+life-range analysis.  This option is effective only with
+\&\fB\-fmodulo\-sched\fR enabled.
+.IP "\fB\-fno\-branch\-count\-reg\fR" 4
+.IX Item "-fno-branch-count-reg"
+Do not use \*(L"decrement and branch\*(R" instructions on a count register,
+but instead generate a sequence of instructions that decrement a
+register, compare it against zero, then branch based upon the result.
+This option is only meaningful on architectures that support such
+instructions, which include x86, PowerPC, \s-1IA\-64\s0 and S/390.
+.Sp
+The default is \fB\-fbranch\-count\-reg\fR.
+.IP "\fB\-fno\-function\-cse\fR" 4
+.IX Item "-fno-function-cse"
+Do not put function addresses in registers; make each instruction that
+calls a constant function contain the function's address explicitly.
+.Sp
+This option results in less efficient code, but some strange hacks
+that alter the assembler output may be confused by the optimizations
+performed when this option is not used.
+.Sp
+The default is \fB\-ffunction\-cse\fR
+.IP "\fB\-fno\-zero\-initialized\-in\-bss\fR" 4
+.IX Item "-fno-zero-initialized-in-bss"
+If the target supports a \s-1BSS\s0 section, \s-1GCC\s0 by default puts variables that
+are initialized to zero into \s-1BSS\s0.  This can save space in the resulting
+code.
+.Sp
+This option turns off this behavior because some programs explicitly
+rely on variables going to the data section.  E.g., so that the
+resulting executable can find the beginning of that section and/or make
+assumptions based on that.
+.Sp
+The default is \fB\-fzero\-initialized\-in\-bss\fR.
+.IP "\fB\-fmudflap \-fmudflapth \-fmudflapir\fR" 4
+.IX Item "-fmudflap -fmudflapth -fmudflapir"
+For front-ends that support it (C and \*(C+), instrument all risky
+pointer/array dereferencing operations, some standard library
+string/heap functions, and some other associated constructs with
+range/validity tests.  Modules so instrumented should be immune to
+buffer overflows, invalid heap use, and some other classes of C/\*(C+
+programming errors.  The instrumentation relies on a separate runtime
+library (\fIlibmudflap\fR), which will be linked into a program if
+\&\fB\-fmudflap\fR is given at link time.  Run-time behavior of the
+instrumented program is controlled by the \fB\s-1MUDFLAP_OPTIONS\s0\fR
+environment variable.  See \f(CW\*(C`env MUDFLAP_OPTIONS=\-help a.out\*(C'\fR
+for its options.
+.Sp
+Use \fB\-fmudflapth\fR instead of \fB\-fmudflap\fR to compile and to
+link if your program is multi-threaded.  Use \fB\-fmudflapir\fR, in
+addition to \fB\-fmudflap\fR or \fB\-fmudflapth\fR, if
+instrumentation should ignore pointer reads.  This produces less
+instrumentation (and therefore faster execution) and still provides
+some protection against outright memory corrupting writes, but allows
+erroneously read data to propagate within a program.
+.IP "\fB\-fthread\-jumps\fR" 4
+.IX Item "-fthread-jumps"
+Perform optimizations where we check to see if a jump branches to a
+location where another comparison subsumed by the first is found.  If
+so, the first branch is redirected to either the destination of the
+second branch or a point immediately following it, depending on whether
+the condition is known to be true or false.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fsplit\-wide\-types\fR" 4
+.IX Item "-fsplit-wide-types"
+When using a type that occupies multiple registers, such as \f(CW\*(C`long
+long\*(C'\fR on a 32\-bit system, split the registers apart and allocate them
+independently.  This normally generates better code for those types,
+but may make debugging more difficult.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR,
+\&\fB\-Os\fR.
+.IP "\fB\-fcse\-follow\-jumps\fR" 4
+.IX Item "-fcse-follow-jumps"
+In common subexpression elimination (\s-1CSE\s0), scan through jump instructions
+when the target of the jump is not reached by any other path.  For
+example, when \s-1CSE\s0 encounters an \f(CW\*(C`if\*(C'\fR statement with an
+\&\f(CW\*(C`else\*(C'\fR clause, \s-1CSE\s0 will follow the jump when the condition
+tested is false.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fcse\-skip\-blocks\fR" 4
+.IX Item "-fcse-skip-blocks"
+This is similar to \fB\-fcse\-follow\-jumps\fR, but causes \s-1CSE\s0 to
+follow jumps which conditionally skip over blocks.  When \s-1CSE\s0
+encounters a simple \f(CW\*(C`if\*(C'\fR statement with no else clause,
+\&\fB\-fcse\-skip\-blocks\fR causes \s-1CSE\s0 to follow the jump around the
+body of the \f(CW\*(C`if\*(C'\fR.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-frerun\-cse\-after\-loop\fR" 4
+.IX Item "-frerun-cse-after-loop"
+Re-run common subexpression elimination after loop optimizations has been
+performed.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fgcse\fR" 4
+.IX Item "-fgcse"
+Perform a global common subexpression elimination pass.
+This pass also performs global constant and copy propagation.
+.Sp
+\&\fINote:\fR When compiling a program using computed gotos, a \s-1GCC\s0
+extension, you may get better runtime performance if you disable
+the global common subexpression elimination pass by adding
+\&\fB\-fno\-gcse\fR to the command line.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fgcse\-lm\fR" 4
+.IX Item "-fgcse-lm"
+When \fB\-fgcse\-lm\fR is enabled, global common subexpression elimination will
+attempt to move loads which are only killed by stores into themselves.  This
+allows a loop containing a load/store sequence to be changed to a load outside
+the loop, and a copy/store within the loop.
+.Sp
+Enabled by default when gcse is enabled.
+.IP "\fB\-fgcse\-sm\fR" 4
+.IX Item "-fgcse-sm"
+When \fB\-fgcse\-sm\fR is enabled, a store motion pass is run after
+global common subexpression elimination.  This pass will attempt to move
+stores out of loops.  When used in conjunction with \fB\-fgcse\-lm\fR,
+loops containing a load/store sequence can be changed to a load before
+the loop and a store after the loop.
+.Sp
+Not enabled at any optimization level.
+.IP "\fB\-fgcse\-las\fR" 4
+.IX Item "-fgcse-las"
+When \fB\-fgcse\-las\fR is enabled, the global common subexpression
+elimination pass eliminates redundant loads that come after stores to the
+same memory location (both partial and full redundancies).
+.Sp
+Not enabled at any optimization level.
+.IP "\fB\-fgcse\-after\-reload\fR" 4
+.IX Item "-fgcse-after-reload"
+When \fB\-fgcse\-after\-reload\fR is enabled, a redundant load elimination
+pass is performed after reload.  The purpose of this pass is to cleanup
+redundant spilling.
+.IP "\fB\-funsafe\-loop\-optimizations\fR" 4
+.IX Item "-funsafe-loop-optimizations"
+If given, the loop optimizer will assume that loop indices do not
+overflow, and that the loops with nontrivial exit condition are not
+infinite.  This enables a wider range of loop optimizations even if
+the loop optimizer itself cannot prove that these assumptions are valid.
+Using \fB\-Wunsafe\-loop\-optimizations\fR, the compiler will warn you
+if it finds this kind of loop.
+.IP "\fB\-fcrossjumping\fR" 4
+.IX Item "-fcrossjumping"
+Perform cross-jumping transformation.  This transformation unifies equivalent code and save code size.  The
+resulting code may or may not perform better than without cross-jumping.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fauto\-inc\-dec\fR" 4
+.IX Item "-fauto-inc-dec"
+Combine increments or decrements of addresses with memory accesses.
+This pass is always skipped on architectures that do not have
+instructions to support this.  Enabled by default at \fB\-O\fR and
+higher on architectures that support this.
+.IP "\fB\-fdce\fR" 4
+.IX Item "-fdce"
+Perform dead code elimination (\s-1DCE\s0) on \s-1RTL\s0.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fdse\fR" 4
+.IX Item "-fdse"
+Perform dead store elimination (\s-1DSE\s0) on \s-1RTL\s0.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fif\-conversion\fR" 4
+.IX Item "-fif-conversion"
+Attempt to transform conditional jumps into branch-less equivalents.  This
+include use of conditional moves, min, max, set flags and abs instructions, and
+some tricks doable by standard arithmetics.  The use of conditional execution
+on chips where it is available is controlled by \f(CW\*(C`if\-conversion2\*(C'\fR.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fif\-conversion2\fR" 4
+.IX Item "-fif-conversion2"
+Use conditional execution (where available) to transform conditional jumps into
+branch-less equivalents.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fdelete\-null\-pointer\-checks\fR" 4
+.IX Item "-fdelete-null-pointer-checks"
+Assume that programs cannot safely dereference null pointers, and that
+no code or data element resides there.  This enables simple constant
+folding optimizations at all optimization levels.  In addition, other
+optimization passes in \s-1GCC\s0 use this flag to control global dataflow
+analyses that eliminate useless checks for null pointers; these assume
+that if a pointer is checked after it has already been dereferenced,
+it cannot be null.
+.Sp
+Note however that in some environments this assumption is not true.
+Use \fB\-fno\-delete\-null\-pointer\-checks\fR to disable this optimization
+for programs which depend on that behavior.
+.Sp
+Some targets, especially embedded ones, disable this option at all levels.
+Otherwise it is enabled at all levels: \fB\-O0\fR, \fB\-O1\fR,
+\&\fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.  Passes that use the information
+are enabled independently at different optimization levels.
+.IP "\fB\-fdevirtualize\fR" 4
+.IX Item "-fdevirtualize"
+Attempt to convert calls to virtual functions to direct calls.  This
+is done both within a procedure and interprocedurally as part of
+indirect inlining (\f(CW\*(C`\-findirect\-inlining\*(C'\fR) and interprocedural constant
+propagation (\fB\-fipa\-cp\fR).
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fexpensive\-optimizations\fR" 4
+.IX Item "-fexpensive-optimizations"
+Perform a number of minor optimizations that are relatively expensive.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-foptimize\-register\-move\fR" 4
+.IX Item "-foptimize-register-move"
+.PD 0
+.IP "\fB\-fregmove\fR" 4
+.IX Item "-fregmove"
+.PD
+Attempt to reassign register numbers in move instructions and as
+operands of other simple instructions in order to maximize the amount of
+register tying.  This is especially helpful on machines with two-operand
+instructions.
+.Sp
+Note \fB\-fregmove\fR and \fB\-foptimize\-register\-move\fR are the same
+optimization.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fira\-algorithm=\fR\fIalgorithm\fR" 4
+.IX Item "-fira-algorithm=algorithm"
+Use specified coloring algorithm for the integrated register
+allocator.  The \fIalgorithm\fR argument should be \f(CW\*(C`priority\*(C'\fR or
+\&\f(CW\*(C`CB\*(C'\fR.  The first algorithm specifies Chow's priority coloring,
+the second one specifies Chaitin-Briggs coloring.  The second
+algorithm can be unimplemented for some architectures.  If it is
+implemented, it is the default because Chaitin-Briggs coloring as a
+rule generates a better code.
+.IP "\fB\-fira\-region=\fR\fIregion\fR" 4
+.IX Item "-fira-region=region"
+Use specified regions for the integrated register allocator.  The
+\&\fIregion\fR argument should be one of \f(CW\*(C`all\*(C'\fR, \f(CW\*(C`mixed\*(C'\fR, or
+\&\f(CW\*(C`one\*(C'\fR.  The first value means using all loops as register
+allocation regions, the second value which is the default means using
+all loops except for loops with small register pressure as the
+regions, and third one means using all function as a single region.
+The first value can give best result for machines with small size and
+irregular register set, the third one results in faster and generates
+decent code and the smallest size code, and the default value usually
+give the best results in most cases and for most architectures.
+.IP "\fB\-fira\-loop\-pressure\fR" 4
+.IX Item "-fira-loop-pressure"
+Use \s-1IRA\s0 to evaluate register pressure in loops for decision to move
+loop invariants.  Usage of this option usually results in generation
+of faster and smaller code on machines with big register files (>= 32
+registers) but it can slow compiler down.
+.Sp
+This option is enabled at level \fB\-O3\fR for some targets.
+.IP "\fB\-fno\-ira\-share\-save\-slots\fR" 4
+.IX Item "-fno-ira-share-save-slots"
+Switch off sharing stack slots used for saving call used hard
+registers living through a call.  Each hard register will get a
+separate stack slot and as a result function stack frame will be
+bigger.
+.IP "\fB\-fno\-ira\-share\-spill\-slots\fR" 4
+.IX Item "-fno-ira-share-spill-slots"
+Switch off sharing stack slots allocated for pseudo-registers.  Each
+pseudo-register which did not get a hard register will get a separate
+stack slot and as a result function stack frame will be bigger.
+.IP "\fB\-fira\-verbose=\fR\fIn\fR" 4
+.IX Item "-fira-verbose=n"
+Set up how verbose dump file for the integrated register allocator
+will be.  Default value is 5.  If the value is greater or equal to 10,
+the dump file will be stderr as if the value were \fIn\fR minus 10.
+.IP "\fB\-fdelayed\-branch\fR" 4
+.IX Item "-fdelayed-branch"
+If supported for the target machine, attempt to reorder instructions
+to exploit instruction slots available after delayed branch
+instructions.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fschedule\-insns\fR" 4
+.IX Item "-fschedule-insns"
+If supported for the target machine, attempt to reorder instructions to
+eliminate execution stalls due to required data being unavailable.  This
+helps machines that have slow floating point or memory load instructions
+by allowing other instructions to be issued until the result of the load
+or floating point instruction is required.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-fschedule\-insns2\fR" 4
+.IX Item "-fschedule-insns2"
+Similar to \fB\-fschedule\-insns\fR, but requests an additional pass of
+instruction scheduling after register allocation has been done.  This is
+especially useful on machines with a relatively small number of
+registers and where memory load instructions take more than one cycle.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fno\-sched\-interblock\fR" 4
+.IX Item "-fno-sched-interblock"
+Don't schedule instructions across basic blocks.  This is normally
+enabled by default when scheduling before register allocation, i.e.
+with \fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fno\-sched\-spec\fR" 4
+.IX Item "-fno-sched-spec"
+Don't allow speculative motion of non-load instructions.  This is normally
+enabled by default when scheduling before register allocation, i.e.
+with \fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-pressure\fR" 4
+.IX Item "-fsched-pressure"
+Enable register pressure sensitive insn scheduling before the register
+allocation.  This only makes sense when scheduling before register
+allocation is enabled, i.e. with \fB\-fschedule\-insns\fR or at
+\&\fB\-O2\fR or higher.  Usage of this option can improve the
+generated code and decrease its size by preventing register pressure
+increase above the number of available hard registers and as a
+consequence register spills in the register allocation.
+.IP "\fB\-fsched\-spec\-load\fR" 4
+.IX Item "-fsched-spec-load"
+Allow speculative motion of some load instructions.  This only makes
+sense when scheduling before register allocation, i.e. with
+\&\fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-spec\-load\-dangerous\fR" 4
+.IX Item "-fsched-spec-load-dangerous"
+Allow speculative motion of more load instructions.  This only makes
+sense when scheduling before register allocation, i.e. with
+\&\fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-stalled\-insns\fR" 4
+.IX Item "-fsched-stalled-insns"
+.PD 0
+.IP "\fB\-fsched\-stalled\-insns=\fR\fIn\fR" 4
+.IX Item "-fsched-stalled-insns=n"
+.PD
+Define how many insns (if any) can be moved prematurely from the queue
+of stalled insns into the ready list, during the second scheduling pass.
+\&\fB\-fno\-sched\-stalled\-insns\fR means that no insns will be moved
+prematurely, \fB\-fsched\-stalled\-insns=0\fR means there is no limit
+on how many queued insns can be moved prematurely.
+\&\fB\-fsched\-stalled\-insns\fR without a value is equivalent to
+\&\fB\-fsched\-stalled\-insns=1\fR.
+.IP "\fB\-fsched\-stalled\-insns\-dep\fR" 4
+.IX Item "-fsched-stalled-insns-dep"
+.PD 0
+.IP "\fB\-fsched\-stalled\-insns\-dep=\fR\fIn\fR" 4
+.IX Item "-fsched-stalled-insns-dep=n"
+.PD
+Define how many insn groups (cycles) will be examined for a dependency
+on a stalled insn that is candidate for premature removal from the queue
+of stalled insns.  This has an effect only during the second scheduling pass,
+and only if \fB\-fsched\-stalled\-insns\fR is used.
+\&\fB\-fno\-sched\-stalled\-insns\-dep\fR is equivalent to
+\&\fB\-fsched\-stalled\-insns\-dep=0\fR.
+\&\fB\-fsched\-stalled\-insns\-dep\fR without a value is equivalent to
+\&\fB\-fsched\-stalled\-insns\-dep=1\fR.
+.IP "\fB\-fsched2\-use\-superblocks\fR" 4
+.IX Item "-fsched2-use-superblocks"
+When scheduling after register allocation, do use superblock scheduling
+algorithm.  Superblock scheduling allows motion across basic block boundaries
+resulting on faster schedules.  This option is experimental, as not all machine
+descriptions used by \s-1GCC\s0 model the \s-1CPU\s0 closely enough to avoid unreliable
+results from the algorithm.
+.Sp
+This only makes sense when scheduling after register allocation, i.e. with
+\&\fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-group\-heuristic\fR" 4
+.IX Item "-fsched-group-heuristic"
+Enable the group heuristic in the scheduler.  This heuristic favors 
+the instruction that belongs to a schedule group.  This is enabled 
+by default when scheduling is enabled, i.e. with \fB\-fschedule\-insns\fR 
+or \fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-critical\-path\-heuristic\fR" 4
+.IX Item "-fsched-critical-path-heuristic"
+Enable the critical-path heuristic in the scheduler.  This heuristic favors 
+instructions on the critical path.  This is enabled by default when 
+scheduling is enabled, i.e. with \fB\-fschedule\-insns\fR 
+or \fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-spec\-insn\-heuristic\fR" 4
+.IX Item "-fsched-spec-insn-heuristic"
+Enable the speculative instruction heuristic in the scheduler.  This 
+heuristic favors speculative instructions with greater dependency weakness.  
+This is enabled by default when scheduling is enabled, i.e. 
+with \fB\-fschedule\-insns\fR or \fB\-fschedule\-insns2\fR 
+or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-rank\-heuristic\fR" 4
+.IX Item "-fsched-rank-heuristic"
+Enable the rank heuristic in the scheduler.  This heuristic favors 
+the instruction belonging to a basic block with greater size or frequency.  
+This is enabled by default when scheduling is enabled, i.e. 
+with \fB\-fschedule\-insns\fR or \fB\-fschedule\-insns2\fR or 
+at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-last\-insn\-heuristic\fR" 4
+.IX Item "-fsched-last-insn-heuristic"
+Enable the last-instruction heuristic in the scheduler.  This heuristic 
+favors the instruction that is less dependent on the last instruction
+scheduled.  This is enabled by default when scheduling is enabled, 
+i.e. with \fB\-fschedule\-insns\fR or \fB\-fschedule\-insns2\fR or 
+at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-dep\-count\-heuristic\fR" 4
+.IX Item "-fsched-dep-count-heuristic"
+Enable the dependent-count heuristic in the scheduler.  This heuristic 
+favors the instruction that has more instructions depending on it.  
+This is enabled by default when scheduling is enabled, i.e. 
+with \fB\-fschedule\-insns\fR or \fB\-fschedule\-insns2\fR or 
+at \fB\-O2\fR or higher.
+.IP "\fB\-freschedule\-modulo\-scheduled\-loops\fR" 4
+.IX Item "-freschedule-modulo-scheduled-loops"
+The modulo scheduling comes before the traditional scheduling, if a loop
+was modulo scheduled we may want to prevent the later scheduling passes
+from changing its schedule, we use this option to control that.
+.IP "\fB\-fselective\-scheduling\fR" 4
+.IX Item "-fselective-scheduling"
+Schedule instructions using selective scheduling algorithm.  Selective
+scheduling runs instead of the first scheduler pass.
+.IP "\fB\-fselective\-scheduling2\fR" 4
+.IX Item "-fselective-scheduling2"
+Schedule instructions using selective scheduling algorithm.  Selective
+scheduling runs instead of the second scheduler pass.
+.IP "\fB\-fsel\-sched\-pipelining\fR" 4
+.IX Item "-fsel-sched-pipelining"
+Enable software pipelining of innermost loops during selective scheduling.
+This option has no effect until one of \fB\-fselective\-scheduling\fR or
+\&\fB\-fselective\-scheduling2\fR is turned on.
+.IP "\fB\-fsel\-sched\-pipelining\-outer\-loops\fR" 4
+.IX Item "-fsel-sched-pipelining-outer-loops"
+When pipelining loops during selective scheduling, also pipeline outer loops.
+This option has no effect until \fB\-fsel\-sched\-pipelining\fR is turned on.
+.IP "\fB\-fcaller\-saves\fR" 4
+.IX Item "-fcaller-saves"
+Enable values to be allocated in registers that will be clobbered by
+function calls, by emitting extra instructions to save and restore the
+registers around such calls.  Such allocation is done only when it
+seems to result in better code than would otherwise be produced.
+.Sp
+This option is always enabled by default on certain machines, usually
+those which have no call-preserved registers to use instead.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fcombine\-stack\-adjustments\fR" 4
+.IX Item "-fcombine-stack-adjustments"
+Tracks stack adjustments (pushes and pops) and stack memory references
+and then tries to find ways to combine them.
+.Sp
+Enabled by default at \fB\-O1\fR and higher.
+.IP "\fB\-fconserve\-stack\fR" 4
+.IX Item "-fconserve-stack"
+Attempt to minimize stack usage.  The compiler will attempt to use less
+stack space, even if that makes the program slower.  This option
+implies setting the \fBlarge-stack-frame\fR parameter to 100
+and the \fBlarge-stack-frame-growth\fR parameter to 400.
+.IP "\fB\-ftree\-reassoc\fR" 4
+.IX Item "-ftree-reassoc"
+Perform reassociation on trees.  This flag is enabled by default
+at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-pre\fR" 4
+.IX Item "-ftree-pre"
+Perform partial redundancy elimination (\s-1PRE\s0) on trees.  This flag is
+enabled by default at \fB\-O2\fR and \fB\-O3\fR.
+.IP "\fB\-ftree\-forwprop\fR" 4
+.IX Item "-ftree-forwprop"
+Perform forward propagation on trees.  This flag is enabled by default
+at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-fre\fR" 4
+.IX Item "-ftree-fre"
+Perform full redundancy elimination (\s-1FRE\s0) on trees.  The difference
+between \s-1FRE\s0 and \s-1PRE\s0 is that \s-1FRE\s0 only considers expressions
+that are computed on all paths leading to the redundant computation.
+This analysis is faster than \s-1PRE\s0, though it exposes fewer redundancies.
+This flag is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-phiprop\fR" 4
+.IX Item "-ftree-phiprop"
+Perform hoisting of loads from conditional pointers on trees.  This
+pass is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-copy\-prop\fR" 4
+.IX Item "-ftree-copy-prop"
+Perform copy propagation on trees.  This pass eliminates unnecessary
+copy operations.  This flag is enabled by default at \fB\-O\fR and
+higher.
+.IP "\fB\-fipa\-pure\-const\fR" 4
+.IX Item "-fipa-pure-const"
+Discover which functions are pure or constant.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fipa\-reference\fR" 4
+.IX Item "-fipa-reference"
+Discover which static variables do not escape cannot escape the
+compilation unit.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fipa\-struct\-reorg\fR" 4
+.IX Item "-fipa-struct-reorg"
+Perform structure reorganization optimization, that change C\-like structures
+layout in order to better utilize spatial locality.  This transformation is
+affective for programs containing arrays of structures.  Available in two
+compilation modes: profile-based (enabled with \fB\-fprofile\-generate\fR)
+or static (which uses built-in heuristics).  It works only in whole program
+mode, so it requires \fB\-fwhole\-program\fR to be
+enabled.  Structures considered \fBcold\fR by this transformation are not
+affected (see \fB\-\-param struct\-reorg\-cold\-struct\-ratio=\fR\fIvalue\fR).
+.Sp
+With this flag, the program debug info reflects a new structure layout.
+.IP "\fB\-fipa\-pta\fR" 4
+.IX Item "-fipa-pta"
+Perform interprocedural pointer analysis and interprocedural modification
+and reference analysis.  This option can cause excessive memory and
+compile-time usage on large compilation units.  It is not enabled by
+default at any optimization level.
+.IP "\fB\-fipa\-profile\fR" 4
+.IX Item "-fipa-profile"
+Perform interprocedural profile propagation.  The functions called only from
+cold functions are marked as cold. Also functions executed once (such as
+\&\f(CW\*(C`cold\*(C'\fR, \f(CW\*(C`noreturn\*(C'\fR, static constructors or destructors) are identified. Cold
+functions and loop less parts of functions executed once are then optimized for
+size.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fipa\-cp\fR" 4
+.IX Item "-fipa-cp"
+Perform interprocedural constant propagation.
+This optimization analyzes the program to determine when values passed
+to functions are constants and then optimizes accordingly.
+This optimization can substantially increase performance
+if the application has constants passed to functions.
+This flag is enabled by default at \fB\-O2\fR, \fB\-Os\fR and \fB\-O3\fR.
+.IP "\fB\-fipa\-cp\-clone\fR" 4
+.IX Item "-fipa-cp-clone"
+Perform function cloning to make interprocedural constant propagation stronger.
+When enabled, interprocedural constant propagation will perform function cloning
+when externally visible function can be called with constant arguments.
+Because this optimization can create multiple copies of functions,
+it may significantly increase code size
+(see \fB\-\-param ipcp\-unit\-growth=\fR\fIvalue\fR).
+This flag is enabled by default at \fB\-O3\fR.
+.IP "\fB\-fipa\-matrix\-reorg\fR" 4
+.IX Item "-fipa-matrix-reorg"
+Perform matrix flattening and transposing.
+Matrix flattening tries to replace an m\-dimensional matrix
+with its equivalent n\-dimensional matrix, where n < m.
+This reduces the level of indirection needed for accessing the elements
+of the matrix. The second optimization is matrix transposing that
+attempts to change the order of the matrix's dimensions in order to
+improve cache locality.
+Both optimizations need the \fB\-fwhole\-program\fR flag.
+Transposing is enabled only if profiling information is available.
+.IP "\fB\-ftree\-sink\fR" 4
+.IX Item "-ftree-sink"
+Perform forward store motion  on trees.  This flag is
+enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-bit\-ccp\fR" 4
+.IX Item "-ftree-bit-ccp"
+Perform sparse conditional bit constant propagation on trees and propagate
+pointer alignment information.
+This pass only operates on local scalar variables and is enabled by default
+at \fB\-O\fR and higher.  It requires that \fB\-ftree\-ccp\fR is enabled.
+.IP "\fB\-ftree\-ccp\fR" 4
+.IX Item "-ftree-ccp"
+Perform sparse conditional constant propagation (\s-1CCP\s0) on trees.  This
+pass only operates on local scalar variables and is enabled by default
+at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-switch\-conversion\fR" 4
+.IX Item "-ftree-switch-conversion"
+Perform conversion of simple initializations in a switch to
+initializations from a scalar array.  This flag is enabled by default
+at \fB\-O2\fR and higher.
+.IP "\fB\-ftree\-dce\fR" 4
+.IX Item "-ftree-dce"
+Perform dead code elimination (\s-1DCE\s0) on trees.  This flag is enabled by
+default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-builtin\-call\-dce\fR" 4
+.IX Item "-ftree-builtin-call-dce"
+Perform conditional dead code elimination (\s-1DCE\s0) for calls to builtin functions
+that may set \f(CW\*(C`errno\*(C'\fR but are otherwise side-effect free.  This flag is
+enabled by default at \fB\-O2\fR and higher if \fB\-Os\fR is not also
+specified.
+.IP "\fB\-ftree\-dominator\-opts\fR" 4
+.IX Item "-ftree-dominator-opts"
+Perform a variety of simple scalar cleanups (constant/copy
+propagation, redundancy elimination, range propagation and expression
+simplification) based on a dominator tree traversal.  This also
+performs jump threading (to reduce jumps to jumps). This flag is
+enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-dse\fR" 4
+.IX Item "-ftree-dse"
+Perform dead store elimination (\s-1DSE\s0) on trees.  A dead store is a store into
+a memory location which will later be overwritten by another store without
+any intervening loads.  In this case the earlier store can be deleted.  This
+flag is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-ch\fR" 4
+.IX Item "-ftree-ch"
+Perform loop header copying on trees.  This is beneficial since it increases
+effectiveness of code motion optimizations.  It also saves one jump.  This flag
+is enabled by default at \fB\-O\fR and higher.  It is not enabled
+for \fB\-Os\fR, since it usually increases code size.
+.IP "\fB\-ftree\-loop\-optimize\fR" 4
+.IX Item "-ftree-loop-optimize"
+Perform loop optimizations on trees.  This flag is enabled by default
+at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-loop\-linear\fR" 4
+.IX Item "-ftree-loop-linear"
+Perform loop interchange transformations on tree.  Same as
+\&\fB\-floop\-interchange\fR.  To use this code transformation, \s-1GCC\s0 has
+to be configured with \fB\-\-with\-ppl\fR and \fB\-\-with\-cloog\fR to
+enable the Graphite loop transformation infrastructure.
+.IP "\fB\-floop\-interchange\fR" 4
+.IX Item "-floop-interchange"
+Perform loop interchange transformations on loops.  Interchanging two
+nested loops switches the inner and outer loops.  For example, given a
+loop like:
+.Sp
+.Vb 5
+\&        DO J = 1, M
+\&          DO I = 1, N
+\&            A(J, I) = A(J, I) * C
+\&          ENDDO
+\&        ENDDO
+.Ve
+.Sp
+loop interchange will transform the loop as if the user had written:
+.Sp
+.Vb 5
+\&        DO I = 1, N
+\&          DO J = 1, M
+\&            A(J, I) = A(J, I) * C
+\&          ENDDO
+\&        ENDDO
+.Ve
+.Sp
+which can be beneficial when \f(CW\*(C`N\*(C'\fR is larger than the caches,
+because in Fortran, the elements of an array are stored in memory
+contiguously by column, and the original loop iterates over rows,
+potentially creating at each access a cache miss.  This optimization
+applies to all the languages supported by \s-1GCC\s0 and is not limited to
+Fortran.  To use this code transformation, \s-1GCC\s0 has to be configured
+with \fB\-\-with\-ppl\fR and \fB\-\-with\-cloog\fR to enable the
+Graphite loop transformation infrastructure.
+.IP "\fB\-floop\-strip\-mine\fR" 4
+.IX Item "-floop-strip-mine"
+Perform loop strip mining transformations on loops.  Strip mining
+splits a loop into two nested loops.  The outer loop has strides
+equal to the strip size and the inner loop has strides of the
+original loop within a strip.  The strip length can be changed
+using the \fBloop-block-tile-size\fR parameter.  For example,
+given a loop like:
+.Sp
+.Vb 3
+\&        DO I = 1, N
+\&          A(I) = A(I) + C
+\&        ENDDO
+.Ve
+.Sp
+loop strip mining will transform the loop as if the user had written:
+.Sp
+.Vb 5
+\&        DO II = 1, N, 51
+\&          DO I = II, min (II + 50, N)
+\&            A(I) = A(I) + C
+\&          ENDDO
+\&        ENDDO
+.Ve
+.Sp
+This optimization applies to all the languages supported by \s-1GCC\s0 and is
+not limited to Fortran.  To use this code transformation, \s-1GCC\s0 has to
+be configured with \fB\-\-with\-ppl\fR and \fB\-\-with\-cloog\fR to
+enable the Graphite loop transformation infrastructure.
+.IP "\fB\-floop\-block\fR" 4
+.IX Item "-floop-block"
+Perform loop blocking transformations on loops.  Blocking strip mines
+each loop in the loop nest such that the memory accesses of the
+element loops fit inside caches.  The strip length can be changed
+using the \fBloop-block-tile-size\fR parameter.  For example, given
+a loop like:
+.Sp
+.Vb 5
+\&        DO I = 1, N
+\&          DO J = 1, M
+\&            A(J, I) = B(I) + C(J)
+\&          ENDDO
+\&        ENDDO
+.Ve
+.Sp
+loop blocking will transform the loop as if the user had written:
+.Sp
+.Vb 9
+\&        DO II = 1, N, 51
+\&          DO JJ = 1, M, 51
+\&            DO I = II, min (II + 50, N)
+\&              DO J = JJ, min (JJ + 50, M)
+\&                A(J, I) = B(I) + C(J)
+\&              ENDDO
+\&            ENDDO
+\&          ENDDO
+\&        ENDDO
+.Ve
+.Sp
+which can be beneficial when \f(CW\*(C`M\*(C'\fR is larger than the caches,
+because the innermost loop will iterate over a smaller amount of data
+that can be kept in the caches.  This optimization applies to all the
+languages supported by \s-1GCC\s0 and is not limited to Fortran.  To use this
+code transformation, \s-1GCC\s0 has to be configured with \fB\-\-with\-ppl\fR
+and \fB\-\-with\-cloog\fR to enable the Graphite loop transformation
+infrastructure.
+.IP "\fB\-fgraphite\-identity\fR" 4
+.IX Item "-fgraphite-identity"
+Enable the identity transformation for graphite.  For every SCoP we generate
+the polyhedral representation and transform it back to gimple.  Using
+\&\fB\-fgraphite\-identity\fR we can check the costs or benefits of the
+\&\s-1GIMPLE\s0 \-> \s-1GRAPHITE\s0 \-> \s-1GIMPLE\s0 transformation.  Some minimal optimizations
+are also performed by the code generator CLooG, like index splitting and
+dead code elimination in loops.
+.IP "\fB\-floop\-flatten\fR" 4
+.IX Item "-floop-flatten"
+Removes the loop nesting structure: transforms the loop nest into a
+single loop.  This transformation can be useful to vectorize all the
+levels of the loop nest.
+.IP "\fB\-floop\-parallelize\-all\fR" 4
+.IX Item "-floop-parallelize-all"
+Use the Graphite data dependence analysis to identify loops that can
+be parallelized.  Parallelize all the loops that can be analyzed to
+not contain loop carried dependences without checking that it is
+profitable to parallelize the loops.
+.IP "\fB\-fcheck\-data\-deps\fR" 4
+.IX Item "-fcheck-data-deps"
+Compare the results of several data dependence analyzers.  This option
+is used for debugging the data dependence analyzers.
+.IP "\fB\-ftree\-loop\-if\-convert\fR" 4
+.IX Item "-ftree-loop-if-convert"
+Attempt to transform conditional jumps in the innermost loops to
+branch-less equivalents.  The intent is to remove control-flow from
+the innermost loops in order to improve the ability of the
+vectorization pass to handle these loops.  This is enabled by default
+if vectorization is enabled.
+.IP "\fB\-ftree\-loop\-if\-convert\-stores\fR" 4
+.IX Item "-ftree-loop-if-convert-stores"
+Attempt to also if-convert conditional jumps containing memory writes.
+This transformation can be unsafe for multi-threaded programs as it
+transforms conditional memory writes into unconditional memory writes.
+For example,
+.Sp
+.Vb 3
+\&        for (i = 0; i < N; i++)
+\&          if (cond)
+\&            A[i] = expr;
+.Ve
+.Sp
+would be transformed to
+.Sp
+.Vb 2
+\&        for (i = 0; i < N; i++)
+\&          A[i] = cond ? expr : A[i];
+.Ve
+.Sp
+potentially producing data races.
+.IP "\fB\-ftree\-loop\-distribution\fR" 4
+.IX Item "-ftree-loop-distribution"
+Perform loop distribution.  This flag can improve cache performance on
+big loop bodies and allow further loop optimizations, like
+parallelization or vectorization, to take place.  For example, the loop
+.Sp
+.Vb 4
+\&        DO I = 1, N
+\&          A(I) = B(I) + C
+\&          D(I) = E(I) * F
+\&        ENDDO
+.Ve
+.Sp
+is transformed to
+.Sp
+.Vb 6
+\&        DO I = 1, N
+\&           A(I) = B(I) + C
+\&        ENDDO
+\&        DO I = 1, N
+\&           D(I) = E(I) * F
+\&        ENDDO
+.Ve
+.IP "\fB\-ftree\-loop\-distribute\-patterns\fR" 4
+.IX Item "-ftree-loop-distribute-patterns"
+Perform loop distribution of patterns that can be code generated with
+calls to a library.  This flag is enabled by default at \fB\-O3\fR.
+.Sp
+This pass distributes the initialization loops and generates a call to
+memset zero.  For example, the loop
+.Sp
+.Vb 4
+\&        DO I = 1, N
+\&          A(I) = 0
+\&          B(I) = A(I) + I
+\&        ENDDO
+.Ve
+.Sp
+is transformed to
+.Sp
+.Vb 6
+\&        DO I = 1, N
+\&           A(I) = 0
+\&        ENDDO
+\&        DO I = 1, N
+\&           B(I) = A(I) + I
+\&        ENDDO
+.Ve
+.Sp
+and the initialization loop is transformed into a call to memset zero.
+.IP "\fB\-ftree\-loop\-im\fR" 4
+.IX Item "-ftree-loop-im"
+Perform loop invariant motion on trees.  This pass moves only invariants that
+would be hard to handle at \s-1RTL\s0 level (function calls, operations that expand to
+nontrivial sequences of insns).  With \fB\-funswitch\-loops\fR it also moves
+operands of conditions that are invariant out of the loop, so that we can use
+just trivial invariantness analysis in loop unswitching.  The pass also includes
+store motion.
+.IP "\fB\-ftree\-loop\-ivcanon\fR" 4
+.IX Item "-ftree-loop-ivcanon"
+Create a canonical counter for number of iterations in the loop for that
+determining number of iterations requires complicated analysis.  Later
+optimizations then may determine the number easily.  Useful especially
+in connection with unrolling.
+.IP "\fB\-fivopts\fR" 4
+.IX Item "-fivopts"
+Perform induction variable optimizations (strength reduction, induction
+variable merging and induction variable elimination) on trees.
+.IP "\fB\-ftree\-parallelize\-loops=n\fR" 4
+.IX Item "-ftree-parallelize-loops=n"
+Parallelize loops, i.e., split their iteration space to run in n threads.
+This is only possible for loops whose iterations are independent
+and can be arbitrarily reordered.  The optimization is only
+profitable on multiprocessor machines, for loops that are CPU-intensive,
+rather than constrained e.g. by memory bandwidth.  This option
+implies \fB\-pthread\fR, and thus is only supported on targets
+that have support for \fB\-pthread\fR.
+.IP "\fB\-ftree\-pta\fR" 4
+.IX Item "-ftree-pta"
+Perform function-local points-to analysis on trees.  This flag is
+enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-sra\fR" 4
+.IX Item "-ftree-sra"
+Perform scalar replacement of aggregates.  This pass replaces structure
+references with scalars to prevent committing structures to memory too
+early.  This flag is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-copyrename\fR" 4
+.IX Item "-ftree-copyrename"
+Perform copy renaming on trees.  This pass attempts to rename compiler
+temporaries to other variables at copy locations, usually resulting in
+variable names which more closely resemble the original variables.  This flag
+is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-ter\fR" 4
+.IX Item "-ftree-ter"
+Perform temporary expression replacement during the \s-1SSA\-\s0>normal phase.  Single
+use/single def temporaries are replaced at their use location with their
+defining expression.  This results in non-GIMPLE code, but gives the expanders
+much more complex trees to work on resulting in better \s-1RTL\s0 generation.  This is
+enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-vectorize\fR" 4
+.IX Item "-ftree-vectorize"
+Perform loop vectorization on trees. This flag is enabled by default at
+\&\fB\-O3\fR.
+.IP "\fB\-ftree\-slp\-vectorize\fR" 4
+.IX Item "-ftree-slp-vectorize"
+Perform basic block vectorization on trees. This flag is enabled by default at
+\&\fB\-O3\fR and when \fB\-ftree\-vectorize\fR is enabled.
+.IP "\fB\-ftree\-vect\-loop\-version\fR" 4
+.IX Item "-ftree-vect-loop-version"
+Perform loop versioning when doing loop vectorization on trees.  When a loop
+appears to be vectorizable except that data alignment or data dependence cannot
+be determined at compile time then vectorized and non-vectorized versions of
+the loop are generated along with runtime checks for alignment or dependence
+to control which version is executed.  This option is enabled by default
+except at level \fB\-Os\fR where it is disabled.
+.IP "\fB\-fvect\-cost\-model\fR" 4
+.IX Item "-fvect-cost-model"
+Enable cost model for vectorization.
+.IP "\fB\-ftree\-vrp\fR" 4
+.IX Item "-ftree-vrp"
+Perform Value Range Propagation on trees.  This is similar to the
+constant propagation pass, but instead of values, ranges of values are
+propagated.  This allows the optimizers to remove unnecessary range
+checks like array bound checks and null pointer checks.  This is
+enabled by default at \fB\-O2\fR and higher.  Null pointer check
+elimination is only done if \fB\-fdelete\-null\-pointer\-checks\fR is
+enabled.
+.IP "\fB\-ftracer\fR" 4
+.IX Item "-ftracer"
+Perform tail duplication to enlarge superblock size.  This transformation
+simplifies the control flow of the function allowing other optimizations to do
+better job.
+.IP "\fB\-funroll\-loops\fR" 4
+.IX Item "-funroll-loops"
+Unroll loops whose number of iterations can be determined at compile
+time or upon entry to the loop.  \fB\-funroll\-loops\fR implies
+\&\fB\-frerun\-cse\-after\-loop\fR.  This option makes code larger,
+and may or may not make it run faster.
+.IP "\fB\-funroll\-all\-loops\fR" 4
+.IX Item "-funroll-all-loops"
+Unroll all loops, even if their number of iterations is uncertain when
+the loop is entered.  This usually makes programs run more slowly.
+\&\fB\-funroll\-all\-loops\fR implies the same options as
+\&\fB\-funroll\-loops\fR,
+.IP "\fB\-fsplit\-ivs\-in\-unroller\fR" 4
+.IX Item "-fsplit-ivs-in-unroller"
+Enables expressing of values of induction variables in later iterations
+of the unrolled loop using the value in the first iteration.  This breaks
+long dependency chains, thus improving efficiency of the scheduling passes.
+.Sp
+Combination of \fB\-fweb\fR and \s-1CSE\s0 is often sufficient to obtain the
+same effect.  However in cases the loop body is more complicated than
+a single basic block, this is not reliable.  It also does not work at all
+on some of the architectures due to restrictions in the \s-1CSE\s0 pass.
+.Sp
+This optimization is enabled by default.
+.IP "\fB\-fvariable\-expansion\-in\-unroller\fR" 4
+.IX Item "-fvariable-expansion-in-unroller"
+With this option, the compiler will create multiple copies of some
+local variables when unrolling a loop which can result in superior code.
+.IP "\fB\-fpartial\-inlining\fR" 4
+.IX Item "-fpartial-inlining"
+Inline parts of functions.  This option has any effect only
+when inlining itself is turned on by the \fB\-finline\-functions\fR
+or \fB\-finline\-small\-functions\fR options.
+.Sp
+Enabled at level \fB\-O2\fR.
+.IP "\fB\-fpredictive\-commoning\fR" 4
+.IX Item "-fpredictive-commoning"
+Perform predictive commoning optimization, i.e., reusing computations
+(especially memory loads and stores) performed in previous
+iterations of loops.
+.Sp
+This option is enabled at level \fB\-O3\fR.
+.IP "\fB\-fprefetch\-loop\-arrays\fR" 4
+.IX Item "-fprefetch-loop-arrays"
+If supported by the target machine, generate instructions to prefetch
+memory to improve the performance of loops that access large arrays.
+.Sp
+This option may generate better or worse code; results are highly
+dependent on the structure of loops within the source code.
+.Sp
+Disabled at level \fB\-Os\fR.
+.IP "\fB\-fno\-peephole\fR" 4
+.IX Item "-fno-peephole"
+.PD 0
+.IP "\fB\-fno\-peephole2\fR" 4
+.IX Item "-fno-peephole2"
+.PD
+Disable any machine-specific peephole optimizations.  The difference
+between \fB\-fno\-peephole\fR and \fB\-fno\-peephole2\fR is in how they
+are implemented in the compiler; some targets use one, some use the
+other, a few use both.
+.Sp
+\&\fB\-fpeephole\fR is enabled by default.
+\&\fB\-fpeephole2\fR enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fno\-guess\-branch\-probability\fR" 4
+.IX Item "-fno-guess-branch-probability"
+Do not guess branch probabilities using heuristics.
+.Sp
+\&\s-1GCC\s0 will use heuristics to guess branch probabilities if they are
+not provided by profiling feedback (\fB\-fprofile\-arcs\fR).  These
+heuristics are based on the control flow graph.  If some branch probabilities
+are specified by \fB_\|_builtin_expect\fR, then the heuristics will be
+used to guess branch probabilities for the rest of the control flow graph,
+taking the \fB_\|_builtin_expect\fR info into account.  The interactions
+between the heuristics and \fB_\|_builtin_expect\fR can be complex, and in
+some cases, it may be useful to disable the heuristics so that the effects
+of \fB_\|_builtin_expect\fR are easier to understand.
+.Sp
+The default is \fB\-fguess\-branch\-probability\fR at levels
+\&\fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-freorder\-blocks\fR" 4
+.IX Item "-freorder-blocks"
+Reorder basic blocks in the compiled function in order to reduce number of
+taken branches and improve code locality.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-freorder\-blocks\-and\-partition\fR" 4
+.IX Item "-freorder-blocks-and-partition"
+In addition to reordering basic blocks in the compiled function, in order
+to reduce number of taken branches, partitions hot and cold basic blocks
+into separate sections of the assembly and .o files, to improve
+paging and cache locality performance.
+.Sp
+This optimization is automatically turned off in the presence of
+exception handling, for linkonce sections, for functions with a user-defined
+section attribute and on any architecture that does not support named
+sections.
+.IP "\fB\-freorder\-functions\fR" 4
+.IX Item "-freorder-functions"
+Reorder functions in the object file in order to
+improve code locality.  This is implemented by using special
+subsections \f(CW\*(C`.text.hot\*(C'\fR for most frequently executed functions and
+\&\f(CW\*(C`.text.unlikely\*(C'\fR for unlikely executed functions.  Reordering is done by
+the linker so object file format must support named sections and linker must
+place them in a reasonable way.
+.Sp
+Also profile feedback must be available in to make this option effective.  See
+\&\fB\-fprofile\-arcs\fR for details.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fstrict\-aliasing\fR" 4
+.IX Item "-fstrict-aliasing"
+Allow the compiler to assume the strictest aliasing rules applicable to
+the language being compiled.  For C (and \*(C+), this activates
+optimizations based on the type of expressions.  In particular, an
+object of one type is assumed never to reside at the same address as an
+object of a different type, unless the types are almost the same.  For
+example, an \f(CW\*(C`unsigned int\*(C'\fR can alias an \f(CW\*(C`int\*(C'\fR, but not a
+\&\f(CW\*(C`void*\*(C'\fR or a \f(CW\*(C`double\*(C'\fR.  A character type may alias any other
+type.
+.Sp
+Pay special attention to code like this:
+.Sp
+.Vb 4
+\&        union a_union {
+\&          int i;
+\&          double d;
+\&        };
+\&        
+\&        int f() {
+\&          union a_union t;
+\&          t.d = 3.0;
+\&          return t.i;
+\&        }
+.Ve
+.Sp
+The practice of reading from a different union member than the one most
+recently written to (called \*(L"type-punning\*(R") is common.  Even with
+\&\fB\-fstrict\-aliasing\fR, type-punning is allowed, provided the memory
+is accessed through the union type.  So, the code above will work as
+expected.    However, this code might not:
+.Sp
+.Vb 7
+\&        int f() {
+\&          union a_union t;
+\&          int* ip;
+\&          t.d = 3.0;
+\&          ip = &t.i;
+\&          return *ip;
+\&        }
+.Ve
+.Sp
+Similarly, access by taking the address, casting the resulting pointer
+and dereferencing the result has undefined behavior, even if the cast
+uses a union type, e.g.:
+.Sp
+.Vb 4
+\&        int f() {
+\&          double d = 3.0;
+\&          return ((union a_union *) &d)\->i;
+\&        }
+.Ve
+.Sp
+The \fB\-fstrict\-aliasing\fR option is enabled at levels
+\&\fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fstrict\-overflow\fR" 4
+.IX Item "-fstrict-overflow"
+Allow the compiler to assume strict signed overflow rules, depending
+on the language being compiled.  For C (and \*(C+) this means that
+overflow when doing arithmetic with signed numbers is undefined, which
+means that the compiler may assume that it will not happen.  This
+permits various optimizations.  For example, the compiler will assume
+that an expression like \f(CW\*(C`i + 10 > i\*(C'\fR will always be true for
+signed \f(CW\*(C`i\*(C'\fR.  This assumption is only valid if signed overflow is
+undefined, as the expression is false if \f(CW\*(C`i + 10\*(C'\fR overflows when
+using twos complement arithmetic.  When this option is in effect any
+attempt to determine whether an operation on signed numbers will
+overflow must be written carefully to not actually involve overflow.
+.Sp
+This option also allows the compiler to assume strict pointer
+semantics: given a pointer to an object, if adding an offset to that
+pointer does not produce a pointer to the same object, the addition is
+undefined.  This permits the compiler to conclude that \f(CW\*(C`p + u >
+p\*(C'\fR is always true for a pointer \f(CW\*(C`p\*(C'\fR and unsigned integer
+\&\f(CW\*(C`u\*(C'\fR.  This assumption is only valid because pointer wraparound is
+undefined, as the expression is false if \f(CW\*(C`p + u\*(C'\fR overflows using
+twos complement arithmetic.
+.Sp
+See also the \fB\-fwrapv\fR option.  Using \fB\-fwrapv\fR means
+that integer signed overflow is fully defined: it wraps.  When
+\&\fB\-fwrapv\fR is used, there is no difference between
+\&\fB\-fstrict\-overflow\fR and \fB\-fno\-strict\-overflow\fR for
+integers.  With \fB\-fwrapv\fR certain types of overflow are
+permitted.  For example, if the compiler gets an overflow when doing
+arithmetic on constants, the overflowed value can still be used with
+\&\fB\-fwrapv\fR, but not otherwise.
+.Sp
+The \fB\-fstrict\-overflow\fR option is enabled at levels
+\&\fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-falign\-functions\fR" 4
+.IX Item "-falign-functions"
+.PD 0
+.IP "\fB\-falign\-functions=\fR\fIn\fR" 4
+.IX Item "-falign-functions=n"
+.PD
+Align the start of functions to the next power-of-two greater than
+\&\fIn\fR, skipping up to \fIn\fR bytes.  For instance,
+\&\fB\-falign\-functions=32\fR aligns functions to the next 32\-byte
+boundary, but \fB\-falign\-functions=24\fR would align to the next
+32\-byte boundary only if this can be done by skipping 23 bytes or less.
+.Sp
+\&\fB\-fno\-align\-functions\fR and \fB\-falign\-functions=1\fR are
+equivalent and mean that functions will not be aligned.
+.Sp
+Some assemblers only support this flag when \fIn\fR is a power of two;
+in that case, it is rounded up.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-falign\-labels\fR" 4
+.IX Item "-falign-labels"
+.PD 0
+.IP "\fB\-falign\-labels=\fR\fIn\fR" 4
+.IX Item "-falign-labels=n"
+.PD
+Align all branch targets to a power-of-two boundary, skipping up to
+\&\fIn\fR bytes like \fB\-falign\-functions\fR.  This option can easily
+make code slower, because it must insert dummy operations for when the
+branch target is reached in the usual flow of the code.
+.Sp
+\&\fB\-fno\-align\-labels\fR and \fB\-falign\-labels=1\fR are
+equivalent and mean that labels will not be aligned.
+.Sp
+If \fB\-falign\-loops\fR or \fB\-falign\-jumps\fR are applicable and
+are greater than this value, then their values are used instead.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default
+which is very likely to be \fB1\fR, meaning no alignment.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-falign\-loops\fR" 4
+.IX Item "-falign-loops"
+.PD 0
+.IP "\fB\-falign\-loops=\fR\fIn\fR" 4
+.IX Item "-falign-loops=n"
+.PD
+Align loops to a power-of-two boundary, skipping up to \fIn\fR bytes
+like \fB\-falign\-functions\fR.  The hope is that the loop will be
+executed many times, which will make up for any execution of the dummy
+operations.
+.Sp
+\&\fB\-fno\-align\-loops\fR and \fB\-falign\-loops=1\fR are
+equivalent and mean that loops will not be aligned.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-falign\-jumps\fR" 4
+.IX Item "-falign-jumps"
+.PD 0
+.IP "\fB\-falign\-jumps=\fR\fIn\fR" 4
+.IX Item "-falign-jumps=n"
+.PD
+Align branch targets to a power-of-two boundary, for branch targets
+where the targets can only be reached by jumping, skipping up to \fIn\fR
+bytes like \fB\-falign\-functions\fR.  In this case, no dummy operations
+need be executed.
+.Sp
+\&\fB\-fno\-align\-jumps\fR and \fB\-falign\-jumps=1\fR are
+equivalent and mean that loops will not be aligned.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-funit\-at\-a\-time\fR" 4
+.IX Item "-funit-at-a-time"
+This option is left for compatibility reasons. \fB\-funit\-at\-a\-time\fR
+has no effect, while \fB\-fno\-unit\-at\-a\-time\fR implies
+\&\fB\-fno\-toplevel\-reorder\fR and \fB\-fno\-section\-anchors\fR.
+.Sp
+Enabled by default.
+.IP "\fB\-fno\-toplevel\-reorder\fR" 4
+.IX Item "-fno-toplevel-reorder"
+Do not reorder top-level functions, variables, and \f(CW\*(C`asm\*(C'\fR
+statements.  Output them in the same order that they appear in the
+input file.  When this option is used, unreferenced static variables
+will not be removed.  This option is intended to support existing code
+which relies on a particular ordering.  For new code, it is better to
+use attributes.
+.Sp
+Enabled at level \fB\-O0\fR.  When disabled explicitly, it also imply
+\&\fB\-fno\-section\-anchors\fR that is otherwise enabled at \fB\-O0\fR on some
+targets.
+.IP "\fB\-fweb\fR" 4
+.IX Item "-fweb"
+Constructs webs as commonly used for register allocation purposes and assign
+each web individual pseudo register.  This allows the register allocation pass
+to operate on pseudos directly, but also strengthens several other optimization
+passes, such as \s-1CSE\s0, loop optimizer and trivial dead code remover.  It can,
+however, make debugging impossible, since variables will no longer stay in a
+\&\*(L"home register\*(R".
+.Sp
+Enabled by default with \fB\-funroll\-loops\fR.
+.IP "\fB\-fwhole\-program\fR" 4
+.IX Item "-fwhole-program"
+Assume that the current compilation unit represents the whole program being
+compiled.  All public functions and variables with the exception of \f(CW\*(C`main\*(C'\fR
+and those merged by attribute \f(CW\*(C`externally_visible\*(C'\fR become static functions
+and in effect are optimized more aggressively by interprocedural optimizers. If \fBgold\fR is used as the linker plugin, \f(CW\*(C`externally_visible\*(C'\fR attributes are automatically added to functions (not variable yet due to a current \fBgold\fR issue) that are accessed outside of \s-1LTO\s0 objects according to resolution file produced by \fBgold\fR.  For other linkers that cannot generate resolution file, explicit \f(CW\*(C`externally_visible\*(C'\fR attributes are still necessary.
+While this option is equivalent to proper use of the \f(CW\*(C`static\*(C'\fR keyword for
+programs consisting of a single file, in combination with option
+\&\fB\-flto\fR this flag can be used to
+compile many smaller scale programs since the functions and variables become
+local for the whole combined compilation unit, not for the single source file
+itself.
+.Sp
+This option implies \fB\-fwhole\-file\fR for Fortran programs.
+.IP "\fB\-flto[=\fR\fIn\fR\fB]\fR" 4
+.IX Item "-flto[=n]"
+This option runs the standard link-time optimizer.  When invoked
+with source code, it generates \s-1GIMPLE\s0 (one of \s-1GCC\s0's internal
+representations) and writes it to special \s-1ELF\s0 sections in the object
+file.  When the object files are linked together, all the function
+bodies are read from these \s-1ELF\s0 sections and instantiated as if they
+had been part of the same translation unit.
+.Sp
+To use the link-time optimizer, \fB\-flto\fR needs to be specified at
+compile time and during the final link.  For example:
+.Sp
+.Vb 3
+\&        gcc \-c \-O2 \-flto foo.c
+\&        gcc \-c \-O2 \-flto bar.c
+\&        gcc \-o myprog \-flto \-O2 foo.o bar.o
+.Ve
+.Sp
+The first two invocations to \s-1GCC\s0 save a bytecode representation
+of \s-1GIMPLE\s0 into special \s-1ELF\s0 sections inside \fIfoo.o\fR and
+\&\fIbar.o\fR.  The final invocation reads the \s-1GIMPLE\s0 bytecode from
+\&\fIfoo.o\fR and \fIbar.o\fR, merges the two files into a single
+internal image, and compiles the result as usual.  Since both
+\&\fIfoo.o\fR and \fIbar.o\fR are merged into a single image, this
+causes all the interprocedural analyses and optimizations in \s-1GCC\s0 to
+work across the two files as if they were a single one.  This means,
+for example, that the inliner is able to inline functions in
+\&\fIbar.o\fR into functions in \fIfoo.o\fR and vice-versa.
+.Sp
+Another (simpler) way to enable link-time optimization is:
+.Sp
+.Vb 1
+\&        gcc \-o myprog \-flto \-O2 foo.c bar.c
+.Ve
+.Sp
+The above generates bytecode for \fIfoo.c\fR and \fIbar.c\fR,
+merges them together into a single \s-1GIMPLE\s0 representation and optimizes
+them as usual to produce \fImyprog\fR.
+.Sp
+The only important thing to keep in mind is that to enable link-time
+optimizations the \fB\-flto\fR flag needs to be passed to both the
+compile and the link commands.
+.Sp
+To make whole program optimization effective, it is necessary to make
+certain whole program assumptions.  The compiler needs to know
+what functions and variables can be accessed by libraries and runtime
+outside of the link-time optimized unit.  When supported by the linker,
+the linker plugin (see \fB\-fuse\-linker\-plugin\fR) passes information
+to the compiler about used and externally visible symbols.  When
+the linker plugin is not available, \fB\-fwhole\-program\fR should be
+used to allow the compiler to make these assumptions, which leads
+to more aggressive optimization decisions.
+.Sp
+Note that when a file is compiled with \fB\-flto\fR, the generated
+object file is larger than a regular object file because it 
+contains \s-1GIMPLE\s0 bytecodes and the usual final code.  This means that
+object files with \s-1LTO\s0 information can be linked as normal object
+files; if \fB\-flto\fR is not passed to the linker, no
+interprocedural optimizations are applied.
+.Sp
+Additionally, the optimization flags used to compile individual files
+are not necessarily related to those used at link time.  For instance,
+.Sp
+.Vb 3
+\&        gcc \-c \-O0 \-flto foo.c
+\&        gcc \-c \-O0 \-flto bar.c
+\&        gcc \-o myprog \-flto \-O3 foo.o bar.o
+.Ve
+.Sp
+This produces individual object files with unoptimized assembler
+code, but the resulting binary \fImyprog\fR is optimized at
+\&\fB\-O3\fR.  If, instead, the final binary is generated without
+\&\fB\-flto\fR, then \fImyprog\fR is not optimized.
+.Sp
+When producing the final binary with \fB\-flto\fR, \s-1GCC\s0 only
+applies link-time optimizations to those files that contain bytecode.
+Therefore, you can mix and match object files and libraries with
+\&\s-1GIMPLE\s0 bytecodes and final object code.  \s-1GCC\s0 automatically selects
+which files to optimize in \s-1LTO\s0 mode and which files to link without
+further processing.
+.Sp
+There are some code generation flags that \s-1GCC\s0 preserves when
+generating bytecodes, as they need to be used during the final link
+stage.  Currently, the following options are saved into the \s-1GIMPLE\s0
+bytecode files: \fB\-fPIC\fR, \fB\-fcommon\fR and all the
+\&\fB\-m\fR target flags.
+.Sp
+At link time, these options are read in and reapplied.  Note that the
+current implementation makes no attempt to recognize conflicting
+values for these options.  If different files have conflicting option
+values (e.g., one file is compiled with \fB\-fPIC\fR and another
+isn't), the compiler simply uses the last value read from the
+bytecode files.  It is recommended, then, that you compile all the files
+participating in the same link with the same options.
+.Sp
+If \s-1LTO\s0 encounters objects with C linkage declared with incompatible
+types in separate translation units to be linked together (undefined
+behavior according to \s-1ISO\s0 C99 6.2.7), a non-fatal diagnostic may be
+issued.  The behavior is still undefined at runtime.
+.Sp
+Another feature of \s-1LTO\s0 is that it is possible to apply interprocedural
+optimizations on files written in different languages.  This requires
+support in the language front end.  Currently, the C, \*(C+ and
+Fortran front ends are capable of emitting \s-1GIMPLE\s0 bytecodes, so
+something like this should work:
+.Sp
+.Vb 4
+\&        gcc \-c \-flto foo.c
+\&        g++ \-c \-flto bar.cc
+\&        gfortran \-c \-flto baz.f90
+\&        g++ \-o myprog \-flto \-O3 foo.o bar.o baz.o \-lgfortran
+.Ve
+.Sp
+Notice that the final link is done with \fBg++\fR to get the \*(C+
+runtime libraries and \fB\-lgfortran\fR is added to get the Fortran
+runtime libraries.  In general, when mixing languages in \s-1LTO\s0 mode, you
+should use the same link command options as when mixing languages in a
+regular (non-LTO) compilation; all you need to add is \fB\-flto\fR to
+all the compile and link commands.
+.Sp
+If object files containing \s-1GIMPLE\s0 bytecode are stored in a library archive, say
+\&\fIlibfoo.a\fR, it is possible to extract and use them in an \s-1LTO\s0 link if you
+are using a linker with plugin support.  To enable this feature, use
+the flag \fB\-fuse\-linker\-plugin\fR at link time:
+.Sp
+.Vb 1
+\&        gcc \-o myprog \-O2 \-flto \-fuse\-linker\-plugin a.o b.o \-lfoo
+.Ve
+.Sp
+With the linker plugin enabled, the linker extracts the needed
+\&\s-1GIMPLE\s0 files from \fIlibfoo.a\fR and passes them on to the running \s-1GCC\s0
+to make them part of the aggregated \s-1GIMPLE\s0 image to be optimized.
+.Sp
+If you are not using a linker with plugin support and/or do not
+enable the linker plugin, then the objects inside \fIlibfoo.a\fR
+are extracted and linked as usual, but they do not participate
+in the \s-1LTO\s0 optimization process.
+.Sp
+Link-time optimizations do not require the presence of the whole program to
+operate.  If the program does not require any symbols to be exported, it is
+possible to combine \fB\-flto\fR and \fB\-fwhole\-program\fR to allow
+the interprocedural optimizers to use more aggressive assumptions which may
+lead to improved optimization opportunities. 
+Use of \fB\-fwhole\-program\fR is not needed when linker plugin is
+active (see \fB\-fuse\-linker\-plugin\fR).
+.Sp
+The current implementation of \s-1LTO\s0 makes no
+attempt to generate bytecode that is portable between different
+types of hosts.  The bytecode files are versioned and there is a
+strict version check, so bytecode files generated in one version of
+\&\s-1GCC\s0 will not work with an older/newer version of \s-1GCC\s0.
+.Sp
+Link-time optimization does not work well with generation of debugging
+information.  Combining \fB\-flto\fR with
+\&\fB\-g\fR is currently experimental and expected to produce wrong
+results.
+.Sp
+If you specify the optional \fIn\fR, the optimization and code
+generation done at link time is executed in parallel using \fIn\fR
+parallel jobs by utilizing an installed \fBmake\fR program.  The
+environment variable \fB\s-1MAKE\s0\fR may be used to override the program
+used.  The default value for \fIn\fR is 1.
+.Sp
+You can also specify \fB\-flto=jobserver\fR to use \s-1GNU\s0 make's 
+job server mode to determine the number of parallel jobs. This 
+is useful when the Makefile calling \s-1GCC\s0 is already executing in parallel.
+You must prepend a \fB+\fR to the command recipe in the parent Makefile
+for this to work.  This option likely only works if \fB\s-1MAKE\s0\fR is
+\&\s-1GNU\s0 make.
+.Sp
+This option is disabled by default.
+.IP "\fB\-flto\-partition=\fR\fIalg\fR" 4
+.IX Item "-flto-partition=alg"
+Specify the partitioning algorithm used by the link-time optimizer.
+The value is either \f(CW\*(C`1to1\*(C'\fR to specify a partitioning mirroring
+the original source files or \f(CW\*(C`balanced\*(C'\fR to specify partitioning
+into equally sized chunks (whenever possible).  Specifying \f(CW\*(C`none\*(C'\fR
+as an algorithm disables partitioning and streaming completely. The
+default value is \f(CW\*(C`balanced\*(C'\fR.
+.IP "\fB\-flto\-compression\-level=\fR\fIn\fR" 4
+.IX Item "-flto-compression-level=n"
+This option specifies the level of compression used for intermediate
+language written to \s-1LTO\s0 object files, and is only meaningful in
+conjunction with \s-1LTO\s0 mode (\fB\-flto\fR).  Valid
+values are 0 (no compression) to 9 (maximum compression).  Values
+outside this range are clamped to either 0 or 9.  If the option is not
+given, a default balanced compression setting is used.
+.IP "\fB\-flto\-report\fR" 4
+.IX Item "-flto-report"
+Prints a report with internal details on the workings of the link-time
+optimizer.  The contents of this report vary from version to version.
+It is meant to be useful to \s-1GCC\s0 developers when processing object
+files in \s-1LTO\s0 mode (via \fB\-flto\fR).
+.Sp
+Disabled by default.
+.IP "\fB\-fuse\-linker\-plugin\fR" 4
+.IX Item "-fuse-linker-plugin"
+Enables the use of a linker plugin during link-time optimization.  This
+option relies on the linker plugin support in linker that is available in gold
+or in \s-1GNU\s0 ld 2.21 or newer.
+.Sp
+This option enables the extraction of object files with \s-1GIMPLE\s0 bytecode out
+of library archives. This improves the quality of optimization by exposing
+more code to the link-time optimizer.  This information specifies what
+symbols can be accessed externally (by non-LTO object or during dynamic
+linking).  Resulting code quality improvements on binaries (and shared
+libraries that use hidden visibility) are similar to \f(CW\*(C`\-fwhole\-program\*(C'\fR.
+See \fB\-flto\fR for a description of the effect of this flag and how to
+use it.
+.Sp
+This option is enabled by default when \s-1LTO\s0 support in \s-1GCC\s0 is enabled
+and \s-1GCC\s0 was configured for use with
+a linker supporting plugins (\s-1GNU\s0 ld 2.21 or newer or gold).
+.IP "\fB\-fcompare\-elim\fR" 4
+.IX Item "-fcompare-elim"
+After register allocation and post-register allocation instruction splitting,
+identify arithmetic instructions that compute processor flags similar to a
+comparison operation based on that arithmetic.  If possible, eliminate the
+explicit comparison operation.
+.Sp
+This pass only applies to certain targets that cannot explicitly represent
+the comparison operation before register allocation is complete.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fcprop\-registers\fR" 4
+.IX Item "-fcprop-registers"
+After register allocation and post-register allocation instruction splitting,
+we perform a copy-propagation pass to try to reduce scheduling dependencies
+and occasionally eliminate the copy.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fprofile\-correction\fR" 4
+.IX Item "-fprofile-correction"
+Profiles collected using an instrumented binary for multi-threaded programs may
+be inconsistent due to missed counter updates. When this option is specified,
+\&\s-1GCC\s0 will use heuristics to correct or smooth out such inconsistencies. By
+default, \s-1GCC\s0 will emit an error message when an inconsistent profile is detected.
+.IP "\fB\-fprofile\-dir=\fR\fIpath\fR" 4
+.IX Item "-fprofile-dir=path"
+Set the directory to search for the profile data files in to \fIpath\fR.
+This option affects only the profile data generated by
+\&\fB\-fprofile\-generate\fR, \fB\-ftest\-coverage\fR, \fB\-fprofile\-arcs\fR
+and used by \fB\-fprofile\-use\fR and \fB\-fbranch\-probabilities\fR
+and its related options.
+By default, \s-1GCC\s0 will use the current directory as \fIpath\fR, thus the
+profile data file will appear in the same directory as the object file.
+.IP "\fB\-fprofile\-generate\fR" 4
+.IX Item "-fprofile-generate"
+.PD 0
+.IP "\fB\-fprofile\-generate=\fR\fIpath\fR" 4
+.IX Item "-fprofile-generate=path"
+.PD
+Enable options usually used for instrumenting application to produce
+profile useful for later recompilation with profile feedback based
+optimization.  You must use \fB\-fprofile\-generate\fR both when
+compiling and when linking your program.
+.Sp
+The following options are enabled: \f(CW\*(C`\-fprofile\-arcs\*(C'\fR, \f(CW\*(C`\-fprofile\-values\*(C'\fR, \f(CW\*(C`\-fvpt\*(C'\fR.
+.Sp
+If \fIpath\fR is specified, \s-1GCC\s0 will look at the \fIpath\fR to find
+the profile feedback data files. See \fB\-fprofile\-dir\fR.
+.IP "\fB\-fprofile\-use\fR" 4
+.IX Item "-fprofile-use"
+.PD 0
+.IP "\fB\-fprofile\-use=\fR\fIpath\fR" 4
+.IX Item "-fprofile-use=path"
+.PD
+Enable profile feedback directed optimizations, and optimizations
+generally profitable only with profile feedback available.
+.Sp
+The following options are enabled: \f(CW\*(C`\-fbranch\-probabilities\*(C'\fR, \f(CW\*(C`\-fvpt\*(C'\fR,
+\&\f(CW\*(C`\-funroll\-loops\*(C'\fR, \f(CW\*(C`\-fpeel\-loops\*(C'\fR, \f(CW\*(C`\-ftracer\*(C'\fR
+.Sp
+By default, \s-1GCC\s0 emits an error message if the feedback profiles do not
+match the source code.  This error can be turned into a warning by using
+\&\fB\-Wcoverage\-mismatch\fR.  Note this may result in poorly optimized
+code.
+.Sp
+If \fIpath\fR is specified, \s-1GCC\s0 will look at the \fIpath\fR to find
+the profile feedback data files. See \fB\-fprofile\-dir\fR.
+.PP
+The following options control compiler behavior regarding floating
+point arithmetic.  These options trade off between speed and
+correctness.  All must be specifically enabled.
+.IP "\fB\-ffloat\-store\fR" 4
+.IX Item "-ffloat-store"
+Do not store floating point variables in registers, and inhibit other
+options that might change whether a floating point value is taken from a
+register or memory.
+.Sp
+This option prevents undesirable excess precision on machines such as
+the 68000 where the floating registers (of the 68881) keep more
+precision than a \f(CW\*(C`double\*(C'\fR is supposed to have.  Similarly for the
+x86 architecture.  For most programs, the excess precision does only
+good, but a few programs rely on the precise definition of \s-1IEEE\s0 floating
+point.  Use \fB\-ffloat\-store\fR for such programs, after modifying
+them to store all pertinent intermediate computations into variables.
+.IP "\fB\-fexcess\-precision=\fR\fIstyle\fR" 4
+.IX Item "-fexcess-precision=style"
+This option allows further control over excess precision on machines
+where floating-point registers have more precision than the \s-1IEEE\s0
+\&\f(CW\*(C`float\*(C'\fR and \f(CW\*(C`double\*(C'\fR types and the processor does not
+support operations rounding to those types.  By default,
+\&\fB\-fexcess\-precision=fast\fR is in effect; this means that
+operations are carried out in the precision of the registers and that
+it is unpredictable when rounding to the types specified in the source
+code takes place.  When compiling C, if
+\&\fB\-fexcess\-precision=standard\fR is specified then excess
+precision will follow the rules specified in \s-1ISO\s0 C99; in particular,
+both casts and assignments cause values to be rounded to their
+semantic types (whereas \fB\-ffloat\-store\fR only affects
+assignments).  This option is enabled by default for C if a strict
+conformance option such as \fB\-std=c99\fR is used.
+.Sp
+\&\fB\-fexcess\-precision=standard\fR is not implemented for languages
+other than C, and has no effect if
+\&\fB\-funsafe\-math\-optimizations\fR or \fB\-ffast\-math\fR is
+specified.  On the x86, it also has no effect if \fB\-mfpmath=sse\fR
+or \fB\-mfpmath=sse+387\fR is specified; in the former case, \s-1IEEE\s0
+semantics apply without excess precision, and in the latter, rounding
+is unpredictable.
+.IP "\fB\-ffast\-math\fR" 4
+.IX Item "-ffast-math"
+Sets \fB\-fno\-math\-errno\fR, \fB\-funsafe\-math\-optimizations\fR,
+\&\fB\-ffinite\-math\-only\fR, \fB\-fno\-rounding\-math\fR,
+\&\fB\-fno\-signaling\-nans\fR and \fB\-fcx\-limited\-range\fR.
+.Sp
+This option causes the preprocessor macro \f(CW\*(C`_\|_FAST_MATH_\|_\*(C'\fR to be defined.
+.Sp
+This option is not turned on by any \fB\-O\fR option besides
+\&\fB\-Ofast\fR since it can result in incorrect output for programs
+which depend on an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications
+for math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+.IP "\fB\-fno\-math\-errno\fR" 4
+.IX Item "-fno-math-errno"
+Do not set \s-1ERRNO\s0 after calling math functions that are executed
+with a single instruction, e.g., sqrt.  A program that relies on
+\&\s-1IEEE\s0 exceptions for math error handling may want to use this flag
+for speed while maintaining \s-1IEEE\s0 arithmetic compatibility.
+.Sp
+This option is not turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+.Sp
+The default is \fB\-fmath\-errno\fR.
+.Sp
+On Darwin systems, the math library never sets \f(CW\*(C`errno\*(C'\fR.  There is
+therefore no reason for the compiler to consider the possibility that
+it might, and \fB\-fno\-math\-errno\fR is the default.
+.IP "\fB\-funsafe\-math\-optimizations\fR" 4
+.IX Item "-funsafe-math-optimizations"
+Allow optimizations for floating-point arithmetic that (a) assume
+that arguments and results are valid and (b) may violate \s-1IEEE\s0 or
+\&\s-1ANSI\s0 standards.  When used at link-time, it may include libraries
+or startup files that change the default \s-1FPU\s0 control word or other
+similar optimizations.
+.Sp
+This option is not turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+Enables \fB\-fno\-signed\-zeros\fR, \fB\-fno\-trapping\-math\fR,
+\&\fB\-fassociative\-math\fR and \fB\-freciprocal\-math\fR.
+.Sp
+The default is \fB\-fno\-unsafe\-math\-optimizations\fR.
+.IP "\fB\-fassociative\-math\fR" 4
+.IX Item "-fassociative-math"
+Allow re-association of operands in series of floating-point operations.
+This violates the \s-1ISO\s0 C and \*(C+ language standard by possibly changing
+computation result.  \s-1NOTE:\s0 re-ordering may change the sign of zero as
+well as ignore NaNs and inhibit or create underflow or overflow (and
+thus cannot be used on a code which relies on rounding behavior like
+\&\f(CW\*(C`(x + 2**52) \- 2**52)\*(C'\fR.  May also reorder floating-point comparisons
+and thus may not be used when ordered comparisons are required.
+This option requires that both \fB\-fno\-signed\-zeros\fR and
+\&\fB\-fno\-trapping\-math\fR be in effect.  Moreover, it doesn't make
+much sense with \fB\-frounding\-math\fR. For Fortran the option
+is automatically enabled when both \fB\-fno\-signed\-zeros\fR and
+\&\fB\-fno\-trapping\-math\fR are in effect.
+.Sp
+The default is \fB\-fno\-associative\-math\fR.
+.IP "\fB\-freciprocal\-math\fR" 4
+.IX Item "-freciprocal-math"
+Allow the reciprocal of a value to be used instead of dividing by
+the value if this enables optimizations.  For example \f(CW\*(C`x / y\*(C'\fR
+can be replaced with \f(CW\*(C`x * (1/y)\*(C'\fR which is useful if \f(CW\*(C`(1/y)\*(C'\fR
+is subject to common subexpression elimination.  Note that this loses
+precision and increases the number of flops operating on the value.
+.Sp
+The default is \fB\-fno\-reciprocal\-math\fR.
+.IP "\fB\-ffinite\-math\-only\fR" 4
+.IX Item "-ffinite-math-only"
+Allow optimizations for floating-point arithmetic that assume
+that arguments and results are not NaNs or +\-Infs.
+.Sp
+This option is not turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+.Sp
+The default is \fB\-fno\-finite\-math\-only\fR.
+.IP "\fB\-fno\-signed\-zeros\fR" 4
+.IX Item "-fno-signed-zeros"
+Allow optimizations for floating point arithmetic that ignore the
+signedness of zero.  \s-1IEEE\s0 arithmetic specifies the behavior of
+distinct +0.0 and \-0.0 values, which then prohibits simplification
+of expressions such as x+0.0 or 0.0*x (even with \fB\-ffinite\-math\-only\fR).
+This option implies that the sign of a zero result isn't significant.
+.Sp
+The default is \fB\-fsigned\-zeros\fR.
+.IP "\fB\-fno\-trapping\-math\fR" 4
+.IX Item "-fno-trapping-math"
+Compile code assuming that floating-point operations cannot generate
+user-visible traps.  These traps include division by zero, overflow,
+underflow, inexact result and invalid operation.  This option requires
+that \fB\-fno\-signaling\-nans\fR be in effect.  Setting this option may
+allow faster code if one relies on \*(L"non-stop\*(R" \s-1IEEE\s0 arithmetic, for example.
+.Sp
+This option should never be turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions.
+.Sp
+The default is \fB\-ftrapping\-math\fR.
+.IP "\fB\-frounding\-math\fR" 4
+.IX Item "-frounding-math"
+Disable transformations and optimizations that assume default floating
+point rounding behavior.  This is round-to-zero for all floating point
+to integer conversions, and round-to-nearest for all other arithmetic
+truncations.  This option should be specified for programs that change
+the \s-1FP\s0 rounding mode dynamically, or that may be executed with a
+non-default rounding mode.  This option disables constant folding of
+floating point expressions at compile-time (which may be affected by
+rounding mode) and arithmetic transformations that are unsafe in the
+presence of sign-dependent rounding modes.
+.Sp
+The default is \fB\-fno\-rounding\-math\fR.
+.Sp
+This option is experimental and does not currently guarantee to
+disable all \s-1GCC\s0 optimizations that are affected by rounding mode.
+Future versions of \s-1GCC\s0 may provide finer control of this setting
+using C99's \f(CW\*(C`FENV_ACCESS\*(C'\fR pragma.  This command line option
+will be used to specify the default state for \f(CW\*(C`FENV_ACCESS\*(C'\fR.
+.IP "\fB\-fsignaling\-nans\fR" 4
+.IX Item "-fsignaling-nans"
+Compile code assuming that \s-1IEEE\s0 signaling NaNs may generate user-visible
+traps during floating-point operations.  Setting this option disables
+optimizations that may change the number of exceptions visible with
+signaling NaNs.  This option implies \fB\-ftrapping\-math\fR.
+.Sp
+This option causes the preprocessor macro \f(CW\*(C`_\|_SUPPORT_SNAN_\|_\*(C'\fR to
+be defined.
+.Sp
+The default is \fB\-fno\-signaling\-nans\fR.
+.Sp
+This option is experimental and does not currently guarantee to
+disable all \s-1GCC\s0 optimizations that affect signaling NaN behavior.
+.IP "\fB\-fsingle\-precision\-constant\fR" 4
+.IX Item "-fsingle-precision-constant"
+Treat floating point constant as single precision constant instead of
+implicitly converting it to double precision constant.
+.IP "\fB\-fcx\-limited\-range\fR" 4
+.IX Item "-fcx-limited-range"
+When enabled, this option states that a range reduction step is not
+needed when performing complex division.  Also, there is no checking
+whether the result of a complex multiplication or division is \f(CW\*(C`NaN
++ I*NaN\*(C'\fR, with an attempt to rescue the situation in that case.  The
+default is \fB\-fno\-cx\-limited\-range\fR, but is enabled by
+\&\fB\-ffast\-math\fR.
+.Sp
+This option controls the default setting of the \s-1ISO\s0 C99
+\&\f(CW\*(C`CX_LIMITED_RANGE\*(C'\fR pragma.  Nevertheless, the option applies to
+all languages.
+.IP "\fB\-fcx\-fortran\-rules\fR" 4
+.IX Item "-fcx-fortran-rules"
+Complex multiplication and division follow Fortran rules.  Range
+reduction is done as part of complex division, but there is no checking
+whether the result of a complex multiplication or division is \f(CW\*(C`NaN
++ I*NaN\*(C'\fR, with an attempt to rescue the situation in that case.
+.Sp
+The default is \fB\-fno\-cx\-fortran\-rules\fR.
+.PP
+The following options control optimizations that may improve
+performance, but are not enabled by any \fB\-O\fR options.  This
+section includes experimental options that may produce broken code.
+.IP "\fB\-fbranch\-probabilities\fR" 4
+.IX Item "-fbranch-probabilities"
+After running a program compiled with \fB\-fprofile\-arcs\fR, you can compile it a second time using
+\&\fB\-fbranch\-probabilities\fR, to improve optimizations based on
+the number of times each branch was taken.  When the program
+compiled with \fB\-fprofile\-arcs\fR exits it saves arc execution
+counts to a file called \fI\fIsourcename\fI.gcda\fR for each source
+file.  The information in this data file is very dependent on the
+structure of the generated code, so you must use the same source code
+and the same optimization options for both compilations.
+.Sp
+With \fB\-fbranch\-probabilities\fR, \s-1GCC\s0 puts a
+\&\fB\s-1REG_BR_PROB\s0\fR note on each \fB\s-1JUMP_INSN\s0\fR and \fB\s-1CALL_INSN\s0\fR.
+These can be used to improve optimization.  Currently, they are only
+used in one place: in \fIreorg.c\fR, instead of guessing which path a
+branch is most likely to take, the \fB\s-1REG_BR_PROB\s0\fR values are used to
+exactly determine which path is taken more often.
+.IP "\fB\-fprofile\-values\fR" 4
+.IX Item "-fprofile-values"
+If combined with \fB\-fprofile\-arcs\fR, it adds code so that some
+data about values of expressions in the program is gathered.
+.Sp
+With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
+from profiling values of expressions for usage in optimizations.
+.Sp
+Enabled with \fB\-fprofile\-generate\fR and \fB\-fprofile\-use\fR.
+.IP "\fB\-fvpt\fR" 4
+.IX Item "-fvpt"
+If combined with \fB\-fprofile\-arcs\fR, it instructs the compiler to add
+a code to gather information about values of expressions.
+.Sp
+With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
+and actually performs the optimizations based on them.
+Currently the optimizations include specialization of division operation
+using the knowledge about the value of the denominator.
+.IP "\fB\-frename\-registers\fR" 4
+.IX Item "-frename-registers"
+Attempt to avoid false dependencies in scheduled code by making use
+of registers left over after register allocation.  This optimization
+will most benefit processors with lots of registers.  Depending on the
+debug information format adopted by the target, however, it can
+make debugging impossible, since variables will no longer stay in
+a \*(L"home register\*(R".
+.Sp
+Enabled by default with \fB\-funroll\-loops\fR and \fB\-fpeel\-loops\fR.
+.IP "\fB\-ftracer\fR" 4
+.IX Item "-ftracer"
+Perform tail duplication to enlarge superblock size.  This transformation
+simplifies the control flow of the function allowing other optimizations to do
+better job.
+.Sp
+Enabled with \fB\-fprofile\-use\fR.
+.IP "\fB\-funroll\-loops\fR" 4
+.IX Item "-funroll-loops"
+Unroll loops whose number of iterations can be determined at compile time or
+upon entry to the loop.  \fB\-funroll\-loops\fR implies
+\&\fB\-frerun\-cse\-after\-loop\fR, \fB\-fweb\fR and \fB\-frename\-registers\fR.
+It also turns on complete loop peeling (i.e. complete removal of loops with
+small constant number of iterations).  This option makes code larger, and may
+or may not make it run faster.
+.Sp
+Enabled with \fB\-fprofile\-use\fR.
+.IP "\fB\-funroll\-all\-loops\fR" 4
+.IX Item "-funroll-all-loops"
+Unroll all loops, even if their number of iterations is uncertain when
+the loop is entered.  This usually makes programs run more slowly.
+\&\fB\-funroll\-all\-loops\fR implies the same options as
+\&\fB\-funroll\-loops\fR.
+.IP "\fB\-fpeel\-loops\fR" 4
+.IX Item "-fpeel-loops"
+Peels the loops for that there is enough information that they do not
+roll much (from profile feedback).  It also turns on complete loop peeling
+(i.e. complete removal of loops with small constant number of iterations).
+.Sp
+Enabled with \fB\-fprofile\-use\fR.
+.IP "\fB\-fmove\-loop\-invariants\fR" 4
+.IX Item "-fmove-loop-invariants"
+Enables the loop invariant motion pass in the \s-1RTL\s0 loop optimizer.  Enabled
+at level \fB\-O1\fR
+.IP "\fB\-funswitch\-loops\fR" 4
+.IX Item "-funswitch-loops"
+Move branches with loop invariant conditions out of the loop, with duplicates
+of the loop on both branches (modified according to result of the condition).
+.IP "\fB\-ffunction\-sections\fR" 4
+.IX Item "-ffunction-sections"
+.PD 0
+.IP "\fB\-fdata\-sections\fR" 4
+.IX Item "-fdata-sections"
+.PD
+Place each function or data item into its own section in the output
+file if the target supports arbitrary sections.  The name of the
+function or the name of the data item determines the section's name
+in the output file.
+.Sp
+Use these options on systems where the linker can perform optimizations
+to improve locality of reference in the instruction space.  Most systems
+using the \s-1ELF\s0 object format and \s-1SPARC\s0 processors running Solaris 2 have
+linkers with such optimizations.  \s-1AIX\s0 may have these optimizations in
+the future.
+.Sp
+Only use these options when there are significant benefits from doing
+so.  When you specify these options, the assembler and linker will
+create larger object and executable files and will also be slower.
+You will not be able to use \f(CW\*(C`gprof\*(C'\fR on all systems if you
+specify this option and you may have problems with debugging if
+you specify both this option and \fB\-g\fR.
+.IP "\fB\-fbranch\-target\-load\-optimize\fR" 4
+.IX Item "-fbranch-target-load-optimize"
+Perform branch target register load optimization before prologue / epilogue
+threading.
+The use of target registers can typically be exposed only during reload,
+thus hoisting loads out of loops and doing inter-block scheduling needs
+a separate optimization pass.
+.IP "\fB\-fbranch\-target\-load\-optimize2\fR" 4
+.IX Item "-fbranch-target-load-optimize2"
+Perform branch target register load optimization after prologue / epilogue
+threading.
+.IP "\fB\-fbtr\-bb\-exclusive\fR" 4
+.IX Item "-fbtr-bb-exclusive"
+When performing branch target register load optimization, don't reuse
+branch target registers in within any basic block.
+.IP "\fB\-fstack\-protector\fR" 4
+.IX Item "-fstack-protector"
+Emit extra code to check for buffer overflows, such as stack smashing
+attacks.  This is done by adding a guard variable to functions with
+vulnerable objects.  This includes functions that call alloca, and
+functions with buffers larger than 8 bytes.  The guards are initialized
+when a function is entered and then checked when the function exits.
+If a guard check fails, an error message is printed and the program exits.
+.IP "\fB\-fstack\-protector\-all\fR" 4
+.IX Item "-fstack-protector-all"
+Like \fB\-fstack\-protector\fR except that all functions are protected.
+.IP "\fB\-fsection\-anchors\fR" 4
+.IX Item "-fsection-anchors"
+Try to reduce the number of symbolic address calculations by using
+shared \*(L"anchor\*(R" symbols to address nearby objects.  This transformation
+can help to reduce the number of \s-1GOT\s0 entries and \s-1GOT\s0 accesses on some
+targets.
+.Sp
+For example, the implementation of the following function \f(CW\*(C`foo\*(C'\fR:
+.Sp
+.Vb 2
+\&        static int a, b, c;
+\&        int foo (void) { return a + b + c; }
+.Ve
+.Sp
+would usually calculate the addresses of all three variables, but if you
+compile it with \fB\-fsection\-anchors\fR, it will access the variables
+from a common anchor point instead.  The effect is similar to the
+following pseudocode (which isn't valid C):
+.Sp
+.Vb 5
+\&        int foo (void)
+\&        {
+\&          register int *xr = &x;
+\&          return xr[&a \- &x] + xr[&b \- &x] + xr[&c \- &x];
+\&        }
+.Ve
+.Sp
+Not all targets support this option.
+.IP "\fB\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR" 4
+.IX Item "--param name=value"
+In some places, \s-1GCC\s0 uses various constants to control the amount of
+optimization that is done.  For example, \s-1GCC\s0 will not inline functions
+that contain more that a certain number of instructions.  You can
+control some of these constants on the command-line using the
+\&\fB\-\-param\fR option.
+.Sp
+The names of specific parameters, and the meaning of the values, are
+tied to the internals of the compiler, and are subject to change
+without notice in future releases.
+.Sp
+In each case, the \fIvalue\fR is an integer.  The allowable choices for
+\&\fIname\fR are given in the following table:
+.RS 4
+.IP "\fBstruct-reorg-cold-struct-ratio\fR" 4
+.IX Item "struct-reorg-cold-struct-ratio"
+The threshold ratio (as a percentage) between a structure frequency
+and the frequency of the hottest structure in the program.  This parameter
+is used by struct-reorg optimization enabled by \fB\-fipa\-struct\-reorg\fR.
+We say that if the ratio of a structure frequency, calculated by profiling,
+to the hottest structure frequency in the program is less than this
+parameter, then structure reorganization is not applied to this structure.
+The default is 10.
+.IP "\fBpredictable-branch-outcome\fR" 4
+.IX Item "predictable-branch-outcome"
+When branch is predicted to be taken with probability lower than this threshold
+(in percent), then it is considered well predictable. The default is 10.
+.IP "\fBmax-crossjump-edges\fR" 4
+.IX Item "max-crossjump-edges"
+The maximum number of incoming edges to consider for crossjumping.
+The algorithm used by \fB\-fcrossjumping\fR is O(N^2) in
+the number of edges incoming to each block.  Increasing values mean
+more aggressive optimization, making the compile time increase with
+probably small improvement in executable size.
+.IP "\fBmin-crossjump-insns\fR" 4
+.IX Item "min-crossjump-insns"
+The minimum number of instructions which must be matched at the end
+of two blocks before crossjumping will be performed on them.  This
+value is ignored in the case where all instructions in the block being
+crossjumped from are matched.  The default value is 5.
+.IP "\fBmax-grow-copy-bb-insns\fR" 4
+.IX Item "max-grow-copy-bb-insns"
+The maximum code size expansion factor when copying basic blocks
+instead of jumping.  The expansion is relative to a jump instruction.
+The default value is 8.
+.IP "\fBmax-goto-duplication-insns\fR" 4
+.IX Item "max-goto-duplication-insns"
+The maximum number of instructions to duplicate to a block that jumps
+to a computed goto.  To avoid O(N^2) behavior in a number of
+passes, \s-1GCC\s0 factors computed gotos early in the compilation process,
+and unfactors them as late as possible.  Only computed jumps at the
+end of a basic blocks with no more than max-goto-duplication-insns are
+unfactored.  The default value is 8.
+.IP "\fBmax-delay-slot-insn-search\fR" 4
+.IX Item "max-delay-slot-insn-search"
+The maximum number of instructions to consider when looking for an
+instruction to fill a delay slot.  If more than this arbitrary number of
+instructions is searched, the time savings from filling the delay slot
+will be minimal so stop searching.  Increasing values mean more
+aggressive optimization, making the compile time increase with probably
+small improvement in executable run time.
+.IP "\fBmax-delay-slot-live-search\fR" 4
+.IX Item "max-delay-slot-live-search"
+When trying to fill delay slots, the maximum number of instructions to
+consider when searching for a block with valid live register
+information.  Increasing this arbitrarily chosen value means more
+aggressive optimization, increasing the compile time.  This parameter
+should be removed when the delay slot code is rewritten to maintain the
+control-flow graph.
+.IP "\fBmax-gcse-memory\fR" 4
+.IX Item "max-gcse-memory"
+The approximate maximum amount of memory that will be allocated in
+order to perform the global common subexpression elimination
+optimization.  If more memory than specified is required, the
+optimization will not be done.
+.IP "\fBmax-gcse-insertion-ratio\fR" 4
+.IX Item "max-gcse-insertion-ratio"
+If the ratio of expression insertions to deletions is larger than this value
+for any expression, then \s-1RTL\s0 \s-1PRE\s0 will insert or remove the expression and thus
+leave partially redundant computations in the instruction stream.  The default value is 20.
+.IP "\fBmax-pending-list-length\fR" 4
+.IX Item "max-pending-list-length"
+The maximum number of pending dependencies scheduling will allow
+before flushing the current state and starting over.  Large functions
+with few branches or calls can create excessively large lists which
+needlessly consume memory and resources.
+.IP "\fBmax-inline-insns-single\fR" 4
+.IX Item "max-inline-insns-single"
+Several parameters control the tree inliner used in gcc.
+This number sets the maximum number of instructions (counted in \s-1GCC\s0's
+internal representation) in a single function that the tree inliner
+will consider for inlining.  This only affects functions declared
+inline and methods implemented in a class declaration (\*(C+).
+The default value is 400.
+.IP "\fBmax-inline-insns-auto\fR" 4
+.IX Item "max-inline-insns-auto"
+When you use \fB\-finline\-functions\fR (included in \fB\-O3\fR),
+a lot of functions that would otherwise not be considered for inlining
+by the compiler will be investigated.  To those functions, a different
+(more restrictive) limit compared to functions declared inline can
+be applied.
+The default value is 40.
+.IP "\fBlarge-function-insns\fR" 4
+.IX Item "large-function-insns"
+The limit specifying really large functions.  For functions larger than this
+limit after inlining, inlining is constrained by
+\&\fB\-\-param large-function-growth\fR.  This parameter is useful primarily
+to avoid extreme compilation time caused by non-linear algorithms used by the
+backend.
+The default value is 2700.
+.IP "\fBlarge-function-growth\fR" 4
+.IX Item "large-function-growth"
+Specifies maximal growth of large function caused by inlining in percents.
+The default value is 100 which limits large function growth to 2.0 times
+the original size.
+.IP "\fBlarge-unit-insns\fR" 4
+.IX Item "large-unit-insns"
+The limit specifying large translation unit.  Growth caused by inlining of
+units larger than this limit is limited by \fB\-\-param inline-unit-growth\fR.
+For small units this might be too tight (consider unit consisting of function A
+that is inline and B that just calls A three time.  If B is small relative to
+A, the growth of unit is 300\e% and yet such inlining is very sane.  For very
+large units consisting of small inlineable functions however the overall unit
+growth limit is needed to avoid exponential explosion of code size.  Thus for
+smaller units, the size is increased to \fB\-\-param large-unit-insns\fR
+before applying \fB\-\-param inline-unit-growth\fR.  The default is 10000
+.IP "\fBinline-unit-growth\fR" 4
+.IX Item "inline-unit-growth"
+Specifies maximal overall growth of the compilation unit caused by inlining.
+The default value is 30 which limits unit growth to 1.3 times the original
+size.
+.IP "\fBipcp-unit-growth\fR" 4
+.IX Item "ipcp-unit-growth"
+Specifies maximal overall growth of the compilation unit caused by
+interprocedural constant propagation.  The default value is 10 which limits
+unit growth to 1.1 times the original size.
+.IP "\fBlarge-stack-frame\fR" 4
+.IX Item "large-stack-frame"
+The limit specifying large stack frames.  While inlining the algorithm is trying
+to not grow past this limit too much.  Default value is 256 bytes.
+.IP "\fBlarge-stack-frame-growth\fR" 4
+.IX Item "large-stack-frame-growth"
+Specifies maximal growth of large stack frames caused by inlining in percents.
+The default value is 1000 which limits large stack frame growth to 11 times
+the original size.
+.IP "\fBmax-inline-insns-recursive\fR" 4
+.IX Item "max-inline-insns-recursive"
+.PD 0
+.IP "\fBmax-inline-insns-recursive-auto\fR" 4
+.IX Item "max-inline-insns-recursive-auto"
+.PD
+Specifies maximum number of instructions out-of-line copy of self recursive inline
+function can grow into by performing recursive inlining.
+.Sp
+For functions declared inline \fB\-\-param max-inline-insns-recursive\fR is
+taken into account.  For function not declared inline, recursive inlining
+happens only when \fB\-finline\-functions\fR (included in \fB\-O3\fR) is
+enabled and \fB\-\-param max-inline-insns-recursive-auto\fR is used.  The
+default value is 450.
+.IP "\fBmax-inline-recursive-depth\fR" 4
+.IX Item "max-inline-recursive-depth"
+.PD 0
+.IP "\fBmax-inline-recursive-depth-auto\fR" 4
+.IX Item "max-inline-recursive-depth-auto"
+.PD
+Specifies maximum recursion depth used by the recursive inlining.
+.Sp
+For functions declared inline \fB\-\-param max-inline-recursive-depth\fR is
+taken into account.  For function not declared inline, recursive inlining
+happens only when \fB\-finline\-functions\fR (included in \fB\-O3\fR) is
+enabled and \fB\-\-param max-inline-recursive-depth-auto\fR is used.  The
+default value is 8.
+.IP "\fBmin-inline-recursive-probability\fR" 4
+.IX Item "min-inline-recursive-probability"
+Recursive inlining is profitable only for function having deep recursion
+in average and can hurt for function having little recursion depth by
+increasing the prologue size or complexity of function body to other
+optimizers.
+.Sp
+When profile feedback is available (see \fB\-fprofile\-generate\fR) the actual
+recursion depth can be guessed from probability that function will recurse via
+given call expression.  This parameter limits inlining only to call expression
+whose probability exceeds given threshold (in percents).  The default value is
+10.
+.IP "\fBearly-inlining-insns\fR" 4
+.IX Item "early-inlining-insns"
+Specify growth that early inliner can make.  In effect it increases amount of
+inlining for code having large abstraction penalty.  The default value is 10.
+.IP "\fBmax-early-inliner-iterations\fR" 4
+.IX Item "max-early-inliner-iterations"
+.PD 0
+.IP "\fBmax-early-inliner-iterations\fR" 4
+.IX Item "max-early-inliner-iterations"
+.PD
+Limit of iterations of early inliner.  This basically bounds number of nested
+indirect calls early inliner can resolve.  Deeper chains are still handled by
+late inlining.
+.IP "\fBcomdat-sharing-probability\fR" 4
+.IX Item "comdat-sharing-probability"
+.PD 0
+.IP "\fBcomdat-sharing-probability\fR" 4
+.IX Item "comdat-sharing-probability"
+.PD
+Probability (in percent) that \*(C+ inline function with comdat visibility
+will be shared across multiple compilation units.  The default value is 20.
+.IP "\fBmin-vect-loop-bound\fR" 4
+.IX Item "min-vect-loop-bound"
+The minimum number of iterations under which a loop will not get vectorized
+when \fB\-ftree\-vectorize\fR is used.  The number of iterations after
+vectorization needs to be greater than the value specified by this option
+to allow vectorization.  The default value is 0.
+.IP "\fBgcse-cost-distance-ratio\fR" 4
+.IX Item "gcse-cost-distance-ratio"
+Scaling factor in calculation of maximum distance an expression
+can be moved by \s-1GCSE\s0 optimizations.  This is currently supported only in the
+code hoisting pass.  The bigger the ratio, the more aggressive code hoisting
+will be with simple expressions, i.e., the expressions which have cost
+less than \fBgcse-unrestricted-cost\fR.  Specifying 0 will disable
+hoisting of simple expressions.  The default value is 10.
+.IP "\fBgcse-unrestricted-cost\fR" 4
+.IX Item "gcse-unrestricted-cost"
+Cost, roughly measured as the cost of a single typical machine
+instruction, at which \s-1GCSE\s0 optimizations will not constrain
+the distance an expression can travel.  This is currently
+supported only in the code hoisting pass.  The lesser the cost,
+the more aggressive code hoisting will be.  Specifying 0 will
+allow all expressions to travel unrestricted distances.
+The default value is 3.
+.IP "\fBmax-hoist-depth\fR" 4
+.IX Item "max-hoist-depth"
+The depth of search in the dominator tree for expressions to hoist.
+This is used to avoid quadratic behavior in hoisting algorithm.
+The value of 0 will avoid limiting the search, but may slow down compilation
+of huge functions.  The default value is 30.
+.IP "\fBmax-unrolled-insns\fR" 4
+.IX Item "max-unrolled-insns"
+The maximum number of instructions that a loop should have if that loop
+is unrolled, and if the loop is unrolled, it determines how many times
+the loop code is unrolled.
+.IP "\fBmax-average-unrolled-insns\fR" 4
+.IX Item "max-average-unrolled-insns"
+The maximum number of instructions biased by probabilities of their execution
+that a loop should have if that loop is unrolled, and if the loop is unrolled,
+it determines how many times the loop code is unrolled.
+.IP "\fBmax-unroll-times\fR" 4
+.IX Item "max-unroll-times"
+The maximum number of unrollings of a single loop.
+.IP "\fBmax-peeled-insns\fR" 4
+.IX Item "max-peeled-insns"
+The maximum number of instructions that a loop should have if that loop
+is peeled, and if the loop is peeled, it determines how many times
+the loop code is peeled.
+.IP "\fBmax-peel-times\fR" 4
+.IX Item "max-peel-times"
+The maximum number of peelings of a single loop.
+.IP "\fBmax-completely-peeled-insns\fR" 4
+.IX Item "max-completely-peeled-insns"
+The maximum number of insns of a completely peeled loop.
+.IP "\fBmax-completely-peel-times\fR" 4
+.IX Item "max-completely-peel-times"
+The maximum number of iterations of a loop to be suitable for complete peeling.
+.IP "\fBmax-completely-peel-loop-nest-depth\fR" 4
+.IX Item "max-completely-peel-loop-nest-depth"
+The maximum depth of a loop nest suitable for complete peeling.
+.IP "\fBmax-unswitch-insns\fR" 4
+.IX Item "max-unswitch-insns"
+The maximum number of insns of an unswitched loop.
+.IP "\fBmax-unswitch-level\fR" 4
+.IX Item "max-unswitch-level"
+The maximum number of branches unswitched in a single loop.
+.IP "\fBlim-expensive\fR" 4
+.IX Item "lim-expensive"
+The minimum cost of an expensive expression in the loop invariant motion.
+.IP "\fBiv-consider-all-candidates-bound\fR" 4
+.IX Item "iv-consider-all-candidates-bound"
+Bound on number of candidates for induction variables below that
+all candidates are considered for each use in induction variable
+optimizations.  Only the most relevant candidates are considered
+if there are more candidates, to avoid quadratic time complexity.
+.IP "\fBiv-max-considered-uses\fR" 4
+.IX Item "iv-max-considered-uses"
+The induction variable optimizations give up on loops that contain more
+induction variable uses.
+.IP "\fBiv-always-prune-cand-set-bound\fR" 4
+.IX Item "iv-always-prune-cand-set-bound"
+If number of candidates in the set is smaller than this value,
+we always try to remove unnecessary ivs from the set during its
+optimization when a new iv is added to the set.
+.IP "\fBscev-max-expr-size\fR" 4
+.IX Item "scev-max-expr-size"
+Bound on size of expressions used in the scalar evolutions analyzer.
+Large expressions slow the analyzer.
+.IP "\fBscev-max-expr-complexity\fR" 4
+.IX Item "scev-max-expr-complexity"
+Bound on the complexity of the expressions in the scalar evolutions analyzer.
+Complex expressions slow the analyzer.
+.IP "\fBomega-max-vars\fR" 4
+.IX Item "omega-max-vars"
+The maximum number of variables in an Omega constraint system.
+The default value is 128.
+.IP "\fBomega-max-geqs\fR" 4
+.IX Item "omega-max-geqs"
+The maximum number of inequalities in an Omega constraint system.
+The default value is 256.
+.IP "\fBomega-max-eqs\fR" 4
+.IX Item "omega-max-eqs"
+The maximum number of equalities in an Omega constraint system.
+The default value is 128.
+.IP "\fBomega-max-wild-cards\fR" 4
+.IX Item "omega-max-wild-cards"
+The maximum number of wildcard variables that the Omega solver will
+be able to insert.  The default value is 18.
+.IP "\fBomega-hash-table-size\fR" 4
+.IX Item "omega-hash-table-size"
+The size of the hash table in the Omega solver.  The default value is
+550.
+.IP "\fBomega-max-keys\fR" 4
+.IX Item "omega-max-keys"
+The maximal number of keys used by the Omega solver.  The default
+value is 500.
+.IP "\fBomega-eliminate-redundant-constraints\fR" 4
+.IX Item "omega-eliminate-redundant-constraints"
+When set to 1, use expensive methods to eliminate all redundant
+constraints.  The default value is 0.
+.IP "\fBvect-max-version-for-alignment-checks\fR" 4
+.IX Item "vect-max-version-for-alignment-checks"
+The maximum number of runtime checks that can be performed when
+doing loop versioning for alignment in the vectorizer.  See option
+ftree-vect-loop-version for more information.
+.IP "\fBvect-max-version-for-alias-checks\fR" 4
+.IX Item "vect-max-version-for-alias-checks"
+The maximum number of runtime checks that can be performed when
+doing loop versioning for alias in the vectorizer.  See option
+ftree-vect-loop-version for more information.
+.IP "\fBmax-iterations-to-track\fR" 4
+.IX Item "max-iterations-to-track"
+The maximum number of iterations of a loop the brute force algorithm
+for analysis of # of iterations of the loop tries to evaluate.
+.IP "\fBhot-bb-count-fraction\fR" 4
+.IX Item "hot-bb-count-fraction"
+Select fraction of the maximal count of repetitions of basic block in program
+given basic block needs to have to be considered hot.
+.IP "\fBhot-bb-frequency-fraction\fR" 4
+.IX Item "hot-bb-frequency-fraction"
+Select fraction of the entry block frequency of executions of basic block in
+function given basic block needs to have to be considered hot
+.IP "\fBmax-predicted-iterations\fR" 4
+.IX Item "max-predicted-iterations"
+The maximum number of loop iterations we predict statically.  This is useful
+in cases where function contain single loop with known bound and other loop
+with unknown.  We predict the known number of iterations correctly, while
+the unknown number of iterations average to roughly 10.  This means that the
+loop without bounds would appear artificially cold relative to the other one.
+.IP "\fBalign-threshold\fR" 4
+.IX Item "align-threshold"
+Select fraction of the maximal frequency of executions of basic block in
+function given basic block will get aligned.
+.IP "\fBalign-loop-iterations\fR" 4
+.IX Item "align-loop-iterations"
+A loop expected to iterate at lest the selected number of iterations will get
+aligned.
+.IP "\fBtracer-dynamic-coverage\fR" 4
+.IX Item "tracer-dynamic-coverage"
+.PD 0
+.IP "\fBtracer-dynamic-coverage-feedback\fR" 4
+.IX Item "tracer-dynamic-coverage-feedback"
+.PD
+This value is used to limit superblock formation once the given percentage of
+executed instructions is covered.  This limits unnecessary code size
+expansion.
+.Sp
+The \fBtracer-dynamic-coverage-feedback\fR is used only when profile
+feedback is available.  The real profiles (as opposed to statically estimated
+ones) are much less balanced allowing the threshold to be larger value.
+.IP "\fBtracer-max-code-growth\fR" 4
+.IX Item "tracer-max-code-growth"
+Stop tail duplication once code growth has reached given percentage.  This is
+rather hokey argument, as most of the duplicates will be eliminated later in
+cross jumping, so it may be set to much higher values than is the desired code
+growth.
+.IP "\fBtracer-min-branch-ratio\fR" 4
+.IX Item "tracer-min-branch-ratio"
+Stop reverse growth when the reverse probability of best edge is less than this
+threshold (in percent).
+.IP "\fBtracer-min-branch-ratio\fR" 4
+.IX Item "tracer-min-branch-ratio"
+.PD 0
+.IP "\fBtracer-min-branch-ratio-feedback\fR" 4
+.IX Item "tracer-min-branch-ratio-feedback"
+.PD
+Stop forward growth if the best edge do have probability lower than this
+threshold.
+.Sp
+Similarly to \fBtracer-dynamic-coverage\fR two values are present, one for
+compilation for profile feedback and one for compilation without.  The value
+for compilation with profile feedback needs to be more conservative (higher) in
+order to make tracer effective.
+.IP "\fBmax-cse-path-length\fR" 4
+.IX Item "max-cse-path-length"
+Maximum number of basic blocks on path that cse considers.  The default is 10.
+.IP "\fBmax-cse-insns\fR" 4
+.IX Item "max-cse-insns"
+The maximum instructions \s-1CSE\s0 process before flushing. The default is 1000.
+.IP "\fBggc-min-expand\fR" 4
+.IX Item "ggc-min-expand"
+\&\s-1GCC\s0 uses a garbage collector to manage its own memory allocation.  This
+parameter specifies the minimum percentage by which the garbage
+collector's heap should be allowed to expand between collections.
+Tuning this may improve compilation speed; it has no effect on code
+generation.
+.Sp
+The default is 30% + 70% * (\s-1RAM/1GB\s0) with an upper bound of 100% when
+\&\s-1RAM\s0 >= 1GB.  If \f(CW\*(C`getrlimit\*(C'\fR is available, the notion of \*(L"\s-1RAM\s0\*(R" is
+the smallest of actual \s-1RAM\s0 and \f(CW\*(C`RLIMIT_DATA\*(C'\fR or \f(CW\*(C`RLIMIT_AS\*(C'\fR.  If
+\&\s-1GCC\s0 is not able to calculate \s-1RAM\s0 on a particular platform, the lower
+bound of 30% is used.  Setting this parameter and
+\&\fBggc-min-heapsize\fR to zero causes a full collection to occur at
+every opportunity.  This is extremely slow, but can be useful for
+debugging.
+.IP "\fBggc-min-heapsize\fR" 4
+.IX Item "ggc-min-heapsize"
+Minimum size of the garbage collector's heap before it begins bothering
+to collect garbage.  The first collection occurs after the heap expands
+by \fBggc-min-expand\fR% beyond \fBggc-min-heapsize\fR.  Again,
+tuning this may improve compilation speed, and has no effect on code
+generation.
+.Sp
+The default is the smaller of \s-1RAM/8\s0, \s-1RLIMIT_RSS\s0, or a limit which
+tries to ensure that \s-1RLIMIT_DATA\s0 or \s-1RLIMIT_AS\s0 are not exceeded, but
+with a lower bound of 4096 (four megabytes) and an upper bound of
+131072 (128 megabytes).  If \s-1GCC\s0 is not able to calculate \s-1RAM\s0 on a
+particular platform, the lower bound is used.  Setting this parameter
+very large effectively disables garbage collection.  Setting this
+parameter and \fBggc-min-expand\fR to zero causes a full collection
+to occur at every opportunity.
+.IP "\fBmax-reload-search-insns\fR" 4
+.IX Item "max-reload-search-insns"
+The maximum number of instruction reload should look backward for equivalent
+register.  Increasing values mean more aggressive optimization, making the
+compile time increase with probably slightly better performance.  The default
+value is 100.
+.IP "\fBmax-cselib-memory-locations\fR" 4
+.IX Item "max-cselib-memory-locations"
+The maximum number of memory locations cselib should take into account.
+Increasing values mean more aggressive optimization, making the compile time
+increase with probably slightly better performance.  The default value is 500.
+.IP "\fBreorder-blocks-duplicate\fR" 4
+.IX Item "reorder-blocks-duplicate"
+.PD 0
+.IP "\fBreorder-blocks-duplicate-feedback\fR" 4
+.IX Item "reorder-blocks-duplicate-feedback"
+.PD
+Used by basic block reordering pass to decide whether to use unconditional
+branch or duplicate the code on its destination.  Code is duplicated when its
+estimated size is smaller than this value multiplied by the estimated size of
+unconditional jump in the hot spots of the program.
+.Sp
+The \fBreorder-block-duplicate-feedback\fR is used only when profile
+feedback is available and may be set to higher values than
+\&\fBreorder-block-duplicate\fR since information about the hot spots is more
+accurate.
+.IP "\fBmax-sched-ready-insns\fR" 4
+.IX Item "max-sched-ready-insns"
+The maximum number of instructions ready to be issued the scheduler should
+consider at any given time during the first scheduling pass.  Increasing
+values mean more thorough searches, making the compilation time increase
+with probably little benefit.  The default value is 100.
+.IP "\fBmax-sched-region-blocks\fR" 4
+.IX Item "max-sched-region-blocks"
+The maximum number of blocks in a region to be considered for
+interblock scheduling.  The default value is 10.
+.IP "\fBmax-pipeline-region-blocks\fR" 4
+.IX Item "max-pipeline-region-blocks"
+The maximum number of blocks in a region to be considered for
+pipelining in the selective scheduler.  The default value is 15.
+.IP "\fBmax-sched-region-insns\fR" 4
+.IX Item "max-sched-region-insns"
+The maximum number of insns in a region to be considered for
+interblock scheduling.  The default value is 100.
+.IP "\fBmax-pipeline-region-insns\fR" 4
+.IX Item "max-pipeline-region-insns"
+The maximum number of insns in a region to be considered for
+pipelining in the selective scheduler.  The default value is 200.
+.IP "\fBmin-spec-prob\fR" 4
+.IX Item "min-spec-prob"
+The minimum probability (in percents) of reaching a source block
+for interblock speculative scheduling.  The default value is 40.
+.IP "\fBmax-sched-extend-regions-iters\fR" 4
+.IX Item "max-sched-extend-regions-iters"
+The maximum number of iterations through \s-1CFG\s0 to extend regions.
+0 \- disable region extension,
+N \- do at most N iterations.
+The default value is 0.
+.IP "\fBmax-sched-insn-conflict-delay\fR" 4
+.IX Item "max-sched-insn-conflict-delay"
+The maximum conflict delay for an insn to be considered for speculative motion.
+The default value is 3.
+.IP "\fBsched-spec-prob-cutoff\fR" 4
+.IX Item "sched-spec-prob-cutoff"
+The minimal probability of speculation success (in percents), so that
+speculative insn will be scheduled.
+The default value is 40.
+.IP "\fBsched-mem-true-dep-cost\fR" 4
+.IX Item "sched-mem-true-dep-cost"
+Minimal distance (in \s-1CPU\s0 cycles) between store and load targeting same
+memory locations.  The default value is 1.
+.IP "\fBselsched-max-lookahead\fR" 4
+.IX Item "selsched-max-lookahead"
+The maximum size of the lookahead window of selective scheduling.  It is a
+depth of search for available instructions.
+The default value is 50.
+.IP "\fBselsched-max-sched-times\fR" 4
+.IX Item "selsched-max-sched-times"
+The maximum number of times that an instruction will be scheduled during
+selective scheduling.  This is the limit on the number of iterations
+through which the instruction may be pipelined.  The default value is 2.
+.IP "\fBselsched-max-insns-to-rename\fR" 4
+.IX Item "selsched-max-insns-to-rename"
+The maximum number of best instructions in the ready list that are considered
+for renaming in the selective scheduler.  The default value is 2.
+.IP "\fBmax-last-value-rtl\fR" 4
+.IX Item "max-last-value-rtl"
+The maximum size measured as number of RTLs that can be recorded in an expression
+in combiner for a pseudo register as last known value of that register.  The default
+is 10000.
+.IP "\fBinteger-share-limit\fR" 4
+.IX Item "integer-share-limit"
+Small integer constants can use a shared data structure, reducing the
+compiler's memory usage and increasing its speed.  This sets the maximum
+value of a shared integer constant.  The default value is 256.
+.IP "\fBmin-virtual-mappings\fR" 4
+.IX Item "min-virtual-mappings"
+Specifies the minimum number of virtual mappings in the incremental
+\&\s-1SSA\s0 updater that should be registered to trigger the virtual mappings
+heuristic defined by virtual-mappings-ratio.  The default value is
+100.
+.IP "\fBvirtual-mappings-ratio\fR" 4
+.IX Item "virtual-mappings-ratio"
+If the number of virtual mappings is virtual-mappings-ratio bigger
+than the number of virtual symbols to be updated, then the incremental
+\&\s-1SSA\s0 updater switches to a full update for those symbols.  The default
+ratio is 3.
+.IP "\fBssp-buffer-size\fR" 4
+.IX Item "ssp-buffer-size"
+The minimum size of buffers (i.e. arrays) that will receive stack smashing
+protection when \fB\-fstack\-protection\fR is used.
+.IP "\fBmax-jump-thread-duplication-stmts\fR" 4
+.IX Item "max-jump-thread-duplication-stmts"
+Maximum number of statements allowed in a block that needs to be
+duplicated when threading jumps.
+.IP "\fBmax-fields-for-field-sensitive\fR" 4
+.IX Item "max-fields-for-field-sensitive"
+Maximum number of fields in a structure we will treat in
+a field sensitive manner during pointer analysis.  The default is zero
+for \-O0, and \-O1 and 100 for \-Os, \-O2, and \-O3.
+.IP "\fBprefetch-latency\fR" 4
+.IX Item "prefetch-latency"
+Estimate on average number of instructions that are executed before
+prefetch finishes.  The distance we prefetch ahead is proportional
+to this constant.  Increasing this number may also lead to less
+streams being prefetched (see \fBsimultaneous-prefetches\fR).
+.IP "\fBsimultaneous-prefetches\fR" 4
+.IX Item "simultaneous-prefetches"
+Maximum number of prefetches that can run at the same time.
+.IP "\fBl1\-cache\-line\-size\fR" 4
+.IX Item "l1-cache-line-size"
+The size of cache line in L1 cache, in bytes.
+.IP "\fBl1\-cache\-size\fR" 4
+.IX Item "l1-cache-size"
+The size of L1 cache, in kilobytes.
+.IP "\fBl2\-cache\-size\fR" 4
+.IX Item "l2-cache-size"
+The size of L2 cache, in kilobytes.
+.IP "\fBmin-insn-to-prefetch-ratio\fR" 4
+.IX Item "min-insn-to-prefetch-ratio"
+The minimum ratio between the number of instructions and the
+number of prefetches to enable prefetching in a loop.
+.IP "\fBprefetch-min-insn-to-mem-ratio\fR" 4
+.IX Item "prefetch-min-insn-to-mem-ratio"
+The minimum ratio between the number of instructions and the
+number of memory references to enable prefetching in a loop.
+.IP "\fBuse-canonical-types\fR" 4
+.IX Item "use-canonical-types"
+Whether the compiler should use the \*(L"canonical\*(R" type system.  By
+default, this should always be 1, which uses a more efficient internal
+mechanism for comparing types in \*(C+ and Objective\-\*(C+.  However, if
+bugs in the canonical type system are causing compilation failures,
+set this value to 0 to disable canonical types.
+.IP "\fBswitch-conversion-max-branch-ratio\fR" 4
+.IX Item "switch-conversion-max-branch-ratio"
+Switch initialization conversion will refuse to create arrays that are
+bigger than \fBswitch-conversion-max-branch-ratio\fR times the number of
+branches in the switch.
+.IP "\fBmax-partial-antic-length\fR" 4
+.IX Item "max-partial-antic-length"
+Maximum length of the partial antic set computed during the tree
+partial redundancy elimination optimization (\fB\-ftree\-pre\fR) when
+optimizing at \fB\-O3\fR and above.  For some sorts of source code
+the enhanced partial redundancy elimination optimization can run away,
+consuming all of the memory available on the host machine.  This
+parameter sets a limit on the length of the sets that are computed,
+which prevents the runaway behavior.  Setting a value of 0 for
+this parameter will allow an unlimited set length.
+.IP "\fBsccvn-max-scc-size\fR" 4
+.IX Item "sccvn-max-scc-size"
+Maximum size of a strongly connected component (\s-1SCC\s0) during \s-1SCCVN\s0
+processing.  If this limit is hit, \s-1SCCVN\s0 processing for the whole
+function will not be done and optimizations depending on it will
+be disabled.  The default maximum \s-1SCC\s0 size is 10000.
+.IP "\fBira-max-loops-num\fR" 4
+.IX Item "ira-max-loops-num"
+\&\s-1IRA\s0 uses a regional register allocation by default.  If a function
+contains loops more than number given by the parameter, only at most
+given number of the most frequently executed loops will form regions
+for the regional register allocation.  The default value of the
+parameter is 100.
+.IP "\fBira-max-conflict-table-size\fR" 4
+.IX Item "ira-max-conflict-table-size"
+Although \s-1IRA\s0 uses a sophisticated algorithm of compression conflict
+table, the table can be still big for huge functions.  If the conflict
+table for a function could be more than size in \s-1MB\s0 given by the
+parameter, the conflict table is not built and faster, simpler, and
+lower quality register allocation algorithm will be used.  The
+algorithm do not use pseudo-register conflicts.  The default value of
+the parameter is 2000.
+.IP "\fBira-loop-reserved-regs\fR" 4
+.IX Item "ira-loop-reserved-regs"
+\&\s-1IRA\s0 can be used to evaluate more accurate register pressure in loops
+for decision to move loop invariants (see \fB\-O3\fR).  The number
+of available registers reserved for some other purposes is described
+by this parameter.  The default value of the parameter is 2 which is
+minimal number of registers needed for execution of typical
+instruction.  This value is the best found from numerous experiments.
+.IP "\fBloop-invariant-max-bbs-in-loop\fR" 4
+.IX Item "loop-invariant-max-bbs-in-loop"
+Loop invariant motion can be very expensive, both in compile time and
+in amount of needed compile time memory, with very large loops.  Loops
+with more basic blocks than this parameter won't have loop invariant
+motion optimization performed on them.  The default value of the
+parameter is 1000 for \-O1 and 10000 for \-O2 and above.
+.IP "\fBmax-vartrack-size\fR" 4
+.IX Item "max-vartrack-size"
+Sets a maximum number of hash table slots to use during variable
+tracking dataflow analysis of any function.  If this limit is exceeded
+with variable tracking at assignments enabled, analysis for that
+function is retried without it, after removing all debug insns from
+the function.  If the limit is exceeded even without debug insns, var
+tracking analysis is completely disabled for the function.  Setting
+the parameter to zero makes it unlimited.
+.IP "\fBmin-nondebug-insn-uid\fR" 4
+.IX Item "min-nondebug-insn-uid"
+Use uids starting at this parameter for nondebug insns.  The range below
+the parameter is reserved exclusively for debug insns created by
+\&\fB\-fvar\-tracking\-assignments\fR, but debug insns may get
+(non-overlapping) uids above it if the reserved range is exhausted.
+.IP "\fBipa-sra-ptr-growth-factor\fR" 4
+.IX Item "ipa-sra-ptr-growth-factor"
+IPA-SRA will replace a pointer to an aggregate with one or more new
+parameters only when their cumulative size is less or equal to
+\&\fBipa-sra-ptr-growth-factor\fR times the size of the original
+pointer parameter.
+.IP "\fBgraphite-max-nb-scop-params\fR" 4
+.IX Item "graphite-max-nb-scop-params"
+To avoid exponential effects in the Graphite loop transforms, the
+number of parameters in a Static Control Part (SCoP) is bounded.  The
+default value is 10 parameters.  A variable whose value is unknown at
+compile time and defined outside a SCoP is a parameter of the SCoP.
+.IP "\fBgraphite-max-bbs-per-function\fR" 4
+.IX Item "graphite-max-bbs-per-function"
+To avoid exponential effects in the detection of SCoPs, the size of
+the functions analyzed by Graphite is bounded.  The default value is
+100 basic blocks.
+.IP "\fBloop-block-tile-size\fR" 4
+.IX Item "loop-block-tile-size"
+Loop blocking or strip mining transforms, enabled with
+\&\fB\-floop\-block\fR or \fB\-floop\-strip\-mine\fR, strip mine each
+loop in the loop nest by a given number of iterations.  The strip
+length can be changed using the \fBloop-block-tile-size\fR
+parameter.  The default value is 51 iterations.
+.IP "\fBdevirt-type-list-size\fR" 4
+.IX Item "devirt-type-list-size"
+IPA-CP attempts to track all possible types passed to a function's
+parameter in order to perform devirtualization.
+\&\fBdevirt-type-list-size\fR is the maximum number of types it
+stores per a single formal parameter of a function.
+.IP "\fBlto-partitions\fR" 4
+.IX Item "lto-partitions"
+Specify desired number of partitions produced during \s-1WHOPR\s0 compilation.
+The number of partitions should exceed the number of CPUs used for compilation.
+The default value is 32.
+.IP "\fBlto-minpartition\fR" 4
+.IX Item "lto-minpartition"
+Size of minimal partition for \s-1WHOPR\s0 (in estimated instructions).
+This prevents expenses of splitting very small programs into too many
+partitions.
+.IP "\fBcxx-max-namespaces-for-diagnostic-help\fR" 4
+.IX Item "cxx-max-namespaces-for-diagnostic-help"
+The maximum number of namespaces to consult for suggestions when \*(C+
+name lookup fails for an identifier.  The default is 1000.
+.RE
+.RS 4
+.RE
+.SS "Options Controlling the Preprocessor"
+.IX Subsection "Options Controlling the Preprocessor"
+These options control the C preprocessor, which is run on each C source
+file before actual compilation.
+.PP
+If you use the \fB\-E\fR option, nothing is done except preprocessing.
+Some of these options make sense only together with \fB\-E\fR because
+they cause the preprocessor output to be unsuitable for actual
+compilation.
+.IP "\fB\-Wp,\fR\fIoption\fR" 4
+.IX Item "-Wp,option"
+You can use \fB\-Wp,\fR\fIoption\fR to bypass the compiler driver
+and pass \fIoption\fR directly through to the preprocessor.  If
+\&\fIoption\fR contains commas, it is split into multiple options at the
+commas.  However, many options are modified, translated or interpreted
+by the compiler driver before being passed to the preprocessor, and
+\&\fB\-Wp\fR forcibly bypasses this phase.  The preprocessor's direct
+interface is undocumented and subject to change, so whenever possible
+you should avoid using \fB\-Wp\fR and let the driver handle the
+options instead.
+.IP "\fB\-Xpreprocessor\fR \fIoption\fR" 4
+.IX Item "-Xpreprocessor option"
+Pass \fIoption\fR as an option to the preprocessor.  You can use this to
+supply system-specific preprocessor options which \s-1GCC\s0 does not know how to
+recognize.
+.Sp
+If you want to pass an option that takes an argument, you must use
+\&\fB\-Xpreprocessor\fR twice, once for the option and once for the argument.
+.IP "\fB\-D\fR \fIname\fR" 4
+.IX Item "-D name"
+Predefine \fIname\fR as a macro, with definition \f(CW1\fR.
+.IP "\fB\-D\fR \fIname\fR\fB=\fR\fIdefinition\fR" 4
+.IX Item "-D name=definition"
+The contents of \fIdefinition\fR are tokenized and processed as if
+they appeared during translation phase three in a \fB#define\fR
+directive.  In particular, the definition will be truncated by
+embedded newline characters.
+.Sp
+If you are invoking the preprocessor from a shell or shell-like
+program you may need to use the shell's quoting syntax to protect
+characters such as spaces that have a meaning in the shell syntax.
+.Sp
+If you wish to define a function-like macro on the command line, write
+its argument list with surrounding parentheses before the equals sign
+(if any).  Parentheses are meaningful to most shells, so you will need
+to quote the option.  With \fBsh\fR and \fBcsh\fR,
+\&\fB\-D'\fR\fIname\fR\fB(\fR\fIargs...\fR\fB)=\fR\fIdefinition\fR\fB'\fR works.
+.Sp
+\&\fB\-D\fR and \fB\-U\fR options are processed in the order they
+are given on the command line.  All \fB\-imacros\fR \fIfile\fR and
+\&\fB\-include\fR \fIfile\fR options are processed after all
+\&\fB\-D\fR and \fB\-U\fR options.
+.IP "\fB\-U\fR \fIname\fR" 4
+.IX Item "-U name"
+Cancel any previous definition of \fIname\fR, either built in or
+provided with a \fB\-D\fR option.
+.IP "\fB\-undef\fR" 4
+.IX Item "-undef"
+Do not predefine any system-specific or GCC-specific macros.  The
+standard predefined macros remain defined.
+.IP "\fB\-I\fR \fIdir\fR" 4
+.IX Item "-I dir"
+Add the directory \fIdir\fR to the list of directories to be searched
+for header files.
+Directories named by \fB\-I\fR are searched before the standard
+system include directories.  If the directory \fIdir\fR is a standard
+system include directory, the option is ignored to ensure that the
+default search order for system directories and the special treatment
+of system headers are not defeated
+\&.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-o\fR \fIfile\fR" 4
+.IX Item "-o file"
+Write output to \fIfile\fR.  This is the same as specifying \fIfile\fR
+as the second non-option argument to \fBcpp\fR.  \fBgcc\fR has a
+different interpretation of a second non-option argument, so you must
+use \fB\-o\fR to specify the output file.
+.IP "\fB\-Wall\fR" 4
+.IX Item "-Wall"
+Turns on all optional warnings which are desirable for normal code.
+At present this is \fB\-Wcomment\fR, \fB\-Wtrigraphs\fR,
+\&\fB\-Wmultichar\fR and a warning about integer promotion causing a
+change of sign in \f(CW\*(C`#if\*(C'\fR expressions.  Note that many of the
+preprocessor's warnings are on by default and have no options to
+control them.
+.IP "\fB\-Wcomment\fR" 4
+.IX Item "-Wcomment"
+.PD 0
+.IP "\fB\-Wcomments\fR" 4
+.IX Item "-Wcomments"
+.PD
+Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
+comment, or whenever a backslash-newline appears in a \fB//\fR comment.
+(Both forms have the same effect.)
+.IP "\fB\-Wtrigraphs\fR" 4
+.IX Item "-Wtrigraphs"
+Most trigraphs in comments cannot affect the meaning of the program.
+However, a trigraph that would form an escaped newline (\fB??/\fR at
+the end of a line) can, by changing where the comment begins or ends.
+Therefore, only trigraphs that would form escaped newlines produce
+warnings inside a comment.
+.Sp
+This option is implied by \fB\-Wall\fR.  If \fB\-Wall\fR is not
+given, this option is still enabled unless trigraphs are enabled.  To
+get trigraph conversion without warnings, but get the other
+\&\fB\-Wall\fR warnings, use \fB\-trigraphs \-Wall \-Wno\-trigraphs\fR.
+.IP "\fB\-Wtraditional\fR" 4
+.IX Item "-Wtraditional"
+Warn about certain constructs that behave differently in traditional and
+\&\s-1ISO\s0 C.  Also warn about \s-1ISO\s0 C constructs that have no traditional C
+equivalent, and problematic constructs which should be avoided.
+.IP "\fB\-Wundef\fR" 4
+.IX Item "-Wundef"
+Warn whenever an identifier which is not a macro is encountered in an
+\&\fB#if\fR directive, outside of \fBdefined\fR.  Such identifiers are
+replaced with zero.
+.IP "\fB\-Wunused\-macros\fR" 4
+.IX Item "-Wunused-macros"
+Warn about macros defined in the main file that are unused.  A macro
+is \fIused\fR if it is expanded or tested for existence at least once.
+The preprocessor will also warn if the macro has not been used at the
+time it is redefined or undefined.
+.Sp
+Built-in macros, macros defined on the command line, and macros
+defined in include files are not warned about.
+.Sp
+\&\fINote:\fR If a macro is actually used, but only used in skipped
+conditional blocks, then \s-1CPP\s0 will report it as unused.  To avoid the
+warning in such a case, you might improve the scope of the macro's
+definition by, for example, moving it into the first skipped block.
+Alternatively, you could provide a dummy use with something like:
+.Sp
+.Vb 2
+\&        #if defined the_macro_causing_the_warning
+\&        #endif
+.Ve
+.IP "\fB\-Wendif\-labels\fR" 4
+.IX Item "-Wendif-labels"
+Warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
+This usually happens in code of the form
+.Sp
+.Vb 5
+\&        #if FOO
+\&        ...
+\&        #else FOO
+\&        ...
+\&        #endif FOO
+.Ve
+.Sp
+The second and third \f(CW\*(C`FOO\*(C'\fR should be in comments, but often are not
+in older programs.  This warning is on by default.
+.IP "\fB\-Werror\fR" 4
+.IX Item "-Werror"
+Make all warnings into hard errors.  Source code which triggers warnings
+will be rejected.
+.IP "\fB\-Wsystem\-headers\fR" 4
+.IX Item "-Wsystem-headers"
+Issue warnings for code in system headers.  These are normally unhelpful
+in finding bugs in your own code, therefore suppressed.  If you are
+responsible for the system library, you may want to see them.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+Suppress all warnings, including those which \s-1GNU\s0 \s-1CPP\s0 issues by default.
+.IP "\fB\-pedantic\fR" 4
+.IX Item "-pedantic"
+Issue all the mandatory diagnostics listed in the C standard.  Some of
+them are left out by default, since they trigger frequently on harmless
+code.
+.IP "\fB\-pedantic\-errors\fR" 4
+.IX Item "-pedantic-errors"
+Issue all the mandatory diagnostics, and make all mandatory diagnostics
+into errors.  This includes mandatory diagnostics that \s-1GCC\s0 issues
+without \fB\-pedantic\fR but treats as warnings.
+.IP "\fB\-M\fR" 4
+.IX Item "-M"
+Instead of outputting the result of preprocessing, output a rule
+suitable for \fBmake\fR describing the dependencies of the main
+source file.  The preprocessor outputs one \fBmake\fR rule containing
+the object file name for that source file, a colon, and the names of all
+the included files, including those coming from \fB\-include\fR or
+\&\fB\-imacros\fR command line options.
+.Sp
+Unless specified explicitly (with \fB\-MT\fR or \fB\-MQ\fR), the
+object file name consists of the name of the source file with any
+suffix replaced with object file suffix and with any leading directory
+parts removed.  If there are many included files then the rule is
+split into several lines using \fB\e\fR\-newline.  The rule has no
+commands.
+.Sp
+This option does not suppress the preprocessor's debug output, such as
+\&\fB\-dM\fR.  To avoid mixing such debug output with the dependency
+rules you should explicitly specify the dependency output file with
+\&\fB\-MF\fR, or use an environment variable like
+\&\fB\s-1DEPENDENCIES_OUTPUT\s0\fR.  Debug output
+will still be sent to the regular output stream as normal.
+.Sp
+Passing \fB\-M\fR to the driver implies \fB\-E\fR, and suppresses
+warnings with an implicit \fB\-w\fR.
+.IP "\fB\-MM\fR" 4
+.IX Item "-MM"
+Like \fB\-M\fR but do not mention header files that are found in
+system header directories, nor header files that are included,
+directly or indirectly, from such a header.
+.Sp
+This implies that the choice of angle brackets or double quotes in an
+\&\fB#include\fR directive does not in itself determine whether that
+header will appear in \fB\-MM\fR dependency output.  This is a
+slight change in semantics from \s-1GCC\s0 versions 3.0 and earlier.
+.IP "\fB\-MF\fR \fIfile\fR" 4
+.IX Item "-MF file"
+When used with \fB\-M\fR or \fB\-MM\fR, specifies a
+file to write the dependencies to.  If no \fB\-MF\fR switch is given
+the preprocessor sends the rules to the same place it would have sent
+preprocessed output.
+.Sp
+When used with the driver options \fB\-MD\fR or \fB\-MMD\fR,
+\&\fB\-MF\fR overrides the default dependency output file.
+.IP "\fB\-MG\fR" 4
+.IX Item "-MG"
+In conjunction with an option such as \fB\-M\fR requesting
+dependency generation, \fB\-MG\fR assumes missing header files are
+generated files and adds them to the dependency list without raising
+an error.  The dependency filename is taken directly from the
+\&\f(CW\*(C`#include\*(C'\fR directive without prepending any path.  \fB\-MG\fR
+also suppresses preprocessed output, as a missing header file renders
+this useless.
+.Sp
+This feature is used in automatic updating of makefiles.
+.IP "\fB\-MP\fR" 4
+.IX Item "-MP"
+This option instructs \s-1CPP\s0 to add a phony target for each dependency
+other than the main file, causing each to depend on nothing.  These
+dummy rules work around errors \fBmake\fR gives if you remove header
+files without updating the \fIMakefile\fR to match.
+.Sp
+This is typical output:
+.Sp
+.Vb 1
+\&        test.o: test.c test.h
+\&        
+\&        test.h:
+.Ve
+.IP "\fB\-MT\fR \fItarget\fR" 4
+.IX Item "-MT target"
+Change the target of the rule emitted by dependency generation.  By
+default \s-1CPP\s0 takes the name of the main input file, deletes any
+directory components and any file suffix such as \fB.c\fR, and
+appends the platform's usual object suffix.  The result is the target.
+.Sp
+An \fB\-MT\fR option will set the target to be exactly the string you
+specify.  If you want multiple targets, you can specify them as a single
+argument to \fB\-MT\fR, or use multiple \fB\-MT\fR options.
+.Sp
+For example, \fB\-MT\ '$(objpfx)foo.o'\fR might give
+.Sp
+.Vb 1
+\&        $(objpfx)foo.o: foo.c
+.Ve
+.IP "\fB\-MQ\fR \fItarget\fR" 4
+.IX Item "-MQ target"
+Same as \fB\-MT\fR, but it quotes any characters which are special to
+Make.  \fB\-MQ\ '$(objpfx)foo.o'\fR gives
+.Sp
+.Vb 1
+\&        $$(objpfx)foo.o: foo.c
+.Ve
+.Sp
+The default target is automatically quoted, as if it were given with
+\&\fB\-MQ\fR.
+.IP "\fB\-MD\fR" 4
+.IX Item "-MD"
+\&\fB\-MD\fR is equivalent to \fB\-M \-MF\fR \fIfile\fR, except that
+\&\fB\-E\fR is not implied.  The driver determines \fIfile\fR based on
+whether an \fB\-o\fR option is given.  If it is, the driver uses its
+argument but with a suffix of \fI.d\fR, otherwise it takes the name
+of the input file, removes any directory components and suffix, and
+applies a \fI.d\fR suffix.
+.Sp
+If \fB\-MD\fR is used in conjunction with \fB\-E\fR, any
+\&\fB\-o\fR switch is understood to specify the dependency output file, but if used without \fB\-E\fR, each \fB\-o\fR
+is understood to specify a target object file.
+.Sp
+Since \fB\-E\fR is not implied, \fB\-MD\fR can be used to generate
+a dependency output file as a side-effect of the compilation process.
+.IP "\fB\-MMD\fR" 4
+.IX Item "-MMD"
+Like \fB\-MD\fR except mention only user header files, not system
+header files.
+.IP "\fB\-fpch\-deps\fR" 4
+.IX Item "-fpch-deps"
+When using precompiled headers, this flag
+will cause the dependency-output flags to also list the files from the
+precompiled header's dependencies.  If not specified only the
+precompiled header would be listed and not the files that were used to
+create it because those files are not consulted when a precompiled
+header is used.
+.IP "\fB\-fpch\-preprocess\fR" 4
+.IX Item "-fpch-preprocess"
+This option allows use of a precompiled header together with \fB\-E\fR.  It inserts a special \f(CW\*(C`#pragma\*(C'\fR,
+\&\f(CW\*(C`#pragma GCC pch_preprocess "\f(CIfilename\f(CW"\*(C'\fR in the output to mark
+the place where the precompiled header was found, and its \fIfilename\fR.
+When \fB\-fpreprocessed\fR is in use, \s-1GCC\s0 recognizes this \f(CW\*(C`#pragma\*(C'\fR
+and loads the \s-1PCH\s0.
+.Sp
+This option is off by default, because the resulting preprocessed output
+is only really suitable as input to \s-1GCC\s0.  It is switched on by
+\&\fB\-save\-temps\fR.
+.Sp
+You should not write this \f(CW\*(C`#pragma\*(C'\fR in your own code, but it is
+safe to edit the filename if the \s-1PCH\s0 file is available in a different
+location.  The filename may be absolute or it may be relative to \s-1GCC\s0's
+current directory.
+.IP "\fB\-x c\fR" 4
+.IX Item "-x c"
+.PD 0
+.IP "\fB\-x c++\fR" 4
+.IX Item "-x c++"
+.IP "\fB\-x objective-c\fR" 4
+.IX Item "-x objective-c"
+.IP "\fB\-x assembler-with-cpp\fR" 4
+.IX Item "-x assembler-with-cpp"
+.PD
+Specify the source language: C, \*(C+, Objective-C, or assembly.  This has
+nothing to do with standards conformance or extensions; it merely
+selects which base syntax to expect.  If you give none of these options,
+cpp will deduce the language from the extension of the source file:
+\&\fB.c\fR, \fB.cc\fR, \fB.m\fR, or \fB.S\fR.  Some other common
+extensions for \*(C+ and assembly are also recognized.  If cpp does not
+recognize the extension, it will treat the file as C; this is the most
+generic mode.
+.Sp
+\&\fINote:\fR Previous versions of cpp accepted a \fB\-lang\fR option
+which selected both the language and the standards conformance level.
+This option has been removed, because it conflicts with the \fB\-l\fR
+option.
+.IP "\fB\-std=\fR\fIstandard\fR" 4
+.IX Item "-std=standard"
+.PD 0
+.IP "\fB\-ansi\fR" 4
+.IX Item "-ansi"
+.PD
+Specify the standard to which the code should conform.  Currently \s-1CPP\s0
+knows about C and \*(C+ standards; others may be added in the future.
+.Sp
+\&\fIstandard\fR
+may be one of:
+.RS 4
+.ie n .IP """c90""" 4
+.el .IP "\f(CWc90\fR" 4
+.IX Item "c90"
+.PD 0
+.ie n .IP """c89""" 4
+.el .IP "\f(CWc89\fR" 4
+.IX Item "c89"
+.ie n .IP """iso9899:1990""" 4
+.el .IP "\f(CWiso9899:1990\fR" 4
+.IX Item "iso9899:1990"
+.PD
+The \s-1ISO\s0 C standard from 1990.  \fBc90\fR is the customary shorthand for
+this version of the standard.
+.Sp
+The \fB\-ansi\fR option is equivalent to \fB\-std=c90\fR.
+.ie n .IP """iso9899:199409""" 4
+.el .IP "\f(CWiso9899:199409\fR" 4
+.IX Item "iso9899:199409"
+The 1990 C standard, as amended in 1994.
+.ie n .IP """iso9899:1999""" 4
+.el .IP "\f(CWiso9899:1999\fR" 4
+.IX Item "iso9899:1999"
+.PD 0
+.ie n .IP """c99""" 4
+.el .IP "\f(CWc99\fR" 4
+.IX Item "c99"
+.ie n .IP """iso9899:199x""" 4
+.el .IP "\f(CWiso9899:199x\fR" 4
+.IX Item "iso9899:199x"
+.ie n .IP """c9x""" 4
+.el .IP "\f(CWc9x\fR" 4
+.IX Item "c9x"
+.PD
+The revised \s-1ISO\s0 C standard, published in December 1999.  Before
+publication, this was known as C9X.
+.ie n .IP """c1x""" 4
+.el .IP "\f(CWc1x\fR" 4
+.IX Item "c1x"
+The next version of the \s-1ISO\s0 C standard, still under development.
+.ie n .IP """gnu90""" 4
+.el .IP "\f(CWgnu90\fR" 4
+.IX Item "gnu90"
+.PD 0
+.ie n .IP """gnu89""" 4
+.el .IP "\f(CWgnu89\fR" 4
+.IX Item "gnu89"
+.PD
+The 1990 C standard plus \s-1GNU\s0 extensions.  This is the default.
+.ie n .IP """gnu99""" 4
+.el .IP "\f(CWgnu99\fR" 4
+.IX Item "gnu99"
+.PD 0
+.ie n .IP """gnu9x""" 4
+.el .IP "\f(CWgnu9x\fR" 4
+.IX Item "gnu9x"
+.PD
+The 1999 C standard plus \s-1GNU\s0 extensions.
+.ie n .IP """gnu1x""" 4
+.el .IP "\f(CWgnu1x\fR" 4
+.IX Item "gnu1x"
+The next version of the \s-1ISO\s0 C standard, still under development, plus
+\&\s-1GNU\s0 extensions.
+.ie n .IP """c++98""" 4
+.el .IP "\f(CWc++98\fR" 4
+.IX Item "c++98"
+The 1998 \s-1ISO\s0 \*(C+ standard plus amendments.
+.ie n .IP """gnu++98""" 4
+.el .IP "\f(CWgnu++98\fR" 4
+.IX Item "gnu++98"
+The same as \fB\-std=c++98\fR plus \s-1GNU\s0 extensions.  This is the
+default for \*(C+ code.
+.RE
+.RS 4
+.RE
+.IP "\fB\-I\-\fR" 4
+.IX Item "-I-"
+Split the include path.  Any directories specified with \fB\-I\fR
+options before \fB\-I\-\fR are searched only for headers requested with
+\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
+\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR.  If additional directories are
+specified with \fB\-I\fR options after the \fB\-I\-\fR, those
+directories are searched for all \fB#include\fR directives.
+.Sp
+In addition, \fB\-I\-\fR inhibits the use of the directory of the current
+file directory as the first search directory for \f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR.
+This option has been deprecated.
+.IP "\fB\-nostdinc\fR" 4
+.IX Item "-nostdinc"
+Do not search the standard system directories for header files.
+Only the directories you have specified with \fB\-I\fR options
+(and the directory of the current file, if appropriate) are searched.
+.IP "\fB\-nostdinc++\fR" 4
+.IX Item "-nostdinc++"
+Do not search for header files in the \*(C+\-specific standard directories,
+but do still search the other standard directories.  (This option is
+used when building the \*(C+ library.)
+.IP "\fB\-include\fR \fIfile\fR" 4
+.IX Item "-include file"
+Process \fIfile\fR as if \f(CW\*(C`#include "file"\*(C'\fR appeared as the first
+line of the primary source file.  However, the first directory searched
+for \fIfile\fR is the preprocessor's working directory \fIinstead of\fR
+the directory containing the main source file.  If not found there, it
+is searched for in the remainder of the \f(CW\*(C`#include "..."\*(C'\fR search
+chain as normal.
+.Sp
+If multiple \fB\-include\fR options are given, the files are included
+in the order they appear on the command line.
+.IP "\fB\-imacros\fR \fIfile\fR" 4
+.IX Item "-imacros file"
+Exactly like \fB\-include\fR, except that any output produced by
+scanning \fIfile\fR is thrown away.  Macros it defines remain defined.
+This allows you to acquire all the macros from a header without also
+processing its declarations.
+.Sp
+All files specified by \fB\-imacros\fR are processed before all files
+specified by \fB\-include\fR.
+.IP "\fB\-idirafter\fR \fIdir\fR" 4
+.IX Item "-idirafter dir"
+Search \fIdir\fR for header files, but do it \fIafter\fR all
+directories specified with \fB\-I\fR and the standard system directories
+have been exhausted.  \fIdir\fR is treated as a system include directory.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-iprefix\fR \fIprefix\fR" 4
+.IX Item "-iprefix prefix"
+Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR
+options.  If the prefix represents a directory, you should include the
+final \fB/\fR.
+.IP "\fB\-iwithprefix\fR \fIdir\fR" 4
+.IX Item "-iwithprefix dir"
+.PD 0
+.IP "\fB\-iwithprefixbefore\fR \fIdir\fR" 4
+.IX Item "-iwithprefixbefore dir"
+.PD
+Append \fIdir\fR to the prefix specified previously with
+\&\fB\-iprefix\fR, and add the resulting directory to the include search
+path.  \fB\-iwithprefixbefore\fR puts it in the same place \fB\-I\fR
+would; \fB\-iwithprefix\fR puts it where \fB\-idirafter\fR would.
+.IP "\fB\-isysroot\fR \fIdir\fR" 4
+.IX Item "-isysroot dir"
+This option is like the \fB\-\-sysroot\fR option, but applies only to
+header files (except for Darwin targets, where it applies to both header
+files and libraries).  See the \fB\-\-sysroot\fR option for more
+information.
+.IP "\fB\-imultilib\fR \fIdir\fR" 4
+.IX Item "-imultilib dir"
+Use \fIdir\fR as a subdirectory of the directory containing
+target-specific \*(C+ headers.
+.IP "\fB\-isystem\fR \fIdir\fR" 4
+.IX Item "-isystem dir"
+Search \fIdir\fR for header files, after all directories specified by
+\&\fB\-I\fR but before the standard system directories.  Mark it
+as a system directory, so that it gets the same special treatment as
+is applied to the standard system directories.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-iquote\fR \fIdir\fR" 4
+.IX Item "-iquote dir"
+Search \fIdir\fR only for header files requested with
+\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
+\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR, before all directories specified by
+\&\fB\-I\fR and before the standard system directories.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-fdirectives\-only\fR" 4
+.IX Item "-fdirectives-only"
+When preprocessing, handle directives, but do not expand macros.
+.Sp
+The option's behavior depends on the \fB\-E\fR and \fB\-fpreprocessed\fR
+options.
+.Sp
+With \fB\-E\fR, preprocessing is limited to the handling of directives
+such as \f(CW\*(C`#define\*(C'\fR, \f(CW\*(C`#ifdef\*(C'\fR, and \f(CW\*(C`#error\*(C'\fR.  Other
+preprocessor operations, such as macro expansion and trigraph
+conversion are not performed.  In addition, the \fB\-dD\fR option is
+implicitly enabled.
+.Sp
+With \fB\-fpreprocessed\fR, predefinition of command line and most
+builtin macros is disabled.  Macros such as \f(CW\*(C`_\|_LINE_\|_\*(C'\fR, which are
+contextually dependent, are handled normally.  This enables compilation of
+files previously preprocessed with \f(CW\*(C`\-E \-fdirectives\-only\*(C'\fR.
+.Sp
+With both \fB\-E\fR and \fB\-fpreprocessed\fR, the rules for
+\&\fB\-fpreprocessed\fR take precedence.  This enables full preprocessing of
+files previously preprocessed with \f(CW\*(C`\-E \-fdirectives\-only\*(C'\fR.
+.IP "\fB\-fdollars\-in\-identifiers\fR" 4
+.IX Item "-fdollars-in-identifiers"
+Accept \fB$\fR in identifiers.
+.IP "\fB\-fextended\-identifiers\fR" 4
+.IX Item "-fextended-identifiers"
+Accept universal character names in identifiers.  This option is
+experimental; in a future version of \s-1GCC\s0, it will be enabled by
+default for C99 and \*(C+.
+.IP "\fB\-fpreprocessed\fR" 4
+.IX Item "-fpreprocessed"
+Indicate to the preprocessor that the input file has already been
+preprocessed.  This suppresses things like macro expansion, trigraph
+conversion, escaped newline splicing, and processing of most directives.
+The preprocessor still recognizes and removes comments, so that you can
+pass a file preprocessed with \fB\-C\fR to the compiler without
+problems.  In this mode the integrated preprocessor is little more than
+a tokenizer for the front ends.
+.Sp
+\&\fB\-fpreprocessed\fR is implicit if the input file has one of the
+extensions \fB.i\fR, \fB.ii\fR or \fB.mi\fR.  These are the
+extensions that \s-1GCC\s0 uses for preprocessed files created by
+\&\fB\-save\-temps\fR.
+.IP "\fB\-ftabstop=\fR\fIwidth\fR" 4
+.IX Item "-ftabstop=width"
+Set the distance between tab stops.  This helps the preprocessor report
+correct column numbers in warnings or errors, even if tabs appear on the
+line.  If the value is less than 1 or greater than 100, the option is
+ignored.  The default is 8.
+.IP "\fB\-fexec\-charset=\fR\fIcharset\fR" 4
+.IX Item "-fexec-charset=charset"
+Set the execution character set, used for string and character
+constants.  The default is \s-1UTF\-8\s0.  \fIcharset\fR can be any encoding
+supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
+.IP "\fB\-fwide\-exec\-charset=\fR\fIcharset\fR" 4
+.IX Item "-fwide-exec-charset=charset"
+Set the wide execution character set, used for wide string and
+character constants.  The default is \s-1UTF\-32\s0 or \s-1UTF\-16\s0, whichever
+corresponds to the width of \f(CW\*(C`wchar_t\*(C'\fR.  As with
+\&\fB\-fexec\-charset\fR, \fIcharset\fR can be any encoding supported
+by the system's \f(CW\*(C`iconv\*(C'\fR library routine; however, you will have
+problems with encodings that do not fit exactly in \f(CW\*(C`wchar_t\*(C'\fR.
+.IP "\fB\-finput\-charset=\fR\fIcharset\fR" 4
+.IX Item "-finput-charset=charset"
+Set the input character set, used for translation from the character
+set of the input file to the source character set used by \s-1GCC\s0.  If the
+locale does not specify, or \s-1GCC\s0 cannot get this information from the
+locale, the default is \s-1UTF\-8\s0.  This can be overridden by either the locale
+or this command line option.  Currently the command line option takes
+precedence if there's a conflict.  \fIcharset\fR can be any encoding
+supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
+.IP "\fB\-fworking\-directory\fR" 4
+.IX Item "-fworking-directory"
+Enable generation of linemarkers in the preprocessor output that will
+let the compiler know the current working directory at the time of
+preprocessing.  When this option is enabled, the preprocessor will
+emit, after the initial linemarker, a second linemarker with the
+current working directory followed by two slashes.  \s-1GCC\s0 will use this
+directory, when it's present in the preprocessed input, as the
+directory emitted as the current working directory in some debugging
+information formats.  This option is implicitly enabled if debugging
+information is enabled, but this can be inhibited with the negated
+form \fB\-fno\-working\-directory\fR.  If the \fB\-P\fR flag is
+present in the command line, this option has no effect, since no
+\&\f(CW\*(C`#line\*(C'\fR directives are emitted whatsoever.
+.IP "\fB\-fno\-show\-column\fR" 4
+.IX Item "-fno-show-column"
+Do not print column numbers in diagnostics.  This may be necessary if
+diagnostics are being scanned by a program that does not understand the
+column numbers, such as \fBdejagnu\fR.
+.IP "\fB\-A\fR \fIpredicate\fR\fB=\fR\fIanswer\fR" 4
+.IX Item "-A predicate=answer"
+Make an assertion with the predicate \fIpredicate\fR and answer
+\&\fIanswer\fR.  This form is preferred to the older form \fB\-A\fR
+\&\fIpredicate\fR\fB(\fR\fIanswer\fR\fB)\fR, which is still supported, because
+it does not use shell special characters.
+.IP "\fB\-A \-\fR\fIpredicate\fR\fB=\fR\fIanswer\fR" 4
+.IX Item "-A -predicate=answer"
+Cancel an assertion with the predicate \fIpredicate\fR and answer
+\&\fIanswer\fR.
+.IP "\fB\-dCHARS\fR" 4
+.IX Item "-dCHARS"
+\&\fI\s-1CHARS\s0\fR is a sequence of one or more of the following characters,
+and must not be preceded by a space.  Other characters are interpreted
+by the compiler proper, or reserved for future versions of \s-1GCC\s0, and so
+are silently ignored.  If you specify characters whose behavior
+conflicts, the result is undefined.
+.RS 4
+.IP "\fBM\fR" 4
+.IX Item "M"
+Instead of the normal output, generate a list of \fB#define\fR
+directives for all the macros defined during the execution of the
+preprocessor, including predefined macros.  This gives you a way of
+finding out what is predefined in your version of the preprocessor.
+Assuming you have no file \fIfoo.h\fR, the command
+.Sp
+.Vb 1
+\&        touch foo.h; cpp \-dM foo.h
+.Ve
+.Sp
+will show all the predefined macros.
+.Sp
+If you use \fB\-dM\fR without the \fB\-E\fR option, \fB\-dM\fR is
+interpreted as a synonym for \fB\-fdump\-rtl\-mach\fR.
+.IP "\fBD\fR" 4
+.IX Item "D"
+Like \fBM\fR except in two respects: it does \fInot\fR include the
+predefined macros, and it outputs \fIboth\fR the \fB#define\fR
+directives and the result of preprocessing.  Both kinds of output go to
+the standard output file.
+.IP "\fBN\fR" 4
+.IX Item "N"
+Like \fBD\fR, but emit only the macro names, not their expansions.
+.IP "\fBI\fR" 4
+.IX Item "I"
+Output \fB#include\fR directives in addition to the result of
+preprocessing.
+.IP "\fBU\fR" 4
+.IX Item "U"
+Like \fBD\fR except that only macros that are expanded, or whose
+definedness is tested in preprocessor directives, are output; the
+output is delayed until the use or test of the macro; and
+\&\fB#undef\fR directives are also output for macros tested but
+undefined at the time.
+.RE
+.RS 4
+.RE
+.IP "\fB\-P\fR" 4
+.IX Item "-P"
+Inhibit generation of linemarkers in the output from the preprocessor.
+This might be useful when running the preprocessor on something that is
+not C code, and will be sent to a program which might be confused by the
+linemarkers.
+.IP "\fB\-C\fR" 4
+.IX Item "-C"
+Do not discard comments.  All comments are passed through to the output
+file, except for comments in processed directives, which are deleted
+along with the directive.
+.Sp
+You should be prepared for side effects when using \fB\-C\fR; it
+causes the preprocessor to treat comments as tokens in their own right.
+For example, comments appearing at the start of what would be a
+directive line have the effect of turning that line into an ordinary
+source line, since the first token on the line is no longer a \fB#\fR.
+.IP "\fB\-CC\fR" 4
+.IX Item "-CC"
+Do not discard comments, including during macro expansion.  This is
+like \fB\-C\fR, except that comments contained within macros are
+also passed through to the output file where the macro is expanded.
+.Sp
+In addition to the side-effects of the \fB\-C\fR option, the
+\&\fB\-CC\fR option causes all \*(C+\-style comments inside a macro
+to be converted to C\-style comments.  This is to prevent later use
+of that macro from inadvertently commenting out the remainder of
+the source line.
+.Sp
+The \fB\-CC\fR option is generally used to support lint comments.
+.IP "\fB\-traditional\-cpp\fR" 4
+.IX Item "-traditional-cpp"
+Try to imitate the behavior of old-fashioned C preprocessors, as
+opposed to \s-1ISO\s0 C preprocessors.
+.IP "\fB\-trigraphs\fR" 4
+.IX Item "-trigraphs"
+Process trigraph sequences.
+These are three-character sequences, all starting with \fB??\fR, that
+are defined by \s-1ISO\s0 C to stand for single characters.  For example,
+\&\fB??/\fR stands for \fB\e\fR, so \fB'??/n'\fR is a character
+constant for a newline.  By default, \s-1GCC\s0 ignores trigraphs, but in
+standard-conforming modes it converts them.  See the \fB\-std\fR and
+\&\fB\-ansi\fR options.
+.Sp
+The nine trigraphs and their replacements are
+.Sp
+.Vb 2
+\&        Trigraph:       ??(  ??)  ??<  ??>  ??=  ??/  ??\*(Aq  ??!  ??\-
+\&        Replacement:      [    ]    {    }    #    \e    ^    |    ~
+.Ve
+.IP "\fB\-remap\fR" 4
+.IX Item "-remap"
+Enable special code to work around file systems which only permit very
+short file names, such as MS-DOS.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD 0
+.IP "\fB\-\-target\-help\fR" 4
+.IX Item "--target-help"
+.PD
+Print text describing all the command line options instead of
+preprocessing anything.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+Verbose mode.  Print out \s-1GNU\s0 \s-1CPP\s0's version number at the beginning of
+execution, and report the final form of the include path.
+.IP "\fB\-H\fR" 4
+.IX Item "-H"
+Print the name of each header file used, in addition to other normal
+activities.  Each name is indented to show how deep in the
+\&\fB#include\fR stack it is.  Precompiled header files are also
+printed, even if they are found to be invalid; an invalid precompiled
+header file is printed with \fB...x\fR and a valid one with \fB...!\fR .
+.IP "\fB\-version\fR" 4
+.IX Item "-version"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Print out \s-1GNU\s0 \s-1CPP\s0's version number.  With one dash, proceed to
+preprocess as normal.  With two dashes, exit immediately.
+.SS "Passing Options to the Assembler"
+.IX Subsection "Passing Options to the Assembler"
+You can pass options to the assembler.
+.IP "\fB\-Wa,\fR\fIoption\fR" 4
+.IX Item "-Wa,option"
+Pass \fIoption\fR as an option to the assembler.  If \fIoption\fR
+contains commas, it is split into multiple options at the commas.
+.IP "\fB\-Xassembler\fR \fIoption\fR" 4
+.IX Item "-Xassembler option"
+Pass \fIoption\fR as an option to the assembler.  You can use this to
+supply system-specific assembler options which \s-1GCC\s0 does not know how to
+recognize.
+.Sp
+If you want to pass an option that takes an argument, you must use
+\&\fB\-Xassembler\fR twice, once for the option and once for the argument.
+.SS "Options for Linking"
+.IX Subsection "Options for Linking"
+These options come into play when the compiler links object files into
+an executable output file.  They are meaningless if the compiler is
+not doing a link step.
+.IP "\fIobject-file-name\fR" 4
+.IX Item "object-file-name"
+A file name that does not end in a special recognized suffix is
+considered to name an object file or library.  (Object files are
+distinguished from libraries by the linker according to the file
+contents.)  If linking is done, these object files are used as input
+to the linker.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+.PD 0
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.IP "\fB\-E\fR" 4
+.IX Item "-E"
+.PD
+If any of these options is used, then the linker is not run, and
+object file names should not be used as arguments.
+.IP "\fB\-l\fR\fIlibrary\fR" 4
+.IX Item "-llibrary"
+.PD 0
+.IP "\fB\-l\fR \fIlibrary\fR" 4
+.IX Item "-l library"
+.PD
+Search the library named \fIlibrary\fR when linking.  (The second
+alternative with the library as a separate argument is only for
+\&\s-1POSIX\s0 compliance and is not recommended.)
+.Sp
+It makes a difference where in the command you write this option; the
+linker searches and processes libraries and object files in the order they
+are specified.  Thus, \fBfoo.o \-lz bar.o\fR searches library \fBz\fR
+after file \fIfoo.o\fR but before \fIbar.o\fR.  If \fIbar.o\fR refers
+to functions in \fBz\fR, those functions may not be loaded.
+.Sp
+The linker searches a standard list of directories for the library,
+which is actually a file named \fIlib\fIlibrary\fI.a\fR.  The linker
+then uses this file as if it had been specified precisely by name.
+.Sp
+The directories searched include several standard system directories
+plus any that you specify with \fB\-L\fR.
+.Sp
+Normally the files found this way are library files\-\-\-archive files
+whose members are object files.  The linker handles an archive file by
+scanning through it for members which define symbols that have so far
+been referenced but not defined.  But if the file that is found is an
+ordinary object file, it is linked in the usual fashion.  The only
+difference between using an \fB\-l\fR option and specifying a file name
+is that \fB\-l\fR surrounds \fIlibrary\fR with \fBlib\fR and \fB.a\fR
+and searches several directories.
+.IP "\fB\-lobjc\fR" 4
+.IX Item "-lobjc"
+You need this special case of the \fB\-l\fR option in order to
+link an Objective-C or Objective\-\*(C+ program.
+.IP "\fB\-nostartfiles\fR" 4
+.IX Item "-nostartfiles"
+Do not use the standard system startup files when linking.
+The standard system libraries are used normally, unless \fB\-nostdlib\fR
+or \fB\-nodefaultlibs\fR is used.
+.IP "\fB\-nodefaultlibs\fR" 4
+.IX Item "-nodefaultlibs"
+Do not use the standard system libraries when linking.
+Only the libraries you specify will be passed to the linker, options
+specifying linkage of the system libraries, such as \f(CW\*(C`\-static\-libgcc\*(C'\fR
+or \f(CW\*(C`\-shared\-libgcc\*(C'\fR, will be ignored.
+The standard startup files are used normally, unless \fB\-nostartfiles\fR
+is used.  The compiler may generate calls to \f(CW\*(C`memcmp\*(C'\fR,
+\&\f(CW\*(C`memset\*(C'\fR, \f(CW\*(C`memcpy\*(C'\fR and \f(CW\*(C`memmove\*(C'\fR.
+These entries are usually resolved by entries in
+libc.  These entry points should be supplied through some other
+mechanism when this option is specified.
+.IP "\fB\-nostdlib\fR" 4
+.IX Item "-nostdlib"
+Do not use the standard system startup files or libraries when linking.
+No startup files and only the libraries you specify will be passed to
+the linker, options specifying linkage of the system libraries, such as
+\&\f(CW\*(C`\-static\-libgcc\*(C'\fR or \f(CW\*(C`\-shared\-libgcc\*(C'\fR, will be ignored.
+The compiler may generate calls to \f(CW\*(C`memcmp\*(C'\fR, \f(CW\*(C`memset\*(C'\fR,
+\&\f(CW\*(C`memcpy\*(C'\fR and \f(CW\*(C`memmove\*(C'\fR.
+These entries are usually resolved by entries in
+libc.  These entry points should be supplied through some other
+mechanism when this option is specified.
+.Sp
+One of the standard libraries bypassed by \fB\-nostdlib\fR and
+\&\fB\-nodefaultlibs\fR is \fIlibgcc.a\fR, a library of internal subroutines
+that \s-1GCC\s0 uses to overcome shortcomings of particular machines, or special
+needs for some languages.
+.Sp
+In most cases, you need \fIlibgcc.a\fR even when you want to avoid
+other standard libraries.  In other words, when you specify \fB\-nostdlib\fR
+or \fB\-nodefaultlibs\fR you should usually specify \fB\-lgcc\fR as well.
+This ensures that you have no unresolved references to internal \s-1GCC\s0
+library subroutines.  (For example, \fB_\|_main\fR, used to ensure \*(C+
+constructors will be called.)
+.IP "\fB\-pie\fR" 4
+.IX Item "-pie"
+Produce a position independent executable on targets which support it.
+For predictable results, you must also specify the same set of options
+that were used to generate code (\fB\-fpie\fR, \fB\-fPIE\fR,
+or model suboptions) when you specify this option.
+.IP "\fB\-rdynamic\fR" 4
+.IX Item "-rdynamic"
+Pass the flag \fB\-export\-dynamic\fR to the \s-1ELF\s0 linker, on targets
+that support it. This instructs the linker to add all symbols, not
+only used ones, to the dynamic symbol table. This option is needed
+for some uses of \f(CW\*(C`dlopen\*(C'\fR or to allow obtaining backtraces
+from within a program.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+Remove all symbol table and relocation information from the executable.
+.IP "\fB\-static\fR" 4
+.IX Item "-static"
+On systems that support dynamic linking, this prevents linking with the shared
+libraries.  On other systems, this option has no effect.
+.IP "\fB\-shared\fR" 4
+.IX Item "-shared"
+Produce a shared object which can then be linked with other objects to
+form an executable.  Not all systems support this option.  For predictable
+results, you must also specify the same set of options that were used to
+generate code (\fB\-fpic\fR, \fB\-fPIC\fR, or model suboptions)
+when you specify this option.[1]
+.IP "\fB\-shared\-libgcc\fR" 4
+.IX Item "-shared-libgcc"
+.PD 0
+.IP "\fB\-static\-libgcc\fR" 4
+.IX Item "-static-libgcc"
+.PD
+On systems that provide \fIlibgcc\fR as a shared library, these options
+force the use of either the shared or static version respectively.
+If no shared version of \fIlibgcc\fR was built when the compiler was
+configured, these options have no effect.
+.Sp
+There are several situations in which an application should use the
+shared \fIlibgcc\fR instead of the static version.  The most common
+of these is when the application wishes to throw and catch exceptions
+across different shared libraries.  In that case, each of the libraries
+as well as the application itself should use the shared \fIlibgcc\fR.
+.Sp
+Therefore, the G++ and \s-1GCJ\s0 drivers automatically add
+\&\fB\-shared\-libgcc\fR whenever you build a shared library or a main
+executable, because \*(C+ and Java programs typically use exceptions, so
+this is the right thing to do.
+.Sp
+If, instead, you use the \s-1GCC\s0 driver to create shared libraries, you may
+find that they will not always be linked with the shared \fIlibgcc\fR.
+If \s-1GCC\s0 finds, at its configuration time, that you have a non-GNU linker
+or a \s-1GNU\s0 linker that does not support option \fB\-\-eh\-frame\-hdr\fR,
+it will link the shared version of \fIlibgcc\fR into shared libraries
+by default.  Otherwise, it will take advantage of the linker and optimize
+away the linking with the shared version of \fIlibgcc\fR, linking with
+the static version of libgcc by default.  This allows exceptions to
+propagate through such shared libraries, without incurring relocation
+costs at library load time.
+.Sp
+However, if a library or main executable is supposed to throw or catch
+exceptions, you must link it using the G++ or \s-1GCJ\s0 driver, as appropriate
+for the languages used in the program, or using the option
+\&\fB\-shared\-libgcc\fR, such that it is linked with the shared
+\&\fIlibgcc\fR.
+.IP "\fB\-static\-libstdc++\fR" 4
+.IX Item "-static-libstdc++"
+When the \fBg++\fR program is used to link a \*(C+ program, it will
+normally automatically link against \fBlibstdc++\fR.  If
+\&\fIlibstdc++\fR is available as a shared library, and the
+\&\fB\-static\fR option is not used, then this will link against the
+shared version of \fIlibstdc++\fR.  That is normally fine.  However, it
+is sometimes useful to freeze the version of \fIlibstdc++\fR used by
+the program without going all the way to a fully static link.  The
+\&\fB\-static\-libstdc++\fR option directs the \fBg++\fR driver to
+link \fIlibstdc++\fR statically, without necessarily linking other
+libraries statically.
+.IP "\fB\-symbolic\fR" 4
+.IX Item "-symbolic"
+Bind references to global symbols when building a shared object.  Warn
+about any unresolved references (unless overridden by the link editor
+option \fB\-Xlinker \-z \-Xlinker defs\fR).  Only a few systems support
+this option.
+.IP "\fB\-T\fR \fIscript\fR" 4
+.IX Item "-T script"
+Use \fIscript\fR as the linker script.  This option is supported by most
+systems using the \s-1GNU\s0 linker.  On some targets, such as bare-board
+targets without an operating system, the \fB\-T\fR option may be required
+when linking to avoid references to undefined symbols.
+.IP "\fB\-Xlinker\fR \fIoption\fR" 4
+.IX Item "-Xlinker option"
+Pass \fIoption\fR as an option to the linker.  You can use this to
+supply system-specific linker options which \s-1GCC\s0 does not know how to
+recognize.
+.Sp
+If you want to pass an option that takes a separate argument, you must use
+\&\fB\-Xlinker\fR twice, once for the option and once for the argument.
+For example, to pass \fB\-assert definitions\fR, you must write
+\&\fB\-Xlinker \-assert \-Xlinker definitions\fR.  It does not work to write
+\&\fB\-Xlinker \*(L"\-assert definitions\*(R"\fR, because this passes the entire
+string as a single argument, which is not what the linker expects.
+.Sp
+When using the \s-1GNU\s0 linker, it is usually more convenient to pass
+arguments to linker options using the \fIoption\fR\fB=\fR\fIvalue\fR
+syntax than as separate arguments.  For example, you can specify
+\&\fB\-Xlinker \-Map=output.map\fR rather than
+\&\fB\-Xlinker \-Map \-Xlinker output.map\fR.  Other linkers may not support
+this syntax for command-line options.
+.IP "\fB\-Wl,\fR\fIoption\fR" 4
+.IX Item "-Wl,option"
+Pass \fIoption\fR as an option to the linker.  If \fIoption\fR contains
+commas, it is split into multiple options at the commas.  You can use this
+syntax to pass an argument to the option.
+For example, \fB\-Wl,\-Map,output.map\fR passes \fB\-Map output.map\fR to the
+linker.  When using the \s-1GNU\s0 linker, you can also get the same effect with
+\&\fB\-Wl,\-Map=output.map\fR.
+.IP "\fB\-u\fR \fIsymbol\fR" 4
+.IX Item "-u symbol"
+Pretend the symbol \fIsymbol\fR is undefined, to force linking of
+library modules to define it.  You can use \fB\-u\fR multiple times with
+different symbols to force loading of additional library modules.
+.SS "Options for Directory Search"
+.IX Subsection "Options for Directory Search"
+These options specify directories to search for header files, for
+libraries and for parts of the compiler:
+.IP "\fB\-I\fR\fIdir\fR" 4
+.IX Item "-Idir"
+Add the directory \fIdir\fR to the head of the list of directories to be
+searched for header files.  This can be used to override a system header
+file, substituting your own version, since these directories are
+searched before the system header file directories.  However, you should
+not use this option to add directories that contain vendor-supplied
+system header files (use \fB\-isystem\fR for that).  If you use more than
+one \fB\-I\fR option, the directories are scanned in left-to-right
+order; the standard system directories come after.
+.Sp
+If a standard system include directory, or a directory specified with
+\&\fB\-isystem\fR, is also specified with \fB\-I\fR, the \fB\-I\fR
+option will be ignored.  The directory will still be searched but as a
+system directory at its normal position in the system include chain.
+This is to ensure that \s-1GCC\s0's procedure to fix buggy system headers and
+the ordering for the include_next directive are not inadvertently changed.
+If you really need to change the search order for system directories,
+use the \fB\-nostdinc\fR and/or \fB\-isystem\fR options.
+.IP "\fB\-iplugindir=\fR\fIdir\fR" 4
+.IX Item "-iplugindir=dir"
+Set the directory to search for plugins which are passed
+by \fB\-fplugin=\fR\fIname\fR instead of
+\&\fB\-fplugin=\fR\fIpath\fR\fB/\fR\fIname\fR\fB.so\fR.  This option is not meant
+to be used by the user, but only passed by the driver.
+.IP "\fB\-iquote\fR\fIdir\fR" 4
+.IX Item "-iquotedir"
+Add the directory \fIdir\fR to the head of the list of directories to
+be searched for header files only for the case of \fB#include
+"\fR\fIfile\fR\fB"\fR; they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR,
+otherwise just like \fB\-I\fR.
+.IP "\fB\-L\fR\fIdir\fR" 4
+.IX Item "-Ldir"
+Add directory \fIdir\fR to the list of directories to be searched
+for \fB\-l\fR.
+.IP "\fB\-B\fR\fIprefix\fR" 4
+.IX Item "-Bprefix"
+This option specifies where to find the executables, libraries,
+include files, and data files of the compiler itself.
+.Sp
+The compiler driver program runs one or more of the subprograms
+\&\fIcpp\fR, \fIcc1\fR, \fIas\fR and \fIld\fR.  It tries
+\&\fIprefix\fR as a prefix for each program it tries to run, both with and
+without \fImachine\fR\fB/\fR\fIversion\fR\fB/\fR.
+.Sp
+For each subprogram to be run, the compiler driver first tries the
+\&\fB\-B\fR prefix, if any.  If that name is not found, or if \fB\-B\fR
+was not specified, the driver tries two standard prefixes, which are
+\&\fI/usr/lib/gcc/\fR and \fI/usr/local/lib/gcc/\fR.  If neither of
+those results in a file name that is found, the unmodified program
+name is searched for using the directories specified in your
+\&\fB\s-1PATH\s0\fR environment variable.
+.Sp
+The compiler will check to see if the path provided by the \fB\-B\fR
+refers to a directory, and if necessary it will add a directory
+separator character at the end of the path.
+.Sp
+\&\fB\-B\fR prefixes that effectively specify directory names also apply
+to libraries in the linker, because the compiler translates these
+options into \fB\-L\fR options for the linker.  They also apply to
+includes files in the preprocessor, because the compiler translates these
+options into \fB\-isystem\fR options for the preprocessor.  In this case,
+the compiler appends \fBinclude\fR to the prefix.
+.Sp
+The run-time support file \fIlibgcc.a\fR can also be searched for using
+the \fB\-B\fR prefix, if needed.  If it is not found there, the two
+standard prefixes above are tried, and that is all.  The file is left
+out of the link if it is not found by those means.
+.Sp
+Another way to specify a prefix much like the \fB\-B\fR prefix is to use
+the environment variable \fB\s-1GCC_EXEC_PREFIX\s0\fR.
+.Sp
+As a special kludge, if the path provided by \fB\-B\fR is
+\&\fI[dir/]stage\fIN\fI/\fR, where \fIN\fR is a number in the range 0 to
+9, then it will be replaced by \fI[dir/]include\fR.  This is to help
+with boot-strapping the compiler.
+.IP "\fB\-specs=\fR\fIfile\fR" 4
+.IX Item "-specs=file"
+Process \fIfile\fR after the compiler reads in the standard \fIspecs\fR
+file, in order to override the defaults that the \fIgcc\fR driver
+program uses when determining what switches to pass to \fIcc1\fR,
+\&\fIcc1plus\fR, \fIas\fR, \fIld\fR, etc.  More than one
+\&\fB\-specs=\fR\fIfile\fR can be specified on the command line, and they
+are processed in order, from left to right.
+.IP "\fB\-\-sysroot=\fR\fIdir\fR" 4
+.IX Item "--sysroot=dir"
+Use \fIdir\fR as the logical root directory for headers and libraries.
+For example, if the compiler would normally search for headers in
+\&\fI/usr/include\fR and libraries in \fI/usr/lib\fR, it will instead
+search \fI\fIdir\fI/usr/include\fR and \fI\fIdir\fI/usr/lib\fR.
+.Sp
+If you use both this option and the \fB\-isysroot\fR option, then
+the \fB\-\-sysroot\fR option will apply to libraries, but the
+\&\fB\-isysroot\fR option will apply to header files.
+.Sp
+The \s-1GNU\s0 linker (beginning with version 2.16) has the necessary support
+for this option.  If your linker does not support this option, the
+header file aspect of \fB\-\-sysroot\fR will still work, but the
+library aspect will not.
+.IP "\fB\-I\-\fR" 4
+.IX Item "-I-"
+This option has been deprecated.  Please use \fB\-iquote\fR instead for
+\&\fB\-I\fR directories before the \fB\-I\-\fR and remove the \fB\-I\-\fR.
+Any directories you specify with \fB\-I\fR options before the \fB\-I\-\fR
+option are searched only for the case of \fB#include "\fR\fIfile\fR\fB"\fR;
+they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR.
+.Sp
+If additional directories are specified with \fB\-I\fR options after
+the \fB\-I\-\fR, these directories are searched for all \fB#include\fR
+directives.  (Ordinarily \fIall\fR \fB\-I\fR directories are used
+this way.)
+.Sp
+In addition, the \fB\-I\-\fR option inhibits the use of the current
+directory (where the current input file came from) as the first search
+directory for \fB#include "\fR\fIfile\fR\fB"\fR.  There is no way to
+override this effect of \fB\-I\-\fR.  With \fB\-I.\fR you can specify
+searching the directory which was current when the compiler was
+invoked.  That is not exactly the same as what the preprocessor does
+by default, but it is often satisfactory.
+.Sp
+\&\fB\-I\-\fR does not inhibit the use of the standard system directories
+for header files.  Thus, \fB\-I\-\fR and \fB\-nostdinc\fR are
+independent.
+.SS "Specifying Target Machine and Compiler Version"
+.IX Subsection "Specifying Target Machine and Compiler Version"
+The usual way to run \s-1GCC\s0 is to run the executable called \fBgcc\fR, or
+\&\fImachine\fR\fB\-gcc\fR when cross-compiling, or
+\&\fImachine\fR\fB\-gcc\-\fR\fIversion\fR to run a version other than the
+one that was installed last.
+.SS "Hardware Models and Configurations"
+.IX Subsection "Hardware Models and Configurations"
+Each target machine types can have its own
+special options, starting with \fB\-m\fR, to choose among various
+hardware models or configurations\-\-\-for example, 68010 vs 68020,
+floating coprocessor or none.  A single installed version of the
+compiler can compile for any model or configuration, according to the
+options specified.
+.PP
+Some configurations of the compiler also support additional special
+options, usually for compatibility with other compilers on the same
+platform.
+.PP
+\fI\s-1ARC\s0 Options\fR
+.IX Subsection "ARC Options"
+.PP
+These options are defined for \s-1ARC\s0 implementations:
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+Compile code for little endian mode.  This is the default.
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+Compile code for big endian mode.
+.IP "\fB\-mmangle\-cpu\fR" 4
+.IX Item "-mmangle-cpu"
+Prepend the name of the \s-1CPU\s0 to all public symbol names.
+In multiple-processor systems, there are many \s-1ARC\s0 variants with different
+instruction and register set characteristics.  This flag prevents code
+compiled for one \s-1CPU\s0 to be linked with code compiled for another.
+No facility exists for handling variants that are \*(L"almost identical\*(R".
+This is an all or nothing option.
+.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
+.IX Item "-mcpu=cpu"
+Compile code for \s-1ARC\s0 variant \fIcpu\fR.
+Which variants are supported depend on the configuration.
+All variants support \fB\-mcpu=base\fR, this is the default.
+.IP "\fB\-mtext=\fR\fItext-section\fR" 4
+.IX Item "-mtext=text-section"
+.PD 0
+.IP "\fB\-mdata=\fR\fIdata-section\fR" 4
+.IX Item "-mdata=data-section"
+.IP "\fB\-mrodata=\fR\fIreadonly-data-section\fR" 4
+.IX Item "-mrodata=readonly-data-section"
+.PD
+Put functions, data, and readonly data in \fItext-section\fR,
+\&\fIdata-section\fR, and \fIreadonly-data-section\fR respectively
+by default.  This can be overridden with the \f(CW\*(C`section\*(C'\fR attribute.
+.PP
+\fI\s-1ARM\s0 Options\fR
+.IX Subsection "ARM Options"
+.PP
+These \fB\-m\fR options are defined for Advanced \s-1RISC\s0 Machines (\s-1ARM\s0)
+architectures:
+.IP "\fB\-mabi=\fR\fIname\fR" 4
+.IX Item "-mabi=name"
+Generate code for the specified \s-1ABI\s0.  Permissible values are: \fBapcs-gnu\fR,
+\&\fBatpcs\fR, \fBaapcs\fR, \fBaapcs-linux\fR and \fBiwmmxt\fR.
+.IP "\fB\-mapcs\-frame\fR" 4
+.IX Item "-mapcs-frame"
+Generate a stack frame that is compliant with the \s-1ARM\s0 Procedure Call
+Standard for all functions, even if this is not strictly necessary for
+correct execution of the code.  Specifying \fB\-fomit\-frame\-pointer\fR
+with this option will cause the stack frames not to be generated for
+leaf functions.  The default is \fB\-mno\-apcs\-frame\fR.
+.IP "\fB\-mapcs\fR" 4
+.IX Item "-mapcs"
+This is a synonym for \fB\-mapcs\-frame\fR.
+.IP "\fB\-mthumb\-interwork\fR" 4
+.IX Item "-mthumb-interwork"
+Generate code which supports calling between the \s-1ARM\s0 and Thumb
+instruction sets.  Without this option the two instruction sets cannot
+be reliably used inside one program.  The default is
+\&\fB\-mno\-thumb\-interwork\fR, since slightly larger code is generated
+when \fB\-mthumb\-interwork\fR is specified.
+.IP "\fB\-mno\-sched\-prolog\fR" 4
+.IX Item "-mno-sched-prolog"
+Prevent the reordering of instructions in the function prolog, or the
+merging of those instruction with the instructions in the function's
+body.  This means that all functions will start with a recognizable set
+of instructions (or in fact one of a choice from a small set of
+different function prologues), and this information can be used to
+locate the start if functions inside an executable piece of code.  The
+default is \fB\-msched\-prolog\fR.
+.IP "\fB\-mfloat\-abi=\fR\fIname\fR" 4
+.IX Item "-mfloat-abi=name"
+Specifies which floating-point \s-1ABI\s0 to use.  Permissible values
+are: \fBsoft\fR, \fBsoftfp\fR and \fBhard\fR.
+.Sp
+Specifying \fBsoft\fR causes \s-1GCC\s0 to generate output containing
+library calls for floating-point operations.
+\&\fBsoftfp\fR allows the generation of code using hardware floating-point
+instructions, but still uses the soft-float calling conventions.
+\&\fBhard\fR allows generation of floating-point instructions
+and uses FPU-specific calling conventions.
+.Sp
+The default depends on the specific target configuration.  Note that
+the hard-float and soft-float ABIs are not link-compatible; you must
+compile your entire program with the same \s-1ABI\s0, and link with a
+compatible set of libraries.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+Equivalent to \fB\-mfloat\-abi=hard\fR.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Equivalent to \fB\-mfloat\-abi=soft\fR.
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+Generate code for a processor running in little-endian mode.  This is
+the default for all standard configurations.
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+Generate code for a processor running in big-endian mode; the default is
+to compile code for a little-endian processor.
+.IP "\fB\-mwords\-little\-endian\fR" 4
+.IX Item "-mwords-little-endian"
+This option only applies when generating code for big-endian processors.
+Generate code for a little-endian word order but a big-endian byte
+order.  That is, a byte order of the form \fB32107654\fR.  Note: this
+option should only be used if you require compatibility with code for
+big-endian \s-1ARM\s0 processors generated by versions of the compiler prior to
+2.8.
+.IP "\fB\-mcpu=\fR\fIname\fR" 4
+.IX Item "-mcpu=name"
+This specifies the name of the target \s-1ARM\s0 processor.  \s-1GCC\s0 uses this name
+to determine what kind of instructions it can emit when generating
+assembly code.  Permissible names are: \fBarm2\fR, \fBarm250\fR,
+\&\fBarm3\fR, \fBarm6\fR, \fBarm60\fR, \fBarm600\fR, \fBarm610\fR,
+\&\fBarm620\fR, \fBarm7\fR, \fBarm7m\fR, \fBarm7d\fR, \fBarm7dm\fR,
+\&\fBarm7di\fR, \fBarm7dmi\fR, \fBarm70\fR, \fBarm700\fR,
+\&\fBarm700i\fR, \fBarm710\fR, \fBarm710c\fR, \fBarm7100\fR,
+\&\fBarm720\fR,
+\&\fBarm7500\fR, \fBarm7500fe\fR, \fBarm7tdmi\fR, \fBarm7tdmi\-s\fR,
+\&\fBarm710t\fR, \fBarm720t\fR, \fBarm740t\fR,
+\&\fBstrongarm\fR, \fBstrongarm110\fR, \fBstrongarm1100\fR,
+\&\fBstrongarm1110\fR,
+\&\fBarm8\fR, \fBarm810\fR, \fBarm9\fR, \fBarm9e\fR, \fBarm920\fR,
+\&\fBarm920t\fR, \fBarm922t\fR, \fBarm946e\-s\fR, \fBarm966e\-s\fR,
+\&\fBarm968e\-s\fR, \fBarm926ej\-s\fR, \fBarm940t\fR, \fBarm9tdmi\fR,
+\&\fBarm10tdmi\fR, \fBarm1020t\fR, \fBarm1026ej\-s\fR,
+\&\fBarm10e\fR, \fBarm1020e\fR, \fBarm1022e\fR,
+\&\fBarm1136j\-s\fR, \fBarm1136jf\-s\fR, \fBmpcore\fR, \fBmpcorenovfp\fR,
+\&\fBarm1156t2\-s\fR, \fBarm1156t2f\-s\fR, \fBarm1176jz\-s\fR, \fBarm1176jzf\-s\fR,
+\&\fBcortex\-a5\fR, \fBcortex\-a8\fR, \fBcortex\-a9\fR, \fBcortex\-a15\fR,
+\&\fBcortex\-r4\fR, \fBcortex\-r4f\fR, \fBcortex\-m4\fR, \fBcortex\-m3\fR,
+\&\fBcortex\-m1\fR,
+\&\fBcortex\-m0\fR,
+\&\fBxscale\fR, \fBiwmmxt\fR, \fBiwmmxt2\fR, \fBep9312\fR.
+.IP "\fB\-mtune=\fR\fIname\fR" 4
+.IX Item "-mtune=name"
+This option is very similar to the \fB\-mcpu=\fR option, except that
+instead of specifying the actual target processor type, and hence
+restricting which instructions can be used, it specifies that \s-1GCC\s0 should
+tune the performance of the code as if the target were of the type
+specified in this option, but still choosing the instructions that it
+will generate based on the \s-1CPU\s0 specified by a \fB\-mcpu=\fR option.
+For some \s-1ARM\s0 implementations better performance can be obtained by using
+this option.
+.IP "\fB\-march=\fR\fIname\fR" 4
+.IX Item "-march=name"
+This specifies the name of the target \s-1ARM\s0 architecture.  \s-1GCC\s0 uses this
+name to determine what kind of instructions it can emit when generating
+assembly code.  This option can be used in conjunction with or instead
+of the \fB\-mcpu=\fR option.  Permissible names are: \fBarmv2\fR,
+\&\fBarmv2a\fR, \fBarmv3\fR, \fBarmv3m\fR, \fBarmv4\fR, \fBarmv4t\fR,
+\&\fBarmv5\fR, \fBarmv5t\fR, \fBarmv5e\fR, \fBarmv5te\fR,
+\&\fBarmv6\fR, \fBarmv6j\fR,
+\&\fBarmv6t2\fR, \fBarmv6z\fR, \fBarmv6zk\fR, \fBarmv6\-m\fR,
+\&\fBarmv7\fR, \fBarmv7\-a\fR, \fBarmv7\-r\fR, \fBarmv7\-m\fR,
+\&\fBiwmmxt\fR, \fBiwmmxt2\fR, \fBep9312\fR.
+.IP "\fB\-mfpu=\fR\fIname\fR" 4
+.IX Item "-mfpu=name"
+.PD 0
+.IP "\fB\-mfpe=\fR\fInumber\fR" 4
+.IX Item "-mfpe=number"
+.IP "\fB\-mfp=\fR\fInumber\fR" 4
+.IX Item "-mfp=number"
+.PD
+This specifies what floating point hardware (or hardware emulation) is
+available on the target.  Permissible names are: \fBfpa\fR, \fBfpe2\fR,
+\&\fBfpe3\fR, \fBmaverick\fR, \fBvfp\fR, \fBvfpv3\fR, \fBvfpv3\-fp16\fR,
+\&\fBvfpv3\-d16\fR, \fBvfpv3\-d16\-fp16\fR, \fBvfpv3xd\fR, \fBvfpv3xd\-fp16\fR,
+\&\fBneon\fR, \fBneon\-fp16\fR, \fBvfpv4\fR, \fBvfpv4\-d16\fR,
+\&\fBfpv4\-sp\-d16\fR and \fBneon\-vfpv4\fR.
+\&\fB\-mfp\fR and \fB\-mfpe\fR are synonyms for
+\&\fB\-mfpu\fR=\fBfpe\fR\fInumber\fR, for compatibility with older versions
+of \s-1GCC\s0.
+.Sp
+If \fB\-msoft\-float\fR is specified this specifies the format of
+floating point values.
+.Sp
+If the selected floating-point hardware includes the \s-1NEON\s0 extension
+(e.g. \fB\-mfpu\fR=\fBneon\fR), note that floating-point
+operations will not be used by \s-1GCC\s0's auto-vectorization pass unless
+\&\fB\-funsafe\-math\-optimizations\fR is also specified.  This is
+because \s-1NEON\s0 hardware does not fully implement the \s-1IEEE\s0 754 standard for
+floating-point arithmetic (in particular denormal values are treated as
+zero), so the use of \s-1NEON\s0 instructions may lead to a loss of precision.
+.IP "\fB\-mfp16\-format=\fR\fIname\fR" 4
+.IX Item "-mfp16-format=name"
+Specify the format of the \f(CW\*(C`_\|_fp16\*(C'\fR half-precision floating-point type.
+Permissible names are \fBnone\fR, \fBieee\fR, and \fBalternative\fR;
+the default is \fBnone\fR, in which case the \f(CW\*(C`_\|_fp16\*(C'\fR type is not
+defined.
+.IP "\fB\-mstructure\-size\-boundary=\fR\fIn\fR" 4
+.IX Item "-mstructure-size-boundary=n"
+The size of all structures and unions will be rounded up to a multiple
+of the number of bits set by this option.  Permissible values are 8, 32
+and 64.  The default value varies for different toolchains.  For the \s-1COFF\s0
+targeted toolchain the default value is 8.  A value of 64 is only allowed
+if the underlying \s-1ABI\s0 supports it.
+.Sp
+Specifying the larger number can produce faster, more efficient code, but
+can also increase the size of the program.  Different values are potentially
+incompatible.  Code compiled with one value cannot necessarily expect to
+work with code or libraries compiled with another value, if they exchange
+information using structures or unions.
+.IP "\fB\-mabort\-on\-noreturn\fR" 4
+.IX Item "-mabort-on-noreturn"
+Generate a call to the function \f(CW\*(C`abort\*(C'\fR at the end of a
+\&\f(CW\*(C`noreturn\*(C'\fR function.  It will be executed if the function tries to
+return.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Tells the compiler to perform function calls by first loading the
+address of the function into a register and then performing a subroutine
+call on this register.  This switch is needed if the target function
+will lie outside of the 64 megabyte addressing range of the offset based
+version of subroutine call instruction.
+.Sp
+Even if this switch is enabled, not all function calls will be turned
+into long calls.  The heuristic is that static functions, functions
+which have the \fBshort-call\fR attribute, functions that are inside
+the scope of a \fB#pragma no_long_calls\fR directive and functions whose
+definitions have already been compiled within the current compilation
+unit, will not be turned into long calls.  The exception to this rule is
+that weak function definitions, functions with the \fBlong-call\fR
+attribute or the \fBsection\fR attribute, and functions that are within
+the scope of a \fB#pragma long_calls\fR directive, will always be
+turned into long calls.
+.Sp
+This feature is not enabled by default.  Specifying
+\&\fB\-mno\-long\-calls\fR will restore the default behavior, as will
+placing the function calls within the scope of a \fB#pragma
+long_calls_off\fR directive.  Note these switches have no effect on how
+the compiler generates code to handle function calls via function
+pointers.
+.IP "\fB\-msingle\-pic\-base\fR" 4
+.IX Item "-msingle-pic-base"
+Treat the register used for \s-1PIC\s0 addressing as read-only, rather than
+loading it in the prologue for each function.  The run-time system is
+responsible for initializing this register with an appropriate value
+before execution begins.
+.IP "\fB\-mpic\-register=\fR\fIreg\fR" 4
+.IX Item "-mpic-register=reg"
+Specify the register to be used for \s-1PIC\s0 addressing.  The default is R10
+unless stack-checking is enabled, when R9 is used.
+.IP "\fB\-mcirrus\-fix\-invalid\-insns\fR" 4
+.IX Item "-mcirrus-fix-invalid-insns"
+Insert NOPs into the instruction stream to in order to work around
+problems with invalid Maverick instruction combinations.  This option
+is only valid if the \fB\-mcpu=ep9312\fR option has been used to
+enable generation of instructions for the Cirrus Maverick floating
+point co-processor.  This option is not enabled by default, since the
+problem is only present in older Maverick implementations.  The default
+can be re-enabled by use of the \fB\-mno\-cirrus\-fix\-invalid\-insns\fR
+switch.
+.IP "\fB\-mpoke\-function\-name\fR" 4
+.IX Item "-mpoke-function-name"
+Write the name of each function into the text section, directly
+preceding the function prologue.  The generated code is similar to this:
+.Sp
+.Vb 9
+\&             t0
+\&                 .ascii "arm_poke_function_name", 0
+\&                 .align
+\&             t1
+\&                 .word 0xff000000 + (t1 \- t0)
+\&             arm_poke_function_name
+\&                 mov     ip, sp
+\&                 stmfd   sp!, {fp, ip, lr, pc}
+\&                 sub     fp, ip, #4
+.Ve
+.Sp
+When performing a stack backtrace, code can inspect the value of
+\&\f(CW\*(C`pc\*(C'\fR stored at \f(CW\*(C`fp + 0\*(C'\fR.  If the trace function then looks at
+location \f(CW\*(C`pc \- 12\*(C'\fR and the top 8 bits are set, then we know that
+there is a function name embedded immediately preceding this location
+and has length \f(CW\*(C`((pc[\-3]) & 0xff000000)\*(C'\fR.
+.IP "\fB\-mthumb\fR" 4
+.IX Item "-mthumb"
+Generate code for the Thumb instruction set.  The default is to
+use the 32\-bit \s-1ARM\s0 instruction set.
+This option automatically enables either 16\-bit Thumb\-1 or
+mixed 16/32\-bit Thumb\-2 instructions based on the \fB\-mcpu=\fR\fIname\fR
+and \fB\-march=\fR\fIname\fR options.  This option is not passed to the
+assembler. If you want to force assembler files to be interpreted as Thumb code,
+either add a \fB.thumb\fR directive to the source or pass the \fB\-mthumb\fR
+option directly to the assembler by prefixing it with \fB\-Wa\fR.
+.IP "\fB\-mtpcs\-frame\fR" 4
+.IX Item "-mtpcs-frame"
+Generate a stack frame that is compliant with the Thumb Procedure Call
+Standard for all non-leaf functions.  (A leaf function is one that does
+not call any other functions.)  The default is \fB\-mno\-tpcs\-frame\fR.
+.IP "\fB\-mtpcs\-leaf\-frame\fR" 4
+.IX Item "-mtpcs-leaf-frame"
+Generate a stack frame that is compliant with the Thumb Procedure Call
+Standard for all leaf functions.  (A leaf function is one that does
+not call any other functions.)  The default is \fB\-mno\-apcs\-leaf\-frame\fR.
+.IP "\fB\-mcallee\-super\-interworking\fR" 4
+.IX Item "-mcallee-super-interworking"
+Gives all externally visible functions in the file being compiled an \s-1ARM\s0
+instruction set header which switches to Thumb mode before executing the
+rest of the function.  This allows these functions to be called from
+non-interworking code.  This option is not valid in \s-1AAPCS\s0 configurations
+because interworking is enabled by default.
+.IP "\fB\-mcaller\-super\-interworking\fR" 4
+.IX Item "-mcaller-super-interworking"
+Allows calls via function pointers (including virtual functions) to
+execute correctly regardless of whether the target code has been
+compiled for interworking or not.  There is a small overhead in the cost
+of executing a function pointer if this option is enabled.  This option
+is not valid in \s-1AAPCS\s0 configurations because interworking is enabled
+by default.
+.IP "\fB\-mtp=\fR\fIname\fR" 4
+.IX Item "-mtp=name"
+Specify the access model for the thread local storage pointer.  The valid
+models are \fBsoft\fR, which generates calls to \f(CW\*(C`_\|_aeabi_read_tp\*(C'\fR,
+\&\fBcp15\fR, which fetches the thread pointer from \f(CW\*(C`cp15\*(C'\fR directly
+(supported in the arm6k architecture), and \fBauto\fR, which uses the
+best available method for the selected processor.  The default setting is
+\&\fBauto\fR.
+.IP "\fB\-mword\-relocations\fR" 4
+.IX Item "-mword-relocations"
+Only generate absolute relocations on word sized values (i.e. R_ARM_ABS32).
+This is enabled by default on targets (uClinux, SymbianOS) where the runtime
+loader imposes this restriction, and when \fB\-fpic\fR or \fB\-fPIC\fR
+is specified.
+.IP "\fB\-mfix\-cortex\-m3\-ldrd\fR" 4
+.IX Item "-mfix-cortex-m3-ldrd"
+Some Cortex\-M3 cores can cause data corruption when \f(CW\*(C`ldrd\*(C'\fR instructions
+with overlapping destination and base registers are used.  This option avoids
+generating these instructions.  This option is enabled by default when
+\&\fB\-mcpu=cortex\-m3\fR is specified.
+.PP
+\fI\s-1AVR\s0 Options\fR
+.IX Subsection "AVR Options"
+.PP
+These options are defined for \s-1AVR\s0 implementations:
+.IP "\fB\-mmcu=\fR\fImcu\fR" 4
+.IX Item "-mmcu=mcu"
+Specify \s-1ATMEL\s0 \s-1AVR\s0 instruction set or \s-1MCU\s0 type.
+.Sp
+Instruction set avr1 is for the minimal \s-1AVR\s0 core, not supported by the C
+compiler, only for assembler programs (\s-1MCU\s0 types: at90s1200, attiny10,
+attiny11, attiny12, attiny15, attiny28).
+.Sp
+Instruction set avr2 (default) is for the classic \s-1AVR\s0 core with up to
+8K program memory space (\s-1MCU\s0 types: at90s2313, at90s2323, attiny22,
+at90s2333, at90s2343, at90s4414, at90s4433, at90s4434, at90s8515,
+at90c8534, at90s8535).
+.Sp
+Instruction set avr3 is for the classic \s-1AVR\s0 core with up to 128K program
+memory space (\s-1MCU\s0 types: atmega103, atmega603, at43usb320, at76c711).
+.Sp
+Instruction set avr4 is for the enhanced \s-1AVR\s0 core with up to 8K program
+memory space (\s-1MCU\s0 types: atmega8, atmega83, atmega85).
+.Sp
+Instruction set avr5 is for the enhanced \s-1AVR\s0 core with up to 128K program
+memory space (\s-1MCU\s0 types: atmega16, atmega161, atmega163, atmega32, atmega323,
+atmega64, atmega128, at43usb355, at94k).
+.IP "\fB\-mno\-interrupts\fR" 4
+.IX Item "-mno-interrupts"
+Generated code is not compatible with hardware interrupts.
+Code size will be smaller.
+.IP "\fB\-mcall\-prologues\fR" 4
+.IX Item "-mcall-prologues"
+Functions prologues/epilogues expanded as call to appropriate
+subroutines.  Code size will be smaller.
+.IP "\fB\-mtiny\-stack\fR" 4
+.IX Item "-mtiny-stack"
+Change only the low 8 bits of the stack pointer.
+.IP "\fB\-mint8\fR" 4
+.IX Item "-mint8"
+Assume int to be 8 bit integer.  This affects the sizes of all types: A
+char will be 1 byte, an int will be 1 byte, a long will be 2 bytes
+and long long will be 4 bytes.  Please note that this option does not
+comply to the C standards, but it will provide you with smaller code
+size.
+.PP
+\f(CW\*(C`EIND\*(C'\fR and Devices with more than 128k Bytes of Flash
+.IX Subsection "EIND and Devices with more than 128k Bytes of Flash"
+.PP
+Pointers in the implementation are 16 bits wide.
+The address of a function or label is represented as word address so
+that indirect jumps and calls can address any code address in the
+range of 64k words.
+.PP
+In order to faciliate indirect jump on devices with more than 128k
+bytes of program memory space, there is a special function register called
+\&\f(CW\*(C`EIND\*(C'\fR that serves as most significant part of the target address
+when \f(CW\*(C`EICALL\*(C'\fR or \f(CW\*(C`EIJMP\*(C'\fR instructions are used.
+.PP
+Indirect jumps and calls on these devices are handled as follows and
+are subject to some limitations:
+.IP "\(bu" 4
+The compiler never sets \f(CW\*(C`EIND\*(C'\fR.
+.IP "\(bu" 4
+The startup code from libgcc never sets \f(CW\*(C`EIND\*(C'\fR.
+Notice that startup code is a blend of code from libgcc and avr-libc.
+For the impact of avr-libc on \f(CW\*(C`EIND\*(C'\fR, see the
+avr-libc\ user\ manual (\f(CW\*(C`http://nongnu.org/avr\-libc/user\-manual\*(C'\fR).
+.IP "\(bu" 4
+The compiler uses \f(CW\*(C`EIND\*(C'\fR implicitely in \f(CW\*(C`EICALL\*(C'\fR/\f(CW\*(C`EIJMP\*(C'\fR
+instructions or might read \f(CW\*(C`EIND\*(C'\fR directly.
+.IP "\(bu" 4
+The compiler assumes that \f(CW\*(C`EIND\*(C'\fR never changes during the startup
+code or run of the application. In particular, \f(CW\*(C`EIND\*(C'\fR is not
+saved/restored in function or interrupt service routine
+prologue/epilogue.
+.IP "\(bu" 4
+It is legitimate for user-specific startup code to set up \f(CW\*(C`EIND\*(C'\fR
+early, for example by means of initialization code located in
+section \f(CW\*(C`.init3\*(C'\fR, and thus prior to general startup code that
+initializes \s-1RAM\s0 and calls constructors.
+.IP "\(bu" 4
+For indirect calls to functions and computed goto, the linker will
+generate \fIstubs\fR. Stubs are jump pads sometimes also called
+\&\fItrampolines\fR. Thus, the indirect call/jump will jump to such a stub.
+The stub contains a direct jump to the desired address.
+.IP "\(bu" 4
+Stubs will be generated automatically by the linker if
+the following two conditions are met:
+.RS 4
+.ie n .IP "\-<The address of a label is taken by means of the ""gs"" modifier>" 4
+.el .IP "\-<The address of a label is taken by means of the \f(CWgs\fR modifier>" 4
+.IX Item "-<The address of a label is taken by means of the gs modifier>"
+(short for \fIgenerate stubs\fR) like so:
+.Sp
+.Vb 2
+\&        LDI r24, lo8(gs(<func>))
+\&        LDI r25, hi8(gs(<func>))
+.Ve
+.IP "\-<The final location of that label is in a code segment>" 4
+.IX Item "-<The final location of that label is in a code segment>"
+\&\fIoutside\fR the segment where the stubs are located.
+.RE
+.RS 4
+.RE
+.IP "\(bu" 4
+The compiler will emit such \f(CW\*(C`gs\*(C'\fR modifiers for code labels in the
+following situations:
+.RS 4
+.IP "\-<Taking address of a function or code label.>" 4
+.IX Item "-<Taking address of a function or code label.>"
+.PD 0
+.IP "\-<Computed goto.>" 4
+.IX Item "-<Computed goto.>"
+.IP "\-<If prologue-save function is used, see \fB\-mcall\-prologues\fR>" 4
+.IX Item "-<If prologue-save function is used, see -mcall-prologues>"
+.PD
+command line option.
+.IP "\-<Switch/case dispatch tables. If you do not want such dispatch>" 4
+.IX Item "-<Switch/case dispatch tables. If you do not want such dispatch>"
+tables you can specify the \fB\-fno\-jump\-tables\fR command line option.
+.IP "\-<C and \*(C+ constructors/destructors called during startup/shutdown.>" 4
+.IX Item "-<C and  constructors/destructors called during startup/shutdown.>"
+.PD 0
+.ie n .IP "\-<If the tools hit a ""gs()"" modifier explained above.>" 4
+.el .IP "\-<If the tools hit a \f(CWgs()\fR modifier explained above.>" 4
+.IX Item "-<If the tools hit a gs() modifier explained above.>"
+.RE
+.RS 4
+.RE
+.IP "\(bu" 4
+.PD
+The default linker script is arranged for code with \f(CW\*(C`EIND = 0\*(C'\fR.
+If code is supposed to work for a setup with \f(CW\*(C`EIND != 0\*(C'\fR, a custom
+linker script has to be used in order to place the sections whose
+name start with \f(CW\*(C`.trampolines\*(C'\fR into the segment where \f(CW\*(C`EIND\*(C'\fR
+points to.
+.IP "\(bu" 4
+Jumping to non-symbolic addresses like so is \fInot\fR supported:
+.Sp
+.Vb 5
+\&        int main (void)
+\&        {
+\&            /* Call function at word address 0x2 */
+\&            return ((int(*)(void)) 0x2)();
+\&        }
+.Ve
+.Sp
+Instead, a stub has to be set up:
+.Sp
+.Vb 3
+\&        int main (void)
+\&        {
+\&            extern int func_4 (void);
+\&        
+\&            /* Call function at byte address 0x4 */
+\&            return func_4();
+\&        }
+.Ve
+.Sp
+and the application be linked with \f(CW\*(C`\-Wl,\-\-defsym,func_4=0x4\*(C'\fR.
+Alternatively, \f(CW\*(C`func_4\*(C'\fR can be defined in the linker script.
+.PP
+\fIBlackfin Options\fR
+.IX Subsection "Blackfin Options"
+.IP "\fB\-mcpu=\fR\fIcpu\fR[\fB\-\fR\fIsirevision\fR]" 4
+.IX Item "-mcpu=cpu[-sirevision]"
+Specifies the name of the target Blackfin processor.  Currently, \fIcpu\fR
+can be one of \fBbf512\fR, \fBbf514\fR, \fBbf516\fR, \fBbf518\fR,
+\&\fBbf522\fR, \fBbf523\fR, \fBbf524\fR, \fBbf525\fR, \fBbf526\fR,
+\&\fBbf527\fR, \fBbf531\fR, \fBbf532\fR, \fBbf533\fR,
+\&\fBbf534\fR, \fBbf536\fR, \fBbf537\fR, \fBbf538\fR, \fBbf539\fR,
+\&\fBbf542\fR, \fBbf544\fR, \fBbf547\fR, \fBbf548\fR, \fBbf549\fR,
+\&\fBbf542m\fR, \fBbf544m\fR, \fBbf547m\fR, \fBbf548m\fR, \fBbf549m\fR,
+\&\fBbf561\fR.
+The optional \fIsirevision\fR specifies the silicon revision of the target
+Blackfin processor.  Any workarounds available for the targeted silicon revision
+will be enabled.  If \fIsirevision\fR is \fBnone\fR, no workarounds are enabled.
+If \fIsirevision\fR is \fBany\fR, all workarounds for the targeted processor
+will be enabled.  The \f(CW\*(C`_\|_SILICON_REVISION_\|_\*(C'\fR macro is defined to two
+hexadecimal digits representing the major and minor numbers in the silicon
+revision.  If \fIsirevision\fR is \fBnone\fR, the \f(CW\*(C`_\|_SILICON_REVISION_\|_\*(C'\fR
+is not defined.  If \fIsirevision\fR is \fBany\fR, the
+\&\f(CW\*(C`_\|_SILICON_REVISION_\|_\*(C'\fR is defined to be \f(CW0xffff\fR.
+If this optional \fIsirevision\fR is not used, \s-1GCC\s0 assumes the latest known
+silicon revision of the targeted Blackfin processor.
+.Sp
+Support for \fBbf561\fR is incomplete.  For \fBbf561\fR,
+Only the processor macro is defined.
+Without this option, \fBbf532\fR is used as the processor by default.
+The corresponding predefined processor macros for \fIcpu\fR is to
+be defined.  And for \fBbfin-elf\fR toolchain, this causes the hardware \s-1BSP\s0
+provided by libgloss to be linked in if \fB\-msim\fR is not given.
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+Specifies that the program will be run on the simulator.  This causes
+the simulator \s-1BSP\s0 provided by libgloss to be linked in.  This option
+has effect only for \fBbfin-elf\fR toolchain.
+Certain other options, such as \fB\-mid\-shared\-library\fR and
+\&\fB\-mfdpic\fR, imply \fB\-msim\fR.
+.IP "\fB\-momit\-leaf\-frame\-pointer\fR" 4
+.IX Item "-momit-leaf-frame-pointer"
+Don't keep the frame pointer in a register for leaf functions.  This
+avoids the instructions to save, set up and restore frame pointers and
+makes an extra register available in leaf functions.  The option
+\&\fB\-fomit\-frame\-pointer\fR removes the frame pointer for all functions
+which might make debugging harder.
+.IP "\fB\-mspecld\-anomaly\fR" 4
+.IX Item "-mspecld-anomaly"
+When enabled, the compiler will ensure that the generated code does not
+contain speculative loads after jump instructions. If this option is used,
+\&\f(CW\*(C`_\|_WORKAROUND_SPECULATIVE_LOADS\*(C'\fR is defined.
+.IP "\fB\-mno\-specld\-anomaly\fR" 4
+.IX Item "-mno-specld-anomaly"
+Don't generate extra code to prevent speculative loads from occurring.
+.IP "\fB\-mcsync\-anomaly\fR" 4
+.IX Item "-mcsync-anomaly"
+When enabled, the compiler will ensure that the generated code does not
+contain \s-1CSYNC\s0 or \s-1SSYNC\s0 instructions too soon after conditional branches.
+If this option is used, \f(CW\*(C`_\|_WORKAROUND_SPECULATIVE_SYNCS\*(C'\fR is defined.
+.IP "\fB\-mno\-csync\-anomaly\fR" 4
+.IX Item "-mno-csync-anomaly"
+Don't generate extra code to prevent \s-1CSYNC\s0 or \s-1SSYNC\s0 instructions from
+occurring too soon after a conditional branch.
+.IP "\fB\-mlow\-64k\fR" 4
+.IX Item "-mlow-64k"
+When enabled, the compiler is free to take advantage of the knowledge that
+the entire program fits into the low 64k of memory.
+.IP "\fB\-mno\-low\-64k\fR" 4
+.IX Item "-mno-low-64k"
+Assume that the program is arbitrarily large.  This is the default.
+.IP "\fB\-mstack\-check\-l1\fR" 4
+.IX Item "-mstack-check-l1"
+Do stack checking using information placed into L1 scratchpad memory by the
+uClinux kernel.
+.IP "\fB\-mid\-shared\-library\fR" 4
+.IX Item "-mid-shared-library"
+Generate code that supports shared libraries via the library \s-1ID\s0 method.
+This allows for execute in place and shared libraries in an environment
+without virtual memory management.  This option implies \fB\-fPIC\fR.
+With a \fBbfin-elf\fR target, this option implies \fB\-msim\fR.
+.IP "\fB\-mno\-id\-shared\-library\fR" 4
+.IX Item "-mno-id-shared-library"
+Generate code that doesn't assume \s-1ID\s0 based shared libraries are being used.
+This is the default.
+.IP "\fB\-mleaf\-id\-shared\-library\fR" 4
+.IX Item "-mleaf-id-shared-library"
+Generate code that supports shared libraries via the library \s-1ID\s0 method,
+but assumes that this library or executable won't link against any other
+\&\s-1ID\s0 shared libraries.  That allows the compiler to use faster code for jumps
+and calls.
+.IP "\fB\-mno\-leaf\-id\-shared\-library\fR" 4
+.IX Item "-mno-leaf-id-shared-library"
+Do not assume that the code being compiled won't link against any \s-1ID\s0 shared
+libraries.  Slower code will be generated for jump and call insns.
+.IP "\fB\-mshared\-library\-id=n\fR" 4
+.IX Item "-mshared-library-id=n"
+Specified the identification number of the \s-1ID\s0 based shared library being
+compiled.  Specifying a value of 0 will generate more compact code, specifying
+other values will force the allocation of that number to the current
+library but is no more space or time efficient than omitting this option.
+.IP "\fB\-msep\-data\fR" 4
+.IX Item "-msep-data"
+Generate code that allows the data segment to be located in a different
+area of memory from the text segment.  This allows for execute in place in
+an environment without virtual memory management by eliminating relocations
+against the text section.
+.IP "\fB\-mno\-sep\-data\fR" 4
+.IX Item "-mno-sep-data"
+Generate code that assumes that the data segment follows the text segment.
+This is the default.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Tells the compiler to perform function calls by first loading the
+address of the function into a register and then performing a subroutine
+call on this register.  This switch is needed if the target function
+will lie outside of the 24 bit addressing range of the offset based
+version of subroutine call instruction.
+.Sp
+This feature is not enabled by default.  Specifying
+\&\fB\-mno\-long\-calls\fR will restore the default behavior.  Note these
+switches have no effect on how the compiler generates code to handle
+function calls via function pointers.
+.IP "\fB\-mfast\-fp\fR" 4
+.IX Item "-mfast-fp"
+Link with the fast floating-point library. This library relaxes some of
+the \s-1IEEE\s0 floating-point standard's rules for checking inputs against
+Not-a-Number (\s-1NAN\s0), in the interest of performance.
+.IP "\fB\-minline\-plt\fR" 4
+.IX Item "-minline-plt"
+Enable inlining of \s-1PLT\s0 entries in function calls to functions that are
+not known to bind locally.  It has no effect without \fB\-mfdpic\fR.
+.IP "\fB\-mmulticore\fR" 4
+.IX Item "-mmulticore"
+Build standalone application for multicore Blackfin processor. Proper
+start files and link scripts will be used to support multicore.
+This option defines \f(CW\*(C`_\|_BFIN_MULTICORE\*(C'\fR. It can only be used with
+\&\fB\-mcpu=bf561\fR[\fB\-\fR\fIsirevision\fR]. It can be used with
+\&\fB\-mcorea\fR or \fB\-mcoreb\fR. If it's used without
+\&\fB\-mcorea\fR or \fB\-mcoreb\fR, single application/dual core
+programming model is used. In this model, the main function of Core B
+should be named as coreb_main. If it's used with \fB\-mcorea\fR or
+\&\fB\-mcoreb\fR, one application per core programming model is used.
+If this option is not used, single core application programming
+model is used.
+.IP "\fB\-mcorea\fR" 4
+.IX Item "-mcorea"
+Build standalone application for Core A of \s-1BF561\s0 when using
+one application per core programming model. Proper start files
+and link scripts will be used to support Core A. This option
+defines \f(CW\*(C`_\|_BFIN_COREA\*(C'\fR. It must be used with \fB\-mmulticore\fR.
+.IP "\fB\-mcoreb\fR" 4
+.IX Item "-mcoreb"
+Build standalone application for Core B of \s-1BF561\s0 when using
+one application per core programming model. Proper start files
+and link scripts will be used to support Core B. This option
+defines \f(CW\*(C`_\|_BFIN_COREB\*(C'\fR. When this option is used, coreb_main
+should be used instead of main. It must be used with
+\&\fB\-mmulticore\fR.
+.IP "\fB\-msdram\fR" 4
+.IX Item "-msdram"
+Build standalone application for \s-1SDRAM\s0. Proper start files and
+link scripts will be used to put the application into \s-1SDRAM\s0.
+Loader should initialize \s-1SDRAM\s0 before loading the application
+into \s-1SDRAM\s0. This option defines \f(CW\*(C`_\|_BFIN_SDRAM\*(C'\fR.
+.IP "\fB\-micplb\fR" 4
+.IX Item "-micplb"
+Assume that ICPLBs are enabled at runtime.  This has an effect on certain
+anomaly workarounds.  For Linux targets, the default is to assume ICPLBs
+are enabled; for standalone applications the default is off.
+.PP
+\fI\s-1CRIS\s0 Options\fR
+.IX Subsection "CRIS Options"
+.PP
+These options are defined specifically for the \s-1CRIS\s0 ports.
+.IP "\fB\-march=\fR\fIarchitecture-type\fR" 4
+.IX Item "-march=architecture-type"
+.PD 0
+.IP "\fB\-mcpu=\fR\fIarchitecture-type\fR" 4
+.IX Item "-mcpu=architecture-type"
+.PD
+Generate code for the specified architecture.  The choices for
+\&\fIarchitecture-type\fR are \fBv3\fR, \fBv8\fR and \fBv10\fR for
+respectively \s-1ETRAX\s0\ 4, \s-1ETRAX\s0\ 100, and \s-1ETRAX\s0\ 100\ \s-1LX\s0.
+Default is \fBv0\fR except for cris-axis-linux-gnu, where the default is
+\&\fBv10\fR.
+.IP "\fB\-mtune=\fR\fIarchitecture-type\fR" 4
+.IX Item "-mtune=architecture-type"
+Tune to \fIarchitecture-type\fR everything applicable about the generated
+code, except for the \s-1ABI\s0 and the set of available instructions.  The
+choices for \fIarchitecture-type\fR are the same as for
+\&\fB\-march=\fR\fIarchitecture-type\fR.
+.IP "\fB\-mmax\-stack\-frame=\fR\fIn\fR" 4
+.IX Item "-mmax-stack-frame=n"
+Warn when the stack frame of a function exceeds \fIn\fR bytes.
+.IP "\fB\-metrax4\fR" 4
+.IX Item "-metrax4"
+.PD 0
+.IP "\fB\-metrax100\fR" 4
+.IX Item "-metrax100"
+.PD
+The options \fB\-metrax4\fR and \fB\-metrax100\fR are synonyms for
+\&\fB\-march=v3\fR and \fB\-march=v8\fR respectively.
+.IP "\fB\-mmul\-bug\-workaround\fR" 4
+.IX Item "-mmul-bug-workaround"
+.PD 0
+.IP "\fB\-mno\-mul\-bug\-workaround\fR" 4
+.IX Item "-mno-mul-bug-workaround"
+.PD
+Work around a bug in the \f(CW\*(C`muls\*(C'\fR and \f(CW\*(C`mulu\*(C'\fR instructions for \s-1CPU\s0
+models where it applies.  This option is active by default.
+.IP "\fB\-mpdebug\fR" 4
+.IX Item "-mpdebug"
+Enable CRIS-specific verbose debug-related information in the assembly
+code.  This option also has the effect to turn off the \fB#NO_APP\fR
+formatted-code indicator to the assembler at the beginning of the
+assembly file.
+.IP "\fB\-mcc\-init\fR" 4
+.IX Item "-mcc-init"
+Do not use condition-code results from previous instruction; always emit
+compare and test instructions before use of condition codes.
+.IP "\fB\-mno\-side\-effects\fR" 4
+.IX Item "-mno-side-effects"
+Do not emit instructions with side-effects in addressing modes other than
+post-increment.
+.IP "\fB\-mstack\-align\fR" 4
+.IX Item "-mstack-align"
+.PD 0
+.IP "\fB\-mno\-stack\-align\fR" 4
+.IX Item "-mno-stack-align"
+.IP "\fB\-mdata\-align\fR" 4
+.IX Item "-mdata-align"
+.IP "\fB\-mno\-data\-align\fR" 4
+.IX Item "-mno-data-align"
+.IP "\fB\-mconst\-align\fR" 4
+.IX Item "-mconst-align"
+.IP "\fB\-mno\-const\-align\fR" 4
+.IX Item "-mno-const-align"
+.PD
+These options (no-options) arranges (eliminate arrangements) for the
+stack-frame, individual data and constants to be aligned for the maximum
+single data access size for the chosen \s-1CPU\s0 model.  The default is to
+arrange for 32\-bit alignment.  \s-1ABI\s0 details such as structure layout are
+not affected by these options.
+.IP "\fB\-m32\-bit\fR" 4
+.IX Item "-m32-bit"
+.PD 0
+.IP "\fB\-m16\-bit\fR" 4
+.IX Item "-m16-bit"
+.IP "\fB\-m8\-bit\fR" 4
+.IX Item "-m8-bit"
+.PD
+Similar to the stack\- data\- and const-align options above, these options
+arrange for stack-frame, writable data and constants to all be 32\-bit,
+16\-bit or 8\-bit aligned.  The default is 32\-bit alignment.
+.IP "\fB\-mno\-prologue\-epilogue\fR" 4
+.IX Item "-mno-prologue-epilogue"
+.PD 0
+.IP "\fB\-mprologue\-epilogue\fR" 4
+.IX Item "-mprologue-epilogue"
+.PD
+With \fB\-mno\-prologue\-epilogue\fR, the normal function prologue and
+epilogue that sets up the stack-frame are omitted and no return
+instructions or return sequences are generated in the code.  Use this
+option only together with visual inspection of the compiled code: no
+warnings or errors are generated when call-saved registers must be saved,
+or storage for local variable needs to be allocated.
+.IP "\fB\-mno\-gotplt\fR" 4
+.IX Item "-mno-gotplt"
+.PD 0
+.IP "\fB\-mgotplt\fR" 4
+.IX Item "-mgotplt"
+.PD
+With \fB\-fpic\fR and \fB\-fPIC\fR, don't generate (do generate)
+instruction sequences that load addresses for functions from the \s-1PLT\s0 part
+of the \s-1GOT\s0 rather than (traditional on other architectures) calls to the
+\&\s-1PLT\s0.  The default is \fB\-mgotplt\fR.
+.IP "\fB\-melf\fR" 4
+.IX Item "-melf"
+Legacy no-op option only recognized with the cris-axis-elf and
+cris-axis-linux-gnu targets.
+.IP "\fB\-mlinux\fR" 4
+.IX Item "-mlinux"
+Legacy no-op option only recognized with the cris-axis-linux-gnu target.
+.IP "\fB\-sim\fR" 4
+.IX Item "-sim"
+This option, recognized for the cris-axis-elf arranges
+to link with input-output functions from a simulator library.  Code,
+initialized data and zero-initialized data are allocated consecutively.
+.IP "\fB\-sim2\fR" 4
+.IX Item "-sim2"
+Like \fB\-sim\fR, but pass linker options to locate initialized data at
+0x40000000 and zero-initialized data at 0x80000000.
+.PP
+\fI\s-1CRX\s0 Options\fR
+.IX Subsection "CRX Options"
+.PP
+These options are defined specifically for the \s-1CRX\s0 ports.
+.IP "\fB\-mmac\fR" 4
+.IX Item "-mmac"
+Enable the use of multiply-accumulate instructions. Disabled by default.
+.IP "\fB\-mpush\-args\fR" 4
+.IX Item "-mpush-args"
+Push instructions will be used to pass outgoing arguments when functions
+are called. Enabled by default.
+.PP
+\fIDarwin Options\fR
+.IX Subsection "Darwin Options"
+.PP
+These options are defined for all architectures running the Darwin operating
+system.
+.PP
+\&\s-1FSF\s0 \s-1GCC\s0 on Darwin does not create \*(L"fat\*(R" object files; it will create
+an object file for the single architecture that it was built to
+target.  Apple's \s-1GCC\s0 on Darwin does create \*(L"fat\*(R" files if multiple
+\&\fB\-arch\fR options are used; it does so by running the compiler or
+linker multiple times and joining the results together with
+\&\fIlipo\fR.
+.PP
+The subtype of the file created (like \fBppc7400\fR or \fBppc970\fR or
+\&\fBi686\fR) is determined by the flags that specify the \s-1ISA\s0
+that \s-1GCC\s0 is targetting, like \fB\-mcpu\fR or \fB\-march\fR.  The
+\&\fB\-force_cpusubtype_ALL\fR option can be used to override this.
+.PP
+The Darwin tools vary in their behavior when presented with an \s-1ISA\s0
+mismatch.  The assembler, \fIas\fR, will only permit instructions to
+be used that are valid for the subtype of the file it is generating,
+so you cannot put 64\-bit instructions in a \fBppc750\fR object file.
+The linker for shared libraries, \fI/usr/bin/libtool\fR, will fail
+and print an error if asked to create a shared library with a less
+restrictive subtype than its input files (for instance, trying to put
+a \fBppc970\fR object file in a \fBppc7400\fR library).  The linker
+for executables, \fIld\fR, will quietly give the executable the most
+restrictive subtype of any of its input files.
+.IP "\fB\-F\fR\fIdir\fR" 4
+.IX Item "-Fdir"
+Add the framework directory \fIdir\fR to the head of the list of
+directories to be searched for header files.  These directories are
+interleaved with those specified by \fB\-I\fR options and are
+scanned in a left-to-right order.
+.Sp
+A framework directory is a directory with frameworks in it.  A
+framework is a directory with a \fB\*(L"Headers\*(R"\fR and/or
+\&\fB\*(L"PrivateHeaders\*(R"\fR directory contained directly in it that ends
+in \fB\*(L".framework\*(R"\fR.  The name of a framework is the name of this
+directory excluding the \fB\*(L".framework\*(R"\fR.  Headers associated with
+the framework are found in one of those two directories, with
+\&\fB\*(L"Headers\*(R"\fR being searched first.  A subframework is a framework
+directory that is in a framework's \fB\*(L"Frameworks\*(R"\fR directory.
+Includes of subframework headers can only appear in a header of a
+framework that contains the subframework, or in a sibling subframework
+header.  Two subframeworks are siblings if they occur in the same
+framework.  A subframework should not have the same name as a
+framework, a warning will be issued if this is violated.  Currently a
+subframework cannot have subframeworks, in the future, the mechanism
+may be extended to support this.  The standard frameworks can be found
+in \fB\*(L"/System/Library/Frameworks\*(R"\fR and
+\&\fB\*(L"/Library/Frameworks\*(R"\fR.  An example include looks like
+\&\f(CW\*(C`#include <Framework/header.h>\*(C'\fR, where \fBFramework\fR denotes
+the name of the framework and header.h is found in the
+\&\fB\*(L"PrivateHeaders\*(R"\fR or \fB\*(L"Headers\*(R"\fR directory.
+.IP "\fB\-iframework\fR\fIdir\fR" 4
+.IX Item "-iframeworkdir"
+Like \fB\-F\fR except the directory is a treated as a system
+directory.  The main difference between this \fB\-iframework\fR and
+\&\fB\-F\fR is that with \fB\-iframework\fR the compiler does not
+warn about constructs contained within header files found via
+\&\fIdir\fR.  This option is valid only for the C family of languages.
+.IP "\fB\-gused\fR" 4
+.IX Item "-gused"
+Emit debugging information for symbols that are used.  For \s-1STABS\s0
+debugging format, this enables \fB\-feliminate\-unused\-debug\-symbols\fR.
+This is by default \s-1ON\s0.
+.IP "\fB\-gfull\fR" 4
+.IX Item "-gfull"
+Emit debugging information for all symbols and types.
+.IP "\fB\-mmacosx\-version\-min=\fR\fIversion\fR" 4
+.IX Item "-mmacosx-version-min=version"
+The earliest version of MacOS X that this executable will run on
+is \fIversion\fR.  Typical values of \fIversion\fR include \f(CW10.1\fR,
+\&\f(CW10.2\fR, and \f(CW10.3.9\fR.
+.Sp
+If the compiler was built to use the system's headers by default,
+then the default for this option is the system version on which the
+compiler is running, otherwise the default is to make choices which
+are compatible with as many systems and code bases as possible.
+.IP "\fB\-mkernel\fR" 4
+.IX Item "-mkernel"
+Enable kernel development mode.  The \fB\-mkernel\fR option sets
+\&\fB\-static\fR, \fB\-fno\-common\fR, \fB\-fno\-cxa\-atexit\fR,
+\&\fB\-fno\-exceptions\fR, \fB\-fno\-non\-call\-exceptions\fR,
+\&\fB\-fapple\-kext\fR, \fB\-fno\-weak\fR and \fB\-fno\-rtti\fR where
+applicable.  This mode also sets \fB\-mno\-altivec\fR,
+\&\fB\-msoft\-float\fR, \fB\-fno\-builtin\fR and
+\&\fB\-mlong\-branch\fR for PowerPC targets.
+.IP "\fB\-mone\-byte\-bool\fR" 4
+.IX Item "-mone-byte-bool"
+Override the defaults for \fBbool\fR so that \fBsizeof(bool)==1\fR.
+By default \fBsizeof(bool)\fR is \fB4\fR when compiling for
+Darwin/PowerPC and \fB1\fR when compiling for Darwin/x86, so this
+option has no effect on x86.
+.Sp
+\&\fBWarning:\fR The \fB\-mone\-byte\-bool\fR switch causes \s-1GCC\s0
+to generate code that is not binary compatible with code generated
+without that switch.  Using this switch may require recompiling all
+other modules in a program, including system libraries.  Use this
+switch to conform to a non-default data model.
+.IP "\fB\-mfix\-and\-continue\fR" 4
+.IX Item "-mfix-and-continue"
+.PD 0
+.IP "\fB\-ffix\-and\-continue\fR" 4
+.IX Item "-ffix-and-continue"
+.IP "\fB\-findirect\-data\fR" 4
+.IX Item "-findirect-data"
+.PD
+Generate code suitable for fast turn around development.  Needed to
+enable gdb to dynamically load \f(CW\*(C`.o\*(C'\fR files into already running
+programs.  \fB\-findirect\-data\fR and \fB\-ffix\-and\-continue\fR
+are provided for backwards compatibility.
+.IP "\fB\-all_load\fR" 4
+.IX Item "-all_load"
+Loads all members of static archive libraries.
+See man \fIld\fR\|(1) for more information.
+.IP "\fB\-arch_errors_fatal\fR" 4
+.IX Item "-arch_errors_fatal"
+Cause the errors having to do with files that have the wrong architecture
+to be fatal.
+.IP "\fB\-bind_at_load\fR" 4
+.IX Item "-bind_at_load"
+Causes the output file to be marked such that the dynamic linker will
+bind all undefined references when the file is loaded or launched.
+.IP "\fB\-bundle\fR" 4
+.IX Item "-bundle"
+Produce a Mach-o bundle format file.
+See man \fIld\fR\|(1) for more information.
+.IP "\fB\-bundle_loader\fR \fIexecutable\fR" 4
+.IX Item "-bundle_loader executable"
+This option specifies the \fIexecutable\fR that will be loading the build
+output file being linked.  See man \fIld\fR\|(1) for more information.
+.IP "\fB\-dynamiclib\fR" 4
+.IX Item "-dynamiclib"
+When passed this option, \s-1GCC\s0 will produce a dynamic library instead of
+an executable when linking, using the Darwin \fIlibtool\fR command.
+.IP "\fB\-force_cpusubtype_ALL\fR" 4
+.IX Item "-force_cpusubtype_ALL"
+This causes \s-1GCC\s0's output file to have the \fI\s-1ALL\s0\fR subtype, instead of
+one controlled by the \fB\-mcpu\fR or \fB\-march\fR option.
+.IP "\fB\-allowable_client\fR  \fIclient_name\fR" 4
+.IX Item "-allowable_client  client_name"
+.PD 0
+.IP "\fB\-client_name\fR" 4
+.IX Item "-client_name"
+.IP "\fB\-compatibility_version\fR" 4
+.IX Item "-compatibility_version"
+.IP "\fB\-current_version\fR" 4
+.IX Item "-current_version"
+.IP "\fB\-dead_strip\fR" 4
+.IX Item "-dead_strip"
+.IP "\fB\-dependency\-file\fR" 4
+.IX Item "-dependency-file"
+.IP "\fB\-dylib_file\fR" 4
+.IX Item "-dylib_file"
+.IP "\fB\-dylinker_install_name\fR" 4
+.IX Item "-dylinker_install_name"
+.IP "\fB\-dynamic\fR" 4
+.IX Item "-dynamic"
+.IP "\fB\-exported_symbols_list\fR" 4
+.IX Item "-exported_symbols_list"
+.IP "\fB\-filelist\fR" 4
+.IX Item "-filelist"
+.IP "\fB\-flat_namespace\fR" 4
+.IX Item "-flat_namespace"
+.IP "\fB\-force_flat_namespace\fR" 4
+.IX Item "-force_flat_namespace"
+.IP "\fB\-headerpad_max_install_names\fR" 4
+.IX Item "-headerpad_max_install_names"
+.IP "\fB\-image_base\fR" 4
+.IX Item "-image_base"
+.IP "\fB\-init\fR" 4
+.IX Item "-init"
+.IP "\fB\-install_name\fR" 4
+.IX Item "-install_name"
+.IP "\fB\-keep_private_externs\fR" 4
+.IX Item "-keep_private_externs"
+.IP "\fB\-multi_module\fR" 4
+.IX Item "-multi_module"
+.IP "\fB\-multiply_defined\fR" 4
+.IX Item "-multiply_defined"
+.IP "\fB\-multiply_defined_unused\fR" 4
+.IX Item "-multiply_defined_unused"
+.IP "\fB\-noall_load\fR" 4
+.IX Item "-noall_load"
+.IP "\fB\-no_dead_strip_inits_and_terms\fR" 4
+.IX Item "-no_dead_strip_inits_and_terms"
+.IP "\fB\-nofixprebinding\fR" 4
+.IX Item "-nofixprebinding"
+.IP "\fB\-nomultidefs\fR" 4
+.IX Item "-nomultidefs"
+.IP "\fB\-noprebind\fR" 4
+.IX Item "-noprebind"
+.IP "\fB\-noseglinkedit\fR" 4
+.IX Item "-noseglinkedit"
+.IP "\fB\-pagezero_size\fR" 4
+.IX Item "-pagezero_size"
+.IP "\fB\-prebind\fR" 4
+.IX Item "-prebind"
+.IP "\fB\-prebind_all_twolevel_modules\fR" 4
+.IX Item "-prebind_all_twolevel_modules"
+.IP "\fB\-private_bundle\fR" 4
+.IX Item "-private_bundle"
+.IP "\fB\-read_only_relocs\fR" 4
+.IX Item "-read_only_relocs"
+.IP "\fB\-sectalign\fR" 4
+.IX Item "-sectalign"
+.IP "\fB\-sectobjectsymbols\fR" 4
+.IX Item "-sectobjectsymbols"
+.IP "\fB\-whyload\fR" 4
+.IX Item "-whyload"
+.IP "\fB\-seg1addr\fR" 4
+.IX Item "-seg1addr"
+.IP "\fB\-sectcreate\fR" 4
+.IX Item "-sectcreate"
+.IP "\fB\-sectobjectsymbols\fR" 4
+.IX Item "-sectobjectsymbols"
+.IP "\fB\-sectorder\fR" 4
+.IX Item "-sectorder"
+.IP "\fB\-segaddr\fR" 4
+.IX Item "-segaddr"
+.IP "\fB\-segs_read_only_addr\fR" 4
+.IX Item "-segs_read_only_addr"
+.IP "\fB\-segs_read_write_addr\fR" 4
+.IX Item "-segs_read_write_addr"
+.IP "\fB\-seg_addr_table\fR" 4
+.IX Item "-seg_addr_table"
+.IP "\fB\-seg_addr_table_filename\fR" 4
+.IX Item "-seg_addr_table_filename"
+.IP "\fB\-seglinkedit\fR" 4
+.IX Item "-seglinkedit"
+.IP "\fB\-segprot\fR" 4
+.IX Item "-segprot"
+.IP "\fB\-segs_read_only_addr\fR" 4
+.IX Item "-segs_read_only_addr"
+.IP "\fB\-segs_read_write_addr\fR" 4
+.IX Item "-segs_read_write_addr"
+.IP "\fB\-single_module\fR" 4
+.IX Item "-single_module"
+.IP "\fB\-static\fR" 4
+.IX Item "-static"
+.IP "\fB\-sub_library\fR" 4
+.IX Item "-sub_library"
+.IP "\fB\-sub_umbrella\fR" 4
+.IX Item "-sub_umbrella"
+.IP "\fB\-twolevel_namespace\fR" 4
+.IX Item "-twolevel_namespace"
+.IP "\fB\-umbrella\fR" 4
+.IX Item "-umbrella"
+.IP "\fB\-undefined\fR" 4
+.IX Item "-undefined"
+.IP "\fB\-unexported_symbols_list\fR" 4
+.IX Item "-unexported_symbols_list"
+.IP "\fB\-weak_reference_mismatches\fR" 4
+.IX Item "-weak_reference_mismatches"
+.IP "\fB\-whatsloaded\fR" 4
+.IX Item "-whatsloaded"
+.PD
+These options are passed to the Darwin linker.  The Darwin linker man page
+describes them in detail.
+.PP
+\fI\s-1DEC\s0 Alpha Options\fR
+.IX Subsection "DEC Alpha Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha implementations:
+.IP "\fB\-mno\-soft\-float\fR" 4
+.IX Item "-mno-soft-float"
+.PD 0
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD
+Use (do not use) the hardware floating-point instructions for
+floating-point operations.  When \fB\-msoft\-float\fR is specified,
+functions in \fIlibgcc.a\fR will be used to perform floating-point
+operations.  Unless they are replaced by routines that emulate the
+floating-point operations, or compiled in such a way as to call such
+emulations routines, these routines will issue floating-point
+operations.   If you are compiling for an Alpha without floating-point
+operations, you must ensure that the library is built so as not to call
+them.
+.Sp
+Note that Alpha implementations without floating-point operations are
+required to have floating-point registers.
+.IP "\fB\-mfp\-reg\fR" 4
+.IX Item "-mfp-reg"
+.PD 0
+.IP "\fB\-mno\-fp\-regs\fR" 4
+.IX Item "-mno-fp-regs"
+.PD
+Generate code that uses (does not use) the floating-point register set.
+\&\fB\-mno\-fp\-regs\fR implies \fB\-msoft\-float\fR.  If the floating-point
+register set is not used, floating point operands are passed in integer
+registers as if they were integers and floating-point results are passed
+in \f(CW$0\fR instead of \f(CW$f0\fR.  This is a non-standard calling sequence,
+so any function with a floating-point argument or return value called by code
+compiled with \fB\-mno\-fp\-regs\fR must also be compiled with that
+option.
+.Sp
+A typical use of this option is building a kernel that does not use,
+and hence need not save and restore, any floating-point registers.
+.IP "\fB\-mieee\fR" 4
+.IX Item "-mieee"
+The Alpha architecture implements floating-point hardware optimized for
+maximum performance.  It is mostly compliant with the \s-1IEEE\s0 floating
+point standard.  However, for full compliance, software assistance is
+required.  This option generates code fully \s-1IEEE\s0 compliant code
+\&\fIexcept\fR that the \fIinexact-flag\fR is not maintained (see below).
+If this option is turned on, the preprocessor macro \f(CW\*(C`_IEEE_FP\*(C'\fR is
+defined during compilation.  The resulting code is less efficient but is
+able to correctly support denormalized numbers and exceptional \s-1IEEE\s0
+values such as not-a-number and plus/minus infinity.  Other Alpha
+compilers call this option \fB\-ieee_with_no_inexact\fR.
+.IP "\fB\-mieee\-with\-inexact\fR" 4
+.IX Item "-mieee-with-inexact"
+This is like \fB\-mieee\fR except the generated code also maintains
+the \s-1IEEE\s0 \fIinexact-flag\fR.  Turning on this option causes the
+generated code to implement fully-compliant \s-1IEEE\s0 math.  In addition to
+\&\f(CW\*(C`_IEEE_FP\*(C'\fR, \f(CW\*(C`_IEEE_FP_EXACT\*(C'\fR is defined as a preprocessor
+macro.  On some Alpha implementations the resulting code may execute
+significantly slower than the code generated by default.  Since there is
+very little code that depends on the \fIinexact-flag\fR, you should
+normally not specify this option.  Other Alpha compilers call this
+option \fB\-ieee_with_inexact\fR.
+.IP "\fB\-mfp\-trap\-mode=\fR\fItrap-mode\fR" 4
+.IX Item "-mfp-trap-mode=trap-mode"
+This option controls what floating-point related traps are enabled.
+Other Alpha compilers call this option \fB\-fptm\fR \fItrap-mode\fR.
+The trap mode can be set to one of four values:
+.RS 4
+.IP "\fBn\fR" 4
+.IX Item "n"
+This is the default (normal) setting.  The only traps that are enabled
+are the ones that cannot be disabled in software (e.g., division by zero
+trap).
+.IP "\fBu\fR" 4
+.IX Item "u"
+In addition to the traps enabled by \fBn\fR, underflow traps are enabled
+as well.
+.IP "\fBsu\fR" 4
+.IX Item "su"
+Like \fBu\fR, but the instructions are marked to be safe for software
+completion (see Alpha architecture manual for details).
+.IP "\fBsui\fR" 4
+.IX Item "sui"
+Like \fBsu\fR, but inexact traps are enabled as well.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mfp\-rounding\-mode=\fR\fIrounding-mode\fR" 4
+.IX Item "-mfp-rounding-mode=rounding-mode"
+Selects the \s-1IEEE\s0 rounding mode.  Other Alpha compilers call this option
+\&\fB\-fprm\fR \fIrounding-mode\fR.  The \fIrounding-mode\fR can be one
+of:
+.RS 4
+.IP "\fBn\fR" 4
+.IX Item "n"
+Normal \s-1IEEE\s0 rounding mode.  Floating point numbers are rounded towards
+the nearest machine number or towards the even machine number in case
+of a tie.
+.IP "\fBm\fR" 4
+.IX Item "m"
+Round towards minus infinity.
+.IP "\fBc\fR" 4
+.IX Item "c"
+Chopped rounding mode.  Floating point numbers are rounded towards zero.
+.IP "\fBd\fR" 4
+.IX Item "d"
+Dynamic rounding mode.  A field in the floating point control register
+(\fIfpcr\fR, see Alpha architecture reference manual) controls the
+rounding mode in effect.  The C library initializes this register for
+rounding towards plus infinity.  Thus, unless your program modifies the
+\&\fIfpcr\fR, \fBd\fR corresponds to round towards plus infinity.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mtrap\-precision=\fR\fItrap-precision\fR" 4
+.IX Item "-mtrap-precision=trap-precision"
+In the Alpha architecture, floating point traps are imprecise.  This
+means without software assistance it is impossible to recover from a
+floating trap and program execution normally needs to be terminated.
+\&\s-1GCC\s0 can generate code that can assist operating system trap handlers
+in determining the exact location that caused a floating point trap.
+Depending on the requirements of an application, different levels of
+precisions can be selected:
+.RS 4
+.IP "\fBp\fR" 4
+.IX Item "p"
+Program precision.  This option is the default and means a trap handler
+can only identify which program caused a floating point exception.
+.IP "\fBf\fR" 4
+.IX Item "f"
+Function precision.  The trap handler can determine the function that
+caused a floating point exception.
+.IP "\fBi\fR" 4
+.IX Item "i"
+Instruction precision.  The trap handler can determine the exact
+instruction that caused a floating point exception.
+.RE
+.RS 4
+.Sp
+Other Alpha compilers provide the equivalent options called
+\&\fB\-scope_safe\fR and \fB\-resumption_safe\fR.
+.RE
+.IP "\fB\-mieee\-conformant\fR" 4
+.IX Item "-mieee-conformant"
+This option marks the generated code as \s-1IEEE\s0 conformant.  You must not
+use this option unless you also specify \fB\-mtrap\-precision=i\fR and either
+\&\fB\-mfp\-trap\-mode=su\fR or \fB\-mfp\-trap\-mode=sui\fR.  Its only effect
+is to emit the line \fB.eflag 48\fR in the function prologue of the
+generated assembly file.  Under \s-1DEC\s0 Unix, this has the effect that
+IEEE-conformant math library routines will be linked in.
+.IP "\fB\-mbuild\-constants\fR" 4
+.IX Item "-mbuild-constants"
+Normally \s-1GCC\s0 examines a 32\- or 64\-bit integer constant to
+see if it can construct it from smaller constants in two or three
+instructions.  If it cannot, it will output the constant as a literal and
+generate code to load it from the data segment at runtime.
+.Sp
+Use this option to require \s-1GCC\s0 to construct \fIall\fR integer constants
+using code, even if it takes more instructions (the maximum is six).
+.Sp
+You would typically use this option to build a shared library dynamic
+loader.  Itself a shared library, it must relocate itself in memory
+before it can find the variables and constants in its own data segment.
+.IP "\fB\-malpha\-as\fR" 4
+.IX Item "-malpha-as"
+.PD 0
+.IP "\fB\-mgas\fR" 4
+.IX Item "-mgas"
+.PD
+Select whether to generate code to be assembled by the vendor-supplied
+assembler (\fB\-malpha\-as\fR) or by the \s-1GNU\s0 assembler \fB\-mgas\fR.
+.IP "\fB\-mbwx\fR" 4
+.IX Item "-mbwx"
+.PD 0
+.IP "\fB\-mno\-bwx\fR" 4
+.IX Item "-mno-bwx"
+.IP "\fB\-mcix\fR" 4
+.IX Item "-mcix"
+.IP "\fB\-mno\-cix\fR" 4
+.IX Item "-mno-cix"
+.IP "\fB\-mfix\fR" 4
+.IX Item "-mfix"
+.IP "\fB\-mno\-fix\fR" 4
+.IX Item "-mno-fix"
+.IP "\fB\-mmax\fR" 4
+.IX Item "-mmax"
+.IP "\fB\-mno\-max\fR" 4
+.IX Item "-mno-max"
+.PD
+Indicate whether \s-1GCC\s0 should generate code to use the optional \s-1BWX\s0,
+\&\s-1CIX\s0, \s-1FIX\s0 and \s-1MAX\s0 instruction sets.  The default is to use the instruction
+sets supported by the \s-1CPU\s0 type specified via \fB\-mcpu=\fR option or that
+of the \s-1CPU\s0 on which \s-1GCC\s0 was built if none was specified.
+.IP "\fB\-mfloat\-vax\fR" 4
+.IX Item "-mfloat-vax"
+.PD 0
+.IP "\fB\-mfloat\-ieee\fR" 4
+.IX Item "-mfloat-ieee"
+.PD
+Generate code that uses (does not use) \s-1VAX\s0 F and G floating point
+arithmetic instead of \s-1IEEE\s0 single and double precision.
+.IP "\fB\-mexplicit\-relocs\fR" 4
+.IX Item "-mexplicit-relocs"
+.PD 0
+.IP "\fB\-mno\-explicit\-relocs\fR" 4
+.IX Item "-mno-explicit-relocs"
+.PD
+Older Alpha assemblers provided no way to generate symbol relocations
+except via assembler macros.  Use of these macros does not allow
+optimal instruction scheduling.  \s-1GNU\s0 binutils as of version 2.12
+supports a new syntax that allows the compiler to explicitly mark
+which relocations should apply to which instructions.  This option
+is mostly useful for debugging, as \s-1GCC\s0 detects the capabilities of
+the assembler when it is built and sets the default accordingly.
+.IP "\fB\-msmall\-data\fR" 4
+.IX Item "-msmall-data"
+.PD 0
+.IP "\fB\-mlarge\-data\fR" 4
+.IX Item "-mlarge-data"
+.PD
+When \fB\-mexplicit\-relocs\fR is in effect, static data is
+accessed via \fIgp-relative\fR relocations.  When \fB\-msmall\-data\fR
+is used, objects 8 bytes long or smaller are placed in a \fIsmall data area\fR
+(the \f(CW\*(C`.sdata\*(C'\fR and \f(CW\*(C`.sbss\*(C'\fR sections) and are accessed via
+16\-bit relocations off of the \f(CW$gp\fR register.  This limits the
+size of the small data area to 64KB, but allows the variables to be
+directly accessed via a single instruction.
+.Sp
+The default is \fB\-mlarge\-data\fR.  With this option the data area
+is limited to just below 2GB.  Programs that require more than 2GB of
+data must use \f(CW\*(C`malloc\*(C'\fR or \f(CW\*(C`mmap\*(C'\fR to allocate the data in the
+heap instead of in the program's data segment.
+.Sp
+When generating code for shared libraries, \fB\-fpic\fR implies
+\&\fB\-msmall\-data\fR and \fB\-fPIC\fR implies \fB\-mlarge\-data\fR.
+.IP "\fB\-msmall\-text\fR" 4
+.IX Item "-msmall-text"
+.PD 0
+.IP "\fB\-mlarge\-text\fR" 4
+.IX Item "-mlarge-text"
+.PD
+When \fB\-msmall\-text\fR is used, the compiler assumes that the
+code of the entire program (or shared library) fits in 4MB, and is
+thus reachable with a branch instruction.  When \fB\-msmall\-data\fR
+is used, the compiler can assume that all local symbols share the
+same \f(CW$gp\fR value, and thus reduce the number of instructions
+required for a function call from 4 to 1.
+.Sp
+The default is \fB\-mlarge\-text\fR.
+.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
+.IX Item "-mcpu=cpu_type"
+Set the instruction set and instruction scheduling parameters for
+machine type \fIcpu_type\fR.  You can specify either the \fB\s-1EV\s0\fR
+style name or the corresponding chip number.  \s-1GCC\s0 supports scheduling
+parameters for the \s-1EV4\s0, \s-1EV5\s0 and \s-1EV6\s0 family of processors and will
+choose the default values for the instruction set from the processor
+you specify.  If you do not specify a processor type, \s-1GCC\s0 will default
+to the processor on which the compiler was built.
+.Sp
+Supported values for \fIcpu_type\fR are
+.RS 4
+.IP "\fBev4\fR" 4
+.IX Item "ev4"
+.PD 0
+.IP "\fBev45\fR" 4
+.IX Item "ev45"
+.IP "\fB21064\fR" 4
+.IX Item "21064"
+.PD
+Schedules as an \s-1EV4\s0 and has no instruction set extensions.
+.IP "\fBev5\fR" 4
+.IX Item "ev5"
+.PD 0
+.IP "\fB21164\fR" 4
+.IX Item "21164"
+.PD
+Schedules as an \s-1EV5\s0 and has no instruction set extensions.
+.IP "\fBev56\fR" 4
+.IX Item "ev56"
+.PD 0
+.IP "\fB21164a\fR" 4
+.IX Item "21164a"
+.PD
+Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 extension.
+.IP "\fBpca56\fR" 4
+.IX Item "pca56"
+.PD 0
+.IP "\fB21164pc\fR" 4
+.IX Item "21164pc"
+.IP "\fB21164PC\fR" 4
+.IX Item "21164PC"
+.PD
+Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 and \s-1MAX\s0 extensions.
+.IP "\fBev6\fR" 4
+.IX Item "ev6"
+.PD 0
+.IP "\fB21264\fR" 4
+.IX Item "21264"
+.PD
+Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions.
+.IP "\fBev67\fR" 4
+.IX Item "ev67"
+.PD 0
+.IP "\fB21264a\fR" 4
+.IX Item "21264a"
+.PD
+Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1CIX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions.
+.RE
+.RS 4
+.Sp
+Native Linux/GNU toolchains also support the value \fBnative\fR,
+which selects the best architecture option for the host processor.
+\&\fB\-mcpu=native\fR has no effect if \s-1GCC\s0 does not recognize
+the processor.
+.RE
+.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
+.IX Item "-mtune=cpu_type"
+Set only the instruction scheduling parameters for machine type
+\&\fIcpu_type\fR.  The instruction set is not changed.
+.Sp
+Native Linux/GNU toolchains also support the value \fBnative\fR,
+which selects the best architecture option for the host processor.
+\&\fB\-mtune=native\fR has no effect if \s-1GCC\s0 does not recognize
+the processor.
+.IP "\fB\-mmemory\-latency=\fR\fItime\fR" 4
+.IX Item "-mmemory-latency=time"
+Sets the latency the scheduler should assume for typical memory
+references as seen by the application.  This number is highly
+dependent on the memory access patterns used by the application
+and the size of the external cache on the machine.
+.Sp
+Valid options for \fItime\fR are
+.RS 4
+.IP "\fInumber\fR" 4
+.IX Item "number"
+A decimal number representing clock cycles.
+.IP "\fBL1\fR" 4
+.IX Item "L1"
+.PD 0
+.IP "\fBL2\fR" 4
+.IX Item "L2"
+.IP "\fBL3\fR" 4
+.IX Item "L3"
+.IP "\fBmain\fR" 4
+.IX Item "main"
+.PD
+The compiler contains estimates of the number of clock cycles for
+\&\*(L"typical\*(R" \s-1EV4\s0 & \s-1EV5\s0 hardware for the Level 1, 2 & 3 caches
+(also called Dcache, Scache, and Bcache), as well as to main memory.
+Note that L3 is only valid for \s-1EV5\s0.
+.RE
+.RS 4
+.RE
+.PP
+\fI\s-1DEC\s0 Alpha/VMS Options\fR
+.IX Subsection "DEC Alpha/VMS Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha/VMS implementations:
+.IP "\fB\-mvms\-return\-codes\fR" 4
+.IX Item "-mvms-return-codes"
+Return \s-1VMS\s0 condition codes from main.  The default is to return \s-1POSIX\s0
+style condition (e.g. error) codes.
+.IP "\fB\-mdebug\-main=\fR\fIprefix\fR" 4
+.IX Item "-mdebug-main=prefix"
+Flag the first routine whose name starts with \fIprefix\fR as the main
+routine for the debugger.
+.IP "\fB\-mmalloc64\fR" 4
+.IX Item "-mmalloc64"
+Default to 64bit memory allocation routines.
+.PP
+\fI\s-1FR30\s0 Options\fR
+.IX Subsection "FR30 Options"
+.PP
+These options are defined specifically for the \s-1FR30\s0 port.
+.IP "\fB\-msmall\-model\fR" 4
+.IX Item "-msmall-model"
+Use the small address space model.  This can produce smaller code, but
+it does assume that all symbolic values and addresses will fit into a
+20\-bit range.
+.IP "\fB\-mno\-lsim\fR" 4
+.IX Item "-mno-lsim"
+Assume that run-time support has been provided and so there is no need
+to include the simulator library (\fIlibsim.a\fR) on the linker
+command line.
+.PP
+\fI\s-1FRV\s0 Options\fR
+.IX Subsection "FRV Options"
+.IP "\fB\-mgpr\-32\fR" 4
+.IX Item "-mgpr-32"
+Only use the first 32 general purpose registers.
+.IP "\fB\-mgpr\-64\fR" 4
+.IX Item "-mgpr-64"
+Use all 64 general purpose registers.
+.IP "\fB\-mfpr\-32\fR" 4
+.IX Item "-mfpr-32"
+Use only the first 32 floating point registers.
+.IP "\fB\-mfpr\-64\fR" 4
+.IX Item "-mfpr-64"
+Use all 64 floating point registers
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+Use hardware instructions for floating point operations.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Use library routines for floating point operations.
+.IP "\fB\-malloc\-cc\fR" 4
+.IX Item "-malloc-cc"
+Dynamically allocate condition code registers.
+.IP "\fB\-mfixed\-cc\fR" 4
+.IX Item "-mfixed-cc"
+Do not try to dynamically allocate condition code registers, only
+use \f(CW\*(C`icc0\*(C'\fR and \f(CW\*(C`fcc0\*(C'\fR.
+.IP "\fB\-mdword\fR" 4
+.IX Item "-mdword"
+Change \s-1ABI\s0 to use double word insns.
+.IP "\fB\-mno\-dword\fR" 4
+.IX Item "-mno-dword"
+Do not use double word instructions.
+.IP "\fB\-mdouble\fR" 4
+.IX Item "-mdouble"
+Use floating point double instructions.
+.IP "\fB\-mno\-double\fR" 4
+.IX Item "-mno-double"
+Do not use floating point double instructions.
+.IP "\fB\-mmedia\fR" 4
+.IX Item "-mmedia"
+Use media instructions.
+.IP "\fB\-mno\-media\fR" 4
+.IX Item "-mno-media"
+Do not use media instructions.
+.IP "\fB\-mmuladd\fR" 4
+.IX Item "-mmuladd"
+Use multiply and add/subtract instructions.
+.IP "\fB\-mno\-muladd\fR" 4
+.IX Item "-mno-muladd"
+Do not use multiply and add/subtract instructions.
+.IP "\fB\-mfdpic\fR" 4
+.IX Item "-mfdpic"
+Select the \s-1FDPIC\s0 \s-1ABI\s0, that uses function descriptors to represent
+pointers to functions.  Without any PIC/PIE\-related options, it
+implies \fB\-fPIE\fR.  With \fB\-fpic\fR or \fB\-fpie\fR, it
+assumes \s-1GOT\s0 entries and small data are within a 12\-bit range from the
+\&\s-1GOT\s0 base address; with \fB\-fPIC\fR or \fB\-fPIE\fR, \s-1GOT\s0 offsets
+are computed with 32 bits.
+With a \fBbfin-elf\fR target, this option implies \fB\-msim\fR.
+.IP "\fB\-minline\-plt\fR" 4
+.IX Item "-minline-plt"
+Enable inlining of \s-1PLT\s0 entries in function calls to functions that are
+not known to bind locally.  It has no effect without \fB\-mfdpic\fR.
+It's enabled by default if optimizing for speed and compiling for
+shared libraries (i.e., \fB\-fPIC\fR or \fB\-fpic\fR), or when an
+optimization option such as \fB\-O3\fR or above is present in the
+command line.
+.IP "\fB\-mTLS\fR" 4
+.IX Item "-mTLS"
+Assume a large \s-1TLS\s0 segment when generating thread-local code.
+.IP "\fB\-mtls\fR" 4
+.IX Item "-mtls"
+Do not assume a large \s-1TLS\s0 segment when generating thread-local code.
+.IP "\fB\-mgprel\-ro\fR" 4
+.IX Item "-mgprel-ro"
+Enable the use of \f(CW\*(C`GPREL\*(C'\fR relocations in the \s-1FDPIC\s0 \s-1ABI\s0 for data
+that is known to be in read-only sections.  It's enabled by default,
+except for \fB\-fpic\fR or \fB\-fpie\fR: even though it may help
+make the global offset table smaller, it trades 1 instruction for 4.
+With \fB\-fPIC\fR or \fB\-fPIE\fR, it trades 3 instructions for 4,
+one of which may be shared by multiple symbols, and it avoids the need
+for a \s-1GOT\s0 entry for the referenced symbol, so it's more likely to be a
+win.  If it is not, \fB\-mno\-gprel\-ro\fR can be used to disable it.
+.IP "\fB\-multilib\-library\-pic\fR" 4
+.IX Item "-multilib-library-pic"
+Link with the (library, not \s-1FD\s0) pic libraries.  It's implied by
+\&\fB\-mlibrary\-pic\fR, as well as by \fB\-fPIC\fR and
+\&\fB\-fpic\fR without \fB\-mfdpic\fR.  You should never have to use
+it explicitly.
+.IP "\fB\-mlinked\-fp\fR" 4
+.IX Item "-mlinked-fp"
+Follow the \s-1EABI\s0 requirement of always creating a frame pointer whenever
+a stack frame is allocated.  This option is enabled by default and can
+be disabled with \fB\-mno\-linked\-fp\fR.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+Use indirect addressing to call functions outside the current
+compilation unit.  This allows the functions to be placed anywhere
+within the 32\-bit address space.
+.IP "\fB\-malign\-labels\fR" 4
+.IX Item "-malign-labels"
+Try to align labels to an 8\-byte boundary by inserting nops into the
+previous packet.  This option only has an effect when \s-1VLIW\s0 packing
+is enabled.  It doesn't create new packets; it merely adds nops to
+existing ones.
+.IP "\fB\-mlibrary\-pic\fR" 4
+.IX Item "-mlibrary-pic"
+Generate position-independent \s-1EABI\s0 code.
+.IP "\fB\-macc\-4\fR" 4
+.IX Item "-macc-4"
+Use only the first four media accumulator registers.
+.IP "\fB\-macc\-8\fR" 4
+.IX Item "-macc-8"
+Use all eight media accumulator registers.
+.IP "\fB\-mpack\fR" 4
+.IX Item "-mpack"
+Pack \s-1VLIW\s0 instructions.
+.IP "\fB\-mno\-pack\fR" 4
+.IX Item "-mno-pack"
+Do not pack \s-1VLIW\s0 instructions.
+.IP "\fB\-mno\-eflags\fR" 4
+.IX Item "-mno-eflags"
+Do not mark \s-1ABI\s0 switches in e_flags.
+.IP "\fB\-mcond\-move\fR" 4
+.IX Item "-mcond-move"
+Enable the use of conditional-move instructions (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-cond\-move\fR" 4
+.IX Item "-mno-cond-move"
+Disable the use of conditional-move instructions.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mscc\fR" 4
+.IX Item "-mscc"
+Enable the use of conditional set instructions (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-scc\fR" 4
+.IX Item "-mno-scc"
+Disable the use of conditional set instructions.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mcond\-exec\fR" 4
+.IX Item "-mcond-exec"
+Enable the use of conditional execution (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-cond\-exec\fR" 4
+.IX Item "-mno-cond-exec"
+Disable the use of conditional execution.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mvliw\-branch\fR" 4
+.IX Item "-mvliw-branch"
+Run a pass to pack branches into \s-1VLIW\s0 instructions (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-vliw\-branch\fR" 4
+.IX Item "-mno-vliw-branch"
+Do not run a pass to pack branches into \s-1VLIW\s0 instructions.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mmulti\-cond\-exec\fR" 4
+.IX Item "-mmulti-cond-exec"
+Enable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution
+(default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-multi\-cond\-exec\fR" 4
+.IX Item "-mno-multi-cond-exec"
+Disable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mnested\-cond\-exec\fR" 4
+.IX Item "-mnested-cond-exec"
+Enable nested conditional execution optimizations (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-nested\-cond\-exec\fR" 4
+.IX Item "-mno-nested-cond-exec"
+Disable nested conditional execution optimizations.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-moptimize\-membar\fR" 4
+.IX Item "-moptimize-membar"
+This switch removes redundant \f(CW\*(C`membar\*(C'\fR instructions from the
+compiler generated code.  It is enabled by default.
+.IP "\fB\-mno\-optimize\-membar\fR" 4
+.IX Item "-mno-optimize-membar"
+This switch disables the automatic removal of redundant \f(CW\*(C`membar\*(C'\fR
+instructions from the generated code.
+.IP "\fB\-mtomcat\-stats\fR" 4
+.IX Item "-mtomcat-stats"
+Cause gas to print out tomcat statistics.
+.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
+.IX Item "-mcpu=cpu"
+Select the processor type for which to generate code.  Possible values are
+\&\fBfrv\fR, \fBfr550\fR, \fBtomcat\fR, \fBfr500\fR, \fBfr450\fR,
+\&\fBfr405\fR, \fBfr400\fR, \fBfr300\fR and \fBsimple\fR.
+.PP
+\fIGNU/Linux Options\fR
+.IX Subsection "GNU/Linux Options"
+.PP
+These \fB\-m\fR options are defined for GNU/Linux targets:
+.IP "\fB\-mglibc\fR" 4
+.IX Item "-mglibc"
+Use the \s-1GNU\s0 C library.  This is the default except
+on \fB*\-*\-linux\-*uclibc*\fR and \fB*\-*\-linux\-*android*\fR targets.
+.IP "\fB\-muclibc\fR" 4
+.IX Item "-muclibc"
+Use uClibc C library.  This is the default on
+\&\fB*\-*\-linux\-*uclibc*\fR targets.
+.IP "\fB\-mbionic\fR" 4
+.IX Item "-mbionic"
+Use Bionic C library.  This is the default on
+\&\fB*\-*\-linux\-*android*\fR targets.
+.IP "\fB\-mandroid\fR" 4
+.IX Item "-mandroid"
+Compile code compatible with Android platform.  This is the default on
+\&\fB*\-*\-linux\-*android*\fR targets.
+.Sp
+When compiling, this option enables \fB\-mbionic\fR, \fB\-fPIC\fR,
+\&\fB\-fno\-exceptions\fR and \fB\-fno\-rtti\fR by default.  When linking,
+this option makes the \s-1GCC\s0 driver pass Android-specific options to the linker.
+Finally, this option causes the preprocessor macro \f(CW\*(C`_\|_ANDROID_\|_\*(C'\fR
+to be defined.
+.IP "\fB\-tno\-android\-cc\fR" 4
+.IX Item "-tno-android-cc"
+Disable compilation effects of \fB\-mandroid\fR, i.e., do not enable
+\&\fB\-mbionic\fR, \fB\-fPIC\fR, \fB\-fno\-exceptions\fR and
+\&\fB\-fno\-rtti\fR by default.
+.IP "\fB\-tno\-android\-ld\fR" 4
+.IX Item "-tno-android-ld"
+Disable linking effects of \fB\-mandroid\fR, i.e., pass standard Linux
+linking options to the linker.
+.PP
+\fIH8/300 Options\fR
+.IX Subsection "H8/300 Options"
+.PP
+These \fB\-m\fR options are defined for the H8/300 implementations:
+.IP "\fB\-mrelax\fR" 4
+.IX Item "-mrelax"
+Shorten some address references at link time, when possible; uses the
+linker option \fB\-relax\fR.
+.IP "\fB\-mh\fR" 4
+.IX Item "-mh"
+Generate code for the H8/300H.
+.IP "\fB\-ms\fR" 4
+.IX Item "-ms"
+Generate code for the H8S.
+.IP "\fB\-mn\fR" 4
+.IX Item "-mn"
+Generate code for the H8S and H8/300H in the normal mode.  This switch
+must be used either with \fB\-mh\fR or \fB\-ms\fR.
+.IP "\fB\-ms2600\fR" 4
+.IX Item "-ms2600"
+Generate code for the H8S/2600.  This switch must be used with \fB\-ms\fR.
+.IP "\fB\-mint32\fR" 4
+.IX Item "-mint32"
+Make \f(CW\*(C`int\*(C'\fR data 32 bits by default.
+.IP "\fB\-malign\-300\fR" 4
+.IX Item "-malign-300"
+On the H8/300H and H8S, use the same alignment rules as for the H8/300.
+The default for the H8/300H and H8S is to align longs and floats on 4
+byte boundaries.
+\&\fB\-malign\-300\fR causes them to be aligned on 2 byte boundaries.
+This option has no effect on the H8/300.
+.PP
+\fI\s-1HPPA\s0 Options\fR
+.IX Subsection "HPPA Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1HPPA\s0 family of computers:
+.IP "\fB\-march=\fR\fIarchitecture-type\fR" 4
+.IX Item "-march=architecture-type"
+Generate code for the specified architecture.  The choices for
+\&\fIarchitecture-type\fR are \fB1.0\fR for \s-1PA\s0 1.0, \fB1.1\fR for \s-1PA\s0
+1.1, and \fB2.0\fR for \s-1PA\s0 2.0 processors.  Refer to
+\&\fI/usr/lib/sched.models\fR on an HP-UX system to determine the proper
+architecture option for your machine.  Code compiled for lower numbered
+architectures will run on higher numbered architectures, but not the
+other way around.
+.IP "\fB\-mpa\-risc\-1\-0\fR" 4
+.IX Item "-mpa-risc-1-0"
+.PD 0
+.IP "\fB\-mpa\-risc\-1\-1\fR" 4
+.IX Item "-mpa-risc-1-1"
+.IP "\fB\-mpa\-risc\-2\-0\fR" 4
+.IX Item "-mpa-risc-2-0"
+.PD
+Synonyms for \fB\-march=1.0\fR, \fB\-march=1.1\fR, and \fB\-march=2.0\fR respectively.
+.IP "\fB\-mbig\-switch\fR" 4
+.IX Item "-mbig-switch"
+Generate code suitable for big switch tables.  Use this option only if
+the assembler/linker complain about out of range branches within a switch
+table.
+.IP "\fB\-mjump\-in\-delay\fR" 4
+.IX Item "-mjump-in-delay"
+Fill delay slots of function calls with unconditional jump instructions
+by modifying the return pointer for the function call to be the target
+of the conditional jump.
+.IP "\fB\-mdisable\-fpregs\fR" 4
+.IX Item "-mdisable-fpregs"
+Prevent floating point registers from being used in any manner.  This is
+necessary for compiling kernels which perform lazy context switching of
+floating point registers.  If you use this option and attempt to perform
+floating point operations, the compiler will abort.
+.IP "\fB\-mdisable\-indexing\fR" 4
+.IX Item "-mdisable-indexing"
+Prevent the compiler from using indexing address modes.  This avoids some
+rather obscure problems when compiling \s-1MIG\s0 generated code under \s-1MACH\s0.
+.IP "\fB\-mno\-space\-regs\fR" 4
+.IX Item "-mno-space-regs"
+Generate code that assumes the target has no space registers.  This allows
+\&\s-1GCC\s0 to generate faster indirect calls and use unscaled index address modes.
+.Sp
+Such code is suitable for level 0 \s-1PA\s0 systems and kernels.
+.IP "\fB\-mfast\-indirect\-calls\fR" 4
+.IX Item "-mfast-indirect-calls"
+Generate code that assumes calls never cross space boundaries.  This
+allows \s-1GCC\s0 to emit code which performs faster indirect calls.
+.Sp
+This option will not work in the presence of shared libraries or nested
+functions.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use.  This is
+useful when compiling kernel code.  A register range is specified as
+two registers separated by a dash.  Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-mlong\-load\-store\fR" 4
+.IX Item "-mlong-load-store"
+Generate 3\-instruction load and store sequences as sometimes required by
+the HP-UX 10 linker.  This is equivalent to the \fB+k\fR option to
+the \s-1HP\s0 compilers.
+.IP "\fB\-mportable\-runtime\fR" 4
+.IX Item "-mportable-runtime"
+Use the portable calling conventions proposed by \s-1HP\s0 for \s-1ELF\s0 systems.
+.IP "\fB\-mgas\fR" 4
+.IX Item "-mgas"
+Enable the use of assembler directives only \s-1GAS\s0 understands.
+.IP "\fB\-mschedule=\fR\fIcpu-type\fR" 4
+.IX Item "-mschedule=cpu-type"
+Schedule code according to the constraints for the machine type
+\&\fIcpu-type\fR.  The choices for \fIcpu-type\fR are \fB700\fR
+\&\fB7100\fR, \fB7100LC\fR, \fB7200\fR, \fB7300\fR and \fB8000\fR.  Refer
+to \fI/usr/lib/sched.models\fR on an HP-UX system to determine the
+proper scheduling option for your machine.  The default scheduling is
+\&\fB8000\fR.
+.IP "\fB\-mlinker\-opt\fR" 4
+.IX Item "-mlinker-opt"
+Enable the optimization pass in the HP-UX linker.  Note this makes symbolic
+debugging impossible.  It also triggers a bug in the HP-UX 8 and HP-UX 9
+linkers in which they give bogus error messages when linking some programs.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Generate output containing library calls for floating point.
+\&\fBWarning:\fR the requisite libraries are not available for all \s-1HPPA\s0
+targets.  Normally the facilities of the machine's usual C compiler are
+used, but this cannot be done directly in cross-compilation.  You must make
+your own arrangements to provide suitable library functions for
+cross-compilation.
+.Sp
+\&\fB\-msoft\-float\fR changes the calling convention in the output file;
+therefore, it is only useful if you compile \fIall\fR of a program with
+this option.  In particular, you need to compile \fIlibgcc.a\fR, the
+library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
+this to work.
+.IP "\fB\-msio\fR" 4
+.IX Item "-msio"
+Generate the predefine, \f(CW\*(C`_SIO\*(C'\fR, for server \s-1IO\s0.  The default is
+\&\fB\-mwsio\fR.  This generates the predefines, \f(CW\*(C`_\|_hp9000s700\*(C'\fR,
+\&\f(CW\*(C`_\|_hp9000s700_\|_\*(C'\fR and \f(CW\*(C`_WSIO\*(C'\fR, for workstation \s-1IO\s0.  These
+options are available under HP-UX and HI-UX.
+.IP "\fB\-mgnu\-ld\fR" 4
+.IX Item "-mgnu-ld"
+Use \s-1GNU\s0 ld specific options.  This passes \fB\-shared\fR to ld when
+building a shared library.  It is the default when \s-1GCC\s0 is configured,
+explicitly or implicitly, with the \s-1GNU\s0 linker.  This option does not
+have any affect on which ld is called, it only changes what parameters
+are passed to that ld.  The ld that is called is determined by the
+\&\fB\-\-with\-ld\fR configure option, \s-1GCC\s0's program search path, and
+finally by the user's \fB\s-1PATH\s0\fR.  The linker used by \s-1GCC\s0 can be printed
+using \fBwhich `gcc \-print\-prog\-name=ld`\fR.  This option is only available
+on the 64 bit HP-UX \s-1GCC\s0, i.e. configured with \fBhppa*64*\-*\-hpux*\fR.
+.IP "\fB\-mhp\-ld\fR" 4
+.IX Item "-mhp-ld"
+Use \s-1HP\s0 ld specific options.  This passes \fB\-b\fR to ld when building
+a shared library and passes \fB+Accept TypeMismatch\fR to ld on all
+links.  It is the default when \s-1GCC\s0 is configured, explicitly or
+implicitly, with the \s-1HP\s0 linker.  This option does not have any affect on
+which ld is called, it only changes what parameters are passed to that
+ld.  The ld that is called is determined by the \fB\-\-with\-ld\fR
+configure option, \s-1GCC\s0's program search path, and finally by the user's
+\&\fB\s-1PATH\s0\fR.  The linker used by \s-1GCC\s0 can be printed using \fBwhich
+`gcc \-print\-prog\-name=ld`\fR.  This option is only available on the 64 bit
+HP-UX \s-1GCC\s0, i.e. configured with \fBhppa*64*\-*\-hpux*\fR.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+Generate code that uses long call sequences.  This ensures that a call
+is always able to reach linker generated stubs.  The default is to generate
+long calls only when the distance from the call site to the beginning
+of the function or translation unit, as the case may be, exceeds a
+predefined limit set by the branch type being used.  The limits for
+normal calls are 7,600,000 and 240,000 bytes, respectively for the
+\&\s-1PA\s0 2.0 and \s-1PA\s0 1.X architectures.  Sibcalls are always limited at
+240,000 bytes.
+.Sp
+Distances are measured from the beginning of functions when using the
+\&\fB\-ffunction\-sections\fR option, or when using the \fB\-mgas\fR
+and \fB\-mno\-portable\-runtime\fR options together under HP-UX with
+the \s-1SOM\s0 linker.
+.Sp
+It is normally not desirable to use this option as it will degrade
+performance.  However, it may be useful in large applications,
+particularly when partial linking is used to build the application.
+.Sp
+The types of long calls used depends on the capabilities of the
+assembler and linker, and the type of code being generated.  The
+impact on systems that support long absolute calls, and long pic
+symbol-difference or pc-relative calls should be relatively small.
+However, an indirect call is used on 32\-bit \s-1ELF\s0 systems in pic code
+and it is quite long.
+.IP "\fB\-munix=\fR\fIunix-std\fR" 4
+.IX Item "-munix=unix-std"
+Generate compiler predefines and select a startfile for the specified
+\&\s-1UNIX\s0 standard.  The choices for \fIunix-std\fR are \fB93\fR, \fB95\fR
+and \fB98\fR.  \fB93\fR is supported on all HP-UX versions.  \fB95\fR
+is available on HP-UX 10.10 and later.  \fB98\fR is available on HP-UX
+11.11 and later.  The default values are \fB93\fR for HP-UX 10.00,
+\&\fB95\fR for HP-UX 10.10 though to 11.00, and \fB98\fR for HP-UX 11.11
+and later.
+.Sp
+\&\fB\-munix=93\fR provides the same predefines as \s-1GCC\s0 3.3 and 3.4.
+\&\fB\-munix=95\fR provides additional predefines for \f(CW\*(C`XOPEN_UNIX\*(C'\fR
+and \f(CW\*(C`_XOPEN_SOURCE_EXTENDED\*(C'\fR, and the startfile \fIunix95.o\fR.
+\&\fB\-munix=98\fR provides additional predefines for \f(CW\*(C`_XOPEN_UNIX\*(C'\fR,
+\&\f(CW\*(C`_XOPEN_SOURCE_EXTENDED\*(C'\fR, \f(CW\*(C`_INCLUDE_\|_STDC_A1_SOURCE\*(C'\fR and
+\&\f(CW\*(C`_INCLUDE_XOPEN_SOURCE_500\*(C'\fR, and the startfile \fIunix98.o\fR.
+.Sp
+It is \fIimportant\fR to note that this option changes the interfaces
+for various library routines.  It also affects the operational behavior
+of the C library.  Thus, \fIextreme\fR care is needed in using this
+option.
+.Sp
+Library code that is intended to operate with more than one \s-1UNIX\s0
+standard must test, set and restore the variable \fI_\|_xpg4_extended_mask\fR
+as appropriate.  Most \s-1GNU\s0 software doesn't provide this capability.
+.IP "\fB\-nolibdld\fR" 4
+.IX Item "-nolibdld"
+Suppress the generation of link options to search libdld.sl when the
+\&\fB\-static\fR option is specified on HP-UX 10 and later.
+.IP "\fB\-static\fR" 4
+.IX Item "-static"
+The HP-UX implementation of setlocale in libc has a dependency on
+libdld.sl.  There isn't an archive version of libdld.sl.  Thus,
+when the \fB\-static\fR option is specified, special link options
+are needed to resolve this dependency.
+.Sp
+On HP-UX 10 and later, the \s-1GCC\s0 driver adds the necessary options to
+link with libdld.sl when the \fB\-static\fR option is specified.
+This causes the resulting binary to be dynamic.  On the 64\-bit port,
+the linkers generate dynamic binaries by default in any case.  The
+\&\fB\-nolibdld\fR option can be used to prevent the \s-1GCC\s0 driver from
+adding these link options.
+.IP "\fB\-threads\fR" 4
+.IX Item "-threads"
+Add support for multithreading with the \fIdce thread\fR library
+under HP-UX.  This option sets flags for both the preprocessor and
+linker.
+.PP
+\fIIntel 386 and \s-1AMD\s0 x86\-64 Options\fR
+.IX Subsection "Intel 386 and AMD x86-64 Options"
+.PP
+These \fB\-m\fR options are defined for the i386 and x86\-64 family of
+computers:
+.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
+.IX Item "-mtune=cpu-type"
+Tune to \fIcpu-type\fR everything applicable about the generated code, except
+for the \s-1ABI\s0 and the set of available instructions.  The choices for
+\&\fIcpu-type\fR are:
+.RS 4
+.IP "\fIgeneric\fR" 4
+.IX Item "generic"
+Produce code optimized for the most common \s-1IA32/AMD64/EM64T\s0 processors.
+If you know the \s-1CPU\s0 on which your code will run, then you should use
+the corresponding \fB\-mtune\fR option instead of
+\&\fB\-mtune=generic\fR.  But, if you do not know exactly what \s-1CPU\s0 users
+of your application will have, then you should use this option.
+.Sp
+As new processors are deployed in the marketplace, the behavior of this
+option will change.  Therefore, if you upgrade to a newer version of
+\&\s-1GCC\s0, the code generated option will change to reflect the processors
+that were most common when that version of \s-1GCC\s0 was released.
+.Sp
+There is no \fB\-march=generic\fR option because \fB\-march\fR
+indicates the instruction set the compiler can use, and there is no
+generic instruction set applicable to all processors.  In contrast,
+\&\fB\-mtune\fR indicates the processor (or, in this case, collection of
+processors) for which the code is optimized.
+.IP "\fInative\fR" 4
+.IX Item "native"
+This selects the \s-1CPU\s0 to tune for at compilation time by determining
+the processor type of the compiling machine.  Using \fB\-mtune=native\fR
+will produce code optimized for the local machine under the constraints
+of the selected instruction set.  Using \fB\-march=native\fR will
+enable all instruction subsets supported by the local machine (hence
+the result might not run on different machines).
+.IP "\fIi386\fR" 4
+.IX Item "i386"
+Original Intel's i386 \s-1CPU\s0.
+.IP "\fIi486\fR" 4
+.IX Item "i486"
+Intel's i486 \s-1CPU\s0.  (No scheduling is implemented for this chip.)
+.IP "\fIi586, pentium\fR" 4
+.IX Item "i586, pentium"
+Intel Pentium \s-1CPU\s0 with no \s-1MMX\s0 support.
+.IP "\fIpentium-mmx\fR" 4
+.IX Item "pentium-mmx"
+Intel PentiumMMX \s-1CPU\s0 based on Pentium core with \s-1MMX\s0 instruction set support.
+.IP "\fIpentiumpro\fR" 4
+.IX Item "pentiumpro"
+Intel PentiumPro \s-1CPU\s0.
+.IP "\fIi686\fR" 4
+.IX Item "i686"
+Same as \f(CW\*(C`generic\*(C'\fR, but when used as \f(CW\*(C`march\*(C'\fR option, PentiumPro
+instruction set will be used, so the code will run on all i686 family chips.
+.IP "\fIpentium2\fR" 4
+.IX Item "pentium2"
+Intel Pentium2 \s-1CPU\s0 based on PentiumPro core with \s-1MMX\s0 instruction set support.
+.IP "\fIpentium3, pentium3m\fR" 4
+.IX Item "pentium3, pentium3m"
+Intel Pentium3 \s-1CPU\s0 based on PentiumPro core with \s-1MMX\s0 and \s-1SSE\s0 instruction set
+support.
+.IP "\fIpentium-m\fR" 4
+.IX Item "pentium-m"
+Low power version of Intel Pentium3 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set
+support.  Used by Centrino notebooks.
+.IP "\fIpentium4, pentium4m\fR" 4
+.IX Item "pentium4, pentium4m"
+Intel Pentium4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set support.
+.IP "\fIprescott\fR" 4
+.IX Item "prescott"
+Improved version of Intel Pentium4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0 and \s-1SSE3\s0 instruction
+set support.
+.IP "\fInocona\fR" 4
+.IX Item "nocona"
+Improved version of Intel Pentium4 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0,
+\&\s-1SSE2\s0 and \s-1SSE3\s0 instruction set support.
+.IP "\fIcore2\fR" 4
+.IX Item "core2"
+Intel Core2 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0 and \s-1SSSE3\s0
+instruction set support.
+.IP "\fIcorei7\fR" 4
+.IX Item "corei7"
+Intel Core i7 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSSE3\s0, \s-1SSE4\s0.1
+and \s-1SSE4\s0.2 instruction set support.
+.IP "\fIcorei7\-avx\fR" 4
+.IX Item "corei7-avx"
+Intel Core i7 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSSE3\s0,
+\&\s-1SSE4\s0.1, \s-1SSE4\s0.2, \s-1AVX\s0, \s-1AES\s0 and \s-1PCLMUL\s0 instruction set support.
+.IP "\fIcore-avx-i\fR" 4
+.IX Item "core-avx-i"
+Intel Core \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSSE3\s0,
+\&\s-1SSE4\s0.1, \s-1SSE4\s0.2, \s-1AVX\s0, \s-1AES\s0, \s-1PCLMUL\s0, \s-1FSGSBASE\s0, \s-1RDRND\s0 and F16C instruction
+set support.
+.IP "\fIatom\fR" 4
+.IX Item "atom"
+Intel Atom \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0 and \s-1SSSE3\s0
+instruction set support.
+.IP "\fIk6\fR" 4
+.IX Item "k6"
+\&\s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 instruction set support.
+.IP "\fIk6\-2, k6\-3\fR" 4
+.IX Item "k6-2, k6-3"
+Improved versions of \s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 and 3DNow! instruction set support.
+.IP "\fIathlon, athlon-tbird\fR" 4
+.IX Item "athlon, athlon-tbird"
+\&\s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3dNOW!, enhanced 3DNow! and \s-1SSE\s0 prefetch instructions
+support.
+.IP "\fIathlon\-4, athlon-xp, athlon-mp\fR" 4
+.IX Item "athlon-4, athlon-xp, athlon-mp"
+Improved \s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3DNow!, enhanced 3DNow! and full \s-1SSE\s0
+instruction set support.
+.IP "\fIk8, opteron, athlon64, athlon-fx\fR" 4
+.IX Item "k8, opteron, athlon64, athlon-fx"
+\&\s-1AMD\s0 K8 core based CPUs with x86\-64 instruction set support.  (This supersets
+\&\s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, 3DNow!, enhanced 3DNow! and 64\-bit instruction set extensions.)
+.IP "\fIk8\-sse3, opteron\-sse3, athlon64\-sse3\fR" 4
+.IX Item "k8-sse3, opteron-sse3, athlon64-sse3"
+Improved versions of k8, opteron and athlon64 with \s-1SSE3\s0 instruction set support.
+.IP "\fIamdfam10, barcelona\fR" 4
+.IX Item "amdfam10, barcelona"
+\&\s-1AMD\s0 Family 10h core based CPUs with x86\-64 instruction set support.  (This
+supersets \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSE4A\s0, 3DNow!, enhanced 3DNow!, \s-1ABM\s0 and 64\-bit
+instruction set extensions.)
+.IP "\fIwinchip\-c6\fR" 4
+.IX Item "winchip-c6"
+\&\s-1IDT\s0 Winchip C6 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 instruction
+set support.
+.IP "\fIwinchip2\fR" 4
+.IX Item "winchip2"
+\&\s-1IDT\s0 Winchip2 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 and 3DNow!
+instruction set support.
+.IP "\fIc3\fR" 4
+.IX Item "c3"
+Via C3 \s-1CPU\s0 with \s-1MMX\s0 and 3DNow! instruction set support.  (No scheduling is
+implemented for this chip.)
+.IP "\fIc3\-2\fR" 4
+.IX Item "c3-2"
+Via C3\-2 \s-1CPU\s0 with \s-1MMX\s0 and \s-1SSE\s0 instruction set support.  (No scheduling is
+implemented for this chip.)
+.IP "\fIgeode\fR" 4
+.IX Item "geode"
+Embedded \s-1AMD\s0 \s-1CPU\s0 with \s-1MMX\s0 and 3DNow! instruction set support.
+.RE
+.RS 4
+.Sp
+While picking a specific \fIcpu-type\fR will schedule things appropriately
+for that particular chip, the compiler will not generate any code that
+does not run on the i386 without the \fB\-march=\fR\fIcpu-type\fR option
+being used.
+.RE
+.IP "\fB\-march=\fR\fIcpu-type\fR" 4
+.IX Item "-march=cpu-type"
+Generate instructions for the machine type \fIcpu-type\fR.  The choices
+for \fIcpu-type\fR are the same as for \fB\-mtune\fR.  Moreover,
+specifying \fB\-march=\fR\fIcpu-type\fR implies \fB\-mtune=\fR\fIcpu-type\fR.
+.IP "\fB\-mcpu=\fR\fIcpu-type\fR" 4
+.IX Item "-mcpu=cpu-type"
+A deprecated synonym for \fB\-mtune\fR.
+.IP "\fB\-mfpmath=\fR\fIunit\fR" 4
+.IX Item "-mfpmath=unit"
+Generate floating point arithmetics for selected unit \fIunit\fR.  The choices
+for \fIunit\fR are:
+.RS 4
+.IP "\fB387\fR" 4
+.IX Item "387"
+Use the standard 387 floating point coprocessor present majority of chips and
+emulated otherwise.  Code compiled with this option will run almost everywhere.
+The temporary results are computed in 80bit precision instead of precision
+specified by the type resulting in slightly different results compared to most
+of other chips.  See \fB\-ffloat\-store\fR for more detailed description.
+.Sp
+This is the default choice for i386 compiler.
+.IP "\fBsse\fR" 4
+.IX Item "sse"
+Use scalar floating point instructions present in the \s-1SSE\s0 instruction set.
+This instruction set is supported by Pentium3 and newer chips, in the \s-1AMD\s0 line
+by Athlon\-4, Athlon-xp and Athlon-mp chips.  The earlier version of \s-1SSE\s0
+instruction set supports only single precision arithmetics, thus the double and
+extended precision arithmetics is still done using 387.  Later version, present
+only in Pentium4 and the future \s-1AMD\s0 x86\-64 chips supports double precision
+arithmetics too.
+.Sp
+For the i386 compiler, you need to use \fB\-march=\fR\fIcpu-type\fR, \fB\-msse\fR
+or \fB\-msse2\fR switches to enable \s-1SSE\s0 extensions and make this option
+effective.  For the x86\-64 compiler, these extensions are enabled by default.
+.Sp
+The resulting code should be considerably faster in the majority of cases and avoid
+the numerical instability problems of 387 code, but may break some existing
+code that expects temporaries to be 80bit.
+.Sp
+This is the default choice for the x86\-64 compiler.
+.IP "\fBsse,387\fR" 4
+.IX Item "sse,387"
+.PD 0
+.IP "\fBsse+387\fR" 4
+.IX Item "sse+387"
+.IP "\fBboth\fR" 4
+.IX Item "both"
+.PD
+Attempt to utilize both instruction sets at once.  This effectively double the
+amount of available registers and on chips with separate execution units for
+387 and \s-1SSE\s0 the execution resources too.  Use this option with care, as it is
+still experimental, because the \s-1GCC\s0 register allocator does not model separate
+functional units well resulting in instable performance.
+.RE
+.RS 4
+.RE
+.IP "\fB\-masm=\fR\fIdialect\fR" 4
+.IX Item "-masm=dialect"
+Output asm instructions using selected \fIdialect\fR.  Supported
+choices are \fBintel\fR or \fBatt\fR (the default one).  Darwin does
+not support \fBintel\fR.
+.IP "\fB\-mieee\-fp\fR" 4
+.IX Item "-mieee-fp"
+.PD 0
+.IP "\fB\-mno\-ieee\-fp\fR" 4
+.IX Item "-mno-ieee-fp"
+.PD
+Control whether or not the compiler uses \s-1IEEE\s0 floating point
+comparisons.  These handle correctly the case where the result of a
+comparison is unordered.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Generate output containing library calls for floating point.
+\&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0.
+Normally the facilities of the machine's usual C compiler are used, but
+this can't be done directly in cross-compilation.  You must make your
+own arrangements to provide suitable library functions for
+cross-compilation.
+.Sp
+On machines where a function returns floating point results in the 80387
+register stack, some floating point opcodes may be emitted even if
+\&\fB\-msoft\-float\fR is used.
+.IP "\fB\-mno\-fp\-ret\-in\-387\fR" 4
+.IX Item "-mno-fp-ret-in-387"
+Do not use the \s-1FPU\s0 registers for return values of functions.
+.Sp
+The usual calling convention has functions return values of types
+\&\f(CW\*(C`float\*(C'\fR and \f(CW\*(C`double\*(C'\fR in an \s-1FPU\s0 register, even if there
+is no \s-1FPU\s0.  The idea is that the operating system should emulate
+an \s-1FPU\s0.
+.Sp
+The option \fB\-mno\-fp\-ret\-in\-387\fR causes such values to be returned
+in ordinary \s-1CPU\s0 registers instead.
+.IP "\fB\-mno\-fancy\-math\-387\fR" 4
+.IX Item "-mno-fancy-math-387"
+Some 387 emulators do not support the \f(CW\*(C`sin\*(C'\fR, \f(CW\*(C`cos\*(C'\fR and
+\&\f(CW\*(C`sqrt\*(C'\fR instructions for the 387.  Specify this option to avoid
+generating those instructions.  This option is the default on FreeBSD,
+OpenBSD and NetBSD.  This option is overridden when \fB\-march\fR
+indicates that the target \s-1CPU\s0 will always have an \s-1FPU\s0 and so the
+instruction will not need emulation.  As of revision 2.6.1, these
+instructions are not generated unless you also use the
+\&\fB\-funsafe\-math\-optimizations\fR switch.
+.IP "\fB\-malign\-double\fR" 4
+.IX Item "-malign-double"
+.PD 0
+.IP "\fB\-mno\-align\-double\fR" 4
+.IX Item "-mno-align-double"
+.PD
+Control whether \s-1GCC\s0 aligns \f(CW\*(C`double\*(C'\fR, \f(CW\*(C`long double\*(C'\fR, and
+\&\f(CW\*(C`long long\*(C'\fR variables on a two word boundary or a one word
+boundary.  Aligning \f(CW\*(C`double\*(C'\fR variables on a two word boundary will
+produce code that runs somewhat faster on a \fBPentium\fR at the
+expense of more memory.
+.Sp
+On x86\-64, \fB\-malign\-double\fR is enabled by default.
+.Sp
+\&\fBWarning:\fR if you use the \fB\-malign\-double\fR switch,
+structures containing the above types will be aligned differently than
+the published application binary interface specifications for the 386
+and will not be binary compatible with structures in code compiled
+without that switch.
+.IP "\fB\-m96bit\-long\-double\fR" 4
+.IX Item "-m96bit-long-double"
+.PD 0
+.IP "\fB\-m128bit\-long\-double\fR" 4
+.IX Item "-m128bit-long-double"
+.PD
+These switches control the size of \f(CW\*(C`long double\*(C'\fR type.  The i386
+application binary interface specifies the size to be 96 bits,
+so \fB\-m96bit\-long\-double\fR is the default in 32 bit mode.
+.Sp
+Modern architectures (Pentium and newer) would prefer \f(CW\*(C`long double\*(C'\fR
+to be aligned to an 8 or 16 byte boundary.  In arrays or structures
+conforming to the \s-1ABI\s0, this would not be possible.  So specifying a
+\&\fB\-m128bit\-long\-double\fR will align \f(CW\*(C`long double\*(C'\fR
+to a 16 byte boundary by padding the \f(CW\*(C`long double\*(C'\fR with an additional
+32 bit zero.
+.Sp
+In the x86\-64 compiler, \fB\-m128bit\-long\-double\fR is the default choice as
+its \s-1ABI\s0 specifies that \f(CW\*(C`long double\*(C'\fR is to be aligned on 16 byte boundary.
+.Sp
+Notice that neither of these options enable any extra precision over the x87
+standard of 80 bits for a \f(CW\*(C`long double\*(C'\fR.
+.Sp
+\&\fBWarning:\fR if you override the default value for your target \s-1ABI\s0, the
+structures and arrays containing \f(CW\*(C`long double\*(C'\fR variables will change
+their size as well as function calling convention for function taking
+\&\f(CW\*(C`long double\*(C'\fR will be modified.  Hence they will not be binary
+compatible with arrays or structures in code compiled without that switch.
+.IP "\fB\-mlarge\-data\-threshold=\fR\fInumber\fR" 4
+.IX Item "-mlarge-data-threshold=number"
+When \fB\-mcmodel=medium\fR is specified, the data greater than
+\&\fIthreshold\fR are placed in large data section.  This value must be the
+same across all object linked into the binary and defaults to 65535.
+.IP "\fB\-mrtd\fR" 4
+.IX Item "-mrtd"
+Use a different function-calling convention, in which functions that
+take a fixed number of arguments return with the \f(CW\*(C`ret\*(C'\fR \fInum\fR
+instruction, which pops their arguments while returning.  This saves one
+instruction in the caller since there is no need to pop the arguments
+there.
+.Sp
+You can specify that an individual function is called with this calling
+sequence with the function attribute \fBstdcall\fR.  You can also
+override the \fB\-mrtd\fR option by using the function attribute
+\&\fBcdecl\fR.
+.Sp
+\&\fBWarning:\fR this calling convention is incompatible with the one
+normally used on Unix, so you cannot use it if you need to call
+libraries compiled with the Unix compiler.
+.Sp
+Also, you must provide function prototypes for all functions that
+take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR);
+otherwise incorrect code will be generated for calls to those
+functions.
+.Sp
+In addition, seriously incorrect code will result if you call a
+function with too many arguments.  (Normally, extra arguments are
+harmlessly ignored.)
+.IP "\fB\-mregparm=\fR\fInum\fR" 4
+.IX Item "-mregparm=num"
+Control how many registers are used to pass integer arguments.  By
+default, no registers are used to pass arguments, and at most 3
+registers can be used.  You can control this behavior for a specific
+function by using the function attribute \fBregparm\fR.
+.Sp
+\&\fBWarning:\fR if you use this switch, and
+\&\fInum\fR is nonzero, then you must build all modules with the same
+value, including any libraries.  This includes the system libraries and
+startup modules.
+.IP "\fB\-msseregparm\fR" 4
+.IX Item "-msseregparm"
+Use \s-1SSE\s0 register passing conventions for float and double arguments
+and return values.  You can control this behavior for a specific
+function by using the function attribute \fBsseregparm\fR.
+.Sp
+\&\fBWarning:\fR if you use this switch then you must build all
+modules with the same value, including any libraries.  This includes
+the system libraries and startup modules.
+.IP "\fB\-mvect8\-ret\-in\-mem\fR" 4
+.IX Item "-mvect8-ret-in-mem"
+Return 8\-byte vectors in memory instead of \s-1MMX\s0 registers.  This is the
+default on Solaris@tie{}8 and 9 and VxWorks to match the \s-1ABI\s0 of the Sun
+Studio compilers until version 12.  Later compiler versions (starting
+with Studio 12 Update@tie{}1) follow the \s-1ABI\s0 used by other x86 targets, which
+is the default on Solaris@tie{}10 and later.  \fIOnly\fR use this option if
+you need to remain compatible with existing code produced by those
+previous compiler versions or older versions of \s-1GCC\s0.
+.IP "\fB\-mpc32\fR" 4
+.IX Item "-mpc32"
+.PD 0
+.IP "\fB\-mpc64\fR" 4
+.IX Item "-mpc64"
+.IP "\fB\-mpc80\fR" 4
+.IX Item "-mpc80"
+.PD
+Set 80387 floating-point precision to 32, 64 or 80 bits.  When \fB\-mpc32\fR
+is specified, the significands of results of floating-point operations are
+rounded to 24 bits (single precision); \fB\-mpc64\fR rounds the
+significands of results of floating-point operations to 53 bits (double
+precision) and \fB\-mpc80\fR rounds the significands of results of
+floating-point operations to 64 bits (extended double precision), which is
+the default.  When this option is used, floating-point operations in higher
+precisions are not available to the programmer without setting the \s-1FPU\s0
+control word explicitly.
+.Sp
+Setting the rounding of floating-point operations to less than the default
+80 bits can speed some programs by 2% or more.  Note that some mathematical
+libraries assume that extended precision (80 bit) floating-point operations
+are enabled by default; routines in such libraries could suffer significant
+loss of accuracy, typically through so-called \*(L"catastrophic cancellation\*(R",
+when this option is used to set the precision to less than extended precision.
+.IP "\fB\-mstackrealign\fR" 4
+.IX Item "-mstackrealign"
+Realign the stack at entry.  On the Intel x86, the \fB\-mstackrealign\fR
+option will generate an alternate prologue and epilogue that realigns the
+runtime stack if necessary.  This supports mixing legacy codes that keep
+a 4\-byte aligned stack with modern codes that keep a 16\-byte stack for
+\&\s-1SSE\s0 compatibility.  See also the attribute \f(CW\*(C`force_align_arg_pointer\*(C'\fR,
+applicable to individual functions.
+.IP "\fB\-mpreferred\-stack\-boundary=\fR\fInum\fR" 4
+.IX Item "-mpreferred-stack-boundary=num"
+Attempt to keep the stack boundary aligned to a 2 raised to \fInum\fR
+byte boundary.  If \fB\-mpreferred\-stack\-boundary\fR is not specified,
+the default is 4 (16 bytes or 128 bits).
+.IP "\fB\-mincoming\-stack\-boundary=\fR\fInum\fR" 4
+.IX Item "-mincoming-stack-boundary=num"
+Assume the incoming stack is aligned to a 2 raised to \fInum\fR byte
+boundary.  If \fB\-mincoming\-stack\-boundary\fR is not specified,
+the one specified by \fB\-mpreferred\-stack\-boundary\fR will be used.
+.Sp
+On Pentium and PentiumPro, \f(CW\*(C`double\*(C'\fR and \f(CW\*(C`long double\*(C'\fR values
+should be aligned to an 8 byte boundary (see \fB\-malign\-double\fR) or
+suffer significant run time performance penalties.  On Pentium \s-1III\s0, the
+Streaming \s-1SIMD\s0 Extension (\s-1SSE\s0) data type \f(CW\*(C`_\|_m128\*(C'\fR may not work
+properly if it is not 16 byte aligned.
+.Sp
+To ensure proper alignment of this values on the stack, the stack boundary
+must be as aligned as that required by any value stored on the stack.
+Further, every function must be generated such that it keeps the stack
+aligned.  Thus calling a function compiled with a higher preferred
+stack boundary from a function compiled with a lower preferred stack
+boundary will most likely misalign the stack.  It is recommended that
+libraries that use callbacks always use the default setting.
+.Sp
+This extra alignment does consume extra stack space, and generally
+increases code size.  Code that is sensitive to stack space usage, such
+as embedded systems and operating system kernels, may want to reduce the
+preferred alignment to \fB\-mpreferred\-stack\-boundary=2\fR.
+.IP "\fB\-mmmx\fR" 4
+.IX Item "-mmmx"
+.PD 0
+.IP "\fB\-mno\-mmx\fR" 4
+.IX Item "-mno-mmx"
+.IP "\fB\-msse\fR" 4
+.IX Item "-msse"
+.IP "\fB\-mno\-sse\fR" 4
+.IX Item "-mno-sse"
+.IP "\fB\-msse2\fR" 4
+.IX Item "-msse2"
+.IP "\fB\-mno\-sse2\fR" 4
+.IX Item "-mno-sse2"
+.IP "\fB\-msse3\fR" 4
+.IX Item "-msse3"
+.IP "\fB\-mno\-sse3\fR" 4
+.IX Item "-mno-sse3"
+.IP "\fB\-mssse3\fR" 4
+.IX Item "-mssse3"
+.IP "\fB\-mno\-ssse3\fR" 4
+.IX Item "-mno-ssse3"
+.IP "\fB\-msse4.1\fR" 4
+.IX Item "-msse4.1"
+.IP "\fB\-mno\-sse4.1\fR" 4
+.IX Item "-mno-sse4.1"
+.IP "\fB\-msse4.2\fR" 4
+.IX Item "-msse4.2"
+.IP "\fB\-mno\-sse4.2\fR" 4
+.IX Item "-mno-sse4.2"
+.IP "\fB\-msse4\fR" 4
+.IX Item "-msse4"
+.IP "\fB\-mno\-sse4\fR" 4
+.IX Item "-mno-sse4"
+.IP "\fB\-mavx\fR" 4
+.IX Item "-mavx"
+.IP "\fB\-mno\-avx\fR" 4
+.IX Item "-mno-avx"
+.IP "\fB\-maes\fR" 4
+.IX Item "-maes"
+.IP "\fB\-mno\-aes\fR" 4
+.IX Item "-mno-aes"
+.IP "\fB\-mpclmul\fR" 4
+.IX Item "-mpclmul"
+.IP "\fB\-mno\-pclmul\fR" 4
+.IX Item "-mno-pclmul"
+.IP "\fB\-mfsgsbase\fR" 4
+.IX Item "-mfsgsbase"
+.IP "\fB\-mno\-fsgsbase\fR" 4
+.IX Item "-mno-fsgsbase"
+.IP "\fB\-mrdrnd\fR" 4
+.IX Item "-mrdrnd"
+.IP "\fB\-mno\-rdrnd\fR" 4
+.IX Item "-mno-rdrnd"
+.IP "\fB\-mf16c\fR" 4
+.IX Item "-mf16c"
+.IP "\fB\-mno\-f16c\fR" 4
+.IX Item "-mno-f16c"
+.IP "\fB\-msse4a\fR" 4
+.IX Item "-msse4a"
+.IP "\fB\-mno\-sse4a\fR" 4
+.IX Item "-mno-sse4a"
+.IP "\fB\-mfma4\fR" 4
+.IX Item "-mfma4"
+.IP "\fB\-mno\-fma4\fR" 4
+.IX Item "-mno-fma4"
+.IP "\fB\-mxop\fR" 4
+.IX Item "-mxop"
+.IP "\fB\-mno\-xop\fR" 4
+.IX Item "-mno-xop"
+.IP "\fB\-mlwp\fR" 4
+.IX Item "-mlwp"
+.IP "\fB\-mno\-lwp\fR" 4
+.IX Item "-mno-lwp"
+.IP "\fB\-m3dnow\fR" 4
+.IX Item "-m3dnow"
+.IP "\fB\-mno\-3dnow\fR" 4
+.IX Item "-mno-3dnow"
+.IP "\fB\-mpopcnt\fR" 4
+.IX Item "-mpopcnt"
+.IP "\fB\-mno\-popcnt\fR" 4
+.IX Item "-mno-popcnt"
+.IP "\fB\-mabm\fR" 4
+.IX Item "-mabm"
+.IP "\fB\-mno\-abm\fR" 4
+.IX Item "-mno-abm"
+.IP "\fB\-mbmi\fR" 4
+.IX Item "-mbmi"
+.IP "\fB\-mno\-bmi\fR" 4
+.IX Item "-mno-bmi"
+.IP "\fB\-mtbm\fR" 4
+.IX Item "-mtbm"
+.IP "\fB\-mno\-tbm\fR" 4
+.IX Item "-mno-tbm"
+.PD
+These switches enable or disable the use of instructions in the \s-1MMX\s0,
+\&\s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSSE3\s0, \s-1SSE4\s0.1, \s-1AVX\s0, \s-1AES\s0, \s-1PCLMUL\s0, \s-1FSGSBASE\s0, \s-1RDRND\s0,
+F16C, \s-1SSE4A\s0, \s-1FMA4\s0, \s-1XOP\s0, \s-1LWP\s0, \s-1ABM\s0, \s-1BMI\s0, or 3DNow! extended instruction sets.
+These extensions are also available as built-in functions: see
+\&\fBX86 Built-in Functions\fR, for details of the functions enabled and
+disabled by these switches.
+.Sp
+To have \s-1SSE/SSE2\s0 instructions generated automatically from floating-point
+code (as opposed to 387 instructions), see \fB\-mfpmath=sse\fR.
+.Sp
+\&\s-1GCC\s0 depresses SSEx instructions when \fB\-mavx\fR is used. Instead, it
+generates new \s-1AVX\s0 instructions or \s-1AVX\s0 equivalence for all SSEx instructions
+when needed.
+.Sp
+These options will enable \s-1GCC\s0 to use these extended instructions in
+generated code, even without \fB\-mfpmath=sse\fR.  Applications which
+perform runtime \s-1CPU\s0 detection must compile separate files for each
+supported architecture, using the appropriate flags.  In particular,
+the file containing the \s-1CPU\s0 detection code should be compiled without
+these options.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Do (don't) generate code that uses the fused multiply/add or multiply/subtract
+instructions.  The default is to use these instructions.
+.IP "\fB\-mcld\fR" 4
+.IX Item "-mcld"
+This option instructs \s-1GCC\s0 to emit a \f(CW\*(C`cld\*(C'\fR instruction in the prologue
+of functions that use string instructions.  String instructions depend on
+the \s-1DF\s0 flag to select between autoincrement or autodecrement mode.  While the
+\&\s-1ABI\s0 specifies the \s-1DF\s0 flag to be cleared on function entry, some operating
+systems violate this specification by not clearing the \s-1DF\s0 flag in their
+exception dispatchers.  The exception handler can be invoked with the \s-1DF\s0 flag
+set which leads to wrong direction mode, when string instructions are used.
+This option can be enabled by default on 32\-bit x86 targets by configuring
+\&\s-1GCC\s0 with the \fB\-\-enable\-cld\fR configure option.  Generation of \f(CW\*(C`cld\*(C'\fR
+instructions can be suppressed with the \fB\-mno\-cld\fR compiler option
+in this case.
+.IP "\fB\-mvzeroupper\fR" 4
+.IX Item "-mvzeroupper"
+This option instructs \s-1GCC\s0 to emit a \f(CW\*(C`vzeroupper\*(C'\fR instruction
+before a transfer of control flow out of the function to minimize
+\&\s-1AVX\s0 to \s-1SSE\s0 transition penalty as well as remove unnecessary zeroupper 
+intrinsics.
+.IP "\fB\-mprefer\-avx128\fR" 4
+.IX Item "-mprefer-avx128"
+This option instructs \s-1GCC\s0 to use 128\-bit \s-1AVX\s0 instructions instead of
+256\-bit \s-1AVX\s0 instructions in the auto-vectorizer.
+.IP "\fB\-mcx16\fR" 4
+.IX Item "-mcx16"
+This option will enable \s-1GCC\s0 to use \s-1CMPXCHG16B\s0 instruction in generated code.
+\&\s-1CMPXCHG16B\s0 allows for atomic operations on 128\-bit double quadword (or oword)
+data types.  This is useful for high resolution counters that could be updated
+by multiple processors (or cores).  This instruction is generated as part of
+atomic built-in functions: see \fBAtomic Builtins\fR for details.
+.IP "\fB\-msahf\fR" 4
+.IX Item "-msahf"
+This option will enable \s-1GCC\s0 to use \s-1SAHF\s0 instruction in generated 64\-bit code.
+Early Intel CPUs with Intel 64 lacked \s-1LAHF\s0 and \s-1SAHF\s0 instructions supported
+by \s-1AMD64\s0 until introduction of Pentium 4 G1 step in December 2005.  \s-1LAHF\s0 and
+\&\s-1SAHF\s0 are load and store instructions, respectively, for certain status flags.
+In 64\-bit mode, \s-1SAHF\s0 instruction is used to optimize \f(CW\*(C`fmod\*(C'\fR, \f(CW\*(C`drem\*(C'\fR
+or \f(CW\*(C`remainder\*(C'\fR built-in functions: see \fBOther Builtins\fR for details.
+.IP "\fB\-mmovbe\fR" 4
+.IX Item "-mmovbe"
+This option will enable \s-1GCC\s0 to use movbe instruction to implement
+\&\f(CW\*(C`_\|_builtin_bswap32\*(C'\fR and \f(CW\*(C`_\|_builtin_bswap64\*(C'\fR.
+.IP "\fB\-mcrc32\fR" 4
+.IX Item "-mcrc32"
+This option will enable built-in functions, \f(CW\*(C`_\|_builtin_ia32_crc32qi\*(C'\fR,
+\&\f(CW\*(C`_\|_builtin_ia32_crc32hi\*(C'\fR. \f(CW\*(C`_\|_builtin_ia32_crc32si\*(C'\fR and
+\&\f(CW\*(C`_\|_builtin_ia32_crc32di\*(C'\fR to generate the crc32 machine instruction.
+.IP "\fB\-mrecip\fR" 4
+.IX Item "-mrecip"
+This option will enable \s-1GCC\s0 to use \s-1RCPSS\s0 and \s-1RSQRTSS\s0 instructions (and their
+vectorized variants \s-1RCPPS\s0 and \s-1RSQRTPS\s0) with an additional Newton-Raphson step
+to increase precision instead of \s-1DIVSS\s0 and \s-1SQRTSS\s0 (and their vectorized
+variants) for single precision floating point arguments.  These instructions
+are generated only when \fB\-funsafe\-math\-optimizations\fR is enabled
+together with \fB\-finite\-math\-only\fR and \fB\-fno\-trapping\-math\fR.
+Note that while the throughput of the sequence is higher than the throughput
+of the non-reciprocal instruction, the precision of the sequence can be
+decreased by up to 2 ulp (i.e. the inverse of 1.0 equals 0.99999994).
+.Sp
+Note that \s-1GCC\s0 implements 1.0f/sqrtf(x) in terms of \s-1RSQRTSS\s0 (or \s-1RSQRTPS\s0)
+already with \fB\-ffast\-math\fR (or the above option combination), and
+doesn't need \fB\-mrecip\fR.
+.IP "\fB\-mveclibabi=\fR\fItype\fR" 4
+.IX Item "-mveclibabi=type"
+Specifies the \s-1ABI\s0 type to use for vectorizing intrinsics using an
+external library.  Supported types are \f(CW\*(C`svml\*(C'\fR for the Intel short
+vector math library and \f(CW\*(C`acml\*(C'\fR for the \s-1AMD\s0 math core library style
+of interfacing.  \s-1GCC\s0 will currently emit calls to \f(CW\*(C`vmldExp2\*(C'\fR,
+\&\f(CW\*(C`vmldLn2\*(C'\fR, \f(CW\*(C`vmldLog102\*(C'\fR, \f(CW\*(C`vmldLog102\*(C'\fR, \f(CW\*(C`vmldPow2\*(C'\fR,
+\&\f(CW\*(C`vmldTanh2\*(C'\fR, \f(CW\*(C`vmldTan2\*(C'\fR, \f(CW\*(C`vmldAtan2\*(C'\fR, \f(CW\*(C`vmldAtanh2\*(C'\fR,
+\&\f(CW\*(C`vmldCbrt2\*(C'\fR, \f(CW\*(C`vmldSinh2\*(C'\fR, \f(CW\*(C`vmldSin2\*(C'\fR, \f(CW\*(C`vmldAsinh2\*(C'\fR,
+\&\f(CW\*(C`vmldAsin2\*(C'\fR, \f(CW\*(C`vmldCosh2\*(C'\fR, \f(CW\*(C`vmldCos2\*(C'\fR, \f(CW\*(C`vmldAcosh2\*(C'\fR,
+\&\f(CW\*(C`vmldAcos2\*(C'\fR, \f(CW\*(C`vmlsExp4\*(C'\fR, \f(CW\*(C`vmlsLn4\*(C'\fR, \f(CW\*(C`vmlsLog104\*(C'\fR,
+\&\f(CW\*(C`vmlsLog104\*(C'\fR, \f(CW\*(C`vmlsPow4\*(C'\fR, \f(CW\*(C`vmlsTanh4\*(C'\fR, \f(CW\*(C`vmlsTan4\*(C'\fR,
+\&\f(CW\*(C`vmlsAtan4\*(C'\fR, \f(CW\*(C`vmlsAtanh4\*(C'\fR, \f(CW\*(C`vmlsCbrt4\*(C'\fR, \f(CW\*(C`vmlsSinh4\*(C'\fR,
+\&\f(CW\*(C`vmlsSin4\*(C'\fR, \f(CW\*(C`vmlsAsinh4\*(C'\fR, \f(CW\*(C`vmlsAsin4\*(C'\fR, \f(CW\*(C`vmlsCosh4\*(C'\fR,
+\&\f(CW\*(C`vmlsCos4\*(C'\fR, \f(CW\*(C`vmlsAcosh4\*(C'\fR and \f(CW\*(C`vmlsAcos4\*(C'\fR for corresponding
+function type when \fB\-mveclibabi=svml\fR is used and \f(CW\*(C`_\|_vrd2_sin\*(C'\fR,
+\&\f(CW\*(C`_\|_vrd2_cos\*(C'\fR, \f(CW\*(C`_\|_vrd2_exp\*(C'\fR, \f(CW\*(C`_\|_vrd2_log\*(C'\fR, \f(CW\*(C`_\|_vrd2_log2\*(C'\fR,
+\&\f(CW\*(C`_\|_vrd2_log10\*(C'\fR, \f(CW\*(C`_\|_vrs4_sinf\*(C'\fR, \f(CW\*(C`_\|_vrs4_cosf\*(C'\fR,
+\&\f(CW\*(C`_\|_vrs4_expf\*(C'\fR, \f(CW\*(C`_\|_vrs4_logf\*(C'\fR, \f(CW\*(C`_\|_vrs4_log2f\*(C'\fR,
+\&\f(CW\*(C`_\|_vrs4_log10f\*(C'\fR and \f(CW\*(C`_\|_vrs4_powf\*(C'\fR for corresponding function type
+when \fB\-mveclibabi=acml\fR is used. Both \fB\-ftree\-vectorize\fR and
+\&\fB\-funsafe\-math\-optimizations\fR have to be enabled. A \s-1SVML\s0 or \s-1ACML\s0 \s-1ABI\s0
+compatible library will have to be specified at link time.
+.IP "\fB\-mabi=\fR\fIname\fR" 4
+.IX Item "-mabi=name"
+Generate code for the specified calling convention.  Permissible values
+are: \fBsysv\fR for the \s-1ABI\s0 used on GNU/Linux and other systems and
+\&\fBms\fR for the Microsoft \s-1ABI\s0.  The default is to use the Microsoft
+\&\s-1ABI\s0 when targeting Windows.  On all other systems, the default is the
+\&\s-1SYSV\s0 \s-1ABI\s0.  You can control this behavior for a specific function by
+using the function attribute \fBms_abi\fR/\fBsysv_abi\fR.
+.IP "\fB\-mpush\-args\fR" 4
+.IX Item "-mpush-args"
+.PD 0
+.IP "\fB\-mno\-push\-args\fR" 4
+.IX Item "-mno-push-args"
+.PD
+Use \s-1PUSH\s0 operations to store outgoing parameters.  This method is shorter
+and usually equally fast as method using \s-1SUB/MOV\s0 operations and is enabled
+by default.  In some cases disabling it may improve performance because of
+improved scheduling and reduced dependencies.
+.IP "\fB\-maccumulate\-outgoing\-args\fR" 4
+.IX Item "-maccumulate-outgoing-args"
+If enabled, the maximum amount of space required for outgoing arguments will be
+computed in the function prologue.  This is faster on most modern CPUs
+because of reduced dependencies, improved scheduling and reduced stack usage
+when preferred stack boundary is not equal to 2.  The drawback is a notable
+increase in code size.  This switch implies \fB\-mno\-push\-args\fR.
+.IP "\fB\-mthreads\fR" 4
+.IX Item "-mthreads"
+Support thread-safe exception handling on \fBMingw32\fR.  Code that relies
+on thread-safe exception handling must compile and link all code with the
+\&\fB\-mthreads\fR option.  When compiling, \fB\-mthreads\fR defines
+\&\fB\-D_MT\fR; when linking, it links in a special thread helper library
+\&\fB\-lmingwthrd\fR which cleans up per thread exception handling data.
+.IP "\fB\-mno\-align\-stringops\fR" 4
+.IX Item "-mno-align-stringops"
+Do not align destination of inlined string operations.  This switch reduces
+code size and improves performance in case the destination is already aligned,
+but \s-1GCC\s0 doesn't know about it.
+.IP "\fB\-minline\-all\-stringops\fR" 4
+.IX Item "-minline-all-stringops"
+By default \s-1GCC\s0 inlines string operations only when destination is known to be
+aligned at least to 4 byte boundary.  This enables more inlining, increase code
+size, but may improve performance of code that depends on fast memcpy, strlen
+and memset for short lengths.
+.IP "\fB\-minline\-stringops\-dynamically\fR" 4
+.IX Item "-minline-stringops-dynamically"
+For string operation of unknown size, inline runtime checks so for small
+blocks inline code is used, while for large blocks library call is used.
+.IP "\fB\-mstringop\-strategy=\fR\fIalg\fR" 4
+.IX Item "-mstringop-strategy=alg"
+Overwrite internal decision heuristic about particular algorithm to inline
+string operation with.  The allowed values are \f(CW\*(C`rep_byte\*(C'\fR,
+\&\f(CW\*(C`rep_4byte\*(C'\fR, \f(CW\*(C`rep_8byte\*(C'\fR for expanding using i386 \f(CW\*(C`rep\*(C'\fR prefix
+of specified size, \f(CW\*(C`byte_loop\*(C'\fR, \f(CW\*(C`loop\*(C'\fR, \f(CW\*(C`unrolled_loop\*(C'\fR for
+expanding inline loop, \f(CW\*(C`libcall\*(C'\fR for always expanding library call.
+.IP "\fB\-momit\-leaf\-frame\-pointer\fR" 4
+.IX Item "-momit-leaf-frame-pointer"
+Don't keep the frame pointer in a register for leaf functions.  This
+avoids the instructions to save, set up and restore frame pointers and
+makes an extra register available in leaf functions.  The option
+\&\fB\-fomit\-frame\-pointer\fR removes the frame pointer for all functions
+which might make debugging harder.
+.IP "\fB\-mtls\-direct\-seg\-refs\fR" 4
+.IX Item "-mtls-direct-seg-refs"
+.PD 0
+.IP "\fB\-mno\-tls\-direct\-seg\-refs\fR" 4
+.IX Item "-mno-tls-direct-seg-refs"
+.PD
+Controls whether \s-1TLS\s0 variables may be accessed with offsets from the
+\&\s-1TLS\s0 segment register (\f(CW%gs\fR for 32\-bit, \f(CW%fs\fR for 64\-bit),
+or whether the thread base pointer must be added.  Whether or not this
+is legal depends on the operating system, and whether it maps the
+segment to cover the entire \s-1TLS\s0 area.
+.Sp
+For systems that use \s-1GNU\s0 libc, the default is on.
+.IP "\fB\-msse2avx\fR" 4
+.IX Item "-msse2avx"
+.PD 0
+.IP "\fB\-mno\-sse2avx\fR" 4
+.IX Item "-mno-sse2avx"
+.PD
+Specify that the assembler should encode \s-1SSE\s0 instructions with \s-1VEX\s0
+prefix.  The option \fB\-mavx\fR turns this on by default.
+.IP "\fB\-mfentry\fR" 4
+.IX Item "-mfentry"
+.PD 0
+.IP "\fB\-mno\-fentry\fR" 4
+.IX Item "-mno-fentry"
+.PD
+If profiling is active \fB\-pg\fR put the profiling
+counter call before prologue.
+Note: On x86 architectures the attribute \f(CW\*(C`ms_hook_prologue\*(C'\fR
+isn't possible at the moment for \fB\-mfentry\fR and \fB\-pg\fR.
+.IP "\fB\-m8bit\-idiv\fR" 4
+.IX Item "-m8bit-idiv"
+.PD 0
+.IP "\fB\-mno\-8bit\-idiv\fR" 4
+.IX Item "-mno-8bit-idiv"
+.PD
+On some processors, like Intel Atom, 8bit unsigned integer divide is
+much faster than 32bit/64bit integer divide.  This option will generate a
+runt-time check.  If both dividend and divisor are within range of 0
+to 255, 8bit unsigned integer divide will be used instead of
+32bit/64bit integer divide.
+.IP "\fB\-mavx256\-split\-unaligned\-load\fR" 4
+.IX Item "-mavx256-split-unaligned-load"
+.PD 0
+.IP "\fB\-mavx256\-split\-unaligned\-store\fR" 4
+.IX Item "-mavx256-split-unaligned-store"
+.PD
+Split 32\-byte \s-1AVX\s0 unaligned load and store.
+.PP
+These \fB\-m\fR switches are supported in addition to the above
+on \s-1AMD\s0 x86\-64 processors in 64\-bit environments.
+.IP "\fB\-m32\fR" 4
+.IX Item "-m32"
+.PD 0
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD
+Generate code for a 32\-bit or 64\-bit environment.
+The 32\-bit environment sets int, long and pointer to 32 bits and
+generates code that runs on any i386 system.
+The 64\-bit environment sets int to 32 bits and long and pointer
+to 64 bits and generates code for \s-1AMD\s0's x86\-64 architecture. For
+darwin only the \-m64 option turns off the \fB\-fno\-pic\fR and
+\&\fB\-mdynamic\-no\-pic\fR options.
+.IP "\fB\-mno\-red\-zone\fR" 4
+.IX Item "-mno-red-zone"
+Do not use a so called red zone for x86\-64 code.  The red zone is mandated
+by the x86\-64 \s-1ABI\s0, it is a 128\-byte area beyond the location of the
+stack pointer that will not be modified by signal or interrupt handlers
+and therefore can be used for temporary data without adjusting the stack
+pointer.  The flag \fB\-mno\-red\-zone\fR disables this red zone.
+.IP "\fB\-mcmodel=small\fR" 4
+.IX Item "-mcmodel=small"
+Generate code for the small code model: the program and its symbols must
+be linked in the lower 2 \s-1GB\s0 of the address space.  Pointers are 64 bits.
+Programs can be statically or dynamically linked.  This is the default
+code model.
+.IP "\fB\-mcmodel=kernel\fR" 4
+.IX Item "-mcmodel=kernel"
+Generate code for the kernel code model.  The kernel runs in the
+negative 2 \s-1GB\s0 of the address space.
+This model has to be used for Linux kernel code.
+.IP "\fB\-mcmodel=medium\fR" 4
+.IX Item "-mcmodel=medium"
+Generate code for the medium model: The program is linked in the lower 2
+\&\s-1GB\s0 of the address space.  Small symbols are also placed there.  Symbols
+with sizes larger than \fB\-mlarge\-data\-threshold\fR are put into
+large data or bss sections and can be located above 2GB.  Programs can
+be statically or dynamically linked.
+.IP "\fB\-mcmodel=large\fR" 4
+.IX Item "-mcmodel=large"
+Generate code for the large model: This model makes no assumptions
+about addresses and sizes of sections.
+.PP
+\fIi386 and x86\-64 Windows Options\fR
+.IX Subsection "i386 and x86-64 Windows Options"
+.PP
+These additional options are available for Windows targets:
+.IP "\fB\-mconsole\fR" 4
+.IX Item "-mconsole"
+This option is available for Cygwin and MinGW targets.  It
+specifies that a console application is to be generated, by
+instructing the linker to set the \s-1PE\s0 header subsystem type
+required for console applications.
+This is the default behavior for Cygwin and MinGW targets.
+.IP "\fB\-mdll\fR" 4
+.IX Item "-mdll"
+This option is available for Cygwin and MinGW targets.  It
+specifies that a \s-1DLL\s0 \- a dynamic link library \- is to be
+generated, enabling the selection of the required runtime
+startup object and entry point.
+.IP "\fB\-mnop\-fun\-dllimport\fR" 4
+.IX Item "-mnop-fun-dllimport"
+This option is available for Cygwin and MinGW targets.  It
+specifies that the dllimport attribute should be ignored.
+.IP "\fB\-mthread\fR" 4
+.IX Item "-mthread"
+This option is available for MinGW targets. It specifies
+that MinGW-specific thread support is to be used.
+.IP "\fB\-municode\fR" 4
+.IX Item "-municode"
+This option is available for mingw\-w64 targets.  It specifies
+that the \s-1UNICODE\s0 macro is getting pre-defined and that the
+unicode capable runtime startup code is chosen.
+.IP "\fB\-mwin32\fR" 4
+.IX Item "-mwin32"
+This option is available for Cygwin and MinGW targets.  It
+specifies that the typical Windows pre-defined macros are to
+be set in the pre-processor, but does not influence the choice
+of runtime library/startup code.
+.IP "\fB\-mwindows\fR" 4
+.IX Item "-mwindows"
+This option is available for Cygwin and MinGW targets.  It
+specifies that a \s-1GUI\s0 application is to be generated by
+instructing the linker to set the \s-1PE\s0 header subsystem type
+appropriately.
+.IP "\fB\-fno\-set\-stack\-executable\fR" 4
+.IX Item "-fno-set-stack-executable"
+This option is available for MinGW targets. It specifies that
+the executable flag for stack used by nested functions isn't
+set. This is necessary for binaries running in kernel mode of
+Windows, as there the user32 \s-1API\s0, which is used to set executable
+privileges, isn't available.
+.IP "\fB\-mpe\-aligned\-commons\fR" 4
+.IX Item "-mpe-aligned-commons"
+This option is available for Cygwin and MinGW targets.  It
+specifies that the \s-1GNU\s0 extension to the \s-1PE\s0 file format that
+permits the correct alignment of \s-1COMMON\s0 variables should be
+used when generating code.  It will be enabled by default if
+\&\s-1GCC\s0 detects that the target assembler found during configuration
+supports the feature.
+.PP
+See also under \fBi386 and x86\-64 Options\fR for standard options.
+.PP
+\fI\s-1IA\-64\s0 Options\fR
+.IX Subsection "IA-64 Options"
+.PP
+These are the \fB\-m\fR options defined for the Intel \s-1IA\-64\s0 architecture.
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+Generate code for a big endian target.  This is the default for HP-UX.
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+Generate code for a little endian target.  This is the default for \s-1AIX5\s0
+and GNU/Linux.
+.IP "\fB\-mgnu\-as\fR" 4
+.IX Item "-mgnu-as"
+.PD 0
+.IP "\fB\-mno\-gnu\-as\fR" 4
+.IX Item "-mno-gnu-as"
+.PD
+Generate (or don't) code for the \s-1GNU\s0 assembler.  This is the default.
+.IP "\fB\-mgnu\-ld\fR" 4
+.IX Item "-mgnu-ld"
+.PD 0
+.IP "\fB\-mno\-gnu\-ld\fR" 4
+.IX Item "-mno-gnu-ld"
+.PD
+Generate (or don't) code for the \s-1GNU\s0 linker.  This is the default.
+.IP "\fB\-mno\-pic\fR" 4
+.IX Item "-mno-pic"
+Generate code that does not use a global pointer register.  The result
+is not position independent code, and violates the \s-1IA\-64\s0 \s-1ABI\s0.
+.IP "\fB\-mvolatile\-asm\-stop\fR" 4
+.IX Item "-mvolatile-asm-stop"
+.PD 0
+.IP "\fB\-mno\-volatile\-asm\-stop\fR" 4
+.IX Item "-mno-volatile-asm-stop"
+.PD
+Generate (or don't) a stop bit immediately before and after volatile asm
+statements.
+.IP "\fB\-mregister\-names\fR" 4
+.IX Item "-mregister-names"
+.PD 0
+.IP "\fB\-mno\-register\-names\fR" 4
+.IX Item "-mno-register-names"
+.PD
+Generate (or don't) \fBin\fR, \fBloc\fR, and \fBout\fR register names for
+the stacked registers.  This may make assembler output more readable.
+.IP "\fB\-mno\-sdata\fR" 4
+.IX Item "-mno-sdata"
+.PD 0
+.IP "\fB\-msdata\fR" 4
+.IX Item "-msdata"
+.PD
+Disable (or enable) optimizations that use the small data section.  This may
+be useful for working around optimizer bugs.
+.IP "\fB\-mconstant\-gp\fR" 4
+.IX Item "-mconstant-gp"
+Generate code that uses a single constant global pointer value.  This is
+useful when compiling kernel code.
+.IP "\fB\-mauto\-pic\fR" 4
+.IX Item "-mauto-pic"
+Generate code that is self-relocatable.  This implies \fB\-mconstant\-gp\fR.
+This is useful when compiling firmware code.
+.IP "\fB\-minline\-float\-divide\-min\-latency\fR" 4
+.IX Item "-minline-float-divide-min-latency"
+Generate code for inline divides of floating point values
+using the minimum latency algorithm.
+.IP "\fB\-minline\-float\-divide\-max\-throughput\fR" 4
+.IX Item "-minline-float-divide-max-throughput"
+Generate code for inline divides of floating point values
+using the maximum throughput algorithm.
+.IP "\fB\-mno\-inline\-float\-divide\fR" 4
+.IX Item "-mno-inline-float-divide"
+Do not generate inline code for divides of floating point values.
+.IP "\fB\-minline\-int\-divide\-min\-latency\fR" 4
+.IX Item "-minline-int-divide-min-latency"
+Generate code for inline divides of integer values
+using the minimum latency algorithm.
+.IP "\fB\-minline\-int\-divide\-max\-throughput\fR" 4
+.IX Item "-minline-int-divide-max-throughput"
+Generate code for inline divides of integer values
+using the maximum throughput algorithm.
+.IP "\fB\-mno\-inline\-int\-divide\fR" 4
+.IX Item "-mno-inline-int-divide"
+Do not generate inline code for divides of integer values.
+.IP "\fB\-minline\-sqrt\-min\-latency\fR" 4
+.IX Item "-minline-sqrt-min-latency"
+Generate code for inline square roots
+using the minimum latency algorithm.
+.IP "\fB\-minline\-sqrt\-max\-throughput\fR" 4
+.IX Item "-minline-sqrt-max-throughput"
+Generate code for inline square roots
+using the maximum throughput algorithm.
+.IP "\fB\-mno\-inline\-sqrt\fR" 4
+.IX Item "-mno-inline-sqrt"
+Do not generate inline code for sqrt.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Do (don't) generate code that uses the fused multiply/add or multiply/subtract
+instructions.  The default is to use these instructions.
+.IP "\fB\-mno\-dwarf2\-asm\fR" 4
+.IX Item "-mno-dwarf2-asm"
+.PD 0
+.IP "\fB\-mdwarf2\-asm\fR" 4
+.IX Item "-mdwarf2-asm"
+.PD
+Don't (or do) generate assembler code for the \s-1DWARF2\s0 line number debugging
+info.  This may be useful when not using the \s-1GNU\s0 assembler.
+.IP "\fB\-mearly\-stop\-bits\fR" 4
+.IX Item "-mearly-stop-bits"
+.PD 0
+.IP "\fB\-mno\-early\-stop\-bits\fR" 4
+.IX Item "-mno-early-stop-bits"
+.PD
+Allow stop bits to be placed earlier than immediately preceding the
+instruction that triggered the stop bit.  This can improve instruction
+scheduling, but does not always do so.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use.  This is
+useful when compiling kernel code.  A register range is specified as
+two registers separated by a dash.  Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-mtls\-size=\fR\fItls-size\fR" 4
+.IX Item "-mtls-size=tls-size"
+Specify bit size of immediate \s-1TLS\s0 offsets.  Valid values are 14, 22, and
+64.
+.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
+.IX Item "-mtune=cpu-type"
+Tune the instruction scheduling for a particular \s-1CPU\s0, Valid values are
+itanium, itanium1, merced, itanium2, and mckinley.
+.IP "\fB\-milp32\fR" 4
+.IX Item "-milp32"
+.PD 0
+.IP "\fB\-mlp64\fR" 4
+.IX Item "-mlp64"
+.PD
+Generate code for a 32\-bit or 64\-bit environment.
+The 32\-bit environment sets int, long and pointer to 32 bits.
+The 64\-bit environment sets int to 32 bits and long and pointer
+to 64 bits.  These are HP-UX specific flags.
+.IP "\fB\-mno\-sched\-br\-data\-spec\fR" 4
+.IX Item "-mno-sched-br-data-spec"
+.PD 0
+.IP "\fB\-msched\-br\-data\-spec\fR" 4
+.IX Item "-msched-br-data-spec"
+.PD
+(Dis/En)able data speculative scheduling before reload.
+This will result in generation of the ld.a instructions and
+the corresponding check instructions (ld.c / chk.a).
+The default is 'disable'.
+.IP "\fB\-msched\-ar\-data\-spec\fR" 4
+.IX Item "-msched-ar-data-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-ar\-data\-spec\fR" 4
+.IX Item "-mno-sched-ar-data-spec"
+.PD
+(En/Dis)able data speculative scheduling after reload.
+This will result in generation of the ld.a instructions and
+the corresponding check instructions (ld.c / chk.a).
+The default is 'enable'.
+.IP "\fB\-mno\-sched\-control\-spec\fR" 4
+.IX Item "-mno-sched-control-spec"
+.PD 0
+.IP "\fB\-msched\-control\-spec\fR" 4
+.IX Item "-msched-control-spec"
+.PD
+(Dis/En)able control speculative scheduling.  This feature is
+available only during region scheduling (i.e. before reload).
+This will result in generation of the ld.s instructions and
+the corresponding check instructions chk.s .
+The default is 'disable'.
+.IP "\fB\-msched\-br\-in\-data\-spec\fR" 4
+.IX Item "-msched-br-in-data-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-br\-in\-data\-spec\fR" 4
+.IX Item "-mno-sched-br-in-data-spec"
+.PD
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the data speculative loads before reload.
+This is effective only with \fB\-msched\-br\-data\-spec\fR enabled.
+The default is 'enable'.
+.IP "\fB\-msched\-ar\-in\-data\-spec\fR" 4
+.IX Item "-msched-ar-in-data-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-ar\-in\-data\-spec\fR" 4
+.IX Item "-mno-sched-ar-in-data-spec"
+.PD
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the data speculative loads after reload.
+This is effective only with \fB\-msched\-ar\-data\-spec\fR enabled.
+The default is 'enable'.
+.IP "\fB\-msched\-in\-control\-spec\fR" 4
+.IX Item "-msched-in-control-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-in\-control\-spec\fR" 4
+.IX Item "-mno-sched-in-control-spec"
+.PD
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the control speculative loads.
+This is effective only with \fB\-msched\-control\-spec\fR enabled.
+The default is 'enable'.
+.IP "\fB\-mno\-sched\-prefer\-non\-data\-spec\-insns\fR" 4
+.IX Item "-mno-sched-prefer-non-data-spec-insns"
+.PD 0
+.IP "\fB\-msched\-prefer\-non\-data\-spec\-insns\fR" 4
+.IX Item "-msched-prefer-non-data-spec-insns"
+.PD
+If enabled, data speculative instructions will be chosen for schedule
+only if there are no other choices at the moment.  This will make
+the use of the data speculation much more conservative.
+The default is 'disable'.
+.IP "\fB\-mno\-sched\-prefer\-non\-control\-spec\-insns\fR" 4
+.IX Item "-mno-sched-prefer-non-control-spec-insns"
+.PD 0
+.IP "\fB\-msched\-prefer\-non\-control\-spec\-insns\fR" 4
+.IX Item "-msched-prefer-non-control-spec-insns"
+.PD
+If enabled, control speculative instructions will be chosen for schedule
+only if there are no other choices at the moment.  This will make
+the use of the control speculation much more conservative.
+The default is 'disable'.
+.IP "\fB\-mno\-sched\-count\-spec\-in\-critical\-path\fR" 4
+.IX Item "-mno-sched-count-spec-in-critical-path"
+.PD 0
+.IP "\fB\-msched\-count\-spec\-in\-critical\-path\fR" 4
+.IX Item "-msched-count-spec-in-critical-path"
+.PD
+If enabled, speculative dependencies will be considered during
+computation of the instructions priorities.  This will make the use of the
+speculation a bit more conservative.
+The default is 'disable'.
+.IP "\fB\-msched\-spec\-ldc\fR" 4
+.IX Item "-msched-spec-ldc"
+Use a simple data speculation check.  This option is on by default.
+.IP "\fB\-msched\-control\-spec\-ldc\fR" 4
+.IX Item "-msched-control-spec-ldc"
+Use a simple check for control speculation.  This option is on by default.
+.IP "\fB\-msched\-stop\-bits\-after\-every\-cycle\fR" 4
+.IX Item "-msched-stop-bits-after-every-cycle"
+Place a stop bit after every cycle when scheduling.  This option is on
+by default.
+.IP "\fB\-msched\-fp\-mem\-deps\-zero\-cost\fR" 4
+.IX Item "-msched-fp-mem-deps-zero-cost"
+Assume that floating-point stores and loads are not likely to cause a conflict
+when placed into the same instruction group.  This option is disabled by
+default.
+.IP "\fB\-msel\-sched\-dont\-check\-control\-spec\fR" 4
+.IX Item "-msel-sched-dont-check-control-spec"
+Generate checks for control speculation in selective scheduling.
+This flag is disabled by default.
+.IP "\fB\-msched\-max\-memory\-insns=\fR\fImax-insns\fR" 4
+.IX Item "-msched-max-memory-insns=max-insns"
+Limit on the number of memory insns per instruction group, giving lower
+priority to subsequent memory insns attempting to schedule in the same
+instruction group. Frequently useful to prevent cache bank conflicts.
+The default value is 1.
+.IP "\fB\-msched\-max\-memory\-insns\-hard\-limit\fR" 4
+.IX Item "-msched-max-memory-insns-hard-limit"
+Disallow more than `msched\-max\-memory\-insns' in instruction group.
+Otherwise, limit is `soft' meaning that we would prefer non-memory operations
+when limit is reached but may still schedule memory operations.
+.PP
+\fI\s-1IA\-64/VMS\s0 Options\fR
+.IX Subsection "IA-64/VMS Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1IA\-64/VMS\s0 implementations:
+.IP "\fB\-mvms\-return\-codes\fR" 4
+.IX Item "-mvms-return-codes"
+Return \s-1VMS\s0 condition codes from main. The default is to return \s-1POSIX\s0
+style condition (e.g. error) codes.
+.IP "\fB\-mdebug\-main=\fR\fIprefix\fR" 4
+.IX Item "-mdebug-main=prefix"
+Flag the first routine whose name starts with \fIprefix\fR as the main
+routine for the debugger.
+.IP "\fB\-mmalloc64\fR" 4
+.IX Item "-mmalloc64"
+Default to 64bit memory allocation routines.
+.PP
+\fI\s-1LM32\s0 Options\fR
+.IX Subsection "LM32 Options"
+.PP
+These \fB\-m\fR options are defined for the Lattice Mico32 architecture:
+.IP "\fB\-mbarrel\-shift\-enabled\fR" 4
+.IX Item "-mbarrel-shift-enabled"
+Enable barrel-shift instructions.
+.IP "\fB\-mdivide\-enabled\fR" 4
+.IX Item "-mdivide-enabled"
+Enable divide and modulus instructions.
+.IP "\fB\-mmultiply\-enabled\fR" 4
+.IX Item "-mmultiply-enabled"
+Enable multiply instructions.
+.IP "\fB\-msign\-extend\-enabled\fR" 4
+.IX Item "-msign-extend-enabled"
+Enable sign extend instructions.
+.IP "\fB\-muser\-enabled\fR" 4
+.IX Item "-muser-enabled"
+Enable user-defined instructions.
+.PP
+\fIM32C Options\fR
+.IX Subsection "M32C Options"
+.IP "\fB\-mcpu=\fR\fIname\fR" 4
+.IX Item "-mcpu=name"
+Select the \s-1CPU\s0 for which code is generated.  \fIname\fR may be one of
+\&\fBr8c\fR for the R8C/Tiny series, \fBm16c\fR for the M16C (up to
+/60) series, \fBm32cm\fR for the M16C/80 series, or \fBm32c\fR for
+the M32C/80 series.
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+Specifies that the program will be run on the simulator.  This causes
+an alternate runtime library to be linked in which supports, for
+example, file I/O.  You must not use this option when generating
+programs that will run on real hardware; you must provide your own
+runtime library for whatever I/O functions are needed.
+.IP "\fB\-memregs=\fR\fInumber\fR" 4
+.IX Item "-memregs=number"
+Specifies the number of memory-based pseudo-registers \s-1GCC\s0 will use
+during code generation.  These pseudo-registers will be used like real
+registers, so there is a tradeoff between \s-1GCC\s0's ability to fit the
+code into available registers, and the performance penalty of using
+memory instead of registers.  Note that all modules in a program must
+be compiled with the same value for this option.  Because of that, you
+must not use this option with the default runtime libraries gcc
+builds.
+.PP
+\fIM32R/D Options\fR
+.IX Subsection "M32R/D Options"
+.PP
+These \fB\-m\fR options are defined for Renesas M32R/D architectures:
+.IP "\fB\-m32r2\fR" 4
+.IX Item "-m32r2"
+Generate code for the M32R/2.
+.IP "\fB\-m32rx\fR" 4
+.IX Item "-m32rx"
+Generate code for the M32R/X.
+.IP "\fB\-m32r\fR" 4
+.IX Item "-m32r"
+Generate code for the M32R.  This is the default.
+.IP "\fB\-mmodel=small\fR" 4
+.IX Item "-mmodel=small"
+Assume all objects live in the lower 16MB of memory (so that their addresses
+can be loaded with the \f(CW\*(C`ld24\*(C'\fR instruction), and assume all subroutines
+are reachable with the \f(CW\*(C`bl\*(C'\fR instruction.
+This is the default.
+.Sp
+The addressability of a particular object can be set with the
+\&\f(CW\*(C`model\*(C'\fR attribute.
+.IP "\fB\-mmodel=medium\fR" 4
+.IX Item "-mmodel=medium"
+Assume objects may be anywhere in the 32\-bit address space (the compiler
+will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and
+assume all subroutines are reachable with the \f(CW\*(C`bl\*(C'\fR instruction.
+.IP "\fB\-mmodel=large\fR" 4
+.IX Item "-mmodel=large"
+Assume objects may be anywhere in the 32\-bit address space (the compiler
+will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and
+assume subroutines may not be reachable with the \f(CW\*(C`bl\*(C'\fR instruction
+(the compiler will generate the much slower \f(CW\*(C`seth/add3/jl\*(C'\fR
+instruction sequence).
+.IP "\fB\-msdata=none\fR" 4
+.IX Item "-msdata=none"
+Disable use of the small data area.  Variables will be put into
+one of \fB.data\fR, \fBbss\fR, or \fB.rodata\fR (unless the
+\&\f(CW\*(C`section\*(C'\fR attribute has been specified).
+This is the default.
+.Sp
+The small data area consists of sections \fB.sdata\fR and \fB.sbss\fR.
+Objects may be explicitly put in the small data area with the
+\&\f(CW\*(C`section\*(C'\fR attribute using one of these sections.
+.IP "\fB\-msdata=sdata\fR" 4
+.IX Item "-msdata=sdata"
+Put small global and static data in the small data area, but do not
+generate special code to reference them.
+.IP "\fB\-msdata=use\fR" 4
+.IX Item "-msdata=use"
+Put small global and static data in the small data area, and generate
+special instructions to reference them.
+.IP "\fB\-G\fR \fInum\fR" 4
+.IX Item "-G num"
+Put global and static objects less than or equal to \fInum\fR bytes
+into the small data or bss sections instead of the normal data or bss
+sections.  The default value of \fInum\fR is 8.
+The \fB\-msdata\fR option must be set to one of \fBsdata\fR or \fBuse\fR
+for this option to have any effect.
+.Sp
+All modules should be compiled with the same \fB\-G\fR \fInum\fR value.
+Compiling with different values of \fInum\fR may or may not work; if it
+doesn't the linker will give an error message\-\-\-incorrect code will not be
+generated.
+.IP "\fB\-mdebug\fR" 4
+.IX Item "-mdebug"
+Makes the M32R specific code in the compiler display some statistics
+that might help in debugging programs.
+.IP "\fB\-malign\-loops\fR" 4
+.IX Item "-malign-loops"
+Align all loops to a 32\-byte boundary.
+.IP "\fB\-mno\-align\-loops\fR" 4
+.IX Item "-mno-align-loops"
+Do not enforce a 32\-byte alignment for loops.  This is the default.
+.IP "\fB\-missue\-rate=\fR\fInumber\fR" 4
+.IX Item "-missue-rate=number"
+Issue \fInumber\fR instructions per cycle.  \fInumber\fR can only be 1
+or 2.
+.IP "\fB\-mbranch\-cost=\fR\fInumber\fR" 4
+.IX Item "-mbranch-cost=number"
+\&\fInumber\fR can only be 1 or 2.  If it is 1 then branches will be
+preferred over conditional code, if it is 2, then the opposite will
+apply.
+.IP "\fB\-mflush\-trap=\fR\fInumber\fR" 4
+.IX Item "-mflush-trap=number"
+Specifies the trap number to use to flush the cache.  The default is
+12.  Valid numbers are between 0 and 15 inclusive.
+.IP "\fB\-mno\-flush\-trap\fR" 4
+.IX Item "-mno-flush-trap"
+Specifies that the cache cannot be flushed by using a trap.
+.IP "\fB\-mflush\-func=\fR\fIname\fR" 4
+.IX Item "-mflush-func=name"
+Specifies the name of the operating system function to call to flush
+the cache.  The default is \fI_flush_cache\fR, but a function call
+will only be used if a trap is not available.
+.IP "\fB\-mno\-flush\-func\fR" 4
+.IX Item "-mno-flush-func"
+Indicates that there is no \s-1OS\s0 function for flushing the cache.
+.PP
+\fIM680x0 Options\fR
+.IX Subsection "M680x0 Options"
+.PP
+These are the \fB\-m\fR options defined for M680x0 and ColdFire processors.
+The default settings depend on which architecture was selected when
+the compiler was configured; the defaults for the most common choices
+are given below.
+.IP "\fB\-march=\fR\fIarch\fR" 4
+.IX Item "-march=arch"
+Generate code for a specific M680x0 or ColdFire instruction set
+architecture.  Permissible values of \fIarch\fR for M680x0
+architectures are: \fB68000\fR, \fB68010\fR, \fB68020\fR,
+\&\fB68030\fR, \fB68040\fR, \fB68060\fR and \fBcpu32\fR.  ColdFire
+architectures are selected according to Freescale's \s-1ISA\s0 classification
+and the permissible values are: \fBisaa\fR, \fBisaaplus\fR,
+\&\fBisab\fR and \fBisac\fR.
+.Sp
+gcc defines a macro \fB_\|_mcf\fR\fIarch\fR\fB_\|_\fR whenever it is generating
+code for a ColdFire target.  The \fIarch\fR in this macro is one of the
+\&\fB\-march\fR arguments given above.
+.Sp
+When used together, \fB\-march\fR and \fB\-mtune\fR select code
+that runs on a family of similar processors but that is optimized
+for a particular microarchitecture.
+.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
+.IX Item "-mcpu=cpu"
+Generate code for a specific M680x0 or ColdFire processor.
+The M680x0 \fIcpu\fRs are: \fB68000\fR, \fB68010\fR, \fB68020\fR,
+\&\fB68030\fR, \fB68040\fR, \fB68060\fR, \fB68302\fR, \fB68332\fR
+and \fBcpu32\fR.  The ColdFire \fIcpu\fRs are given by the table
+below, which also classifies the CPUs into families:
+.RS 4
+.IP "Family : \fB\-mcpu\fR arguments" 4
+.IX Item "Family : -mcpu arguments"
+.PD 0
+.IP "\fB51\fR : \fB51\fR \fB51ac\fR \fB51cn\fR \fB51em\fR \fB51qe\fR" 4
+.IX Item "51 : 51 51ac 51cn 51em 51qe"
+.IP "\fB5206\fR : \fB5202\fR \fB5204\fR \fB5206\fR" 4
+.IX Item "5206 : 5202 5204 5206"
+.IP "\fB5206e\fR : \fB5206e\fR" 4
+.IX Item "5206e : 5206e"
+.IP "\fB5208\fR : \fB5207\fR \fB5208\fR" 4
+.IX Item "5208 : 5207 5208"
+.IP "\fB5211a\fR : \fB5210a\fR \fB5211a\fR" 4
+.IX Item "5211a : 5210a 5211a"
+.IP "\fB5213\fR : \fB5211\fR \fB5212\fR \fB5213\fR" 4
+.IX Item "5213 : 5211 5212 5213"
+.IP "\fB5216\fR : \fB5214\fR \fB5216\fR" 4
+.IX Item "5216 : 5214 5216"
+.IP "\fB52235\fR : \fB52230\fR \fB52231\fR \fB52232\fR \fB52233\fR \fB52234\fR \fB52235\fR" 4
+.IX Item "52235 : 52230 52231 52232 52233 52234 52235"
+.IP "\fB5225\fR : \fB5224\fR \fB5225\fR" 4
+.IX Item "5225 : 5224 5225"
+.IP "\fB52259\fR : \fB52252\fR \fB52254\fR \fB52255\fR \fB52256\fR \fB52258\fR \fB52259\fR" 4
+.IX Item "52259 : 52252 52254 52255 52256 52258 52259"
+.IP "\fB5235\fR : \fB5232\fR \fB5233\fR \fB5234\fR \fB5235\fR \fB523x\fR" 4
+.IX Item "5235 : 5232 5233 5234 5235 523x"
+.IP "\fB5249\fR : \fB5249\fR" 4
+.IX Item "5249 : 5249"
+.IP "\fB5250\fR : \fB5250\fR" 4
+.IX Item "5250 : 5250"
+.IP "\fB5271\fR : \fB5270\fR \fB5271\fR" 4
+.IX Item "5271 : 5270 5271"
+.IP "\fB5272\fR : \fB5272\fR" 4
+.IX Item "5272 : 5272"
+.IP "\fB5275\fR : \fB5274\fR \fB5275\fR" 4
+.IX Item "5275 : 5274 5275"
+.IP "\fB5282\fR : \fB5280\fR \fB5281\fR \fB5282\fR \fB528x\fR" 4
+.IX Item "5282 : 5280 5281 5282 528x"
+.IP "\fB53017\fR : \fB53011\fR \fB53012\fR \fB53013\fR \fB53014\fR \fB53015\fR \fB53016\fR \fB53017\fR" 4
+.IX Item "53017 : 53011 53012 53013 53014 53015 53016 53017"
+.IP "\fB5307\fR : \fB5307\fR" 4
+.IX Item "5307 : 5307"
+.IP "\fB5329\fR : \fB5327\fR \fB5328\fR \fB5329\fR \fB532x\fR" 4
+.IX Item "5329 : 5327 5328 5329 532x"
+.IP "\fB5373\fR : \fB5372\fR \fB5373\fR \fB537x\fR" 4
+.IX Item "5373 : 5372 5373 537x"
+.IP "\fB5407\fR : \fB5407\fR" 4
+.IX Item "5407 : 5407"
+.IP "\fB5475\fR : \fB5470\fR \fB5471\fR \fB5472\fR \fB5473\fR \fB5474\fR \fB5475\fR \fB547x\fR \fB5480\fR \fB5481\fR \fB5482\fR \fB5483\fR \fB5484\fR \fB5485\fR" 4
+.IX Item "5475 : 5470 5471 5472 5473 5474 5475 547x 5480 5481 5482 5483 5484 5485"
+.RE
+.RS 4
+.PD
+.Sp
+\&\fB\-mcpu=\fR\fIcpu\fR overrides \fB\-march=\fR\fIarch\fR if
+\&\fIarch\fR is compatible with \fIcpu\fR.  Other combinations of
+\&\fB\-mcpu\fR and \fB\-march\fR are rejected.
+.Sp
+gcc defines the macro \fB_\|_mcf_cpu_\fR\fIcpu\fR when ColdFire target
+\&\fIcpu\fR is selected.  It also defines \fB_\|_mcf_family_\fR\fIfamily\fR,
+where the value of \fIfamily\fR is given by the table above.
+.RE
+.IP "\fB\-mtune=\fR\fItune\fR" 4
+.IX Item "-mtune=tune"
+Tune the code for a particular microarchitecture, within the
+constraints set by \fB\-march\fR and \fB\-mcpu\fR.
+The M680x0 microarchitectures are: \fB68000\fR, \fB68010\fR,
+\&\fB68020\fR, \fB68030\fR, \fB68040\fR, \fB68060\fR
+and \fBcpu32\fR.  The ColdFire microarchitectures
+are: \fBcfv1\fR, \fBcfv2\fR, \fBcfv3\fR, \fBcfv4\fR and \fBcfv4e\fR.
+.Sp
+You can also use \fB\-mtune=68020\-40\fR for code that needs
+to run relatively well on 68020, 68030 and 68040 targets.
+\&\fB\-mtune=68020\-60\fR is similar but includes 68060 targets
+as well.  These two options select the same tuning decisions as
+\&\fB\-m68020\-40\fR and \fB\-m68020\-60\fR respectively.
+.Sp
+gcc defines the macros \fB_\|_mc\fR\fIarch\fR and \fB_\|_mc\fR\fIarch\fR\fB_\|_\fR
+when tuning for 680x0 architecture \fIarch\fR.  It also defines
+\&\fBmc\fR\fIarch\fR unless either \fB\-ansi\fR or a non-GNU \fB\-std\fR
+option is used.  If gcc is tuning for a range of architectures,
+as selected by \fB\-mtune=68020\-40\fR or \fB\-mtune=68020\-60\fR,
+it defines the macros for every architecture in the range.
+.Sp
+gcc also defines the macro \fB_\|_m\fR\fIuarch\fR\fB_\|_\fR when tuning for
+ColdFire microarchitecture \fIuarch\fR, where \fIuarch\fR is one
+of the arguments given above.
+.IP "\fB\-m68000\fR" 4
+.IX Item "-m68000"
+.PD 0
+.IP "\fB\-mc68000\fR" 4
+.IX Item "-mc68000"
+.PD
+Generate output for a 68000.  This is the default
+when the compiler is configured for 68000\-based systems.
+It is equivalent to \fB\-march=68000\fR.
+.Sp
+Use this option for microcontrollers with a 68000 or \s-1EC000\s0 core,
+including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356.
+.IP "\fB\-m68010\fR" 4
+.IX Item "-m68010"
+Generate output for a 68010.  This is the default
+when the compiler is configured for 68010\-based systems.
+It is equivalent to \fB\-march=68010\fR.
+.IP "\fB\-m68020\fR" 4
+.IX Item "-m68020"
+.PD 0
+.IP "\fB\-mc68020\fR" 4
+.IX Item "-mc68020"
+.PD
+Generate output for a 68020.  This is the default
+when the compiler is configured for 68020\-based systems.
+It is equivalent to \fB\-march=68020\fR.
+.IP "\fB\-m68030\fR" 4
+.IX Item "-m68030"
+Generate output for a 68030.  This is the default when the compiler is
+configured for 68030\-based systems.  It is equivalent to
+\&\fB\-march=68030\fR.
+.IP "\fB\-m68040\fR" 4
+.IX Item "-m68040"
+Generate output for a 68040.  This is the default when the compiler is
+configured for 68040\-based systems.  It is equivalent to
+\&\fB\-march=68040\fR.
+.Sp
+This option inhibits the use of 68881/68882 instructions that have to be
+emulated by software on the 68040.  Use this option if your 68040 does not
+have code to emulate those instructions.
+.IP "\fB\-m68060\fR" 4
+.IX Item "-m68060"
+Generate output for a 68060.  This is the default when the compiler is
+configured for 68060\-based systems.  It is equivalent to
+\&\fB\-march=68060\fR.
+.Sp
+This option inhibits the use of 68020 and 68881/68882 instructions that
+have to be emulated by software on the 68060.  Use this option if your 68060
+does not have code to emulate those instructions.
+.IP "\fB\-mcpu32\fR" 4
+.IX Item "-mcpu32"
+Generate output for a \s-1CPU32\s0.  This is the default
+when the compiler is configured for CPU32\-based systems.
+It is equivalent to \fB\-march=cpu32\fR.
+.Sp
+Use this option for microcontrollers with a
+\&\s-1CPU32\s0 or \s-1CPU32+\s0 core, including the 68330, 68331, 68332, 68333, 68334,
+68336, 68340, 68341, 68349 and 68360.
+.IP "\fB\-m5200\fR" 4
+.IX Item "-m5200"
+Generate output for a 520X ColdFire \s-1CPU\s0.  This is the default
+when the compiler is configured for 520X\-based systems.
+It is equivalent to \fB\-mcpu=5206\fR, and is now deprecated
+in favor of that option.
+.Sp
+Use this option for microcontroller with a 5200 core, including
+the \s-1MCF5202\s0, \s-1MCF5203\s0, \s-1MCF5204\s0 and \s-1MCF5206\s0.
+.IP "\fB\-m5206e\fR" 4
+.IX Item "-m5206e"
+Generate output for a 5206e ColdFire \s-1CPU\s0.  The option is now
+deprecated in favor of the equivalent \fB\-mcpu=5206e\fR.
+.IP "\fB\-m528x\fR" 4
+.IX Item "-m528x"
+Generate output for a member of the ColdFire 528X family.
+The option is now deprecated in favor of the equivalent
+\&\fB\-mcpu=528x\fR.
+.IP "\fB\-m5307\fR" 4
+.IX Item "-m5307"
+Generate output for a ColdFire 5307 \s-1CPU\s0.  The option is now deprecated
+in favor of the equivalent \fB\-mcpu=5307\fR.
+.IP "\fB\-m5407\fR" 4
+.IX Item "-m5407"
+Generate output for a ColdFire 5407 \s-1CPU\s0.  The option is now deprecated
+in favor of the equivalent \fB\-mcpu=5407\fR.
+.IP "\fB\-mcfv4e\fR" 4
+.IX Item "-mcfv4e"
+Generate output for a ColdFire V4e family \s-1CPU\s0 (e.g. 547x/548x).
+This includes use of hardware floating point instructions.
+The option is equivalent to \fB\-mcpu=547x\fR, and is now
+deprecated in favor of that option.
+.IP "\fB\-m68020\-40\fR" 4
+.IX Item "-m68020-40"
+Generate output for a 68040, without using any of the new instructions.
+This results in code which can run relatively efficiently on either a
+68020/68881 or a 68030 or a 68040.  The generated code does use the
+68881 instructions that are emulated on the 68040.
+.Sp
+The option is equivalent to \fB\-march=68020\fR \fB\-mtune=68020\-40\fR.
+.IP "\fB\-m68020\-60\fR" 4
+.IX Item "-m68020-60"
+Generate output for a 68060, without using any of the new instructions.
+This results in code which can run relatively efficiently on either a
+68020/68881 or a 68030 or a 68040.  The generated code does use the
+68881 instructions that are emulated on the 68060.
+.Sp
+The option is equivalent to \fB\-march=68020\fR \fB\-mtune=68020\-60\fR.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD 0
+.IP "\fB\-m68881\fR" 4
+.IX Item "-m68881"
+.PD
+Generate floating-point instructions.  This is the default for 68020
+and above, and for ColdFire devices that have an \s-1FPU\s0.  It defines the
+macro \fB_\|_HAVE_68881_\|_\fR on M680x0 targets and \fB_\|_mcffpu_\|_\fR
+on ColdFire targets.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Do not generate floating-point instructions; use library calls instead.
+This is the default for 68000, 68010, and 68832 targets.  It is also
+the default for ColdFire devices that have no \s-1FPU\s0.
+.IP "\fB\-mdiv\fR" 4
+.IX Item "-mdiv"
+.PD 0
+.IP "\fB\-mno\-div\fR" 4
+.IX Item "-mno-div"
+.PD
+Generate (do not generate) ColdFire hardware divide and remainder
+instructions.  If \fB\-march\fR is used without \fB\-mcpu\fR,
+the default is \*(L"on\*(R" for ColdFire architectures and \*(L"off\*(R" for M680x0
+architectures.  Otherwise, the default is taken from the target \s-1CPU\s0
+(either the default \s-1CPU\s0, or the one specified by \fB\-mcpu\fR).  For
+example, the default is \*(L"off\*(R" for \fB\-mcpu=5206\fR and \*(L"on\*(R" for
+\&\fB\-mcpu=5206e\fR.
+.Sp
+gcc defines the macro \fB_\|_mcfhwdiv_\|_\fR when this option is enabled.
+.IP "\fB\-mshort\fR" 4
+.IX Item "-mshort"
+Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR.
+Additionally, parameters passed on the stack are also aligned to a
+16\-bit boundary even on targets whose \s-1API\s0 mandates promotion to 32\-bit.
+.IP "\fB\-mno\-short\fR" 4
+.IX Item "-mno-short"
+Do not consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide.  This is the default.
+.IP "\fB\-mnobitfield\fR" 4
+.IX Item "-mnobitfield"
+.PD 0
+.IP "\fB\-mno\-bitfield\fR" 4
+.IX Item "-mno-bitfield"
+.PD
+Do not use the bit-field instructions.  The \fB\-m68000\fR, \fB\-mcpu32\fR
+and \fB\-m5200\fR options imply \fB\-mnobitfield\fR.
+.IP "\fB\-mbitfield\fR" 4
+.IX Item "-mbitfield"
+Do use the bit-field instructions.  The \fB\-m68020\fR option implies
+\&\fB\-mbitfield\fR.  This is the default if you use a configuration
+designed for a 68020.
+.IP "\fB\-mrtd\fR" 4
+.IX Item "-mrtd"
+Use a different function-calling convention, in which functions
+that take a fixed number of arguments return with the \f(CW\*(C`rtd\*(C'\fR
+instruction, which pops their arguments while returning.  This
+saves one instruction in the caller since there is no need to pop
+the arguments there.
+.Sp
+This calling convention is incompatible with the one normally
+used on Unix, so you cannot use it if you need to call libraries
+compiled with the Unix compiler.
+.Sp
+Also, you must provide function prototypes for all functions that
+take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR);
+otherwise incorrect code will be generated for calls to those
+functions.
+.Sp
+In addition, seriously incorrect code will result if you call a
+function with too many arguments.  (Normally, extra arguments are
+harmlessly ignored.)
+.Sp
+The \f(CW\*(C`rtd\*(C'\fR instruction is supported by the 68010, 68020, 68030,
+68040, 68060 and \s-1CPU32\s0 processors, but not by the 68000 or 5200.
+.IP "\fB\-mno\-rtd\fR" 4
+.IX Item "-mno-rtd"
+Do not use the calling conventions selected by \fB\-mrtd\fR.
+This is the default.
+.IP "\fB\-malign\-int\fR" 4
+.IX Item "-malign-int"
+.PD 0
+.IP "\fB\-mno\-align\-int\fR" 4
+.IX Item "-mno-align-int"
+.PD
+Control whether \s-1GCC\s0 aligns \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`long long\*(C'\fR,
+\&\f(CW\*(C`float\*(C'\fR, \f(CW\*(C`double\*(C'\fR, and \f(CW\*(C`long double\*(C'\fR variables on a 32\-bit
+boundary (\fB\-malign\-int\fR) or a 16\-bit boundary (\fB\-mno\-align\-int\fR).
+Aligning variables on 32\-bit boundaries produces code that runs somewhat
+faster on processors with 32\-bit busses at the expense of more memory.
+.Sp
+\&\fBWarning:\fR if you use the \fB\-malign\-int\fR switch, \s-1GCC\s0 will
+align structures containing the above types  differently than
+most published application binary interface specifications for the m68k.
+.IP "\fB\-mpcrel\fR" 4
+.IX Item "-mpcrel"
+Use the pc-relative addressing mode of the 68000 directly, instead of
+using a global offset table.  At present, this option implies \fB\-fpic\fR,
+allowing at most a 16\-bit offset for pc-relative addressing.  \fB\-fPIC\fR is
+not presently supported with \fB\-mpcrel\fR, though this could be supported for
+68020 and higher processors.
+.IP "\fB\-mno\-strict\-align\fR" 4
+.IX Item "-mno-strict-align"
+.PD 0
+.IP "\fB\-mstrict\-align\fR" 4
+.IX Item "-mstrict-align"
+.PD
+Do not (do) assume that unaligned memory references will be handled by
+the system.
+.IP "\fB\-msep\-data\fR" 4
+.IX Item "-msep-data"
+Generate code that allows the data segment to be located in a different
+area of memory from the text segment.  This allows for execute in place in
+an environment without virtual memory management.  This option implies
+\&\fB\-fPIC\fR.
+.IP "\fB\-mno\-sep\-data\fR" 4
+.IX Item "-mno-sep-data"
+Generate code that assumes that the data segment follows the text segment.
+This is the default.
+.IP "\fB\-mid\-shared\-library\fR" 4
+.IX Item "-mid-shared-library"
+Generate code that supports shared libraries via the library \s-1ID\s0 method.
+This allows for execute in place and shared libraries in an environment
+without virtual memory management.  This option implies \fB\-fPIC\fR.
+.IP "\fB\-mno\-id\-shared\-library\fR" 4
+.IX Item "-mno-id-shared-library"
+Generate code that doesn't assume \s-1ID\s0 based shared libraries are being used.
+This is the default.
+.IP "\fB\-mshared\-library\-id=n\fR" 4
+.IX Item "-mshared-library-id=n"
+Specified the identification number of the \s-1ID\s0 based shared library being
+compiled.  Specifying a value of 0 will generate more compact code, specifying
+other values will force the allocation of that number to the current
+library but is no more space or time efficient than omitting this option.
+.IP "\fB\-mxgot\fR" 4
+.IX Item "-mxgot"
+.PD 0
+.IP "\fB\-mno\-xgot\fR" 4
+.IX Item "-mno-xgot"
+.PD
+When generating position-independent code for ColdFire, generate code
+that works if the \s-1GOT\s0 has more than 8192 entries.  This code is
+larger and slower than code generated without this option.  On M680x0
+processors, this option is not needed; \fB\-fPIC\fR suffices.
+.Sp
+\&\s-1GCC\s0 normally uses a single instruction to load values from the \s-1GOT\s0.
+While this is relatively efficient, it only works if the \s-1GOT\s0
+is smaller than about 64k.  Anything larger causes the linker
+to report an error such as:
+.Sp
+.Vb 1
+\&        relocation truncated to fit: R_68K_GOT16O foobar
+.Ve
+.Sp
+If this happens, you should recompile your code with \fB\-mxgot\fR.
+It should then work with very large GOTs.  However, code generated with
+\&\fB\-mxgot\fR is less efficient, since it takes 4 instructions to fetch
+the value of a global symbol.
+.Sp
+Note that some linkers, including newer versions of the \s-1GNU\s0 linker,
+can create multiple GOTs and sort \s-1GOT\s0 entries.  If you have such a linker,
+you should only need to use \fB\-mxgot\fR when compiling a single
+object file that accesses more than 8192 \s-1GOT\s0 entries.  Very few do.
+.Sp
+These options have no effect unless \s-1GCC\s0 is generating
+position-independent code.
+.PP
+\fIM68hc1x Options\fR
+.IX Subsection "M68hc1x Options"
+.PP
+These are the \fB\-m\fR options defined for the 68hc11 and 68hc12
+microcontrollers.  The default values for these options depends on
+which style of microcontroller was selected when the compiler was configured;
+the defaults for the most common choices are given below.
+.IP "\fB\-m6811\fR" 4
+.IX Item "-m6811"
+.PD 0
+.IP "\fB\-m68hc11\fR" 4
+.IX Item "-m68hc11"
+.PD
+Generate output for a 68HC11.  This is the default
+when the compiler is configured for 68HC11\-based systems.
+.IP "\fB\-m6812\fR" 4
+.IX Item "-m6812"
+.PD 0
+.IP "\fB\-m68hc12\fR" 4
+.IX Item "-m68hc12"
+.PD
+Generate output for a 68HC12.  This is the default
+when the compiler is configured for 68HC12\-based systems.
+.IP "\fB\-m68S12\fR" 4
+.IX Item "-m68S12"
+.PD 0
+.IP "\fB\-m68hcs12\fR" 4
+.IX Item "-m68hcs12"
+.PD
+Generate output for a 68HCS12.
+.IP "\fB\-mauto\-incdec\fR" 4
+.IX Item "-mauto-incdec"
+Enable the use of 68HC12 pre and post auto-increment and auto-decrement
+addressing modes.
+.IP "\fB\-minmax\fR" 4
+.IX Item "-minmax"
+.PD 0
+.IP "\fB\-mnominmax\fR" 4
+.IX Item "-mnominmax"
+.PD
+Enable the use of 68HC12 min and max instructions.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Treat all calls as being far away (near).  If calls are assumed to be
+far away, the compiler will use the \f(CW\*(C`call\*(C'\fR instruction to
+call a function and the \f(CW\*(C`rtc\*(C'\fR instruction for returning.
+.IP "\fB\-mshort\fR" 4
+.IX Item "-mshort"
+Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR.
+.IP "\fB\-msoft\-reg\-count=\fR\fIcount\fR" 4
+.IX Item "-msoft-reg-count=count"
+Specify the number of pseudo-soft registers which are used for the
+code generation.  The maximum number is 32.  Using more pseudo-soft
+register may or may not result in better code depending on the program.
+The default is 4 for 68HC11 and 2 for 68HC12.
+.PP
+\fIMCore Options\fR
+.IX Subsection "MCore Options"
+.PP
+These are the \fB\-m\fR options defined for the Motorola M*Core
+processors.
+.IP "\fB\-mhardlit\fR" 4
+.IX Item "-mhardlit"
+.PD 0
+.IP "\fB\-mno\-hardlit\fR" 4
+.IX Item "-mno-hardlit"
+.PD
+Inline constants into the code stream if it can be done in two
+instructions or less.
+.IP "\fB\-mdiv\fR" 4
+.IX Item "-mdiv"
+.PD 0
+.IP "\fB\-mno\-div\fR" 4
+.IX Item "-mno-div"
+.PD
+Use the divide instruction.  (Enabled by default).
+.IP "\fB\-mrelax\-immediate\fR" 4
+.IX Item "-mrelax-immediate"
+.PD 0
+.IP "\fB\-mno\-relax\-immediate\fR" 4
+.IX Item "-mno-relax-immediate"
+.PD
+Allow arbitrary sized immediates in bit operations.
+.IP "\fB\-mwide\-bitfields\fR" 4
+.IX Item "-mwide-bitfields"
+.PD 0
+.IP "\fB\-mno\-wide\-bitfields\fR" 4
+.IX Item "-mno-wide-bitfields"
+.PD
+Always treat bit-fields as int-sized.
+.IP "\fB\-m4byte\-functions\fR" 4
+.IX Item "-m4byte-functions"
+.PD 0
+.IP "\fB\-mno\-4byte\-functions\fR" 4
+.IX Item "-mno-4byte-functions"
+.PD
+Force all functions to be aligned to a four byte boundary.
+.IP "\fB\-mcallgraph\-data\fR" 4
+.IX Item "-mcallgraph-data"
+.PD 0
+.IP "\fB\-mno\-callgraph\-data\fR" 4
+.IX Item "-mno-callgraph-data"
+.PD
+Emit callgraph information.
+.IP "\fB\-mslow\-bytes\fR" 4
+.IX Item "-mslow-bytes"
+.PD 0
+.IP "\fB\-mno\-slow\-bytes\fR" 4
+.IX Item "-mno-slow-bytes"
+.PD
+Prefer word access when reading byte quantities.
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+.PD 0
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+.PD
+Generate code for a little endian target.
+.IP "\fB\-m210\fR" 4
+.IX Item "-m210"
+.PD 0
+.IP "\fB\-m340\fR" 4
+.IX Item "-m340"
+.PD
+Generate code for the 210 processor.
+.IP "\fB\-mno\-lsim\fR" 4
+.IX Item "-mno-lsim"
+Assume that run-time support has been provided and so omit the
+simulator library (\fIlibsim.a)\fR from the linker command line.
+.IP "\fB\-mstack\-increment=\fR\fIsize\fR" 4
+.IX Item "-mstack-increment=size"
+Set the maximum amount for a single stack increment operation.  Large
+values can increase the speed of programs which contain functions
+that need a large amount of stack space, but they can also trigger a
+segmentation fault if the stack is extended too much.  The default
+value is 0x1000.
+.PP
+\fIMeP Options\fR
+.IX Subsection "MeP Options"
+.IP "\fB\-mabsdiff\fR" 4
+.IX Item "-mabsdiff"
+Enables the \f(CW\*(C`abs\*(C'\fR instruction, which is the absolute difference
+between two registers.
+.IP "\fB\-mall\-opts\fR" 4
+.IX Item "-mall-opts"
+Enables all the optional instructions \- average, multiply, divide, bit
+operations, leading zero, absolute difference, min/max, clip, and
+saturation.
+.IP "\fB\-maverage\fR" 4
+.IX Item "-maverage"
+Enables the \f(CW\*(C`ave\*(C'\fR instruction, which computes the average of two
+registers.
+.IP "\fB\-mbased=\fR\fIn\fR" 4
+.IX Item "-mbased=n"
+Variables of size \fIn\fR bytes or smaller will be placed in the
+\&\f(CW\*(C`.based\*(C'\fR section by default.  Based variables use the \f(CW$tp\fR
+register as a base register, and there is a 128 byte limit to the
+\&\f(CW\*(C`.based\*(C'\fR section.
+.IP "\fB\-mbitops\fR" 4
+.IX Item "-mbitops"
+Enables the bit operation instructions \- bit test (\f(CW\*(C`btstm\*(C'\fR), set
+(\f(CW\*(C`bsetm\*(C'\fR), clear (\f(CW\*(C`bclrm\*(C'\fR), invert (\f(CW\*(C`bnotm\*(C'\fR), and
+test-and-set (\f(CW\*(C`tas\*(C'\fR).
+.IP "\fB\-mc=\fR\fIname\fR" 4
+.IX Item "-mc=name"
+Selects which section constant data will be placed in.  \fIname\fR may
+be \f(CW\*(C`tiny\*(C'\fR, \f(CW\*(C`near\*(C'\fR, or \f(CW\*(C`far\*(C'\fR.
+.IP "\fB\-mclip\fR" 4
+.IX Item "-mclip"
+Enables the \f(CW\*(C`clip\*(C'\fR instruction.  Note that \f(CW\*(C`\-mclip\*(C'\fR is not
+useful unless you also provide \f(CW\*(C`\-mminmax\*(C'\fR.
+.IP "\fB\-mconfig=\fR\fIname\fR" 4
+.IX Item "-mconfig=name"
+Selects one of the build-in core configurations.  Each MeP chip has
+one or more modules in it; each module has a core \s-1CPU\s0 and a variety of
+coprocessors, optional instructions, and peripherals.  The
+\&\f(CW\*(C`MeP\-Integrator\*(C'\fR tool, not part of \s-1GCC\s0, provides these
+configurations through this option; using this option is the same as
+using all the corresponding command line options.  The default
+configuration is \f(CW\*(C`default\*(C'\fR.
+.IP "\fB\-mcop\fR" 4
+.IX Item "-mcop"
+Enables the coprocessor instructions.  By default, this is a 32\-bit
+coprocessor.  Note that the coprocessor is normally enabled via the
+\&\f(CW\*(C`\-mconfig=\*(C'\fR option.
+.IP "\fB\-mcop32\fR" 4
+.IX Item "-mcop32"
+Enables the 32\-bit coprocessor's instructions.
+.IP "\fB\-mcop64\fR" 4
+.IX Item "-mcop64"
+Enables the 64\-bit coprocessor's instructions.
+.IP "\fB\-mivc2\fR" 4
+.IX Item "-mivc2"
+Enables \s-1IVC2\s0 scheduling.  \s-1IVC2\s0 is a 64\-bit \s-1VLIW\s0 coprocessor.
+.IP "\fB\-mdc\fR" 4
+.IX Item "-mdc"
+Causes constant variables to be placed in the \f(CW\*(C`.near\*(C'\fR section.
+.IP "\fB\-mdiv\fR" 4
+.IX Item "-mdiv"
+Enables the \f(CW\*(C`div\*(C'\fR and \f(CW\*(C`divu\*(C'\fR instructions.
+.IP "\fB\-meb\fR" 4
+.IX Item "-meb"
+Generate big-endian code.
+.IP "\fB\-mel\fR" 4
+.IX Item "-mel"
+Generate little-endian code.
+.IP "\fB\-mio\-volatile\fR" 4
+.IX Item "-mio-volatile"
+Tells the compiler that any variable marked with the \f(CW\*(C`io\*(C'\fR
+attribute is to be considered volatile.
+.IP "\fB\-ml\fR" 4
+.IX Item "-ml"
+Causes variables to be assigned to the \f(CW\*(C`.far\*(C'\fR section by default.
+.IP "\fB\-mleadz\fR" 4
+.IX Item "-mleadz"
+Enables the \f(CW\*(C`leadz\*(C'\fR (leading zero) instruction.
+.IP "\fB\-mm\fR" 4
+.IX Item "-mm"
+Causes variables to be assigned to the \f(CW\*(C`.near\*(C'\fR section by default.
+.IP "\fB\-mminmax\fR" 4
+.IX Item "-mminmax"
+Enables the \f(CW\*(C`min\*(C'\fR and \f(CW\*(C`max\*(C'\fR instructions.
+.IP "\fB\-mmult\fR" 4
+.IX Item "-mmult"
+Enables the multiplication and multiply-accumulate instructions.
+.IP "\fB\-mno\-opts\fR" 4
+.IX Item "-mno-opts"
+Disables all the optional instructions enabled by \f(CW\*(C`\-mall\-opts\*(C'\fR.
+.IP "\fB\-mrepeat\fR" 4
+.IX Item "-mrepeat"
+Enables the \f(CW\*(C`repeat\*(C'\fR and \f(CW\*(C`erepeat\*(C'\fR instructions, used for
+low-overhead looping.
+.IP "\fB\-ms\fR" 4
+.IX Item "-ms"
+Causes all variables to default to the \f(CW\*(C`.tiny\*(C'\fR section.  Note
+that there is a 65536 byte limit to this section.  Accesses to these
+variables use the \f(CW%gp\fR base register.
+.IP "\fB\-msatur\fR" 4
+.IX Item "-msatur"
+Enables the saturation instructions.  Note that the compiler does not
+currently generate these itself, but this option is included for
+compatibility with other tools, like \f(CW\*(C`as\*(C'\fR.
+.IP "\fB\-msdram\fR" 4
+.IX Item "-msdram"
+Link the SDRAM-based runtime instead of the default ROM-based runtime.
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+Link the simulator runtime libraries.
+.IP "\fB\-msimnovec\fR" 4
+.IX Item "-msimnovec"
+Link the simulator runtime libraries, excluding built-in support
+for reset and exception vectors and tables.
+.IP "\fB\-mtf\fR" 4
+.IX Item "-mtf"
+Causes all functions to default to the \f(CW\*(C`.far\*(C'\fR section.  Without
+this option, functions default to the \f(CW\*(C`.near\*(C'\fR section.
+.IP "\fB\-mtiny=\fR\fIn\fR" 4
+.IX Item "-mtiny=n"
+Variables that are \fIn\fR bytes or smaller will be allocated to the
+\&\f(CW\*(C`.tiny\*(C'\fR section.  These variables use the \f(CW$gp\fR base
+register.  The default for this option is 4, but note that there's a
+65536 byte limit to the \f(CW\*(C`.tiny\*(C'\fR section.
+.PP
+\fIMicroBlaze Options\fR
+.IX Subsection "MicroBlaze Options"
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Use software emulation for floating point (default).
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+Use hardware floating point instructions.
+.IP "\fB\-mmemcpy\fR" 4
+.IX Item "-mmemcpy"
+Do not optimize block moves, use \f(CW\*(C`memcpy\*(C'\fR.
+.IP "\fB\-mno\-clearbss\fR" 4
+.IX Item "-mno-clearbss"
+This option is deprecated.  Use \fB\-fno\-zero\-initialized\-in\-bss\fR instead.
+.IP "\fB\-mcpu=\fR\fIcpu-type\fR" 4
+.IX Item "-mcpu=cpu-type"
+Use features of and schedule code for given \s-1CPU\s0.
+Supported values are in the format \fBv\fR\fIX\fR\fB.\fR\fI\s-1YY\s0\fR\fB.\fR\fIZ\fR, 
+where \fIX\fR is a major version, \fI\s-1YY\s0\fR is the minor version, and 
+\&\fIZ\fR is compatibility code.  Example values are \fBv3.00.a\fR,
+\&\fBv4.00.b\fR, \fBv5.00.a\fR, \fBv5.00.b\fR, \fBv5.00.b\fR, \fBv6.00.a\fR.
+.IP "\fB\-mxl\-soft\-mul\fR" 4
+.IX Item "-mxl-soft-mul"
+Use software multiply emulation (default).
+.IP "\fB\-mxl\-soft\-div\fR" 4
+.IX Item "-mxl-soft-div"
+Use software emulation for divides (default).
+.IP "\fB\-mxl\-barrel\-shift\fR" 4
+.IX Item "-mxl-barrel-shift"
+Use the hardware barrel shifter.
+.IP "\fB\-mxl\-pattern\-compare\fR" 4
+.IX Item "-mxl-pattern-compare"
+Use pattern compare instructions.
+.IP "\fB\-msmall\-divides\fR" 4
+.IX Item "-msmall-divides"
+Use table lookup optimization for small signed integer divisions.
+.IP "\fB\-mxl\-stack\-check\fR" 4
+.IX Item "-mxl-stack-check"
+This option is deprecated.  Use \-fstack\-check instead.
+.IP "\fB\-mxl\-gp\-opt\fR" 4
+.IX Item "-mxl-gp-opt"
+Use \s-1GP\s0 relative sdata/sbss sections.
+.IP "\fB\-mxl\-multiply\-high\fR" 4
+.IX Item "-mxl-multiply-high"
+Use multiply high instructions for high part of 32x32 multiply.
+.IP "\fB\-mxl\-float\-convert\fR" 4
+.IX Item "-mxl-float-convert"
+Use hardware floating point conversion instructions.
+.IP "\fB\-mxl\-float\-sqrt\fR" 4
+.IX Item "-mxl-float-sqrt"
+Use hardware floating point square root instruction.
+.IP "\fB\-mxl\-mode\-\fR\fIapp-model\fR" 4
+.IX Item "-mxl-mode-app-model"
+Select application model \fIapp-model\fR.  Valid models are
+.RS 4
+.IP "\fBexecutable\fR" 4
+.IX Item "executable"
+normal executable (default), uses startup code \fIcrt0.o\fR.
+.IP "\fBxmdstub\fR" 4
+.IX Item "xmdstub"
+for use with Xilinx Microprocessor Debugger (\s-1XMD\s0) based 
+software intrusive debug agent called xmdstub. This uses startup file 
+\&\fIcrt1.o\fR and sets the start address of the program to be 0x800.
+.IP "\fBbootstrap\fR" 4
+.IX Item "bootstrap"
+for applications that are loaded using a bootloader.
+This model uses startup file \fIcrt2.o\fR which does not contain a processor 
+reset vector handler. This is suitable for transferring control on a 
+processor reset to the bootloader rather than the application.
+.IP "\fBnovectors\fR" 4
+.IX Item "novectors"
+for applications that do not require any of the 
+MicroBlaze vectors. This option may be useful for applications running
+within a monitoring application. This model uses \fIcrt3.o\fR as a startup file.
+.RE
+.RS 4
+.Sp
+Option \fB\-xl\-mode\-\fR\fIapp-model\fR is a deprecated alias for 
+\&\fB\-mxl\-mode\-\fR\fIapp-model\fR.
+.RE
+.PP
+\fI\s-1MIPS\s0 Options\fR
+.IX Subsection "MIPS Options"
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+Generate big-endian code.
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+Generate little-endian code.  This is the default for \fBmips*el\-*\-*\fR
+configurations.
+.IP "\fB\-march=\fR\fIarch\fR" 4
+.IX Item "-march=arch"
+Generate code that will run on \fIarch\fR, which can be the name of a
+generic \s-1MIPS\s0 \s-1ISA\s0, or the name of a particular processor.
+The \s-1ISA\s0 names are:
+\&\fBmips1\fR, \fBmips2\fR, \fBmips3\fR, \fBmips4\fR,
+\&\fBmips32\fR, \fBmips32r2\fR, \fBmips64\fR and \fBmips64r2\fR.
+The processor names are:
+\&\fB4kc\fR, \fB4km\fR, \fB4kp\fR, \fB4ksc\fR,
+\&\fB4kec\fR, \fB4kem\fR, \fB4kep\fR, \fB4ksd\fR,
+\&\fB5kc\fR, \fB5kf\fR,
+\&\fB20kc\fR,
+\&\fB24kc\fR, \fB24kf2_1\fR, \fB24kf1_1\fR,
+\&\fB24kec\fR, \fB24kef2_1\fR, \fB24kef1_1\fR,
+\&\fB34kc\fR, \fB34kf2_1\fR, \fB34kf1_1\fR,
+\&\fB74kc\fR, \fB74kf2_1\fR, \fB74kf1_1\fR, \fB74kf3_2\fR,
+\&\fB1004kc\fR, \fB1004kf2_1\fR, \fB1004kf1_1\fR,
+\&\fBloongson2e\fR, \fBloongson2f\fR, \fBloongson3a\fR,
+\&\fBm4k\fR,
+\&\fBocteon\fR,
+\&\fBorion\fR,
+\&\fBr2000\fR, \fBr3000\fR, \fBr3900\fR, \fBr4000\fR, \fBr4400\fR,
+\&\fBr4600\fR, \fBr4650\fR, \fBr6000\fR, \fBr8000\fR,
+\&\fBrm7000\fR, \fBrm9000\fR,
+\&\fBr10000\fR, \fBr12000\fR, \fBr14000\fR, \fBr16000\fR,
+\&\fBsb1\fR,
+\&\fBsr71000\fR,
+\&\fBvr4100\fR, \fBvr4111\fR, \fBvr4120\fR, \fBvr4130\fR, \fBvr4300\fR,
+\&\fBvr5000\fR, \fBvr5400\fR, \fBvr5500\fR
+and \fBxlr\fR.
+The special value \fBfrom-abi\fR selects the
+most compatible architecture for the selected \s-1ABI\s0 (that is,
+\&\fBmips1\fR for 32\-bit ABIs and \fBmips3\fR for 64\-bit ABIs).
+.Sp
+Native Linux/GNU toolchains also support the value \fBnative\fR,
+which selects the best architecture option for the host processor.
+\&\fB\-march=native\fR has no effect if \s-1GCC\s0 does not recognize
+the processor.
+.Sp
+In processor names, a final \fB000\fR can be abbreviated as \fBk\fR
+(for example, \fB\-march=r2k\fR).  Prefixes are optional, and
+\&\fBvr\fR may be written \fBr\fR.
+.Sp
+Names of the form \fIn\fR\fBf2_1\fR refer to processors with
+FPUs clocked at half the rate of the core, names of the form
+\&\fIn\fR\fBf1_1\fR refer to processors with FPUs clocked at the same
+rate as the core, and names of the form \fIn\fR\fBf3_2\fR refer to
+processors with FPUs clocked a ratio of 3:2 with respect to the core.
+For compatibility reasons, \fIn\fR\fBf\fR is accepted as a synonym
+for \fIn\fR\fBf2_1\fR while \fIn\fR\fBx\fR and \fIb\fR\fBfx\fR are
+accepted as synonyms for \fIn\fR\fBf1_1\fR.
+.Sp
+\&\s-1GCC\s0 defines two macros based on the value of this option.  The first
+is \fB_MIPS_ARCH\fR, which gives the name of target architecture, as
+a string.  The second has the form \fB_MIPS_ARCH_\fR\fIfoo\fR,
+where \fIfoo\fR is the capitalized value of \fB_MIPS_ARCH\fR.
+For example, \fB\-march=r2000\fR will set \fB_MIPS_ARCH\fR
+to \fB\*(L"r2000\*(R"\fR and define the macro \fB_MIPS_ARCH_R2000\fR.
+.Sp
+Note that the \fB_MIPS_ARCH\fR macro uses the processor names given
+above.  In other words, it will have the full prefix and will not
+abbreviate \fB000\fR as \fBk\fR.  In the case of \fBfrom-abi\fR,
+the macro names the resolved architecture (either \fB\*(L"mips1\*(R"\fR or
+\&\fB\*(L"mips3\*(R"\fR).  It names the default architecture when no
+\&\fB\-march\fR option is given.
+.IP "\fB\-mtune=\fR\fIarch\fR" 4
+.IX Item "-mtune=arch"
+Optimize for \fIarch\fR.  Among other things, this option controls
+the way instructions are scheduled, and the perceived cost of arithmetic
+operations.  The list of \fIarch\fR values is the same as for
+\&\fB\-march\fR.
+.Sp
+When this option is not used, \s-1GCC\s0 will optimize for the processor
+specified by \fB\-march\fR.  By using \fB\-march\fR and
+\&\fB\-mtune\fR together, it is possible to generate code that will
+run on a family of processors, but optimize the code for one
+particular member of that family.
+.Sp
+\&\fB\-mtune\fR defines the macros \fB_MIPS_TUNE\fR and
+\&\fB_MIPS_TUNE_\fR\fIfoo\fR, which work in the same way as the
+\&\fB\-march\fR ones described above.
+.IP "\fB\-mips1\fR" 4
+.IX Item "-mips1"
+Equivalent to \fB\-march=mips1\fR.
+.IP "\fB\-mips2\fR" 4
+.IX Item "-mips2"
+Equivalent to \fB\-march=mips2\fR.
+.IP "\fB\-mips3\fR" 4
+.IX Item "-mips3"
+Equivalent to \fB\-march=mips3\fR.
+.IP "\fB\-mips4\fR" 4
+.IX Item "-mips4"
+Equivalent to \fB\-march=mips4\fR.
+.IP "\fB\-mips32\fR" 4
+.IX Item "-mips32"
+Equivalent to \fB\-march=mips32\fR.
+.IP "\fB\-mips32r2\fR" 4
+.IX Item "-mips32r2"
+Equivalent to \fB\-march=mips32r2\fR.
+.IP "\fB\-mips64\fR" 4
+.IX Item "-mips64"
+Equivalent to \fB\-march=mips64\fR.
+.IP "\fB\-mips64r2\fR" 4
+.IX Item "-mips64r2"
+Equivalent to \fB\-march=mips64r2\fR.
+.IP "\fB\-mips16\fR" 4
+.IX Item "-mips16"
+.PD 0
+.IP "\fB\-mno\-mips16\fR" 4
+.IX Item "-mno-mips16"
+.PD
+Generate (do not generate) \s-1MIPS16\s0 code.  If \s-1GCC\s0 is targetting a
+\&\s-1MIPS32\s0 or \s-1MIPS64\s0 architecture, it will make use of the MIPS16e \s-1ASE\s0.
+.Sp
+\&\s-1MIPS16\s0 code generation can also be controlled on a per-function basis
+by means of \f(CW\*(C`mips16\*(C'\fR and \f(CW\*(C`nomips16\*(C'\fR attributes.
+.IP "\fB\-mflip\-mips16\fR" 4
+.IX Item "-mflip-mips16"
+Generate \s-1MIPS16\s0 code on alternating functions.  This option is provided
+for regression testing of mixed MIPS16/non\-MIPS16 code generation, and is
+not intended for ordinary use in compiling user code.
+.IP "\fB\-minterlink\-mips16\fR" 4
+.IX Item "-minterlink-mips16"
+.PD 0
+.IP "\fB\-mno\-interlink\-mips16\fR" 4
+.IX Item "-mno-interlink-mips16"
+.PD
+Require (do not require) that non\-MIPS16 code be link-compatible with
+\&\s-1MIPS16\s0 code.
+.Sp
+For example, non\-MIPS16 code cannot jump directly to \s-1MIPS16\s0 code;
+it must either use a call or an indirect jump.  \fB\-minterlink\-mips16\fR
+therefore disables direct jumps unless \s-1GCC\s0 knows that the target of the
+jump is not \s-1MIPS16\s0.
+.IP "\fB\-mabi=32\fR" 4
+.IX Item "-mabi=32"
+.PD 0
+.IP "\fB\-mabi=o64\fR" 4
+.IX Item "-mabi=o64"
+.IP "\fB\-mabi=n32\fR" 4
+.IX Item "-mabi=n32"
+.IP "\fB\-mabi=64\fR" 4
+.IX Item "-mabi=64"
+.IP "\fB\-mabi=eabi\fR" 4
+.IX Item "-mabi=eabi"
+.PD
+Generate code for the given \s-1ABI\s0.
+.Sp
+Note that the \s-1EABI\s0 has a 32\-bit and a 64\-bit variant.  \s-1GCC\s0 normally
+generates 64\-bit code when you select a 64\-bit architecture, but you
+can use \fB\-mgp32\fR to get 32\-bit code instead.
+.Sp
+For information about the O64 \s-1ABI\s0, see
+<\fBhttp://gcc.gnu.org/projects/mipso64\-abi.html\fR>.
+.Sp
+\&\s-1GCC\s0 supports a variant of the o32 \s-1ABI\s0 in which floating-point registers
+are 64 rather than 32 bits wide.  You can select this combination with
+\&\fB\-mabi=32\fR \fB\-mfp64\fR.  This \s-1ABI\s0 relies on the \fBmthc1\fR
+and \fBmfhc1\fR instructions and is therefore only supported for
+\&\s-1MIPS32R2\s0 processors.
+.Sp
+The register assignments for arguments and return values remain the
+same, but each scalar value is passed in a single 64\-bit register
+rather than a pair of 32\-bit registers.  For example, scalar
+floating-point values are returned in \fB\f(CB$f0\fB\fR only, not a
+\&\fB\f(CB$f0\fB\fR/\fB\f(CB$f1\fB\fR pair.  The set of call-saved registers also
+remains the same, but all 64 bits are saved.
+.IP "\fB\-mabicalls\fR" 4
+.IX Item "-mabicalls"
+.PD 0
+.IP "\fB\-mno\-abicalls\fR" 4
+.IX Item "-mno-abicalls"
+.PD
+Generate (do not generate) code that is suitable for SVR4\-style
+dynamic objects.  \fB\-mabicalls\fR is the default for SVR4\-based
+systems.
+.IP "\fB\-mshared\fR" 4
+.IX Item "-mshared"
+.PD 0
+.IP "\fB\-mno\-shared\fR" 4
+.IX Item "-mno-shared"
+.PD
+Generate (do not generate) code that is fully position-independent,
+and that can therefore be linked into shared libraries.  This option
+only affects \fB\-mabicalls\fR.
+.Sp
+All \fB\-mabicalls\fR code has traditionally been position-independent,
+regardless of options like \fB\-fPIC\fR and \fB\-fpic\fR.  However,
+as an extension, the \s-1GNU\s0 toolchain allows executables to use absolute
+accesses for locally-binding symbols.  It can also use shorter \s-1GP\s0
+initialization sequences and generate direct calls to locally-defined
+functions.  This mode is selected by \fB\-mno\-shared\fR.
+.Sp
+\&\fB\-mno\-shared\fR depends on binutils 2.16 or higher and generates
+objects that can only be linked by the \s-1GNU\s0 linker.  However, the option
+does not affect the \s-1ABI\s0 of the final executable; it only affects the \s-1ABI\s0
+of relocatable objects.  Using \fB\-mno\-shared\fR will generally make
+executables both smaller and quicker.
+.Sp
+\&\fB\-mshared\fR is the default.
+.IP "\fB\-mplt\fR" 4
+.IX Item "-mplt"
+.PD 0
+.IP "\fB\-mno\-plt\fR" 4
+.IX Item "-mno-plt"
+.PD
+Assume (do not assume) that the static and dynamic linkers
+support PLTs and copy relocations.  This option only affects
+\&\fB\-mno\-shared \-mabicalls\fR.  For the n64 \s-1ABI\s0, this option
+has no effect without \fB\-msym32\fR.
+.Sp
+You can make \fB\-mplt\fR the default by configuring
+\&\s-1GCC\s0 with \fB\-\-with\-mips\-plt\fR.  The default is
+\&\fB\-mno\-plt\fR otherwise.
+.IP "\fB\-mxgot\fR" 4
+.IX Item "-mxgot"
+.PD 0
+.IP "\fB\-mno\-xgot\fR" 4
+.IX Item "-mno-xgot"
+.PD
+Lift (do not lift) the usual restrictions on the size of the global
+offset table.
+.Sp
+\&\s-1GCC\s0 normally uses a single instruction to load values from the \s-1GOT\s0.
+While this is relatively efficient, it will only work if the \s-1GOT\s0
+is smaller than about 64k.  Anything larger will cause the linker
+to report an error such as:
+.Sp
+.Vb 1
+\&        relocation truncated to fit: R_MIPS_GOT16 foobar
+.Ve
+.Sp
+If this happens, you should recompile your code with \fB\-mxgot\fR.
+It should then work with very large GOTs, although it will also be
+less efficient, since it will take three instructions to fetch the
+value of a global symbol.
+.Sp
+Note that some linkers can create multiple GOTs.  If you have such a
+linker, you should only need to use \fB\-mxgot\fR when a single object
+file accesses more than 64k's worth of \s-1GOT\s0 entries.  Very few do.
+.Sp
+These options have no effect unless \s-1GCC\s0 is generating position
+independent code.
+.IP "\fB\-mgp32\fR" 4
+.IX Item "-mgp32"
+Assume that general-purpose registers are 32 bits wide.
+.IP "\fB\-mgp64\fR" 4
+.IX Item "-mgp64"
+Assume that general-purpose registers are 64 bits wide.
+.IP "\fB\-mfp32\fR" 4
+.IX Item "-mfp32"
+Assume that floating-point registers are 32 bits wide.
+.IP "\fB\-mfp64\fR" 4
+.IX Item "-mfp64"
+Assume that floating-point registers are 64 bits wide.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+Use floating-point coprocessor instructions.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Do not use floating-point coprocessor instructions.  Implement
+floating-point calculations using library calls instead.
+.IP "\fB\-msingle\-float\fR" 4
+.IX Item "-msingle-float"
+Assume that the floating-point coprocessor only supports single-precision
+operations.
+.IP "\fB\-mdouble\-float\fR" 4
+.IX Item "-mdouble-float"
+Assume that the floating-point coprocessor supports double-precision
+operations.  This is the default.
+.IP "\fB\-mllsc\fR" 4
+.IX Item "-mllsc"
+.PD 0
+.IP "\fB\-mno\-llsc\fR" 4
+.IX Item "-mno-llsc"
+.PD
+Use (do not use) \fBll\fR, \fBsc\fR, and \fBsync\fR instructions to
+implement atomic memory built-in functions.  When neither option is
+specified, \s-1GCC\s0 will use the instructions if the target architecture
+supports them.
+.Sp
+\&\fB\-mllsc\fR is useful if the runtime environment can emulate the
+instructions and \fB\-mno\-llsc\fR can be useful when compiling for
+nonstandard ISAs.  You can make either option the default by
+configuring \s-1GCC\s0 with \fB\-\-with\-llsc\fR and \fB\-\-without\-llsc\fR
+respectively.  \fB\-\-with\-llsc\fR is the default for some
+configurations; see the installation documentation for details.
+.IP "\fB\-mdsp\fR" 4
+.IX Item "-mdsp"
+.PD 0
+.IP "\fB\-mno\-dsp\fR" 4
+.IX Item "-mno-dsp"
+.PD
+Use (do not use) revision 1 of the \s-1MIPS\s0 \s-1DSP\s0 \s-1ASE\s0.
+  This option defines the
+preprocessor macro \fB_\|_mips_dsp\fR.  It also defines
+\&\fB_\|_mips_dsp_rev\fR to 1.
+.IP "\fB\-mdspr2\fR" 4
+.IX Item "-mdspr2"
+.PD 0
+.IP "\fB\-mno\-dspr2\fR" 4
+.IX Item "-mno-dspr2"
+.PD
+Use (do not use) revision 2 of the \s-1MIPS\s0 \s-1DSP\s0 \s-1ASE\s0.
+  This option defines the
+preprocessor macros \fB_\|_mips_dsp\fR and \fB_\|_mips_dspr2\fR.
+It also defines \fB_\|_mips_dsp_rev\fR to 2.
+.IP "\fB\-msmartmips\fR" 4
+.IX Item "-msmartmips"
+.PD 0
+.IP "\fB\-mno\-smartmips\fR" 4
+.IX Item "-mno-smartmips"
+.PD
+Use (do not use) the \s-1MIPS\s0 SmartMIPS \s-1ASE\s0.
+.IP "\fB\-mpaired\-single\fR" 4
+.IX Item "-mpaired-single"
+.PD 0
+.IP "\fB\-mno\-paired\-single\fR" 4
+.IX Item "-mno-paired-single"
+.PD
+Use (do not use) paired-single floating-point instructions.
+  This option requires
+hardware floating-point support to be enabled.
+.IP "\fB\-mdmx\fR" 4
+.IX Item "-mdmx"
+.PD 0
+.IP "\fB\-mno\-mdmx\fR" 4
+.IX Item "-mno-mdmx"
+.PD
+Use (do not use) \s-1MIPS\s0 Digital Media Extension instructions.
+This option can only be used when generating 64\-bit code and requires
+hardware floating-point support to be enabled.
+.IP "\fB\-mips3d\fR" 4
+.IX Item "-mips3d"
+.PD 0
+.IP "\fB\-mno\-mips3d\fR" 4
+.IX Item "-mno-mips3d"
+.PD
+Use (do not use) the \s-1MIPS\-3D\s0 \s-1ASE\s0.  
+The option \fB\-mips3d\fR implies \fB\-mpaired\-single\fR.
+.IP "\fB\-mmt\fR" 4
+.IX Item "-mmt"
+.PD 0
+.IP "\fB\-mno\-mt\fR" 4
+.IX Item "-mno-mt"
+.PD
+Use (do not use) \s-1MT\s0 Multithreading instructions.
+.IP "\fB\-mlong64\fR" 4
+.IX Item "-mlong64"
+Force \f(CW\*(C`long\*(C'\fR types to be 64 bits wide.  See \fB\-mlong32\fR for
+an explanation of the default and the way that the pointer size is
+determined.
+.IP "\fB\-mlong32\fR" 4
+.IX Item "-mlong32"
+Force \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`int\*(C'\fR, and pointer types to be 32 bits wide.
+.Sp
+The default size of \f(CW\*(C`int\*(C'\fRs, \f(CW\*(C`long\*(C'\fRs and pointers depends on
+the \s-1ABI\s0.  All the supported ABIs use 32\-bit \f(CW\*(C`int\*(C'\fRs.  The n64 \s-1ABI\s0
+uses 64\-bit \f(CW\*(C`long\*(C'\fRs, as does the 64\-bit \s-1EABI\s0; the others use
+32\-bit \f(CW\*(C`long\*(C'\fRs.  Pointers are the same size as \f(CW\*(C`long\*(C'\fRs,
+or the same size as integer registers, whichever is smaller.
+.IP "\fB\-msym32\fR" 4
+.IX Item "-msym32"
+.PD 0
+.IP "\fB\-mno\-sym32\fR" 4
+.IX Item "-mno-sym32"
+.PD
+Assume (do not assume) that all symbols have 32\-bit values, regardless
+of the selected \s-1ABI\s0.  This option is useful in combination with
+\&\fB\-mabi=64\fR and \fB\-mno\-abicalls\fR because it allows \s-1GCC\s0
+to generate shorter and faster references to symbolic addresses.
+.IP "\fB\-G\fR \fInum\fR" 4
+.IX Item "-G num"
+Put definitions of externally-visible data in a small data section
+if that data is no bigger than \fInum\fR bytes.  \s-1GCC\s0 can then access
+the data more efficiently; see \fB\-mgpopt\fR for details.
+.Sp
+The default \fB\-G\fR option depends on the configuration.
+.IP "\fB\-mlocal\-sdata\fR" 4
+.IX Item "-mlocal-sdata"
+.PD 0
+.IP "\fB\-mno\-local\-sdata\fR" 4
+.IX Item "-mno-local-sdata"
+.PD
+Extend (do not extend) the \fB\-G\fR behavior to local data too,
+such as to static variables in C.  \fB\-mlocal\-sdata\fR is the
+default for all configurations.
+.Sp
+If the linker complains that an application is using too much small data,
+you might want to try rebuilding the less performance-critical parts with
+\&\fB\-mno\-local\-sdata\fR.  You might also want to build large
+libraries with \fB\-mno\-local\-sdata\fR, so that the libraries leave
+more room for the main program.
+.IP "\fB\-mextern\-sdata\fR" 4
+.IX Item "-mextern-sdata"
+.PD 0
+.IP "\fB\-mno\-extern\-sdata\fR" 4
+.IX Item "-mno-extern-sdata"
+.PD
+Assume (do not assume) that externally-defined data will be in
+a small data section if that data is within the \fB\-G\fR limit.
+\&\fB\-mextern\-sdata\fR is the default for all configurations.
+.Sp
+If you compile a module \fIMod\fR with \fB\-mextern\-sdata\fR \fB\-G\fR
+\&\fInum\fR \fB\-mgpopt\fR, and \fIMod\fR references a variable \fIVar\fR
+that is no bigger than \fInum\fR bytes, you must make sure that \fIVar\fR
+is placed in a small data section.  If \fIVar\fR is defined by another
+module, you must either compile that module with a high-enough
+\&\fB\-G\fR setting or attach a \f(CW\*(C`section\*(C'\fR attribute to \fIVar\fR's
+definition.  If \fIVar\fR is common, you must link the application
+with a high-enough \fB\-G\fR setting.
+.Sp
+The easiest way of satisfying these restrictions is to compile
+and link every module with the same \fB\-G\fR option.  However,
+you may wish to build a library that supports several different
+small data limits.  You can do this by compiling the library with
+the highest supported \fB\-G\fR setting and additionally using
+\&\fB\-mno\-extern\-sdata\fR to stop the library from making assumptions
+about externally-defined data.
+.IP "\fB\-mgpopt\fR" 4
+.IX Item "-mgpopt"
+.PD 0
+.IP "\fB\-mno\-gpopt\fR" 4
+.IX Item "-mno-gpopt"
+.PD
+Use (do not use) GP-relative accesses for symbols that are known to be
+in a small data section; see \fB\-G\fR, \fB\-mlocal\-sdata\fR and
+\&\fB\-mextern\-sdata\fR.  \fB\-mgpopt\fR is the default for all
+configurations.
+.Sp
+\&\fB\-mno\-gpopt\fR is useful for cases where the \f(CW$gp\fR register
+might not hold the value of \f(CW\*(C`_gp\*(C'\fR.  For example, if the code is
+part of a library that might be used in a boot monitor, programs that
+call boot monitor routines will pass an unknown value in \f(CW$gp\fR.
+(In such situations, the boot monitor itself would usually be compiled
+with \fB\-G0\fR.)
+.Sp
+\&\fB\-mno\-gpopt\fR implies \fB\-mno\-local\-sdata\fR and
+\&\fB\-mno\-extern\-sdata\fR.
+.IP "\fB\-membedded\-data\fR" 4
+.IX Item "-membedded-data"
+.PD 0
+.IP "\fB\-mno\-embedded\-data\fR" 4
+.IX Item "-mno-embedded-data"
+.PD
+Allocate variables to the read-only data section first if possible, then
+next in the small data section if possible, otherwise in data.  This gives
+slightly slower code than the default, but reduces the amount of \s-1RAM\s0 required
+when executing, and thus may be preferred for some embedded systems.
+.IP "\fB\-muninit\-const\-in\-rodata\fR" 4
+.IX Item "-muninit-const-in-rodata"
+.PD 0
+.IP "\fB\-mno\-uninit\-const\-in\-rodata\fR" 4
+.IX Item "-mno-uninit-const-in-rodata"
+.PD
+Put uninitialized \f(CW\*(C`const\*(C'\fR variables in the read-only data section.
+This option is only meaningful in conjunction with \fB\-membedded\-data\fR.
+.IP "\fB\-mcode\-readable=\fR\fIsetting\fR" 4
+.IX Item "-mcode-readable=setting"
+Specify whether \s-1GCC\s0 may generate code that reads from executable sections.
+There are three possible settings:
+.RS 4
+.IP "\fB\-mcode\-readable=yes\fR" 4
+.IX Item "-mcode-readable=yes"
+Instructions may freely access executable sections.  This is the
+default setting.
+.IP "\fB\-mcode\-readable=pcrel\fR" 4
+.IX Item "-mcode-readable=pcrel"
+\&\s-1MIPS16\s0 PC-relative load instructions can access executable sections,
+but other instructions must not do so.  This option is useful on 4KSc
+and 4KSd processors when the code TLBs have the Read Inhibit bit set.
+It is also useful on processors that can be configured to have a dual
+instruction/data \s-1SRAM\s0 interface and that, like the M4K, automatically
+redirect PC-relative loads to the instruction \s-1RAM\s0.
+.IP "\fB\-mcode\-readable=no\fR" 4
+.IX Item "-mcode-readable=no"
+Instructions must not access executable sections.  This option can be
+useful on targets that are configured to have a dual instruction/data
+\&\s-1SRAM\s0 interface but that (unlike the M4K) do not automatically redirect
+PC-relative loads to the instruction \s-1RAM\s0.
+.RE
+.RS 4
+.RE
+.IP "\fB\-msplit\-addresses\fR" 4
+.IX Item "-msplit-addresses"
+.PD 0
+.IP "\fB\-mno\-split\-addresses\fR" 4
+.IX Item "-mno-split-addresses"
+.PD
+Enable (disable) use of the \f(CW\*(C`%hi()\*(C'\fR and \f(CW\*(C`%lo()\*(C'\fR assembler
+relocation operators.  This option has been superseded by
+\&\fB\-mexplicit\-relocs\fR but is retained for backwards compatibility.
+.IP "\fB\-mexplicit\-relocs\fR" 4
+.IX Item "-mexplicit-relocs"
+.PD 0
+.IP "\fB\-mno\-explicit\-relocs\fR" 4
+.IX Item "-mno-explicit-relocs"
+.PD
+Use (do not use) assembler relocation operators when dealing with symbolic
+addresses.  The alternative, selected by \fB\-mno\-explicit\-relocs\fR,
+is to use assembler macros instead.
+.Sp
+\&\fB\-mexplicit\-relocs\fR is the default if \s-1GCC\s0 was configured
+to use an assembler that supports relocation operators.
+.IP "\fB\-mcheck\-zero\-division\fR" 4
+.IX Item "-mcheck-zero-division"
+.PD 0
+.IP "\fB\-mno\-check\-zero\-division\fR" 4
+.IX Item "-mno-check-zero-division"
+.PD
+Trap (do not trap) on integer division by zero.
+.Sp
+The default is \fB\-mcheck\-zero\-division\fR.
+.IP "\fB\-mdivide\-traps\fR" 4
+.IX Item "-mdivide-traps"
+.PD 0
+.IP "\fB\-mdivide\-breaks\fR" 4
+.IX Item "-mdivide-breaks"
+.PD
+\&\s-1MIPS\s0 systems check for division by zero by generating either a
+conditional trap or a break instruction.  Using traps results in
+smaller code, but is only supported on \s-1MIPS\s0 \s-1II\s0 and later.  Also, some
+versions of the Linux kernel have a bug that prevents trap from
+generating the proper signal (\f(CW\*(C`SIGFPE\*(C'\fR).  Use \fB\-mdivide\-traps\fR to
+allow conditional traps on architectures that support them and
+\&\fB\-mdivide\-breaks\fR to force the use of breaks.
+.Sp
+The default is usually \fB\-mdivide\-traps\fR, but this can be
+overridden at configure time using \fB\-\-with\-divide=breaks\fR.
+Divide-by-zero checks can be completely disabled using
+\&\fB\-mno\-check\-zero\-division\fR.
+.IP "\fB\-mmemcpy\fR" 4
+.IX Item "-mmemcpy"
+.PD 0
+.IP "\fB\-mno\-memcpy\fR" 4
+.IX Item "-mno-memcpy"
+.PD
+Force (do not force) the use of \f(CW\*(C`memcpy()\*(C'\fR for non-trivial block
+moves.  The default is \fB\-mno\-memcpy\fR, which allows \s-1GCC\s0 to inline
+most constant-sized copies.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Disable (do not disable) use of the \f(CW\*(C`jal\*(C'\fR instruction.  Calling
+functions using \f(CW\*(C`jal\*(C'\fR is more efficient but requires the caller
+and callee to be in the same 256 megabyte segment.
+.Sp
+This option has no effect on abicalls code.  The default is
+\&\fB\-mno\-long\-calls\fR.
+.IP "\fB\-mmad\fR" 4
+.IX Item "-mmad"
+.PD 0
+.IP "\fB\-mno\-mad\fR" 4
+.IX Item "-mno-mad"
+.PD
+Enable (disable) use of the \f(CW\*(C`mad\*(C'\fR, \f(CW\*(C`madu\*(C'\fR and \f(CW\*(C`mul\*(C'\fR
+instructions, as provided by the R4650 \s-1ISA\s0.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Enable (disable) use of the floating point multiply-accumulate
+instructions, when they are available.  The default is
+\&\fB\-mfused\-madd\fR.
+.Sp
+When multiply-accumulate instructions are used, the intermediate
+product is calculated to infinite precision and is not subject to
+the \s-1FCSR\s0 Flush to Zero bit.  This may be undesirable in some
+circumstances.
+.IP "\fB\-nocpp\fR" 4
+.IX Item "-nocpp"
+Tell the \s-1MIPS\s0 assembler to not run its preprocessor over user
+assembler files (with a \fB.s\fR suffix) when assembling them.
+.IP "\fB\-mfix\-r4000\fR" 4
+.IX Item "-mfix-r4000"
+.PD 0
+.IP "\fB\-mno\-fix\-r4000\fR" 4
+.IX Item "-mno-fix-r4000"
+.PD
+Work around certain R4000 \s-1CPU\s0 errata:
+.RS 4
+.IP "\-" 4
+A double-word or a variable shift may give an incorrect result if executed
+immediately after starting an integer division.
+.IP "\-" 4
+A double-word or a variable shift may give an incorrect result if executed
+while an integer multiplication is in progress.
+.IP "\-" 4
+An integer division may give an incorrect result if started in a delay slot
+of a taken branch or a jump.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mfix\-r4400\fR" 4
+.IX Item "-mfix-r4400"
+.PD 0
+.IP "\fB\-mno\-fix\-r4400\fR" 4
+.IX Item "-mno-fix-r4400"
+.PD
+Work around certain R4400 \s-1CPU\s0 errata:
+.RS 4
+.IP "\-" 4
+A double-word or a variable shift may give an incorrect result if executed
+immediately after starting an integer division.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mfix\-r10000\fR" 4
+.IX Item "-mfix-r10000"
+.PD 0
+.IP "\fB\-mno\-fix\-r10000\fR" 4
+.IX Item "-mno-fix-r10000"
+.PD
+Work around certain R10000 errata:
+.RS 4
+.IP "\-" 4
+\&\f(CW\*(C`ll\*(C'\fR/\f(CW\*(C`sc\*(C'\fR sequences may not behave atomically on revisions
+prior to 3.0.  They may deadlock on revisions 2.6 and earlier.
+.RE
+.RS 4
+.Sp
+This option can only be used if the target architecture supports
+branch-likely instructions.  \fB\-mfix\-r10000\fR is the default when
+\&\fB\-march=r10000\fR is used; \fB\-mno\-fix\-r10000\fR is the default
+otherwise.
+.RE
+.IP "\fB\-mfix\-vr4120\fR" 4
+.IX Item "-mfix-vr4120"
+.PD 0
+.IP "\fB\-mno\-fix\-vr4120\fR" 4
+.IX Item "-mno-fix-vr4120"
+.PD
+Work around certain \s-1VR4120\s0 errata:
+.RS 4
+.IP "\-" 4
+\&\f(CW\*(C`dmultu\*(C'\fR does not always produce the correct result.
+.IP "\-" 4
+\&\f(CW\*(C`div\*(C'\fR and \f(CW\*(C`ddiv\*(C'\fR do not always produce the correct result if one
+of the operands is negative.
+.RE
+.RS 4
+.Sp
+The workarounds for the division errata rely on special functions in
+\&\fIlibgcc.a\fR.  At present, these functions are only provided by
+the \f(CW\*(C`mips64vr*\-elf\*(C'\fR configurations.
+.Sp
+Other \s-1VR4120\s0 errata require a nop to be inserted between certain pairs of
+instructions.  These errata are handled by the assembler, not by \s-1GCC\s0 itself.
+.RE
+.IP "\fB\-mfix\-vr4130\fR" 4
+.IX Item "-mfix-vr4130"
+Work around the \s-1VR4130\s0 \f(CW\*(C`mflo\*(C'\fR/\f(CW\*(C`mfhi\*(C'\fR errata.  The
+workarounds are implemented by the assembler rather than by \s-1GCC\s0,
+although \s-1GCC\s0 will avoid using \f(CW\*(C`mflo\*(C'\fR and \f(CW\*(C`mfhi\*(C'\fR if the
+\&\s-1VR4130\s0 \f(CW\*(C`macc\*(C'\fR, \f(CW\*(C`macchi\*(C'\fR, \f(CW\*(C`dmacc\*(C'\fR and \f(CW\*(C`dmacchi\*(C'\fR
+instructions are available instead.
+.IP "\fB\-mfix\-sb1\fR" 4
+.IX Item "-mfix-sb1"
+.PD 0
+.IP "\fB\-mno\-fix\-sb1\fR" 4
+.IX Item "-mno-fix-sb1"
+.PD
+Work around certain \s-1SB\-1\s0 \s-1CPU\s0 core errata.
+(This flag currently works around the \s-1SB\-1\s0 revision 2
+\&\*(L"F1\*(R" and \*(L"F2\*(R" floating point errata.)
+.IP "\fB\-mr10k\-cache\-barrier=\fR\fIsetting\fR" 4
+.IX Item "-mr10k-cache-barrier=setting"
+Specify whether \s-1GCC\s0 should insert cache barriers to avoid the
+side-effects of speculation on R10K processors.
+.Sp
+In common with many processors, the R10K tries to predict the outcome
+of a conditional branch and speculatively executes instructions from
+the \*(L"taken\*(R" branch.  It later aborts these instructions if the
+predicted outcome was wrong.  However, on the R10K, even aborted
+instructions can have side effects.
+.Sp
+This problem only affects kernel stores and, depending on the system,
+kernel loads.  As an example, a speculatively-executed store may load
+the target memory into cache and mark the cache line as dirty, even if
+the store itself is later aborted.  If a \s-1DMA\s0 operation writes to the
+same area of memory before the \*(L"dirty\*(R" line is flushed, the cached
+data will overwrite the DMA-ed data.  See the R10K processor manual
+for a full description, including other potential problems.
+.Sp
+One workaround is to insert cache barrier instructions before every memory
+access that might be speculatively executed and that might have side
+effects even if aborted.  \fB\-mr10k\-cache\-barrier=\fR\fIsetting\fR
+controls \s-1GCC\s0's implementation of this workaround.  It assumes that
+aborted accesses to any byte in the following regions will not have
+side effects:
+.RS 4
+.IP "1." 4
+the memory occupied by the current function's stack frame;
+.IP "2." 4
+the memory occupied by an incoming stack argument;
+.IP "3." 4
+the memory occupied by an object with a link-time-constant address.
+.RE
+.RS 4
+.Sp
+It is the kernel's responsibility to ensure that speculative
+accesses to these regions are indeed safe.
+.Sp
+If the input program contains a function declaration such as:
+.Sp
+.Vb 1
+\&        void foo (void);
+.Ve
+.Sp
+then the implementation of \f(CW\*(C`foo\*(C'\fR must allow \f(CW\*(C`j foo\*(C'\fR and
+\&\f(CW\*(C`jal foo\*(C'\fR to be executed speculatively.  \s-1GCC\s0 honors this
+restriction for functions it compiles itself.  It expects non-GCC
+functions (such as hand-written assembly code) to do the same.
+.Sp
+The option has three forms:
+.IP "\fB\-mr10k\-cache\-barrier=load\-store\fR" 4
+.IX Item "-mr10k-cache-barrier=load-store"
+Insert a cache barrier before a load or store that might be
+speculatively executed and that might have side effects even
+if aborted.
+.IP "\fB\-mr10k\-cache\-barrier=store\fR" 4
+.IX Item "-mr10k-cache-barrier=store"
+Insert a cache barrier before a store that might be speculatively
+executed and that might have side effects even if aborted.
+.IP "\fB\-mr10k\-cache\-barrier=none\fR" 4
+.IX Item "-mr10k-cache-barrier=none"
+Disable the insertion of cache barriers.  This is the default setting.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mflush\-func=\fR\fIfunc\fR" 4
+.IX Item "-mflush-func=func"
+.PD 0
+.IP "\fB\-mno\-flush\-func\fR" 4
+.IX Item "-mno-flush-func"
+.PD
+Specifies the function to call to flush the I and D caches, or to not
+call any such function.  If called, the function must take the same
+arguments as the common \f(CW\*(C`_flush_func()\*(C'\fR, that is, the address of the
+memory range for which the cache is being flushed, the size of the
+memory range, and the number 3 (to flush both caches).  The default
+depends on the target \s-1GCC\s0 was configured for, but commonly is either
+\&\fB_flush_func\fR or \fB_\|_cpu_flush\fR.
+.IP "\fBmbranch\-cost=\fR\fInum\fR" 4
+.IX Item "mbranch-cost=num"
+Set the cost of branches to roughly \fInum\fR \*(L"simple\*(R" instructions.
+This cost is only a heuristic and is not guaranteed to produce
+consistent results across releases.  A zero cost redundantly selects
+the default, which is based on the \fB\-mtune\fR setting.
+.IP "\fB\-mbranch\-likely\fR" 4
+.IX Item "-mbranch-likely"
+.PD 0
+.IP "\fB\-mno\-branch\-likely\fR" 4
+.IX Item "-mno-branch-likely"
+.PD
+Enable or disable use of Branch Likely instructions, regardless of the
+default for the selected architecture.  By default, Branch Likely
+instructions may be generated if they are supported by the selected
+architecture.  An exception is for the \s-1MIPS32\s0 and \s-1MIPS64\s0 architectures
+and processors which implement those architectures; for those, Branch
+Likely instructions will not be generated by default because the \s-1MIPS32\s0
+and \s-1MIPS64\s0 architectures specifically deprecate their use.
+.IP "\fB\-mfp\-exceptions\fR" 4
+.IX Item "-mfp-exceptions"
+.PD 0
+.IP "\fB\-mno\-fp\-exceptions\fR" 4
+.IX Item "-mno-fp-exceptions"
+.PD
+Specifies whether \s-1FP\s0 exceptions are enabled.  This affects how we schedule
+\&\s-1FP\s0 instructions for some processors.  The default is that \s-1FP\s0 exceptions are
+enabled.
+.Sp
+For instance, on the \s-1SB\-1\s0, if \s-1FP\s0 exceptions are disabled, and we are emitting
+64\-bit code, then we can use both \s-1FP\s0 pipes.  Otherwise, we can only use one
+\&\s-1FP\s0 pipe.
+.IP "\fB\-mvr4130\-align\fR" 4
+.IX Item "-mvr4130-align"
+.PD 0
+.IP "\fB\-mno\-vr4130\-align\fR" 4
+.IX Item "-mno-vr4130-align"
+.PD
+The \s-1VR4130\s0 pipeline is two-way superscalar, but can only issue two
+instructions together if the first one is 8\-byte aligned.  When this
+option is enabled, \s-1GCC\s0 will align pairs of instructions that it
+thinks should execute in parallel.
+.Sp
+This option only has an effect when optimizing for the \s-1VR4130\s0.
+It normally makes code faster, but at the expense of making it bigger.
+It is enabled by default at optimization level \fB\-O3\fR.
+.IP "\fB\-msynci\fR" 4
+.IX Item "-msynci"
+.PD 0
+.IP "\fB\-mno\-synci\fR" 4
+.IX Item "-mno-synci"
+.PD
+Enable (disable) generation of \f(CW\*(C`synci\*(C'\fR instructions on
+architectures that support it.  The \f(CW\*(C`synci\*(C'\fR instructions (if
+enabled) will be generated when \f(CW\*(C`_\|_builtin_\|_\|_clear_cache()\*(C'\fR is
+compiled.
+.Sp
+This option defaults to \f(CW\*(C`\-mno\-synci\*(C'\fR, but the default can be
+overridden by configuring with \f(CW\*(C`\-\-with\-synci\*(C'\fR.
+.Sp
+When compiling code for single processor systems, it is generally safe
+to use \f(CW\*(C`synci\*(C'\fR.  However, on many multi-core (\s-1SMP\s0) systems, it
+will not invalidate the instruction caches on all cores and may lead
+to undefined behavior.
+.IP "\fB\-mrelax\-pic\-calls\fR" 4
+.IX Item "-mrelax-pic-calls"
+.PD 0
+.IP "\fB\-mno\-relax\-pic\-calls\fR" 4
+.IX Item "-mno-relax-pic-calls"
+.PD
+Try to turn \s-1PIC\s0 calls that are normally dispatched via register
+\&\f(CW$25\fR into direct calls.  This is only possible if the linker can
+resolve the destination at link-time and if the destination is within
+range for a direct call.
+.Sp
+\&\fB\-mrelax\-pic\-calls\fR is the default if \s-1GCC\s0 was configured to use
+an assembler and a linker that supports the \f(CW\*(C`.reloc\*(C'\fR assembly
+directive and \f(CW\*(C`\-mexplicit\-relocs\*(C'\fR is in effect.  With
+\&\f(CW\*(C`\-mno\-explicit\-relocs\*(C'\fR, this optimization can be performed by the
+assembler and the linker alone without help from the compiler.
+.IP "\fB\-mmcount\-ra\-address\fR" 4
+.IX Item "-mmcount-ra-address"
+.PD 0
+.IP "\fB\-mno\-mcount\-ra\-address\fR" 4
+.IX Item "-mno-mcount-ra-address"
+.PD
+Emit (do not emit) code that allows \f(CW\*(C`_mcount\*(C'\fR to modify the
+calling function's return address.  When enabled, this option extends
+the usual \f(CW\*(C`_mcount\*(C'\fR interface with a new \fIra-address\fR
+parameter, which has type \f(CW\*(C`intptr_t *\*(C'\fR and is passed in register
+\&\f(CW$12\fR.  \f(CW\*(C`_mcount\*(C'\fR can then modify the return address by
+doing both of the following:
+.RS 4
+.IP "\(bu" 4
+Returning the new address in register \f(CW$31\fR.
+.IP "\(bu" 4
+Storing the new address in \f(CW\*(C`*\f(CIra\-address\f(CW\*(C'\fR,
+if \fIra-address\fR is nonnull.
+.RE
+.RS 4
+.Sp
+The default is \fB\-mno\-mcount\-ra\-address\fR.
+.RE
+.PP
+\fI\s-1MMIX\s0 Options\fR
+.IX Subsection "MMIX Options"
+.PP
+These options are defined for the \s-1MMIX:\s0
+.IP "\fB\-mlibfuncs\fR" 4
+.IX Item "-mlibfuncs"
+.PD 0
+.IP "\fB\-mno\-libfuncs\fR" 4
+.IX Item "-mno-libfuncs"
+.PD
+Specify that intrinsic library functions are being compiled, passing all
+values in registers, no matter the size.
+.IP "\fB\-mepsilon\fR" 4
+.IX Item "-mepsilon"
+.PD 0
+.IP "\fB\-mno\-epsilon\fR" 4
+.IX Item "-mno-epsilon"
+.PD
+Generate floating-point comparison instructions that compare with respect
+to the \f(CW\*(C`rE\*(C'\fR epsilon register.
+.IP "\fB\-mabi=mmixware\fR" 4
+.IX Item "-mabi=mmixware"
+.PD 0
+.IP "\fB\-mabi=gnu\fR" 4
+.IX Item "-mabi=gnu"
+.PD
+Generate code that passes function parameters and return values that (in
+the called function) are seen as registers \f(CW$0\fR and up, as opposed to
+the \s-1GNU\s0 \s-1ABI\s0 which uses global registers \f(CW$231\fR and up.
+.IP "\fB\-mzero\-extend\fR" 4
+.IX Item "-mzero-extend"
+.PD 0
+.IP "\fB\-mno\-zero\-extend\fR" 4
+.IX Item "-mno-zero-extend"
+.PD
+When reading data from memory in sizes shorter than 64 bits, use (do not
+use) zero-extending load instructions by default, rather than
+sign-extending ones.
+.IP "\fB\-mknuthdiv\fR" 4
+.IX Item "-mknuthdiv"
+.PD 0
+.IP "\fB\-mno\-knuthdiv\fR" 4
+.IX Item "-mno-knuthdiv"
+.PD
+Make the result of a division yielding a remainder have the same sign as
+the divisor.  With the default, \fB\-mno\-knuthdiv\fR, the sign of the
+remainder follows the sign of the dividend.  Both methods are
+arithmetically valid, the latter being almost exclusively used.
+.IP "\fB\-mtoplevel\-symbols\fR" 4
+.IX Item "-mtoplevel-symbols"
+.PD 0
+.IP "\fB\-mno\-toplevel\-symbols\fR" 4
+.IX Item "-mno-toplevel-symbols"
+.PD
+Prepend (do not prepend) a \fB:\fR to all global symbols, so the assembly
+code can be used with the \f(CW\*(C`PREFIX\*(C'\fR assembly directive.
+.IP "\fB\-melf\fR" 4
+.IX Item "-melf"
+Generate an executable in the \s-1ELF\s0 format, rather than the default
+\&\fBmmo\fR format used by the \fBmmix\fR simulator.
+.IP "\fB\-mbranch\-predict\fR" 4
+.IX Item "-mbranch-predict"
+.PD 0
+.IP "\fB\-mno\-branch\-predict\fR" 4
+.IX Item "-mno-branch-predict"
+.PD
+Use (do not use) the probable-branch instructions, when static branch
+prediction indicates a probable branch.
+.IP "\fB\-mbase\-addresses\fR" 4
+.IX Item "-mbase-addresses"
+.PD 0
+.IP "\fB\-mno\-base\-addresses\fR" 4
+.IX Item "-mno-base-addresses"
+.PD
+Generate (do not generate) code that uses \fIbase addresses\fR.  Using a
+base address automatically generates a request (handled by the assembler
+and the linker) for a constant to be set up in a global register.  The
+register is used for one or more base address requests within the range 0
+to 255 from the value held in the register.  The generally leads to short
+and fast code, but the number of different data items that can be
+addressed is limited.  This means that a program that uses lots of static
+data may require \fB\-mno\-base\-addresses\fR.
+.IP "\fB\-msingle\-exit\fR" 4
+.IX Item "-msingle-exit"
+.PD 0
+.IP "\fB\-mno\-single\-exit\fR" 4
+.IX Item "-mno-single-exit"
+.PD
+Force (do not force) generated code to have a single exit point in each
+function.
+.PP
+\fI\s-1MN10300\s0 Options\fR
+.IX Subsection "MN10300 Options"
+.PP
+These \fB\-m\fR options are defined for Matsushita \s-1MN10300\s0 architectures:
+.IP "\fB\-mmult\-bug\fR" 4
+.IX Item "-mmult-bug"
+Generate code to avoid bugs in the multiply instructions for the \s-1MN10300\s0
+processors.  This is the default.
+.IP "\fB\-mno\-mult\-bug\fR" 4
+.IX Item "-mno-mult-bug"
+Do not generate code to avoid bugs in the multiply instructions for the
+\&\s-1MN10300\s0 processors.
+.IP "\fB\-mam33\fR" 4
+.IX Item "-mam33"
+Generate code which uses features specific to the \s-1AM33\s0 processor.
+.IP "\fB\-mno\-am33\fR" 4
+.IX Item "-mno-am33"
+Do not generate code which uses features specific to the \s-1AM33\s0 processor.  This
+is the default.
+.IP "\fB\-mam33\-2\fR" 4
+.IX Item "-mam33-2"
+Generate code which uses features specific to the \s-1AM33/2\s0.0 processor.
+.IP "\fB\-mam34\fR" 4
+.IX Item "-mam34"
+Generate code which uses features specific to the \s-1AM34\s0 processor.
+.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
+.IX Item "-mtune=cpu-type"
+Use the timing characteristics of the indicated \s-1CPU\s0 type when
+scheduling instructions.  This does not change the targeted processor
+type.  The \s-1CPU\s0 type must be one of \fBmn10300\fR, \fBam33\fR,
+\&\fBam33\-2\fR or \fBam34\fR.
+.IP "\fB\-mreturn\-pointer\-on\-d0\fR" 4
+.IX Item "-mreturn-pointer-on-d0"
+When generating a function which returns a pointer, return the pointer
+in both \f(CW\*(C`a0\*(C'\fR and \f(CW\*(C`d0\*(C'\fR.  Otherwise, the pointer is returned
+only in a0, and attempts to call such functions without a prototype
+would result in errors.  Note that this option is on by default; use
+\&\fB\-mno\-return\-pointer\-on\-d0\fR to disable it.
+.IP "\fB\-mno\-crt0\fR" 4
+.IX Item "-mno-crt0"
+Do not link in the C run-time initialization object file.
+.IP "\fB\-mrelax\fR" 4
+.IX Item "-mrelax"
+Indicate to the linker that it should perform a relaxation optimization pass
+to shorten branches, calls and absolute memory addresses.  This option only
+has an effect when used on the command line for the final link step.
+.Sp
+This option makes symbolic debugging impossible.
+.IP "\fB\-mliw\fR" 4
+.IX Item "-mliw"
+Allow the compiler to generate \fILong Instruction Word\fR
+instructions if the target is the \fB\s-1AM33\s0\fR or later.  This is the
+default.  This option defines the preprocessor macro \fB_\|_LIW_\|_\fR.
+.IP "\fB\-mnoliw\fR" 4
+.IX Item "-mnoliw"
+Do not allow the compiler to generate \fILong Instruction Word\fR
+instructions.  This option defines the preprocessor macro
+\&\fB_\|_NO_LIW_\|_\fR.
+.PP
+\fI\s-1PDP\-11\s0 Options\fR
+.IX Subsection "PDP-11 Options"
+.PP
+These options are defined for the \s-1PDP\-11:\s0
+.IP "\fB\-mfpu\fR" 4
+.IX Item "-mfpu"
+Use hardware \s-1FPP\s0 floating point.  This is the default.  (\s-1FIS\s0 floating
+point on the \s-1PDP\-11/40\s0 is not supported.)
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Do not use hardware floating point.
+.IP "\fB\-mac0\fR" 4
+.IX Item "-mac0"
+Return floating-point results in ac0 (fr0 in Unix assembler syntax).
+.IP "\fB\-mno\-ac0\fR" 4
+.IX Item "-mno-ac0"
+Return floating-point results in memory.  This is the default.
+.IP "\fB\-m40\fR" 4
+.IX Item "-m40"
+Generate code for a \s-1PDP\-11/40\s0.
+.IP "\fB\-m45\fR" 4
+.IX Item "-m45"
+Generate code for a \s-1PDP\-11/45\s0.  This is the default.
+.IP "\fB\-m10\fR" 4
+.IX Item "-m10"
+Generate code for a \s-1PDP\-11/10\s0.
+.IP "\fB\-mbcopy\-builtin\fR" 4
+.IX Item "-mbcopy-builtin"
+Use inline \f(CW\*(C`movmemhi\*(C'\fR patterns for copying memory.  This is the
+default.
+.IP "\fB\-mbcopy\fR" 4
+.IX Item "-mbcopy"
+Do not use inline \f(CW\*(C`movmemhi\*(C'\fR patterns for copying memory.
+.IP "\fB\-mint16\fR" 4
+.IX Item "-mint16"
+.PD 0
+.IP "\fB\-mno\-int32\fR" 4
+.IX Item "-mno-int32"
+.PD
+Use 16\-bit \f(CW\*(C`int\*(C'\fR.  This is the default.
+.IP "\fB\-mint32\fR" 4
+.IX Item "-mint32"
+.PD 0
+.IP "\fB\-mno\-int16\fR" 4
+.IX Item "-mno-int16"
+.PD
+Use 32\-bit \f(CW\*(C`int\*(C'\fR.
+.IP "\fB\-mfloat64\fR" 4
+.IX Item "-mfloat64"
+.PD 0
+.IP "\fB\-mno\-float32\fR" 4
+.IX Item "-mno-float32"
+.PD
+Use 64\-bit \f(CW\*(C`float\*(C'\fR.  This is the default.
+.IP "\fB\-mfloat32\fR" 4
+.IX Item "-mfloat32"
+.PD 0
+.IP "\fB\-mno\-float64\fR" 4
+.IX Item "-mno-float64"
+.PD
+Use 32\-bit \f(CW\*(C`float\*(C'\fR.
+.IP "\fB\-mabshi\fR" 4
+.IX Item "-mabshi"
+Use \f(CW\*(C`abshi2\*(C'\fR pattern.  This is the default.
+.IP "\fB\-mno\-abshi\fR" 4
+.IX Item "-mno-abshi"
+Do not use \f(CW\*(C`abshi2\*(C'\fR pattern.
+.IP "\fB\-mbranch\-expensive\fR" 4
+.IX Item "-mbranch-expensive"
+Pretend that branches are expensive.  This is for experimenting with
+code generation only.
+.IP "\fB\-mbranch\-cheap\fR" 4
+.IX Item "-mbranch-cheap"
+Do not pretend that branches are expensive.  This is the default.
+.IP "\fB\-munix\-asm\fR" 4
+.IX Item "-munix-asm"
+Use Unix assembler syntax.  This is the default when configured for
+\&\fBpdp11\-*\-bsd\fR.
+.IP "\fB\-mdec\-asm\fR" 4
+.IX Item "-mdec-asm"
+Use \s-1DEC\s0 assembler syntax.  This is the default when configured for any
+\&\s-1PDP\-11\s0 target other than \fBpdp11\-*\-bsd\fR.
+.PP
+\fIpicoChip Options\fR
+.IX Subsection "picoChip Options"
+.PP
+These \fB\-m\fR options are defined for picoChip implementations:
+.IP "\fB\-mae=\fR\fIae_type\fR" 4
+.IX Item "-mae=ae_type"
+Set the instruction set, register set, and instruction scheduling
+parameters for array element type \fIae_type\fR.  Supported values
+for \fIae_type\fR are \fB\s-1ANY\s0\fR, \fB\s-1MUL\s0\fR, and \fB\s-1MAC\s0\fR.
+.Sp
+\&\fB\-mae=ANY\fR selects a completely generic \s-1AE\s0 type.  Code
+generated with this option will run on any of the other \s-1AE\s0 types.  The
+code will not be as efficient as it would be if compiled for a specific
+\&\s-1AE\s0 type, and some types of operation (e.g., multiplication) will not
+work properly on all types of \s-1AE\s0.
+.Sp
+\&\fB\-mae=MUL\fR selects a \s-1MUL\s0 \s-1AE\s0 type.  This is the most useful \s-1AE\s0 type
+for compiled code, and is the default.
+.Sp
+\&\fB\-mae=MAC\fR selects a DSP-style \s-1MAC\s0 \s-1AE\s0.  Code compiled with this
+option may suffer from poor performance of byte (char) manipulation,
+since the \s-1DSP\s0 \s-1AE\s0 does not provide hardware support for byte load/stores.
+.IP "\fB\-msymbol\-as\-address\fR" 4
+.IX Item "-msymbol-as-address"
+Enable the compiler to directly use a symbol name as an address in a
+load/store instruction, without first loading it into a
+register.  Typically, the use of this option will generate larger
+programs, which run faster than when the option isn't used.  However, the
+results vary from program to program, so it is left as a user option,
+rather than being permanently enabled.
+.IP "\fB\-mno\-inefficient\-warnings\fR" 4
+.IX Item "-mno-inefficient-warnings"
+Disables warnings about the generation of inefficient code.  These
+warnings can be generated, for example, when compiling code which
+performs byte-level memory operations on the \s-1MAC\s0 \s-1AE\s0 type.  The \s-1MAC\s0 \s-1AE\s0 has
+no hardware support for byte-level memory operations, so all byte
+load/stores must be synthesized from word load/store operations.  This is
+inefficient and a warning will be generated indicating to the programmer
+that they should rewrite the code to avoid byte operations, or to target
+an \s-1AE\s0 type which has the necessary hardware support.  This option enables
+the warning to be turned off.
+.PP
+\fIPowerPC Options\fR
+.IX Subsection "PowerPC Options"
+.PP
+These are listed under
+.PP
+\fI\s-1IBM\s0 \s-1RS/6000\s0 and PowerPC Options\fR
+.IX Subsection "IBM RS/6000 and PowerPC Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1IBM\s0 \s-1RS/6000\s0 and PowerPC:
+.IP "\fB\-mpower\fR" 4
+.IX Item "-mpower"
+.PD 0
+.IP "\fB\-mno\-power\fR" 4
+.IX Item "-mno-power"
+.IP "\fB\-mpower2\fR" 4
+.IX Item "-mpower2"
+.IP "\fB\-mno\-power2\fR" 4
+.IX Item "-mno-power2"
+.IP "\fB\-mpowerpc\fR" 4
+.IX Item "-mpowerpc"
+.IP "\fB\-mno\-powerpc\fR" 4
+.IX Item "-mno-powerpc"
+.IP "\fB\-mpowerpc\-gpopt\fR" 4
+.IX Item "-mpowerpc-gpopt"
+.IP "\fB\-mno\-powerpc\-gpopt\fR" 4
+.IX Item "-mno-powerpc-gpopt"
+.IP "\fB\-mpowerpc\-gfxopt\fR" 4
+.IX Item "-mpowerpc-gfxopt"
+.IP "\fB\-mno\-powerpc\-gfxopt\fR" 4
+.IX Item "-mno-powerpc-gfxopt"
+.IP "\fB\-mpowerpc64\fR" 4
+.IX Item "-mpowerpc64"
+.IP "\fB\-mno\-powerpc64\fR" 4
+.IX Item "-mno-powerpc64"
+.IP "\fB\-mmfcrf\fR" 4
+.IX Item "-mmfcrf"
+.IP "\fB\-mno\-mfcrf\fR" 4
+.IX Item "-mno-mfcrf"
+.IP "\fB\-mpopcntb\fR" 4
+.IX Item "-mpopcntb"
+.IP "\fB\-mno\-popcntb\fR" 4
+.IX Item "-mno-popcntb"
+.IP "\fB\-mpopcntd\fR" 4
+.IX Item "-mpopcntd"
+.IP "\fB\-mno\-popcntd\fR" 4
+.IX Item "-mno-popcntd"
+.IP "\fB\-mfprnd\fR" 4
+.IX Item "-mfprnd"
+.IP "\fB\-mno\-fprnd\fR" 4
+.IX Item "-mno-fprnd"
+.IP "\fB\-mcmpb\fR" 4
+.IX Item "-mcmpb"
+.IP "\fB\-mno\-cmpb\fR" 4
+.IX Item "-mno-cmpb"
+.IP "\fB\-mmfpgpr\fR" 4
+.IX Item "-mmfpgpr"
+.IP "\fB\-mno\-mfpgpr\fR" 4
+.IX Item "-mno-mfpgpr"
+.IP "\fB\-mhard\-dfp\fR" 4
+.IX Item "-mhard-dfp"
+.IP "\fB\-mno\-hard\-dfp\fR" 4
+.IX Item "-mno-hard-dfp"
+.PD
+\&\s-1GCC\s0 supports two related instruction set architectures for the
+\&\s-1RS/6000\s0 and PowerPC.  The \fI\s-1POWER\s0\fR instruction set are those
+instructions supported by the \fBrios\fR chip set used in the original
+\&\s-1RS/6000\s0 systems and the \fIPowerPC\fR instruction set is the
+architecture of the Freescale MPC5xx, MPC6xx, MPC8xx microprocessors, and
+the \s-1IBM\s0 4xx, 6xx, and follow-on microprocessors.
+.Sp
+Neither architecture is a subset of the other.  However there is a
+large common subset of instructions supported by both.  An \s-1MQ\s0
+register is included in processors supporting the \s-1POWER\s0 architecture.
+.Sp
+You use these options to specify which instructions are available on the
+processor you are using.  The default value of these options is
+determined when configuring \s-1GCC\s0.  Specifying the
+\&\fB\-mcpu=\fR\fIcpu_type\fR overrides the specification of these
+options.  We recommend you use the \fB\-mcpu=\fR\fIcpu_type\fR option
+rather than the options listed above.
+.Sp
+The \fB\-mpower\fR option allows \s-1GCC\s0 to generate instructions that
+are found only in the \s-1POWER\s0 architecture and to use the \s-1MQ\s0 register.
+Specifying \fB\-mpower2\fR implies \fB\-power\fR and also allows \s-1GCC\s0
+to generate instructions that are present in the \s-1POWER2\s0 architecture but
+not the original \s-1POWER\s0 architecture.
+.Sp
+The \fB\-mpowerpc\fR option allows \s-1GCC\s0 to generate instructions that
+are found only in the 32\-bit subset of the PowerPC architecture.
+Specifying \fB\-mpowerpc\-gpopt\fR implies \fB\-mpowerpc\fR and also allows
+\&\s-1GCC\s0 to use the optional PowerPC architecture instructions in the
+General Purpose group, including floating-point square root.  Specifying
+\&\fB\-mpowerpc\-gfxopt\fR implies \fB\-mpowerpc\fR and also allows \s-1GCC\s0 to
+use the optional PowerPC architecture instructions in the Graphics
+group, including floating-point select.
+.Sp
+The \fB\-mmfcrf\fR option allows \s-1GCC\s0 to generate the move from
+condition register field instruction implemented on the \s-1POWER4\s0
+processor and other processors that support the PowerPC V2.01
+architecture.
+The \fB\-mpopcntb\fR option allows \s-1GCC\s0 to generate the popcount and
+double precision \s-1FP\s0 reciprocal estimate instruction implemented on the
+\&\s-1POWER5\s0 processor and other processors that support the PowerPC V2.02
+architecture.
+The \fB\-mpopcntd\fR option allows \s-1GCC\s0 to generate the popcount
+instruction implemented on the \s-1POWER7\s0 processor and other processors
+that support the PowerPC V2.06 architecture.
+The \fB\-mfprnd\fR option allows \s-1GCC\s0 to generate the \s-1FP\s0 round to
+integer instructions implemented on the \s-1POWER5+\s0 processor and other
+processors that support the PowerPC V2.03 architecture.
+The \fB\-mcmpb\fR option allows \s-1GCC\s0 to generate the compare bytes
+instruction implemented on the \s-1POWER6\s0 processor and other processors
+that support the PowerPC V2.05 architecture.
+The \fB\-mmfpgpr\fR option allows \s-1GCC\s0 to generate the \s-1FP\s0 move to/from
+general purpose register instructions implemented on the \s-1POWER6X\s0
+processor and other processors that support the extended PowerPC V2.05
+architecture.
+The \fB\-mhard\-dfp\fR option allows \s-1GCC\s0 to generate the decimal floating
+point instructions implemented on some \s-1POWER\s0 processors.
+.Sp
+The \fB\-mpowerpc64\fR option allows \s-1GCC\s0 to generate the additional
+64\-bit instructions that are found in the full PowerPC64 architecture
+and to treat GPRs as 64\-bit, doubleword quantities.  \s-1GCC\s0 defaults to
+\&\fB\-mno\-powerpc64\fR.
+.Sp
+If you specify both \fB\-mno\-power\fR and \fB\-mno\-powerpc\fR, \s-1GCC\s0
+will use only the instructions in the common subset of both
+architectures plus some special \s-1AIX\s0 common-mode calls, and will not use
+the \s-1MQ\s0 register.  Specifying both \fB\-mpower\fR and \fB\-mpowerpc\fR
+permits \s-1GCC\s0 to use any instruction from either architecture and to
+allow use of the \s-1MQ\s0 register; specify this for the Motorola \s-1MPC601\s0.
+.IP "\fB\-mnew\-mnemonics\fR" 4
+.IX Item "-mnew-mnemonics"
+.PD 0
+.IP "\fB\-mold\-mnemonics\fR" 4
+.IX Item "-mold-mnemonics"
+.PD
+Select which mnemonics to use in the generated assembler code.  With
+\&\fB\-mnew\-mnemonics\fR, \s-1GCC\s0 uses the assembler mnemonics defined for
+the PowerPC architecture.  With \fB\-mold\-mnemonics\fR it uses the
+assembler mnemonics defined for the \s-1POWER\s0 architecture.  Instructions
+defined in only one architecture have only one mnemonic; \s-1GCC\s0 uses that
+mnemonic irrespective of which of these options is specified.
+.Sp
+\&\s-1GCC\s0 defaults to the mnemonics appropriate for the architecture in
+use.  Specifying \fB\-mcpu=\fR\fIcpu_type\fR sometimes overrides the
+value of these option.  Unless you are building a cross-compiler, you
+should normally not specify either \fB\-mnew\-mnemonics\fR or
+\&\fB\-mold\-mnemonics\fR, but should instead accept the default.
+.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
+.IX Item "-mcpu=cpu_type"
+Set architecture type, register usage, choice of mnemonics, and
+instruction scheduling parameters for machine type \fIcpu_type\fR.
+Supported values for \fIcpu_type\fR are \fB401\fR, \fB403\fR,
+\&\fB405\fR, \fB405fp\fR, \fB440\fR, \fB440fp\fR, \fB464\fR, \fB464fp\fR,
+\&\fB476\fR, \fB476fp\fR, \fB505\fR, \fB601\fR, \fB602\fR, \fB603\fR,
+\&\fB603e\fR, \fB604\fR, \fB604e\fR, \fB620\fR, \fB630\fR, \fB740\fR,
+\&\fB7400\fR, \fB7450\fR, \fB750\fR, \fB801\fR, \fB821\fR, \fB823\fR,
+\&\fB860\fR, \fB970\fR, \fB8540\fR, \fBa2\fR, \fBe300c2\fR,
+\&\fBe300c3\fR, \fBe500mc\fR, \fBe500mc64\fR, \fBec603e\fR, \fBG3\fR,
+\&\fBG4\fR, \fBG5\fR, \fBtitan\fR, \fBpower\fR, \fBpower2\fR, \fBpower3\fR,
+\&\fBpower4\fR, \fBpower5\fR, \fBpower5+\fR, \fBpower6\fR, \fBpower6x\fR,
+\&\fBpower7\fR, \fBcommon\fR, \fBpowerpc\fR, \fBpowerpc64\fR, \fBrios\fR,
+\&\fBrios1\fR, \fBrios2\fR, \fBrsc\fR, and \fBrs64\fR.
+.Sp
+\&\fB\-mcpu=common\fR selects a completely generic processor.  Code
+generated under this option will run on any \s-1POWER\s0 or PowerPC processor.
+\&\s-1GCC\s0 will use only the instructions in the common subset of both
+architectures, and will not use the \s-1MQ\s0 register.  \s-1GCC\s0 assumes a generic
+processor model for scheduling purposes.
+.Sp
+\&\fB\-mcpu=power\fR, \fB\-mcpu=power2\fR, \fB\-mcpu=powerpc\fR, and
+\&\fB\-mcpu=powerpc64\fR specify generic \s-1POWER\s0, \s-1POWER2\s0, pure 32\-bit
+PowerPC (i.e., not \s-1MPC601\s0), and 64\-bit PowerPC architecture machine
+types, with an appropriate, generic processor model assumed for
+scheduling purposes.
+.Sp
+The other options specify a specific processor.  Code generated under
+those options will run best on that processor, and may not run at all on
+others.
+.Sp
+The \fB\-mcpu\fR options automatically enable or disable the
+following options:
+.Sp
+\&\fB\-maltivec  \-mfprnd  \-mhard\-float  \-mmfcrf  \-mmultiple 
+\&\-mnew\-mnemonics  \-mpopcntb \-mpopcntd  \-mpower  \-mpower2  \-mpowerpc64 
+\&\-mpowerpc\-gpopt  \-mpowerpc\-gfxopt  \-msingle\-float \-mdouble\-float 
+\&\-msimple\-fpu \-mstring  \-mmulhw  \-mdlmzb  \-mmfpgpr \-mvsx\fR
+.Sp
+The particular options set for any particular \s-1CPU\s0 will vary between
+compiler versions, depending on what setting seems to produce optimal
+code for that \s-1CPU\s0; it doesn't necessarily reflect the actual hardware's
+capabilities.  If you wish to set an individual option to a particular
+value, you may specify it after the \fB\-mcpu\fR option, like
+\&\fB\-mcpu=970 \-mno\-altivec\fR.
+.Sp
+On \s-1AIX\s0, the \fB\-maltivec\fR and \fB\-mpowerpc64\fR options are
+not enabled or disabled by the \fB\-mcpu\fR option at present because
+\&\s-1AIX\s0 does not have full support for these options.  You may still
+enable or disable them individually if you're sure it'll work in your
+environment.
+.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
+.IX Item "-mtune=cpu_type"
+Set the instruction scheduling parameters for machine type
+\&\fIcpu_type\fR, but do not set the architecture type, register usage, or
+choice of mnemonics, as \fB\-mcpu=\fR\fIcpu_type\fR would.  The same
+values for \fIcpu_type\fR are used for \fB\-mtune\fR as for
+\&\fB\-mcpu\fR.  If both are specified, the code generated will use the
+architecture, registers, and mnemonics set by \fB\-mcpu\fR, but the
+scheduling parameters set by \fB\-mtune\fR.
+.IP "\fB\-mcmodel=small\fR" 4
+.IX Item "-mcmodel=small"
+Generate PowerPC64 code for the small model: The \s-1TOC\s0 is limited to
+64k.
+.IP "\fB\-mcmodel=medium\fR" 4
+.IX Item "-mcmodel=medium"
+Generate PowerPC64 code for the medium model: The \s-1TOC\s0 and other static
+data may be up to a total of 4G in size.
+.IP "\fB\-mcmodel=large\fR" 4
+.IX Item "-mcmodel=large"
+Generate PowerPC64 code for the large model: The \s-1TOC\s0 may be up to 4G
+in size.  Other data and code is only limited by the 64\-bit address
+space.
+.IP "\fB\-maltivec\fR" 4
+.IX Item "-maltivec"
+.PD 0
+.IP "\fB\-mno\-altivec\fR" 4
+.IX Item "-mno-altivec"
+.PD
+Generate code that uses (does not use) AltiVec instructions, and also
+enable the use of built-in functions that allow more direct access to
+the AltiVec instruction set.  You may also need to set
+\&\fB\-mabi=altivec\fR to adjust the current \s-1ABI\s0 with AltiVec \s-1ABI\s0
+enhancements.
+.IP "\fB\-mvrsave\fR" 4
+.IX Item "-mvrsave"
+.PD 0
+.IP "\fB\-mno\-vrsave\fR" 4
+.IX Item "-mno-vrsave"
+.PD
+Generate \s-1VRSAVE\s0 instructions when generating AltiVec code.
+.IP "\fB\-mgen\-cell\-microcode\fR" 4
+.IX Item "-mgen-cell-microcode"
+Generate Cell microcode instructions
+.IP "\fB\-mwarn\-cell\-microcode\fR" 4
+.IX Item "-mwarn-cell-microcode"
+Warning when a Cell microcode instruction is going to emitted.  An example
+of a Cell microcode instruction is a variable shift.
+.IP "\fB\-msecure\-plt\fR" 4
+.IX Item "-msecure-plt"
+Generate code that allows ld and ld.so to build executables and shared
+libraries with non-exec .plt and .got sections.  This is a PowerPC
+32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
+.IP "\fB\-mbss\-plt\fR" 4
+.IX Item "-mbss-plt"
+Generate code that uses a \s-1BSS\s0 .plt section that ld.so fills in, and
+requires .plt and .got sections that are both writable and executable.
+This is a PowerPC 32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
+.IP "\fB\-misel\fR" 4
+.IX Item "-misel"
+.PD 0
+.IP "\fB\-mno\-isel\fR" 4
+.IX Item "-mno-isel"
+.PD
+This switch enables or disables the generation of \s-1ISEL\s0 instructions.
+.IP "\fB\-misel=\fR\fIyes/no\fR" 4
+.IX Item "-misel=yes/no"
+This switch has been deprecated.  Use \fB\-misel\fR and
+\&\fB\-mno\-isel\fR instead.
+.IP "\fB\-mspe\fR" 4
+.IX Item "-mspe"
+.PD 0
+.IP "\fB\-mno\-spe\fR" 4
+.IX Item "-mno-spe"
+.PD
+This switch enables or disables the generation of \s-1SPE\s0 simd
+instructions.
+.IP "\fB\-mpaired\fR" 4
+.IX Item "-mpaired"
+.PD 0
+.IP "\fB\-mno\-paired\fR" 4
+.IX Item "-mno-paired"
+.PD
+This switch enables or disables the generation of \s-1PAIRED\s0 simd
+instructions.
+.IP "\fB\-mspe=\fR\fIyes/no\fR" 4
+.IX Item "-mspe=yes/no"
+This option has been deprecated.  Use \fB\-mspe\fR and
+\&\fB\-mno\-spe\fR instead.
+.IP "\fB\-mvsx\fR" 4
+.IX Item "-mvsx"
+.PD 0
+.IP "\fB\-mno\-vsx\fR" 4
+.IX Item "-mno-vsx"
+.PD
+Generate code that uses (does not use) vector/scalar (\s-1VSX\s0)
+instructions, and also enable the use of built-in functions that allow
+more direct access to the \s-1VSX\s0 instruction set.
+.IP "\fB\-mfloat\-gprs=\fR\fIyes/single/double/no\fR" 4
+.IX Item "-mfloat-gprs=yes/single/double/no"
+.PD 0
+.IP "\fB\-mfloat\-gprs\fR" 4
+.IX Item "-mfloat-gprs"
+.PD
+This switch enables or disables the generation of floating point
+operations on the general purpose registers for architectures that
+support it.
+.Sp
+The argument \fIyes\fR or \fIsingle\fR enables the use of
+single-precision floating point operations.
+.Sp
+The argument \fIdouble\fR enables the use of single and
+double-precision floating point operations.
+.Sp
+The argument \fIno\fR disables floating point operations on the
+general purpose registers.
+.Sp
+This option is currently only available on the MPC854x.
+.IP "\fB\-m32\fR" 4
+.IX Item "-m32"
+.PD 0
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD
+Generate code for 32\-bit or 64\-bit environments of Darwin and \s-1SVR4\s0
+targets (including GNU/Linux).  The 32\-bit environment sets int, long
+and pointer to 32 bits and generates code that runs on any PowerPC
+variant.  The 64\-bit environment sets int to 32 bits and long and
+pointer to 64 bits, and generates code for PowerPC64, as for
+\&\fB\-mpowerpc64\fR.
+.IP "\fB\-mfull\-toc\fR" 4
+.IX Item "-mfull-toc"
+.PD 0
+.IP "\fB\-mno\-fp\-in\-toc\fR" 4
+.IX Item "-mno-fp-in-toc"
+.IP "\fB\-mno\-sum\-in\-toc\fR" 4
+.IX Item "-mno-sum-in-toc"
+.IP "\fB\-mminimal\-toc\fR" 4
+.IX Item "-mminimal-toc"
+.PD
+Modify generation of the \s-1TOC\s0 (Table Of Contents), which is created for
+every executable file.  The \fB\-mfull\-toc\fR option is selected by
+default.  In that case, \s-1GCC\s0 will allocate at least one \s-1TOC\s0 entry for
+each unique non-automatic variable reference in your program.  \s-1GCC\s0
+will also place floating-point constants in the \s-1TOC\s0.  However, only
+16,384 entries are available in the \s-1TOC\s0.
+.Sp
+If you receive a linker error message that saying you have overflowed
+the available \s-1TOC\s0 space, you can reduce the amount of \s-1TOC\s0 space used
+with the \fB\-mno\-fp\-in\-toc\fR and \fB\-mno\-sum\-in\-toc\fR options.
+\&\fB\-mno\-fp\-in\-toc\fR prevents \s-1GCC\s0 from putting floating-point
+constants in the \s-1TOC\s0 and \fB\-mno\-sum\-in\-toc\fR forces \s-1GCC\s0 to
+generate code to calculate the sum of an address and a constant at
+run-time instead of putting that sum into the \s-1TOC\s0.  You may specify one
+or both of these options.  Each causes \s-1GCC\s0 to produce very slightly
+slower and larger code at the expense of conserving \s-1TOC\s0 space.
+.Sp
+If you still run out of space in the \s-1TOC\s0 even when you specify both of
+these options, specify \fB\-mminimal\-toc\fR instead.  This option causes
+\&\s-1GCC\s0 to make only one \s-1TOC\s0 entry for every file.  When you specify this
+option, \s-1GCC\s0 will produce code that is slower and larger but which
+uses extremely little \s-1TOC\s0 space.  You may wish to use this option
+only on files that contain less frequently executed code.
+.IP "\fB\-maix64\fR" 4
+.IX Item "-maix64"
+.PD 0
+.IP "\fB\-maix32\fR" 4
+.IX Item "-maix32"
+.PD
+Enable 64\-bit \s-1AIX\s0 \s-1ABI\s0 and calling convention: 64\-bit pointers, 64\-bit
+\&\f(CW\*(C`long\*(C'\fR type, and the infrastructure needed to support them.
+Specifying \fB\-maix64\fR implies \fB\-mpowerpc64\fR and
+\&\fB\-mpowerpc\fR, while \fB\-maix32\fR disables the 64\-bit \s-1ABI\s0 and
+implies \fB\-mno\-powerpc64\fR.  \s-1GCC\s0 defaults to \fB\-maix32\fR.
+.IP "\fB\-mxl\-compat\fR" 4
+.IX Item "-mxl-compat"
+.PD 0
+.IP "\fB\-mno\-xl\-compat\fR" 4
+.IX Item "-mno-xl-compat"
+.PD
+Produce code that conforms more closely to \s-1IBM\s0 \s-1XL\s0 compiler semantics
+when using AIX-compatible \s-1ABI\s0.  Pass floating-point arguments to
+prototyped functions beyond the register save area (\s-1RSA\s0) on the stack
+in addition to argument FPRs.  Do not assume that most significant
+double in 128\-bit long double value is properly rounded when comparing
+values and converting to double.  Use \s-1XL\s0 symbol names for long double
+support routines.
+.Sp
+The \s-1AIX\s0 calling convention was extended but not initially documented to
+handle an obscure K&R C case of calling a function that takes the
+address of its arguments with fewer arguments than declared.  \s-1IBM\s0 \s-1XL\s0
+compilers access floating point arguments which do not fit in the
+\&\s-1RSA\s0 from the stack when a subroutine is compiled without
+optimization.  Because always storing floating-point arguments on the
+stack is inefficient and rarely needed, this option is not enabled by
+default and only is necessary when calling subroutines compiled by \s-1IBM\s0
+\&\s-1XL\s0 compilers without optimization.
+.IP "\fB\-mpe\fR" 4
+.IX Item "-mpe"
+Support \fI\s-1IBM\s0 \s-1RS/6000\s0 \s-1SP\s0\fR \fIParallel Environment\fR (\s-1PE\s0).  Link an
+application written to use message passing with special startup code to
+enable the application to run.  The system must have \s-1PE\s0 installed in the
+standard location (\fI/usr/lpp/ppe.poe/\fR), or the \fIspecs\fR file
+must be overridden with the \fB\-specs=\fR option to specify the
+appropriate directory location.  The Parallel Environment does not
+support threads, so the \fB\-mpe\fR option and the \fB\-pthread\fR
+option are incompatible.
+.IP "\fB\-malign\-natural\fR" 4
+.IX Item "-malign-natural"
+.PD 0
+.IP "\fB\-malign\-power\fR" 4
+.IX Item "-malign-power"
+.PD
+On \s-1AIX\s0, 32\-bit Darwin, and 64\-bit PowerPC GNU/Linux, the option
+\&\fB\-malign\-natural\fR overrides the ABI-defined alignment of larger
+types, such as floating-point doubles, on their natural size-based boundary.
+The option \fB\-malign\-power\fR instructs \s-1GCC\s0 to follow the ABI-specified
+alignment rules.  \s-1GCC\s0 defaults to the standard alignment defined in the \s-1ABI\s0.
+.Sp
+On 64\-bit Darwin, natural alignment is the default, and \fB\-malign\-power\fR
+is not supported.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD 0
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD
+Generate code that does not use (uses) the floating-point register set.
+Software floating point emulation is provided if you use the
+\&\fB\-msoft\-float\fR option, and pass the option to \s-1GCC\s0 when linking.
+.IP "\fB\-msingle\-float\fR" 4
+.IX Item "-msingle-float"
+.PD 0
+.IP "\fB\-mdouble\-float\fR" 4
+.IX Item "-mdouble-float"
+.PD
+Generate code for single or double-precision floating point operations.
+\&\fB\-mdouble\-float\fR implies \fB\-msingle\-float\fR.
+.IP "\fB\-msimple\-fpu\fR" 4
+.IX Item "-msimple-fpu"
+Do not generate sqrt and div instructions for hardware floating point unit.
+.IP "\fB\-mfpu\fR" 4
+.IX Item "-mfpu"
+Specify type of floating point unit.  Valid values are \fIsp_lite\fR
+(equivalent to \-msingle\-float \-msimple\-fpu), \fIdp_lite\fR (equivalent
+to \-mdouble\-float \-msimple\-fpu), \fIsp_full\fR (equivalent to \-msingle\-float),
+and \fIdp_full\fR (equivalent to \-mdouble\-float).
+.IP "\fB\-mxilinx\-fpu\fR" 4
+.IX Item "-mxilinx-fpu"
+Perform optimizations for floating point unit on Xilinx \s-1PPC\s0 405/440.
+.IP "\fB\-mmultiple\fR" 4
+.IX Item "-mmultiple"
+.PD 0
+.IP "\fB\-mno\-multiple\fR" 4
+.IX Item "-mno-multiple"
+.PD
+Generate code that uses (does not use) the load multiple word
+instructions and the store multiple word instructions.  These
+instructions are generated by default on \s-1POWER\s0 systems, and not
+generated on PowerPC systems.  Do not use \fB\-mmultiple\fR on little
+endian PowerPC systems, since those instructions do not work when the
+processor is in little endian mode.  The exceptions are \s-1PPC740\s0 and
+\&\s-1PPC750\s0 which permit the instructions usage in little endian mode.
+.IP "\fB\-mstring\fR" 4
+.IX Item "-mstring"
+.PD 0
+.IP "\fB\-mno\-string\fR" 4
+.IX Item "-mno-string"
+.PD
+Generate code that uses (does not use) the load string instructions
+and the store string word instructions to save multiple registers and
+do small block moves.  These instructions are generated by default on
+\&\s-1POWER\s0 systems, and not generated on PowerPC systems.  Do not use
+\&\fB\-mstring\fR on little endian PowerPC systems, since those
+instructions do not work when the processor is in little endian mode.
+The exceptions are \s-1PPC740\s0 and \s-1PPC750\s0 which permit the instructions
+usage in little endian mode.
+.IP "\fB\-mupdate\fR" 4
+.IX Item "-mupdate"
+.PD 0
+.IP "\fB\-mno\-update\fR" 4
+.IX Item "-mno-update"
+.PD
+Generate code that uses (does not use) the load or store instructions
+that update the base register to the address of the calculated memory
+location.  These instructions are generated by default.  If you use
+\&\fB\-mno\-update\fR, there is a small window between the time that the
+stack pointer is updated and the address of the previous frame is
+stored, which means code that walks the stack frame across interrupts or
+signals may get corrupted data.
+.IP "\fB\-mavoid\-indexed\-addresses\fR" 4
+.IX Item "-mavoid-indexed-addresses"
+.PD 0
+.IP "\fB\-mno\-avoid\-indexed\-addresses\fR" 4
+.IX Item "-mno-avoid-indexed-addresses"
+.PD
+Generate code that tries to avoid (not avoid) the use of indexed load
+or store instructions. These instructions can incur a performance
+penalty on Power6 processors in certain situations, such as when
+stepping through large arrays that cross a 16M boundary.  This option
+is enabled by default when targetting Power6 and disabled otherwise.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Generate code that uses (does not use) the floating point multiply and
+accumulate instructions.  These instructions are generated by default
+if hardware floating point is used.  The machine dependent
+\&\fB\-mfused\-madd\fR option is now mapped to the machine independent
+\&\fB\-ffp\-contract=fast\fR option, and \fB\-mno\-fused\-madd\fR is
+mapped to \fB\-ffp\-contract=off\fR.
+.IP "\fB\-mmulhw\fR" 4
+.IX Item "-mmulhw"
+.PD 0
+.IP "\fB\-mno\-mulhw\fR" 4
+.IX Item "-mno-mulhw"
+.PD
+Generate code that uses (does not use) the half-word multiply and
+multiply-accumulate instructions on the \s-1IBM\s0 405, 440, 464 and 476 processors.
+These instructions are generated by default when targetting those
+processors.
+.IP "\fB\-mdlmzb\fR" 4
+.IX Item "-mdlmzb"
+.PD 0
+.IP "\fB\-mno\-dlmzb\fR" 4
+.IX Item "-mno-dlmzb"
+.PD
+Generate code that uses (does not use) the string-search \fBdlmzb\fR
+instruction on the \s-1IBM\s0 405, 440, 464 and 476 processors.  This instruction is
+generated by default when targetting those processors.
+.IP "\fB\-mno\-bit\-align\fR" 4
+.IX Item "-mno-bit-align"
+.PD 0
+.IP "\fB\-mbit\-align\fR" 4
+.IX Item "-mbit-align"
+.PD
+On System V.4 and embedded PowerPC systems do not (do) force structures
+and unions that contain bit-fields to be aligned to the base type of the
+bit-field.
+.Sp
+For example, by default a structure containing nothing but 8
+\&\f(CW\*(C`unsigned\*(C'\fR bit-fields of length 1 would be aligned to a 4 byte
+boundary and have a size of 4 bytes.  By using \fB\-mno\-bit\-align\fR,
+the structure would be aligned to a 1 byte boundary and be one byte in
+size.
+.IP "\fB\-mno\-strict\-align\fR" 4
+.IX Item "-mno-strict-align"
+.PD 0
+.IP "\fB\-mstrict\-align\fR" 4
+.IX Item "-mstrict-align"
+.PD
+On System V.4 and embedded PowerPC systems do not (do) assume that
+unaligned memory references will be handled by the system.
+.IP "\fB\-mrelocatable\fR" 4
+.IX Item "-mrelocatable"
+.PD 0
+.IP "\fB\-mno\-relocatable\fR" 4
+.IX Item "-mno-relocatable"
+.PD
+Generate code that allows (does not allow) a static executable to be
+relocated to a different address at runtime.  A simple embedded
+PowerPC system loader should relocate the entire contents of
+\&\f(CW\*(C`.got2\*(C'\fR and 4\-byte locations listed in the \f(CW\*(C`.fixup\*(C'\fR section,
+a table of 32\-bit addresses generated by this option.  For this to
+work, all objects linked together must be compiled with
+\&\fB\-mrelocatable\fR or \fB\-mrelocatable\-lib\fR.
+\&\fB\-mrelocatable\fR code aligns the stack to an 8 byte boundary.
+.IP "\fB\-mrelocatable\-lib\fR" 4
+.IX Item "-mrelocatable-lib"
+.PD 0
+.IP "\fB\-mno\-relocatable\-lib\fR" 4
+.IX Item "-mno-relocatable-lib"
+.PD
+Like \fB\-mrelocatable\fR, \fB\-mrelocatable\-lib\fR generates a
+\&\f(CW\*(C`.fixup\*(C'\fR section to allow static executables to be relocated at
+runtime, but \fB\-mrelocatable\-lib\fR does not use the smaller stack
+alignment of \fB\-mrelocatable\fR.  Objects compiled with
+\&\fB\-mrelocatable\-lib\fR may be linked with objects compiled with
+any combination of the \fB\-mrelocatable\fR options.
+.IP "\fB\-mno\-toc\fR" 4
+.IX Item "-mno-toc"
+.PD 0
+.IP "\fB\-mtoc\fR" 4
+.IX Item "-mtoc"
+.PD
+On System V.4 and embedded PowerPC systems do not (do) assume that
+register 2 contains a pointer to a global area pointing to the addresses
+used in the program.
+.IP "\fB\-mlittle\fR" 4
+.IX Item "-mlittle"
+.PD 0
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+.PD
+On System V.4 and embedded PowerPC systems compile code for the
+processor in little endian mode.  The \fB\-mlittle\-endian\fR option is
+the same as \fB\-mlittle\fR.
+.IP "\fB\-mbig\fR" 4
+.IX Item "-mbig"
+.PD 0
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+.PD
+On System V.4 and embedded PowerPC systems compile code for the
+processor in big endian mode.  The \fB\-mbig\-endian\fR option is
+the same as \fB\-mbig\fR.
+.IP "\fB\-mdynamic\-no\-pic\fR" 4
+.IX Item "-mdynamic-no-pic"
+On Darwin and Mac \s-1OS\s0 X systems, compile code so that it is not
+relocatable, but that its external references are relocatable.  The
+resulting code is suitable for applications, but not shared
+libraries.
+.IP "\fB\-msingle\-pic\-base\fR" 4
+.IX Item "-msingle-pic-base"
+Treat the register used for \s-1PIC\s0 addressing as read-only, rather than
+loading it in the prologue for each function.  The run-time system is
+responsible for initializing this register with an appropriate value
+before execution begins.
+.IP "\fB\-mprioritize\-restricted\-insns=\fR\fIpriority\fR" 4
+.IX Item "-mprioritize-restricted-insns=priority"
+This option controls the priority that is assigned to
+dispatch-slot restricted instructions during the second scheduling
+pass.  The argument \fIpriority\fR takes the value \fI0/1/2\fR to assign
+\&\fIno/highest/second\-highest\fR priority to dispatch slot restricted
+instructions.
+.IP "\fB\-msched\-costly\-dep=\fR\fIdependence_type\fR" 4
+.IX Item "-msched-costly-dep=dependence_type"
+This option controls which dependences are considered costly
+by the target during instruction scheduling.  The argument
+\&\fIdependence_type\fR takes one of the following values:
+\&\fIno\fR: no dependence is costly,
+\&\fIall\fR: all dependences are costly,
+\&\fItrue_store_to_load\fR: a true dependence from store to load is costly,
+\&\fIstore_to_load\fR: any dependence from store to load is costly,
+\&\fInumber\fR: any dependence which latency >= \fInumber\fR is costly.
+.IP "\fB\-minsert\-sched\-nops=\fR\fIscheme\fR" 4
+.IX Item "-minsert-sched-nops=scheme"
+This option controls which nop insertion scheme will be used during
+the second scheduling pass.  The argument \fIscheme\fR takes one of the
+following values:
+\&\fIno\fR: Don't insert nops.
+\&\fIpad\fR: Pad with nops any dispatch group which has vacant issue slots,
+according to the scheduler's grouping.
+\&\fIregroup_exact\fR: Insert nops to force costly dependent insns into
+separate groups.  Insert exactly as many nops as needed to force an insn
+to a new group, according to the estimated processor grouping.
+\&\fInumber\fR: Insert nops to force costly dependent insns into
+separate groups.  Insert \fInumber\fR nops to force an insn to a new group.
+.IP "\fB\-mcall\-sysv\fR" 4
+.IX Item "-mcall-sysv"
+On System V.4 and embedded PowerPC systems compile code using calling
+conventions that adheres to the March 1995 draft of the System V
+Application Binary Interface, PowerPC processor supplement.  This is the
+default unless you configured \s-1GCC\s0 using \fBpowerpc\-*\-eabiaix\fR.
+.IP "\fB\-mcall\-sysv\-eabi\fR" 4
+.IX Item "-mcall-sysv-eabi"
+.PD 0
+.IP "\fB\-mcall\-eabi\fR" 4
+.IX Item "-mcall-eabi"
+.PD
+Specify both \fB\-mcall\-sysv\fR and \fB\-meabi\fR options.
+.IP "\fB\-mcall\-sysv\-noeabi\fR" 4
+.IX Item "-mcall-sysv-noeabi"
+Specify both \fB\-mcall\-sysv\fR and \fB\-mno\-eabi\fR options.
+.IP "\fB\-mcall\-aixdesc\fR" 4
+.IX Item "-mcall-aixdesc"
+On System V.4 and embedded PowerPC systems compile code for the \s-1AIX\s0
+operating system.
+.IP "\fB\-mcall\-linux\fR" 4
+.IX Item "-mcall-linux"
+On System V.4 and embedded PowerPC systems compile code for the
+Linux-based \s-1GNU\s0 system.
+.IP "\fB\-mcall\-gnu\fR" 4
+.IX Item "-mcall-gnu"
+On System V.4 and embedded PowerPC systems compile code for the
+Hurd-based \s-1GNU\s0 system.
+.IP "\fB\-mcall\-freebsd\fR" 4
+.IX Item "-mcall-freebsd"
+On System V.4 and embedded PowerPC systems compile code for the
+FreeBSD operating system.
+.IP "\fB\-mcall\-netbsd\fR" 4
+.IX Item "-mcall-netbsd"
+On System V.4 and embedded PowerPC systems compile code for the
+NetBSD operating system.
+.IP "\fB\-mcall\-openbsd\fR" 4
+.IX Item "-mcall-openbsd"
+On System V.4 and embedded PowerPC systems compile code for the
+OpenBSD operating system.
+.IP "\fB\-maix\-struct\-return\fR" 4
+.IX Item "-maix-struct-return"
+Return all structures in memory (as specified by the \s-1AIX\s0 \s-1ABI\s0).
+.IP "\fB\-msvr4\-struct\-return\fR" 4
+.IX Item "-msvr4-struct-return"
+Return structures smaller than 8 bytes in registers (as specified by the
+\&\s-1SVR4\s0 \s-1ABI\s0).
+.IP "\fB\-mabi=\fR\fIabi-type\fR" 4
+.IX Item "-mabi=abi-type"
+Extend the current \s-1ABI\s0 with a particular extension, or remove such extension.
+Valid values are \fIaltivec\fR, \fIno-altivec\fR, \fIspe\fR,
+\&\fIno-spe\fR, \fIibmlongdouble\fR, \fIieeelongdouble\fR.
+.IP "\fB\-mabi=spe\fR" 4
+.IX Item "-mabi=spe"
+Extend the current \s-1ABI\s0 with \s-1SPE\s0 \s-1ABI\s0 extensions.  This does not change
+the default \s-1ABI\s0, instead it adds the \s-1SPE\s0 \s-1ABI\s0 extensions to the current
+\&\s-1ABI\s0.
+.IP "\fB\-mabi=no\-spe\fR" 4
+.IX Item "-mabi=no-spe"
+Disable Booke \s-1SPE\s0 \s-1ABI\s0 extensions for the current \s-1ABI\s0.
+.IP "\fB\-mabi=ibmlongdouble\fR" 4
+.IX Item "-mabi=ibmlongdouble"
+Change the current \s-1ABI\s0 to use \s-1IBM\s0 extended precision long double.
+This is a PowerPC 32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
+.IP "\fB\-mabi=ieeelongdouble\fR" 4
+.IX Item "-mabi=ieeelongdouble"
+Change the current \s-1ABI\s0 to use \s-1IEEE\s0 extended precision long double.
+This is a PowerPC 32\-bit Linux \s-1ABI\s0 option.
+.IP "\fB\-mprototype\fR" 4
+.IX Item "-mprototype"
+.PD 0
+.IP "\fB\-mno\-prototype\fR" 4
+.IX Item "-mno-prototype"
+.PD
+On System V.4 and embedded PowerPC systems assume that all calls to
+variable argument functions are properly prototyped.  Otherwise, the
+compiler must insert an instruction before every non prototyped call to
+set or clear bit 6 of the condition code register (\fI\s-1CR\s0\fR) to
+indicate whether floating point values were passed in the floating point
+registers in case the function takes a variable arguments.  With
+\&\fB\-mprototype\fR, only calls to prototyped variable argument functions
+will set or clear the bit.
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIsim\-crt0.o\fR and that the standard C libraries are \fIlibsim.a\fR and
+\&\fIlibc.a\fR.  This is the default for \fBpowerpc\-*\-eabisim\fR
+configurations.
+.IP "\fB\-mmvme\fR" 4
+.IX Item "-mmvme"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIcrt0.o\fR and the standard C libraries are \fIlibmvme.a\fR and
+\&\fIlibc.a\fR.
+.IP "\fB\-mads\fR" 4
+.IX Item "-mads"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIcrt0.o\fR and the standard C libraries are \fIlibads.a\fR and
+\&\fIlibc.a\fR.
+.IP "\fB\-myellowknife\fR" 4
+.IX Item "-myellowknife"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIcrt0.o\fR and the standard C libraries are \fIlibyk.a\fR and
+\&\fIlibc.a\fR.
+.IP "\fB\-mvxworks\fR" 4
+.IX Item "-mvxworks"
+On System V.4 and embedded PowerPC systems, specify that you are
+compiling for a VxWorks system.
+.IP "\fB\-memb\fR" 4
+.IX Item "-memb"
+On embedded PowerPC systems, set the \fI\s-1PPC_EMB\s0\fR bit in the \s-1ELF\s0 flags
+header to indicate that \fBeabi\fR extended relocations are used.
+.IP "\fB\-meabi\fR" 4
+.IX Item "-meabi"
+.PD 0
+.IP "\fB\-mno\-eabi\fR" 4
+.IX Item "-mno-eabi"
+.PD
+On System V.4 and embedded PowerPC systems do (do not) adhere to the
+Embedded Applications Binary Interface (eabi) which is a set of
+modifications to the System V.4 specifications.  Selecting \fB\-meabi\fR
+means that the stack is aligned to an 8 byte boundary, a function
+\&\f(CW\*(C`_\|_eabi\*(C'\fR is called to from \f(CW\*(C`main\*(C'\fR to set up the eabi
+environment, and the \fB\-msdata\fR option can use both \f(CW\*(C`r2\*(C'\fR and
+\&\f(CW\*(C`r13\*(C'\fR to point to two separate small data areas.  Selecting
+\&\fB\-mno\-eabi\fR means that the stack is aligned to a 16 byte boundary,
+do not call an initialization function from \f(CW\*(C`main\*(C'\fR, and the
+\&\fB\-msdata\fR option will only use \f(CW\*(C`r13\*(C'\fR to point to a single
+small data area.  The \fB\-meabi\fR option is on by default if you
+configured \s-1GCC\s0 using one of the \fBpowerpc*\-*\-eabi*\fR options.
+.IP "\fB\-msdata=eabi\fR" 4
+.IX Item "-msdata=eabi"
+On System V.4 and embedded PowerPC systems, put small initialized
+\&\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata2\fR section, which
+is pointed to by register \f(CW\*(C`r2\*(C'\fR.  Put small initialized
+non\-\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata\fR section,
+which is pointed to by register \f(CW\*(C`r13\*(C'\fR.  Put small uninitialized
+global and static data in the \fB.sbss\fR section, which is adjacent to
+the \fB.sdata\fR section.  The \fB\-msdata=eabi\fR option is
+incompatible with the \fB\-mrelocatable\fR option.  The
+\&\fB\-msdata=eabi\fR option also sets the \fB\-memb\fR option.
+.IP "\fB\-msdata=sysv\fR" 4
+.IX Item "-msdata=sysv"
+On System V.4 and embedded PowerPC systems, put small global and static
+data in the \fB.sdata\fR section, which is pointed to by register
+\&\f(CW\*(C`r13\*(C'\fR.  Put small uninitialized global and static data in the
+\&\fB.sbss\fR section, which is adjacent to the \fB.sdata\fR section.
+The \fB\-msdata=sysv\fR option is incompatible with the
+\&\fB\-mrelocatable\fR option.
+.IP "\fB\-msdata=default\fR" 4
+.IX Item "-msdata=default"
+.PD 0
+.IP "\fB\-msdata\fR" 4
+.IX Item "-msdata"
+.PD
+On System V.4 and embedded PowerPC systems, if \fB\-meabi\fR is used,
+compile code the same as \fB\-msdata=eabi\fR, otherwise compile code the
+same as \fB\-msdata=sysv\fR.
+.IP "\fB\-msdata=data\fR" 4
+.IX Item "-msdata=data"
+On System V.4 and embedded PowerPC systems, put small global
+data in the \fB.sdata\fR section.  Put small uninitialized global
+data in the \fB.sbss\fR section.  Do not use register \f(CW\*(C`r13\*(C'\fR
+to address small data however.  This is the default behavior unless
+other \fB\-msdata\fR options are used.
+.IP "\fB\-msdata=none\fR" 4
+.IX Item "-msdata=none"
+.PD 0
+.IP "\fB\-mno\-sdata\fR" 4
+.IX Item "-mno-sdata"
+.PD
+On embedded PowerPC systems, put all initialized global and static data
+in the \fB.data\fR section, and all uninitialized data in the
+\&\fB.bss\fR section.
+.IP "\fB\-mblock\-move\-inline\-limit=\fR\fInum\fR" 4
+.IX Item "-mblock-move-inline-limit=num"
+Inline all block moves (such as calls to \f(CW\*(C`memcpy\*(C'\fR or structure
+copies) less than or equal to \fInum\fR bytes.  The minimum value for
+\&\fInum\fR is 32 bytes on 32\-bit targets and 64 bytes on 64\-bit
+targets.  The default value is target-specific.
+.IP "\fB\-G\fR \fInum\fR" 4
+.IX Item "-G num"
+On embedded PowerPC systems, put global and static items less than or
+equal to \fInum\fR bytes into the small data or bss sections instead of
+the normal data or bss section.  By default, \fInum\fR is 8.  The
+\&\fB\-G\fR \fInum\fR switch is also passed to the linker.
+All modules should be compiled with the same \fB\-G\fR \fInum\fR value.
+.IP "\fB\-mregnames\fR" 4
+.IX Item "-mregnames"
+.PD 0
+.IP "\fB\-mno\-regnames\fR" 4
+.IX Item "-mno-regnames"
+.PD
+On System V.4 and embedded PowerPC systems do (do not) emit register
+names in the assembly language output using symbolic forms.
+.IP "\fB\-mlongcall\fR" 4
+.IX Item "-mlongcall"
+.PD 0
+.IP "\fB\-mno\-longcall\fR" 4
+.IX Item "-mno-longcall"
+.PD
+By default assume that all calls are far away so that a longer more
+expensive calling sequence is required.  This is required for calls
+further than 32 megabytes (33,554,432 bytes) from the current location.
+A short call will be generated if the compiler knows
+the call cannot be that far away.  This setting can be overridden by
+the \f(CW\*(C`shortcall\*(C'\fR function attribute, or by \f(CW\*(C`#pragma
+longcall(0)\*(C'\fR.
+.Sp
+Some linkers are capable of detecting out-of-range calls and generating
+glue code on the fly.  On these systems, long calls are unnecessary and
+generate slower code.  As of this writing, the \s-1AIX\s0 linker can do this,
+as can the \s-1GNU\s0 linker for PowerPC/64.  It is planned to add this feature
+to the \s-1GNU\s0 linker for 32\-bit PowerPC systems as well.
+.Sp
+On Darwin/PPC systems, \f(CW\*(C`#pragma longcall\*(C'\fR will generate \*(L"jbsr
+callee, L42\*(R", plus a \*(L"branch island\*(R" (glue code).  The two target
+addresses represent the callee and the \*(L"branch island\*(R".  The
+Darwin/PPC linker will prefer the first address and generate a \*(L"bl
+callee\*(R" if the \s-1PPC\s0 \*(L"bl\*(R" instruction will reach the callee directly;
+otherwise, the linker will generate \*(L"bl L42\*(R" to call the \*(L"branch
+island\*(R".  The \*(L"branch island\*(R" is appended to the body of the
+calling function; it computes the full 32\-bit address of the callee
+and jumps to it.
+.Sp
+On Mach-O (Darwin) systems, this option directs the compiler emit to
+the glue for every direct call, and the Darwin linker decides whether
+to use or discard it.
+.Sp
+In the future, we may cause \s-1GCC\s0 to ignore all longcall specifications
+when the linker is known to generate glue.
+.IP "\fB\-mtls\-markers\fR" 4
+.IX Item "-mtls-markers"
+.PD 0
+.IP "\fB\-mno\-tls\-markers\fR" 4
+.IX Item "-mno-tls-markers"
+.PD
+Mark (do not mark) calls to \f(CW\*(C`_\|_tls_get_addr\*(C'\fR with a relocation
+specifying the function argument.  The relocation allows ld to
+reliably associate function call with argument setup instructions for
+\&\s-1TLS\s0 optimization, which in turn allows gcc to better schedule the
+sequence.
+.IP "\fB\-pthread\fR" 4
+.IX Item "-pthread"
+Adds support for multithreading with the \fIpthreads\fR library.
+This option sets flags for both the preprocessor and linker.
+.IP "\fB\-mrecip\fR" 4
+.IX Item "-mrecip"
+.PD 0
+.IP "\fB\-mno\-recip\fR" 4
+.IX Item "-mno-recip"
+.PD
+This option will enable \s-1GCC\s0 to use the reciprocal estimate and
+reciprocal square root estimate instructions with additional
+Newton-Raphson steps to increase precision instead of doing a divide or
+square root and divide for floating point arguments.  You should use
+the \fB\-ffast\-math\fR option when using \fB\-mrecip\fR (or at
+least \fB\-funsafe\-math\-optimizations\fR,
+\&\fB\-finite\-math\-only\fR, \fB\-freciprocal\-math\fR and
+\&\fB\-fno\-trapping\-math\fR).  Note that while the throughput of the
+sequence is generally higher than the throughput of the non-reciprocal
+instruction, the precision of the sequence can be decreased by up to 2
+ulp (i.e. the inverse of 1.0 equals 0.99999994) for reciprocal square
+roots.
+.IP "\fB\-mrecip=\fR\fIopt\fR" 4
+.IX Item "-mrecip=opt"
+This option allows to control which reciprocal estimate instructions
+may be used.  \fIopt\fR is a comma separated list of options, that may
+be preceded by a \f(CW\*(C`!\*(C'\fR to invert the option:
+\&\f(CW\*(C`all\*(C'\fR: enable all estimate instructions,
+\&\f(CW\*(C`default\*(C'\fR: enable the default instructions, equivalent to \fB\-mrecip\fR,
+\&\f(CW\*(C`none\*(C'\fR: disable all estimate instructions, equivalent to \fB\-mno\-recip\fR;
+\&\f(CW\*(C`div\*(C'\fR: enable the reciprocal approximation instructions for both single and double precision;
+\&\f(CW\*(C`divf\*(C'\fR: enable the single precision reciprocal approximation instructions;
+\&\f(CW\*(C`divd\*(C'\fR: enable the double precision reciprocal approximation instructions;
+\&\f(CW\*(C`rsqrt\*(C'\fR: enable the reciprocal square root approximation instructions for both single and double precision;
+\&\f(CW\*(C`rsqrtf\*(C'\fR: enable the single precision reciprocal square root approximation instructions;
+\&\f(CW\*(C`rsqrtd\*(C'\fR: enable the double precision reciprocal square root approximation instructions;
+.Sp
+So for example, \fB\-mrecip=all,!rsqrtd\fR would enable the
+all of the reciprocal estimate instructions, except for the
+\&\f(CW\*(C`FRSQRTE\*(C'\fR, \f(CW\*(C`XSRSQRTEDP\*(C'\fR, and \f(CW\*(C`XVRSQRTEDP\*(C'\fR instructions
+which handle the double precision reciprocal square root calculations.
+.IP "\fB\-mrecip\-precision\fR" 4
+.IX Item "-mrecip-precision"
+.PD 0
+.IP "\fB\-mno\-recip\-precision\fR" 4
+.IX Item "-mno-recip-precision"
+.PD
+Assume (do not assume) that the reciprocal estimate instructions
+provide higher precision estimates than is mandated by the powerpc
+\&\s-1ABI\s0.  Selecting \fB\-mcpu=power6\fR or \fB\-mcpu=power7\fR
+automatically selects \fB\-mrecip\-precision\fR.  The double
+precision square root estimate instructions are not generated by
+default on low precision machines, since they do not provide an
+estimate that converges after three steps.
+.IP "\fB\-mveclibabi=\fR\fItype\fR" 4
+.IX Item "-mveclibabi=type"
+Specifies the \s-1ABI\s0 type to use for vectorizing intrinsics using an
+external library.  The only type supported at present is \f(CW\*(C`mass\*(C'\fR,
+which specifies to use \s-1IBM\s0's Mathematical Acceleration Subsystem
+(\s-1MASS\s0) libraries for vectorizing intrinsics using external libraries.
+\&\s-1GCC\s0 will currently emit calls to \f(CW\*(C`acosd2\*(C'\fR, \f(CW\*(C`acosf4\*(C'\fR,
+\&\f(CW\*(C`acoshd2\*(C'\fR, \f(CW\*(C`acoshf4\*(C'\fR, \f(CW\*(C`asind2\*(C'\fR, \f(CW\*(C`asinf4\*(C'\fR,
+\&\f(CW\*(C`asinhd2\*(C'\fR, \f(CW\*(C`asinhf4\*(C'\fR, \f(CW\*(C`atan2d2\*(C'\fR, \f(CW\*(C`atan2f4\*(C'\fR,
+\&\f(CW\*(C`atand2\*(C'\fR, \f(CW\*(C`atanf4\*(C'\fR, \f(CW\*(C`atanhd2\*(C'\fR, \f(CW\*(C`atanhf4\*(C'\fR,
+\&\f(CW\*(C`cbrtd2\*(C'\fR, \f(CW\*(C`cbrtf4\*(C'\fR, \f(CW\*(C`cosd2\*(C'\fR, \f(CW\*(C`cosf4\*(C'\fR,
+\&\f(CW\*(C`coshd2\*(C'\fR, \f(CW\*(C`coshf4\*(C'\fR, \f(CW\*(C`erfcd2\*(C'\fR, \f(CW\*(C`erfcf4\*(C'\fR,
+\&\f(CW\*(C`erfd2\*(C'\fR, \f(CW\*(C`erff4\*(C'\fR, \f(CW\*(C`exp2d2\*(C'\fR, \f(CW\*(C`exp2f4\*(C'\fR,
+\&\f(CW\*(C`expd2\*(C'\fR, \f(CW\*(C`expf4\*(C'\fR, \f(CW\*(C`expm1d2\*(C'\fR, \f(CW\*(C`expm1f4\*(C'\fR,
+\&\f(CW\*(C`hypotd2\*(C'\fR, \f(CW\*(C`hypotf4\*(C'\fR, \f(CW\*(C`lgammad2\*(C'\fR, \f(CW\*(C`lgammaf4\*(C'\fR,
+\&\f(CW\*(C`log10d2\*(C'\fR, \f(CW\*(C`log10f4\*(C'\fR, \f(CW\*(C`log1pd2\*(C'\fR, \f(CW\*(C`log1pf4\*(C'\fR,
+\&\f(CW\*(C`log2d2\*(C'\fR, \f(CW\*(C`log2f4\*(C'\fR, \f(CW\*(C`logd2\*(C'\fR, \f(CW\*(C`logf4\*(C'\fR,
+\&\f(CW\*(C`powd2\*(C'\fR, \f(CW\*(C`powf4\*(C'\fR, \f(CW\*(C`sind2\*(C'\fR, \f(CW\*(C`sinf4\*(C'\fR, \f(CW\*(C`sinhd2\*(C'\fR,
+\&\f(CW\*(C`sinhf4\*(C'\fR, \f(CW\*(C`sqrtd2\*(C'\fR, \f(CW\*(C`sqrtf4\*(C'\fR, \f(CW\*(C`tand2\*(C'\fR,
+\&\f(CW\*(C`tanf4\*(C'\fR, \f(CW\*(C`tanhd2\*(C'\fR, and \f(CW\*(C`tanhf4\*(C'\fR when generating code
+for power7.  Both \fB\-ftree\-vectorize\fR and
+\&\fB\-funsafe\-math\-optimizations\fR have to be enabled.  The \s-1MASS\s0
+libraries will have to be specified at link time.
+.IP "\fB\-mfriz\fR" 4
+.IX Item "-mfriz"
+.PD 0
+.IP "\fB\-mno\-friz\fR" 4
+.IX Item "-mno-friz"
+.PD
+Generate (do not generate) the \f(CW\*(C`friz\*(C'\fR instruction when the
+\&\fB\-funsafe\-math\-optimizations\fR option is used to optimize
+rounding a floating point value to 64\-bit integer and back to floating
+point.  The \f(CW\*(C`friz\*(C'\fR instruction does not return the same value if
+the floating point number is too large to fit in an integer.
+.PP
+\fI\s-1RX\s0 Options\fR
+.IX Subsection "RX Options"
+.PP
+These command line options are defined for \s-1RX\s0 targets:
+.IP "\fB\-m64bit\-doubles\fR" 4
+.IX Item "-m64bit-doubles"
+.PD 0
+.IP "\fB\-m32bit\-doubles\fR" 4
+.IX Item "-m32bit-doubles"
+.PD
+Make the \f(CW\*(C`double\*(C'\fR data type be 64\-bits (\fB\-m64bit\-doubles\fR)
+or 32\-bits (\fB\-m32bit\-doubles\fR) in size.  The default is
+\&\fB\-m32bit\-doubles\fR.  \fINote\fR \s-1RX\s0 floating point hardware only
+works on 32\-bit values, which is why the default is
+\&\fB\-m32bit\-doubles\fR.
+.IP "\fB\-fpu\fR" 4
+.IX Item "-fpu"
+.PD 0
+.IP "\fB\-nofpu\fR" 4
+.IX Item "-nofpu"
+.PD
+Enables (\fB\-fpu\fR) or disables (\fB\-nofpu\fR) the use of \s-1RX\s0
+floating point hardware.  The default is enabled for the \fI\s-1RX600\s0\fR
+series and disabled for the \fI\s-1RX200\s0\fR series.
+.Sp
+Floating point instructions will only be generated for 32\-bit floating
+point values however, so if the \fB\-m64bit\-doubles\fR option is in
+use then the \s-1FPU\s0 hardware will not be used for doubles.
+.Sp
+\&\fINote\fR If the \fB\-fpu\fR option is enabled then
+\&\fB\-funsafe\-math\-optimizations\fR is also enabled automatically.
+This is because the \s-1RX\s0 \s-1FPU\s0 instructions are themselves unsafe.
+.IP "\fB\-mcpu=\fR\fIname\fR" 4
+.IX Item "-mcpu=name"
+Selects the type of \s-1RX\s0 \s-1CPU\s0 to be targeted.  Currently three types are
+supported, the generic \fI\s-1RX600\s0\fR and \fI\s-1RX200\s0\fR series hardware and
+the specific \fI\s-1RX610\s0\fR \s-1CPU\s0.  The default is \fI\s-1RX600\s0\fR.
+.Sp
+The only difference between \fI\s-1RX600\s0\fR and \fI\s-1RX610\s0\fR is that the
+\&\fI\s-1RX610\s0\fR does not support the \f(CW\*(C`MVTIPL\*(C'\fR instruction.
+.Sp
+The \fI\s-1RX200\s0\fR series does not have a hardware floating point unit
+and so \fB\-nofpu\fR is enabled by default when this type is
+selected.
+.IP "\fB\-mbig\-endian\-data\fR" 4
+.IX Item "-mbig-endian-data"
+.PD 0
+.IP "\fB\-mlittle\-endian\-data\fR" 4
+.IX Item "-mlittle-endian-data"
+.PD
+Store data (but not code) in the big-endian format.  The default is
+\&\fB\-mlittle\-endian\-data\fR, i.e. to store data in the little endian
+format.
+.IP "\fB\-msmall\-data\-limit=\fR\fIN\fR" 4
+.IX Item "-msmall-data-limit=N"
+Specifies the maximum size in bytes of global and static variables
+which can be placed into the small data area.  Using the small data
+area can lead to smaller and faster code, but the size of area is
+limited and it is up to the programmer to ensure that the area does
+not overflow.  Also when the small data area is used one of the \s-1RX\s0's
+registers (\f(CW\*(C`r13\*(C'\fR) is reserved for use pointing to this area, so
+it is no longer available for use by the compiler.  This could result
+in slower and/or larger code if variables which once could have been
+held in \f(CW\*(C`r13\*(C'\fR are now pushed onto the stack.
+.Sp
+Note, common variables (variables which have not been initialised) and
+constants are not placed into the small data area as they are assigned
+to other sections in the output executable.
+.Sp
+The default value is zero, which disables this feature.  Note, this
+feature is not enabled by default with higher optimization levels
+(\fB\-O2\fR etc) because of the potentially detrimental effects of
+reserving register \f(CW\*(C`r13\*(C'\fR.  It is up to the programmer to
+experiment and discover whether this feature is of benefit to their
+program.
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+.PD 0
+.IP "\fB\-mno\-sim\fR" 4
+.IX Item "-mno-sim"
+.PD
+Use the simulator runtime.  The default is to use the libgloss board
+specific runtime.
+.IP "\fB\-mas100\-syntax\fR" 4
+.IX Item "-mas100-syntax"
+.PD 0
+.IP "\fB\-mno\-as100\-syntax\fR" 4
+.IX Item "-mno-as100-syntax"
+.PD
+When generating assembler output use a syntax that is compatible with
+Renesas's \s-1AS100\s0 assembler.  This syntax can also be handled by the \s-1GAS\s0
+assembler but it has some restrictions so generating it is not the
+default option.
+.IP "\fB\-mmax\-constant\-size=\fR\fIN\fR" 4
+.IX Item "-mmax-constant-size=N"
+Specifies the maximum size, in bytes, of a constant that can be used as
+an operand in a \s-1RX\s0 instruction.  Although the \s-1RX\s0 instruction set does
+allow constants of up to 4 bytes in length to be used in instructions,
+a longer value equates to a longer instruction.  Thus in some
+circumstances it can be beneficial to restrict the size of constants
+that are used in instructions.  Constants that are too big are instead
+placed into a constant pool and referenced via register indirection.
+.Sp
+The value \fIN\fR can be between 0 and 4.  A value of 0 (the default)
+or 4 means that constants of any size are allowed.
+.IP "\fB\-mrelax\fR" 4
+.IX Item "-mrelax"
+Enable linker relaxation.  Linker relaxation is a process whereby the
+linker will attempt to reduce the size of a program by finding shorter
+versions of various instructions.  Disabled by default.
+.IP "\fB\-mint\-register=\fR\fIN\fR" 4
+.IX Item "-mint-register=N"
+Specify the number of registers to reserve for fast interrupt handler
+functions.  The value \fIN\fR can be between 0 and 4.  A value of 1
+means that register \f(CW\*(C`r13\*(C'\fR will be reserved for the exclusive use
+of fast interrupt handlers.  A value of 2 reserves \f(CW\*(C`r13\*(C'\fR and
+\&\f(CW\*(C`r12\*(C'\fR.  A value of 3 reserves \f(CW\*(C`r13\*(C'\fR, \f(CW\*(C`r12\*(C'\fR and
+\&\f(CW\*(C`r11\*(C'\fR, and a value of 4 reserves \f(CW\*(C`r13\*(C'\fR through \f(CW\*(C`r10\*(C'\fR.
+A value of 0, the default, does not reserve any registers.
+.IP "\fB\-msave\-acc\-in\-interrupts\fR" 4
+.IX Item "-msave-acc-in-interrupts"
+Specifies that interrupt handler functions should preserve the
+accumulator register.  This is only necessary if normal code might use
+the accumulator register, for example because it performs 64\-bit
+multiplications.  The default is to ignore the accumulator as this
+makes the interrupt handlers faster.
+.PP
+\&\fINote:\fR The generic \s-1GCC\s0 command line \fB\-ffixed\-\fR\fIreg\fR
+has special significance to the \s-1RX\s0 port when used with the
+\&\f(CW\*(C`interrupt\*(C'\fR function attribute.  This attribute indicates a
+function intended to process fast interrupts.  \s-1GCC\s0 will will ensure
+that it only uses the registers \f(CW\*(C`r10\*(C'\fR, \f(CW\*(C`r11\*(C'\fR, \f(CW\*(C`r12\*(C'\fR
+and/or \f(CW\*(C`r13\*(C'\fR and only provided that the normal use of the
+corresponding registers have been restricted via the
+\&\fB\-ffixed\-\fR\fIreg\fR or \fB\-mint\-register\fR command line
+options.
+.PP
+\fIS/390 and zSeries Options\fR
+.IX Subsection "S/390 and zSeries Options"
+.PP
+These are the \fB\-m\fR options defined for the S/390 and zSeries architecture.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD 0
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD
+Use (do not use) the hardware floating-point instructions and registers
+for floating-point operations.  When \fB\-msoft\-float\fR is specified,
+functions in \fIlibgcc.a\fR will be used to perform floating-point
+operations.  When \fB\-mhard\-float\fR is specified, the compiler
+generates \s-1IEEE\s0 floating-point instructions.  This is the default.
+.IP "\fB\-mhard\-dfp\fR" 4
+.IX Item "-mhard-dfp"
+.PD 0
+.IP "\fB\-mno\-hard\-dfp\fR" 4
+.IX Item "-mno-hard-dfp"
+.PD
+Use (do not use) the hardware decimal-floating-point instructions for
+decimal-floating-point operations.  When \fB\-mno\-hard\-dfp\fR is
+specified, functions in \fIlibgcc.a\fR will be used to perform
+decimal-floating-point operations.  When \fB\-mhard\-dfp\fR is
+specified, the compiler generates decimal-floating-point hardware
+instructions.  This is the default for \fB\-march=z9\-ec\fR or higher.
+.IP "\fB\-mlong\-double\-64\fR" 4
+.IX Item "-mlong-double-64"
+.PD 0
+.IP "\fB\-mlong\-double\-128\fR" 4
+.IX Item "-mlong-double-128"
+.PD
+These switches control the size of \f(CW\*(C`long double\*(C'\fR type. A size
+of 64bit makes the \f(CW\*(C`long double\*(C'\fR type equivalent to the \f(CW\*(C`double\*(C'\fR
+type. This is the default.
+.IP "\fB\-mbackchain\fR" 4
+.IX Item "-mbackchain"
+.PD 0
+.IP "\fB\-mno\-backchain\fR" 4
+.IX Item "-mno-backchain"
+.PD
+Store (do not store) the address of the caller's frame as backchain pointer
+into the callee's stack frame.
+A backchain may be needed to allow debugging using tools that do not understand
+\&\s-1DWARF\-2\s0 call frame information.
+When \fB\-mno\-packed\-stack\fR is in effect, the backchain pointer is stored
+at the bottom of the stack frame; when \fB\-mpacked\-stack\fR is in effect,
+the backchain is placed into the topmost word of the 96/160 byte register
+save area.
+.Sp
+In general, code compiled with \fB\-mbackchain\fR is call-compatible with
+code compiled with \fB\-mmo\-backchain\fR; however, use of the backchain
+for debugging purposes usually requires that the whole binary is built with
+\&\fB\-mbackchain\fR.  Note that the combination of \fB\-mbackchain\fR,
+\&\fB\-mpacked\-stack\fR and \fB\-mhard\-float\fR is not supported.  In order
+to build a linux kernel use \fB\-msoft\-float\fR.
+.Sp
+The default is to not maintain the backchain.
+.IP "\fB\-mpacked\-stack\fR" 4
+.IX Item "-mpacked-stack"
+.PD 0
+.IP "\fB\-mno\-packed\-stack\fR" 4
+.IX Item "-mno-packed-stack"
+.PD
+Use (do not use) the packed stack layout.  When \fB\-mno\-packed\-stack\fR is
+specified, the compiler uses the all fields of the 96/160 byte register save
+area only for their default purpose; unused fields still take up stack space.
+When \fB\-mpacked\-stack\fR is specified, register save slots are densely
+packed at the top of the register save area; unused space is reused for other
+purposes, allowing for more efficient use of the available stack space.
+However, when \fB\-mbackchain\fR is also in effect, the topmost word of
+the save area is always used to store the backchain, and the return address
+register is always saved two words below the backchain.
+.Sp
+As long as the stack frame backchain is not used, code generated with
+\&\fB\-mpacked\-stack\fR is call-compatible with code generated with
+\&\fB\-mno\-packed\-stack\fR.  Note that some non-FSF releases of \s-1GCC\s0 2.95 for
+S/390 or zSeries generated code that uses the stack frame backchain at run
+time, not just for debugging purposes.  Such code is not call-compatible
+with code compiled with \fB\-mpacked\-stack\fR.  Also, note that the
+combination of \fB\-mbackchain\fR,
+\&\fB\-mpacked\-stack\fR and \fB\-mhard\-float\fR is not supported.  In order
+to build a linux kernel use \fB\-msoft\-float\fR.
+.Sp
+The default is to not use the packed stack layout.
+.IP "\fB\-msmall\-exec\fR" 4
+.IX Item "-msmall-exec"
+.PD 0
+.IP "\fB\-mno\-small\-exec\fR" 4
+.IX Item "-mno-small-exec"
+.PD
+Generate (or do not generate) code using the \f(CW\*(C`bras\*(C'\fR instruction
+to do subroutine calls.
+This only works reliably if the total executable size does not
+exceed 64k.  The default is to use the \f(CW\*(C`basr\*(C'\fR instruction instead,
+which does not have this limitation.
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD 0
+.IP "\fB\-m31\fR" 4
+.IX Item "-m31"
+.PD
+When \fB\-m31\fR is specified, generate code compliant to the
+GNU/Linux for S/390 \s-1ABI\s0.  When \fB\-m64\fR is specified, generate
+code compliant to the GNU/Linux for zSeries \s-1ABI\s0.  This allows \s-1GCC\s0 in
+particular to generate 64\-bit instructions.  For the \fBs390\fR
+targets, the default is \fB\-m31\fR, while the \fBs390x\fR
+targets default to \fB\-m64\fR.
+.IP "\fB\-mzarch\fR" 4
+.IX Item "-mzarch"
+.PD 0
+.IP "\fB\-mesa\fR" 4
+.IX Item "-mesa"
+.PD
+When \fB\-mzarch\fR is specified, generate code using the
+instructions available on z/Architecture.
+When \fB\-mesa\fR is specified, generate code using the
+instructions available on \s-1ESA/390\s0.  Note that \fB\-mesa\fR is
+not possible with \fB\-m64\fR.
+When generating code compliant to the GNU/Linux for S/390 \s-1ABI\s0,
+the default is \fB\-mesa\fR.  When generating code compliant
+to the GNU/Linux for zSeries \s-1ABI\s0, the default is \fB\-mzarch\fR.
+.IP "\fB\-mmvcle\fR" 4
+.IX Item "-mmvcle"
+.PD 0
+.IP "\fB\-mno\-mvcle\fR" 4
+.IX Item "-mno-mvcle"
+.PD
+Generate (or do not generate) code using the \f(CW\*(C`mvcle\*(C'\fR instruction
+to perform block moves.  When \fB\-mno\-mvcle\fR is specified,
+use a \f(CW\*(C`mvc\*(C'\fR loop instead.  This is the default unless optimizing for
+size.
+.IP "\fB\-mdebug\fR" 4
+.IX Item "-mdebug"
+.PD 0
+.IP "\fB\-mno\-debug\fR" 4
+.IX Item "-mno-debug"
+.PD
+Print (or do not print) additional debug information when compiling.
+The default is to not print debug information.
+.IP "\fB\-march=\fR\fIcpu-type\fR" 4
+.IX Item "-march=cpu-type"
+Generate code that will run on \fIcpu-type\fR, which is the name of a system
+representing a certain processor type.  Possible values for
+\&\fIcpu-type\fR are \fBg5\fR, \fBg6\fR, \fBz900\fR, \fBz990\fR,
+\&\fBz9\-109\fR, \fBz9\-ec\fR and \fBz10\fR.
+When generating code using the instructions available on z/Architecture,
+the default is \fB\-march=z900\fR.  Otherwise, the default is
+\&\fB\-march=g5\fR.
+.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
+.IX Item "-mtune=cpu-type"
+Tune to \fIcpu-type\fR everything applicable about the generated code,
+except for the \s-1ABI\s0 and the set of available instructions.
+The list of \fIcpu-type\fR values is the same as for \fB\-march\fR.
+The default is the value used for \fB\-march\fR.
+.IP "\fB\-mtpf\-trace\fR" 4
+.IX Item "-mtpf-trace"
+.PD 0
+.IP "\fB\-mno\-tpf\-trace\fR" 4
+.IX Item "-mno-tpf-trace"
+.PD
+Generate code that adds (does not add) in \s-1TPF\s0 \s-1OS\s0 specific branches to trace
+routines in the operating system.  This option is off by default, even
+when compiling for the \s-1TPF\s0 \s-1OS\s0.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Generate code that uses (does not use) the floating point multiply and
+accumulate instructions.  These instructions are generated by default if
+hardware floating point is used.
+.IP "\fB\-mwarn\-framesize=\fR\fIframesize\fR" 4
+.IX Item "-mwarn-framesize=framesize"
+Emit a warning if the current function exceeds the given frame size.  Because
+this is a compile time check it doesn't need to be a real problem when the program
+runs.  It is intended to identify functions which most probably cause
+a stack overflow.  It is useful to be used in an environment with limited stack
+size e.g. the linux kernel.
+.IP "\fB\-mwarn\-dynamicstack\fR" 4
+.IX Item "-mwarn-dynamicstack"
+Emit a warning if the function calls alloca or uses dynamically
+sized arrays.  This is generally a bad idea with a limited stack size.
+.IP "\fB\-mstack\-guard=\fR\fIstack-guard\fR" 4
+.IX Item "-mstack-guard=stack-guard"
+.PD 0
+.IP "\fB\-mstack\-size=\fR\fIstack-size\fR" 4
+.IX Item "-mstack-size=stack-size"
+.PD
+If these options are provided the s390 back end emits additional instructions in
+the function prologue which trigger a trap if the stack size is \fIstack-guard\fR
+bytes above the \fIstack-size\fR (remember that the stack on s390 grows downward).
+If the \fIstack-guard\fR option is omitted the smallest power of 2 larger than
+the frame size of the compiled function is chosen.
+These options are intended to be used to help debugging stack overflow problems.
+The additionally emitted code causes only little overhead and hence can also be
+used in production like systems without greater performance degradation.  The given
+values have to be exact powers of 2 and \fIstack-size\fR has to be greater than
+\&\fIstack-guard\fR without exceeding 64k.
+In order to be efficient the extra code makes the assumption that the stack starts
+at an address aligned to the value given by \fIstack-size\fR.
+The \fIstack-guard\fR option can only be used in conjunction with \fIstack-size\fR.
+.PP
+\fIScore Options\fR
+.IX Subsection "Score Options"
+.PP
+These options are defined for Score implementations:
+.IP "\fB\-meb\fR" 4
+.IX Item "-meb"
+Compile code for big endian mode.  This is the default.
+.IP "\fB\-mel\fR" 4
+.IX Item "-mel"
+Compile code for little endian mode.
+.IP "\fB\-mnhwloop\fR" 4
+.IX Item "-mnhwloop"
+Disable generate bcnz instruction.
+.IP "\fB\-muls\fR" 4
+.IX Item "-muls"
+Enable generate unaligned load and store instruction.
+.IP "\fB\-mmac\fR" 4
+.IX Item "-mmac"
+Enable the use of multiply-accumulate instructions. Disabled by default.
+.IP "\fB\-mscore5\fR" 4
+.IX Item "-mscore5"
+Specify the \s-1SCORE5\s0 as the target architecture.
+.IP "\fB\-mscore5u\fR" 4
+.IX Item "-mscore5u"
+Specify the \s-1SCORE5U\s0 of the target architecture.
+.IP "\fB\-mscore7\fR" 4
+.IX Item "-mscore7"
+Specify the \s-1SCORE7\s0 as the target architecture. This is the default.
+.IP "\fB\-mscore7d\fR" 4
+.IX Item "-mscore7d"
+Specify the \s-1SCORE7D\s0 as the target architecture.
+.PP
+\fI\s-1SH\s0 Options\fR
+.IX Subsection "SH Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1SH\s0 implementations:
+.IP "\fB\-m1\fR" 4
+.IX Item "-m1"
+Generate code for the \s-1SH1\s0.
+.IP "\fB\-m2\fR" 4
+.IX Item "-m2"
+Generate code for the \s-1SH2\s0.
+.IP "\fB\-m2e\fR" 4
+.IX Item "-m2e"
+Generate code for the SH2e.
+.IP "\fB\-m2a\-nofpu\fR" 4
+.IX Item "-m2a-nofpu"
+Generate code for the SH2a without \s-1FPU\s0, or for a SH2a\-FPU in such a way
+that the floating-point unit is not used.
+.IP "\fB\-m2a\-single\-only\fR" 4
+.IX Item "-m2a-single-only"
+Generate code for the SH2a\-FPU, in such a way that no double-precision
+floating point operations are used.
+.IP "\fB\-m2a\-single\fR" 4
+.IX Item "-m2a-single"
+Generate code for the SH2a\-FPU assuming the floating-point unit is in
+single-precision mode by default.
+.IP "\fB\-m2a\fR" 4
+.IX Item "-m2a"
+Generate code for the SH2a\-FPU assuming the floating-point unit is in
+double-precision mode by default.
+.IP "\fB\-m3\fR" 4
+.IX Item "-m3"
+Generate code for the \s-1SH3\s0.
+.IP "\fB\-m3e\fR" 4
+.IX Item "-m3e"
+Generate code for the SH3e.
+.IP "\fB\-m4\-nofpu\fR" 4
+.IX Item "-m4-nofpu"
+Generate code for the \s-1SH4\s0 without a floating-point unit.
+.IP "\fB\-m4\-single\-only\fR" 4
+.IX Item "-m4-single-only"
+Generate code for the \s-1SH4\s0 with a floating-point unit that only
+supports single-precision arithmetic.
+.IP "\fB\-m4\-single\fR" 4
+.IX Item "-m4-single"
+Generate code for the \s-1SH4\s0 assuming the floating-point unit is in
+single-precision mode by default.
+.IP "\fB\-m4\fR" 4
+.IX Item "-m4"
+Generate code for the \s-1SH4\s0.
+.IP "\fB\-m4a\-nofpu\fR" 4
+.IX Item "-m4a-nofpu"
+Generate code for the SH4al\-dsp, or for a SH4a in such a way that the
+floating-point unit is not used.
+.IP "\fB\-m4a\-single\-only\fR" 4
+.IX Item "-m4a-single-only"
+Generate code for the SH4a, in such a way that no double-precision
+floating point operations are used.
+.IP "\fB\-m4a\-single\fR" 4
+.IX Item "-m4a-single"
+Generate code for the SH4a assuming the floating-point unit is in
+single-precision mode by default.
+.IP "\fB\-m4a\fR" 4
+.IX Item "-m4a"
+Generate code for the SH4a.
+.IP "\fB\-m4al\fR" 4
+.IX Item "-m4al"
+Same as \fB\-m4a\-nofpu\fR, except that it implicitly passes
+\&\fB\-dsp\fR to the assembler.  \s-1GCC\s0 doesn't generate any \s-1DSP\s0
+instructions at the moment.
+.IP "\fB\-mb\fR" 4
+.IX Item "-mb"
+Compile code for the processor in big endian mode.
+.IP "\fB\-ml\fR" 4
+.IX Item "-ml"
+Compile code for the processor in little endian mode.
+.IP "\fB\-mdalign\fR" 4
+.IX Item "-mdalign"
+Align doubles at 64\-bit boundaries.  Note that this changes the calling
+conventions, and thus some functions from the standard C library will
+not work unless you recompile it first with \fB\-mdalign\fR.
+.IP "\fB\-mrelax\fR" 4
+.IX Item "-mrelax"
+Shorten some address references at link time, when possible; uses the
+linker option \fB\-relax\fR.
+.IP "\fB\-mbigtable\fR" 4
+.IX Item "-mbigtable"
+Use 32\-bit offsets in \f(CW\*(C`switch\*(C'\fR tables.  The default is to use
+16\-bit offsets.
+.IP "\fB\-mbitops\fR" 4
+.IX Item "-mbitops"
+Enable the use of bit manipulation instructions on \s-1SH2A\s0.
+.IP "\fB\-mfmovd\fR" 4
+.IX Item "-mfmovd"
+Enable the use of the instruction \f(CW\*(C`fmovd\*(C'\fR.  Check \fB\-mdalign\fR for
+alignment constraints.
+.IP "\fB\-mhitachi\fR" 4
+.IX Item "-mhitachi"
+Comply with the calling conventions defined by Renesas.
+.IP "\fB\-mrenesas\fR" 4
+.IX Item "-mrenesas"
+Comply with the calling conventions defined by Renesas.
+.IP "\fB\-mno\-renesas\fR" 4
+.IX Item "-mno-renesas"
+Comply with the calling conventions defined for \s-1GCC\s0 before the Renesas
+conventions were available.  This option is the default for all
+targets of the \s-1SH\s0 toolchain except for \fBsh-symbianelf\fR.
+.IP "\fB\-mnomacsave\fR" 4
+.IX Item "-mnomacsave"
+Mark the \f(CW\*(C`MAC\*(C'\fR register as call-clobbered, even if
+\&\fB\-mhitachi\fR is given.
+.IP "\fB\-mieee\fR" 4
+.IX Item "-mieee"
+.PD 0
+.IP "\fB\-mno\-ieee\fR" 4
+.IX Item "-mno-ieee"
+.PD
+Control the \s-1IEEE\s0 compliance of floating-point comparisons, which affects the
+handling of cases where the result of a comparison is unordered.  By default
+\&\fB\-mieee\fR is implicitly enabled.  If \fB\-ffinite\-math\-only\fR is
+enabled \fB\-mno\-ieee\fR is implicitly set, which results in faster
+floating-point greater-equal and less-equal comparisons.  The implcit settings
+can be overridden by specifying either \fB\-mieee\fR or \fB\-mno\-ieee\fR.
+.IP "\fB\-minline\-ic_invalidate\fR" 4
+.IX Item "-minline-ic_invalidate"
+Inline code to invalidate instruction cache entries after setting up
+nested function trampolines.
+This option has no effect if \-musermode is in effect and the selected
+code generation option (e.g. \-m4) does not allow the use of the icbi
+instruction.
+If the selected code generation option does not allow the use of the icbi
+instruction, and \-musermode is not in effect, the inlined code will
+manipulate the instruction cache address array directly with an associative
+write.  This not only requires privileged mode, but it will also
+fail if the cache line had been mapped via the \s-1TLB\s0 and has become unmapped.
+.IP "\fB\-misize\fR" 4
+.IX Item "-misize"
+Dump instruction size and location in the assembly code.
+.IP "\fB\-mpadstruct\fR" 4
+.IX Item "-mpadstruct"
+This option is deprecated.  It pads structures to multiple of 4 bytes,
+which is incompatible with the \s-1SH\s0 \s-1ABI\s0.
+.IP "\fB\-mspace\fR" 4
+.IX Item "-mspace"
+Optimize for space instead of speed.  Implied by \fB\-Os\fR.
+.IP "\fB\-mprefergot\fR" 4
+.IX Item "-mprefergot"
+When generating position-independent code, emit function calls using
+the Global Offset Table instead of the Procedure Linkage Table.
+.IP "\fB\-musermode\fR" 4
+.IX Item "-musermode"
+Don't generate privileged mode only code; implies \-mno\-inline\-ic_invalidate
+if the inlined code would not work in user mode.
+This is the default when the target is \f(CW\*(C`sh\-*\-linux*\*(C'\fR.
+.IP "\fB\-multcost=\fR\fInumber\fR" 4
+.IX Item "-multcost=number"
+Set the cost to assume for a multiply insn.
+.IP "\fB\-mdiv=\fR\fIstrategy\fR" 4
+.IX Item "-mdiv=strategy"
+Set the division strategy to use for SHmedia code.  \fIstrategy\fR must be
+one of: call, call2, fp, inv, inv:minlat, inv20u, inv20l, inv:call,
+inv:call2, inv:fp .
+\&\*(L"fp\*(R" performs the operation in floating point.  This has a very high latency,
+but needs only a few instructions, so it might be a good choice if
+your code has enough easily exploitable \s-1ILP\s0 to allow the compiler to
+schedule the floating point instructions together with other instructions.
+Division by zero causes a floating point exception.
+\&\*(L"inv\*(R" uses integer operations to calculate the inverse of the divisor,
+and then multiplies the dividend with the inverse.  This strategy allows
+cse and hoisting of the inverse calculation.  Division by zero calculates
+an unspecified result, but does not trap.
+\&\*(L"inv:minlat\*(R" is a variant of \*(L"inv\*(R" where if no cse / hoisting opportunities
+have been found, or if the entire operation has been hoisted to the same
+place, the last stages of the inverse calculation are intertwined with the
+final multiply to reduce the overall latency, at the expense of using a few
+more instructions, and thus offering fewer scheduling opportunities with
+other code.
+\&\*(L"call\*(R" calls a library function that usually implements the inv:minlat
+strategy.
+This gives high code density for m5\-*media\-nofpu compilations.
+\&\*(L"call2\*(R" uses a different entry point of the same library function, where it
+assumes that a pointer to a lookup table has already been set up, which
+exposes the pointer load to cse / code hoisting optimizations.
+\&\*(L"inv:call\*(R", \*(L"inv:call2\*(R" and \*(L"inv:fp\*(R" all use the \*(L"inv\*(R" algorithm for initial
+code generation, but if the code stays unoptimized, revert to the \*(L"call\*(R",
+\&\*(L"call2\*(R", or \*(L"fp\*(R" strategies, respectively.  Note that the
+potentially-trapping side effect of division by zero is carried by a
+separate instruction, so it is possible that all the integer instructions
+are hoisted out, but the marker for the side effect stays where it is.
+A recombination to fp operations or a call is not possible in that case.
+\&\*(L"inv20u\*(R" and \*(L"inv20l\*(R" are variants of the \*(L"inv:minlat\*(R" strategy.  In the case
+that the inverse calculation was nor separated from the multiply, they speed
+up division where the dividend fits into 20 bits (plus sign where applicable),
+by inserting a test to skip a number of operations in this case; this test
+slows down the case of larger dividends.  inv20u assumes the case of a such
+a small dividend to be unlikely, and inv20l assumes it to be likely.
+.IP "\fB\-maccumulate\-outgoing\-args\fR" 4
+.IX Item "-maccumulate-outgoing-args"
+Reserve space once for outgoing arguments in the function prologue rather 
+than around each call.  Generally beneficial for performance and size.  Also
+needed for unwinding to avoid changing the stack frame around conditional code.
+.IP "\fB\-mdivsi3_libfunc=\fR\fIname\fR" 4
+.IX Item "-mdivsi3_libfunc=name"
+Set the name of the library function used for 32 bit signed division to
+\&\fIname\fR.  This only affect the name used in the call and inv:call
+division strategies, and the compiler will still expect the same
+sets of input/output/clobbered registers as if this option was not present.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use.  This is
+useful when compiling kernel code.  A register range is specified as
+two registers separated by a dash.  Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-madjust\-unroll\fR" 4
+.IX Item "-madjust-unroll"
+Throttle unrolling to avoid thrashing target registers.
+This option only has an effect if the gcc code base supports the
+\&\s-1TARGET_ADJUST_UNROLL_MAX\s0 target hook.
+.IP "\fB\-mindexed\-addressing\fR" 4
+.IX Item "-mindexed-addressing"
+Enable the use of the indexed addressing mode for SHmedia32/SHcompact.
+This is only safe if the hardware and/or \s-1OS\s0 implement 32 bit wrap-around
+semantics for the indexed addressing mode.  The architecture allows the
+implementation of processors with 64 bit \s-1MMU\s0, which the \s-1OS\s0 could use to
+get 32 bit addressing, but since no current hardware implementation supports
+this or any other way to make the indexed addressing mode safe to use in
+the 32 bit \s-1ABI\s0, the default is \-mno\-indexed\-addressing.
+.IP "\fB\-mgettrcost=\fR\fInumber\fR" 4
+.IX Item "-mgettrcost=number"
+Set the cost assumed for the gettr instruction to \fInumber\fR.
+The default is 2 if \fB\-mpt\-fixed\fR is in effect, 100 otherwise.
+.IP "\fB\-mpt\-fixed\fR" 4
+.IX Item "-mpt-fixed"
+Assume pt* instructions won't trap.  This will generally generate better
+scheduled code, but is unsafe on current hardware.  The current architecture
+definition says that ptabs and ptrel trap when the target anded with 3 is 3.
+This has the unintentional effect of making it unsafe to schedule ptabs /
+ptrel before a branch, or hoist it out of a loop.  For example,
+_\|_do_global_ctors, a part of libgcc that runs constructors at program
+startup, calls functions in a list which is delimited by \-1.  With the
+\&\-mpt\-fixed option, the ptabs will be done before testing against \-1.
+That means that all the constructors will be run a bit quicker, but when
+the loop comes to the end of the list, the program crashes because ptabs
+loads \-1 into a target register.  Since this option is unsafe for any
+hardware implementing the current architecture specification, the default
+is \-mno\-pt\-fixed.  Unless the user specifies a specific cost with
+\&\fB\-mgettrcost\fR, \-mno\-pt\-fixed also implies \fB\-mgettrcost=100\fR;
+this deters register allocation using target registers for storing
+ordinary integers.
+.IP "\fB\-minvalid\-symbols\fR" 4
+.IX Item "-minvalid-symbols"
+Assume symbols might be invalid.  Ordinary function symbols generated by
+the compiler will always be valid to load with movi/shori/ptabs or
+movi/shori/ptrel, but with assembler and/or linker tricks it is possible
+to generate symbols that will cause ptabs / ptrel to trap.
+This option is only meaningful when \fB\-mno\-pt\-fixed\fR is in effect.
+It will then prevent cross-basic-block cse, hoisting and most scheduling
+of symbol loads.  The default is \fB\-mno\-invalid\-symbols\fR.
+.PP
+\fISolaris 2 Options\fR
+.IX Subsection "Solaris 2 Options"
+.PP
+These \fB\-m\fR options are supported on Solaris 2:
+.IP "\fB\-mimpure\-text\fR" 4
+.IX Item "-mimpure-text"
+\&\fB\-mimpure\-text\fR, used in addition to \fB\-shared\fR, tells
+the compiler to not pass \fB\-z text\fR to the linker when linking a
+shared object.  Using this option, you can link position-dependent
+code into a shared object.
+.Sp
+\&\fB\-mimpure\-text\fR suppresses the \*(L"relocations remain against
+allocatable but non-writable sections\*(R" linker error message.
+However, the necessary relocations will trigger copy-on-write, and the
+shared object is not actually shared across processes.  Instead of
+using \fB\-mimpure\-text\fR, you should compile all source code with
+\&\fB\-fpic\fR or \fB\-fPIC\fR.
+.PP
+These switches are supported in addition to the above on Solaris 2:
+.IP "\fB\-threads\fR" 4
+.IX Item "-threads"
+Add support for multithreading using the Solaris threads library.  This
+option sets flags for both the preprocessor and linker.  This option does
+not affect the thread safety of object code produced by the compiler or
+that of libraries supplied with it.
+.IP "\fB\-pthreads\fR" 4
+.IX Item "-pthreads"
+Add support for multithreading using the \s-1POSIX\s0 threads library.  This
+option sets flags for both the preprocessor and linker.  This option does
+not affect the thread safety of object code produced  by the compiler or
+that of libraries supplied with it.
+.IP "\fB\-pthread\fR" 4
+.IX Item "-pthread"
+This is a synonym for \fB\-pthreads\fR.
+.PP
+\fI\s-1SPARC\s0 Options\fR
+.IX Subsection "SPARC Options"
+.PP
+These \fB\-m\fR options are supported on the \s-1SPARC:\s0
+.IP "\fB\-mno\-app\-regs\fR" 4
+.IX Item "-mno-app-regs"
+.PD 0
+.IP "\fB\-mapp\-regs\fR" 4
+.IX Item "-mapp-regs"
+.PD
+Specify \fB\-mapp\-regs\fR to generate output using the global registers
+2 through 4, which the \s-1SPARC\s0 \s-1SVR4\s0 \s-1ABI\s0 reserves for applications.  This
+is the default.
+.Sp
+To be fully \s-1SVR4\s0 \s-1ABI\s0 compliant at the cost of some performance loss,
+specify \fB\-mno\-app\-regs\fR.  You should compile libraries and system
+software with this option.
+.IP "\fB\-mfpu\fR" 4
+.IX Item "-mfpu"
+.PD 0
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD
+Generate output containing floating point instructions.  This is the
+default.
+.IP "\fB\-mno\-fpu\fR" 4
+.IX Item "-mno-fpu"
+.PD 0
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD
+Generate output containing library calls for floating point.
+\&\fBWarning:\fR the requisite libraries are not available for all \s-1SPARC\s0
+targets.  Normally the facilities of the machine's usual C compiler are
+used, but this cannot be done directly in cross-compilation.  You must make
+your own arrangements to provide suitable library functions for
+cross-compilation.  The embedded targets \fBsparc\-*\-aout\fR and
+\&\fBsparclite\-*\-*\fR do provide software floating point support.
+.Sp
+\&\fB\-msoft\-float\fR changes the calling convention in the output file;
+therefore, it is only useful if you compile \fIall\fR of a program with
+this option.  In particular, you need to compile \fIlibgcc.a\fR, the
+library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
+this to work.
+.IP "\fB\-mhard\-quad\-float\fR" 4
+.IX Item "-mhard-quad-float"
+Generate output containing quad-word (long double) floating point
+instructions.
+.IP "\fB\-msoft\-quad\-float\fR" 4
+.IX Item "-msoft-quad-float"
+Generate output containing library calls for quad-word (long double)
+floating point instructions.  The functions called are those specified
+in the \s-1SPARC\s0 \s-1ABI\s0.  This is the default.
+.Sp
+As of this writing, there are no \s-1SPARC\s0 implementations that have hardware
+support for the quad-word floating point instructions.  They all invoke
+a trap handler for one of these instructions, and then the trap handler
+emulates the effect of the instruction.  Because of the trap handler overhead,
+this is much slower than calling the \s-1ABI\s0 library routines.  Thus the
+\&\fB\-msoft\-quad\-float\fR option is the default.
+.IP "\fB\-mno\-unaligned\-doubles\fR" 4
+.IX Item "-mno-unaligned-doubles"
+.PD 0
+.IP "\fB\-munaligned\-doubles\fR" 4
+.IX Item "-munaligned-doubles"
+.PD
+Assume that doubles have 8 byte alignment.  This is the default.
+.Sp
+With \fB\-munaligned\-doubles\fR, \s-1GCC\s0 assumes that doubles have 8 byte
+alignment only if they are contained in another type, or if they have an
+absolute address.  Otherwise, it assumes they have 4 byte alignment.
+Specifying this option avoids some rare compatibility problems with code
+generated by other compilers.  It is not the default because it results
+in a performance loss, especially for floating point code.
+.IP "\fB\-mno\-faster\-structs\fR" 4
+.IX Item "-mno-faster-structs"
+.PD 0
+.IP "\fB\-mfaster\-structs\fR" 4
+.IX Item "-mfaster-structs"
+.PD
+With \fB\-mfaster\-structs\fR, the compiler assumes that structures
+should have 8 byte alignment.  This enables the use of pairs of
+\&\f(CW\*(C`ldd\*(C'\fR and \f(CW\*(C`std\*(C'\fR instructions for copies in structure
+assignment, in place of twice as many \f(CW\*(C`ld\*(C'\fR and \f(CW\*(C`st\*(C'\fR pairs.
+However, the use of this changed alignment directly violates the \s-1SPARC\s0
+\&\s-1ABI\s0.  Thus, it's intended only for use on targets where the developer
+acknowledges that their resulting code will not be directly in line with
+the rules of the \s-1ABI\s0.
+.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
+.IX Item "-mcpu=cpu_type"
+Set the instruction set, register set, and instruction scheduling parameters
+for machine type \fIcpu_type\fR.  Supported values for \fIcpu_type\fR are
+\&\fBv7\fR, \fBcypress\fR, \fBv8\fR, \fBsupersparc\fR, \fBhypersparc\fR,
+\&\fBleon\fR, \fBsparclite\fR, \fBf930\fR, \fBf934\fR, \fBsparclite86x\fR,
+\&\fBsparclet\fR, \fBtsc701\fR, \fBv9\fR, \fBultrasparc\fR,
+\&\fBultrasparc3\fR, \fBniagara\fR and \fBniagara2\fR.
+.Sp
+Default instruction scheduling parameters are used for values that select
+an architecture and not an implementation.  These are \fBv7\fR, \fBv8\fR,
+\&\fBsparclite\fR, \fBsparclet\fR, \fBv9\fR.
+.Sp
+Here is a list of each supported architecture and their supported
+implementations.
+.Sp
+.Vb 5
+\&            v7:             cypress
+\&            v8:             supersparc, hypersparc, leon
+\&            sparclite:      f930, f934, sparclite86x
+\&            sparclet:       tsc701
+\&            v9:             ultrasparc, ultrasparc3, niagara, niagara2
+.Ve
+.Sp
+By default (unless configured otherwise), \s-1GCC\s0 generates code for the V7
+variant of the \s-1SPARC\s0 architecture.  With \fB\-mcpu=cypress\fR, the compiler
+additionally optimizes it for the Cypress \s-1CY7C602\s0 chip, as used in the
+SPARCStation/SPARCServer 3xx series.  This is also appropriate for the older
+SPARCStation 1, 2, \s-1IPX\s0 etc.
+.Sp
+With \fB\-mcpu=v8\fR, \s-1GCC\s0 generates code for the V8 variant of the \s-1SPARC\s0
+architecture.  The only difference from V7 code is that the compiler emits
+the integer multiply and integer divide instructions which exist in \s-1SPARC\-V8\s0
+but not in \s-1SPARC\-V7\s0.  With \fB\-mcpu=supersparc\fR, the compiler additionally
+optimizes it for the SuperSPARC chip, as used in the SPARCStation 10, 1000 and
+2000 series.
+.Sp
+With \fB\-mcpu=sparclite\fR, \s-1GCC\s0 generates code for the SPARClite variant of
+the \s-1SPARC\s0 architecture.  This adds the integer multiply, integer divide step
+and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClite but not in \s-1SPARC\-V7\s0.
+With \fB\-mcpu=f930\fR, the compiler additionally optimizes it for the
+Fujitsu \s-1MB86930\s0 chip, which is the original SPARClite, with no \s-1FPU\s0.  With
+\&\fB\-mcpu=f934\fR, the compiler additionally optimizes it for the Fujitsu
+\&\s-1MB86934\s0 chip, which is the more recent SPARClite with \s-1FPU\s0.
+.Sp
+With \fB\-mcpu=sparclet\fR, \s-1GCC\s0 generates code for the SPARClet variant of
+the \s-1SPARC\s0 architecture.  This adds the integer multiply, multiply/accumulate,
+integer divide step and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClet
+but not in \s-1SPARC\-V7\s0.  With \fB\-mcpu=tsc701\fR, the compiler additionally
+optimizes it for the \s-1TEMIC\s0 SPARClet chip.
+.Sp
+With \fB\-mcpu=v9\fR, \s-1GCC\s0 generates code for the V9 variant of the \s-1SPARC\s0
+architecture.  This adds 64\-bit integer and floating-point move instructions,
+3 additional floating-point condition code registers and conditional move
+instructions.  With \fB\-mcpu=ultrasparc\fR, the compiler additionally
+optimizes it for the Sun UltraSPARC I/II/IIi chips.  With
+\&\fB\-mcpu=ultrasparc3\fR, the compiler additionally optimizes it for the
+Sun UltraSPARC III/III+/IIIi/IIIi+/IV/IV+ chips.  With
+\&\fB\-mcpu=niagara\fR, the compiler additionally optimizes it for
+Sun UltraSPARC T1 chips.  With \fB\-mcpu=niagara2\fR, the compiler
+additionally optimizes it for Sun UltraSPARC T2 chips.
+.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
+.IX Item "-mtune=cpu_type"
+Set the instruction scheduling parameters for machine type
+\&\fIcpu_type\fR, but do not set the instruction set or register set that the
+option \fB\-mcpu=\fR\fIcpu_type\fR would.
+.Sp
+The same values for \fB\-mcpu=\fR\fIcpu_type\fR can be used for
+\&\fB\-mtune=\fR\fIcpu_type\fR, but the only useful values are those
+that select a particular \s-1CPU\s0 implementation.  Those are \fBcypress\fR,
+\&\fBsupersparc\fR, \fBhypersparc\fR, \fBleon\fR, \fBf930\fR, \fBf934\fR,
+\&\fBsparclite86x\fR, \fBtsc701\fR, \fBultrasparc\fR, \fBultrasparc3\fR,
+\&\fBniagara\fR, and \fBniagara2\fR.
+.IP "\fB\-mv8plus\fR" 4
+.IX Item "-mv8plus"
+.PD 0
+.IP "\fB\-mno\-v8plus\fR" 4
+.IX Item "-mno-v8plus"
+.PD
+With \fB\-mv8plus\fR, \s-1GCC\s0 generates code for the \s-1SPARC\-V8+\s0 \s-1ABI\s0.  The
+difference from the V8 \s-1ABI\s0 is that the global and out registers are
+considered 64\-bit wide.  This is enabled by default on Solaris in 32\-bit
+mode for all \s-1SPARC\-V9\s0 processors.
+.IP "\fB\-mvis\fR" 4
+.IX Item "-mvis"
+.PD 0
+.IP "\fB\-mno\-vis\fR" 4
+.IX Item "-mno-vis"
+.PD
+With \fB\-mvis\fR, \s-1GCC\s0 generates code that takes advantage of the UltraSPARC
+Visual Instruction Set extensions.  The default is \fB\-mno\-vis\fR.
+.IP "\fB\-mfix\-at697f\fR" 4
+.IX Item "-mfix-at697f"
+Enable the documented workaround for the single erratum of the Atmel \s-1AT697F\s0
+processor (which corresponds to erratum #13 of the \s-1AT697E\s0 processor).
+.PP
+These \fB\-m\fR options are supported in addition to the above
+on \s-1SPARC\-V9\s0 processors in 64\-bit environments:
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+Generate code for a processor running in little-endian mode.  It is only
+available for a few configurations and most notably not on Solaris and Linux.
+.IP "\fB\-m32\fR" 4
+.IX Item "-m32"
+.PD 0
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD
+Generate code for a 32\-bit or 64\-bit environment.
+The 32\-bit environment sets int, long and pointer to 32 bits.
+The 64\-bit environment sets int to 32 bits and long and pointer
+to 64 bits.
+.IP "\fB\-mcmodel=medlow\fR" 4
+.IX Item "-mcmodel=medlow"
+Generate code for the Medium/Low code model: 64\-bit addresses, programs
+must be linked in the low 32 bits of memory.  Programs can be statically
+or dynamically linked.
+.IP "\fB\-mcmodel=medmid\fR" 4
+.IX Item "-mcmodel=medmid"
+Generate code for the Medium/Middle code model: 64\-bit addresses, programs
+must be linked in the low 44 bits of memory, the text and data segments must
+be less than 2GB in size and the data segment must be located within 2GB of
+the text segment.
+.IP "\fB\-mcmodel=medany\fR" 4
+.IX Item "-mcmodel=medany"
+Generate code for the Medium/Anywhere code model: 64\-bit addresses, programs
+may be linked anywhere in memory, the text and data segments must be less
+than 2GB in size and the data segment must be located within 2GB of the
+text segment.
+.IP "\fB\-mcmodel=embmedany\fR" 4
+.IX Item "-mcmodel=embmedany"
+Generate code for the Medium/Anywhere code model for embedded systems:
+64\-bit addresses, the text and data segments must be less than 2GB in
+size, both starting anywhere in memory (determined at link time).  The
+global register \f(CW%g4\fR points to the base of the data segment.  Programs
+are statically linked and \s-1PIC\s0 is not supported.
+.IP "\fB\-mstack\-bias\fR" 4
+.IX Item "-mstack-bias"
+.PD 0
+.IP "\fB\-mno\-stack\-bias\fR" 4
+.IX Item "-mno-stack-bias"
+.PD
+With \fB\-mstack\-bias\fR, \s-1GCC\s0 assumes that the stack pointer, and
+frame pointer if present, are offset by \-2047 which must be added back
+when making stack frame references.  This is the default in 64\-bit mode.
+Otherwise, assume no such offset is present.
+.PP
+\fI\s-1SPU\s0 Options\fR
+.IX Subsection "SPU Options"
+.PP
+These \fB\-m\fR options are supported on the \s-1SPU:\s0
+.IP "\fB\-mwarn\-reloc\fR" 4
+.IX Item "-mwarn-reloc"
+.PD 0
+.IP "\fB\-merror\-reloc\fR" 4
+.IX Item "-merror-reloc"
+.PD
+The loader for \s-1SPU\s0 does not handle dynamic relocations.  By default, \s-1GCC\s0
+will give an error when it generates code that requires a dynamic
+relocation.  \fB\-mno\-error\-reloc\fR disables the error,
+\&\fB\-mwarn\-reloc\fR will generate a warning instead.
+.IP "\fB\-msafe\-dma\fR" 4
+.IX Item "-msafe-dma"
+.PD 0
+.IP "\fB\-munsafe\-dma\fR" 4
+.IX Item "-munsafe-dma"
+.PD
+Instructions which initiate or test completion of \s-1DMA\s0 must not be
+reordered with respect to loads and stores of the memory which is being
+accessed.  Users typically address this problem using the volatile
+keyword, but that can lead to inefficient code in places where the
+memory is known to not change.  Rather than mark the memory as volatile
+we treat the \s-1DMA\s0 instructions as potentially effecting all memory.  With
+\&\fB\-munsafe\-dma\fR users must use the volatile keyword to protect
+memory accesses.
+.IP "\fB\-mbranch\-hints\fR" 4
+.IX Item "-mbranch-hints"
+By default, \s-1GCC\s0 will generate a branch hint instruction to avoid
+pipeline stalls for always taken or probably taken branches.  A hint
+will not be generated closer than 8 instructions away from its branch.
+There is little reason to disable them, except for debugging purposes,
+or to make an object a little bit smaller.
+.IP "\fB\-msmall\-mem\fR" 4
+.IX Item "-msmall-mem"
+.PD 0
+.IP "\fB\-mlarge\-mem\fR" 4
+.IX Item "-mlarge-mem"
+.PD
+By default, \s-1GCC\s0 generates code assuming that addresses are never larger
+than 18 bits.  With \fB\-mlarge\-mem\fR code is generated that assumes
+a full 32 bit address.
+.IP "\fB\-mstdmain\fR" 4
+.IX Item "-mstdmain"
+By default, \s-1GCC\s0 links against startup code that assumes the SPU-style
+main function interface (which has an unconventional parameter list).
+With \fB\-mstdmain\fR, \s-1GCC\s0 will link your program against startup
+code that assumes a C99\-style interface to \f(CW\*(C`main\*(C'\fR, including a
+local copy of \f(CW\*(C`argv\*(C'\fR strings.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use.  This is
+useful when compiling kernel code.  A register range is specified as
+two registers separated by a dash.  Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-mea32\fR" 4
+.IX Item "-mea32"
+.PD 0
+.IP "\fB\-mea64\fR" 4
+.IX Item "-mea64"
+.PD
+Compile code assuming that pointers to the \s-1PPU\s0 address space accessed
+via the \f(CW\*(C`_\|_ea\*(C'\fR named address space qualifier are either 32 or 64
+bits wide.  The default is 32 bits.  As this is an \s-1ABI\s0 changing option,
+all object code in an executable must be compiled with the same setting.
+.IP "\fB\-maddress\-space\-conversion\fR" 4
+.IX Item "-maddress-space-conversion"
+.PD 0
+.IP "\fB\-mno\-address\-space\-conversion\fR" 4
+.IX Item "-mno-address-space-conversion"
+.PD
+Allow/disallow treating the \f(CW\*(C`_\|_ea\*(C'\fR address space as superset
+of the generic address space.  This enables explicit type casts
+between \f(CW\*(C`_\|_ea\*(C'\fR and generic pointer as well as implicit
+conversions of generic pointers to \f(CW\*(C`_\|_ea\*(C'\fR pointers.  The
+default is to allow address space pointer conversions.
+.IP "\fB\-mcache\-size=\fR\fIcache-size\fR" 4
+.IX Item "-mcache-size=cache-size"
+This option controls the version of libgcc that the compiler links to an
+executable and selects a software-managed cache for accessing variables
+in the \f(CW\*(C`_\|_ea\*(C'\fR address space with a particular cache size.  Possible
+options for \fIcache-size\fR are \fB8\fR, \fB16\fR, \fB32\fR, \fB64\fR
+and \fB128\fR.  The default cache size is 64KB.
+.IP "\fB\-matomic\-updates\fR" 4
+.IX Item "-matomic-updates"
+.PD 0
+.IP "\fB\-mno\-atomic\-updates\fR" 4
+.IX Item "-mno-atomic-updates"
+.PD
+This option controls the version of libgcc that the compiler links to an
+executable and selects whether atomic updates to the software-managed
+cache of PPU-side variables are used.  If you use atomic updates, changes
+to a \s-1PPU\s0 variable from \s-1SPU\s0 code using the \f(CW\*(C`_\|_ea\*(C'\fR named address space
+qualifier will not interfere with changes to other \s-1PPU\s0 variables residing
+in the same cache line from \s-1PPU\s0 code.  If you do not use atomic updates,
+such interference may occur; however, writing back cache lines will be
+more efficient.  The default behavior is to use atomic updates.
+.IP "\fB\-mdual\-nops\fR" 4
+.IX Item "-mdual-nops"
+.PD 0
+.IP "\fB\-mdual\-nops=\fR\fIn\fR" 4
+.IX Item "-mdual-nops=n"
+.PD
+By default, \s-1GCC\s0 will insert nops to increase dual issue when it expects
+it to increase performance.  \fIn\fR can be a value from 0 to 10.  A
+smaller \fIn\fR will insert fewer nops.  10 is the default, 0 is the
+same as \fB\-mno\-dual\-nops\fR.  Disabled with \fB\-Os\fR.
+.IP "\fB\-mhint\-max\-nops=\fR\fIn\fR" 4
+.IX Item "-mhint-max-nops=n"
+Maximum number of nops to insert for a branch hint.  A branch hint must
+be at least 8 instructions away from the branch it is effecting.  \s-1GCC\s0
+will insert up to \fIn\fR nops to enforce this, otherwise it will not
+generate the branch hint.
+.IP "\fB\-mhint\-max\-distance=\fR\fIn\fR" 4
+.IX Item "-mhint-max-distance=n"
+The encoding of the branch hint instruction limits the hint to be within
+256 instructions of the branch it is effecting.  By default, \s-1GCC\s0 makes
+sure it is within 125.
+.IP "\fB\-msafe\-hints\fR" 4
+.IX Item "-msafe-hints"
+Work around a hardware bug which causes the \s-1SPU\s0 to stall indefinitely.
+By default, \s-1GCC\s0 will insert the \f(CW\*(C`hbrp\*(C'\fR instruction to make sure
+this stall won't happen.
+.PP
+\fIOptions for System V\fR
+.IX Subsection "Options for System V"
+.PP
+These additional options are available on System V Release 4 for
+compatibility with other compilers on those systems:
+.IP "\fB\-G\fR" 4
+.IX Item "-G"
+Create a shared object.
+It is recommended that \fB\-symbolic\fR or \fB\-shared\fR be used instead.
+.IP "\fB\-Qy\fR" 4
+.IX Item "-Qy"
+Identify the versions of each tool used by the compiler, in a
+\&\f(CW\*(C`.ident\*(C'\fR assembler directive in the output.
+.IP "\fB\-Qn\fR" 4
+.IX Item "-Qn"
+Refrain from adding \f(CW\*(C`.ident\*(C'\fR directives to the output file (this is
+the default).
+.IP "\fB\-YP,\fR\fIdirs\fR" 4
+.IX Item "-YP,dirs"
+Search the directories \fIdirs\fR, and no others, for libraries
+specified with \fB\-l\fR.
+.IP "\fB\-Ym,\fR\fIdir\fR" 4
+.IX Item "-Ym,dir"
+Look in the directory \fIdir\fR to find the M4 preprocessor.
+The assembler uses this option.
+.PP
+\fIV850 Options\fR
+.IX Subsection "V850 Options"
+.PP
+These \fB\-m\fR options are defined for V850 implementations:
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Treat all calls as being far away (near).  If calls are assumed to be
+far away, the compiler will always load the functions address up into a
+register, and call indirect through the pointer.
+.IP "\fB\-mno\-ep\fR" 4
+.IX Item "-mno-ep"
+.PD 0
+.IP "\fB\-mep\fR" 4
+.IX Item "-mep"
+.PD
+Do not optimize (do optimize) basic blocks that use the same index
+pointer 4 or more times to copy pointer into the \f(CW\*(C`ep\*(C'\fR register, and
+use the shorter \f(CW\*(C`sld\*(C'\fR and \f(CW\*(C`sst\*(C'\fR instructions.  The \fB\-mep\fR
+option is on by default if you optimize.
+.IP "\fB\-mno\-prolog\-function\fR" 4
+.IX Item "-mno-prolog-function"
+.PD 0
+.IP "\fB\-mprolog\-function\fR" 4
+.IX Item "-mprolog-function"
+.PD
+Do not use (do use) external functions to save and restore registers
+at the prologue and epilogue of a function.  The external functions
+are slower, but use less code space if more than one function saves
+the same number of registers.  The \fB\-mprolog\-function\fR option
+is on by default if you optimize.
+.IP "\fB\-mspace\fR" 4
+.IX Item "-mspace"
+Try to make the code as small as possible.  At present, this just turns
+on the \fB\-mep\fR and \fB\-mprolog\-function\fR options.
+.IP "\fB\-mtda=\fR\fIn\fR" 4
+.IX Item "-mtda=n"
+Put static or global variables whose size is \fIn\fR bytes or less into
+the tiny data area that register \f(CW\*(C`ep\*(C'\fR points to.  The tiny data
+area can hold up to 256 bytes in total (128 bytes for byte references).
+.IP "\fB\-msda=\fR\fIn\fR" 4
+.IX Item "-msda=n"
+Put static or global variables whose size is \fIn\fR bytes or less into
+the small data area that register \f(CW\*(C`gp\*(C'\fR points to.  The small data
+area can hold up to 64 kilobytes.
+.IP "\fB\-mzda=\fR\fIn\fR" 4
+.IX Item "-mzda=n"
+Put static or global variables whose size is \fIn\fR bytes or less into
+the first 32 kilobytes of memory.
+.IP "\fB\-mv850\fR" 4
+.IX Item "-mv850"
+Specify that the target processor is the V850.
+.IP "\fB\-mbig\-switch\fR" 4
+.IX Item "-mbig-switch"
+Generate code suitable for big switch tables.  Use this option only if
+the assembler/linker complain about out of range branches within a switch
+table.
+.IP "\fB\-mapp\-regs\fR" 4
+.IX Item "-mapp-regs"
+This option will cause r2 and r5 to be used in the code generated by
+the compiler.  This setting is the default.
+.IP "\fB\-mno\-app\-regs\fR" 4
+.IX Item "-mno-app-regs"
+This option will cause r2 and r5 to be treated as fixed registers.
+.IP "\fB\-mv850e2v3\fR" 4
+.IX Item "-mv850e2v3"
+Specify that the target processor is the V850E2V3.  The preprocessor
+constants \fB_\|_v850e2v3_\|_\fR will be defined if
+this option is used.
+.IP "\fB\-mv850e2\fR" 4
+.IX Item "-mv850e2"
+Specify that the target processor is the V850E2.  The preprocessor
+constants \fB_\|_v850e2_\|_\fR will be defined if
+.IP "\fB\-mv850e1\fR" 4
+.IX Item "-mv850e1"
+Specify that the target processor is the V850E1.  The preprocessor
+constants \fB_\|_v850e1_\|_\fR and \fB_\|_v850e_\|_\fR will be defined if
+.IP "\fB\-mv850es\fR" 4
+.IX Item "-mv850es"
+Specify that the target processor is the V850ES.  This is an alias for
+the \fB\-mv850e1\fR option.
+.IP "\fB\-mv850e\fR" 4
+.IX Item "-mv850e"
+Specify that the target processor is the V850E.  The preprocessor
+constant \fB_\|_v850e_\|_\fR will be defined if this option is used.
+.Sp
+If neither \fB\-mv850\fR nor \fB\-mv850e\fR nor \fB\-mv850e1\fR
+nor \fB\-mv850e2\fR nor \fB\-mv850e2v3\fR
+are defined then a default target processor will be chosen and the
+relevant \fB_\|_v850*_\|_\fR preprocessor constant will be defined.
+.Sp
+The preprocessor constants \fB_\|_v850\fR and \fB_\|_v851_\|_\fR are always
+defined, regardless of which processor variant is the target.
+.IP "\fB\-mdisable\-callt\fR" 4
+.IX Item "-mdisable-callt"
+This option will suppress generation of the \s-1CALLT\s0 instruction for the
+v850e, v850e1, v850e2 and v850e2v3 flavors of the v850 architecture.  The default is
+\&\fB\-mno\-disable\-callt\fR which allows the \s-1CALLT\s0 instruction to be used.
+.PP
+\fI\s-1VAX\s0 Options\fR
+.IX Subsection "VAX Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1VAX:\s0
+.IP "\fB\-munix\fR" 4
+.IX Item "-munix"
+Do not output certain jump instructions (\f(CW\*(C`aobleq\*(C'\fR and so on)
+that the Unix assembler for the \s-1VAX\s0 cannot handle across long
+ranges.
+.IP "\fB\-mgnu\fR" 4
+.IX Item "-mgnu"
+Do output those jump instructions, on the assumption that you
+will assemble with the \s-1GNU\s0 assembler.
+.IP "\fB\-mg\fR" 4
+.IX Item "-mg"
+Output code for g\-format floating point numbers instead of d\-format.
+.PP
+\fIVxWorks Options\fR
+.IX Subsection "VxWorks Options"
+.PP
+The options in this section are defined for all VxWorks targets.
+Options specific to the target hardware are listed with the other
+options for that target.
+.IP "\fB\-mrtp\fR" 4
+.IX Item "-mrtp"
+\&\s-1GCC\s0 can generate code for both VxWorks kernels and real time processes
+(RTPs).  This option switches from the former to the latter.  It also
+defines the preprocessor macro \f(CW\*(C`_\|_RTP_\|_\*(C'\fR.
+.IP "\fB\-non\-static\fR" 4
+.IX Item "-non-static"
+Link an \s-1RTP\s0 executable against shared libraries rather than static
+libraries.  The options \fB\-static\fR and \fB\-shared\fR can
+also be used for RTPs; \fB\-static\fR
+is the default.
+.IP "\fB\-Bstatic\fR" 4
+.IX Item "-Bstatic"
+.PD 0
+.IP "\fB\-Bdynamic\fR" 4
+.IX Item "-Bdynamic"
+.PD
+These options are passed down to the linker.  They are defined for
+compatibility with Diab.
+.IP "\fB\-Xbind\-lazy\fR" 4
+.IX Item "-Xbind-lazy"
+Enable lazy binding of function calls.  This option is equivalent to
+\&\fB\-Wl,\-z,now\fR and is defined for compatibility with Diab.
+.IP "\fB\-Xbind\-now\fR" 4
+.IX Item "-Xbind-now"
+Disable lazy binding of function calls.  This option is the default and
+is defined for compatibility with Diab.
+.PP
+\fIx86\-64 Options\fR
+.IX Subsection "x86-64 Options"
+.PP
+These are listed under
+.PP
+\fIXstormy16 Options\fR
+.IX Subsection "Xstormy16 Options"
+.PP
+These options are defined for Xstormy16:
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+Choose startup files and linker script suitable for the simulator.
+.PP
+\fIXtensa Options\fR
+.IX Subsection "Xtensa Options"
+.PP
+These options are supported for Xtensa targets:
+.IP "\fB\-mconst16\fR" 4
+.IX Item "-mconst16"
+.PD 0
+.IP "\fB\-mno\-const16\fR" 4
+.IX Item "-mno-const16"
+.PD
+Enable or disable use of \f(CW\*(C`CONST16\*(C'\fR instructions for loading
+constant values.  The \f(CW\*(C`CONST16\*(C'\fR instruction is currently not a
+standard option from Tensilica.  When enabled, \f(CW\*(C`CONST16\*(C'\fR
+instructions are always used in place of the standard \f(CW\*(C`L32R\*(C'\fR
+instructions.  The use of \f(CW\*(C`CONST16\*(C'\fR is enabled by default only if
+the \f(CW\*(C`L32R\*(C'\fR instruction is not available.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Enable or disable use of fused multiply/add and multiply/subtract
+instructions in the floating-point option.  This has no effect if the
+floating-point option is not also enabled.  Disabling fused multiply/add
+and multiply/subtract instructions forces the compiler to use separate
+instructions for the multiply and add/subtract operations.  This may be
+desirable in some cases where strict \s-1IEEE\s0 754\-compliant results are
+required: the fused multiply add/subtract instructions do not round the
+intermediate result, thereby producing results with \fImore\fR bits of
+precision than specified by the \s-1IEEE\s0 standard.  Disabling fused multiply
+add/subtract instructions also ensures that the program output is not
+sensitive to the compiler's ability to combine multiply and add/subtract
+operations.
+.IP "\fB\-mserialize\-volatile\fR" 4
+.IX Item "-mserialize-volatile"
+.PD 0
+.IP "\fB\-mno\-serialize\-volatile\fR" 4
+.IX Item "-mno-serialize-volatile"
+.PD
+When this option is enabled, \s-1GCC\s0 inserts \f(CW\*(C`MEMW\*(C'\fR instructions before
+\&\f(CW\*(C`volatile\*(C'\fR memory references to guarantee sequential consistency.
+The default is \fB\-mserialize\-volatile\fR.  Use
+\&\fB\-mno\-serialize\-volatile\fR to omit the \f(CW\*(C`MEMW\*(C'\fR instructions.
+.IP "\fB\-mforce\-no\-pic\fR" 4
+.IX Item "-mforce-no-pic"
+For targets, like GNU/Linux, where all user-mode Xtensa code must be
+position-independent code (\s-1PIC\s0), this option disables \s-1PIC\s0 for compiling
+kernel code.
+.IP "\fB\-mtext\-section\-literals\fR" 4
+.IX Item "-mtext-section-literals"
+.PD 0
+.IP "\fB\-mno\-text\-section\-literals\fR" 4
+.IX Item "-mno-text-section-literals"
+.PD
+Control the treatment of literal pools.  The default is
+\&\fB\-mno\-text\-section\-literals\fR, which places literals in a separate
+section in the output file.  This allows the literal pool to be placed
+in a data \s-1RAM/ROM\s0, and it also allows the linker to combine literal
+pools from separate object files to remove redundant literals and
+improve code size.  With \fB\-mtext\-section\-literals\fR, the literals
+are interspersed in the text section in order to keep them as close as
+possible to their references.  This may be necessary for large assembly
+files.
+.IP "\fB\-mtarget\-align\fR" 4
+.IX Item "-mtarget-align"
+.PD 0
+.IP "\fB\-mno\-target\-align\fR" 4
+.IX Item "-mno-target-align"
+.PD
+When this option is enabled, \s-1GCC\s0 instructs the assembler to
+automatically align instructions to reduce branch penalties at the
+expense of some code density.  The assembler attempts to widen density
+instructions to align branch targets and the instructions following call
+instructions.  If there are not enough preceding safe density
+instructions to align a target, no widening will be performed.  The
+default is \fB\-mtarget\-align\fR.  These options do not affect the
+treatment of auto-aligned instructions like \f(CW\*(C`LOOP\*(C'\fR, which the
+assembler will always align, either by widening density instructions or
+by inserting no-op instructions.
+.IP "\fB\-mlongcalls\fR" 4
+.IX Item "-mlongcalls"
+.PD 0
+.IP "\fB\-mno\-longcalls\fR" 4
+.IX Item "-mno-longcalls"
+.PD
+When this option is enabled, \s-1GCC\s0 instructs the assembler to translate
+direct calls to indirect calls unless it can determine that the target
+of a direct call is in the range allowed by the call instruction.  This
+translation typically occurs for calls to functions in other source
+files.  Specifically, the assembler translates a direct \f(CW\*(C`CALL\*(C'\fR
+instruction into an \f(CW\*(C`L32R\*(C'\fR followed by a \f(CW\*(C`CALLX\*(C'\fR instruction.
+The default is \fB\-mno\-longcalls\fR.  This option should be used in
+programs where the call target can potentially be out of range.  This
+option is implemented in the assembler, not the compiler, so the
+assembly code generated by \s-1GCC\s0 will still show direct call
+instructions\-\-\-look at the disassembled object code to see the actual
+instructions.  Note that the assembler will use an indirect call for
+every cross-file call, not just those that really will be out of range.
+.PP
+\fIzSeries Options\fR
+.IX Subsection "zSeries Options"
+.PP
+These are listed under
+.SS "Options for Code Generation Conventions"
+.IX Subsection "Options for Code Generation Conventions"
+These machine-independent options control the interface conventions
+used in code generation.
+.PP
+Most of them have both positive and negative forms; the negative form
+of \fB\-ffoo\fR would be \fB\-fno\-foo\fR.  In the table below, only
+one of the forms is listed\-\-\-the one which is not the default.  You
+can figure out the other form by either removing \fBno\-\fR or adding
+it.
+.IP "\fB\-fbounds\-check\fR" 4
+.IX Item "-fbounds-check"
+For front-ends that support it, generate additional code to check that
+indices used to access arrays are within the declared range.  This is
+currently only supported by the Java and Fortran front-ends, where
+this option defaults to true and false respectively.
+.IP "\fB\-ftrapv\fR" 4
+.IX Item "-ftrapv"
+This option generates traps for signed overflow on addition, subtraction,
+multiplication operations.
+.IP "\fB\-fwrapv\fR" 4
+.IX Item "-fwrapv"
+This option instructs the compiler to assume that signed arithmetic
+overflow of addition, subtraction and multiplication wraps around
+using twos-complement representation.  This flag enables some optimizations
+and disables others.  This option is enabled by default for the Java
+front-end, as required by the Java language specification.
+.IP "\fB\-fexceptions\fR" 4
+.IX Item "-fexceptions"
+Enable exception handling.  Generates extra code needed to propagate
+exceptions.  For some targets, this implies \s-1GCC\s0 will generate frame
+unwind information for all functions, which can produce significant data
+size overhead, although it does not affect execution.  If you do not
+specify this option, \s-1GCC\s0 will enable it by default for languages like
+\&\*(C+ which normally require exception handling, and disable it for
+languages like C that do not normally require it.  However, you may need
+to enable this option when compiling C code that needs to interoperate
+properly with exception handlers written in \*(C+.  You may also wish to
+disable this option if you are compiling older \*(C+ programs that don't
+use exception handling.
+.IP "\fB\-fnon\-call\-exceptions\fR" 4
+.IX Item "-fnon-call-exceptions"
+Generate code that allows trapping instructions to throw exceptions.
+Note that this requires platform-specific runtime support that does
+not exist everywhere.  Moreover, it only allows \fItrapping\fR
+instructions to throw exceptions, i.e. memory references or floating
+point instructions.  It does not allow exceptions to be thrown from
+arbitrary signal handlers such as \f(CW\*(C`SIGALRM\*(C'\fR.
+.IP "\fB\-funwind\-tables\fR" 4
+.IX Item "-funwind-tables"
+Similar to \fB\-fexceptions\fR, except that it will just generate any needed
+static data, but will not affect the generated code in any other way.
+You will normally not enable this option; instead, a language processor
+that needs this handling would enable it on your behalf.
+.IP "\fB\-fasynchronous\-unwind\-tables\fR" 4
+.IX Item "-fasynchronous-unwind-tables"
+Generate unwind table in dwarf2 format, if supported by target machine.  The
+table is exact at each instruction boundary, so it can be used for stack
+unwinding from asynchronous events (such as debugger or garbage collector).
+.IP "\fB\-fpcc\-struct\-return\fR" 4
+.IX Item "-fpcc-struct-return"
+Return \*(L"short\*(R" \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in memory like
+longer ones, rather than in registers.  This convention is less
+efficient, but it has the advantage of allowing intercallability between
+GCC-compiled files and files compiled with other compilers, particularly
+the Portable C Compiler (pcc).
+.Sp
+The precise convention for returning structures in memory depends
+on the target configuration macros.
+.Sp
+Short structures and unions are those whose size and alignment match
+that of some integer type.
+.Sp
+\&\fBWarning:\fR code compiled with the \fB\-fpcc\-struct\-return\fR
+switch is not binary compatible with code compiled with the
+\&\fB\-freg\-struct\-return\fR switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-freg\-struct\-return\fR" 4
+.IX Item "-freg-struct-return"
+Return \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in registers when possible.
+This is more efficient for small structures than
+\&\fB\-fpcc\-struct\-return\fR.
+.Sp
+If you specify neither \fB\-fpcc\-struct\-return\fR nor
+\&\fB\-freg\-struct\-return\fR, \s-1GCC\s0 defaults to whichever convention is
+standard for the target.  If there is no standard convention, \s-1GCC\s0
+defaults to \fB\-fpcc\-struct\-return\fR, except on targets where \s-1GCC\s0 is
+the principal compiler.  In those cases, we can choose the standard, and
+we chose the more efficient register return alternative.
+.Sp
+\&\fBWarning:\fR code compiled with the \fB\-freg\-struct\-return\fR
+switch is not binary compatible with code compiled with the
+\&\fB\-fpcc\-struct\-return\fR switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fshort\-enums\fR" 4
+.IX Item "-fshort-enums"
+Allocate to an \f(CW\*(C`enum\*(C'\fR type only as many bytes as it needs for the
+declared range of possible values.  Specifically, the \f(CW\*(C`enum\*(C'\fR type
+will be equivalent to the smallest integer type which has enough room.
+.Sp
+\&\fBWarning:\fR the \fB\-fshort\-enums\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fshort\-double\fR" 4
+.IX Item "-fshort-double"
+Use the same size for \f(CW\*(C`double\*(C'\fR as for \f(CW\*(C`float\*(C'\fR.
+.Sp
+\&\fBWarning:\fR the \fB\-fshort\-double\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fshort\-wchar\fR" 4
+.IX Item "-fshort-wchar"
+Override the underlying type for \fBwchar_t\fR to be \fBshort
+unsigned int\fR instead of the default for the target.  This option is
+useful for building programs to run under \s-1WINE\s0.
+.Sp
+\&\fBWarning:\fR the \fB\-fshort\-wchar\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fno\-common\fR" 4
+.IX Item "-fno-common"
+In C code, controls the placement of uninitialized global variables.
+Unix C compilers have traditionally permitted multiple definitions of
+such variables in different compilation units by placing the variables
+in a common block.
+This is the behavior specified by \fB\-fcommon\fR, and is the default
+for \s-1GCC\s0 on most targets.
+On the other hand, this behavior is not required by \s-1ISO\s0 C, and on some
+targets may carry a speed or code size penalty on variable references.
+The \fB\-fno\-common\fR option specifies that the compiler should place
+uninitialized global variables in the data section of the object file,
+rather than generating them as common blocks.
+This has the effect that if the same variable is declared
+(without \f(CW\*(C`extern\*(C'\fR) in two different compilations,
+you will get a multiple-definition error when you link them.
+In this case, you must compile with \fB\-fcommon\fR instead.
+Compiling with \fB\-fno\-common\fR is useful on targets for which
+it provides better performance, or if you wish to verify that the
+program will work on other systems which always treat uninitialized
+variable declarations this way.
+.IP "\fB\-fno\-ident\fR" 4
+.IX Item "-fno-ident"
+Ignore the \fB#ident\fR directive.
+.IP "\fB\-finhibit\-size\-directive\fR" 4
+.IX Item "-finhibit-size-directive"
+Don't output a \f(CW\*(C`.size\*(C'\fR assembler directive, or anything else that
+would cause trouble if the function is split in the middle, and the
+two halves are placed at locations far apart in memory.  This option is
+used when compiling \fIcrtstuff.c\fR; you should not need to use it
+for anything else.
+.IP "\fB\-fverbose\-asm\fR" 4
+.IX Item "-fverbose-asm"
+Put extra commentary information in the generated assembly code to
+make it more readable.  This option is generally only of use to those
+who actually need to read the generated assembly code (perhaps while
+debugging the compiler itself).
+.Sp
+\&\fB\-fno\-verbose\-asm\fR, the default, causes the
+extra information to be omitted and is useful when comparing two assembler
+files.
+.IP "\fB\-frecord\-gcc\-switches\fR" 4
+.IX Item "-frecord-gcc-switches"
+This switch causes the command line that was used to invoke the
+compiler to be recorded into the object file that is being created.
+This switch is only implemented on some targets and the exact format
+of the recording is target and binary file format dependent, but it
+usually takes the form of a section containing \s-1ASCII\s0 text.  This
+switch is related to the \fB\-fverbose\-asm\fR switch, but that
+switch only records information in the assembler output file as
+comments, so it never reaches the object file.
+.IP "\fB\-fpic\fR" 4
+.IX Item "-fpic"
+Generate position-independent code (\s-1PIC\s0) suitable for use in a shared
+library, if supported for the target machine.  Such code accesses all
+constant addresses through a global offset table (\s-1GOT\s0).  The dynamic
+loader resolves the \s-1GOT\s0 entries when the program starts (the dynamic
+loader is not part of \s-1GCC\s0; it is part of the operating system).  If
+the \s-1GOT\s0 size for the linked executable exceeds a machine-specific
+maximum size, you get an error message from the linker indicating that
+\&\fB\-fpic\fR does not work; in that case, recompile with \fB\-fPIC\fR
+instead.  (These maximums are 8k on the \s-1SPARC\s0 and 32k
+on the m68k and \s-1RS/6000\s0.  The 386 has no such limit.)
+.Sp
+Position-independent code requires special support, and therefore works
+only on certain machines.  For the 386, \s-1GCC\s0 supports \s-1PIC\s0 for System V
+but not for the Sun 386i.  Code generated for the \s-1IBM\s0 \s-1RS/6000\s0 is always
+position-independent.
+.Sp
+When this flag is set, the macros \f(CW\*(C`_\|_pic_\|_\*(C'\fR and \f(CW\*(C`_\|_PIC_\|_\*(C'\fR
+are defined to 1.
+.IP "\fB\-fPIC\fR" 4
+.IX Item "-fPIC"
+If supported for the target machine, emit position-independent code,
+suitable for dynamic linking and avoiding any limit on the size of the
+global offset table.  This option makes a difference on the m68k,
+PowerPC and \s-1SPARC\s0.
+.Sp
+Position-independent code requires special support, and therefore works
+only on certain machines.
+.Sp
+When this flag is set, the macros \f(CW\*(C`_\|_pic_\|_\*(C'\fR and \f(CW\*(C`_\|_PIC_\|_\*(C'\fR
+are defined to 2.
+.IP "\fB\-fpie\fR" 4
+.IX Item "-fpie"
+.PD 0
+.IP "\fB\-fPIE\fR" 4
+.IX Item "-fPIE"
+.PD
+These options are similar to \fB\-fpic\fR and \fB\-fPIC\fR, but
+generated position independent code can be only linked into executables.
+Usually these options are used when \fB\-pie\fR \s-1GCC\s0 option will be
+used during linking.
+.Sp
+\&\fB\-fpie\fR and \fB\-fPIE\fR both define the macros
+\&\f(CW\*(C`_\|_pie_\|_\*(C'\fR and \f(CW\*(C`_\|_PIE_\|_\*(C'\fR.  The macros have the value 1
+for \fB\-fpie\fR and 2 for \fB\-fPIE\fR.
+.IP "\fB\-fno\-jump\-tables\fR" 4
+.IX Item "-fno-jump-tables"
+Do not use jump tables for switch statements even where it would be
+more efficient than other code generation strategies.  This option is
+of use in conjunction with \fB\-fpic\fR or \fB\-fPIC\fR for
+building code which forms part of a dynamic linker and cannot
+reference the address of a jump table.  On some targets, jump tables
+do not require a \s-1GOT\s0 and this option is not needed.
+.IP "\fB\-ffixed\-\fR\fIreg\fR" 4
+.IX Item "-ffixed-reg"
+Treat the register named \fIreg\fR as a fixed register; generated code
+should never refer to it (except perhaps as a stack pointer, frame
+pointer or in some other fixed role).
+.Sp
+\&\fIreg\fR must be the name of a register.  The register names accepted
+are machine-specific and are defined in the \f(CW\*(C`REGISTER_NAMES\*(C'\fR
+macro in the machine description macro file.
+.Sp
+This flag does not have a negative form, because it specifies a
+three-way choice.
+.IP "\fB\-fcall\-used\-\fR\fIreg\fR" 4
+.IX Item "-fcall-used-reg"
+Treat the register named \fIreg\fR as an allocable register that is
+clobbered by function calls.  It may be allocated for temporaries or
+variables that do not live across a call.  Functions compiled this way
+will not save and restore the register \fIreg\fR.
+.Sp
+It is an error to used this flag with the frame pointer or stack pointer.
+Use of this flag for other registers that have fixed pervasive roles in
+the machine's execution model will produce disastrous results.
+.Sp
+This flag does not have a negative form, because it specifies a
+three-way choice.
+.IP "\fB\-fcall\-saved\-\fR\fIreg\fR" 4
+.IX Item "-fcall-saved-reg"
+Treat the register named \fIreg\fR as an allocable register saved by
+functions.  It may be allocated even for temporaries or variables that
+live across a call.  Functions compiled this way will save and restore
+the register \fIreg\fR if they use it.
+.Sp
+It is an error to used this flag with the frame pointer or stack pointer.
+Use of this flag for other registers that have fixed pervasive roles in
+the machine's execution model will produce disastrous results.
+.Sp
+A different sort of disaster will result from the use of this flag for
+a register in which function values may be returned.
+.Sp
+This flag does not have a negative form, because it specifies a
+three-way choice.
+.IP "\fB\-fpack\-struct[=\fR\fIn\fR\fB]\fR" 4
+.IX Item "-fpack-struct[=n]"
+Without a value specified, pack all structure members together without
+holes.  When a value is specified (which must be a small power of two), pack
+structure members according to this value, representing the maximum
+alignment (that is, objects with default alignment requirements larger than
+this will be output potentially unaligned at the next fitting location.
+.Sp
+\&\fBWarning:\fR the \fB\-fpack\-struct\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Additionally, it makes the code suboptimal.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-finstrument\-functions\fR" 4
+.IX Item "-finstrument-functions"
+Generate instrumentation calls for entry and exit to functions.  Just
+after function entry and just before function exit, the following
+profiling functions will be called with the address of the current
+function and its call site.  (On some platforms,
+\&\f(CW\*(C`_\|_builtin_return_address\*(C'\fR does not work beyond the current
+function, so the call site information may not be available to the
+profiling functions otherwise.)
+.Sp
+.Vb 4
+\&        void _\|_cyg_profile_func_enter (void *this_fn,
+\&                                       void *call_site);
+\&        void _\|_cyg_profile_func_exit  (void *this_fn,
+\&                                       void *call_site);
+.Ve
+.Sp
+The first argument is the address of the start of the current function,
+which may be looked up exactly in the symbol table.
+.Sp
+This instrumentation is also done for functions expanded inline in other
+functions.  The profiling calls will indicate where, conceptually, the
+inline function is entered and exited.  This means that addressable
+versions of such functions must be available.  If all your uses of a
+function are expanded inline, this may mean an additional expansion of
+code size.  If you use \fBextern inline\fR in your C code, an
+addressable version of such functions must be provided.  (This is
+normally the case anyways, but if you get lucky and the optimizer always
+expands the functions inline, you might have gotten away without
+providing static copies.)
+.Sp
+A function may be given the attribute \f(CW\*(C`no_instrument_function\*(C'\fR, in
+which case this instrumentation will not be done.  This can be used, for
+example, for the profiling functions listed above, high-priority
+interrupt routines, and any functions from which the profiling functions
+cannot safely be called (perhaps signal handlers, if the profiling
+routines generate output or allocate memory).
+.IP "\fB\-finstrument\-functions\-exclude\-file\-list=\fR\fIfile\fR\fB,\fR\fIfile\fR\fB,...\fR" 4
+.IX Item "-finstrument-functions-exclude-file-list=file,file,..."
+Set the list of functions that are excluded from instrumentation (see
+the description of \f(CW\*(C`\-finstrument\-functions\*(C'\fR).  If the file that
+contains a function definition matches with one of \fIfile\fR, then
+that function is not instrumented.  The match is done on substrings:
+if the \fIfile\fR parameter is a substring of the file name, it is
+considered to be a match.
+.Sp
+For example:
+.Sp
+.Vb 1
+\&        \-finstrument\-functions\-exclude\-file\-list=/bits/stl,include/sys
+.Ve
+.Sp
+will exclude any inline function defined in files whose pathnames
+contain \f(CW\*(C`/bits/stl\*(C'\fR or \f(CW\*(C`include/sys\*(C'\fR.
+.Sp
+If, for some reason, you want to include letter \f(CW\*(Aq,\*(Aq\fR in one of
+\&\fIsym\fR, write \f(CW\*(Aq,\*(Aq\fR. For example,
+\&\f(CW\*(C`\-finstrument\-functions\-exclude\-file\-list=\*(Aq,,tmp\*(Aq\*(C'\fR
+(note the single quote surrounding the option).
+.IP "\fB\-finstrument\-functions\-exclude\-function\-list=\fR\fIsym\fR\fB,\fR\fIsym\fR\fB,...\fR" 4
+.IX Item "-finstrument-functions-exclude-function-list=sym,sym,..."
+This is similar to \f(CW\*(C`\-finstrument\-functions\-exclude\-file\-list\*(C'\fR,
+but this option sets the list of function names to be excluded from
+instrumentation.  The function name to be matched is its user-visible
+name, such as \f(CW\*(C`vector<int> blah(const vector<int> &)\*(C'\fR, not the
+internal mangled name (e.g., \f(CW\*(C`_Z4blahRSt6vectorIiSaIiEE\*(C'\fR).  The
+match is done on substrings: if the \fIsym\fR parameter is a substring
+of the function name, it is considered to be a match.  For C99 and \*(C+
+extended identifiers, the function name must be given in \s-1UTF\-8\s0, not
+using universal character names.
+.IP "\fB\-fstack\-check\fR" 4
+.IX Item "-fstack-check"
+Generate code to verify that you do not go beyond the boundary of the
+stack.  You should specify this flag if you are running in an
+environment with multiple threads, but only rarely need to specify it in
+a single-threaded environment since stack overflow is automatically
+detected on nearly all systems if there is only one stack.
+.Sp
+Note that this switch does not actually cause checking to be done; the
+operating system or the language runtime must do that.  The switch causes
+generation of code to ensure that they see the stack being extended.
+.Sp
+You can additionally specify a string parameter: \f(CW\*(C`no\*(C'\fR means no
+checking, \f(CW\*(C`generic\*(C'\fR means force the use of old-style checking,
+\&\f(CW\*(C`specific\*(C'\fR means use the best checking method and is equivalent
+to bare \fB\-fstack\-check\fR.
+.Sp
+Old-style checking is a generic mechanism that requires no specific
+target support in the compiler but comes with the following drawbacks:
+.RS 4
+.IP "1." 4
+Modified allocation strategy for large objects: they will always be
+allocated dynamically if their size exceeds a fixed threshold.
+.IP "2." 4
+Fixed limit on the size of the static frame of functions: when it is
+topped by a particular function, stack checking is not reliable and
+a warning is issued by the compiler.
+.IP "3." 4
+Inefficiency: because of both the modified allocation strategy and the
+generic implementation, the performances of the code are hampered.
+.RE
+.RS 4
+.Sp
+Note that old-style stack checking is also the fallback method for
+\&\f(CW\*(C`specific\*(C'\fR if no target support has been added in the compiler.
+.RE
+.IP "\fB\-fstack\-limit\-register=\fR\fIreg\fR" 4
+.IX Item "-fstack-limit-register=reg"
+.PD 0
+.IP "\fB\-fstack\-limit\-symbol=\fR\fIsym\fR" 4
+.IX Item "-fstack-limit-symbol=sym"
+.IP "\fB\-fno\-stack\-limit\fR" 4
+.IX Item "-fno-stack-limit"
+.PD
+Generate code to ensure that the stack does not grow beyond a certain value,
+either the value of a register or the address of a symbol.  If the stack
+would grow beyond the value, a signal is raised.  For most targets,
+the signal is raised before the stack overruns the boundary, so
+it is possible to catch the signal without taking special precautions.
+.Sp
+For instance, if the stack starts at absolute address \fB0x80000000\fR
+and grows downwards, you can use the flags
+\&\fB\-fstack\-limit\-symbol=_\|_stack_limit\fR and
+\&\fB\-Wl,\-\-defsym,_\|_stack_limit=0x7ffe0000\fR to enforce a stack limit
+of 128KB.  Note that this may only work with the \s-1GNU\s0 linker.
+.IP "\fB\-fsplit\-stack\fR" 4
+.IX Item "-fsplit-stack"
+Generate code to automatically split the stack before it overflows.
+The resulting program has a discontiguous stack which can only
+overflow if the program is unable to allocate any more memory.  This
+is most useful when running threaded programs, as it is no longer
+necessary to calculate a good stack size to use for each thread.  This
+is currently only implemented for the i386 and x86_64 backends running
+GNU/Linux.
+.Sp
+When code compiled with \fB\-fsplit\-stack\fR calls code compiled
+without \fB\-fsplit\-stack\fR, there may not be much stack space
+available for the latter code to run.  If compiling all code,
+including library code, with \fB\-fsplit\-stack\fR is not an option,
+then the linker can fix up these calls so that the code compiled
+without \fB\-fsplit\-stack\fR always has a large stack.  Support for
+this is implemented in the gold linker in \s-1GNU\s0 binutils release 2.21
+and later.
+.IP "\fB\-fleading\-underscore\fR" 4
+.IX Item "-fleading-underscore"
+This option and its counterpart, \fB\-fno\-leading\-underscore\fR, forcibly
+change the way C symbols are represented in the object file.  One use
+is to help link with legacy assembly code.
+.Sp
+\&\fBWarning:\fR the \fB\-fleading\-underscore\fR switch causes \s-1GCC\s0 to
+generate code that is not binary compatible with code generated without that
+switch.  Use it to conform to a non-default application binary interface.
+Not all targets provide complete support for this switch.
+.IP "\fB\-ftls\-model=\fR\fImodel\fR" 4
+.IX Item "-ftls-model=model"
+Alter the thread-local storage model to be used.
+The \fImodel\fR argument should be one of \f(CW\*(C`global\-dynamic\*(C'\fR,
+\&\f(CW\*(C`local\-dynamic\*(C'\fR, \f(CW\*(C`initial\-exec\*(C'\fR or \f(CW\*(C`local\-exec\*(C'\fR.
+.Sp
+The default without \fB\-fpic\fR is \f(CW\*(C`initial\-exec\*(C'\fR; with
+\&\fB\-fpic\fR the default is \f(CW\*(C`global\-dynamic\*(C'\fR.
+.IP "\fB\-fvisibility=\fR\fIdefault|internal|hidden|protected\fR" 4
+.IX Item "-fvisibility=default|internal|hidden|protected"
+Set the default \s-1ELF\s0 image symbol visibility to the specified option\-\-\-all
+symbols will be marked with this unless overridden within the code.
+Using this feature can very substantially improve linking and
+load times of shared object libraries, produce more optimized
+code, provide near-perfect \s-1API\s0 export and prevent symbol clashes.
+It is \fBstrongly\fR recommended that you use this in any shared objects
+you distribute.
+.Sp
+Despite the nomenclature, \f(CW\*(C`default\*(C'\fR always means public; i.e.,
+available to be linked against from outside the shared object.
+\&\f(CW\*(C`protected\*(C'\fR and \f(CW\*(C`internal\*(C'\fR are pretty useless in real-world
+usage so the only other commonly used option will be \f(CW\*(C`hidden\*(C'\fR.
+The default if \fB\-fvisibility\fR isn't specified is
+\&\f(CW\*(C`default\*(C'\fR, i.e., make every
+symbol public\-\-\-this causes the same behavior as previous versions of
+\&\s-1GCC\s0.
+.Sp
+A good explanation of the benefits offered by ensuring \s-1ELF\s0
+symbols have the correct visibility is given by \*(L"How To Write
+Shared Libraries\*(R" by Ulrich Drepper (which can be found at
+<\fBhttp://people.redhat.com/~drepper/\fR>)\-\-\-however a superior
+solution made possible by this option to marking things hidden when
+the default is public is to make the default hidden and mark things
+public.  This is the norm with \s-1DLL\s0's on Windows and with \fB\-fvisibility=hidden\fR
+and \f(CW\*(C`_\|_attribute_\|_ ((visibility("default")))\*(C'\fR instead of
+\&\f(CW\*(C`_\|_declspec(dllexport)\*(C'\fR you get almost identical semantics with
+identical syntax.  This is a great boon to those working with
+cross-platform projects.
+.Sp
+For those adding visibility support to existing code, you may find
+\&\fB#pragma \s-1GCC\s0 visibility\fR of use.  This works by you enclosing
+the declarations you wish to set visibility for with (for example)
+\&\fB#pragma \s-1GCC\s0 visibility push(hidden)\fR and
+\&\fB#pragma \s-1GCC\s0 visibility pop\fR.
+Bear in mind that symbol visibility should be viewed \fBas
+part of the \s-1API\s0 interface contract\fR and thus all new code should
+always specify visibility when it is not the default; i.e., declarations
+only for use within the local \s-1DSO\s0 should \fBalways\fR be marked explicitly
+as hidden as so to avoid \s-1PLT\s0 indirection overheads\-\-\-making this
+abundantly clear also aids readability and self-documentation of the code.
+Note that due to \s-1ISO\s0 \*(C+ specification requirements, operator new and
+operator delete must always be of default visibility.
+.Sp
+Be aware that headers from outside your project, in particular system
+headers and headers from any other library you use, may not be
+expecting to be compiled with visibility other than the default.  You
+may need to explicitly say \fB#pragma \s-1GCC\s0 visibility push(default)\fR
+before including any such headers.
+.Sp
+\&\fBextern\fR declarations are not affected by \fB\-fvisibility\fR, so
+a lot of code can be recompiled with \fB\-fvisibility=hidden\fR with
+no modifications.  However, this means that calls to \fBextern\fR
+functions with no explicit visibility will use the \s-1PLT\s0, so it is more
+effective to use \fB_\|_attribute ((visibility))\fR and/or
+\&\fB#pragma \s-1GCC\s0 visibility\fR to tell the compiler which \fBextern\fR
+declarations should be treated as hidden.
+.Sp
+Note that \fB\-fvisibility\fR does affect \*(C+ vague linkage
+entities. This means that, for instance, an exception class that will
+be thrown between DSOs must be explicitly marked with default
+visibility so that the \fBtype_info\fR nodes will be unified between
+the DSOs.
+.Sp
+An overview of these techniques, their benefits and how to use them
+is at <\fBhttp://gcc.gnu.org/wiki/Visibility\fR>.
+.IP "\fB\-fstrict\-volatile\-bitfields\fR" 4
+.IX Item "-fstrict-volatile-bitfields"
+This option should be used if accesses to volatile bitfields (or other
+structure fields, although the compiler usually honors those types
+anyway) should use a single access of the width of the
+field's type, aligned to a natural alignment if possible.  For
+example, targets with memory-mapped peripheral registers might require
+all such accesses to be 16 bits wide; with this flag the user could
+declare all peripheral bitfields as \*(L"unsigned short\*(R" (assuming short
+is 16 bits on these targets) to force \s-1GCC\s0 to use 16 bit accesses
+instead of, perhaps, a more efficient 32 bit access.
+.Sp
+If this option is disabled, the compiler will use the most efficient
+instruction.  In the previous example, that might be a 32\-bit load
+instruction, even though that will access bytes that do not contain
+any portion of the bitfield, or memory-mapped registers unrelated to
+the one being updated.
+.Sp
+If the target requires strict alignment, and honoring the field
+type would require violating this alignment, a warning is issued.
+If the field has \f(CW\*(C`packed\*(C'\fR attribute, the access is done without
+honoring the field type.  If the field doesn't have \f(CW\*(C`packed\*(C'\fR
+attribute, the access is done honoring the field type.  In both cases,
+\&\s-1GCC\s0 assumes that the user knows something about the target hardware
+that it is unaware of.
+.Sp
+The default value of this option is determined by the application binary
+interface for the target processor.
+.SH "ENVIRONMENT"
+.IX Header "ENVIRONMENT"
+This section describes several environment variables that affect how \s-1GCC\s0
+operates.  Some of them work by specifying directories or prefixes to use
+when searching for various kinds of files.  Some are used to specify other
+aspects of the compilation environment.
+.PP
+Note that you can also specify places to search using options such as
+\&\fB\-B\fR, \fB\-I\fR and \fB\-L\fR.  These
+take precedence over places specified using environment variables, which
+in turn take precedence over those specified by the configuration of \s-1GCC\s0.
+.IP "\fB\s-1LANG\s0\fR" 4
+.IX Item "LANG"
+.PD 0
+.IP "\fB\s-1LC_CTYPE\s0\fR" 4
+.IX Item "LC_CTYPE"
+.IP "\fB\s-1LC_MESSAGES\s0\fR" 4
+.IX Item "LC_MESSAGES"
+.IP "\fB\s-1LC_ALL\s0\fR" 4
+.IX Item "LC_ALL"
+.PD
+These environment variables control the way that \s-1GCC\s0 uses
+localization information that allow \s-1GCC\s0 to work with different
+national conventions.  \s-1GCC\s0 inspects the locale categories
+\&\fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR if it has been configured to do
+so.  These locale categories can be set to any value supported by your
+installation.  A typical value is \fBen_GB.UTF\-8\fR for English in the United
+Kingdom encoded in \s-1UTF\-8\s0.
+.Sp
+The \fB\s-1LC_CTYPE\s0\fR environment variable specifies character
+classification.  \s-1GCC\s0 uses it to determine the character boundaries in
+a string; this is needed for some multibyte encodings that contain quote
+and escape characters that would otherwise be interpreted as a string
+end or escape.
+.Sp
+The \fB\s-1LC_MESSAGES\s0\fR environment variable specifies the language to
+use in diagnostic messages.
+.Sp
+If the \fB\s-1LC_ALL\s0\fR environment variable is set, it overrides the value
+of \fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR; otherwise, \fB\s-1LC_CTYPE\s0\fR
+and \fB\s-1LC_MESSAGES\s0\fR default to the value of the \fB\s-1LANG\s0\fR
+environment variable.  If none of these variables are set, \s-1GCC\s0
+defaults to traditional C English behavior.
+.IP "\fB\s-1TMPDIR\s0\fR" 4
+.IX Item "TMPDIR"
+If \fB\s-1TMPDIR\s0\fR is set, it specifies the directory to use for temporary
+files.  \s-1GCC\s0 uses temporary files to hold the output of one stage of
+compilation which is to be used as input to the next stage: for example,
+the output of the preprocessor, which is the input to the compiler
+proper.
+.IP "\fB\s-1GCC_EXEC_PREFIX\s0\fR" 4
+.IX Item "GCC_EXEC_PREFIX"
+If \fB\s-1GCC_EXEC_PREFIX\s0\fR is set, it specifies a prefix to use in the
+names of the subprograms executed by the compiler.  No slash is added
+when this prefix is combined with the name of a subprogram, but you can
+specify a prefix that ends with a slash if you wish.
+.Sp
+If \fB\s-1GCC_EXEC_PREFIX\s0\fR is not set, \s-1GCC\s0 will attempt to figure out
+an appropriate prefix to use based on the pathname it was invoked with.
+.Sp
+If \s-1GCC\s0 cannot find the subprogram using the specified prefix, it
+tries looking in the usual places for the subprogram.
+.Sp
+The default value of \fB\s-1GCC_EXEC_PREFIX\s0\fR is
+\&\fI\fIprefix\fI/lib/gcc/\fR where \fIprefix\fR is the prefix to
+the installed compiler. In many cases \fIprefix\fR is the value
+of \f(CW\*(C`prefix\*(C'\fR when you ran the \fIconfigure\fR script.
+.Sp
+Other prefixes specified with \fB\-B\fR take precedence over this prefix.
+.Sp
+This prefix is also used for finding files such as \fIcrt0.o\fR that are
+used for linking.
+.Sp
+In addition, the prefix is used in an unusual way in finding the
+directories to search for header files.  For each of the standard
+directories whose name normally begins with \fB/usr/local/lib/gcc\fR
+(more precisely, with the value of \fB\s-1GCC_INCLUDE_DIR\s0\fR), \s-1GCC\s0 tries
+replacing that beginning with the specified prefix to produce an
+alternate directory name.  Thus, with \fB\-Bfoo/\fR, \s-1GCC\s0 will search
+\&\fIfoo/bar\fR where it would normally search \fI/usr/local/lib/bar\fR.
+These alternate directories are searched first; the standard directories
+come next. If a standard directory begins with the configured
+\&\fIprefix\fR then the value of \fIprefix\fR is replaced by
+\&\fB\s-1GCC_EXEC_PREFIX\s0\fR when looking for header files.
+.IP "\fB\s-1COMPILER_PATH\s0\fR" 4
+.IX Item "COMPILER_PATH"
+The value of \fB\s-1COMPILER_PATH\s0\fR is a colon-separated list of
+directories, much like \fB\s-1PATH\s0\fR.  \s-1GCC\s0 tries the directories thus
+specified when searching for subprograms, if it can't find the
+subprograms using \fB\s-1GCC_EXEC_PREFIX\s0\fR.
+.IP "\fB\s-1LIBRARY_PATH\s0\fR" 4
+.IX Item "LIBRARY_PATH"
+The value of \fB\s-1LIBRARY_PATH\s0\fR is a colon-separated list of
+directories, much like \fB\s-1PATH\s0\fR.  When configured as a native compiler,
+\&\s-1GCC\s0 tries the directories thus specified when searching for special
+linker files, if it can't find them using \fB\s-1GCC_EXEC_PREFIX\s0\fR.  Linking
+using \s-1GCC\s0 also uses these directories when searching for ordinary
+libraries for the \fB\-l\fR option (but directories specified with
+\&\fB\-L\fR come first).
+.IP "\fB\s-1LANG\s0\fR" 4
+.IX Item "LANG"
+This variable is used to pass locale information to the compiler.  One way in
+which this information is used is to determine the character set to be used
+when character literals, string literals and comments are parsed in C and \*(C+.
+When the compiler is configured to allow multibyte characters,
+the following values for \fB\s-1LANG\s0\fR are recognized:
+.RS 4
+.IP "\fBC\-JIS\fR" 4
+.IX Item "C-JIS"
+Recognize \s-1JIS\s0 characters.
+.IP "\fBC\-SJIS\fR" 4
+.IX Item "C-SJIS"
+Recognize \s-1SJIS\s0 characters.
+.IP "\fBC\-EUCJP\fR" 4
+.IX Item "C-EUCJP"
+Recognize \s-1EUCJP\s0 characters.
+.RE
+.RS 4
+.Sp
+If \fB\s-1LANG\s0\fR is not defined, or if it has some other value, then the
+compiler will use mblen and mbtowc as defined by the default locale to
+recognize and translate multibyte characters.
+.RE
+.PP
+Some additional environments variables affect the behavior of the
+preprocessor.
+.IP "\fB\s-1CPATH\s0\fR" 4
+.IX Item "CPATH"
+.PD 0
+.IP "\fBC_INCLUDE_PATH\fR" 4
+.IX Item "C_INCLUDE_PATH"
+.IP "\fB\s-1CPLUS_INCLUDE_PATH\s0\fR" 4
+.IX Item "CPLUS_INCLUDE_PATH"
+.IP "\fB\s-1OBJC_INCLUDE_PATH\s0\fR" 4
+.IX Item "OBJC_INCLUDE_PATH"
+.PD
+Each variable's value is a list of directories separated by a special
+character, much like \fB\s-1PATH\s0\fR, in which to look for header files.
+The special character, \f(CW\*(C`PATH_SEPARATOR\*(C'\fR, is target-dependent and
+determined at \s-1GCC\s0 build time.  For Microsoft Windows-based targets it is a
+semicolon, and for almost all other targets it is a colon.
+.Sp
+\&\fB\s-1CPATH\s0\fR specifies a list of directories to be searched as if
+specified with \fB\-I\fR, but after any paths given with \fB\-I\fR
+options on the command line.  This environment variable is used
+regardless of which language is being preprocessed.
+.Sp
+The remaining environment variables apply only when preprocessing the
+particular language indicated.  Each specifies a list of directories
+to be searched as if specified with \fB\-isystem\fR, but after any
+paths given with \fB\-isystem\fR options on the command line.
+.Sp
+In all these variables, an empty element instructs the compiler to
+search its current working directory.  Empty elements can appear at the
+beginning or end of a path.  For instance, if the value of
+\&\fB\s-1CPATH\s0\fR is \f(CW\*(C`:/special/include\*(C'\fR, that has the same
+effect as \fB\-I.\ \-I/special/include\fR.
+.IP "\fB\s-1DEPENDENCIES_OUTPUT\s0\fR" 4
+.IX Item "DEPENDENCIES_OUTPUT"
+If this variable is set, its value specifies how to output
+dependencies for Make based on the non-system header files processed
+by the compiler.  System header files are ignored in the dependency
+output.
+.Sp
+The value of \fB\s-1DEPENDENCIES_OUTPUT\s0\fR can be just a file name, in
+which case the Make rules are written to that file, guessing the target
+name from the source file name.  Or the value can have the form
+\&\fIfile\fR\fB \fR\fItarget\fR, in which case the rules are written to
+file \fIfile\fR using \fItarget\fR as the target name.
+.Sp
+In other words, this environment variable is equivalent to combining
+the options \fB\-MM\fR and \fB\-MF\fR,
+with an optional \fB\-MT\fR switch too.
+.IP "\fB\s-1SUNPRO_DEPENDENCIES\s0\fR" 4
+.IX Item "SUNPRO_DEPENDENCIES"
+This variable is the same as \fB\s-1DEPENDENCIES_OUTPUT\s0\fR (see above),
+except that system header files are not ignored, so it implies
+\&\fB\-M\fR rather than \fB\-MM\fR.  However, the dependence on the
+main input file is omitted.
+.SH "BUGS"
+.IX Header "BUGS"
+For instructions on reporting bugs, see
+<\fBhttp://gcc.gnu.org/bugs.html\fR>.
+.SH "FOOTNOTES"
+.IX Header "FOOTNOTES"
+.IP "1." 4
+On some systems, \fBgcc \-shared\fR
+needs to build supplementary stub code for constructors to work.  On
+multi-libbed systems, \fBgcc \-shared\fR must select the correct support
+libraries to link against.  Failing to supply the correct flags may lead
+to subtle defects.  Supplying them in cases where they are not necessary
+is innocuous.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
+\&\fIcpp\fR\|(1), \fIgcov\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), \fIgdb\fR\|(1), \fIadb\fR\|(1), \fIdbx\fR\|(1), \fIsdb\fR\|(1)
+and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIas\fR,
+\&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
+.SH "AUTHOR"
+.IX Header "AUTHOR"
+See the Info entry for \fBgcc\fR, or
+<\fBhttp://gcc.gnu.org/onlinedocs/gcc/Contributors.html\fR>,
+for contributors to \s-1GCC\s0.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
+Free Software\*(R", the Front-Cover texts being (a) (see below), and with
+the Back-Cover Texts being (b) (see below).  A copy of the license is
+included in the \fIgfdl\fR\|(7) man page.
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\&     A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\&     You have freedom to copy and modify this GNU Manual, like GNU
+\&     software.  Copies published by the Free Software Foundation raise
+\&     funds for GNU development.
+.Ve
diff --git a/gcc/doc/gc-analyze.1 b/gcc/doc/gc-analyze.1
new file mode 100644
index 000000000..85bae8ed1
--- /dev/null
+++ b/gcc/doc/gc-analyze.1
@@ -0,0 +1,222 @@
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+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
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+.el       .ds Aq '
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+.\" If the F register is turned on, we'll generate index entries on stderr for
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+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
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+.    ds #F .3m
+.    ds #[ \f1
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+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
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+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
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+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GC-ANALYZE 1"
+.TH GC-ANALYZE 1 "2013-04-12" "gcc-4.6.4" "GNU"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+gc\-analyze \- Analyze Garbage Collector (GC) memory dumps
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+\&\fBgc-analyze\fR [\fB\s-1OPTION\s0\fR] ... [\fIfile\fR]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBgc-analyze\fR prints an analysis of a \s-1GC\s0 memory dump to
+standard out.
+.PP
+The memory dumps may be created by calling
+\&\f(CW\*(C`gnu.gcj.util.GCInfo.enumerate(String namePrefix)\*(C'\fR from java
+code.  A memory dump will be created on an out of memory condition if
+\&\f(CW\*(C`gnu.gcj.util.GCInfo.setOOMDump(String namePrefix)\*(C'\fR is called
+before the out of memory occurs.
+.PP
+Running this program will create two files: \fITestDump001\fR and
+\&\fITestDump001.bytes\fR.
+.PP
+.Vb 2
+\&        import gnu.gcj.util.*;
+\&        import java.util.*;
+\&        
+\&        public class GCDumpTest
+\&        {
+\&            static public void main(String args[])
+\&            {
+\&                ArrayList<String> l = new ArrayList<String>(1000);
+\&        
+\&                for (int i = 1; i < 1500; i++) {
+\&                    l.add("This is string #" + i);
+\&                }
+\&                GCInfo.enumerate("TestDump");
+\&            }
+\&        }
+.Ve
+.PP
+The memory dump may then be displayed by running:
+.PP
+.Vb 1
+\&        gc\-analyze \-v TestDump001
+.Ve
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-\-verbose\fR" 4
+.IX Item "--verbose"
+.PD 0
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD
+Verbose output.
+.IP "\fB\-p\fR \fItool-prefix\fR" 4
+.IX Item "-p tool-prefix"
+Prefix added to the names of the \fBnm\fR and \fBreadelf\fR commands.
+.IP "\fB\-d\fR \fIdirectory\fR" 4
+.IX Item "-d directory"
+Directory that contains the executable and shared libraries used when
+the dump was generated.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Print a help message, then exit.
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+Print version information, then exit.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, the Front-Cover Texts being (a) (see below), and
+with the Back-Cover Texts being (b) (see below).
+A copy of the license is included in the
+man page \fIgfdl\fR\|(7).
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\&     A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\&     You have freedom to copy and modify this GNU Manual, like GNU
+\&     software.  Copies published by the Free Software Foundation raise
+\&     funds for GNU development.
+.Ve
diff --git a/gcc/doc/gcc.1 b/gcc/doc/gcc.1
new file mode 100644
index 000000000..37b7abdd4
--- /dev/null
+++ b/gcc/doc/gcc.1
@@ -0,0 +1,17436 @@
+.\" Automatically generated by Pod::Man 2.25 (Pod::Simple 3.16)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  \*(C+ will
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+.\" therefore won't be available.  \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
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+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GCC 1"
+.TH GCC 1 "2013-04-12" "gcc-4.6.4" "GNU"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+gcc \- GNU project C and C++ compiler
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+gcc [\fB\-c\fR|\fB\-S\fR|\fB\-E\fR] [\fB\-std=\fR\fIstandard\fR]
+    [\fB\-g\fR] [\fB\-pg\fR] [\fB\-O\fR\fIlevel\fR]
+    [\fB\-W\fR\fIwarn\fR...] [\fB\-pedantic\fR]
+    [\fB\-I\fR\fIdir\fR...] [\fB\-L\fR\fIdir\fR...]
+    [\fB\-D\fR\fImacro\fR[=\fIdefn\fR]...] [\fB\-U\fR\fImacro\fR]
+    [\fB\-f\fR\fIoption\fR...] [\fB\-m\fR\fImachine-option\fR...]
+    [\fB\-o\fR \fIoutfile\fR] [@\fIfile\fR] \fIinfile\fR...
+.PP
+Only the most useful options are listed here; see below for the
+remainder.  \fBg++\fR accepts mostly the same options as \fBgcc\fR.
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+When you invoke \s-1GCC\s0, it normally does preprocessing, compilation,
+assembly and linking.  The \*(L"overall options\*(R" allow you to stop this
+process at an intermediate stage.  For example, the \fB\-c\fR option
+says not to run the linker.  Then the output consists of object files
+output by the assembler.
+.PP
+Other options are passed on to one stage of processing.  Some options
+control the preprocessor and others the compiler itself.  Yet other
+options control the assembler and linker; most of these are not
+documented here, since you rarely need to use any of them.
+.PP
+Most of the command line options that you can use with \s-1GCC\s0 are useful
+for C programs; when an option is only useful with another language
+(usually \*(C+), the explanation says so explicitly.  If the description
+for a particular option does not mention a source language, you can use
+that option with all supported languages.
+.PP
+The \fBgcc\fR program accepts options and file names as operands.  Many
+options have multi-letter names; therefore multiple single-letter options
+may \fInot\fR be grouped: \fB\-dv\fR is very different from \fB\-d\ \-v\fR.
+.PP
+You can mix options and other arguments.  For the most part, the order
+you use doesn't matter.  Order does matter when you use several
+options of the same kind; for example, if you specify \fB\-L\fR more
+than once, the directories are searched in the order specified.  Also,
+the placement of the \fB\-l\fR option is significant.
+.PP
+Many options have long names starting with \fB\-f\fR or with
+\&\fB\-W\fR\-\-\-for example,
+\&\fB\-fmove\-loop\-invariants\fR, \fB\-Wformat\fR and so on.  Most of
+these have both positive and negative forms; the negative form of
+\&\fB\-ffoo\fR would be \fB\-fno\-foo\fR.  This manual documents
+only one of these two forms, whichever one is not the default.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.SS "Option Summary"
+.IX Subsection "Option Summary"
+Here is a summary of all the options, grouped by type.  Explanations are
+in the following sections.
+.IP "\fIOverall Options\fR" 4
+.IX Item "Overall Options"
+\&\fB\-c  \-S  \-E  \-o\fR \fIfile\fR  \fB\-no\-canonical\-prefixes  
+\&\-pipe  \-pass\-exit\-codes  
+\&\-x\fR \fIlanguage\fR  \fB\-v  \-###  \-\-help\fR[\fB=\fR\fIclass\fR[\fB,...\fR]]  \fB\-\-target\-help  
+\&\-\-version \-wrapper @\fR\fIfile\fR \fB\-fplugin=\fR\fIfile\fR \fB\-fplugin\-arg\-\fR\fIname\fR\fB=\fR\fIarg\fR  
+\&\fB\-fdump\-ada\-spec\fR[\fB\-slim\fR] \fB\-fdump\-go\-spec=\fR\fIfile\fR
+.IP "\fIC Language Options\fR" 4
+.IX Item "C Language Options"
+\&\fB\-ansi  \-std=\fR\fIstandard\fR  \fB\-fgnu89\-inline 
+\&\-aux\-info\fR \fIfilename\fR 
+\&\fB\-fno\-asm  \-fno\-builtin  \-fno\-builtin\-\fR\fIfunction\fR 
+\&\fB\-fhosted  \-ffreestanding \-fopenmp \-fms\-extensions \-fplan9\-extensions 
+\&\-trigraphs  \-no\-integrated\-cpp  \-traditional  \-traditional\-cpp 
+\&\-fallow\-single\-precision  \-fcond\-mismatch \-flax\-vector\-conversions 
+\&\-fsigned\-bitfields  \-fsigned\-char 
+\&\-funsigned\-bitfields  \-funsigned\-char\fR
+.IP "\fI\*(C+ Language Options\fR" 4
+.IX Item " Language Options"
+\&\fB\-fabi\-version=\fR\fIn\fR  \fB\-fno\-access\-control  \-fcheck\-new 
+\&\-fconserve\-space  \-fconstexpr\-depth=\fR\fIn\fR  \fB\-ffriend\-injection 
+\&\-fno\-elide\-constructors 
+\&\-fno\-enforce\-eh\-specs 
+\&\-ffor\-scope  \-fno\-for\-scope  \-fno\-gnu\-keywords 
+\&\-fno\-implicit\-templates 
+\&\-fno\-implicit\-inline\-templates 
+\&\-fno\-implement\-inlines  \-fms\-extensions 
+\&\-fno\-nonansi\-builtins  \-fnothrow\-opt  \-fno\-operator\-names 
+\&\-fno\-optional\-diags  \-fpermissive 
+\&\-fno\-pretty\-templates 
+\&\-frepo  \-fno\-rtti  \-fstats  \-ftemplate\-depth=\fR\fIn\fR 
+\&\fB\-fno\-threadsafe\-statics \-fuse\-cxa\-atexit  \-fno\-weak  \-nostdinc++ 
+\&\-fno\-default\-inline  \-fvisibility\-inlines\-hidden 
+\&\-fvisibility\-ms\-compat 
+\&\-Wabi  \-Wconversion\-null  \-Wctor\-dtor\-privacy 
+\&\-Wnoexcept \-Wnon\-virtual\-dtor  \-Wreorder 
+\&\-Weffc++  \-Wstrict\-null\-sentinel 
+\&\-Wno\-non\-template\-friend  \-Wold\-style\-cast 
+\&\-Woverloaded\-virtual  \-Wno\-pmf\-conversions 
+\&\-Wsign\-promo\fR
+.IP "\fIObjective-C and Objective\-\*(C+ Language Options\fR" 4
+.IX Item "Objective-C and Objective- Language Options"
+\&\fB\-fconstant\-string\-class=\fR\fIclass-name\fR 
+\&\fB\-fgnu\-runtime  \-fnext\-runtime 
+\&\-fno\-nil\-receivers 
+\&\-fobjc\-abi\-version=\fR\fIn\fR 
+\&\fB\-fobjc\-call\-cxx\-cdtors 
+\&\-fobjc\-direct\-dispatch 
+\&\-fobjc\-exceptions 
+\&\-fobjc\-gc 
+\&\-fobjc\-nilcheck 
+\&\-fobjc\-std=objc1 
+\&\-freplace\-objc\-classes 
+\&\-fzero\-link 
+\&\-gen\-decls 
+\&\-Wassign\-intercept 
+\&\-Wno\-protocol  \-Wselector 
+\&\-Wstrict\-selector\-match 
+\&\-Wundeclared\-selector\fR
+.IP "\fILanguage Independent Options\fR" 4
+.IX Item "Language Independent Options"
+\&\fB\-fmessage\-length=\fR\fIn\fR  
+\&\fB\-fdiagnostics\-show\-location=\fR[\fBonce\fR|\fBevery-line\fR]  
+\&\fB\-fno\-diagnostics\-show\-option\fR
+.IP "\fIWarning Options\fR" 4
+.IX Item "Warning Options"
+\&\fB\-fsyntax\-only  \-fmax\-errors=\fR\fIn\fR  \fB\-pedantic 
+\&\-pedantic\-errors 
+\&\-w  \-Wextra  \-Wall  \-Waddress  \-Waggregate\-return  \-Warray\-bounds 
+\&\-Wno\-attributes \-Wno\-builtin\-macro\-redefined 
+\&\-Wc++\-compat \-Wc++0x\-compat \-Wcast\-align  \-Wcast\-qual  
+\&\-Wchar\-subscripts \-Wclobbered  \-Wcomment 
+\&\-Wconversion  \-Wcoverage\-mismatch  \-Wno\-cpp  \-Wno\-deprecated  
+\&\-Wno\-deprecated\-declarations \-Wdisabled\-optimization  
+\&\-Wno\-div\-by\-zero \-Wdouble\-promotion \-Wempty\-body  \-Wenum\-compare 
+\&\-Wno\-endif\-labels \-Werror  \-Werror=* 
+\&\-Wfatal\-errors  \-Wfloat\-equal  \-Wformat  \-Wformat=2 
+\&\-Wno\-format\-contains\-nul \-Wno\-format\-extra\-args \-Wformat\-nonliteral 
+\&\-Wformat\-security  \-Wformat\-y2k 
+\&\-Wframe\-larger\-than=\fR\fIlen\fR \fB\-Wjump\-misses\-init \-Wignored\-qualifiers 
+\&\-Wimplicit  \-Wimplicit\-function\-declaration  \-Wimplicit\-int 
+\&\-Winit\-self  \-Winline 
+\&\-Wno\-int\-to\-pointer\-cast \-Wno\-invalid\-offsetof 
+\&\-Winvalid\-pch \-Wlarger\-than=\fR\fIlen\fR  \fB\-Wunsafe\-loop\-optimizations 
+\&\-Wlogical\-op \-Wlong\-long 
+\&\-Wmain  \-Wmissing\-braces  \-Wmissing\-field\-initializers 
+\&\-Wmissing\-format\-attribute  \-Wmissing\-include\-dirs 
+\&\-Wno\-mudflap 
+\&\-Wno\-multichar  \-Wnonnull  \-Wno\-overflow 
+\&\-Woverlength\-strings  \-Wpacked  \-Wpacked\-bitfield\-compat  \-Wpadded 
+\&\-Wparentheses  \-Wpedantic\-ms\-format \-Wno\-pedantic\-ms\-format 
+\&\-Wpointer\-arith  \-Wno\-pointer\-to\-int\-cast 
+\&\-Wredundant\-decls 
+\&\-Wreturn\-type  \-Wsequence\-point  \-Wshadow 
+\&\-Wsign\-compare  \-Wsign\-conversion  \-Wstack\-protector 
+\&\-Wstrict\-aliasing \-Wstrict\-aliasing=n 
+\&\-Wstrict\-overflow \-Wstrict\-overflow=\fR\fIn\fR 
+\&\fB\-Wsuggest\-attribute=\fR[\fBpure\fR|\fBconst\fR|\fBnoreturn\fR] 
+\&\fB\-Wswitch  \-Wswitch\-default  \-Wswitch\-enum \-Wsync\-nand 
+\&\-Wsystem\-headers  \-Wtrampolines  \-Wtrigraphs  \-Wtype\-limits  \-Wundef 
+\&\-Wuninitialized  \-Wunknown\-pragmas  \-Wno\-pragmas 
+\&\-Wunsuffixed\-float\-constants  \-Wunused  \-Wunused\-function 
+\&\-Wunused\-label  \-Wunused\-parameter \-Wno\-unused\-result \-Wunused\-value 
+\&\-Wunused\-variable \-Wunused\-but\-set\-parameter \-Wunused\-but\-set\-variable 
+\&\-Wvariadic\-macros \-Wvla \-Wvolatile\-register\-var  \-Wwrite\-strings\fR
+.IP "\fIC and Objective-C-only Warning Options\fR" 4
+.IX Item "C and Objective-C-only Warning Options"
+\&\fB\-Wbad\-function\-cast  \-Wmissing\-declarations 
+\&\-Wmissing\-parameter\-type  \-Wmissing\-prototypes  \-Wnested\-externs 
+\&\-Wold\-style\-declaration  \-Wold\-style\-definition 
+\&\-Wstrict\-prototypes  \-Wtraditional  \-Wtraditional\-conversion 
+\&\-Wdeclaration\-after\-statement \-Wpointer\-sign\fR
+.IP "\fIDebugging Options\fR" 4
+.IX Item "Debugging Options"
+\&\fB\-d\fR\fIletters\fR  \fB\-dumpspecs  \-dumpmachine  \-dumpversion 
+\&\-fdbg\-cnt\-list \-fdbg\-cnt=\fR\fIcounter-value-list\fR 
+\&\fB\-fdump\-noaddr \-fdump\-unnumbered \-fdump\-unnumbered\-links 
+\&\-fdump\-translation\-unit\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-class\-hierarchy\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-ipa\-all \-fdump\-ipa\-cgraph \-fdump\-ipa\-inline 
+\&\-fdump\-statistics 
+\&\-fdump\-tree\-all 
+\&\-fdump\-tree\-original\fR[\fB\-\fR\fIn\fR]  
+\&\fB\-fdump\-tree\-optimized\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-cfg \-fdump\-tree\-vcg \-fdump\-tree\-alias 
+\&\-fdump\-tree\-ch 
+\&\-fdump\-tree\-ssa\fR[\fB\-\fR\fIn\fR] \fB\-fdump\-tree\-pre\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-ccp\fR[\fB\-\fR\fIn\fR] \fB\-fdump\-tree\-dce\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-gimple\fR[\fB\-raw\fR] \fB\-fdump\-tree\-mudflap\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-dom\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-dse\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-phiprop\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-phiopt\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-forwprop\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-copyrename\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-nrv \-fdump\-tree\-vect 
+\&\-fdump\-tree\-sink 
+\&\-fdump\-tree\-sra\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-forwprop\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-fre\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-tree\-vrp\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-ftree\-vectorizer\-verbose=\fR\fIn\fR 
+\&\fB\-fdump\-tree\-storeccp\fR[\fB\-\fR\fIn\fR] 
+\&\fB\-fdump\-final\-insns=\fR\fIfile\fR 
+\&\fB\-fcompare\-debug\fR[\fB=\fR\fIopts\fR]  \fB\-fcompare\-debug\-second 
+\&\-feliminate\-dwarf2\-dups \-feliminate\-unused\-debug\-types 
+\&\-feliminate\-unused\-debug\-symbols \-femit\-class\-debug\-always 
+\&\-fenable\-icf\-debug 
+\&\-fmem\-report \-fpre\-ipa\-mem\-report \-fpost\-ipa\-mem\-report \-fprofile\-arcs 
+\&\-frandom\-seed=\fR\fIstring\fR \fB\-fsched\-verbose=\fR\fIn\fR 
+\&\fB\-fsel\-sched\-verbose \-fsel\-sched\-dump\-cfg \-fsel\-sched\-pipelining\-verbose 
+\&\-fstack\-usage  \-ftest\-coverage  \-ftime\-report \-fvar\-tracking 
+\&\-fvar\-tracking\-assignments  \-fvar\-tracking\-assignments\-toggle 
+\&\-g  \-g\fR\fIlevel\fR  \fB\-gtoggle  \-gcoff  \-gdwarf\-\fR\fIversion\fR 
+\&\fB\-ggdb  \-gstabs  \-gstabs+  \-gstrict\-dwarf  \-gno\-strict\-dwarf 
+\&\-gvms  \-gxcoff  \-gxcoff+ 
+\&\-fno\-merge\-debug\-strings \-fno\-dwarf2\-cfi\-asm 
+\&\-fdebug\-prefix\-map=\fR\fIold\fR\fB=\fR\fInew\fR 
+\&\fB\-femit\-struct\-debug\-baseonly \-femit\-struct\-debug\-reduced 
+\&\-femit\-struct\-debug\-detailed\fR[\fB=\fR\fIspec-list\fR] 
+\&\fB\-p  \-pg  \-print\-file\-name=\fR\fIlibrary\fR  \fB\-print\-libgcc\-file\-name 
+\&\-print\-multi\-directory  \-print\-multi\-lib  \-print\-multi\-os\-directory 
+\&\-print\-prog\-name=\fR\fIprogram\fR  \fB\-print\-search\-dirs  \-Q 
+\&\-print\-sysroot \-print\-sysroot\-headers\-suffix 
+\&\-save\-temps \-save\-temps=cwd \-save\-temps=obj \-time\fR[\fB=\fR\fIfile\fR]
+.IP "\fIOptimization Options\fR" 4
+.IX Item "Optimization Options"
+\&\fB\-falign\-functions[=\fR\fIn\fR\fB] \-falign\-jumps[=\fR\fIn\fR\fB] 
+\&\-falign\-labels[=\fR\fIn\fR\fB] \-falign\-loops[=\fR\fIn\fR\fB] \-fassociative\-math 
+\&\-fauto\-inc\-dec \-fbranch\-probabilities \-fbranch\-target\-load\-optimize 
+\&\-fbranch\-target\-load\-optimize2 \-fbtr\-bb\-exclusive \-fcaller\-saves 
+\&\-fcheck\-data\-deps \-fcombine\-stack\-adjustments \-fconserve\-stack 
+\&\-fcompare\-elim \-fcprop\-registers \-fcrossjumping 
+\&\-fcse\-follow\-jumps \-fcse\-skip\-blocks \-fcx\-fortran\-rules 
+\&\-fcx\-limited\-range 
+\&\-fdata\-sections \-fdce \-fdce \-fdelayed\-branch 
+\&\-fdelete\-null\-pointer\-checks \-fdse \-fdevirtualize \-fdse 
+\&\-fearly\-inlining \-fipa\-sra \-fexpensive\-optimizations \-ffast\-math 
+\&\-ffinite\-math\-only \-ffloat\-store \-fexcess\-precision=\fR\fIstyle\fR 
+\&\fB\-fforward\-propagate \-ffp\-contract=\fR\fIstyle\fR \fB\-ffunction\-sections 
+\&\-fgcse \-fgcse\-after\-reload \-fgcse\-las \-fgcse\-lm \-fgraphite\-identity 
+\&\-fgcse\-sm \-fif\-conversion \-fif\-conversion2 \-findirect\-inlining 
+\&\-finline\-functions \-finline\-functions\-called\-once \-finline\-limit=\fR\fIn\fR 
+\&\fB\-finline\-small\-functions \-fipa\-cp \-fipa\-cp\-clone \-fipa\-matrix\-reorg 
+\&\-fipa\-pta \-fipa\-profile \-fipa\-pure\-const \-fipa\-reference 
+\&\-fipa\-struct\-reorg \-fira\-algorithm=\fR\fIalgorithm\fR 
+\&\fB\-fira\-region=\fR\fIregion\fR 
+\&\fB\-fira\-loop\-pressure \-fno\-ira\-share\-save\-slots 
+\&\-fno\-ira\-share\-spill\-slots \-fira\-verbose=\fR\fIn\fR 
+\&\fB\-fivopts \-fkeep\-inline\-functions \-fkeep\-static\-consts 
+\&\-floop\-block \-floop\-flatten \-floop\-interchange \-floop\-strip\-mine 
+\&\-floop\-parallelize\-all \-flto \-flto\-compression\-level
+\&\-flto\-partition=\fR\fIalg\fR \fB\-flto\-report \-fmerge\-all\-constants 
+\&\-fmerge\-constants \-fmodulo\-sched \-fmodulo\-sched\-allow\-regmoves 
+\&\-fmove\-loop\-invariants fmudflap \-fmudflapir \-fmudflapth \-fno\-branch\-count\-reg 
+\&\-fno\-default\-inline 
+\&\-fno\-defer\-pop \-fno\-function\-cse \-fno\-guess\-branch\-probability 
+\&\-fno\-inline \-fno\-math\-errno \-fno\-peephole \-fno\-peephole2 
+\&\-fno\-sched\-interblock \-fno\-sched\-spec \-fno\-signed\-zeros 
+\&\-fno\-toplevel\-reorder \-fno\-trapping\-math \-fno\-zero\-initialized\-in\-bss 
+\&\-fomit\-frame\-pointer \-foptimize\-register\-move \-foptimize\-sibling\-calls 
+\&\-fpartial\-inlining \-fpeel\-loops \-fpredictive\-commoning 
+\&\-fprefetch\-loop\-arrays 
+\&\-fprofile\-correction \-fprofile\-dir=\fR\fIpath\fR \fB\-fprofile\-generate 
+\&\-fprofile\-generate=\fR\fIpath\fR 
+\&\fB\-fprofile\-use \-fprofile\-use=\fR\fIpath\fR \fB\-fprofile\-values 
+\&\-freciprocal\-math \-fregmove \-frename\-registers \-freorder\-blocks 
+\&\-freorder\-blocks\-and\-partition \-freorder\-functions 
+\&\-frerun\-cse\-after\-loop \-freschedule\-modulo\-scheduled\-loops 
+\&\-frounding\-math \-fsched2\-use\-superblocks \-fsched\-pressure 
+\&\-fsched\-spec\-load \-fsched\-spec\-load\-dangerous 
+\&\-fsched\-stalled\-insns\-dep[=\fR\fIn\fR\fB] \-fsched\-stalled\-insns[=\fR\fIn\fR\fB] 
+\&\-fsched\-group\-heuristic \-fsched\-critical\-path\-heuristic 
+\&\-fsched\-spec\-insn\-heuristic \-fsched\-rank\-heuristic 
+\&\-fsched\-last\-insn\-heuristic \-fsched\-dep\-count\-heuristic 
+\&\-fschedule\-insns \-fschedule\-insns2 \-fsection\-anchors 
+\&\-fselective\-scheduling \-fselective\-scheduling2 
+\&\-fsel\-sched\-pipelining \-fsel\-sched\-pipelining\-outer\-loops 
+\&\-fsignaling\-nans \-fsingle\-precision\-constant \-fsplit\-ivs\-in\-unroller 
+\&\-fsplit\-wide\-types \-fstack\-protector \-fstack\-protector\-all 
+\&\-fstrict\-aliasing \-fstrict\-overflow \-fthread\-jumps \-ftracer 
+\&\-ftree\-bit\-ccp 
+\&\-ftree\-builtin\-call\-dce \-ftree\-ccp \-ftree\-ch \-ftree\-copy\-prop 
+\&\-ftree\-copyrename \-ftree\-dce \-ftree\-dominator\-opts \-ftree\-dse 
+\&\-ftree\-forwprop \-ftree\-fre \-ftree\-loop\-if\-convert 
+\&\-ftree\-loop\-if\-convert\-stores \-ftree\-loop\-im 
+\&\-ftree\-phiprop \-ftree\-loop\-distribution \-ftree\-loop\-distribute\-patterns 
+\&\-ftree\-loop\-ivcanon \-ftree\-loop\-linear \-ftree\-loop\-optimize 
+\&\-ftree\-parallelize\-loops=\fR\fIn\fR \fB\-ftree\-pre \-ftree\-pta \-ftree\-reassoc 
+\&\-ftree\-sink \-ftree\-sra \-ftree\-switch\-conversion 
+\&\-ftree\-ter \-ftree\-vect\-loop\-version \-ftree\-vectorize \-ftree\-vrp 
+\&\-funit\-at\-a\-time \-funroll\-all\-loops \-funroll\-loops 
+\&\-funsafe\-loop\-optimizations \-funsafe\-math\-optimizations \-funswitch\-loops 
+\&\-fvariable\-expansion\-in\-unroller \-fvect\-cost\-model \-fvpt \-fweb 
+\&\-fwhole\-program \-fwpa \-fuse\-linker\-plugin 
+\&\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR
+\&\fB\-O  \-O0  \-O1  \-O2  \-O3  \-Os \-Ofast\fR
+.IP "\fIPreprocessor Options\fR" 4
+.IX Item "Preprocessor Options"
+\&\fB\-A\fR\fIquestion\fR\fB=\fR\fIanswer\fR 
+\&\fB\-A\-\fR\fIquestion\fR[\fB=\fR\fIanswer\fR] 
+\&\fB\-C  \-dD  \-dI  \-dM  \-dN 
+\&\-D\fR\fImacro\fR[\fB=\fR\fIdefn\fR]  \fB\-E  \-H 
+\&\-idirafter\fR \fIdir\fR 
+\&\fB\-include\fR \fIfile\fR  \fB\-imacros\fR \fIfile\fR 
+\&\fB\-iprefix\fR \fIfile\fR  \fB\-iwithprefix\fR \fIdir\fR 
+\&\fB\-iwithprefixbefore\fR \fIdir\fR  \fB\-isystem\fR \fIdir\fR 
+\&\fB\-imultilib\fR \fIdir\fR \fB\-isysroot\fR \fIdir\fR 
+\&\fB\-M  \-MM  \-MF  \-MG  \-MP  \-MQ  \-MT  \-nostdinc  
+\&\-P  \-fworking\-directory  \-remap 
+\&\-trigraphs  \-undef  \-U\fR\fImacro\fR  \fB\-Wp,\fR\fIoption\fR 
+\&\fB\-Xpreprocessor\fR \fIoption\fR
+.IP "\fIAssembler Option\fR" 4
+.IX Item "Assembler Option"
+\&\fB\-Wa,\fR\fIoption\fR  \fB\-Xassembler\fR \fIoption\fR
+.IP "\fILinker Options\fR" 4
+.IX Item "Linker Options"
+\&\fIobject-file-name\fR  \fB\-l\fR\fIlibrary\fR 
+\&\fB\-nostartfiles  \-nodefaultlibs  \-nostdlib \-pie \-rdynamic 
+\&\-s  \-static  \-static\-libgcc  \-static\-libstdc++ \-shared  
+\&\-shared\-libgcc  \-symbolic 
+\&\-T\fR \fIscript\fR  \fB\-Wl,\fR\fIoption\fR  \fB\-Xlinker\fR \fIoption\fR 
+\&\fB\-u\fR \fIsymbol\fR
+.IP "\fIDirectory Options\fR" 4
+.IX Item "Directory Options"
+\&\fB\-B\fR\fIprefix\fR \fB\-I\fR\fIdir\fR \fB\-iplugindir=\fR\fIdir\fR
+\&\-iquote\fIdir\fR \-L\fIdir\fR \-specs=\fIfile\fR \-I\-
+\&\-\-sysroot=\fIdir\fR
+.IP "\fIMachine Dependent Options\fR" 4
+.IX Item "Machine Dependent Options"
+\&\fI\s-1ARC\s0 Options\fR
+\&\fB\-EB  \-EL 
+\&\-mmangle\-cpu  \-mcpu=\fR\fIcpu\fR  \fB\-mtext=\fR\fItext-section\fR 
+\&\fB\-mdata=\fR\fIdata-section\fR  \fB\-mrodata=\fR\fIreadonly-data-section\fR
+.Sp
+\&\fI\s-1ARM\s0 Options\fR
+\&\fB\-mapcs\-frame  \-mno\-apcs\-frame 
+\&\-mabi=\fR\fIname\fR 
+\&\fB\-mapcs\-stack\-check  \-mno\-apcs\-stack\-check 
+\&\-mapcs\-float  \-mno\-apcs\-float 
+\&\-mapcs\-reentrant  \-mno\-apcs\-reentrant 
+\&\-msched\-prolog  \-mno\-sched\-prolog 
+\&\-mlittle\-endian  \-mbig\-endian  \-mwords\-little\-endian 
+\&\-mfloat\-abi=\fR\fIname\fR  \fB\-msoft\-float  \-mhard\-float  \-mfpe 
+\&\-mfp16\-format=\fR\fIname\fR
+\&\fB\-mthumb\-interwork  \-mno\-thumb\-interwork 
+\&\-mcpu=\fR\fIname\fR  \fB\-march=\fR\fIname\fR  \fB\-mfpu=\fR\fIname\fR  
+\&\fB\-mstructure\-size\-boundary=\fR\fIn\fR 
+\&\fB\-mabort\-on\-noreturn 
+\&\-mlong\-calls  \-mno\-long\-calls 
+\&\-msingle\-pic\-base  \-mno\-single\-pic\-base 
+\&\-mpic\-register=\fR\fIreg\fR 
+\&\fB\-mnop\-fun\-dllimport 
+\&\-mcirrus\-fix\-invalid\-insns \-mno\-cirrus\-fix\-invalid\-insns 
+\&\-mpoke\-function\-name 
+\&\-mthumb  \-marm 
+\&\-mtpcs\-frame  \-mtpcs\-leaf\-frame 
+\&\-mcaller\-super\-interworking  \-mcallee\-super\-interworking 
+\&\-mtp=\fR\fIname\fR 
+\&\fB\-mword\-relocations 
+\&\-mfix\-cortex\-m3\-ldrd\fR
+.Sp
+\&\fI\s-1AVR\s0 Options\fR
+\&\fB\-mmcu=\fR\fImcu\fR  \fB\-mno\-interrupts 
+\&\-mcall\-prologues  \-mtiny\-stack  \-mint8\fR
+.Sp
+\&\fIBlackfin Options\fR
+\&\fB\-mcpu=\fR\fIcpu\fR[\fB\-\fR\fIsirevision\fR] 
+\&\fB\-msim \-momit\-leaf\-frame\-pointer  \-mno\-omit\-leaf\-frame\-pointer 
+\&\-mspecld\-anomaly  \-mno\-specld\-anomaly  \-mcsync\-anomaly  \-mno\-csync\-anomaly 
+\&\-mlow\-64k \-mno\-low64k  \-mstack\-check\-l1  \-mid\-shared\-library 
+\&\-mno\-id\-shared\-library  \-mshared\-library\-id=\fR\fIn\fR 
+\&\fB\-mleaf\-id\-shared\-library  \-mno\-leaf\-id\-shared\-library 
+\&\-msep\-data  \-mno\-sep\-data  \-mlong\-calls  \-mno\-long\-calls 
+\&\-mfast\-fp \-minline\-plt \-mmulticore  \-mcorea  \-mcoreb  \-msdram 
+\&\-micplb\fR
+.Sp
+\&\fI\s-1CRIS\s0 Options\fR
+\&\fB\-mcpu=\fR\fIcpu\fR  \fB\-march=\fR\fIcpu\fR  \fB\-mtune=\fR\fIcpu\fR 
+\&\fB\-mmax\-stack\-frame=\fR\fIn\fR  \fB\-melinux\-stacksize=\fR\fIn\fR 
+\&\fB\-metrax4  \-metrax100  \-mpdebug  \-mcc\-init  \-mno\-side\-effects 
+\&\-mstack\-align  \-mdata\-align  \-mconst\-align 
+\&\-m32\-bit  \-m16\-bit  \-m8\-bit  \-mno\-prologue\-epilogue  \-mno\-gotplt 
+\&\-melf  \-maout  \-melinux  \-mlinux  \-sim  \-sim2 
+\&\-mmul\-bug\-workaround  \-mno\-mul\-bug\-workaround\fR
+.Sp
+\&\fI\s-1CRX\s0 Options\fR
+\&\fB\-mmac \-mpush\-args\fR
+.Sp
+\&\fIDarwin Options\fR
+\&\fB\-all_load  \-allowable_client  \-arch  \-arch_errors_fatal 
+\&\-arch_only  \-bind_at_load  \-bundle  \-bundle_loader 
+\&\-client_name  \-compatibility_version  \-current_version 
+\&\-dead_strip 
+\&\-dependency\-file  \-dylib_file  \-dylinker_install_name 
+\&\-dynamic  \-dynamiclib  \-exported_symbols_list 
+\&\-filelist  \-flat_namespace  \-force_cpusubtype_ALL 
+\&\-force_flat_namespace  \-headerpad_max_install_names 
+\&\-iframework 
+\&\-image_base  \-init  \-install_name  \-keep_private_externs 
+\&\-multi_module  \-multiply_defined  \-multiply_defined_unused 
+\&\-noall_load   \-no_dead_strip_inits_and_terms 
+\&\-nofixprebinding \-nomultidefs  \-noprebind  \-noseglinkedit 
+\&\-pagezero_size  \-prebind  \-prebind_all_twolevel_modules 
+\&\-private_bundle  \-read_only_relocs  \-sectalign 
+\&\-sectobjectsymbols  \-whyload  \-seg1addr 
+\&\-sectcreate  \-sectobjectsymbols  \-sectorder 
+\&\-segaddr \-segs_read_only_addr \-segs_read_write_addr 
+\&\-seg_addr_table  \-seg_addr_table_filename  \-seglinkedit 
+\&\-segprot  \-segs_read_only_addr  \-segs_read_write_addr 
+\&\-single_module  \-static  \-sub_library  \-sub_umbrella 
+\&\-twolevel_namespace  \-umbrella  \-undefined 
+\&\-unexported_symbols_list  \-weak_reference_mismatches 
+\&\-whatsloaded \-F \-gused \-gfull \-mmacosx\-version\-min=\fR\fIversion\fR 
+\&\fB\-mkernel \-mone\-byte\-bool\fR
+.Sp
+\&\fI\s-1DEC\s0 Alpha Options\fR
+\&\fB\-mno\-fp\-regs  \-msoft\-float  \-malpha\-as  \-mgas 
+\&\-mieee  \-mieee\-with\-inexact  \-mieee\-conformant 
+\&\-mfp\-trap\-mode=\fR\fImode\fR  \fB\-mfp\-rounding\-mode=\fR\fImode\fR 
+\&\fB\-mtrap\-precision=\fR\fImode\fR  \fB\-mbuild\-constants 
+\&\-mcpu=\fR\fIcpu-type\fR  \fB\-mtune=\fR\fIcpu-type\fR 
+\&\fB\-mbwx  \-mmax  \-mfix  \-mcix 
+\&\-mfloat\-vax  \-mfloat\-ieee 
+\&\-mexplicit\-relocs  \-msmall\-data  \-mlarge\-data 
+\&\-msmall\-text  \-mlarge\-text 
+\&\-mmemory\-latency=\fR\fItime\fR
+.Sp
+\&\fI\s-1DEC\s0 Alpha/VMS Options\fR
+\&\fB\-mvms\-return\-codes \-mdebug\-main=\fR\fIprefix\fR \fB\-mmalloc64\fR
+.Sp
+\&\fI\s-1FR30\s0 Options\fR
+\&\fB\-msmall\-model \-mno\-lsim\fR
+.Sp
+\&\fI\s-1FRV\s0 Options\fR
+\&\fB\-mgpr\-32  \-mgpr\-64  \-mfpr\-32  \-mfpr\-64 
+\&\-mhard\-float  \-msoft\-float 
+\&\-malloc\-cc  \-mfixed\-cc  \-mdword  \-mno\-dword 
+\&\-mdouble  \-mno\-double 
+\&\-mmedia  \-mno\-media  \-mmuladd  \-mno\-muladd 
+\&\-mfdpic  \-minline\-plt \-mgprel\-ro  \-multilib\-library\-pic 
+\&\-mlinked\-fp  \-mlong\-calls  \-malign\-labels 
+\&\-mlibrary\-pic  \-macc\-4  \-macc\-8 
+\&\-mpack  \-mno\-pack  \-mno\-eflags  \-mcond\-move  \-mno\-cond\-move 
+\&\-moptimize\-membar \-mno\-optimize\-membar 
+\&\-mscc  \-mno\-scc  \-mcond\-exec  \-mno\-cond\-exec 
+\&\-mvliw\-branch  \-mno\-vliw\-branch 
+\&\-mmulti\-cond\-exec  \-mno\-multi\-cond\-exec  \-mnested\-cond\-exec 
+\&\-mno\-nested\-cond\-exec  \-mtomcat\-stats 
+\&\-mTLS \-mtls 
+\&\-mcpu=\fR\fIcpu\fR
+.Sp
+\&\fIGNU/Linux Options\fR
+\&\fB\-mglibc \-muclibc \-mbionic \-mandroid 
+\&\-tno\-android\-cc \-tno\-android\-ld\fR
+.Sp
+\&\fIH8/300 Options\fR
+\&\fB\-mrelax  \-mh  \-ms  \-mn  \-mint32  \-malign\-300\fR
+.Sp
+\&\fI\s-1HPPA\s0 Options\fR
+\&\fB\-march=\fR\fIarchitecture-type\fR 
+\&\fB\-mbig\-switch  \-mdisable\-fpregs  \-mdisable\-indexing 
+\&\-mfast\-indirect\-calls  \-mgas  \-mgnu\-ld   \-mhp\-ld 
+\&\-mfixed\-range=\fR\fIregister-range\fR 
+\&\fB\-mjump\-in\-delay \-mlinker\-opt \-mlong\-calls 
+\&\-mlong\-load\-store  \-mno\-big\-switch  \-mno\-disable\-fpregs 
+\&\-mno\-disable\-indexing  \-mno\-fast\-indirect\-calls  \-mno\-gas 
+\&\-mno\-jump\-in\-delay  \-mno\-long\-load\-store 
+\&\-mno\-portable\-runtime  \-mno\-soft\-float 
+\&\-mno\-space\-regs  \-msoft\-float  \-mpa\-risc\-1\-0 
+\&\-mpa\-risc\-1\-1  \-mpa\-risc\-2\-0  \-mportable\-runtime 
+\&\-mschedule=\fR\fIcpu-type\fR  \fB\-mspace\-regs  \-msio  \-mwsio 
+\&\-munix=\fR\fIunix-std\fR  \fB\-nolibdld  \-static  \-threads\fR
+.Sp
+\&\fIi386 and x86\-64 Options\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR  \fB\-march=\fR\fIcpu-type\fR 
+\&\fB\-mfpmath=\fR\fIunit\fR 
+\&\fB\-masm=\fR\fIdialect\fR  \fB\-mno\-fancy\-math\-387 
+\&\-mno\-fp\-ret\-in\-387  \-msoft\-float 
+\&\-mno\-wide\-multiply  \-mrtd  \-malign\-double 
+\&\-mpreferred\-stack\-boundary=\fR\fInum\fR
+\&\fB\-mincoming\-stack\-boundary=\fR\fInum\fR 
+\&\fB\-mcld \-mcx16 \-msahf \-mmovbe \-mcrc32 \-mrecip 
+\&\-mvzeroupper \-mprefer\-avx128 
+\&\-mmmx  \-msse  \-msse2 \-msse3 \-mssse3 \-msse4.1 \-msse4.2 \-msse4 \-mavx 
+\&\-maes \-mpclmul \-mfsgsbase \-mrdrnd \-mf16c \-mfused\-madd 
+\&\-msse4a \-m3dnow \-mpopcnt \-mabm \-mbmi \-mtbm \-mfma4 \-mxop \-mlwp 
+\&\-mthreads  \-mno\-align\-stringops  \-minline\-all\-stringops 
+\&\-minline\-stringops\-dynamically \-mstringop\-strategy=\fR\fIalg\fR 
+\&\fB\-mpush\-args  \-maccumulate\-outgoing\-args  \-m128bit\-long\-double 
+\&\-m96bit\-long\-double  \-mregparm=\fR\fInum\fR  \fB\-msseregparm 
+\&\-mveclibabi=\fR\fItype\fR \fB\-mvect8\-ret\-in\-mem 
+\&\-mpc32 \-mpc64 \-mpc80 \-mstackrealign 
+\&\-momit\-leaf\-frame\-pointer  \-mno\-red\-zone \-mno\-tls\-direct\-seg\-refs 
+\&\-mcmodel=\fR\fIcode-model\fR \fB\-mabi=\fR\fIname\fR 
+\&\fB\-m32  \-m64 \-mlarge\-data\-threshold=\fR\fInum\fR 
+\&\fB\-msse2avx \-mfentry \-m8bit\-idiv 
+\&\-mavx256\-split\-unaligned\-load \-mavx256\-split\-unaligned\-store\fR
+.Sp
+\&\fIi386 and x86\-64 Windows Options\fR
+\&\fB\-mconsole \-mcygwin \-mno\-cygwin \-mdll
+\&\-mnop\-fun\-dllimport \-mthread 
+\&\-municode \-mwin32 \-mwindows \-fno\-set\-stack\-executable\fR
+.Sp
+\&\fI\s-1IA\-64\s0 Options\fR
+\&\fB\-mbig\-endian  \-mlittle\-endian  \-mgnu\-as  \-mgnu\-ld  \-mno\-pic 
+\&\-mvolatile\-asm\-stop  \-mregister\-names  \-msdata \-mno\-sdata 
+\&\-mconstant\-gp  \-mauto\-pic  \-mfused\-madd 
+\&\-minline\-float\-divide\-min\-latency 
+\&\-minline\-float\-divide\-max\-throughput 
+\&\-mno\-inline\-float\-divide 
+\&\-minline\-int\-divide\-min\-latency 
+\&\-minline\-int\-divide\-max\-throughput  
+\&\-mno\-inline\-int\-divide 
+\&\-minline\-sqrt\-min\-latency \-minline\-sqrt\-max\-throughput 
+\&\-mno\-inline\-sqrt 
+\&\-mdwarf2\-asm \-mearly\-stop\-bits 
+\&\-mfixed\-range=\fR\fIregister-range\fR \fB\-mtls\-size=\fR\fItls-size\fR 
+\&\fB\-mtune=\fR\fIcpu-type\fR \fB\-milp32 \-mlp64 
+\&\-msched\-br\-data\-spec \-msched\-ar\-data\-spec \-msched\-control\-spec 
+\&\-msched\-br\-in\-data\-spec \-msched\-ar\-in\-data\-spec \-msched\-in\-control\-spec 
+\&\-msched\-spec\-ldc \-msched\-spec\-control\-ldc 
+\&\-msched\-prefer\-non\-data\-spec\-insns \-msched\-prefer\-non\-control\-spec\-insns 
+\&\-msched\-stop\-bits\-after\-every\-cycle \-msched\-count\-spec\-in\-critical\-path 
+\&\-msel\-sched\-dont\-check\-control\-spec \-msched\-fp\-mem\-deps\-zero\-cost 
+\&\-msched\-max\-memory\-insns\-hard\-limit \-msched\-max\-memory\-insns=\fR\fImax-insns\fR
+.Sp
+\&\fI\s-1IA\-64/VMS\s0 Options\fR
+\&\fB\-mvms\-return\-codes \-mdebug\-main=\fR\fIprefix\fR \fB\-mmalloc64\fR
+.Sp
+\&\fI\s-1LM32\s0 Options\fR
+\&\fB\-mbarrel\-shift\-enabled \-mdivide\-enabled \-mmultiply\-enabled 
+\&\-msign\-extend\-enabled \-muser\-enabled\fR
+.Sp
+\&\fIM32R/D Options\fR
+\&\fB\-m32r2 \-m32rx \-m32r 
+\&\-mdebug 
+\&\-malign\-loops \-mno\-align\-loops 
+\&\-missue\-rate=\fR\fInumber\fR 
+\&\fB\-mbranch\-cost=\fR\fInumber\fR 
+\&\fB\-mmodel=\fR\fIcode-size-model-type\fR 
+\&\fB\-msdata=\fR\fIsdata-type\fR 
+\&\fB\-mno\-flush\-func \-mflush\-func=\fR\fIname\fR 
+\&\fB\-mno\-flush\-trap \-mflush\-trap=\fR\fInumber\fR 
+\&\fB\-G\fR \fInum\fR
+.Sp
+\&\fIM32C Options\fR
+\&\fB\-mcpu=\fR\fIcpu\fR \fB\-msim \-memregs=\fR\fInumber\fR
+.Sp
+\&\fIM680x0 Options\fR
+\&\fB\-march=\fR\fIarch\fR  \fB\-mcpu=\fR\fIcpu\fR  \fB\-mtune=\fR\fItune\fR
+\&\fB\-m68000  \-m68020  \-m68020\-40  \-m68020\-60  \-m68030  \-m68040 
+\&\-m68060  \-mcpu32  \-m5200  \-m5206e  \-m528x  \-m5307  \-m5407 
+\&\-mcfv4e  \-mbitfield  \-mno\-bitfield  \-mc68000  \-mc68020 
+\&\-mnobitfield  \-mrtd  \-mno\-rtd  \-mdiv  \-mno\-div  \-mshort 
+\&\-mno\-short  \-mhard\-float  \-m68881  \-msoft\-float  \-mpcrel 
+\&\-malign\-int  \-mstrict\-align  \-msep\-data  \-mno\-sep\-data 
+\&\-mshared\-library\-id=n  \-mid\-shared\-library  \-mno\-id\-shared\-library 
+\&\-mxgot \-mno\-xgot\fR
+.Sp
+\&\fIM68hc1x Options\fR
+\&\fB\-m6811  \-m6812  \-m68hc11  \-m68hc12   \-m68hcs12 
+\&\-mauto\-incdec  \-minmax  \-mlong\-calls  \-mshort 
+\&\-msoft\-reg\-count=\fR\fIcount\fR
+.Sp
+\&\fIMCore Options\fR
+\&\fB\-mhardlit  \-mno\-hardlit  \-mdiv  \-mno\-div  \-mrelax\-immediates 
+\&\-mno\-relax\-immediates  \-mwide\-bitfields  \-mno\-wide\-bitfields 
+\&\-m4byte\-functions  \-mno\-4byte\-functions  \-mcallgraph\-data 
+\&\-mno\-callgraph\-data  \-mslow\-bytes  \-mno\-slow\-bytes  \-mno\-lsim 
+\&\-mlittle\-endian  \-mbig\-endian  \-m210  \-m340  \-mstack\-increment\fR
+.Sp
+\&\fIMeP Options\fR
+\&\fB\-mabsdiff \-mall\-opts \-maverage \-mbased=\fR\fIn\fR \fB\-mbitops 
+\&\-mc=\fR\fIn\fR \fB\-mclip \-mconfig=\fR\fIname\fR \fB\-mcop \-mcop32 \-mcop64 \-mivc2 
+\&\-mdc \-mdiv \-meb \-mel \-mio\-volatile \-ml \-mleadz \-mm \-mminmax 
+\&\-mmult \-mno\-opts \-mrepeat \-ms \-msatur \-msdram \-msim \-msimnovec \-mtf 
+\&\-mtiny=\fR\fIn\fR
+.Sp
+\&\fIMicroBlaze Options\fR
+\&\fB\-msoft\-float \-mhard\-float \-msmall\-divides \-mcpu=\fR\fIcpu\fR 
+\&\fB\-mmemcpy \-mxl\-soft\-mul \-mxl\-soft\-div \-mxl\-barrel\-shift 
+\&\-mxl\-pattern\-compare \-mxl\-stack\-check \-mxl\-gp\-opt \-mno\-clearbss 
+\&\-mxl\-multiply\-high \-mxl\-float\-convert \-mxl\-float\-sqrt 
+\&\-mxl\-mode\-\fR\fIapp-model\fR
+.Sp
+\&\fI\s-1MIPS\s0 Options\fR
+\&\fB\-EL  \-EB  \-march=\fR\fIarch\fR  \fB\-mtune=\fR\fIarch\fR 
+\&\fB\-mips1  \-mips2  \-mips3  \-mips4  \-mips32  \-mips32r2 
+\&\-mips64  \-mips64r2 
+\&\-mips16  \-mno\-mips16  \-mflip\-mips16 
+\&\-minterlink\-mips16  \-mno\-interlink\-mips16 
+\&\-mabi=\fR\fIabi\fR  \fB\-mabicalls  \-mno\-abicalls 
+\&\-mshared  \-mno\-shared  \-mplt  \-mno\-plt  \-mxgot  \-mno\-xgot 
+\&\-mgp32  \-mgp64  \-mfp32  \-mfp64  \-mhard\-float  \-msoft\-float 
+\&\-msingle\-float  \-mdouble\-float  \-mdsp  \-mno\-dsp  \-mdspr2  \-mno\-dspr2 
+\&\-mfpu=\fR\fIfpu-type\fR 
+\&\fB\-msmartmips  \-mno\-smartmips 
+\&\-mpaired\-single  \-mno\-paired\-single  \-mdmx  \-mno\-mdmx 
+\&\-mips3d  \-mno\-mips3d  \-mmt  \-mno\-mt  \-mllsc  \-mno\-llsc 
+\&\-mlong64  \-mlong32  \-msym32  \-mno\-sym32 
+\&\-G\fR\fInum\fR  \fB\-mlocal\-sdata  \-mno\-local\-sdata 
+\&\-mextern\-sdata  \-mno\-extern\-sdata  \-mgpopt  \-mno\-gopt 
+\&\-membedded\-data  \-mno\-embedded\-data 
+\&\-muninit\-const\-in\-rodata  \-mno\-uninit\-const\-in\-rodata 
+\&\-mcode\-readable=\fR\fIsetting\fR 
+\&\fB\-msplit\-addresses  \-mno\-split\-addresses 
+\&\-mexplicit\-relocs  \-mno\-explicit\-relocs 
+\&\-mcheck\-zero\-division  \-mno\-check\-zero\-division 
+\&\-mdivide\-traps  \-mdivide\-breaks 
+\&\-mmemcpy  \-mno\-memcpy  \-mlong\-calls  \-mno\-long\-calls 
+\&\-mmad  \-mno\-mad  \-mfused\-madd  \-mno\-fused\-madd  \-nocpp 
+\&\-mfix\-r4000  \-mno\-fix\-r4000  \-mfix\-r4400  \-mno\-fix\-r4400 
+\&\-mfix\-r10000 \-mno\-fix\-r10000  \-mfix\-vr4120  \-mno\-fix\-vr4120 
+\&\-mfix\-vr4130  \-mno\-fix\-vr4130  \-mfix\-sb1  \-mno\-fix\-sb1 
+\&\-mflush\-func=\fR\fIfunc\fR  \fB\-mno\-flush\-func 
+\&\-mbranch\-cost=\fR\fInum\fR  \fB\-mbranch\-likely  \-mno\-branch\-likely 
+\&\-mfp\-exceptions \-mno\-fp\-exceptions 
+\&\-mvr4130\-align \-mno\-vr4130\-align \-msynci \-mno\-synci 
+\&\-mrelax\-pic\-calls \-mno\-relax\-pic\-calls \-mmcount\-ra\-address\fR
+.Sp
+\&\fI\s-1MMIX\s0 Options\fR
+\&\fB\-mlibfuncs  \-mno\-libfuncs  \-mepsilon  \-mno\-epsilon  \-mabi=gnu 
+\&\-mabi=mmixware  \-mzero\-extend  \-mknuthdiv  \-mtoplevel\-symbols 
+\&\-melf  \-mbranch\-predict  \-mno\-branch\-predict  \-mbase\-addresses 
+\&\-mno\-base\-addresses  \-msingle\-exit  \-mno\-single\-exit\fR
+.Sp
+\&\fI\s-1MN10300\s0 Options\fR
+\&\fB\-mmult\-bug  \-mno\-mult\-bug 
+\&\-mno\-am33 \-mam33 \-mam33\-2 \-mam34 
+\&\-mtune=\fR\fIcpu-type\fR 
+\&\fB\-mreturn\-pointer\-on\-d0 
+\&\-mno\-crt0  \-mrelax \-mliw\fR
+.Sp
+\&\fI\s-1PDP\-11\s0 Options\fR
+\&\fB\-mfpu  \-msoft\-float  \-mac0  \-mno\-ac0  \-m40  \-m45  \-m10 
+\&\-mbcopy  \-mbcopy\-builtin  \-mint32  \-mno\-int16 
+\&\-mint16  \-mno\-int32  \-mfloat32  \-mno\-float64 
+\&\-mfloat64  \-mno\-float32  \-mabshi  \-mno\-abshi 
+\&\-mbranch\-expensive  \-mbranch\-cheap 
+\&\-munix\-asm  \-mdec\-asm\fR
+.Sp
+\&\fIpicoChip Options\fR
+\&\fB\-mae=\fR\fIae_type\fR \fB\-mvliw\-lookahead=\fR\fIN\fR 
+\&\fB\-msymbol\-as\-address \-mno\-inefficient\-warnings\fR
+.Sp
+\&\fIPowerPC Options\fR
+See \s-1RS/6000\s0 and PowerPC Options.
+.Sp
+\&\fI\s-1RS/6000\s0 and PowerPC Options\fR
+\&\fB\-mcpu=\fR\fIcpu-type\fR 
+\&\fB\-mtune=\fR\fIcpu-type\fR 
+\&\fB\-mcmodel=\fR\fIcode-model\fR 
+\&\fB\-mpower  \-mno\-power  \-mpower2  \-mno\-power2 
+\&\-mpowerpc  \-mpowerpc64  \-mno\-powerpc 
+\&\-maltivec  \-mno\-altivec 
+\&\-mpowerpc\-gpopt  \-mno\-powerpc\-gpopt 
+\&\-mpowerpc\-gfxopt  \-mno\-powerpc\-gfxopt 
+\&\-mmfcrf  \-mno\-mfcrf  \-mpopcntb  \-mno\-popcntb \-mpopcntd \-mno\-popcntd 
+\&\-mfprnd  \-mno\-fprnd 
+\&\-mcmpb \-mno\-cmpb \-mmfpgpr \-mno\-mfpgpr \-mhard\-dfp \-mno\-hard\-dfp 
+\&\-mnew\-mnemonics  \-mold\-mnemonics 
+\&\-mfull\-toc   \-mminimal\-toc  \-mno\-fp\-in\-toc  \-mno\-sum\-in\-toc 
+\&\-m64  \-m32  \-mxl\-compat  \-mno\-xl\-compat  \-mpe 
+\&\-malign\-power  \-malign\-natural 
+\&\-msoft\-float  \-mhard\-float  \-mmultiple  \-mno\-multiple 
+\&\-msingle\-float \-mdouble\-float \-msimple\-fpu 
+\&\-mstring  \-mno\-string  \-mupdate  \-mno\-update 
+\&\-mavoid\-indexed\-addresses  \-mno\-avoid\-indexed\-addresses 
+\&\-mfused\-madd  \-mno\-fused\-madd  \-mbit\-align  \-mno\-bit\-align 
+\&\-mstrict\-align  \-mno\-strict\-align  \-mrelocatable 
+\&\-mno\-relocatable  \-mrelocatable\-lib  \-mno\-relocatable\-lib 
+\&\-mtoc  \-mno\-toc  \-mlittle  \-mlittle\-endian  \-mbig  \-mbig\-endian 
+\&\-mdynamic\-no\-pic  \-maltivec \-mswdiv  \-msingle\-pic\-base 
+\&\-mprioritize\-restricted\-insns=\fR\fIpriority\fR 
+\&\fB\-msched\-costly\-dep=\fR\fIdependence_type\fR 
+\&\fB\-minsert\-sched\-nops=\fR\fIscheme\fR 
+\&\fB\-mcall\-sysv  \-mcall\-netbsd 
+\&\-maix\-struct\-return  \-msvr4\-struct\-return 
+\&\-mabi=\fR\fIabi-type\fR \fB\-msecure\-plt \-mbss\-plt 
+\&\-mblock\-move\-inline\-limit=\fR\fInum\fR 
+\&\fB\-misel \-mno\-isel 
+\&\-misel=yes  \-misel=no 
+\&\-mspe \-mno\-spe 
+\&\-mspe=yes  \-mspe=no 
+\&\-mpaired 
+\&\-mgen\-cell\-microcode \-mwarn\-cell\-microcode 
+\&\-mvrsave \-mno\-vrsave 
+\&\-mmulhw \-mno\-mulhw 
+\&\-mdlmzb \-mno\-dlmzb 
+\&\-mfloat\-gprs=yes  \-mfloat\-gprs=no \-mfloat\-gprs=single \-mfloat\-gprs=double 
+\&\-mprototype  \-mno\-prototype 
+\&\-msim  \-mmvme  \-mads  \-myellowknife  \-memb  \-msdata 
+\&\-msdata=\fR\fIopt\fR  \fB\-mvxworks  \-G\fR \fInum\fR  \fB\-pthread 
+\&\-mrecip \-mrecip=\fR\fIopt\fR \fB\-mno\-recip \-mrecip\-precision
+\&\-mno\-recip\-precision 
+\&\-mveclibabi=\fR\fItype\fR \fB\-mfriz \-mno\-friz\fR
+.Sp
+\&\fI\s-1RX\s0 Options\fR
+\&\fB\-m64bit\-doubles  \-m32bit\-doubles  \-fpu  \-nofpu
+\&\-mcpu=
+\&\-mbig\-endian\-data \-mlittle\-endian\-data 
+\&\-msmall\-data 
+\&\-msim  \-mno\-sim
+\&\-mas100\-syntax \-mno\-as100\-syntax
+\&\-mrelax
+\&\-mmax\-constant\-size=
+\&\-mint\-register=
+\&\-msave\-acc\-in\-interrupts\fR
+.Sp
+\&\fIS/390 and zSeries Options\fR
+\&\fB\-mtune=\fR\fIcpu-type\fR  \fB\-march=\fR\fIcpu-type\fR 
+\&\fB\-mhard\-float  \-msoft\-float  \-mhard\-dfp \-mno\-hard\-dfp 
+\&\-mlong\-double\-64 \-mlong\-double\-128 
+\&\-mbackchain  \-mno\-backchain \-mpacked\-stack  \-mno\-packed\-stack 
+\&\-msmall\-exec  \-mno\-small\-exec  \-mmvcle \-mno\-mvcle 
+\&\-m64  \-m31  \-mdebug  \-mno\-debug  \-mesa  \-mzarch 
+\&\-mtpf\-trace \-mno\-tpf\-trace  \-mfused\-madd  \-mno\-fused\-madd 
+\&\-mwarn\-framesize  \-mwarn\-dynamicstack  \-mstack\-size \-mstack\-guard\fR
+.Sp
+\&\fIScore Options\fR
+\&\fB\-meb \-mel 
+\&\-mnhwloop 
+\&\-muls 
+\&\-mmac 
+\&\-mscore5 \-mscore5u \-mscore7 \-mscore7d\fR
+.Sp
+\&\fI\s-1SH\s0 Options\fR
+\&\fB\-m1  \-m2  \-m2e 
+\&\-m2a\-nofpu \-m2a\-single\-only \-m2a\-single \-m2a 
+\&\-m3  \-m3e 
+\&\-m4\-nofpu  \-m4\-single\-only  \-m4\-single  \-m4 
+\&\-m4a\-nofpu \-m4a\-single\-only \-m4a\-single \-m4a \-m4al 
+\&\-m5\-64media  \-m5\-64media\-nofpu 
+\&\-m5\-32media  \-m5\-32media\-nofpu 
+\&\-m5\-compact  \-m5\-compact\-nofpu 
+\&\-mb  \-ml  \-mdalign  \-mrelax 
+\&\-mbigtable \-mfmovd \-mhitachi \-mrenesas \-mno\-renesas \-mnomacsave 
+\&\-mieee \-mno\-ieee \-mbitops  \-misize  \-minline\-ic_invalidate \-mpadstruct 
+\&\-mspace \-mprefergot  \-musermode \-multcost=\fR\fInumber\fR \fB\-mdiv=\fR\fIstrategy\fR 
+\&\fB\-mdivsi3_libfunc=\fR\fIname\fR \fB\-mfixed\-range=\fR\fIregister-range\fR 
+\&\fB\-madjust\-unroll \-mindexed\-addressing \-mgettrcost=\fR\fInumber\fR \fB\-mpt\-fixed 
+\&\-maccumulate\-outgoing\-args \-minvalid\-symbols\fR
+.Sp
+\&\fISolaris 2 Options\fR
+\&\fB\-mimpure\-text  \-mno\-impure\-text 
+\&\-threads \-pthreads \-pthread\fR
+.Sp
+\&\fI\s-1SPARC\s0 Options\fR
+\&\fB\-mcpu=\fR\fIcpu-type\fR 
+\&\fB\-mtune=\fR\fIcpu-type\fR 
+\&\fB\-mcmodel=\fR\fIcode-model\fR 
+\&\fB\-m32  \-m64  \-mapp\-regs  \-mno\-app\-regs 
+\&\-mfaster\-structs  \-mno\-faster\-structs 
+\&\-mfpu  \-mno\-fpu  \-mhard\-float  \-msoft\-float 
+\&\-mhard\-quad\-float  \-msoft\-quad\-float 
+\&\-mlittle\-endian 
+\&\-mstack\-bias  \-mno\-stack\-bias 
+\&\-munaligned\-doubles  \-mno\-unaligned\-doubles 
+\&\-mv8plus  \-mno\-v8plus  \-mvis  \-mno\-vis 
+\&\-mfix\-at697f\fR
+.Sp
+\&\fI\s-1SPU\s0 Options\fR
+\&\fB\-mwarn\-reloc \-merror\-reloc 
+\&\-msafe\-dma \-munsafe\-dma 
+\&\-mbranch\-hints 
+\&\-msmall\-mem \-mlarge\-mem \-mstdmain 
+\&\-mfixed\-range=\fR\fIregister-range\fR 
+\&\fB\-mea32 \-mea64 
+\&\-maddress\-space\-conversion \-mno\-address\-space\-conversion 
+\&\-mcache\-size=\fR\fIcache-size\fR 
+\&\fB\-matomic\-updates \-mno\-atomic\-updates\fR
+.Sp
+\&\fISystem V Options\fR
+\&\fB\-Qy  \-Qn  \-YP,\fR\fIpaths\fR  \fB\-Ym,\fR\fIdir\fR
+.Sp
+\&\fIV850 Options\fR
+\&\fB\-mlong\-calls  \-mno\-long\-calls  \-mep  \-mno\-ep 
+\&\-mprolog\-function  \-mno\-prolog\-function  \-mspace 
+\&\-mtda=\fR\fIn\fR  \fB\-msda=\fR\fIn\fR  \fB\-mzda=\fR\fIn\fR 
+\&\fB\-mapp\-regs  \-mno\-app\-regs 
+\&\-mdisable\-callt  \-mno\-disable\-callt 
+\&\-mv850e2v3 
+\&\-mv850e2 
+\&\-mv850e1 \-mv850es 
+\&\-mv850e 
+\&\-mv850  \-mbig\-switch\fR
+.Sp
+\&\fI\s-1VAX\s0 Options\fR
+\&\fB\-mg  \-mgnu  \-munix\fR
+.Sp
+\&\fIVxWorks Options\fR
+\&\fB\-mrtp  \-non\-static  \-Bstatic  \-Bdynamic 
+\&\-Xbind\-lazy  \-Xbind\-now\fR
+.Sp
+\&\fIx86\-64 Options\fR
+See i386 and x86\-64 Options.
+.Sp
+\&\fIXstormy16 Options\fR
+\&\fB\-msim\fR
+.Sp
+\&\fIXtensa Options\fR
+\&\fB\-mconst16 \-mno\-const16 
+\&\-mfused\-madd  \-mno\-fused\-madd 
+\&\-mforce\-no\-pic 
+\&\-mserialize\-volatile  \-mno\-serialize\-volatile 
+\&\-mtext\-section\-literals  \-mno\-text\-section\-literals 
+\&\-mtarget\-align  \-mno\-target\-align 
+\&\-mlongcalls  \-mno\-longcalls\fR
+.Sp
+\&\fIzSeries Options\fR
+See S/390 and zSeries Options.
+.IP "\fICode Generation Options\fR" 4
+.IX Item "Code Generation Options"
+\&\fB\-fcall\-saved\-\fR\fIreg\fR  \fB\-fcall\-used\-\fR\fIreg\fR 
+\&\fB\-ffixed\-\fR\fIreg\fR  \fB\-fexceptions 
+\&\-fnon\-call\-exceptions  \-funwind\-tables 
+\&\-fasynchronous\-unwind\-tables 
+\&\-finhibit\-size\-directive  \-finstrument\-functions 
+\&\-finstrument\-functions\-exclude\-function\-list=\fR\fIsym\fR\fB,\fR\fIsym\fR\fB,... 
+\&\-finstrument\-functions\-exclude\-file\-list=\fR\fIfile\fR\fB,\fR\fIfile\fR\fB,... 
+\&\-fno\-common  \-fno\-ident 
+\&\-fpcc\-struct\-return  \-fpic  \-fPIC \-fpie \-fPIE 
+\&\-fno\-jump\-tables 
+\&\-frecord\-gcc\-switches 
+\&\-freg\-struct\-return  \-fshort\-enums 
+\&\-fshort\-double  \-fshort\-wchar 
+\&\-fverbose\-asm  \-fpack\-struct[=\fR\fIn\fR\fB]  \-fstack\-check 
+\&\-fstack\-limit\-register=\fR\fIreg\fR  \fB\-fstack\-limit\-symbol=\fR\fIsym\fR 
+\&\fB\-fno\-stack\-limit \-fsplit\-stack 
+\&\-fleading\-underscore  \-ftls\-model=\fR\fImodel\fR 
+\&\fB\-ftrapv  \-fwrapv  \-fbounds\-check 
+\&\-fvisibility \-fstrict\-volatile\-bitfields\fR
+.SS "Options Controlling the Kind of Output"
+.IX Subsection "Options Controlling the Kind of Output"
+Compilation can involve up to four stages: preprocessing, compilation
+proper, assembly and linking, always in that order.  \s-1GCC\s0 is capable of
+preprocessing and compiling several files either into several
+assembler input files, or into one assembler input file; then each
+assembler input file produces an object file, and linking combines all
+the object files (those newly compiled, and those specified as input)
+into an executable file.
+.PP
+For any given input file, the file name suffix determines what kind of
+compilation is done:
+.IP "\fIfile\fR\fB.c\fR" 4
+.IX Item "file.c"
+C source code which must be preprocessed.
+.IP "\fIfile\fR\fB.i\fR" 4
+.IX Item "file.i"
+C source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.ii\fR" 4
+.IX Item "file.ii"
+\&\*(C+ source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.m\fR" 4
+.IX Item "file.m"
+Objective-C source code.  Note that you must link with the \fIlibobjc\fR
+library to make an Objective-C program work.
+.IP "\fIfile\fR\fB.mi\fR" 4
+.IX Item "file.mi"
+Objective-C source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.mm\fR" 4
+.IX Item "file.mm"
+.PD 0
+.IP "\fIfile\fR\fB.M\fR" 4
+.IX Item "file.M"
+.PD
+Objective\-\*(C+ source code.  Note that you must link with the \fIlibobjc\fR
+library to make an Objective\-\*(C+ program work.  Note that \fB.M\fR refers
+to a literal capital M.
+.IP "\fIfile\fR\fB.mii\fR" 4
+.IX Item "file.mii"
+Objective\-\*(C+ source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.h\fR" 4
+.IX Item "file.h"
+C, \*(C+, Objective-C or Objective\-\*(C+ header file to be turned into a
+precompiled header (default), or C, \*(C+ header file to be turned into an
+Ada spec (via the \fB\-fdump\-ada\-spec\fR switch).
+.IP "\fIfile\fR\fB.cc\fR" 4
+.IX Item "file.cc"
+.PD 0
+.IP "\fIfile\fR\fB.cp\fR" 4
+.IX Item "file.cp"
+.IP "\fIfile\fR\fB.cxx\fR" 4
+.IX Item "file.cxx"
+.IP "\fIfile\fR\fB.cpp\fR" 4
+.IX Item "file.cpp"
+.IP "\fIfile\fR\fB.CPP\fR" 4
+.IX Item "file.CPP"
+.IP "\fIfile\fR\fB.c++\fR" 4
+.IX Item "file.c++"
+.IP "\fIfile\fR\fB.C\fR" 4
+.IX Item "file.C"
+.PD
+\&\*(C+ source code which must be preprocessed.  Note that in \fB.cxx\fR,
+the last two letters must both be literally \fBx\fR.  Likewise,
+\&\fB.C\fR refers to a literal capital C.
+.IP "\fIfile\fR\fB.mm\fR" 4
+.IX Item "file.mm"
+.PD 0
+.IP "\fIfile\fR\fB.M\fR" 4
+.IX Item "file.M"
+.PD
+Objective\-\*(C+ source code which must be preprocessed.
+.IP "\fIfile\fR\fB.mii\fR" 4
+.IX Item "file.mii"
+Objective\-\*(C+ source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.hh\fR" 4
+.IX Item "file.hh"
+.PD 0
+.IP "\fIfile\fR\fB.H\fR" 4
+.IX Item "file.H"
+.IP "\fIfile\fR\fB.hp\fR" 4
+.IX Item "file.hp"
+.IP "\fIfile\fR\fB.hxx\fR" 4
+.IX Item "file.hxx"
+.IP "\fIfile\fR\fB.hpp\fR" 4
+.IX Item "file.hpp"
+.IP "\fIfile\fR\fB.HPP\fR" 4
+.IX Item "file.HPP"
+.IP "\fIfile\fR\fB.h++\fR" 4
+.IX Item "file.h++"
+.IP "\fIfile\fR\fB.tcc\fR" 4
+.IX Item "file.tcc"
+.PD
+\&\*(C+ header file to be turned into a precompiled header or Ada spec.
+.IP "\fIfile\fR\fB.f\fR" 4
+.IX Item "file.f"
+.PD 0
+.IP "\fIfile\fR\fB.for\fR" 4
+.IX Item "file.for"
+.IP "\fIfile\fR\fB.ftn\fR" 4
+.IX Item "file.ftn"
+.PD
+Fixed form Fortran source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.F\fR" 4
+.IX Item "file.F"
+.PD 0
+.IP "\fIfile\fR\fB.FOR\fR" 4
+.IX Item "file.FOR"
+.IP "\fIfile\fR\fB.fpp\fR" 4
+.IX Item "file.fpp"
+.IP "\fIfile\fR\fB.FPP\fR" 4
+.IX Item "file.FPP"
+.IP "\fIfile\fR\fB.FTN\fR" 4
+.IX Item "file.FTN"
+.PD
+Fixed form Fortran source code which must be preprocessed (with the traditional
+preprocessor).
+.IP "\fIfile\fR\fB.f90\fR" 4
+.IX Item "file.f90"
+.PD 0
+.IP "\fIfile\fR\fB.f95\fR" 4
+.IX Item "file.f95"
+.IP "\fIfile\fR\fB.f03\fR" 4
+.IX Item "file.f03"
+.IP "\fIfile\fR\fB.f08\fR" 4
+.IX Item "file.f08"
+.PD
+Free form Fortran source code which should not be preprocessed.
+.IP "\fIfile\fR\fB.F90\fR" 4
+.IX Item "file.F90"
+.PD 0
+.IP "\fIfile\fR\fB.F95\fR" 4
+.IX Item "file.F95"
+.IP "\fIfile\fR\fB.F03\fR" 4
+.IX Item "file.F03"
+.IP "\fIfile\fR\fB.F08\fR" 4
+.IX Item "file.F08"
+.PD
+Free form Fortran source code which must be preprocessed (with the
+traditional preprocessor).
+.IP "\fIfile\fR\fB.go\fR" 4
+.IX Item "file.go"
+Go source code.
+.IP "\fIfile\fR\fB.ads\fR" 4
+.IX Item "file.ads"
+Ada source code file which contains a library unit declaration (a
+declaration of a package, subprogram, or generic, or a generic
+instantiation), or a library unit renaming declaration (a package,
+generic, or subprogram renaming declaration).  Such files are also
+called \fIspecs\fR.
+.IP "\fIfile\fR\fB.adb\fR" 4
+.IX Item "file.adb"
+Ada source code file containing a library unit body (a subprogram or
+package body).  Such files are also called \fIbodies\fR.
+.IP "\fIfile\fR\fB.s\fR" 4
+.IX Item "file.s"
+Assembler code.
+.IP "\fIfile\fR\fB.S\fR" 4
+.IX Item "file.S"
+.PD 0
+.IP "\fIfile\fR\fB.sx\fR" 4
+.IX Item "file.sx"
+.PD
+Assembler code which must be preprocessed.
+.IP "\fIother\fR" 4
+.IX Item "other"
+An object file to be fed straight into linking.
+Any file name with no recognized suffix is treated this way.
+.PP
+You can specify the input language explicitly with the \fB\-x\fR option:
+.IP "\fB\-x\fR \fIlanguage\fR" 4
+.IX Item "-x language"
+Specify explicitly the \fIlanguage\fR for the following input files
+(rather than letting the compiler choose a default based on the file
+name suffix).  This option applies to all following input files until
+the next \fB\-x\fR option.  Possible values for \fIlanguage\fR are:
+.Sp
+.Vb 9
+\&        c  c\-header  cpp\-output
+\&        c++  c++\-header  c++\-cpp\-output
+\&        objective\-c  objective\-c\-header  objective\-c\-cpp\-output
+\&        objective\-c++ objective\-c++\-header objective\-c++\-cpp\-output
+\&        assembler  assembler\-with\-cpp
+\&        ada
+\&        f77  f77\-cpp\-input f95  f95\-cpp\-input
+\&        go
+\&        java
+.Ve
+.IP "\fB\-x none\fR" 4
+.IX Item "-x none"
+Turn off any specification of a language, so that subsequent files are
+handled according to their file name suffixes (as they are if \fB\-x\fR
+has not been used at all).
+.IP "\fB\-pass\-exit\-codes\fR" 4
+.IX Item "-pass-exit-codes"
+Normally the \fBgcc\fR program will exit with the code of 1 if any
+phase of the compiler returns a non-success return code.  If you specify
+\&\fB\-pass\-exit\-codes\fR, the \fBgcc\fR program will instead return with
+numerically highest error produced by any phase that returned an error
+indication.  The C, \*(C+, and Fortran frontends return 4, if an internal
+compiler error is encountered.
+.PP
+If you only want some of the stages of compilation, you can use
+\&\fB\-x\fR (or filename suffixes) to tell \fBgcc\fR where to start, and
+one of the options \fB\-c\fR, \fB\-S\fR, or \fB\-E\fR to say where
+\&\fBgcc\fR is to stop.  Note that some combinations (for example,
+\&\fB\-x cpp-output \-E\fR) instruct \fBgcc\fR to do nothing at all.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+Compile or assemble the source files, but do not link.  The linking
+stage simply is not done.  The ultimate output is in the form of an
+object file for each source file.
+.Sp
+By default, the object file name for a source file is made by replacing
+the suffix \fB.c\fR, \fB.i\fR, \fB.s\fR, etc., with \fB.o\fR.
+.Sp
+Unrecognized input files, not requiring compilation or assembly, are
+ignored.
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+Stop after the stage of compilation proper; do not assemble.  The output
+is in the form of an assembler code file for each non-assembler input
+file specified.
+.Sp
+By default, the assembler file name for a source file is made by
+replacing the suffix \fB.c\fR, \fB.i\fR, etc., with \fB.s\fR.
+.Sp
+Input files that don't require compilation are ignored.
+.IP "\fB\-E\fR" 4
+.IX Item "-E"
+Stop after the preprocessing stage; do not run the compiler proper.  The
+output is in the form of preprocessed source code, which is sent to the
+standard output.
+.Sp
+Input files which don't require preprocessing are ignored.
+.IP "\fB\-o\fR \fIfile\fR" 4
+.IX Item "-o file"
+Place output in file \fIfile\fR.  This applies regardless to whatever
+sort of output is being produced, whether it be an executable file,
+an object file, an assembler file or preprocessed C code.
+.Sp
+If \fB\-o\fR is not specified, the default is to put an executable
+file in \fIa.out\fR, the object file for
+\&\fI\fIsource\fI.\fIsuffix\fI\fR in \fI\fIsource\fI.o\fR, its
+assembler file in \fI\fIsource\fI.s\fR, a precompiled header file in
+\&\fI\fIsource\fI.\fIsuffix\fI.gch\fR, and all preprocessed C source on
+standard output.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+Print (on standard error output) the commands executed to run the stages
+of compilation.  Also print the version number of the compiler driver
+program and of the preprocessor and the compiler proper.
+.IP "\fB\-###\fR" 4
+.IX Item "-###"
+Like \fB\-v\fR except the commands are not executed and arguments
+are quoted unless they contain only alphanumeric characters or \f(CW\*(C`./\-_\*(C'\fR.
+This is useful for shell scripts to capture the driver-generated command lines.
+.IP "\fB\-pipe\fR" 4
+.IX Item "-pipe"
+Use pipes rather than temporary files for communication between the
+various stages of compilation.  This fails to work on some systems where
+the assembler is unable to read from a pipe; but the \s-1GNU\s0 assembler has
+no trouble.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Print (on the standard output) a description of the command line options
+understood by \fBgcc\fR.  If the \fB\-v\fR option is also specified
+then \fB\-\-help\fR will also be passed on to the various processes
+invoked by \fBgcc\fR, so that they can display the command line options
+they accept.  If the \fB\-Wextra\fR option has also been specified
+(prior to the \fB\-\-help\fR option), then command line options which
+have no documentation associated with them will also be displayed.
+.IP "\fB\-\-target\-help\fR" 4
+.IX Item "--target-help"
+Print (on the standard output) a description of target-specific command
+line options for each tool.  For some targets extra target-specific
+information may also be printed.
+.IP "\fB\-\-help={\fR\fIclass\fR|[\fB^\fR]\fIqualifier\fR\fB}\fR[\fB,...\fR]" 4
+.IX Item "--help={class|[^]qualifier}[,...]"
+Print (on the standard output) a description of the command line
+options understood by the compiler that fit into all specified classes
+and qualifiers.  These are the supported classes:
+.RS 4
+.IP "\fBoptimizers\fR" 4
+.IX Item "optimizers"
+This will display all of the optimization options supported by the
+compiler.
+.IP "\fBwarnings\fR" 4
+.IX Item "warnings"
+This will display all of the options controlling warning messages
+produced by the compiler.
+.IP "\fBtarget\fR" 4
+.IX Item "target"
+This will display target-specific options.  Unlike the
+\&\fB\-\-target\-help\fR option however, target-specific options of the
+linker and assembler will not be displayed.  This is because those
+tools do not currently support the extended \fB\-\-help=\fR syntax.
+.IP "\fBparams\fR" 4
+.IX Item "params"
+This will display the values recognized by the \fB\-\-param\fR
+option.
+.IP "\fIlanguage\fR" 4
+.IX Item "language"
+This will display the options supported for \fIlanguage\fR, where
+\&\fIlanguage\fR is the name of one of the languages supported in this
+version of \s-1GCC\s0.
+.IP "\fBcommon\fR" 4
+.IX Item "common"
+This will display the options that are common to all languages.
+.RE
+.RS 4
+.Sp
+These are the supported qualifiers:
+.IP "\fBundocumented\fR" 4
+.IX Item "undocumented"
+Display only those options which are undocumented.
+.IP "\fBjoined\fR" 4
+.IX Item "joined"
+Display options which take an argument that appears after an equal
+sign in the same continuous piece of text, such as:
+\&\fB\-\-help=target\fR.
+.IP "\fBseparate\fR" 4
+.IX Item "separate"
+Display options which take an argument that appears as a separate word
+following the original option, such as: \fB\-o output-file\fR.
+.RE
+.RS 4
+.Sp
+Thus for example to display all the undocumented target-specific
+switches supported by the compiler the following can be used:
+.Sp
+.Vb 1
+\&        \-\-help=target,undocumented
+.Ve
+.Sp
+The sense of a qualifier can be inverted by prefixing it with the
+\&\fB^\fR character, so for example to display all binary warning
+options (i.e., ones that are either on or off and that do not take an
+argument), which have a description the following can be used:
+.Sp
+.Vb 1
+\&        \-\-help=warnings,^joined,^undocumented
+.Ve
+.Sp
+The argument to \fB\-\-help=\fR should not consist solely of inverted
+qualifiers.
+.Sp
+Combining several classes is possible, although this usually
+restricts the output by so much that there is nothing to display.  One
+case where it does work however is when one of the classes is
+\&\fItarget\fR.  So for example to display all the target-specific
+optimization options the following can be used:
+.Sp
+.Vb 1
+\&        \-\-help=target,optimizers
+.Ve
+.Sp
+The \fB\-\-help=\fR option can be repeated on the command line.  Each
+successive use will display its requested class of options, skipping
+those that have already been displayed.
+.Sp
+If the \fB\-Q\fR option appears on the command line before the
+\&\fB\-\-help=\fR option, then the descriptive text displayed by
+\&\fB\-\-help=\fR is changed.  Instead of describing the displayed
+options, an indication is given as to whether the option is enabled,
+disabled or set to a specific value (assuming that the compiler
+knows this at the point where the \fB\-\-help=\fR option is used).
+.Sp
+Here is a truncated example from the \s-1ARM\s0 port of \fBgcc\fR:
+.Sp
+.Vb 5
+\&          % gcc \-Q \-mabi=2 \-\-help=target \-c
+\&          The following options are target specific:
+\&          \-mabi=                                2
+\&          \-mabort\-on\-noreturn                   [disabled]
+\&          \-mapcs                                [disabled]
+.Ve
+.Sp
+The output is sensitive to the effects of previous command line
+options, so for example it is possible to find out which optimizations
+are enabled at \fB\-O2\fR by using:
+.Sp
+.Vb 1
+\&        \-Q \-O2 \-\-help=optimizers
+.Ve
+.Sp
+Alternatively you can discover which binary optimizations are enabled
+by \fB\-O3\fR by using:
+.Sp
+.Vb 3
+\&        gcc \-c \-Q \-O3 \-\-help=optimizers > /tmp/O3\-opts
+\&        gcc \-c \-Q \-O2 \-\-help=optimizers > /tmp/O2\-opts
+\&        diff /tmp/O2\-opts /tmp/O3\-opts | grep enabled
+.Ve
+.RE
+.IP "\fB\-no\-canonical\-prefixes\fR" 4
+.IX Item "-no-canonical-prefixes"
+Do not expand any symbolic links, resolve references to \fB/../\fR
+or \fB/./\fR, or make the path absolute when generating a relative
+prefix.
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+Display the version number and copyrights of the invoked \s-1GCC\s0.
+.IP "\fB\-wrapper\fR" 4
+.IX Item "-wrapper"
+Invoke all subcommands under a wrapper program.  The name of the
+wrapper program and its parameters are passed as a comma separated
+list.
+.Sp
+.Vb 1
+\&        gcc \-c t.c \-wrapper gdb,\-\-args
+.Ve
+.Sp
+This will invoke all subprograms of \fBgcc\fR under
+\&\fBgdb \-\-args\fR, thus the invocation of \fBcc1\fR will be
+\&\fBgdb \-\-args cc1 ...\fR.
+.IP "\fB\-fplugin=\fR\fIname\fR\fB.so\fR" 4
+.IX Item "-fplugin=name.so"
+Load the plugin code in file \fIname\fR.so, assumed to be a
+shared object to be dlopen'd by the compiler.  The base name of
+the shared object file is used to identify the plugin for the
+purposes of argument parsing (See
+\&\fB\-fplugin\-arg\-\fR\fIname\fR\fB\-\fR\fIkey\fR\fB=\fR\fIvalue\fR below).
+Each plugin should define the callback functions specified in the
+Plugins \s-1API\s0.
+.IP "\fB\-fplugin\-arg\-\fR\fIname\fR\fB\-\fR\fIkey\fR\fB=\fR\fIvalue\fR" 4
+.IX Item "-fplugin-arg-name-key=value"
+Define an argument called \fIkey\fR with a value of \fIvalue\fR
+for the plugin called \fIname\fR.
+.IP "\fB\-fdump\-ada\-spec\fR[\fB\-slim\fR]" 4
+.IX Item "-fdump-ada-spec[-slim]"
+For C and \*(C+ source and include files, generate corresponding Ada
+specs.
+.IP "\fB\-fdump\-go\-spec=\fR\fIfile\fR" 4
+.IX Item "-fdump-go-spec=file"
+For input files in any language, generate corresponding Go
+declarations in \fIfile\fR.  This generates Go \f(CW\*(C`const\*(C'\fR,
+\&\f(CW\*(C`type\*(C'\fR, \f(CW\*(C`var\*(C'\fR, and \f(CW\*(C`func\*(C'\fR declarations which may be a
+useful way to start writing a Go interface to code written in some
+other language.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR.  The options read are
+inserted in place of the original @\fIfile\fR option.  If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace.  A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes.  Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash.  The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SS "Compiling \*(C+ Programs"
+.IX Subsection "Compiling  Programs"
+\&\*(C+ source files conventionally use one of the suffixes \fB.C\fR,
+\&\fB.cc\fR, \fB.cpp\fR, \fB.CPP\fR, \fB.c++\fR, \fB.cp\fR, or
+\&\fB.cxx\fR; \*(C+ header files often use \fB.hh\fR, \fB.hpp\fR,
+\&\fB.H\fR, or (for shared template code) \fB.tcc\fR; and
+preprocessed \*(C+ files use the suffix \fB.ii\fR.  \s-1GCC\s0 recognizes
+files with these names and compiles them as \*(C+ programs even if you
+call the compiler the same way as for compiling C programs (usually
+with the name \fBgcc\fR).
+.PP
+However, the use of \fBgcc\fR does not add the \*(C+ library.
+\&\fBg++\fR is a program that calls \s-1GCC\s0 and treats \fB.c\fR,
+\&\fB.h\fR and \fB.i\fR files as \*(C+ source files instead of C source
+files unless \fB\-x\fR is used, and automatically specifies linking
+against the \*(C+ library.  This program is also useful when
+precompiling a C header file with a \fB.h\fR extension for use in \*(C+
+compilations.  On many systems, \fBg++\fR is also installed with
+the name \fBc++\fR.
+.PP
+When you compile \*(C+ programs, you may specify many of the same
+command-line options that you use for compiling programs in any
+language; or command-line options meaningful for C and related
+languages; or options that are meaningful only for \*(C+ programs.
+.SS "Options Controlling C Dialect"
+.IX Subsection "Options Controlling C Dialect"
+The following options control the dialect of C (or languages derived
+from C, such as \*(C+, Objective-C and Objective\-\*(C+) that the compiler
+accepts:
+.IP "\fB\-ansi\fR" 4
+.IX Item "-ansi"
+In C mode, this is equivalent to \fB\-std=c90\fR. In \*(C+ mode, it is
+equivalent to \fB\-std=c++98\fR.
+.Sp
+This turns off certain features of \s-1GCC\s0 that are incompatible with \s-1ISO\s0
+C90 (when compiling C code), or of standard \*(C+ (when compiling \*(C+ code),
+such as the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, and
+predefined macros such as \f(CW\*(C`unix\*(C'\fR and \f(CW\*(C`vax\*(C'\fR that identify the
+type of system you are using.  It also enables the undesirable and
+rarely used \s-1ISO\s0 trigraph feature.  For the C compiler,
+it disables recognition of \*(C+ style \fB//\fR comments as well as
+the \f(CW\*(C`inline\*(C'\fR keyword.
+.Sp
+The alternate keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_extension_\|_\*(C'\fR,
+\&\f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR continue to work despite
+\&\fB\-ansi\fR.  You would not want to use them in an \s-1ISO\s0 C program, of
+course, but it is useful to put them in header files that might be included
+in compilations done with \fB\-ansi\fR.  Alternate predefined macros
+such as \f(CW\*(C`_\|_unix_\|_\*(C'\fR and \f(CW\*(C`_\|_vax_\|_\*(C'\fR are also available, with or
+without \fB\-ansi\fR.
+.Sp
+The \fB\-ansi\fR option does not cause non-ISO programs to be
+rejected gratuitously.  For that, \fB\-pedantic\fR is required in
+addition to \fB\-ansi\fR.
+.Sp
+The macro \f(CW\*(C`_\|_STRICT_ANSI_\|_\*(C'\fR is predefined when the \fB\-ansi\fR
+option is used.  Some header files may notice this macro and refrain
+from declaring certain functions or defining certain macros that the
+\&\s-1ISO\s0 standard doesn't call for; this is to avoid interfering with any
+programs that might use these names for other things.
+.Sp
+Functions that would normally be built in but do not have semantics
+defined by \s-1ISO\s0 C (such as \f(CW\*(C`alloca\*(C'\fR and \f(CW\*(C`ffs\*(C'\fR) are not built-in
+functions when \fB\-ansi\fR is used.
+.IP "\fB\-std=\fR" 4
+.IX Item "-std="
+Determine the language standard.   This option
+is currently only supported when compiling C or \*(C+.
+.Sp
+The compiler can accept several base standards, such as \fBc90\fR or
+\&\fBc++98\fR, and \s-1GNU\s0 dialects of those standards, such as
+\&\fBgnu90\fR or \fBgnu++98\fR.  By specifying a base standard, the
+compiler will accept all programs following that standard and those
+using \s-1GNU\s0 extensions that do not contradict it.  For example,
+\&\fB\-std=c90\fR turns off certain features of \s-1GCC\s0 that are
+incompatible with \s-1ISO\s0 C90, such as the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR
+keywords, but not other \s-1GNU\s0 extensions that do not have a meaning in
+\&\s-1ISO\s0 C90, such as omitting the middle term of a \f(CW\*(C`?:\*(C'\fR
+expression. On the other hand, by specifying a \s-1GNU\s0 dialect of a
+standard, all features the compiler support are enabled, even when
+those features change the meaning of the base standard and some
+strict-conforming programs may be rejected.  The particular standard
+is used by \fB\-pedantic\fR to identify which features are \s-1GNU\s0
+extensions given that version of the standard. For example
+\&\fB\-std=gnu90 \-pedantic\fR would warn about \*(C+ style \fB//\fR
+comments, while \fB\-std=gnu99 \-pedantic\fR would not.
+.Sp
+A value for this option must be provided; possible values are
+.RS 4
+.IP "\fBc90\fR" 4
+.IX Item "c90"
+.PD 0
+.IP "\fBc89\fR" 4
+.IX Item "c89"
+.IP "\fBiso9899:1990\fR" 4
+.IX Item "iso9899:1990"
+.PD
+Support all \s-1ISO\s0 C90 programs (certain \s-1GNU\s0 extensions that conflict
+with \s-1ISO\s0 C90 are disabled). Same as \fB\-ansi\fR for C code.
+.IP "\fBiso9899:199409\fR" 4
+.IX Item "iso9899:199409"
+\&\s-1ISO\s0 C90 as modified in amendment 1.
+.IP "\fBc99\fR" 4
+.IX Item "c99"
+.PD 0
+.IP "\fBc9x\fR" 4
+.IX Item "c9x"
+.IP "\fBiso9899:1999\fR" 4
+.IX Item "iso9899:1999"
+.IP "\fBiso9899:199x\fR" 4
+.IX Item "iso9899:199x"
+.PD
+\&\s-1ISO\s0 C99.  Note that this standard is not yet fully supported; see
+<\fBhttp://gcc.gnu.org/gcc\-4.6/c99status.html\fR> for more information.  The
+names \fBc9x\fR and \fBiso9899:199x\fR are deprecated.
+.IP "\fBc1x\fR" 4
+.IX Item "c1x"
+\&\s-1ISO\s0 C1X, the draft of the next revision of the \s-1ISO\s0 C standard.
+Support is limited and experimental and features enabled by this
+option may be changed or removed if changed in or removed from the
+standard draft.
+.IP "\fBgnu90\fR" 4
+.IX Item "gnu90"
+.PD 0
+.IP "\fBgnu89\fR" 4
+.IX Item "gnu89"
+.PD
+\&\s-1GNU\s0 dialect of \s-1ISO\s0 C90 (including some C99 features). This
+is the default for C code.
+.IP "\fBgnu99\fR" 4
+.IX Item "gnu99"
+.PD 0
+.IP "\fBgnu9x\fR" 4
+.IX Item "gnu9x"
+.PD
+\&\s-1GNU\s0 dialect of \s-1ISO\s0 C99.  When \s-1ISO\s0 C99 is fully implemented in \s-1GCC\s0,
+this will become the default.  The name \fBgnu9x\fR is deprecated.
+.IP "\fBgnu1x\fR" 4
+.IX Item "gnu1x"
+\&\s-1GNU\s0 dialect of \s-1ISO\s0 C1X.  Support is limited and experimental and
+features enabled by this option may be changed or removed if changed
+in or removed from the standard draft.
+.IP "\fBc++98\fR" 4
+.IX Item "c++98"
+The 1998 \s-1ISO\s0 \*(C+ standard plus amendments. Same as \fB\-ansi\fR for
+\&\*(C+ code.
+.IP "\fBgnu++98\fR" 4
+.IX Item "gnu++98"
+\&\s-1GNU\s0 dialect of \fB\-std=c++98\fR.  This is the default for
+\&\*(C+ code.
+.IP "\fBc++0x\fR" 4
+.IX Item "c++0x"
+The working draft of the upcoming \s-1ISO\s0 \*(C+0x standard. This option
+enables experimental features that are likely to be included in
+\&\*(C+0x. The working draft is constantly changing, and any feature that is
+enabled by this flag may be removed from future versions of \s-1GCC\s0 if it is
+not part of the \*(C+0x standard.
+.IP "\fBgnu++0x\fR" 4
+.IX Item "gnu++0x"
+\&\s-1GNU\s0 dialect of \fB\-std=c++0x\fR. This option enables
+experimental features that may be removed in future versions of \s-1GCC\s0.
+.RE
+.RS 4
+.RE
+.IP "\fB\-fgnu89\-inline\fR" 4
+.IX Item "-fgnu89-inline"
+The option \fB\-fgnu89\-inline\fR tells \s-1GCC\s0 to use the traditional
+\&\s-1GNU\s0 semantics for \f(CW\*(C`inline\*(C'\fR functions when in C99 mode.
+  This option
+is accepted and ignored by \s-1GCC\s0 versions 4.1.3 up to but not including
+4.3.  In \s-1GCC\s0 versions 4.3 and later it changes the behavior of \s-1GCC\s0 in
+C99 mode.  Using this option is roughly equivalent to adding the
+\&\f(CW\*(C`gnu_inline\*(C'\fR function attribute to all inline functions.
+.Sp
+The option \fB\-fno\-gnu89\-inline\fR explicitly tells \s-1GCC\s0 to use the
+C99 semantics for \f(CW\*(C`inline\*(C'\fR when in C99 or gnu99 mode (i.e., it
+specifies the default behavior).  This option was first supported in
+\&\s-1GCC\s0 4.3.  This option is not supported in \fB\-std=c90\fR or
+\&\fB\-std=gnu90\fR mode.
+.Sp
+The preprocessor macros \f(CW\*(C`_\|_GNUC_GNU_INLINE_\|_\*(C'\fR and
+\&\f(CW\*(C`_\|_GNUC_STDC_INLINE_\|_\*(C'\fR may be used to check which semantics are
+in effect for \f(CW\*(C`inline\*(C'\fR functions.
+.IP "\fB\-aux\-info\fR \fIfilename\fR" 4
+.IX Item "-aux-info filename"
+Output to the given filename prototyped declarations for all functions
+declared and/or defined in a translation unit, including those in header
+files.  This option is silently ignored in any language other than C.
+.Sp
+Besides declarations, the file indicates, in comments, the origin of
+each declaration (source file and line), whether the declaration was
+implicit, prototyped or unprototyped (\fBI\fR, \fBN\fR for new or
+\&\fBO\fR for old, respectively, in the first character after the line
+number and the colon), and whether it came from a declaration or a
+definition (\fBC\fR or \fBF\fR, respectively, in the following
+character).  In the case of function definitions, a K&R\-style list of
+arguments followed by their declarations is also provided, inside
+comments, after the declaration.
+.IP "\fB\-fno\-asm\fR" 4
+.IX Item "-fno-asm"
+Do not recognize \f(CW\*(C`asm\*(C'\fR, \f(CW\*(C`inline\*(C'\fR or \f(CW\*(C`typeof\*(C'\fR as a
+keyword, so that code can use these words as identifiers.  You can use
+the keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR
+instead.  \fB\-ansi\fR implies \fB\-fno\-asm\fR.
+.Sp
+In \*(C+, this switch only affects the \f(CW\*(C`typeof\*(C'\fR keyword, since
+\&\f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`inline\*(C'\fR are standard keywords.  You may want to
+use the \fB\-fno\-gnu\-keywords\fR flag instead, which has the same
+effect.  In C99 mode (\fB\-std=c99\fR or \fB\-std=gnu99\fR), this
+switch only affects the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, since
+\&\f(CW\*(C`inline\*(C'\fR is a standard keyword in \s-1ISO\s0 C99.
+.IP "\fB\-fno\-builtin\fR" 4
+.IX Item "-fno-builtin"
+.PD 0
+.IP "\fB\-fno\-builtin\-\fR\fIfunction\fR" 4
+.IX Item "-fno-builtin-function"
+.PD
+Don't recognize built-in functions that do not begin with
+\&\fB_\|_builtin_\fR as prefix.
+.Sp
+\&\s-1GCC\s0 normally generates special code to handle certain built-in functions
+more efficiently; for instance, calls to \f(CW\*(C`alloca\*(C'\fR may become single
+instructions that adjust the stack directly, and calls to \f(CW\*(C`memcpy\*(C'\fR
+may become inline copy loops.  The resulting code is often both smaller
+and faster, but since the function calls no longer appear as such, you
+cannot set a breakpoint on those calls, nor can you change the behavior
+of the functions by linking with a different library.  In addition,
+when a function is recognized as a built-in function, \s-1GCC\s0 may use
+information about that function to warn about problems with calls to
+that function, or to generate more efficient code, even if the
+resulting code still contains calls to that function.  For example,
+warnings are given with \fB\-Wformat\fR for bad calls to
+\&\f(CW\*(C`printf\*(C'\fR, when \f(CW\*(C`printf\*(C'\fR is built in, and \f(CW\*(C`strlen\*(C'\fR is
+known not to modify global memory.
+.Sp
+With the \fB\-fno\-builtin\-\fR\fIfunction\fR option
+only the built-in function \fIfunction\fR is
+disabled.  \fIfunction\fR must not begin with \fB_\|_builtin_\fR.  If a
+function is named that is not built-in in this version of \s-1GCC\s0, this
+option is ignored.  There is no corresponding
+\&\fB\-fbuiltin\-\fR\fIfunction\fR option; if you wish to enable
+built-in functions selectively when using \fB\-fno\-builtin\fR or
+\&\fB\-ffreestanding\fR, you may define macros such as:
+.Sp
+.Vb 2
+\&        #define abs(n)          _\|_builtin_abs ((n))
+\&        #define strcpy(d, s)    _\|_builtin_strcpy ((d), (s))
+.Ve
+.IP "\fB\-fhosted\fR" 4
+.IX Item "-fhosted"
+Assert that compilation takes place in a hosted environment.  This implies
+\&\fB\-fbuiltin\fR.  A hosted environment is one in which the
+entire standard library is available, and in which \f(CW\*(C`main\*(C'\fR has a return
+type of \f(CW\*(C`int\*(C'\fR.  Examples are nearly everything except a kernel.
+This is equivalent to \fB\-fno\-freestanding\fR.
+.IP "\fB\-ffreestanding\fR" 4
+.IX Item "-ffreestanding"
+Assert that compilation takes place in a freestanding environment.  This
+implies \fB\-fno\-builtin\fR.  A freestanding environment
+is one in which the standard library may not exist, and program startup may
+not necessarily be at \f(CW\*(C`main\*(C'\fR.  The most obvious example is an \s-1OS\s0 kernel.
+This is equivalent to \fB\-fno\-hosted\fR.
+.IP "\fB\-fopenmp\fR" 4
+.IX Item "-fopenmp"
+Enable handling of OpenMP directives \f(CW\*(C`#pragma omp\*(C'\fR in C/\*(C+ and
+\&\f(CW\*(C`!$omp\*(C'\fR in Fortran.  When \fB\-fopenmp\fR is specified, the
+compiler generates parallel code according to the OpenMP Application
+Program Interface v3.0 <\fBhttp://www.openmp.org/\fR>.  This option
+implies \fB\-pthread\fR, and thus is only supported on targets that
+have support for \fB\-pthread\fR.
+.IP "\fB\-fms\-extensions\fR" 4
+.IX Item "-fms-extensions"
+Accept some non-standard constructs used in Microsoft header files.
+.Sp
+In \*(C+ code, this allows member names in structures to be similar
+to previous types declarations.
+.Sp
+.Vb 4
+\&        typedef int UOW;
+\&        struct ABC {
+\&          UOW UOW;
+\&        };
+.Ve
+.Sp
+Some cases of unnamed fields in structures and unions are only
+accepted with this option.
+.IP "\fB\-fplan9\-extensions\fR" 4
+.IX Item "-fplan9-extensions"
+Accept some non-standard constructs used in Plan 9 code.
+.Sp
+This enables \fB\-fms\-extensions\fR, permits passing pointers to
+structures with anonymous fields to functions which expect pointers to
+elements of the type of the field, and permits referring to anonymous
+fields declared using a typedef.    This is only
+supported for C, not \*(C+.
+.IP "\fB\-trigraphs\fR" 4
+.IX Item "-trigraphs"
+Support \s-1ISO\s0 C trigraphs.  The \fB\-ansi\fR option (and \fB\-std\fR
+options for strict \s-1ISO\s0 C conformance) implies \fB\-trigraphs\fR.
+.IP "\fB\-no\-integrated\-cpp\fR" 4
+.IX Item "-no-integrated-cpp"
+Performs a compilation in two passes: preprocessing and compiling.  This
+option allows a user supplied \*(L"cc1\*(R", \*(L"cc1plus\*(R", or \*(L"cc1obj\*(R" via the
+\&\fB\-B\fR option.  The user supplied compilation step can then add in
+an additional preprocessing step after normal preprocessing but before
+compiling.  The default is to use the integrated cpp (internal cpp)
+.Sp
+The semantics of this option will change if \*(L"cc1\*(R", \*(L"cc1plus\*(R", and
+\&\*(L"cc1obj\*(R" are merged.
+.IP "\fB\-traditional\fR" 4
+.IX Item "-traditional"
+.PD 0
+.IP "\fB\-traditional\-cpp\fR" 4
+.IX Item "-traditional-cpp"
+.PD
+Formerly, these options caused \s-1GCC\s0 to attempt to emulate a pre-standard
+C compiler.  They are now only supported with the \fB\-E\fR switch.
+The preprocessor continues to support a pre-standard mode.  See the \s-1GNU\s0
+\&\s-1CPP\s0 manual for details.
+.IP "\fB\-fcond\-mismatch\fR" 4
+.IX Item "-fcond-mismatch"
+Allow conditional expressions with mismatched types in the second and
+third arguments.  The value of such an expression is void.  This option
+is not supported for \*(C+.
+.IP "\fB\-flax\-vector\-conversions\fR" 4
+.IX Item "-flax-vector-conversions"
+Allow implicit conversions between vectors with differing numbers of
+elements and/or incompatible element types.  This option should not be
+used for new code.
+.IP "\fB\-funsigned\-char\fR" 4
+.IX Item "-funsigned-char"
+Let the type \f(CW\*(C`char\*(C'\fR be unsigned, like \f(CW\*(C`unsigned char\*(C'\fR.
+.Sp
+Each kind of machine has a default for what \f(CW\*(C`char\*(C'\fR should
+be.  It is either like \f(CW\*(C`unsigned char\*(C'\fR by default or like
+\&\f(CW\*(C`signed char\*(C'\fR by default.
+.Sp
+Ideally, a portable program should always use \f(CW\*(C`signed char\*(C'\fR or
+\&\f(CW\*(C`unsigned char\*(C'\fR when it depends on the signedness of an object.
+But many programs have been written to use plain \f(CW\*(C`char\*(C'\fR and
+expect it to be signed, or expect it to be unsigned, depending on the
+machines they were written for.  This option, and its inverse, let you
+make such a program work with the opposite default.
+.Sp
+The type \f(CW\*(C`char\*(C'\fR is always a distinct type from each of
+\&\f(CW\*(C`signed char\*(C'\fR or \f(CW\*(C`unsigned char\*(C'\fR, even though its behavior
+is always just like one of those two.
+.IP "\fB\-fsigned\-char\fR" 4
+.IX Item "-fsigned-char"
+Let the type \f(CW\*(C`char\*(C'\fR be signed, like \f(CW\*(C`signed char\*(C'\fR.
+.Sp
+Note that this is equivalent to \fB\-fno\-unsigned\-char\fR, which is
+the negative form of \fB\-funsigned\-char\fR.  Likewise, the option
+\&\fB\-fno\-signed\-char\fR is equivalent to \fB\-funsigned\-char\fR.
+.IP "\fB\-fsigned\-bitfields\fR" 4
+.IX Item "-fsigned-bitfields"
+.PD 0
+.IP "\fB\-funsigned\-bitfields\fR" 4
+.IX Item "-funsigned-bitfields"
+.IP "\fB\-fno\-signed\-bitfields\fR" 4
+.IX Item "-fno-signed-bitfields"
+.IP "\fB\-fno\-unsigned\-bitfields\fR" 4
+.IX Item "-fno-unsigned-bitfields"
+.PD
+These options control whether a bit-field is signed or unsigned, when the
+declaration does not use either \f(CW\*(C`signed\*(C'\fR or \f(CW\*(C`unsigned\*(C'\fR.  By
+default, such a bit-field is signed, because this is consistent: the
+basic integer types such as \f(CW\*(C`int\*(C'\fR are signed types.
+.SS "Options Controlling \*(C+ Dialect"
+.IX Subsection "Options Controlling  Dialect"
+This section describes the command-line options that are only meaningful
+for \*(C+ programs; but you can also use most of the \s-1GNU\s0 compiler options
+regardless of what language your program is in.  For example, you
+might compile a file \f(CW\*(C`firstClass.C\*(C'\fR like this:
+.PP
+.Vb 1
+\&        g++ \-g \-frepo \-O \-c firstClass.C
+.Ve
+.PP
+In this example, only \fB\-frepo\fR is an option meant
+only for \*(C+ programs; you can use the other options with any
+language supported by \s-1GCC\s0.
+.PP
+Here is a list of options that are \fIonly\fR for compiling \*(C+ programs:
+.IP "\fB\-fabi\-version=\fR\fIn\fR" 4
+.IX Item "-fabi-version=n"
+Use version \fIn\fR of the \*(C+ \s-1ABI\s0.  Version 2 is the version of the
+\&\*(C+ \s-1ABI\s0 that first appeared in G++ 3.4.  Version 1 is the version of
+the \*(C+ \s-1ABI\s0 that first appeared in G++ 3.2.  Version 0 will always be
+the version that conforms most closely to the \*(C+ \s-1ABI\s0 specification.
+Therefore, the \s-1ABI\s0 obtained using version 0 will change as \s-1ABI\s0 bugs
+are fixed.
+.Sp
+The default is version 2.
+.Sp
+Version 3 corrects an error in mangling a constant address as a
+template argument.
+.Sp
+Version 4 implements a standard mangling for vector types.
+.Sp
+Version 5 corrects the mangling of attribute const/volatile on
+function pointer types, decltype of a plain decl, and use of a
+function parameter in the declaration of another parameter.
+.Sp
+See also \fB\-Wabi\fR.
+.IP "\fB\-fno\-access\-control\fR" 4
+.IX Item "-fno-access-control"
+Turn off all access checking.  This switch is mainly useful for working
+around bugs in the access control code.
+.IP "\fB\-fcheck\-new\fR" 4
+.IX Item "-fcheck-new"
+Check that the pointer returned by \f(CW\*(C`operator new\*(C'\fR is non-null
+before attempting to modify the storage allocated.  This check is
+normally unnecessary because the \*(C+ standard specifies that
+\&\f(CW\*(C`operator new\*(C'\fR will only return \f(CW0\fR if it is declared
+\&\fB\f(BIthrow()\fB\fR, in which case the compiler will always check the
+return value even without this option.  In all other cases, when
+\&\f(CW\*(C`operator new\*(C'\fR has a non-empty exception specification, memory
+exhaustion is signalled by throwing \f(CW\*(C`std::bad_alloc\*(C'\fR.  See also
+\&\fBnew (nothrow)\fR.
+.IP "\fB\-fconserve\-space\fR" 4
+.IX Item "-fconserve-space"
+Put uninitialized or runtime-initialized global variables into the
+common segment, as C does.  This saves space in the executable at the
+cost of not diagnosing duplicate definitions.  If you compile with this
+flag and your program mysteriously crashes after \f(CW\*(C`main()\*(C'\fR has
+completed, you may have an object that is being destroyed twice because
+two definitions were merged.
+.Sp
+This option is no longer useful on most targets, now that support has
+been added for putting variables into \s-1BSS\s0 without making them common.
+.IP "\fB\-fconstexpr\-depth=\fR\fIn\fR" 4
+.IX Item "-fconstexpr-depth=n"
+Set the maximum nested evaluation depth for \*(C+0x constexpr functions
+to \fIn\fR.  A limit is needed to detect endless recursion during
+constant expression evaluation.  The minimum specified by the standard
+is 512.
+.IP "\fB\-fno\-deduce\-init\-list\fR" 4
+.IX Item "-fno-deduce-init-list"
+Disable deduction of a template type parameter as
+std::initializer_list from a brace-enclosed initializer list, i.e.
+.Sp
+.Vb 4
+\&        template <class T> auto forward(T t) \-> decltype (realfn (t))
+\&        {
+\&          return realfn (t);
+\&        }
+\&        
+\&        void f()
+\&        {
+\&          forward({1,2}); // call forward<std::initializer_list<int>>
+\&        }
+.Ve
+.Sp
+This option is present because this deduction is an extension to the
+current specification in the \*(C+0x working draft, and there was
+some concern about potential overload resolution problems.
+.IP "\fB\-ffriend\-injection\fR" 4
+.IX Item "-ffriend-injection"
+Inject friend functions into the enclosing namespace, so that they are
+visible outside the scope of the class in which they are declared.
+Friend functions were documented to work this way in the old Annotated
+\&\*(C+ Reference Manual, and versions of G++ before 4.1 always worked
+that way.  However, in \s-1ISO\s0 \*(C+ a friend function which is not declared
+in an enclosing scope can only be found using argument dependent
+lookup.  This option causes friends to be injected as they were in
+earlier releases.
+.Sp
+This option is for compatibility, and may be removed in a future
+release of G++.
+.IP "\fB\-fno\-elide\-constructors\fR" 4
+.IX Item "-fno-elide-constructors"
+The \*(C+ standard allows an implementation to omit creating a temporary
+which is only used to initialize another object of the same type.
+Specifying this option disables that optimization, and forces G++ to
+call the copy constructor in all cases.
+.IP "\fB\-fno\-enforce\-eh\-specs\fR" 4
+.IX Item "-fno-enforce-eh-specs"
+Don't generate code to check for violation of exception specifications
+at runtime.  This option violates the \*(C+ standard, but may be useful
+for reducing code size in production builds, much like defining
+\&\fB\s-1NDEBUG\s0\fR.  This does not give user code permission to throw
+exceptions in violation of the exception specifications; the compiler
+will still optimize based on the specifications, so throwing an
+unexpected exception will result in undefined behavior.
+.IP "\fB\-ffor\-scope\fR" 4
+.IX Item "-ffor-scope"
+.PD 0
+.IP "\fB\-fno\-for\-scope\fR" 4
+.IX Item "-fno-for-scope"
+.PD
+If \fB\-ffor\-scope\fR is specified, the scope of variables declared in
+a \fIfor-init-statement\fR is limited to the \fBfor\fR loop itself,
+as specified by the \*(C+ standard.
+If \fB\-fno\-for\-scope\fR is specified, the scope of variables declared in
+a \fIfor-init-statement\fR extends to the end of the enclosing scope,
+as was the case in old versions of G++, and other (traditional)
+implementations of \*(C+.
+.Sp
+The default if neither flag is given to follow the standard,
+but to allow and give a warning for old-style code that would
+otherwise be invalid, or have different behavior.
+.IP "\fB\-fno\-gnu\-keywords\fR" 4
+.IX Item "-fno-gnu-keywords"
+Do not recognize \f(CW\*(C`typeof\*(C'\fR as a keyword, so that code can use this
+word as an identifier.  You can use the keyword \f(CW\*(C`_\|_typeof_\|_\*(C'\fR instead.
+\&\fB\-ansi\fR implies \fB\-fno\-gnu\-keywords\fR.
+.IP "\fB\-fno\-implicit\-templates\fR" 4
+.IX Item "-fno-implicit-templates"
+Never emit code for non-inline templates which are instantiated
+implicitly (i.e. by use); only emit code for explicit instantiations.
+.IP "\fB\-fno\-implicit\-inline\-templates\fR" 4
+.IX Item "-fno-implicit-inline-templates"
+Don't emit code for implicit instantiations of inline templates, either.
+The default is to handle inlines differently so that compiles with and
+without optimization will need the same set of explicit instantiations.
+.IP "\fB\-fno\-implement\-inlines\fR" 4
+.IX Item "-fno-implement-inlines"
+To save space, do not emit out-of-line copies of inline functions
+controlled by \fB#pragma implementation\fR.  This will cause linker
+errors if these functions are not inlined everywhere they are called.
+.IP "\fB\-fms\-extensions\fR" 4
+.IX Item "-fms-extensions"
+Disable pedantic warnings about constructs used in \s-1MFC\s0, such as implicit
+int and getting a pointer to member function via non-standard syntax.
+.IP "\fB\-fno\-nonansi\-builtins\fR" 4
+.IX Item "-fno-nonansi-builtins"
+Disable built-in declarations of functions that are not mandated by
+\&\s-1ANSI/ISO\s0 C.  These include \f(CW\*(C`ffs\*(C'\fR, \f(CW\*(C`alloca\*(C'\fR, \f(CW\*(C`_exit\*(C'\fR,
+\&\f(CW\*(C`index\*(C'\fR, \f(CW\*(C`bzero\*(C'\fR, \f(CW\*(C`conjf\*(C'\fR, and other related functions.
+.IP "\fB\-fnothrow\-opt\fR" 4
+.IX Item "-fnothrow-opt"
+Treat a \f(CW\*(C`throw()\*(C'\fR exception specification as though it were a
+\&\f(CW\*(C`noexcept\*(C'\fR specification to reduce or eliminate the text size
+overhead relative to a function with no exception specification.  If
+the function has local variables of types with non-trivial
+destructors, the exception specification will actually make the
+function smaller because the \s-1EH\s0 cleanups for those variables can be
+optimized away.  The semantic effect is that an exception thrown out of
+a function with such an exception specification will result in a call
+to \f(CW\*(C`terminate\*(C'\fR rather than \f(CW\*(C`unexpected\*(C'\fR.
+.IP "\fB\-fno\-operator\-names\fR" 4
+.IX Item "-fno-operator-names"
+Do not treat the operator name keywords \f(CW\*(C`and\*(C'\fR, \f(CW\*(C`bitand\*(C'\fR,
+\&\f(CW\*(C`bitor\*(C'\fR, \f(CW\*(C`compl\*(C'\fR, \f(CW\*(C`not\*(C'\fR, \f(CW\*(C`or\*(C'\fR and \f(CW\*(C`xor\*(C'\fR as
+synonyms as keywords.
+.IP "\fB\-fno\-optional\-diags\fR" 4
+.IX Item "-fno-optional-diags"
+Disable diagnostics that the standard says a compiler does not need to
+issue.  Currently, the only such diagnostic issued by G++ is the one for
+a name having multiple meanings within a class.
+.IP "\fB\-fpermissive\fR" 4
+.IX Item "-fpermissive"
+Downgrade some diagnostics about nonconformant code from errors to
+warnings.  Thus, using \fB\-fpermissive\fR will allow some
+nonconforming code to compile.
+.IP "\fB\-fno\-pretty\-templates\fR" 4
+.IX Item "-fno-pretty-templates"
+When an error message refers to a specialization of a function
+template, the compiler will normally print the signature of the
+template followed by the template arguments and any typedefs or
+typenames in the signature (e.g. \f(CW\*(C`void f(T) [with T = int]\*(C'\fR
+rather than \f(CW\*(C`void f(int)\*(C'\fR) so that it's clear which template is
+involved.  When an error message refers to a specialization of a class
+template, the compiler will omit any template arguments which match
+the default template arguments for that template.  If either of these
+behaviors make it harder to understand the error message rather than
+easier, using \fB\-fno\-pretty\-templates\fR will disable them.
+.IP "\fB\-frepo\fR" 4
+.IX Item "-frepo"
+Enable automatic template instantiation at link time.  This option also
+implies \fB\-fno\-implicit\-templates\fR.
+.IP "\fB\-fno\-rtti\fR" 4
+.IX Item "-fno-rtti"
+Disable generation of information about every class with virtual
+functions for use by the \*(C+ runtime type identification features
+(\fBdynamic_cast\fR and \fBtypeid\fR).  If you don't use those parts
+of the language, you can save some space by using this flag.  Note that
+exception handling uses the same information, but it will generate it as
+needed. The \fBdynamic_cast\fR operator can still be used for casts that
+do not require runtime type information, i.e. casts to \f(CW\*(C`void *\*(C'\fR or to
+unambiguous base classes.
+.IP "\fB\-fstats\fR" 4
+.IX Item "-fstats"
+Emit statistics about front-end processing at the end of the compilation.
+This information is generally only useful to the G++ development team.
+.IP "\fB\-fstrict\-enums\fR" 4
+.IX Item "-fstrict-enums"
+Allow the compiler to optimize using the assumption that a value of
+enumeration type can only be one of the values of the enumeration (as
+defined in the \*(C+ standard; basically, a value which can be
+represented in the minimum number of bits needed to represent all the
+enumerators).  This assumption may not be valid if the program uses a
+cast to convert an arbitrary integer value to the enumeration type.
+.IP "\fB\-ftemplate\-depth=\fR\fIn\fR" 4
+.IX Item "-ftemplate-depth=n"
+Set the maximum instantiation depth for template classes to \fIn\fR.
+A limit on the template instantiation depth is needed to detect
+endless recursions during template class instantiation.  \s-1ANSI/ISO\s0 \*(C+
+conforming programs must not rely on a maximum depth greater than 17
+(changed to 1024 in \*(C+0x).
+.IP "\fB\-fno\-threadsafe\-statics\fR" 4
+.IX Item "-fno-threadsafe-statics"
+Do not emit the extra code to use the routines specified in the \*(C+
+\&\s-1ABI\s0 for thread-safe initialization of local statics.  You can use this
+option to reduce code size slightly in code that doesn't need to be
+thread-safe.
+.IP "\fB\-fuse\-cxa\-atexit\fR" 4
+.IX Item "-fuse-cxa-atexit"
+Register destructors for objects with static storage duration with the
+\&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR function rather than the \f(CW\*(C`atexit\*(C'\fR function.
+This option is required for fully standards-compliant handling of static
+destructors, but will only work if your C library supports
+\&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR.
+.IP "\fB\-fno\-use\-cxa\-get\-exception\-ptr\fR" 4
+.IX Item "-fno-use-cxa-get-exception-ptr"
+Don't use the \f(CW\*(C`_\|_cxa_get_exception_ptr\*(C'\fR runtime routine.  This
+will cause \f(CW\*(C`std::uncaught_exception\*(C'\fR to be incorrect, but is necessary
+if the runtime routine is not available.
+.IP "\fB\-fvisibility\-inlines\-hidden\fR" 4
+.IX Item "-fvisibility-inlines-hidden"
+This switch declares that the user does not attempt to compare
+pointers to inline methods where the addresses of the two functions
+were taken in different shared objects.
+.Sp
+The effect of this is that \s-1GCC\s0 may, effectively, mark inline methods with
+\&\f(CW\*(C`_\|_attribute_\|_ ((visibility ("hidden")))\*(C'\fR so that they do not
+appear in the export table of a \s-1DSO\s0 and do not require a \s-1PLT\s0 indirection
+when used within the \s-1DSO\s0.  Enabling this option can have a dramatic effect
+on load and link times of a \s-1DSO\s0 as it massively reduces the size of the
+dynamic export table when the library makes heavy use of templates.
+.Sp
+The behavior of this switch is not quite the same as marking the
+methods as hidden directly, because it does not affect static variables
+local to the function or cause the compiler to deduce that
+the function is defined in only one shared object.
+.Sp
+You may mark a method as having a visibility explicitly to negate the
+effect of the switch for that method.  For example, if you do want to
+compare pointers to a particular inline method, you might mark it as
+having default visibility.  Marking the enclosing class with explicit
+visibility will have no effect.
+.Sp
+Explicitly instantiated inline methods are unaffected by this option
+as their linkage might otherwise cross a shared library boundary.
+.IP "\fB\-fvisibility\-ms\-compat\fR" 4
+.IX Item "-fvisibility-ms-compat"
+This flag attempts to use visibility settings to make \s-1GCC\s0's \*(C+
+linkage model compatible with that of Microsoft Visual Studio.
+.Sp
+The flag makes these changes to \s-1GCC\s0's linkage model:
+.RS 4
+.IP "1." 4
+It sets the default visibility to \f(CW\*(C`hidden\*(C'\fR, like
+\&\fB\-fvisibility=hidden\fR.
+.IP "2." 4
+Types, but not their members, are not hidden by default.
+.IP "3." 4
+The One Definition Rule is relaxed for types without explicit
+visibility specifications which are defined in more than one different
+shared object: those declarations are permitted if they would have
+been permitted when this option was not used.
+.RE
+.RS 4
+.Sp
+In new code it is better to use \fB\-fvisibility=hidden\fR and
+export those classes which are intended to be externally visible.
+Unfortunately it is possible for code to rely, perhaps accidentally,
+on the Visual Studio behavior.
+.Sp
+Among the consequences of these changes are that static data members
+of the same type with the same name but defined in different shared
+objects will be different, so changing one will not change the other;
+and that pointers to function members defined in different shared
+objects may not compare equal.  When this flag is given, it is a
+violation of the \s-1ODR\s0 to define types with the same name differently.
+.RE
+.IP "\fB\-fno\-weak\fR" 4
+.IX Item "-fno-weak"
+Do not use weak symbol support, even if it is provided by the linker.
+By default, G++ will use weak symbols if they are available.  This
+option exists only for testing, and should not be used by end-users;
+it will result in inferior code and has no benefits.  This option may
+be removed in a future release of G++.
+.IP "\fB\-nostdinc++\fR" 4
+.IX Item "-nostdinc++"
+Do not search for header files in the standard directories specific to
+\&\*(C+, but do still search the other standard directories.  (This option
+is used when building the \*(C+ library.)
+.PP
+In addition, these optimization, warning, and code generation options
+have meanings only for \*(C+ programs:
+.IP "\fB\-fno\-default\-inline\fR" 4
+.IX Item "-fno-default-inline"
+Do not assume \fBinline\fR for functions defined inside a class scope.
+  Note that these
+functions will have linkage like inline functions; they just won't be
+inlined by default.
+.IP "\fB\-Wabi\fR (C, Objective-C, \*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wabi (C, Objective-C,  and Objective- only)"
+Warn when G++ generates code that is probably not compatible with the
+vendor-neutral \*(C+ \s-1ABI\s0.  Although an effort has been made to warn about
+all such cases, there are probably some cases that are not warned about,
+even though G++ is generating incompatible code.  There may also be
+cases where warnings are emitted even though the code that is generated
+will be compatible.
+.Sp
+You should rewrite your code to avoid these warnings if you are
+concerned about the fact that code generated by G++ may not be binary
+compatible with code generated by other compilers.
+.Sp
+The known incompatibilities in \fB\-fabi\-version=2\fR (the default) include:
+.RS 4
+.IP "\(bu" 4
+A template with a non-type template parameter of reference type is
+mangled incorrectly:
+.Sp
+.Vb 3
+\&        extern int N;
+\&        template <int &> struct S {};
+\&        void n (S<N>) {2}
+.Ve
+.Sp
+This is fixed in \fB\-fabi\-version=3\fR.
+.IP "\(bu" 4
+\&\s-1SIMD\s0 vector types declared using \f(CW\*(C`_\|_attribute ((vector_size))\*(C'\fR are
+mangled in a non-standard way that does not allow for overloading of
+functions taking vectors of different sizes.
+.Sp
+The mangling is changed in \fB\-fabi\-version=4\fR.
+.RE
+.RS 4
+.Sp
+The known incompatibilities in \fB\-fabi\-version=1\fR include:
+.IP "\(bu" 4
+Incorrect handling of tail-padding for bit-fields.  G++ may attempt to
+pack data into the same byte as a base class.  For example:
+.Sp
+.Vb 2
+\&        struct A { virtual void f(); int f1 : 1; };
+\&        struct B : public A { int f2 : 1; };
+.Ve
+.Sp
+In this case, G++ will place \f(CW\*(C`B::f2\*(C'\fR into the same byte
+as\f(CW\*(C`A::f1\*(C'\fR; other compilers will not.  You can avoid this problem
+by explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of the
+byte size on your platform; that will cause G++ and other compilers to
+layout \f(CW\*(C`B\*(C'\fR identically.
+.IP "\(bu" 4
+Incorrect handling of tail-padding for virtual bases.  G++ does not use
+tail padding when laying out virtual bases.  For example:
+.Sp
+.Vb 3
+\&        struct A { virtual void f(); char c1; };
+\&        struct B { B(); char c2; };
+\&        struct C : public A, public virtual B {};
+.Ve
+.Sp
+In this case, G++ will not place \f(CW\*(C`B\*(C'\fR into the tail-padding for
+\&\f(CW\*(C`A\*(C'\fR; other compilers will.  You can avoid this problem by
+explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of its
+alignment (ignoring virtual base classes); that will cause G++ and other
+compilers to layout \f(CW\*(C`C\*(C'\fR identically.
+.IP "\(bu" 4
+Incorrect handling of bit-fields with declared widths greater than that
+of their underlying types, when the bit-fields appear in a union.  For
+example:
+.Sp
+.Vb 1
+\&        union U { int i : 4096; };
+.Ve
+.Sp
+Assuming that an \f(CW\*(C`int\*(C'\fR does not have 4096 bits, G++ will make the
+union too small by the number of bits in an \f(CW\*(C`int\*(C'\fR.
+.IP "\(bu" 4
+Empty classes can be placed at incorrect offsets.  For example:
+.Sp
+.Vb 1
+\&        struct A {};
+\&        
+\&        struct B {
+\&          A a;
+\&          virtual void f ();
+\&        };
+\&        
+\&        struct C : public B, public A {};
+.Ve
+.Sp
+G++ will place the \f(CW\*(C`A\*(C'\fR base class of \f(CW\*(C`C\*(C'\fR at a nonzero offset;
+it should be placed at offset zero.  G++ mistakenly believes that the
+\&\f(CW\*(C`A\*(C'\fR data member of \f(CW\*(C`B\*(C'\fR is already at offset zero.
+.IP "\(bu" 4
+Names of template functions whose types involve \f(CW\*(C`typename\*(C'\fR or
+template template parameters can be mangled incorrectly.
+.Sp
+.Vb 2
+\&        template <typename Q>
+\&        void f(typename Q::X) {}
+\&        
+\&        template <template <typename> class Q>
+\&        void f(typename Q<int>::X) {}
+.Ve
+.Sp
+Instantiations of these templates may be mangled incorrectly.
+.RE
+.RS 4
+.Sp
+It also warns psABI related changes.  The known psABI changes at this
+point include:
+.IP "\(bu" 4
+For SYSV/x86\-64, when passing union with long double, it is changed to
+pass in memory as specified in psABI.  For example:
+.Sp
+.Vb 4
+\&        union U {
+\&          long double ld;
+\&          int i;
+\&        };
+.Ve
+.Sp
+\&\f(CW\*(C`union U\*(C'\fR will always be passed in memory.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Wctor\-dtor\-privacy\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wctor-dtor-privacy ( and Objective- only)"
+Warn when a class seems unusable because all the constructors or
+destructors in that class are private, and it has neither friends nor
+public static member functions.
+.IP "\fB\-Wnoexcept\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wnoexcept ( and Objective- only)"
+Warn when a noexcept-expression evaluates to false because of a call
+to a function that does not have a non-throwing exception
+specification (i.e. \fB\f(BIthrow()\fB\fR or \fBnoexcept\fR) but is known by
+the compiler to never throw an exception.
+.IP "\fB\-Wnon\-virtual\-dtor\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wnon-virtual-dtor ( and Objective- only)"
+Warn when a class has virtual functions and accessible non-virtual
+destructor, in which case it would be possible but unsafe to delete
+an instance of a derived class through a pointer to the base class.
+This warning is also enabled if \-Weffc++ is specified.
+.IP "\fB\-Wreorder\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wreorder ( and Objective- only)"
+Warn when the order of member initializers given in the code does not
+match the order in which they must be executed.  For instance:
+.Sp
+.Vb 5
+\&        struct A {
+\&          int i;
+\&          int j;
+\&          A(): j (0), i (1) { }
+\&        };
+.Ve
+.Sp
+The compiler will rearrange the member initializers for \fBi\fR
+and \fBj\fR to match the declaration order of the members, emitting
+a warning to that effect.  This warning is enabled by \fB\-Wall\fR.
+.PP
+The following \fB\-W...\fR options are not affected by \fB\-Wall\fR.
+.IP "\fB\-Weffc++\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Weffc++ ( and Objective- only)"
+Warn about violations of the following style guidelines from Scott Meyers'
+\&\fIEffective \*(C+\fR book:
+.RS 4
+.IP "\(bu" 4
+Item 11:  Define a copy constructor and an assignment operator for classes
+with dynamically allocated memory.
+.IP "\(bu" 4
+Item 12:  Prefer initialization to assignment in constructors.
+.IP "\(bu" 4
+Item 14:  Make destructors virtual in base classes.
+.IP "\(bu" 4
+Item 15:  Have \f(CW\*(C`operator=\*(C'\fR return a reference to \f(CW*this\fR.
+.IP "\(bu" 4
+Item 23:  Don't try to return a reference when you must return an object.
+.RE
+.RS 4
+.Sp
+Also warn about violations of the following style guidelines from
+Scott Meyers' \fIMore Effective \*(C+\fR book:
+.IP "\(bu" 4
+Item 6:  Distinguish between prefix and postfix forms of increment and
+decrement operators.
+.IP "\(bu" 4
+Item 7:  Never overload \f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, or \f(CW\*(C`,\*(C'\fR.
+.RE
+.RS 4
+.Sp
+When selecting this option, be aware that the standard library
+headers do not obey all of these guidelines; use \fBgrep \-v\fR
+to filter out those warnings.
+.RE
+.IP "\fB\-Wstrict\-null\-sentinel\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wstrict-null-sentinel ( and Objective- only)"
+Warn also about the use of an uncasted \f(CW\*(C`NULL\*(C'\fR as sentinel.  When
+compiling only with \s-1GCC\s0 this is a valid sentinel, as \f(CW\*(C`NULL\*(C'\fR is defined
+to \f(CW\*(C`_\|_null\*(C'\fR.  Although it is a null pointer constant not a null pointer,
+it is guaranteed to be of the same size as a pointer.  But this use is
+not portable across different compilers.
+.IP "\fB\-Wno\-non\-template\-friend\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-non-template-friend ( and Objective- only)"
+Disable warnings when non-templatized friend functions are declared
+within a template.  Since the advent of explicit template specification
+support in G++, if the name of the friend is an unqualified-id (i.e.,
+\&\fBfriend foo(int)\fR), the \*(C+ language specification demands that the
+friend declare or define an ordinary, nontemplate function.  (Section
+14.5.3).  Before G++ implemented explicit specification, unqualified-ids
+could be interpreted as a particular specialization of a templatized
+function.  Because this non-conforming behavior is no longer the default
+behavior for G++, \fB\-Wnon\-template\-friend\fR allows the compiler to
+check existing code for potential trouble spots and is on by default.
+This new compiler behavior can be turned off with
+\&\fB\-Wno\-non\-template\-friend\fR which keeps the conformant compiler code
+but disables the helpful warning.
+.IP "\fB\-Wold\-style\-cast\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wold-style-cast ( and Objective- only)"
+Warn if an old-style (C\-style) cast to a non-void type is used within
+a \*(C+ program.  The new-style casts (\fBdynamic_cast\fR,
+\&\fBstatic_cast\fR, \fBreinterpret_cast\fR, and \fBconst_cast\fR) are
+less vulnerable to unintended effects and much easier to search for.
+.IP "\fB\-Woverloaded\-virtual\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Woverloaded-virtual ( and Objective- only)"
+Warn when a function declaration hides virtual functions from a
+base class.  For example, in:
+.Sp
+.Vb 3
+\&        struct A {
+\&          virtual void f();
+\&        };
+\&        
+\&        struct B: public A {
+\&          void f(int);
+\&        };
+.Ve
+.Sp
+the \f(CW\*(C`A\*(C'\fR class version of \f(CW\*(C`f\*(C'\fR is hidden in \f(CW\*(C`B\*(C'\fR, and code
+like:
+.Sp
+.Vb 2
+\&        B* b;
+\&        b\->f();
+.Ve
+.Sp
+will fail to compile.
+.IP "\fB\-Wno\-pmf\-conversions\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-pmf-conversions ( and Objective- only)"
+Disable the diagnostic for converting a bound pointer to member function
+to a plain pointer.
+.IP "\fB\-Wsign\-promo\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wsign-promo ( and Objective- only)"
+Warn when overload resolution chooses a promotion from unsigned or
+enumerated type to a signed type, over a conversion to an unsigned type of
+the same size.  Previous versions of G++ would try to preserve
+unsignedness, but the standard mandates the current behavior.
+.Sp
+.Vb 4
+\&        struct A {
+\&          operator int ();
+\&          A& operator = (int);
+\&        };
+\&        
+\&        main ()
+\&        {
+\&          A a,b;
+\&          a = b;
+\&        }
+.Ve
+.Sp
+In this example, G++ will synthesize a default \fBA& operator =
+(const A&);\fR, while cfront will use the user-defined \fBoperator =\fR.
+.SS "Options Controlling Objective-C and Objective\-\*(C+ Dialects"
+.IX Subsection "Options Controlling Objective-C and Objective- Dialects"
+(\s-1NOTE:\s0 This manual does not describe the Objective-C and Objective\-\*(C+
+languages themselves.
+.PP
+This section describes the command-line options that are only meaningful
+for Objective-C and Objective\-\*(C+ programs, but you can also use most of
+the language-independent \s-1GNU\s0 compiler options.
+For example, you might compile a file \f(CW\*(C`some_class.m\*(C'\fR like this:
+.PP
+.Vb 1
+\&        gcc \-g \-fgnu\-runtime \-O \-c some_class.m
+.Ve
+.PP
+In this example, \fB\-fgnu\-runtime\fR is an option meant only for
+Objective-C and Objective\-\*(C+ programs; you can use the other options with
+any language supported by \s-1GCC\s0.
+.PP
+Note that since Objective-C is an extension of the C language, Objective-C
+compilations may also use options specific to the C front-end (e.g.,
+\&\fB\-Wtraditional\fR).  Similarly, Objective\-\*(C+ compilations may use
+\&\*(C+\-specific options (e.g., \fB\-Wabi\fR).
+.PP
+Here is a list of options that are \fIonly\fR for compiling Objective-C
+and Objective\-\*(C+ programs:
+.IP "\fB\-fconstant\-string\-class=\fR\fIclass-name\fR" 4
+.IX Item "-fconstant-string-class=class-name"
+Use \fIclass-name\fR as the name of the class to instantiate for each
+literal string specified with the syntax \f(CW\*(C`@"..."\*(C'\fR.  The default
+class name is \f(CW\*(C`NXConstantString\*(C'\fR if the \s-1GNU\s0 runtime is being used, and
+\&\f(CW\*(C`NSConstantString\*(C'\fR if the NeXT runtime is being used (see below).  The
+\&\fB\-fconstant\-cfstrings\fR option, if also present, will override the
+\&\fB\-fconstant\-string\-class\fR setting and cause \f(CW\*(C`@"..."\*(C'\fR literals
+to be laid out as constant CoreFoundation strings.
+.IP "\fB\-fgnu\-runtime\fR" 4
+.IX Item "-fgnu-runtime"
+Generate object code compatible with the standard \s-1GNU\s0 Objective-C
+runtime.  This is the default for most types of systems.
+.IP "\fB\-fnext\-runtime\fR" 4
+.IX Item "-fnext-runtime"
+Generate output compatible with the NeXT runtime.  This is the default
+for NeXT-based systems, including Darwin and Mac \s-1OS\s0 X.  The macro
+\&\f(CW\*(C`_\|_NEXT_RUNTIME_\|_\*(C'\fR is predefined if (and only if) this option is
+used.
+.IP "\fB\-fno\-nil\-receivers\fR" 4
+.IX Item "-fno-nil-receivers"
+Assume that all Objective-C message dispatches (\f(CW\*(C`[receiver
+message:arg]\*(C'\fR) in this translation unit ensure that the receiver is
+not \f(CW\*(C`nil\*(C'\fR.  This allows for more efficient entry points in the
+runtime to be used.  This option is only available in conjunction with
+the NeXT runtime and \s-1ABI\s0 version 0 or 1.
+.IP "\fB\-fobjc\-abi\-version=\fR\fIn\fR" 4
+.IX Item "-fobjc-abi-version=n"
+Use version \fIn\fR of the Objective-C \s-1ABI\s0 for the selected runtime.
+This option is currently supported only for the NeXT runtime.  In that
+case, Version 0 is the traditional (32\-bit) \s-1ABI\s0 without support for
+properties and other Objective-C 2.0 additions.  Version 1 is the
+traditional (32\-bit) \s-1ABI\s0 with support for properties and other
+Objective-C 2.0 additions.  Version 2 is the modern (64\-bit) \s-1ABI\s0.  If
+nothing is specified, the default is Version 0 on 32\-bit target
+machines, and Version 2 on 64\-bit target machines.
+.IP "\fB\-fobjc\-call\-cxx\-cdtors\fR" 4
+.IX Item "-fobjc-call-cxx-cdtors"
+For each Objective-C class, check if any of its instance variables is a
+\&\*(C+ object with a non-trivial default constructor.  If so, synthesize a
+special \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR instance method that will run
+non-trivial default constructors on any such instance variables, in order,
+and then return \f(CW\*(C`self\*(C'\fR.  Similarly, check if any instance variable
+is a \*(C+ object with a non-trivial destructor, and if so, synthesize a
+special \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR method that will run
+all such default destructors, in reverse order.
+.Sp
+The \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR and \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR
+methods thusly generated will only operate on instance variables
+declared in the current Objective-C class, and not those inherited
+from superclasses.  It is the responsibility of the Objective-C
+runtime to invoke all such methods in an object's inheritance
+hierarchy.  The \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR methods will be invoked
+by the runtime immediately after a new object instance is allocated;
+the \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods will be invoked immediately
+before the runtime deallocates an object instance.
+.Sp
+As of this writing, only the NeXT runtime on Mac \s-1OS\s0 X 10.4 and later has
+support for invoking the \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR and
+\&\f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods.
+.IP "\fB\-fobjc\-direct\-dispatch\fR" 4
+.IX Item "-fobjc-direct-dispatch"
+Allow fast jumps to the message dispatcher.  On Darwin this is
+accomplished via the comm page.
+.IP "\fB\-fobjc\-exceptions\fR" 4
+.IX Item "-fobjc-exceptions"
+Enable syntactic support for structured exception handling in
+Objective-C, similar to what is offered by \*(C+ and Java.  This option
+is required to use the Objective-C keywords \f(CW@try\fR,
+\&\f(CW@throw\fR, \f(CW@catch\fR, \f(CW@finally\fR and
+\&\f(CW@synchronized\fR.  This option is available with both the \s-1GNU\s0
+runtime and the NeXT runtime (but not available in conjunction with
+the NeXT runtime on Mac \s-1OS\s0 X 10.2 and earlier).
+.IP "\fB\-fobjc\-gc\fR" 4
+.IX Item "-fobjc-gc"
+Enable garbage collection (\s-1GC\s0) in Objective-C and Objective\-\*(C+
+programs.  This option is only available with the NeXT runtime; the
+\&\s-1GNU\s0 runtime has a different garbage collection implementation that
+does not require special compiler flags.
+.IP "\fB\-fobjc\-nilcheck\fR" 4
+.IX Item "-fobjc-nilcheck"
+For the NeXT runtime with version 2 of the \s-1ABI\s0, check for a nil
+receiver in method invocations before doing the actual method call.
+This is the default and can be disabled using
+\&\fB\-fno\-objc\-nilcheck\fR.  Class methods and super calls are never
+checked for nil in this way no matter what this flag is set to.
+Currently this flag does nothing when the \s-1GNU\s0 runtime, or an older
+version of the NeXT runtime \s-1ABI\s0, is used.
+.IP "\fB\-fobjc\-std=objc1\fR" 4
+.IX Item "-fobjc-std=objc1"
+Conform to the language syntax of Objective-C 1.0, the language
+recognized by \s-1GCC\s0 4.0.  This only affects the Objective-C additions to
+the C/\*(C+ language; it does not affect conformance to C/\*(C+ standards,
+which is controlled by the separate C/\*(C+ dialect option flags.  When
+this option is used with the Objective-C or Objective\-\*(C+ compiler,
+any Objective-C syntax that is not recognized by \s-1GCC\s0 4.0 is rejected.
+This is useful if you need to make sure that your Objective-C code can
+be compiled with older versions of \s-1GCC\s0.
+.IP "\fB\-freplace\-objc\-classes\fR" 4
+.IX Item "-freplace-objc-classes"
+Emit a special marker instructing \fB\f(BIld\fB\|(1)\fR not to statically link in
+the resulting object file, and allow \fB\f(BIdyld\fB\|(1)\fR to load it in at
+run time instead.  This is used in conjunction with the Fix-and-Continue
+debugging mode, where the object file in question may be recompiled and
+dynamically reloaded in the course of program execution, without the need
+to restart the program itself.  Currently, Fix-and-Continue functionality
+is only available in conjunction with the NeXT runtime on Mac \s-1OS\s0 X 10.3
+and later.
+.IP "\fB\-fzero\-link\fR" 4
+.IX Item "-fzero-link"
+When compiling for the NeXT runtime, the compiler ordinarily replaces calls
+to \f(CW\*(C`objc_getClass("...")\*(C'\fR (when the name of the class is known at
+compile time) with static class references that get initialized at load time,
+which improves run-time performance.  Specifying the \fB\-fzero\-link\fR flag
+suppresses this behavior and causes calls to \f(CW\*(C`objc_getClass("...")\*(C'\fR
+to be retained.  This is useful in Zero-Link debugging mode, since it allows
+for individual class implementations to be modified during program execution.
+The \s-1GNU\s0 runtime currently always retains calls to \f(CW\*(C`objc_get_class("...")\*(C'\fR
+regardless of command line options.
+.IP "\fB\-gen\-decls\fR" 4
+.IX Item "-gen-decls"
+Dump interface declarations for all classes seen in the source file to a
+file named \fI\fIsourcename\fI.decl\fR.
+.IP "\fB\-Wassign\-intercept\fR (Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wassign-intercept (Objective-C and Objective- only)"
+Warn whenever an Objective-C assignment is being intercepted by the
+garbage collector.
+.IP "\fB\-Wno\-protocol\fR (Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-protocol (Objective-C and Objective- only)"
+If a class is declared to implement a protocol, a warning is issued for
+every method in the protocol that is not implemented by the class.  The
+default behavior is to issue a warning for every method not explicitly
+implemented in the class, even if a method implementation is inherited
+from the superclass.  If you use the \fB\-Wno\-protocol\fR option, then
+methods inherited from the superclass are considered to be implemented,
+and no warning is issued for them.
+.IP "\fB\-Wselector\fR (Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wselector (Objective-C and Objective- only)"
+Warn if multiple methods of different types for the same selector are
+found during compilation.  The check is performed on the list of methods
+in the final stage of compilation.  Additionally, a check is performed
+for each selector appearing in a \f(CW\*(C`@selector(...)\*(C'\fR
+expression, and a corresponding method for that selector has been found
+during compilation.  Because these checks scan the method table only at
+the end of compilation, these warnings are not produced if the final
+stage of compilation is not reached, for example because an error is
+found during compilation, or because the \fB\-fsyntax\-only\fR option is
+being used.
+.IP "\fB\-Wstrict\-selector\-match\fR (Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wstrict-selector-match (Objective-C and Objective- only)"
+Warn if multiple methods with differing argument and/or return types are
+found for a given selector when attempting to send a message using this
+selector to a receiver of type \f(CW\*(C`id\*(C'\fR or \f(CW\*(C`Class\*(C'\fR.  When this flag
+is off (which is the default behavior), the compiler will omit such warnings
+if any differences found are confined to types which share the same size
+and alignment.
+.IP "\fB\-Wundeclared\-selector\fR (Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wundeclared-selector (Objective-C and Objective- only)"
+Warn if a \f(CW\*(C`@selector(...)\*(C'\fR expression referring to an
+undeclared selector is found.  A selector is considered undeclared if no
+method with that name has been declared before the
+\&\f(CW\*(C`@selector(...)\*(C'\fR expression, either explicitly in an
+\&\f(CW@interface\fR or \f(CW@protocol\fR declaration, or implicitly in
+an \f(CW@implementation\fR section.  This option always performs its
+checks as soon as a \f(CW\*(C`@selector(...)\*(C'\fR expression is found,
+while \fB\-Wselector\fR only performs its checks in the final stage of
+compilation.  This also enforces the coding style convention
+that methods and selectors must be declared before being used.
+.IP "\fB\-print\-objc\-runtime\-info\fR" 4
+.IX Item "-print-objc-runtime-info"
+Generate C header describing the largest structure that is passed by
+value, if any.
+.SS "Options to Control Diagnostic Messages Formatting"
+.IX Subsection "Options to Control Diagnostic Messages Formatting"
+Traditionally, diagnostic messages have been formatted irrespective of
+the output device's aspect (e.g. its width, ...).  The options described
+below can be used to control the diagnostic messages formatting
+algorithm, e.g. how many characters per line, how often source location
+information should be reported.  Right now, only the \*(C+ front end can
+honor these options.  However it is expected, in the near future, that
+the remaining front ends would be able to digest them correctly.
+.IP "\fB\-fmessage\-length=\fR\fIn\fR" 4
+.IX Item "-fmessage-length=n"
+Try to format error messages so that they fit on lines of about \fIn\fR
+characters.  The default is 72 characters for \fBg++\fR and 0 for the rest of
+the front ends supported by \s-1GCC\s0.  If \fIn\fR is zero, then no
+line-wrapping will be done; each error message will appear on a single
+line.
+.IP "\fB\-fdiagnostics\-show\-location=once\fR" 4
+.IX Item "-fdiagnostics-show-location=once"
+Only meaningful in line-wrapping mode.  Instructs the diagnostic messages
+reporter to emit \fIonce\fR source location information; that is, in
+case the message is too long to fit on a single physical line and has to
+be wrapped, the source location won't be emitted (as prefix) again,
+over and over, in subsequent continuation lines.  This is the default
+behavior.
+.IP "\fB\-fdiagnostics\-show\-location=every\-line\fR" 4
+.IX Item "-fdiagnostics-show-location=every-line"
+Only meaningful in line-wrapping mode.  Instructs the diagnostic
+messages reporter to emit the same source location information (as
+prefix) for physical lines that result from the process of breaking
+a message which is too long to fit on a single line.
+.IP "\fB\-fno\-diagnostics\-show\-option\fR" 4
+.IX Item "-fno-diagnostics-show-option"
+By default, each diagnostic emitted includes text which indicates the
+command line option that directly controls the diagnostic (if such an
+option is known to the diagnostic machinery).  Specifying the
+\&\fB\-fno\-diagnostics\-show\-option\fR flag suppresses that behavior.
+.IP "\fB\-Wcoverage\-mismatch\fR" 4
+.IX Item "-Wcoverage-mismatch"
+Warn if feedback profiles do not match when using the
+\&\fB\-fprofile\-use\fR option.
+If a source file was changed between \fB\-fprofile\-gen\fR and
+\&\fB\-fprofile\-use\fR, the files with the profile feedback can fail
+to match the source file and \s-1GCC\s0 can not use the profile feedback
+information.  By default, this warning is enabled and is treated as an
+error.  \fB\-Wno\-coverage\-mismatch\fR can be used to disable the
+warning or \fB\-Wno\-error=coverage\-mismatch\fR can be used to
+disable the error.  Disable the error for this warning can result in
+poorly optimized code, so disabling the error is useful only in the
+case of very minor changes such as bug fixes to an existing code-base.
+Completely disabling the warning is not recommended.
+.SS "Options to Request or Suppress Warnings"
+.IX Subsection "Options to Request or Suppress Warnings"
+Warnings are diagnostic messages that report constructions which
+are not inherently erroneous but which are risky or suggest there
+may have been an error.
+.PP
+The following language-independent options do not enable specific
+warnings but control the kinds of diagnostics produced by \s-1GCC\s0.
+.IP "\fB\-fsyntax\-only\fR" 4
+.IX Item "-fsyntax-only"
+Check the code for syntax errors, but don't do anything beyond that.
+.IP "\fB\-fmax\-errors=\fR\fIn\fR" 4
+.IX Item "-fmax-errors=n"
+Limits the maximum number of error messages to \fIn\fR, at which point
+\&\s-1GCC\s0 bails out rather than attempting to continue processing the source
+code.  If \fIn\fR is 0 (the default), there is no limit on the number
+of error messages produced.  If \fB\-Wfatal\-errors\fR is also
+specified, then \fB\-Wfatal\-errors\fR takes precedence over this
+option.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+Inhibit all warning messages.
+.IP "\fB\-Werror\fR" 4
+.IX Item "-Werror"
+Make all warnings into errors.
+.IP "\fB\-Werror=\fR" 4
+.IX Item "-Werror="
+Make the specified warning into an error.  The specifier for a warning
+is appended, for example \fB\-Werror=switch\fR turns the warnings
+controlled by \fB\-Wswitch\fR into errors.  This switch takes a
+negative form, to be used to negate \fB\-Werror\fR for specific
+warnings, for example \fB\-Wno\-error=switch\fR makes
+\&\fB\-Wswitch\fR warnings not be errors, even when \fB\-Werror\fR
+is in effect.
+.Sp
+The warning message for each controllable warning includes the
+option which controls the warning.  That option can then be used with
+\&\fB\-Werror=\fR and \fB\-Wno\-error=\fR as described above.
+(Printing of the option in the warning message can be disabled using the
+\&\fB\-fno\-diagnostics\-show\-option\fR flag.)
+.Sp
+Note that specifying \fB\-Werror=\fR\fIfoo\fR automatically implies
+\&\fB\-W\fR\fIfoo\fR.  However, \fB\-Wno\-error=\fR\fIfoo\fR does not
+imply anything.
+.IP "\fB\-Wfatal\-errors\fR" 4
+.IX Item "-Wfatal-errors"
+This option causes the compiler to abort compilation on the first error
+occurred rather than trying to keep going and printing further error
+messages.
+.PP
+You can request many specific warnings with options beginning
+\&\fB\-W\fR, for example \fB\-Wimplicit\fR to request warnings on
+implicit declarations.  Each of these specific warning options also
+has a negative form beginning \fB\-Wno\-\fR to turn off warnings; for
+example, \fB\-Wno\-implicit\fR.  This manual lists only one of the
+two forms, whichever is not the default.  For further,
+language-specific options also refer to \fB\*(C+ Dialect Options\fR and
+\&\fBObjective-C and Objective\-\*(C+ Dialect Options\fR.
+.PP
+When an unrecognized warning option is requested (e.g.,
+\&\fB\-Wunknown\-warning\fR), \s-1GCC\s0 will emit a diagnostic stating
+that the option is not recognized.  However, if the \fB\-Wno\-\fR form
+is used, the behavior is slightly different: No diagnostic will be
+produced for \fB\-Wno\-unknown\-warning\fR unless other diagnostics
+are being produced.  This allows the use of new \fB\-Wno\-\fR options
+with old compilers, but if something goes wrong, the compiler will
+warn that an unrecognized option was used.
+.IP "\fB\-pedantic\fR" 4
+.IX Item "-pedantic"
+Issue all the warnings demanded by strict \s-1ISO\s0 C and \s-1ISO\s0 \*(C+;
+reject all programs that use forbidden extensions, and some other
+programs that do not follow \s-1ISO\s0 C and \s-1ISO\s0 \*(C+.  For \s-1ISO\s0 C, follows the
+version of the \s-1ISO\s0 C standard specified by any \fB\-std\fR option used.
+.Sp
+Valid \s-1ISO\s0 C and \s-1ISO\s0 \*(C+ programs should compile properly with or without
+this option (though a rare few will require \fB\-ansi\fR or a
+\&\fB\-std\fR option specifying the required version of \s-1ISO\s0 C).  However,
+without this option, certain \s-1GNU\s0 extensions and traditional C and \*(C+
+features are supported as well.  With this option, they are rejected.
+.Sp
+\&\fB\-pedantic\fR does not cause warning messages for use of the
+alternate keywords whose names begin and end with \fB_\|_\fR.  Pedantic
+warnings are also disabled in the expression that follows
+\&\f(CW\*(C`_\|_extension_\|_\*(C'\fR.  However, only system header files should use
+these escape routes; application programs should avoid them.
+.Sp
+Some users try to use \fB\-pedantic\fR to check programs for strict \s-1ISO\s0
+C conformance.  They soon find that it does not do quite what they want:
+it finds some non-ISO practices, but not all\-\-\-only those for which
+\&\s-1ISO\s0 C \fIrequires\fR a diagnostic, and some others for which
+diagnostics have been added.
+.Sp
+A feature to report any failure to conform to \s-1ISO\s0 C might be useful in
+some instances, but would require considerable additional work and would
+be quite different from \fB\-pedantic\fR.  We don't have plans to
+support such a feature in the near future.
+.Sp
+Where the standard specified with \fB\-std\fR represents a \s-1GNU\s0
+extended dialect of C, such as \fBgnu90\fR or \fBgnu99\fR, there is a
+corresponding \fIbase standard\fR, the version of \s-1ISO\s0 C on which the \s-1GNU\s0
+extended dialect is based.  Warnings from \fB\-pedantic\fR are given
+where they are required by the base standard.  (It would not make sense
+for such warnings to be given only for features not in the specified \s-1GNU\s0
+C dialect, since by definition the \s-1GNU\s0 dialects of C include all
+features the compiler supports with the given option, and there would be
+nothing to warn about.)
+.IP "\fB\-pedantic\-errors\fR" 4
+.IX Item "-pedantic-errors"
+Like \fB\-pedantic\fR, except that errors are produced rather than
+warnings.
+.IP "\fB\-Wall\fR" 4
+.IX Item "-Wall"
+This enables all the warnings about constructions that some users
+consider questionable, and that are easy to avoid (or modify to
+prevent the warning), even in conjunction with macros.  This also
+enables some language-specific warnings described in \fB\*(C+ Dialect
+Options\fR and \fBObjective-C and Objective\-\*(C+ Dialect Options\fR.
+.Sp
+\&\fB\-Wall\fR turns on the following warning flags:
+.Sp
+\&\fB\-Waddress   
+\&\-Warray\-bounds\fR (only with\fB \fR\fB\-O2\fR)  
+\&\fB\-Wc++0x\-compat  
+\&\-Wchar\-subscripts  
+\&\-Wenum\-compare\fR (in C/Objc; this is on by default in \*(C+) 
+\&\fB\-Wimplicit\-int\fR (C and Objective-C only) 
+\&\fB\-Wimplicit\-function\-declaration\fR (C and Objective-C only) 
+\&\fB\-Wcomment  
+\&\-Wformat   
+\&\-Wmain\fR (only for C/ObjC and unless\fB \fR\fB\-ffreestanding\fR)  
+\&\fB\-Wmissing\-braces  
+\&\-Wnonnull  
+\&\-Wparentheses  
+\&\-Wpointer\-sign  
+\&\-Wreorder   
+\&\-Wreturn\-type  
+\&\-Wsequence\-point  
+\&\-Wsign\-compare\fR (only in \*(C+)  
+\&\fB\-Wstrict\-aliasing  
+\&\-Wstrict\-overflow=1  
+\&\-Wswitch  
+\&\-Wtrigraphs  
+\&\-Wuninitialized  
+\&\-Wunknown\-pragmas  
+\&\-Wunused\-function  
+\&\-Wunused\-label     
+\&\-Wunused\-value     
+\&\-Wunused\-variable  
+\&\-Wvolatile\-register\-var\fR
+.Sp
+Note that some warning flags are not implied by \fB\-Wall\fR.  Some of
+them warn about constructions that users generally do not consider
+questionable, but which occasionally you might wish to check for;
+others warn about constructions that are necessary or hard to avoid in
+some cases, and there is no simple way to modify the code to suppress
+the warning. Some of them are enabled by \fB\-Wextra\fR but many of
+them must be enabled individually.
+.IP "\fB\-Wextra\fR" 4
+.IX Item "-Wextra"
+This enables some extra warning flags that are not enabled by
+\&\fB\-Wall\fR. (This option used to be called \fB\-W\fR.  The older
+name is still supported, but the newer name is more descriptive.)
+.Sp
+\&\fB\-Wclobbered  
+\&\-Wempty\-body  
+\&\-Wignored\-qualifiers 
+\&\-Wmissing\-field\-initializers  
+\&\-Wmissing\-parameter\-type\fR (C only)  
+\&\fB\-Wold\-style\-declaration\fR (C only)  
+\&\fB\-Woverride\-init  
+\&\-Wsign\-compare  
+\&\-Wtype\-limits  
+\&\-Wuninitialized  
+\&\-Wunused\-parameter\fR (only with\fB \fR\fB\-Wunused\fR\fB \fRor\fB \fR\fB\-Wall\fR) 
+\&\fB\-Wunused\-but\-set\-parameter\fR (only with\fB \fR\fB\-Wunused\fR\fB \fRor\fB \fR\fB\-Wall\fR)  \fB \fR
+.Sp
+The option \fB\-Wextra\fR also prints warning messages for the
+following cases:
+.RS 4
+.IP "\(bu" 4
+A pointer is compared against integer zero with \fB<\fR, \fB<=\fR,
+\&\fB>\fR, or \fB>=\fR.
+.IP "\(bu" 4
+(\*(C+ only) An enumerator and a non-enumerator both appear in a
+conditional expression.
+.IP "\(bu" 4
+(\*(C+ only) Ambiguous virtual bases.
+.IP "\(bu" 4
+(\*(C+ only) Subscripting an array which has been declared \fBregister\fR.
+.IP "\(bu" 4
+(\*(C+ only) Taking the address of a variable which has been declared
+\&\fBregister\fR.
+.IP "\(bu" 4
+(\*(C+ only) A base class is not initialized in a derived class' copy
+constructor.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Wchar\-subscripts\fR" 4
+.IX Item "-Wchar-subscripts"
+Warn if an array subscript has type \f(CW\*(C`char\*(C'\fR.  This is a common cause
+of error, as programmers often forget that this type is signed on some
+machines.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wcomment\fR" 4
+.IX Item "-Wcomment"
+Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
+comment, or whenever a Backslash-Newline appears in a \fB//\fR comment.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wno\-cpp\fR" 4
+.IX Item "-Wno-cpp"
+(C, Objective-C, \*(C+, Objective\-\*(C+ and Fortran only)
+.Sp
+Suppress warning messages emitted by \f(CW\*(C`#warning\*(C'\fR directives.
+.IP "\fB\-Wdouble\-promotion\fR (C, \*(C+, Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wdouble-promotion (C, , Objective-C and Objective- only)"
+Give a warning when a value of type \f(CW\*(C`float\*(C'\fR is implicitly
+promoted to \f(CW\*(C`double\*(C'\fR.  CPUs with a 32\-bit \*(L"single-precision\*(R"
+floating-point unit implement \f(CW\*(C`float\*(C'\fR in hardware, but emulate
+\&\f(CW\*(C`double\*(C'\fR in software.  On such a machine, doing computations
+using \f(CW\*(C`double\*(C'\fR values is much more expensive because of the
+overhead required for software emulation.
+.Sp
+It is easy to accidentally do computations with \f(CW\*(C`double\*(C'\fR because
+floating-point literals are implicitly of type \f(CW\*(C`double\*(C'\fR.  For
+example, in:
+.Sp
+.Vb 4
+\&        float area(float radius)
+\&        {
+\&           return 3.14159 * radius * radius;        
+\&        }
+.Ve
+.Sp
+the compiler will perform the entire computation with \f(CW\*(C`double\*(C'\fR
+because the floating-point literal is a \f(CW\*(C`double\*(C'\fR.
+.IP "\fB\-Wformat\fR" 4
+.IX Item "-Wformat"
+Check calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR, etc., to make sure that
+the arguments supplied have types appropriate to the format string
+specified, and that the conversions specified in the format string make
+sense.  This includes standard functions, and others specified by format
+attributes, in the \f(CW\*(C`printf\*(C'\fR,
+\&\f(CW\*(C`scanf\*(C'\fR, \f(CW\*(C`strftime\*(C'\fR and \f(CW\*(C`strfmon\*(C'\fR (an X/Open extension,
+not in the C standard) families (or other target-specific families).
+Which functions are checked without format attributes having been
+specified depends on the standard version selected, and such checks of
+functions without the attribute specified are disabled by
+\&\fB\-ffreestanding\fR or \fB\-fno\-builtin\fR.
+.Sp
+The formats are checked against the format features supported by \s-1GNU\s0
+libc version 2.2.  These include all \s-1ISO\s0 C90 and C99 features, as well
+as features from the Single Unix Specification and some \s-1BSD\s0 and \s-1GNU\s0
+extensions.  Other library implementations may not support all these
+features; \s-1GCC\s0 does not support warning about features that go beyond a
+particular library's limitations.  However, if \fB\-pedantic\fR is used
+with \fB\-Wformat\fR, warnings will be given about format features not
+in the selected standard version (but not for \f(CW\*(C`strfmon\*(C'\fR formats,
+since those are not in any version of the C standard).
+.Sp
+Since \fB\-Wformat\fR also checks for null format arguments for
+several functions, \fB\-Wformat\fR also implies \fB\-Wnonnull\fR.
+.Sp
+\&\fB\-Wformat\fR is included in \fB\-Wall\fR.  For more control over some
+aspects of format checking, the options \fB\-Wformat\-y2k\fR,
+\&\fB\-Wno\-format\-extra\-args\fR, \fB\-Wno\-format\-zero\-length\fR,
+\&\fB\-Wformat\-nonliteral\fR, \fB\-Wformat\-security\fR, and
+\&\fB\-Wformat=2\fR are available, but are not included in \fB\-Wall\fR.
+.IP "\fB\-Wformat\-y2k\fR" 4
+.IX Item "-Wformat-y2k"
+If \fB\-Wformat\fR is specified, also warn about \f(CW\*(C`strftime\*(C'\fR
+formats which may yield only a two-digit year.
+.IP "\fB\-Wno\-format\-contains\-nul\fR" 4
+.IX Item "-Wno-format-contains-nul"
+If \fB\-Wformat\fR is specified, do not warn about format strings that
+contain \s-1NUL\s0 bytes.
+.IP "\fB\-Wno\-format\-extra\-args\fR" 4
+.IX Item "-Wno-format-extra-args"
+If \fB\-Wformat\fR is specified, do not warn about excess arguments to a
+\&\f(CW\*(C`printf\*(C'\fR or \f(CW\*(C`scanf\*(C'\fR format function.  The C standard specifies
+that such arguments are ignored.
+.Sp
+Where the unused arguments lie between used arguments that are
+specified with \fB$\fR operand number specifications, normally
+warnings are still given, since the implementation could not know what
+type to pass to \f(CW\*(C`va_arg\*(C'\fR to skip the unused arguments.  However,
+in the case of \f(CW\*(C`scanf\*(C'\fR formats, this option will suppress the
+warning if the unused arguments are all pointers, since the Single
+Unix Specification says that such unused arguments are allowed.
+.IP "\fB\-Wno\-format\-zero\-length\fR (C and Objective-C only)" 4
+.IX Item "-Wno-format-zero-length (C and Objective-C only)"
+If \fB\-Wformat\fR is specified, do not warn about zero-length formats.
+The C standard specifies that zero-length formats are allowed.
+.IP "\fB\-Wformat\-nonliteral\fR" 4
+.IX Item "-Wformat-nonliteral"
+If \fB\-Wformat\fR is specified, also warn if the format string is not a
+string literal and so cannot be checked, unless the format function
+takes its format arguments as a \f(CW\*(C`va_list\*(C'\fR.
+.IP "\fB\-Wformat\-security\fR" 4
+.IX Item "-Wformat-security"
+If \fB\-Wformat\fR is specified, also warn about uses of format
+functions that represent possible security problems.  At present, this
+warns about calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR functions where the
+format string is not a string literal and there are no format arguments,
+as in \f(CW\*(C`printf (foo);\*(C'\fR.  This may be a security hole if the format
+string came from untrusted input and contains \fB\f(CB%n\fB\fR.  (This is
+currently a subset of what \fB\-Wformat\-nonliteral\fR warns about, but
+in future warnings may be added to \fB\-Wformat\-security\fR that are not
+included in \fB\-Wformat\-nonliteral\fR.)
+.IP "\fB\-Wformat=2\fR" 4
+.IX Item "-Wformat=2"
+Enable \fB\-Wformat\fR plus format checks not included in
+\&\fB\-Wformat\fR.  Currently equivalent to \fB\-Wformat
+\&\-Wformat\-nonliteral \-Wformat\-security \-Wformat\-y2k\fR.
+.IP "\fB\-Wnonnull\fR (C and Objective-C only)" 4
+.IX Item "-Wnonnull (C and Objective-C only)"
+Warn about passing a null pointer for arguments marked as
+requiring a non-null value by the \f(CW\*(C`nonnull\*(C'\fR function attribute.
+.Sp
+\&\fB\-Wnonnull\fR is included in \fB\-Wall\fR and \fB\-Wformat\fR.  It
+can be disabled with the \fB\-Wno\-nonnull\fR option.
+.IP "\fB\-Winit\-self\fR (C, \*(C+, Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Winit-self (C, , Objective-C and Objective- only)"
+Warn about uninitialized variables which are initialized with themselves.
+Note this option can only be used with the \fB\-Wuninitialized\fR option.
+.Sp
+For example, \s-1GCC\s0 will warn about \f(CW\*(C`i\*(C'\fR being uninitialized in the
+following snippet only when \fB\-Winit\-self\fR has been specified:
+.Sp
+.Vb 5
+\&        int f()
+\&        {
+\&          int i = i;
+\&          return i;
+\&        }
+.Ve
+.IP "\fB\-Wimplicit\-int\fR (C and Objective-C only)" 4
+.IX Item "-Wimplicit-int (C and Objective-C only)"
+Warn when a declaration does not specify a type.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wimplicit\-function\-declaration\fR (C and Objective-C only)" 4
+.IX Item "-Wimplicit-function-declaration (C and Objective-C only)"
+Give a warning whenever a function is used before being declared. In
+C99 mode (\fB\-std=c99\fR or \fB\-std=gnu99\fR), this warning is
+enabled by default and it is made into an error by
+\&\fB\-pedantic\-errors\fR. This warning is also enabled by
+\&\fB\-Wall\fR.
+.IP "\fB\-Wimplicit\fR (C and Objective-C only)" 4
+.IX Item "-Wimplicit (C and Objective-C only)"
+Same as \fB\-Wimplicit\-int\fR and \fB\-Wimplicit\-function\-declaration\fR.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wignored\-qualifiers\fR (C and \*(C+ only)" 4
+.IX Item "-Wignored-qualifiers (C and  only)"
+Warn if the return type of a function has a type qualifier
+such as \f(CW\*(C`const\*(C'\fR.  For \s-1ISO\s0 C such a type qualifier has no effect,
+since the value returned by a function is not an lvalue.
+For \*(C+, the warning is only emitted for scalar types or \f(CW\*(C`void\*(C'\fR.
+\&\s-1ISO\s0 C prohibits qualified \f(CW\*(C`void\*(C'\fR return types on function
+definitions, so such return types always receive a warning
+even without this option.
+.Sp
+This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wmain\fR" 4
+.IX Item "-Wmain"
+Warn if the type of \fBmain\fR is suspicious.  \fBmain\fR should be
+a function with external linkage, returning int, taking either zero
+arguments, two, or three arguments of appropriate types.  This warning
+is enabled by default in \*(C+ and is enabled by either \fB\-Wall\fR
+or \fB\-pedantic\fR.
+.IP "\fB\-Wmissing\-braces\fR" 4
+.IX Item "-Wmissing-braces"
+Warn if an aggregate or union initializer is not fully bracketed.  In
+the following example, the initializer for \fBa\fR is not fully
+bracketed, but that for \fBb\fR is fully bracketed.
+.Sp
+.Vb 2
+\&        int a[2][2] = { 0, 1, 2, 3 };
+\&        int b[2][2] = { { 0, 1 }, { 2, 3 } };
+.Ve
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wmissing\-include\-dirs\fR (C, \*(C+, Objective-C and Objective\-\*(C+ only)" 4
+.IX Item "-Wmissing-include-dirs (C, , Objective-C and Objective- only)"
+Warn if a user-supplied include directory does not exist.
+.IP "\fB\-Wparentheses\fR" 4
+.IX Item "-Wparentheses"
+Warn if parentheses are omitted in certain contexts, such
+as when there is an assignment in a context where a truth value
+is expected, or when operators are nested whose precedence people
+often get confused about.
+.Sp
+Also warn if a comparison like \fBx<=y<=z\fR appears; this is
+equivalent to \fB(x<=y ? 1 : 0) <= z\fR, which is a different
+interpretation from that of ordinary mathematical notation.
+.Sp
+Also warn about constructions where there may be confusion to which
+\&\f(CW\*(C`if\*(C'\fR statement an \f(CW\*(C`else\*(C'\fR branch belongs.  Here is an example of
+such a case:
+.Sp
+.Vb 7
+\&        {
+\&          if (a)
+\&            if (b)
+\&              foo ();
+\&          else
+\&            bar ();
+\&        }
+.Ve
+.Sp
+In C/\*(C+, every \f(CW\*(C`else\*(C'\fR branch belongs to the innermost possible
+\&\f(CW\*(C`if\*(C'\fR statement, which in this example is \f(CW\*(C`if (b)\*(C'\fR.  This is
+often not what the programmer expected, as illustrated in the above
+example by indentation the programmer chose.  When there is the
+potential for this confusion, \s-1GCC\s0 will issue a warning when this flag
+is specified.  To eliminate the warning, add explicit braces around
+the innermost \f(CW\*(C`if\*(C'\fR statement so there is no way the \f(CW\*(C`else\*(C'\fR
+could belong to the enclosing \f(CW\*(C`if\*(C'\fR.  The resulting code would
+look like this:
+.Sp
+.Vb 9
+\&        {
+\&          if (a)
+\&            {
+\&              if (b)
+\&                foo ();
+\&              else
+\&                bar ();
+\&            }
+\&        }
+.Ve
+.Sp
+Also warn for dangerous uses of the 
+?: with omitted middle operand \s-1GNU\s0 extension. When the condition
+in the ?: operator is a boolean expression the omitted value will
+be always 1. Often the user expects it to be a value computed
+inside the conditional expression instead.
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wsequence\-point\fR" 4
+.IX Item "-Wsequence-point"
+Warn about code that may have undefined semantics because of violations
+of sequence point rules in the C and \*(C+ standards.
+.Sp
+The C and \*(C+ standards defines the order in which expressions in a C/\*(C+
+program are evaluated in terms of \fIsequence points\fR, which represent
+a partial ordering between the execution of parts of the program: those
+executed before the sequence point, and those executed after it.  These
+occur after the evaluation of a full expression (one which is not part
+of a larger expression), after the evaluation of the first operand of a
+\&\f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, \f(CW\*(C`? :\*(C'\fR or \f(CW\*(C`,\*(C'\fR (comma) operator, before a
+function is called (but after the evaluation of its arguments and the
+expression denoting the called function), and in certain other places.
+Other than as expressed by the sequence point rules, the order of
+evaluation of subexpressions of an expression is not specified.  All
+these rules describe only a partial order rather than a total order,
+since, for example, if two functions are called within one expression
+with no sequence point between them, the order in which the functions
+are called is not specified.  However, the standards committee have
+ruled that function calls do not overlap.
+.Sp
+It is not specified when between sequence points modifications to the
+values of objects take effect.  Programs whose behavior depends on this
+have undefined behavior; the C and \*(C+ standards specify that \*(L"Between
+the previous and next sequence point an object shall have its stored
+value modified at most once by the evaluation of an expression.
+Furthermore, the prior value shall be read only to determine the value
+to be stored.\*(R".  If a program breaks these rules, the results on any
+particular implementation are entirely unpredictable.
+.Sp
+Examples of code with undefined behavior are \f(CW\*(C`a = a++;\*(C'\fR, \f(CW\*(C`a[n]
+= b[n++]\*(C'\fR and \f(CW\*(C`a[i++] = i;\*(C'\fR.  Some more complicated cases are not
+diagnosed by this option, and it may give an occasional false positive
+result, but in general it has been found fairly effective at detecting
+this sort of problem in programs.
+.Sp
+The standard is worded confusingly, therefore there is some debate
+over the precise meaning of the sequence point rules in subtle cases.
+Links to discussions of the problem, including proposed formal
+definitions, may be found on the \s-1GCC\s0 readings page, at
+<\fBhttp://gcc.gnu.org/readings.html\fR>.
+.Sp
+This warning is enabled by \fB\-Wall\fR for C and \*(C+.
+.IP "\fB\-Wreturn\-type\fR" 4
+.IX Item "-Wreturn-type"
+Warn whenever a function is defined with a return-type that defaults
+to \f(CW\*(C`int\*(C'\fR.  Also warn about any \f(CW\*(C`return\*(C'\fR statement with no
+return-value in a function whose return-type is not \f(CW\*(C`void\*(C'\fR
+(falling off the end of the function body is considered returning
+without a value), and about a \f(CW\*(C`return\*(C'\fR statement with an
+expression in a function whose return-type is \f(CW\*(C`void\*(C'\fR.
+.Sp
+For \*(C+, a function without return type always produces a diagnostic
+message, even when \fB\-Wno\-return\-type\fR is specified.  The only
+exceptions are \fBmain\fR and functions defined in system headers.
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wswitch\fR" 4
+.IX Item "-Wswitch"
+Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type
+and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that
+enumeration.  (The presence of a \f(CW\*(C`default\*(C'\fR label prevents this
+warning.)  \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also
+provoke warnings when this option is used (even if there is a
+\&\f(CW\*(C`default\*(C'\fR label).
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wswitch\-default\fR" 4
+.IX Item "-Wswitch-default"
+Warn whenever a \f(CW\*(C`switch\*(C'\fR statement does not have a \f(CW\*(C`default\*(C'\fR
+case.
+.IP "\fB\-Wswitch\-enum\fR" 4
+.IX Item "-Wswitch-enum"
+Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type
+and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that
+enumeration.  \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also
+provoke warnings when this option is used.  The only difference
+between \fB\-Wswitch\fR and this option is that this option gives a
+warning about an omitted enumeration code even if there is a
+\&\f(CW\*(C`default\*(C'\fR label.
+.IP "\fB\-Wsync\-nand\fR (C and \*(C+ only)" 4
+.IX Item "-Wsync-nand (C and  only)"
+Warn when \f(CW\*(C`_\|_sync_fetch_and_nand\*(C'\fR and \f(CW\*(C`_\|_sync_nand_and_fetch\*(C'\fR
+built-in functions are used.  These functions changed semantics in \s-1GCC\s0 4.4.
+.IP "\fB\-Wtrigraphs\fR" 4
+.IX Item "-Wtrigraphs"
+Warn if any trigraphs are encountered that might change the meaning of
+the program (trigraphs within comments are not warned about).
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wunused\-but\-set\-parameter\fR" 4
+.IX Item "-Wunused-but-set-parameter"
+Warn whenever a function parameter is assigned to, but otherwise unused
+(aside from its declaration).
+.Sp
+To suppress this warning use the \fBunused\fR attribute.
+.Sp
+This warning is also enabled by \fB\-Wunused\fR together with
+\&\fB\-Wextra\fR.
+.IP "\fB\-Wunused\-but\-set\-variable\fR" 4
+.IX Item "-Wunused-but-set-variable"
+Warn whenever a local variable is assigned to, but otherwise unused
+(aside from its declaration).
+This warning is enabled by \fB\-Wall\fR.
+.Sp
+To suppress this warning use the \fBunused\fR attribute.
+.Sp
+This warning is also enabled by \fB\-Wunused\fR, which is enabled
+by \fB\-Wall\fR.
+.IP "\fB\-Wunused\-function\fR" 4
+.IX Item "-Wunused-function"
+Warn whenever a static function is declared but not defined or a
+non-inline static function is unused.
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wunused\-label\fR" 4
+.IX Item "-Wunused-label"
+Warn whenever a label is declared but not used.
+This warning is enabled by \fB\-Wall\fR.
+.Sp
+To suppress this warning use the \fBunused\fR attribute.
+.IP "\fB\-Wunused\-parameter\fR" 4
+.IX Item "-Wunused-parameter"
+Warn whenever a function parameter is unused aside from its declaration.
+.Sp
+To suppress this warning use the \fBunused\fR attribute.
+.IP "\fB\-Wno\-unused\-result\fR" 4
+.IX Item "-Wno-unused-result"
+Do not warn if a caller of a function marked with attribute
+\&\f(CW\*(C`warn_unused_result\*(C'\fR does not use
+its return value. The default is \fB\-Wunused\-result\fR.
+.IP "\fB\-Wunused\-variable\fR" 4
+.IX Item "-Wunused-variable"
+Warn whenever a local variable or non-constant static variable is unused
+aside from its declaration.
+This warning is enabled by \fB\-Wall\fR.
+.Sp
+To suppress this warning use the \fBunused\fR attribute.
+.IP "\fB\-Wunused\-value\fR" 4
+.IX Item "-Wunused-value"
+Warn whenever a statement computes a result that is explicitly not
+used. To suppress this warning cast the unused expression to
+\&\fBvoid\fR. This includes an expression-statement or the left-hand
+side of a comma expression that contains no side effects. For example,
+an expression such as \fBx[i,j]\fR will cause a warning, while
+\&\fBx[(void)i,j]\fR will not.
+.Sp
+This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wunused\fR" 4
+.IX Item "-Wunused"
+All the above \fB\-Wunused\fR options combined.
+.Sp
+In order to get a warning about an unused function parameter, you must
+either specify \fB\-Wextra \-Wunused\fR (note that \fB\-Wall\fR implies
+\&\fB\-Wunused\fR), or separately specify \fB\-Wunused\-parameter\fR.
+.IP "\fB\-Wuninitialized\fR" 4
+.IX Item "-Wuninitialized"
+Warn if an automatic variable is used without first being initialized
+or if a variable may be clobbered by a \f(CW\*(C`setjmp\*(C'\fR call. In \*(C+,
+warn if a non-static reference or non-static \fBconst\fR member
+appears in a class without constructors.
+.Sp
+If you want to warn about code which uses the uninitialized value of the
+variable in its own initializer, use the \fB\-Winit\-self\fR option.
+.Sp
+These warnings occur for individual uninitialized or clobbered
+elements of structure, union or array variables as well as for
+variables which are uninitialized or clobbered as a whole.  They do
+not occur for variables or elements declared \f(CW\*(C`volatile\*(C'\fR.  Because
+these warnings depend on optimization, the exact variables or elements
+for which there are warnings will depend on the precise optimization
+options and version of \s-1GCC\s0 used.
+.Sp
+Note that there may be no warning about a variable that is used only
+to compute a value that itself is never used, because such
+computations may be deleted by data flow analysis before the warnings
+are printed.
+.Sp
+These warnings are made optional because \s-1GCC\s0 is not smart
+enough to see all the reasons why the code might be correct
+despite appearing to have an error.  Here is one example of how
+this can happen:
+.Sp
+.Vb 12
+\&        {
+\&          int x;
+\&          switch (y)
+\&            {
+\&            case 1: x = 1;
+\&              break;
+\&            case 2: x = 4;
+\&              break;
+\&            case 3: x = 5;
+\&            }
+\&          foo (x);
+\&        }
+.Ve
+.Sp
+If the value of \f(CW\*(C`y\*(C'\fR is always 1, 2 or 3, then \f(CW\*(C`x\*(C'\fR is
+always initialized, but \s-1GCC\s0 doesn't know this.  Here is
+another common case:
+.Sp
+.Vb 6
+\&        {
+\&          int save_y;
+\&          if (change_y) save_y = y, y = new_y;
+\&          ...
+\&          if (change_y) y = save_y;
+\&        }
+.Ve
+.Sp
+This has no bug because \f(CW\*(C`save_y\*(C'\fR is used only if it is set.
+.Sp
+This option also warns when a non-volatile automatic variable might be
+changed by a call to \f(CW\*(C`longjmp\*(C'\fR.  These warnings as well are possible
+only in optimizing compilation.
+.Sp
+The compiler sees only the calls to \f(CW\*(C`setjmp\*(C'\fR.  It cannot know
+where \f(CW\*(C`longjmp\*(C'\fR will be called; in fact, a signal handler could
+call it at any point in the code.  As a result, you may get a warning
+even when there is in fact no problem because \f(CW\*(C`longjmp\*(C'\fR cannot
+in fact be called at the place which would cause a problem.
+.Sp
+Some spurious warnings can be avoided if you declare all the functions
+you use that never return as \f(CW\*(C`noreturn\*(C'\fR.
+.Sp
+This warning is enabled by \fB\-Wall\fR or \fB\-Wextra\fR.
+.IP "\fB\-Wunknown\-pragmas\fR" 4
+.IX Item "-Wunknown-pragmas"
+Warn when a #pragma directive is encountered which is not understood by
+\&\s-1GCC\s0.  If this command line option is used, warnings will even be issued
+for unknown pragmas in system header files.  This is not the case if
+the warnings were only enabled by the \fB\-Wall\fR command line option.
+.IP "\fB\-Wno\-pragmas\fR" 4
+.IX Item "-Wno-pragmas"
+Do not warn about misuses of pragmas, such as incorrect parameters,
+invalid syntax, or conflicts between pragmas.  See also
+\&\fB\-Wunknown\-pragmas\fR.
+.IP "\fB\-Wstrict\-aliasing\fR" 4
+.IX Item "-Wstrict-aliasing"
+This option is only active when \fB\-fstrict\-aliasing\fR is active.
+It warns about code which might break the strict aliasing rules that the
+compiler is using for optimization.  The warning does not catch all
+cases, but does attempt to catch the more common pitfalls.  It is
+included in \fB\-Wall\fR.
+It is equivalent to \fB\-Wstrict\-aliasing=3\fR
+.IP "\fB\-Wstrict\-aliasing=n\fR" 4
+.IX Item "-Wstrict-aliasing=n"
+This option is only active when \fB\-fstrict\-aliasing\fR is active.
+It warns about code which might break the strict aliasing rules that the
+compiler is using for optimization.
+Higher levels correspond to higher accuracy (fewer false positives).
+Higher levels also correspond to more effort, similar to the way \-O works.
+\&\fB\-Wstrict\-aliasing\fR is equivalent to \fB\-Wstrict\-aliasing=n\fR,
+with n=3.
+.Sp
+Level 1: Most aggressive, quick, least accurate.
+Possibly useful when higher levels
+do not warn but \-fstrict\-aliasing still breaks the code, as it has very few
+false negatives.  However, it has many false positives.
+Warns for all pointer conversions between possibly incompatible types,
+even if never dereferenced.  Runs in the frontend only.
+.Sp
+Level 2: Aggressive, quick, not too precise.
+May still have many false positives (not as many as level 1 though),
+and few false negatives (but possibly more than level 1).
+Unlike level 1, it only warns when an address is taken.  Warns about
+incomplete types.  Runs in the frontend only.
+.Sp
+Level 3 (default for \fB\-Wstrict\-aliasing\fR):
+Should have very few false positives and few false
+negatives.  Slightly slower than levels 1 or 2 when optimization is enabled.
+Takes care of the common pun+dereference pattern in the frontend:
+\&\f(CW\*(C`*(int*)&some_float\*(C'\fR.
+If optimization is enabled, it also runs in the backend, where it deals
+with multiple statement cases using flow-sensitive points-to information.
+Only warns when the converted pointer is dereferenced.
+Does not warn about incomplete types.
+.IP "\fB\-Wstrict\-overflow\fR" 4
+.IX Item "-Wstrict-overflow"
+.PD 0
+.IP "\fB\-Wstrict\-overflow=\fR\fIn\fR" 4
+.IX Item "-Wstrict-overflow=n"
+.PD
+This option is only active when \fB\-fstrict\-overflow\fR is active.
+It warns about cases where the compiler optimizes based on the
+assumption that signed overflow does not occur.  Note that it does not
+warn about all cases where the code might overflow: it only warns
+about cases where the compiler implements some optimization.  Thus
+this warning depends on the optimization level.
+.Sp
+An optimization which assumes that signed overflow does not occur is
+perfectly safe if the values of the variables involved are such that
+overflow never does, in fact, occur.  Therefore this warning can
+easily give a false positive: a warning about code which is not
+actually a problem.  To help focus on important issues, several
+warning levels are defined.  No warnings are issued for the use of
+undefined signed overflow when estimating how many iterations a loop
+will require, in particular when determining whether a loop will be
+executed at all.
+.RS 4
+.IP "\fB\-Wstrict\-overflow=1\fR" 4
+.IX Item "-Wstrict-overflow=1"
+Warn about cases which are both questionable and easy to avoid.  For
+example: \f(CW\*(C`x + 1 > x\*(C'\fR; with \fB\-fstrict\-overflow\fR, the
+compiler will simplify this to \f(CW1\fR.  This level of
+\&\fB\-Wstrict\-overflow\fR is enabled by \fB\-Wall\fR; higher levels
+are not, and must be explicitly requested.
+.IP "\fB\-Wstrict\-overflow=2\fR" 4
+.IX Item "-Wstrict-overflow=2"
+Also warn about other cases where a comparison is simplified to a
+constant.  For example: \f(CW\*(C`abs (x) >= 0\*(C'\fR.  This can only be
+simplified when \fB\-fstrict\-overflow\fR is in effect, because
+\&\f(CW\*(C`abs (INT_MIN)\*(C'\fR overflows to \f(CW\*(C`INT_MIN\*(C'\fR, which is less than
+zero.  \fB\-Wstrict\-overflow\fR (with no level) is the same as
+\&\fB\-Wstrict\-overflow=2\fR.
+.IP "\fB\-Wstrict\-overflow=3\fR" 4
+.IX Item "-Wstrict-overflow=3"
+Also warn about other cases where a comparison is simplified.  For
+example: \f(CW\*(C`x + 1 > 1\*(C'\fR will be simplified to \f(CW\*(C`x > 0\*(C'\fR.
+.IP "\fB\-Wstrict\-overflow=4\fR" 4
+.IX Item "-Wstrict-overflow=4"
+Also warn about other simplifications not covered by the above cases.
+For example: \f(CW\*(C`(x * 10) / 5\*(C'\fR will be simplified to \f(CW\*(C`x * 2\*(C'\fR.
+.IP "\fB\-Wstrict\-overflow=5\fR" 4
+.IX Item "-Wstrict-overflow=5"
+Also warn about cases where the compiler reduces the magnitude of a
+constant involved in a comparison.  For example: \f(CW\*(C`x + 2 > y\*(C'\fR will
+be simplified to \f(CW\*(C`x + 1 >= y\*(C'\fR.  This is reported only at the
+highest warning level because this simplification applies to many
+comparisons, so this warning level will give a very large number of
+false positives.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Wsuggest\-attribute=\fR[\fBpure\fR|\fBconst\fR|\fBnoreturn\fR]" 4
+.IX Item "-Wsuggest-attribute=[pure|const|noreturn]"
+Warn for cases where adding an attribute may be beneficial. The
+attributes currently supported are listed below.
+.RS 4
+.IP "\fB\-Wsuggest\-attribute=pure\fR" 4
+.IX Item "-Wsuggest-attribute=pure"
+.PD 0
+.IP "\fB\-Wsuggest\-attribute=const\fR" 4
+.IX Item "-Wsuggest-attribute=const"
+.IP "\fB\-Wsuggest\-attribute=noreturn\fR" 4
+.IX Item "-Wsuggest-attribute=noreturn"
+.PD
+Warn about functions which might be candidates for attributes
+\&\f(CW\*(C`pure\*(C'\fR, \f(CW\*(C`const\*(C'\fR or \f(CW\*(C`noreturn\*(C'\fR.  The compiler only warns for
+functions visible in other compilation units or (in the case of \f(CW\*(C`pure\*(C'\fR and
+\&\f(CW\*(C`const\*(C'\fR) if it cannot prove that the function returns normally. A function
+returns normally if it doesn't contain an infinite loop nor returns abnormally
+by throwing, calling \f(CW\*(C`abort()\*(C'\fR or trapping.  This analysis requires option
+\&\fB\-fipa\-pure\-const\fR, which is enabled by default at \fB\-O\fR and
+higher.  Higher optimization levels improve the accuracy of the analysis.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Warray\-bounds\fR" 4
+.IX Item "-Warray-bounds"
+This option is only active when \fB\-ftree\-vrp\fR is active
+(default for \fB\-O2\fR and above). It warns about subscripts to arrays
+that are always out of bounds. This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wno\-div\-by\-zero\fR" 4
+.IX Item "-Wno-div-by-zero"
+Do not warn about compile-time integer division by zero.  Floating point
+division by zero is not warned about, as it can be a legitimate way of
+obtaining infinities and NaNs.
+.IP "\fB\-Wsystem\-headers\fR" 4
+.IX Item "-Wsystem-headers"
+Print warning messages for constructs found in system header files.
+Warnings from system headers are normally suppressed, on the assumption
+that they usually do not indicate real problems and would only make the
+compiler output harder to read.  Using this command line option tells
+\&\s-1GCC\s0 to emit warnings from system headers as if they occurred in user
+code.  However, note that using \fB\-Wall\fR in conjunction with this
+option will \fInot\fR warn about unknown pragmas in system
+headers\-\-\-for that, \fB\-Wunknown\-pragmas\fR must also be used.
+.IP "\fB\-Wtrampolines\fR" 4
+.IX Item "-Wtrampolines"
+.Vb 1
+\& Warn about trampolines generated for pointers to nested functions.
+\& 
+\& A trampoline is a small piece of data or code that is created at run
+\& time on the stack when the address of a nested function is taken, and
+\& is used to call the nested function indirectly.  For some targets, it
+\& is made up of data only and thus requires no special treatment.  But,
+\& for most targets, it is made up of code and thus requires the stack
+\& to be made executable in order for the program to work properly.
+.Ve
+.IP "\fB\-Wfloat\-equal\fR" 4
+.IX Item "-Wfloat-equal"
+Warn if floating point values are used in equality comparisons.
+.Sp
+The idea behind this is that sometimes it is convenient (for the
+programmer) to consider floating-point values as approximations to
+infinitely precise real numbers.  If you are doing this, then you need
+to compute (by analyzing the code, or in some other way) the maximum or
+likely maximum error that the computation introduces, and allow for it
+when performing comparisons (and when producing output, but that's a
+different problem).  In particular, instead of testing for equality, you
+would check to see whether the two values have ranges that overlap; and
+this is done with the relational operators, so equality comparisons are
+probably mistaken.
+.IP "\fB\-Wtraditional\fR (C and Objective-C only)" 4
+.IX Item "-Wtraditional (C and Objective-C only)"
+Warn about certain constructs that behave differently in traditional and
+\&\s-1ISO\s0 C.  Also warn about \s-1ISO\s0 C constructs that have no traditional C
+equivalent, and/or problematic constructs which should be avoided.
+.RS 4
+.IP "\(bu" 4
+Macro parameters that appear within string literals in the macro body.
+In traditional C macro replacement takes place within string literals,
+but does not in \s-1ISO\s0 C.
+.IP "\(bu" 4
+In traditional C, some preprocessor directives did not exist.
+Traditional preprocessors would only consider a line to be a directive
+if the \fB#\fR appeared in column 1 on the line.  Therefore
+\&\fB\-Wtraditional\fR warns about directives that traditional C
+understands but would ignore because the \fB#\fR does not appear as the
+first character on the line.  It also suggests you hide directives like
+\&\fB#pragma\fR not understood by traditional C by indenting them.  Some
+traditional implementations would not recognize \fB#elif\fR, so it
+suggests avoiding it altogether.
+.IP "\(bu" 4
+A function-like macro that appears without arguments.
+.IP "\(bu" 4
+The unary plus operator.
+.IP "\(bu" 4
+The \fBU\fR integer constant suffix, or the \fBF\fR or \fBL\fR floating point
+constant suffixes.  (Traditional C does support the \fBL\fR suffix on integer
+constants.)  Note, these suffixes appear in macros defined in the system
+headers of most modern systems, e.g. the \fB_MIN\fR/\fB_MAX\fR macros in \f(CW\*(C`<limits.h>\*(C'\fR.
+Use of these macros in user code might normally lead to spurious
+warnings, however \s-1GCC\s0's integrated preprocessor has enough context to
+avoid warning in these cases.
+.IP "\(bu" 4
+A function declared external in one block and then used after the end of
+the block.
+.IP "\(bu" 4
+A \f(CW\*(C`switch\*(C'\fR statement has an operand of type \f(CW\*(C`long\*(C'\fR.
+.IP "\(bu" 4
+A non\-\f(CW\*(C`static\*(C'\fR function declaration follows a \f(CW\*(C`static\*(C'\fR one.
+This construct is not accepted by some traditional C compilers.
+.IP "\(bu" 4
+The \s-1ISO\s0 type of an integer constant has a different width or
+signedness from its traditional type.  This warning is only issued if
+the base of the constant is ten.  I.e. hexadecimal or octal values, which
+typically represent bit patterns, are not warned about.
+.IP "\(bu" 4
+Usage of \s-1ISO\s0 string concatenation is detected.
+.IP "\(bu" 4
+Initialization of automatic aggregates.
+.IP "\(bu" 4
+Identifier conflicts with labels.  Traditional C lacks a separate
+namespace for labels.
+.IP "\(bu" 4
+Initialization of unions.  If the initializer is zero, the warning is
+omitted.  This is done under the assumption that the zero initializer in
+user code appears conditioned on e.g. \f(CW\*(C`_\|_STDC_\|_\*(C'\fR to avoid missing
+initializer warnings and relies on default initialization to zero in the
+traditional C case.
+.IP "\(bu" 4
+Conversions by prototypes between fixed/floating point values and vice
+versa.  The absence of these prototypes when compiling with traditional
+C would cause serious problems.  This is a subset of the possible
+conversion warnings, for the full set use \fB\-Wtraditional\-conversion\fR.
+.IP "\(bu" 4
+Use of \s-1ISO\s0 C style function definitions.  This warning intentionally is
+\&\fInot\fR issued for prototype declarations or variadic functions
+because these \s-1ISO\s0 C features will appear in your code when using
+libiberty's traditional C compatibility macros, \f(CW\*(C`PARAMS\*(C'\fR and
+\&\f(CW\*(C`VPARAMS\*(C'\fR.  This warning is also bypassed for nested functions
+because that feature is already a \s-1GCC\s0 extension and thus not relevant to
+traditional C compatibility.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Wtraditional\-conversion\fR (C and Objective-C only)" 4
+.IX Item "-Wtraditional-conversion (C and Objective-C only)"
+Warn if a prototype causes a type conversion that is different from what
+would happen to the same argument in the absence of a prototype.  This
+includes conversions of fixed point to floating and vice versa, and
+conversions changing the width or signedness of a fixed point argument
+except when the same as the default promotion.
+.IP "\fB\-Wdeclaration\-after\-statement\fR (C and Objective-C only)" 4
+.IX Item "-Wdeclaration-after-statement (C and Objective-C only)"
+Warn when a declaration is found after a statement in a block.  This
+construct, known from \*(C+, was introduced with \s-1ISO\s0 C99 and is by default
+allowed in \s-1GCC\s0.  It is not supported by \s-1ISO\s0 C90 and was not supported by
+\&\s-1GCC\s0 versions before \s-1GCC\s0 3.0.
+.IP "\fB\-Wundef\fR" 4
+.IX Item "-Wundef"
+Warn if an undefined identifier is evaluated in an \fB#if\fR directive.
+.IP "\fB\-Wno\-endif\-labels\fR" 4
+.IX Item "-Wno-endif-labels"
+Do not warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
+.IP "\fB\-Wshadow\fR" 4
+.IX Item "-Wshadow"
+Warn whenever a local variable or type declaration shadows another variable,
+parameter, type, or class member (in \*(C+), or whenever a built-in function
+is shadowed. Note that in \*(C+, the compiler will not warn if a local variable
+shadows a struct/class/enum, but will warn if it shadows an explicit typedef.
+.IP "\fB\-Wlarger\-than=\fR\fIlen\fR" 4
+.IX Item "-Wlarger-than=len"
+Warn whenever an object of larger than \fIlen\fR bytes is defined.
+.IP "\fB\-Wframe\-larger\-than=\fR\fIlen\fR" 4
+.IX Item "-Wframe-larger-than=len"
+Warn if the size of a function frame is larger than \fIlen\fR bytes.
+The computation done to determine the stack frame size is approximate
+and not conservative.
+The actual requirements may be somewhat greater than \fIlen\fR
+even if you do not get a warning.  In addition, any space allocated
+via \f(CW\*(C`alloca\*(C'\fR, variable-length arrays, or related constructs
+is not included by the compiler when determining
+whether or not to issue a warning.
+.IP "\fB\-Wunsafe\-loop\-optimizations\fR" 4
+.IX Item "-Wunsafe-loop-optimizations"
+Warn if the loop cannot be optimized because the compiler could not
+assume anything on the bounds of the loop indices.  With
+\&\fB\-funsafe\-loop\-optimizations\fR warn if the compiler made
+such assumptions.
+.IP "\fB\-Wno\-pedantic\-ms\-format\fR (MinGW targets only)" 4
+.IX Item "-Wno-pedantic-ms-format (MinGW targets only)"
+Disables the warnings about non-ISO \f(CW\*(C`printf\*(C'\fR / \f(CW\*(C`scanf\*(C'\fR format
+width specifiers \f(CW\*(C`I32\*(C'\fR, \f(CW\*(C`I64\*(C'\fR, and \f(CW\*(C`I\*(C'\fR used on Windows targets
+depending on the \s-1MS\s0 runtime, when you are using the options \fB\-Wformat\fR
+and \fB\-pedantic\fR without gnu-extensions.
+.IP "\fB\-Wpointer\-arith\fR" 4
+.IX Item "-Wpointer-arith"
+Warn about anything that depends on the \*(L"size of\*(R" a function type or
+of \f(CW\*(C`void\*(C'\fR.  \s-1GNU\s0 C assigns these types a size of 1, for
+convenience in calculations with \f(CW\*(C`void *\*(C'\fR pointers and pointers
+to functions.  In \*(C+, warn also when an arithmetic operation involves
+\&\f(CW\*(C`NULL\*(C'\fR.  This warning is also enabled by \fB\-pedantic\fR.
+.IP "\fB\-Wtype\-limits\fR" 4
+.IX Item "-Wtype-limits"
+Warn if a comparison is always true or always false due to the limited
+range of the data type, but do not warn for constant expressions.  For
+example, warn if an unsigned variable is compared against zero with
+\&\fB<\fR or \fB>=\fR.  This warning is also enabled by
+\&\fB\-Wextra\fR.
+.IP "\fB\-Wbad\-function\-cast\fR (C and Objective-C only)" 4
+.IX Item "-Wbad-function-cast (C and Objective-C only)"
+Warn whenever a function call is cast to a non-matching type.
+For example, warn if \f(CW\*(C`int malloc()\*(C'\fR is cast to \f(CW\*(C`anything *\*(C'\fR.
+.IP "\fB\-Wc++\-compat\fR (C and Objective-C only)" 4
+.IX Item "-Wc++-compat (C and Objective-C only)"
+Warn about \s-1ISO\s0 C constructs that are outside of the common subset of
+\&\s-1ISO\s0 C and \s-1ISO\s0 \*(C+, e.g. request for implicit conversion from
+\&\f(CW\*(C`void *\*(C'\fR to a pointer to non\-\f(CW\*(C`void\*(C'\fR type.
+.IP "\fB\-Wc++0x\-compat\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wc++0x-compat ( and Objective- only)"
+Warn about \*(C+ constructs whose meaning differs between \s-1ISO\s0 \*(C+ 1998 and
+\&\s-1ISO\s0 \*(C+ 200x, e.g., identifiers in \s-1ISO\s0 \*(C+ 1998 that will become keywords
+in \s-1ISO\s0 \*(C+ 200x.  This warning is enabled by \fB\-Wall\fR.
+.IP "\fB\-Wcast\-qual\fR" 4
+.IX Item "-Wcast-qual"
+Warn whenever a pointer is cast so as to remove a type qualifier from
+the target type.  For example, warn if a \f(CW\*(C`const char *\*(C'\fR is cast
+to an ordinary \f(CW\*(C`char *\*(C'\fR.
+.Sp
+Also warn when making a cast which introduces a type qualifier in an
+unsafe way.  For example, casting \f(CW\*(C`char **\*(C'\fR to \f(CW\*(C`const char **\*(C'\fR
+is unsafe, as in this example:
+.Sp
+.Vb 6
+\&          /* p is char ** value.  */
+\&          const char **q = (const char **) p;
+\&          /* Assignment of readonly string to const char * is OK.  */
+\&          *q = "string";
+\&          /* Now char** pointer points to read\-only memory.  */
+\&          **p = \*(Aqb\*(Aq;
+.Ve
+.IP "\fB\-Wcast\-align\fR" 4
+.IX Item "-Wcast-align"
+Warn whenever a pointer is cast such that the required alignment of the
+target is increased.  For example, warn if a \f(CW\*(C`char *\*(C'\fR is cast to
+an \f(CW\*(C`int *\*(C'\fR on machines where integers can only be accessed at
+two\- or four-byte boundaries.
+.IP "\fB\-Wwrite\-strings\fR" 4
+.IX Item "-Wwrite-strings"
+When compiling C, give string constants the type \f(CW\*(C`const
+char[\f(CIlength\f(CW]\*(C'\fR so that copying the address of one into a
+non\-\f(CW\*(C`const\*(C'\fR \f(CW\*(C`char *\*(C'\fR pointer will get a warning.  These
+warnings will help you find at compile time code that can try to write
+into a string constant, but only if you have been very careful about
+using \f(CW\*(C`const\*(C'\fR in declarations and prototypes.  Otherwise, it will
+just be a nuisance. This is why we did not make \fB\-Wall\fR request
+these warnings.
+.Sp
+When compiling \*(C+, warn about the deprecated conversion from string
+literals to \f(CW\*(C`char *\*(C'\fR.  This warning is enabled by default for \*(C+
+programs.
+.IP "\fB\-Wclobbered\fR" 4
+.IX Item "-Wclobbered"
+Warn for variables that might be changed by \fBlongjmp\fR or
+\&\fBvfork\fR.  This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wconversion\fR" 4
+.IX Item "-Wconversion"
+Warn for implicit conversions that may alter a value. This includes
+conversions between real and integer, like \f(CW\*(C`abs (x)\*(C'\fR when
+\&\f(CW\*(C`x\*(C'\fR is \f(CW\*(C`double\*(C'\fR; conversions between signed and unsigned,
+like \f(CW\*(C`unsigned ui = \-1\*(C'\fR; and conversions to smaller types, like
+\&\f(CW\*(C`sqrtf (M_PI)\*(C'\fR. Do not warn for explicit casts like \f(CW\*(C`abs
+((int) x)\*(C'\fR and \f(CW\*(C`ui = (unsigned) \-1\*(C'\fR, or if the value is not
+changed by the conversion like in \f(CW\*(C`abs (2.0)\*(C'\fR.  Warnings about
+conversions between signed and unsigned integers can be disabled by
+using \fB\-Wno\-sign\-conversion\fR.
+.Sp
+For \*(C+, also warn for confusing overload resolution for user-defined
+conversions; and conversions that will never use a type conversion
+operator: conversions to \f(CW\*(C`void\*(C'\fR, the same type, a base class or a
+reference to them. Warnings about conversions between signed and
+unsigned integers are disabled by default in \*(C+ unless
+\&\fB\-Wsign\-conversion\fR is explicitly enabled.
+.IP "\fB\-Wno\-conversion\-null\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-conversion-null ( and Objective- only)"
+Do not warn for conversions between \f(CW\*(C`NULL\*(C'\fR and non-pointer
+types. \fB\-Wconversion\-null\fR is enabled by default.
+.IP "\fB\-Wempty\-body\fR" 4
+.IX Item "-Wempty-body"
+Warn if an empty body occurs in an \fBif\fR, \fBelse\fR or \fBdo
+while\fR statement.  This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wenum\-compare\fR" 4
+.IX Item "-Wenum-compare"
+Warn about a comparison between values of different enum types. In \*(C+
+this warning is enabled by default.  In C this warning is enabled by
+\&\fB\-Wall\fR.
+.IP "\fB\-Wjump\-misses\-init\fR (C, Objective-C only)" 4
+.IX Item "-Wjump-misses-init (C, Objective-C only)"
+Warn if a \f(CW\*(C`goto\*(C'\fR statement or a \f(CW\*(C`switch\*(C'\fR statement jumps
+forward across the initialization of a variable, or jumps backward to a
+label after the variable has been initialized.  This only warns about
+variables which are initialized when they are declared.  This warning is
+only supported for C and Objective C; in \*(C+ this sort of branch is an
+error in any case.
+.Sp
+\&\fB\-Wjump\-misses\-init\fR is included in \fB\-Wc++\-compat\fR.  It
+can be disabled with the \fB\-Wno\-jump\-misses\-init\fR option.
+.IP "\fB\-Wsign\-compare\fR" 4
+.IX Item "-Wsign-compare"
+Warn when a comparison between signed and unsigned values could produce
+an incorrect result when the signed value is converted to unsigned.
+This warning is also enabled by \fB\-Wextra\fR; to get the other warnings
+of \fB\-Wextra\fR without this warning, use \fB\-Wextra \-Wno\-sign\-compare\fR.
+.IP "\fB\-Wsign\-conversion\fR" 4
+.IX Item "-Wsign-conversion"
+Warn for implicit conversions that may change the sign of an integer
+value, like assigning a signed integer expression to an unsigned
+integer variable. An explicit cast silences the warning. In C, this
+option is enabled also by \fB\-Wconversion\fR.
+.IP "\fB\-Waddress\fR" 4
+.IX Item "-Waddress"
+Warn about suspicious uses of memory addresses. These include using
+the address of a function in a conditional expression, such as
+\&\f(CW\*(C`void func(void); if (func)\*(C'\fR, and comparisons against the memory
+address of a string literal, such as \f(CW\*(C`if (x == "abc")\*(C'\fR.  Such
+uses typically indicate a programmer error: the address of a function
+always evaluates to true, so their use in a conditional usually
+indicate that the programmer forgot the parentheses in a function
+call; and comparisons against string literals result in unspecified
+behavior and are not portable in C, so they usually indicate that the
+programmer intended to use \f(CW\*(C`strcmp\*(C'\fR.  This warning is enabled by
+\&\fB\-Wall\fR.
+.IP "\fB\-Wlogical\-op\fR" 4
+.IX Item "-Wlogical-op"
+Warn about suspicious uses of logical operators in expressions.
+This includes using logical operators in contexts where a
+bit-wise operator is likely to be expected.
+.IP "\fB\-Waggregate\-return\fR" 4
+.IX Item "-Waggregate-return"
+Warn if any functions that return structures or unions are defined or
+called.  (In languages where you can return an array, this also elicits
+a warning.)
+.IP "\fB\-Wno\-attributes\fR" 4
+.IX Item "-Wno-attributes"
+Do not warn if an unexpected \f(CW\*(C`_\|_attribute_\|_\*(C'\fR is used, such as
+unrecognized attributes, function attributes applied to variables,
+etc.  This will not stop errors for incorrect use of supported
+attributes.
+.IP "\fB\-Wno\-builtin\-macro\-redefined\fR" 4
+.IX Item "-Wno-builtin-macro-redefined"
+Do not warn if certain built-in macros are redefined.  This suppresses
+warnings for redefinition of \f(CW\*(C`_\|_TIMESTAMP_\|_\*(C'\fR, \f(CW\*(C`_\|_TIME_\|_\*(C'\fR,
+\&\f(CW\*(C`_\|_DATE_\|_\*(C'\fR, \f(CW\*(C`_\|_FILE_\|_\*(C'\fR, and \f(CW\*(C`_\|_BASE_FILE_\|_\*(C'\fR.
+.IP "\fB\-Wstrict\-prototypes\fR (C and Objective-C only)" 4
+.IX Item "-Wstrict-prototypes (C and Objective-C only)"
+Warn if a function is declared or defined without specifying the
+argument types.  (An old-style function definition is permitted without
+a warning if preceded by a declaration which specifies the argument
+types.)
+.IP "\fB\-Wold\-style\-declaration\fR (C and Objective-C only)" 4
+.IX Item "-Wold-style-declaration (C and Objective-C only)"
+Warn for obsolescent usages, according to the C Standard, in a
+declaration. For example, warn if storage-class specifiers like
+\&\f(CW\*(C`static\*(C'\fR are not the first things in a declaration.  This warning
+is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wold\-style\-definition\fR (C and Objective-C only)" 4
+.IX Item "-Wold-style-definition (C and Objective-C only)"
+Warn if an old-style function definition is used.  A warning is given
+even if there is a previous prototype.
+.IP "\fB\-Wmissing\-parameter\-type\fR (C and Objective-C only)" 4
+.IX Item "-Wmissing-parameter-type (C and Objective-C only)"
+A function parameter is declared without a type specifier in K&R\-style
+functions:
+.Sp
+.Vb 1
+\&        void foo(bar) { }
+.Ve
+.Sp
+This warning is also enabled by \fB\-Wextra\fR.
+.IP "\fB\-Wmissing\-prototypes\fR (C and Objective-C only)" 4
+.IX Item "-Wmissing-prototypes (C and Objective-C only)"
+Warn if a global function is defined without a previous prototype
+declaration.  This warning is issued even if the definition itself
+provides a prototype.  The aim is to detect global functions that fail
+to be declared in header files.
+.IP "\fB\-Wmissing\-declarations\fR" 4
+.IX Item "-Wmissing-declarations"
+Warn if a global function is defined without a previous declaration.
+Do so even if the definition itself provides a prototype.
+Use this option to detect global functions that are not declared in
+header files.  In \*(C+, no warnings are issued for function templates,
+or for inline functions, or for functions in anonymous namespaces.
+.IP "\fB\-Wmissing\-field\-initializers\fR" 4
+.IX Item "-Wmissing-field-initializers"
+Warn if a structure's initializer has some fields missing.  For
+example, the following code would cause such a warning, because
+\&\f(CW\*(C`x.h\*(C'\fR is implicitly zero:
+.Sp
+.Vb 2
+\&        struct s { int f, g, h; };
+\&        struct s x = { 3, 4 };
+.Ve
+.Sp
+This option does not warn about designated initializers, so the following
+modification would not trigger a warning:
+.Sp
+.Vb 2
+\&        struct s { int f, g, h; };
+\&        struct s x = { .f = 3, .g = 4 };
+.Ve
+.Sp
+This warning is included in \fB\-Wextra\fR.  To get other \fB\-Wextra\fR
+warnings without this one, use \fB\-Wextra \-Wno\-missing\-field\-initializers\fR.
+.IP "\fB\-Wmissing\-format\-attribute\fR" 4
+.IX Item "-Wmissing-format-attribute"
+Warn about function pointers which might be candidates for \f(CW\*(C`format\*(C'\fR
+attributes.  Note these are only possible candidates, not absolute ones.
+\&\s-1GCC\s0 will guess that function pointers with \f(CW\*(C`format\*(C'\fR attributes that
+are used in assignment, initialization, parameter passing or return
+statements should have a corresponding \f(CW\*(C`format\*(C'\fR attribute in the
+resulting type.  I.e. the left-hand side of the assignment or
+initialization, the type of the parameter variable, or the return type
+of the containing function respectively should also have a \f(CW\*(C`format\*(C'\fR
+attribute to avoid the warning.
+.Sp
+\&\s-1GCC\s0 will also warn about function definitions which might be
+candidates for \f(CW\*(C`format\*(C'\fR attributes.  Again, these are only
+possible candidates.  \s-1GCC\s0 will guess that \f(CW\*(C`format\*(C'\fR attributes
+might be appropriate for any function that calls a function like
+\&\f(CW\*(C`vprintf\*(C'\fR or \f(CW\*(C`vscanf\*(C'\fR, but this might not always be the
+case, and some functions for which \f(CW\*(C`format\*(C'\fR attributes are
+appropriate may not be detected.
+.IP "\fB\-Wno\-multichar\fR" 4
+.IX Item "-Wno-multichar"
+Do not warn if a multicharacter constant (\fB'\s-1FOOF\s0'\fR) is used.
+Usually they indicate a typo in the user's code, as they have
+implementation-defined values, and should not be used in portable code.
+.IP "\fB\-Wnormalized=<none|id|nfc|nfkc>\fR" 4
+.IX Item "-Wnormalized=<none|id|nfc|nfkc>"
+In \s-1ISO\s0 C and \s-1ISO\s0 \*(C+, two identifiers are different if they are
+different sequences of characters.  However, sometimes when characters
+outside the basic \s-1ASCII\s0 character set are used, you can have two
+different character sequences that look the same.  To avoid confusion,
+the \s-1ISO\s0 10646 standard sets out some \fInormalization rules\fR which
+when applied ensure that two sequences that look the same are turned into
+the same sequence.  \s-1GCC\s0 can warn you if you are using identifiers which
+have not been normalized; this option controls that warning.
+.Sp
+There are four levels of warning that \s-1GCC\s0 supports.  The default is
+\&\fB\-Wnormalized=nfc\fR, which warns about any identifier which is
+not in the \s-1ISO\s0 10646 \*(L"C\*(R" normalized form, \fI\s-1NFC\s0\fR.  \s-1NFC\s0 is the
+recommended form for most uses.
+.Sp
+Unfortunately, there are some characters which \s-1ISO\s0 C and \s-1ISO\s0 \*(C+ allow
+in identifiers that when turned into \s-1NFC\s0 aren't allowable as
+identifiers.  That is, there's no way to use these symbols in portable
+\&\s-1ISO\s0 C or \*(C+ and have all your identifiers in \s-1NFC\s0.
+\&\fB\-Wnormalized=id\fR suppresses the warning for these characters.
+It is hoped that future versions of the standards involved will correct
+this, which is why this option is not the default.
+.Sp
+You can switch the warning off for all characters by writing
+\&\fB\-Wnormalized=none\fR.  You would only want to do this if you
+were using some other normalization scheme (like \*(L"D\*(R"), because
+otherwise you can easily create bugs that are literally impossible to see.
+.Sp
+Some characters in \s-1ISO\s0 10646 have distinct meanings but look identical
+in some fonts or display methodologies, especially once formatting has
+been applied.  For instance \f(CW\*(C`\eu207F\*(C'\fR, \*(L"\s-1SUPERSCRIPT\s0 \s-1LATIN\s0 \s-1SMALL\s0
+\&\s-1LETTER\s0 N\*(R", will display just like a regular \f(CW\*(C`n\*(C'\fR which has been
+placed in a superscript.  \s-1ISO\s0 10646 defines the \fI\s-1NFKC\s0\fR
+normalization scheme to convert all these into a standard form as
+well, and \s-1GCC\s0 will warn if your code is not in \s-1NFKC\s0 if you use
+\&\fB\-Wnormalized=nfkc\fR.  This warning is comparable to warning
+about every identifier that contains the letter O because it might be
+confused with the digit 0, and so is not the default, but may be
+useful as a local coding convention if the programming environment is
+unable to be fixed to display these characters distinctly.
+.IP "\fB\-Wno\-deprecated\fR" 4
+.IX Item "-Wno-deprecated"
+Do not warn about usage of deprecated features.
+.IP "\fB\-Wno\-deprecated\-declarations\fR" 4
+.IX Item "-Wno-deprecated-declarations"
+Do not warn about uses of functions,
+variables, and types marked as deprecated by using the \f(CW\*(C`deprecated\*(C'\fR
+attribute.
+.IP "\fB\-Wno\-overflow\fR" 4
+.IX Item "-Wno-overflow"
+Do not warn about compile-time overflow in constant expressions.
+.IP "\fB\-Woverride\-init\fR (C and Objective-C only)" 4
+.IX Item "-Woverride-init (C and Objective-C only)"
+Warn if an initialized field without side effects is overridden when
+using designated initializers.
+.Sp
+This warning is included in \fB\-Wextra\fR.  To get other
+\&\fB\-Wextra\fR warnings without this one, use \fB\-Wextra
+\&\-Wno\-override\-init\fR.
+.IP "\fB\-Wpacked\fR" 4
+.IX Item "-Wpacked"
+Warn if a structure is given the packed attribute, but the packed
+attribute has no effect on the layout or size of the structure.
+Such structures may be mis-aligned for little benefit.  For
+instance, in this code, the variable \f(CW\*(C`f.x\*(C'\fR in \f(CW\*(C`struct bar\*(C'\fR
+will be misaligned even though \f(CW\*(C`struct bar\*(C'\fR does not itself
+have the packed attribute:
+.Sp
+.Vb 8
+\&        struct foo {
+\&          int x;
+\&          char a, b, c, d;
+\&        } _\|_attribute_\|_((packed));
+\&        struct bar {
+\&          char z;
+\&          struct foo f;
+\&        };
+.Ve
+.IP "\fB\-Wpacked\-bitfield\-compat\fR" 4
+.IX Item "-Wpacked-bitfield-compat"
+The 4.1, 4.2 and 4.3 series of \s-1GCC\s0 ignore the \f(CW\*(C`packed\*(C'\fR attribute
+on bit-fields of type \f(CW\*(C`char\*(C'\fR.  This has been fixed in \s-1GCC\s0 4.4 but
+the change can lead to differences in the structure layout.  \s-1GCC\s0
+informs you when the offset of such a field has changed in \s-1GCC\s0 4.4.
+For example there is no longer a 4\-bit padding between field \f(CW\*(C`a\*(C'\fR
+and \f(CW\*(C`b\*(C'\fR in this structure:
+.Sp
+.Vb 5
+\&        struct foo
+\&        {
+\&          char a:4;
+\&          char b:8;
+\&        } _\|_attribute_\|_ ((packed));
+.Ve
+.Sp
+This warning is enabled by default.  Use
+\&\fB\-Wno\-packed\-bitfield\-compat\fR to disable this warning.
+.IP "\fB\-Wpadded\fR" 4
+.IX Item "-Wpadded"
+Warn if padding is included in a structure, either to align an element
+of the structure or to align the whole structure.  Sometimes when this
+happens it is possible to rearrange the fields of the structure to
+reduce the padding and so make the structure smaller.
+.IP "\fB\-Wredundant\-decls\fR" 4
+.IX Item "-Wredundant-decls"
+Warn if anything is declared more than once in the same scope, even in
+cases where multiple declaration is valid and changes nothing.
+.IP "\fB\-Wnested\-externs\fR (C and Objective-C only)" 4
+.IX Item "-Wnested-externs (C and Objective-C only)"
+Warn if an \f(CW\*(C`extern\*(C'\fR declaration is encountered within a function.
+.IP "\fB\-Winline\fR" 4
+.IX Item "-Winline"
+Warn if a function can not be inlined and it was declared as inline.
+Even with this option, the compiler will not warn about failures to
+inline functions declared in system headers.
+.Sp
+The compiler uses a variety of heuristics to determine whether or not
+to inline a function.  For example, the compiler takes into account
+the size of the function being inlined and the amount of inlining
+that has already been done in the current function.  Therefore,
+seemingly insignificant changes in the source program can cause the
+warnings produced by \fB\-Winline\fR to appear or disappear.
+.IP "\fB\-Wno\-invalid\-offsetof\fR (\*(C+ and Objective\-\*(C+ only)" 4
+.IX Item "-Wno-invalid-offsetof ( and Objective- only)"
+Suppress warnings from applying the \fBoffsetof\fR macro to a non-POD
+type.  According to the 1998 \s-1ISO\s0 \*(C+ standard, applying \fBoffsetof\fR
+to a non-POD type is undefined.  In existing \*(C+ implementations,
+however, \fBoffsetof\fR typically gives meaningful results even when
+applied to certain kinds of non-POD types. (Such as a simple
+\&\fBstruct\fR that fails to be a \s-1POD\s0 type only by virtue of having a
+constructor.)  This flag is for users who are aware that they are
+writing nonportable code and who have deliberately chosen to ignore the
+warning about it.
+.Sp
+The restrictions on \fBoffsetof\fR may be relaxed in a future version
+of the \*(C+ standard.
+.IP "\fB\-Wno\-int\-to\-pointer\-cast\fR" 4
+.IX Item "-Wno-int-to-pointer-cast"
+Suppress warnings from casts to pointer type of an integer of a
+different size. In \*(C+, casting to a pointer type of smaller size is
+an error. \fBWint-to-pointer-cast\fR is enabled by default.
+.IP "\fB\-Wno\-pointer\-to\-int\-cast\fR (C and Objective-C only)" 4
+.IX Item "-Wno-pointer-to-int-cast (C and Objective-C only)"
+Suppress warnings from casts from a pointer to an integer type of a
+different size.
+.IP "\fB\-Winvalid\-pch\fR" 4
+.IX Item "-Winvalid-pch"
+Warn if a precompiled header is found in
+the search path but can't be used.
+.IP "\fB\-Wlong\-long\fR" 4
+.IX Item "-Wlong-long"
+Warn if \fBlong long\fR type is used.  This is enabled by either
+\&\fB\-pedantic\fR or \fB\-Wtraditional\fR in \s-1ISO\s0 C90 and \*(C+98
+modes.  To inhibit the warning messages, use \fB\-Wno\-long\-long\fR.
+.IP "\fB\-Wvariadic\-macros\fR" 4
+.IX Item "-Wvariadic-macros"
+Warn if variadic macros are used in pedantic \s-1ISO\s0 C90 mode, or the \s-1GNU\s0
+alternate syntax when in pedantic \s-1ISO\s0 C99 mode.  This is default.
+To inhibit the warning messages, use \fB\-Wno\-variadic\-macros\fR.
+.IP "\fB\-Wvla\fR" 4
+.IX Item "-Wvla"
+Warn if variable length array is used in the code.
+\&\fB\-Wno\-vla\fR will prevent the \fB\-pedantic\fR warning of
+the variable length array.
+.IP "\fB\-Wvolatile\-register\-var\fR" 4
+.IX Item "-Wvolatile-register-var"
+Warn if a register variable is declared volatile.  The volatile
+modifier does not inhibit all optimizations that may eliminate reads
+and/or writes to register variables.  This warning is enabled by
+\&\fB\-Wall\fR.
+.IP "\fB\-Wdisabled\-optimization\fR" 4
+.IX Item "-Wdisabled-optimization"
+Warn if a requested optimization pass is disabled.  This warning does
+not generally indicate that there is anything wrong with your code; it
+merely indicates that \s-1GCC\s0's optimizers were unable to handle the code
+effectively.  Often, the problem is that your code is too big or too
+complex; \s-1GCC\s0 will refuse to optimize programs when the optimization
+itself is likely to take inordinate amounts of time.
+.IP "\fB\-Wpointer\-sign\fR (C and Objective-C only)" 4
+.IX Item "-Wpointer-sign (C and Objective-C only)"
+Warn for pointer argument passing or assignment with different signedness.
+This option is only supported for C and Objective-C.  It is implied by
+\&\fB\-Wall\fR and by \fB\-pedantic\fR, which can be disabled with
+\&\fB\-Wno\-pointer\-sign\fR.
+.IP "\fB\-Wstack\-protector\fR" 4
+.IX Item "-Wstack-protector"
+This option is only active when \fB\-fstack\-protector\fR is active.  It
+warns about functions that will not be protected against stack smashing.
+.IP "\fB\-Wno\-mudflap\fR" 4
+.IX Item "-Wno-mudflap"
+Suppress warnings about constructs that cannot be instrumented by
+\&\fB\-fmudflap\fR.
+.IP "\fB\-Woverlength\-strings\fR" 4
+.IX Item "-Woverlength-strings"
+Warn about string constants which are longer than the \*(L"minimum
+maximum\*(R" length specified in the C standard.  Modern compilers
+generally allow string constants which are much longer than the
+standard's minimum limit, but very portable programs should avoid
+using longer strings.
+.Sp
+The limit applies \fIafter\fR string constant concatenation, and does
+not count the trailing \s-1NUL\s0.  In C90, the limit was 509 characters; in
+C99, it was raised to 4095.  \*(C+98 does not specify a normative
+minimum maximum, so we do not diagnose overlength strings in \*(C+.
+.Sp
+This option is implied by \fB\-pedantic\fR, and can be disabled with
+\&\fB\-Wno\-overlength\-strings\fR.
+.IP "\fB\-Wunsuffixed\-float\-constants\fR (C and Objective-C only)" 4
+.IX Item "-Wunsuffixed-float-constants (C and Objective-C only)"
+\&\s-1GCC\s0 will issue a warning for any floating constant that does not have
+a suffix.  When used together with \fB\-Wsystem\-headers\fR it will
+warn about such constants in system header files.  This can be useful
+when preparing code to use with the \f(CW\*(C`FLOAT_CONST_DECIMAL64\*(C'\fR pragma
+from the decimal floating-point extension to C99.
+.SS "Options for Debugging Your Program or \s-1GCC\s0"
+.IX Subsection "Options for Debugging Your Program or GCC"
+\&\s-1GCC\s0 has various special options that are used for debugging
+either your program or \s-1GCC:\s0
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+Produce debugging information in the operating system's native format
+(stabs, \s-1COFF\s0, \s-1XCOFF\s0, or \s-1DWARF\s0 2).  \s-1GDB\s0 can work with this debugging
+information.
+.Sp
+On most systems that use stabs format, \fB\-g\fR enables use of extra
+debugging information that only \s-1GDB\s0 can use; this extra information
+makes debugging work better in \s-1GDB\s0 but will probably make other debuggers
+crash or
+refuse to read the program.  If you want to control for certain whether
+to generate the extra information, use \fB\-gstabs+\fR, \fB\-gstabs\fR,
+\&\fB\-gxcoff+\fR, \fB\-gxcoff\fR, or \fB\-gvms\fR (see below).
+.Sp
+\&\s-1GCC\s0 allows you to use \fB\-g\fR with
+\&\fB\-O\fR.  The shortcuts taken by optimized code may occasionally
+produce surprising results: some variables you declared may not exist
+at all; flow of control may briefly move where you did not expect it;
+some statements may not be executed because they compute constant
+results or their values were already at hand; some statements may
+execute in different places because they were moved out of loops.
+.Sp
+Nevertheless it proves possible to debug optimized output.  This makes
+it reasonable to use the optimizer for programs that might have bugs.
+.Sp
+The following options are useful when \s-1GCC\s0 is generated with the
+capability for more than one debugging format.
+.IP "\fB\-ggdb\fR" 4
+.IX Item "-ggdb"
+Produce debugging information for use by \s-1GDB\s0.  This means to use the
+most expressive format available (\s-1DWARF\s0 2, stabs, or the native format
+if neither of those are supported), including \s-1GDB\s0 extensions if at all
+possible.
+.IP "\fB\-gstabs\fR" 4
+.IX Item "-gstabs"
+Produce debugging information in stabs format (if that is supported),
+without \s-1GDB\s0 extensions.  This is the format used by \s-1DBX\s0 on most \s-1BSD\s0
+systems.  On \s-1MIPS\s0, Alpha and System V Release 4 systems this option
+produces stabs debugging output which is not understood by \s-1DBX\s0 or \s-1SDB\s0.
+On System V Release 4 systems this option requires the \s-1GNU\s0 assembler.
+.IP "\fB\-feliminate\-unused\-debug\-symbols\fR" 4
+.IX Item "-feliminate-unused-debug-symbols"
+Produce debugging information in stabs format (if that is supported),
+for only symbols that are actually used.
+.IP "\fB\-femit\-class\-debug\-always\fR" 4
+.IX Item "-femit-class-debug-always"
+Instead of emitting debugging information for a \*(C+ class in only one
+object file, emit it in all object files using the class.  This option
+should be used only with debuggers that are unable to handle the way \s-1GCC\s0
+normally emits debugging information for classes because using this
+option will increase the size of debugging information by as much as a
+factor of two.
+.IP "\fB\-gstabs+\fR" 4
+.IX Item "-gstabs+"
+Produce debugging information in stabs format (if that is supported),
+using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0).  The
+use of these extensions is likely to make other debuggers crash or
+refuse to read the program.
+.IP "\fB\-gcoff\fR" 4
+.IX Item "-gcoff"
+Produce debugging information in \s-1COFF\s0 format (if that is supported).
+This is the format used by \s-1SDB\s0 on most System V systems prior to
+System V Release 4.
+.IP "\fB\-gxcoff\fR" 4
+.IX Item "-gxcoff"
+Produce debugging information in \s-1XCOFF\s0 format (if that is supported).
+This is the format used by the \s-1DBX\s0 debugger on \s-1IBM\s0 \s-1RS/6000\s0 systems.
+.IP "\fB\-gxcoff+\fR" 4
+.IX Item "-gxcoff+"
+Produce debugging information in \s-1XCOFF\s0 format (if that is supported),
+using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0).  The
+use of these extensions is likely to make other debuggers crash or
+refuse to read the program, and may cause assemblers other than the \s-1GNU\s0
+assembler (\s-1GAS\s0) to fail with an error.
+.IP "\fB\-gdwarf\-\fR\fIversion\fR" 4
+.IX Item "-gdwarf-version"
+Produce debugging information in \s-1DWARF\s0 format (if that is
+supported).  This is the format used by \s-1DBX\s0 on \s-1IRIX\s0 6.  The value
+of \fIversion\fR may be either 2, 3 or 4; the default version is 2.
+.Sp
+Note that with \s-1DWARF\s0 version 2 some ports require, and will always
+use, some non-conflicting \s-1DWARF\s0 3 extensions in the unwind tables.
+.Sp
+Version 4 may require \s-1GDB\s0 7.0 and \fB\-fvar\-tracking\-assignments\fR
+for maximum benefit.
+.IP "\fB\-gstrict\-dwarf\fR" 4
+.IX Item "-gstrict-dwarf"
+Disallow using extensions of later \s-1DWARF\s0 standard version than selected
+with \fB\-gdwarf\-\fR\fIversion\fR.  On most targets using non-conflicting
+\&\s-1DWARF\s0 extensions from later standard versions is allowed.
+.IP "\fB\-gno\-strict\-dwarf\fR" 4
+.IX Item "-gno-strict-dwarf"
+Allow using extensions of later \s-1DWARF\s0 standard version than selected with
+\&\fB\-gdwarf\-\fR\fIversion\fR.
+.IP "\fB\-gvms\fR" 4
+.IX Item "-gvms"
+Produce debugging information in \s-1VMS\s0 debug format (if that is
+supported).  This is the format used by \s-1DEBUG\s0 on \s-1VMS\s0 systems.
+.IP "\fB\-g\fR\fIlevel\fR" 4
+.IX Item "-glevel"
+.PD 0
+.IP "\fB\-ggdb\fR\fIlevel\fR" 4
+.IX Item "-ggdblevel"
+.IP "\fB\-gstabs\fR\fIlevel\fR" 4
+.IX Item "-gstabslevel"
+.IP "\fB\-gcoff\fR\fIlevel\fR" 4
+.IX Item "-gcofflevel"
+.IP "\fB\-gxcoff\fR\fIlevel\fR" 4
+.IX Item "-gxcofflevel"
+.IP "\fB\-gvms\fR\fIlevel\fR" 4
+.IX Item "-gvmslevel"
+.PD
+Request debugging information and also use \fIlevel\fR to specify how
+much information.  The default level is 2.
+.Sp
+Level 0 produces no debug information at all.  Thus, \fB\-g0\fR negates
+\&\fB\-g\fR.
+.Sp
+Level 1 produces minimal information, enough for making backtraces in
+parts of the program that you don't plan to debug.  This includes
+descriptions of functions and external variables, but no information
+about local variables and no line numbers.
+.Sp
+Level 3 includes extra information, such as all the macro definitions
+present in the program.  Some debuggers support macro expansion when
+you use \fB\-g3\fR.
+.Sp
+\&\fB\-gdwarf\-2\fR does not accept a concatenated debug level, because
+\&\s-1GCC\s0 used to support an option \fB\-gdwarf\fR that meant to generate
+debug information in version 1 of the \s-1DWARF\s0 format (which is very
+different from version 2), and it would have been too confusing.  That
+debug format is long obsolete, but the option cannot be changed now.
+Instead use an additional \fB\-g\fR\fIlevel\fR option to change the
+debug level for \s-1DWARF\s0.
+.IP "\fB\-gtoggle\fR" 4
+.IX Item "-gtoggle"
+Turn off generation of debug info, if leaving out this option would have
+generated it, or turn it on at level 2 otherwise.  The position of this
+argument in the command line does not matter, it takes effect after all
+other options are processed, and it does so only once, no matter how
+many times it is given.  This is mainly intended to be used with
+\&\fB\-fcompare\-debug\fR.
+.IP "\fB\-fdump\-final\-insns\fR[\fB=\fR\fIfile\fR]" 4
+.IX Item "-fdump-final-insns[=file]"
+Dump the final internal representation (\s-1RTL\s0) to \fIfile\fR.  If the
+optional argument is omitted (or if \fIfile\fR is \f(CW\*(C`.\*(C'\fR), the name
+of the dump file will be determined by appending \f(CW\*(C`.gkd\*(C'\fR to the
+compilation output file name.
+.IP "\fB\-fcompare\-debug\fR[\fB=\fR\fIopts\fR]" 4
+.IX Item "-fcompare-debug[=opts]"
+If no error occurs during compilation, run the compiler a second time,
+adding \fIopts\fR and \fB\-fcompare\-debug\-second\fR to the arguments
+passed to the second compilation.  Dump the final internal
+representation in both compilations, and print an error if they differ.
+.Sp
+If the equal sign is omitted, the default \fB\-gtoggle\fR is used.
+.Sp
+The environment variable \fB\s-1GCC_COMPARE_DEBUG\s0\fR, if defined, non-empty
+and nonzero, implicitly enables \fB\-fcompare\-debug\fR.  If
+\&\fB\s-1GCC_COMPARE_DEBUG\s0\fR is defined to a string starting with a dash,
+then it is used for \fIopts\fR, otherwise the default \fB\-gtoggle\fR
+is used.
+.Sp
+\&\fB\-fcompare\-debug=\fR, with the equal sign but without \fIopts\fR,
+is equivalent to \fB\-fno\-compare\-debug\fR, which disables the dumping
+of the final representation and the second compilation, preventing even
+\&\fB\s-1GCC_COMPARE_DEBUG\s0\fR from taking effect.
+.Sp
+To verify full coverage during \fB\-fcompare\-debug\fR testing, set
+\&\fB\s-1GCC_COMPARE_DEBUG\s0\fR to say \fB\-fcompare\-debug\-not\-overridden\fR,
+which \s-1GCC\s0 will reject as an invalid option in any actual compilation
+(rather than preprocessing, assembly or linking).  To get just a
+warning, setting \fB\s-1GCC_COMPARE_DEBUG\s0\fR to \fB\-w%n\-fcompare\-debug
+not overridden\fR will do.
+.IP "\fB\-fcompare\-debug\-second\fR" 4
+.IX Item "-fcompare-debug-second"
+This option is implicitly passed to the compiler for the second
+compilation requested by \fB\-fcompare\-debug\fR, along with options to
+silence warnings, and omitting other options that would cause
+side-effect compiler outputs to files or to the standard output.  Dump
+files and preserved temporary files are renamed so as to contain the
+\&\f(CW\*(C`.gk\*(C'\fR additional extension during the second compilation, to avoid
+overwriting those generated by the first.
+.Sp
+When this option is passed to the compiler driver, it causes the
+\&\fIfirst\fR compilation to be skipped, which makes it useful for little
+other than debugging the compiler proper.
+.IP "\fB\-feliminate\-dwarf2\-dups\fR" 4
+.IX Item "-feliminate-dwarf2-dups"
+Compress \s-1DWARF2\s0 debugging information by eliminating duplicated
+information about each symbol.  This option only makes sense when
+generating \s-1DWARF2\s0 debugging information with \fB\-gdwarf\-2\fR.
+.IP "\fB\-femit\-struct\-debug\-baseonly\fR" 4
+.IX Item "-femit-struct-debug-baseonly"
+Emit debug information for struct-like types
+only when the base name of the compilation source file
+matches the base name of file in which the struct was defined.
+.Sp
+This option substantially reduces the size of debugging information,
+but at significant potential loss in type information to the debugger.
+See \fB\-femit\-struct\-debug\-reduced\fR for a less aggressive option.
+See \fB\-femit\-struct\-debug\-detailed\fR for more detailed control.
+.Sp
+This option works only with \s-1DWARF\s0 2.
+.IP "\fB\-femit\-struct\-debug\-reduced\fR" 4
+.IX Item "-femit-struct-debug-reduced"
+Emit debug information for struct-like types
+only when the base name of the compilation source file
+matches the base name of file in which the type was defined,
+unless the struct is a template or defined in a system header.
+.Sp
+This option significantly reduces the size of debugging information,
+with some potential loss in type information to the debugger.
+See \fB\-femit\-struct\-debug\-baseonly\fR for a more aggressive option.
+See \fB\-femit\-struct\-debug\-detailed\fR for more detailed control.
+.Sp
+This option works only with \s-1DWARF\s0 2.
+.IP "\fB\-femit\-struct\-debug\-detailed\fR[\fB=\fR\fIspec-list\fR]" 4
+.IX Item "-femit-struct-debug-detailed[=spec-list]"
+Specify the struct-like types
+for which the compiler will generate debug information.
+The intent is to reduce duplicate struct debug information
+between different object files within the same program.
+.Sp
+This option is a detailed version of
+\&\fB\-femit\-struct\-debug\-reduced\fR and \fB\-femit\-struct\-debug\-baseonly\fR,
+which will serve for most needs.
+.Sp
+A specification has the syntax[\fBdir:\fR|\fBind:\fR][\fBord:\fR|\fBgen:\fR](\fBany\fR|\fBsys\fR|\fBbase\fR|\fBnone\fR)
+.Sp
+The optional first word limits the specification to
+structs that are used directly (\fBdir:\fR) or used indirectly (\fBind:\fR).
+A struct type is used directly when it is the type of a variable, member.
+Indirect uses arise through pointers to structs.
+That is, when use of an incomplete struct would be legal, the use is indirect.
+An example is
+\&\fBstruct one direct; struct two * indirect;\fR.
+.Sp
+The optional second word limits the specification to
+ordinary structs (\fBord:\fR) or generic structs (\fBgen:\fR).
+Generic structs are a bit complicated to explain.
+For \*(C+, these are non-explicit specializations of template classes,
+or non-template classes within the above.
+Other programming languages have generics,
+but \fB\-femit\-struct\-debug\-detailed\fR does not yet implement them.
+.Sp
+The third word specifies the source files for those
+structs for which the compiler will emit debug information.
+The values \fBnone\fR and \fBany\fR have the normal meaning.
+The value \fBbase\fR means that
+the base of name of the file in which the type declaration appears
+must match the base of the name of the main compilation file.
+In practice, this means that
+types declared in \fIfoo.c\fR and \fIfoo.h\fR will have debug information,
+but types declared in other header will not.
+The value \fBsys\fR means those types satisfying \fBbase\fR
+or declared in system or compiler headers.
+.Sp
+You may need to experiment to determine the best settings for your application.
+.Sp
+The default is \fB\-femit\-struct\-debug\-detailed=all\fR.
+.Sp
+This option works only with \s-1DWARF\s0 2.
+.IP "\fB\-fenable\-icf\-debug\fR" 4
+.IX Item "-fenable-icf-debug"
+Generate additional debug information to support identical code folding (\s-1ICF\s0).
+This option only works with \s-1DWARF\s0 version 2 or higher.
+.IP "\fB\-fno\-merge\-debug\-strings\fR" 4
+.IX Item "-fno-merge-debug-strings"
+Direct the linker to not merge together strings in the debugging
+information which are identical in different object files.  Merging is
+not supported by all assemblers or linkers.  Merging decreases the size
+of the debug information in the output file at the cost of increasing
+link processing time.  Merging is enabled by default.
+.IP "\fB\-fdebug\-prefix\-map=\fR\fIold\fR\fB=\fR\fInew\fR" 4
+.IX Item "-fdebug-prefix-map=old=new"
+When compiling files in directory \fI\fIold\fI\fR, record debugging
+information describing them as in \fI\fInew\fI\fR instead.
+.IP "\fB\-fno\-dwarf2\-cfi\-asm\fR" 4
+.IX Item "-fno-dwarf2-cfi-asm"
+Emit \s-1DWARF\s0 2 unwind info as compiler generated \f(CW\*(C`.eh_frame\*(C'\fR section
+instead of using \s-1GAS\s0 \f(CW\*(C`.cfi_*\*(C'\fR directives.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+Generate extra code to write profile information suitable for the
+analysis program \fBprof\fR.  You must use this option when compiling
+the source files you want data about, and you must also use it when
+linking.
+.IP "\fB\-pg\fR" 4
+.IX Item "-pg"
+Generate extra code to write profile information suitable for the
+analysis program \fBgprof\fR.  You must use this option when compiling
+the source files you want data about, and you must also use it when
+linking.
+.IP "\fB\-Q\fR" 4
+.IX Item "-Q"
+Makes the compiler print out each function name as it is compiled, and
+print some statistics about each pass when it finishes.
+.IP "\fB\-ftime\-report\fR" 4
+.IX Item "-ftime-report"
+Makes the compiler print some statistics about the time consumed by each
+pass when it finishes.
+.IP "\fB\-fmem\-report\fR" 4
+.IX Item "-fmem-report"
+Makes the compiler print some statistics about permanent memory
+allocation when it finishes.
+.IP "\fB\-fpre\-ipa\-mem\-report\fR" 4
+.IX Item "-fpre-ipa-mem-report"
+.PD 0
+.IP "\fB\-fpost\-ipa\-mem\-report\fR" 4
+.IX Item "-fpost-ipa-mem-report"
+.PD
+Makes the compiler print some statistics about permanent memory
+allocation before or after interprocedural optimization.
+.IP "\fB\-fstack\-usage\fR" 4
+.IX Item "-fstack-usage"
+Makes the compiler output stack usage information for the program, on a
+per-function basis.  The filename for the dump is made by appending
+\&\fI.su\fR to the \fIauxname\fR.  \fIauxname\fR is generated from the name of
+the output file, if explicitly specified and it is not an executable,
+otherwise it is the basename of the source file.  An entry is made up
+of three fields:
+.RS 4
+.IP "\(bu" 4
+The name of the function.
+.IP "\(bu" 4
+A number of bytes.
+.IP "\(bu" 4
+One or more qualifiers: \f(CW\*(C`static\*(C'\fR, \f(CW\*(C`dynamic\*(C'\fR, \f(CW\*(C`bounded\*(C'\fR.
+.RE
+.RS 4
+.Sp
+The qualifier \f(CW\*(C`static\*(C'\fR means that the function manipulates the stack
+statically: a fixed number of bytes are allocated for the frame on function
+entry and released on function exit; no stack adjustments are otherwise made
+in the function.  The second field is this fixed number of bytes.
+.Sp
+The qualifier \f(CW\*(C`dynamic\*(C'\fR means that the function manipulates the stack
+dynamically: in addition to the static allocation described above, stack
+adjustments are made in the body of the function, for example to push/pop
+arguments around function calls.  If the qualifier \f(CW\*(C`bounded\*(C'\fR is also
+present, the amount of these adjustments is bounded at compile-time and
+the second field is an upper bound of the total amount of stack used by
+the function.  If it is not present, the amount of these adjustments is
+not bounded at compile-time and the second field only represents the
+bounded part.
+.RE
+.IP "\fB\-fprofile\-arcs\fR" 4
+.IX Item "-fprofile-arcs"
+Add code so that program flow \fIarcs\fR are instrumented.  During
+execution the program records how many times each branch and call is
+executed and how many times it is taken or returns.  When the compiled
+program exits it saves this data to a file called
+\&\fI\fIauxname\fI.gcda\fR for each source file.  The data may be used for
+profile-directed optimizations (\fB\-fbranch\-probabilities\fR), or for
+test coverage analysis (\fB\-ftest\-coverage\fR).  Each object file's
+\&\fIauxname\fR is generated from the name of the output file, if
+explicitly specified and it is not the final executable, otherwise it is
+the basename of the source file.  In both cases any suffix is removed
+(e.g. \fIfoo.gcda\fR for input file \fIdir/foo.c\fR, or
+\&\fIdir/foo.gcda\fR for output file specified as \fB\-o dir/foo.o\fR).
+.IP "\fB\-\-coverage\fR" 4
+.IX Item "--coverage"
+This option is used to compile and link code instrumented for coverage
+analysis.  The option is a synonym for \fB\-fprofile\-arcs\fR
+\&\fB\-ftest\-coverage\fR (when compiling) and \fB\-lgcov\fR (when
+linking).  See the documentation for those options for more details.
+.RS 4
+.IP "\(bu" 4
+Compile the source files with \fB\-fprofile\-arcs\fR plus optimization
+and code generation options.  For test coverage analysis, use the
+additional \fB\-ftest\-coverage\fR option.  You do not need to profile
+every source file in a program.
+.IP "\(bu" 4
+Link your object files with \fB\-lgcov\fR or \fB\-fprofile\-arcs\fR
+(the latter implies the former).
+.IP "\(bu" 4
+Run the program on a representative workload to generate the arc profile
+information.  This may be repeated any number of times.  You can run
+concurrent instances of your program, and provided that the file system
+supports locking, the data files will be correctly updated.  Also
+\&\f(CW\*(C`fork\*(C'\fR calls are detected and correctly handled (double counting
+will not happen).
+.IP "\(bu" 4
+For profile-directed optimizations, compile the source files again with
+the same optimization and code generation options plus
+\&\fB\-fbranch\-probabilities\fR.
+.IP "\(bu" 4
+For test coverage analysis, use \fBgcov\fR to produce human readable
+information from the \fI.gcno\fR and \fI.gcda\fR files.  Refer to the
+\&\fBgcov\fR documentation for further information.
+.RE
+.RS 4
+.Sp
+With \fB\-fprofile\-arcs\fR, for each function of your program \s-1GCC\s0
+creates a program flow graph, then finds a spanning tree for the graph.
+Only arcs that are not on the spanning tree have to be instrumented: the
+compiler adds code to count the number of times that these arcs are
+executed.  When an arc is the only exit or only entrance to a block, the
+instrumentation code can be added to the block; otherwise, a new basic
+block must be created to hold the instrumentation code.
+.RE
+.IP "\fB\-ftest\-coverage\fR" 4
+.IX Item "-ftest-coverage"
+Produce a notes file that the \fBgcov\fR code-coverage utility can use to
+show program coverage.  Each source file's note file is called
+\&\fI\fIauxname\fI.gcno\fR.  Refer to the \fB\-fprofile\-arcs\fR option
+above for a description of \fIauxname\fR and instructions on how to
+generate test coverage data.  Coverage data will match the source files
+more closely, if you do not optimize.
+.IP "\fB\-fdbg\-cnt\-list\fR" 4
+.IX Item "-fdbg-cnt-list"
+Print the name and the counter upper bound for all debug counters.
+.IP "\fB\-fdbg\-cnt=\fR\fIcounter-value-list\fR" 4
+.IX Item "-fdbg-cnt=counter-value-list"
+Set the internal debug counter upper bound.  \fIcounter-value-list\fR
+is a comma-separated list of \fIname\fR:\fIvalue\fR pairs
+which sets the upper bound of each debug counter \fIname\fR to \fIvalue\fR.
+All debug counters have the initial upper bound of \fI\s-1UINT_MAX\s0\fR,
+thus \fIdbg_cnt()\fR returns true always unless the upper bound is set by this option.
+e.g. With \-fdbg\-cnt=dce:10,tail_call:0
+dbg_cnt(dce) will return true only for first 10 invocations
+and dbg_cnt(tail_call) will return false always.
+.IP "\fB\-d\fR\fIletters\fR" 4
+.IX Item "-dletters"
+.PD 0
+.IP "\fB\-fdump\-rtl\-\fR\fIpass\fR" 4
+.IX Item "-fdump-rtl-pass"
+.PD
+Says to make debugging dumps during compilation at times specified by
+\&\fIletters\fR.  This is used for debugging the RTL-based passes of the
+compiler.  The file names for most of the dumps are made by appending
+a pass number and a word to the \fIdumpname\fR, and the files are
+created in the directory of the output file.  Note that the pass
+number is computed statically as passes get registered into the pass
+manager.  Thus the numbering is not related to the dynamic order of
+execution of passes.  In particular, a pass installed by a plugin
+could have a number over 200 even if it executed quite early.
+\&\fIdumpname\fR is generated from the name of the output file, if
+explicitly specified and it is not an executable, otherwise it is the
+basename of the source file. These switches may have different effects
+when \fB\-E\fR is used for preprocessing.
+.Sp
+Debug dumps can be enabled with a \fB\-fdump\-rtl\fR switch or some
+\&\fB\-d\fR option \fIletters\fR.  Here are the possible
+letters for use in \fIpass\fR and \fIletters\fR, and their meanings:
+.RS 4
+.IP "\fB\-fdump\-rtl\-alignments\fR" 4
+.IX Item "-fdump-rtl-alignments"
+Dump after branch alignments have been computed.
+.IP "\fB\-fdump\-rtl\-asmcons\fR" 4
+.IX Item "-fdump-rtl-asmcons"
+Dump after fixing rtl statements that have unsatisfied in/out constraints.
+.IP "\fB\-fdump\-rtl\-auto_inc_dec\fR" 4
+.IX Item "-fdump-rtl-auto_inc_dec"
+Dump after auto-inc-dec discovery.  This pass is only run on
+architectures that have auto inc or auto dec instructions.
+.IP "\fB\-fdump\-rtl\-barriers\fR" 4
+.IX Item "-fdump-rtl-barriers"
+Dump after cleaning up the barrier instructions.
+.IP "\fB\-fdump\-rtl\-bbpart\fR" 4
+.IX Item "-fdump-rtl-bbpart"
+Dump after partitioning hot and cold basic blocks.
+.IP "\fB\-fdump\-rtl\-bbro\fR" 4
+.IX Item "-fdump-rtl-bbro"
+Dump after block reordering.
+.IP "\fB\-fdump\-rtl\-btl1\fR" 4
+.IX Item "-fdump-rtl-btl1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-btl2\fR" 4
+.IX Item "-fdump-rtl-btl2"
+.PD
+\&\fB\-fdump\-rtl\-btl1\fR and \fB\-fdump\-rtl\-btl2\fR enable dumping
+after the two branch
+target load optimization passes.
+.IP "\fB\-fdump\-rtl\-bypass\fR" 4
+.IX Item "-fdump-rtl-bypass"
+Dump after jump bypassing and control flow optimizations.
+.IP "\fB\-fdump\-rtl\-combine\fR" 4
+.IX Item "-fdump-rtl-combine"
+Dump after the \s-1RTL\s0 instruction combination pass.
+.IP "\fB\-fdump\-rtl\-compgotos\fR" 4
+.IX Item "-fdump-rtl-compgotos"
+Dump after duplicating the computed gotos.
+.IP "\fB\-fdump\-rtl\-ce1\fR" 4
+.IX Item "-fdump-rtl-ce1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-ce2\fR" 4
+.IX Item "-fdump-rtl-ce2"
+.IP "\fB\-fdump\-rtl\-ce3\fR" 4
+.IX Item "-fdump-rtl-ce3"
+.PD
+\&\fB\-fdump\-rtl\-ce1\fR, \fB\-fdump\-rtl\-ce2\fR, and
+\&\fB\-fdump\-rtl\-ce3\fR enable dumping after the three
+if conversion passes.
+.IP "\fB\-fdump\-rtl\-cprop_hardreg\fR" 4
+.IX Item "-fdump-rtl-cprop_hardreg"
+Dump after hard register copy propagation.
+.IP "\fB\-fdump\-rtl\-csa\fR" 4
+.IX Item "-fdump-rtl-csa"
+Dump after combining stack adjustments.
+.IP "\fB\-fdump\-rtl\-cse1\fR" 4
+.IX Item "-fdump-rtl-cse1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-cse2\fR" 4
+.IX Item "-fdump-rtl-cse2"
+.PD
+\&\fB\-fdump\-rtl\-cse1\fR and \fB\-fdump\-rtl\-cse2\fR enable dumping after
+the two common sub-expression elimination passes.
+.IP "\fB\-fdump\-rtl\-dce\fR" 4
+.IX Item "-fdump-rtl-dce"
+Dump after the standalone dead code elimination passes.
+.IP "\fB\-fdump\-rtl\-dbr\fR" 4
+.IX Item "-fdump-rtl-dbr"
+Dump after delayed branch scheduling.
+.IP "\fB\-fdump\-rtl\-dce1\fR" 4
+.IX Item "-fdump-rtl-dce1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-dce2\fR" 4
+.IX Item "-fdump-rtl-dce2"
+.PD
+\&\fB\-fdump\-rtl\-dce1\fR and \fB\-fdump\-rtl\-dce2\fR enable dumping after
+the two dead store elimination passes.
+.IP "\fB\-fdump\-rtl\-eh\fR" 4
+.IX Item "-fdump-rtl-eh"
+Dump after finalization of \s-1EH\s0 handling code.
+.IP "\fB\-fdump\-rtl\-eh_ranges\fR" 4
+.IX Item "-fdump-rtl-eh_ranges"
+Dump after conversion of \s-1EH\s0 handling range regions.
+.IP "\fB\-fdump\-rtl\-expand\fR" 4
+.IX Item "-fdump-rtl-expand"
+Dump after \s-1RTL\s0 generation.
+.IP "\fB\-fdump\-rtl\-fwprop1\fR" 4
+.IX Item "-fdump-rtl-fwprop1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-fwprop2\fR" 4
+.IX Item "-fdump-rtl-fwprop2"
+.PD
+\&\fB\-fdump\-rtl\-fwprop1\fR and \fB\-fdump\-rtl\-fwprop2\fR enable
+dumping after the two forward propagation passes.
+.IP "\fB\-fdump\-rtl\-gcse1\fR" 4
+.IX Item "-fdump-rtl-gcse1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-gcse2\fR" 4
+.IX Item "-fdump-rtl-gcse2"
+.PD
+\&\fB\-fdump\-rtl\-gcse1\fR and \fB\-fdump\-rtl\-gcse2\fR enable dumping
+after global common subexpression elimination.
+.IP "\fB\-fdump\-rtl\-init\-regs\fR" 4
+.IX Item "-fdump-rtl-init-regs"
+Dump after the initialization of the registers.
+.IP "\fB\-fdump\-rtl\-initvals\fR" 4
+.IX Item "-fdump-rtl-initvals"
+Dump after the computation of the initial value sets.
+.IP "\fB\-fdump\-rtl\-into_cfglayout\fR" 4
+.IX Item "-fdump-rtl-into_cfglayout"
+Dump after converting to cfglayout mode.
+.IP "\fB\-fdump\-rtl\-ira\fR" 4
+.IX Item "-fdump-rtl-ira"
+Dump after iterated register allocation.
+.IP "\fB\-fdump\-rtl\-jump\fR" 4
+.IX Item "-fdump-rtl-jump"
+Dump after the second jump optimization.
+.IP "\fB\-fdump\-rtl\-loop2\fR" 4
+.IX Item "-fdump-rtl-loop2"
+\&\fB\-fdump\-rtl\-loop2\fR enables dumping after the rtl
+loop optimization passes.
+.IP "\fB\-fdump\-rtl\-mach\fR" 4
+.IX Item "-fdump-rtl-mach"
+Dump after performing the machine dependent reorganization pass, if that
+pass exists.
+.IP "\fB\-fdump\-rtl\-mode_sw\fR" 4
+.IX Item "-fdump-rtl-mode_sw"
+Dump after removing redundant mode switches.
+.IP "\fB\-fdump\-rtl\-rnreg\fR" 4
+.IX Item "-fdump-rtl-rnreg"
+Dump after register renumbering.
+.IP "\fB\-fdump\-rtl\-outof_cfglayout\fR" 4
+.IX Item "-fdump-rtl-outof_cfglayout"
+Dump after converting from cfglayout mode.
+.IP "\fB\-fdump\-rtl\-peephole2\fR" 4
+.IX Item "-fdump-rtl-peephole2"
+Dump after the peephole pass.
+.IP "\fB\-fdump\-rtl\-postreload\fR" 4
+.IX Item "-fdump-rtl-postreload"
+Dump after post-reload optimizations.
+.IP "\fB\-fdump\-rtl\-pro_and_epilogue\fR" 4
+.IX Item "-fdump-rtl-pro_and_epilogue"
+Dump after generating the function pro and epilogues.
+.IP "\fB\-fdump\-rtl\-regmove\fR" 4
+.IX Item "-fdump-rtl-regmove"
+Dump after the register move pass.
+.IP "\fB\-fdump\-rtl\-sched1\fR" 4
+.IX Item "-fdump-rtl-sched1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-sched2\fR" 4
+.IX Item "-fdump-rtl-sched2"
+.PD
+\&\fB\-fdump\-rtl\-sched1\fR and \fB\-fdump\-rtl\-sched2\fR enable dumping
+after the basic block scheduling passes.
+.IP "\fB\-fdump\-rtl\-see\fR" 4
+.IX Item "-fdump-rtl-see"
+Dump after sign extension elimination.
+.IP "\fB\-fdump\-rtl\-seqabstr\fR" 4
+.IX Item "-fdump-rtl-seqabstr"
+Dump after common sequence discovery.
+.IP "\fB\-fdump\-rtl\-shorten\fR" 4
+.IX Item "-fdump-rtl-shorten"
+Dump after shortening branches.
+.IP "\fB\-fdump\-rtl\-sibling\fR" 4
+.IX Item "-fdump-rtl-sibling"
+Dump after sibling call optimizations.
+.IP "\fB\-fdump\-rtl\-split1\fR" 4
+.IX Item "-fdump-rtl-split1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-split2\fR" 4
+.IX Item "-fdump-rtl-split2"
+.IP "\fB\-fdump\-rtl\-split3\fR" 4
+.IX Item "-fdump-rtl-split3"
+.IP "\fB\-fdump\-rtl\-split4\fR" 4
+.IX Item "-fdump-rtl-split4"
+.IP "\fB\-fdump\-rtl\-split5\fR" 4
+.IX Item "-fdump-rtl-split5"
+.PD
+\&\fB\-fdump\-rtl\-split1\fR, \fB\-fdump\-rtl\-split2\fR,
+\&\fB\-fdump\-rtl\-split3\fR, \fB\-fdump\-rtl\-split4\fR and
+\&\fB\-fdump\-rtl\-split5\fR enable dumping after five rounds of
+instruction splitting.
+.IP "\fB\-fdump\-rtl\-sms\fR" 4
+.IX Item "-fdump-rtl-sms"
+Dump after modulo scheduling.  This pass is only run on some
+architectures.
+.IP "\fB\-fdump\-rtl\-stack\fR" 4
+.IX Item "-fdump-rtl-stack"
+Dump after conversion from \s-1GCC\s0's \*(L"flat register file\*(R" registers to the
+x87's stack-like registers.  This pass is only run on x86 variants.
+.IP "\fB\-fdump\-rtl\-subreg1\fR" 4
+.IX Item "-fdump-rtl-subreg1"
+.PD 0
+.IP "\fB\-fdump\-rtl\-subreg2\fR" 4
+.IX Item "-fdump-rtl-subreg2"
+.PD
+\&\fB\-fdump\-rtl\-subreg1\fR and \fB\-fdump\-rtl\-subreg2\fR enable dumping after
+the two subreg expansion passes.
+.IP "\fB\-fdump\-rtl\-unshare\fR" 4
+.IX Item "-fdump-rtl-unshare"
+Dump after all rtl has been unshared.
+.IP "\fB\-fdump\-rtl\-vartrack\fR" 4
+.IX Item "-fdump-rtl-vartrack"
+Dump after variable tracking.
+.IP "\fB\-fdump\-rtl\-vregs\fR" 4
+.IX Item "-fdump-rtl-vregs"
+Dump after converting virtual registers to hard registers.
+.IP "\fB\-fdump\-rtl\-web\fR" 4
+.IX Item "-fdump-rtl-web"
+Dump after live range splitting.
+.IP "\fB\-fdump\-rtl\-regclass\fR" 4
+.IX Item "-fdump-rtl-regclass"
+.PD 0
+.IP "\fB\-fdump\-rtl\-subregs_of_mode_init\fR" 4
+.IX Item "-fdump-rtl-subregs_of_mode_init"
+.IP "\fB\-fdump\-rtl\-subregs_of_mode_finish\fR" 4
+.IX Item "-fdump-rtl-subregs_of_mode_finish"
+.IP "\fB\-fdump\-rtl\-dfinit\fR" 4
+.IX Item "-fdump-rtl-dfinit"
+.IP "\fB\-fdump\-rtl\-dfinish\fR" 4
+.IX Item "-fdump-rtl-dfinish"
+.PD
+These dumps are defined but always produce empty files.
+.IP "\fB\-da\fR" 4
+.IX Item "-da"
+.PD 0
+.IP "\fB\-fdump\-rtl\-all\fR" 4
+.IX Item "-fdump-rtl-all"
+.PD
+Produce all the dumps listed above.
+.IP "\fB\-dA\fR" 4
+.IX Item "-dA"
+Annotate the assembler output with miscellaneous debugging information.
+.IP "\fB\-dD\fR" 4
+.IX Item "-dD"
+Dump all macro definitions, at the end of preprocessing, in addition to
+normal output.
+.IP "\fB\-dH\fR" 4
+.IX Item "-dH"
+Produce a core dump whenever an error occurs.
+.IP "\fB\-dp\fR" 4
+.IX Item "-dp"
+Annotate the assembler output with a comment indicating which
+pattern and alternative was used.  The length of each instruction is
+also printed.
+.IP "\fB\-dP\fR" 4
+.IX Item "-dP"
+Dump the \s-1RTL\s0 in the assembler output as a comment before each instruction.
+Also turns on \fB\-dp\fR annotation.
+.IP "\fB\-dv\fR" 4
+.IX Item "-dv"
+For each of the other indicated dump files (\fB\-fdump\-rtl\-\fR\fIpass\fR),
+dump a representation of the control flow graph suitable for viewing with \s-1VCG\s0
+to \fI\fIfile\fI.\fIpass\fI.vcg\fR.
+.IP "\fB\-dx\fR" 4
+.IX Item "-dx"
+Just generate \s-1RTL\s0 for a function instead of compiling it.  Usually used
+with \fB\-fdump\-rtl\-expand\fR.
+.RE
+.RS 4
+.RE
+.IP "\fB\-fdump\-noaddr\fR" 4
+.IX Item "-fdump-noaddr"
+When doing debugging dumps, suppress address output.  This makes it more
+feasible to use diff on debugging dumps for compiler invocations with
+different compiler binaries and/or different
+text / bss / data / heap / stack / dso start locations.
+.IP "\fB\-fdump\-unnumbered\fR" 4
+.IX Item "-fdump-unnumbered"
+When doing debugging dumps, suppress instruction numbers and address output.
+This makes it more feasible to use diff on debugging dumps for compiler
+invocations with different options, in particular with and without
+\&\fB\-g\fR.
+.IP "\fB\-fdump\-unnumbered\-links\fR" 4
+.IX Item "-fdump-unnumbered-links"
+When doing debugging dumps (see \fB\-d\fR option above), suppress
+instruction numbers for the links to the previous and next instructions
+in a sequence.
+.IP "\fB\-fdump\-translation\-unit\fR (\*(C+ only)" 4
+.IX Item "-fdump-translation-unit ( only)"
+.PD 0
+.IP "\fB\-fdump\-translation\-unit\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
+.IX Item "-fdump-translation-unit-options ( only)"
+.PD
+Dump a representation of the tree structure for the entire translation
+unit to a file.  The file name is made by appending \fI.tu\fR to the
+source file name, and the file is created in the same directory as the
+output file.  If the \fB\-\fR\fIoptions\fR form is used, \fIoptions\fR
+controls the details of the dump as described for the
+\&\fB\-fdump\-tree\fR options.
+.IP "\fB\-fdump\-class\-hierarchy\fR (\*(C+ only)" 4
+.IX Item "-fdump-class-hierarchy ( only)"
+.PD 0
+.IP "\fB\-fdump\-class\-hierarchy\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
+.IX Item "-fdump-class-hierarchy-options ( only)"
+.PD
+Dump a representation of each class's hierarchy and virtual function
+table layout to a file.  The file name is made by appending
+\&\fI.class\fR to the source file name, and the file is created in the
+same directory as the output file.  If the \fB\-\fR\fIoptions\fR form
+is used, \fIoptions\fR controls the details of the dump as described
+for the \fB\-fdump\-tree\fR options.
+.IP "\fB\-fdump\-ipa\-\fR\fIswitch\fR" 4
+.IX Item "-fdump-ipa-switch"
+Control the dumping at various stages of inter-procedural analysis
+language tree to a file.  The file name is generated by appending a
+switch specific suffix to the source file name, and the file is created
+in the same directory as the output file.  The following dumps are
+possible:
+.RS 4
+.IP "\fBall\fR" 4
+.IX Item "all"
+Enables all inter-procedural analysis dumps.
+.IP "\fBcgraph\fR" 4
+.IX Item "cgraph"
+Dumps information about call-graph optimization, unused function removal,
+and inlining decisions.
+.IP "\fBinline\fR" 4
+.IX Item "inline"
+Dump after function inlining.
+.RE
+.RS 4
+.RE
+.IP "\fB\-fdump\-statistics\-\fR\fIoption\fR" 4
+.IX Item "-fdump-statistics-option"
+Enable and control dumping of pass statistics in a separate file.  The
+file name is generated by appending a suffix ending in
+\&\fB.statistics\fR to the source file name, and the file is created in
+the same directory as the output file.  If the \fB\-\fR\fIoption\fR
+form is used, \fB\-stats\fR will cause counters to be summed over the
+whole compilation unit while \fB\-details\fR will dump every event as
+the passes generate them.  The default with no option is to sum
+counters for each function compiled.
+.IP "\fB\-fdump\-tree\-\fR\fIswitch\fR" 4
+.IX Item "-fdump-tree-switch"
+.PD 0
+.IP "\fB\-fdump\-tree\-\fR\fIswitch\fR\fB\-\fR\fIoptions\fR" 4
+.IX Item "-fdump-tree-switch-options"
+.PD
+Control the dumping at various stages of processing the intermediate
+language tree to a file.  The file name is generated by appending a
+switch specific suffix to the source file name, and the file is
+created in the same directory as the output file.  If the
+\&\fB\-\fR\fIoptions\fR form is used, \fIoptions\fR is a list of
+\&\fB\-\fR separated options that control the details of the dump.  Not
+all options are applicable to all dumps, those which are not
+meaningful will be ignored.  The following options are available
+.RS 4
+.IP "\fBaddress\fR" 4
+.IX Item "address"
+Print the address of each node.  Usually this is not meaningful as it
+changes according to the environment and source file.  Its primary use
+is for tying up a dump file with a debug environment.
+.IP "\fBasmname\fR" 4
+.IX Item "asmname"
+If \f(CW\*(C`DECL_ASSEMBLER_NAME\*(C'\fR has been set for a given decl, use that
+in the dump instead of \f(CW\*(C`DECL_NAME\*(C'\fR.  Its primary use is ease of
+use working backward from mangled names in the assembly file.
+.IP "\fBslim\fR" 4
+.IX Item "slim"
+Inhibit dumping of members of a scope or body of a function merely
+because that scope has been reached.  Only dump such items when they
+are directly reachable by some other path.  When dumping pretty-printed
+trees, this option inhibits dumping the bodies of control structures.
+.IP "\fBraw\fR" 4
+.IX Item "raw"
+Print a raw representation of the tree.  By default, trees are
+pretty-printed into a C\-like representation.
+.IP "\fBdetails\fR" 4
+.IX Item "details"
+Enable more detailed dumps (not honored by every dump option).
+.IP "\fBstats\fR" 4
+.IX Item "stats"
+Enable dumping various statistics about the pass (not honored by every dump
+option).
+.IP "\fBblocks\fR" 4
+.IX Item "blocks"
+Enable showing basic block boundaries (disabled in raw dumps).
+.IP "\fBvops\fR" 4
+.IX Item "vops"
+Enable showing virtual operands for every statement.
+.IP "\fBlineno\fR" 4
+.IX Item "lineno"
+Enable showing line numbers for statements.
+.IP "\fBuid\fR" 4
+.IX Item "uid"
+Enable showing the unique \s-1ID\s0 (\f(CW\*(C`DECL_UID\*(C'\fR) for each variable.
+.IP "\fBverbose\fR" 4
+.IX Item "verbose"
+Enable showing the tree dump for each statement.
+.IP "\fBeh\fR" 4
+.IX Item "eh"
+Enable showing the \s-1EH\s0 region number holding each statement.
+.IP "\fBall\fR" 4
+.IX Item "all"
+Turn on all options, except \fBraw\fR, \fBslim\fR, \fBverbose\fR
+and \fBlineno\fR.
+.RE
+.RS 4
+.Sp
+The following tree dumps are possible:
+.IP "\fBoriginal\fR" 4
+.IX Item "original"
+Dump before any tree based optimization, to \fI\fIfile\fI.original\fR.
+.IP "\fBoptimized\fR" 4
+.IX Item "optimized"
+Dump after all tree based optimization, to \fI\fIfile\fI.optimized\fR.
+.IP "\fBgimple\fR" 4
+.IX Item "gimple"
+Dump each function before and after the gimplification pass to a file.  The
+file name is made by appending \fI.gimple\fR to the source file name.
+.IP "\fBcfg\fR" 4
+.IX Item "cfg"
+Dump the control flow graph of each function to a file.  The file name is
+made by appending \fI.cfg\fR to the source file name.
+.IP "\fBvcg\fR" 4
+.IX Item "vcg"
+Dump the control flow graph of each function to a file in \s-1VCG\s0 format.  The
+file name is made by appending \fI.vcg\fR to the source file name.  Note
+that if the file contains more than one function, the generated file cannot
+be used directly by \s-1VCG\s0.  You will need to cut and paste each function's
+graph into its own separate file first.
+.IP "\fBch\fR" 4
+.IX Item "ch"
+Dump each function after copying loop headers.  The file name is made by
+appending \fI.ch\fR to the source file name.
+.IP "\fBssa\fR" 4
+.IX Item "ssa"
+Dump \s-1SSA\s0 related information to a file.  The file name is made by appending
+\&\fI.ssa\fR to the source file name.
+.IP "\fBalias\fR" 4
+.IX Item "alias"
+Dump aliasing information for each function.  The file name is made by
+appending \fI.alias\fR to the source file name.
+.IP "\fBccp\fR" 4
+.IX Item "ccp"
+Dump each function after \s-1CCP\s0.  The file name is made by appending
+\&\fI.ccp\fR to the source file name.
+.IP "\fBstoreccp\fR" 4
+.IX Item "storeccp"
+Dump each function after STORE-CCP.  The file name is made by appending
+\&\fI.storeccp\fR to the source file name.
+.IP "\fBpre\fR" 4
+.IX Item "pre"
+Dump trees after partial redundancy elimination.  The file name is made
+by appending \fI.pre\fR to the source file name.
+.IP "\fBfre\fR" 4
+.IX Item "fre"
+Dump trees after full redundancy elimination.  The file name is made
+by appending \fI.fre\fR to the source file name.
+.IP "\fBcopyprop\fR" 4
+.IX Item "copyprop"
+Dump trees after copy propagation.  The file name is made
+by appending \fI.copyprop\fR to the source file name.
+.IP "\fBstore_copyprop\fR" 4
+.IX Item "store_copyprop"
+Dump trees after store copy-propagation.  The file name is made
+by appending \fI.store_copyprop\fR to the source file name.
+.IP "\fBdce\fR" 4
+.IX Item "dce"
+Dump each function after dead code elimination.  The file name is made by
+appending \fI.dce\fR to the source file name.
+.IP "\fBmudflap\fR" 4
+.IX Item "mudflap"
+Dump each function after adding mudflap instrumentation.  The file name is
+made by appending \fI.mudflap\fR to the source file name.
+.IP "\fBsra\fR" 4
+.IX Item "sra"
+Dump each function after performing scalar replacement of aggregates.  The
+file name is made by appending \fI.sra\fR to the source file name.
+.IP "\fBsink\fR" 4
+.IX Item "sink"
+Dump each function after performing code sinking.  The file name is made
+by appending \fI.sink\fR to the source file name.
+.IP "\fBdom\fR" 4
+.IX Item "dom"
+Dump each function after applying dominator tree optimizations.  The file
+name is made by appending \fI.dom\fR to the source file name.
+.IP "\fBdse\fR" 4
+.IX Item "dse"
+Dump each function after applying dead store elimination.  The file
+name is made by appending \fI.dse\fR to the source file name.
+.IP "\fBphiopt\fR" 4
+.IX Item "phiopt"
+Dump each function after optimizing \s-1PHI\s0 nodes into straightline code.  The file
+name is made by appending \fI.phiopt\fR to the source file name.
+.IP "\fBforwprop\fR" 4
+.IX Item "forwprop"
+Dump each function after forward propagating single use variables.  The file
+name is made by appending \fI.forwprop\fR to the source file name.
+.IP "\fBcopyrename\fR" 4
+.IX Item "copyrename"
+Dump each function after applying the copy rename optimization.  The file
+name is made by appending \fI.copyrename\fR to the source file name.
+.IP "\fBnrv\fR" 4
+.IX Item "nrv"
+Dump each function after applying the named return value optimization on
+generic trees.  The file name is made by appending \fI.nrv\fR to the source
+file name.
+.IP "\fBvect\fR" 4
+.IX Item "vect"
+Dump each function after applying vectorization of loops.  The file name is
+made by appending \fI.vect\fR to the source file name.
+.IP "\fBslp\fR" 4
+.IX Item "slp"
+Dump each function after applying vectorization of basic blocks.  The file name
+is made by appending \fI.slp\fR to the source file name.
+.IP "\fBvrp\fR" 4
+.IX Item "vrp"
+Dump each function after Value Range Propagation (\s-1VRP\s0).  The file name
+is made by appending \fI.vrp\fR to the source file name.
+.IP "\fBall\fR" 4
+.IX Item "all"
+Enable all the available tree dumps with the flags provided in this option.
+.RE
+.RS 4
+.RE
+.IP "\fB\-ftree\-vectorizer\-verbose=\fR\fIn\fR" 4
+.IX Item "-ftree-vectorizer-verbose=n"
+This option controls the amount of debugging output the vectorizer prints.
+This information is written to standard error, unless
+\&\fB\-fdump\-tree\-all\fR or \fB\-fdump\-tree\-vect\fR is specified,
+in which case it is output to the usual dump listing file, \fI.vect\fR.
+For \fIn\fR=0 no diagnostic information is reported.
+If \fIn\fR=1 the vectorizer reports each loop that got vectorized,
+and the total number of loops that got vectorized.
+If \fIn\fR=2 the vectorizer also reports non-vectorized loops that passed
+the first analysis phase (vect_analyze_loop_form) \- i.e. countable,
+inner-most, single-bb, single\-entry/exit loops.  This is the same verbosity
+level that \fB\-fdump\-tree\-vect\-stats\fR uses.
+Higher verbosity levels mean either more information dumped for each
+reported loop, or same amount of information reported for more loops:
+if \fIn\fR=3, vectorizer cost model information is reported.
+If \fIn\fR=4, alignment related information is added to the reports.
+If \fIn\fR=5, data-references related information (e.g. memory dependences,
+memory access-patterns) is added to the reports.
+If \fIn\fR=6, the vectorizer reports also non-vectorized inner-most loops
+that did not pass the first analysis phase (i.e., may not be countable, or
+may have complicated control-flow).
+If \fIn\fR=7, the vectorizer reports also non-vectorized nested loops.
+If \fIn\fR=8, \s-1SLP\s0 related information is added to the reports.
+For \fIn\fR=9, all the information the vectorizer generates during its
+analysis and transformation is reported.  This is the same verbosity level
+that \fB\-fdump\-tree\-vect\-details\fR uses.
+.IP "\fB\-frandom\-seed=\fR\fIstring\fR" 4
+.IX Item "-frandom-seed=string"
+This option provides a seed that \s-1GCC\s0 uses when it would otherwise use
+random numbers.  It is used to generate certain symbol names
+that have to be different in every compiled file.  It is also used to
+place unique stamps in coverage data files and the object files that
+produce them.  You can use the \fB\-frandom\-seed\fR option to produce
+reproducibly identical object files.
+.Sp
+The \fIstring\fR should be different for every file you compile.
+.IP "\fB\-fsched\-verbose=\fR\fIn\fR" 4
+.IX Item "-fsched-verbose=n"
+On targets that use instruction scheduling, this option controls the
+amount of debugging output the scheduler prints.  This information is
+written to standard error, unless \fB\-fdump\-rtl\-sched1\fR or
+\&\fB\-fdump\-rtl\-sched2\fR is specified, in which case it is output
+to the usual dump listing file, \fI.sched1\fR or \fI.sched2\fR
+respectively.  However for \fIn\fR greater than nine, the output is
+always printed to standard error.
+.Sp
+For \fIn\fR greater than zero, \fB\-fsched\-verbose\fR outputs the
+same information as \fB\-fdump\-rtl\-sched1\fR and \fB\-fdump\-rtl\-sched2\fR.
+For \fIn\fR greater than one, it also output basic block probabilities,
+detailed ready list information and unit/insn info.  For \fIn\fR greater
+than two, it includes \s-1RTL\s0 at abort point, control-flow and regions info.
+And for \fIn\fR over four, \fB\-fsched\-verbose\fR also includes
+dependence info.
+.IP "\fB\-save\-temps\fR" 4
+.IX Item "-save-temps"
+.PD 0
+.IP "\fB\-save\-temps=cwd\fR" 4
+.IX Item "-save-temps=cwd"
+.PD
+Store the usual \*(L"temporary\*(R" intermediate files permanently; place them
+in the current directory and name them based on the source file.  Thus,
+compiling \fIfoo.c\fR with \fB\-c \-save\-temps\fR would produce files
+\&\fIfoo.i\fR and \fIfoo.s\fR, as well as \fIfoo.o\fR.  This creates a
+preprocessed \fIfoo.i\fR output file even though the compiler now
+normally uses an integrated preprocessor.
+.Sp
+When used in combination with the \fB\-x\fR command line option,
+\&\fB\-save\-temps\fR is sensible enough to avoid over writing an
+input source file with the same extension as an intermediate file.
+The corresponding intermediate file may be obtained by renaming the
+source file before using \fB\-save\-temps\fR.
+.Sp
+If you invoke \s-1GCC\s0 in parallel, compiling several different source
+files that share a common base name in different subdirectories or the
+same source file compiled for multiple output destinations, it is
+likely that the different parallel compilers will interfere with each
+other, and overwrite the temporary files.  For instance:
+.Sp
+.Vb 2
+\&        gcc \-save\-temps \-o outdir1/foo.o indir1/foo.c&
+\&        gcc \-save\-temps \-o outdir2/foo.o indir2/foo.c&
+.Ve
+.Sp
+may result in \fIfoo.i\fR and \fIfoo.o\fR being written to
+simultaneously by both compilers.
+.IP "\fB\-save\-temps=obj\fR" 4
+.IX Item "-save-temps=obj"
+Store the usual \*(L"temporary\*(R" intermediate files permanently.  If the
+\&\fB\-o\fR option is used, the temporary files are based on the
+object file.  If the \fB\-o\fR option is not used, the
+\&\fB\-save\-temps=obj\fR switch behaves like \fB\-save\-temps\fR.
+.Sp
+For example:
+.Sp
+.Vb 3
+\&        gcc \-save\-temps=obj \-c foo.c
+\&        gcc \-save\-temps=obj \-c bar.c \-o dir/xbar.o
+\&        gcc \-save\-temps=obj foobar.c \-o dir2/yfoobar
+.Ve
+.Sp
+would create \fIfoo.i\fR, \fIfoo.s\fR, \fIdir/xbar.i\fR,
+\&\fIdir/xbar.s\fR, \fIdir2/yfoobar.i\fR, \fIdir2/yfoobar.s\fR, and
+\&\fIdir2/yfoobar.o\fR.
+.IP "\fB\-time\fR[\fB=\fR\fIfile\fR]" 4
+.IX Item "-time[=file]"
+Report the \s-1CPU\s0 time taken by each subprocess in the compilation
+sequence.  For C source files, this is the compiler proper and assembler
+(plus the linker if linking is done).
+.Sp
+Without the specification of an output file, the output looks like this:
+.Sp
+.Vb 2
+\&        # cc1 0.12 0.01
+\&        # as 0.00 0.01
+.Ve
+.Sp
+The first number on each line is the \*(L"user time\*(R", that is time spent
+executing the program itself.  The second number is \*(L"system time\*(R",
+time spent executing operating system routines on behalf of the program.
+Both numbers are in seconds.
+.Sp
+With the specification of an output file, the output is appended to the
+named file, and it looks like this:
+.Sp
+.Vb 2
+\&        0.12 0.01 cc1 <options>
+\&        0.00 0.01 as <options>
+.Ve
+.Sp
+The \*(L"user time\*(R" and the \*(L"system time\*(R" are moved before the program
+name, and the options passed to the program are displayed, so that one
+can later tell what file was being compiled, and with which options.
+.IP "\fB\-fvar\-tracking\fR" 4
+.IX Item "-fvar-tracking"
+Run variable tracking pass.  It computes where variables are stored at each
+position in code.  Better debugging information is then generated
+(if the debugging information format supports this information).
+.Sp
+It is enabled by default when compiling with optimization (\fB\-Os\fR,
+\&\fB\-O\fR, \fB\-O2\fR, ...), debugging information (\fB\-g\fR) and
+the debug info format supports it.
+.IP "\fB\-fvar\-tracking\-assignments\fR" 4
+.IX Item "-fvar-tracking-assignments"
+Annotate assignments to user variables early in the compilation and
+attempt to carry the annotations over throughout the compilation all the
+way to the end, in an attempt to improve debug information while
+optimizing.  Use of \fB\-gdwarf\-4\fR is recommended along with it.
+.Sp
+It can be enabled even if var-tracking is disabled, in which case
+annotations will be created and maintained, but discarded at the end.
+.IP "\fB\-fvar\-tracking\-assignments\-toggle\fR" 4
+.IX Item "-fvar-tracking-assignments-toggle"
+Toggle \fB\-fvar\-tracking\-assignments\fR, in the same way that
+\&\fB\-gtoggle\fR toggles \fB\-g\fR.
+.IP "\fB\-print\-file\-name=\fR\fIlibrary\fR" 4
+.IX Item "-print-file-name=library"
+Print the full absolute name of the library file \fIlibrary\fR that
+would be used when linking\-\-\-and don't do anything else.  With this
+option, \s-1GCC\s0 does not compile or link anything; it just prints the
+file name.
+.IP "\fB\-print\-multi\-directory\fR" 4
+.IX Item "-print-multi-directory"
+Print the directory name corresponding to the multilib selected by any
+other switches present in the command line.  This directory is supposed
+to exist in \fB\s-1GCC_EXEC_PREFIX\s0\fR.
+.IP "\fB\-print\-multi\-lib\fR" 4
+.IX Item "-print-multi-lib"
+Print the mapping from multilib directory names to compiler switches
+that enable them.  The directory name is separated from the switches by
+\&\fB;\fR, and each switch starts with an \fB@\fR instead of the
+\&\fB\-\fR, without spaces between multiple switches.  This is supposed to
+ease shell-processing.
+.IP "\fB\-print\-multi\-os\-directory\fR" 4
+.IX Item "-print-multi-os-directory"
+Print the path to \s-1OS\s0 libraries for the selected
+multilib, relative to some \fIlib\fR subdirectory.  If \s-1OS\s0 libraries are
+present in the \fIlib\fR subdirectory and no multilibs are used, this is
+usually just \fI.\fR, if \s-1OS\s0 libraries are present in \fIlib\fIsuffix\fI\fR
+sibling directories this prints e.g. \fI../lib64\fR, \fI../lib\fR or
+\&\fI../lib32\fR, or if \s-1OS\s0 libraries are present in \fIlib/\fIsubdir\fI\fR
+subdirectories it prints e.g. \fIamd64\fR, \fIsparcv9\fR or \fIev6\fR.
+.IP "\fB\-print\-multiarch\fR" 4
+.IX Item "-print-multiarch"
+Print the path to \s-1OS\s0 libraries for the selected multiarch,
+relative to some \fIlib\fR subdirectory.
+.IP "\fB\-print\-prog\-name=\fR\fIprogram\fR" 4
+.IX Item "-print-prog-name=program"
+Like \fB\-print\-file\-name\fR, but searches for a program such as \fBcpp\fR.
+.IP "\fB\-print\-libgcc\-file\-name\fR" 4
+.IX Item "-print-libgcc-file-name"
+Same as \fB\-print\-file\-name=libgcc.a\fR.
+.Sp
+This is useful when you use \fB\-nostdlib\fR or \fB\-nodefaultlibs\fR
+but you do want to link with \fIlibgcc.a\fR.  You can do
+.Sp
+.Vb 1
+\&        gcc \-nostdlib <files>... \`gcc \-print\-libgcc\-file\-name\`
+.Ve
+.IP "\fB\-print\-search\-dirs\fR" 4
+.IX Item "-print-search-dirs"
+Print the name of the configured installation directory and a list of
+program and library directories \fBgcc\fR will search\-\-\-and don't do anything else.
+.Sp
+This is useful when \fBgcc\fR prints the error message
+\&\fBinstallation problem, cannot exec cpp0: No such file or directory\fR.
+To resolve this you either need to put \fIcpp0\fR and the other compiler
+components where \fBgcc\fR expects to find them, or you can set the environment
+variable \fB\s-1GCC_EXEC_PREFIX\s0\fR to the directory where you installed them.
+Don't forget the trailing \fB/\fR.
+.IP "\fB\-print\-sysroot\fR" 4
+.IX Item "-print-sysroot"
+Print the target sysroot directory that will be used during
+compilation.  This is the target sysroot specified either at configure
+time or using the \fB\-\-sysroot\fR option, possibly with an extra
+suffix that depends on compilation options.  If no target sysroot is
+specified, the option prints nothing.
+.IP "\fB\-print\-sysroot\-headers\-suffix\fR" 4
+.IX Item "-print-sysroot-headers-suffix"
+Print the suffix added to the target sysroot when searching for
+headers, or give an error if the compiler is not configured with such
+a suffix\-\-\-and don't do anything else.
+.IP "\fB\-dumpmachine\fR" 4
+.IX Item "-dumpmachine"
+Print the compiler's target machine (for example,
+\&\fBi686\-pc\-linux\-gnu\fR)\-\-\-and don't do anything else.
+.IP "\fB\-dumpversion\fR" 4
+.IX Item "-dumpversion"
+Print the compiler version (for example, \fB3.0\fR)\-\-\-and don't do
+anything else.
+.IP "\fB\-dumpspecs\fR" 4
+.IX Item "-dumpspecs"
+Print the compiler's built-in specs\-\-\-and don't do anything else.  (This
+is used when \s-1GCC\s0 itself is being built.)
+.IP "\fB\-feliminate\-unused\-debug\-types\fR" 4
+.IX Item "-feliminate-unused-debug-types"
+Normally, when producing \s-1DWARF2\s0 output, \s-1GCC\s0 will emit debugging
+information for all types declared in a compilation
+unit, regardless of whether or not they are actually used
+in that compilation unit.  Sometimes this is useful, such as
+if, in the debugger, you want to cast a value to a type that is
+not actually used in your program (but is declared).  More often,
+however, this results in a significant amount of wasted space.
+With this option, \s-1GCC\s0 will avoid producing debug symbol output
+for types that are nowhere used in the source file being compiled.
+.SS "Options That Control Optimization"
+.IX Subsection "Options That Control Optimization"
+These options control various sorts of optimizations.
+.PP
+Without any optimization option, the compiler's goal is to reduce the
+cost of compilation and to make debugging produce the expected
+results.  Statements are independent: if you stop the program with a
+breakpoint between statements, you can then assign a new value to any
+variable or change the program counter to any other statement in the
+function and get exactly the results you would expect from the source
+code.
+.PP
+Turning on optimization flags makes the compiler attempt to improve
+the performance and/or code size at the expense of compilation time
+and possibly the ability to debug the program.
+.PP
+The compiler performs optimization based on the knowledge it has of the
+program.  Compiling multiple files at once to a single output file mode allows
+the compiler to use information gained from all of the files when compiling
+each of them.
+.PP
+Not all optimizations are controlled directly by a flag.  Only
+optimizations that have a flag are listed in this section.
+.PP
+Most optimizations are only enabled if an \fB\-O\fR level is set on
+the command line.  Otherwise they are disabled, even if individual             
+optimization flags are specified.
+.PP
+Depending on the target and how \s-1GCC\s0 was configured, a slightly different
+set of optimizations may be enabled at each \fB\-O\fR level than
+those listed here.  You can invoke \s-1GCC\s0 with \fB\-Q \-\-help=optimizers\fR
+to find out the exact set of optimizations that are enabled at each level.
+.IP "\fB\-O\fR" 4
+.IX Item "-O"
+.PD 0
+.IP "\fB\-O1\fR" 4
+.IX Item "-O1"
+.PD
+Optimize.  Optimizing compilation takes somewhat more time, and a lot
+more memory for a large function.
+.Sp
+With \fB\-O\fR, the compiler tries to reduce code size and execution
+time, without performing any optimizations that take a great deal of
+compilation time.
+.Sp
+\&\fB\-O\fR turns on the following optimization flags:
+.Sp
+\&\fB\-fauto\-inc\-dec 
+\&\-fcompare\-elim 
+\&\-fcprop\-registers 
+\&\-fdce 
+\&\-fdefer\-pop 
+\&\-fdelayed\-branch 
+\&\-fdse 
+\&\-fguess\-branch\-probability 
+\&\-fif\-conversion2 
+\&\-fif\-conversion 
+\&\-fipa\-pure\-const 
+\&\-fipa\-profile 
+\&\-fipa\-reference 
+\&\-fmerge\-constants
+\&\-fsplit\-wide\-types 
+\&\-ftree\-bit\-ccp 
+\&\-ftree\-builtin\-call\-dce 
+\&\-ftree\-ccp 
+\&\-ftree\-ch 
+\&\-ftree\-copyrename 
+\&\-ftree\-dce 
+\&\-ftree\-dominator\-opts 
+\&\-ftree\-dse 
+\&\-ftree\-forwprop 
+\&\-ftree\-fre 
+\&\-ftree\-phiprop 
+\&\-ftree\-sra 
+\&\-ftree\-pta 
+\&\-ftree\-ter 
+\&\-funit\-at\-a\-time\fR
+.Sp
+\&\fB\-O\fR also turns on \fB\-fomit\-frame\-pointer\fR on machines
+where doing so does not interfere with debugging.
+.IP "\fB\-O2\fR" 4
+.IX Item "-O2"
+Optimize even more.  \s-1GCC\s0 performs nearly all supported optimizations
+that do not involve a space-speed tradeoff.
+As compared to \fB\-O\fR, this option increases both compilation time
+and the performance of the generated code.
+.Sp
+\&\fB\-O2\fR turns on all optimization flags specified by \fB\-O\fR.  It
+also turns on the following optimization flags:
+\&\fB\-fthread\-jumps 
+\&\-falign\-functions  \-falign\-jumps 
+\&\-falign\-loops  \-falign\-labels 
+\&\-fcaller\-saves 
+\&\-fcrossjumping 
+\&\-fcse\-follow\-jumps  \-fcse\-skip\-blocks 
+\&\-fdelete\-null\-pointer\-checks 
+\&\-fdevirtualize 
+\&\-fexpensive\-optimizations 
+\&\-fgcse  \-fgcse\-lm  
+\&\-finline\-small\-functions 
+\&\-findirect\-inlining 
+\&\-fipa\-sra 
+\&\-foptimize\-sibling\-calls 
+\&\-fpartial\-inlining 
+\&\-fpeephole2 
+\&\-fregmove 
+\&\-freorder\-blocks  \-freorder\-functions 
+\&\-frerun\-cse\-after\-loop  
+\&\-fsched\-interblock  \-fsched\-spec 
+\&\-fschedule\-insns  \-fschedule\-insns2 
+\&\-fstrict\-aliasing \-fstrict\-overflow 
+\&\-ftree\-switch\-conversion 
+\&\-ftree\-pre 
+\&\-ftree\-vrp\fR
+.Sp
+Please note the warning under \fB\-fgcse\fR about
+invoking \fB\-O2\fR on programs that use computed gotos.
+.IP "\fB\-O3\fR" 4
+.IX Item "-O3"
+Optimize yet more.  \fB\-O3\fR turns on all optimizations specified
+by \fB\-O2\fR and also turns on the \fB\-finline\-functions\fR,
+\&\fB\-funswitch\-loops\fR, \fB\-fpredictive\-commoning\fR,
+\&\fB\-fgcse\-after\-reload\fR, \fB\-ftree\-vectorize\fR and
+\&\fB\-fipa\-cp\-clone\fR options.
+.IP "\fB\-O0\fR" 4
+.IX Item "-O0"
+Reduce compilation time and make debugging produce the expected
+results.  This is the default.
+.IP "\fB\-Os\fR" 4
+.IX Item "-Os"
+Optimize for size.  \fB\-Os\fR enables all \fB\-O2\fR optimizations that
+do not typically increase code size.  It also performs further
+optimizations designed to reduce code size.
+.Sp
+\&\fB\-Os\fR disables the following optimization flags:
+\&\fB\-falign\-functions  \-falign\-jumps  \-falign\-loops 
+\&\-falign\-labels  \-freorder\-blocks  \-freorder\-blocks\-and\-partition 
+\&\-fprefetch\-loop\-arrays  \-ftree\-vect\-loop\-version\fR
+.IP "\fB\-Ofast\fR" 4
+.IX Item "-Ofast"
+Disregard strict standards compliance.  \fB\-Ofast\fR enables all
+\&\fB\-O3\fR optimizations.  It also enables optimizations that are not
+valid for all standard compliant programs.
+It turns on \fB\-ffast\-math\fR.
+.Sp
+If you use multiple \fB\-O\fR options, with or without level numbers,
+the last such option is the one that is effective.
+.PP
+Options of the form \fB\-f\fR\fIflag\fR specify machine-independent
+flags.  Most flags have both positive and negative forms; the negative
+form of \fB\-ffoo\fR would be \fB\-fno\-foo\fR.  In the table
+below, only one of the forms is listed\-\-\-the one you typically will
+use.  You can figure out the other form by either removing \fBno\-\fR
+or adding it.
+.PP
+The following options control specific optimizations.  They are either
+activated by \fB\-O\fR options or are related to ones that are.  You
+can use the following flags in the rare cases when \*(L"fine-tuning\*(R" of
+optimizations to be performed is desired.
+.IP "\fB\-fno\-default\-inline\fR" 4
+.IX Item "-fno-default-inline"
+Do not make member functions inline by default merely because they are
+defined inside the class scope (\*(C+ only).  Otherwise, when you specify
+\&\fB\-O\fR, member functions defined inside class scope are compiled
+inline by default; i.e., you don't need to add \fBinline\fR in front of
+the member function name.
+.IP "\fB\-fno\-defer\-pop\fR" 4
+.IX Item "-fno-defer-pop"
+Always pop the arguments to each function call as soon as that function
+returns.  For machines which must pop arguments after a function call,
+the compiler normally lets arguments accumulate on the stack for several
+function calls and pops them all at once.
+.Sp
+Disabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fforward\-propagate\fR" 4
+.IX Item "-fforward-propagate"
+Perform a forward propagation pass on \s-1RTL\s0.  The pass tries to combine two
+instructions and checks if the result can be simplified.  If loop unrolling
+is active, two passes are performed and the second is scheduled after
+loop unrolling.
+.Sp
+This option is enabled by default at optimization levels \fB\-O\fR,
+\&\fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-ffp\-contract=\fR\fIstyle\fR" 4
+.IX Item "-ffp-contract=style"
+\&\fB\-ffp\-contract=off\fR disables floating-point expression contraction.
+\&\fB\-ffp\-contract=fast\fR enables floating-point expression contraction
+such as forming of fused multiply-add operations if the target has
+native support for them.
+\&\fB\-ffp\-contract=on\fR enables floating-point expression contraction
+if allowed by the language standard.  This is currently not implemented
+and treated equal to \fB\-ffp\-contract=off\fR.
+.Sp
+The default is \fB\-ffp\-contract=fast\fR.
+.IP "\fB\-fomit\-frame\-pointer\fR" 4
+.IX Item "-fomit-frame-pointer"
+Don't keep the frame pointer in a register for functions that
+don't need one.  This avoids the instructions to save, set up and
+restore frame pointers; it also makes an extra register available
+in many functions.  \fBIt also makes debugging impossible on
+some machines.\fR
+.Sp
+On some machines, such as the \s-1VAX\s0, this flag has no effect, because
+the standard calling sequence automatically handles the frame pointer
+and nothing is saved by pretending it doesn't exist.  The
+machine-description macro \f(CW\*(C`FRAME_POINTER_REQUIRED\*(C'\fR controls
+whether a target machine supports this flag.
+.Sp
+Starting with \s-1GCC\s0 version 4.6, the default setting (when not optimizing for
+size) for 32\-bit Linux x86 and 32\-bit Darwin x86 targets has been changed to
+\&\fB\-fomit\-frame\-pointer\fR.  The default can be reverted to
+\&\fB\-fno\-omit\-frame\-pointer\fR by configuring \s-1GCC\s0 with the
+\&\fB\-\-enable\-frame\-pointer\fR configure option.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-foptimize\-sibling\-calls\fR" 4
+.IX Item "-foptimize-sibling-calls"
+Optimize sibling and tail recursive calls.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fno\-inline\fR" 4
+.IX Item "-fno-inline"
+Don't pay attention to the \f(CW\*(C`inline\*(C'\fR keyword.  Normally this option
+is used to keep the compiler from expanding any functions inline.
+Note that if you are not optimizing, no functions can be expanded inline.
+.IP "\fB\-finline\-small\-functions\fR" 4
+.IX Item "-finline-small-functions"
+Integrate functions into their callers when their body is smaller than expected
+function call code (so overall size of program gets smaller).  The compiler
+heuristically decides which functions are simple enough to be worth integrating
+in this way.
+.Sp
+Enabled at level \fB\-O2\fR.
+.IP "\fB\-findirect\-inlining\fR" 4
+.IX Item "-findirect-inlining"
+Inline also indirect calls that are discovered to be known at compile
+time thanks to previous inlining.  This option has any effect only
+when inlining itself is turned on by the \fB\-finline\-functions\fR
+or \fB\-finline\-small\-functions\fR options.
+.Sp
+Enabled at level \fB\-O2\fR.
+.IP "\fB\-finline\-functions\fR" 4
+.IX Item "-finline-functions"
+Integrate all simple functions into their callers.  The compiler
+heuristically decides which functions are simple enough to be worth
+integrating in this way.
+.Sp
+If all calls to a given function are integrated, and the function is
+declared \f(CW\*(C`static\*(C'\fR, then the function is normally not output as
+assembler code in its own right.
+.Sp
+Enabled at level \fB\-O3\fR.
+.IP "\fB\-finline\-functions\-called\-once\fR" 4
+.IX Item "-finline-functions-called-once"
+Consider all \f(CW\*(C`static\*(C'\fR functions called once for inlining into their
+caller even if they are not marked \f(CW\*(C`inline\*(C'\fR.  If a call to a given
+function is integrated, then the function is not output as assembler code
+in its own right.
+.Sp
+Enabled at levels \fB\-O1\fR, \fB\-O2\fR, \fB\-O3\fR and \fB\-Os\fR.
+.IP "\fB\-fearly\-inlining\fR" 4
+.IX Item "-fearly-inlining"
+Inline functions marked by \f(CW\*(C`always_inline\*(C'\fR and functions whose body seems
+smaller than the function call overhead early before doing
+\&\fB\-fprofile\-generate\fR instrumentation and real inlining pass.  Doing so
+makes profiling significantly cheaper and usually inlining faster on programs
+having large chains of nested wrapper functions.
+.Sp
+Enabled by default.
+.IP "\fB\-fipa\-sra\fR" 4
+.IX Item "-fipa-sra"
+Perform interprocedural scalar replacement of aggregates, removal of
+unused parameters and replacement of parameters passed by reference
+by parameters passed by value.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR and \fB\-Os\fR.
+.IP "\fB\-finline\-limit=\fR\fIn\fR" 4
+.IX Item "-finline-limit=n"
+By default, \s-1GCC\s0 limits the size of functions that can be inlined.  This flag
+allows coarse control of this limit.  \fIn\fR is the size of functions that
+can be inlined in number of pseudo instructions.
+.Sp
+Inlining is actually controlled by a number of parameters, which may be
+specified individually by using \fB\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR.
+The \fB\-finline\-limit=\fR\fIn\fR option sets some of these parameters
+as follows:
+.RS 4
+.IP "\fBmax-inline-insns-single\fR" 4
+.IX Item "max-inline-insns-single"
+is set to \fIn\fR/2.
+.IP "\fBmax-inline-insns-auto\fR" 4
+.IX Item "max-inline-insns-auto"
+is set to \fIn\fR/2.
+.RE
+.RS 4
+.Sp
+See below for a documentation of the individual
+parameters controlling inlining and for the defaults of these parameters.
+.Sp
+\&\fINote:\fR there may be no value to \fB\-finline\-limit\fR that results
+in default behavior.
+.Sp
+\&\fINote:\fR pseudo instruction represents, in this particular context, an
+abstract measurement of function's size.  In no way does it represent a count
+of assembly instructions and as such its exact meaning might change from one
+release to an another.
+.RE
+.IP "\fB\-fno\-keep\-inline\-dllexport\fR" 4
+.IX Item "-fno-keep-inline-dllexport"
+This is a more fine-grained version of \fB\-fkeep\-inline\-functions\fR,
+which applies only to functions that are declared using the \f(CW\*(C`dllexport\*(C'\fR
+attribute or declspec
+.IP "\fB\-fkeep\-inline\-functions\fR" 4
+.IX Item "-fkeep-inline-functions"
+In C, emit \f(CW\*(C`static\*(C'\fR functions that are declared \f(CW\*(C`inline\*(C'\fR
+into the object file, even if the function has been inlined into all
+of its callers.  This switch does not affect functions using the
+\&\f(CW\*(C`extern inline\*(C'\fR extension in \s-1GNU\s0 C90.  In \*(C+, emit any and all
+inline functions into the object file.
+.IP "\fB\-fkeep\-static\-consts\fR" 4
+.IX Item "-fkeep-static-consts"
+Emit variables declared \f(CW\*(C`static const\*(C'\fR when optimization isn't turned
+on, even if the variables aren't referenced.
+.Sp
+\&\s-1GCC\s0 enables this option by default.  If you want to force the compiler to
+check if the variable was referenced, regardless of whether or not
+optimization is turned on, use the \fB\-fno\-keep\-static\-consts\fR option.
+.IP "\fB\-fmerge\-constants\fR" 4
+.IX Item "-fmerge-constants"
+Attempt to merge identical constants (string constants and floating point
+constants) across compilation units.
+.Sp
+This option is the default for optimized compilation if the assembler and
+linker support it.  Use \fB\-fno\-merge\-constants\fR to inhibit this
+behavior.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fmerge\-all\-constants\fR" 4
+.IX Item "-fmerge-all-constants"
+Attempt to merge identical constants and identical variables.
+.Sp
+This option implies \fB\-fmerge\-constants\fR.  In addition to
+\&\fB\-fmerge\-constants\fR this considers e.g. even constant initialized
+arrays or initialized constant variables with integral or floating point
+types.  Languages like C or \*(C+ require each variable, including multiple
+instances of the same variable in recursive calls, to have distinct locations,
+so using this option will result in non-conforming
+behavior.
+.IP "\fB\-fmodulo\-sched\fR" 4
+.IX Item "-fmodulo-sched"
+Perform swing modulo scheduling immediately before the first scheduling
+pass.  This pass looks at innermost loops and reorders their
+instructions by overlapping different iterations.
+.IP "\fB\-fmodulo\-sched\-allow\-regmoves\fR" 4
+.IX Item "-fmodulo-sched-allow-regmoves"
+Perform more aggressive \s-1SMS\s0 based modulo scheduling with register moves
+allowed.  By setting this flag certain anti-dependences edges will be
+deleted which will trigger the generation of reg-moves based on the
+life-range analysis.  This option is effective only with
+\&\fB\-fmodulo\-sched\fR enabled.
+.IP "\fB\-fno\-branch\-count\-reg\fR" 4
+.IX Item "-fno-branch-count-reg"
+Do not use \*(L"decrement and branch\*(R" instructions on a count register,
+but instead generate a sequence of instructions that decrement a
+register, compare it against zero, then branch based upon the result.
+This option is only meaningful on architectures that support such
+instructions, which include x86, PowerPC, \s-1IA\-64\s0 and S/390.
+.Sp
+The default is \fB\-fbranch\-count\-reg\fR.
+.IP "\fB\-fno\-function\-cse\fR" 4
+.IX Item "-fno-function-cse"
+Do not put function addresses in registers; make each instruction that
+calls a constant function contain the function's address explicitly.
+.Sp
+This option results in less efficient code, but some strange hacks
+that alter the assembler output may be confused by the optimizations
+performed when this option is not used.
+.Sp
+The default is \fB\-ffunction\-cse\fR
+.IP "\fB\-fno\-zero\-initialized\-in\-bss\fR" 4
+.IX Item "-fno-zero-initialized-in-bss"
+If the target supports a \s-1BSS\s0 section, \s-1GCC\s0 by default puts variables that
+are initialized to zero into \s-1BSS\s0.  This can save space in the resulting
+code.
+.Sp
+This option turns off this behavior because some programs explicitly
+rely on variables going to the data section.  E.g., so that the
+resulting executable can find the beginning of that section and/or make
+assumptions based on that.
+.Sp
+The default is \fB\-fzero\-initialized\-in\-bss\fR.
+.IP "\fB\-fmudflap \-fmudflapth \-fmudflapir\fR" 4
+.IX Item "-fmudflap -fmudflapth -fmudflapir"
+For front-ends that support it (C and \*(C+), instrument all risky
+pointer/array dereferencing operations, some standard library
+string/heap functions, and some other associated constructs with
+range/validity tests.  Modules so instrumented should be immune to
+buffer overflows, invalid heap use, and some other classes of C/\*(C+
+programming errors.  The instrumentation relies on a separate runtime
+library (\fIlibmudflap\fR), which will be linked into a program if
+\&\fB\-fmudflap\fR is given at link time.  Run-time behavior of the
+instrumented program is controlled by the \fB\s-1MUDFLAP_OPTIONS\s0\fR
+environment variable.  See \f(CW\*(C`env MUDFLAP_OPTIONS=\-help a.out\*(C'\fR
+for its options.
+.Sp
+Use \fB\-fmudflapth\fR instead of \fB\-fmudflap\fR to compile and to
+link if your program is multi-threaded.  Use \fB\-fmudflapir\fR, in
+addition to \fB\-fmudflap\fR or \fB\-fmudflapth\fR, if
+instrumentation should ignore pointer reads.  This produces less
+instrumentation (and therefore faster execution) and still provides
+some protection against outright memory corrupting writes, but allows
+erroneously read data to propagate within a program.
+.IP "\fB\-fthread\-jumps\fR" 4
+.IX Item "-fthread-jumps"
+Perform optimizations where we check to see if a jump branches to a
+location where another comparison subsumed by the first is found.  If
+so, the first branch is redirected to either the destination of the
+second branch or a point immediately following it, depending on whether
+the condition is known to be true or false.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fsplit\-wide\-types\fR" 4
+.IX Item "-fsplit-wide-types"
+When using a type that occupies multiple registers, such as \f(CW\*(C`long
+long\*(C'\fR on a 32\-bit system, split the registers apart and allocate them
+independently.  This normally generates better code for those types,
+but may make debugging more difficult.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR,
+\&\fB\-Os\fR.
+.IP "\fB\-fcse\-follow\-jumps\fR" 4
+.IX Item "-fcse-follow-jumps"
+In common subexpression elimination (\s-1CSE\s0), scan through jump instructions
+when the target of the jump is not reached by any other path.  For
+example, when \s-1CSE\s0 encounters an \f(CW\*(C`if\*(C'\fR statement with an
+\&\f(CW\*(C`else\*(C'\fR clause, \s-1CSE\s0 will follow the jump when the condition
+tested is false.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fcse\-skip\-blocks\fR" 4
+.IX Item "-fcse-skip-blocks"
+This is similar to \fB\-fcse\-follow\-jumps\fR, but causes \s-1CSE\s0 to
+follow jumps which conditionally skip over blocks.  When \s-1CSE\s0
+encounters a simple \f(CW\*(C`if\*(C'\fR statement with no else clause,
+\&\fB\-fcse\-skip\-blocks\fR causes \s-1CSE\s0 to follow the jump around the
+body of the \f(CW\*(C`if\*(C'\fR.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-frerun\-cse\-after\-loop\fR" 4
+.IX Item "-frerun-cse-after-loop"
+Re-run common subexpression elimination after loop optimizations has been
+performed.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fgcse\fR" 4
+.IX Item "-fgcse"
+Perform a global common subexpression elimination pass.
+This pass also performs global constant and copy propagation.
+.Sp
+\&\fINote:\fR When compiling a program using computed gotos, a \s-1GCC\s0
+extension, you may get better runtime performance if you disable
+the global common subexpression elimination pass by adding
+\&\fB\-fno\-gcse\fR to the command line.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fgcse\-lm\fR" 4
+.IX Item "-fgcse-lm"
+When \fB\-fgcse\-lm\fR is enabled, global common subexpression elimination will
+attempt to move loads which are only killed by stores into themselves.  This
+allows a loop containing a load/store sequence to be changed to a load outside
+the loop, and a copy/store within the loop.
+.Sp
+Enabled by default when gcse is enabled.
+.IP "\fB\-fgcse\-sm\fR" 4
+.IX Item "-fgcse-sm"
+When \fB\-fgcse\-sm\fR is enabled, a store motion pass is run after
+global common subexpression elimination.  This pass will attempt to move
+stores out of loops.  When used in conjunction with \fB\-fgcse\-lm\fR,
+loops containing a load/store sequence can be changed to a load before
+the loop and a store after the loop.
+.Sp
+Not enabled at any optimization level.
+.IP "\fB\-fgcse\-las\fR" 4
+.IX Item "-fgcse-las"
+When \fB\-fgcse\-las\fR is enabled, the global common subexpression
+elimination pass eliminates redundant loads that come after stores to the
+same memory location (both partial and full redundancies).
+.Sp
+Not enabled at any optimization level.
+.IP "\fB\-fgcse\-after\-reload\fR" 4
+.IX Item "-fgcse-after-reload"
+When \fB\-fgcse\-after\-reload\fR is enabled, a redundant load elimination
+pass is performed after reload.  The purpose of this pass is to cleanup
+redundant spilling.
+.IP "\fB\-funsafe\-loop\-optimizations\fR" 4
+.IX Item "-funsafe-loop-optimizations"
+If given, the loop optimizer will assume that loop indices do not
+overflow, and that the loops with nontrivial exit condition are not
+infinite.  This enables a wider range of loop optimizations even if
+the loop optimizer itself cannot prove that these assumptions are valid.
+Using \fB\-Wunsafe\-loop\-optimizations\fR, the compiler will warn you
+if it finds this kind of loop.
+.IP "\fB\-fcrossjumping\fR" 4
+.IX Item "-fcrossjumping"
+Perform cross-jumping transformation.  This transformation unifies equivalent code and save code size.  The
+resulting code may or may not perform better than without cross-jumping.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fauto\-inc\-dec\fR" 4
+.IX Item "-fauto-inc-dec"
+Combine increments or decrements of addresses with memory accesses.
+This pass is always skipped on architectures that do not have
+instructions to support this.  Enabled by default at \fB\-O\fR and
+higher on architectures that support this.
+.IP "\fB\-fdce\fR" 4
+.IX Item "-fdce"
+Perform dead code elimination (\s-1DCE\s0) on \s-1RTL\s0.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fdse\fR" 4
+.IX Item "-fdse"
+Perform dead store elimination (\s-1DSE\s0) on \s-1RTL\s0.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fif\-conversion\fR" 4
+.IX Item "-fif-conversion"
+Attempt to transform conditional jumps into branch-less equivalents.  This
+include use of conditional moves, min, max, set flags and abs instructions, and
+some tricks doable by standard arithmetics.  The use of conditional execution
+on chips where it is available is controlled by \f(CW\*(C`if\-conversion2\*(C'\fR.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fif\-conversion2\fR" 4
+.IX Item "-fif-conversion2"
+Use conditional execution (where available) to transform conditional jumps into
+branch-less equivalents.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fdelete\-null\-pointer\-checks\fR" 4
+.IX Item "-fdelete-null-pointer-checks"
+Assume that programs cannot safely dereference null pointers, and that
+no code or data element resides there.  This enables simple constant
+folding optimizations at all optimization levels.  In addition, other
+optimization passes in \s-1GCC\s0 use this flag to control global dataflow
+analyses that eliminate useless checks for null pointers; these assume
+that if a pointer is checked after it has already been dereferenced,
+it cannot be null.
+.Sp
+Note however that in some environments this assumption is not true.
+Use \fB\-fno\-delete\-null\-pointer\-checks\fR to disable this optimization
+for programs which depend on that behavior.
+.Sp
+Some targets, especially embedded ones, disable this option at all levels.
+Otherwise it is enabled at all levels: \fB\-O0\fR, \fB\-O1\fR,
+\&\fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.  Passes that use the information
+are enabled independently at different optimization levels.
+.IP "\fB\-fdevirtualize\fR" 4
+.IX Item "-fdevirtualize"
+Attempt to convert calls to virtual functions to direct calls.  This
+is done both within a procedure and interprocedurally as part of
+indirect inlining (\f(CW\*(C`\-findirect\-inlining\*(C'\fR) and interprocedural constant
+propagation (\fB\-fipa\-cp\fR).
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fexpensive\-optimizations\fR" 4
+.IX Item "-fexpensive-optimizations"
+Perform a number of minor optimizations that are relatively expensive.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-foptimize\-register\-move\fR" 4
+.IX Item "-foptimize-register-move"
+.PD 0
+.IP "\fB\-fregmove\fR" 4
+.IX Item "-fregmove"
+.PD
+Attempt to reassign register numbers in move instructions and as
+operands of other simple instructions in order to maximize the amount of
+register tying.  This is especially helpful on machines with two-operand
+instructions.
+.Sp
+Note \fB\-fregmove\fR and \fB\-foptimize\-register\-move\fR are the same
+optimization.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fira\-algorithm=\fR\fIalgorithm\fR" 4
+.IX Item "-fira-algorithm=algorithm"
+Use specified coloring algorithm for the integrated register
+allocator.  The \fIalgorithm\fR argument should be \f(CW\*(C`priority\*(C'\fR or
+\&\f(CW\*(C`CB\*(C'\fR.  The first algorithm specifies Chow's priority coloring,
+the second one specifies Chaitin-Briggs coloring.  The second
+algorithm can be unimplemented for some architectures.  If it is
+implemented, it is the default because Chaitin-Briggs coloring as a
+rule generates a better code.
+.IP "\fB\-fira\-region=\fR\fIregion\fR" 4
+.IX Item "-fira-region=region"
+Use specified regions for the integrated register allocator.  The
+\&\fIregion\fR argument should be one of \f(CW\*(C`all\*(C'\fR, \f(CW\*(C`mixed\*(C'\fR, or
+\&\f(CW\*(C`one\*(C'\fR.  The first value means using all loops as register
+allocation regions, the second value which is the default means using
+all loops except for loops with small register pressure as the
+regions, and third one means using all function as a single region.
+The first value can give best result for machines with small size and
+irregular register set, the third one results in faster and generates
+decent code and the smallest size code, and the default value usually
+give the best results in most cases and for most architectures.
+.IP "\fB\-fira\-loop\-pressure\fR" 4
+.IX Item "-fira-loop-pressure"
+Use \s-1IRA\s0 to evaluate register pressure in loops for decision to move
+loop invariants.  Usage of this option usually results in generation
+of faster and smaller code on machines with big register files (>= 32
+registers) but it can slow compiler down.
+.Sp
+This option is enabled at level \fB\-O3\fR for some targets.
+.IP "\fB\-fno\-ira\-share\-save\-slots\fR" 4
+.IX Item "-fno-ira-share-save-slots"
+Switch off sharing stack slots used for saving call used hard
+registers living through a call.  Each hard register will get a
+separate stack slot and as a result function stack frame will be
+bigger.
+.IP "\fB\-fno\-ira\-share\-spill\-slots\fR" 4
+.IX Item "-fno-ira-share-spill-slots"
+Switch off sharing stack slots allocated for pseudo-registers.  Each
+pseudo-register which did not get a hard register will get a separate
+stack slot and as a result function stack frame will be bigger.
+.IP "\fB\-fira\-verbose=\fR\fIn\fR" 4
+.IX Item "-fira-verbose=n"
+Set up how verbose dump file for the integrated register allocator
+will be.  Default value is 5.  If the value is greater or equal to 10,
+the dump file will be stderr as if the value were \fIn\fR minus 10.
+.IP "\fB\-fdelayed\-branch\fR" 4
+.IX Item "-fdelayed-branch"
+If supported for the target machine, attempt to reorder instructions
+to exploit instruction slots available after delayed branch
+instructions.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fschedule\-insns\fR" 4
+.IX Item "-fschedule-insns"
+If supported for the target machine, attempt to reorder instructions to
+eliminate execution stalls due to required data being unavailable.  This
+helps machines that have slow floating point or memory load instructions
+by allowing other instructions to be issued until the result of the load
+or floating point instruction is required.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-fschedule\-insns2\fR" 4
+.IX Item "-fschedule-insns2"
+Similar to \fB\-fschedule\-insns\fR, but requests an additional pass of
+instruction scheduling after register allocation has been done.  This is
+especially useful on machines with a relatively small number of
+registers and where memory load instructions take more than one cycle.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fno\-sched\-interblock\fR" 4
+.IX Item "-fno-sched-interblock"
+Don't schedule instructions across basic blocks.  This is normally
+enabled by default when scheduling before register allocation, i.e.
+with \fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fno\-sched\-spec\fR" 4
+.IX Item "-fno-sched-spec"
+Don't allow speculative motion of non-load instructions.  This is normally
+enabled by default when scheduling before register allocation, i.e.
+with \fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-pressure\fR" 4
+.IX Item "-fsched-pressure"
+Enable register pressure sensitive insn scheduling before the register
+allocation.  This only makes sense when scheduling before register
+allocation is enabled, i.e. with \fB\-fschedule\-insns\fR or at
+\&\fB\-O2\fR or higher.  Usage of this option can improve the
+generated code and decrease its size by preventing register pressure
+increase above the number of available hard registers and as a
+consequence register spills in the register allocation.
+.IP "\fB\-fsched\-spec\-load\fR" 4
+.IX Item "-fsched-spec-load"
+Allow speculative motion of some load instructions.  This only makes
+sense when scheduling before register allocation, i.e. with
+\&\fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-spec\-load\-dangerous\fR" 4
+.IX Item "-fsched-spec-load-dangerous"
+Allow speculative motion of more load instructions.  This only makes
+sense when scheduling before register allocation, i.e. with
+\&\fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-stalled\-insns\fR" 4
+.IX Item "-fsched-stalled-insns"
+.PD 0
+.IP "\fB\-fsched\-stalled\-insns=\fR\fIn\fR" 4
+.IX Item "-fsched-stalled-insns=n"
+.PD
+Define how many insns (if any) can be moved prematurely from the queue
+of stalled insns into the ready list, during the second scheduling pass.
+\&\fB\-fno\-sched\-stalled\-insns\fR means that no insns will be moved
+prematurely, \fB\-fsched\-stalled\-insns=0\fR means there is no limit
+on how many queued insns can be moved prematurely.
+\&\fB\-fsched\-stalled\-insns\fR without a value is equivalent to
+\&\fB\-fsched\-stalled\-insns=1\fR.
+.IP "\fB\-fsched\-stalled\-insns\-dep\fR" 4
+.IX Item "-fsched-stalled-insns-dep"
+.PD 0
+.IP "\fB\-fsched\-stalled\-insns\-dep=\fR\fIn\fR" 4
+.IX Item "-fsched-stalled-insns-dep=n"
+.PD
+Define how many insn groups (cycles) will be examined for a dependency
+on a stalled insn that is candidate for premature removal from the queue
+of stalled insns.  This has an effect only during the second scheduling pass,
+and only if \fB\-fsched\-stalled\-insns\fR is used.
+\&\fB\-fno\-sched\-stalled\-insns\-dep\fR is equivalent to
+\&\fB\-fsched\-stalled\-insns\-dep=0\fR.
+\&\fB\-fsched\-stalled\-insns\-dep\fR without a value is equivalent to
+\&\fB\-fsched\-stalled\-insns\-dep=1\fR.
+.IP "\fB\-fsched2\-use\-superblocks\fR" 4
+.IX Item "-fsched2-use-superblocks"
+When scheduling after register allocation, do use superblock scheduling
+algorithm.  Superblock scheduling allows motion across basic block boundaries
+resulting on faster schedules.  This option is experimental, as not all machine
+descriptions used by \s-1GCC\s0 model the \s-1CPU\s0 closely enough to avoid unreliable
+results from the algorithm.
+.Sp
+This only makes sense when scheduling after register allocation, i.e. with
+\&\fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-group\-heuristic\fR" 4
+.IX Item "-fsched-group-heuristic"
+Enable the group heuristic in the scheduler.  This heuristic favors 
+the instruction that belongs to a schedule group.  This is enabled 
+by default when scheduling is enabled, i.e. with \fB\-fschedule\-insns\fR 
+or \fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-critical\-path\-heuristic\fR" 4
+.IX Item "-fsched-critical-path-heuristic"
+Enable the critical-path heuristic in the scheduler.  This heuristic favors 
+instructions on the critical path.  This is enabled by default when 
+scheduling is enabled, i.e. with \fB\-fschedule\-insns\fR 
+or \fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-spec\-insn\-heuristic\fR" 4
+.IX Item "-fsched-spec-insn-heuristic"
+Enable the speculative instruction heuristic in the scheduler.  This 
+heuristic favors speculative instructions with greater dependency weakness.  
+This is enabled by default when scheduling is enabled, i.e. 
+with \fB\-fschedule\-insns\fR or \fB\-fschedule\-insns2\fR 
+or at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-rank\-heuristic\fR" 4
+.IX Item "-fsched-rank-heuristic"
+Enable the rank heuristic in the scheduler.  This heuristic favors 
+the instruction belonging to a basic block with greater size or frequency.  
+This is enabled by default when scheduling is enabled, i.e. 
+with \fB\-fschedule\-insns\fR or \fB\-fschedule\-insns2\fR or 
+at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-last\-insn\-heuristic\fR" 4
+.IX Item "-fsched-last-insn-heuristic"
+Enable the last-instruction heuristic in the scheduler.  This heuristic 
+favors the instruction that is less dependent on the last instruction
+scheduled.  This is enabled by default when scheduling is enabled, 
+i.e. with \fB\-fschedule\-insns\fR or \fB\-fschedule\-insns2\fR or 
+at \fB\-O2\fR or higher.
+.IP "\fB\-fsched\-dep\-count\-heuristic\fR" 4
+.IX Item "-fsched-dep-count-heuristic"
+Enable the dependent-count heuristic in the scheduler.  This heuristic 
+favors the instruction that has more instructions depending on it.  
+This is enabled by default when scheduling is enabled, i.e. 
+with \fB\-fschedule\-insns\fR or \fB\-fschedule\-insns2\fR or 
+at \fB\-O2\fR or higher.
+.IP "\fB\-freschedule\-modulo\-scheduled\-loops\fR" 4
+.IX Item "-freschedule-modulo-scheduled-loops"
+The modulo scheduling comes before the traditional scheduling, if a loop
+was modulo scheduled we may want to prevent the later scheduling passes
+from changing its schedule, we use this option to control that.
+.IP "\fB\-fselective\-scheduling\fR" 4
+.IX Item "-fselective-scheduling"
+Schedule instructions using selective scheduling algorithm.  Selective
+scheduling runs instead of the first scheduler pass.
+.IP "\fB\-fselective\-scheduling2\fR" 4
+.IX Item "-fselective-scheduling2"
+Schedule instructions using selective scheduling algorithm.  Selective
+scheduling runs instead of the second scheduler pass.
+.IP "\fB\-fsel\-sched\-pipelining\fR" 4
+.IX Item "-fsel-sched-pipelining"
+Enable software pipelining of innermost loops during selective scheduling.
+This option has no effect until one of \fB\-fselective\-scheduling\fR or
+\&\fB\-fselective\-scheduling2\fR is turned on.
+.IP "\fB\-fsel\-sched\-pipelining\-outer\-loops\fR" 4
+.IX Item "-fsel-sched-pipelining-outer-loops"
+When pipelining loops during selective scheduling, also pipeline outer loops.
+This option has no effect until \fB\-fsel\-sched\-pipelining\fR is turned on.
+.IP "\fB\-fcaller\-saves\fR" 4
+.IX Item "-fcaller-saves"
+Enable values to be allocated in registers that will be clobbered by
+function calls, by emitting extra instructions to save and restore the
+registers around such calls.  Such allocation is done only when it
+seems to result in better code than would otherwise be produced.
+.Sp
+This option is always enabled by default on certain machines, usually
+those which have no call-preserved registers to use instead.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fcombine\-stack\-adjustments\fR" 4
+.IX Item "-fcombine-stack-adjustments"
+Tracks stack adjustments (pushes and pops) and stack memory references
+and then tries to find ways to combine them.
+.Sp
+Enabled by default at \fB\-O1\fR and higher.
+.IP "\fB\-fconserve\-stack\fR" 4
+.IX Item "-fconserve-stack"
+Attempt to minimize stack usage.  The compiler will attempt to use less
+stack space, even if that makes the program slower.  This option
+implies setting the \fBlarge-stack-frame\fR parameter to 100
+and the \fBlarge-stack-frame-growth\fR parameter to 400.
+.IP "\fB\-ftree\-reassoc\fR" 4
+.IX Item "-ftree-reassoc"
+Perform reassociation on trees.  This flag is enabled by default
+at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-pre\fR" 4
+.IX Item "-ftree-pre"
+Perform partial redundancy elimination (\s-1PRE\s0) on trees.  This flag is
+enabled by default at \fB\-O2\fR and \fB\-O3\fR.
+.IP "\fB\-ftree\-forwprop\fR" 4
+.IX Item "-ftree-forwprop"
+Perform forward propagation on trees.  This flag is enabled by default
+at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-fre\fR" 4
+.IX Item "-ftree-fre"
+Perform full redundancy elimination (\s-1FRE\s0) on trees.  The difference
+between \s-1FRE\s0 and \s-1PRE\s0 is that \s-1FRE\s0 only considers expressions
+that are computed on all paths leading to the redundant computation.
+This analysis is faster than \s-1PRE\s0, though it exposes fewer redundancies.
+This flag is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-phiprop\fR" 4
+.IX Item "-ftree-phiprop"
+Perform hoisting of loads from conditional pointers on trees.  This
+pass is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-copy\-prop\fR" 4
+.IX Item "-ftree-copy-prop"
+Perform copy propagation on trees.  This pass eliminates unnecessary
+copy operations.  This flag is enabled by default at \fB\-O\fR and
+higher.
+.IP "\fB\-fipa\-pure\-const\fR" 4
+.IX Item "-fipa-pure-const"
+Discover which functions are pure or constant.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fipa\-reference\fR" 4
+.IX Item "-fipa-reference"
+Discover which static variables do not escape cannot escape the
+compilation unit.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fipa\-struct\-reorg\fR" 4
+.IX Item "-fipa-struct-reorg"
+Perform structure reorganization optimization, that change C\-like structures
+layout in order to better utilize spatial locality.  This transformation is
+affective for programs containing arrays of structures.  Available in two
+compilation modes: profile-based (enabled with \fB\-fprofile\-generate\fR)
+or static (which uses built-in heuristics).  It works only in whole program
+mode, so it requires \fB\-fwhole\-program\fR to be
+enabled.  Structures considered \fBcold\fR by this transformation are not
+affected (see \fB\-\-param struct\-reorg\-cold\-struct\-ratio=\fR\fIvalue\fR).
+.Sp
+With this flag, the program debug info reflects a new structure layout.
+.IP "\fB\-fipa\-pta\fR" 4
+.IX Item "-fipa-pta"
+Perform interprocedural pointer analysis and interprocedural modification
+and reference analysis.  This option can cause excessive memory and
+compile-time usage on large compilation units.  It is not enabled by
+default at any optimization level.
+.IP "\fB\-fipa\-profile\fR" 4
+.IX Item "-fipa-profile"
+Perform interprocedural profile propagation.  The functions called only from
+cold functions are marked as cold. Also functions executed once (such as
+\&\f(CW\*(C`cold\*(C'\fR, \f(CW\*(C`noreturn\*(C'\fR, static constructors or destructors) are identified. Cold
+functions and loop less parts of functions executed once are then optimized for
+size.
+Enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-fipa\-cp\fR" 4
+.IX Item "-fipa-cp"
+Perform interprocedural constant propagation.
+This optimization analyzes the program to determine when values passed
+to functions are constants and then optimizes accordingly.
+This optimization can substantially increase performance
+if the application has constants passed to functions.
+This flag is enabled by default at \fB\-O2\fR, \fB\-Os\fR and \fB\-O3\fR.
+.IP "\fB\-fipa\-cp\-clone\fR" 4
+.IX Item "-fipa-cp-clone"
+Perform function cloning to make interprocedural constant propagation stronger.
+When enabled, interprocedural constant propagation will perform function cloning
+when externally visible function can be called with constant arguments.
+Because this optimization can create multiple copies of functions,
+it may significantly increase code size
+(see \fB\-\-param ipcp\-unit\-growth=\fR\fIvalue\fR).
+This flag is enabled by default at \fB\-O3\fR.
+.IP "\fB\-fipa\-matrix\-reorg\fR" 4
+.IX Item "-fipa-matrix-reorg"
+Perform matrix flattening and transposing.
+Matrix flattening tries to replace an m\-dimensional matrix
+with its equivalent n\-dimensional matrix, where n < m.
+This reduces the level of indirection needed for accessing the elements
+of the matrix. The second optimization is matrix transposing that
+attempts to change the order of the matrix's dimensions in order to
+improve cache locality.
+Both optimizations need the \fB\-fwhole\-program\fR flag.
+Transposing is enabled only if profiling information is available.
+.IP "\fB\-ftree\-sink\fR" 4
+.IX Item "-ftree-sink"
+Perform forward store motion  on trees.  This flag is
+enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-bit\-ccp\fR" 4
+.IX Item "-ftree-bit-ccp"
+Perform sparse conditional bit constant propagation on trees and propagate
+pointer alignment information.
+This pass only operates on local scalar variables and is enabled by default
+at \fB\-O\fR and higher.  It requires that \fB\-ftree\-ccp\fR is enabled.
+.IP "\fB\-ftree\-ccp\fR" 4
+.IX Item "-ftree-ccp"
+Perform sparse conditional constant propagation (\s-1CCP\s0) on trees.  This
+pass only operates on local scalar variables and is enabled by default
+at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-switch\-conversion\fR" 4
+.IX Item "-ftree-switch-conversion"
+Perform conversion of simple initializations in a switch to
+initializations from a scalar array.  This flag is enabled by default
+at \fB\-O2\fR and higher.
+.IP "\fB\-ftree\-dce\fR" 4
+.IX Item "-ftree-dce"
+Perform dead code elimination (\s-1DCE\s0) on trees.  This flag is enabled by
+default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-builtin\-call\-dce\fR" 4
+.IX Item "-ftree-builtin-call-dce"
+Perform conditional dead code elimination (\s-1DCE\s0) for calls to builtin functions
+that may set \f(CW\*(C`errno\*(C'\fR but are otherwise side-effect free.  This flag is
+enabled by default at \fB\-O2\fR and higher if \fB\-Os\fR is not also
+specified.
+.IP "\fB\-ftree\-dominator\-opts\fR" 4
+.IX Item "-ftree-dominator-opts"
+Perform a variety of simple scalar cleanups (constant/copy
+propagation, redundancy elimination, range propagation and expression
+simplification) based on a dominator tree traversal.  This also
+performs jump threading (to reduce jumps to jumps). This flag is
+enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-dse\fR" 4
+.IX Item "-ftree-dse"
+Perform dead store elimination (\s-1DSE\s0) on trees.  A dead store is a store into
+a memory location which will later be overwritten by another store without
+any intervening loads.  In this case the earlier store can be deleted.  This
+flag is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-ch\fR" 4
+.IX Item "-ftree-ch"
+Perform loop header copying on trees.  This is beneficial since it increases
+effectiveness of code motion optimizations.  It also saves one jump.  This flag
+is enabled by default at \fB\-O\fR and higher.  It is not enabled
+for \fB\-Os\fR, since it usually increases code size.
+.IP "\fB\-ftree\-loop\-optimize\fR" 4
+.IX Item "-ftree-loop-optimize"
+Perform loop optimizations on trees.  This flag is enabled by default
+at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-loop\-linear\fR" 4
+.IX Item "-ftree-loop-linear"
+Perform loop interchange transformations on tree.  Same as
+\&\fB\-floop\-interchange\fR.  To use this code transformation, \s-1GCC\s0 has
+to be configured with \fB\-\-with\-ppl\fR and \fB\-\-with\-cloog\fR to
+enable the Graphite loop transformation infrastructure.
+.IP "\fB\-floop\-interchange\fR" 4
+.IX Item "-floop-interchange"
+Perform loop interchange transformations on loops.  Interchanging two
+nested loops switches the inner and outer loops.  For example, given a
+loop like:
+.Sp
+.Vb 5
+\&        DO J = 1, M
+\&          DO I = 1, N
+\&            A(J, I) = A(J, I) * C
+\&          ENDDO
+\&        ENDDO
+.Ve
+.Sp
+loop interchange will transform the loop as if the user had written:
+.Sp
+.Vb 5
+\&        DO I = 1, N
+\&          DO J = 1, M
+\&            A(J, I) = A(J, I) * C
+\&          ENDDO
+\&        ENDDO
+.Ve
+.Sp
+which can be beneficial when \f(CW\*(C`N\*(C'\fR is larger than the caches,
+because in Fortran, the elements of an array are stored in memory
+contiguously by column, and the original loop iterates over rows,
+potentially creating at each access a cache miss.  This optimization
+applies to all the languages supported by \s-1GCC\s0 and is not limited to
+Fortran.  To use this code transformation, \s-1GCC\s0 has to be configured
+with \fB\-\-with\-ppl\fR and \fB\-\-with\-cloog\fR to enable the
+Graphite loop transformation infrastructure.
+.IP "\fB\-floop\-strip\-mine\fR" 4
+.IX Item "-floop-strip-mine"
+Perform loop strip mining transformations on loops.  Strip mining
+splits a loop into two nested loops.  The outer loop has strides
+equal to the strip size and the inner loop has strides of the
+original loop within a strip.  The strip length can be changed
+using the \fBloop-block-tile-size\fR parameter.  For example,
+given a loop like:
+.Sp
+.Vb 3
+\&        DO I = 1, N
+\&          A(I) = A(I) + C
+\&        ENDDO
+.Ve
+.Sp
+loop strip mining will transform the loop as if the user had written:
+.Sp
+.Vb 5
+\&        DO II = 1, N, 51
+\&          DO I = II, min (II + 50, N)
+\&            A(I) = A(I) + C
+\&          ENDDO
+\&        ENDDO
+.Ve
+.Sp
+This optimization applies to all the languages supported by \s-1GCC\s0 and is
+not limited to Fortran.  To use this code transformation, \s-1GCC\s0 has to
+be configured with \fB\-\-with\-ppl\fR and \fB\-\-with\-cloog\fR to
+enable the Graphite loop transformation infrastructure.
+.IP "\fB\-floop\-block\fR" 4
+.IX Item "-floop-block"
+Perform loop blocking transformations on loops.  Blocking strip mines
+each loop in the loop nest such that the memory accesses of the
+element loops fit inside caches.  The strip length can be changed
+using the \fBloop-block-tile-size\fR parameter.  For example, given
+a loop like:
+.Sp
+.Vb 5
+\&        DO I = 1, N
+\&          DO J = 1, M
+\&            A(J, I) = B(I) + C(J)
+\&          ENDDO
+\&        ENDDO
+.Ve
+.Sp
+loop blocking will transform the loop as if the user had written:
+.Sp
+.Vb 9
+\&        DO II = 1, N, 51
+\&          DO JJ = 1, M, 51
+\&            DO I = II, min (II + 50, N)
+\&              DO J = JJ, min (JJ + 50, M)
+\&                A(J, I) = B(I) + C(J)
+\&              ENDDO
+\&            ENDDO
+\&          ENDDO
+\&        ENDDO
+.Ve
+.Sp
+which can be beneficial when \f(CW\*(C`M\*(C'\fR is larger than the caches,
+because the innermost loop will iterate over a smaller amount of data
+that can be kept in the caches.  This optimization applies to all the
+languages supported by \s-1GCC\s0 and is not limited to Fortran.  To use this
+code transformation, \s-1GCC\s0 has to be configured with \fB\-\-with\-ppl\fR
+and \fB\-\-with\-cloog\fR to enable the Graphite loop transformation
+infrastructure.
+.IP "\fB\-fgraphite\-identity\fR" 4
+.IX Item "-fgraphite-identity"
+Enable the identity transformation for graphite.  For every SCoP we generate
+the polyhedral representation and transform it back to gimple.  Using
+\&\fB\-fgraphite\-identity\fR we can check the costs or benefits of the
+\&\s-1GIMPLE\s0 \-> \s-1GRAPHITE\s0 \-> \s-1GIMPLE\s0 transformation.  Some minimal optimizations
+are also performed by the code generator CLooG, like index splitting and
+dead code elimination in loops.
+.IP "\fB\-floop\-flatten\fR" 4
+.IX Item "-floop-flatten"
+Removes the loop nesting structure: transforms the loop nest into a
+single loop.  This transformation can be useful to vectorize all the
+levels of the loop nest.
+.IP "\fB\-floop\-parallelize\-all\fR" 4
+.IX Item "-floop-parallelize-all"
+Use the Graphite data dependence analysis to identify loops that can
+be parallelized.  Parallelize all the loops that can be analyzed to
+not contain loop carried dependences without checking that it is
+profitable to parallelize the loops.
+.IP "\fB\-fcheck\-data\-deps\fR" 4
+.IX Item "-fcheck-data-deps"
+Compare the results of several data dependence analyzers.  This option
+is used for debugging the data dependence analyzers.
+.IP "\fB\-ftree\-loop\-if\-convert\fR" 4
+.IX Item "-ftree-loop-if-convert"
+Attempt to transform conditional jumps in the innermost loops to
+branch-less equivalents.  The intent is to remove control-flow from
+the innermost loops in order to improve the ability of the
+vectorization pass to handle these loops.  This is enabled by default
+if vectorization is enabled.
+.IP "\fB\-ftree\-loop\-if\-convert\-stores\fR" 4
+.IX Item "-ftree-loop-if-convert-stores"
+Attempt to also if-convert conditional jumps containing memory writes.
+This transformation can be unsafe for multi-threaded programs as it
+transforms conditional memory writes into unconditional memory writes.
+For example,
+.Sp
+.Vb 3
+\&        for (i = 0; i < N; i++)
+\&          if (cond)
+\&            A[i] = expr;
+.Ve
+.Sp
+would be transformed to
+.Sp
+.Vb 2
+\&        for (i = 0; i < N; i++)
+\&          A[i] = cond ? expr : A[i];
+.Ve
+.Sp
+potentially producing data races.
+.IP "\fB\-ftree\-loop\-distribution\fR" 4
+.IX Item "-ftree-loop-distribution"
+Perform loop distribution.  This flag can improve cache performance on
+big loop bodies and allow further loop optimizations, like
+parallelization or vectorization, to take place.  For example, the loop
+.Sp
+.Vb 4
+\&        DO I = 1, N
+\&          A(I) = B(I) + C
+\&          D(I) = E(I) * F
+\&        ENDDO
+.Ve
+.Sp
+is transformed to
+.Sp
+.Vb 6
+\&        DO I = 1, N
+\&           A(I) = B(I) + C
+\&        ENDDO
+\&        DO I = 1, N
+\&           D(I) = E(I) * F
+\&        ENDDO
+.Ve
+.IP "\fB\-ftree\-loop\-distribute\-patterns\fR" 4
+.IX Item "-ftree-loop-distribute-patterns"
+Perform loop distribution of patterns that can be code generated with
+calls to a library.  This flag is enabled by default at \fB\-O3\fR.
+.Sp
+This pass distributes the initialization loops and generates a call to
+memset zero.  For example, the loop
+.Sp
+.Vb 4
+\&        DO I = 1, N
+\&          A(I) = 0
+\&          B(I) = A(I) + I
+\&        ENDDO
+.Ve
+.Sp
+is transformed to
+.Sp
+.Vb 6
+\&        DO I = 1, N
+\&           A(I) = 0
+\&        ENDDO
+\&        DO I = 1, N
+\&           B(I) = A(I) + I
+\&        ENDDO
+.Ve
+.Sp
+and the initialization loop is transformed into a call to memset zero.
+.IP "\fB\-ftree\-loop\-im\fR" 4
+.IX Item "-ftree-loop-im"
+Perform loop invariant motion on trees.  This pass moves only invariants that
+would be hard to handle at \s-1RTL\s0 level (function calls, operations that expand to
+nontrivial sequences of insns).  With \fB\-funswitch\-loops\fR it also moves
+operands of conditions that are invariant out of the loop, so that we can use
+just trivial invariantness analysis in loop unswitching.  The pass also includes
+store motion.
+.IP "\fB\-ftree\-loop\-ivcanon\fR" 4
+.IX Item "-ftree-loop-ivcanon"
+Create a canonical counter for number of iterations in the loop for that
+determining number of iterations requires complicated analysis.  Later
+optimizations then may determine the number easily.  Useful especially
+in connection with unrolling.
+.IP "\fB\-fivopts\fR" 4
+.IX Item "-fivopts"
+Perform induction variable optimizations (strength reduction, induction
+variable merging and induction variable elimination) on trees.
+.IP "\fB\-ftree\-parallelize\-loops=n\fR" 4
+.IX Item "-ftree-parallelize-loops=n"
+Parallelize loops, i.e., split their iteration space to run in n threads.
+This is only possible for loops whose iterations are independent
+and can be arbitrarily reordered.  The optimization is only
+profitable on multiprocessor machines, for loops that are CPU-intensive,
+rather than constrained e.g. by memory bandwidth.  This option
+implies \fB\-pthread\fR, and thus is only supported on targets
+that have support for \fB\-pthread\fR.
+.IP "\fB\-ftree\-pta\fR" 4
+.IX Item "-ftree-pta"
+Perform function-local points-to analysis on trees.  This flag is
+enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-sra\fR" 4
+.IX Item "-ftree-sra"
+Perform scalar replacement of aggregates.  This pass replaces structure
+references with scalars to prevent committing structures to memory too
+early.  This flag is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-copyrename\fR" 4
+.IX Item "-ftree-copyrename"
+Perform copy renaming on trees.  This pass attempts to rename compiler
+temporaries to other variables at copy locations, usually resulting in
+variable names which more closely resemble the original variables.  This flag
+is enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-ter\fR" 4
+.IX Item "-ftree-ter"
+Perform temporary expression replacement during the \s-1SSA\-\s0>normal phase.  Single
+use/single def temporaries are replaced at their use location with their
+defining expression.  This results in non-GIMPLE code, but gives the expanders
+much more complex trees to work on resulting in better \s-1RTL\s0 generation.  This is
+enabled by default at \fB\-O\fR and higher.
+.IP "\fB\-ftree\-vectorize\fR" 4
+.IX Item "-ftree-vectorize"
+Perform loop vectorization on trees. This flag is enabled by default at
+\&\fB\-O3\fR.
+.IP "\fB\-ftree\-slp\-vectorize\fR" 4
+.IX Item "-ftree-slp-vectorize"
+Perform basic block vectorization on trees. This flag is enabled by default at
+\&\fB\-O3\fR and when \fB\-ftree\-vectorize\fR is enabled.
+.IP "\fB\-ftree\-vect\-loop\-version\fR" 4
+.IX Item "-ftree-vect-loop-version"
+Perform loop versioning when doing loop vectorization on trees.  When a loop
+appears to be vectorizable except that data alignment or data dependence cannot
+be determined at compile time then vectorized and non-vectorized versions of
+the loop are generated along with runtime checks for alignment or dependence
+to control which version is executed.  This option is enabled by default
+except at level \fB\-Os\fR where it is disabled.
+.IP "\fB\-fvect\-cost\-model\fR" 4
+.IX Item "-fvect-cost-model"
+Enable cost model for vectorization.
+.IP "\fB\-ftree\-vrp\fR" 4
+.IX Item "-ftree-vrp"
+Perform Value Range Propagation on trees.  This is similar to the
+constant propagation pass, but instead of values, ranges of values are
+propagated.  This allows the optimizers to remove unnecessary range
+checks like array bound checks and null pointer checks.  This is
+enabled by default at \fB\-O2\fR and higher.  Null pointer check
+elimination is only done if \fB\-fdelete\-null\-pointer\-checks\fR is
+enabled.
+.IP "\fB\-ftracer\fR" 4
+.IX Item "-ftracer"
+Perform tail duplication to enlarge superblock size.  This transformation
+simplifies the control flow of the function allowing other optimizations to do
+better job.
+.IP "\fB\-funroll\-loops\fR" 4
+.IX Item "-funroll-loops"
+Unroll loops whose number of iterations can be determined at compile
+time or upon entry to the loop.  \fB\-funroll\-loops\fR implies
+\&\fB\-frerun\-cse\-after\-loop\fR.  This option makes code larger,
+and may or may not make it run faster.
+.IP "\fB\-funroll\-all\-loops\fR" 4
+.IX Item "-funroll-all-loops"
+Unroll all loops, even if their number of iterations is uncertain when
+the loop is entered.  This usually makes programs run more slowly.
+\&\fB\-funroll\-all\-loops\fR implies the same options as
+\&\fB\-funroll\-loops\fR,
+.IP "\fB\-fsplit\-ivs\-in\-unroller\fR" 4
+.IX Item "-fsplit-ivs-in-unroller"
+Enables expressing of values of induction variables in later iterations
+of the unrolled loop using the value in the first iteration.  This breaks
+long dependency chains, thus improving efficiency of the scheduling passes.
+.Sp
+Combination of \fB\-fweb\fR and \s-1CSE\s0 is often sufficient to obtain the
+same effect.  However in cases the loop body is more complicated than
+a single basic block, this is not reliable.  It also does not work at all
+on some of the architectures due to restrictions in the \s-1CSE\s0 pass.
+.Sp
+This optimization is enabled by default.
+.IP "\fB\-fvariable\-expansion\-in\-unroller\fR" 4
+.IX Item "-fvariable-expansion-in-unroller"
+With this option, the compiler will create multiple copies of some
+local variables when unrolling a loop which can result in superior code.
+.IP "\fB\-fpartial\-inlining\fR" 4
+.IX Item "-fpartial-inlining"
+Inline parts of functions.  This option has any effect only
+when inlining itself is turned on by the \fB\-finline\-functions\fR
+or \fB\-finline\-small\-functions\fR options.
+.Sp
+Enabled at level \fB\-O2\fR.
+.IP "\fB\-fpredictive\-commoning\fR" 4
+.IX Item "-fpredictive-commoning"
+Perform predictive commoning optimization, i.e., reusing computations
+(especially memory loads and stores) performed in previous
+iterations of loops.
+.Sp
+This option is enabled at level \fB\-O3\fR.
+.IP "\fB\-fprefetch\-loop\-arrays\fR" 4
+.IX Item "-fprefetch-loop-arrays"
+If supported by the target machine, generate instructions to prefetch
+memory to improve the performance of loops that access large arrays.
+.Sp
+This option may generate better or worse code; results are highly
+dependent on the structure of loops within the source code.
+.Sp
+Disabled at level \fB\-Os\fR.
+.IP "\fB\-fno\-peephole\fR" 4
+.IX Item "-fno-peephole"
+.PD 0
+.IP "\fB\-fno\-peephole2\fR" 4
+.IX Item "-fno-peephole2"
+.PD
+Disable any machine-specific peephole optimizations.  The difference
+between \fB\-fno\-peephole\fR and \fB\-fno\-peephole2\fR is in how they
+are implemented in the compiler; some targets use one, some use the
+other, a few use both.
+.Sp
+\&\fB\-fpeephole\fR is enabled by default.
+\&\fB\-fpeephole2\fR enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fno\-guess\-branch\-probability\fR" 4
+.IX Item "-fno-guess-branch-probability"
+Do not guess branch probabilities using heuristics.
+.Sp
+\&\s-1GCC\s0 will use heuristics to guess branch probabilities if they are
+not provided by profiling feedback (\fB\-fprofile\-arcs\fR).  These
+heuristics are based on the control flow graph.  If some branch probabilities
+are specified by \fB_\|_builtin_expect\fR, then the heuristics will be
+used to guess branch probabilities for the rest of the control flow graph,
+taking the \fB_\|_builtin_expect\fR info into account.  The interactions
+between the heuristics and \fB_\|_builtin_expect\fR can be complex, and in
+some cases, it may be useful to disable the heuristics so that the effects
+of \fB_\|_builtin_expect\fR are easier to understand.
+.Sp
+The default is \fB\-fguess\-branch\-probability\fR at levels
+\&\fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-freorder\-blocks\fR" 4
+.IX Item "-freorder-blocks"
+Reorder basic blocks in the compiled function in order to reduce number of
+taken branches and improve code locality.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-freorder\-blocks\-and\-partition\fR" 4
+.IX Item "-freorder-blocks-and-partition"
+In addition to reordering basic blocks in the compiled function, in order
+to reduce number of taken branches, partitions hot and cold basic blocks
+into separate sections of the assembly and .o files, to improve
+paging and cache locality performance.
+.Sp
+This optimization is automatically turned off in the presence of
+exception handling, for linkonce sections, for functions with a user-defined
+section attribute and on any architecture that does not support named
+sections.
+.IP "\fB\-freorder\-functions\fR" 4
+.IX Item "-freorder-functions"
+Reorder functions in the object file in order to
+improve code locality.  This is implemented by using special
+subsections \f(CW\*(C`.text.hot\*(C'\fR for most frequently executed functions and
+\&\f(CW\*(C`.text.unlikely\*(C'\fR for unlikely executed functions.  Reordering is done by
+the linker so object file format must support named sections and linker must
+place them in a reasonable way.
+.Sp
+Also profile feedback must be available in to make this option effective.  See
+\&\fB\-fprofile\-arcs\fR for details.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fstrict\-aliasing\fR" 4
+.IX Item "-fstrict-aliasing"
+Allow the compiler to assume the strictest aliasing rules applicable to
+the language being compiled.  For C (and \*(C+), this activates
+optimizations based on the type of expressions.  In particular, an
+object of one type is assumed never to reside at the same address as an
+object of a different type, unless the types are almost the same.  For
+example, an \f(CW\*(C`unsigned int\*(C'\fR can alias an \f(CW\*(C`int\*(C'\fR, but not a
+\&\f(CW\*(C`void*\*(C'\fR or a \f(CW\*(C`double\*(C'\fR.  A character type may alias any other
+type.
+.Sp
+Pay special attention to code like this:
+.Sp
+.Vb 4
+\&        union a_union {
+\&          int i;
+\&          double d;
+\&        };
+\&        
+\&        int f() {
+\&          union a_union t;
+\&          t.d = 3.0;
+\&          return t.i;
+\&        }
+.Ve
+.Sp
+The practice of reading from a different union member than the one most
+recently written to (called \*(L"type-punning\*(R") is common.  Even with
+\&\fB\-fstrict\-aliasing\fR, type-punning is allowed, provided the memory
+is accessed through the union type.  So, the code above will work as
+expected.    However, this code might not:
+.Sp
+.Vb 7
+\&        int f() {
+\&          union a_union t;
+\&          int* ip;
+\&          t.d = 3.0;
+\&          ip = &t.i;
+\&          return *ip;
+\&        }
+.Ve
+.Sp
+Similarly, access by taking the address, casting the resulting pointer
+and dereferencing the result has undefined behavior, even if the cast
+uses a union type, e.g.:
+.Sp
+.Vb 4
+\&        int f() {
+\&          double d = 3.0;
+\&          return ((union a_union *) &d)\->i;
+\&        }
+.Ve
+.Sp
+The \fB\-fstrict\-aliasing\fR option is enabled at levels
+\&\fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fstrict\-overflow\fR" 4
+.IX Item "-fstrict-overflow"
+Allow the compiler to assume strict signed overflow rules, depending
+on the language being compiled.  For C (and \*(C+) this means that
+overflow when doing arithmetic with signed numbers is undefined, which
+means that the compiler may assume that it will not happen.  This
+permits various optimizations.  For example, the compiler will assume
+that an expression like \f(CW\*(C`i + 10 > i\*(C'\fR will always be true for
+signed \f(CW\*(C`i\*(C'\fR.  This assumption is only valid if signed overflow is
+undefined, as the expression is false if \f(CW\*(C`i + 10\*(C'\fR overflows when
+using twos complement arithmetic.  When this option is in effect any
+attempt to determine whether an operation on signed numbers will
+overflow must be written carefully to not actually involve overflow.
+.Sp
+This option also allows the compiler to assume strict pointer
+semantics: given a pointer to an object, if adding an offset to that
+pointer does not produce a pointer to the same object, the addition is
+undefined.  This permits the compiler to conclude that \f(CW\*(C`p + u >
+p\*(C'\fR is always true for a pointer \f(CW\*(C`p\*(C'\fR and unsigned integer
+\&\f(CW\*(C`u\*(C'\fR.  This assumption is only valid because pointer wraparound is
+undefined, as the expression is false if \f(CW\*(C`p + u\*(C'\fR overflows using
+twos complement arithmetic.
+.Sp
+See also the \fB\-fwrapv\fR option.  Using \fB\-fwrapv\fR means
+that integer signed overflow is fully defined: it wraps.  When
+\&\fB\-fwrapv\fR is used, there is no difference between
+\&\fB\-fstrict\-overflow\fR and \fB\-fno\-strict\-overflow\fR for
+integers.  With \fB\-fwrapv\fR certain types of overflow are
+permitted.  For example, if the compiler gets an overflow when doing
+arithmetic on constants, the overflowed value can still be used with
+\&\fB\-fwrapv\fR, but not otherwise.
+.Sp
+The \fB\-fstrict\-overflow\fR option is enabled at levels
+\&\fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-falign\-functions\fR" 4
+.IX Item "-falign-functions"
+.PD 0
+.IP "\fB\-falign\-functions=\fR\fIn\fR" 4
+.IX Item "-falign-functions=n"
+.PD
+Align the start of functions to the next power-of-two greater than
+\&\fIn\fR, skipping up to \fIn\fR bytes.  For instance,
+\&\fB\-falign\-functions=32\fR aligns functions to the next 32\-byte
+boundary, but \fB\-falign\-functions=24\fR would align to the next
+32\-byte boundary only if this can be done by skipping 23 bytes or less.
+.Sp
+\&\fB\-fno\-align\-functions\fR and \fB\-falign\-functions=1\fR are
+equivalent and mean that functions will not be aligned.
+.Sp
+Some assemblers only support this flag when \fIn\fR is a power of two;
+in that case, it is rounded up.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-falign\-labels\fR" 4
+.IX Item "-falign-labels"
+.PD 0
+.IP "\fB\-falign\-labels=\fR\fIn\fR" 4
+.IX Item "-falign-labels=n"
+.PD
+Align all branch targets to a power-of-two boundary, skipping up to
+\&\fIn\fR bytes like \fB\-falign\-functions\fR.  This option can easily
+make code slower, because it must insert dummy operations for when the
+branch target is reached in the usual flow of the code.
+.Sp
+\&\fB\-fno\-align\-labels\fR and \fB\-falign\-labels=1\fR are
+equivalent and mean that labels will not be aligned.
+.Sp
+If \fB\-falign\-loops\fR or \fB\-falign\-jumps\fR are applicable and
+are greater than this value, then their values are used instead.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default
+which is very likely to be \fB1\fR, meaning no alignment.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-falign\-loops\fR" 4
+.IX Item "-falign-loops"
+.PD 0
+.IP "\fB\-falign\-loops=\fR\fIn\fR" 4
+.IX Item "-falign-loops=n"
+.PD
+Align loops to a power-of-two boundary, skipping up to \fIn\fR bytes
+like \fB\-falign\-functions\fR.  The hope is that the loop will be
+executed many times, which will make up for any execution of the dummy
+operations.
+.Sp
+\&\fB\-fno\-align\-loops\fR and \fB\-falign\-loops=1\fR are
+equivalent and mean that loops will not be aligned.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-falign\-jumps\fR" 4
+.IX Item "-falign-jumps"
+.PD 0
+.IP "\fB\-falign\-jumps=\fR\fIn\fR" 4
+.IX Item "-falign-jumps=n"
+.PD
+Align branch targets to a power-of-two boundary, for branch targets
+where the targets can only be reached by jumping, skipping up to \fIn\fR
+bytes like \fB\-falign\-functions\fR.  In this case, no dummy operations
+need be executed.
+.Sp
+\&\fB\-fno\-align\-jumps\fR and \fB\-falign\-jumps=1\fR are
+equivalent and mean that loops will not be aligned.
+.Sp
+If \fIn\fR is not specified or is zero, use a machine-dependent default.
+.Sp
+Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
+.IP "\fB\-funit\-at\-a\-time\fR" 4
+.IX Item "-funit-at-a-time"
+This option is left for compatibility reasons. \fB\-funit\-at\-a\-time\fR
+has no effect, while \fB\-fno\-unit\-at\-a\-time\fR implies
+\&\fB\-fno\-toplevel\-reorder\fR and \fB\-fno\-section\-anchors\fR.
+.Sp
+Enabled by default.
+.IP "\fB\-fno\-toplevel\-reorder\fR" 4
+.IX Item "-fno-toplevel-reorder"
+Do not reorder top-level functions, variables, and \f(CW\*(C`asm\*(C'\fR
+statements.  Output them in the same order that they appear in the
+input file.  When this option is used, unreferenced static variables
+will not be removed.  This option is intended to support existing code
+which relies on a particular ordering.  For new code, it is better to
+use attributes.
+.Sp
+Enabled at level \fB\-O0\fR.  When disabled explicitly, it also imply
+\&\fB\-fno\-section\-anchors\fR that is otherwise enabled at \fB\-O0\fR on some
+targets.
+.IP "\fB\-fweb\fR" 4
+.IX Item "-fweb"
+Constructs webs as commonly used for register allocation purposes and assign
+each web individual pseudo register.  This allows the register allocation pass
+to operate on pseudos directly, but also strengthens several other optimization
+passes, such as \s-1CSE\s0, loop optimizer and trivial dead code remover.  It can,
+however, make debugging impossible, since variables will no longer stay in a
+\&\*(L"home register\*(R".
+.Sp
+Enabled by default with \fB\-funroll\-loops\fR.
+.IP "\fB\-fwhole\-program\fR" 4
+.IX Item "-fwhole-program"
+Assume that the current compilation unit represents the whole program being
+compiled.  All public functions and variables with the exception of \f(CW\*(C`main\*(C'\fR
+and those merged by attribute \f(CW\*(C`externally_visible\*(C'\fR become static functions
+and in effect are optimized more aggressively by interprocedural optimizers. If \fBgold\fR is used as the linker plugin, \f(CW\*(C`externally_visible\*(C'\fR attributes are automatically added to functions (not variable yet due to a current \fBgold\fR issue) that are accessed outside of \s-1LTO\s0 objects according to resolution file produced by \fBgold\fR.  For other linkers that cannot generate resolution file, explicit \f(CW\*(C`externally_visible\*(C'\fR attributes are still necessary.
+While this option is equivalent to proper use of the \f(CW\*(C`static\*(C'\fR keyword for
+programs consisting of a single file, in combination with option
+\&\fB\-flto\fR this flag can be used to
+compile many smaller scale programs since the functions and variables become
+local for the whole combined compilation unit, not for the single source file
+itself.
+.Sp
+This option implies \fB\-fwhole\-file\fR for Fortran programs.
+.IP "\fB\-flto[=\fR\fIn\fR\fB]\fR" 4
+.IX Item "-flto[=n]"
+This option runs the standard link-time optimizer.  When invoked
+with source code, it generates \s-1GIMPLE\s0 (one of \s-1GCC\s0's internal
+representations) and writes it to special \s-1ELF\s0 sections in the object
+file.  When the object files are linked together, all the function
+bodies are read from these \s-1ELF\s0 sections and instantiated as if they
+had been part of the same translation unit.
+.Sp
+To use the link-time optimizer, \fB\-flto\fR needs to be specified at
+compile time and during the final link.  For example:
+.Sp
+.Vb 3
+\&        gcc \-c \-O2 \-flto foo.c
+\&        gcc \-c \-O2 \-flto bar.c
+\&        gcc \-o myprog \-flto \-O2 foo.o bar.o
+.Ve
+.Sp
+The first two invocations to \s-1GCC\s0 save a bytecode representation
+of \s-1GIMPLE\s0 into special \s-1ELF\s0 sections inside \fIfoo.o\fR and
+\&\fIbar.o\fR.  The final invocation reads the \s-1GIMPLE\s0 bytecode from
+\&\fIfoo.o\fR and \fIbar.o\fR, merges the two files into a single
+internal image, and compiles the result as usual.  Since both
+\&\fIfoo.o\fR and \fIbar.o\fR are merged into a single image, this
+causes all the interprocedural analyses and optimizations in \s-1GCC\s0 to
+work across the two files as if they were a single one.  This means,
+for example, that the inliner is able to inline functions in
+\&\fIbar.o\fR into functions in \fIfoo.o\fR and vice-versa.
+.Sp
+Another (simpler) way to enable link-time optimization is:
+.Sp
+.Vb 1
+\&        gcc \-o myprog \-flto \-O2 foo.c bar.c
+.Ve
+.Sp
+The above generates bytecode for \fIfoo.c\fR and \fIbar.c\fR,
+merges them together into a single \s-1GIMPLE\s0 representation and optimizes
+them as usual to produce \fImyprog\fR.
+.Sp
+The only important thing to keep in mind is that to enable link-time
+optimizations the \fB\-flto\fR flag needs to be passed to both the
+compile and the link commands.
+.Sp
+To make whole program optimization effective, it is necessary to make
+certain whole program assumptions.  The compiler needs to know
+what functions and variables can be accessed by libraries and runtime
+outside of the link-time optimized unit.  When supported by the linker,
+the linker plugin (see \fB\-fuse\-linker\-plugin\fR) passes information
+to the compiler about used and externally visible symbols.  When
+the linker plugin is not available, \fB\-fwhole\-program\fR should be
+used to allow the compiler to make these assumptions, which leads
+to more aggressive optimization decisions.
+.Sp
+Note that when a file is compiled with \fB\-flto\fR, the generated
+object file is larger than a regular object file because it 
+contains \s-1GIMPLE\s0 bytecodes and the usual final code.  This means that
+object files with \s-1LTO\s0 information can be linked as normal object
+files; if \fB\-flto\fR is not passed to the linker, no
+interprocedural optimizations are applied.
+.Sp
+Additionally, the optimization flags used to compile individual files
+are not necessarily related to those used at link time.  For instance,
+.Sp
+.Vb 3
+\&        gcc \-c \-O0 \-flto foo.c
+\&        gcc \-c \-O0 \-flto bar.c
+\&        gcc \-o myprog \-flto \-O3 foo.o bar.o
+.Ve
+.Sp
+This produces individual object files with unoptimized assembler
+code, but the resulting binary \fImyprog\fR is optimized at
+\&\fB\-O3\fR.  If, instead, the final binary is generated without
+\&\fB\-flto\fR, then \fImyprog\fR is not optimized.
+.Sp
+When producing the final binary with \fB\-flto\fR, \s-1GCC\s0 only
+applies link-time optimizations to those files that contain bytecode.
+Therefore, you can mix and match object files and libraries with
+\&\s-1GIMPLE\s0 bytecodes and final object code.  \s-1GCC\s0 automatically selects
+which files to optimize in \s-1LTO\s0 mode and which files to link without
+further processing.
+.Sp
+There are some code generation flags that \s-1GCC\s0 preserves when
+generating bytecodes, as they need to be used during the final link
+stage.  Currently, the following options are saved into the \s-1GIMPLE\s0
+bytecode files: \fB\-fPIC\fR, \fB\-fcommon\fR and all the
+\&\fB\-m\fR target flags.
+.Sp
+At link time, these options are read in and reapplied.  Note that the
+current implementation makes no attempt to recognize conflicting
+values for these options.  If different files have conflicting option
+values (e.g., one file is compiled with \fB\-fPIC\fR and another
+isn't), the compiler simply uses the last value read from the
+bytecode files.  It is recommended, then, that you compile all the files
+participating in the same link with the same options.
+.Sp
+If \s-1LTO\s0 encounters objects with C linkage declared with incompatible
+types in separate translation units to be linked together (undefined
+behavior according to \s-1ISO\s0 C99 6.2.7), a non-fatal diagnostic may be
+issued.  The behavior is still undefined at runtime.
+.Sp
+Another feature of \s-1LTO\s0 is that it is possible to apply interprocedural
+optimizations on files written in different languages.  This requires
+support in the language front end.  Currently, the C, \*(C+ and
+Fortran front ends are capable of emitting \s-1GIMPLE\s0 bytecodes, so
+something like this should work:
+.Sp
+.Vb 4
+\&        gcc \-c \-flto foo.c
+\&        g++ \-c \-flto bar.cc
+\&        gfortran \-c \-flto baz.f90
+\&        g++ \-o myprog \-flto \-O3 foo.o bar.o baz.o \-lgfortran
+.Ve
+.Sp
+Notice that the final link is done with \fBg++\fR to get the \*(C+
+runtime libraries and \fB\-lgfortran\fR is added to get the Fortran
+runtime libraries.  In general, when mixing languages in \s-1LTO\s0 mode, you
+should use the same link command options as when mixing languages in a
+regular (non-LTO) compilation; all you need to add is \fB\-flto\fR to
+all the compile and link commands.
+.Sp
+If object files containing \s-1GIMPLE\s0 bytecode are stored in a library archive, say
+\&\fIlibfoo.a\fR, it is possible to extract and use them in an \s-1LTO\s0 link if you
+are using a linker with plugin support.  To enable this feature, use
+the flag \fB\-fuse\-linker\-plugin\fR at link time:
+.Sp
+.Vb 1
+\&        gcc \-o myprog \-O2 \-flto \-fuse\-linker\-plugin a.o b.o \-lfoo
+.Ve
+.Sp
+With the linker plugin enabled, the linker extracts the needed
+\&\s-1GIMPLE\s0 files from \fIlibfoo.a\fR and passes them on to the running \s-1GCC\s0
+to make them part of the aggregated \s-1GIMPLE\s0 image to be optimized.
+.Sp
+If you are not using a linker with plugin support and/or do not
+enable the linker plugin, then the objects inside \fIlibfoo.a\fR
+are extracted and linked as usual, but they do not participate
+in the \s-1LTO\s0 optimization process.
+.Sp
+Link-time optimizations do not require the presence of the whole program to
+operate.  If the program does not require any symbols to be exported, it is
+possible to combine \fB\-flto\fR and \fB\-fwhole\-program\fR to allow
+the interprocedural optimizers to use more aggressive assumptions which may
+lead to improved optimization opportunities. 
+Use of \fB\-fwhole\-program\fR is not needed when linker plugin is
+active (see \fB\-fuse\-linker\-plugin\fR).
+.Sp
+The current implementation of \s-1LTO\s0 makes no
+attempt to generate bytecode that is portable between different
+types of hosts.  The bytecode files are versioned and there is a
+strict version check, so bytecode files generated in one version of
+\&\s-1GCC\s0 will not work with an older/newer version of \s-1GCC\s0.
+.Sp
+Link-time optimization does not work well with generation of debugging
+information.  Combining \fB\-flto\fR with
+\&\fB\-g\fR is currently experimental and expected to produce wrong
+results.
+.Sp
+If you specify the optional \fIn\fR, the optimization and code
+generation done at link time is executed in parallel using \fIn\fR
+parallel jobs by utilizing an installed \fBmake\fR program.  The
+environment variable \fB\s-1MAKE\s0\fR may be used to override the program
+used.  The default value for \fIn\fR is 1.
+.Sp
+You can also specify \fB\-flto=jobserver\fR to use \s-1GNU\s0 make's 
+job server mode to determine the number of parallel jobs. This 
+is useful when the Makefile calling \s-1GCC\s0 is already executing in parallel.
+You must prepend a \fB+\fR to the command recipe in the parent Makefile
+for this to work.  This option likely only works if \fB\s-1MAKE\s0\fR is
+\&\s-1GNU\s0 make.
+.Sp
+This option is disabled by default.
+.IP "\fB\-flto\-partition=\fR\fIalg\fR" 4
+.IX Item "-flto-partition=alg"
+Specify the partitioning algorithm used by the link-time optimizer.
+The value is either \f(CW\*(C`1to1\*(C'\fR to specify a partitioning mirroring
+the original source files or \f(CW\*(C`balanced\*(C'\fR to specify partitioning
+into equally sized chunks (whenever possible).  Specifying \f(CW\*(C`none\*(C'\fR
+as an algorithm disables partitioning and streaming completely. The
+default value is \f(CW\*(C`balanced\*(C'\fR.
+.IP "\fB\-flto\-compression\-level=\fR\fIn\fR" 4
+.IX Item "-flto-compression-level=n"
+This option specifies the level of compression used for intermediate
+language written to \s-1LTO\s0 object files, and is only meaningful in
+conjunction with \s-1LTO\s0 mode (\fB\-flto\fR).  Valid
+values are 0 (no compression) to 9 (maximum compression).  Values
+outside this range are clamped to either 0 or 9.  If the option is not
+given, a default balanced compression setting is used.
+.IP "\fB\-flto\-report\fR" 4
+.IX Item "-flto-report"
+Prints a report with internal details on the workings of the link-time
+optimizer.  The contents of this report vary from version to version.
+It is meant to be useful to \s-1GCC\s0 developers when processing object
+files in \s-1LTO\s0 mode (via \fB\-flto\fR).
+.Sp
+Disabled by default.
+.IP "\fB\-fuse\-linker\-plugin\fR" 4
+.IX Item "-fuse-linker-plugin"
+Enables the use of a linker plugin during link-time optimization.  This
+option relies on the linker plugin support in linker that is available in gold
+or in \s-1GNU\s0 ld 2.21 or newer.
+.Sp
+This option enables the extraction of object files with \s-1GIMPLE\s0 bytecode out
+of library archives. This improves the quality of optimization by exposing
+more code to the link-time optimizer.  This information specifies what
+symbols can be accessed externally (by non-LTO object or during dynamic
+linking).  Resulting code quality improvements on binaries (and shared
+libraries that use hidden visibility) are similar to \f(CW\*(C`\-fwhole\-program\*(C'\fR.
+See \fB\-flto\fR for a description of the effect of this flag and how to
+use it.
+.Sp
+This option is enabled by default when \s-1LTO\s0 support in \s-1GCC\s0 is enabled
+and \s-1GCC\s0 was configured for use with
+a linker supporting plugins (\s-1GNU\s0 ld 2.21 or newer or gold).
+.IP "\fB\-fcompare\-elim\fR" 4
+.IX Item "-fcompare-elim"
+After register allocation and post-register allocation instruction splitting,
+identify arithmetic instructions that compute processor flags similar to a
+comparison operation based on that arithmetic.  If possible, eliminate the
+explicit comparison operation.
+.Sp
+This pass only applies to certain targets that cannot explicitly represent
+the comparison operation before register allocation is complete.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fcprop\-registers\fR" 4
+.IX Item "-fcprop-registers"
+After register allocation and post-register allocation instruction splitting,
+we perform a copy-propagation pass to try to reduce scheduling dependencies
+and occasionally eliminate the copy.
+.Sp
+Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
+.IP "\fB\-fprofile\-correction\fR" 4
+.IX Item "-fprofile-correction"
+Profiles collected using an instrumented binary for multi-threaded programs may
+be inconsistent due to missed counter updates. When this option is specified,
+\&\s-1GCC\s0 will use heuristics to correct or smooth out such inconsistencies. By
+default, \s-1GCC\s0 will emit an error message when an inconsistent profile is detected.
+.IP "\fB\-fprofile\-dir=\fR\fIpath\fR" 4
+.IX Item "-fprofile-dir=path"
+Set the directory to search for the profile data files in to \fIpath\fR.
+This option affects only the profile data generated by
+\&\fB\-fprofile\-generate\fR, \fB\-ftest\-coverage\fR, \fB\-fprofile\-arcs\fR
+and used by \fB\-fprofile\-use\fR and \fB\-fbranch\-probabilities\fR
+and its related options.
+By default, \s-1GCC\s0 will use the current directory as \fIpath\fR, thus the
+profile data file will appear in the same directory as the object file.
+.IP "\fB\-fprofile\-generate\fR" 4
+.IX Item "-fprofile-generate"
+.PD 0
+.IP "\fB\-fprofile\-generate=\fR\fIpath\fR" 4
+.IX Item "-fprofile-generate=path"
+.PD
+Enable options usually used for instrumenting application to produce
+profile useful for later recompilation with profile feedback based
+optimization.  You must use \fB\-fprofile\-generate\fR both when
+compiling and when linking your program.
+.Sp
+The following options are enabled: \f(CW\*(C`\-fprofile\-arcs\*(C'\fR, \f(CW\*(C`\-fprofile\-values\*(C'\fR, \f(CW\*(C`\-fvpt\*(C'\fR.
+.Sp
+If \fIpath\fR is specified, \s-1GCC\s0 will look at the \fIpath\fR to find
+the profile feedback data files. See \fB\-fprofile\-dir\fR.
+.IP "\fB\-fprofile\-use\fR" 4
+.IX Item "-fprofile-use"
+.PD 0
+.IP "\fB\-fprofile\-use=\fR\fIpath\fR" 4
+.IX Item "-fprofile-use=path"
+.PD
+Enable profile feedback directed optimizations, and optimizations
+generally profitable only with profile feedback available.
+.Sp
+The following options are enabled: \f(CW\*(C`\-fbranch\-probabilities\*(C'\fR, \f(CW\*(C`\-fvpt\*(C'\fR,
+\&\f(CW\*(C`\-funroll\-loops\*(C'\fR, \f(CW\*(C`\-fpeel\-loops\*(C'\fR, \f(CW\*(C`\-ftracer\*(C'\fR
+.Sp
+By default, \s-1GCC\s0 emits an error message if the feedback profiles do not
+match the source code.  This error can be turned into a warning by using
+\&\fB\-Wcoverage\-mismatch\fR.  Note this may result in poorly optimized
+code.
+.Sp
+If \fIpath\fR is specified, \s-1GCC\s0 will look at the \fIpath\fR to find
+the profile feedback data files. See \fB\-fprofile\-dir\fR.
+.PP
+The following options control compiler behavior regarding floating
+point arithmetic.  These options trade off between speed and
+correctness.  All must be specifically enabled.
+.IP "\fB\-ffloat\-store\fR" 4
+.IX Item "-ffloat-store"
+Do not store floating point variables in registers, and inhibit other
+options that might change whether a floating point value is taken from a
+register or memory.
+.Sp
+This option prevents undesirable excess precision on machines such as
+the 68000 where the floating registers (of the 68881) keep more
+precision than a \f(CW\*(C`double\*(C'\fR is supposed to have.  Similarly for the
+x86 architecture.  For most programs, the excess precision does only
+good, but a few programs rely on the precise definition of \s-1IEEE\s0 floating
+point.  Use \fB\-ffloat\-store\fR for such programs, after modifying
+them to store all pertinent intermediate computations into variables.
+.IP "\fB\-fexcess\-precision=\fR\fIstyle\fR" 4
+.IX Item "-fexcess-precision=style"
+This option allows further control over excess precision on machines
+where floating-point registers have more precision than the \s-1IEEE\s0
+\&\f(CW\*(C`float\*(C'\fR and \f(CW\*(C`double\*(C'\fR types and the processor does not
+support operations rounding to those types.  By default,
+\&\fB\-fexcess\-precision=fast\fR is in effect; this means that
+operations are carried out in the precision of the registers and that
+it is unpredictable when rounding to the types specified in the source
+code takes place.  When compiling C, if
+\&\fB\-fexcess\-precision=standard\fR is specified then excess
+precision will follow the rules specified in \s-1ISO\s0 C99; in particular,
+both casts and assignments cause values to be rounded to their
+semantic types (whereas \fB\-ffloat\-store\fR only affects
+assignments).  This option is enabled by default for C if a strict
+conformance option such as \fB\-std=c99\fR is used.
+.Sp
+\&\fB\-fexcess\-precision=standard\fR is not implemented for languages
+other than C, and has no effect if
+\&\fB\-funsafe\-math\-optimizations\fR or \fB\-ffast\-math\fR is
+specified.  On the x86, it also has no effect if \fB\-mfpmath=sse\fR
+or \fB\-mfpmath=sse+387\fR is specified; in the former case, \s-1IEEE\s0
+semantics apply without excess precision, and in the latter, rounding
+is unpredictable.
+.IP "\fB\-ffast\-math\fR" 4
+.IX Item "-ffast-math"
+Sets \fB\-fno\-math\-errno\fR, \fB\-funsafe\-math\-optimizations\fR,
+\&\fB\-ffinite\-math\-only\fR, \fB\-fno\-rounding\-math\fR,
+\&\fB\-fno\-signaling\-nans\fR and \fB\-fcx\-limited\-range\fR.
+.Sp
+This option causes the preprocessor macro \f(CW\*(C`_\|_FAST_MATH_\|_\*(C'\fR to be defined.
+.Sp
+This option is not turned on by any \fB\-O\fR option besides
+\&\fB\-Ofast\fR since it can result in incorrect output for programs
+which depend on an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications
+for math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+.IP "\fB\-fno\-math\-errno\fR" 4
+.IX Item "-fno-math-errno"
+Do not set \s-1ERRNO\s0 after calling math functions that are executed
+with a single instruction, e.g., sqrt.  A program that relies on
+\&\s-1IEEE\s0 exceptions for math error handling may want to use this flag
+for speed while maintaining \s-1IEEE\s0 arithmetic compatibility.
+.Sp
+This option is not turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+.Sp
+The default is \fB\-fmath\-errno\fR.
+.Sp
+On Darwin systems, the math library never sets \f(CW\*(C`errno\*(C'\fR.  There is
+therefore no reason for the compiler to consider the possibility that
+it might, and \fB\-fno\-math\-errno\fR is the default.
+.IP "\fB\-funsafe\-math\-optimizations\fR" 4
+.IX Item "-funsafe-math-optimizations"
+Allow optimizations for floating-point arithmetic that (a) assume
+that arguments and results are valid and (b) may violate \s-1IEEE\s0 or
+\&\s-1ANSI\s0 standards.  When used at link-time, it may include libraries
+or startup files that change the default \s-1FPU\s0 control word or other
+similar optimizations.
+.Sp
+This option is not turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+Enables \fB\-fno\-signed\-zeros\fR, \fB\-fno\-trapping\-math\fR,
+\&\fB\-fassociative\-math\fR and \fB\-freciprocal\-math\fR.
+.Sp
+The default is \fB\-fno\-unsafe\-math\-optimizations\fR.
+.IP "\fB\-fassociative\-math\fR" 4
+.IX Item "-fassociative-math"
+Allow re-association of operands in series of floating-point operations.
+This violates the \s-1ISO\s0 C and \*(C+ language standard by possibly changing
+computation result.  \s-1NOTE:\s0 re-ordering may change the sign of zero as
+well as ignore NaNs and inhibit or create underflow or overflow (and
+thus cannot be used on a code which relies on rounding behavior like
+\&\f(CW\*(C`(x + 2**52) \- 2**52)\*(C'\fR.  May also reorder floating-point comparisons
+and thus may not be used when ordered comparisons are required.
+This option requires that both \fB\-fno\-signed\-zeros\fR and
+\&\fB\-fno\-trapping\-math\fR be in effect.  Moreover, it doesn't make
+much sense with \fB\-frounding\-math\fR. For Fortran the option
+is automatically enabled when both \fB\-fno\-signed\-zeros\fR and
+\&\fB\-fno\-trapping\-math\fR are in effect.
+.Sp
+The default is \fB\-fno\-associative\-math\fR.
+.IP "\fB\-freciprocal\-math\fR" 4
+.IX Item "-freciprocal-math"
+Allow the reciprocal of a value to be used instead of dividing by
+the value if this enables optimizations.  For example \f(CW\*(C`x / y\*(C'\fR
+can be replaced with \f(CW\*(C`x * (1/y)\*(C'\fR which is useful if \f(CW\*(C`(1/y)\*(C'\fR
+is subject to common subexpression elimination.  Note that this loses
+precision and increases the number of flops operating on the value.
+.Sp
+The default is \fB\-fno\-reciprocal\-math\fR.
+.IP "\fB\-ffinite\-math\-only\fR" 4
+.IX Item "-ffinite-math-only"
+Allow optimizations for floating-point arithmetic that assume
+that arguments and results are not NaNs or +\-Infs.
+.Sp
+This option is not turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+.Sp
+The default is \fB\-fno\-finite\-math\-only\fR.
+.IP "\fB\-fno\-signed\-zeros\fR" 4
+.IX Item "-fno-signed-zeros"
+Allow optimizations for floating point arithmetic that ignore the
+signedness of zero.  \s-1IEEE\s0 arithmetic specifies the behavior of
+distinct +0.0 and \-0.0 values, which then prohibits simplification
+of expressions such as x+0.0 or 0.0*x (even with \fB\-ffinite\-math\-only\fR).
+This option implies that the sign of a zero result isn't significant.
+.Sp
+The default is \fB\-fsigned\-zeros\fR.
+.IP "\fB\-fno\-trapping\-math\fR" 4
+.IX Item "-fno-trapping-math"
+Compile code assuming that floating-point operations cannot generate
+user-visible traps.  These traps include division by zero, overflow,
+underflow, inexact result and invalid operation.  This option requires
+that \fB\-fno\-signaling\-nans\fR be in effect.  Setting this option may
+allow faster code if one relies on \*(L"non-stop\*(R" \s-1IEEE\s0 arithmetic, for example.
+.Sp
+This option should never be turned on by any \fB\-O\fR option since
+it can result in incorrect output for programs which depend on
+an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
+math functions.
+.Sp
+The default is \fB\-ftrapping\-math\fR.
+.IP "\fB\-frounding\-math\fR" 4
+.IX Item "-frounding-math"
+Disable transformations and optimizations that assume default floating
+point rounding behavior.  This is round-to-zero for all floating point
+to integer conversions, and round-to-nearest for all other arithmetic
+truncations.  This option should be specified for programs that change
+the \s-1FP\s0 rounding mode dynamically, or that may be executed with a
+non-default rounding mode.  This option disables constant folding of
+floating point expressions at compile-time (which may be affected by
+rounding mode) and arithmetic transformations that are unsafe in the
+presence of sign-dependent rounding modes.
+.Sp
+The default is \fB\-fno\-rounding\-math\fR.
+.Sp
+This option is experimental and does not currently guarantee to
+disable all \s-1GCC\s0 optimizations that are affected by rounding mode.
+Future versions of \s-1GCC\s0 may provide finer control of this setting
+using C99's \f(CW\*(C`FENV_ACCESS\*(C'\fR pragma.  This command line option
+will be used to specify the default state for \f(CW\*(C`FENV_ACCESS\*(C'\fR.
+.IP "\fB\-fsignaling\-nans\fR" 4
+.IX Item "-fsignaling-nans"
+Compile code assuming that \s-1IEEE\s0 signaling NaNs may generate user-visible
+traps during floating-point operations.  Setting this option disables
+optimizations that may change the number of exceptions visible with
+signaling NaNs.  This option implies \fB\-ftrapping\-math\fR.
+.Sp
+This option causes the preprocessor macro \f(CW\*(C`_\|_SUPPORT_SNAN_\|_\*(C'\fR to
+be defined.
+.Sp
+The default is \fB\-fno\-signaling\-nans\fR.
+.Sp
+This option is experimental and does not currently guarantee to
+disable all \s-1GCC\s0 optimizations that affect signaling NaN behavior.
+.IP "\fB\-fsingle\-precision\-constant\fR" 4
+.IX Item "-fsingle-precision-constant"
+Treat floating point constant as single precision constant instead of
+implicitly converting it to double precision constant.
+.IP "\fB\-fcx\-limited\-range\fR" 4
+.IX Item "-fcx-limited-range"
+When enabled, this option states that a range reduction step is not
+needed when performing complex division.  Also, there is no checking
+whether the result of a complex multiplication or division is \f(CW\*(C`NaN
++ I*NaN\*(C'\fR, with an attempt to rescue the situation in that case.  The
+default is \fB\-fno\-cx\-limited\-range\fR, but is enabled by
+\&\fB\-ffast\-math\fR.
+.Sp
+This option controls the default setting of the \s-1ISO\s0 C99
+\&\f(CW\*(C`CX_LIMITED_RANGE\*(C'\fR pragma.  Nevertheless, the option applies to
+all languages.
+.IP "\fB\-fcx\-fortran\-rules\fR" 4
+.IX Item "-fcx-fortran-rules"
+Complex multiplication and division follow Fortran rules.  Range
+reduction is done as part of complex division, but there is no checking
+whether the result of a complex multiplication or division is \f(CW\*(C`NaN
++ I*NaN\*(C'\fR, with an attempt to rescue the situation in that case.
+.Sp
+The default is \fB\-fno\-cx\-fortran\-rules\fR.
+.PP
+The following options control optimizations that may improve
+performance, but are not enabled by any \fB\-O\fR options.  This
+section includes experimental options that may produce broken code.
+.IP "\fB\-fbranch\-probabilities\fR" 4
+.IX Item "-fbranch-probabilities"
+After running a program compiled with \fB\-fprofile\-arcs\fR, you can compile it a second time using
+\&\fB\-fbranch\-probabilities\fR, to improve optimizations based on
+the number of times each branch was taken.  When the program
+compiled with \fB\-fprofile\-arcs\fR exits it saves arc execution
+counts to a file called \fI\fIsourcename\fI.gcda\fR for each source
+file.  The information in this data file is very dependent on the
+structure of the generated code, so you must use the same source code
+and the same optimization options for both compilations.
+.Sp
+With \fB\-fbranch\-probabilities\fR, \s-1GCC\s0 puts a
+\&\fB\s-1REG_BR_PROB\s0\fR note on each \fB\s-1JUMP_INSN\s0\fR and \fB\s-1CALL_INSN\s0\fR.
+These can be used to improve optimization.  Currently, they are only
+used in one place: in \fIreorg.c\fR, instead of guessing which path a
+branch is most likely to take, the \fB\s-1REG_BR_PROB\s0\fR values are used to
+exactly determine which path is taken more often.
+.IP "\fB\-fprofile\-values\fR" 4
+.IX Item "-fprofile-values"
+If combined with \fB\-fprofile\-arcs\fR, it adds code so that some
+data about values of expressions in the program is gathered.
+.Sp
+With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
+from profiling values of expressions for usage in optimizations.
+.Sp
+Enabled with \fB\-fprofile\-generate\fR and \fB\-fprofile\-use\fR.
+.IP "\fB\-fvpt\fR" 4
+.IX Item "-fvpt"
+If combined with \fB\-fprofile\-arcs\fR, it instructs the compiler to add
+a code to gather information about values of expressions.
+.Sp
+With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
+and actually performs the optimizations based on them.
+Currently the optimizations include specialization of division operation
+using the knowledge about the value of the denominator.
+.IP "\fB\-frename\-registers\fR" 4
+.IX Item "-frename-registers"
+Attempt to avoid false dependencies in scheduled code by making use
+of registers left over after register allocation.  This optimization
+will most benefit processors with lots of registers.  Depending on the
+debug information format adopted by the target, however, it can
+make debugging impossible, since variables will no longer stay in
+a \*(L"home register\*(R".
+.Sp
+Enabled by default with \fB\-funroll\-loops\fR and \fB\-fpeel\-loops\fR.
+.IP "\fB\-ftracer\fR" 4
+.IX Item "-ftracer"
+Perform tail duplication to enlarge superblock size.  This transformation
+simplifies the control flow of the function allowing other optimizations to do
+better job.
+.Sp
+Enabled with \fB\-fprofile\-use\fR.
+.IP "\fB\-funroll\-loops\fR" 4
+.IX Item "-funroll-loops"
+Unroll loops whose number of iterations can be determined at compile time or
+upon entry to the loop.  \fB\-funroll\-loops\fR implies
+\&\fB\-frerun\-cse\-after\-loop\fR, \fB\-fweb\fR and \fB\-frename\-registers\fR.
+It also turns on complete loop peeling (i.e. complete removal of loops with
+small constant number of iterations).  This option makes code larger, and may
+or may not make it run faster.
+.Sp
+Enabled with \fB\-fprofile\-use\fR.
+.IP "\fB\-funroll\-all\-loops\fR" 4
+.IX Item "-funroll-all-loops"
+Unroll all loops, even if their number of iterations is uncertain when
+the loop is entered.  This usually makes programs run more slowly.
+\&\fB\-funroll\-all\-loops\fR implies the same options as
+\&\fB\-funroll\-loops\fR.
+.IP "\fB\-fpeel\-loops\fR" 4
+.IX Item "-fpeel-loops"
+Peels the loops for that there is enough information that they do not
+roll much (from profile feedback).  It also turns on complete loop peeling
+(i.e. complete removal of loops with small constant number of iterations).
+.Sp
+Enabled with \fB\-fprofile\-use\fR.
+.IP "\fB\-fmove\-loop\-invariants\fR" 4
+.IX Item "-fmove-loop-invariants"
+Enables the loop invariant motion pass in the \s-1RTL\s0 loop optimizer.  Enabled
+at level \fB\-O1\fR
+.IP "\fB\-funswitch\-loops\fR" 4
+.IX Item "-funswitch-loops"
+Move branches with loop invariant conditions out of the loop, with duplicates
+of the loop on both branches (modified according to result of the condition).
+.IP "\fB\-ffunction\-sections\fR" 4
+.IX Item "-ffunction-sections"
+.PD 0
+.IP "\fB\-fdata\-sections\fR" 4
+.IX Item "-fdata-sections"
+.PD
+Place each function or data item into its own section in the output
+file if the target supports arbitrary sections.  The name of the
+function or the name of the data item determines the section's name
+in the output file.
+.Sp
+Use these options on systems where the linker can perform optimizations
+to improve locality of reference in the instruction space.  Most systems
+using the \s-1ELF\s0 object format and \s-1SPARC\s0 processors running Solaris 2 have
+linkers with such optimizations.  \s-1AIX\s0 may have these optimizations in
+the future.
+.Sp
+Only use these options when there are significant benefits from doing
+so.  When you specify these options, the assembler and linker will
+create larger object and executable files and will also be slower.
+You will not be able to use \f(CW\*(C`gprof\*(C'\fR on all systems if you
+specify this option and you may have problems with debugging if
+you specify both this option and \fB\-g\fR.
+.IP "\fB\-fbranch\-target\-load\-optimize\fR" 4
+.IX Item "-fbranch-target-load-optimize"
+Perform branch target register load optimization before prologue / epilogue
+threading.
+The use of target registers can typically be exposed only during reload,
+thus hoisting loads out of loops and doing inter-block scheduling needs
+a separate optimization pass.
+.IP "\fB\-fbranch\-target\-load\-optimize2\fR" 4
+.IX Item "-fbranch-target-load-optimize2"
+Perform branch target register load optimization after prologue / epilogue
+threading.
+.IP "\fB\-fbtr\-bb\-exclusive\fR" 4
+.IX Item "-fbtr-bb-exclusive"
+When performing branch target register load optimization, don't reuse
+branch target registers in within any basic block.
+.IP "\fB\-fstack\-protector\fR" 4
+.IX Item "-fstack-protector"
+Emit extra code to check for buffer overflows, such as stack smashing
+attacks.  This is done by adding a guard variable to functions with
+vulnerable objects.  This includes functions that call alloca, and
+functions with buffers larger than 8 bytes.  The guards are initialized
+when a function is entered and then checked when the function exits.
+If a guard check fails, an error message is printed and the program exits.
+.IP "\fB\-fstack\-protector\-all\fR" 4
+.IX Item "-fstack-protector-all"
+Like \fB\-fstack\-protector\fR except that all functions are protected.
+.IP "\fB\-fsection\-anchors\fR" 4
+.IX Item "-fsection-anchors"
+Try to reduce the number of symbolic address calculations by using
+shared \*(L"anchor\*(R" symbols to address nearby objects.  This transformation
+can help to reduce the number of \s-1GOT\s0 entries and \s-1GOT\s0 accesses on some
+targets.
+.Sp
+For example, the implementation of the following function \f(CW\*(C`foo\*(C'\fR:
+.Sp
+.Vb 2
+\&        static int a, b, c;
+\&        int foo (void) { return a + b + c; }
+.Ve
+.Sp
+would usually calculate the addresses of all three variables, but if you
+compile it with \fB\-fsection\-anchors\fR, it will access the variables
+from a common anchor point instead.  The effect is similar to the
+following pseudocode (which isn't valid C):
+.Sp
+.Vb 5
+\&        int foo (void)
+\&        {
+\&          register int *xr = &x;
+\&          return xr[&a \- &x] + xr[&b \- &x] + xr[&c \- &x];
+\&        }
+.Ve
+.Sp
+Not all targets support this option.
+.IP "\fB\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR" 4
+.IX Item "--param name=value"
+In some places, \s-1GCC\s0 uses various constants to control the amount of
+optimization that is done.  For example, \s-1GCC\s0 will not inline functions
+that contain more that a certain number of instructions.  You can
+control some of these constants on the command-line using the
+\&\fB\-\-param\fR option.
+.Sp
+The names of specific parameters, and the meaning of the values, are
+tied to the internals of the compiler, and are subject to change
+without notice in future releases.
+.Sp
+In each case, the \fIvalue\fR is an integer.  The allowable choices for
+\&\fIname\fR are given in the following table:
+.RS 4
+.IP "\fBstruct-reorg-cold-struct-ratio\fR" 4
+.IX Item "struct-reorg-cold-struct-ratio"
+The threshold ratio (as a percentage) between a structure frequency
+and the frequency of the hottest structure in the program.  This parameter
+is used by struct-reorg optimization enabled by \fB\-fipa\-struct\-reorg\fR.
+We say that if the ratio of a structure frequency, calculated by profiling,
+to the hottest structure frequency in the program is less than this
+parameter, then structure reorganization is not applied to this structure.
+The default is 10.
+.IP "\fBpredictable-branch-outcome\fR" 4
+.IX Item "predictable-branch-outcome"
+When branch is predicted to be taken with probability lower than this threshold
+(in percent), then it is considered well predictable. The default is 10.
+.IP "\fBmax-crossjump-edges\fR" 4
+.IX Item "max-crossjump-edges"
+The maximum number of incoming edges to consider for crossjumping.
+The algorithm used by \fB\-fcrossjumping\fR is O(N^2) in
+the number of edges incoming to each block.  Increasing values mean
+more aggressive optimization, making the compile time increase with
+probably small improvement in executable size.
+.IP "\fBmin-crossjump-insns\fR" 4
+.IX Item "min-crossjump-insns"
+The minimum number of instructions which must be matched at the end
+of two blocks before crossjumping will be performed on them.  This
+value is ignored in the case where all instructions in the block being
+crossjumped from are matched.  The default value is 5.
+.IP "\fBmax-grow-copy-bb-insns\fR" 4
+.IX Item "max-grow-copy-bb-insns"
+The maximum code size expansion factor when copying basic blocks
+instead of jumping.  The expansion is relative to a jump instruction.
+The default value is 8.
+.IP "\fBmax-goto-duplication-insns\fR" 4
+.IX Item "max-goto-duplication-insns"
+The maximum number of instructions to duplicate to a block that jumps
+to a computed goto.  To avoid O(N^2) behavior in a number of
+passes, \s-1GCC\s0 factors computed gotos early in the compilation process,
+and unfactors them as late as possible.  Only computed jumps at the
+end of a basic blocks with no more than max-goto-duplication-insns are
+unfactored.  The default value is 8.
+.IP "\fBmax-delay-slot-insn-search\fR" 4
+.IX Item "max-delay-slot-insn-search"
+The maximum number of instructions to consider when looking for an
+instruction to fill a delay slot.  If more than this arbitrary number of
+instructions is searched, the time savings from filling the delay slot
+will be minimal so stop searching.  Increasing values mean more
+aggressive optimization, making the compile time increase with probably
+small improvement in executable run time.
+.IP "\fBmax-delay-slot-live-search\fR" 4
+.IX Item "max-delay-slot-live-search"
+When trying to fill delay slots, the maximum number of instructions to
+consider when searching for a block with valid live register
+information.  Increasing this arbitrarily chosen value means more
+aggressive optimization, increasing the compile time.  This parameter
+should be removed when the delay slot code is rewritten to maintain the
+control-flow graph.
+.IP "\fBmax-gcse-memory\fR" 4
+.IX Item "max-gcse-memory"
+The approximate maximum amount of memory that will be allocated in
+order to perform the global common subexpression elimination
+optimization.  If more memory than specified is required, the
+optimization will not be done.
+.IP "\fBmax-gcse-insertion-ratio\fR" 4
+.IX Item "max-gcse-insertion-ratio"
+If the ratio of expression insertions to deletions is larger than this value
+for any expression, then \s-1RTL\s0 \s-1PRE\s0 will insert or remove the expression and thus
+leave partially redundant computations in the instruction stream.  The default value is 20.
+.IP "\fBmax-pending-list-length\fR" 4
+.IX Item "max-pending-list-length"
+The maximum number of pending dependencies scheduling will allow
+before flushing the current state and starting over.  Large functions
+with few branches or calls can create excessively large lists which
+needlessly consume memory and resources.
+.IP "\fBmax-inline-insns-single\fR" 4
+.IX Item "max-inline-insns-single"
+Several parameters control the tree inliner used in gcc.
+This number sets the maximum number of instructions (counted in \s-1GCC\s0's
+internal representation) in a single function that the tree inliner
+will consider for inlining.  This only affects functions declared
+inline and methods implemented in a class declaration (\*(C+).
+The default value is 400.
+.IP "\fBmax-inline-insns-auto\fR" 4
+.IX Item "max-inline-insns-auto"
+When you use \fB\-finline\-functions\fR (included in \fB\-O3\fR),
+a lot of functions that would otherwise not be considered for inlining
+by the compiler will be investigated.  To those functions, a different
+(more restrictive) limit compared to functions declared inline can
+be applied.
+The default value is 40.
+.IP "\fBlarge-function-insns\fR" 4
+.IX Item "large-function-insns"
+The limit specifying really large functions.  For functions larger than this
+limit after inlining, inlining is constrained by
+\&\fB\-\-param large-function-growth\fR.  This parameter is useful primarily
+to avoid extreme compilation time caused by non-linear algorithms used by the
+backend.
+The default value is 2700.
+.IP "\fBlarge-function-growth\fR" 4
+.IX Item "large-function-growth"
+Specifies maximal growth of large function caused by inlining in percents.
+The default value is 100 which limits large function growth to 2.0 times
+the original size.
+.IP "\fBlarge-unit-insns\fR" 4
+.IX Item "large-unit-insns"
+The limit specifying large translation unit.  Growth caused by inlining of
+units larger than this limit is limited by \fB\-\-param inline-unit-growth\fR.
+For small units this might be too tight (consider unit consisting of function A
+that is inline and B that just calls A three time.  If B is small relative to
+A, the growth of unit is 300\e% and yet such inlining is very sane.  For very
+large units consisting of small inlineable functions however the overall unit
+growth limit is needed to avoid exponential explosion of code size.  Thus for
+smaller units, the size is increased to \fB\-\-param large-unit-insns\fR
+before applying \fB\-\-param inline-unit-growth\fR.  The default is 10000
+.IP "\fBinline-unit-growth\fR" 4
+.IX Item "inline-unit-growth"
+Specifies maximal overall growth of the compilation unit caused by inlining.
+The default value is 30 which limits unit growth to 1.3 times the original
+size.
+.IP "\fBipcp-unit-growth\fR" 4
+.IX Item "ipcp-unit-growth"
+Specifies maximal overall growth of the compilation unit caused by
+interprocedural constant propagation.  The default value is 10 which limits
+unit growth to 1.1 times the original size.
+.IP "\fBlarge-stack-frame\fR" 4
+.IX Item "large-stack-frame"
+The limit specifying large stack frames.  While inlining the algorithm is trying
+to not grow past this limit too much.  Default value is 256 bytes.
+.IP "\fBlarge-stack-frame-growth\fR" 4
+.IX Item "large-stack-frame-growth"
+Specifies maximal growth of large stack frames caused by inlining in percents.
+The default value is 1000 which limits large stack frame growth to 11 times
+the original size.
+.IP "\fBmax-inline-insns-recursive\fR" 4
+.IX Item "max-inline-insns-recursive"
+.PD 0
+.IP "\fBmax-inline-insns-recursive-auto\fR" 4
+.IX Item "max-inline-insns-recursive-auto"
+.PD
+Specifies maximum number of instructions out-of-line copy of self recursive inline
+function can grow into by performing recursive inlining.
+.Sp
+For functions declared inline \fB\-\-param max-inline-insns-recursive\fR is
+taken into account.  For function not declared inline, recursive inlining
+happens only when \fB\-finline\-functions\fR (included in \fB\-O3\fR) is
+enabled and \fB\-\-param max-inline-insns-recursive-auto\fR is used.  The
+default value is 450.
+.IP "\fBmax-inline-recursive-depth\fR" 4
+.IX Item "max-inline-recursive-depth"
+.PD 0
+.IP "\fBmax-inline-recursive-depth-auto\fR" 4
+.IX Item "max-inline-recursive-depth-auto"
+.PD
+Specifies maximum recursion depth used by the recursive inlining.
+.Sp
+For functions declared inline \fB\-\-param max-inline-recursive-depth\fR is
+taken into account.  For function not declared inline, recursive inlining
+happens only when \fB\-finline\-functions\fR (included in \fB\-O3\fR) is
+enabled and \fB\-\-param max-inline-recursive-depth-auto\fR is used.  The
+default value is 8.
+.IP "\fBmin-inline-recursive-probability\fR" 4
+.IX Item "min-inline-recursive-probability"
+Recursive inlining is profitable only for function having deep recursion
+in average and can hurt for function having little recursion depth by
+increasing the prologue size or complexity of function body to other
+optimizers.
+.Sp
+When profile feedback is available (see \fB\-fprofile\-generate\fR) the actual
+recursion depth can be guessed from probability that function will recurse via
+given call expression.  This parameter limits inlining only to call expression
+whose probability exceeds given threshold (in percents).  The default value is
+10.
+.IP "\fBearly-inlining-insns\fR" 4
+.IX Item "early-inlining-insns"
+Specify growth that early inliner can make.  In effect it increases amount of
+inlining for code having large abstraction penalty.  The default value is 10.
+.IP "\fBmax-early-inliner-iterations\fR" 4
+.IX Item "max-early-inliner-iterations"
+.PD 0
+.IP "\fBmax-early-inliner-iterations\fR" 4
+.IX Item "max-early-inliner-iterations"
+.PD
+Limit of iterations of early inliner.  This basically bounds number of nested
+indirect calls early inliner can resolve.  Deeper chains are still handled by
+late inlining.
+.IP "\fBcomdat-sharing-probability\fR" 4
+.IX Item "comdat-sharing-probability"
+.PD 0
+.IP "\fBcomdat-sharing-probability\fR" 4
+.IX Item "comdat-sharing-probability"
+.PD
+Probability (in percent) that \*(C+ inline function with comdat visibility
+will be shared across multiple compilation units.  The default value is 20.
+.IP "\fBmin-vect-loop-bound\fR" 4
+.IX Item "min-vect-loop-bound"
+The minimum number of iterations under which a loop will not get vectorized
+when \fB\-ftree\-vectorize\fR is used.  The number of iterations after
+vectorization needs to be greater than the value specified by this option
+to allow vectorization.  The default value is 0.
+.IP "\fBgcse-cost-distance-ratio\fR" 4
+.IX Item "gcse-cost-distance-ratio"
+Scaling factor in calculation of maximum distance an expression
+can be moved by \s-1GCSE\s0 optimizations.  This is currently supported only in the
+code hoisting pass.  The bigger the ratio, the more aggressive code hoisting
+will be with simple expressions, i.e., the expressions which have cost
+less than \fBgcse-unrestricted-cost\fR.  Specifying 0 will disable
+hoisting of simple expressions.  The default value is 10.
+.IP "\fBgcse-unrestricted-cost\fR" 4
+.IX Item "gcse-unrestricted-cost"
+Cost, roughly measured as the cost of a single typical machine
+instruction, at which \s-1GCSE\s0 optimizations will not constrain
+the distance an expression can travel.  This is currently
+supported only in the code hoisting pass.  The lesser the cost,
+the more aggressive code hoisting will be.  Specifying 0 will
+allow all expressions to travel unrestricted distances.
+The default value is 3.
+.IP "\fBmax-hoist-depth\fR" 4
+.IX Item "max-hoist-depth"
+The depth of search in the dominator tree for expressions to hoist.
+This is used to avoid quadratic behavior in hoisting algorithm.
+The value of 0 will avoid limiting the search, but may slow down compilation
+of huge functions.  The default value is 30.
+.IP "\fBmax-unrolled-insns\fR" 4
+.IX Item "max-unrolled-insns"
+The maximum number of instructions that a loop should have if that loop
+is unrolled, and if the loop is unrolled, it determines how many times
+the loop code is unrolled.
+.IP "\fBmax-average-unrolled-insns\fR" 4
+.IX Item "max-average-unrolled-insns"
+The maximum number of instructions biased by probabilities of their execution
+that a loop should have if that loop is unrolled, and if the loop is unrolled,
+it determines how many times the loop code is unrolled.
+.IP "\fBmax-unroll-times\fR" 4
+.IX Item "max-unroll-times"
+The maximum number of unrollings of a single loop.
+.IP "\fBmax-peeled-insns\fR" 4
+.IX Item "max-peeled-insns"
+The maximum number of instructions that a loop should have if that loop
+is peeled, and if the loop is peeled, it determines how many times
+the loop code is peeled.
+.IP "\fBmax-peel-times\fR" 4
+.IX Item "max-peel-times"
+The maximum number of peelings of a single loop.
+.IP "\fBmax-completely-peeled-insns\fR" 4
+.IX Item "max-completely-peeled-insns"
+The maximum number of insns of a completely peeled loop.
+.IP "\fBmax-completely-peel-times\fR" 4
+.IX Item "max-completely-peel-times"
+The maximum number of iterations of a loop to be suitable for complete peeling.
+.IP "\fBmax-completely-peel-loop-nest-depth\fR" 4
+.IX Item "max-completely-peel-loop-nest-depth"
+The maximum depth of a loop nest suitable for complete peeling.
+.IP "\fBmax-unswitch-insns\fR" 4
+.IX Item "max-unswitch-insns"
+The maximum number of insns of an unswitched loop.
+.IP "\fBmax-unswitch-level\fR" 4
+.IX Item "max-unswitch-level"
+The maximum number of branches unswitched in a single loop.
+.IP "\fBlim-expensive\fR" 4
+.IX Item "lim-expensive"
+The minimum cost of an expensive expression in the loop invariant motion.
+.IP "\fBiv-consider-all-candidates-bound\fR" 4
+.IX Item "iv-consider-all-candidates-bound"
+Bound on number of candidates for induction variables below that
+all candidates are considered for each use in induction variable
+optimizations.  Only the most relevant candidates are considered
+if there are more candidates, to avoid quadratic time complexity.
+.IP "\fBiv-max-considered-uses\fR" 4
+.IX Item "iv-max-considered-uses"
+The induction variable optimizations give up on loops that contain more
+induction variable uses.
+.IP "\fBiv-always-prune-cand-set-bound\fR" 4
+.IX Item "iv-always-prune-cand-set-bound"
+If number of candidates in the set is smaller than this value,
+we always try to remove unnecessary ivs from the set during its
+optimization when a new iv is added to the set.
+.IP "\fBscev-max-expr-size\fR" 4
+.IX Item "scev-max-expr-size"
+Bound on size of expressions used in the scalar evolutions analyzer.
+Large expressions slow the analyzer.
+.IP "\fBscev-max-expr-complexity\fR" 4
+.IX Item "scev-max-expr-complexity"
+Bound on the complexity of the expressions in the scalar evolutions analyzer.
+Complex expressions slow the analyzer.
+.IP "\fBomega-max-vars\fR" 4
+.IX Item "omega-max-vars"
+The maximum number of variables in an Omega constraint system.
+The default value is 128.
+.IP "\fBomega-max-geqs\fR" 4
+.IX Item "omega-max-geqs"
+The maximum number of inequalities in an Omega constraint system.
+The default value is 256.
+.IP "\fBomega-max-eqs\fR" 4
+.IX Item "omega-max-eqs"
+The maximum number of equalities in an Omega constraint system.
+The default value is 128.
+.IP "\fBomega-max-wild-cards\fR" 4
+.IX Item "omega-max-wild-cards"
+The maximum number of wildcard variables that the Omega solver will
+be able to insert.  The default value is 18.
+.IP "\fBomega-hash-table-size\fR" 4
+.IX Item "omega-hash-table-size"
+The size of the hash table in the Omega solver.  The default value is
+550.
+.IP "\fBomega-max-keys\fR" 4
+.IX Item "omega-max-keys"
+The maximal number of keys used by the Omega solver.  The default
+value is 500.
+.IP "\fBomega-eliminate-redundant-constraints\fR" 4
+.IX Item "omega-eliminate-redundant-constraints"
+When set to 1, use expensive methods to eliminate all redundant
+constraints.  The default value is 0.
+.IP "\fBvect-max-version-for-alignment-checks\fR" 4
+.IX Item "vect-max-version-for-alignment-checks"
+The maximum number of runtime checks that can be performed when
+doing loop versioning for alignment in the vectorizer.  See option
+ftree-vect-loop-version for more information.
+.IP "\fBvect-max-version-for-alias-checks\fR" 4
+.IX Item "vect-max-version-for-alias-checks"
+The maximum number of runtime checks that can be performed when
+doing loop versioning for alias in the vectorizer.  See option
+ftree-vect-loop-version for more information.
+.IP "\fBmax-iterations-to-track\fR" 4
+.IX Item "max-iterations-to-track"
+The maximum number of iterations of a loop the brute force algorithm
+for analysis of # of iterations of the loop tries to evaluate.
+.IP "\fBhot-bb-count-fraction\fR" 4
+.IX Item "hot-bb-count-fraction"
+Select fraction of the maximal count of repetitions of basic block in program
+given basic block needs to have to be considered hot.
+.IP "\fBhot-bb-frequency-fraction\fR" 4
+.IX Item "hot-bb-frequency-fraction"
+Select fraction of the entry block frequency of executions of basic block in
+function given basic block needs to have to be considered hot
+.IP "\fBmax-predicted-iterations\fR" 4
+.IX Item "max-predicted-iterations"
+The maximum number of loop iterations we predict statically.  This is useful
+in cases where function contain single loop with known bound and other loop
+with unknown.  We predict the known number of iterations correctly, while
+the unknown number of iterations average to roughly 10.  This means that the
+loop without bounds would appear artificially cold relative to the other one.
+.IP "\fBalign-threshold\fR" 4
+.IX Item "align-threshold"
+Select fraction of the maximal frequency of executions of basic block in
+function given basic block will get aligned.
+.IP "\fBalign-loop-iterations\fR" 4
+.IX Item "align-loop-iterations"
+A loop expected to iterate at lest the selected number of iterations will get
+aligned.
+.IP "\fBtracer-dynamic-coverage\fR" 4
+.IX Item "tracer-dynamic-coverage"
+.PD 0
+.IP "\fBtracer-dynamic-coverage-feedback\fR" 4
+.IX Item "tracer-dynamic-coverage-feedback"
+.PD
+This value is used to limit superblock formation once the given percentage of
+executed instructions is covered.  This limits unnecessary code size
+expansion.
+.Sp
+The \fBtracer-dynamic-coverage-feedback\fR is used only when profile
+feedback is available.  The real profiles (as opposed to statically estimated
+ones) are much less balanced allowing the threshold to be larger value.
+.IP "\fBtracer-max-code-growth\fR" 4
+.IX Item "tracer-max-code-growth"
+Stop tail duplication once code growth has reached given percentage.  This is
+rather hokey argument, as most of the duplicates will be eliminated later in
+cross jumping, so it may be set to much higher values than is the desired code
+growth.
+.IP "\fBtracer-min-branch-ratio\fR" 4
+.IX Item "tracer-min-branch-ratio"
+Stop reverse growth when the reverse probability of best edge is less than this
+threshold (in percent).
+.IP "\fBtracer-min-branch-ratio\fR" 4
+.IX Item "tracer-min-branch-ratio"
+.PD 0
+.IP "\fBtracer-min-branch-ratio-feedback\fR" 4
+.IX Item "tracer-min-branch-ratio-feedback"
+.PD
+Stop forward growth if the best edge do have probability lower than this
+threshold.
+.Sp
+Similarly to \fBtracer-dynamic-coverage\fR two values are present, one for
+compilation for profile feedback and one for compilation without.  The value
+for compilation with profile feedback needs to be more conservative (higher) in
+order to make tracer effective.
+.IP "\fBmax-cse-path-length\fR" 4
+.IX Item "max-cse-path-length"
+Maximum number of basic blocks on path that cse considers.  The default is 10.
+.IP "\fBmax-cse-insns\fR" 4
+.IX Item "max-cse-insns"
+The maximum instructions \s-1CSE\s0 process before flushing. The default is 1000.
+.IP "\fBggc-min-expand\fR" 4
+.IX Item "ggc-min-expand"
+\&\s-1GCC\s0 uses a garbage collector to manage its own memory allocation.  This
+parameter specifies the minimum percentage by which the garbage
+collector's heap should be allowed to expand between collections.
+Tuning this may improve compilation speed; it has no effect on code
+generation.
+.Sp
+The default is 30% + 70% * (\s-1RAM/1GB\s0) with an upper bound of 100% when
+\&\s-1RAM\s0 >= 1GB.  If \f(CW\*(C`getrlimit\*(C'\fR is available, the notion of \*(L"\s-1RAM\s0\*(R" is
+the smallest of actual \s-1RAM\s0 and \f(CW\*(C`RLIMIT_DATA\*(C'\fR or \f(CW\*(C`RLIMIT_AS\*(C'\fR.  If
+\&\s-1GCC\s0 is not able to calculate \s-1RAM\s0 on a particular platform, the lower
+bound of 30% is used.  Setting this parameter and
+\&\fBggc-min-heapsize\fR to zero causes a full collection to occur at
+every opportunity.  This is extremely slow, but can be useful for
+debugging.
+.IP "\fBggc-min-heapsize\fR" 4
+.IX Item "ggc-min-heapsize"
+Minimum size of the garbage collector's heap before it begins bothering
+to collect garbage.  The first collection occurs after the heap expands
+by \fBggc-min-expand\fR% beyond \fBggc-min-heapsize\fR.  Again,
+tuning this may improve compilation speed, and has no effect on code
+generation.
+.Sp
+The default is the smaller of \s-1RAM/8\s0, \s-1RLIMIT_RSS\s0, or a limit which
+tries to ensure that \s-1RLIMIT_DATA\s0 or \s-1RLIMIT_AS\s0 are not exceeded, but
+with a lower bound of 4096 (four megabytes) and an upper bound of
+131072 (128 megabytes).  If \s-1GCC\s0 is not able to calculate \s-1RAM\s0 on a
+particular platform, the lower bound is used.  Setting this parameter
+very large effectively disables garbage collection.  Setting this
+parameter and \fBggc-min-expand\fR to zero causes a full collection
+to occur at every opportunity.
+.IP "\fBmax-reload-search-insns\fR" 4
+.IX Item "max-reload-search-insns"
+The maximum number of instruction reload should look backward for equivalent
+register.  Increasing values mean more aggressive optimization, making the
+compile time increase with probably slightly better performance.  The default
+value is 100.
+.IP "\fBmax-cselib-memory-locations\fR" 4
+.IX Item "max-cselib-memory-locations"
+The maximum number of memory locations cselib should take into account.
+Increasing values mean more aggressive optimization, making the compile time
+increase with probably slightly better performance.  The default value is 500.
+.IP "\fBreorder-blocks-duplicate\fR" 4
+.IX Item "reorder-blocks-duplicate"
+.PD 0
+.IP "\fBreorder-blocks-duplicate-feedback\fR" 4
+.IX Item "reorder-blocks-duplicate-feedback"
+.PD
+Used by basic block reordering pass to decide whether to use unconditional
+branch or duplicate the code on its destination.  Code is duplicated when its
+estimated size is smaller than this value multiplied by the estimated size of
+unconditional jump in the hot spots of the program.
+.Sp
+The \fBreorder-block-duplicate-feedback\fR is used only when profile
+feedback is available and may be set to higher values than
+\&\fBreorder-block-duplicate\fR since information about the hot spots is more
+accurate.
+.IP "\fBmax-sched-ready-insns\fR" 4
+.IX Item "max-sched-ready-insns"
+The maximum number of instructions ready to be issued the scheduler should
+consider at any given time during the first scheduling pass.  Increasing
+values mean more thorough searches, making the compilation time increase
+with probably little benefit.  The default value is 100.
+.IP "\fBmax-sched-region-blocks\fR" 4
+.IX Item "max-sched-region-blocks"
+The maximum number of blocks in a region to be considered for
+interblock scheduling.  The default value is 10.
+.IP "\fBmax-pipeline-region-blocks\fR" 4
+.IX Item "max-pipeline-region-blocks"
+The maximum number of blocks in a region to be considered for
+pipelining in the selective scheduler.  The default value is 15.
+.IP "\fBmax-sched-region-insns\fR" 4
+.IX Item "max-sched-region-insns"
+The maximum number of insns in a region to be considered for
+interblock scheduling.  The default value is 100.
+.IP "\fBmax-pipeline-region-insns\fR" 4
+.IX Item "max-pipeline-region-insns"
+The maximum number of insns in a region to be considered for
+pipelining in the selective scheduler.  The default value is 200.
+.IP "\fBmin-spec-prob\fR" 4
+.IX Item "min-spec-prob"
+The minimum probability (in percents) of reaching a source block
+for interblock speculative scheduling.  The default value is 40.
+.IP "\fBmax-sched-extend-regions-iters\fR" 4
+.IX Item "max-sched-extend-regions-iters"
+The maximum number of iterations through \s-1CFG\s0 to extend regions.
+0 \- disable region extension,
+N \- do at most N iterations.
+The default value is 0.
+.IP "\fBmax-sched-insn-conflict-delay\fR" 4
+.IX Item "max-sched-insn-conflict-delay"
+The maximum conflict delay for an insn to be considered for speculative motion.
+The default value is 3.
+.IP "\fBsched-spec-prob-cutoff\fR" 4
+.IX Item "sched-spec-prob-cutoff"
+The minimal probability of speculation success (in percents), so that
+speculative insn will be scheduled.
+The default value is 40.
+.IP "\fBsched-mem-true-dep-cost\fR" 4
+.IX Item "sched-mem-true-dep-cost"
+Minimal distance (in \s-1CPU\s0 cycles) between store and load targeting same
+memory locations.  The default value is 1.
+.IP "\fBselsched-max-lookahead\fR" 4
+.IX Item "selsched-max-lookahead"
+The maximum size of the lookahead window of selective scheduling.  It is a
+depth of search for available instructions.
+The default value is 50.
+.IP "\fBselsched-max-sched-times\fR" 4
+.IX Item "selsched-max-sched-times"
+The maximum number of times that an instruction will be scheduled during
+selective scheduling.  This is the limit on the number of iterations
+through which the instruction may be pipelined.  The default value is 2.
+.IP "\fBselsched-max-insns-to-rename\fR" 4
+.IX Item "selsched-max-insns-to-rename"
+The maximum number of best instructions in the ready list that are considered
+for renaming in the selective scheduler.  The default value is 2.
+.IP "\fBmax-last-value-rtl\fR" 4
+.IX Item "max-last-value-rtl"
+The maximum size measured as number of RTLs that can be recorded in an expression
+in combiner for a pseudo register as last known value of that register.  The default
+is 10000.
+.IP "\fBinteger-share-limit\fR" 4
+.IX Item "integer-share-limit"
+Small integer constants can use a shared data structure, reducing the
+compiler's memory usage and increasing its speed.  This sets the maximum
+value of a shared integer constant.  The default value is 256.
+.IP "\fBmin-virtual-mappings\fR" 4
+.IX Item "min-virtual-mappings"
+Specifies the minimum number of virtual mappings in the incremental
+\&\s-1SSA\s0 updater that should be registered to trigger the virtual mappings
+heuristic defined by virtual-mappings-ratio.  The default value is
+100.
+.IP "\fBvirtual-mappings-ratio\fR" 4
+.IX Item "virtual-mappings-ratio"
+If the number of virtual mappings is virtual-mappings-ratio bigger
+than the number of virtual symbols to be updated, then the incremental
+\&\s-1SSA\s0 updater switches to a full update for those symbols.  The default
+ratio is 3.
+.IP "\fBssp-buffer-size\fR" 4
+.IX Item "ssp-buffer-size"
+The minimum size of buffers (i.e. arrays) that will receive stack smashing
+protection when \fB\-fstack\-protection\fR is used.
+.IP "\fBmax-jump-thread-duplication-stmts\fR" 4
+.IX Item "max-jump-thread-duplication-stmts"
+Maximum number of statements allowed in a block that needs to be
+duplicated when threading jumps.
+.IP "\fBmax-fields-for-field-sensitive\fR" 4
+.IX Item "max-fields-for-field-sensitive"
+Maximum number of fields in a structure we will treat in
+a field sensitive manner during pointer analysis.  The default is zero
+for \-O0, and \-O1 and 100 for \-Os, \-O2, and \-O3.
+.IP "\fBprefetch-latency\fR" 4
+.IX Item "prefetch-latency"
+Estimate on average number of instructions that are executed before
+prefetch finishes.  The distance we prefetch ahead is proportional
+to this constant.  Increasing this number may also lead to less
+streams being prefetched (see \fBsimultaneous-prefetches\fR).
+.IP "\fBsimultaneous-prefetches\fR" 4
+.IX Item "simultaneous-prefetches"
+Maximum number of prefetches that can run at the same time.
+.IP "\fBl1\-cache\-line\-size\fR" 4
+.IX Item "l1-cache-line-size"
+The size of cache line in L1 cache, in bytes.
+.IP "\fBl1\-cache\-size\fR" 4
+.IX Item "l1-cache-size"
+The size of L1 cache, in kilobytes.
+.IP "\fBl2\-cache\-size\fR" 4
+.IX Item "l2-cache-size"
+The size of L2 cache, in kilobytes.
+.IP "\fBmin-insn-to-prefetch-ratio\fR" 4
+.IX Item "min-insn-to-prefetch-ratio"
+The minimum ratio between the number of instructions and the
+number of prefetches to enable prefetching in a loop.
+.IP "\fBprefetch-min-insn-to-mem-ratio\fR" 4
+.IX Item "prefetch-min-insn-to-mem-ratio"
+The minimum ratio between the number of instructions and the
+number of memory references to enable prefetching in a loop.
+.IP "\fBuse-canonical-types\fR" 4
+.IX Item "use-canonical-types"
+Whether the compiler should use the \*(L"canonical\*(R" type system.  By
+default, this should always be 1, which uses a more efficient internal
+mechanism for comparing types in \*(C+ and Objective\-\*(C+.  However, if
+bugs in the canonical type system are causing compilation failures,
+set this value to 0 to disable canonical types.
+.IP "\fBswitch-conversion-max-branch-ratio\fR" 4
+.IX Item "switch-conversion-max-branch-ratio"
+Switch initialization conversion will refuse to create arrays that are
+bigger than \fBswitch-conversion-max-branch-ratio\fR times the number of
+branches in the switch.
+.IP "\fBmax-partial-antic-length\fR" 4
+.IX Item "max-partial-antic-length"
+Maximum length of the partial antic set computed during the tree
+partial redundancy elimination optimization (\fB\-ftree\-pre\fR) when
+optimizing at \fB\-O3\fR and above.  For some sorts of source code
+the enhanced partial redundancy elimination optimization can run away,
+consuming all of the memory available on the host machine.  This
+parameter sets a limit on the length of the sets that are computed,
+which prevents the runaway behavior.  Setting a value of 0 for
+this parameter will allow an unlimited set length.
+.IP "\fBsccvn-max-scc-size\fR" 4
+.IX Item "sccvn-max-scc-size"
+Maximum size of a strongly connected component (\s-1SCC\s0) during \s-1SCCVN\s0
+processing.  If this limit is hit, \s-1SCCVN\s0 processing for the whole
+function will not be done and optimizations depending on it will
+be disabled.  The default maximum \s-1SCC\s0 size is 10000.
+.IP "\fBira-max-loops-num\fR" 4
+.IX Item "ira-max-loops-num"
+\&\s-1IRA\s0 uses a regional register allocation by default.  If a function
+contains loops more than number given by the parameter, only at most
+given number of the most frequently executed loops will form regions
+for the regional register allocation.  The default value of the
+parameter is 100.
+.IP "\fBira-max-conflict-table-size\fR" 4
+.IX Item "ira-max-conflict-table-size"
+Although \s-1IRA\s0 uses a sophisticated algorithm of compression conflict
+table, the table can be still big for huge functions.  If the conflict
+table for a function could be more than size in \s-1MB\s0 given by the
+parameter, the conflict table is not built and faster, simpler, and
+lower quality register allocation algorithm will be used.  The
+algorithm do not use pseudo-register conflicts.  The default value of
+the parameter is 2000.
+.IP "\fBira-loop-reserved-regs\fR" 4
+.IX Item "ira-loop-reserved-regs"
+\&\s-1IRA\s0 can be used to evaluate more accurate register pressure in loops
+for decision to move loop invariants (see \fB\-O3\fR).  The number
+of available registers reserved for some other purposes is described
+by this parameter.  The default value of the parameter is 2 which is
+minimal number of registers needed for execution of typical
+instruction.  This value is the best found from numerous experiments.
+.IP "\fBloop-invariant-max-bbs-in-loop\fR" 4
+.IX Item "loop-invariant-max-bbs-in-loop"
+Loop invariant motion can be very expensive, both in compile time and
+in amount of needed compile time memory, with very large loops.  Loops
+with more basic blocks than this parameter won't have loop invariant
+motion optimization performed on them.  The default value of the
+parameter is 1000 for \-O1 and 10000 for \-O2 and above.
+.IP "\fBmax-vartrack-size\fR" 4
+.IX Item "max-vartrack-size"
+Sets a maximum number of hash table slots to use during variable
+tracking dataflow analysis of any function.  If this limit is exceeded
+with variable tracking at assignments enabled, analysis for that
+function is retried without it, after removing all debug insns from
+the function.  If the limit is exceeded even without debug insns, var
+tracking analysis is completely disabled for the function.  Setting
+the parameter to zero makes it unlimited.
+.IP "\fBmin-nondebug-insn-uid\fR" 4
+.IX Item "min-nondebug-insn-uid"
+Use uids starting at this parameter for nondebug insns.  The range below
+the parameter is reserved exclusively for debug insns created by
+\&\fB\-fvar\-tracking\-assignments\fR, but debug insns may get
+(non-overlapping) uids above it if the reserved range is exhausted.
+.IP "\fBipa-sra-ptr-growth-factor\fR" 4
+.IX Item "ipa-sra-ptr-growth-factor"
+IPA-SRA will replace a pointer to an aggregate with one or more new
+parameters only when their cumulative size is less or equal to
+\&\fBipa-sra-ptr-growth-factor\fR times the size of the original
+pointer parameter.
+.IP "\fBgraphite-max-nb-scop-params\fR" 4
+.IX Item "graphite-max-nb-scop-params"
+To avoid exponential effects in the Graphite loop transforms, the
+number of parameters in a Static Control Part (SCoP) is bounded.  The
+default value is 10 parameters.  A variable whose value is unknown at
+compile time and defined outside a SCoP is a parameter of the SCoP.
+.IP "\fBgraphite-max-bbs-per-function\fR" 4
+.IX Item "graphite-max-bbs-per-function"
+To avoid exponential effects in the detection of SCoPs, the size of
+the functions analyzed by Graphite is bounded.  The default value is
+100 basic blocks.
+.IP "\fBloop-block-tile-size\fR" 4
+.IX Item "loop-block-tile-size"
+Loop blocking or strip mining transforms, enabled with
+\&\fB\-floop\-block\fR or \fB\-floop\-strip\-mine\fR, strip mine each
+loop in the loop nest by a given number of iterations.  The strip
+length can be changed using the \fBloop-block-tile-size\fR
+parameter.  The default value is 51 iterations.
+.IP "\fBdevirt-type-list-size\fR" 4
+.IX Item "devirt-type-list-size"
+IPA-CP attempts to track all possible types passed to a function's
+parameter in order to perform devirtualization.
+\&\fBdevirt-type-list-size\fR is the maximum number of types it
+stores per a single formal parameter of a function.
+.IP "\fBlto-partitions\fR" 4
+.IX Item "lto-partitions"
+Specify desired number of partitions produced during \s-1WHOPR\s0 compilation.
+The number of partitions should exceed the number of CPUs used for compilation.
+The default value is 32.
+.IP "\fBlto-minpartition\fR" 4
+.IX Item "lto-minpartition"
+Size of minimal partition for \s-1WHOPR\s0 (in estimated instructions).
+This prevents expenses of splitting very small programs into too many
+partitions.
+.IP "\fBcxx-max-namespaces-for-diagnostic-help\fR" 4
+.IX Item "cxx-max-namespaces-for-diagnostic-help"
+The maximum number of namespaces to consult for suggestions when \*(C+
+name lookup fails for an identifier.  The default is 1000.
+.RE
+.RS 4
+.RE
+.SS "Options Controlling the Preprocessor"
+.IX Subsection "Options Controlling the Preprocessor"
+These options control the C preprocessor, which is run on each C source
+file before actual compilation.
+.PP
+If you use the \fB\-E\fR option, nothing is done except preprocessing.
+Some of these options make sense only together with \fB\-E\fR because
+they cause the preprocessor output to be unsuitable for actual
+compilation.
+.IP "\fB\-Wp,\fR\fIoption\fR" 4
+.IX Item "-Wp,option"
+You can use \fB\-Wp,\fR\fIoption\fR to bypass the compiler driver
+and pass \fIoption\fR directly through to the preprocessor.  If
+\&\fIoption\fR contains commas, it is split into multiple options at the
+commas.  However, many options are modified, translated or interpreted
+by the compiler driver before being passed to the preprocessor, and
+\&\fB\-Wp\fR forcibly bypasses this phase.  The preprocessor's direct
+interface is undocumented and subject to change, so whenever possible
+you should avoid using \fB\-Wp\fR and let the driver handle the
+options instead.
+.IP "\fB\-Xpreprocessor\fR \fIoption\fR" 4
+.IX Item "-Xpreprocessor option"
+Pass \fIoption\fR as an option to the preprocessor.  You can use this to
+supply system-specific preprocessor options which \s-1GCC\s0 does not know how to
+recognize.
+.Sp
+If you want to pass an option that takes an argument, you must use
+\&\fB\-Xpreprocessor\fR twice, once for the option and once for the argument.
+.IP "\fB\-D\fR \fIname\fR" 4
+.IX Item "-D name"
+Predefine \fIname\fR as a macro, with definition \f(CW1\fR.
+.IP "\fB\-D\fR \fIname\fR\fB=\fR\fIdefinition\fR" 4
+.IX Item "-D name=definition"
+The contents of \fIdefinition\fR are tokenized and processed as if
+they appeared during translation phase three in a \fB#define\fR
+directive.  In particular, the definition will be truncated by
+embedded newline characters.
+.Sp
+If you are invoking the preprocessor from a shell or shell-like
+program you may need to use the shell's quoting syntax to protect
+characters such as spaces that have a meaning in the shell syntax.
+.Sp
+If you wish to define a function-like macro on the command line, write
+its argument list with surrounding parentheses before the equals sign
+(if any).  Parentheses are meaningful to most shells, so you will need
+to quote the option.  With \fBsh\fR and \fBcsh\fR,
+\&\fB\-D'\fR\fIname\fR\fB(\fR\fIargs...\fR\fB)=\fR\fIdefinition\fR\fB'\fR works.
+.Sp
+\&\fB\-D\fR and \fB\-U\fR options are processed in the order they
+are given on the command line.  All \fB\-imacros\fR \fIfile\fR and
+\&\fB\-include\fR \fIfile\fR options are processed after all
+\&\fB\-D\fR and \fB\-U\fR options.
+.IP "\fB\-U\fR \fIname\fR" 4
+.IX Item "-U name"
+Cancel any previous definition of \fIname\fR, either built in or
+provided with a \fB\-D\fR option.
+.IP "\fB\-undef\fR" 4
+.IX Item "-undef"
+Do not predefine any system-specific or GCC-specific macros.  The
+standard predefined macros remain defined.
+.IP "\fB\-I\fR \fIdir\fR" 4
+.IX Item "-I dir"
+Add the directory \fIdir\fR to the list of directories to be searched
+for header files.
+Directories named by \fB\-I\fR are searched before the standard
+system include directories.  If the directory \fIdir\fR is a standard
+system include directory, the option is ignored to ensure that the
+default search order for system directories and the special treatment
+of system headers are not defeated
+\&.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-o\fR \fIfile\fR" 4
+.IX Item "-o file"
+Write output to \fIfile\fR.  This is the same as specifying \fIfile\fR
+as the second non-option argument to \fBcpp\fR.  \fBgcc\fR has a
+different interpretation of a second non-option argument, so you must
+use \fB\-o\fR to specify the output file.
+.IP "\fB\-Wall\fR" 4
+.IX Item "-Wall"
+Turns on all optional warnings which are desirable for normal code.
+At present this is \fB\-Wcomment\fR, \fB\-Wtrigraphs\fR,
+\&\fB\-Wmultichar\fR and a warning about integer promotion causing a
+change of sign in \f(CW\*(C`#if\*(C'\fR expressions.  Note that many of the
+preprocessor's warnings are on by default and have no options to
+control them.
+.IP "\fB\-Wcomment\fR" 4
+.IX Item "-Wcomment"
+.PD 0
+.IP "\fB\-Wcomments\fR" 4
+.IX Item "-Wcomments"
+.PD
+Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
+comment, or whenever a backslash-newline appears in a \fB//\fR comment.
+(Both forms have the same effect.)
+.IP "\fB\-Wtrigraphs\fR" 4
+.IX Item "-Wtrigraphs"
+Most trigraphs in comments cannot affect the meaning of the program.
+However, a trigraph that would form an escaped newline (\fB??/\fR at
+the end of a line) can, by changing where the comment begins or ends.
+Therefore, only trigraphs that would form escaped newlines produce
+warnings inside a comment.
+.Sp
+This option is implied by \fB\-Wall\fR.  If \fB\-Wall\fR is not
+given, this option is still enabled unless trigraphs are enabled.  To
+get trigraph conversion without warnings, but get the other
+\&\fB\-Wall\fR warnings, use \fB\-trigraphs \-Wall \-Wno\-trigraphs\fR.
+.IP "\fB\-Wtraditional\fR" 4
+.IX Item "-Wtraditional"
+Warn about certain constructs that behave differently in traditional and
+\&\s-1ISO\s0 C.  Also warn about \s-1ISO\s0 C constructs that have no traditional C
+equivalent, and problematic constructs which should be avoided.
+.IP "\fB\-Wundef\fR" 4
+.IX Item "-Wundef"
+Warn whenever an identifier which is not a macro is encountered in an
+\&\fB#if\fR directive, outside of \fBdefined\fR.  Such identifiers are
+replaced with zero.
+.IP "\fB\-Wunused\-macros\fR" 4
+.IX Item "-Wunused-macros"
+Warn about macros defined in the main file that are unused.  A macro
+is \fIused\fR if it is expanded or tested for existence at least once.
+The preprocessor will also warn if the macro has not been used at the
+time it is redefined or undefined.
+.Sp
+Built-in macros, macros defined on the command line, and macros
+defined in include files are not warned about.
+.Sp
+\&\fINote:\fR If a macro is actually used, but only used in skipped
+conditional blocks, then \s-1CPP\s0 will report it as unused.  To avoid the
+warning in such a case, you might improve the scope of the macro's
+definition by, for example, moving it into the first skipped block.
+Alternatively, you could provide a dummy use with something like:
+.Sp
+.Vb 2
+\&        #if defined the_macro_causing_the_warning
+\&        #endif
+.Ve
+.IP "\fB\-Wendif\-labels\fR" 4
+.IX Item "-Wendif-labels"
+Warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
+This usually happens in code of the form
+.Sp
+.Vb 5
+\&        #if FOO
+\&        ...
+\&        #else FOO
+\&        ...
+\&        #endif FOO
+.Ve
+.Sp
+The second and third \f(CW\*(C`FOO\*(C'\fR should be in comments, but often are not
+in older programs.  This warning is on by default.
+.IP "\fB\-Werror\fR" 4
+.IX Item "-Werror"
+Make all warnings into hard errors.  Source code which triggers warnings
+will be rejected.
+.IP "\fB\-Wsystem\-headers\fR" 4
+.IX Item "-Wsystem-headers"
+Issue warnings for code in system headers.  These are normally unhelpful
+in finding bugs in your own code, therefore suppressed.  If you are
+responsible for the system library, you may want to see them.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+Suppress all warnings, including those which \s-1GNU\s0 \s-1CPP\s0 issues by default.
+.IP "\fB\-pedantic\fR" 4
+.IX Item "-pedantic"
+Issue all the mandatory diagnostics listed in the C standard.  Some of
+them are left out by default, since they trigger frequently on harmless
+code.
+.IP "\fB\-pedantic\-errors\fR" 4
+.IX Item "-pedantic-errors"
+Issue all the mandatory diagnostics, and make all mandatory diagnostics
+into errors.  This includes mandatory diagnostics that \s-1GCC\s0 issues
+without \fB\-pedantic\fR but treats as warnings.
+.IP "\fB\-M\fR" 4
+.IX Item "-M"
+Instead of outputting the result of preprocessing, output a rule
+suitable for \fBmake\fR describing the dependencies of the main
+source file.  The preprocessor outputs one \fBmake\fR rule containing
+the object file name for that source file, a colon, and the names of all
+the included files, including those coming from \fB\-include\fR or
+\&\fB\-imacros\fR command line options.
+.Sp
+Unless specified explicitly (with \fB\-MT\fR or \fB\-MQ\fR), the
+object file name consists of the name of the source file with any
+suffix replaced with object file suffix and with any leading directory
+parts removed.  If there are many included files then the rule is
+split into several lines using \fB\e\fR\-newline.  The rule has no
+commands.
+.Sp
+This option does not suppress the preprocessor's debug output, such as
+\&\fB\-dM\fR.  To avoid mixing such debug output with the dependency
+rules you should explicitly specify the dependency output file with
+\&\fB\-MF\fR, or use an environment variable like
+\&\fB\s-1DEPENDENCIES_OUTPUT\s0\fR.  Debug output
+will still be sent to the regular output stream as normal.
+.Sp
+Passing \fB\-M\fR to the driver implies \fB\-E\fR, and suppresses
+warnings with an implicit \fB\-w\fR.
+.IP "\fB\-MM\fR" 4
+.IX Item "-MM"
+Like \fB\-M\fR but do not mention header files that are found in
+system header directories, nor header files that are included,
+directly or indirectly, from such a header.
+.Sp
+This implies that the choice of angle brackets or double quotes in an
+\&\fB#include\fR directive does not in itself determine whether that
+header will appear in \fB\-MM\fR dependency output.  This is a
+slight change in semantics from \s-1GCC\s0 versions 3.0 and earlier.
+.IP "\fB\-MF\fR \fIfile\fR" 4
+.IX Item "-MF file"
+When used with \fB\-M\fR or \fB\-MM\fR, specifies a
+file to write the dependencies to.  If no \fB\-MF\fR switch is given
+the preprocessor sends the rules to the same place it would have sent
+preprocessed output.
+.Sp
+When used with the driver options \fB\-MD\fR or \fB\-MMD\fR,
+\&\fB\-MF\fR overrides the default dependency output file.
+.IP "\fB\-MG\fR" 4
+.IX Item "-MG"
+In conjunction with an option such as \fB\-M\fR requesting
+dependency generation, \fB\-MG\fR assumes missing header files are
+generated files and adds them to the dependency list without raising
+an error.  The dependency filename is taken directly from the
+\&\f(CW\*(C`#include\*(C'\fR directive without prepending any path.  \fB\-MG\fR
+also suppresses preprocessed output, as a missing header file renders
+this useless.
+.Sp
+This feature is used in automatic updating of makefiles.
+.IP "\fB\-MP\fR" 4
+.IX Item "-MP"
+This option instructs \s-1CPP\s0 to add a phony target for each dependency
+other than the main file, causing each to depend on nothing.  These
+dummy rules work around errors \fBmake\fR gives if you remove header
+files without updating the \fIMakefile\fR to match.
+.Sp
+This is typical output:
+.Sp
+.Vb 1
+\&        test.o: test.c test.h
+\&        
+\&        test.h:
+.Ve
+.IP "\fB\-MT\fR \fItarget\fR" 4
+.IX Item "-MT target"
+Change the target of the rule emitted by dependency generation.  By
+default \s-1CPP\s0 takes the name of the main input file, deletes any
+directory components and any file suffix such as \fB.c\fR, and
+appends the platform's usual object suffix.  The result is the target.
+.Sp
+An \fB\-MT\fR option will set the target to be exactly the string you
+specify.  If you want multiple targets, you can specify them as a single
+argument to \fB\-MT\fR, or use multiple \fB\-MT\fR options.
+.Sp
+For example, \fB\-MT\ '$(objpfx)foo.o'\fR might give
+.Sp
+.Vb 1
+\&        $(objpfx)foo.o: foo.c
+.Ve
+.IP "\fB\-MQ\fR \fItarget\fR" 4
+.IX Item "-MQ target"
+Same as \fB\-MT\fR, but it quotes any characters which are special to
+Make.  \fB\-MQ\ '$(objpfx)foo.o'\fR gives
+.Sp
+.Vb 1
+\&        $$(objpfx)foo.o: foo.c
+.Ve
+.Sp
+The default target is automatically quoted, as if it were given with
+\&\fB\-MQ\fR.
+.IP "\fB\-MD\fR" 4
+.IX Item "-MD"
+\&\fB\-MD\fR is equivalent to \fB\-M \-MF\fR \fIfile\fR, except that
+\&\fB\-E\fR is not implied.  The driver determines \fIfile\fR based on
+whether an \fB\-o\fR option is given.  If it is, the driver uses its
+argument but with a suffix of \fI.d\fR, otherwise it takes the name
+of the input file, removes any directory components and suffix, and
+applies a \fI.d\fR suffix.
+.Sp
+If \fB\-MD\fR is used in conjunction with \fB\-E\fR, any
+\&\fB\-o\fR switch is understood to specify the dependency output file, but if used without \fB\-E\fR, each \fB\-o\fR
+is understood to specify a target object file.
+.Sp
+Since \fB\-E\fR is not implied, \fB\-MD\fR can be used to generate
+a dependency output file as a side-effect of the compilation process.
+.IP "\fB\-MMD\fR" 4
+.IX Item "-MMD"
+Like \fB\-MD\fR except mention only user header files, not system
+header files.
+.IP "\fB\-fpch\-deps\fR" 4
+.IX Item "-fpch-deps"
+When using precompiled headers, this flag
+will cause the dependency-output flags to also list the files from the
+precompiled header's dependencies.  If not specified only the
+precompiled header would be listed and not the files that were used to
+create it because those files are not consulted when a precompiled
+header is used.
+.IP "\fB\-fpch\-preprocess\fR" 4
+.IX Item "-fpch-preprocess"
+This option allows use of a precompiled header together with \fB\-E\fR.  It inserts a special \f(CW\*(C`#pragma\*(C'\fR,
+\&\f(CW\*(C`#pragma GCC pch_preprocess "\f(CIfilename\f(CW"\*(C'\fR in the output to mark
+the place where the precompiled header was found, and its \fIfilename\fR.
+When \fB\-fpreprocessed\fR is in use, \s-1GCC\s0 recognizes this \f(CW\*(C`#pragma\*(C'\fR
+and loads the \s-1PCH\s0.
+.Sp
+This option is off by default, because the resulting preprocessed output
+is only really suitable as input to \s-1GCC\s0.  It is switched on by
+\&\fB\-save\-temps\fR.
+.Sp
+You should not write this \f(CW\*(C`#pragma\*(C'\fR in your own code, but it is
+safe to edit the filename if the \s-1PCH\s0 file is available in a different
+location.  The filename may be absolute or it may be relative to \s-1GCC\s0's
+current directory.
+.IP "\fB\-x c\fR" 4
+.IX Item "-x c"
+.PD 0
+.IP "\fB\-x c++\fR" 4
+.IX Item "-x c++"
+.IP "\fB\-x objective-c\fR" 4
+.IX Item "-x objective-c"
+.IP "\fB\-x assembler-with-cpp\fR" 4
+.IX Item "-x assembler-with-cpp"
+.PD
+Specify the source language: C, \*(C+, Objective-C, or assembly.  This has
+nothing to do with standards conformance or extensions; it merely
+selects which base syntax to expect.  If you give none of these options,
+cpp will deduce the language from the extension of the source file:
+\&\fB.c\fR, \fB.cc\fR, \fB.m\fR, or \fB.S\fR.  Some other common
+extensions for \*(C+ and assembly are also recognized.  If cpp does not
+recognize the extension, it will treat the file as C; this is the most
+generic mode.
+.Sp
+\&\fINote:\fR Previous versions of cpp accepted a \fB\-lang\fR option
+which selected both the language and the standards conformance level.
+This option has been removed, because it conflicts with the \fB\-l\fR
+option.
+.IP "\fB\-std=\fR\fIstandard\fR" 4
+.IX Item "-std=standard"
+.PD 0
+.IP "\fB\-ansi\fR" 4
+.IX Item "-ansi"
+.PD
+Specify the standard to which the code should conform.  Currently \s-1CPP\s0
+knows about C and \*(C+ standards; others may be added in the future.
+.Sp
+\&\fIstandard\fR
+may be one of:
+.RS 4
+.ie n .IP """c90""" 4
+.el .IP "\f(CWc90\fR" 4
+.IX Item "c90"
+.PD 0
+.ie n .IP """c89""" 4
+.el .IP "\f(CWc89\fR" 4
+.IX Item "c89"
+.ie n .IP """iso9899:1990""" 4
+.el .IP "\f(CWiso9899:1990\fR" 4
+.IX Item "iso9899:1990"
+.PD
+The \s-1ISO\s0 C standard from 1990.  \fBc90\fR is the customary shorthand for
+this version of the standard.
+.Sp
+The \fB\-ansi\fR option is equivalent to \fB\-std=c90\fR.
+.ie n .IP """iso9899:199409""" 4
+.el .IP "\f(CWiso9899:199409\fR" 4
+.IX Item "iso9899:199409"
+The 1990 C standard, as amended in 1994.
+.ie n .IP """iso9899:1999""" 4
+.el .IP "\f(CWiso9899:1999\fR" 4
+.IX Item "iso9899:1999"
+.PD 0
+.ie n .IP """c99""" 4
+.el .IP "\f(CWc99\fR" 4
+.IX Item "c99"
+.ie n .IP """iso9899:199x""" 4
+.el .IP "\f(CWiso9899:199x\fR" 4
+.IX Item "iso9899:199x"
+.ie n .IP """c9x""" 4
+.el .IP "\f(CWc9x\fR" 4
+.IX Item "c9x"
+.PD
+The revised \s-1ISO\s0 C standard, published in December 1999.  Before
+publication, this was known as C9X.
+.ie n .IP """c1x""" 4
+.el .IP "\f(CWc1x\fR" 4
+.IX Item "c1x"
+The next version of the \s-1ISO\s0 C standard, still under development.
+.ie n .IP """gnu90""" 4
+.el .IP "\f(CWgnu90\fR" 4
+.IX Item "gnu90"
+.PD 0
+.ie n .IP """gnu89""" 4
+.el .IP "\f(CWgnu89\fR" 4
+.IX Item "gnu89"
+.PD
+The 1990 C standard plus \s-1GNU\s0 extensions.  This is the default.
+.ie n .IP """gnu99""" 4
+.el .IP "\f(CWgnu99\fR" 4
+.IX Item "gnu99"
+.PD 0
+.ie n .IP """gnu9x""" 4
+.el .IP "\f(CWgnu9x\fR" 4
+.IX Item "gnu9x"
+.PD
+The 1999 C standard plus \s-1GNU\s0 extensions.
+.ie n .IP """gnu1x""" 4
+.el .IP "\f(CWgnu1x\fR" 4
+.IX Item "gnu1x"
+The next version of the \s-1ISO\s0 C standard, still under development, plus
+\&\s-1GNU\s0 extensions.
+.ie n .IP """c++98""" 4
+.el .IP "\f(CWc++98\fR" 4
+.IX Item "c++98"
+The 1998 \s-1ISO\s0 \*(C+ standard plus amendments.
+.ie n .IP """gnu++98""" 4
+.el .IP "\f(CWgnu++98\fR" 4
+.IX Item "gnu++98"
+The same as \fB\-std=c++98\fR plus \s-1GNU\s0 extensions.  This is the
+default for \*(C+ code.
+.RE
+.RS 4
+.RE
+.IP "\fB\-I\-\fR" 4
+.IX Item "-I-"
+Split the include path.  Any directories specified with \fB\-I\fR
+options before \fB\-I\-\fR are searched only for headers requested with
+\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
+\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR.  If additional directories are
+specified with \fB\-I\fR options after the \fB\-I\-\fR, those
+directories are searched for all \fB#include\fR directives.
+.Sp
+In addition, \fB\-I\-\fR inhibits the use of the directory of the current
+file directory as the first search directory for \f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR.
+This option has been deprecated.
+.IP "\fB\-nostdinc\fR" 4
+.IX Item "-nostdinc"
+Do not search the standard system directories for header files.
+Only the directories you have specified with \fB\-I\fR options
+(and the directory of the current file, if appropriate) are searched.
+.IP "\fB\-nostdinc++\fR" 4
+.IX Item "-nostdinc++"
+Do not search for header files in the \*(C+\-specific standard directories,
+but do still search the other standard directories.  (This option is
+used when building the \*(C+ library.)
+.IP "\fB\-include\fR \fIfile\fR" 4
+.IX Item "-include file"
+Process \fIfile\fR as if \f(CW\*(C`#include "file"\*(C'\fR appeared as the first
+line of the primary source file.  However, the first directory searched
+for \fIfile\fR is the preprocessor's working directory \fIinstead of\fR
+the directory containing the main source file.  If not found there, it
+is searched for in the remainder of the \f(CW\*(C`#include "..."\*(C'\fR search
+chain as normal.
+.Sp
+If multiple \fB\-include\fR options are given, the files are included
+in the order they appear on the command line.
+.IP "\fB\-imacros\fR \fIfile\fR" 4
+.IX Item "-imacros file"
+Exactly like \fB\-include\fR, except that any output produced by
+scanning \fIfile\fR is thrown away.  Macros it defines remain defined.
+This allows you to acquire all the macros from a header without also
+processing its declarations.
+.Sp
+All files specified by \fB\-imacros\fR are processed before all files
+specified by \fB\-include\fR.
+.IP "\fB\-idirafter\fR \fIdir\fR" 4
+.IX Item "-idirafter dir"
+Search \fIdir\fR for header files, but do it \fIafter\fR all
+directories specified with \fB\-I\fR and the standard system directories
+have been exhausted.  \fIdir\fR is treated as a system include directory.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-iprefix\fR \fIprefix\fR" 4
+.IX Item "-iprefix prefix"
+Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR
+options.  If the prefix represents a directory, you should include the
+final \fB/\fR.
+.IP "\fB\-iwithprefix\fR \fIdir\fR" 4
+.IX Item "-iwithprefix dir"
+.PD 0
+.IP "\fB\-iwithprefixbefore\fR \fIdir\fR" 4
+.IX Item "-iwithprefixbefore dir"
+.PD
+Append \fIdir\fR to the prefix specified previously with
+\&\fB\-iprefix\fR, and add the resulting directory to the include search
+path.  \fB\-iwithprefixbefore\fR puts it in the same place \fB\-I\fR
+would; \fB\-iwithprefix\fR puts it where \fB\-idirafter\fR would.
+.IP "\fB\-isysroot\fR \fIdir\fR" 4
+.IX Item "-isysroot dir"
+This option is like the \fB\-\-sysroot\fR option, but applies only to
+header files (except for Darwin targets, where it applies to both header
+files and libraries).  See the \fB\-\-sysroot\fR option for more
+information.
+.IP "\fB\-imultilib\fR \fIdir\fR" 4
+.IX Item "-imultilib dir"
+Use \fIdir\fR as a subdirectory of the directory containing
+target-specific \*(C+ headers.
+.IP "\fB\-isystem\fR \fIdir\fR" 4
+.IX Item "-isystem dir"
+Search \fIdir\fR for header files, after all directories specified by
+\&\fB\-I\fR but before the standard system directories.  Mark it
+as a system directory, so that it gets the same special treatment as
+is applied to the standard system directories.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-iquote\fR \fIdir\fR" 4
+.IX Item "-iquote dir"
+Search \fIdir\fR only for header files requested with
+\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
+\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR, before all directories specified by
+\&\fB\-I\fR and before the standard system directories.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-fdirectives\-only\fR" 4
+.IX Item "-fdirectives-only"
+When preprocessing, handle directives, but do not expand macros.
+.Sp
+The option's behavior depends on the \fB\-E\fR and \fB\-fpreprocessed\fR
+options.
+.Sp
+With \fB\-E\fR, preprocessing is limited to the handling of directives
+such as \f(CW\*(C`#define\*(C'\fR, \f(CW\*(C`#ifdef\*(C'\fR, and \f(CW\*(C`#error\*(C'\fR.  Other
+preprocessor operations, such as macro expansion and trigraph
+conversion are not performed.  In addition, the \fB\-dD\fR option is
+implicitly enabled.
+.Sp
+With \fB\-fpreprocessed\fR, predefinition of command line and most
+builtin macros is disabled.  Macros such as \f(CW\*(C`_\|_LINE_\|_\*(C'\fR, which are
+contextually dependent, are handled normally.  This enables compilation of
+files previously preprocessed with \f(CW\*(C`\-E \-fdirectives\-only\*(C'\fR.
+.Sp
+With both \fB\-E\fR and \fB\-fpreprocessed\fR, the rules for
+\&\fB\-fpreprocessed\fR take precedence.  This enables full preprocessing of
+files previously preprocessed with \f(CW\*(C`\-E \-fdirectives\-only\*(C'\fR.
+.IP "\fB\-fdollars\-in\-identifiers\fR" 4
+.IX Item "-fdollars-in-identifiers"
+Accept \fB$\fR in identifiers.
+.IP "\fB\-fextended\-identifiers\fR" 4
+.IX Item "-fextended-identifiers"
+Accept universal character names in identifiers.  This option is
+experimental; in a future version of \s-1GCC\s0, it will be enabled by
+default for C99 and \*(C+.
+.IP "\fB\-fpreprocessed\fR" 4
+.IX Item "-fpreprocessed"
+Indicate to the preprocessor that the input file has already been
+preprocessed.  This suppresses things like macro expansion, trigraph
+conversion, escaped newline splicing, and processing of most directives.
+The preprocessor still recognizes and removes comments, so that you can
+pass a file preprocessed with \fB\-C\fR to the compiler without
+problems.  In this mode the integrated preprocessor is little more than
+a tokenizer for the front ends.
+.Sp
+\&\fB\-fpreprocessed\fR is implicit if the input file has one of the
+extensions \fB.i\fR, \fB.ii\fR or \fB.mi\fR.  These are the
+extensions that \s-1GCC\s0 uses for preprocessed files created by
+\&\fB\-save\-temps\fR.
+.IP "\fB\-ftabstop=\fR\fIwidth\fR" 4
+.IX Item "-ftabstop=width"
+Set the distance between tab stops.  This helps the preprocessor report
+correct column numbers in warnings or errors, even if tabs appear on the
+line.  If the value is less than 1 or greater than 100, the option is
+ignored.  The default is 8.
+.IP "\fB\-fexec\-charset=\fR\fIcharset\fR" 4
+.IX Item "-fexec-charset=charset"
+Set the execution character set, used for string and character
+constants.  The default is \s-1UTF\-8\s0.  \fIcharset\fR can be any encoding
+supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
+.IP "\fB\-fwide\-exec\-charset=\fR\fIcharset\fR" 4
+.IX Item "-fwide-exec-charset=charset"
+Set the wide execution character set, used for wide string and
+character constants.  The default is \s-1UTF\-32\s0 or \s-1UTF\-16\s0, whichever
+corresponds to the width of \f(CW\*(C`wchar_t\*(C'\fR.  As with
+\&\fB\-fexec\-charset\fR, \fIcharset\fR can be any encoding supported
+by the system's \f(CW\*(C`iconv\*(C'\fR library routine; however, you will have
+problems with encodings that do not fit exactly in \f(CW\*(C`wchar_t\*(C'\fR.
+.IP "\fB\-finput\-charset=\fR\fIcharset\fR" 4
+.IX Item "-finput-charset=charset"
+Set the input character set, used for translation from the character
+set of the input file to the source character set used by \s-1GCC\s0.  If the
+locale does not specify, or \s-1GCC\s0 cannot get this information from the
+locale, the default is \s-1UTF\-8\s0.  This can be overridden by either the locale
+or this command line option.  Currently the command line option takes
+precedence if there's a conflict.  \fIcharset\fR can be any encoding
+supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
+.IP "\fB\-fworking\-directory\fR" 4
+.IX Item "-fworking-directory"
+Enable generation of linemarkers in the preprocessor output that will
+let the compiler know the current working directory at the time of
+preprocessing.  When this option is enabled, the preprocessor will
+emit, after the initial linemarker, a second linemarker with the
+current working directory followed by two slashes.  \s-1GCC\s0 will use this
+directory, when it's present in the preprocessed input, as the
+directory emitted as the current working directory in some debugging
+information formats.  This option is implicitly enabled if debugging
+information is enabled, but this can be inhibited with the negated
+form \fB\-fno\-working\-directory\fR.  If the \fB\-P\fR flag is
+present in the command line, this option has no effect, since no
+\&\f(CW\*(C`#line\*(C'\fR directives are emitted whatsoever.
+.IP "\fB\-fno\-show\-column\fR" 4
+.IX Item "-fno-show-column"
+Do not print column numbers in diagnostics.  This may be necessary if
+diagnostics are being scanned by a program that does not understand the
+column numbers, such as \fBdejagnu\fR.
+.IP "\fB\-A\fR \fIpredicate\fR\fB=\fR\fIanswer\fR" 4
+.IX Item "-A predicate=answer"
+Make an assertion with the predicate \fIpredicate\fR and answer
+\&\fIanswer\fR.  This form is preferred to the older form \fB\-A\fR
+\&\fIpredicate\fR\fB(\fR\fIanswer\fR\fB)\fR, which is still supported, because
+it does not use shell special characters.
+.IP "\fB\-A \-\fR\fIpredicate\fR\fB=\fR\fIanswer\fR" 4
+.IX Item "-A -predicate=answer"
+Cancel an assertion with the predicate \fIpredicate\fR and answer
+\&\fIanswer\fR.
+.IP "\fB\-dCHARS\fR" 4
+.IX Item "-dCHARS"
+\&\fI\s-1CHARS\s0\fR is a sequence of one or more of the following characters,
+and must not be preceded by a space.  Other characters are interpreted
+by the compiler proper, or reserved for future versions of \s-1GCC\s0, and so
+are silently ignored.  If you specify characters whose behavior
+conflicts, the result is undefined.
+.RS 4
+.IP "\fBM\fR" 4
+.IX Item "M"
+Instead of the normal output, generate a list of \fB#define\fR
+directives for all the macros defined during the execution of the
+preprocessor, including predefined macros.  This gives you a way of
+finding out what is predefined in your version of the preprocessor.
+Assuming you have no file \fIfoo.h\fR, the command
+.Sp
+.Vb 1
+\&        touch foo.h; cpp \-dM foo.h
+.Ve
+.Sp
+will show all the predefined macros.
+.Sp
+If you use \fB\-dM\fR without the \fB\-E\fR option, \fB\-dM\fR is
+interpreted as a synonym for \fB\-fdump\-rtl\-mach\fR.
+.IP "\fBD\fR" 4
+.IX Item "D"
+Like \fBM\fR except in two respects: it does \fInot\fR include the
+predefined macros, and it outputs \fIboth\fR the \fB#define\fR
+directives and the result of preprocessing.  Both kinds of output go to
+the standard output file.
+.IP "\fBN\fR" 4
+.IX Item "N"
+Like \fBD\fR, but emit only the macro names, not their expansions.
+.IP "\fBI\fR" 4
+.IX Item "I"
+Output \fB#include\fR directives in addition to the result of
+preprocessing.
+.IP "\fBU\fR" 4
+.IX Item "U"
+Like \fBD\fR except that only macros that are expanded, or whose
+definedness is tested in preprocessor directives, are output; the
+output is delayed until the use or test of the macro; and
+\&\fB#undef\fR directives are also output for macros tested but
+undefined at the time.
+.RE
+.RS 4
+.RE
+.IP "\fB\-P\fR" 4
+.IX Item "-P"
+Inhibit generation of linemarkers in the output from the preprocessor.
+This might be useful when running the preprocessor on something that is
+not C code, and will be sent to a program which might be confused by the
+linemarkers.
+.IP "\fB\-C\fR" 4
+.IX Item "-C"
+Do not discard comments.  All comments are passed through to the output
+file, except for comments in processed directives, which are deleted
+along with the directive.
+.Sp
+You should be prepared for side effects when using \fB\-C\fR; it
+causes the preprocessor to treat comments as tokens in their own right.
+For example, comments appearing at the start of what would be a
+directive line have the effect of turning that line into an ordinary
+source line, since the first token on the line is no longer a \fB#\fR.
+.IP "\fB\-CC\fR" 4
+.IX Item "-CC"
+Do not discard comments, including during macro expansion.  This is
+like \fB\-C\fR, except that comments contained within macros are
+also passed through to the output file where the macro is expanded.
+.Sp
+In addition to the side-effects of the \fB\-C\fR option, the
+\&\fB\-CC\fR option causes all \*(C+\-style comments inside a macro
+to be converted to C\-style comments.  This is to prevent later use
+of that macro from inadvertently commenting out the remainder of
+the source line.
+.Sp
+The \fB\-CC\fR option is generally used to support lint comments.
+.IP "\fB\-traditional\-cpp\fR" 4
+.IX Item "-traditional-cpp"
+Try to imitate the behavior of old-fashioned C preprocessors, as
+opposed to \s-1ISO\s0 C preprocessors.
+.IP "\fB\-trigraphs\fR" 4
+.IX Item "-trigraphs"
+Process trigraph sequences.
+These are three-character sequences, all starting with \fB??\fR, that
+are defined by \s-1ISO\s0 C to stand for single characters.  For example,
+\&\fB??/\fR stands for \fB\e\fR, so \fB'??/n'\fR is a character
+constant for a newline.  By default, \s-1GCC\s0 ignores trigraphs, but in
+standard-conforming modes it converts them.  See the \fB\-std\fR and
+\&\fB\-ansi\fR options.
+.Sp
+The nine trigraphs and their replacements are
+.Sp
+.Vb 2
+\&        Trigraph:       ??(  ??)  ??<  ??>  ??=  ??/  ??\*(Aq  ??!  ??\-
+\&        Replacement:      [    ]    {    }    #    \e    ^    |    ~
+.Ve
+.IP "\fB\-remap\fR" 4
+.IX Item "-remap"
+Enable special code to work around file systems which only permit very
+short file names, such as MS-DOS.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD 0
+.IP "\fB\-\-target\-help\fR" 4
+.IX Item "--target-help"
+.PD
+Print text describing all the command line options instead of
+preprocessing anything.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+Verbose mode.  Print out \s-1GNU\s0 \s-1CPP\s0's version number at the beginning of
+execution, and report the final form of the include path.
+.IP "\fB\-H\fR" 4
+.IX Item "-H"
+Print the name of each header file used, in addition to other normal
+activities.  Each name is indented to show how deep in the
+\&\fB#include\fR stack it is.  Precompiled header files are also
+printed, even if they are found to be invalid; an invalid precompiled
+header file is printed with \fB...x\fR and a valid one with \fB...!\fR .
+.IP "\fB\-version\fR" 4
+.IX Item "-version"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Print out \s-1GNU\s0 \s-1CPP\s0's version number.  With one dash, proceed to
+preprocess as normal.  With two dashes, exit immediately.
+.SS "Passing Options to the Assembler"
+.IX Subsection "Passing Options to the Assembler"
+You can pass options to the assembler.
+.IP "\fB\-Wa,\fR\fIoption\fR" 4
+.IX Item "-Wa,option"
+Pass \fIoption\fR as an option to the assembler.  If \fIoption\fR
+contains commas, it is split into multiple options at the commas.
+.IP "\fB\-Xassembler\fR \fIoption\fR" 4
+.IX Item "-Xassembler option"
+Pass \fIoption\fR as an option to the assembler.  You can use this to
+supply system-specific assembler options which \s-1GCC\s0 does not know how to
+recognize.
+.Sp
+If you want to pass an option that takes an argument, you must use
+\&\fB\-Xassembler\fR twice, once for the option and once for the argument.
+.SS "Options for Linking"
+.IX Subsection "Options for Linking"
+These options come into play when the compiler links object files into
+an executable output file.  They are meaningless if the compiler is
+not doing a link step.
+.IP "\fIobject-file-name\fR" 4
+.IX Item "object-file-name"
+A file name that does not end in a special recognized suffix is
+considered to name an object file or library.  (Object files are
+distinguished from libraries by the linker according to the file
+contents.)  If linking is done, these object files are used as input
+to the linker.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+.PD 0
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.IP "\fB\-E\fR" 4
+.IX Item "-E"
+.PD
+If any of these options is used, then the linker is not run, and
+object file names should not be used as arguments.
+.IP "\fB\-l\fR\fIlibrary\fR" 4
+.IX Item "-llibrary"
+.PD 0
+.IP "\fB\-l\fR \fIlibrary\fR" 4
+.IX Item "-l library"
+.PD
+Search the library named \fIlibrary\fR when linking.  (The second
+alternative with the library as a separate argument is only for
+\&\s-1POSIX\s0 compliance and is not recommended.)
+.Sp
+It makes a difference where in the command you write this option; the
+linker searches and processes libraries and object files in the order they
+are specified.  Thus, \fBfoo.o \-lz bar.o\fR searches library \fBz\fR
+after file \fIfoo.o\fR but before \fIbar.o\fR.  If \fIbar.o\fR refers
+to functions in \fBz\fR, those functions may not be loaded.
+.Sp
+The linker searches a standard list of directories for the library,
+which is actually a file named \fIlib\fIlibrary\fI.a\fR.  The linker
+then uses this file as if it had been specified precisely by name.
+.Sp
+The directories searched include several standard system directories
+plus any that you specify with \fB\-L\fR.
+.Sp
+Normally the files found this way are library files\-\-\-archive files
+whose members are object files.  The linker handles an archive file by
+scanning through it for members which define symbols that have so far
+been referenced but not defined.  But if the file that is found is an
+ordinary object file, it is linked in the usual fashion.  The only
+difference between using an \fB\-l\fR option and specifying a file name
+is that \fB\-l\fR surrounds \fIlibrary\fR with \fBlib\fR and \fB.a\fR
+and searches several directories.
+.IP "\fB\-lobjc\fR" 4
+.IX Item "-lobjc"
+You need this special case of the \fB\-l\fR option in order to
+link an Objective-C or Objective\-\*(C+ program.
+.IP "\fB\-nostartfiles\fR" 4
+.IX Item "-nostartfiles"
+Do not use the standard system startup files when linking.
+The standard system libraries are used normally, unless \fB\-nostdlib\fR
+or \fB\-nodefaultlibs\fR is used.
+.IP "\fB\-nodefaultlibs\fR" 4
+.IX Item "-nodefaultlibs"
+Do not use the standard system libraries when linking.
+Only the libraries you specify will be passed to the linker, options
+specifying linkage of the system libraries, such as \f(CW\*(C`\-static\-libgcc\*(C'\fR
+or \f(CW\*(C`\-shared\-libgcc\*(C'\fR, will be ignored.
+The standard startup files are used normally, unless \fB\-nostartfiles\fR
+is used.  The compiler may generate calls to \f(CW\*(C`memcmp\*(C'\fR,
+\&\f(CW\*(C`memset\*(C'\fR, \f(CW\*(C`memcpy\*(C'\fR and \f(CW\*(C`memmove\*(C'\fR.
+These entries are usually resolved by entries in
+libc.  These entry points should be supplied through some other
+mechanism when this option is specified.
+.IP "\fB\-nostdlib\fR" 4
+.IX Item "-nostdlib"
+Do not use the standard system startup files or libraries when linking.
+No startup files and only the libraries you specify will be passed to
+the linker, options specifying linkage of the system libraries, such as
+\&\f(CW\*(C`\-static\-libgcc\*(C'\fR or \f(CW\*(C`\-shared\-libgcc\*(C'\fR, will be ignored.
+The compiler may generate calls to \f(CW\*(C`memcmp\*(C'\fR, \f(CW\*(C`memset\*(C'\fR,
+\&\f(CW\*(C`memcpy\*(C'\fR and \f(CW\*(C`memmove\*(C'\fR.
+These entries are usually resolved by entries in
+libc.  These entry points should be supplied through some other
+mechanism when this option is specified.
+.Sp
+One of the standard libraries bypassed by \fB\-nostdlib\fR and
+\&\fB\-nodefaultlibs\fR is \fIlibgcc.a\fR, a library of internal subroutines
+that \s-1GCC\s0 uses to overcome shortcomings of particular machines, or special
+needs for some languages.
+.Sp
+In most cases, you need \fIlibgcc.a\fR even when you want to avoid
+other standard libraries.  In other words, when you specify \fB\-nostdlib\fR
+or \fB\-nodefaultlibs\fR you should usually specify \fB\-lgcc\fR as well.
+This ensures that you have no unresolved references to internal \s-1GCC\s0
+library subroutines.  (For example, \fB_\|_main\fR, used to ensure \*(C+
+constructors will be called.)
+.IP "\fB\-pie\fR" 4
+.IX Item "-pie"
+Produce a position independent executable on targets which support it.
+For predictable results, you must also specify the same set of options
+that were used to generate code (\fB\-fpie\fR, \fB\-fPIE\fR,
+or model suboptions) when you specify this option.
+.IP "\fB\-rdynamic\fR" 4
+.IX Item "-rdynamic"
+Pass the flag \fB\-export\-dynamic\fR to the \s-1ELF\s0 linker, on targets
+that support it. This instructs the linker to add all symbols, not
+only used ones, to the dynamic symbol table. This option is needed
+for some uses of \f(CW\*(C`dlopen\*(C'\fR or to allow obtaining backtraces
+from within a program.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+Remove all symbol table and relocation information from the executable.
+.IP "\fB\-static\fR" 4
+.IX Item "-static"
+On systems that support dynamic linking, this prevents linking with the shared
+libraries.  On other systems, this option has no effect.
+.IP "\fB\-shared\fR" 4
+.IX Item "-shared"
+Produce a shared object which can then be linked with other objects to
+form an executable.  Not all systems support this option.  For predictable
+results, you must also specify the same set of options that were used to
+generate code (\fB\-fpic\fR, \fB\-fPIC\fR, or model suboptions)
+when you specify this option.[1]
+.IP "\fB\-shared\-libgcc\fR" 4
+.IX Item "-shared-libgcc"
+.PD 0
+.IP "\fB\-static\-libgcc\fR" 4
+.IX Item "-static-libgcc"
+.PD
+On systems that provide \fIlibgcc\fR as a shared library, these options
+force the use of either the shared or static version respectively.
+If no shared version of \fIlibgcc\fR was built when the compiler was
+configured, these options have no effect.
+.Sp
+There are several situations in which an application should use the
+shared \fIlibgcc\fR instead of the static version.  The most common
+of these is when the application wishes to throw and catch exceptions
+across different shared libraries.  In that case, each of the libraries
+as well as the application itself should use the shared \fIlibgcc\fR.
+.Sp
+Therefore, the G++ and \s-1GCJ\s0 drivers automatically add
+\&\fB\-shared\-libgcc\fR whenever you build a shared library or a main
+executable, because \*(C+ and Java programs typically use exceptions, so
+this is the right thing to do.
+.Sp
+If, instead, you use the \s-1GCC\s0 driver to create shared libraries, you may
+find that they will not always be linked with the shared \fIlibgcc\fR.
+If \s-1GCC\s0 finds, at its configuration time, that you have a non-GNU linker
+or a \s-1GNU\s0 linker that does not support option \fB\-\-eh\-frame\-hdr\fR,
+it will link the shared version of \fIlibgcc\fR into shared libraries
+by default.  Otherwise, it will take advantage of the linker and optimize
+away the linking with the shared version of \fIlibgcc\fR, linking with
+the static version of libgcc by default.  This allows exceptions to
+propagate through such shared libraries, without incurring relocation
+costs at library load time.
+.Sp
+However, if a library or main executable is supposed to throw or catch
+exceptions, you must link it using the G++ or \s-1GCJ\s0 driver, as appropriate
+for the languages used in the program, or using the option
+\&\fB\-shared\-libgcc\fR, such that it is linked with the shared
+\&\fIlibgcc\fR.
+.IP "\fB\-static\-libstdc++\fR" 4
+.IX Item "-static-libstdc++"
+When the \fBg++\fR program is used to link a \*(C+ program, it will
+normally automatically link against \fBlibstdc++\fR.  If
+\&\fIlibstdc++\fR is available as a shared library, and the
+\&\fB\-static\fR option is not used, then this will link against the
+shared version of \fIlibstdc++\fR.  That is normally fine.  However, it
+is sometimes useful to freeze the version of \fIlibstdc++\fR used by
+the program without going all the way to a fully static link.  The
+\&\fB\-static\-libstdc++\fR option directs the \fBg++\fR driver to
+link \fIlibstdc++\fR statically, without necessarily linking other
+libraries statically.
+.IP "\fB\-symbolic\fR" 4
+.IX Item "-symbolic"
+Bind references to global symbols when building a shared object.  Warn
+about any unresolved references (unless overridden by the link editor
+option \fB\-Xlinker \-z \-Xlinker defs\fR).  Only a few systems support
+this option.
+.IP "\fB\-T\fR \fIscript\fR" 4
+.IX Item "-T script"
+Use \fIscript\fR as the linker script.  This option is supported by most
+systems using the \s-1GNU\s0 linker.  On some targets, such as bare-board
+targets without an operating system, the \fB\-T\fR option may be required
+when linking to avoid references to undefined symbols.
+.IP "\fB\-Xlinker\fR \fIoption\fR" 4
+.IX Item "-Xlinker option"
+Pass \fIoption\fR as an option to the linker.  You can use this to
+supply system-specific linker options which \s-1GCC\s0 does not know how to
+recognize.
+.Sp
+If you want to pass an option that takes a separate argument, you must use
+\&\fB\-Xlinker\fR twice, once for the option and once for the argument.
+For example, to pass \fB\-assert definitions\fR, you must write
+\&\fB\-Xlinker \-assert \-Xlinker definitions\fR.  It does not work to write
+\&\fB\-Xlinker \*(L"\-assert definitions\*(R"\fR, because this passes the entire
+string as a single argument, which is not what the linker expects.
+.Sp
+When using the \s-1GNU\s0 linker, it is usually more convenient to pass
+arguments to linker options using the \fIoption\fR\fB=\fR\fIvalue\fR
+syntax than as separate arguments.  For example, you can specify
+\&\fB\-Xlinker \-Map=output.map\fR rather than
+\&\fB\-Xlinker \-Map \-Xlinker output.map\fR.  Other linkers may not support
+this syntax for command-line options.
+.IP "\fB\-Wl,\fR\fIoption\fR" 4
+.IX Item "-Wl,option"
+Pass \fIoption\fR as an option to the linker.  If \fIoption\fR contains
+commas, it is split into multiple options at the commas.  You can use this
+syntax to pass an argument to the option.
+For example, \fB\-Wl,\-Map,output.map\fR passes \fB\-Map output.map\fR to the
+linker.  When using the \s-1GNU\s0 linker, you can also get the same effect with
+\&\fB\-Wl,\-Map=output.map\fR.
+.IP "\fB\-u\fR \fIsymbol\fR" 4
+.IX Item "-u symbol"
+Pretend the symbol \fIsymbol\fR is undefined, to force linking of
+library modules to define it.  You can use \fB\-u\fR multiple times with
+different symbols to force loading of additional library modules.
+.SS "Options for Directory Search"
+.IX Subsection "Options for Directory Search"
+These options specify directories to search for header files, for
+libraries and for parts of the compiler:
+.IP "\fB\-I\fR\fIdir\fR" 4
+.IX Item "-Idir"
+Add the directory \fIdir\fR to the head of the list of directories to be
+searched for header files.  This can be used to override a system header
+file, substituting your own version, since these directories are
+searched before the system header file directories.  However, you should
+not use this option to add directories that contain vendor-supplied
+system header files (use \fB\-isystem\fR for that).  If you use more than
+one \fB\-I\fR option, the directories are scanned in left-to-right
+order; the standard system directories come after.
+.Sp
+If a standard system include directory, or a directory specified with
+\&\fB\-isystem\fR, is also specified with \fB\-I\fR, the \fB\-I\fR
+option will be ignored.  The directory will still be searched but as a
+system directory at its normal position in the system include chain.
+This is to ensure that \s-1GCC\s0's procedure to fix buggy system headers and
+the ordering for the include_next directive are not inadvertently changed.
+If you really need to change the search order for system directories,
+use the \fB\-nostdinc\fR and/or \fB\-isystem\fR options.
+.IP "\fB\-iplugindir=\fR\fIdir\fR" 4
+.IX Item "-iplugindir=dir"
+Set the directory to search for plugins which are passed
+by \fB\-fplugin=\fR\fIname\fR instead of
+\&\fB\-fplugin=\fR\fIpath\fR\fB/\fR\fIname\fR\fB.so\fR.  This option is not meant
+to be used by the user, but only passed by the driver.
+.IP "\fB\-iquote\fR\fIdir\fR" 4
+.IX Item "-iquotedir"
+Add the directory \fIdir\fR to the head of the list of directories to
+be searched for header files only for the case of \fB#include
+"\fR\fIfile\fR\fB"\fR; they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR,
+otherwise just like \fB\-I\fR.
+.IP "\fB\-L\fR\fIdir\fR" 4
+.IX Item "-Ldir"
+Add directory \fIdir\fR to the list of directories to be searched
+for \fB\-l\fR.
+.IP "\fB\-B\fR\fIprefix\fR" 4
+.IX Item "-Bprefix"
+This option specifies where to find the executables, libraries,
+include files, and data files of the compiler itself.
+.Sp
+The compiler driver program runs one or more of the subprograms
+\&\fIcpp\fR, \fIcc1\fR, \fIas\fR and \fIld\fR.  It tries
+\&\fIprefix\fR as a prefix for each program it tries to run, both with and
+without \fImachine\fR\fB/\fR\fIversion\fR\fB/\fR.
+.Sp
+For each subprogram to be run, the compiler driver first tries the
+\&\fB\-B\fR prefix, if any.  If that name is not found, or if \fB\-B\fR
+was not specified, the driver tries two standard prefixes, which are
+\&\fI/usr/lib/gcc/\fR and \fI/usr/local/lib/gcc/\fR.  If neither of
+those results in a file name that is found, the unmodified program
+name is searched for using the directories specified in your
+\&\fB\s-1PATH\s0\fR environment variable.
+.Sp
+The compiler will check to see if the path provided by the \fB\-B\fR
+refers to a directory, and if necessary it will add a directory
+separator character at the end of the path.
+.Sp
+\&\fB\-B\fR prefixes that effectively specify directory names also apply
+to libraries in the linker, because the compiler translates these
+options into \fB\-L\fR options for the linker.  They also apply to
+includes files in the preprocessor, because the compiler translates these
+options into \fB\-isystem\fR options for the preprocessor.  In this case,
+the compiler appends \fBinclude\fR to the prefix.
+.Sp
+The run-time support file \fIlibgcc.a\fR can also be searched for using
+the \fB\-B\fR prefix, if needed.  If it is not found there, the two
+standard prefixes above are tried, and that is all.  The file is left
+out of the link if it is not found by those means.
+.Sp
+Another way to specify a prefix much like the \fB\-B\fR prefix is to use
+the environment variable \fB\s-1GCC_EXEC_PREFIX\s0\fR.
+.Sp
+As a special kludge, if the path provided by \fB\-B\fR is
+\&\fI[dir/]stage\fIN\fI/\fR, where \fIN\fR is a number in the range 0 to
+9, then it will be replaced by \fI[dir/]include\fR.  This is to help
+with boot-strapping the compiler.
+.IP "\fB\-specs=\fR\fIfile\fR" 4
+.IX Item "-specs=file"
+Process \fIfile\fR after the compiler reads in the standard \fIspecs\fR
+file, in order to override the defaults that the \fIgcc\fR driver
+program uses when determining what switches to pass to \fIcc1\fR,
+\&\fIcc1plus\fR, \fIas\fR, \fIld\fR, etc.  More than one
+\&\fB\-specs=\fR\fIfile\fR can be specified on the command line, and they
+are processed in order, from left to right.
+.IP "\fB\-\-sysroot=\fR\fIdir\fR" 4
+.IX Item "--sysroot=dir"
+Use \fIdir\fR as the logical root directory for headers and libraries.
+For example, if the compiler would normally search for headers in
+\&\fI/usr/include\fR and libraries in \fI/usr/lib\fR, it will instead
+search \fI\fIdir\fI/usr/include\fR and \fI\fIdir\fI/usr/lib\fR.
+.Sp
+If you use both this option and the \fB\-isysroot\fR option, then
+the \fB\-\-sysroot\fR option will apply to libraries, but the
+\&\fB\-isysroot\fR option will apply to header files.
+.Sp
+The \s-1GNU\s0 linker (beginning with version 2.16) has the necessary support
+for this option.  If your linker does not support this option, the
+header file aspect of \fB\-\-sysroot\fR will still work, but the
+library aspect will not.
+.IP "\fB\-I\-\fR" 4
+.IX Item "-I-"
+This option has been deprecated.  Please use \fB\-iquote\fR instead for
+\&\fB\-I\fR directories before the \fB\-I\-\fR and remove the \fB\-I\-\fR.
+Any directories you specify with \fB\-I\fR options before the \fB\-I\-\fR
+option are searched only for the case of \fB#include "\fR\fIfile\fR\fB"\fR;
+they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR.
+.Sp
+If additional directories are specified with \fB\-I\fR options after
+the \fB\-I\-\fR, these directories are searched for all \fB#include\fR
+directives.  (Ordinarily \fIall\fR \fB\-I\fR directories are used
+this way.)
+.Sp
+In addition, the \fB\-I\-\fR option inhibits the use of the current
+directory (where the current input file came from) as the first search
+directory for \fB#include "\fR\fIfile\fR\fB"\fR.  There is no way to
+override this effect of \fB\-I\-\fR.  With \fB\-I.\fR you can specify
+searching the directory which was current when the compiler was
+invoked.  That is not exactly the same as what the preprocessor does
+by default, but it is often satisfactory.
+.Sp
+\&\fB\-I\-\fR does not inhibit the use of the standard system directories
+for header files.  Thus, \fB\-I\-\fR and \fB\-nostdinc\fR are
+independent.
+.SS "Specifying Target Machine and Compiler Version"
+.IX Subsection "Specifying Target Machine and Compiler Version"
+The usual way to run \s-1GCC\s0 is to run the executable called \fBgcc\fR, or
+\&\fImachine\fR\fB\-gcc\fR when cross-compiling, or
+\&\fImachine\fR\fB\-gcc\-\fR\fIversion\fR to run a version other than the
+one that was installed last.
+.SS "Hardware Models and Configurations"
+.IX Subsection "Hardware Models and Configurations"
+Each target machine types can have its own
+special options, starting with \fB\-m\fR, to choose among various
+hardware models or configurations\-\-\-for example, 68010 vs 68020,
+floating coprocessor or none.  A single installed version of the
+compiler can compile for any model or configuration, according to the
+options specified.
+.PP
+Some configurations of the compiler also support additional special
+options, usually for compatibility with other compilers on the same
+platform.
+.PP
+\fI\s-1ARC\s0 Options\fR
+.IX Subsection "ARC Options"
+.PP
+These options are defined for \s-1ARC\s0 implementations:
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+Compile code for little endian mode.  This is the default.
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+Compile code for big endian mode.
+.IP "\fB\-mmangle\-cpu\fR" 4
+.IX Item "-mmangle-cpu"
+Prepend the name of the \s-1CPU\s0 to all public symbol names.
+In multiple-processor systems, there are many \s-1ARC\s0 variants with different
+instruction and register set characteristics.  This flag prevents code
+compiled for one \s-1CPU\s0 to be linked with code compiled for another.
+No facility exists for handling variants that are \*(L"almost identical\*(R".
+This is an all or nothing option.
+.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
+.IX Item "-mcpu=cpu"
+Compile code for \s-1ARC\s0 variant \fIcpu\fR.
+Which variants are supported depend on the configuration.
+All variants support \fB\-mcpu=base\fR, this is the default.
+.IP "\fB\-mtext=\fR\fItext-section\fR" 4
+.IX Item "-mtext=text-section"
+.PD 0
+.IP "\fB\-mdata=\fR\fIdata-section\fR" 4
+.IX Item "-mdata=data-section"
+.IP "\fB\-mrodata=\fR\fIreadonly-data-section\fR" 4
+.IX Item "-mrodata=readonly-data-section"
+.PD
+Put functions, data, and readonly data in \fItext-section\fR,
+\&\fIdata-section\fR, and \fIreadonly-data-section\fR respectively
+by default.  This can be overridden with the \f(CW\*(C`section\*(C'\fR attribute.
+.PP
+\fI\s-1ARM\s0 Options\fR
+.IX Subsection "ARM Options"
+.PP
+These \fB\-m\fR options are defined for Advanced \s-1RISC\s0 Machines (\s-1ARM\s0)
+architectures:
+.IP "\fB\-mabi=\fR\fIname\fR" 4
+.IX Item "-mabi=name"
+Generate code for the specified \s-1ABI\s0.  Permissible values are: \fBapcs-gnu\fR,
+\&\fBatpcs\fR, \fBaapcs\fR, \fBaapcs-linux\fR and \fBiwmmxt\fR.
+.IP "\fB\-mapcs\-frame\fR" 4
+.IX Item "-mapcs-frame"
+Generate a stack frame that is compliant with the \s-1ARM\s0 Procedure Call
+Standard for all functions, even if this is not strictly necessary for
+correct execution of the code.  Specifying \fB\-fomit\-frame\-pointer\fR
+with this option will cause the stack frames not to be generated for
+leaf functions.  The default is \fB\-mno\-apcs\-frame\fR.
+.IP "\fB\-mapcs\fR" 4
+.IX Item "-mapcs"
+This is a synonym for \fB\-mapcs\-frame\fR.
+.IP "\fB\-mthumb\-interwork\fR" 4
+.IX Item "-mthumb-interwork"
+Generate code which supports calling between the \s-1ARM\s0 and Thumb
+instruction sets.  Without this option the two instruction sets cannot
+be reliably used inside one program.  The default is
+\&\fB\-mno\-thumb\-interwork\fR, since slightly larger code is generated
+when \fB\-mthumb\-interwork\fR is specified.
+.IP "\fB\-mno\-sched\-prolog\fR" 4
+.IX Item "-mno-sched-prolog"
+Prevent the reordering of instructions in the function prolog, or the
+merging of those instruction with the instructions in the function's
+body.  This means that all functions will start with a recognizable set
+of instructions (or in fact one of a choice from a small set of
+different function prologues), and this information can be used to
+locate the start if functions inside an executable piece of code.  The
+default is \fB\-msched\-prolog\fR.
+.IP "\fB\-mfloat\-abi=\fR\fIname\fR" 4
+.IX Item "-mfloat-abi=name"
+Specifies which floating-point \s-1ABI\s0 to use.  Permissible values
+are: \fBsoft\fR, \fBsoftfp\fR and \fBhard\fR.
+.Sp
+Specifying \fBsoft\fR causes \s-1GCC\s0 to generate output containing
+library calls for floating-point operations.
+\&\fBsoftfp\fR allows the generation of code using hardware floating-point
+instructions, but still uses the soft-float calling conventions.
+\&\fBhard\fR allows generation of floating-point instructions
+and uses FPU-specific calling conventions.
+.Sp
+The default depends on the specific target configuration.  Note that
+the hard-float and soft-float ABIs are not link-compatible; you must
+compile your entire program with the same \s-1ABI\s0, and link with a
+compatible set of libraries.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+Equivalent to \fB\-mfloat\-abi=hard\fR.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Equivalent to \fB\-mfloat\-abi=soft\fR.
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+Generate code for a processor running in little-endian mode.  This is
+the default for all standard configurations.
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+Generate code for a processor running in big-endian mode; the default is
+to compile code for a little-endian processor.
+.IP "\fB\-mwords\-little\-endian\fR" 4
+.IX Item "-mwords-little-endian"
+This option only applies when generating code for big-endian processors.
+Generate code for a little-endian word order but a big-endian byte
+order.  That is, a byte order of the form \fB32107654\fR.  Note: this
+option should only be used if you require compatibility with code for
+big-endian \s-1ARM\s0 processors generated by versions of the compiler prior to
+2.8.
+.IP "\fB\-mcpu=\fR\fIname\fR" 4
+.IX Item "-mcpu=name"
+This specifies the name of the target \s-1ARM\s0 processor.  \s-1GCC\s0 uses this name
+to determine what kind of instructions it can emit when generating
+assembly code.  Permissible names are: \fBarm2\fR, \fBarm250\fR,
+\&\fBarm3\fR, \fBarm6\fR, \fBarm60\fR, \fBarm600\fR, \fBarm610\fR,
+\&\fBarm620\fR, \fBarm7\fR, \fBarm7m\fR, \fBarm7d\fR, \fBarm7dm\fR,
+\&\fBarm7di\fR, \fBarm7dmi\fR, \fBarm70\fR, \fBarm700\fR,
+\&\fBarm700i\fR, \fBarm710\fR, \fBarm710c\fR, \fBarm7100\fR,
+\&\fBarm720\fR,
+\&\fBarm7500\fR, \fBarm7500fe\fR, \fBarm7tdmi\fR, \fBarm7tdmi\-s\fR,
+\&\fBarm710t\fR, \fBarm720t\fR, \fBarm740t\fR,
+\&\fBstrongarm\fR, \fBstrongarm110\fR, \fBstrongarm1100\fR,
+\&\fBstrongarm1110\fR,
+\&\fBarm8\fR, \fBarm810\fR, \fBarm9\fR, \fBarm9e\fR, \fBarm920\fR,
+\&\fBarm920t\fR, \fBarm922t\fR, \fBarm946e\-s\fR, \fBarm966e\-s\fR,
+\&\fBarm968e\-s\fR, \fBarm926ej\-s\fR, \fBarm940t\fR, \fBarm9tdmi\fR,
+\&\fBarm10tdmi\fR, \fBarm1020t\fR, \fBarm1026ej\-s\fR,
+\&\fBarm10e\fR, \fBarm1020e\fR, \fBarm1022e\fR,
+\&\fBarm1136j\-s\fR, \fBarm1136jf\-s\fR, \fBmpcore\fR, \fBmpcorenovfp\fR,
+\&\fBarm1156t2\-s\fR, \fBarm1156t2f\-s\fR, \fBarm1176jz\-s\fR, \fBarm1176jzf\-s\fR,
+\&\fBcortex\-a5\fR, \fBcortex\-a8\fR, \fBcortex\-a9\fR, \fBcortex\-a15\fR,
+\&\fBcortex\-r4\fR, \fBcortex\-r4f\fR, \fBcortex\-m4\fR, \fBcortex\-m3\fR,
+\&\fBcortex\-m1\fR,
+\&\fBcortex\-m0\fR,
+\&\fBxscale\fR, \fBiwmmxt\fR, \fBiwmmxt2\fR, \fBep9312\fR.
+.IP "\fB\-mtune=\fR\fIname\fR" 4
+.IX Item "-mtune=name"
+This option is very similar to the \fB\-mcpu=\fR option, except that
+instead of specifying the actual target processor type, and hence
+restricting which instructions can be used, it specifies that \s-1GCC\s0 should
+tune the performance of the code as if the target were of the type
+specified in this option, but still choosing the instructions that it
+will generate based on the \s-1CPU\s0 specified by a \fB\-mcpu=\fR option.
+For some \s-1ARM\s0 implementations better performance can be obtained by using
+this option.
+.IP "\fB\-march=\fR\fIname\fR" 4
+.IX Item "-march=name"
+This specifies the name of the target \s-1ARM\s0 architecture.  \s-1GCC\s0 uses this
+name to determine what kind of instructions it can emit when generating
+assembly code.  This option can be used in conjunction with or instead
+of the \fB\-mcpu=\fR option.  Permissible names are: \fBarmv2\fR,
+\&\fBarmv2a\fR, \fBarmv3\fR, \fBarmv3m\fR, \fBarmv4\fR, \fBarmv4t\fR,
+\&\fBarmv5\fR, \fBarmv5t\fR, \fBarmv5e\fR, \fBarmv5te\fR,
+\&\fBarmv6\fR, \fBarmv6j\fR,
+\&\fBarmv6t2\fR, \fBarmv6z\fR, \fBarmv6zk\fR, \fBarmv6\-m\fR,
+\&\fBarmv7\fR, \fBarmv7\-a\fR, \fBarmv7\-r\fR, \fBarmv7\-m\fR,
+\&\fBiwmmxt\fR, \fBiwmmxt2\fR, \fBep9312\fR.
+.IP "\fB\-mfpu=\fR\fIname\fR" 4
+.IX Item "-mfpu=name"
+.PD 0
+.IP "\fB\-mfpe=\fR\fInumber\fR" 4
+.IX Item "-mfpe=number"
+.IP "\fB\-mfp=\fR\fInumber\fR" 4
+.IX Item "-mfp=number"
+.PD
+This specifies what floating point hardware (or hardware emulation) is
+available on the target.  Permissible names are: \fBfpa\fR, \fBfpe2\fR,
+\&\fBfpe3\fR, \fBmaverick\fR, \fBvfp\fR, \fBvfpv3\fR, \fBvfpv3\-fp16\fR,
+\&\fBvfpv3\-d16\fR, \fBvfpv3\-d16\-fp16\fR, \fBvfpv3xd\fR, \fBvfpv3xd\-fp16\fR,
+\&\fBneon\fR, \fBneon\-fp16\fR, \fBvfpv4\fR, \fBvfpv4\-d16\fR,
+\&\fBfpv4\-sp\-d16\fR and \fBneon\-vfpv4\fR.
+\&\fB\-mfp\fR and \fB\-mfpe\fR are synonyms for
+\&\fB\-mfpu\fR=\fBfpe\fR\fInumber\fR, for compatibility with older versions
+of \s-1GCC\s0.
+.Sp
+If \fB\-msoft\-float\fR is specified this specifies the format of
+floating point values.
+.Sp
+If the selected floating-point hardware includes the \s-1NEON\s0 extension
+(e.g. \fB\-mfpu\fR=\fBneon\fR), note that floating-point
+operations will not be used by \s-1GCC\s0's auto-vectorization pass unless
+\&\fB\-funsafe\-math\-optimizations\fR is also specified.  This is
+because \s-1NEON\s0 hardware does not fully implement the \s-1IEEE\s0 754 standard for
+floating-point arithmetic (in particular denormal values are treated as
+zero), so the use of \s-1NEON\s0 instructions may lead to a loss of precision.
+.IP "\fB\-mfp16\-format=\fR\fIname\fR" 4
+.IX Item "-mfp16-format=name"
+Specify the format of the \f(CW\*(C`_\|_fp16\*(C'\fR half-precision floating-point type.
+Permissible names are \fBnone\fR, \fBieee\fR, and \fBalternative\fR;
+the default is \fBnone\fR, in which case the \f(CW\*(C`_\|_fp16\*(C'\fR type is not
+defined.
+.IP "\fB\-mstructure\-size\-boundary=\fR\fIn\fR" 4
+.IX Item "-mstructure-size-boundary=n"
+The size of all structures and unions will be rounded up to a multiple
+of the number of bits set by this option.  Permissible values are 8, 32
+and 64.  The default value varies for different toolchains.  For the \s-1COFF\s0
+targeted toolchain the default value is 8.  A value of 64 is only allowed
+if the underlying \s-1ABI\s0 supports it.
+.Sp
+Specifying the larger number can produce faster, more efficient code, but
+can also increase the size of the program.  Different values are potentially
+incompatible.  Code compiled with one value cannot necessarily expect to
+work with code or libraries compiled with another value, if they exchange
+information using structures or unions.
+.IP "\fB\-mabort\-on\-noreturn\fR" 4
+.IX Item "-mabort-on-noreturn"
+Generate a call to the function \f(CW\*(C`abort\*(C'\fR at the end of a
+\&\f(CW\*(C`noreturn\*(C'\fR function.  It will be executed if the function tries to
+return.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Tells the compiler to perform function calls by first loading the
+address of the function into a register and then performing a subroutine
+call on this register.  This switch is needed if the target function
+will lie outside of the 64 megabyte addressing range of the offset based
+version of subroutine call instruction.
+.Sp
+Even if this switch is enabled, not all function calls will be turned
+into long calls.  The heuristic is that static functions, functions
+which have the \fBshort-call\fR attribute, functions that are inside
+the scope of a \fB#pragma no_long_calls\fR directive and functions whose
+definitions have already been compiled within the current compilation
+unit, will not be turned into long calls.  The exception to this rule is
+that weak function definitions, functions with the \fBlong-call\fR
+attribute or the \fBsection\fR attribute, and functions that are within
+the scope of a \fB#pragma long_calls\fR directive, will always be
+turned into long calls.
+.Sp
+This feature is not enabled by default.  Specifying
+\&\fB\-mno\-long\-calls\fR will restore the default behavior, as will
+placing the function calls within the scope of a \fB#pragma
+long_calls_off\fR directive.  Note these switches have no effect on how
+the compiler generates code to handle function calls via function
+pointers.
+.IP "\fB\-msingle\-pic\-base\fR" 4
+.IX Item "-msingle-pic-base"
+Treat the register used for \s-1PIC\s0 addressing as read-only, rather than
+loading it in the prologue for each function.  The run-time system is
+responsible for initializing this register with an appropriate value
+before execution begins.
+.IP "\fB\-mpic\-register=\fR\fIreg\fR" 4
+.IX Item "-mpic-register=reg"
+Specify the register to be used for \s-1PIC\s0 addressing.  The default is R10
+unless stack-checking is enabled, when R9 is used.
+.IP "\fB\-mcirrus\-fix\-invalid\-insns\fR" 4
+.IX Item "-mcirrus-fix-invalid-insns"
+Insert NOPs into the instruction stream to in order to work around
+problems with invalid Maverick instruction combinations.  This option
+is only valid if the \fB\-mcpu=ep9312\fR option has been used to
+enable generation of instructions for the Cirrus Maverick floating
+point co-processor.  This option is not enabled by default, since the
+problem is only present in older Maverick implementations.  The default
+can be re-enabled by use of the \fB\-mno\-cirrus\-fix\-invalid\-insns\fR
+switch.
+.IP "\fB\-mpoke\-function\-name\fR" 4
+.IX Item "-mpoke-function-name"
+Write the name of each function into the text section, directly
+preceding the function prologue.  The generated code is similar to this:
+.Sp
+.Vb 9
+\&             t0
+\&                 .ascii "arm_poke_function_name", 0
+\&                 .align
+\&             t1
+\&                 .word 0xff000000 + (t1 \- t0)
+\&             arm_poke_function_name
+\&                 mov     ip, sp
+\&                 stmfd   sp!, {fp, ip, lr, pc}
+\&                 sub     fp, ip, #4
+.Ve
+.Sp
+When performing a stack backtrace, code can inspect the value of
+\&\f(CW\*(C`pc\*(C'\fR stored at \f(CW\*(C`fp + 0\*(C'\fR.  If the trace function then looks at
+location \f(CW\*(C`pc \- 12\*(C'\fR and the top 8 bits are set, then we know that
+there is a function name embedded immediately preceding this location
+and has length \f(CW\*(C`((pc[\-3]) & 0xff000000)\*(C'\fR.
+.IP "\fB\-mthumb\fR" 4
+.IX Item "-mthumb"
+Generate code for the Thumb instruction set.  The default is to
+use the 32\-bit \s-1ARM\s0 instruction set.
+This option automatically enables either 16\-bit Thumb\-1 or
+mixed 16/32\-bit Thumb\-2 instructions based on the \fB\-mcpu=\fR\fIname\fR
+and \fB\-march=\fR\fIname\fR options.  This option is not passed to the
+assembler. If you want to force assembler files to be interpreted as Thumb code,
+either add a \fB.thumb\fR directive to the source or pass the \fB\-mthumb\fR
+option directly to the assembler by prefixing it with \fB\-Wa\fR.
+.IP "\fB\-mtpcs\-frame\fR" 4
+.IX Item "-mtpcs-frame"
+Generate a stack frame that is compliant with the Thumb Procedure Call
+Standard for all non-leaf functions.  (A leaf function is one that does
+not call any other functions.)  The default is \fB\-mno\-tpcs\-frame\fR.
+.IP "\fB\-mtpcs\-leaf\-frame\fR" 4
+.IX Item "-mtpcs-leaf-frame"
+Generate a stack frame that is compliant with the Thumb Procedure Call
+Standard for all leaf functions.  (A leaf function is one that does
+not call any other functions.)  The default is \fB\-mno\-apcs\-leaf\-frame\fR.
+.IP "\fB\-mcallee\-super\-interworking\fR" 4
+.IX Item "-mcallee-super-interworking"
+Gives all externally visible functions in the file being compiled an \s-1ARM\s0
+instruction set header which switches to Thumb mode before executing the
+rest of the function.  This allows these functions to be called from
+non-interworking code.  This option is not valid in \s-1AAPCS\s0 configurations
+because interworking is enabled by default.
+.IP "\fB\-mcaller\-super\-interworking\fR" 4
+.IX Item "-mcaller-super-interworking"
+Allows calls via function pointers (including virtual functions) to
+execute correctly regardless of whether the target code has been
+compiled for interworking or not.  There is a small overhead in the cost
+of executing a function pointer if this option is enabled.  This option
+is not valid in \s-1AAPCS\s0 configurations because interworking is enabled
+by default.
+.IP "\fB\-mtp=\fR\fIname\fR" 4
+.IX Item "-mtp=name"
+Specify the access model for the thread local storage pointer.  The valid
+models are \fBsoft\fR, which generates calls to \f(CW\*(C`_\|_aeabi_read_tp\*(C'\fR,
+\&\fBcp15\fR, which fetches the thread pointer from \f(CW\*(C`cp15\*(C'\fR directly
+(supported in the arm6k architecture), and \fBauto\fR, which uses the
+best available method for the selected processor.  The default setting is
+\&\fBauto\fR.
+.IP "\fB\-mword\-relocations\fR" 4
+.IX Item "-mword-relocations"
+Only generate absolute relocations on word sized values (i.e. R_ARM_ABS32).
+This is enabled by default on targets (uClinux, SymbianOS) where the runtime
+loader imposes this restriction, and when \fB\-fpic\fR or \fB\-fPIC\fR
+is specified.
+.IP "\fB\-mfix\-cortex\-m3\-ldrd\fR" 4
+.IX Item "-mfix-cortex-m3-ldrd"
+Some Cortex\-M3 cores can cause data corruption when \f(CW\*(C`ldrd\*(C'\fR instructions
+with overlapping destination and base registers are used.  This option avoids
+generating these instructions.  This option is enabled by default when
+\&\fB\-mcpu=cortex\-m3\fR is specified.
+.PP
+\fI\s-1AVR\s0 Options\fR
+.IX Subsection "AVR Options"
+.PP
+These options are defined for \s-1AVR\s0 implementations:
+.IP "\fB\-mmcu=\fR\fImcu\fR" 4
+.IX Item "-mmcu=mcu"
+Specify \s-1ATMEL\s0 \s-1AVR\s0 instruction set or \s-1MCU\s0 type.
+.Sp
+Instruction set avr1 is for the minimal \s-1AVR\s0 core, not supported by the C
+compiler, only for assembler programs (\s-1MCU\s0 types: at90s1200, attiny10,
+attiny11, attiny12, attiny15, attiny28).
+.Sp
+Instruction set avr2 (default) is for the classic \s-1AVR\s0 core with up to
+8K program memory space (\s-1MCU\s0 types: at90s2313, at90s2323, attiny22,
+at90s2333, at90s2343, at90s4414, at90s4433, at90s4434, at90s8515,
+at90c8534, at90s8535).
+.Sp
+Instruction set avr3 is for the classic \s-1AVR\s0 core with up to 128K program
+memory space (\s-1MCU\s0 types: atmega103, atmega603, at43usb320, at76c711).
+.Sp
+Instruction set avr4 is for the enhanced \s-1AVR\s0 core with up to 8K program
+memory space (\s-1MCU\s0 types: atmega8, atmega83, atmega85).
+.Sp
+Instruction set avr5 is for the enhanced \s-1AVR\s0 core with up to 128K program
+memory space (\s-1MCU\s0 types: atmega16, atmega161, atmega163, atmega32, atmega323,
+atmega64, atmega128, at43usb355, at94k).
+.IP "\fB\-mno\-interrupts\fR" 4
+.IX Item "-mno-interrupts"
+Generated code is not compatible with hardware interrupts.
+Code size will be smaller.
+.IP "\fB\-mcall\-prologues\fR" 4
+.IX Item "-mcall-prologues"
+Functions prologues/epilogues expanded as call to appropriate
+subroutines.  Code size will be smaller.
+.IP "\fB\-mtiny\-stack\fR" 4
+.IX Item "-mtiny-stack"
+Change only the low 8 bits of the stack pointer.
+.IP "\fB\-mint8\fR" 4
+.IX Item "-mint8"
+Assume int to be 8 bit integer.  This affects the sizes of all types: A
+char will be 1 byte, an int will be 1 byte, a long will be 2 bytes
+and long long will be 4 bytes.  Please note that this option does not
+comply to the C standards, but it will provide you with smaller code
+size.
+.PP
+\f(CW\*(C`EIND\*(C'\fR and Devices with more than 128k Bytes of Flash
+.IX Subsection "EIND and Devices with more than 128k Bytes of Flash"
+.PP
+Pointers in the implementation are 16 bits wide.
+The address of a function or label is represented as word address so
+that indirect jumps and calls can address any code address in the
+range of 64k words.
+.PP
+In order to faciliate indirect jump on devices with more than 128k
+bytes of program memory space, there is a special function register called
+\&\f(CW\*(C`EIND\*(C'\fR that serves as most significant part of the target address
+when \f(CW\*(C`EICALL\*(C'\fR or \f(CW\*(C`EIJMP\*(C'\fR instructions are used.
+.PP
+Indirect jumps and calls on these devices are handled as follows and
+are subject to some limitations:
+.IP "\(bu" 4
+The compiler never sets \f(CW\*(C`EIND\*(C'\fR.
+.IP "\(bu" 4
+The startup code from libgcc never sets \f(CW\*(C`EIND\*(C'\fR.
+Notice that startup code is a blend of code from libgcc and avr-libc.
+For the impact of avr-libc on \f(CW\*(C`EIND\*(C'\fR, see the
+avr-libc\ user\ manual (\f(CW\*(C`http://nongnu.org/avr\-libc/user\-manual\*(C'\fR).
+.IP "\(bu" 4
+The compiler uses \f(CW\*(C`EIND\*(C'\fR implicitely in \f(CW\*(C`EICALL\*(C'\fR/\f(CW\*(C`EIJMP\*(C'\fR
+instructions or might read \f(CW\*(C`EIND\*(C'\fR directly.
+.IP "\(bu" 4
+The compiler assumes that \f(CW\*(C`EIND\*(C'\fR never changes during the startup
+code or run of the application. In particular, \f(CW\*(C`EIND\*(C'\fR is not
+saved/restored in function or interrupt service routine
+prologue/epilogue.
+.IP "\(bu" 4
+It is legitimate for user-specific startup code to set up \f(CW\*(C`EIND\*(C'\fR
+early, for example by means of initialization code located in
+section \f(CW\*(C`.init3\*(C'\fR, and thus prior to general startup code that
+initializes \s-1RAM\s0 and calls constructors.
+.IP "\(bu" 4
+For indirect calls to functions and computed goto, the linker will
+generate \fIstubs\fR. Stubs are jump pads sometimes also called
+\&\fItrampolines\fR. Thus, the indirect call/jump will jump to such a stub.
+The stub contains a direct jump to the desired address.
+.IP "\(bu" 4
+Stubs will be generated automatically by the linker if
+the following two conditions are met:
+.RS 4
+.ie n .IP "\-<The address of a label is taken by means of the ""gs"" modifier>" 4
+.el .IP "\-<The address of a label is taken by means of the \f(CWgs\fR modifier>" 4
+.IX Item "-<The address of a label is taken by means of the gs modifier>"
+(short for \fIgenerate stubs\fR) like so:
+.Sp
+.Vb 2
+\&        LDI r24, lo8(gs(<func>))
+\&        LDI r25, hi8(gs(<func>))
+.Ve
+.IP "\-<The final location of that label is in a code segment>" 4
+.IX Item "-<The final location of that label is in a code segment>"
+\&\fIoutside\fR the segment where the stubs are located.
+.RE
+.RS 4
+.RE
+.IP "\(bu" 4
+The compiler will emit such \f(CW\*(C`gs\*(C'\fR modifiers for code labels in the
+following situations:
+.RS 4
+.IP "\-<Taking address of a function or code label.>" 4
+.IX Item "-<Taking address of a function or code label.>"
+.PD 0
+.IP "\-<Computed goto.>" 4
+.IX Item "-<Computed goto.>"
+.IP "\-<If prologue-save function is used, see \fB\-mcall\-prologues\fR>" 4
+.IX Item "-<If prologue-save function is used, see -mcall-prologues>"
+.PD
+command line option.
+.IP "\-<Switch/case dispatch tables. If you do not want such dispatch>" 4
+.IX Item "-<Switch/case dispatch tables. If you do not want such dispatch>"
+tables you can specify the \fB\-fno\-jump\-tables\fR command line option.
+.IP "\-<C and \*(C+ constructors/destructors called during startup/shutdown.>" 4
+.IX Item "-<C and  constructors/destructors called during startup/shutdown.>"
+.PD 0
+.ie n .IP "\-<If the tools hit a ""gs()"" modifier explained above.>" 4
+.el .IP "\-<If the tools hit a \f(CWgs()\fR modifier explained above.>" 4
+.IX Item "-<If the tools hit a gs() modifier explained above.>"
+.RE
+.RS 4
+.RE
+.IP "\(bu" 4
+.PD
+The default linker script is arranged for code with \f(CW\*(C`EIND = 0\*(C'\fR.
+If code is supposed to work for a setup with \f(CW\*(C`EIND != 0\*(C'\fR, a custom
+linker script has to be used in order to place the sections whose
+name start with \f(CW\*(C`.trampolines\*(C'\fR into the segment where \f(CW\*(C`EIND\*(C'\fR
+points to.
+.IP "\(bu" 4
+Jumping to non-symbolic addresses like so is \fInot\fR supported:
+.Sp
+.Vb 5
+\&        int main (void)
+\&        {
+\&            /* Call function at word address 0x2 */
+\&            return ((int(*)(void)) 0x2)();
+\&        }
+.Ve
+.Sp
+Instead, a stub has to be set up:
+.Sp
+.Vb 3
+\&        int main (void)
+\&        {
+\&            extern int func_4 (void);
+\&        
+\&            /* Call function at byte address 0x4 */
+\&            return func_4();
+\&        }
+.Ve
+.Sp
+and the application be linked with \f(CW\*(C`\-Wl,\-\-defsym,func_4=0x4\*(C'\fR.
+Alternatively, \f(CW\*(C`func_4\*(C'\fR can be defined in the linker script.
+.PP
+\fIBlackfin Options\fR
+.IX Subsection "Blackfin Options"
+.IP "\fB\-mcpu=\fR\fIcpu\fR[\fB\-\fR\fIsirevision\fR]" 4
+.IX Item "-mcpu=cpu[-sirevision]"
+Specifies the name of the target Blackfin processor.  Currently, \fIcpu\fR
+can be one of \fBbf512\fR, \fBbf514\fR, \fBbf516\fR, \fBbf518\fR,
+\&\fBbf522\fR, \fBbf523\fR, \fBbf524\fR, \fBbf525\fR, \fBbf526\fR,
+\&\fBbf527\fR, \fBbf531\fR, \fBbf532\fR, \fBbf533\fR,
+\&\fBbf534\fR, \fBbf536\fR, \fBbf537\fR, \fBbf538\fR, \fBbf539\fR,
+\&\fBbf542\fR, \fBbf544\fR, \fBbf547\fR, \fBbf548\fR, \fBbf549\fR,
+\&\fBbf542m\fR, \fBbf544m\fR, \fBbf547m\fR, \fBbf548m\fR, \fBbf549m\fR,
+\&\fBbf561\fR.
+The optional \fIsirevision\fR specifies the silicon revision of the target
+Blackfin processor.  Any workarounds available for the targeted silicon revision
+will be enabled.  If \fIsirevision\fR is \fBnone\fR, no workarounds are enabled.
+If \fIsirevision\fR is \fBany\fR, all workarounds for the targeted processor
+will be enabled.  The \f(CW\*(C`_\|_SILICON_REVISION_\|_\*(C'\fR macro is defined to two
+hexadecimal digits representing the major and minor numbers in the silicon
+revision.  If \fIsirevision\fR is \fBnone\fR, the \f(CW\*(C`_\|_SILICON_REVISION_\|_\*(C'\fR
+is not defined.  If \fIsirevision\fR is \fBany\fR, the
+\&\f(CW\*(C`_\|_SILICON_REVISION_\|_\*(C'\fR is defined to be \f(CW0xffff\fR.
+If this optional \fIsirevision\fR is not used, \s-1GCC\s0 assumes the latest known
+silicon revision of the targeted Blackfin processor.
+.Sp
+Support for \fBbf561\fR is incomplete.  For \fBbf561\fR,
+Only the processor macro is defined.
+Without this option, \fBbf532\fR is used as the processor by default.
+The corresponding predefined processor macros for \fIcpu\fR is to
+be defined.  And for \fBbfin-elf\fR toolchain, this causes the hardware \s-1BSP\s0
+provided by libgloss to be linked in if \fB\-msim\fR is not given.
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+Specifies that the program will be run on the simulator.  This causes
+the simulator \s-1BSP\s0 provided by libgloss to be linked in.  This option
+has effect only for \fBbfin-elf\fR toolchain.
+Certain other options, such as \fB\-mid\-shared\-library\fR and
+\&\fB\-mfdpic\fR, imply \fB\-msim\fR.
+.IP "\fB\-momit\-leaf\-frame\-pointer\fR" 4
+.IX Item "-momit-leaf-frame-pointer"
+Don't keep the frame pointer in a register for leaf functions.  This
+avoids the instructions to save, set up and restore frame pointers and
+makes an extra register available in leaf functions.  The option
+\&\fB\-fomit\-frame\-pointer\fR removes the frame pointer for all functions
+which might make debugging harder.
+.IP "\fB\-mspecld\-anomaly\fR" 4
+.IX Item "-mspecld-anomaly"
+When enabled, the compiler will ensure that the generated code does not
+contain speculative loads after jump instructions. If this option is used,
+\&\f(CW\*(C`_\|_WORKAROUND_SPECULATIVE_LOADS\*(C'\fR is defined.
+.IP "\fB\-mno\-specld\-anomaly\fR" 4
+.IX Item "-mno-specld-anomaly"
+Don't generate extra code to prevent speculative loads from occurring.
+.IP "\fB\-mcsync\-anomaly\fR" 4
+.IX Item "-mcsync-anomaly"
+When enabled, the compiler will ensure that the generated code does not
+contain \s-1CSYNC\s0 or \s-1SSYNC\s0 instructions too soon after conditional branches.
+If this option is used, \f(CW\*(C`_\|_WORKAROUND_SPECULATIVE_SYNCS\*(C'\fR is defined.
+.IP "\fB\-mno\-csync\-anomaly\fR" 4
+.IX Item "-mno-csync-anomaly"
+Don't generate extra code to prevent \s-1CSYNC\s0 or \s-1SSYNC\s0 instructions from
+occurring too soon after a conditional branch.
+.IP "\fB\-mlow\-64k\fR" 4
+.IX Item "-mlow-64k"
+When enabled, the compiler is free to take advantage of the knowledge that
+the entire program fits into the low 64k of memory.
+.IP "\fB\-mno\-low\-64k\fR" 4
+.IX Item "-mno-low-64k"
+Assume that the program is arbitrarily large.  This is the default.
+.IP "\fB\-mstack\-check\-l1\fR" 4
+.IX Item "-mstack-check-l1"
+Do stack checking using information placed into L1 scratchpad memory by the
+uClinux kernel.
+.IP "\fB\-mid\-shared\-library\fR" 4
+.IX Item "-mid-shared-library"
+Generate code that supports shared libraries via the library \s-1ID\s0 method.
+This allows for execute in place and shared libraries in an environment
+without virtual memory management.  This option implies \fB\-fPIC\fR.
+With a \fBbfin-elf\fR target, this option implies \fB\-msim\fR.
+.IP "\fB\-mno\-id\-shared\-library\fR" 4
+.IX Item "-mno-id-shared-library"
+Generate code that doesn't assume \s-1ID\s0 based shared libraries are being used.
+This is the default.
+.IP "\fB\-mleaf\-id\-shared\-library\fR" 4
+.IX Item "-mleaf-id-shared-library"
+Generate code that supports shared libraries via the library \s-1ID\s0 method,
+but assumes that this library or executable won't link against any other
+\&\s-1ID\s0 shared libraries.  That allows the compiler to use faster code for jumps
+and calls.
+.IP "\fB\-mno\-leaf\-id\-shared\-library\fR" 4
+.IX Item "-mno-leaf-id-shared-library"
+Do not assume that the code being compiled won't link against any \s-1ID\s0 shared
+libraries.  Slower code will be generated for jump and call insns.
+.IP "\fB\-mshared\-library\-id=n\fR" 4
+.IX Item "-mshared-library-id=n"
+Specified the identification number of the \s-1ID\s0 based shared library being
+compiled.  Specifying a value of 0 will generate more compact code, specifying
+other values will force the allocation of that number to the current
+library but is no more space or time efficient than omitting this option.
+.IP "\fB\-msep\-data\fR" 4
+.IX Item "-msep-data"
+Generate code that allows the data segment to be located in a different
+area of memory from the text segment.  This allows for execute in place in
+an environment without virtual memory management by eliminating relocations
+against the text section.
+.IP "\fB\-mno\-sep\-data\fR" 4
+.IX Item "-mno-sep-data"
+Generate code that assumes that the data segment follows the text segment.
+This is the default.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Tells the compiler to perform function calls by first loading the
+address of the function into a register and then performing a subroutine
+call on this register.  This switch is needed if the target function
+will lie outside of the 24 bit addressing range of the offset based
+version of subroutine call instruction.
+.Sp
+This feature is not enabled by default.  Specifying
+\&\fB\-mno\-long\-calls\fR will restore the default behavior.  Note these
+switches have no effect on how the compiler generates code to handle
+function calls via function pointers.
+.IP "\fB\-mfast\-fp\fR" 4
+.IX Item "-mfast-fp"
+Link with the fast floating-point library. This library relaxes some of
+the \s-1IEEE\s0 floating-point standard's rules for checking inputs against
+Not-a-Number (\s-1NAN\s0), in the interest of performance.
+.IP "\fB\-minline\-plt\fR" 4
+.IX Item "-minline-plt"
+Enable inlining of \s-1PLT\s0 entries in function calls to functions that are
+not known to bind locally.  It has no effect without \fB\-mfdpic\fR.
+.IP "\fB\-mmulticore\fR" 4
+.IX Item "-mmulticore"
+Build standalone application for multicore Blackfin processor. Proper
+start files and link scripts will be used to support multicore.
+This option defines \f(CW\*(C`_\|_BFIN_MULTICORE\*(C'\fR. It can only be used with
+\&\fB\-mcpu=bf561\fR[\fB\-\fR\fIsirevision\fR]. It can be used with
+\&\fB\-mcorea\fR or \fB\-mcoreb\fR. If it's used without
+\&\fB\-mcorea\fR or \fB\-mcoreb\fR, single application/dual core
+programming model is used. In this model, the main function of Core B
+should be named as coreb_main. If it's used with \fB\-mcorea\fR or
+\&\fB\-mcoreb\fR, one application per core programming model is used.
+If this option is not used, single core application programming
+model is used.
+.IP "\fB\-mcorea\fR" 4
+.IX Item "-mcorea"
+Build standalone application for Core A of \s-1BF561\s0 when using
+one application per core programming model. Proper start files
+and link scripts will be used to support Core A. This option
+defines \f(CW\*(C`_\|_BFIN_COREA\*(C'\fR. It must be used with \fB\-mmulticore\fR.
+.IP "\fB\-mcoreb\fR" 4
+.IX Item "-mcoreb"
+Build standalone application for Core B of \s-1BF561\s0 when using
+one application per core programming model. Proper start files
+and link scripts will be used to support Core B. This option
+defines \f(CW\*(C`_\|_BFIN_COREB\*(C'\fR. When this option is used, coreb_main
+should be used instead of main. It must be used with
+\&\fB\-mmulticore\fR.
+.IP "\fB\-msdram\fR" 4
+.IX Item "-msdram"
+Build standalone application for \s-1SDRAM\s0. Proper start files and
+link scripts will be used to put the application into \s-1SDRAM\s0.
+Loader should initialize \s-1SDRAM\s0 before loading the application
+into \s-1SDRAM\s0. This option defines \f(CW\*(C`_\|_BFIN_SDRAM\*(C'\fR.
+.IP "\fB\-micplb\fR" 4
+.IX Item "-micplb"
+Assume that ICPLBs are enabled at runtime.  This has an effect on certain
+anomaly workarounds.  For Linux targets, the default is to assume ICPLBs
+are enabled; for standalone applications the default is off.
+.PP
+\fI\s-1CRIS\s0 Options\fR
+.IX Subsection "CRIS Options"
+.PP
+These options are defined specifically for the \s-1CRIS\s0 ports.
+.IP "\fB\-march=\fR\fIarchitecture-type\fR" 4
+.IX Item "-march=architecture-type"
+.PD 0
+.IP "\fB\-mcpu=\fR\fIarchitecture-type\fR" 4
+.IX Item "-mcpu=architecture-type"
+.PD
+Generate code for the specified architecture.  The choices for
+\&\fIarchitecture-type\fR are \fBv3\fR, \fBv8\fR and \fBv10\fR for
+respectively \s-1ETRAX\s0\ 4, \s-1ETRAX\s0\ 100, and \s-1ETRAX\s0\ 100\ \s-1LX\s0.
+Default is \fBv0\fR except for cris-axis-linux-gnu, where the default is
+\&\fBv10\fR.
+.IP "\fB\-mtune=\fR\fIarchitecture-type\fR" 4
+.IX Item "-mtune=architecture-type"
+Tune to \fIarchitecture-type\fR everything applicable about the generated
+code, except for the \s-1ABI\s0 and the set of available instructions.  The
+choices for \fIarchitecture-type\fR are the same as for
+\&\fB\-march=\fR\fIarchitecture-type\fR.
+.IP "\fB\-mmax\-stack\-frame=\fR\fIn\fR" 4
+.IX Item "-mmax-stack-frame=n"
+Warn when the stack frame of a function exceeds \fIn\fR bytes.
+.IP "\fB\-metrax4\fR" 4
+.IX Item "-metrax4"
+.PD 0
+.IP "\fB\-metrax100\fR" 4
+.IX Item "-metrax100"
+.PD
+The options \fB\-metrax4\fR and \fB\-metrax100\fR are synonyms for
+\&\fB\-march=v3\fR and \fB\-march=v8\fR respectively.
+.IP "\fB\-mmul\-bug\-workaround\fR" 4
+.IX Item "-mmul-bug-workaround"
+.PD 0
+.IP "\fB\-mno\-mul\-bug\-workaround\fR" 4
+.IX Item "-mno-mul-bug-workaround"
+.PD
+Work around a bug in the \f(CW\*(C`muls\*(C'\fR and \f(CW\*(C`mulu\*(C'\fR instructions for \s-1CPU\s0
+models where it applies.  This option is active by default.
+.IP "\fB\-mpdebug\fR" 4
+.IX Item "-mpdebug"
+Enable CRIS-specific verbose debug-related information in the assembly
+code.  This option also has the effect to turn off the \fB#NO_APP\fR
+formatted-code indicator to the assembler at the beginning of the
+assembly file.
+.IP "\fB\-mcc\-init\fR" 4
+.IX Item "-mcc-init"
+Do not use condition-code results from previous instruction; always emit
+compare and test instructions before use of condition codes.
+.IP "\fB\-mno\-side\-effects\fR" 4
+.IX Item "-mno-side-effects"
+Do not emit instructions with side-effects in addressing modes other than
+post-increment.
+.IP "\fB\-mstack\-align\fR" 4
+.IX Item "-mstack-align"
+.PD 0
+.IP "\fB\-mno\-stack\-align\fR" 4
+.IX Item "-mno-stack-align"
+.IP "\fB\-mdata\-align\fR" 4
+.IX Item "-mdata-align"
+.IP "\fB\-mno\-data\-align\fR" 4
+.IX Item "-mno-data-align"
+.IP "\fB\-mconst\-align\fR" 4
+.IX Item "-mconst-align"
+.IP "\fB\-mno\-const\-align\fR" 4
+.IX Item "-mno-const-align"
+.PD
+These options (no-options) arranges (eliminate arrangements) for the
+stack-frame, individual data and constants to be aligned for the maximum
+single data access size for the chosen \s-1CPU\s0 model.  The default is to
+arrange for 32\-bit alignment.  \s-1ABI\s0 details such as structure layout are
+not affected by these options.
+.IP "\fB\-m32\-bit\fR" 4
+.IX Item "-m32-bit"
+.PD 0
+.IP "\fB\-m16\-bit\fR" 4
+.IX Item "-m16-bit"
+.IP "\fB\-m8\-bit\fR" 4
+.IX Item "-m8-bit"
+.PD
+Similar to the stack\- data\- and const-align options above, these options
+arrange for stack-frame, writable data and constants to all be 32\-bit,
+16\-bit or 8\-bit aligned.  The default is 32\-bit alignment.
+.IP "\fB\-mno\-prologue\-epilogue\fR" 4
+.IX Item "-mno-prologue-epilogue"
+.PD 0
+.IP "\fB\-mprologue\-epilogue\fR" 4
+.IX Item "-mprologue-epilogue"
+.PD
+With \fB\-mno\-prologue\-epilogue\fR, the normal function prologue and
+epilogue that sets up the stack-frame are omitted and no return
+instructions or return sequences are generated in the code.  Use this
+option only together with visual inspection of the compiled code: no
+warnings or errors are generated when call-saved registers must be saved,
+or storage for local variable needs to be allocated.
+.IP "\fB\-mno\-gotplt\fR" 4
+.IX Item "-mno-gotplt"
+.PD 0
+.IP "\fB\-mgotplt\fR" 4
+.IX Item "-mgotplt"
+.PD
+With \fB\-fpic\fR and \fB\-fPIC\fR, don't generate (do generate)
+instruction sequences that load addresses for functions from the \s-1PLT\s0 part
+of the \s-1GOT\s0 rather than (traditional on other architectures) calls to the
+\&\s-1PLT\s0.  The default is \fB\-mgotplt\fR.
+.IP "\fB\-melf\fR" 4
+.IX Item "-melf"
+Legacy no-op option only recognized with the cris-axis-elf and
+cris-axis-linux-gnu targets.
+.IP "\fB\-mlinux\fR" 4
+.IX Item "-mlinux"
+Legacy no-op option only recognized with the cris-axis-linux-gnu target.
+.IP "\fB\-sim\fR" 4
+.IX Item "-sim"
+This option, recognized for the cris-axis-elf arranges
+to link with input-output functions from a simulator library.  Code,
+initialized data and zero-initialized data are allocated consecutively.
+.IP "\fB\-sim2\fR" 4
+.IX Item "-sim2"
+Like \fB\-sim\fR, but pass linker options to locate initialized data at
+0x40000000 and zero-initialized data at 0x80000000.
+.PP
+\fI\s-1CRX\s0 Options\fR
+.IX Subsection "CRX Options"
+.PP
+These options are defined specifically for the \s-1CRX\s0 ports.
+.IP "\fB\-mmac\fR" 4
+.IX Item "-mmac"
+Enable the use of multiply-accumulate instructions. Disabled by default.
+.IP "\fB\-mpush\-args\fR" 4
+.IX Item "-mpush-args"
+Push instructions will be used to pass outgoing arguments when functions
+are called. Enabled by default.
+.PP
+\fIDarwin Options\fR
+.IX Subsection "Darwin Options"
+.PP
+These options are defined for all architectures running the Darwin operating
+system.
+.PP
+\&\s-1FSF\s0 \s-1GCC\s0 on Darwin does not create \*(L"fat\*(R" object files; it will create
+an object file for the single architecture that it was built to
+target.  Apple's \s-1GCC\s0 on Darwin does create \*(L"fat\*(R" files if multiple
+\&\fB\-arch\fR options are used; it does so by running the compiler or
+linker multiple times and joining the results together with
+\&\fIlipo\fR.
+.PP
+The subtype of the file created (like \fBppc7400\fR or \fBppc970\fR or
+\&\fBi686\fR) is determined by the flags that specify the \s-1ISA\s0
+that \s-1GCC\s0 is targetting, like \fB\-mcpu\fR or \fB\-march\fR.  The
+\&\fB\-force_cpusubtype_ALL\fR option can be used to override this.
+.PP
+The Darwin tools vary in their behavior when presented with an \s-1ISA\s0
+mismatch.  The assembler, \fIas\fR, will only permit instructions to
+be used that are valid for the subtype of the file it is generating,
+so you cannot put 64\-bit instructions in a \fBppc750\fR object file.
+The linker for shared libraries, \fI/usr/bin/libtool\fR, will fail
+and print an error if asked to create a shared library with a less
+restrictive subtype than its input files (for instance, trying to put
+a \fBppc970\fR object file in a \fBppc7400\fR library).  The linker
+for executables, \fIld\fR, will quietly give the executable the most
+restrictive subtype of any of its input files.
+.IP "\fB\-F\fR\fIdir\fR" 4
+.IX Item "-Fdir"
+Add the framework directory \fIdir\fR to the head of the list of
+directories to be searched for header files.  These directories are
+interleaved with those specified by \fB\-I\fR options and are
+scanned in a left-to-right order.
+.Sp
+A framework directory is a directory with frameworks in it.  A
+framework is a directory with a \fB\*(L"Headers\*(R"\fR and/or
+\&\fB\*(L"PrivateHeaders\*(R"\fR directory contained directly in it that ends
+in \fB\*(L".framework\*(R"\fR.  The name of a framework is the name of this
+directory excluding the \fB\*(L".framework\*(R"\fR.  Headers associated with
+the framework are found in one of those two directories, with
+\&\fB\*(L"Headers\*(R"\fR being searched first.  A subframework is a framework
+directory that is in a framework's \fB\*(L"Frameworks\*(R"\fR directory.
+Includes of subframework headers can only appear in a header of a
+framework that contains the subframework, or in a sibling subframework
+header.  Two subframeworks are siblings if they occur in the same
+framework.  A subframework should not have the same name as a
+framework, a warning will be issued if this is violated.  Currently a
+subframework cannot have subframeworks, in the future, the mechanism
+may be extended to support this.  The standard frameworks can be found
+in \fB\*(L"/System/Library/Frameworks\*(R"\fR and
+\&\fB\*(L"/Library/Frameworks\*(R"\fR.  An example include looks like
+\&\f(CW\*(C`#include <Framework/header.h>\*(C'\fR, where \fBFramework\fR denotes
+the name of the framework and header.h is found in the
+\&\fB\*(L"PrivateHeaders\*(R"\fR or \fB\*(L"Headers\*(R"\fR directory.
+.IP "\fB\-iframework\fR\fIdir\fR" 4
+.IX Item "-iframeworkdir"
+Like \fB\-F\fR except the directory is a treated as a system
+directory.  The main difference between this \fB\-iframework\fR and
+\&\fB\-F\fR is that with \fB\-iframework\fR the compiler does not
+warn about constructs contained within header files found via
+\&\fIdir\fR.  This option is valid only for the C family of languages.
+.IP "\fB\-gused\fR" 4
+.IX Item "-gused"
+Emit debugging information for symbols that are used.  For \s-1STABS\s0
+debugging format, this enables \fB\-feliminate\-unused\-debug\-symbols\fR.
+This is by default \s-1ON\s0.
+.IP "\fB\-gfull\fR" 4
+.IX Item "-gfull"
+Emit debugging information for all symbols and types.
+.IP "\fB\-mmacosx\-version\-min=\fR\fIversion\fR" 4
+.IX Item "-mmacosx-version-min=version"
+The earliest version of MacOS X that this executable will run on
+is \fIversion\fR.  Typical values of \fIversion\fR include \f(CW10.1\fR,
+\&\f(CW10.2\fR, and \f(CW10.3.9\fR.
+.Sp
+If the compiler was built to use the system's headers by default,
+then the default for this option is the system version on which the
+compiler is running, otherwise the default is to make choices which
+are compatible with as many systems and code bases as possible.
+.IP "\fB\-mkernel\fR" 4
+.IX Item "-mkernel"
+Enable kernel development mode.  The \fB\-mkernel\fR option sets
+\&\fB\-static\fR, \fB\-fno\-common\fR, \fB\-fno\-cxa\-atexit\fR,
+\&\fB\-fno\-exceptions\fR, \fB\-fno\-non\-call\-exceptions\fR,
+\&\fB\-fapple\-kext\fR, \fB\-fno\-weak\fR and \fB\-fno\-rtti\fR where
+applicable.  This mode also sets \fB\-mno\-altivec\fR,
+\&\fB\-msoft\-float\fR, \fB\-fno\-builtin\fR and
+\&\fB\-mlong\-branch\fR for PowerPC targets.
+.IP "\fB\-mone\-byte\-bool\fR" 4
+.IX Item "-mone-byte-bool"
+Override the defaults for \fBbool\fR so that \fBsizeof(bool)==1\fR.
+By default \fBsizeof(bool)\fR is \fB4\fR when compiling for
+Darwin/PowerPC and \fB1\fR when compiling for Darwin/x86, so this
+option has no effect on x86.
+.Sp
+\&\fBWarning:\fR The \fB\-mone\-byte\-bool\fR switch causes \s-1GCC\s0
+to generate code that is not binary compatible with code generated
+without that switch.  Using this switch may require recompiling all
+other modules in a program, including system libraries.  Use this
+switch to conform to a non-default data model.
+.IP "\fB\-mfix\-and\-continue\fR" 4
+.IX Item "-mfix-and-continue"
+.PD 0
+.IP "\fB\-ffix\-and\-continue\fR" 4
+.IX Item "-ffix-and-continue"
+.IP "\fB\-findirect\-data\fR" 4
+.IX Item "-findirect-data"
+.PD
+Generate code suitable for fast turn around development.  Needed to
+enable gdb to dynamically load \f(CW\*(C`.o\*(C'\fR files into already running
+programs.  \fB\-findirect\-data\fR and \fB\-ffix\-and\-continue\fR
+are provided for backwards compatibility.
+.IP "\fB\-all_load\fR" 4
+.IX Item "-all_load"
+Loads all members of static archive libraries.
+See man \fIld\fR\|(1) for more information.
+.IP "\fB\-arch_errors_fatal\fR" 4
+.IX Item "-arch_errors_fatal"
+Cause the errors having to do with files that have the wrong architecture
+to be fatal.
+.IP "\fB\-bind_at_load\fR" 4
+.IX Item "-bind_at_load"
+Causes the output file to be marked such that the dynamic linker will
+bind all undefined references when the file is loaded or launched.
+.IP "\fB\-bundle\fR" 4
+.IX Item "-bundle"
+Produce a Mach-o bundle format file.
+See man \fIld\fR\|(1) for more information.
+.IP "\fB\-bundle_loader\fR \fIexecutable\fR" 4
+.IX Item "-bundle_loader executable"
+This option specifies the \fIexecutable\fR that will be loading the build
+output file being linked.  See man \fIld\fR\|(1) for more information.
+.IP "\fB\-dynamiclib\fR" 4
+.IX Item "-dynamiclib"
+When passed this option, \s-1GCC\s0 will produce a dynamic library instead of
+an executable when linking, using the Darwin \fIlibtool\fR command.
+.IP "\fB\-force_cpusubtype_ALL\fR" 4
+.IX Item "-force_cpusubtype_ALL"
+This causes \s-1GCC\s0's output file to have the \fI\s-1ALL\s0\fR subtype, instead of
+one controlled by the \fB\-mcpu\fR or \fB\-march\fR option.
+.IP "\fB\-allowable_client\fR  \fIclient_name\fR" 4
+.IX Item "-allowable_client  client_name"
+.PD 0
+.IP "\fB\-client_name\fR" 4
+.IX Item "-client_name"
+.IP "\fB\-compatibility_version\fR" 4
+.IX Item "-compatibility_version"
+.IP "\fB\-current_version\fR" 4
+.IX Item "-current_version"
+.IP "\fB\-dead_strip\fR" 4
+.IX Item "-dead_strip"
+.IP "\fB\-dependency\-file\fR" 4
+.IX Item "-dependency-file"
+.IP "\fB\-dylib_file\fR" 4
+.IX Item "-dylib_file"
+.IP "\fB\-dylinker_install_name\fR" 4
+.IX Item "-dylinker_install_name"
+.IP "\fB\-dynamic\fR" 4
+.IX Item "-dynamic"
+.IP "\fB\-exported_symbols_list\fR" 4
+.IX Item "-exported_symbols_list"
+.IP "\fB\-filelist\fR" 4
+.IX Item "-filelist"
+.IP "\fB\-flat_namespace\fR" 4
+.IX Item "-flat_namespace"
+.IP "\fB\-force_flat_namespace\fR" 4
+.IX Item "-force_flat_namespace"
+.IP "\fB\-headerpad_max_install_names\fR" 4
+.IX Item "-headerpad_max_install_names"
+.IP "\fB\-image_base\fR" 4
+.IX Item "-image_base"
+.IP "\fB\-init\fR" 4
+.IX Item "-init"
+.IP "\fB\-install_name\fR" 4
+.IX Item "-install_name"
+.IP "\fB\-keep_private_externs\fR" 4
+.IX Item "-keep_private_externs"
+.IP "\fB\-multi_module\fR" 4
+.IX Item "-multi_module"
+.IP "\fB\-multiply_defined\fR" 4
+.IX Item "-multiply_defined"
+.IP "\fB\-multiply_defined_unused\fR" 4
+.IX Item "-multiply_defined_unused"
+.IP "\fB\-noall_load\fR" 4
+.IX Item "-noall_load"
+.IP "\fB\-no_dead_strip_inits_and_terms\fR" 4
+.IX Item "-no_dead_strip_inits_and_terms"
+.IP "\fB\-nofixprebinding\fR" 4
+.IX Item "-nofixprebinding"
+.IP "\fB\-nomultidefs\fR" 4
+.IX Item "-nomultidefs"
+.IP "\fB\-noprebind\fR" 4
+.IX Item "-noprebind"
+.IP "\fB\-noseglinkedit\fR" 4
+.IX Item "-noseglinkedit"
+.IP "\fB\-pagezero_size\fR" 4
+.IX Item "-pagezero_size"
+.IP "\fB\-prebind\fR" 4
+.IX Item "-prebind"
+.IP "\fB\-prebind_all_twolevel_modules\fR" 4
+.IX Item "-prebind_all_twolevel_modules"
+.IP "\fB\-private_bundle\fR" 4
+.IX Item "-private_bundle"
+.IP "\fB\-read_only_relocs\fR" 4
+.IX Item "-read_only_relocs"
+.IP "\fB\-sectalign\fR" 4
+.IX Item "-sectalign"
+.IP "\fB\-sectobjectsymbols\fR" 4
+.IX Item "-sectobjectsymbols"
+.IP "\fB\-whyload\fR" 4
+.IX Item "-whyload"
+.IP "\fB\-seg1addr\fR" 4
+.IX Item "-seg1addr"
+.IP "\fB\-sectcreate\fR" 4
+.IX Item "-sectcreate"
+.IP "\fB\-sectobjectsymbols\fR" 4
+.IX Item "-sectobjectsymbols"
+.IP "\fB\-sectorder\fR" 4
+.IX Item "-sectorder"
+.IP "\fB\-segaddr\fR" 4
+.IX Item "-segaddr"
+.IP "\fB\-segs_read_only_addr\fR" 4
+.IX Item "-segs_read_only_addr"
+.IP "\fB\-segs_read_write_addr\fR" 4
+.IX Item "-segs_read_write_addr"
+.IP "\fB\-seg_addr_table\fR" 4
+.IX Item "-seg_addr_table"
+.IP "\fB\-seg_addr_table_filename\fR" 4
+.IX Item "-seg_addr_table_filename"
+.IP "\fB\-seglinkedit\fR" 4
+.IX Item "-seglinkedit"
+.IP "\fB\-segprot\fR" 4
+.IX Item "-segprot"
+.IP "\fB\-segs_read_only_addr\fR" 4
+.IX Item "-segs_read_only_addr"
+.IP "\fB\-segs_read_write_addr\fR" 4
+.IX Item "-segs_read_write_addr"
+.IP "\fB\-single_module\fR" 4
+.IX Item "-single_module"
+.IP "\fB\-static\fR" 4
+.IX Item "-static"
+.IP "\fB\-sub_library\fR" 4
+.IX Item "-sub_library"
+.IP "\fB\-sub_umbrella\fR" 4
+.IX Item "-sub_umbrella"
+.IP "\fB\-twolevel_namespace\fR" 4
+.IX Item "-twolevel_namespace"
+.IP "\fB\-umbrella\fR" 4
+.IX Item "-umbrella"
+.IP "\fB\-undefined\fR" 4
+.IX Item "-undefined"
+.IP "\fB\-unexported_symbols_list\fR" 4
+.IX Item "-unexported_symbols_list"
+.IP "\fB\-weak_reference_mismatches\fR" 4
+.IX Item "-weak_reference_mismatches"
+.IP "\fB\-whatsloaded\fR" 4
+.IX Item "-whatsloaded"
+.PD
+These options are passed to the Darwin linker.  The Darwin linker man page
+describes them in detail.
+.PP
+\fI\s-1DEC\s0 Alpha Options\fR
+.IX Subsection "DEC Alpha Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha implementations:
+.IP "\fB\-mno\-soft\-float\fR" 4
+.IX Item "-mno-soft-float"
+.PD 0
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD
+Use (do not use) the hardware floating-point instructions for
+floating-point operations.  When \fB\-msoft\-float\fR is specified,
+functions in \fIlibgcc.a\fR will be used to perform floating-point
+operations.  Unless they are replaced by routines that emulate the
+floating-point operations, or compiled in such a way as to call such
+emulations routines, these routines will issue floating-point
+operations.   If you are compiling for an Alpha without floating-point
+operations, you must ensure that the library is built so as not to call
+them.
+.Sp
+Note that Alpha implementations without floating-point operations are
+required to have floating-point registers.
+.IP "\fB\-mfp\-reg\fR" 4
+.IX Item "-mfp-reg"
+.PD 0
+.IP "\fB\-mno\-fp\-regs\fR" 4
+.IX Item "-mno-fp-regs"
+.PD
+Generate code that uses (does not use) the floating-point register set.
+\&\fB\-mno\-fp\-regs\fR implies \fB\-msoft\-float\fR.  If the floating-point
+register set is not used, floating point operands are passed in integer
+registers as if they were integers and floating-point results are passed
+in \f(CW$0\fR instead of \f(CW$f0\fR.  This is a non-standard calling sequence,
+so any function with a floating-point argument or return value called by code
+compiled with \fB\-mno\-fp\-regs\fR must also be compiled with that
+option.
+.Sp
+A typical use of this option is building a kernel that does not use,
+and hence need not save and restore, any floating-point registers.
+.IP "\fB\-mieee\fR" 4
+.IX Item "-mieee"
+The Alpha architecture implements floating-point hardware optimized for
+maximum performance.  It is mostly compliant with the \s-1IEEE\s0 floating
+point standard.  However, for full compliance, software assistance is
+required.  This option generates code fully \s-1IEEE\s0 compliant code
+\&\fIexcept\fR that the \fIinexact-flag\fR is not maintained (see below).
+If this option is turned on, the preprocessor macro \f(CW\*(C`_IEEE_FP\*(C'\fR is
+defined during compilation.  The resulting code is less efficient but is
+able to correctly support denormalized numbers and exceptional \s-1IEEE\s0
+values such as not-a-number and plus/minus infinity.  Other Alpha
+compilers call this option \fB\-ieee_with_no_inexact\fR.
+.IP "\fB\-mieee\-with\-inexact\fR" 4
+.IX Item "-mieee-with-inexact"
+This is like \fB\-mieee\fR except the generated code also maintains
+the \s-1IEEE\s0 \fIinexact-flag\fR.  Turning on this option causes the
+generated code to implement fully-compliant \s-1IEEE\s0 math.  In addition to
+\&\f(CW\*(C`_IEEE_FP\*(C'\fR, \f(CW\*(C`_IEEE_FP_EXACT\*(C'\fR is defined as a preprocessor
+macro.  On some Alpha implementations the resulting code may execute
+significantly slower than the code generated by default.  Since there is
+very little code that depends on the \fIinexact-flag\fR, you should
+normally not specify this option.  Other Alpha compilers call this
+option \fB\-ieee_with_inexact\fR.
+.IP "\fB\-mfp\-trap\-mode=\fR\fItrap-mode\fR" 4
+.IX Item "-mfp-trap-mode=trap-mode"
+This option controls what floating-point related traps are enabled.
+Other Alpha compilers call this option \fB\-fptm\fR \fItrap-mode\fR.
+The trap mode can be set to one of four values:
+.RS 4
+.IP "\fBn\fR" 4
+.IX Item "n"
+This is the default (normal) setting.  The only traps that are enabled
+are the ones that cannot be disabled in software (e.g., division by zero
+trap).
+.IP "\fBu\fR" 4
+.IX Item "u"
+In addition to the traps enabled by \fBn\fR, underflow traps are enabled
+as well.
+.IP "\fBsu\fR" 4
+.IX Item "su"
+Like \fBu\fR, but the instructions are marked to be safe for software
+completion (see Alpha architecture manual for details).
+.IP "\fBsui\fR" 4
+.IX Item "sui"
+Like \fBsu\fR, but inexact traps are enabled as well.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mfp\-rounding\-mode=\fR\fIrounding-mode\fR" 4
+.IX Item "-mfp-rounding-mode=rounding-mode"
+Selects the \s-1IEEE\s0 rounding mode.  Other Alpha compilers call this option
+\&\fB\-fprm\fR \fIrounding-mode\fR.  The \fIrounding-mode\fR can be one
+of:
+.RS 4
+.IP "\fBn\fR" 4
+.IX Item "n"
+Normal \s-1IEEE\s0 rounding mode.  Floating point numbers are rounded towards
+the nearest machine number or towards the even machine number in case
+of a tie.
+.IP "\fBm\fR" 4
+.IX Item "m"
+Round towards minus infinity.
+.IP "\fBc\fR" 4
+.IX Item "c"
+Chopped rounding mode.  Floating point numbers are rounded towards zero.
+.IP "\fBd\fR" 4
+.IX Item "d"
+Dynamic rounding mode.  A field in the floating point control register
+(\fIfpcr\fR, see Alpha architecture reference manual) controls the
+rounding mode in effect.  The C library initializes this register for
+rounding towards plus infinity.  Thus, unless your program modifies the
+\&\fIfpcr\fR, \fBd\fR corresponds to round towards plus infinity.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mtrap\-precision=\fR\fItrap-precision\fR" 4
+.IX Item "-mtrap-precision=trap-precision"
+In the Alpha architecture, floating point traps are imprecise.  This
+means without software assistance it is impossible to recover from a
+floating trap and program execution normally needs to be terminated.
+\&\s-1GCC\s0 can generate code that can assist operating system trap handlers
+in determining the exact location that caused a floating point trap.
+Depending on the requirements of an application, different levels of
+precisions can be selected:
+.RS 4
+.IP "\fBp\fR" 4
+.IX Item "p"
+Program precision.  This option is the default and means a trap handler
+can only identify which program caused a floating point exception.
+.IP "\fBf\fR" 4
+.IX Item "f"
+Function precision.  The trap handler can determine the function that
+caused a floating point exception.
+.IP "\fBi\fR" 4
+.IX Item "i"
+Instruction precision.  The trap handler can determine the exact
+instruction that caused a floating point exception.
+.RE
+.RS 4
+.Sp
+Other Alpha compilers provide the equivalent options called
+\&\fB\-scope_safe\fR and \fB\-resumption_safe\fR.
+.RE
+.IP "\fB\-mieee\-conformant\fR" 4
+.IX Item "-mieee-conformant"
+This option marks the generated code as \s-1IEEE\s0 conformant.  You must not
+use this option unless you also specify \fB\-mtrap\-precision=i\fR and either
+\&\fB\-mfp\-trap\-mode=su\fR or \fB\-mfp\-trap\-mode=sui\fR.  Its only effect
+is to emit the line \fB.eflag 48\fR in the function prologue of the
+generated assembly file.  Under \s-1DEC\s0 Unix, this has the effect that
+IEEE-conformant math library routines will be linked in.
+.IP "\fB\-mbuild\-constants\fR" 4
+.IX Item "-mbuild-constants"
+Normally \s-1GCC\s0 examines a 32\- or 64\-bit integer constant to
+see if it can construct it from smaller constants in two or three
+instructions.  If it cannot, it will output the constant as a literal and
+generate code to load it from the data segment at runtime.
+.Sp
+Use this option to require \s-1GCC\s0 to construct \fIall\fR integer constants
+using code, even if it takes more instructions (the maximum is six).
+.Sp
+You would typically use this option to build a shared library dynamic
+loader.  Itself a shared library, it must relocate itself in memory
+before it can find the variables and constants in its own data segment.
+.IP "\fB\-malpha\-as\fR" 4
+.IX Item "-malpha-as"
+.PD 0
+.IP "\fB\-mgas\fR" 4
+.IX Item "-mgas"
+.PD
+Select whether to generate code to be assembled by the vendor-supplied
+assembler (\fB\-malpha\-as\fR) or by the \s-1GNU\s0 assembler \fB\-mgas\fR.
+.IP "\fB\-mbwx\fR" 4
+.IX Item "-mbwx"
+.PD 0
+.IP "\fB\-mno\-bwx\fR" 4
+.IX Item "-mno-bwx"
+.IP "\fB\-mcix\fR" 4
+.IX Item "-mcix"
+.IP "\fB\-mno\-cix\fR" 4
+.IX Item "-mno-cix"
+.IP "\fB\-mfix\fR" 4
+.IX Item "-mfix"
+.IP "\fB\-mno\-fix\fR" 4
+.IX Item "-mno-fix"
+.IP "\fB\-mmax\fR" 4
+.IX Item "-mmax"
+.IP "\fB\-mno\-max\fR" 4
+.IX Item "-mno-max"
+.PD
+Indicate whether \s-1GCC\s0 should generate code to use the optional \s-1BWX\s0,
+\&\s-1CIX\s0, \s-1FIX\s0 and \s-1MAX\s0 instruction sets.  The default is to use the instruction
+sets supported by the \s-1CPU\s0 type specified via \fB\-mcpu=\fR option or that
+of the \s-1CPU\s0 on which \s-1GCC\s0 was built if none was specified.
+.IP "\fB\-mfloat\-vax\fR" 4
+.IX Item "-mfloat-vax"
+.PD 0
+.IP "\fB\-mfloat\-ieee\fR" 4
+.IX Item "-mfloat-ieee"
+.PD
+Generate code that uses (does not use) \s-1VAX\s0 F and G floating point
+arithmetic instead of \s-1IEEE\s0 single and double precision.
+.IP "\fB\-mexplicit\-relocs\fR" 4
+.IX Item "-mexplicit-relocs"
+.PD 0
+.IP "\fB\-mno\-explicit\-relocs\fR" 4
+.IX Item "-mno-explicit-relocs"
+.PD
+Older Alpha assemblers provided no way to generate symbol relocations
+except via assembler macros.  Use of these macros does not allow
+optimal instruction scheduling.  \s-1GNU\s0 binutils as of version 2.12
+supports a new syntax that allows the compiler to explicitly mark
+which relocations should apply to which instructions.  This option
+is mostly useful for debugging, as \s-1GCC\s0 detects the capabilities of
+the assembler when it is built and sets the default accordingly.
+.IP "\fB\-msmall\-data\fR" 4
+.IX Item "-msmall-data"
+.PD 0
+.IP "\fB\-mlarge\-data\fR" 4
+.IX Item "-mlarge-data"
+.PD
+When \fB\-mexplicit\-relocs\fR is in effect, static data is
+accessed via \fIgp-relative\fR relocations.  When \fB\-msmall\-data\fR
+is used, objects 8 bytes long or smaller are placed in a \fIsmall data area\fR
+(the \f(CW\*(C`.sdata\*(C'\fR and \f(CW\*(C`.sbss\*(C'\fR sections) and are accessed via
+16\-bit relocations off of the \f(CW$gp\fR register.  This limits the
+size of the small data area to 64KB, but allows the variables to be
+directly accessed via a single instruction.
+.Sp
+The default is \fB\-mlarge\-data\fR.  With this option the data area
+is limited to just below 2GB.  Programs that require more than 2GB of
+data must use \f(CW\*(C`malloc\*(C'\fR or \f(CW\*(C`mmap\*(C'\fR to allocate the data in the
+heap instead of in the program's data segment.
+.Sp
+When generating code for shared libraries, \fB\-fpic\fR implies
+\&\fB\-msmall\-data\fR and \fB\-fPIC\fR implies \fB\-mlarge\-data\fR.
+.IP "\fB\-msmall\-text\fR" 4
+.IX Item "-msmall-text"
+.PD 0
+.IP "\fB\-mlarge\-text\fR" 4
+.IX Item "-mlarge-text"
+.PD
+When \fB\-msmall\-text\fR is used, the compiler assumes that the
+code of the entire program (or shared library) fits in 4MB, and is
+thus reachable with a branch instruction.  When \fB\-msmall\-data\fR
+is used, the compiler can assume that all local symbols share the
+same \f(CW$gp\fR value, and thus reduce the number of instructions
+required for a function call from 4 to 1.
+.Sp
+The default is \fB\-mlarge\-text\fR.
+.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
+.IX Item "-mcpu=cpu_type"
+Set the instruction set and instruction scheduling parameters for
+machine type \fIcpu_type\fR.  You can specify either the \fB\s-1EV\s0\fR
+style name or the corresponding chip number.  \s-1GCC\s0 supports scheduling
+parameters for the \s-1EV4\s0, \s-1EV5\s0 and \s-1EV6\s0 family of processors and will
+choose the default values for the instruction set from the processor
+you specify.  If you do not specify a processor type, \s-1GCC\s0 will default
+to the processor on which the compiler was built.
+.Sp
+Supported values for \fIcpu_type\fR are
+.RS 4
+.IP "\fBev4\fR" 4
+.IX Item "ev4"
+.PD 0
+.IP "\fBev45\fR" 4
+.IX Item "ev45"
+.IP "\fB21064\fR" 4
+.IX Item "21064"
+.PD
+Schedules as an \s-1EV4\s0 and has no instruction set extensions.
+.IP "\fBev5\fR" 4
+.IX Item "ev5"
+.PD 0
+.IP "\fB21164\fR" 4
+.IX Item "21164"
+.PD
+Schedules as an \s-1EV5\s0 and has no instruction set extensions.
+.IP "\fBev56\fR" 4
+.IX Item "ev56"
+.PD 0
+.IP "\fB21164a\fR" 4
+.IX Item "21164a"
+.PD
+Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 extension.
+.IP "\fBpca56\fR" 4
+.IX Item "pca56"
+.PD 0
+.IP "\fB21164pc\fR" 4
+.IX Item "21164pc"
+.IP "\fB21164PC\fR" 4
+.IX Item "21164PC"
+.PD
+Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 and \s-1MAX\s0 extensions.
+.IP "\fBev6\fR" 4
+.IX Item "ev6"
+.PD 0
+.IP "\fB21264\fR" 4
+.IX Item "21264"
+.PD
+Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions.
+.IP "\fBev67\fR" 4
+.IX Item "ev67"
+.PD 0
+.IP "\fB21264a\fR" 4
+.IX Item "21264a"
+.PD
+Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1CIX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions.
+.RE
+.RS 4
+.Sp
+Native Linux/GNU toolchains also support the value \fBnative\fR,
+which selects the best architecture option for the host processor.
+\&\fB\-mcpu=native\fR has no effect if \s-1GCC\s0 does not recognize
+the processor.
+.RE
+.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
+.IX Item "-mtune=cpu_type"
+Set only the instruction scheduling parameters for machine type
+\&\fIcpu_type\fR.  The instruction set is not changed.
+.Sp
+Native Linux/GNU toolchains also support the value \fBnative\fR,
+which selects the best architecture option for the host processor.
+\&\fB\-mtune=native\fR has no effect if \s-1GCC\s0 does not recognize
+the processor.
+.IP "\fB\-mmemory\-latency=\fR\fItime\fR" 4
+.IX Item "-mmemory-latency=time"
+Sets the latency the scheduler should assume for typical memory
+references as seen by the application.  This number is highly
+dependent on the memory access patterns used by the application
+and the size of the external cache on the machine.
+.Sp
+Valid options for \fItime\fR are
+.RS 4
+.IP "\fInumber\fR" 4
+.IX Item "number"
+A decimal number representing clock cycles.
+.IP "\fBL1\fR" 4
+.IX Item "L1"
+.PD 0
+.IP "\fBL2\fR" 4
+.IX Item "L2"
+.IP "\fBL3\fR" 4
+.IX Item "L3"
+.IP "\fBmain\fR" 4
+.IX Item "main"
+.PD
+The compiler contains estimates of the number of clock cycles for
+\&\*(L"typical\*(R" \s-1EV4\s0 & \s-1EV5\s0 hardware for the Level 1, 2 & 3 caches
+(also called Dcache, Scache, and Bcache), as well as to main memory.
+Note that L3 is only valid for \s-1EV5\s0.
+.RE
+.RS 4
+.RE
+.PP
+\fI\s-1DEC\s0 Alpha/VMS Options\fR
+.IX Subsection "DEC Alpha/VMS Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha/VMS implementations:
+.IP "\fB\-mvms\-return\-codes\fR" 4
+.IX Item "-mvms-return-codes"
+Return \s-1VMS\s0 condition codes from main.  The default is to return \s-1POSIX\s0
+style condition (e.g. error) codes.
+.IP "\fB\-mdebug\-main=\fR\fIprefix\fR" 4
+.IX Item "-mdebug-main=prefix"
+Flag the first routine whose name starts with \fIprefix\fR as the main
+routine for the debugger.
+.IP "\fB\-mmalloc64\fR" 4
+.IX Item "-mmalloc64"
+Default to 64bit memory allocation routines.
+.PP
+\fI\s-1FR30\s0 Options\fR
+.IX Subsection "FR30 Options"
+.PP
+These options are defined specifically for the \s-1FR30\s0 port.
+.IP "\fB\-msmall\-model\fR" 4
+.IX Item "-msmall-model"
+Use the small address space model.  This can produce smaller code, but
+it does assume that all symbolic values and addresses will fit into a
+20\-bit range.
+.IP "\fB\-mno\-lsim\fR" 4
+.IX Item "-mno-lsim"
+Assume that run-time support has been provided and so there is no need
+to include the simulator library (\fIlibsim.a\fR) on the linker
+command line.
+.PP
+\fI\s-1FRV\s0 Options\fR
+.IX Subsection "FRV Options"
+.IP "\fB\-mgpr\-32\fR" 4
+.IX Item "-mgpr-32"
+Only use the first 32 general purpose registers.
+.IP "\fB\-mgpr\-64\fR" 4
+.IX Item "-mgpr-64"
+Use all 64 general purpose registers.
+.IP "\fB\-mfpr\-32\fR" 4
+.IX Item "-mfpr-32"
+Use only the first 32 floating point registers.
+.IP "\fB\-mfpr\-64\fR" 4
+.IX Item "-mfpr-64"
+Use all 64 floating point registers
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+Use hardware instructions for floating point operations.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Use library routines for floating point operations.
+.IP "\fB\-malloc\-cc\fR" 4
+.IX Item "-malloc-cc"
+Dynamically allocate condition code registers.
+.IP "\fB\-mfixed\-cc\fR" 4
+.IX Item "-mfixed-cc"
+Do not try to dynamically allocate condition code registers, only
+use \f(CW\*(C`icc0\*(C'\fR and \f(CW\*(C`fcc0\*(C'\fR.
+.IP "\fB\-mdword\fR" 4
+.IX Item "-mdword"
+Change \s-1ABI\s0 to use double word insns.
+.IP "\fB\-mno\-dword\fR" 4
+.IX Item "-mno-dword"
+Do not use double word instructions.
+.IP "\fB\-mdouble\fR" 4
+.IX Item "-mdouble"
+Use floating point double instructions.
+.IP "\fB\-mno\-double\fR" 4
+.IX Item "-mno-double"
+Do not use floating point double instructions.
+.IP "\fB\-mmedia\fR" 4
+.IX Item "-mmedia"
+Use media instructions.
+.IP "\fB\-mno\-media\fR" 4
+.IX Item "-mno-media"
+Do not use media instructions.
+.IP "\fB\-mmuladd\fR" 4
+.IX Item "-mmuladd"
+Use multiply and add/subtract instructions.
+.IP "\fB\-mno\-muladd\fR" 4
+.IX Item "-mno-muladd"
+Do not use multiply and add/subtract instructions.
+.IP "\fB\-mfdpic\fR" 4
+.IX Item "-mfdpic"
+Select the \s-1FDPIC\s0 \s-1ABI\s0, that uses function descriptors to represent
+pointers to functions.  Without any PIC/PIE\-related options, it
+implies \fB\-fPIE\fR.  With \fB\-fpic\fR or \fB\-fpie\fR, it
+assumes \s-1GOT\s0 entries and small data are within a 12\-bit range from the
+\&\s-1GOT\s0 base address; with \fB\-fPIC\fR or \fB\-fPIE\fR, \s-1GOT\s0 offsets
+are computed with 32 bits.
+With a \fBbfin-elf\fR target, this option implies \fB\-msim\fR.
+.IP "\fB\-minline\-plt\fR" 4
+.IX Item "-minline-plt"
+Enable inlining of \s-1PLT\s0 entries in function calls to functions that are
+not known to bind locally.  It has no effect without \fB\-mfdpic\fR.
+It's enabled by default if optimizing for speed and compiling for
+shared libraries (i.e., \fB\-fPIC\fR or \fB\-fpic\fR), or when an
+optimization option such as \fB\-O3\fR or above is present in the
+command line.
+.IP "\fB\-mTLS\fR" 4
+.IX Item "-mTLS"
+Assume a large \s-1TLS\s0 segment when generating thread-local code.
+.IP "\fB\-mtls\fR" 4
+.IX Item "-mtls"
+Do not assume a large \s-1TLS\s0 segment when generating thread-local code.
+.IP "\fB\-mgprel\-ro\fR" 4
+.IX Item "-mgprel-ro"
+Enable the use of \f(CW\*(C`GPREL\*(C'\fR relocations in the \s-1FDPIC\s0 \s-1ABI\s0 for data
+that is known to be in read-only sections.  It's enabled by default,
+except for \fB\-fpic\fR or \fB\-fpie\fR: even though it may help
+make the global offset table smaller, it trades 1 instruction for 4.
+With \fB\-fPIC\fR or \fB\-fPIE\fR, it trades 3 instructions for 4,
+one of which may be shared by multiple symbols, and it avoids the need
+for a \s-1GOT\s0 entry for the referenced symbol, so it's more likely to be a
+win.  If it is not, \fB\-mno\-gprel\-ro\fR can be used to disable it.
+.IP "\fB\-multilib\-library\-pic\fR" 4
+.IX Item "-multilib-library-pic"
+Link with the (library, not \s-1FD\s0) pic libraries.  It's implied by
+\&\fB\-mlibrary\-pic\fR, as well as by \fB\-fPIC\fR and
+\&\fB\-fpic\fR without \fB\-mfdpic\fR.  You should never have to use
+it explicitly.
+.IP "\fB\-mlinked\-fp\fR" 4
+.IX Item "-mlinked-fp"
+Follow the \s-1EABI\s0 requirement of always creating a frame pointer whenever
+a stack frame is allocated.  This option is enabled by default and can
+be disabled with \fB\-mno\-linked\-fp\fR.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+Use indirect addressing to call functions outside the current
+compilation unit.  This allows the functions to be placed anywhere
+within the 32\-bit address space.
+.IP "\fB\-malign\-labels\fR" 4
+.IX Item "-malign-labels"
+Try to align labels to an 8\-byte boundary by inserting nops into the
+previous packet.  This option only has an effect when \s-1VLIW\s0 packing
+is enabled.  It doesn't create new packets; it merely adds nops to
+existing ones.
+.IP "\fB\-mlibrary\-pic\fR" 4
+.IX Item "-mlibrary-pic"
+Generate position-independent \s-1EABI\s0 code.
+.IP "\fB\-macc\-4\fR" 4
+.IX Item "-macc-4"
+Use only the first four media accumulator registers.
+.IP "\fB\-macc\-8\fR" 4
+.IX Item "-macc-8"
+Use all eight media accumulator registers.
+.IP "\fB\-mpack\fR" 4
+.IX Item "-mpack"
+Pack \s-1VLIW\s0 instructions.
+.IP "\fB\-mno\-pack\fR" 4
+.IX Item "-mno-pack"
+Do not pack \s-1VLIW\s0 instructions.
+.IP "\fB\-mno\-eflags\fR" 4
+.IX Item "-mno-eflags"
+Do not mark \s-1ABI\s0 switches in e_flags.
+.IP "\fB\-mcond\-move\fR" 4
+.IX Item "-mcond-move"
+Enable the use of conditional-move instructions (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-cond\-move\fR" 4
+.IX Item "-mno-cond-move"
+Disable the use of conditional-move instructions.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mscc\fR" 4
+.IX Item "-mscc"
+Enable the use of conditional set instructions (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-scc\fR" 4
+.IX Item "-mno-scc"
+Disable the use of conditional set instructions.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mcond\-exec\fR" 4
+.IX Item "-mcond-exec"
+Enable the use of conditional execution (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-cond\-exec\fR" 4
+.IX Item "-mno-cond-exec"
+Disable the use of conditional execution.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mvliw\-branch\fR" 4
+.IX Item "-mvliw-branch"
+Run a pass to pack branches into \s-1VLIW\s0 instructions (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-vliw\-branch\fR" 4
+.IX Item "-mno-vliw-branch"
+Do not run a pass to pack branches into \s-1VLIW\s0 instructions.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mmulti\-cond\-exec\fR" 4
+.IX Item "-mmulti-cond-exec"
+Enable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution
+(default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-multi\-cond\-exec\fR" 4
+.IX Item "-mno-multi-cond-exec"
+Disable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mnested\-cond\-exec\fR" 4
+.IX Item "-mnested-cond-exec"
+Enable nested conditional execution optimizations (default).
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-mno\-nested\-cond\-exec\fR" 4
+.IX Item "-mno-nested-cond-exec"
+Disable nested conditional execution optimizations.
+.Sp
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+.IP "\fB\-moptimize\-membar\fR" 4
+.IX Item "-moptimize-membar"
+This switch removes redundant \f(CW\*(C`membar\*(C'\fR instructions from the
+compiler generated code.  It is enabled by default.
+.IP "\fB\-mno\-optimize\-membar\fR" 4
+.IX Item "-mno-optimize-membar"
+This switch disables the automatic removal of redundant \f(CW\*(C`membar\*(C'\fR
+instructions from the generated code.
+.IP "\fB\-mtomcat\-stats\fR" 4
+.IX Item "-mtomcat-stats"
+Cause gas to print out tomcat statistics.
+.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
+.IX Item "-mcpu=cpu"
+Select the processor type for which to generate code.  Possible values are
+\&\fBfrv\fR, \fBfr550\fR, \fBtomcat\fR, \fBfr500\fR, \fBfr450\fR,
+\&\fBfr405\fR, \fBfr400\fR, \fBfr300\fR and \fBsimple\fR.
+.PP
+\fIGNU/Linux Options\fR
+.IX Subsection "GNU/Linux Options"
+.PP
+These \fB\-m\fR options are defined for GNU/Linux targets:
+.IP "\fB\-mglibc\fR" 4
+.IX Item "-mglibc"
+Use the \s-1GNU\s0 C library.  This is the default except
+on \fB*\-*\-linux\-*uclibc*\fR and \fB*\-*\-linux\-*android*\fR targets.
+.IP "\fB\-muclibc\fR" 4
+.IX Item "-muclibc"
+Use uClibc C library.  This is the default on
+\&\fB*\-*\-linux\-*uclibc*\fR targets.
+.IP "\fB\-mbionic\fR" 4
+.IX Item "-mbionic"
+Use Bionic C library.  This is the default on
+\&\fB*\-*\-linux\-*android*\fR targets.
+.IP "\fB\-mandroid\fR" 4
+.IX Item "-mandroid"
+Compile code compatible with Android platform.  This is the default on
+\&\fB*\-*\-linux\-*android*\fR targets.
+.Sp
+When compiling, this option enables \fB\-mbionic\fR, \fB\-fPIC\fR,
+\&\fB\-fno\-exceptions\fR and \fB\-fno\-rtti\fR by default.  When linking,
+this option makes the \s-1GCC\s0 driver pass Android-specific options to the linker.
+Finally, this option causes the preprocessor macro \f(CW\*(C`_\|_ANDROID_\|_\*(C'\fR
+to be defined.
+.IP "\fB\-tno\-android\-cc\fR" 4
+.IX Item "-tno-android-cc"
+Disable compilation effects of \fB\-mandroid\fR, i.e., do not enable
+\&\fB\-mbionic\fR, \fB\-fPIC\fR, \fB\-fno\-exceptions\fR and
+\&\fB\-fno\-rtti\fR by default.
+.IP "\fB\-tno\-android\-ld\fR" 4
+.IX Item "-tno-android-ld"
+Disable linking effects of \fB\-mandroid\fR, i.e., pass standard Linux
+linking options to the linker.
+.PP
+\fIH8/300 Options\fR
+.IX Subsection "H8/300 Options"
+.PP
+These \fB\-m\fR options are defined for the H8/300 implementations:
+.IP "\fB\-mrelax\fR" 4
+.IX Item "-mrelax"
+Shorten some address references at link time, when possible; uses the
+linker option \fB\-relax\fR.
+.IP "\fB\-mh\fR" 4
+.IX Item "-mh"
+Generate code for the H8/300H.
+.IP "\fB\-ms\fR" 4
+.IX Item "-ms"
+Generate code for the H8S.
+.IP "\fB\-mn\fR" 4
+.IX Item "-mn"
+Generate code for the H8S and H8/300H in the normal mode.  This switch
+must be used either with \fB\-mh\fR or \fB\-ms\fR.
+.IP "\fB\-ms2600\fR" 4
+.IX Item "-ms2600"
+Generate code for the H8S/2600.  This switch must be used with \fB\-ms\fR.
+.IP "\fB\-mint32\fR" 4
+.IX Item "-mint32"
+Make \f(CW\*(C`int\*(C'\fR data 32 bits by default.
+.IP "\fB\-malign\-300\fR" 4
+.IX Item "-malign-300"
+On the H8/300H and H8S, use the same alignment rules as for the H8/300.
+The default for the H8/300H and H8S is to align longs and floats on 4
+byte boundaries.
+\&\fB\-malign\-300\fR causes them to be aligned on 2 byte boundaries.
+This option has no effect on the H8/300.
+.PP
+\fI\s-1HPPA\s0 Options\fR
+.IX Subsection "HPPA Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1HPPA\s0 family of computers:
+.IP "\fB\-march=\fR\fIarchitecture-type\fR" 4
+.IX Item "-march=architecture-type"
+Generate code for the specified architecture.  The choices for
+\&\fIarchitecture-type\fR are \fB1.0\fR for \s-1PA\s0 1.0, \fB1.1\fR for \s-1PA\s0
+1.1, and \fB2.0\fR for \s-1PA\s0 2.0 processors.  Refer to
+\&\fI/usr/lib/sched.models\fR on an HP-UX system to determine the proper
+architecture option for your machine.  Code compiled for lower numbered
+architectures will run on higher numbered architectures, but not the
+other way around.
+.IP "\fB\-mpa\-risc\-1\-0\fR" 4
+.IX Item "-mpa-risc-1-0"
+.PD 0
+.IP "\fB\-mpa\-risc\-1\-1\fR" 4
+.IX Item "-mpa-risc-1-1"
+.IP "\fB\-mpa\-risc\-2\-0\fR" 4
+.IX Item "-mpa-risc-2-0"
+.PD
+Synonyms for \fB\-march=1.0\fR, \fB\-march=1.1\fR, and \fB\-march=2.0\fR respectively.
+.IP "\fB\-mbig\-switch\fR" 4
+.IX Item "-mbig-switch"
+Generate code suitable for big switch tables.  Use this option only if
+the assembler/linker complain about out of range branches within a switch
+table.
+.IP "\fB\-mjump\-in\-delay\fR" 4
+.IX Item "-mjump-in-delay"
+Fill delay slots of function calls with unconditional jump instructions
+by modifying the return pointer for the function call to be the target
+of the conditional jump.
+.IP "\fB\-mdisable\-fpregs\fR" 4
+.IX Item "-mdisable-fpregs"
+Prevent floating point registers from being used in any manner.  This is
+necessary for compiling kernels which perform lazy context switching of
+floating point registers.  If you use this option and attempt to perform
+floating point operations, the compiler will abort.
+.IP "\fB\-mdisable\-indexing\fR" 4
+.IX Item "-mdisable-indexing"
+Prevent the compiler from using indexing address modes.  This avoids some
+rather obscure problems when compiling \s-1MIG\s0 generated code under \s-1MACH\s0.
+.IP "\fB\-mno\-space\-regs\fR" 4
+.IX Item "-mno-space-regs"
+Generate code that assumes the target has no space registers.  This allows
+\&\s-1GCC\s0 to generate faster indirect calls and use unscaled index address modes.
+.Sp
+Such code is suitable for level 0 \s-1PA\s0 systems and kernels.
+.IP "\fB\-mfast\-indirect\-calls\fR" 4
+.IX Item "-mfast-indirect-calls"
+Generate code that assumes calls never cross space boundaries.  This
+allows \s-1GCC\s0 to emit code which performs faster indirect calls.
+.Sp
+This option will not work in the presence of shared libraries or nested
+functions.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use.  This is
+useful when compiling kernel code.  A register range is specified as
+two registers separated by a dash.  Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-mlong\-load\-store\fR" 4
+.IX Item "-mlong-load-store"
+Generate 3\-instruction load and store sequences as sometimes required by
+the HP-UX 10 linker.  This is equivalent to the \fB+k\fR option to
+the \s-1HP\s0 compilers.
+.IP "\fB\-mportable\-runtime\fR" 4
+.IX Item "-mportable-runtime"
+Use the portable calling conventions proposed by \s-1HP\s0 for \s-1ELF\s0 systems.
+.IP "\fB\-mgas\fR" 4
+.IX Item "-mgas"
+Enable the use of assembler directives only \s-1GAS\s0 understands.
+.IP "\fB\-mschedule=\fR\fIcpu-type\fR" 4
+.IX Item "-mschedule=cpu-type"
+Schedule code according to the constraints for the machine type
+\&\fIcpu-type\fR.  The choices for \fIcpu-type\fR are \fB700\fR
+\&\fB7100\fR, \fB7100LC\fR, \fB7200\fR, \fB7300\fR and \fB8000\fR.  Refer
+to \fI/usr/lib/sched.models\fR on an HP-UX system to determine the
+proper scheduling option for your machine.  The default scheduling is
+\&\fB8000\fR.
+.IP "\fB\-mlinker\-opt\fR" 4
+.IX Item "-mlinker-opt"
+Enable the optimization pass in the HP-UX linker.  Note this makes symbolic
+debugging impossible.  It also triggers a bug in the HP-UX 8 and HP-UX 9
+linkers in which they give bogus error messages when linking some programs.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Generate output containing library calls for floating point.
+\&\fBWarning:\fR the requisite libraries are not available for all \s-1HPPA\s0
+targets.  Normally the facilities of the machine's usual C compiler are
+used, but this cannot be done directly in cross-compilation.  You must make
+your own arrangements to provide suitable library functions for
+cross-compilation.
+.Sp
+\&\fB\-msoft\-float\fR changes the calling convention in the output file;
+therefore, it is only useful if you compile \fIall\fR of a program with
+this option.  In particular, you need to compile \fIlibgcc.a\fR, the
+library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
+this to work.
+.IP "\fB\-msio\fR" 4
+.IX Item "-msio"
+Generate the predefine, \f(CW\*(C`_SIO\*(C'\fR, for server \s-1IO\s0.  The default is
+\&\fB\-mwsio\fR.  This generates the predefines, \f(CW\*(C`_\|_hp9000s700\*(C'\fR,
+\&\f(CW\*(C`_\|_hp9000s700_\|_\*(C'\fR and \f(CW\*(C`_WSIO\*(C'\fR, for workstation \s-1IO\s0.  These
+options are available under HP-UX and HI-UX.
+.IP "\fB\-mgnu\-ld\fR" 4
+.IX Item "-mgnu-ld"
+Use \s-1GNU\s0 ld specific options.  This passes \fB\-shared\fR to ld when
+building a shared library.  It is the default when \s-1GCC\s0 is configured,
+explicitly or implicitly, with the \s-1GNU\s0 linker.  This option does not
+have any affect on which ld is called, it only changes what parameters
+are passed to that ld.  The ld that is called is determined by the
+\&\fB\-\-with\-ld\fR configure option, \s-1GCC\s0's program search path, and
+finally by the user's \fB\s-1PATH\s0\fR.  The linker used by \s-1GCC\s0 can be printed
+using \fBwhich `gcc \-print\-prog\-name=ld`\fR.  This option is only available
+on the 64 bit HP-UX \s-1GCC\s0, i.e. configured with \fBhppa*64*\-*\-hpux*\fR.
+.IP "\fB\-mhp\-ld\fR" 4
+.IX Item "-mhp-ld"
+Use \s-1HP\s0 ld specific options.  This passes \fB\-b\fR to ld when building
+a shared library and passes \fB+Accept TypeMismatch\fR to ld on all
+links.  It is the default when \s-1GCC\s0 is configured, explicitly or
+implicitly, with the \s-1HP\s0 linker.  This option does not have any affect on
+which ld is called, it only changes what parameters are passed to that
+ld.  The ld that is called is determined by the \fB\-\-with\-ld\fR
+configure option, \s-1GCC\s0's program search path, and finally by the user's
+\&\fB\s-1PATH\s0\fR.  The linker used by \s-1GCC\s0 can be printed using \fBwhich
+`gcc \-print\-prog\-name=ld`\fR.  This option is only available on the 64 bit
+HP-UX \s-1GCC\s0, i.e. configured with \fBhppa*64*\-*\-hpux*\fR.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+Generate code that uses long call sequences.  This ensures that a call
+is always able to reach linker generated stubs.  The default is to generate
+long calls only when the distance from the call site to the beginning
+of the function or translation unit, as the case may be, exceeds a
+predefined limit set by the branch type being used.  The limits for
+normal calls are 7,600,000 and 240,000 bytes, respectively for the
+\&\s-1PA\s0 2.0 and \s-1PA\s0 1.X architectures.  Sibcalls are always limited at
+240,000 bytes.
+.Sp
+Distances are measured from the beginning of functions when using the
+\&\fB\-ffunction\-sections\fR option, or when using the \fB\-mgas\fR
+and \fB\-mno\-portable\-runtime\fR options together under HP-UX with
+the \s-1SOM\s0 linker.
+.Sp
+It is normally not desirable to use this option as it will degrade
+performance.  However, it may be useful in large applications,
+particularly when partial linking is used to build the application.
+.Sp
+The types of long calls used depends on the capabilities of the
+assembler and linker, and the type of code being generated.  The
+impact on systems that support long absolute calls, and long pic
+symbol-difference or pc-relative calls should be relatively small.
+However, an indirect call is used on 32\-bit \s-1ELF\s0 systems in pic code
+and it is quite long.
+.IP "\fB\-munix=\fR\fIunix-std\fR" 4
+.IX Item "-munix=unix-std"
+Generate compiler predefines and select a startfile for the specified
+\&\s-1UNIX\s0 standard.  The choices for \fIunix-std\fR are \fB93\fR, \fB95\fR
+and \fB98\fR.  \fB93\fR is supported on all HP-UX versions.  \fB95\fR
+is available on HP-UX 10.10 and later.  \fB98\fR is available on HP-UX
+11.11 and later.  The default values are \fB93\fR for HP-UX 10.00,
+\&\fB95\fR for HP-UX 10.10 though to 11.00, and \fB98\fR for HP-UX 11.11
+and later.
+.Sp
+\&\fB\-munix=93\fR provides the same predefines as \s-1GCC\s0 3.3 and 3.4.
+\&\fB\-munix=95\fR provides additional predefines for \f(CW\*(C`XOPEN_UNIX\*(C'\fR
+and \f(CW\*(C`_XOPEN_SOURCE_EXTENDED\*(C'\fR, and the startfile \fIunix95.o\fR.
+\&\fB\-munix=98\fR provides additional predefines for \f(CW\*(C`_XOPEN_UNIX\*(C'\fR,
+\&\f(CW\*(C`_XOPEN_SOURCE_EXTENDED\*(C'\fR, \f(CW\*(C`_INCLUDE_\|_STDC_A1_SOURCE\*(C'\fR and
+\&\f(CW\*(C`_INCLUDE_XOPEN_SOURCE_500\*(C'\fR, and the startfile \fIunix98.o\fR.
+.Sp
+It is \fIimportant\fR to note that this option changes the interfaces
+for various library routines.  It also affects the operational behavior
+of the C library.  Thus, \fIextreme\fR care is needed in using this
+option.
+.Sp
+Library code that is intended to operate with more than one \s-1UNIX\s0
+standard must test, set and restore the variable \fI_\|_xpg4_extended_mask\fR
+as appropriate.  Most \s-1GNU\s0 software doesn't provide this capability.
+.IP "\fB\-nolibdld\fR" 4
+.IX Item "-nolibdld"
+Suppress the generation of link options to search libdld.sl when the
+\&\fB\-static\fR option is specified on HP-UX 10 and later.
+.IP "\fB\-static\fR" 4
+.IX Item "-static"
+The HP-UX implementation of setlocale in libc has a dependency on
+libdld.sl.  There isn't an archive version of libdld.sl.  Thus,
+when the \fB\-static\fR option is specified, special link options
+are needed to resolve this dependency.
+.Sp
+On HP-UX 10 and later, the \s-1GCC\s0 driver adds the necessary options to
+link with libdld.sl when the \fB\-static\fR option is specified.
+This causes the resulting binary to be dynamic.  On the 64\-bit port,
+the linkers generate dynamic binaries by default in any case.  The
+\&\fB\-nolibdld\fR option can be used to prevent the \s-1GCC\s0 driver from
+adding these link options.
+.IP "\fB\-threads\fR" 4
+.IX Item "-threads"
+Add support for multithreading with the \fIdce thread\fR library
+under HP-UX.  This option sets flags for both the preprocessor and
+linker.
+.PP
+\fIIntel 386 and \s-1AMD\s0 x86\-64 Options\fR
+.IX Subsection "Intel 386 and AMD x86-64 Options"
+.PP
+These \fB\-m\fR options are defined for the i386 and x86\-64 family of
+computers:
+.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
+.IX Item "-mtune=cpu-type"
+Tune to \fIcpu-type\fR everything applicable about the generated code, except
+for the \s-1ABI\s0 and the set of available instructions.  The choices for
+\&\fIcpu-type\fR are:
+.RS 4
+.IP "\fIgeneric\fR" 4
+.IX Item "generic"
+Produce code optimized for the most common \s-1IA32/AMD64/EM64T\s0 processors.
+If you know the \s-1CPU\s0 on which your code will run, then you should use
+the corresponding \fB\-mtune\fR option instead of
+\&\fB\-mtune=generic\fR.  But, if you do not know exactly what \s-1CPU\s0 users
+of your application will have, then you should use this option.
+.Sp
+As new processors are deployed in the marketplace, the behavior of this
+option will change.  Therefore, if you upgrade to a newer version of
+\&\s-1GCC\s0, the code generated option will change to reflect the processors
+that were most common when that version of \s-1GCC\s0 was released.
+.Sp
+There is no \fB\-march=generic\fR option because \fB\-march\fR
+indicates the instruction set the compiler can use, and there is no
+generic instruction set applicable to all processors.  In contrast,
+\&\fB\-mtune\fR indicates the processor (or, in this case, collection of
+processors) for which the code is optimized.
+.IP "\fInative\fR" 4
+.IX Item "native"
+This selects the \s-1CPU\s0 to tune for at compilation time by determining
+the processor type of the compiling machine.  Using \fB\-mtune=native\fR
+will produce code optimized for the local machine under the constraints
+of the selected instruction set.  Using \fB\-march=native\fR will
+enable all instruction subsets supported by the local machine (hence
+the result might not run on different machines).
+.IP "\fIi386\fR" 4
+.IX Item "i386"
+Original Intel's i386 \s-1CPU\s0.
+.IP "\fIi486\fR" 4
+.IX Item "i486"
+Intel's i486 \s-1CPU\s0.  (No scheduling is implemented for this chip.)
+.IP "\fIi586, pentium\fR" 4
+.IX Item "i586, pentium"
+Intel Pentium \s-1CPU\s0 with no \s-1MMX\s0 support.
+.IP "\fIpentium-mmx\fR" 4
+.IX Item "pentium-mmx"
+Intel PentiumMMX \s-1CPU\s0 based on Pentium core with \s-1MMX\s0 instruction set support.
+.IP "\fIpentiumpro\fR" 4
+.IX Item "pentiumpro"
+Intel PentiumPro \s-1CPU\s0.
+.IP "\fIi686\fR" 4
+.IX Item "i686"
+Same as \f(CW\*(C`generic\*(C'\fR, but when used as \f(CW\*(C`march\*(C'\fR option, PentiumPro
+instruction set will be used, so the code will run on all i686 family chips.
+.IP "\fIpentium2\fR" 4
+.IX Item "pentium2"
+Intel Pentium2 \s-1CPU\s0 based on PentiumPro core with \s-1MMX\s0 instruction set support.
+.IP "\fIpentium3, pentium3m\fR" 4
+.IX Item "pentium3, pentium3m"
+Intel Pentium3 \s-1CPU\s0 based on PentiumPro core with \s-1MMX\s0 and \s-1SSE\s0 instruction set
+support.
+.IP "\fIpentium-m\fR" 4
+.IX Item "pentium-m"
+Low power version of Intel Pentium3 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set
+support.  Used by Centrino notebooks.
+.IP "\fIpentium4, pentium4m\fR" 4
+.IX Item "pentium4, pentium4m"
+Intel Pentium4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set support.
+.IP "\fIprescott\fR" 4
+.IX Item "prescott"
+Improved version of Intel Pentium4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0 and \s-1SSE3\s0 instruction
+set support.
+.IP "\fInocona\fR" 4
+.IX Item "nocona"
+Improved version of Intel Pentium4 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0,
+\&\s-1SSE2\s0 and \s-1SSE3\s0 instruction set support.
+.IP "\fIcore2\fR" 4
+.IX Item "core2"
+Intel Core2 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0 and \s-1SSSE3\s0
+instruction set support.
+.IP "\fIcorei7\fR" 4
+.IX Item "corei7"
+Intel Core i7 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSSE3\s0, \s-1SSE4\s0.1
+and \s-1SSE4\s0.2 instruction set support.
+.IP "\fIcorei7\-avx\fR" 4
+.IX Item "corei7-avx"
+Intel Core i7 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSSE3\s0,
+\&\s-1SSE4\s0.1, \s-1SSE4\s0.2, \s-1AVX\s0, \s-1AES\s0 and \s-1PCLMUL\s0 instruction set support.
+.IP "\fIcore-avx-i\fR" 4
+.IX Item "core-avx-i"
+Intel Core \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSSE3\s0,
+\&\s-1SSE4\s0.1, \s-1SSE4\s0.2, \s-1AVX\s0, \s-1AES\s0, \s-1PCLMUL\s0, \s-1FSGSBASE\s0, \s-1RDRND\s0 and F16C instruction
+set support.
+.IP "\fIatom\fR" 4
+.IX Item "atom"
+Intel Atom \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0 and \s-1SSSE3\s0
+instruction set support.
+.IP "\fIk6\fR" 4
+.IX Item "k6"
+\&\s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 instruction set support.
+.IP "\fIk6\-2, k6\-3\fR" 4
+.IX Item "k6-2, k6-3"
+Improved versions of \s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 and 3DNow! instruction set support.
+.IP "\fIathlon, athlon-tbird\fR" 4
+.IX Item "athlon, athlon-tbird"
+\&\s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3dNOW!, enhanced 3DNow! and \s-1SSE\s0 prefetch instructions
+support.
+.IP "\fIathlon\-4, athlon-xp, athlon-mp\fR" 4
+.IX Item "athlon-4, athlon-xp, athlon-mp"
+Improved \s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3DNow!, enhanced 3DNow! and full \s-1SSE\s0
+instruction set support.
+.IP "\fIk8, opteron, athlon64, athlon-fx\fR" 4
+.IX Item "k8, opteron, athlon64, athlon-fx"
+\&\s-1AMD\s0 K8 core based CPUs with x86\-64 instruction set support.  (This supersets
+\&\s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, 3DNow!, enhanced 3DNow! and 64\-bit instruction set extensions.)
+.IP "\fIk8\-sse3, opteron\-sse3, athlon64\-sse3\fR" 4
+.IX Item "k8-sse3, opteron-sse3, athlon64-sse3"
+Improved versions of k8, opteron and athlon64 with \s-1SSE3\s0 instruction set support.
+.IP "\fIamdfam10, barcelona\fR" 4
+.IX Item "amdfam10, barcelona"
+\&\s-1AMD\s0 Family 10h core based CPUs with x86\-64 instruction set support.  (This
+supersets \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSE4A\s0, 3DNow!, enhanced 3DNow!, \s-1ABM\s0 and 64\-bit
+instruction set extensions.)
+.IP "\fIwinchip\-c6\fR" 4
+.IX Item "winchip-c6"
+\&\s-1IDT\s0 Winchip C6 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 instruction
+set support.
+.IP "\fIwinchip2\fR" 4
+.IX Item "winchip2"
+\&\s-1IDT\s0 Winchip2 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 and 3DNow!
+instruction set support.
+.IP "\fIc3\fR" 4
+.IX Item "c3"
+Via C3 \s-1CPU\s0 with \s-1MMX\s0 and 3DNow! instruction set support.  (No scheduling is
+implemented for this chip.)
+.IP "\fIc3\-2\fR" 4
+.IX Item "c3-2"
+Via C3\-2 \s-1CPU\s0 with \s-1MMX\s0 and \s-1SSE\s0 instruction set support.  (No scheduling is
+implemented for this chip.)
+.IP "\fIgeode\fR" 4
+.IX Item "geode"
+Embedded \s-1AMD\s0 \s-1CPU\s0 with \s-1MMX\s0 and 3DNow! instruction set support.
+.RE
+.RS 4
+.Sp
+While picking a specific \fIcpu-type\fR will schedule things appropriately
+for that particular chip, the compiler will not generate any code that
+does not run on the i386 without the \fB\-march=\fR\fIcpu-type\fR option
+being used.
+.RE
+.IP "\fB\-march=\fR\fIcpu-type\fR" 4
+.IX Item "-march=cpu-type"
+Generate instructions for the machine type \fIcpu-type\fR.  The choices
+for \fIcpu-type\fR are the same as for \fB\-mtune\fR.  Moreover,
+specifying \fB\-march=\fR\fIcpu-type\fR implies \fB\-mtune=\fR\fIcpu-type\fR.
+.IP "\fB\-mcpu=\fR\fIcpu-type\fR" 4
+.IX Item "-mcpu=cpu-type"
+A deprecated synonym for \fB\-mtune\fR.
+.IP "\fB\-mfpmath=\fR\fIunit\fR" 4
+.IX Item "-mfpmath=unit"
+Generate floating point arithmetics for selected unit \fIunit\fR.  The choices
+for \fIunit\fR are:
+.RS 4
+.IP "\fB387\fR" 4
+.IX Item "387"
+Use the standard 387 floating point coprocessor present majority of chips and
+emulated otherwise.  Code compiled with this option will run almost everywhere.
+The temporary results are computed in 80bit precision instead of precision
+specified by the type resulting in slightly different results compared to most
+of other chips.  See \fB\-ffloat\-store\fR for more detailed description.
+.Sp
+This is the default choice for i386 compiler.
+.IP "\fBsse\fR" 4
+.IX Item "sse"
+Use scalar floating point instructions present in the \s-1SSE\s0 instruction set.
+This instruction set is supported by Pentium3 and newer chips, in the \s-1AMD\s0 line
+by Athlon\-4, Athlon-xp and Athlon-mp chips.  The earlier version of \s-1SSE\s0
+instruction set supports only single precision arithmetics, thus the double and
+extended precision arithmetics is still done using 387.  Later version, present
+only in Pentium4 and the future \s-1AMD\s0 x86\-64 chips supports double precision
+arithmetics too.
+.Sp
+For the i386 compiler, you need to use \fB\-march=\fR\fIcpu-type\fR, \fB\-msse\fR
+or \fB\-msse2\fR switches to enable \s-1SSE\s0 extensions and make this option
+effective.  For the x86\-64 compiler, these extensions are enabled by default.
+.Sp
+The resulting code should be considerably faster in the majority of cases and avoid
+the numerical instability problems of 387 code, but may break some existing
+code that expects temporaries to be 80bit.
+.Sp
+This is the default choice for the x86\-64 compiler.
+.IP "\fBsse,387\fR" 4
+.IX Item "sse,387"
+.PD 0
+.IP "\fBsse+387\fR" 4
+.IX Item "sse+387"
+.IP "\fBboth\fR" 4
+.IX Item "both"
+.PD
+Attempt to utilize both instruction sets at once.  This effectively double the
+amount of available registers and on chips with separate execution units for
+387 and \s-1SSE\s0 the execution resources too.  Use this option with care, as it is
+still experimental, because the \s-1GCC\s0 register allocator does not model separate
+functional units well resulting in instable performance.
+.RE
+.RS 4
+.RE
+.IP "\fB\-masm=\fR\fIdialect\fR" 4
+.IX Item "-masm=dialect"
+Output asm instructions using selected \fIdialect\fR.  Supported
+choices are \fBintel\fR or \fBatt\fR (the default one).  Darwin does
+not support \fBintel\fR.
+.IP "\fB\-mieee\-fp\fR" 4
+.IX Item "-mieee-fp"
+.PD 0
+.IP "\fB\-mno\-ieee\-fp\fR" 4
+.IX Item "-mno-ieee-fp"
+.PD
+Control whether or not the compiler uses \s-1IEEE\s0 floating point
+comparisons.  These handle correctly the case where the result of a
+comparison is unordered.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Generate output containing library calls for floating point.
+\&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0.
+Normally the facilities of the machine's usual C compiler are used, but
+this can't be done directly in cross-compilation.  You must make your
+own arrangements to provide suitable library functions for
+cross-compilation.
+.Sp
+On machines where a function returns floating point results in the 80387
+register stack, some floating point opcodes may be emitted even if
+\&\fB\-msoft\-float\fR is used.
+.IP "\fB\-mno\-fp\-ret\-in\-387\fR" 4
+.IX Item "-mno-fp-ret-in-387"
+Do not use the \s-1FPU\s0 registers for return values of functions.
+.Sp
+The usual calling convention has functions return values of types
+\&\f(CW\*(C`float\*(C'\fR and \f(CW\*(C`double\*(C'\fR in an \s-1FPU\s0 register, even if there
+is no \s-1FPU\s0.  The idea is that the operating system should emulate
+an \s-1FPU\s0.
+.Sp
+The option \fB\-mno\-fp\-ret\-in\-387\fR causes such values to be returned
+in ordinary \s-1CPU\s0 registers instead.
+.IP "\fB\-mno\-fancy\-math\-387\fR" 4
+.IX Item "-mno-fancy-math-387"
+Some 387 emulators do not support the \f(CW\*(C`sin\*(C'\fR, \f(CW\*(C`cos\*(C'\fR and
+\&\f(CW\*(C`sqrt\*(C'\fR instructions for the 387.  Specify this option to avoid
+generating those instructions.  This option is the default on FreeBSD,
+OpenBSD and NetBSD.  This option is overridden when \fB\-march\fR
+indicates that the target \s-1CPU\s0 will always have an \s-1FPU\s0 and so the
+instruction will not need emulation.  As of revision 2.6.1, these
+instructions are not generated unless you also use the
+\&\fB\-funsafe\-math\-optimizations\fR switch.
+.IP "\fB\-malign\-double\fR" 4
+.IX Item "-malign-double"
+.PD 0
+.IP "\fB\-mno\-align\-double\fR" 4
+.IX Item "-mno-align-double"
+.PD
+Control whether \s-1GCC\s0 aligns \f(CW\*(C`double\*(C'\fR, \f(CW\*(C`long double\*(C'\fR, and
+\&\f(CW\*(C`long long\*(C'\fR variables on a two word boundary or a one word
+boundary.  Aligning \f(CW\*(C`double\*(C'\fR variables on a two word boundary will
+produce code that runs somewhat faster on a \fBPentium\fR at the
+expense of more memory.
+.Sp
+On x86\-64, \fB\-malign\-double\fR is enabled by default.
+.Sp
+\&\fBWarning:\fR if you use the \fB\-malign\-double\fR switch,
+structures containing the above types will be aligned differently than
+the published application binary interface specifications for the 386
+and will not be binary compatible with structures in code compiled
+without that switch.
+.IP "\fB\-m96bit\-long\-double\fR" 4
+.IX Item "-m96bit-long-double"
+.PD 0
+.IP "\fB\-m128bit\-long\-double\fR" 4
+.IX Item "-m128bit-long-double"
+.PD
+These switches control the size of \f(CW\*(C`long double\*(C'\fR type.  The i386
+application binary interface specifies the size to be 96 bits,
+so \fB\-m96bit\-long\-double\fR is the default in 32 bit mode.
+.Sp
+Modern architectures (Pentium and newer) would prefer \f(CW\*(C`long double\*(C'\fR
+to be aligned to an 8 or 16 byte boundary.  In arrays or structures
+conforming to the \s-1ABI\s0, this would not be possible.  So specifying a
+\&\fB\-m128bit\-long\-double\fR will align \f(CW\*(C`long double\*(C'\fR
+to a 16 byte boundary by padding the \f(CW\*(C`long double\*(C'\fR with an additional
+32 bit zero.
+.Sp
+In the x86\-64 compiler, \fB\-m128bit\-long\-double\fR is the default choice as
+its \s-1ABI\s0 specifies that \f(CW\*(C`long double\*(C'\fR is to be aligned on 16 byte boundary.
+.Sp
+Notice that neither of these options enable any extra precision over the x87
+standard of 80 bits for a \f(CW\*(C`long double\*(C'\fR.
+.Sp
+\&\fBWarning:\fR if you override the default value for your target \s-1ABI\s0, the
+structures and arrays containing \f(CW\*(C`long double\*(C'\fR variables will change
+their size as well as function calling convention for function taking
+\&\f(CW\*(C`long double\*(C'\fR will be modified.  Hence they will not be binary
+compatible with arrays or structures in code compiled without that switch.
+.IP "\fB\-mlarge\-data\-threshold=\fR\fInumber\fR" 4
+.IX Item "-mlarge-data-threshold=number"
+When \fB\-mcmodel=medium\fR is specified, the data greater than
+\&\fIthreshold\fR are placed in large data section.  This value must be the
+same across all object linked into the binary and defaults to 65535.
+.IP "\fB\-mrtd\fR" 4
+.IX Item "-mrtd"
+Use a different function-calling convention, in which functions that
+take a fixed number of arguments return with the \f(CW\*(C`ret\*(C'\fR \fInum\fR
+instruction, which pops their arguments while returning.  This saves one
+instruction in the caller since there is no need to pop the arguments
+there.
+.Sp
+You can specify that an individual function is called with this calling
+sequence with the function attribute \fBstdcall\fR.  You can also
+override the \fB\-mrtd\fR option by using the function attribute
+\&\fBcdecl\fR.
+.Sp
+\&\fBWarning:\fR this calling convention is incompatible with the one
+normally used on Unix, so you cannot use it if you need to call
+libraries compiled with the Unix compiler.
+.Sp
+Also, you must provide function prototypes for all functions that
+take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR);
+otherwise incorrect code will be generated for calls to those
+functions.
+.Sp
+In addition, seriously incorrect code will result if you call a
+function with too many arguments.  (Normally, extra arguments are
+harmlessly ignored.)
+.IP "\fB\-mregparm=\fR\fInum\fR" 4
+.IX Item "-mregparm=num"
+Control how many registers are used to pass integer arguments.  By
+default, no registers are used to pass arguments, and at most 3
+registers can be used.  You can control this behavior for a specific
+function by using the function attribute \fBregparm\fR.
+.Sp
+\&\fBWarning:\fR if you use this switch, and
+\&\fInum\fR is nonzero, then you must build all modules with the same
+value, including any libraries.  This includes the system libraries and
+startup modules.
+.IP "\fB\-msseregparm\fR" 4
+.IX Item "-msseregparm"
+Use \s-1SSE\s0 register passing conventions for float and double arguments
+and return values.  You can control this behavior for a specific
+function by using the function attribute \fBsseregparm\fR.
+.Sp
+\&\fBWarning:\fR if you use this switch then you must build all
+modules with the same value, including any libraries.  This includes
+the system libraries and startup modules.
+.IP "\fB\-mvect8\-ret\-in\-mem\fR" 4
+.IX Item "-mvect8-ret-in-mem"
+Return 8\-byte vectors in memory instead of \s-1MMX\s0 registers.  This is the
+default on Solaris@tie{}8 and 9 and VxWorks to match the \s-1ABI\s0 of the Sun
+Studio compilers until version 12.  Later compiler versions (starting
+with Studio 12 Update@tie{}1) follow the \s-1ABI\s0 used by other x86 targets, which
+is the default on Solaris@tie{}10 and later.  \fIOnly\fR use this option if
+you need to remain compatible with existing code produced by those
+previous compiler versions or older versions of \s-1GCC\s0.
+.IP "\fB\-mpc32\fR" 4
+.IX Item "-mpc32"
+.PD 0
+.IP "\fB\-mpc64\fR" 4
+.IX Item "-mpc64"
+.IP "\fB\-mpc80\fR" 4
+.IX Item "-mpc80"
+.PD
+Set 80387 floating-point precision to 32, 64 or 80 bits.  When \fB\-mpc32\fR
+is specified, the significands of results of floating-point operations are
+rounded to 24 bits (single precision); \fB\-mpc64\fR rounds the
+significands of results of floating-point operations to 53 bits (double
+precision) and \fB\-mpc80\fR rounds the significands of results of
+floating-point operations to 64 bits (extended double precision), which is
+the default.  When this option is used, floating-point operations in higher
+precisions are not available to the programmer without setting the \s-1FPU\s0
+control word explicitly.
+.Sp
+Setting the rounding of floating-point operations to less than the default
+80 bits can speed some programs by 2% or more.  Note that some mathematical
+libraries assume that extended precision (80 bit) floating-point operations
+are enabled by default; routines in such libraries could suffer significant
+loss of accuracy, typically through so-called \*(L"catastrophic cancellation\*(R",
+when this option is used to set the precision to less than extended precision.
+.IP "\fB\-mstackrealign\fR" 4
+.IX Item "-mstackrealign"
+Realign the stack at entry.  On the Intel x86, the \fB\-mstackrealign\fR
+option will generate an alternate prologue and epilogue that realigns the
+runtime stack if necessary.  This supports mixing legacy codes that keep
+a 4\-byte aligned stack with modern codes that keep a 16\-byte stack for
+\&\s-1SSE\s0 compatibility.  See also the attribute \f(CW\*(C`force_align_arg_pointer\*(C'\fR,
+applicable to individual functions.
+.IP "\fB\-mpreferred\-stack\-boundary=\fR\fInum\fR" 4
+.IX Item "-mpreferred-stack-boundary=num"
+Attempt to keep the stack boundary aligned to a 2 raised to \fInum\fR
+byte boundary.  If \fB\-mpreferred\-stack\-boundary\fR is not specified,
+the default is 4 (16 bytes or 128 bits).
+.IP "\fB\-mincoming\-stack\-boundary=\fR\fInum\fR" 4
+.IX Item "-mincoming-stack-boundary=num"
+Assume the incoming stack is aligned to a 2 raised to \fInum\fR byte
+boundary.  If \fB\-mincoming\-stack\-boundary\fR is not specified,
+the one specified by \fB\-mpreferred\-stack\-boundary\fR will be used.
+.Sp
+On Pentium and PentiumPro, \f(CW\*(C`double\*(C'\fR and \f(CW\*(C`long double\*(C'\fR values
+should be aligned to an 8 byte boundary (see \fB\-malign\-double\fR) or
+suffer significant run time performance penalties.  On Pentium \s-1III\s0, the
+Streaming \s-1SIMD\s0 Extension (\s-1SSE\s0) data type \f(CW\*(C`_\|_m128\*(C'\fR may not work
+properly if it is not 16 byte aligned.
+.Sp
+To ensure proper alignment of this values on the stack, the stack boundary
+must be as aligned as that required by any value stored on the stack.
+Further, every function must be generated such that it keeps the stack
+aligned.  Thus calling a function compiled with a higher preferred
+stack boundary from a function compiled with a lower preferred stack
+boundary will most likely misalign the stack.  It is recommended that
+libraries that use callbacks always use the default setting.
+.Sp
+This extra alignment does consume extra stack space, and generally
+increases code size.  Code that is sensitive to stack space usage, such
+as embedded systems and operating system kernels, may want to reduce the
+preferred alignment to \fB\-mpreferred\-stack\-boundary=2\fR.
+.IP "\fB\-mmmx\fR" 4
+.IX Item "-mmmx"
+.PD 0
+.IP "\fB\-mno\-mmx\fR" 4
+.IX Item "-mno-mmx"
+.IP "\fB\-msse\fR" 4
+.IX Item "-msse"
+.IP "\fB\-mno\-sse\fR" 4
+.IX Item "-mno-sse"
+.IP "\fB\-msse2\fR" 4
+.IX Item "-msse2"
+.IP "\fB\-mno\-sse2\fR" 4
+.IX Item "-mno-sse2"
+.IP "\fB\-msse3\fR" 4
+.IX Item "-msse3"
+.IP "\fB\-mno\-sse3\fR" 4
+.IX Item "-mno-sse3"
+.IP "\fB\-mssse3\fR" 4
+.IX Item "-mssse3"
+.IP "\fB\-mno\-ssse3\fR" 4
+.IX Item "-mno-ssse3"
+.IP "\fB\-msse4.1\fR" 4
+.IX Item "-msse4.1"
+.IP "\fB\-mno\-sse4.1\fR" 4
+.IX Item "-mno-sse4.1"
+.IP "\fB\-msse4.2\fR" 4
+.IX Item "-msse4.2"
+.IP "\fB\-mno\-sse4.2\fR" 4
+.IX Item "-mno-sse4.2"
+.IP "\fB\-msse4\fR" 4
+.IX Item "-msse4"
+.IP "\fB\-mno\-sse4\fR" 4
+.IX Item "-mno-sse4"
+.IP "\fB\-mavx\fR" 4
+.IX Item "-mavx"
+.IP "\fB\-mno\-avx\fR" 4
+.IX Item "-mno-avx"
+.IP "\fB\-maes\fR" 4
+.IX Item "-maes"
+.IP "\fB\-mno\-aes\fR" 4
+.IX Item "-mno-aes"
+.IP "\fB\-mpclmul\fR" 4
+.IX Item "-mpclmul"
+.IP "\fB\-mno\-pclmul\fR" 4
+.IX Item "-mno-pclmul"
+.IP "\fB\-mfsgsbase\fR" 4
+.IX Item "-mfsgsbase"
+.IP "\fB\-mno\-fsgsbase\fR" 4
+.IX Item "-mno-fsgsbase"
+.IP "\fB\-mrdrnd\fR" 4
+.IX Item "-mrdrnd"
+.IP "\fB\-mno\-rdrnd\fR" 4
+.IX Item "-mno-rdrnd"
+.IP "\fB\-mf16c\fR" 4
+.IX Item "-mf16c"
+.IP "\fB\-mno\-f16c\fR" 4
+.IX Item "-mno-f16c"
+.IP "\fB\-msse4a\fR" 4
+.IX Item "-msse4a"
+.IP "\fB\-mno\-sse4a\fR" 4
+.IX Item "-mno-sse4a"
+.IP "\fB\-mfma4\fR" 4
+.IX Item "-mfma4"
+.IP "\fB\-mno\-fma4\fR" 4
+.IX Item "-mno-fma4"
+.IP "\fB\-mxop\fR" 4
+.IX Item "-mxop"
+.IP "\fB\-mno\-xop\fR" 4
+.IX Item "-mno-xop"
+.IP "\fB\-mlwp\fR" 4
+.IX Item "-mlwp"
+.IP "\fB\-mno\-lwp\fR" 4
+.IX Item "-mno-lwp"
+.IP "\fB\-m3dnow\fR" 4
+.IX Item "-m3dnow"
+.IP "\fB\-mno\-3dnow\fR" 4
+.IX Item "-mno-3dnow"
+.IP "\fB\-mpopcnt\fR" 4
+.IX Item "-mpopcnt"
+.IP "\fB\-mno\-popcnt\fR" 4
+.IX Item "-mno-popcnt"
+.IP "\fB\-mabm\fR" 4
+.IX Item "-mabm"
+.IP "\fB\-mno\-abm\fR" 4
+.IX Item "-mno-abm"
+.IP "\fB\-mbmi\fR" 4
+.IX Item "-mbmi"
+.IP "\fB\-mno\-bmi\fR" 4
+.IX Item "-mno-bmi"
+.IP "\fB\-mtbm\fR" 4
+.IX Item "-mtbm"
+.IP "\fB\-mno\-tbm\fR" 4
+.IX Item "-mno-tbm"
+.PD
+These switches enable or disable the use of instructions in the \s-1MMX\s0,
+\&\s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSSE3\s0, \s-1SSE4\s0.1, \s-1AVX\s0, \s-1AES\s0, \s-1PCLMUL\s0, \s-1FSGSBASE\s0, \s-1RDRND\s0,
+F16C, \s-1SSE4A\s0, \s-1FMA4\s0, \s-1XOP\s0, \s-1LWP\s0, \s-1ABM\s0, \s-1BMI\s0, or 3DNow! extended instruction sets.
+These extensions are also available as built-in functions: see
+\&\fBX86 Built-in Functions\fR, for details of the functions enabled and
+disabled by these switches.
+.Sp
+To have \s-1SSE/SSE2\s0 instructions generated automatically from floating-point
+code (as opposed to 387 instructions), see \fB\-mfpmath=sse\fR.
+.Sp
+\&\s-1GCC\s0 depresses SSEx instructions when \fB\-mavx\fR is used. Instead, it
+generates new \s-1AVX\s0 instructions or \s-1AVX\s0 equivalence for all SSEx instructions
+when needed.
+.Sp
+These options will enable \s-1GCC\s0 to use these extended instructions in
+generated code, even without \fB\-mfpmath=sse\fR.  Applications which
+perform runtime \s-1CPU\s0 detection must compile separate files for each
+supported architecture, using the appropriate flags.  In particular,
+the file containing the \s-1CPU\s0 detection code should be compiled without
+these options.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Do (don't) generate code that uses the fused multiply/add or multiply/subtract
+instructions.  The default is to use these instructions.
+.IP "\fB\-mcld\fR" 4
+.IX Item "-mcld"
+This option instructs \s-1GCC\s0 to emit a \f(CW\*(C`cld\*(C'\fR instruction in the prologue
+of functions that use string instructions.  String instructions depend on
+the \s-1DF\s0 flag to select between autoincrement or autodecrement mode.  While the
+\&\s-1ABI\s0 specifies the \s-1DF\s0 flag to be cleared on function entry, some operating
+systems violate this specification by not clearing the \s-1DF\s0 flag in their
+exception dispatchers.  The exception handler can be invoked with the \s-1DF\s0 flag
+set which leads to wrong direction mode, when string instructions are used.
+This option can be enabled by default on 32\-bit x86 targets by configuring
+\&\s-1GCC\s0 with the \fB\-\-enable\-cld\fR configure option.  Generation of \f(CW\*(C`cld\*(C'\fR
+instructions can be suppressed with the \fB\-mno\-cld\fR compiler option
+in this case.
+.IP "\fB\-mvzeroupper\fR" 4
+.IX Item "-mvzeroupper"
+This option instructs \s-1GCC\s0 to emit a \f(CW\*(C`vzeroupper\*(C'\fR instruction
+before a transfer of control flow out of the function to minimize
+\&\s-1AVX\s0 to \s-1SSE\s0 transition penalty as well as remove unnecessary zeroupper 
+intrinsics.
+.IP "\fB\-mprefer\-avx128\fR" 4
+.IX Item "-mprefer-avx128"
+This option instructs \s-1GCC\s0 to use 128\-bit \s-1AVX\s0 instructions instead of
+256\-bit \s-1AVX\s0 instructions in the auto-vectorizer.
+.IP "\fB\-mcx16\fR" 4
+.IX Item "-mcx16"
+This option will enable \s-1GCC\s0 to use \s-1CMPXCHG16B\s0 instruction in generated code.
+\&\s-1CMPXCHG16B\s0 allows for atomic operations on 128\-bit double quadword (or oword)
+data types.  This is useful for high resolution counters that could be updated
+by multiple processors (or cores).  This instruction is generated as part of
+atomic built-in functions: see \fBAtomic Builtins\fR for details.
+.IP "\fB\-msahf\fR" 4
+.IX Item "-msahf"
+This option will enable \s-1GCC\s0 to use \s-1SAHF\s0 instruction in generated 64\-bit code.
+Early Intel CPUs with Intel 64 lacked \s-1LAHF\s0 and \s-1SAHF\s0 instructions supported
+by \s-1AMD64\s0 until introduction of Pentium 4 G1 step in December 2005.  \s-1LAHF\s0 and
+\&\s-1SAHF\s0 are load and store instructions, respectively, for certain status flags.
+In 64\-bit mode, \s-1SAHF\s0 instruction is used to optimize \f(CW\*(C`fmod\*(C'\fR, \f(CW\*(C`drem\*(C'\fR
+or \f(CW\*(C`remainder\*(C'\fR built-in functions: see \fBOther Builtins\fR for details.
+.IP "\fB\-mmovbe\fR" 4
+.IX Item "-mmovbe"
+This option will enable \s-1GCC\s0 to use movbe instruction to implement
+\&\f(CW\*(C`_\|_builtin_bswap32\*(C'\fR and \f(CW\*(C`_\|_builtin_bswap64\*(C'\fR.
+.IP "\fB\-mcrc32\fR" 4
+.IX Item "-mcrc32"
+This option will enable built-in functions, \f(CW\*(C`_\|_builtin_ia32_crc32qi\*(C'\fR,
+\&\f(CW\*(C`_\|_builtin_ia32_crc32hi\*(C'\fR. \f(CW\*(C`_\|_builtin_ia32_crc32si\*(C'\fR and
+\&\f(CW\*(C`_\|_builtin_ia32_crc32di\*(C'\fR to generate the crc32 machine instruction.
+.IP "\fB\-mrecip\fR" 4
+.IX Item "-mrecip"
+This option will enable \s-1GCC\s0 to use \s-1RCPSS\s0 and \s-1RSQRTSS\s0 instructions (and their
+vectorized variants \s-1RCPPS\s0 and \s-1RSQRTPS\s0) with an additional Newton-Raphson step
+to increase precision instead of \s-1DIVSS\s0 and \s-1SQRTSS\s0 (and their vectorized
+variants) for single precision floating point arguments.  These instructions
+are generated only when \fB\-funsafe\-math\-optimizations\fR is enabled
+together with \fB\-finite\-math\-only\fR and \fB\-fno\-trapping\-math\fR.
+Note that while the throughput of the sequence is higher than the throughput
+of the non-reciprocal instruction, the precision of the sequence can be
+decreased by up to 2 ulp (i.e. the inverse of 1.0 equals 0.99999994).
+.Sp
+Note that \s-1GCC\s0 implements 1.0f/sqrtf(x) in terms of \s-1RSQRTSS\s0 (or \s-1RSQRTPS\s0)
+already with \fB\-ffast\-math\fR (or the above option combination), and
+doesn't need \fB\-mrecip\fR.
+.IP "\fB\-mveclibabi=\fR\fItype\fR" 4
+.IX Item "-mveclibabi=type"
+Specifies the \s-1ABI\s0 type to use for vectorizing intrinsics using an
+external library.  Supported types are \f(CW\*(C`svml\*(C'\fR for the Intel short
+vector math library and \f(CW\*(C`acml\*(C'\fR for the \s-1AMD\s0 math core library style
+of interfacing.  \s-1GCC\s0 will currently emit calls to \f(CW\*(C`vmldExp2\*(C'\fR,
+\&\f(CW\*(C`vmldLn2\*(C'\fR, \f(CW\*(C`vmldLog102\*(C'\fR, \f(CW\*(C`vmldLog102\*(C'\fR, \f(CW\*(C`vmldPow2\*(C'\fR,
+\&\f(CW\*(C`vmldTanh2\*(C'\fR, \f(CW\*(C`vmldTan2\*(C'\fR, \f(CW\*(C`vmldAtan2\*(C'\fR, \f(CW\*(C`vmldAtanh2\*(C'\fR,
+\&\f(CW\*(C`vmldCbrt2\*(C'\fR, \f(CW\*(C`vmldSinh2\*(C'\fR, \f(CW\*(C`vmldSin2\*(C'\fR, \f(CW\*(C`vmldAsinh2\*(C'\fR,
+\&\f(CW\*(C`vmldAsin2\*(C'\fR, \f(CW\*(C`vmldCosh2\*(C'\fR, \f(CW\*(C`vmldCos2\*(C'\fR, \f(CW\*(C`vmldAcosh2\*(C'\fR,
+\&\f(CW\*(C`vmldAcos2\*(C'\fR, \f(CW\*(C`vmlsExp4\*(C'\fR, \f(CW\*(C`vmlsLn4\*(C'\fR, \f(CW\*(C`vmlsLog104\*(C'\fR,
+\&\f(CW\*(C`vmlsLog104\*(C'\fR, \f(CW\*(C`vmlsPow4\*(C'\fR, \f(CW\*(C`vmlsTanh4\*(C'\fR, \f(CW\*(C`vmlsTan4\*(C'\fR,
+\&\f(CW\*(C`vmlsAtan4\*(C'\fR, \f(CW\*(C`vmlsAtanh4\*(C'\fR, \f(CW\*(C`vmlsCbrt4\*(C'\fR, \f(CW\*(C`vmlsSinh4\*(C'\fR,
+\&\f(CW\*(C`vmlsSin4\*(C'\fR, \f(CW\*(C`vmlsAsinh4\*(C'\fR, \f(CW\*(C`vmlsAsin4\*(C'\fR, \f(CW\*(C`vmlsCosh4\*(C'\fR,
+\&\f(CW\*(C`vmlsCos4\*(C'\fR, \f(CW\*(C`vmlsAcosh4\*(C'\fR and \f(CW\*(C`vmlsAcos4\*(C'\fR for corresponding
+function type when \fB\-mveclibabi=svml\fR is used and \f(CW\*(C`_\|_vrd2_sin\*(C'\fR,
+\&\f(CW\*(C`_\|_vrd2_cos\*(C'\fR, \f(CW\*(C`_\|_vrd2_exp\*(C'\fR, \f(CW\*(C`_\|_vrd2_log\*(C'\fR, \f(CW\*(C`_\|_vrd2_log2\*(C'\fR,
+\&\f(CW\*(C`_\|_vrd2_log10\*(C'\fR, \f(CW\*(C`_\|_vrs4_sinf\*(C'\fR, \f(CW\*(C`_\|_vrs4_cosf\*(C'\fR,
+\&\f(CW\*(C`_\|_vrs4_expf\*(C'\fR, \f(CW\*(C`_\|_vrs4_logf\*(C'\fR, \f(CW\*(C`_\|_vrs4_log2f\*(C'\fR,
+\&\f(CW\*(C`_\|_vrs4_log10f\*(C'\fR and \f(CW\*(C`_\|_vrs4_powf\*(C'\fR for corresponding function type
+when \fB\-mveclibabi=acml\fR is used. Both \fB\-ftree\-vectorize\fR and
+\&\fB\-funsafe\-math\-optimizations\fR have to be enabled. A \s-1SVML\s0 or \s-1ACML\s0 \s-1ABI\s0
+compatible library will have to be specified at link time.
+.IP "\fB\-mabi=\fR\fIname\fR" 4
+.IX Item "-mabi=name"
+Generate code for the specified calling convention.  Permissible values
+are: \fBsysv\fR for the \s-1ABI\s0 used on GNU/Linux and other systems and
+\&\fBms\fR for the Microsoft \s-1ABI\s0.  The default is to use the Microsoft
+\&\s-1ABI\s0 when targeting Windows.  On all other systems, the default is the
+\&\s-1SYSV\s0 \s-1ABI\s0.  You can control this behavior for a specific function by
+using the function attribute \fBms_abi\fR/\fBsysv_abi\fR.
+.IP "\fB\-mpush\-args\fR" 4
+.IX Item "-mpush-args"
+.PD 0
+.IP "\fB\-mno\-push\-args\fR" 4
+.IX Item "-mno-push-args"
+.PD
+Use \s-1PUSH\s0 operations to store outgoing parameters.  This method is shorter
+and usually equally fast as method using \s-1SUB/MOV\s0 operations and is enabled
+by default.  In some cases disabling it may improve performance because of
+improved scheduling and reduced dependencies.
+.IP "\fB\-maccumulate\-outgoing\-args\fR" 4
+.IX Item "-maccumulate-outgoing-args"
+If enabled, the maximum amount of space required for outgoing arguments will be
+computed in the function prologue.  This is faster on most modern CPUs
+because of reduced dependencies, improved scheduling and reduced stack usage
+when preferred stack boundary is not equal to 2.  The drawback is a notable
+increase in code size.  This switch implies \fB\-mno\-push\-args\fR.
+.IP "\fB\-mthreads\fR" 4
+.IX Item "-mthreads"
+Support thread-safe exception handling on \fBMingw32\fR.  Code that relies
+on thread-safe exception handling must compile and link all code with the
+\&\fB\-mthreads\fR option.  When compiling, \fB\-mthreads\fR defines
+\&\fB\-D_MT\fR; when linking, it links in a special thread helper library
+\&\fB\-lmingwthrd\fR which cleans up per thread exception handling data.
+.IP "\fB\-mno\-align\-stringops\fR" 4
+.IX Item "-mno-align-stringops"
+Do not align destination of inlined string operations.  This switch reduces
+code size and improves performance in case the destination is already aligned,
+but \s-1GCC\s0 doesn't know about it.
+.IP "\fB\-minline\-all\-stringops\fR" 4
+.IX Item "-minline-all-stringops"
+By default \s-1GCC\s0 inlines string operations only when destination is known to be
+aligned at least to 4 byte boundary.  This enables more inlining, increase code
+size, but may improve performance of code that depends on fast memcpy, strlen
+and memset for short lengths.
+.IP "\fB\-minline\-stringops\-dynamically\fR" 4
+.IX Item "-minline-stringops-dynamically"
+For string operation of unknown size, inline runtime checks so for small
+blocks inline code is used, while for large blocks library call is used.
+.IP "\fB\-mstringop\-strategy=\fR\fIalg\fR" 4
+.IX Item "-mstringop-strategy=alg"
+Overwrite internal decision heuristic about particular algorithm to inline
+string operation with.  The allowed values are \f(CW\*(C`rep_byte\*(C'\fR,
+\&\f(CW\*(C`rep_4byte\*(C'\fR, \f(CW\*(C`rep_8byte\*(C'\fR for expanding using i386 \f(CW\*(C`rep\*(C'\fR prefix
+of specified size, \f(CW\*(C`byte_loop\*(C'\fR, \f(CW\*(C`loop\*(C'\fR, \f(CW\*(C`unrolled_loop\*(C'\fR for
+expanding inline loop, \f(CW\*(C`libcall\*(C'\fR for always expanding library call.
+.IP "\fB\-momit\-leaf\-frame\-pointer\fR" 4
+.IX Item "-momit-leaf-frame-pointer"
+Don't keep the frame pointer in a register for leaf functions.  This
+avoids the instructions to save, set up and restore frame pointers and
+makes an extra register available in leaf functions.  The option
+\&\fB\-fomit\-frame\-pointer\fR removes the frame pointer for all functions
+which might make debugging harder.
+.IP "\fB\-mtls\-direct\-seg\-refs\fR" 4
+.IX Item "-mtls-direct-seg-refs"
+.PD 0
+.IP "\fB\-mno\-tls\-direct\-seg\-refs\fR" 4
+.IX Item "-mno-tls-direct-seg-refs"
+.PD
+Controls whether \s-1TLS\s0 variables may be accessed with offsets from the
+\&\s-1TLS\s0 segment register (\f(CW%gs\fR for 32\-bit, \f(CW%fs\fR for 64\-bit),
+or whether the thread base pointer must be added.  Whether or not this
+is legal depends on the operating system, and whether it maps the
+segment to cover the entire \s-1TLS\s0 area.
+.Sp
+For systems that use \s-1GNU\s0 libc, the default is on.
+.IP "\fB\-msse2avx\fR" 4
+.IX Item "-msse2avx"
+.PD 0
+.IP "\fB\-mno\-sse2avx\fR" 4
+.IX Item "-mno-sse2avx"
+.PD
+Specify that the assembler should encode \s-1SSE\s0 instructions with \s-1VEX\s0
+prefix.  The option \fB\-mavx\fR turns this on by default.
+.IP "\fB\-mfentry\fR" 4
+.IX Item "-mfentry"
+.PD 0
+.IP "\fB\-mno\-fentry\fR" 4
+.IX Item "-mno-fentry"
+.PD
+If profiling is active \fB\-pg\fR put the profiling
+counter call before prologue.
+Note: On x86 architectures the attribute \f(CW\*(C`ms_hook_prologue\*(C'\fR
+isn't possible at the moment for \fB\-mfentry\fR and \fB\-pg\fR.
+.IP "\fB\-m8bit\-idiv\fR" 4
+.IX Item "-m8bit-idiv"
+.PD 0
+.IP "\fB\-mno\-8bit\-idiv\fR" 4
+.IX Item "-mno-8bit-idiv"
+.PD
+On some processors, like Intel Atom, 8bit unsigned integer divide is
+much faster than 32bit/64bit integer divide.  This option will generate a
+runt-time check.  If both dividend and divisor are within range of 0
+to 255, 8bit unsigned integer divide will be used instead of
+32bit/64bit integer divide.
+.IP "\fB\-mavx256\-split\-unaligned\-load\fR" 4
+.IX Item "-mavx256-split-unaligned-load"
+.PD 0
+.IP "\fB\-mavx256\-split\-unaligned\-store\fR" 4
+.IX Item "-mavx256-split-unaligned-store"
+.PD
+Split 32\-byte \s-1AVX\s0 unaligned load and store.
+.PP
+These \fB\-m\fR switches are supported in addition to the above
+on \s-1AMD\s0 x86\-64 processors in 64\-bit environments.
+.IP "\fB\-m32\fR" 4
+.IX Item "-m32"
+.PD 0
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD
+Generate code for a 32\-bit or 64\-bit environment.
+The 32\-bit environment sets int, long and pointer to 32 bits and
+generates code that runs on any i386 system.
+The 64\-bit environment sets int to 32 bits and long and pointer
+to 64 bits and generates code for \s-1AMD\s0's x86\-64 architecture. For
+darwin only the \-m64 option turns off the \fB\-fno\-pic\fR and
+\&\fB\-mdynamic\-no\-pic\fR options.
+.IP "\fB\-mno\-red\-zone\fR" 4
+.IX Item "-mno-red-zone"
+Do not use a so called red zone for x86\-64 code.  The red zone is mandated
+by the x86\-64 \s-1ABI\s0, it is a 128\-byte area beyond the location of the
+stack pointer that will not be modified by signal or interrupt handlers
+and therefore can be used for temporary data without adjusting the stack
+pointer.  The flag \fB\-mno\-red\-zone\fR disables this red zone.
+.IP "\fB\-mcmodel=small\fR" 4
+.IX Item "-mcmodel=small"
+Generate code for the small code model: the program and its symbols must
+be linked in the lower 2 \s-1GB\s0 of the address space.  Pointers are 64 bits.
+Programs can be statically or dynamically linked.  This is the default
+code model.
+.IP "\fB\-mcmodel=kernel\fR" 4
+.IX Item "-mcmodel=kernel"
+Generate code for the kernel code model.  The kernel runs in the
+negative 2 \s-1GB\s0 of the address space.
+This model has to be used for Linux kernel code.
+.IP "\fB\-mcmodel=medium\fR" 4
+.IX Item "-mcmodel=medium"
+Generate code for the medium model: The program is linked in the lower 2
+\&\s-1GB\s0 of the address space.  Small symbols are also placed there.  Symbols
+with sizes larger than \fB\-mlarge\-data\-threshold\fR are put into
+large data or bss sections and can be located above 2GB.  Programs can
+be statically or dynamically linked.
+.IP "\fB\-mcmodel=large\fR" 4
+.IX Item "-mcmodel=large"
+Generate code for the large model: This model makes no assumptions
+about addresses and sizes of sections.
+.PP
+\fIi386 and x86\-64 Windows Options\fR
+.IX Subsection "i386 and x86-64 Windows Options"
+.PP
+These additional options are available for Windows targets:
+.IP "\fB\-mconsole\fR" 4
+.IX Item "-mconsole"
+This option is available for Cygwin and MinGW targets.  It
+specifies that a console application is to be generated, by
+instructing the linker to set the \s-1PE\s0 header subsystem type
+required for console applications.
+This is the default behavior for Cygwin and MinGW targets.
+.IP "\fB\-mdll\fR" 4
+.IX Item "-mdll"
+This option is available for Cygwin and MinGW targets.  It
+specifies that a \s-1DLL\s0 \- a dynamic link library \- is to be
+generated, enabling the selection of the required runtime
+startup object and entry point.
+.IP "\fB\-mnop\-fun\-dllimport\fR" 4
+.IX Item "-mnop-fun-dllimport"
+This option is available for Cygwin and MinGW targets.  It
+specifies that the dllimport attribute should be ignored.
+.IP "\fB\-mthread\fR" 4
+.IX Item "-mthread"
+This option is available for MinGW targets. It specifies
+that MinGW-specific thread support is to be used.
+.IP "\fB\-municode\fR" 4
+.IX Item "-municode"
+This option is available for mingw\-w64 targets.  It specifies
+that the \s-1UNICODE\s0 macro is getting pre-defined and that the
+unicode capable runtime startup code is chosen.
+.IP "\fB\-mwin32\fR" 4
+.IX Item "-mwin32"
+This option is available for Cygwin and MinGW targets.  It
+specifies that the typical Windows pre-defined macros are to
+be set in the pre-processor, but does not influence the choice
+of runtime library/startup code.
+.IP "\fB\-mwindows\fR" 4
+.IX Item "-mwindows"
+This option is available for Cygwin and MinGW targets.  It
+specifies that a \s-1GUI\s0 application is to be generated by
+instructing the linker to set the \s-1PE\s0 header subsystem type
+appropriately.
+.IP "\fB\-fno\-set\-stack\-executable\fR" 4
+.IX Item "-fno-set-stack-executable"
+This option is available for MinGW targets. It specifies that
+the executable flag for stack used by nested functions isn't
+set. This is necessary for binaries running in kernel mode of
+Windows, as there the user32 \s-1API\s0, which is used to set executable
+privileges, isn't available.
+.IP "\fB\-mpe\-aligned\-commons\fR" 4
+.IX Item "-mpe-aligned-commons"
+This option is available for Cygwin and MinGW targets.  It
+specifies that the \s-1GNU\s0 extension to the \s-1PE\s0 file format that
+permits the correct alignment of \s-1COMMON\s0 variables should be
+used when generating code.  It will be enabled by default if
+\&\s-1GCC\s0 detects that the target assembler found during configuration
+supports the feature.
+.PP
+See also under \fBi386 and x86\-64 Options\fR for standard options.
+.PP
+\fI\s-1IA\-64\s0 Options\fR
+.IX Subsection "IA-64 Options"
+.PP
+These are the \fB\-m\fR options defined for the Intel \s-1IA\-64\s0 architecture.
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+Generate code for a big endian target.  This is the default for HP-UX.
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+Generate code for a little endian target.  This is the default for \s-1AIX5\s0
+and GNU/Linux.
+.IP "\fB\-mgnu\-as\fR" 4
+.IX Item "-mgnu-as"
+.PD 0
+.IP "\fB\-mno\-gnu\-as\fR" 4
+.IX Item "-mno-gnu-as"
+.PD
+Generate (or don't) code for the \s-1GNU\s0 assembler.  This is the default.
+.IP "\fB\-mgnu\-ld\fR" 4
+.IX Item "-mgnu-ld"
+.PD 0
+.IP "\fB\-mno\-gnu\-ld\fR" 4
+.IX Item "-mno-gnu-ld"
+.PD
+Generate (or don't) code for the \s-1GNU\s0 linker.  This is the default.
+.IP "\fB\-mno\-pic\fR" 4
+.IX Item "-mno-pic"
+Generate code that does not use a global pointer register.  The result
+is not position independent code, and violates the \s-1IA\-64\s0 \s-1ABI\s0.
+.IP "\fB\-mvolatile\-asm\-stop\fR" 4
+.IX Item "-mvolatile-asm-stop"
+.PD 0
+.IP "\fB\-mno\-volatile\-asm\-stop\fR" 4
+.IX Item "-mno-volatile-asm-stop"
+.PD
+Generate (or don't) a stop bit immediately before and after volatile asm
+statements.
+.IP "\fB\-mregister\-names\fR" 4
+.IX Item "-mregister-names"
+.PD 0
+.IP "\fB\-mno\-register\-names\fR" 4
+.IX Item "-mno-register-names"
+.PD
+Generate (or don't) \fBin\fR, \fBloc\fR, and \fBout\fR register names for
+the stacked registers.  This may make assembler output more readable.
+.IP "\fB\-mno\-sdata\fR" 4
+.IX Item "-mno-sdata"
+.PD 0
+.IP "\fB\-msdata\fR" 4
+.IX Item "-msdata"
+.PD
+Disable (or enable) optimizations that use the small data section.  This may
+be useful for working around optimizer bugs.
+.IP "\fB\-mconstant\-gp\fR" 4
+.IX Item "-mconstant-gp"
+Generate code that uses a single constant global pointer value.  This is
+useful when compiling kernel code.
+.IP "\fB\-mauto\-pic\fR" 4
+.IX Item "-mauto-pic"
+Generate code that is self-relocatable.  This implies \fB\-mconstant\-gp\fR.
+This is useful when compiling firmware code.
+.IP "\fB\-minline\-float\-divide\-min\-latency\fR" 4
+.IX Item "-minline-float-divide-min-latency"
+Generate code for inline divides of floating point values
+using the minimum latency algorithm.
+.IP "\fB\-minline\-float\-divide\-max\-throughput\fR" 4
+.IX Item "-minline-float-divide-max-throughput"
+Generate code for inline divides of floating point values
+using the maximum throughput algorithm.
+.IP "\fB\-mno\-inline\-float\-divide\fR" 4
+.IX Item "-mno-inline-float-divide"
+Do not generate inline code for divides of floating point values.
+.IP "\fB\-minline\-int\-divide\-min\-latency\fR" 4
+.IX Item "-minline-int-divide-min-latency"
+Generate code for inline divides of integer values
+using the minimum latency algorithm.
+.IP "\fB\-minline\-int\-divide\-max\-throughput\fR" 4
+.IX Item "-minline-int-divide-max-throughput"
+Generate code for inline divides of integer values
+using the maximum throughput algorithm.
+.IP "\fB\-mno\-inline\-int\-divide\fR" 4
+.IX Item "-mno-inline-int-divide"
+Do not generate inline code for divides of integer values.
+.IP "\fB\-minline\-sqrt\-min\-latency\fR" 4
+.IX Item "-minline-sqrt-min-latency"
+Generate code for inline square roots
+using the minimum latency algorithm.
+.IP "\fB\-minline\-sqrt\-max\-throughput\fR" 4
+.IX Item "-minline-sqrt-max-throughput"
+Generate code for inline square roots
+using the maximum throughput algorithm.
+.IP "\fB\-mno\-inline\-sqrt\fR" 4
+.IX Item "-mno-inline-sqrt"
+Do not generate inline code for sqrt.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Do (don't) generate code that uses the fused multiply/add or multiply/subtract
+instructions.  The default is to use these instructions.
+.IP "\fB\-mno\-dwarf2\-asm\fR" 4
+.IX Item "-mno-dwarf2-asm"
+.PD 0
+.IP "\fB\-mdwarf2\-asm\fR" 4
+.IX Item "-mdwarf2-asm"
+.PD
+Don't (or do) generate assembler code for the \s-1DWARF2\s0 line number debugging
+info.  This may be useful when not using the \s-1GNU\s0 assembler.
+.IP "\fB\-mearly\-stop\-bits\fR" 4
+.IX Item "-mearly-stop-bits"
+.PD 0
+.IP "\fB\-mno\-early\-stop\-bits\fR" 4
+.IX Item "-mno-early-stop-bits"
+.PD
+Allow stop bits to be placed earlier than immediately preceding the
+instruction that triggered the stop bit.  This can improve instruction
+scheduling, but does not always do so.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use.  This is
+useful when compiling kernel code.  A register range is specified as
+two registers separated by a dash.  Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-mtls\-size=\fR\fItls-size\fR" 4
+.IX Item "-mtls-size=tls-size"
+Specify bit size of immediate \s-1TLS\s0 offsets.  Valid values are 14, 22, and
+64.
+.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
+.IX Item "-mtune=cpu-type"
+Tune the instruction scheduling for a particular \s-1CPU\s0, Valid values are
+itanium, itanium1, merced, itanium2, and mckinley.
+.IP "\fB\-milp32\fR" 4
+.IX Item "-milp32"
+.PD 0
+.IP "\fB\-mlp64\fR" 4
+.IX Item "-mlp64"
+.PD
+Generate code for a 32\-bit or 64\-bit environment.
+The 32\-bit environment sets int, long and pointer to 32 bits.
+The 64\-bit environment sets int to 32 bits and long and pointer
+to 64 bits.  These are HP-UX specific flags.
+.IP "\fB\-mno\-sched\-br\-data\-spec\fR" 4
+.IX Item "-mno-sched-br-data-spec"
+.PD 0
+.IP "\fB\-msched\-br\-data\-spec\fR" 4
+.IX Item "-msched-br-data-spec"
+.PD
+(Dis/En)able data speculative scheduling before reload.
+This will result in generation of the ld.a instructions and
+the corresponding check instructions (ld.c / chk.a).
+The default is 'disable'.
+.IP "\fB\-msched\-ar\-data\-spec\fR" 4
+.IX Item "-msched-ar-data-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-ar\-data\-spec\fR" 4
+.IX Item "-mno-sched-ar-data-spec"
+.PD
+(En/Dis)able data speculative scheduling after reload.
+This will result in generation of the ld.a instructions and
+the corresponding check instructions (ld.c / chk.a).
+The default is 'enable'.
+.IP "\fB\-mno\-sched\-control\-spec\fR" 4
+.IX Item "-mno-sched-control-spec"
+.PD 0
+.IP "\fB\-msched\-control\-spec\fR" 4
+.IX Item "-msched-control-spec"
+.PD
+(Dis/En)able control speculative scheduling.  This feature is
+available only during region scheduling (i.e. before reload).
+This will result in generation of the ld.s instructions and
+the corresponding check instructions chk.s .
+The default is 'disable'.
+.IP "\fB\-msched\-br\-in\-data\-spec\fR" 4
+.IX Item "-msched-br-in-data-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-br\-in\-data\-spec\fR" 4
+.IX Item "-mno-sched-br-in-data-spec"
+.PD
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the data speculative loads before reload.
+This is effective only with \fB\-msched\-br\-data\-spec\fR enabled.
+The default is 'enable'.
+.IP "\fB\-msched\-ar\-in\-data\-spec\fR" 4
+.IX Item "-msched-ar-in-data-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-ar\-in\-data\-spec\fR" 4
+.IX Item "-mno-sched-ar-in-data-spec"
+.PD
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the data speculative loads after reload.
+This is effective only with \fB\-msched\-ar\-data\-spec\fR enabled.
+The default is 'enable'.
+.IP "\fB\-msched\-in\-control\-spec\fR" 4
+.IX Item "-msched-in-control-spec"
+.PD 0
+.IP "\fB\-mno\-sched\-in\-control\-spec\fR" 4
+.IX Item "-mno-sched-in-control-spec"
+.PD
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the control speculative loads.
+This is effective only with \fB\-msched\-control\-spec\fR enabled.
+The default is 'enable'.
+.IP "\fB\-mno\-sched\-prefer\-non\-data\-spec\-insns\fR" 4
+.IX Item "-mno-sched-prefer-non-data-spec-insns"
+.PD 0
+.IP "\fB\-msched\-prefer\-non\-data\-spec\-insns\fR" 4
+.IX Item "-msched-prefer-non-data-spec-insns"
+.PD
+If enabled, data speculative instructions will be chosen for schedule
+only if there are no other choices at the moment.  This will make
+the use of the data speculation much more conservative.
+The default is 'disable'.
+.IP "\fB\-mno\-sched\-prefer\-non\-control\-spec\-insns\fR" 4
+.IX Item "-mno-sched-prefer-non-control-spec-insns"
+.PD 0
+.IP "\fB\-msched\-prefer\-non\-control\-spec\-insns\fR" 4
+.IX Item "-msched-prefer-non-control-spec-insns"
+.PD
+If enabled, control speculative instructions will be chosen for schedule
+only if there are no other choices at the moment.  This will make
+the use of the control speculation much more conservative.
+The default is 'disable'.
+.IP "\fB\-mno\-sched\-count\-spec\-in\-critical\-path\fR" 4
+.IX Item "-mno-sched-count-spec-in-critical-path"
+.PD 0
+.IP "\fB\-msched\-count\-spec\-in\-critical\-path\fR" 4
+.IX Item "-msched-count-spec-in-critical-path"
+.PD
+If enabled, speculative dependencies will be considered during
+computation of the instructions priorities.  This will make the use of the
+speculation a bit more conservative.
+The default is 'disable'.
+.IP "\fB\-msched\-spec\-ldc\fR" 4
+.IX Item "-msched-spec-ldc"
+Use a simple data speculation check.  This option is on by default.
+.IP "\fB\-msched\-control\-spec\-ldc\fR" 4
+.IX Item "-msched-control-spec-ldc"
+Use a simple check for control speculation.  This option is on by default.
+.IP "\fB\-msched\-stop\-bits\-after\-every\-cycle\fR" 4
+.IX Item "-msched-stop-bits-after-every-cycle"
+Place a stop bit after every cycle when scheduling.  This option is on
+by default.
+.IP "\fB\-msched\-fp\-mem\-deps\-zero\-cost\fR" 4
+.IX Item "-msched-fp-mem-deps-zero-cost"
+Assume that floating-point stores and loads are not likely to cause a conflict
+when placed into the same instruction group.  This option is disabled by
+default.
+.IP "\fB\-msel\-sched\-dont\-check\-control\-spec\fR" 4
+.IX Item "-msel-sched-dont-check-control-spec"
+Generate checks for control speculation in selective scheduling.
+This flag is disabled by default.
+.IP "\fB\-msched\-max\-memory\-insns=\fR\fImax-insns\fR" 4
+.IX Item "-msched-max-memory-insns=max-insns"
+Limit on the number of memory insns per instruction group, giving lower
+priority to subsequent memory insns attempting to schedule in the same
+instruction group. Frequently useful to prevent cache bank conflicts.
+The default value is 1.
+.IP "\fB\-msched\-max\-memory\-insns\-hard\-limit\fR" 4
+.IX Item "-msched-max-memory-insns-hard-limit"
+Disallow more than `msched\-max\-memory\-insns' in instruction group.
+Otherwise, limit is `soft' meaning that we would prefer non-memory operations
+when limit is reached but may still schedule memory operations.
+.PP
+\fI\s-1IA\-64/VMS\s0 Options\fR
+.IX Subsection "IA-64/VMS Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1IA\-64/VMS\s0 implementations:
+.IP "\fB\-mvms\-return\-codes\fR" 4
+.IX Item "-mvms-return-codes"
+Return \s-1VMS\s0 condition codes from main. The default is to return \s-1POSIX\s0
+style condition (e.g. error) codes.
+.IP "\fB\-mdebug\-main=\fR\fIprefix\fR" 4
+.IX Item "-mdebug-main=prefix"
+Flag the first routine whose name starts with \fIprefix\fR as the main
+routine for the debugger.
+.IP "\fB\-mmalloc64\fR" 4
+.IX Item "-mmalloc64"
+Default to 64bit memory allocation routines.
+.PP
+\fI\s-1LM32\s0 Options\fR
+.IX Subsection "LM32 Options"
+.PP
+These \fB\-m\fR options are defined for the Lattice Mico32 architecture:
+.IP "\fB\-mbarrel\-shift\-enabled\fR" 4
+.IX Item "-mbarrel-shift-enabled"
+Enable barrel-shift instructions.
+.IP "\fB\-mdivide\-enabled\fR" 4
+.IX Item "-mdivide-enabled"
+Enable divide and modulus instructions.
+.IP "\fB\-mmultiply\-enabled\fR" 4
+.IX Item "-mmultiply-enabled"
+Enable multiply instructions.
+.IP "\fB\-msign\-extend\-enabled\fR" 4
+.IX Item "-msign-extend-enabled"
+Enable sign extend instructions.
+.IP "\fB\-muser\-enabled\fR" 4
+.IX Item "-muser-enabled"
+Enable user-defined instructions.
+.PP
+\fIM32C Options\fR
+.IX Subsection "M32C Options"
+.IP "\fB\-mcpu=\fR\fIname\fR" 4
+.IX Item "-mcpu=name"
+Select the \s-1CPU\s0 for which code is generated.  \fIname\fR may be one of
+\&\fBr8c\fR for the R8C/Tiny series, \fBm16c\fR for the M16C (up to
+/60) series, \fBm32cm\fR for the M16C/80 series, or \fBm32c\fR for
+the M32C/80 series.
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+Specifies that the program will be run on the simulator.  This causes
+an alternate runtime library to be linked in which supports, for
+example, file I/O.  You must not use this option when generating
+programs that will run on real hardware; you must provide your own
+runtime library for whatever I/O functions are needed.
+.IP "\fB\-memregs=\fR\fInumber\fR" 4
+.IX Item "-memregs=number"
+Specifies the number of memory-based pseudo-registers \s-1GCC\s0 will use
+during code generation.  These pseudo-registers will be used like real
+registers, so there is a tradeoff between \s-1GCC\s0's ability to fit the
+code into available registers, and the performance penalty of using
+memory instead of registers.  Note that all modules in a program must
+be compiled with the same value for this option.  Because of that, you
+must not use this option with the default runtime libraries gcc
+builds.
+.PP
+\fIM32R/D Options\fR
+.IX Subsection "M32R/D Options"
+.PP
+These \fB\-m\fR options are defined for Renesas M32R/D architectures:
+.IP "\fB\-m32r2\fR" 4
+.IX Item "-m32r2"
+Generate code for the M32R/2.
+.IP "\fB\-m32rx\fR" 4
+.IX Item "-m32rx"
+Generate code for the M32R/X.
+.IP "\fB\-m32r\fR" 4
+.IX Item "-m32r"
+Generate code for the M32R.  This is the default.
+.IP "\fB\-mmodel=small\fR" 4
+.IX Item "-mmodel=small"
+Assume all objects live in the lower 16MB of memory (so that their addresses
+can be loaded with the \f(CW\*(C`ld24\*(C'\fR instruction), and assume all subroutines
+are reachable with the \f(CW\*(C`bl\*(C'\fR instruction.
+This is the default.
+.Sp
+The addressability of a particular object can be set with the
+\&\f(CW\*(C`model\*(C'\fR attribute.
+.IP "\fB\-mmodel=medium\fR" 4
+.IX Item "-mmodel=medium"
+Assume objects may be anywhere in the 32\-bit address space (the compiler
+will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and
+assume all subroutines are reachable with the \f(CW\*(C`bl\*(C'\fR instruction.
+.IP "\fB\-mmodel=large\fR" 4
+.IX Item "-mmodel=large"
+Assume objects may be anywhere in the 32\-bit address space (the compiler
+will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and
+assume subroutines may not be reachable with the \f(CW\*(C`bl\*(C'\fR instruction
+(the compiler will generate the much slower \f(CW\*(C`seth/add3/jl\*(C'\fR
+instruction sequence).
+.IP "\fB\-msdata=none\fR" 4
+.IX Item "-msdata=none"
+Disable use of the small data area.  Variables will be put into
+one of \fB.data\fR, \fBbss\fR, or \fB.rodata\fR (unless the
+\&\f(CW\*(C`section\*(C'\fR attribute has been specified).
+This is the default.
+.Sp
+The small data area consists of sections \fB.sdata\fR and \fB.sbss\fR.
+Objects may be explicitly put in the small data area with the
+\&\f(CW\*(C`section\*(C'\fR attribute using one of these sections.
+.IP "\fB\-msdata=sdata\fR" 4
+.IX Item "-msdata=sdata"
+Put small global and static data in the small data area, but do not
+generate special code to reference them.
+.IP "\fB\-msdata=use\fR" 4
+.IX Item "-msdata=use"
+Put small global and static data in the small data area, and generate
+special instructions to reference them.
+.IP "\fB\-G\fR \fInum\fR" 4
+.IX Item "-G num"
+Put global and static objects less than or equal to \fInum\fR bytes
+into the small data or bss sections instead of the normal data or bss
+sections.  The default value of \fInum\fR is 8.
+The \fB\-msdata\fR option must be set to one of \fBsdata\fR or \fBuse\fR
+for this option to have any effect.
+.Sp
+All modules should be compiled with the same \fB\-G\fR \fInum\fR value.
+Compiling with different values of \fInum\fR may or may not work; if it
+doesn't the linker will give an error message\-\-\-incorrect code will not be
+generated.
+.IP "\fB\-mdebug\fR" 4
+.IX Item "-mdebug"
+Makes the M32R specific code in the compiler display some statistics
+that might help in debugging programs.
+.IP "\fB\-malign\-loops\fR" 4
+.IX Item "-malign-loops"
+Align all loops to a 32\-byte boundary.
+.IP "\fB\-mno\-align\-loops\fR" 4
+.IX Item "-mno-align-loops"
+Do not enforce a 32\-byte alignment for loops.  This is the default.
+.IP "\fB\-missue\-rate=\fR\fInumber\fR" 4
+.IX Item "-missue-rate=number"
+Issue \fInumber\fR instructions per cycle.  \fInumber\fR can only be 1
+or 2.
+.IP "\fB\-mbranch\-cost=\fR\fInumber\fR" 4
+.IX Item "-mbranch-cost=number"
+\&\fInumber\fR can only be 1 or 2.  If it is 1 then branches will be
+preferred over conditional code, if it is 2, then the opposite will
+apply.
+.IP "\fB\-mflush\-trap=\fR\fInumber\fR" 4
+.IX Item "-mflush-trap=number"
+Specifies the trap number to use to flush the cache.  The default is
+12.  Valid numbers are between 0 and 15 inclusive.
+.IP "\fB\-mno\-flush\-trap\fR" 4
+.IX Item "-mno-flush-trap"
+Specifies that the cache cannot be flushed by using a trap.
+.IP "\fB\-mflush\-func=\fR\fIname\fR" 4
+.IX Item "-mflush-func=name"
+Specifies the name of the operating system function to call to flush
+the cache.  The default is \fI_flush_cache\fR, but a function call
+will only be used if a trap is not available.
+.IP "\fB\-mno\-flush\-func\fR" 4
+.IX Item "-mno-flush-func"
+Indicates that there is no \s-1OS\s0 function for flushing the cache.
+.PP
+\fIM680x0 Options\fR
+.IX Subsection "M680x0 Options"
+.PP
+These are the \fB\-m\fR options defined for M680x0 and ColdFire processors.
+The default settings depend on which architecture was selected when
+the compiler was configured; the defaults for the most common choices
+are given below.
+.IP "\fB\-march=\fR\fIarch\fR" 4
+.IX Item "-march=arch"
+Generate code for a specific M680x0 or ColdFire instruction set
+architecture.  Permissible values of \fIarch\fR for M680x0
+architectures are: \fB68000\fR, \fB68010\fR, \fB68020\fR,
+\&\fB68030\fR, \fB68040\fR, \fB68060\fR and \fBcpu32\fR.  ColdFire
+architectures are selected according to Freescale's \s-1ISA\s0 classification
+and the permissible values are: \fBisaa\fR, \fBisaaplus\fR,
+\&\fBisab\fR and \fBisac\fR.
+.Sp
+gcc defines a macro \fB_\|_mcf\fR\fIarch\fR\fB_\|_\fR whenever it is generating
+code for a ColdFire target.  The \fIarch\fR in this macro is one of the
+\&\fB\-march\fR arguments given above.
+.Sp
+When used together, \fB\-march\fR and \fB\-mtune\fR select code
+that runs on a family of similar processors but that is optimized
+for a particular microarchitecture.
+.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
+.IX Item "-mcpu=cpu"
+Generate code for a specific M680x0 or ColdFire processor.
+The M680x0 \fIcpu\fRs are: \fB68000\fR, \fB68010\fR, \fB68020\fR,
+\&\fB68030\fR, \fB68040\fR, \fB68060\fR, \fB68302\fR, \fB68332\fR
+and \fBcpu32\fR.  The ColdFire \fIcpu\fRs are given by the table
+below, which also classifies the CPUs into families:
+.RS 4
+.IP "Family : \fB\-mcpu\fR arguments" 4
+.IX Item "Family : -mcpu arguments"
+.PD 0
+.IP "\fB51\fR : \fB51\fR \fB51ac\fR \fB51cn\fR \fB51em\fR \fB51qe\fR" 4
+.IX Item "51 : 51 51ac 51cn 51em 51qe"
+.IP "\fB5206\fR : \fB5202\fR \fB5204\fR \fB5206\fR" 4
+.IX Item "5206 : 5202 5204 5206"
+.IP "\fB5206e\fR : \fB5206e\fR" 4
+.IX Item "5206e : 5206e"
+.IP "\fB5208\fR : \fB5207\fR \fB5208\fR" 4
+.IX Item "5208 : 5207 5208"
+.IP "\fB5211a\fR : \fB5210a\fR \fB5211a\fR" 4
+.IX Item "5211a : 5210a 5211a"
+.IP "\fB5213\fR : \fB5211\fR \fB5212\fR \fB5213\fR" 4
+.IX Item "5213 : 5211 5212 5213"
+.IP "\fB5216\fR : \fB5214\fR \fB5216\fR" 4
+.IX Item "5216 : 5214 5216"
+.IP "\fB52235\fR : \fB52230\fR \fB52231\fR \fB52232\fR \fB52233\fR \fB52234\fR \fB52235\fR" 4
+.IX Item "52235 : 52230 52231 52232 52233 52234 52235"
+.IP "\fB5225\fR : \fB5224\fR \fB5225\fR" 4
+.IX Item "5225 : 5224 5225"
+.IP "\fB52259\fR : \fB52252\fR \fB52254\fR \fB52255\fR \fB52256\fR \fB52258\fR \fB52259\fR" 4
+.IX Item "52259 : 52252 52254 52255 52256 52258 52259"
+.IP "\fB5235\fR : \fB5232\fR \fB5233\fR \fB5234\fR \fB5235\fR \fB523x\fR" 4
+.IX Item "5235 : 5232 5233 5234 5235 523x"
+.IP "\fB5249\fR : \fB5249\fR" 4
+.IX Item "5249 : 5249"
+.IP "\fB5250\fR : \fB5250\fR" 4
+.IX Item "5250 : 5250"
+.IP "\fB5271\fR : \fB5270\fR \fB5271\fR" 4
+.IX Item "5271 : 5270 5271"
+.IP "\fB5272\fR : \fB5272\fR" 4
+.IX Item "5272 : 5272"
+.IP "\fB5275\fR : \fB5274\fR \fB5275\fR" 4
+.IX Item "5275 : 5274 5275"
+.IP "\fB5282\fR : \fB5280\fR \fB5281\fR \fB5282\fR \fB528x\fR" 4
+.IX Item "5282 : 5280 5281 5282 528x"
+.IP "\fB53017\fR : \fB53011\fR \fB53012\fR \fB53013\fR \fB53014\fR \fB53015\fR \fB53016\fR \fB53017\fR" 4
+.IX Item "53017 : 53011 53012 53013 53014 53015 53016 53017"
+.IP "\fB5307\fR : \fB5307\fR" 4
+.IX Item "5307 : 5307"
+.IP "\fB5329\fR : \fB5327\fR \fB5328\fR \fB5329\fR \fB532x\fR" 4
+.IX Item "5329 : 5327 5328 5329 532x"
+.IP "\fB5373\fR : \fB5372\fR \fB5373\fR \fB537x\fR" 4
+.IX Item "5373 : 5372 5373 537x"
+.IP "\fB5407\fR : \fB5407\fR" 4
+.IX Item "5407 : 5407"
+.IP "\fB5475\fR : \fB5470\fR \fB5471\fR \fB5472\fR \fB5473\fR \fB5474\fR \fB5475\fR \fB547x\fR \fB5480\fR \fB5481\fR \fB5482\fR \fB5483\fR \fB5484\fR \fB5485\fR" 4
+.IX Item "5475 : 5470 5471 5472 5473 5474 5475 547x 5480 5481 5482 5483 5484 5485"
+.RE
+.RS 4
+.PD
+.Sp
+\&\fB\-mcpu=\fR\fIcpu\fR overrides \fB\-march=\fR\fIarch\fR if
+\&\fIarch\fR is compatible with \fIcpu\fR.  Other combinations of
+\&\fB\-mcpu\fR and \fB\-march\fR are rejected.
+.Sp
+gcc defines the macro \fB_\|_mcf_cpu_\fR\fIcpu\fR when ColdFire target
+\&\fIcpu\fR is selected.  It also defines \fB_\|_mcf_family_\fR\fIfamily\fR,
+where the value of \fIfamily\fR is given by the table above.
+.RE
+.IP "\fB\-mtune=\fR\fItune\fR" 4
+.IX Item "-mtune=tune"
+Tune the code for a particular microarchitecture, within the
+constraints set by \fB\-march\fR and \fB\-mcpu\fR.
+The M680x0 microarchitectures are: \fB68000\fR, \fB68010\fR,
+\&\fB68020\fR, \fB68030\fR, \fB68040\fR, \fB68060\fR
+and \fBcpu32\fR.  The ColdFire microarchitectures
+are: \fBcfv1\fR, \fBcfv2\fR, \fBcfv3\fR, \fBcfv4\fR and \fBcfv4e\fR.
+.Sp
+You can also use \fB\-mtune=68020\-40\fR for code that needs
+to run relatively well on 68020, 68030 and 68040 targets.
+\&\fB\-mtune=68020\-60\fR is similar but includes 68060 targets
+as well.  These two options select the same tuning decisions as
+\&\fB\-m68020\-40\fR and \fB\-m68020\-60\fR respectively.
+.Sp
+gcc defines the macros \fB_\|_mc\fR\fIarch\fR and \fB_\|_mc\fR\fIarch\fR\fB_\|_\fR
+when tuning for 680x0 architecture \fIarch\fR.  It also defines
+\&\fBmc\fR\fIarch\fR unless either \fB\-ansi\fR or a non-GNU \fB\-std\fR
+option is used.  If gcc is tuning for a range of architectures,
+as selected by \fB\-mtune=68020\-40\fR or \fB\-mtune=68020\-60\fR,
+it defines the macros for every architecture in the range.
+.Sp
+gcc also defines the macro \fB_\|_m\fR\fIuarch\fR\fB_\|_\fR when tuning for
+ColdFire microarchitecture \fIuarch\fR, where \fIuarch\fR is one
+of the arguments given above.
+.IP "\fB\-m68000\fR" 4
+.IX Item "-m68000"
+.PD 0
+.IP "\fB\-mc68000\fR" 4
+.IX Item "-mc68000"
+.PD
+Generate output for a 68000.  This is the default
+when the compiler is configured for 68000\-based systems.
+It is equivalent to \fB\-march=68000\fR.
+.Sp
+Use this option for microcontrollers with a 68000 or \s-1EC000\s0 core,
+including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356.
+.IP "\fB\-m68010\fR" 4
+.IX Item "-m68010"
+Generate output for a 68010.  This is the default
+when the compiler is configured for 68010\-based systems.
+It is equivalent to \fB\-march=68010\fR.
+.IP "\fB\-m68020\fR" 4
+.IX Item "-m68020"
+.PD 0
+.IP "\fB\-mc68020\fR" 4
+.IX Item "-mc68020"
+.PD
+Generate output for a 68020.  This is the default
+when the compiler is configured for 68020\-based systems.
+It is equivalent to \fB\-march=68020\fR.
+.IP "\fB\-m68030\fR" 4
+.IX Item "-m68030"
+Generate output for a 68030.  This is the default when the compiler is
+configured for 68030\-based systems.  It is equivalent to
+\&\fB\-march=68030\fR.
+.IP "\fB\-m68040\fR" 4
+.IX Item "-m68040"
+Generate output for a 68040.  This is the default when the compiler is
+configured for 68040\-based systems.  It is equivalent to
+\&\fB\-march=68040\fR.
+.Sp
+This option inhibits the use of 68881/68882 instructions that have to be
+emulated by software on the 68040.  Use this option if your 68040 does not
+have code to emulate those instructions.
+.IP "\fB\-m68060\fR" 4
+.IX Item "-m68060"
+Generate output for a 68060.  This is the default when the compiler is
+configured for 68060\-based systems.  It is equivalent to
+\&\fB\-march=68060\fR.
+.Sp
+This option inhibits the use of 68020 and 68881/68882 instructions that
+have to be emulated by software on the 68060.  Use this option if your 68060
+does not have code to emulate those instructions.
+.IP "\fB\-mcpu32\fR" 4
+.IX Item "-mcpu32"
+Generate output for a \s-1CPU32\s0.  This is the default
+when the compiler is configured for CPU32\-based systems.
+It is equivalent to \fB\-march=cpu32\fR.
+.Sp
+Use this option for microcontrollers with a
+\&\s-1CPU32\s0 or \s-1CPU32+\s0 core, including the 68330, 68331, 68332, 68333, 68334,
+68336, 68340, 68341, 68349 and 68360.
+.IP "\fB\-m5200\fR" 4
+.IX Item "-m5200"
+Generate output for a 520X ColdFire \s-1CPU\s0.  This is the default
+when the compiler is configured for 520X\-based systems.
+It is equivalent to \fB\-mcpu=5206\fR, and is now deprecated
+in favor of that option.
+.Sp
+Use this option for microcontroller with a 5200 core, including
+the \s-1MCF5202\s0, \s-1MCF5203\s0, \s-1MCF5204\s0 and \s-1MCF5206\s0.
+.IP "\fB\-m5206e\fR" 4
+.IX Item "-m5206e"
+Generate output for a 5206e ColdFire \s-1CPU\s0.  The option is now
+deprecated in favor of the equivalent \fB\-mcpu=5206e\fR.
+.IP "\fB\-m528x\fR" 4
+.IX Item "-m528x"
+Generate output for a member of the ColdFire 528X family.
+The option is now deprecated in favor of the equivalent
+\&\fB\-mcpu=528x\fR.
+.IP "\fB\-m5307\fR" 4
+.IX Item "-m5307"
+Generate output for a ColdFire 5307 \s-1CPU\s0.  The option is now deprecated
+in favor of the equivalent \fB\-mcpu=5307\fR.
+.IP "\fB\-m5407\fR" 4
+.IX Item "-m5407"
+Generate output for a ColdFire 5407 \s-1CPU\s0.  The option is now deprecated
+in favor of the equivalent \fB\-mcpu=5407\fR.
+.IP "\fB\-mcfv4e\fR" 4
+.IX Item "-mcfv4e"
+Generate output for a ColdFire V4e family \s-1CPU\s0 (e.g. 547x/548x).
+This includes use of hardware floating point instructions.
+The option is equivalent to \fB\-mcpu=547x\fR, and is now
+deprecated in favor of that option.
+.IP "\fB\-m68020\-40\fR" 4
+.IX Item "-m68020-40"
+Generate output for a 68040, without using any of the new instructions.
+This results in code which can run relatively efficiently on either a
+68020/68881 or a 68030 or a 68040.  The generated code does use the
+68881 instructions that are emulated on the 68040.
+.Sp
+The option is equivalent to \fB\-march=68020\fR \fB\-mtune=68020\-40\fR.
+.IP "\fB\-m68020\-60\fR" 4
+.IX Item "-m68020-60"
+Generate output for a 68060, without using any of the new instructions.
+This results in code which can run relatively efficiently on either a
+68020/68881 or a 68030 or a 68040.  The generated code does use the
+68881 instructions that are emulated on the 68060.
+.Sp
+The option is equivalent to \fB\-march=68020\fR \fB\-mtune=68020\-60\fR.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD 0
+.IP "\fB\-m68881\fR" 4
+.IX Item "-m68881"
+.PD
+Generate floating-point instructions.  This is the default for 68020
+and above, and for ColdFire devices that have an \s-1FPU\s0.  It defines the
+macro \fB_\|_HAVE_68881_\|_\fR on M680x0 targets and \fB_\|_mcffpu_\|_\fR
+on ColdFire targets.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Do not generate floating-point instructions; use library calls instead.
+This is the default for 68000, 68010, and 68832 targets.  It is also
+the default for ColdFire devices that have no \s-1FPU\s0.
+.IP "\fB\-mdiv\fR" 4
+.IX Item "-mdiv"
+.PD 0
+.IP "\fB\-mno\-div\fR" 4
+.IX Item "-mno-div"
+.PD
+Generate (do not generate) ColdFire hardware divide and remainder
+instructions.  If \fB\-march\fR is used without \fB\-mcpu\fR,
+the default is \*(L"on\*(R" for ColdFire architectures and \*(L"off\*(R" for M680x0
+architectures.  Otherwise, the default is taken from the target \s-1CPU\s0
+(either the default \s-1CPU\s0, or the one specified by \fB\-mcpu\fR).  For
+example, the default is \*(L"off\*(R" for \fB\-mcpu=5206\fR and \*(L"on\*(R" for
+\&\fB\-mcpu=5206e\fR.
+.Sp
+gcc defines the macro \fB_\|_mcfhwdiv_\|_\fR when this option is enabled.
+.IP "\fB\-mshort\fR" 4
+.IX Item "-mshort"
+Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR.
+Additionally, parameters passed on the stack are also aligned to a
+16\-bit boundary even on targets whose \s-1API\s0 mandates promotion to 32\-bit.
+.IP "\fB\-mno\-short\fR" 4
+.IX Item "-mno-short"
+Do not consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide.  This is the default.
+.IP "\fB\-mnobitfield\fR" 4
+.IX Item "-mnobitfield"
+.PD 0
+.IP "\fB\-mno\-bitfield\fR" 4
+.IX Item "-mno-bitfield"
+.PD
+Do not use the bit-field instructions.  The \fB\-m68000\fR, \fB\-mcpu32\fR
+and \fB\-m5200\fR options imply \fB\-mnobitfield\fR.
+.IP "\fB\-mbitfield\fR" 4
+.IX Item "-mbitfield"
+Do use the bit-field instructions.  The \fB\-m68020\fR option implies
+\&\fB\-mbitfield\fR.  This is the default if you use a configuration
+designed for a 68020.
+.IP "\fB\-mrtd\fR" 4
+.IX Item "-mrtd"
+Use a different function-calling convention, in which functions
+that take a fixed number of arguments return with the \f(CW\*(C`rtd\*(C'\fR
+instruction, which pops their arguments while returning.  This
+saves one instruction in the caller since there is no need to pop
+the arguments there.
+.Sp
+This calling convention is incompatible with the one normally
+used on Unix, so you cannot use it if you need to call libraries
+compiled with the Unix compiler.
+.Sp
+Also, you must provide function prototypes for all functions that
+take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR);
+otherwise incorrect code will be generated for calls to those
+functions.
+.Sp
+In addition, seriously incorrect code will result if you call a
+function with too many arguments.  (Normally, extra arguments are
+harmlessly ignored.)
+.Sp
+The \f(CW\*(C`rtd\*(C'\fR instruction is supported by the 68010, 68020, 68030,
+68040, 68060 and \s-1CPU32\s0 processors, but not by the 68000 or 5200.
+.IP "\fB\-mno\-rtd\fR" 4
+.IX Item "-mno-rtd"
+Do not use the calling conventions selected by \fB\-mrtd\fR.
+This is the default.
+.IP "\fB\-malign\-int\fR" 4
+.IX Item "-malign-int"
+.PD 0
+.IP "\fB\-mno\-align\-int\fR" 4
+.IX Item "-mno-align-int"
+.PD
+Control whether \s-1GCC\s0 aligns \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`long long\*(C'\fR,
+\&\f(CW\*(C`float\*(C'\fR, \f(CW\*(C`double\*(C'\fR, and \f(CW\*(C`long double\*(C'\fR variables on a 32\-bit
+boundary (\fB\-malign\-int\fR) or a 16\-bit boundary (\fB\-mno\-align\-int\fR).
+Aligning variables on 32\-bit boundaries produces code that runs somewhat
+faster on processors with 32\-bit busses at the expense of more memory.
+.Sp
+\&\fBWarning:\fR if you use the \fB\-malign\-int\fR switch, \s-1GCC\s0 will
+align structures containing the above types  differently than
+most published application binary interface specifications for the m68k.
+.IP "\fB\-mpcrel\fR" 4
+.IX Item "-mpcrel"
+Use the pc-relative addressing mode of the 68000 directly, instead of
+using a global offset table.  At present, this option implies \fB\-fpic\fR,
+allowing at most a 16\-bit offset for pc-relative addressing.  \fB\-fPIC\fR is
+not presently supported with \fB\-mpcrel\fR, though this could be supported for
+68020 and higher processors.
+.IP "\fB\-mno\-strict\-align\fR" 4
+.IX Item "-mno-strict-align"
+.PD 0
+.IP "\fB\-mstrict\-align\fR" 4
+.IX Item "-mstrict-align"
+.PD
+Do not (do) assume that unaligned memory references will be handled by
+the system.
+.IP "\fB\-msep\-data\fR" 4
+.IX Item "-msep-data"
+Generate code that allows the data segment to be located in a different
+area of memory from the text segment.  This allows for execute in place in
+an environment without virtual memory management.  This option implies
+\&\fB\-fPIC\fR.
+.IP "\fB\-mno\-sep\-data\fR" 4
+.IX Item "-mno-sep-data"
+Generate code that assumes that the data segment follows the text segment.
+This is the default.
+.IP "\fB\-mid\-shared\-library\fR" 4
+.IX Item "-mid-shared-library"
+Generate code that supports shared libraries via the library \s-1ID\s0 method.
+This allows for execute in place and shared libraries in an environment
+without virtual memory management.  This option implies \fB\-fPIC\fR.
+.IP "\fB\-mno\-id\-shared\-library\fR" 4
+.IX Item "-mno-id-shared-library"
+Generate code that doesn't assume \s-1ID\s0 based shared libraries are being used.
+This is the default.
+.IP "\fB\-mshared\-library\-id=n\fR" 4
+.IX Item "-mshared-library-id=n"
+Specified the identification number of the \s-1ID\s0 based shared library being
+compiled.  Specifying a value of 0 will generate more compact code, specifying
+other values will force the allocation of that number to the current
+library but is no more space or time efficient than omitting this option.
+.IP "\fB\-mxgot\fR" 4
+.IX Item "-mxgot"
+.PD 0
+.IP "\fB\-mno\-xgot\fR" 4
+.IX Item "-mno-xgot"
+.PD
+When generating position-independent code for ColdFire, generate code
+that works if the \s-1GOT\s0 has more than 8192 entries.  This code is
+larger and slower than code generated without this option.  On M680x0
+processors, this option is not needed; \fB\-fPIC\fR suffices.
+.Sp
+\&\s-1GCC\s0 normally uses a single instruction to load values from the \s-1GOT\s0.
+While this is relatively efficient, it only works if the \s-1GOT\s0
+is smaller than about 64k.  Anything larger causes the linker
+to report an error such as:
+.Sp
+.Vb 1
+\&        relocation truncated to fit: R_68K_GOT16O foobar
+.Ve
+.Sp
+If this happens, you should recompile your code with \fB\-mxgot\fR.
+It should then work with very large GOTs.  However, code generated with
+\&\fB\-mxgot\fR is less efficient, since it takes 4 instructions to fetch
+the value of a global symbol.
+.Sp
+Note that some linkers, including newer versions of the \s-1GNU\s0 linker,
+can create multiple GOTs and sort \s-1GOT\s0 entries.  If you have such a linker,
+you should only need to use \fB\-mxgot\fR when compiling a single
+object file that accesses more than 8192 \s-1GOT\s0 entries.  Very few do.
+.Sp
+These options have no effect unless \s-1GCC\s0 is generating
+position-independent code.
+.PP
+\fIM68hc1x Options\fR
+.IX Subsection "M68hc1x Options"
+.PP
+These are the \fB\-m\fR options defined for the 68hc11 and 68hc12
+microcontrollers.  The default values for these options depends on
+which style of microcontroller was selected when the compiler was configured;
+the defaults for the most common choices are given below.
+.IP "\fB\-m6811\fR" 4
+.IX Item "-m6811"
+.PD 0
+.IP "\fB\-m68hc11\fR" 4
+.IX Item "-m68hc11"
+.PD
+Generate output for a 68HC11.  This is the default
+when the compiler is configured for 68HC11\-based systems.
+.IP "\fB\-m6812\fR" 4
+.IX Item "-m6812"
+.PD 0
+.IP "\fB\-m68hc12\fR" 4
+.IX Item "-m68hc12"
+.PD
+Generate output for a 68HC12.  This is the default
+when the compiler is configured for 68HC12\-based systems.
+.IP "\fB\-m68S12\fR" 4
+.IX Item "-m68S12"
+.PD 0
+.IP "\fB\-m68hcs12\fR" 4
+.IX Item "-m68hcs12"
+.PD
+Generate output for a 68HCS12.
+.IP "\fB\-mauto\-incdec\fR" 4
+.IX Item "-mauto-incdec"
+Enable the use of 68HC12 pre and post auto-increment and auto-decrement
+addressing modes.
+.IP "\fB\-minmax\fR" 4
+.IX Item "-minmax"
+.PD 0
+.IP "\fB\-mnominmax\fR" 4
+.IX Item "-mnominmax"
+.PD
+Enable the use of 68HC12 min and max instructions.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Treat all calls as being far away (near).  If calls are assumed to be
+far away, the compiler will use the \f(CW\*(C`call\*(C'\fR instruction to
+call a function and the \f(CW\*(C`rtc\*(C'\fR instruction for returning.
+.IP "\fB\-mshort\fR" 4
+.IX Item "-mshort"
+Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR.
+.IP "\fB\-msoft\-reg\-count=\fR\fIcount\fR" 4
+.IX Item "-msoft-reg-count=count"
+Specify the number of pseudo-soft registers which are used for the
+code generation.  The maximum number is 32.  Using more pseudo-soft
+register may or may not result in better code depending on the program.
+The default is 4 for 68HC11 and 2 for 68HC12.
+.PP
+\fIMCore Options\fR
+.IX Subsection "MCore Options"
+.PP
+These are the \fB\-m\fR options defined for the Motorola M*Core
+processors.
+.IP "\fB\-mhardlit\fR" 4
+.IX Item "-mhardlit"
+.PD 0
+.IP "\fB\-mno\-hardlit\fR" 4
+.IX Item "-mno-hardlit"
+.PD
+Inline constants into the code stream if it can be done in two
+instructions or less.
+.IP "\fB\-mdiv\fR" 4
+.IX Item "-mdiv"
+.PD 0
+.IP "\fB\-mno\-div\fR" 4
+.IX Item "-mno-div"
+.PD
+Use the divide instruction.  (Enabled by default).
+.IP "\fB\-mrelax\-immediate\fR" 4
+.IX Item "-mrelax-immediate"
+.PD 0
+.IP "\fB\-mno\-relax\-immediate\fR" 4
+.IX Item "-mno-relax-immediate"
+.PD
+Allow arbitrary sized immediates in bit operations.
+.IP "\fB\-mwide\-bitfields\fR" 4
+.IX Item "-mwide-bitfields"
+.PD 0
+.IP "\fB\-mno\-wide\-bitfields\fR" 4
+.IX Item "-mno-wide-bitfields"
+.PD
+Always treat bit-fields as int-sized.
+.IP "\fB\-m4byte\-functions\fR" 4
+.IX Item "-m4byte-functions"
+.PD 0
+.IP "\fB\-mno\-4byte\-functions\fR" 4
+.IX Item "-mno-4byte-functions"
+.PD
+Force all functions to be aligned to a four byte boundary.
+.IP "\fB\-mcallgraph\-data\fR" 4
+.IX Item "-mcallgraph-data"
+.PD 0
+.IP "\fB\-mno\-callgraph\-data\fR" 4
+.IX Item "-mno-callgraph-data"
+.PD
+Emit callgraph information.
+.IP "\fB\-mslow\-bytes\fR" 4
+.IX Item "-mslow-bytes"
+.PD 0
+.IP "\fB\-mno\-slow\-bytes\fR" 4
+.IX Item "-mno-slow-bytes"
+.PD
+Prefer word access when reading byte quantities.
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+.PD 0
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+.PD
+Generate code for a little endian target.
+.IP "\fB\-m210\fR" 4
+.IX Item "-m210"
+.PD 0
+.IP "\fB\-m340\fR" 4
+.IX Item "-m340"
+.PD
+Generate code for the 210 processor.
+.IP "\fB\-mno\-lsim\fR" 4
+.IX Item "-mno-lsim"
+Assume that run-time support has been provided and so omit the
+simulator library (\fIlibsim.a)\fR from the linker command line.
+.IP "\fB\-mstack\-increment=\fR\fIsize\fR" 4
+.IX Item "-mstack-increment=size"
+Set the maximum amount for a single stack increment operation.  Large
+values can increase the speed of programs which contain functions
+that need a large amount of stack space, but they can also trigger a
+segmentation fault if the stack is extended too much.  The default
+value is 0x1000.
+.PP
+\fIMeP Options\fR
+.IX Subsection "MeP Options"
+.IP "\fB\-mabsdiff\fR" 4
+.IX Item "-mabsdiff"
+Enables the \f(CW\*(C`abs\*(C'\fR instruction, which is the absolute difference
+between two registers.
+.IP "\fB\-mall\-opts\fR" 4
+.IX Item "-mall-opts"
+Enables all the optional instructions \- average, multiply, divide, bit
+operations, leading zero, absolute difference, min/max, clip, and
+saturation.
+.IP "\fB\-maverage\fR" 4
+.IX Item "-maverage"
+Enables the \f(CW\*(C`ave\*(C'\fR instruction, which computes the average of two
+registers.
+.IP "\fB\-mbased=\fR\fIn\fR" 4
+.IX Item "-mbased=n"
+Variables of size \fIn\fR bytes or smaller will be placed in the
+\&\f(CW\*(C`.based\*(C'\fR section by default.  Based variables use the \f(CW$tp\fR
+register as a base register, and there is a 128 byte limit to the
+\&\f(CW\*(C`.based\*(C'\fR section.
+.IP "\fB\-mbitops\fR" 4
+.IX Item "-mbitops"
+Enables the bit operation instructions \- bit test (\f(CW\*(C`btstm\*(C'\fR), set
+(\f(CW\*(C`bsetm\*(C'\fR), clear (\f(CW\*(C`bclrm\*(C'\fR), invert (\f(CW\*(C`bnotm\*(C'\fR), and
+test-and-set (\f(CW\*(C`tas\*(C'\fR).
+.IP "\fB\-mc=\fR\fIname\fR" 4
+.IX Item "-mc=name"
+Selects which section constant data will be placed in.  \fIname\fR may
+be \f(CW\*(C`tiny\*(C'\fR, \f(CW\*(C`near\*(C'\fR, or \f(CW\*(C`far\*(C'\fR.
+.IP "\fB\-mclip\fR" 4
+.IX Item "-mclip"
+Enables the \f(CW\*(C`clip\*(C'\fR instruction.  Note that \f(CW\*(C`\-mclip\*(C'\fR is not
+useful unless you also provide \f(CW\*(C`\-mminmax\*(C'\fR.
+.IP "\fB\-mconfig=\fR\fIname\fR" 4
+.IX Item "-mconfig=name"
+Selects one of the build-in core configurations.  Each MeP chip has
+one or more modules in it; each module has a core \s-1CPU\s0 and a variety of
+coprocessors, optional instructions, and peripherals.  The
+\&\f(CW\*(C`MeP\-Integrator\*(C'\fR tool, not part of \s-1GCC\s0, provides these
+configurations through this option; using this option is the same as
+using all the corresponding command line options.  The default
+configuration is \f(CW\*(C`default\*(C'\fR.
+.IP "\fB\-mcop\fR" 4
+.IX Item "-mcop"
+Enables the coprocessor instructions.  By default, this is a 32\-bit
+coprocessor.  Note that the coprocessor is normally enabled via the
+\&\f(CW\*(C`\-mconfig=\*(C'\fR option.
+.IP "\fB\-mcop32\fR" 4
+.IX Item "-mcop32"
+Enables the 32\-bit coprocessor's instructions.
+.IP "\fB\-mcop64\fR" 4
+.IX Item "-mcop64"
+Enables the 64\-bit coprocessor's instructions.
+.IP "\fB\-mivc2\fR" 4
+.IX Item "-mivc2"
+Enables \s-1IVC2\s0 scheduling.  \s-1IVC2\s0 is a 64\-bit \s-1VLIW\s0 coprocessor.
+.IP "\fB\-mdc\fR" 4
+.IX Item "-mdc"
+Causes constant variables to be placed in the \f(CW\*(C`.near\*(C'\fR section.
+.IP "\fB\-mdiv\fR" 4
+.IX Item "-mdiv"
+Enables the \f(CW\*(C`div\*(C'\fR and \f(CW\*(C`divu\*(C'\fR instructions.
+.IP "\fB\-meb\fR" 4
+.IX Item "-meb"
+Generate big-endian code.
+.IP "\fB\-mel\fR" 4
+.IX Item "-mel"
+Generate little-endian code.
+.IP "\fB\-mio\-volatile\fR" 4
+.IX Item "-mio-volatile"
+Tells the compiler that any variable marked with the \f(CW\*(C`io\*(C'\fR
+attribute is to be considered volatile.
+.IP "\fB\-ml\fR" 4
+.IX Item "-ml"
+Causes variables to be assigned to the \f(CW\*(C`.far\*(C'\fR section by default.
+.IP "\fB\-mleadz\fR" 4
+.IX Item "-mleadz"
+Enables the \f(CW\*(C`leadz\*(C'\fR (leading zero) instruction.
+.IP "\fB\-mm\fR" 4
+.IX Item "-mm"
+Causes variables to be assigned to the \f(CW\*(C`.near\*(C'\fR section by default.
+.IP "\fB\-mminmax\fR" 4
+.IX Item "-mminmax"
+Enables the \f(CW\*(C`min\*(C'\fR and \f(CW\*(C`max\*(C'\fR instructions.
+.IP "\fB\-mmult\fR" 4
+.IX Item "-mmult"
+Enables the multiplication and multiply-accumulate instructions.
+.IP "\fB\-mno\-opts\fR" 4
+.IX Item "-mno-opts"
+Disables all the optional instructions enabled by \f(CW\*(C`\-mall\-opts\*(C'\fR.
+.IP "\fB\-mrepeat\fR" 4
+.IX Item "-mrepeat"
+Enables the \f(CW\*(C`repeat\*(C'\fR and \f(CW\*(C`erepeat\*(C'\fR instructions, used for
+low-overhead looping.
+.IP "\fB\-ms\fR" 4
+.IX Item "-ms"
+Causes all variables to default to the \f(CW\*(C`.tiny\*(C'\fR section.  Note
+that there is a 65536 byte limit to this section.  Accesses to these
+variables use the \f(CW%gp\fR base register.
+.IP "\fB\-msatur\fR" 4
+.IX Item "-msatur"
+Enables the saturation instructions.  Note that the compiler does not
+currently generate these itself, but this option is included for
+compatibility with other tools, like \f(CW\*(C`as\*(C'\fR.
+.IP "\fB\-msdram\fR" 4
+.IX Item "-msdram"
+Link the SDRAM-based runtime instead of the default ROM-based runtime.
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+Link the simulator runtime libraries.
+.IP "\fB\-msimnovec\fR" 4
+.IX Item "-msimnovec"
+Link the simulator runtime libraries, excluding built-in support
+for reset and exception vectors and tables.
+.IP "\fB\-mtf\fR" 4
+.IX Item "-mtf"
+Causes all functions to default to the \f(CW\*(C`.far\*(C'\fR section.  Without
+this option, functions default to the \f(CW\*(C`.near\*(C'\fR section.
+.IP "\fB\-mtiny=\fR\fIn\fR" 4
+.IX Item "-mtiny=n"
+Variables that are \fIn\fR bytes or smaller will be allocated to the
+\&\f(CW\*(C`.tiny\*(C'\fR section.  These variables use the \f(CW$gp\fR base
+register.  The default for this option is 4, but note that there's a
+65536 byte limit to the \f(CW\*(C`.tiny\*(C'\fR section.
+.PP
+\fIMicroBlaze Options\fR
+.IX Subsection "MicroBlaze Options"
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Use software emulation for floating point (default).
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+Use hardware floating point instructions.
+.IP "\fB\-mmemcpy\fR" 4
+.IX Item "-mmemcpy"
+Do not optimize block moves, use \f(CW\*(C`memcpy\*(C'\fR.
+.IP "\fB\-mno\-clearbss\fR" 4
+.IX Item "-mno-clearbss"
+This option is deprecated.  Use \fB\-fno\-zero\-initialized\-in\-bss\fR instead.
+.IP "\fB\-mcpu=\fR\fIcpu-type\fR" 4
+.IX Item "-mcpu=cpu-type"
+Use features of and schedule code for given \s-1CPU\s0.
+Supported values are in the format \fBv\fR\fIX\fR\fB.\fR\fI\s-1YY\s0\fR\fB.\fR\fIZ\fR, 
+where \fIX\fR is a major version, \fI\s-1YY\s0\fR is the minor version, and 
+\&\fIZ\fR is compatibility code.  Example values are \fBv3.00.a\fR,
+\&\fBv4.00.b\fR, \fBv5.00.a\fR, \fBv5.00.b\fR, \fBv5.00.b\fR, \fBv6.00.a\fR.
+.IP "\fB\-mxl\-soft\-mul\fR" 4
+.IX Item "-mxl-soft-mul"
+Use software multiply emulation (default).
+.IP "\fB\-mxl\-soft\-div\fR" 4
+.IX Item "-mxl-soft-div"
+Use software emulation for divides (default).
+.IP "\fB\-mxl\-barrel\-shift\fR" 4
+.IX Item "-mxl-barrel-shift"
+Use the hardware barrel shifter.
+.IP "\fB\-mxl\-pattern\-compare\fR" 4
+.IX Item "-mxl-pattern-compare"
+Use pattern compare instructions.
+.IP "\fB\-msmall\-divides\fR" 4
+.IX Item "-msmall-divides"
+Use table lookup optimization for small signed integer divisions.
+.IP "\fB\-mxl\-stack\-check\fR" 4
+.IX Item "-mxl-stack-check"
+This option is deprecated.  Use \-fstack\-check instead.
+.IP "\fB\-mxl\-gp\-opt\fR" 4
+.IX Item "-mxl-gp-opt"
+Use \s-1GP\s0 relative sdata/sbss sections.
+.IP "\fB\-mxl\-multiply\-high\fR" 4
+.IX Item "-mxl-multiply-high"
+Use multiply high instructions for high part of 32x32 multiply.
+.IP "\fB\-mxl\-float\-convert\fR" 4
+.IX Item "-mxl-float-convert"
+Use hardware floating point conversion instructions.
+.IP "\fB\-mxl\-float\-sqrt\fR" 4
+.IX Item "-mxl-float-sqrt"
+Use hardware floating point square root instruction.
+.IP "\fB\-mxl\-mode\-\fR\fIapp-model\fR" 4
+.IX Item "-mxl-mode-app-model"
+Select application model \fIapp-model\fR.  Valid models are
+.RS 4
+.IP "\fBexecutable\fR" 4
+.IX Item "executable"
+normal executable (default), uses startup code \fIcrt0.o\fR.
+.IP "\fBxmdstub\fR" 4
+.IX Item "xmdstub"
+for use with Xilinx Microprocessor Debugger (\s-1XMD\s0) based 
+software intrusive debug agent called xmdstub. This uses startup file 
+\&\fIcrt1.o\fR and sets the start address of the program to be 0x800.
+.IP "\fBbootstrap\fR" 4
+.IX Item "bootstrap"
+for applications that are loaded using a bootloader.
+This model uses startup file \fIcrt2.o\fR which does not contain a processor 
+reset vector handler. This is suitable for transferring control on a 
+processor reset to the bootloader rather than the application.
+.IP "\fBnovectors\fR" 4
+.IX Item "novectors"
+for applications that do not require any of the 
+MicroBlaze vectors. This option may be useful for applications running
+within a monitoring application. This model uses \fIcrt3.o\fR as a startup file.
+.RE
+.RS 4
+.Sp
+Option \fB\-xl\-mode\-\fR\fIapp-model\fR is a deprecated alias for 
+\&\fB\-mxl\-mode\-\fR\fIapp-model\fR.
+.RE
+.PP
+\fI\s-1MIPS\s0 Options\fR
+.IX Subsection "MIPS Options"
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+Generate big-endian code.
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+Generate little-endian code.  This is the default for \fBmips*el\-*\-*\fR
+configurations.
+.IP "\fB\-march=\fR\fIarch\fR" 4
+.IX Item "-march=arch"
+Generate code that will run on \fIarch\fR, which can be the name of a
+generic \s-1MIPS\s0 \s-1ISA\s0, or the name of a particular processor.
+The \s-1ISA\s0 names are:
+\&\fBmips1\fR, \fBmips2\fR, \fBmips3\fR, \fBmips4\fR,
+\&\fBmips32\fR, \fBmips32r2\fR, \fBmips64\fR and \fBmips64r2\fR.
+The processor names are:
+\&\fB4kc\fR, \fB4km\fR, \fB4kp\fR, \fB4ksc\fR,
+\&\fB4kec\fR, \fB4kem\fR, \fB4kep\fR, \fB4ksd\fR,
+\&\fB5kc\fR, \fB5kf\fR,
+\&\fB20kc\fR,
+\&\fB24kc\fR, \fB24kf2_1\fR, \fB24kf1_1\fR,
+\&\fB24kec\fR, \fB24kef2_1\fR, \fB24kef1_1\fR,
+\&\fB34kc\fR, \fB34kf2_1\fR, \fB34kf1_1\fR,
+\&\fB74kc\fR, \fB74kf2_1\fR, \fB74kf1_1\fR, \fB74kf3_2\fR,
+\&\fB1004kc\fR, \fB1004kf2_1\fR, \fB1004kf1_1\fR,
+\&\fBloongson2e\fR, \fBloongson2f\fR, \fBloongson3a\fR,
+\&\fBm4k\fR,
+\&\fBocteon\fR,
+\&\fBorion\fR,
+\&\fBr2000\fR, \fBr3000\fR, \fBr3900\fR, \fBr4000\fR, \fBr4400\fR,
+\&\fBr4600\fR, \fBr4650\fR, \fBr6000\fR, \fBr8000\fR,
+\&\fBrm7000\fR, \fBrm9000\fR,
+\&\fBr10000\fR, \fBr12000\fR, \fBr14000\fR, \fBr16000\fR,
+\&\fBsb1\fR,
+\&\fBsr71000\fR,
+\&\fBvr4100\fR, \fBvr4111\fR, \fBvr4120\fR, \fBvr4130\fR, \fBvr4300\fR,
+\&\fBvr5000\fR, \fBvr5400\fR, \fBvr5500\fR
+and \fBxlr\fR.
+The special value \fBfrom-abi\fR selects the
+most compatible architecture for the selected \s-1ABI\s0 (that is,
+\&\fBmips1\fR for 32\-bit ABIs and \fBmips3\fR for 64\-bit ABIs).
+.Sp
+Native Linux/GNU toolchains also support the value \fBnative\fR,
+which selects the best architecture option for the host processor.
+\&\fB\-march=native\fR has no effect if \s-1GCC\s0 does not recognize
+the processor.
+.Sp
+In processor names, a final \fB000\fR can be abbreviated as \fBk\fR
+(for example, \fB\-march=r2k\fR).  Prefixes are optional, and
+\&\fBvr\fR may be written \fBr\fR.
+.Sp
+Names of the form \fIn\fR\fBf2_1\fR refer to processors with
+FPUs clocked at half the rate of the core, names of the form
+\&\fIn\fR\fBf1_1\fR refer to processors with FPUs clocked at the same
+rate as the core, and names of the form \fIn\fR\fBf3_2\fR refer to
+processors with FPUs clocked a ratio of 3:2 with respect to the core.
+For compatibility reasons, \fIn\fR\fBf\fR is accepted as a synonym
+for \fIn\fR\fBf2_1\fR while \fIn\fR\fBx\fR and \fIb\fR\fBfx\fR are
+accepted as synonyms for \fIn\fR\fBf1_1\fR.
+.Sp
+\&\s-1GCC\s0 defines two macros based on the value of this option.  The first
+is \fB_MIPS_ARCH\fR, which gives the name of target architecture, as
+a string.  The second has the form \fB_MIPS_ARCH_\fR\fIfoo\fR,
+where \fIfoo\fR is the capitalized value of \fB_MIPS_ARCH\fR.
+For example, \fB\-march=r2000\fR will set \fB_MIPS_ARCH\fR
+to \fB\*(L"r2000\*(R"\fR and define the macro \fB_MIPS_ARCH_R2000\fR.
+.Sp
+Note that the \fB_MIPS_ARCH\fR macro uses the processor names given
+above.  In other words, it will have the full prefix and will not
+abbreviate \fB000\fR as \fBk\fR.  In the case of \fBfrom-abi\fR,
+the macro names the resolved architecture (either \fB\*(L"mips1\*(R"\fR or
+\&\fB\*(L"mips3\*(R"\fR).  It names the default architecture when no
+\&\fB\-march\fR option is given.
+.IP "\fB\-mtune=\fR\fIarch\fR" 4
+.IX Item "-mtune=arch"
+Optimize for \fIarch\fR.  Among other things, this option controls
+the way instructions are scheduled, and the perceived cost of arithmetic
+operations.  The list of \fIarch\fR values is the same as for
+\&\fB\-march\fR.
+.Sp
+When this option is not used, \s-1GCC\s0 will optimize for the processor
+specified by \fB\-march\fR.  By using \fB\-march\fR and
+\&\fB\-mtune\fR together, it is possible to generate code that will
+run on a family of processors, but optimize the code for one
+particular member of that family.
+.Sp
+\&\fB\-mtune\fR defines the macros \fB_MIPS_TUNE\fR and
+\&\fB_MIPS_TUNE_\fR\fIfoo\fR, which work in the same way as the
+\&\fB\-march\fR ones described above.
+.IP "\fB\-mips1\fR" 4
+.IX Item "-mips1"
+Equivalent to \fB\-march=mips1\fR.
+.IP "\fB\-mips2\fR" 4
+.IX Item "-mips2"
+Equivalent to \fB\-march=mips2\fR.
+.IP "\fB\-mips3\fR" 4
+.IX Item "-mips3"
+Equivalent to \fB\-march=mips3\fR.
+.IP "\fB\-mips4\fR" 4
+.IX Item "-mips4"
+Equivalent to \fB\-march=mips4\fR.
+.IP "\fB\-mips32\fR" 4
+.IX Item "-mips32"
+Equivalent to \fB\-march=mips32\fR.
+.IP "\fB\-mips32r2\fR" 4
+.IX Item "-mips32r2"
+Equivalent to \fB\-march=mips32r2\fR.
+.IP "\fB\-mips64\fR" 4
+.IX Item "-mips64"
+Equivalent to \fB\-march=mips64\fR.
+.IP "\fB\-mips64r2\fR" 4
+.IX Item "-mips64r2"
+Equivalent to \fB\-march=mips64r2\fR.
+.IP "\fB\-mips16\fR" 4
+.IX Item "-mips16"
+.PD 0
+.IP "\fB\-mno\-mips16\fR" 4
+.IX Item "-mno-mips16"
+.PD
+Generate (do not generate) \s-1MIPS16\s0 code.  If \s-1GCC\s0 is targetting a
+\&\s-1MIPS32\s0 or \s-1MIPS64\s0 architecture, it will make use of the MIPS16e \s-1ASE\s0.
+.Sp
+\&\s-1MIPS16\s0 code generation can also be controlled on a per-function basis
+by means of \f(CW\*(C`mips16\*(C'\fR and \f(CW\*(C`nomips16\*(C'\fR attributes.
+.IP "\fB\-mflip\-mips16\fR" 4
+.IX Item "-mflip-mips16"
+Generate \s-1MIPS16\s0 code on alternating functions.  This option is provided
+for regression testing of mixed MIPS16/non\-MIPS16 code generation, and is
+not intended for ordinary use in compiling user code.
+.IP "\fB\-minterlink\-mips16\fR" 4
+.IX Item "-minterlink-mips16"
+.PD 0
+.IP "\fB\-mno\-interlink\-mips16\fR" 4
+.IX Item "-mno-interlink-mips16"
+.PD
+Require (do not require) that non\-MIPS16 code be link-compatible with
+\&\s-1MIPS16\s0 code.
+.Sp
+For example, non\-MIPS16 code cannot jump directly to \s-1MIPS16\s0 code;
+it must either use a call or an indirect jump.  \fB\-minterlink\-mips16\fR
+therefore disables direct jumps unless \s-1GCC\s0 knows that the target of the
+jump is not \s-1MIPS16\s0.
+.IP "\fB\-mabi=32\fR" 4
+.IX Item "-mabi=32"
+.PD 0
+.IP "\fB\-mabi=o64\fR" 4
+.IX Item "-mabi=o64"
+.IP "\fB\-mabi=n32\fR" 4
+.IX Item "-mabi=n32"
+.IP "\fB\-mabi=64\fR" 4
+.IX Item "-mabi=64"
+.IP "\fB\-mabi=eabi\fR" 4
+.IX Item "-mabi=eabi"
+.PD
+Generate code for the given \s-1ABI\s0.
+.Sp
+Note that the \s-1EABI\s0 has a 32\-bit and a 64\-bit variant.  \s-1GCC\s0 normally
+generates 64\-bit code when you select a 64\-bit architecture, but you
+can use \fB\-mgp32\fR to get 32\-bit code instead.
+.Sp
+For information about the O64 \s-1ABI\s0, see
+<\fBhttp://gcc.gnu.org/projects/mipso64\-abi.html\fR>.
+.Sp
+\&\s-1GCC\s0 supports a variant of the o32 \s-1ABI\s0 in which floating-point registers
+are 64 rather than 32 bits wide.  You can select this combination with
+\&\fB\-mabi=32\fR \fB\-mfp64\fR.  This \s-1ABI\s0 relies on the \fBmthc1\fR
+and \fBmfhc1\fR instructions and is therefore only supported for
+\&\s-1MIPS32R2\s0 processors.
+.Sp
+The register assignments for arguments and return values remain the
+same, but each scalar value is passed in a single 64\-bit register
+rather than a pair of 32\-bit registers.  For example, scalar
+floating-point values are returned in \fB\f(CB$f0\fB\fR only, not a
+\&\fB\f(CB$f0\fB\fR/\fB\f(CB$f1\fB\fR pair.  The set of call-saved registers also
+remains the same, but all 64 bits are saved.
+.IP "\fB\-mabicalls\fR" 4
+.IX Item "-mabicalls"
+.PD 0
+.IP "\fB\-mno\-abicalls\fR" 4
+.IX Item "-mno-abicalls"
+.PD
+Generate (do not generate) code that is suitable for SVR4\-style
+dynamic objects.  \fB\-mabicalls\fR is the default for SVR4\-based
+systems.
+.IP "\fB\-mshared\fR" 4
+.IX Item "-mshared"
+.PD 0
+.IP "\fB\-mno\-shared\fR" 4
+.IX Item "-mno-shared"
+.PD
+Generate (do not generate) code that is fully position-independent,
+and that can therefore be linked into shared libraries.  This option
+only affects \fB\-mabicalls\fR.
+.Sp
+All \fB\-mabicalls\fR code has traditionally been position-independent,
+regardless of options like \fB\-fPIC\fR and \fB\-fpic\fR.  However,
+as an extension, the \s-1GNU\s0 toolchain allows executables to use absolute
+accesses for locally-binding symbols.  It can also use shorter \s-1GP\s0
+initialization sequences and generate direct calls to locally-defined
+functions.  This mode is selected by \fB\-mno\-shared\fR.
+.Sp
+\&\fB\-mno\-shared\fR depends on binutils 2.16 or higher and generates
+objects that can only be linked by the \s-1GNU\s0 linker.  However, the option
+does not affect the \s-1ABI\s0 of the final executable; it only affects the \s-1ABI\s0
+of relocatable objects.  Using \fB\-mno\-shared\fR will generally make
+executables both smaller and quicker.
+.Sp
+\&\fB\-mshared\fR is the default.
+.IP "\fB\-mplt\fR" 4
+.IX Item "-mplt"
+.PD 0
+.IP "\fB\-mno\-plt\fR" 4
+.IX Item "-mno-plt"
+.PD
+Assume (do not assume) that the static and dynamic linkers
+support PLTs and copy relocations.  This option only affects
+\&\fB\-mno\-shared \-mabicalls\fR.  For the n64 \s-1ABI\s0, this option
+has no effect without \fB\-msym32\fR.
+.Sp
+You can make \fB\-mplt\fR the default by configuring
+\&\s-1GCC\s0 with \fB\-\-with\-mips\-plt\fR.  The default is
+\&\fB\-mno\-plt\fR otherwise.
+.IP "\fB\-mxgot\fR" 4
+.IX Item "-mxgot"
+.PD 0
+.IP "\fB\-mno\-xgot\fR" 4
+.IX Item "-mno-xgot"
+.PD
+Lift (do not lift) the usual restrictions on the size of the global
+offset table.
+.Sp
+\&\s-1GCC\s0 normally uses a single instruction to load values from the \s-1GOT\s0.
+While this is relatively efficient, it will only work if the \s-1GOT\s0
+is smaller than about 64k.  Anything larger will cause the linker
+to report an error such as:
+.Sp
+.Vb 1
+\&        relocation truncated to fit: R_MIPS_GOT16 foobar
+.Ve
+.Sp
+If this happens, you should recompile your code with \fB\-mxgot\fR.
+It should then work with very large GOTs, although it will also be
+less efficient, since it will take three instructions to fetch the
+value of a global symbol.
+.Sp
+Note that some linkers can create multiple GOTs.  If you have such a
+linker, you should only need to use \fB\-mxgot\fR when a single object
+file accesses more than 64k's worth of \s-1GOT\s0 entries.  Very few do.
+.Sp
+These options have no effect unless \s-1GCC\s0 is generating position
+independent code.
+.IP "\fB\-mgp32\fR" 4
+.IX Item "-mgp32"
+Assume that general-purpose registers are 32 bits wide.
+.IP "\fB\-mgp64\fR" 4
+.IX Item "-mgp64"
+Assume that general-purpose registers are 64 bits wide.
+.IP "\fB\-mfp32\fR" 4
+.IX Item "-mfp32"
+Assume that floating-point registers are 32 bits wide.
+.IP "\fB\-mfp64\fR" 4
+.IX Item "-mfp64"
+Assume that floating-point registers are 64 bits wide.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+Use floating-point coprocessor instructions.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Do not use floating-point coprocessor instructions.  Implement
+floating-point calculations using library calls instead.
+.IP "\fB\-msingle\-float\fR" 4
+.IX Item "-msingle-float"
+Assume that the floating-point coprocessor only supports single-precision
+operations.
+.IP "\fB\-mdouble\-float\fR" 4
+.IX Item "-mdouble-float"
+Assume that the floating-point coprocessor supports double-precision
+operations.  This is the default.
+.IP "\fB\-mllsc\fR" 4
+.IX Item "-mllsc"
+.PD 0
+.IP "\fB\-mno\-llsc\fR" 4
+.IX Item "-mno-llsc"
+.PD
+Use (do not use) \fBll\fR, \fBsc\fR, and \fBsync\fR instructions to
+implement atomic memory built-in functions.  When neither option is
+specified, \s-1GCC\s0 will use the instructions if the target architecture
+supports them.
+.Sp
+\&\fB\-mllsc\fR is useful if the runtime environment can emulate the
+instructions and \fB\-mno\-llsc\fR can be useful when compiling for
+nonstandard ISAs.  You can make either option the default by
+configuring \s-1GCC\s0 with \fB\-\-with\-llsc\fR and \fB\-\-without\-llsc\fR
+respectively.  \fB\-\-with\-llsc\fR is the default for some
+configurations; see the installation documentation for details.
+.IP "\fB\-mdsp\fR" 4
+.IX Item "-mdsp"
+.PD 0
+.IP "\fB\-mno\-dsp\fR" 4
+.IX Item "-mno-dsp"
+.PD
+Use (do not use) revision 1 of the \s-1MIPS\s0 \s-1DSP\s0 \s-1ASE\s0.
+  This option defines the
+preprocessor macro \fB_\|_mips_dsp\fR.  It also defines
+\&\fB_\|_mips_dsp_rev\fR to 1.
+.IP "\fB\-mdspr2\fR" 4
+.IX Item "-mdspr2"
+.PD 0
+.IP "\fB\-mno\-dspr2\fR" 4
+.IX Item "-mno-dspr2"
+.PD
+Use (do not use) revision 2 of the \s-1MIPS\s0 \s-1DSP\s0 \s-1ASE\s0.
+  This option defines the
+preprocessor macros \fB_\|_mips_dsp\fR and \fB_\|_mips_dspr2\fR.
+It also defines \fB_\|_mips_dsp_rev\fR to 2.
+.IP "\fB\-msmartmips\fR" 4
+.IX Item "-msmartmips"
+.PD 0
+.IP "\fB\-mno\-smartmips\fR" 4
+.IX Item "-mno-smartmips"
+.PD
+Use (do not use) the \s-1MIPS\s0 SmartMIPS \s-1ASE\s0.
+.IP "\fB\-mpaired\-single\fR" 4
+.IX Item "-mpaired-single"
+.PD 0
+.IP "\fB\-mno\-paired\-single\fR" 4
+.IX Item "-mno-paired-single"
+.PD
+Use (do not use) paired-single floating-point instructions.
+  This option requires
+hardware floating-point support to be enabled.
+.IP "\fB\-mdmx\fR" 4
+.IX Item "-mdmx"
+.PD 0
+.IP "\fB\-mno\-mdmx\fR" 4
+.IX Item "-mno-mdmx"
+.PD
+Use (do not use) \s-1MIPS\s0 Digital Media Extension instructions.
+This option can only be used when generating 64\-bit code and requires
+hardware floating-point support to be enabled.
+.IP "\fB\-mips3d\fR" 4
+.IX Item "-mips3d"
+.PD 0
+.IP "\fB\-mno\-mips3d\fR" 4
+.IX Item "-mno-mips3d"
+.PD
+Use (do not use) the \s-1MIPS\-3D\s0 \s-1ASE\s0.  
+The option \fB\-mips3d\fR implies \fB\-mpaired\-single\fR.
+.IP "\fB\-mmt\fR" 4
+.IX Item "-mmt"
+.PD 0
+.IP "\fB\-mno\-mt\fR" 4
+.IX Item "-mno-mt"
+.PD
+Use (do not use) \s-1MT\s0 Multithreading instructions.
+.IP "\fB\-mlong64\fR" 4
+.IX Item "-mlong64"
+Force \f(CW\*(C`long\*(C'\fR types to be 64 bits wide.  See \fB\-mlong32\fR for
+an explanation of the default and the way that the pointer size is
+determined.
+.IP "\fB\-mlong32\fR" 4
+.IX Item "-mlong32"
+Force \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`int\*(C'\fR, and pointer types to be 32 bits wide.
+.Sp
+The default size of \f(CW\*(C`int\*(C'\fRs, \f(CW\*(C`long\*(C'\fRs and pointers depends on
+the \s-1ABI\s0.  All the supported ABIs use 32\-bit \f(CW\*(C`int\*(C'\fRs.  The n64 \s-1ABI\s0
+uses 64\-bit \f(CW\*(C`long\*(C'\fRs, as does the 64\-bit \s-1EABI\s0; the others use
+32\-bit \f(CW\*(C`long\*(C'\fRs.  Pointers are the same size as \f(CW\*(C`long\*(C'\fRs,
+or the same size as integer registers, whichever is smaller.
+.IP "\fB\-msym32\fR" 4
+.IX Item "-msym32"
+.PD 0
+.IP "\fB\-mno\-sym32\fR" 4
+.IX Item "-mno-sym32"
+.PD
+Assume (do not assume) that all symbols have 32\-bit values, regardless
+of the selected \s-1ABI\s0.  This option is useful in combination with
+\&\fB\-mabi=64\fR and \fB\-mno\-abicalls\fR because it allows \s-1GCC\s0
+to generate shorter and faster references to symbolic addresses.
+.IP "\fB\-G\fR \fInum\fR" 4
+.IX Item "-G num"
+Put definitions of externally-visible data in a small data section
+if that data is no bigger than \fInum\fR bytes.  \s-1GCC\s0 can then access
+the data more efficiently; see \fB\-mgpopt\fR for details.
+.Sp
+The default \fB\-G\fR option depends on the configuration.
+.IP "\fB\-mlocal\-sdata\fR" 4
+.IX Item "-mlocal-sdata"
+.PD 0
+.IP "\fB\-mno\-local\-sdata\fR" 4
+.IX Item "-mno-local-sdata"
+.PD
+Extend (do not extend) the \fB\-G\fR behavior to local data too,
+such as to static variables in C.  \fB\-mlocal\-sdata\fR is the
+default for all configurations.
+.Sp
+If the linker complains that an application is using too much small data,
+you might want to try rebuilding the less performance-critical parts with
+\&\fB\-mno\-local\-sdata\fR.  You might also want to build large
+libraries with \fB\-mno\-local\-sdata\fR, so that the libraries leave
+more room for the main program.
+.IP "\fB\-mextern\-sdata\fR" 4
+.IX Item "-mextern-sdata"
+.PD 0
+.IP "\fB\-mno\-extern\-sdata\fR" 4
+.IX Item "-mno-extern-sdata"
+.PD
+Assume (do not assume) that externally-defined data will be in
+a small data section if that data is within the \fB\-G\fR limit.
+\&\fB\-mextern\-sdata\fR is the default for all configurations.
+.Sp
+If you compile a module \fIMod\fR with \fB\-mextern\-sdata\fR \fB\-G\fR
+\&\fInum\fR \fB\-mgpopt\fR, and \fIMod\fR references a variable \fIVar\fR
+that is no bigger than \fInum\fR bytes, you must make sure that \fIVar\fR
+is placed in a small data section.  If \fIVar\fR is defined by another
+module, you must either compile that module with a high-enough
+\&\fB\-G\fR setting or attach a \f(CW\*(C`section\*(C'\fR attribute to \fIVar\fR's
+definition.  If \fIVar\fR is common, you must link the application
+with a high-enough \fB\-G\fR setting.
+.Sp
+The easiest way of satisfying these restrictions is to compile
+and link every module with the same \fB\-G\fR option.  However,
+you may wish to build a library that supports several different
+small data limits.  You can do this by compiling the library with
+the highest supported \fB\-G\fR setting and additionally using
+\&\fB\-mno\-extern\-sdata\fR to stop the library from making assumptions
+about externally-defined data.
+.IP "\fB\-mgpopt\fR" 4
+.IX Item "-mgpopt"
+.PD 0
+.IP "\fB\-mno\-gpopt\fR" 4
+.IX Item "-mno-gpopt"
+.PD
+Use (do not use) GP-relative accesses for symbols that are known to be
+in a small data section; see \fB\-G\fR, \fB\-mlocal\-sdata\fR and
+\&\fB\-mextern\-sdata\fR.  \fB\-mgpopt\fR is the default for all
+configurations.
+.Sp
+\&\fB\-mno\-gpopt\fR is useful for cases where the \f(CW$gp\fR register
+might not hold the value of \f(CW\*(C`_gp\*(C'\fR.  For example, if the code is
+part of a library that might be used in a boot monitor, programs that
+call boot monitor routines will pass an unknown value in \f(CW$gp\fR.
+(In such situations, the boot monitor itself would usually be compiled
+with \fB\-G0\fR.)
+.Sp
+\&\fB\-mno\-gpopt\fR implies \fB\-mno\-local\-sdata\fR and
+\&\fB\-mno\-extern\-sdata\fR.
+.IP "\fB\-membedded\-data\fR" 4
+.IX Item "-membedded-data"
+.PD 0
+.IP "\fB\-mno\-embedded\-data\fR" 4
+.IX Item "-mno-embedded-data"
+.PD
+Allocate variables to the read-only data section first if possible, then
+next in the small data section if possible, otherwise in data.  This gives
+slightly slower code than the default, but reduces the amount of \s-1RAM\s0 required
+when executing, and thus may be preferred for some embedded systems.
+.IP "\fB\-muninit\-const\-in\-rodata\fR" 4
+.IX Item "-muninit-const-in-rodata"
+.PD 0
+.IP "\fB\-mno\-uninit\-const\-in\-rodata\fR" 4
+.IX Item "-mno-uninit-const-in-rodata"
+.PD
+Put uninitialized \f(CW\*(C`const\*(C'\fR variables in the read-only data section.
+This option is only meaningful in conjunction with \fB\-membedded\-data\fR.
+.IP "\fB\-mcode\-readable=\fR\fIsetting\fR" 4
+.IX Item "-mcode-readable=setting"
+Specify whether \s-1GCC\s0 may generate code that reads from executable sections.
+There are three possible settings:
+.RS 4
+.IP "\fB\-mcode\-readable=yes\fR" 4
+.IX Item "-mcode-readable=yes"
+Instructions may freely access executable sections.  This is the
+default setting.
+.IP "\fB\-mcode\-readable=pcrel\fR" 4
+.IX Item "-mcode-readable=pcrel"
+\&\s-1MIPS16\s0 PC-relative load instructions can access executable sections,
+but other instructions must not do so.  This option is useful on 4KSc
+and 4KSd processors when the code TLBs have the Read Inhibit bit set.
+It is also useful on processors that can be configured to have a dual
+instruction/data \s-1SRAM\s0 interface and that, like the M4K, automatically
+redirect PC-relative loads to the instruction \s-1RAM\s0.
+.IP "\fB\-mcode\-readable=no\fR" 4
+.IX Item "-mcode-readable=no"
+Instructions must not access executable sections.  This option can be
+useful on targets that are configured to have a dual instruction/data
+\&\s-1SRAM\s0 interface but that (unlike the M4K) do not automatically redirect
+PC-relative loads to the instruction \s-1RAM\s0.
+.RE
+.RS 4
+.RE
+.IP "\fB\-msplit\-addresses\fR" 4
+.IX Item "-msplit-addresses"
+.PD 0
+.IP "\fB\-mno\-split\-addresses\fR" 4
+.IX Item "-mno-split-addresses"
+.PD
+Enable (disable) use of the \f(CW\*(C`%hi()\*(C'\fR and \f(CW\*(C`%lo()\*(C'\fR assembler
+relocation operators.  This option has been superseded by
+\&\fB\-mexplicit\-relocs\fR but is retained for backwards compatibility.
+.IP "\fB\-mexplicit\-relocs\fR" 4
+.IX Item "-mexplicit-relocs"
+.PD 0
+.IP "\fB\-mno\-explicit\-relocs\fR" 4
+.IX Item "-mno-explicit-relocs"
+.PD
+Use (do not use) assembler relocation operators when dealing with symbolic
+addresses.  The alternative, selected by \fB\-mno\-explicit\-relocs\fR,
+is to use assembler macros instead.
+.Sp
+\&\fB\-mexplicit\-relocs\fR is the default if \s-1GCC\s0 was configured
+to use an assembler that supports relocation operators.
+.IP "\fB\-mcheck\-zero\-division\fR" 4
+.IX Item "-mcheck-zero-division"
+.PD 0
+.IP "\fB\-mno\-check\-zero\-division\fR" 4
+.IX Item "-mno-check-zero-division"
+.PD
+Trap (do not trap) on integer division by zero.
+.Sp
+The default is \fB\-mcheck\-zero\-division\fR.
+.IP "\fB\-mdivide\-traps\fR" 4
+.IX Item "-mdivide-traps"
+.PD 0
+.IP "\fB\-mdivide\-breaks\fR" 4
+.IX Item "-mdivide-breaks"
+.PD
+\&\s-1MIPS\s0 systems check for division by zero by generating either a
+conditional trap or a break instruction.  Using traps results in
+smaller code, but is only supported on \s-1MIPS\s0 \s-1II\s0 and later.  Also, some
+versions of the Linux kernel have a bug that prevents trap from
+generating the proper signal (\f(CW\*(C`SIGFPE\*(C'\fR).  Use \fB\-mdivide\-traps\fR to
+allow conditional traps on architectures that support them and
+\&\fB\-mdivide\-breaks\fR to force the use of breaks.
+.Sp
+The default is usually \fB\-mdivide\-traps\fR, but this can be
+overridden at configure time using \fB\-\-with\-divide=breaks\fR.
+Divide-by-zero checks can be completely disabled using
+\&\fB\-mno\-check\-zero\-division\fR.
+.IP "\fB\-mmemcpy\fR" 4
+.IX Item "-mmemcpy"
+.PD 0
+.IP "\fB\-mno\-memcpy\fR" 4
+.IX Item "-mno-memcpy"
+.PD
+Force (do not force) the use of \f(CW\*(C`memcpy()\*(C'\fR for non-trivial block
+moves.  The default is \fB\-mno\-memcpy\fR, which allows \s-1GCC\s0 to inline
+most constant-sized copies.
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Disable (do not disable) use of the \f(CW\*(C`jal\*(C'\fR instruction.  Calling
+functions using \f(CW\*(C`jal\*(C'\fR is more efficient but requires the caller
+and callee to be in the same 256 megabyte segment.
+.Sp
+This option has no effect on abicalls code.  The default is
+\&\fB\-mno\-long\-calls\fR.
+.IP "\fB\-mmad\fR" 4
+.IX Item "-mmad"
+.PD 0
+.IP "\fB\-mno\-mad\fR" 4
+.IX Item "-mno-mad"
+.PD
+Enable (disable) use of the \f(CW\*(C`mad\*(C'\fR, \f(CW\*(C`madu\*(C'\fR and \f(CW\*(C`mul\*(C'\fR
+instructions, as provided by the R4650 \s-1ISA\s0.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Enable (disable) use of the floating point multiply-accumulate
+instructions, when they are available.  The default is
+\&\fB\-mfused\-madd\fR.
+.Sp
+When multiply-accumulate instructions are used, the intermediate
+product is calculated to infinite precision and is not subject to
+the \s-1FCSR\s0 Flush to Zero bit.  This may be undesirable in some
+circumstances.
+.IP "\fB\-nocpp\fR" 4
+.IX Item "-nocpp"
+Tell the \s-1MIPS\s0 assembler to not run its preprocessor over user
+assembler files (with a \fB.s\fR suffix) when assembling them.
+.IP "\fB\-mfix\-r4000\fR" 4
+.IX Item "-mfix-r4000"
+.PD 0
+.IP "\fB\-mno\-fix\-r4000\fR" 4
+.IX Item "-mno-fix-r4000"
+.PD
+Work around certain R4000 \s-1CPU\s0 errata:
+.RS 4
+.IP "\-" 4
+A double-word or a variable shift may give an incorrect result if executed
+immediately after starting an integer division.
+.IP "\-" 4
+A double-word or a variable shift may give an incorrect result if executed
+while an integer multiplication is in progress.
+.IP "\-" 4
+An integer division may give an incorrect result if started in a delay slot
+of a taken branch or a jump.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mfix\-r4400\fR" 4
+.IX Item "-mfix-r4400"
+.PD 0
+.IP "\fB\-mno\-fix\-r4400\fR" 4
+.IX Item "-mno-fix-r4400"
+.PD
+Work around certain R4400 \s-1CPU\s0 errata:
+.RS 4
+.IP "\-" 4
+A double-word or a variable shift may give an incorrect result if executed
+immediately after starting an integer division.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mfix\-r10000\fR" 4
+.IX Item "-mfix-r10000"
+.PD 0
+.IP "\fB\-mno\-fix\-r10000\fR" 4
+.IX Item "-mno-fix-r10000"
+.PD
+Work around certain R10000 errata:
+.RS 4
+.IP "\-" 4
+\&\f(CW\*(C`ll\*(C'\fR/\f(CW\*(C`sc\*(C'\fR sequences may not behave atomically on revisions
+prior to 3.0.  They may deadlock on revisions 2.6 and earlier.
+.RE
+.RS 4
+.Sp
+This option can only be used if the target architecture supports
+branch-likely instructions.  \fB\-mfix\-r10000\fR is the default when
+\&\fB\-march=r10000\fR is used; \fB\-mno\-fix\-r10000\fR is the default
+otherwise.
+.RE
+.IP "\fB\-mfix\-vr4120\fR" 4
+.IX Item "-mfix-vr4120"
+.PD 0
+.IP "\fB\-mno\-fix\-vr4120\fR" 4
+.IX Item "-mno-fix-vr4120"
+.PD
+Work around certain \s-1VR4120\s0 errata:
+.RS 4
+.IP "\-" 4
+\&\f(CW\*(C`dmultu\*(C'\fR does not always produce the correct result.
+.IP "\-" 4
+\&\f(CW\*(C`div\*(C'\fR and \f(CW\*(C`ddiv\*(C'\fR do not always produce the correct result if one
+of the operands is negative.
+.RE
+.RS 4
+.Sp
+The workarounds for the division errata rely on special functions in
+\&\fIlibgcc.a\fR.  At present, these functions are only provided by
+the \f(CW\*(C`mips64vr*\-elf\*(C'\fR configurations.
+.Sp
+Other \s-1VR4120\s0 errata require a nop to be inserted between certain pairs of
+instructions.  These errata are handled by the assembler, not by \s-1GCC\s0 itself.
+.RE
+.IP "\fB\-mfix\-vr4130\fR" 4
+.IX Item "-mfix-vr4130"
+Work around the \s-1VR4130\s0 \f(CW\*(C`mflo\*(C'\fR/\f(CW\*(C`mfhi\*(C'\fR errata.  The
+workarounds are implemented by the assembler rather than by \s-1GCC\s0,
+although \s-1GCC\s0 will avoid using \f(CW\*(C`mflo\*(C'\fR and \f(CW\*(C`mfhi\*(C'\fR if the
+\&\s-1VR4130\s0 \f(CW\*(C`macc\*(C'\fR, \f(CW\*(C`macchi\*(C'\fR, \f(CW\*(C`dmacc\*(C'\fR and \f(CW\*(C`dmacchi\*(C'\fR
+instructions are available instead.
+.IP "\fB\-mfix\-sb1\fR" 4
+.IX Item "-mfix-sb1"
+.PD 0
+.IP "\fB\-mno\-fix\-sb1\fR" 4
+.IX Item "-mno-fix-sb1"
+.PD
+Work around certain \s-1SB\-1\s0 \s-1CPU\s0 core errata.
+(This flag currently works around the \s-1SB\-1\s0 revision 2
+\&\*(L"F1\*(R" and \*(L"F2\*(R" floating point errata.)
+.IP "\fB\-mr10k\-cache\-barrier=\fR\fIsetting\fR" 4
+.IX Item "-mr10k-cache-barrier=setting"
+Specify whether \s-1GCC\s0 should insert cache barriers to avoid the
+side-effects of speculation on R10K processors.
+.Sp
+In common with many processors, the R10K tries to predict the outcome
+of a conditional branch and speculatively executes instructions from
+the \*(L"taken\*(R" branch.  It later aborts these instructions if the
+predicted outcome was wrong.  However, on the R10K, even aborted
+instructions can have side effects.
+.Sp
+This problem only affects kernel stores and, depending on the system,
+kernel loads.  As an example, a speculatively-executed store may load
+the target memory into cache and mark the cache line as dirty, even if
+the store itself is later aborted.  If a \s-1DMA\s0 operation writes to the
+same area of memory before the \*(L"dirty\*(R" line is flushed, the cached
+data will overwrite the DMA-ed data.  See the R10K processor manual
+for a full description, including other potential problems.
+.Sp
+One workaround is to insert cache barrier instructions before every memory
+access that might be speculatively executed and that might have side
+effects even if aborted.  \fB\-mr10k\-cache\-barrier=\fR\fIsetting\fR
+controls \s-1GCC\s0's implementation of this workaround.  It assumes that
+aborted accesses to any byte in the following regions will not have
+side effects:
+.RS 4
+.IP "1." 4
+the memory occupied by the current function's stack frame;
+.IP "2." 4
+the memory occupied by an incoming stack argument;
+.IP "3." 4
+the memory occupied by an object with a link-time-constant address.
+.RE
+.RS 4
+.Sp
+It is the kernel's responsibility to ensure that speculative
+accesses to these regions are indeed safe.
+.Sp
+If the input program contains a function declaration such as:
+.Sp
+.Vb 1
+\&        void foo (void);
+.Ve
+.Sp
+then the implementation of \f(CW\*(C`foo\*(C'\fR must allow \f(CW\*(C`j foo\*(C'\fR and
+\&\f(CW\*(C`jal foo\*(C'\fR to be executed speculatively.  \s-1GCC\s0 honors this
+restriction for functions it compiles itself.  It expects non-GCC
+functions (such as hand-written assembly code) to do the same.
+.Sp
+The option has three forms:
+.IP "\fB\-mr10k\-cache\-barrier=load\-store\fR" 4
+.IX Item "-mr10k-cache-barrier=load-store"
+Insert a cache barrier before a load or store that might be
+speculatively executed and that might have side effects even
+if aborted.
+.IP "\fB\-mr10k\-cache\-barrier=store\fR" 4
+.IX Item "-mr10k-cache-barrier=store"
+Insert a cache barrier before a store that might be speculatively
+executed and that might have side effects even if aborted.
+.IP "\fB\-mr10k\-cache\-barrier=none\fR" 4
+.IX Item "-mr10k-cache-barrier=none"
+Disable the insertion of cache barriers.  This is the default setting.
+.RE
+.RS 4
+.RE
+.IP "\fB\-mflush\-func=\fR\fIfunc\fR" 4
+.IX Item "-mflush-func=func"
+.PD 0
+.IP "\fB\-mno\-flush\-func\fR" 4
+.IX Item "-mno-flush-func"
+.PD
+Specifies the function to call to flush the I and D caches, or to not
+call any such function.  If called, the function must take the same
+arguments as the common \f(CW\*(C`_flush_func()\*(C'\fR, that is, the address of the
+memory range for which the cache is being flushed, the size of the
+memory range, and the number 3 (to flush both caches).  The default
+depends on the target \s-1GCC\s0 was configured for, but commonly is either
+\&\fB_flush_func\fR or \fB_\|_cpu_flush\fR.
+.IP "\fBmbranch\-cost=\fR\fInum\fR" 4
+.IX Item "mbranch-cost=num"
+Set the cost of branches to roughly \fInum\fR \*(L"simple\*(R" instructions.
+This cost is only a heuristic and is not guaranteed to produce
+consistent results across releases.  A zero cost redundantly selects
+the default, which is based on the \fB\-mtune\fR setting.
+.IP "\fB\-mbranch\-likely\fR" 4
+.IX Item "-mbranch-likely"
+.PD 0
+.IP "\fB\-mno\-branch\-likely\fR" 4
+.IX Item "-mno-branch-likely"
+.PD
+Enable or disable use of Branch Likely instructions, regardless of the
+default for the selected architecture.  By default, Branch Likely
+instructions may be generated if they are supported by the selected
+architecture.  An exception is for the \s-1MIPS32\s0 and \s-1MIPS64\s0 architectures
+and processors which implement those architectures; for those, Branch
+Likely instructions will not be generated by default because the \s-1MIPS32\s0
+and \s-1MIPS64\s0 architectures specifically deprecate their use.
+.IP "\fB\-mfp\-exceptions\fR" 4
+.IX Item "-mfp-exceptions"
+.PD 0
+.IP "\fB\-mno\-fp\-exceptions\fR" 4
+.IX Item "-mno-fp-exceptions"
+.PD
+Specifies whether \s-1FP\s0 exceptions are enabled.  This affects how we schedule
+\&\s-1FP\s0 instructions for some processors.  The default is that \s-1FP\s0 exceptions are
+enabled.
+.Sp
+For instance, on the \s-1SB\-1\s0, if \s-1FP\s0 exceptions are disabled, and we are emitting
+64\-bit code, then we can use both \s-1FP\s0 pipes.  Otherwise, we can only use one
+\&\s-1FP\s0 pipe.
+.IP "\fB\-mvr4130\-align\fR" 4
+.IX Item "-mvr4130-align"
+.PD 0
+.IP "\fB\-mno\-vr4130\-align\fR" 4
+.IX Item "-mno-vr4130-align"
+.PD
+The \s-1VR4130\s0 pipeline is two-way superscalar, but can only issue two
+instructions together if the first one is 8\-byte aligned.  When this
+option is enabled, \s-1GCC\s0 will align pairs of instructions that it
+thinks should execute in parallel.
+.Sp
+This option only has an effect when optimizing for the \s-1VR4130\s0.
+It normally makes code faster, but at the expense of making it bigger.
+It is enabled by default at optimization level \fB\-O3\fR.
+.IP "\fB\-msynci\fR" 4
+.IX Item "-msynci"
+.PD 0
+.IP "\fB\-mno\-synci\fR" 4
+.IX Item "-mno-synci"
+.PD
+Enable (disable) generation of \f(CW\*(C`synci\*(C'\fR instructions on
+architectures that support it.  The \f(CW\*(C`synci\*(C'\fR instructions (if
+enabled) will be generated when \f(CW\*(C`_\|_builtin_\|_\|_clear_cache()\*(C'\fR is
+compiled.
+.Sp
+This option defaults to \f(CW\*(C`\-mno\-synci\*(C'\fR, but the default can be
+overridden by configuring with \f(CW\*(C`\-\-with\-synci\*(C'\fR.
+.Sp
+When compiling code for single processor systems, it is generally safe
+to use \f(CW\*(C`synci\*(C'\fR.  However, on many multi-core (\s-1SMP\s0) systems, it
+will not invalidate the instruction caches on all cores and may lead
+to undefined behavior.
+.IP "\fB\-mrelax\-pic\-calls\fR" 4
+.IX Item "-mrelax-pic-calls"
+.PD 0
+.IP "\fB\-mno\-relax\-pic\-calls\fR" 4
+.IX Item "-mno-relax-pic-calls"
+.PD
+Try to turn \s-1PIC\s0 calls that are normally dispatched via register
+\&\f(CW$25\fR into direct calls.  This is only possible if the linker can
+resolve the destination at link-time and if the destination is within
+range for a direct call.
+.Sp
+\&\fB\-mrelax\-pic\-calls\fR is the default if \s-1GCC\s0 was configured to use
+an assembler and a linker that supports the \f(CW\*(C`.reloc\*(C'\fR assembly
+directive and \f(CW\*(C`\-mexplicit\-relocs\*(C'\fR is in effect.  With
+\&\f(CW\*(C`\-mno\-explicit\-relocs\*(C'\fR, this optimization can be performed by the
+assembler and the linker alone without help from the compiler.
+.IP "\fB\-mmcount\-ra\-address\fR" 4
+.IX Item "-mmcount-ra-address"
+.PD 0
+.IP "\fB\-mno\-mcount\-ra\-address\fR" 4
+.IX Item "-mno-mcount-ra-address"
+.PD
+Emit (do not emit) code that allows \f(CW\*(C`_mcount\*(C'\fR to modify the
+calling function's return address.  When enabled, this option extends
+the usual \f(CW\*(C`_mcount\*(C'\fR interface with a new \fIra-address\fR
+parameter, which has type \f(CW\*(C`intptr_t *\*(C'\fR and is passed in register
+\&\f(CW$12\fR.  \f(CW\*(C`_mcount\*(C'\fR can then modify the return address by
+doing both of the following:
+.RS 4
+.IP "\(bu" 4
+Returning the new address in register \f(CW$31\fR.
+.IP "\(bu" 4
+Storing the new address in \f(CW\*(C`*\f(CIra\-address\f(CW\*(C'\fR,
+if \fIra-address\fR is nonnull.
+.RE
+.RS 4
+.Sp
+The default is \fB\-mno\-mcount\-ra\-address\fR.
+.RE
+.PP
+\fI\s-1MMIX\s0 Options\fR
+.IX Subsection "MMIX Options"
+.PP
+These options are defined for the \s-1MMIX:\s0
+.IP "\fB\-mlibfuncs\fR" 4
+.IX Item "-mlibfuncs"
+.PD 0
+.IP "\fB\-mno\-libfuncs\fR" 4
+.IX Item "-mno-libfuncs"
+.PD
+Specify that intrinsic library functions are being compiled, passing all
+values in registers, no matter the size.
+.IP "\fB\-mepsilon\fR" 4
+.IX Item "-mepsilon"
+.PD 0
+.IP "\fB\-mno\-epsilon\fR" 4
+.IX Item "-mno-epsilon"
+.PD
+Generate floating-point comparison instructions that compare with respect
+to the \f(CW\*(C`rE\*(C'\fR epsilon register.
+.IP "\fB\-mabi=mmixware\fR" 4
+.IX Item "-mabi=mmixware"
+.PD 0
+.IP "\fB\-mabi=gnu\fR" 4
+.IX Item "-mabi=gnu"
+.PD
+Generate code that passes function parameters and return values that (in
+the called function) are seen as registers \f(CW$0\fR and up, as opposed to
+the \s-1GNU\s0 \s-1ABI\s0 which uses global registers \f(CW$231\fR and up.
+.IP "\fB\-mzero\-extend\fR" 4
+.IX Item "-mzero-extend"
+.PD 0
+.IP "\fB\-mno\-zero\-extend\fR" 4
+.IX Item "-mno-zero-extend"
+.PD
+When reading data from memory in sizes shorter than 64 bits, use (do not
+use) zero-extending load instructions by default, rather than
+sign-extending ones.
+.IP "\fB\-mknuthdiv\fR" 4
+.IX Item "-mknuthdiv"
+.PD 0
+.IP "\fB\-mno\-knuthdiv\fR" 4
+.IX Item "-mno-knuthdiv"
+.PD
+Make the result of a division yielding a remainder have the same sign as
+the divisor.  With the default, \fB\-mno\-knuthdiv\fR, the sign of the
+remainder follows the sign of the dividend.  Both methods are
+arithmetically valid, the latter being almost exclusively used.
+.IP "\fB\-mtoplevel\-symbols\fR" 4
+.IX Item "-mtoplevel-symbols"
+.PD 0
+.IP "\fB\-mno\-toplevel\-symbols\fR" 4
+.IX Item "-mno-toplevel-symbols"
+.PD
+Prepend (do not prepend) a \fB:\fR to all global symbols, so the assembly
+code can be used with the \f(CW\*(C`PREFIX\*(C'\fR assembly directive.
+.IP "\fB\-melf\fR" 4
+.IX Item "-melf"
+Generate an executable in the \s-1ELF\s0 format, rather than the default
+\&\fBmmo\fR format used by the \fBmmix\fR simulator.
+.IP "\fB\-mbranch\-predict\fR" 4
+.IX Item "-mbranch-predict"
+.PD 0
+.IP "\fB\-mno\-branch\-predict\fR" 4
+.IX Item "-mno-branch-predict"
+.PD
+Use (do not use) the probable-branch instructions, when static branch
+prediction indicates a probable branch.
+.IP "\fB\-mbase\-addresses\fR" 4
+.IX Item "-mbase-addresses"
+.PD 0
+.IP "\fB\-mno\-base\-addresses\fR" 4
+.IX Item "-mno-base-addresses"
+.PD
+Generate (do not generate) code that uses \fIbase addresses\fR.  Using a
+base address automatically generates a request (handled by the assembler
+and the linker) for a constant to be set up in a global register.  The
+register is used for one or more base address requests within the range 0
+to 255 from the value held in the register.  The generally leads to short
+and fast code, but the number of different data items that can be
+addressed is limited.  This means that a program that uses lots of static
+data may require \fB\-mno\-base\-addresses\fR.
+.IP "\fB\-msingle\-exit\fR" 4
+.IX Item "-msingle-exit"
+.PD 0
+.IP "\fB\-mno\-single\-exit\fR" 4
+.IX Item "-mno-single-exit"
+.PD
+Force (do not force) generated code to have a single exit point in each
+function.
+.PP
+\fI\s-1MN10300\s0 Options\fR
+.IX Subsection "MN10300 Options"
+.PP
+These \fB\-m\fR options are defined for Matsushita \s-1MN10300\s0 architectures:
+.IP "\fB\-mmult\-bug\fR" 4
+.IX Item "-mmult-bug"
+Generate code to avoid bugs in the multiply instructions for the \s-1MN10300\s0
+processors.  This is the default.
+.IP "\fB\-mno\-mult\-bug\fR" 4
+.IX Item "-mno-mult-bug"
+Do not generate code to avoid bugs in the multiply instructions for the
+\&\s-1MN10300\s0 processors.
+.IP "\fB\-mam33\fR" 4
+.IX Item "-mam33"
+Generate code which uses features specific to the \s-1AM33\s0 processor.
+.IP "\fB\-mno\-am33\fR" 4
+.IX Item "-mno-am33"
+Do not generate code which uses features specific to the \s-1AM33\s0 processor.  This
+is the default.
+.IP "\fB\-mam33\-2\fR" 4
+.IX Item "-mam33-2"
+Generate code which uses features specific to the \s-1AM33/2\s0.0 processor.
+.IP "\fB\-mam34\fR" 4
+.IX Item "-mam34"
+Generate code which uses features specific to the \s-1AM34\s0 processor.
+.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
+.IX Item "-mtune=cpu-type"
+Use the timing characteristics of the indicated \s-1CPU\s0 type when
+scheduling instructions.  This does not change the targeted processor
+type.  The \s-1CPU\s0 type must be one of \fBmn10300\fR, \fBam33\fR,
+\&\fBam33\-2\fR or \fBam34\fR.
+.IP "\fB\-mreturn\-pointer\-on\-d0\fR" 4
+.IX Item "-mreturn-pointer-on-d0"
+When generating a function which returns a pointer, return the pointer
+in both \f(CW\*(C`a0\*(C'\fR and \f(CW\*(C`d0\*(C'\fR.  Otherwise, the pointer is returned
+only in a0, and attempts to call such functions without a prototype
+would result in errors.  Note that this option is on by default; use
+\&\fB\-mno\-return\-pointer\-on\-d0\fR to disable it.
+.IP "\fB\-mno\-crt0\fR" 4
+.IX Item "-mno-crt0"
+Do not link in the C run-time initialization object file.
+.IP "\fB\-mrelax\fR" 4
+.IX Item "-mrelax"
+Indicate to the linker that it should perform a relaxation optimization pass
+to shorten branches, calls and absolute memory addresses.  This option only
+has an effect when used on the command line for the final link step.
+.Sp
+This option makes symbolic debugging impossible.
+.IP "\fB\-mliw\fR" 4
+.IX Item "-mliw"
+Allow the compiler to generate \fILong Instruction Word\fR
+instructions if the target is the \fB\s-1AM33\s0\fR or later.  This is the
+default.  This option defines the preprocessor macro \fB_\|_LIW_\|_\fR.
+.IP "\fB\-mnoliw\fR" 4
+.IX Item "-mnoliw"
+Do not allow the compiler to generate \fILong Instruction Word\fR
+instructions.  This option defines the preprocessor macro
+\&\fB_\|_NO_LIW_\|_\fR.
+.PP
+\fI\s-1PDP\-11\s0 Options\fR
+.IX Subsection "PDP-11 Options"
+.PP
+These options are defined for the \s-1PDP\-11:\s0
+.IP "\fB\-mfpu\fR" 4
+.IX Item "-mfpu"
+Use hardware \s-1FPP\s0 floating point.  This is the default.  (\s-1FIS\s0 floating
+point on the \s-1PDP\-11/40\s0 is not supported.)
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+Do not use hardware floating point.
+.IP "\fB\-mac0\fR" 4
+.IX Item "-mac0"
+Return floating-point results in ac0 (fr0 in Unix assembler syntax).
+.IP "\fB\-mno\-ac0\fR" 4
+.IX Item "-mno-ac0"
+Return floating-point results in memory.  This is the default.
+.IP "\fB\-m40\fR" 4
+.IX Item "-m40"
+Generate code for a \s-1PDP\-11/40\s0.
+.IP "\fB\-m45\fR" 4
+.IX Item "-m45"
+Generate code for a \s-1PDP\-11/45\s0.  This is the default.
+.IP "\fB\-m10\fR" 4
+.IX Item "-m10"
+Generate code for a \s-1PDP\-11/10\s0.
+.IP "\fB\-mbcopy\-builtin\fR" 4
+.IX Item "-mbcopy-builtin"
+Use inline \f(CW\*(C`movmemhi\*(C'\fR patterns for copying memory.  This is the
+default.
+.IP "\fB\-mbcopy\fR" 4
+.IX Item "-mbcopy"
+Do not use inline \f(CW\*(C`movmemhi\*(C'\fR patterns for copying memory.
+.IP "\fB\-mint16\fR" 4
+.IX Item "-mint16"
+.PD 0
+.IP "\fB\-mno\-int32\fR" 4
+.IX Item "-mno-int32"
+.PD
+Use 16\-bit \f(CW\*(C`int\*(C'\fR.  This is the default.
+.IP "\fB\-mint32\fR" 4
+.IX Item "-mint32"
+.PD 0
+.IP "\fB\-mno\-int16\fR" 4
+.IX Item "-mno-int16"
+.PD
+Use 32\-bit \f(CW\*(C`int\*(C'\fR.
+.IP "\fB\-mfloat64\fR" 4
+.IX Item "-mfloat64"
+.PD 0
+.IP "\fB\-mno\-float32\fR" 4
+.IX Item "-mno-float32"
+.PD
+Use 64\-bit \f(CW\*(C`float\*(C'\fR.  This is the default.
+.IP "\fB\-mfloat32\fR" 4
+.IX Item "-mfloat32"
+.PD 0
+.IP "\fB\-mno\-float64\fR" 4
+.IX Item "-mno-float64"
+.PD
+Use 32\-bit \f(CW\*(C`float\*(C'\fR.
+.IP "\fB\-mabshi\fR" 4
+.IX Item "-mabshi"
+Use \f(CW\*(C`abshi2\*(C'\fR pattern.  This is the default.
+.IP "\fB\-mno\-abshi\fR" 4
+.IX Item "-mno-abshi"
+Do not use \f(CW\*(C`abshi2\*(C'\fR pattern.
+.IP "\fB\-mbranch\-expensive\fR" 4
+.IX Item "-mbranch-expensive"
+Pretend that branches are expensive.  This is for experimenting with
+code generation only.
+.IP "\fB\-mbranch\-cheap\fR" 4
+.IX Item "-mbranch-cheap"
+Do not pretend that branches are expensive.  This is the default.
+.IP "\fB\-munix\-asm\fR" 4
+.IX Item "-munix-asm"
+Use Unix assembler syntax.  This is the default when configured for
+\&\fBpdp11\-*\-bsd\fR.
+.IP "\fB\-mdec\-asm\fR" 4
+.IX Item "-mdec-asm"
+Use \s-1DEC\s0 assembler syntax.  This is the default when configured for any
+\&\s-1PDP\-11\s0 target other than \fBpdp11\-*\-bsd\fR.
+.PP
+\fIpicoChip Options\fR
+.IX Subsection "picoChip Options"
+.PP
+These \fB\-m\fR options are defined for picoChip implementations:
+.IP "\fB\-mae=\fR\fIae_type\fR" 4
+.IX Item "-mae=ae_type"
+Set the instruction set, register set, and instruction scheduling
+parameters for array element type \fIae_type\fR.  Supported values
+for \fIae_type\fR are \fB\s-1ANY\s0\fR, \fB\s-1MUL\s0\fR, and \fB\s-1MAC\s0\fR.
+.Sp
+\&\fB\-mae=ANY\fR selects a completely generic \s-1AE\s0 type.  Code
+generated with this option will run on any of the other \s-1AE\s0 types.  The
+code will not be as efficient as it would be if compiled for a specific
+\&\s-1AE\s0 type, and some types of operation (e.g., multiplication) will not
+work properly on all types of \s-1AE\s0.
+.Sp
+\&\fB\-mae=MUL\fR selects a \s-1MUL\s0 \s-1AE\s0 type.  This is the most useful \s-1AE\s0 type
+for compiled code, and is the default.
+.Sp
+\&\fB\-mae=MAC\fR selects a DSP-style \s-1MAC\s0 \s-1AE\s0.  Code compiled with this
+option may suffer from poor performance of byte (char) manipulation,
+since the \s-1DSP\s0 \s-1AE\s0 does not provide hardware support for byte load/stores.
+.IP "\fB\-msymbol\-as\-address\fR" 4
+.IX Item "-msymbol-as-address"
+Enable the compiler to directly use a symbol name as an address in a
+load/store instruction, without first loading it into a
+register.  Typically, the use of this option will generate larger
+programs, which run faster than when the option isn't used.  However, the
+results vary from program to program, so it is left as a user option,
+rather than being permanently enabled.
+.IP "\fB\-mno\-inefficient\-warnings\fR" 4
+.IX Item "-mno-inefficient-warnings"
+Disables warnings about the generation of inefficient code.  These
+warnings can be generated, for example, when compiling code which
+performs byte-level memory operations on the \s-1MAC\s0 \s-1AE\s0 type.  The \s-1MAC\s0 \s-1AE\s0 has
+no hardware support for byte-level memory operations, so all byte
+load/stores must be synthesized from word load/store operations.  This is
+inefficient and a warning will be generated indicating to the programmer
+that they should rewrite the code to avoid byte operations, or to target
+an \s-1AE\s0 type which has the necessary hardware support.  This option enables
+the warning to be turned off.
+.PP
+\fIPowerPC Options\fR
+.IX Subsection "PowerPC Options"
+.PP
+These are listed under
+.PP
+\fI\s-1IBM\s0 \s-1RS/6000\s0 and PowerPC Options\fR
+.IX Subsection "IBM RS/6000 and PowerPC Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1IBM\s0 \s-1RS/6000\s0 and PowerPC:
+.IP "\fB\-mpower\fR" 4
+.IX Item "-mpower"
+.PD 0
+.IP "\fB\-mno\-power\fR" 4
+.IX Item "-mno-power"
+.IP "\fB\-mpower2\fR" 4
+.IX Item "-mpower2"
+.IP "\fB\-mno\-power2\fR" 4
+.IX Item "-mno-power2"
+.IP "\fB\-mpowerpc\fR" 4
+.IX Item "-mpowerpc"
+.IP "\fB\-mno\-powerpc\fR" 4
+.IX Item "-mno-powerpc"
+.IP "\fB\-mpowerpc\-gpopt\fR" 4
+.IX Item "-mpowerpc-gpopt"
+.IP "\fB\-mno\-powerpc\-gpopt\fR" 4
+.IX Item "-mno-powerpc-gpopt"
+.IP "\fB\-mpowerpc\-gfxopt\fR" 4
+.IX Item "-mpowerpc-gfxopt"
+.IP "\fB\-mno\-powerpc\-gfxopt\fR" 4
+.IX Item "-mno-powerpc-gfxopt"
+.IP "\fB\-mpowerpc64\fR" 4
+.IX Item "-mpowerpc64"
+.IP "\fB\-mno\-powerpc64\fR" 4
+.IX Item "-mno-powerpc64"
+.IP "\fB\-mmfcrf\fR" 4
+.IX Item "-mmfcrf"
+.IP "\fB\-mno\-mfcrf\fR" 4
+.IX Item "-mno-mfcrf"
+.IP "\fB\-mpopcntb\fR" 4
+.IX Item "-mpopcntb"
+.IP "\fB\-mno\-popcntb\fR" 4
+.IX Item "-mno-popcntb"
+.IP "\fB\-mpopcntd\fR" 4
+.IX Item "-mpopcntd"
+.IP "\fB\-mno\-popcntd\fR" 4
+.IX Item "-mno-popcntd"
+.IP "\fB\-mfprnd\fR" 4
+.IX Item "-mfprnd"
+.IP "\fB\-mno\-fprnd\fR" 4
+.IX Item "-mno-fprnd"
+.IP "\fB\-mcmpb\fR" 4
+.IX Item "-mcmpb"
+.IP "\fB\-mno\-cmpb\fR" 4
+.IX Item "-mno-cmpb"
+.IP "\fB\-mmfpgpr\fR" 4
+.IX Item "-mmfpgpr"
+.IP "\fB\-mno\-mfpgpr\fR" 4
+.IX Item "-mno-mfpgpr"
+.IP "\fB\-mhard\-dfp\fR" 4
+.IX Item "-mhard-dfp"
+.IP "\fB\-mno\-hard\-dfp\fR" 4
+.IX Item "-mno-hard-dfp"
+.PD
+\&\s-1GCC\s0 supports two related instruction set architectures for the
+\&\s-1RS/6000\s0 and PowerPC.  The \fI\s-1POWER\s0\fR instruction set are those
+instructions supported by the \fBrios\fR chip set used in the original
+\&\s-1RS/6000\s0 systems and the \fIPowerPC\fR instruction set is the
+architecture of the Freescale MPC5xx, MPC6xx, MPC8xx microprocessors, and
+the \s-1IBM\s0 4xx, 6xx, and follow-on microprocessors.
+.Sp
+Neither architecture is a subset of the other.  However there is a
+large common subset of instructions supported by both.  An \s-1MQ\s0
+register is included in processors supporting the \s-1POWER\s0 architecture.
+.Sp
+You use these options to specify which instructions are available on the
+processor you are using.  The default value of these options is
+determined when configuring \s-1GCC\s0.  Specifying the
+\&\fB\-mcpu=\fR\fIcpu_type\fR overrides the specification of these
+options.  We recommend you use the \fB\-mcpu=\fR\fIcpu_type\fR option
+rather than the options listed above.
+.Sp
+The \fB\-mpower\fR option allows \s-1GCC\s0 to generate instructions that
+are found only in the \s-1POWER\s0 architecture and to use the \s-1MQ\s0 register.
+Specifying \fB\-mpower2\fR implies \fB\-power\fR and also allows \s-1GCC\s0
+to generate instructions that are present in the \s-1POWER2\s0 architecture but
+not the original \s-1POWER\s0 architecture.
+.Sp
+The \fB\-mpowerpc\fR option allows \s-1GCC\s0 to generate instructions that
+are found only in the 32\-bit subset of the PowerPC architecture.
+Specifying \fB\-mpowerpc\-gpopt\fR implies \fB\-mpowerpc\fR and also allows
+\&\s-1GCC\s0 to use the optional PowerPC architecture instructions in the
+General Purpose group, including floating-point square root.  Specifying
+\&\fB\-mpowerpc\-gfxopt\fR implies \fB\-mpowerpc\fR and also allows \s-1GCC\s0 to
+use the optional PowerPC architecture instructions in the Graphics
+group, including floating-point select.
+.Sp
+The \fB\-mmfcrf\fR option allows \s-1GCC\s0 to generate the move from
+condition register field instruction implemented on the \s-1POWER4\s0
+processor and other processors that support the PowerPC V2.01
+architecture.
+The \fB\-mpopcntb\fR option allows \s-1GCC\s0 to generate the popcount and
+double precision \s-1FP\s0 reciprocal estimate instruction implemented on the
+\&\s-1POWER5\s0 processor and other processors that support the PowerPC V2.02
+architecture.
+The \fB\-mpopcntd\fR option allows \s-1GCC\s0 to generate the popcount
+instruction implemented on the \s-1POWER7\s0 processor and other processors
+that support the PowerPC V2.06 architecture.
+The \fB\-mfprnd\fR option allows \s-1GCC\s0 to generate the \s-1FP\s0 round to
+integer instructions implemented on the \s-1POWER5+\s0 processor and other
+processors that support the PowerPC V2.03 architecture.
+The \fB\-mcmpb\fR option allows \s-1GCC\s0 to generate the compare bytes
+instruction implemented on the \s-1POWER6\s0 processor and other processors
+that support the PowerPC V2.05 architecture.
+The \fB\-mmfpgpr\fR option allows \s-1GCC\s0 to generate the \s-1FP\s0 move to/from
+general purpose register instructions implemented on the \s-1POWER6X\s0
+processor and other processors that support the extended PowerPC V2.05
+architecture.
+The \fB\-mhard\-dfp\fR option allows \s-1GCC\s0 to generate the decimal floating
+point instructions implemented on some \s-1POWER\s0 processors.
+.Sp
+The \fB\-mpowerpc64\fR option allows \s-1GCC\s0 to generate the additional
+64\-bit instructions that are found in the full PowerPC64 architecture
+and to treat GPRs as 64\-bit, doubleword quantities.  \s-1GCC\s0 defaults to
+\&\fB\-mno\-powerpc64\fR.
+.Sp
+If you specify both \fB\-mno\-power\fR and \fB\-mno\-powerpc\fR, \s-1GCC\s0
+will use only the instructions in the common subset of both
+architectures plus some special \s-1AIX\s0 common-mode calls, and will not use
+the \s-1MQ\s0 register.  Specifying both \fB\-mpower\fR and \fB\-mpowerpc\fR
+permits \s-1GCC\s0 to use any instruction from either architecture and to
+allow use of the \s-1MQ\s0 register; specify this for the Motorola \s-1MPC601\s0.
+.IP "\fB\-mnew\-mnemonics\fR" 4
+.IX Item "-mnew-mnemonics"
+.PD 0
+.IP "\fB\-mold\-mnemonics\fR" 4
+.IX Item "-mold-mnemonics"
+.PD
+Select which mnemonics to use in the generated assembler code.  With
+\&\fB\-mnew\-mnemonics\fR, \s-1GCC\s0 uses the assembler mnemonics defined for
+the PowerPC architecture.  With \fB\-mold\-mnemonics\fR it uses the
+assembler mnemonics defined for the \s-1POWER\s0 architecture.  Instructions
+defined in only one architecture have only one mnemonic; \s-1GCC\s0 uses that
+mnemonic irrespective of which of these options is specified.
+.Sp
+\&\s-1GCC\s0 defaults to the mnemonics appropriate for the architecture in
+use.  Specifying \fB\-mcpu=\fR\fIcpu_type\fR sometimes overrides the
+value of these option.  Unless you are building a cross-compiler, you
+should normally not specify either \fB\-mnew\-mnemonics\fR or
+\&\fB\-mold\-mnemonics\fR, but should instead accept the default.
+.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
+.IX Item "-mcpu=cpu_type"
+Set architecture type, register usage, choice of mnemonics, and
+instruction scheduling parameters for machine type \fIcpu_type\fR.
+Supported values for \fIcpu_type\fR are \fB401\fR, \fB403\fR,
+\&\fB405\fR, \fB405fp\fR, \fB440\fR, \fB440fp\fR, \fB464\fR, \fB464fp\fR,
+\&\fB476\fR, \fB476fp\fR, \fB505\fR, \fB601\fR, \fB602\fR, \fB603\fR,
+\&\fB603e\fR, \fB604\fR, \fB604e\fR, \fB620\fR, \fB630\fR, \fB740\fR,
+\&\fB7400\fR, \fB7450\fR, \fB750\fR, \fB801\fR, \fB821\fR, \fB823\fR,
+\&\fB860\fR, \fB970\fR, \fB8540\fR, \fBa2\fR, \fBe300c2\fR,
+\&\fBe300c3\fR, \fBe500mc\fR, \fBe500mc64\fR, \fBec603e\fR, \fBG3\fR,
+\&\fBG4\fR, \fBG5\fR, \fBtitan\fR, \fBpower\fR, \fBpower2\fR, \fBpower3\fR,
+\&\fBpower4\fR, \fBpower5\fR, \fBpower5+\fR, \fBpower6\fR, \fBpower6x\fR,
+\&\fBpower7\fR, \fBcommon\fR, \fBpowerpc\fR, \fBpowerpc64\fR, \fBrios\fR,
+\&\fBrios1\fR, \fBrios2\fR, \fBrsc\fR, and \fBrs64\fR.
+.Sp
+\&\fB\-mcpu=common\fR selects a completely generic processor.  Code
+generated under this option will run on any \s-1POWER\s0 or PowerPC processor.
+\&\s-1GCC\s0 will use only the instructions in the common subset of both
+architectures, and will not use the \s-1MQ\s0 register.  \s-1GCC\s0 assumes a generic
+processor model for scheduling purposes.
+.Sp
+\&\fB\-mcpu=power\fR, \fB\-mcpu=power2\fR, \fB\-mcpu=powerpc\fR, and
+\&\fB\-mcpu=powerpc64\fR specify generic \s-1POWER\s0, \s-1POWER2\s0, pure 32\-bit
+PowerPC (i.e., not \s-1MPC601\s0), and 64\-bit PowerPC architecture machine
+types, with an appropriate, generic processor model assumed for
+scheduling purposes.
+.Sp
+The other options specify a specific processor.  Code generated under
+those options will run best on that processor, and may not run at all on
+others.
+.Sp
+The \fB\-mcpu\fR options automatically enable or disable the
+following options:
+.Sp
+\&\fB\-maltivec  \-mfprnd  \-mhard\-float  \-mmfcrf  \-mmultiple 
+\&\-mnew\-mnemonics  \-mpopcntb \-mpopcntd  \-mpower  \-mpower2  \-mpowerpc64 
+\&\-mpowerpc\-gpopt  \-mpowerpc\-gfxopt  \-msingle\-float \-mdouble\-float 
+\&\-msimple\-fpu \-mstring  \-mmulhw  \-mdlmzb  \-mmfpgpr \-mvsx\fR
+.Sp
+The particular options set for any particular \s-1CPU\s0 will vary between
+compiler versions, depending on what setting seems to produce optimal
+code for that \s-1CPU\s0; it doesn't necessarily reflect the actual hardware's
+capabilities.  If you wish to set an individual option to a particular
+value, you may specify it after the \fB\-mcpu\fR option, like
+\&\fB\-mcpu=970 \-mno\-altivec\fR.
+.Sp
+On \s-1AIX\s0, the \fB\-maltivec\fR and \fB\-mpowerpc64\fR options are
+not enabled or disabled by the \fB\-mcpu\fR option at present because
+\&\s-1AIX\s0 does not have full support for these options.  You may still
+enable or disable them individually if you're sure it'll work in your
+environment.
+.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
+.IX Item "-mtune=cpu_type"
+Set the instruction scheduling parameters for machine type
+\&\fIcpu_type\fR, but do not set the architecture type, register usage, or
+choice of mnemonics, as \fB\-mcpu=\fR\fIcpu_type\fR would.  The same
+values for \fIcpu_type\fR are used for \fB\-mtune\fR as for
+\&\fB\-mcpu\fR.  If both are specified, the code generated will use the
+architecture, registers, and mnemonics set by \fB\-mcpu\fR, but the
+scheduling parameters set by \fB\-mtune\fR.
+.IP "\fB\-mcmodel=small\fR" 4
+.IX Item "-mcmodel=small"
+Generate PowerPC64 code for the small model: The \s-1TOC\s0 is limited to
+64k.
+.IP "\fB\-mcmodel=medium\fR" 4
+.IX Item "-mcmodel=medium"
+Generate PowerPC64 code for the medium model: The \s-1TOC\s0 and other static
+data may be up to a total of 4G in size.
+.IP "\fB\-mcmodel=large\fR" 4
+.IX Item "-mcmodel=large"
+Generate PowerPC64 code for the large model: The \s-1TOC\s0 may be up to 4G
+in size.  Other data and code is only limited by the 64\-bit address
+space.
+.IP "\fB\-maltivec\fR" 4
+.IX Item "-maltivec"
+.PD 0
+.IP "\fB\-mno\-altivec\fR" 4
+.IX Item "-mno-altivec"
+.PD
+Generate code that uses (does not use) AltiVec instructions, and also
+enable the use of built-in functions that allow more direct access to
+the AltiVec instruction set.  You may also need to set
+\&\fB\-mabi=altivec\fR to adjust the current \s-1ABI\s0 with AltiVec \s-1ABI\s0
+enhancements.
+.IP "\fB\-mvrsave\fR" 4
+.IX Item "-mvrsave"
+.PD 0
+.IP "\fB\-mno\-vrsave\fR" 4
+.IX Item "-mno-vrsave"
+.PD
+Generate \s-1VRSAVE\s0 instructions when generating AltiVec code.
+.IP "\fB\-mgen\-cell\-microcode\fR" 4
+.IX Item "-mgen-cell-microcode"
+Generate Cell microcode instructions
+.IP "\fB\-mwarn\-cell\-microcode\fR" 4
+.IX Item "-mwarn-cell-microcode"
+Warning when a Cell microcode instruction is going to emitted.  An example
+of a Cell microcode instruction is a variable shift.
+.IP "\fB\-msecure\-plt\fR" 4
+.IX Item "-msecure-plt"
+Generate code that allows ld and ld.so to build executables and shared
+libraries with non-exec .plt and .got sections.  This is a PowerPC
+32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
+.IP "\fB\-mbss\-plt\fR" 4
+.IX Item "-mbss-plt"
+Generate code that uses a \s-1BSS\s0 .plt section that ld.so fills in, and
+requires .plt and .got sections that are both writable and executable.
+This is a PowerPC 32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
+.IP "\fB\-misel\fR" 4
+.IX Item "-misel"
+.PD 0
+.IP "\fB\-mno\-isel\fR" 4
+.IX Item "-mno-isel"
+.PD
+This switch enables or disables the generation of \s-1ISEL\s0 instructions.
+.IP "\fB\-misel=\fR\fIyes/no\fR" 4
+.IX Item "-misel=yes/no"
+This switch has been deprecated.  Use \fB\-misel\fR and
+\&\fB\-mno\-isel\fR instead.
+.IP "\fB\-mspe\fR" 4
+.IX Item "-mspe"
+.PD 0
+.IP "\fB\-mno\-spe\fR" 4
+.IX Item "-mno-spe"
+.PD
+This switch enables or disables the generation of \s-1SPE\s0 simd
+instructions.
+.IP "\fB\-mpaired\fR" 4
+.IX Item "-mpaired"
+.PD 0
+.IP "\fB\-mno\-paired\fR" 4
+.IX Item "-mno-paired"
+.PD
+This switch enables or disables the generation of \s-1PAIRED\s0 simd
+instructions.
+.IP "\fB\-mspe=\fR\fIyes/no\fR" 4
+.IX Item "-mspe=yes/no"
+This option has been deprecated.  Use \fB\-mspe\fR and
+\&\fB\-mno\-spe\fR instead.
+.IP "\fB\-mvsx\fR" 4
+.IX Item "-mvsx"
+.PD 0
+.IP "\fB\-mno\-vsx\fR" 4
+.IX Item "-mno-vsx"
+.PD
+Generate code that uses (does not use) vector/scalar (\s-1VSX\s0)
+instructions, and also enable the use of built-in functions that allow
+more direct access to the \s-1VSX\s0 instruction set.
+.IP "\fB\-mfloat\-gprs=\fR\fIyes/single/double/no\fR" 4
+.IX Item "-mfloat-gprs=yes/single/double/no"
+.PD 0
+.IP "\fB\-mfloat\-gprs\fR" 4
+.IX Item "-mfloat-gprs"
+.PD
+This switch enables or disables the generation of floating point
+operations on the general purpose registers for architectures that
+support it.
+.Sp
+The argument \fIyes\fR or \fIsingle\fR enables the use of
+single-precision floating point operations.
+.Sp
+The argument \fIdouble\fR enables the use of single and
+double-precision floating point operations.
+.Sp
+The argument \fIno\fR disables floating point operations on the
+general purpose registers.
+.Sp
+This option is currently only available on the MPC854x.
+.IP "\fB\-m32\fR" 4
+.IX Item "-m32"
+.PD 0
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD
+Generate code for 32\-bit or 64\-bit environments of Darwin and \s-1SVR4\s0
+targets (including GNU/Linux).  The 32\-bit environment sets int, long
+and pointer to 32 bits and generates code that runs on any PowerPC
+variant.  The 64\-bit environment sets int to 32 bits and long and
+pointer to 64 bits, and generates code for PowerPC64, as for
+\&\fB\-mpowerpc64\fR.
+.IP "\fB\-mfull\-toc\fR" 4
+.IX Item "-mfull-toc"
+.PD 0
+.IP "\fB\-mno\-fp\-in\-toc\fR" 4
+.IX Item "-mno-fp-in-toc"
+.IP "\fB\-mno\-sum\-in\-toc\fR" 4
+.IX Item "-mno-sum-in-toc"
+.IP "\fB\-mminimal\-toc\fR" 4
+.IX Item "-mminimal-toc"
+.PD
+Modify generation of the \s-1TOC\s0 (Table Of Contents), which is created for
+every executable file.  The \fB\-mfull\-toc\fR option is selected by
+default.  In that case, \s-1GCC\s0 will allocate at least one \s-1TOC\s0 entry for
+each unique non-automatic variable reference in your program.  \s-1GCC\s0
+will also place floating-point constants in the \s-1TOC\s0.  However, only
+16,384 entries are available in the \s-1TOC\s0.
+.Sp
+If you receive a linker error message that saying you have overflowed
+the available \s-1TOC\s0 space, you can reduce the amount of \s-1TOC\s0 space used
+with the \fB\-mno\-fp\-in\-toc\fR and \fB\-mno\-sum\-in\-toc\fR options.
+\&\fB\-mno\-fp\-in\-toc\fR prevents \s-1GCC\s0 from putting floating-point
+constants in the \s-1TOC\s0 and \fB\-mno\-sum\-in\-toc\fR forces \s-1GCC\s0 to
+generate code to calculate the sum of an address and a constant at
+run-time instead of putting that sum into the \s-1TOC\s0.  You may specify one
+or both of these options.  Each causes \s-1GCC\s0 to produce very slightly
+slower and larger code at the expense of conserving \s-1TOC\s0 space.
+.Sp
+If you still run out of space in the \s-1TOC\s0 even when you specify both of
+these options, specify \fB\-mminimal\-toc\fR instead.  This option causes
+\&\s-1GCC\s0 to make only one \s-1TOC\s0 entry for every file.  When you specify this
+option, \s-1GCC\s0 will produce code that is slower and larger but which
+uses extremely little \s-1TOC\s0 space.  You may wish to use this option
+only on files that contain less frequently executed code.
+.IP "\fB\-maix64\fR" 4
+.IX Item "-maix64"
+.PD 0
+.IP "\fB\-maix32\fR" 4
+.IX Item "-maix32"
+.PD
+Enable 64\-bit \s-1AIX\s0 \s-1ABI\s0 and calling convention: 64\-bit pointers, 64\-bit
+\&\f(CW\*(C`long\*(C'\fR type, and the infrastructure needed to support them.
+Specifying \fB\-maix64\fR implies \fB\-mpowerpc64\fR and
+\&\fB\-mpowerpc\fR, while \fB\-maix32\fR disables the 64\-bit \s-1ABI\s0 and
+implies \fB\-mno\-powerpc64\fR.  \s-1GCC\s0 defaults to \fB\-maix32\fR.
+.IP "\fB\-mxl\-compat\fR" 4
+.IX Item "-mxl-compat"
+.PD 0
+.IP "\fB\-mno\-xl\-compat\fR" 4
+.IX Item "-mno-xl-compat"
+.PD
+Produce code that conforms more closely to \s-1IBM\s0 \s-1XL\s0 compiler semantics
+when using AIX-compatible \s-1ABI\s0.  Pass floating-point arguments to
+prototyped functions beyond the register save area (\s-1RSA\s0) on the stack
+in addition to argument FPRs.  Do not assume that most significant
+double in 128\-bit long double value is properly rounded when comparing
+values and converting to double.  Use \s-1XL\s0 symbol names for long double
+support routines.
+.Sp
+The \s-1AIX\s0 calling convention was extended but not initially documented to
+handle an obscure K&R C case of calling a function that takes the
+address of its arguments with fewer arguments than declared.  \s-1IBM\s0 \s-1XL\s0
+compilers access floating point arguments which do not fit in the
+\&\s-1RSA\s0 from the stack when a subroutine is compiled without
+optimization.  Because always storing floating-point arguments on the
+stack is inefficient and rarely needed, this option is not enabled by
+default and only is necessary when calling subroutines compiled by \s-1IBM\s0
+\&\s-1XL\s0 compilers without optimization.
+.IP "\fB\-mpe\fR" 4
+.IX Item "-mpe"
+Support \fI\s-1IBM\s0 \s-1RS/6000\s0 \s-1SP\s0\fR \fIParallel Environment\fR (\s-1PE\s0).  Link an
+application written to use message passing with special startup code to
+enable the application to run.  The system must have \s-1PE\s0 installed in the
+standard location (\fI/usr/lpp/ppe.poe/\fR), or the \fIspecs\fR file
+must be overridden with the \fB\-specs=\fR option to specify the
+appropriate directory location.  The Parallel Environment does not
+support threads, so the \fB\-mpe\fR option and the \fB\-pthread\fR
+option are incompatible.
+.IP "\fB\-malign\-natural\fR" 4
+.IX Item "-malign-natural"
+.PD 0
+.IP "\fB\-malign\-power\fR" 4
+.IX Item "-malign-power"
+.PD
+On \s-1AIX\s0, 32\-bit Darwin, and 64\-bit PowerPC GNU/Linux, the option
+\&\fB\-malign\-natural\fR overrides the ABI-defined alignment of larger
+types, such as floating-point doubles, on their natural size-based boundary.
+The option \fB\-malign\-power\fR instructs \s-1GCC\s0 to follow the ABI-specified
+alignment rules.  \s-1GCC\s0 defaults to the standard alignment defined in the \s-1ABI\s0.
+.Sp
+On 64\-bit Darwin, natural alignment is the default, and \fB\-malign\-power\fR
+is not supported.
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD 0
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD
+Generate code that does not use (uses) the floating-point register set.
+Software floating point emulation is provided if you use the
+\&\fB\-msoft\-float\fR option, and pass the option to \s-1GCC\s0 when linking.
+.IP "\fB\-msingle\-float\fR" 4
+.IX Item "-msingle-float"
+.PD 0
+.IP "\fB\-mdouble\-float\fR" 4
+.IX Item "-mdouble-float"
+.PD
+Generate code for single or double-precision floating point operations.
+\&\fB\-mdouble\-float\fR implies \fB\-msingle\-float\fR.
+.IP "\fB\-msimple\-fpu\fR" 4
+.IX Item "-msimple-fpu"
+Do not generate sqrt and div instructions for hardware floating point unit.
+.IP "\fB\-mfpu\fR" 4
+.IX Item "-mfpu"
+Specify type of floating point unit.  Valid values are \fIsp_lite\fR
+(equivalent to \-msingle\-float \-msimple\-fpu), \fIdp_lite\fR (equivalent
+to \-mdouble\-float \-msimple\-fpu), \fIsp_full\fR (equivalent to \-msingle\-float),
+and \fIdp_full\fR (equivalent to \-mdouble\-float).
+.IP "\fB\-mxilinx\-fpu\fR" 4
+.IX Item "-mxilinx-fpu"
+Perform optimizations for floating point unit on Xilinx \s-1PPC\s0 405/440.
+.IP "\fB\-mmultiple\fR" 4
+.IX Item "-mmultiple"
+.PD 0
+.IP "\fB\-mno\-multiple\fR" 4
+.IX Item "-mno-multiple"
+.PD
+Generate code that uses (does not use) the load multiple word
+instructions and the store multiple word instructions.  These
+instructions are generated by default on \s-1POWER\s0 systems, and not
+generated on PowerPC systems.  Do not use \fB\-mmultiple\fR on little
+endian PowerPC systems, since those instructions do not work when the
+processor is in little endian mode.  The exceptions are \s-1PPC740\s0 and
+\&\s-1PPC750\s0 which permit the instructions usage in little endian mode.
+.IP "\fB\-mstring\fR" 4
+.IX Item "-mstring"
+.PD 0
+.IP "\fB\-mno\-string\fR" 4
+.IX Item "-mno-string"
+.PD
+Generate code that uses (does not use) the load string instructions
+and the store string word instructions to save multiple registers and
+do small block moves.  These instructions are generated by default on
+\&\s-1POWER\s0 systems, and not generated on PowerPC systems.  Do not use
+\&\fB\-mstring\fR on little endian PowerPC systems, since those
+instructions do not work when the processor is in little endian mode.
+The exceptions are \s-1PPC740\s0 and \s-1PPC750\s0 which permit the instructions
+usage in little endian mode.
+.IP "\fB\-mupdate\fR" 4
+.IX Item "-mupdate"
+.PD 0
+.IP "\fB\-mno\-update\fR" 4
+.IX Item "-mno-update"
+.PD
+Generate code that uses (does not use) the load or store instructions
+that update the base register to the address of the calculated memory
+location.  These instructions are generated by default.  If you use
+\&\fB\-mno\-update\fR, there is a small window between the time that the
+stack pointer is updated and the address of the previous frame is
+stored, which means code that walks the stack frame across interrupts or
+signals may get corrupted data.
+.IP "\fB\-mavoid\-indexed\-addresses\fR" 4
+.IX Item "-mavoid-indexed-addresses"
+.PD 0
+.IP "\fB\-mno\-avoid\-indexed\-addresses\fR" 4
+.IX Item "-mno-avoid-indexed-addresses"
+.PD
+Generate code that tries to avoid (not avoid) the use of indexed load
+or store instructions. These instructions can incur a performance
+penalty on Power6 processors in certain situations, such as when
+stepping through large arrays that cross a 16M boundary.  This option
+is enabled by default when targetting Power6 and disabled otherwise.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Generate code that uses (does not use) the floating point multiply and
+accumulate instructions.  These instructions are generated by default
+if hardware floating point is used.  The machine dependent
+\&\fB\-mfused\-madd\fR option is now mapped to the machine independent
+\&\fB\-ffp\-contract=fast\fR option, and \fB\-mno\-fused\-madd\fR is
+mapped to \fB\-ffp\-contract=off\fR.
+.IP "\fB\-mmulhw\fR" 4
+.IX Item "-mmulhw"
+.PD 0
+.IP "\fB\-mno\-mulhw\fR" 4
+.IX Item "-mno-mulhw"
+.PD
+Generate code that uses (does not use) the half-word multiply and
+multiply-accumulate instructions on the \s-1IBM\s0 405, 440, 464 and 476 processors.
+These instructions are generated by default when targetting those
+processors.
+.IP "\fB\-mdlmzb\fR" 4
+.IX Item "-mdlmzb"
+.PD 0
+.IP "\fB\-mno\-dlmzb\fR" 4
+.IX Item "-mno-dlmzb"
+.PD
+Generate code that uses (does not use) the string-search \fBdlmzb\fR
+instruction on the \s-1IBM\s0 405, 440, 464 and 476 processors.  This instruction is
+generated by default when targetting those processors.
+.IP "\fB\-mno\-bit\-align\fR" 4
+.IX Item "-mno-bit-align"
+.PD 0
+.IP "\fB\-mbit\-align\fR" 4
+.IX Item "-mbit-align"
+.PD
+On System V.4 and embedded PowerPC systems do not (do) force structures
+and unions that contain bit-fields to be aligned to the base type of the
+bit-field.
+.Sp
+For example, by default a structure containing nothing but 8
+\&\f(CW\*(C`unsigned\*(C'\fR bit-fields of length 1 would be aligned to a 4 byte
+boundary and have a size of 4 bytes.  By using \fB\-mno\-bit\-align\fR,
+the structure would be aligned to a 1 byte boundary and be one byte in
+size.
+.IP "\fB\-mno\-strict\-align\fR" 4
+.IX Item "-mno-strict-align"
+.PD 0
+.IP "\fB\-mstrict\-align\fR" 4
+.IX Item "-mstrict-align"
+.PD
+On System V.4 and embedded PowerPC systems do not (do) assume that
+unaligned memory references will be handled by the system.
+.IP "\fB\-mrelocatable\fR" 4
+.IX Item "-mrelocatable"
+.PD 0
+.IP "\fB\-mno\-relocatable\fR" 4
+.IX Item "-mno-relocatable"
+.PD
+Generate code that allows (does not allow) a static executable to be
+relocated to a different address at runtime.  A simple embedded
+PowerPC system loader should relocate the entire contents of
+\&\f(CW\*(C`.got2\*(C'\fR and 4\-byte locations listed in the \f(CW\*(C`.fixup\*(C'\fR section,
+a table of 32\-bit addresses generated by this option.  For this to
+work, all objects linked together must be compiled with
+\&\fB\-mrelocatable\fR or \fB\-mrelocatable\-lib\fR.
+\&\fB\-mrelocatable\fR code aligns the stack to an 8 byte boundary.
+.IP "\fB\-mrelocatable\-lib\fR" 4
+.IX Item "-mrelocatable-lib"
+.PD 0
+.IP "\fB\-mno\-relocatable\-lib\fR" 4
+.IX Item "-mno-relocatable-lib"
+.PD
+Like \fB\-mrelocatable\fR, \fB\-mrelocatable\-lib\fR generates a
+\&\f(CW\*(C`.fixup\*(C'\fR section to allow static executables to be relocated at
+runtime, but \fB\-mrelocatable\-lib\fR does not use the smaller stack
+alignment of \fB\-mrelocatable\fR.  Objects compiled with
+\&\fB\-mrelocatable\-lib\fR may be linked with objects compiled with
+any combination of the \fB\-mrelocatable\fR options.
+.IP "\fB\-mno\-toc\fR" 4
+.IX Item "-mno-toc"
+.PD 0
+.IP "\fB\-mtoc\fR" 4
+.IX Item "-mtoc"
+.PD
+On System V.4 and embedded PowerPC systems do not (do) assume that
+register 2 contains a pointer to a global area pointing to the addresses
+used in the program.
+.IP "\fB\-mlittle\fR" 4
+.IX Item "-mlittle"
+.PD 0
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+.PD
+On System V.4 and embedded PowerPC systems compile code for the
+processor in little endian mode.  The \fB\-mlittle\-endian\fR option is
+the same as \fB\-mlittle\fR.
+.IP "\fB\-mbig\fR" 4
+.IX Item "-mbig"
+.PD 0
+.IP "\fB\-mbig\-endian\fR" 4
+.IX Item "-mbig-endian"
+.PD
+On System V.4 and embedded PowerPC systems compile code for the
+processor in big endian mode.  The \fB\-mbig\-endian\fR option is
+the same as \fB\-mbig\fR.
+.IP "\fB\-mdynamic\-no\-pic\fR" 4
+.IX Item "-mdynamic-no-pic"
+On Darwin and Mac \s-1OS\s0 X systems, compile code so that it is not
+relocatable, but that its external references are relocatable.  The
+resulting code is suitable for applications, but not shared
+libraries.
+.IP "\fB\-msingle\-pic\-base\fR" 4
+.IX Item "-msingle-pic-base"
+Treat the register used for \s-1PIC\s0 addressing as read-only, rather than
+loading it in the prologue for each function.  The run-time system is
+responsible for initializing this register with an appropriate value
+before execution begins.
+.IP "\fB\-mprioritize\-restricted\-insns=\fR\fIpriority\fR" 4
+.IX Item "-mprioritize-restricted-insns=priority"
+This option controls the priority that is assigned to
+dispatch-slot restricted instructions during the second scheduling
+pass.  The argument \fIpriority\fR takes the value \fI0/1/2\fR to assign
+\&\fIno/highest/second\-highest\fR priority to dispatch slot restricted
+instructions.
+.IP "\fB\-msched\-costly\-dep=\fR\fIdependence_type\fR" 4
+.IX Item "-msched-costly-dep=dependence_type"
+This option controls which dependences are considered costly
+by the target during instruction scheduling.  The argument
+\&\fIdependence_type\fR takes one of the following values:
+\&\fIno\fR: no dependence is costly,
+\&\fIall\fR: all dependences are costly,
+\&\fItrue_store_to_load\fR: a true dependence from store to load is costly,
+\&\fIstore_to_load\fR: any dependence from store to load is costly,
+\&\fInumber\fR: any dependence which latency >= \fInumber\fR is costly.
+.IP "\fB\-minsert\-sched\-nops=\fR\fIscheme\fR" 4
+.IX Item "-minsert-sched-nops=scheme"
+This option controls which nop insertion scheme will be used during
+the second scheduling pass.  The argument \fIscheme\fR takes one of the
+following values:
+\&\fIno\fR: Don't insert nops.
+\&\fIpad\fR: Pad with nops any dispatch group which has vacant issue slots,
+according to the scheduler's grouping.
+\&\fIregroup_exact\fR: Insert nops to force costly dependent insns into
+separate groups.  Insert exactly as many nops as needed to force an insn
+to a new group, according to the estimated processor grouping.
+\&\fInumber\fR: Insert nops to force costly dependent insns into
+separate groups.  Insert \fInumber\fR nops to force an insn to a new group.
+.IP "\fB\-mcall\-sysv\fR" 4
+.IX Item "-mcall-sysv"
+On System V.4 and embedded PowerPC systems compile code using calling
+conventions that adheres to the March 1995 draft of the System V
+Application Binary Interface, PowerPC processor supplement.  This is the
+default unless you configured \s-1GCC\s0 using \fBpowerpc\-*\-eabiaix\fR.
+.IP "\fB\-mcall\-sysv\-eabi\fR" 4
+.IX Item "-mcall-sysv-eabi"
+.PD 0
+.IP "\fB\-mcall\-eabi\fR" 4
+.IX Item "-mcall-eabi"
+.PD
+Specify both \fB\-mcall\-sysv\fR and \fB\-meabi\fR options.
+.IP "\fB\-mcall\-sysv\-noeabi\fR" 4
+.IX Item "-mcall-sysv-noeabi"
+Specify both \fB\-mcall\-sysv\fR and \fB\-mno\-eabi\fR options.
+.IP "\fB\-mcall\-aixdesc\fR" 4
+.IX Item "-mcall-aixdesc"
+On System V.4 and embedded PowerPC systems compile code for the \s-1AIX\s0
+operating system.
+.IP "\fB\-mcall\-linux\fR" 4
+.IX Item "-mcall-linux"
+On System V.4 and embedded PowerPC systems compile code for the
+Linux-based \s-1GNU\s0 system.
+.IP "\fB\-mcall\-gnu\fR" 4
+.IX Item "-mcall-gnu"
+On System V.4 and embedded PowerPC systems compile code for the
+Hurd-based \s-1GNU\s0 system.
+.IP "\fB\-mcall\-freebsd\fR" 4
+.IX Item "-mcall-freebsd"
+On System V.4 and embedded PowerPC systems compile code for the
+FreeBSD operating system.
+.IP "\fB\-mcall\-netbsd\fR" 4
+.IX Item "-mcall-netbsd"
+On System V.4 and embedded PowerPC systems compile code for the
+NetBSD operating system.
+.IP "\fB\-mcall\-openbsd\fR" 4
+.IX Item "-mcall-openbsd"
+On System V.4 and embedded PowerPC systems compile code for the
+OpenBSD operating system.
+.IP "\fB\-maix\-struct\-return\fR" 4
+.IX Item "-maix-struct-return"
+Return all structures in memory (as specified by the \s-1AIX\s0 \s-1ABI\s0).
+.IP "\fB\-msvr4\-struct\-return\fR" 4
+.IX Item "-msvr4-struct-return"
+Return structures smaller than 8 bytes in registers (as specified by the
+\&\s-1SVR4\s0 \s-1ABI\s0).
+.IP "\fB\-mabi=\fR\fIabi-type\fR" 4
+.IX Item "-mabi=abi-type"
+Extend the current \s-1ABI\s0 with a particular extension, or remove such extension.
+Valid values are \fIaltivec\fR, \fIno-altivec\fR, \fIspe\fR,
+\&\fIno-spe\fR, \fIibmlongdouble\fR, \fIieeelongdouble\fR.
+.IP "\fB\-mabi=spe\fR" 4
+.IX Item "-mabi=spe"
+Extend the current \s-1ABI\s0 with \s-1SPE\s0 \s-1ABI\s0 extensions.  This does not change
+the default \s-1ABI\s0, instead it adds the \s-1SPE\s0 \s-1ABI\s0 extensions to the current
+\&\s-1ABI\s0.
+.IP "\fB\-mabi=no\-spe\fR" 4
+.IX Item "-mabi=no-spe"
+Disable Booke \s-1SPE\s0 \s-1ABI\s0 extensions for the current \s-1ABI\s0.
+.IP "\fB\-mabi=ibmlongdouble\fR" 4
+.IX Item "-mabi=ibmlongdouble"
+Change the current \s-1ABI\s0 to use \s-1IBM\s0 extended precision long double.
+This is a PowerPC 32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
+.IP "\fB\-mabi=ieeelongdouble\fR" 4
+.IX Item "-mabi=ieeelongdouble"
+Change the current \s-1ABI\s0 to use \s-1IEEE\s0 extended precision long double.
+This is a PowerPC 32\-bit Linux \s-1ABI\s0 option.
+.IP "\fB\-mprototype\fR" 4
+.IX Item "-mprototype"
+.PD 0
+.IP "\fB\-mno\-prototype\fR" 4
+.IX Item "-mno-prototype"
+.PD
+On System V.4 and embedded PowerPC systems assume that all calls to
+variable argument functions are properly prototyped.  Otherwise, the
+compiler must insert an instruction before every non prototyped call to
+set or clear bit 6 of the condition code register (\fI\s-1CR\s0\fR) to
+indicate whether floating point values were passed in the floating point
+registers in case the function takes a variable arguments.  With
+\&\fB\-mprototype\fR, only calls to prototyped variable argument functions
+will set or clear the bit.
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIsim\-crt0.o\fR and that the standard C libraries are \fIlibsim.a\fR and
+\&\fIlibc.a\fR.  This is the default for \fBpowerpc\-*\-eabisim\fR
+configurations.
+.IP "\fB\-mmvme\fR" 4
+.IX Item "-mmvme"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIcrt0.o\fR and the standard C libraries are \fIlibmvme.a\fR and
+\&\fIlibc.a\fR.
+.IP "\fB\-mads\fR" 4
+.IX Item "-mads"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIcrt0.o\fR and the standard C libraries are \fIlibads.a\fR and
+\&\fIlibc.a\fR.
+.IP "\fB\-myellowknife\fR" 4
+.IX Item "-myellowknife"
+On embedded PowerPC systems, assume that the startup module is called
+\&\fIcrt0.o\fR and the standard C libraries are \fIlibyk.a\fR and
+\&\fIlibc.a\fR.
+.IP "\fB\-mvxworks\fR" 4
+.IX Item "-mvxworks"
+On System V.4 and embedded PowerPC systems, specify that you are
+compiling for a VxWorks system.
+.IP "\fB\-memb\fR" 4
+.IX Item "-memb"
+On embedded PowerPC systems, set the \fI\s-1PPC_EMB\s0\fR bit in the \s-1ELF\s0 flags
+header to indicate that \fBeabi\fR extended relocations are used.
+.IP "\fB\-meabi\fR" 4
+.IX Item "-meabi"
+.PD 0
+.IP "\fB\-mno\-eabi\fR" 4
+.IX Item "-mno-eabi"
+.PD
+On System V.4 and embedded PowerPC systems do (do not) adhere to the
+Embedded Applications Binary Interface (eabi) which is a set of
+modifications to the System V.4 specifications.  Selecting \fB\-meabi\fR
+means that the stack is aligned to an 8 byte boundary, a function
+\&\f(CW\*(C`_\|_eabi\*(C'\fR is called to from \f(CW\*(C`main\*(C'\fR to set up the eabi
+environment, and the \fB\-msdata\fR option can use both \f(CW\*(C`r2\*(C'\fR and
+\&\f(CW\*(C`r13\*(C'\fR to point to two separate small data areas.  Selecting
+\&\fB\-mno\-eabi\fR means that the stack is aligned to a 16 byte boundary,
+do not call an initialization function from \f(CW\*(C`main\*(C'\fR, and the
+\&\fB\-msdata\fR option will only use \f(CW\*(C`r13\*(C'\fR to point to a single
+small data area.  The \fB\-meabi\fR option is on by default if you
+configured \s-1GCC\s0 using one of the \fBpowerpc*\-*\-eabi*\fR options.
+.IP "\fB\-msdata=eabi\fR" 4
+.IX Item "-msdata=eabi"
+On System V.4 and embedded PowerPC systems, put small initialized
+\&\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata2\fR section, which
+is pointed to by register \f(CW\*(C`r2\*(C'\fR.  Put small initialized
+non\-\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata\fR section,
+which is pointed to by register \f(CW\*(C`r13\*(C'\fR.  Put small uninitialized
+global and static data in the \fB.sbss\fR section, which is adjacent to
+the \fB.sdata\fR section.  The \fB\-msdata=eabi\fR option is
+incompatible with the \fB\-mrelocatable\fR option.  The
+\&\fB\-msdata=eabi\fR option also sets the \fB\-memb\fR option.
+.IP "\fB\-msdata=sysv\fR" 4
+.IX Item "-msdata=sysv"
+On System V.4 and embedded PowerPC systems, put small global and static
+data in the \fB.sdata\fR section, which is pointed to by register
+\&\f(CW\*(C`r13\*(C'\fR.  Put small uninitialized global and static data in the
+\&\fB.sbss\fR section, which is adjacent to the \fB.sdata\fR section.
+The \fB\-msdata=sysv\fR option is incompatible with the
+\&\fB\-mrelocatable\fR option.
+.IP "\fB\-msdata=default\fR" 4
+.IX Item "-msdata=default"
+.PD 0
+.IP "\fB\-msdata\fR" 4
+.IX Item "-msdata"
+.PD
+On System V.4 and embedded PowerPC systems, if \fB\-meabi\fR is used,
+compile code the same as \fB\-msdata=eabi\fR, otherwise compile code the
+same as \fB\-msdata=sysv\fR.
+.IP "\fB\-msdata=data\fR" 4
+.IX Item "-msdata=data"
+On System V.4 and embedded PowerPC systems, put small global
+data in the \fB.sdata\fR section.  Put small uninitialized global
+data in the \fB.sbss\fR section.  Do not use register \f(CW\*(C`r13\*(C'\fR
+to address small data however.  This is the default behavior unless
+other \fB\-msdata\fR options are used.
+.IP "\fB\-msdata=none\fR" 4
+.IX Item "-msdata=none"
+.PD 0
+.IP "\fB\-mno\-sdata\fR" 4
+.IX Item "-mno-sdata"
+.PD
+On embedded PowerPC systems, put all initialized global and static data
+in the \fB.data\fR section, and all uninitialized data in the
+\&\fB.bss\fR section.
+.IP "\fB\-mblock\-move\-inline\-limit=\fR\fInum\fR" 4
+.IX Item "-mblock-move-inline-limit=num"
+Inline all block moves (such as calls to \f(CW\*(C`memcpy\*(C'\fR or structure
+copies) less than or equal to \fInum\fR bytes.  The minimum value for
+\&\fInum\fR is 32 bytes on 32\-bit targets and 64 bytes on 64\-bit
+targets.  The default value is target-specific.
+.IP "\fB\-G\fR \fInum\fR" 4
+.IX Item "-G num"
+On embedded PowerPC systems, put global and static items less than or
+equal to \fInum\fR bytes into the small data or bss sections instead of
+the normal data or bss section.  By default, \fInum\fR is 8.  The
+\&\fB\-G\fR \fInum\fR switch is also passed to the linker.
+All modules should be compiled with the same \fB\-G\fR \fInum\fR value.
+.IP "\fB\-mregnames\fR" 4
+.IX Item "-mregnames"
+.PD 0
+.IP "\fB\-mno\-regnames\fR" 4
+.IX Item "-mno-regnames"
+.PD
+On System V.4 and embedded PowerPC systems do (do not) emit register
+names in the assembly language output using symbolic forms.
+.IP "\fB\-mlongcall\fR" 4
+.IX Item "-mlongcall"
+.PD 0
+.IP "\fB\-mno\-longcall\fR" 4
+.IX Item "-mno-longcall"
+.PD
+By default assume that all calls are far away so that a longer more
+expensive calling sequence is required.  This is required for calls
+further than 32 megabytes (33,554,432 bytes) from the current location.
+A short call will be generated if the compiler knows
+the call cannot be that far away.  This setting can be overridden by
+the \f(CW\*(C`shortcall\*(C'\fR function attribute, or by \f(CW\*(C`#pragma
+longcall(0)\*(C'\fR.
+.Sp
+Some linkers are capable of detecting out-of-range calls and generating
+glue code on the fly.  On these systems, long calls are unnecessary and
+generate slower code.  As of this writing, the \s-1AIX\s0 linker can do this,
+as can the \s-1GNU\s0 linker for PowerPC/64.  It is planned to add this feature
+to the \s-1GNU\s0 linker for 32\-bit PowerPC systems as well.
+.Sp
+On Darwin/PPC systems, \f(CW\*(C`#pragma longcall\*(C'\fR will generate \*(L"jbsr
+callee, L42\*(R", plus a \*(L"branch island\*(R" (glue code).  The two target
+addresses represent the callee and the \*(L"branch island\*(R".  The
+Darwin/PPC linker will prefer the first address and generate a \*(L"bl
+callee\*(R" if the \s-1PPC\s0 \*(L"bl\*(R" instruction will reach the callee directly;
+otherwise, the linker will generate \*(L"bl L42\*(R" to call the \*(L"branch
+island\*(R".  The \*(L"branch island\*(R" is appended to the body of the
+calling function; it computes the full 32\-bit address of the callee
+and jumps to it.
+.Sp
+On Mach-O (Darwin) systems, this option directs the compiler emit to
+the glue for every direct call, and the Darwin linker decides whether
+to use or discard it.
+.Sp
+In the future, we may cause \s-1GCC\s0 to ignore all longcall specifications
+when the linker is known to generate glue.
+.IP "\fB\-mtls\-markers\fR" 4
+.IX Item "-mtls-markers"
+.PD 0
+.IP "\fB\-mno\-tls\-markers\fR" 4
+.IX Item "-mno-tls-markers"
+.PD
+Mark (do not mark) calls to \f(CW\*(C`_\|_tls_get_addr\*(C'\fR with a relocation
+specifying the function argument.  The relocation allows ld to
+reliably associate function call with argument setup instructions for
+\&\s-1TLS\s0 optimization, which in turn allows gcc to better schedule the
+sequence.
+.IP "\fB\-pthread\fR" 4
+.IX Item "-pthread"
+Adds support for multithreading with the \fIpthreads\fR library.
+This option sets flags for both the preprocessor and linker.
+.IP "\fB\-mrecip\fR" 4
+.IX Item "-mrecip"
+.PD 0
+.IP "\fB\-mno\-recip\fR" 4
+.IX Item "-mno-recip"
+.PD
+This option will enable \s-1GCC\s0 to use the reciprocal estimate and
+reciprocal square root estimate instructions with additional
+Newton-Raphson steps to increase precision instead of doing a divide or
+square root and divide for floating point arguments.  You should use
+the \fB\-ffast\-math\fR option when using \fB\-mrecip\fR (or at
+least \fB\-funsafe\-math\-optimizations\fR,
+\&\fB\-finite\-math\-only\fR, \fB\-freciprocal\-math\fR and
+\&\fB\-fno\-trapping\-math\fR).  Note that while the throughput of the
+sequence is generally higher than the throughput of the non-reciprocal
+instruction, the precision of the sequence can be decreased by up to 2
+ulp (i.e. the inverse of 1.0 equals 0.99999994) for reciprocal square
+roots.
+.IP "\fB\-mrecip=\fR\fIopt\fR" 4
+.IX Item "-mrecip=opt"
+This option allows to control which reciprocal estimate instructions
+may be used.  \fIopt\fR is a comma separated list of options, that may
+be preceded by a \f(CW\*(C`!\*(C'\fR to invert the option:
+\&\f(CW\*(C`all\*(C'\fR: enable all estimate instructions,
+\&\f(CW\*(C`default\*(C'\fR: enable the default instructions, equivalent to \fB\-mrecip\fR,
+\&\f(CW\*(C`none\*(C'\fR: disable all estimate instructions, equivalent to \fB\-mno\-recip\fR;
+\&\f(CW\*(C`div\*(C'\fR: enable the reciprocal approximation instructions for both single and double precision;
+\&\f(CW\*(C`divf\*(C'\fR: enable the single precision reciprocal approximation instructions;
+\&\f(CW\*(C`divd\*(C'\fR: enable the double precision reciprocal approximation instructions;
+\&\f(CW\*(C`rsqrt\*(C'\fR: enable the reciprocal square root approximation instructions for both single and double precision;
+\&\f(CW\*(C`rsqrtf\*(C'\fR: enable the single precision reciprocal square root approximation instructions;
+\&\f(CW\*(C`rsqrtd\*(C'\fR: enable the double precision reciprocal square root approximation instructions;
+.Sp
+So for example, \fB\-mrecip=all,!rsqrtd\fR would enable the
+all of the reciprocal estimate instructions, except for the
+\&\f(CW\*(C`FRSQRTE\*(C'\fR, \f(CW\*(C`XSRSQRTEDP\*(C'\fR, and \f(CW\*(C`XVRSQRTEDP\*(C'\fR instructions
+which handle the double precision reciprocal square root calculations.
+.IP "\fB\-mrecip\-precision\fR" 4
+.IX Item "-mrecip-precision"
+.PD 0
+.IP "\fB\-mno\-recip\-precision\fR" 4
+.IX Item "-mno-recip-precision"
+.PD
+Assume (do not assume) that the reciprocal estimate instructions
+provide higher precision estimates than is mandated by the powerpc
+\&\s-1ABI\s0.  Selecting \fB\-mcpu=power6\fR or \fB\-mcpu=power7\fR
+automatically selects \fB\-mrecip\-precision\fR.  The double
+precision square root estimate instructions are not generated by
+default on low precision machines, since they do not provide an
+estimate that converges after three steps.
+.IP "\fB\-mveclibabi=\fR\fItype\fR" 4
+.IX Item "-mveclibabi=type"
+Specifies the \s-1ABI\s0 type to use for vectorizing intrinsics using an
+external library.  The only type supported at present is \f(CW\*(C`mass\*(C'\fR,
+which specifies to use \s-1IBM\s0's Mathematical Acceleration Subsystem
+(\s-1MASS\s0) libraries for vectorizing intrinsics using external libraries.
+\&\s-1GCC\s0 will currently emit calls to \f(CW\*(C`acosd2\*(C'\fR, \f(CW\*(C`acosf4\*(C'\fR,
+\&\f(CW\*(C`acoshd2\*(C'\fR, \f(CW\*(C`acoshf4\*(C'\fR, \f(CW\*(C`asind2\*(C'\fR, \f(CW\*(C`asinf4\*(C'\fR,
+\&\f(CW\*(C`asinhd2\*(C'\fR, \f(CW\*(C`asinhf4\*(C'\fR, \f(CW\*(C`atan2d2\*(C'\fR, \f(CW\*(C`atan2f4\*(C'\fR,
+\&\f(CW\*(C`atand2\*(C'\fR, \f(CW\*(C`atanf4\*(C'\fR, \f(CW\*(C`atanhd2\*(C'\fR, \f(CW\*(C`atanhf4\*(C'\fR,
+\&\f(CW\*(C`cbrtd2\*(C'\fR, \f(CW\*(C`cbrtf4\*(C'\fR, \f(CW\*(C`cosd2\*(C'\fR, \f(CW\*(C`cosf4\*(C'\fR,
+\&\f(CW\*(C`coshd2\*(C'\fR, \f(CW\*(C`coshf4\*(C'\fR, \f(CW\*(C`erfcd2\*(C'\fR, \f(CW\*(C`erfcf4\*(C'\fR,
+\&\f(CW\*(C`erfd2\*(C'\fR, \f(CW\*(C`erff4\*(C'\fR, \f(CW\*(C`exp2d2\*(C'\fR, \f(CW\*(C`exp2f4\*(C'\fR,
+\&\f(CW\*(C`expd2\*(C'\fR, \f(CW\*(C`expf4\*(C'\fR, \f(CW\*(C`expm1d2\*(C'\fR, \f(CW\*(C`expm1f4\*(C'\fR,
+\&\f(CW\*(C`hypotd2\*(C'\fR, \f(CW\*(C`hypotf4\*(C'\fR, \f(CW\*(C`lgammad2\*(C'\fR, \f(CW\*(C`lgammaf4\*(C'\fR,
+\&\f(CW\*(C`log10d2\*(C'\fR, \f(CW\*(C`log10f4\*(C'\fR, \f(CW\*(C`log1pd2\*(C'\fR, \f(CW\*(C`log1pf4\*(C'\fR,
+\&\f(CW\*(C`log2d2\*(C'\fR, \f(CW\*(C`log2f4\*(C'\fR, \f(CW\*(C`logd2\*(C'\fR, \f(CW\*(C`logf4\*(C'\fR,
+\&\f(CW\*(C`powd2\*(C'\fR, \f(CW\*(C`powf4\*(C'\fR, \f(CW\*(C`sind2\*(C'\fR, \f(CW\*(C`sinf4\*(C'\fR, \f(CW\*(C`sinhd2\*(C'\fR,
+\&\f(CW\*(C`sinhf4\*(C'\fR, \f(CW\*(C`sqrtd2\*(C'\fR, \f(CW\*(C`sqrtf4\*(C'\fR, \f(CW\*(C`tand2\*(C'\fR,
+\&\f(CW\*(C`tanf4\*(C'\fR, \f(CW\*(C`tanhd2\*(C'\fR, and \f(CW\*(C`tanhf4\*(C'\fR when generating code
+for power7.  Both \fB\-ftree\-vectorize\fR and
+\&\fB\-funsafe\-math\-optimizations\fR have to be enabled.  The \s-1MASS\s0
+libraries will have to be specified at link time.
+.IP "\fB\-mfriz\fR" 4
+.IX Item "-mfriz"
+.PD 0
+.IP "\fB\-mno\-friz\fR" 4
+.IX Item "-mno-friz"
+.PD
+Generate (do not generate) the \f(CW\*(C`friz\*(C'\fR instruction when the
+\&\fB\-funsafe\-math\-optimizations\fR option is used to optimize
+rounding a floating point value to 64\-bit integer and back to floating
+point.  The \f(CW\*(C`friz\*(C'\fR instruction does not return the same value if
+the floating point number is too large to fit in an integer.
+.PP
+\fI\s-1RX\s0 Options\fR
+.IX Subsection "RX Options"
+.PP
+These command line options are defined for \s-1RX\s0 targets:
+.IP "\fB\-m64bit\-doubles\fR" 4
+.IX Item "-m64bit-doubles"
+.PD 0
+.IP "\fB\-m32bit\-doubles\fR" 4
+.IX Item "-m32bit-doubles"
+.PD
+Make the \f(CW\*(C`double\*(C'\fR data type be 64\-bits (\fB\-m64bit\-doubles\fR)
+or 32\-bits (\fB\-m32bit\-doubles\fR) in size.  The default is
+\&\fB\-m32bit\-doubles\fR.  \fINote\fR \s-1RX\s0 floating point hardware only
+works on 32\-bit values, which is why the default is
+\&\fB\-m32bit\-doubles\fR.
+.IP "\fB\-fpu\fR" 4
+.IX Item "-fpu"
+.PD 0
+.IP "\fB\-nofpu\fR" 4
+.IX Item "-nofpu"
+.PD
+Enables (\fB\-fpu\fR) or disables (\fB\-nofpu\fR) the use of \s-1RX\s0
+floating point hardware.  The default is enabled for the \fI\s-1RX600\s0\fR
+series and disabled for the \fI\s-1RX200\s0\fR series.
+.Sp
+Floating point instructions will only be generated for 32\-bit floating
+point values however, so if the \fB\-m64bit\-doubles\fR option is in
+use then the \s-1FPU\s0 hardware will not be used for doubles.
+.Sp
+\&\fINote\fR If the \fB\-fpu\fR option is enabled then
+\&\fB\-funsafe\-math\-optimizations\fR is also enabled automatically.
+This is because the \s-1RX\s0 \s-1FPU\s0 instructions are themselves unsafe.
+.IP "\fB\-mcpu=\fR\fIname\fR" 4
+.IX Item "-mcpu=name"
+Selects the type of \s-1RX\s0 \s-1CPU\s0 to be targeted.  Currently three types are
+supported, the generic \fI\s-1RX600\s0\fR and \fI\s-1RX200\s0\fR series hardware and
+the specific \fI\s-1RX610\s0\fR \s-1CPU\s0.  The default is \fI\s-1RX600\s0\fR.
+.Sp
+The only difference between \fI\s-1RX600\s0\fR and \fI\s-1RX610\s0\fR is that the
+\&\fI\s-1RX610\s0\fR does not support the \f(CW\*(C`MVTIPL\*(C'\fR instruction.
+.Sp
+The \fI\s-1RX200\s0\fR series does not have a hardware floating point unit
+and so \fB\-nofpu\fR is enabled by default when this type is
+selected.
+.IP "\fB\-mbig\-endian\-data\fR" 4
+.IX Item "-mbig-endian-data"
+.PD 0
+.IP "\fB\-mlittle\-endian\-data\fR" 4
+.IX Item "-mlittle-endian-data"
+.PD
+Store data (but not code) in the big-endian format.  The default is
+\&\fB\-mlittle\-endian\-data\fR, i.e. to store data in the little endian
+format.
+.IP "\fB\-msmall\-data\-limit=\fR\fIN\fR" 4
+.IX Item "-msmall-data-limit=N"
+Specifies the maximum size in bytes of global and static variables
+which can be placed into the small data area.  Using the small data
+area can lead to smaller and faster code, but the size of area is
+limited and it is up to the programmer to ensure that the area does
+not overflow.  Also when the small data area is used one of the \s-1RX\s0's
+registers (\f(CW\*(C`r13\*(C'\fR) is reserved for use pointing to this area, so
+it is no longer available for use by the compiler.  This could result
+in slower and/or larger code if variables which once could have been
+held in \f(CW\*(C`r13\*(C'\fR are now pushed onto the stack.
+.Sp
+Note, common variables (variables which have not been initialised) and
+constants are not placed into the small data area as they are assigned
+to other sections in the output executable.
+.Sp
+The default value is zero, which disables this feature.  Note, this
+feature is not enabled by default with higher optimization levels
+(\fB\-O2\fR etc) because of the potentially detrimental effects of
+reserving register \f(CW\*(C`r13\*(C'\fR.  It is up to the programmer to
+experiment and discover whether this feature is of benefit to their
+program.
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+.PD 0
+.IP "\fB\-mno\-sim\fR" 4
+.IX Item "-mno-sim"
+.PD
+Use the simulator runtime.  The default is to use the libgloss board
+specific runtime.
+.IP "\fB\-mas100\-syntax\fR" 4
+.IX Item "-mas100-syntax"
+.PD 0
+.IP "\fB\-mno\-as100\-syntax\fR" 4
+.IX Item "-mno-as100-syntax"
+.PD
+When generating assembler output use a syntax that is compatible with
+Renesas's \s-1AS100\s0 assembler.  This syntax can also be handled by the \s-1GAS\s0
+assembler but it has some restrictions so generating it is not the
+default option.
+.IP "\fB\-mmax\-constant\-size=\fR\fIN\fR" 4
+.IX Item "-mmax-constant-size=N"
+Specifies the maximum size, in bytes, of a constant that can be used as
+an operand in a \s-1RX\s0 instruction.  Although the \s-1RX\s0 instruction set does
+allow constants of up to 4 bytes in length to be used in instructions,
+a longer value equates to a longer instruction.  Thus in some
+circumstances it can be beneficial to restrict the size of constants
+that are used in instructions.  Constants that are too big are instead
+placed into a constant pool and referenced via register indirection.
+.Sp
+The value \fIN\fR can be between 0 and 4.  A value of 0 (the default)
+or 4 means that constants of any size are allowed.
+.IP "\fB\-mrelax\fR" 4
+.IX Item "-mrelax"
+Enable linker relaxation.  Linker relaxation is a process whereby the
+linker will attempt to reduce the size of a program by finding shorter
+versions of various instructions.  Disabled by default.
+.IP "\fB\-mint\-register=\fR\fIN\fR" 4
+.IX Item "-mint-register=N"
+Specify the number of registers to reserve for fast interrupt handler
+functions.  The value \fIN\fR can be between 0 and 4.  A value of 1
+means that register \f(CW\*(C`r13\*(C'\fR will be reserved for the exclusive use
+of fast interrupt handlers.  A value of 2 reserves \f(CW\*(C`r13\*(C'\fR and
+\&\f(CW\*(C`r12\*(C'\fR.  A value of 3 reserves \f(CW\*(C`r13\*(C'\fR, \f(CW\*(C`r12\*(C'\fR and
+\&\f(CW\*(C`r11\*(C'\fR, and a value of 4 reserves \f(CW\*(C`r13\*(C'\fR through \f(CW\*(C`r10\*(C'\fR.
+A value of 0, the default, does not reserve any registers.
+.IP "\fB\-msave\-acc\-in\-interrupts\fR" 4
+.IX Item "-msave-acc-in-interrupts"
+Specifies that interrupt handler functions should preserve the
+accumulator register.  This is only necessary if normal code might use
+the accumulator register, for example because it performs 64\-bit
+multiplications.  The default is to ignore the accumulator as this
+makes the interrupt handlers faster.
+.PP
+\&\fINote:\fR The generic \s-1GCC\s0 command line \fB\-ffixed\-\fR\fIreg\fR
+has special significance to the \s-1RX\s0 port when used with the
+\&\f(CW\*(C`interrupt\*(C'\fR function attribute.  This attribute indicates a
+function intended to process fast interrupts.  \s-1GCC\s0 will will ensure
+that it only uses the registers \f(CW\*(C`r10\*(C'\fR, \f(CW\*(C`r11\*(C'\fR, \f(CW\*(C`r12\*(C'\fR
+and/or \f(CW\*(C`r13\*(C'\fR and only provided that the normal use of the
+corresponding registers have been restricted via the
+\&\fB\-ffixed\-\fR\fIreg\fR or \fB\-mint\-register\fR command line
+options.
+.PP
+\fIS/390 and zSeries Options\fR
+.IX Subsection "S/390 and zSeries Options"
+.PP
+These are the \fB\-m\fR options defined for the S/390 and zSeries architecture.
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD 0
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD
+Use (do not use) the hardware floating-point instructions and registers
+for floating-point operations.  When \fB\-msoft\-float\fR is specified,
+functions in \fIlibgcc.a\fR will be used to perform floating-point
+operations.  When \fB\-mhard\-float\fR is specified, the compiler
+generates \s-1IEEE\s0 floating-point instructions.  This is the default.
+.IP "\fB\-mhard\-dfp\fR" 4
+.IX Item "-mhard-dfp"
+.PD 0
+.IP "\fB\-mno\-hard\-dfp\fR" 4
+.IX Item "-mno-hard-dfp"
+.PD
+Use (do not use) the hardware decimal-floating-point instructions for
+decimal-floating-point operations.  When \fB\-mno\-hard\-dfp\fR is
+specified, functions in \fIlibgcc.a\fR will be used to perform
+decimal-floating-point operations.  When \fB\-mhard\-dfp\fR is
+specified, the compiler generates decimal-floating-point hardware
+instructions.  This is the default for \fB\-march=z9\-ec\fR or higher.
+.IP "\fB\-mlong\-double\-64\fR" 4
+.IX Item "-mlong-double-64"
+.PD 0
+.IP "\fB\-mlong\-double\-128\fR" 4
+.IX Item "-mlong-double-128"
+.PD
+These switches control the size of \f(CW\*(C`long double\*(C'\fR type. A size
+of 64bit makes the \f(CW\*(C`long double\*(C'\fR type equivalent to the \f(CW\*(C`double\*(C'\fR
+type. This is the default.
+.IP "\fB\-mbackchain\fR" 4
+.IX Item "-mbackchain"
+.PD 0
+.IP "\fB\-mno\-backchain\fR" 4
+.IX Item "-mno-backchain"
+.PD
+Store (do not store) the address of the caller's frame as backchain pointer
+into the callee's stack frame.
+A backchain may be needed to allow debugging using tools that do not understand
+\&\s-1DWARF\-2\s0 call frame information.
+When \fB\-mno\-packed\-stack\fR is in effect, the backchain pointer is stored
+at the bottom of the stack frame; when \fB\-mpacked\-stack\fR is in effect,
+the backchain is placed into the topmost word of the 96/160 byte register
+save area.
+.Sp
+In general, code compiled with \fB\-mbackchain\fR is call-compatible with
+code compiled with \fB\-mmo\-backchain\fR; however, use of the backchain
+for debugging purposes usually requires that the whole binary is built with
+\&\fB\-mbackchain\fR.  Note that the combination of \fB\-mbackchain\fR,
+\&\fB\-mpacked\-stack\fR and \fB\-mhard\-float\fR is not supported.  In order
+to build a linux kernel use \fB\-msoft\-float\fR.
+.Sp
+The default is to not maintain the backchain.
+.IP "\fB\-mpacked\-stack\fR" 4
+.IX Item "-mpacked-stack"
+.PD 0
+.IP "\fB\-mno\-packed\-stack\fR" 4
+.IX Item "-mno-packed-stack"
+.PD
+Use (do not use) the packed stack layout.  When \fB\-mno\-packed\-stack\fR is
+specified, the compiler uses the all fields of the 96/160 byte register save
+area only for their default purpose; unused fields still take up stack space.
+When \fB\-mpacked\-stack\fR is specified, register save slots are densely
+packed at the top of the register save area; unused space is reused for other
+purposes, allowing for more efficient use of the available stack space.
+However, when \fB\-mbackchain\fR is also in effect, the topmost word of
+the save area is always used to store the backchain, and the return address
+register is always saved two words below the backchain.
+.Sp
+As long as the stack frame backchain is not used, code generated with
+\&\fB\-mpacked\-stack\fR is call-compatible with code generated with
+\&\fB\-mno\-packed\-stack\fR.  Note that some non-FSF releases of \s-1GCC\s0 2.95 for
+S/390 or zSeries generated code that uses the stack frame backchain at run
+time, not just for debugging purposes.  Such code is not call-compatible
+with code compiled with \fB\-mpacked\-stack\fR.  Also, note that the
+combination of \fB\-mbackchain\fR,
+\&\fB\-mpacked\-stack\fR and \fB\-mhard\-float\fR is not supported.  In order
+to build a linux kernel use \fB\-msoft\-float\fR.
+.Sp
+The default is to not use the packed stack layout.
+.IP "\fB\-msmall\-exec\fR" 4
+.IX Item "-msmall-exec"
+.PD 0
+.IP "\fB\-mno\-small\-exec\fR" 4
+.IX Item "-mno-small-exec"
+.PD
+Generate (or do not generate) code using the \f(CW\*(C`bras\*(C'\fR instruction
+to do subroutine calls.
+This only works reliably if the total executable size does not
+exceed 64k.  The default is to use the \f(CW\*(C`basr\*(C'\fR instruction instead,
+which does not have this limitation.
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD 0
+.IP "\fB\-m31\fR" 4
+.IX Item "-m31"
+.PD
+When \fB\-m31\fR is specified, generate code compliant to the
+GNU/Linux for S/390 \s-1ABI\s0.  When \fB\-m64\fR is specified, generate
+code compliant to the GNU/Linux for zSeries \s-1ABI\s0.  This allows \s-1GCC\s0 in
+particular to generate 64\-bit instructions.  For the \fBs390\fR
+targets, the default is \fB\-m31\fR, while the \fBs390x\fR
+targets default to \fB\-m64\fR.
+.IP "\fB\-mzarch\fR" 4
+.IX Item "-mzarch"
+.PD 0
+.IP "\fB\-mesa\fR" 4
+.IX Item "-mesa"
+.PD
+When \fB\-mzarch\fR is specified, generate code using the
+instructions available on z/Architecture.
+When \fB\-mesa\fR is specified, generate code using the
+instructions available on \s-1ESA/390\s0.  Note that \fB\-mesa\fR is
+not possible with \fB\-m64\fR.
+When generating code compliant to the GNU/Linux for S/390 \s-1ABI\s0,
+the default is \fB\-mesa\fR.  When generating code compliant
+to the GNU/Linux for zSeries \s-1ABI\s0, the default is \fB\-mzarch\fR.
+.IP "\fB\-mmvcle\fR" 4
+.IX Item "-mmvcle"
+.PD 0
+.IP "\fB\-mno\-mvcle\fR" 4
+.IX Item "-mno-mvcle"
+.PD
+Generate (or do not generate) code using the \f(CW\*(C`mvcle\*(C'\fR instruction
+to perform block moves.  When \fB\-mno\-mvcle\fR is specified,
+use a \f(CW\*(C`mvc\*(C'\fR loop instead.  This is the default unless optimizing for
+size.
+.IP "\fB\-mdebug\fR" 4
+.IX Item "-mdebug"
+.PD 0
+.IP "\fB\-mno\-debug\fR" 4
+.IX Item "-mno-debug"
+.PD
+Print (or do not print) additional debug information when compiling.
+The default is to not print debug information.
+.IP "\fB\-march=\fR\fIcpu-type\fR" 4
+.IX Item "-march=cpu-type"
+Generate code that will run on \fIcpu-type\fR, which is the name of a system
+representing a certain processor type.  Possible values for
+\&\fIcpu-type\fR are \fBg5\fR, \fBg6\fR, \fBz900\fR, \fBz990\fR,
+\&\fBz9\-109\fR, \fBz9\-ec\fR and \fBz10\fR.
+When generating code using the instructions available on z/Architecture,
+the default is \fB\-march=z900\fR.  Otherwise, the default is
+\&\fB\-march=g5\fR.
+.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
+.IX Item "-mtune=cpu-type"
+Tune to \fIcpu-type\fR everything applicable about the generated code,
+except for the \s-1ABI\s0 and the set of available instructions.
+The list of \fIcpu-type\fR values is the same as for \fB\-march\fR.
+The default is the value used for \fB\-march\fR.
+.IP "\fB\-mtpf\-trace\fR" 4
+.IX Item "-mtpf-trace"
+.PD 0
+.IP "\fB\-mno\-tpf\-trace\fR" 4
+.IX Item "-mno-tpf-trace"
+.PD
+Generate code that adds (does not add) in \s-1TPF\s0 \s-1OS\s0 specific branches to trace
+routines in the operating system.  This option is off by default, even
+when compiling for the \s-1TPF\s0 \s-1OS\s0.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Generate code that uses (does not use) the floating point multiply and
+accumulate instructions.  These instructions are generated by default if
+hardware floating point is used.
+.IP "\fB\-mwarn\-framesize=\fR\fIframesize\fR" 4
+.IX Item "-mwarn-framesize=framesize"
+Emit a warning if the current function exceeds the given frame size.  Because
+this is a compile time check it doesn't need to be a real problem when the program
+runs.  It is intended to identify functions which most probably cause
+a stack overflow.  It is useful to be used in an environment with limited stack
+size e.g. the linux kernel.
+.IP "\fB\-mwarn\-dynamicstack\fR" 4
+.IX Item "-mwarn-dynamicstack"
+Emit a warning if the function calls alloca or uses dynamically
+sized arrays.  This is generally a bad idea with a limited stack size.
+.IP "\fB\-mstack\-guard=\fR\fIstack-guard\fR" 4
+.IX Item "-mstack-guard=stack-guard"
+.PD 0
+.IP "\fB\-mstack\-size=\fR\fIstack-size\fR" 4
+.IX Item "-mstack-size=stack-size"
+.PD
+If these options are provided the s390 back end emits additional instructions in
+the function prologue which trigger a trap if the stack size is \fIstack-guard\fR
+bytes above the \fIstack-size\fR (remember that the stack on s390 grows downward).
+If the \fIstack-guard\fR option is omitted the smallest power of 2 larger than
+the frame size of the compiled function is chosen.
+These options are intended to be used to help debugging stack overflow problems.
+The additionally emitted code causes only little overhead and hence can also be
+used in production like systems without greater performance degradation.  The given
+values have to be exact powers of 2 and \fIstack-size\fR has to be greater than
+\&\fIstack-guard\fR without exceeding 64k.
+In order to be efficient the extra code makes the assumption that the stack starts
+at an address aligned to the value given by \fIstack-size\fR.
+The \fIstack-guard\fR option can only be used in conjunction with \fIstack-size\fR.
+.PP
+\fIScore Options\fR
+.IX Subsection "Score Options"
+.PP
+These options are defined for Score implementations:
+.IP "\fB\-meb\fR" 4
+.IX Item "-meb"
+Compile code for big endian mode.  This is the default.
+.IP "\fB\-mel\fR" 4
+.IX Item "-mel"
+Compile code for little endian mode.
+.IP "\fB\-mnhwloop\fR" 4
+.IX Item "-mnhwloop"
+Disable generate bcnz instruction.
+.IP "\fB\-muls\fR" 4
+.IX Item "-muls"
+Enable generate unaligned load and store instruction.
+.IP "\fB\-mmac\fR" 4
+.IX Item "-mmac"
+Enable the use of multiply-accumulate instructions. Disabled by default.
+.IP "\fB\-mscore5\fR" 4
+.IX Item "-mscore5"
+Specify the \s-1SCORE5\s0 as the target architecture.
+.IP "\fB\-mscore5u\fR" 4
+.IX Item "-mscore5u"
+Specify the \s-1SCORE5U\s0 of the target architecture.
+.IP "\fB\-mscore7\fR" 4
+.IX Item "-mscore7"
+Specify the \s-1SCORE7\s0 as the target architecture. This is the default.
+.IP "\fB\-mscore7d\fR" 4
+.IX Item "-mscore7d"
+Specify the \s-1SCORE7D\s0 as the target architecture.
+.PP
+\fI\s-1SH\s0 Options\fR
+.IX Subsection "SH Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1SH\s0 implementations:
+.IP "\fB\-m1\fR" 4
+.IX Item "-m1"
+Generate code for the \s-1SH1\s0.
+.IP "\fB\-m2\fR" 4
+.IX Item "-m2"
+Generate code for the \s-1SH2\s0.
+.IP "\fB\-m2e\fR" 4
+.IX Item "-m2e"
+Generate code for the SH2e.
+.IP "\fB\-m2a\-nofpu\fR" 4
+.IX Item "-m2a-nofpu"
+Generate code for the SH2a without \s-1FPU\s0, or for a SH2a\-FPU in such a way
+that the floating-point unit is not used.
+.IP "\fB\-m2a\-single\-only\fR" 4
+.IX Item "-m2a-single-only"
+Generate code for the SH2a\-FPU, in such a way that no double-precision
+floating point operations are used.
+.IP "\fB\-m2a\-single\fR" 4
+.IX Item "-m2a-single"
+Generate code for the SH2a\-FPU assuming the floating-point unit is in
+single-precision mode by default.
+.IP "\fB\-m2a\fR" 4
+.IX Item "-m2a"
+Generate code for the SH2a\-FPU assuming the floating-point unit is in
+double-precision mode by default.
+.IP "\fB\-m3\fR" 4
+.IX Item "-m3"
+Generate code for the \s-1SH3\s0.
+.IP "\fB\-m3e\fR" 4
+.IX Item "-m3e"
+Generate code for the SH3e.
+.IP "\fB\-m4\-nofpu\fR" 4
+.IX Item "-m4-nofpu"
+Generate code for the \s-1SH4\s0 without a floating-point unit.
+.IP "\fB\-m4\-single\-only\fR" 4
+.IX Item "-m4-single-only"
+Generate code for the \s-1SH4\s0 with a floating-point unit that only
+supports single-precision arithmetic.
+.IP "\fB\-m4\-single\fR" 4
+.IX Item "-m4-single"
+Generate code for the \s-1SH4\s0 assuming the floating-point unit is in
+single-precision mode by default.
+.IP "\fB\-m4\fR" 4
+.IX Item "-m4"
+Generate code for the \s-1SH4\s0.
+.IP "\fB\-m4a\-nofpu\fR" 4
+.IX Item "-m4a-nofpu"
+Generate code for the SH4al\-dsp, or for a SH4a in such a way that the
+floating-point unit is not used.
+.IP "\fB\-m4a\-single\-only\fR" 4
+.IX Item "-m4a-single-only"
+Generate code for the SH4a, in such a way that no double-precision
+floating point operations are used.
+.IP "\fB\-m4a\-single\fR" 4
+.IX Item "-m4a-single"
+Generate code for the SH4a assuming the floating-point unit is in
+single-precision mode by default.
+.IP "\fB\-m4a\fR" 4
+.IX Item "-m4a"
+Generate code for the SH4a.
+.IP "\fB\-m4al\fR" 4
+.IX Item "-m4al"
+Same as \fB\-m4a\-nofpu\fR, except that it implicitly passes
+\&\fB\-dsp\fR to the assembler.  \s-1GCC\s0 doesn't generate any \s-1DSP\s0
+instructions at the moment.
+.IP "\fB\-mb\fR" 4
+.IX Item "-mb"
+Compile code for the processor in big endian mode.
+.IP "\fB\-ml\fR" 4
+.IX Item "-ml"
+Compile code for the processor in little endian mode.
+.IP "\fB\-mdalign\fR" 4
+.IX Item "-mdalign"
+Align doubles at 64\-bit boundaries.  Note that this changes the calling
+conventions, and thus some functions from the standard C library will
+not work unless you recompile it first with \fB\-mdalign\fR.
+.IP "\fB\-mrelax\fR" 4
+.IX Item "-mrelax"
+Shorten some address references at link time, when possible; uses the
+linker option \fB\-relax\fR.
+.IP "\fB\-mbigtable\fR" 4
+.IX Item "-mbigtable"
+Use 32\-bit offsets in \f(CW\*(C`switch\*(C'\fR tables.  The default is to use
+16\-bit offsets.
+.IP "\fB\-mbitops\fR" 4
+.IX Item "-mbitops"
+Enable the use of bit manipulation instructions on \s-1SH2A\s0.
+.IP "\fB\-mfmovd\fR" 4
+.IX Item "-mfmovd"
+Enable the use of the instruction \f(CW\*(C`fmovd\*(C'\fR.  Check \fB\-mdalign\fR for
+alignment constraints.
+.IP "\fB\-mhitachi\fR" 4
+.IX Item "-mhitachi"
+Comply with the calling conventions defined by Renesas.
+.IP "\fB\-mrenesas\fR" 4
+.IX Item "-mrenesas"
+Comply with the calling conventions defined by Renesas.
+.IP "\fB\-mno\-renesas\fR" 4
+.IX Item "-mno-renesas"
+Comply with the calling conventions defined for \s-1GCC\s0 before the Renesas
+conventions were available.  This option is the default for all
+targets of the \s-1SH\s0 toolchain except for \fBsh-symbianelf\fR.
+.IP "\fB\-mnomacsave\fR" 4
+.IX Item "-mnomacsave"
+Mark the \f(CW\*(C`MAC\*(C'\fR register as call-clobbered, even if
+\&\fB\-mhitachi\fR is given.
+.IP "\fB\-mieee\fR" 4
+.IX Item "-mieee"
+.PD 0
+.IP "\fB\-mno\-ieee\fR" 4
+.IX Item "-mno-ieee"
+.PD
+Control the \s-1IEEE\s0 compliance of floating-point comparisons, which affects the
+handling of cases where the result of a comparison is unordered.  By default
+\&\fB\-mieee\fR is implicitly enabled.  If \fB\-ffinite\-math\-only\fR is
+enabled \fB\-mno\-ieee\fR is implicitly set, which results in faster
+floating-point greater-equal and less-equal comparisons.  The implcit settings
+can be overridden by specifying either \fB\-mieee\fR or \fB\-mno\-ieee\fR.
+.IP "\fB\-minline\-ic_invalidate\fR" 4
+.IX Item "-minline-ic_invalidate"
+Inline code to invalidate instruction cache entries after setting up
+nested function trampolines.
+This option has no effect if \-musermode is in effect and the selected
+code generation option (e.g. \-m4) does not allow the use of the icbi
+instruction.
+If the selected code generation option does not allow the use of the icbi
+instruction, and \-musermode is not in effect, the inlined code will
+manipulate the instruction cache address array directly with an associative
+write.  This not only requires privileged mode, but it will also
+fail if the cache line had been mapped via the \s-1TLB\s0 and has become unmapped.
+.IP "\fB\-misize\fR" 4
+.IX Item "-misize"
+Dump instruction size and location in the assembly code.
+.IP "\fB\-mpadstruct\fR" 4
+.IX Item "-mpadstruct"
+This option is deprecated.  It pads structures to multiple of 4 bytes,
+which is incompatible with the \s-1SH\s0 \s-1ABI\s0.
+.IP "\fB\-mspace\fR" 4
+.IX Item "-mspace"
+Optimize for space instead of speed.  Implied by \fB\-Os\fR.
+.IP "\fB\-mprefergot\fR" 4
+.IX Item "-mprefergot"
+When generating position-independent code, emit function calls using
+the Global Offset Table instead of the Procedure Linkage Table.
+.IP "\fB\-musermode\fR" 4
+.IX Item "-musermode"
+Don't generate privileged mode only code; implies \-mno\-inline\-ic_invalidate
+if the inlined code would not work in user mode.
+This is the default when the target is \f(CW\*(C`sh\-*\-linux*\*(C'\fR.
+.IP "\fB\-multcost=\fR\fInumber\fR" 4
+.IX Item "-multcost=number"
+Set the cost to assume for a multiply insn.
+.IP "\fB\-mdiv=\fR\fIstrategy\fR" 4
+.IX Item "-mdiv=strategy"
+Set the division strategy to use for SHmedia code.  \fIstrategy\fR must be
+one of: call, call2, fp, inv, inv:minlat, inv20u, inv20l, inv:call,
+inv:call2, inv:fp .
+\&\*(L"fp\*(R" performs the operation in floating point.  This has a very high latency,
+but needs only a few instructions, so it might be a good choice if
+your code has enough easily exploitable \s-1ILP\s0 to allow the compiler to
+schedule the floating point instructions together with other instructions.
+Division by zero causes a floating point exception.
+\&\*(L"inv\*(R" uses integer operations to calculate the inverse of the divisor,
+and then multiplies the dividend with the inverse.  This strategy allows
+cse and hoisting of the inverse calculation.  Division by zero calculates
+an unspecified result, but does not trap.
+\&\*(L"inv:minlat\*(R" is a variant of \*(L"inv\*(R" where if no cse / hoisting opportunities
+have been found, or if the entire operation has been hoisted to the same
+place, the last stages of the inverse calculation are intertwined with the
+final multiply to reduce the overall latency, at the expense of using a few
+more instructions, and thus offering fewer scheduling opportunities with
+other code.
+\&\*(L"call\*(R" calls a library function that usually implements the inv:minlat
+strategy.
+This gives high code density for m5\-*media\-nofpu compilations.
+\&\*(L"call2\*(R" uses a different entry point of the same library function, where it
+assumes that a pointer to a lookup table has already been set up, which
+exposes the pointer load to cse / code hoisting optimizations.
+\&\*(L"inv:call\*(R", \*(L"inv:call2\*(R" and \*(L"inv:fp\*(R" all use the \*(L"inv\*(R" algorithm for initial
+code generation, but if the code stays unoptimized, revert to the \*(L"call\*(R",
+\&\*(L"call2\*(R", or \*(L"fp\*(R" strategies, respectively.  Note that the
+potentially-trapping side effect of division by zero is carried by a
+separate instruction, so it is possible that all the integer instructions
+are hoisted out, but the marker for the side effect stays where it is.
+A recombination to fp operations or a call is not possible in that case.
+\&\*(L"inv20u\*(R" and \*(L"inv20l\*(R" are variants of the \*(L"inv:minlat\*(R" strategy.  In the case
+that the inverse calculation was nor separated from the multiply, they speed
+up division where the dividend fits into 20 bits (plus sign where applicable),
+by inserting a test to skip a number of operations in this case; this test
+slows down the case of larger dividends.  inv20u assumes the case of a such
+a small dividend to be unlikely, and inv20l assumes it to be likely.
+.IP "\fB\-maccumulate\-outgoing\-args\fR" 4
+.IX Item "-maccumulate-outgoing-args"
+Reserve space once for outgoing arguments in the function prologue rather 
+than around each call.  Generally beneficial for performance and size.  Also
+needed for unwinding to avoid changing the stack frame around conditional code.
+.IP "\fB\-mdivsi3_libfunc=\fR\fIname\fR" 4
+.IX Item "-mdivsi3_libfunc=name"
+Set the name of the library function used for 32 bit signed division to
+\&\fIname\fR.  This only affect the name used in the call and inv:call
+division strategies, and the compiler will still expect the same
+sets of input/output/clobbered registers as if this option was not present.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use.  This is
+useful when compiling kernel code.  A register range is specified as
+two registers separated by a dash.  Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-madjust\-unroll\fR" 4
+.IX Item "-madjust-unroll"
+Throttle unrolling to avoid thrashing target registers.
+This option only has an effect if the gcc code base supports the
+\&\s-1TARGET_ADJUST_UNROLL_MAX\s0 target hook.
+.IP "\fB\-mindexed\-addressing\fR" 4
+.IX Item "-mindexed-addressing"
+Enable the use of the indexed addressing mode for SHmedia32/SHcompact.
+This is only safe if the hardware and/or \s-1OS\s0 implement 32 bit wrap-around
+semantics for the indexed addressing mode.  The architecture allows the
+implementation of processors with 64 bit \s-1MMU\s0, which the \s-1OS\s0 could use to
+get 32 bit addressing, but since no current hardware implementation supports
+this or any other way to make the indexed addressing mode safe to use in
+the 32 bit \s-1ABI\s0, the default is \-mno\-indexed\-addressing.
+.IP "\fB\-mgettrcost=\fR\fInumber\fR" 4
+.IX Item "-mgettrcost=number"
+Set the cost assumed for the gettr instruction to \fInumber\fR.
+The default is 2 if \fB\-mpt\-fixed\fR is in effect, 100 otherwise.
+.IP "\fB\-mpt\-fixed\fR" 4
+.IX Item "-mpt-fixed"
+Assume pt* instructions won't trap.  This will generally generate better
+scheduled code, but is unsafe on current hardware.  The current architecture
+definition says that ptabs and ptrel trap when the target anded with 3 is 3.
+This has the unintentional effect of making it unsafe to schedule ptabs /
+ptrel before a branch, or hoist it out of a loop.  For example,
+_\|_do_global_ctors, a part of libgcc that runs constructors at program
+startup, calls functions in a list which is delimited by \-1.  With the
+\&\-mpt\-fixed option, the ptabs will be done before testing against \-1.
+That means that all the constructors will be run a bit quicker, but when
+the loop comes to the end of the list, the program crashes because ptabs
+loads \-1 into a target register.  Since this option is unsafe for any
+hardware implementing the current architecture specification, the default
+is \-mno\-pt\-fixed.  Unless the user specifies a specific cost with
+\&\fB\-mgettrcost\fR, \-mno\-pt\-fixed also implies \fB\-mgettrcost=100\fR;
+this deters register allocation using target registers for storing
+ordinary integers.
+.IP "\fB\-minvalid\-symbols\fR" 4
+.IX Item "-minvalid-symbols"
+Assume symbols might be invalid.  Ordinary function symbols generated by
+the compiler will always be valid to load with movi/shori/ptabs or
+movi/shori/ptrel, but with assembler and/or linker tricks it is possible
+to generate symbols that will cause ptabs / ptrel to trap.
+This option is only meaningful when \fB\-mno\-pt\-fixed\fR is in effect.
+It will then prevent cross-basic-block cse, hoisting and most scheduling
+of symbol loads.  The default is \fB\-mno\-invalid\-symbols\fR.
+.PP
+\fISolaris 2 Options\fR
+.IX Subsection "Solaris 2 Options"
+.PP
+These \fB\-m\fR options are supported on Solaris 2:
+.IP "\fB\-mimpure\-text\fR" 4
+.IX Item "-mimpure-text"
+\&\fB\-mimpure\-text\fR, used in addition to \fB\-shared\fR, tells
+the compiler to not pass \fB\-z text\fR to the linker when linking a
+shared object.  Using this option, you can link position-dependent
+code into a shared object.
+.Sp
+\&\fB\-mimpure\-text\fR suppresses the \*(L"relocations remain against
+allocatable but non-writable sections\*(R" linker error message.
+However, the necessary relocations will trigger copy-on-write, and the
+shared object is not actually shared across processes.  Instead of
+using \fB\-mimpure\-text\fR, you should compile all source code with
+\&\fB\-fpic\fR or \fB\-fPIC\fR.
+.PP
+These switches are supported in addition to the above on Solaris 2:
+.IP "\fB\-threads\fR" 4
+.IX Item "-threads"
+Add support for multithreading using the Solaris threads library.  This
+option sets flags for both the preprocessor and linker.  This option does
+not affect the thread safety of object code produced by the compiler or
+that of libraries supplied with it.
+.IP "\fB\-pthreads\fR" 4
+.IX Item "-pthreads"
+Add support for multithreading using the \s-1POSIX\s0 threads library.  This
+option sets flags for both the preprocessor and linker.  This option does
+not affect the thread safety of object code produced  by the compiler or
+that of libraries supplied with it.
+.IP "\fB\-pthread\fR" 4
+.IX Item "-pthread"
+This is a synonym for \fB\-pthreads\fR.
+.PP
+\fI\s-1SPARC\s0 Options\fR
+.IX Subsection "SPARC Options"
+.PP
+These \fB\-m\fR options are supported on the \s-1SPARC:\s0
+.IP "\fB\-mno\-app\-regs\fR" 4
+.IX Item "-mno-app-regs"
+.PD 0
+.IP "\fB\-mapp\-regs\fR" 4
+.IX Item "-mapp-regs"
+.PD
+Specify \fB\-mapp\-regs\fR to generate output using the global registers
+2 through 4, which the \s-1SPARC\s0 \s-1SVR4\s0 \s-1ABI\s0 reserves for applications.  This
+is the default.
+.Sp
+To be fully \s-1SVR4\s0 \s-1ABI\s0 compliant at the cost of some performance loss,
+specify \fB\-mno\-app\-regs\fR.  You should compile libraries and system
+software with this option.
+.IP "\fB\-mfpu\fR" 4
+.IX Item "-mfpu"
+.PD 0
+.IP "\fB\-mhard\-float\fR" 4
+.IX Item "-mhard-float"
+.PD
+Generate output containing floating point instructions.  This is the
+default.
+.IP "\fB\-mno\-fpu\fR" 4
+.IX Item "-mno-fpu"
+.PD 0
+.IP "\fB\-msoft\-float\fR" 4
+.IX Item "-msoft-float"
+.PD
+Generate output containing library calls for floating point.
+\&\fBWarning:\fR the requisite libraries are not available for all \s-1SPARC\s0
+targets.  Normally the facilities of the machine's usual C compiler are
+used, but this cannot be done directly in cross-compilation.  You must make
+your own arrangements to provide suitable library functions for
+cross-compilation.  The embedded targets \fBsparc\-*\-aout\fR and
+\&\fBsparclite\-*\-*\fR do provide software floating point support.
+.Sp
+\&\fB\-msoft\-float\fR changes the calling convention in the output file;
+therefore, it is only useful if you compile \fIall\fR of a program with
+this option.  In particular, you need to compile \fIlibgcc.a\fR, the
+library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
+this to work.
+.IP "\fB\-mhard\-quad\-float\fR" 4
+.IX Item "-mhard-quad-float"
+Generate output containing quad-word (long double) floating point
+instructions.
+.IP "\fB\-msoft\-quad\-float\fR" 4
+.IX Item "-msoft-quad-float"
+Generate output containing library calls for quad-word (long double)
+floating point instructions.  The functions called are those specified
+in the \s-1SPARC\s0 \s-1ABI\s0.  This is the default.
+.Sp
+As of this writing, there are no \s-1SPARC\s0 implementations that have hardware
+support for the quad-word floating point instructions.  They all invoke
+a trap handler for one of these instructions, and then the trap handler
+emulates the effect of the instruction.  Because of the trap handler overhead,
+this is much slower than calling the \s-1ABI\s0 library routines.  Thus the
+\&\fB\-msoft\-quad\-float\fR option is the default.
+.IP "\fB\-mno\-unaligned\-doubles\fR" 4
+.IX Item "-mno-unaligned-doubles"
+.PD 0
+.IP "\fB\-munaligned\-doubles\fR" 4
+.IX Item "-munaligned-doubles"
+.PD
+Assume that doubles have 8 byte alignment.  This is the default.
+.Sp
+With \fB\-munaligned\-doubles\fR, \s-1GCC\s0 assumes that doubles have 8 byte
+alignment only if they are contained in another type, or if they have an
+absolute address.  Otherwise, it assumes they have 4 byte alignment.
+Specifying this option avoids some rare compatibility problems with code
+generated by other compilers.  It is not the default because it results
+in a performance loss, especially for floating point code.
+.IP "\fB\-mno\-faster\-structs\fR" 4
+.IX Item "-mno-faster-structs"
+.PD 0
+.IP "\fB\-mfaster\-structs\fR" 4
+.IX Item "-mfaster-structs"
+.PD
+With \fB\-mfaster\-structs\fR, the compiler assumes that structures
+should have 8 byte alignment.  This enables the use of pairs of
+\&\f(CW\*(C`ldd\*(C'\fR and \f(CW\*(C`std\*(C'\fR instructions for copies in structure
+assignment, in place of twice as many \f(CW\*(C`ld\*(C'\fR and \f(CW\*(C`st\*(C'\fR pairs.
+However, the use of this changed alignment directly violates the \s-1SPARC\s0
+\&\s-1ABI\s0.  Thus, it's intended only for use on targets where the developer
+acknowledges that their resulting code will not be directly in line with
+the rules of the \s-1ABI\s0.
+.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
+.IX Item "-mcpu=cpu_type"
+Set the instruction set, register set, and instruction scheduling parameters
+for machine type \fIcpu_type\fR.  Supported values for \fIcpu_type\fR are
+\&\fBv7\fR, \fBcypress\fR, \fBv8\fR, \fBsupersparc\fR, \fBhypersparc\fR,
+\&\fBleon\fR, \fBsparclite\fR, \fBf930\fR, \fBf934\fR, \fBsparclite86x\fR,
+\&\fBsparclet\fR, \fBtsc701\fR, \fBv9\fR, \fBultrasparc\fR,
+\&\fBultrasparc3\fR, \fBniagara\fR and \fBniagara2\fR.
+.Sp
+Default instruction scheduling parameters are used for values that select
+an architecture and not an implementation.  These are \fBv7\fR, \fBv8\fR,
+\&\fBsparclite\fR, \fBsparclet\fR, \fBv9\fR.
+.Sp
+Here is a list of each supported architecture and their supported
+implementations.
+.Sp
+.Vb 5
+\&            v7:             cypress
+\&            v8:             supersparc, hypersparc, leon
+\&            sparclite:      f930, f934, sparclite86x
+\&            sparclet:       tsc701
+\&            v9:             ultrasparc, ultrasparc3, niagara, niagara2
+.Ve
+.Sp
+By default (unless configured otherwise), \s-1GCC\s0 generates code for the V7
+variant of the \s-1SPARC\s0 architecture.  With \fB\-mcpu=cypress\fR, the compiler
+additionally optimizes it for the Cypress \s-1CY7C602\s0 chip, as used in the
+SPARCStation/SPARCServer 3xx series.  This is also appropriate for the older
+SPARCStation 1, 2, \s-1IPX\s0 etc.
+.Sp
+With \fB\-mcpu=v8\fR, \s-1GCC\s0 generates code for the V8 variant of the \s-1SPARC\s0
+architecture.  The only difference from V7 code is that the compiler emits
+the integer multiply and integer divide instructions which exist in \s-1SPARC\-V8\s0
+but not in \s-1SPARC\-V7\s0.  With \fB\-mcpu=supersparc\fR, the compiler additionally
+optimizes it for the SuperSPARC chip, as used in the SPARCStation 10, 1000 and
+2000 series.
+.Sp
+With \fB\-mcpu=sparclite\fR, \s-1GCC\s0 generates code for the SPARClite variant of
+the \s-1SPARC\s0 architecture.  This adds the integer multiply, integer divide step
+and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClite but not in \s-1SPARC\-V7\s0.
+With \fB\-mcpu=f930\fR, the compiler additionally optimizes it for the
+Fujitsu \s-1MB86930\s0 chip, which is the original SPARClite, with no \s-1FPU\s0.  With
+\&\fB\-mcpu=f934\fR, the compiler additionally optimizes it for the Fujitsu
+\&\s-1MB86934\s0 chip, which is the more recent SPARClite with \s-1FPU\s0.
+.Sp
+With \fB\-mcpu=sparclet\fR, \s-1GCC\s0 generates code for the SPARClet variant of
+the \s-1SPARC\s0 architecture.  This adds the integer multiply, multiply/accumulate,
+integer divide step and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClet
+but not in \s-1SPARC\-V7\s0.  With \fB\-mcpu=tsc701\fR, the compiler additionally
+optimizes it for the \s-1TEMIC\s0 SPARClet chip.
+.Sp
+With \fB\-mcpu=v9\fR, \s-1GCC\s0 generates code for the V9 variant of the \s-1SPARC\s0
+architecture.  This adds 64\-bit integer and floating-point move instructions,
+3 additional floating-point condition code registers and conditional move
+instructions.  With \fB\-mcpu=ultrasparc\fR, the compiler additionally
+optimizes it for the Sun UltraSPARC I/II/IIi chips.  With
+\&\fB\-mcpu=ultrasparc3\fR, the compiler additionally optimizes it for the
+Sun UltraSPARC III/III+/IIIi/IIIi+/IV/IV+ chips.  With
+\&\fB\-mcpu=niagara\fR, the compiler additionally optimizes it for
+Sun UltraSPARC T1 chips.  With \fB\-mcpu=niagara2\fR, the compiler
+additionally optimizes it for Sun UltraSPARC T2 chips.
+.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
+.IX Item "-mtune=cpu_type"
+Set the instruction scheduling parameters for machine type
+\&\fIcpu_type\fR, but do not set the instruction set or register set that the
+option \fB\-mcpu=\fR\fIcpu_type\fR would.
+.Sp
+The same values for \fB\-mcpu=\fR\fIcpu_type\fR can be used for
+\&\fB\-mtune=\fR\fIcpu_type\fR, but the only useful values are those
+that select a particular \s-1CPU\s0 implementation.  Those are \fBcypress\fR,
+\&\fBsupersparc\fR, \fBhypersparc\fR, \fBleon\fR, \fBf930\fR, \fBf934\fR,
+\&\fBsparclite86x\fR, \fBtsc701\fR, \fBultrasparc\fR, \fBultrasparc3\fR,
+\&\fBniagara\fR, and \fBniagara2\fR.
+.IP "\fB\-mv8plus\fR" 4
+.IX Item "-mv8plus"
+.PD 0
+.IP "\fB\-mno\-v8plus\fR" 4
+.IX Item "-mno-v8plus"
+.PD
+With \fB\-mv8plus\fR, \s-1GCC\s0 generates code for the \s-1SPARC\-V8+\s0 \s-1ABI\s0.  The
+difference from the V8 \s-1ABI\s0 is that the global and out registers are
+considered 64\-bit wide.  This is enabled by default on Solaris in 32\-bit
+mode for all \s-1SPARC\-V9\s0 processors.
+.IP "\fB\-mvis\fR" 4
+.IX Item "-mvis"
+.PD 0
+.IP "\fB\-mno\-vis\fR" 4
+.IX Item "-mno-vis"
+.PD
+With \fB\-mvis\fR, \s-1GCC\s0 generates code that takes advantage of the UltraSPARC
+Visual Instruction Set extensions.  The default is \fB\-mno\-vis\fR.
+.IP "\fB\-mfix\-at697f\fR" 4
+.IX Item "-mfix-at697f"
+Enable the documented workaround for the single erratum of the Atmel \s-1AT697F\s0
+processor (which corresponds to erratum #13 of the \s-1AT697E\s0 processor).
+.PP
+These \fB\-m\fR options are supported in addition to the above
+on \s-1SPARC\-V9\s0 processors in 64\-bit environments:
+.IP "\fB\-mlittle\-endian\fR" 4
+.IX Item "-mlittle-endian"
+Generate code for a processor running in little-endian mode.  It is only
+available for a few configurations and most notably not on Solaris and Linux.
+.IP "\fB\-m32\fR" 4
+.IX Item "-m32"
+.PD 0
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD
+Generate code for a 32\-bit or 64\-bit environment.
+The 32\-bit environment sets int, long and pointer to 32 bits.
+The 64\-bit environment sets int to 32 bits and long and pointer
+to 64 bits.
+.IP "\fB\-mcmodel=medlow\fR" 4
+.IX Item "-mcmodel=medlow"
+Generate code for the Medium/Low code model: 64\-bit addresses, programs
+must be linked in the low 32 bits of memory.  Programs can be statically
+or dynamically linked.
+.IP "\fB\-mcmodel=medmid\fR" 4
+.IX Item "-mcmodel=medmid"
+Generate code for the Medium/Middle code model: 64\-bit addresses, programs
+must be linked in the low 44 bits of memory, the text and data segments must
+be less than 2GB in size and the data segment must be located within 2GB of
+the text segment.
+.IP "\fB\-mcmodel=medany\fR" 4
+.IX Item "-mcmodel=medany"
+Generate code for the Medium/Anywhere code model: 64\-bit addresses, programs
+may be linked anywhere in memory, the text and data segments must be less
+than 2GB in size and the data segment must be located within 2GB of the
+text segment.
+.IP "\fB\-mcmodel=embmedany\fR" 4
+.IX Item "-mcmodel=embmedany"
+Generate code for the Medium/Anywhere code model for embedded systems:
+64\-bit addresses, the text and data segments must be less than 2GB in
+size, both starting anywhere in memory (determined at link time).  The
+global register \f(CW%g4\fR points to the base of the data segment.  Programs
+are statically linked and \s-1PIC\s0 is not supported.
+.IP "\fB\-mstack\-bias\fR" 4
+.IX Item "-mstack-bias"
+.PD 0
+.IP "\fB\-mno\-stack\-bias\fR" 4
+.IX Item "-mno-stack-bias"
+.PD
+With \fB\-mstack\-bias\fR, \s-1GCC\s0 assumes that the stack pointer, and
+frame pointer if present, are offset by \-2047 which must be added back
+when making stack frame references.  This is the default in 64\-bit mode.
+Otherwise, assume no such offset is present.
+.PP
+\fI\s-1SPU\s0 Options\fR
+.IX Subsection "SPU Options"
+.PP
+These \fB\-m\fR options are supported on the \s-1SPU:\s0
+.IP "\fB\-mwarn\-reloc\fR" 4
+.IX Item "-mwarn-reloc"
+.PD 0
+.IP "\fB\-merror\-reloc\fR" 4
+.IX Item "-merror-reloc"
+.PD
+The loader for \s-1SPU\s0 does not handle dynamic relocations.  By default, \s-1GCC\s0
+will give an error when it generates code that requires a dynamic
+relocation.  \fB\-mno\-error\-reloc\fR disables the error,
+\&\fB\-mwarn\-reloc\fR will generate a warning instead.
+.IP "\fB\-msafe\-dma\fR" 4
+.IX Item "-msafe-dma"
+.PD 0
+.IP "\fB\-munsafe\-dma\fR" 4
+.IX Item "-munsafe-dma"
+.PD
+Instructions which initiate or test completion of \s-1DMA\s0 must not be
+reordered with respect to loads and stores of the memory which is being
+accessed.  Users typically address this problem using the volatile
+keyword, but that can lead to inefficient code in places where the
+memory is known to not change.  Rather than mark the memory as volatile
+we treat the \s-1DMA\s0 instructions as potentially effecting all memory.  With
+\&\fB\-munsafe\-dma\fR users must use the volatile keyword to protect
+memory accesses.
+.IP "\fB\-mbranch\-hints\fR" 4
+.IX Item "-mbranch-hints"
+By default, \s-1GCC\s0 will generate a branch hint instruction to avoid
+pipeline stalls for always taken or probably taken branches.  A hint
+will not be generated closer than 8 instructions away from its branch.
+There is little reason to disable them, except for debugging purposes,
+or to make an object a little bit smaller.
+.IP "\fB\-msmall\-mem\fR" 4
+.IX Item "-msmall-mem"
+.PD 0
+.IP "\fB\-mlarge\-mem\fR" 4
+.IX Item "-mlarge-mem"
+.PD
+By default, \s-1GCC\s0 generates code assuming that addresses are never larger
+than 18 bits.  With \fB\-mlarge\-mem\fR code is generated that assumes
+a full 32 bit address.
+.IP "\fB\-mstdmain\fR" 4
+.IX Item "-mstdmain"
+By default, \s-1GCC\s0 links against startup code that assumes the SPU-style
+main function interface (which has an unconventional parameter list).
+With \fB\-mstdmain\fR, \s-1GCC\s0 will link your program against startup
+code that assumes a C99\-style interface to \f(CW\*(C`main\*(C'\fR, including a
+local copy of \f(CW\*(C`argv\*(C'\fR strings.
+.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
+.IX Item "-mfixed-range=register-range"
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use.  This is
+useful when compiling kernel code.  A register range is specified as
+two registers separated by a dash.  Multiple register ranges can be
+specified separated by a comma.
+.IP "\fB\-mea32\fR" 4
+.IX Item "-mea32"
+.PD 0
+.IP "\fB\-mea64\fR" 4
+.IX Item "-mea64"
+.PD
+Compile code assuming that pointers to the \s-1PPU\s0 address space accessed
+via the \f(CW\*(C`_\|_ea\*(C'\fR named address space qualifier are either 32 or 64
+bits wide.  The default is 32 bits.  As this is an \s-1ABI\s0 changing option,
+all object code in an executable must be compiled with the same setting.
+.IP "\fB\-maddress\-space\-conversion\fR" 4
+.IX Item "-maddress-space-conversion"
+.PD 0
+.IP "\fB\-mno\-address\-space\-conversion\fR" 4
+.IX Item "-mno-address-space-conversion"
+.PD
+Allow/disallow treating the \f(CW\*(C`_\|_ea\*(C'\fR address space as superset
+of the generic address space.  This enables explicit type casts
+between \f(CW\*(C`_\|_ea\*(C'\fR and generic pointer as well as implicit
+conversions of generic pointers to \f(CW\*(C`_\|_ea\*(C'\fR pointers.  The
+default is to allow address space pointer conversions.
+.IP "\fB\-mcache\-size=\fR\fIcache-size\fR" 4
+.IX Item "-mcache-size=cache-size"
+This option controls the version of libgcc that the compiler links to an
+executable and selects a software-managed cache for accessing variables
+in the \f(CW\*(C`_\|_ea\*(C'\fR address space with a particular cache size.  Possible
+options for \fIcache-size\fR are \fB8\fR, \fB16\fR, \fB32\fR, \fB64\fR
+and \fB128\fR.  The default cache size is 64KB.
+.IP "\fB\-matomic\-updates\fR" 4
+.IX Item "-matomic-updates"
+.PD 0
+.IP "\fB\-mno\-atomic\-updates\fR" 4
+.IX Item "-mno-atomic-updates"
+.PD
+This option controls the version of libgcc that the compiler links to an
+executable and selects whether atomic updates to the software-managed
+cache of PPU-side variables are used.  If you use atomic updates, changes
+to a \s-1PPU\s0 variable from \s-1SPU\s0 code using the \f(CW\*(C`_\|_ea\*(C'\fR named address space
+qualifier will not interfere with changes to other \s-1PPU\s0 variables residing
+in the same cache line from \s-1PPU\s0 code.  If you do not use atomic updates,
+such interference may occur; however, writing back cache lines will be
+more efficient.  The default behavior is to use atomic updates.
+.IP "\fB\-mdual\-nops\fR" 4
+.IX Item "-mdual-nops"
+.PD 0
+.IP "\fB\-mdual\-nops=\fR\fIn\fR" 4
+.IX Item "-mdual-nops=n"
+.PD
+By default, \s-1GCC\s0 will insert nops to increase dual issue when it expects
+it to increase performance.  \fIn\fR can be a value from 0 to 10.  A
+smaller \fIn\fR will insert fewer nops.  10 is the default, 0 is the
+same as \fB\-mno\-dual\-nops\fR.  Disabled with \fB\-Os\fR.
+.IP "\fB\-mhint\-max\-nops=\fR\fIn\fR" 4
+.IX Item "-mhint-max-nops=n"
+Maximum number of nops to insert for a branch hint.  A branch hint must
+be at least 8 instructions away from the branch it is effecting.  \s-1GCC\s0
+will insert up to \fIn\fR nops to enforce this, otherwise it will not
+generate the branch hint.
+.IP "\fB\-mhint\-max\-distance=\fR\fIn\fR" 4
+.IX Item "-mhint-max-distance=n"
+The encoding of the branch hint instruction limits the hint to be within
+256 instructions of the branch it is effecting.  By default, \s-1GCC\s0 makes
+sure it is within 125.
+.IP "\fB\-msafe\-hints\fR" 4
+.IX Item "-msafe-hints"
+Work around a hardware bug which causes the \s-1SPU\s0 to stall indefinitely.
+By default, \s-1GCC\s0 will insert the \f(CW\*(C`hbrp\*(C'\fR instruction to make sure
+this stall won't happen.
+.PP
+\fIOptions for System V\fR
+.IX Subsection "Options for System V"
+.PP
+These additional options are available on System V Release 4 for
+compatibility with other compilers on those systems:
+.IP "\fB\-G\fR" 4
+.IX Item "-G"
+Create a shared object.
+It is recommended that \fB\-symbolic\fR or \fB\-shared\fR be used instead.
+.IP "\fB\-Qy\fR" 4
+.IX Item "-Qy"
+Identify the versions of each tool used by the compiler, in a
+\&\f(CW\*(C`.ident\*(C'\fR assembler directive in the output.
+.IP "\fB\-Qn\fR" 4
+.IX Item "-Qn"
+Refrain from adding \f(CW\*(C`.ident\*(C'\fR directives to the output file (this is
+the default).
+.IP "\fB\-YP,\fR\fIdirs\fR" 4
+.IX Item "-YP,dirs"
+Search the directories \fIdirs\fR, and no others, for libraries
+specified with \fB\-l\fR.
+.IP "\fB\-Ym,\fR\fIdir\fR" 4
+.IX Item "-Ym,dir"
+Look in the directory \fIdir\fR to find the M4 preprocessor.
+The assembler uses this option.
+.PP
+\fIV850 Options\fR
+.IX Subsection "V850 Options"
+.PP
+These \fB\-m\fR options are defined for V850 implementations:
+.IP "\fB\-mlong\-calls\fR" 4
+.IX Item "-mlong-calls"
+.PD 0
+.IP "\fB\-mno\-long\-calls\fR" 4
+.IX Item "-mno-long-calls"
+.PD
+Treat all calls as being far away (near).  If calls are assumed to be
+far away, the compiler will always load the functions address up into a
+register, and call indirect through the pointer.
+.IP "\fB\-mno\-ep\fR" 4
+.IX Item "-mno-ep"
+.PD 0
+.IP "\fB\-mep\fR" 4
+.IX Item "-mep"
+.PD
+Do not optimize (do optimize) basic blocks that use the same index
+pointer 4 or more times to copy pointer into the \f(CW\*(C`ep\*(C'\fR register, and
+use the shorter \f(CW\*(C`sld\*(C'\fR and \f(CW\*(C`sst\*(C'\fR instructions.  The \fB\-mep\fR
+option is on by default if you optimize.
+.IP "\fB\-mno\-prolog\-function\fR" 4
+.IX Item "-mno-prolog-function"
+.PD 0
+.IP "\fB\-mprolog\-function\fR" 4
+.IX Item "-mprolog-function"
+.PD
+Do not use (do use) external functions to save and restore registers
+at the prologue and epilogue of a function.  The external functions
+are slower, but use less code space if more than one function saves
+the same number of registers.  The \fB\-mprolog\-function\fR option
+is on by default if you optimize.
+.IP "\fB\-mspace\fR" 4
+.IX Item "-mspace"
+Try to make the code as small as possible.  At present, this just turns
+on the \fB\-mep\fR and \fB\-mprolog\-function\fR options.
+.IP "\fB\-mtda=\fR\fIn\fR" 4
+.IX Item "-mtda=n"
+Put static or global variables whose size is \fIn\fR bytes or less into
+the tiny data area that register \f(CW\*(C`ep\*(C'\fR points to.  The tiny data
+area can hold up to 256 bytes in total (128 bytes for byte references).
+.IP "\fB\-msda=\fR\fIn\fR" 4
+.IX Item "-msda=n"
+Put static or global variables whose size is \fIn\fR bytes or less into
+the small data area that register \f(CW\*(C`gp\*(C'\fR points to.  The small data
+area can hold up to 64 kilobytes.
+.IP "\fB\-mzda=\fR\fIn\fR" 4
+.IX Item "-mzda=n"
+Put static or global variables whose size is \fIn\fR bytes or less into
+the first 32 kilobytes of memory.
+.IP "\fB\-mv850\fR" 4
+.IX Item "-mv850"
+Specify that the target processor is the V850.
+.IP "\fB\-mbig\-switch\fR" 4
+.IX Item "-mbig-switch"
+Generate code suitable for big switch tables.  Use this option only if
+the assembler/linker complain about out of range branches within a switch
+table.
+.IP "\fB\-mapp\-regs\fR" 4
+.IX Item "-mapp-regs"
+This option will cause r2 and r5 to be used in the code generated by
+the compiler.  This setting is the default.
+.IP "\fB\-mno\-app\-regs\fR" 4
+.IX Item "-mno-app-regs"
+This option will cause r2 and r5 to be treated as fixed registers.
+.IP "\fB\-mv850e2v3\fR" 4
+.IX Item "-mv850e2v3"
+Specify that the target processor is the V850E2V3.  The preprocessor
+constants \fB_\|_v850e2v3_\|_\fR will be defined if
+this option is used.
+.IP "\fB\-mv850e2\fR" 4
+.IX Item "-mv850e2"
+Specify that the target processor is the V850E2.  The preprocessor
+constants \fB_\|_v850e2_\|_\fR will be defined if
+.IP "\fB\-mv850e1\fR" 4
+.IX Item "-mv850e1"
+Specify that the target processor is the V850E1.  The preprocessor
+constants \fB_\|_v850e1_\|_\fR and \fB_\|_v850e_\|_\fR will be defined if
+.IP "\fB\-mv850es\fR" 4
+.IX Item "-mv850es"
+Specify that the target processor is the V850ES.  This is an alias for
+the \fB\-mv850e1\fR option.
+.IP "\fB\-mv850e\fR" 4
+.IX Item "-mv850e"
+Specify that the target processor is the V850E.  The preprocessor
+constant \fB_\|_v850e_\|_\fR will be defined if this option is used.
+.Sp
+If neither \fB\-mv850\fR nor \fB\-mv850e\fR nor \fB\-mv850e1\fR
+nor \fB\-mv850e2\fR nor \fB\-mv850e2v3\fR
+are defined then a default target processor will be chosen and the
+relevant \fB_\|_v850*_\|_\fR preprocessor constant will be defined.
+.Sp
+The preprocessor constants \fB_\|_v850\fR and \fB_\|_v851_\|_\fR are always
+defined, regardless of which processor variant is the target.
+.IP "\fB\-mdisable\-callt\fR" 4
+.IX Item "-mdisable-callt"
+This option will suppress generation of the \s-1CALLT\s0 instruction for the
+v850e, v850e1, v850e2 and v850e2v3 flavors of the v850 architecture.  The default is
+\&\fB\-mno\-disable\-callt\fR which allows the \s-1CALLT\s0 instruction to be used.
+.PP
+\fI\s-1VAX\s0 Options\fR
+.IX Subsection "VAX Options"
+.PP
+These \fB\-m\fR options are defined for the \s-1VAX:\s0
+.IP "\fB\-munix\fR" 4
+.IX Item "-munix"
+Do not output certain jump instructions (\f(CW\*(C`aobleq\*(C'\fR and so on)
+that the Unix assembler for the \s-1VAX\s0 cannot handle across long
+ranges.
+.IP "\fB\-mgnu\fR" 4
+.IX Item "-mgnu"
+Do output those jump instructions, on the assumption that you
+will assemble with the \s-1GNU\s0 assembler.
+.IP "\fB\-mg\fR" 4
+.IX Item "-mg"
+Output code for g\-format floating point numbers instead of d\-format.
+.PP
+\fIVxWorks Options\fR
+.IX Subsection "VxWorks Options"
+.PP
+The options in this section are defined for all VxWorks targets.
+Options specific to the target hardware are listed with the other
+options for that target.
+.IP "\fB\-mrtp\fR" 4
+.IX Item "-mrtp"
+\&\s-1GCC\s0 can generate code for both VxWorks kernels and real time processes
+(RTPs).  This option switches from the former to the latter.  It also
+defines the preprocessor macro \f(CW\*(C`_\|_RTP_\|_\*(C'\fR.
+.IP "\fB\-non\-static\fR" 4
+.IX Item "-non-static"
+Link an \s-1RTP\s0 executable against shared libraries rather than static
+libraries.  The options \fB\-static\fR and \fB\-shared\fR can
+also be used for RTPs; \fB\-static\fR
+is the default.
+.IP "\fB\-Bstatic\fR" 4
+.IX Item "-Bstatic"
+.PD 0
+.IP "\fB\-Bdynamic\fR" 4
+.IX Item "-Bdynamic"
+.PD
+These options are passed down to the linker.  They are defined for
+compatibility with Diab.
+.IP "\fB\-Xbind\-lazy\fR" 4
+.IX Item "-Xbind-lazy"
+Enable lazy binding of function calls.  This option is equivalent to
+\&\fB\-Wl,\-z,now\fR and is defined for compatibility with Diab.
+.IP "\fB\-Xbind\-now\fR" 4
+.IX Item "-Xbind-now"
+Disable lazy binding of function calls.  This option is the default and
+is defined for compatibility with Diab.
+.PP
+\fIx86\-64 Options\fR
+.IX Subsection "x86-64 Options"
+.PP
+These are listed under
+.PP
+\fIXstormy16 Options\fR
+.IX Subsection "Xstormy16 Options"
+.PP
+These options are defined for Xstormy16:
+.IP "\fB\-msim\fR" 4
+.IX Item "-msim"
+Choose startup files and linker script suitable for the simulator.
+.PP
+\fIXtensa Options\fR
+.IX Subsection "Xtensa Options"
+.PP
+These options are supported for Xtensa targets:
+.IP "\fB\-mconst16\fR" 4
+.IX Item "-mconst16"
+.PD 0
+.IP "\fB\-mno\-const16\fR" 4
+.IX Item "-mno-const16"
+.PD
+Enable or disable use of \f(CW\*(C`CONST16\*(C'\fR instructions for loading
+constant values.  The \f(CW\*(C`CONST16\*(C'\fR instruction is currently not a
+standard option from Tensilica.  When enabled, \f(CW\*(C`CONST16\*(C'\fR
+instructions are always used in place of the standard \f(CW\*(C`L32R\*(C'\fR
+instructions.  The use of \f(CW\*(C`CONST16\*(C'\fR is enabled by default only if
+the \f(CW\*(C`L32R\*(C'\fR instruction is not available.
+.IP "\fB\-mfused\-madd\fR" 4
+.IX Item "-mfused-madd"
+.PD 0
+.IP "\fB\-mno\-fused\-madd\fR" 4
+.IX Item "-mno-fused-madd"
+.PD
+Enable or disable use of fused multiply/add and multiply/subtract
+instructions in the floating-point option.  This has no effect if the
+floating-point option is not also enabled.  Disabling fused multiply/add
+and multiply/subtract instructions forces the compiler to use separate
+instructions for the multiply and add/subtract operations.  This may be
+desirable in some cases where strict \s-1IEEE\s0 754\-compliant results are
+required: the fused multiply add/subtract instructions do not round the
+intermediate result, thereby producing results with \fImore\fR bits of
+precision than specified by the \s-1IEEE\s0 standard.  Disabling fused multiply
+add/subtract instructions also ensures that the program output is not
+sensitive to the compiler's ability to combine multiply and add/subtract
+operations.
+.IP "\fB\-mserialize\-volatile\fR" 4
+.IX Item "-mserialize-volatile"
+.PD 0
+.IP "\fB\-mno\-serialize\-volatile\fR" 4
+.IX Item "-mno-serialize-volatile"
+.PD
+When this option is enabled, \s-1GCC\s0 inserts \f(CW\*(C`MEMW\*(C'\fR instructions before
+\&\f(CW\*(C`volatile\*(C'\fR memory references to guarantee sequential consistency.
+The default is \fB\-mserialize\-volatile\fR.  Use
+\&\fB\-mno\-serialize\-volatile\fR to omit the \f(CW\*(C`MEMW\*(C'\fR instructions.
+.IP "\fB\-mforce\-no\-pic\fR" 4
+.IX Item "-mforce-no-pic"
+For targets, like GNU/Linux, where all user-mode Xtensa code must be
+position-independent code (\s-1PIC\s0), this option disables \s-1PIC\s0 for compiling
+kernel code.
+.IP "\fB\-mtext\-section\-literals\fR" 4
+.IX Item "-mtext-section-literals"
+.PD 0
+.IP "\fB\-mno\-text\-section\-literals\fR" 4
+.IX Item "-mno-text-section-literals"
+.PD
+Control the treatment of literal pools.  The default is
+\&\fB\-mno\-text\-section\-literals\fR, which places literals in a separate
+section in the output file.  This allows the literal pool to be placed
+in a data \s-1RAM/ROM\s0, and it also allows the linker to combine literal
+pools from separate object files to remove redundant literals and
+improve code size.  With \fB\-mtext\-section\-literals\fR, the literals
+are interspersed in the text section in order to keep them as close as
+possible to their references.  This may be necessary for large assembly
+files.
+.IP "\fB\-mtarget\-align\fR" 4
+.IX Item "-mtarget-align"
+.PD 0
+.IP "\fB\-mno\-target\-align\fR" 4
+.IX Item "-mno-target-align"
+.PD
+When this option is enabled, \s-1GCC\s0 instructs the assembler to
+automatically align instructions to reduce branch penalties at the
+expense of some code density.  The assembler attempts to widen density
+instructions to align branch targets and the instructions following call
+instructions.  If there are not enough preceding safe density
+instructions to align a target, no widening will be performed.  The
+default is \fB\-mtarget\-align\fR.  These options do not affect the
+treatment of auto-aligned instructions like \f(CW\*(C`LOOP\*(C'\fR, which the
+assembler will always align, either by widening density instructions or
+by inserting no-op instructions.
+.IP "\fB\-mlongcalls\fR" 4
+.IX Item "-mlongcalls"
+.PD 0
+.IP "\fB\-mno\-longcalls\fR" 4
+.IX Item "-mno-longcalls"
+.PD
+When this option is enabled, \s-1GCC\s0 instructs the assembler to translate
+direct calls to indirect calls unless it can determine that the target
+of a direct call is in the range allowed by the call instruction.  This
+translation typically occurs for calls to functions in other source
+files.  Specifically, the assembler translates a direct \f(CW\*(C`CALL\*(C'\fR
+instruction into an \f(CW\*(C`L32R\*(C'\fR followed by a \f(CW\*(C`CALLX\*(C'\fR instruction.
+The default is \fB\-mno\-longcalls\fR.  This option should be used in
+programs where the call target can potentially be out of range.  This
+option is implemented in the assembler, not the compiler, so the
+assembly code generated by \s-1GCC\s0 will still show direct call
+instructions\-\-\-look at the disassembled object code to see the actual
+instructions.  Note that the assembler will use an indirect call for
+every cross-file call, not just those that really will be out of range.
+.PP
+\fIzSeries Options\fR
+.IX Subsection "zSeries Options"
+.PP
+These are listed under
+.SS "Options for Code Generation Conventions"
+.IX Subsection "Options for Code Generation Conventions"
+These machine-independent options control the interface conventions
+used in code generation.
+.PP
+Most of them have both positive and negative forms; the negative form
+of \fB\-ffoo\fR would be \fB\-fno\-foo\fR.  In the table below, only
+one of the forms is listed\-\-\-the one which is not the default.  You
+can figure out the other form by either removing \fBno\-\fR or adding
+it.
+.IP "\fB\-fbounds\-check\fR" 4
+.IX Item "-fbounds-check"
+For front-ends that support it, generate additional code to check that
+indices used to access arrays are within the declared range.  This is
+currently only supported by the Java and Fortran front-ends, where
+this option defaults to true and false respectively.
+.IP "\fB\-ftrapv\fR" 4
+.IX Item "-ftrapv"
+This option generates traps for signed overflow on addition, subtraction,
+multiplication operations.
+.IP "\fB\-fwrapv\fR" 4
+.IX Item "-fwrapv"
+This option instructs the compiler to assume that signed arithmetic
+overflow of addition, subtraction and multiplication wraps around
+using twos-complement representation.  This flag enables some optimizations
+and disables others.  This option is enabled by default for the Java
+front-end, as required by the Java language specification.
+.IP "\fB\-fexceptions\fR" 4
+.IX Item "-fexceptions"
+Enable exception handling.  Generates extra code needed to propagate
+exceptions.  For some targets, this implies \s-1GCC\s0 will generate frame
+unwind information for all functions, which can produce significant data
+size overhead, although it does not affect execution.  If you do not
+specify this option, \s-1GCC\s0 will enable it by default for languages like
+\&\*(C+ which normally require exception handling, and disable it for
+languages like C that do not normally require it.  However, you may need
+to enable this option when compiling C code that needs to interoperate
+properly with exception handlers written in \*(C+.  You may also wish to
+disable this option if you are compiling older \*(C+ programs that don't
+use exception handling.
+.IP "\fB\-fnon\-call\-exceptions\fR" 4
+.IX Item "-fnon-call-exceptions"
+Generate code that allows trapping instructions to throw exceptions.
+Note that this requires platform-specific runtime support that does
+not exist everywhere.  Moreover, it only allows \fItrapping\fR
+instructions to throw exceptions, i.e. memory references or floating
+point instructions.  It does not allow exceptions to be thrown from
+arbitrary signal handlers such as \f(CW\*(C`SIGALRM\*(C'\fR.
+.IP "\fB\-funwind\-tables\fR" 4
+.IX Item "-funwind-tables"
+Similar to \fB\-fexceptions\fR, except that it will just generate any needed
+static data, but will not affect the generated code in any other way.
+You will normally not enable this option; instead, a language processor
+that needs this handling would enable it on your behalf.
+.IP "\fB\-fasynchronous\-unwind\-tables\fR" 4
+.IX Item "-fasynchronous-unwind-tables"
+Generate unwind table in dwarf2 format, if supported by target machine.  The
+table is exact at each instruction boundary, so it can be used for stack
+unwinding from asynchronous events (such as debugger or garbage collector).
+.IP "\fB\-fpcc\-struct\-return\fR" 4
+.IX Item "-fpcc-struct-return"
+Return \*(L"short\*(R" \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in memory like
+longer ones, rather than in registers.  This convention is less
+efficient, but it has the advantage of allowing intercallability between
+GCC-compiled files and files compiled with other compilers, particularly
+the Portable C Compiler (pcc).
+.Sp
+The precise convention for returning structures in memory depends
+on the target configuration macros.
+.Sp
+Short structures and unions are those whose size and alignment match
+that of some integer type.
+.Sp
+\&\fBWarning:\fR code compiled with the \fB\-fpcc\-struct\-return\fR
+switch is not binary compatible with code compiled with the
+\&\fB\-freg\-struct\-return\fR switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-freg\-struct\-return\fR" 4
+.IX Item "-freg-struct-return"
+Return \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in registers when possible.
+This is more efficient for small structures than
+\&\fB\-fpcc\-struct\-return\fR.
+.Sp
+If you specify neither \fB\-fpcc\-struct\-return\fR nor
+\&\fB\-freg\-struct\-return\fR, \s-1GCC\s0 defaults to whichever convention is
+standard for the target.  If there is no standard convention, \s-1GCC\s0
+defaults to \fB\-fpcc\-struct\-return\fR, except on targets where \s-1GCC\s0 is
+the principal compiler.  In those cases, we can choose the standard, and
+we chose the more efficient register return alternative.
+.Sp
+\&\fBWarning:\fR code compiled with the \fB\-freg\-struct\-return\fR
+switch is not binary compatible with code compiled with the
+\&\fB\-fpcc\-struct\-return\fR switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fshort\-enums\fR" 4
+.IX Item "-fshort-enums"
+Allocate to an \f(CW\*(C`enum\*(C'\fR type only as many bytes as it needs for the
+declared range of possible values.  Specifically, the \f(CW\*(C`enum\*(C'\fR type
+will be equivalent to the smallest integer type which has enough room.
+.Sp
+\&\fBWarning:\fR the \fB\-fshort\-enums\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fshort\-double\fR" 4
+.IX Item "-fshort-double"
+Use the same size for \f(CW\*(C`double\*(C'\fR as for \f(CW\*(C`float\*(C'\fR.
+.Sp
+\&\fBWarning:\fR the \fB\-fshort\-double\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fshort\-wchar\fR" 4
+.IX Item "-fshort-wchar"
+Override the underlying type for \fBwchar_t\fR to be \fBshort
+unsigned int\fR instead of the default for the target.  This option is
+useful for building programs to run under \s-1WINE\s0.
+.Sp
+\&\fBWarning:\fR the \fB\-fshort\-wchar\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-fno\-common\fR" 4
+.IX Item "-fno-common"
+In C code, controls the placement of uninitialized global variables.
+Unix C compilers have traditionally permitted multiple definitions of
+such variables in different compilation units by placing the variables
+in a common block.
+This is the behavior specified by \fB\-fcommon\fR, and is the default
+for \s-1GCC\s0 on most targets.
+On the other hand, this behavior is not required by \s-1ISO\s0 C, and on some
+targets may carry a speed or code size penalty on variable references.
+The \fB\-fno\-common\fR option specifies that the compiler should place
+uninitialized global variables in the data section of the object file,
+rather than generating them as common blocks.
+This has the effect that if the same variable is declared
+(without \f(CW\*(C`extern\*(C'\fR) in two different compilations,
+you will get a multiple-definition error when you link them.
+In this case, you must compile with \fB\-fcommon\fR instead.
+Compiling with \fB\-fno\-common\fR is useful on targets for which
+it provides better performance, or if you wish to verify that the
+program will work on other systems which always treat uninitialized
+variable declarations this way.
+.IP "\fB\-fno\-ident\fR" 4
+.IX Item "-fno-ident"
+Ignore the \fB#ident\fR directive.
+.IP "\fB\-finhibit\-size\-directive\fR" 4
+.IX Item "-finhibit-size-directive"
+Don't output a \f(CW\*(C`.size\*(C'\fR assembler directive, or anything else that
+would cause trouble if the function is split in the middle, and the
+two halves are placed at locations far apart in memory.  This option is
+used when compiling \fIcrtstuff.c\fR; you should not need to use it
+for anything else.
+.IP "\fB\-fverbose\-asm\fR" 4
+.IX Item "-fverbose-asm"
+Put extra commentary information in the generated assembly code to
+make it more readable.  This option is generally only of use to those
+who actually need to read the generated assembly code (perhaps while
+debugging the compiler itself).
+.Sp
+\&\fB\-fno\-verbose\-asm\fR, the default, causes the
+extra information to be omitted and is useful when comparing two assembler
+files.
+.IP "\fB\-frecord\-gcc\-switches\fR" 4
+.IX Item "-frecord-gcc-switches"
+This switch causes the command line that was used to invoke the
+compiler to be recorded into the object file that is being created.
+This switch is only implemented on some targets and the exact format
+of the recording is target and binary file format dependent, but it
+usually takes the form of a section containing \s-1ASCII\s0 text.  This
+switch is related to the \fB\-fverbose\-asm\fR switch, but that
+switch only records information in the assembler output file as
+comments, so it never reaches the object file.
+.IP "\fB\-fpic\fR" 4
+.IX Item "-fpic"
+Generate position-independent code (\s-1PIC\s0) suitable for use in a shared
+library, if supported for the target machine.  Such code accesses all
+constant addresses through a global offset table (\s-1GOT\s0).  The dynamic
+loader resolves the \s-1GOT\s0 entries when the program starts (the dynamic
+loader is not part of \s-1GCC\s0; it is part of the operating system).  If
+the \s-1GOT\s0 size for the linked executable exceeds a machine-specific
+maximum size, you get an error message from the linker indicating that
+\&\fB\-fpic\fR does not work; in that case, recompile with \fB\-fPIC\fR
+instead.  (These maximums are 8k on the \s-1SPARC\s0 and 32k
+on the m68k and \s-1RS/6000\s0.  The 386 has no such limit.)
+.Sp
+Position-independent code requires special support, and therefore works
+only on certain machines.  For the 386, \s-1GCC\s0 supports \s-1PIC\s0 for System V
+but not for the Sun 386i.  Code generated for the \s-1IBM\s0 \s-1RS/6000\s0 is always
+position-independent.
+.Sp
+When this flag is set, the macros \f(CW\*(C`_\|_pic_\|_\*(C'\fR and \f(CW\*(C`_\|_PIC_\|_\*(C'\fR
+are defined to 1.
+.IP "\fB\-fPIC\fR" 4
+.IX Item "-fPIC"
+If supported for the target machine, emit position-independent code,
+suitable for dynamic linking and avoiding any limit on the size of the
+global offset table.  This option makes a difference on the m68k,
+PowerPC and \s-1SPARC\s0.
+.Sp
+Position-independent code requires special support, and therefore works
+only on certain machines.
+.Sp
+When this flag is set, the macros \f(CW\*(C`_\|_pic_\|_\*(C'\fR and \f(CW\*(C`_\|_PIC_\|_\*(C'\fR
+are defined to 2.
+.IP "\fB\-fpie\fR" 4
+.IX Item "-fpie"
+.PD 0
+.IP "\fB\-fPIE\fR" 4
+.IX Item "-fPIE"
+.PD
+These options are similar to \fB\-fpic\fR and \fB\-fPIC\fR, but
+generated position independent code can be only linked into executables.
+Usually these options are used when \fB\-pie\fR \s-1GCC\s0 option will be
+used during linking.
+.Sp
+\&\fB\-fpie\fR and \fB\-fPIE\fR both define the macros
+\&\f(CW\*(C`_\|_pie_\|_\*(C'\fR and \f(CW\*(C`_\|_PIE_\|_\*(C'\fR.  The macros have the value 1
+for \fB\-fpie\fR and 2 for \fB\-fPIE\fR.
+.IP "\fB\-fno\-jump\-tables\fR" 4
+.IX Item "-fno-jump-tables"
+Do not use jump tables for switch statements even where it would be
+more efficient than other code generation strategies.  This option is
+of use in conjunction with \fB\-fpic\fR or \fB\-fPIC\fR for
+building code which forms part of a dynamic linker and cannot
+reference the address of a jump table.  On some targets, jump tables
+do not require a \s-1GOT\s0 and this option is not needed.
+.IP "\fB\-ffixed\-\fR\fIreg\fR" 4
+.IX Item "-ffixed-reg"
+Treat the register named \fIreg\fR as a fixed register; generated code
+should never refer to it (except perhaps as a stack pointer, frame
+pointer or in some other fixed role).
+.Sp
+\&\fIreg\fR must be the name of a register.  The register names accepted
+are machine-specific and are defined in the \f(CW\*(C`REGISTER_NAMES\*(C'\fR
+macro in the machine description macro file.
+.Sp
+This flag does not have a negative form, because it specifies a
+three-way choice.
+.IP "\fB\-fcall\-used\-\fR\fIreg\fR" 4
+.IX Item "-fcall-used-reg"
+Treat the register named \fIreg\fR as an allocable register that is
+clobbered by function calls.  It may be allocated for temporaries or
+variables that do not live across a call.  Functions compiled this way
+will not save and restore the register \fIreg\fR.
+.Sp
+It is an error to used this flag with the frame pointer or stack pointer.
+Use of this flag for other registers that have fixed pervasive roles in
+the machine's execution model will produce disastrous results.
+.Sp
+This flag does not have a negative form, because it specifies a
+three-way choice.
+.IP "\fB\-fcall\-saved\-\fR\fIreg\fR" 4
+.IX Item "-fcall-saved-reg"
+Treat the register named \fIreg\fR as an allocable register saved by
+functions.  It may be allocated even for temporaries or variables that
+live across a call.  Functions compiled this way will save and restore
+the register \fIreg\fR if they use it.
+.Sp
+It is an error to used this flag with the frame pointer or stack pointer.
+Use of this flag for other registers that have fixed pervasive roles in
+the machine's execution model will produce disastrous results.
+.Sp
+A different sort of disaster will result from the use of this flag for
+a register in which function values may be returned.
+.Sp
+This flag does not have a negative form, because it specifies a
+three-way choice.
+.IP "\fB\-fpack\-struct[=\fR\fIn\fR\fB]\fR" 4
+.IX Item "-fpack-struct[=n]"
+Without a value specified, pack all structure members together without
+holes.  When a value is specified (which must be a small power of two), pack
+structure members according to this value, representing the maximum
+alignment (that is, objects with default alignment requirements larger than
+this will be output potentially unaligned at the next fitting location.
+.Sp
+\&\fBWarning:\fR the \fB\-fpack\-struct\fR switch causes \s-1GCC\s0 to generate
+code that is not binary compatible with code generated without that switch.
+Additionally, it makes the code suboptimal.
+Use it to conform to a non-default application binary interface.
+.IP "\fB\-finstrument\-functions\fR" 4
+.IX Item "-finstrument-functions"
+Generate instrumentation calls for entry and exit to functions.  Just
+after function entry and just before function exit, the following
+profiling functions will be called with the address of the current
+function and its call site.  (On some platforms,
+\&\f(CW\*(C`_\|_builtin_return_address\*(C'\fR does not work beyond the current
+function, so the call site information may not be available to the
+profiling functions otherwise.)
+.Sp
+.Vb 4
+\&        void _\|_cyg_profile_func_enter (void *this_fn,
+\&                                       void *call_site);
+\&        void _\|_cyg_profile_func_exit  (void *this_fn,
+\&                                       void *call_site);
+.Ve
+.Sp
+The first argument is the address of the start of the current function,
+which may be looked up exactly in the symbol table.
+.Sp
+This instrumentation is also done for functions expanded inline in other
+functions.  The profiling calls will indicate where, conceptually, the
+inline function is entered and exited.  This means that addressable
+versions of such functions must be available.  If all your uses of a
+function are expanded inline, this may mean an additional expansion of
+code size.  If you use \fBextern inline\fR in your C code, an
+addressable version of such functions must be provided.  (This is
+normally the case anyways, but if you get lucky and the optimizer always
+expands the functions inline, you might have gotten away without
+providing static copies.)
+.Sp
+A function may be given the attribute \f(CW\*(C`no_instrument_function\*(C'\fR, in
+which case this instrumentation will not be done.  This can be used, for
+example, for the profiling functions listed above, high-priority
+interrupt routines, and any functions from which the profiling functions
+cannot safely be called (perhaps signal handlers, if the profiling
+routines generate output or allocate memory).
+.IP "\fB\-finstrument\-functions\-exclude\-file\-list=\fR\fIfile\fR\fB,\fR\fIfile\fR\fB,...\fR" 4
+.IX Item "-finstrument-functions-exclude-file-list=file,file,..."
+Set the list of functions that are excluded from instrumentation (see
+the description of \f(CW\*(C`\-finstrument\-functions\*(C'\fR).  If the file that
+contains a function definition matches with one of \fIfile\fR, then
+that function is not instrumented.  The match is done on substrings:
+if the \fIfile\fR parameter is a substring of the file name, it is
+considered to be a match.
+.Sp
+For example:
+.Sp
+.Vb 1
+\&        \-finstrument\-functions\-exclude\-file\-list=/bits/stl,include/sys
+.Ve
+.Sp
+will exclude any inline function defined in files whose pathnames
+contain \f(CW\*(C`/bits/stl\*(C'\fR or \f(CW\*(C`include/sys\*(C'\fR.
+.Sp
+If, for some reason, you want to include letter \f(CW\*(Aq,\*(Aq\fR in one of
+\&\fIsym\fR, write \f(CW\*(Aq,\*(Aq\fR. For example,
+\&\f(CW\*(C`\-finstrument\-functions\-exclude\-file\-list=\*(Aq,,tmp\*(Aq\*(C'\fR
+(note the single quote surrounding the option).
+.IP "\fB\-finstrument\-functions\-exclude\-function\-list=\fR\fIsym\fR\fB,\fR\fIsym\fR\fB,...\fR" 4
+.IX Item "-finstrument-functions-exclude-function-list=sym,sym,..."
+This is similar to \f(CW\*(C`\-finstrument\-functions\-exclude\-file\-list\*(C'\fR,
+but this option sets the list of function names to be excluded from
+instrumentation.  The function name to be matched is its user-visible
+name, such as \f(CW\*(C`vector<int> blah(const vector<int> &)\*(C'\fR, not the
+internal mangled name (e.g., \f(CW\*(C`_Z4blahRSt6vectorIiSaIiEE\*(C'\fR).  The
+match is done on substrings: if the \fIsym\fR parameter is a substring
+of the function name, it is considered to be a match.  For C99 and \*(C+
+extended identifiers, the function name must be given in \s-1UTF\-8\s0, not
+using universal character names.
+.IP "\fB\-fstack\-check\fR" 4
+.IX Item "-fstack-check"
+Generate code to verify that you do not go beyond the boundary of the
+stack.  You should specify this flag if you are running in an
+environment with multiple threads, but only rarely need to specify it in
+a single-threaded environment since stack overflow is automatically
+detected on nearly all systems if there is only one stack.
+.Sp
+Note that this switch does not actually cause checking to be done; the
+operating system or the language runtime must do that.  The switch causes
+generation of code to ensure that they see the stack being extended.
+.Sp
+You can additionally specify a string parameter: \f(CW\*(C`no\*(C'\fR means no
+checking, \f(CW\*(C`generic\*(C'\fR means force the use of old-style checking,
+\&\f(CW\*(C`specific\*(C'\fR means use the best checking method and is equivalent
+to bare \fB\-fstack\-check\fR.
+.Sp
+Old-style checking is a generic mechanism that requires no specific
+target support in the compiler but comes with the following drawbacks:
+.RS 4
+.IP "1." 4
+Modified allocation strategy for large objects: they will always be
+allocated dynamically if their size exceeds a fixed threshold.
+.IP "2." 4
+Fixed limit on the size of the static frame of functions: when it is
+topped by a particular function, stack checking is not reliable and
+a warning is issued by the compiler.
+.IP "3." 4
+Inefficiency: because of both the modified allocation strategy and the
+generic implementation, the performances of the code are hampered.
+.RE
+.RS 4
+.Sp
+Note that old-style stack checking is also the fallback method for
+\&\f(CW\*(C`specific\*(C'\fR if no target support has been added in the compiler.
+.RE
+.IP "\fB\-fstack\-limit\-register=\fR\fIreg\fR" 4
+.IX Item "-fstack-limit-register=reg"
+.PD 0
+.IP "\fB\-fstack\-limit\-symbol=\fR\fIsym\fR" 4
+.IX Item "-fstack-limit-symbol=sym"
+.IP "\fB\-fno\-stack\-limit\fR" 4
+.IX Item "-fno-stack-limit"
+.PD
+Generate code to ensure that the stack does not grow beyond a certain value,
+either the value of a register or the address of a symbol.  If the stack
+would grow beyond the value, a signal is raised.  For most targets,
+the signal is raised before the stack overruns the boundary, so
+it is possible to catch the signal without taking special precautions.
+.Sp
+For instance, if the stack starts at absolute address \fB0x80000000\fR
+and grows downwards, you can use the flags
+\&\fB\-fstack\-limit\-symbol=_\|_stack_limit\fR and
+\&\fB\-Wl,\-\-defsym,_\|_stack_limit=0x7ffe0000\fR to enforce a stack limit
+of 128KB.  Note that this may only work with the \s-1GNU\s0 linker.
+.IP "\fB\-fsplit\-stack\fR" 4
+.IX Item "-fsplit-stack"
+Generate code to automatically split the stack before it overflows.
+The resulting program has a discontiguous stack which can only
+overflow if the program is unable to allocate any more memory.  This
+is most useful when running threaded programs, as it is no longer
+necessary to calculate a good stack size to use for each thread.  This
+is currently only implemented for the i386 and x86_64 backends running
+GNU/Linux.
+.Sp
+When code compiled with \fB\-fsplit\-stack\fR calls code compiled
+without \fB\-fsplit\-stack\fR, there may not be much stack space
+available for the latter code to run.  If compiling all code,
+including library code, with \fB\-fsplit\-stack\fR is not an option,
+then the linker can fix up these calls so that the code compiled
+without \fB\-fsplit\-stack\fR always has a large stack.  Support for
+this is implemented in the gold linker in \s-1GNU\s0 binutils release 2.21
+and later.
+.IP "\fB\-fleading\-underscore\fR" 4
+.IX Item "-fleading-underscore"
+This option and its counterpart, \fB\-fno\-leading\-underscore\fR, forcibly
+change the way C symbols are represented in the object file.  One use
+is to help link with legacy assembly code.
+.Sp
+\&\fBWarning:\fR the \fB\-fleading\-underscore\fR switch causes \s-1GCC\s0 to
+generate code that is not binary compatible with code generated without that
+switch.  Use it to conform to a non-default application binary interface.
+Not all targets provide complete support for this switch.
+.IP "\fB\-ftls\-model=\fR\fImodel\fR" 4
+.IX Item "-ftls-model=model"
+Alter the thread-local storage model to be used.
+The \fImodel\fR argument should be one of \f(CW\*(C`global\-dynamic\*(C'\fR,
+\&\f(CW\*(C`local\-dynamic\*(C'\fR, \f(CW\*(C`initial\-exec\*(C'\fR or \f(CW\*(C`local\-exec\*(C'\fR.
+.Sp
+The default without \fB\-fpic\fR is \f(CW\*(C`initial\-exec\*(C'\fR; with
+\&\fB\-fpic\fR the default is \f(CW\*(C`global\-dynamic\*(C'\fR.
+.IP "\fB\-fvisibility=\fR\fIdefault|internal|hidden|protected\fR" 4
+.IX Item "-fvisibility=default|internal|hidden|protected"
+Set the default \s-1ELF\s0 image symbol visibility to the specified option\-\-\-all
+symbols will be marked with this unless overridden within the code.
+Using this feature can very substantially improve linking and
+load times of shared object libraries, produce more optimized
+code, provide near-perfect \s-1API\s0 export and prevent symbol clashes.
+It is \fBstrongly\fR recommended that you use this in any shared objects
+you distribute.
+.Sp
+Despite the nomenclature, \f(CW\*(C`default\*(C'\fR always means public; i.e.,
+available to be linked against from outside the shared object.
+\&\f(CW\*(C`protected\*(C'\fR and \f(CW\*(C`internal\*(C'\fR are pretty useless in real-world
+usage so the only other commonly used option will be \f(CW\*(C`hidden\*(C'\fR.
+The default if \fB\-fvisibility\fR isn't specified is
+\&\f(CW\*(C`default\*(C'\fR, i.e., make every
+symbol public\-\-\-this causes the same behavior as previous versions of
+\&\s-1GCC\s0.
+.Sp
+A good explanation of the benefits offered by ensuring \s-1ELF\s0
+symbols have the correct visibility is given by \*(L"How To Write
+Shared Libraries\*(R" by Ulrich Drepper (which can be found at
+<\fBhttp://people.redhat.com/~drepper/\fR>)\-\-\-however a superior
+solution made possible by this option to marking things hidden when
+the default is public is to make the default hidden and mark things
+public.  This is the norm with \s-1DLL\s0's on Windows and with \fB\-fvisibility=hidden\fR
+and \f(CW\*(C`_\|_attribute_\|_ ((visibility("default")))\*(C'\fR instead of
+\&\f(CW\*(C`_\|_declspec(dllexport)\*(C'\fR you get almost identical semantics with
+identical syntax.  This is a great boon to those working with
+cross-platform projects.
+.Sp
+For those adding visibility support to existing code, you may find
+\&\fB#pragma \s-1GCC\s0 visibility\fR of use.  This works by you enclosing
+the declarations you wish to set visibility for with (for example)
+\&\fB#pragma \s-1GCC\s0 visibility push(hidden)\fR and
+\&\fB#pragma \s-1GCC\s0 visibility pop\fR.
+Bear in mind that symbol visibility should be viewed \fBas
+part of the \s-1API\s0 interface contract\fR and thus all new code should
+always specify visibility when it is not the default; i.e., declarations
+only for use within the local \s-1DSO\s0 should \fBalways\fR be marked explicitly
+as hidden as so to avoid \s-1PLT\s0 indirection overheads\-\-\-making this
+abundantly clear also aids readability and self-documentation of the code.
+Note that due to \s-1ISO\s0 \*(C+ specification requirements, operator new and
+operator delete must always be of default visibility.
+.Sp
+Be aware that headers from outside your project, in particular system
+headers and headers from any other library you use, may not be
+expecting to be compiled with visibility other than the default.  You
+may need to explicitly say \fB#pragma \s-1GCC\s0 visibility push(default)\fR
+before including any such headers.
+.Sp
+\&\fBextern\fR declarations are not affected by \fB\-fvisibility\fR, so
+a lot of code can be recompiled with \fB\-fvisibility=hidden\fR with
+no modifications.  However, this means that calls to \fBextern\fR
+functions with no explicit visibility will use the \s-1PLT\s0, so it is more
+effective to use \fB_\|_attribute ((visibility))\fR and/or
+\&\fB#pragma \s-1GCC\s0 visibility\fR to tell the compiler which \fBextern\fR
+declarations should be treated as hidden.
+.Sp
+Note that \fB\-fvisibility\fR does affect \*(C+ vague linkage
+entities. This means that, for instance, an exception class that will
+be thrown between DSOs must be explicitly marked with default
+visibility so that the \fBtype_info\fR nodes will be unified between
+the DSOs.
+.Sp
+An overview of these techniques, their benefits and how to use them
+is at <\fBhttp://gcc.gnu.org/wiki/Visibility\fR>.
+.IP "\fB\-fstrict\-volatile\-bitfields\fR" 4
+.IX Item "-fstrict-volatile-bitfields"
+This option should be used if accesses to volatile bitfields (or other
+structure fields, although the compiler usually honors those types
+anyway) should use a single access of the width of the
+field's type, aligned to a natural alignment if possible.  For
+example, targets with memory-mapped peripheral registers might require
+all such accesses to be 16 bits wide; with this flag the user could
+declare all peripheral bitfields as \*(L"unsigned short\*(R" (assuming short
+is 16 bits on these targets) to force \s-1GCC\s0 to use 16 bit accesses
+instead of, perhaps, a more efficient 32 bit access.
+.Sp
+If this option is disabled, the compiler will use the most efficient
+instruction.  In the previous example, that might be a 32\-bit load
+instruction, even though that will access bytes that do not contain
+any portion of the bitfield, or memory-mapped registers unrelated to
+the one being updated.
+.Sp
+If the target requires strict alignment, and honoring the field
+type would require violating this alignment, a warning is issued.
+If the field has \f(CW\*(C`packed\*(C'\fR attribute, the access is done without
+honoring the field type.  If the field doesn't have \f(CW\*(C`packed\*(C'\fR
+attribute, the access is done honoring the field type.  In both cases,
+\&\s-1GCC\s0 assumes that the user knows something about the target hardware
+that it is unaware of.
+.Sp
+The default value of this option is determined by the application binary
+interface for the target processor.
+.SH "ENVIRONMENT"
+.IX Header "ENVIRONMENT"
+This section describes several environment variables that affect how \s-1GCC\s0
+operates.  Some of them work by specifying directories or prefixes to use
+when searching for various kinds of files.  Some are used to specify other
+aspects of the compilation environment.
+.PP
+Note that you can also specify places to search using options such as
+\&\fB\-B\fR, \fB\-I\fR and \fB\-L\fR.  These
+take precedence over places specified using environment variables, which
+in turn take precedence over those specified by the configuration of \s-1GCC\s0.
+.IP "\fB\s-1LANG\s0\fR" 4
+.IX Item "LANG"
+.PD 0
+.IP "\fB\s-1LC_CTYPE\s0\fR" 4
+.IX Item "LC_CTYPE"
+.IP "\fB\s-1LC_MESSAGES\s0\fR" 4
+.IX Item "LC_MESSAGES"
+.IP "\fB\s-1LC_ALL\s0\fR" 4
+.IX Item "LC_ALL"
+.PD
+These environment variables control the way that \s-1GCC\s0 uses
+localization information that allow \s-1GCC\s0 to work with different
+national conventions.  \s-1GCC\s0 inspects the locale categories
+\&\fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR if it has been configured to do
+so.  These locale categories can be set to any value supported by your
+installation.  A typical value is \fBen_GB.UTF\-8\fR for English in the United
+Kingdom encoded in \s-1UTF\-8\s0.
+.Sp
+The \fB\s-1LC_CTYPE\s0\fR environment variable specifies character
+classification.  \s-1GCC\s0 uses it to determine the character boundaries in
+a string; this is needed for some multibyte encodings that contain quote
+and escape characters that would otherwise be interpreted as a string
+end or escape.
+.Sp
+The \fB\s-1LC_MESSAGES\s0\fR environment variable specifies the language to
+use in diagnostic messages.
+.Sp
+If the \fB\s-1LC_ALL\s0\fR environment variable is set, it overrides the value
+of \fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR; otherwise, \fB\s-1LC_CTYPE\s0\fR
+and \fB\s-1LC_MESSAGES\s0\fR default to the value of the \fB\s-1LANG\s0\fR
+environment variable.  If none of these variables are set, \s-1GCC\s0
+defaults to traditional C English behavior.
+.IP "\fB\s-1TMPDIR\s0\fR" 4
+.IX Item "TMPDIR"
+If \fB\s-1TMPDIR\s0\fR is set, it specifies the directory to use for temporary
+files.  \s-1GCC\s0 uses temporary files to hold the output of one stage of
+compilation which is to be used as input to the next stage: for example,
+the output of the preprocessor, which is the input to the compiler
+proper.
+.IP "\fB\s-1GCC_EXEC_PREFIX\s0\fR" 4
+.IX Item "GCC_EXEC_PREFIX"
+If \fB\s-1GCC_EXEC_PREFIX\s0\fR is set, it specifies a prefix to use in the
+names of the subprograms executed by the compiler.  No slash is added
+when this prefix is combined with the name of a subprogram, but you can
+specify a prefix that ends with a slash if you wish.
+.Sp
+If \fB\s-1GCC_EXEC_PREFIX\s0\fR is not set, \s-1GCC\s0 will attempt to figure out
+an appropriate prefix to use based on the pathname it was invoked with.
+.Sp
+If \s-1GCC\s0 cannot find the subprogram using the specified prefix, it
+tries looking in the usual places for the subprogram.
+.Sp
+The default value of \fB\s-1GCC_EXEC_PREFIX\s0\fR is
+\&\fI\fIprefix\fI/lib/gcc/\fR where \fIprefix\fR is the prefix to
+the installed compiler. In many cases \fIprefix\fR is the value
+of \f(CW\*(C`prefix\*(C'\fR when you ran the \fIconfigure\fR script.
+.Sp
+Other prefixes specified with \fB\-B\fR take precedence over this prefix.
+.Sp
+This prefix is also used for finding files such as \fIcrt0.o\fR that are
+used for linking.
+.Sp
+In addition, the prefix is used in an unusual way in finding the
+directories to search for header files.  For each of the standard
+directories whose name normally begins with \fB/usr/local/lib/gcc\fR
+(more precisely, with the value of \fB\s-1GCC_INCLUDE_DIR\s0\fR), \s-1GCC\s0 tries
+replacing that beginning with the specified prefix to produce an
+alternate directory name.  Thus, with \fB\-Bfoo/\fR, \s-1GCC\s0 will search
+\&\fIfoo/bar\fR where it would normally search \fI/usr/local/lib/bar\fR.
+These alternate directories are searched first; the standard directories
+come next. If a standard directory begins with the configured
+\&\fIprefix\fR then the value of \fIprefix\fR is replaced by
+\&\fB\s-1GCC_EXEC_PREFIX\s0\fR when looking for header files.
+.IP "\fB\s-1COMPILER_PATH\s0\fR" 4
+.IX Item "COMPILER_PATH"
+The value of \fB\s-1COMPILER_PATH\s0\fR is a colon-separated list of
+directories, much like \fB\s-1PATH\s0\fR.  \s-1GCC\s0 tries the directories thus
+specified when searching for subprograms, if it can't find the
+subprograms using \fB\s-1GCC_EXEC_PREFIX\s0\fR.
+.IP "\fB\s-1LIBRARY_PATH\s0\fR" 4
+.IX Item "LIBRARY_PATH"
+The value of \fB\s-1LIBRARY_PATH\s0\fR is a colon-separated list of
+directories, much like \fB\s-1PATH\s0\fR.  When configured as a native compiler,
+\&\s-1GCC\s0 tries the directories thus specified when searching for special
+linker files, if it can't find them using \fB\s-1GCC_EXEC_PREFIX\s0\fR.  Linking
+using \s-1GCC\s0 also uses these directories when searching for ordinary
+libraries for the \fB\-l\fR option (but directories specified with
+\&\fB\-L\fR come first).
+.IP "\fB\s-1LANG\s0\fR" 4
+.IX Item "LANG"
+This variable is used to pass locale information to the compiler.  One way in
+which this information is used is to determine the character set to be used
+when character literals, string literals and comments are parsed in C and \*(C+.
+When the compiler is configured to allow multibyte characters,
+the following values for \fB\s-1LANG\s0\fR are recognized:
+.RS 4
+.IP "\fBC\-JIS\fR" 4
+.IX Item "C-JIS"
+Recognize \s-1JIS\s0 characters.
+.IP "\fBC\-SJIS\fR" 4
+.IX Item "C-SJIS"
+Recognize \s-1SJIS\s0 characters.
+.IP "\fBC\-EUCJP\fR" 4
+.IX Item "C-EUCJP"
+Recognize \s-1EUCJP\s0 characters.
+.RE
+.RS 4
+.Sp
+If \fB\s-1LANG\s0\fR is not defined, or if it has some other value, then the
+compiler will use mblen and mbtowc as defined by the default locale to
+recognize and translate multibyte characters.
+.RE
+.PP
+Some additional environments variables affect the behavior of the
+preprocessor.
+.IP "\fB\s-1CPATH\s0\fR" 4
+.IX Item "CPATH"
+.PD 0
+.IP "\fBC_INCLUDE_PATH\fR" 4
+.IX Item "C_INCLUDE_PATH"
+.IP "\fB\s-1CPLUS_INCLUDE_PATH\s0\fR" 4
+.IX Item "CPLUS_INCLUDE_PATH"
+.IP "\fB\s-1OBJC_INCLUDE_PATH\s0\fR" 4
+.IX Item "OBJC_INCLUDE_PATH"
+.PD
+Each variable's value is a list of directories separated by a special
+character, much like \fB\s-1PATH\s0\fR, in which to look for header files.
+The special character, \f(CW\*(C`PATH_SEPARATOR\*(C'\fR, is target-dependent and
+determined at \s-1GCC\s0 build time.  For Microsoft Windows-based targets it is a
+semicolon, and for almost all other targets it is a colon.
+.Sp
+\&\fB\s-1CPATH\s0\fR specifies a list of directories to be searched as if
+specified with \fB\-I\fR, but after any paths given with \fB\-I\fR
+options on the command line.  This environment variable is used
+regardless of which language is being preprocessed.
+.Sp
+The remaining environment variables apply only when preprocessing the
+particular language indicated.  Each specifies a list of directories
+to be searched as if specified with \fB\-isystem\fR, but after any
+paths given with \fB\-isystem\fR options on the command line.
+.Sp
+In all these variables, an empty element instructs the compiler to
+search its current working directory.  Empty elements can appear at the
+beginning or end of a path.  For instance, if the value of
+\&\fB\s-1CPATH\s0\fR is \f(CW\*(C`:/special/include\*(C'\fR, that has the same
+effect as \fB\-I.\ \-I/special/include\fR.
+.IP "\fB\s-1DEPENDENCIES_OUTPUT\s0\fR" 4
+.IX Item "DEPENDENCIES_OUTPUT"
+If this variable is set, its value specifies how to output
+dependencies for Make based on the non-system header files processed
+by the compiler.  System header files are ignored in the dependency
+output.
+.Sp
+The value of \fB\s-1DEPENDENCIES_OUTPUT\s0\fR can be just a file name, in
+which case the Make rules are written to that file, guessing the target
+name from the source file name.  Or the value can have the form
+\&\fIfile\fR\fB \fR\fItarget\fR, in which case the rules are written to
+file \fIfile\fR using \fItarget\fR as the target name.
+.Sp
+In other words, this environment variable is equivalent to combining
+the options \fB\-MM\fR and \fB\-MF\fR,
+with an optional \fB\-MT\fR switch too.
+.IP "\fB\s-1SUNPRO_DEPENDENCIES\s0\fR" 4
+.IX Item "SUNPRO_DEPENDENCIES"
+This variable is the same as \fB\s-1DEPENDENCIES_OUTPUT\s0\fR (see above),
+except that system header files are not ignored, so it implies
+\&\fB\-M\fR rather than \fB\-MM\fR.  However, the dependence on the
+main input file is omitted.
+.SH "BUGS"
+.IX Header "BUGS"
+For instructions on reporting bugs, see
+<\fBhttp://gcc.gnu.org/bugs.html\fR>.
+.SH "FOOTNOTES"
+.IX Header "FOOTNOTES"
+.IP "1." 4
+On some systems, \fBgcc \-shared\fR
+needs to build supplementary stub code for constructors to work.  On
+multi-libbed systems, \fBgcc \-shared\fR must select the correct support
+libraries to link against.  Failing to supply the correct flags may lead
+to subtle defects.  Supplying them in cases where they are not necessary
+is innocuous.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
+\&\fIcpp\fR\|(1), \fIgcov\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), \fIgdb\fR\|(1), \fIadb\fR\|(1), \fIdbx\fR\|(1), \fIsdb\fR\|(1)
+and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIas\fR,
+\&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
+.SH "AUTHOR"
+.IX Header "AUTHOR"
+See the Info entry for \fBgcc\fR, or
+<\fBhttp://gcc.gnu.org/onlinedocs/gcc/Contributors.html\fR>,
+for contributors to \s-1GCC\s0.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
+Free Software\*(R", the Front-Cover texts being (a) (see below), and with
+the Back-Cover Texts being (b) (see below).  A copy of the license is
+included in the \fIgfdl\fR\|(7) man page.
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\&     A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\&     You have freedom to copy and modify this GNU Manual, like GNU
+\&     software.  Copies published by the Free Software Foundation raise
+\&     funds for GNU development.
+.Ve
diff --git a/gcc/doc/gcc.info b/gcc/doc/gcc.info
new file mode 100644
index 000000000..05ac725e6
--- /dev/null
+++ b/gcc/doc/gcc.info
@@ -0,0 +1,48624 @@
+This is doc/gcc.info, produced by makeinfo version 4.13 from
+/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/doc/gcc.texi.
+
+Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+Free Software Foundation, Inc.
+
+ Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being "Funding Free Software", the Front-Cover Texts
+being (a) (see below), and with the Back-Cover Texts being (b) (see
+below).  A copy of the license is included in the section entitled "GNU
+Free Documentation License".
+
+ (a) The FSF's Front-Cover Text is:
+
+ A GNU Manual
+
+ (b) The FSF's Back-Cover Text is:
+
+ You have freedom to copy and modify this GNU Manual, like GNU
+software.  Copies published by the Free Software Foundation raise
+funds for GNU development.
+
+INFO-DIR-SECTION Software development
+START-INFO-DIR-ENTRY
+* gcc: (gcc).                  The GNU Compiler Collection.
+* g++: (gcc).                  The GNU C++ compiler.
+END-INFO-DIR-ENTRY
+ This file documents the use of the GNU compilers.
+
+ Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+Free Software Foundation, Inc.
+
+ Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being "Funding Free Software", the Front-Cover Texts
+being (a) (see below), and with the Back-Cover Texts being (b) (see
+below).  A copy of the license is included in the section entitled "GNU
+Free Documentation License".
+
+ (a) The FSF's Front-Cover Text is:
+
+ A GNU Manual
+
+ (b) The FSF's Back-Cover Text is:
+
+ You have freedom to copy and modify this GNU Manual, like GNU
+software.  Copies published by the Free Software Foundation raise
+funds for GNU development.
+
+
+
+File: gcc.info,  Node: Top,  Next: G++ and GCC,  Up: (DIR)
+
+Introduction
+************
+
+This manual documents how to use the GNU compilers, as well as their
+features and incompatibilities, and how to report bugs.  It corresponds
+to the compilers (GCC) version 4.6.4.  The internals of the GNU
+compilers, including how to port them to new targets and some
+information about how to write front ends for new languages, are
+documented in a separate manual.  *Note Introduction: (gccint)Top.
+
+* Menu:
+
+* G++ and GCC::     You can compile C or C++ programs.
+* Standards::       Language standards supported by GCC.
+* Invoking GCC::    Command options supported by `gcc'.
+* C Implementation:: How GCC implements the ISO C specification.
+* C Extensions::    GNU extensions to the C language family.
+* C++ Implementation:: How GCC implements the ISO C++ specification.
+* C++ Extensions::  GNU extensions to the C++ language.
+* Objective-C::     GNU Objective-C runtime features.
+* Compatibility::   Binary Compatibility
+* Gcov::            `gcov'---a test coverage program.
+* Trouble::         If you have trouble using GCC.
+* Bugs::            How, why and where to report bugs.
+* Service::         How to find suppliers of support for GCC.
+* Contributing::    How to contribute to testing and developing GCC.
+
+* Funding::         How to help assure funding for free software.
+* GNU Project::     The GNU Project and GNU/Linux.
+
+* Copying::         GNU General Public License says
+                    how you can copy and share GCC.
+* GNU Free Documentation License:: How you can copy and share this manual.
+* Contributors::    People who have contributed to GCC.
+
+* Option Index::    Index to command line options.
+* Keyword Index::   Index of concepts and symbol names.
+
+
+File: gcc.info,  Node: G++ and GCC,  Next: Standards,  Prev: Top,  Up: Top
+
+1 Programming Languages Supported by GCC
+****************************************
+
+GCC stands for "GNU Compiler Collection".  GCC is an integrated
+distribution of compilers for several major programming languages.
+These languages currently include C, C++, Objective-C, Objective-C++,
+Java, Fortran, Ada, and Go.
+
+ The abbreviation "GCC" has multiple meanings in common use.  The
+current official meaning is "GNU Compiler Collection", which refers
+generically to the complete suite of tools.  The name historically stood
+for "GNU C Compiler", and this usage is still common when the emphasis
+is on compiling C programs.  Finally, the name is also used when
+speaking of the "language-independent" component of GCC: code shared
+among the compilers for all supported languages.
+
+ The language-independent component of GCC includes the majority of the
+optimizers, as well as the "back ends" that generate machine code for
+various processors.
+
+ The part of a compiler that is specific to a particular language is
+called the "front end".  In addition to the front ends that are
+integrated components of GCC, there are several other front ends that
+are maintained separately.  These support languages such as Pascal,
+Mercury, and COBOL.  To use these, they must be built together with GCC
+proper.
+
+ Most of the compilers for languages other than C have their own names.
+The C++ compiler is G++, the Ada compiler is GNAT, and so on.  When we
+talk about compiling one of those languages, we might refer to that
+compiler by its own name, or as GCC.  Either is correct.
+
+ Historically, compilers for many languages, including C++ and Fortran,
+have been implemented as "preprocessors" which emit another high level
+language such as C.  None of the compilers included in GCC are
+implemented this way; they all generate machine code directly.  This
+sort of preprocessor should not be confused with the "C preprocessor",
+which is an integral feature of the C, C++, Objective-C and
+Objective-C++ languages.
+
+
+File: gcc.info,  Node: Standards,  Next: Invoking GCC,  Prev: G++ and GCC,  Up: Top
+
+2 Language Standards Supported by GCC
+*************************************
+
+For each language compiled by GCC for which there is a standard, GCC
+attempts to follow one or more versions of that standard, possibly with
+some exceptions, and possibly with some extensions.
+
+2.1 C language
+==============
+
+GCC supports three versions of the C standard, although support for the
+most recent version is not yet complete.
+
+ The original ANSI C standard (X3.159-1989) was ratified in 1989 and
+published in 1990.  This standard was ratified as an ISO standard
+(ISO/IEC 9899:1990) later in 1990.  There were no technical differences
+between these publications, although the sections of the ANSI standard
+were renumbered and became clauses in the ISO standard.  This standard,
+in both its forms, is commonly known as "C89", or occasionally as
+"C90", from the dates of ratification.  The ANSI standard, but not the
+ISO standard, also came with a Rationale document.  To select this
+standard in GCC, use one of the options `-ansi', `-std=c90' or
+`-std=iso9899:1990'; to obtain all the diagnostics required by the
+standard, you should also specify `-pedantic' (or `-pedantic-errors' if
+you want them to be errors rather than warnings).  *Note Options
+Controlling C Dialect: C Dialect Options.
+
+ Errors in the 1990 ISO C standard were corrected in two Technical
+Corrigenda published in 1994 and 1996.  GCC does not support the
+uncorrected version.
+
+ An amendment to the 1990 standard was published in 1995.  This
+amendment added digraphs and `__STDC_VERSION__' to the language, but
+otherwise concerned the library.  This amendment is commonly known as
+"AMD1"; the amended standard is sometimes known as "C94" or "C95".  To
+select this standard in GCC, use the option `-std=iso9899:199409'
+(with, as for other standard versions, `-pedantic' to receive all
+required diagnostics).
+
+ A new edition of the ISO C standard was published in 1999 as ISO/IEC
+9899:1999, and is commonly known as "C99".  GCC has incomplete support
+for this standard version; see
+`http://gcc.gnu.org/gcc-4.6/c99status.html' for details.  To select this
+standard, use `-std=c99' or `-std=iso9899:1999'.  (While in
+development, drafts of this standard version were referred to as "C9X".)
+
+ Errors in the 1999 ISO C standard were corrected in three Technical
+Corrigenda published in 2001, 2004 and 2007.  GCC does not support the
+uncorrected version.
+
+ A fourth version of the C standard, known as "C1X", is under
+development; GCC has limited preliminary support for parts of this
+standard, enabled with `-std=c1x'.
+
+ By default, GCC provides some extensions to the C language that on
+rare occasions conflict with the C standard.  *Note Extensions to the C
+Language Family: C Extensions.  Use of the `-std' options listed above
+will disable these extensions where they conflict with the C standard
+version selected.  You may also select an extended version of the C
+language explicitly with `-std=gnu90' (for C90 with GNU extensions),
+`-std=gnu99' (for C99 with GNU extensions) or `-std=gnu1x' (for C1X
+with GNU extensions).  The default, if no C language dialect options
+are given, is `-std=gnu90'; this will change to `-std=gnu99' in some
+future release when the C99 support is complete.  Some features that
+are part of the C99 standard are accepted as extensions in C90 mode.
+
+ The ISO C standard defines (in clause 4) two classes of conforming
+implementation.  A "conforming hosted implementation" supports the
+whole standard including all the library facilities; a "conforming
+freestanding implementation" is only required to provide certain
+library facilities: those in `<float.h>', `<limits.h>', `<stdarg.h>',
+and `<stddef.h>'; since AMD1, also those in `<iso646.h>'; and in C99,
+also those in `<stdbool.h>' and `<stdint.h>'.  In addition, complex
+types, added in C99, are not required for freestanding implementations.
+The standard also defines two environments for programs, a
+"freestanding environment", required of all implementations and which
+may not have library facilities beyond those required of freestanding
+implementations, where the handling of program startup and termination
+are implementation-defined, and a "hosted environment", which is not
+required, in which all the library facilities are provided and startup
+is through a function `int main (void)' or `int main (int, char *[])'.
+An OS kernel would be a freestanding environment; a program using the
+facilities of an operating system would normally be in a hosted
+implementation.
+
+ GCC aims towards being usable as a conforming freestanding
+implementation, or as the compiler for a conforming hosted
+implementation.  By default, it will act as the compiler for a hosted
+implementation, defining `__STDC_HOSTED__' as `1' and presuming that
+when the names of ISO C functions are used, they have the semantics
+defined in the standard.  To make it act as a conforming freestanding
+implementation for a freestanding environment, use the option
+`-ffreestanding'; it will then define `__STDC_HOSTED__' to `0' and not
+make assumptions about the meanings of function names from the standard
+library, with exceptions noted below.  To build an OS kernel, you may
+well still need to make your own arrangements for linking and startup.
+*Note Options Controlling C Dialect: C Dialect Options.
+
+ GCC does not provide the library facilities required only of hosted
+implementations, nor yet all the facilities required by C99 of
+freestanding implementations; to use the facilities of a hosted
+environment, you will need to find them elsewhere (for example, in the
+GNU C library).  *Note Standard Libraries: Standard Libraries.
+
+ Most of the compiler support routines used by GCC are present in
+`libgcc', but there are a few exceptions.  GCC requires the
+freestanding environment provide `memcpy', `memmove', `memset' and
+`memcmp'.  Finally, if `__builtin_trap' is used, and the target does
+not implement the `trap' pattern, then GCC will emit a call to `abort'.
+
+ For references to Technical Corrigenda, Rationale documents and
+information concerning the history of C that is available online, see
+`http://gcc.gnu.org/readings.html'
+
+2.2 C++ language
+================
+
+GCC supports the ISO C++ standard (1998) and contains experimental
+support for the upcoming ISO C++ standard (200x).
+
+ The original ISO C++ standard was published as the ISO standard
+(ISO/IEC 14882:1998) and amended by a Technical Corrigenda published in
+2003 (ISO/IEC 14882:2003). These standards are referred to as C++98 and
+C++03, respectively. GCC implements the majority of C++98 (`export' is
+a notable exception) and most of the changes in C++03.  To select this
+standard in GCC, use one of the options `-ansi' or `-std=c++98'; to
+obtain all the diagnostics required by the standard, you should also
+specify `-pedantic' (or `-pedantic-errors' if you want them to be
+errors rather than warnings).
+
+ The ISO C++ committee is working on a new ISO C++ standard, dubbed
+C++0x, that is intended to be published by 2009. C++0x contains several
+changes to the C++ language, some of which have been implemented in an
+experimental C++0x mode in GCC. The C++0x mode in GCC tracks the draft
+working paper for the C++0x standard; the latest working paper is
+available on the ISO C++ committee's web site at
+`http://www.open-std.org/jtc1/sc22/wg21/'. For information regarding
+the C++0x features available in the experimental C++0x mode, see
+`http://gcc.gnu.org/projects/cxx0x.html'. To select this standard in
+GCC, use the option `-std=c++0x'; to obtain all the diagnostics
+required by the standard, you should also specify `-pedantic' (or
+`-pedantic-errors' if you want them to be errors rather than warnings).
+
+ By default, GCC provides some extensions to the C++ language; *Note
+Options Controlling C++ Dialect: C++ Dialect Options.  Use of the
+`-std' option listed above will disable these extensions.  You may also
+select an extended version of the C++ language explicitly with
+`-std=gnu++98' (for C++98 with GNU extensions) or `-std=gnu++0x' (for
+C++0x with GNU extensions).  The default, if no C++ language dialect
+options are given, is `-std=gnu++98'.
+
+2.3 Objective-C and Objective-C++ languages
+===========================================
+
+GCC supports "traditional" Objective-C (also known as "Objective-C
+1.0") and contains support for the Objective-C exception and
+synchronization syntax.  It has also support for a number of
+"Objective-C 2.0" language extensions, including properties, fast
+enumeration (only for Objective-C), method attributes and the @optional
+and @required keywords in protocols.  GCC supports Objective-C++ and
+features available in Objective-C are also available in Objective-C++.
+
+ GCC by default uses the GNU Objective-C runtime library, which is part
+of GCC and is not the same as the Apple/NeXT Objective-C runtime
+library used on Apple systems.  There are a number of differences
+documented in this manual.  The options `-fgnu-runtime' and
+`-fnext-runtime' allow you to switch between producing output that
+works with the GNU Objective-C runtime library and output that works
+with the Apple/NeXT Objective-C runtime library.
+
+ There is no formal written standard for Objective-C or Objective-C++.
+The authoritative manual on traditional Objective-C (1.0) is
+"Object-Oriented Programming and the Objective-C Language", available
+at a number of web sites:
+   * `http://www.gnustep.org/resources/documentation/ObjectivCBook.pdf'
+     is the original NeXTstep document;
+
+   * `http://objc.toodarkpark.net' is the same document in another
+     format;
+
+   *
+     `http://developer.apple.com/mac/library/documentation/Cocoa/Conceptual/ObjectiveC/'
+     has an updated version but make sure you search for "Object
+     Oriented Programming and the Objective-C Programming Language 1.0",
+     not documentation on the newer "Objective-C 2.0" language
+
+ The Objective-C exception and synchronization syntax (that is, the
+keywords @try, @throw, @catch, @finally and @synchronized) is supported
+by GCC and is enabled with the option `-fobjc-exceptions'.  The syntax
+is briefly documented in this manual and in the Objective-C 2.0 manuals
+from Apple.
+
+ The Objective-C 2.0 language extensions and features are automatically
+enabled; they include properties (via the @property, @synthesize and
+@dynamic keywords), fast enumeration (not available in Objective-C++),
+attributes for methods (such as deprecated, noreturn, sentinel,
+format), the unused attribute for method arguments, the @package
+keyword for instance variables and the @optional and @required keywords
+in protocols.  You can disable all these Objective-C 2.0 language
+extensions with the option `-fobjc-std=objc1', which causes the
+compiler to recognize the same Objective-C language syntax recognized
+by GCC 4.0, and to produce an error if one of the new features is used.
+
+ GCC has currently no support for non-fragile instance variables.
+
+ The authoritative manual on Objective-C 2.0 is available from Apple:
+   *
+     `http://developer.apple.com/mac/library/documentation/Cocoa/Conceptual/ObjectiveC/'
+
+ For more information concerning the history of Objective-C that is
+available online, see `http://gcc.gnu.org/readings.html'
+
+2.4 Go language
+===============
+
+The Go language continues to evolve as of this writing; see the current
+language specifications (http://golang.org/doc/go_spec.html).  At
+present there are no specific versions of Go, and there is no way to
+describe the language supported by GCC in terms of a specific version.
+In general GCC tracks the evolving specification closely, and any given
+release will support the language as of the date that the release was
+frozen.
+
+2.5 References for other languages
+==================================
+
+*Note GNAT Reference Manual: (gnat_rm)Top, for information on standard
+conformance and compatibility of the Ada compiler.
+
+ *Note Standards: (gfortran)Standards, for details of standards
+supported by GNU Fortran.
+
+ *Note Compatibility with the Java Platform: (gcj)Compatibility, for
+details of compatibility between `gcj' and the Java Platform.
+
+
+File: gcc.info,  Node: Invoking GCC,  Next: C Implementation,  Prev: Standards,  Up: Top
+
+3 GCC Command Options
+*********************
+
+When you invoke GCC, it normally does preprocessing, compilation,
+assembly and linking.  The "overall options" allow you to stop this
+process at an intermediate stage.  For example, the `-c' option says
+not to run the linker.  Then the output consists of object files output
+by the assembler.
+
+ Other options are passed on to one stage of processing.  Some options
+control the preprocessor and others the compiler itself.  Yet other
+options control the assembler and linker; most of these are not
+documented here, since you rarely need to use any of them.
+
+ Most of the command line options that you can use with GCC are useful
+for C programs; when an option is only useful with another language
+(usually C++), the explanation says so explicitly.  If the description
+for a particular option does not mention a source language, you can use
+that option with all supported languages.
+
+ *Note Compiling C++ Programs: Invoking G++, for a summary of special
+options for compiling C++ programs.
+
+ The `gcc' program accepts options and file names as operands.  Many
+options have multi-letter names; therefore multiple single-letter
+options may _not_ be grouped: `-dv' is very different from `-d -v'.
+
+ You can mix options and other arguments.  For the most part, the order
+you use doesn't matter.  Order does matter when you use several options
+of the same kind; for example, if you specify `-L' more than once, the
+directories are searched in the order specified.  Also, the placement
+of the `-l' option is significant.
+
+ Many options have long names starting with `-f' or with `-W'--for
+example, `-fmove-loop-invariants', `-Wformat' and so on.  Most of these
+have both positive and negative forms; the negative form of `-ffoo'
+would be `-fno-foo'.  This manual documents only one of these two
+forms, whichever one is not the default.
+
+ *Note Option Index::, for an index to GCC's options.
+
+* Menu:
+
+* Option Summary::      Brief list of all options, without explanations.
+* Overall Options::     Controlling the kind of output:
+                        an executable, object files, assembler files,
+                        or preprocessed source.
+* Invoking G++::        Compiling C++ programs.
+* C Dialect Options::   Controlling the variant of C language compiled.
+* C++ Dialect Options:: Variations on C++.
+* Objective-C and Objective-C++ Dialect Options:: Variations on Objective-C
+                        and Objective-C++.
+* Language Independent Options:: Controlling how diagnostics should be
+                        formatted.
+* Warning Options::     How picky should the compiler be?
+* Debugging Options::   Symbol tables, measurements, and debugging dumps.
+* Optimize Options::    How much optimization?
+* Preprocessor Options:: Controlling header files and macro definitions.
+                         Also, getting dependency information for Make.
+* Assembler Options::   Passing options to the assembler.
+* Link Options::        Specifying libraries and so on.
+* Directory Options::   Where to find header files and libraries.
+                        Where to find the compiler executable files.
+* Spec Files::          How to pass switches to sub-processes.
+* Target Options::      Running a cross-compiler, or an old version of GCC.
+* Submodel Options::    Specifying minor hardware or convention variations,
+                        such as 68010 vs 68020.
+* Code Gen Options::    Specifying conventions for function calls, data layout
+                        and register usage.
+* Environment Variables:: Env vars that affect GCC.
+* Precompiled Headers:: Compiling a header once, and using it many times.
+
+
+File: gcc.info,  Node: Option Summary,  Next: Overall Options,  Up: Invoking GCC
+
+3.1 Option Summary
+==================
+
+Here is a summary of all the options, grouped by type.  Explanations are
+in the following sections.
+
+_Overall Options_
+     *Note Options Controlling the Kind of Output: Overall Options.
+          -c  -S  -E  -o FILE  -no-canonical-prefixes
+          -pipe  -pass-exit-codes
+          -x LANGUAGE  -v  -###  --help[=CLASS[,...]]  --target-help
+          --version -wrapper @FILE -fplugin=FILE -fplugin-arg-NAME=ARG
+          -fdump-ada-spec[-slim] -fdump-go-spec=FILE
+
+_C Language Options_
+     *Note Options Controlling C Dialect: C Dialect Options.
+          -ansi  -std=STANDARD  -fgnu89-inline
+          -aux-info FILENAME
+          -fno-asm  -fno-builtin  -fno-builtin-FUNCTION
+          -fhosted  -ffreestanding -fopenmp -fms-extensions -fplan9-extensions
+          -trigraphs  -no-integrated-cpp  -traditional  -traditional-cpp
+          -fallow-single-precision  -fcond-mismatch -flax-vector-conversions
+          -fsigned-bitfields  -fsigned-char
+          -funsigned-bitfields  -funsigned-char
+
+_C++ Language Options_
+     *Note Options Controlling C++ Dialect: C++ Dialect Options.
+          -fabi-version=N  -fno-access-control  -fcheck-new
+          -fconserve-space  -fconstexpr-depth=N  -ffriend-injection
+          -fno-elide-constructors
+          -fno-enforce-eh-specs
+          -ffor-scope  -fno-for-scope  -fno-gnu-keywords
+          -fno-implicit-templates
+          -fno-implicit-inline-templates
+          -fno-implement-inlines  -fms-extensions
+          -fno-nonansi-builtins  -fnothrow-opt  -fno-operator-names
+          -fno-optional-diags  -fpermissive
+          -fno-pretty-templates
+          -frepo  -fno-rtti  -fstats  -ftemplate-depth=N
+          -fno-threadsafe-statics -fuse-cxa-atexit  -fno-weak  -nostdinc++
+          -fno-default-inline  -fvisibility-inlines-hidden
+          -fvisibility-ms-compat
+          -Wabi  -Wconversion-null  -Wctor-dtor-privacy
+          -Wnoexcept -Wnon-virtual-dtor  -Wreorder
+          -Weffc++  -Wstrict-null-sentinel
+          -Wno-non-template-friend  -Wold-style-cast
+          -Woverloaded-virtual  -Wno-pmf-conversions
+          -Wsign-promo
+
+_Objective-C and Objective-C++ Language Options_
+     *Note Options Controlling Objective-C and Objective-C++ Dialects:
+     Objective-C and Objective-C++ Dialect Options.
+          -fconstant-string-class=CLASS-NAME
+          -fgnu-runtime  -fnext-runtime
+          -fno-nil-receivers
+          -fobjc-abi-version=N
+          -fobjc-call-cxx-cdtors
+          -fobjc-direct-dispatch
+          -fobjc-exceptions
+          -fobjc-gc
+          -fobjc-nilcheck
+          -fobjc-std=objc1
+          -freplace-objc-classes
+          -fzero-link
+          -gen-decls
+          -Wassign-intercept
+          -Wno-protocol  -Wselector
+          -Wstrict-selector-match
+          -Wundeclared-selector
+
+_Language Independent Options_
+     *Note Options to Control Diagnostic Messages Formatting: Language
+     Independent Options.
+          -fmessage-length=N
+          -fdiagnostics-show-location=[once|every-line]
+          -fno-diagnostics-show-option
+
+_Warning Options_
+     *Note Options to Request or Suppress Warnings: Warning Options.
+          -fsyntax-only  -fmax-errors=N  -pedantic
+          -pedantic-errors
+          -w  -Wextra  -Wall  -Waddress  -Waggregate-return  -Warray-bounds
+          -Wno-attributes -Wno-builtin-macro-redefined
+          -Wc++-compat -Wc++0x-compat -Wcast-align  -Wcast-qual
+          -Wchar-subscripts -Wclobbered  -Wcomment
+          -Wconversion  -Wcoverage-mismatch  -Wno-cpp  -Wno-deprecated
+          -Wno-deprecated-declarations -Wdisabled-optimization
+          -Wno-div-by-zero -Wdouble-promotion -Wempty-body  -Wenum-compare
+          -Wno-endif-labels -Werror  -Werror=*
+          -Wfatal-errors  -Wfloat-equal  -Wformat  -Wformat=2
+          -Wno-format-contains-nul -Wno-format-extra-args -Wformat-nonliteral
+          -Wformat-security  -Wformat-y2k
+          -Wframe-larger-than=LEN -Wjump-misses-init -Wignored-qualifiers
+          -Wimplicit  -Wimplicit-function-declaration  -Wimplicit-int
+          -Winit-self  -Winline
+          -Wno-int-to-pointer-cast -Wno-invalid-offsetof
+          -Winvalid-pch -Wlarger-than=LEN  -Wunsafe-loop-optimizations
+          -Wlogical-op -Wlong-long
+          -Wmain  -Wmissing-braces  -Wmissing-field-initializers
+          -Wmissing-format-attribute  -Wmissing-include-dirs
+          -Wno-mudflap
+          -Wno-multichar  -Wnonnull  -Wno-overflow
+          -Woverlength-strings  -Wpacked  -Wpacked-bitfield-compat  -Wpadded
+          -Wparentheses  -Wpedantic-ms-format -Wno-pedantic-ms-format
+          -Wpointer-arith  -Wno-pointer-to-int-cast
+          -Wredundant-decls
+          -Wreturn-type  -Wsequence-point  -Wshadow
+          -Wsign-compare  -Wsign-conversion  -Wstack-protector
+          -Wstrict-aliasing -Wstrict-aliasing=n
+          -Wstrict-overflow -Wstrict-overflow=N
+          -Wsuggest-attribute=[pure|const|noreturn]
+          -Wswitch  -Wswitch-default  -Wswitch-enum -Wsync-nand
+          -Wsystem-headers  -Wtrampolines  -Wtrigraphs  -Wtype-limits  -Wundef
+          -Wuninitialized  -Wunknown-pragmas  -Wno-pragmas
+          -Wunsuffixed-float-constants  -Wunused  -Wunused-function
+          -Wunused-label  -Wunused-parameter -Wno-unused-result -Wunused-value
+          -Wunused-variable -Wunused-but-set-parameter -Wunused-but-set-variable
+          -Wvariadic-macros -Wvla -Wvolatile-register-var  -Wwrite-strings
+
+_C and Objective-C-only Warning Options_
+          -Wbad-function-cast  -Wmissing-declarations
+          -Wmissing-parameter-type  -Wmissing-prototypes  -Wnested-externs
+          -Wold-style-declaration  -Wold-style-definition
+          -Wstrict-prototypes  -Wtraditional  -Wtraditional-conversion
+          -Wdeclaration-after-statement -Wpointer-sign
+
+_Debugging Options_
+     *Note Options for Debugging Your Program or GCC: Debugging Options.
+          -dLETTERS  -dumpspecs  -dumpmachine  -dumpversion
+          -fdbg-cnt-list -fdbg-cnt=COUNTER-VALUE-LIST
+          -fdump-noaddr -fdump-unnumbered -fdump-unnumbered-links
+          -fdump-translation-unit[-N]
+          -fdump-class-hierarchy[-N]
+          -fdump-ipa-all -fdump-ipa-cgraph -fdump-ipa-inline
+          -fdump-statistics
+          -fdump-tree-all
+          -fdump-tree-original[-N]
+          -fdump-tree-optimized[-N]
+          -fdump-tree-cfg -fdump-tree-vcg -fdump-tree-alias
+          -fdump-tree-ch
+          -fdump-tree-ssa[-N] -fdump-tree-pre[-N]
+          -fdump-tree-ccp[-N] -fdump-tree-dce[-N]
+          -fdump-tree-gimple[-raw] -fdump-tree-mudflap[-N]
+          -fdump-tree-dom[-N]
+          -fdump-tree-dse[-N]
+          -fdump-tree-phiprop[-N]
+          -fdump-tree-phiopt[-N]
+          -fdump-tree-forwprop[-N]
+          -fdump-tree-copyrename[-N]
+          -fdump-tree-nrv -fdump-tree-vect
+          -fdump-tree-sink
+          -fdump-tree-sra[-N]
+          -fdump-tree-forwprop[-N]
+          -fdump-tree-fre[-N]
+          -fdump-tree-vrp[-N]
+          -ftree-vectorizer-verbose=N
+          -fdump-tree-storeccp[-N]
+          -fdump-final-insns=FILE
+          -fcompare-debug[=OPTS]  -fcompare-debug-second
+          -feliminate-dwarf2-dups -feliminate-unused-debug-types
+          -feliminate-unused-debug-symbols -femit-class-debug-always
+          -fenable-icf-debug
+          -fmem-report -fpre-ipa-mem-report -fpost-ipa-mem-report -fprofile-arcs
+          -frandom-seed=STRING -fsched-verbose=N
+          -fsel-sched-verbose -fsel-sched-dump-cfg -fsel-sched-pipelining-verbose
+          -fstack-usage  -ftest-coverage  -ftime-report -fvar-tracking
+          -fvar-tracking-assignments  -fvar-tracking-assignments-toggle
+          -g  -gLEVEL  -gtoggle  -gcoff  -gdwarf-VERSION
+          -ggdb  -gstabs  -gstabs+  -gstrict-dwarf  -gno-strict-dwarf
+          -gvms  -gxcoff  -gxcoff+
+          -fno-merge-debug-strings -fno-dwarf2-cfi-asm
+          -fdebug-prefix-map=OLD=NEW
+          -femit-struct-debug-baseonly -femit-struct-debug-reduced
+          -femit-struct-debug-detailed[=SPEC-LIST]
+          -p  -pg  -print-file-name=LIBRARY  -print-libgcc-file-name
+          -print-multi-directory  -print-multi-lib  -print-multi-os-directory
+          -print-prog-name=PROGRAM  -print-search-dirs  -Q
+          -print-sysroot -print-sysroot-headers-suffix
+          -save-temps -save-temps=cwd -save-temps=obj -time[=FILE]
+
+_Optimization Options_
+     *Note Options that Control Optimization: Optimize Options.
+          -falign-functions[=N] -falign-jumps[=N]
+          -falign-labels[=N] -falign-loops[=N] -fassociative-math
+          -fauto-inc-dec -fbranch-probabilities -fbranch-target-load-optimize
+          -fbranch-target-load-optimize2 -fbtr-bb-exclusive -fcaller-saves
+          -fcheck-data-deps -fcombine-stack-adjustments -fconserve-stack
+          -fcompare-elim -fcprop-registers -fcrossjumping
+          -fcse-follow-jumps -fcse-skip-blocks -fcx-fortran-rules
+          -fcx-limited-range
+          -fdata-sections -fdce -fdce -fdelayed-branch
+          -fdelete-null-pointer-checks -fdse -fdevirtualize -fdse
+          -fearly-inlining -fipa-sra -fexpensive-optimizations -ffast-math
+          -ffinite-math-only -ffloat-store -fexcess-precision=STYLE
+          -fforward-propagate -ffp-contract=STYLE -ffunction-sections
+          -fgcse -fgcse-after-reload -fgcse-las -fgcse-lm -fgraphite-identity
+          -fgcse-sm -fif-conversion -fif-conversion2 -findirect-inlining
+          -finline-functions -finline-functions-called-once -finline-limit=N
+          -finline-small-functions -fipa-cp -fipa-cp-clone -fipa-matrix-reorg
+          -fipa-pta -fipa-profile -fipa-pure-const -fipa-reference
+          -fipa-struct-reorg -fira-algorithm=ALGORITHM
+          -fira-region=REGION
+          -fira-loop-pressure -fno-ira-share-save-slots
+          -fno-ira-share-spill-slots -fira-verbose=N
+          -fivopts -fkeep-inline-functions -fkeep-static-consts
+          -floop-block -floop-flatten -floop-interchange -floop-strip-mine
+          -floop-parallelize-all -flto -flto-compression-level
+          -flto-partition=ALG -flto-report -fmerge-all-constants
+          -fmerge-constants -fmodulo-sched -fmodulo-sched-allow-regmoves
+          -fmove-loop-invariants fmudflap -fmudflapir -fmudflapth -fno-branch-count-reg
+          -fno-default-inline
+          -fno-defer-pop -fno-function-cse -fno-guess-branch-probability
+          -fno-inline -fno-math-errno -fno-peephole -fno-peephole2
+          -fno-sched-interblock -fno-sched-spec -fno-signed-zeros
+          -fno-toplevel-reorder -fno-trapping-math -fno-zero-initialized-in-bss
+          -fomit-frame-pointer -foptimize-register-move -foptimize-sibling-calls
+          -fpartial-inlining -fpeel-loops -fpredictive-commoning
+          -fprefetch-loop-arrays
+          -fprofile-correction -fprofile-dir=PATH -fprofile-generate
+          -fprofile-generate=PATH
+          -fprofile-use -fprofile-use=PATH -fprofile-values
+          -freciprocal-math -fregmove -frename-registers -freorder-blocks
+          -freorder-blocks-and-partition -freorder-functions
+          -frerun-cse-after-loop -freschedule-modulo-scheduled-loops
+          -frounding-math -fsched2-use-superblocks -fsched-pressure
+          -fsched-spec-load -fsched-spec-load-dangerous
+          -fsched-stalled-insns-dep[=N] -fsched-stalled-insns[=N]
+          -fsched-group-heuristic -fsched-critical-path-heuristic
+          -fsched-spec-insn-heuristic -fsched-rank-heuristic
+          -fsched-last-insn-heuristic -fsched-dep-count-heuristic
+          -fschedule-insns -fschedule-insns2 -fsection-anchors
+          -fselective-scheduling -fselective-scheduling2
+          -fsel-sched-pipelining -fsel-sched-pipelining-outer-loops
+          -fsignaling-nans -fsingle-precision-constant -fsplit-ivs-in-unroller
+          -fsplit-wide-types -fstack-protector -fstack-protector-all
+          -fstrict-aliasing -fstrict-overflow -fthread-jumps -ftracer
+          -ftree-bit-ccp
+          -ftree-builtin-call-dce -ftree-ccp -ftree-ch -ftree-copy-prop
+          -ftree-copyrename -ftree-dce -ftree-dominator-opts -ftree-dse
+          -ftree-forwprop -ftree-fre -ftree-loop-if-convert
+          -ftree-loop-if-convert-stores -ftree-loop-im
+          -ftree-phiprop -ftree-loop-distribution -ftree-loop-distribute-patterns
+          -ftree-loop-ivcanon -ftree-loop-linear -ftree-loop-optimize
+          -ftree-parallelize-loops=N -ftree-pre -ftree-pta -ftree-reassoc
+          -ftree-sink -ftree-sra -ftree-switch-conversion
+          -ftree-ter -ftree-vect-loop-version -ftree-vectorize -ftree-vrp
+          -funit-at-a-time -funroll-all-loops -funroll-loops
+          -funsafe-loop-optimizations -funsafe-math-optimizations -funswitch-loops
+          -fvariable-expansion-in-unroller -fvect-cost-model -fvpt -fweb
+          -fwhole-program -fwpa -fuse-linker-plugin
+          --param NAME=VALUE
+          -O  -O0  -O1  -O2  -O3  -Os -Ofast
+
+_Preprocessor Options_
+     *Note Options Controlling the Preprocessor: Preprocessor Options.
+          -AQUESTION=ANSWER
+          -A-QUESTION[=ANSWER]
+          -C  -dD  -dI  -dM  -dN
+          -DMACRO[=DEFN]  -E  -H
+          -idirafter DIR
+          -include FILE  -imacros FILE
+          -iprefix FILE  -iwithprefix DIR
+          -iwithprefixbefore DIR  -isystem DIR
+          -imultilib DIR -isysroot DIR
+          -M  -MM  -MF  -MG  -MP  -MQ  -MT  -nostdinc
+          -P  -fworking-directory  -remap
+          -trigraphs  -undef  -UMACRO  -Wp,OPTION
+          -Xpreprocessor OPTION
+
+_Assembler Option_
+     *Note Passing Options to the Assembler: Assembler Options.
+          -Wa,OPTION  -Xassembler OPTION
+
+_Linker Options_
+     *Note Options for Linking: Link Options.
+          OBJECT-FILE-NAME  -lLIBRARY
+          -nostartfiles  -nodefaultlibs  -nostdlib -pie -rdynamic
+          -s  -static  -static-libgcc  -static-libstdc++ -shared
+          -shared-libgcc  -symbolic
+          -T SCRIPT  -Wl,OPTION  -Xlinker OPTION
+          -u SYMBOL
+
+_Directory Options_
+     *Note Options for Directory Search: Directory Options.
+          -BPREFIX -IDIR -iplugindir=DIR
+
+     -iquoteDIR -LDIR -specs=FILE -I- -sysroot=DIR
+
+_Machine Dependent Options_
+     *Note Hardware Models and Configurations: Submodel Options.
+
+     _ARC Options_
+          -EB  -EL
+          -mmangle-cpu  -mcpu=CPU  -mtext=TEXT-SECTION
+          -mdata=DATA-SECTION  -mrodata=READONLY-DATA-SECTION
+
+     _ARM Options_
+          -mapcs-frame  -mno-apcs-frame
+          -mabi=NAME
+          -mapcs-stack-check  -mno-apcs-stack-check
+          -mapcs-float  -mno-apcs-float
+          -mapcs-reentrant  -mno-apcs-reentrant
+          -msched-prolog  -mno-sched-prolog
+          -mlittle-endian  -mbig-endian  -mwords-little-endian
+          -mfloat-abi=NAME  -msoft-float  -mhard-float  -mfpe
+          -mfp16-format=NAME
+          -mthumb-interwork  -mno-thumb-interwork
+          -mcpu=NAME  -march=NAME  -mfpu=NAME
+          -mstructure-size-boundary=N
+          -mabort-on-noreturn
+          -mlong-calls  -mno-long-calls
+          -msingle-pic-base  -mno-single-pic-base
+          -mpic-register=REG
+          -mnop-fun-dllimport
+          -mcirrus-fix-invalid-insns -mno-cirrus-fix-invalid-insns
+          -mpoke-function-name
+          -mthumb  -marm
+          -mtpcs-frame  -mtpcs-leaf-frame
+          -mcaller-super-interworking  -mcallee-super-interworking
+          -mtp=NAME
+          -mword-relocations
+          -mfix-cortex-m3-ldrd
+
+     _AVR Options_
+          -mmcu=MCU  -mno-interrupts
+          -mcall-prologues  -mtiny-stack  -mint8
+
+     _Blackfin Options_
+          -mcpu=CPU[-SIREVISION]
+          -msim -momit-leaf-frame-pointer  -mno-omit-leaf-frame-pointer
+          -mspecld-anomaly  -mno-specld-anomaly  -mcsync-anomaly  -mno-csync-anomaly
+          -mlow-64k -mno-low64k  -mstack-check-l1  -mid-shared-library
+          -mno-id-shared-library  -mshared-library-id=N
+          -mleaf-id-shared-library  -mno-leaf-id-shared-library
+          -msep-data  -mno-sep-data  -mlong-calls  -mno-long-calls
+          -mfast-fp -minline-plt -mmulticore  -mcorea  -mcoreb  -msdram
+          -micplb
+
+     _CRIS Options_
+          -mcpu=CPU  -march=CPU  -mtune=CPU
+          -mmax-stack-frame=N  -melinux-stacksize=N
+          -metrax4  -metrax100  -mpdebug  -mcc-init  -mno-side-effects
+          -mstack-align  -mdata-align  -mconst-align
+          -m32-bit  -m16-bit  -m8-bit  -mno-prologue-epilogue  -mno-gotplt
+          -melf  -maout  -melinux  -mlinux  -sim  -sim2
+          -mmul-bug-workaround  -mno-mul-bug-workaround
+
+     _CRX Options_
+          -mmac -mpush-args
+
+     _Darwin Options_
+          -all_load  -allowable_client  -arch  -arch_errors_fatal
+          -arch_only  -bind_at_load  -bundle  -bundle_loader
+          -client_name  -compatibility_version  -current_version
+          -dead_strip
+          -dependency-file  -dylib_file  -dylinker_install_name
+          -dynamic  -dynamiclib  -exported_symbols_list
+          -filelist  -flat_namespace  -force_cpusubtype_ALL
+          -force_flat_namespace  -headerpad_max_install_names
+          -iframework
+          -image_base  -init  -install_name  -keep_private_externs
+          -multi_module  -multiply_defined  -multiply_defined_unused
+          -noall_load   -no_dead_strip_inits_and_terms
+          -nofixprebinding -nomultidefs  -noprebind  -noseglinkedit
+          -pagezero_size  -prebind  -prebind_all_twolevel_modules
+          -private_bundle  -read_only_relocs  -sectalign
+          -sectobjectsymbols  -whyload  -seg1addr
+          -sectcreate  -sectobjectsymbols  -sectorder
+          -segaddr -segs_read_only_addr -segs_read_write_addr
+          -seg_addr_table  -seg_addr_table_filename  -seglinkedit
+          -segprot  -segs_read_only_addr  -segs_read_write_addr
+          -single_module  -static  -sub_library  -sub_umbrella
+          -twolevel_namespace  -umbrella  -undefined
+          -unexported_symbols_list  -weak_reference_mismatches
+          -whatsloaded -F -gused -gfull -mmacosx-version-min=VERSION
+          -mkernel -mone-byte-bool
+
+     _DEC Alpha Options_
+          -mno-fp-regs  -msoft-float  -malpha-as  -mgas
+          -mieee  -mieee-with-inexact  -mieee-conformant
+          -mfp-trap-mode=MODE  -mfp-rounding-mode=MODE
+          -mtrap-precision=MODE  -mbuild-constants
+          -mcpu=CPU-TYPE  -mtune=CPU-TYPE
+          -mbwx  -mmax  -mfix  -mcix
+          -mfloat-vax  -mfloat-ieee
+          -mexplicit-relocs  -msmall-data  -mlarge-data
+          -msmall-text  -mlarge-text
+          -mmemory-latency=TIME
+
+     _DEC Alpha/VMS Options_
+          -mvms-return-codes -mdebug-main=PREFIX -mmalloc64
+
+     _FR30 Options_
+          -msmall-model -mno-lsim
+
+     _FRV Options_
+          -mgpr-32  -mgpr-64  -mfpr-32  -mfpr-64
+          -mhard-float  -msoft-float
+          -malloc-cc  -mfixed-cc  -mdword  -mno-dword
+          -mdouble  -mno-double
+          -mmedia  -mno-media  -mmuladd  -mno-muladd
+          -mfdpic  -minline-plt -mgprel-ro  -multilib-library-pic
+          -mlinked-fp  -mlong-calls  -malign-labels
+          -mlibrary-pic  -macc-4  -macc-8
+          -mpack  -mno-pack  -mno-eflags  -mcond-move  -mno-cond-move
+          -moptimize-membar -mno-optimize-membar
+          -mscc  -mno-scc  -mcond-exec  -mno-cond-exec
+          -mvliw-branch  -mno-vliw-branch
+          -mmulti-cond-exec  -mno-multi-cond-exec  -mnested-cond-exec
+          -mno-nested-cond-exec  -mtomcat-stats
+          -mTLS -mtls
+          -mcpu=CPU
+
+     _GNU/Linux Options_
+          -mglibc -muclibc -mbionic -mandroid
+          -tno-android-cc -tno-android-ld
+
+     _H8/300 Options_
+          -mrelax  -mh  -ms  -mn  -mint32  -malign-300
+
+     _HPPA Options_
+          -march=ARCHITECTURE-TYPE
+          -mbig-switch  -mdisable-fpregs  -mdisable-indexing
+          -mfast-indirect-calls  -mgas  -mgnu-ld   -mhp-ld
+          -mfixed-range=REGISTER-RANGE
+          -mjump-in-delay -mlinker-opt -mlong-calls
+          -mlong-load-store  -mno-big-switch  -mno-disable-fpregs
+          -mno-disable-indexing  -mno-fast-indirect-calls  -mno-gas
+          -mno-jump-in-delay  -mno-long-load-store
+          -mno-portable-runtime  -mno-soft-float
+          -mno-space-regs  -msoft-float  -mpa-risc-1-0
+          -mpa-risc-1-1  -mpa-risc-2-0  -mportable-runtime
+          -mschedule=CPU-TYPE  -mspace-regs  -msio  -mwsio
+          -munix=UNIX-STD  -nolibdld  -static  -threads
+
+     _i386 and x86-64 Options_
+          -mtune=CPU-TYPE  -march=CPU-TYPE
+          -mfpmath=UNIT
+          -masm=DIALECT  -mno-fancy-math-387
+          -mno-fp-ret-in-387  -msoft-float
+          -mno-wide-multiply  -mrtd  -malign-double
+          -mpreferred-stack-boundary=NUM
+          -mincoming-stack-boundary=NUM
+          -mcld -mcx16 -msahf -mmovbe -mcrc32 -mrecip
+          -mvzeroupper -mprefer-avx128
+          -mmmx  -msse  -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 -mavx
+          -maes -mpclmul -mfsgsbase -mrdrnd -mf16c -mfused-madd
+          -msse4a -m3dnow -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop -mlwp
+          -mthreads  -mno-align-stringops  -minline-all-stringops
+          -minline-stringops-dynamically -mstringop-strategy=ALG
+          -mpush-args  -maccumulate-outgoing-args  -m128bit-long-double
+          -m96bit-long-double  -mregparm=NUM  -msseregparm
+          -mveclibabi=TYPE -mvect8-ret-in-mem
+          -mpc32 -mpc64 -mpc80 -mstackrealign
+          -momit-leaf-frame-pointer  -mno-red-zone -mno-tls-direct-seg-refs
+          -mcmodel=CODE-MODEL -mabi=NAME
+          -m32  -m64 -mlarge-data-threshold=NUM
+          -msse2avx -mfentry -m8bit-idiv
+          -mavx256-split-unaligned-load -mavx256-split-unaligned-store
+
+     _i386 and x86-64 Windows Options_
+          -mconsole -mcygwin -mno-cygwin -mdll
+          -mnop-fun-dllimport -mthread
+          -municode -mwin32 -mwindows -fno-set-stack-executable
+
+     _IA-64 Options_
+          -mbig-endian  -mlittle-endian  -mgnu-as  -mgnu-ld  -mno-pic
+          -mvolatile-asm-stop  -mregister-names  -msdata -mno-sdata
+          -mconstant-gp  -mauto-pic  -mfused-madd
+          -minline-float-divide-min-latency
+          -minline-float-divide-max-throughput
+          -mno-inline-float-divide
+          -minline-int-divide-min-latency
+          -minline-int-divide-max-throughput
+          -mno-inline-int-divide
+          -minline-sqrt-min-latency -minline-sqrt-max-throughput
+          -mno-inline-sqrt
+          -mdwarf2-asm -mearly-stop-bits
+          -mfixed-range=REGISTER-RANGE -mtls-size=TLS-SIZE
+          -mtune=CPU-TYPE -milp32 -mlp64
+          -msched-br-data-spec -msched-ar-data-spec -msched-control-spec
+          -msched-br-in-data-spec -msched-ar-in-data-spec -msched-in-control-spec
+          -msched-spec-ldc -msched-spec-control-ldc
+          -msched-prefer-non-data-spec-insns -msched-prefer-non-control-spec-insns
+          -msched-stop-bits-after-every-cycle -msched-count-spec-in-critical-path
+          -msel-sched-dont-check-control-spec -msched-fp-mem-deps-zero-cost
+          -msched-max-memory-insns-hard-limit -msched-max-memory-insns=MAX-INSNS
+
+     _IA-64/VMS Options_
+          -mvms-return-codes -mdebug-main=PREFIX -mmalloc64
+
+     _LM32 Options_
+          -mbarrel-shift-enabled -mdivide-enabled -mmultiply-enabled
+          -msign-extend-enabled -muser-enabled
+
+     _M32R/D Options_
+          -m32r2 -m32rx -m32r
+          -mdebug
+          -malign-loops -mno-align-loops
+          -missue-rate=NUMBER
+          -mbranch-cost=NUMBER
+          -mmodel=CODE-SIZE-MODEL-TYPE
+          -msdata=SDATA-TYPE
+          -mno-flush-func -mflush-func=NAME
+          -mno-flush-trap -mflush-trap=NUMBER
+          -G NUM
+
+     _M32C Options_
+          -mcpu=CPU -msim -memregs=NUMBER
+
+     _M680x0 Options_
+          -march=ARCH  -mcpu=CPU  -mtune=TUNE
+          -m68000  -m68020  -m68020-40  -m68020-60  -m68030  -m68040
+          -m68060  -mcpu32  -m5200  -m5206e  -m528x  -m5307  -m5407
+          -mcfv4e  -mbitfield  -mno-bitfield  -mc68000  -mc68020
+          -mnobitfield  -mrtd  -mno-rtd  -mdiv  -mno-div  -mshort
+          -mno-short  -mhard-float  -m68881  -msoft-float  -mpcrel
+          -malign-int  -mstrict-align  -msep-data  -mno-sep-data
+          -mshared-library-id=n  -mid-shared-library  -mno-id-shared-library
+          -mxgot -mno-xgot
+
+     _M68hc1x Options_
+          -m6811  -m6812  -m68hc11  -m68hc12   -m68hcs12
+          -mauto-incdec  -minmax  -mlong-calls  -mshort
+          -msoft-reg-count=COUNT
+
+     _MCore Options_
+          -mhardlit  -mno-hardlit  -mdiv  -mno-div  -mrelax-immediates
+          -mno-relax-immediates  -mwide-bitfields  -mno-wide-bitfields
+          -m4byte-functions  -mno-4byte-functions  -mcallgraph-data
+          -mno-callgraph-data  -mslow-bytes  -mno-slow-bytes  -mno-lsim
+          -mlittle-endian  -mbig-endian  -m210  -m340  -mstack-increment
+
+     _MeP Options_
+          -mabsdiff -mall-opts -maverage -mbased=N -mbitops
+          -mc=N -mclip -mconfig=NAME -mcop -mcop32 -mcop64 -mivc2
+          -mdc -mdiv -meb -mel -mio-volatile -ml -mleadz -mm -mminmax
+          -mmult -mno-opts -mrepeat -ms -msatur -msdram -msim -msimnovec -mtf
+          -mtiny=N
+
+     _MicroBlaze Options_
+          -msoft-float -mhard-float -msmall-divides -mcpu=CPU
+          -mmemcpy -mxl-soft-mul -mxl-soft-div -mxl-barrel-shift
+          -mxl-pattern-compare -mxl-stack-check -mxl-gp-opt -mno-clearbss
+          -mxl-multiply-high -mxl-float-convert -mxl-float-sqrt
+          -mxl-mode-APP-MODEL
+
+     _MIPS Options_
+          -EL  -EB  -march=ARCH  -mtune=ARCH
+          -mips1  -mips2  -mips3  -mips4  -mips32  -mips32r2
+          -mips64  -mips64r2
+          -mips16  -mno-mips16  -mflip-mips16
+          -minterlink-mips16  -mno-interlink-mips16
+          -mabi=ABI  -mabicalls  -mno-abicalls
+          -mshared  -mno-shared  -mplt  -mno-plt  -mxgot  -mno-xgot
+          -mgp32  -mgp64  -mfp32  -mfp64  -mhard-float  -msoft-float
+          -msingle-float  -mdouble-float  -mdsp  -mno-dsp  -mdspr2  -mno-dspr2
+          -mfpu=FPU-TYPE
+          -msmartmips  -mno-smartmips
+          -mpaired-single  -mno-paired-single  -mdmx  -mno-mdmx
+          -mips3d  -mno-mips3d  -mmt  -mno-mt  -mllsc  -mno-llsc
+          -mlong64  -mlong32  -msym32  -mno-sym32
+          -GNUM  -mlocal-sdata  -mno-local-sdata
+          -mextern-sdata  -mno-extern-sdata  -mgpopt  -mno-gopt
+          -membedded-data  -mno-embedded-data
+          -muninit-const-in-rodata  -mno-uninit-const-in-rodata
+          -mcode-readable=SETTING
+          -msplit-addresses  -mno-split-addresses
+          -mexplicit-relocs  -mno-explicit-relocs
+          -mcheck-zero-division  -mno-check-zero-division
+          -mdivide-traps  -mdivide-breaks
+          -mmemcpy  -mno-memcpy  -mlong-calls  -mno-long-calls
+          -mmad  -mno-mad  -mfused-madd  -mno-fused-madd  -nocpp
+          -mfix-r4000  -mno-fix-r4000  -mfix-r4400  -mno-fix-r4400
+          -mfix-r10000 -mno-fix-r10000  -mfix-vr4120  -mno-fix-vr4120
+          -mfix-vr4130  -mno-fix-vr4130  -mfix-sb1  -mno-fix-sb1
+          -mflush-func=FUNC  -mno-flush-func
+          -mbranch-cost=NUM  -mbranch-likely  -mno-branch-likely
+          -mfp-exceptions -mno-fp-exceptions
+          -mvr4130-align -mno-vr4130-align -msynci -mno-synci
+          -mrelax-pic-calls -mno-relax-pic-calls -mmcount-ra-address
+
+     _MMIX Options_
+          -mlibfuncs  -mno-libfuncs  -mepsilon  -mno-epsilon  -mabi=gnu
+          -mabi=mmixware  -mzero-extend  -mknuthdiv  -mtoplevel-symbols
+          -melf  -mbranch-predict  -mno-branch-predict  -mbase-addresses
+          -mno-base-addresses  -msingle-exit  -mno-single-exit
+
+     _MN10300 Options_
+          -mmult-bug  -mno-mult-bug
+          -mno-am33 -mam33 -mam33-2 -mam34
+          -mtune=CPU-TYPE
+          -mreturn-pointer-on-d0
+          -mno-crt0  -mrelax -mliw
+
+     _PDP-11 Options_
+          -mfpu  -msoft-float  -mac0  -mno-ac0  -m40  -m45  -m10
+          -mbcopy  -mbcopy-builtin  -mint32  -mno-int16
+          -mint16  -mno-int32  -mfloat32  -mno-float64
+          -mfloat64  -mno-float32  -mabshi  -mno-abshi
+          -mbranch-expensive  -mbranch-cheap
+          -munix-asm  -mdec-asm
+
+     _picoChip Options_
+          -mae=AE_TYPE -mvliw-lookahead=N
+          -msymbol-as-address -mno-inefficient-warnings
+
+     _PowerPC Options_ See RS/6000 and PowerPC Options.
+
+     _RS/6000 and PowerPC Options_
+          -mcpu=CPU-TYPE
+          -mtune=CPU-TYPE
+          -mcmodel=CODE-MODEL
+          -mpower  -mno-power  -mpower2  -mno-power2
+          -mpowerpc  -mpowerpc64  -mno-powerpc
+          -maltivec  -mno-altivec
+          -mpowerpc-gpopt  -mno-powerpc-gpopt
+          -mpowerpc-gfxopt  -mno-powerpc-gfxopt
+          -mmfcrf  -mno-mfcrf  -mpopcntb  -mno-popcntb -mpopcntd -mno-popcntd
+          -mfprnd  -mno-fprnd
+          -mcmpb -mno-cmpb -mmfpgpr -mno-mfpgpr -mhard-dfp -mno-hard-dfp
+          -mnew-mnemonics  -mold-mnemonics
+          -mfull-toc   -mminimal-toc  -mno-fp-in-toc  -mno-sum-in-toc
+          -m64  -m32  -mxl-compat  -mno-xl-compat  -mpe
+          -malign-power  -malign-natural
+          -msoft-float  -mhard-float  -mmultiple  -mno-multiple
+          -msingle-float -mdouble-float -msimple-fpu
+          -mstring  -mno-string  -mupdate  -mno-update
+          -mavoid-indexed-addresses  -mno-avoid-indexed-addresses
+          -mfused-madd  -mno-fused-madd  -mbit-align  -mno-bit-align
+          -mstrict-align  -mno-strict-align  -mrelocatable
+          -mno-relocatable  -mrelocatable-lib  -mno-relocatable-lib
+          -mtoc  -mno-toc  -mlittle  -mlittle-endian  -mbig  -mbig-endian
+          -mdynamic-no-pic  -maltivec -mswdiv  -msingle-pic-base
+          -mprioritize-restricted-insns=PRIORITY
+          -msched-costly-dep=DEPENDENCE_TYPE
+          -minsert-sched-nops=SCHEME
+          -mcall-sysv  -mcall-netbsd
+          -maix-struct-return  -msvr4-struct-return
+          -mabi=ABI-TYPE -msecure-plt -mbss-plt
+          -mblock-move-inline-limit=NUM
+          -misel -mno-isel
+          -misel=yes  -misel=no
+          -mspe -mno-spe
+          -mspe=yes  -mspe=no
+          -mpaired
+          -mgen-cell-microcode -mwarn-cell-microcode
+          -mvrsave -mno-vrsave
+          -mmulhw -mno-mulhw
+          -mdlmzb -mno-dlmzb
+          -mfloat-gprs=yes  -mfloat-gprs=no -mfloat-gprs=single -mfloat-gprs=double
+          -mprototype  -mno-prototype
+          -msim  -mmvme  -mads  -myellowknife  -memb  -msdata
+          -msdata=OPT  -mvxworks  -G NUM  -pthread
+          -mrecip -mrecip=OPT -mno-recip -mrecip-precision
+          -mno-recip-precision
+          -mveclibabi=TYPE -mfriz -mno-friz
+
+     _RX Options_
+          -m64bit-doubles  -m32bit-doubles  -fpu  -nofpu
+          -mcpu=
+          -mbig-endian-data -mlittle-endian-data
+          -msmall-data
+          -msim  -mno-sim
+          -mas100-syntax -mno-as100-syntax
+          -mrelax
+          -mmax-constant-size=
+          -mint-register=
+          -msave-acc-in-interrupts
+
+     _S/390 and zSeries Options_
+          -mtune=CPU-TYPE  -march=CPU-TYPE
+          -mhard-float  -msoft-float  -mhard-dfp -mno-hard-dfp
+          -mlong-double-64 -mlong-double-128
+          -mbackchain  -mno-backchain -mpacked-stack  -mno-packed-stack
+          -msmall-exec  -mno-small-exec  -mmvcle -mno-mvcle
+          -m64  -m31  -mdebug  -mno-debug  -mesa  -mzarch
+          -mtpf-trace -mno-tpf-trace  -mfused-madd  -mno-fused-madd
+          -mwarn-framesize  -mwarn-dynamicstack  -mstack-size -mstack-guard
+
+     _Score Options_
+          -meb -mel
+          -mnhwloop
+          -muls
+          -mmac
+          -mscore5 -mscore5u -mscore7 -mscore7d
+
+     _SH Options_
+          -m1  -m2  -m2e
+          -m2a-nofpu -m2a-single-only -m2a-single -m2a
+          -m3  -m3e
+          -m4-nofpu  -m4-single-only  -m4-single  -m4
+          -m4a-nofpu -m4a-single-only -m4a-single -m4a -m4al
+          -m5-64media  -m5-64media-nofpu
+          -m5-32media  -m5-32media-nofpu
+          -m5-compact  -m5-compact-nofpu
+          -mb  -ml  -mdalign  -mrelax
+          -mbigtable -mfmovd -mhitachi -mrenesas -mno-renesas -mnomacsave
+          -mieee -mno-ieee -mbitops  -misize  -minline-ic_invalidate -mpadstruct
+          -mspace -mprefergot  -musermode -multcost=NUMBER -mdiv=STRATEGY
+          -mdivsi3_libfunc=NAME -mfixed-range=REGISTER-RANGE
+          -madjust-unroll -mindexed-addressing -mgettrcost=NUMBER -mpt-fixed
+          -maccumulate-outgoing-args -minvalid-symbols
+
+     _Solaris 2 Options_
+          -mimpure-text  -mno-impure-text
+          -threads -pthreads -pthread
+
+     _SPARC Options_
+          -mcpu=CPU-TYPE
+          -mtune=CPU-TYPE
+          -mcmodel=CODE-MODEL
+          -m32  -m64  -mapp-regs  -mno-app-regs
+          -mfaster-structs  -mno-faster-structs
+          -mfpu  -mno-fpu  -mhard-float  -msoft-float
+          -mhard-quad-float  -msoft-quad-float
+          -mlittle-endian
+          -mstack-bias  -mno-stack-bias
+          -munaligned-doubles  -mno-unaligned-doubles
+          -mv8plus  -mno-v8plus  -mvis  -mno-vis
+          -mfix-at697f
+
+     _SPU Options_
+          -mwarn-reloc -merror-reloc
+          -msafe-dma -munsafe-dma
+          -mbranch-hints
+          -msmall-mem -mlarge-mem -mstdmain
+          -mfixed-range=REGISTER-RANGE
+          -mea32 -mea64
+          -maddress-space-conversion -mno-address-space-conversion
+          -mcache-size=CACHE-SIZE
+          -matomic-updates -mno-atomic-updates
+
+     _System V Options_
+          -Qy  -Qn  -YP,PATHS  -Ym,DIR
+
+     _V850 Options_
+          -mlong-calls  -mno-long-calls  -mep  -mno-ep
+          -mprolog-function  -mno-prolog-function  -mspace
+          -mtda=N  -msda=N  -mzda=N
+          -mapp-regs  -mno-app-regs
+          -mdisable-callt  -mno-disable-callt
+          -mv850e2v3
+          -mv850e2
+          -mv850e1 -mv850es
+          -mv850e
+          -mv850  -mbig-switch
+
+     _VAX Options_
+          -mg  -mgnu  -munix
+
+     _VxWorks Options_
+          -mrtp  -non-static  -Bstatic  -Bdynamic
+          -Xbind-lazy  -Xbind-now
+
+     _x86-64 Options_ See i386 and x86-64 Options.
+
+     _Xstormy16 Options_
+          -msim
+
+     _Xtensa Options_
+          -mconst16 -mno-const16
+          -mfused-madd  -mno-fused-madd
+          -mforce-no-pic
+          -mserialize-volatile  -mno-serialize-volatile
+          -mtext-section-literals  -mno-text-section-literals
+          -mtarget-align  -mno-target-align
+          -mlongcalls  -mno-longcalls
+
+     _zSeries Options_ See S/390 and zSeries Options.
+
+_Code Generation Options_
+     *Note Options for Code Generation Conventions: Code Gen Options.
+          -fcall-saved-REG  -fcall-used-REG
+          -ffixed-REG  -fexceptions
+          -fnon-call-exceptions  -funwind-tables
+          -fasynchronous-unwind-tables
+          -finhibit-size-directive  -finstrument-functions
+          -finstrument-functions-exclude-function-list=SYM,SYM,...
+          -finstrument-functions-exclude-file-list=FILE,FILE,...
+          -fno-common  -fno-ident
+          -fpcc-struct-return  -fpic  -fPIC -fpie -fPIE
+          -fno-jump-tables
+          -frecord-gcc-switches
+          -freg-struct-return  -fshort-enums
+          -fshort-double  -fshort-wchar
+          -fverbose-asm  -fpack-struct[=N]  -fstack-check
+          -fstack-limit-register=REG  -fstack-limit-symbol=SYM
+          -fno-stack-limit -fsplit-stack
+          -fleading-underscore  -ftls-model=MODEL
+          -ftrapv  -fwrapv  -fbounds-check
+          -fvisibility -fstrict-volatile-bitfields
+
+
+* Menu:
+
+* Overall Options::     Controlling the kind of output:
+                        an executable, object files, assembler files,
+                        or preprocessed source.
+* C Dialect Options::   Controlling the variant of C language compiled.
+* C++ Dialect Options:: Variations on C++.
+* Objective-C and Objective-C++ Dialect Options:: Variations on Objective-C
+                        and Objective-C++.
+* Language Independent Options:: Controlling how diagnostics should be
+                        formatted.
+* Warning Options::     How picky should the compiler be?
+* Debugging Options::   Symbol tables, measurements, and debugging dumps.
+* Optimize Options::    How much optimization?
+* Preprocessor Options:: Controlling header files and macro definitions.
+                         Also, getting dependency information for Make.
+* Assembler Options::   Passing options to the assembler.
+* Link Options::        Specifying libraries and so on.
+* Directory Options::   Where to find header files and libraries.
+                        Where to find the compiler executable files.
+* Spec Files::          How to pass switches to sub-processes.
+* Target Options::      Running a cross-compiler, or an old version of GCC.
+
+
+File: gcc.info,  Node: Overall Options,  Next: Invoking G++,  Prev: Option Summary,  Up: Invoking GCC
+
+3.2 Options Controlling the Kind of Output
+==========================================
+
+Compilation can involve up to four stages: preprocessing, compilation
+proper, assembly and linking, always in that order.  GCC is capable of
+preprocessing and compiling several files either into several assembler
+input files, or into one assembler input file; then each assembler
+input file produces an object file, and linking combines all the object
+files (those newly compiled, and those specified as input) into an
+executable file.
+
+ For any given input file, the file name suffix determines what kind of
+compilation is done:
+
+`FILE.c'
+     C source code which must be preprocessed.
+
+`FILE.i'
+     C source code which should not be preprocessed.
+
+`FILE.ii'
+     C++ source code which should not be preprocessed.
+
+`FILE.m'
+     Objective-C source code.  Note that you must link with the
+     `libobjc' library to make an Objective-C program work.
+
+`FILE.mi'
+     Objective-C source code which should not be preprocessed.
+
+`FILE.mm'
+`FILE.M'
+     Objective-C++ source code.  Note that you must link with the
+     `libobjc' library to make an Objective-C++ program work.  Note
+     that `.M' refers to a literal capital M.
+
+`FILE.mii'
+     Objective-C++ source code which should not be preprocessed.
+
+`FILE.h'
+     C, C++, Objective-C or Objective-C++ header file to be turned into
+     a precompiled header (default), or C, C++ header file to be turned
+     into an Ada spec (via the `-fdump-ada-spec' switch).
+
+`FILE.cc'
+`FILE.cp'
+`FILE.cxx'
+`FILE.cpp'
+`FILE.CPP'
+`FILE.c++'
+`FILE.C'
+     C++ source code which must be preprocessed.  Note that in `.cxx',
+     the last two letters must both be literally `x'.  Likewise, `.C'
+     refers to a literal capital C.
+
+`FILE.mm'
+`FILE.M'
+     Objective-C++ source code which must be preprocessed.
+
+`FILE.mii'
+     Objective-C++ source code which should not be preprocessed.
+
+`FILE.hh'
+`FILE.H'
+`FILE.hp'
+`FILE.hxx'
+`FILE.hpp'
+`FILE.HPP'
+`FILE.h++'
+`FILE.tcc'
+     C++ header file to be turned into a precompiled header or Ada spec.
+
+`FILE.f'
+`FILE.for'
+`FILE.ftn'
+     Fixed form Fortran source code which should not be preprocessed.
+
+`FILE.F'
+`FILE.FOR'
+`FILE.fpp'
+`FILE.FPP'
+`FILE.FTN'
+     Fixed form Fortran source code which must be preprocessed (with
+     the traditional preprocessor).
+
+`FILE.f90'
+`FILE.f95'
+`FILE.f03'
+`FILE.f08'
+     Free form Fortran source code which should not be preprocessed.
+
+`FILE.F90'
+`FILE.F95'
+`FILE.F03'
+`FILE.F08'
+     Free form Fortran source code which must be preprocessed (with the
+     traditional preprocessor).
+
+`FILE.go'
+     Go source code.
+
+`FILE.ads'
+     Ada source code file which contains a library unit declaration (a
+     declaration of a package, subprogram, or generic, or a generic
+     instantiation), or a library unit renaming declaration (a package,
+     generic, or subprogram renaming declaration).  Such files are also
+     called "specs".
+
+`FILE.adb'
+     Ada source code file containing a library unit body (a subprogram
+     or package body).  Such files are also called "bodies".
+
+`FILE.s'
+     Assembler code.
+
+`FILE.S'
+`FILE.sx'
+     Assembler code which must be preprocessed.
+
+`OTHER'
+     An object file to be fed straight into linking.  Any file name
+     with no recognized suffix is treated this way.
+
+ You can specify the input language explicitly with the `-x' option:
+
+`-x LANGUAGE'
+     Specify explicitly the LANGUAGE for the following input files
+     (rather than letting the compiler choose a default based on the
+     file name suffix).  This option applies to all following input
+     files until the next `-x' option.  Possible values for LANGUAGE
+     are:
+          c  c-header  cpp-output
+          c++  c++-header  c++-cpp-output
+          objective-c  objective-c-header  objective-c-cpp-output
+          objective-c++ objective-c++-header objective-c++-cpp-output
+          assembler  assembler-with-cpp
+          ada
+          f77  f77-cpp-input f95  f95-cpp-input
+          go
+          java
+
+`-x none'
+     Turn off any specification of a language, so that subsequent files
+     are handled according to their file name suffixes (as they are if
+     `-x' has not been used at all).
+
+`-pass-exit-codes'
+     Normally the `gcc' program will exit with the code of 1 if any
+     phase of the compiler returns a non-success return code.  If you
+     specify `-pass-exit-codes', the `gcc' program will instead return
+     with numerically highest error produced by any phase that returned
+     an error indication.  The C, C++, and Fortran frontends return 4,
+     if an internal compiler error is encountered.
+
+ If you only want some of the stages of compilation, you can use `-x'
+(or filename suffixes) to tell `gcc' where to start, and one of the
+options `-c', `-S', or `-E' to say where `gcc' is to stop.  Note that
+some combinations (for example, `-x cpp-output -E') instruct `gcc' to
+do nothing at all.
+
+`-c'
+     Compile or assemble the source files, but do not link.  The linking
+     stage simply is not done.  The ultimate output is in the form of an
+     object file for each source file.
+
+     By default, the object file name for a source file is made by
+     replacing the suffix `.c', `.i', `.s', etc., with `.o'.
+
+     Unrecognized input files, not requiring compilation or assembly,
+     are ignored.
+
+`-S'
+     Stop after the stage of compilation proper; do not assemble.  The
+     output is in the form of an assembler code file for each
+     non-assembler input file specified.
+
+     By default, the assembler file name for a source file is made by
+     replacing the suffix `.c', `.i', etc., with `.s'.
+
+     Input files that don't require compilation are ignored.
+
+`-E'
+     Stop after the preprocessing stage; do not run the compiler
+     proper.  The output is in the form of preprocessed source code,
+     which is sent to the standard output.
+
+     Input files which don't require preprocessing are ignored.
+
+`-o FILE'
+     Place output in file FILE.  This applies regardless to whatever
+     sort of output is being produced, whether it be an executable file,
+     an object file, an assembler file or preprocessed C code.
+
+     If `-o' is not specified, the default is to put an executable file
+     in `a.out', the object file for `SOURCE.SUFFIX' in `SOURCE.o', its
+     assembler file in `SOURCE.s', a precompiled header file in
+     `SOURCE.SUFFIX.gch', and all preprocessed C source on standard
+     output.
+
+`-v'
+     Print (on standard error output) the commands executed to run the
+     stages of compilation.  Also print the version number of the
+     compiler driver program and of the preprocessor and the compiler
+     proper.
+
+`-###'
+     Like `-v' except the commands are not executed and arguments are
+     quoted unless they contain only alphanumeric characters or `./-_'.
+     This is useful for shell scripts to capture the driver-generated
+     command lines.
+
+`-pipe'
+     Use pipes rather than temporary files for communication between the
+     various stages of compilation.  This fails to work on some systems
+     where the assembler is unable to read from a pipe; but the GNU
+     assembler has no trouble.
+
+`--help'
+     Print (on the standard output) a description of the command line
+     options understood by `gcc'.  If the `-v' option is also specified
+     then `--help' will also be passed on to the various processes
+     invoked by `gcc', so that they can display the command line options
+     they accept.  If the `-Wextra' option has also been specified
+     (prior to the `--help' option), then command line options which
+     have no documentation associated with them will also be displayed.
+
+`--target-help'
+     Print (on the standard output) a description of target-specific
+     command line options for each tool.  For some targets extra
+     target-specific information may also be printed.
+
+`--help={CLASS|[^]QUALIFIER}[,...]'
+     Print (on the standard output) a description of the command line
+     options understood by the compiler that fit into all specified
+     classes and qualifiers.  These are the supported classes:
+
+    `optimizers'
+          This will display all of the optimization options supported
+          by the compiler.
+
+    `warnings'
+          This will display all of the options controlling warning
+          messages produced by the compiler.
+
+    `target'
+          This will display target-specific options.  Unlike the
+          `--target-help' option however, target-specific options of the
+          linker and assembler will not be displayed.  This is because
+          those tools do not currently support the extended `--help='
+          syntax.
+
+    `params'
+          This will display the values recognized by the `--param'
+          option.
+
+    LANGUAGE
+          This will display the options supported for LANGUAGE, where
+          LANGUAGE is the name of one of the languages supported in this
+          version of GCC.
+
+    `common'
+          This will display the options that are common to all
+          languages.
+
+     These are the supported qualifiers:
+
+    `undocumented'
+          Display only those options which are undocumented.
+
+    `joined'
+          Display options which take an argument that appears after an
+          equal sign in the same continuous piece of text, such as:
+          `--help=target'.
+
+    `separate'
+          Display options which take an argument that appears as a
+          separate word following the original option, such as: `-o
+          output-file'.
+
+     Thus for example to display all the undocumented target-specific
+     switches supported by the compiler the following can be used:
+
+          --help=target,undocumented
+
+     The sense of a qualifier can be inverted by prefixing it with the
+     `^' character, so for example to display all binary warning
+     options (i.e., ones that are either on or off and that do not take
+     an argument), which have a description the following can be used:
+
+          --help=warnings,^joined,^undocumented
+
+     The argument to `--help=' should not consist solely of inverted
+     qualifiers.
+
+     Combining several classes is possible, although this usually
+     restricts the output by so much that there is nothing to display.
+     One case where it does work however is when one of the classes is
+     TARGET.  So for example to display all the target-specific
+     optimization options the following can be used:
+
+          --help=target,optimizers
+
+     The `--help=' option can be repeated on the command line.  Each
+     successive use will display its requested class of options,
+     skipping those that have already been displayed.
+
+     If the `-Q' option appears on the command line before the
+     `--help=' option, then the descriptive text displayed by `--help='
+     is changed.  Instead of describing the displayed options, an
+     indication is given as to whether the option is enabled, disabled
+     or set to a specific value (assuming that the compiler knows this
+     at the point where the `--help=' option is used).
+
+     Here is a truncated example from the ARM port of `gcc':
+
+            % gcc -Q -mabi=2 --help=target -c
+            The following options are target specific:
+            -mabi=                                2
+            -mabort-on-noreturn                   [disabled]
+            -mapcs                                [disabled]
+
+     The output is sensitive to the effects of previous command line
+     options, so for example it is possible to find out which
+     optimizations are enabled at `-O2' by using:
+
+          -Q -O2 --help=optimizers
+
+     Alternatively you can discover which binary optimizations are
+     enabled by `-O3' by using:
+
+          gcc -c -Q -O3 --help=optimizers > /tmp/O3-opts
+          gcc -c -Q -O2 --help=optimizers > /tmp/O2-opts
+          diff /tmp/O2-opts /tmp/O3-opts | grep enabled
+
+`-no-canonical-prefixes'
+     Do not expand any symbolic links, resolve references to `/../' or
+     `/./', or make the path absolute when generating a relative prefix.
+
+`--version'
+     Display the version number and copyrights of the invoked GCC.
+
+`-wrapper'
+     Invoke all subcommands under a wrapper program.  The name of the
+     wrapper program and its parameters are passed as a comma separated
+     list.
+
+          gcc -c t.c -wrapper gdb,--args
+
+     This will invoke all subprograms of `gcc' under `gdb --args', thus
+     the invocation of `cc1' will be `gdb --args cc1 ...'.
+
+`-fplugin=NAME.so'
+     Load the plugin code in file NAME.so, assumed to be a shared
+     object to be dlopen'd by the compiler.  The base name of the
+     shared object file is used to identify the plugin for the purposes
+     of argument parsing (See `-fplugin-arg-NAME-KEY=VALUE' below).
+     Each plugin should define the callback functions specified in the
+     Plugins API.
+
+`-fplugin-arg-NAME-KEY=VALUE'
+     Define an argument called KEY with a value of VALUE for the plugin
+     called NAME.
+
+`-fdump-ada-spec[-slim]'
+     For C and C++ source and include files, generate corresponding Ada
+     specs. *Note Generating Ada Bindings for C and C++ headers:
+     (gnat_ugn)Generating Ada Bindings for C and C++ headers, which
+     provides detailed documentation on this feature.
+
+`-fdump-go-spec=FILE'
+     For input files in any language, generate corresponding Go
+     declarations in FILE.  This generates Go `const', `type', `var',
+     and `func' declarations which may be a useful way to start writing
+     a Go interface to code written in some other language.
+
+`@FILE'
+     Read command-line options from FILE.  The options read are
+     inserted in place of the original @FILE option.  If FILE does not
+     exist, or cannot be read, then the option will be treated
+     literally, and not removed.
+
+     Options in FILE are separated by whitespace.  A whitespace
+     character may be included in an option by surrounding the entire
+     option in either single or double quotes.  Any character
+     (including a backslash) may be included by prefixing the character
+     to be included with a backslash.  The FILE may itself contain
+     additional @FILE options; any such options will be processed
+     recursively.
+
+
+File: gcc.info,  Node: Invoking G++,  Next: C Dialect Options,  Prev: Overall Options,  Up: Invoking GCC
+
+3.3 Compiling C++ Programs
+==========================
+
+C++ source files conventionally use one of the suffixes `.C', `.cc',
+`.cpp', `.CPP', `.c++', `.cp', or `.cxx'; C++ header files often use
+`.hh', `.hpp', `.H', or (for shared template code) `.tcc'; and
+preprocessed C++ files use the suffix `.ii'.  GCC recognizes files with
+these names and compiles them as C++ programs even if you call the
+compiler the same way as for compiling C programs (usually with the
+name `gcc').
+
+ However, the use of `gcc' does not add the C++ library.  `g++' is a
+program that calls GCC and treats `.c', `.h' and `.i' files as C++
+source files instead of C source files unless `-x' is used, and
+automatically specifies linking against the C++ library.  This program
+is also useful when precompiling a C header file with a `.h' extension
+for use in C++ compilations.  On many systems, `g++' is also installed
+with the name `c++'.
+
+ When you compile C++ programs, you may specify many of the same
+command-line options that you use for compiling programs in any
+language; or command-line options meaningful for C and related
+languages; or options that are meaningful only for C++ programs.  *Note
+Options Controlling C Dialect: C Dialect Options, for explanations of
+options for languages related to C.  *Note Options Controlling C++
+Dialect: C++ Dialect Options, for explanations of options that are
+meaningful only for C++ programs.
+
+
+File: gcc.info,  Node: C Dialect Options,  Next: C++ Dialect Options,  Prev: Invoking G++,  Up: Invoking GCC
+
+3.4 Options Controlling C Dialect
+=================================
+
+The following options control the dialect of C (or languages derived
+from C, such as C++, Objective-C and Objective-C++) that the compiler
+accepts:
+
+`-ansi'
+     In C mode, this is equivalent to `-std=c90'. In C++ mode, it is
+     equivalent to `-std=c++98'.
+
+     This turns off certain features of GCC that are incompatible with
+     ISO C90 (when compiling C code), or of standard C++ (when
+     compiling C++ code), such as the `asm' and `typeof' keywords, and
+     predefined macros such as `unix' and `vax' that identify the type
+     of system you are using.  It also enables the undesirable and
+     rarely used ISO trigraph feature.  For the C compiler, it disables
+     recognition of C++ style `//' comments as well as the `inline'
+     keyword.
+
+     The alternate keywords `__asm__', `__extension__', `__inline__'
+     and `__typeof__' continue to work despite `-ansi'.  You would not
+     want to use them in an ISO C program, of course, but it is useful
+     to put them in header files that might be included in compilations
+     done with `-ansi'.  Alternate predefined macros such as `__unix__'
+     and `__vax__' are also available, with or without `-ansi'.
+
+     The `-ansi' option does not cause non-ISO programs to be rejected
+     gratuitously.  For that, `-pedantic' is required in addition to
+     `-ansi'.  *Note Warning Options::.
+
+     The macro `__STRICT_ANSI__' is predefined when the `-ansi' option
+     is used.  Some header files may notice this macro and refrain from
+     declaring certain functions or defining certain macros that the
+     ISO standard doesn't call for; this is to avoid interfering with
+     any programs that might use these names for other things.
+
+     Functions that would normally be built in but do not have semantics
+     defined by ISO C (such as `alloca' and `ffs') are not built-in
+     functions when `-ansi' is used.  *Note Other built-in functions
+     provided by GCC: Other Builtins, for details of the functions
+     affected.
+
+`-std='
+     Determine the language standard. *Note Language Standards
+     Supported by GCC: Standards, for details of these standard
+     versions.  This option is currently only supported when compiling
+     C or C++.
+
+     The compiler can accept several base standards, such as `c90' or
+     `c++98', and GNU dialects of those standards, such as `gnu90' or
+     `gnu++98'.  By specifying a base standard, the compiler will
+     accept all programs following that standard and those using GNU
+     extensions that do not contradict it.  For example, `-std=c90'
+     turns off certain features of GCC that are incompatible with ISO
+     C90, such as the `asm' and `typeof' keywords, but not other GNU
+     extensions that do not have a meaning in ISO C90, such as omitting
+     the middle term of a `?:' expression. On the other hand, by
+     specifying a GNU dialect of a standard, all features the compiler
+     support are enabled, even when those features change the meaning
+     of the base standard and some strict-conforming programs may be
+     rejected.  The particular standard is used by `-pedantic' to
+     identify which features are GNU extensions given that version of
+     the standard. For example `-std=gnu90 -pedantic' would warn about
+     C++ style `//' comments, while `-std=gnu99 -pedantic' would not.
+
+     A value for this option must be provided; possible values are
+
+    `c90'
+    `c89'
+    `iso9899:1990'
+          Support all ISO C90 programs (certain GNU extensions that
+          conflict with ISO C90 are disabled). Same as `-ansi' for C
+          code.
+
+    `iso9899:199409'
+          ISO C90 as modified in amendment 1.
+
+    `c99'
+    `c9x'
+    `iso9899:1999'
+    `iso9899:199x'
+          ISO C99.  Note that this standard is not yet fully supported;
+          see `http://gcc.gnu.org/gcc-4.6/c99status.html' for more
+          information.  The names `c9x' and `iso9899:199x' are
+          deprecated.
+
+    `c1x'
+          ISO C1X, the draft of the next revision of the ISO C standard.
+          Support is limited and experimental and features enabled by
+          this option may be changed or removed if changed in or
+          removed from the standard draft.
+
+    `gnu90'
+    `gnu89'
+          GNU dialect of ISO C90 (including some C99 features). This is
+          the default for C code.
+
+    `gnu99'
+    `gnu9x'
+          GNU dialect of ISO C99.  When ISO C99 is fully implemented in
+          GCC, this will become the default.  The name `gnu9x' is
+          deprecated.
+
+    `gnu1x'
+          GNU dialect of ISO C1X.  Support is limited and experimental
+          and features enabled by this option may be changed or removed
+          if changed in or removed from the standard draft.
+
+    `c++98'
+          The 1998 ISO C++ standard plus amendments. Same as `-ansi' for
+          C++ code.
+
+    `gnu++98'
+          GNU dialect of `-std=c++98'.  This is the default for C++
+          code.
+
+    `c++0x'
+          The working draft of the upcoming ISO C++0x standard. This
+          option enables experimental features that are likely to be
+          included in C++0x. The working draft is constantly changing,
+          and any feature that is enabled by this flag may be removed
+          from future versions of GCC if it is not part of the C++0x
+          standard.
+
+    `gnu++0x'
+          GNU dialect of `-std=c++0x'. This option enables experimental
+          features that may be removed in future versions of GCC.
+
+`-fgnu89-inline'
+     The option `-fgnu89-inline' tells GCC to use the traditional GNU
+     semantics for `inline' functions when in C99 mode.  *Note An
+     Inline Function is As Fast As a Macro: Inline.  This option is
+     accepted and ignored by GCC versions 4.1.3 up to but not including
+     4.3.  In GCC versions 4.3 and later it changes the behavior of GCC
+     in C99 mode.  Using this option is roughly equivalent to adding the
+     `gnu_inline' function attribute to all inline functions (*note
+     Function Attributes::).
+
+     The option `-fno-gnu89-inline' explicitly tells GCC to use the C99
+     semantics for `inline' when in C99 or gnu99 mode (i.e., it
+     specifies the default behavior).  This option was first supported
+     in GCC 4.3.  This option is not supported in `-std=c90' or
+     `-std=gnu90' mode.
+
+     The preprocessor macros `__GNUC_GNU_INLINE__' and
+     `__GNUC_STDC_INLINE__' may be used to check which semantics are in
+     effect for `inline' functions.  *Note Common Predefined Macros:
+     (cpp)Common Predefined Macros.
+
+`-aux-info FILENAME'
+     Output to the given filename prototyped declarations for all
+     functions declared and/or defined in a translation unit, including
+     those in header files.  This option is silently ignored in any
+     language other than C.
+
+     Besides declarations, the file indicates, in comments, the origin
+     of each declaration (source file and line), whether the
+     declaration was implicit, prototyped or unprototyped (`I', `N' for
+     new or `O' for old, respectively, in the first character after the
+     line number and the colon), and whether it came from a declaration
+     or a definition (`C' or `F', respectively, in the following
+     character).  In the case of function definitions, a K&R-style list
+     of arguments followed by their declarations is also provided,
+     inside comments, after the declaration.
+
+`-fno-asm'
+     Do not recognize `asm', `inline' or `typeof' as a keyword, so that
+     code can use these words as identifiers.  You can use the keywords
+     `__asm__', `__inline__' and `__typeof__' instead.  `-ansi' implies
+     `-fno-asm'.
+
+     In C++, this switch only affects the `typeof' keyword, since `asm'
+     and `inline' are standard keywords.  You may want to use the
+     `-fno-gnu-keywords' flag instead, which has the same effect.  In
+     C99 mode (`-std=c99' or `-std=gnu99'), this switch only affects
+     the `asm' and `typeof' keywords, since `inline' is a standard
+     keyword in ISO C99.
+
+`-fno-builtin'
+`-fno-builtin-FUNCTION'
+     Don't recognize built-in functions that do not begin with
+     `__builtin_' as prefix.  *Note Other built-in functions provided
+     by GCC: Other Builtins, for details of the functions affected,
+     including those which are not built-in functions when `-ansi' or
+     `-std' options for strict ISO C conformance are used because they
+     do not have an ISO standard meaning.
+
+     GCC normally generates special code to handle certain built-in
+     functions more efficiently; for instance, calls to `alloca' may
+     become single instructions that adjust the stack directly, and
+     calls to `memcpy' may become inline copy loops.  The resulting
+     code is often both smaller and faster, but since the function
+     calls no longer appear as such, you cannot set a breakpoint on
+     those calls, nor can you change the behavior of the functions by
+     linking with a different library.  In addition, when a function is
+     recognized as a built-in function, GCC may use information about
+     that function to warn about problems with calls to that function,
+     or to generate more efficient code, even if the resulting code
+     still contains calls to that function.  For example, warnings are
+     given with `-Wformat' for bad calls to `printf', when `printf' is
+     built in, and `strlen' is known not to modify global memory.
+
+     With the `-fno-builtin-FUNCTION' option only the built-in function
+     FUNCTION is disabled.  FUNCTION must not begin with `__builtin_'.
+     If a function is named that is not built-in in this version of
+     GCC, this option is ignored.  There is no corresponding
+     `-fbuiltin-FUNCTION' option; if you wish to enable built-in
+     functions selectively when using `-fno-builtin' or
+     `-ffreestanding', you may define macros such as:
+
+          #define abs(n)          __builtin_abs ((n))
+          #define strcpy(d, s)    __builtin_strcpy ((d), (s))
+
+`-fhosted'
+     Assert that compilation takes place in a hosted environment.  This
+     implies `-fbuiltin'.  A hosted environment is one in which the
+     entire standard library is available, and in which `main' has a
+     return type of `int'.  Examples are nearly everything except a
+     kernel.  This is equivalent to `-fno-freestanding'.
+
+`-ffreestanding'
+     Assert that compilation takes place in a freestanding environment.
+     This implies `-fno-builtin'.  A freestanding environment is one in
+     which the standard library may not exist, and program startup may
+     not necessarily be at `main'.  The most obvious example is an OS
+     kernel.  This is equivalent to `-fno-hosted'.
+
+     *Note Language Standards Supported by GCC: Standards, for details
+     of freestanding and hosted environments.
+
+`-fopenmp'
+     Enable handling of OpenMP directives `#pragma omp' in C/C++ and
+     `!$omp' in Fortran.  When `-fopenmp' is specified, the compiler
+     generates parallel code according to the OpenMP Application
+     Program Interface v3.0 `http://www.openmp.org/'.  This option
+     implies `-pthread', and thus is only supported on targets that
+     have support for `-pthread'.
+
+`-fms-extensions'
+     Accept some non-standard constructs used in Microsoft header files.
+
+     In C++ code, this allows member names in structures to be similar
+     to previous types declarations.
+
+          typedef int UOW;
+          struct ABC {
+            UOW UOW;
+          };
+
+     Some cases of unnamed fields in structures and unions are only
+     accepted with this option.  *Note Unnamed struct/union fields
+     within structs/unions: Unnamed Fields, for details.
+
+`-fplan9-extensions'
+     Accept some non-standard constructs used in Plan 9 code.
+
+     This enables `-fms-extensions', permits passing pointers to
+     structures with anonymous fields to functions which expect
+     pointers to elements of the type of the field, and permits
+     referring to anonymous fields declared using a typedef.  *Note
+     Unnamed struct/union fields within structs/unions: Unnamed Fields,
+     for details.  This is only supported for C, not C++.
+
+`-trigraphs'
+     Support ISO C trigraphs.  The `-ansi' option (and `-std' options
+     for strict ISO C conformance) implies `-trigraphs'.
+
+`-no-integrated-cpp'
+     Performs a compilation in two passes: preprocessing and compiling.
+     This option allows a user supplied "cc1", "cc1plus", or "cc1obj"
+     via the `-B' option.  The user supplied compilation step can then
+     add in an additional preprocessing step after normal preprocessing
+     but before compiling.  The default is to use the integrated cpp
+     (internal cpp)
+
+     The semantics of this option will change if "cc1", "cc1plus", and
+     "cc1obj" are merged.
+
+`-traditional'
+`-traditional-cpp'
+     Formerly, these options caused GCC to attempt to emulate a
+     pre-standard C compiler.  They are now only supported with the
+     `-E' switch.  The preprocessor continues to support a pre-standard
+     mode.  See the GNU CPP manual for details.
+
+`-fcond-mismatch'
+     Allow conditional expressions with mismatched types in the second
+     and third arguments.  The value of such an expression is void.
+     This option is not supported for C++.
+
+`-flax-vector-conversions'
+     Allow implicit conversions between vectors with differing numbers
+     of elements and/or incompatible element types.  This option should
+     not be used for new code.
+
+`-funsigned-char'
+     Let the type `char' be unsigned, like `unsigned char'.
+
+     Each kind of machine has a default for what `char' should be.  It
+     is either like `unsigned char' by default or like `signed char' by
+     default.
+
+     Ideally, a portable program should always use `signed char' or
+     `unsigned char' when it depends on the signedness of an object.
+     But many programs have been written to use plain `char' and expect
+     it to be signed, or expect it to be unsigned, depending on the
+     machines they were written for.  This option, and its inverse, let
+     you make such a program work with the opposite default.
+
+     The type `char' is always a distinct type from each of `signed
+     char' or `unsigned char', even though its behavior is always just
+     like one of those two.
+
+`-fsigned-char'
+     Let the type `char' be signed, like `signed char'.
+
+     Note that this is equivalent to `-fno-unsigned-char', which is the
+     negative form of `-funsigned-char'.  Likewise, the option
+     `-fno-signed-char' is equivalent to `-funsigned-char'.
+
+`-fsigned-bitfields'
+`-funsigned-bitfields'
+`-fno-signed-bitfields'
+`-fno-unsigned-bitfields'
+     These options control whether a bit-field is signed or unsigned,
+     when the declaration does not use either `signed' or `unsigned'.
+     By default, such a bit-field is signed, because this is
+     consistent: the basic integer types such as `int' are signed types.
+
+
+File: gcc.info,  Node: C++ Dialect Options,  Next: Objective-C and Objective-C++ Dialect Options,  Prev: C Dialect Options,  Up: Invoking GCC
+
+3.5 Options Controlling C++ Dialect
+===================================
+
+This section describes the command-line options that are only meaningful
+for C++ programs; but you can also use most of the GNU compiler options
+regardless of what language your program is in.  For example, you might
+compile a file `firstClass.C' like this:
+
+     g++ -g -frepo -O -c firstClass.C
+
+In this example, only `-frepo' is an option meant only for C++
+programs; you can use the other options with any language supported by
+GCC.
+
+ Here is a list of options that are _only_ for compiling C++ programs:
+
+`-fabi-version=N'
+     Use version N of the C++ ABI.  Version 2 is the version of the C++
+     ABI that first appeared in G++ 3.4.  Version 1 is the version of
+     the C++ ABI that first appeared in G++ 3.2.  Version 0 will always
+     be the version that conforms most closely to the C++ ABI
+     specification.  Therefore, the ABI obtained using version 0 will
+     change as ABI bugs are fixed.
+
+     The default is version 2.
+
+     Version 3 corrects an error in mangling a constant address as a
+     template argument.
+
+     Version 4 implements a standard mangling for vector types.
+
+     Version 5 corrects the mangling of attribute const/volatile on
+     function pointer types, decltype of a plain decl, and use of a
+     function parameter in the declaration of another parameter.
+
+     See also `-Wabi'.
+
+`-fno-access-control'
+     Turn off all access checking.  This switch is mainly useful for
+     working around bugs in the access control code.
+
+`-fcheck-new'
+     Check that the pointer returned by `operator new' is non-null
+     before attempting to modify the storage allocated.  This check is
+     normally unnecessary because the C++ standard specifies that
+     `operator new' will only return `0' if it is declared `throw()',
+     in which case the compiler will always check the return value even
+     without this option.  In all other cases, when `operator new' has
+     a non-empty exception specification, memory exhaustion is
+     signalled by throwing `std::bad_alloc'.  See also `new (nothrow)'.
+
+`-fconserve-space'
+     Put uninitialized or runtime-initialized global variables into the
+     common segment, as C does.  This saves space in the executable at
+     the cost of not diagnosing duplicate definitions.  If you compile
+     with this flag and your program mysteriously crashes after
+     `main()' has completed, you may have an object that is being
+     destroyed twice because two definitions were merged.
+
+     This option is no longer useful on most targets, now that support
+     has been added for putting variables into BSS without making them
+     common.
+
+`-fconstexpr-depth=N'
+     Set the maximum nested evaluation depth for C++0x constexpr
+     functions to N.  A limit is needed to detect endless recursion
+     during constant expression evaluation.  The minimum specified by
+     the standard is 512.
+
+`-fno-deduce-init-list'
+     Disable deduction of a template type parameter as
+     std::initializer_list from a brace-enclosed initializer list, i.e.
+
+          template <class T> auto forward(T t) -> decltype (realfn (t))
+          {
+            return realfn (t);
+          }
+
+          void f()
+          {
+            forward({1,2}); // call forward<std::initializer_list<int>>
+          }
+
+     This option is present because this deduction is an extension to
+     the current specification in the C++0x working draft, and there was
+     some concern about potential overload resolution problems.
+
+`-ffriend-injection'
+     Inject friend functions into the enclosing namespace, so that they
+     are visible outside the scope of the class in which they are
+     declared.  Friend functions were documented to work this way in
+     the old Annotated C++ Reference Manual, and versions of G++ before
+     4.1 always worked that way.  However, in ISO C++ a friend function
+     which is not declared in an enclosing scope can only be found
+     using argument dependent lookup.  This option causes friends to be
+     injected as they were in earlier releases.
+
+     This option is for compatibility, and may be removed in a future
+     release of G++.
+
+`-fno-elide-constructors'
+     The C++ standard allows an implementation to omit creating a
+     temporary which is only used to initialize another object of the
+     same type.  Specifying this option disables that optimization, and
+     forces G++ to call the copy constructor in all cases.
+
+`-fno-enforce-eh-specs'
+     Don't generate code to check for violation of exception
+     specifications at runtime.  This option violates the C++ standard,
+     but may be useful for reducing code size in production builds,
+     much like defining `NDEBUG'.  This does not give user code
+     permission to throw exceptions in violation of the exception
+     specifications; the compiler will still optimize based on the
+     specifications, so throwing an unexpected exception will result in
+     undefined behavior.
+
+`-ffor-scope'
+`-fno-for-scope'
+     If `-ffor-scope' is specified, the scope of variables declared in
+     a for-init-statement is limited to the `for' loop itself, as
+     specified by the C++ standard.  If `-fno-for-scope' is specified,
+     the scope of variables declared in a for-init-statement extends to
+     the end of the enclosing scope, as was the case in old versions of
+     G++, and other (traditional) implementations of C++.
+
+     The default if neither flag is given to follow the standard, but
+     to allow and give a warning for old-style code that would
+     otherwise be invalid, or have different behavior.
+
+`-fno-gnu-keywords'
+     Do not recognize `typeof' as a keyword, so that code can use this
+     word as an identifier.  You can use the keyword `__typeof__'
+     instead.  `-ansi' implies `-fno-gnu-keywords'.
+
+`-fno-implicit-templates'
+     Never emit code for non-inline templates which are instantiated
+     implicitly (i.e. by use); only emit code for explicit
+     instantiations.  *Note Template Instantiation::, for more
+     information.
+
+`-fno-implicit-inline-templates'
+     Don't emit code for implicit instantiations of inline templates,
+     either.  The default is to handle inlines differently so that
+     compiles with and without optimization will need the same set of
+     explicit instantiations.
+
+`-fno-implement-inlines'
+     To save space, do not emit out-of-line copies of inline functions
+     controlled by `#pragma implementation'.  This will cause linker
+     errors if these functions are not inlined everywhere they are
+     called.
+
+`-fms-extensions'
+     Disable pedantic warnings about constructs used in MFC, such as
+     implicit int and getting a pointer to member function via
+     non-standard syntax.
+
+`-fno-nonansi-builtins'
+     Disable built-in declarations of functions that are not mandated by
+     ANSI/ISO C.  These include `ffs', `alloca', `_exit', `index',
+     `bzero', `conjf', and other related functions.
+
+`-fnothrow-opt'
+     Treat a `throw()' exception specification as though it were a
+     `noexcept' specification to reduce or eliminate the text size
+     overhead relative to a function with no exception specification.
+     If the function has local variables of types with non-trivial
+     destructors, the exception specification will actually make the
+     function smaller because the EH cleanups for those variables can be
+     optimized away.  The semantic effect is that an exception thrown
+     out of a function with such an exception specification will result
+     in a call to `terminate' rather than `unexpected'.
+
+`-fno-operator-names'
+     Do not treat the operator name keywords `and', `bitand', `bitor',
+     `compl', `not', `or' and `xor' as synonyms as keywords.
+
+`-fno-optional-diags'
+     Disable diagnostics that the standard says a compiler does not
+     need to issue.  Currently, the only such diagnostic issued by G++
+     is the one for a name having multiple meanings within a class.
+
+`-fpermissive'
+     Downgrade some diagnostics about nonconformant code from errors to
+     warnings.  Thus, using `-fpermissive' will allow some
+     nonconforming code to compile.
+
+`-fno-pretty-templates'
+     When an error message refers to a specialization of a function
+     template, the compiler will normally print the signature of the
+     template followed by the template arguments and any typedefs or
+     typenames in the signature (e.g. `void f(T) [with T = int]' rather
+     than `void f(int)') so that it's clear which template is involved.
+     When an error message refers to a specialization of a class
+     template, the compiler will omit any template arguments which match
+     the default template arguments for that template.  If either of
+     these behaviors make it harder to understand the error message
+     rather than easier, using `-fno-pretty-templates' will disable
+     them.
+
+`-frepo'
+     Enable automatic template instantiation at link time.  This option
+     also implies `-fno-implicit-templates'.  *Note Template
+     Instantiation::, for more information.
+
+`-fno-rtti'
+     Disable generation of information about every class with virtual
+     functions for use by the C++ runtime type identification features
+     (`dynamic_cast' and `typeid').  If you don't use those parts of
+     the language, you can save some space by using this flag.  Note
+     that exception handling uses the same information, but it will
+     generate it as needed. The `dynamic_cast' operator can still be
+     used for casts that do not require runtime type information, i.e.
+     casts to `void *' or to unambiguous base classes.
+
+`-fstats'
+     Emit statistics about front-end processing at the end of the
+     compilation.  This information is generally only useful to the G++
+     development team.
+
+`-fstrict-enums'
+     Allow the compiler to optimize using the assumption that a value of
+     enumeration type can only be one of the values of the enumeration
+     (as defined in the C++ standard; basically, a value which can be
+     represented in the minimum number of bits needed to represent all
+     the enumerators).  This assumption may not be valid if the program
+     uses a cast to convert an arbitrary integer value to the
+     enumeration type.
+
+`-ftemplate-depth=N'
+     Set the maximum instantiation depth for template classes to N.  A
+     limit on the template instantiation depth is needed to detect
+     endless recursions during template class instantiation.  ANSI/ISO
+     C++ conforming programs must not rely on a maximum depth greater
+     than 17 (changed to 1024 in C++0x).
+
+`-fno-threadsafe-statics'
+     Do not emit the extra code to use the routines specified in the C++
+     ABI for thread-safe initialization of local statics.  You can use
+     this option to reduce code size slightly in code that doesn't need
+     to be thread-safe.
+
+`-fuse-cxa-atexit'
+     Register destructors for objects with static storage duration with
+     the `__cxa_atexit' function rather than the `atexit' function.
+     This option is required for fully standards-compliant handling of
+     static destructors, but will only work if your C library supports
+     `__cxa_atexit'.
+
+`-fno-use-cxa-get-exception-ptr'
+     Don't use the `__cxa_get_exception_ptr' runtime routine.  This
+     will cause `std::uncaught_exception' to be incorrect, but is
+     necessary if the runtime routine is not available.
+
+`-fvisibility-inlines-hidden'
+     This switch declares that the user does not attempt to compare
+     pointers to inline methods where the addresses of the two functions
+     were taken in different shared objects.
+
+     The effect of this is that GCC may, effectively, mark inline
+     methods with `__attribute__ ((visibility ("hidden")))' so that
+     they do not appear in the export table of a DSO and do not require
+     a PLT indirection when used within the DSO.  Enabling this option
+     can have a dramatic effect on load and link times of a DSO as it
+     massively reduces the size of the dynamic export table when the
+     library makes heavy use of templates.
+
+     The behavior of this switch is not quite the same as marking the
+     methods as hidden directly, because it does not affect static
+     variables local to the function or cause the compiler to deduce
+     that the function is defined in only one shared object.
+
+     You may mark a method as having a visibility explicitly to negate
+     the effect of the switch for that method.  For example, if you do
+     want to compare pointers to a particular inline method, you might
+     mark it as having default visibility.  Marking the enclosing class
+     with explicit visibility will have no effect.
+
+     Explicitly instantiated inline methods are unaffected by this
+     option as their linkage might otherwise cross a shared library
+     boundary.  *Note Template Instantiation::.
+
+`-fvisibility-ms-compat'
+     This flag attempts to use visibility settings to make GCC's C++
+     linkage model compatible with that of Microsoft Visual Studio.
+
+     The flag makes these changes to GCC's linkage model:
+
+       1. It sets the default visibility to `hidden', like
+          `-fvisibility=hidden'.
+
+       2. Types, but not their members, are not hidden by default.
+
+       3. The One Definition Rule is relaxed for types without explicit
+          visibility specifications which are defined in more than one
+          different shared object: those declarations are permitted if
+          they would have been permitted when this option was not used.
+
+     In new code it is better to use `-fvisibility=hidden' and export
+     those classes which are intended to be externally visible.
+     Unfortunately it is possible for code to rely, perhaps
+     accidentally, on the Visual Studio behavior.
+
+     Among the consequences of these changes are that static data
+     members of the same type with the same name but defined in
+     different shared objects will be different, so changing one will
+     not change the other; and that pointers to function members
+     defined in different shared objects may not compare equal.  When
+     this flag is given, it is a violation of the ODR to define types
+     with the same name differently.
+
+`-fno-weak'
+     Do not use weak symbol support, even if it is provided by the
+     linker.  By default, G++ will use weak symbols if they are
+     available.  This option exists only for testing, and should not be
+     used by end-users; it will result in inferior code and has no
+     benefits.  This option may be removed in a future release of G++.
+
+`-nostdinc++'
+     Do not search for header files in the standard directories
+     specific to C++, but do still search the other standard
+     directories.  (This option is used when building the C++ library.)
+
+ In addition, these optimization, warning, and code generation options
+have meanings only for C++ programs:
+
+`-fno-default-inline'
+     Do not assume `inline' for functions defined inside a class scope.
+     *Note Options That Control Optimization: Optimize Options.  Note
+     that these functions will have linkage like inline functions; they
+     just won't be inlined by default.
+
+`-Wabi (C, Objective-C, C++ and Objective-C++ only)'
+     Warn when G++ generates code that is probably not compatible with
+     the vendor-neutral C++ ABI.  Although an effort has been made to
+     warn about all such cases, there are probably some cases that are
+     not warned about, even though G++ is generating incompatible code.
+     There may also be cases where warnings are emitted even though the
+     code that is generated will be compatible.
+
+     You should rewrite your code to avoid these warnings if you are
+     concerned about the fact that code generated by G++ may not be
+     binary compatible with code generated by other compilers.
+
+     The known incompatibilities in `-fabi-version=2' (the default)
+     include:
+
+        * A template with a non-type template parameter of reference
+          type is mangled incorrectly:
+               extern int N;
+               template <int &> struct S {};
+               void n (S<N>) {2}
+
+          This is fixed in `-fabi-version=3'.
+
+        * SIMD vector types declared using `__attribute
+          ((vector_size))' are mangled in a non-standard way that does
+          not allow for overloading of functions taking vectors of
+          different sizes.
+
+          The mangling is changed in `-fabi-version=4'.
+
+     The known incompatibilities in `-fabi-version=1' include:
+
+        * Incorrect handling of tail-padding for bit-fields.  G++ may
+          attempt to pack data into the same byte as a base class.  For
+          example:
+
+               struct A { virtual void f(); int f1 : 1; };
+               struct B : public A { int f2 : 1; };
+
+          In this case, G++ will place `B::f2' into the same byte
+          as`A::f1'; other compilers will not.  You can avoid this
+          problem by explicitly padding `A' so that its size is a
+          multiple of the byte size on your platform; that will cause
+          G++ and other compilers to layout `B' identically.
+
+        * Incorrect handling of tail-padding for virtual bases.  G++
+          does not use tail padding when laying out virtual bases.  For
+          example:
+
+               struct A { virtual void f(); char c1; };
+               struct B { B(); char c2; };
+               struct C : public A, public virtual B {};
+
+          In this case, G++ will not place `B' into the tail-padding for
+          `A'; other compilers will.  You can avoid this problem by
+          explicitly padding `A' so that its size is a multiple of its
+          alignment (ignoring virtual base classes); that will cause
+          G++ and other compilers to layout `C' identically.
+
+        * Incorrect handling of bit-fields with declared widths greater
+          than that of their underlying types, when the bit-fields
+          appear in a union.  For example:
+
+               union U { int i : 4096; };
+
+          Assuming that an `int' does not have 4096 bits, G++ will make
+          the union too small by the number of bits in an `int'.
+
+        * Empty classes can be placed at incorrect offsets.  For
+          example:
+
+               struct A {};
+
+               struct B {
+                 A a;
+                 virtual void f ();
+               };
+
+               struct C : public B, public A {};
+
+          G++ will place the `A' base class of `C' at a nonzero offset;
+          it should be placed at offset zero.  G++ mistakenly believes
+          that the `A' data member of `B' is already at offset zero.
+
+        * Names of template functions whose types involve `typename' or
+          template template parameters can be mangled incorrectly.
+
+               template <typename Q>
+               void f(typename Q::X) {}
+
+               template <template <typename> class Q>
+               void f(typename Q<int>::X) {}
+
+          Instantiations of these templates may be mangled incorrectly.
+
+
+     It also warns psABI related changes.  The known psABI changes at
+     this point include:
+
+        * For SYSV/x86-64, when passing union with long double, it is
+          changed to pass in memory as specified in psABI.  For example:
+
+               union U {
+                 long double ld;
+                 int i;
+               };
+
+          `union U' will always be passed in memory.
+
+
+`-Wctor-dtor-privacy (C++ and Objective-C++ only)'
+     Warn when a class seems unusable because all the constructors or
+     destructors in that class are private, and it has neither friends
+     nor public static member functions.
+
+`-Wnoexcept (C++ and Objective-C++ only)'
+     Warn when a noexcept-expression evaluates to false because of a
+     call to a function that does not have a non-throwing exception
+     specification (i.e. `throw()' or `noexcept') but is known by the
+     compiler to never throw an exception.
+
+`-Wnon-virtual-dtor (C++ and Objective-C++ only)'
+     Warn when a class has virtual functions and accessible non-virtual
+     destructor, in which case it would be possible but unsafe to delete
+     an instance of a derived class through a pointer to the base class.
+     This warning is also enabled if -Weffc++ is specified.
+
+`-Wreorder (C++ and Objective-C++ only)'
+     Warn when the order of member initializers given in the code does
+     not match the order in which they must be executed.  For instance:
+
+          struct A {
+            int i;
+            int j;
+            A(): j (0), i (1) { }
+          };
+
+     The compiler will rearrange the member initializers for `i' and
+     `j' to match the declaration order of the members, emitting a
+     warning to that effect.  This warning is enabled by `-Wall'.
+
+ The following `-W...' options are not affected by `-Wall'.
+
+`-Weffc++ (C++ and Objective-C++ only)'
+     Warn about violations of the following style guidelines from Scott
+     Meyers' `Effective C++' book:
+
+        * Item 11:  Define a copy constructor and an assignment
+          operator for classes with dynamically allocated memory.
+
+        * Item 12:  Prefer initialization to assignment in constructors.
+
+        * Item 14:  Make destructors virtual in base classes.
+
+        * Item 15:  Have `operator=' return a reference to `*this'.
+
+        * Item 23:  Don't try to return a reference when you must
+          return an object.
+
+
+     Also warn about violations of the following style guidelines from
+     Scott Meyers' `More Effective C++' book:
+
+        * Item 6:  Distinguish between prefix and postfix forms of
+          increment and decrement operators.
+
+        * Item 7:  Never overload `&&', `||', or `,'.
+
+
+     When selecting this option, be aware that the standard library
+     headers do not obey all of these guidelines; use `grep -v' to
+     filter out those warnings.
+
+`-Wstrict-null-sentinel (C++ and Objective-C++ only)'
+     Warn also about the use of an uncasted `NULL' as sentinel.  When
+     compiling only with GCC this is a valid sentinel, as `NULL' is
+     defined to `__null'.  Although it is a null pointer constant not a
+     null pointer, it is guaranteed to be of the same size as a
+     pointer.  But this use is not portable across different compilers.
+
+`-Wno-non-template-friend (C++ and Objective-C++ only)'
+     Disable warnings when non-templatized friend functions are declared
+     within a template.  Since the advent of explicit template
+     specification support in G++, if the name of the friend is an
+     unqualified-id (i.e., `friend foo(int)'), the C++ language
+     specification demands that the friend declare or define an
+     ordinary, nontemplate function.  (Section 14.5.3).  Before G++
+     implemented explicit specification, unqualified-ids could be
+     interpreted as a particular specialization of a templatized
+     function.  Because this non-conforming behavior is no longer the
+     default behavior for G++, `-Wnon-template-friend' allows the
+     compiler to check existing code for potential trouble spots and is
+     on by default.  This new compiler behavior can be turned off with
+     `-Wno-non-template-friend' which keeps the conformant compiler code
+     but disables the helpful warning.
+
+`-Wold-style-cast (C++ and Objective-C++ only)'
+     Warn if an old-style (C-style) cast to a non-void type is used
+     within a C++ program.  The new-style casts (`dynamic_cast',
+     `static_cast', `reinterpret_cast', and `const_cast') are less
+     vulnerable to unintended effects and much easier to search for.
+
+`-Woverloaded-virtual (C++ and Objective-C++ only)'
+     Warn when a function declaration hides virtual functions from a
+     base class.  For example, in:
+
+          struct A {
+            virtual void f();
+          };
+
+          struct B: public A {
+            void f(int);
+          };
+
+     the `A' class version of `f' is hidden in `B', and code like:
+
+          B* b;
+          b->f();
+
+     will fail to compile.
+
+`-Wno-pmf-conversions (C++ and Objective-C++ only)'
+     Disable the diagnostic for converting a bound pointer to member
+     function to a plain pointer.
+
+`-Wsign-promo (C++ and Objective-C++ only)'
+     Warn when overload resolution chooses a promotion from unsigned or
+     enumerated type to a signed type, over a conversion to an unsigned
+     type of the same size.  Previous versions of G++ would try to
+     preserve unsignedness, but the standard mandates the current
+     behavior.
+
+          struct A {
+            operator int ();
+            A& operator = (int);
+          };
+
+          main ()
+          {
+            A a,b;
+            a = b;
+          }
+
+     In this example, G++ will synthesize a default `A& operator =
+     (const A&);', while cfront will use the user-defined `operator ='.
+
+
+File: gcc.info,  Node: Objective-C and Objective-C++ Dialect Options,  Next: Language Independent Options,  Prev: C++ Dialect Options,  Up: Invoking GCC
+
+3.6 Options Controlling Objective-C and Objective-C++ Dialects
+==============================================================
+
+(NOTE: This manual does not describe the Objective-C and Objective-C++
+languages themselves.  *Note Language Standards Supported by GCC:
+Standards, for references.)
+
+ This section describes the command-line options that are only
+meaningful for Objective-C and Objective-C++ programs, but you can also
+use most of the language-independent GNU compiler options.  For
+example, you might compile a file `some_class.m' like this:
+
+     gcc -g -fgnu-runtime -O -c some_class.m
+
+In this example, `-fgnu-runtime' is an option meant only for
+Objective-C and Objective-C++ programs; you can use the other options
+with any language supported by GCC.
+
+ Note that since Objective-C is an extension of the C language,
+Objective-C compilations may also use options specific to the C
+front-end (e.g., `-Wtraditional').  Similarly, Objective-C++
+compilations may use C++-specific options (e.g., `-Wabi').
+
+ Here is a list of options that are _only_ for compiling Objective-C
+and Objective-C++ programs:
+
+`-fconstant-string-class=CLASS-NAME'
+     Use CLASS-NAME as the name of the class to instantiate for each
+     literal string specified with the syntax `@"..."'.  The default
+     class name is `NXConstantString' if the GNU runtime is being used,
+     and `NSConstantString' if the NeXT runtime is being used (see
+     below).  The `-fconstant-cfstrings' option, if also present, will
+     override the `-fconstant-string-class' setting and cause `@"..."'
+     literals to be laid out as constant CoreFoundation strings.
+
+`-fgnu-runtime'
+     Generate object code compatible with the standard GNU Objective-C
+     runtime.  This is the default for most types of systems.
+
+`-fnext-runtime'
+     Generate output compatible with the NeXT runtime.  This is the
+     default for NeXT-based systems, including Darwin and Mac OS X.
+     The macro `__NEXT_RUNTIME__' is predefined if (and only if) this
+     option is used.
+
+`-fno-nil-receivers'
+     Assume that all Objective-C message dispatches (`[receiver
+     message:arg]') in this translation unit ensure that the receiver is
+     not `nil'.  This allows for more efficient entry points in the
+     runtime to be used.  This option is only available in conjunction
+     with the NeXT runtime and ABI version 0 or 1.
+
+`-fobjc-abi-version=N'
+     Use version N of the Objective-C ABI for the selected runtime.
+     This option is currently supported only for the NeXT runtime.  In
+     that case, Version 0 is the traditional (32-bit) ABI without
+     support for properties and other Objective-C 2.0 additions.
+     Version 1 is the traditional (32-bit) ABI with support for
+     properties and other Objective-C 2.0 additions.  Version 2 is the
+     modern (64-bit) ABI.  If nothing is specified, the default is
+     Version 0 on 32-bit target machines, and Version 2 on 64-bit
+     target machines.
+
+`-fobjc-call-cxx-cdtors'
+     For each Objective-C class, check if any of its instance variables
+     is a C++ object with a non-trivial default constructor.  If so,
+     synthesize a special `- (id) .cxx_construct' instance method that
+     will run non-trivial default constructors on any such instance
+     variables, in order, and then return `self'.  Similarly, check if
+     any instance variable is a C++ object with a non-trivial
+     destructor, and if so, synthesize a special `- (void)
+     .cxx_destruct' method that will run all such default destructors,
+     in reverse order.
+
+     The `- (id) .cxx_construct' and `- (void) .cxx_destruct' methods
+     thusly generated will only operate on instance variables declared
+     in the current Objective-C class, and not those inherited from
+     superclasses.  It is the responsibility of the Objective-C runtime
+     to invoke all such methods in an object's inheritance hierarchy.
+     The `- (id) .cxx_construct' methods will be invoked by the runtime
+     immediately after a new object instance is allocated; the `-
+     (void) .cxx_destruct' methods will be invoked immediately before
+     the runtime deallocates an object instance.
+
+     As of this writing, only the NeXT runtime on Mac OS X 10.4 and
+     later has support for invoking the `- (id) .cxx_construct' and `-
+     (void) .cxx_destruct' methods.
+
+`-fobjc-direct-dispatch'
+     Allow fast jumps to the message dispatcher.  On Darwin this is
+     accomplished via the comm page.
+
+`-fobjc-exceptions'
+     Enable syntactic support for structured exception handling in
+     Objective-C, similar to what is offered by C++ and Java.  This
+     option is required to use the Objective-C keywords `@try',
+     `@throw', `@catch', `@finally' and `@synchronized'.  This option
+     is available with both the GNU runtime and the NeXT runtime (but
+     not available in conjunction with the NeXT runtime on Mac OS X
+     10.2 and earlier).
+
+`-fobjc-gc'
+     Enable garbage collection (GC) in Objective-C and Objective-C++
+     programs.  This option is only available with the NeXT runtime; the
+     GNU runtime has a different garbage collection implementation that
+     does not require special compiler flags.
+
+`-fobjc-nilcheck'
+     For the NeXT runtime with version 2 of the ABI, check for a nil
+     receiver in method invocations before doing the actual method call.
+     This is the default and can be disabled using
+     `-fno-objc-nilcheck'.  Class methods and super calls are never
+     checked for nil in this way no matter what this flag is set to.
+     Currently this flag does nothing when the GNU runtime, or an older
+     version of the NeXT runtime ABI, is used.
+
+`-fobjc-std=objc1'
+     Conform to the language syntax of Objective-C 1.0, the language
+     recognized by GCC 4.0.  This only affects the Objective-C
+     additions to the C/C++ language; it does not affect conformance to
+     C/C++ standards, which is controlled by the separate C/C++ dialect
+     option flags.  When this option is used with the Objective-C or
+     Objective-C++ compiler, any Objective-C syntax that is not
+     recognized by GCC 4.0 is rejected.  This is useful if you need to
+     make sure that your Objective-C code can be compiled with older
+     versions of GCC.
+
+`-freplace-objc-classes'
+     Emit a special marker instructing `ld(1)' not to statically link in
+     the resulting object file, and allow `dyld(1)' to load it in at
+     run time instead.  This is used in conjunction with the
+     Fix-and-Continue debugging mode, where the object file in question
+     may be recompiled and dynamically reloaded in the course of
+     program execution, without the need to restart the program itself.
+     Currently, Fix-and-Continue functionality is only available in
+     conjunction with the NeXT runtime on Mac OS X 10.3 and later.
+
+`-fzero-link'
+     When compiling for the NeXT runtime, the compiler ordinarily
+     replaces calls to `objc_getClass("...")' (when the name of the
+     class is known at compile time) with static class references that
+     get initialized at load time, which improves run-time performance.
+     Specifying the `-fzero-link' flag suppresses this behavior and
+     causes calls to `objc_getClass("...")' to be retained.  This is
+     useful in Zero-Link debugging mode, since it allows for individual
+     class implementations to be modified during program execution.
+     The GNU runtime currently always retains calls to
+     `objc_get_class("...")' regardless of command line options.
+
+`-gen-decls'
+     Dump interface declarations for all classes seen in the source
+     file to a file named `SOURCENAME.decl'.
+
+`-Wassign-intercept (Objective-C and Objective-C++ only)'
+     Warn whenever an Objective-C assignment is being intercepted by the
+     garbage collector.
+
+`-Wno-protocol (Objective-C and Objective-C++ only)'
+     If a class is declared to implement a protocol, a warning is
+     issued for every method in the protocol that is not implemented by
+     the class.  The default behavior is to issue a warning for every
+     method not explicitly implemented in the class, even if a method
+     implementation is inherited from the superclass.  If you use the
+     `-Wno-protocol' option, then methods inherited from the superclass
+     are considered to be implemented, and no warning is issued for
+     them.
+
+`-Wselector (Objective-C and Objective-C++ only)'
+     Warn if multiple methods of different types for the same selector
+     are found during compilation.  The check is performed on the list
+     of methods in the final stage of compilation.  Additionally, a
+     check is performed for each selector appearing in a
+     `@selector(...)'  expression, and a corresponding method for that
+     selector has been found during compilation.  Because these checks
+     scan the method table only at the end of compilation, these
+     warnings are not produced if the final stage of compilation is not
+     reached, for example because an error is found during compilation,
+     or because the `-fsyntax-only' option is being used.
+
+`-Wstrict-selector-match (Objective-C and Objective-C++ only)'
+     Warn if multiple methods with differing argument and/or return
+     types are found for a given selector when attempting to send a
+     message using this selector to a receiver of type `id' or `Class'.
+     When this flag is off (which is the default behavior), the
+     compiler will omit such warnings if any differences found are
+     confined to types which share the same size and alignment.
+
+`-Wundeclared-selector (Objective-C and Objective-C++ only)'
+     Warn if a `@selector(...)' expression referring to an undeclared
+     selector is found.  A selector is considered undeclared if no
+     method with that name has been declared before the
+     `@selector(...)' expression, either explicitly in an `@interface'
+     or `@protocol' declaration, or implicitly in an `@implementation'
+     section.  This option always performs its checks as soon as a
+     `@selector(...)' expression is found, while `-Wselector' only
+     performs its checks in the final stage of compilation.  This also
+     enforces the coding style convention that methods and selectors
+     must be declared before being used.
+
+`-print-objc-runtime-info'
+     Generate C header describing the largest structure that is passed
+     by value, if any.
+
+
+
+File: gcc.info,  Node: Language Independent Options,  Next: Warning Options,  Prev: Objective-C and Objective-C++ Dialect Options,  Up: Invoking GCC
+
+3.7 Options to Control Diagnostic Messages Formatting
+=====================================================
+
+Traditionally, diagnostic messages have been formatted irrespective of
+the output device's aspect (e.g. its width, ...).  The options described
+below can be used to control the diagnostic messages formatting
+algorithm, e.g. how many characters per line, how often source location
+information should be reported.  Right now, only the C++ front end can
+honor these options.  However it is expected, in the near future, that
+the remaining front ends would be able to digest them correctly.
+
+`-fmessage-length=N'
+     Try to format error messages so that they fit on lines of about N
+     characters.  The default is 72 characters for `g++' and 0 for the
+     rest of the front ends supported by GCC.  If N is zero, then no
+     line-wrapping will be done; each error message will appear on a
+     single line.
+
+`-fdiagnostics-show-location=once'
+     Only meaningful in line-wrapping mode.  Instructs the diagnostic
+     messages reporter to emit _once_ source location information; that
+     is, in case the message is too long to fit on a single physical
+     line and has to be wrapped, the source location won't be emitted
+     (as prefix) again, over and over, in subsequent continuation
+     lines.  This is the default behavior.
+
+`-fdiagnostics-show-location=every-line'
+     Only meaningful in line-wrapping mode.  Instructs the diagnostic
+     messages reporter to emit the same source location information (as
+     prefix) for physical lines that result from the process of breaking
+     a message which is too long to fit on a single line.
+
+`-fno-diagnostics-show-option'
+     By default, each diagnostic emitted includes text which indicates
+     the command line option that directly controls the diagnostic (if
+     such an option is known to the diagnostic machinery).  Specifying
+     the `-fno-diagnostics-show-option' flag suppresses that behavior.
+
+`-Wcoverage-mismatch'
+     Warn if feedback profiles do not match when using the
+     `-fprofile-use' option.  If a source file was changed between
+     `-fprofile-gen' and `-fprofile-use', the files with the profile
+     feedback can fail to match the source file and GCC can not use the
+     profile feedback information.  By default, this warning is enabled
+     and is treated as an error.  `-Wno-coverage-mismatch' can be used
+     to disable the warning or `-Wno-error=coverage-mismatch' can be
+     used to disable the error.  Disable the error for this warning can
+     result in poorly optimized code, so disabling the error is useful
+     only in the case of very minor changes such as bug fixes to an
+     existing code-base.  Completely disabling the warning is not
+     recommended.
+
+
+
+File: gcc.info,  Node: Warning Options,  Next: Debugging Options,  Prev: Language Independent Options,  Up: Invoking GCC
+
+3.8 Options to Request or Suppress Warnings
+===========================================
+
+Warnings are diagnostic messages that report constructions which are
+not inherently erroneous but which are risky or suggest there may have
+been an error.
+
+ The following language-independent options do not enable specific
+warnings but control the kinds of diagnostics produced by GCC.
+
+`-fsyntax-only'
+     Check the code for syntax errors, but don't do anything beyond
+     that.
+
+`-fmax-errors=N'
+     Limits the maximum number of error messages to N, at which point
+     GCC bails out rather than attempting to continue processing the
+     source code.  If N is 0 (the default), there is no limit on the
+     number of error messages produced.  If `-Wfatal-errors' is also
+     specified, then `-Wfatal-errors' takes precedence over this option.
+
+`-w'
+     Inhibit all warning messages.
+
+`-Werror'
+     Make all warnings into errors.
+
+`-Werror='
+     Make the specified warning into an error.  The specifier for a
+     warning is appended, for example `-Werror=switch' turns the
+     warnings controlled by `-Wswitch' into errors.  This switch takes a
+     negative form, to be used to negate `-Werror' for specific
+     warnings, for example `-Wno-error=switch' makes `-Wswitch'
+     warnings not be errors, even when `-Werror' is in effect.
+
+     The warning message for each controllable warning includes the
+     option which controls the warning.  That option can then be used
+     with `-Werror=' and `-Wno-error=' as described above.  (Printing
+     of the option in the warning message can be disabled using the
+     `-fno-diagnostics-show-option' flag.)
+
+     Note that specifying `-Werror='FOO automatically implies `-W'FOO.
+     However, `-Wno-error='FOO does not imply anything.
+
+`-Wfatal-errors'
+     This option causes the compiler to abort compilation on the first
+     error occurred rather than trying to keep going and printing
+     further error messages.
+
+
+ You can request many specific warnings with options beginning `-W',
+for example `-Wimplicit' to request warnings on implicit declarations.
+Each of these specific warning options also has a negative form
+beginning `-Wno-' to turn off warnings; for example, `-Wno-implicit'.
+This manual lists only one of the two forms, whichever is not the
+default.  For further, language-specific options also refer to *note
+C++ Dialect Options:: and *note Objective-C and Objective-C++ Dialect
+Options::.
+
+ When an unrecognized warning option is requested (e.g.,
+`-Wunknown-warning'), GCC will emit a diagnostic stating that the
+option is not recognized.  However, if the `-Wno-' form is used, the
+behavior is slightly different: No diagnostic will be produced for
+`-Wno-unknown-warning' unless other diagnostics are being produced.
+This allows the use of new `-Wno-' options with old compilers, but if
+something goes wrong, the compiler will warn that an unrecognized
+option was used.
+
+`-pedantic'
+     Issue all the warnings demanded by strict ISO C and ISO C++;
+     reject all programs that use forbidden extensions, and some other
+     programs that do not follow ISO C and ISO C++.  For ISO C, follows
+     the version of the ISO C standard specified by any `-std' option
+     used.
+
+     Valid ISO C and ISO C++ programs should compile properly with or
+     without this option (though a rare few will require `-ansi' or a
+     `-std' option specifying the required version of ISO C).  However,
+     without this option, certain GNU extensions and traditional C and
+     C++ features are supported as well.  With this option, they are
+     rejected.
+
+     `-pedantic' does not cause warning messages for use of the
+     alternate keywords whose names begin and end with `__'.  Pedantic
+     warnings are also disabled in the expression that follows
+     `__extension__'.  However, only system header files should use
+     these escape routes; application programs should avoid them.
+     *Note Alternate Keywords::.
+
+     Some users try to use `-pedantic' to check programs for strict ISO
+     C conformance.  They soon find that it does not do quite what they
+     want: it finds some non-ISO practices, but not all--only those for
+     which ISO C _requires_ a diagnostic, and some others for which
+     diagnostics have been added.
+
+     A feature to report any failure to conform to ISO C might be
+     useful in some instances, but would require considerable
+     additional work and would be quite different from `-pedantic'.  We
+     don't have plans to support such a feature in the near future.
+
+     Where the standard specified with `-std' represents a GNU extended
+     dialect of C, such as `gnu90' or `gnu99', there is a corresponding
+     "base standard", the version of ISO C on which the GNU extended
+     dialect is based.  Warnings from `-pedantic' are given where they
+     are required by the base standard.  (It would not make sense for
+     such warnings to be given only for features not in the specified
+     GNU C dialect, since by definition the GNU dialects of C include
+     all features the compiler supports with the given option, and
+     there would be nothing to warn about.)
+
+`-pedantic-errors'
+     Like `-pedantic', except that errors are produced rather than
+     warnings.
+
+`-Wall'
+     This enables all the warnings about constructions that some users
+     consider questionable, and that are easy to avoid (or modify to
+     prevent the warning), even in conjunction with macros.  This also
+     enables some language-specific warnings described in *note C++
+     Dialect Options:: and *note Objective-C and Objective-C++ Dialect
+     Options::.
+
+     `-Wall' turns on the following warning flags:
+
+          -Waddress
+          -Warray-bounds (only with `-O2')
+          -Wc++0x-compat
+          -Wchar-subscripts
+          -Wenum-compare (in C/Objc; this is on by default in C++)
+          -Wimplicit-int (C and Objective-C only)
+          -Wimplicit-function-declaration (C and Objective-C only)
+          -Wcomment
+          -Wformat
+          -Wmain (only for C/ObjC and unless `-ffreestanding')
+          -Wmissing-braces
+          -Wnonnull
+          -Wparentheses
+          -Wpointer-sign
+          -Wreorder
+          -Wreturn-type
+          -Wsequence-point
+          -Wsign-compare (only in C++)
+          -Wstrict-aliasing
+          -Wstrict-overflow=1
+          -Wswitch
+          -Wtrigraphs
+          -Wuninitialized
+          -Wunknown-pragmas
+          -Wunused-function
+          -Wunused-label
+          -Wunused-value
+          -Wunused-variable
+          -Wvolatile-register-var
+
+     Note that some warning flags are not implied by `-Wall'.  Some of
+     them warn about constructions that users generally do not consider
+     questionable, but which occasionally you might wish to check for;
+     others warn about constructions that are necessary or hard to
+     avoid in some cases, and there is no simple way to modify the code
+     to suppress the warning. Some of them are enabled by `-Wextra' but
+     many of them must be enabled individually.
+
+`-Wextra'
+     This enables some extra warning flags that are not enabled by
+     `-Wall'. (This option used to be called `-W'.  The older name is
+     still supported, but the newer name is more descriptive.)
+
+          -Wclobbered
+          -Wempty-body
+          -Wignored-qualifiers
+          -Wmissing-field-initializers
+          -Wmissing-parameter-type (C only)
+          -Wold-style-declaration (C only)
+          -Woverride-init
+          -Wsign-compare
+          -Wtype-limits
+          -Wuninitialized
+          -Wunused-parameter (only with `-Wunused' or `-Wall')
+          -Wunused-but-set-parameter (only with `-Wunused' or `-Wall')
+
+     The option `-Wextra' also prints warning messages for the
+     following cases:
+
+        * A pointer is compared against integer zero with `<', `<=',
+          `>', or `>='.
+
+        * (C++ only) An enumerator and a non-enumerator both appear in a
+          conditional expression.
+
+        * (C++ only) Ambiguous virtual bases.
+
+        * (C++ only) Subscripting an array which has been declared
+          `register'.
+
+        * (C++ only) Taking the address of a variable which has been
+          declared `register'.
+
+        * (C++ only) A base class is not initialized in a derived
+          class' copy constructor.
+
+
+`-Wchar-subscripts'
+     Warn if an array subscript has type `char'.  This is a common cause
+     of error, as programmers often forget that this type is signed on
+     some machines.  This warning is enabled by `-Wall'.
+
+`-Wcomment'
+     Warn whenever a comment-start sequence `/*' appears in a `/*'
+     comment, or whenever a Backslash-Newline appears in a `//' comment.
+     This warning is enabled by `-Wall'.
+
+`-Wno-cpp'
+     (C, Objective-C, C++, Objective-C++ and Fortran only)
+
+     Suppress warning messages emitted by `#warning' directives.
+
+`-Wdouble-promotion (C, C++, Objective-C and Objective-C++ only)'
+     Give a warning when a value of type `float' is implicitly promoted
+     to `double'.  CPUs with a 32-bit "single-precision" floating-point
+     unit implement `float' in hardware, but emulate `double' in
+     software.  On such a machine, doing computations using `double'
+     values is much more expensive because of the overhead required for
+     software emulation.
+
+     It is easy to accidentally do computations with `double' because
+     floating-point literals are implicitly of type `double'.  For
+     example, in:
+          float area(float radius)
+          {
+             return 3.14159 * radius * radius;
+          }
+     the compiler will perform the entire computation with `double'
+     because the floating-point literal is a `double'.
+
+`-Wformat'
+     Check calls to `printf' and `scanf', etc., to make sure that the
+     arguments supplied have types appropriate to the format string
+     specified, and that the conversions specified in the format string
+     make sense.  This includes standard functions, and others
+     specified by format attributes (*note Function Attributes::), in
+     the `printf', `scanf', `strftime' and `strfmon' (an X/Open
+     extension, not in the C standard) families (or other
+     target-specific families).  Which functions are checked without
+     format attributes having been specified depends on the standard
+     version selected, and such checks of functions without the
+     attribute specified are disabled by `-ffreestanding' or
+     `-fno-builtin'.
+
+     The formats are checked against the format features supported by
+     GNU libc version 2.2.  These include all ISO C90 and C99 features,
+     as well as features from the Single Unix Specification and some
+     BSD and GNU extensions.  Other library implementations may not
+     support all these features; GCC does not support warning about
+     features that go beyond a particular library's limitations.
+     However, if `-pedantic' is used with `-Wformat', warnings will be
+     given about format features not in the selected standard version
+     (but not for `strfmon' formats, since those are not in any version
+     of the C standard).  *Note Options Controlling C Dialect: C
+     Dialect Options.
+
+     Since `-Wformat' also checks for null format arguments for several
+     functions, `-Wformat' also implies `-Wnonnull'.
+
+     `-Wformat' is included in `-Wall'.  For more control over some
+     aspects of format checking, the options `-Wformat-y2k',
+     `-Wno-format-extra-args', `-Wno-format-zero-length',
+     `-Wformat-nonliteral', `-Wformat-security', and `-Wformat=2' are
+     available, but are not included in `-Wall'.
+
+`-Wformat-y2k'
+     If `-Wformat' is specified, also warn about `strftime' formats
+     which may yield only a two-digit year.
+
+`-Wno-format-contains-nul'
+     If `-Wformat' is specified, do not warn about format strings that
+     contain NUL bytes.
+
+`-Wno-format-extra-args'
+     If `-Wformat' is specified, do not warn about excess arguments to a
+     `printf' or `scanf' format function.  The C standard specifies
+     that such arguments are ignored.
+
+     Where the unused arguments lie between used arguments that are
+     specified with `$' operand number specifications, normally
+     warnings are still given, since the implementation could not know
+     what type to pass to `va_arg' to skip the unused arguments.
+     However, in the case of `scanf' formats, this option will suppress
+     the warning if the unused arguments are all pointers, since the
+     Single Unix Specification says that such unused arguments are
+     allowed.
+
+`-Wno-format-zero-length (C and Objective-C only)'
+     If `-Wformat' is specified, do not warn about zero-length formats.
+     The C standard specifies that zero-length formats are allowed.
+
+`-Wformat-nonliteral'
+     If `-Wformat' is specified, also warn if the format string is not a
+     string literal and so cannot be checked, unless the format function
+     takes its format arguments as a `va_list'.
+
+`-Wformat-security'
+     If `-Wformat' is specified, also warn about uses of format
+     functions that represent possible security problems.  At present,
+     this warns about calls to `printf' and `scanf' functions where the
+     format string is not a string literal and there are no format
+     arguments, as in `printf (foo);'.  This may be a security hole if
+     the format string came from untrusted input and contains `%n'.
+     (This is currently a subset of what `-Wformat-nonliteral' warns
+     about, but in future warnings may be added to `-Wformat-security'
+     that are not included in `-Wformat-nonliteral'.)
+
+`-Wformat=2'
+     Enable `-Wformat' plus format checks not included in `-Wformat'.
+     Currently equivalent to `-Wformat -Wformat-nonliteral
+     -Wformat-security -Wformat-y2k'.
+
+`-Wnonnull (C and Objective-C only)'
+     Warn about passing a null pointer for arguments marked as
+     requiring a non-null value by the `nonnull' function attribute.
+
+     `-Wnonnull' is included in `-Wall' and `-Wformat'.  It can be
+     disabled with the `-Wno-nonnull' option.
+
+`-Winit-self (C, C++, Objective-C and Objective-C++ only)'
+     Warn about uninitialized variables which are initialized with
+     themselves.  Note this option can only be used with the
+     `-Wuninitialized' option.
+
+     For example, GCC will warn about `i' being uninitialized in the
+     following snippet only when `-Winit-self' has been specified:
+          int f()
+          {
+            int i = i;
+            return i;
+          }
+
+`-Wimplicit-int (C and Objective-C only)'
+     Warn when a declaration does not specify a type.  This warning is
+     enabled by `-Wall'.
+
+`-Wimplicit-function-declaration (C and Objective-C only)'
+     Give a warning whenever a function is used before being declared.
+     In C99 mode (`-std=c99' or `-std=gnu99'), this warning is enabled
+     by default and it is made into an error by `-pedantic-errors'.
+     This warning is also enabled by `-Wall'.
+
+`-Wimplicit (C and Objective-C only)'
+     Same as `-Wimplicit-int' and `-Wimplicit-function-declaration'.
+     This warning is enabled by `-Wall'.
+
+`-Wignored-qualifiers (C and C++ only)'
+     Warn if the return type of a function has a type qualifier such as
+     `const'.  For ISO C such a type qualifier has no effect, since the
+     value returned by a function is not an lvalue.  For C++, the
+     warning is only emitted for scalar types or `void'.  ISO C
+     prohibits qualified `void' return types on function definitions,
+     so such return types always receive a warning even without this
+     option.
+
+     This warning is also enabled by `-Wextra'.
+
+`-Wmain'
+     Warn if the type of `main' is suspicious.  `main' should be a
+     function with external linkage, returning int, taking either zero
+     arguments, two, or three arguments of appropriate types.  This
+     warning is enabled by default in C++ and is enabled by either
+     `-Wall' or `-pedantic'.
+
+`-Wmissing-braces'
+     Warn if an aggregate or union initializer is not fully bracketed.
+     In the following example, the initializer for `a' is not fully
+     bracketed, but that for `b' is fully bracketed.
+
+          int a[2][2] = { 0, 1, 2, 3 };
+          int b[2][2] = { { 0, 1 }, { 2, 3 } };
+
+     This warning is enabled by `-Wall'.
+
+`-Wmissing-include-dirs (C, C++, Objective-C and Objective-C++ only)'
+     Warn if a user-supplied include directory does not exist.
+
+`-Wparentheses'
+     Warn if parentheses are omitted in certain contexts, such as when
+     there is an assignment in a context where a truth value is
+     expected, or when operators are nested whose precedence people
+     often get confused about.
+
+     Also warn if a comparison like `x<=y<=z' appears; this is
+     equivalent to `(x<=y ? 1 : 0) <= z', which is a different
+     interpretation from that of ordinary mathematical notation.
+
+     Also warn about constructions where there may be confusion to which
+     `if' statement an `else' branch belongs.  Here is an example of
+     such a case:
+
+          {
+            if (a)
+              if (b)
+                foo ();
+            else
+              bar ();
+          }
+
+     In C/C++, every `else' branch belongs to the innermost possible
+     `if' statement, which in this example is `if (b)'.  This is often
+     not what the programmer expected, as illustrated in the above
+     example by indentation the programmer chose.  When there is the
+     potential for this confusion, GCC will issue a warning when this
+     flag is specified.  To eliminate the warning, add explicit braces
+     around the innermost `if' statement so there is no way the `else'
+     could belong to the enclosing `if'.  The resulting code would look
+     like this:
+
+          {
+            if (a)
+              {
+                if (b)
+                  foo ();
+                else
+                  bar ();
+              }
+          }
+
+     Also warn for dangerous uses of the ?: with omitted middle operand
+     GNU extension. When the condition in the ?: operator is a boolean
+     expression the omitted value will be always 1. Often the user
+     expects it to be a value computed inside the conditional
+     expression instead.
+
+     This warning is enabled by `-Wall'.
+
+`-Wsequence-point'
+     Warn about code that may have undefined semantics because of
+     violations of sequence point rules in the C and C++ standards.
+
+     The C and C++ standards defines the order in which expressions in
+     a C/C++ program are evaluated in terms of "sequence points", which
+     represent a partial ordering between the execution of parts of the
+     program: those executed before the sequence point, and those
+     executed after it.  These occur after the evaluation of a full
+     expression (one which is not part of a larger expression), after
+     the evaluation of the first operand of a `&&', `||', `? :' or `,'
+     (comma) operator, before a function is called (but after the
+     evaluation of its arguments and the expression denoting the called
+     function), and in certain other places.  Other than as expressed
+     by the sequence point rules, the order of evaluation of
+     subexpressions of an expression is not specified.  All these rules
+     describe only a partial order rather than a total order, since,
+     for example, if two functions are called within one expression
+     with no sequence point between them, the order in which the
+     functions are called is not specified.  However, the standards
+     committee have ruled that function calls do not overlap.
+
+     It is not specified when between sequence points modifications to
+     the values of objects take effect.  Programs whose behavior
+     depends on this have undefined behavior; the C and C++ standards
+     specify that "Between the previous and next sequence point an
+     object shall have its stored value modified at most once by the
+     evaluation of an expression.  Furthermore, the prior value shall
+     be read only to determine the value to be stored.".  If a program
+     breaks these rules, the results on any particular implementation
+     are entirely unpredictable.
+
+     Examples of code with undefined behavior are `a = a++;', `a[n] =
+     b[n++]' and `a[i++] = i;'.  Some more complicated cases are not
+     diagnosed by this option, and it may give an occasional false
+     positive result, but in general it has been found fairly effective
+     at detecting this sort of problem in programs.
+
+     The standard is worded confusingly, therefore there is some debate
+     over the precise meaning of the sequence point rules in subtle
+     cases.  Links to discussions of the problem, including proposed
+     formal definitions, may be found on the GCC readings page, at
+     `http://gcc.gnu.org/readings.html'.
+
+     This warning is enabled by `-Wall' for C and C++.
+
+`-Wreturn-type'
+     Warn whenever a function is defined with a return-type that
+     defaults to `int'.  Also warn about any `return' statement with no
+     return-value in a function whose return-type is not `void'
+     (falling off the end of the function body is considered returning
+     without a value), and about a `return' statement with an
+     expression in a function whose return-type is `void'.
+
+     For C++, a function without return type always produces a
+     diagnostic message, even when `-Wno-return-type' is specified.
+     The only exceptions are `main' and functions defined in system
+     headers.
+
+     This warning is enabled by `-Wall'.
+
+`-Wswitch'
+     Warn whenever a `switch' statement has an index of enumerated type
+     and lacks a `case' for one or more of the named codes of that
+     enumeration.  (The presence of a `default' label prevents this
+     warning.)  `case' labels outside the enumeration range also
+     provoke warnings when this option is used (even if there is a
+     `default' label).  This warning is enabled by `-Wall'.
+
+`-Wswitch-default'
+     Warn whenever a `switch' statement does not have a `default' case.
+
+`-Wswitch-enum'
+     Warn whenever a `switch' statement has an index of enumerated type
+     and lacks a `case' for one or more of the named codes of that
+     enumeration.  `case' labels outside the enumeration range also
+     provoke warnings when this option is used.  The only difference
+     between `-Wswitch' and this option is that this option gives a
+     warning about an omitted enumeration code even if there is a
+     `default' label.
+
+`-Wsync-nand (C and C++ only)'
+     Warn when `__sync_fetch_and_nand' and `__sync_nand_and_fetch'
+     built-in functions are used.  These functions changed semantics in
+     GCC 4.4.
+
+`-Wtrigraphs'
+     Warn if any trigraphs are encountered that might change the
+     meaning of the program (trigraphs within comments are not warned
+     about).  This warning is enabled by `-Wall'.
+
+`-Wunused-but-set-parameter'
+     Warn whenever a function parameter is assigned to, but otherwise
+     unused (aside from its declaration).
+
+     To suppress this warning use the `unused' attribute (*note
+     Variable Attributes::).
+
+     This warning is also enabled by `-Wunused' together with `-Wextra'.
+
+`-Wunused-but-set-variable'
+     Warn whenever a local variable is assigned to, but otherwise unused
+     (aside from its declaration).  This warning is enabled by `-Wall'.
+
+     To suppress this warning use the `unused' attribute (*note
+     Variable Attributes::).
+
+     This warning is also enabled by `-Wunused', which is enabled by
+     `-Wall'.
+
+`-Wunused-function'
+     Warn whenever a static function is declared but not defined or a
+     non-inline static function is unused.  This warning is enabled by
+     `-Wall'.
+
+`-Wunused-label'
+     Warn whenever a label is declared but not used.  This warning is
+     enabled by `-Wall'.
+
+     To suppress this warning use the `unused' attribute (*note
+     Variable Attributes::).
+
+`-Wunused-parameter'
+     Warn whenever a function parameter is unused aside from its
+     declaration.
+
+     To suppress this warning use the `unused' attribute (*note
+     Variable Attributes::).
+
+`-Wno-unused-result'
+     Do not warn if a caller of a function marked with attribute
+     `warn_unused_result' (*note Variable Attributes::) does not use
+     its return value. The default is `-Wunused-result'.
+
+`-Wunused-variable'
+     Warn whenever a local variable or non-constant static variable is
+     unused aside from its declaration.  This warning is enabled by
+     `-Wall'.
+
+     To suppress this warning use the `unused' attribute (*note
+     Variable Attributes::).
+
+`-Wunused-value'
+     Warn whenever a statement computes a result that is explicitly not
+     used. To suppress this warning cast the unused expression to
+     `void'. This includes an expression-statement or the left-hand
+     side of a comma expression that contains no side effects. For
+     example, an expression such as `x[i,j]' will cause a warning, while
+     `x[(void)i,j]' will not.
+
+     This warning is enabled by `-Wall'.
+
+`-Wunused'
+     All the above `-Wunused' options combined.
+
+     In order to get a warning about an unused function parameter, you
+     must either specify `-Wextra -Wunused' (note that `-Wall' implies
+     `-Wunused'), or separately specify `-Wunused-parameter'.
+
+`-Wuninitialized'
+     Warn if an automatic variable is used without first being
+     initialized or if a variable may be clobbered by a `setjmp' call.
+     In C++, warn if a non-static reference or non-static `const' member
+     appears in a class without constructors.
+
+     If you want to warn about code which uses the uninitialized value
+     of the variable in its own initializer, use the `-Winit-self'
+     option.
+
+     These warnings occur for individual uninitialized or clobbered
+     elements of structure, union or array variables as well as for
+     variables which are uninitialized or clobbered as a whole.  They do
+     not occur for variables or elements declared `volatile'.  Because
+     these warnings depend on optimization, the exact variables or
+     elements for which there are warnings will depend on the precise
+     optimization options and version of GCC used.
+
+     Note that there may be no warning about a variable that is used
+     only to compute a value that itself is never used, because such
+     computations may be deleted by data flow analysis before the
+     warnings are printed.
+
+     These warnings are made optional because GCC is not smart enough
+     to see all the reasons why the code might be correct despite
+     appearing to have an error.  Here is one example of how this can
+     happen:
+
+          {
+            int x;
+            switch (y)
+              {
+              case 1: x = 1;
+                break;
+              case 2: x = 4;
+                break;
+              case 3: x = 5;
+              }
+            foo (x);
+          }
+
+     If the value of `y' is always 1, 2 or 3, then `x' is always
+     initialized, but GCC doesn't know this.  Here is another common
+     case:
+
+          {
+            int save_y;
+            if (change_y) save_y = y, y = new_y;
+            ...
+            if (change_y) y = save_y;
+          }
+
+     This has no bug because `save_y' is used only if it is set.
+
+     This option also warns when a non-volatile automatic variable
+     might be changed by a call to `longjmp'.  These warnings as well
+     are possible only in optimizing compilation.
+
+     The compiler sees only the calls to `setjmp'.  It cannot know
+     where `longjmp' will be called; in fact, a signal handler could
+     call it at any point in the code.  As a result, you may get a
+     warning even when there is in fact no problem because `longjmp'
+     cannot in fact be called at the place which would cause a problem.
+
+     Some spurious warnings can be avoided if you declare all the
+     functions you use that never return as `noreturn'.  *Note Function
+     Attributes::.
+
+     This warning is enabled by `-Wall' or `-Wextra'.
+
+`-Wunknown-pragmas'
+     Warn when a #pragma directive is encountered which is not
+     understood by GCC.  If this command line option is used, warnings
+     will even be issued for unknown pragmas in system header files.
+     This is not the case if the warnings were only enabled by the
+     `-Wall' command line option.
+
+`-Wno-pragmas'
+     Do not warn about misuses of pragmas, such as incorrect parameters,
+     invalid syntax, or conflicts between pragmas.  See also
+     `-Wunknown-pragmas'.
+
+`-Wstrict-aliasing'
+     This option is only active when `-fstrict-aliasing' is active.  It
+     warns about code which might break the strict aliasing rules that
+     the compiler is using for optimization.  The warning does not
+     catch all cases, but does attempt to catch the more common
+     pitfalls.  It is included in `-Wall'.  It is equivalent to
+     `-Wstrict-aliasing=3'
+
+`-Wstrict-aliasing=n'
+     This option is only active when `-fstrict-aliasing' is active.  It
+     warns about code which might break the strict aliasing rules that
+     the compiler is using for optimization.  Higher levels correspond
+     to higher accuracy (fewer false positives).  Higher levels also
+     correspond to more effort, similar to the way -O works.
+     `-Wstrict-aliasing' is equivalent to `-Wstrict-aliasing=n', with
+     n=3.
+
+     Level 1: Most aggressive, quick, least accurate.  Possibly useful
+     when higher levels do not warn but -fstrict-aliasing still breaks
+     the code, as it has very few false negatives.  However, it has
+     many false positives.  Warns for all pointer conversions between
+     possibly incompatible types, even if never dereferenced.  Runs in
+     the frontend only.
+
+     Level 2: Aggressive, quick, not too precise.  May still have many
+     false positives (not as many as level 1 though), and few false
+     negatives (but possibly more than level 1).  Unlike level 1, it
+     only warns when an address is taken.  Warns about incomplete
+     types.  Runs in the frontend only.
+
+     Level 3 (default for `-Wstrict-aliasing'): Should have very few
+     false positives and few false negatives.  Slightly slower than
+     levels 1 or 2 when optimization is enabled.  Takes care of the
+     common pun+dereference pattern in the frontend:
+     `*(int*)&some_float'.  If optimization is enabled, it also runs in
+     the backend, where it deals with multiple statement cases using
+     flow-sensitive points-to information.  Only warns when the
+     converted pointer is dereferenced.  Does not warn about incomplete
+     types.
+
+`-Wstrict-overflow'
+`-Wstrict-overflow=N'
+     This option is only active when `-fstrict-overflow' is active.  It
+     warns about cases where the compiler optimizes based on the
+     assumption that signed overflow does not occur.  Note that it does
+     not warn about all cases where the code might overflow: it only
+     warns about cases where the compiler implements some optimization.
+     Thus this warning depends on the optimization level.
+
+     An optimization which assumes that signed overflow does not occur
+     is perfectly safe if the values of the variables involved are such
+     that overflow never does, in fact, occur.  Therefore this warning
+     can easily give a false positive: a warning about code which is not
+     actually a problem.  To help focus on important issues, several
+     warning levels are defined.  No warnings are issued for the use of
+     undefined signed overflow when estimating how many iterations a
+     loop will require, in particular when determining whether a loop
+     will be executed at all.
+
+    `-Wstrict-overflow=1'
+          Warn about cases which are both questionable and easy to
+          avoid.  For example: `x + 1 > x'; with `-fstrict-overflow',
+          the compiler will simplify this to `1'.  This level of
+          `-Wstrict-overflow' is enabled by `-Wall'; higher levels are
+          not, and must be explicitly requested.
+
+    `-Wstrict-overflow=2'
+          Also warn about other cases where a comparison is simplified
+          to a constant.  For example: `abs (x) >= 0'.  This can only be
+          simplified when `-fstrict-overflow' is in effect, because
+          `abs (INT_MIN)' overflows to `INT_MIN', which is less than
+          zero.  `-Wstrict-overflow' (with no level) is the same as
+          `-Wstrict-overflow=2'.
+
+    `-Wstrict-overflow=3'
+          Also warn about other cases where a comparison is simplified.
+          For example: `x + 1 > 1' will be simplified to `x > 0'.
+
+    `-Wstrict-overflow=4'
+          Also warn about other simplifications not covered by the
+          above cases.  For example: `(x * 10) / 5' will be simplified
+          to `x * 2'.
+
+    `-Wstrict-overflow=5'
+          Also warn about cases where the compiler reduces the
+          magnitude of a constant involved in a comparison.  For
+          example: `x + 2 > y' will be simplified to `x + 1 >= y'.
+          This is reported only at the highest warning level because
+          this simplification applies to many comparisons, so this
+          warning level will give a very large number of false
+          positives.
+
+`-Wsuggest-attribute=[pure|const|noreturn]'
+     Warn for cases where adding an attribute may be beneficial. The
+     attributes currently supported are listed below.
+
+    `-Wsuggest-attribute=pure'
+    `-Wsuggest-attribute=const'
+    `-Wsuggest-attribute=noreturn'
+          Warn about functions which might be candidates for attributes
+          `pure', `const' or `noreturn'.  The compiler only warns for
+          functions visible in other compilation units or (in the case
+          of `pure' and `const') if it cannot prove that the function
+          returns normally. A function returns normally if it doesn't
+          contain an infinite loop nor returns abnormally by throwing,
+          calling `abort()' or trapping.  This analysis requires option
+          `-fipa-pure-const', which is enabled by default at `-O' and
+          higher.  Higher optimization levels improve the accuracy of
+          the analysis.
+
+`-Warray-bounds'
+     This option is only active when `-ftree-vrp' is active (default
+     for `-O2' and above). It warns about subscripts to arrays that are
+     always out of bounds. This warning is enabled by `-Wall'.
+
+`-Wno-div-by-zero'
+     Do not warn about compile-time integer division by zero.  Floating
+     point division by zero is not warned about, as it can be a
+     legitimate way of obtaining infinities and NaNs.
+
+`-Wsystem-headers'
+     Print warning messages for constructs found in system header files.
+     Warnings from system headers are normally suppressed, on the
+     assumption that they usually do not indicate real problems and
+     would only make the compiler output harder to read.  Using this
+     command line option tells GCC to emit warnings from system headers
+     as if they occurred in user code.  However, note that using
+     `-Wall' in conjunction with this option will _not_ warn about
+     unknown pragmas in system headers--for that, `-Wunknown-pragmas'
+     must also be used.
+
+`-Wtrampolines'
+     Warn about trampolines generated for pointers to nested functions.
+
+     A trampoline is a small piece of data or code that is created at
+     run  time on the stack when the address of a nested function is
+     taken, and  is used to call the nested function indirectly.  For
+     some targets, it  is made up of data only and thus requires no
+     special treatment.  But,  for most targets, it is made up of code
+     and thus requires the stack  to be made executable in order for
+     the program to work properly.
+
+`-Wfloat-equal'
+     Warn if floating point values are used in equality comparisons.
+
+     The idea behind this is that sometimes it is convenient (for the
+     programmer) to consider floating-point values as approximations to
+     infinitely precise real numbers.  If you are doing this, then you
+     need to compute (by analyzing the code, or in some other way) the
+     maximum or likely maximum error that the computation introduces,
+     and allow for it when performing comparisons (and when producing
+     output, but that's a different problem).  In particular, instead
+     of testing for equality, you would check to see whether the two
+     values have ranges that overlap; and this is done with the
+     relational operators, so equality comparisons are probably
+     mistaken.
+
+`-Wtraditional (C and Objective-C only)'
+     Warn about certain constructs that behave differently in
+     traditional and ISO C.  Also warn about ISO C constructs that have
+     no traditional C equivalent, and/or problematic constructs which
+     should be avoided.
+
+        * Macro parameters that appear within string literals in the
+          macro body.  In traditional C macro replacement takes place
+          within string literals, but does not in ISO C.
+
+        * In traditional C, some preprocessor directives did not exist.
+          Traditional preprocessors would only consider a line to be a
+          directive if the `#' appeared in column 1 on the line.
+          Therefore `-Wtraditional' warns about directives that
+          traditional C understands but would ignore because the `#'
+          does not appear as the first character on the line.  It also
+          suggests you hide directives like `#pragma' not understood by
+          traditional C by indenting them.  Some traditional
+          implementations would not recognize `#elif', so it suggests
+          avoiding it altogether.
+
+        * A function-like macro that appears without arguments.
+
+        * The unary plus operator.
+
+        * The `U' integer constant suffix, or the `F' or `L' floating
+          point constant suffixes.  (Traditional C does support the `L'
+          suffix on integer constants.)  Note, these suffixes appear in
+          macros defined in the system headers of most modern systems,
+          e.g. the `_MIN'/`_MAX' macros in `<limits.h>'.  Use of these
+          macros in user code might normally lead to spurious warnings,
+          however GCC's integrated preprocessor has enough context to
+          avoid warning in these cases.
+
+        * A function declared external in one block and then used after
+          the end of the block.
+
+        * A `switch' statement has an operand of type `long'.
+
+        * A non-`static' function declaration follows a `static' one.
+          This construct is not accepted by some traditional C
+          compilers.
+
+        * The ISO type of an integer constant has a different width or
+          signedness from its traditional type.  This warning is only
+          issued if the base of the constant is ten.  I.e. hexadecimal
+          or octal values, which typically represent bit patterns, are
+          not warned about.
+
+        * Usage of ISO string concatenation is detected.
+
+        * Initialization of automatic aggregates.
+
+        * Identifier conflicts with labels.  Traditional C lacks a
+          separate namespace for labels.
+
+        * Initialization of unions.  If the initializer is zero, the
+          warning is omitted.  This is done under the assumption that
+          the zero initializer in user code appears conditioned on e.g.
+          `__STDC__' to avoid missing initializer warnings and relies
+          on default initialization to zero in the traditional C case.
+
+        * Conversions by prototypes between fixed/floating point values
+          and vice versa.  The absence of these prototypes when
+          compiling with traditional C would cause serious problems.
+          This is a subset of the possible conversion warnings, for the
+          full set use `-Wtraditional-conversion'.
+
+        * Use of ISO C style function definitions.  This warning
+          intentionally is _not_ issued for prototype declarations or
+          variadic functions because these ISO C features will appear
+          in your code when using libiberty's traditional C
+          compatibility macros, `PARAMS' and `VPARAMS'.  This warning
+          is also bypassed for nested functions because that feature is
+          already a GCC extension and thus not relevant to traditional
+          C compatibility.
+
+`-Wtraditional-conversion (C and Objective-C only)'
+     Warn if a prototype causes a type conversion that is different
+     from what would happen to the same argument in the absence of a
+     prototype.  This includes conversions of fixed point to floating
+     and vice versa, and conversions changing the width or signedness
+     of a fixed point argument except when the same as the default
+     promotion.
+
+`-Wdeclaration-after-statement (C and Objective-C only)'
+     Warn when a declaration is found after a statement in a block.
+     This construct, known from C++, was introduced with ISO C99 and is
+     by default allowed in GCC.  It is not supported by ISO C90 and was
+     not supported by GCC versions before GCC 3.0.  *Note Mixed
+     Declarations::.
+
+`-Wundef'
+     Warn if an undefined identifier is evaluated in an `#if' directive.
+
+`-Wno-endif-labels'
+     Do not warn whenever an `#else' or an `#endif' are followed by
+     text.
+
+`-Wshadow'
+     Warn whenever a local variable or type declaration shadows another
+     variable, parameter, type, or class member (in C++), or whenever a
+     built-in function is shadowed. Note that in C++, the compiler will
+     not warn if a local variable shadows a struct/class/enum, but will
+     warn if it shadows an explicit typedef.
+
+`-Wlarger-than=LEN'
+     Warn whenever an object of larger than LEN bytes is defined.
+
+`-Wframe-larger-than=LEN'
+     Warn if the size of a function frame is larger than LEN bytes.
+     The computation done to determine the stack frame size is
+     approximate and not conservative.  The actual requirements may be
+     somewhat greater than LEN even if you do not get a warning.  In
+     addition, any space allocated via `alloca', variable-length
+     arrays, or related constructs is not included by the compiler when
+     determining whether or not to issue a warning.
+
+`-Wunsafe-loop-optimizations'
+     Warn if the loop cannot be optimized because the compiler could not
+     assume anything on the bounds of the loop indices.  With
+     `-funsafe-loop-optimizations' warn if the compiler made such
+     assumptions.
+
+`-Wno-pedantic-ms-format (MinGW targets only)'
+     Disables the warnings about non-ISO `printf' / `scanf' format
+     width specifiers `I32', `I64', and `I' used on Windows targets
+     depending on the MS runtime, when you are using the options
+     `-Wformat' and `-pedantic' without gnu-extensions.
+
+`-Wpointer-arith'
+     Warn about anything that depends on the "size of" a function type
+     or of `void'.  GNU C assigns these types a size of 1, for
+     convenience in calculations with `void *' pointers and pointers to
+     functions.  In C++, warn also when an arithmetic operation involves
+     `NULL'.  This warning is also enabled by `-pedantic'.
+
+`-Wtype-limits'
+     Warn if a comparison is always true or always false due to the
+     limited range of the data type, but do not warn for constant
+     expressions.  For example, warn if an unsigned variable is
+     compared against zero with `<' or `>='.  This warning is also
+     enabled by `-Wextra'.
+
+`-Wbad-function-cast (C and Objective-C only)'
+     Warn whenever a function call is cast to a non-matching type.  For
+     example, warn if `int malloc()' is cast to `anything *'.
+
+`-Wc++-compat (C and Objective-C only)'
+     Warn about ISO C constructs that are outside of the common subset
+     of ISO C and ISO C++, e.g. request for implicit conversion from
+     `void *' to a pointer to non-`void' type.
+
+`-Wc++0x-compat (C++ and Objective-C++ only)'
+     Warn about C++ constructs whose meaning differs between ISO C++
+     1998 and ISO C++ 200x, e.g., identifiers in ISO C++ 1998 that will
+     become keywords in ISO C++ 200x.  This warning is enabled by
+     `-Wall'.
+
+`-Wcast-qual'
+     Warn whenever a pointer is cast so as to remove a type qualifier
+     from the target type.  For example, warn if a `const char *' is
+     cast to an ordinary `char *'.
+
+     Also warn when making a cast which introduces a type qualifier in
+     an unsafe way.  For example, casting `char **' to `const char **'
+     is unsafe, as in this example:
+
+            /* p is char ** value.  */
+            const char **q = (const char **) p;
+            /* Assignment of readonly string to const char * is OK.  */
+            *q = "string";
+            /* Now char** pointer points to read-only memory.  */
+            **p = 'b';
+
+`-Wcast-align'
+     Warn whenever a pointer is cast such that the required alignment
+     of the target is increased.  For example, warn if a `char *' is
+     cast to an `int *' on machines where integers can only be accessed
+     at two- or four-byte boundaries.
+
+`-Wwrite-strings'
+     When compiling C, give string constants the type `const
+     char[LENGTH]' so that copying the address of one into a
+     non-`const' `char *' pointer will get a warning.  These warnings
+     will help you find at compile time code that can try to write into
+     a string constant, but only if you have been very careful about
+     using `const' in declarations and prototypes.  Otherwise, it will
+     just be a nuisance. This is why we did not make `-Wall' request
+     these warnings.
+
+     When compiling C++, warn about the deprecated conversion from
+     string literals to `char *'.  This warning is enabled by default
+     for C++ programs.
+
+`-Wclobbered'
+     Warn for variables that might be changed by `longjmp' or `vfork'.
+     This warning is also enabled by `-Wextra'.
+
+`-Wconversion'
+     Warn for implicit conversions that may alter a value. This includes
+     conversions between real and integer, like `abs (x)' when `x' is
+     `double'; conversions between signed and unsigned, like `unsigned
+     ui = -1'; and conversions to smaller types, like `sqrtf (M_PI)'.
+     Do not warn for explicit casts like `abs ((int) x)' and `ui =
+     (unsigned) -1', or if the value is not changed by the conversion
+     like in `abs (2.0)'.  Warnings about conversions between signed
+     and unsigned integers can be disabled by using
+     `-Wno-sign-conversion'.
+
+     For C++, also warn for confusing overload resolution for
+     user-defined conversions; and conversions that will never use a
+     type conversion operator: conversions to `void', the same type, a
+     base class or a reference to them. Warnings about conversions
+     between signed and unsigned integers are disabled by default in
+     C++ unless `-Wsign-conversion' is explicitly enabled.
+
+`-Wno-conversion-null (C++ and Objective-C++ only)'
+     Do not warn for conversions between `NULL' and non-pointer types.
+     `-Wconversion-null' is enabled by default.
+
+`-Wempty-body'
+     Warn if an empty body occurs in an `if', `else' or `do while'
+     statement.  This warning is also enabled by `-Wextra'.
+
+`-Wenum-compare'
+     Warn about a comparison between values of different enum types. In
+     C++ this warning is enabled by default.  In C this warning is
+     enabled by `-Wall'.
+
+`-Wjump-misses-init (C, Objective-C only)'
+     Warn if a `goto' statement or a `switch' statement jumps forward
+     across the initialization of a variable, or jumps backward to a
+     label after the variable has been initialized.  This only warns
+     about variables which are initialized when they are declared.
+     This warning is only supported for C and Objective C; in C++ this
+     sort of branch is an error in any case.
+
+     `-Wjump-misses-init' is included in `-Wc++-compat'.  It can be
+     disabled with the `-Wno-jump-misses-init' option.
+
+`-Wsign-compare'
+     Warn when a comparison between signed and unsigned values could
+     produce an incorrect result when the signed value is converted to
+     unsigned.  This warning is also enabled by `-Wextra'; to get the
+     other warnings of `-Wextra' without this warning, use `-Wextra
+     -Wno-sign-compare'.
+
+`-Wsign-conversion'
+     Warn for implicit conversions that may change the sign of an
+     integer value, like assigning a signed integer expression to an
+     unsigned integer variable. An explicit cast silences the warning.
+     In C, this option is enabled also by `-Wconversion'.
+
+`-Waddress'
+     Warn about suspicious uses of memory addresses. These include using
+     the address of a function in a conditional expression, such as
+     `void func(void); if (func)', and comparisons against the memory
+     address of a string literal, such as `if (x == "abc")'.  Such uses
+     typically indicate a programmer error: the address of a function
+     always evaluates to true, so their use in a conditional usually
+     indicate that the programmer forgot the parentheses in a function
+     call; and comparisons against string literals result in unspecified
+     behavior and are not portable in C, so they usually indicate that
+     the programmer intended to use `strcmp'.  This warning is enabled
+     by `-Wall'.
+
+`-Wlogical-op'
+     Warn about suspicious uses of logical operators in expressions.
+     This includes using logical operators in contexts where a bit-wise
+     operator is likely to be expected.
+
+`-Waggregate-return'
+     Warn if any functions that return structures or unions are defined
+     or called.  (In languages where you can return an array, this also
+     elicits a warning.)
+
+`-Wno-attributes'
+     Do not warn if an unexpected `__attribute__' is used, such as
+     unrecognized attributes, function attributes applied to variables,
+     etc.  This will not stop errors for incorrect use of supported
+     attributes.
+
+`-Wno-builtin-macro-redefined'
+     Do not warn if certain built-in macros are redefined.  This
+     suppresses warnings for redefinition of `__TIMESTAMP__',
+     `__TIME__', `__DATE__', `__FILE__', and `__BASE_FILE__'.
+
+`-Wstrict-prototypes (C and Objective-C only)'
+     Warn if a function is declared or defined without specifying the
+     argument types.  (An old-style function definition is permitted
+     without a warning if preceded by a declaration which specifies the
+     argument types.)
+
+`-Wold-style-declaration (C and Objective-C only)'
+     Warn for obsolescent usages, according to the C Standard, in a
+     declaration. For example, warn if storage-class specifiers like
+     `static' are not the first things in a declaration.  This warning
+     is also enabled by `-Wextra'.
+
+`-Wold-style-definition (C and Objective-C only)'
+     Warn if an old-style function definition is used.  A warning is
+     given even if there is a previous prototype.
+
+`-Wmissing-parameter-type (C and Objective-C only)'
+     A function parameter is declared without a type specifier in
+     K&R-style functions:
+
+          void foo(bar) { }
+
+     This warning is also enabled by `-Wextra'.
+
+`-Wmissing-prototypes (C and Objective-C only)'
+     Warn if a global function is defined without a previous prototype
+     declaration.  This warning is issued even if the definition itself
+     provides a prototype.  The aim is to detect global functions that
+     fail to be declared in header files.
+
+`-Wmissing-declarations'
+     Warn if a global function is defined without a previous
+     declaration.  Do so even if the definition itself provides a
+     prototype.  Use this option to detect global functions that are
+     not declared in header files.  In C++, no warnings are issued for
+     function templates, or for inline functions, or for functions in
+     anonymous namespaces.
+
+`-Wmissing-field-initializers'
+     Warn if a structure's initializer has some fields missing.  For
+     example, the following code would cause such a warning, because
+     `x.h' is implicitly zero:
+
+          struct s { int f, g, h; };
+          struct s x = { 3, 4 };
+
+     This option does not warn about designated initializers, so the
+     following modification would not trigger a warning:
+
+          struct s { int f, g, h; };
+          struct s x = { .f = 3, .g = 4 };
+
+     This warning is included in `-Wextra'.  To get other `-Wextra'
+     warnings without this one, use `-Wextra
+     -Wno-missing-field-initializers'.
+
+`-Wmissing-format-attribute'
+     Warn about function pointers which might be candidates for `format'
+     attributes.  Note these are only possible candidates, not absolute
+     ones.  GCC will guess that function pointers with `format'
+     attributes that are used in assignment, initialization, parameter
+     passing or return statements should have a corresponding `format'
+     attribute in the resulting type.  I.e. the left-hand side of the
+     assignment or initialization, the type of the parameter variable,
+     or the return type of the containing function respectively should
+     also have a `format' attribute to avoid the warning.
+
+     GCC will also warn about function definitions which might be
+     candidates for `format' attributes.  Again, these are only
+     possible candidates.  GCC will guess that `format' attributes
+     might be appropriate for any function that calls a function like
+     `vprintf' or `vscanf', but this might not always be the case, and
+     some functions for which `format' attributes are appropriate may
+     not be detected.
+
+`-Wno-multichar'
+     Do not warn if a multicharacter constant (`'FOOF'') is used.
+     Usually they indicate a typo in the user's code, as they have
+     implementation-defined values, and should not be used in portable
+     code.
+
+`-Wnormalized=<none|id|nfc|nfkc>'
+     In ISO C and ISO C++, two identifiers are different if they are
+     different sequences of characters.  However, sometimes when
+     characters outside the basic ASCII character set are used, you can
+     have two different character sequences that look the same.  To
+     avoid confusion, the ISO 10646 standard sets out some
+     "normalization rules" which when applied ensure that two sequences
+     that look the same are turned into the same sequence.  GCC can
+     warn you if you are using identifiers which have not been
+     normalized; this option controls that warning.
+
+     There are four levels of warning that GCC supports.  The default is
+     `-Wnormalized=nfc', which warns about any identifier which is not
+     in the ISO 10646 "C" normalized form, "NFC".  NFC is the
+     recommended form for most uses.
+
+     Unfortunately, there are some characters which ISO C and ISO C++
+     allow in identifiers that when turned into NFC aren't allowable as
+     identifiers.  That is, there's no way to use these symbols in
+     portable ISO C or C++ and have all your identifiers in NFC.
+     `-Wnormalized=id' suppresses the warning for these characters.  It
+     is hoped that future versions of the standards involved will
+     correct this, which is why this option is not the default.
+
+     You can switch the warning off for all characters by writing
+     `-Wnormalized=none'.  You would only want to do this if you were
+     using some other normalization scheme (like "D"), because
+     otherwise you can easily create bugs that are literally impossible
+     to see.
+
+     Some characters in ISO 10646 have distinct meanings but look
+     identical in some fonts or display methodologies, especially once
+     formatting has been applied.  For instance `\u207F', "SUPERSCRIPT
+     LATIN SMALL LETTER N", will display just like a regular `n' which
+     has been placed in a superscript.  ISO 10646 defines the "NFKC"
+     normalization scheme to convert all these into a standard form as
+     well, and GCC will warn if your code is not in NFKC if you use
+     `-Wnormalized=nfkc'.  This warning is comparable to warning about
+     every identifier that contains the letter O because it might be
+     confused with the digit 0, and so is not the default, but may be
+     useful as a local coding convention if the programming environment
+     is unable to be fixed to display these characters distinctly.
+
+`-Wno-deprecated'
+     Do not warn about usage of deprecated features.  *Note Deprecated
+     Features::.
+
+`-Wno-deprecated-declarations'
+     Do not warn about uses of functions (*note Function Attributes::),
+     variables (*note Variable Attributes::), and types (*note Type
+     Attributes::) marked as deprecated by using the `deprecated'
+     attribute.
+
+`-Wno-overflow'
+     Do not warn about compile-time overflow in constant expressions.
+
+`-Woverride-init (C and Objective-C only)'
+     Warn if an initialized field without side effects is overridden
+     when using designated initializers (*note Designated Initializers:
+     Designated Inits.).
+
+     This warning is included in `-Wextra'.  To get other `-Wextra'
+     warnings without this one, use `-Wextra -Wno-override-init'.
+
+`-Wpacked'
+     Warn if a structure is given the packed attribute, but the packed
+     attribute has no effect on the layout or size of the structure.
+     Such structures may be mis-aligned for little benefit.  For
+     instance, in this code, the variable `f.x' in `struct bar' will be
+     misaligned even though `struct bar' does not itself have the
+     packed attribute:
+
+          struct foo {
+            int x;
+            char a, b, c, d;
+          } __attribute__((packed));
+          struct bar {
+            char z;
+            struct foo f;
+          };
+
+`-Wpacked-bitfield-compat'
+     The 4.1, 4.2 and 4.3 series of GCC ignore the `packed' attribute
+     on bit-fields of type `char'.  This has been fixed in GCC 4.4 but
+     the change can lead to differences in the structure layout.  GCC
+     informs you when the offset of such a field has changed in GCC 4.4.
+     For example there is no longer a 4-bit padding between field `a'
+     and `b' in this structure:
+
+          struct foo
+          {
+            char a:4;
+            char b:8;
+          } __attribute__ ((packed));
+
+     This warning is enabled by default.  Use
+     `-Wno-packed-bitfield-compat' to disable this warning.
+
+`-Wpadded'
+     Warn if padding is included in a structure, either to align an
+     element of the structure or to align the whole structure.
+     Sometimes when this happens it is possible to rearrange the fields
+     of the structure to reduce the padding and so make the structure
+     smaller.
+
+`-Wredundant-decls'
+     Warn if anything is declared more than once in the same scope,
+     even in cases where multiple declaration is valid and changes
+     nothing.
+
+`-Wnested-externs (C and Objective-C only)'
+     Warn if an `extern' declaration is encountered within a function.
+
+`-Winline'
+     Warn if a function can not be inlined and it was declared as
+     inline.  Even with this option, the compiler will not warn about
+     failures to inline functions declared in system headers.
+
+     The compiler uses a variety of heuristics to determine whether or
+     not to inline a function.  For example, the compiler takes into
+     account the size of the function being inlined and the amount of
+     inlining that has already been done in the current function.
+     Therefore, seemingly insignificant changes in the source program
+     can cause the warnings produced by `-Winline' to appear or
+     disappear.
+
+`-Wno-invalid-offsetof (C++ and Objective-C++ only)'
+     Suppress warnings from applying the `offsetof' macro to a non-POD
+     type.  According to the 1998 ISO C++ standard, applying `offsetof'
+     to a non-POD type is undefined.  In existing C++ implementations,
+     however, `offsetof' typically gives meaningful results even when
+     applied to certain kinds of non-POD types. (Such as a simple
+     `struct' that fails to be a POD type only by virtue of having a
+     constructor.)  This flag is for users who are aware that they are
+     writing nonportable code and who have deliberately chosen to
+     ignore the warning about it.
+
+     The restrictions on `offsetof' may be relaxed in a future version
+     of the C++ standard.
+
+`-Wno-int-to-pointer-cast'
+     Suppress warnings from casts to pointer type of an integer of a
+     different size. In C++, casting to a pointer type of smaller size
+     is an error. `Wint-to-pointer-cast' is enabled by default.
+
+`-Wno-pointer-to-int-cast (C and Objective-C only)'
+     Suppress warnings from casts from a pointer to an integer type of a
+     different size.
+
+`-Winvalid-pch'
+     Warn if a precompiled header (*note Precompiled Headers::) is
+     found in the search path but can't be used.
+
+`-Wlong-long'
+     Warn if `long long' type is used.  This is enabled by either
+     `-pedantic' or `-Wtraditional' in ISO C90 and C++98 modes.  To
+     inhibit the warning messages, use `-Wno-long-long'.
+
+`-Wvariadic-macros'
+     Warn if variadic macros are used in pedantic ISO C90 mode, or the
+     GNU alternate syntax when in pedantic ISO C99 mode.  This is
+     default.  To inhibit the warning messages, use
+     `-Wno-variadic-macros'.
+
+`-Wvla'
+     Warn if variable length array is used in the code.  `-Wno-vla'
+     will prevent the `-pedantic' warning of the variable length array.
+
+`-Wvolatile-register-var'
+     Warn if a register variable is declared volatile.  The volatile
+     modifier does not inhibit all optimizations that may eliminate
+     reads and/or writes to register variables.  This warning is
+     enabled by `-Wall'.
+
+`-Wdisabled-optimization'
+     Warn if a requested optimization pass is disabled.  This warning
+     does not generally indicate that there is anything wrong with your
+     code; it merely indicates that GCC's optimizers were unable to
+     handle the code effectively.  Often, the problem is that your code
+     is too big or too complex; GCC will refuse to optimize programs
+     when the optimization itself is likely to take inordinate amounts
+     of time.
+
+`-Wpointer-sign (C and Objective-C only)'
+     Warn for pointer argument passing or assignment with different
+     signedness.  This option is only supported for C and Objective-C.
+     It is implied by `-Wall' and by `-pedantic', which can be disabled
+     with `-Wno-pointer-sign'.
+
+`-Wstack-protector'
+     This option is only active when `-fstack-protector' is active.  It
+     warns about functions that will not be protected against stack
+     smashing.
+
+`-Wno-mudflap'
+     Suppress warnings about constructs that cannot be instrumented by
+     `-fmudflap'.
+
+`-Woverlength-strings'
+     Warn about string constants which are longer than the "minimum
+     maximum" length specified in the C standard.  Modern compilers
+     generally allow string constants which are much longer than the
+     standard's minimum limit, but very portable programs should avoid
+     using longer strings.
+
+     The limit applies _after_ string constant concatenation, and does
+     not count the trailing NUL.  In C90, the limit was 509 characters;
+     in C99, it was raised to 4095.  C++98 does not specify a normative
+     minimum maximum, so we do not diagnose overlength strings in C++.
+
+     This option is implied by `-pedantic', and can be disabled with
+     `-Wno-overlength-strings'.
+
+`-Wunsuffixed-float-constants (C and Objective-C only)'
+     GCC will issue a warning for any floating constant that does not
+     have a suffix.  When used together with `-Wsystem-headers' it will
+     warn about such constants in system header files.  This can be
+     useful when preparing code to use with the `FLOAT_CONST_DECIMAL64'
+     pragma from the decimal floating-point extension to C99.
+
+
+File: gcc.info,  Node: Debugging Options,  Next: Optimize Options,  Prev: Warning Options,  Up: Invoking GCC
+
+3.9 Options for Debugging Your Program or GCC
+=============================================
+
+GCC has various special options that are used for debugging either your
+program or GCC:
+
+`-g'
+     Produce debugging information in the operating system's native
+     format (stabs, COFF, XCOFF, or DWARF 2).  GDB can work with this
+     debugging information.
+
+     On most systems that use stabs format, `-g' enables use of extra
+     debugging information that only GDB can use; this extra information
+     makes debugging work better in GDB but will probably make other
+     debuggers crash or refuse to read the program.  If you want to
+     control for certain whether to generate the extra information, use
+     `-gstabs+', `-gstabs', `-gxcoff+', `-gxcoff', or `-gvms' (see
+     below).
+
+     GCC allows you to use `-g' with `-O'.  The shortcuts taken by
+     optimized code may occasionally produce surprising results: some
+     variables you declared may not exist at all; flow of control may
+     briefly move where you did not expect it; some statements may not
+     be executed because they compute constant results or their values
+     were already at hand; some statements may execute in different
+     places because they were moved out of loops.
+
+     Nevertheless it proves possible to debug optimized output.  This
+     makes it reasonable to use the optimizer for programs that might
+     have bugs.
+
+     The following options are useful when GCC is generated with the
+     capability for more than one debugging format.
+
+`-ggdb'
+     Produce debugging information for use by GDB.  This means to use
+     the most expressive format available (DWARF 2, stabs, or the
+     native format if neither of those are supported), including GDB
+     extensions if at all possible.
+
+`-gstabs'
+     Produce debugging information in stabs format (if that is
+     supported), without GDB extensions.  This is the format used by
+     DBX on most BSD systems.  On MIPS, Alpha and System V Release 4
+     systems this option produces stabs debugging output which is not
+     understood by DBX or SDB.  On System V Release 4 systems this
+     option requires the GNU assembler.
+
+`-feliminate-unused-debug-symbols'
+     Produce debugging information in stabs format (if that is
+     supported), for only symbols that are actually used.
+
+`-femit-class-debug-always'
+     Instead of emitting debugging information for a C++ class in only
+     one object file, emit it in all object files using the class.
+     This option should be used only with debuggers that are unable to
+     handle the way GCC normally emits debugging information for
+     classes because using this option will increase the size of
+     debugging information by as much as a factor of two.
+
+`-gstabs+'
+     Produce debugging information in stabs format (if that is
+     supported), using GNU extensions understood only by the GNU
+     debugger (GDB).  The use of these extensions is likely to make
+     other debuggers crash or refuse to read the program.
+
+`-gcoff'
+     Produce debugging information in COFF format (if that is
+     supported).  This is the format used by SDB on most System V
+     systems prior to System V Release 4.
+
+`-gxcoff'
+     Produce debugging information in XCOFF format (if that is
+     supported).  This is the format used by the DBX debugger on IBM
+     RS/6000 systems.
+
+`-gxcoff+'
+     Produce debugging information in XCOFF format (if that is
+     supported), using GNU extensions understood only by the GNU
+     debugger (GDB).  The use of these extensions is likely to make
+     other debuggers crash or refuse to read the program, and may cause
+     assemblers other than the GNU assembler (GAS) to fail with an
+     error.
+
+`-gdwarf-VERSION'
+     Produce debugging information in DWARF format (if that is
+     supported).  This is the format used by DBX on IRIX 6.  The value
+     of VERSION may be either 2, 3 or 4; the default version is 2.
+
+     Note that with DWARF version 2 some ports require, and will always
+     use, some non-conflicting DWARF 3 extensions in the unwind tables.
+
+     Version 4 may require GDB 7.0 and `-fvar-tracking-assignments' for
+     maximum benefit.
+
+`-gstrict-dwarf'
+     Disallow using extensions of later DWARF standard version than
+     selected with `-gdwarf-VERSION'.  On most targets using
+     non-conflicting DWARF extensions from later standard versions is
+     allowed.
+
+`-gno-strict-dwarf'
+     Allow using extensions of later DWARF standard version than
+     selected with `-gdwarf-VERSION'.
+
+`-gvms'
+     Produce debugging information in VMS debug format (if that is
+     supported).  This is the format used by DEBUG on VMS systems.
+
+`-gLEVEL'
+`-ggdbLEVEL'
+`-gstabsLEVEL'
+`-gcoffLEVEL'
+`-gxcoffLEVEL'
+`-gvmsLEVEL'
+     Request debugging information and also use LEVEL to specify how
+     much information.  The default level is 2.
+
+     Level 0 produces no debug information at all.  Thus, `-g0' negates
+     `-g'.
+
+     Level 1 produces minimal information, enough for making backtraces
+     in parts of the program that you don't plan to debug.  This
+     includes descriptions of functions and external variables, but no
+     information about local variables and no line numbers.
+
+     Level 3 includes extra information, such as all the macro
+     definitions present in the program.  Some debuggers support macro
+     expansion when you use `-g3'.
+
+     `-gdwarf-2' does not accept a concatenated debug level, because
+     GCC used to support an option `-gdwarf' that meant to generate
+     debug information in version 1 of the DWARF format (which is very
+     different from version 2), and it would have been too confusing.
+     That debug format is long obsolete, but the option cannot be
+     changed now.  Instead use an additional `-gLEVEL' option to change
+     the debug level for DWARF.
+
+`-gtoggle'
+     Turn off generation of debug info, if leaving out this option
+     would have generated it, or turn it on at level 2 otherwise.  The
+     position of this argument in the command line does not matter, it
+     takes effect after all other options are processed, and it does so
+     only once, no matter how many times it is given.  This is mainly
+     intended to be used with `-fcompare-debug'.
+
+`-fdump-final-insns[=FILE]'
+     Dump the final internal representation (RTL) to FILE.  If the
+     optional argument is omitted (or if FILE is `.'), the name of the
+     dump file will be determined by appending `.gkd' to the
+     compilation output file name.
+
+`-fcompare-debug[=OPTS]'
+     If no error occurs during compilation, run the compiler a second
+     time, adding OPTS and `-fcompare-debug-second' to the arguments
+     passed to the second compilation.  Dump the final internal
+     representation in both compilations, and print an error if they
+     differ.
+
+     If the equal sign is omitted, the default `-gtoggle' is used.
+
+     The environment variable `GCC_COMPARE_DEBUG', if defined, non-empty
+     and nonzero, implicitly enables `-fcompare-debug'.  If
+     `GCC_COMPARE_DEBUG' is defined to a string starting with a dash,
+     then it is used for OPTS, otherwise the default `-gtoggle' is used.
+
+     `-fcompare-debug=', with the equal sign but without OPTS, is
+     equivalent to `-fno-compare-debug', which disables the dumping of
+     the final representation and the second compilation, preventing
+     even `GCC_COMPARE_DEBUG' from taking effect.
+
+     To verify full coverage during `-fcompare-debug' testing, set
+     `GCC_COMPARE_DEBUG' to say `-fcompare-debug-not-overridden', which
+     GCC will reject as an invalid option in any actual compilation
+     (rather than preprocessing, assembly or linking).  To get just a
+     warning, setting `GCC_COMPARE_DEBUG' to `-w%n-fcompare-debug not
+     overridden' will do.
+
+`-fcompare-debug-second'
+     This option is implicitly passed to the compiler for the second
+     compilation requested by `-fcompare-debug', along with options to
+     silence warnings, and omitting other options that would cause
+     side-effect compiler outputs to files or to the standard output.
+     Dump files and preserved temporary files are renamed so as to
+     contain the `.gk' additional extension during the second
+     compilation, to avoid overwriting those generated by the first.
+
+     When this option is passed to the compiler driver, it causes the
+     _first_ compilation to be skipped, which makes it useful for little
+     other than debugging the compiler proper.
+
+`-feliminate-dwarf2-dups'
+     Compress DWARF2 debugging information by eliminating duplicated
+     information about each symbol.  This option only makes sense when
+     generating DWARF2 debugging information with `-gdwarf-2'.
+
+`-femit-struct-debug-baseonly'
+     Emit debug information for struct-like types only when the base
+     name of the compilation source file matches the base name of file
+     in which the struct was defined.
+
+     This option substantially reduces the size of debugging
+     information, but at significant potential loss in type information
+     to the debugger.  See `-femit-struct-debug-reduced' for a less
+     aggressive option.  See `-femit-struct-debug-detailed' for more
+     detailed control.
+
+     This option works only with DWARF 2.
+
+`-femit-struct-debug-reduced'
+     Emit debug information for struct-like types only when the base
+     name of the compilation source file matches the base name of file
+     in which the type was defined, unless the struct is a template or
+     defined in a system header.
+
+     This option significantly reduces the size of debugging
+     information, with some potential loss in type information to the
+     debugger.  See `-femit-struct-debug-baseonly' for a more
+     aggressive option.  See `-femit-struct-debug-detailed' for more
+     detailed control.
+
+     This option works only with DWARF 2.
+
+`-femit-struct-debug-detailed[=SPEC-LIST]'
+     Specify the struct-like types for which the compiler will generate
+     debug information.  The intent is to reduce duplicate struct debug
+     information between different object files within the same program.
+
+     This option is a detailed version of `-femit-struct-debug-reduced'
+     and `-femit-struct-debug-baseonly', which will serve for most
+     needs.
+
+     A specification has the syntax
+     [`dir:'|`ind:'][`ord:'|`gen:'](`any'|`sys'|`base'|`none')
+
+     The optional first word limits the specification to structs that
+     are used directly (`dir:') or used indirectly (`ind:').  A struct
+     type is used directly when it is the type of a variable, member.
+     Indirect uses arise through pointers to structs.  That is, when
+     use of an incomplete struct would be legal, the use is indirect.
+     An example is `struct one direct; struct two * indirect;'.
+
+     The optional second word limits the specification to ordinary
+     structs (`ord:') or generic structs (`gen:').  Generic structs are
+     a bit complicated to explain.  For C++, these are non-explicit
+     specializations of template classes, or non-template classes
+     within the above.  Other programming languages have generics, but
+     `-femit-struct-debug-detailed' does not yet implement them.
+
+     The third word specifies the source files for those structs for
+     which the compiler will emit debug information.  The values `none'
+     and `any' have the normal meaning.  The value `base' means that
+     the base of name of the file in which the type declaration appears
+     must match the base of the name of the main compilation file.  In
+     practice, this means that types declared in `foo.c' and `foo.h'
+     will have debug information, but types declared in other header
+     will not.  The value `sys' means those types satisfying `base' or
+     declared in system or compiler headers.
+
+     You may need to experiment to determine the best settings for your
+     application.
+
+     The default is `-femit-struct-debug-detailed=all'.
+
+     This option works only with DWARF 2.
+
+`-fenable-icf-debug'
+     Generate additional debug information to support identical code
+     folding (ICF).  This option only works with DWARF version 2 or
+     higher.
+
+`-fno-merge-debug-strings'
+     Direct the linker to not merge together strings in the debugging
+     information which are identical in different object files.
+     Merging is not supported by all assemblers or linkers.  Merging
+     decreases the size of the debug information in the output file at
+     the cost of increasing link processing time.  Merging is enabled
+     by default.
+
+`-fdebug-prefix-map=OLD=NEW'
+     When compiling files in directory `OLD', record debugging
+     information describing them as in `NEW' instead.
+
+`-fno-dwarf2-cfi-asm'
+     Emit DWARF 2 unwind info as compiler generated `.eh_frame' section
+     instead of using GAS `.cfi_*' directives.
+
+`-p'
+     Generate extra code to write profile information suitable for the
+     analysis program `prof'.  You must use this option when compiling
+     the source files you want data about, and you must also use it when
+     linking.
+
+`-pg'
+     Generate extra code to write profile information suitable for the
+     analysis program `gprof'.  You must use this option when compiling
+     the source files you want data about, and you must also use it when
+     linking.
+
+`-Q'
+     Makes the compiler print out each function name as it is compiled,
+     and print some statistics about each pass when it finishes.
+
+`-ftime-report'
+     Makes the compiler print some statistics about the time consumed
+     by each pass when it finishes.
+
+`-fmem-report'
+     Makes the compiler print some statistics about permanent memory
+     allocation when it finishes.
+
+`-fpre-ipa-mem-report'
+
+`-fpost-ipa-mem-report'
+     Makes the compiler print some statistics about permanent memory
+     allocation before or after interprocedural optimization.
+
+`-fstack-usage'
+     Makes the compiler output stack usage information for the program,
+     on a per-function basis.  The filename for the dump is made by
+     appending `.su' to the AUXNAME.  AUXNAME is generated from the
+     name of the output file, if explicitly specified and it is not an
+     executable, otherwise it is the basename of the source file.  An
+     entry is made up of three fields:
+
+        * The name of the function.
+
+        * A number of bytes.
+
+        * One or more qualifiers: `static', `dynamic', `bounded'.
+
+     The qualifier `static' means that the function manipulates the
+     stack statically: a fixed number of bytes are allocated for the
+     frame on function entry and released on function exit; no stack
+     adjustments are otherwise made in the function.  The second field
+     is this fixed number of bytes.
+
+     The qualifier `dynamic' means that the function manipulates the
+     stack dynamically: in addition to the static allocation described
+     above, stack adjustments are made in the body of the function, for
+     example to push/pop arguments around function calls.  If the
+     qualifier `bounded' is also present, the amount of these
+     adjustments is bounded at compile-time and the second field is an
+     upper bound of the total amount of stack used by the function.  If
+     it is not present, the amount of these adjustments is not bounded
+     at compile-time and the second field only represents the bounded
+     part.
+
+`-fprofile-arcs'
+     Add code so that program flow "arcs" are instrumented.  During
+     execution the program records how many times each branch and call
+     is executed and how many times it is taken or returns.  When the
+     compiled program exits it saves this data to a file called
+     `AUXNAME.gcda' for each source file.  The data may be used for
+     profile-directed optimizations (`-fbranch-probabilities'), or for
+     test coverage analysis (`-ftest-coverage').  Each object file's
+     AUXNAME is generated from the name of the output file, if
+     explicitly specified and it is not the final executable, otherwise
+     it is the basename of the source file.  In both cases any suffix
+     is removed (e.g. `foo.gcda' for input file `dir/foo.c', or
+     `dir/foo.gcda' for output file specified as `-o dir/foo.o').
+     *Note Cross-profiling::.
+
+`--coverage'
+     This option is used to compile and link code instrumented for
+     coverage analysis.  The option is a synonym for `-fprofile-arcs'
+     `-ftest-coverage' (when compiling) and `-lgcov' (when linking).
+     See the documentation for those options for more details.
+
+        * Compile the source files with `-fprofile-arcs' plus
+          optimization and code generation options.  For test coverage
+          analysis, use the additional `-ftest-coverage' option.  You
+          do not need to profile every source file in a program.
+
+        * Link your object files with `-lgcov' or `-fprofile-arcs' (the
+          latter implies the former).
+
+        * Run the program on a representative workload to generate the
+          arc profile information.  This may be repeated any number of
+          times.  You can run concurrent instances of your program, and
+          provided that the file system supports locking, the data
+          files will be correctly updated.  Also `fork' calls are
+          detected and correctly handled (double counting will not
+          happen).
+
+        * For profile-directed optimizations, compile the source files
+          again with the same optimization and code generation options
+          plus `-fbranch-probabilities' (*note Options that Control
+          Optimization: Optimize Options.).
+
+        * For test coverage analysis, use `gcov' to produce human
+          readable information from the `.gcno' and `.gcda' files.
+          Refer to the `gcov' documentation for further information.
+
+
+     With `-fprofile-arcs', for each function of your program GCC
+     creates a program flow graph, then finds a spanning tree for the
+     graph.  Only arcs that are not on the spanning tree have to be
+     instrumented: the compiler adds code to count the number of times
+     that these arcs are executed.  When an arc is the only exit or
+     only entrance to a block, the instrumentation code can be added to
+     the block; otherwise, a new basic block must be created to hold
+     the instrumentation code.
+
+`-ftest-coverage'
+     Produce a notes file that the `gcov' code-coverage utility (*note
+     `gcov'--a Test Coverage Program: Gcov.) can use to show program
+     coverage.  Each source file's note file is called `AUXNAME.gcno'.
+     Refer to the `-fprofile-arcs' option above for a description of
+     AUXNAME and instructions on how to generate test coverage data.
+     Coverage data will match the source files more closely, if you do
+     not optimize.
+
+`-fdbg-cnt-list'
+     Print the name and the counter upper bound for all debug counters.
+
+`-fdbg-cnt=COUNTER-VALUE-LIST'
+     Set the internal debug counter upper bound.  COUNTER-VALUE-LIST is
+     a comma-separated list of NAME:VALUE pairs which sets the upper
+     bound of each debug counter NAME to VALUE.  All debug counters
+     have the initial upper bound of UINT_MAX, thus dbg_cnt() returns
+     true always unless the upper bound is set by this option.  e.g.
+     With -fdbg-cnt=dce:10,tail_call:0 dbg_cnt(dce) will return true
+     only for first 10 invocations and dbg_cnt(tail_call) will return
+     false always.
+
+`-dLETTERS'
+`-fdump-rtl-PASS'
+     Says to make debugging dumps during compilation at times specified
+     by LETTERS.  This is used for debugging the RTL-based passes of the
+     compiler.  The file names for most of the dumps are made by
+     appending a pass number and a word to the DUMPNAME, and the files
+     are created in the directory of the output file.  Note that the
+     pass number is computed statically as passes get registered into
+     the pass manager.  Thus the numbering is not related to the
+     dynamic order of execution of passes.  In particular, a pass
+     installed by a plugin could have a number over 200 even if it
+     executed quite early.  DUMPNAME is generated from the name of the
+     output file, if explicitly specified and it is not an executable,
+     otherwise it is the basename of the source file. These switches
+     may have different effects when `-E' is used for preprocessing.
+
+     Debug dumps can be enabled with a `-fdump-rtl' switch or some `-d'
+     option LETTERS.  Here are the possible letters for use in PASS and
+     LETTERS, and their meanings:
+
+    `-fdump-rtl-alignments'
+          Dump after branch alignments have been computed.
+
+    `-fdump-rtl-asmcons'
+          Dump after fixing rtl statements that have unsatisfied in/out
+          constraints.
+
+    `-fdump-rtl-auto_inc_dec'
+          Dump after auto-inc-dec discovery.  This pass is only run on
+          architectures that have auto inc or auto dec instructions.
+
+    `-fdump-rtl-barriers'
+          Dump after cleaning up the barrier instructions.
+
+    `-fdump-rtl-bbpart'
+          Dump after partitioning hot and cold basic blocks.
+
+    `-fdump-rtl-bbro'
+          Dump after block reordering.
+
+    `-fdump-rtl-btl1'
+    `-fdump-rtl-btl2'
+          `-fdump-rtl-btl1' and `-fdump-rtl-btl2' enable dumping after
+          the two branch target load optimization passes.
+
+    `-fdump-rtl-bypass'
+          Dump after jump bypassing and control flow optimizations.
+
+    `-fdump-rtl-combine'
+          Dump after the RTL instruction combination pass.
+
+    `-fdump-rtl-compgotos'
+          Dump after duplicating the computed gotos.
+
+    `-fdump-rtl-ce1'
+    `-fdump-rtl-ce2'
+    `-fdump-rtl-ce3'
+          `-fdump-rtl-ce1', `-fdump-rtl-ce2', and `-fdump-rtl-ce3'
+          enable dumping after the three if conversion passes.
+
+    `-fdump-rtl-cprop_hardreg'
+          Dump after hard register copy propagation.
+
+    `-fdump-rtl-csa'
+          Dump after combining stack adjustments.
+
+    `-fdump-rtl-cse1'
+    `-fdump-rtl-cse2'
+          `-fdump-rtl-cse1' and `-fdump-rtl-cse2' enable dumping after
+          the two common sub-expression elimination passes.
+
+    `-fdump-rtl-dce'
+          Dump after the standalone dead code elimination passes.
+
+    `-fdump-rtl-dbr'
+          Dump after delayed branch scheduling.
+
+    `-fdump-rtl-dce1'
+    `-fdump-rtl-dce2'
+          `-fdump-rtl-dce1' and `-fdump-rtl-dce2' enable dumping after
+          the two dead store elimination passes.
+
+    `-fdump-rtl-eh'
+          Dump after finalization of EH handling code.
+
+    `-fdump-rtl-eh_ranges'
+          Dump after conversion of EH handling range regions.
+
+    `-fdump-rtl-expand'
+          Dump after RTL generation.
+
+    `-fdump-rtl-fwprop1'
+    `-fdump-rtl-fwprop2'
+          `-fdump-rtl-fwprop1' and `-fdump-rtl-fwprop2' enable dumping
+          after the two forward propagation passes.
+
+    `-fdump-rtl-gcse1'
+    `-fdump-rtl-gcse2'
+          `-fdump-rtl-gcse1' and `-fdump-rtl-gcse2' enable dumping
+          after global common subexpression elimination.
+
+    `-fdump-rtl-init-regs'
+          Dump after the initialization of the registers.
+
+    `-fdump-rtl-initvals'
+          Dump after the computation of the initial value sets.
+
+    `-fdump-rtl-into_cfglayout'
+          Dump after converting to cfglayout mode.
+
+    `-fdump-rtl-ira'
+          Dump after iterated register allocation.
+
+    `-fdump-rtl-jump'
+          Dump after the second jump optimization.
+
+    `-fdump-rtl-loop2'
+          `-fdump-rtl-loop2' enables dumping after the rtl loop
+          optimization passes.
+
+    `-fdump-rtl-mach'
+          Dump after performing the machine dependent reorganization
+          pass, if that pass exists.
+
+    `-fdump-rtl-mode_sw'
+          Dump after removing redundant mode switches.
+
+    `-fdump-rtl-rnreg'
+          Dump after register renumbering.
+
+    `-fdump-rtl-outof_cfglayout'
+          Dump after converting from cfglayout mode.
+
+    `-fdump-rtl-peephole2'
+          Dump after the peephole pass.
+
+    `-fdump-rtl-postreload'
+          Dump after post-reload optimizations.
+
+    `-fdump-rtl-pro_and_epilogue'
+          Dump after generating the function pro and epilogues.
+
+    `-fdump-rtl-regmove'
+          Dump after the register move pass.
+
+    `-fdump-rtl-sched1'
+    `-fdump-rtl-sched2'
+          `-fdump-rtl-sched1' and `-fdump-rtl-sched2' enable dumping
+          after the basic block scheduling passes.
+
+    `-fdump-rtl-see'
+          Dump after sign extension elimination.
+
+    `-fdump-rtl-seqabstr'
+          Dump after common sequence discovery.
+
+    `-fdump-rtl-shorten'
+          Dump after shortening branches.
+
+    `-fdump-rtl-sibling'
+          Dump after sibling call optimizations.
+
+    `-fdump-rtl-split1'
+    `-fdump-rtl-split2'
+    `-fdump-rtl-split3'
+    `-fdump-rtl-split4'
+    `-fdump-rtl-split5'
+          `-fdump-rtl-split1', `-fdump-rtl-split2',
+          `-fdump-rtl-split3', `-fdump-rtl-split4' and
+          `-fdump-rtl-split5' enable dumping after five rounds of
+          instruction splitting.
+
+    `-fdump-rtl-sms'
+          Dump after modulo scheduling.  This pass is only run on some
+          architectures.
+
+    `-fdump-rtl-stack'
+          Dump after conversion from GCC's "flat register file"
+          registers to the x87's stack-like registers.  This pass is
+          only run on x86 variants.
+
+    `-fdump-rtl-subreg1'
+    `-fdump-rtl-subreg2'
+          `-fdump-rtl-subreg1' and `-fdump-rtl-subreg2' enable dumping
+          after the two subreg expansion passes.
+
+    `-fdump-rtl-unshare'
+          Dump after all rtl has been unshared.
+
+    `-fdump-rtl-vartrack'
+          Dump after variable tracking.
+
+    `-fdump-rtl-vregs'
+          Dump after converting virtual registers to hard registers.
+
+    `-fdump-rtl-web'
+          Dump after live range splitting.
+
+    `-fdump-rtl-regclass'
+    `-fdump-rtl-subregs_of_mode_init'
+    `-fdump-rtl-subregs_of_mode_finish'
+    `-fdump-rtl-dfinit'
+    `-fdump-rtl-dfinish'
+          These dumps are defined but always produce empty files.
+
+    `-da'
+    `-fdump-rtl-all'
+          Produce all the dumps listed above.
+
+    `-dA'
+          Annotate the assembler output with miscellaneous debugging
+          information.
+
+    `-dD'
+          Dump all macro definitions, at the end of preprocessing, in
+          addition to normal output.
+
+    `-dH'
+          Produce a core dump whenever an error occurs.
+
+    `-dp'
+          Annotate the assembler output with a comment indicating which
+          pattern and alternative was used.  The length of each
+          instruction is also printed.
+
+    `-dP'
+          Dump the RTL in the assembler output as a comment before each
+          instruction.  Also turns on `-dp' annotation.
+
+    `-dv'
+          For each of the other indicated dump files
+          (`-fdump-rtl-PASS'), dump a representation of the control
+          flow graph suitable for viewing with VCG to `FILE.PASS.vcg'.
+
+    `-dx'
+          Just generate RTL for a function instead of compiling it.
+          Usually used with `-fdump-rtl-expand'.
+
+`-fdump-noaddr'
+     When doing debugging dumps, suppress address output.  This makes
+     it more feasible to use diff on debugging dumps for compiler
+     invocations with different compiler binaries and/or different text
+     / bss / data / heap / stack / dso start locations.
+
+`-fdump-unnumbered'
+     When doing debugging dumps, suppress instruction numbers and
+     address output.  This makes it more feasible to use diff on
+     debugging dumps for compiler invocations with different options,
+     in particular with and without `-g'.
+
+`-fdump-unnumbered-links'
+     When doing debugging dumps (see `-d' option above), suppress
+     instruction numbers for the links to the previous and next
+     instructions in a sequence.
+
+`-fdump-translation-unit (C++ only)'
+`-fdump-translation-unit-OPTIONS (C++ only)'
+     Dump a representation of the tree structure for the entire
+     translation unit to a file.  The file name is made by appending
+     `.tu' to the source file name, and the file is created in the same
+     directory as the output file.  If the `-OPTIONS' form is used,
+     OPTIONS controls the details of the dump as described for the
+     `-fdump-tree' options.
+
+`-fdump-class-hierarchy (C++ only)'
+`-fdump-class-hierarchy-OPTIONS (C++ only)'
+     Dump a representation of each class's hierarchy and virtual
+     function table layout to a file.  The file name is made by
+     appending `.class' to the source file name, and the file is
+     created in the same directory as the output file.  If the
+     `-OPTIONS' form is used, OPTIONS controls the details of the dump
+     as described for the `-fdump-tree' options.
+
+`-fdump-ipa-SWITCH'
+     Control the dumping at various stages of inter-procedural analysis
+     language tree to a file.  The file name is generated by appending a
+     switch specific suffix to the source file name, and the file is
+     created in the same directory as the output file.  The following
+     dumps are possible:
+
+    `all'
+          Enables all inter-procedural analysis dumps.
+
+    `cgraph'
+          Dumps information about call-graph optimization, unused
+          function removal, and inlining decisions.
+
+    `inline'
+          Dump after function inlining.
+
+
+`-fdump-statistics-OPTION'
+     Enable and control dumping of pass statistics in a separate file.
+     The file name is generated by appending a suffix ending in
+     `.statistics' to the source file name, and the file is created in
+     the same directory as the output file.  If the `-OPTION' form is
+     used, `-stats' will cause counters to be summed over the whole
+     compilation unit while `-details' will dump every event as the
+     passes generate them.  The default with no option is to sum
+     counters for each function compiled.
+
+`-fdump-tree-SWITCH'
+`-fdump-tree-SWITCH-OPTIONS'
+     Control the dumping at various stages of processing the
+     intermediate language tree to a file.  The file name is generated
+     by appending a switch specific suffix to the source file name, and
+     the file is created in the same directory as the output file.  If
+     the `-OPTIONS' form is used, OPTIONS is a list of `-' separated
+     options that control the details of the dump.  Not all options are
+     applicable to all dumps, those which are not meaningful will be
+     ignored.  The following options are available
+
+    `address'
+          Print the address of each node.  Usually this is not
+          meaningful as it changes according to the environment and
+          source file.  Its primary use is for tying up a dump file
+          with a debug environment.
+
+    `asmname'
+          If `DECL_ASSEMBLER_NAME' has been set for a given decl, use
+          that in the dump instead of `DECL_NAME'.  Its primary use is
+          ease of use working backward from mangled names in the
+          assembly file.
+
+    `slim'
+          Inhibit dumping of members of a scope or body of a function
+          merely because that scope has been reached.  Only dump such
+          items when they are directly reachable by some other path.
+          When dumping pretty-printed trees, this option inhibits
+          dumping the bodies of control structures.
+
+    `raw'
+          Print a raw representation of the tree.  By default, trees are
+          pretty-printed into a C-like representation.
+
+    `details'
+          Enable more detailed dumps (not honored by every dump option).
+
+    `stats'
+          Enable dumping various statistics about the pass (not honored
+          by every dump option).
+
+    `blocks'
+          Enable showing basic block boundaries (disabled in raw dumps).
+
+    `vops'
+          Enable showing virtual operands for every statement.
+
+    `lineno'
+          Enable showing line numbers for statements.
+
+    `uid'
+          Enable showing the unique ID (`DECL_UID') for each variable.
+
+    `verbose'
+          Enable showing the tree dump for each statement.
+
+    `eh'
+          Enable showing the EH region number holding each statement.
+
+    `all'
+          Turn on all options, except `raw', `slim', `verbose' and
+          `lineno'.
+
+     The following tree dumps are possible:
+    `original'
+          Dump before any tree based optimization, to `FILE.original'.
+
+    `optimized'
+          Dump after all tree based optimization, to `FILE.optimized'.
+
+    `gimple'
+          Dump each function before and after the gimplification pass
+          to a file.  The file name is made by appending `.gimple' to
+          the source file name.
+
+    `cfg'
+          Dump the control flow graph of each function to a file.  The
+          file name is made by appending `.cfg' to the source file name.
+
+    `vcg'
+          Dump the control flow graph of each function to a file in VCG
+          format.  The file name is made by appending `.vcg' to the
+          source file name.  Note that if the file contains more than
+          one function, the generated file cannot be used directly by
+          VCG.  You will need to cut and paste each function's graph
+          into its own separate file first.
+
+    `ch'
+          Dump each function after copying loop headers.  The file name
+          is made by appending `.ch' to the source file name.
+
+    `ssa'
+          Dump SSA related information to a file.  The file name is
+          made by appending `.ssa' to the source file name.
+
+    `alias'
+          Dump aliasing information for each function.  The file name
+          is made by appending `.alias' to the source file name.
+
+    `ccp'
+          Dump each function after CCP.  The file name is made by
+          appending `.ccp' to the source file name.
+
+    `storeccp'
+          Dump each function after STORE-CCP.  The file name is made by
+          appending `.storeccp' to the source file name.
+
+    `pre'
+          Dump trees after partial redundancy elimination.  The file
+          name is made by appending `.pre' to the source file name.
+
+    `fre'
+          Dump trees after full redundancy elimination.  The file name
+          is made by appending `.fre' to the source file name.
+
+    `copyprop'
+          Dump trees after copy propagation.  The file name is made by
+          appending `.copyprop' to the source file name.
+
+    `store_copyprop'
+          Dump trees after store copy-propagation.  The file name is
+          made by appending `.store_copyprop' to the source file name.
+
+    `dce'
+          Dump each function after dead code elimination.  The file
+          name is made by appending `.dce' to the source file name.
+
+    `mudflap'
+          Dump each function after adding mudflap instrumentation.  The
+          file name is made by appending `.mudflap' to the source file
+          name.
+
+    `sra'
+          Dump each function after performing scalar replacement of
+          aggregates.  The file name is made by appending `.sra' to the
+          source file name.
+
+    `sink'
+          Dump each function after performing code sinking.  The file
+          name is made by appending `.sink' to the source file name.
+
+    `dom'
+          Dump each function after applying dominator tree
+          optimizations.  The file name is made by appending `.dom' to
+          the source file name.
+
+    `dse'
+          Dump each function after applying dead store elimination.
+          The file name is made by appending `.dse' to the source file
+          name.
+
+    `phiopt'
+          Dump each function after optimizing PHI nodes into
+          straightline code.  The file name is made by appending
+          `.phiopt' to the source file name.
+
+    `forwprop'
+          Dump each function after forward propagating single use
+          variables.  The file name is made by appending `.forwprop' to
+          the source file name.
+
+    `copyrename'
+          Dump each function after applying the copy rename
+          optimization.  The file name is made by appending
+          `.copyrename' to the source file name.
+
+    `nrv'
+          Dump each function after applying the named return value
+          optimization on generic trees.  The file name is made by
+          appending `.nrv' to the source file name.
+
+    `vect'
+          Dump each function after applying vectorization of loops.
+          The file name is made by appending `.vect' to the source file
+          name.
+
+    `slp'
+          Dump each function after applying vectorization of basic
+          blocks.  The file name is made by appending `.slp' to the
+          source file name.
+
+    `vrp'
+          Dump each function after Value Range Propagation (VRP).  The
+          file name is made by appending `.vrp' to the source file name.
+
+    `all'
+          Enable all the available tree dumps with the flags provided
+          in this option.
+
+`-ftree-vectorizer-verbose=N'
+     This option controls the amount of debugging output the vectorizer
+     prints.  This information is written to standard error, unless
+     `-fdump-tree-all' or `-fdump-tree-vect' is specified, in which
+     case it is output to the usual dump listing file, `.vect'.  For
+     N=0 no diagnostic information is reported.  If N=1 the vectorizer
+     reports each loop that got vectorized, and the total number of
+     loops that got vectorized.  If N=2 the vectorizer also reports
+     non-vectorized loops that passed the first analysis phase
+     (vect_analyze_loop_form) - i.e. countable, inner-most, single-bb,
+     single-entry/exit loops.  This is the same verbosity level that
+     `-fdump-tree-vect-stats' uses.  Higher verbosity levels mean
+     either more information dumped for each reported loop, or same
+     amount of information reported for more loops: if N=3, vectorizer
+     cost model information is reported.  If N=4, alignment related
+     information is added to the reports.  If N=5, data-references
+     related information (e.g. memory dependences, memory
+     access-patterns) is added to the reports.  If N=6, the vectorizer
+     reports also non-vectorized inner-most loops that did not pass the
+     first analysis phase (i.e., may not be countable, or may have
+     complicated control-flow).  If N=7, the vectorizer reports also
+     non-vectorized nested loops.  If N=8, SLP related information is
+     added to the reports.  For N=9, all the information the vectorizer
+     generates during its analysis and transformation is reported.
+     This is the same verbosity level that `-fdump-tree-vect-details'
+     uses.
+
+`-frandom-seed=STRING'
+     This option provides a seed that GCC uses when it would otherwise
+     use random numbers.  It is used to generate certain symbol names
+     that have to be different in every compiled file.  It is also used
+     to place unique stamps in coverage data files and the object files
+     that produce them.  You can use the `-frandom-seed' option to
+     produce reproducibly identical object files.
+
+     The STRING should be different for every file you compile.
+
+`-fsched-verbose=N'
+     On targets that use instruction scheduling, this option controls
+     the amount of debugging output the scheduler prints.  This
+     information is written to standard error, unless
+     `-fdump-rtl-sched1' or `-fdump-rtl-sched2' is specified, in which
+     case it is output to the usual dump listing file, `.sched1' or
+     `.sched2' respectively.  However for N greater than nine, the
+     output is always printed to standard error.
+
+     For N greater than zero, `-fsched-verbose' outputs the same
+     information as `-fdump-rtl-sched1' and `-fdump-rtl-sched2'.  For N
+     greater than one, it also output basic block probabilities,
+     detailed ready list information and unit/insn info.  For N greater
+     than two, it includes RTL at abort point, control-flow and regions
+     info.  And for N over four, `-fsched-verbose' also includes
+     dependence info.
+
+`-save-temps'
+`-save-temps=cwd'
+     Store the usual "temporary" intermediate files permanently; place
+     them in the current directory and name them based on the source
+     file.  Thus, compiling `foo.c' with `-c -save-temps' would produce
+     files `foo.i' and `foo.s', as well as `foo.o'.  This creates a
+     preprocessed `foo.i' output file even though the compiler now
+     normally uses an integrated preprocessor.
+
+     When used in combination with the `-x' command line option,
+     `-save-temps' is sensible enough to avoid over writing an input
+     source file with the same extension as an intermediate file.  The
+     corresponding intermediate file may be obtained by renaming the
+     source file before using `-save-temps'.
+
+     If you invoke GCC in parallel, compiling several different source
+     files that share a common base name in different subdirectories or
+     the same source file compiled for multiple output destinations, it
+     is likely that the different parallel compilers will interfere
+     with each other, and overwrite the temporary files.  For instance:
+
+          gcc -save-temps -o outdir1/foo.o indir1/foo.c&
+          gcc -save-temps -o outdir2/foo.o indir2/foo.c&
+
+     may result in `foo.i' and `foo.o' being written to simultaneously
+     by both compilers.
+
+`-save-temps=obj'
+     Store the usual "temporary" intermediate files permanently.  If the
+     `-o' option is used, the temporary files are based on the object
+     file.  If the `-o' option is not used, the `-save-temps=obj'
+     switch behaves like `-save-temps'.
+
+     For example:
+
+          gcc -save-temps=obj -c foo.c
+          gcc -save-temps=obj -c bar.c -o dir/xbar.o
+          gcc -save-temps=obj foobar.c -o dir2/yfoobar
+
+     would create `foo.i', `foo.s', `dir/xbar.i', `dir/xbar.s',
+     `dir2/yfoobar.i', `dir2/yfoobar.s', and `dir2/yfoobar.o'.
+
+`-time[=FILE]'
+     Report the CPU time taken by each subprocess in the compilation
+     sequence.  For C source files, this is the compiler proper and
+     assembler (plus the linker if linking is done).
+
+     Without the specification of an output file, the output looks like
+     this:
+
+          # cc1 0.12 0.01
+          # as 0.00 0.01
+
+     The first number on each line is the "user time", that is time
+     spent executing the program itself.  The second number is "system
+     time", time spent executing operating system routines on behalf of
+     the program.  Both numbers are in seconds.
+
+     With the specification of an output file, the output is appended
+     to the named file, and it looks like this:
+
+          0.12 0.01 cc1 OPTIONS
+          0.00 0.01 as OPTIONS
+
+     The "user time" and the "system time" are moved before the program
+     name, and the options passed to the program are displayed, so that
+     one can later tell what file was being compiled, and with which
+     options.
+
+`-fvar-tracking'
+     Run variable tracking pass.  It computes where variables are
+     stored at each position in code.  Better debugging information is
+     then generated (if the debugging information format supports this
+     information).
+
+     It is enabled by default when compiling with optimization (`-Os',
+     `-O', `-O2', ...), debugging information (`-g') and the debug info
+     format supports it.
+
+`-fvar-tracking-assignments'
+     Annotate assignments to user variables early in the compilation and
+     attempt to carry the annotations over throughout the compilation
+     all the way to the end, in an attempt to improve debug information
+     while optimizing.  Use of `-gdwarf-4' is recommended along with it.
+
+     It can be enabled even if var-tracking is disabled, in which case
+     annotations will be created and maintained, but discarded at the
+     end.
+
+`-fvar-tracking-assignments-toggle'
+     Toggle `-fvar-tracking-assignments', in the same way that
+     `-gtoggle' toggles `-g'.
+
+`-print-file-name=LIBRARY'
+     Print the full absolute name of the library file LIBRARY that
+     would be used when linking--and don't do anything else.  With this
+     option, GCC does not compile or link anything; it just prints the
+     file name.
+
+`-print-multi-directory'
+     Print the directory name corresponding to the multilib selected by
+     any other switches present in the command line.  This directory is
+     supposed to exist in `GCC_EXEC_PREFIX'.
+
+`-print-multi-lib'
+     Print the mapping from multilib directory names to compiler
+     switches that enable them.  The directory name is separated from
+     the switches by `;', and each switch starts with an `@' instead of
+     the `-', without spaces between multiple switches.  This is
+     supposed to ease shell-processing.
+
+`-print-multi-os-directory'
+     Print the path to OS libraries for the selected multilib, relative
+     to some `lib' subdirectory.  If OS libraries are present in the
+     `lib' subdirectory and no multilibs are used, this is usually just
+     `.', if OS libraries are present in `libSUFFIX' sibling
+     directories this prints e.g. `../lib64', `../lib' or `../lib32',
+     or if OS libraries are present in `lib/SUBDIR' subdirectories it
+     prints e.g. `amd64', `sparcv9' or `ev6'.
+
+`-print-multiarch'
+     Print the path to OS libraries for the selected multiarch,
+     relative to some `lib' subdirectory.
+
+`-print-prog-name=PROGRAM'
+     Like `-print-file-name', but searches for a program such as `cpp'.
+
+`-print-libgcc-file-name'
+     Same as `-print-file-name=libgcc.a'.
+
+     This is useful when you use `-nostdlib' or `-nodefaultlibs' but
+     you do want to link with `libgcc.a'.  You can do
+
+          gcc -nostdlib FILES... `gcc -print-libgcc-file-name`
+
+`-print-search-dirs'
+     Print the name of the configured installation directory and a list
+     of program and library directories `gcc' will search--and don't do
+     anything else.
+
+     This is useful when `gcc' prints the error message `installation
+     problem, cannot exec cpp0: No such file or directory'.  To resolve
+     this you either need to put `cpp0' and the other compiler
+     components where `gcc' expects to find them, or you can set the
+     environment variable `GCC_EXEC_PREFIX' to the directory where you
+     installed them.  Don't forget the trailing `/'.  *Note Environment
+     Variables::.
+
+`-print-sysroot'
+     Print the target sysroot directory that will be used during
+     compilation.  This is the target sysroot specified either at
+     configure time or using the `--sysroot' option, possibly with an
+     extra suffix that depends on compilation options.  If no target
+     sysroot is specified, the option prints nothing.
+
+`-print-sysroot-headers-suffix'
+     Print the suffix added to the target sysroot when searching for
+     headers, or give an error if the compiler is not configured with
+     such a suffix--and don't do anything else.
+
+`-dumpmachine'
+     Print the compiler's target machine (for example,
+     `i686-pc-linux-gnu')--and don't do anything else.
+
+`-dumpversion'
+     Print the compiler version (for example, `3.0')--and don't do
+     anything else.
+
+`-dumpspecs'
+     Print the compiler's built-in specs--and don't do anything else.
+     (This is used when GCC itself is being built.)  *Note Spec Files::.
+
+`-feliminate-unused-debug-types'
+     Normally, when producing DWARF2 output, GCC will emit debugging
+     information for all types declared in a compilation unit,
+     regardless of whether or not they are actually used in that
+     compilation unit.  Sometimes this is useful, such as if, in the
+     debugger, you want to cast a value to a type that is not actually
+     used in your program (but is declared).  More often, however, this
+     results in a significant amount of wasted space.  With this
+     option, GCC will avoid producing debug symbol output for types
+     that are nowhere used in the source file being compiled.
+
+
+File: gcc.info,  Node: Optimize Options,  Next: Preprocessor Options,  Prev: Debugging Options,  Up: Invoking GCC
+
+3.10 Options That Control Optimization
+======================================
+
+These options control various sorts of optimizations.
+
+ Without any optimization option, the compiler's goal is to reduce the
+cost of compilation and to make debugging produce the expected results.
+Statements are independent: if you stop the program with a breakpoint
+between statements, you can then assign a new value to any variable or
+change the program counter to any other statement in the function and
+get exactly the results you would expect from the source code.
+
+ Turning on optimization flags makes the compiler attempt to improve
+the performance and/or code size at the expense of compilation time and
+possibly the ability to debug the program.
+
+ The compiler performs optimization based on the knowledge it has of the
+program.  Compiling multiple files at once to a single output file mode
+allows the compiler to use information gained from all of the files
+when compiling each of them.
+
+ Not all optimizations are controlled directly by a flag.  Only
+optimizations that have a flag are listed in this section.
+
+ Most optimizations are only enabled if an `-O' level is set on the
+command line.  Otherwise they are disabled, even if individual
+optimization flags are specified.
+
+ Depending on the target and how GCC was configured, a slightly
+different set of optimizations may be enabled at each `-O' level than
+those listed here.  You can invoke GCC with `-Q --help=optimizers' to
+find out the exact set of optimizations that are enabled at each level.
+*Note Overall Options::, for examples.
+
+`-O'
+`-O1'
+     Optimize.  Optimizing compilation takes somewhat more time, and a
+     lot more memory for a large function.
+
+     With `-O', the compiler tries to reduce code size and execution
+     time, without performing any optimizations that take a great deal
+     of compilation time.
+
+     `-O' turns on the following optimization flags:
+          -fauto-inc-dec
+          -fcompare-elim
+          -fcprop-registers
+          -fdce
+          -fdefer-pop
+          -fdelayed-branch
+          -fdse
+          -fguess-branch-probability
+          -fif-conversion2
+          -fif-conversion
+          -fipa-pure-const
+          -fipa-profile
+          -fipa-reference
+          -fmerge-constants
+          -fsplit-wide-types
+          -ftree-bit-ccp
+          -ftree-builtin-call-dce
+          -ftree-ccp
+          -ftree-ch
+          -ftree-copyrename
+          -ftree-dce
+          -ftree-dominator-opts
+          -ftree-dse
+          -ftree-forwprop
+          -ftree-fre
+          -ftree-phiprop
+          -ftree-sra
+          -ftree-pta
+          -ftree-ter
+          -funit-at-a-time
+
+     `-O' also turns on `-fomit-frame-pointer' on machines where doing
+     so does not interfere with debugging.
+
+`-O2'
+     Optimize even more.  GCC performs nearly all supported
+     optimizations that do not involve a space-speed tradeoff.  As
+     compared to `-O', this option increases both compilation time and
+     the performance of the generated code.
+
+     `-O2' turns on all optimization flags specified by `-O'.  It also
+     turns on the following optimization flags:
+          -fthread-jumps
+          -falign-functions  -falign-jumps
+          -falign-loops  -falign-labels
+          -fcaller-saves
+          -fcrossjumping
+          -fcse-follow-jumps  -fcse-skip-blocks
+          -fdelete-null-pointer-checks
+          -fdevirtualize
+          -fexpensive-optimizations
+          -fgcse  -fgcse-lm
+          -finline-small-functions
+          -findirect-inlining
+          -fipa-sra
+          -foptimize-sibling-calls
+          -fpartial-inlining
+          -fpeephole2
+          -fregmove
+          -freorder-blocks  -freorder-functions
+          -frerun-cse-after-loop
+          -fsched-interblock  -fsched-spec
+          -fschedule-insns  -fschedule-insns2
+          -fstrict-aliasing -fstrict-overflow
+          -ftree-switch-conversion
+          -ftree-pre
+          -ftree-vrp
+
+     Please note the warning under `-fgcse' about invoking `-O2' on
+     programs that use computed gotos.
+
+`-O3'
+     Optimize yet more.  `-O3' turns on all optimizations specified by
+     `-O2' and also turns on the `-finline-functions',
+     `-funswitch-loops', `-fpredictive-commoning',
+     `-fgcse-after-reload', `-ftree-vectorize' and `-fipa-cp-clone'
+     options.
+
+`-O0'
+     Reduce compilation time and make debugging produce the expected
+     results.  This is the default.
+
+`-Os'
+     Optimize for size.  `-Os' enables all `-O2' optimizations that do
+     not typically increase code size.  It also performs further
+     optimizations designed to reduce code size.
+
+     `-Os' disables the following optimization flags:
+          -falign-functions  -falign-jumps  -falign-loops
+          -falign-labels  -freorder-blocks  -freorder-blocks-and-partition
+          -fprefetch-loop-arrays  -ftree-vect-loop-version
+
+`-Ofast'
+     Disregard strict standards compliance.  `-Ofast' enables all `-O3'
+     optimizations.  It also enables optimizations that are not valid
+     for all standard compliant programs.  It turns on `-ffast-math'.
+
+     If you use multiple `-O' options, with or without level numbers,
+     the last such option is the one that is effective.
+
+ Options of the form `-fFLAG' specify machine-independent flags.  Most
+flags have both positive and negative forms; the negative form of
+`-ffoo' would be `-fno-foo'.  In the table below, only one of the forms
+is listed--the one you typically will use.  You can figure out the
+other form by either removing `no-' or adding it.
+
+ The following options control specific optimizations.  They are either
+activated by `-O' options or are related to ones that are.  You can use
+the following flags in the rare cases when "fine-tuning" of
+optimizations to be performed is desired.
+
+`-fno-default-inline'
+     Do not make member functions inline by default merely because they
+     are defined inside the class scope (C++ only).  Otherwise, when
+     you specify `-O', member functions defined inside class scope are
+     compiled inline by default; i.e., you don't need to add `inline'
+     in front of the member function name.
+
+`-fno-defer-pop'
+     Always pop the arguments to each function call as soon as that
+     function returns.  For machines which must pop arguments after a
+     function call, the compiler normally lets arguments accumulate on
+     the stack for several function calls and pops them all at once.
+
+     Disabled at levels `-O', `-O2', `-O3', `-Os'.
+
+`-fforward-propagate'
+     Perform a forward propagation pass on RTL.  The pass tries to
+     combine two instructions and checks if the result can be
+     simplified.  If loop unrolling is active, two passes are performed
+     and the second is scheduled after loop unrolling.
+
+     This option is enabled by default at optimization levels `-O',
+     `-O2', `-O3', `-Os'.
+
+`-ffp-contract=STYLE'
+     `-ffp-contract=off' disables floating-point expression contraction.
+     `-ffp-contract=fast' enables floating-point expression contraction
+     such as forming of fused multiply-add operations if the target has
+     native support for them.  `-ffp-contract=on' enables
+     floating-point expression contraction if allowed by the language
+     standard.  This is currently not implemented and treated equal to
+     `-ffp-contract=off'.
+
+     The default is `-ffp-contract=fast'.
+
+`-fomit-frame-pointer'
+     Don't keep the frame pointer in a register for functions that
+     don't need one.  This avoids the instructions to save, set up and
+     restore frame pointers; it also makes an extra register available
+     in many functions.  *It also makes debugging impossible on some
+     machines.*
+
+     On some machines, such as the VAX, this flag has no effect, because
+     the standard calling sequence automatically handles the frame
+     pointer and nothing is saved by pretending it doesn't exist.  The
+     machine-description macro `FRAME_POINTER_REQUIRED' controls
+     whether a target machine supports this flag.  *Note Register
+     Usage: (gccint)Registers.
+
+     Starting with GCC version 4.6, the default setting (when not
+     optimizing for size) for 32-bit Linux x86 and 32-bit Darwin x86
+     targets has been changed to `-fomit-frame-pointer'.  The default
+     can be reverted to `-fno-omit-frame-pointer' by configuring GCC
+     with the `--enable-frame-pointer' configure option.
+
+     Enabled at levels `-O', `-O2', `-O3', `-Os'.
+
+`-foptimize-sibling-calls'
+     Optimize sibling and tail recursive calls.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-fno-inline'
+     Don't pay attention to the `inline' keyword.  Normally this option
+     is used to keep the compiler from expanding any functions inline.
+     Note that if you are not optimizing, no functions can be expanded
+     inline.
+
+`-finline-small-functions'
+     Integrate functions into their callers when their body is smaller
+     than expected function call code (so overall size of program gets
+     smaller).  The compiler heuristically decides which functions are
+     simple enough to be worth integrating in this way.
+
+     Enabled at level `-O2'.
+
+`-findirect-inlining'
+     Inline also indirect calls that are discovered to be known at
+     compile time thanks to previous inlining.  This option has any
+     effect only when inlining itself is turned on by the
+     `-finline-functions' or `-finline-small-functions' options.
+
+     Enabled at level `-O2'.
+
+`-finline-functions'
+     Integrate all simple functions into their callers.  The compiler
+     heuristically decides which functions are simple enough to be worth
+     integrating in this way.
+
+     If all calls to a given function are integrated, and the function
+     is declared `static', then the function is normally not output as
+     assembler code in its own right.
+
+     Enabled at level `-O3'.
+
+`-finline-functions-called-once'
+     Consider all `static' functions called once for inlining into their
+     caller even if they are not marked `inline'.  If a call to a given
+     function is integrated, then the function is not output as
+     assembler code in its own right.
+
+     Enabled at levels `-O1', `-O2', `-O3' and `-Os'.
+
+`-fearly-inlining'
+     Inline functions marked by `always_inline' and functions whose
+     body seems smaller than the function call overhead early before
+     doing `-fprofile-generate' instrumentation and real inlining pass.
+     Doing so makes profiling significantly cheaper and usually
+     inlining faster on programs having large chains of nested wrapper
+     functions.
+
+     Enabled by default.
+
+`-fipa-sra'
+     Perform interprocedural scalar replacement of aggregates, removal
+     of unused parameters and replacement of parameters passed by
+     reference by parameters passed by value.
+
+     Enabled at levels `-O2', `-O3' and `-Os'.
+
+`-finline-limit=N'
+     By default, GCC limits the size of functions that can be inlined.
+     This flag allows coarse control of this limit.  N is the size of
+     functions that can be inlined in number of pseudo instructions.
+
+     Inlining is actually controlled by a number of parameters, which
+     may be specified individually by using `--param NAME=VALUE'.  The
+     `-finline-limit=N' option sets some of these parameters as follows:
+
+    `max-inline-insns-single'
+          is set to N/2.
+
+    `max-inline-insns-auto'
+          is set to N/2.
+
+     See below for a documentation of the individual parameters
+     controlling inlining and for the defaults of these parameters.
+
+     _Note:_ there may be no value to `-finline-limit' that results in
+     default behavior.
+
+     _Note:_ pseudo instruction represents, in this particular context,
+     an abstract measurement of function's size.  In no way does it
+     represent a count of assembly instructions and as such its exact
+     meaning might change from one release to an another.
+
+`-fno-keep-inline-dllexport'
+     This is a more fine-grained version of `-fkeep-inline-functions',
+     which applies only to functions that are declared using the
+     `dllexport' attribute or declspec (*Note Declaring Attributes of
+     Functions: Function Attributes.)
+
+`-fkeep-inline-functions'
+     In C, emit `static' functions that are declared `inline' into the
+     object file, even if the function has been inlined into all of its
+     callers.  This switch does not affect functions using the `extern
+     inline' extension in GNU C90.  In C++, emit any and all inline
+     functions into the object file.
+
+`-fkeep-static-consts'
+     Emit variables declared `static const' when optimization isn't
+     turned on, even if the variables aren't referenced.
+
+     GCC enables this option by default.  If you want to force the
+     compiler to check if the variable was referenced, regardless of
+     whether or not optimization is turned on, use the
+     `-fno-keep-static-consts' option.
+
+`-fmerge-constants'
+     Attempt to merge identical constants (string constants and
+     floating point constants) across compilation units.
+
+     This option is the default for optimized compilation if the
+     assembler and linker support it.  Use `-fno-merge-constants' to
+     inhibit this behavior.
+
+     Enabled at levels `-O', `-O2', `-O3', `-Os'.
+
+`-fmerge-all-constants'
+     Attempt to merge identical constants and identical variables.
+
+     This option implies `-fmerge-constants'.  In addition to
+     `-fmerge-constants' this considers e.g. even constant initialized
+     arrays or initialized constant variables with integral or floating
+     point types.  Languages like C or C++ require each variable,
+     including multiple instances of the same variable in recursive
+     calls, to have distinct locations, so using this option will
+     result in non-conforming behavior.
+
+`-fmodulo-sched'
+     Perform swing modulo scheduling immediately before the first
+     scheduling pass.  This pass looks at innermost loops and reorders
+     their instructions by overlapping different iterations.
+
+`-fmodulo-sched-allow-regmoves'
+     Perform more aggressive SMS based modulo scheduling with register
+     moves allowed.  By setting this flag certain anti-dependences
+     edges will be deleted which will trigger the generation of
+     reg-moves based on the life-range analysis.  This option is
+     effective only with `-fmodulo-sched' enabled.
+
+`-fno-branch-count-reg'
+     Do not use "decrement and branch" instructions on a count register,
+     but instead generate a sequence of instructions that decrement a
+     register, compare it against zero, then branch based upon the
+     result.  This option is only meaningful on architectures that
+     support such instructions, which include x86, PowerPC, IA-64 and
+     S/390.
+
+     The default is `-fbranch-count-reg'.
+
+`-fno-function-cse'
+     Do not put function addresses in registers; make each instruction
+     that calls a constant function contain the function's address
+     explicitly.
+
+     This option results in less efficient code, but some strange hacks
+     that alter the assembler output may be confused by the
+     optimizations performed when this option is not used.
+
+     The default is `-ffunction-cse'
+
+`-fno-zero-initialized-in-bss'
+     If the target supports a BSS section, GCC by default puts
+     variables that are initialized to zero into BSS.  This can save
+     space in the resulting code.
+
+     This option turns off this behavior because some programs
+     explicitly rely on variables going to the data section.  E.g., so
+     that the resulting executable can find the beginning of that
+     section and/or make assumptions based on that.
+
+     The default is `-fzero-initialized-in-bss'.
+
+`-fmudflap -fmudflapth -fmudflapir'
+     For front-ends that support it (C and C++), instrument all risky
+     pointer/array dereferencing operations, some standard library
+     string/heap functions, and some other associated constructs with
+     range/validity tests.  Modules so instrumented should be immune to
+     buffer overflows, invalid heap use, and some other classes of C/C++
+     programming errors.  The instrumentation relies on a separate
+     runtime library (`libmudflap'), which will be linked into a
+     program if `-fmudflap' is given at link time.  Run-time behavior
+     of the instrumented program is controlled by the `MUDFLAP_OPTIONS'
+     environment variable.  See `env MUDFLAP_OPTIONS=-help a.out' for
+     its options.
+
+     Use `-fmudflapth' instead of `-fmudflap' to compile and to link if
+     your program is multi-threaded.  Use `-fmudflapir', in addition to
+     `-fmudflap' or `-fmudflapth', if instrumentation should ignore
+     pointer reads.  This produces less instrumentation (and therefore
+     faster execution) and still provides some protection against
+     outright memory corrupting writes, but allows erroneously read
+     data to propagate within a program.
+
+`-fthread-jumps'
+     Perform optimizations where we check to see if a jump branches to a
+     location where another comparison subsumed by the first is found.
+     If so, the first branch is redirected to either the destination of
+     the second branch or a point immediately following it, depending
+     on whether the condition is known to be true or false.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-fsplit-wide-types'
+     When using a type that occupies multiple registers, such as `long
+     long' on a 32-bit system, split the registers apart and allocate
+     them independently.  This normally generates better code for those
+     types, but may make debugging more difficult.
+
+     Enabled at levels `-O', `-O2', `-O3', `-Os'.
+
+`-fcse-follow-jumps'
+     In common subexpression elimination (CSE), scan through jump
+     instructions when the target of the jump is not reached by any
+     other path.  For example, when CSE encounters an `if' statement
+     with an `else' clause, CSE will follow the jump when the condition
+     tested is false.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-fcse-skip-blocks'
+     This is similar to `-fcse-follow-jumps', but causes CSE to follow
+     jumps which conditionally skip over blocks.  When CSE encounters a
+     simple `if' statement with no else clause, `-fcse-skip-blocks'
+     causes CSE to follow the jump around the body of the `if'.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-frerun-cse-after-loop'
+     Re-run common subexpression elimination after loop optimizations
+     has been performed.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-fgcse'
+     Perform a global common subexpression elimination pass.  This pass
+     also performs global constant and copy propagation.
+
+     _Note:_ When compiling a program using computed gotos, a GCC
+     extension, you may get better runtime performance if you disable
+     the global common subexpression elimination pass by adding
+     `-fno-gcse' to the command line.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-fgcse-lm'
+     When `-fgcse-lm' is enabled, global common subexpression
+     elimination will attempt to move loads which are only killed by
+     stores into themselves.  This allows a loop containing a
+     load/store sequence to be changed to a load outside the loop, and
+     a copy/store within the loop.
+
+     Enabled by default when gcse is enabled.
+
+`-fgcse-sm'
+     When `-fgcse-sm' is enabled, a store motion pass is run after
+     global common subexpression elimination.  This pass will attempt
+     to move stores out of loops.  When used in conjunction with
+     `-fgcse-lm', loops containing a load/store sequence can be changed
+     to a load before the loop and a store after the loop.
+
+     Not enabled at any optimization level.
+
+`-fgcse-las'
+     When `-fgcse-las' is enabled, the global common subexpression
+     elimination pass eliminates redundant loads that come after stores
+     to the same memory location (both partial and full redundancies).
+
+     Not enabled at any optimization level.
+
+`-fgcse-after-reload'
+     When `-fgcse-after-reload' is enabled, a redundant load elimination
+     pass is performed after reload.  The purpose of this pass is to
+     cleanup redundant spilling.
+
+`-funsafe-loop-optimizations'
+     If given, the loop optimizer will assume that loop indices do not
+     overflow, and that the loops with nontrivial exit condition are not
+     infinite.  This enables a wider range of loop optimizations even if
+     the loop optimizer itself cannot prove that these assumptions are
+     valid.  Using `-Wunsafe-loop-optimizations', the compiler will
+     warn you if it finds this kind of loop.
+
+`-fcrossjumping'
+     Perform cross-jumping transformation.  This transformation unifies
+     equivalent code and save code size.  The resulting code may or may
+     not perform better than without cross-jumping.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-fauto-inc-dec'
+     Combine increments or decrements of addresses with memory accesses.
+     This pass is always skipped on architectures that do not have
+     instructions to support this.  Enabled by default at `-O' and
+     higher on architectures that support this.
+
+`-fdce'
+     Perform dead code elimination (DCE) on RTL.  Enabled by default at
+     `-O' and higher.
+
+`-fdse'
+     Perform dead store elimination (DSE) on RTL.  Enabled by default
+     at `-O' and higher.
+
+`-fif-conversion'
+     Attempt to transform conditional jumps into branch-less
+     equivalents.  This include use of conditional moves, min, max, set
+     flags and abs instructions, and some tricks doable by standard
+     arithmetics.  The use of conditional execution on chips where it
+     is available is controlled by `if-conversion2'.
+
+     Enabled at levels `-O', `-O2', `-O3', `-Os'.
+
+`-fif-conversion2'
+     Use conditional execution (where available) to transform
+     conditional jumps into branch-less equivalents.
+
+     Enabled at levels `-O', `-O2', `-O3', `-Os'.
+
+`-fdelete-null-pointer-checks'
+     Assume that programs cannot safely dereference null pointers, and
+     that no code or data element resides there.  This enables simple
+     constant folding optimizations at all optimization levels.  In
+     addition, other optimization passes in GCC use this flag to
+     control global dataflow analyses that eliminate useless checks for
+     null pointers; these assume that if a pointer is checked after it
+     has already been dereferenced, it cannot be null.
+
+     Note however that in some environments this assumption is not true.
+     Use `-fno-delete-null-pointer-checks' to disable this optimization
+     for programs which depend on that behavior.
+
+     Some targets, especially embedded ones, disable this option at all
+     levels.  Otherwise it is enabled at all levels: `-O0', `-O1',
+     `-O2', `-O3', `-Os'.  Passes that use the information are enabled
+     independently at different optimization levels.
+
+`-fdevirtualize'
+     Attempt to convert calls to virtual functions to direct calls.
+     This is done both within a procedure and interprocedurally as part
+     of indirect inlining (`-findirect-inlining') and interprocedural
+     constant propagation (`-fipa-cp').  Enabled at levels `-O2',
+     `-O3', `-Os'.
+
+`-fexpensive-optimizations'
+     Perform a number of minor optimizations that are relatively
+     expensive.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-foptimize-register-move'
+`-fregmove'
+     Attempt to reassign register numbers in move instructions and as
+     operands of other simple instructions in order to maximize the
+     amount of register tying.  This is especially helpful on machines
+     with two-operand instructions.
+
+     Note `-fregmove' and `-foptimize-register-move' are the same
+     optimization.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-fira-algorithm=ALGORITHM'
+     Use specified coloring algorithm for the integrated register
+     allocator.  The ALGORITHM argument should be `priority' or `CB'.
+     The first algorithm specifies Chow's priority coloring, the second
+     one specifies Chaitin-Briggs coloring.  The second algorithm can
+     be unimplemented for some architectures.  If it is implemented, it
+     is the default because Chaitin-Briggs coloring as a rule generates
+     a better code.
+
+`-fira-region=REGION'
+     Use specified regions for the integrated register allocator.  The
+     REGION argument should be one of `all', `mixed', or `one'.  The
+     first value means using all loops as register allocation regions,
+     the second value which is the default means using all loops except
+     for loops with small register pressure as the regions, and third
+     one means using all function as a single region.  The first value
+     can give best result for machines with small size and irregular
+     register set, the third one results in faster and generates decent
+     code and the smallest size code, and the default value usually
+     give the best results in most cases and for most architectures.
+
+`-fira-loop-pressure'
+     Use IRA to evaluate register pressure in loops for decision to move
+     loop invariants.  Usage of this option usually results in
+     generation of faster and smaller code on machines with big
+     register files (>= 32 registers) but it can slow compiler down.
+
+     This option is enabled at level `-O3' for some targets.
+
+`-fno-ira-share-save-slots'
+     Switch off sharing stack slots used for saving call used hard
+     registers living through a call.  Each hard register will get a
+     separate stack slot and as a result function stack frame will be
+     bigger.
+
+`-fno-ira-share-spill-slots'
+     Switch off sharing stack slots allocated for pseudo-registers.
+     Each pseudo-register which did not get a hard register will get a
+     separate stack slot and as a result function stack frame will be
+     bigger.
+
+`-fira-verbose=N'
+     Set up how verbose dump file for the integrated register allocator
+     will be.  Default value is 5.  If the value is greater or equal to
+     10, the dump file will be stderr as if the value were N minus 10.
+
+`-fdelayed-branch'
+     If supported for the target machine, attempt to reorder
+     instructions to exploit instruction slots available after delayed
+     branch instructions.
+
+     Enabled at levels `-O', `-O2', `-O3', `-Os'.
+
+`-fschedule-insns'
+     If supported for the target machine, attempt to reorder
+     instructions to eliminate execution stalls due to required data
+     being unavailable.  This helps machines that have slow floating
+     point or memory load instructions by allowing other instructions
+     to be issued until the result of the load or floating point
+     instruction is required.
+
+     Enabled at levels `-O2', `-O3'.
+
+`-fschedule-insns2'
+     Similar to `-fschedule-insns', but requests an additional pass of
+     instruction scheduling after register allocation has been done.
+     This is especially useful on machines with a relatively small
+     number of registers and where memory load instructions take more
+     than one cycle.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-fno-sched-interblock'
+     Don't schedule instructions across basic blocks.  This is normally
+     enabled by default when scheduling before register allocation, i.e.
+     with `-fschedule-insns' or at `-O2' or higher.
+
+`-fno-sched-spec'
+     Don't allow speculative motion of non-load instructions.  This is
+     normally enabled by default when scheduling before register
+     allocation, i.e.  with `-fschedule-insns' or at `-O2' or higher.
+
+`-fsched-pressure'
+     Enable register pressure sensitive insn scheduling before the
+     register allocation.  This only makes sense when scheduling before
+     register allocation is enabled, i.e. with `-fschedule-insns' or at
+     `-O2' or higher.  Usage of this option can improve the generated
+     code and decrease its size by preventing register pressure
+     increase above the number of available hard registers and as a
+     consequence register spills in the register allocation.
+
+`-fsched-spec-load'
+     Allow speculative motion of some load instructions.  This only
+     makes sense when scheduling before register allocation, i.e. with
+     `-fschedule-insns' or at `-O2' or higher.
+
+`-fsched-spec-load-dangerous'
+     Allow speculative motion of more load instructions.  This only
+     makes sense when scheduling before register allocation, i.e. with
+     `-fschedule-insns' or at `-O2' or higher.
+
+`-fsched-stalled-insns'
+`-fsched-stalled-insns=N'
+     Define how many insns (if any) can be moved prematurely from the
+     queue of stalled insns into the ready list, during the second
+     scheduling pass.  `-fno-sched-stalled-insns' means that no insns
+     will be moved prematurely, `-fsched-stalled-insns=0' means there
+     is no limit on how many queued insns can be moved prematurely.
+     `-fsched-stalled-insns' without a value is equivalent to
+     `-fsched-stalled-insns=1'.
+
+`-fsched-stalled-insns-dep'
+`-fsched-stalled-insns-dep=N'
+     Define how many insn groups (cycles) will be examined for a
+     dependency on a stalled insn that is candidate for premature
+     removal from the queue of stalled insns.  This has an effect only
+     during the second scheduling pass, and only if
+     `-fsched-stalled-insns' is used.  `-fno-sched-stalled-insns-dep'
+     is equivalent to `-fsched-stalled-insns-dep=0'.
+     `-fsched-stalled-insns-dep' without a value is equivalent to
+     `-fsched-stalled-insns-dep=1'.
+
+`-fsched2-use-superblocks'
+     When scheduling after register allocation, do use superblock
+     scheduling algorithm.  Superblock scheduling allows motion across
+     basic block boundaries resulting on faster schedules.  This option
+     is experimental, as not all machine descriptions used by GCC model
+     the CPU closely enough to avoid unreliable results from the
+     algorithm.
+
+     This only makes sense when scheduling after register allocation,
+     i.e. with `-fschedule-insns2' or at `-O2' or higher.
+
+`-fsched-group-heuristic'
+     Enable the group heuristic in the scheduler.  This heuristic favors
+     the instruction that belongs to a schedule group.  This is enabled
+     by default when scheduling is enabled, i.e. with `-fschedule-insns'
+     or `-fschedule-insns2' or at `-O2' or higher.
+
+`-fsched-critical-path-heuristic'
+     Enable the critical-path heuristic in the scheduler.  This
+     heuristic favors instructions on the critical path.  This is
+     enabled by default when scheduling is enabled, i.e. with
+     `-fschedule-insns' or `-fschedule-insns2' or at `-O2' or higher.
+
+`-fsched-spec-insn-heuristic'
+     Enable the speculative instruction heuristic in the scheduler.
+     This heuristic favors speculative instructions with greater
+     dependency weakness.  This is enabled by default when scheduling
+     is enabled, i.e.  with `-fschedule-insns' or `-fschedule-insns2'
+     or at `-O2' or higher.
+
+`-fsched-rank-heuristic'
+     Enable the rank heuristic in the scheduler.  This heuristic favors
+     the instruction belonging to a basic block with greater size or
+     frequency.  This is enabled by default when scheduling is enabled,
+     i.e.  with `-fschedule-insns' or `-fschedule-insns2' or at `-O2'
+     or higher.
+
+`-fsched-last-insn-heuristic'
+     Enable the last-instruction heuristic in the scheduler.  This
+     heuristic favors the instruction that is less dependent on the
+     last instruction scheduled.  This is enabled by default when
+     scheduling is enabled, i.e. with `-fschedule-insns' or
+     `-fschedule-insns2' or at `-O2' or higher.
+
+`-fsched-dep-count-heuristic'
+     Enable the dependent-count heuristic in the scheduler.  This
+     heuristic favors the instruction that has more instructions
+     depending on it.  This is enabled by default when scheduling is
+     enabled, i.e.  with `-fschedule-insns' or `-fschedule-insns2' or
+     at `-O2' or higher.
+
+`-freschedule-modulo-scheduled-loops'
+     The modulo scheduling comes before the traditional scheduling, if
+     a loop was modulo scheduled we may want to prevent the later
+     scheduling passes from changing its schedule, we use this option
+     to control that.
+
+`-fselective-scheduling'
+     Schedule instructions using selective scheduling algorithm.
+     Selective scheduling runs instead of the first scheduler pass.
+
+`-fselective-scheduling2'
+     Schedule instructions using selective scheduling algorithm.
+     Selective scheduling runs instead of the second scheduler pass.
+
+`-fsel-sched-pipelining'
+     Enable software pipelining of innermost loops during selective
+     scheduling.  This option has no effect until one of
+     `-fselective-scheduling' or `-fselective-scheduling2' is turned on.
+
+`-fsel-sched-pipelining-outer-loops'
+     When pipelining loops during selective scheduling, also pipeline
+     outer loops.  This option has no effect until
+     `-fsel-sched-pipelining' is turned on.
+
+`-fcaller-saves'
+     Enable values to be allocated in registers that will be clobbered
+     by function calls, by emitting extra instructions to save and
+     restore the registers around such calls.  Such allocation is done
+     only when it seems to result in better code than would otherwise
+     be produced.
+
+     This option is always enabled by default on certain machines,
+     usually those which have no call-preserved registers to use
+     instead.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-fcombine-stack-adjustments'
+     Tracks stack adjustments (pushes and pops) and stack memory
+     references and then tries to find ways to combine them.
+
+     Enabled by default at `-O1' and higher.
+
+`-fconserve-stack'
+     Attempt to minimize stack usage.  The compiler will attempt to use
+     less stack space, even if that makes the program slower.  This
+     option implies setting the `large-stack-frame' parameter to 100
+     and the `large-stack-frame-growth' parameter to 400.
+
+`-ftree-reassoc'
+     Perform reassociation on trees.  This flag is enabled by default
+     at `-O' and higher.
+
+`-ftree-pre'
+     Perform partial redundancy elimination (PRE) on trees.  This flag
+     is enabled by default at `-O2' and `-O3'.
+
+`-ftree-forwprop'
+     Perform forward propagation on trees.  This flag is enabled by
+     default at `-O' and higher.
+
+`-ftree-fre'
+     Perform full redundancy elimination (FRE) on trees.  The difference
+     between FRE and PRE is that FRE only considers expressions that
+     are computed on all paths leading to the redundant computation.
+     This analysis is faster than PRE, though it exposes fewer
+     redundancies.  This flag is enabled by default at `-O' and higher.
+
+`-ftree-phiprop'
+     Perform hoisting of loads from conditional pointers on trees.  This
+     pass is enabled by default at `-O' and higher.
+
+`-ftree-copy-prop'
+     Perform copy propagation on trees.  This pass eliminates
+     unnecessary copy operations.  This flag is enabled by default at
+     `-O' and higher.
+
+`-fipa-pure-const'
+     Discover which functions are pure or constant.  Enabled by default
+     at `-O' and higher.
+
+`-fipa-reference'
+     Discover which static variables do not escape cannot escape the
+     compilation unit.  Enabled by default at `-O' and higher.
+
+`-fipa-struct-reorg'
+     Perform structure reorganization optimization, that change C-like
+     structures layout in order to better utilize spatial locality.
+     This transformation is affective for programs containing arrays of
+     structures.  Available in two compilation modes: profile-based
+     (enabled with `-fprofile-generate') or static (which uses built-in
+     heuristics).  It works only in whole program mode, so it requires
+     `-fwhole-program' to be enabled.  Structures considered `cold' by
+     this transformation are not affected (see `--param
+     struct-reorg-cold-struct-ratio=VALUE').
+
+     With this flag, the program debug info reflects a new structure
+     layout.
+
+`-fipa-pta'
+     Perform interprocedural pointer analysis and interprocedural
+     modification and reference analysis.  This option can cause
+     excessive memory and compile-time usage on large compilation
+     units.  It is not enabled by default at any optimization level.
+
+`-fipa-profile'
+     Perform interprocedural profile propagation.  The functions called
+     only from cold functions are marked as cold. Also functions
+     executed once (such as `cold', `noreturn', static constructors or
+     destructors) are identified. Cold functions and loop less parts of
+     functions executed once are then optimized for size.  Enabled by
+     default at `-O' and higher.
+
+`-fipa-cp'
+     Perform interprocedural constant propagation.  This optimization
+     analyzes the program to determine when values passed to functions
+     are constants and then optimizes accordingly.  This optimization
+     can substantially increase performance if the application has
+     constants passed to functions.  This flag is enabled by default at
+     `-O2', `-Os' and `-O3'.
+
+`-fipa-cp-clone'
+     Perform function cloning to make interprocedural constant
+     propagation stronger.  When enabled, interprocedural constant
+     propagation will perform function cloning when externally visible
+     function can be called with constant arguments.  Because this
+     optimization can create multiple copies of functions, it may
+     significantly increase code size (see `--param
+     ipcp-unit-growth=VALUE').  This flag is enabled by default at
+     `-O3'.
+
+`-fipa-matrix-reorg'
+     Perform matrix flattening and transposing.  Matrix flattening
+     tries to replace an m-dimensional matrix with its equivalent
+     n-dimensional matrix, where n < m.  This reduces the level of
+     indirection needed for accessing the elements of the matrix. The
+     second optimization is matrix transposing that attempts to change
+     the order of the matrix's dimensions in order to improve cache
+     locality.  Both optimizations need the `-fwhole-program' flag.
+     Transposing is enabled only if profiling information is available.
+
+`-ftree-sink'
+     Perform forward store motion  on trees.  This flag is enabled by
+     default at `-O' and higher.
+
+`-ftree-bit-ccp'
+     Perform sparse conditional bit constant propagation on trees and
+     propagate pointer alignment information.  This pass only operates
+     on local scalar variables and is enabled by default at `-O' and
+     higher.  It requires that `-ftree-ccp' is enabled.
+
+`-ftree-ccp'
+     Perform sparse conditional constant propagation (CCP) on trees.
+     This pass only operates on local scalar variables and is enabled
+     by default at `-O' and higher.
+
+`-ftree-switch-conversion'
+     Perform conversion of simple initializations in a switch to
+     initializations from a scalar array.  This flag is enabled by
+     default at `-O2' and higher.
+
+`-ftree-dce'
+     Perform dead code elimination (DCE) on trees.  This flag is
+     enabled by default at `-O' and higher.
+
+`-ftree-builtin-call-dce'
+     Perform conditional dead code elimination (DCE) for calls to
+     builtin functions that may set `errno' but are otherwise
+     side-effect free.  This flag is enabled by default at `-O2' and
+     higher if `-Os' is not also specified.
+
+`-ftree-dominator-opts'
+     Perform a variety of simple scalar cleanups (constant/copy
+     propagation, redundancy elimination, range propagation and
+     expression simplification) based on a dominator tree traversal.
+     This also performs jump threading (to reduce jumps to jumps). This
+     flag is enabled by default at `-O' and higher.
+
+`-ftree-dse'
+     Perform dead store elimination (DSE) on trees.  A dead store is a
+     store into a memory location which will later be overwritten by
+     another store without any intervening loads.  In this case the
+     earlier store can be deleted.  This flag is enabled by default at
+     `-O' and higher.
+
+`-ftree-ch'
+     Perform loop header copying on trees.  This is beneficial since it
+     increases effectiveness of code motion optimizations.  It also
+     saves one jump.  This flag is enabled by default at `-O' and
+     higher.  It is not enabled for `-Os', since it usually increases
+     code size.
+
+`-ftree-loop-optimize'
+     Perform loop optimizations on trees.  This flag is enabled by
+     default at `-O' and higher.
+
+`-ftree-loop-linear'
+     Perform loop interchange transformations on tree.  Same as
+     `-floop-interchange'.  To use this code transformation, GCC has to
+     be configured with `--with-ppl' and `--with-cloog' to enable the
+     Graphite loop transformation infrastructure.
+
+`-floop-interchange'
+     Perform loop interchange transformations on loops.  Interchanging
+     two nested loops switches the inner and outer loops.  For example,
+     given a loop like:
+          DO J = 1, M
+            DO I = 1, N
+              A(J, I) = A(J, I) * C
+            ENDDO
+          ENDDO
+     loop interchange will transform the loop as if the user had
+     written:
+          DO I = 1, N
+            DO J = 1, M
+              A(J, I) = A(J, I) * C
+            ENDDO
+          ENDDO
+     which can be beneficial when `N' is larger than the caches,
+     because in Fortran, the elements of an array are stored in memory
+     contiguously by column, and the original loop iterates over rows,
+     potentially creating at each access a cache miss.  This
+     optimization applies to all the languages supported by GCC and is
+     not limited to Fortran.  To use this code transformation, GCC has
+     to be configured with `--with-ppl' and `--with-cloog' to enable the
+     Graphite loop transformation infrastructure.
+
+`-floop-strip-mine'
+     Perform loop strip mining transformations on loops.  Strip mining
+     splits a loop into two nested loops.  The outer loop has strides
+     equal to the strip size and the inner loop has strides of the
+     original loop within a strip.  The strip length can be changed
+     using the `loop-block-tile-size' parameter.  For example, given a
+     loop like:
+          DO I = 1, N
+            A(I) = A(I) + C
+          ENDDO
+     loop strip mining will transform the loop as if the user had
+     written:
+          DO II = 1, N, 51
+            DO I = II, min (II + 50, N)
+              A(I) = A(I) + C
+            ENDDO
+          ENDDO
+     This optimization applies to all the languages supported by GCC
+     and is not limited to Fortran.  To use this code transformation,
+     GCC has to be configured with `--with-ppl' and `--with-cloog' to
+     enable the Graphite loop transformation infrastructure.
+
+`-floop-block'
+     Perform loop blocking transformations on loops.  Blocking strip
+     mines each loop in the loop nest such that the memory accesses of
+     the element loops fit inside caches.  The strip length can be
+     changed using the `loop-block-tile-size' parameter.  For example,
+     given a loop like:
+          DO I = 1, N
+            DO J = 1, M
+              A(J, I) = B(I) + C(J)
+            ENDDO
+          ENDDO
+     loop blocking will transform the loop as if the user had written:
+          DO II = 1, N, 51
+            DO JJ = 1, M, 51
+              DO I = II, min (II + 50, N)
+                DO J = JJ, min (JJ + 50, M)
+                  A(J, I) = B(I) + C(J)
+                ENDDO
+              ENDDO
+            ENDDO
+          ENDDO
+     which can be beneficial when `M' is larger than the caches,
+     because the innermost loop will iterate over a smaller amount of
+     data that can be kept in the caches.  This optimization applies to
+     all the languages supported by GCC and is not limited to Fortran.
+     To use this code transformation, GCC has to be configured with
+     `--with-ppl' and `--with-cloog' to enable the Graphite loop
+     transformation infrastructure.
+
+`-fgraphite-identity'
+     Enable the identity transformation for graphite.  For every SCoP
+     we generate the polyhedral representation and transform it back to
+     gimple.  Using `-fgraphite-identity' we can check the costs or
+     benefits of the GIMPLE -> GRAPHITE -> GIMPLE transformation.  Some
+     minimal optimizations are also performed by the code generator
+     CLooG, like index splitting and dead code elimination in loops.
+
+`-floop-flatten'
+     Removes the loop nesting structure: transforms the loop nest into a
+     single loop.  This transformation can be useful to vectorize all
+     the levels of the loop nest.
+
+`-floop-parallelize-all'
+     Use the Graphite data dependence analysis to identify loops that
+     can be parallelized.  Parallelize all the loops that can be
+     analyzed to not contain loop carried dependences without checking
+     that it is profitable to parallelize the loops.
+
+`-fcheck-data-deps'
+     Compare the results of several data dependence analyzers.  This
+     option is used for debugging the data dependence analyzers.
+
+`-ftree-loop-if-convert'
+     Attempt to transform conditional jumps in the innermost loops to
+     branch-less equivalents.  The intent is to remove control-flow from
+     the innermost loops in order to improve the ability of the
+     vectorization pass to handle these loops.  This is enabled by
+     default if vectorization is enabled.
+
+`-ftree-loop-if-convert-stores'
+     Attempt to also if-convert conditional jumps containing memory
+     writes.  This transformation can be unsafe for multi-threaded
+     programs as it transforms conditional memory writes into
+     unconditional memory writes.  For example,
+          for (i = 0; i < N; i++)
+            if (cond)
+              A[i] = expr;
+     would be transformed to
+          for (i = 0; i < N; i++)
+            A[i] = cond ? expr : A[i];
+     potentially producing data races.
+
+`-ftree-loop-distribution'
+     Perform loop distribution.  This flag can improve cache
+     performance on big loop bodies and allow further loop
+     optimizations, like parallelization or vectorization, to take
+     place.  For example, the loop
+          DO I = 1, N
+            A(I) = B(I) + C
+            D(I) = E(I) * F
+          ENDDO
+     is transformed to
+          DO I = 1, N
+             A(I) = B(I) + C
+          ENDDO
+          DO I = 1, N
+             D(I) = E(I) * F
+          ENDDO
+
+`-ftree-loop-distribute-patterns'
+     Perform loop distribution of patterns that can be code generated
+     with calls to a library.  This flag is enabled by default at `-O3'.
+
+     This pass distributes the initialization loops and generates a
+     call to memset zero.  For example, the loop
+          DO I = 1, N
+            A(I) = 0
+            B(I) = A(I) + I
+          ENDDO
+     is transformed to
+          DO I = 1, N
+             A(I) = 0
+          ENDDO
+          DO I = 1, N
+             B(I) = A(I) + I
+          ENDDO
+     and the initialization loop is transformed into a call to memset
+     zero.
+
+`-ftree-loop-im'
+     Perform loop invariant motion on trees.  This pass moves only
+     invariants that would be hard to handle at RTL level (function
+     calls, operations that expand to nontrivial sequences of insns).
+     With `-funswitch-loops' it also moves operands of conditions that
+     are invariant out of the loop, so that we can use just trivial
+     invariantness analysis in loop unswitching.  The pass also includes
+     store motion.
+
+`-ftree-loop-ivcanon'
+     Create a canonical counter for number of iterations in the loop
+     for that determining number of iterations requires complicated
+     analysis.  Later optimizations then may determine the number
+     easily.  Useful especially in connection with unrolling.
+
+`-fivopts'
+     Perform induction variable optimizations (strength reduction,
+     induction variable merging and induction variable elimination) on
+     trees.
+
+`-ftree-parallelize-loops=n'
+     Parallelize loops, i.e., split their iteration space to run in n
+     threads.  This is only possible for loops whose iterations are
+     independent and can be arbitrarily reordered.  The optimization is
+     only profitable on multiprocessor machines, for loops that are
+     CPU-intensive, rather than constrained e.g. by memory bandwidth.
+     This option implies `-pthread', and thus is only supported on
+     targets that have support for `-pthread'.
+
+`-ftree-pta'
+     Perform function-local points-to analysis on trees.  This flag is
+     enabled by default at `-O' and higher.
+
+`-ftree-sra'
+     Perform scalar replacement of aggregates.  This pass replaces
+     structure references with scalars to prevent committing structures
+     to memory too early.  This flag is enabled by default at `-O' and
+     higher.
+
+`-ftree-copyrename'
+     Perform copy renaming on trees.  This pass attempts to rename
+     compiler temporaries to other variables at copy locations, usually
+     resulting in variable names which more closely resemble the
+     original variables.  This flag is enabled by default at `-O' and
+     higher.
+
+`-ftree-ter'
+     Perform temporary expression replacement during the SSA->normal
+     phase.  Single use/single def temporaries are replaced at their
+     use location with their defining expression.  This results in
+     non-GIMPLE code, but gives the expanders much more complex trees
+     to work on resulting in better RTL generation.  This is enabled by
+     default at `-O' and higher.
+
+`-ftree-vectorize'
+     Perform loop vectorization on trees. This flag is enabled by
+     default at `-O3'.
+
+`-ftree-slp-vectorize'
+     Perform basic block vectorization on trees. This flag is enabled
+     by default at `-O3' and when `-ftree-vectorize' is enabled.
+
+`-ftree-vect-loop-version'
+     Perform loop versioning when doing loop vectorization on trees.
+     When a loop appears to be vectorizable except that data alignment
+     or data dependence cannot be determined at compile time then
+     vectorized and non-vectorized versions of the loop are generated
+     along with runtime checks for alignment or dependence to control
+     which version is executed.  This option is enabled by default
+     except at level `-Os' where it is disabled.
+
+`-fvect-cost-model'
+     Enable cost model for vectorization.
+
+`-ftree-vrp'
+     Perform Value Range Propagation on trees.  This is similar to the
+     constant propagation pass, but instead of values, ranges of values
+     are propagated.  This allows the optimizers to remove unnecessary
+     range checks like array bound checks and null pointer checks.
+     This is enabled by default at `-O2' and higher.  Null pointer check
+     elimination is only done if `-fdelete-null-pointer-checks' is
+     enabled.
+
+`-ftracer'
+     Perform tail duplication to enlarge superblock size.  This
+     transformation simplifies the control flow of the function
+     allowing other optimizations to do better job.
+
+`-funroll-loops'
+     Unroll loops whose number of iterations can be determined at
+     compile time or upon entry to the loop.  `-funroll-loops' implies
+     `-frerun-cse-after-loop'.  This option makes code larger, and may
+     or may not make it run faster.
+
+`-funroll-all-loops'
+     Unroll all loops, even if their number of iterations is uncertain
+     when the loop is entered.  This usually makes programs run more
+     slowly.  `-funroll-all-loops' implies the same options as
+     `-funroll-loops',
+
+`-fsplit-ivs-in-unroller'
+     Enables expressing of values of induction variables in later
+     iterations of the unrolled loop using the value in the first
+     iteration.  This breaks long dependency chains, thus improving
+     efficiency of the scheduling passes.
+
+     Combination of `-fweb' and CSE is often sufficient to obtain the
+     same effect.  However in cases the loop body is more complicated
+     than a single basic block, this is not reliable.  It also does not
+     work at all on some of the architectures due to restrictions in
+     the CSE pass.
+
+     This optimization is enabled by default.
+
+`-fvariable-expansion-in-unroller'
+     With this option, the compiler will create multiple copies of some
+     local variables when unrolling a loop which can result in superior
+     code.
+
+`-fpartial-inlining'
+     Inline parts of functions.  This option has any effect only when
+     inlining itself is turned on by the `-finline-functions' or
+     `-finline-small-functions' options.
+
+     Enabled at level `-O2'.
+
+`-fpredictive-commoning'
+     Perform predictive commoning optimization, i.e., reusing
+     computations (especially memory loads and stores) performed in
+     previous iterations of loops.
+
+     This option is enabled at level `-O3'.
+
+`-fprefetch-loop-arrays'
+     If supported by the target machine, generate instructions to
+     prefetch memory to improve the performance of loops that access
+     large arrays.
+
+     This option may generate better or worse code; results are highly
+     dependent on the structure of loops within the source code.
+
+     Disabled at level `-Os'.
+
+`-fno-peephole'
+`-fno-peephole2'
+     Disable any machine-specific peephole optimizations.  The
+     difference between `-fno-peephole' and `-fno-peephole2' is in how
+     they are implemented in the compiler; some targets use one, some
+     use the other, a few use both.
+
+     `-fpeephole' is enabled by default.  `-fpeephole2' enabled at
+     levels `-O2', `-O3', `-Os'.
+
+`-fno-guess-branch-probability'
+     Do not guess branch probabilities using heuristics.
+
+     GCC will use heuristics to guess branch probabilities if they are
+     not provided by profiling feedback (`-fprofile-arcs').  These
+     heuristics are based on the control flow graph.  If some branch
+     probabilities are specified by `__builtin_expect', then the
+     heuristics will be used to guess branch probabilities for the rest
+     of the control flow graph, taking the `__builtin_expect' info into
+     account.  The interactions between the heuristics and
+     `__builtin_expect' can be complex, and in some cases, it may be
+     useful to disable the heuristics so that the effects of
+     `__builtin_expect' are easier to understand.
+
+     The default is `-fguess-branch-probability' at levels `-O', `-O2',
+     `-O3', `-Os'.
+
+`-freorder-blocks'
+     Reorder basic blocks in the compiled function in order to reduce
+     number of taken branches and improve code locality.
+
+     Enabled at levels `-O2', `-O3'.
+
+`-freorder-blocks-and-partition'
+     In addition to reordering basic blocks in the compiled function,
+     in order to reduce number of taken branches, partitions hot and
+     cold basic blocks into separate sections of the assembly and .o
+     files, to improve paging and cache locality performance.
+
+     This optimization is automatically turned off in the presence of
+     exception handling, for linkonce sections, for functions with a
+     user-defined section attribute and on any architecture that does
+     not support named sections.
+
+`-freorder-functions'
+     Reorder functions in the object file in order to improve code
+     locality.  This is implemented by using special subsections
+     `.text.hot' for most frequently executed functions and
+     `.text.unlikely' for unlikely executed functions.  Reordering is
+     done by the linker so object file format must support named
+     sections and linker must place them in a reasonable way.
+
+     Also profile feedback must be available in to make this option
+     effective.  See `-fprofile-arcs' for details.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-fstrict-aliasing'
+     Allow the compiler to assume the strictest aliasing rules
+     applicable to the language being compiled.  For C (and C++), this
+     activates optimizations based on the type of expressions.  In
+     particular, an object of one type is assumed never to reside at
+     the same address as an object of a different type, unless the
+     types are almost the same.  For example, an `unsigned int' can
+     alias an `int', but not a `void*' or a `double'.  A character type
+     may alias any other type.
+
+     Pay special attention to code like this:
+          union a_union {
+            int i;
+            double d;
+          };
+
+          int f() {
+            union a_union t;
+            t.d = 3.0;
+            return t.i;
+          }
+     The practice of reading from a different union member than the one
+     most recently written to (called "type-punning") is common.  Even
+     with `-fstrict-aliasing', type-punning is allowed, provided the
+     memory is accessed through the union type.  So, the code above
+     will work as expected.  *Note Structures unions enumerations and
+     bit-fields implementation::.  However, this code might not:
+          int f() {
+            union a_union t;
+            int* ip;
+            t.d = 3.0;
+            ip = &t.i;
+            return *ip;
+          }
+
+     Similarly, access by taking the address, casting the resulting
+     pointer and dereferencing the result has undefined behavior, even
+     if the cast uses a union type, e.g.:
+          int f() {
+            double d = 3.0;
+            return ((union a_union *) &d)->i;
+          }
+
+     The `-fstrict-aliasing' option is enabled at levels `-O2', `-O3',
+     `-Os'.
+
+`-fstrict-overflow'
+     Allow the compiler to assume strict signed overflow rules,
+     depending on the language being compiled.  For C (and C++) this
+     means that overflow when doing arithmetic with signed numbers is
+     undefined, which means that the compiler may assume that it will
+     not happen.  This permits various optimizations.  For example, the
+     compiler will assume that an expression like `i + 10 > i' will
+     always be true for signed `i'.  This assumption is only valid if
+     signed overflow is undefined, as the expression is false if `i +
+     10' overflows when using twos complement arithmetic.  When this
+     option is in effect any attempt to determine whether an operation
+     on signed numbers will overflow must be written carefully to not
+     actually involve overflow.
+
+     This option also allows the compiler to assume strict pointer
+     semantics: given a pointer to an object, if adding an offset to
+     that pointer does not produce a pointer to the same object, the
+     addition is undefined.  This permits the compiler to conclude that
+     `p + u > p' is always true for a pointer `p' and unsigned integer
+     `u'.  This assumption is only valid because pointer wraparound is
+     undefined, as the expression is false if `p + u' overflows using
+     twos complement arithmetic.
+
+     See also the `-fwrapv' option.  Using `-fwrapv' means that integer
+     signed overflow is fully defined: it wraps.  When `-fwrapv' is
+     used, there is no difference between `-fstrict-overflow' and
+     `-fno-strict-overflow' for integers.  With `-fwrapv' certain types
+     of overflow are permitted.  For example, if the compiler gets an
+     overflow when doing arithmetic on constants, the overflowed value
+     can still be used with `-fwrapv', but not otherwise.
+
+     The `-fstrict-overflow' option is enabled at levels `-O2', `-O3',
+     `-Os'.
+
+`-falign-functions'
+`-falign-functions=N'
+     Align the start of functions to the next power-of-two greater than
+     N, skipping up to N bytes.  For instance, `-falign-functions=32'
+     aligns functions to the next 32-byte boundary, but
+     `-falign-functions=24' would align to the next 32-byte boundary
+     only if this can be done by skipping 23 bytes or less.
+
+     `-fno-align-functions' and `-falign-functions=1' are equivalent
+     and mean that functions will not be aligned.
+
+     Some assemblers only support this flag when N is a power of two;
+     in that case, it is rounded up.
+
+     If N is not specified or is zero, use a machine-dependent default.
+
+     Enabled at levels `-O2', `-O3'.
+
+`-falign-labels'
+`-falign-labels=N'
+     Align all branch targets to a power-of-two boundary, skipping up to
+     N bytes like `-falign-functions'.  This option can easily make
+     code slower, because it must insert dummy operations for when the
+     branch target is reached in the usual flow of the code.
+
+     `-fno-align-labels' and `-falign-labels=1' are equivalent and mean
+     that labels will not be aligned.
+
+     If `-falign-loops' or `-falign-jumps' are applicable and are
+     greater than this value, then their values are used instead.
+
+     If N is not specified or is zero, use a machine-dependent default
+     which is very likely to be `1', meaning no alignment.
+
+     Enabled at levels `-O2', `-O3'.
+
+`-falign-loops'
+`-falign-loops=N'
+     Align loops to a power-of-two boundary, skipping up to N bytes
+     like `-falign-functions'.  The hope is that the loop will be
+     executed many times, which will make up for any execution of the
+     dummy operations.
+
+     `-fno-align-loops' and `-falign-loops=1' are equivalent and mean
+     that loops will not be aligned.
+
+     If N is not specified or is zero, use a machine-dependent default.
+
+     Enabled at levels `-O2', `-O3'.
+
+`-falign-jumps'
+`-falign-jumps=N'
+     Align branch targets to a power-of-two boundary, for branch targets
+     where the targets can only be reached by jumping, skipping up to N
+     bytes like `-falign-functions'.  In this case, no dummy operations
+     need be executed.
+
+     `-fno-align-jumps' and `-falign-jumps=1' are equivalent and mean
+     that loops will not be aligned.
+
+     If N is not specified or is zero, use a machine-dependent default.
+
+     Enabled at levels `-O2', `-O3'.
+
+`-funit-at-a-time'
+     This option is left for compatibility reasons. `-funit-at-a-time'
+     has no effect, while `-fno-unit-at-a-time' implies
+     `-fno-toplevel-reorder' and `-fno-section-anchors'.
+
+     Enabled by default.
+
+`-fno-toplevel-reorder'
+     Do not reorder top-level functions, variables, and `asm'
+     statements.  Output them in the same order that they appear in the
+     input file.  When this option is used, unreferenced static
+     variables will not be removed.  This option is intended to support
+     existing code which relies on a particular ordering.  For new
+     code, it is better to use attributes.
+
+     Enabled at level `-O0'.  When disabled explicitly, it also imply
+     `-fno-section-anchors' that is otherwise enabled at `-O0' on some
+     targets.
+
+`-fweb'
+     Constructs webs as commonly used for register allocation purposes
+     and assign each web individual pseudo register.  This allows the
+     register allocation pass to operate on pseudos directly, but also
+     strengthens several other optimization passes, such as CSE, loop
+     optimizer and trivial dead code remover.  It can, however, make
+     debugging impossible, since variables will no longer stay in a
+     "home register".
+
+     Enabled by default with `-funroll-loops'.
+
+`-fwhole-program'
+     Assume that the current compilation unit represents the whole
+     program being compiled.  All public functions and variables with
+     the exception of `main' and those merged by attribute
+     `externally_visible' become static functions and in effect are
+     optimized more aggressively by interprocedural optimizers. If
+     `gold' is used as the linker plugin, `externally_visible'
+     attributes are automatically added to functions (not variable yet
+     due to a current `gold' issue) that are accessed outside of LTO
+     objects according to resolution file produced by `gold'.  For
+     other linkers that cannot generate resolution file, explicit
+     `externally_visible' attributes are still necessary.  While this
+     option is equivalent to proper use of the `static' keyword for
+     programs consisting of a single file, in combination with option
+     `-flto' this flag can be used to compile many smaller scale
+     programs since the functions and variables become local for the
+     whole combined compilation unit, not for the single source file
+     itself.
+
+     This option implies `-fwhole-file' for Fortran programs.
+
+`-flto[=N]'
+     This option runs the standard link-time optimizer.  When invoked
+     with source code, it generates GIMPLE (one of GCC's internal
+     representations) and writes it to special ELF sections in the
+     object file.  When the object files are linked together, all the
+     function bodies are read from these ELF sections and instantiated
+     as if they had been part of the same translation unit.
+
+     To use the link-time optimizer, `-flto' needs to be specified at
+     compile time and during the final link.  For example:
+
+          gcc -c -O2 -flto foo.c
+          gcc -c -O2 -flto bar.c
+          gcc -o myprog -flto -O2 foo.o bar.o
+
+     The first two invocations to GCC save a bytecode representation of
+     GIMPLE into special ELF sections inside `foo.o' and `bar.o'.  The
+     final invocation reads the GIMPLE bytecode from `foo.o' and
+     `bar.o', merges the two files into a single internal image, and
+     compiles the result as usual.  Since both `foo.o' and `bar.o' are
+     merged into a single image, this causes all the interprocedural
+     analyses and optimizations in GCC to work across the two files as
+     if they were a single one.  This means, for example, that the
+     inliner is able to inline functions in `bar.o' into functions in
+     `foo.o' and vice-versa.
+
+     Another (simpler) way to enable link-time optimization is:
+
+          gcc -o myprog -flto -O2 foo.c bar.c
+
+     The above generates bytecode for `foo.c' and `bar.c', merges them
+     together into a single GIMPLE representation and optimizes them as
+     usual to produce `myprog'.
+
+     The only important thing to keep in mind is that to enable
+     link-time optimizations the `-flto' flag needs to be passed to
+     both the compile and the link commands.
+
+     To make whole program optimization effective, it is necessary to
+     make certain whole program assumptions.  The compiler needs to know
+     what functions and variables can be accessed by libraries and
+     runtime outside of the link-time optimized unit.  When supported
+     by the linker, the linker plugin (see `-fuse-linker-plugin')
+     passes information to the compiler about used and externally
+     visible symbols.  When the linker plugin is not available,
+     `-fwhole-program' should be used to allow the compiler to make
+     these assumptions, which leads to more aggressive optimization
+     decisions.
+
+     Note that when a file is compiled with `-flto', the generated
+     object file is larger than a regular object file because it
+     contains GIMPLE bytecodes and the usual final code.  This means
+     that object files with LTO information can be linked as normal
+     object files; if `-flto' is not passed to the linker, no
+     interprocedural optimizations are applied.
+
+     Additionally, the optimization flags used to compile individual
+     files are not necessarily related to those used at link time.  For
+     instance,
+
+          gcc -c -O0 -flto foo.c
+          gcc -c -O0 -flto bar.c
+          gcc -o myprog -flto -O3 foo.o bar.o
+
+     This produces individual object files with unoptimized assembler
+     code, but the resulting binary `myprog' is optimized at `-O3'.
+     If, instead, the final binary is generated without `-flto', then
+     `myprog' is not optimized.
+
+     When producing the final binary with `-flto', GCC only applies
+     link-time optimizations to those files that contain bytecode.
+     Therefore, you can mix and match object files and libraries with
+     GIMPLE bytecodes and final object code.  GCC automatically selects
+     which files to optimize in LTO mode and which files to link without
+     further processing.
+
+     There are some code generation flags that GCC preserves when
+     generating bytecodes, as they need to be used during the final link
+     stage.  Currently, the following options are saved into the GIMPLE
+     bytecode files: `-fPIC', `-fcommon' and all the `-m' target flags.
+
+     At link time, these options are read in and reapplied.  Note that
+     the current implementation makes no attempt to recognize
+     conflicting values for these options.  If different files have
+     conflicting option values (e.g., one file is compiled with `-fPIC'
+     and another isn't), the compiler simply uses the last value read
+     from the bytecode files.  It is recommended, then, that you
+     compile all the files participating in the same link with the same
+     options.
+
+     If LTO encounters objects with C linkage declared with incompatible
+     types in separate translation units to be linked together
+     (undefined behavior according to ISO C99 6.2.7), a non-fatal
+     diagnostic may be issued.  The behavior is still undefined at
+     runtime.
+
+     Another feature of LTO is that it is possible to apply
+     interprocedural optimizations on files written in different
+     languages.  This requires support in the language front end.
+     Currently, the C, C++ and Fortran front ends are capable of
+     emitting GIMPLE bytecodes, so something like this should work:
+
+          gcc -c -flto foo.c
+          g++ -c -flto bar.cc
+          gfortran -c -flto baz.f90
+          g++ -o myprog -flto -O3 foo.o bar.o baz.o -lgfortran
+
+     Notice that the final link is done with `g++' to get the C++
+     runtime libraries and `-lgfortran' is added to get the Fortran
+     runtime libraries.  In general, when mixing languages in LTO mode,
+     you should use the same link command options as when mixing
+     languages in a regular (non-LTO) compilation; all you need to add
+     is `-flto' to all the compile and link commands.
+
+     If object files containing GIMPLE bytecode are stored in a library
+     archive, say `libfoo.a', it is possible to extract and use them in
+     an LTO link if you are using a linker with plugin support.  To
+     enable this feature, use the flag `-fuse-linker-plugin' at link
+     time:
+
+          gcc -o myprog -O2 -flto -fuse-linker-plugin a.o b.o -lfoo
+
+     With the linker plugin enabled, the linker extracts the needed
+     GIMPLE files from `libfoo.a' and passes them on to the running GCC
+     to make them part of the aggregated GIMPLE image to be optimized.
+
+     If you are not using a linker with plugin support and/or do not
+     enable the linker plugin, then the objects inside `libfoo.a' are
+     extracted and linked as usual, but they do not participate in the
+     LTO optimization process.
+
+     Link-time optimizations do not require the presence of the whole
+     program to operate.  If the program does not require any symbols
+     to be exported, it is possible to combine `-flto' and
+     `-fwhole-program' to allow the interprocedural optimizers to use
+     more aggressive assumptions which may lead to improved
+     optimization opportunities.  Use of `-fwhole-program' is not
+     needed when linker plugin is active (see `-fuse-linker-plugin').
+
+     The current implementation of LTO makes no attempt to generate
+     bytecode that is portable between different types of hosts.  The
+     bytecode files are versioned and there is a strict version check,
+     so bytecode files generated in one version of GCC will not work
+     with an older/newer version of GCC.
+
+     Link-time optimization does not work well with generation of
+     debugging information.  Combining `-flto' with `-g' is currently
+     experimental and expected to produce wrong results.
+
+     If you specify the optional N, the optimization and code
+     generation done at link time is executed in parallel using N
+     parallel jobs by utilizing an installed `make' program.  The
+     environment variable `MAKE' may be used to override the program
+     used.  The default value for N is 1.
+
+     You can also specify `-flto=jobserver' to use GNU make's job
+     server mode to determine the number of parallel jobs. This is
+     useful when the Makefile calling GCC is already executing in
+     parallel.  You must prepend a `+' to the command recipe in the
+     parent Makefile for this to work.  This option likely only works
+     if `MAKE' is GNU make.
+
+     This option is disabled by default.
+
+`-flto-partition=ALG'
+     Specify the partitioning algorithm used by the link-time optimizer.
+     The value is either `1to1' to specify a partitioning mirroring the
+     original source files or `balanced' to specify partitioning into
+     equally sized chunks (whenever possible).  Specifying `none' as an
+     algorithm disables partitioning and streaming completely. The
+     default value is `balanced'.
+
+`-flto-compression-level=N'
+     This option specifies the level of compression used for
+     intermediate language written to LTO object files, and is only
+     meaningful in conjunction with LTO mode (`-flto').  Valid values
+     are 0 (no compression) to 9 (maximum compression).  Values outside
+     this range are clamped to either 0 or 9.  If the option is not
+     given, a default balanced compression setting is used.
+
+`-flto-report'
+     Prints a report with internal details on the workings of the
+     link-time optimizer.  The contents of this report vary from
+     version to version.  It is meant to be useful to GCC developers
+     when processing object files in LTO mode (via `-flto').
+
+     Disabled by default.
+
+`-fuse-linker-plugin'
+     Enables the use of a linker plugin during link-time optimization.
+     This option relies on the linker plugin support in linker that is
+     available in gold or in GNU ld 2.21 or newer.
+
+     This option enables the extraction of object files with GIMPLE
+     bytecode out of library archives. This improves the quality of
+     optimization by exposing more code to the link-time optimizer.
+     This information specifies what symbols can be accessed externally
+     (by non-LTO object or during dynamic linking).  Resulting code
+     quality improvements on binaries (and shared libraries that use
+     hidden visibility) are similar to `-fwhole-program'.  See `-flto'
+     for a description of the effect of this flag and how to use it.
+
+     This option is enabled by default when LTO support in GCC is
+     enabled and GCC was configured for use with a linker supporting
+     plugins (GNU ld 2.21 or newer or gold).
+
+`-fcompare-elim'
+     After register allocation and post-register allocation instruction
+     splitting, identify arithmetic instructions that compute processor
+     flags similar to a comparison operation based on that arithmetic.
+     If possible, eliminate the explicit comparison operation.
+
+     This pass only applies to certain targets that cannot explicitly
+     represent the comparison operation before register allocation is
+     complete.
+
+     Enabled at levels `-O', `-O2', `-O3', `-Os'.
+
+`-fcprop-registers'
+     After register allocation and post-register allocation instruction
+     splitting, we perform a copy-propagation pass to try to reduce
+     scheduling dependencies and occasionally eliminate the copy.
+
+     Enabled at levels `-O', `-O2', `-O3', `-Os'.
+
+`-fprofile-correction'
+     Profiles collected using an instrumented binary for multi-threaded
+     programs may be inconsistent due to missed counter updates. When
+     this option is specified, GCC will use heuristics to correct or
+     smooth out such inconsistencies. By default, GCC will emit an
+     error message when an inconsistent profile is detected.
+
+`-fprofile-dir=PATH'
+     Set the directory to search for the profile data files in to PATH.
+     This option affects only the profile data generated by
+     `-fprofile-generate', `-ftest-coverage', `-fprofile-arcs' and used
+     by `-fprofile-use' and `-fbranch-probabilities' and its related
+     options.  By default, GCC will use the current directory as PATH,
+     thus the profile data file will appear in the same directory as
+     the object file.
+
+`-fprofile-generate'
+`-fprofile-generate=PATH'
+     Enable options usually used for instrumenting application to
+     produce profile useful for later recompilation with profile
+     feedback based optimization.  You must use `-fprofile-generate'
+     both when compiling and when linking your program.
+
+     The following options are enabled: `-fprofile-arcs',
+     `-fprofile-values', `-fvpt'.
+
+     If PATH is specified, GCC will look at the PATH to find the
+     profile feedback data files. See `-fprofile-dir'.
+
+`-fprofile-use'
+`-fprofile-use=PATH'
+     Enable profile feedback directed optimizations, and optimizations
+     generally profitable only with profile feedback available.
+
+     The following options are enabled: `-fbranch-probabilities',
+     `-fvpt', `-funroll-loops', `-fpeel-loops', `-ftracer'
+
+     By default, GCC emits an error message if the feedback profiles do
+     not match the source code.  This error can be turned into a
+     warning by using `-Wcoverage-mismatch'.  Note this may result in
+     poorly optimized code.
+
+     If PATH is specified, GCC will look at the PATH to find the
+     profile feedback data files. See `-fprofile-dir'.
+
+ The following options control compiler behavior regarding floating
+point arithmetic.  These options trade off between speed and
+correctness.  All must be specifically enabled.
+
+`-ffloat-store'
+     Do not store floating point variables in registers, and inhibit
+     other options that might change whether a floating point value is
+     taken from a register or memory.
+
+     This option prevents undesirable excess precision on machines such
+     as the 68000 where the floating registers (of the 68881) keep more
+     precision than a `double' is supposed to have.  Similarly for the
+     x86 architecture.  For most programs, the excess precision does
+     only good, but a few programs rely on the precise definition of
+     IEEE floating point.  Use `-ffloat-store' for such programs, after
+     modifying them to store all pertinent intermediate computations
+     into variables.
+
+`-fexcess-precision=STYLE'
+     This option allows further control over excess precision on
+     machines where floating-point registers have more precision than
+     the IEEE `float' and `double' types and the processor does not
+     support operations rounding to those types.  By default,
+     `-fexcess-precision=fast' is in effect; this means that operations
+     are carried out in the precision of the registers and that it is
+     unpredictable when rounding to the types specified in the source
+     code takes place.  When compiling C, if
+     `-fexcess-precision=standard' is specified then excess precision
+     will follow the rules specified in ISO C99; in particular, both
+     casts and assignments cause values to be rounded to their semantic
+     types (whereas `-ffloat-store' only affects assignments).  This
+     option is enabled by default for C if a strict conformance option
+     such as `-std=c99' is used.
+
+     `-fexcess-precision=standard' is not implemented for languages
+     other than C, and has no effect if `-funsafe-math-optimizations'
+     or `-ffast-math' is specified.  On the x86, it also has no effect
+     if `-mfpmath=sse' or `-mfpmath=sse+387' is specified; in the
+     former case, IEEE semantics apply without excess precision, and in
+     the latter, rounding is unpredictable.
+
+`-ffast-math'
+     Sets `-fno-math-errno', `-funsafe-math-optimizations',
+     `-ffinite-math-only', `-fno-rounding-math', `-fno-signaling-nans'
+     and `-fcx-limited-range'.
+
+     This option causes the preprocessor macro `__FAST_MATH__' to be
+     defined.
+
+     This option is not turned on by any `-O' option besides `-Ofast'
+     since it can result in incorrect output for programs which depend
+     on an exact implementation of IEEE or ISO rules/specifications for
+     math functions. It may, however, yield faster code for programs
+     that do not require the guarantees of these specifications.
+
+`-fno-math-errno'
+     Do not set ERRNO after calling math functions that are executed
+     with a single instruction, e.g., sqrt.  A program that relies on
+     IEEE exceptions for math error handling may want to use this flag
+     for speed while maintaining IEEE arithmetic compatibility.
+
+     This option is not turned on by any `-O' option since it can
+     result in incorrect output for programs which depend on an exact
+     implementation of IEEE or ISO rules/specifications for math
+     functions. It may, however, yield faster code for programs that do
+     not require the guarantees of these specifications.
+
+     The default is `-fmath-errno'.
+
+     On Darwin systems, the math library never sets `errno'.  There is
+     therefore no reason for the compiler to consider the possibility
+     that it might, and `-fno-math-errno' is the default.
+
+`-funsafe-math-optimizations'
+     Allow optimizations for floating-point arithmetic that (a) assume
+     that arguments and results are valid and (b) may violate IEEE or
+     ANSI standards.  When used at link-time, it may include libraries
+     or startup files that change the default FPU control word or other
+     similar optimizations.
+
+     This option is not turned on by any `-O' option since it can
+     result in incorrect output for programs which depend on an exact
+     implementation of IEEE or ISO rules/specifications for math
+     functions. It may, however, yield faster code for programs that do
+     not require the guarantees of these specifications.  Enables
+     `-fno-signed-zeros', `-fno-trapping-math', `-fassociative-math'
+     and `-freciprocal-math'.
+
+     The default is `-fno-unsafe-math-optimizations'.
+
+`-fassociative-math'
+     Allow re-association of operands in series of floating-point
+     operations.  This violates the ISO C and C++ language standard by
+     possibly changing computation result.  NOTE: re-ordering may
+     change the sign of zero as well as ignore NaNs and inhibit or
+     create underflow or overflow (and thus cannot be used on a code
+     which relies on rounding behavior like `(x + 2**52) - 2**52)'.
+     May also reorder floating-point comparisons and thus may not be
+     used when ordered comparisons are required.  This option requires
+     that both `-fno-signed-zeros' and `-fno-trapping-math' be in
+     effect.  Moreover, it doesn't make much sense with
+     `-frounding-math'. For Fortran the option is automatically enabled
+     when both `-fno-signed-zeros' and `-fno-trapping-math' are in
+     effect.
+
+     The default is `-fno-associative-math'.
+
+`-freciprocal-math'
+     Allow the reciprocal of a value to be used instead of dividing by
+     the value if this enables optimizations.  For example `x / y' can
+     be replaced with `x * (1/y)' which is useful if `(1/y)' is subject
+     to common subexpression elimination.  Note that this loses
+     precision and increases the number of flops operating on the value.
+
+     The default is `-fno-reciprocal-math'.
+
+`-ffinite-math-only'
+     Allow optimizations for floating-point arithmetic that assume that
+     arguments and results are not NaNs or +-Infs.
+
+     This option is not turned on by any `-O' option since it can
+     result in incorrect output for programs which depend on an exact
+     implementation of IEEE or ISO rules/specifications for math
+     functions. It may, however, yield faster code for programs that do
+     not require the guarantees of these specifications.
+
+     The default is `-fno-finite-math-only'.
+
+`-fno-signed-zeros'
+     Allow optimizations for floating point arithmetic that ignore the
+     signedness of zero.  IEEE arithmetic specifies the behavior of
+     distinct +0.0 and -0.0 values, which then prohibits simplification
+     of expressions such as x+0.0 or 0.0*x (even with
+     `-ffinite-math-only').  This option implies that the sign of a
+     zero result isn't significant.
+
+     The default is `-fsigned-zeros'.
+
+`-fno-trapping-math'
+     Compile code assuming that floating-point operations cannot
+     generate user-visible traps.  These traps include division by
+     zero, overflow, underflow, inexact result and invalid operation.
+     This option requires that `-fno-signaling-nans' be in effect.
+     Setting this option may allow faster code if one relies on
+     "non-stop" IEEE arithmetic, for example.
+
+     This option should never be turned on by any `-O' option since it
+     can result in incorrect output for programs which depend on an
+     exact implementation of IEEE or ISO rules/specifications for math
+     functions.
+
+     The default is `-ftrapping-math'.
+
+`-frounding-math'
+     Disable transformations and optimizations that assume default
+     floating point rounding behavior.  This is round-to-zero for all
+     floating point to integer conversions, and round-to-nearest for
+     all other arithmetic truncations.  This option should be specified
+     for programs that change the FP rounding mode dynamically, or that
+     may be executed with a non-default rounding mode.  This option
+     disables constant folding of floating point expressions at
+     compile-time (which may be affected by rounding mode) and
+     arithmetic transformations that are unsafe in the presence of
+     sign-dependent rounding modes.
+
+     The default is `-fno-rounding-math'.
+
+     This option is experimental and does not currently guarantee to
+     disable all GCC optimizations that are affected by rounding mode.
+     Future versions of GCC may provide finer control of this setting
+     using C99's `FENV_ACCESS' pragma.  This command line option will
+     be used to specify the default state for `FENV_ACCESS'.
+
+`-fsignaling-nans'
+     Compile code assuming that IEEE signaling NaNs may generate
+     user-visible traps during floating-point operations.  Setting this
+     option disables optimizations that may change the number of
+     exceptions visible with signaling NaNs.  This option implies
+     `-ftrapping-math'.
+
+     This option causes the preprocessor macro `__SUPPORT_SNAN__' to be
+     defined.
+
+     The default is `-fno-signaling-nans'.
+
+     This option is experimental and does not currently guarantee to
+     disable all GCC optimizations that affect signaling NaN behavior.
+
+`-fsingle-precision-constant'
+     Treat floating point constant as single precision constant instead
+     of implicitly converting it to double precision constant.
+
+`-fcx-limited-range'
+     When enabled, this option states that a range reduction step is not
+     needed when performing complex division.  Also, there is no
+     checking whether the result of a complex multiplication or
+     division is `NaN + I*NaN', with an attempt to rescue the situation
+     in that case.  The default is `-fno-cx-limited-range', but is
+     enabled by `-ffast-math'.
+
+     This option controls the default setting of the ISO C99
+     `CX_LIMITED_RANGE' pragma.  Nevertheless, the option applies to
+     all languages.
+
+`-fcx-fortran-rules'
+     Complex multiplication and division follow Fortran rules.  Range
+     reduction is done as part of complex division, but there is no
+     checking whether the result of a complex multiplication or
+     division is `NaN + I*NaN', with an attempt to rescue the situation
+     in that case.
+
+     The default is `-fno-cx-fortran-rules'.
+
+
+ The following options control optimizations that may improve
+performance, but are not enabled by any `-O' options.  This section
+includes experimental options that may produce broken code.
+
+`-fbranch-probabilities'
+     After running a program compiled with `-fprofile-arcs' (*note
+     Options for Debugging Your Program or `gcc': Debugging Options.),
+     you can compile it a second time using `-fbranch-probabilities',
+     to improve optimizations based on the number of times each branch
+     was taken.  When the program compiled with `-fprofile-arcs' exits
+     it saves arc execution counts to a file called `SOURCENAME.gcda'
+     for each source file.  The information in this data file is very
+     dependent on the structure of the generated code, so you must use
+     the same source code and the same optimization options for both
+     compilations.
+
+     With `-fbranch-probabilities', GCC puts a `REG_BR_PROB' note on
+     each `JUMP_INSN' and `CALL_INSN'.  These can be used to improve
+     optimization.  Currently, they are only used in one place: in
+     `reorg.c', instead of guessing which path a branch is most likely
+     to take, the `REG_BR_PROB' values are used to exactly determine
+     which path is taken more often.
+
+`-fprofile-values'
+     If combined with `-fprofile-arcs', it adds code so that some data
+     about values of expressions in the program is gathered.
+
+     With `-fbranch-probabilities', it reads back the data gathered
+     from profiling values of expressions for usage in optimizations.
+
+     Enabled with `-fprofile-generate' and `-fprofile-use'.
+
+`-fvpt'
+     If combined with `-fprofile-arcs', it instructs the compiler to add
+     a code to gather information about values of expressions.
+
+     With `-fbranch-probabilities', it reads back the data gathered and
+     actually performs the optimizations based on them.  Currently the
+     optimizations include specialization of division operation using
+     the knowledge about the value of the denominator.
+
+`-frename-registers'
+     Attempt to avoid false dependencies in scheduled code by making use
+     of registers left over after register allocation.  This
+     optimization will most benefit processors with lots of registers.
+     Depending on the debug information format adopted by the target,
+     however, it can make debugging impossible, since variables will no
+     longer stay in a "home register".
+
+     Enabled by default with `-funroll-loops' and `-fpeel-loops'.
+
+`-ftracer'
+     Perform tail duplication to enlarge superblock size.  This
+     transformation simplifies the control flow of the function
+     allowing other optimizations to do better job.
+
+     Enabled with `-fprofile-use'.
+
+`-funroll-loops'
+     Unroll loops whose number of iterations can be determined at
+     compile time or upon entry to the loop.  `-funroll-loops' implies
+     `-frerun-cse-after-loop', `-fweb' and `-frename-registers'.  It
+     also turns on complete loop peeling (i.e. complete removal of
+     loops with small constant number of iterations).  This option
+     makes code larger, and may or may not make it run faster.
+
+     Enabled with `-fprofile-use'.
+
+`-funroll-all-loops'
+     Unroll all loops, even if their number of iterations is uncertain
+     when the loop is entered.  This usually makes programs run more
+     slowly.  `-funroll-all-loops' implies the same options as
+     `-funroll-loops'.
+
+`-fpeel-loops'
+     Peels the loops for that there is enough information that they do
+     not roll much (from profile feedback).  It also turns on complete
+     loop peeling (i.e. complete removal of loops with small constant
+     number of iterations).
+
+     Enabled with `-fprofile-use'.
+
+`-fmove-loop-invariants'
+     Enables the loop invariant motion pass in the RTL loop optimizer.
+     Enabled at level `-O1'
+
+`-funswitch-loops'
+     Move branches with loop invariant conditions out of the loop, with
+     duplicates of the loop on both branches (modified according to
+     result of the condition).
+
+`-ffunction-sections'
+`-fdata-sections'
+     Place each function or data item into its own section in the output
+     file if the target supports arbitrary sections.  The name of the
+     function or the name of the data item determines the section's name
+     in the output file.
+
+     Use these options on systems where the linker can perform
+     optimizations to improve locality of reference in the instruction
+     space.  Most systems using the ELF object format and SPARC
+     processors running Solaris 2 have linkers with such optimizations.
+     AIX may have these optimizations in the future.
+
+     Only use these options when there are significant benefits from
+     doing so.  When you specify these options, the assembler and
+     linker will create larger object and executable files and will
+     also be slower.  You will not be able to use `gprof' on all
+     systems if you specify this option and you may have problems with
+     debugging if you specify both this option and `-g'.
+
+`-fbranch-target-load-optimize'
+     Perform branch target register load optimization before prologue /
+     epilogue threading.  The use of target registers can typically be
+     exposed only during reload, thus hoisting loads out of loops and
+     doing inter-block scheduling needs a separate optimization pass.
+
+`-fbranch-target-load-optimize2'
+     Perform branch target register load optimization after prologue /
+     epilogue threading.
+
+`-fbtr-bb-exclusive'
+     When performing branch target register load optimization, don't
+     reuse branch target registers in within any basic block.
+
+`-fstack-protector'
+     Emit extra code to check for buffer overflows, such as stack
+     smashing attacks.  This is done by adding a guard variable to
+     functions with vulnerable objects.  This includes functions that
+     call alloca, and functions with buffers larger than 8 bytes.  The
+     guards are initialized when a function is entered and then checked
+     when the function exits.  If a guard check fails, an error message
+     is printed and the program exits.
+
+`-fstack-protector-all'
+     Like `-fstack-protector' except that all functions are protected.
+
+`-fsection-anchors'
+     Try to reduce the number of symbolic address calculations by using
+     shared "anchor" symbols to address nearby objects.  This
+     transformation can help to reduce the number of GOT entries and
+     GOT accesses on some targets.
+
+     For example, the implementation of the following function `foo':
+
+          static int a, b, c;
+          int foo (void) { return a + b + c; }
+
+     would usually calculate the addresses of all three variables, but
+     if you compile it with `-fsection-anchors', it will access the
+     variables from a common anchor point instead.  The effect is
+     similar to the following pseudocode (which isn't valid C):
+
+          int foo (void)
+          {
+            register int *xr = &x;
+            return xr[&a - &x] + xr[&b - &x] + xr[&c - &x];
+          }
+
+     Not all targets support this option.
+
+`--param NAME=VALUE'
+     In some places, GCC uses various constants to control the amount of
+     optimization that is done.  For example, GCC will not inline
+     functions that contain more that a certain number of instructions.
+     You can control some of these constants on the command-line using
+     the `--param' option.
+
+     The names of specific parameters, and the meaning of the values,
+     are tied to the internals of the compiler, and are subject to
+     change without notice in future releases.
+
+     In each case, the VALUE is an integer.  The allowable choices for
+     NAME are given in the following table:
+
+    `struct-reorg-cold-struct-ratio'
+          The threshold ratio (as a percentage) between a structure
+          frequency and the frequency of the hottest structure in the
+          program.  This parameter is used by struct-reorg optimization
+          enabled by `-fipa-struct-reorg'.  We say that if the ratio of
+          a structure frequency, calculated by profiling, to the
+          hottest structure frequency in the program is less than this
+          parameter, then structure reorganization is not applied to
+          this structure.  The default is 10.
+
+    `predictable-branch-outcome'
+          When branch is predicted to be taken with probability lower
+          than this threshold (in percent), then it is considered well
+          predictable. The default is 10.
+
+    `max-crossjump-edges'
+          The maximum number of incoming edges to consider for
+          crossjumping.  The algorithm used by `-fcrossjumping' is
+          O(N^2) in the number of edges incoming to each block.
+          Increasing values mean more aggressive optimization, making
+          the compile time increase with probably small improvement in
+          executable size.
+
+    `min-crossjump-insns'
+          The minimum number of instructions which must be matched at
+          the end of two blocks before crossjumping will be performed
+          on them.  This value is ignored in the case where all
+          instructions in the block being crossjumped from are matched.
+          The default value is 5.
+
+    `max-grow-copy-bb-insns'
+          The maximum code size expansion factor when copying basic
+          blocks instead of jumping.  The expansion is relative to a
+          jump instruction.  The default value is 8.
+
+    `max-goto-duplication-insns'
+          The maximum number of instructions to duplicate to a block
+          that jumps to a computed goto.  To avoid O(N^2) behavior in a
+          number of passes, GCC factors computed gotos early in the
+          compilation process, and unfactors them as late as possible.
+          Only computed jumps at the end of a basic blocks with no more
+          than max-goto-duplication-insns are unfactored.  The default
+          value is 8.
+
+    `max-delay-slot-insn-search'
+          The maximum number of instructions to consider when looking
+          for an instruction to fill a delay slot.  If more than this
+          arbitrary number of instructions is searched, the time
+          savings from filling the delay slot will be minimal so stop
+          searching.  Increasing values mean more aggressive
+          optimization, making the compile time increase with probably
+          small improvement in executable run time.
+
+    `max-delay-slot-live-search'
+          When trying to fill delay slots, the maximum number of
+          instructions to consider when searching for a block with
+          valid live register information.  Increasing this arbitrarily
+          chosen value means more aggressive optimization, increasing
+          the compile time.  This parameter should be removed when the
+          delay slot code is rewritten to maintain the control-flow
+          graph.
+
+    `max-gcse-memory'
+          The approximate maximum amount of memory that will be
+          allocated in order to perform the global common subexpression
+          elimination optimization.  If more memory than specified is
+          required, the optimization will not be done.
+
+    `max-gcse-insertion-ratio'
+          If the ratio of expression insertions to deletions is larger
+          than this value for any expression, then RTL PRE will insert
+          or remove the expression and thus leave partially redundant
+          computations in the instruction stream.  The default value is
+          20.
+
+    `max-pending-list-length'
+          The maximum number of pending dependencies scheduling will
+          allow before flushing the current state and starting over.
+          Large functions with few branches or calls can create
+          excessively large lists which needlessly consume memory and
+          resources.
+
+    `max-inline-insns-single'
+          Several parameters control the tree inliner used in gcc.
+          This number sets the maximum number of instructions (counted
+          in GCC's internal representation) in a single function that
+          the tree inliner will consider for inlining.  This only
+          affects functions declared inline and methods implemented in
+          a class declaration (C++).  The default value is 400.
+
+    `max-inline-insns-auto'
+          When you use `-finline-functions' (included in `-O3'), a lot
+          of functions that would otherwise not be considered for
+          inlining by the compiler will be investigated.  To those
+          functions, a different (more restrictive) limit compared to
+          functions declared inline can be applied.  The default value
+          is 40.
+
+    `large-function-insns'
+          The limit specifying really large functions.  For functions
+          larger than this limit after inlining, inlining is
+          constrained by `--param large-function-growth'.  This
+          parameter is useful primarily to avoid extreme compilation
+          time caused by non-linear algorithms used by the backend.
+          The default value is 2700.
+
+    `large-function-growth'
+          Specifies maximal growth of large function caused by inlining
+          in percents.  The default value is 100 which limits large
+          function growth to 2.0 times the original size.
+
+    `large-unit-insns'
+          The limit specifying large translation unit.  Growth caused
+          by inlining of units larger than this limit is limited by
+          `--param inline-unit-growth'.  For small units this might be
+          too tight (consider unit consisting of function A that is
+          inline and B that just calls A three time.  If B is small
+          relative to A, the growth of unit is 300\% and yet such
+          inlining is very sane.  For very large units consisting of
+          small inlineable functions however the overall unit growth
+          limit is needed to avoid exponential explosion of code size.
+          Thus for smaller units, the size is increased to `--param
+          large-unit-insns' before applying `--param
+          inline-unit-growth'.  The default is 10000
+
+    `inline-unit-growth'
+          Specifies maximal overall growth of the compilation unit
+          caused by inlining.  The default value is 30 which limits
+          unit growth to 1.3 times the original size.
+
+    `ipcp-unit-growth'
+          Specifies maximal overall growth of the compilation unit
+          caused by interprocedural constant propagation.  The default
+          value is 10 which limits unit growth to 1.1 times the
+          original size.
+
+    `large-stack-frame'
+          The limit specifying large stack frames.  While inlining the
+          algorithm is trying to not grow past this limit too much.
+          Default value is 256 bytes.
+
+    `large-stack-frame-growth'
+          Specifies maximal growth of large stack frames caused by
+          inlining in percents.  The default value is 1000 which limits
+          large stack frame growth to 11 times the original size.
+
+    `max-inline-insns-recursive'
+    `max-inline-insns-recursive-auto'
+          Specifies maximum number of instructions out-of-line copy of
+          self recursive inline function can grow into by performing
+          recursive inlining.
+
+          For functions declared inline `--param
+          max-inline-insns-recursive' is taken into account.  For
+          function not declared inline, recursive inlining happens only
+          when `-finline-functions' (included in `-O3') is enabled and
+          `--param max-inline-insns-recursive-auto' is used.  The
+          default value is 450.
+
+    `max-inline-recursive-depth'
+    `max-inline-recursive-depth-auto'
+          Specifies maximum recursion depth used by the recursive
+          inlining.
+
+          For functions declared inline `--param
+          max-inline-recursive-depth' is taken into account.  For
+          function not declared inline, recursive inlining happens only
+          when `-finline-functions' (included in `-O3') is enabled and
+          `--param max-inline-recursive-depth-auto' is used.  The
+          default value is 8.
+
+    `min-inline-recursive-probability'
+          Recursive inlining is profitable only for function having
+          deep recursion in average and can hurt for function having
+          little recursion depth by increasing the prologue size or
+          complexity of function body to other optimizers.
+
+          When profile feedback is available (see `-fprofile-generate')
+          the actual recursion depth can be guessed from probability
+          that function will recurse via given call expression.  This
+          parameter limits inlining only to call expression whose
+          probability exceeds given threshold (in percents).  The
+          default value is 10.
+
+    `early-inlining-insns'
+          Specify growth that early inliner can make.  In effect it
+          increases amount of inlining for code having large
+          abstraction penalty.  The default value is 10.
+
+    `max-early-inliner-iterations'
+    `max-early-inliner-iterations'
+          Limit of iterations of early inliner.  This basically bounds
+          number of nested indirect calls early inliner can resolve.
+          Deeper chains are still handled by late inlining.
+
+    `comdat-sharing-probability'
+    `comdat-sharing-probability'
+          Probability (in percent) that C++ inline function with comdat
+          visibility will be shared across multiple compilation units.
+          The default value is 20.
+
+    `min-vect-loop-bound'
+          The minimum number of iterations under which a loop will not
+          get vectorized when `-ftree-vectorize' is used.  The number
+          of iterations after vectorization needs to be greater than
+          the value specified by this option to allow vectorization.
+          The default value is 0.
+
+    `gcse-cost-distance-ratio'
+          Scaling factor in calculation of maximum distance an
+          expression can be moved by GCSE optimizations.  This is
+          currently supported only in the code hoisting pass.  The
+          bigger the ratio, the more aggressive code hoisting will be
+          with simple expressions, i.e., the expressions which have cost
+          less than `gcse-unrestricted-cost'.  Specifying 0 will disable
+          hoisting of simple expressions.  The default value is 10.
+
+    `gcse-unrestricted-cost'
+          Cost, roughly measured as the cost of a single typical machine
+          instruction, at which GCSE optimizations will not constrain
+          the distance an expression can travel.  This is currently
+          supported only in the code hoisting pass.  The lesser the
+          cost, the more aggressive code hoisting will be.  Specifying
+          0 will allow all expressions to travel unrestricted distances.
+          The default value is 3.
+
+    `max-hoist-depth'
+          The depth of search in the dominator tree for expressions to
+          hoist.  This is used to avoid quadratic behavior in hoisting
+          algorithm.  The value of 0 will avoid limiting the search,
+          but may slow down compilation of huge functions.  The default
+          value is 30.
+
+    `max-unrolled-insns'
+          The maximum number of instructions that a loop should have if
+          that loop is unrolled, and if the loop is unrolled, it
+          determines how many times the loop code is unrolled.
+
+    `max-average-unrolled-insns'
+          The maximum number of instructions biased by probabilities of
+          their execution that a loop should have if that loop is
+          unrolled, and if the loop is unrolled, it determines how many
+          times the loop code is unrolled.
+
+    `max-unroll-times'
+          The maximum number of unrollings of a single loop.
+
+    `max-peeled-insns'
+          The maximum number of instructions that a loop should have if
+          that loop is peeled, and if the loop is peeled, it determines
+          how many times the loop code is peeled.
+
+    `max-peel-times'
+          The maximum number of peelings of a single loop.
+
+    `max-completely-peeled-insns'
+          The maximum number of insns of a completely peeled loop.
+
+    `max-completely-peel-times'
+          The maximum number of iterations of a loop to be suitable for
+          complete peeling.
+
+    `max-completely-peel-loop-nest-depth'
+          The maximum depth of a loop nest suitable for complete
+          peeling.
+
+    `max-unswitch-insns'
+          The maximum number of insns of an unswitched loop.
+
+    `max-unswitch-level'
+          The maximum number of branches unswitched in a single loop.
+
+    `lim-expensive'
+          The minimum cost of an expensive expression in the loop
+          invariant motion.
+
+    `iv-consider-all-candidates-bound'
+          Bound on number of candidates for induction variables below
+          that all candidates are considered for each use in induction
+          variable optimizations.  Only the most relevant candidates
+          are considered if there are more candidates, to avoid
+          quadratic time complexity.
+
+    `iv-max-considered-uses'
+          The induction variable optimizations give up on loops that
+          contain more induction variable uses.
+
+    `iv-always-prune-cand-set-bound'
+          If number of candidates in the set is smaller than this value,
+          we always try to remove unnecessary ivs from the set during
+          its optimization when a new iv is added to the set.
+
+    `scev-max-expr-size'
+          Bound on size of expressions used in the scalar evolutions
+          analyzer.  Large expressions slow the analyzer.
+
+    `scev-max-expr-complexity'
+          Bound on the complexity of the expressions in the scalar
+          evolutions analyzer.  Complex expressions slow the analyzer.
+
+    `omega-max-vars'
+          The maximum number of variables in an Omega constraint system.
+          The default value is 128.
+
+    `omega-max-geqs'
+          The maximum number of inequalities in an Omega constraint
+          system.  The default value is 256.
+
+    `omega-max-eqs'
+          The maximum number of equalities in an Omega constraint
+          system.  The default value is 128.
+
+    `omega-max-wild-cards'
+          The maximum number of wildcard variables that the Omega
+          solver will be able to insert.  The default value is 18.
+
+    `omega-hash-table-size'
+          The size of the hash table in the Omega solver.  The default
+          value is 550.
+
+    `omega-max-keys'
+          The maximal number of keys used by the Omega solver.  The
+          default value is 500.
+
+    `omega-eliminate-redundant-constraints'
+          When set to 1, use expensive methods to eliminate all
+          redundant constraints.  The default value is 0.
+
+    `vect-max-version-for-alignment-checks'
+          The maximum number of runtime checks that can be performed
+          when doing loop versioning for alignment in the vectorizer.
+          See option ftree-vect-loop-version for more information.
+
+    `vect-max-version-for-alias-checks'
+          The maximum number of runtime checks that can be performed
+          when doing loop versioning for alias in the vectorizer.  See
+          option ftree-vect-loop-version for more information.
+
+    `max-iterations-to-track'
+          The maximum number of iterations of a loop the brute force
+          algorithm for analysis of # of iterations of the loop tries
+          to evaluate.
+
+    `hot-bb-count-fraction'
+          Select fraction of the maximal count of repetitions of basic
+          block in program given basic block needs to have to be
+          considered hot.
+
+    `hot-bb-frequency-fraction'
+          Select fraction of the entry block frequency of executions of
+          basic block in function given basic block needs to have to be
+          considered hot
+
+    `max-predicted-iterations'
+          The maximum number of loop iterations we predict statically.
+          This is useful in cases where function contain single loop
+          with known bound and other loop with unknown.  We predict the
+          known number of iterations correctly, while the unknown
+          number of iterations average to roughly 10.  This means that
+          the loop without bounds would appear artificially cold
+          relative to the other one.
+
+    `align-threshold'
+          Select fraction of the maximal frequency of executions of
+          basic block in function given basic block will get aligned.
+
+    `align-loop-iterations'
+          A loop expected to iterate at lest the selected number of
+          iterations will get aligned.
+
+    `tracer-dynamic-coverage'
+    `tracer-dynamic-coverage-feedback'
+          This value is used to limit superblock formation once the
+          given percentage of executed instructions is covered.  This
+          limits unnecessary code size expansion.
+
+          The `tracer-dynamic-coverage-feedback' is used only when
+          profile feedback is available.  The real profiles (as opposed
+          to statically estimated ones) are much less balanced allowing
+          the threshold to be larger value.
+
+    `tracer-max-code-growth'
+          Stop tail duplication once code growth has reached given
+          percentage.  This is rather hokey argument, as most of the
+          duplicates will be eliminated later in cross jumping, so it
+          may be set to much higher values than is the desired code
+          growth.
+
+    `tracer-min-branch-ratio'
+          Stop reverse growth when the reverse probability of best edge
+          is less than this threshold (in percent).
+
+    `tracer-min-branch-ratio'
+    `tracer-min-branch-ratio-feedback'
+          Stop forward growth if the best edge do have probability
+          lower than this threshold.
+
+          Similarly to `tracer-dynamic-coverage' two values are
+          present, one for compilation for profile feedback and one for
+          compilation without.  The value for compilation with profile
+          feedback needs to be more conservative (higher) in order to
+          make tracer effective.
+
+    `max-cse-path-length'
+          Maximum number of basic blocks on path that cse considers.
+          The default is 10.
+
+    `max-cse-insns'
+          The maximum instructions CSE process before flushing. The
+          default is 1000.
+
+    `ggc-min-expand'
+          GCC uses a garbage collector to manage its own memory
+          allocation.  This parameter specifies the minimum percentage
+          by which the garbage collector's heap should be allowed to
+          expand between collections.  Tuning this may improve
+          compilation speed; it has no effect on code generation.
+
+          The default is 30% + 70% * (RAM/1GB) with an upper bound of
+          100% when RAM >= 1GB.  If `getrlimit' is available, the
+          notion of "RAM" is the smallest of actual RAM and
+          `RLIMIT_DATA' or `RLIMIT_AS'.  If GCC is not able to
+          calculate RAM on a particular platform, the lower bound of
+          30% is used.  Setting this parameter and `ggc-min-heapsize'
+          to zero causes a full collection to occur at every
+          opportunity.  This is extremely slow, but can be useful for
+          debugging.
+
+    `ggc-min-heapsize'
+          Minimum size of the garbage collector's heap before it begins
+          bothering to collect garbage.  The first collection occurs
+          after the heap expands by `ggc-min-expand'% beyond
+          `ggc-min-heapsize'.  Again, tuning this may improve
+          compilation speed, and has no effect on code generation.
+
+          The default is the smaller of RAM/8, RLIMIT_RSS, or a limit
+          which tries to ensure that RLIMIT_DATA or RLIMIT_AS are not
+          exceeded, but with a lower bound of 4096 (four megabytes) and
+          an upper bound of 131072 (128 megabytes).  If GCC is not able
+          to calculate RAM on a particular platform, the lower bound is
+          used.  Setting this parameter very large effectively disables
+          garbage collection.  Setting this parameter and
+          `ggc-min-expand' to zero causes a full collection to occur at
+          every opportunity.
+
+    `max-reload-search-insns'
+          The maximum number of instruction reload should look backward
+          for equivalent register.  Increasing values mean more
+          aggressive optimization, making the compile time increase
+          with probably slightly better performance.  The default value
+          is 100.
+
+    `max-cselib-memory-locations'
+          The maximum number of memory locations cselib should take
+          into account.  Increasing values mean more aggressive
+          optimization, making the compile time increase with probably
+          slightly better performance.  The default value is 500.
+
+    `reorder-blocks-duplicate'
+    `reorder-blocks-duplicate-feedback'
+          Used by basic block reordering pass to decide whether to use
+          unconditional branch or duplicate the code on its
+          destination.  Code is duplicated when its estimated size is
+          smaller than this value multiplied by the estimated size of
+          unconditional jump in the hot spots of the program.
+
+          The `reorder-block-duplicate-feedback' is used only when
+          profile feedback is available and may be set to higher values
+          than `reorder-block-duplicate' since information about the
+          hot spots is more accurate.
+
+    `max-sched-ready-insns'
+          The maximum number of instructions ready to be issued the
+          scheduler should consider at any given time during the first
+          scheduling pass.  Increasing values mean more thorough
+          searches, making the compilation time increase with probably
+          little benefit.  The default value is 100.
+
+    `max-sched-region-blocks'
+          The maximum number of blocks in a region to be considered for
+          interblock scheduling.  The default value is 10.
+
+    `max-pipeline-region-blocks'
+          The maximum number of blocks in a region to be considered for
+          pipelining in the selective scheduler.  The default value is
+          15.
+
+    `max-sched-region-insns'
+          The maximum number of insns in a region to be considered for
+          interblock scheduling.  The default value is 100.
+
+    `max-pipeline-region-insns'
+          The maximum number of insns in a region to be considered for
+          pipelining in the selective scheduler.  The default value is
+          200.
+
+    `min-spec-prob'
+          The minimum probability (in percents) of reaching a source
+          block for interblock speculative scheduling.  The default
+          value is 40.
+
+    `max-sched-extend-regions-iters'
+          The maximum number of iterations through CFG to extend
+          regions.  0 - disable region extension, N - do at most N
+          iterations.  The default value is 0.
+
+    `max-sched-insn-conflict-delay'
+          The maximum conflict delay for an insn to be considered for
+          speculative motion.  The default value is 3.
+
+    `sched-spec-prob-cutoff'
+          The minimal probability of speculation success (in percents),
+          so that speculative insn will be scheduled.  The default
+          value is 40.
+
+    `sched-mem-true-dep-cost'
+          Minimal distance (in CPU cycles) between store and load
+          targeting same memory locations.  The default value is 1.
+
+    `selsched-max-lookahead'
+          The maximum size of the lookahead window of selective
+          scheduling.  It is a depth of search for available
+          instructions.  The default value is 50.
+
+    `selsched-max-sched-times'
+          The maximum number of times that an instruction will be
+          scheduled during selective scheduling.  This is the limit on
+          the number of iterations through which the instruction may be
+          pipelined.  The default value is 2.
+
+    `selsched-max-insns-to-rename'
+          The maximum number of best instructions in the ready list
+          that are considered for renaming in the selective scheduler.
+          The default value is 2.
+
+    `max-last-value-rtl'
+          The maximum size measured as number of RTLs that can be
+          recorded in an expression in combiner for a pseudo register
+          as last known value of that register.  The default is 10000.
+
+    `integer-share-limit'
+          Small integer constants can use a shared data structure,
+          reducing the compiler's memory usage and increasing its
+          speed.  This sets the maximum value of a shared integer
+          constant.  The default value is 256.
+
+    `min-virtual-mappings'
+          Specifies the minimum number of virtual mappings in the
+          incremental SSA updater that should be registered to trigger
+          the virtual mappings heuristic defined by
+          virtual-mappings-ratio.  The default value is 100.
+
+    `virtual-mappings-ratio'
+          If the number of virtual mappings is virtual-mappings-ratio
+          bigger than the number of virtual symbols to be updated, then
+          the incremental SSA updater switches to a full update for
+          those symbols.  The default ratio is 3.
+
+    `ssp-buffer-size'
+          The minimum size of buffers (i.e. arrays) that will receive
+          stack smashing protection when `-fstack-protection' is used.
+
+    `max-jump-thread-duplication-stmts'
+          Maximum number of statements allowed in a block that needs to
+          be duplicated when threading jumps.
+
+    `max-fields-for-field-sensitive'
+          Maximum number of fields in a structure we will treat in a
+          field sensitive manner during pointer analysis.  The default
+          is zero for -O0, and -O1 and 100 for -Os, -O2, and -O3.
+
+    `prefetch-latency'
+          Estimate on average number of instructions that are executed
+          before prefetch finishes.  The distance we prefetch ahead is
+          proportional to this constant.  Increasing this number may
+          also lead to less streams being prefetched (see
+          `simultaneous-prefetches').
+
+    `simultaneous-prefetches'
+          Maximum number of prefetches that can run at the same time.
+
+    `l1-cache-line-size'
+          The size of cache line in L1 cache, in bytes.
+
+    `l1-cache-size'
+          The size of L1 cache, in kilobytes.
+
+    `l2-cache-size'
+          The size of L2 cache, in kilobytes.
+
+    `min-insn-to-prefetch-ratio'
+          The minimum ratio between the number of instructions and the
+          number of prefetches to enable prefetching in a loop.
+
+    `prefetch-min-insn-to-mem-ratio'
+          The minimum ratio between the number of instructions and the
+          number of memory references to enable prefetching in a loop.
+
+    `use-canonical-types'
+          Whether the compiler should use the "canonical" type system.
+          By default, this should always be 1, which uses a more
+          efficient internal mechanism for comparing types in C++ and
+          Objective-C++.  However, if bugs in the canonical type system
+          are causing compilation failures, set this value to 0 to
+          disable canonical types.
+
+    `switch-conversion-max-branch-ratio'
+          Switch initialization conversion will refuse to create arrays
+          that are bigger than `switch-conversion-max-branch-ratio'
+          times the number of branches in the switch.
+
+    `max-partial-antic-length'
+          Maximum length of the partial antic set computed during the
+          tree partial redundancy elimination optimization
+          (`-ftree-pre') when optimizing at `-O3' and above.  For some
+          sorts of source code the enhanced partial redundancy
+          elimination optimization can run away, consuming all of the
+          memory available on the host machine.  This parameter sets a
+          limit on the length of the sets that are computed, which
+          prevents the runaway behavior.  Setting a value of 0 for this
+          parameter will allow an unlimited set length.
+
+    `sccvn-max-scc-size'
+          Maximum size of a strongly connected component (SCC) during
+          SCCVN processing.  If this limit is hit, SCCVN processing for
+          the whole function will not be done and optimizations
+          depending on it will be disabled.  The default maximum SCC
+          size is 10000.
+
+    `ira-max-loops-num'
+          IRA uses a regional register allocation by default.  If a
+          function contains loops more than number given by the
+          parameter, only at most given number of the most frequently
+          executed loops will form regions for the regional register
+          allocation.  The default value of the parameter is 100.
+
+    `ira-max-conflict-table-size'
+          Although IRA uses a sophisticated algorithm of compression
+          conflict table, the table can be still big for huge
+          functions.  If the conflict table for a function could be
+          more than size in MB given by the parameter, the conflict
+          table is not built and faster, simpler, and lower quality
+          register allocation algorithm will be used.  The algorithm do
+          not use pseudo-register conflicts.  The default value of the
+          parameter is 2000.
+
+    `ira-loop-reserved-regs'
+          IRA can be used to evaluate more accurate register pressure
+          in loops for decision to move loop invariants (see `-O3').
+          The number of available registers reserved for some other
+          purposes is described by this parameter.  The default value
+          of the parameter is 2 which is minimal number of registers
+          needed for execution of typical instruction.  This value is
+          the best found from numerous experiments.
+
+    `loop-invariant-max-bbs-in-loop'
+          Loop invariant motion can be very expensive, both in compile
+          time and in amount of needed compile time memory, with very
+          large loops.  Loops with more basic blocks than this
+          parameter won't have loop invariant motion optimization
+          performed on them.  The default value of the parameter is
+          1000 for -O1 and 10000 for -O2 and above.
+
+    `max-vartrack-size'
+          Sets a maximum number of hash table slots to use during
+          variable tracking dataflow analysis of any function.  If this
+          limit is exceeded with variable tracking at assignments
+          enabled, analysis for that function is retried without it,
+          after removing all debug insns from the function.  If the
+          limit is exceeded even without debug insns, var tracking
+          analysis is completely disabled for the function.  Setting
+          the parameter to zero makes it unlimited.
+
+    `min-nondebug-insn-uid'
+          Use uids starting at this parameter for nondebug insns.  The
+          range below the parameter is reserved exclusively for debug
+          insns created by `-fvar-tracking-assignments', but debug
+          insns may get (non-overlapping) uids above it if the reserved
+          range is exhausted.
+
+    `ipa-sra-ptr-growth-factor'
+          IPA-SRA will replace a pointer to an aggregate with one or
+          more new parameters only when their cumulative size is less
+          or equal to `ipa-sra-ptr-growth-factor' times the size of the
+          original pointer parameter.
+
+    `graphite-max-nb-scop-params'
+          To avoid exponential effects in the Graphite loop transforms,
+          the number of parameters in a Static Control Part (SCoP) is
+          bounded.  The default value is 10 parameters.  A variable
+          whose value is unknown at compile time and defined outside a
+          SCoP is a parameter of the SCoP.
+
+    `graphite-max-bbs-per-function'
+          To avoid exponential effects in the detection of SCoPs, the
+          size of the functions analyzed by Graphite is bounded.  The
+          default value is 100 basic blocks.
+
+    `loop-block-tile-size'
+          Loop blocking or strip mining transforms, enabled with
+          `-floop-block' or `-floop-strip-mine', strip mine each loop
+          in the loop nest by a given number of iterations.  The strip
+          length can be changed using the `loop-block-tile-size'
+          parameter.  The default value is 51 iterations.
+
+    `devirt-type-list-size'
+          IPA-CP attempts to track all possible types passed to a
+          function's parameter in order to perform devirtualization.
+          `devirt-type-list-size' is the maximum number of types it
+          stores per a single formal parameter of a function.
+
+    `lto-partitions'
+          Specify desired number of partitions produced during WHOPR
+          compilation.  The number of partitions should exceed the
+          number of CPUs used for compilation.  The default value is 32.
+
+    `lto-minpartition'
+          Size of minimal partition for WHOPR (in estimated
+          instructions).  This prevents expenses of splitting very
+          small programs into too many partitions.
+
+    `cxx-max-namespaces-for-diagnostic-help'
+          The maximum number of namespaces to consult for suggestions
+          when C++ name lookup fails for an identifier.  The default is
+          1000.
+
+
+
+File: gcc.info,  Node: Preprocessor Options,  Next: Assembler Options,  Prev: Optimize Options,  Up: Invoking GCC
+
+3.11 Options Controlling the Preprocessor
+=========================================
+
+These options control the C preprocessor, which is run on each C source
+file before actual compilation.
+
+ If you use the `-E' option, nothing is done except preprocessing.
+Some of these options make sense only together with `-E' because they
+cause the preprocessor output to be unsuitable for actual compilation.
+
+`-Wp,OPTION'
+     You can use `-Wp,OPTION' to bypass the compiler driver and pass
+     OPTION directly through to the preprocessor.  If OPTION contains
+     commas, it is split into multiple options at the commas.  However,
+     many options are modified, translated or interpreted by the
+     compiler driver before being passed to the preprocessor, and `-Wp'
+     forcibly bypasses this phase.  The preprocessor's direct interface
+     is undocumented and subject to change, so whenever possible you
+     should avoid using `-Wp' and let the driver handle the options
+     instead.
+
+`-Xpreprocessor OPTION'
+     Pass OPTION as an option to the preprocessor.  You can use this to
+     supply system-specific preprocessor options which GCC does not
+     know how to recognize.
+
+     If you want to pass an option that takes an argument, you must use
+     `-Xpreprocessor' twice, once for the option and once for the
+     argument.
+
+`-D NAME'
+     Predefine NAME as a macro, with definition `1'.
+
+`-D NAME=DEFINITION'
+     The contents of DEFINITION are tokenized and processed as if they
+     appeared during translation phase three in a `#define' directive.
+     In particular, the definition will be truncated by embedded
+     newline characters.
+
+     If you are invoking the preprocessor from a shell or shell-like
+     program you may need to use the shell's quoting syntax to protect
+     characters such as spaces that have a meaning in the shell syntax.
+
+     If you wish to define a function-like macro on the command line,
+     write its argument list with surrounding parentheses before the
+     equals sign (if any).  Parentheses are meaningful to most shells,
+     so you will need to quote the option.  With `sh' and `csh',
+     `-D'NAME(ARGS...)=DEFINITION'' works.
+
+     `-D' and `-U' options are processed in the order they are given on
+     the command line.  All `-imacros FILE' and `-include FILE' options
+     are processed after all `-D' and `-U' options.
+
+`-U NAME'
+     Cancel any previous definition of NAME, either built in or
+     provided with a `-D' option.
+
+`-undef'
+     Do not predefine any system-specific or GCC-specific macros.  The
+     standard predefined macros remain defined.
+
+`-I DIR'
+     Add the directory DIR to the list of directories to be searched
+     for header files.  Directories named by `-I' are searched before
+     the standard system include directories.  If the directory DIR is
+     a standard system include directory, the option is ignored to
+     ensure that the default search order for system directories and
+     the special treatment of system headers are not defeated .  If DIR
+     begins with `=', then the `=' will be replaced by the sysroot
+     prefix; see `--sysroot' and `-isysroot'.
+
+`-o FILE'
+     Write output to FILE.  This is the same as specifying FILE as the
+     second non-option argument to `cpp'.  `gcc' has a different
+     interpretation of a second non-option argument, so you must use
+     `-o' to specify the output file.
+
+`-Wall'
+     Turns on all optional warnings which are desirable for normal code.
+     At present this is `-Wcomment', `-Wtrigraphs', `-Wmultichar' and a
+     warning about integer promotion causing a change of sign in `#if'
+     expressions.  Note that many of the preprocessor's warnings are on
+     by default and have no options to control them.
+
+`-Wcomment'
+`-Wcomments'
+     Warn whenever a comment-start sequence `/*' appears in a `/*'
+     comment, or whenever a backslash-newline appears in a `//' comment.
+     (Both forms have the same effect.)
+
+`-Wtrigraphs'
+     Most trigraphs in comments cannot affect the meaning of the
+     program.  However, a trigraph that would form an escaped newline
+     (`??/' at the end of a line) can, by changing where the comment
+     begins or ends.  Therefore, only trigraphs that would form escaped
+     newlines produce warnings inside a comment.
+
+     This option is implied by `-Wall'.  If `-Wall' is not given, this
+     option is still enabled unless trigraphs are enabled.  To get
+     trigraph conversion without warnings, but get the other `-Wall'
+     warnings, use `-trigraphs -Wall -Wno-trigraphs'.
+
+`-Wtraditional'
+     Warn about certain constructs that behave differently in
+     traditional and ISO C.  Also warn about ISO C constructs that have
+     no traditional C equivalent, and problematic constructs which
+     should be avoided.
+
+`-Wundef'
+     Warn whenever an identifier which is not a macro is encountered in
+     an `#if' directive, outside of `defined'.  Such identifiers are
+     replaced with zero.
+
+`-Wunused-macros'
+     Warn about macros defined in the main file that are unused.  A
+     macro is "used" if it is expanded or tested for existence at least
+     once.  The preprocessor will also warn if the macro has not been
+     used at the time it is redefined or undefined.
+
+     Built-in macros, macros defined on the command line, and macros
+     defined in include files are not warned about.
+
+     _Note:_ If a macro is actually used, but only used in skipped
+     conditional blocks, then CPP will report it as unused.  To avoid
+     the warning in such a case, you might improve the scope of the
+     macro's definition by, for example, moving it into the first
+     skipped block.  Alternatively, you could provide a dummy use with
+     something like:
+
+          #if defined the_macro_causing_the_warning
+          #endif
+
+`-Wendif-labels'
+     Warn whenever an `#else' or an `#endif' are followed by text.
+     This usually happens in code of the form
+
+          #if FOO
+          ...
+          #else FOO
+          ...
+          #endif FOO
+
+     The second and third `FOO' should be in comments, but often are not
+     in older programs.  This warning is on by default.
+
+`-Werror'
+     Make all warnings into hard errors.  Source code which triggers
+     warnings will be rejected.
+
+`-Wsystem-headers'
+     Issue warnings for code in system headers.  These are normally
+     unhelpful in finding bugs in your own code, therefore suppressed.
+     If you are responsible for the system library, you may want to see
+     them.
+
+`-w'
+     Suppress all warnings, including those which GNU CPP issues by
+     default.
+
+`-pedantic'
+     Issue all the mandatory diagnostics listed in the C standard.
+     Some of them are left out by default, since they trigger
+     frequently on harmless code.
+
+`-pedantic-errors'
+     Issue all the mandatory diagnostics, and make all mandatory
+     diagnostics into errors.  This includes mandatory diagnostics that
+     GCC issues without `-pedantic' but treats as warnings.
+
+`-M'
+     Instead of outputting the result of preprocessing, output a rule
+     suitable for `make' describing the dependencies of the main source
+     file.  The preprocessor outputs one `make' rule containing the
+     object file name for that source file, a colon, and the names of
+     all the included files, including those coming from `-include' or
+     `-imacros' command line options.
+
+     Unless specified explicitly (with `-MT' or `-MQ'), the object file
+     name consists of the name of the source file with any suffix
+     replaced with object file suffix and with any leading directory
+     parts removed.  If there are many included files then the rule is
+     split into several lines using `\'-newline.  The rule has no
+     commands.
+
+     This option does not suppress the preprocessor's debug output,
+     such as `-dM'.  To avoid mixing such debug output with the
+     dependency rules you should explicitly specify the dependency
+     output file with `-MF', or use an environment variable like
+     `DEPENDENCIES_OUTPUT' (*note Environment Variables::).  Debug
+     output will still be sent to the regular output stream as normal.
+
+     Passing `-M' to the driver implies `-E', and suppresses warnings
+     with an implicit `-w'.
+
+`-MM'
+     Like `-M' but do not mention header files that are found in system
+     header directories, nor header files that are included, directly
+     or indirectly, from such a header.
+
+     This implies that the choice of angle brackets or double quotes in
+     an `#include' directive does not in itself determine whether that
+     header will appear in `-MM' dependency output.  This is a slight
+     change in semantics from GCC versions 3.0 and earlier.
+
+`-MF FILE'
+     When used with `-M' or `-MM', specifies a file to write the
+     dependencies to.  If no `-MF' switch is given the preprocessor
+     sends the rules to the same place it would have sent preprocessed
+     output.
+
+     When used with the driver options `-MD' or `-MMD', `-MF' overrides
+     the default dependency output file.
+
+`-MG'
+     In conjunction with an option such as `-M' requesting dependency
+     generation, `-MG' assumes missing header files are generated files
+     and adds them to the dependency list without raising an error.
+     The dependency filename is taken directly from the `#include'
+     directive without prepending any path.  `-MG' also suppresses
+     preprocessed output, as a missing header file renders this useless.
+
+     This feature is used in automatic updating of makefiles.
+
+`-MP'
+     This option instructs CPP to add a phony target for each dependency
+     other than the main file, causing each to depend on nothing.  These
+     dummy rules work around errors `make' gives if you remove header
+     files without updating the `Makefile' to match.
+
+     This is typical output:
+
+          test.o: test.c test.h
+
+          test.h:
+
+`-MT TARGET'
+     Change the target of the rule emitted by dependency generation.  By
+     default CPP takes the name of the main input file, deletes any
+     directory components and any file suffix such as `.c', and appends
+     the platform's usual object suffix.  The result is the target.
+
+     An `-MT' option will set the target to be exactly the string you
+     specify.  If you want multiple targets, you can specify them as a
+     single argument to `-MT', or use multiple `-MT' options.
+
+     For example, `-MT '$(objpfx)foo.o'' might give
+
+          $(objpfx)foo.o: foo.c
+
+`-MQ TARGET'
+     Same as `-MT', but it quotes any characters which are special to
+     Make.  `-MQ '$(objpfx)foo.o'' gives
+
+          $$(objpfx)foo.o: foo.c
+
+     The default target is automatically quoted, as if it were given
+     with `-MQ'.
+
+`-MD'
+     `-MD' is equivalent to `-M -MF FILE', except that `-E' is not
+     implied.  The driver determines FILE based on whether an `-o'
+     option is given.  If it is, the driver uses its argument but with
+     a suffix of `.d', otherwise it takes the name of the input file,
+     removes any directory components and suffix, and applies a `.d'
+     suffix.
+
+     If `-MD' is used in conjunction with `-E', any `-o' switch is
+     understood to specify the dependency output file (*note -MF:
+     dashMF.), but if used without `-E', each `-o' is understood to
+     specify a target object file.
+
+     Since `-E' is not implied, `-MD' can be used to generate a
+     dependency output file as a side-effect of the compilation process.
+
+`-MMD'
+     Like `-MD' except mention only user header files, not system
+     header files.
+
+`-fpch-deps'
+     When using precompiled headers (*note Precompiled Headers::), this
+     flag will cause the dependency-output flags to also list the files
+     from the precompiled header's dependencies.  If not specified only
+     the precompiled header would be listed and not the files that were
+     used to create it because those files are not consulted when a
+     precompiled header is used.
+
+`-fpch-preprocess'
+     This option allows use of a precompiled header (*note Precompiled
+     Headers::) together with `-E'.  It inserts a special `#pragma',
+     `#pragma GCC pch_preprocess "FILENAME"' in the output to mark the
+     place where the precompiled header was found, and its FILENAME.
+     When `-fpreprocessed' is in use, GCC recognizes this `#pragma' and
+     loads the PCH.
+
+     This option is off by default, because the resulting preprocessed
+     output is only really suitable as input to GCC.  It is switched on
+     by `-save-temps'.
+
+     You should not write this `#pragma' in your own code, but it is
+     safe to edit the filename if the PCH file is available in a
+     different location.  The filename may be absolute or it may be
+     relative to GCC's current directory.
+
+`-x c'
+`-x c++'
+`-x objective-c'
+`-x assembler-with-cpp'
+     Specify the source language: C, C++, Objective-C, or assembly.
+     This has nothing to do with standards conformance or extensions;
+     it merely selects which base syntax to expect.  If you give none
+     of these options, cpp will deduce the language from the extension
+     of the source file: `.c', `.cc', `.m', or `.S'.  Some other common
+     extensions for C++ and assembly are also recognized.  If cpp does
+     not recognize the extension, it will treat the file as C; this is
+     the most generic mode.
+
+     _Note:_ Previous versions of cpp accepted a `-lang' option which
+     selected both the language and the standards conformance level.
+     This option has been removed, because it conflicts with the `-l'
+     option.
+
+`-std=STANDARD'
+`-ansi'
+     Specify the standard to which the code should conform.  Currently
+     CPP knows about C and C++ standards; others may be added in the
+     future.
+
+     STANDARD may be one of:
+    `c90'
+    `c89'
+    `iso9899:1990'
+          The ISO C standard from 1990.  `c90' is the customary
+          shorthand for this version of the standard.
+
+          The `-ansi' option is equivalent to `-std=c90'.
+
+    `iso9899:199409'
+          The 1990 C standard, as amended in 1994.
+
+    `iso9899:1999'
+    `c99'
+    `iso9899:199x'
+    `c9x'
+          The revised ISO C standard, published in December 1999.
+          Before publication, this was known as C9X.
+
+    `c1x'
+          The next version of the ISO C standard, still under
+          development.
+
+    `gnu90'
+    `gnu89'
+          The 1990 C standard plus GNU extensions.  This is the default.
+
+    `gnu99'
+    `gnu9x'
+          The 1999 C standard plus GNU extensions.
+
+    `gnu1x'
+          The next version of the ISO C standard, still under
+          development, plus GNU extensions.
+
+    `c++98'
+          The 1998 ISO C++ standard plus amendments.
+
+    `gnu++98'
+          The same as `-std=c++98' plus GNU extensions.  This is the
+          default for C++ code.
+
+`-I-'
+     Split the include path.  Any directories specified with `-I'
+     options before `-I-' are searched only for headers requested with
+     `#include "FILE"'; they are not searched for `#include <FILE>'.
+     If additional directories are specified with `-I' options after
+     the `-I-', those directories are searched for all `#include'
+     directives.
+
+     In addition, `-I-' inhibits the use of the directory of the current
+     file directory as the first search directory for `#include "FILE"'.
+     This option has been deprecated.
+
+`-nostdinc'
+     Do not search the standard system directories for header files.
+     Only the directories you have specified with `-I' options (and the
+     directory of the current file, if appropriate) are searched.
+
+`-nostdinc++'
+     Do not search for header files in the C++-specific standard
+     directories, but do still search the other standard directories.
+     (This option is used when building the C++ library.)
+
+`-include FILE'
+     Process FILE as if `#include "file"' appeared as the first line of
+     the primary source file.  However, the first directory searched
+     for FILE is the preprocessor's working directory _instead of_ the
+     directory containing the main source file.  If not found there, it
+     is searched for in the remainder of the `#include "..."' search
+     chain as normal.
+
+     If multiple `-include' options are given, the files are included
+     in the order they appear on the command line.
+
+`-imacros FILE'
+     Exactly like `-include', except that any output produced by
+     scanning FILE is thrown away.  Macros it defines remain defined.
+     This allows you to acquire all the macros from a header without
+     also processing its declarations.
+
+     All files specified by `-imacros' are processed before all files
+     specified by `-include'.
+
+`-idirafter DIR'
+     Search DIR for header files, but do it _after_ all directories
+     specified with `-I' and the standard system directories have been
+     exhausted.  DIR is treated as a system include directory.  If DIR
+     begins with `=', then the `=' will be replaced by the sysroot
+     prefix; see `--sysroot' and `-isysroot'.
+
+`-iprefix PREFIX'
+     Specify PREFIX as the prefix for subsequent `-iwithprefix'
+     options.  If the prefix represents a directory, you should include
+     the final `/'.
+
+`-iwithprefix DIR'
+`-iwithprefixbefore DIR'
+     Append DIR to the prefix specified previously with `-iprefix', and
+     add the resulting directory to the include search path.
+     `-iwithprefixbefore' puts it in the same place `-I' would;
+     `-iwithprefix' puts it where `-idirafter' would.
+
+`-isysroot DIR'
+     This option is like the `--sysroot' option, but applies only to
+     header files (except for Darwin targets, where it applies to both
+     header files and libraries).  See the `--sysroot' option for more
+     information.
+
+`-imultilib DIR'
+     Use DIR as a subdirectory of the directory containing
+     target-specific C++ headers.
+
+`-isystem DIR'
+     Search DIR for header files, after all directories specified by
+     `-I' but before the standard system directories.  Mark it as a
+     system directory, so that it gets the same special treatment as is
+     applied to the standard system directories.  If DIR begins with
+     `=', then the `=' will be replaced by the sysroot prefix; see
+     `--sysroot' and `-isysroot'.
+
+`-iquote DIR'
+     Search DIR only for header files requested with `#include "FILE"';
+     they are not searched for `#include <FILE>', before all
+     directories specified by `-I' and before the standard system
+     directories.  If DIR begins with `=', then the `=' will be replaced
+     by the sysroot prefix; see `--sysroot' and `-isysroot'.
+
+`-fdirectives-only'
+     When preprocessing, handle directives, but do not expand macros.
+
+     The option's behavior depends on the `-E' and `-fpreprocessed'
+     options.
+
+     With `-E', preprocessing is limited to the handling of directives
+     such as `#define', `#ifdef', and `#error'.  Other preprocessor
+     operations, such as macro expansion and trigraph conversion are
+     not performed.  In addition, the `-dD' option is implicitly
+     enabled.
+
+     With `-fpreprocessed', predefinition of command line and most
+     builtin macros is disabled.  Macros such as `__LINE__', which are
+     contextually dependent, are handled normally.  This enables
+     compilation of files previously preprocessed with `-E
+     -fdirectives-only'.
+
+     With both `-E' and `-fpreprocessed', the rules for
+     `-fpreprocessed' take precedence.  This enables full preprocessing
+     of files previously preprocessed with `-E -fdirectives-only'.
+
+`-fdollars-in-identifiers'
+     Accept `$' in identifiers.
+
+`-fextended-identifiers'
+     Accept universal character names in identifiers.  This option is
+     experimental; in a future version of GCC, it will be enabled by
+     default for C99 and C++.
+
+`-fpreprocessed'
+     Indicate to the preprocessor that the input file has already been
+     preprocessed.  This suppresses things like macro expansion,
+     trigraph conversion, escaped newline splicing, and processing of
+     most directives.  The preprocessor still recognizes and removes
+     comments, so that you can pass a file preprocessed with `-C' to
+     the compiler without problems.  In this mode the integrated
+     preprocessor is little more than a tokenizer for the front ends.
+
+     `-fpreprocessed' is implicit if the input file has one of the
+     extensions `.i', `.ii' or `.mi'.  These are the extensions that
+     GCC uses for preprocessed files created by `-save-temps'.
+
+`-ftabstop=WIDTH'
+     Set the distance between tab stops.  This helps the preprocessor
+     report correct column numbers in warnings or errors, even if tabs
+     appear on the line.  If the value is less than 1 or greater than
+     100, the option is ignored.  The default is 8.
+
+`-fexec-charset=CHARSET'
+     Set the execution character set, used for string and character
+     constants.  The default is UTF-8.  CHARSET can be any encoding
+     supported by the system's `iconv' library routine.
+
+`-fwide-exec-charset=CHARSET'
+     Set the wide execution character set, used for wide string and
+     character constants.  The default is UTF-32 or UTF-16, whichever
+     corresponds to the width of `wchar_t'.  As with `-fexec-charset',
+     CHARSET can be any encoding supported by the system's `iconv'
+     library routine; however, you will have problems with encodings
+     that do not fit exactly in `wchar_t'.
+
+`-finput-charset=CHARSET'
+     Set the input character set, used for translation from the
+     character set of the input file to the source character set used
+     by GCC.  If the locale does not specify, or GCC cannot get this
+     information from the locale, the default is UTF-8.  This can be
+     overridden by either the locale or this command line option.
+     Currently the command line option takes precedence if there's a
+     conflict.  CHARSET can be any encoding supported by the system's
+     `iconv' library routine.
+
+`-fworking-directory'
+     Enable generation of linemarkers in the preprocessor output that
+     will let the compiler know the current working directory at the
+     time of preprocessing.  When this option is enabled, the
+     preprocessor will emit, after the initial linemarker, a second
+     linemarker with the current working directory followed by two
+     slashes.  GCC will use this directory, when it's present in the
+     preprocessed input, as the directory emitted as the current
+     working directory in some debugging information formats.  This
+     option is implicitly enabled if debugging information is enabled,
+     but this can be inhibited with the negated form
+     `-fno-working-directory'.  If the `-P' flag is present in the
+     command line, this option has no effect, since no `#line'
+     directives are emitted whatsoever.
+
+`-fno-show-column'
+     Do not print column numbers in diagnostics.  This may be necessary
+     if diagnostics are being scanned by a program that does not
+     understand the column numbers, such as `dejagnu'.
+
+`-A PREDICATE=ANSWER'
+     Make an assertion with the predicate PREDICATE and answer ANSWER.
+     This form is preferred to the older form `-A PREDICATE(ANSWER)',
+     which is still supported, because it does not use shell special
+     characters.
+
+`-A -PREDICATE=ANSWER'
+     Cancel an assertion with the predicate PREDICATE and answer ANSWER.
+
+`-dCHARS'
+     CHARS is a sequence of one or more of the following characters,
+     and must not be preceded by a space.  Other characters are
+     interpreted by the compiler proper, or reserved for future
+     versions of GCC, and so are silently ignored.  If you specify
+     characters whose behavior conflicts, the result is undefined.
+
+    `M'
+          Instead of the normal output, generate a list of `#define'
+          directives for all the macros defined during the execution of
+          the preprocessor, including predefined macros.  This gives
+          you a way of finding out what is predefined in your version
+          of the preprocessor.  Assuming you have no file `foo.h', the
+          command
+
+               touch foo.h; cpp -dM foo.h
+
+          will show all the predefined macros.
+
+          If you use `-dM' without the `-E' option, `-dM' is
+          interpreted as a synonym for `-fdump-rtl-mach'.  *Note
+          Debugging Options: (gcc)Debugging Options.
+
+    `D'
+          Like `M' except in two respects: it does _not_ include the
+          predefined macros, and it outputs _both_ the `#define'
+          directives and the result of preprocessing.  Both kinds of
+          output go to the standard output file.
+
+    `N'
+          Like `D', but emit only the macro names, not their expansions.
+
+    `I'
+          Output `#include' directives in addition to the result of
+          preprocessing.
+
+    `U'
+          Like `D' except that only macros that are expanded, or whose
+          definedness is tested in preprocessor directives, are output;
+          the output is delayed until the use or test of the macro; and
+          `#undef' directives are also output for macros tested but
+          undefined at the time.
+
+`-P'
+     Inhibit generation of linemarkers in the output from the
+     preprocessor.  This might be useful when running the preprocessor
+     on something that is not C code, and will be sent to a program
+     which might be confused by the linemarkers.
+
+`-C'
+     Do not discard comments.  All comments are passed through to the
+     output file, except for comments in processed directives, which
+     are deleted along with the directive.
+
+     You should be prepared for side effects when using `-C'; it causes
+     the preprocessor to treat comments as tokens in their own right.
+     For example, comments appearing at the start of what would be a
+     directive line have the effect of turning that line into an
+     ordinary source line, since the first token on the line is no
+     longer a `#'.
+
+`-CC'
+     Do not discard comments, including during macro expansion.  This is
+     like `-C', except that comments contained within macros are also
+     passed through to the output file where the macro is expanded.
+
+     In addition to the side-effects of the `-C' option, the `-CC'
+     option causes all C++-style comments inside a macro to be
+     converted to C-style comments.  This is to prevent later use of
+     that macro from inadvertently commenting out the remainder of the
+     source line.
+
+     The `-CC' option is generally used to support lint comments.
+
+`-traditional-cpp'
+     Try to imitate the behavior of old-fashioned C preprocessors, as
+     opposed to ISO C preprocessors.
+
+`-trigraphs'
+     Process trigraph sequences.  These are three-character sequences,
+     all starting with `??', that are defined by ISO C to stand for
+     single characters.  For example, `??/' stands for `\', so `'??/n''
+     is a character constant for a newline.  By default, GCC ignores
+     trigraphs, but in standard-conforming modes it converts them.  See
+     the `-std' and `-ansi' options.
+
+     The nine trigraphs and their replacements are
+
+          Trigraph:       ??(  ??)  ??<  ??>  ??=  ??/  ??'  ??!  ??-
+          Replacement:      [    ]    {    }    #    \    ^    |    ~
+
+`-remap'
+     Enable special code to work around file systems which only permit
+     very short file names, such as MS-DOS.
+
+`--help'
+`--target-help'
+     Print text describing all the command line options instead of
+     preprocessing anything.
+
+`-v'
+     Verbose mode.  Print out GNU CPP's version number at the beginning
+     of execution, and report the final form of the include path.
+
+`-H'
+     Print the name of each header file used, in addition to other
+     normal activities.  Each name is indented to show how deep in the
+     `#include' stack it is.  Precompiled header files are also
+     printed, even if they are found to be invalid; an invalid
+     precompiled header file is printed with `...x' and a valid one
+     with `...!' .
+
+`-version'
+`--version'
+     Print out GNU CPP's version number.  With one dash, proceed to
+     preprocess as normal.  With two dashes, exit immediately.
+
+
+File: gcc.info,  Node: Assembler Options,  Next: Link Options,  Prev: Preprocessor Options,  Up: Invoking GCC
+
+3.12 Passing Options to the Assembler
+=====================================
+
+You can pass options to the assembler.
+
+`-Wa,OPTION'
+     Pass OPTION as an option to the assembler.  If OPTION contains
+     commas, it is split into multiple options at the commas.
+
+`-Xassembler OPTION'
+     Pass OPTION as an option to the assembler.  You can use this to
+     supply system-specific assembler options which GCC does not know
+     how to recognize.
+
+     If you want to pass an option that takes an argument, you must use
+     `-Xassembler' twice, once for the option and once for the argument.
+
+
+
+File: gcc.info,  Node: Link Options,  Next: Directory Options,  Prev: Assembler Options,  Up: Invoking GCC
+
+3.13 Options for Linking
+========================
+
+These options come into play when the compiler links object files into
+an executable output file.  They are meaningless if the compiler is not
+doing a link step.
+
+`OBJECT-FILE-NAME'
+     A file name that does not end in a special recognized suffix is
+     considered to name an object file or library.  (Object files are
+     distinguished from libraries by the linker according to the file
+     contents.)  If linking is done, these object files are used as
+     input to the linker.
+
+`-c'
+`-S'
+`-E'
+     If any of these options is used, then the linker is not run, and
+     object file names should not be used as arguments.  *Note Overall
+     Options::.
+
+`-lLIBRARY'
+`-l LIBRARY'
+     Search the library named LIBRARY when linking.  (The second
+     alternative with the library as a separate argument is only for
+     POSIX compliance and is not recommended.)
+
+     It makes a difference where in the command you write this option;
+     the linker searches and processes libraries and object files in
+     the order they are specified.  Thus, `foo.o -lz bar.o' searches
+     library `z' after file `foo.o' but before `bar.o'.  If `bar.o'
+     refers to functions in `z', those functions may not be loaded.
+
+     The linker searches a standard list of directories for the library,
+     which is actually a file named `libLIBRARY.a'.  The linker then
+     uses this file as if it had been specified precisely by name.
+
+     The directories searched include several standard system
+     directories plus any that you specify with `-L'.
+
+     Normally the files found this way are library files--archive files
+     whose members are object files.  The linker handles an archive
+     file by scanning through it for members which define symbols that
+     have so far been referenced but not defined.  But if the file that
+     is found is an ordinary object file, it is linked in the usual
+     fashion.  The only difference between using an `-l' option and
+     specifying a file name is that `-l' surrounds LIBRARY with `lib'
+     and `.a' and searches several directories.
+
+`-lobjc'
+     You need this special case of the `-l' option in order to link an
+     Objective-C or Objective-C++ program.
+
+`-nostartfiles'
+     Do not use the standard system startup files when linking.  The
+     standard system libraries are used normally, unless `-nostdlib' or
+     `-nodefaultlibs' is used.
+
+`-nodefaultlibs'
+     Do not use the standard system libraries when linking.  Only the
+     libraries you specify will be passed to the linker, options
+     specifying linkage of the system libraries, such as
+     `-static-libgcc' or `-shared-libgcc', will be ignored.  The
+     standard startup files are used normally, unless `-nostartfiles'
+     is used.  The compiler may generate calls to `memcmp', `memset',
+     `memcpy' and `memmove'.  These entries are usually resolved by
+     entries in libc.  These entry points should be supplied through
+     some other mechanism when this option is specified.
+
+`-nostdlib'
+     Do not use the standard system startup files or libraries when
+     linking.  No startup files and only the libraries you specify will
+     be passed to the linker, options specifying linkage of the system
+     libraries, such as `-static-libgcc' or `-shared-libgcc', will be
+     ignored.  The compiler may generate calls to `memcmp', `memset',
+     `memcpy' and `memmove'.  These entries are usually resolved by
+     entries in libc.  These entry points should be supplied through
+     some other mechanism when this option is specified.
+
+     One of the standard libraries bypassed by `-nostdlib' and
+     `-nodefaultlibs' is `libgcc.a', a library of internal subroutines
+     that GCC uses to overcome shortcomings of particular machines, or
+     special needs for some languages.  (*Note Interfacing to GCC
+     Output: (gccint)Interface, for more discussion of `libgcc.a'.)  In
+     most cases, you need `libgcc.a' even when you want to avoid other
+     standard libraries.  In other words, when you specify `-nostdlib'
+     or `-nodefaultlibs' you should usually specify `-lgcc' as well.
+     This ensures that you have no unresolved references to internal GCC
+     library subroutines.  (For example, `__main', used to ensure C++
+     constructors will be called; *note `collect2': (gccint)Collect2.)
+
+`-pie'
+     Produce a position independent executable on targets which support
+     it.  For predictable results, you must also specify the same set
+     of options that were used to generate code (`-fpie', `-fPIE', or
+     model suboptions) when you specify this option.
+
+`-rdynamic'
+     Pass the flag `-export-dynamic' to the ELF linker, on targets that
+     support it. This instructs the linker to add all symbols, not only
+     used ones, to the dynamic symbol table. This option is needed for
+     some uses of `dlopen' or to allow obtaining backtraces from within
+     a program.
+
+`-s'
+     Remove all symbol table and relocation information from the
+     executable.
+
+`-static'
+     On systems that support dynamic linking, this prevents linking
+     with the shared libraries.  On other systems, this option has no
+     effect.
+
+`-shared'
+     Produce a shared object which can then be linked with other
+     objects to form an executable.  Not all systems support this
+     option.  For predictable results, you must also specify the same
+     set of options that were used to generate code (`-fpic', `-fPIC',
+     or model suboptions) when you specify this option.(1)
+
+`-shared-libgcc'
+`-static-libgcc'
+     On systems that provide `libgcc' as a shared library, these options
+     force the use of either the shared or static version respectively.
+     If no shared version of `libgcc' was built when the compiler was
+     configured, these options have no effect.
+
+     There are several situations in which an application should use the
+     shared `libgcc' instead of the static version.  The most common of
+     these is when the application wishes to throw and catch exceptions
+     across different shared libraries.  In that case, each of the
+     libraries as well as the application itself should use the shared
+     `libgcc'.
+
+     Therefore, the G++ and GCJ drivers automatically add
+     `-shared-libgcc' whenever you build a shared library or a main
+     executable, because C++ and Java programs typically use
+     exceptions, so this is the right thing to do.
+
+     If, instead, you use the GCC driver to create shared libraries,
+     you may find that they will not always be linked with the shared
+     `libgcc'.  If GCC finds, at its configuration time, that you have
+     a non-GNU linker or a GNU linker that does not support option
+     `--eh-frame-hdr', it will link the shared version of `libgcc' into
+     shared libraries by default.  Otherwise, it will take advantage of
+     the linker and optimize away the linking with the shared version
+     of `libgcc', linking with the static version of libgcc by default.
+     This allows exceptions to propagate through such shared libraries,
+     without incurring relocation costs at library load time.
+
+     However, if a library or main executable is supposed to throw or
+     catch exceptions, you must link it using the G++ or GCJ driver, as
+     appropriate for the languages used in the program, or using the
+     option `-shared-libgcc', such that it is linked with the shared
+     `libgcc'.
+
+`-static-libstdc++'
+     When the `g++' program is used to link a C++ program, it will
+     normally automatically link against `libstdc++'.  If `libstdc++'
+     is available as a shared library, and the `-static' option is not
+     used, then this will link against the shared version of
+     `libstdc++'.  That is normally fine.  However, it is sometimes
+     useful to freeze the version of `libstdc++' used by the program
+     without going all the way to a fully static link.  The
+     `-static-libstdc++' option directs the `g++' driver to link
+     `libstdc++' statically, without necessarily linking other
+     libraries statically.
+
+`-symbolic'
+     Bind references to global symbols when building a shared object.
+     Warn about any unresolved references (unless overridden by the
+     link editor option `-Xlinker -z -Xlinker defs').  Only a few
+     systems support this option.
+
+`-T SCRIPT'
+     Use SCRIPT as the linker script.  This option is supported by most
+     systems using the GNU linker.  On some targets, such as bare-board
+     targets without an operating system, the `-T' option may be
+     required when linking to avoid references to undefined symbols.
+
+`-Xlinker OPTION'
+     Pass OPTION as an option to the linker.  You can use this to
+     supply system-specific linker options which GCC does not know how
+     to recognize.
+
+     If you want to pass an option that takes a separate argument, you
+     must use `-Xlinker' twice, once for the option and once for the
+     argument.  For example, to pass `-assert definitions', you must
+     write `-Xlinker -assert -Xlinker definitions'.  It does not work
+     to write `-Xlinker "-assert definitions"', because this passes the
+     entire string as a single argument, which is not what the linker
+     expects.
+
+     When using the GNU linker, it is usually more convenient to pass
+     arguments to linker options using the `OPTION=VALUE' syntax than
+     as separate arguments.  For example, you can specify `-Xlinker
+     -Map=output.map' rather than `-Xlinker -Map -Xlinker output.map'.
+     Other linkers may not support this syntax for command-line options.
+
+`-Wl,OPTION'
+     Pass OPTION as an option to the linker.  If OPTION contains
+     commas, it is split into multiple options at the commas.  You can
+     use this syntax to pass an argument to the option.  For example,
+     `-Wl,-Map,output.map' passes `-Map output.map' to the linker.
+     When using the GNU linker, you can also get the same effect with
+     `-Wl,-Map=output.map'.
+
+`-u SYMBOL'
+     Pretend the symbol SYMBOL is undefined, to force linking of
+     library modules to define it.  You can use `-u' multiple times with
+     different symbols to force loading of additional library modules.
+
+ ---------- Footnotes ----------
+
+ (1) On some systems, `gcc -shared' needs to build supplementary stub
+code for constructors to work.  On multi-libbed systems, `gcc -shared'
+must select the correct support libraries to link against.  Failing to
+supply the correct flags may lead to subtle defects.  Supplying them in
+cases where they are not necessary is innocuous.
+
+
+File: gcc.info,  Node: Directory Options,  Next: Spec Files,  Prev: Link Options,  Up: Invoking GCC
+
+3.14 Options for Directory Search
+=================================
+
+These options specify directories to search for header files, for
+libraries and for parts of the compiler:
+
+`-IDIR'
+     Add the directory DIR to the head of the list of directories to be
+     searched for header files.  This can be used to override a system
+     header file, substituting your own version, since these
+     directories are searched before the system header file
+     directories.  However, you should not use this option to add
+     directories that contain vendor-supplied system header files (use
+     `-isystem' for that).  If you use more than one `-I' option, the
+     directories are scanned in left-to-right order; the standard
+     system directories come after.
+
+     If a standard system include directory, or a directory specified
+     with `-isystem', is also specified with `-I', the `-I' option will
+     be ignored.  The directory will still be searched but as a system
+     directory at its normal position in the system include chain.
+     This is to ensure that GCC's procedure to fix buggy system headers
+     and the ordering for the include_next directive are not
+     inadvertently changed.  If you really need to change the search
+     order for system directories, use the `-nostdinc' and/or
+     `-isystem' options.
+
+`-iplugindir=DIR'
+     Set the directory to search for plugins which are passed by
+     `-fplugin=NAME' instead of `-fplugin=PATH/NAME.so'.  This option
+     is not meant to be used by the user, but only passed by the driver.
+
+`-iquoteDIR'
+     Add the directory DIR to the head of the list of directories to be
+     searched for header files only for the case of `#include "FILE"';
+     they are not searched for `#include <FILE>', otherwise just like
+     `-I'.
+
+`-LDIR'
+     Add directory DIR to the list of directories to be searched for
+     `-l'.
+
+`-BPREFIX'
+     This option specifies where to find the executables, libraries,
+     include files, and data files of the compiler itself.
+
+     The compiler driver program runs one or more of the subprograms
+     `cpp', `cc1', `as' and `ld'.  It tries PREFIX as a prefix for each
+     program it tries to run, both with and without `MACHINE/VERSION/'
+     (*note Target Options::).
+
+     For each subprogram to be run, the compiler driver first tries the
+     `-B' prefix, if any.  If that name is not found, or if `-B' was
+     not specified, the driver tries two standard prefixes, which are
+     `/usr/lib/gcc/' and `/usr/local/lib/gcc/'.  If neither of those
+     results in a file name that is found, the unmodified program name
+     is searched for using the directories specified in your `PATH'
+     environment variable.
+
+     The compiler will check to see if the path provided by the `-B'
+     refers to a directory, and if necessary it will add a directory
+     separator character at the end of the path.
+
+     `-B' prefixes that effectively specify directory names also apply
+     to libraries in the linker, because the compiler translates these
+     options into `-L' options for the linker.  They also apply to
+     includes files in the preprocessor, because the compiler
+     translates these options into `-isystem' options for the
+     preprocessor.  In this case, the compiler appends `include' to the
+     prefix.
+
+     The run-time support file `libgcc.a' can also be searched for using
+     the `-B' prefix, if needed.  If it is not found there, the two
+     standard prefixes above are tried, and that is all.  The file is
+     left out of the link if it is not found by those means.
+
+     Another way to specify a prefix much like the `-B' prefix is to use
+     the environment variable `GCC_EXEC_PREFIX'.  *Note Environment
+     Variables::.
+
+     As a special kludge, if the path provided by `-B' is
+     `[dir/]stageN/', where N is a number in the range 0 to 9, then it
+     will be replaced by `[dir/]include'.  This is to help with
+     boot-strapping the compiler.
+
+`-specs=FILE'
+     Process FILE after the compiler reads in the standard `specs'
+     file, in order to override the defaults that the `gcc' driver
+     program uses when determining what switches to pass to `cc1',
+     `cc1plus', `as', `ld', etc.  More than one `-specs=FILE' can be
+     specified on the command line, and they are processed in order,
+     from left to right.
+
+`--sysroot=DIR'
+     Use DIR as the logical root directory for headers and libraries.
+     For example, if the compiler would normally search for headers in
+     `/usr/include' and libraries in `/usr/lib', it will instead search
+     `DIR/usr/include' and `DIR/usr/lib'.
+
+     If you use both this option and the `-isysroot' option, then the
+     `--sysroot' option will apply to libraries, but the `-isysroot'
+     option will apply to header files.
+
+     The GNU linker (beginning with version 2.16) has the necessary
+     support for this option.  If your linker does not support this
+     option, the header file aspect of `--sysroot' will still work, but
+     the library aspect will not.
+
+`-I-'
+     This option has been deprecated.  Please use `-iquote' instead for
+     `-I' directories before the `-I-' and remove the `-I-'.  Any
+     directories you specify with `-I' options before the `-I-' option
+     are searched only for the case of `#include "FILE"'; they are not
+     searched for `#include <FILE>'.
+
+     If additional directories are specified with `-I' options after
+     the `-I-', these directories are searched for all `#include'
+     directives.  (Ordinarily _all_ `-I' directories are used this way.)
+
+     In addition, the `-I-' option inhibits the use of the current
+     directory (where the current input file came from) as the first
+     search directory for `#include "FILE"'.  There is no way to
+     override this effect of `-I-'.  With `-I.' you can specify
+     searching the directory which was current when the compiler was
+     invoked.  That is not exactly the same as what the preprocessor
+     does by default, but it is often satisfactory.
+
+     `-I-' does not inhibit the use of the standard system directories
+     for header files.  Thus, `-I-' and `-nostdinc' are independent.
+
+
+File: gcc.info,  Node: Spec Files,  Next: Target Options,  Prev: Directory Options,  Up: Invoking GCC
+
+3.15 Specifying subprocesses and the switches to pass to them
+=============================================================
+
+`gcc' is a driver program.  It performs its job by invoking a sequence
+of other programs to do the work of compiling, assembling and linking.
+GCC interprets its command-line parameters and uses these to deduce
+which programs it should invoke, and which command-line options it
+ought to place on their command lines.  This behavior is controlled by
+"spec strings".  In most cases there is one spec string for each
+program that GCC can invoke, but a few programs have multiple spec
+strings to control their behavior.  The spec strings built into GCC can
+be overridden by using the `-specs=' command-line switch to specify a
+spec file.
+
+ "Spec files" are plaintext files that are used to construct spec
+strings.  They consist of a sequence of directives separated by blank
+lines.  The type of directive is determined by the first non-whitespace
+character on the line and it can be one of the following:
+
+`%COMMAND'
+     Issues a COMMAND to the spec file processor.  The commands that can
+     appear here are:
+
+    `%include <FILE>'
+          Search for FILE and insert its text at the current point in
+          the specs file.
+
+    `%include_noerr <FILE>'
+          Just like `%include', but do not generate an error message if
+          the include file cannot be found.
+
+    `%rename OLD_NAME NEW_NAME'
+          Rename the spec string OLD_NAME to NEW_NAME.
+
+
+`*[SPEC_NAME]:'
+     This tells the compiler to create, override or delete the named
+     spec string.  All lines after this directive up to the next
+     directive or blank line are considered to be the text for the spec
+     string.  If this results in an empty string then the spec will be
+     deleted.  (Or, if the spec did not exist, then nothing will
+     happened.)  Otherwise, if the spec does not currently exist a new
+     spec will be created.  If the spec does exist then its contents
+     will be overridden by the text of this directive, unless the first
+     character of that text is the `+' character, in which case the
+     text will be appended to the spec.
+
+`[SUFFIX]:'
+     Creates a new `[SUFFIX] spec' pair.  All lines after this directive
+     and up to the next directive or blank line are considered to make
+     up the spec string for the indicated suffix.  When the compiler
+     encounters an input file with the named suffix, it will processes
+     the spec string in order to work out how to compile that file.
+     For example:
+
+          .ZZ:
+          z-compile -input %i
+
+     This says that any input file whose name ends in `.ZZ' should be
+     passed to the program `z-compile', which should be invoked with the
+     command-line switch `-input' and with the result of performing the
+     `%i' substitution.  (See below.)
+
+     As an alternative to providing a spec string, the text that
+     follows a suffix directive can be one of the following:
+
+    `@LANGUAGE'
+          This says that the suffix is an alias for a known LANGUAGE.
+          This is similar to using the `-x' command-line switch to GCC
+          to specify a language explicitly.  For example:
+
+               .ZZ:
+               @c++
+
+          Says that .ZZ files are, in fact, C++ source files.
+
+    `#NAME'
+          This causes an error messages saying:
+
+               NAME compiler not installed on this system.
+
+     GCC already has an extensive list of suffixes built into it.  This
+     directive will add an entry to the end of the list of suffixes, but
+     since the list is searched from the end backwards, it is
+     effectively possible to override earlier entries using this
+     technique.
+
+
+ GCC has the following spec strings built into it.  Spec files can
+override these strings or create their own.  Note that individual
+targets can also add their own spec strings to this list.
+
+     asm          Options to pass to the assembler
+     asm_final    Options to pass to the assembler post-processor
+     cpp          Options to pass to the C preprocessor
+     cc1          Options to pass to the C compiler
+     cc1plus      Options to pass to the C++ compiler
+     endfile      Object files to include at the end of the link
+     link         Options to pass to the linker
+     lib          Libraries to include on the command line to the linker
+     libgcc       Decides which GCC support library to pass to the linker
+     linker       Sets the name of the linker
+     predefines   Defines to be passed to the C preprocessor
+     signed_char  Defines to pass to CPP to say whether `char' is signed
+                  by default
+     startfile    Object files to include at the start of the link
+
+ Here is a small example of a spec file:
+
+     %rename lib                 old_lib
+
+     *lib:
+     --start-group -lgcc -lc -leval1 --end-group %(old_lib)
+
+ This example renames the spec called `lib' to `old_lib' and then
+overrides the previous definition of `lib' with a new one.  The new
+definition adds in some extra command-line options before including the
+text of the old definition.
+
+ "Spec strings" are a list of command-line options to be passed to their
+corresponding program.  In addition, the spec strings can contain
+`%'-prefixed sequences to substitute variable text or to conditionally
+insert text into the command line.  Using these constructs it is
+possible to generate quite complex command lines.
+
+ Here is a table of all defined `%'-sequences for spec strings.  Note
+that spaces are not generated automatically around the results of
+expanding these sequences.  Therefore you can concatenate them together
+or combine them with constant text in a single argument.
+
+`%%'
+     Substitute one `%' into the program name or argument.
+
+`%i'
+     Substitute the name of the input file being processed.
+
+`%b'
+     Substitute the basename of the input file being processed.  This
+     is the substring up to (and not including) the last period and not
+     including the directory.
+
+`%B'
+     This is the same as `%b', but include the file suffix (text after
+     the last period).
+
+`%d'
+     Marks the argument containing or following the `%d' as a temporary
+     file name, so that that file will be deleted if GCC exits
+     successfully.  Unlike `%g', this contributes no text to the
+     argument.
+
+`%gSUFFIX'
+     Substitute a file name that has suffix SUFFIX and is chosen once
+     per compilation, and mark the argument in the same way as `%d'.
+     To reduce exposure to denial-of-service attacks, the file name is
+     now chosen in a way that is hard to predict even when previously
+     chosen file names are known.  For example, `%g.s ... %g.o ... %g.s'
+     might turn into `ccUVUUAU.s ccXYAXZ12.o ccUVUUAU.s'.  SUFFIX
+     matches the regexp `[.A-Za-z]*' or the special string `%O', which
+     is treated exactly as if `%O' had been preprocessed.  Previously,
+     `%g' was simply substituted with a file name chosen once per
+     compilation, without regard to any appended suffix (which was
+     therefore treated just like ordinary text), making such attacks
+     more likely to succeed.
+
+`%uSUFFIX'
+     Like `%g', but generates a new temporary file name even if
+     `%uSUFFIX' was already seen.
+
+`%USUFFIX'
+     Substitutes the last file name generated with `%uSUFFIX',
+     generating a new one if there is no such last file name.  In the
+     absence of any `%uSUFFIX', this is just like `%gSUFFIX', except
+     they don't share the same suffix _space_, so `%g.s ... %U.s ...
+     %g.s ... %U.s' would involve the generation of two distinct file
+     names, one for each `%g.s' and another for each `%U.s'.
+     Previously, `%U' was simply substituted with a file name chosen
+     for the previous `%u', without regard to any appended suffix.
+
+`%jSUFFIX'
+     Substitutes the name of the `HOST_BIT_BUCKET', if any, and if it is
+     writable, and if save-temps is off; otherwise, substitute the name
+     of a temporary file, just like `%u'.  This temporary file is not
+     meant for communication between processes, but rather as a junk
+     disposal mechanism.
+
+`%|SUFFIX'
+`%mSUFFIX'
+     Like `%g', except if `-pipe' is in effect.  In that case `%|'
+     substitutes a single dash and `%m' substitutes nothing at all.
+     These are the two most common ways to instruct a program that it
+     should read from standard input or write to standard output.  If
+     you need something more elaborate you can use an `%{pipe:`X'}'
+     construct: see for example `f/lang-specs.h'.
+
+`%.SUFFIX'
+     Substitutes .SUFFIX for the suffixes of a matched switch's args
+     when it is subsequently output with `%*'.  SUFFIX is terminated by
+     the next space or %.
+
+`%w'
+     Marks the argument containing or following the `%w' as the
+     designated output file of this compilation.  This puts the argument
+     into the sequence of arguments that `%o' will substitute later.
+
+`%o'
+     Substitutes the names of all the output files, with spaces
+     automatically placed around them.  You should write spaces around
+     the `%o' as well or the results are undefined.  `%o' is for use in
+     the specs for running the linker.  Input files whose names have no
+     recognized suffix are not compiled at all, but they are included
+     among the output files, so they will be linked.
+
+`%O'
+     Substitutes the suffix for object files.  Note that this is
+     handled specially when it immediately follows `%g, %u, or %U',
+     because of the need for those to form complete file names.  The
+     handling is such that `%O' is treated exactly as if it had already
+     been substituted, except that `%g, %u, and %U' do not currently
+     support additional SUFFIX characters following `%O' as they would
+     following, for example, `.o'.
+
+`%p'
+     Substitutes the standard macro predefinitions for the current
+     target machine.  Use this when running `cpp'.
+
+`%P'
+     Like `%p', but puts `__' before and after the name of each
+     predefined macro, except for macros that start with `__' or with
+     `_L', where L is an uppercase letter.  This is for ISO C.
+
+`%I'
+     Substitute any of `-iprefix' (made from `GCC_EXEC_PREFIX'),
+     `-isysroot' (made from `TARGET_SYSTEM_ROOT'), `-isystem' (made
+     from `COMPILER_PATH' and `-B' options) and `-imultilib' as
+     necessary.
+
+`%s'
+     Current argument is the name of a library or startup file of some
+     sort.  Search for that file in a standard list of directories and
+     substitute the full name found.  The current working directory is
+     included in the list of directories scanned.
+
+`%T'
+     Current argument is the name of a linker script.  Search for that
+     file in the current list of directories to scan for libraries. If
+     the file is located insert a `--script' option into the command
+     line followed by the full path name found.  If the file is not
+     found then generate an error message.  Note: the current working
+     directory is not searched.
+
+`%eSTR'
+     Print STR as an error message.  STR is terminated by a newline.
+     Use this when inconsistent options are detected.
+
+`%(NAME)'
+     Substitute the contents of spec string NAME at this point.
+
+`%[NAME]'
+     Like `%(...)' but put `__' around `-D' arguments.
+
+`%x{OPTION}'
+     Accumulate an option for `%X'.
+
+`%X'
+     Output the accumulated linker options specified by `-Wl' or a `%x'
+     spec string.
+
+`%Y'
+     Output the accumulated assembler options specified by `-Wa'.
+
+`%Z'
+     Output the accumulated preprocessor options specified by `-Wp'.
+
+`%a'
+     Process the `asm' spec.  This is used to compute the switches to
+     be passed to the assembler.
+
+`%A'
+     Process the `asm_final' spec.  This is a spec string for passing
+     switches to an assembler post-processor, if such a program is
+     needed.
+
+`%l'
+     Process the `link' spec.  This is the spec for computing the
+     command line passed to the linker.  Typically it will make use of
+     the `%L %G %S %D and %E' sequences.
+
+`%D'
+     Dump out a `-L' option for each directory that GCC believes might
+     contain startup files.  If the target supports multilibs then the
+     current multilib directory will be prepended to each of these
+     paths.
+
+`%L'
+     Process the `lib' spec.  This is a spec string for deciding which
+     libraries should be included on the command line to the linker.
+
+`%G'
+     Process the `libgcc' spec.  This is a spec string for deciding
+     which GCC support library should be included on the command line
+     to the linker.
+
+`%S'
+     Process the `startfile' spec.  This is a spec for deciding which
+     object files should be the first ones passed to the linker.
+     Typically this might be a file named `crt0.o'.
+
+`%E'
+     Process the `endfile' spec.  This is a spec string that specifies
+     the last object files that will be passed to the linker.
+
+`%C'
+     Process the `cpp' spec.  This is used to construct the arguments
+     to be passed to the C preprocessor.
+
+`%1'
+     Process the `cc1' spec.  This is used to construct the options to
+     be passed to the actual C compiler (`cc1').
+
+`%2'
+     Process the `cc1plus' spec.  This is used to construct the options
+     to be passed to the actual C++ compiler (`cc1plus').
+
+`%*'
+     Substitute the variable part of a matched option.  See below.
+     Note that each comma in the substituted string is replaced by a
+     single space.
+
+`%<`S''
+     Remove all occurrences of `-S' from the command line.  Note--this
+     command is position dependent.  `%' commands in the spec string
+     before this one will see `-S', `%' commands in the spec string
+     after this one will not.
+
+`%:FUNCTION(ARGS)'
+     Call the named function FUNCTION, passing it ARGS.  ARGS is first
+     processed as a nested spec string, then split into an argument
+     vector in the usual fashion.  The function returns a string which
+     is processed as if it had appeared literally as part of the
+     current spec.
+
+     The following built-in spec functions are provided:
+
+    ``getenv''
+          The `getenv' spec function takes two arguments: an environment
+          variable name and a string.  If the environment variable is
+          not defined, a fatal error is issued.  Otherwise, the return
+          value is the value of the environment variable concatenated
+          with the string.  For example, if `TOPDIR' is defined as
+          `/path/to/top', then:
+
+               %:getenv(TOPDIR /include)
+
+          expands to `/path/to/top/include'.
+
+    ``if-exists''
+          The `if-exists' spec function takes one argument, an absolute
+          pathname to a file.  If the file exists, `if-exists' returns
+          the pathname.  Here is a small example of its usage:
+
+               *startfile:
+               crt0%O%s %:if-exists(crti%O%s) crtbegin%O%s
+
+    ``if-exists-else''
+          The `if-exists-else' spec function is similar to the
+          `if-exists' spec function, except that it takes two
+          arguments.  The first argument is an absolute pathname to a
+          file.  If the file exists, `if-exists-else' returns the
+          pathname.  If it does not exist, it returns the second
+          argument.  This way, `if-exists-else' can be used to select
+          one file or another, based on the existence of the first.
+          Here is a small example of its usage:
+
+               *startfile:
+               crt0%O%s %:if-exists(crti%O%s) \
+               %:if-exists-else(crtbeginT%O%s crtbegin%O%s)
+
+    ``replace-outfile''
+          The `replace-outfile' spec function takes two arguments.  It
+          looks for the first argument in the outfiles array and
+          replaces it with the second argument.  Here is a small
+          example of its usage:
+
+               %{fgnu-runtime:%:replace-outfile(-lobjc -lobjc-gnu)}
+
+    ``remove-outfile''
+          The `remove-outfile' spec function takes one argument.  It
+          looks for the first argument in the outfiles array and
+          removes it.  Here is a small example its usage:
+
+               %:remove-outfile(-lm)
+
+    ``pass-through-libs''
+          The `pass-through-libs' spec function takes any number of
+          arguments.  It finds any `-l' options and any non-options
+          ending in ".a" (which it assumes are the names of linker
+          input library archive files) and returns a result containing
+          all the found arguments each prepended by
+          `-plugin-opt=-pass-through=' and joined by spaces.  This list
+          is intended to be passed to the LTO linker plugin.
+
+               %:pass-through-libs(%G %L %G)
+
+    ``print-asm-header''
+          The `print-asm-header' function takes no arguments and simply
+          prints a banner like:
+
+               Assembler options
+               =================
+
+               Use "-Wa,OPTION" to pass "OPTION" to the assembler.
+
+          It is used to separate compiler options from assembler options
+          in the `--target-help' output.
+
+`%{`S'}'
+     Substitutes the `-S' switch, if that switch was given to GCC.  If
+     that switch was not specified, this substitutes nothing.  Note that
+     the leading dash is omitted when specifying this option, and it is
+     automatically inserted if the substitution is performed.  Thus the
+     spec string `%{foo}' would match the command-line option `-foo'
+     and would output the command line option `-foo'.
+
+`%W{`S'}'
+     Like %{`S'} but mark last argument supplied within as a file to be
+     deleted on failure.
+
+`%{`S'*}'
+     Substitutes all the switches specified to GCC whose names start
+     with `-S', but which also take an argument.  This is used for
+     switches like `-o', `-D', `-I', etc.  GCC considers `-o foo' as
+     being one switch whose names starts with `o'.  %{o*} would
+     substitute this text, including the space.  Thus two arguments
+     would be generated.
+
+`%{`S'*&`T'*}'
+     Like %{`S'*}, but preserve order of `S' and `T' options (the order
+     of `S' and `T' in the spec is not significant).  There can be any
+     number of ampersand-separated variables; for each the wild card is
+     optional.  Useful for CPP as `%{D*&U*&A*}'.
+
+`%{`S':`X'}'
+     Substitutes `X', if the `-S' switch was given to GCC.
+
+`%{!`S':`X'}'
+     Substitutes `X', if the `-S' switch was _not_ given to GCC.
+
+`%{`S'*:`X'}'
+     Substitutes `X' if one or more switches whose names start with
+     `-S' are specified to GCC.  Normally `X' is substituted only once,
+     no matter how many such switches appeared.  However, if `%*'
+     appears somewhere in `X', then `X' will be substituted once for
+     each matching switch, with the `%*' replaced by the part of that
+     switch that matched the `*'.
+
+`%{.`S':`X'}'
+     Substitutes `X', if processing a file with suffix `S'.
+
+`%{!.`S':`X'}'
+     Substitutes `X', if _not_ processing a file with suffix `S'.
+
+`%{,`S':`X'}'
+     Substitutes `X', if processing a file for language `S'.
+
+`%{!,`S':`X'}'
+     Substitutes `X', if not processing a file for language `S'.
+
+`%{`S'|`P':`X'}'
+     Substitutes `X' if either `-S' or `-P' was given to GCC.  This may
+     be combined with `!', `.', `,', and `*' sequences as well,
+     although they have a stronger binding than the `|'.  If `%*'
+     appears in `X', all of the alternatives must be starred, and only
+     the first matching alternative is substituted.
+
+     For example, a spec string like this:
+
+          %{.c:-foo} %{!.c:-bar} %{.c|d:-baz} %{!.c|d:-boggle}
+
+     will output the following command-line options from the following
+     input command-line options:
+
+          fred.c        -foo -baz
+          jim.d         -bar -boggle
+          -d fred.c     -foo -baz -boggle
+          -d jim.d      -bar -baz -boggle
+
+`%{S:X; T:Y; :D}'
+     If `S' was given to GCC, substitutes `X'; else if `T' was given to
+     GCC, substitutes `Y'; else substitutes `D'.  There can be as many
+     clauses as you need.  This may be combined with `.', `,', `!',
+     `|', and `*' as needed.
+
+
+ The conditional text `X' in a %{`S':`X'} or similar construct may
+contain other nested `%' constructs or spaces, or even newlines.  They
+are processed as usual, as described above.  Trailing white space in
+`X' is ignored.  White space may also appear anywhere on the left side
+of the colon in these constructs, except between `.' or `*' and the
+corresponding word.
+
+ The `-O', `-f', `-m', and `-W' switches are handled specifically in
+these constructs.  If another value of `-O' or the negated form of a
+`-f', `-m', or `-W' switch is found later in the command line, the
+earlier switch value is ignored, except with {`S'*} where `S' is just
+one letter, which passes all matching options.
+
+ The character `|' at the beginning of the predicate text is used to
+indicate that a command should be piped to the following command, but
+only if `-pipe' is specified.
+
+ It is built into GCC which switches take arguments and which do not.
+(You might think it would be useful to generalize this to allow each
+compiler's spec to say which switches take arguments.  But this cannot
+be done in a consistent fashion.  GCC cannot even decide which input
+files have been specified without knowing which switches take arguments,
+and it must know which input files to compile in order to tell which
+compilers to run).
+
+ GCC also knows implicitly that arguments starting in `-l' are to be
+treated as compiler output files, and passed to the linker in their
+proper position among the other output files.
+
+
+File: gcc.info,  Node: Target Options,  Next: Submodel Options,  Prev: Spec Files,  Up: Invoking GCC
+
+3.16 Specifying Target Machine and Compiler Version
+===================================================
+
+The usual way to run GCC is to run the executable called `gcc', or
+`MACHINE-gcc' when cross-compiling, or `MACHINE-gcc-VERSION' to run a
+version other than the one that was installed last.
+
+
+File: gcc.info,  Node: Submodel Options,  Next: Code Gen Options,  Prev: Target Options,  Up: Invoking GCC
+
+3.17 Hardware Models and Configurations
+=======================================
+
+Each target machine types can have its own special options, starting
+with `-m', to choose among various hardware models or
+configurations--for example, 68010 vs 68020, floating coprocessor or
+none.  A single installed version of the compiler can compile for any
+model or configuration, according to the options specified.
+
+ Some configurations of the compiler also support additional special
+options, usually for compatibility with other compilers on the same
+platform.
+
+* Menu:
+
+* ARC Options::
+* ARM Options::
+* AVR Options::
+* Blackfin Options::
+* CRIS Options::
+* CRX Options::
+* Darwin Options::
+* DEC Alpha Options::
+* DEC Alpha/VMS Options::
+* FR30 Options::
+* FRV Options::
+* GNU/Linux Options::
+* H8/300 Options::
+* HPPA Options::
+* i386 and x86-64 Options::
+* i386 and x86-64 Windows Options::
+* IA-64 Options::
+* IA-64/VMS Options::
+* LM32 Options::
+* M32C Options::
+* M32R/D Options::
+* M680x0 Options::
+* M68hc1x Options::
+* MCore Options::
+* MeP Options::
+* MicroBlaze Options::
+* MIPS Options::
+* MMIX Options::
+* MN10300 Options::
+* PDP-11 Options::
+* picoChip Options::
+* PowerPC Options::
+* RS/6000 and PowerPC Options::
+* RX Options::
+* S/390 and zSeries Options::
+* Score Options::
+* SH Options::
+* Solaris 2 Options::
+* SPARC Options::
+* SPU Options::
+* System V Options::
+* V850 Options::
+* VAX Options::
+* VxWorks Options::
+* x86-64 Options::
+* Xstormy16 Options::
+* Xtensa Options::
+* zSeries Options::
+
+
+File: gcc.info,  Node: ARC Options,  Next: ARM Options,  Up: Submodel Options
+
+3.17.1 ARC Options
+------------------
+
+These options are defined for ARC implementations:
+
+`-EL'
+     Compile code for little endian mode.  This is the default.
+
+`-EB'
+     Compile code for big endian mode.
+
+`-mmangle-cpu'
+     Prepend the name of the CPU to all public symbol names.  In
+     multiple-processor systems, there are many ARC variants with
+     different instruction and register set characteristics.  This flag
+     prevents code compiled for one CPU to be linked with code compiled
+     for another.  No facility exists for handling variants that are
+     "almost identical".  This is an all or nothing option.
+
+`-mcpu=CPU'
+     Compile code for ARC variant CPU.  Which variants are supported
+     depend on the configuration.  All variants support `-mcpu=base',
+     this is the default.
+
+`-mtext=TEXT-SECTION'
+`-mdata=DATA-SECTION'
+`-mrodata=READONLY-DATA-SECTION'
+     Put functions, data, and readonly data in TEXT-SECTION,
+     DATA-SECTION, and READONLY-DATA-SECTION respectively by default.
+     This can be overridden with the `section' attribute.  *Note
+     Variable Attributes::.
+
+
+
+File: gcc.info,  Node: ARM Options,  Next: AVR Options,  Prev: ARC Options,  Up: Submodel Options
+
+3.17.2 ARM Options
+------------------
+
+These `-m' options are defined for Advanced RISC Machines (ARM)
+architectures:
+
+`-mabi=NAME'
+     Generate code for the specified ABI.  Permissible values are:
+     `apcs-gnu', `atpcs', `aapcs', `aapcs-linux' and `iwmmxt'.
+
+`-mapcs-frame'
+     Generate a stack frame that is compliant with the ARM Procedure
+     Call Standard for all functions, even if this is not strictly
+     necessary for correct execution of the code.  Specifying
+     `-fomit-frame-pointer' with this option will cause the stack
+     frames not to be generated for leaf functions.  The default is
+     `-mno-apcs-frame'.
+
+`-mapcs'
+     This is a synonym for `-mapcs-frame'.
+
+`-mthumb-interwork'
+     Generate code which supports calling between the ARM and Thumb
+     instruction sets.  Without this option the two instruction sets
+     cannot be reliably used inside one program.  The default is
+     `-mno-thumb-interwork', since slightly larger code is generated
+     when `-mthumb-interwork' is specified.
+
+`-mno-sched-prolog'
+     Prevent the reordering of instructions in the function prolog, or
+     the merging of those instruction with the instructions in the
+     function's body.  This means that all functions will start with a
+     recognizable set of instructions (or in fact one of a choice from
+     a small set of different function prologues), and this information
+     can be used to locate the start if functions inside an executable
+     piece of code.  The default is `-msched-prolog'.
+
+`-mfloat-abi=NAME'
+     Specifies which floating-point ABI to use.  Permissible values
+     are: `soft', `softfp' and `hard'.
+
+     Specifying `soft' causes GCC to generate output containing library
+     calls for floating-point operations.  `softfp' allows the
+     generation of code using hardware floating-point instructions, but
+     still uses the soft-float calling conventions.  `hard' allows
+     generation of floating-point instructions and uses FPU-specific
+     calling conventions.
+
+     The default depends on the specific target configuration.  Note
+     that the hard-float and soft-float ABIs are not link-compatible;
+     you must compile your entire program with the same ABI, and link
+     with a compatible set of libraries.
+
+`-mhard-float'
+     Equivalent to `-mfloat-abi=hard'.
+
+`-msoft-float'
+     Equivalent to `-mfloat-abi=soft'.
+
+`-mlittle-endian'
+     Generate code for a processor running in little-endian mode.  This
+     is the default for all standard configurations.
+
+`-mbig-endian'
+     Generate code for a processor running in big-endian mode; the
+     default is to compile code for a little-endian processor.
+
+`-mwords-little-endian'
+     This option only applies when generating code for big-endian
+     processors.  Generate code for a little-endian word order but a
+     big-endian byte order.  That is, a byte order of the form
+     `32107654'.  Note: this option should only be used if you require
+     compatibility with code for big-endian ARM processors generated by
+     versions of the compiler prior to 2.8.
+
+`-mcpu=NAME'
+     This specifies the name of the target ARM processor.  GCC uses
+     this name to determine what kind of instructions it can emit when
+     generating assembly code.  Permissible names are: `arm2', `arm250',
+     `arm3', `arm6', `arm60', `arm600', `arm610', `arm620', `arm7',
+     `arm7m', `arm7d', `arm7dm', `arm7di', `arm7dmi', `arm70', `arm700',
+     `arm700i', `arm710', `arm710c', `arm7100', `arm720', `arm7500',
+     `arm7500fe', `arm7tdmi', `arm7tdmi-s', `arm710t', `arm720t',
+     `arm740t', `strongarm', `strongarm110', `strongarm1100',
+     `strongarm1110', `arm8', `arm810', `arm9', `arm9e', `arm920',
+     `arm920t', `arm922t', `arm946e-s', `arm966e-s', `arm968e-s',
+     `arm926ej-s', `arm940t', `arm9tdmi', `arm10tdmi', `arm1020t',
+     `arm1026ej-s', `arm10e', `arm1020e', `arm1022e', `arm1136j-s',
+     `arm1136jf-s', `mpcore', `mpcorenovfp', `arm1156t2-s',
+     `arm1156t2f-s', `arm1176jz-s', `arm1176jzf-s', `cortex-a5',
+     `cortex-a8', `cortex-a9', `cortex-a15', `cortex-r4', `cortex-r4f',
+     `cortex-m4', `cortex-m3', `cortex-m1', `cortex-m0', `xscale',
+     `iwmmxt', `iwmmxt2', `ep9312'.
+
+`-mtune=NAME'
+     This option is very similar to the `-mcpu=' option, except that
+     instead of specifying the actual target processor type, and hence
+     restricting which instructions can be used, it specifies that GCC
+     should tune the performance of the code as if the target were of
+     the type specified in this option, but still choosing the
+     instructions that it will generate based on the CPU specified by a
+     `-mcpu=' option.  For some ARM implementations better performance
+     can be obtained by using this option.
+
+`-march=NAME'
+     This specifies the name of the target ARM architecture.  GCC uses
+     this name to determine what kind of instructions it can emit when
+     generating assembly code.  This option can be used in conjunction
+     with or instead of the `-mcpu=' option.  Permissible names are:
+     `armv2', `armv2a', `armv3', `armv3m', `armv4', `armv4t', `armv5',
+     `armv5t', `armv5e', `armv5te', `armv6', `armv6j', `armv6t2',
+     `armv6z', `armv6zk', `armv6-m', `armv7', `armv7-a', `armv7-r',
+     `armv7-m', `iwmmxt', `iwmmxt2', `ep9312'.
+
+`-mfpu=NAME'
+`-mfpe=NUMBER'
+`-mfp=NUMBER'
+     This specifies what floating point hardware (or hardware
+     emulation) is available on the target.  Permissible names are:
+     `fpa', `fpe2', `fpe3', `maverick', `vfp', `vfpv3', `vfpv3-fp16',
+     `vfpv3-d16', `vfpv3-d16-fp16', `vfpv3xd', `vfpv3xd-fp16', `neon',
+     `neon-fp16', `vfpv4', `vfpv4-d16', `fpv4-sp-d16' and `neon-vfpv4'.
+     `-mfp' and `-mfpe' are synonyms for `-mfpu'=`fpe'NUMBER, for
+     compatibility with older versions of GCC.
+
+     If `-msoft-float' is specified this specifies the format of
+     floating point values.
+
+     If the selected floating-point hardware includes the NEON extension
+     (e.g. `-mfpu'=`neon'), note that floating-point operations will
+     not be used by GCC's auto-vectorization pass unless
+     `-funsafe-math-optimizations' is also specified.  This is because
+     NEON hardware does not fully implement the IEEE 754 standard for
+     floating-point arithmetic (in particular denormal values are
+     treated as zero), so the use of NEON instructions may lead to a
+     loss of precision.
+
+`-mfp16-format=NAME'
+     Specify the format of the `__fp16' half-precision floating-point
+     type.  Permissible names are `none', `ieee', and `alternative';
+     the default is `none', in which case the `__fp16' type is not
+     defined.  *Note Half-Precision::, for more information.
+
+`-mstructure-size-boundary=N'
+     The size of all structures and unions will be rounded up to a
+     multiple of the number of bits set by this option.  Permissible
+     values are 8, 32 and 64.  The default value varies for different
+     toolchains.  For the COFF targeted toolchain the default value is
+     8.  A value of 64 is only allowed if the underlying ABI supports
+     it.
+
+     Specifying the larger number can produce faster, more efficient
+     code, but can also increase the size of the program.  Different
+     values are potentially incompatible.  Code compiled with one value
+     cannot necessarily expect to work with code or libraries compiled
+     with another value, if they exchange information using structures
+     or unions.
+
+`-mabort-on-noreturn'
+     Generate a call to the function `abort' at the end of a `noreturn'
+     function.  It will be executed if the function tries to return.
+
+`-mlong-calls'
+`-mno-long-calls'
+     Tells the compiler to perform function calls by first loading the
+     address of the function into a register and then performing a
+     subroutine call on this register.  This switch is needed if the
+     target function will lie outside of the 64 megabyte addressing
+     range of the offset based version of subroutine call instruction.
+
+     Even if this switch is enabled, not all function calls will be
+     turned into long calls.  The heuristic is that static functions,
+     functions which have the `short-call' attribute, functions that
+     are inside the scope of a `#pragma no_long_calls' directive and
+     functions whose definitions have already been compiled within the
+     current compilation unit, will not be turned into long calls.  The
+     exception to this rule is that weak function definitions,
+     functions with the `long-call' attribute or the `section'
+     attribute, and functions that are within the scope of a `#pragma
+     long_calls' directive, will always be turned into long calls.
+
+     This feature is not enabled by default.  Specifying
+     `-mno-long-calls' will restore the default behavior, as will
+     placing the function calls within the scope of a `#pragma
+     long_calls_off' directive.  Note these switches have no effect on
+     how the compiler generates code to handle function calls via
+     function pointers.
+
+`-msingle-pic-base'
+     Treat the register used for PIC addressing as read-only, rather
+     than loading it in the prologue for each function.  The run-time
+     system is responsible for initializing this register with an
+     appropriate value before execution begins.
+
+`-mpic-register=REG'
+     Specify the register to be used for PIC addressing.  The default
+     is R10 unless stack-checking is enabled, when R9 is used.
+
+`-mcirrus-fix-invalid-insns'
+     Insert NOPs into the instruction stream to in order to work around
+     problems with invalid Maverick instruction combinations.  This
+     option is only valid if the `-mcpu=ep9312' option has been used to
+     enable generation of instructions for the Cirrus Maverick floating
+     point co-processor.  This option is not enabled by default, since
+     the problem is only present in older Maverick implementations.
+     The default can be re-enabled by use of the
+     `-mno-cirrus-fix-invalid-insns' switch.
+
+`-mpoke-function-name'
+     Write the name of each function into the text section, directly
+     preceding the function prologue.  The generated code is similar to
+     this:
+
+               t0
+                   .ascii "arm_poke_function_name", 0
+                   .align
+               t1
+                   .word 0xff000000 + (t1 - t0)
+               arm_poke_function_name
+                   mov     ip, sp
+                   stmfd   sp!, {fp, ip, lr, pc}
+                   sub     fp, ip, #4
+
+     When performing a stack backtrace, code can inspect the value of
+     `pc' stored at `fp + 0'.  If the trace function then looks at
+     location `pc - 12' and the top 8 bits are set, then we know that
+     there is a function name embedded immediately preceding this
+     location and has length `((pc[-3]) & 0xff000000)'.
+
+`-mthumb'
+     Generate code for the Thumb instruction set.  The default is to
+     use the 32-bit ARM instruction set.  This option automatically
+     enables either 16-bit Thumb-1 or mixed 16/32-bit Thumb-2
+     instructions based on the `-mcpu=NAME' and `-march=NAME' options.
+     This option is not passed to the assembler. If you want to force
+     assembler files to be interpreted as Thumb code, either add a
+     `.thumb' directive to the source or pass the `-mthumb' option
+     directly to the assembler by prefixing it with `-Wa'.
+
+`-mtpcs-frame'
+     Generate a stack frame that is compliant with the Thumb Procedure
+     Call Standard for all non-leaf functions.  (A leaf function is one
+     that does not call any other functions.)  The default is
+     `-mno-tpcs-frame'.
+
+`-mtpcs-leaf-frame'
+     Generate a stack frame that is compliant with the Thumb Procedure
+     Call Standard for all leaf functions.  (A leaf function is one
+     that does not call any other functions.)  The default is
+     `-mno-apcs-leaf-frame'.
+
+`-mcallee-super-interworking'
+     Gives all externally visible functions in the file being compiled
+     an ARM instruction set header which switches to Thumb mode before
+     executing the rest of the function.  This allows these functions
+     to be called from non-interworking code.  This option is not valid
+     in AAPCS configurations because interworking is enabled by default.
+
+`-mcaller-super-interworking'
+     Allows calls via function pointers (including virtual functions) to
+     execute correctly regardless of whether the target code has been
+     compiled for interworking or not.  There is a small overhead in
+     the cost of executing a function pointer if this option is
+     enabled.  This option is not valid in AAPCS configurations because
+     interworking is enabled by default.
+
+`-mtp=NAME'
+     Specify the access model for the thread local storage pointer.
+     The valid models are `soft', which generates calls to
+     `__aeabi_read_tp', `cp15', which fetches the thread pointer from
+     `cp15' directly (supported in the arm6k architecture), and `auto',
+     which uses the best available method for the selected processor.
+     The default setting is `auto'.
+
+`-mword-relocations'
+     Only generate absolute relocations on word sized values (i.e.
+     R_ARM_ABS32).  This is enabled by default on targets (uClinux,
+     SymbianOS) where the runtime loader imposes this restriction, and
+     when `-fpic' or `-fPIC' is specified.
+
+`-mfix-cortex-m3-ldrd'
+     Some Cortex-M3 cores can cause data corruption when `ldrd'
+     instructions with overlapping destination and base registers are
+     used.  This option avoids generating these instructions.  This
+     option is enabled by default when `-mcpu=cortex-m3' is specified.
+
+
+
+File: gcc.info,  Node: AVR Options,  Next: Blackfin Options,  Prev: ARM Options,  Up: Submodel Options
+
+3.17.3 AVR Options
+------------------
+
+These options are defined for AVR implementations:
+
+`-mmcu=MCU'
+     Specify ATMEL AVR instruction set or MCU type.
+
+     Instruction set avr1 is for the minimal AVR core, not supported by
+     the C compiler, only for assembler programs (MCU types: at90s1200,
+     attiny10, attiny11, attiny12, attiny15, attiny28).
+
+     Instruction set avr2 (default) is for the classic AVR core with up
+     to 8K program memory space (MCU types: at90s2313, at90s2323,
+     attiny22, at90s2333, at90s2343, at90s4414, at90s4433, at90s4434,
+     at90s8515, at90c8534, at90s8535).
+
+     Instruction set avr3 is for the classic AVR core with up to 128K
+     program memory space (MCU types: atmega103, atmega603, at43usb320,
+     at76c711).
+
+     Instruction set avr4 is for the enhanced AVR core with up to 8K
+     program memory space (MCU types: atmega8, atmega83, atmega85).
+
+     Instruction set avr5 is for the enhanced AVR core with up to 128K
+     program memory space (MCU types: atmega16, atmega161, atmega163,
+     atmega32, atmega323, atmega64, atmega128, at43usb355, at94k).
+
+`-mno-interrupts'
+     Generated code is not compatible with hardware interrupts.  Code
+     size will be smaller.
+
+`-mcall-prologues'
+     Functions prologues/epilogues expanded as call to appropriate
+     subroutines.  Code size will be smaller.
+
+`-mtiny-stack'
+     Change only the low 8 bits of the stack pointer.
+
+`-mint8'
+     Assume int to be 8 bit integer.  This affects the sizes of all
+     types: A char will be 1 byte, an int will be 1 byte, a long will
+     be 2 bytes and long long will be 4 bytes.  Please note that this
+     option does not comply to the C standards, but it will provide you
+     with smaller code size.
+
+3.17.3.1 `EIND' and Devices with more than 128k Bytes of Flash
+..............................................................
+
+Pointers in the implementation are 16 bits wide.  The address of a
+function or label is represented as word address so that indirect jumps
+and calls can address any code address in the range of 64k words.
+
+ In order to faciliate indirect jump on devices with more than 128k
+bytes of program memory space, there is a special function register
+called `EIND' that serves as most significant part of the target address
+when `EICALL' or `EIJMP' instructions are used.
+
+ Indirect jumps and calls on these devices are handled as follows and
+are subject to some limitations:
+
+   * The compiler never sets `EIND'.
+
+   * The startup code from libgcc never sets `EIND'.  Notice that
+     startup code is a blend of code from libgcc and avr-libc.  For the
+     impact of avr-libc on `EIND', see the
+     avr-libc user manual (http://nongnu.org/avr-libc/user-manual).
+
+   * The compiler uses `EIND' implicitely in `EICALL'/`EIJMP'
+     instructions or might read `EIND' directly.
+
+   * The compiler assumes that `EIND' never changes during the startup
+     code or run of the application. In particular, `EIND' is not
+     saved/restored in function or interrupt service routine
+     prologue/epilogue.
+
+   * It is legitimate for user-specific startup code to set up `EIND'
+     early, for example by means of initialization code located in
+     section `.init3', and thus prior to general startup code that
+     initializes RAM and calls constructors.
+
+   * For indirect calls to functions and computed goto, the linker will
+     generate _stubs_. Stubs are jump pads sometimes also called
+     _trampolines_. Thus, the indirect call/jump will jump to such a
+     stub.  The stub contains a direct jump to the desired address.
+
+   * Stubs will be generated automatically by the linker if the
+     following two conditions are met:
+        - The address of a label is taken by means of the `gs' modifier
+          (short for _generate stubs_) like so:
+               LDI r24, lo8(gs(FUNC))
+               LDI r25, hi8(gs(FUNC))
+
+        - The final location of that label is in a code segment
+          _outside_ the segment where the stubs are located.
+
+   * The compiler will emit such `gs' modifiers for code labels in the
+     following situations:
+        - Taking address of a function or code label.
+
+        - Computed goto.
+
+        - If prologue-save function is used, see `-mcall-prologues'
+          command line option.
+
+        - Switch/case dispatch tables. If you do not want such dispatch
+          tables you can specify the `-fno-jump-tables' command line
+          option.
+
+        - C and C++ constructors/destructors called during
+          startup/shutdown.
+
+        - If the tools hit a `gs()' modifier explained above.
+
+   * The default linker script is arranged for code with `EIND = 0'.
+     If code is supposed to work for a setup with `EIND != 0', a custom
+     linker script has to be used in order to place the sections whose
+     name start with `.trampolines' into the segment where `EIND'
+     points to.
+
+   * Jumping to non-symbolic addresses like so is _not_ supported:
+
+          int main (void)
+          {
+              /* Call function at word address 0x2 */
+              return ((int(*)(void)) 0x2)();
+          }
+
+     Instead, a stub has to be set up:
+
+          int main (void)
+          {
+              extern int func_4 (void);
+
+              /* Call function at byte address 0x4 */
+              return func_4();
+          }
+
+     and the application be linked with `-Wl,--defsym,func_4=0x4'.
+     Alternatively, `func_4' can be defined in the linker script.
+
+
+File: gcc.info,  Node: Blackfin Options,  Next: CRIS Options,  Prev: AVR Options,  Up: Submodel Options
+
+3.17.4 Blackfin Options
+-----------------------
+
+`-mcpu=CPU[-SIREVISION]'
+     Specifies the name of the target Blackfin processor.  Currently,
+     CPU can be one of `bf512', `bf514', `bf516', `bf518', `bf522',
+     `bf523', `bf524', `bf525', `bf526', `bf527', `bf531', `bf532',
+     `bf533', `bf534', `bf536', `bf537', `bf538', `bf539', `bf542',
+     `bf544', `bf547', `bf548', `bf549', `bf542m', `bf544m', `bf547m',
+     `bf548m', `bf549m', `bf561'.  The optional SIREVISION specifies
+     the silicon revision of the target Blackfin processor.  Any
+     workarounds available for the targeted silicon revision will be
+     enabled.  If SIREVISION is `none', no workarounds are enabled.  If
+     SIREVISION is `any', all workarounds for the targeted processor
+     will be enabled.  The `__SILICON_REVISION__' macro is defined to
+     two hexadecimal digits representing the major and minor numbers in
+     the silicon revision.  If SIREVISION is `none', the
+     `__SILICON_REVISION__' is not defined.  If SIREVISION is `any', the
+     `__SILICON_REVISION__' is defined to be `0xffff'.  If this
+     optional SIREVISION is not used, GCC assumes the latest known
+     silicon revision of the targeted Blackfin processor.
+
+     Support for `bf561' is incomplete.  For `bf561', Only the
+     processor macro is defined.  Without this option, `bf532' is used
+     as the processor by default.  The corresponding predefined
+     processor macros for CPU is to be defined.  And for `bfin-elf'
+     toolchain, this causes the hardware BSP provided by libgloss to be
+     linked in if `-msim' is not given.
+
+`-msim'
+     Specifies that the program will be run on the simulator.  This
+     causes the simulator BSP provided by libgloss to be linked in.
+     This option has effect only for `bfin-elf' toolchain.  Certain
+     other options, such as `-mid-shared-library' and `-mfdpic', imply
+     `-msim'.
+
+`-momit-leaf-frame-pointer'
+     Don't keep the frame pointer in a register for leaf functions.
+     This avoids the instructions to save, set up and restore frame
+     pointers and makes an extra register available in leaf functions.
+     The option `-fomit-frame-pointer' removes the frame pointer for
+     all functions which might make debugging harder.
+
+`-mspecld-anomaly'
+     When enabled, the compiler will ensure that the generated code
+     does not contain speculative loads after jump instructions. If
+     this option is used, `__WORKAROUND_SPECULATIVE_LOADS' is defined.
+
+`-mno-specld-anomaly'
+     Don't generate extra code to prevent speculative loads from
+     occurring.
+
+`-mcsync-anomaly'
+     When enabled, the compiler will ensure that the generated code
+     does not contain CSYNC or SSYNC instructions too soon after
+     conditional branches.  If this option is used,
+     `__WORKAROUND_SPECULATIVE_SYNCS' is defined.
+
+`-mno-csync-anomaly'
+     Don't generate extra code to prevent CSYNC or SSYNC instructions
+     from occurring too soon after a conditional branch.
+
+`-mlow-64k'
+     When enabled, the compiler is free to take advantage of the
+     knowledge that the entire program fits into the low 64k of memory.
+
+`-mno-low-64k'
+     Assume that the program is arbitrarily large.  This is the default.
+
+`-mstack-check-l1'
+     Do stack checking using information placed into L1 scratchpad
+     memory by the uClinux kernel.
+
+`-mid-shared-library'
+     Generate code that supports shared libraries via the library ID
+     method.  This allows for execute in place and shared libraries in
+     an environment without virtual memory management.  This option
+     implies `-fPIC'.  With a `bfin-elf' target, this option implies
+     `-msim'.
+
+`-mno-id-shared-library'
+     Generate code that doesn't assume ID based shared libraries are
+     being used.  This is the default.
+
+`-mleaf-id-shared-library'
+     Generate code that supports shared libraries via the library ID
+     method, but assumes that this library or executable won't link
+     against any other ID shared libraries.  That allows the compiler
+     to use faster code for jumps and calls.
+
+`-mno-leaf-id-shared-library'
+     Do not assume that the code being compiled won't link against any
+     ID shared libraries.  Slower code will be generated for jump and
+     call insns.
+
+`-mshared-library-id=n'
+     Specified the identification number of the ID based shared library
+     being compiled.  Specifying a value of 0 will generate more
+     compact code, specifying other values will force the allocation of
+     that number to the current library but is no more space or time
+     efficient than omitting this option.
+
+`-msep-data'
+     Generate code that allows the data segment to be located in a
+     different area of memory from the text segment.  This allows for
+     execute in place in an environment without virtual memory
+     management by eliminating relocations against the text section.
+
+`-mno-sep-data'
+     Generate code that assumes that the data segment follows the text
+     segment.  This is the default.
+
+`-mlong-calls'
+`-mno-long-calls'
+     Tells the compiler to perform function calls by first loading the
+     address of the function into a register and then performing a
+     subroutine call on this register.  This switch is needed if the
+     target function will lie outside of the 24 bit addressing range of
+     the offset based version of subroutine call instruction.
+
+     This feature is not enabled by default.  Specifying
+     `-mno-long-calls' will restore the default behavior.  Note these
+     switches have no effect on how the compiler generates code to
+     handle function calls via function pointers.
+
+`-mfast-fp'
+     Link with the fast floating-point library. This library relaxes
+     some of the IEEE floating-point standard's rules for checking
+     inputs against Not-a-Number (NAN), in the interest of performance.
+
+`-minline-plt'
+     Enable inlining of PLT entries in function calls to functions that
+     are not known to bind locally.  It has no effect without `-mfdpic'.
+
+`-mmulticore'
+     Build standalone application for multicore Blackfin processor.
+     Proper start files and link scripts will be used to support
+     multicore.  This option defines `__BFIN_MULTICORE'. It can only be
+     used with `-mcpu=bf561[-SIREVISION]'. It can be used with
+     `-mcorea' or `-mcoreb'. If it's used without `-mcorea' or
+     `-mcoreb', single application/dual core programming model is used.
+     In this model, the main function of Core B should be named as
+     coreb_main. If it's used with `-mcorea' or `-mcoreb', one
+     application per core programming model is used.  If this option is
+     not used, single core application programming model is used.
+
+`-mcorea'
+     Build standalone application for Core A of BF561 when using one
+     application per core programming model. Proper start files and
+     link scripts will be used to support Core A. This option defines
+     `__BFIN_COREA'. It must be used with `-mmulticore'.
+
+`-mcoreb'
+     Build standalone application for Core B of BF561 when using one
+     application per core programming model. Proper start files and
+     link scripts will be used to support Core B. This option defines
+     `__BFIN_COREB'. When this option is used, coreb_main should be
+     used instead of main. It must be used with `-mmulticore'.
+
+`-msdram'
+     Build standalone application for SDRAM. Proper start files and
+     link scripts will be used to put the application into SDRAM.
+     Loader should initialize SDRAM before loading the application into
+     SDRAM. This option defines `__BFIN_SDRAM'.
+
+`-micplb'
+     Assume that ICPLBs are enabled at runtime.  This has an effect on
+     certain anomaly workarounds.  For Linux targets, the default is to
+     assume ICPLBs are enabled; for standalone applications the default
+     is off.
+
+
+File: gcc.info,  Node: CRIS Options,  Next: CRX Options,  Prev: Blackfin Options,  Up: Submodel Options
+
+3.17.5 CRIS Options
+-------------------
+
+These options are defined specifically for the CRIS ports.
+
+`-march=ARCHITECTURE-TYPE'
+`-mcpu=ARCHITECTURE-TYPE'
+     Generate code for the specified architecture.  The choices for
+     ARCHITECTURE-TYPE are `v3', `v8' and `v10' for respectively
+     ETRAX 4, ETRAX 100, and ETRAX 100 LX.  Default is `v0' except for
+     cris-axis-linux-gnu, where the default is `v10'.
+
+`-mtune=ARCHITECTURE-TYPE'
+     Tune to ARCHITECTURE-TYPE everything applicable about the generated
+     code, except for the ABI and the set of available instructions.
+     The choices for ARCHITECTURE-TYPE are the same as for
+     `-march=ARCHITECTURE-TYPE'.
+
+`-mmax-stack-frame=N'
+     Warn when the stack frame of a function exceeds N bytes.
+
+`-metrax4'
+`-metrax100'
+     The options `-metrax4' and `-metrax100' are synonyms for
+     `-march=v3' and `-march=v8' respectively.
+
+`-mmul-bug-workaround'
+`-mno-mul-bug-workaround'
+     Work around a bug in the `muls' and `mulu' instructions for CPU
+     models where it applies.  This option is active by default.
+
+`-mpdebug'
+     Enable CRIS-specific verbose debug-related information in the
+     assembly code.  This option also has the effect to turn off the
+     `#NO_APP' formatted-code indicator to the assembler at the
+     beginning of the assembly file.
+
+`-mcc-init'
+     Do not use condition-code results from previous instruction;
+     always emit compare and test instructions before use of condition
+     codes.
+
+`-mno-side-effects'
+     Do not emit instructions with side-effects in addressing modes
+     other than post-increment.
+
+`-mstack-align'
+`-mno-stack-align'
+`-mdata-align'
+`-mno-data-align'
+`-mconst-align'
+`-mno-const-align'
+     These options (no-options) arranges (eliminate arrangements) for
+     the stack-frame, individual data and constants to be aligned for
+     the maximum single data access size for the chosen CPU model.  The
+     default is to arrange for 32-bit alignment.  ABI details such as
+     structure layout are not affected by these options.
+
+`-m32-bit'
+`-m16-bit'
+`-m8-bit'
+     Similar to the stack- data- and const-align options above, these
+     options arrange for stack-frame, writable data and constants to
+     all be 32-bit, 16-bit or 8-bit aligned.  The default is 32-bit
+     alignment.
+
+`-mno-prologue-epilogue'
+`-mprologue-epilogue'
+     With `-mno-prologue-epilogue', the normal function prologue and
+     epilogue that sets up the stack-frame are omitted and no return
+     instructions or return sequences are generated in the code.  Use
+     this option only together with visual inspection of the compiled
+     code: no warnings or errors are generated when call-saved
+     registers must be saved, or storage for local variable needs to be
+     allocated.
+
+`-mno-gotplt'
+`-mgotplt'
+     With `-fpic' and `-fPIC', don't generate (do generate) instruction
+     sequences that load addresses for functions from the PLT part of
+     the GOT rather than (traditional on other architectures) calls to
+     the PLT.  The default is `-mgotplt'.
+
+`-melf'
+     Legacy no-op option only recognized with the cris-axis-elf and
+     cris-axis-linux-gnu targets.
+
+`-mlinux'
+     Legacy no-op option only recognized with the cris-axis-linux-gnu
+     target.
+
+`-sim'
+     This option, recognized for the cris-axis-elf arranges to link
+     with input-output functions from a simulator library.  Code,
+     initialized data and zero-initialized data are allocated
+     consecutively.
+
+`-sim2'
+     Like `-sim', but pass linker options to locate initialized data at
+     0x40000000 and zero-initialized data at 0x80000000.
+
+
+File: gcc.info,  Node: CRX Options,  Next: Darwin Options,  Prev: CRIS Options,  Up: Submodel Options
+
+3.17.6 CRX Options
+------------------
+
+These options are defined specifically for the CRX ports.
+
+`-mmac'
+     Enable the use of multiply-accumulate instructions. Disabled by
+     default.
+
+`-mpush-args'
+     Push instructions will be used to pass outgoing arguments when
+     functions are called. Enabled by default.
+
+
+File: gcc.info,  Node: Darwin Options,  Next: DEC Alpha Options,  Prev: CRX Options,  Up: Submodel Options
+
+3.17.7 Darwin Options
+---------------------
+
+These options are defined for all architectures running the Darwin
+operating system.
+
+ FSF GCC on Darwin does not create "fat" object files; it will create
+an object file for the single architecture that it was built to target.
+Apple's GCC on Darwin does create "fat" files if multiple `-arch'
+options are used; it does so by running the compiler or linker multiple
+times and joining the results together with `lipo'.
+
+ The subtype of the file created (like `ppc7400' or `ppc970' or `i686')
+is determined by the flags that specify the ISA that GCC is targetting,
+like `-mcpu' or `-march'.  The `-force_cpusubtype_ALL' option can be
+used to override this.
+
+ The Darwin tools vary in their behavior when presented with an ISA
+mismatch.  The assembler, `as', will only permit instructions to be
+used that are valid for the subtype of the file it is generating, so
+you cannot put 64-bit instructions in a `ppc750' object file.  The
+linker for shared libraries, `/usr/bin/libtool', will fail and print an
+error if asked to create a shared library with a less restrictive
+subtype than its input files (for instance, trying to put a `ppc970'
+object file in a `ppc7400' library).  The linker for executables, `ld',
+will quietly give the executable the most restrictive subtype of any of
+its input files.
+
+`-FDIR'
+     Add the framework directory DIR to the head of the list of
+     directories to be searched for header files.  These directories are
+     interleaved with those specified by `-I' options and are scanned
+     in a left-to-right order.
+
+     A framework directory is a directory with frameworks in it.  A
+     framework is a directory with a `"Headers"' and/or
+     `"PrivateHeaders"' directory contained directly in it that ends in
+     `".framework"'.  The name of a framework is the name of this
+     directory excluding the `".framework"'.  Headers associated with
+     the framework are found in one of those two directories, with
+     `"Headers"' being searched first.  A subframework is a framework
+     directory that is in a framework's `"Frameworks"' directory.
+     Includes of subframework headers can only appear in a header of a
+     framework that contains the subframework, or in a sibling
+     subframework header.  Two subframeworks are siblings if they occur
+     in the same framework.  A subframework should not have the same
+     name as a framework, a warning will be issued if this is violated.
+     Currently a subframework cannot have subframeworks, in the future,
+     the mechanism may be extended to support this.  The standard
+     frameworks can be found in `"/System/Library/Frameworks"' and
+     `"/Library/Frameworks"'.  An example include looks like `#include
+     <Framework/header.h>', where `Framework' denotes the name of the
+     framework and header.h is found in the `"PrivateHeaders"' or
+     `"Headers"' directory.
+
+`-iframeworkDIR'
+     Like `-F' except the directory is a treated as a system directory.
+     The main difference between this `-iframework' and `-F' is that
+     with `-iframework' the compiler does not warn about constructs
+     contained within header files found via DIR.  This option is valid
+     only for the C family of languages.
+
+`-gused'
+     Emit debugging information for symbols that are used.  For STABS
+     debugging format, this enables `-feliminate-unused-debug-symbols'.
+     This is by default ON.
+
+`-gfull'
+     Emit debugging information for all symbols and types.
+
+`-mmacosx-version-min=VERSION'
+     The earliest version of MacOS X that this executable will run on
+     is VERSION.  Typical values of VERSION include `10.1', `10.2', and
+     `10.3.9'.
+
+     If the compiler was built to use the system's headers by default,
+     then the default for this option is the system version on which the
+     compiler is running, otherwise the default is to make choices which
+     are compatible with as many systems and code bases as possible.
+
+`-mkernel'
+     Enable kernel development mode.  The `-mkernel' option sets
+     `-static', `-fno-common', `-fno-cxa-atexit', `-fno-exceptions',
+     `-fno-non-call-exceptions', `-fapple-kext', `-fno-weak' and
+     `-fno-rtti' where applicable.  This mode also sets `-mno-altivec',
+     `-msoft-float', `-fno-builtin' and `-mlong-branch' for PowerPC
+     targets.
+
+`-mone-byte-bool'
+     Override the defaults for `bool' so that `sizeof(bool)==1'.  By
+     default `sizeof(bool)' is `4' when compiling for Darwin/PowerPC
+     and `1' when compiling for Darwin/x86, so this option has no
+     effect on x86.
+
+     *Warning:* The `-mone-byte-bool' switch causes GCC to generate
+     code that is not binary compatible with code generated without
+     that switch.  Using this switch may require recompiling all other
+     modules in a program, including system libraries.  Use this switch
+     to conform to a non-default data model.
+
+`-mfix-and-continue'
+`-ffix-and-continue'
+`-findirect-data'
+     Generate code suitable for fast turn around development.  Needed to
+     enable gdb to dynamically load `.o' files into already running
+     programs.  `-findirect-data' and `-ffix-and-continue' are provided
+     for backwards compatibility.
+
+`-all_load'
+     Loads all members of static archive libraries.  See man ld(1) for
+     more information.
+
+`-arch_errors_fatal'
+     Cause the errors having to do with files that have the wrong
+     architecture to be fatal.
+
+`-bind_at_load'
+     Causes the output file to be marked such that the dynamic linker
+     will bind all undefined references when the file is loaded or
+     launched.
+
+`-bundle'
+     Produce a Mach-o bundle format file.  See man ld(1) for more
+     information.
+
+`-bundle_loader EXECUTABLE'
+     This option specifies the EXECUTABLE that will be loading the build
+     output file being linked.  See man ld(1) for more information.
+
+`-dynamiclib'
+     When passed this option, GCC will produce a dynamic library
+     instead of an executable when linking, using the Darwin `libtool'
+     command.
+
+`-force_cpusubtype_ALL'
+     This causes GCC's output file to have the ALL subtype, instead of
+     one controlled by the `-mcpu' or `-march' option.
+
+`-allowable_client  CLIENT_NAME'
+`-client_name'
+`-compatibility_version'
+`-current_version'
+`-dead_strip'
+`-dependency-file'
+`-dylib_file'
+`-dylinker_install_name'
+`-dynamic'
+`-exported_symbols_list'
+`-filelist'
+`-flat_namespace'
+`-force_flat_namespace'
+`-headerpad_max_install_names'
+`-image_base'
+`-init'
+`-install_name'
+`-keep_private_externs'
+`-multi_module'
+`-multiply_defined'
+`-multiply_defined_unused'
+`-noall_load'
+`-no_dead_strip_inits_and_terms'
+`-nofixprebinding'
+`-nomultidefs'
+`-noprebind'
+`-noseglinkedit'
+`-pagezero_size'
+`-prebind'
+`-prebind_all_twolevel_modules'
+`-private_bundle'
+`-read_only_relocs'
+`-sectalign'
+`-sectobjectsymbols'
+`-whyload'
+`-seg1addr'
+`-sectcreate'
+`-sectobjectsymbols'
+`-sectorder'
+`-segaddr'
+`-segs_read_only_addr'
+`-segs_read_write_addr'
+`-seg_addr_table'
+`-seg_addr_table_filename'
+`-seglinkedit'
+`-segprot'
+`-segs_read_only_addr'
+`-segs_read_write_addr'
+`-single_module'
+`-static'
+`-sub_library'
+`-sub_umbrella'
+`-twolevel_namespace'
+`-umbrella'
+`-undefined'
+`-unexported_symbols_list'
+`-weak_reference_mismatches'
+`-whatsloaded'
+     These options are passed to the Darwin linker.  The Darwin linker
+     man page describes them in detail.
+
+
+File: gcc.info,  Node: DEC Alpha Options,  Next: DEC Alpha/VMS Options,  Prev: Darwin Options,  Up: Submodel Options
+
+3.17.8 DEC Alpha Options
+------------------------
+
+These `-m' options are defined for the DEC Alpha implementations:
+
+`-mno-soft-float'
+`-msoft-float'
+     Use (do not use) the hardware floating-point instructions for
+     floating-point operations.  When `-msoft-float' is specified,
+     functions in `libgcc.a' will be used to perform floating-point
+     operations.  Unless they are replaced by routines that emulate the
+     floating-point operations, or compiled in such a way as to call
+     such emulations routines, these routines will issue floating-point
+     operations.   If you are compiling for an Alpha without
+     floating-point operations, you must ensure that the library is
+     built so as not to call them.
+
+     Note that Alpha implementations without floating-point operations
+     are required to have floating-point registers.
+
+`-mfp-reg'
+`-mno-fp-regs'
+     Generate code that uses (does not use) the floating-point register
+     set.  `-mno-fp-regs' implies `-msoft-float'.  If the floating-point
+     register set is not used, floating point operands are passed in
+     integer registers as if they were integers and floating-point
+     results are passed in `$0' instead of `$f0'.  This is a
+     non-standard calling sequence, so any function with a
+     floating-point argument or return value called by code compiled
+     with `-mno-fp-regs' must also be compiled with that option.
+
+     A typical use of this option is building a kernel that does not
+     use, and hence need not save and restore, any floating-point
+     registers.
+
+`-mieee'
+     The Alpha architecture implements floating-point hardware
+     optimized for maximum performance.  It is mostly compliant with
+     the IEEE floating point standard.  However, for full compliance,
+     software assistance is required.  This option generates code fully
+     IEEE compliant code _except_ that the INEXACT-FLAG is not
+     maintained (see below).  If this option is turned on, the
+     preprocessor macro `_IEEE_FP' is defined during compilation.  The
+     resulting code is less efficient but is able to correctly support
+     denormalized numbers and exceptional IEEE values such as
+     not-a-number and plus/minus infinity.  Other Alpha compilers call
+     this option `-ieee_with_no_inexact'.
+
+`-mieee-with-inexact'
+     This is like `-mieee' except the generated code also maintains the
+     IEEE INEXACT-FLAG.  Turning on this option causes the generated
+     code to implement fully-compliant IEEE math.  In addition to
+     `_IEEE_FP', `_IEEE_FP_EXACT' is defined as a preprocessor macro.
+     On some Alpha implementations the resulting code may execute
+     significantly slower than the code generated by default.  Since
+     there is very little code that depends on the INEXACT-FLAG, you
+     should normally not specify this option.  Other Alpha compilers
+     call this option `-ieee_with_inexact'.
+
+`-mfp-trap-mode=TRAP-MODE'
+     This option controls what floating-point related traps are enabled.
+     Other Alpha compilers call this option `-fptm TRAP-MODE'.  The
+     trap mode can be set to one of four values:
+
+    `n'
+          This is the default (normal) setting.  The only traps that
+          are enabled are the ones that cannot be disabled in software
+          (e.g., division by zero trap).
+
+    `u'
+          In addition to the traps enabled by `n', underflow traps are
+          enabled as well.
+
+    `su'
+          Like `u', but the instructions are marked to be safe for
+          software completion (see Alpha architecture manual for
+          details).
+
+    `sui'
+          Like `su', but inexact traps are enabled as well.
+
+`-mfp-rounding-mode=ROUNDING-MODE'
+     Selects the IEEE rounding mode.  Other Alpha compilers call this
+     option `-fprm ROUNDING-MODE'.  The ROUNDING-MODE can be one of:
+
+    `n'
+          Normal IEEE rounding mode.  Floating point numbers are
+          rounded towards the nearest machine number or towards the
+          even machine number in case of a tie.
+
+    `m'
+          Round towards minus infinity.
+
+    `c'
+          Chopped rounding mode.  Floating point numbers are rounded
+          towards zero.
+
+    `d'
+          Dynamic rounding mode.  A field in the floating point control
+          register (FPCR, see Alpha architecture reference manual)
+          controls the rounding mode in effect.  The C library
+          initializes this register for rounding towards plus infinity.
+          Thus, unless your program modifies the FPCR, `d' corresponds
+          to round towards plus infinity.
+
+`-mtrap-precision=TRAP-PRECISION'
+     In the Alpha architecture, floating point traps are imprecise.
+     This means without software assistance it is impossible to recover
+     from a floating trap and program execution normally needs to be
+     terminated.  GCC can generate code that can assist operating
+     system trap handlers in determining the exact location that caused
+     a floating point trap.  Depending on the requirements of an
+     application, different levels of precisions can be selected:
+
+    `p'
+          Program precision.  This option is the default and means a
+          trap handler can only identify which program caused a
+          floating point exception.
+
+    `f'
+          Function precision.  The trap handler can determine the
+          function that caused a floating point exception.
+
+    `i'
+          Instruction precision.  The trap handler can determine the
+          exact instruction that caused a floating point exception.
+
+     Other Alpha compilers provide the equivalent options called
+     `-scope_safe' and `-resumption_safe'.
+
+`-mieee-conformant'
+     This option marks the generated code as IEEE conformant.  You must
+     not use this option unless you also specify `-mtrap-precision=i'
+     and either `-mfp-trap-mode=su' or `-mfp-trap-mode=sui'.  Its only
+     effect is to emit the line `.eflag 48' in the function prologue of
+     the generated assembly file.  Under DEC Unix, this has the effect
+     that IEEE-conformant math library routines will be linked in.
+
+`-mbuild-constants'
+     Normally GCC examines a 32- or 64-bit integer constant to see if
+     it can construct it from smaller constants in two or three
+     instructions.  If it cannot, it will output the constant as a
+     literal and generate code to load it from the data segment at
+     runtime.
+
+     Use this option to require GCC to construct _all_ integer constants
+     using code, even if it takes more instructions (the maximum is
+     six).
+
+     You would typically use this option to build a shared library
+     dynamic loader.  Itself a shared library, it must relocate itself
+     in memory before it can find the variables and constants in its
+     own data segment.
+
+`-malpha-as'
+`-mgas'
+     Select whether to generate code to be assembled by the
+     vendor-supplied assembler (`-malpha-as') or by the GNU assembler
+     `-mgas'.
+
+`-mbwx'
+`-mno-bwx'
+`-mcix'
+`-mno-cix'
+`-mfix'
+`-mno-fix'
+`-mmax'
+`-mno-max'
+     Indicate whether GCC should generate code to use the optional BWX,
+     CIX, FIX and MAX instruction sets.  The default is to use the
+     instruction sets supported by the CPU type specified via `-mcpu='
+     option or that of the CPU on which GCC was built if none was
+     specified.
+
+`-mfloat-vax'
+`-mfloat-ieee'
+     Generate code that uses (does not use) VAX F and G floating point
+     arithmetic instead of IEEE single and double precision.
+
+`-mexplicit-relocs'
+`-mno-explicit-relocs'
+     Older Alpha assemblers provided no way to generate symbol
+     relocations except via assembler macros.  Use of these macros does
+     not allow optimal instruction scheduling.  GNU binutils as of
+     version 2.12 supports a new syntax that allows the compiler to
+     explicitly mark which relocations should apply to which
+     instructions.  This option is mostly useful for debugging, as GCC
+     detects the capabilities of the assembler when it is built and
+     sets the default accordingly.
+
+`-msmall-data'
+`-mlarge-data'
+     When `-mexplicit-relocs' is in effect, static data is accessed via
+     "gp-relative" relocations.  When `-msmall-data' is used, objects 8
+     bytes long or smaller are placed in a "small data area" (the
+     `.sdata' and `.sbss' sections) and are accessed via 16-bit
+     relocations off of the `$gp' register.  This limits the size of
+     the small data area to 64KB, but allows the variables to be
+     directly accessed via a single instruction.
+
+     The default is `-mlarge-data'.  With this option the data area is
+     limited to just below 2GB.  Programs that require more than 2GB of
+     data must use `malloc' or `mmap' to allocate the data in the heap
+     instead of in the program's data segment.
+
+     When generating code for shared libraries, `-fpic' implies
+     `-msmall-data' and `-fPIC' implies `-mlarge-data'.
+
+`-msmall-text'
+`-mlarge-text'
+     When `-msmall-text' is used, the compiler assumes that the code of
+     the entire program (or shared library) fits in 4MB, and is thus
+     reachable with a branch instruction.  When `-msmall-data' is used,
+     the compiler can assume that all local symbols share the same
+     `$gp' value, and thus reduce the number of instructions required
+     for a function call from 4 to 1.
+
+     The default is `-mlarge-text'.
+
+`-mcpu=CPU_TYPE'
+     Set the instruction set and instruction scheduling parameters for
+     machine type CPU_TYPE.  You can specify either the `EV' style name
+     or the corresponding chip number.  GCC supports scheduling
+     parameters for the EV4, EV5 and EV6 family of processors and will
+     choose the default values for the instruction set from the
+     processor you specify.  If you do not specify a processor type,
+     GCC will default to the processor on which the compiler was built.
+
+     Supported values for CPU_TYPE are
+
+    `ev4'
+    `ev45'
+    `21064'
+          Schedules as an EV4 and has no instruction set extensions.
+
+    `ev5'
+    `21164'
+          Schedules as an EV5 and has no instruction set extensions.
+
+    `ev56'
+    `21164a'
+          Schedules as an EV5 and supports the BWX extension.
+
+    `pca56'
+    `21164pc'
+    `21164PC'
+          Schedules as an EV5 and supports the BWX and MAX extensions.
+
+    `ev6'
+    `21264'
+          Schedules as an EV6 and supports the BWX, FIX, and MAX
+          extensions.
+
+    `ev67'
+    `21264a'
+          Schedules as an EV6 and supports the BWX, CIX, FIX, and MAX
+          extensions.
+
+     Native Linux/GNU toolchains also support the value `native', which
+     selects the best architecture option for the host processor.
+     `-mcpu=native' has no effect if GCC does not recognize the
+     processor.
+
+`-mtune=CPU_TYPE'
+     Set only the instruction scheduling parameters for machine type
+     CPU_TYPE.  The instruction set is not changed.
+
+     Native Linux/GNU toolchains also support the value `native', which
+     selects the best architecture option for the host processor.
+     `-mtune=native' has no effect if GCC does not recognize the
+     processor.
+
+`-mmemory-latency=TIME'
+     Sets the latency the scheduler should assume for typical memory
+     references as seen by the application.  This number is highly
+     dependent on the memory access patterns used by the application
+     and the size of the external cache on the machine.
+
+     Valid options for TIME are
+
+    `NUMBER'
+          A decimal number representing clock cycles.
+
+    `L1'
+    `L2'
+    `L3'
+    `main'
+          The compiler contains estimates of the number of clock cycles
+          for "typical" EV4 & EV5 hardware for the Level 1, 2 & 3 caches
+          (also called Dcache, Scache, and Bcache), as well as to main
+          memory.  Note that L3 is only valid for EV5.
+
+
+
+File: gcc.info,  Node: DEC Alpha/VMS Options,  Next: FR30 Options,  Prev: DEC Alpha Options,  Up: Submodel Options
+
+3.17.9 DEC Alpha/VMS Options
+----------------------------
+
+These `-m' options are defined for the DEC Alpha/VMS implementations:
+
+`-mvms-return-codes'
+     Return VMS condition codes from main.  The default is to return
+     POSIX style condition (e.g. error) codes.
+
+`-mdebug-main=PREFIX'
+     Flag the first routine whose name starts with PREFIX as the main
+     routine for the debugger.
+
+`-mmalloc64'
+     Default to 64bit memory allocation routines.
+
+
+File: gcc.info,  Node: FR30 Options,  Next: FRV Options,  Prev: DEC Alpha/VMS Options,  Up: Submodel Options
+
+3.17.10 FR30 Options
+--------------------
+
+These options are defined specifically for the FR30 port.
+
+`-msmall-model'
+     Use the small address space model.  This can produce smaller code,
+     but it does assume that all symbolic values and addresses will fit
+     into a 20-bit range.
+
+`-mno-lsim'
+     Assume that run-time support has been provided and so there is no
+     need to include the simulator library (`libsim.a') on the linker
+     command line.
+
+
+
+File: gcc.info,  Node: FRV Options,  Next: GNU/Linux Options,  Prev: FR30 Options,  Up: Submodel Options
+
+3.17.11 FRV Options
+-------------------
+
+`-mgpr-32'
+     Only use the first 32 general purpose registers.
+
+`-mgpr-64'
+     Use all 64 general purpose registers.
+
+`-mfpr-32'
+     Use only the first 32 floating point registers.
+
+`-mfpr-64'
+     Use all 64 floating point registers
+
+`-mhard-float'
+     Use hardware instructions for floating point operations.
+
+`-msoft-float'
+     Use library routines for floating point operations.
+
+`-malloc-cc'
+     Dynamically allocate condition code registers.
+
+`-mfixed-cc'
+     Do not try to dynamically allocate condition code registers, only
+     use `icc0' and `fcc0'.
+
+`-mdword'
+     Change ABI to use double word insns.
+
+`-mno-dword'
+     Do not use double word instructions.
+
+`-mdouble'
+     Use floating point double instructions.
+
+`-mno-double'
+     Do not use floating point double instructions.
+
+`-mmedia'
+     Use media instructions.
+
+`-mno-media'
+     Do not use media instructions.
+
+`-mmuladd'
+     Use multiply and add/subtract instructions.
+
+`-mno-muladd'
+     Do not use multiply and add/subtract instructions.
+
+`-mfdpic'
+     Select the FDPIC ABI, that uses function descriptors to represent
+     pointers to functions.  Without any PIC/PIE-related options, it
+     implies `-fPIE'.  With `-fpic' or `-fpie', it assumes GOT entries
+     and small data are within a 12-bit range from the GOT base
+     address; with `-fPIC' or `-fPIE', GOT offsets are computed with 32
+     bits.  With a `bfin-elf' target, this option implies `-msim'.
+
+`-minline-plt'
+     Enable inlining of PLT entries in function calls to functions that
+     are not known to bind locally.  It has no effect without `-mfdpic'.
+     It's enabled by default if optimizing for speed and compiling for
+     shared libraries (i.e., `-fPIC' or `-fpic'), or when an
+     optimization option such as `-O3' or above is present in the
+     command line.
+
+`-mTLS'
+     Assume a large TLS segment when generating thread-local code.
+
+`-mtls'
+     Do not assume a large TLS segment when generating thread-local
+     code.
+
+`-mgprel-ro'
+     Enable the use of `GPREL' relocations in the FDPIC ABI for data
+     that is known to be in read-only sections.  It's enabled by
+     default, except for `-fpic' or `-fpie': even though it may help
+     make the global offset table smaller, it trades 1 instruction for
+     4.  With `-fPIC' or `-fPIE', it trades 3 instructions for 4, one
+     of which may be shared by multiple symbols, and it avoids the need
+     for a GOT entry for the referenced symbol, so it's more likely to
+     be a win.  If it is not, `-mno-gprel-ro' can be used to disable it.
+
+`-multilib-library-pic'
+     Link with the (library, not FD) pic libraries.  It's implied by
+     `-mlibrary-pic', as well as by `-fPIC' and `-fpic' without
+     `-mfdpic'.  You should never have to use it explicitly.
+
+`-mlinked-fp'
+     Follow the EABI requirement of always creating a frame pointer
+     whenever a stack frame is allocated.  This option is enabled by
+     default and can be disabled with `-mno-linked-fp'.
+
+`-mlong-calls'
+     Use indirect addressing to call functions outside the current
+     compilation unit.  This allows the functions to be placed anywhere
+     within the 32-bit address space.
+
+`-malign-labels'
+     Try to align labels to an 8-byte boundary by inserting nops into
+     the previous packet.  This option only has an effect when VLIW
+     packing is enabled.  It doesn't create new packets; it merely adds
+     nops to existing ones.
+
+`-mlibrary-pic'
+     Generate position-independent EABI code.
+
+`-macc-4'
+     Use only the first four media accumulator registers.
+
+`-macc-8'
+     Use all eight media accumulator registers.
+
+`-mpack'
+     Pack VLIW instructions.
+
+`-mno-pack'
+     Do not pack VLIW instructions.
+
+`-mno-eflags'
+     Do not mark ABI switches in e_flags.
+
+`-mcond-move'
+     Enable the use of conditional-move instructions (default).
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-mno-cond-move'
+     Disable the use of conditional-move instructions.
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-mscc'
+     Enable the use of conditional set instructions (default).
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-mno-scc'
+     Disable the use of conditional set instructions.
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-mcond-exec'
+     Enable the use of conditional execution (default).
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-mno-cond-exec'
+     Disable the use of conditional execution.
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-mvliw-branch'
+     Run a pass to pack branches into VLIW instructions (default).
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-mno-vliw-branch'
+     Do not run a pass to pack branches into VLIW instructions.
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-mmulti-cond-exec'
+     Enable optimization of `&&' and `||' in conditional execution
+     (default).
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-mno-multi-cond-exec'
+     Disable optimization of `&&' and `||' in conditional execution.
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-mnested-cond-exec'
+     Enable nested conditional execution optimizations (default).
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-mno-nested-cond-exec'
+     Disable nested conditional execution optimizations.
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-moptimize-membar'
+     This switch removes redundant `membar' instructions from the
+     compiler generated code.  It is enabled by default.
+
+`-mno-optimize-membar'
+     This switch disables the automatic removal of redundant `membar'
+     instructions from the generated code.
+
+`-mtomcat-stats'
+     Cause gas to print out tomcat statistics.
+
+`-mcpu=CPU'
+     Select the processor type for which to generate code.  Possible
+     values are `frv', `fr550', `tomcat', `fr500', `fr450', `fr405',
+     `fr400', `fr300' and `simple'.
+
+
+
+File: gcc.info,  Node: GNU/Linux Options,  Next: H8/300 Options,  Prev: FRV Options,  Up: Submodel Options
+
+3.17.12 GNU/Linux Options
+-------------------------
+
+These `-m' options are defined for GNU/Linux targets:
+
+`-mglibc'
+     Use the GNU C library.  This is the default except on
+     `*-*-linux-*uclibc*' and `*-*-linux-*android*' targets.
+
+`-muclibc'
+     Use uClibc C library.  This is the default on `*-*-linux-*uclibc*'
+     targets.
+
+`-mbionic'
+     Use Bionic C library.  This is the default on
+     `*-*-linux-*android*' targets.
+
+`-mandroid'
+     Compile code compatible with Android platform.  This is the
+     default on `*-*-linux-*android*' targets.
+
+     When compiling, this option enables `-mbionic', `-fPIC',
+     `-fno-exceptions' and `-fno-rtti' by default.  When linking, this
+     option makes the GCC driver pass Android-specific options to the
+     linker.  Finally, this option causes the preprocessor macro
+     `__ANDROID__' to be defined.
+
+`-tno-android-cc'
+     Disable compilation effects of `-mandroid', i.e., do not enable
+     `-mbionic', `-fPIC', `-fno-exceptions' and `-fno-rtti' by default.
+
+`-tno-android-ld'
+     Disable linking effects of `-mandroid', i.e., pass standard Linux
+     linking options to the linker.
+
+
+
+File: gcc.info,  Node: H8/300 Options,  Next: HPPA Options,  Prev: GNU/Linux Options,  Up: Submodel Options
+
+3.17.13 H8/300 Options
+----------------------
+
+These `-m' options are defined for the H8/300 implementations:
+
+`-mrelax'
+     Shorten some address references at link time, when possible; uses
+     the linker option `-relax'.  *Note `ld' and the H8/300:
+     (ld)H8/300, for a fuller description.
+
+`-mh'
+     Generate code for the H8/300H.
+
+`-ms'
+     Generate code for the H8S.
+
+`-mn'
+     Generate code for the H8S and H8/300H in the normal mode.  This
+     switch must be used either with `-mh' or `-ms'.
+
+`-ms2600'
+     Generate code for the H8S/2600.  This switch must be used with
+     `-ms'.
+
+`-mint32'
+     Make `int' data 32 bits by default.
+
+`-malign-300'
+     On the H8/300H and H8S, use the same alignment rules as for the
+     H8/300.  The default for the H8/300H and H8S is to align longs and
+     floats on 4 byte boundaries.  `-malign-300' causes them to be
+     aligned on 2 byte boundaries.  This option has no effect on the
+     H8/300.
+
+
+File: gcc.info,  Node: HPPA Options,  Next: i386 and x86-64 Options,  Prev: H8/300 Options,  Up: Submodel Options
+
+3.17.14 HPPA Options
+--------------------
+
+These `-m' options are defined for the HPPA family of computers:
+
+`-march=ARCHITECTURE-TYPE'
+     Generate code for the specified architecture.  The choices for
+     ARCHITECTURE-TYPE are `1.0' for PA 1.0, `1.1' for PA 1.1, and
+     `2.0' for PA 2.0 processors.  Refer to `/usr/lib/sched.models' on
+     an HP-UX system to determine the proper architecture option for
+     your machine.  Code compiled for lower numbered architectures will
+     run on higher numbered architectures, but not the other way around.
+
+`-mpa-risc-1-0'
+`-mpa-risc-1-1'
+`-mpa-risc-2-0'
+     Synonyms for `-march=1.0', `-march=1.1', and `-march=2.0'
+     respectively.
+
+`-mbig-switch'
+     Generate code suitable for big switch tables.  Use this option
+     only if the assembler/linker complain about out of range branches
+     within a switch table.
+
+`-mjump-in-delay'
+     Fill delay slots of function calls with unconditional jump
+     instructions by modifying the return pointer for the function call
+     to be the target of the conditional jump.
+
+`-mdisable-fpregs'
+     Prevent floating point registers from being used in any manner.
+     This is necessary for compiling kernels which perform lazy context
+     switching of floating point registers.  If you use this option and
+     attempt to perform floating point operations, the compiler will
+     abort.
+
+`-mdisable-indexing'
+     Prevent the compiler from using indexing address modes.  This
+     avoids some rather obscure problems when compiling MIG generated
+     code under MACH.
+
+`-mno-space-regs'
+     Generate code that assumes the target has no space registers.
+     This allows GCC to generate faster indirect calls and use unscaled
+     index address modes.
+
+     Such code is suitable for level 0 PA systems and kernels.
+
+`-mfast-indirect-calls'
+     Generate code that assumes calls never cross space boundaries.
+     This allows GCC to emit code which performs faster indirect calls.
+
+     This option will not work in the presence of shared libraries or
+     nested functions.
+
+`-mfixed-range=REGISTER-RANGE'
+     Generate code treating the given register range as fixed registers.
+     A fixed register is one that the register allocator can not use.
+     This is useful when compiling kernel code.  A register range is
+     specified as two registers separated by a dash.  Multiple register
+     ranges can be specified separated by a comma.
+
+`-mlong-load-store'
+     Generate 3-instruction load and store sequences as sometimes
+     required by the HP-UX 10 linker.  This is equivalent to the `+k'
+     option to the HP compilers.
+
+`-mportable-runtime'
+     Use the portable calling conventions proposed by HP for ELF
+     systems.
+
+`-mgas'
+     Enable the use of assembler directives only GAS understands.
+
+`-mschedule=CPU-TYPE'
+     Schedule code according to the constraints for the machine type
+     CPU-TYPE.  The choices for CPU-TYPE are `700' `7100', `7100LC',
+     `7200', `7300' and `8000'.  Refer to `/usr/lib/sched.models' on an
+     HP-UX system to determine the proper scheduling option for your
+     machine.  The default scheduling is `8000'.
+
+`-mlinker-opt'
+     Enable the optimization pass in the HP-UX linker.  Note this makes
+     symbolic debugging impossible.  It also triggers a bug in the
+     HP-UX 8 and HP-UX 9 linkers in which they give bogus error
+     messages when linking some programs.
+
+`-msoft-float'
+     Generate output containing library calls for floating point.
+     *Warning:* the requisite libraries are not available for all HPPA
+     targets.  Normally the facilities of the machine's usual C
+     compiler are used, but this cannot be done directly in
+     cross-compilation.  You must make your own arrangements to provide
+     suitable library functions for cross-compilation.
+
+     `-msoft-float' changes the calling convention in the output file;
+     therefore, it is only useful if you compile _all_ of a program with
+     this option.  In particular, you need to compile `libgcc.a', the
+     library that comes with GCC, with `-msoft-float' in order for this
+     to work.
+
+`-msio'
+     Generate the predefine, `_SIO', for server IO.  The default is
+     `-mwsio'.  This generates the predefines, `__hp9000s700',
+     `__hp9000s700__' and `_WSIO', for workstation IO.  These options
+     are available under HP-UX and HI-UX.
+
+`-mgnu-ld'
+     Use GNU ld specific options.  This passes `-shared' to ld when
+     building a shared library.  It is the default when GCC is
+     configured, explicitly or implicitly, with the GNU linker.  This
+     option does not have any affect on which ld is called, it only
+     changes what parameters are passed to that ld.  The ld that is
+     called is determined by the `--with-ld' configure option, GCC's
+     program search path, and finally by the user's `PATH'.  The linker
+     used by GCC can be printed using `which `gcc
+     -print-prog-name=ld`'.  This option is only available on the 64
+     bit HP-UX GCC, i.e. configured with `hppa*64*-*-hpux*'.
+
+`-mhp-ld'
+     Use HP ld specific options.  This passes `-b' to ld when building
+     a shared library and passes `+Accept TypeMismatch' to ld on all
+     links.  It is the default when GCC is configured, explicitly or
+     implicitly, with the HP linker.  This option does not have any
+     affect on which ld is called, it only changes what parameters are
+     passed to that ld.  The ld that is called is determined by the
+     `--with-ld' configure option, GCC's program search path, and
+     finally by the user's `PATH'.  The linker used by GCC can be
+     printed using `which `gcc -print-prog-name=ld`'.  This option is
+     only available on the 64 bit HP-UX GCC, i.e. configured with
+     `hppa*64*-*-hpux*'.
+
+`-mlong-calls'
+     Generate code that uses long call sequences.  This ensures that a
+     call is always able to reach linker generated stubs.  The default
+     is to generate long calls only when the distance from the call
+     site to the beginning of the function or translation unit, as the
+     case may be, exceeds a predefined limit set by the branch type
+     being used.  The limits for normal calls are 7,600,000 and 240,000
+     bytes, respectively for the PA 2.0 and PA 1.X architectures.
+     Sibcalls are always limited at 240,000 bytes.
+
+     Distances are measured from the beginning of functions when using
+     the `-ffunction-sections' option, or when using the `-mgas' and
+     `-mno-portable-runtime' options together under HP-UX with the SOM
+     linker.
+
+     It is normally not desirable to use this option as it will degrade
+     performance.  However, it may be useful in large applications,
+     particularly when partial linking is used to build the application.
+
+     The types of long calls used depends on the capabilities of the
+     assembler and linker, and the type of code being generated.  The
+     impact on systems that support long absolute calls, and long pic
+     symbol-difference or pc-relative calls should be relatively small.
+     However, an indirect call is used on 32-bit ELF systems in pic code
+     and it is quite long.
+
+`-munix=UNIX-STD'
+     Generate compiler predefines and select a startfile for the
+     specified UNIX standard.  The choices for UNIX-STD are `93', `95'
+     and `98'.  `93' is supported on all HP-UX versions.  `95' is
+     available on HP-UX 10.10 and later.  `98' is available on HP-UX
+     11.11 and later.  The default values are `93' for HP-UX 10.00,
+     `95' for HP-UX 10.10 though to 11.00, and `98' for HP-UX 11.11 and
+     later.
+
+     `-munix=93' provides the same predefines as GCC 3.3 and 3.4.
+     `-munix=95' provides additional predefines for `XOPEN_UNIX' and
+     `_XOPEN_SOURCE_EXTENDED', and the startfile `unix95.o'.
+     `-munix=98' provides additional predefines for `_XOPEN_UNIX',
+     `_XOPEN_SOURCE_EXTENDED', `_INCLUDE__STDC_A1_SOURCE' and
+     `_INCLUDE_XOPEN_SOURCE_500', and the startfile `unix98.o'.
+
+     It is _important_ to note that this option changes the interfaces
+     for various library routines.  It also affects the operational
+     behavior of the C library.  Thus, _extreme_ care is needed in
+     using this option.
+
+     Library code that is intended to operate with more than one UNIX
+     standard must test, set and restore the variable
+     __XPG4_EXTENDED_MASK as appropriate.  Most GNU software doesn't
+     provide this capability.
+
+`-nolibdld'
+     Suppress the generation of link options to search libdld.sl when
+     the `-static' option is specified on HP-UX 10 and later.
+
+`-static'
+     The HP-UX implementation of setlocale in libc has a dependency on
+     libdld.sl.  There isn't an archive version of libdld.sl.  Thus,
+     when the `-static' option is specified, special link options are
+     needed to resolve this dependency.
+
+     On HP-UX 10 and later, the GCC driver adds the necessary options to
+     link with libdld.sl when the `-static' option is specified.  This
+     causes the resulting binary to be dynamic.  On the 64-bit port,
+     the linkers generate dynamic binaries by default in any case.  The
+     `-nolibdld' option can be used to prevent the GCC driver from
+     adding these link options.
+
+`-threads'
+     Add support for multithreading with the "dce thread" library under
+     HP-UX.  This option sets flags for both the preprocessor and
+     linker.
+
+
+File: gcc.info,  Node: i386 and x86-64 Options,  Next: i386 and x86-64 Windows Options,  Prev: HPPA Options,  Up: Submodel Options
+
+3.17.15 Intel 386 and AMD x86-64 Options
+----------------------------------------
+
+These `-m' options are defined for the i386 and x86-64 family of
+computers:
+
+`-mtune=CPU-TYPE'
+     Tune to CPU-TYPE everything applicable about the generated code,
+     except for the ABI and the set of available instructions.  The
+     choices for CPU-TYPE are:
+    _generic_
+          Produce code optimized for the most common IA32/AMD64/EM64T
+          processors.  If you know the CPU on which your code will run,
+          then you should use the corresponding `-mtune' option instead
+          of `-mtune=generic'.  But, if you do not know exactly what
+          CPU users of your application will have, then you should use
+          this option.
+
+          As new processors are deployed in the marketplace, the
+          behavior of this option will change.  Therefore, if you
+          upgrade to a newer version of GCC, the code generated option
+          will change to reflect the processors that were most common
+          when that version of GCC was released.
+
+          There is no `-march=generic' option because `-march'
+          indicates the instruction set the compiler can use, and there
+          is no generic instruction set applicable to all processors.
+          In contrast, `-mtune' indicates the processor (or, in this
+          case, collection of processors) for which the code is
+          optimized.
+
+    _native_
+          This selects the CPU to tune for at compilation time by
+          determining the processor type of the compiling machine.
+          Using `-mtune=native' will produce code optimized for the
+          local machine under the constraints of the selected
+          instruction set.  Using `-march=native' will enable all
+          instruction subsets supported by the local machine (hence the
+          result might not run on different machines).
+
+    _i386_
+          Original Intel's i386 CPU.
+
+    _i486_
+          Intel's i486 CPU.  (No scheduling is implemented for this
+          chip.)
+
+    _i586, pentium_
+          Intel Pentium CPU with no MMX support.
+
+    _pentium-mmx_
+          Intel PentiumMMX CPU based on Pentium core with MMX
+          instruction set support.
+
+    _pentiumpro_
+          Intel PentiumPro CPU.
+
+    _i686_
+          Same as `generic', but when used as `march' option, PentiumPro
+          instruction set will be used, so the code will run on all
+          i686 family chips.
+
+    _pentium2_
+          Intel Pentium2 CPU based on PentiumPro core with MMX
+          instruction set support.
+
+    _pentium3, pentium3m_
+          Intel Pentium3 CPU based on PentiumPro core with MMX and SSE
+          instruction set support.
+
+    _pentium-m_
+          Low power version of Intel Pentium3 CPU with MMX, SSE and
+          SSE2 instruction set support.  Used by Centrino notebooks.
+
+    _pentium4, pentium4m_
+          Intel Pentium4 CPU with MMX, SSE and SSE2 instruction set
+          support.
+
+    _prescott_
+          Improved version of Intel Pentium4 CPU with MMX, SSE, SSE2
+          and SSE3 instruction set support.
+
+    _nocona_
+          Improved version of Intel Pentium4 CPU with 64-bit
+          extensions, MMX, SSE, SSE2 and SSE3 instruction set support.
+
+    _core2_
+          Intel Core2 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3
+          and SSSE3 instruction set support.
+
+    _corei7_
+          Intel Core i7 CPU with 64-bit extensions, MMX, SSE, SSE2,
+          SSE3, SSSE3, SSE4.1 and SSE4.2 instruction set support.
+
+    _corei7-avx_
+          Intel Core i7 CPU with 64-bit extensions, MMX, SSE, SSE2,
+          SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AES and PCLMUL instruction
+          set support.
+
+    _core-avx-i_
+          Intel Core CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3,
+          SSSE3, SSE4.1, SSE4.2, AVX, AES, PCLMUL, FSGSBASE, RDRND and
+          F16C instruction set support.
+
+    _atom_
+          Intel Atom CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3
+          and SSSE3 instruction set support.
+
+    _k6_
+          AMD K6 CPU with MMX instruction set support.
+
+    _k6-2, k6-3_
+          Improved versions of AMD K6 CPU with MMX and 3DNow!
+          instruction set support.
+
+    _athlon, athlon-tbird_
+          AMD Athlon CPU with MMX, 3dNOW!, enhanced 3DNow! and SSE
+          prefetch instructions support.
+
+    _athlon-4, athlon-xp, athlon-mp_
+          Improved AMD Athlon CPU with MMX, 3DNow!, enhanced 3DNow! and
+          full SSE instruction set support.
+
+    _k8, opteron, athlon64, athlon-fx_
+          AMD K8 core based CPUs with x86-64 instruction set support.
+          (This supersets MMX, SSE, SSE2, 3DNow!, enhanced 3DNow! and
+          64-bit instruction set extensions.)
+
+    _k8-sse3, opteron-sse3, athlon64-sse3_
+          Improved versions of k8, opteron and athlon64 with SSE3
+          instruction set support.
+
+    _amdfam10, barcelona_
+          AMD Family 10h core based CPUs with x86-64 instruction set
+          support.  (This supersets MMX, SSE, SSE2, SSE3, SSE4A,
+          3DNow!, enhanced 3DNow!, ABM and 64-bit instruction set
+          extensions.)
+
+    _winchip-c6_
+          IDT Winchip C6 CPU, dealt in same way as i486 with additional
+          MMX instruction set support.
+
+    _winchip2_
+          IDT Winchip2 CPU, dealt in same way as i486 with additional
+          MMX and 3DNow!  instruction set support.
+
+    _c3_
+          Via C3 CPU with MMX and 3DNow! instruction set support.  (No
+          scheduling is implemented for this chip.)
+
+    _c3-2_
+          Via C3-2 CPU with MMX and SSE instruction set support.  (No
+          scheduling is implemented for this chip.)
+
+    _geode_
+          Embedded AMD CPU with MMX and 3DNow! instruction set support.
+
+     While picking a specific CPU-TYPE will schedule things
+     appropriately for that particular chip, the compiler will not
+     generate any code that does not run on the i386 without the
+     `-march=CPU-TYPE' option being used.
+
+`-march=CPU-TYPE'
+     Generate instructions for the machine type CPU-TYPE.  The choices
+     for CPU-TYPE are the same as for `-mtune'.  Moreover, specifying
+     `-march=CPU-TYPE' implies `-mtune=CPU-TYPE'.
+
+`-mcpu=CPU-TYPE'
+     A deprecated synonym for `-mtune'.
+
+`-mfpmath=UNIT'
+     Generate floating point arithmetics for selected unit UNIT.  The
+     choices for UNIT are:
+
+    `387'
+          Use the standard 387 floating point coprocessor present
+          majority of chips and emulated otherwise.  Code compiled with
+          this option will run almost everywhere.  The temporary
+          results are computed in 80bit precision instead of precision
+          specified by the type resulting in slightly different results
+          compared to most of other chips.  See `-ffloat-store' for
+          more detailed description.
+
+          This is the default choice for i386 compiler.
+
+    `sse'
+          Use scalar floating point instructions present in the SSE
+          instruction set.  This instruction set is supported by
+          Pentium3 and newer chips, in the AMD line by Athlon-4,
+          Athlon-xp and Athlon-mp chips.  The earlier version of SSE
+          instruction set supports only single precision arithmetics,
+          thus the double and extended precision arithmetics is still
+          done using 387.  Later version, present only in Pentium4 and
+          the future AMD x86-64 chips supports double precision
+          arithmetics too.
+
+          For the i386 compiler, you need to use `-march=CPU-TYPE',
+          `-msse' or `-msse2' switches to enable SSE extensions and
+          make this option effective.  For the x86-64 compiler, these
+          extensions are enabled by default.
+
+          The resulting code should be considerably faster in the
+          majority of cases and avoid the numerical instability
+          problems of 387 code, but may break some existing code that
+          expects temporaries to be 80bit.
+
+          This is the default choice for the x86-64 compiler.
+
+    `sse,387'
+    `sse+387'
+    `both'
+          Attempt to utilize both instruction sets at once.  This
+          effectively double the amount of available registers and on
+          chips with separate execution units for 387 and SSE the
+          execution resources too.  Use this option with care, as it is
+          still experimental, because the GCC register allocator does
+          not model separate functional units well resulting in
+          instable performance.
+
+`-masm=DIALECT'
+     Output asm instructions using selected DIALECT.  Supported choices
+     are `intel' or `att' (the default one).  Darwin does not support
+     `intel'.
+
+`-mieee-fp'
+`-mno-ieee-fp'
+     Control whether or not the compiler uses IEEE floating point
+     comparisons.  These handle correctly the case where the result of a
+     comparison is unordered.
+
+`-msoft-float'
+     Generate output containing library calls for floating point.
+     *Warning:* the requisite libraries are not part of GCC.  Normally
+     the facilities of the machine's usual C compiler are used, but
+     this can't be done directly in cross-compilation.  You must make
+     your own arrangements to provide suitable library functions for
+     cross-compilation.
+
+     On machines where a function returns floating point results in the
+     80387 register stack, some floating point opcodes may be emitted
+     even if `-msoft-float' is used.
+
+`-mno-fp-ret-in-387'
+     Do not use the FPU registers for return values of functions.
+
+     The usual calling convention has functions return values of types
+     `float' and `double' in an FPU register, even if there is no FPU.
+     The idea is that the operating system should emulate an FPU.
+
+     The option `-mno-fp-ret-in-387' causes such values to be returned
+     in ordinary CPU registers instead.
+
+`-mno-fancy-math-387'
+     Some 387 emulators do not support the `sin', `cos' and `sqrt'
+     instructions for the 387.  Specify this option to avoid generating
+     those instructions.  This option is the default on FreeBSD,
+     OpenBSD and NetBSD.  This option is overridden when `-march'
+     indicates that the target CPU will always have an FPU and so the
+     instruction will not need emulation.  As of revision 2.6.1, these
+     instructions are not generated unless you also use the
+     `-funsafe-math-optimizations' switch.
+
+`-malign-double'
+`-mno-align-double'
+     Control whether GCC aligns `double', `long double', and `long
+     long' variables on a two word boundary or a one word boundary.
+     Aligning `double' variables on a two word boundary will produce
+     code that runs somewhat faster on a `Pentium' at the expense of
+     more memory.
+
+     On x86-64, `-malign-double' is enabled by default.
+
+     *Warning:* if you use the `-malign-double' switch, structures
+     containing the above types will be aligned differently than the
+     published application binary interface specifications for the 386
+     and will not be binary compatible with structures in code compiled
+     without that switch.
+
+`-m96bit-long-double'
+`-m128bit-long-double'
+     These switches control the size of `long double' type.  The i386
+     application binary interface specifies the size to be 96 bits, so
+     `-m96bit-long-double' is the default in 32 bit mode.
+
+     Modern architectures (Pentium and newer) would prefer `long double'
+     to be aligned to an 8 or 16 byte boundary.  In arrays or structures
+     conforming to the ABI, this would not be possible.  So specifying a
+     `-m128bit-long-double' will align `long double' to a 16 byte
+     boundary by padding the `long double' with an additional 32 bit
+     zero.
+
+     In the x86-64 compiler, `-m128bit-long-double' is the default
+     choice as its ABI specifies that `long double' is to be aligned on
+     16 byte boundary.
+
+     Notice that neither of these options enable any extra precision
+     over the x87 standard of 80 bits for a `long double'.
+
+     *Warning:* if you override the default value for your target ABI,
+     the structures and arrays containing `long double' variables will
+     change their size as well as function calling convention for
+     function taking `long double' will be modified.  Hence they will
+     not be binary compatible with arrays or structures in code
+     compiled without that switch.
+
+`-mlarge-data-threshold=NUMBER'
+     When `-mcmodel=medium' is specified, the data greater than
+     THRESHOLD are placed in large data section.  This value must be the
+     same across all object linked into the binary and defaults to
+     65535.
+
+`-mrtd'
+     Use a different function-calling convention, in which functions
+     that take a fixed number of arguments return with the `ret' NUM
+     instruction, which pops their arguments while returning.  This
+     saves one instruction in the caller since there is no need to pop
+     the arguments there.
+
+     You can specify that an individual function is called with this
+     calling sequence with the function attribute `stdcall'.  You can
+     also override the `-mrtd' option by using the function attribute
+     `cdecl'.  *Note Function Attributes::.
+
+     *Warning:* this calling convention is incompatible with the one
+     normally used on Unix, so you cannot use it if you need to call
+     libraries compiled with the Unix compiler.
+
+     Also, you must provide function prototypes for all functions that
+     take variable numbers of arguments (including `printf'); otherwise
+     incorrect code will be generated for calls to those functions.
+
+     In addition, seriously incorrect code will result if you call a
+     function with too many arguments.  (Normally, extra arguments are
+     harmlessly ignored.)
+
+`-mregparm=NUM'
+     Control how many registers are used to pass integer arguments.  By
+     default, no registers are used to pass arguments, and at most 3
+     registers can be used.  You can control this behavior for a
+     specific function by using the function attribute `regparm'.
+     *Note Function Attributes::.
+
+     *Warning:* if you use this switch, and NUM is nonzero, then you
+     must build all modules with the same value, including any
+     libraries.  This includes the system libraries and startup modules.
+
+`-msseregparm'
+     Use SSE register passing conventions for float and double arguments
+     and return values.  You can control this behavior for a specific
+     function by using the function attribute `sseregparm'.  *Note
+     Function Attributes::.
+
+     *Warning:* if you use this switch then you must build all modules
+     with the same value, including any libraries.  This includes the
+     system libraries and startup modules.
+
+`-mvect8-ret-in-mem'
+     Return 8-byte vectors in memory instead of MMX registers.  This is
+     the default on Solaris 8 and 9 and VxWorks to match the ABI of the
+     Sun Studio compilers until version 12.  Later compiler versions
+     (starting with Studio 12 Update 1) follow the ABI used by other
+     x86 targets, which is the default on Solaris 10 and later.  _Only_
+     use this option if you need to remain compatible with existing
+     code produced by those previous compiler versions or older
+     versions of GCC.
+
+`-mpc32'
+`-mpc64'
+`-mpc80'
+     Set 80387 floating-point precision to 32, 64 or 80 bits.  When
+     `-mpc32' is specified, the significands of results of
+     floating-point operations are rounded to 24 bits (single
+     precision); `-mpc64' rounds the significands of results of
+     floating-point operations to 53 bits (double precision) and
+     `-mpc80' rounds the significands of results of floating-point
+     operations to 64 bits (extended double precision), which is the
+     default.  When this option is used, floating-point operations in
+     higher precisions are not available to the programmer without
+     setting the FPU control word explicitly.
+
+     Setting the rounding of floating-point operations to less than the
+     default 80 bits can speed some programs by 2% or more.  Note that
+     some mathematical libraries assume that extended precision (80
+     bit) floating-point operations are enabled by default; routines in
+     such libraries could suffer significant loss of accuracy,
+     typically through so-called "catastrophic cancellation", when this
+     option is used to set the precision to less than extended
+     precision.
+
+`-mstackrealign'
+     Realign the stack at entry.  On the Intel x86, the `-mstackrealign'
+     option will generate an alternate prologue and epilogue that
+     realigns the runtime stack if necessary.  This supports mixing
+     legacy codes that keep a 4-byte aligned stack with modern codes
+     that keep a 16-byte stack for SSE compatibility.  See also the
+     attribute `force_align_arg_pointer', applicable to individual
+     functions.
+
+`-mpreferred-stack-boundary=NUM'
+     Attempt to keep the stack boundary aligned to a 2 raised to NUM
+     byte boundary.  If `-mpreferred-stack-boundary' is not specified,
+     the default is 4 (16 bytes or 128 bits).
+
+`-mincoming-stack-boundary=NUM'
+     Assume the incoming stack is aligned to a 2 raised to NUM byte
+     boundary.  If `-mincoming-stack-boundary' is not specified, the
+     one specified by `-mpreferred-stack-boundary' will be used.
+
+     On Pentium and PentiumPro, `double' and `long double' values
+     should be aligned to an 8 byte boundary (see `-malign-double') or
+     suffer significant run time performance penalties.  On Pentium
+     III, the Streaming SIMD Extension (SSE) data type `__m128' may not
+     work properly if it is not 16 byte aligned.
+
+     To ensure proper alignment of this values on the stack, the stack
+     boundary must be as aligned as that required by any value stored
+     on the stack.  Further, every function must be generated such that
+     it keeps the stack aligned.  Thus calling a function compiled with
+     a higher preferred stack boundary from a function compiled with a
+     lower preferred stack boundary will most likely misalign the
+     stack.  It is recommended that libraries that use callbacks always
+     use the default setting.
+
+     This extra alignment does consume extra stack space, and generally
+     increases code size.  Code that is sensitive to stack space usage,
+     such as embedded systems and operating system kernels, may want to
+     reduce the preferred alignment to `-mpreferred-stack-boundary=2'.
+
+`-mmmx'
+`-mno-mmx'
+`-msse'
+`-mno-sse'
+`-msse2'
+`-mno-sse2'
+`-msse3'
+`-mno-sse3'
+`-mssse3'
+`-mno-ssse3'
+`-msse4.1'
+`-mno-sse4.1'
+`-msse4.2'
+`-mno-sse4.2'
+`-msse4'
+`-mno-sse4'
+`-mavx'
+`-mno-avx'
+`-maes'
+`-mno-aes'
+`-mpclmul'
+`-mno-pclmul'
+`-mfsgsbase'
+`-mno-fsgsbase'
+`-mrdrnd'
+`-mno-rdrnd'
+`-mf16c'
+`-mno-f16c'
+`-msse4a'
+`-mno-sse4a'
+`-mfma4'
+`-mno-fma4'
+`-mxop'
+`-mno-xop'
+`-mlwp'
+`-mno-lwp'
+`-m3dnow'
+`-mno-3dnow'
+`-mpopcnt'
+`-mno-popcnt'
+`-mabm'
+`-mno-abm'
+`-mbmi'
+`-mno-bmi'
+`-mtbm'
+`-mno-tbm'
+     These switches enable or disable the use of instructions in the
+     MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, AVX, AES, PCLMUL, FSGSBASE,
+     RDRND, F16C, SSE4A, FMA4, XOP, LWP, ABM, BMI, or 3DNow! extended
+     instruction sets.  These extensions are also available as built-in
+     functions: see *note X86 Built-in Functions::, for details of the
+     functions enabled and disabled by these switches.
+
+     To have SSE/SSE2 instructions generated automatically from
+     floating-point code (as opposed to 387 instructions), see
+     `-mfpmath=sse'.
+
+     GCC depresses SSEx instructions when `-mavx' is used. Instead, it
+     generates new AVX instructions or AVX equivalence for all SSEx
+     instructions when needed.
+
+     These options will enable GCC to use these extended instructions in
+     generated code, even without `-mfpmath=sse'.  Applications which
+     perform runtime CPU detection must compile separate files for each
+     supported architecture, using the appropriate flags.  In
+     particular, the file containing the CPU detection code should be
+     compiled without these options.
+
+`-mfused-madd'
+`-mno-fused-madd'
+     Do (don't) generate code that uses the fused multiply/add or
+     multiply/subtract instructions.  The default is to use these
+     instructions.
+
+`-mcld'
+     This option instructs GCC to emit a `cld' instruction in the
+     prologue of functions that use string instructions.  String
+     instructions depend on the DF flag to select between autoincrement
+     or autodecrement mode.  While the ABI specifies the DF flag to be
+     cleared on function entry, some operating systems violate this
+     specification by not clearing the DF flag in their exception
+     dispatchers.  The exception handler can be invoked with the DF flag
+     set which leads to wrong direction mode, when string instructions
+     are used.  This option can be enabled by default on 32-bit x86
+     targets by configuring GCC with the `--enable-cld' configure
+     option.  Generation of `cld' instructions can be suppressed with
+     the `-mno-cld' compiler option in this case.
+
+`-mvzeroupper'
+     This option instructs GCC to emit a `vzeroupper' instruction
+     before a transfer of control flow out of the function to minimize
+     AVX to SSE transition penalty as well as remove unnecessary
+     zeroupper intrinsics.
+
+`-mprefer-avx128'
+     This option instructs GCC to use 128-bit AVX instructions instead
+     of 256-bit AVX instructions in the auto-vectorizer.
+
+`-mcx16'
+     This option will enable GCC to use CMPXCHG16B instruction in
+     generated code.  CMPXCHG16B allows for atomic operations on
+     128-bit double quadword (or oword) data types.  This is useful for
+     high resolution counters that could be updated by multiple
+     processors (or cores).  This instruction is generated as part of
+     atomic built-in functions: see *note Atomic Builtins:: for details.
+
+`-msahf'
+     This option will enable GCC to use SAHF instruction in generated
+     64-bit code.  Early Intel CPUs with Intel 64 lacked LAHF and SAHF
+     instructions supported by AMD64 until introduction of Pentium 4 G1
+     step in December 2005.  LAHF and SAHF are load and store
+     instructions, respectively, for certain status flags.  In 64-bit
+     mode, SAHF instruction is used to optimize `fmod', `drem' or
+     `remainder' built-in functions: see *note Other Builtins:: for
+     details.
+
+`-mmovbe'
+     This option will enable GCC to use movbe instruction to implement
+     `__builtin_bswap32' and `__builtin_bswap64'.
+
+`-mcrc32'
+     This option will enable built-in functions,
+     `__builtin_ia32_crc32qi', `__builtin_ia32_crc32hi'.
+     `__builtin_ia32_crc32si' and `__builtin_ia32_crc32di' to generate
+     the crc32 machine instruction.
+
+`-mrecip'
+     This option will enable GCC to use RCPSS and RSQRTSS instructions
+     (and their vectorized variants RCPPS and RSQRTPS) with an
+     additional Newton-Raphson step to increase precision instead of
+     DIVSS and SQRTSS (and their vectorized variants) for single
+     precision floating point arguments.  These instructions are
+     generated only when `-funsafe-math-optimizations' is enabled
+     together with `-finite-math-only' and `-fno-trapping-math'.  Note
+     that while the throughput of the sequence is higher than the
+     throughput of the non-reciprocal instruction, the precision of the
+     sequence can be decreased by up to 2 ulp (i.e. the inverse of 1.0
+     equals 0.99999994).
+
+     Note that GCC implements 1.0f/sqrtf(x) in terms of RSQRTSS (or
+     RSQRTPS) already with `-ffast-math' (or the above option
+     combination), and doesn't need `-mrecip'.
+
+`-mveclibabi=TYPE'
+     Specifies the ABI type to use for vectorizing intrinsics using an
+     external library.  Supported types are `svml' for the Intel short
+     vector math library and `acml' for the AMD math core library style
+     of interfacing.  GCC will currently emit calls to `vmldExp2',
+     `vmldLn2', `vmldLog102', `vmldLog102', `vmldPow2', `vmldTanh2',
+     `vmldTan2', `vmldAtan2', `vmldAtanh2', `vmldCbrt2', `vmldSinh2',
+     `vmldSin2', `vmldAsinh2', `vmldAsin2', `vmldCosh2', `vmldCos2',
+     `vmldAcosh2', `vmldAcos2', `vmlsExp4', `vmlsLn4', `vmlsLog104',
+     `vmlsLog104', `vmlsPow4', `vmlsTanh4', `vmlsTan4', `vmlsAtan4',
+     `vmlsAtanh4', `vmlsCbrt4', `vmlsSinh4', `vmlsSin4', `vmlsAsinh4',
+     `vmlsAsin4', `vmlsCosh4', `vmlsCos4', `vmlsAcosh4' and `vmlsAcos4'
+     for corresponding function type when `-mveclibabi=svml' is used
+     and `__vrd2_sin', `__vrd2_cos', `__vrd2_exp', `__vrd2_log',
+     `__vrd2_log2', `__vrd2_log10', `__vrs4_sinf', `__vrs4_cosf',
+     `__vrs4_expf', `__vrs4_logf', `__vrs4_log2f', `__vrs4_log10f' and
+     `__vrs4_powf' for corresponding function type when
+     `-mveclibabi=acml' is used. Both `-ftree-vectorize' and
+     `-funsafe-math-optimizations' have to be enabled. A SVML or ACML
+     ABI compatible library will have to be specified at link time.
+
+`-mabi=NAME'
+     Generate code for the specified calling convention.  Permissible
+     values are: `sysv' for the ABI used on GNU/Linux and other systems
+     and `ms' for the Microsoft ABI.  The default is to use the
+     Microsoft ABI when targeting Windows.  On all other systems, the
+     default is the SYSV ABI.  You can control this behavior for a
+     specific function by using the function attribute
+     `ms_abi'/`sysv_abi'.  *Note Function Attributes::.
+
+`-mpush-args'
+`-mno-push-args'
+     Use PUSH operations to store outgoing parameters.  This method is
+     shorter and usually equally fast as method using SUB/MOV
+     operations and is enabled by default.  In some cases disabling it
+     may improve performance because of improved scheduling and reduced
+     dependencies.
+
+`-maccumulate-outgoing-args'
+     If enabled, the maximum amount of space required for outgoing
+     arguments will be computed in the function prologue.  This is
+     faster on most modern CPUs because of reduced dependencies,
+     improved scheduling and reduced stack usage when preferred stack
+     boundary is not equal to 2.  The drawback is a notable increase in
+     code size.  This switch implies `-mno-push-args'.
+
+`-mthreads'
+     Support thread-safe exception handling on `Mingw32'.  Code that
+     relies on thread-safe exception handling must compile and link all
+     code with the `-mthreads' option.  When compiling, `-mthreads'
+     defines `-D_MT'; when linking, it links in a special thread helper
+     library `-lmingwthrd' which cleans up per thread exception
+     handling data.
+
+`-mno-align-stringops'
+     Do not align destination of inlined string operations.  This
+     switch reduces code size and improves performance in case the
+     destination is already aligned, but GCC doesn't know about it.
+
+`-minline-all-stringops'
+     By default GCC inlines string operations only when destination is
+     known to be aligned at least to 4 byte boundary.  This enables
+     more inlining, increase code size, but may improve performance of
+     code that depends on fast memcpy, strlen and memset for short
+     lengths.
+
+`-minline-stringops-dynamically'
+     For string operation of unknown size, inline runtime checks so for
+     small blocks inline code is used, while for large blocks library
+     call is used.
+
+`-mstringop-strategy=ALG'
+     Overwrite internal decision heuristic about particular algorithm
+     to inline string operation with.  The allowed values are
+     `rep_byte', `rep_4byte', `rep_8byte' for expanding using i386
+     `rep' prefix of specified size, `byte_loop', `loop',
+     `unrolled_loop' for expanding inline loop, `libcall' for always
+     expanding library call.
+
+`-momit-leaf-frame-pointer'
+     Don't keep the frame pointer in a register for leaf functions.
+     This avoids the instructions to save, set up and restore frame
+     pointers and makes an extra register available in leaf functions.
+     The option `-fomit-frame-pointer' removes the frame pointer for
+     all functions which might make debugging harder.
+
+`-mtls-direct-seg-refs'
+`-mno-tls-direct-seg-refs'
+     Controls whether TLS variables may be accessed with offsets from
+     the TLS segment register (`%gs' for 32-bit, `%fs' for 64-bit), or
+     whether the thread base pointer must be added.  Whether or not this
+     is legal depends on the operating system, and whether it maps the
+     segment to cover the entire TLS area.
+
+     For systems that use GNU libc, the default is on.
+
+`-msse2avx'
+`-mno-sse2avx'
+     Specify that the assembler should encode SSE instructions with VEX
+     prefix.  The option `-mavx' turns this on by default.
+
+`-mfentry'
+`-mno-fentry'
+     If profiling is active `-pg' put the profiling counter call before
+     prologue.  Note: On x86 architectures the attribute
+     `ms_hook_prologue' isn't possible at the moment for `-mfentry' and
+     `-pg'.
+
+`-m8bit-idiv'
+`-mno-8bit-idiv'
+     On some processors, like Intel Atom, 8bit unsigned integer divide
+     is much faster than 32bit/64bit integer divide.  This option will
+     generate a runt-time check.  If both dividend and divisor are
+     within range of 0 to 255, 8bit unsigned integer divide will be
+     used instead of 32bit/64bit integer divide.
+
+`-mavx256-split-unaligned-load'
+
+`-mavx256-split-unaligned-store'
+     Split 32-byte AVX unaligned load and store.
+
+
+ These `-m' switches are supported in addition to the above on AMD
+x86-64 processors in 64-bit environments.
+
+`-m32'
+`-m64'
+     Generate code for a 32-bit or 64-bit environment.  The 32-bit
+     environment sets int, long and pointer to 32 bits and generates
+     code that runs on any i386 system.  The 64-bit environment sets
+     int to 32 bits and long and pointer to 64 bits and generates code
+     for AMD's x86-64 architecture. For darwin only the -m64 option
+     turns off the `-fno-pic' and `-mdynamic-no-pic' options.
+
+`-mno-red-zone'
+     Do not use a so called red zone for x86-64 code.  The red zone is
+     mandated by the x86-64 ABI, it is a 128-byte area beyond the
+     location of the stack pointer that will not be modified by signal
+     or interrupt handlers and therefore can be used for temporary data
+     without adjusting the stack pointer.  The flag `-mno-red-zone'
+     disables this red zone.
+
+`-mcmodel=small'
+     Generate code for the small code model: the program and its
+     symbols must be linked in the lower 2 GB of the address space.
+     Pointers are 64 bits.  Programs can be statically or dynamically
+     linked.  This is the default code model.
+
+`-mcmodel=kernel'
+     Generate code for the kernel code model.  The kernel runs in the
+     negative 2 GB of the address space.  This model has to be used for
+     Linux kernel code.
+
+`-mcmodel=medium'
+     Generate code for the medium model: The program is linked in the
+     lower 2 GB of the address space.  Small symbols are also placed
+     there.  Symbols with sizes larger than `-mlarge-data-threshold'
+     are put into large data or bss sections and can be located above
+     2GB.  Programs can be statically or dynamically linked.
+
+`-mcmodel=large'
+     Generate code for the large model: This model makes no assumptions
+     about addresses and sizes of sections.
+
+
+File: gcc.info,  Node: i386 and x86-64 Windows Options,  Next: IA-64 Options,  Prev: i386 and x86-64 Options,  Up: Submodel Options
+
+3.17.16 i386 and x86-64 Windows Options
+---------------------------------------
+
+These additional options are available for Windows targets:
+
+`-mconsole'
+     This option is available for Cygwin and MinGW targets.  It
+     specifies that a console application is to be generated, by
+     instructing the linker to set the PE header subsystem type
+     required for console applications.  This is the default behavior
+     for Cygwin and MinGW targets.
+
+`-mdll'
+     This option is available for Cygwin and MinGW targets.  It
+     specifies that a DLL - a dynamic link library - is to be
+     generated, enabling the selection of the required runtime startup
+     object and entry point.
+
+`-mnop-fun-dllimport'
+     This option is available for Cygwin and MinGW targets.  It
+     specifies that the dllimport attribute should be ignored.
+
+`-mthread'
+     This option is available for MinGW targets. It specifies that
+     MinGW-specific thread support is to be used.
+
+`-municode'
+     This option is available for mingw-w64 targets.  It specifies that
+     the UNICODE macro is getting pre-defined and that the unicode
+     capable runtime startup code is chosen.
+
+`-mwin32'
+     This option is available for Cygwin and MinGW targets.  It
+     specifies that the typical Windows pre-defined macros are to be
+     set in the pre-processor, but does not influence the choice of
+     runtime library/startup code.
+
+`-mwindows'
+     This option is available for Cygwin and MinGW targets.  It
+     specifies that a GUI application is to be generated by instructing
+     the linker to set the PE header subsystem type appropriately.
+
+`-fno-set-stack-executable'
+     This option is available for MinGW targets. It specifies that the
+     executable flag for stack used by nested functions isn't set. This
+     is necessary for binaries running in kernel mode of Windows, as
+     there the user32 API, which is used to set executable privileges,
+     isn't available.
+
+`-mpe-aligned-commons'
+     This option is available for Cygwin and MinGW targets.  It
+     specifies that the GNU extension to the PE file format that
+     permits the correct alignment of COMMON variables should be used
+     when generating code.  It will be enabled by default if GCC
+     detects that the target assembler found during configuration
+     supports the feature.
+
+ See also under *note i386 and x86-64 Options:: for standard options.
+
+
+File: gcc.info,  Node: IA-64 Options,  Next: IA-64/VMS Options,  Prev: i386 and x86-64 Windows Options,  Up: Submodel Options
+
+3.17.17 IA-64 Options
+---------------------
+
+These are the `-m' options defined for the Intel IA-64 architecture.
+
+`-mbig-endian'
+     Generate code for a big endian target.  This is the default for
+     HP-UX.
+
+`-mlittle-endian'
+     Generate code for a little endian target.  This is the default for
+     AIX5 and GNU/Linux.
+
+`-mgnu-as'
+`-mno-gnu-as'
+     Generate (or don't) code for the GNU assembler.  This is the
+     default.
+
+`-mgnu-ld'
+`-mno-gnu-ld'
+     Generate (or don't) code for the GNU linker.  This is the default.
+
+`-mno-pic'
+     Generate code that does not use a global pointer register.  The
+     result is not position independent code, and violates the IA-64
+     ABI.
+
+`-mvolatile-asm-stop'
+`-mno-volatile-asm-stop'
+     Generate (or don't) a stop bit immediately before and after
+     volatile asm statements.
+
+`-mregister-names'
+`-mno-register-names'
+     Generate (or don't) `in', `loc', and `out' register names for the
+     stacked registers.  This may make assembler output more readable.
+
+`-mno-sdata'
+`-msdata'
+     Disable (or enable) optimizations that use the small data section.
+     This may be useful for working around optimizer bugs.
+
+`-mconstant-gp'
+     Generate code that uses a single constant global pointer value.
+     This is useful when compiling kernel code.
+
+`-mauto-pic'
+     Generate code that is self-relocatable.  This implies
+     `-mconstant-gp'.  This is useful when compiling firmware code.
+
+`-minline-float-divide-min-latency'
+     Generate code for inline divides of floating point values using
+     the minimum latency algorithm.
+
+`-minline-float-divide-max-throughput'
+     Generate code for inline divides of floating point values using
+     the maximum throughput algorithm.
+
+`-mno-inline-float-divide'
+     Do not generate inline code for divides of floating point values.
+
+`-minline-int-divide-min-latency'
+     Generate code for inline divides of integer values using the
+     minimum latency algorithm.
+
+`-minline-int-divide-max-throughput'
+     Generate code for inline divides of integer values using the
+     maximum throughput algorithm.
+
+`-mno-inline-int-divide'
+     Do not generate inline code for divides of integer values.
+
+`-minline-sqrt-min-latency'
+     Generate code for inline square roots using the minimum latency
+     algorithm.
+
+`-minline-sqrt-max-throughput'
+     Generate code for inline square roots using the maximum throughput
+     algorithm.
+
+`-mno-inline-sqrt'
+     Do not generate inline code for sqrt.
+
+`-mfused-madd'
+`-mno-fused-madd'
+     Do (don't) generate code that uses the fused multiply/add or
+     multiply/subtract instructions.  The default is to use these
+     instructions.
+
+`-mno-dwarf2-asm'
+`-mdwarf2-asm'
+     Don't (or do) generate assembler code for the DWARF2 line number
+     debugging info.  This may be useful when not using the GNU
+     assembler.
+
+`-mearly-stop-bits'
+`-mno-early-stop-bits'
+     Allow stop bits to be placed earlier than immediately preceding the
+     instruction that triggered the stop bit.  This can improve
+     instruction scheduling, but does not always do so.
+
+`-mfixed-range=REGISTER-RANGE'
+     Generate code treating the given register range as fixed registers.
+     A fixed register is one that the register allocator can not use.
+     This is useful when compiling kernel code.  A register range is
+     specified as two registers separated by a dash.  Multiple register
+     ranges can be specified separated by a comma.
+
+`-mtls-size=TLS-SIZE'
+     Specify bit size of immediate TLS offsets.  Valid values are 14,
+     22, and 64.
+
+`-mtune=CPU-TYPE'
+     Tune the instruction scheduling for a particular CPU, Valid values
+     are itanium, itanium1, merced, itanium2, and mckinley.
+
+`-milp32'
+`-mlp64'
+     Generate code for a 32-bit or 64-bit environment.  The 32-bit
+     environment sets int, long and pointer to 32 bits.  The 64-bit
+     environment sets int to 32 bits and long and pointer to 64 bits.
+     These are HP-UX specific flags.
+
+`-mno-sched-br-data-spec'
+`-msched-br-data-spec'
+     (Dis/En)able data speculative scheduling before reload.  This will
+     result in generation of the ld.a instructions and the
+     corresponding check instructions (ld.c / chk.a).  The default is
+     'disable'.
+
+`-msched-ar-data-spec'
+`-mno-sched-ar-data-spec'
+     (En/Dis)able data speculative scheduling after reload.  This will
+     result in generation of the ld.a instructions and the
+     corresponding check instructions (ld.c / chk.a).  The default is
+     'enable'.
+
+`-mno-sched-control-spec'
+`-msched-control-spec'
+     (Dis/En)able control speculative scheduling.  This feature is
+     available only during region scheduling (i.e. before reload).
+     This will result in generation of the ld.s instructions and the
+     corresponding check instructions chk.s .  The default is 'disable'.
+
+`-msched-br-in-data-spec'
+`-mno-sched-br-in-data-spec'
+     (En/Dis)able speculative scheduling of the instructions that are
+     dependent on the data speculative loads before reload.  This is
+     effective only with `-msched-br-data-spec' enabled.  The default
+     is 'enable'.
+
+`-msched-ar-in-data-spec'
+`-mno-sched-ar-in-data-spec'
+     (En/Dis)able speculative scheduling of the instructions that are
+     dependent on the data speculative loads after reload.  This is
+     effective only with `-msched-ar-data-spec' enabled.  The default
+     is 'enable'.
+
+`-msched-in-control-spec'
+`-mno-sched-in-control-spec'
+     (En/Dis)able speculative scheduling of the instructions that are
+     dependent on the control speculative loads.  This is effective
+     only with `-msched-control-spec' enabled.  The default is 'enable'.
+
+`-mno-sched-prefer-non-data-spec-insns'
+`-msched-prefer-non-data-spec-insns'
+     If enabled, data speculative instructions will be chosen for
+     schedule only if there are no other choices at the moment.  This
+     will make the use of the data speculation much more conservative.
+     The default is 'disable'.
+
+`-mno-sched-prefer-non-control-spec-insns'
+`-msched-prefer-non-control-spec-insns'
+     If enabled, control speculative instructions will be chosen for
+     schedule only if there are no other choices at the moment.  This
+     will make the use of the control speculation much more
+     conservative.  The default is 'disable'.
+
+`-mno-sched-count-spec-in-critical-path'
+`-msched-count-spec-in-critical-path'
+     If enabled, speculative dependencies will be considered during
+     computation of the instructions priorities.  This will make the
+     use of the speculation a bit more conservative.  The default is
+     'disable'.
+
+`-msched-spec-ldc'
+     Use a simple data speculation check.  This option is on by default.
+
+`-msched-control-spec-ldc'
+     Use a simple check for control speculation.  This option is on by
+     default.
+
+`-msched-stop-bits-after-every-cycle'
+     Place a stop bit after every cycle when scheduling.  This option
+     is on by default.
+
+`-msched-fp-mem-deps-zero-cost'
+     Assume that floating-point stores and loads are not likely to
+     cause a conflict when placed into the same instruction group.
+     This option is disabled by default.
+
+`-msel-sched-dont-check-control-spec'
+     Generate checks for control speculation in selective scheduling.
+     This flag is disabled by default.
+
+`-msched-max-memory-insns=MAX-INSNS'
+     Limit on the number of memory insns per instruction group, giving
+     lower priority to subsequent memory insns attempting to schedule
+     in the same instruction group. Frequently useful to prevent cache
+     bank conflicts.  The default value is 1.
+
+`-msched-max-memory-insns-hard-limit'
+     Disallow more than `msched-max-memory-insns' in instruction group.
+     Otherwise, limit is `soft' meaning that we would prefer non-memory
+     operations when limit is reached but may still schedule memory
+     operations.
+
+
+
+File: gcc.info,  Node: IA-64/VMS Options,  Next: LM32 Options,  Prev: IA-64 Options,  Up: Submodel Options
+
+3.17.18 IA-64/VMS Options
+-------------------------
+
+These `-m' options are defined for the IA-64/VMS implementations:
+
+`-mvms-return-codes'
+     Return VMS condition codes from main. The default is to return
+     POSIX style condition (e.g. error) codes.
+
+`-mdebug-main=PREFIX'
+     Flag the first routine whose name starts with PREFIX as the main
+     routine for the debugger.
+
+`-mmalloc64'
+     Default to 64bit memory allocation routines.
+
+
+File: gcc.info,  Node: LM32 Options,  Next: M32C Options,  Prev: IA-64/VMS Options,  Up: Submodel Options
+
+3.17.19 LM32 Options
+--------------------
+
+These `-m' options are defined for the Lattice Mico32 architecture:
+
+`-mbarrel-shift-enabled'
+     Enable barrel-shift instructions.
+
+`-mdivide-enabled'
+     Enable divide and modulus instructions.
+
+`-mmultiply-enabled'
+     Enable multiply instructions.
+
+`-msign-extend-enabled'
+     Enable sign extend instructions.
+
+`-muser-enabled'
+     Enable user-defined instructions.
+
+
+
+File: gcc.info,  Node: M32C Options,  Next: M32R/D Options,  Prev: LM32 Options,  Up: Submodel Options
+
+3.17.20 M32C Options
+--------------------
+
+`-mcpu=NAME'
+     Select the CPU for which code is generated.  NAME may be one of
+     `r8c' for the R8C/Tiny series, `m16c' for the M16C (up to /60)
+     series, `m32cm' for the M16C/80 series, or `m32c' for the M32C/80
+     series.
+
+`-msim'
+     Specifies that the program will be run on the simulator.  This
+     causes an alternate runtime library to be linked in which
+     supports, for example, file I/O.  You must not use this option
+     when generating programs that will run on real hardware; you must
+     provide your own runtime library for whatever I/O functions are
+     needed.
+
+`-memregs=NUMBER'
+     Specifies the number of memory-based pseudo-registers GCC will use
+     during code generation.  These pseudo-registers will be used like
+     real registers, so there is a tradeoff between GCC's ability to
+     fit the code into available registers, and the performance penalty
+     of using memory instead of registers.  Note that all modules in a
+     program must be compiled with the same value for this option.
+     Because of that, you must not use this option with the default
+     runtime libraries gcc builds.
+
+
+
+File: gcc.info,  Node: M32R/D Options,  Next: M680x0 Options,  Prev: M32C Options,  Up: Submodel Options
+
+3.17.21 M32R/D Options
+----------------------
+
+These `-m' options are defined for Renesas M32R/D architectures:
+
+`-m32r2'
+     Generate code for the M32R/2.
+
+`-m32rx'
+     Generate code for the M32R/X.
+
+`-m32r'
+     Generate code for the M32R.  This is the default.
+
+`-mmodel=small'
+     Assume all objects live in the lower 16MB of memory (so that their
+     addresses can be loaded with the `ld24' instruction), and assume
+     all subroutines are reachable with the `bl' instruction.  This is
+     the default.
+
+     The addressability of a particular object can be set with the
+     `model' attribute.
+
+`-mmodel=medium'
+     Assume objects may be anywhere in the 32-bit address space (the
+     compiler will generate `seth/add3' instructions to load their
+     addresses), and assume all subroutines are reachable with the `bl'
+     instruction.
+
+`-mmodel=large'
+     Assume objects may be anywhere in the 32-bit address space (the
+     compiler will generate `seth/add3' instructions to load their
+     addresses), and assume subroutines may not be reachable with the
+     `bl' instruction (the compiler will generate the much slower
+     `seth/add3/jl' instruction sequence).
+
+`-msdata=none'
+     Disable use of the small data area.  Variables will be put into
+     one of `.data', `bss', or `.rodata' (unless the `section'
+     attribute has been specified).  This is the default.
+
+     The small data area consists of sections `.sdata' and `.sbss'.
+     Objects may be explicitly put in the small data area with the
+     `section' attribute using one of these sections.
+
+`-msdata=sdata'
+     Put small global and static data in the small data area, but do not
+     generate special code to reference them.
+
+`-msdata=use'
+     Put small global and static data in the small data area, and
+     generate special instructions to reference them.
+
+`-G NUM'
+     Put global and static objects less than or equal to NUM bytes into
+     the small data or bss sections instead of the normal data or bss
+     sections.  The default value of NUM is 8.  The `-msdata' option
+     must be set to one of `sdata' or `use' for this option to have any
+     effect.
+
+     All modules should be compiled with the same `-G NUM' value.
+     Compiling with different values of NUM may or may not work; if it
+     doesn't the linker will give an error message--incorrect code will
+     not be generated.
+
+`-mdebug'
+     Makes the M32R specific code in the compiler display some
+     statistics that might help in debugging programs.
+
+`-malign-loops'
+     Align all loops to a 32-byte boundary.
+
+`-mno-align-loops'
+     Do not enforce a 32-byte alignment for loops.  This is the default.
+
+`-missue-rate=NUMBER'
+     Issue NUMBER instructions per cycle.  NUMBER can only be 1 or 2.
+
+`-mbranch-cost=NUMBER'
+     NUMBER can only be 1 or 2.  If it is 1 then branches will be
+     preferred over conditional code, if it is 2, then the opposite will
+     apply.
+
+`-mflush-trap=NUMBER'
+     Specifies the trap number to use to flush the cache.  The default
+     is 12.  Valid numbers are between 0 and 15 inclusive.
+
+`-mno-flush-trap'
+     Specifies that the cache cannot be flushed by using a trap.
+
+`-mflush-func=NAME'
+     Specifies the name of the operating system function to call to
+     flush the cache.  The default is __flush_cache_, but a function
+     call will only be used if a trap is not available.
+
+`-mno-flush-func'
+     Indicates that there is no OS function for flushing the cache.
+
+
+
+File: gcc.info,  Node: M680x0 Options,  Next: M68hc1x Options,  Prev: M32R/D Options,  Up: Submodel Options
+
+3.17.22 M680x0 Options
+----------------------
+
+These are the `-m' options defined for M680x0 and ColdFire processors.
+The default settings depend on which architecture was selected when the
+compiler was configured; the defaults for the most common choices are
+given below.
+
+`-march=ARCH'
+     Generate code for a specific M680x0 or ColdFire instruction set
+     architecture.  Permissible values of ARCH for M680x0 architectures
+     are: `68000', `68010', `68020', `68030', `68040', `68060' and
+     `cpu32'.  ColdFire architectures are selected according to
+     Freescale's ISA classification and the permissible values are:
+     `isaa', `isaaplus', `isab' and `isac'.
+
+     gcc defines a macro `__mcfARCH__' whenever it is generating code
+     for a ColdFire target.  The ARCH in this macro is one of the
+     `-march' arguments given above.
+
+     When used together, `-march' and `-mtune' select code that runs on
+     a family of similar processors but that is optimized for a
+     particular microarchitecture.
+
+`-mcpu=CPU'
+     Generate code for a specific M680x0 or ColdFire processor.  The
+     M680x0 CPUs are: `68000', `68010', `68020', `68030', `68040',
+     `68060', `68302', `68332' and `cpu32'.  The ColdFire CPUs are
+     given by the table below, which also classifies the CPUs into
+     families:
+
+     *Family*      *`-mcpu' arguments*
+     `51'          `51' `51ac' `51cn' `51em' `51qe'
+     `5206'        `5202' `5204' `5206'
+     `5206e'       `5206e'
+     `5208'        `5207' `5208'
+     `5211a'       `5210a' `5211a'
+     `5213'        `5211' `5212' `5213'
+     `5216'        `5214' `5216'
+     `52235'       `52230' `52231' `52232' `52233' `52234' `52235'
+     `5225'        `5224' `5225'
+     `52259'       `52252' `52254' `52255' `52256' `52258' `52259'
+     `5235'        `5232' `5233' `5234' `5235' `523x'
+     `5249'        `5249'
+     `5250'        `5250'
+     `5271'        `5270' `5271'
+     `5272'        `5272'
+     `5275'        `5274' `5275'
+     `5282'        `5280' `5281' `5282' `528x'
+     `53017'       `53011' `53012' `53013' `53014' `53015' `53016'
+                   `53017'
+     `5307'        `5307'
+     `5329'        `5327' `5328' `5329' `532x'
+     `5373'        `5372' `5373' `537x'
+     `5407'        `5407'
+     `5475'        `5470' `5471' `5472' `5473' `5474' `5475' `547x'
+                   `5480' `5481' `5482' `5483' `5484' `5485'
+
+     `-mcpu=CPU' overrides `-march=ARCH' if ARCH is compatible with
+     CPU.  Other combinations of `-mcpu' and `-march' are rejected.
+
+     gcc defines the macro `__mcf_cpu_CPU' when ColdFire target CPU is
+     selected.  It also defines `__mcf_family_FAMILY', where the value
+     of FAMILY is given by the table above.
+
+`-mtune=TUNE'
+     Tune the code for a particular microarchitecture, within the
+     constraints set by `-march' and `-mcpu'.  The M680x0
+     microarchitectures are: `68000', `68010', `68020', `68030',
+     `68040', `68060' and `cpu32'.  The ColdFire microarchitectures
+     are: `cfv1', `cfv2', `cfv3', `cfv4' and `cfv4e'.
+
+     You can also use `-mtune=68020-40' for code that needs to run
+     relatively well on 68020, 68030 and 68040 targets.
+     `-mtune=68020-60' is similar but includes 68060 targets as well.
+     These two options select the same tuning decisions as `-m68020-40'
+     and `-m68020-60' respectively.
+
+     gcc defines the macros `__mcARCH' and `__mcARCH__' when tuning for
+     680x0 architecture ARCH.  It also defines `mcARCH' unless either
+     `-ansi' or a non-GNU `-std' option is used.  If gcc is tuning for
+     a range of architectures, as selected by `-mtune=68020-40' or
+     `-mtune=68020-60', it defines the macros for every architecture in
+     the range.
+
+     gcc also defines the macro `__mUARCH__' when tuning for ColdFire
+     microarchitecture UARCH, where UARCH is one of the arguments given
+     above.
+
+`-m68000'
+`-mc68000'
+     Generate output for a 68000.  This is the default when the
+     compiler is configured for 68000-based systems.  It is equivalent
+     to `-march=68000'.
+
+     Use this option for microcontrollers with a 68000 or EC000 core,
+     including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356.
+
+`-m68010'
+     Generate output for a 68010.  This is the default when the
+     compiler is configured for 68010-based systems.  It is equivalent
+     to `-march=68010'.
+
+`-m68020'
+`-mc68020'
+     Generate output for a 68020.  This is the default when the
+     compiler is configured for 68020-based systems.  It is equivalent
+     to `-march=68020'.
+
+`-m68030'
+     Generate output for a 68030.  This is the default when the
+     compiler is configured for 68030-based systems.  It is equivalent
+     to `-march=68030'.
+
+`-m68040'
+     Generate output for a 68040.  This is the default when the
+     compiler is configured for 68040-based systems.  It is equivalent
+     to `-march=68040'.
+
+     This option inhibits the use of 68881/68882 instructions that have
+     to be emulated by software on the 68040.  Use this option if your
+     68040 does not have code to emulate those instructions.
+
+`-m68060'
+     Generate output for a 68060.  This is the default when the
+     compiler is configured for 68060-based systems.  It is equivalent
+     to `-march=68060'.
+
+     This option inhibits the use of 68020 and 68881/68882 instructions
+     that have to be emulated by software on the 68060.  Use this
+     option if your 68060 does not have code to emulate those
+     instructions.
+
+`-mcpu32'
+     Generate output for a CPU32.  This is the default when the
+     compiler is configured for CPU32-based systems.  It is equivalent
+     to `-march=cpu32'.
+
+     Use this option for microcontrollers with a CPU32 or CPU32+ core,
+     including the 68330, 68331, 68332, 68333, 68334, 68336, 68340,
+     68341, 68349 and 68360.
+
+`-m5200'
+     Generate output for a 520X ColdFire CPU.  This is the default when
+     the compiler is configured for 520X-based systems.  It is
+     equivalent to `-mcpu=5206', and is now deprecated in favor of that
+     option.
+
+     Use this option for microcontroller with a 5200 core, including
+     the MCF5202, MCF5203, MCF5204 and MCF5206.
+
+`-m5206e'
+     Generate output for a 5206e ColdFire CPU.  The option is now
+     deprecated in favor of the equivalent `-mcpu=5206e'.
+
+`-m528x'
+     Generate output for a member of the ColdFire 528X family.  The
+     option is now deprecated in favor of the equivalent `-mcpu=528x'.
+
+`-m5307'
+     Generate output for a ColdFire 5307 CPU.  The option is now
+     deprecated in favor of the equivalent `-mcpu=5307'.
+
+`-m5407'
+     Generate output for a ColdFire 5407 CPU.  The option is now
+     deprecated in favor of the equivalent `-mcpu=5407'.
+
+`-mcfv4e'
+     Generate output for a ColdFire V4e family CPU (e.g. 547x/548x).
+     This includes use of hardware floating point instructions.  The
+     option is equivalent to `-mcpu=547x', and is now deprecated in
+     favor of that option.
+
+`-m68020-40'
+     Generate output for a 68040, without using any of the new
+     instructions.  This results in code which can run relatively
+     efficiently on either a 68020/68881 or a 68030 or a 68040.  The
+     generated code does use the 68881 instructions that are emulated
+     on the 68040.
+
+     The option is equivalent to `-march=68020' `-mtune=68020-40'.
+
+`-m68020-60'
+     Generate output for a 68060, without using any of the new
+     instructions.  This results in code which can run relatively
+     efficiently on either a 68020/68881 or a 68030 or a 68040.  The
+     generated code does use the 68881 instructions that are emulated
+     on the 68060.
+
+     The option is equivalent to `-march=68020' `-mtune=68020-60'.
+
+`-mhard-float'
+`-m68881'
+     Generate floating-point instructions.  This is the default for
+     68020 and above, and for ColdFire devices that have an FPU.  It
+     defines the macro `__HAVE_68881__' on M680x0 targets and
+     `__mcffpu__' on ColdFire targets.
+
+`-msoft-float'
+     Do not generate floating-point instructions; use library calls
+     instead.  This is the default for 68000, 68010, and 68832 targets.
+     It is also the default for ColdFire devices that have no FPU.
+
+`-mdiv'
+`-mno-div'
+     Generate (do not generate) ColdFire hardware divide and remainder
+     instructions.  If `-march' is used without `-mcpu', the default is
+     "on" for ColdFire architectures and "off" for M680x0
+     architectures.  Otherwise, the default is taken from the target CPU
+     (either the default CPU, or the one specified by `-mcpu').  For
+     example, the default is "off" for `-mcpu=5206' and "on" for
+     `-mcpu=5206e'.
+
+     gcc defines the macro `__mcfhwdiv__' when this option is enabled.
+
+`-mshort'
+     Consider type `int' to be 16 bits wide, like `short int'.
+     Additionally, parameters passed on the stack are also aligned to a
+     16-bit boundary even on targets whose API mandates promotion to
+     32-bit.
+
+`-mno-short'
+     Do not consider type `int' to be 16 bits wide.  This is the
+     default.
+
+`-mnobitfield'
+`-mno-bitfield'
+     Do not use the bit-field instructions.  The `-m68000', `-mcpu32'
+     and `-m5200' options imply `-mnobitfield'.
+
+`-mbitfield'
+     Do use the bit-field instructions.  The `-m68020' option implies
+     `-mbitfield'.  This is the default if you use a configuration
+     designed for a 68020.
+
+`-mrtd'
+     Use a different function-calling convention, in which functions
+     that take a fixed number of arguments return with the `rtd'
+     instruction, which pops their arguments while returning.  This
+     saves one instruction in the caller since there is no need to pop
+     the arguments there.
+
+     This calling convention is incompatible with the one normally used
+     on Unix, so you cannot use it if you need to call libraries
+     compiled with the Unix compiler.
+
+     Also, you must provide function prototypes for all functions that
+     take variable numbers of arguments (including `printf'); otherwise
+     incorrect code will be generated for calls to those functions.
+
+     In addition, seriously incorrect code will result if you call a
+     function with too many arguments.  (Normally, extra arguments are
+     harmlessly ignored.)
+
+     The `rtd' instruction is supported by the 68010, 68020, 68030,
+     68040, 68060 and CPU32 processors, but not by the 68000 or 5200.
+
+`-mno-rtd'
+     Do not use the calling conventions selected by `-mrtd'.  This is
+     the default.
+
+`-malign-int'
+`-mno-align-int'
+     Control whether GCC aligns `int', `long', `long long', `float',
+     `double', and `long double' variables on a 32-bit boundary
+     (`-malign-int') or a 16-bit boundary (`-mno-align-int').  Aligning
+     variables on 32-bit boundaries produces code that runs somewhat
+     faster on processors with 32-bit busses at the expense of more
+     memory.
+
+     *Warning:* if you use the `-malign-int' switch, GCC will align
+     structures containing the above types  differently than most
+     published application binary interface specifications for the m68k.
+
+`-mpcrel'
+     Use the pc-relative addressing mode of the 68000 directly, instead
+     of using a global offset table.  At present, this option implies
+     `-fpic', allowing at most a 16-bit offset for pc-relative
+     addressing.  `-fPIC' is not presently supported with `-mpcrel',
+     though this could be supported for 68020 and higher processors.
+
+`-mno-strict-align'
+`-mstrict-align'
+     Do not (do) assume that unaligned memory references will be
+     handled by the system.
+
+`-msep-data'
+     Generate code that allows the data segment to be located in a
+     different area of memory from the text segment.  This allows for
+     execute in place in an environment without virtual memory
+     management.  This option implies `-fPIC'.
+
+`-mno-sep-data'
+     Generate code that assumes that the data segment follows the text
+     segment.  This is the default.
+
+`-mid-shared-library'
+     Generate code that supports shared libraries via the library ID
+     method.  This allows for execute in place and shared libraries in
+     an environment without virtual memory management.  This option
+     implies `-fPIC'.
+
+`-mno-id-shared-library'
+     Generate code that doesn't assume ID based shared libraries are
+     being used.  This is the default.
+
+`-mshared-library-id=n'
+     Specified the identification number of the ID based shared library
+     being compiled.  Specifying a value of 0 will generate more
+     compact code, specifying other values will force the allocation of
+     that number to the current library but is no more space or time
+     efficient than omitting this option.
+
+`-mxgot'
+`-mno-xgot'
+     When generating position-independent code for ColdFire, generate
+     code that works if the GOT has more than 8192 entries.  This code
+     is larger and slower than code generated without this option.  On
+     M680x0 processors, this option is not needed; `-fPIC' suffices.
+
+     GCC normally uses a single instruction to load values from the GOT.
+     While this is relatively efficient, it only works if the GOT is
+     smaller than about 64k.  Anything larger causes the linker to
+     report an error such as:
+
+          relocation truncated to fit: R_68K_GOT16O foobar
+
+     If this happens, you should recompile your code with `-mxgot'.  It
+     should then work with very large GOTs.  However, code generated
+     with `-mxgot' is less efficient, since it takes 4 instructions to
+     fetch the value of a global symbol.
+
+     Note that some linkers, including newer versions of the GNU linker,
+     can create multiple GOTs and sort GOT entries.  If you have such a
+     linker, you should only need to use `-mxgot' when compiling a
+     single object file that accesses more than 8192 GOT entries.  Very
+     few do.
+
+     These options have no effect unless GCC is generating
+     position-independent code.
+
+
+
+File: gcc.info,  Node: M68hc1x Options,  Next: MCore Options,  Prev: M680x0 Options,  Up: Submodel Options
+
+3.17.23 M68hc1x Options
+-----------------------
+
+These are the `-m' options defined for the 68hc11 and 68hc12
+microcontrollers.  The default values for these options depends on
+which style of microcontroller was selected when the compiler was
+configured; the defaults for the most common choices are given below.
+
+`-m6811'
+`-m68hc11'
+     Generate output for a 68HC11.  This is the default when the
+     compiler is configured for 68HC11-based systems.
+
+`-m6812'
+`-m68hc12'
+     Generate output for a 68HC12.  This is the default when the
+     compiler is configured for 68HC12-based systems.
+
+`-m68S12'
+`-m68hcs12'
+     Generate output for a 68HCS12.
+
+`-mauto-incdec'
+     Enable the use of 68HC12 pre and post auto-increment and
+     auto-decrement addressing modes.
+
+`-minmax'
+`-mnominmax'
+     Enable the use of 68HC12 min and max instructions.
+
+`-mlong-calls'
+`-mno-long-calls'
+     Treat all calls as being far away (near).  If calls are assumed to
+     be far away, the compiler will use the `call' instruction to call
+     a function and the `rtc' instruction for returning.
+
+`-mshort'
+     Consider type `int' to be 16 bits wide, like `short int'.
+
+`-msoft-reg-count=COUNT'
+     Specify the number of pseudo-soft registers which are used for the
+     code generation.  The maximum number is 32.  Using more pseudo-soft
+     register may or may not result in better code depending on the
+     program.  The default is 4 for 68HC11 and 2 for 68HC12.
+
+
+
+File: gcc.info,  Node: MCore Options,  Next: MeP Options,  Prev: M68hc1x Options,  Up: Submodel Options
+
+3.17.24 MCore Options
+---------------------
+
+These are the `-m' options defined for the Motorola M*Core processors.
+
+`-mhardlit'
+`-mno-hardlit'
+     Inline constants into the code stream if it can be done in two
+     instructions or less.
+
+`-mdiv'
+`-mno-div'
+     Use the divide instruction.  (Enabled by default).
+
+`-mrelax-immediate'
+`-mno-relax-immediate'
+     Allow arbitrary sized immediates in bit operations.
+
+`-mwide-bitfields'
+`-mno-wide-bitfields'
+     Always treat bit-fields as int-sized.
+
+`-m4byte-functions'
+`-mno-4byte-functions'
+     Force all functions to be aligned to a four byte boundary.
+
+`-mcallgraph-data'
+`-mno-callgraph-data'
+     Emit callgraph information.
+
+`-mslow-bytes'
+`-mno-slow-bytes'
+     Prefer word access when reading byte quantities.
+
+`-mlittle-endian'
+`-mbig-endian'
+     Generate code for a little endian target.
+
+`-m210'
+`-m340'
+     Generate code for the 210 processor.
+
+`-mno-lsim'
+     Assume that run-time support has been provided and so omit the
+     simulator library (`libsim.a)' from the linker command line.
+
+`-mstack-increment=SIZE'
+     Set the maximum amount for a single stack increment operation.
+     Large values can increase the speed of programs which contain
+     functions that need a large amount of stack space, but they can
+     also trigger a segmentation fault if the stack is extended too
+     much.  The default value is 0x1000.
+
+
+
+File: gcc.info,  Node: MeP Options,  Next: MicroBlaze Options,  Prev: MCore Options,  Up: Submodel Options
+
+3.17.25 MeP Options
+-------------------
+
+`-mabsdiff'
+     Enables the `abs' instruction, which is the absolute difference
+     between two registers.
+
+`-mall-opts'
+     Enables all the optional instructions - average, multiply, divide,
+     bit operations, leading zero, absolute difference, min/max, clip,
+     and saturation.
+
+`-maverage'
+     Enables the `ave' instruction, which computes the average of two
+     registers.
+
+`-mbased=N'
+     Variables of size N bytes or smaller will be placed in the
+     `.based' section by default.  Based variables use the `$tp'
+     register as a base register, and there is a 128 byte limit to the
+     `.based' section.
+
+`-mbitops'
+     Enables the bit operation instructions - bit test (`btstm'), set
+     (`bsetm'), clear (`bclrm'), invert (`bnotm'), and test-and-set
+     (`tas').
+
+`-mc=NAME'
+     Selects which section constant data will be placed in.  NAME may
+     be `tiny', `near', or `far'.
+
+`-mclip'
+     Enables the `clip' instruction.  Note that `-mclip' is not useful
+     unless you also provide `-mminmax'.
+
+`-mconfig=NAME'
+     Selects one of the build-in core configurations.  Each MeP chip has
+     one or more modules in it; each module has a core CPU and a
+     variety of coprocessors, optional instructions, and peripherals.
+     The `MeP-Integrator' tool, not part of GCC, provides these
+     configurations through this option; using this option is the same
+     as using all the corresponding command line options.  The default
+     configuration is `default'.
+
+`-mcop'
+     Enables the coprocessor instructions.  By default, this is a 32-bit
+     coprocessor.  Note that the coprocessor is normally enabled via the
+     `-mconfig=' option.
+
+`-mcop32'
+     Enables the 32-bit coprocessor's instructions.
+
+`-mcop64'
+     Enables the 64-bit coprocessor's instructions.
+
+`-mivc2'
+     Enables IVC2 scheduling.  IVC2 is a 64-bit VLIW coprocessor.
+
+`-mdc'
+     Causes constant variables to be placed in the `.near' section.
+
+`-mdiv'
+     Enables the `div' and `divu' instructions.
+
+`-meb'
+     Generate big-endian code.
+
+`-mel'
+     Generate little-endian code.
+
+`-mio-volatile'
+     Tells the compiler that any variable marked with the `io'
+     attribute is to be considered volatile.
+
+`-ml'
+     Causes variables to be assigned to the `.far' section by default.
+
+`-mleadz'
+     Enables the `leadz' (leading zero) instruction.
+
+`-mm'
+     Causes variables to be assigned to the `.near' section by default.
+
+`-mminmax'
+     Enables the `min' and `max' instructions.
+
+`-mmult'
+     Enables the multiplication and multiply-accumulate instructions.
+
+`-mno-opts'
+     Disables all the optional instructions enabled by `-mall-opts'.
+
+`-mrepeat'
+     Enables the `repeat' and `erepeat' instructions, used for
+     low-overhead looping.
+
+`-ms'
+     Causes all variables to default to the `.tiny' section.  Note that
+     there is a 65536 byte limit to this section.  Accesses to these
+     variables use the `%gp' base register.
+
+`-msatur'
+     Enables the saturation instructions.  Note that the compiler does
+     not currently generate these itself, but this option is included
+     for compatibility with other tools, like `as'.
+
+`-msdram'
+     Link the SDRAM-based runtime instead of the default ROM-based
+     runtime.
+
+`-msim'
+     Link the simulator runtime libraries.
+
+`-msimnovec'
+     Link the simulator runtime libraries, excluding built-in support
+     for reset and exception vectors and tables.
+
+`-mtf'
+     Causes all functions to default to the `.far' section.  Without
+     this option, functions default to the `.near' section.
+
+`-mtiny=N'
+     Variables that are N bytes or smaller will be allocated to the
+     `.tiny' section.  These variables use the `$gp' base register.
+     The default for this option is 4, but note that there's a 65536
+     byte limit to the `.tiny' section.
+
+
+
+File: gcc.info,  Node: MicroBlaze Options,  Next: MIPS Options,  Prev: MeP Options,  Up: Submodel Options
+
+3.17.26 MicroBlaze Options
+--------------------------
+
+`-msoft-float'
+     Use software emulation for floating point (default).
+
+`-mhard-float'
+     Use hardware floating point instructions.
+
+`-mmemcpy'
+     Do not optimize block moves, use `memcpy'.
+
+`-mno-clearbss'
+     This option is deprecated.  Use `-fno-zero-initialized-in-bss'
+     instead.
+
+`-mcpu=CPU-TYPE'
+     Use features of and schedule code for given CPU.  Supported values
+     are in the format `vX.YY.Z', where X is a major version, YY is the
+     minor version, and Z is compatibility code.  Example values are
+     `v3.00.a', `v4.00.b', `v5.00.a', `v5.00.b', `v5.00.b', `v6.00.a'.
+
+`-mxl-soft-mul'
+     Use software multiply emulation (default).
+
+`-mxl-soft-div'
+     Use software emulation for divides (default).
+
+`-mxl-barrel-shift'
+     Use the hardware barrel shifter.
+
+`-mxl-pattern-compare'
+     Use pattern compare instructions.
+
+`-msmall-divides'
+     Use table lookup optimization for small signed integer divisions.
+
+`-mxl-stack-check'
+     This option is deprecated.  Use -fstack-check instead.
+
+`-mxl-gp-opt'
+     Use GP relative sdata/sbss sections.
+
+`-mxl-multiply-high'
+     Use multiply high instructions for high part of 32x32 multiply.
+
+`-mxl-float-convert'
+     Use hardware floating point conversion instructions.
+
+`-mxl-float-sqrt'
+     Use hardware floating point square root instruction.
+
+`-mxl-mode-APP-MODEL'
+     Select application model APP-MODEL.  Valid models are
+    `executable'
+          normal executable (default), uses startup code `crt0.o'.
+
+    `xmdstub'
+          for use with Xilinx Microprocessor Debugger (XMD) based
+          software intrusive debug agent called xmdstub. This uses
+          startup file `crt1.o' and sets the start address of the
+          program to be 0x800.
+
+    `bootstrap'
+          for applications that are loaded using a bootloader.  This
+          model uses startup file `crt2.o' which does not contain a
+          processor reset vector handler. This is suitable for
+          transferring control on a processor reset to the bootloader
+          rather than the application.
+
+    `novectors'
+          for applications that do not require any of the MicroBlaze
+          vectors. This option may be useful for applications running
+          within a monitoring application. This model uses `crt3.o' as
+          a startup file.
+
+     Option `-xl-mode-APP-MODEL' is a deprecated alias for
+     `-mxl-mode-APP-MODEL'.
+
+
+
+File: gcc.info,  Node: MIPS Options,  Next: MMIX Options,  Prev: MicroBlaze Options,  Up: Submodel Options
+
+3.17.27 MIPS Options
+--------------------
+
+`-EB'
+     Generate big-endian code.
+
+`-EL'
+     Generate little-endian code.  This is the default for `mips*el-*-*'
+     configurations.
+
+`-march=ARCH'
+     Generate code that will run on ARCH, which can be the name of a
+     generic MIPS ISA, or the name of a particular processor.  The ISA
+     names are: `mips1', `mips2', `mips3', `mips4', `mips32',
+     `mips32r2', `mips64' and `mips64r2'.  The processor names are:
+     `4kc', `4km', `4kp', `4ksc', `4kec', `4kem', `4kep', `4ksd',
+     `5kc', `5kf', `20kc', `24kc', `24kf2_1', `24kf1_1', `24kec',
+     `24kef2_1', `24kef1_1', `34kc', `34kf2_1', `34kf1_1', `74kc',
+     `74kf2_1', `74kf1_1', `74kf3_2', `1004kc', `1004kf2_1',
+     `1004kf1_1', `loongson2e', `loongson2f', `loongson3a', `m4k',
+     `octeon', `orion', `r2000', `r3000', `r3900', `r4000', `r4400',
+     `r4600', `r4650', `r6000', `r8000', `rm7000', `rm9000', `r10000',
+     `r12000', `r14000', `r16000', `sb1', `sr71000', `vr4100',
+     `vr4111', `vr4120', `vr4130', `vr4300', `vr5000', `vr5400',
+     `vr5500' and `xlr'.  The special value `from-abi' selects the most
+     compatible architecture for the selected ABI (that is, `mips1' for
+     32-bit ABIs and `mips3' for 64-bit ABIs).
+
+     Native Linux/GNU toolchains also support the value `native', which
+     selects the best architecture option for the host processor.
+     `-march=native' has no effect if GCC does not recognize the
+     processor.
+
+     In processor names, a final `000' can be abbreviated as `k' (for
+     example, `-march=r2k').  Prefixes are optional, and `vr' may be
+     written `r'.
+
+     Names of the form `Nf2_1' refer to processors with FPUs clocked at
+     half the rate of the core, names of the form `Nf1_1' refer to
+     processors with FPUs clocked at the same rate as the core, and
+     names of the form `Nf3_2' refer to processors with FPUs clocked a
+     ratio of 3:2 with respect to the core.  For compatibility reasons,
+     `Nf' is accepted as a synonym for `Nf2_1' while `Nx' and `Bfx' are
+     accepted as synonyms for `Nf1_1'.
+
+     GCC defines two macros based on the value of this option.  The
+     first is `_MIPS_ARCH', which gives the name of target
+     architecture, as a string.  The second has the form
+     `_MIPS_ARCH_FOO', where FOO is the capitalized value of
+     `_MIPS_ARCH'.  For example, `-march=r2000' will set `_MIPS_ARCH'
+     to `"r2000"' and define the macro `_MIPS_ARCH_R2000'.
+
+     Note that the `_MIPS_ARCH' macro uses the processor names given
+     above.  In other words, it will have the full prefix and will not
+     abbreviate `000' as `k'.  In the case of `from-abi', the macro
+     names the resolved architecture (either `"mips1"' or `"mips3"').
+     It names the default architecture when no `-march' option is given.
+
+`-mtune=ARCH'
+     Optimize for ARCH.  Among other things, this option controls the
+     way instructions are scheduled, and the perceived cost of
+     arithmetic operations.  The list of ARCH values is the same as for
+     `-march'.
+
+     When this option is not used, GCC will optimize for the processor
+     specified by `-march'.  By using `-march' and `-mtune' together,
+     it is possible to generate code that will run on a family of
+     processors, but optimize the code for one particular member of
+     that family.
+
+     `-mtune' defines the macros `_MIPS_TUNE' and `_MIPS_TUNE_FOO',
+     which work in the same way as the `-march' ones described above.
+
+`-mips1'
+     Equivalent to `-march=mips1'.
+
+`-mips2'
+     Equivalent to `-march=mips2'.
+
+`-mips3'
+     Equivalent to `-march=mips3'.
+
+`-mips4'
+     Equivalent to `-march=mips4'.
+
+`-mips32'
+     Equivalent to `-march=mips32'.
+
+`-mips32r2'
+     Equivalent to `-march=mips32r2'.
+
+`-mips64'
+     Equivalent to `-march=mips64'.
+
+`-mips64r2'
+     Equivalent to `-march=mips64r2'.
+
+`-mips16'
+`-mno-mips16'
+     Generate (do not generate) MIPS16 code.  If GCC is targetting a
+     MIPS32 or MIPS64 architecture, it will make use of the MIPS16e ASE.
+
+     MIPS16 code generation can also be controlled on a per-function
+     basis by means of `mips16' and `nomips16' attributes.  *Note
+     Function Attributes::, for more information.
+
+`-mflip-mips16'
+     Generate MIPS16 code on alternating functions.  This option is
+     provided for regression testing of mixed MIPS16/non-MIPS16 code
+     generation, and is not intended for ordinary use in compiling user
+     code.
+
+`-minterlink-mips16'
+`-mno-interlink-mips16'
+     Require (do not require) that non-MIPS16 code be link-compatible
+     with MIPS16 code.
+
+     For example, non-MIPS16 code cannot jump directly to MIPS16 code;
+     it must either use a call or an indirect jump.
+     `-minterlink-mips16' therefore disables direct jumps unless GCC
+     knows that the target of the jump is not MIPS16.
+
+`-mabi=32'
+`-mabi=o64'
+`-mabi=n32'
+`-mabi=64'
+`-mabi=eabi'
+     Generate code for the given ABI.
+
+     Note that the EABI has a 32-bit and a 64-bit variant.  GCC normally
+     generates 64-bit code when you select a 64-bit architecture, but
+     you can use `-mgp32' to get 32-bit code instead.
+
+     For information about the O64 ABI, see
+     `http://gcc.gnu.org/projects/mipso64-abi.html'.
+
+     GCC supports a variant of the o32 ABI in which floating-point
+     registers are 64 rather than 32 bits wide.  You can select this
+     combination with `-mabi=32' `-mfp64'.  This ABI relies on the
+     `mthc1' and `mfhc1' instructions and is therefore only supported
+     for MIPS32R2 processors.
+
+     The register assignments for arguments and return values remain the
+     same, but each scalar value is passed in a single 64-bit register
+     rather than a pair of 32-bit registers.  For example, scalar
+     floating-point values are returned in `$f0' only, not a
+     `$f0'/`$f1' pair.  The set of call-saved registers also remains
+     the same, but all 64 bits are saved.
+
+`-mabicalls'
+`-mno-abicalls'
+     Generate (do not generate) code that is suitable for SVR4-style
+     dynamic objects.  `-mabicalls' is the default for SVR4-based
+     systems.
+
+`-mshared'
+`-mno-shared'
+     Generate (do not generate) code that is fully position-independent,
+     and that can therefore be linked into shared libraries.  This
+     option only affects `-mabicalls'.
+
+     All `-mabicalls' code has traditionally been position-independent,
+     regardless of options like `-fPIC' and `-fpic'.  However, as an
+     extension, the GNU toolchain allows executables to use absolute
+     accesses for locally-binding symbols.  It can also use shorter GP
+     initialization sequences and generate direct calls to
+     locally-defined functions.  This mode is selected by `-mno-shared'.
+
+     `-mno-shared' depends on binutils 2.16 or higher and generates
+     objects that can only be linked by the GNU linker.  However, the
+     option does not affect the ABI of the final executable; it only
+     affects the ABI of relocatable objects.  Using `-mno-shared' will
+     generally make executables both smaller and quicker.
+
+     `-mshared' is the default.
+
+`-mplt'
+`-mno-plt'
+     Assume (do not assume) that the static and dynamic linkers support
+     PLTs and copy relocations.  This option only affects `-mno-shared
+     -mabicalls'.  For the n64 ABI, this option has no effect without
+     `-msym32'.
+
+     You can make `-mplt' the default by configuring GCC with
+     `--with-mips-plt'.  The default is `-mno-plt' otherwise.
+
+`-mxgot'
+`-mno-xgot'
+     Lift (do not lift) the usual restrictions on the size of the global
+     offset table.
+
+     GCC normally uses a single instruction to load values from the GOT.
+     While this is relatively efficient, it will only work if the GOT
+     is smaller than about 64k.  Anything larger will cause the linker
+     to report an error such as:
+
+          relocation truncated to fit: R_MIPS_GOT16 foobar
+
+     If this happens, you should recompile your code with `-mxgot'.  It
+     should then work with very large GOTs, although it will also be
+     less efficient, since it will take three instructions to fetch the
+     value of a global symbol.
+
+     Note that some linkers can create multiple GOTs.  If you have such
+     a linker, you should only need to use `-mxgot' when a single object
+     file accesses more than 64k's worth of GOT entries.  Very few do.
+
+     These options have no effect unless GCC is generating position
+     independent code.
+
+`-mgp32'
+     Assume that general-purpose registers are 32 bits wide.
+
+`-mgp64'
+     Assume that general-purpose registers are 64 bits wide.
+
+`-mfp32'
+     Assume that floating-point registers are 32 bits wide.
+
+`-mfp64'
+     Assume that floating-point registers are 64 bits wide.
+
+`-mhard-float'
+     Use floating-point coprocessor instructions.
+
+`-msoft-float'
+     Do not use floating-point coprocessor instructions.  Implement
+     floating-point calculations using library calls instead.
+
+`-msingle-float'
+     Assume that the floating-point coprocessor only supports
+     single-precision operations.
+
+`-mdouble-float'
+     Assume that the floating-point coprocessor supports
+     double-precision operations.  This is the default.
+
+`-mllsc'
+`-mno-llsc'
+     Use (do not use) `ll', `sc', and `sync' instructions to implement
+     atomic memory built-in functions.  When neither option is
+     specified, GCC will use the instructions if the target architecture
+     supports them.
+
+     `-mllsc' is useful if the runtime environment can emulate the
+     instructions and `-mno-llsc' can be useful when compiling for
+     nonstandard ISAs.  You can make either option the default by
+     configuring GCC with `--with-llsc' and `--without-llsc'
+     respectively.  `--with-llsc' is the default for some
+     configurations; see the installation documentation for details.
+
+`-mdsp'
+`-mno-dsp'
+     Use (do not use) revision 1 of the MIPS DSP ASE.  *Note MIPS DSP
+     Built-in Functions::.  This option defines the preprocessor macro
+     `__mips_dsp'.  It also defines `__mips_dsp_rev' to 1.
+
+`-mdspr2'
+`-mno-dspr2'
+     Use (do not use) revision 2 of the MIPS DSP ASE.  *Note MIPS DSP
+     Built-in Functions::.  This option defines the preprocessor macros
+     `__mips_dsp' and `__mips_dspr2'.  It also defines `__mips_dsp_rev'
+     to 2.
+
+`-msmartmips'
+`-mno-smartmips'
+     Use (do not use) the MIPS SmartMIPS ASE.
+
+`-mpaired-single'
+`-mno-paired-single'
+     Use (do not use) paired-single floating-point instructions.  *Note
+     MIPS Paired-Single Support::.  This option requires hardware
+     floating-point support to be enabled.
+
+`-mdmx'
+`-mno-mdmx'
+     Use (do not use) MIPS Digital Media Extension instructions.  This
+     option can only be used when generating 64-bit code and requires
+     hardware floating-point support to be enabled.
+
+`-mips3d'
+`-mno-mips3d'
+     Use (do not use) the MIPS-3D ASE.  *Note MIPS-3D Built-in
+     Functions::.  The option `-mips3d' implies `-mpaired-single'.
+
+`-mmt'
+`-mno-mt'
+     Use (do not use) MT Multithreading instructions.
+
+`-mlong64'
+     Force `long' types to be 64 bits wide.  See `-mlong32' for an
+     explanation of the default and the way that the pointer size is
+     determined.
+
+`-mlong32'
+     Force `long', `int', and pointer types to be 32 bits wide.
+
+     The default size of `int's, `long's and pointers depends on the
+     ABI.  All the supported ABIs use 32-bit `int's.  The n64 ABI uses
+     64-bit `long's, as does the 64-bit EABI; the others use 32-bit
+     `long's.  Pointers are the same size as `long's, or the same size
+     as integer registers, whichever is smaller.
+
+`-msym32'
+`-mno-sym32'
+     Assume (do not assume) that all symbols have 32-bit values,
+     regardless of the selected ABI.  This option is useful in
+     combination with `-mabi=64' and `-mno-abicalls' because it allows
+     GCC to generate shorter and faster references to symbolic
+     addresses.
+
+`-G NUM'
+     Put definitions of externally-visible data in a small data section
+     if that data is no bigger than NUM bytes.  GCC can then access the
+     data more efficiently; see `-mgpopt' for details.
+
+     The default `-G' option depends on the configuration.
+
+`-mlocal-sdata'
+`-mno-local-sdata'
+     Extend (do not extend) the `-G' behavior to local data too, such
+     as to static variables in C.  `-mlocal-sdata' is the default for
+     all configurations.
+
+     If the linker complains that an application is using too much
+     small data, you might want to try rebuilding the less
+     performance-critical parts with `-mno-local-sdata'.  You might
+     also want to build large libraries with `-mno-local-sdata', so
+     that the libraries leave more room for the main program.
+
+`-mextern-sdata'
+`-mno-extern-sdata'
+     Assume (do not assume) that externally-defined data will be in a
+     small data section if that data is within the `-G' limit.
+     `-mextern-sdata' is the default for all configurations.
+
+     If you compile a module MOD with `-mextern-sdata' `-G NUM'
+     `-mgpopt', and MOD references a variable VAR that is no bigger
+     than NUM bytes, you must make sure that VAR is placed in a small
+     data section.  If VAR is defined by another module, you must
+     either compile that module with a high-enough `-G' setting or
+     attach a `section' attribute to VAR's definition.  If VAR is
+     common, you must link the application with a high-enough `-G'
+     setting.
+
+     The easiest way of satisfying these restrictions is to compile and
+     link every module with the same `-G' option.  However, you may
+     wish to build a library that supports several different small data
+     limits.  You can do this by compiling the library with the highest
+     supported `-G' setting and additionally using `-mno-extern-sdata'
+     to stop the library from making assumptions about
+     externally-defined data.
+
+`-mgpopt'
+`-mno-gpopt'
+     Use (do not use) GP-relative accesses for symbols that are known
+     to be in a small data section; see `-G', `-mlocal-sdata' and
+     `-mextern-sdata'.  `-mgpopt' is the default for all configurations.
+
+     `-mno-gpopt' is useful for cases where the `$gp' register might
+     not hold the value of `_gp'.  For example, if the code is part of
+     a library that might be used in a boot monitor, programs that call
+     boot monitor routines will pass an unknown value in `$gp'.  (In
+     such situations, the boot monitor itself would usually be compiled
+     with `-G0'.)
+
+     `-mno-gpopt' implies `-mno-local-sdata' and `-mno-extern-sdata'.
+
+`-membedded-data'
+`-mno-embedded-data'
+     Allocate variables to the read-only data section first if
+     possible, then next in the small data section if possible,
+     otherwise in data.  This gives slightly slower code than the
+     default, but reduces the amount of RAM required when executing,
+     and thus may be preferred for some embedded systems.
+
+`-muninit-const-in-rodata'
+`-mno-uninit-const-in-rodata'
+     Put uninitialized `const' variables in the read-only data section.
+     This option is only meaningful in conjunction with
+     `-membedded-data'.
+
+`-mcode-readable=SETTING'
+     Specify whether GCC may generate code that reads from executable
+     sections.  There are three possible settings:
+
+    `-mcode-readable=yes'
+          Instructions may freely access executable sections.  This is
+          the default setting.
+
+    `-mcode-readable=pcrel'
+          MIPS16 PC-relative load instructions can access executable
+          sections, but other instructions must not do so.  This option
+          is useful on 4KSc and 4KSd processors when the code TLBs have
+          the Read Inhibit bit set.  It is also useful on processors
+          that can be configured to have a dual instruction/data SRAM
+          interface and that, like the M4K, automatically redirect
+          PC-relative loads to the instruction RAM.
+
+    `-mcode-readable=no'
+          Instructions must not access executable sections.  This
+          option can be useful on targets that are configured to have a
+          dual instruction/data SRAM interface but that (unlike the
+          M4K) do not automatically redirect PC-relative loads to the
+          instruction RAM.
+
+`-msplit-addresses'
+`-mno-split-addresses'
+     Enable (disable) use of the `%hi()' and `%lo()' assembler
+     relocation operators.  This option has been superseded by
+     `-mexplicit-relocs' but is retained for backwards compatibility.
+
+`-mexplicit-relocs'
+`-mno-explicit-relocs'
+     Use (do not use) assembler relocation operators when dealing with
+     symbolic addresses.  The alternative, selected by
+     `-mno-explicit-relocs', is to use assembler macros instead.
+
+     `-mexplicit-relocs' is the default if GCC was configured to use an
+     assembler that supports relocation operators.
+
+`-mcheck-zero-division'
+`-mno-check-zero-division'
+     Trap (do not trap) on integer division by zero.
+
+     The default is `-mcheck-zero-division'.
+
+`-mdivide-traps'
+`-mdivide-breaks'
+     MIPS systems check for division by zero by generating either a
+     conditional trap or a break instruction.  Using traps results in
+     smaller code, but is only supported on MIPS II and later.  Also,
+     some versions of the Linux kernel have a bug that prevents trap
+     from generating the proper signal (`SIGFPE').  Use
+     `-mdivide-traps' to allow conditional traps on architectures that
+     support them and `-mdivide-breaks' to force the use of breaks.
+
+     The default is usually `-mdivide-traps', but this can be
+     overridden at configure time using `--with-divide=breaks'.
+     Divide-by-zero checks can be completely disabled using
+     `-mno-check-zero-division'.
+
+`-mmemcpy'
+`-mno-memcpy'
+     Force (do not force) the use of `memcpy()' for non-trivial block
+     moves.  The default is `-mno-memcpy', which allows GCC to inline
+     most constant-sized copies.
+
+`-mlong-calls'
+`-mno-long-calls'
+     Disable (do not disable) use of the `jal' instruction.  Calling
+     functions using `jal' is more efficient but requires the caller
+     and callee to be in the same 256 megabyte segment.
+
+     This option has no effect on abicalls code.  The default is
+     `-mno-long-calls'.
+
+`-mmad'
+`-mno-mad'
+     Enable (disable) use of the `mad', `madu' and `mul' instructions,
+     as provided by the R4650 ISA.
+
+`-mfused-madd'
+`-mno-fused-madd'
+     Enable (disable) use of the floating point multiply-accumulate
+     instructions, when they are available.  The default is
+     `-mfused-madd'.
+
+     When multiply-accumulate instructions are used, the intermediate
+     product is calculated to infinite precision and is not subject to
+     the FCSR Flush to Zero bit.  This may be undesirable in some
+     circumstances.
+
+`-nocpp'
+     Tell the MIPS assembler to not run its preprocessor over user
+     assembler files (with a `.s' suffix) when assembling them.
+
+`-mfix-r4000'
+`-mno-fix-r4000'
+     Work around certain R4000 CPU errata:
+        - A double-word or a variable shift may give an incorrect
+          result if executed immediately after starting an integer
+          division.
+
+        - A double-word or a variable shift may give an incorrect
+          result if executed while an integer multiplication is in
+          progress.
+
+        - An integer division may give an incorrect result if started
+          in a delay slot of a taken branch or a jump.
+
+`-mfix-r4400'
+`-mno-fix-r4400'
+     Work around certain R4400 CPU errata:
+        - A double-word or a variable shift may give an incorrect
+          result if executed immediately after starting an integer
+          division.
+
+`-mfix-r10000'
+`-mno-fix-r10000'
+     Work around certain R10000 errata:
+        - `ll'/`sc' sequences may not behave atomically on revisions
+          prior to 3.0.  They may deadlock on revisions 2.6 and earlier.
+
+     This option can only be used if the target architecture supports
+     branch-likely instructions.  `-mfix-r10000' is the default when
+     `-march=r10000' is used; `-mno-fix-r10000' is the default
+     otherwise.
+
+`-mfix-vr4120'
+`-mno-fix-vr4120'
+     Work around certain VR4120 errata:
+        - `dmultu' does not always produce the correct result.
+
+        - `div' and `ddiv' do not always produce the correct result if
+          one of the operands is negative.
+     The workarounds for the division errata rely on special functions
+     in `libgcc.a'.  At present, these functions are only provided by
+     the `mips64vr*-elf' configurations.
+
+     Other VR4120 errata require a nop to be inserted between certain
+     pairs of instructions.  These errata are handled by the assembler,
+     not by GCC itself.
+
+`-mfix-vr4130'
+     Work around the VR4130 `mflo'/`mfhi' errata.  The workarounds are
+     implemented by the assembler rather than by GCC, although GCC will
+     avoid using `mflo' and `mfhi' if the VR4130 `macc', `macchi',
+     `dmacc' and `dmacchi' instructions are available instead.
+
+`-mfix-sb1'
+`-mno-fix-sb1'
+     Work around certain SB-1 CPU core errata.  (This flag currently
+     works around the SB-1 revision 2 "F1" and "F2" floating point
+     errata.)
+
+`-mr10k-cache-barrier=SETTING'
+     Specify whether GCC should insert cache barriers to avoid the
+     side-effects of speculation on R10K processors.
+
+     In common with many processors, the R10K tries to predict the
+     outcome of a conditional branch and speculatively executes
+     instructions from the "taken" branch.  It later aborts these
+     instructions if the predicted outcome was wrong.  However, on the
+     R10K, even aborted instructions can have side effects.
+
+     This problem only affects kernel stores and, depending on the
+     system, kernel loads.  As an example, a speculatively-executed
+     store may load the target memory into cache and mark the cache
+     line as dirty, even if the store itself is later aborted.  If a
+     DMA operation writes to the same area of memory before the "dirty"
+     line is flushed, the cached data will overwrite the DMA-ed data.
+     See the R10K processor manual for a full description, including
+     other potential problems.
+
+     One workaround is to insert cache barrier instructions before
+     every memory access that might be speculatively executed and that
+     might have side effects even if aborted.
+     `-mr10k-cache-barrier=SETTING' controls GCC's implementation of
+     this workaround.  It assumes that aborted accesses to any byte in
+     the following regions will not have side effects:
+
+       1. the memory occupied by the current function's stack frame;
+
+       2. the memory occupied by an incoming stack argument;
+
+       3. the memory occupied by an object with a link-time-constant
+          address.
+
+     It is the kernel's responsibility to ensure that speculative
+     accesses to these regions are indeed safe.
+
+     If the input program contains a function declaration such as:
+
+          void foo (void);
+
+     then the implementation of `foo' must allow `j foo' and `jal foo'
+     to be executed speculatively.  GCC honors this restriction for
+     functions it compiles itself.  It expects non-GCC functions (such
+     as hand-written assembly code) to do the same.
+
+     The option has three forms:
+
+    `-mr10k-cache-barrier=load-store'
+          Insert a cache barrier before a load or store that might be
+          speculatively executed and that might have side effects even
+          if aborted.
+
+    `-mr10k-cache-barrier=store'
+          Insert a cache barrier before a store that might be
+          speculatively executed and that might have side effects even
+          if aborted.
+
+    `-mr10k-cache-barrier=none'
+          Disable the insertion of cache barriers.  This is the default
+          setting.
+
+`-mflush-func=FUNC'
+`-mno-flush-func'
+     Specifies the function to call to flush the I and D caches, or to
+     not call any such function.  If called, the function must take the
+     same arguments as the common `_flush_func()', that is, the address
+     of the memory range for which the cache is being flushed, the size
+     of the memory range, and the number 3 (to flush both caches).  The
+     default depends on the target GCC was configured for, but commonly
+     is either `_flush_func' or `__cpu_flush'.
+
+`mbranch-cost=NUM'
+     Set the cost of branches to roughly NUM "simple" instructions.
+     This cost is only a heuristic and is not guaranteed to produce
+     consistent results across releases.  A zero cost redundantly
+     selects the default, which is based on the `-mtune' setting.
+
+`-mbranch-likely'
+`-mno-branch-likely'
+     Enable or disable use of Branch Likely instructions, regardless of
+     the default for the selected architecture.  By default, Branch
+     Likely instructions may be generated if they are supported by the
+     selected architecture.  An exception is for the MIPS32 and MIPS64
+     architectures and processors which implement those architectures;
+     for those, Branch Likely instructions will not be generated by
+     default because the MIPS32 and MIPS64 architectures specifically
+     deprecate their use.
+
+`-mfp-exceptions'
+`-mno-fp-exceptions'
+     Specifies whether FP exceptions are enabled.  This affects how we
+     schedule FP instructions for some processors.  The default is that
+     FP exceptions are enabled.
+
+     For instance, on the SB-1, if FP exceptions are disabled, and we
+     are emitting 64-bit code, then we can use both FP pipes.
+     Otherwise, we can only use one FP pipe.
+
+`-mvr4130-align'
+`-mno-vr4130-align'
+     The VR4130 pipeline is two-way superscalar, but can only issue two
+     instructions together if the first one is 8-byte aligned.  When
+     this option is enabled, GCC will align pairs of instructions that
+     it thinks should execute in parallel.
+
+     This option only has an effect when optimizing for the VR4130.  It
+     normally makes code faster, but at the expense of making it bigger.
+     It is enabled by default at optimization level `-O3'.
+
+`-msynci'
+`-mno-synci'
+     Enable (disable) generation of `synci' instructions on
+     architectures that support it.  The `synci' instructions (if
+     enabled) will be generated when `__builtin___clear_cache()' is
+     compiled.
+
+     This option defaults to `-mno-synci', but the default can be
+     overridden by configuring with `--with-synci'.
+
+     When compiling code for single processor systems, it is generally
+     safe to use `synci'.  However, on many multi-core (SMP) systems, it
+     will not invalidate the instruction caches on all cores and may
+     lead to undefined behavior.
+
+`-mrelax-pic-calls'
+`-mno-relax-pic-calls'
+     Try to turn PIC calls that are normally dispatched via register
+     `$25' into direct calls.  This is only possible if the linker can
+     resolve the destination at link-time and if the destination is
+     within range for a direct call.
+
+     `-mrelax-pic-calls' is the default if GCC was configured to use an
+     assembler and a linker that supports the `.reloc' assembly
+     directive and `-mexplicit-relocs' is in effect.  With
+     `-mno-explicit-relocs', this optimization can be performed by the
+     assembler and the linker alone without help from the compiler.
+
+`-mmcount-ra-address'
+`-mno-mcount-ra-address'
+     Emit (do not emit) code that allows `_mcount' to modify the
+     calling function's return address.  When enabled, this option
+     extends the usual `_mcount' interface with a new RA-ADDRESS
+     parameter, which has type `intptr_t *' and is passed in register
+     `$12'.  `_mcount' can then modify the return address by doing both
+     of the following:
+        * Returning the new address in register `$31'.
+
+        * Storing the new address in `*RA-ADDRESS', if RA-ADDRESS is
+          nonnull.
+
+     The default is `-mno-mcount-ra-address'.
+
+
+
+File: gcc.info,  Node: MMIX Options,  Next: MN10300 Options,  Prev: MIPS Options,  Up: Submodel Options
+
+3.17.28 MMIX Options
+--------------------
+
+These options are defined for the MMIX:
+
+`-mlibfuncs'
+`-mno-libfuncs'
+     Specify that intrinsic library functions are being compiled,
+     passing all values in registers, no matter the size.
+
+`-mepsilon'
+`-mno-epsilon'
+     Generate floating-point comparison instructions that compare with
+     respect to the `rE' epsilon register.
+
+`-mabi=mmixware'
+`-mabi=gnu'
+     Generate code that passes function parameters and return values
+     that (in the called function) are seen as registers `$0' and up,
+     as opposed to the GNU ABI which uses global registers `$231' and
+     up.
+
+`-mzero-extend'
+`-mno-zero-extend'
+     When reading data from memory in sizes shorter than 64 bits, use
+     (do not use) zero-extending load instructions by default, rather
+     than sign-extending ones.
+
+`-mknuthdiv'
+`-mno-knuthdiv'
+     Make the result of a division yielding a remainder have the same
+     sign as the divisor.  With the default, `-mno-knuthdiv', the sign
+     of the remainder follows the sign of the dividend.  Both methods
+     are arithmetically valid, the latter being almost exclusively used.
+
+`-mtoplevel-symbols'
+`-mno-toplevel-symbols'
+     Prepend (do not prepend) a `:' to all global symbols, so the
+     assembly code can be used with the `PREFIX' assembly directive.
+
+`-melf'
+     Generate an executable in the ELF format, rather than the default
+     `mmo' format used by the `mmix' simulator.
+
+`-mbranch-predict'
+`-mno-branch-predict'
+     Use (do not use) the probable-branch instructions, when static
+     branch prediction indicates a probable branch.
+
+`-mbase-addresses'
+`-mno-base-addresses'
+     Generate (do not generate) code that uses _base addresses_.  Using
+     a base address automatically generates a request (handled by the
+     assembler and the linker) for a constant to be set up in a global
+     register.  The register is used for one or more base address
+     requests within the range 0 to 255 from the value held in the
+     register.  The generally leads to short and fast code, but the
+     number of different data items that can be addressed is limited.
+     This means that a program that uses lots of static data may
+     require `-mno-base-addresses'.
+
+`-msingle-exit'
+`-mno-single-exit'
+     Force (do not force) generated code to have a single exit point in
+     each function.
+
+
+File: gcc.info,  Node: MN10300 Options,  Next: PDP-11 Options,  Prev: MMIX Options,  Up: Submodel Options
+
+3.17.29 MN10300 Options
+-----------------------
+
+These `-m' options are defined for Matsushita MN10300 architectures:
+
+`-mmult-bug'
+     Generate code to avoid bugs in the multiply instructions for the
+     MN10300 processors.  This is the default.
+
+`-mno-mult-bug'
+     Do not generate code to avoid bugs in the multiply instructions
+     for the MN10300 processors.
+
+`-mam33'
+     Generate code which uses features specific to the AM33 processor.
+
+`-mno-am33'
+     Do not generate code which uses features specific to the AM33
+     processor.  This is the default.
+
+`-mam33-2'
+     Generate code which uses features specific to the AM33/2.0
+     processor.
+
+`-mam34'
+     Generate code which uses features specific to the AM34 processor.
+
+`-mtune=CPU-TYPE'
+     Use the timing characteristics of the indicated CPU type when
+     scheduling instructions.  This does not change the targeted
+     processor type.  The CPU type must be one of `mn10300', `am33',
+     `am33-2' or `am34'.
+
+`-mreturn-pointer-on-d0'
+     When generating a function which returns a pointer, return the
+     pointer in both `a0' and `d0'.  Otherwise, the pointer is returned
+     only in a0, and attempts to call such functions without a prototype
+     would result in errors.  Note that this option is on by default;
+     use `-mno-return-pointer-on-d0' to disable it.
+
+`-mno-crt0'
+     Do not link in the C run-time initialization object file.
+
+`-mrelax'
+     Indicate to the linker that it should perform a relaxation
+     optimization pass to shorten branches, calls and absolute memory
+     addresses.  This option only has an effect when used on the
+     command line for the final link step.
+
+     This option makes symbolic debugging impossible.
+
+`-mliw'
+     Allow the compiler to generate _Long Instruction Word_
+     instructions if the target is the `AM33' or later.  This is the
+     default.  This option defines the preprocessor macro `__LIW__'.
+
+`-mnoliw'
+     Do not allow the compiler to generate _Long Instruction Word_
+     instructions.  This option defines the preprocessor macro
+     `__NO_LIW__'.
+
+
+
+File: gcc.info,  Node: PDP-11 Options,  Next: picoChip Options,  Prev: MN10300 Options,  Up: Submodel Options
+
+3.17.30 PDP-11 Options
+----------------------
+
+These options are defined for the PDP-11:
+
+`-mfpu'
+     Use hardware FPP floating point.  This is the default.  (FIS
+     floating point on the PDP-11/40 is not supported.)
+
+`-msoft-float'
+     Do not use hardware floating point.
+
+`-mac0'
+     Return floating-point results in ac0 (fr0 in Unix assembler
+     syntax).
+
+`-mno-ac0'
+     Return floating-point results in memory.  This is the default.
+
+`-m40'
+     Generate code for a PDP-11/40.
+
+`-m45'
+     Generate code for a PDP-11/45.  This is the default.
+
+`-m10'
+     Generate code for a PDP-11/10.
+
+`-mbcopy-builtin'
+     Use inline `movmemhi' patterns for copying memory.  This is the
+     default.
+
+`-mbcopy'
+     Do not use inline `movmemhi' patterns for copying memory.
+
+`-mint16'
+`-mno-int32'
+     Use 16-bit `int'.  This is the default.
+
+`-mint32'
+`-mno-int16'
+     Use 32-bit `int'.
+
+`-mfloat64'
+`-mno-float32'
+     Use 64-bit `float'.  This is the default.
+
+`-mfloat32'
+`-mno-float64'
+     Use 32-bit `float'.
+
+`-mabshi'
+     Use `abshi2' pattern.  This is the default.
+
+`-mno-abshi'
+     Do not use `abshi2' pattern.
+
+`-mbranch-expensive'
+     Pretend that branches are expensive.  This is for experimenting
+     with code generation only.
+
+`-mbranch-cheap'
+     Do not pretend that branches are expensive.  This is the default.
+
+`-munix-asm'
+     Use Unix assembler syntax.  This is the default when configured for
+     `pdp11-*-bsd'.
+
+`-mdec-asm'
+     Use DEC assembler syntax.  This is the default when configured for
+     any PDP-11 target other than `pdp11-*-bsd'.
+
+
+File: gcc.info,  Node: picoChip Options,  Next: PowerPC Options,  Prev: PDP-11 Options,  Up: Submodel Options
+
+3.17.31 picoChip Options
+------------------------
+
+These `-m' options are defined for picoChip implementations:
+
+`-mae=AE_TYPE'
+     Set the instruction set, register set, and instruction scheduling
+     parameters for array element type AE_TYPE.  Supported values for
+     AE_TYPE are `ANY', `MUL', and `MAC'.
+
+     `-mae=ANY' selects a completely generic AE type.  Code generated
+     with this option will run on any of the other AE types.  The code
+     will not be as efficient as it would be if compiled for a specific
+     AE type, and some types of operation (e.g., multiplication) will
+     not work properly on all types of AE.
+
+     `-mae=MUL' selects a MUL AE type.  This is the most useful AE type
+     for compiled code, and is the default.
+
+     `-mae=MAC' selects a DSP-style MAC AE.  Code compiled with this
+     option may suffer from poor performance of byte (char)
+     manipulation, since the DSP AE does not provide hardware support
+     for byte load/stores.
+
+`-msymbol-as-address'
+     Enable the compiler to directly use a symbol name as an address in
+     a load/store instruction, without first loading it into a
+     register.  Typically, the use of this option will generate larger
+     programs, which run faster than when the option isn't used.
+     However, the results vary from program to program, so it is left
+     as a user option, rather than being permanently enabled.
+
+`-mno-inefficient-warnings'
+     Disables warnings about the generation of inefficient code.  These
+     warnings can be generated, for example, when compiling code which
+     performs byte-level memory operations on the MAC AE type.  The MAC
+     AE has no hardware support for byte-level memory operations, so
+     all byte load/stores must be synthesized from word load/store
+     operations.  This is inefficient and a warning will be generated
+     indicating to the programmer that they should rewrite the code to
+     avoid byte operations, or to target an AE type which has the
+     necessary hardware support.  This option enables the warning to be
+     turned off.
+
+
+
+File: gcc.info,  Node: PowerPC Options,  Next: RS/6000 and PowerPC Options,  Prev: picoChip Options,  Up: Submodel Options
+
+3.17.32 PowerPC Options
+-----------------------
+
+These are listed under *Note RS/6000 and PowerPC Options::.
+
+
+File: gcc.info,  Node: RS/6000 and PowerPC Options,  Next: RX Options,  Prev: PowerPC Options,  Up: Submodel Options
+
+3.17.33 IBM RS/6000 and PowerPC Options
+---------------------------------------
+
+These `-m' options are defined for the IBM RS/6000 and PowerPC:
+`-mpower'
+`-mno-power'
+`-mpower2'
+`-mno-power2'
+`-mpowerpc'
+`-mno-powerpc'
+`-mpowerpc-gpopt'
+`-mno-powerpc-gpopt'
+`-mpowerpc-gfxopt'
+`-mno-powerpc-gfxopt'
+`-mpowerpc64'
+`-mno-powerpc64'
+`-mmfcrf'
+`-mno-mfcrf'
+`-mpopcntb'
+`-mno-popcntb'
+`-mpopcntd'
+`-mno-popcntd'
+`-mfprnd'
+`-mno-fprnd'
+`-mcmpb'
+`-mno-cmpb'
+`-mmfpgpr'
+`-mno-mfpgpr'
+`-mhard-dfp'
+`-mno-hard-dfp'
+     GCC supports two related instruction set architectures for the
+     RS/6000 and PowerPC.  The "POWER" instruction set are those
+     instructions supported by the `rios' chip set used in the original
+     RS/6000 systems and the "PowerPC" instruction set is the
+     architecture of the Freescale MPC5xx, MPC6xx, MPC8xx
+     microprocessors, and the IBM 4xx, 6xx, and follow-on
+     microprocessors.
+
+     Neither architecture is a subset of the other.  However there is a
+     large common subset of instructions supported by both.  An MQ
+     register is included in processors supporting the POWER
+     architecture.
+
+     You use these options to specify which instructions are available
+     on the processor you are using.  The default value of these
+     options is determined when configuring GCC.  Specifying the
+     `-mcpu=CPU_TYPE' overrides the specification of these options.  We
+     recommend you use the `-mcpu=CPU_TYPE' option rather than the
+     options listed above.
+
+     The `-mpower' option allows GCC to generate instructions that are
+     found only in the POWER architecture and to use the MQ register.
+     Specifying `-mpower2' implies `-power' and also allows GCC to
+     generate instructions that are present in the POWER2 architecture
+     but not the original POWER architecture.
+
+     The `-mpowerpc' option allows GCC to generate instructions that
+     are found only in the 32-bit subset of the PowerPC architecture.
+     Specifying `-mpowerpc-gpopt' implies `-mpowerpc' and also allows
+     GCC to use the optional PowerPC architecture instructions in the
+     General Purpose group, including floating-point square root.
+     Specifying `-mpowerpc-gfxopt' implies `-mpowerpc' and also allows
+     GCC to use the optional PowerPC architecture instructions in the
+     Graphics group, including floating-point select.
+
+     The `-mmfcrf' option allows GCC to generate the move from
+     condition register field instruction implemented on the POWER4
+     processor and other processors that support the PowerPC V2.01
+     architecture.  The `-mpopcntb' option allows GCC to generate the
+     popcount and double precision FP reciprocal estimate instruction
+     implemented on the POWER5 processor and other processors that
+     support the PowerPC V2.02 architecture.  The `-mpopcntd' option
+     allows GCC to generate the popcount instruction implemented on the
+     POWER7 processor and other processors that support the PowerPC
+     V2.06 architecture.  The `-mfprnd' option allows GCC to generate
+     the FP round to integer instructions implemented on the POWER5+
+     processor and other processors that support the PowerPC V2.03
+     architecture.  The `-mcmpb' option allows GCC to generate the
+     compare bytes instruction implemented on the POWER6 processor and
+     other processors that support the PowerPC V2.05 architecture.  The
+     `-mmfpgpr' option allows GCC to generate the FP move to/from
+     general purpose register instructions implemented on the POWER6X
+     processor and other processors that support the extended PowerPC
+     V2.05 architecture.  The `-mhard-dfp' option allows GCC to
+     generate the decimal floating point instructions implemented on
+     some POWER processors.
+
+     The `-mpowerpc64' option allows GCC to generate the additional
+     64-bit instructions that are found in the full PowerPC64
+     architecture and to treat GPRs as 64-bit, doubleword quantities.
+     GCC defaults to `-mno-powerpc64'.
+
+     If you specify both `-mno-power' and `-mno-powerpc', GCC will use
+     only the instructions in the common subset of both architectures
+     plus some special AIX common-mode calls, and will not use the MQ
+     register.  Specifying both `-mpower' and `-mpowerpc' permits GCC
+     to use any instruction from either architecture and to allow use
+     of the MQ register; specify this for the Motorola MPC601.
+
+`-mnew-mnemonics'
+`-mold-mnemonics'
+     Select which mnemonics to use in the generated assembler code.
+     With `-mnew-mnemonics', GCC uses the assembler mnemonics defined
+     for the PowerPC architecture.  With `-mold-mnemonics' it uses the
+     assembler mnemonics defined for the POWER architecture.
+     Instructions defined in only one architecture have only one
+     mnemonic; GCC uses that mnemonic irrespective of which of these
+     options is specified.
+
+     GCC defaults to the mnemonics appropriate for the architecture in
+     use.  Specifying `-mcpu=CPU_TYPE' sometimes overrides the value of
+     these option.  Unless you are building a cross-compiler, you
+     should normally not specify either `-mnew-mnemonics' or
+     `-mold-mnemonics', but should instead accept the default.
+
+`-mcpu=CPU_TYPE'
+     Set architecture type, register usage, choice of mnemonics, and
+     instruction scheduling parameters for machine type CPU_TYPE.
+     Supported values for CPU_TYPE are `401', `403', `405', `405fp',
+     `440', `440fp', `464', `464fp', `476', `476fp', `505', `601',
+     `602', `603', `603e', `604', `604e', `620', `630', `740', `7400',
+     `7450', `750', `801', `821', `823', `860', `970', `8540', `a2',
+     `e300c2', `e300c3', `e500mc', `e500mc64', `ec603e', `G3', `G4',
+     `G5', `titan', `power', `power2', `power3', `power4', `power5',
+     `power5+', `power6', `power6x', `power7', `common', `powerpc',
+     `powerpc64', `rios', `rios1', `rios2', `rsc', and `rs64'.
+
+     `-mcpu=common' selects a completely generic processor.  Code
+     generated under this option will run on any POWER or PowerPC
+     processor.  GCC will use only the instructions in the common
+     subset of both architectures, and will not use the MQ register.
+     GCC assumes a generic processor model for scheduling purposes.
+
+     `-mcpu=power', `-mcpu=power2', `-mcpu=powerpc', and
+     `-mcpu=powerpc64' specify generic POWER, POWER2, pure 32-bit
+     PowerPC (i.e., not MPC601), and 64-bit PowerPC architecture machine
+     types, with an appropriate, generic processor model assumed for
+     scheduling purposes.
+
+     The other options specify a specific processor.  Code generated
+     under those options will run best on that processor, and may not
+     run at all on others.
+
+     The `-mcpu' options automatically enable or disable the following
+     options:
+
+          -maltivec  -mfprnd  -mhard-float  -mmfcrf  -mmultiple
+          -mnew-mnemonics  -mpopcntb -mpopcntd  -mpower  -mpower2  -mpowerpc64
+          -mpowerpc-gpopt  -mpowerpc-gfxopt  -msingle-float -mdouble-float
+          -msimple-fpu -mstring  -mmulhw  -mdlmzb  -mmfpgpr -mvsx
+
+     The particular options set for any particular CPU will vary between
+     compiler versions, depending on what setting seems to produce
+     optimal code for that CPU; it doesn't necessarily reflect the
+     actual hardware's capabilities.  If you wish to set an individual
+     option to a particular value, you may specify it after the `-mcpu'
+     option, like `-mcpu=970 -mno-altivec'.
+
+     On AIX, the `-maltivec' and `-mpowerpc64' options are not enabled
+     or disabled by the `-mcpu' option at present because AIX does not
+     have full support for these options.  You may still enable or
+     disable them individually if you're sure it'll work in your
+     environment.
+
+`-mtune=CPU_TYPE'
+     Set the instruction scheduling parameters for machine type
+     CPU_TYPE, but do not set the architecture type, register usage, or
+     choice of mnemonics, as `-mcpu=CPU_TYPE' would.  The same values
+     for CPU_TYPE are used for `-mtune' as for `-mcpu'.  If both are
+     specified, the code generated will use the architecture,
+     registers, and mnemonics set by `-mcpu', but the scheduling
+     parameters set by `-mtune'.
+
+`-mcmodel=small'
+     Generate PowerPC64 code for the small model: The TOC is limited to
+     64k.
+
+`-mcmodel=medium'
+     Generate PowerPC64 code for the medium model: The TOC and other
+     static data may be up to a total of 4G in size.
+
+`-mcmodel=large'
+     Generate PowerPC64 code for the large model: The TOC may be up to
+     4G in size.  Other data and code is only limited by the 64-bit
+     address space.
+
+`-maltivec'
+`-mno-altivec'
+     Generate code that uses (does not use) AltiVec instructions, and
+     also enable the use of built-in functions that allow more direct
+     access to the AltiVec instruction set.  You may also need to set
+     `-mabi=altivec' to adjust the current ABI with AltiVec ABI
+     enhancements.
+
+`-mvrsave'
+`-mno-vrsave'
+     Generate VRSAVE instructions when generating AltiVec code.
+
+`-mgen-cell-microcode'
+     Generate Cell microcode instructions
+
+`-mwarn-cell-microcode'
+     Warning when a Cell microcode instruction is going to emitted.  An
+     example of a Cell microcode instruction is a variable shift.
+
+`-msecure-plt'
+     Generate code that allows ld and ld.so to build executables and
+     shared libraries with non-exec .plt and .got sections.  This is a
+     PowerPC 32-bit SYSV ABI option.
+
+`-mbss-plt'
+     Generate code that uses a BSS .plt section that ld.so fills in, and
+     requires .plt and .got sections that are both writable and
+     executable.  This is a PowerPC 32-bit SYSV ABI option.
+
+`-misel'
+`-mno-isel'
+     This switch enables or disables the generation of ISEL
+     instructions.
+
+`-misel=YES/NO'
+     This switch has been deprecated.  Use `-misel' and `-mno-isel'
+     instead.
+
+`-mspe'
+`-mno-spe'
+     This switch enables or disables the generation of SPE simd
+     instructions.
+
+`-mpaired'
+`-mno-paired'
+     This switch enables or disables the generation of PAIRED simd
+     instructions.
+
+`-mspe=YES/NO'
+     This option has been deprecated.  Use `-mspe' and `-mno-spe'
+     instead.
+
+`-mvsx'
+`-mno-vsx'
+     Generate code that uses (does not use) vector/scalar (VSX)
+     instructions, and also enable the use of built-in functions that
+     allow more direct access to the VSX instruction set.
+
+`-mfloat-gprs=YES/SINGLE/DOUBLE/NO'
+`-mfloat-gprs'
+     This switch enables or disables the generation of floating point
+     operations on the general purpose registers for architectures that
+     support it.
+
+     The argument YES or SINGLE enables the use of single-precision
+     floating point operations.
+
+     The argument DOUBLE enables the use of single and double-precision
+     floating point operations.
+
+     The argument NO disables floating point operations on the general
+     purpose registers.
+
+     This option is currently only available on the MPC854x.
+
+`-m32'
+`-m64'
+     Generate code for 32-bit or 64-bit environments of Darwin and SVR4
+     targets (including GNU/Linux).  The 32-bit environment sets int,
+     long and pointer to 32 bits and generates code that runs on any
+     PowerPC variant.  The 64-bit environment sets int to 32 bits and
+     long and pointer to 64 bits, and generates code for PowerPC64, as
+     for `-mpowerpc64'.
+
+`-mfull-toc'
+`-mno-fp-in-toc'
+`-mno-sum-in-toc'
+`-mminimal-toc'
+     Modify generation of the TOC (Table Of Contents), which is created
+     for every executable file.  The `-mfull-toc' option is selected by
+     default.  In that case, GCC will allocate at least one TOC entry
+     for each unique non-automatic variable reference in your program.
+     GCC will also place floating-point constants in the TOC.  However,
+     only 16,384 entries are available in the TOC.
+
+     If you receive a linker error message that saying you have
+     overflowed the available TOC space, you can reduce the amount of
+     TOC space used with the `-mno-fp-in-toc' and `-mno-sum-in-toc'
+     options.  `-mno-fp-in-toc' prevents GCC from putting floating-point
+     constants in the TOC and `-mno-sum-in-toc' forces GCC to generate
+     code to calculate the sum of an address and a constant at run-time
+     instead of putting that sum into the TOC.  You may specify one or
+     both of these options.  Each causes GCC to produce very slightly
+     slower and larger code at the expense of conserving TOC space.
+
+     If you still run out of space in the TOC even when you specify
+     both of these options, specify `-mminimal-toc' instead.  This
+     option causes GCC to make only one TOC entry for every file.  When
+     you specify this option, GCC will produce code that is slower and
+     larger but which uses extremely little TOC space.  You may wish to
+     use this option only on files that contain less frequently
+     executed code.
+
+`-maix64'
+`-maix32'
+     Enable 64-bit AIX ABI and calling convention: 64-bit pointers,
+     64-bit `long' type, and the infrastructure needed to support them.
+     Specifying `-maix64' implies `-mpowerpc64' and `-mpowerpc', while
+     `-maix32' disables the 64-bit ABI and implies `-mno-powerpc64'.
+     GCC defaults to `-maix32'.
+
+`-mxl-compat'
+`-mno-xl-compat'
+     Produce code that conforms more closely to IBM XL compiler
+     semantics when using AIX-compatible ABI.  Pass floating-point
+     arguments to prototyped functions beyond the register save area
+     (RSA) on the stack in addition to argument FPRs.  Do not assume
+     that most significant double in 128-bit long double value is
+     properly rounded when comparing values and converting to double.
+     Use XL symbol names for long double support routines.
+
+     The AIX calling convention was extended but not initially
+     documented to handle an obscure K&R C case of calling a function
+     that takes the address of its arguments with fewer arguments than
+     declared.  IBM XL compilers access floating point arguments which
+     do not fit in the RSA from the stack when a subroutine is compiled
+     without optimization.  Because always storing floating-point
+     arguments on the stack is inefficient and rarely needed, this
+     option is not enabled by default and only is necessary when
+     calling subroutines compiled by IBM XL compilers without
+     optimization.
+
+`-mpe'
+     Support "IBM RS/6000 SP" "Parallel Environment" (PE).  Link an
+     application written to use message passing with special startup
+     code to enable the application to run.  The system must have PE
+     installed in the standard location (`/usr/lpp/ppe.poe/'), or the
+     `specs' file must be overridden with the `-specs=' option to
+     specify the appropriate directory location.  The Parallel
+     Environment does not support threads, so the `-mpe' option and the
+     `-pthread' option are incompatible.
+
+`-malign-natural'
+`-malign-power'
+     On AIX, 32-bit Darwin, and 64-bit PowerPC GNU/Linux, the option
+     `-malign-natural' overrides the ABI-defined alignment of larger
+     types, such as floating-point doubles, on their natural size-based
+     boundary.  The option `-malign-power' instructs GCC to follow the
+     ABI-specified alignment rules.  GCC defaults to the standard
+     alignment defined in the ABI.
+
+     On 64-bit Darwin, natural alignment is the default, and
+     `-malign-power' is not supported.
+
+`-msoft-float'
+`-mhard-float'
+     Generate code that does not use (uses) the floating-point register
+     set.  Software floating point emulation is provided if you use the
+     `-msoft-float' option, and pass the option to GCC when linking.
+
+`-msingle-float'
+`-mdouble-float'
+     Generate code for single or double-precision floating point
+     operations.  `-mdouble-float' implies `-msingle-float'.
+
+`-msimple-fpu'
+     Do not generate sqrt and div instructions for hardware floating
+     point unit.
+
+`-mfpu'
+     Specify type of floating point unit.  Valid values are SP_LITE
+     (equivalent to -msingle-float -msimple-fpu), DP_LITE (equivalent
+     to -mdouble-float -msimple-fpu), SP_FULL (equivalent to
+     -msingle-float), and DP_FULL (equivalent to -mdouble-float).
+
+`-mxilinx-fpu'
+     Perform optimizations for floating point unit on Xilinx PPC
+     405/440.
+
+`-mmultiple'
+`-mno-multiple'
+     Generate code that uses (does not use) the load multiple word
+     instructions and the store multiple word instructions.  These
+     instructions are generated by default on POWER systems, and not
+     generated on PowerPC systems.  Do not use `-mmultiple' on little
+     endian PowerPC systems, since those instructions do not work when
+     the processor is in little endian mode.  The exceptions are PPC740
+     and PPC750 which permit the instructions usage in little endian
+     mode.
+
+`-mstring'
+`-mno-string'
+     Generate code that uses (does not use) the load string instructions
+     and the store string word instructions to save multiple registers
+     and do small block moves.  These instructions are generated by
+     default on POWER systems, and not generated on PowerPC systems.
+     Do not use `-mstring' on little endian PowerPC systems, since those
+     instructions do not work when the processor is in little endian
+     mode.  The exceptions are PPC740 and PPC750 which permit the
+     instructions usage in little endian mode.
+
+`-mupdate'
+`-mno-update'
+     Generate code that uses (does not use) the load or store
+     instructions that update the base register to the address of the
+     calculated memory location.  These instructions are generated by
+     default.  If you use `-mno-update', there is a small window
+     between the time that the stack pointer is updated and the address
+     of the previous frame is stored, which means code that walks the
+     stack frame across interrupts or signals may get corrupted data.
+
+`-mavoid-indexed-addresses'
+`-mno-avoid-indexed-addresses'
+     Generate code that tries to avoid (not avoid) the use of indexed
+     load or store instructions. These instructions can incur a
+     performance penalty on Power6 processors in certain situations,
+     such as when stepping through large arrays that cross a 16M
+     boundary.  This option is enabled by default when targetting
+     Power6 and disabled otherwise.
+
+`-mfused-madd'
+`-mno-fused-madd'
+     Generate code that uses (does not use) the floating point multiply
+     and accumulate instructions.  These instructions are generated by
+     default if hardware floating point is used.  The machine dependent
+     `-mfused-madd' option is now mapped to the machine independent
+     `-ffp-contract=fast' option, and `-mno-fused-madd' is mapped to
+     `-ffp-contract=off'.
+
+`-mmulhw'
+`-mno-mulhw'
+     Generate code that uses (does not use) the half-word multiply and
+     multiply-accumulate instructions on the IBM 405, 440, 464 and 476
+     processors.  These instructions are generated by default when
+     targetting those processors.
+
+`-mdlmzb'
+`-mno-dlmzb'
+     Generate code that uses (does not use) the string-search `dlmzb'
+     instruction on the IBM 405, 440, 464 and 476 processors.  This
+     instruction is generated by default when targetting those
+     processors.
+
+`-mno-bit-align'
+`-mbit-align'
+     On System V.4 and embedded PowerPC systems do not (do) force
+     structures and unions that contain bit-fields to be aligned to the
+     base type of the bit-field.
+
+     For example, by default a structure containing nothing but 8
+     `unsigned' bit-fields of length 1 would be aligned to a 4 byte
+     boundary and have a size of 4 bytes.  By using `-mno-bit-align',
+     the structure would be aligned to a 1 byte boundary and be one
+     byte in size.
+
+`-mno-strict-align'
+`-mstrict-align'
+     On System V.4 and embedded PowerPC systems do not (do) assume that
+     unaligned memory references will be handled by the system.
+
+`-mrelocatable'
+`-mno-relocatable'
+     Generate code that allows (does not allow) a static executable to
+     be relocated to a different address at runtime.  A simple embedded
+     PowerPC system loader should relocate the entire contents of
+     `.got2' and 4-byte locations listed in the `.fixup' section, a
+     table of 32-bit addresses generated by this option.  For this to
+     work, all objects linked together must be compiled with
+     `-mrelocatable' or `-mrelocatable-lib'.  `-mrelocatable' code
+     aligns the stack to an 8 byte boundary.
+
+`-mrelocatable-lib'
+`-mno-relocatable-lib'
+     Like `-mrelocatable', `-mrelocatable-lib' generates a `.fixup'
+     section to allow static executables to be relocated at runtime,
+     but `-mrelocatable-lib' does not use the smaller stack alignment
+     of `-mrelocatable'.  Objects compiled with `-mrelocatable-lib' may
+     be linked with objects compiled with any combination of the
+     `-mrelocatable' options.
+
+`-mno-toc'
+`-mtoc'
+     On System V.4 and embedded PowerPC systems do not (do) assume that
+     register 2 contains a pointer to a global area pointing to the
+     addresses used in the program.
+
+`-mlittle'
+`-mlittle-endian'
+     On System V.4 and embedded PowerPC systems compile code for the
+     processor in little endian mode.  The `-mlittle-endian' option is
+     the same as `-mlittle'.
+
+`-mbig'
+`-mbig-endian'
+     On System V.4 and embedded PowerPC systems compile code for the
+     processor in big endian mode.  The `-mbig-endian' option is the
+     same as `-mbig'.
+
+`-mdynamic-no-pic'
+     On Darwin and Mac OS X systems, compile code so that it is not
+     relocatable, but that its external references are relocatable.  The
+     resulting code is suitable for applications, but not shared
+     libraries.
+
+`-msingle-pic-base'
+     Treat the register used for PIC addressing as read-only, rather
+     than loading it in the prologue for each function.  The run-time
+     system is responsible for initializing this register with an
+     appropriate value before execution begins.
+
+`-mprioritize-restricted-insns=PRIORITY'
+     This option controls the priority that is assigned to
+     dispatch-slot restricted instructions during the second scheduling
+     pass.  The argument PRIORITY takes the value 0/1/2 to assign
+     NO/HIGHEST/SECOND-HIGHEST priority to dispatch slot restricted
+     instructions.
+
+`-msched-costly-dep=DEPENDENCE_TYPE'
+     This option controls which dependences are considered costly by
+     the target during instruction scheduling.  The argument
+     DEPENDENCE_TYPE takes one of the following values: NO: no
+     dependence is costly, ALL: all dependences are costly,
+     TRUE_STORE_TO_LOAD: a true dependence from store to load is costly,
+     STORE_TO_LOAD: any dependence from store to load is costly,
+     NUMBER: any dependence which latency >= NUMBER is costly.
+
+`-minsert-sched-nops=SCHEME'
+     This option controls which nop insertion scheme will be used during
+     the second scheduling pass.  The argument SCHEME takes one of the
+     following values: NO: Don't insert nops.  PAD: Pad with nops any
+     dispatch group which has vacant issue slots, according to the
+     scheduler's grouping.  REGROUP_EXACT: Insert nops to force costly
+     dependent insns into separate groups.  Insert exactly as many nops
+     as needed to force an insn to a new group, according to the
+     estimated processor grouping.  NUMBER: Insert nops to force costly
+     dependent insns into separate groups.  Insert NUMBER nops to force
+     an insn to a new group.
+
+`-mcall-sysv'
+     On System V.4 and embedded PowerPC systems compile code using
+     calling conventions that adheres to the March 1995 draft of the
+     System V Application Binary Interface, PowerPC processor
+     supplement.  This is the default unless you configured GCC using
+     `powerpc-*-eabiaix'.
+
+`-mcall-sysv-eabi'
+`-mcall-eabi'
+     Specify both `-mcall-sysv' and `-meabi' options.
+
+`-mcall-sysv-noeabi'
+     Specify both `-mcall-sysv' and `-mno-eabi' options.
+
+`-mcall-aixdesc'
+     On System V.4 and embedded PowerPC systems compile code for the AIX
+     operating system.
+
+`-mcall-linux'
+     On System V.4 and embedded PowerPC systems compile code for the
+     Linux-based GNU system.
+
+`-mcall-gnu'
+     On System V.4 and embedded PowerPC systems compile code for the
+     Hurd-based GNU system.
+
+`-mcall-freebsd'
+     On System V.4 and embedded PowerPC systems compile code for the
+     FreeBSD operating system.
+
+`-mcall-netbsd'
+     On System V.4 and embedded PowerPC systems compile code for the
+     NetBSD operating system.
+
+`-mcall-openbsd'
+     On System V.4 and embedded PowerPC systems compile code for the
+     OpenBSD operating system.
+
+`-maix-struct-return'
+     Return all structures in memory (as specified by the AIX ABI).
+
+`-msvr4-struct-return'
+     Return structures smaller than 8 bytes in registers (as specified
+     by the SVR4 ABI).
+
+`-mabi=ABI-TYPE'
+     Extend the current ABI with a particular extension, or remove such
+     extension.  Valid values are ALTIVEC, NO-ALTIVEC, SPE, NO-SPE,
+     IBMLONGDOUBLE, IEEELONGDOUBLE.
+
+`-mabi=spe'
+     Extend the current ABI with SPE ABI extensions.  This does not
+     change the default ABI, instead it adds the SPE ABI extensions to
+     the current ABI.
+
+`-mabi=no-spe'
+     Disable Booke SPE ABI extensions for the current ABI.
+
+`-mabi=ibmlongdouble'
+     Change the current ABI to use IBM extended precision long double.
+     This is a PowerPC 32-bit SYSV ABI option.
+
+`-mabi=ieeelongdouble'
+     Change the current ABI to use IEEE extended precision long double.
+     This is a PowerPC 32-bit Linux ABI option.
+
+`-mprototype'
+`-mno-prototype'
+     On System V.4 and embedded PowerPC systems assume that all calls to
+     variable argument functions are properly prototyped.  Otherwise,
+     the compiler must insert an instruction before every non
+     prototyped call to set or clear bit 6 of the condition code
+     register (CR) to indicate whether floating point values were
+     passed in the floating point registers in case the function takes
+     a variable arguments.  With `-mprototype', only calls to
+     prototyped variable argument functions will set or clear the bit.
+
+`-msim'
+     On embedded PowerPC systems, assume that the startup module is
+     called `sim-crt0.o' and that the standard C libraries are
+     `libsim.a' and `libc.a'.  This is the default for
+     `powerpc-*-eabisim' configurations.
+
+`-mmvme'
+     On embedded PowerPC systems, assume that the startup module is
+     called `crt0.o' and the standard C libraries are `libmvme.a' and
+     `libc.a'.
+
+`-mads'
+     On embedded PowerPC systems, assume that the startup module is
+     called `crt0.o' and the standard C libraries are `libads.a' and
+     `libc.a'.
+
+`-myellowknife'
+     On embedded PowerPC systems, assume that the startup module is
+     called `crt0.o' and the standard C libraries are `libyk.a' and
+     `libc.a'.
+
+`-mvxworks'
+     On System V.4 and embedded PowerPC systems, specify that you are
+     compiling for a VxWorks system.
+
+`-memb'
+     On embedded PowerPC systems, set the PPC_EMB bit in the ELF flags
+     header to indicate that `eabi' extended relocations are used.
+
+`-meabi'
+`-mno-eabi'
+     On System V.4 and embedded PowerPC systems do (do not) adhere to
+     the Embedded Applications Binary Interface (eabi) which is a set of
+     modifications to the System V.4 specifications.  Selecting `-meabi'
+     means that the stack is aligned to an 8 byte boundary, a function
+     `__eabi' is called to from `main' to set up the eabi environment,
+     and the `-msdata' option can use both `r2' and `r13' to point to
+     two separate small data areas.  Selecting `-mno-eabi' means that
+     the stack is aligned to a 16 byte boundary, do not call an
+     initialization function from `main', and the `-msdata' option will
+     only use `r13' to point to a single small data area.  The `-meabi'
+     option is on by default if you configured GCC using one of the
+     `powerpc*-*-eabi*' options.
+
+`-msdata=eabi'
+     On System V.4 and embedded PowerPC systems, put small initialized
+     `const' global and static data in the `.sdata2' section, which is
+     pointed to by register `r2'.  Put small initialized non-`const'
+     global and static data in the `.sdata' section, which is pointed
+     to by register `r13'.  Put small uninitialized global and static
+     data in the `.sbss' section, which is adjacent to the `.sdata'
+     section.  The `-msdata=eabi' option is incompatible with the
+     `-mrelocatable' option.  The `-msdata=eabi' option also sets the
+     `-memb' option.
+
+`-msdata=sysv'
+     On System V.4 and embedded PowerPC systems, put small global and
+     static data in the `.sdata' section, which is pointed to by
+     register `r13'.  Put small uninitialized global and static data in
+     the `.sbss' section, which is adjacent to the `.sdata' section.
+     The `-msdata=sysv' option is incompatible with the `-mrelocatable'
+     option.
+
+`-msdata=default'
+`-msdata'
+     On System V.4 and embedded PowerPC systems, if `-meabi' is used,
+     compile code the same as `-msdata=eabi', otherwise compile code the
+     same as `-msdata=sysv'.
+
+`-msdata=data'
+     On System V.4 and embedded PowerPC systems, put small global data
+     in the `.sdata' section.  Put small uninitialized global data in
+     the `.sbss' section.  Do not use register `r13' to address small
+     data however.  This is the default behavior unless other `-msdata'
+     options are used.
+
+`-msdata=none'
+`-mno-sdata'
+     On embedded PowerPC systems, put all initialized global and static
+     data in the `.data' section, and all uninitialized data in the
+     `.bss' section.
+
+`-mblock-move-inline-limit=NUM'
+     Inline all block moves (such as calls to `memcpy' or structure
+     copies) less than or equal to NUM bytes.  The minimum value for
+     NUM is 32 bytes on 32-bit targets and 64 bytes on 64-bit targets.
+     The default value is target-specific.
+
+`-G NUM'
+     On embedded PowerPC systems, put global and static items less than
+     or equal to NUM bytes into the small data or bss sections instead
+     of the normal data or bss section.  By default, NUM is 8.  The `-G
+     NUM' switch is also passed to the linker.  All modules should be
+     compiled with the same `-G NUM' value.
+
+`-mregnames'
+`-mno-regnames'
+     On System V.4 and embedded PowerPC systems do (do not) emit
+     register names in the assembly language output using symbolic
+     forms.
+
+`-mlongcall'
+`-mno-longcall'
+     By default assume that all calls are far away so that a longer more
+     expensive calling sequence is required.  This is required for calls
+     further than 32 megabytes (33,554,432 bytes) from the current
+     location.  A short call will be generated if the compiler knows
+     the call cannot be that far away.  This setting can be overridden
+     by the `shortcall' function attribute, or by `#pragma longcall(0)'.
+
+     Some linkers are capable of detecting out-of-range calls and
+     generating glue code on the fly.  On these systems, long calls are
+     unnecessary and generate slower code.  As of this writing, the AIX
+     linker can do this, as can the GNU linker for PowerPC/64.  It is
+     planned to add this feature to the GNU linker for 32-bit PowerPC
+     systems as well.
+
+     On Darwin/PPC systems, `#pragma longcall' will generate "jbsr
+     callee, L42", plus a "branch island" (glue code).  The two target
+     addresses represent the callee and the "branch island".  The
+     Darwin/PPC linker will prefer the first address and generate a "bl
+     callee" if the PPC "bl" instruction will reach the callee directly;
+     otherwise, the linker will generate "bl L42" to call the "branch
+     island".  The "branch island" is appended to the body of the
+     calling function; it computes the full 32-bit address of the callee
+     and jumps to it.
+
+     On Mach-O (Darwin) systems, this option directs the compiler emit
+     to the glue for every direct call, and the Darwin linker decides
+     whether to use or discard it.
+
+     In the future, we may cause GCC to ignore all longcall
+     specifications when the linker is known to generate glue.
+
+`-mtls-markers'
+`-mno-tls-markers'
+     Mark (do not mark) calls to `__tls_get_addr' with a relocation
+     specifying the function argument.  The relocation allows ld to
+     reliably associate function call with argument setup instructions
+     for TLS optimization, which in turn allows gcc to better schedule
+     the sequence.
+
+`-pthread'
+     Adds support for multithreading with the "pthreads" library.  This
+     option sets flags for both the preprocessor and linker.
+
+`-mrecip'
+`-mno-recip'
+     This option will enable GCC to use the reciprocal estimate and
+     reciprocal square root estimate instructions with additional
+     Newton-Raphson steps to increase precision instead of doing a
+     divide or square root and divide for floating point arguments.
+     You should use the `-ffast-math' option when using `-mrecip' (or at
+     least `-funsafe-math-optimizations', `-finite-math-only',
+     `-freciprocal-math' and `-fno-trapping-math').  Note that while
+     the throughput of the sequence is generally higher than the
+     throughput of the non-reciprocal instruction, the precision of the
+     sequence can be decreased by up to 2 ulp (i.e. the inverse of 1.0
+     equals 0.99999994) for reciprocal square roots.
+
+`-mrecip=OPT'
+     This option allows to control which reciprocal estimate
+     instructions may be used.  OPT is a comma separated list of
+     options, that may be preceded by a `!' to invert the option:
+     `all': enable all estimate instructions, `default': enable the
+     default instructions, equivalent to `-mrecip', `none': disable all
+     estimate instructions, equivalent to `-mno-recip'; `div': enable
+     the reciprocal approximation instructions for both single and
+     double precision; `divf': enable the single precision reciprocal
+     approximation instructions; `divd': enable the double precision
+     reciprocal approximation instructions; `rsqrt': enable the
+     reciprocal square root approximation instructions for both single
+     and double precision; `rsqrtf': enable the single precision
+     reciprocal square root approximation instructions; `rsqrtd':
+     enable the double precision reciprocal square root approximation
+     instructions;
+
+     So for example, `-mrecip=all,!rsqrtd' would enable the all of the
+     reciprocal estimate instructions, except for the `FRSQRTE',
+     `XSRSQRTEDP', and `XVRSQRTEDP' instructions which handle the
+     double precision reciprocal square root calculations.
+
+`-mrecip-precision'
+`-mno-recip-precision'
+     Assume (do not assume) that the reciprocal estimate instructions
+     provide higher precision estimates than is mandated by the powerpc
+     ABI.  Selecting `-mcpu=power6' or `-mcpu=power7' automatically
+     selects `-mrecip-precision'.  The double precision square root
+     estimate instructions are not generated by default on low
+     precision machines, since they do not provide an estimate that
+     converges after three steps.
+
+`-mveclibabi=TYPE'
+     Specifies the ABI type to use for vectorizing intrinsics using an
+     external library.  The only type supported at present is `mass',
+     which specifies to use IBM's Mathematical Acceleration Subsystem
+     (MASS) libraries for vectorizing intrinsics using external
+     libraries.  GCC will currently emit calls to `acosd2', `acosf4',
+     `acoshd2', `acoshf4', `asind2', `asinf4', `asinhd2', `asinhf4',
+     `atan2d2', `atan2f4', `atand2', `atanf4', `atanhd2', `atanhf4',
+     `cbrtd2', `cbrtf4', `cosd2', `cosf4', `coshd2', `coshf4',
+     `erfcd2', `erfcf4', `erfd2', `erff4', `exp2d2', `exp2f4', `expd2',
+     `expf4', `expm1d2', `expm1f4', `hypotd2', `hypotf4', `lgammad2',
+     `lgammaf4', `log10d2', `log10f4', `log1pd2', `log1pf4', `log2d2',
+     `log2f4', `logd2', `logf4', `powd2', `powf4', `sind2', `sinf4',
+     `sinhd2', `sinhf4', `sqrtd2', `sqrtf4', `tand2', `tanf4',
+     `tanhd2', and `tanhf4' when generating code for power7.  Both
+     `-ftree-vectorize' and `-funsafe-math-optimizations' have to be
+     enabled.  The MASS libraries will have to be specified at link
+     time.
+
+`-mfriz'
+`-mno-friz'
+     Generate (do not generate) the `friz' instruction when the
+     `-funsafe-math-optimizations' option is used to optimize rounding
+     a floating point value to 64-bit integer and back to floating
+     point.  The `friz' instruction does not return the same value if
+     the floating point number is too large to fit in an integer.
+
+
+File: gcc.info,  Node: RX Options,  Next: S/390 and zSeries Options,  Prev: RS/6000 and PowerPC Options,  Up: Submodel Options
+
+3.17.34 RX Options
+------------------
+
+These command line options are defined for RX targets:
+
+`-m64bit-doubles'
+`-m32bit-doubles'
+     Make the `double' data type be 64-bits (`-m64bit-doubles') or
+     32-bits (`-m32bit-doubles') in size.  The default is
+     `-m32bit-doubles'.  _Note_ RX floating point hardware only works
+     on 32-bit values, which is why the default is `-m32bit-doubles'.
+
+`-fpu'
+`-nofpu'
+     Enables (`-fpu') or disables (`-nofpu') the use of RX floating
+     point hardware.  The default is enabled for the RX600 series and
+     disabled for the RX200 series.
+
+     Floating point instructions will only be generated for 32-bit
+     floating point values however, so if the `-m64bit-doubles' option
+     is in use then the FPU hardware will not be used for doubles.
+
+     _Note_ If the `-fpu' option is enabled then
+     `-funsafe-math-optimizations' is also enabled automatically.  This
+     is because the RX FPU instructions are themselves unsafe.
+
+`-mcpu=NAME'
+     Selects the type of RX CPU to be targeted.  Currently three types
+     are supported, the generic RX600 and RX200 series hardware and the
+     specific RX610 CPU.  The default is RX600.
+
+     The only difference between RX600 and RX610 is that the RX610 does
+     not support the `MVTIPL' instruction.
+
+     The RX200 series does not have a hardware floating point unit and
+     so `-nofpu' is enabled by default when this type is selected.
+
+`-mbig-endian-data'
+`-mlittle-endian-data'
+     Store data (but not code) in the big-endian format.  The default is
+     `-mlittle-endian-data', i.e. to store data in the little endian
+     format.
+
+`-msmall-data-limit=N'
+     Specifies the maximum size in bytes of global and static variables
+     which can be placed into the small data area.  Using the small data
+     area can lead to smaller and faster code, but the size of area is
+     limited and it is up to the programmer to ensure that the area does
+     not overflow.  Also when the small data area is used one of the
+     RX's registers (`r13') is reserved for use pointing to this area,
+     so it is no longer available for use by the compiler.  This could
+     result in slower and/or larger code if variables which once could
+     have been held in `r13' are now pushed onto the stack.
+
+     Note, common variables (variables which have not been initialised)
+     and constants are not placed into the small data area as they are
+     assigned to other sections in the output executable.
+
+     The default value is zero, which disables this feature.  Note, this
+     feature is not enabled by default with higher optimization levels
+     (`-O2' etc) because of the potentially detrimental effects of
+     reserving register `r13'.  It is up to the programmer to
+     experiment and discover whether this feature is of benefit to their
+     program.
+
+`-msim'
+`-mno-sim'
+     Use the simulator runtime.  The default is to use the libgloss
+     board specific runtime.
+
+`-mas100-syntax'
+`-mno-as100-syntax'
+     When generating assembler output use a syntax that is compatible
+     with Renesas's AS100 assembler.  This syntax can also be handled
+     by the GAS assembler but it has some restrictions so generating it
+     is not the default option.
+
+`-mmax-constant-size=N'
+     Specifies the maximum size, in bytes, of a constant that can be
+     used as an operand in a RX instruction.  Although the RX
+     instruction set does allow constants of up to 4 bytes in length to
+     be used in instructions, a longer value equates to a longer
+     instruction.  Thus in some circumstances it can be beneficial to
+     restrict the size of constants that are used in instructions.
+     Constants that are too big are instead placed into a constant pool
+     and referenced via register indirection.
+
+     The value N can be between 0 and 4.  A value of 0 (the default) or
+     4 means that constants of any size are allowed.
+
+`-mrelax'
+     Enable linker relaxation.  Linker relaxation is a process whereby
+     the linker will attempt to reduce the size of a program by finding
+     shorter versions of various instructions.  Disabled by default.
+
+`-mint-register=N'
+     Specify the number of registers to reserve for fast interrupt
+     handler functions.  The value N can be between 0 and 4.  A value
+     of 1 means that register `r13' will be reserved for the exclusive
+     use of fast interrupt handlers.  A value of 2 reserves `r13' and
+     `r12'.  A value of 3 reserves `r13', `r12' and `r11', and a value
+     of 4 reserves `r13' through `r10'.  A value of 0, the default,
+     does not reserve any registers.
+
+`-msave-acc-in-interrupts'
+     Specifies that interrupt handler functions should preserve the
+     accumulator register.  This is only necessary if normal code might
+     use the accumulator register, for example because it performs
+     64-bit multiplications.  The default is to ignore the accumulator
+     as this makes the interrupt handlers faster.
+
+
+ _Note:_ The generic GCC command line `-ffixed-REG' has special
+significance to the RX port when used with the `interrupt' function
+attribute.  This attribute indicates a function intended to process
+fast interrupts.  GCC will will ensure that it only uses the registers
+`r10', `r11', `r12' and/or `r13' and only provided that the normal use
+of the corresponding registers have been restricted via the
+`-ffixed-REG' or `-mint-register' command line options.
+
+
+File: gcc.info,  Node: S/390 and zSeries Options,  Next: Score Options,  Prev: RX Options,  Up: Submodel Options
+
+3.17.35 S/390 and zSeries Options
+---------------------------------
+
+These are the `-m' options defined for the S/390 and zSeries
+architecture.
+
+`-mhard-float'
+`-msoft-float'
+     Use (do not use) the hardware floating-point instructions and
+     registers for floating-point operations.  When `-msoft-float' is
+     specified, functions in `libgcc.a' will be used to perform
+     floating-point operations.  When `-mhard-float' is specified, the
+     compiler generates IEEE floating-point instructions.  This is the
+     default.
+
+`-mhard-dfp'
+`-mno-hard-dfp'
+     Use (do not use) the hardware decimal-floating-point instructions
+     for decimal-floating-point operations.  When `-mno-hard-dfp' is
+     specified, functions in `libgcc.a' will be used to perform
+     decimal-floating-point operations.  When `-mhard-dfp' is
+     specified, the compiler generates decimal-floating-point hardware
+     instructions.  This is the default for `-march=z9-ec' or higher.
+
+`-mlong-double-64'
+`-mlong-double-128'
+     These switches control the size of `long double' type. A size of
+     64bit makes the `long double' type equivalent to the `double'
+     type. This is the default.
+
+`-mbackchain'
+`-mno-backchain'
+     Store (do not store) the address of the caller's frame as
+     backchain pointer into the callee's stack frame.  A backchain may
+     be needed to allow debugging using tools that do not understand
+     DWARF-2 call frame information.  When `-mno-packed-stack' is in
+     effect, the backchain pointer is stored at the bottom of the stack
+     frame; when `-mpacked-stack' is in effect, the backchain is placed
+     into the topmost word of the 96/160 byte register save area.
+
+     In general, code compiled with `-mbackchain' is call-compatible
+     with code compiled with `-mmo-backchain'; however, use of the
+     backchain for debugging purposes usually requires that the whole
+     binary is built with `-mbackchain'.  Note that the combination of
+     `-mbackchain', `-mpacked-stack' and `-mhard-float' is not
+     supported.  In order to build a linux kernel use `-msoft-float'.
+
+     The default is to not maintain the backchain.
+
+`-mpacked-stack'
+`-mno-packed-stack'
+     Use (do not use) the packed stack layout.  When
+     `-mno-packed-stack' is specified, the compiler uses the all fields
+     of the 96/160 byte register save area only for their default
+     purpose; unused fields still take up stack space.  When
+     `-mpacked-stack' is specified, register save slots are densely
+     packed at the top of the register save area; unused space is
+     reused for other purposes, allowing for more efficient use of the
+     available stack space.  However, when `-mbackchain' is also in
+     effect, the topmost word of the save area is always used to store
+     the backchain, and the return address register is always saved two
+     words below the backchain.
+
+     As long as the stack frame backchain is not used, code generated
+     with `-mpacked-stack' is call-compatible with code generated with
+     `-mno-packed-stack'.  Note that some non-FSF releases of GCC 2.95
+     for S/390 or zSeries generated code that uses the stack frame
+     backchain at run time, not just for debugging purposes.  Such code
+     is not call-compatible with code compiled with `-mpacked-stack'.
+     Also, note that the combination of `-mbackchain', `-mpacked-stack'
+     and `-mhard-float' is not supported.  In order to build a linux
+     kernel use `-msoft-float'.
+
+     The default is to not use the packed stack layout.
+
+`-msmall-exec'
+`-mno-small-exec'
+     Generate (or do not generate) code using the `bras' instruction to
+     do subroutine calls.  This only works reliably if the total
+     executable size does not exceed 64k.  The default is to use the
+     `basr' instruction instead, which does not have this limitation.
+
+`-m64'
+`-m31'
+     When `-m31' is specified, generate code compliant to the GNU/Linux
+     for S/390 ABI.  When `-m64' is specified, generate code compliant
+     to the GNU/Linux for zSeries ABI.  This allows GCC in particular
+     to generate 64-bit instructions.  For the `s390' targets, the
+     default is `-m31', while the `s390x' targets default to `-m64'.
+
+`-mzarch'
+`-mesa'
+     When `-mzarch' is specified, generate code using the instructions
+     available on z/Architecture.  When `-mesa' is specified, generate
+     code using the instructions available on ESA/390.  Note that
+     `-mesa' is not possible with `-m64'.  When generating code
+     compliant to the GNU/Linux for S/390 ABI, the default is `-mesa'.
+     When generating code compliant to the GNU/Linux for zSeries ABI,
+     the default is `-mzarch'.
+
+`-mmvcle'
+`-mno-mvcle'
+     Generate (or do not generate) code using the `mvcle' instruction
+     to perform block moves.  When `-mno-mvcle' is specified, use a
+     `mvc' loop instead.  This is the default unless optimizing for
+     size.
+
+`-mdebug'
+`-mno-debug'
+     Print (or do not print) additional debug information when
+     compiling.  The default is to not print debug information.
+
+`-march=CPU-TYPE'
+     Generate code that will run on CPU-TYPE, which is the name of a
+     system representing a certain processor type.  Possible values for
+     CPU-TYPE are `g5', `g6', `z900', `z990', `z9-109', `z9-ec' and
+     `z10'.  When generating code using the instructions available on
+     z/Architecture, the default is `-march=z900'.  Otherwise, the
+     default is `-march=g5'.
+
+`-mtune=CPU-TYPE'
+     Tune to CPU-TYPE everything applicable about the generated code,
+     except for the ABI and the set of available instructions.  The
+     list of CPU-TYPE values is the same as for `-march'.  The default
+     is the value used for `-march'.
+
+`-mtpf-trace'
+`-mno-tpf-trace'
+     Generate code that adds (does not add) in TPF OS specific branches
+     to trace routines in the operating system.  This option is off by
+     default, even when compiling for the TPF OS.
+
+`-mfused-madd'
+`-mno-fused-madd'
+     Generate code that uses (does not use) the floating point multiply
+     and accumulate instructions.  These instructions are generated by
+     default if hardware floating point is used.
+
+`-mwarn-framesize=FRAMESIZE'
+     Emit a warning if the current function exceeds the given frame
+     size.  Because this is a compile time check it doesn't need to be
+     a real problem when the program runs.  It is intended to identify
+     functions which most probably cause a stack overflow.  It is
+     useful to be used in an environment with limited stack size e.g.
+     the linux kernel.
+
+`-mwarn-dynamicstack'
+     Emit a warning if the function calls alloca or uses dynamically
+     sized arrays.  This is generally a bad idea with a limited stack
+     size.
+
+`-mstack-guard=STACK-GUARD'
+`-mstack-size=STACK-SIZE'
+     If these options are provided the s390 back end emits additional
+     instructions in the function prologue which trigger a trap if the
+     stack size is STACK-GUARD bytes above the STACK-SIZE (remember
+     that the stack on s390 grows downward).  If the STACK-GUARD option
+     is omitted the smallest power of 2 larger than the frame size of
+     the compiled function is chosen.  These options are intended to be
+     used to help debugging stack overflow problems.  The additionally
+     emitted code causes only little overhead and hence can also be
+     used in production like systems without greater performance
+     degradation.  The given values have to be exact powers of 2 and
+     STACK-SIZE has to be greater than STACK-GUARD without exceeding
+     64k.  In order to be efficient the extra code makes the assumption
+     that the stack starts at an address aligned to the value given by
+     STACK-SIZE.  The STACK-GUARD option can only be used in
+     conjunction with STACK-SIZE.
+
+
+File: gcc.info,  Node: Score Options,  Next: SH Options,  Prev: S/390 and zSeries Options,  Up: Submodel Options
+
+3.17.36 Score Options
+---------------------
+
+These options are defined for Score implementations:
+
+`-meb'
+     Compile code for big endian mode.  This is the default.
+
+`-mel'
+     Compile code for little endian mode.
+
+`-mnhwloop'
+     Disable generate bcnz instruction.
+
+`-muls'
+     Enable generate unaligned load and store instruction.
+
+`-mmac'
+     Enable the use of multiply-accumulate instructions. Disabled by
+     default.
+
+`-mscore5'
+     Specify the SCORE5 as the target architecture.
+
+`-mscore5u'
+     Specify the SCORE5U of the target architecture.
+
+`-mscore7'
+     Specify the SCORE7 as the target architecture. This is the default.
+
+`-mscore7d'
+     Specify the SCORE7D as the target architecture.
+
+
+File: gcc.info,  Node: SH Options,  Next: Solaris 2 Options,  Prev: Score Options,  Up: Submodel Options
+
+3.17.37 SH Options
+------------------
+
+These `-m' options are defined for the SH implementations:
+
+`-m1'
+     Generate code for the SH1.
+
+`-m2'
+     Generate code for the SH2.
+
+`-m2e'
+     Generate code for the SH2e.
+
+`-m2a-nofpu'
+     Generate code for the SH2a without FPU, or for a SH2a-FPU in such
+     a way that the floating-point unit is not used.
+
+`-m2a-single-only'
+     Generate code for the SH2a-FPU, in such a way that no
+     double-precision floating point operations are used.
+
+`-m2a-single'
+     Generate code for the SH2a-FPU assuming the floating-point unit is
+     in single-precision mode by default.
+
+`-m2a'
+     Generate code for the SH2a-FPU assuming the floating-point unit is
+     in double-precision mode by default.
+
+`-m3'
+     Generate code for the SH3.
+
+`-m3e'
+     Generate code for the SH3e.
+
+`-m4-nofpu'
+     Generate code for the SH4 without a floating-point unit.
+
+`-m4-single-only'
+     Generate code for the SH4 with a floating-point unit that only
+     supports single-precision arithmetic.
+
+`-m4-single'
+     Generate code for the SH4 assuming the floating-point unit is in
+     single-precision mode by default.
+
+`-m4'
+     Generate code for the SH4.
+
+`-m4a-nofpu'
+     Generate code for the SH4al-dsp, or for a SH4a in such a way that
+     the floating-point unit is not used.
+
+`-m4a-single-only'
+     Generate code for the SH4a, in such a way that no double-precision
+     floating point operations are used.
+
+`-m4a-single'
+     Generate code for the SH4a assuming the floating-point unit is in
+     single-precision mode by default.
+
+`-m4a'
+     Generate code for the SH4a.
+
+`-m4al'
+     Same as `-m4a-nofpu', except that it implicitly passes `-dsp' to
+     the assembler.  GCC doesn't generate any DSP instructions at the
+     moment.
+
+`-mb'
+     Compile code for the processor in big endian mode.
+
+`-ml'
+     Compile code for the processor in little endian mode.
+
+`-mdalign'
+     Align doubles at 64-bit boundaries.  Note that this changes the
+     calling conventions, and thus some functions from the standard C
+     library will not work unless you recompile it first with
+     `-mdalign'.
+
+`-mrelax'
+     Shorten some address references at link time, when possible; uses
+     the linker option `-relax'.
+
+`-mbigtable'
+     Use 32-bit offsets in `switch' tables.  The default is to use
+     16-bit offsets.
+
+`-mbitops'
+     Enable the use of bit manipulation instructions on SH2A.
+
+`-mfmovd'
+     Enable the use of the instruction `fmovd'.  Check `-mdalign' for
+     alignment constraints.
+
+`-mhitachi'
+     Comply with the calling conventions defined by Renesas.
+
+`-mrenesas'
+     Comply with the calling conventions defined by Renesas.
+
+`-mno-renesas'
+     Comply with the calling conventions defined for GCC before the
+     Renesas conventions were available.  This option is the default
+     for all targets of the SH toolchain except for `sh-symbianelf'.
+
+`-mnomacsave'
+     Mark the `MAC' register as call-clobbered, even if `-mhitachi' is
+     given.
+
+`-mieee'
+
+`-mno-ieee'
+     Control the IEEE compliance of floating-point comparisons, which
+     affects the handling of cases where the result of a comparison is
+     unordered.  By default `-mieee' is implicitly enabled.  If
+     `-ffinite-math-only' is enabled `-mno-ieee' is implicitly set,
+     which results in faster floating-point greater-equal and
+     less-equal comparisons.  The implcit settings can be overridden by
+     specifying either `-mieee' or `-mno-ieee'.
+
+`-minline-ic_invalidate'
+     Inline code to invalidate instruction cache entries after setting
+     up nested function trampolines.  This option has no effect if
+     -musermode is in effect and the selected code generation option
+     (e.g. -m4) does not allow the use of the icbi instruction.  If the
+     selected code generation option does not allow the use of the icbi
+     instruction, and -musermode is not in effect, the inlined code will
+     manipulate the instruction cache address array directly with an
+     associative write.  This not only requires privileged mode, but it
+     will also fail if the cache line had been mapped via the TLB and
+     has become unmapped.
+
+`-misize'
+     Dump instruction size and location in the assembly code.
+
+`-mpadstruct'
+     This option is deprecated.  It pads structures to multiple of 4
+     bytes, which is incompatible with the SH ABI.
+
+`-mspace'
+     Optimize for space instead of speed.  Implied by `-Os'.
+
+`-mprefergot'
+     When generating position-independent code, emit function calls
+     using the Global Offset Table instead of the Procedure Linkage
+     Table.
+
+`-musermode'
+     Don't generate privileged mode only code; implies
+     -mno-inline-ic_invalidate if the inlined code would not work in
+     user mode.  This is the default when the target is `sh-*-linux*'.
+
+`-multcost=NUMBER'
+     Set the cost to assume for a multiply insn.
+
+`-mdiv=STRATEGY'
+     Set the division strategy to use for SHmedia code.  STRATEGY must
+     be one of: call, call2, fp, inv, inv:minlat, inv20u, inv20l,
+     inv:call, inv:call2, inv:fp .  "fp" performs the operation in
+     floating point.  This has a very high latency, but needs only a
+     few instructions, so it might be a good choice if your code has
+     enough easily exploitable ILP to allow the compiler to schedule
+     the floating point instructions together with other instructions.
+     Division by zero causes a floating point exception.  "inv" uses
+     integer operations to calculate the inverse of the divisor, and
+     then multiplies the dividend with the inverse.  This strategy
+     allows cse and hoisting of the inverse calculation.  Division by
+     zero calculates an unspecified result, but does not trap.
+     "inv:minlat" is a variant of "inv" where if no cse / hoisting
+     opportunities have been found, or if the entire operation has been
+     hoisted to the same place, the last stages of the inverse
+     calculation are intertwined with the final multiply to reduce the
+     overall latency, at the expense of using a few more instructions,
+     and thus offering fewer scheduling opportunities with other code.
+     "call" calls a library function that usually implements the
+     inv:minlat strategy.  This gives high code density for
+     m5-*media-nofpu compilations.  "call2" uses a different entry
+     point of the same library function, where it assumes that a
+     pointer to a lookup table has already been set up, which exposes
+     the pointer load to cse / code hoisting optimizations.
+     "inv:call", "inv:call2" and "inv:fp" all use the "inv" algorithm
+     for initial code generation, but if the code stays unoptimized,
+     revert to the "call", "call2", or "fp" strategies, respectively.
+     Note that the potentially-trapping side effect of division by zero
+     is carried by a separate instruction, so it is possible that all
+     the integer instructions are hoisted out, but the marker for the
+     side effect stays where it is.  A recombination to fp operations
+     or a call is not possible in that case.  "inv20u" and "inv20l" are
+     variants of the "inv:minlat" strategy.  In the case that the
+     inverse calculation was nor separated from the multiply, they speed
+     up division where the dividend fits into 20 bits (plus sign where
+     applicable), by inserting a test to skip a number of operations in
+     this case; this test slows down the case of larger dividends.
+     inv20u assumes the case of a such a small dividend to be unlikely,
+     and inv20l assumes it to be likely.
+
+`-maccumulate-outgoing-args'
+     Reserve space once for outgoing arguments in the function prologue
+     rather than around each call.  Generally beneficial for
+     performance and size.  Also needed for unwinding to avoid changing
+     the stack frame around conditional code.
+
+`-mdivsi3_libfunc=NAME'
+     Set the name of the library function used for 32 bit signed
+     division to NAME.  This only affect the name used in the call and
+     inv:call division strategies, and the compiler will still expect
+     the same sets of input/output/clobbered registers as if this
+     option was not present.
+
+`-mfixed-range=REGISTER-RANGE'
+     Generate code treating the given register range as fixed registers.
+     A fixed register is one that the register allocator can not use.
+     This is useful when compiling kernel code.  A register range is
+     specified as two registers separated by a dash.  Multiple register
+     ranges can be specified separated by a comma.
+
+`-madjust-unroll'
+     Throttle unrolling to avoid thrashing target registers.  This
+     option only has an effect if the gcc code base supports the
+     TARGET_ADJUST_UNROLL_MAX target hook.
+
+`-mindexed-addressing'
+     Enable the use of the indexed addressing mode for
+     SHmedia32/SHcompact.  This is only safe if the hardware and/or OS
+     implement 32 bit wrap-around semantics for the indexed addressing
+     mode.  The architecture allows the implementation of processors
+     with 64 bit MMU, which the OS could use to get 32 bit addressing,
+     but since no current hardware implementation supports this or any
+     other way to make the indexed addressing mode safe to use in the
+     32 bit ABI, the default is -mno-indexed-addressing.
+
+`-mgettrcost=NUMBER'
+     Set the cost assumed for the gettr instruction to NUMBER.  The
+     default is 2 if `-mpt-fixed' is in effect, 100 otherwise.
+
+`-mpt-fixed'
+     Assume pt* instructions won't trap.  This will generally generate
+     better scheduled code, but is unsafe on current hardware.  The
+     current architecture definition says that ptabs and ptrel trap
+     when the target anded with 3 is 3.  This has the unintentional
+     effect of making it unsafe to schedule ptabs / ptrel before a
+     branch, or hoist it out of a loop.  For example,
+     __do_global_ctors, a part of libgcc that runs constructors at
+     program startup, calls functions in a list which is delimited by
+     -1.  With the -mpt-fixed option, the ptabs will be done before
+     testing against -1.  That means that all the constructors will be
+     run a bit quicker, but when the loop comes to the end of the list,
+     the program crashes because ptabs loads -1 into a target register.
+     Since this option is unsafe for any hardware implementing the
+     current architecture specification, the default is -mno-pt-fixed.
+     Unless the user specifies a specific cost with `-mgettrcost',
+     -mno-pt-fixed also implies `-mgettrcost=100'; this deters register
+     allocation using target registers for storing ordinary integers.
+
+`-minvalid-symbols'
+     Assume symbols might be invalid.  Ordinary function symbols
+     generated by the compiler will always be valid to load with
+     movi/shori/ptabs or movi/shori/ptrel, but with assembler and/or
+     linker tricks it is possible to generate symbols that will cause
+     ptabs / ptrel to trap.  This option is only meaningful when
+     `-mno-pt-fixed' is in effect.  It will then prevent
+     cross-basic-block cse, hoisting and most scheduling of symbol
+     loads.  The default is `-mno-invalid-symbols'.
+
+
+File: gcc.info,  Node: Solaris 2 Options,  Next: SPARC Options,  Prev: SH Options,  Up: Submodel Options
+
+3.17.38 Solaris 2 Options
+-------------------------
+
+These `-m' options are supported on Solaris 2:
+
+`-mimpure-text'
+     `-mimpure-text', used in addition to `-shared', tells the compiler
+     to not pass `-z text' to the linker when linking a shared object.
+     Using this option, you can link position-dependent code into a
+     shared object.
+
+     `-mimpure-text' suppresses the "relocations remain against
+     allocatable but non-writable sections" linker error message.
+     However, the necessary relocations will trigger copy-on-write, and
+     the shared object is not actually shared across processes.
+     Instead of using `-mimpure-text', you should compile all source
+     code with `-fpic' or `-fPIC'.
+
+
+ These switches are supported in addition to the above on Solaris 2:
+
+`-threads'
+     Add support for multithreading using the Solaris threads library.
+     This option sets flags for both the preprocessor and linker.  This
+     option does not affect the thread safety of object code produced
+     by the compiler or that of libraries supplied with it.
+
+`-pthreads'
+     Add support for multithreading using the POSIX threads library.
+     This option sets flags for both the preprocessor and linker.  This
+     option does not affect the thread safety of object code produced
+     by the compiler or that of libraries supplied with it.
+
+`-pthread'
+     This is a synonym for `-pthreads'.
+
+
+File: gcc.info,  Node: SPARC Options,  Next: SPU Options,  Prev: Solaris 2 Options,  Up: Submodel Options
+
+3.17.39 SPARC Options
+---------------------
+
+These `-m' options are supported on the SPARC:
+
+`-mno-app-regs'
+`-mapp-regs'
+     Specify `-mapp-regs' to generate output using the global registers
+     2 through 4, which the SPARC SVR4 ABI reserves for applications.
+     This is the default.
+
+     To be fully SVR4 ABI compliant at the cost of some performance
+     loss, specify `-mno-app-regs'.  You should compile libraries and
+     system software with this option.
+
+`-mfpu'
+`-mhard-float'
+     Generate output containing floating point instructions.  This is
+     the default.
+
+`-mno-fpu'
+`-msoft-float'
+     Generate output containing library calls for floating point.
+     *Warning:* the requisite libraries are not available for all SPARC
+     targets.  Normally the facilities of the machine's usual C
+     compiler are used, but this cannot be done directly in
+     cross-compilation.  You must make your own arrangements to provide
+     suitable library functions for cross-compilation.  The embedded
+     targets `sparc-*-aout' and `sparclite-*-*' do provide software
+     floating point support.
+
+     `-msoft-float' changes the calling convention in the output file;
+     therefore, it is only useful if you compile _all_ of a program with
+     this option.  In particular, you need to compile `libgcc.a', the
+     library that comes with GCC, with `-msoft-float' in order for this
+     to work.
+
+`-mhard-quad-float'
+     Generate output containing quad-word (long double) floating point
+     instructions.
+
+`-msoft-quad-float'
+     Generate output containing library calls for quad-word (long
+     double) floating point instructions.  The functions called are
+     those specified in the SPARC ABI.  This is the default.
+
+     As of this writing, there are no SPARC implementations that have
+     hardware support for the quad-word floating point instructions.
+     They all invoke a trap handler for one of these instructions, and
+     then the trap handler emulates the effect of the instruction.
+     Because of the trap handler overhead, this is much slower than
+     calling the ABI library routines.  Thus the `-msoft-quad-float'
+     option is the default.
+
+`-mno-unaligned-doubles'
+`-munaligned-doubles'
+     Assume that doubles have 8 byte alignment.  This is the default.
+
+     With `-munaligned-doubles', GCC assumes that doubles have 8 byte
+     alignment only if they are contained in another type, or if they
+     have an absolute address.  Otherwise, it assumes they have 4 byte
+     alignment.  Specifying this option avoids some rare compatibility
+     problems with code generated by other compilers.  It is not the
+     default because it results in a performance loss, especially for
+     floating point code.
+
+`-mno-faster-structs'
+`-mfaster-structs'
+     With `-mfaster-structs', the compiler assumes that structures
+     should have 8 byte alignment.  This enables the use of pairs of
+     `ldd' and `std' instructions for copies in structure assignment,
+     in place of twice as many `ld' and `st' pairs.  However, the use
+     of this changed alignment directly violates the SPARC ABI.  Thus,
+     it's intended only for use on targets where the developer
+     acknowledges that their resulting code will not be directly in
+     line with the rules of the ABI.
+
+`-mcpu=CPU_TYPE'
+     Set the instruction set, register set, and instruction scheduling
+     parameters for machine type CPU_TYPE.  Supported values for
+     CPU_TYPE are `v7', `cypress', `v8', `supersparc', `hypersparc',
+     `leon', `sparclite', `f930', `f934', `sparclite86x', `sparclet',
+     `tsc701', `v9', `ultrasparc', `ultrasparc3', `niagara' and
+     `niagara2'.
+
+     Default instruction scheduling parameters are used for values that
+     select an architecture and not an implementation.  These are `v7',
+     `v8', `sparclite', `sparclet', `v9'.
+
+     Here is a list of each supported architecture and their supported
+     implementations.
+
+              v7:             cypress
+              v8:             supersparc, hypersparc, leon
+              sparclite:      f930, f934, sparclite86x
+              sparclet:       tsc701
+              v9:             ultrasparc, ultrasparc3, niagara, niagara2
+
+     By default (unless configured otherwise), GCC generates code for
+     the V7 variant of the SPARC architecture.  With `-mcpu=cypress',
+     the compiler additionally optimizes it for the Cypress CY7C602
+     chip, as used in the SPARCStation/SPARCServer 3xx series.  This is
+     also appropriate for the older SPARCStation 1, 2, IPX etc.
+
+     With `-mcpu=v8', GCC generates code for the V8 variant of the SPARC
+     architecture.  The only difference from V7 code is that the
+     compiler emits the integer multiply and integer divide
+     instructions which exist in SPARC-V8 but not in SPARC-V7.  With
+     `-mcpu=supersparc', the compiler additionally optimizes it for the
+     SuperSPARC chip, as used in the SPARCStation 10, 1000 and 2000
+     series.
+
+     With `-mcpu=sparclite', GCC generates code for the SPARClite
+     variant of the SPARC architecture.  This adds the integer
+     multiply, integer divide step and scan (`ffs') instructions which
+     exist in SPARClite but not in SPARC-V7.  With `-mcpu=f930', the
+     compiler additionally optimizes it for the Fujitsu MB86930 chip,
+     which is the original SPARClite, with no FPU.  With `-mcpu=f934',
+     the compiler additionally optimizes it for the Fujitsu MB86934
+     chip, which is the more recent SPARClite with FPU.
+
+     With `-mcpu=sparclet', GCC generates code for the SPARClet variant
+     of the SPARC architecture.  This adds the integer multiply,
+     multiply/accumulate, integer divide step and scan (`ffs')
+     instructions which exist in SPARClet but not in SPARC-V7.  With
+     `-mcpu=tsc701', the compiler additionally optimizes it for the
+     TEMIC SPARClet chip.
+
+     With `-mcpu=v9', GCC generates code for the V9 variant of the SPARC
+     architecture.  This adds 64-bit integer and floating-point move
+     instructions, 3 additional floating-point condition code registers
+     and conditional move instructions.  With `-mcpu=ultrasparc', the
+     compiler additionally optimizes it for the Sun UltraSPARC I/II/IIi
+     chips.  With `-mcpu=ultrasparc3', the compiler additionally
+     optimizes it for the Sun UltraSPARC III/III+/IIIi/IIIi+/IV/IV+
+     chips.  With `-mcpu=niagara', the compiler additionally optimizes
+     it for Sun UltraSPARC T1 chips.  With `-mcpu=niagara2', the
+     compiler additionally optimizes it for Sun UltraSPARC T2 chips.
+
+`-mtune=CPU_TYPE'
+     Set the instruction scheduling parameters for machine type
+     CPU_TYPE, but do not set the instruction set or register set that
+     the option `-mcpu=CPU_TYPE' would.
+
+     The same values for `-mcpu=CPU_TYPE' can be used for
+     `-mtune=CPU_TYPE', but the only useful values are those that
+     select a particular CPU implementation.  Those are `cypress',
+     `supersparc', `hypersparc', `leon', `f930', `f934',
+     `sparclite86x', `tsc701', `ultrasparc', `ultrasparc3', `niagara',
+     and `niagara2'.
+
+`-mv8plus'
+`-mno-v8plus'
+     With `-mv8plus', GCC generates code for the SPARC-V8+ ABI.  The
+     difference from the V8 ABI is that the global and out registers are
+     considered 64-bit wide.  This is enabled by default on Solaris in
+     32-bit mode for all SPARC-V9 processors.
+
+`-mvis'
+`-mno-vis'
+     With `-mvis', GCC generates code that takes advantage of the
+     UltraSPARC Visual Instruction Set extensions.  The default is
+     `-mno-vis'.
+
+`-mfix-at697f'
+     Enable the documented workaround for the single erratum of the
+     Atmel AT697F processor (which corresponds to erratum #13 of the
+     AT697E processor).
+
+ These `-m' options are supported in addition to the above on SPARC-V9
+processors in 64-bit environments:
+
+`-mlittle-endian'
+     Generate code for a processor running in little-endian mode.  It
+     is only available for a few configurations and most notably not on
+     Solaris and Linux.
+
+`-m32'
+`-m64'
+     Generate code for a 32-bit or 64-bit environment.  The 32-bit
+     environment sets int, long and pointer to 32 bits.  The 64-bit
+     environment sets int to 32 bits and long and pointer to 64 bits.
+
+`-mcmodel=medlow'
+     Generate code for the Medium/Low code model: 64-bit addresses,
+     programs must be linked in the low 32 bits of memory.  Programs
+     can be statically or dynamically linked.
+
+`-mcmodel=medmid'
+     Generate code for the Medium/Middle code model: 64-bit addresses,
+     programs must be linked in the low 44 bits of memory, the text and
+     data segments must be less than 2GB in size and the data segment
+     must be located within 2GB of the text segment.
+
+`-mcmodel=medany'
+     Generate code for the Medium/Anywhere code model: 64-bit
+     addresses, programs may be linked anywhere in memory, the text and
+     data segments must be less than 2GB in size and the data segment
+     must be located within 2GB of the text segment.
+
+`-mcmodel=embmedany'
+     Generate code for the Medium/Anywhere code model for embedded
+     systems: 64-bit addresses, the text and data segments must be less
+     than 2GB in size, both starting anywhere in memory (determined at
+     link time).  The global register %g4 points to the base of the
+     data segment.  Programs are statically linked and PIC is not
+     supported.
+
+`-mstack-bias'
+`-mno-stack-bias'
+     With `-mstack-bias', GCC assumes that the stack pointer, and frame
+     pointer if present, are offset by -2047 which must be added back
+     when making stack frame references.  This is the default in 64-bit
+     mode.  Otherwise, assume no such offset is present.
+
+
+File: gcc.info,  Node: SPU Options,  Next: System V Options,  Prev: SPARC Options,  Up: Submodel Options
+
+3.17.40 SPU Options
+-------------------
+
+These `-m' options are supported on the SPU:
+
+`-mwarn-reloc'
+`-merror-reloc'
+     The loader for SPU does not handle dynamic relocations.  By
+     default, GCC will give an error when it generates code that
+     requires a dynamic relocation.  `-mno-error-reloc' disables the
+     error, `-mwarn-reloc' will generate a warning instead.
+
+`-msafe-dma'
+`-munsafe-dma'
+     Instructions which initiate or test completion of DMA must not be
+     reordered with respect to loads and stores of the memory which is
+     being accessed.  Users typically address this problem using the
+     volatile keyword, but that can lead to inefficient code in places
+     where the memory is known to not change.  Rather than mark the
+     memory as volatile we treat the DMA instructions as potentially
+     effecting all memory.  With `-munsafe-dma' users must use the
+     volatile keyword to protect memory accesses.
+
+`-mbranch-hints'
+     By default, GCC will generate a branch hint instruction to avoid
+     pipeline stalls for always taken or probably taken branches.  A
+     hint will not be generated closer than 8 instructions away from
+     its branch.  There is little reason to disable them, except for
+     debugging purposes, or to make an object a little bit smaller.
+
+`-msmall-mem'
+`-mlarge-mem'
+     By default, GCC generates code assuming that addresses are never
+     larger than 18 bits.  With `-mlarge-mem' code is generated that
+     assumes a full 32 bit address.
+
+`-mstdmain'
+     By default, GCC links against startup code that assumes the
+     SPU-style main function interface (which has an unconventional
+     parameter list).  With `-mstdmain', GCC will link your program
+     against startup code that assumes a C99-style interface to `main',
+     including a local copy of `argv' strings.
+
+`-mfixed-range=REGISTER-RANGE'
+     Generate code treating the given register range as fixed registers.
+     A fixed register is one that the register allocator can not use.
+     This is useful when compiling kernel code.  A register range is
+     specified as two registers separated by a dash.  Multiple register
+     ranges can be specified separated by a comma.
+
+`-mea32'
+`-mea64'
+     Compile code assuming that pointers to the PPU address space
+     accessed via the `__ea' named address space qualifier are either
+     32 or 64 bits wide.  The default is 32 bits.  As this is an ABI
+     changing option, all object code in an executable must be compiled
+     with the same setting.
+
+`-maddress-space-conversion'
+`-mno-address-space-conversion'
+     Allow/disallow treating the `__ea' address space as superset of
+     the generic address space.  This enables explicit type casts
+     between `__ea' and generic pointer as well as implicit conversions
+     of generic pointers to `__ea' pointers.  The default is to allow
+     address space pointer conversions.
+
+`-mcache-size=CACHE-SIZE'
+     This option controls the version of libgcc that the compiler links
+     to an executable and selects a software-managed cache for
+     accessing variables in the `__ea' address space with a particular
+     cache size.  Possible options for CACHE-SIZE are `8', `16', `32',
+     `64' and `128'.  The default cache size is 64KB.
+
+`-matomic-updates'
+`-mno-atomic-updates'
+     This option controls the version of libgcc that the compiler links
+     to an executable and selects whether atomic updates to the
+     software-managed cache of PPU-side variables are used.  If you use
+     atomic updates, changes to a PPU variable from SPU code using the
+     `__ea' named address space qualifier will not interfere with
+     changes to other PPU variables residing in the same cache line
+     from PPU code.  If you do not use atomic updates, such
+     interference may occur; however, writing back cache lines will be
+     more efficient.  The default behavior is to use atomic updates.
+
+`-mdual-nops'
+`-mdual-nops=N'
+     By default, GCC will insert nops to increase dual issue when it
+     expects it to increase performance.  N can be a value from 0 to
+     10.  A smaller N will insert fewer nops.  10 is the default, 0 is
+     the same as `-mno-dual-nops'.  Disabled with `-Os'.
+
+`-mhint-max-nops=N'
+     Maximum number of nops to insert for a branch hint.  A branch hint
+     must be at least 8 instructions away from the branch it is
+     effecting.  GCC will insert up to N nops to enforce this,
+     otherwise it will not generate the branch hint.
+
+`-mhint-max-distance=N'
+     The encoding of the branch hint instruction limits the hint to be
+     within 256 instructions of the branch it is effecting.  By
+     default, GCC makes sure it is within 125.
+
+`-msafe-hints'
+     Work around a hardware bug which causes the SPU to stall
+     indefinitely.  By default, GCC will insert the `hbrp' instruction
+     to make sure this stall won't happen.
+
+
+
+File: gcc.info,  Node: System V Options,  Next: V850 Options,  Prev: SPU Options,  Up: Submodel Options
+
+3.17.41 Options for System V
+----------------------------
+
+These additional options are available on System V Release 4 for
+compatibility with other compilers on those systems:
+
+`-G'
+     Create a shared object.  It is recommended that `-symbolic' or
+     `-shared' be used instead.
+
+`-Qy'
+     Identify the versions of each tool used by the compiler, in a
+     `.ident' assembler directive in the output.
+
+`-Qn'
+     Refrain from adding `.ident' directives to the output file (this is
+     the default).
+
+`-YP,DIRS'
+     Search the directories DIRS, and no others, for libraries
+     specified with `-l'.
+
+`-Ym,DIR'
+     Look in the directory DIR to find the M4 preprocessor.  The
+     assembler uses this option.
+
+
+File: gcc.info,  Node: V850 Options,  Next: VAX Options,  Prev: System V Options,  Up: Submodel Options
+
+3.17.42 V850 Options
+--------------------
+
+These `-m' options are defined for V850 implementations:
+
+`-mlong-calls'
+`-mno-long-calls'
+     Treat all calls as being far away (near).  If calls are assumed to
+     be far away, the compiler will always load the functions address
+     up into a register, and call indirect through the pointer.
+
+`-mno-ep'
+`-mep'
+     Do not optimize (do optimize) basic blocks that use the same index
+     pointer 4 or more times to copy pointer into the `ep' register, and
+     use the shorter `sld' and `sst' instructions.  The `-mep' option
+     is on by default if you optimize.
+
+`-mno-prolog-function'
+`-mprolog-function'
+     Do not use (do use) external functions to save and restore
+     registers at the prologue and epilogue of a function.  The
+     external functions are slower, but use less code space if more
+     than one function saves the same number of registers.  The
+     `-mprolog-function' option is on by default if you optimize.
+
+`-mspace'
+     Try to make the code as small as possible.  At present, this just
+     turns on the `-mep' and `-mprolog-function' options.
+
+`-mtda=N'
+     Put static or global variables whose size is N bytes or less into
+     the tiny data area that register `ep' points to.  The tiny data
+     area can hold up to 256 bytes in total (128 bytes for byte
+     references).
+
+`-msda=N'
+     Put static or global variables whose size is N bytes or less into
+     the small data area that register `gp' points to.  The small data
+     area can hold up to 64 kilobytes.
+
+`-mzda=N'
+     Put static or global variables whose size is N bytes or less into
+     the first 32 kilobytes of memory.
+
+`-mv850'
+     Specify that the target processor is the V850.
+
+`-mbig-switch'
+     Generate code suitable for big switch tables.  Use this option
+     only if the assembler/linker complain about out of range branches
+     within a switch table.
+
+`-mapp-regs'
+     This option will cause r2 and r5 to be used in the code generated
+     by the compiler.  This setting is the default.
+
+`-mno-app-regs'
+     This option will cause r2 and r5 to be treated as fixed registers.
+
+`-mv850e2v3'
+     Specify that the target processor is the V850E2V3.  The
+     preprocessor constants `__v850e2v3__' will be defined if this
+     option is used.
+
+`-mv850e2'
+     Specify that the target processor is the V850E2.  The preprocessor
+     constants `__v850e2__' will be defined if
+
+`-mv850e1'
+     Specify that the target processor is the V850E1.  The preprocessor
+     constants `__v850e1__' and `__v850e__' will be defined if
+
+`-mv850es'
+     Specify that the target processor is the V850ES.  This is an alias
+     for the `-mv850e1' option.
+
+`-mv850e'
+     Specify that the target processor is the V850E.  The preprocessor
+     constant `__v850e__' will be defined if this option is used.
+
+     If neither `-mv850' nor `-mv850e' nor `-mv850e1' nor `-mv850e2'
+     nor `-mv850e2v3' are defined then a default target processor will
+     be chosen and the relevant `__v850*__' preprocessor constant will
+     be defined.
+
+     The preprocessor constants `__v850' and `__v851__' are always
+     defined, regardless of which processor variant is the target.
+
+`-mdisable-callt'
+     This option will suppress generation of the CALLT instruction for
+     the v850e, v850e1, v850e2 and v850e2v3 flavors of the v850
+     architecture.  The default is `-mno-disable-callt' which allows
+     the CALLT instruction to be used.
+
+
+
+File: gcc.info,  Node: VAX Options,  Next: VxWorks Options,  Prev: V850 Options,  Up: Submodel Options
+
+3.17.43 VAX Options
+-------------------
+
+These `-m' options are defined for the VAX:
+
+`-munix'
+     Do not output certain jump instructions (`aobleq' and so on) that
+     the Unix assembler for the VAX cannot handle across long ranges.
+
+`-mgnu'
+     Do output those jump instructions, on the assumption that you will
+     assemble with the GNU assembler.
+
+`-mg'
+     Output code for g-format floating point numbers instead of
+     d-format.
+
+
+File: gcc.info,  Node: VxWorks Options,  Next: x86-64 Options,  Prev: VAX Options,  Up: Submodel Options
+
+3.17.44 VxWorks Options
+-----------------------
+
+The options in this section are defined for all VxWorks targets.
+Options specific to the target hardware are listed with the other
+options for that target.
+
+`-mrtp'
+     GCC can generate code for both VxWorks kernels and real time
+     processes (RTPs).  This option switches from the former to the
+     latter.  It also defines the preprocessor macro `__RTP__'.
+
+`-non-static'
+     Link an RTP executable against shared libraries rather than static
+     libraries.  The options `-static' and `-shared' can also be used
+     for RTPs (*note Link Options::); `-static' is the default.
+
+`-Bstatic'
+`-Bdynamic'
+     These options are passed down to the linker.  They are defined for
+     compatibility with Diab.
+
+`-Xbind-lazy'
+     Enable lazy binding of function calls.  This option is equivalent
+     to `-Wl,-z,now' and is defined for compatibility with Diab.
+
+`-Xbind-now'
+     Disable lazy binding of function calls.  This option is the
+     default and is defined for compatibility with Diab.
+
+
+File: gcc.info,  Node: x86-64 Options,  Next: Xstormy16 Options,  Prev: VxWorks Options,  Up: Submodel Options
+
+3.17.45 x86-64 Options
+----------------------
+
+These are listed under *Note i386 and x86-64 Options::.
+
+
+File: gcc.info,  Node: Xstormy16 Options,  Next: Xtensa Options,  Prev: x86-64 Options,  Up: Submodel Options
+
+3.17.46 Xstormy16 Options
+-------------------------
+
+These options are defined for Xstormy16:
+
+`-msim'
+     Choose startup files and linker script suitable for the simulator.
+
+
+File: gcc.info,  Node: Xtensa Options,  Next: zSeries Options,  Prev: Xstormy16 Options,  Up: Submodel Options
+
+3.17.47 Xtensa Options
+----------------------
+
+These options are supported for Xtensa targets:
+
+`-mconst16'
+`-mno-const16'
+     Enable or disable use of `CONST16' instructions for loading
+     constant values.  The `CONST16' instruction is currently not a
+     standard option from Tensilica.  When enabled, `CONST16'
+     instructions are always used in place of the standard `L32R'
+     instructions.  The use of `CONST16' is enabled by default only if
+     the `L32R' instruction is not available.
+
+`-mfused-madd'
+`-mno-fused-madd'
+     Enable or disable use of fused multiply/add and multiply/subtract
+     instructions in the floating-point option.  This has no effect if
+     the floating-point option is not also enabled.  Disabling fused
+     multiply/add and multiply/subtract instructions forces the
+     compiler to use separate instructions for the multiply and
+     add/subtract operations.  This may be desirable in some cases
+     where strict IEEE 754-compliant results are required: the fused
+     multiply add/subtract instructions do not round the intermediate
+     result, thereby producing results with _more_ bits of precision
+     than specified by the IEEE standard.  Disabling fused multiply
+     add/subtract instructions also ensures that the program output is
+     not sensitive to the compiler's ability to combine multiply and
+     add/subtract operations.
+
+`-mserialize-volatile'
+`-mno-serialize-volatile'
+     When this option is enabled, GCC inserts `MEMW' instructions before
+     `volatile' memory references to guarantee sequential consistency.
+     The default is `-mserialize-volatile'.  Use
+     `-mno-serialize-volatile' to omit the `MEMW' instructions.
+
+`-mforce-no-pic'
+     For targets, like GNU/Linux, where all user-mode Xtensa code must
+     be position-independent code (PIC), this option disables PIC for
+     compiling kernel code.
+
+`-mtext-section-literals'
+`-mno-text-section-literals'
+     Control the treatment of literal pools.  The default is
+     `-mno-text-section-literals', which places literals in a separate
+     section in the output file.  This allows the literal pool to be
+     placed in a data RAM/ROM, and it also allows the linker to combine
+     literal pools from separate object files to remove redundant
+     literals and improve code size.  With `-mtext-section-literals',
+     the literals are interspersed in the text section in order to keep
+     them as close as possible to their references.  This may be
+     necessary for large assembly files.
+
+`-mtarget-align'
+`-mno-target-align'
+     When this option is enabled, GCC instructs the assembler to
+     automatically align instructions to reduce branch penalties at the
+     expense of some code density.  The assembler attempts to widen
+     density instructions to align branch targets and the instructions
+     following call instructions.  If there are not enough preceding
+     safe density instructions to align a target, no widening will be
+     performed.  The default is `-mtarget-align'.  These options do not
+     affect the treatment of auto-aligned instructions like `LOOP',
+     which the assembler will always align, either by widening density
+     instructions or by inserting no-op instructions.
+
+`-mlongcalls'
+`-mno-longcalls'
+     When this option is enabled, GCC instructs the assembler to
+     translate direct calls to indirect calls unless it can determine
+     that the target of a direct call is in the range allowed by the
+     call instruction.  This translation typically occurs for calls to
+     functions in other source files.  Specifically, the assembler
+     translates a direct `CALL' instruction into an `L32R' followed by
+     a `CALLX' instruction.  The default is `-mno-longcalls'.  This
+     option should be used in programs where the call target can
+     potentially be out of range.  This option is implemented in the
+     assembler, not the compiler, so the assembly code generated by GCC
+     will still show direct call instructions--look at the disassembled
+     object code to see the actual instructions.  Note that the
+     assembler will use an indirect call for every cross-file call, not
+     just those that really will be out of range.
+
+
+File: gcc.info,  Node: zSeries Options,  Prev: Xtensa Options,  Up: Submodel Options
+
+3.17.48 zSeries Options
+-----------------------
+
+These are listed under *Note S/390 and zSeries Options::.
+
+
+File: gcc.info,  Node: Code Gen Options,  Next: Environment Variables,  Prev: Submodel Options,  Up: Invoking GCC
+
+3.18 Options for Code Generation Conventions
+============================================
+
+These machine-independent options control the interface conventions
+used in code generation.
+
+ Most of them have both positive and negative forms; the negative form
+of `-ffoo' would be `-fno-foo'.  In the table below, only one of the
+forms is listed--the one which is not the default.  You can figure out
+the other form by either removing `no-' or adding it.
+
+`-fbounds-check'
+     For front-ends that support it, generate additional code to check
+     that indices used to access arrays are within the declared range.
+     This is currently only supported by the Java and Fortran
+     front-ends, where this option defaults to true and false
+     respectively.
+
+`-ftrapv'
+     This option generates traps for signed overflow on addition,
+     subtraction, multiplication operations.
+
+`-fwrapv'
+     This option instructs the compiler to assume that signed arithmetic
+     overflow of addition, subtraction and multiplication wraps around
+     using twos-complement representation.  This flag enables some
+     optimizations and disables others.  This option is enabled by
+     default for the Java front-end, as required by the Java language
+     specification.
+
+`-fexceptions'
+     Enable exception handling.  Generates extra code needed to
+     propagate exceptions.  For some targets, this implies GCC will
+     generate frame unwind information for all functions, which can
+     produce significant data size overhead, although it does not
+     affect execution.  If you do not specify this option, GCC will
+     enable it by default for languages like C++ which normally require
+     exception handling, and disable it for languages like C that do
+     not normally require it.  However, you may need to enable this
+     option when compiling C code that needs to interoperate properly
+     with exception handlers written in C++.  You may also wish to
+     disable this option if you are compiling older C++ programs that
+     don't use exception handling.
+
+`-fnon-call-exceptions'
+     Generate code that allows trapping instructions to throw
+     exceptions.  Note that this requires platform-specific runtime
+     support that does not exist everywhere.  Moreover, it only allows
+     _trapping_ instructions to throw exceptions, i.e. memory
+     references or floating point instructions.  It does not allow
+     exceptions to be thrown from arbitrary signal handlers such as
+     `SIGALRM'.
+
+`-funwind-tables'
+     Similar to `-fexceptions', except that it will just generate any
+     needed static data, but will not affect the generated code in any
+     other way.  You will normally not enable this option; instead, a
+     language processor that needs this handling would enable it on
+     your behalf.
+
+`-fasynchronous-unwind-tables'
+     Generate unwind table in dwarf2 format, if supported by target
+     machine.  The table is exact at each instruction boundary, so it
+     can be used for stack unwinding from asynchronous events (such as
+     debugger or garbage collector).
+
+`-fpcc-struct-return'
+     Return "short" `struct' and `union' values in memory like longer
+     ones, rather than in registers.  This convention is less
+     efficient, but it has the advantage of allowing intercallability
+     between GCC-compiled files and files compiled with other
+     compilers, particularly the Portable C Compiler (pcc).
+
+     The precise convention for returning structures in memory depends
+     on the target configuration macros.
+
+     Short structures and unions are those whose size and alignment
+     match that of some integer type.
+
+     *Warning:* code compiled with the `-fpcc-struct-return' switch is
+     not binary compatible with code compiled with the
+     `-freg-struct-return' switch.  Use it to conform to a non-default
+     application binary interface.
+
+`-freg-struct-return'
+     Return `struct' and `union' values in registers when possible.
+     This is more efficient for small structures than
+     `-fpcc-struct-return'.
+
+     If you specify neither `-fpcc-struct-return' nor
+     `-freg-struct-return', GCC defaults to whichever convention is
+     standard for the target.  If there is no standard convention, GCC
+     defaults to `-fpcc-struct-return', except on targets where GCC is
+     the principal compiler.  In those cases, we can choose the
+     standard, and we chose the more efficient register return
+     alternative.
+
+     *Warning:* code compiled with the `-freg-struct-return' switch is
+     not binary compatible with code compiled with the
+     `-fpcc-struct-return' switch.  Use it to conform to a non-default
+     application binary interface.
+
+`-fshort-enums'
+     Allocate to an `enum' type only as many bytes as it needs for the
+     declared range of possible values.  Specifically, the `enum' type
+     will be equivalent to the smallest integer type which has enough
+     room.
+
+     *Warning:* the `-fshort-enums' switch causes GCC to generate code
+     that is not binary compatible with code generated without that
+     switch.  Use it to conform to a non-default application binary
+     interface.
+
+`-fshort-double'
+     Use the same size for `double' as for `float'.
+
+     *Warning:* the `-fshort-double' switch causes GCC to generate code
+     that is not binary compatible with code generated without that
+     switch.  Use it to conform to a non-default application binary
+     interface.
+
+`-fshort-wchar'
+     Override the underlying type for `wchar_t' to be `short unsigned
+     int' instead of the default for the target.  This option is useful
+     for building programs to run under WINE.
+
+     *Warning:* the `-fshort-wchar' switch causes GCC to generate code
+     that is not binary compatible with code generated without that
+     switch.  Use it to conform to a non-default application binary
+     interface.
+
+`-fno-common'
+     In C code, controls the placement of uninitialized global
+     variables.  Unix C compilers have traditionally permitted multiple
+     definitions of such variables in different compilation units by
+     placing the variables in a common block.  This is the behavior
+     specified by `-fcommon', and is the default for GCC on most
+     targets.  On the other hand, this behavior is not required by ISO
+     C, and on some targets may carry a speed or code size penalty on
+     variable references.  The `-fno-common' option specifies that the
+     compiler should place uninitialized global variables in the data
+     section of the object file, rather than generating them as common
+     blocks.  This has the effect that if the same variable is declared
+     (without `extern') in two different compilations, you will get a
+     multiple-definition error when you link them.  In this case, you
+     must compile with `-fcommon' instead.  Compiling with
+     `-fno-common' is useful on targets for which it provides better
+     performance, or if you wish to verify that the program will work
+     on other systems which always treat uninitialized variable
+     declarations this way.
+
+`-fno-ident'
+     Ignore the `#ident' directive.
+
+`-finhibit-size-directive'
+     Don't output a `.size' assembler directive, or anything else that
+     would cause trouble if the function is split in the middle, and the
+     two halves are placed at locations far apart in memory.  This
+     option is used when compiling `crtstuff.c'; you should not need to
+     use it for anything else.
+
+`-fverbose-asm'
+     Put extra commentary information in the generated assembly code to
+     make it more readable.  This option is generally only of use to
+     those who actually need to read the generated assembly code
+     (perhaps while debugging the compiler itself).
+
+     `-fno-verbose-asm', the default, causes the extra information to
+     be omitted and is useful when comparing two assembler files.
+
+`-frecord-gcc-switches'
+     This switch causes the command line that was used to invoke the
+     compiler to be recorded into the object file that is being created.
+     This switch is only implemented on some targets and the exact
+     format of the recording is target and binary file format
+     dependent, but it usually takes the form of a section containing
+     ASCII text.  This switch is related to the `-fverbose-asm' switch,
+     but that switch only records information in the assembler output
+     file as comments, so it never reaches the object file.
+
+`-fpic'
+     Generate position-independent code (PIC) suitable for use in a
+     shared library, if supported for the target machine.  Such code
+     accesses all constant addresses through a global offset table
+     (GOT).  The dynamic loader resolves the GOT entries when the
+     program starts (the dynamic loader is not part of GCC; it is part
+     of the operating system).  If the GOT size for the linked
+     executable exceeds a machine-specific maximum size, you get an
+     error message from the linker indicating that `-fpic' does not
+     work; in that case, recompile with `-fPIC' instead.  (These
+     maximums are 8k on the SPARC and 32k on the m68k and RS/6000.  The
+     386 has no such limit.)
+
+     Position-independent code requires special support, and therefore
+     works only on certain machines.  For the 386, GCC supports PIC for
+     System V but not for the Sun 386i.  Code generated for the IBM
+     RS/6000 is always position-independent.
+
+     When this flag is set, the macros `__pic__' and `__PIC__' are
+     defined to 1.
+
+`-fPIC'
+     If supported for the target machine, emit position-independent
+     code, suitable for dynamic linking and avoiding any limit on the
+     size of the global offset table.  This option makes a difference
+     on the m68k, PowerPC and SPARC.
+
+     Position-independent code requires special support, and therefore
+     works only on certain machines.
+
+     When this flag is set, the macros `__pic__' and `__PIC__' are
+     defined to 2.
+
+`-fpie'
+`-fPIE'
+     These options are similar to `-fpic' and `-fPIC', but generated
+     position independent code can be only linked into executables.
+     Usually these options are used when `-pie' GCC option will be used
+     during linking.
+
+     `-fpie' and `-fPIE' both define the macros `__pie__' and
+     `__PIE__'.  The macros have the value 1 for `-fpie' and 2 for
+     `-fPIE'.
+
+`-fno-jump-tables'
+     Do not use jump tables for switch statements even where it would be
+     more efficient than other code generation strategies.  This option
+     is of use in conjunction with `-fpic' or `-fPIC' for building code
+     which forms part of a dynamic linker and cannot reference the
+     address of a jump table.  On some targets, jump tables do not
+     require a GOT and this option is not needed.
+
+`-ffixed-REG'
+     Treat the register named REG as a fixed register; generated code
+     should never refer to it (except perhaps as a stack pointer, frame
+     pointer or in some other fixed role).
+
+     REG must be the name of a register.  The register names accepted
+     are machine-specific and are defined in the `REGISTER_NAMES' macro
+     in the machine description macro file.
+
+     This flag does not have a negative form, because it specifies a
+     three-way choice.
+
+`-fcall-used-REG'
+     Treat the register named REG as an allocable register that is
+     clobbered by function calls.  It may be allocated for temporaries
+     or variables that do not live across a call.  Functions compiled
+     this way will not save and restore the register REG.
+
+     It is an error to used this flag with the frame pointer or stack
+     pointer.  Use of this flag for other registers that have fixed
+     pervasive roles in the machine's execution model will produce
+     disastrous results.
+
+     This flag does not have a negative form, because it specifies a
+     three-way choice.
+
+`-fcall-saved-REG'
+     Treat the register named REG as an allocable register saved by
+     functions.  It may be allocated even for temporaries or variables
+     that live across a call.  Functions compiled this way will save
+     and restore the register REG if they use it.
+
+     It is an error to used this flag with the frame pointer or stack
+     pointer.  Use of this flag for other registers that have fixed
+     pervasive roles in the machine's execution model will produce
+     disastrous results.
+
+     A different sort of disaster will result from the use of this flag
+     for a register in which function values may be returned.
+
+     This flag does not have a negative form, because it specifies a
+     three-way choice.
+
+`-fpack-struct[=N]'
+     Without a value specified, pack all structure members together
+     without holes.  When a value is specified (which must be a small
+     power of two), pack structure members according to this value,
+     representing the maximum alignment (that is, objects with default
+     alignment requirements larger than this will be output potentially
+     unaligned at the next fitting location.
+
+     *Warning:* the `-fpack-struct' switch causes GCC to generate code
+     that is not binary compatible with code generated without that
+     switch.  Additionally, it makes the code suboptimal.  Use it to
+     conform to a non-default application binary interface.
+
+`-finstrument-functions'
+     Generate instrumentation calls for entry and exit to functions.
+     Just after function entry and just before function exit, the
+     following profiling functions will be called with the address of
+     the current function and its call site.  (On some platforms,
+     `__builtin_return_address' does not work beyond the current
+     function, so the call site information may not be available to the
+     profiling functions otherwise.)
+
+          void __cyg_profile_func_enter (void *this_fn,
+                                         void *call_site);
+          void __cyg_profile_func_exit  (void *this_fn,
+                                         void *call_site);
+
+     The first argument is the address of the start of the current
+     function, which may be looked up exactly in the symbol table.
+
+     This instrumentation is also done for functions expanded inline in
+     other functions.  The profiling calls will indicate where,
+     conceptually, the inline function is entered and exited.  This
+     means that addressable versions of such functions must be
+     available.  If all your uses of a function are expanded inline,
+     this may mean an additional expansion of code size.  If you use
+     `extern inline' in your C code, an addressable version of such
+     functions must be provided.  (This is normally the case anyways,
+     but if you get lucky and the optimizer always expands the
+     functions inline, you might have gotten away without providing
+     static copies.)
+
+     A function may be given the attribute `no_instrument_function', in
+     which case this instrumentation will not be done.  This can be
+     used, for example, for the profiling functions listed above,
+     high-priority interrupt routines, and any functions from which the
+     profiling functions cannot safely be called (perhaps signal
+     handlers, if the profiling routines generate output or allocate
+     memory).
+
+`-finstrument-functions-exclude-file-list=FILE,FILE,...'
+     Set the list of functions that are excluded from instrumentation
+     (see the description of `-finstrument-functions').  If the file
+     that contains a function definition matches with one of FILE, then
+     that function is not instrumented.  The match is done on
+     substrings: if the FILE parameter is a substring of the file name,
+     it is considered to be a match.
+
+     For example:
+
+          -finstrument-functions-exclude-file-list=/bits/stl,include/sys
+
+     will exclude any inline function defined in files whose pathnames
+     contain `/bits/stl' or `include/sys'.
+
+     If, for some reason, you want to include letter `','' in one of
+     SYM, write `'\,''. For example,
+     `-finstrument-functions-exclude-file-list='\,\,tmp'' (note the
+     single quote surrounding the option).
+
+`-finstrument-functions-exclude-function-list=SYM,SYM,...'
+     This is similar to `-finstrument-functions-exclude-file-list', but
+     this option sets the list of function names to be excluded from
+     instrumentation.  The function name to be matched is its
+     user-visible name, such as `vector<int> blah(const vector<int>
+     &)', not the internal mangled name (e.g.,
+     `_Z4blahRSt6vectorIiSaIiEE').  The match is done on substrings: if
+     the SYM parameter is a substring of the function name, it is
+     considered to be a match.  For C99 and C++ extended identifiers,
+     the function name must be given in UTF-8, not using universal
+     character names.
+
+`-fstack-check'
+     Generate code to verify that you do not go beyond the boundary of
+     the stack.  You should specify this flag if you are running in an
+     environment with multiple threads, but only rarely need to specify
+     it in a single-threaded environment since stack overflow is
+     automatically detected on nearly all systems if there is only one
+     stack.
+
+     Note that this switch does not actually cause checking to be done;
+     the operating system or the language runtime must do that.  The
+     switch causes generation of code to ensure that they see the stack
+     being extended.
+
+     You can additionally specify a string parameter: `no' means no
+     checking, `generic' means force the use of old-style checking,
+     `specific' means use the best checking method and is equivalent to
+     bare `-fstack-check'.
+
+     Old-style checking is a generic mechanism that requires no specific
+     target support in the compiler but comes with the following
+     drawbacks:
+
+       1. Modified allocation strategy for large objects: they will
+          always be allocated dynamically if their size exceeds a fixed
+          threshold.
+
+       2. Fixed limit on the size of the static frame of functions:
+          when it is topped by a particular function, stack checking is
+          not reliable and a warning is issued by the compiler.
+
+       3. Inefficiency: because of both the modified allocation
+          strategy and the generic implementation, the performances of
+          the code are hampered.
+
+     Note that old-style stack checking is also the fallback method for
+     `specific' if no target support has been added in the compiler.
+
+`-fstack-limit-register=REG'
+`-fstack-limit-symbol=SYM'
+`-fno-stack-limit'
+     Generate code to ensure that the stack does not grow beyond a
+     certain value, either the value of a register or the address of a
+     symbol.  If the stack would grow beyond the value, a signal is
+     raised.  For most targets, the signal is raised before the stack
+     overruns the boundary, so it is possible to catch the signal
+     without taking special precautions.
+
+     For instance, if the stack starts at absolute address `0x80000000'
+     and grows downwards, you can use the flags
+     `-fstack-limit-symbol=__stack_limit' and
+     `-Wl,--defsym,__stack_limit=0x7ffe0000' to enforce a stack limit
+     of 128KB.  Note that this may only work with the GNU linker.
+
+`-fsplit-stack'
+     Generate code to automatically split the stack before it overflows.
+     The resulting program has a discontiguous stack which can only
+     overflow if the program is unable to allocate any more memory.
+     This is most useful when running threaded programs, as it is no
+     longer necessary to calculate a good stack size to use for each
+     thread.  This is currently only implemented for the i386 and
+     x86_64 backends running GNU/Linux.
+
+     When code compiled with `-fsplit-stack' calls code compiled
+     without `-fsplit-stack', there may not be much stack space
+     available for the latter code to run.  If compiling all code,
+     including library code, with `-fsplit-stack' is not an option,
+     then the linker can fix up these calls so that the code compiled
+     without `-fsplit-stack' always has a large stack.  Support for
+     this is implemented in the gold linker in GNU binutils release 2.21
+     and later.
+
+`-fleading-underscore'
+     This option and its counterpart, `-fno-leading-underscore',
+     forcibly change the way C symbols are represented in the object
+     file.  One use is to help link with legacy assembly code.
+
+     *Warning:* the `-fleading-underscore' switch causes GCC to
+     generate code that is not binary compatible with code generated
+     without that switch.  Use it to conform to a non-default
+     application binary interface.  Not all targets provide complete
+     support for this switch.
+
+`-ftls-model=MODEL'
+     Alter the thread-local storage model to be used (*note
+     Thread-Local::).  The MODEL argument should be one of
+     `global-dynamic', `local-dynamic', `initial-exec' or `local-exec'.
+
+     The default without `-fpic' is `initial-exec'; with `-fpic' the
+     default is `global-dynamic'.
+
+`-fvisibility=DEFAULT|INTERNAL|HIDDEN|PROTECTED'
+     Set the default ELF image symbol visibility to the specified
+     option--all symbols will be marked with this unless overridden
+     within the code.  Using this feature can very substantially
+     improve linking and load times of shared object libraries, produce
+     more optimized code, provide near-perfect API export and prevent
+     symbol clashes.  It is *strongly* recommended that you use this in
+     any shared objects you distribute.
+
+     Despite the nomenclature, `default' always means public; i.e.,
+     available to be linked against from outside the shared object.
+     `protected' and `internal' are pretty useless in real-world usage
+     so the only other commonly used option will be `hidden'.  The
+     default if `-fvisibility' isn't specified is `default', i.e., make
+     every symbol public--this causes the same behavior as previous
+     versions of GCC.
+
+     A good explanation of the benefits offered by ensuring ELF symbols
+     have the correct visibility is given by "How To Write Shared
+     Libraries" by Ulrich Drepper (which can be found at
+     `http://people.redhat.com/~drepper/')--however a superior solution
+     made possible by this option to marking things hidden when the
+     default is public is to make the default hidden and mark things
+     public.  This is the norm with DLL's on Windows and with
+     `-fvisibility=hidden' and `__attribute__
+     ((visibility("default")))' instead of `__declspec(dllexport)' you
+     get almost identical semantics with identical syntax.  This is a
+     great boon to those working with cross-platform projects.
+
+     For those adding visibility support to existing code, you may find
+     `#pragma GCC visibility' of use.  This works by you enclosing the
+     declarations you wish to set visibility for with (for example)
+     `#pragma GCC visibility push(hidden)' and `#pragma GCC visibility
+     pop'.  Bear in mind that symbol visibility should be viewed *as
+     part of the API interface contract* and thus all new code should
+     always specify visibility when it is not the default; i.e.,
+     declarations only for use within the local DSO should *always* be
+     marked explicitly as hidden as so to avoid PLT indirection
+     overheads--making this abundantly clear also aids readability and
+     self-documentation of the code.  Note that due to ISO C++
+     specification requirements, operator new and operator delete must
+     always be of default visibility.
+
+     Be aware that headers from outside your project, in particular
+     system headers and headers from any other library you use, may not
+     be expecting to be compiled with visibility other than the
+     default.  You may need to explicitly say `#pragma GCC visibility
+     push(default)' before including any such headers.
+
+     `extern' declarations are not affected by `-fvisibility', so a lot
+     of code can be recompiled with `-fvisibility=hidden' with no
+     modifications.  However, this means that calls to `extern'
+     functions with no explicit visibility will use the PLT, so it is
+     more effective to use `__attribute ((visibility))' and/or `#pragma
+     GCC visibility' to tell the compiler which `extern' declarations
+     should be treated as hidden.
+
+     Note that `-fvisibility' does affect C++ vague linkage entities.
+     This means that, for instance, an exception class that will be
+     thrown between DSOs must be explicitly marked with default
+     visibility so that the `type_info' nodes will be unified between
+     the DSOs.
+
+     An overview of these techniques, their benefits and how to use them
+     is at `http://gcc.gnu.org/wiki/Visibility'.
+
+`-fstrict-volatile-bitfields'
+     This option should be used if accesses to volatile bitfields (or
+     other structure fields, although the compiler usually honors those
+     types anyway) should use a single access of the width of the
+     field's type, aligned to a natural alignment if possible.  For
+     example, targets with memory-mapped peripheral registers might
+     require all such accesses to be 16 bits wide; with this flag the
+     user could declare all peripheral bitfields as "unsigned short"
+     (assuming short is 16 bits on these targets) to force GCC to use
+     16 bit accesses instead of, perhaps, a more efficient 32 bit
+     access.
+
+     If this option is disabled, the compiler will use the most
+     efficient instruction.  In the previous example, that might be a
+     32-bit load instruction, even though that will access bytes that
+     do not contain any portion of the bitfield, or memory-mapped
+     registers unrelated to the one being updated.
+
+     If the target requires strict alignment, and honoring the field
+     type would require violating this alignment, a warning is issued.
+     If the field has `packed' attribute, the access is done without
+     honoring the field type.  If the field doesn't have `packed'
+     attribute, the access is done honoring the field type.  In both
+     cases, GCC assumes that the user knows something about the target
+     hardware that it is unaware of.
+
+     The default value of this option is determined by the application
+     binary interface for the target processor.
+
+
+
+File: gcc.info,  Node: Environment Variables,  Next: Precompiled Headers,  Prev: Code Gen Options,  Up: Invoking GCC
+
+3.19 Environment Variables Affecting GCC
+========================================
+
+This section describes several environment variables that affect how GCC
+operates.  Some of them work by specifying directories or prefixes to
+use when searching for various kinds of files.  Some are used to
+specify other aspects of the compilation environment.
+
+ Note that you can also specify places to search using options such as
+`-B', `-I' and `-L' (*note Directory Options::).  These take precedence
+over places specified using environment variables, which in turn take
+precedence over those specified by the configuration of GCC.  *Note
+Controlling the Compilation Driver `gcc': (gccint)Driver.
+
+`LANG'
+`LC_CTYPE'
+`LC_MESSAGES'
+`LC_ALL'
+     These environment variables control the way that GCC uses
+     localization information that allow GCC to work with different
+     national conventions.  GCC inspects the locale categories
+     `LC_CTYPE' and `LC_MESSAGES' if it has been configured to do so.
+     These locale categories can be set to any value supported by your
+     installation.  A typical value is `en_GB.UTF-8' for English in the
+     United Kingdom encoded in UTF-8.
+
+     The `LC_CTYPE' environment variable specifies character
+     classification.  GCC uses it to determine the character boundaries
+     in a string; this is needed for some multibyte encodings that
+     contain quote and escape characters that would otherwise be
+     interpreted as a string end or escape.
+
+     The `LC_MESSAGES' environment variable specifies the language to
+     use in diagnostic messages.
+
+     If the `LC_ALL' environment variable is set, it overrides the value
+     of `LC_CTYPE' and `LC_MESSAGES'; otherwise, `LC_CTYPE' and
+     `LC_MESSAGES' default to the value of the `LANG' environment
+     variable.  If none of these variables are set, GCC defaults to
+     traditional C English behavior.
+
+`TMPDIR'
+     If `TMPDIR' is set, it specifies the directory to use for temporary
+     files.  GCC uses temporary files to hold the output of one stage of
+     compilation which is to be used as input to the next stage: for
+     example, the output of the preprocessor, which is the input to the
+     compiler proper.
+
+`GCC_EXEC_PREFIX'
+     If `GCC_EXEC_PREFIX' is set, it specifies a prefix to use in the
+     names of the subprograms executed by the compiler.  No slash is
+     added when this prefix is combined with the name of a subprogram,
+     but you can specify a prefix that ends with a slash if you wish.
+
+     If `GCC_EXEC_PREFIX' is not set, GCC will attempt to figure out an
+     appropriate prefix to use based on the pathname it was invoked
+     with.
+
+     If GCC cannot find the subprogram using the specified prefix, it
+     tries looking in the usual places for the subprogram.
+
+     The default value of `GCC_EXEC_PREFIX' is `PREFIX/lib/gcc/' where
+     PREFIX is the prefix to the installed compiler. In many cases
+     PREFIX is the value of `prefix' when you ran the `configure'
+     script.
+
+     Other prefixes specified with `-B' take precedence over this
+     prefix.
+
+     This prefix is also used for finding files such as `crt0.o' that
+     are used for linking.
+
+     In addition, the prefix is used in an unusual way in finding the
+     directories to search for header files.  For each of the standard
+     directories whose name normally begins with `/usr/local/lib/gcc'
+     (more precisely, with the value of `GCC_INCLUDE_DIR'), GCC tries
+     replacing that beginning with the specified prefix to produce an
+     alternate directory name.  Thus, with `-Bfoo/', GCC will search
+     `foo/bar' where it would normally search `/usr/local/lib/bar'.
+     These alternate directories are searched first; the standard
+     directories come next. If a standard directory begins with the
+     configured PREFIX then the value of PREFIX is replaced by
+     `GCC_EXEC_PREFIX' when looking for header files.
+
+`COMPILER_PATH'
+     The value of `COMPILER_PATH' is a colon-separated list of
+     directories, much like `PATH'.  GCC tries the directories thus
+     specified when searching for subprograms, if it can't find the
+     subprograms using `GCC_EXEC_PREFIX'.
+
+`LIBRARY_PATH'
+     The value of `LIBRARY_PATH' is a colon-separated list of
+     directories, much like `PATH'.  When configured as a native
+     compiler, GCC tries the directories thus specified when searching
+     for special linker files, if it can't find them using
+     `GCC_EXEC_PREFIX'.  Linking using GCC also uses these directories
+     when searching for ordinary libraries for the `-l' option (but
+     directories specified with `-L' come first).
+
+`LANG'
+     This variable is used to pass locale information to the compiler.
+     One way in which this information is used is to determine the
+     character set to be used when character literals, string literals
+     and comments are parsed in C and C++.  When the compiler is
+     configured to allow multibyte characters, the following values for
+     `LANG' are recognized:
+
+    `C-JIS'
+          Recognize JIS characters.
+
+    `C-SJIS'
+          Recognize SJIS characters.
+
+    `C-EUCJP'
+          Recognize EUCJP characters.
+
+     If `LANG' is not defined, or if it has some other value, then the
+     compiler will use mblen and mbtowc as defined by the default
+     locale to recognize and translate multibyte characters.
+
+Some additional environments variables affect the behavior of the
+preprocessor.
+
+`CPATH'
+`C_INCLUDE_PATH'
+`CPLUS_INCLUDE_PATH'
+`OBJC_INCLUDE_PATH'
+     Each variable's value is a list of directories separated by a
+     special character, much like `PATH', in which to look for header
+     files.  The special character, `PATH_SEPARATOR', is
+     target-dependent and determined at GCC build time.  For Microsoft
+     Windows-based targets it is a semicolon, and for almost all other
+     targets it is a colon.
+
+     `CPATH' specifies a list of directories to be searched as if
+     specified with `-I', but after any paths given with `-I' options
+     on the command line.  This environment variable is used regardless
+     of which language is being preprocessed.
+
+     The remaining environment variables apply only when preprocessing
+     the particular language indicated.  Each specifies a list of
+     directories to be searched as if specified with `-isystem', but
+     after any paths given with `-isystem' options on the command line.
+
+     In all these variables, an empty element instructs the compiler to
+     search its current working directory.  Empty elements can appear
+     at the beginning or end of a path.  For instance, if the value of
+     `CPATH' is `:/special/include', that has the same effect as
+     `-I. -I/special/include'.
+
+`DEPENDENCIES_OUTPUT'
+     If this variable is set, its value specifies how to output
+     dependencies for Make based on the non-system header files
+     processed by the compiler.  System header files are ignored in the
+     dependency output.
+
+     The value of `DEPENDENCIES_OUTPUT' can be just a file name, in
+     which case the Make rules are written to that file, guessing the
+     target name from the source file name.  Or the value can have the
+     form `FILE TARGET', in which case the rules are written to file
+     FILE using TARGET as the target name.
+
+     In other words, this environment variable is equivalent to
+     combining the options `-MM' and `-MF' (*note Preprocessor
+     Options::), with an optional `-MT' switch too.
+
+`SUNPRO_DEPENDENCIES'
+     This variable is the same as `DEPENDENCIES_OUTPUT' (see above),
+     except that system header files are not ignored, so it implies
+     `-M' rather than `-MM'.  However, the dependence on the main input
+     file is omitted.  *Note Preprocessor Options::.
+
+
+File: gcc.info,  Node: Precompiled Headers,  Prev: Environment Variables,  Up: Invoking GCC
+
+3.20 Using Precompiled Headers
+==============================
+
+Often large projects have many header files that are included in every
+source file.  The time the compiler takes to process these header files
+over and over again can account for nearly all of the time required to
+build the project.  To make builds faster, GCC allows users to
+`precompile' a header file; then, if builds can use the precompiled
+header file they will be much faster.
+
+ To create a precompiled header file, simply compile it as you would any
+other file, if necessary using the `-x' option to make the driver treat
+it as a C or C++ header file.  You will probably want to use a tool
+like `make' to keep the precompiled header up-to-date when the headers
+it contains change.
+
+ A precompiled header file will be searched for when `#include' is seen
+in the compilation.  As it searches for the included file (*note Search
+Path: (cpp)Search Path.) the compiler looks for a precompiled header in
+each directory just before it looks for the include file in that
+directory.  The name searched for is the name specified in the
+`#include' with `.gch' appended.  If the precompiled header file can't
+be used, it is ignored.
+
+ For instance, if you have `#include "all.h"', and you have `all.h.gch'
+in the same directory as `all.h', then the precompiled header file will
+be used if possible, and the original header will be used otherwise.
+
+ Alternatively, you might decide to put the precompiled header file in a
+directory and use `-I' to ensure that directory is searched before (or
+instead of) the directory containing the original header.  Then, if you
+want to check that the precompiled header file is always used, you can
+put a file of the same name as the original header in this directory
+containing an `#error' command.
+
+ This also works with `-include'.  So yet another way to use
+precompiled headers, good for projects not designed with precompiled
+header files in mind, is to simply take most of the header files used by
+a project, include them from another header file, precompile that header
+file, and `-include' the precompiled header.  If the header files have
+guards against multiple inclusion, they will be skipped because they've
+already been included (in the precompiled header).
+
+ If you need to precompile the same header file for different
+languages, targets, or compiler options, you can instead make a
+_directory_ named like `all.h.gch', and put each precompiled header in
+the directory, perhaps using `-o'.  It doesn't matter what you call the
+files in the directory, every precompiled header in the directory will
+be considered.  The first precompiled header encountered in the
+directory that is valid for this compilation will be used; they're
+searched in no particular order.
+
+ There are many other possibilities, limited only by your imagination,
+good sense, and the constraints of your build system.
+
+ A precompiled header file can be used only when these conditions apply:
+
+   * Only one precompiled header can be used in a particular
+     compilation.
+
+   * A precompiled header can't be used once the first C token is seen.
+     You can have preprocessor directives before a precompiled header;
+     you can even include a precompiled header from inside another
+     header, so long as there are no C tokens before the `#include'.
+
+   * The precompiled header file must be produced for the same language
+     as the current compilation.  You can't use a C precompiled header
+     for a C++ compilation.
+
+   * The precompiled header file must have been produced by the same
+     compiler binary as the current compilation is using.
+
+   * Any macros defined before the precompiled header is included must
+     either be defined in the same way as when the precompiled header
+     was generated, or must not affect the precompiled header, which
+     usually means that they don't appear in the precompiled header at
+     all.
+
+     The `-D' option is one way to define a macro before a precompiled
+     header is included; using a `#define' can also do it.  There are
+     also some options that define macros implicitly, like `-O' and
+     `-Wdeprecated'; the same rule applies to macros defined this way.
+
+   * If debugging information is output when using the precompiled
+     header, using `-g' or similar, the same kind of debugging
+     information must have been output when building the precompiled
+     header.  However, a precompiled header built using `-g' can be
+     used in a compilation when no debugging information is being
+     output.
+
+   * The same `-m' options must generally be used when building and
+     using the precompiled header.  *Note Submodel Options::, for any
+     cases where this rule is relaxed.
+
+   * Each of the following options must be the same when building and
+     using the precompiled header:
+
+          -fexceptions
+
+   * Some other command-line options starting with `-f', `-p', or `-O'
+     must be defined in the same way as when the precompiled header was
+     generated.  At present, it's not clear which options are safe to
+     change and which are not; the safest choice is to use exactly the
+     same options when generating and using the precompiled header.
+     The following are known to be safe:
+
+          -fmessage-length=  -fpreprocessed  -fsched-interblock
+          -fsched-spec  -fsched-spec-load  -fsched-spec-load-dangerous
+          -fsched-verbose=NUMBER  -fschedule-insns  -fvisibility=
+          -pedantic-errors
+
+
+ For all of these except the last, the compiler will automatically
+ignore the precompiled header if the conditions aren't met.  If you
+find an option combination that doesn't work and doesn't cause the
+precompiled header to be ignored, please consider filing a bug report,
+see *note Bugs::.
+
+ If you do use differing options when generating and using the
+precompiled header, the actual behavior will be a mixture of the
+behavior for the options.  For instance, if you use `-g' to generate
+the precompiled header but not when using it, you may or may not get
+debugging information for routines in the precompiled header.
+
+
+File: gcc.info,  Node: C Implementation,  Next: C Extensions,  Prev: Invoking GCC,  Up: Top
+
+4 C Implementation-defined behavior
+***********************************
+
+A conforming implementation of ISO C is required to document its choice
+of behavior in each of the areas that are designated "implementation
+defined".  The following lists all such areas, along with the section
+numbers from the ISO/IEC 9899:1990 and ISO/IEC 9899:1999 standards.
+Some areas are only implementation-defined in one version of the
+standard.
+
+ Some choices depend on the externally determined ABI for the platform
+(including standard character encodings) which GCC follows; these are
+listed as "determined by ABI" below.  *Note Binary Compatibility:
+Compatibility, and `http://gcc.gnu.org/readings.html'.  Some choices
+are documented in the preprocessor manual.  *Note
+Implementation-defined behavior: (cpp)Implementation-defined behavior.
+Some choices are made by the library and operating system (or other
+environment when compiling for a freestanding environment); refer to
+their documentation for details.
+
+* Menu:
+
+* Translation implementation::
+* Environment implementation::
+* Identifiers implementation::
+* Characters implementation::
+* Integers implementation::
+* Floating point implementation::
+* Arrays and pointers implementation::
+* Hints implementation::
+* Structures unions enumerations and bit-fields implementation::
+* Qualifiers implementation::
+* Declarators implementation::
+* Statements implementation::
+* Preprocessing directives implementation::
+* Library functions implementation::
+* Architecture implementation::
+* Locale-specific behavior implementation::
+
+
+File: gcc.info,  Node: Translation implementation,  Next: Environment implementation,  Up: C Implementation
+
+4.1 Translation
+===============
+
+   * `How a diagnostic is identified (C90 3.7, C99 3.10, C90 and C99
+     5.1.1.3).'
+
+     Diagnostics consist of all the output sent to stderr by GCC.
+
+   * `Whether each nonempty sequence of white-space characters other
+     than new-line is retained or replaced by one space character in
+     translation phase 3 (C90 and C99 5.1.1.2).'
+
+     *Note Implementation-defined behavior: (cpp)Implementation-defined
+     behavior.
+
+
+
+File: gcc.info,  Node: Environment implementation,  Next: Identifiers implementation,  Prev: Translation implementation,  Up: C Implementation
+
+4.2 Environment
+===============
+
+The behavior of most of these points are dependent on the implementation
+of the C library, and are not defined by GCC itself.
+
+   * `The mapping between physical source file multibyte characters and
+     the source character set in translation phase 1 (C90 and C99
+     5.1.1.2).'
+
+     *Note Implementation-defined behavior: (cpp)Implementation-defined
+     behavior.
+
+
+
+File: gcc.info,  Node: Identifiers implementation,  Next: Characters implementation,  Prev: Environment implementation,  Up: C Implementation
+
+4.3 Identifiers
+===============
+
+   * `Which additional multibyte characters may appear in identifiers
+     and their correspondence to universal character names (C99 6.4.2).'
+
+     *Note Implementation-defined behavior: (cpp)Implementation-defined
+     behavior.
+
+   * `The number of significant initial characters in an identifier
+     (C90 6.1.2, C90 and C99 5.2.4.1, C99 6.4.2).'
+
+     For internal names, all characters are significant.  For external
+     names, the number of significant characters are defined by the
+     linker; for almost all targets, all characters are significant.
+
+   * `Whether case distinctions are significant in an identifier with
+     external linkage (C90 6.1.2).'
+
+     This is a property of the linker.  C99 requires that case
+     distinctions are always significant in identifiers with external
+     linkage and systems without this property are not supported by GCC.
+
+
+
+File: gcc.info,  Node: Characters implementation,  Next: Integers implementation,  Prev: Identifiers implementation,  Up: C Implementation
+
+4.4 Characters
+==============
+
+   * `The number of bits in a byte (C90 3.4, C99 3.6).'
+
+     Determined by ABI.
+
+   * `The values of the members of the execution character set (C90 and
+     C99 5.2.1).'
+
+     Determined by ABI.
+
+   * `The unique value of the member of the execution character set
+     produced for each of the standard alphabetic escape sequences (C90
+     and C99 5.2.2).'
+
+     Determined by ABI.
+
+   * `The value of a `char' object into which has been stored any
+     character other than a member of the basic execution character set
+     (C90 6.1.2.5, C99 6.2.5).'
+
+     Determined by ABI.
+
+   * `Which of `signed char' or `unsigned char' has the same range,
+     representation, and behavior as "plain" `char' (C90 6.1.2.5, C90
+     6.2.1.1, C99 6.2.5, C99 6.3.1.1).'
+
+     Determined by ABI.  The options `-funsigned-char' and
+     `-fsigned-char' change the default.  *Note Options Controlling C
+     Dialect: C Dialect Options.
+
+   * `The mapping of members of the source character set (in character
+     constants and string literals) to members of the execution
+     character set (C90 6.1.3.4, C99 6.4.4.4, C90 and C99 5.1.1.2).'
+
+     Determined by ABI.
+
+   * `The value of an integer character constant containing more than
+     one character or containing a character or escape sequence that
+     does not map to a single-byte execution character (C90 6.1.3.4,
+     C99 6.4.4.4).'
+
+     *Note Implementation-defined behavior: (cpp)Implementation-defined
+     behavior.
+
+   * `The value of a wide character constant containing more than one
+     multibyte character, or containing a multibyte character or escape
+     sequence not represented in the extended execution character set
+     (C90 6.1.3.4, C99 6.4.4.4).'
+
+     *Note Implementation-defined behavior: (cpp)Implementation-defined
+     behavior.
+
+   * `The current locale used to convert a wide character constant
+     consisting of a single multibyte character that maps to a member
+     of the extended execution character set into a corresponding wide
+     character code (C90 6.1.3.4, C99 6.4.4.4).'
+
+     *Note Implementation-defined behavior: (cpp)Implementation-defined
+     behavior.
+
+   * `The current locale used to convert a wide string literal into
+     corresponding wide character codes (C90 6.1.4, C99 6.4.5).'
+
+     *Note Implementation-defined behavior: (cpp)Implementation-defined
+     behavior.
+
+   * `The value of a string literal containing a multibyte character or
+     escape sequence not represented in the execution character set
+     (C90 6.1.4, C99 6.4.5).'
+
+     *Note Implementation-defined behavior: (cpp)Implementation-defined
+     behavior.
+
+
+File: gcc.info,  Node: Integers implementation,  Next: Floating point implementation,  Prev: Characters implementation,  Up: C Implementation
+
+4.5 Integers
+============
+
+   * `Any extended integer types that exist in the implementation (C99
+     6.2.5).'
+
+     GCC does not support any extended integer types.
+
+   * `Whether signed integer types are represented using sign and
+     magnitude, two's complement, or one's complement, and whether the
+     extraordinary value is a trap representation or an ordinary value
+     (C99 6.2.6.2).'
+
+     GCC supports only two's complement integer types, and all bit
+     patterns are ordinary values.
+
+   * `The rank of any extended integer type relative to another extended
+     integer type with the same precision (C99 6.3.1.1).'
+
+     GCC does not support any extended integer types.
+
+   * `The result of, or the signal raised by, converting an integer to a
+     signed integer type when the value cannot be represented in an
+     object of that type (C90 6.2.1.2, C99 6.3.1.3).'
+
+     For conversion to a type of width N, the value is reduced modulo
+     2^N to be within range of the type; no signal is raised.
+
+   * `The results of some bitwise operations on signed integers (C90
+     6.3, C99 6.5).'
+
+     Bitwise operators act on the representation of the value including
+     both the sign and value bits, where the sign bit is considered
+     immediately above the highest-value value bit.  Signed `>>' acts
+     on negative numbers by sign extension.
+
+     GCC does not use the latitude given in C99 only to treat certain
+     aspects of signed `<<' as undefined, but this is subject to change.
+
+   * `The sign of the remainder on integer division (C90 6.3.5).'
+
+     GCC always follows the C99 requirement that the result of division
+     is truncated towards zero.
+
+
+
+File: gcc.info,  Node: Floating point implementation,  Next: Arrays and pointers implementation,  Prev: Integers implementation,  Up: C Implementation
+
+4.6 Floating point
+==================
+
+   * `The accuracy of the floating-point operations and of the library
+     functions in `<math.h>' and `<complex.h>' that return
+     floating-point results (C90 and C99 5.2.4.2.2).'
+
+     The accuracy is unknown.
+
+   * `The rounding behaviors characterized by non-standard values of
+     `FLT_ROUNDS'  (C90 and C99 5.2.4.2.2).'
+
+     GCC does not use such values.
+
+   * `The evaluation methods characterized by non-standard negative
+     values of `FLT_EVAL_METHOD' (C99 5.2.4.2.2).'
+
+     GCC does not use such values.
+
+   * `The direction of rounding when an integer is converted to a
+     floating-point number that cannot exactly represent the original
+     value (C90 6.2.1.3, C99 6.3.1.4).'
+
+     C99 Annex F is followed.
+
+   * `The direction of rounding when a floating-point number is
+     converted to a narrower floating-point number (C90 6.2.1.4, C99
+     6.3.1.5).'
+
+     C99 Annex F is followed.
+
+   * `How the nearest representable value or the larger or smaller
+     representable value immediately adjacent to the nearest
+     representable value is chosen for certain floating constants (C90
+     6.1.3.1, C99 6.4.4.2).'
+
+     C99 Annex F is followed.
+
+   * `Whether and how floating expressions are contracted when not
+     disallowed by the `FP_CONTRACT' pragma (C99 6.5).'
+
+     Expressions are currently only contracted if
+     `-funsafe-math-optimizations' or `-ffast-math' are used.  This is
+     subject to change.
+
+   * `The default state for the `FENV_ACCESS' pragma (C99 7.6.1).'
+
+     This pragma is not implemented, but the default is to "off" unless
+     `-frounding-math' is used in which case it is "on".
+
+   * `Additional floating-point exceptions, rounding modes,
+     environments, and classifications, and their macro names (C99 7.6,
+     C99 7.12).'
+
+     This is dependent on the implementation of the C library, and is
+     not defined by GCC itself.
+
+   * `The default state for the `FP_CONTRACT' pragma (C99 7.12.2).'
+
+     This pragma is not implemented.  Expressions are currently only
+     contracted if `-funsafe-math-optimizations' or `-ffast-math' are
+     used.  This is subject to change.
+
+   * `Whether the "inexact" floating-point exception can be raised when
+     the rounded result actually does equal the mathematical result in
+     an IEC 60559 conformant implementation (C99 F.9).'
+
+     This is dependent on the implementation of the C library, and is
+     not defined by GCC itself.
+
+   * `Whether the "underflow" (and "inexact") floating-point exception
+     can be raised when a result is tiny but not inexact in an IEC
+     60559 conformant implementation (C99 F.9).'
+
+     This is dependent on the implementation of the C library, and is
+     not defined by GCC itself.
+
+
+
+File: gcc.info,  Node: Arrays and pointers implementation,  Next: Hints implementation,  Prev: Floating point implementation,  Up: C Implementation
+
+4.7 Arrays and pointers
+=======================
+
+   * `The result of converting a pointer to an integer or vice versa
+     (C90 6.3.4, C99 6.3.2.3).'
+
+     A cast from pointer to integer discards most-significant bits if
+     the pointer representation is larger than the integer type,
+     sign-extends(1) if the pointer representation is smaller than the
+     integer type, otherwise the bits are unchanged.
+
+     A cast from integer to pointer discards most-significant bits if
+     the pointer representation is smaller than the integer type,
+     extends according to the signedness of the integer type if the
+     pointer representation is larger than the integer type, otherwise
+     the bits are unchanged.
+
+     When casting from pointer to integer and back again, the resulting
+     pointer must reference the same object as the original pointer,
+     otherwise the behavior is undefined.  That is, one may not use
+     integer arithmetic to avoid the undefined behavior of pointer
+     arithmetic as proscribed in C99 6.5.6/8.
+
+   * `The size of the result of subtracting two pointers to elements of
+     the same array (C90 6.3.6, C99 6.5.6).'
+
+     The value is as specified in the standard and the type is
+     determined by the ABI.
+
+
+ ---------- Footnotes ----------
+
+ (1) Future versions of GCC may zero-extend, or use a target-defined
+`ptr_extend' pattern.  Do not rely on sign extension.
+
+
+File: gcc.info,  Node: Hints implementation,  Next: Structures unions enumerations and bit-fields implementation,  Prev: Arrays and pointers implementation,  Up: C Implementation
+
+4.8 Hints
+=========
+
+   * `The extent to which suggestions made by using the `register'
+     storage-class specifier are effective (C90 6.5.1, C99 6.7.1).'
+
+     The `register' specifier affects code generation only in these
+     ways:
+
+        * When used as part of the register variable extension, see
+          *note Explicit Reg Vars::.
+
+        * When `-O0' is in use, the compiler allocates distinct stack
+          memory for all variables that do not have the `register'
+          storage-class specifier; if `register' is specified, the
+          variable may have a shorter lifespan than the code would
+          indicate and may never be placed in memory.
+
+        * On some rare x86 targets, `setjmp' doesn't save the registers
+          in all circumstances.  In those cases, GCC doesn't allocate
+          any variables in registers unless they are marked `register'.
+
+
+   * `The extent to which suggestions made by using the inline function
+     specifier are effective (C99 6.7.4).'
+
+     GCC will not inline any functions if the `-fno-inline' option is
+     used or if `-O0' is used.  Otherwise, GCC may still be unable to
+     inline a function for many reasons; the `-Winline' option may be
+     used to determine if a function has not been inlined and why not.
+
+
+
+File: gcc.info,  Node: Structures unions enumerations and bit-fields implementation,  Next: Qualifiers implementation,  Prev: Hints implementation,  Up: C Implementation
+
+4.9 Structures, unions, enumerations, and bit-fields
+====================================================
+
+   * `A member of a union object is accessed using a member of a
+     different type (C90 6.3.2.3).'
+
+     The relevant bytes of the representation of the object are treated
+     as an object of the type used for the access.  *Note
+     Type-punning::.  This may be a trap representation.
+
+   * `Whether a "plain" `int' bit-field is treated as a `signed int'
+     bit-field or as an `unsigned int' bit-field (C90 6.5.2, C90
+     6.5.2.1, C99 6.7.2, C99 6.7.2.1).'
+
+     By default it is treated as `signed int' but this may be changed
+     by the `-funsigned-bitfields' option.
+
+   * `Allowable bit-field types other than `_Bool', `signed int', and
+     `unsigned int' (C99 6.7.2.1).'
+
+     No other types are permitted in strictly conforming mode.
+
+   * `Whether a bit-field can straddle a storage-unit boundary (C90
+     6.5.2.1, C99 6.7.2.1).'
+
+     Determined by ABI.
+
+   * `The order of allocation of bit-fields within a unit (C90 6.5.2.1,
+     C99 6.7.2.1).'
+
+     Determined by ABI.
+
+   * `The alignment of non-bit-field members of structures (C90
+     6.5.2.1, C99 6.7.2.1).'
+
+     Determined by ABI.
+
+   * `The integer type compatible with each enumerated type (C90
+     6.5.2.2, C99 6.7.2.2).'
+
+     Normally, the type is `unsigned int' if there are no negative
+     values in the enumeration, otherwise `int'.  If `-fshort-enums' is
+     specified, then if there are negative values it is the first of
+     `signed char', `short' and `int' that can represent all the
+     values, otherwise it is the first of `unsigned char', `unsigned
+     short' and `unsigned int' that can represent all the values.
+
+     On some targets, `-fshort-enums' is the default; this is
+     determined by the ABI.
+
+
+
+File: gcc.info,  Node: Qualifiers implementation,  Next: Declarators implementation,  Prev: Structures unions enumerations and bit-fields implementation,  Up: C Implementation
+
+4.10 Qualifiers
+===============
+
+   * `What constitutes an access to an object that has
+     volatile-qualified type (C90 6.5.3, C99 6.7.3).'
+
+     Such an object is normally accessed by pointers and used for
+     accessing hardware.  In most expressions, it is intuitively
+     obvious what is a read and what is a write.  For example
+
+          volatile int *dst = SOMEVALUE;
+          volatile int *src = SOMEOTHERVALUE;
+          *dst = *src;
+
+     will cause a read of the volatile object pointed to by SRC and
+     store the value into the volatile object pointed to by DST.  There
+     is no guarantee that these reads and writes are atomic, especially
+     for objects larger than `int'.
+
+     However, if the volatile storage is not being modified, and the
+     value of the volatile storage is not used, then the situation is
+     less obvious.  For example
+
+          volatile int *src = SOMEVALUE;
+          *src;
+
+     According to the C standard, such an expression is an rvalue whose
+     type is the unqualified version of its original type, i.e. `int'.
+     Whether GCC interprets this as a read of the volatile object being
+     pointed to or only as a request to evaluate the expression for its
+     side-effects depends on this type.
+
+     If it is a scalar type, or on most targets an aggregate type whose
+     only member object is of a scalar type, or a union type whose
+     member objects are of scalar types, the expression is interpreted
+     by GCC as a read of the volatile object; in the other cases, the
+     expression is only evaluated for its side-effects.
+
+
+
+File: gcc.info,  Node: Declarators implementation,  Next: Statements implementation,  Prev: Qualifiers implementation,  Up: C Implementation
+
+4.11 Declarators
+================
+
+   * `The maximum number of declarators that may modify an arithmetic,
+     structure or union type (C90 6.5.4).'
+
+     GCC is only limited by available memory.
+
+
+
+File: gcc.info,  Node: Statements implementation,  Next: Preprocessing directives implementation,  Prev: Declarators implementation,  Up: C Implementation
+
+4.12 Statements
+===============
+
+   * `The maximum number of `case' values in a `switch' statement (C90
+     6.6.4.2).'
+
+     GCC is only limited by available memory.
+
+
+
+File: gcc.info,  Node: Preprocessing directives implementation,  Next: Library functions implementation,  Prev: Statements implementation,  Up: C Implementation
+
+4.13 Preprocessing directives
+=============================
+
+*Note Implementation-defined behavior: (cpp)Implementation-defined
+behavior, for details of these aspects of implementation-defined
+behavior.
+
+   * `How sequences in both forms of header names are mapped to headers
+     or external source file names (C90 6.1.7, C99 6.4.7).'
+
+   * `Whether the value of a character constant in a constant expression
+     that controls conditional inclusion matches the value of the same
+     character constant in the execution character set (C90 6.8.1, C99
+     6.10.1).'
+
+   * `Whether the value of a single-character character constant in a
+     constant expression that controls conditional inclusion may have a
+     negative value (C90 6.8.1, C99 6.10.1).'
+
+   * `The places that are searched for an included `<>' delimited
+     header, and how the places are specified or the header is
+     identified (C90 6.8.2, C99 6.10.2).'
+
+   * `How the named source file is searched for in an included `""'
+     delimited header (C90 6.8.2, C99 6.10.2).'
+
+   * `The method by which preprocessing tokens (possibly resulting from
+     macro expansion) in a `#include' directive are combined into a
+     header name (C90 6.8.2, C99 6.10.2).'
+
+   * `The nesting limit for `#include' processing (C90 6.8.2, C99
+     6.10.2).'
+
+   * `Whether the `#' operator inserts a `\' character before the `\'
+     character that begins a universal character name in a character
+     constant or string literal (C99 6.10.3.2).'
+
+   * `The behavior on each recognized non-`STDC #pragma' directive (C90
+     6.8.6, C99 6.10.6).'
+
+     *Note Pragmas: (cpp)Pragmas, for details of pragmas accepted by
+     GCC on all targets.  *Note Pragmas Accepted by GCC: Pragmas, for
+     details of target-specific pragmas.
+
+   * `The definitions for `__DATE__' and `__TIME__' when respectively,
+     the date and time of translation are not available (C90 6.8.8, C99
+     6.10.8).'
+
+
+
+File: gcc.info,  Node: Library functions implementation,  Next: Architecture implementation,  Prev: Preprocessing directives implementation,  Up: C Implementation
+
+4.14 Library functions
+======================
+
+The behavior of most of these points are dependent on the implementation
+of the C library, and are not defined by GCC itself.
+
+   * `The null pointer constant to which the macro `NULL' expands (C90
+     7.1.6, C99 7.17).'
+
+     In `<stddef.h>', `NULL' expands to `((void *)0)'.  GCC does not
+     provide the other headers which define `NULL' and some library
+     implementations may use other definitions in those headers.
+
+
+
+File: gcc.info,  Node: Architecture implementation,  Next: Locale-specific behavior implementation,  Prev: Library functions implementation,  Up: C Implementation
+
+4.15 Architecture
+=================
+
+   * `The values or expressions assigned to the macros specified in the
+     headers `<float.h>', `<limits.h>', and `<stdint.h>' (C90 and C99
+     5.2.4.2, C99 7.18.2, C99 7.18.3).'
+
+     Determined by ABI.
+
+   * `The number, order, and encoding of bytes in any object (when not
+     explicitly specified in this International Standard) (C99
+     6.2.6.1).'
+
+     Determined by ABI.
+
+   * `The value of the result of the `sizeof' operator (C90 6.3.3.4,
+     C99 6.5.3.4).'
+
+     Determined by ABI.
+
+
+
+File: gcc.info,  Node: Locale-specific behavior implementation,  Prev: Architecture implementation,  Up: C Implementation
+
+4.16 Locale-specific behavior
+=============================
+
+The behavior of these points are dependent on the implementation of the
+C library, and are not defined by GCC itself.
+
+
+File: gcc.info,  Node: C++ Implementation,  Next: C++ Extensions,  Prev: C Extensions,  Up: Top
+
+5 C++ Implementation-defined behavior
+*************************************
+
+A conforming implementation of ISO C++ is required to document its
+choice of behavior in each of the areas that are designated
+"implementation defined".  The following lists all such areas, along
+with the section numbers from the ISO/IEC 14822:1998 and ISO/IEC
+14822:2003 standards.  Some areas are only implementation-defined in
+one version of the standard.
+
+ Some choices depend on the externally determined ABI for the platform
+(including standard character encodings) which GCC follows; these are
+listed as "determined by ABI" below.  *Note Binary Compatibility:
+Compatibility, and `http://gcc.gnu.org/readings.html'.  Some choices
+are documented in the preprocessor manual.  *Note
+Implementation-defined behavior: (cpp)Implementation-defined behavior.
+Some choices are documented in the corresponding document for the C
+language.  *Note C Implementation::.  Some choices are made by the
+library and operating system (or other environment when compiling for a
+freestanding environment); refer to their documentation for details.
+
+* Menu:
+
+* Conditionally-supported behavior::
+* Exception handling::
+
+
+File: gcc.info,  Node: Conditionally-supported behavior,  Next: Exception handling,  Up: C++ Implementation
+
+5.1 Conditionally-supported behavior
+====================================
+
+`Each implementation shall include documentation that identifies all
+conditionally-supported constructs that it does not support (C++0x
+1.4).'
+
+   * `Whether an argument of class type with a non-trivial copy
+     constructor or destructor can be passed to ... (C++0x 5.2.2).'
+
+     Such argument passing is not supported.
+
+
+
+File: gcc.info,  Node: Exception handling,  Prev: Conditionally-supported behavior,  Up: C++ Implementation
+
+5.2 Exception handling
+======================
+
+   * `In the situation where no matching handler is found, it is
+     implementation-defined whether or not the stack is unwound before
+     std::terminate() is called (C++98 15.5.1).'
+
+     The stack is not unwound before std::terminate is called.
+
+
+
+File: gcc.info,  Node: C Extensions,  Next: C++ Implementation,  Prev: C Implementation,  Up: Top
+
+6 Extensions to the C Language Family
+*************************************
+
+GNU C provides several language features not found in ISO standard C.
+(The `-pedantic' option directs GCC to print a warning message if any
+of these features is used.)  To test for the availability of these
+features in conditional compilation, check for a predefined macro
+`__GNUC__', which is always defined under GCC.
+
+ These extensions are available in C and Objective-C.  Most of them are
+also available in C++.  *Note Extensions to the C++ Language: C++
+Extensions, for extensions that apply _only_ to C++.
+
+ Some features that are in ISO C99 but not C90 or C++ are also, as
+extensions, accepted by GCC in C90 mode and in C++.
+
+* Menu:
+
+* Statement Exprs::     Putting statements and declarations inside expressions.
+* Local Labels::        Labels local to a block.
+* Labels as Values::    Getting pointers to labels, and computed gotos.
+* Nested Functions::    As in Algol and Pascal, lexical scoping of functions.
+* Constructing Calls::  Dispatching a call to another function.
+* Typeof::              `typeof': referring to the type of an expression.
+* Conditionals::        Omitting the middle operand of a `?:' expression.
+* Long Long::           Double-word integers---`long long int'.
+* __int128::			128-bit integers---`__int128'.
+* Complex::             Data types for complex numbers.
+* Floating Types::      Additional Floating Types.
+* Half-Precision::      Half-Precision Floating Point.
+* Decimal Float::       Decimal Floating Types.
+* Hex Floats::          Hexadecimal floating-point constants.
+* Fixed-Point::         Fixed-Point Types.
+* Named Address Spaces::Named address spaces.
+* Zero Length::         Zero-length arrays.
+* Variable Length::     Arrays whose length is computed at run time.
+* Empty Structures::    Structures with no members.
+* Variadic Macros::     Macros with a variable number of arguments.
+* Escaped Newlines::    Slightly looser rules for escaped newlines.
+* Subscripting::        Any array can be subscripted, even if not an lvalue.
+* Pointer Arith::       Arithmetic on `void'-pointers and function pointers.
+* Initializers::        Non-constant initializers.
+* Compound Literals::   Compound literals give structures, unions
+                        or arrays as values.
+* Designated Inits::    Labeling elements of initializers.
+* Cast to Union::       Casting to union type from any member of the union.
+* Case Ranges::         `case 1 ... 9' and such.
+* Mixed Declarations::  Mixing declarations and code.
+* Function Attributes:: Declaring that functions have no side effects,
+                        or that they can never return.
+* Attribute Syntax::    Formal syntax for attributes.
+* Function Prototypes:: Prototype declarations and old-style definitions.
+* C++ Comments::        C++ comments are recognized.
+* Dollar Signs::        Dollar sign is allowed in identifiers.
+* Character Escapes::   `\e' stands for the character <ESC>.
+* Variable Attributes:: Specifying attributes of variables.
+* Type Attributes::     Specifying attributes of types.
+* Alignment::           Inquiring about the alignment of a type or variable.
+* Inline::              Defining inline functions (as fast as macros).
+* Volatiles::           What constitutes an access to a volatile object.
+* Extended Asm::        Assembler instructions with C expressions as operands.
+                        (With them you can define ``built-in'' functions.)
+* Constraints::         Constraints for asm operands
+* Asm Labels::          Specifying the assembler name to use for a C symbol.
+* Explicit Reg Vars::   Defining variables residing in specified registers.
+* Alternate Keywords::  `__const__', `__asm__', etc., for header files.
+* Incomplete Enums::    `enum foo;', with details to follow.
+* Function Names::      Printable strings which are the name of the current
+                        function.
+* Return Address::      Getting the return or frame address of a function.
+* Vector Extensions::   Using vector instructions through built-in functions.
+* Offsetof::            Special syntax for implementing `offsetof'.
+* Atomic Builtins::     Built-in functions for atomic memory access.
+* Object Size Checking:: Built-in functions for limited buffer overflow
+                        checking.
+* Other Builtins::      Other built-in functions.
+* Target Builtins::     Built-in functions specific to particular targets.
+* Target Format Checks:: Format checks specific to particular targets.
+* Pragmas::             Pragmas accepted by GCC.
+* Unnamed Fields::      Unnamed struct/union fields within structs/unions.
+* Thread-Local::        Per-thread variables.
+* Binary constants::    Binary constants using the `0b' prefix.
+
+
+File: gcc.info,  Node: Statement Exprs,  Next: Local Labels,  Up: C Extensions
+
+6.1 Statements and Declarations in Expressions
+==============================================
+
+A compound statement enclosed in parentheses may appear as an expression
+in GNU C.  This allows you to use loops, switches, and local variables
+within an expression.
+
+ Recall that a compound statement is a sequence of statements surrounded
+by braces; in this construct, parentheses go around the braces.  For
+example:
+
+     ({ int y = foo (); int z;
+        if (y > 0) z = y;
+        else z = - y;
+        z; })
+
+is a valid (though slightly more complex than necessary) expression for
+the absolute value of `foo ()'.
+
+ The last thing in the compound statement should be an expression
+followed by a semicolon; the value of this subexpression serves as the
+value of the entire construct.  (If you use some other kind of statement
+last within the braces, the construct has type `void', and thus
+effectively no value.)
+
+ This feature is especially useful in making macro definitions "safe"
+(so that they evaluate each operand exactly once).  For example, the
+"maximum" function is commonly defined as a macro in standard C as
+follows:
+
+     #define max(a,b) ((a) > (b) ? (a) : (b))
+
+But this definition computes either A or B twice, with bad results if
+the operand has side effects.  In GNU C, if you know the type of the
+operands (here taken as `int'), you can define the macro safely as
+follows:
+
+     #define maxint(a,b) \
+       ({int _a = (a), _b = (b); _a > _b ? _a : _b; })
+
+ Embedded statements are not allowed in constant expressions, such as
+the value of an enumeration constant, the width of a bit-field, or the
+initial value of a static variable.
+
+ If you don't know the type of the operand, you can still do this, but
+you must use `typeof' (*note Typeof::).
+
+ In G++, the result value of a statement expression undergoes array and
+function pointer decay, and is returned by value to the enclosing
+expression.  For instance, if `A' is a class, then
+
+             A a;
+
+             ({a;}).Foo ()
+
+will construct a temporary `A' object to hold the result of the
+statement expression, and that will be used to invoke `Foo'.  Therefore
+the `this' pointer observed by `Foo' will not be the address of `a'.
+
+ Any temporaries created within a statement within a statement
+expression will be destroyed at the statement's end.  This makes
+statement expressions inside macros slightly different from function
+calls.  In the latter case temporaries introduced during argument
+evaluation will be destroyed at the end of the statement that includes
+the function call.  In the statement expression case they will be
+destroyed during the statement expression.  For instance,
+
+     #define macro(a)  ({__typeof__(a) b = (a); b + 3; })
+     template<typename T> T function(T a) { T b = a; return b + 3; }
+
+     void foo ()
+     {
+       macro (X ());
+       function (X ());
+     }
+
+will have different places where temporaries are destroyed.  For the
+`macro' case, the temporary `X' will be destroyed just after the
+initialization of `b'.  In the `function' case that temporary will be
+destroyed when the function returns.
+
+ These considerations mean that it is probably a bad idea to use
+statement-expressions of this form in header files that are designed to
+work with C++.  (Note that some versions of the GNU C Library contained
+header files using statement-expression that lead to precisely this
+bug.)
+
+ Jumping into a statement expression with `goto' or using a `switch'
+statement outside the statement expression with a `case' or `default'
+label inside the statement expression is not permitted.  Jumping into a
+statement expression with a computed `goto' (*note Labels as Values::)
+yields undefined behavior.  Jumping out of a statement expression is
+permitted, but if the statement expression is part of a larger
+expression then it is unspecified which other subexpressions of that
+expression have been evaluated except where the language definition
+requires certain subexpressions to be evaluated before or after the
+statement expression.  In any case, as with a function call the
+evaluation of a statement expression is not interleaved with the
+evaluation of other parts of the containing expression.  For example,
+
+       foo (), (({ bar1 (); goto a; 0; }) + bar2 ()), baz();
+
+will call `foo' and `bar1' and will not call `baz' but may or may not
+call `bar2'.  If `bar2' is called, it will be called after `foo' and
+before `bar1'
+
+
+File: gcc.info,  Node: Local Labels,  Next: Labels as Values,  Prev: Statement Exprs,  Up: C Extensions
+
+6.2 Locally Declared Labels
+===========================
+
+GCC allows you to declare "local labels" in any nested block scope.  A
+local label is just like an ordinary label, but you can only reference
+it (with a `goto' statement, or by taking its address) within the block
+in which it was declared.
+
+ A local label declaration looks like this:
+
+     __label__ LABEL;
+
+or
+
+     __label__ LABEL1, LABEL2, /* ... */;
+
+ Local label declarations must come at the beginning of the block,
+before any ordinary declarations or statements.
+
+ The label declaration defines the label _name_, but does not define
+the label itself.  You must do this in the usual way, with `LABEL:',
+within the statements of the statement expression.
+
+ The local label feature is useful for complex macros.  If a macro
+contains nested loops, a `goto' can be useful for breaking out of them.
+However, an ordinary label whose scope is the whole function cannot be
+used: if the macro can be expanded several times in one function, the
+label will be multiply defined in that function.  A local label avoids
+this problem.  For example:
+
+     #define SEARCH(value, array, target)              \
+     do {                                              \
+       __label__ found;                                \
+       typeof (target) _SEARCH_target = (target);      \
+       typeof (*(array)) *_SEARCH_array = (array);     \
+       int i, j;                                       \
+       int value;                                      \
+       for (i = 0; i < max; i++)                       \
+         for (j = 0; j < max; j++)                     \
+           if (_SEARCH_array[i][j] == _SEARCH_target)  \
+             { (value) = i; goto found; }              \
+       (value) = -1;                                   \
+      found:;                                          \
+     } while (0)
+
+ This could also be written using a statement-expression:
+
+     #define SEARCH(array, target)                     \
+     ({                                                \
+       __label__ found;                                \
+       typeof (target) _SEARCH_target = (target);      \
+       typeof (*(array)) *_SEARCH_array = (array);     \
+       int i, j;                                       \
+       int value;                                      \
+       for (i = 0; i < max; i++)                       \
+         for (j = 0; j < max; j++)                     \
+           if (_SEARCH_array[i][j] == _SEARCH_target)  \
+             { value = i; goto found; }                \
+       value = -1;                                     \
+      found:                                           \
+       value;                                          \
+     })
+
+ Local label declarations also make the labels they declare visible to
+nested functions, if there are any.  *Note Nested Functions::, for
+details.
+
+
+File: gcc.info,  Node: Labels as Values,  Next: Nested Functions,  Prev: Local Labels,  Up: C Extensions
+
+6.3 Labels as Values
+====================
+
+You can get the address of a label defined in the current function (or
+a containing function) with the unary operator `&&'.  The value has
+type `void *'.  This value is a constant and can be used wherever a
+constant of that type is valid.  For example:
+
+     void *ptr;
+     /* ... */
+     ptr = &&foo;
+
+ To use these values, you need to be able to jump to one.  This is done
+with the computed goto statement(1), `goto *EXP;'.  For example,
+
+     goto *ptr;
+
+Any expression of type `void *' is allowed.
+
+ One way of using these constants is in initializing a static array that
+will serve as a jump table:
+
+     static void *array[] = { &&foo, &&bar, &&hack };
+
+ Then you can select a label with indexing, like this:
+
+     goto *array[i];
+
+Note that this does not check whether the subscript is in bounds--array
+indexing in C never does that.
+
+ Such an array of label values serves a purpose much like that of the
+`switch' statement.  The `switch' statement is cleaner, so use that
+rather than an array unless the problem does not fit a `switch'
+statement very well.
+
+ Another use of label values is in an interpreter for threaded code.
+The labels within the interpreter function can be stored in the
+threaded code for super-fast dispatching.
+
+ You may not use this mechanism to jump to code in a different function.
+If you do that, totally unpredictable things will happen.  The best way
+to avoid this is to store the label address only in automatic variables
+and never pass it as an argument.
+
+ An alternate way to write the above example is
+
+     static const int array[] = { &&foo - &&foo, &&bar - &&foo,
+                                  &&hack - &&foo };
+     goto *(&&foo + array[i]);
+
+This is more friendly to code living in shared libraries, as it reduces
+the number of dynamic relocations that are needed, and by consequence,
+allows the data to be read-only.
+
+ The `&&foo' expressions for the same label might have different values
+if the containing function is inlined or cloned.  If a program relies
+on them being always the same,
+`__attribute__((__noinline__,__noclone__))' should be used to prevent
+inlining and cloning.  If `&&foo' is used in a static variable
+initializer, inlining and cloning is forbidden.
+
+ ---------- Footnotes ----------
+
+ (1) The analogous feature in Fortran is called an assigned goto, but
+that name seems inappropriate in C, where one can do more than simply
+store label addresses in label variables.
+
+
+File: gcc.info,  Node: Nested Functions,  Next: Constructing Calls,  Prev: Labels as Values,  Up: C Extensions
+
+6.4 Nested Functions
+====================
+
+A "nested function" is a function defined inside another function.
+(Nested functions are not supported for GNU C++.)  The nested function's
+name is local to the block where it is defined.  For example, here we
+define a nested function named `square', and call it twice:
+
+     foo (double a, double b)
+     {
+       double square (double z) { return z * z; }
+
+       return square (a) + square (b);
+     }
+
+ The nested function can access all the variables of the containing
+function that are visible at the point of its definition.  This is
+called "lexical scoping".  For example, here we show a nested function
+which uses an inherited variable named `offset':
+
+     bar (int *array, int offset, int size)
+     {
+       int access (int *array, int index)
+         { return array[index + offset]; }
+       int i;
+       /* ... */
+       for (i = 0; i < size; i++)
+         /* ... */ access (array, i) /* ... */
+     }
+
+ Nested function definitions are permitted within functions in the
+places where variable definitions are allowed; that is, in any block,
+mixed with the other declarations and statements in the block.
+
+ It is possible to call the nested function from outside the scope of
+its name by storing its address or passing the address to another
+function:
+
+     hack (int *array, int size)
+     {
+       void store (int index, int value)
+         { array[index] = value; }
+
+       intermediate (store, size);
+     }
+
+ Here, the function `intermediate' receives the address of `store' as
+an argument.  If `intermediate' calls `store', the arguments given to
+`store' are used to store into `array'.  But this technique works only
+so long as the containing function (`hack', in this example) does not
+exit.
+
+ If you try to call the nested function through its address after the
+containing function has exited, all hell will break loose.  If you try
+to call it after a containing scope level has exited, and if it refers
+to some of the variables that are no longer in scope, you may be lucky,
+but it's not wise to take the risk.  If, however, the nested function
+does not refer to anything that has gone out of scope, you should be
+safe.
+
+ GCC implements taking the address of a nested function using a
+technique called "trampolines".  This technique was described in
+`Lexical Closures for C++' (Thomas M. Breuel, USENIX C++ Conference
+Proceedings, October 17-21, 1988).
+
+ A nested function can jump to a label inherited from a containing
+function, provided the label was explicitly declared in the containing
+function (*note Local Labels::).  Such a jump returns instantly to the
+containing function, exiting the nested function which did the `goto'
+and any intermediate functions as well.  Here is an example:
+
+     bar (int *array, int offset, int size)
+     {
+       __label__ failure;
+       int access (int *array, int index)
+         {
+           if (index > size)
+             goto failure;
+           return array[index + offset];
+         }
+       int i;
+       /* ... */
+       for (i = 0; i < size; i++)
+         /* ... */ access (array, i) /* ... */
+       /* ... */
+       return 0;
+
+      /* Control comes here from `access'
+         if it detects an error.  */
+      failure:
+       return -1;
+     }
+
+ A nested function always has no linkage.  Declaring one with `extern'
+or `static' is erroneous.  If you need to declare the nested function
+before its definition, use `auto' (which is otherwise meaningless for
+function declarations).
+
+     bar (int *array, int offset, int size)
+     {
+       __label__ failure;
+       auto int access (int *, int);
+       /* ... */
+       int access (int *array, int index)
+         {
+           if (index > size)
+             goto failure;
+           return array[index + offset];
+         }
+       /* ... */
+     }
+
+
+File: gcc.info,  Node: Constructing Calls,  Next: Typeof,  Prev: Nested Functions,  Up: C Extensions
+
+6.5 Constructing Function Calls
+===============================
+
+Using the built-in functions described below, you can record the
+arguments a function received, and call another function with the same
+arguments, without knowing the number or types of the arguments.
+
+ You can also record the return value of that function call, and later
+return that value, without knowing what data type the function tried to
+return (as long as your caller expects that data type).
+
+ However, these built-in functions may interact badly with some
+sophisticated features or other extensions of the language.  It is,
+therefore, not recommended to use them outside very simple functions
+acting as mere forwarders for their arguments.
+
+ -- Built-in Function: void * __builtin_apply_args ()
+     This built-in function returns a pointer to data describing how to
+     perform a call with the same arguments as were passed to the
+     current function.
+
+     The function saves the arg pointer register, structure value
+     address, and all registers that might be used to pass arguments to
+     a function into a block of memory allocated on the stack.  Then it
+     returns the address of that block.
+
+ -- Built-in Function: void * __builtin_apply (void (*FUNCTION)(), void
+          *ARGUMENTS, size_t SIZE)
+     This built-in function invokes FUNCTION with a copy of the
+     parameters described by ARGUMENTS and SIZE.
+
+     The value of ARGUMENTS should be the value returned by
+     `__builtin_apply_args'.  The argument SIZE specifies the size of
+     the stack argument data, in bytes.
+
+     This function returns a pointer to data describing how to return
+     whatever value was returned by FUNCTION.  The data is saved in a
+     block of memory allocated on the stack.
+
+     It is not always simple to compute the proper value for SIZE.  The
+     value is used by `__builtin_apply' to compute the amount of data
+     that should be pushed on the stack and copied from the incoming
+     argument area.
+
+ -- Built-in Function: void __builtin_return (void *RESULT)
+     This built-in function returns the value described by RESULT from
+     the containing function.  You should specify, for RESULT, a value
+     returned by `__builtin_apply'.
+
+ -- Built-in Function:  __builtin_va_arg_pack ()
+     This built-in function represents all anonymous arguments of an
+     inline function.  It can be used only in inline functions which
+     will be always inlined, never compiled as a separate function,
+     such as those using `__attribute__ ((__always_inline__))' or
+     `__attribute__ ((__gnu_inline__))' extern inline functions.  It
+     must be only passed as last argument to some other function with
+     variable arguments.  This is useful for writing small wrapper
+     inlines for variable argument functions, when using preprocessor
+     macros is undesirable.  For example:
+          extern int myprintf (FILE *f, const char *format, ...);
+          extern inline __attribute__ ((__gnu_inline__)) int
+          myprintf (FILE *f, const char *format, ...)
+          {
+            int r = fprintf (f, "myprintf: ");
+            if (r < 0)
+              return r;
+            int s = fprintf (f, format, __builtin_va_arg_pack ());
+            if (s < 0)
+              return s;
+            return r + s;
+          }
+
+ -- Built-in Function: size_t __builtin_va_arg_pack_len ()
+     This built-in function returns the number of anonymous arguments of
+     an inline function.  It can be used only in inline functions which
+     will be always inlined, never compiled as a separate function, such
+     as those using `__attribute__ ((__always_inline__))' or
+     `__attribute__ ((__gnu_inline__))' extern inline functions.  For
+     example following will do link or runtime checking of open
+     arguments for optimized code:
+          #ifdef __OPTIMIZE__
+          extern inline __attribute__((__gnu_inline__)) int
+          myopen (const char *path, int oflag, ...)
+          {
+            if (__builtin_va_arg_pack_len () > 1)
+              warn_open_too_many_arguments ();
+
+            if (__builtin_constant_p (oflag))
+              {
+                if ((oflag & O_CREAT) != 0 && __builtin_va_arg_pack_len () < 1)
+                  {
+                    warn_open_missing_mode ();
+                    return __open_2 (path, oflag);
+                  }
+                return open (path, oflag, __builtin_va_arg_pack ());
+              }
+
+            if (__builtin_va_arg_pack_len () < 1)
+              return __open_2 (path, oflag);
+
+            return open (path, oflag, __builtin_va_arg_pack ());
+          }
+          #endif
+
+
+File: gcc.info,  Node: Typeof,  Next: Conditionals,  Prev: Constructing Calls,  Up: C Extensions
+
+6.6 Referring to a Type with `typeof'
+=====================================
+
+Another way to refer to the type of an expression is with `typeof'.
+The syntax of using of this keyword looks like `sizeof', but the
+construct acts semantically like a type name defined with `typedef'.
+
+ There are two ways of writing the argument to `typeof': with an
+expression or with a type.  Here is an example with an expression:
+
+     typeof (x[0](1))
+
+This assumes that `x' is an array of pointers to functions; the type
+described is that of the values of the functions.
+
+ Here is an example with a typename as the argument:
+
+     typeof (int *)
+
+Here the type described is that of pointers to `int'.
+
+ If you are writing a header file that must work when included in ISO C
+programs, write `__typeof__' instead of `typeof'.  *Note Alternate
+Keywords::.
+
+ A `typeof'-construct can be used anywhere a typedef name could be
+used.  For example, you can use it in a declaration, in a cast, or
+inside of `sizeof' or `typeof'.
+
+ The operand of `typeof' is evaluated for its side effects if and only
+if it is an expression of variably modified type or the name of such a
+type.
+
+ `typeof' is often useful in conjunction with the
+statements-within-expressions feature.  Here is how the two together can
+be used to define a safe "maximum" macro that operates on any
+arithmetic type and evaluates each of its arguments exactly once:
+
+     #define max(a,b) \
+       ({ typeof (a) _a = (a); \
+           typeof (b) _b = (b); \
+         _a > _b ? _a : _b; })
+
+ The reason for using names that start with underscores for the local
+variables is to avoid conflicts with variable names that occur within
+the expressions that are substituted for `a' and `b'.  Eventually we
+hope to design a new form of declaration syntax that allows you to
+declare variables whose scopes start only after their initializers;
+this will be a more reliable way to prevent such conflicts.
+
+Some more examples of the use of `typeof':
+
+   * This declares `y' with the type of what `x' points to.
+
+          typeof (*x) y;
+
+   * This declares `y' as an array of such values.
+
+          typeof (*x) y[4];
+
+   * This declares `y' as an array of pointers to characters:
+
+          typeof (typeof (char *)[4]) y;
+
+     It is equivalent to the following traditional C declaration:
+
+          char *y[4];
+
+     To see the meaning of the declaration using `typeof', and why it
+     might be a useful way to write, rewrite it with these macros:
+
+          #define pointer(T)  typeof(T *)
+          #define array(T, N) typeof(T [N])
+
+     Now the declaration can be rewritten this way:
+
+          array (pointer (char), 4) y;
+
+     Thus, `array (pointer (char), 4)' is the type of arrays of 4
+     pointers to `char'.
+
+ _Compatibility Note:_ In addition to `typeof', GCC 2 supported a more
+limited extension which permitted one to write
+
+     typedef T = EXPR;
+
+with the effect of declaring T to have the type of the expression EXPR.
+This extension does not work with GCC 3 (versions between 3.0 and 3.2
+will crash; 3.2.1 and later give an error).  Code which relies on it
+should be rewritten to use `typeof':
+
+     typedef typeof(EXPR) T;
+
+This will work with all versions of GCC.
+
+
+File: gcc.info,  Node: Conditionals,  Next: Long Long,  Prev: Typeof,  Up: C Extensions
+
+6.7 Conditionals with Omitted Operands
+======================================
+
+The middle operand in a conditional expression may be omitted.  Then if
+the first operand is nonzero, its value is the value of the conditional
+expression.
+
+ Therefore, the expression
+
+     x ? : y
+
+has the value of `x' if that is nonzero; otherwise, the value of `y'.
+
+ This example is perfectly equivalent to
+
+     x ? x : y
+
+In this simple case, the ability to omit the middle operand is not
+especially useful.  When it becomes useful is when the first operand
+does, or may (if it is a macro argument), contain a side effect.  Then
+repeating the operand in the middle would perform the side effect
+twice.  Omitting the middle operand uses the value already computed
+without the undesirable effects of recomputing it.
+
+
+File: gcc.info,  Node: __int128,  Next: Complex,  Prev: Long Long,  Up: C Extensions
+
+6.8 128-bits integers
+=====================
+
+As an extension the integer scalar type `__int128' is supported for
+targets having an integer mode wide enough to hold 128-bit.  Simply
+write `__int128' for a signed 128-bit integer, or `unsigned __int128'
+for an unsigned 128-bit integer.  There is no support in GCC to express
+an integer constant of type `__int128' for targets having `long long'
+integer with less then 128 bit width.
+
+
+File: gcc.info,  Node: Long Long,  Next: __int128,  Prev: Conditionals,  Up: C Extensions
+
+6.9 Double-Word Integers
+========================
+
+ISO C99 supports data types for integers that are at least 64 bits wide,
+and as an extension GCC supports them in C90 mode and in C++.  Simply
+write `long long int' for a signed integer, or `unsigned long long int'
+for an unsigned integer.  To make an integer constant of type `long
+long int', add the suffix `LL' to the integer.  To make an integer
+constant of type `unsigned long long int', add the suffix `ULL' to the
+integer.
+
+ You can use these types in arithmetic like any other integer types.
+Addition, subtraction, and bitwise boolean operations on these types
+are open-coded on all types of machines.  Multiplication is open-coded
+if the machine supports fullword-to-doubleword a widening multiply
+instruction.  Division and shifts are open-coded only on machines that
+provide special support.  The operations that are not open-coded use
+special library routines that come with GCC.
+
+ There may be pitfalls when you use `long long' types for function
+arguments, unless you declare function prototypes.  If a function
+expects type `int' for its argument, and you pass a value of type `long
+long int', confusion will result because the caller and the subroutine
+will disagree about the number of bytes for the argument.  Likewise, if
+the function expects `long long int' and you pass `int'.  The best way
+to avoid such problems is to use prototypes.
+
+
+File: gcc.info,  Node: Complex,  Next: Floating Types,  Prev: __int128,  Up: C Extensions
+
+6.10 Complex Numbers
+====================
+
+ISO C99 supports complex floating data types, and as an extension GCC
+supports them in C90 mode and in C++, and supports complex integer data
+types which are not part of ISO C99.  You can declare complex types
+using the keyword `_Complex'.  As an extension, the older GNU keyword
+`__complex__' is also supported.
+
+ For example, `_Complex double x;' declares `x' as a variable whose
+real part and imaginary part are both of type `double'.  `_Complex
+short int y;' declares `y' to have real and imaginary parts of type
+`short int'; this is not likely to be useful, but it shows that the set
+of complex types is complete.
+
+ To write a constant with a complex data type, use the suffix `i' or
+`j' (either one; they are equivalent).  For example, `2.5fi' has type
+`_Complex float' and `3i' has type `_Complex int'.  Such a constant
+always has a pure imaginary value, but you can form any complex value
+you like by adding one to a real constant.  This is a GNU extension; if
+you have an ISO C99 conforming C library (such as GNU libc), and want
+to construct complex constants of floating type, you should include
+`<complex.h>' and use the macros `I' or `_Complex_I' instead.
+
+ To extract the real part of a complex-valued expression EXP, write
+`__real__ EXP'.  Likewise, use `__imag__' to extract the imaginary
+part.  This is a GNU extension; for values of floating type, you should
+use the ISO C99 functions `crealf', `creal', `creall', `cimagf',
+`cimag' and `cimagl', declared in `<complex.h>' and also provided as
+built-in functions by GCC.
+
+ The operator `~' performs complex conjugation when used on a value
+with a complex type.  This is a GNU extension; for values of floating
+type, you should use the ISO C99 functions `conjf', `conj' and `conjl',
+declared in `<complex.h>' and also provided as built-in functions by
+GCC.
+
+ GCC can allocate complex automatic variables in a noncontiguous
+fashion; it's even possible for the real part to be in a register while
+the imaginary part is on the stack (or vice-versa).  Only the DWARF2
+debug info format can represent this, so use of DWARF2 is recommended.
+If you are using the stabs debug info format, GCC describes a
+noncontiguous complex variable as if it were two separate variables of
+noncomplex type.  If the variable's actual name is `foo', the two
+fictitious variables are named `foo$real' and `foo$imag'.  You can
+examine and set these two fictitious variables with your debugger.
+
+
+File: gcc.info,  Node: Floating Types,  Next: Half-Precision,  Prev: Complex,  Up: C Extensions
+
+6.11 Additional Floating Types
+==============================
+
+As an extension, the GNU C compiler supports additional floating types,
+`__float80' and `__float128' to support 80bit (`XFmode') and 128 bit
+(`TFmode') floating types.  Support for additional types includes the
+arithmetic operators: add, subtract, multiply, divide; unary arithmetic
+operators; relational operators; equality operators; and conversions to
+and from integer and other floating types.  Use a suffix `w' or `W' in
+a literal constant of type `__float80' and `q' or `Q' for `_float128'.
+You can declare complex types using the corresponding internal complex
+type, `XCmode' for `__float80' type and `TCmode' for `__float128' type:
+
+     typedef _Complex float __attribute__((mode(TC))) _Complex128;
+     typedef _Complex float __attribute__((mode(XC))) _Complex80;
+
+ Not all targets support additional floating point types.  `__float80'
+and `__float128' types are supported on i386, x86_64 and ia64 targets.
+The `__float128' type is supported on hppa HP-UX targets.
+
+
+File: gcc.info,  Node: Half-Precision,  Next: Decimal Float,  Prev: Floating Types,  Up: C Extensions
+
+6.12 Half-Precision Floating Point
+==================================
+
+On ARM targets, GCC supports half-precision (16-bit) floating point via
+the `__fp16' type.  You must enable this type explicitly with the
+`-mfp16-format' command-line option in order to use it.
+
+ ARM supports two incompatible representations for half-precision
+floating-point values.  You must choose one of the representations and
+use it consistently in your program.
+
+ Specifying `-mfp16-format=ieee' selects the IEEE 754-2008 format.
+This format can represent normalized values in the range of 2^-14 to
+65504.  There are 11 bits of significand precision, approximately 3
+decimal digits.
+
+ Specifying `-mfp16-format=alternative' selects the ARM alternative
+format.  This representation is similar to the IEEE format, but does
+not support infinities or NaNs.  Instead, the range of exponents is
+extended, so that this format can represent normalized values in the
+range of 2^-14 to 131008.
+
+ The `__fp16' type is a storage format only.  For purposes of
+arithmetic and other operations, `__fp16' values in C or C++
+expressions are automatically promoted to `float'.  In addition, you
+cannot declare a function with a return value or parameters of type
+`__fp16'.
+
+ Note that conversions from `double' to `__fp16' involve an
+intermediate conversion to `float'.  Because of rounding, this can
+sometimes produce a different result than a direct conversion.
+
+ ARM provides hardware support for conversions between `__fp16' and
+`float' values as an extension to VFP and NEON (Advanced SIMD).  GCC
+generates code using these hardware instructions if you compile with
+options to select an FPU that provides them; for example,
+`-mfpu=neon-fp16 -mfloat-abi=softfp', in addition to the
+`-mfp16-format' option to select a half-precision format.
+
+ Language-level support for the `__fp16' data type is independent of
+whether GCC generates code using hardware floating-point instructions.
+In cases where hardware support is not specified, GCC implements
+conversions between `__fp16' and `float' values as library calls.
+
+
+File: gcc.info,  Node: Decimal Float,  Next: Hex Floats,  Prev: Half-Precision,  Up: C Extensions
+
+6.13 Decimal Floating Types
+===========================
+
+As an extension, the GNU C compiler supports decimal floating types as
+defined in the N1312 draft of ISO/IEC WDTR24732.  Support for decimal
+floating types in GCC will evolve as the draft technical report changes.
+Calling conventions for any target might also change.  Not all targets
+support decimal floating types.
+
+ The decimal floating types are `_Decimal32', `_Decimal64', and
+`_Decimal128'.  They use a radix of ten, unlike the floating types
+`float', `double', and `long double' whose radix is not specified by
+the C standard but is usually two.
+
+ Support for decimal floating types includes the arithmetic operators
+add, subtract, multiply, divide; unary arithmetic operators; relational
+operators; equality operators; and conversions to and from integer and
+other floating types.  Use a suffix `df' or `DF' in a literal constant
+of type `_Decimal32', `dd' or `DD' for `_Decimal64', and `dl' or `DL'
+for `_Decimal128'.
+
+ GCC support of decimal float as specified by the draft technical report
+is incomplete:
+
+   * When the value of a decimal floating type cannot be represented in
+     the integer type to which it is being converted, the result is
+     undefined rather than the result value specified by the draft
+     technical report.
+
+   * GCC does not provide the C library functionality associated with
+     `math.h', `fenv.h', `stdio.h', `stdlib.h', and `wchar.h', which
+     must come from a separate C library implementation.  Because of
+     this the GNU C compiler does not define macro `__STDC_DEC_FP__' to
+     indicate that the implementation conforms to the technical report.
+
+ Types `_Decimal32', `_Decimal64', and `_Decimal128' are supported by
+the DWARF2 debug information format.
+
+
+File: gcc.info,  Node: Hex Floats,  Next: Fixed-Point,  Prev: Decimal Float,  Up: C Extensions
+
+6.14 Hex Floats
+===============
+
+ISO C99 supports floating-point numbers written not only in the usual
+decimal notation, such as `1.55e1', but also numbers such as `0x1.fp3'
+written in hexadecimal format.  As a GNU extension, GCC supports this
+in C90 mode (except in some cases when strictly conforming) and in C++.
+In that format the `0x' hex introducer and the `p' or `P' exponent
+field are mandatory.  The exponent is a decimal number that indicates
+the power of 2 by which the significant part will be multiplied.  Thus
+`0x1.f' is 1 15/16, `p3' multiplies it by 8, and the value of `0x1.fp3'
+is the same as `1.55e1'.
+
+ Unlike for floating-point numbers in the decimal notation the exponent
+is always required in the hexadecimal notation.  Otherwise the compiler
+would not be able to resolve the ambiguity of, e.g., `0x1.f'.  This
+could mean `1.0f' or `1.9375' since `f' is also the extension for
+floating-point constants of type `float'.
+
+
+File: gcc.info,  Node: Fixed-Point,  Next: Named Address Spaces,  Prev: Hex Floats,  Up: C Extensions
+
+6.15 Fixed-Point Types
+======================
+
+As an extension, the GNU C compiler supports fixed-point types as
+defined in the N1169 draft of ISO/IEC DTR 18037.  Support for
+fixed-point types in GCC will evolve as the draft technical report
+changes.  Calling conventions for any target might also change.  Not
+all targets support fixed-point types.
+
+ The fixed-point types are `short _Fract', `_Fract', `long _Fract',
+`long long _Fract', `unsigned short _Fract', `unsigned _Fract',
+`unsigned long _Fract', `unsigned long long _Fract', `_Sat short
+_Fract', `_Sat _Fract', `_Sat long _Fract', `_Sat long long _Fract',
+`_Sat unsigned short _Fract', `_Sat unsigned _Fract', `_Sat unsigned
+long _Fract', `_Sat unsigned long long _Fract', `short _Accum',
+`_Accum', `long _Accum', `long long _Accum', `unsigned short _Accum',
+`unsigned _Accum', `unsigned long _Accum', `unsigned long long _Accum',
+`_Sat short _Accum', `_Sat _Accum', `_Sat long _Accum', `_Sat long long
+_Accum', `_Sat unsigned short _Accum', `_Sat unsigned _Accum', `_Sat
+unsigned long _Accum', `_Sat unsigned long long _Accum'.
+
+ Fixed-point data values contain fractional and optional integral parts.
+The format of fixed-point data varies and depends on the target machine.
+
+ Support for fixed-point types includes:
+   * prefix and postfix increment and decrement operators (`++', `--')
+
+   * unary arithmetic operators (`+', `-', `!')
+
+   * binary arithmetic operators (`+', `-', `*', `/')
+
+   * binary shift operators (`<<', `>>')
+
+   * relational operators (`<', `<=', `>=', `>')
+
+   * equality operators (`==', `!=')
+
+   * assignment operators (`+=', `-=', `*=', `/=', `<<=', `>>=')
+
+   * conversions to and from integer, floating-point, or fixed-point
+     types
+
+ Use a suffix in a fixed-point literal constant:
+   * `hr' or `HR' for `short _Fract' and `_Sat short _Fract'
+
+   * `r' or `R' for `_Fract' and `_Sat _Fract'
+
+   * `lr' or `LR' for `long _Fract' and `_Sat long _Fract'
+
+   * `llr' or `LLR' for `long long _Fract' and `_Sat long long _Fract'
+
+   * `uhr' or `UHR' for `unsigned short _Fract' and `_Sat unsigned
+     short _Fract'
+
+   * `ur' or `UR' for `unsigned _Fract' and `_Sat unsigned _Fract'
+
+   * `ulr' or `ULR' for `unsigned long _Fract' and `_Sat unsigned long
+     _Fract'
+
+   * `ullr' or `ULLR' for `unsigned long long _Fract' and `_Sat
+     unsigned long long _Fract'
+
+   * `hk' or `HK' for `short _Accum' and `_Sat short _Accum'
+
+   * `k' or `K' for `_Accum' and `_Sat _Accum'
+
+   * `lk' or `LK' for `long _Accum' and `_Sat long _Accum'
+
+   * `llk' or `LLK' for `long long _Accum' and `_Sat long long _Accum'
+
+   * `uhk' or `UHK' for `unsigned short _Accum' and `_Sat unsigned
+     short _Accum'
+
+   * `uk' or `UK' for `unsigned _Accum' and `_Sat unsigned _Accum'
+
+   * `ulk' or `ULK' for `unsigned long _Accum' and `_Sat unsigned long
+     _Accum'
+
+   * `ullk' or `ULLK' for `unsigned long long _Accum' and `_Sat
+     unsigned long long _Accum'
+
+ GCC support of fixed-point types as specified by the draft technical
+report is incomplete:
+
+   * Pragmas to control overflow and rounding behaviors are not
+     implemented.
+
+ Fixed-point types are supported by the DWARF2 debug information format.
+
+
+File: gcc.info,  Node: Named Address Spaces,  Next: Zero Length,  Prev: Fixed-Point,  Up: C Extensions
+
+6.16 Named address spaces
+=========================
+
+As an extension, the GNU C compiler supports named address spaces as
+defined in the N1275 draft of ISO/IEC DTR 18037.  Support for named
+address spaces in GCC will evolve as the draft technical report changes.
+Calling conventions for any target might also change.  At present, only
+the SPU and M32C targets support other address spaces.  On the SPU
+target, for example, variables may be declared as belonging to another
+address space by qualifying the type with the `__ea' address space
+identifier:
+
+     extern int __ea i;
+
+ When the variable `i' is accessed, the compiler will generate special
+code to access this variable.  It may use runtime library support, or
+generate special machine instructions to access that address space.
+
+ The `__ea' identifier may be used exactly like any other C type
+qualifier (e.g., `const' or `volatile').  See the N1275 document for
+more details.
+
+ On the M32C target, with the R8C and M16C cpu variants, variables
+qualified with `__far' are accessed using 32-bit addresses in order to
+access memory beyond the first 64k bytes.  If `__far' is used with the
+M32CM or M32C cpu variants, it has no effect.
+
+
+File: gcc.info,  Node: Zero Length,  Next: Variable Length,  Prev: Named Address Spaces,  Up: C Extensions
+
+6.17 Arrays of Length Zero
+==========================
+
+Zero-length arrays are allowed in GNU C.  They are very useful as the
+last element of a structure which is really a header for a
+variable-length object:
+
+     struct line {
+       int length;
+       char contents[0];
+     };
+
+     struct line *thisline = (struct line *)
+       malloc (sizeof (struct line) + this_length);
+     thisline->length = this_length;
+
+ In ISO C90, you would have to give `contents' a length of 1, which
+means either you waste space or complicate the argument to `malloc'.
+
+ In ISO C99, you would use a "flexible array member", which is slightly
+different in syntax and semantics:
+
+   * Flexible array members are written as `contents[]' without the `0'.
+
+   * Flexible array members have incomplete type, and so the `sizeof'
+     operator may not be applied.  As a quirk of the original
+     implementation of zero-length arrays, `sizeof' evaluates to zero.
+
+   * Flexible array members may only appear as the last member of a
+     `struct' that is otherwise non-empty.
+
+   * A structure containing a flexible array member, or a union
+     containing such a structure (possibly recursively), may not be a
+     member of a structure or an element of an array.  (However, these
+     uses are permitted by GCC as extensions.)
+
+ GCC versions before 3.0 allowed zero-length arrays to be statically
+initialized, as if they were flexible arrays.  In addition to those
+cases that were useful, it also allowed initializations in situations
+that would corrupt later data.  Non-empty initialization of zero-length
+arrays is now treated like any case where there are more initializer
+elements than the array holds, in that a suitable warning about "excess
+elements in array" is given, and the excess elements (all of them, in
+this case) are ignored.
+
+ Instead GCC allows static initialization of flexible array members.
+This is equivalent to defining a new structure containing the original
+structure followed by an array of sufficient size to contain the data.
+I.e. in the following, `f1' is constructed as if it were declared like
+`f2'.
+
+     struct f1 {
+       int x; int y[];
+     } f1 = { 1, { 2, 3, 4 } };
+
+     struct f2 {
+       struct f1 f1; int data[3];
+     } f2 = { { 1 }, { 2, 3, 4 } };
+
+The convenience of this extension is that `f1' has the desired type,
+eliminating the need to consistently refer to `f2.f1'.
+
+ This has symmetry with normal static arrays, in that an array of
+unknown size is also written with `[]'.
+
+ Of course, this extension only makes sense if the extra data comes at
+the end of a top-level object, as otherwise we would be overwriting
+data at subsequent offsets.  To avoid undue complication and confusion
+with initialization of deeply nested arrays, we simply disallow any
+non-empty initialization except when the structure is the top-level
+object.  For example:
+
+     struct foo { int x; int y[]; };
+     struct bar { struct foo z; };
+
+     struct foo a = { 1, { 2, 3, 4 } };        // Valid.
+     struct bar b = { { 1, { 2, 3, 4 } } };    // Invalid.
+     struct bar c = { { 1, { } } };            // Valid.
+     struct foo d[1] = { { 1 { 2, 3, 4 } } };  // Invalid.
+
+
+File: gcc.info,  Node: Empty Structures,  Next: Variadic Macros,  Prev: Variable Length,  Up: C Extensions
+
+6.18 Structures With No Members
+===============================
+
+GCC permits a C structure to have no members:
+
+     struct empty {
+     };
+
+ The structure will have size zero.  In C++, empty structures are part
+of the language.  G++ treats empty structures as if they had a single
+member of type `char'.
+
+
+File: gcc.info,  Node: Variable Length,  Next: Empty Structures,  Prev: Zero Length,  Up: C Extensions
+
+6.19 Arrays of Variable Length
+==============================
+
+Variable-length automatic arrays are allowed in ISO C99, and as an
+extension GCC accepts them in C90 mode and in C++.  These arrays are
+declared like any other automatic arrays, but with a length that is not
+a constant expression.  The storage is allocated at the point of
+declaration and deallocated when the brace-level is exited.  For
+example:
+
+     FILE *
+     concat_fopen (char *s1, char *s2, char *mode)
+     {
+       char str[strlen (s1) + strlen (s2) + 1];
+       strcpy (str, s1);
+       strcat (str, s2);
+       return fopen (str, mode);
+     }
+
+ Jumping or breaking out of the scope of the array name deallocates the
+storage.  Jumping into the scope is not allowed; you get an error
+message for it.
+
+ You can use the function `alloca' to get an effect much like
+variable-length arrays.  The function `alloca' is available in many
+other C implementations (but not in all).  On the other hand,
+variable-length arrays are more elegant.
+
+ There are other differences between these two methods.  Space allocated
+with `alloca' exists until the containing _function_ returns.  The
+space for a variable-length array is deallocated as soon as the array
+name's scope ends.  (If you use both variable-length arrays and
+`alloca' in the same function, deallocation of a variable-length array
+will also deallocate anything more recently allocated with `alloca'.)
+
+ You can also use variable-length arrays as arguments to functions:
+
+     struct entry
+     tester (int len, char data[len][len])
+     {
+       /* ... */
+     }
+
+ The length of an array is computed once when the storage is allocated
+and is remembered for the scope of the array in case you access it with
+`sizeof'.
+
+ If you want to pass the array first and the length afterward, you can
+use a forward declaration in the parameter list--another GNU extension.
+
+     struct entry
+     tester (int len; char data[len][len], int len)
+     {
+       /* ... */
+     }
+
+ The `int len' before the semicolon is a "parameter forward
+declaration", and it serves the purpose of making the name `len' known
+when the declaration of `data' is parsed.
+
+ You can write any number of such parameter forward declarations in the
+parameter list.  They can be separated by commas or semicolons, but the
+last one must end with a semicolon, which is followed by the "real"
+parameter declarations.  Each forward declaration must match a "real"
+declaration in parameter name and data type.  ISO C99 does not support
+parameter forward declarations.
+
+
+File: gcc.info,  Node: Variadic Macros,  Next: Escaped Newlines,  Prev: Empty Structures,  Up: C Extensions
+
+6.20 Macros with a Variable Number of Arguments.
+================================================
+
+In the ISO C standard of 1999, a macro can be declared to accept a
+variable number of arguments much as a function can.  The syntax for
+defining the macro is similar to that of a function.  Here is an
+example:
+
+     #define debug(format, ...) fprintf (stderr, format, __VA_ARGS__)
+
+ Here `...' is a "variable argument".  In the invocation of such a
+macro, it represents the zero or more tokens until the closing
+parenthesis that ends the invocation, including any commas.  This set of
+tokens replaces the identifier `__VA_ARGS__' in the macro body wherever
+it appears.  See the CPP manual for more information.
+
+ GCC has long supported variadic macros, and used a different syntax
+that allowed you to give a name to the variable arguments just like any
+other argument.  Here is an example:
+
+     #define debug(format, args...) fprintf (stderr, format, args)
+
+ This is in all ways equivalent to the ISO C example above, but arguably
+more readable and descriptive.
+
+ GNU CPP has two further variadic macro extensions, and permits them to
+be used with either of the above forms of macro definition.
+
+ In standard C, you are not allowed to leave the variable argument out
+entirely; but you are allowed to pass an empty argument.  For example,
+this invocation is invalid in ISO C, because there is no comma after
+the string:
+
+     debug ("A message")
+
+ GNU CPP permits you to completely omit the variable arguments in this
+way.  In the above examples, the compiler would complain, though since
+the expansion of the macro still has the extra comma after the format
+string.
+
+ To help solve this problem, CPP behaves specially for variable
+arguments used with the token paste operator, `##'.  If instead you
+write
+
+     #define debug(format, ...) fprintf (stderr, format, ## __VA_ARGS__)
+
+ and if the variable arguments are omitted or empty, the `##' operator
+causes the preprocessor to remove the comma before it.  If you do
+provide some variable arguments in your macro invocation, GNU CPP does
+not complain about the paste operation and instead places the variable
+arguments after the comma.  Just like any other pasted macro argument,
+these arguments are not macro expanded.
+
+
+File: gcc.info,  Node: Escaped Newlines,  Next: Subscripting,  Prev: Variadic Macros,  Up: C Extensions
+
+6.21 Slightly Looser Rules for Escaped Newlines
+===============================================
+
+Recently, the preprocessor has relaxed its treatment of escaped
+newlines.  Previously, the newline had to immediately follow a
+backslash.  The current implementation allows whitespace in the form of
+spaces, horizontal and vertical tabs, and form feeds between the
+backslash and the subsequent newline.  The preprocessor issues a
+warning, but treats it as a valid escaped newline and combines the two
+lines to form a single logical line.  This works within comments and
+tokens, as well as between tokens.  Comments are _not_ treated as
+whitespace for the purposes of this relaxation, since they have not yet
+been replaced with spaces.
+
+
+File: gcc.info,  Node: Subscripting,  Next: Pointer Arith,  Prev: Escaped Newlines,  Up: C Extensions
+
+6.22 Non-Lvalue Arrays May Have Subscripts
+==========================================
+
+In ISO C99, arrays that are not lvalues still decay to pointers, and
+may be subscripted, although they may not be modified or used after the
+next sequence point and the unary `&' operator may not be applied to
+them.  As an extension, GCC allows such arrays to be subscripted in C90
+mode, though otherwise they do not decay to pointers outside C99 mode.
+For example, this is valid in GNU C though not valid in C90:
+
+     struct foo {int a[4];};
+
+     struct foo f();
+
+     bar (int index)
+     {
+       return f().a[index];
+     }
+
+
+File: gcc.info,  Node: Pointer Arith,  Next: Initializers,  Prev: Subscripting,  Up: C Extensions
+
+6.23 Arithmetic on `void'- and Function-Pointers
+================================================
+
+In GNU C, addition and subtraction operations are supported on pointers
+to `void' and on pointers to functions.  This is done by treating the
+size of a `void' or of a function as 1.
+
+ A consequence of this is that `sizeof' is also allowed on `void' and
+on function types, and returns 1.
+
+ The option `-Wpointer-arith' requests a warning if these extensions
+are used.
+
+
+File: gcc.info,  Node: Initializers,  Next: Compound Literals,  Prev: Pointer Arith,  Up: C Extensions
+
+6.24 Non-Constant Initializers
+==============================
+
+As in standard C++ and ISO C99, the elements of an aggregate
+initializer for an automatic variable are not required to be constant
+expressions in GNU C.  Here is an example of an initializer with
+run-time varying elements:
+
+     foo (float f, float g)
+     {
+       float beat_freqs[2] = { f-g, f+g };
+       /* ... */
+     }
+
+
+File: gcc.info,  Node: Compound Literals,  Next: Designated Inits,  Prev: Initializers,  Up: C Extensions
+
+6.25 Compound Literals
+======================
+
+ISO C99 supports compound literals.  A compound literal looks like a
+cast containing an initializer.  Its value is an object of the type
+specified in the cast, containing the elements specified in the
+initializer; it is an lvalue.  As an extension, GCC supports compound
+literals in C90 mode and in C++.
+
+ Usually, the specified type is a structure.  Assume that `struct foo'
+and `structure' are declared as shown:
+
+     struct foo {int a; char b[2];} structure;
+
+Here is an example of constructing a `struct foo' with a compound
+literal:
+
+     structure = ((struct foo) {x + y, 'a', 0});
+
+This is equivalent to writing the following:
+
+     {
+       struct foo temp = {x + y, 'a', 0};
+       structure = temp;
+     }
+
+ You can also construct an array.  If all the elements of the compound
+literal are (made up of) simple constant expressions, suitable for use
+in initializers of objects of static storage duration, then the compound
+literal can be coerced to a pointer to its first element and used in
+such an initializer, as shown here:
+
+     char **foo = (char *[]) { "x", "y", "z" };
+
+ Compound literals for scalar types and union types are is also
+allowed, but then the compound literal is equivalent to a cast.
+
+ As a GNU extension, GCC allows initialization of objects with static
+storage duration by compound literals (which is not possible in ISO
+C99, because the initializer is not a constant).  It is handled as if
+the object was initialized only with the bracket enclosed list if the
+types of the compound literal and the object match.  The initializer
+list of the compound literal must be constant.  If the object being
+initialized has array type of unknown size, the size is determined by
+compound literal size.
+
+     static struct foo x = (struct foo) {1, 'a', 'b'};
+     static int y[] = (int []) {1, 2, 3};
+     static int z[] = (int [3]) {1};
+
+The above lines are equivalent to the following:
+     static struct foo x = {1, 'a', 'b'};
+     static int y[] = {1, 2, 3};
+     static int z[] = {1, 0, 0};
+
+
+File: gcc.info,  Node: Designated Inits,  Next: Cast to Union,  Prev: Compound Literals,  Up: C Extensions
+
+6.26 Designated Initializers
+============================
+
+Standard C90 requires the elements of an initializer to appear in a
+fixed order, the same as the order of the elements in the array or
+structure being initialized.
+
+ In ISO C99 you can give the elements in any order, specifying the array
+indices or structure field names they apply to, and GNU C allows this as
+an extension in C90 mode as well.  This extension is not implemented in
+GNU C++.
+
+ To specify an array index, write `[INDEX] =' before the element value.
+For example,
+
+     int a[6] = { [4] = 29, [2] = 15 };
+
+is equivalent to
+
+     int a[6] = { 0, 0, 15, 0, 29, 0 };
+
+The index values must be constant expressions, even if the array being
+initialized is automatic.
+
+ An alternative syntax for this which has been obsolete since GCC 2.5
+but GCC still accepts is to write `[INDEX]' before the element value,
+with no `='.
+
+ To initialize a range of elements to the same value, write `[FIRST ...
+LAST] = VALUE'.  This is a GNU extension.  For example,
+
+     int widths[] = { [0 ... 9] = 1, [10 ... 99] = 2, [100] = 3 };
+
+If the value in it has side-effects, the side-effects will happen only
+once, not for each initialized field by the range initializer.
+
+Note that the length of the array is the highest value specified plus
+one.
+
+ In a structure initializer, specify the name of a field to initialize
+with `.FIELDNAME =' before the element value.  For example, given the
+following structure,
+
+     struct point { int x, y; };
+
+the following initialization
+
+     struct point p = { .y = yvalue, .x = xvalue };
+
+is equivalent to
+
+     struct point p = { xvalue, yvalue };
+
+ Another syntax which has the same meaning, obsolete since GCC 2.5, is
+`FIELDNAME:', as shown here:
+
+     struct point p = { y: yvalue, x: xvalue };
+
+ The `[INDEX]' or `.FIELDNAME' is known as a "designator".  You can
+also use a designator (or the obsolete colon syntax) when initializing
+a union, to specify which element of the union should be used.  For
+example,
+
+     union foo { int i; double d; };
+
+     union foo f = { .d = 4 };
+
+will convert 4 to a `double' to store it in the union using the second
+element.  By contrast, casting 4 to type `union foo' would store it
+into the union as the integer `i', since it is an integer.  (*Note Cast
+to Union::.)
+
+ You can combine this technique of naming elements with ordinary C
+initialization of successive elements.  Each initializer element that
+does not have a designator applies to the next consecutive element of
+the array or structure.  For example,
+
+     int a[6] = { [1] = v1, v2, [4] = v4 };
+
+is equivalent to
+
+     int a[6] = { 0, v1, v2, 0, v4, 0 };
+
+ Labeling the elements of an array initializer is especially useful
+when the indices are characters or belong to an `enum' type.  For
+example:
+
+     int whitespace[256]
+       = { [' '] = 1, ['\t'] = 1, ['\h'] = 1,
+           ['\f'] = 1, ['\n'] = 1, ['\r'] = 1 };
+
+ You can also write a series of `.FIELDNAME' and `[INDEX]' designators
+before an `=' to specify a nested subobject to initialize; the list is
+taken relative to the subobject corresponding to the closest
+surrounding brace pair.  For example, with the `struct point'
+declaration above:
+
+     struct point ptarray[10] = { [2].y = yv2, [2].x = xv2, [0].x = xv0 };
+
+If the same field is initialized multiple times, it will have value from
+the last initialization.  If any such overridden initialization has
+side-effect, it is unspecified whether the side-effect happens or not.
+Currently, GCC will discard them and issue a warning.
+
+
+File: gcc.info,  Node: Case Ranges,  Next: Mixed Declarations,  Prev: Cast to Union,  Up: C Extensions
+
+6.27 Case Ranges
+================
+
+You can specify a range of consecutive values in a single `case' label,
+like this:
+
+     case LOW ... HIGH:
+
+This has the same effect as the proper number of individual `case'
+labels, one for each integer value from LOW to HIGH, inclusive.
+
+ This feature is especially useful for ranges of ASCII character codes:
+
+     case 'A' ... 'Z':
+
+ *Be careful:* Write spaces around the `...', for otherwise it may be
+parsed wrong when you use it with integer values.  For example, write
+this:
+
+     case 1 ... 5:
+
+rather than this:
+
+     case 1...5:
+
+
+File: gcc.info,  Node: Cast to Union,  Next: Case Ranges,  Prev: Designated Inits,  Up: C Extensions
+
+6.28 Cast to a Union Type
+=========================
+
+A cast to union type is similar to other casts, except that the type
+specified is a union type.  You can specify the type either with `union
+TAG' or with a typedef name.  A cast to union is actually a constructor
+though, not a cast, and hence does not yield an lvalue like normal
+casts.  (*Note Compound Literals::.)
+
+ The types that may be cast to the union type are those of the members
+of the union.  Thus, given the following union and variables:
+
+     union foo { int i; double d; };
+     int x;
+     double y;
+
+both `x' and `y' can be cast to type `union foo'.
+
+ Using the cast as the right-hand side of an assignment to a variable of
+union type is equivalent to storing in a member of the union:
+
+     union foo u;
+     /* ... */
+     u = (union foo) x  ==  u.i = x
+     u = (union foo) y  ==  u.d = y
+
+ You can also use the union cast as a function argument:
+
+     void hack (union foo);
+     /* ... */
+     hack ((union foo) x);
+
+
+File: gcc.info,  Node: Mixed Declarations,  Next: Function Attributes,  Prev: Case Ranges,  Up: C Extensions
+
+6.29 Mixed Declarations and Code
+================================
+
+ISO C99 and ISO C++ allow declarations and code to be freely mixed
+within compound statements.  As an extension, GCC also allows this in
+C90 mode.  For example, you could do:
+
+     int i;
+     /* ... */
+     i++;
+     int j = i + 2;
+
+ Each identifier is visible from where it is declared until the end of
+the enclosing block.
+
+
+File: gcc.info,  Node: Function Attributes,  Next: Attribute Syntax,  Prev: Mixed Declarations,  Up: C Extensions
+
+6.30 Declaring Attributes of Functions
+======================================
+
+In GNU C, you declare certain things about functions called in your
+program which help the compiler optimize function calls and check your
+code more carefully.
+
+ The keyword `__attribute__' allows you to specify special attributes
+when making a declaration.  This keyword is followed by an attribute
+specification inside double parentheses.  The following attributes are
+currently defined for functions on all targets: `aligned',
+`alloc_size', `noreturn', `returns_twice', `noinline', `noclone',
+`always_inline', `flatten', `pure', `const', `nothrow', `sentinel',
+`format', `format_arg', `no_instrument_function', `no_split_stack',
+`section', `constructor', `destructor', `used', `unused', `deprecated',
+`weak', `malloc', `alias', `ifunc', `warn_unused_result', `nonnull',
+`gnu_inline', `externally_visible', `hot', `cold', `artificial',
+`error' and `warning'.  Several other attributes are defined for
+functions on particular target systems.  Other attributes, including
+`section' are supported for variables declarations (*note Variable
+Attributes::) and for types (*note Type Attributes::).
+
+ GCC plugins may provide their own attributes.
+
+ You may also specify attributes with `__' preceding and following each
+keyword.  This allows you to use them in header files without being
+concerned about a possible macro of the same name.  For example, you
+may use `__noreturn__' instead of `noreturn'.
+
+ *Note Attribute Syntax::, for details of the exact syntax for using
+attributes.
+
+`alias ("TARGET")'
+     The `alias' attribute causes the declaration to be emitted as an
+     alias for another symbol, which must be specified.  For instance,
+
+          void __f () { /* Do something. */; }
+          void f () __attribute__ ((weak, alias ("__f")));
+
+     defines `f' to be a weak alias for `__f'.  In C++, the mangled
+     name for the target must be used.  It is an error if `__f' is not
+     defined in the same translation unit.
+
+     Not all target machines support this attribute.
+
+`aligned (ALIGNMENT)'
+     This attribute specifies a minimum alignment for the function,
+     measured in bytes.
+
+     You cannot use this attribute to decrease the alignment of a
+     function, only to increase it.  However, when you explicitly
+     specify a function alignment this will override the effect of the
+     `-falign-functions' (*note Optimize Options::) option for this
+     function.
+
+     Note that the effectiveness of `aligned' attributes may be limited
+     by inherent limitations in your linker.  On many systems, the
+     linker is only able to arrange for functions to be aligned up to a
+     certain maximum alignment.  (For some linkers, the maximum
+     supported alignment may be very very small.)  See your linker
+     documentation for further information.
+
+     The `aligned' attribute can also be used for variables and fields
+     (*note Variable Attributes::.)
+
+`alloc_size'
+     The `alloc_size' attribute is used to tell the compiler that the
+     function return value points to memory, where the size is given by
+     one or two of the functions parameters.  GCC uses this information
+     to improve the correctness of `__builtin_object_size'.
+
+     The function parameter(s) denoting the allocated size are
+     specified by one or two integer arguments supplied to the
+     attribute.  The allocated size is either the value of the single
+     function argument specified or the product of the two function
+     arguments specified.  Argument numbering starts at one.
+
+     For instance,
+
+          void* my_calloc(size_t, size_t) __attribute__((alloc_size(1,2)))
+          void my_realloc(void*, size_t) __attribute__((alloc_size(2)))
+
+     declares that my_calloc will return memory of the size given by
+     the product of parameter 1 and 2 and that my_realloc will return
+     memory of the size given by parameter 2.
+
+`always_inline'
+     Generally, functions are not inlined unless optimization is
+     specified.  For functions declared inline, this attribute inlines
+     the function even if no optimization level was specified.
+
+`gnu_inline'
+     This attribute should be used with a function which is also
+     declared with the `inline' keyword.  It directs GCC to treat the
+     function as if it were defined in gnu90 mode even when compiling
+     in C99 or gnu99 mode.
+
+     If the function is declared `extern', then this definition of the
+     function is used only for inlining.  In no case is the function
+     compiled as a standalone function, not even if you take its address
+     explicitly.  Such an address becomes an external reference, as if
+     you had only declared the function, and had not defined it.  This
+     has almost the effect of a macro.  The way to use this is to put a
+     function definition in a header file with this attribute, and put
+     another copy of the function, without `extern', in a library file.
+     The definition in the header file will cause most calls to the
+     function to be inlined.  If any uses of the function remain, they
+     will refer to the single copy in the library.  Note that the two
+     definitions of the functions need not be precisely the same,
+     although if they do not have the same effect your program may
+     behave oddly.
+
+     In C, if the function is neither `extern' nor `static', then the
+     function is compiled as a standalone function, as well as being
+     inlined where possible.
+
+     This is how GCC traditionally handled functions declared `inline'.
+     Since ISO C99 specifies a different semantics for `inline', this
+     function attribute is provided as a transition measure and as a
+     useful feature in its own right.  This attribute is available in
+     GCC 4.1.3 and later.  It is available if either of the
+     preprocessor macros `__GNUC_GNU_INLINE__' or
+     `__GNUC_STDC_INLINE__' are defined.  *Note An Inline Function is
+     As Fast As a Macro: Inline.
+
+     In C++, this attribute does not depend on `extern' in any way, but
+     it still requires the `inline' keyword to enable its special
+     behavior.
+
+`artificial'
+     This attribute is useful for small inline wrappers which if
+     possible should appear during debugging as a unit, depending on
+     the debug info format it will either mean marking the function as
+     artificial or using the caller location for all instructions
+     within the inlined body.
+
+`bank_switch'
+     When added to an interrupt handler with the M32C port, causes the
+     prologue and epilogue to use bank switching to preserve the
+     registers rather than saving them on the stack.
+
+`flatten'
+     Generally, inlining into a function is limited.  For a function
+     marked with this attribute, every call inside this function will
+     be inlined, if possible.  Whether the function itself is
+     considered for inlining depends on its size and the current
+     inlining parameters.
+
+`error ("MESSAGE")'
+     If this attribute is used on a function declaration and a call to
+     such a function is not eliminated through dead code elimination or
+     other optimizations, an error which will include MESSAGE will be
+     diagnosed.  This is useful for compile time checking, especially
+     together with `__builtin_constant_p' and inline functions where
+     checking the inline function arguments is not possible through
+     `extern char [(condition) ? 1 : -1];' tricks.  While it is
+     possible to leave the function undefined and thus invoke a link
+     failure, when using this attribute the problem will be diagnosed
+     earlier and with exact location of the call even in presence of
+     inline functions or when not emitting debugging information.
+
+`warning ("MESSAGE")'
+     If this attribute is used on a function declaration and a call to
+     such a function is not eliminated through dead code elimination or
+     other optimizations, a warning which will include MESSAGE will be
+     diagnosed.  This is useful for compile time checking, especially
+     together with `__builtin_constant_p' and inline functions.  While
+     it is possible to define the function with a message in
+     `.gnu.warning*' section, when using this attribute the problem
+     will be diagnosed earlier and with exact location of the call even
+     in presence of inline functions or when not emitting debugging
+     information.
+
+`cdecl'
+     On the Intel 386, the `cdecl' attribute causes the compiler to
+     assume that the calling function will pop off the stack space used
+     to pass arguments.  This is useful to override the effects of the
+     `-mrtd' switch.
+
+`const'
+     Many functions do not examine any values except their arguments,
+     and have no effects except the return value.  Basically this is
+     just slightly more strict class than the `pure' attribute below,
+     since function is not allowed to read global memory.
+
+     Note that a function that has pointer arguments and examines the
+     data pointed to must _not_ be declared `const'.  Likewise, a
+     function that calls a non-`const' function usually must not be
+     `const'.  It does not make sense for a `const' function to return
+     `void'.
+
+     The attribute `const' is not implemented in GCC versions earlier
+     than 2.5.  An alternative way to declare that a function has no
+     side effects, which works in the current version and in some older
+     versions, is as follows:
+
+          typedef int intfn ();
+
+          extern const intfn square;
+
+     This approach does not work in GNU C++ from 2.6.0 on, since the
+     language specifies that the `const' must be attached to the return
+     value.
+
+`constructor'
+`destructor'
+`constructor (PRIORITY)'
+`destructor (PRIORITY)'
+     The `constructor' attribute causes the function to be called
+     automatically before execution enters `main ()'.  Similarly, the
+     `destructor' attribute causes the function to be called
+     automatically after `main ()' has completed or `exit ()' has been
+     called.  Functions with these attributes are useful for
+     initializing data that will be used implicitly during the
+     execution of the program.
+
+     You may provide an optional integer priority to control the order
+     in which constructor and destructor functions are run.  A
+     constructor with a smaller priority number runs before a
+     constructor with a larger priority number; the opposite
+     relationship holds for destructors.  So, if you have a constructor
+     that allocates a resource and a destructor that deallocates the
+     same resource, both functions typically have the same priority.
+     The priorities for constructor and destructor functions are the
+     same as those specified for namespace-scope C++ objects (*note C++
+     Attributes::).
+
+     These attributes are not currently implemented for Objective-C.
+
+`deprecated'
+`deprecated (MSG)'
+     The `deprecated' attribute results in a warning if the function is
+     used anywhere in the source file.  This is useful when identifying
+     functions that are expected to be removed in a future version of a
+     program.  The warning also includes the location of the declaration
+     of the deprecated function, to enable users to easily find further
+     information about why the function is deprecated, or what they
+     should do instead.  Note that the warnings only occurs for uses:
+
+          int old_fn () __attribute__ ((deprecated));
+          int old_fn ();
+          int (*fn_ptr)() = old_fn;
+
+     results in a warning on line 3 but not line 2.  The optional msg
+     argument, which must be a string, will be printed in the warning if
+     present.
+
+     The `deprecated' attribute can also be used for variables and
+     types (*note Variable Attributes::, *note Type Attributes::.)
+
+`disinterrupt'
+     On MeP targets, this attribute causes the compiler to emit
+     instructions to disable interrupts for the duration of the given
+     function.
+
+`dllexport'
+     On Microsoft Windows targets and Symbian OS targets the
+     `dllexport' attribute causes the compiler to provide a global
+     pointer to a pointer in a DLL, so that it can be referenced with
+     the `dllimport' attribute.  On Microsoft Windows targets, the
+     pointer name is formed by combining `_imp__' and the function or
+     variable name.
+
+     You can use `__declspec(dllexport)' as a synonym for
+     `__attribute__ ((dllexport))' for compatibility with other
+     compilers.
+
+     On systems that support the `visibility' attribute, this attribute
+     also implies "default" visibility.  It is an error to explicitly
+     specify any other visibility.
+
+     In previous versions of GCC, the `dllexport' attribute was ignored
+     for inlined functions, unless the `-fkeep-inline-functions' flag
+     had been used.  The default behaviour now is to emit all
+     dllexported inline functions; however, this can cause object
+     file-size bloat, in which case the old behaviour can be restored
+     by using `-fno-keep-inline-dllexport'.
+
+     The attribute is also ignored for undefined symbols.
+
+     When applied to C++ classes, the attribute marks defined
+     non-inlined member functions and static data members as exports.
+     Static consts initialized in-class are not marked unless they are
+     also defined out-of-class.
+
+     For Microsoft Windows targets there are alternative methods for
+     including the symbol in the DLL's export table such as using a
+     `.def' file with an `EXPORTS' section or, with GNU ld, using the
+     `--export-all' linker flag.
+
+`dllimport'
+     On Microsoft Windows and Symbian OS targets, the `dllimport'
+     attribute causes the compiler to reference a function or variable
+     via a global pointer to a pointer that is set up by the DLL
+     exporting the symbol.  The attribute implies `extern'.  On
+     Microsoft Windows targets, the pointer name is formed by combining
+     `_imp__' and the function or variable name.
+
+     You can use `__declspec(dllimport)' as a synonym for
+     `__attribute__ ((dllimport))' for compatibility with other
+     compilers.
+
+     On systems that support the `visibility' attribute, this attribute
+     also implies "default" visibility.  It is an error to explicitly
+     specify any other visibility.
+
+     Currently, the attribute is ignored for inlined functions.  If the
+     attribute is applied to a symbol _definition_, an error is
+     reported.  If a symbol previously declared `dllimport' is later
+     defined, the attribute is ignored in subsequent references, and a
+     warning is emitted.  The attribute is also overridden by a
+     subsequent declaration as `dllexport'.
+
+     When applied to C++ classes, the attribute marks non-inlined
+     member functions and static data members as imports.  However, the
+     attribute is ignored for virtual methods to allow creation of
+     vtables using thunks.
+
+     On the SH Symbian OS target the `dllimport' attribute also has
+     another affect--it can cause the vtable and run-time type
+     information for a class to be exported.  This happens when the
+     class has a dllimport'ed constructor or a non-inline, non-pure
+     virtual function and, for either of those two conditions, the
+     class also has an inline constructor or destructor and has a key
+     function that is defined in the current translation unit.
+
+     For Microsoft Windows based targets the use of the `dllimport'
+     attribute on functions is not necessary, but provides a small
+     performance benefit by eliminating a thunk in the DLL.  The use of
+     the `dllimport' attribute on imported variables was required on
+     older versions of the GNU linker, but can now be avoided by
+     passing the `--enable-auto-import' switch to the GNU linker.  As
+     with functions, using the attribute for a variable eliminates a
+     thunk in the DLL.
+
+     One drawback to using this attribute is that a pointer to a
+     _variable_ marked as `dllimport' cannot be used as a constant
+     address. However, a pointer to a _function_ with the `dllimport'
+     attribute can be used as a constant initializer; in this case, the
+     address of a stub function in the import lib is referenced.  On
+     Microsoft Windows targets, the attribute can be disabled for
+     functions by setting the `-mnop-fun-dllimport' flag.
+
+`eightbit_data'
+     Use this attribute on the H8/300, H8/300H, and H8S to indicate
+     that the specified variable should be placed into the eight bit
+     data section.  The compiler will generate more efficient code for
+     certain operations on data in the eight bit data area.  Note the
+     eight bit data area is limited to 256 bytes of data.
+
+     You must use GAS and GLD from GNU binutils version 2.7 or later for
+     this attribute to work correctly.
+
+`exception_handler'
+     Use this attribute on the Blackfin to indicate that the specified
+     function is an exception handler.  The compiler will generate
+     function entry and exit sequences suitable for use in an exception
+     handler when this attribute is present.
+
+`externally_visible'
+     This attribute, attached to a global variable or function,
+     nullifies the effect of the `-fwhole-program' command-line option,
+     so the object remains visible outside the current compilation
+     unit. If `-fwhole-program' is used together with `-flto' and
+     `gold' is used as the linker plugin, `externally_visible'
+     attributes are automatically added to functions (not variable yet
+     due to a current `gold' issue) that are accessed outside of LTO
+     objects according to resolution file produced by `gold'.  For
+     other linkers that cannot generate resolution file, explicit
+     `externally_visible' attributes are still necessary.
+
+`far'
+     On 68HC11 and 68HC12 the `far' attribute causes the compiler to
+     use a calling convention that takes care of switching memory banks
+     when entering and leaving a function.  This calling convention is
+     also the default when using the `-mlong-calls' option.
+
+     On 68HC12 the compiler will use the `call' and `rtc' instructions
+     to call and return from a function.
+
+     On 68HC11 the compiler will generate a sequence of instructions to
+     invoke a board-specific routine to switch the memory bank and call
+     the real function.  The board-specific routine simulates a `call'.
+     At the end of a function, it will jump to a board-specific routine
+     instead of using `rts'.  The board-specific return routine
+     simulates the `rtc'.
+
+     On MeP targets this causes the compiler to use a calling convention
+     which assumes the called function is too far away for the built-in
+     addressing modes.
+
+`fast_interrupt'
+     Use this attribute on the M32C and RX ports to indicate that the
+     specified function is a fast interrupt handler.  This is just like
+     the `interrupt' attribute, except that `freit' is used to return
+     instead of `reit'.
+
+`fastcall'
+     On the Intel 386, the `fastcall' attribute causes the compiler to
+     pass the first argument (if of integral type) in the register ECX
+     and the second argument (if of integral type) in the register EDX.
+     Subsequent and other typed arguments are passed on the stack.  The
+     called function will pop the arguments off the stack.  If the
+     number of arguments is variable all arguments are pushed on the
+     stack.
+
+`thiscall'
+     On the Intel 386, the `thiscall' attribute causes the compiler to
+     pass the first argument (if of integral type) in the register ECX.
+     Subsequent and other typed arguments are passed on the stack. The
+     called function will pop the arguments off the stack.  If the
+     number of arguments is variable all arguments are pushed on the
+     stack.  The `thiscall' attribute is intended for C++ non-static
+     member functions.  As gcc extension this calling convention can be
+     used for C-functions and for static member methods.
+
+`format (ARCHETYPE, STRING-INDEX, FIRST-TO-CHECK)'
+     The `format' attribute specifies that a function takes `printf',
+     `scanf', `strftime' or `strfmon' style arguments which should be
+     type-checked against a format string.  For example, the
+     declaration:
+
+          extern int
+          my_printf (void *my_object, const char *my_format, ...)
+                __attribute__ ((format (printf, 2, 3)));
+
+     causes the compiler to check the arguments in calls to `my_printf'
+     for consistency with the `printf' style format string argument
+     `my_format'.
+
+     The parameter ARCHETYPE determines how the format string is
+     interpreted, and should be `printf', `scanf', `strftime',
+     `gnu_printf', `gnu_scanf', `gnu_strftime' or `strfmon'.  (You can
+     also use `__printf__', `__scanf__', `__strftime__' or
+     `__strfmon__'.)  On MinGW targets, `ms_printf', `ms_scanf', and
+     `ms_strftime' are also present.  ARCHTYPE values such as `printf'
+     refer to the formats accepted by the system's C run-time library,
+     while `gnu_' values always refer to the formats accepted by the
+     GNU C Library.  On Microsoft Windows targets, `ms_' values refer
+     to the formats accepted by the `msvcrt.dll' library.  The
+     parameter STRING-INDEX specifies which argument is the format
+     string argument (starting from 1), while FIRST-TO-CHECK is the
+     number of the first argument to check against the format string.
+     For functions where the arguments are not available to be checked
+     (such as `vprintf'), specify the third parameter as zero.  In this
+     case the compiler only checks the format string for consistency.
+     For `strftime' formats, the third parameter is required to be zero.
+     Since non-static C++ methods have an implicit `this' argument, the
+     arguments of such methods should be counted from two, not one, when
+     giving values for STRING-INDEX and FIRST-TO-CHECK.
+
+     In the example above, the format string (`my_format') is the second
+     argument of the function `my_print', and the arguments to check
+     start with the third argument, so the correct parameters for the
+     format attribute are 2 and 3.
+
+     The `format' attribute allows you to identify your own functions
+     which take format strings as arguments, so that GCC can check the
+     calls to these functions for errors.  The compiler always (unless
+     `-ffreestanding' or `-fno-builtin' is used) checks formats for the
+     standard library functions `printf', `fprintf', `sprintf',
+     `scanf', `fscanf', `sscanf', `strftime', `vprintf', `vfprintf' and
+     `vsprintf' whenever such warnings are requested (using
+     `-Wformat'), so there is no need to modify the header file
+     `stdio.h'.  In C99 mode, the functions `snprintf', `vsnprintf',
+     `vscanf', `vfscanf' and `vsscanf' are also checked.  Except in
+     strictly conforming C standard modes, the X/Open function
+     `strfmon' is also checked as are `printf_unlocked' and
+     `fprintf_unlocked'.  *Note Options Controlling C Dialect: C
+     Dialect Options.
+
+     For Objective-C dialects, `NSString' (or `__NSString__') is
+     recognized in the same context.  Declarations including these
+     format attributes will be parsed for correct syntax, however the
+     result of checking of such format strings is not yet defined, and
+     will not be carried out by this version of the compiler.
+
+     The target may also provide additional types of format checks.
+     *Note Format Checks Specific to Particular Target Machines: Target
+     Format Checks.
+
+`format_arg (STRING-INDEX)'
+     The `format_arg' attribute specifies that a function takes a format
+     string for a `printf', `scanf', `strftime' or `strfmon' style
+     function and modifies it (for example, to translate it into
+     another language), so the result can be passed to a `printf',
+     `scanf', `strftime' or `strfmon' style function (with the
+     remaining arguments to the format function the same as they would
+     have been for the unmodified string).  For example, the
+     declaration:
+
+          extern char *
+          my_dgettext (char *my_domain, const char *my_format)
+                __attribute__ ((format_arg (2)));
+
+     causes the compiler to check the arguments in calls to a `printf',
+     `scanf', `strftime' or `strfmon' type function, whose format
+     string argument is a call to the `my_dgettext' function, for
+     consistency with the format string argument `my_format'.  If the
+     `format_arg' attribute had not been specified, all the compiler
+     could tell in such calls to format functions would be that the
+     format string argument is not constant; this would generate a
+     warning when `-Wformat-nonliteral' is used, but the calls could
+     not be checked without the attribute.
+
+     The parameter STRING-INDEX specifies which argument is the format
+     string argument (starting from one).  Since non-static C++ methods
+     have an implicit `this' argument, the arguments of such methods
+     should be counted from two.
+
+     The `format-arg' attribute allows you to identify your own
+     functions which modify format strings, so that GCC can check the
+     calls to `printf', `scanf', `strftime' or `strfmon' type function
+     whose operands are a call to one of your own function.  The
+     compiler always treats `gettext', `dgettext', and `dcgettext' in
+     this manner except when strict ISO C support is requested by
+     `-ansi' or an appropriate `-std' option, or `-ffreestanding' or
+     `-fno-builtin' is used.  *Note Options Controlling C Dialect: C
+     Dialect Options.
+
+     For Objective-C dialects, the `format-arg' attribute may refer to
+     an `NSString' reference for compatibility with the `format'
+     attribute above.
+
+     The target may also allow additional types in `format-arg'
+     attributes.  *Note Format Checks Specific to Particular Target
+     Machines: Target Format Checks.
+
+`function_vector'
+     Use this attribute on the H8/300, H8/300H, and H8S to indicate
+     that the specified function should be called through the function
+     vector.  Calling a function through the function vector will
+     reduce code size, however; the function vector has a limited size
+     (maximum 128 entries on the H8/300 and 64 entries on the H8/300H
+     and H8S) and shares space with the interrupt vector.
+
+     In SH2A target, this attribute declares a function to be called
+     using the TBR relative addressing mode.  The argument to this
+     attribute is the entry number of the same function in a vector
+     table containing all the TBR relative addressable functions.  For
+     the successful jump, register TBR should contain the start address
+     of this TBR relative vector table.  In the startup routine of the
+     user application, user needs to care of this TBR register
+     initialization.  The TBR relative vector table can have at max 256
+     function entries.  The jumps to these functions will be generated
+     using a SH2A specific, non delayed branch instruction JSR/N
+     @(disp8,TBR).  You must use GAS and GLD from GNU binutils version
+     2.7 or later for this attribute to work correctly.
+
+     Please refer the example of M16C target, to see the use of this
+     attribute while declaring a function,
+
+     In an application, for a function being called once, this
+     attribute will save at least 8 bytes of code; and if other
+     successive calls are being made to the same function, it will save
+     2 bytes of code per each of these calls.
+
+     On M16C/M32C targets, the `function_vector' attribute declares a
+     special page subroutine call function. Use of this attribute
+     reduces the code size by 2 bytes for each call generated to the
+     subroutine. The argument to the attribute is the vector number
+     entry from the special page vector table which contains the 16
+     low-order bits of the subroutine's entry address. Each vector
+     table has special page number (18 to 255) which are used in `jsrs'
+     instruction.  Jump addresses of the routines are generated by
+     adding 0x0F0000 (in case of M16C targets) or 0xFF0000 (in case of
+     M32C targets), to the 2 byte addresses set in the vector table.
+     Therefore you need to ensure that all the special page vector
+     routines should get mapped within the address range 0x0F0000 to
+     0x0FFFFF (for M16C) and 0xFF0000 to 0xFFFFFF (for M32C).
+
+     In the following example 2 bytes will be saved for each call to
+     function `foo'.
+
+          void foo (void) __attribute__((function_vector(0x18)));
+          void foo (void)
+          {
+          }
+
+          void bar (void)
+          {
+              foo();
+          }
+
+     If functions are defined in one file and are called in another
+     file, then be sure to write this declaration in both files.
+
+     This attribute is ignored for R8C target.
+
+`interrupt'
+     Use this attribute on the ARM, AVR, CRX, M32C, M32R/D, m68k, MeP,
+     MIPS, RX and Xstormy16 ports to indicate that the specified
+     function is an interrupt handler.  The compiler will generate
+     function entry and exit sequences suitable for use in an interrupt
+     handler when this attribute is present.
+
+     Note, interrupt handlers for the Blackfin, H8/300, H8/300H, H8S,
+     MicroBlaze, and SH processors can be specified via the
+     `interrupt_handler' attribute.
+
+     Note, on the AVR, interrupts will be enabled inside the function.
+
+     Note, for the ARM, you can specify the kind of interrupt to be
+     handled by adding an optional parameter to the interrupt attribute
+     like this:
+
+          void f () __attribute__ ((interrupt ("IRQ")));
+
+     Permissible values for this parameter are: IRQ, FIQ, SWI, ABORT
+     and UNDEF.
+
+     On ARMv7-M the interrupt type is ignored, and the attribute means
+     the function may be called with a word aligned stack pointer.
+
+     On MIPS targets, you can use the following attributes to modify
+     the behavior of an interrupt handler:
+    `use_shadow_register_set'
+          Assume that the handler uses a shadow register set, instead of
+          the main general-purpose registers.
+
+    `keep_interrupts_masked'
+          Keep interrupts masked for the whole function.  Without this
+          attribute, GCC tries to reenable interrupts for as much of
+          the function as it can.
+
+    `use_debug_exception_return'
+          Return using the `deret' instruction.  Interrupt handlers
+          that don't have this attribute return using `eret' instead.
+
+     You can use any combination of these attributes, as shown below:
+          void __attribute__ ((interrupt)) v0 ();
+          void __attribute__ ((interrupt, use_shadow_register_set)) v1 ();
+          void __attribute__ ((interrupt, keep_interrupts_masked)) v2 ();
+          void __attribute__ ((interrupt, use_debug_exception_return)) v3 ();
+          void __attribute__ ((interrupt, use_shadow_register_set,
+                               keep_interrupts_masked)) v4 ();
+          void __attribute__ ((interrupt, use_shadow_register_set,
+                               use_debug_exception_return)) v5 ();
+          void __attribute__ ((interrupt, keep_interrupts_masked,
+                               use_debug_exception_return)) v6 ();
+          void __attribute__ ((interrupt, use_shadow_register_set,
+                               keep_interrupts_masked,
+                               use_debug_exception_return)) v7 ();
+
+`ifunc ("RESOLVER")'
+     The `ifunc' attribute is used to mark a function as an indirect
+     function using the STT_GNU_IFUNC symbol type extension to the ELF
+     standard.  This allows the resolution of the symbol value to be
+     determined dynamically at load time, and an optimized version of
+     the routine can be selected for the particular processor or other
+     system characteristics determined then.  To use this attribute,
+     first define the implementation functions available, and a
+     resolver function that returns a pointer to the selected
+     implementation function.  The implementation functions'
+     declarations must match the API of the function being implemented,
+     the resolver's declaration is be a function returning pointer to
+     void function returning void:
+
+          void *my_memcpy (void *dst, const void *src, size_t len)
+          {
+            ...
+          }
+
+          static void (*resolve_memcpy (void)) (void)
+          {
+            return my_memcpy; // we'll just always select this routine
+          }
+
+     The exported header file declaring the function the user calls
+     would contain:
+
+          extern void *memcpy (void *, const void *, size_t);
+
+     allowing the user to call this as a regular function, unaware of
+     the implementation.  Finally, the indirect function needs to be
+     defined in the same translation unit as the resolver function:
+
+          void *memcpy (void *, const void *, size_t)
+               __attribute__ ((ifunc ("resolve_memcpy")));
+
+     Indirect functions cannot be weak, and require a recent binutils
+     (at least version 2.20.1), and GNU C library (at least version
+     2.11.1).
+
+`interrupt_handler'
+     Use this attribute on the Blackfin, m68k, H8/300, H8/300H, H8S,
+     and SH to indicate that the specified function is an interrupt
+     handler.  The compiler will generate function entry and exit
+     sequences suitable for use in an interrupt handler when this
+     attribute is present.
+
+`interrupt_thread'
+     Use this attribute on fido, a subarchitecture of the m68k, to
+     indicate that the specified function is an interrupt handler that
+     is designed to run as a thread.  The compiler omits generate
+     prologue/epilogue sequences and replaces the return instruction
+     with a `sleep' instruction.  This attribute is available only on
+     fido.
+
+`isr'
+     Use this attribute on ARM to write Interrupt Service Routines.
+     This is an alias to the `interrupt' attribute above.
+
+`kspisusp'
+     When used together with `interrupt_handler', `exception_handler'
+     or `nmi_handler', code will be generated to load the stack pointer
+     from the USP register in the function prologue.
+
+`l1_text'
+     This attribute specifies a function to be placed into L1
+     Instruction SRAM. The function will be put into a specific section
+     named `.l1.text'.  With `-mfdpic', function calls with a such
+     function as the callee or caller will use inlined PLT.
+
+`l2'
+     On the Blackfin, this attribute specifies a function to be placed
+     into L2 SRAM. The function will be put into a specific section
+     named `.l1.text'. With `-mfdpic', callers of such functions will
+     use an inlined PLT.
+
+`leaf'
+     Calls to external functions with this attribute must return to the
+     current compilation unit only by return or by exception handling.
+     In particular, leaf functions are not allowed to call callback
+     function passed to it from the current compilation unit or
+     directly call functions exported by the unit or longjmp into the
+     unit.  Leaf function might still call functions from other
+     compilation units and thus they are not necessarily leaf in the
+     sense that they contain no function calls at all.
+
+     The attribute is intended for library functions to improve
+     dataflow analysis.  The compiler takes the hint that any data not
+     escaping the current compilation unit can not be used or modified
+     by the leaf function.  For example, the `sin' function is a leaf
+     function, but `qsort' is not.
+
+     Note that leaf functions might invoke signals and signal handlers
+     might be defined in the current compilation unit and use static
+     variables.  The only compliant way to write such a signal handler
+     is to declare such variables `volatile'.
+
+     The attribute has no effect on functions defined within the
+     current compilation unit.  This is to allow easy merging of
+     multiple compilation units into one, for example, by using the
+     link time optimization.  For this reason the attribute is not
+     allowed on types to annotate indirect calls.
+
+`long_call/short_call'
+     This attribute specifies how a particular function is called on
+     ARM.  Both attributes override the `-mlong-calls' (*note ARM
+     Options::) command-line switch and `#pragma long_calls' settings.
+     The `long_call' attribute indicates that the function might be far
+     away from the call site and require a different (more expensive)
+     calling sequence.   The `short_call' attribute always places the
+     offset to the function from the call site into the `BL'
+     instruction directly.
+
+`longcall/shortcall'
+     On the Blackfin, RS/6000 and PowerPC, the `longcall' attribute
+     indicates that the function might be far away from the call site
+     and require a different (more expensive) calling sequence.  The
+     `shortcall' attribute indicates that the function is always close
+     enough for the shorter calling sequence to be used.  These
+     attributes override both the `-mlongcall' switch and, on the
+     RS/6000 and PowerPC, the `#pragma longcall' setting.
+
+     *Note RS/6000 and PowerPC Options::, for more information on
+     whether long calls are necessary.
+
+`long_call/near/far'
+     These attributes specify how a particular function is called on
+     MIPS.  The attributes override the `-mlong-calls' (*note MIPS
+     Options::) command-line switch.  The `long_call' and `far'
+     attributes are synonyms, and cause the compiler to always call the
+     function by first loading its address into a register, and then
+     using the contents of that register.  The `near' attribute has the
+     opposite effect; it specifies that non-PIC calls should be made
+     using the more efficient `jal' instruction.
+
+`malloc'
+     The `malloc' attribute is used to tell the compiler that a function
+     may be treated as if any non-`NULL' pointer it returns cannot
+     alias any other pointer valid when the function returns.  This
+     will often improve optimization.  Standard functions with this
+     property include `malloc' and `calloc'.  `realloc'-like functions
+     have this property as long as the old pointer is never referred to
+     (including comparing it to the new pointer) after the function
+     returns a non-`NULL' value.
+
+`mips16/nomips16'
+     On MIPS targets, you can use the `mips16' and `nomips16' function
+     attributes to locally select or turn off MIPS16 code generation.
+     A function with the `mips16' attribute is emitted as MIPS16 code,
+     while MIPS16 code generation is disabled for functions with the
+     `nomips16' attribute.  These attributes override the `-mips16' and
+     `-mno-mips16' options on the command line (*note MIPS Options::).
+
+     When compiling files containing mixed MIPS16 and non-MIPS16 code,
+     the preprocessor symbol `__mips16' reflects the setting on the
+     command line, not that within individual functions.  Mixed MIPS16
+     and non-MIPS16 code may interact badly with some GCC extensions
+     such as `__builtin_apply' (*note Constructing Calls::).
+
+`model (MODEL-NAME)'
+     On the M32R/D, use this attribute to set the addressability of an
+     object, and of the code generated for a function.  The identifier
+     MODEL-NAME is one of `small', `medium', or `large', representing
+     each of the code models.
+
+     Small model objects live in the lower 16MB of memory (so that their
+     addresses can be loaded with the `ld24' instruction), and are
+     callable with the `bl' instruction.
+
+     Medium model objects may live anywhere in the 32-bit address space
+     (the compiler will generate `seth/add3' instructions to load their
+     addresses), and are callable with the `bl' instruction.
+
+     Large model objects may live anywhere in the 32-bit address space
+     (the compiler will generate `seth/add3' instructions to load their
+     addresses), and may not be reachable with the `bl' instruction
+     (the compiler will generate the much slower `seth/add3/jl'
+     instruction sequence).
+
+     On IA-64, use this attribute to set the addressability of an
+     object.  At present, the only supported identifier for MODEL-NAME
+     is `small', indicating addressability via "small" (22-bit)
+     addresses (so that their addresses can be loaded with the `addl'
+     instruction).  Caveat: such addressing is by definition not
+     position independent and hence this attribute must not be used for
+     objects defined by shared libraries.
+
+`ms_abi/sysv_abi'
+     On 64-bit x86_64-*-* targets, you can use an ABI attribute to
+     indicate which calling convention should be used for a function.
+     The `ms_abi' attribute tells the compiler to use the Microsoft
+     ABI, while the `sysv_abi' attribute tells the compiler to use the
+     ABI used on GNU/Linux and other systems.  The default is to use
+     the Microsoft ABI when targeting Windows.  On all other systems,
+     the default is the AMD ABI.
+
+     Note, the `ms_abi' attribute for Windows targets currently requires
+     the `-maccumulate-outgoing-args' option.
+
+`callee_pop_aggregate_return (NUMBER)'
+     On 32-bit i?86-*-* targets, you can control by those attribute for
+     aggregate return in memory, if the caller is responsible to pop
+     the hidden pointer together with the rest of the arguments -
+     NUMBER equal to zero -, or if the callee is responsible to pop
+     hidden pointer - NUMBER equal to one.
+
+     For i?86-netware, the caller pops the stack for the hidden
+     arguments pointing to aggregate return value.  This differs from
+     the default i386 ABI which assumes that the callee pops the stack
+     for hidden pointer.
+
+`ms_hook_prologue'
+     On 32 bit i[34567]86-*-* targets and 64 bit x86_64-*-* targets,
+     you can use this function attribute to make gcc generate the
+     "hot-patching" function prologue used in Win32 API functions in
+     Microsoft Windows XP Service Pack 2 and newer.
+
+`naked'
+     Use this attribute on the ARM, AVR, MCORE, RX and SPU ports to
+     indicate that the specified function does not need
+     prologue/epilogue sequences generated by the compiler.  It is up
+     to the programmer to provide these sequences. The only statements
+     that can be safely included in naked functions are `asm'
+     statements that do not have operands.  All other statements,
+     including declarations of local variables, `if' statements, and so
+     forth, should be avoided.  Naked functions should be used to
+     implement the body of an assembly function, while allowing the
+     compiler to construct the requisite function declaration for the
+     assembler.
+
+`near'
+     On 68HC11 and 68HC12 the `near' attribute causes the compiler to
+     use the normal calling convention based on `jsr' and `rts'.  This
+     attribute can be used to cancel the effect of the `-mlong-calls'
+     option.
+
+     On MeP targets this attribute causes the compiler to assume the
+     called function is close enough to use the normal calling
+     convention, overriding the `-mtf' command line option.
+
+`nesting'
+     Use this attribute together with `interrupt_handler',
+     `exception_handler' or `nmi_handler' to indicate that the function
+     entry code should enable nested interrupts or exceptions.
+
+`nmi_handler'
+     Use this attribute on the Blackfin to indicate that the specified
+     function is an NMI handler.  The compiler will generate function
+     entry and exit sequences suitable for use in an NMI handler when
+     this attribute is present.
+
+`no_instrument_function'
+     If `-finstrument-functions' is given, profiling function calls will
+     be generated at entry and exit of most user-compiled functions.
+     Functions with this attribute will not be so instrumented.
+
+`no_split_stack'
+     If `-fsplit-stack' is given, functions will have a small prologue
+     which decides whether to split the stack.  Functions with the
+     `no_split_stack' attribute will not have that prologue, and thus
+     may run with only a small amount of stack space available.
+
+`noinline'
+     This function attribute prevents a function from being considered
+     for inlining.  If the function does not have side-effects, there
+     are optimizations other than inlining that causes function calls
+     to be optimized away, although the function call is live.  To keep
+     such calls from being optimized away, put
+          asm ("");
+     (*note Extended Asm::) in the called function, to serve as a
+     special side-effect.
+
+`noclone'
+     This function attribute prevents a function from being considered
+     for cloning - a mechanism which produces specialized copies of
+     functions and which is (currently) performed by interprocedural
+     constant propagation.
+
+`nonnull (ARG-INDEX, ...)'
+     The `nonnull' attribute specifies that some function parameters
+     should be non-null pointers.  For instance, the declaration:
+
+          extern void *
+          my_memcpy (void *dest, const void *src, size_t len)
+                  __attribute__((nonnull (1, 2)));
+
+     causes the compiler to check that, in calls to `my_memcpy',
+     arguments DEST and SRC are non-null.  If the compiler determines
+     that a null pointer is passed in an argument slot marked as
+     non-null, and the `-Wnonnull' option is enabled, a warning is
+     issued.  The compiler may also choose to make optimizations based
+     on the knowledge that certain function arguments will not be null.
+
+     If no argument index list is given to the `nonnull' attribute, all
+     pointer arguments are marked as non-null.  To illustrate, the
+     following declaration is equivalent to the previous example:
+
+          extern void *
+          my_memcpy (void *dest, const void *src, size_t len)
+                  __attribute__((nonnull));
+
+`noreturn'
+     A few standard library functions, such as `abort' and `exit',
+     cannot return.  GCC knows this automatically.  Some programs define
+     their own functions that never return.  You can declare them
+     `noreturn' to tell the compiler this fact.  For example,
+
+          void fatal () __attribute__ ((noreturn));
+
+          void
+          fatal (/* ... */)
+          {
+            /* ... */ /* Print error message. */ /* ... */
+            exit (1);
+          }
+
+     The `noreturn' keyword tells the compiler to assume that `fatal'
+     cannot return.  It can then optimize without regard to what would
+     happen if `fatal' ever did return.  This makes slightly better
+     code.  More importantly, it helps avoid spurious warnings of
+     uninitialized variables.
+
+     The `noreturn' keyword does not affect the exceptional path when
+     that applies: a `noreturn'-marked function may still return to the
+     caller by throwing an exception or calling `longjmp'.
+
+     Do not assume that registers saved by the calling function are
+     restored before calling the `noreturn' function.
+
+     It does not make sense for a `noreturn' function to have a return
+     type other than `void'.
+
+     The attribute `noreturn' is not implemented in GCC versions
+     earlier than 2.5.  An alternative way to declare that a function
+     does not return, which works in the current version and in some
+     older versions, is as follows:
+
+          typedef void voidfn ();
+
+          volatile voidfn fatal;
+
+     This approach does not work in GNU C++.
+
+`nothrow'
+     The `nothrow' attribute is used to inform the compiler that a
+     function cannot throw an exception.  For example, most functions in
+     the standard C library can be guaranteed not to throw an exception
+     with the notable exceptions of `qsort' and `bsearch' that take
+     function pointer arguments.  The `nothrow' attribute is not
+     implemented in GCC versions earlier than 3.3.
+
+`optimize'
+     The `optimize' attribute is used to specify that a function is to
+     be compiled with different optimization options than specified on
+     the command line.  Arguments can either be numbers or strings.
+     Numbers are assumed to be an optimization level.  Strings that
+     begin with `O' are assumed to be an optimization option, while
+     other options are assumed to be used with a `-f' prefix.  You can
+     also use the `#pragma GCC optimize' pragma to set the optimization
+     options that affect more than one function.  *Note Function
+     Specific Option Pragmas::, for details about the `#pragma GCC
+     optimize' pragma.
+
+     This can be used for instance to have frequently executed functions
+     compiled with more aggressive optimization options that produce
+     faster and larger code, while other functions can be called with
+     less aggressive options.
+
+`OS_main/OS_task'
+     On AVR, functions with the `OS_main' or `OS_task' attribute do not
+     save/restore any call-saved register in their prologue/epilogue.
+
+     The `OS_main' attribute can be used when there _is guarantee_ that
+     interrupts are disabled at the time when the function is entered.
+     This will save resources when the stack pointer has to be changed
+     to set up a frame for local variables.
+
+     The `OS_task' attribute can be used when there is _no guarantee_
+     that interrupts are disabled at that time when the function is
+     entered like for, e.g. task functions in a multi-threading
+     operating system. In that case, changing the stack pointer
+     register will be guarded by save/clear/restore of the global
+     interrupt enable flag.
+
+     The differences to the `naked' function attrubute are:
+        * `naked' functions do not have a return instruction whereas
+          `OS_main' and `OS_task' functions will have a `RET' or `RETI'
+          return instruction.
+
+        * `naked' functions do not set up a frame for local variables
+          or a frame pointer whereas `OS_main' and `OS_task' do this as
+          needed.
+
+`pcs'
+     The `pcs' attribute can be used to control the calling convention
+     used for a function on ARM.  The attribute takes an argument that
+     specifies the calling convention to use.
+
+     When compiling using the AAPCS ABI (or a variant of that) then
+     valid values for the argument are `"aapcs"' and `"aapcs-vfp"'.  In
+     order to use a variant other than `"aapcs"' then the compiler must
+     be permitted to use the appropriate co-processor registers (i.e.,
+     the VFP registers must be available in order to use `"aapcs-vfp"').
+     For example,
+
+          /* Argument passed in r0, and result returned in r0+r1.  */
+          double f2d (float) __attribute__((pcs("aapcs")));
+
+     Variadic functions always use the `"aapcs"' calling convention and
+     the compiler will reject attempts to specify an alternative.
+
+`pure'
+     Many functions have no effects except the return value and their
+     return value depends only on the parameters and/or global
+     variables.  Such a function can be subject to common subexpression
+     elimination and loop optimization just as an arithmetic operator
+     would be.  These functions should be declared with the attribute
+     `pure'.  For example,
+
+          int square (int) __attribute__ ((pure));
+
+     says that the hypothetical function `square' is safe to call fewer
+     times than the program says.
+
+     Some of common examples of pure functions are `strlen' or `memcmp'.
+     Interesting non-pure functions are functions with infinite loops
+     or those depending on volatile memory or other system resource,
+     that may change between two consecutive calls (such as `feof' in a
+     multithreading environment).
+
+     The attribute `pure' is not implemented in GCC versions earlier
+     than 2.96.
+
+`hot'
+     The `hot' attribute is used to inform the compiler that a function
+     is a hot spot of the compiled program.  The function is optimized
+     more aggressively and on many target it is placed into special
+     subsection of the text section so all hot functions appears close
+     together improving locality.
+
+     When profile feedback is available, via `-fprofile-use', hot
+     functions are automatically detected and this attribute is ignored.
+
+     The `hot' attribute is not implemented in GCC versions earlier
+     than 4.3.
+
+`cold'
+     The `cold' attribute is used to inform the compiler that a
+     function is unlikely executed.  The function is optimized for size
+     rather than speed and on many targets it is placed into special
+     subsection of the text section so all cold functions appears close
+     together improving code locality of non-cold parts of program.
+     The paths leading to call of cold functions within code are marked
+     as unlikely by the branch prediction mechanism. It is thus useful
+     to mark functions used to handle unlikely conditions, such as
+     `perror', as cold to improve optimization of hot functions that do
+     call marked functions in rare occasions.
+
+     When profile feedback is available, via `-fprofile-use', hot
+     functions are automatically detected and this attribute is ignored.
+
+     The `cold' attribute is not implemented in GCC versions earlier
+     than 4.3.
+
+`regparm (NUMBER)'
+     On the Intel 386, the `regparm' attribute causes the compiler to
+     pass arguments number one to NUMBER if they are of integral type
+     in registers EAX, EDX, and ECX instead of on the stack.  Functions
+     that take a variable number of arguments will continue to be
+     passed all of their arguments on the stack.
+
+     Beware that on some ELF systems this attribute is unsuitable for
+     global functions in shared libraries with lazy binding (which is
+     the default).  Lazy binding will send the first call via resolving
+     code in the loader, which might assume EAX, EDX and ECX can be
+     clobbered, as per the standard calling conventions.  Solaris 8 is
+     affected by this.  GNU systems with GLIBC 2.1 or higher, and
+     FreeBSD, are believed to be safe since the loaders there save EAX,
+     EDX and ECX.  (Lazy binding can be disabled with the linker or the
+     loader if desired, to avoid the problem.)
+
+`sseregparm'
+     On the Intel 386 with SSE support, the `sseregparm' attribute
+     causes the compiler to pass up to 3 floating point arguments in
+     SSE registers instead of on the stack.  Functions that take a
+     variable number of arguments will continue to pass all of their
+     floating point arguments on the stack.
+
+`force_align_arg_pointer'
+     On the Intel x86, the `force_align_arg_pointer' attribute may be
+     applied to individual function definitions, generating an alternate
+     prologue and epilogue that realigns the runtime stack if necessary.
+     This supports mixing legacy codes that run with a 4-byte aligned
+     stack with modern codes that keep a 16-byte stack for SSE
+     compatibility.
+
+`resbank'
+     On the SH2A target, this attribute enables the high-speed register
+     saving and restoration using a register bank for
+     `interrupt_handler' routines.  Saving to the bank is performed
+     automatically after the CPU accepts an interrupt that uses a
+     register bank.
+
+     The nineteen 32-bit registers comprising general register R0 to
+     R14, control register GBR, and system registers MACH, MACL, and PR
+     and the vector table address offset are saved into a register
+     bank.  Register banks are stacked in first-in last-out (FILO)
+     sequence.  Restoration from the bank is executed by issuing a
+     RESBANK instruction.
+
+`returns_twice'
+     The `returns_twice' attribute tells the compiler that a function
+     may return more than one time.  The compiler will ensure that all
+     registers are dead before calling such a function and will emit a
+     warning about the variables that may be clobbered after the second
+     return from the function.  Examples of such functions are `setjmp'
+     and `vfork'.  The `longjmp'-like counterpart of such function, if
+     any, might need to be marked with the `noreturn' attribute.
+
+`saveall'
+     Use this attribute on the Blackfin, H8/300, H8/300H, and H8S to
+     indicate that all registers except the stack pointer should be
+     saved in the prologue regardless of whether they are used or not.
+
+`save_volatiles'
+     Use this attribute on the MicroBlaze to indicate that the function
+     is an interrupt handler.  All volatile registers (in addition to
+     non-volatile registers) will be saved in the function prologue.
+     If the function is a leaf function, only volatiles used by the
+     function are saved.  A normal function return is generated instead
+     of a return from interrupt.
+
+`section ("SECTION-NAME")'
+     Normally, the compiler places the code it generates in the `text'
+     section.  Sometimes, however, you need additional sections, or you
+     need certain particular functions to appear in special sections.
+     The `section' attribute specifies that a function lives in a
+     particular section.  For example, the declaration:
+
+          extern void foobar (void) __attribute__ ((section ("bar")));
+
+     puts the function `foobar' in the `bar' section.
+
+     Some file formats do not support arbitrary sections so the
+     `section' attribute is not available on all platforms.  If you
+     need to map the entire contents of a module to a particular
+     section, consider using the facilities of the linker instead.
+
+`sentinel'
+     This function attribute ensures that a parameter in a function
+     call is an explicit `NULL'.  The attribute is only valid on
+     variadic functions.  By default, the sentinel is located at
+     position zero, the last parameter of the function call.  If an
+     optional integer position argument P is supplied to the attribute,
+     the sentinel must be located at position P counting backwards from
+     the end of the argument list.
+
+          __attribute__ ((sentinel))
+          is equivalent to
+          __attribute__ ((sentinel(0)))
+
+     The attribute is automatically set with a position of 0 for the
+     built-in functions `execl' and `execlp'.  The built-in function
+     `execle' has the attribute set with a position of 1.
+
+     A valid `NULL' in this context is defined as zero with any pointer
+     type.  If your system defines the `NULL' macro with an integer type
+     then you need to add an explicit cast.  GCC replaces `stddef.h'
+     with a copy that redefines NULL appropriately.
+
+     The warnings for missing or incorrect sentinels are enabled with
+     `-Wformat'.
+
+`short_call'
+     See long_call/short_call.
+
+`shortcall'
+     See longcall/shortcall.
+
+`signal'
+     Use this attribute on the AVR to indicate that the specified
+     function is a signal handler.  The compiler will generate function
+     entry and exit sequences suitable for use in a signal handler when
+     this attribute is present.  Interrupts will be disabled inside the
+     function.
+
+`sp_switch'
+     Use this attribute on the SH to indicate an `interrupt_handler'
+     function should switch to an alternate stack.  It expects a string
+     argument that names a global variable holding the address of the
+     alternate stack.
+
+          void *alt_stack;
+          void f () __attribute__ ((interrupt_handler,
+                                    sp_switch ("alt_stack")));
+
+`stdcall'
+     On the Intel 386, the `stdcall' attribute causes the compiler to
+     assume that the called function will pop off the stack space used
+     to pass arguments, unless it takes a variable number of arguments.
+
+`syscall_linkage'
+     This attribute is used to modify the IA64 calling convention by
+     marking all input registers as live at all function exits.  This
+     makes it possible to restart a system call after an interrupt
+     without having to save/restore the input registers.  This also
+     prevents kernel data from leaking into application code.
+
+`target'
+     The `target' attribute is used to specify that a function is to be
+     compiled with different target options than specified on the
+     command line.  This can be used for instance to have functions
+     compiled with a different ISA (instruction set architecture) than
+     the default.  You can also use the `#pragma GCC target' pragma to
+     set more than one function to be compiled with specific target
+     options.  *Note Function Specific Option Pragmas::, for details
+     about the `#pragma GCC target' pragma.
+
+     For instance on a 386, you could compile one function with
+     `target("sse4.1,arch=core2")' and another with
+     `target("sse4a,arch=amdfam10")' that would be equivalent to
+     compiling the first function with `-msse4.1' and `-march=core2'
+     options, and the second function with `-msse4a' and
+     `-march=amdfam10' options.  It is up to the user to make sure that
+     a function is only invoked on a machine that supports the
+     particular ISA it was compiled for (for example by using `cpuid'
+     on 386 to determine what feature bits and architecture family are
+     used).
+
+          int core2_func (void) __attribute__ ((__target__ ("arch=core2")));
+          int sse3_func (void) __attribute__ ((__target__ ("sse3")));
+
+     On the 386, the following options are allowed:
+
+    `abm'
+    `no-abm'
+          Enable/disable the generation of the advanced bit
+          instructions.
+
+    `aes'
+    `no-aes'
+          Enable/disable the generation of the AES instructions.
+
+    `mmx'
+    `no-mmx'
+          Enable/disable the generation of the MMX instructions.
+
+    `pclmul'
+    `no-pclmul'
+          Enable/disable the generation of the PCLMUL instructions.
+
+    `popcnt'
+    `no-popcnt'
+          Enable/disable the generation of the POPCNT instruction.
+
+    `sse'
+    `no-sse'
+          Enable/disable the generation of the SSE instructions.
+
+    `sse2'
+    `no-sse2'
+          Enable/disable the generation of the SSE2 instructions.
+
+    `sse3'
+    `no-sse3'
+          Enable/disable the generation of the SSE3 instructions.
+
+    `sse4'
+    `no-sse4'
+          Enable/disable the generation of the SSE4 instructions (both
+          SSE4.1 and SSE4.2).
+
+    `sse4.1'
+    `no-sse4.1'
+          Enable/disable the generation of the sse4.1 instructions.
+
+    `sse4.2'
+    `no-sse4.2'
+          Enable/disable the generation of the sse4.2 instructions.
+
+    `sse4a'
+    `no-sse4a'
+          Enable/disable the generation of the SSE4A instructions.
+
+    `fma4'
+    `no-fma4'
+          Enable/disable the generation of the FMA4 instructions.
+
+    `xop'
+    `no-xop'
+          Enable/disable the generation of the XOP instructions.
+
+    `lwp'
+    `no-lwp'
+          Enable/disable the generation of the LWP instructions.
+
+    `ssse3'
+    `no-ssse3'
+          Enable/disable the generation of the SSSE3 instructions.
+
+    `cld'
+    `no-cld'
+          Enable/disable the generation of the CLD before string moves.
+
+    `fancy-math-387'
+    `no-fancy-math-387'
+          Enable/disable the generation of the `sin', `cos', and `sqrt'
+          instructions on the 387 floating point unit.
+
+    `fused-madd'
+    `no-fused-madd'
+          Enable/disable the generation of the fused multiply/add
+          instructions.
+
+    `ieee-fp'
+    `no-ieee-fp'
+          Enable/disable the generation of floating point that depends
+          on IEEE arithmetic.
+
+    `inline-all-stringops'
+    `no-inline-all-stringops'
+          Enable/disable inlining of string operations.
+
+    `inline-stringops-dynamically'
+    `no-inline-stringops-dynamically'
+          Enable/disable the generation of the inline code to do small
+          string operations and calling the library routines for large
+          operations.
+
+    `align-stringops'
+    `no-align-stringops'
+          Do/do not align destination of inlined string operations.
+
+    `recip'
+    `no-recip'
+          Enable/disable the generation of RCPSS, RCPPS, RSQRTSS and
+          RSQRTPS instructions followed an additional Newton-Raphson
+          step instead of doing a floating point division.
+
+    `arch=ARCH'
+          Specify the architecture to generate code for in compiling
+          the function.
+
+    `tune=TUNE'
+          Specify the architecture to tune for in compiling the
+          function.
+
+    `fpmath=FPMATH'
+          Specify which floating point unit to use.  The
+          `target("fpmath=sse,387")' option must be specified as
+          `target("fpmath=sse+387")' because the comma would separate
+          different options.
+
+     On the PowerPC, the following options are allowed:
+
+    `altivec'
+    `no-altivec'
+          Generate code that uses (does not use) AltiVec instructions.
+          In 32-bit code, you cannot enable Altivec instructions unless
+          `-mabi=altivec' was used on the command line.
+
+    `cmpb'
+    `no-cmpb'
+          Generate code that uses (does not use) the compare bytes
+          instruction implemented on the POWER6 processor and other
+          processors that support the PowerPC V2.05 architecture.
+
+    `dlmzb'
+    `no-dlmzb'
+          Generate code that uses (does not use) the string-search
+          `dlmzb' instruction on the IBM 405, 440, 464 and 476
+          processors.  This instruction is generated by default when
+          targetting those processors.
+
+    `fprnd'
+    `no-fprnd'
+          Generate code that uses (does not use) the FP round to integer
+          instructions implemented on the POWER5+ processor and other
+          processors that support the PowerPC V2.03 architecture.
+
+    `hard-dfp'
+    `no-hard-dfp'
+          Generate code that uses (does not use) the decimal floating
+          point instructions implemented on some POWER processors.
+
+    `isel'
+    `no-isel'
+          Generate code that uses (does not use) ISEL instruction.
+
+    `mfcrf'
+    `no-mfcrf'
+          Generate code that uses (does not use) the move from condition
+          register field instruction implemented on the POWER4
+          processor and other processors that support the PowerPC V2.01
+          architecture.
+
+    `mfpgpr'
+    `no-mfpgpr'
+          Generate code that uses (does not use) the FP move to/from
+          general purpose register instructions implemented on the
+          POWER6X processor and other processors that support the
+          extended PowerPC V2.05 architecture.
+
+    `mulhw'
+    `no-mulhw'
+          Generate code that uses (does not use) the half-word multiply
+          and multiply-accumulate instructions on the IBM 405, 440, 464
+          and 476 processors.  These instructions are generated by
+          default when targetting those processors.
+
+    `multiple'
+    `no-multiple'
+          Generate code that uses (does not use) the load multiple word
+          instructions and the store multiple word instructions.
+
+    `update'
+    `no-update'
+          Generate code that uses (does not use) the load or store
+          instructions that update the base register to the address of
+          the calculated memory location.
+
+    `popcntb'
+    `no-popcntb'
+          Generate code that uses (does not use) the popcount and double
+          precision FP reciprocal estimate instruction implemented on
+          the POWER5 processor and other processors that support the
+          PowerPC V2.02 architecture.
+
+    `popcntd'
+    `no-popcntd'
+          Generate code that uses (does not use) the popcount
+          instruction implemented on the POWER7 processor and other
+          processors that support the PowerPC V2.06 architecture.
+
+    `powerpc-gfxopt'
+    `no-powerpc-gfxopt'
+          Generate code that uses (does not use) the optional PowerPC
+          architecture instructions in the Graphics group, including
+          floating-point select.
+
+    `powerpc-gpopt'
+    `no-powerpc-gpopt'
+          Generate code that uses (does not use) the optional PowerPC
+          architecture instructions in the General Purpose group,
+          including floating-point square root.
+
+    `recip-precision'
+    `no-recip-precision'
+          Assume (do not assume) that the reciprocal estimate
+          instructions provide higher precision estimates than is
+          mandated by the powerpc ABI.
+
+    `string'
+    `no-string'
+          Generate code that uses (does not use) the load string
+          instructions and the store string word instructions to save
+          multiple registers and do small block moves.
+
+    `vsx'
+    `no-vsx'
+          Generate code that uses (does not use) vector/scalar (VSX)
+          instructions, and also enable the use of built-in functions
+          that allow more direct access to the VSX instruction set.  In
+          32-bit code, you cannot enable VSX or Altivec instructions
+          unless `-mabi=altivec' was used on the command line.
+
+    `friz'
+    `no-friz'
+          Generate (do not generate) the `friz' instruction when the
+          `-funsafe-math-optimizations' option is used to optimize
+          rounding a floating point value to 64-bit integer and back to
+          floating point.  The `friz' instruction does not return the
+          same value if the floating point number is too large to fit
+          in an integer.
+
+    `avoid-indexed-addresses'
+    `no-avoid-indexed-addresses'
+          Generate code that tries to avoid (not avoid) the use of
+          indexed load or store instructions.
+
+    `paired'
+    `no-paired'
+          Generate code that uses (does not use) the generation of
+          PAIRED simd instructions.
+
+    `longcall'
+    `no-longcall'
+          Generate code that assumes (does not assume) that all calls
+          are far away so that a longer more expensive calling sequence
+          is required.
+
+    `cpu=CPU'
+          Specify the architecture to generate code for when compiling
+          the function.  If you select the `"target("cpu=power7)"'
+          attribute when generating 32-bit code, VSX and Altivec
+          instructions are not generated unless you use the
+          `-mabi=altivec' option on the command line.
+
+    `tune=TUNE'
+          Specify the architecture to tune for when compiling the
+          function.  If you do not specify the `target("tune=TUNE")'
+          attribute and you do specify the `target("cpu=CPU")'
+          attribute, compilation will tune for the CPU architecture,
+          and not the default tuning specified on the command line.
+
+     On the 386/x86_64 and PowerPC backends, you can use either multiple
+     strings to specify multiple options, or you can separate the option
+     with a comma (`,').
+
+     On the 386/x86_64 and PowerPC backends, the inliner will not
+     inline a function that has different target options than the
+     caller, unless the callee has a subset of the target options of
+     the caller.  For example a function declared with `target("sse3")'
+     can inline a function with `target("sse2")', since `-msse3'
+     implies `-msse2'.
+
+     The `target' attribute is not implemented in GCC versions earlier
+     than 4.4 for the i386/x86_64 and 4.6 for the PowerPC backends.  It
+     is not currently implemented for other backends.
+
+`tiny_data'
+     Use this attribute on the H8/300H and H8S to indicate that the
+     specified variable should be placed into the tiny data section.
+     The compiler will generate more efficient code for loads and stores
+     on data in the tiny data section.  Note the tiny data area is
+     limited to slightly under 32kbytes of data.
+
+`trap_exit'
+     Use this attribute on the SH for an `interrupt_handler' to return
+     using `trapa' instead of `rte'.  This attribute expects an integer
+     argument specifying the trap number to be used.
+
+`unused'
+     This attribute, attached to a function, means that the function is
+     meant to be possibly unused.  GCC will not produce a warning for
+     this function.
+
+`used'
+     This attribute, attached to a function, means that code must be
+     emitted for the function even if it appears that the function is
+     not referenced.  This is useful, for example, when the function is
+     referenced only in inline assembly.
+
+`version_id'
+     This IA64 HP-UX attribute, attached to a global variable or
+     function, renames a symbol to contain a version string, thus
+     allowing for function level versioning.  HP-UX system header files
+     may use version level functioning for some system calls.
+
+          extern int foo () __attribute__((version_id ("20040821")));
+
+     Calls to FOO will be mapped to calls to FOO{20040821}.
+
+`visibility ("VISIBILITY_TYPE")'
+     This attribute affects the linkage of the declaration to which it
+     is attached.  There are four supported VISIBILITY_TYPE values:
+     default, hidden, protected or internal visibility.
+
+          void __attribute__ ((visibility ("protected")))
+          f () { /* Do something. */; }
+          int i __attribute__ ((visibility ("hidden")));
+
+     The possible values of VISIBILITY_TYPE correspond to the
+     visibility settings in the ELF gABI.
+
+    "default"
+          Default visibility is the normal case for the object file
+          format.  This value is available for the visibility attribute
+          to override other options that may change the assumed
+          visibility of entities.
+
+          On ELF, default visibility means that the declaration is
+          visible to other modules and, in shared libraries, means that
+          the declared entity may be overridden.
+
+          On Darwin, default visibility means that the declaration is
+          visible to other modules.
+
+          Default visibility corresponds to "external linkage" in the
+          language.
+
+    "hidden"
+          Hidden visibility indicates that the entity declared will
+          have a new form of linkage, which we'll call "hidden
+          linkage".  Two declarations of an object with hidden linkage
+          refer to the same object if they are in the same shared
+          object.
+
+    "internal"
+          Internal visibility is like hidden visibility, but with
+          additional processor specific semantics.  Unless otherwise
+          specified by the psABI, GCC defines internal visibility to
+          mean that a function is _never_ called from another module.
+          Compare this with hidden functions which, while they cannot
+          be referenced directly by other modules, can be referenced
+          indirectly via function pointers.  By indicating that a
+          function cannot be called from outside the module, GCC may
+          for instance omit the load of a PIC register since it is known
+          that the calling function loaded the correct value.
+
+    "protected"
+          Protected visibility is like default visibility except that it
+          indicates that references within the defining module will
+          bind to the definition in that module.  That is, the declared
+          entity cannot be overridden by another module.
+
+
+     All visibilities are supported on many, but not all, ELF targets
+     (supported when the assembler supports the `.visibility'
+     pseudo-op).  Default visibility is supported everywhere.  Hidden
+     visibility is supported on Darwin targets.
+
+     The visibility attribute should be applied only to declarations
+     which would otherwise have external linkage.  The attribute should
+     be applied consistently, so that the same entity should not be
+     declared with different settings of the attribute.
+
+     In C++, the visibility attribute applies to types as well as
+     functions and objects, because in C++ types have linkage.  A class
+     must not have greater visibility than its non-static data member
+     types and bases, and class members default to the visibility of
+     their class.  Also, a declaration without explicit visibility is
+     limited to the visibility of its type.
+
+     In C++, you can mark member functions and static member variables
+     of a class with the visibility attribute.  This is useful if you
+     know a particular method or static member variable should only be
+     used from one shared object; then you can mark it hidden while the
+     rest of the class has default visibility.  Care must be taken to
+     avoid breaking the One Definition Rule; for example, it is usually
+     not useful to mark an inline method as hidden without marking the
+     whole class as hidden.
+
+     A C++ namespace declaration can also have the visibility attribute.
+     This attribute applies only to the particular namespace body, not
+     to other definitions of the same namespace; it is equivalent to
+     using `#pragma GCC visibility' before and after the namespace
+     definition (*note Visibility Pragmas::).
+
+     In C++, if a template argument has limited visibility, this
+     restriction is implicitly propagated to the template instantiation.
+     Otherwise, template instantiations and specializations default to
+     the visibility of their template.
+
+     If both the template and enclosing class have explicit visibility,
+     the visibility from the template is used.
+
+`vliw'
+     On MeP, the `vliw' attribute tells the compiler to emit
+     instructions in VLIW mode instead of core mode.  Note that this
+     attribute is not allowed unless a VLIW coprocessor has been
+     configured and enabled through command line options.
+
+`warn_unused_result'
+     The `warn_unused_result' attribute causes a warning to be emitted
+     if a caller of the function with this attribute does not use its
+     return value.  This is useful for functions where not checking the
+     result is either a security problem or always a bug, such as
+     `realloc'.
+
+          int fn () __attribute__ ((warn_unused_result));
+          int foo ()
+          {
+            if (fn () < 0) return -1;
+            fn ();
+            return 0;
+          }
+
+     results in warning on line 5.
+
+`weak'
+     The `weak' attribute causes the declaration to be emitted as a weak
+     symbol rather than a global.  This is primarily useful in defining
+     library functions which can be overridden in user code, though it
+     can also be used with non-function declarations.  Weak symbols are
+     supported for ELF targets, and also for a.out targets when using
+     the GNU assembler and linker.
+
+`weakref'
+`weakref ("TARGET")'
+     The `weakref' attribute marks a declaration as a weak reference.
+     Without arguments, it should be accompanied by an `alias' attribute
+     naming the target symbol.  Optionally, the TARGET may be given as
+     an argument to `weakref' itself.  In either case, `weakref'
+     implicitly marks the declaration as `weak'.  Without a TARGET,
+     given as an argument to `weakref' or to `alias', `weakref' is
+     equivalent to `weak'.
+
+          static int x() __attribute__ ((weakref ("y")));
+          /* is equivalent to... */
+          static int x() __attribute__ ((weak, weakref, alias ("y")));
+          /* and to... */
+          static int x() __attribute__ ((weakref));
+          static int x() __attribute__ ((alias ("y")));
+
+     A weak reference is an alias that does not by itself require a
+     definition to be given for the target symbol.  If the target
+     symbol is only referenced through weak references, then it becomes
+     a `weak' undefined symbol.  If it is directly referenced, however,
+     then such strong references prevail, and a definition will be
+     required for the symbol, not necessarily in the same translation
+     unit.
+
+     The effect is equivalent to moving all references to the alias to a
+     separate translation unit, renaming the alias to the aliased
+     symbol, declaring it as weak, compiling the two separate
+     translation units and performing a reloadable link on them.
+
+     At present, a declaration to which `weakref' is attached can only
+     be `static'.
+
+
+ You can specify multiple attributes in a declaration by separating them
+by commas within the double parentheses or by immediately following an
+attribute declaration with another attribute declaration.
+
+ Some people object to the `__attribute__' feature, suggesting that ISO
+C's `#pragma' should be used instead.  At the time `__attribute__' was
+designed, there were two reasons for not doing this.
+
+  1. It is impossible to generate `#pragma' commands from a macro.
+
+  2. There is no telling what the same `#pragma' might mean in another
+     compiler.
+
+ These two reasons applied to almost any application that might have
+been proposed for `#pragma'.  It was basically a mistake to use
+`#pragma' for _anything_.
+
+ The ISO C99 standard includes `_Pragma', which now allows pragmas to
+be generated from macros.  In addition, a `#pragma GCC' namespace is
+now in use for GCC-specific pragmas.  However, it has been found
+convenient to use `__attribute__' to achieve a natural attachment of
+attributes to their corresponding declarations, whereas `#pragma GCC'
+is of use for constructs that do not naturally form part of the
+grammar.  *Note Miscellaneous Preprocessing Directives: (cpp)Other
+Directives.
+
+
+File: gcc.info,  Node: Attribute Syntax,  Next: Function Prototypes,  Prev: Function Attributes,  Up: C Extensions
+
+6.31 Attribute Syntax
+=====================
+
+This section describes the syntax with which `__attribute__' may be
+used, and the constructs to which attribute specifiers bind, for the C
+language.  Some details may vary for C++ and Objective-C.  Because of
+infelicities in the grammar for attributes, some forms described here
+may not be successfully parsed in all cases.
+
+ There are some problems with the semantics of attributes in C++.  For
+example, there are no manglings for attributes, although they may affect
+code generation, so problems may arise when attributed types are used in
+conjunction with templates or overloading.  Similarly, `typeid' does
+not distinguish between types with different attributes.  Support for
+attributes in C++ may be restricted in future to attributes on
+declarations only, but not on nested declarators.
+
+ *Note Function Attributes::, for details of the semantics of attributes
+applying to functions.  *Note Variable Attributes::, for details of the
+semantics of attributes applying to variables.  *Note Type Attributes::,
+for details of the semantics of attributes applying to structure, union
+and enumerated types.
+
+ An "attribute specifier" is of the form `__attribute__
+((ATTRIBUTE-LIST))'.  An "attribute list" is a possibly empty
+comma-separated sequence of "attributes", where each attribute is one
+of the following:
+
+   * Empty.  Empty attributes are ignored.
+
+   * A word (which may be an identifier such as `unused', or a reserved
+     word such as `const').
+
+   * A word, followed by, in parentheses, parameters for the attribute.
+     These parameters take one of the following forms:
+
+        * An identifier.  For example, `mode' attributes use this form.
+
+        * An identifier followed by a comma and a non-empty
+          comma-separated list of expressions.  For example, `format'
+          attributes use this form.
+
+        * A possibly empty comma-separated list of expressions.  For
+          example, `format_arg' attributes use this form with the list
+          being a single integer constant expression, and `alias'
+          attributes use this form with the list being a single string
+          constant.
+
+ An "attribute specifier list" is a sequence of one or more attribute
+specifiers, not separated by any other tokens.
+
+ In GNU C, an attribute specifier list may appear after the colon
+following a label, other than a `case' or `default' label.  The only
+attribute it makes sense to use after a label is `unused'.  This
+feature is intended for code generated by programs which contains labels
+that may be unused but which is compiled with `-Wall'.  It would not
+normally be appropriate to use in it human-written code, though it
+could be useful in cases where the code that jumps to the label is
+contained within an `#ifdef' conditional.  GNU C++ only permits
+attributes on labels if the attribute specifier is immediately followed
+by a semicolon (i.e., the label applies to an empty statement).  If the
+semicolon is missing, C++ label attributes are ambiguous, as it is
+permissible for a declaration, which could begin with an attribute
+list, to be labelled in C++.  Declarations cannot be labelled in C90 or
+C99, so the ambiguity does not arise there.
+
+ An attribute specifier list may appear as part of a `struct', `union'
+or `enum' specifier.  It may go either immediately after the `struct',
+`union' or `enum' keyword, or after the closing brace.  The former
+syntax is preferred.  Where attribute specifiers follow the closing
+brace, they are considered to relate to the structure, union or
+enumerated type defined, not to any enclosing declaration the type
+specifier appears in, and the type defined is not complete until after
+the attribute specifiers.
+
+ Otherwise, an attribute specifier appears as part of a declaration,
+counting declarations of unnamed parameters and type names, and relates
+to that declaration (which may be nested in another declaration, for
+example in the case of a parameter declaration), or to a particular
+declarator within a declaration.  Where an attribute specifier is
+applied to a parameter declared as a function or an array, it should
+apply to the function or array rather than the pointer to which the
+parameter is implicitly converted, but this is not yet correctly
+implemented.
+
+ Any list of specifiers and qualifiers at the start of a declaration may
+contain attribute specifiers, whether or not such a list may in that
+context contain storage class specifiers.  (Some attributes, however,
+are essentially in the nature of storage class specifiers, and only make
+sense where storage class specifiers may be used; for example,
+`section'.)  There is one necessary limitation to this syntax: the
+first old-style parameter declaration in a function definition cannot
+begin with an attribute specifier, because such an attribute applies to
+the function instead by syntax described below (which, however, is not
+yet implemented in this case).  In some other cases, attribute
+specifiers are permitted by this grammar but not yet supported by the
+compiler.  All attribute specifiers in this place relate to the
+declaration as a whole.  In the obsolescent usage where a type of `int'
+is implied by the absence of type specifiers, such a list of specifiers
+and qualifiers may be an attribute specifier list with no other
+specifiers or qualifiers.
+
+ At present, the first parameter in a function prototype must have some
+type specifier which is not an attribute specifier; this resolves an
+ambiguity in the interpretation of `void f(int (__attribute__((foo))
+x))', but is subject to change.  At present, if the parentheses of a
+function declarator contain only attributes then those attributes are
+ignored, rather than yielding an error or warning or implying a single
+parameter of type int, but this is subject to change.
+
+ An attribute specifier list may appear immediately before a declarator
+(other than the first) in a comma-separated list of declarators in a
+declaration of more than one identifier using a single list of
+specifiers and qualifiers.  Such attribute specifiers apply only to the
+identifier before whose declarator they appear.  For example, in
+
+     __attribute__((noreturn)) void d0 (void),
+         __attribute__((format(printf, 1, 2))) d1 (const char *, ...),
+          d2 (void)
+
+the `noreturn' attribute applies to all the functions declared; the
+`format' attribute only applies to `d1'.
+
+ An attribute specifier list may appear immediately before the comma,
+`=' or semicolon terminating the declaration of an identifier other
+than a function definition.  Such attribute specifiers apply to the
+declared object or function.  Where an assembler name for an object or
+function is specified (*note Asm Labels::), the attribute must follow
+the `asm' specification.
+
+ An attribute specifier list may, in future, be permitted to appear
+after the declarator in a function definition (before any old-style
+parameter declarations or the function body).
+
+ Attribute specifiers may be mixed with type qualifiers appearing inside
+the `[]' of a parameter array declarator, in the C99 construct by which
+such qualifiers are applied to the pointer to which the array is
+implicitly converted.  Such attribute specifiers apply to the pointer,
+not to the array, but at present this is not implemented and they are
+ignored.
+
+ An attribute specifier list may appear at the start of a nested
+declarator.  At present, there are some limitations in this usage: the
+attributes correctly apply to the declarator, but for most individual
+attributes the semantics this implies are not implemented.  When
+attribute specifiers follow the `*' of a pointer declarator, they may
+be mixed with any type qualifiers present.  The following describes the
+formal semantics of this syntax.  It will make the most sense if you
+are familiar with the formal specification of declarators in the ISO C
+standard.
+
+ Consider (as in C99 subclause 6.7.5 paragraph 4) a declaration `T D1',
+where `T' contains declaration specifiers that specify a type TYPE
+(such as `int') and `D1' is a declarator that contains an identifier
+IDENT.  The type specified for IDENT for derived declarators whose type
+does not include an attribute specifier is as in the ISO C standard.
+
+ If `D1' has the form `( ATTRIBUTE-SPECIFIER-LIST D )', and the
+declaration `T D' specifies the type "DERIVED-DECLARATOR-TYPE-LIST
+TYPE" for IDENT, then `T D1' specifies the type
+"DERIVED-DECLARATOR-TYPE-LIST ATTRIBUTE-SPECIFIER-LIST TYPE" for IDENT.
+
+ If `D1' has the form `* TYPE-QUALIFIER-AND-ATTRIBUTE-SPECIFIER-LIST
+D', and the declaration `T D' specifies the type
+"DERIVED-DECLARATOR-TYPE-LIST TYPE" for IDENT, then `T D1' specifies
+the type "DERIVED-DECLARATOR-TYPE-LIST
+TYPE-QUALIFIER-AND-ATTRIBUTE-SPECIFIER-LIST pointer to TYPE" for IDENT.
+
+ For example,
+
+     void (__attribute__((noreturn)) ****f) (void);
+
+specifies the type "pointer to pointer to pointer to pointer to
+non-returning function returning `void'".  As another example,
+
+     char *__attribute__((aligned(8))) *f;
+
+specifies the type "pointer to 8-byte-aligned pointer to `char'".  Note
+again that this does not work with most attributes; for example, the
+usage of `aligned' and `noreturn' attributes given above is not yet
+supported.
+
+ For compatibility with existing code written for compiler versions that
+did not implement attributes on nested declarators, some laxity is
+allowed in the placing of attributes.  If an attribute that only applies
+to types is applied to a declaration, it will be treated as applying to
+the type of that declaration.  If an attribute that only applies to
+declarations is applied to the type of a declaration, it will be treated
+as applying to that declaration; and, for compatibility with code
+placing the attributes immediately before the identifier declared, such
+an attribute applied to a function return type will be treated as
+applying to the function type, and such an attribute applied to an array
+element type will be treated as applying to the array type.  If an
+attribute that only applies to function types is applied to a
+pointer-to-function type, it will be treated as applying to the pointer
+target type; if such an attribute is applied to a function return type
+that is not a pointer-to-function type, it will be treated as applying
+to the function type.
+
+
+File: gcc.info,  Node: Function Prototypes,  Next: C++ Comments,  Prev: Attribute Syntax,  Up: C Extensions
+
+6.32 Prototypes and Old-Style Function Definitions
+==================================================
+
+GNU C extends ISO C to allow a function prototype to override a later
+old-style non-prototype definition.  Consider the following example:
+
+     /* Use prototypes unless the compiler is old-fashioned.  */
+     #ifdef __STDC__
+     #define P(x) x
+     #else
+     #define P(x) ()
+     #endif
+
+     /* Prototype function declaration.  */
+     int isroot P((uid_t));
+
+     /* Old-style function definition.  */
+     int
+     isroot (x)   /* ??? lossage here ??? */
+          uid_t x;
+     {
+       return x == 0;
+     }
+
+ Suppose the type `uid_t' happens to be `short'.  ISO C does not allow
+this example, because subword arguments in old-style non-prototype
+definitions are promoted.  Therefore in this example the function
+definition's argument is really an `int', which does not match the
+prototype argument type of `short'.
+
+ This restriction of ISO C makes it hard to write code that is portable
+to traditional C compilers, because the programmer does not know
+whether the `uid_t' type is `short', `int', or `long'.  Therefore, in
+cases like these GNU C allows a prototype to override a later old-style
+definition.  More precisely, in GNU C, a function prototype argument
+type overrides the argument type specified by a later old-style
+definition if the former type is the same as the latter type before
+promotion.  Thus in GNU C the above example is equivalent to the
+following:
+
+     int isroot (uid_t);
+
+     int
+     isroot (uid_t x)
+     {
+       return x == 0;
+     }
+
+GNU C++ does not support old-style function definitions, so this
+extension is irrelevant.
+
+
+File: gcc.info,  Node: C++ Comments,  Next: Dollar Signs,  Prev: Function Prototypes,  Up: C Extensions
+
+6.33 C++ Style Comments
+=======================
+
+In GNU C, you may use C++ style comments, which start with `//' and
+continue until the end of the line.  Many other C implementations allow
+such comments, and they are included in the 1999 C standard.  However,
+C++ style comments are not recognized if you specify an `-std' option
+specifying a version of ISO C before C99, or `-ansi' (equivalent to
+`-std=c90').
+
+
+File: gcc.info,  Node: Dollar Signs,  Next: Character Escapes,  Prev: C++ Comments,  Up: C Extensions
+
+6.34 Dollar Signs in Identifier Names
+=====================================
+
+In GNU C, you may normally use dollar signs in identifier names.  This
+is because many traditional C implementations allow such identifiers.
+However, dollar signs in identifiers are not supported on a few target
+machines, typically because the target assembler does not allow them.
+
+
+File: gcc.info,  Node: Character Escapes,  Next: Variable Attributes,  Prev: Dollar Signs,  Up: C Extensions
+
+6.35 The Character <ESC> in Constants
+=====================================
+
+You can use the sequence `\e' in a string or character constant to
+stand for the ASCII character <ESC>.
+
+
+File: gcc.info,  Node: Variable Attributes,  Next: Type Attributes,  Prev: Character Escapes,  Up: C Extensions
+
+6.36 Specifying Attributes of Variables
+=======================================
+
+The keyword `__attribute__' allows you to specify special attributes of
+variables or structure fields.  This keyword is followed by an
+attribute specification inside double parentheses.  Some attributes are
+currently defined generically for variables.  Other attributes are
+defined for variables on particular target systems.  Other attributes
+are available for functions (*note Function Attributes::) and for types
+(*note Type Attributes::).  Other front ends might define more
+attributes (*note Extensions to the C++ Language: C++ Extensions.).
+
+ You may also specify attributes with `__' preceding and following each
+keyword.  This allows you to use them in header files without being
+concerned about a possible macro of the same name.  For example, you
+may use `__aligned__' instead of `aligned'.
+
+ *Note Attribute Syntax::, for details of the exact syntax for using
+attributes.
+
+`aligned (ALIGNMENT)'
+     This attribute specifies a minimum alignment for the variable or
+     structure field, measured in bytes.  For example, the declaration:
+
+          int x __attribute__ ((aligned (16))) = 0;
+
+     causes the compiler to allocate the global variable `x' on a
+     16-byte boundary.  On a 68040, this could be used in conjunction
+     with an `asm' expression to access the `move16' instruction which
+     requires 16-byte aligned operands.
+
+     You can also specify the alignment of structure fields.  For
+     example, to create a double-word aligned `int' pair, you could
+     write:
+
+          struct foo { int x[2] __attribute__ ((aligned (8))); };
+
+     This is an alternative to creating a union with a `double' member
+     that forces the union to be double-word aligned.
+
+     As in the preceding examples, you can explicitly specify the
+     alignment (in bytes) that you wish the compiler to use for a given
+     variable or structure field.  Alternatively, you can leave out the
+     alignment factor and just ask the compiler to align a variable or
+     field to the default alignment for the target architecture you are
+     compiling for.  The default alignment is sufficient for all scalar
+     types, but may not be enough for all vector types on a target
+     which supports vector operations.  The default alignment is fixed
+     for a particular target ABI.
+
+     Gcc also provides a target specific macro `__BIGGEST_ALIGNMENT__',
+     which is the largest alignment ever used for any data type on the
+     target machine you are compiling for.  For example, you could
+     write:
+
+          short array[3] __attribute__ ((aligned (__BIGGEST_ALIGNMENT__)));
+
+     The compiler automatically sets the alignment for the declared
+     variable or field to `__BIGGEST_ALIGNMENT__'.  Doing this can
+     often make copy operations more efficient, because the compiler can
+     use whatever instructions copy the biggest chunks of memory when
+     performing copies to or from the variables or fields that you have
+     aligned this way.  Note that the value of `__BIGGEST_ALIGNMENT__'
+     may change depending on command line options.
+
+     When used on a struct, or struct member, the `aligned' attribute
+     can only increase the alignment; in order to decrease it, the
+     `packed' attribute must be specified as well.  When used as part
+     of a typedef, the `aligned' attribute can both increase and
+     decrease alignment, and specifying the `packed' attribute will
+     generate a warning.
+
+     Note that the effectiveness of `aligned' attributes may be limited
+     by inherent limitations in your linker.  On many systems, the
+     linker is only able to arrange for variables to be aligned up to a
+     certain maximum alignment.  (For some linkers, the maximum
+     supported alignment may be very very small.)  If your linker is
+     only able to align variables up to a maximum of 8 byte alignment,
+     then specifying `aligned(16)' in an `__attribute__' will still
+     only provide you with 8 byte alignment.  See your linker
+     documentation for further information.
+
+     The `aligned' attribute can also be used for functions (*note
+     Function Attributes::.)
+
+`cleanup (CLEANUP_FUNCTION)'
+     The `cleanup' attribute runs a function when the variable goes out
+     of scope.  This attribute can only be applied to auto function
+     scope variables; it may not be applied to parameters or variables
+     with static storage duration.  The function must take one
+     parameter, a pointer to a type compatible with the variable.  The
+     return value of the function (if any) is ignored.
+
+     If `-fexceptions' is enabled, then CLEANUP_FUNCTION will be run
+     during the stack unwinding that happens during the processing of
+     the exception.  Note that the `cleanup' attribute does not allow
+     the exception to be caught, only to perform an action.  It is
+     undefined what happens if CLEANUP_FUNCTION does not return
+     normally.
+
+`common'
+`nocommon'
+     The `common' attribute requests GCC to place a variable in
+     "common" storage.  The `nocommon' attribute requests the
+     opposite--to allocate space for it directly.
+
+     These attributes override the default chosen by the `-fno-common'
+     and `-fcommon' flags respectively.
+
+`deprecated'
+`deprecated (MSG)'
+     The `deprecated' attribute results in a warning if the variable is
+     used anywhere in the source file.  This is useful when identifying
+     variables that are expected to be removed in a future version of a
+     program.  The warning also includes the location of the declaration
+     of the deprecated variable, to enable users to easily find further
+     information about why the variable is deprecated, or what they
+     should do instead.  Note that the warning only occurs for uses:
+
+          extern int old_var __attribute__ ((deprecated));
+          extern int old_var;
+          int new_fn () { return old_var; }
+
+     results in a warning on line 3 but not line 2.  The optional msg
+     argument, which must be a string, will be printed in the warning if
+     present.
+
+     The `deprecated' attribute can also be used for functions and
+     types (*note Function Attributes::, *note Type Attributes::.)
+
+`mode (MODE)'
+     This attribute specifies the data type for the
+     declaration--whichever type corresponds to the mode MODE.  This in
+     effect lets you request an integer or floating point type
+     according to its width.
+
+     You may also specify a mode of `byte' or `__byte__' to indicate
+     the mode corresponding to a one-byte integer, `word' or `__word__'
+     for the mode of a one-word integer, and `pointer' or `__pointer__'
+     for the mode used to represent pointers.
+
+`packed'
+     The `packed' attribute specifies that a variable or structure field
+     should have the smallest possible alignment--one byte for a
+     variable, and one bit for a field, unless you specify a larger
+     value with the `aligned' attribute.
+
+     Here is a structure in which the field `x' is packed, so that it
+     immediately follows `a':
+
+          struct foo
+          {
+            char a;
+            int x[2] __attribute__ ((packed));
+          };
+
+     _Note:_ The 4.1, 4.2 and 4.3 series of GCC ignore the `packed'
+     attribute on bit-fields of type `char'.  This has been fixed in
+     GCC 4.4 but the change can lead to differences in the structure
+     layout.  See the documentation of `-Wpacked-bitfield-compat' for
+     more information.
+
+`section ("SECTION-NAME")'
+     Normally, the compiler places the objects it generates in sections
+     like `data' and `bss'.  Sometimes, however, you need additional
+     sections, or you need certain particular variables to appear in
+     special sections, for example to map to special hardware.  The
+     `section' attribute specifies that a variable (or function) lives
+     in a particular section.  For example, this small program uses
+     several specific section names:
+
+          struct duart a __attribute__ ((section ("DUART_A"))) = { 0 };
+          struct duart b __attribute__ ((section ("DUART_B"))) = { 0 };
+          char stack[10000] __attribute__ ((section ("STACK"))) = { 0 };
+          int init_data __attribute__ ((section ("INITDATA")));
+
+          main()
+          {
+            /* Initialize stack pointer */
+            init_sp (stack + sizeof (stack));
+
+            /* Initialize initialized data */
+            memcpy (&init_data, &data, &edata - &data);
+
+            /* Turn on the serial ports */
+            init_duart (&a);
+            init_duart (&b);
+          }
+
+     Use the `section' attribute with _global_ variables and not
+     _local_ variables, as shown in the example.
+
+     You may use the `section' attribute with initialized or
+     uninitialized global variables but the linker requires each object
+     be defined once, with the exception that uninitialized variables
+     tentatively go in the `common' (or `bss') section and can be
+     multiply "defined".  Using the `section' attribute will change
+     what section the variable goes into and may cause the linker to
+     issue an error if an uninitialized variable has multiple
+     definitions.  You can force a variable to be initialized with the
+     `-fno-common' flag or the `nocommon' attribute.
+
+     Some file formats do not support arbitrary sections so the
+     `section' attribute is not available on all platforms.  If you
+     need to map the entire contents of a module to a particular
+     section, consider using the facilities of the linker instead.
+
+`shared'
+     On Microsoft Windows, in addition to putting variable definitions
+     in a named section, the section can also be shared among all
+     running copies of an executable or DLL.  For example, this small
+     program defines shared data by putting it in a named section
+     `shared' and marking the section shareable:
+
+          int foo __attribute__((section ("shared"), shared)) = 0;
+
+          int
+          main()
+          {
+            /* Read and write foo.  All running
+               copies see the same value.  */
+            return 0;
+          }
+
+     You may only use the `shared' attribute along with `section'
+     attribute with a fully initialized global definition because of
+     the way linkers work.  See `section' attribute for more
+     information.
+
+     The `shared' attribute is only available on Microsoft Windows.
+
+`tls_model ("TLS_MODEL")'
+     The `tls_model' attribute sets thread-local storage model (*note
+     Thread-Local::) of a particular `__thread' variable, overriding
+     `-ftls-model=' command-line switch on a per-variable basis.  The
+     TLS_MODEL argument should be one of `global-dynamic',
+     `local-dynamic', `initial-exec' or `local-exec'.
+
+     Not all targets support this attribute.
+
+`unused'
+     This attribute, attached to a variable, means that the variable is
+     meant to be possibly unused.  GCC will not produce a warning for
+     this variable.
+
+`used'
+     This attribute, attached to a variable, means that the variable
+     must be emitted even if it appears that the variable is not
+     referenced.
+
+`vector_size (BYTES)'
+     This attribute specifies the vector size for the variable,
+     measured in bytes.  For example, the declaration:
+
+          int foo __attribute__ ((vector_size (16)));
+
+     causes the compiler to set the mode for `foo', to be 16 bytes,
+     divided into `int' sized units.  Assuming a 32-bit int (a vector of
+     4 units of 4 bytes), the corresponding mode of `foo' will be V4SI.
+
+     This attribute is only applicable to integral and float scalars,
+     although arrays, pointers, and function return values are allowed
+     in conjunction with this construct.
+
+     Aggregates with this attribute are invalid, even if they are of
+     the same size as a corresponding scalar.  For example, the
+     declaration:
+
+          struct S { int a; };
+          struct S  __attribute__ ((vector_size (16))) foo;
+
+     is invalid even if the size of the structure is the same as the
+     size of the `int'.
+
+`selectany'
+     The `selectany' attribute causes an initialized global variable to
+     have link-once semantics.  When multiple definitions of the
+     variable are encountered by the linker, the first is selected and
+     the remainder are discarded.  Following usage by the Microsoft
+     compiler, the linker is told _not_ to warn about size or content
+     differences of the multiple definitions.
+
+     Although the primary usage of this attribute is for POD types, the
+     attribute can also be applied to global C++ objects that are
+     initialized by a constructor.  In this case, the static
+     initialization and destruction code for the object is emitted in
+     each translation defining the object, but the calls to the
+     constructor and destructor are protected by a link-once guard
+     variable.
+
+     The `selectany' attribute is only available on Microsoft Windows
+     targets.  You can use `__declspec (selectany)' as a synonym for
+     `__attribute__ ((selectany))' for compatibility with other
+     compilers.
+
+`weak'
+     The `weak' attribute is described in *note Function Attributes::.
+
+`dllimport'
+     The `dllimport' attribute is described in *note Function
+     Attributes::.
+
+`dllexport'
+     The `dllexport' attribute is described in *note Function
+     Attributes::.
+
+
+6.36.1 AVR Variable Attributes
+------------------------------
+
+`progmem'
+     The `progmem' attribute is used on the AVR to place data in the
+     program memory address space (flash). This is accomplished by
+     putting respective variables into a section whose name starts with
+     `.progmem'.
+
+     AVR is a Harvard architecture processor and data and reas only data
+     normally resides in the data memory address space (RAM).
+
+6.36.2 Blackfin Variable Attributes
+-----------------------------------
+
+Three attributes are currently defined for the Blackfin.
+
+`l1_data'
+`l1_data_A'
+`l1_data_B'
+     Use these attributes on the Blackfin to place the variable into L1
+     Data SRAM.  Variables with `l1_data' attribute will be put into
+     the specific section named `.l1.data'. Those with `l1_data_A'
+     attribute will be put into the specific section named
+     `.l1.data.A'. Those with `l1_data_B' attribute will be put into
+     the specific section named `.l1.data.B'.
+
+`l2'
+     Use this attribute on the Blackfin to place the variable into L2
+     SRAM.  Variables with `l2' attribute will be put into the specific
+     section named `.l2.data'.
+
+6.36.3 M32R/D Variable Attributes
+---------------------------------
+
+One attribute is currently defined for the M32R/D.
+
+`model (MODEL-NAME)'
+     Use this attribute on the M32R/D to set the addressability of an
+     object.  The identifier MODEL-NAME is one of `small', `medium', or
+     `large', representing each of the code models.
+
+     Small model objects live in the lower 16MB of memory (so that their
+     addresses can be loaded with the `ld24' instruction).
+
+     Medium and large model objects may live anywhere in the 32-bit
+     address space (the compiler will generate `seth/add3' instructions
+     to load their addresses).
+
+6.36.4 MeP Variable Attributes
+------------------------------
+
+The MeP target has a number of addressing modes and busses.  The `near'
+space spans the standard memory space's first 16 megabytes (24 bits).
+The `far' space spans the entire 32-bit memory space.  The `based'
+space is a 128 byte region in the memory space which is addressed
+relative to the `$tp' register.  The `tiny' space is a 65536 byte
+region relative to the `$gp' register.  In addition to these memory
+regions, the MeP target has a separate 16-bit control bus which is
+specified with `cb' attributes.
+
+`based'
+     Any variable with the `based' attribute will be assigned to the
+     `.based' section, and will be accessed with relative to the `$tp'
+     register.
+
+`tiny'
+     Likewise, the `tiny' attribute assigned variables to the `.tiny'
+     section, relative to the `$gp' register.
+
+`near'
+     Variables with the `near' attribute are assumed to have addresses
+     that fit in a 24-bit addressing mode.  This is the default for
+     large variables (`-mtiny=4' is the default) but this attribute can
+     override `-mtiny=' for small variables, or override `-ml'.
+
+`far'
+     Variables with the `far' attribute are addressed using a full
+     32-bit address.  Since this covers the entire memory space, this
+     allows modules to make no assumptions about where variables might
+     be stored.
+
+`io'
+`io (ADDR)'
+     Variables with the `io' attribute are used to address
+     memory-mapped peripherals.  If an address is specified, the
+     variable is assigned that address, else it is not assigned an
+     address (it is assumed some other module will assign an address).
+     Example:
+
+          int timer_count __attribute__((io(0x123)));
+
+`cb'
+`cb (ADDR)'
+     Variables with the `cb' attribute are used to access the control
+     bus, using special instructions.  `addr' indicates the control bus
+     address.  Example:
+
+          int cpu_clock __attribute__((cb(0x123)));
+
+
+6.36.5 i386 Variable Attributes
+-------------------------------
+
+Two attributes are currently defined for i386 configurations:
+`ms_struct' and `gcc_struct'
+
+`ms_struct'
+`gcc_struct'
+     If `packed' is used on a structure, or if bit-fields are used it
+     may be that the Microsoft ABI packs them differently than GCC
+     would normally pack them.  Particularly when moving packed data
+     between functions compiled with GCC and the native Microsoft
+     compiler (either via function call or as data in a file), it may
+     be necessary to access either format.
+
+     Currently `-m[no-]ms-bitfields' is provided for the Microsoft
+     Windows X86 compilers to match the native Microsoft compiler.
+
+     The Microsoft structure layout algorithm is fairly simple with the
+     exception of the bitfield packing:
+
+     The padding and alignment of members of structures and whether a
+     bit field can straddle a storage-unit boundary
+
+       1. Structure members are stored sequentially in the order in
+          which they are declared: the first member has the lowest
+          memory address and the last member the highest.
+
+       2. Every data object has an alignment-requirement. The
+          alignment-requirement for all data except structures, unions,
+          and arrays is either the size of the object or the current
+          packing size (specified with either the aligned attribute or
+          the pack pragma), whichever is less. For structures,  unions,
+          and arrays, the alignment-requirement is the largest
+          alignment-requirement of its members.  Every object is
+          allocated an offset so that:
+
+          offset %  alignment-requirement == 0
+
+       3. Adjacent bit fields are packed into the same 1-, 2-, or
+          4-byte allocation unit if the integral types are the same
+          size and if the next bit field fits into the current
+          allocation unit without crossing the boundary imposed by the
+          common alignment requirements of the bit fields.
+
+     Handling of zero-length bitfields:
+
+     MSVC interprets zero-length bitfields in the following ways:
+
+       1. If a zero-length bitfield is inserted between two bitfields
+          that would normally be coalesced, the bitfields will not be
+          coalesced.
+
+          For example:
+
+               struct
+                {
+                  unsigned long bf_1 : 12;
+                  unsigned long : 0;
+                  unsigned long bf_2 : 12;
+                } t1;
+
+          The size of `t1' would be 8 bytes with the zero-length
+          bitfield.  If the zero-length bitfield were removed, `t1''s
+          size would be 4 bytes.
+
+       2. If a zero-length bitfield is inserted after a bitfield,
+          `foo', and the alignment of the zero-length bitfield is
+          greater than the member that follows it, `bar', `bar' will be
+          aligned as the type of the zero-length bitfield.
+
+          For example:
+
+               struct
+                {
+                  char foo : 4;
+                  short : 0;
+                  char bar;
+                } t2;
+
+               struct
+                {
+                  char foo : 4;
+                  short : 0;
+                  double bar;
+                } t3;
+
+          For `t2', `bar' will be placed at offset 2, rather than
+          offset 1.  Accordingly, the size of `t2' will be 4.  For
+          `t3', the zero-length bitfield will not affect the alignment
+          of `bar' or, as a result, the size of the structure.
+
+          Taking this into account, it is important to note the
+          following:
+
+            1. If a zero-length bitfield follows a normal bitfield, the
+               type of the zero-length bitfield may affect the
+               alignment of the structure as whole. For example, `t2'
+               has a size of 4 bytes, since the zero-length bitfield
+               follows a normal bitfield, and is of type short.
+
+            2. Even if a zero-length bitfield is not followed by a
+               normal bitfield, it may still affect the alignment of
+               the structure:
+
+                    struct
+                     {
+                       char foo : 6;
+                       long : 0;
+                     } t4;
+
+               Here, `t4' will take up 4 bytes.
+
+       3. Zero-length bitfields following non-bitfield members are
+          ignored:
+
+               struct
+                {
+                  char foo;
+                  long : 0;
+                  char bar;
+                } t5;
+
+          Here, `t5' will take up 2 bytes.
+
+6.36.6 PowerPC Variable Attributes
+----------------------------------
+
+Three attributes currently are defined for PowerPC configurations:
+`altivec', `ms_struct' and `gcc_struct'.
+
+ For full documentation of the struct attributes please see the
+documentation in *note i386 Variable Attributes::.
+
+ For documentation of `altivec' attribute please see the documentation
+in *note PowerPC Type Attributes::.
+
+6.36.7 SPU Variable Attributes
+------------------------------
+
+The SPU supports the `spu_vector' attribute for variables.  For
+documentation of this attribute please see the documentation in *note
+SPU Type Attributes::.
+
+6.36.8 Xstormy16 Variable Attributes
+------------------------------------
+
+One attribute is currently defined for xstormy16 configurations:
+`below100'.
+
+`below100'
+     If a variable has the `below100' attribute (`BELOW100' is allowed
+     also), GCC will place the variable in the first 0x100 bytes of
+     memory and use special opcodes to access it.  Such variables will
+     be placed in either the `.bss_below100' section or the
+     `.data_below100' section.
+
+
+
+File: gcc.info,  Node: Type Attributes,  Next: Alignment,  Prev: Variable Attributes,  Up: C Extensions
+
+6.37 Specifying Attributes of Types
+===================================
+
+The keyword `__attribute__' allows you to specify special attributes of
+`struct' and `union' types when you define such types.  This keyword is
+followed by an attribute specification inside double parentheses.
+Seven attributes are currently defined for types: `aligned', `packed',
+`transparent_union', `unused', `deprecated', `visibility', and
+`may_alias'.  Other attributes are defined for functions (*note
+Function Attributes::) and for variables (*note Variable Attributes::).
+
+ You may also specify any one of these attributes with `__' preceding
+and following its keyword.  This allows you to use these attributes in
+header files without being concerned about a possible macro of the same
+name.  For example, you may use `__aligned__' instead of `aligned'.
+
+ You may specify type attributes in an enum, struct or union type
+declaration or definition, or for other types in a `typedef'
+declaration.
+
+ For an enum, struct or union type, you may specify attributes either
+between the enum, struct or union tag and the name of the type, or just
+past the closing curly brace of the _definition_.  The former syntax is
+preferred.
+
+ *Note Attribute Syntax::, for details of the exact syntax for using
+attributes.
+
+`aligned (ALIGNMENT)'
+     This attribute specifies a minimum alignment (in bytes) for
+     variables of the specified type.  For example, the declarations:
+
+          struct S { short f[3]; } __attribute__ ((aligned (8)));
+          typedef int more_aligned_int __attribute__ ((aligned (8)));
+
+     force the compiler to insure (as far as it can) that each variable
+     whose type is `struct S' or `more_aligned_int' will be allocated
+     and aligned _at least_ on a 8-byte boundary.  On a SPARC, having
+     all variables of type `struct S' aligned to 8-byte boundaries
+     allows the compiler to use the `ldd' and `std' (doubleword load and
+     store) instructions when copying one variable of type `struct S' to
+     another, thus improving run-time efficiency.
+
+     Note that the alignment of any given `struct' or `union' type is
+     required by the ISO C standard to be at least a perfect multiple of
+     the lowest common multiple of the alignments of all of the members
+     of the `struct' or `union' in question.  This means that you _can_
+     effectively adjust the alignment of a `struct' or `union' type by
+     attaching an `aligned' attribute to any one of the members of such
+     a type, but the notation illustrated in the example above is a
+     more obvious, intuitive, and readable way to request the compiler
+     to adjust the alignment of an entire `struct' or `union' type.
+
+     As in the preceding example, you can explicitly specify the
+     alignment (in bytes) that you wish the compiler to use for a given
+     `struct' or `union' type.  Alternatively, you can leave out the
+     alignment factor and just ask the compiler to align a type to the
+     maximum useful alignment for the target machine you are compiling
+     for.  For example, you could write:
+
+          struct S { short f[3]; } __attribute__ ((aligned));
+
+     Whenever you leave out the alignment factor in an `aligned'
+     attribute specification, the compiler automatically sets the
+     alignment for the type to the largest alignment which is ever used
+     for any data type on the target machine you are compiling for.
+     Doing this can often make copy operations more efficient, because
+     the compiler can use whatever instructions copy the biggest chunks
+     of memory when performing copies to or from the variables which
+     have types that you have aligned this way.
+
+     In the example above, if the size of each `short' is 2 bytes, then
+     the size of the entire `struct S' type is 6 bytes.  The smallest
+     power of two which is greater than or equal to that is 8, so the
+     compiler sets the alignment for the entire `struct S' type to 8
+     bytes.
+
+     Note that although you can ask the compiler to select a
+     time-efficient alignment for a given type and then declare only
+     individual stand-alone objects of that type, the compiler's
+     ability to select a time-efficient alignment is primarily useful
+     only when you plan to create arrays of variables having the
+     relevant (efficiently aligned) type.  If you declare or use arrays
+     of variables of an efficiently-aligned type, then it is likely
+     that your program will also be doing pointer arithmetic (or
+     subscripting, which amounts to the same thing) on pointers to the
+     relevant type, and the code that the compiler generates for these
+     pointer arithmetic operations will often be more efficient for
+     efficiently-aligned types than for other types.
+
+     The `aligned' attribute can only increase the alignment; but you
+     can decrease it by specifying `packed' as well.  See below.
+
+     Note that the effectiveness of `aligned' attributes may be limited
+     by inherent limitations in your linker.  On many systems, the
+     linker is only able to arrange for variables to be aligned up to a
+     certain maximum alignment.  (For some linkers, the maximum
+     supported alignment may be very very small.)  If your linker is
+     only able to align variables up to a maximum of 8 byte alignment,
+     then specifying `aligned(16)' in an `__attribute__' will still
+     only provide you with 8 byte alignment.  See your linker
+     documentation for further information.
+
+`packed'
+     This attribute, attached to `struct' or `union' type definition,
+     specifies that each member (other than zero-width bitfields) of
+     the structure or union is placed to minimize the memory required.
+     When attached to an `enum' definition, it indicates that the
+     smallest integral type should be used.
+
+     Specifying this attribute for `struct' and `union' types is
+     equivalent to specifying the `packed' attribute on each of the
+     structure or union members.  Specifying the `-fshort-enums' flag
+     on the line is equivalent to specifying the `packed' attribute on
+     all `enum' definitions.
+
+     In the following example `struct my_packed_struct''s members are
+     packed closely together, but the internal layout of its `s' member
+     is not packed--to do that, `struct my_unpacked_struct' would need
+     to be packed too.
+
+          struct my_unpacked_struct
+           {
+              char c;
+              int i;
+           };
+
+          struct __attribute__ ((__packed__)) my_packed_struct
+            {
+               char c;
+               int  i;
+               struct my_unpacked_struct s;
+            };
+
+     You may only specify this attribute on the definition of an `enum',
+     `struct' or `union', not on a `typedef' which does not also define
+     the enumerated type, structure or union.
+
+`transparent_union'
+     This attribute, attached to a `union' type definition, indicates
+     that any function parameter having that union type causes calls to
+     that function to be treated in a special way.
+
+     First, the argument corresponding to a transparent union type can
+     be of any type in the union; no cast is required.  Also, if the
+     union contains a pointer type, the corresponding argument can be a
+     null pointer constant or a void pointer expression; and if the
+     union contains a void pointer type, the corresponding argument can
+     be any pointer expression.  If the union member type is a pointer,
+     qualifiers like `const' on the referenced type must be respected,
+     just as with normal pointer conversions.
+
+     Second, the argument is passed to the function using the calling
+     conventions of the first member of the transparent union, not the
+     calling conventions of the union itself.  All members of the union
+     must have the same machine representation; this is necessary for
+     this argument passing to work properly.
+
+     Transparent unions are designed for library functions that have
+     multiple interfaces for compatibility reasons.  For example,
+     suppose the `wait' function must accept either a value of type
+     `int *' to comply with Posix, or a value of type `union wait *' to
+     comply with the 4.1BSD interface.  If `wait''s parameter were
+     `void *', `wait' would accept both kinds of arguments, but it
+     would also accept any other pointer type and this would make
+     argument type checking less useful.  Instead, `<sys/wait.h>' might
+     define the interface as follows:
+
+          typedef union __attribute__ ((__transparent_union__))
+            {
+              int *__ip;
+              union wait *__up;
+            } wait_status_ptr_t;
+
+          pid_t wait (wait_status_ptr_t);
+
+     This interface allows either `int *' or `union wait *' arguments
+     to be passed, using the `int *' calling convention.  The program
+     can call `wait' with arguments of either type:
+
+          int w1 () { int w; return wait (&w); }
+          int w2 () { union wait w; return wait (&w); }
+
+     With this interface, `wait''s implementation might look like this:
+
+          pid_t wait (wait_status_ptr_t p)
+          {
+            return waitpid (-1, p.__ip, 0);
+          }
+
+`unused'
+     When attached to a type (including a `union' or a `struct'), this
+     attribute means that variables of that type are meant to appear
+     possibly unused.  GCC will not produce a warning for any variables
+     of that type, even if the variable appears to do nothing.  This is
+     often the case with lock or thread classes, which are usually
+     defined and then not referenced, but contain constructors and
+     destructors that have nontrivial bookkeeping functions.
+
+`deprecated'
+`deprecated (MSG)'
+     The `deprecated' attribute results in a warning if the type is
+     used anywhere in the source file.  This is useful when identifying
+     types that are expected to be removed in a future version of a
+     program.  If possible, the warning also includes the location of
+     the declaration of the deprecated type, to enable users to easily
+     find further information about why the type is deprecated, or what
+     they should do instead.  Note that the warnings only occur for
+     uses and then only if the type is being applied to an identifier
+     that itself is not being declared as deprecated.
+
+          typedef int T1 __attribute__ ((deprecated));
+          T1 x;
+          typedef T1 T2;
+          T2 y;
+          typedef T1 T3 __attribute__ ((deprecated));
+          T3 z __attribute__ ((deprecated));
+
+     results in a warning on line 2 and 3 but not lines 4, 5, or 6.  No
+     warning is issued for line 4 because T2 is not explicitly
+     deprecated.  Line 5 has no warning because T3 is explicitly
+     deprecated.  Similarly for line 6.  The optional msg argument,
+     which must be a string, will be printed in the warning if present.
+
+     The `deprecated' attribute can also be used for functions and
+     variables (*note Function Attributes::, *note Variable
+     Attributes::.)
+
+`may_alias'
+     Accesses through pointers to types with this attribute are not
+     subject to type-based alias analysis, but are instead assumed to
+     be able to alias any other type of objects.  In the context of
+     6.5/7 an lvalue expression dereferencing such a pointer is treated
+     like having a character type.  See `-fstrict-aliasing' for more
+     information on aliasing issues.  This extension exists to support
+     some vector APIs, in which pointers to one vector type are
+     permitted to alias pointers to a different vector type.
+
+     Note that an object of a type with this attribute does not have any
+     special semantics.
+
+     Example of use:
+
+          typedef short __attribute__((__may_alias__)) short_a;
+
+          int
+          main (void)
+          {
+            int a = 0x12345678;
+            short_a *b = (short_a *) &a;
+
+            b[1] = 0;
+
+            if (a == 0x12345678)
+              abort();
+
+            exit(0);
+          }
+
+     If you replaced `short_a' with `short' in the variable
+     declaration, the above program would abort when compiled with
+     `-fstrict-aliasing', which is on by default at `-O2' or above in
+     recent GCC versions.
+
+`visibility'
+     In C++, attribute visibility (*note Function Attributes::) can
+     also be applied to class, struct, union and enum types.  Unlike
+     other type attributes, the attribute must appear between the
+     initial keyword and the name of the type; it cannot appear after
+     the body of the type.
+
+     Note that the type visibility is applied to vague linkage entities
+     associated with the class (vtable, typeinfo node, etc.).  In
+     particular, if a class is thrown as an exception in one shared
+     object and caught in another, the class must have default
+     visibility.  Otherwise the two shared objects will be unable to
+     use the same typeinfo node and exception handling will break.
+
+
+6.37.1 ARM Type Attributes
+--------------------------
+
+On those ARM targets that support `dllimport' (such as Symbian OS), you
+can use the `notshared' attribute to indicate that the virtual table
+and other similar data for a class should not be exported from a DLL.
+For example:
+
+     class __declspec(notshared) C {
+     public:
+       __declspec(dllimport) C();
+       virtual void f();
+     }
+
+     __declspec(dllexport)
+     C::C() {}
+
+ In this code, `C::C' is exported from the current DLL, but the virtual
+table for `C' is not exported.  (You can use `__attribute__' instead of
+`__declspec' if you prefer, but most Symbian OS code uses `__declspec'.)
+
+6.37.2 MeP Type Attributes
+--------------------------
+
+Many of the MeP variable attributes may be applied to types as well.
+Specifically, the `based', `tiny', `near', and `far' attributes may be
+applied to either.  The `io' and `cb' attributes may not be applied to
+types.
+
+6.37.3 i386 Type Attributes
+---------------------------
+
+Two attributes are currently defined for i386 configurations:
+`ms_struct' and `gcc_struct'.
+
+`ms_struct'
+`gcc_struct'
+     If `packed' is used on a structure, or if bit-fields are used it
+     may be that the Microsoft ABI packs them differently than GCC
+     would normally pack them.  Particularly when moving packed data
+     between functions compiled with GCC and the native Microsoft
+     compiler (either via function call or as data in a file), it may
+     be necessary to access either format.
+
+     Currently `-m[no-]ms-bitfields' is provided for the Microsoft
+     Windows X86 compilers to match the native Microsoft compiler.
+
+ To specify multiple attributes, separate them by commas within the
+double parentheses: for example, `__attribute__ ((aligned (16),
+packed))'.
+
+6.37.4 PowerPC Type Attributes
+------------------------------
+
+Three attributes currently are defined for PowerPC configurations:
+`altivec', `ms_struct' and `gcc_struct'.
+
+ For full documentation of the `ms_struct' and `gcc_struct' attributes
+please see the documentation in *note i386 Type Attributes::.
+
+ The `altivec' attribute allows one to declare AltiVec vector data
+types supported by the AltiVec Programming Interface Manual.  The
+attribute requires an argument to specify one of three vector types:
+`vector__', `pixel__' (always followed by unsigned short), and `bool__'
+(always followed by unsigned).
+
+     __attribute__((altivec(vector__)))
+     __attribute__((altivec(pixel__))) unsigned short
+     __attribute__((altivec(bool__))) unsigned
+
+ These attributes mainly are intended to support the `__vector',
+`__pixel', and `__bool' AltiVec keywords.
+
+6.37.5 SPU Type Attributes
+--------------------------
+
+The SPU supports the `spu_vector' attribute for types.  This attribute
+allows one to declare vector data types supported by the
+Sony/Toshiba/IBM SPU Language Extensions Specification.  It is intended
+to support the `__vector' keyword.
+
+
+File: gcc.info,  Node: Alignment,  Next: Inline,  Prev: Type Attributes,  Up: C Extensions
+
+6.38 Inquiring on Alignment of Types or Variables
+=================================================
+
+The keyword `__alignof__' allows you to inquire about how an object is
+aligned, or the minimum alignment usually required by a type.  Its
+syntax is just like `sizeof'.
+
+ For example, if the target machine requires a `double' value to be
+aligned on an 8-byte boundary, then `__alignof__ (double)' is 8.  This
+is true on many RISC machines.  On more traditional machine designs,
+`__alignof__ (double)' is 4 or even 2.
+
+ Some machines never actually require alignment; they allow reference
+to any data type even at an odd address.  For these machines,
+`__alignof__' reports the smallest alignment that GCC will give the
+data type, usually as mandated by the target ABI.
+
+ If the operand of `__alignof__' is an lvalue rather than a type, its
+value is the required alignment for its type, taking into account any
+minimum alignment specified with GCC's `__attribute__' extension (*note
+Variable Attributes::).  For example, after this declaration:
+
+     struct foo { int x; char y; } foo1;
+
+the value of `__alignof__ (foo1.y)' is 1, even though its actual
+alignment is probably 2 or 4, the same as `__alignof__ (int)'.
+
+ It is an error to ask for the alignment of an incomplete type.
+
+
+File: gcc.info,  Node: Inline,  Next: Volatiles,  Prev: Alignment,  Up: C Extensions
+
+6.39 An Inline Function is As Fast As a Macro
+=============================================
+
+By declaring a function inline, you can direct GCC to make calls to
+that function faster.  One way GCC can achieve this is to integrate
+that function's code into the code for its callers.  This makes
+execution faster by eliminating the function-call overhead; in
+addition, if any of the actual argument values are constant, their
+known values may permit simplifications at compile time so that not all
+of the inline function's code needs to be included.  The effect on code
+size is less predictable; object code may be larger or smaller with
+function inlining, depending on the particular case.  You can also
+direct GCC to try to integrate all "simple enough" functions into their
+callers with the option `-finline-functions'.
+
+ GCC implements three different semantics of declaring a function
+inline.  One is available with `-std=gnu89' or `-fgnu89-inline' or when
+`gnu_inline' attribute is present on all inline declarations, another
+when `-std=c99', `-std=c1x', `-std=gnu99' or `-std=gnu1x' (without
+`-fgnu89-inline'), and the third is used when compiling C++.
+
+ To declare a function inline, use the `inline' keyword in its
+declaration, like this:
+
+     static inline int
+     inc (int *a)
+     {
+       return (*a)++;
+     }
+
+ If you are writing a header file to be included in ISO C90 programs,
+write `__inline__' instead of `inline'.  *Note Alternate Keywords::.
+
+ The three types of inlining behave similarly in two important cases:
+when the `inline' keyword is used on a `static' function, like the
+example above, and when a function is first declared without using the
+`inline' keyword and then is defined with `inline', like this:
+
+     extern int inc (int *a);
+     inline int
+     inc (int *a)
+     {
+       return (*a)++;
+     }
+
+ In both of these common cases, the program behaves the same as if you
+had not used the `inline' keyword, except for its speed.
+
+ When a function is both inline and `static', if all calls to the
+function are integrated into the caller, and the function's address is
+never used, then the function's own assembler code is never referenced.
+In this case, GCC does not actually output assembler code for the
+function, unless you specify the option `-fkeep-inline-functions'.
+Some calls cannot be integrated for various reasons (in particular,
+calls that precede the function's definition cannot be integrated, and
+neither can recursive calls within the definition).  If there is a
+nonintegrated call, then the function is compiled to assembler code as
+usual.  The function must also be compiled as usual if the program
+refers to its address, because that can't be inlined.
+
+ Note that certain usages in a function definition can make it
+unsuitable for inline substitution.  Among these usages are: use of
+varargs, use of alloca, use of variable sized data types (*note
+Variable Length::), use of computed goto (*note Labels as Values::),
+use of nonlocal goto, and nested functions (*note Nested Functions::).
+Using `-Winline' will warn when a function marked `inline' could not be
+substituted, and will give the reason for the failure.
+
+ As required by ISO C++, GCC considers member functions defined within
+the body of a class to be marked inline even if they are not explicitly
+declared with the `inline' keyword.  You can override this with
+`-fno-default-inline'; *note Options Controlling C++ Dialect: C++
+Dialect Options.
+
+ GCC does not inline any functions when not optimizing unless you
+specify the `always_inline' attribute for the function, like this:
+
+     /* Prototype.  */
+     inline void foo (const char) __attribute__((always_inline));
+
+ The remainder of this section is specific to GNU C90 inlining.
+
+ When an inline function is not `static', then the compiler must assume
+that there may be calls from other source files; since a global symbol
+can be defined only once in any program, the function must not be
+defined in the other source files, so the calls therein cannot be
+integrated.  Therefore, a non-`static' inline function is always
+compiled on its own in the usual fashion.
+
+ If you specify both `inline' and `extern' in the function definition,
+then the definition is used only for inlining.  In no case is the
+function compiled on its own, not even if you refer to its address
+explicitly.  Such an address becomes an external reference, as if you
+had only declared the function, and had not defined it.
+
+ This combination of `inline' and `extern' has almost the effect of a
+macro.  The way to use it is to put a function definition in a header
+file with these keywords, and put another copy of the definition
+(lacking `inline' and `extern') in a library file.  The definition in
+the header file will cause most calls to the function to be inlined.
+If any uses of the function remain, they will refer to the single copy
+in the library.
+
+
+File: gcc.info,  Node: Volatiles,  Next: Extended Asm,  Prev: Inline,  Up: C Extensions
+
+6.40 When is a Volatile Object Accessed?
+========================================
+
+C has the concept of volatile objects.  These are normally accessed by
+pointers and used for accessing hardware or inter-thread communication.
+The standard encourages compilers to refrain from optimizations
+concerning accesses to volatile objects, but leaves it implementation
+defined as to what constitutes a volatile access.  The minimum
+requirement is that at a sequence point all previous accesses to
+volatile objects have stabilized and no subsequent accesses have
+occurred.  Thus an implementation is free to reorder and combine
+volatile accesses which occur between sequence points, but cannot do so
+for accesses across a sequence point.  The use of volatile does not
+allow you to violate the restriction on updating objects multiple times
+between two sequence points.
+
+ Accesses to non-volatile objects are not ordered with respect to
+volatile accesses.  You cannot use a volatile object as a memory
+barrier to order a sequence of writes to non-volatile memory.  For
+instance:
+
+     int *ptr = SOMETHING;
+     volatile int vobj;
+     *ptr = SOMETHING;
+     vobj = 1;
+
+ Unless *PTR and VOBJ can be aliased, it is not guaranteed that the
+write to *PTR will have occurred by the time the update of VOBJ has
+happened.  If you need this guarantee, you must use a stronger memory
+barrier such as:
+
+     int *ptr = SOMETHING;
+     volatile int vobj;
+     *ptr = SOMETHING;
+     asm volatile ("" : : : "memory");
+     vobj = 1;
+
+ A scalar volatile object is read when it is accessed in a void context:
+
+     volatile int *src = SOMEVALUE;
+     *src;
+
+ Such expressions are rvalues, and GCC implements this as a read of the
+volatile object being pointed to.
+
+ Assignments are also expressions and have an rvalue.  However when
+assigning to a scalar volatile, the volatile object is not reread,
+regardless of whether the assignment expression's rvalue is used or
+not.  If the assignment's rvalue is used, the value is that assigned to
+the volatile object.  For instance, there is no read of VOBJ in all the
+following cases:
+
+     int obj;
+     volatile int vobj;
+     vobj = SOMETHING;
+     obj = vobj = SOMETHING;
+     obj ? vobj = ONETHING : vobj = ANOTHERTHING;
+     obj = (SOMETHING, vobj = ANOTHERTHING);
+
+ If you need to read the volatile object after an assignment has
+occurred, you must use a separate expression with an intervening
+sequence point.
+
+ As bitfields are not individually addressable, volatile bitfields may
+be implicitly read when written to, or when adjacent bitfields are
+accessed.  Bitfield operations may be optimized such that adjacent
+bitfields are only partially accessed, if they straddle a storage unit
+boundary.  For these reasons it is unwise to use volatile bitfields to
+access hardware.
+
+
+File: gcc.info,  Node: Extended Asm,  Next: Constraints,  Prev: Volatiles,  Up: C Extensions
+
+6.41 Assembler Instructions with C Expression Operands
+======================================================
+
+In an assembler instruction using `asm', you can specify the operands
+of the instruction using C expressions.  This means you need not guess
+which registers or memory locations will contain the data you want to
+use.
+
+ You must specify an assembler instruction template much like what
+appears in a machine description, plus an operand constraint string for
+each operand.
+
+ For example, here is how to use the 68881's `fsinx' instruction:
+
+     asm ("fsinx %1,%0" : "=f" (result) : "f" (angle));
+
+Here `angle' is the C expression for the input operand while `result'
+is that of the output operand.  Each has `"f"' as its operand
+constraint, saying that a floating point register is required.  The `='
+in `=f' indicates that the operand is an output; all output operands'
+constraints must use `='.  The constraints use the same language used
+in the machine description (*note Constraints::).
+
+ Each operand is described by an operand-constraint string followed by
+the C expression in parentheses.  A colon separates the assembler
+template from the first output operand and another separates the last
+output operand from the first input, if any.  Commas separate the
+operands within each group.  The total number of operands is currently
+limited to 30; this limitation may be lifted in some future version of
+GCC.
+
+ If there are no output operands but there are input operands, you must
+place two consecutive colons surrounding the place where the output
+operands would go.
+
+ As of GCC version 3.1, it is also possible to specify input and output
+operands using symbolic names which can be referenced within the
+assembler code.  These names are specified inside square brackets
+preceding the constraint string, and can be referenced inside the
+assembler code using `%[NAME]' instead of a percentage sign followed by
+the operand number.  Using named operands the above example could look
+like:
+
+     asm ("fsinx %[angle],%[output]"
+          : [output] "=f" (result)
+          : [angle] "f" (angle));
+
+Note that the symbolic operand names have no relation whatsoever to
+other C identifiers.  You may use any name you like, even those of
+existing C symbols, but you must ensure that no two operands within the
+same assembler construct use the same symbolic name.
+
+ Output operand expressions must be lvalues; the compiler can check
+this.  The input operands need not be lvalues.  The compiler cannot
+check whether the operands have data types that are reasonable for the
+instruction being executed.  It does not parse the assembler instruction
+template and does not know what it means or even whether it is valid
+assembler input.  The extended `asm' feature is most often used for
+machine instructions the compiler itself does not know exist.  If the
+output expression cannot be directly addressed (for example, it is a
+bit-field), your constraint must allow a register.  In that case, GCC
+will use the register as the output of the `asm', and then store that
+register into the output.
+
+ The ordinary output operands must be write-only; GCC will assume that
+the values in these operands before the instruction are dead and need
+not be generated.  Extended asm supports input-output or read-write
+operands.  Use the constraint character `+' to indicate such an operand
+and list it with the output operands.  You should only use read-write
+operands when the constraints for the operand (or the operand in which
+only some of the bits are to be changed) allow a register.
+
+ You may, as an alternative, logically split its function into two
+separate operands, one input operand and one write-only output operand.
+The connection between them is expressed by constraints which say they
+need to be in the same location when the instruction executes.  You can
+use the same C expression for both operands, or different expressions.
+For example, here we write the (fictitious) `combine' instruction with
+`bar' as its read-only source operand and `foo' as its read-write
+destination:
+
+     asm ("combine %2,%0" : "=r" (foo) : "0" (foo), "g" (bar));
+
+The constraint `"0"' for operand 1 says that it must occupy the same
+location as operand 0.  A number in constraint is allowed only in an
+input operand and it must refer to an output operand.
+
+ Only a number in the constraint can guarantee that one operand will be
+in the same place as another.  The mere fact that `foo' is the value of
+both operands is not enough to guarantee that they will be in the same
+place in the generated assembler code.  The following would not work
+reliably:
+
+     asm ("combine %2,%0" : "=r" (foo) : "r" (foo), "g" (bar));
+
+ Various optimizations or reloading could cause operands 0 and 1 to be
+in different registers; GCC knows no reason not to do so.  For example,
+the compiler might find a copy of the value of `foo' in one register and
+use it for operand 1, but generate the output operand 0 in a different
+register (copying it afterward to `foo''s own address).  Of course,
+since the register for operand 1 is not even mentioned in the assembler
+code, the result will not work, but GCC can't tell that.
+
+ As of GCC version 3.1, one may write `[NAME]' instead of the operand
+number for a matching constraint.  For example:
+
+     asm ("cmoveq %1,%2,%[result]"
+          : [result] "=r"(result)
+          : "r" (test), "r"(new), "[result]"(old));
+
+ Sometimes you need to make an `asm' operand be a specific register,
+but there's no matching constraint letter for that register _by
+itself_.  To force the operand into that register, use a local variable
+for the operand and specify the register in the variable declaration.
+*Note Explicit Reg Vars::.  Then for the `asm' operand, use any
+register constraint letter that matches the register:
+
+     register int *p1 asm ("r0") = ...;
+     register int *p2 asm ("r1") = ...;
+     register int *result asm ("r0");
+     asm ("sysint" : "=r" (result) : "0" (p1), "r" (p2));
+
+ In the above example, beware that a register that is call-clobbered by
+the target ABI will be overwritten by any function call in the
+assignment, including library calls for arithmetic operators.  Also a
+register may be clobbered when generating some operations, like
+variable shift, memory copy or memory move on x86.  Assuming it is a
+call-clobbered register, this may happen to `r0' above by the
+assignment to `p2'.  If you have to use such a register, use temporary
+variables for expressions between the register assignment and use:
+
+     int t1 = ...;
+     register int *p1 asm ("r0") = ...;
+     register int *p2 asm ("r1") = t1;
+     register int *result asm ("r0");
+     asm ("sysint" : "=r" (result) : "0" (p1), "r" (p2));
+
+ Some instructions clobber specific hard registers.  To describe this,
+write a third colon after the input operands, followed by the names of
+the clobbered hard registers (given as strings).  Here is a realistic
+example for the VAX:
+
+     asm volatile ("movc3 %0,%1,%2"
+                   : /* no outputs */
+                   : "g" (from), "g" (to), "g" (count)
+                   : "r0", "r1", "r2", "r3", "r4", "r5");
+
+ You may not write a clobber description in a way that overlaps with an
+input or output operand.  For example, you may not have an operand
+describing a register class with one member if you mention that register
+in the clobber list.  Variables declared to live in specific registers
+(*note Explicit Reg Vars::), and used as asm input or output operands
+must have no part mentioned in the clobber description.  There is no
+way for you to specify that an input operand is modified without also
+specifying it as an output operand.  Note that if all the output
+operands you specify are for this purpose (and hence unused), you will
+then also need to specify `volatile' for the `asm' construct, as
+described below, to prevent GCC from deleting the `asm' statement as
+unused.
+
+ If you refer to a particular hardware register from the assembler code,
+you will probably have to list the register after the third colon to
+tell the compiler the register's value is modified.  In some assemblers,
+the register names begin with `%'; to produce one `%' in the assembler
+code, you must write `%%' in the input.
+
+ If your assembler instruction can alter the condition code register,
+add `cc' to the list of clobbered registers.  GCC on some machines
+represents the condition codes as a specific hardware register; `cc'
+serves to name this register.  On other machines, the condition code is
+handled differently, and specifying `cc' has no effect.  But it is
+valid no matter what the machine.
+
+ If your assembler instructions access memory in an unpredictable
+fashion, add `memory' to the list of clobbered registers.  This will
+cause GCC to not keep memory values cached in registers across the
+assembler instruction and not optimize stores or loads to that memory.
+You will also want to add the `volatile' keyword if the memory affected
+is not listed in the inputs or outputs of the `asm', as the `memory'
+clobber does not count as a side-effect of the `asm'.  If you know how
+large the accessed memory is, you can add it as input or output but if
+this is not known, you should add `memory'.  As an example, if you
+access ten bytes of a string, you can use a memory input like:
+
+     {"m"( ({ struct { char x[10]; } *p = (void *)ptr ; *p; }) )}.
+
+ Note that in the following example the memory input is necessary,
+otherwise GCC might optimize the store to `x' away:
+     int foo ()
+     {
+       int x = 42;
+       int *y = &x;
+       int result;
+       asm ("magic stuff accessing an 'int' pointed to by '%1'"
+             "=&d" (r) : "a" (y), "m" (*y));
+       return result;
+     }
+
+ You can put multiple assembler instructions together in a single `asm'
+template, separated by the characters normally used in assembly code
+for the system.  A combination that works in most places is a newline
+to break the line, plus a tab character to move to the instruction field
+(written as `\n\t').  Sometimes semicolons can be used, if the
+assembler allows semicolons as a line-breaking character.  Note that
+some assembler dialects use semicolons to start a comment.  The input
+operands are guaranteed not to use any of the clobbered registers, and
+neither will the output operands' addresses, so you can read and write
+the clobbered registers as many times as you like.  Here is an example
+of multiple instructions in a template; it assumes the subroutine
+`_foo' accepts arguments in registers 9 and 10:
+
+     asm ("movl %0,r9\n\tmovl %1,r10\n\tcall _foo"
+          : /* no outputs */
+          : "g" (from), "g" (to)
+          : "r9", "r10");
+
+ Unless an output operand has the `&' constraint modifier, GCC may
+allocate it in the same register as an unrelated input operand, on the
+assumption the inputs are consumed before the outputs are produced.
+This assumption may be false if the assembler code actually consists of
+more than one instruction.  In such a case, use `&' for each output
+operand that may not overlap an input.  *Note Modifiers::.
+
+ If you want to test the condition code produced by an assembler
+instruction, you must include a branch and a label in the `asm'
+construct, as follows:
+
+     asm ("clr %0\n\tfrob %1\n\tbeq 0f\n\tmov #1,%0\n0:"
+          : "g" (result)
+          : "g" (input));
+
+This assumes your assembler supports local labels, as the GNU assembler
+and most Unix assemblers do.
+
+ Speaking of labels, jumps from one `asm' to another are not supported.
+The compiler's optimizers do not know about these jumps, and therefore
+they cannot take account of them when deciding how to optimize.  *Note
+Extended asm with goto::.
+
+ Usually the most convenient way to use these `asm' instructions is to
+encapsulate them in macros that look like functions.  For example,
+
+     #define sin(x)       \
+     ({ double __value, __arg = (x);   \
+        asm ("fsinx %1,%0": "=f" (__value): "f" (__arg));  \
+        __value; })
+
+Here the variable `__arg' is used to make sure that the instruction
+operates on a proper `double' value, and to accept only those arguments
+`x' which can convert automatically to a `double'.
+
+ Another way to make sure the instruction operates on the correct data
+type is to use a cast in the `asm'.  This is different from using a
+variable `__arg' in that it converts more different types.  For
+example, if the desired type were `int', casting the argument to `int'
+would accept a pointer with no complaint, while assigning the argument
+to an `int' variable named `__arg' would warn about using a pointer
+unless the caller explicitly casts it.
+
+ If an `asm' has output operands, GCC assumes for optimization purposes
+the instruction has no side effects except to change the output
+operands.  This does not mean instructions with a side effect cannot be
+used, but you must be careful, because the compiler may eliminate them
+if the output operands aren't used, or move them out of loops, or
+replace two with one if they constitute a common subexpression.  Also,
+if your instruction does have a side effect on a variable that otherwise
+appears not to change, the old value of the variable may be reused later
+if it happens to be found in a register.
+
+ You can prevent an `asm' instruction from being deleted by writing the
+keyword `volatile' after the `asm'.  For example:
+
+     #define get_and_set_priority(new)              \
+     ({ int __old;                                  \
+        asm volatile ("get_and_set_priority %0, %1" \
+                      : "=g" (__old) : "g" (new));  \
+        __old; })
+
+The `volatile' keyword indicates that the instruction has important
+side-effects.  GCC will not delete a volatile `asm' if it is reachable.
+(The instruction can still be deleted if GCC can prove that
+control-flow will never reach the location of the instruction.)  Note
+that even a volatile `asm' instruction can be moved relative to other
+code, including across jump instructions.  For example, on many targets
+there is a system register which can be set to control the rounding
+mode of floating point operations.  You might try setting it with a
+volatile `asm', like this PowerPC example:
+
+            asm volatile("mtfsf 255,%0" : : "f" (fpenv));
+            sum = x + y;
+
+This will not work reliably, as the compiler may move the addition back
+before the volatile `asm'.  To make it work you need to add an
+artificial dependency to the `asm' referencing a variable in the code
+you don't want moved, for example:
+
+         asm volatile ("mtfsf 255,%1" : "=X"(sum): "f"(fpenv));
+         sum = x + y;
+
+ Similarly, you can't expect a sequence of volatile `asm' instructions
+to remain perfectly consecutive.  If you want consecutive output, use a
+single `asm'.  Also, GCC will perform some optimizations across a
+volatile `asm' instruction; GCC does not "forget everything" when it
+encounters a volatile `asm' instruction the way some other compilers do.
+
+ An `asm' instruction without any output operands will be treated
+identically to a volatile `asm' instruction.
+
+ It is a natural idea to look for a way to give access to the condition
+code left by the assembler instruction.  However, when we attempted to
+implement this, we found no way to make it work reliably.  The problem
+is that output operands might need reloading, which would result in
+additional following "store" instructions.  On most machines, these
+instructions would alter the condition code before there was time to
+test it.  This problem doesn't arise for ordinary "test" and "compare"
+instructions because they don't have any output operands.
+
+ For reasons similar to those described above, it is not possible to
+give an assembler instruction access to the condition code left by
+previous instructions.
+
+ As of GCC version 4.5, `asm goto' may be used to have the assembly
+jump to one or more C labels.  In this form, a fifth section after the
+clobber list contains a list of all C labels to which the assembly may
+jump.  Each label operand is implicitly self-named.  The `asm' is also
+assumed to fall through to the next statement.
+
+ This form of `asm' is restricted to not have outputs.  This is due to
+a internal restriction in the compiler that control transfer
+instructions cannot have outputs.  This restriction on `asm goto' may
+be lifted in some future version of the compiler.  In the mean time,
+`asm goto' may include a memory clobber, and so leave outputs in memory.
+
+     int frob(int x)
+     {
+       int y;
+       asm goto ("frob %%r5, %1; jc %l[error]; mov (%2), %%r5"
+                 : : "r"(x), "r"(&y) : "r5", "memory" : error);
+       return y;
+      error:
+       return -1;
+     }
+
+ In this (inefficient) example, the `frob' instruction sets the carry
+bit to indicate an error.  The `jc' instruction detects this and
+branches to the `error' label.  Finally, the output of the `frob'
+instruction (`%r5') is stored into the memory for variable `y', which
+is later read by the `return' statement.
+
+     void doit(void)
+     {
+       int i = 0;
+       asm goto ("mfsr %%r1, 123; jmp %%r1;"
+                 ".pushsection doit_table;"
+                 ".long %l0, %l1, %l2, %l3;"
+                 ".popsection"
+                 : : : "r1" : label1, label2, label3, label4);
+       __builtin_unreachable ();
+
+      label1:
+       f1();
+       return;
+      label2:
+       f2();
+       return;
+      label3:
+       i = 1;
+      label4:
+       f3(i);
+     }
+
+ In this (also inefficient) example, the `mfsr' instruction reads an
+address from some out-of-band machine register, and the following `jmp'
+instruction branches to that address.  The address read by the `mfsr'
+instruction is assumed to have been previously set via some
+application-specific mechanism to be one of the four values stored in
+the `doit_table' section.  Finally, the `asm' is followed by a call to
+`__builtin_unreachable' to indicate that the `asm' does not in fact
+fall through.
+
+     #define TRACE1(NUM)                         \
+       do {                                      \
+         asm goto ("0: nop;"                     \
+                   ".pushsection trace_table;"   \
+                   ".long 0b, %l0;"              \
+                   ".popsection"                 \
+                   : : : : trace#NUM);           \
+         if (0) { trace#NUM: trace(); }          \
+       } while (0)
+     #define TRACE  TRACE1(__COUNTER__)
+
+ In this example (which in fact inspired the `asm goto' feature) we
+want on rare occasions to call the `trace' function; on other occasions
+we'd like to keep the overhead to the absolute minimum.  The normal
+code path consists of a single `nop' instruction.  However, we record
+the address of this `nop' together with the address of a label that
+calls the `trace' function.  This allows the `nop' instruction to be
+patched at runtime to be an unconditional branch to the stored label.
+It is assumed that an optimizing compiler will move the labeled block
+out of line, to optimize the fall through path from the `asm'.
+
+ If you are writing a header file that should be includable in ISO C
+programs, write `__asm__' instead of `asm'.  *Note Alternate Keywords::.
+
+6.41.1 Size of an `asm'
+-----------------------
+
+Some targets require that GCC track the size of each instruction used in
+order to generate correct code.  Because the final length of an `asm'
+is only known by the assembler, GCC must make an estimate as to how big
+it will be.  The estimate is formed by counting the number of
+statements in the pattern of the `asm' and multiplying that by the
+length of the longest instruction on that processor.  Statements in the
+`asm' are identified by newline characters and whatever statement
+separator characters are supported by the assembler; on most processors
+this is the ``;'' character.
+
+ Normally, GCC's estimate is perfectly adequate to ensure that correct
+code is generated, but it is possible to confuse the compiler if you use
+pseudo instructions or assembler macros that expand into multiple real
+instructions or if you use assembler directives that expand to more
+space in the object file than would be needed for a single instruction.
+If this happens then the assembler will produce a diagnostic saying that
+a label is unreachable.
+
+6.41.2 i386 floating point asm operands
+---------------------------------------
+
+There are several rules on the usage of stack-like regs in asm_operands
+insns.  These rules apply only to the operands that are stack-like regs:
+
+  1. Given a set of input regs that die in an asm_operands, it is
+     necessary to know which are implicitly popped by the asm, and
+     which must be explicitly popped by gcc.
+
+     An input reg that is implicitly popped by the asm must be
+     explicitly clobbered, unless it is constrained to match an output
+     operand.
+
+  2. For any input reg that is implicitly popped by an asm, it is
+     necessary to know how to adjust the stack to compensate for the
+     pop.  If any non-popped input is closer to the top of the
+     reg-stack than the implicitly popped reg, it would not be possible
+     to know what the stack looked like--it's not clear how the rest of
+     the stack "slides up".
+
+     All implicitly popped input regs must be closer to the top of the
+     reg-stack than any input that is not implicitly popped.
+
+     It is possible that if an input dies in an insn, reload might use
+     the input reg for an output reload.  Consider this example:
+
+          asm ("foo" : "=t" (a) : "f" (b));
+
+     This asm says that input B is not popped by the asm, and that the
+     asm pushes a result onto the reg-stack, i.e., the stack is one
+     deeper after the asm than it was before.  But, it is possible that
+     reload will think that it can use the same reg for both the input
+     and the output, if input B dies in this insn.
+
+     If any input operand uses the `f' constraint, all output reg
+     constraints must use the `&' earlyclobber.
+
+     The asm above would be written as
+
+          asm ("foo" : "=&t" (a) : "f" (b));
+
+  3. Some operands need to be in particular places on the stack.  All
+     output operands fall in this category--there is no other way to
+     know which regs the outputs appear in unless the user indicates
+     this in the constraints.
+
+     Output operands must specifically indicate which reg an output
+     appears in after an asm.  `=f' is not allowed: the operand
+     constraints must select a class with a single reg.
+
+  4. Output operands may not be "inserted" between existing stack regs.
+     Since no 387 opcode uses a read/write operand, all output operands
+     are dead before the asm_operands, and are pushed by the
+     asm_operands.  It makes no sense to push anywhere but the top of
+     the reg-stack.
+
+     Output operands must start at the top of the reg-stack: output
+     operands may not "skip" a reg.
+
+  5. Some asm statements may need extra stack space for internal
+     calculations.  This can be guaranteed by clobbering stack registers
+     unrelated to the inputs and outputs.
+
+
+ Here are a couple of reasonable asms to want to write.  This asm takes
+one input, which is internally popped, and produces two outputs.
+
+     asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
+
+ This asm takes two inputs, which are popped by the `fyl2xp1' opcode,
+and replaces them with one output.  The user must code the `st(1)'
+clobber for reg-stack.c to know that `fyl2xp1' pops both inputs.
+
+     asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
+
+
+File: gcc.info,  Node: Constraints,  Next: Asm Labels,  Prev: Extended Asm,  Up: C Extensions
+
+6.42 Constraints for `asm' Operands
+===================================
+
+Here are specific details on what constraint letters you can use with
+`asm' operands.  Constraints can say whether an operand may be in a
+register, and which kinds of register; whether the operand can be a
+memory reference, and which kinds of address; whether the operand may
+be an immediate constant, and which possible values it may have.
+Constraints can also require two operands to match.  Side-effects
+aren't allowed in operands of inline `asm', unless `<' or `>'
+constraints are used, because there is no guarantee that the
+side-effects will happen exactly once in an instruction that can update
+the addressing register.
+
+* Menu:
+
+* Simple Constraints::  Basic use of constraints.
+* Multi-Alternative::   When an insn has two alternative constraint-patterns.
+* Modifiers::           More precise control over effects of constraints.
+* Machine Constraints:: Special constraints for some particular machines.
+
+
+File: gcc.info,  Node: Simple Constraints,  Next: Multi-Alternative,  Up: Constraints
+
+6.42.1 Simple Constraints
+-------------------------
+
+The simplest kind of constraint is a string full of letters, each of
+which describes one kind of operand that is permitted.  Here are the
+letters that are allowed:
+
+whitespace
+     Whitespace characters are ignored and can be inserted at any
+     position except the first.  This enables each alternative for
+     different operands to be visually aligned in the machine
+     description even if they have different number of constraints and
+     modifiers.
+
+`m'
+     A memory operand is allowed, with any kind of address that the
+     machine supports in general.  Note that the letter used for the
+     general memory constraint can be re-defined by a back end using
+     the `TARGET_MEM_CONSTRAINT' macro.
+
+`o'
+     A memory operand is allowed, but only if the address is
+     "offsettable".  This means that adding a small integer (actually,
+     the width in bytes of the operand, as determined by its machine
+     mode) may be added to the address and the result is also a valid
+     memory address.
+
+     For example, an address which is constant is offsettable; so is an
+     address that is the sum of a register and a constant (as long as a
+     slightly larger constant is also within the range of
+     address-offsets supported by the machine); but an autoincrement or
+     autodecrement address is not offsettable.  More complicated
+     indirect/indexed addresses may or may not be offsettable depending
+     on the other addressing modes that the machine supports.
+
+     Note that in an output operand which can be matched by another
+     operand, the constraint letter `o' is valid only when accompanied
+     by both `<' (if the target machine has predecrement addressing)
+     and `>' (if the target machine has preincrement addressing).
+
+`V'
+     A memory operand that is not offsettable.  In other words,
+     anything that would fit the `m' constraint but not the `o'
+     constraint.
+
+`<'
+     A memory operand with autodecrement addressing (either
+     predecrement or postdecrement) is allowed.  In inline `asm' this
+     constraint is only allowed if the operand is used exactly once in
+     an instruction that can handle the side-effects.  Not using an
+     operand with `<' in constraint string in the inline `asm' pattern
+     at all or using it in multiple instructions isn't valid, because
+     the side-effects wouldn't be performed or would be performed more
+     than once.  Furthermore, on some targets the operand with `<' in
+     constraint string must be accompanied by special instruction
+     suffixes like `%U0' instruction suffix on PowerPC or `%P0' on
+     IA-64.
+
+`>'
+     A memory operand with autoincrement addressing (either
+     preincrement or postincrement) is allowed.  In inline `asm' the
+     same restrictions as for `<' apply.
+
+`r'
+     A register operand is allowed provided that it is in a general
+     register.
+
+`i'
+     An immediate integer operand (one with constant value) is allowed.
+     This includes symbolic constants whose values will be known only at
+     assembly time or later.
+
+`n'
+     An immediate integer operand with a known numeric value is allowed.
+     Many systems cannot support assembly-time constants for operands
+     less than a word wide.  Constraints for these operands should use
+     `n' rather than `i'.
+
+`I', `J', `K', ... `P'
+     Other letters in the range `I' through `P' may be defined in a
+     machine-dependent fashion to permit immediate integer operands with
+     explicit integer values in specified ranges.  For example, on the
+     68000, `I' is defined to stand for the range of values 1 to 8.
+     This is the range permitted as a shift count in the shift
+     instructions.
+
+`E'
+     An immediate floating operand (expression code `const_double') is
+     allowed, but only if the target floating point format is the same
+     as that of the host machine (on which the compiler is running).
+
+`F'
+     An immediate floating operand (expression code `const_double' or
+     `const_vector') is allowed.
+
+`G', `H'
+     `G' and `H' may be defined in a machine-dependent fashion to
+     permit immediate floating operands in particular ranges of values.
+
+`s'
+     An immediate integer operand whose value is not an explicit
+     integer is allowed.
+
+     This might appear strange; if an insn allows a constant operand
+     with a value not known at compile time, it certainly must allow
+     any known value.  So why use `s' instead of `i'?  Sometimes it
+     allows better code to be generated.
+
+     For example, on the 68000 in a fullword instruction it is possible
+     to use an immediate operand; but if the immediate value is between
+     -128 and 127, better code results from loading the value into a
+     register and using the register.  This is because the load into
+     the register can be done with a `moveq' instruction.  We arrange
+     for this to happen by defining the letter `K' to mean "any integer
+     outside the range -128 to 127", and then specifying `Ks' in the
+     operand constraints.
+
+`g'
+     Any register, memory or immediate integer operand is allowed,
+     except for registers that are not general registers.
+
+`X'
+     Any operand whatsoever is allowed.
+
+`0', `1', `2', ... `9'
+     An operand that matches the specified operand number is allowed.
+     If a digit is used together with letters within the same
+     alternative, the digit should come last.
+
+     This number is allowed to be more than a single digit.  If multiple
+     digits are encountered consecutively, they are interpreted as a
+     single decimal integer.  There is scant chance for ambiguity,
+     since to-date it has never been desirable that `10' be interpreted
+     as matching either operand 1 _or_ operand 0.  Should this be
+     desired, one can use multiple alternatives instead.
+
+     This is called a "matching constraint" and what it really means is
+     that the assembler has only a single operand that fills two roles
+     which `asm' distinguishes.  For example, an add instruction uses
+     two input operands and an output operand, but on most CISC
+     machines an add instruction really has only two operands, one of
+     them an input-output operand:
+
+          addl #35,r12
+
+     Matching constraints are used in these circumstances.  More
+     precisely, the two operands that match must include one input-only
+     operand and one output-only operand.  Moreover, the digit must be a
+     smaller number than the number of the operand that uses it in the
+     constraint.
+
+`p'
+     An operand that is a valid memory address is allowed.  This is for
+     "load address" and "push address" instructions.
+
+     `p' in the constraint must be accompanied by `address_operand' as
+     the predicate in the `match_operand'.  This predicate interprets
+     the mode specified in the `match_operand' as the mode of the memory
+     reference for which the address would be valid.
+
+OTHER-LETTERS
+     Other letters can be defined in machine-dependent fashion to stand
+     for particular classes of registers or other arbitrary operand
+     types.  `d', `a' and `f' are defined on the 68000/68020 to stand
+     for data, address and floating point registers.
+
+
+File: gcc.info,  Node: Multi-Alternative,  Next: Modifiers,  Prev: Simple Constraints,  Up: Constraints
+
+6.42.2 Multiple Alternative Constraints
+---------------------------------------
+
+Sometimes a single instruction has multiple alternative sets of possible
+operands.  For example, on the 68000, a logical-or instruction can
+combine register or an immediate value into memory, or it can combine
+any kind of operand into a register; but it cannot combine one memory
+location into another.
+
+ These constraints are represented as multiple alternatives.  An
+alternative can be described by a series of letters for each operand.
+The overall constraint for an operand is made from the letters for this
+operand from the first alternative, a comma, the letters for this
+operand from the second alternative, a comma, and so on until the last
+alternative.
+
+ If all the operands fit any one alternative, the instruction is valid.
+Otherwise, for each alternative, the compiler counts how many
+instructions must be added to copy the operands so that that
+alternative applies.  The alternative requiring the least copying is
+chosen.  If two alternatives need the same amount of copying, the one
+that comes first is chosen.  These choices can be altered with the `?'
+and `!' characters:
+
+`?'
+     Disparage slightly the alternative that the `?' appears in, as a
+     choice when no alternative applies exactly.  The compiler regards
+     this alternative as one unit more costly for each `?' that appears
+     in it.
+
+`!'
+     Disparage severely the alternative that the `!' appears in.  This
+     alternative can still be used if it fits without reloading, but if
+     reloading is needed, some other alternative will be used.
+
+
+File: gcc.info,  Node: Modifiers,  Next: Machine Constraints,  Prev: Multi-Alternative,  Up: Constraints
+
+6.42.3 Constraint Modifier Characters
+-------------------------------------
+
+Here are constraint modifier characters.
+
+`='
+     Means that this operand is write-only for this instruction: the
+     previous value is discarded and replaced by output data.
+
+`+'
+     Means that this operand is both read and written by the
+     instruction.
+
+     When the compiler fixes up the operands to satisfy the constraints,
+     it needs to know which operands are inputs to the instruction and
+     which are outputs from it.  `=' identifies an output; `+'
+     identifies an operand that is both input and output; all other
+     operands are assumed to be input only.
+
+     If you specify `=' or `+' in a constraint, you put it in the first
+     character of the constraint string.
+
+`&'
+     Means (in a particular alternative) that this operand is an
+     "earlyclobber" operand, which is modified before the instruction is
+     finished using the input operands.  Therefore, this operand may
+     not lie in a register that is used as an input operand or as part
+     of any memory address.
+
+     `&' applies only to the alternative in which it is written.  In
+     constraints with multiple alternatives, sometimes one alternative
+     requires `&' while others do not.  See, for example, the `movdf'
+     insn of the 68000.
+
+     An input operand can be tied to an earlyclobber operand if its only
+     use as an input occurs before the early result is written.  Adding
+     alternatives of this form often allows GCC to produce better code
+     when only some of the inputs can be affected by the earlyclobber.
+     See, for example, the `mulsi3' insn of the ARM.
+
+     `&' does not obviate the need to write `='.
+
+`%'
+     Declares the instruction to be commutative for this operand and the
+     following operand.  This means that the compiler may interchange
+     the two operands if that is the cheapest way to make all operands
+     fit the constraints.  GCC can only handle one commutative pair in
+     an asm; if you use more, the compiler may fail.  Note that you
+     need not use the modifier if the two alternatives are strictly
+     identical; this would only waste time in the reload pass.  The
+     modifier is not operational after register allocation, so the
+     result of `define_peephole2' and `define_split's performed after
+     reload cannot rely on `%' to make the intended insn match.
+
+`#'
+     Says that all following characters, up to the next comma, are to be
+     ignored as a constraint.  They are significant only for choosing
+     register preferences.
+
+`*'
+     Says that the following character should be ignored when choosing
+     register preferences.  `*' has no effect on the meaning of the
+     constraint as a constraint, and no effect on reloading.
+
+
+
+File: gcc.info,  Node: Machine Constraints,  Prev: Modifiers,  Up: Constraints
+
+6.42.4 Constraints for Particular Machines
+------------------------------------------
+
+Whenever possible, you should use the general-purpose constraint letters
+in `asm' arguments, since they will convey meaning more readily to
+people reading your code.  Failing that, use the constraint letters
+that usually have very similar meanings across architectures.  The most
+commonly used constraints are `m' and `r' (for memory and
+general-purpose registers respectively; *note Simple Constraints::), and
+`I', usually the letter indicating the most common immediate-constant
+format.
+
+ Each architecture defines additional constraints.  These constraints
+are used by the compiler itself for instruction generation, as well as
+for `asm' statements; therefore, some of the constraints are not
+particularly useful for `asm'.  Here is a summary of some of the
+machine-dependent constraints available on some particular machines; it
+includes both constraints that are useful for `asm' and constraints
+that aren't.  The compiler source file mentioned in the table heading
+for each architecture is the definitive reference for the meanings of
+that architecture's constraints.
+
+_ARM family--`config/arm/arm.h'_
+
+    `f'
+          Floating-point register
+
+    `w'
+          VFP floating-point register
+
+    `F'
+          One of the floating-point constants 0.0, 0.5, 1.0, 2.0, 3.0,
+          4.0, 5.0 or 10.0
+
+    `G'
+          Floating-point constant that would satisfy the constraint `F'
+          if it were negated
+
+    `I'
+          Integer that is valid as an immediate operand in a data
+          processing instruction.  That is, an integer in the range 0
+          to 255 rotated by a multiple of 2
+
+    `J'
+          Integer in the range -4095 to 4095
+
+    `K'
+          Integer that satisfies constraint `I' when inverted (ones
+          complement)
+
+    `L'
+          Integer that satisfies constraint `I' when negated (twos
+          complement)
+
+    `M'
+          Integer in the range 0 to 32
+
+    `Q'
+          A memory reference where the exact address is in a single
+          register (``m'' is preferable for `asm' statements)
+
+    `R'
+          An item in the constant pool
+
+    `S'
+          A symbol in the text segment of the current file
+
+    `Uv'
+          A memory reference suitable for VFP load/store insns
+          (reg+constant offset)
+
+    `Uy'
+          A memory reference suitable for iWMMXt load/store
+          instructions.
+
+    `Uq'
+          A memory reference suitable for the ARMv4 ldrsb instruction.
+
+_AVR family--`config/avr/constraints.md'_
+
+    `l'
+          Registers from r0 to r15
+
+    `a'
+          Registers from r16 to r23
+
+    `d'
+          Registers from r16 to r31
+
+    `w'
+          Registers from r24 to r31.  These registers can be used in
+          `adiw' command
+
+    `e'
+          Pointer register (r26-r31)
+
+    `b'
+          Base pointer register (r28-r31)
+
+    `q'
+          Stack pointer register (SPH:SPL)
+
+    `t'
+          Temporary register r0
+
+    `x'
+          Register pair X (r27:r26)
+
+    `y'
+          Register pair Y (r29:r28)
+
+    `z'
+          Register pair Z (r31:r30)
+
+    `I'
+          Constant greater than -1, less than 64
+
+    `J'
+          Constant greater than -64, less than 1
+
+    `K'
+          Constant integer 2
+
+    `L'
+          Constant integer 0
+
+    `M'
+          Constant that fits in 8 bits
+
+    `N'
+          Constant integer -1
+
+    `O'
+          Constant integer 8, 16, or 24
+
+    `P'
+          Constant integer 1
+
+    `G'
+          A floating point constant 0.0
+
+    `R'
+          Integer constant in the range -6 ... 5.
+
+    `Q'
+          A memory address based on Y or Z pointer with displacement.
+
+_CRX Architecture--`config/crx/crx.h'_
+
+    `b'
+          Registers from r0 to r14 (registers without stack pointer)
+
+    `l'
+          Register r16 (64-bit accumulator lo register)
+
+    `h'
+          Register r17 (64-bit accumulator hi register)
+
+    `k'
+          Register pair r16-r17. (64-bit accumulator lo-hi pair)
+
+    `I'
+          Constant that fits in 3 bits
+
+    `J'
+          Constant that fits in 4 bits
+
+    `K'
+          Constant that fits in 5 bits
+
+    `L'
+          Constant that is one of -1, 4, -4, 7, 8, 12, 16, 20, 32, 48
+
+    `G'
+          Floating point constant that is legal for store immediate
+
+_Hewlett-Packard PA-RISC--`config/pa/pa.h'_
+
+    `a'
+          General register 1
+
+    `f'
+          Floating point register
+
+    `q'
+          Shift amount register
+
+    `x'
+          Floating point register (deprecated)
+
+    `y'
+          Upper floating point register (32-bit), floating point
+          register (64-bit)
+
+    `Z'
+          Any register
+
+    `I'
+          Signed 11-bit integer constant
+
+    `J'
+          Signed 14-bit integer constant
+
+    `K'
+          Integer constant that can be deposited with a `zdepi'
+          instruction
+
+    `L'
+          Signed 5-bit integer constant
+
+    `M'
+          Integer constant 0
+
+    `N'
+          Integer constant that can be loaded with a `ldil' instruction
+
+    `O'
+          Integer constant whose value plus one is a power of 2
+
+    `P'
+          Integer constant that can be used for `and' operations in
+          `depi' and `extru' instructions
+
+    `S'
+          Integer constant 31
+
+    `U'
+          Integer constant 63
+
+    `G'
+          Floating-point constant 0.0
+
+    `A'
+          A `lo_sum' data-linkage-table memory operand
+
+    `Q'
+          A memory operand that can be used as the destination operand
+          of an integer store instruction
+
+    `R'
+          A scaled or unscaled indexed memory operand
+
+    `T'
+          A memory operand for floating-point loads and stores
+
+    `W'
+          A register indirect memory operand
+
+_picoChip family--`picochip.h'_
+
+    `k'
+          Stack register.
+
+    `f'
+          Pointer register.  A register which can be used to access
+          memory without supplying an offset.  Any other register can
+          be used to access memory, but will need a constant offset.
+          In the case of the offset being zero, it is more efficient to
+          use a pointer register, since this reduces code size.
+
+    `t'
+          A twin register.  A register which may be paired with an
+          adjacent register to create a 32-bit register.
+
+    `a'
+          Any absolute memory address (e.g., symbolic constant, symbolic
+          constant + offset).
+
+    `I'
+          4-bit signed integer.
+
+    `J'
+          4-bit unsigned integer.
+
+    `K'
+          8-bit signed integer.
+
+    `M'
+          Any constant whose absolute value is no greater than 4-bits.
+
+    `N'
+          10-bit signed integer
+
+    `O'
+          16-bit signed integer.
+
+
+_PowerPC and IBM RS6000--`config/rs6000/rs6000.h'_
+
+    `b'
+          Address base register
+
+    `d'
+          Floating point register (containing 64-bit value)
+
+    `f'
+          Floating point register (containing 32-bit value)
+
+    `v'
+          Altivec vector register
+
+    `wd'
+          VSX vector register to hold vector double data
+
+    `wf'
+          VSX vector register to hold vector float data
+
+    `ws'
+          VSX vector register to hold scalar float data
+
+    `wa'
+          Any VSX register
+
+    `h'
+          `MQ', `CTR', or `LINK' register
+
+    `q'
+          `MQ' register
+
+    `c'
+          `CTR' register
+
+    `l'
+          `LINK' register
+
+    `x'
+          `CR' register (condition register) number 0
+
+    `y'
+          `CR' register (condition register)
+
+    `z'
+          `XER[CA]' carry bit (part of the XER register)
+
+    `I'
+          Signed 16-bit constant
+
+    `J'
+          Unsigned 16-bit constant shifted left 16 bits (use `L'
+          instead for `SImode' constants)
+
+    `K'
+          Unsigned 16-bit constant
+
+    `L'
+          Signed 16-bit constant shifted left 16 bits
+
+    `M'
+          Constant larger than 31
+
+    `N'
+          Exact power of 2
+
+    `O'
+          Zero
+
+    `P'
+          Constant whose negation is a signed 16-bit constant
+
+    `G'
+          Floating point constant that can be loaded into a register
+          with one instruction per word
+
+    `H'
+          Integer/Floating point constant that can be loaded into a
+          register using three instructions
+
+    `m'
+          Memory operand.  Normally, `m' does not allow addresses that
+          update the base register.  If `<' or `>' constraint is also
+          used, they are allowed and therefore on PowerPC targets in
+          that case it is only safe to use `m<>' in an `asm' statement
+          if that `asm' statement accesses the operand exactly once.
+          The `asm' statement must also use `%U<OPNO>' as a placeholder
+          for the "update" flag in the corresponding load or store
+          instruction.  For example:
+
+               asm ("st%U0 %1,%0" : "=m<>" (mem) : "r" (val));
+
+          is correct but:
+
+               asm ("st %1,%0" : "=m<>" (mem) : "r" (val));
+
+          is not.
+
+    `es'
+          A "stable" memory operand; that is, one which does not
+          include any automodification of the base register.  This used
+          to be useful when `m' allowed automodification of the base
+          register, but as those are now only allowed when `<' or `>'
+          is used, `es' is basically the same as `m' without `<' and
+          `>'.
+
+    `Q'
+          Memory operand that is an offset from a register (it is
+          usually better to use `m' or `es' in `asm' statements)
+
+    `Z'
+          Memory operand that is an indexed or indirect from a register
+          (it is usually better to use `m' or `es' in `asm' statements)
+
+    `R'
+          AIX TOC entry
+
+    `a'
+          Address operand that is an indexed or indirect from a
+          register (`p' is preferable for `asm' statements)
+
+    `S'
+          Constant suitable as a 64-bit mask operand
+
+    `T'
+          Constant suitable as a 32-bit mask operand
+
+    `U'
+          System V Release 4 small data area reference
+
+    `t'
+          AND masks that can be performed by two rldic{l, r}
+          instructions
+
+    `W'
+          Vector constant that does not require memory
+
+    `j'
+          Vector constant that is all zeros.
+
+
+_Intel 386--`config/i386/constraints.md'_
+
+    `R'
+          Legacy register--the eight integer registers available on all
+          i386 processors (`a', `b', `c', `d', `si', `di', `bp', `sp').
+
+    `q'
+          Any register accessible as `Rl'.  In 32-bit mode, `a', `b',
+          `c', and `d'; in 64-bit mode, any integer register.
+
+    `Q'
+          Any register accessible as `Rh': `a', `b', `c', and `d'.
+
+    `a'
+          The `a' register.
+
+    `b'
+          The `b' register.
+
+    `c'
+          The `c' register.
+
+    `d'
+          The `d' register.
+
+    `S'
+          The `si' register.
+
+    `D'
+          The `di' register.
+
+    `A'
+          The `a' and `d' registers.  This class is used for
+          instructions that return double word results in the `ax:dx'
+          register pair.  Single word values will be allocated either
+          in `ax' or `dx'.  For example on i386 the following
+          implements `rdtsc':
+
+               unsigned long long rdtsc (void)
+               {
+                 unsigned long long tick;
+                 __asm__ __volatile__("rdtsc":"=A"(tick));
+                 return tick;
+               }
+
+          This is not correct on x86_64 as it would allocate tick in
+          either `ax' or `dx'.  You have to use the following variant
+          instead:
+
+               unsigned long long rdtsc (void)
+               {
+                 unsigned int tickl, tickh;
+                 __asm__ __volatile__("rdtsc":"=a"(tickl),"=d"(tickh));
+                 return ((unsigned long long)tickh << 32)|tickl;
+               }
+
+    `f'
+          Any 80387 floating-point (stack) register.
+
+    `t'
+          Top of 80387 floating-point stack (`%st(0)').
+
+    `u'
+          Second from top of 80387 floating-point stack (`%st(1)').
+
+    `y'
+          Any MMX register.
+
+    `x'
+          Any SSE register.
+
+    `Yz'
+          First SSE register (`%xmm0').
+
+    `I'
+          Integer constant in the range 0 ... 31, for 32-bit shifts.
+
+    `J'
+          Integer constant in the range 0 ... 63, for 64-bit shifts.
+
+    `K'
+          Signed 8-bit integer constant.
+
+    `L'
+          `0xFF' or `0xFFFF', for andsi as a zero-extending move.
+
+    `M'
+          0, 1, 2, or 3 (shifts for the `lea' instruction).
+
+    `N'
+          Unsigned 8-bit integer constant (for `in' and `out'
+          instructions).
+
+    `G'
+          Standard 80387 floating point constant.
+
+    `C'
+          Standard SSE floating point constant.
+
+    `e'
+          32-bit signed integer constant, or a symbolic reference known
+          to fit that range (for immediate operands in sign-extending
+          x86-64 instructions).
+
+    `Z'
+          32-bit unsigned integer constant, or a symbolic reference
+          known to fit that range (for immediate operands in
+          zero-extending x86-64 instructions).
+
+
+_Intel IA-64--`config/ia64/ia64.h'_
+
+    `a'
+          General register `r0' to `r3' for `addl' instruction
+
+    `b'
+          Branch register
+
+    `c'
+          Predicate register (`c' as in "conditional")
+
+    `d'
+          Application register residing in M-unit
+
+    `e'
+          Application register residing in I-unit
+
+    `f'
+          Floating-point register
+
+    `m'
+          Memory operand.  If used together with `<' or `>', the
+          operand can have postincrement and postdecrement which
+          require printing with `%Pn' on IA-64.
+
+    `G'
+          Floating-point constant 0.0 or 1.0
+
+    `I'
+          14-bit signed integer constant
+
+    `J'
+          22-bit signed integer constant
+
+    `K'
+          8-bit signed integer constant for logical instructions
+
+    `L'
+          8-bit adjusted signed integer constant for compare pseudo-ops
+
+    `M'
+          6-bit unsigned integer constant for shift counts
+
+    `N'
+          9-bit signed integer constant for load and store
+          postincrements
+
+    `O'
+          The constant zero
+
+    `P'
+          0 or -1 for `dep' instruction
+
+    `Q'
+          Non-volatile memory for floating-point loads and stores
+
+    `R'
+          Integer constant in the range 1 to 4 for `shladd' instruction
+
+    `S'
+          Memory operand except postincrement and postdecrement.  This
+          is now roughly the same as `m' when not used together with `<'
+          or `>'.
+
+_FRV--`config/frv/frv.h'_
+
+    `a'
+          Register in the class `ACC_REGS' (`acc0' to `acc7').
+
+    `b'
+          Register in the class `EVEN_ACC_REGS' (`acc0' to `acc7').
+
+    `c'
+          Register in the class `CC_REGS' (`fcc0' to `fcc3' and `icc0'
+          to `icc3').
+
+    `d'
+          Register in the class `GPR_REGS' (`gr0' to `gr63').
+
+    `e'
+          Register in the class `EVEN_REGS' (`gr0' to `gr63').  Odd
+          registers are excluded not in the class but through the use
+          of a machine mode larger than 4 bytes.
+
+    `f'
+          Register in the class `FPR_REGS' (`fr0' to `fr63').
+
+    `h'
+          Register in the class `FEVEN_REGS' (`fr0' to `fr63').  Odd
+          registers are excluded not in the class but through the use
+          of a machine mode larger than 4 bytes.
+
+    `l'
+          Register in the class `LR_REG' (the `lr' register).
+
+    `q'
+          Register in the class `QUAD_REGS' (`gr2' to `gr63').
+          Register numbers not divisible by 4 are excluded not in the
+          class but through the use of a machine mode larger than 8
+          bytes.
+
+    `t'
+          Register in the class `ICC_REGS' (`icc0' to `icc3').
+
+    `u'
+          Register in the class `FCC_REGS' (`fcc0' to `fcc3').
+
+    `v'
+          Register in the class `ICR_REGS' (`cc4' to `cc7').
+
+    `w'
+          Register in the class `FCR_REGS' (`cc0' to `cc3').
+
+    `x'
+          Register in the class `QUAD_FPR_REGS' (`fr0' to `fr63').
+          Register numbers not divisible by 4 are excluded not in the
+          class but through the use of a machine mode larger than 8
+          bytes.
+
+    `z'
+          Register in the class `SPR_REGS' (`lcr' and `lr').
+
+    `A'
+          Register in the class `QUAD_ACC_REGS' (`acc0' to `acc7').
+
+    `B'
+          Register in the class `ACCG_REGS' (`accg0' to `accg7').
+
+    `C'
+          Register in the class `CR_REGS' (`cc0' to `cc7').
+
+    `G'
+          Floating point constant zero
+
+    `I'
+          6-bit signed integer constant
+
+    `J'
+          10-bit signed integer constant
+
+    `L'
+          16-bit signed integer constant
+
+    `M'
+          16-bit unsigned integer constant
+
+    `N'
+          12-bit signed integer constant that is negative--i.e. in the
+          range of -2048 to -1
+
+    `O'
+          Constant zero
+
+    `P'
+          12-bit signed integer constant that is greater than
+          zero--i.e. in the range of 1 to 2047.
+
+
+_Blackfin family--`config/bfin/constraints.md'_
+
+    `a'
+          P register
+
+    `d'
+          D register
+
+    `z'
+          A call clobbered P register.
+
+    `qN'
+          A single register.  If N is in the range 0 to 7, the
+          corresponding D register.  If it is `A', then the register P0.
+
+    `D'
+          Even-numbered D register
+
+    `W'
+          Odd-numbered D register
+
+    `e'
+          Accumulator register.
+
+    `A'
+          Even-numbered accumulator register.
+
+    `B'
+          Odd-numbered accumulator register.
+
+    `b'
+          I register
+
+    `v'
+          B register
+
+    `f'
+          M register
+
+    `c'
+          Registers used for circular buffering, i.e. I, B, or L
+          registers.
+
+    `C'
+          The CC register.
+
+    `t'
+          LT0 or LT1.
+
+    `k'
+          LC0 or LC1.
+
+    `u'
+          LB0 or LB1.
+
+    `x'
+          Any D, P, B, M, I or L register.
+
+    `y'
+          Additional registers typically used only in prologues and
+          epilogues: RETS, RETN, RETI, RETX, RETE, ASTAT, SEQSTAT and
+          USP.
+
+    `w'
+          Any register except accumulators or CC.
+
+    `Ksh'
+          Signed 16 bit integer (in the range -32768 to 32767)
+
+    `Kuh'
+          Unsigned 16 bit integer (in the range 0 to 65535)
+
+    `Ks7'
+          Signed 7 bit integer (in the range -64 to 63)
+
+    `Ku7'
+          Unsigned 7 bit integer (in the range 0 to 127)
+
+    `Ku5'
+          Unsigned 5 bit integer (in the range 0 to 31)
+
+    `Ks4'
+          Signed 4 bit integer (in the range -8 to 7)
+
+    `Ks3'
+          Signed 3 bit integer (in the range -3 to 4)
+
+    `Ku3'
+          Unsigned 3 bit integer (in the range 0 to 7)
+
+    `PN'
+          Constant N, where N is a single-digit constant in the range 0
+          to 4.
+
+    `PA'
+          An integer equal to one of the MACFLAG_XXX constants that is
+          suitable for use with either accumulator.
+
+    `PB'
+          An integer equal to one of the MACFLAG_XXX constants that is
+          suitable for use only with accumulator A1.
+
+    `M1'
+          Constant 255.
+
+    `M2'
+          Constant 65535.
+
+    `J'
+          An integer constant with exactly a single bit set.
+
+    `L'
+          An integer constant with all bits set except exactly one.
+
+    `H'
+
+    `Q'
+          Any SYMBOL_REF.
+
+_M32C--`config/m32c/m32c.c'_
+
+    `Rsp'
+    `Rfb'
+    `Rsb'
+          `$sp', `$fb', `$sb'.
+
+    `Rcr'
+          Any control register, when they're 16 bits wide (nothing if
+          control registers are 24 bits wide)
+
+    `Rcl'
+          Any control register, when they're 24 bits wide.
+
+    `R0w'
+    `R1w'
+    `R2w'
+    `R3w'
+          $r0, $r1, $r2, $r3.
+
+    `R02'
+          $r0 or $r2, or $r2r0 for 32 bit values.
+
+    `R13'
+          $r1 or $r3, or $r3r1 for 32 bit values.
+
+    `Rdi'
+          A register that can hold a 64 bit value.
+
+    `Rhl'
+          $r0 or $r1 (registers with addressable high/low bytes)
+
+    `R23'
+          $r2 or $r3
+
+    `Raa'
+          Address registers
+
+    `Raw'
+          Address registers when they're 16 bits wide.
+
+    `Ral'
+          Address registers when they're 24 bits wide.
+
+    `Rqi'
+          Registers that can hold QI values.
+
+    `Rad'
+          Registers that can be used with displacements ($a0, $a1, $sb).
+
+    `Rsi'
+          Registers that can hold 32 bit values.
+
+    `Rhi'
+          Registers that can hold 16 bit values.
+
+    `Rhc'
+          Registers chat can hold 16 bit values, including all control
+          registers.
+
+    `Rra'
+          $r0 through R1, plus $a0 and $a1.
+
+    `Rfl'
+          The flags register.
+
+    `Rmm'
+          The memory-based pseudo-registers $mem0 through $mem15.
+
+    `Rpi'
+          Registers that can hold pointers (16 bit registers for r8c,
+          m16c; 24 bit registers for m32cm, m32c).
+
+    `Rpa'
+          Matches multiple registers in a PARALLEL to form a larger
+          register.  Used to match function return values.
+
+    `Is3'
+          -8 ... 7
+
+    `IS1'
+          -128 ... 127
+
+    `IS2'
+          -32768 ... 32767
+
+    `IU2'
+          0 ... 65535
+
+    `In4'
+          -8 ... -1 or 1 ... 8
+
+    `In5'
+          -16 ... -1 or 1 ... 16
+
+    `In6'
+          -32 ... -1 or 1 ... 32
+
+    `IM2'
+          -65536 ... -1
+
+    `Ilb'
+          An 8 bit value with exactly one bit set.
+
+    `Ilw'
+          A 16 bit value with exactly one bit set.
+
+    `Sd'
+          The common src/dest memory addressing modes.
+
+    `Sa'
+          Memory addressed using $a0 or $a1.
+
+    `Si'
+          Memory addressed with immediate addresses.
+
+    `Ss'
+          Memory addressed using the stack pointer ($sp).
+
+    `Sf'
+          Memory addressed using the frame base register ($fb).
+
+    `Ss'
+          Memory addressed using the small base register ($sb).
+
+    `S1'
+          $r1h
+
+_MeP--`config/mep/constraints.md'_
+
+    `a'
+          The $sp register.
+
+    `b'
+          The $tp register.
+
+    `c'
+          Any control register.
+
+    `d'
+          Either the $hi or the $lo register.
+
+    `em'
+          Coprocessor registers that can be directly loaded ($c0-$c15).
+
+    `ex'
+          Coprocessor registers that can be moved to each other.
+
+    `er'
+          Coprocessor registers that can be moved to core registers.
+
+    `h'
+          The $hi register.
+
+    `j'
+          The $rpc register.
+
+    `l'
+          The $lo register.
+
+    `t'
+          Registers which can be used in $tp-relative addressing.
+
+    `v'
+          The $gp register.
+
+    `x'
+          The coprocessor registers.
+
+    `y'
+          The coprocessor control registers.
+
+    `z'
+          The $0 register.
+
+    `A'
+          User-defined register set A.
+
+    `B'
+          User-defined register set B.
+
+    `C'
+          User-defined register set C.
+
+    `D'
+          User-defined register set D.
+
+    `I'
+          Offsets for $gp-rel addressing.
+
+    `J'
+          Constants that can be used directly with boolean insns.
+
+    `K'
+          Constants that can be moved directly to registers.
+
+    `L'
+          Small constants that can be added to registers.
+
+    `M'
+          Long shift counts.
+
+    `N'
+          Small constants that can be compared to registers.
+
+    `O'
+          Constants that can be loaded into the top half of registers.
+
+    `S'
+          Signed 8-bit immediates.
+
+    `T'
+          Symbols encoded for $tp-rel or $gp-rel addressing.
+
+    `U'
+          Non-constant addresses for loading/saving coprocessor
+          registers.
+
+    `W'
+          The top half of a symbol's value.
+
+    `Y'
+          A register indirect address without offset.
+
+    `Z'
+          Symbolic references to the control bus.
+
+
+_MicroBlaze--`config/microblaze/constraints.md'_
+
+    `d'
+          A general register (`r0' to `r31').
+
+    `z'
+          A status register (`rmsr', `$fcc1' to `$fcc7').
+
+
+_MIPS--`config/mips/constraints.md'_
+
+    `d'
+          An address register.  This is equivalent to `r' unless
+          generating MIPS16 code.
+
+    `f'
+          A floating-point register (if available).
+
+    `h'
+          Formerly the `hi' register.  This constraint is no longer
+          supported.
+
+    `l'
+          The `lo' register.  Use this register to store values that are
+          no bigger than a word.
+
+    `x'
+          The concatenated `hi' and `lo' registers.  Use this register
+          to store doubleword values.
+
+    `c'
+          A register suitable for use in an indirect jump.  This will
+          always be `$25' for `-mabicalls'.
+
+    `v'
+          Register `$3'.  Do not use this constraint in new code; it is
+          retained only for compatibility with glibc.
+
+    `y'
+          Equivalent to `r'; retained for backwards compatibility.
+
+    `z'
+          A floating-point condition code register.
+
+    `I'
+          A signed 16-bit constant (for arithmetic instructions).
+
+    `J'
+          Integer zero.
+
+    `K'
+          An unsigned 16-bit constant (for logic instructions).
+
+    `L'
+          A signed 32-bit constant in which the lower 16 bits are zero.
+          Such constants can be loaded using `lui'.
+
+    `M'
+          A constant that cannot be loaded using `lui', `addiu' or
+          `ori'.
+
+    `N'
+          A constant in the range -65535 to -1 (inclusive).
+
+    `O'
+          A signed 15-bit constant.
+
+    `P'
+          A constant in the range 1 to 65535 (inclusive).
+
+    `G'
+          Floating-point zero.
+
+    `R'
+          An address that can be used in a non-macro load or store.
+
+_Motorola 680x0--`config/m68k/constraints.md'_
+
+    `a'
+          Address register
+
+    `d'
+          Data register
+
+    `f'
+          68881 floating-point register, if available
+
+    `I'
+          Integer in the range 1 to 8
+
+    `J'
+          16-bit signed number
+
+    `K'
+          Signed number whose magnitude is greater than 0x80
+
+    `L'
+          Integer in the range -8 to -1
+
+    `M'
+          Signed number whose magnitude is greater than 0x100
+
+    `N'
+          Range 24 to 31, rotatert:SI 8 to 1 expressed as rotate
+
+    `O'
+          16 (for rotate using swap)
+
+    `P'
+          Range 8 to 15, rotatert:HI 8 to 1 expressed as rotate
+
+    `R'
+          Numbers that mov3q can handle
+
+    `G'
+          Floating point constant that is not a 68881 constant
+
+    `S'
+          Operands that satisfy 'm' when -mpcrel is in effect
+
+    `T'
+          Operands that satisfy 's' when -mpcrel is not in effect
+
+    `Q'
+          Address register indirect addressing mode
+
+    `U'
+          Register offset addressing
+
+    `W'
+          const_call_operand
+
+    `Cs'
+          symbol_ref or const
+
+    `Ci'
+          const_int
+
+    `C0'
+          const_int 0
+
+    `Cj'
+          Range of signed numbers that don't fit in 16 bits
+
+    `Cmvq'
+          Integers valid for mvq
+
+    `Capsw'
+          Integers valid for a moveq followed by a swap
+
+    `Cmvz'
+          Integers valid for mvz
+
+    `Cmvs'
+          Integers valid for mvs
+
+    `Ap'
+          push_operand
+
+    `Ac'
+          Non-register operands allowed in clr
+
+
+_Motorola 68HC11 & 68HC12 families--`config/m68hc11/m68hc11.h'_
+
+    `a'
+          Register `a'
+
+    `b'
+          Register `b'
+
+    `d'
+          Register `d'
+
+    `q'
+          An 8-bit register
+
+    `t'
+          Temporary soft register _.tmp
+
+    `u'
+          A soft register _.d1 to _.d31
+
+    `w'
+          Stack pointer register
+
+    `x'
+          Register `x'
+
+    `y'
+          Register `y'
+
+    `z'
+          Pseudo register `z' (replaced by `x' or `y' at the end)
+
+    `A'
+          An address register: x, y or z
+
+    `B'
+          An address register: x or y
+
+    `D'
+          Register pair (x:d) to form a 32-bit value
+
+    `L'
+          Constants in the range -65536 to 65535
+
+    `M'
+          Constants whose 16-bit low part is zero
+
+    `N'
+          Constant integer 1 or -1
+
+    `O'
+          Constant integer 16
+
+    `P'
+          Constants in the range -8 to 2
+
+
+_Moxie--`config/moxie/constraints.md'_
+
+    `A'
+          An absolute address
+
+    `B'
+          An offset address
+
+    `W'
+          A register indirect memory operand
+
+    `I'
+          A constant in the range of 0 to 255.
+
+    `N'
+          A constant in the range of 0 to -255.
+
+
+_PDP-11--`config/pdp11/constraints.md'_
+
+    `a'
+          Floating point registers AC0 through AC3.  These can be
+          loaded from/to memory with a single instruction.
+
+    `d'
+          Odd numbered general registers (R1, R3, R5).  These are used
+          for 16-bit multiply operations.
+
+    `f'
+          Any of the floating point registers (AC0 through AC5).
+
+    `G'
+          Floating point constant 0.
+
+    `I'
+          An integer constant that fits in 16 bits.
+
+    `J'
+          An integer constant whose low order 16 bits are zero.
+
+    `K'
+          An integer constant that does not meet the constraints for
+          codes `I' or `J'.
+
+    `L'
+          The integer constant 1.
+
+    `M'
+          The integer constant -1.
+
+    `N'
+          The integer constant 0.
+
+    `O'
+          Integer constants -4 through -1 and 1 through 4; shifts by
+          these amounts are handled as multiple single-bit shifts
+          rather than a single variable-length shift.
+
+    `Q'
+          A memory reference which requires an additional word (address
+          or offset) after the opcode.
+
+    `R'
+          A memory reference that is encoded within the opcode.
+
+
+_RX--`config/rx/constraints.md'_
+
+    `Q'
+          An address which does not involve register indirect
+          addressing or pre/post increment/decrement addressing.
+
+    `Symbol'
+          A symbol reference.
+
+    `Int08'
+          A constant in the range -256 to 255, inclusive.
+
+    `Sint08'
+          A constant in the range -128 to 127, inclusive.
+
+    `Sint16'
+          A constant in the range -32768 to 32767, inclusive.
+
+    `Sint24'
+          A constant in the range -8388608 to 8388607, inclusive.
+
+    `Uint04'
+          A constant in the range 0 to 15, inclusive.
+
+
+_SPARC--`config/sparc/sparc.h'_
+
+    `f'
+          Floating-point register on the SPARC-V8 architecture and
+          lower floating-point register on the SPARC-V9 architecture.
+
+    `e'
+          Floating-point register.  It is equivalent to `f' on the
+          SPARC-V8 architecture and contains both lower and upper
+          floating-point registers on the SPARC-V9 architecture.
+
+    `c'
+          Floating-point condition code register.
+
+    `d'
+          Lower floating-point register.  It is only valid on the
+          SPARC-V9 architecture when the Visual Instruction Set is
+          available.
+
+    `b'
+          Floating-point register.  It is only valid on the SPARC-V9
+          architecture when the Visual Instruction Set is available.
+
+    `h'
+          64-bit global or out register for the SPARC-V8+ architecture.
+
+    `D'
+          A vector constant
+
+    `I'
+          Signed 13-bit constant
+
+    `J'
+          Zero
+
+    `K'
+          32-bit constant with the low 12 bits clear (a constant that
+          can be loaded with the `sethi' instruction)
+
+    `L'
+          A constant in the range supported by `movcc' instructions
+
+    `M'
+          A constant in the range supported by `movrcc' instructions
+
+    `N'
+          Same as `K', except that it verifies that bits that are not
+          in the lower 32-bit range are all zero.  Must be used instead
+          of `K' for modes wider than `SImode'
+
+    `O'
+          The constant 4096
+
+    `G'
+          Floating-point zero
+
+    `H'
+          Signed 13-bit constant, sign-extended to 32 or 64 bits
+
+    `Q'
+          Floating-point constant whose integral representation can be
+          moved into an integer register using a single sethi
+          instruction
+
+    `R'
+          Floating-point constant whose integral representation can be
+          moved into an integer register using a single mov instruction
+
+    `S'
+          Floating-point constant whose integral representation can be
+          moved into an integer register using a high/lo_sum
+          instruction sequence
+
+    `T'
+          Memory address aligned to an 8-byte boundary
+
+    `U'
+          Even register
+
+    `W'
+          Memory address for `e' constraint registers
+
+    `Y'
+          Vector zero
+
+
+_SPU--`config/spu/spu.h'_
+
+    `a'
+          An immediate which can be loaded with the il/ila/ilh/ilhu
+          instructions.  const_int is treated as a 64 bit value.
+
+    `c'
+          An immediate for and/xor/or instructions.  const_int is
+          treated as a 64 bit value.
+
+    `d'
+          An immediate for the `iohl' instruction.  const_int is
+          treated as a 64 bit value.
+
+    `f'
+          An immediate which can be loaded with `fsmbi'.
+
+    `A'
+          An immediate which can be loaded with the il/ila/ilh/ilhu
+          instructions.  const_int is treated as a 32 bit value.
+
+    `B'
+          An immediate for most arithmetic instructions.  const_int is
+          treated as a 32 bit value.
+
+    `C'
+          An immediate for and/xor/or instructions.  const_int is
+          treated as a 32 bit value.
+
+    `D'
+          An immediate for the `iohl' instruction.  const_int is
+          treated as a 32 bit value.
+
+    `I'
+          A constant in the range [-64, 63] for shift/rotate
+          instructions.
+
+    `J'
+          An unsigned 7-bit constant for conversion/nop/channel
+          instructions.
+
+    `K'
+          A signed 10-bit constant for most arithmetic instructions.
+
+    `M'
+          A signed 16 bit immediate for `stop'.
+
+    `N'
+          An unsigned 16-bit constant for `iohl' and `fsmbi'.
+
+    `O'
+          An unsigned 7-bit constant whose 3 least significant bits are
+          0.
+
+    `P'
+          An unsigned 3-bit constant for 16-byte rotates and shifts
+
+    `R'
+          Call operand, reg, for indirect calls
+
+    `S'
+          Call operand, symbol, for relative calls.
+
+    `T'
+          Call operand, const_int, for absolute calls.
+
+    `U'
+          An immediate which can be loaded with the il/ila/ilh/ilhu
+          instructions.  const_int is sign extended to 128 bit.
+
+    `W'
+          An immediate for shift and rotate instructions.  const_int is
+          treated as a 32 bit value.
+
+    `Y'
+          An immediate for and/xor/or instructions.  const_int is sign
+          extended as a 128 bit.
+
+    `Z'
+          An immediate for the `iohl' instruction.  const_int is sign
+          extended to 128 bit.
+
+
+_S/390 and zSeries--`config/s390/s390.h'_
+
+    `a'
+          Address register (general purpose register except r0)
+
+    `c'
+          Condition code register
+
+    `d'
+          Data register (arbitrary general purpose register)
+
+    `f'
+          Floating-point register
+
+    `I'
+          Unsigned 8-bit constant (0-255)
+
+    `J'
+          Unsigned 12-bit constant (0-4095)
+
+    `K'
+          Signed 16-bit constant (-32768-32767)
+
+    `L'
+          Value appropriate as displacement.
+         `(0..4095)'
+               for short displacement
+
+         `(-524288..524287)'
+               for long displacement
+
+    `M'
+          Constant integer with a value of 0x7fffffff.
+
+    `N'
+          Multiple letter constraint followed by 4 parameter letters.
+         `0..9:'
+               number of the part counting from most to least
+               significant
+
+         `H,Q:'
+               mode of the part
+
+         `D,S,H:'
+               mode of the containing operand
+
+         `0,F:'
+               value of the other parts (F--all bits set)
+          The constraint matches if the specified part of a constant
+          has a value different from its other parts.
+
+    `Q'
+          Memory reference without index register and with short
+          displacement.
+
+    `R'
+          Memory reference with index register and short displacement.
+
+    `S'
+          Memory reference without index register but with long
+          displacement.
+
+    `T'
+          Memory reference with index register and long displacement.
+
+    `U'
+          Pointer with short displacement.
+
+    `W'
+          Pointer with long displacement.
+
+    `Y'
+          Shift count operand.
+
+
+_Score family--`config/score/score.h'_
+
+    `d'
+          Registers from r0 to r32.
+
+    `e'
+          Registers from r0 to r16.
+
+    `t'
+          r8--r11 or r22--r27 registers.
+
+    `h'
+          hi register.
+
+    `l'
+          lo register.
+
+    `x'
+          hi + lo register.
+
+    `q'
+          cnt register.
+
+    `y'
+          lcb register.
+
+    `z'
+          scb register.
+
+    `a'
+          cnt + lcb + scb register.
+
+    `c'
+          cr0--cr15 register.
+
+    `b'
+          cp1 registers.
+
+    `f'
+          cp2 registers.
+
+    `i'
+          cp3 registers.
+
+    `j'
+          cp1 + cp2 + cp3 registers.
+
+    `I'
+          High 16-bit constant (32-bit constant with 16 LSBs zero).
+
+    `J'
+          Unsigned 5 bit integer (in the range 0 to 31).
+
+    `K'
+          Unsigned 16 bit integer (in the range 0 to 65535).
+
+    `L'
+          Signed 16 bit integer (in the range -32768 to 32767).
+
+    `M'
+          Unsigned 14 bit integer (in the range 0 to 16383).
+
+    `N'
+          Signed 14 bit integer (in the range -8192 to 8191).
+
+    `Z'
+          Any SYMBOL_REF.
+
+_Xstormy16--`config/stormy16/stormy16.h'_
+
+    `a'
+          Register r0.
+
+    `b'
+          Register r1.
+
+    `c'
+          Register r2.
+
+    `d'
+          Register r8.
+
+    `e'
+          Registers r0 through r7.
+
+    `t'
+          Registers r0 and r1.
+
+    `y'
+          The carry register.
+
+    `z'
+          Registers r8 and r9.
+
+    `I'
+          A constant between 0 and 3 inclusive.
+
+    `J'
+          A constant that has exactly one bit set.
+
+    `K'
+          A constant that has exactly one bit clear.
+
+    `L'
+          A constant between 0 and 255 inclusive.
+
+    `M'
+          A constant between -255 and 0 inclusive.
+
+    `N'
+          A constant between -3 and 0 inclusive.
+
+    `O'
+          A constant between 1 and 4 inclusive.
+
+    `P'
+          A constant between -4 and -1 inclusive.
+
+    `Q'
+          A memory reference that is a stack push.
+
+    `R'
+          A memory reference that is a stack pop.
+
+    `S'
+          A memory reference that refers to a constant address of known
+          value.
+
+    `T'
+          The register indicated by Rx (not implemented yet).
+
+    `U'
+          A constant that is not between 2 and 15 inclusive.
+
+    `Z'
+          The constant 0.
+
+
+_Xtensa--`config/xtensa/constraints.md'_
+
+    `a'
+          General-purpose 32-bit register
+
+    `b'
+          One-bit boolean register
+
+    `A'
+          MAC16 40-bit accumulator register
+
+    `I'
+          Signed 12-bit integer constant, for use in MOVI instructions
+
+    `J'
+          Signed 8-bit integer constant, for use in ADDI instructions
+
+    `K'
+          Integer constant valid for BccI instructions
+
+    `L'
+          Unsigned constant valid for BccUI instructions
+
+
+
+
+File: gcc.info,  Node: Asm Labels,  Next: Explicit Reg Vars,  Prev: Constraints,  Up: C Extensions
+
+6.43 Controlling Names Used in Assembler Code
+=============================================
+
+You can specify the name to be used in the assembler code for a C
+function or variable by writing the `asm' (or `__asm__') keyword after
+the declarator as follows:
+
+     int foo asm ("myfoo") = 2;
+
+This specifies that the name to be used for the variable `foo' in the
+assembler code should be `myfoo' rather than the usual `_foo'.
+
+ On systems where an underscore is normally prepended to the name of a C
+function or variable, this feature allows you to define names for the
+linker that do not start with an underscore.
+
+ It does not make sense to use this feature with a non-static local
+variable since such variables do not have assembler names.  If you are
+trying to put the variable in a particular register, see *note Explicit
+Reg Vars::.  GCC presently accepts such code with a warning, but will
+probably be changed to issue an error, rather than a warning, in the
+future.
+
+ You cannot use `asm' in this way in a function _definition_; but you
+can get the same effect by writing a declaration for the function
+before its definition and putting `asm' there, like this:
+
+     extern func () asm ("FUNC");
+
+     func (x, y)
+          int x, y;
+     /* ... */
+
+ It is up to you to make sure that the assembler names you choose do not
+conflict with any other assembler symbols.  Also, you must not use a
+register name; that would produce completely invalid assembler code.
+GCC does not as yet have the ability to store static variables in
+registers.  Perhaps that will be added.
+
+
+File: gcc.info,  Node: Explicit Reg Vars,  Next: Alternate Keywords,  Prev: Asm Labels,  Up: C Extensions
+
+6.44 Variables in Specified Registers
+=====================================
+
+GNU C allows you to put a few global variables into specified hardware
+registers.  You can also specify the register in which an ordinary
+register variable should be allocated.
+
+   * Global register variables reserve registers throughout the program.
+     This may be useful in programs such as programming language
+     interpreters which have a couple of global variables that are
+     accessed very often.
+
+   * Local register variables in specific registers do not reserve the
+     registers, except at the point where they are used as input or
+     output operands in an `asm' statement and the `asm' statement
+     itself is not deleted.  The compiler's data flow analysis is
+     capable of determining where the specified registers contain live
+     values, and where they are available for other uses.  Stores into
+     local register variables may be deleted when they appear to be
+     dead according to dataflow analysis.  References to local register
+     variables may be deleted or moved or simplified.
+
+     These local variables are sometimes convenient for use with the
+     extended `asm' feature (*note Extended Asm::), if you want to
+     write one output of the assembler instruction directly into a
+     particular register.  (This will work provided the register you
+     specify fits the constraints specified for that operand in the
+     `asm'.)
+
+* Menu:
+
+* Global Reg Vars::
+* Local Reg Vars::
+
+
+File: gcc.info,  Node: Global Reg Vars,  Next: Local Reg Vars,  Up: Explicit Reg Vars
+
+6.44.1 Defining Global Register Variables
+-----------------------------------------
+
+You can define a global register variable in GNU C like this:
+
+     register int *foo asm ("a5");
+
+Here `a5' is the name of the register which should be used.  Choose a
+register which is normally saved and restored by function calls on your
+machine, so that library routines will not clobber it.
+
+ Naturally the register name is cpu-dependent, so you would need to
+conditionalize your program according to cpu type.  The register `a5'
+would be a good choice on a 68000 for a variable of pointer type.  On
+machines with register windows, be sure to choose a "global" register
+that is not affected magically by the function call mechanism.
+
+ In addition, operating systems on one type of cpu may differ in how
+they name the registers; then you would need additional conditionals.
+For example, some 68000 operating systems call this register `%a5'.
+
+ Eventually there may be a way of asking the compiler to choose a
+register automatically, but first we need to figure out how it should
+choose and how to enable you to guide the choice.  No solution is
+evident.
+
+ Defining a global register variable in a certain register reserves that
+register entirely for this use, at least within the current compilation.
+The register will not be allocated for any other purpose in the
+functions in the current compilation.  The register will not be saved
+and restored by these functions.  Stores into this register are never
+deleted even if they would appear to be dead, but references may be
+deleted or moved or simplified.
+
+ It is not safe to access the global register variables from signal
+handlers, or from more than one thread of control, because the system
+library routines may temporarily use the register for other things
+(unless you recompile them specially for the task at hand).
+
+ It is not safe for one function that uses a global register variable to
+call another such function `foo' by way of a third function `lose' that
+was compiled without knowledge of this variable (i.e. in a different
+source file in which the variable wasn't declared).  This is because
+`lose' might save the register and put some other value there.  For
+example, you can't expect a global register variable to be available in
+the comparison-function that you pass to `qsort', since `qsort' might
+have put something else in that register.  (If you are prepared to
+recompile `qsort' with the same global register variable, you can solve
+this problem.)
+
+ If you want to recompile `qsort' or other source files which do not
+actually use your global register variable, so that they will not use
+that register for any other purpose, then it suffices to specify the
+compiler option `-ffixed-REG'.  You need not actually add a global
+register declaration to their source code.
+
+ A function which can alter the value of a global register variable
+cannot safely be called from a function compiled without this variable,
+because it could clobber the value the caller expects to find there on
+return.  Therefore, the function which is the entry point into the part
+of the program that uses the global register variable must explicitly
+save and restore the value which belongs to its caller.
+
+ On most machines, `longjmp' will restore to each global register
+variable the value it had at the time of the `setjmp'.  On some
+machines, however, `longjmp' will not change the value of global
+register variables.  To be portable, the function that called `setjmp'
+should make other arrangements to save the values of the global register
+variables, and to restore them in a `longjmp'.  This way, the same
+thing will happen regardless of what `longjmp' does.
+
+ All global register variable declarations must precede all function
+definitions.  If such a declaration could appear after function
+definitions, the declaration would be too late to prevent the register
+from being used for other purposes in the preceding functions.
+
+ Global register variables may not have initial values, because an
+executable file has no means to supply initial contents for a register.
+
+ On the SPARC, there are reports that g3 ... g7 are suitable registers,
+but certain library functions, such as `getwd', as well as the
+subroutines for division and remainder, modify g3 and g4.  g1 and g2
+are local temporaries.
+
+ On the 68000, a2 ... a5 should be suitable, as should d2 ... d7.  Of
+course, it will not do to use more than a few of those.
+
+
+File: gcc.info,  Node: Local Reg Vars,  Prev: Global Reg Vars,  Up: Explicit Reg Vars
+
+6.44.2 Specifying Registers for Local Variables
+-----------------------------------------------
+
+You can define a local register variable with a specified register like
+this:
+
+     register int *foo asm ("a5");
+
+Here `a5' is the name of the register which should be used.  Note that
+this is the same syntax used for defining global register variables,
+but for a local variable it would appear within a function.
+
+ Naturally the register name is cpu-dependent, but this is not a
+problem, since specific registers are most often useful with explicit
+assembler instructions (*note Extended Asm::).  Both of these things
+generally require that you conditionalize your program according to cpu
+type.
+
+ In addition, operating systems on one type of cpu may differ in how
+they name the registers; then you would need additional conditionals.
+For example, some 68000 operating systems call this register `%a5'.
+
+ Defining such a register variable does not reserve the register; it
+remains available for other uses in places where flow control determines
+the variable's value is not live.
+
+ This option does not guarantee that GCC will generate code that has
+this variable in the register you specify at all times.  You may not
+code an explicit reference to this register in the _assembler
+instruction template_ part of an `asm' statement and assume it will
+always refer to this variable.  However, using the variable as an `asm'
+_operand_ guarantees that the specified register is used for the
+operand.
+
+ Stores into local register variables may be deleted when they appear
+to be dead according to dataflow analysis.  References to local
+register variables may be deleted or moved or simplified.
+
+ As for global register variables, it's recommended that you choose a
+register which is normally saved and restored by function calls on your
+machine, so that library routines will not clobber it.  A common
+pitfall is to initialize multiple call-clobbered registers with
+arbitrary expressions, where a function call or library call for an
+arithmetic operator will overwrite a register value from a previous
+assignment, for example `r0' below:
+     register int *p1 asm ("r0") = ...;
+     register int *p2 asm ("r1") = ...;
+ In those cases, a solution is to use a temporary variable for each
+arbitrary expression.   *Note Example of asm with clobbered asm reg::.
+
+
+File: gcc.info,  Node: Alternate Keywords,  Next: Incomplete Enums,  Prev: Explicit Reg Vars,  Up: C Extensions
+
+6.45 Alternate Keywords
+=======================
+
+`-ansi' and the various `-std' options disable certain keywords.  This
+causes trouble when you want to use GNU C extensions, or a
+general-purpose header file that should be usable by all programs,
+including ISO C programs.  The keywords `asm', `typeof' and `inline'
+are not available in programs compiled with `-ansi' or `-std' (although
+`inline' can be used in a program compiled with `-std=c99' or
+`-std=c1x').  The ISO C99 keyword `restrict' is only available when
+`-std=gnu99' (which will eventually be the default) or `-std=c99' (or
+the equivalent `-std=iso9899:1999'), or an option for a later standard
+version, is used.
+
+ The way to solve these problems is to put `__' at the beginning and
+end of each problematical keyword.  For example, use `__asm__' instead
+of `asm', and `__inline__' instead of `inline'.
+
+ Other C compilers won't accept these alternative keywords; if you want
+to compile with another compiler, you can define the alternate keywords
+as macros to replace them with the customary keywords.  It looks like
+this:
+
+     #ifndef __GNUC__
+     #define __asm__ asm
+     #endif
+
+ `-pedantic' and other options cause warnings for many GNU C extensions.
+You can prevent such warnings within one expression by writing
+`__extension__' before the expression.  `__extension__' has no effect
+aside from this.
+
+
+File: gcc.info,  Node: Incomplete Enums,  Next: Function Names,  Prev: Alternate Keywords,  Up: C Extensions
+
+6.46 Incomplete `enum' Types
+============================
+
+You can define an `enum' tag without specifying its possible values.
+This results in an incomplete type, much like what you get if you write
+`struct foo' without describing the elements.  A later declaration
+which does specify the possible values completes the type.
+
+ You can't allocate variables or storage using the type while it is
+incomplete.  However, you can work with pointers to that type.
+
+ This extension may not be very useful, but it makes the handling of
+`enum' more consistent with the way `struct' and `union' are handled.
+
+ This extension is not supported by GNU C++.
+
+
+File: gcc.info,  Node: Function Names,  Next: Return Address,  Prev: Incomplete Enums,  Up: C Extensions
+
+6.47 Function Names as Strings
+==============================
+
+GCC provides three magic variables which hold the name of the current
+function, as a string.  The first of these is `__func__', which is part
+of the C99 standard:
+
+ The identifier `__func__' is implicitly declared by the translator as
+if, immediately following the opening brace of each function
+definition, the declaration
+
+     static const char __func__[] = "function-name";
+
+appeared, where function-name is the name of the lexically-enclosing
+function.  This name is the unadorned name of the function.
+
+ `__FUNCTION__' is another name for `__func__'.  Older versions of GCC
+recognize only this name.  However, it is not standardized.  For
+maximum portability, we recommend you use `__func__', but provide a
+fallback definition with the preprocessor:
+
+     #if __STDC_VERSION__ < 199901L
+     # if __GNUC__ >= 2
+     #  define __func__ __FUNCTION__
+     # else
+     #  define __func__ "<unknown>"
+     # endif
+     #endif
+
+ In C, `__PRETTY_FUNCTION__' is yet another name for `__func__'.
+However, in C++, `__PRETTY_FUNCTION__' contains the type signature of
+the function as well as its bare name.  For example, this program:
+
+     extern "C" {
+     extern int printf (char *, ...);
+     }
+
+     class a {
+      public:
+       void sub (int i)
+         {
+           printf ("__FUNCTION__ = %s\n", __FUNCTION__);
+           printf ("__PRETTY_FUNCTION__ = %s\n", __PRETTY_FUNCTION__);
+         }
+     };
+
+     int
+     main (void)
+     {
+       a ax;
+       ax.sub (0);
+       return 0;
+     }
+
+gives this output:
+
+     __FUNCTION__ = sub
+     __PRETTY_FUNCTION__ = void a::sub(int)
+
+ These identifiers are not preprocessor macros.  In GCC 3.3 and
+earlier, in C only, `__FUNCTION__' and `__PRETTY_FUNCTION__' were
+treated as string literals; they could be used to initialize `char'
+arrays, and they could be concatenated with other string literals.  GCC
+3.4 and later treat them as variables, like `__func__'.  In C++,
+`__FUNCTION__' and `__PRETTY_FUNCTION__' have always been variables.
+
+
+File: gcc.info,  Node: Return Address,  Next: Vector Extensions,  Prev: Function Names,  Up: C Extensions
+
+6.48 Getting the Return or Frame Address of a Function
+======================================================
+
+These functions may be used to get information about the callers of a
+function.
+
+ -- Built-in Function: void * __builtin_return_address (unsigned int
+          LEVEL)
+     This function returns the return address of the current function,
+     or of one of its callers.  The LEVEL argument is number of frames
+     to scan up the call stack.  A value of `0' yields the return
+     address of the current function, a value of `1' yields the return
+     address of the caller of the current function, and so forth.  When
+     inlining the expected behavior is that the function will return
+     the address of the function that will be returned to.  To work
+     around this behavior use the `noinline' function attribute.
+
+     The LEVEL argument must be a constant integer.
+
+     On some machines it may be impossible to determine the return
+     address of any function other than the current one; in such cases,
+     or when the top of the stack has been reached, this function will
+     return `0' or a random value.  In addition,
+     `__builtin_frame_address' may be used to determine if the top of
+     the stack has been reached.
+
+     Additional post-processing of the returned value may be needed, see
+     `__builtin_extract_return_address'.
+
+     This function should only be used with a nonzero argument for
+     debugging purposes.
+
+ -- Built-in Function: void * __builtin_extract_return_address (void
+          *ADDR)
+     The address as returned by `__builtin_return_address' may have to
+     be fed through this function to get the actual encoded address.
+     For example, on the 31-bit S/390 platform the highest bit has to
+     be masked out, or on SPARC platforms an offset has to be added for
+     the true next instruction to be executed.
+
+     If no fixup is needed, this function simply passes through ADDR.
+
+ -- Built-in Function: void * __builtin_frob_return_address (void *ADDR)
+     This function does the reverse of
+     `__builtin_extract_return_address'.
+
+ -- Built-in Function: void * __builtin_frame_address (unsigned int
+          LEVEL)
+     This function is similar to `__builtin_return_address', but it
+     returns the address of the function frame rather than the return
+     address of the function.  Calling `__builtin_frame_address' with a
+     value of `0' yields the frame address of the current function, a
+     value of `1' yields the frame address of the caller of the current
+     function, and so forth.
+
+     The frame is the area on the stack which holds local variables and
+     saved registers.  The frame address is normally the address of the
+     first word pushed on to the stack by the function.  However, the
+     exact definition depends upon the processor and the calling
+     convention.  If the processor has a dedicated frame pointer
+     register, and the function has a frame, then
+     `__builtin_frame_address' will return the value of the frame
+     pointer register.
+
+     On some machines it may be impossible to determine the frame
+     address of any function other than the current one; in such cases,
+     or when the top of the stack has been reached, this function will
+     return `0' if the first frame pointer is properly initialized by
+     the startup code.
+
+     This function should only be used with a nonzero argument for
+     debugging purposes.
+
+
+File: gcc.info,  Node: Vector Extensions,  Next: Offsetof,  Prev: Return Address,  Up: C Extensions
+
+6.49 Using vector instructions through built-in functions
+=========================================================
+
+On some targets, the instruction set contains SIMD vector instructions
+that operate on multiple values contained in one large register at the
+same time.  For example, on the i386 the MMX, 3DNow! and SSE extensions
+can be used this way.
+
+ The first step in using these extensions is to provide the necessary
+data types.  This should be done using an appropriate `typedef':
+
+     typedef int v4si __attribute__ ((vector_size (16)));
+
+ The `int' type specifies the base type, while the attribute specifies
+the vector size for the variable, measured in bytes.  For example, the
+declaration above causes the compiler to set the mode for the `v4si'
+type to be 16 bytes wide and divided into `int' sized units.  For a
+32-bit `int' this means a vector of 4 units of 4 bytes, and the
+corresponding mode of `foo' will be V4SI.
+
+ The `vector_size' attribute is only applicable to integral and float
+scalars, although arrays, pointers, and function return values are
+allowed in conjunction with this construct.
+
+ All the basic integer types can be used as base types, both as signed
+and as unsigned: `char', `short', `int', `long', `long long'.  In
+addition, `float' and `double' can be used to build floating-point
+vector types.
+
+ Specifying a combination that is not valid for the current architecture
+will cause GCC to synthesize the instructions using a narrower mode.
+For example, if you specify a variable of type `V4SI' and your
+architecture does not allow for this specific SIMD type, GCC will
+produce code that uses 4 `SIs'.
+
+ The types defined in this manner can be used with a subset of normal C
+operations.  Currently, GCC will allow using the following operators on
+these types: `+, -, *, /, unary minus, ^, |, &, ~, %'.
+
+ The operations behave like C++ `valarrays'.  Addition is defined as
+the addition of the corresponding elements of the operands.  For
+example, in the code below, each of the 4 elements in A will be added
+to the corresponding 4 elements in B and the resulting vector will be
+stored in C.
+
+     typedef int v4si __attribute__ ((vector_size (16)));
+
+     v4si a, b, c;
+
+     c = a + b;
+
+ Subtraction, multiplication, division, and the logical operations
+operate in a similar manner.  Likewise, the result of using the unary
+minus or complement operators on a vector type is a vector whose
+elements are the negative or complemented values of the corresponding
+elements in the operand.
+
+ In C it is possible to use shifting operators `<<', `>>' on
+integer-type vectors. The operation is defined as following: `{a0, a1,
+..., an} >> {b0, b1, ..., bn} == {a0 >> b0, a1 >> b1, ..., an >> bn}'.
+Vector operands must have the same number of elements.  Additionally
+second operands can be a scalar integer in which case the scalar is
+converted to the type used by the vector operand (with possible
+truncation) and each element of this new vector is the scalar's value.
+Consider the following code.
+
+     typedef int v4si __attribute__ ((vector_size (16)));
+
+     v4si a, b;
+
+     b = a >> 1;     /* b = a >> {1,1,1,1}; */
+
+ In C vectors can be subscripted as if the vector were an array with
+the same number of elements and base type.  Out of bound accesses
+invoke undefined behavior at runtime.  Warnings for out of bound
+accesses for vector subscription can be enabled with `-Warray-bounds'.
+
+ You can declare variables and use them in function calls and returns,
+as well as in assignments and some casts.  You can specify a vector
+type as a return type for a function.  Vector types can also be used as
+function arguments.  It is possible to cast from one vector type to
+another, provided they are of the same size (in fact, you can also cast
+vectors to and from other datatypes of the same size).
+
+ You cannot operate between vectors of different lengths or different
+signedness without a cast.
+
+ A port that supports hardware vector operations, usually provides a set
+of built-in functions that can be used to operate on vectors.  For
+example, a function to add two vectors and multiply the result by a
+third could look like this:
+
+     v4si f (v4si a, v4si b, v4si c)
+     {
+       v4si tmp = __builtin_addv4si (a, b);
+       return __builtin_mulv4si (tmp, c);
+     }
+
+
+File: gcc.info,  Node: Offsetof,  Next: Atomic Builtins,  Prev: Vector Extensions,  Up: C Extensions
+
+6.50 Offsetof
+=============
+
+GCC implements for both C and C++ a syntactic extension to implement
+the `offsetof' macro.
+
+     primary:
+             "__builtin_offsetof" "(" `typename' "," offsetof_member_designator ")"
+
+     offsetof_member_designator:
+               `identifier'
+             | offsetof_member_designator "." `identifier'
+             | offsetof_member_designator "[" `expr' "]"
+
+ This extension is sufficient such that
+
+     #define offsetof(TYPE, MEMBER)  __builtin_offsetof (TYPE, MEMBER)
+
+ is a suitable definition of the `offsetof' macro.  In C++, TYPE may be
+dependent.  In either case, MEMBER may consist of a single identifier,
+or a sequence of member accesses and array references.
+
+
+File: gcc.info,  Node: Atomic Builtins,  Next: Object Size Checking,  Prev: Offsetof,  Up: C Extensions
+
+6.51 Built-in functions for atomic memory access
+================================================
+
+The following builtins are intended to be compatible with those
+described in the `Intel Itanium Processor-specific Application Binary
+Interface', section 7.4.  As such, they depart from the normal GCC
+practice of using the "__builtin_" prefix, and further that they are
+overloaded such that they work on multiple types.
+
+ The definition given in the Intel documentation allows only for the
+use of the types `int', `long', `long long' as well as their unsigned
+counterparts.  GCC will allow any integral scalar or pointer type that
+is 1, 2, 4 or 8 bytes in length.
+
+ Not all operations are supported by all target processors.  If a
+particular operation cannot be implemented on the target processor, a
+warning will be generated and a call an external function will be
+generated.  The external function will carry the same name as the
+builtin, with an additional suffix `_N' where N is the size of the data
+type.
+
+ In most cases, these builtins are considered a "full barrier".  That
+is, no memory operand will be moved across the operation, either
+forward or backward.  Further, instructions will be issued as necessary
+to prevent the processor from speculating loads across the operation
+and from queuing stores after the operation.
+
+ All of the routines are described in the Intel documentation to take
+"an optional list of variables protected by the memory barrier".  It's
+not clear what is meant by that; it could mean that _only_ the
+following variables are protected, or it could mean that these variables
+should in addition be protected.  At present GCC ignores this list and
+protects all variables which are globally accessible.  If in the future
+we make some use of this list, an empty list will continue to mean all
+globally accessible variables.
+
+`TYPE __sync_fetch_and_add (TYPE *ptr, TYPE value, ...)'
+`TYPE __sync_fetch_and_sub (TYPE *ptr, TYPE value, ...)'
+`TYPE __sync_fetch_and_or (TYPE *ptr, TYPE value, ...)'
+`TYPE __sync_fetch_and_and (TYPE *ptr, TYPE value, ...)'
+`TYPE __sync_fetch_and_xor (TYPE *ptr, TYPE value, ...)'
+`TYPE __sync_fetch_and_nand (TYPE *ptr, TYPE value, ...)'
+     These builtins perform the operation suggested by the name, and
+     returns the value that had previously been in memory.  That is,
+
+          { tmp = *ptr; *ptr OP= value; return tmp; }
+          { tmp = *ptr; *ptr = ~(tmp & value); return tmp; }   // nand
+
+     _Note:_ GCC 4.4 and later implement `__sync_fetch_and_nand'
+     builtin as `*ptr = ~(tmp & value)' instead of `*ptr = ~tmp &
+     value'.
+
+`TYPE __sync_add_and_fetch (TYPE *ptr, TYPE value, ...)'
+`TYPE __sync_sub_and_fetch (TYPE *ptr, TYPE value, ...)'
+`TYPE __sync_or_and_fetch (TYPE *ptr, TYPE value, ...)'
+`TYPE __sync_and_and_fetch (TYPE *ptr, TYPE value, ...)'
+`TYPE __sync_xor_and_fetch (TYPE *ptr, TYPE value, ...)'
+`TYPE __sync_nand_and_fetch (TYPE *ptr, TYPE value, ...)'
+     These builtins perform the operation suggested by the name, and
+     return the new value.  That is,
+
+          { *ptr OP= value; return *ptr; }
+          { *ptr = ~(*ptr & value); return *ptr; }   // nand
+
+     _Note:_ GCC 4.4 and later implement `__sync_nand_and_fetch'
+     builtin as `*ptr = ~(*ptr & value)' instead of `*ptr = ~*ptr &
+     value'.
+
+`bool __sync_bool_compare_and_swap (TYPE *ptr, TYPE oldval TYPE newval, ...)'
+`TYPE __sync_val_compare_and_swap (TYPE *ptr, TYPE oldval TYPE newval, ...)'
+     These builtins perform an atomic compare and swap.  That is, if
+     the current value of `*PTR' is OLDVAL, then write NEWVAL into
+     `*PTR'.
+
+     The "bool" version returns true if the comparison is successful and
+     NEWVAL was written.  The "val" version returns the contents of
+     `*PTR' before the operation.
+
+`__sync_synchronize (...)'
+     This builtin issues a full memory barrier.
+
+`TYPE __sync_lock_test_and_set (TYPE *ptr, TYPE value, ...)'
+     This builtin, as described by Intel, is not a traditional
+     test-and-set operation, but rather an atomic exchange operation.
+     It writes VALUE into `*PTR', and returns the previous contents of
+     `*PTR'.
+
+     Many targets have only minimal support for such locks, and do not
+     support a full exchange operation.  In this case, a target may
+     support reduced functionality here by which the _only_ valid value
+     to store is the immediate constant 1.  The exact value actually
+     stored in `*PTR' is implementation defined.
+
+     This builtin is not a full barrier, but rather an "acquire
+     barrier".  This means that references after the builtin cannot
+     move to (or be speculated to) before the builtin, but previous
+     memory stores may not be globally visible yet, and previous memory
+     loads may not yet be satisfied.
+
+`void __sync_lock_release (TYPE *ptr, ...)'
+     This builtin releases the lock acquired by
+     `__sync_lock_test_and_set'.  Normally this means writing the
+     constant 0 to `*PTR'.
+
+     This builtin is not a full barrier, but rather a "release barrier".
+     This means that all previous memory stores are globally visible,
+     and all previous memory loads have been satisfied, but following
+     memory reads are not prevented from being speculated to before the
+     barrier.
+
+
+File: gcc.info,  Node: Object Size Checking,  Next: Other Builtins,  Prev: Atomic Builtins,  Up: C Extensions
+
+6.52 Object Size Checking Builtins
+==================================
+
+GCC implements a limited buffer overflow protection mechanism that can
+prevent some buffer overflow attacks.
+
+ -- Built-in Function: size_t __builtin_object_size (void * PTR, int
+          TYPE)
+     is a built-in construct that returns a constant number of bytes
+     from PTR to the end of the object PTR pointer points to (if known
+     at compile time).  `__builtin_object_size' never evaluates its
+     arguments for side-effects.  If there are any side-effects in
+     them, it returns `(size_t) -1' for TYPE 0 or 1 and `(size_t) 0'
+     for TYPE 2 or 3.  If there are multiple objects PTR can point to
+     and all of them are known at compile time, the returned number is
+     the maximum of remaining byte counts in those objects if TYPE & 2
+     is 0 and minimum if nonzero.  If it is not possible to determine
+     which objects PTR points to at compile time,
+     `__builtin_object_size' should return `(size_t) -1' for TYPE 0 or
+     1 and `(size_t) 0' for TYPE 2 or 3.
+
+     TYPE is an integer constant from 0 to 3.  If the least significant
+     bit is clear, objects are whole variables, if it is set, a closest
+     surrounding subobject is considered the object a pointer points to.
+     The second bit determines if maximum or minimum of remaining bytes
+     is computed.
+
+          struct V { char buf1[10]; int b; char buf2[10]; } var;
+          char *p = &var.buf1[1], *q = &var.b;
+
+          /* Here the object p points to is var.  */
+          assert (__builtin_object_size (p, 0) == sizeof (var) - 1);
+          /* The subobject p points to is var.buf1.  */
+          assert (__builtin_object_size (p, 1) == sizeof (var.buf1) - 1);
+          /* The object q points to is var.  */
+          assert (__builtin_object_size (q, 0)
+                  == (char *) (&var + 1) - (char *) &var.b);
+          /* The subobject q points to is var.b.  */
+          assert (__builtin_object_size (q, 1) == sizeof (var.b));
+
+ There are built-in functions added for many common string operation
+functions, e.g., for `memcpy' `__builtin___memcpy_chk' built-in is
+provided.  This built-in has an additional last argument, which is the
+number of bytes remaining in object the DEST argument points to or
+`(size_t) -1' if the size is not known.
+
+ The built-in functions are optimized into the normal string functions
+like `memcpy' if the last argument is `(size_t) -1' or if it is known
+at compile time that the destination object will not be overflown.  If
+the compiler can determine at compile time the object will be always
+overflown, it issues a warning.
+
+ The intended use can be e.g.
+
+     #undef memcpy
+     #define bos0(dest) __builtin_object_size (dest, 0)
+     #define memcpy(dest, src, n) \
+       __builtin___memcpy_chk (dest, src, n, bos0 (dest))
+
+     char *volatile p;
+     char buf[10];
+     /* It is unknown what object p points to, so this is optimized
+        into plain memcpy - no checking is possible.  */
+     memcpy (p, "abcde", n);
+     /* Destination is known and length too.  It is known at compile
+        time there will be no overflow.  */
+     memcpy (&buf[5], "abcde", 5);
+     /* Destination is known, but the length is not known at compile time.
+        This will result in __memcpy_chk call that can check for overflow
+        at runtime.  */
+     memcpy (&buf[5], "abcde", n);
+     /* Destination is known and it is known at compile time there will
+        be overflow.  There will be a warning and __memcpy_chk call that
+        will abort the program at runtime.  */
+     memcpy (&buf[6], "abcde", 5);
+
+ Such built-in functions are provided for `memcpy', `mempcpy',
+`memmove', `memset', `strcpy', `stpcpy', `strncpy', `strcat' and
+`strncat'.
+
+ There are also checking built-in functions for formatted output
+functions.
+     int __builtin___sprintf_chk (char *s, int flag, size_t os, const char *fmt, ...);
+     int __builtin___snprintf_chk (char *s, size_t maxlen, int flag, size_t os,
+                                   const char *fmt, ...);
+     int __builtin___vsprintf_chk (char *s, int flag, size_t os, const char *fmt,
+                                   va_list ap);
+     int __builtin___vsnprintf_chk (char *s, size_t maxlen, int flag, size_t os,
+                                    const char *fmt, va_list ap);
+
+ The added FLAG argument is passed unchanged to `__sprintf_chk' etc.
+functions and can contain implementation specific flags on what
+additional security measures the checking function might take, such as
+handling `%n' differently.
+
+ The OS argument is the object size S points to, like in the other
+built-in functions.  There is a small difference in the behavior
+though, if OS is `(size_t) -1', the built-in functions are optimized
+into the non-checking functions only if FLAG is 0, otherwise the
+checking function is called with OS argument set to `(size_t) -1'.
+
+ In addition to this, there are checking built-in functions
+`__builtin___printf_chk', `__builtin___vprintf_chk',
+`__builtin___fprintf_chk' and `__builtin___vfprintf_chk'.  These have
+just one additional argument, FLAG, right before format string FMT.  If
+the compiler is able to optimize them to `fputc' etc. functions, it
+will, otherwise the checking function should be called and the FLAG
+argument passed to it.
+
+
+File: gcc.info,  Node: Other Builtins,  Next: Target Builtins,  Prev: Object Size Checking,  Up: C Extensions
+
+6.53 Other built-in functions provided by GCC
+=============================================
+
+GCC provides a large number of built-in functions other than the ones
+mentioned above.  Some of these are for internal use in the processing
+of exceptions or variable-length argument lists and will not be
+documented here because they may change from time to time; we do not
+recommend general use of these functions.
+
+ The remaining functions are provided for optimization purposes.
+
+ GCC includes built-in versions of many of the functions in the standard
+C library.  The versions prefixed with `__builtin_' will always be
+treated as having the same meaning as the C library function even if you
+specify the `-fno-builtin' option.  (*note C Dialect Options::) Many of
+these functions are only optimized in certain cases; if they are not
+optimized in a particular case, a call to the library function will be
+emitted.
+
+ Outside strict ISO C mode (`-ansi', `-std=c90', `-std=c99' or
+`-std=c1x'), the functions `_exit', `alloca', `bcmp', `bzero',
+`dcgettext', `dgettext', `dremf', `dreml', `drem', `exp10f', `exp10l',
+`exp10', `ffsll', `ffsl', `ffs', `fprintf_unlocked', `fputs_unlocked',
+`gammaf', `gammal', `gamma', `gammaf_r', `gammal_r', `gamma_r',
+`gettext', `index', `isascii', `j0f', `j0l', `j0', `j1f', `j1l', `j1',
+`jnf', `jnl', `jn', `lgammaf_r', `lgammal_r', `lgamma_r', `mempcpy',
+`pow10f', `pow10l', `pow10', `printf_unlocked', `rindex', `scalbf',
+`scalbl', `scalb', `signbit', `signbitf', `signbitl', `signbitd32',
+`signbitd64', `signbitd128', `significandf', `significandl',
+`significand', `sincosf', `sincosl', `sincos', `stpcpy', `stpncpy',
+`strcasecmp', `strdup', `strfmon', `strncasecmp', `strndup', `toascii',
+`y0f', `y0l', `y0', `y1f', `y1l', `y1', `ynf', `ynl' and `yn' may be
+handled as built-in functions.  All these functions have corresponding
+versions prefixed with `__builtin_', which may be used even in strict
+C90 mode.
+
+ The ISO C99 functions `_Exit', `acoshf', `acoshl', `acosh', `asinhf',
+`asinhl', `asinh', `atanhf', `atanhl', `atanh', `cabsf', `cabsl',
+`cabs', `cacosf', `cacoshf', `cacoshl', `cacosh', `cacosl', `cacos',
+`cargf', `cargl', `carg', `casinf', `casinhf', `casinhl', `casinh',
+`casinl', `casin', `catanf', `catanhf', `catanhl', `catanh', `catanl',
+`catan', `cbrtf', `cbrtl', `cbrt', `ccosf', `ccoshf', `ccoshl',
+`ccosh', `ccosl', `ccos', `cexpf', `cexpl', `cexp', `cimagf', `cimagl',
+`cimag', `clogf', `clogl', `clog', `conjf', `conjl', `conj',
+`copysignf', `copysignl', `copysign', `cpowf', `cpowl', `cpow',
+`cprojf', `cprojl', `cproj', `crealf', `creall', `creal', `csinf',
+`csinhf', `csinhl', `csinh', `csinl', `csin', `csqrtf', `csqrtl',
+`csqrt', `ctanf', `ctanhf', `ctanhl', `ctanh', `ctanl', `ctan',
+`erfcf', `erfcl', `erfc', `erff', `erfl', `erf', `exp2f', `exp2l',
+`exp2', `expm1f', `expm1l', `expm1', `fdimf', `fdiml', `fdim', `fmaf',
+`fmal', `fmaxf', `fmaxl', `fmax', `fma', `fminf', `fminl', `fmin',
+`hypotf', `hypotl', `hypot', `ilogbf', `ilogbl', `ilogb', `imaxabs',
+`isblank', `iswblank', `lgammaf', `lgammal', `lgamma', `llabs',
+`llrintf', `llrintl', `llrint', `llroundf', `llroundl', `llround',
+`log1pf', `log1pl', `log1p', `log2f', `log2l', `log2', `logbf',
+`logbl', `logb', `lrintf', `lrintl', `lrint', `lroundf', `lroundl',
+`lround', `nearbyintf', `nearbyintl', `nearbyint', `nextafterf',
+`nextafterl', `nextafter', `nexttowardf', `nexttowardl', `nexttoward',
+`remainderf', `remainderl', `remainder', `remquof', `remquol',
+`remquo', `rintf', `rintl', `rint', `roundf', `roundl', `round',
+`scalblnf', `scalblnl', `scalbln', `scalbnf', `scalbnl', `scalbn',
+`snprintf', `tgammaf', `tgammal', `tgamma', `truncf', `truncl', `trunc',
+`vfscanf', `vscanf', `vsnprintf' and `vsscanf' are handled as built-in
+functions except in strict ISO C90 mode (`-ansi' or `-std=c90').
+
+ There are also built-in versions of the ISO C99 functions `acosf',
+`acosl', `asinf', `asinl', `atan2f', `atan2l', `atanf', `atanl',
+`ceilf', `ceill', `cosf', `coshf', `coshl', `cosl', `expf', `expl',
+`fabsf', `fabsl', `floorf', `floorl', `fmodf', `fmodl', `frexpf',
+`frexpl', `ldexpf', `ldexpl', `log10f', `log10l', `logf', `logl',
+`modfl', `modf', `powf', `powl', `sinf', `sinhf', `sinhl', `sinl',
+`sqrtf', `sqrtl', `tanf', `tanhf', `tanhl' and `tanl' that are
+recognized in any mode since ISO C90 reserves these names for the
+purpose to which ISO C99 puts them.  All these functions have
+corresponding versions prefixed with `__builtin_'.
+
+ The ISO C94 functions `iswalnum', `iswalpha', `iswcntrl', `iswdigit',
+`iswgraph', `iswlower', `iswprint', `iswpunct', `iswspace', `iswupper',
+`iswxdigit', `towlower' and `towupper' are handled as built-in functions
+except in strict ISO C90 mode (`-ansi' or `-std=c90').
+
+ The ISO C90 functions `abort', `abs', `acos', `asin', `atan2', `atan',
+`calloc', `ceil', `cosh', `cos', `exit', `exp', `fabs', `floor', `fmod',
+`fprintf', `fputs', `frexp', `fscanf', `isalnum', `isalpha', `iscntrl',
+`isdigit', `isgraph', `islower', `isprint', `ispunct', `isspace',
+`isupper', `isxdigit', `tolower', `toupper', `labs', `ldexp', `log10',
+`log', `malloc', `memchr', `memcmp', `memcpy', `memset', `modf', `pow',
+`printf', `putchar', `puts', `scanf', `sinh', `sin', `snprintf',
+`sprintf', `sqrt', `sscanf', `strcat', `strchr', `strcmp', `strcpy',
+`strcspn', `strlen', `strncat', `strncmp', `strncpy', `strpbrk',
+`strrchr', `strspn', `strstr', `tanh', `tan', `vfprintf', `vprintf' and
+`vsprintf' are all recognized as built-in functions unless
+`-fno-builtin' is specified (or `-fno-builtin-FUNCTION' is specified
+for an individual function).  All of these functions have corresponding
+versions prefixed with `__builtin_'.
+
+ GCC provides built-in versions of the ISO C99 floating point comparison
+macros that avoid raising exceptions for unordered operands.  They have
+the same names as the standard macros ( `isgreater', `isgreaterequal',
+`isless', `islessequal', `islessgreater', and `isunordered') , with
+`__builtin_' prefixed.  We intend for a library implementor to be able
+to simply `#define' each standard macro to its built-in equivalent.  In
+the same fashion, GCC provides `fpclassify', `isfinite', `isinf_sign'
+and `isnormal' built-ins used with `__builtin_' prefixed.  The `isinf'
+and `isnan' builtins appear both with and without the `__builtin_'
+prefix.
+
+ -- Built-in Function: int __builtin_types_compatible_p (TYPE1, TYPE2)
+     You can use the built-in function `__builtin_types_compatible_p' to
+     determine whether two types are the same.
+
+     This built-in function returns 1 if the unqualified versions of the
+     types TYPE1 and TYPE2 (which are types, not expressions) are
+     compatible, 0 otherwise.  The result of this built-in function can
+     be used in integer constant expressions.
+
+     This built-in function ignores top level qualifiers (e.g., `const',
+     `volatile').  For example, `int' is equivalent to `const int'.
+
+     The type `int[]' and `int[5]' are compatible.  On the other hand,
+     `int' and `char *' are not compatible, even if the size of their
+     types, on the particular architecture are the same.  Also, the
+     amount of pointer indirection is taken into account when
+     determining similarity.  Consequently, `short *' is not similar to
+     `short **'.  Furthermore, two types that are typedefed are
+     considered compatible if their underlying types are compatible.
+
+     An `enum' type is not considered to be compatible with another
+     `enum' type even if both are compatible with the same integer
+     type; this is what the C standard specifies.  For example, `enum
+     {foo, bar}' is not similar to `enum {hot, dog}'.
+
+     You would typically use this function in code whose execution
+     varies depending on the arguments' types.  For example:
+
+          #define foo(x)                                                  \
+            ({                                                           \
+              typeof (x) tmp = (x);                                       \
+              if (__builtin_types_compatible_p (typeof (x), long double)) \
+                tmp = foo_long_double (tmp);                              \
+              else if (__builtin_types_compatible_p (typeof (x), double)) \
+                tmp = foo_double (tmp);                                   \
+              else if (__builtin_types_compatible_p (typeof (x), float))  \
+                tmp = foo_float (tmp);                                    \
+              else                                                        \
+                abort ();                                                 \
+              tmp;                                                        \
+            })
+
+     _Note:_ This construct is only available for C.
+
+
+ -- Built-in Function: TYPE __builtin_choose_expr (CONST_EXP, EXP1,
+          EXP2)
+     You can use the built-in function `__builtin_choose_expr' to
+     evaluate code depending on the value of a constant expression.
+     This built-in function returns EXP1 if CONST_EXP, which is an
+     integer constant expression, is nonzero.  Otherwise it returns
+     EXP2.
+
+     This built-in function is analogous to the `? :' operator in C,
+     except that the expression returned has its type unaltered by
+     promotion rules.  Also, the built-in function does not evaluate
+     the expression that was not chosen.  For example, if CONST_EXP
+     evaluates to true, EXP2 is not evaluated even if it has
+     side-effects.
+
+     This built-in function can return an lvalue if the chosen argument
+     is an lvalue.
+
+     If EXP1 is returned, the return type is the same as EXP1's type.
+     Similarly, if EXP2 is returned, its return type is the same as
+     EXP2.
+
+     Example:
+
+          #define foo(x)                                                    \
+            __builtin_choose_expr (                                         \
+              __builtin_types_compatible_p (typeof (x), double),            \
+              foo_double (x),                                               \
+              __builtin_choose_expr (                                       \
+                __builtin_types_compatible_p (typeof (x), float),           \
+                foo_float (x),                                              \
+                /* The void expression results in a compile-time error  \
+                   when assigning the result to something.  */          \
+                (void)0))
+
+     _Note:_ This construct is only available for C.  Furthermore, the
+     unused expression (EXP1 or EXP2 depending on the value of
+     CONST_EXP) may still generate syntax errors.  This may change in
+     future revisions.
+
+
+ -- Built-in Function: int __builtin_constant_p (EXP)
+     You can use the built-in function `__builtin_constant_p' to
+     determine if a value is known to be constant at compile-time and
+     hence that GCC can perform constant-folding on expressions
+     involving that value.  The argument of the function is the value
+     to test.  The function returns the integer 1 if the argument is
+     known to be a compile-time constant and 0 if it is not known to be
+     a compile-time constant.  A return of 0 does not indicate that the
+     value is _not_ a constant, but merely that GCC cannot prove it is
+     a constant with the specified value of the `-O' option.
+
+     You would typically use this function in an embedded application
+     where memory was a critical resource.  If you have some complex
+     calculation, you may want it to be folded if it involves
+     constants, but need to call a function if it does not.  For
+     example:
+
+          #define Scale_Value(X)      \
+            (__builtin_constant_p (X) \
+            ? ((X) * SCALE + OFFSET) : Scale (X))
+
+     You may use this built-in function in either a macro or an inline
+     function.  However, if you use it in an inlined function and pass
+     an argument of the function as the argument to the built-in, GCC
+     will never return 1 when you call the inline function with a
+     string constant or compound literal (*note Compound Literals::)
+     and will not return 1 when you pass a constant numeric value to
+     the inline function unless you specify the `-O' option.
+
+     You may also use `__builtin_constant_p' in initializers for static
+     data.  For instance, you can write
+
+          static const int table[] = {
+             __builtin_constant_p (EXPRESSION) ? (EXPRESSION) : -1,
+             /* ... */
+          };
+
+     This is an acceptable initializer even if EXPRESSION is not a
+     constant expression, including the case where
+     `__builtin_constant_p' returns 1 because EXPRESSION can be folded
+     to a constant but EXPRESSION contains operands that would not
+     otherwise be permitted in a static initializer (for example, `0 &&
+     foo ()').  GCC must be more conservative about evaluating the
+     built-in in this case, because it has no opportunity to perform
+     optimization.
+
+     Previous versions of GCC did not accept this built-in in data
+     initializers.  The earliest version where it is completely safe is
+     3.0.1.
+
+ -- Built-in Function: long __builtin_expect (long EXP, long C)
+     You may use `__builtin_expect' to provide the compiler with branch
+     prediction information.  In general, you should prefer to use
+     actual profile feedback for this (`-fprofile-arcs'), as
+     programmers are notoriously bad at predicting how their programs
+     actually perform.  However, there are applications in which this
+     data is hard to collect.
+
+     The return value is the value of EXP, which should be an integral
+     expression.  The semantics of the built-in are that it is expected
+     that EXP == C.  For example:
+
+          if (__builtin_expect (x, 0))
+            foo ();
+
+     would indicate that we do not expect to call `foo', since we
+     expect `x' to be zero.  Since you are limited to integral
+     expressions for EXP, you should use constructions such as
+
+          if (__builtin_expect (ptr != NULL, 1))
+            error ();
+
+     when testing pointer or floating-point values.
+
+ -- Built-in Function: void __builtin_trap (void)
+     This function causes the program to exit abnormally.  GCC
+     implements this function by using a target-dependent mechanism
+     (such as intentionally executing an illegal instruction) or by
+     calling `abort'.  The mechanism used may vary from release to
+     release so you should not rely on any particular implementation.
+
+ -- Built-in Function: void __builtin_unreachable (void)
+     If control flow reaches the point of the `__builtin_unreachable',
+     the program is undefined.  It is useful in situations where the
+     compiler cannot deduce the unreachability of the code.
+
+     One such case is immediately following an `asm' statement that
+     will either never terminate, or one that transfers control
+     elsewhere and never returns.  In this example, without the
+     `__builtin_unreachable', GCC would issue a warning that control
+     reaches the end of a non-void function.  It would also generate
+     code to return after the `asm'.
+
+          int f (int c, int v)
+          {
+            if (c)
+              {
+                return v;
+              }
+            else
+              {
+                asm("jmp error_handler");
+                __builtin_unreachable ();
+              }
+          }
+
+     Because the `asm' statement unconditionally transfers control out
+     of the function, control will never reach the end of the function
+     body.  The `__builtin_unreachable' is in fact unreachable and
+     communicates this fact to the compiler.
+
+     Another use for `__builtin_unreachable' is following a call a
+     function that never returns but that is not declared
+     `__attribute__((noreturn))', as in this example:
+
+          void function_that_never_returns (void);
+
+          int g (int c)
+          {
+            if (c)
+              {
+                return 1;
+              }
+            else
+              {
+                function_that_never_returns ();
+                __builtin_unreachable ();
+              }
+          }
+
+
+ -- Built-in Function: void __builtin___clear_cache (char *BEGIN, char
+          *END)
+     This function is used to flush the processor's instruction cache
+     for the region of memory between BEGIN inclusive and END
+     exclusive.  Some targets require that the instruction cache be
+     flushed, after modifying memory containing code, in order to obtain
+     deterministic behavior.
+
+     If the target does not require instruction cache flushes,
+     `__builtin___clear_cache' has no effect.  Otherwise either
+     instructions are emitted in-line to clear the instruction cache or
+     a call to the `__clear_cache' function in libgcc is made.
+
+ -- Built-in Function: void __builtin_prefetch (const void *ADDR, ...)
+     This function is used to minimize cache-miss latency by moving
+     data into a cache before it is accessed.  You can insert calls to
+     `__builtin_prefetch' into code for which you know addresses of
+     data in memory that is likely to be accessed soon.  If the target
+     supports them, data prefetch instructions will be generated.  If
+     the prefetch is done early enough before the access then the data
+     will be in the cache by the time it is accessed.
+
+     The value of ADDR is the address of the memory to prefetch.  There
+     are two optional arguments, RW and LOCALITY.  The value of RW is a
+     compile-time constant one or zero; one means that the prefetch is
+     preparing for a write to the memory address and zero, the default,
+     means that the prefetch is preparing for a read.  The value
+     LOCALITY must be a compile-time constant integer between zero and
+     three.  A value of zero means that the data has no temporal
+     locality, so it need not be left in the cache after the access.  A
+     value of three means that the data has a high degree of temporal
+     locality and should be left in all levels of cache possible.
+     Values of one and two mean, respectively, a low or moderate degree
+     of temporal locality.  The default is three.
+
+          for (i = 0; i < n; i++)
+            {
+              a[i] = a[i] + b[i];
+              __builtin_prefetch (&a[i+j], 1, 1);
+              __builtin_prefetch (&b[i+j], 0, 1);
+              /* ... */
+            }
+
+     Data prefetch does not generate faults if ADDR is invalid, but the
+     address expression itself must be valid.  For example, a prefetch
+     of `p->next' will not fault if `p->next' is not a valid address,
+     but evaluation will fault if `p' is not a valid address.
+
+     If the target does not support data prefetch, the address
+     expression is evaluated if it includes side effects but no other
+     code is generated and GCC does not issue a warning.
+
+ -- Built-in Function: double __builtin_huge_val (void)
+     Returns a positive infinity, if supported by the floating-point
+     format, else `DBL_MAX'.  This function is suitable for
+     implementing the ISO C macro `HUGE_VAL'.
+
+ -- Built-in Function: float __builtin_huge_valf (void)
+     Similar to `__builtin_huge_val', except the return type is `float'.
+
+ -- Built-in Function: long double __builtin_huge_vall (void)
+     Similar to `__builtin_huge_val', except the return type is `long
+     double'.
+
+ -- Built-in Function: int __builtin_fpclassify (int, int, int, int,
+          int, ...)
+     This built-in implements the C99 fpclassify functionality.  The
+     first five int arguments should be the target library's notion of
+     the possible FP classes and are used for return values.  They must
+     be constant values and they must appear in this order: `FP_NAN',
+     `FP_INFINITE', `FP_NORMAL', `FP_SUBNORMAL' and `FP_ZERO'.  The
+     ellipsis is for exactly one floating point value to classify.  GCC
+     treats the last argument as type-generic, which means it does not
+     do default promotion from float to double.
+
+ -- Built-in Function: double __builtin_inf (void)
+     Similar to `__builtin_huge_val', except a warning is generated if
+     the target floating-point format does not support infinities.
+
+ -- Built-in Function: _Decimal32 __builtin_infd32 (void)
+     Similar to `__builtin_inf', except the return type is `_Decimal32'.
+
+ -- Built-in Function: _Decimal64 __builtin_infd64 (void)
+     Similar to `__builtin_inf', except the return type is `_Decimal64'.
+
+ -- Built-in Function: _Decimal128 __builtin_infd128 (void)
+     Similar to `__builtin_inf', except the return type is
+     `_Decimal128'.
+
+ -- Built-in Function: float __builtin_inff (void)
+     Similar to `__builtin_inf', except the return type is `float'.
+     This function is suitable for implementing the ISO C99 macro
+     `INFINITY'.
+
+ -- Built-in Function: long double __builtin_infl (void)
+     Similar to `__builtin_inf', except the return type is `long
+     double'.
+
+ -- Built-in Function: int __builtin_isinf_sign (...)
+     Similar to `isinf', except the return value will be negative for
+     an argument of `-Inf'.  Note while the parameter list is an
+     ellipsis, this function only accepts exactly one floating point
+     argument.  GCC treats this parameter as type-generic, which means
+     it does not do default promotion from float to double.
+
+ -- Built-in Function: double __builtin_nan (const char *str)
+     This is an implementation of the ISO C99 function `nan'.
+
+     Since ISO C99 defines this function in terms of `strtod', which we
+     do not implement, a description of the parsing is in order.  The
+     string is parsed as by `strtol'; that is, the base is recognized by
+     leading `0' or `0x' prefixes.  The number parsed is placed in the
+     significand such that the least significant bit of the number is
+     at the least significant bit of the significand.  The number is
+     truncated to fit the significand field provided.  The significand
+     is forced to be a quiet NaN.
+
+     This function, if given a string literal all of which would have
+     been consumed by strtol, is evaluated early enough that it is
+     considered a compile-time constant.
+
+ -- Built-in Function: _Decimal32 __builtin_nand32 (const char *str)
+     Similar to `__builtin_nan', except the return type is `_Decimal32'.
+
+ -- Built-in Function: _Decimal64 __builtin_nand64 (const char *str)
+     Similar to `__builtin_nan', except the return type is `_Decimal64'.
+
+ -- Built-in Function: _Decimal128 __builtin_nand128 (const char *str)
+     Similar to `__builtin_nan', except the return type is
+     `_Decimal128'.
+
+ -- Built-in Function: float __builtin_nanf (const char *str)
+     Similar to `__builtin_nan', except the return type is `float'.
+
+ -- Built-in Function: long double __builtin_nanl (const char *str)
+     Similar to `__builtin_nan', except the return type is `long
+     double'.
+
+ -- Built-in Function: double __builtin_nans (const char *str)
+     Similar to `__builtin_nan', except the significand is forced to be
+     a signaling NaN.  The `nans' function is proposed by WG14 N965.
+
+ -- Built-in Function: float __builtin_nansf (const char *str)
+     Similar to `__builtin_nans', except the return type is `float'.
+
+ -- Built-in Function: long double __builtin_nansl (const char *str)
+     Similar to `__builtin_nans', except the return type is `long
+     double'.
+
+ -- Built-in Function: int __builtin_ffs (unsigned int x)
+     Returns one plus the index of the least significant 1-bit of X, or
+     if X is zero, returns zero.
+
+ -- Built-in Function: int __builtin_clz (unsigned int x)
+     Returns the number of leading 0-bits in X, starting at the most
+     significant bit position.  If X is 0, the result is undefined.
+
+ -- Built-in Function: int __builtin_ctz (unsigned int x)
+     Returns the number of trailing 0-bits in X, starting at the least
+     significant bit position.  If X is 0, the result is undefined.
+
+ -- Built-in Function: int __builtin_popcount (unsigned int x)
+     Returns the number of 1-bits in X.
+
+ -- Built-in Function: int __builtin_parity (unsigned int x)
+     Returns the parity of X, i.e. the number of 1-bits in X modulo 2.
+
+ -- Built-in Function: int __builtin_ffsl (unsigned long)
+     Similar to `__builtin_ffs', except the argument type is `unsigned
+     long'.
+
+ -- Built-in Function: int __builtin_clzl (unsigned long)
+     Similar to `__builtin_clz', except the argument type is `unsigned
+     long'.
+
+ -- Built-in Function: int __builtin_ctzl (unsigned long)
+     Similar to `__builtin_ctz', except the argument type is `unsigned
+     long'.
+
+ -- Built-in Function: int __builtin_popcountl (unsigned long)
+     Similar to `__builtin_popcount', except the argument type is
+     `unsigned long'.
+
+ -- Built-in Function: int __builtin_parityl (unsigned long)
+     Similar to `__builtin_parity', except the argument type is
+     `unsigned long'.
+
+ -- Built-in Function: int __builtin_ffsll (unsigned long long)
+     Similar to `__builtin_ffs', except the argument type is `unsigned
+     long long'.
+
+ -- Built-in Function: int __builtin_clzll (unsigned long long)
+     Similar to `__builtin_clz', except the argument type is `unsigned
+     long long'.
+
+ -- Built-in Function: int __builtin_ctzll (unsigned long long)
+     Similar to `__builtin_ctz', except the argument type is `unsigned
+     long long'.
+
+ -- Built-in Function: int __builtin_popcountll (unsigned long long)
+     Similar to `__builtin_popcount', except the argument type is
+     `unsigned long long'.
+
+ -- Built-in Function: int __builtin_parityll (unsigned long long)
+     Similar to `__builtin_parity', except the argument type is
+     `unsigned long long'.
+
+ -- Built-in Function: double __builtin_powi (double, int)
+     Returns the first argument raised to the power of the second.
+     Unlike the `pow' function no guarantees about precision and
+     rounding are made.
+
+ -- Built-in Function: float __builtin_powif (float, int)
+     Similar to `__builtin_powi', except the argument and return types
+     are `float'.
+
+ -- Built-in Function: long double __builtin_powil (long double, int)
+     Similar to `__builtin_powi', except the argument and return types
+     are `long double'.
+
+ -- Built-in Function: int32_t __builtin_bswap32 (int32_t x)
+     Returns X with the order of the bytes reversed; for example,
+     `0xaabbccdd' becomes `0xddccbbaa'.  Byte here always means exactly
+     8 bits.
+
+ -- Built-in Function: int64_t __builtin_bswap64 (int64_t x)
+     Similar to `__builtin_bswap32', except the argument and return
+     types are 64-bit.
+
+
+File: gcc.info,  Node: Target Builtins,  Next: Target Format Checks,  Prev: Other Builtins,  Up: C Extensions
+
+6.54 Built-in Functions Specific to Particular Target Machines
+==============================================================
+
+On some target machines, GCC supports many built-in functions specific
+to those machines.  Generally these generate calls to specific machine
+instructions, but allow the compiler to schedule those calls.
+
+* Menu:
+
+* Alpha Built-in Functions::
+* ARM iWMMXt Built-in Functions::
+* ARM NEON Intrinsics::
+* Blackfin Built-in Functions::
+* FR-V Built-in Functions::
+* X86 Built-in Functions::
+* MIPS DSP Built-in Functions::
+* MIPS Paired-Single Support::
+* MIPS Loongson Built-in Functions::
+* Other MIPS Built-in Functions::
+* picoChip Built-in Functions::
+* PowerPC AltiVec/VSX Built-in Functions::
+* RX Built-in Functions::
+* SPARC VIS Built-in Functions::
+* SPU Built-in Functions::
+
+
+File: gcc.info,  Node: Alpha Built-in Functions,  Next: ARM iWMMXt Built-in Functions,  Up: Target Builtins
+
+6.54.1 Alpha Built-in Functions
+-------------------------------
+
+These built-in functions are available for the Alpha family of
+processors, depending on the command-line switches used.
+
+ The following built-in functions are always available.  They all
+generate the machine instruction that is part of the name.
+
+     long __builtin_alpha_implver (void)
+     long __builtin_alpha_rpcc (void)
+     long __builtin_alpha_amask (long)
+     long __builtin_alpha_cmpbge (long, long)
+     long __builtin_alpha_extbl (long, long)
+     long __builtin_alpha_extwl (long, long)
+     long __builtin_alpha_extll (long, long)
+     long __builtin_alpha_extql (long, long)
+     long __builtin_alpha_extwh (long, long)
+     long __builtin_alpha_extlh (long, long)
+     long __builtin_alpha_extqh (long, long)
+     long __builtin_alpha_insbl (long, long)
+     long __builtin_alpha_inswl (long, long)
+     long __builtin_alpha_insll (long, long)
+     long __builtin_alpha_insql (long, long)
+     long __builtin_alpha_inswh (long, long)
+     long __builtin_alpha_inslh (long, long)
+     long __builtin_alpha_insqh (long, long)
+     long __builtin_alpha_mskbl (long, long)
+     long __builtin_alpha_mskwl (long, long)
+     long __builtin_alpha_mskll (long, long)
+     long __builtin_alpha_mskql (long, long)
+     long __builtin_alpha_mskwh (long, long)
+     long __builtin_alpha_msklh (long, long)
+     long __builtin_alpha_mskqh (long, long)
+     long __builtin_alpha_umulh (long, long)
+     long __builtin_alpha_zap (long, long)
+     long __builtin_alpha_zapnot (long, long)
+
+ The following built-in functions are always with `-mmax' or
+`-mcpu=CPU' where CPU is `pca56' or later.  They all generate the
+machine instruction that is part of the name.
+
+     long __builtin_alpha_pklb (long)
+     long __builtin_alpha_pkwb (long)
+     long __builtin_alpha_unpkbl (long)
+     long __builtin_alpha_unpkbw (long)
+     long __builtin_alpha_minub8 (long, long)
+     long __builtin_alpha_minsb8 (long, long)
+     long __builtin_alpha_minuw4 (long, long)
+     long __builtin_alpha_minsw4 (long, long)
+     long __builtin_alpha_maxub8 (long, long)
+     long __builtin_alpha_maxsb8 (long, long)
+     long __builtin_alpha_maxuw4 (long, long)
+     long __builtin_alpha_maxsw4 (long, long)
+     long __builtin_alpha_perr (long, long)
+
+ The following built-in functions are always with `-mcix' or
+`-mcpu=CPU' where CPU is `ev67' or later.  They all generate the
+machine instruction that is part of the name.
+
+     long __builtin_alpha_cttz (long)
+     long __builtin_alpha_ctlz (long)
+     long __builtin_alpha_ctpop (long)
+
+ The following builtins are available on systems that use the OSF/1
+PALcode.  Normally they invoke the `rduniq' and `wruniq' PAL calls, but
+when invoked with `-mtls-kernel', they invoke `rdval' and `wrval'.
+
+     void *__builtin_thread_pointer (void)
+     void __builtin_set_thread_pointer (void *)
+
+
+File: gcc.info,  Node: ARM iWMMXt Built-in Functions,  Next: ARM NEON Intrinsics,  Prev: Alpha Built-in Functions,  Up: Target Builtins
+
+6.54.2 ARM iWMMXt Built-in Functions
+------------------------------------
+
+These built-in functions are available for the ARM family of processors
+when the `-mcpu=iwmmxt' switch is used:
+
+     typedef int v2si __attribute__ ((vector_size (8)));
+     typedef short v4hi __attribute__ ((vector_size (8)));
+     typedef char v8qi __attribute__ ((vector_size (8)));
+
+     int __builtin_arm_getwcx (int)
+     void __builtin_arm_setwcx (int, int)
+     int __builtin_arm_textrmsb (v8qi, int)
+     int __builtin_arm_textrmsh (v4hi, int)
+     int __builtin_arm_textrmsw (v2si, int)
+     int __builtin_arm_textrmub (v8qi, int)
+     int __builtin_arm_textrmuh (v4hi, int)
+     int __builtin_arm_textrmuw (v2si, int)
+     v8qi __builtin_arm_tinsrb (v8qi, int)
+     v4hi __builtin_arm_tinsrh (v4hi, int)
+     v2si __builtin_arm_tinsrw (v2si, int)
+     long long __builtin_arm_tmia (long long, int, int)
+     long long __builtin_arm_tmiabb (long long, int, int)
+     long long __builtin_arm_tmiabt (long long, int, int)
+     long long __builtin_arm_tmiaph (long long, int, int)
+     long long __builtin_arm_tmiatb (long long, int, int)
+     long long __builtin_arm_tmiatt (long long, int, int)
+     int __builtin_arm_tmovmskb (v8qi)
+     int __builtin_arm_tmovmskh (v4hi)
+     int __builtin_arm_tmovmskw (v2si)
+     long long __builtin_arm_waccb (v8qi)
+     long long __builtin_arm_wacch (v4hi)
+     long long __builtin_arm_waccw (v2si)
+     v8qi __builtin_arm_waddb (v8qi, v8qi)
+     v8qi __builtin_arm_waddbss (v8qi, v8qi)
+     v8qi __builtin_arm_waddbus (v8qi, v8qi)
+     v4hi __builtin_arm_waddh (v4hi, v4hi)
+     v4hi __builtin_arm_waddhss (v4hi, v4hi)
+     v4hi __builtin_arm_waddhus (v4hi, v4hi)
+     v2si __builtin_arm_waddw (v2si, v2si)
+     v2si __builtin_arm_waddwss (v2si, v2si)
+     v2si __builtin_arm_waddwus (v2si, v2si)
+     v8qi __builtin_arm_walign (v8qi, v8qi, int)
+     long long __builtin_arm_wand(long long, long long)
+     long long __builtin_arm_wandn (long long, long long)
+     v8qi __builtin_arm_wavg2b (v8qi, v8qi)
+     v8qi __builtin_arm_wavg2br (v8qi, v8qi)
+     v4hi __builtin_arm_wavg2h (v4hi, v4hi)
+     v4hi __builtin_arm_wavg2hr (v4hi, v4hi)
+     v8qi __builtin_arm_wcmpeqb (v8qi, v8qi)
+     v4hi __builtin_arm_wcmpeqh (v4hi, v4hi)
+     v2si __builtin_arm_wcmpeqw (v2si, v2si)
+     v8qi __builtin_arm_wcmpgtsb (v8qi, v8qi)
+     v4hi __builtin_arm_wcmpgtsh (v4hi, v4hi)
+     v2si __builtin_arm_wcmpgtsw (v2si, v2si)
+     v8qi __builtin_arm_wcmpgtub (v8qi, v8qi)
+     v4hi __builtin_arm_wcmpgtuh (v4hi, v4hi)
+     v2si __builtin_arm_wcmpgtuw (v2si, v2si)
+     long long __builtin_arm_wmacs (long long, v4hi, v4hi)
+     long long __builtin_arm_wmacsz (v4hi, v4hi)
+     long long __builtin_arm_wmacu (long long, v4hi, v4hi)
+     long long __builtin_arm_wmacuz (v4hi, v4hi)
+     v4hi __builtin_arm_wmadds (v4hi, v4hi)
+     v4hi __builtin_arm_wmaddu (v4hi, v4hi)
+     v8qi __builtin_arm_wmaxsb (v8qi, v8qi)
+     v4hi __builtin_arm_wmaxsh (v4hi, v4hi)
+     v2si __builtin_arm_wmaxsw (v2si, v2si)
+     v8qi __builtin_arm_wmaxub (v8qi, v8qi)
+     v4hi __builtin_arm_wmaxuh (v4hi, v4hi)
+     v2si __builtin_arm_wmaxuw (v2si, v2si)
+     v8qi __builtin_arm_wminsb (v8qi, v8qi)
+     v4hi __builtin_arm_wminsh (v4hi, v4hi)
+     v2si __builtin_arm_wminsw (v2si, v2si)
+     v8qi __builtin_arm_wminub (v8qi, v8qi)
+     v4hi __builtin_arm_wminuh (v4hi, v4hi)
+     v2si __builtin_arm_wminuw (v2si, v2si)
+     v4hi __builtin_arm_wmulsm (v4hi, v4hi)
+     v4hi __builtin_arm_wmulul (v4hi, v4hi)
+     v4hi __builtin_arm_wmulum (v4hi, v4hi)
+     long long __builtin_arm_wor (long long, long long)
+     v2si __builtin_arm_wpackdss (long long, long long)
+     v2si __builtin_arm_wpackdus (long long, long long)
+     v8qi __builtin_arm_wpackhss (v4hi, v4hi)
+     v8qi __builtin_arm_wpackhus (v4hi, v4hi)
+     v4hi __builtin_arm_wpackwss (v2si, v2si)
+     v4hi __builtin_arm_wpackwus (v2si, v2si)
+     long long __builtin_arm_wrord (long long, long long)
+     long long __builtin_arm_wrordi (long long, int)
+     v4hi __builtin_arm_wrorh (v4hi, long long)
+     v4hi __builtin_arm_wrorhi (v4hi, int)
+     v2si __builtin_arm_wrorw (v2si, long long)
+     v2si __builtin_arm_wrorwi (v2si, int)
+     v2si __builtin_arm_wsadb (v8qi, v8qi)
+     v2si __builtin_arm_wsadbz (v8qi, v8qi)
+     v2si __builtin_arm_wsadh (v4hi, v4hi)
+     v2si __builtin_arm_wsadhz (v4hi, v4hi)
+     v4hi __builtin_arm_wshufh (v4hi, int)
+     long long __builtin_arm_wslld (long long, long long)
+     long long __builtin_arm_wslldi (long long, int)
+     v4hi __builtin_arm_wsllh (v4hi, long long)
+     v4hi __builtin_arm_wsllhi (v4hi, int)
+     v2si __builtin_arm_wsllw (v2si, long long)
+     v2si __builtin_arm_wsllwi (v2si, int)
+     long long __builtin_arm_wsrad (long long, long long)
+     long long __builtin_arm_wsradi (long long, int)
+     v4hi __builtin_arm_wsrah (v4hi, long long)
+     v4hi __builtin_arm_wsrahi (v4hi, int)
+     v2si __builtin_arm_wsraw (v2si, long long)
+     v2si __builtin_arm_wsrawi (v2si, int)
+     long long __builtin_arm_wsrld (long long, long long)
+     long long __builtin_arm_wsrldi (long long, int)
+     v4hi __builtin_arm_wsrlh (v4hi, long long)
+     v4hi __builtin_arm_wsrlhi (v4hi, int)
+     v2si __builtin_arm_wsrlw (v2si, long long)
+     v2si __builtin_arm_wsrlwi (v2si, int)
+     v8qi __builtin_arm_wsubb (v8qi, v8qi)
+     v8qi __builtin_arm_wsubbss (v8qi, v8qi)
+     v8qi __builtin_arm_wsubbus (v8qi, v8qi)
+     v4hi __builtin_arm_wsubh (v4hi, v4hi)
+     v4hi __builtin_arm_wsubhss (v4hi, v4hi)
+     v4hi __builtin_arm_wsubhus (v4hi, v4hi)
+     v2si __builtin_arm_wsubw (v2si, v2si)
+     v2si __builtin_arm_wsubwss (v2si, v2si)
+     v2si __builtin_arm_wsubwus (v2si, v2si)
+     v4hi __builtin_arm_wunpckehsb (v8qi)
+     v2si __builtin_arm_wunpckehsh (v4hi)
+     long long __builtin_arm_wunpckehsw (v2si)
+     v4hi __builtin_arm_wunpckehub (v8qi)
+     v2si __builtin_arm_wunpckehuh (v4hi)
+     long long __builtin_arm_wunpckehuw (v2si)
+     v4hi __builtin_arm_wunpckelsb (v8qi)
+     v2si __builtin_arm_wunpckelsh (v4hi)
+     long long __builtin_arm_wunpckelsw (v2si)
+     v4hi __builtin_arm_wunpckelub (v8qi)
+     v2si __builtin_arm_wunpckeluh (v4hi)
+     long long __builtin_arm_wunpckeluw (v2si)
+     v8qi __builtin_arm_wunpckihb (v8qi, v8qi)
+     v4hi __builtin_arm_wunpckihh (v4hi, v4hi)
+     v2si __builtin_arm_wunpckihw (v2si, v2si)
+     v8qi __builtin_arm_wunpckilb (v8qi, v8qi)
+     v4hi __builtin_arm_wunpckilh (v4hi, v4hi)
+     v2si __builtin_arm_wunpckilw (v2si, v2si)
+     long long __builtin_arm_wxor (long long, long long)
+     long long __builtin_arm_wzero ()
+
+
+File: gcc.info,  Node: ARM NEON Intrinsics,  Next: Blackfin Built-in Functions,  Prev: ARM iWMMXt Built-in Functions,  Up: Target Builtins
+
+6.54.3 ARM NEON Intrinsics
+--------------------------
+
+These built-in intrinsics for the ARM Advanced SIMD extension are
+available when the `-mfpu=neon' switch is used:
+
+6.54.3.1 Addition
+.................
+
+   * uint32x2_t vadd_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vadd.i32 D0, D0, D0'
+
+   * uint16x4_t vadd_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vadd.i16 D0, D0, D0'
+
+   * uint8x8_t vadd_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vadd.i8 D0, D0, D0'
+
+   * int32x2_t vadd_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vadd.i32 D0, D0, D0'
+
+   * int16x4_t vadd_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vadd.i16 D0, D0, D0'
+
+   * int8x8_t vadd_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vadd.i8 D0, D0, D0'
+
+   * float32x2_t vadd_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vadd.f32 D0, D0, D0'
+
+   * uint64x1_t vadd_u64 (uint64x1_t, uint64x1_t)
+
+   * int64x1_t vadd_s64 (int64x1_t, int64x1_t)
+
+   * uint32x4_t vaddq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vadd.i32 Q0, Q0, Q0'
+
+   * uint16x8_t vaddq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vadd.i16 Q0, Q0, Q0'
+
+   * uint8x16_t vaddq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vadd.i8 Q0, Q0, Q0'
+
+   * int32x4_t vaddq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vadd.i32 Q0, Q0, Q0'
+
+   * int16x8_t vaddq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vadd.i16 Q0, Q0, Q0'
+
+   * int8x16_t vaddq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vadd.i8 Q0, Q0, Q0'
+
+   * uint64x2_t vaddq_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vadd.i64 Q0, Q0, Q0'
+
+   * int64x2_t vaddq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vadd.i64 Q0, Q0, Q0'
+
+   * float32x4_t vaddq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vadd.f32 Q0, Q0, Q0'
+
+   * uint64x2_t vaddl_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vaddl.u32 Q0, D0, D0'
+
+   * uint32x4_t vaddl_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vaddl.u16 Q0, D0, D0'
+
+   * uint16x8_t vaddl_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vaddl.u8 Q0, D0, D0'
+
+   * int64x2_t vaddl_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vaddl.s32 Q0, D0, D0'
+
+   * int32x4_t vaddl_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vaddl.s16 Q0, D0, D0'
+
+   * int16x8_t vaddl_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vaddl.s8 Q0, D0, D0'
+
+   * uint64x2_t vaddw_u32 (uint64x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vaddw.u32 Q0, Q0, D0'
+
+   * uint32x4_t vaddw_u16 (uint32x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vaddw.u16 Q0, Q0, D0'
+
+   * uint16x8_t vaddw_u8 (uint16x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vaddw.u8 Q0, Q0, D0'
+
+   * int64x2_t vaddw_s32 (int64x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vaddw.s32 Q0, Q0, D0'
+
+   * int32x4_t vaddw_s16 (int32x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vaddw.s16 Q0, Q0, D0'
+
+   * int16x8_t vaddw_s8 (int16x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vaddw.s8 Q0, Q0, D0'
+
+   * uint32x2_t vhadd_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vhadd.u32 D0, D0, D0'
+
+   * uint16x4_t vhadd_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vhadd.u16 D0, D0, D0'
+
+   * uint8x8_t vhadd_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vhadd.u8 D0, D0, D0'
+
+   * int32x2_t vhadd_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vhadd.s32 D0, D0, D0'
+
+   * int16x4_t vhadd_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vhadd.s16 D0, D0, D0'
+
+   * int8x8_t vhadd_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vhadd.s8 D0, D0, D0'
+
+   * uint32x4_t vhaddq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vhadd.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vhaddq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vhadd.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vhaddq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vhadd.u8 Q0, Q0, Q0'
+
+   * int32x4_t vhaddq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vhadd.s32 Q0, Q0, Q0'
+
+   * int16x8_t vhaddq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vhadd.s16 Q0, Q0, Q0'
+
+   * int8x16_t vhaddq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vhadd.s8 Q0, Q0, Q0'
+
+   * uint32x2_t vrhadd_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vrhadd.u32 D0, D0, D0'
+
+   * uint16x4_t vrhadd_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vrhadd.u16 D0, D0, D0'
+
+   * uint8x8_t vrhadd_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vrhadd.u8 D0, D0, D0'
+
+   * int32x2_t vrhadd_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vrhadd.s32 D0, D0, D0'
+
+   * int16x4_t vrhadd_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vrhadd.s16 D0, D0, D0'
+
+   * int8x8_t vrhadd_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vrhadd.s8 D0, D0, D0'
+
+   * uint32x4_t vrhaddq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vrhadd.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vrhaddq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vrhadd.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vrhaddq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vrhadd.u8 Q0, Q0, Q0'
+
+   * int32x4_t vrhaddq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vrhadd.s32 Q0, Q0, Q0'
+
+   * int16x8_t vrhaddq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vrhadd.s16 Q0, Q0, Q0'
+
+   * int8x16_t vrhaddq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vrhadd.s8 Q0, Q0, Q0'
+
+   * uint32x2_t vqadd_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vqadd.u32 D0, D0, D0'
+
+   * uint16x4_t vqadd_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vqadd.u16 D0, D0, D0'
+
+   * uint8x8_t vqadd_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vqadd.u8 D0, D0, D0'
+
+   * int32x2_t vqadd_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vqadd.s32 D0, D0, D0'
+
+   * int16x4_t vqadd_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vqadd.s16 D0, D0, D0'
+
+   * int8x8_t vqadd_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vqadd.s8 D0, D0, D0'
+
+   * uint64x1_t vqadd_u64 (uint64x1_t, uint64x1_t)
+     _Form of expected instruction(s):_ `vqadd.u64 D0, D0, D0'
+
+   * int64x1_t vqadd_s64 (int64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vqadd.s64 D0, D0, D0'
+
+   * uint32x4_t vqaddq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vqadd.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vqaddq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vqadd.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vqaddq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vqadd.u8 Q0, Q0, Q0'
+
+   * int32x4_t vqaddq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vqadd.s32 Q0, Q0, Q0'
+
+   * int16x8_t vqaddq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vqadd.s16 Q0, Q0, Q0'
+
+   * int8x16_t vqaddq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vqadd.s8 Q0, Q0, Q0'
+
+   * uint64x2_t vqaddq_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vqadd.u64 Q0, Q0, Q0'
+
+   * int64x2_t vqaddq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vqadd.s64 Q0, Q0, Q0'
+
+   * uint32x2_t vaddhn_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vaddhn.i64 D0, Q0, Q0'
+
+   * uint16x4_t vaddhn_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vaddhn.i32 D0, Q0, Q0'
+
+   * uint8x8_t vaddhn_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vaddhn.i16 D0, Q0, Q0'
+
+   * int32x2_t vaddhn_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vaddhn.i64 D0, Q0, Q0'
+
+   * int16x4_t vaddhn_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vaddhn.i32 D0, Q0, Q0'
+
+   * int8x8_t vaddhn_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vaddhn.i16 D0, Q0, Q0'
+
+   * uint32x2_t vraddhn_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vraddhn.i64 D0, Q0, Q0'
+
+   * uint16x4_t vraddhn_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vraddhn.i32 D0, Q0, Q0'
+
+   * uint8x8_t vraddhn_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vraddhn.i16 D0, Q0, Q0'
+
+   * int32x2_t vraddhn_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vraddhn.i64 D0, Q0, Q0'
+
+   * int16x4_t vraddhn_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vraddhn.i32 D0, Q0, Q0'
+
+   * int8x8_t vraddhn_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vraddhn.i16 D0, Q0, Q0'
+
+6.54.3.2 Multiplication
+.......................
+
+   * uint32x2_t vmul_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vmul.i32 D0, D0, D0'
+
+   * uint16x4_t vmul_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vmul.i16 D0, D0, D0'
+
+   * uint8x8_t vmul_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vmul.i8 D0, D0, D0'
+
+   * int32x2_t vmul_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vmul.i32 D0, D0, D0'
+
+   * int16x4_t vmul_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vmul.i16 D0, D0, D0'
+
+   * int8x8_t vmul_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vmul.i8 D0, D0, D0'
+
+   * float32x2_t vmul_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vmul.f32 D0, D0, D0'
+
+   * poly8x8_t vmul_p8 (poly8x8_t, poly8x8_t)
+     _Form of expected instruction(s):_ `vmul.p8 D0, D0, D0'
+
+   * uint32x4_t vmulq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vmul.i32 Q0, Q0, Q0'
+
+   * uint16x8_t vmulq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vmul.i16 Q0, Q0, Q0'
+
+   * uint8x16_t vmulq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vmul.i8 Q0, Q0, Q0'
+
+   * int32x4_t vmulq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vmul.i32 Q0, Q0, Q0'
+
+   * int16x8_t vmulq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vmul.i16 Q0, Q0, Q0'
+
+   * int8x16_t vmulq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vmul.i8 Q0, Q0, Q0'
+
+   * float32x4_t vmulq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vmul.f32 Q0, Q0, Q0'
+
+   * poly8x16_t vmulq_p8 (poly8x16_t, poly8x16_t)
+     _Form of expected instruction(s):_ `vmul.p8 Q0, Q0, Q0'
+
+   * int32x2_t vqdmulh_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vqdmulh.s32 D0, D0, D0'
+
+   * int16x4_t vqdmulh_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vqdmulh.s16 D0, D0, D0'
+
+   * int32x4_t vqdmulhq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vqdmulh.s32 Q0, Q0, Q0'
+
+   * int16x8_t vqdmulhq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vqdmulh.s16 Q0, Q0, Q0'
+
+   * int32x2_t vqrdmulh_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vqrdmulh.s32 D0, D0, D0'
+
+   * int16x4_t vqrdmulh_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vqrdmulh.s16 D0, D0, D0'
+
+   * int32x4_t vqrdmulhq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vqrdmulh.s32 Q0, Q0, Q0'
+
+   * int16x8_t vqrdmulhq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vqrdmulh.s16 Q0, Q0, Q0'
+
+   * uint64x2_t vmull_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vmull.u32 Q0, D0, D0'
+
+   * uint32x4_t vmull_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vmull.u16 Q0, D0, D0'
+
+   * uint16x8_t vmull_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vmull.u8 Q0, D0, D0'
+
+   * int64x2_t vmull_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vmull.s32 Q0, D0, D0'
+
+   * int32x4_t vmull_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vmull.s16 Q0, D0, D0'
+
+   * int16x8_t vmull_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vmull.s8 Q0, D0, D0'
+
+   * poly16x8_t vmull_p8 (poly8x8_t, poly8x8_t)
+     _Form of expected instruction(s):_ `vmull.p8 Q0, D0, D0'
+
+   * int64x2_t vqdmull_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vqdmull.s32 Q0, D0, D0'
+
+   * int32x4_t vqdmull_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vqdmull.s16 Q0, D0, D0'
+
+6.54.3.3 Multiply-accumulate
+............................
+
+   * uint32x2_t vmla_u32 (uint32x2_t, uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vmla.i32 D0, D0, D0'
+
+   * uint16x4_t vmla_u16 (uint16x4_t, uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vmla.i16 D0, D0, D0'
+
+   * uint8x8_t vmla_u8 (uint8x8_t, uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vmla.i8 D0, D0, D0'
+
+   * int32x2_t vmla_s32 (int32x2_t, int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vmla.i32 D0, D0, D0'
+
+   * int16x4_t vmla_s16 (int16x4_t, int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vmla.i16 D0, D0, D0'
+
+   * int8x8_t vmla_s8 (int8x8_t, int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vmla.i8 D0, D0, D0'
+
+   * float32x2_t vmla_f32 (float32x2_t, float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vmla.f32 D0, D0, D0'
+
+   * uint32x4_t vmlaq_u32 (uint32x4_t, uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vmla.i32 Q0, Q0, Q0'
+
+   * uint16x8_t vmlaq_u16 (uint16x8_t, uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vmla.i16 Q0, Q0, Q0'
+
+   * uint8x16_t vmlaq_u8 (uint8x16_t, uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vmla.i8 Q0, Q0, Q0'
+
+   * int32x4_t vmlaq_s32 (int32x4_t, int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vmla.i32 Q0, Q0, Q0'
+
+   * int16x8_t vmlaq_s16 (int16x8_t, int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vmla.i16 Q0, Q0, Q0'
+
+   * int8x16_t vmlaq_s8 (int8x16_t, int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vmla.i8 Q0, Q0, Q0'
+
+   * float32x4_t vmlaq_f32 (float32x4_t, float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vmla.f32 Q0, Q0, Q0'
+
+   * uint64x2_t vmlal_u32 (uint64x2_t, uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vmlal.u32 Q0, D0, D0'
+
+   * uint32x4_t vmlal_u16 (uint32x4_t, uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vmlal.u16 Q0, D0, D0'
+
+   * uint16x8_t vmlal_u8 (uint16x8_t, uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vmlal.u8 Q0, D0, D0'
+
+   * int64x2_t vmlal_s32 (int64x2_t, int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vmlal.s32 Q0, D0, D0'
+
+   * int32x4_t vmlal_s16 (int32x4_t, int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vmlal.s16 Q0, D0, D0'
+
+   * int16x8_t vmlal_s8 (int16x8_t, int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vmlal.s8 Q0, D0, D0'
+
+   * int64x2_t vqdmlal_s32 (int64x2_t, int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vqdmlal.s32 Q0, D0, D0'
+
+   * int32x4_t vqdmlal_s16 (int32x4_t, int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vqdmlal.s16 Q0, D0, D0'
+
+6.54.3.4 Multiply-subtract
+..........................
+
+   * uint32x2_t vmls_u32 (uint32x2_t, uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vmls.i32 D0, D0, D0'
+
+   * uint16x4_t vmls_u16 (uint16x4_t, uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vmls.i16 D0, D0, D0'
+
+   * uint8x8_t vmls_u8 (uint8x8_t, uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vmls.i8 D0, D0, D0'
+
+   * int32x2_t vmls_s32 (int32x2_t, int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vmls.i32 D0, D0, D0'
+
+   * int16x4_t vmls_s16 (int16x4_t, int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vmls.i16 D0, D0, D0'
+
+   * int8x8_t vmls_s8 (int8x8_t, int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vmls.i8 D0, D0, D0'
+
+   * float32x2_t vmls_f32 (float32x2_t, float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vmls.f32 D0, D0, D0'
+
+   * uint32x4_t vmlsq_u32 (uint32x4_t, uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vmls.i32 Q0, Q0, Q0'
+
+   * uint16x8_t vmlsq_u16 (uint16x8_t, uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vmls.i16 Q0, Q0, Q0'
+
+   * uint8x16_t vmlsq_u8 (uint8x16_t, uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vmls.i8 Q0, Q0, Q0'
+
+   * int32x4_t vmlsq_s32 (int32x4_t, int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vmls.i32 Q0, Q0, Q0'
+
+   * int16x8_t vmlsq_s16 (int16x8_t, int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vmls.i16 Q0, Q0, Q0'
+
+   * int8x16_t vmlsq_s8 (int8x16_t, int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vmls.i8 Q0, Q0, Q0'
+
+   * float32x4_t vmlsq_f32 (float32x4_t, float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vmls.f32 Q0, Q0, Q0'
+
+   * uint64x2_t vmlsl_u32 (uint64x2_t, uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vmlsl.u32 Q0, D0, D0'
+
+   * uint32x4_t vmlsl_u16 (uint32x4_t, uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vmlsl.u16 Q0, D0, D0'
+
+   * uint16x8_t vmlsl_u8 (uint16x8_t, uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vmlsl.u8 Q0, D0, D0'
+
+   * int64x2_t vmlsl_s32 (int64x2_t, int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vmlsl.s32 Q0, D0, D0'
+
+   * int32x4_t vmlsl_s16 (int32x4_t, int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vmlsl.s16 Q0, D0, D0'
+
+   * int16x8_t vmlsl_s8 (int16x8_t, int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vmlsl.s8 Q0, D0, D0'
+
+   * int64x2_t vqdmlsl_s32 (int64x2_t, int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vqdmlsl.s32 Q0, D0, D0'
+
+   * int32x4_t vqdmlsl_s16 (int32x4_t, int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vqdmlsl.s16 Q0, D0, D0'
+
+6.54.3.5 Subtraction
+....................
+
+   * uint32x2_t vsub_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vsub.i32 D0, D0, D0'
+
+   * uint16x4_t vsub_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vsub.i16 D0, D0, D0'
+
+   * uint8x8_t vsub_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vsub.i8 D0, D0, D0'
+
+   * int32x2_t vsub_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vsub.i32 D0, D0, D0'
+
+   * int16x4_t vsub_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vsub.i16 D0, D0, D0'
+
+   * int8x8_t vsub_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vsub.i8 D0, D0, D0'
+
+   * float32x2_t vsub_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vsub.f32 D0, D0, D0'
+
+   * uint64x1_t vsub_u64 (uint64x1_t, uint64x1_t)
+
+   * int64x1_t vsub_s64 (int64x1_t, int64x1_t)
+
+   * uint32x4_t vsubq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vsub.i32 Q0, Q0, Q0'
+
+   * uint16x8_t vsubq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vsub.i16 Q0, Q0, Q0'
+
+   * uint8x16_t vsubq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vsub.i8 Q0, Q0, Q0'
+
+   * int32x4_t vsubq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vsub.i32 Q0, Q0, Q0'
+
+   * int16x8_t vsubq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vsub.i16 Q0, Q0, Q0'
+
+   * int8x16_t vsubq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vsub.i8 Q0, Q0, Q0'
+
+   * uint64x2_t vsubq_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vsub.i64 Q0, Q0, Q0'
+
+   * int64x2_t vsubq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vsub.i64 Q0, Q0, Q0'
+
+   * float32x4_t vsubq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vsub.f32 Q0, Q0, Q0'
+
+   * uint64x2_t vsubl_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vsubl.u32 Q0, D0, D0'
+
+   * uint32x4_t vsubl_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vsubl.u16 Q0, D0, D0'
+
+   * uint16x8_t vsubl_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vsubl.u8 Q0, D0, D0'
+
+   * int64x2_t vsubl_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vsubl.s32 Q0, D0, D0'
+
+   * int32x4_t vsubl_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vsubl.s16 Q0, D0, D0'
+
+   * int16x8_t vsubl_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vsubl.s8 Q0, D0, D0'
+
+   * uint64x2_t vsubw_u32 (uint64x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vsubw.u32 Q0, Q0, D0'
+
+   * uint32x4_t vsubw_u16 (uint32x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vsubw.u16 Q0, Q0, D0'
+
+   * uint16x8_t vsubw_u8 (uint16x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vsubw.u8 Q0, Q0, D0'
+
+   * int64x2_t vsubw_s32 (int64x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vsubw.s32 Q0, Q0, D0'
+
+   * int32x4_t vsubw_s16 (int32x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vsubw.s16 Q0, Q0, D0'
+
+   * int16x8_t vsubw_s8 (int16x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vsubw.s8 Q0, Q0, D0'
+
+   * uint32x2_t vhsub_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vhsub.u32 D0, D0, D0'
+
+   * uint16x4_t vhsub_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vhsub.u16 D0, D0, D0'
+
+   * uint8x8_t vhsub_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vhsub.u8 D0, D0, D0'
+
+   * int32x2_t vhsub_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vhsub.s32 D0, D0, D0'
+
+   * int16x4_t vhsub_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vhsub.s16 D0, D0, D0'
+
+   * int8x8_t vhsub_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vhsub.s8 D0, D0, D0'
+
+   * uint32x4_t vhsubq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vhsub.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vhsubq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vhsub.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vhsubq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vhsub.u8 Q0, Q0, Q0'
+
+   * int32x4_t vhsubq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vhsub.s32 Q0, Q0, Q0'
+
+   * int16x8_t vhsubq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vhsub.s16 Q0, Q0, Q0'
+
+   * int8x16_t vhsubq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vhsub.s8 Q0, Q0, Q0'
+
+   * uint32x2_t vqsub_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vqsub.u32 D0, D0, D0'
+
+   * uint16x4_t vqsub_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vqsub.u16 D0, D0, D0'
+
+   * uint8x8_t vqsub_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vqsub.u8 D0, D0, D0'
+
+   * int32x2_t vqsub_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vqsub.s32 D0, D0, D0'
+
+   * int16x4_t vqsub_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vqsub.s16 D0, D0, D0'
+
+   * int8x8_t vqsub_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vqsub.s8 D0, D0, D0'
+
+   * uint64x1_t vqsub_u64 (uint64x1_t, uint64x1_t)
+     _Form of expected instruction(s):_ `vqsub.u64 D0, D0, D0'
+
+   * int64x1_t vqsub_s64 (int64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vqsub.s64 D0, D0, D0'
+
+   * uint32x4_t vqsubq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vqsub.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vqsubq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vqsub.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vqsubq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vqsub.u8 Q0, Q0, Q0'
+
+   * int32x4_t vqsubq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vqsub.s32 Q0, Q0, Q0'
+
+   * int16x8_t vqsubq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vqsub.s16 Q0, Q0, Q0'
+
+   * int8x16_t vqsubq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vqsub.s8 Q0, Q0, Q0'
+
+   * uint64x2_t vqsubq_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vqsub.u64 Q0, Q0, Q0'
+
+   * int64x2_t vqsubq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vqsub.s64 Q0, Q0, Q0'
+
+   * uint32x2_t vsubhn_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vsubhn.i64 D0, Q0, Q0'
+
+   * uint16x4_t vsubhn_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vsubhn.i32 D0, Q0, Q0'
+
+   * uint8x8_t vsubhn_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vsubhn.i16 D0, Q0, Q0'
+
+   * int32x2_t vsubhn_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vsubhn.i64 D0, Q0, Q0'
+
+   * int16x4_t vsubhn_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vsubhn.i32 D0, Q0, Q0'
+
+   * int8x8_t vsubhn_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vsubhn.i16 D0, Q0, Q0'
+
+   * uint32x2_t vrsubhn_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vrsubhn.i64 D0, Q0, Q0'
+
+   * uint16x4_t vrsubhn_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vrsubhn.i32 D0, Q0, Q0'
+
+   * uint8x8_t vrsubhn_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vrsubhn.i16 D0, Q0, Q0'
+
+   * int32x2_t vrsubhn_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vrsubhn.i64 D0, Q0, Q0'
+
+   * int16x4_t vrsubhn_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vrsubhn.i32 D0, Q0, Q0'
+
+   * int8x8_t vrsubhn_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vrsubhn.i16 D0, Q0, Q0'
+
+6.54.3.6 Comparison (equal-to)
+..............................
+
+   * uint32x2_t vceq_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vceq.i32 D0, D0, D0'
+
+   * uint16x4_t vceq_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vceq.i16 D0, D0, D0'
+
+   * uint8x8_t vceq_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vceq.i8 D0, D0, D0'
+
+   * uint32x2_t vceq_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vceq.i32 D0, D0, D0'
+
+   * uint16x4_t vceq_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vceq.i16 D0, D0, D0'
+
+   * uint8x8_t vceq_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vceq.i8 D0, D0, D0'
+
+   * uint32x2_t vceq_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vceq.f32 D0, D0, D0'
+
+   * uint8x8_t vceq_p8 (poly8x8_t, poly8x8_t)
+     _Form of expected instruction(s):_ `vceq.i8 D0, D0, D0'
+
+   * uint32x4_t vceqq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vceq.i32 Q0, Q0, Q0'
+
+   * uint16x8_t vceqq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vceq.i16 Q0, Q0, Q0'
+
+   * uint8x16_t vceqq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vceq.i8 Q0, Q0, Q0'
+
+   * uint32x4_t vceqq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vceq.i32 Q0, Q0, Q0'
+
+   * uint16x8_t vceqq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vceq.i16 Q0, Q0, Q0'
+
+   * uint8x16_t vceqq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vceq.i8 Q0, Q0, Q0'
+
+   * uint32x4_t vceqq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vceq.f32 Q0, Q0, Q0'
+
+   * uint8x16_t vceqq_p8 (poly8x16_t, poly8x16_t)
+     _Form of expected instruction(s):_ `vceq.i8 Q0, Q0, Q0'
+
+6.54.3.7 Comparison (greater-than-or-equal-to)
+..............................................
+
+   * uint32x2_t vcge_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vcge.u32 D0, D0, D0'
+
+   * uint16x4_t vcge_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vcge.u16 D0, D0, D0'
+
+   * uint8x8_t vcge_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vcge.u8 D0, D0, D0'
+
+   * uint32x2_t vcge_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vcge.s32 D0, D0, D0'
+
+   * uint16x4_t vcge_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vcge.s16 D0, D0, D0'
+
+   * uint8x8_t vcge_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vcge.s8 D0, D0, D0'
+
+   * uint32x2_t vcge_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vcge.f32 D0, D0, D0'
+
+   * uint32x4_t vcgeq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vcge.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vcgeq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vcge.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vcgeq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vcge.u8 Q0, Q0, Q0'
+
+   * uint32x4_t vcgeq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vcge.s32 Q0, Q0, Q0'
+
+   * uint16x8_t vcgeq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vcge.s16 Q0, Q0, Q0'
+
+   * uint8x16_t vcgeq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vcge.s8 Q0, Q0, Q0'
+
+   * uint32x4_t vcgeq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vcge.f32 Q0, Q0, Q0'
+
+6.54.3.8 Comparison (less-than-or-equal-to)
+...........................................
+
+   * uint32x2_t vcle_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vcge.u32 D0, D0, D0'
+
+   * uint16x4_t vcle_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vcge.u16 D0, D0, D0'
+
+   * uint8x8_t vcle_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vcge.u8 D0, D0, D0'
+
+   * uint32x2_t vcle_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vcge.s32 D0, D0, D0'
+
+   * uint16x4_t vcle_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vcge.s16 D0, D0, D0'
+
+   * uint8x8_t vcle_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vcge.s8 D0, D0, D0'
+
+   * uint32x2_t vcle_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vcge.f32 D0, D0, D0'
+
+   * uint32x4_t vcleq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vcge.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vcleq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vcge.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vcleq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vcge.u8 Q0, Q0, Q0'
+
+   * uint32x4_t vcleq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vcge.s32 Q0, Q0, Q0'
+
+   * uint16x8_t vcleq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vcge.s16 Q0, Q0, Q0'
+
+   * uint8x16_t vcleq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vcge.s8 Q0, Q0, Q0'
+
+   * uint32x4_t vcleq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vcge.f32 Q0, Q0, Q0'
+
+6.54.3.9 Comparison (greater-than)
+..................................
+
+   * uint32x2_t vcgt_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vcgt.u32 D0, D0, D0'
+
+   * uint16x4_t vcgt_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vcgt.u16 D0, D0, D0'
+
+   * uint8x8_t vcgt_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vcgt.u8 D0, D0, D0'
+
+   * uint32x2_t vcgt_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vcgt.s32 D0, D0, D0'
+
+   * uint16x4_t vcgt_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vcgt.s16 D0, D0, D0'
+
+   * uint8x8_t vcgt_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vcgt.s8 D0, D0, D0'
+
+   * uint32x2_t vcgt_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vcgt.f32 D0, D0, D0'
+
+   * uint32x4_t vcgtq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vcgt.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vcgtq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vcgt.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vcgtq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vcgt.u8 Q0, Q0, Q0'
+
+   * uint32x4_t vcgtq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vcgt.s32 Q0, Q0, Q0'
+
+   * uint16x8_t vcgtq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vcgt.s16 Q0, Q0, Q0'
+
+   * uint8x16_t vcgtq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vcgt.s8 Q0, Q0, Q0'
+
+   * uint32x4_t vcgtq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vcgt.f32 Q0, Q0, Q0'
+
+6.54.3.10 Comparison (less-than)
+................................
+
+   * uint32x2_t vclt_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vcgt.u32 D0, D0, D0'
+
+   * uint16x4_t vclt_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vcgt.u16 D0, D0, D0'
+
+   * uint8x8_t vclt_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vcgt.u8 D0, D0, D0'
+
+   * uint32x2_t vclt_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vcgt.s32 D0, D0, D0'
+
+   * uint16x4_t vclt_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vcgt.s16 D0, D0, D0'
+
+   * uint8x8_t vclt_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vcgt.s8 D0, D0, D0'
+
+   * uint32x2_t vclt_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vcgt.f32 D0, D0, D0'
+
+   * uint32x4_t vcltq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vcgt.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vcltq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vcgt.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vcltq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vcgt.u8 Q0, Q0, Q0'
+
+   * uint32x4_t vcltq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vcgt.s32 Q0, Q0, Q0'
+
+   * uint16x8_t vcltq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vcgt.s16 Q0, Q0, Q0'
+
+   * uint8x16_t vcltq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vcgt.s8 Q0, Q0, Q0'
+
+   * uint32x4_t vcltq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vcgt.f32 Q0, Q0, Q0'
+
+6.54.3.11 Comparison (absolute greater-than-or-equal-to)
+........................................................
+
+   * uint32x2_t vcage_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vacge.f32 D0, D0, D0'
+
+   * uint32x4_t vcageq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vacge.f32 Q0, Q0, Q0'
+
+6.54.3.12 Comparison (absolute less-than-or-equal-to)
+.....................................................
+
+   * uint32x2_t vcale_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vacge.f32 D0, D0, D0'
+
+   * uint32x4_t vcaleq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vacge.f32 Q0, Q0, Q0'
+
+6.54.3.13 Comparison (absolute greater-than)
+............................................
+
+   * uint32x2_t vcagt_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vacgt.f32 D0, D0, D0'
+
+   * uint32x4_t vcagtq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vacgt.f32 Q0, Q0, Q0'
+
+6.54.3.14 Comparison (absolute less-than)
+.........................................
+
+   * uint32x2_t vcalt_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vacgt.f32 D0, D0, D0'
+
+   * uint32x4_t vcaltq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vacgt.f32 Q0, Q0, Q0'
+
+6.54.3.15 Test bits
+...................
+
+   * uint32x2_t vtst_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vtst.32 D0, D0, D0'
+
+   * uint16x4_t vtst_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vtst.16 D0, D0, D0'
+
+   * uint8x8_t vtst_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtst.8 D0, D0, D0'
+
+   * uint32x2_t vtst_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vtst.32 D0, D0, D0'
+
+   * uint16x4_t vtst_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vtst.16 D0, D0, D0'
+
+   * uint8x8_t vtst_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vtst.8 D0, D0, D0'
+
+   * uint8x8_t vtst_p8 (poly8x8_t, poly8x8_t)
+     _Form of expected instruction(s):_ `vtst.8 D0, D0, D0'
+
+   * uint32x4_t vtstq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vtst.32 Q0, Q0, Q0'
+
+   * uint16x8_t vtstq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vtst.16 Q0, Q0, Q0'
+
+   * uint8x16_t vtstq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vtst.8 Q0, Q0, Q0'
+
+   * uint32x4_t vtstq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vtst.32 Q0, Q0, Q0'
+
+   * uint16x8_t vtstq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vtst.16 Q0, Q0, Q0'
+
+   * uint8x16_t vtstq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vtst.8 Q0, Q0, Q0'
+
+   * uint8x16_t vtstq_p8 (poly8x16_t, poly8x16_t)
+     _Form of expected instruction(s):_ `vtst.8 Q0, Q0, Q0'
+
+6.54.3.16 Absolute difference
+.............................
+
+   * uint32x2_t vabd_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vabd.u32 D0, D0, D0'
+
+   * uint16x4_t vabd_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vabd.u16 D0, D0, D0'
+
+   * uint8x8_t vabd_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vabd.u8 D0, D0, D0'
+
+   * int32x2_t vabd_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vabd.s32 D0, D0, D0'
+
+   * int16x4_t vabd_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vabd.s16 D0, D0, D0'
+
+   * int8x8_t vabd_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vabd.s8 D0, D0, D0'
+
+   * float32x2_t vabd_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vabd.f32 D0, D0, D0'
+
+   * uint32x4_t vabdq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vabd.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vabdq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vabd.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vabdq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vabd.u8 Q0, Q0, Q0'
+
+   * int32x4_t vabdq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vabd.s32 Q0, Q0, Q0'
+
+   * int16x8_t vabdq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vabd.s16 Q0, Q0, Q0'
+
+   * int8x16_t vabdq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vabd.s8 Q0, Q0, Q0'
+
+   * float32x4_t vabdq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vabd.f32 Q0, Q0, Q0'
+
+   * uint64x2_t vabdl_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vabdl.u32 Q0, D0, D0'
+
+   * uint32x4_t vabdl_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vabdl.u16 Q0, D0, D0'
+
+   * uint16x8_t vabdl_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vabdl.u8 Q0, D0, D0'
+
+   * int64x2_t vabdl_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vabdl.s32 Q0, D0, D0'
+
+   * int32x4_t vabdl_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vabdl.s16 Q0, D0, D0'
+
+   * int16x8_t vabdl_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vabdl.s8 Q0, D0, D0'
+
+6.54.3.17 Absolute difference and accumulate
+............................................
+
+   * uint32x2_t vaba_u32 (uint32x2_t, uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vaba.u32 D0, D0, D0'
+
+   * uint16x4_t vaba_u16 (uint16x4_t, uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vaba.u16 D0, D0, D0'
+
+   * uint8x8_t vaba_u8 (uint8x8_t, uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vaba.u8 D0, D0, D0'
+
+   * int32x2_t vaba_s32 (int32x2_t, int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vaba.s32 D0, D0, D0'
+
+   * int16x4_t vaba_s16 (int16x4_t, int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vaba.s16 D0, D0, D0'
+
+   * int8x8_t vaba_s8 (int8x8_t, int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vaba.s8 D0, D0, D0'
+
+   * uint32x4_t vabaq_u32 (uint32x4_t, uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vaba.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vabaq_u16 (uint16x8_t, uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vaba.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vabaq_u8 (uint8x16_t, uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vaba.u8 Q0, Q0, Q0'
+
+   * int32x4_t vabaq_s32 (int32x4_t, int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vaba.s32 Q0, Q0, Q0'
+
+   * int16x8_t vabaq_s16 (int16x8_t, int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vaba.s16 Q0, Q0, Q0'
+
+   * int8x16_t vabaq_s8 (int8x16_t, int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vaba.s8 Q0, Q0, Q0'
+
+   * uint64x2_t vabal_u32 (uint64x2_t, uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vabal.u32 Q0, D0, D0'
+
+   * uint32x4_t vabal_u16 (uint32x4_t, uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vabal.u16 Q0, D0, D0'
+
+   * uint16x8_t vabal_u8 (uint16x8_t, uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vabal.u8 Q0, D0, D0'
+
+   * int64x2_t vabal_s32 (int64x2_t, int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vabal.s32 Q0, D0, D0'
+
+   * int32x4_t vabal_s16 (int32x4_t, int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vabal.s16 Q0, D0, D0'
+
+   * int16x8_t vabal_s8 (int16x8_t, int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vabal.s8 Q0, D0, D0'
+
+6.54.3.18 Maximum
+.................
+
+   * uint32x2_t vmax_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vmax.u32 D0, D0, D0'
+
+   * uint16x4_t vmax_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vmax.u16 D0, D0, D0'
+
+   * uint8x8_t vmax_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vmax.u8 D0, D0, D0'
+
+   * int32x2_t vmax_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vmax.s32 D0, D0, D0'
+
+   * int16x4_t vmax_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vmax.s16 D0, D0, D0'
+
+   * int8x8_t vmax_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vmax.s8 D0, D0, D0'
+
+   * float32x2_t vmax_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vmax.f32 D0, D0, D0'
+
+   * uint32x4_t vmaxq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vmax.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vmaxq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vmax.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vmaxq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vmax.u8 Q0, Q0, Q0'
+
+   * int32x4_t vmaxq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vmax.s32 Q0, Q0, Q0'
+
+   * int16x8_t vmaxq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vmax.s16 Q0, Q0, Q0'
+
+   * int8x16_t vmaxq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vmax.s8 Q0, Q0, Q0'
+
+   * float32x4_t vmaxq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vmax.f32 Q0, Q0, Q0'
+
+6.54.3.19 Minimum
+.................
+
+   * uint32x2_t vmin_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vmin.u32 D0, D0, D0'
+
+   * uint16x4_t vmin_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vmin.u16 D0, D0, D0'
+
+   * uint8x8_t vmin_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vmin.u8 D0, D0, D0'
+
+   * int32x2_t vmin_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vmin.s32 D0, D0, D0'
+
+   * int16x4_t vmin_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vmin.s16 D0, D0, D0'
+
+   * int8x8_t vmin_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vmin.s8 D0, D0, D0'
+
+   * float32x2_t vmin_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vmin.f32 D0, D0, D0'
+
+   * uint32x4_t vminq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vmin.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vminq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vmin.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vminq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vmin.u8 Q0, Q0, Q0'
+
+   * int32x4_t vminq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vmin.s32 Q0, Q0, Q0'
+
+   * int16x8_t vminq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vmin.s16 Q0, Q0, Q0'
+
+   * int8x16_t vminq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vmin.s8 Q0, Q0, Q0'
+
+   * float32x4_t vminq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vmin.f32 Q0, Q0, Q0'
+
+6.54.3.20 Pairwise add
+......................
+
+   * uint32x2_t vpadd_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vpadd.i32 D0, D0, D0'
+
+   * uint16x4_t vpadd_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vpadd.i16 D0, D0, D0'
+
+   * uint8x8_t vpadd_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vpadd.i8 D0, D0, D0'
+
+   * int32x2_t vpadd_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vpadd.i32 D0, D0, D0'
+
+   * int16x4_t vpadd_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vpadd.i16 D0, D0, D0'
+
+   * int8x8_t vpadd_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vpadd.i8 D0, D0, D0'
+
+   * float32x2_t vpadd_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vpadd.f32 D0, D0, D0'
+
+   * uint64x1_t vpaddl_u32 (uint32x2_t)
+     _Form of expected instruction(s):_ `vpaddl.u32 D0, D0'
+
+   * uint32x2_t vpaddl_u16 (uint16x4_t)
+     _Form of expected instruction(s):_ `vpaddl.u16 D0, D0'
+
+   * uint16x4_t vpaddl_u8 (uint8x8_t)
+     _Form of expected instruction(s):_ `vpaddl.u8 D0, D0'
+
+   * int64x1_t vpaddl_s32 (int32x2_t)
+     _Form of expected instruction(s):_ `vpaddl.s32 D0, D0'
+
+   * int32x2_t vpaddl_s16 (int16x4_t)
+     _Form of expected instruction(s):_ `vpaddl.s16 D0, D0'
+
+   * int16x4_t vpaddl_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vpaddl.s8 D0, D0'
+
+   * uint64x2_t vpaddlq_u32 (uint32x4_t)
+     _Form of expected instruction(s):_ `vpaddl.u32 Q0, Q0'
+
+   * uint32x4_t vpaddlq_u16 (uint16x8_t)
+     _Form of expected instruction(s):_ `vpaddl.u16 Q0, Q0'
+
+   * uint16x8_t vpaddlq_u8 (uint8x16_t)
+     _Form of expected instruction(s):_ `vpaddl.u8 Q0, Q0'
+
+   * int64x2_t vpaddlq_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vpaddl.s32 Q0, Q0'
+
+   * int32x4_t vpaddlq_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vpaddl.s16 Q0, Q0'
+
+   * int16x8_t vpaddlq_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vpaddl.s8 Q0, Q0'
+
+6.54.3.21 Pairwise add, single_opcode widen and accumulate
+..........................................................
+
+   * uint64x1_t vpadal_u32 (uint64x1_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vpadal.u32 D0, D0'
+
+   * uint32x2_t vpadal_u16 (uint32x2_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vpadal.u16 D0, D0'
+
+   * uint16x4_t vpadal_u8 (uint16x4_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vpadal.u8 D0, D0'
+
+   * int64x1_t vpadal_s32 (int64x1_t, int32x2_t)
+     _Form of expected instruction(s):_ `vpadal.s32 D0, D0'
+
+   * int32x2_t vpadal_s16 (int32x2_t, int16x4_t)
+     _Form of expected instruction(s):_ `vpadal.s16 D0, D0'
+
+   * int16x4_t vpadal_s8 (int16x4_t, int8x8_t)
+     _Form of expected instruction(s):_ `vpadal.s8 D0, D0'
+
+   * uint64x2_t vpadalq_u32 (uint64x2_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vpadal.u32 Q0, Q0'
+
+   * uint32x4_t vpadalq_u16 (uint32x4_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vpadal.u16 Q0, Q0'
+
+   * uint16x8_t vpadalq_u8 (uint16x8_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vpadal.u8 Q0, Q0'
+
+   * int64x2_t vpadalq_s32 (int64x2_t, int32x4_t)
+     _Form of expected instruction(s):_ `vpadal.s32 Q0, Q0'
+
+   * int32x4_t vpadalq_s16 (int32x4_t, int16x8_t)
+     _Form of expected instruction(s):_ `vpadal.s16 Q0, Q0'
+
+   * int16x8_t vpadalq_s8 (int16x8_t, int8x16_t)
+     _Form of expected instruction(s):_ `vpadal.s8 Q0, Q0'
+
+6.54.3.22 Folding maximum
+.........................
+
+   * uint32x2_t vpmax_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vpmax.u32 D0, D0, D0'
+
+   * uint16x4_t vpmax_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vpmax.u16 D0, D0, D0'
+
+   * uint8x8_t vpmax_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vpmax.u8 D0, D0, D0'
+
+   * int32x2_t vpmax_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vpmax.s32 D0, D0, D0'
+
+   * int16x4_t vpmax_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vpmax.s16 D0, D0, D0'
+
+   * int8x8_t vpmax_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vpmax.s8 D0, D0, D0'
+
+   * float32x2_t vpmax_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vpmax.f32 D0, D0, D0'
+
+6.54.3.23 Folding minimum
+.........................
+
+   * uint32x2_t vpmin_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vpmin.u32 D0, D0, D0'
+
+   * uint16x4_t vpmin_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vpmin.u16 D0, D0, D0'
+
+   * uint8x8_t vpmin_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vpmin.u8 D0, D0, D0'
+
+   * int32x2_t vpmin_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vpmin.s32 D0, D0, D0'
+
+   * int16x4_t vpmin_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vpmin.s16 D0, D0, D0'
+
+   * int8x8_t vpmin_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vpmin.s8 D0, D0, D0'
+
+   * float32x2_t vpmin_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vpmin.f32 D0, D0, D0'
+
+6.54.3.24 Reciprocal step
+.........................
+
+   * float32x2_t vrecps_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vrecps.f32 D0, D0, D0'
+
+   * float32x4_t vrecpsq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vrecps.f32 Q0, Q0, Q0'
+
+   * float32x2_t vrsqrts_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vrsqrts.f32 D0, D0, D0'
+
+   * float32x4_t vrsqrtsq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vrsqrts.f32 Q0, Q0, Q0'
+
+6.54.3.25 Vector shift left
+...........................
+
+   * uint32x2_t vshl_u32 (uint32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vshl.u32 D0, D0, D0'
+
+   * uint16x4_t vshl_u16 (uint16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vshl.u16 D0, D0, D0'
+
+   * uint8x8_t vshl_u8 (uint8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vshl.u8 D0, D0, D0'
+
+   * int32x2_t vshl_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vshl.s32 D0, D0, D0'
+
+   * int16x4_t vshl_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vshl.s16 D0, D0, D0'
+
+   * int8x8_t vshl_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vshl.s8 D0, D0, D0'
+
+   * uint64x1_t vshl_u64 (uint64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vshl.u64 D0, D0, D0'
+
+   * int64x1_t vshl_s64 (int64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vshl.s64 D0, D0, D0'
+
+   * uint32x4_t vshlq_u32 (uint32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vshl.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vshlq_u16 (uint16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vshl.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vshlq_u8 (uint8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vshl.u8 Q0, Q0, Q0'
+
+   * int32x4_t vshlq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vshl.s32 Q0, Q0, Q0'
+
+   * int16x8_t vshlq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vshl.s16 Q0, Q0, Q0'
+
+   * int8x16_t vshlq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vshl.s8 Q0, Q0, Q0'
+
+   * uint64x2_t vshlq_u64 (uint64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vshl.u64 Q0, Q0, Q0'
+
+   * int64x2_t vshlq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vshl.s64 Q0, Q0, Q0'
+
+   * uint32x2_t vrshl_u32 (uint32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vrshl.u32 D0, D0, D0'
+
+   * uint16x4_t vrshl_u16 (uint16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vrshl.u16 D0, D0, D0'
+
+   * uint8x8_t vrshl_u8 (uint8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vrshl.u8 D0, D0, D0'
+
+   * int32x2_t vrshl_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vrshl.s32 D0, D0, D0'
+
+   * int16x4_t vrshl_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vrshl.s16 D0, D0, D0'
+
+   * int8x8_t vrshl_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vrshl.s8 D0, D0, D0'
+
+   * uint64x1_t vrshl_u64 (uint64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vrshl.u64 D0, D0, D0'
+
+   * int64x1_t vrshl_s64 (int64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vrshl.s64 D0, D0, D0'
+
+   * uint32x4_t vrshlq_u32 (uint32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vrshl.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vrshlq_u16 (uint16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vrshl.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vrshlq_u8 (uint8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vrshl.u8 Q0, Q0, Q0'
+
+   * int32x4_t vrshlq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vrshl.s32 Q0, Q0, Q0'
+
+   * int16x8_t vrshlq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vrshl.s16 Q0, Q0, Q0'
+
+   * int8x16_t vrshlq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vrshl.s8 Q0, Q0, Q0'
+
+   * uint64x2_t vrshlq_u64 (uint64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vrshl.u64 Q0, Q0, Q0'
+
+   * int64x2_t vrshlq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vrshl.s64 Q0, Q0, Q0'
+
+   * uint32x2_t vqshl_u32 (uint32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vqshl.u32 D0, D0, D0'
+
+   * uint16x4_t vqshl_u16 (uint16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vqshl.u16 D0, D0, D0'
+
+   * uint8x8_t vqshl_u8 (uint8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vqshl.u8 D0, D0, D0'
+
+   * int32x2_t vqshl_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vqshl.s32 D0, D0, D0'
+
+   * int16x4_t vqshl_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vqshl.s16 D0, D0, D0'
+
+   * int8x8_t vqshl_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vqshl.s8 D0, D0, D0'
+
+   * uint64x1_t vqshl_u64 (uint64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vqshl.u64 D0, D0, D0'
+
+   * int64x1_t vqshl_s64 (int64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vqshl.s64 D0, D0, D0'
+
+   * uint32x4_t vqshlq_u32 (uint32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vqshl.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vqshlq_u16 (uint16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vqshl.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vqshlq_u8 (uint8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vqshl.u8 Q0, Q0, Q0'
+
+   * int32x4_t vqshlq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vqshl.s32 Q0, Q0, Q0'
+
+   * int16x8_t vqshlq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vqshl.s16 Q0, Q0, Q0'
+
+   * int8x16_t vqshlq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vqshl.s8 Q0, Q0, Q0'
+
+   * uint64x2_t vqshlq_u64 (uint64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vqshl.u64 Q0, Q0, Q0'
+
+   * int64x2_t vqshlq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vqshl.s64 Q0, Q0, Q0'
+
+   * uint32x2_t vqrshl_u32 (uint32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vqrshl.u32 D0, D0, D0'
+
+   * uint16x4_t vqrshl_u16 (uint16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vqrshl.u16 D0, D0, D0'
+
+   * uint8x8_t vqrshl_u8 (uint8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vqrshl.u8 D0, D0, D0'
+
+   * int32x2_t vqrshl_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vqrshl.s32 D0, D0, D0'
+
+   * int16x4_t vqrshl_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vqrshl.s16 D0, D0, D0'
+
+   * int8x8_t vqrshl_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vqrshl.s8 D0, D0, D0'
+
+   * uint64x1_t vqrshl_u64 (uint64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vqrshl.u64 D0, D0, D0'
+
+   * int64x1_t vqrshl_s64 (int64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vqrshl.s64 D0, D0, D0'
+
+   * uint32x4_t vqrshlq_u32 (uint32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vqrshl.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vqrshlq_u16 (uint16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vqrshl.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vqrshlq_u8 (uint8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vqrshl.u8 Q0, Q0, Q0'
+
+   * int32x4_t vqrshlq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vqrshl.s32 Q0, Q0, Q0'
+
+   * int16x8_t vqrshlq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vqrshl.s16 Q0, Q0, Q0'
+
+   * int8x16_t vqrshlq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vqrshl.s8 Q0, Q0, Q0'
+
+   * uint64x2_t vqrshlq_u64 (uint64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vqrshl.u64 Q0, Q0, Q0'
+
+   * int64x2_t vqrshlq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vqrshl.s64 Q0, Q0, Q0'
+
+6.54.3.26 Vector shift left by constant
+.......................................
+
+   * uint32x2_t vshl_n_u32 (uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vshl.i32 D0, D0, #0'
+
+   * uint16x4_t vshl_n_u16 (uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vshl.i16 D0, D0, #0'
+
+   * uint8x8_t vshl_n_u8 (uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vshl.i8 D0, D0, #0'
+
+   * int32x2_t vshl_n_s32 (int32x2_t, const int)
+     _Form of expected instruction(s):_ `vshl.i32 D0, D0, #0'
+
+   * int16x4_t vshl_n_s16 (int16x4_t, const int)
+     _Form of expected instruction(s):_ `vshl.i16 D0, D0, #0'
+
+   * int8x8_t vshl_n_s8 (int8x8_t, const int)
+     _Form of expected instruction(s):_ `vshl.i8 D0, D0, #0'
+
+   * uint64x1_t vshl_n_u64 (uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vshl.i64 D0, D0, #0'
+
+   * int64x1_t vshl_n_s64 (int64x1_t, const int)
+     _Form of expected instruction(s):_ `vshl.i64 D0, D0, #0'
+
+   * uint32x4_t vshlq_n_u32 (uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vshl.i32 Q0, Q0, #0'
+
+   * uint16x8_t vshlq_n_u16 (uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vshl.i16 Q0, Q0, #0'
+
+   * uint8x16_t vshlq_n_u8 (uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vshl.i8 Q0, Q0, #0'
+
+   * int32x4_t vshlq_n_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vshl.i32 Q0, Q0, #0'
+
+   * int16x8_t vshlq_n_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vshl.i16 Q0, Q0, #0'
+
+   * int8x16_t vshlq_n_s8 (int8x16_t, const int)
+     _Form of expected instruction(s):_ `vshl.i8 Q0, Q0, #0'
+
+   * uint64x2_t vshlq_n_u64 (uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vshl.i64 Q0, Q0, #0'
+
+   * int64x2_t vshlq_n_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vshl.i64 Q0, Q0, #0'
+
+   * uint32x2_t vqshl_n_u32 (uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vqshl.u32 D0, D0, #0'
+
+   * uint16x4_t vqshl_n_u16 (uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vqshl.u16 D0, D0, #0'
+
+   * uint8x8_t vqshl_n_u8 (uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vqshl.u8 D0, D0, #0'
+
+   * int32x2_t vqshl_n_s32 (int32x2_t, const int)
+     _Form of expected instruction(s):_ `vqshl.s32 D0, D0, #0'
+
+   * int16x4_t vqshl_n_s16 (int16x4_t, const int)
+     _Form of expected instruction(s):_ `vqshl.s16 D0, D0, #0'
+
+   * int8x8_t vqshl_n_s8 (int8x8_t, const int)
+     _Form of expected instruction(s):_ `vqshl.s8 D0, D0, #0'
+
+   * uint64x1_t vqshl_n_u64 (uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vqshl.u64 D0, D0, #0'
+
+   * int64x1_t vqshl_n_s64 (int64x1_t, const int)
+     _Form of expected instruction(s):_ `vqshl.s64 D0, D0, #0'
+
+   * uint32x4_t vqshlq_n_u32 (uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vqshl.u32 Q0, Q0, #0'
+
+   * uint16x8_t vqshlq_n_u16 (uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vqshl.u16 Q0, Q0, #0'
+
+   * uint8x16_t vqshlq_n_u8 (uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vqshl.u8 Q0, Q0, #0'
+
+   * int32x4_t vqshlq_n_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vqshl.s32 Q0, Q0, #0'
+
+   * int16x8_t vqshlq_n_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vqshl.s16 Q0, Q0, #0'
+
+   * int8x16_t vqshlq_n_s8 (int8x16_t, const int)
+     _Form of expected instruction(s):_ `vqshl.s8 Q0, Q0, #0'
+
+   * uint64x2_t vqshlq_n_u64 (uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vqshl.u64 Q0, Q0, #0'
+
+   * int64x2_t vqshlq_n_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vqshl.s64 Q0, Q0, #0'
+
+   * uint64x1_t vqshlu_n_s64 (int64x1_t, const int)
+     _Form of expected instruction(s):_ `vqshlu.s64 D0, D0, #0'
+
+   * uint32x2_t vqshlu_n_s32 (int32x2_t, const int)
+     _Form of expected instruction(s):_ `vqshlu.s32 D0, D0, #0'
+
+   * uint16x4_t vqshlu_n_s16 (int16x4_t, const int)
+     _Form of expected instruction(s):_ `vqshlu.s16 D0, D0, #0'
+
+   * uint8x8_t vqshlu_n_s8 (int8x8_t, const int)
+     _Form of expected instruction(s):_ `vqshlu.s8 D0, D0, #0'
+
+   * uint64x2_t vqshluq_n_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vqshlu.s64 Q0, Q0, #0'
+
+   * uint32x4_t vqshluq_n_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vqshlu.s32 Q0, Q0, #0'
+
+   * uint16x8_t vqshluq_n_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vqshlu.s16 Q0, Q0, #0'
+
+   * uint8x16_t vqshluq_n_s8 (int8x16_t, const int)
+     _Form of expected instruction(s):_ `vqshlu.s8 Q0, Q0, #0'
+
+   * uint64x2_t vshll_n_u32 (uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vshll.u32 Q0, D0, #0'
+
+   * uint32x4_t vshll_n_u16 (uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vshll.u16 Q0, D0, #0'
+
+   * uint16x8_t vshll_n_u8 (uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vshll.u8 Q0, D0, #0'
+
+   * int64x2_t vshll_n_s32 (int32x2_t, const int)
+     _Form of expected instruction(s):_ `vshll.s32 Q0, D0, #0'
+
+   * int32x4_t vshll_n_s16 (int16x4_t, const int)
+     _Form of expected instruction(s):_ `vshll.s16 Q0, D0, #0'
+
+   * int16x8_t vshll_n_s8 (int8x8_t, const int)
+     _Form of expected instruction(s):_ `vshll.s8 Q0, D0, #0'
+
+6.54.3.27 Vector shift right by constant
+........................................
+
+   * uint32x2_t vshr_n_u32 (uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vshr.u32 D0, D0, #0'
+
+   * uint16x4_t vshr_n_u16 (uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vshr.u16 D0, D0, #0'
+
+   * uint8x8_t vshr_n_u8 (uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vshr.u8 D0, D0, #0'
+
+   * int32x2_t vshr_n_s32 (int32x2_t, const int)
+     _Form of expected instruction(s):_ `vshr.s32 D0, D0, #0'
+
+   * int16x4_t vshr_n_s16 (int16x4_t, const int)
+     _Form of expected instruction(s):_ `vshr.s16 D0, D0, #0'
+
+   * int8x8_t vshr_n_s8 (int8x8_t, const int)
+     _Form of expected instruction(s):_ `vshr.s8 D0, D0, #0'
+
+   * uint64x1_t vshr_n_u64 (uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vshr.u64 D0, D0, #0'
+
+   * int64x1_t vshr_n_s64 (int64x1_t, const int)
+     _Form of expected instruction(s):_ `vshr.s64 D0, D0, #0'
+
+   * uint32x4_t vshrq_n_u32 (uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vshr.u32 Q0, Q0, #0'
+
+   * uint16x8_t vshrq_n_u16 (uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vshr.u16 Q0, Q0, #0'
+
+   * uint8x16_t vshrq_n_u8 (uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vshr.u8 Q0, Q0, #0'
+
+   * int32x4_t vshrq_n_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vshr.s32 Q0, Q0, #0'
+
+   * int16x8_t vshrq_n_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vshr.s16 Q0, Q0, #0'
+
+   * int8x16_t vshrq_n_s8 (int8x16_t, const int)
+     _Form of expected instruction(s):_ `vshr.s8 Q0, Q0, #0'
+
+   * uint64x2_t vshrq_n_u64 (uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vshr.u64 Q0, Q0, #0'
+
+   * int64x2_t vshrq_n_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vshr.s64 Q0, Q0, #0'
+
+   * uint32x2_t vrshr_n_u32 (uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vrshr.u32 D0, D0, #0'
+
+   * uint16x4_t vrshr_n_u16 (uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vrshr.u16 D0, D0, #0'
+
+   * uint8x8_t vrshr_n_u8 (uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vrshr.u8 D0, D0, #0'
+
+   * int32x2_t vrshr_n_s32 (int32x2_t, const int)
+     _Form of expected instruction(s):_ `vrshr.s32 D0, D0, #0'
+
+   * int16x4_t vrshr_n_s16 (int16x4_t, const int)
+     _Form of expected instruction(s):_ `vrshr.s16 D0, D0, #0'
+
+   * int8x8_t vrshr_n_s8 (int8x8_t, const int)
+     _Form of expected instruction(s):_ `vrshr.s8 D0, D0, #0'
+
+   * uint64x1_t vrshr_n_u64 (uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vrshr.u64 D0, D0, #0'
+
+   * int64x1_t vrshr_n_s64 (int64x1_t, const int)
+     _Form of expected instruction(s):_ `vrshr.s64 D0, D0, #0'
+
+   * uint32x4_t vrshrq_n_u32 (uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vrshr.u32 Q0, Q0, #0'
+
+   * uint16x8_t vrshrq_n_u16 (uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vrshr.u16 Q0, Q0, #0'
+
+   * uint8x16_t vrshrq_n_u8 (uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vrshr.u8 Q0, Q0, #0'
+
+   * int32x4_t vrshrq_n_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vrshr.s32 Q0, Q0, #0'
+
+   * int16x8_t vrshrq_n_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vrshr.s16 Q0, Q0, #0'
+
+   * int8x16_t vrshrq_n_s8 (int8x16_t, const int)
+     _Form of expected instruction(s):_ `vrshr.s8 Q0, Q0, #0'
+
+   * uint64x2_t vrshrq_n_u64 (uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vrshr.u64 Q0, Q0, #0'
+
+   * int64x2_t vrshrq_n_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vrshr.s64 Q0, Q0, #0'
+
+   * uint32x2_t vshrn_n_u64 (uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vshrn.i64 D0, Q0, #0'
+
+   * uint16x4_t vshrn_n_u32 (uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vshrn.i32 D0, Q0, #0'
+
+   * uint8x8_t vshrn_n_u16 (uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vshrn.i16 D0, Q0, #0'
+
+   * int32x2_t vshrn_n_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vshrn.i64 D0, Q0, #0'
+
+   * int16x4_t vshrn_n_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vshrn.i32 D0, Q0, #0'
+
+   * int8x8_t vshrn_n_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vshrn.i16 D0, Q0, #0'
+
+   * uint32x2_t vrshrn_n_u64 (uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vrshrn.i64 D0, Q0, #0'
+
+   * uint16x4_t vrshrn_n_u32 (uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vrshrn.i32 D0, Q0, #0'
+
+   * uint8x8_t vrshrn_n_u16 (uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vrshrn.i16 D0, Q0, #0'
+
+   * int32x2_t vrshrn_n_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vrshrn.i64 D0, Q0, #0'
+
+   * int16x4_t vrshrn_n_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vrshrn.i32 D0, Q0, #0'
+
+   * int8x8_t vrshrn_n_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vrshrn.i16 D0, Q0, #0'
+
+   * uint32x2_t vqshrn_n_u64 (uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vqshrn.u64 D0, Q0, #0'
+
+   * uint16x4_t vqshrn_n_u32 (uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vqshrn.u32 D0, Q0, #0'
+
+   * uint8x8_t vqshrn_n_u16 (uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vqshrn.u16 D0, Q0, #0'
+
+   * int32x2_t vqshrn_n_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vqshrn.s64 D0, Q0, #0'
+
+   * int16x4_t vqshrn_n_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vqshrn.s32 D0, Q0, #0'
+
+   * int8x8_t vqshrn_n_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vqshrn.s16 D0, Q0, #0'
+
+   * uint32x2_t vqrshrn_n_u64 (uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vqrshrn.u64 D0, Q0, #0'
+
+   * uint16x4_t vqrshrn_n_u32 (uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vqrshrn.u32 D0, Q0, #0'
+
+   * uint8x8_t vqrshrn_n_u16 (uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vqrshrn.u16 D0, Q0, #0'
+
+   * int32x2_t vqrshrn_n_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vqrshrn.s64 D0, Q0, #0'
+
+   * int16x4_t vqrshrn_n_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vqrshrn.s32 D0, Q0, #0'
+
+   * int8x8_t vqrshrn_n_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vqrshrn.s16 D0, Q0, #0'
+
+   * uint32x2_t vqshrun_n_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vqshrun.s64 D0, Q0, #0'
+
+   * uint16x4_t vqshrun_n_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vqshrun.s32 D0, Q0, #0'
+
+   * uint8x8_t vqshrun_n_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vqshrun.s16 D0, Q0, #0'
+
+   * uint32x2_t vqrshrun_n_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vqrshrun.s64 D0, Q0, #0'
+
+   * uint16x4_t vqrshrun_n_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vqrshrun.s32 D0, Q0, #0'
+
+   * uint8x8_t vqrshrun_n_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vqrshrun.s16 D0, Q0, #0'
+
+6.54.3.28 Vector shift right by constant and accumulate
+.......................................................
+
+   * uint32x2_t vsra_n_u32 (uint32x2_t, uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vsra.u32 D0, D0, #0'
+
+   * uint16x4_t vsra_n_u16 (uint16x4_t, uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vsra.u16 D0, D0, #0'
+
+   * uint8x8_t vsra_n_u8 (uint8x8_t, uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vsra.u8 D0, D0, #0'
+
+   * int32x2_t vsra_n_s32 (int32x2_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vsra.s32 D0, D0, #0'
+
+   * int16x4_t vsra_n_s16 (int16x4_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vsra.s16 D0, D0, #0'
+
+   * int8x8_t vsra_n_s8 (int8x8_t, int8x8_t, const int)
+     _Form of expected instruction(s):_ `vsra.s8 D0, D0, #0'
+
+   * uint64x1_t vsra_n_u64 (uint64x1_t, uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vsra.u64 D0, D0, #0'
+
+   * int64x1_t vsra_n_s64 (int64x1_t, int64x1_t, const int)
+     _Form of expected instruction(s):_ `vsra.s64 D0, D0, #0'
+
+   * uint32x4_t vsraq_n_u32 (uint32x4_t, uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vsra.u32 Q0, Q0, #0'
+
+   * uint16x8_t vsraq_n_u16 (uint16x8_t, uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vsra.u16 Q0, Q0, #0'
+
+   * uint8x16_t vsraq_n_u8 (uint8x16_t, uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vsra.u8 Q0, Q0, #0'
+
+   * int32x4_t vsraq_n_s32 (int32x4_t, int32x4_t, const int)
+     _Form of expected instruction(s):_ `vsra.s32 Q0, Q0, #0'
+
+   * int16x8_t vsraq_n_s16 (int16x8_t, int16x8_t, const int)
+     _Form of expected instruction(s):_ `vsra.s16 Q0, Q0, #0'
+
+   * int8x16_t vsraq_n_s8 (int8x16_t, int8x16_t, const int)
+     _Form of expected instruction(s):_ `vsra.s8 Q0, Q0, #0'
+
+   * uint64x2_t vsraq_n_u64 (uint64x2_t, uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vsra.u64 Q0, Q0, #0'
+
+   * int64x2_t vsraq_n_s64 (int64x2_t, int64x2_t, const int)
+     _Form of expected instruction(s):_ `vsra.s64 Q0, Q0, #0'
+
+   * uint32x2_t vrsra_n_u32 (uint32x2_t, uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vrsra.u32 D0, D0, #0'
+
+   * uint16x4_t vrsra_n_u16 (uint16x4_t, uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vrsra.u16 D0, D0, #0'
+
+   * uint8x8_t vrsra_n_u8 (uint8x8_t, uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vrsra.u8 D0, D0, #0'
+
+   * int32x2_t vrsra_n_s32 (int32x2_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vrsra.s32 D0, D0, #0'
+
+   * int16x4_t vrsra_n_s16 (int16x4_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vrsra.s16 D0, D0, #0'
+
+   * int8x8_t vrsra_n_s8 (int8x8_t, int8x8_t, const int)
+     _Form of expected instruction(s):_ `vrsra.s8 D0, D0, #0'
+
+   * uint64x1_t vrsra_n_u64 (uint64x1_t, uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vrsra.u64 D0, D0, #0'
+
+   * int64x1_t vrsra_n_s64 (int64x1_t, int64x1_t, const int)
+     _Form of expected instruction(s):_ `vrsra.s64 D0, D0, #0'
+
+   * uint32x4_t vrsraq_n_u32 (uint32x4_t, uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vrsra.u32 Q0, Q0, #0'
+
+   * uint16x8_t vrsraq_n_u16 (uint16x8_t, uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vrsra.u16 Q0, Q0, #0'
+
+   * uint8x16_t vrsraq_n_u8 (uint8x16_t, uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vrsra.u8 Q0, Q0, #0'
+
+   * int32x4_t vrsraq_n_s32 (int32x4_t, int32x4_t, const int)
+     _Form of expected instruction(s):_ `vrsra.s32 Q0, Q0, #0'
+
+   * int16x8_t vrsraq_n_s16 (int16x8_t, int16x8_t, const int)
+     _Form of expected instruction(s):_ `vrsra.s16 Q0, Q0, #0'
+
+   * int8x16_t vrsraq_n_s8 (int8x16_t, int8x16_t, const int)
+     _Form of expected instruction(s):_ `vrsra.s8 Q0, Q0, #0'
+
+   * uint64x2_t vrsraq_n_u64 (uint64x2_t, uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vrsra.u64 Q0, Q0, #0'
+
+   * int64x2_t vrsraq_n_s64 (int64x2_t, int64x2_t, const int)
+     _Form of expected instruction(s):_ `vrsra.s64 Q0, Q0, #0'
+
+6.54.3.29 Vector shift right and insert
+.......................................
+
+   * uint32x2_t vsri_n_u32 (uint32x2_t, uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vsri.32 D0, D0, #0'
+
+   * uint16x4_t vsri_n_u16 (uint16x4_t, uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vsri.16 D0, D0, #0'
+
+   * uint8x8_t vsri_n_u8 (uint8x8_t, uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vsri.8 D0, D0, #0'
+
+   * int32x2_t vsri_n_s32 (int32x2_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vsri.32 D0, D0, #0'
+
+   * int16x4_t vsri_n_s16 (int16x4_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vsri.16 D0, D0, #0'
+
+   * int8x8_t vsri_n_s8 (int8x8_t, int8x8_t, const int)
+     _Form of expected instruction(s):_ `vsri.8 D0, D0, #0'
+
+   * uint64x1_t vsri_n_u64 (uint64x1_t, uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vsri.64 D0, D0, #0'
+
+   * int64x1_t vsri_n_s64 (int64x1_t, int64x1_t, const int)
+     _Form of expected instruction(s):_ `vsri.64 D0, D0, #0'
+
+   * poly16x4_t vsri_n_p16 (poly16x4_t, poly16x4_t, const int)
+     _Form of expected instruction(s):_ `vsri.16 D0, D0, #0'
+
+   * poly8x8_t vsri_n_p8 (poly8x8_t, poly8x8_t, const int)
+     _Form of expected instruction(s):_ `vsri.8 D0, D0, #0'
+
+   * uint32x4_t vsriq_n_u32 (uint32x4_t, uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vsri.32 Q0, Q0, #0'
+
+   * uint16x8_t vsriq_n_u16 (uint16x8_t, uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vsri.16 Q0, Q0, #0'
+
+   * uint8x16_t vsriq_n_u8 (uint8x16_t, uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vsri.8 Q0, Q0, #0'
+
+   * int32x4_t vsriq_n_s32 (int32x4_t, int32x4_t, const int)
+     _Form of expected instruction(s):_ `vsri.32 Q0, Q0, #0'
+
+   * int16x8_t vsriq_n_s16 (int16x8_t, int16x8_t, const int)
+     _Form of expected instruction(s):_ `vsri.16 Q0, Q0, #0'
+
+   * int8x16_t vsriq_n_s8 (int8x16_t, int8x16_t, const int)
+     _Form of expected instruction(s):_ `vsri.8 Q0, Q0, #0'
+
+   * uint64x2_t vsriq_n_u64 (uint64x2_t, uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vsri.64 Q0, Q0, #0'
+
+   * int64x2_t vsriq_n_s64 (int64x2_t, int64x2_t, const int)
+     _Form of expected instruction(s):_ `vsri.64 Q0, Q0, #0'
+
+   * poly16x8_t vsriq_n_p16 (poly16x8_t, poly16x8_t, const int)
+     _Form of expected instruction(s):_ `vsri.16 Q0, Q0, #0'
+
+   * poly8x16_t vsriq_n_p8 (poly8x16_t, poly8x16_t, const int)
+     _Form of expected instruction(s):_ `vsri.8 Q0, Q0, #0'
+
+6.54.3.30 Vector shift left and insert
+......................................
+
+   * uint32x2_t vsli_n_u32 (uint32x2_t, uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vsli.32 D0, D0, #0'
+
+   * uint16x4_t vsli_n_u16 (uint16x4_t, uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vsli.16 D0, D0, #0'
+
+   * uint8x8_t vsli_n_u8 (uint8x8_t, uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vsli.8 D0, D0, #0'
+
+   * int32x2_t vsli_n_s32 (int32x2_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vsli.32 D0, D0, #0'
+
+   * int16x4_t vsli_n_s16 (int16x4_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vsli.16 D0, D0, #0'
+
+   * int8x8_t vsli_n_s8 (int8x8_t, int8x8_t, const int)
+     _Form of expected instruction(s):_ `vsli.8 D0, D0, #0'
+
+   * uint64x1_t vsli_n_u64 (uint64x1_t, uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vsli.64 D0, D0, #0'
+
+   * int64x1_t vsli_n_s64 (int64x1_t, int64x1_t, const int)
+     _Form of expected instruction(s):_ `vsli.64 D0, D0, #0'
+
+   * poly16x4_t vsli_n_p16 (poly16x4_t, poly16x4_t, const int)
+     _Form of expected instruction(s):_ `vsli.16 D0, D0, #0'
+
+   * poly8x8_t vsli_n_p8 (poly8x8_t, poly8x8_t, const int)
+     _Form of expected instruction(s):_ `vsli.8 D0, D0, #0'
+
+   * uint32x4_t vsliq_n_u32 (uint32x4_t, uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vsli.32 Q0, Q0, #0'
+
+   * uint16x8_t vsliq_n_u16 (uint16x8_t, uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vsli.16 Q0, Q0, #0'
+
+   * uint8x16_t vsliq_n_u8 (uint8x16_t, uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vsli.8 Q0, Q0, #0'
+
+   * int32x4_t vsliq_n_s32 (int32x4_t, int32x4_t, const int)
+     _Form of expected instruction(s):_ `vsli.32 Q0, Q0, #0'
+
+   * int16x8_t vsliq_n_s16 (int16x8_t, int16x8_t, const int)
+     _Form of expected instruction(s):_ `vsli.16 Q0, Q0, #0'
+
+   * int8x16_t vsliq_n_s8 (int8x16_t, int8x16_t, const int)
+     _Form of expected instruction(s):_ `vsli.8 Q0, Q0, #0'
+
+   * uint64x2_t vsliq_n_u64 (uint64x2_t, uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vsli.64 Q0, Q0, #0'
+
+   * int64x2_t vsliq_n_s64 (int64x2_t, int64x2_t, const int)
+     _Form of expected instruction(s):_ `vsli.64 Q0, Q0, #0'
+
+   * poly16x8_t vsliq_n_p16 (poly16x8_t, poly16x8_t, const int)
+     _Form of expected instruction(s):_ `vsli.16 Q0, Q0, #0'
+
+   * poly8x16_t vsliq_n_p8 (poly8x16_t, poly8x16_t, const int)
+     _Form of expected instruction(s):_ `vsli.8 Q0, Q0, #0'
+
+6.54.3.31 Absolute value
+........................
+
+   * float32x2_t vabs_f32 (float32x2_t)
+     _Form of expected instruction(s):_ `vabs.f32 D0, D0'
+
+   * int32x2_t vabs_s32 (int32x2_t)
+     _Form of expected instruction(s):_ `vabs.s32 D0, D0'
+
+   * int16x4_t vabs_s16 (int16x4_t)
+     _Form of expected instruction(s):_ `vabs.s16 D0, D0'
+
+   * int8x8_t vabs_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vabs.s8 D0, D0'
+
+   * float32x4_t vabsq_f32 (float32x4_t)
+     _Form of expected instruction(s):_ `vabs.f32 Q0, Q0'
+
+   * int32x4_t vabsq_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vabs.s32 Q0, Q0'
+
+   * int16x8_t vabsq_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vabs.s16 Q0, Q0'
+
+   * int8x16_t vabsq_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vabs.s8 Q0, Q0'
+
+   * int32x2_t vqabs_s32 (int32x2_t)
+     _Form of expected instruction(s):_ `vqabs.s32 D0, D0'
+
+   * int16x4_t vqabs_s16 (int16x4_t)
+     _Form of expected instruction(s):_ `vqabs.s16 D0, D0'
+
+   * int8x8_t vqabs_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vqabs.s8 D0, D0'
+
+   * int32x4_t vqabsq_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vqabs.s32 Q0, Q0'
+
+   * int16x8_t vqabsq_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vqabs.s16 Q0, Q0'
+
+   * int8x16_t vqabsq_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vqabs.s8 Q0, Q0'
+
+6.54.3.32 Negation
+..................
+
+   * float32x2_t vneg_f32 (float32x2_t)
+     _Form of expected instruction(s):_ `vneg.f32 D0, D0'
+
+   * int32x2_t vneg_s32 (int32x2_t)
+     _Form of expected instruction(s):_ `vneg.s32 D0, D0'
+
+   * int16x4_t vneg_s16 (int16x4_t)
+     _Form of expected instruction(s):_ `vneg.s16 D0, D0'
+
+   * int8x8_t vneg_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vneg.s8 D0, D0'
+
+   * float32x4_t vnegq_f32 (float32x4_t)
+     _Form of expected instruction(s):_ `vneg.f32 Q0, Q0'
+
+   * int32x4_t vnegq_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vneg.s32 Q0, Q0'
+
+   * int16x8_t vnegq_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vneg.s16 Q0, Q0'
+
+   * int8x16_t vnegq_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vneg.s8 Q0, Q0'
+
+   * int32x2_t vqneg_s32 (int32x2_t)
+     _Form of expected instruction(s):_ `vqneg.s32 D0, D0'
+
+   * int16x4_t vqneg_s16 (int16x4_t)
+     _Form of expected instruction(s):_ `vqneg.s16 D0, D0'
+
+   * int8x8_t vqneg_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vqneg.s8 D0, D0'
+
+   * int32x4_t vqnegq_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vqneg.s32 Q0, Q0'
+
+   * int16x8_t vqnegq_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vqneg.s16 Q0, Q0'
+
+   * int8x16_t vqnegq_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vqneg.s8 Q0, Q0'
+
+6.54.3.33 Bitwise not
+.....................
+
+   * uint32x2_t vmvn_u32 (uint32x2_t)
+     _Form of expected instruction(s):_ `vmvn D0, D0'
+
+   * uint16x4_t vmvn_u16 (uint16x4_t)
+     _Form of expected instruction(s):_ `vmvn D0, D0'
+
+   * uint8x8_t vmvn_u8 (uint8x8_t)
+     _Form of expected instruction(s):_ `vmvn D0, D0'
+
+   * int32x2_t vmvn_s32 (int32x2_t)
+     _Form of expected instruction(s):_ `vmvn D0, D0'
+
+   * int16x4_t vmvn_s16 (int16x4_t)
+     _Form of expected instruction(s):_ `vmvn D0, D0'
+
+   * int8x8_t vmvn_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vmvn D0, D0'
+
+   * poly8x8_t vmvn_p8 (poly8x8_t)
+     _Form of expected instruction(s):_ `vmvn D0, D0'
+
+   * uint32x4_t vmvnq_u32 (uint32x4_t)
+     _Form of expected instruction(s):_ `vmvn Q0, Q0'
+
+   * uint16x8_t vmvnq_u16 (uint16x8_t)
+     _Form of expected instruction(s):_ `vmvn Q0, Q0'
+
+   * uint8x16_t vmvnq_u8 (uint8x16_t)
+     _Form of expected instruction(s):_ `vmvn Q0, Q0'
+
+   * int32x4_t vmvnq_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vmvn Q0, Q0'
+
+   * int16x8_t vmvnq_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vmvn Q0, Q0'
+
+   * int8x16_t vmvnq_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vmvn Q0, Q0'
+
+   * poly8x16_t vmvnq_p8 (poly8x16_t)
+     _Form of expected instruction(s):_ `vmvn Q0, Q0'
+
+6.54.3.34 Count leading sign bits
+.................................
+
+   * int32x2_t vcls_s32 (int32x2_t)
+     _Form of expected instruction(s):_ `vcls.s32 D0, D0'
+
+   * int16x4_t vcls_s16 (int16x4_t)
+     _Form of expected instruction(s):_ `vcls.s16 D0, D0'
+
+   * int8x8_t vcls_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vcls.s8 D0, D0'
+
+   * int32x4_t vclsq_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vcls.s32 Q0, Q0'
+
+   * int16x8_t vclsq_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vcls.s16 Q0, Q0'
+
+   * int8x16_t vclsq_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vcls.s8 Q0, Q0'
+
+6.54.3.35 Count leading zeros
+.............................
+
+   * uint32x2_t vclz_u32 (uint32x2_t)
+     _Form of expected instruction(s):_ `vclz.i32 D0, D0'
+
+   * uint16x4_t vclz_u16 (uint16x4_t)
+     _Form of expected instruction(s):_ `vclz.i16 D0, D0'
+
+   * uint8x8_t vclz_u8 (uint8x8_t)
+     _Form of expected instruction(s):_ `vclz.i8 D0, D0'
+
+   * int32x2_t vclz_s32 (int32x2_t)
+     _Form of expected instruction(s):_ `vclz.i32 D0, D0'
+
+   * int16x4_t vclz_s16 (int16x4_t)
+     _Form of expected instruction(s):_ `vclz.i16 D0, D0'
+
+   * int8x8_t vclz_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vclz.i8 D0, D0'
+
+   * uint32x4_t vclzq_u32 (uint32x4_t)
+     _Form of expected instruction(s):_ `vclz.i32 Q0, Q0'
+
+   * uint16x8_t vclzq_u16 (uint16x8_t)
+     _Form of expected instruction(s):_ `vclz.i16 Q0, Q0'
+
+   * uint8x16_t vclzq_u8 (uint8x16_t)
+     _Form of expected instruction(s):_ `vclz.i8 Q0, Q0'
+
+   * int32x4_t vclzq_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vclz.i32 Q0, Q0'
+
+   * int16x8_t vclzq_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vclz.i16 Q0, Q0'
+
+   * int8x16_t vclzq_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vclz.i8 Q0, Q0'
+
+6.54.3.36 Count number of set bits
+..................................
+
+   * uint8x8_t vcnt_u8 (uint8x8_t)
+     _Form of expected instruction(s):_ `vcnt.8 D0, D0'
+
+   * int8x8_t vcnt_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vcnt.8 D0, D0'
+
+   * poly8x8_t vcnt_p8 (poly8x8_t)
+     _Form of expected instruction(s):_ `vcnt.8 D0, D0'
+
+   * uint8x16_t vcntq_u8 (uint8x16_t)
+     _Form of expected instruction(s):_ `vcnt.8 Q0, Q0'
+
+   * int8x16_t vcntq_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vcnt.8 Q0, Q0'
+
+   * poly8x16_t vcntq_p8 (poly8x16_t)
+     _Form of expected instruction(s):_ `vcnt.8 Q0, Q0'
+
+6.54.3.37 Reciprocal estimate
+.............................
+
+   * float32x2_t vrecpe_f32 (float32x2_t)
+     _Form of expected instruction(s):_ `vrecpe.f32 D0, D0'
+
+   * uint32x2_t vrecpe_u32 (uint32x2_t)
+     _Form of expected instruction(s):_ `vrecpe.u32 D0, D0'
+
+   * float32x4_t vrecpeq_f32 (float32x4_t)
+     _Form of expected instruction(s):_ `vrecpe.f32 Q0, Q0'
+
+   * uint32x4_t vrecpeq_u32 (uint32x4_t)
+     _Form of expected instruction(s):_ `vrecpe.u32 Q0, Q0'
+
+6.54.3.38 Reciprocal square-root estimate
+.........................................
+
+   * float32x2_t vrsqrte_f32 (float32x2_t)
+     _Form of expected instruction(s):_ `vrsqrte.f32 D0, D0'
+
+   * uint32x2_t vrsqrte_u32 (uint32x2_t)
+     _Form of expected instruction(s):_ `vrsqrte.u32 D0, D0'
+
+   * float32x4_t vrsqrteq_f32 (float32x4_t)
+     _Form of expected instruction(s):_ `vrsqrte.f32 Q0, Q0'
+
+   * uint32x4_t vrsqrteq_u32 (uint32x4_t)
+     _Form of expected instruction(s):_ `vrsqrte.u32 Q0, Q0'
+
+6.54.3.39 Get lanes from a vector
+.................................
+
+   * uint32_t vget_lane_u32 (uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 R0, D0[0]'
+
+   * uint16_t vget_lane_u16 (uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.u16 R0, D0[0]'
+
+   * uint8_t vget_lane_u8 (uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.u8 R0, D0[0]'
+
+   * int32_t vget_lane_s32 (int32x2_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 R0, D0[0]'
+
+   * int16_t vget_lane_s16 (int16x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.s16 R0, D0[0]'
+
+   * int8_t vget_lane_s8 (int8x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.s8 R0, D0[0]'
+
+   * float32_t vget_lane_f32 (float32x2_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 R0, D0[0]'
+
+   * poly16_t vget_lane_p16 (poly16x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.u16 R0, D0[0]'
+
+   * poly8_t vget_lane_p8 (poly8x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.u8 R0, D0[0]'
+
+   * uint64_t vget_lane_u64 (uint64x1_t, const int)
+
+   * int64_t vget_lane_s64 (int64x1_t, const int)
+
+   * uint32_t vgetq_lane_u32 (uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 R0, D0[0]'
+
+   * uint16_t vgetq_lane_u16 (uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.u16 R0, D0[0]'
+
+   * uint8_t vgetq_lane_u8 (uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vmov.u8 R0, D0[0]'
+
+   * int32_t vgetq_lane_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 R0, D0[0]'
+
+   * int16_t vgetq_lane_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.s16 R0, D0[0]'
+
+   * int8_t vgetq_lane_s8 (int8x16_t, const int)
+     _Form of expected instruction(s):_ `vmov.s8 R0, D0[0]'
+
+   * float32_t vgetq_lane_f32 (float32x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 R0, D0[0]'
+
+   * poly16_t vgetq_lane_p16 (poly16x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.u16 R0, D0[0]'
+
+   * poly8_t vgetq_lane_p8 (poly8x16_t, const int)
+     _Form of expected instruction(s):_ `vmov.u8 R0, D0[0]'
+
+   * uint64_t vgetq_lane_u64 (uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vmov R0, R0, D0'
+
+   * int64_t vgetq_lane_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vmov R0, R0, D0'
+
+6.54.3.40 Set lanes in a vector
+...............................
+
+   * uint32x2_t vset_lane_u32 (uint32_t, uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 D0[0], R0'
+
+   * uint16x4_t vset_lane_u16 (uint16_t, uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.16 D0[0], R0'
+
+   * uint8x8_t vset_lane_u8 (uint8_t, uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.8 D0[0], R0'
+
+   * int32x2_t vset_lane_s32 (int32_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 D0[0], R0'
+
+   * int16x4_t vset_lane_s16 (int16_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.16 D0[0], R0'
+
+   * int8x8_t vset_lane_s8 (int8_t, int8x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.8 D0[0], R0'
+
+   * float32x2_t vset_lane_f32 (float32_t, float32x2_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 D0[0], R0'
+
+   * poly16x4_t vset_lane_p16 (poly16_t, poly16x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.16 D0[0], R0'
+
+   * poly8x8_t vset_lane_p8 (poly8_t, poly8x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.8 D0[0], R0'
+
+   * uint64x1_t vset_lane_u64 (uint64_t, uint64x1_t, const int)
+
+   * int64x1_t vset_lane_s64 (int64_t, int64x1_t, const int)
+
+   * uint32x4_t vsetq_lane_u32 (uint32_t, uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 D0[0], R0'
+
+   * uint16x8_t vsetq_lane_u16 (uint16_t, uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.16 D0[0], R0'
+
+   * uint8x16_t vsetq_lane_u8 (uint8_t, uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vmov.8 D0[0], R0'
+
+   * int32x4_t vsetq_lane_s32 (int32_t, int32x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 D0[0], R0'
+
+   * int16x8_t vsetq_lane_s16 (int16_t, int16x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.16 D0[0], R0'
+
+   * int8x16_t vsetq_lane_s8 (int8_t, int8x16_t, const int)
+     _Form of expected instruction(s):_ `vmov.8 D0[0], R0'
+
+   * float32x4_t vsetq_lane_f32 (float32_t, float32x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 D0[0], R0'
+
+   * poly16x8_t vsetq_lane_p16 (poly16_t, poly16x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.16 D0[0], R0'
+
+   * poly8x16_t vsetq_lane_p8 (poly8_t, poly8x16_t, const int)
+     _Form of expected instruction(s):_ `vmov.8 D0[0], R0'
+
+   * uint64x2_t vsetq_lane_u64 (uint64_t, uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vmov D0, R0, R0'
+
+   * int64x2_t vsetq_lane_s64 (int64_t, int64x2_t, const int)
+     _Form of expected instruction(s):_ `vmov D0, R0, R0'
+
+6.54.3.41 Create vector from literal bit pattern
+................................................
+
+   * uint32x2_t vcreate_u32 (uint64_t)
+
+   * uint16x4_t vcreate_u16 (uint64_t)
+
+   * uint8x8_t vcreate_u8 (uint64_t)
+
+   * int32x2_t vcreate_s32 (uint64_t)
+
+   * int16x4_t vcreate_s16 (uint64_t)
+
+   * int8x8_t vcreate_s8 (uint64_t)
+
+   * uint64x1_t vcreate_u64 (uint64_t)
+
+   * int64x1_t vcreate_s64 (uint64_t)
+
+   * float32x2_t vcreate_f32 (uint64_t)
+
+   * poly16x4_t vcreate_p16 (uint64_t)
+
+   * poly8x8_t vcreate_p8 (uint64_t)
+
+6.54.3.42 Set all lanes to the same value
+.........................................
+
+   * uint32x2_t vdup_n_u32 (uint32_t)
+     _Form of expected instruction(s):_ `vdup.32 D0, R0'
+
+   * uint16x4_t vdup_n_u16 (uint16_t)
+     _Form of expected instruction(s):_ `vdup.16 D0, R0'
+
+   * uint8x8_t vdup_n_u8 (uint8_t)
+     _Form of expected instruction(s):_ `vdup.8 D0, R0'
+
+   * int32x2_t vdup_n_s32 (int32_t)
+     _Form of expected instruction(s):_ `vdup.32 D0, R0'
+
+   * int16x4_t vdup_n_s16 (int16_t)
+     _Form of expected instruction(s):_ `vdup.16 D0, R0'
+
+   * int8x8_t vdup_n_s8 (int8_t)
+     _Form of expected instruction(s):_ `vdup.8 D0, R0'
+
+   * float32x2_t vdup_n_f32 (float32_t)
+     _Form of expected instruction(s):_ `vdup.32 D0, R0'
+
+   * poly16x4_t vdup_n_p16 (poly16_t)
+     _Form of expected instruction(s):_ `vdup.16 D0, R0'
+
+   * poly8x8_t vdup_n_p8 (poly8_t)
+     _Form of expected instruction(s):_ `vdup.8 D0, R0'
+
+   * uint64x1_t vdup_n_u64 (uint64_t)
+
+   * int64x1_t vdup_n_s64 (int64_t)
+
+   * uint32x4_t vdupq_n_u32 (uint32_t)
+     _Form of expected instruction(s):_ `vdup.32 Q0, R0'
+
+   * uint16x8_t vdupq_n_u16 (uint16_t)
+     _Form of expected instruction(s):_ `vdup.16 Q0, R0'
+
+   * uint8x16_t vdupq_n_u8 (uint8_t)
+     _Form of expected instruction(s):_ `vdup.8 Q0, R0'
+
+   * int32x4_t vdupq_n_s32 (int32_t)
+     _Form of expected instruction(s):_ `vdup.32 Q0, R0'
+
+   * int16x8_t vdupq_n_s16 (int16_t)
+     _Form of expected instruction(s):_ `vdup.16 Q0, R0'
+
+   * int8x16_t vdupq_n_s8 (int8_t)
+     _Form of expected instruction(s):_ `vdup.8 Q0, R0'
+
+   * float32x4_t vdupq_n_f32 (float32_t)
+     _Form of expected instruction(s):_ `vdup.32 Q0, R0'
+
+   * poly16x8_t vdupq_n_p16 (poly16_t)
+     _Form of expected instruction(s):_ `vdup.16 Q0, R0'
+
+   * poly8x16_t vdupq_n_p8 (poly8_t)
+     _Form of expected instruction(s):_ `vdup.8 Q0, R0'
+
+   * uint64x2_t vdupq_n_u64 (uint64_t)
+
+   * int64x2_t vdupq_n_s64 (int64_t)
+
+   * uint32x2_t vmov_n_u32 (uint32_t)
+     _Form of expected instruction(s):_ `vdup.32 D0, R0'
+
+   * uint16x4_t vmov_n_u16 (uint16_t)
+     _Form of expected instruction(s):_ `vdup.16 D0, R0'
+
+   * uint8x8_t vmov_n_u8 (uint8_t)
+     _Form of expected instruction(s):_ `vdup.8 D0, R0'
+
+   * int32x2_t vmov_n_s32 (int32_t)
+     _Form of expected instruction(s):_ `vdup.32 D0, R0'
+
+   * int16x4_t vmov_n_s16 (int16_t)
+     _Form of expected instruction(s):_ `vdup.16 D0, R0'
+
+   * int8x8_t vmov_n_s8 (int8_t)
+     _Form of expected instruction(s):_ `vdup.8 D0, R0'
+
+   * float32x2_t vmov_n_f32 (float32_t)
+     _Form of expected instruction(s):_ `vdup.32 D0, R0'
+
+   * poly16x4_t vmov_n_p16 (poly16_t)
+     _Form of expected instruction(s):_ `vdup.16 D0, R0'
+
+   * poly8x8_t vmov_n_p8 (poly8_t)
+     _Form of expected instruction(s):_ `vdup.8 D0, R0'
+
+   * uint64x1_t vmov_n_u64 (uint64_t)
+
+   * int64x1_t vmov_n_s64 (int64_t)
+
+   * uint32x4_t vmovq_n_u32 (uint32_t)
+     _Form of expected instruction(s):_ `vdup.32 Q0, R0'
+
+   * uint16x8_t vmovq_n_u16 (uint16_t)
+     _Form of expected instruction(s):_ `vdup.16 Q0, R0'
+
+   * uint8x16_t vmovq_n_u8 (uint8_t)
+     _Form of expected instruction(s):_ `vdup.8 Q0, R0'
+
+   * int32x4_t vmovq_n_s32 (int32_t)
+     _Form of expected instruction(s):_ `vdup.32 Q0, R0'
+
+   * int16x8_t vmovq_n_s16 (int16_t)
+     _Form of expected instruction(s):_ `vdup.16 Q0, R0'
+
+   * int8x16_t vmovq_n_s8 (int8_t)
+     _Form of expected instruction(s):_ `vdup.8 Q0, R0'
+
+   * float32x4_t vmovq_n_f32 (float32_t)
+     _Form of expected instruction(s):_ `vdup.32 Q0, R0'
+
+   * poly16x8_t vmovq_n_p16 (poly16_t)
+     _Form of expected instruction(s):_ `vdup.16 Q0, R0'
+
+   * poly8x16_t vmovq_n_p8 (poly8_t)
+     _Form of expected instruction(s):_ `vdup.8 Q0, R0'
+
+   * uint64x2_t vmovq_n_u64 (uint64_t)
+
+   * int64x2_t vmovq_n_s64 (int64_t)
+
+   * uint32x2_t vdup_lane_u32 (uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vdup.32 D0, D0[0]'
+
+   * uint16x4_t vdup_lane_u16 (uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vdup.16 D0, D0[0]'
+
+   * uint8x8_t vdup_lane_u8 (uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vdup.8 D0, D0[0]'
+
+   * int32x2_t vdup_lane_s32 (int32x2_t, const int)
+     _Form of expected instruction(s):_ `vdup.32 D0, D0[0]'
+
+   * int16x4_t vdup_lane_s16 (int16x4_t, const int)
+     _Form of expected instruction(s):_ `vdup.16 D0, D0[0]'
+
+   * int8x8_t vdup_lane_s8 (int8x8_t, const int)
+     _Form of expected instruction(s):_ `vdup.8 D0, D0[0]'
+
+   * float32x2_t vdup_lane_f32 (float32x2_t, const int)
+     _Form of expected instruction(s):_ `vdup.32 D0, D0[0]'
+
+   * poly16x4_t vdup_lane_p16 (poly16x4_t, const int)
+     _Form of expected instruction(s):_ `vdup.16 D0, D0[0]'
+
+   * poly8x8_t vdup_lane_p8 (poly8x8_t, const int)
+     _Form of expected instruction(s):_ `vdup.8 D0, D0[0]'
+
+   * uint64x1_t vdup_lane_u64 (uint64x1_t, const int)
+
+   * int64x1_t vdup_lane_s64 (int64x1_t, const int)
+
+   * uint32x4_t vdupq_lane_u32 (uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vdup.32 Q0, D0[0]'
+
+   * uint16x8_t vdupq_lane_u16 (uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vdup.16 Q0, D0[0]'
+
+   * uint8x16_t vdupq_lane_u8 (uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vdup.8 Q0, D0[0]'
+
+   * int32x4_t vdupq_lane_s32 (int32x2_t, const int)
+     _Form of expected instruction(s):_ `vdup.32 Q0, D0[0]'
+
+   * int16x8_t vdupq_lane_s16 (int16x4_t, const int)
+     _Form of expected instruction(s):_ `vdup.16 Q0, D0[0]'
+
+   * int8x16_t vdupq_lane_s8 (int8x8_t, const int)
+     _Form of expected instruction(s):_ `vdup.8 Q0, D0[0]'
+
+   * float32x4_t vdupq_lane_f32 (float32x2_t, const int)
+     _Form of expected instruction(s):_ `vdup.32 Q0, D0[0]'
+
+   * poly16x8_t vdupq_lane_p16 (poly16x4_t, const int)
+     _Form of expected instruction(s):_ `vdup.16 Q0, D0[0]'
+
+   * poly8x16_t vdupq_lane_p8 (poly8x8_t, const int)
+     _Form of expected instruction(s):_ `vdup.8 Q0, D0[0]'
+
+   * uint64x2_t vdupq_lane_u64 (uint64x1_t, const int)
+
+   * int64x2_t vdupq_lane_s64 (int64x1_t, const int)
+
+6.54.3.43 Combining vectors
+...........................
+
+   * uint32x4_t vcombine_u32 (uint32x2_t, uint32x2_t)
+
+   * uint16x8_t vcombine_u16 (uint16x4_t, uint16x4_t)
+
+   * uint8x16_t vcombine_u8 (uint8x8_t, uint8x8_t)
+
+   * int32x4_t vcombine_s32 (int32x2_t, int32x2_t)
+
+   * int16x8_t vcombine_s16 (int16x4_t, int16x4_t)
+
+   * int8x16_t vcombine_s8 (int8x8_t, int8x8_t)
+
+   * uint64x2_t vcombine_u64 (uint64x1_t, uint64x1_t)
+
+   * int64x2_t vcombine_s64 (int64x1_t, int64x1_t)
+
+   * float32x4_t vcombine_f32 (float32x2_t, float32x2_t)
+
+   * poly16x8_t vcombine_p16 (poly16x4_t, poly16x4_t)
+
+   * poly8x16_t vcombine_p8 (poly8x8_t, poly8x8_t)
+
+6.54.3.44 Splitting vectors
+...........................
+
+   * uint32x2_t vget_high_u32 (uint32x4_t)
+
+   * uint16x4_t vget_high_u16 (uint16x8_t)
+
+   * uint8x8_t vget_high_u8 (uint8x16_t)
+
+   * int32x2_t vget_high_s32 (int32x4_t)
+
+   * int16x4_t vget_high_s16 (int16x8_t)
+
+   * int8x8_t vget_high_s8 (int8x16_t)
+
+   * uint64x1_t vget_high_u64 (uint64x2_t)
+
+   * int64x1_t vget_high_s64 (int64x2_t)
+
+   * float32x2_t vget_high_f32 (float32x4_t)
+
+   * poly16x4_t vget_high_p16 (poly16x8_t)
+
+   * poly8x8_t vget_high_p8 (poly8x16_t)
+
+   * uint32x2_t vget_low_u32 (uint32x4_t)
+     _Form of expected instruction(s):_ `vmov D0, D0'
+
+   * uint16x4_t vget_low_u16 (uint16x8_t)
+     _Form of expected instruction(s):_ `vmov D0, D0'
+
+   * uint8x8_t vget_low_u8 (uint8x16_t)
+     _Form of expected instruction(s):_ `vmov D0, D0'
+
+   * int32x2_t vget_low_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vmov D0, D0'
+
+   * int16x4_t vget_low_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vmov D0, D0'
+
+   * int8x8_t vget_low_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vmov D0, D0'
+
+   * float32x2_t vget_low_f32 (float32x4_t)
+     _Form of expected instruction(s):_ `vmov D0, D0'
+
+   * poly16x4_t vget_low_p16 (poly16x8_t)
+     _Form of expected instruction(s):_ `vmov D0, D0'
+
+   * poly8x8_t vget_low_p8 (poly8x16_t)
+     _Form of expected instruction(s):_ `vmov D0, D0'
+
+   * uint64x1_t vget_low_u64 (uint64x2_t)
+
+   * int64x1_t vget_low_s64 (int64x2_t)
+
+6.54.3.45 Conversions
+.....................
+
+   * float32x2_t vcvt_f32_u32 (uint32x2_t)
+     _Form of expected instruction(s):_ `vcvt.f32.u32 D0, D0'
+
+   * float32x2_t vcvt_f32_s32 (int32x2_t)
+     _Form of expected instruction(s):_ `vcvt.f32.s32 D0, D0'
+
+   * uint32x2_t vcvt_u32_f32 (float32x2_t)
+     _Form of expected instruction(s):_ `vcvt.u32.f32 D0, D0'
+
+   * int32x2_t vcvt_s32_f32 (float32x2_t)
+     _Form of expected instruction(s):_ `vcvt.s32.f32 D0, D0'
+
+   * float32x4_t vcvtq_f32_u32 (uint32x4_t)
+     _Form of expected instruction(s):_ `vcvt.f32.u32 Q0, Q0'
+
+   * float32x4_t vcvtq_f32_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vcvt.f32.s32 Q0, Q0'
+
+   * uint32x4_t vcvtq_u32_f32 (float32x4_t)
+     _Form of expected instruction(s):_ `vcvt.u32.f32 Q0, Q0'
+
+   * int32x4_t vcvtq_s32_f32 (float32x4_t)
+     _Form of expected instruction(s):_ `vcvt.s32.f32 Q0, Q0'
+
+   * float32x2_t vcvt_n_f32_u32 (uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vcvt.f32.u32 D0, D0, #0'
+
+   * float32x2_t vcvt_n_f32_s32 (int32x2_t, const int)
+     _Form of expected instruction(s):_ `vcvt.f32.s32 D0, D0, #0'
+
+   * uint32x2_t vcvt_n_u32_f32 (float32x2_t, const int)
+     _Form of expected instruction(s):_ `vcvt.u32.f32 D0, D0, #0'
+
+   * int32x2_t vcvt_n_s32_f32 (float32x2_t, const int)
+     _Form of expected instruction(s):_ `vcvt.s32.f32 D0, D0, #0'
+
+   * float32x4_t vcvtq_n_f32_u32 (uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vcvt.f32.u32 Q0, Q0, #0'
+
+   * float32x4_t vcvtq_n_f32_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vcvt.f32.s32 Q0, Q0, #0'
+
+   * uint32x4_t vcvtq_n_u32_f32 (float32x4_t, const int)
+     _Form of expected instruction(s):_ `vcvt.u32.f32 Q0, Q0, #0'
+
+   * int32x4_t vcvtq_n_s32_f32 (float32x4_t, const int)
+     _Form of expected instruction(s):_ `vcvt.s32.f32 Q0, Q0, #0'
+
+6.54.3.46 Move, single_opcode narrowing
+.......................................
+
+   * uint32x2_t vmovn_u64 (uint64x2_t)
+     _Form of expected instruction(s):_ `vmovn.i64 D0, Q0'
+
+   * uint16x4_t vmovn_u32 (uint32x4_t)
+     _Form of expected instruction(s):_ `vmovn.i32 D0, Q0'
+
+   * uint8x8_t vmovn_u16 (uint16x8_t)
+     _Form of expected instruction(s):_ `vmovn.i16 D0, Q0'
+
+   * int32x2_t vmovn_s64 (int64x2_t)
+     _Form of expected instruction(s):_ `vmovn.i64 D0, Q0'
+
+   * int16x4_t vmovn_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vmovn.i32 D0, Q0'
+
+   * int8x8_t vmovn_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vmovn.i16 D0, Q0'
+
+   * uint32x2_t vqmovn_u64 (uint64x2_t)
+     _Form of expected instruction(s):_ `vqmovn.u64 D0, Q0'
+
+   * uint16x4_t vqmovn_u32 (uint32x4_t)
+     _Form of expected instruction(s):_ `vqmovn.u32 D0, Q0'
+
+   * uint8x8_t vqmovn_u16 (uint16x8_t)
+     _Form of expected instruction(s):_ `vqmovn.u16 D0, Q0'
+
+   * int32x2_t vqmovn_s64 (int64x2_t)
+     _Form of expected instruction(s):_ `vqmovn.s64 D0, Q0'
+
+   * int16x4_t vqmovn_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vqmovn.s32 D0, Q0'
+
+   * int8x8_t vqmovn_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vqmovn.s16 D0, Q0'
+
+   * uint32x2_t vqmovun_s64 (int64x2_t)
+     _Form of expected instruction(s):_ `vqmovun.s64 D0, Q0'
+
+   * uint16x4_t vqmovun_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vqmovun.s32 D0, Q0'
+
+   * uint8x8_t vqmovun_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vqmovun.s16 D0, Q0'
+
+6.54.3.47 Move, single_opcode long
+..................................
+
+   * uint64x2_t vmovl_u32 (uint32x2_t)
+     _Form of expected instruction(s):_ `vmovl.u32 Q0, D0'
+
+   * uint32x4_t vmovl_u16 (uint16x4_t)
+     _Form of expected instruction(s):_ `vmovl.u16 Q0, D0'
+
+   * uint16x8_t vmovl_u8 (uint8x8_t)
+     _Form of expected instruction(s):_ `vmovl.u8 Q0, D0'
+
+   * int64x2_t vmovl_s32 (int32x2_t)
+     _Form of expected instruction(s):_ `vmovl.s32 Q0, D0'
+
+   * int32x4_t vmovl_s16 (int16x4_t)
+     _Form of expected instruction(s):_ `vmovl.s16 Q0, D0'
+
+   * int16x8_t vmovl_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vmovl.s8 Q0, D0'
+
+6.54.3.48 Table lookup
+......................
+
+   * poly8x8_t vtbl1_p8 (poly8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0}, D0'
+
+   * int8x8_t vtbl1_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0}, D0'
+
+   * uint8x8_t vtbl1_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0}, D0'
+
+   * poly8x8_t vtbl2_p8 (poly8x8x2_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0, D1}, D0'
+
+   * int8x8_t vtbl2_s8 (int8x8x2_t, int8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0, D1}, D0'
+
+   * uint8x8_t vtbl2_u8 (uint8x8x2_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0, D1}, D0'
+
+   * poly8x8_t vtbl3_p8 (poly8x8x3_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0, D1, D2}, D0'
+
+   * int8x8_t vtbl3_s8 (int8x8x3_t, int8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0, D1, D2}, D0'
+
+   * uint8x8_t vtbl3_u8 (uint8x8x3_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0, D1, D2}, D0'
+
+   * poly8x8_t vtbl4_p8 (poly8x8x4_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0, D1, D2, D3},
+     D0'
+
+   * int8x8_t vtbl4_s8 (int8x8x4_t, int8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0, D1, D2, D3},
+     D0'
+
+   * uint8x8_t vtbl4_u8 (uint8x8x4_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0, D1, D2, D3},
+     D0'
+
+6.54.3.49 Extended table lookup
+...............................
+
+   * poly8x8_t vtbx1_p8 (poly8x8_t, poly8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0}, D0'
+
+   * int8x8_t vtbx1_s8 (int8x8_t, int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0}, D0'
+
+   * uint8x8_t vtbx1_u8 (uint8x8_t, uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0}, D0'
+
+   * poly8x8_t vtbx2_p8 (poly8x8_t, poly8x8x2_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0, D1}, D0'
+
+   * int8x8_t vtbx2_s8 (int8x8_t, int8x8x2_t, int8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0, D1}, D0'
+
+   * uint8x8_t vtbx2_u8 (uint8x8_t, uint8x8x2_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0, D1}, D0'
+
+   * poly8x8_t vtbx3_p8 (poly8x8_t, poly8x8x3_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0, D1, D2}, D0'
+
+   * int8x8_t vtbx3_s8 (int8x8_t, int8x8x3_t, int8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0, D1, D2}, D0'
+
+   * uint8x8_t vtbx3_u8 (uint8x8_t, uint8x8x3_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0, D1, D2}, D0'
+
+   * poly8x8_t vtbx4_p8 (poly8x8_t, poly8x8x4_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0, D1, D2, D3},
+     D0'
+
+   * int8x8_t vtbx4_s8 (int8x8_t, int8x8x4_t, int8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0, D1, D2, D3},
+     D0'
+
+   * uint8x8_t vtbx4_u8 (uint8x8_t, uint8x8x4_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0, D1, D2, D3},
+     D0'
+
+6.54.3.50 Multiply, lane
+........................
+
+   * float32x2_t vmul_lane_f32 (float32x2_t, float32x2_t, const int)
+     _Form of expected instruction(s):_ `vmul.f32 D0, D0, D0[0]'
+
+   * uint32x2_t vmul_lane_u32 (uint32x2_t, uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vmul.i32 D0, D0, D0[0]'
+
+   * uint16x4_t vmul_lane_u16 (uint16x4_t, uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vmul.i16 D0, D0, D0[0]'
+
+   * int32x2_t vmul_lane_s32 (int32x2_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vmul.i32 D0, D0, D0[0]'
+
+   * int16x4_t vmul_lane_s16 (int16x4_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vmul.i16 D0, D0, D0[0]'
+
+   * float32x4_t vmulq_lane_f32 (float32x4_t, float32x2_t, const int)
+     _Form of expected instruction(s):_ `vmul.f32 Q0, Q0, D0[0]'
+
+   * uint32x4_t vmulq_lane_u32 (uint32x4_t, uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vmul.i32 Q0, Q0, D0[0]'
+
+   * uint16x8_t vmulq_lane_u16 (uint16x8_t, uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vmul.i16 Q0, Q0, D0[0]'
+
+   * int32x4_t vmulq_lane_s32 (int32x4_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vmul.i32 Q0, Q0, D0[0]'
+
+   * int16x8_t vmulq_lane_s16 (int16x8_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vmul.i16 Q0, Q0, D0[0]'
+
+6.54.3.51 Long multiply, lane
+.............................
+
+   * uint64x2_t vmull_lane_u32 (uint32x2_t, uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vmull.u32 Q0, D0, D0[0]'
+
+   * uint32x4_t vmull_lane_u16 (uint16x4_t, uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vmull.u16 Q0, D0, D0[0]'
+
+   * int64x2_t vmull_lane_s32 (int32x2_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vmull.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vmull_lane_s16 (int16x4_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vmull.s16 Q0, D0, D0[0]'
+
+6.54.3.52 Saturating doubling long multiply, lane
+.................................................
+
+   * int64x2_t vqdmull_lane_s32 (int32x2_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vqdmull.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vqdmull_lane_s16 (int16x4_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vqdmull.s16 Q0, D0, D0[0]'
+
+6.54.3.53 Saturating doubling multiply high, lane
+.................................................
+
+   * int32x4_t vqdmulhq_lane_s32 (int32x4_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vqdmulh.s32 Q0, Q0, D0[0]'
+
+   * int16x8_t vqdmulhq_lane_s16 (int16x8_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vqdmulh.s16 Q0, Q0, D0[0]'
+
+   * int32x2_t vqdmulh_lane_s32 (int32x2_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vqdmulh.s32 D0, D0, D0[0]'
+
+   * int16x4_t vqdmulh_lane_s16 (int16x4_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vqdmulh.s16 D0, D0, D0[0]'
+
+   * int32x4_t vqrdmulhq_lane_s32 (int32x4_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vqrdmulh.s32 Q0, Q0, D0[0]'
+
+   * int16x8_t vqrdmulhq_lane_s16 (int16x8_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vqrdmulh.s16 Q0, Q0, D0[0]'
+
+   * int32x2_t vqrdmulh_lane_s32 (int32x2_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vqrdmulh.s32 D0, D0, D0[0]'
+
+   * int16x4_t vqrdmulh_lane_s16 (int16x4_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vqrdmulh.s16 D0, D0, D0[0]'
+
+6.54.3.54 Multiply-accumulate, lane
+...................................
+
+   * float32x2_t vmla_lane_f32 (float32x2_t, float32x2_t, float32x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vmla.f32 D0, D0, D0[0]'
+
+   * uint32x2_t vmla_lane_u32 (uint32x2_t, uint32x2_t, uint32x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vmla.i32 D0, D0, D0[0]'
+
+   * uint16x4_t vmla_lane_u16 (uint16x4_t, uint16x4_t, uint16x4_t,
+     const int)
+     _Form of expected instruction(s):_ `vmla.i16 D0, D0, D0[0]'
+
+   * int32x2_t vmla_lane_s32 (int32x2_t, int32x2_t, int32x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vmla.i32 D0, D0, D0[0]'
+
+   * int16x4_t vmla_lane_s16 (int16x4_t, int16x4_t, int16x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vmla.i16 D0, D0, D0[0]'
+
+   * float32x4_t vmlaq_lane_f32 (float32x4_t, float32x4_t, float32x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vmla.f32 Q0, Q0, D0[0]'
+
+   * uint32x4_t vmlaq_lane_u32 (uint32x4_t, uint32x4_t, uint32x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vmla.i32 Q0, Q0, D0[0]'
+
+   * uint16x8_t vmlaq_lane_u16 (uint16x8_t, uint16x8_t, uint16x4_t,
+     const int)
+     _Form of expected instruction(s):_ `vmla.i16 Q0, Q0, D0[0]'
+
+   * int32x4_t vmlaq_lane_s32 (int32x4_t, int32x4_t, int32x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vmla.i32 Q0, Q0, D0[0]'
+
+   * int16x8_t vmlaq_lane_s16 (int16x8_t, int16x8_t, int16x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vmla.i16 Q0, Q0, D0[0]'
+
+   * uint64x2_t vmlal_lane_u32 (uint64x2_t, uint32x2_t, uint32x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vmlal.u32 Q0, D0, D0[0]'
+
+   * uint32x4_t vmlal_lane_u16 (uint32x4_t, uint16x4_t, uint16x4_t,
+     const int)
+     _Form of expected instruction(s):_ `vmlal.u16 Q0, D0, D0[0]'
+
+   * int64x2_t vmlal_lane_s32 (int64x2_t, int32x2_t, int32x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vmlal.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vmlal_lane_s16 (int32x4_t, int16x4_t, int16x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vmlal.s16 Q0, D0, D0[0]'
+
+   * int64x2_t vqdmlal_lane_s32 (int64x2_t, int32x2_t, int32x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vqdmlal.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vqdmlal_lane_s16 (int32x4_t, int16x4_t, int16x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vqdmlal.s16 Q0, D0, D0[0]'
+
+6.54.3.55 Multiply-subtract, lane
+.................................
+
+   * float32x2_t vmls_lane_f32 (float32x2_t, float32x2_t, float32x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vmls.f32 D0, D0, D0[0]'
+
+   * uint32x2_t vmls_lane_u32 (uint32x2_t, uint32x2_t, uint32x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vmls.i32 D0, D0, D0[0]'
+
+   * uint16x4_t vmls_lane_u16 (uint16x4_t, uint16x4_t, uint16x4_t,
+     const int)
+     _Form of expected instruction(s):_ `vmls.i16 D0, D0, D0[0]'
+
+   * int32x2_t vmls_lane_s32 (int32x2_t, int32x2_t, int32x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vmls.i32 D0, D0, D0[0]'
+
+   * int16x4_t vmls_lane_s16 (int16x4_t, int16x4_t, int16x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vmls.i16 D0, D0, D0[0]'
+
+   * float32x4_t vmlsq_lane_f32 (float32x4_t, float32x4_t, float32x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vmls.f32 Q0, Q0, D0[0]'
+
+   * uint32x4_t vmlsq_lane_u32 (uint32x4_t, uint32x4_t, uint32x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vmls.i32 Q0, Q0, D0[0]'
+
+   * uint16x8_t vmlsq_lane_u16 (uint16x8_t, uint16x8_t, uint16x4_t,
+     const int)
+     _Form of expected instruction(s):_ `vmls.i16 Q0, Q0, D0[0]'
+
+   * int32x4_t vmlsq_lane_s32 (int32x4_t, int32x4_t, int32x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vmls.i32 Q0, Q0, D0[0]'
+
+   * int16x8_t vmlsq_lane_s16 (int16x8_t, int16x8_t, int16x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vmls.i16 Q0, Q0, D0[0]'
+
+   * uint64x2_t vmlsl_lane_u32 (uint64x2_t, uint32x2_t, uint32x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vmlsl.u32 Q0, D0, D0[0]'
+
+   * uint32x4_t vmlsl_lane_u16 (uint32x4_t, uint16x4_t, uint16x4_t,
+     const int)
+     _Form of expected instruction(s):_ `vmlsl.u16 Q0, D0, D0[0]'
+
+   * int64x2_t vmlsl_lane_s32 (int64x2_t, int32x2_t, int32x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vmlsl.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vmlsl_lane_s16 (int32x4_t, int16x4_t, int16x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vmlsl.s16 Q0, D0, D0[0]'
+
+   * int64x2_t vqdmlsl_lane_s32 (int64x2_t, int32x2_t, int32x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vqdmlsl.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vqdmlsl_lane_s16 (int32x4_t, int16x4_t, int16x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vqdmlsl.s16 Q0, D0, D0[0]'
+
+6.54.3.56 Vector multiply by scalar
+...................................
+
+   * float32x2_t vmul_n_f32 (float32x2_t, float32_t)
+     _Form of expected instruction(s):_ `vmul.f32 D0, D0, D0[0]'
+
+   * uint32x2_t vmul_n_u32 (uint32x2_t, uint32_t)
+     _Form of expected instruction(s):_ `vmul.i32 D0, D0, D0[0]'
+
+   * uint16x4_t vmul_n_u16 (uint16x4_t, uint16_t)
+     _Form of expected instruction(s):_ `vmul.i16 D0, D0, D0[0]'
+
+   * int32x2_t vmul_n_s32 (int32x2_t, int32_t)
+     _Form of expected instruction(s):_ `vmul.i32 D0, D0, D0[0]'
+
+   * int16x4_t vmul_n_s16 (int16x4_t, int16_t)
+     _Form of expected instruction(s):_ `vmul.i16 D0, D0, D0[0]'
+
+   * float32x4_t vmulq_n_f32 (float32x4_t, float32_t)
+     _Form of expected instruction(s):_ `vmul.f32 Q0, Q0, D0[0]'
+
+   * uint32x4_t vmulq_n_u32 (uint32x4_t, uint32_t)
+     _Form of expected instruction(s):_ `vmul.i32 Q0, Q0, D0[0]'
+
+   * uint16x8_t vmulq_n_u16 (uint16x8_t, uint16_t)
+     _Form of expected instruction(s):_ `vmul.i16 Q0, Q0, D0[0]'
+
+   * int32x4_t vmulq_n_s32 (int32x4_t, int32_t)
+     _Form of expected instruction(s):_ `vmul.i32 Q0, Q0, D0[0]'
+
+   * int16x8_t vmulq_n_s16 (int16x8_t, int16_t)
+     _Form of expected instruction(s):_ `vmul.i16 Q0, Q0, D0[0]'
+
+6.54.3.57 Vector long multiply by scalar
+........................................
+
+   * uint64x2_t vmull_n_u32 (uint32x2_t, uint32_t)
+     _Form of expected instruction(s):_ `vmull.u32 Q0, D0, D0[0]'
+
+   * uint32x4_t vmull_n_u16 (uint16x4_t, uint16_t)
+     _Form of expected instruction(s):_ `vmull.u16 Q0, D0, D0[0]'
+
+   * int64x2_t vmull_n_s32 (int32x2_t, int32_t)
+     _Form of expected instruction(s):_ `vmull.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vmull_n_s16 (int16x4_t, int16_t)
+     _Form of expected instruction(s):_ `vmull.s16 Q0, D0, D0[0]'
+
+6.54.3.58 Vector saturating doubling long multiply by scalar
+............................................................
+
+   * int64x2_t vqdmull_n_s32 (int32x2_t, int32_t)
+     _Form of expected instruction(s):_ `vqdmull.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vqdmull_n_s16 (int16x4_t, int16_t)
+     _Form of expected instruction(s):_ `vqdmull.s16 Q0, D0, D0[0]'
+
+6.54.3.59 Vector saturating doubling multiply high by scalar
+............................................................
+
+   * int32x4_t vqdmulhq_n_s32 (int32x4_t, int32_t)
+     _Form of expected instruction(s):_ `vqdmulh.s32 Q0, Q0, D0[0]'
+
+   * int16x8_t vqdmulhq_n_s16 (int16x8_t, int16_t)
+     _Form of expected instruction(s):_ `vqdmulh.s16 Q0, Q0, D0[0]'
+
+   * int32x2_t vqdmulh_n_s32 (int32x2_t, int32_t)
+     _Form of expected instruction(s):_ `vqdmulh.s32 D0, D0, D0[0]'
+
+   * int16x4_t vqdmulh_n_s16 (int16x4_t, int16_t)
+     _Form of expected instruction(s):_ `vqdmulh.s16 D0, D0, D0[0]'
+
+   * int32x4_t vqrdmulhq_n_s32 (int32x4_t, int32_t)
+     _Form of expected instruction(s):_ `vqrdmulh.s32 Q0, Q0, D0[0]'
+
+   * int16x8_t vqrdmulhq_n_s16 (int16x8_t, int16_t)
+     _Form of expected instruction(s):_ `vqrdmulh.s16 Q0, Q0, D0[0]'
+
+   * int32x2_t vqrdmulh_n_s32 (int32x2_t, int32_t)
+     _Form of expected instruction(s):_ `vqrdmulh.s32 D0, D0, D0[0]'
+
+   * int16x4_t vqrdmulh_n_s16 (int16x4_t, int16_t)
+     _Form of expected instruction(s):_ `vqrdmulh.s16 D0, D0, D0[0]'
+
+6.54.3.60 Vector multiply-accumulate by scalar
+..............................................
+
+   * float32x2_t vmla_n_f32 (float32x2_t, float32x2_t, float32_t)
+     _Form of expected instruction(s):_ `vmla.f32 D0, D0, D0[0]'
+
+   * uint32x2_t vmla_n_u32 (uint32x2_t, uint32x2_t, uint32_t)
+     _Form of expected instruction(s):_ `vmla.i32 D0, D0, D0[0]'
+
+   * uint16x4_t vmla_n_u16 (uint16x4_t, uint16x4_t, uint16_t)
+     _Form of expected instruction(s):_ `vmla.i16 D0, D0, D0[0]'
+
+   * int32x2_t vmla_n_s32 (int32x2_t, int32x2_t, int32_t)
+     _Form of expected instruction(s):_ `vmla.i32 D0, D0, D0[0]'
+
+   * int16x4_t vmla_n_s16 (int16x4_t, int16x4_t, int16_t)
+     _Form of expected instruction(s):_ `vmla.i16 D0, D0, D0[0]'
+
+   * float32x4_t vmlaq_n_f32 (float32x4_t, float32x4_t, float32_t)
+     _Form of expected instruction(s):_ `vmla.f32 Q0, Q0, D0[0]'
+
+   * uint32x4_t vmlaq_n_u32 (uint32x4_t, uint32x4_t, uint32_t)
+     _Form of expected instruction(s):_ `vmla.i32 Q0, Q0, D0[0]'
+
+   * uint16x8_t vmlaq_n_u16 (uint16x8_t, uint16x8_t, uint16_t)
+     _Form of expected instruction(s):_ `vmla.i16 Q0, Q0, D0[0]'
+
+   * int32x4_t vmlaq_n_s32 (int32x4_t, int32x4_t, int32_t)
+     _Form of expected instruction(s):_ `vmla.i32 Q0, Q0, D0[0]'
+
+   * int16x8_t vmlaq_n_s16 (int16x8_t, int16x8_t, int16_t)
+     _Form of expected instruction(s):_ `vmla.i16 Q0, Q0, D0[0]'
+
+   * uint64x2_t vmlal_n_u32 (uint64x2_t, uint32x2_t, uint32_t)
+     _Form of expected instruction(s):_ `vmlal.u32 Q0, D0, D0[0]'
+
+   * uint32x4_t vmlal_n_u16 (uint32x4_t, uint16x4_t, uint16_t)
+     _Form of expected instruction(s):_ `vmlal.u16 Q0, D0, D0[0]'
+
+   * int64x2_t vmlal_n_s32 (int64x2_t, int32x2_t, int32_t)
+     _Form of expected instruction(s):_ `vmlal.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vmlal_n_s16 (int32x4_t, int16x4_t, int16_t)
+     _Form of expected instruction(s):_ `vmlal.s16 Q0, D0, D0[0]'
+
+   * int64x2_t vqdmlal_n_s32 (int64x2_t, int32x2_t, int32_t)
+     _Form of expected instruction(s):_ `vqdmlal.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vqdmlal_n_s16 (int32x4_t, int16x4_t, int16_t)
+     _Form of expected instruction(s):_ `vqdmlal.s16 Q0, D0, D0[0]'
+
+6.54.3.61 Vector multiply-subtract by scalar
+............................................
+
+   * float32x2_t vmls_n_f32 (float32x2_t, float32x2_t, float32_t)
+     _Form of expected instruction(s):_ `vmls.f32 D0, D0, D0[0]'
+
+   * uint32x2_t vmls_n_u32 (uint32x2_t, uint32x2_t, uint32_t)
+     _Form of expected instruction(s):_ `vmls.i32 D0, D0, D0[0]'
+
+   * uint16x4_t vmls_n_u16 (uint16x4_t, uint16x4_t, uint16_t)
+     _Form of expected instruction(s):_ `vmls.i16 D0, D0, D0[0]'
+
+   * int32x2_t vmls_n_s32 (int32x2_t, int32x2_t, int32_t)
+     _Form of expected instruction(s):_ `vmls.i32 D0, D0, D0[0]'
+
+   * int16x4_t vmls_n_s16 (int16x4_t, int16x4_t, int16_t)
+     _Form of expected instruction(s):_ `vmls.i16 D0, D0, D0[0]'
+
+   * float32x4_t vmlsq_n_f32 (float32x4_t, float32x4_t, float32_t)
+     _Form of expected instruction(s):_ `vmls.f32 Q0, Q0, D0[0]'
+
+   * uint32x4_t vmlsq_n_u32 (uint32x4_t, uint32x4_t, uint32_t)
+     _Form of expected instruction(s):_ `vmls.i32 Q0, Q0, D0[0]'
+
+   * uint16x8_t vmlsq_n_u16 (uint16x8_t, uint16x8_t, uint16_t)
+     _Form of expected instruction(s):_ `vmls.i16 Q0, Q0, D0[0]'
+
+   * int32x4_t vmlsq_n_s32 (int32x4_t, int32x4_t, int32_t)
+     _Form of expected instruction(s):_ `vmls.i32 Q0, Q0, D0[0]'
+
+   * int16x8_t vmlsq_n_s16 (int16x8_t, int16x8_t, int16_t)
+     _Form of expected instruction(s):_ `vmls.i16 Q0, Q0, D0[0]'
+
+   * uint64x2_t vmlsl_n_u32 (uint64x2_t, uint32x2_t, uint32_t)
+     _Form of expected instruction(s):_ `vmlsl.u32 Q0, D0, D0[0]'
+
+   * uint32x4_t vmlsl_n_u16 (uint32x4_t, uint16x4_t, uint16_t)
+     _Form of expected instruction(s):_ `vmlsl.u16 Q0, D0, D0[0]'
+
+   * int64x2_t vmlsl_n_s32 (int64x2_t, int32x2_t, int32_t)
+     _Form of expected instruction(s):_ `vmlsl.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vmlsl_n_s16 (int32x4_t, int16x4_t, int16_t)
+     _Form of expected instruction(s):_ `vmlsl.s16 Q0, D0, D0[0]'
+
+   * int64x2_t vqdmlsl_n_s32 (int64x2_t, int32x2_t, int32_t)
+     _Form of expected instruction(s):_ `vqdmlsl.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vqdmlsl_n_s16 (int32x4_t, int16x4_t, int16_t)
+     _Form of expected instruction(s):_ `vqdmlsl.s16 Q0, D0, D0[0]'
+
+6.54.3.62 Vector extract
+........................
+
+   * uint32x2_t vext_u32 (uint32x2_t, uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vext.32 D0, D0, D0, #0'
+
+   * uint16x4_t vext_u16 (uint16x4_t, uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vext.16 D0, D0, D0, #0'
+
+   * uint8x8_t vext_u8 (uint8x8_t, uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vext.8 D0, D0, D0, #0'
+
+   * int32x2_t vext_s32 (int32x2_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vext.32 D0, D0, D0, #0'
+
+   * int16x4_t vext_s16 (int16x4_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vext.16 D0, D0, D0, #0'
+
+   * int8x8_t vext_s8 (int8x8_t, int8x8_t, const int)
+     _Form of expected instruction(s):_ `vext.8 D0, D0, D0, #0'
+
+   * uint64x1_t vext_u64 (uint64x1_t, uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vext.64 D0, D0, D0, #0'
+
+   * int64x1_t vext_s64 (int64x1_t, int64x1_t, const int)
+     _Form of expected instruction(s):_ `vext.64 D0, D0, D0, #0'
+
+   * float32x2_t vext_f32 (float32x2_t, float32x2_t, const int)
+     _Form of expected instruction(s):_ `vext.32 D0, D0, D0, #0'
+
+   * poly16x4_t vext_p16 (poly16x4_t, poly16x4_t, const int)
+     _Form of expected instruction(s):_ `vext.16 D0, D0, D0, #0'
+
+   * poly8x8_t vext_p8 (poly8x8_t, poly8x8_t, const int)
+     _Form of expected instruction(s):_ `vext.8 D0, D0, D0, #0'
+
+   * uint32x4_t vextq_u32 (uint32x4_t, uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vext.32 Q0, Q0, Q0, #0'
+
+   * uint16x8_t vextq_u16 (uint16x8_t, uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vext.16 Q0, Q0, Q0, #0'
+
+   * uint8x16_t vextq_u8 (uint8x16_t, uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vext.8 Q0, Q0, Q0, #0'
+
+   * int32x4_t vextq_s32 (int32x4_t, int32x4_t, const int)
+     _Form of expected instruction(s):_ `vext.32 Q0, Q0, Q0, #0'
+
+   * int16x8_t vextq_s16 (int16x8_t, int16x8_t, const int)
+     _Form of expected instruction(s):_ `vext.16 Q0, Q0, Q0, #0'
+
+   * int8x16_t vextq_s8 (int8x16_t, int8x16_t, const int)
+     _Form of expected instruction(s):_ `vext.8 Q0, Q0, Q0, #0'
+
+   * uint64x2_t vextq_u64 (uint64x2_t, uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vext.64 Q0, Q0, Q0, #0'
+
+   * int64x2_t vextq_s64 (int64x2_t, int64x2_t, const int)
+     _Form of expected instruction(s):_ `vext.64 Q0, Q0, Q0, #0'
+
+   * float32x4_t vextq_f32 (float32x4_t, float32x4_t, const int)
+     _Form of expected instruction(s):_ `vext.32 Q0, Q0, Q0, #0'
+
+   * poly16x8_t vextq_p16 (poly16x8_t, poly16x8_t, const int)
+     _Form of expected instruction(s):_ `vext.16 Q0, Q0, Q0, #0'
+
+   * poly8x16_t vextq_p8 (poly8x16_t, poly8x16_t, const int)
+     _Form of expected instruction(s):_ `vext.8 Q0, Q0, Q0, #0'
+
+6.54.3.63 Reverse elements
+..........................
+
+   * uint32x2_t vrev64_u32 (uint32x2_t)
+     _Form of expected instruction(s):_ `vrev64.32 D0, D0'
+
+   * uint16x4_t vrev64_u16 (uint16x4_t)
+     _Form of expected instruction(s):_ `vrev64.16 D0, D0'
+
+   * uint8x8_t vrev64_u8 (uint8x8_t)
+     _Form of expected instruction(s):_ `vrev64.8 D0, D0'
+
+   * int32x2_t vrev64_s32 (int32x2_t)
+     _Form of expected instruction(s):_ `vrev64.32 D0, D0'
+
+   * int16x4_t vrev64_s16 (int16x4_t)
+     _Form of expected instruction(s):_ `vrev64.16 D0, D0'
+
+   * int8x8_t vrev64_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vrev64.8 D0, D0'
+
+   * float32x2_t vrev64_f32 (float32x2_t)
+     _Form of expected instruction(s):_ `vrev64.32 D0, D0'
+
+   * poly16x4_t vrev64_p16 (poly16x4_t)
+     _Form of expected instruction(s):_ `vrev64.16 D0, D0'
+
+   * poly8x8_t vrev64_p8 (poly8x8_t)
+     _Form of expected instruction(s):_ `vrev64.8 D0, D0'
+
+   * uint32x4_t vrev64q_u32 (uint32x4_t)
+     _Form of expected instruction(s):_ `vrev64.32 Q0, Q0'
+
+   * uint16x8_t vrev64q_u16 (uint16x8_t)
+     _Form of expected instruction(s):_ `vrev64.16 Q0, Q0'
+
+   * uint8x16_t vrev64q_u8 (uint8x16_t)
+     _Form of expected instruction(s):_ `vrev64.8 Q0, Q0'
+
+   * int32x4_t vrev64q_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vrev64.32 Q0, Q0'
+
+   * int16x8_t vrev64q_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vrev64.16 Q0, Q0'
+
+   * int8x16_t vrev64q_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vrev64.8 Q0, Q0'
+
+   * float32x4_t vrev64q_f32 (float32x4_t)
+     _Form of expected instruction(s):_ `vrev64.32 Q0, Q0'
+
+   * poly16x8_t vrev64q_p16 (poly16x8_t)
+     _Form of expected instruction(s):_ `vrev64.16 Q0, Q0'
+
+   * poly8x16_t vrev64q_p8 (poly8x16_t)
+     _Form of expected instruction(s):_ `vrev64.8 Q0, Q0'
+
+   * uint16x4_t vrev32_u16 (uint16x4_t)
+     _Form of expected instruction(s):_ `vrev32.16 D0, D0'
+
+   * int16x4_t vrev32_s16 (int16x4_t)
+     _Form of expected instruction(s):_ `vrev32.16 D0, D0'
+
+   * uint8x8_t vrev32_u8 (uint8x8_t)
+     _Form of expected instruction(s):_ `vrev32.8 D0, D0'
+
+   * int8x8_t vrev32_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vrev32.8 D0, D0'
+
+   * poly16x4_t vrev32_p16 (poly16x4_t)
+     _Form of expected instruction(s):_ `vrev32.16 D0, D0'
+
+   * poly8x8_t vrev32_p8 (poly8x8_t)
+     _Form of expected instruction(s):_ `vrev32.8 D0, D0'
+
+   * uint16x8_t vrev32q_u16 (uint16x8_t)
+     _Form of expected instruction(s):_ `vrev32.16 Q0, Q0'
+
+   * int16x8_t vrev32q_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vrev32.16 Q0, Q0'
+
+   * uint8x16_t vrev32q_u8 (uint8x16_t)
+     _Form of expected instruction(s):_ `vrev32.8 Q0, Q0'
+
+   * int8x16_t vrev32q_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vrev32.8 Q0, Q0'
+
+   * poly16x8_t vrev32q_p16 (poly16x8_t)
+     _Form of expected instruction(s):_ `vrev32.16 Q0, Q0'
+
+   * poly8x16_t vrev32q_p8 (poly8x16_t)
+     _Form of expected instruction(s):_ `vrev32.8 Q0, Q0'
+
+   * uint8x8_t vrev16_u8 (uint8x8_t)
+     _Form of expected instruction(s):_ `vrev16.8 D0, D0'
+
+   * int8x8_t vrev16_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vrev16.8 D0, D0'
+
+   * poly8x8_t vrev16_p8 (poly8x8_t)
+     _Form of expected instruction(s):_ `vrev16.8 D0, D0'
+
+   * uint8x16_t vrev16q_u8 (uint8x16_t)
+     _Form of expected instruction(s):_ `vrev16.8 Q0, Q0'
+
+   * int8x16_t vrev16q_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vrev16.8 Q0, Q0'
+
+   * poly8x16_t vrev16q_p8 (poly8x16_t)
+     _Form of expected instruction(s):_ `vrev16.8 Q0, Q0'
+
+6.54.3.64 Bit selection
+.......................
+
+   * uint32x2_t vbsl_u32 (uint32x2_t, uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vbsl D0, D0, D0' _or_ `vbit
+     D0, D0, D0' _or_ `vbif D0, D0, D0'
+
+   * uint16x4_t vbsl_u16 (uint16x4_t, uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vbsl D0, D0, D0' _or_ `vbit
+     D0, D0, D0' _or_ `vbif D0, D0, D0'
+
+   * uint8x8_t vbsl_u8 (uint8x8_t, uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vbsl D0, D0, D0' _or_ `vbit
+     D0, D0, D0' _or_ `vbif D0, D0, D0'
+
+   * int32x2_t vbsl_s32 (uint32x2_t, int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vbsl D0, D0, D0' _or_ `vbit
+     D0, D0, D0' _or_ `vbif D0, D0, D0'
+
+   * int16x4_t vbsl_s16 (uint16x4_t, int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vbsl D0, D0, D0' _or_ `vbit
+     D0, D0, D0' _or_ `vbif D0, D0, D0'
+
+   * int8x8_t vbsl_s8 (uint8x8_t, int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vbsl D0, D0, D0' _or_ `vbit
+     D0, D0, D0' _or_ `vbif D0, D0, D0'
+
+   * uint64x1_t vbsl_u64 (uint64x1_t, uint64x1_t, uint64x1_t)
+     _Form of expected instruction(s):_ `vbsl D0, D0, D0' _or_ `vbit
+     D0, D0, D0' _or_ `vbif D0, D0, D0'
+
+   * int64x1_t vbsl_s64 (uint64x1_t, int64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vbsl D0, D0, D0' _or_ `vbit
+     D0, D0, D0' _or_ `vbif D0, D0, D0'
+
+   * float32x2_t vbsl_f32 (uint32x2_t, float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vbsl D0, D0, D0' _or_ `vbit
+     D0, D0, D0' _or_ `vbif D0, D0, D0'
+
+   * poly16x4_t vbsl_p16 (uint16x4_t, poly16x4_t, poly16x4_t)
+     _Form of expected instruction(s):_ `vbsl D0, D0, D0' _or_ `vbit
+     D0, D0, D0' _or_ `vbif D0, D0, D0'
+
+   * poly8x8_t vbsl_p8 (uint8x8_t, poly8x8_t, poly8x8_t)
+     _Form of expected instruction(s):_ `vbsl D0, D0, D0' _or_ `vbit
+     D0, D0, D0' _or_ `vbif D0, D0, D0'
+
+   * uint32x4_t vbslq_u32 (uint32x4_t, uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vbsl Q0, Q0, Q0' _or_ `vbit
+     Q0, Q0, Q0' _or_ `vbif Q0, Q0, Q0'
+
+   * uint16x8_t vbslq_u16 (uint16x8_t, uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vbsl Q0, Q0, Q0' _or_ `vbit
+     Q0, Q0, Q0' _or_ `vbif Q0, Q0, Q0'
+
+   * uint8x16_t vbslq_u8 (uint8x16_t, uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vbsl Q0, Q0, Q0' _or_ `vbit
+     Q0, Q0, Q0' _or_ `vbif Q0, Q0, Q0'
+
+   * int32x4_t vbslq_s32 (uint32x4_t, int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vbsl Q0, Q0, Q0' _or_ `vbit
+     Q0, Q0, Q0' _or_ `vbif Q0, Q0, Q0'
+
+   * int16x8_t vbslq_s16 (uint16x8_t, int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vbsl Q0, Q0, Q0' _or_ `vbit
+     Q0, Q0, Q0' _or_ `vbif Q0, Q0, Q0'
+
+   * int8x16_t vbslq_s8 (uint8x16_t, int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vbsl Q0, Q0, Q0' _or_ `vbit
+     Q0, Q0, Q0' _or_ `vbif Q0, Q0, Q0'
+
+   * uint64x2_t vbslq_u64 (uint64x2_t, uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vbsl Q0, Q0, Q0' _or_ `vbit
+     Q0, Q0, Q0' _or_ `vbif Q0, Q0, Q0'
+
+   * int64x2_t vbslq_s64 (uint64x2_t, int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vbsl Q0, Q0, Q0' _or_ `vbit
+     Q0, Q0, Q0' _or_ `vbif Q0, Q0, Q0'
+
+   * float32x4_t vbslq_f32 (uint32x4_t, float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vbsl Q0, Q0, Q0' _or_ `vbit
+     Q0, Q0, Q0' _or_ `vbif Q0, Q0, Q0'
+
+   * poly16x8_t vbslq_p16 (uint16x8_t, poly16x8_t, poly16x8_t)
+     _Form of expected instruction(s):_ `vbsl Q0, Q0, Q0' _or_ `vbit
+     Q0, Q0, Q0' _or_ `vbif Q0, Q0, Q0'
+
+   * poly8x16_t vbslq_p8 (uint8x16_t, poly8x16_t, poly8x16_t)
+     _Form of expected instruction(s):_ `vbsl Q0, Q0, Q0' _or_ `vbit
+     Q0, Q0, Q0' _or_ `vbif Q0, Q0, Q0'
+
+6.54.3.65 Transpose elements
+............................
+
+   * uint32x2x2_t vtrn_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vtrn.32 D0, D1'
+
+   * uint16x4x2_t vtrn_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vtrn.16 D0, D1'
+
+   * uint8x8x2_t vtrn_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtrn.8 D0, D1'
+
+   * int32x2x2_t vtrn_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vtrn.32 D0, D1'
+
+   * int16x4x2_t vtrn_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vtrn.16 D0, D1'
+
+   * int8x8x2_t vtrn_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vtrn.8 D0, D1'
+
+   * float32x2x2_t vtrn_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vtrn.32 D0, D1'
+
+   * poly16x4x2_t vtrn_p16 (poly16x4_t, poly16x4_t)
+     _Form of expected instruction(s):_ `vtrn.16 D0, D1'
+
+   * poly8x8x2_t vtrn_p8 (poly8x8_t, poly8x8_t)
+     _Form of expected instruction(s):_ `vtrn.8 D0, D1'
+
+   * uint32x4x2_t vtrnq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vtrn.32 Q0, Q1'
+
+   * uint16x8x2_t vtrnq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vtrn.16 Q0, Q1'
+
+   * uint8x16x2_t vtrnq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vtrn.8 Q0, Q1'
+
+   * int32x4x2_t vtrnq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vtrn.32 Q0, Q1'
+
+   * int16x8x2_t vtrnq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vtrn.16 Q0, Q1'
+
+   * int8x16x2_t vtrnq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vtrn.8 Q0, Q1'
+
+   * float32x4x2_t vtrnq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vtrn.32 Q0, Q1'
+
+   * poly16x8x2_t vtrnq_p16 (poly16x8_t, poly16x8_t)
+     _Form of expected instruction(s):_ `vtrn.16 Q0, Q1'
+
+   * poly8x16x2_t vtrnq_p8 (poly8x16_t, poly8x16_t)
+     _Form of expected instruction(s):_ `vtrn.8 Q0, Q1'
+
+6.54.3.66 Zip elements
+......................
+
+   * uint32x2x2_t vzip_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vzip.32 D0, D1'
+
+   * uint16x4x2_t vzip_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vzip.16 D0, D1'
+
+   * uint8x8x2_t vzip_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vzip.8 D0, D1'
+
+   * int32x2x2_t vzip_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vzip.32 D0, D1'
+
+   * int16x4x2_t vzip_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vzip.16 D0, D1'
+
+   * int8x8x2_t vzip_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vzip.8 D0, D1'
+
+   * float32x2x2_t vzip_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vzip.32 D0, D1'
+
+   * poly16x4x2_t vzip_p16 (poly16x4_t, poly16x4_t)
+     _Form of expected instruction(s):_ `vzip.16 D0, D1'
+
+   * poly8x8x2_t vzip_p8 (poly8x8_t, poly8x8_t)
+     _Form of expected instruction(s):_ `vzip.8 D0, D1'
+
+   * uint32x4x2_t vzipq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vzip.32 Q0, Q1'
+
+   * uint16x8x2_t vzipq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vzip.16 Q0, Q1'
+
+   * uint8x16x2_t vzipq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vzip.8 Q0, Q1'
+
+   * int32x4x2_t vzipq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vzip.32 Q0, Q1'
+
+   * int16x8x2_t vzipq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vzip.16 Q0, Q1'
+
+   * int8x16x2_t vzipq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vzip.8 Q0, Q1'
+
+   * float32x4x2_t vzipq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vzip.32 Q0, Q1'
+
+   * poly16x8x2_t vzipq_p16 (poly16x8_t, poly16x8_t)
+     _Form of expected instruction(s):_ `vzip.16 Q0, Q1'
+
+   * poly8x16x2_t vzipq_p8 (poly8x16_t, poly8x16_t)
+     _Form of expected instruction(s):_ `vzip.8 Q0, Q1'
+
+6.54.3.67 Unzip elements
+........................
+
+   * uint32x2x2_t vuzp_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vuzp.32 D0, D1'
+
+   * uint16x4x2_t vuzp_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vuzp.16 D0, D1'
+
+   * uint8x8x2_t vuzp_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vuzp.8 D0, D1'
+
+   * int32x2x2_t vuzp_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vuzp.32 D0, D1'
+
+   * int16x4x2_t vuzp_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vuzp.16 D0, D1'
+
+   * int8x8x2_t vuzp_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vuzp.8 D0, D1'
+
+   * float32x2x2_t vuzp_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vuzp.32 D0, D1'
+
+   * poly16x4x2_t vuzp_p16 (poly16x4_t, poly16x4_t)
+     _Form of expected instruction(s):_ `vuzp.16 D0, D1'
+
+   * poly8x8x2_t vuzp_p8 (poly8x8_t, poly8x8_t)
+     _Form of expected instruction(s):_ `vuzp.8 D0, D1'
+
+   * uint32x4x2_t vuzpq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vuzp.32 Q0, Q1'
+
+   * uint16x8x2_t vuzpq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vuzp.16 Q0, Q1'
+
+   * uint8x16x2_t vuzpq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vuzp.8 Q0, Q1'
+
+   * int32x4x2_t vuzpq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vuzp.32 Q0, Q1'
+
+   * int16x8x2_t vuzpq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vuzp.16 Q0, Q1'
+
+   * int8x16x2_t vuzpq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vuzp.8 Q0, Q1'
+
+   * float32x4x2_t vuzpq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vuzp.32 Q0, Q1'
+
+   * poly16x8x2_t vuzpq_p16 (poly16x8_t, poly16x8_t)
+     _Form of expected instruction(s):_ `vuzp.16 Q0, Q1'
+
+   * poly8x16x2_t vuzpq_p8 (poly8x16_t, poly8x16_t)
+     _Form of expected instruction(s):_ `vuzp.8 Q0, Q1'
+
+6.54.3.68 Element/structure loads, VLD1 variants
+................................................
+
+   * uint32x2_t vld1_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0}, [R0]'
+
+   * uint16x4_t vld1_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0}, [R0]'
+
+   * uint8x8_t vld1_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0}, [R0]'
+
+   * int32x2_t vld1_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0}, [R0]'
+
+   * int16x4_t vld1_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0}, [R0]'
+
+   * int8x8_t vld1_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0}, [R0]'
+
+   * uint64x1_t vld1_u64 (const uint64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0}, [R0]'
+
+   * int64x1_t vld1_s64 (const int64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0}, [R0]'
+
+   * float32x2_t vld1_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0}, [R0]'
+
+   * poly16x4_t vld1_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0}, [R0]'
+
+   * poly8x8_t vld1_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0}, [R0]'
+
+   * uint32x4_t vld1q_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0, D1}, [R0]'
+
+   * uint16x8_t vld1q_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0, D1}, [R0]'
+
+   * uint8x16_t vld1q_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0, D1}, [R0]'
+
+   * int32x4_t vld1q_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0, D1}, [R0]'
+
+   * int16x8_t vld1q_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0, D1}, [R0]'
+
+   * int8x16_t vld1q_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0, D1}, [R0]'
+
+   * uint64x2_t vld1q_u64 (const uint64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1}, [R0]'
+
+   * int64x2_t vld1q_s64 (const int64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1}, [R0]'
+
+   * float32x4_t vld1q_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0, D1}, [R0]'
+
+   * poly16x8_t vld1q_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0, D1}, [R0]'
+
+   * poly8x16_t vld1q_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0, D1}, [R0]'
+
+   * uint32x2_t vld1_lane_u32 (const uint32_t *, uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vld1.32 {D0[0]}, [R0]'
+
+   * uint16x4_t vld1_lane_u16 (const uint16_t *, uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vld1.16 {D0[0]}, [R0]'
+
+   * uint8x8_t vld1_lane_u8 (const uint8_t *, uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vld1.8 {D0[0]}, [R0]'
+
+   * int32x2_t vld1_lane_s32 (const int32_t *, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vld1.32 {D0[0]}, [R0]'
+
+   * int16x4_t vld1_lane_s16 (const int16_t *, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vld1.16 {D0[0]}, [R0]'
+
+   * int8x8_t vld1_lane_s8 (const int8_t *, int8x8_t, const int)
+     _Form of expected instruction(s):_ `vld1.8 {D0[0]}, [R0]'
+
+   * float32x2_t vld1_lane_f32 (const float32_t *, float32x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vld1.32 {D0[0]}, [R0]'
+
+   * poly16x4_t vld1_lane_p16 (const poly16_t *, poly16x4_t, const int)
+     _Form of expected instruction(s):_ `vld1.16 {D0[0]}, [R0]'
+
+   * poly8x8_t vld1_lane_p8 (const poly8_t *, poly8x8_t, const int)
+     _Form of expected instruction(s):_ `vld1.8 {D0[0]}, [R0]'
+
+   * uint64x1_t vld1_lane_u64 (const uint64_t *, uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vld1.64 {D0}, [R0]'
+
+   * int64x1_t vld1_lane_s64 (const int64_t *, int64x1_t, const int)
+     _Form of expected instruction(s):_ `vld1.64 {D0}, [R0]'
+
+   * uint32x4_t vld1q_lane_u32 (const uint32_t *, uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vld1.32 {D0[0]}, [R0]'
+
+   * uint16x8_t vld1q_lane_u16 (const uint16_t *, uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vld1.16 {D0[0]}, [R0]'
+
+   * uint8x16_t vld1q_lane_u8 (const uint8_t *, uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vld1.8 {D0[0]}, [R0]'
+
+   * int32x4_t vld1q_lane_s32 (const int32_t *, int32x4_t, const int)
+     _Form of expected instruction(s):_ `vld1.32 {D0[0]}, [R0]'
+
+   * int16x8_t vld1q_lane_s16 (const int16_t *, int16x8_t, const int)
+     _Form of expected instruction(s):_ `vld1.16 {D0[0]}, [R0]'
+
+   * int8x16_t vld1q_lane_s8 (const int8_t *, int8x16_t, const int)
+     _Form of expected instruction(s):_ `vld1.8 {D0[0]}, [R0]'
+
+   * float32x4_t vld1q_lane_f32 (const float32_t *, float32x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vld1.32 {D0[0]}, [R0]'
+
+   * poly16x8_t vld1q_lane_p16 (const poly16_t *, poly16x8_t, const int)
+     _Form of expected instruction(s):_ `vld1.16 {D0[0]}, [R0]'
+
+   * poly8x16_t vld1q_lane_p8 (const poly8_t *, poly8x16_t, const int)
+     _Form of expected instruction(s):_ `vld1.8 {D0[0]}, [R0]'
+
+   * uint64x2_t vld1q_lane_u64 (const uint64_t *, uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vld1.64 {D0}, [R0]'
+
+   * int64x2_t vld1q_lane_s64 (const int64_t *, int64x2_t, const int)
+     _Form of expected instruction(s):_ `vld1.64 {D0}, [R0]'
+
+   * uint32x2_t vld1_dup_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0[]}, [R0]'
+
+   * uint16x4_t vld1_dup_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0[]}, [R0]'
+
+   * uint8x8_t vld1_dup_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0[]}, [R0]'
+
+   * int32x2_t vld1_dup_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0[]}, [R0]'
+
+   * int16x4_t vld1_dup_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0[]}, [R0]'
+
+   * int8x8_t vld1_dup_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0[]}, [R0]'
+
+   * float32x2_t vld1_dup_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0[]}, [R0]'
+
+   * poly16x4_t vld1_dup_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0[]}, [R0]'
+
+   * poly8x8_t vld1_dup_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0[]}, [R0]'
+
+   * uint64x1_t vld1_dup_u64 (const uint64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0}, [R0]'
+
+   * int64x1_t vld1_dup_s64 (const int64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0}, [R0]'
+
+   * uint32x4_t vld1q_dup_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0[], D1[]}, [R0]'
+
+   * uint16x8_t vld1q_dup_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0[], D1[]}, [R0]'
+
+   * uint8x16_t vld1q_dup_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0[], D1[]}, [R0]'
+
+   * int32x4_t vld1q_dup_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0[], D1[]}, [R0]'
+
+   * int16x8_t vld1q_dup_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0[], D1[]}, [R0]'
+
+   * int8x16_t vld1q_dup_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0[], D1[]}, [R0]'
+
+   * float32x4_t vld1q_dup_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0[], D1[]}, [R0]'
+
+   * poly16x8_t vld1q_dup_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0[], D1[]}, [R0]'
+
+   * poly8x16_t vld1q_dup_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0[], D1[]}, [R0]'
+
+   * uint64x2_t vld1q_dup_u64 (const uint64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1}, [R0]'
+
+   * int64x2_t vld1q_dup_s64 (const int64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1}, [R0]'
+
+6.54.3.69 Element/structure stores, VST1 variants
+.................................................
+
+   * void vst1_u32 (uint32_t *, uint32x2_t)
+     _Form of expected instruction(s):_ `vst1.32 {D0}, [R0]'
+
+   * void vst1_u16 (uint16_t *, uint16x4_t)
+     _Form of expected instruction(s):_ `vst1.16 {D0}, [R0]'
+
+   * void vst1_u8 (uint8_t *, uint8x8_t)
+     _Form of expected instruction(s):_ `vst1.8 {D0}, [R0]'
+
+   * void vst1_s32 (int32_t *, int32x2_t)
+     _Form of expected instruction(s):_ `vst1.32 {D0}, [R0]'
+
+   * void vst1_s16 (int16_t *, int16x4_t)
+     _Form of expected instruction(s):_ `vst1.16 {D0}, [R0]'
+
+   * void vst1_s8 (int8_t *, int8x8_t)
+     _Form of expected instruction(s):_ `vst1.8 {D0}, [R0]'
+
+   * void vst1_u64 (uint64_t *, uint64x1_t)
+     _Form of expected instruction(s):_ `vst1.64 {D0}, [R0]'
+
+   * void vst1_s64 (int64_t *, int64x1_t)
+     _Form of expected instruction(s):_ `vst1.64 {D0}, [R0]'
+
+   * void vst1_f32 (float32_t *, float32x2_t)
+     _Form of expected instruction(s):_ `vst1.32 {D0}, [R0]'
+
+   * void vst1_p16 (poly16_t *, poly16x4_t)
+     _Form of expected instruction(s):_ `vst1.16 {D0}, [R0]'
+
+   * void vst1_p8 (poly8_t *, poly8x8_t)
+     _Form of expected instruction(s):_ `vst1.8 {D0}, [R0]'
+
+   * void vst1q_u32 (uint32_t *, uint32x4_t)
+     _Form of expected instruction(s):_ `vst1.32 {D0, D1}, [R0]'
+
+   * void vst1q_u16 (uint16_t *, uint16x8_t)
+     _Form of expected instruction(s):_ `vst1.16 {D0, D1}, [R0]'
+
+   * void vst1q_u8 (uint8_t *, uint8x16_t)
+     _Form of expected instruction(s):_ `vst1.8 {D0, D1}, [R0]'
+
+   * void vst1q_s32 (int32_t *, int32x4_t)
+     _Form of expected instruction(s):_ `vst1.32 {D0, D1}, [R0]'
+
+   * void vst1q_s16 (int16_t *, int16x8_t)
+     _Form of expected instruction(s):_ `vst1.16 {D0, D1}, [R0]'
+
+   * void vst1q_s8 (int8_t *, int8x16_t)
+     _Form of expected instruction(s):_ `vst1.8 {D0, D1}, [R0]'
+
+   * void vst1q_u64 (uint64_t *, uint64x2_t)
+     _Form of expected instruction(s):_ `vst1.64 {D0, D1}, [R0]'
+
+   * void vst1q_s64 (int64_t *, int64x2_t)
+     _Form of expected instruction(s):_ `vst1.64 {D0, D1}, [R0]'
+
+   * void vst1q_f32 (float32_t *, float32x4_t)
+     _Form of expected instruction(s):_ `vst1.32 {D0, D1}, [R0]'
+
+   * void vst1q_p16 (poly16_t *, poly16x8_t)
+     _Form of expected instruction(s):_ `vst1.16 {D0, D1}, [R0]'
+
+   * void vst1q_p8 (poly8_t *, poly8x16_t)
+     _Form of expected instruction(s):_ `vst1.8 {D0, D1}, [R0]'
+
+   * void vst1_lane_u32 (uint32_t *, uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vst1.32 {D0[0]}, [R0]'
+
+   * void vst1_lane_u16 (uint16_t *, uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vst1.16 {D0[0]}, [R0]'
+
+   * void vst1_lane_u8 (uint8_t *, uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vst1.8 {D0[0]}, [R0]'
+
+   * void vst1_lane_s32 (int32_t *, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vst1.32 {D0[0]}, [R0]'
+
+   * void vst1_lane_s16 (int16_t *, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vst1.16 {D0[0]}, [R0]'
+
+   * void vst1_lane_s8 (int8_t *, int8x8_t, const int)
+     _Form of expected instruction(s):_ `vst1.8 {D0[0]}, [R0]'
+
+   * void vst1_lane_f32 (float32_t *, float32x2_t, const int)
+     _Form of expected instruction(s):_ `vst1.32 {D0[0]}, [R0]'
+
+   * void vst1_lane_p16 (poly16_t *, poly16x4_t, const int)
+     _Form of expected instruction(s):_ `vst1.16 {D0[0]}, [R0]'
+
+   * void vst1_lane_p8 (poly8_t *, poly8x8_t, const int)
+     _Form of expected instruction(s):_ `vst1.8 {D0[0]}, [R0]'
+
+   * void vst1_lane_s64 (int64_t *, int64x1_t, const int)
+     _Form of expected instruction(s):_ `vst1.64 {D0}, [R0]'
+
+   * void vst1_lane_u64 (uint64_t *, uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vst1.64 {D0}, [R0]'
+
+   * void vst1q_lane_u32 (uint32_t *, uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vst1.32 {D0[0]}, [R0]'
+
+   * void vst1q_lane_u16 (uint16_t *, uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vst1.16 {D0[0]}, [R0]'
+
+   * void vst1q_lane_u8 (uint8_t *, uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vst1.8 {D0[0]}, [R0]'
+
+   * void vst1q_lane_s32 (int32_t *, int32x4_t, const int)
+     _Form of expected instruction(s):_ `vst1.32 {D0[0]}, [R0]'
+
+   * void vst1q_lane_s16 (int16_t *, int16x8_t, const int)
+     _Form of expected instruction(s):_ `vst1.16 {D0[0]}, [R0]'
+
+   * void vst1q_lane_s8 (int8_t *, int8x16_t, const int)
+     _Form of expected instruction(s):_ `vst1.8 {D0[0]}, [R0]'
+
+   * void vst1q_lane_f32 (float32_t *, float32x4_t, const int)
+     _Form of expected instruction(s):_ `vst1.32 {D0[0]}, [R0]'
+
+   * void vst1q_lane_p16 (poly16_t *, poly16x8_t, const int)
+     _Form of expected instruction(s):_ `vst1.16 {D0[0]}, [R0]'
+
+   * void vst1q_lane_p8 (poly8_t *, poly8x16_t, const int)
+     _Form of expected instruction(s):_ `vst1.8 {D0[0]}, [R0]'
+
+   * void vst1q_lane_s64 (int64_t *, int64x2_t, const int)
+     _Form of expected instruction(s):_ `vst1.64 {D0}, [R0]'
+
+   * void vst1q_lane_u64 (uint64_t *, uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vst1.64 {D0}, [R0]'
+
+6.54.3.70 Element/structure loads, VLD2 variants
+................................................
+
+   * uint32x2x2_t vld2_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld2.32 {D0, D1}, [R0]'
+
+   * uint16x4x2_t vld2_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld2.16 {D0, D1}, [R0]'
+
+   * uint8x8x2_t vld2_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld2.8 {D0, D1}, [R0]'
+
+   * int32x2x2_t vld2_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld2.32 {D0, D1}, [R0]'
+
+   * int16x4x2_t vld2_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld2.16 {D0, D1}, [R0]'
+
+   * int8x8x2_t vld2_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld2.8 {D0, D1}, [R0]'
+
+   * float32x2x2_t vld2_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld2.32 {D0, D1}, [R0]'
+
+   * poly16x4x2_t vld2_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld2.16 {D0, D1}, [R0]'
+
+   * poly8x8x2_t vld2_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld2.8 {D0, D1}, [R0]'
+
+   * uint64x1x2_t vld2_u64 (const uint64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1}, [R0]'
+
+   * int64x1x2_t vld2_s64 (const int64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1}, [R0]'
+
+   * uint32x4x2_t vld2q_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld2.32 {D0, D1}, [R0]'
+
+   * uint16x8x2_t vld2q_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld2.16 {D0, D1}, [R0]'
+
+   * uint8x16x2_t vld2q_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld2.8 {D0, D1}, [R0]'
+
+   * int32x4x2_t vld2q_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld2.32 {D0, D1}, [R0]'
+
+   * int16x8x2_t vld2q_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld2.16 {D0, D1}, [R0]'
+
+   * int8x16x2_t vld2q_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld2.8 {D0, D1}, [R0]'
+
+   * float32x4x2_t vld2q_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld2.32 {D0, D1}, [R0]'
+
+   * poly16x8x2_t vld2q_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld2.16 {D0, D1}, [R0]'
+
+   * poly8x16x2_t vld2q_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld2.8 {D0, D1}, [R0]'
+
+   * uint32x2x2_t vld2_lane_u32 (const uint32_t *, uint32x2x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vld2.32 {D0[0], D1[0]}, [R0]'
+
+   * uint16x4x2_t vld2_lane_u16 (const uint16_t *, uint16x4x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vld2.16 {D0[0], D1[0]}, [R0]'
+
+   * uint8x8x2_t vld2_lane_u8 (const uint8_t *, uint8x8x2_t, const int)
+     _Form of expected instruction(s):_ `vld2.8 {D0[0], D1[0]}, [R0]'
+
+   * int32x2x2_t vld2_lane_s32 (const int32_t *, int32x2x2_t, const int)
+     _Form of expected instruction(s):_ `vld2.32 {D0[0], D1[0]}, [R0]'
+
+   * int16x4x2_t vld2_lane_s16 (const int16_t *, int16x4x2_t, const int)
+     _Form of expected instruction(s):_ `vld2.16 {D0[0], D1[0]}, [R0]'
+
+   * int8x8x2_t vld2_lane_s8 (const int8_t *, int8x8x2_t, const int)
+     _Form of expected instruction(s):_ `vld2.8 {D0[0], D1[0]}, [R0]'
+
+   * float32x2x2_t vld2_lane_f32 (const float32_t *, float32x2x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vld2.32 {D0[0], D1[0]}, [R0]'
+
+   * poly16x4x2_t vld2_lane_p16 (const poly16_t *, poly16x4x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vld2.16 {D0[0], D1[0]}, [R0]'
+
+   * poly8x8x2_t vld2_lane_p8 (const poly8_t *, poly8x8x2_t, const int)
+     _Form of expected instruction(s):_ `vld2.8 {D0[0], D1[0]}, [R0]'
+
+   * int32x4x2_t vld2q_lane_s32 (const int32_t *, int32x4x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vld2.32 {D0[0], D1[0]}, [R0]'
+
+   * int16x8x2_t vld2q_lane_s16 (const int16_t *, int16x8x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vld2.16 {D0[0], D1[0]}, [R0]'
+
+   * uint32x4x2_t vld2q_lane_u32 (const uint32_t *, uint32x4x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vld2.32 {D0[0], D1[0]}, [R0]'
+
+   * uint16x8x2_t vld2q_lane_u16 (const uint16_t *, uint16x8x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vld2.16 {D0[0], D1[0]}, [R0]'
+
+   * float32x4x2_t vld2q_lane_f32 (const float32_t *, float32x4x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vld2.32 {D0[0], D1[0]}, [R0]'
+
+   * poly16x8x2_t vld2q_lane_p16 (const poly16_t *, poly16x8x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vld2.16 {D0[0], D1[0]}, [R0]'
+
+   * uint32x2x2_t vld2_dup_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld2.32 {D0[], D1[]}, [R0]'
+
+   * uint16x4x2_t vld2_dup_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld2.16 {D0[], D1[]}, [R0]'
+
+   * uint8x8x2_t vld2_dup_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld2.8 {D0[], D1[]}, [R0]'
+
+   * int32x2x2_t vld2_dup_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld2.32 {D0[], D1[]}, [R0]'
+
+   * int16x4x2_t vld2_dup_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld2.16 {D0[], D1[]}, [R0]'
+
+   * int8x8x2_t vld2_dup_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld2.8 {D0[], D1[]}, [R0]'
+
+   * float32x2x2_t vld2_dup_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld2.32 {D0[], D1[]}, [R0]'
+
+   * poly16x4x2_t vld2_dup_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld2.16 {D0[], D1[]}, [R0]'
+
+   * poly8x8x2_t vld2_dup_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld2.8 {D0[], D1[]}, [R0]'
+
+   * uint64x1x2_t vld2_dup_u64 (const uint64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1}, [R0]'
+
+   * int64x1x2_t vld2_dup_s64 (const int64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1}, [R0]'
+
+6.54.3.71 Element/structure stores, VST2 variants
+.................................................
+
+   * void vst2_u32 (uint32_t *, uint32x2x2_t)
+     _Form of expected instruction(s):_ `vst2.32 {D0, D1}, [R0]'
+
+   * void vst2_u16 (uint16_t *, uint16x4x2_t)
+     _Form of expected instruction(s):_ `vst2.16 {D0, D1}, [R0]'
+
+   * void vst2_u8 (uint8_t *, uint8x8x2_t)
+     _Form of expected instruction(s):_ `vst2.8 {D0, D1}, [R0]'
+
+   * void vst2_s32 (int32_t *, int32x2x2_t)
+     _Form of expected instruction(s):_ `vst2.32 {D0, D1}, [R0]'
+
+   * void vst2_s16 (int16_t *, int16x4x2_t)
+     _Form of expected instruction(s):_ `vst2.16 {D0, D1}, [R0]'
+
+   * void vst2_s8 (int8_t *, int8x8x2_t)
+     _Form of expected instruction(s):_ `vst2.8 {D0, D1}, [R0]'
+
+   * void vst2_f32 (float32_t *, float32x2x2_t)
+     _Form of expected instruction(s):_ `vst2.32 {D0, D1}, [R0]'
+
+   * void vst2_p16 (poly16_t *, poly16x4x2_t)
+     _Form of expected instruction(s):_ `vst2.16 {D0, D1}, [R0]'
+
+   * void vst2_p8 (poly8_t *, poly8x8x2_t)
+     _Form of expected instruction(s):_ `vst2.8 {D0, D1}, [R0]'
+
+   * void vst2_u64 (uint64_t *, uint64x1x2_t)
+     _Form of expected instruction(s):_ `vst1.64 {D0, D1}, [R0]'
+
+   * void vst2_s64 (int64_t *, int64x1x2_t)
+     _Form of expected instruction(s):_ `vst1.64 {D0, D1}, [R0]'
+
+   * void vst2q_u32 (uint32_t *, uint32x4x2_t)
+     _Form of expected instruction(s):_ `vst2.32 {D0, D1}, [R0]'
+
+   * void vst2q_u16 (uint16_t *, uint16x8x2_t)
+     _Form of expected instruction(s):_ `vst2.16 {D0, D1}, [R0]'
+
+   * void vst2q_u8 (uint8_t *, uint8x16x2_t)
+     _Form of expected instruction(s):_ `vst2.8 {D0, D1}, [R0]'
+
+   * void vst2q_s32 (int32_t *, int32x4x2_t)
+     _Form of expected instruction(s):_ `vst2.32 {D0, D1}, [R0]'
+
+   * void vst2q_s16 (int16_t *, int16x8x2_t)
+     _Form of expected instruction(s):_ `vst2.16 {D0, D1}, [R0]'
+
+   * void vst2q_s8 (int8_t *, int8x16x2_t)
+     _Form of expected instruction(s):_ `vst2.8 {D0, D1}, [R0]'
+
+   * void vst2q_f32 (float32_t *, float32x4x2_t)
+     _Form of expected instruction(s):_ `vst2.32 {D0, D1}, [R0]'
+
+   * void vst2q_p16 (poly16_t *, poly16x8x2_t)
+     _Form of expected instruction(s):_ `vst2.16 {D0, D1}, [R0]'
+
+   * void vst2q_p8 (poly8_t *, poly8x16x2_t)
+     _Form of expected instruction(s):_ `vst2.8 {D0, D1}, [R0]'
+
+   * void vst2_lane_u32 (uint32_t *, uint32x2x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.32 {D0[0], D1[0]}, [R0]'
+
+   * void vst2_lane_u16 (uint16_t *, uint16x4x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.16 {D0[0], D1[0]}, [R0]'
+
+   * void vst2_lane_u8 (uint8_t *, uint8x8x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.8 {D0[0], D1[0]}, [R0]'
+
+   * void vst2_lane_s32 (int32_t *, int32x2x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.32 {D0[0], D1[0]}, [R0]'
+
+   * void vst2_lane_s16 (int16_t *, int16x4x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.16 {D0[0], D1[0]}, [R0]'
+
+   * void vst2_lane_s8 (int8_t *, int8x8x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.8 {D0[0], D1[0]}, [R0]'
+
+   * void vst2_lane_f32 (float32_t *, float32x2x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.32 {D0[0], D1[0]}, [R0]'
+
+   * void vst2_lane_p16 (poly16_t *, poly16x4x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.16 {D0[0], D1[0]}, [R0]'
+
+   * void vst2_lane_p8 (poly8_t *, poly8x8x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.8 {D0[0], D1[0]}, [R0]'
+
+   * void vst2q_lane_s32 (int32_t *, int32x4x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.32 {D0[0], D1[0]}, [R0]'
+
+   * void vst2q_lane_s16 (int16_t *, int16x8x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.16 {D0[0], D1[0]}, [R0]'
+
+   * void vst2q_lane_u32 (uint32_t *, uint32x4x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.32 {D0[0], D1[0]}, [R0]'
+
+   * void vst2q_lane_u16 (uint16_t *, uint16x8x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.16 {D0[0], D1[0]}, [R0]'
+
+   * void vst2q_lane_f32 (float32_t *, float32x4x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.32 {D0[0], D1[0]}, [R0]'
+
+   * void vst2q_lane_p16 (poly16_t *, poly16x8x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.16 {D0[0], D1[0]}, [R0]'
+
+6.54.3.72 Element/structure loads, VLD3 variants
+................................................
+
+   * uint32x2x3_t vld3_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld3.32 {D0, D1, D2}, [R0]'
+
+   * uint16x4x3_t vld3_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld3.16 {D0, D1, D2}, [R0]'
+
+   * uint8x8x3_t vld3_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld3.8 {D0, D1, D2}, [R0]'
+
+   * int32x2x3_t vld3_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld3.32 {D0, D1, D2}, [R0]'
+
+   * int16x4x3_t vld3_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld3.16 {D0, D1, D2}, [R0]'
+
+   * int8x8x3_t vld3_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld3.8 {D0, D1, D2}, [R0]'
+
+   * float32x2x3_t vld3_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld3.32 {D0, D1, D2}, [R0]'
+
+   * poly16x4x3_t vld3_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld3.16 {D0, D1, D2}, [R0]'
+
+   * poly8x8x3_t vld3_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld3.8 {D0, D1, D2}, [R0]'
+
+   * uint64x1x3_t vld3_u64 (const uint64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1, D2}, [R0]'
+
+   * int64x1x3_t vld3_s64 (const int64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1, D2}, [R0]'
+
+   * uint32x4x3_t vld3q_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld3.32 {D0, D1, D2}, [R0]'
+
+   * uint16x8x3_t vld3q_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld3.16 {D0, D1, D2}, [R0]'
+
+   * uint8x16x3_t vld3q_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld3.8 {D0, D1, D2}, [R0]'
+
+   * int32x4x3_t vld3q_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld3.32 {D0, D1, D2}, [R0]'
+
+   * int16x8x3_t vld3q_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld3.16 {D0, D1, D2}, [R0]'
+
+   * int8x16x3_t vld3q_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld3.8 {D0, D1, D2}, [R0]'
+
+   * float32x4x3_t vld3q_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld3.32 {D0, D1, D2}, [R0]'
+
+   * poly16x8x3_t vld3q_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld3.16 {D0, D1, D2}, [R0]'
+
+   * poly8x16x3_t vld3q_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld3.8 {D0, D1, D2}, [R0]'
+
+   * uint32x2x3_t vld3_lane_u32 (const uint32_t *, uint32x2x3_t, const
+     int)
+     _Form of expected instruction(s):_ `vld3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * uint16x4x3_t vld3_lane_u16 (const uint16_t *, uint16x4x3_t, const
+     int)
+     _Form of expected instruction(s):_ `vld3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * uint8x8x3_t vld3_lane_u8 (const uint8_t *, uint8x8x3_t, const int)
+     _Form of expected instruction(s):_ `vld3.8 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * int32x2x3_t vld3_lane_s32 (const int32_t *, int32x2x3_t, const int)
+     _Form of expected instruction(s):_ `vld3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * int16x4x3_t vld3_lane_s16 (const int16_t *, int16x4x3_t, const int)
+     _Form of expected instruction(s):_ `vld3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * int8x8x3_t vld3_lane_s8 (const int8_t *, int8x8x3_t, const int)
+     _Form of expected instruction(s):_ `vld3.8 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * float32x2x3_t vld3_lane_f32 (const float32_t *, float32x2x3_t,
+     const int)
+     _Form of expected instruction(s):_ `vld3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * poly16x4x3_t vld3_lane_p16 (const poly16_t *, poly16x4x3_t, const
+     int)
+     _Form of expected instruction(s):_ `vld3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * poly8x8x3_t vld3_lane_p8 (const poly8_t *, poly8x8x3_t, const int)
+     _Form of expected instruction(s):_ `vld3.8 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * int32x4x3_t vld3q_lane_s32 (const int32_t *, int32x4x3_t, const
+     int)
+     _Form of expected instruction(s):_ `vld3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * int16x8x3_t vld3q_lane_s16 (const int16_t *, int16x8x3_t, const
+     int)
+     _Form of expected instruction(s):_ `vld3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * uint32x4x3_t vld3q_lane_u32 (const uint32_t *, uint32x4x3_t, const
+     int)
+     _Form of expected instruction(s):_ `vld3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * uint16x8x3_t vld3q_lane_u16 (const uint16_t *, uint16x8x3_t, const
+     int)
+     _Form of expected instruction(s):_ `vld3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * float32x4x3_t vld3q_lane_f32 (const float32_t *, float32x4x3_t,
+     const int)
+     _Form of expected instruction(s):_ `vld3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * poly16x8x3_t vld3q_lane_p16 (const poly16_t *, poly16x8x3_t, const
+     int)
+     _Form of expected instruction(s):_ `vld3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * uint32x2x3_t vld3_dup_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld3.32 {D0[], D1[], D2[]},
+     [R0]'
+
+   * uint16x4x3_t vld3_dup_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld3.16 {D0[], D1[], D2[]},
+     [R0]'
+
+   * uint8x8x3_t vld3_dup_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld3.8 {D0[], D1[], D2[]},
+     [R0]'
+
+   * int32x2x3_t vld3_dup_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld3.32 {D0[], D1[], D2[]},
+     [R0]'
+
+   * int16x4x3_t vld3_dup_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld3.16 {D0[], D1[], D2[]},
+     [R0]'
+
+   * int8x8x3_t vld3_dup_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld3.8 {D0[], D1[], D2[]},
+     [R0]'
+
+   * float32x2x3_t vld3_dup_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld3.32 {D0[], D1[], D2[]},
+     [R0]'
+
+   * poly16x4x3_t vld3_dup_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld3.16 {D0[], D1[], D2[]},
+     [R0]'
+
+   * poly8x8x3_t vld3_dup_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld3.8 {D0[], D1[], D2[]},
+     [R0]'
+
+   * uint64x1x3_t vld3_dup_u64 (const uint64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1, D2}, [R0]'
+
+   * int64x1x3_t vld3_dup_s64 (const int64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1, D2}, [R0]'
+
+6.54.3.73 Element/structure stores, VST3 variants
+.................................................
+
+   * void vst3_u32 (uint32_t *, uint32x2x3_t)
+     _Form of expected instruction(s):_ `vst3.32 {D0, D1, D2, D3}, [R0]'
+
+   * void vst3_u16 (uint16_t *, uint16x4x3_t)
+     _Form of expected instruction(s):_ `vst3.16 {D0, D1, D2, D3}, [R0]'
+
+   * void vst3_u8 (uint8_t *, uint8x8x3_t)
+     _Form of expected instruction(s):_ `vst3.8 {D0, D1, D2, D3}, [R0]'
+
+   * void vst3_s32 (int32_t *, int32x2x3_t)
+     _Form of expected instruction(s):_ `vst3.32 {D0, D1, D2, D3}, [R0]'
+
+   * void vst3_s16 (int16_t *, int16x4x3_t)
+     _Form of expected instruction(s):_ `vst3.16 {D0, D1, D2, D3}, [R0]'
+
+   * void vst3_s8 (int8_t *, int8x8x3_t)
+     _Form of expected instruction(s):_ `vst3.8 {D0, D1, D2, D3}, [R0]'
+
+   * void vst3_f32 (float32_t *, float32x2x3_t)
+     _Form of expected instruction(s):_ `vst3.32 {D0, D1, D2, D3}, [R0]'
+
+   * void vst3_p16 (poly16_t *, poly16x4x3_t)
+     _Form of expected instruction(s):_ `vst3.16 {D0, D1, D2, D3}, [R0]'
+
+   * void vst3_p8 (poly8_t *, poly8x8x3_t)
+     _Form of expected instruction(s):_ `vst3.8 {D0, D1, D2, D3}, [R0]'
+
+   * void vst3_u64 (uint64_t *, uint64x1x3_t)
+     _Form of expected instruction(s):_ `vst1.64 {D0, D1, D2, D3}, [R0]'
+
+   * void vst3_s64 (int64_t *, int64x1x3_t)
+     _Form of expected instruction(s):_ `vst1.64 {D0, D1, D2, D3}, [R0]'
+
+   * void vst3q_u32 (uint32_t *, uint32x4x3_t)
+     _Form of expected instruction(s):_ `vst3.32 {D0, D1, D2}, [R0]'
+
+   * void vst3q_u16 (uint16_t *, uint16x8x3_t)
+     _Form of expected instruction(s):_ `vst3.16 {D0, D1, D2}, [R0]'
+
+   * void vst3q_u8 (uint8_t *, uint8x16x3_t)
+     _Form of expected instruction(s):_ `vst3.8 {D0, D1, D2}, [R0]'
+
+   * void vst3q_s32 (int32_t *, int32x4x3_t)
+     _Form of expected instruction(s):_ `vst3.32 {D0, D1, D2}, [R0]'
+
+   * void vst3q_s16 (int16_t *, int16x8x3_t)
+     _Form of expected instruction(s):_ `vst3.16 {D0, D1, D2}, [R0]'
+
+   * void vst3q_s8 (int8_t *, int8x16x3_t)
+     _Form of expected instruction(s):_ `vst3.8 {D0, D1, D2}, [R0]'
+
+   * void vst3q_f32 (float32_t *, float32x4x3_t)
+     _Form of expected instruction(s):_ `vst3.32 {D0, D1, D2}, [R0]'
+
+   * void vst3q_p16 (poly16_t *, poly16x8x3_t)
+     _Form of expected instruction(s):_ `vst3.16 {D0, D1, D2}, [R0]'
+
+   * void vst3q_p8 (poly8_t *, poly8x16x3_t)
+     _Form of expected instruction(s):_ `vst3.8 {D0, D1, D2}, [R0]'
+
+   * void vst3_lane_u32 (uint32_t *, uint32x2x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3_lane_u16 (uint16_t *, uint16x4x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3_lane_u8 (uint8_t *, uint8x8x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.8 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3_lane_s32 (int32_t *, int32x2x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3_lane_s16 (int16_t *, int16x4x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3_lane_s8 (int8_t *, int8x8x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.8 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3_lane_f32 (float32_t *, float32x2x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3_lane_p16 (poly16_t *, poly16x4x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3_lane_p8 (poly8_t *, poly8x8x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.8 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3q_lane_s32 (int32_t *, int32x4x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3q_lane_s16 (int16_t *, int16x8x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3q_lane_u32 (uint32_t *, uint32x4x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3q_lane_u16 (uint16_t *, uint16x8x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3q_lane_f32 (float32_t *, float32x4x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3q_lane_p16 (poly16_t *, poly16x8x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+6.54.3.74 Element/structure loads, VLD4 variants
+................................................
+
+   * uint32x2x4_t vld4_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld4.32 {D0, D1, D2, D3}, [R0]'
+
+   * uint16x4x4_t vld4_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld4.16 {D0, D1, D2, D3}, [R0]'
+
+   * uint8x8x4_t vld4_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld4.8 {D0, D1, D2, D3}, [R0]'
+
+   * int32x2x4_t vld4_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld4.32 {D0, D1, D2, D3}, [R0]'
+
+   * int16x4x4_t vld4_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld4.16 {D0, D1, D2, D3}, [R0]'
+
+   * int8x8x4_t vld4_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld4.8 {D0, D1, D2, D3}, [R0]'
+
+   * float32x2x4_t vld4_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld4.32 {D0, D1, D2, D3}, [R0]'
+
+   * poly16x4x4_t vld4_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld4.16 {D0, D1, D2, D3}, [R0]'
+
+   * poly8x8x4_t vld4_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld4.8 {D0, D1, D2, D3}, [R0]'
+
+   * uint64x1x4_t vld4_u64 (const uint64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1, D2, D3}, [R0]'
+
+   * int64x1x4_t vld4_s64 (const int64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1, D2, D3}, [R0]'
+
+   * uint32x4x4_t vld4q_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld4.32 {D0, D1, D2, D3}, [R0]'
+
+   * uint16x8x4_t vld4q_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld4.16 {D0, D1, D2, D3}, [R0]'
+
+   * uint8x16x4_t vld4q_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld4.8 {D0, D1, D2, D3}, [R0]'
+
+   * int32x4x4_t vld4q_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld4.32 {D0, D1, D2, D3}, [R0]'
+
+   * int16x8x4_t vld4q_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld4.16 {D0, D1, D2, D3}, [R0]'
+
+   * int8x16x4_t vld4q_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld4.8 {D0, D1, D2, D3}, [R0]'
+
+   * float32x4x4_t vld4q_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld4.32 {D0, D1, D2, D3}, [R0]'
+
+   * poly16x8x4_t vld4q_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld4.16 {D0, D1, D2, D3}, [R0]'
+
+   * poly8x16x4_t vld4q_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld4.8 {D0, D1, D2, D3}, [R0]'
+
+   * uint32x2x4_t vld4_lane_u32 (const uint32_t *, uint32x2x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vld4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * uint16x4x4_t vld4_lane_u16 (const uint16_t *, uint16x4x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vld4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * uint8x8x4_t vld4_lane_u8 (const uint8_t *, uint8x8x4_t, const int)
+     _Form of expected instruction(s):_ `vld4.8 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * int32x2x4_t vld4_lane_s32 (const int32_t *, int32x2x4_t, const int)
+     _Form of expected instruction(s):_ `vld4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * int16x4x4_t vld4_lane_s16 (const int16_t *, int16x4x4_t, const int)
+     _Form of expected instruction(s):_ `vld4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * int8x8x4_t vld4_lane_s8 (const int8_t *, int8x8x4_t, const int)
+     _Form of expected instruction(s):_ `vld4.8 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * float32x2x4_t vld4_lane_f32 (const float32_t *, float32x2x4_t,
+     const int)
+     _Form of expected instruction(s):_ `vld4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * poly16x4x4_t vld4_lane_p16 (const poly16_t *, poly16x4x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vld4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * poly8x8x4_t vld4_lane_p8 (const poly8_t *, poly8x8x4_t, const int)
+     _Form of expected instruction(s):_ `vld4.8 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * int32x4x4_t vld4q_lane_s32 (const int32_t *, int32x4x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vld4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * int16x8x4_t vld4q_lane_s16 (const int16_t *, int16x8x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vld4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * uint32x4x4_t vld4q_lane_u32 (const uint32_t *, uint32x4x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vld4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * uint16x8x4_t vld4q_lane_u16 (const uint16_t *, uint16x8x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vld4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * float32x4x4_t vld4q_lane_f32 (const float32_t *, float32x4x4_t,
+     const int)
+     _Form of expected instruction(s):_ `vld4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * poly16x8x4_t vld4q_lane_p16 (const poly16_t *, poly16x8x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vld4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * uint32x2x4_t vld4_dup_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld4.32 {D0[], D1[], D2[],
+     D3[]}, [R0]'
+
+   * uint16x4x4_t vld4_dup_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld4.16 {D0[], D1[], D2[],
+     D3[]}, [R0]'
+
+   * uint8x8x4_t vld4_dup_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld4.8 {D0[], D1[], D2[],
+     D3[]}, [R0]'
+
+   * int32x2x4_t vld4_dup_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld4.32 {D0[], D1[], D2[],
+     D3[]}, [R0]'
+
+   * int16x4x4_t vld4_dup_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld4.16 {D0[], D1[], D2[],
+     D3[]}, [R0]'
+
+   * int8x8x4_t vld4_dup_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld4.8 {D0[], D1[], D2[],
+     D3[]}, [R0]'
+
+   * float32x2x4_t vld4_dup_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld4.32 {D0[], D1[], D2[],
+     D3[]}, [R0]'
+
+   * poly16x4x4_t vld4_dup_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld4.16 {D0[], D1[], D2[],
+     D3[]}, [R0]'
+
+   * poly8x8x4_t vld4_dup_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld4.8 {D0[], D1[], D2[],
+     D3[]}, [R0]'
+
+   * uint64x1x4_t vld4_dup_u64 (const uint64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1, D2, D3}, [R0]'
+
+   * int64x1x4_t vld4_dup_s64 (const int64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1, D2, D3}, [R0]'
+
+6.54.3.75 Element/structure stores, VST4 variants
+.................................................
+
+   * void vst4_u32 (uint32_t *, uint32x2x4_t)
+     _Form of expected instruction(s):_ `vst4.32 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4_u16 (uint16_t *, uint16x4x4_t)
+     _Form of expected instruction(s):_ `vst4.16 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4_u8 (uint8_t *, uint8x8x4_t)
+     _Form of expected instruction(s):_ `vst4.8 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4_s32 (int32_t *, int32x2x4_t)
+     _Form of expected instruction(s):_ `vst4.32 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4_s16 (int16_t *, int16x4x4_t)
+     _Form of expected instruction(s):_ `vst4.16 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4_s8 (int8_t *, int8x8x4_t)
+     _Form of expected instruction(s):_ `vst4.8 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4_f32 (float32_t *, float32x2x4_t)
+     _Form of expected instruction(s):_ `vst4.32 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4_p16 (poly16_t *, poly16x4x4_t)
+     _Form of expected instruction(s):_ `vst4.16 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4_p8 (poly8_t *, poly8x8x4_t)
+     _Form of expected instruction(s):_ `vst4.8 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4_u64 (uint64_t *, uint64x1x4_t)
+     _Form of expected instruction(s):_ `vst1.64 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4_s64 (int64_t *, int64x1x4_t)
+     _Form of expected instruction(s):_ `vst1.64 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4q_u32 (uint32_t *, uint32x4x4_t)
+     _Form of expected instruction(s):_ `vst4.32 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4q_u16 (uint16_t *, uint16x8x4_t)
+     _Form of expected instruction(s):_ `vst4.16 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4q_u8 (uint8_t *, uint8x16x4_t)
+     _Form of expected instruction(s):_ `vst4.8 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4q_s32 (int32_t *, int32x4x4_t)
+     _Form of expected instruction(s):_ `vst4.32 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4q_s16 (int16_t *, int16x8x4_t)
+     _Form of expected instruction(s):_ `vst4.16 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4q_s8 (int8_t *, int8x16x4_t)
+     _Form of expected instruction(s):_ `vst4.8 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4q_f32 (float32_t *, float32x4x4_t)
+     _Form of expected instruction(s):_ `vst4.32 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4q_p16 (poly16_t *, poly16x8x4_t)
+     _Form of expected instruction(s):_ `vst4.16 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4q_p8 (poly8_t *, poly8x16x4_t)
+     _Form of expected instruction(s):_ `vst4.8 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4_lane_u32 (uint32_t *, uint32x2x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4_lane_u16 (uint16_t *, uint16x4x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4_lane_u8 (uint8_t *, uint8x8x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.8 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4_lane_s32 (int32_t *, int32x2x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4_lane_s16 (int16_t *, int16x4x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4_lane_s8 (int8_t *, int8x8x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.8 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4_lane_f32 (float32_t *, float32x2x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4_lane_p16 (poly16_t *, poly16x4x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4_lane_p8 (poly8_t *, poly8x8x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.8 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4q_lane_s32 (int32_t *, int32x4x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4q_lane_s16 (int16_t *, int16x8x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4q_lane_u32 (uint32_t *, uint32x4x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4q_lane_u16 (uint16_t *, uint16x8x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4q_lane_f32 (float32_t *, float32x4x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4q_lane_p16 (poly16_t *, poly16x8x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+6.54.3.76 Logical operations (AND)
+..................................
+
+   * uint32x2_t vand_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vand D0, D0, D0'
+
+   * uint16x4_t vand_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vand D0, D0, D0'
+
+   * uint8x8_t vand_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vand D0, D0, D0'
+
+   * int32x2_t vand_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vand D0, D0, D0'
+
+   * int16x4_t vand_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vand D0, D0, D0'
+
+   * int8x8_t vand_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vand D0, D0, D0'
+
+   * uint64x1_t vand_u64 (uint64x1_t, uint64x1_t)
+
+   * int64x1_t vand_s64 (int64x1_t, int64x1_t)
+
+   * uint32x4_t vandq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vand Q0, Q0, Q0'
+
+   * uint16x8_t vandq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vand Q0, Q0, Q0'
+
+   * uint8x16_t vandq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vand Q0, Q0, Q0'
+
+   * int32x4_t vandq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vand Q0, Q0, Q0'
+
+   * int16x8_t vandq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vand Q0, Q0, Q0'
+
+   * int8x16_t vandq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vand Q0, Q0, Q0'
+
+   * uint64x2_t vandq_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vand Q0, Q0, Q0'
+
+   * int64x2_t vandq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vand Q0, Q0, Q0'
+
+6.54.3.77 Logical operations (OR)
+.................................
+
+   * uint32x2_t vorr_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vorr D0, D0, D0'
+
+   * uint16x4_t vorr_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vorr D0, D0, D0'
+
+   * uint8x8_t vorr_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vorr D0, D0, D0'
+
+   * int32x2_t vorr_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vorr D0, D0, D0'
+
+   * int16x4_t vorr_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vorr D0, D0, D0'
+
+   * int8x8_t vorr_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vorr D0, D0, D0'
+
+   * uint64x1_t vorr_u64 (uint64x1_t, uint64x1_t)
+
+   * int64x1_t vorr_s64 (int64x1_t, int64x1_t)
+
+   * uint32x4_t vorrq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vorr Q0, Q0, Q0'
+
+   * uint16x8_t vorrq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vorr Q0, Q0, Q0'
+
+   * uint8x16_t vorrq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vorr Q0, Q0, Q0'
+
+   * int32x4_t vorrq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vorr Q0, Q0, Q0'
+
+   * int16x8_t vorrq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vorr Q0, Q0, Q0'
+
+   * int8x16_t vorrq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vorr Q0, Q0, Q0'
+
+   * uint64x2_t vorrq_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vorr Q0, Q0, Q0'
+
+   * int64x2_t vorrq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vorr Q0, Q0, Q0'
+
+6.54.3.78 Logical operations (exclusive OR)
+...........................................
+
+   * uint32x2_t veor_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `veor D0, D0, D0'
+
+   * uint16x4_t veor_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `veor D0, D0, D0'
+
+   * uint8x8_t veor_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `veor D0, D0, D0'
+
+   * int32x2_t veor_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `veor D0, D0, D0'
+
+   * int16x4_t veor_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `veor D0, D0, D0'
+
+   * int8x8_t veor_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `veor D0, D0, D0'
+
+   * uint64x1_t veor_u64 (uint64x1_t, uint64x1_t)
+
+   * int64x1_t veor_s64 (int64x1_t, int64x1_t)
+
+   * uint32x4_t veorq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `veor Q0, Q0, Q0'
+
+   * uint16x8_t veorq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `veor Q0, Q0, Q0'
+
+   * uint8x16_t veorq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `veor Q0, Q0, Q0'
+
+   * int32x4_t veorq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `veor Q0, Q0, Q0'
+
+   * int16x8_t veorq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `veor Q0, Q0, Q0'
+
+   * int8x16_t veorq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `veor Q0, Q0, Q0'
+
+   * uint64x2_t veorq_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `veor Q0, Q0, Q0'
+
+   * int64x2_t veorq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `veor Q0, Q0, Q0'
+
+6.54.3.79 Logical operations (AND-NOT)
+......................................
+
+   * uint32x2_t vbic_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vbic D0, D0, D0'
+
+   * uint16x4_t vbic_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vbic D0, D0, D0'
+
+   * uint8x8_t vbic_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vbic D0, D0, D0'
+
+   * int32x2_t vbic_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vbic D0, D0, D0'
+
+   * int16x4_t vbic_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vbic D0, D0, D0'
+
+   * int8x8_t vbic_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vbic D0, D0, D0'
+
+   * uint64x1_t vbic_u64 (uint64x1_t, uint64x1_t)
+
+   * int64x1_t vbic_s64 (int64x1_t, int64x1_t)
+
+   * uint32x4_t vbicq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vbic Q0, Q0, Q0'
+
+   * uint16x8_t vbicq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vbic Q0, Q0, Q0'
+
+   * uint8x16_t vbicq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vbic Q0, Q0, Q0'
+
+   * int32x4_t vbicq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vbic Q0, Q0, Q0'
+
+   * int16x8_t vbicq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vbic Q0, Q0, Q0'
+
+   * int8x16_t vbicq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vbic Q0, Q0, Q0'
+
+   * uint64x2_t vbicq_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vbic Q0, Q0, Q0'
+
+   * int64x2_t vbicq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vbic Q0, Q0, Q0'
+
+6.54.3.80 Logical operations (OR-NOT)
+.....................................
+
+   * uint32x2_t vorn_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vorn D0, D0, D0'
+
+   * uint16x4_t vorn_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vorn D0, D0, D0'
+
+   * uint8x8_t vorn_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vorn D0, D0, D0'
+
+   * int32x2_t vorn_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vorn D0, D0, D0'
+
+   * int16x4_t vorn_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vorn D0, D0, D0'
+
+   * int8x8_t vorn_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vorn D0, D0, D0'
+
+   * uint64x1_t vorn_u64 (uint64x1_t, uint64x1_t)
+
+   * int64x1_t vorn_s64 (int64x1_t, int64x1_t)
+
+   * uint32x4_t vornq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vorn Q0, Q0, Q0'
+
+   * uint16x8_t vornq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vorn Q0, Q0, Q0'
+
+   * uint8x16_t vornq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vorn Q0, Q0, Q0'
+
+   * int32x4_t vornq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vorn Q0, Q0, Q0'
+
+   * int16x8_t vornq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vorn Q0, Q0, Q0'
+
+   * int8x16_t vornq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vorn Q0, Q0, Q0'
+
+   * uint64x2_t vornq_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vorn Q0, Q0, Q0'
+
+   * int64x2_t vornq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vorn Q0, Q0, Q0'
+
+6.54.3.81 Reinterpret casts
+...........................
+
+   * poly8x8_t vreinterpret_p8_u32 (uint32x2_t)
+
+   * poly8x8_t vreinterpret_p8_u16 (uint16x4_t)
+
+   * poly8x8_t vreinterpret_p8_u8 (uint8x8_t)
+
+   * poly8x8_t vreinterpret_p8_s32 (int32x2_t)
+
+   * poly8x8_t vreinterpret_p8_s16 (int16x4_t)
+
+   * poly8x8_t vreinterpret_p8_s8 (int8x8_t)
+
+   * poly8x8_t vreinterpret_p8_u64 (uint64x1_t)
+
+   * poly8x8_t vreinterpret_p8_s64 (int64x1_t)
+
+   * poly8x8_t vreinterpret_p8_f32 (float32x2_t)
+
+   * poly8x8_t vreinterpret_p8_p16 (poly16x4_t)
+
+   * poly8x16_t vreinterpretq_p8_u32 (uint32x4_t)
+
+   * poly8x16_t vreinterpretq_p8_u16 (uint16x8_t)
+
+   * poly8x16_t vreinterpretq_p8_u8 (uint8x16_t)
+
+   * poly8x16_t vreinterpretq_p8_s32 (int32x4_t)
+
+   * poly8x16_t vreinterpretq_p8_s16 (int16x8_t)
+
+   * poly8x16_t vreinterpretq_p8_s8 (int8x16_t)
+
+   * poly8x16_t vreinterpretq_p8_u64 (uint64x2_t)
+
+   * poly8x16_t vreinterpretq_p8_s64 (int64x2_t)
+
+   * poly8x16_t vreinterpretq_p8_f32 (float32x4_t)
+
+   * poly8x16_t vreinterpretq_p8_p16 (poly16x8_t)
+
+   * poly16x4_t vreinterpret_p16_u32 (uint32x2_t)
+
+   * poly16x4_t vreinterpret_p16_u16 (uint16x4_t)
+
+   * poly16x4_t vreinterpret_p16_u8 (uint8x8_t)
+
+   * poly16x4_t vreinterpret_p16_s32 (int32x2_t)
+
+   * poly16x4_t vreinterpret_p16_s16 (int16x4_t)
+
+   * poly16x4_t vreinterpret_p16_s8 (int8x8_t)
+
+   * poly16x4_t vreinterpret_p16_u64 (uint64x1_t)
+
+   * poly16x4_t vreinterpret_p16_s64 (int64x1_t)
+
+   * poly16x4_t vreinterpret_p16_f32 (float32x2_t)
+
+   * poly16x4_t vreinterpret_p16_p8 (poly8x8_t)
+
+   * poly16x8_t vreinterpretq_p16_u32 (uint32x4_t)
+
+   * poly16x8_t vreinterpretq_p16_u16 (uint16x8_t)
+
+   * poly16x8_t vreinterpretq_p16_u8 (uint8x16_t)
+
+   * poly16x8_t vreinterpretq_p16_s32 (int32x4_t)
+
+   * poly16x8_t vreinterpretq_p16_s16 (int16x8_t)
+
+   * poly16x8_t vreinterpretq_p16_s8 (int8x16_t)
+
+   * poly16x8_t vreinterpretq_p16_u64 (uint64x2_t)
+
+   * poly16x8_t vreinterpretq_p16_s64 (int64x2_t)
+
+   * poly16x8_t vreinterpretq_p16_f32 (float32x4_t)
+
+   * poly16x8_t vreinterpretq_p16_p8 (poly8x16_t)
+
+   * float32x2_t vreinterpret_f32_u32 (uint32x2_t)
+
+   * float32x2_t vreinterpret_f32_u16 (uint16x4_t)
+
+   * float32x2_t vreinterpret_f32_u8 (uint8x8_t)
+
+   * float32x2_t vreinterpret_f32_s32 (int32x2_t)
+
+   * float32x2_t vreinterpret_f32_s16 (int16x4_t)
+
+   * float32x2_t vreinterpret_f32_s8 (int8x8_t)
+
+   * float32x2_t vreinterpret_f32_u64 (uint64x1_t)
+
+   * float32x2_t vreinterpret_f32_s64 (int64x1_t)
+
+   * float32x2_t vreinterpret_f32_p16 (poly16x4_t)
+
+   * float32x2_t vreinterpret_f32_p8 (poly8x8_t)
+
+   * float32x4_t vreinterpretq_f32_u32 (uint32x4_t)
+
+   * float32x4_t vreinterpretq_f32_u16 (uint16x8_t)
+
+   * float32x4_t vreinterpretq_f32_u8 (uint8x16_t)
+
+   * float32x4_t vreinterpretq_f32_s32 (int32x4_t)
+
+   * float32x4_t vreinterpretq_f32_s16 (int16x8_t)
+
+   * float32x4_t vreinterpretq_f32_s8 (int8x16_t)
+
+   * float32x4_t vreinterpretq_f32_u64 (uint64x2_t)
+
+   * float32x4_t vreinterpretq_f32_s64 (int64x2_t)
+
+   * float32x4_t vreinterpretq_f32_p16 (poly16x8_t)
+
+   * float32x4_t vreinterpretq_f32_p8 (poly8x16_t)
+
+   * int64x1_t vreinterpret_s64_u32 (uint32x2_t)
+
+   * int64x1_t vreinterpret_s64_u16 (uint16x4_t)
+
+   * int64x1_t vreinterpret_s64_u8 (uint8x8_t)
+
+   * int64x1_t vreinterpret_s64_s32 (int32x2_t)
+
+   * int64x1_t vreinterpret_s64_s16 (int16x4_t)
+
+   * int64x1_t vreinterpret_s64_s8 (int8x8_t)
+
+   * int64x1_t vreinterpret_s64_u64 (uint64x1_t)
+
+   * int64x1_t vreinterpret_s64_f32 (float32x2_t)
+
+   * int64x1_t vreinterpret_s64_p16 (poly16x4_t)
+
+   * int64x1_t vreinterpret_s64_p8 (poly8x8_t)
+
+   * int64x2_t vreinterpretq_s64_u32 (uint32x4_t)
+
+   * int64x2_t vreinterpretq_s64_u16 (uint16x8_t)
+
+   * int64x2_t vreinterpretq_s64_u8 (uint8x16_t)
+
+   * int64x2_t vreinterpretq_s64_s32 (int32x4_t)
+
+   * int64x2_t vreinterpretq_s64_s16 (int16x8_t)
+
+   * int64x2_t vreinterpretq_s64_s8 (int8x16_t)
+
+   * int64x2_t vreinterpretq_s64_u64 (uint64x2_t)
+
+   * int64x2_t vreinterpretq_s64_f32 (float32x4_t)
+
+   * int64x2_t vreinterpretq_s64_p16 (poly16x8_t)
+
+   * int64x2_t vreinterpretq_s64_p8 (poly8x16_t)
+
+   * uint64x1_t vreinterpret_u64_u32 (uint32x2_t)
+
+   * uint64x1_t vreinterpret_u64_u16 (uint16x4_t)
+
+   * uint64x1_t vreinterpret_u64_u8 (uint8x8_t)
+
+   * uint64x1_t vreinterpret_u64_s32 (int32x2_t)
+
+   * uint64x1_t vreinterpret_u64_s16 (int16x4_t)
+
+   * uint64x1_t vreinterpret_u64_s8 (int8x8_t)
+
+   * uint64x1_t vreinterpret_u64_s64 (int64x1_t)
+
+   * uint64x1_t vreinterpret_u64_f32 (float32x2_t)
+
+   * uint64x1_t vreinterpret_u64_p16 (poly16x4_t)
+
+   * uint64x1_t vreinterpret_u64_p8 (poly8x8_t)
+
+   * uint64x2_t vreinterpretq_u64_u32 (uint32x4_t)
+
+   * uint64x2_t vreinterpretq_u64_u16 (uint16x8_t)
+
+   * uint64x2_t vreinterpretq_u64_u8 (uint8x16_t)
+
+   * uint64x2_t vreinterpretq_u64_s32 (int32x4_t)
+
+   * uint64x2_t vreinterpretq_u64_s16 (int16x8_t)
+
+   * uint64x2_t vreinterpretq_u64_s8 (int8x16_t)
+
+   * uint64x2_t vreinterpretq_u64_s64 (int64x2_t)
+
+   * uint64x2_t vreinterpretq_u64_f32 (float32x4_t)
+
+   * uint64x2_t vreinterpretq_u64_p16 (poly16x8_t)
+
+   * uint64x2_t vreinterpretq_u64_p8 (poly8x16_t)
+
+   * int8x8_t vreinterpret_s8_u32 (uint32x2_t)
+
+   * int8x8_t vreinterpret_s8_u16 (uint16x4_t)
+
+   * int8x8_t vreinterpret_s8_u8 (uint8x8_t)
+
+   * int8x8_t vreinterpret_s8_s32 (int32x2_t)
+
+   * int8x8_t vreinterpret_s8_s16 (int16x4_t)
+
+   * int8x8_t vreinterpret_s8_u64 (uint64x1_t)
+
+   * int8x8_t vreinterpret_s8_s64 (int64x1_t)
+
+   * int8x8_t vreinterpret_s8_f32 (float32x2_t)
+
+   * int8x8_t vreinterpret_s8_p16 (poly16x4_t)
+
+   * int8x8_t vreinterpret_s8_p8 (poly8x8_t)
+
+   * int8x16_t vreinterpretq_s8_u32 (uint32x4_t)
+
+   * int8x16_t vreinterpretq_s8_u16 (uint16x8_t)
+
+   * int8x16_t vreinterpretq_s8_u8 (uint8x16_t)
+
+   * int8x16_t vreinterpretq_s8_s32 (int32x4_t)
+
+   * int8x16_t vreinterpretq_s8_s16 (int16x8_t)
+
+   * int8x16_t vreinterpretq_s8_u64 (uint64x2_t)
+
+   * int8x16_t vreinterpretq_s8_s64 (int64x2_t)
+
+   * int8x16_t vreinterpretq_s8_f32 (float32x4_t)
+
+   * int8x16_t vreinterpretq_s8_p16 (poly16x8_t)
+
+   * int8x16_t vreinterpretq_s8_p8 (poly8x16_t)
+
+   * int16x4_t vreinterpret_s16_u32 (uint32x2_t)
+
+   * int16x4_t vreinterpret_s16_u16 (uint16x4_t)
+
+   * int16x4_t vreinterpret_s16_u8 (uint8x8_t)
+
+   * int16x4_t vreinterpret_s16_s32 (int32x2_t)
+
+   * int16x4_t vreinterpret_s16_s8 (int8x8_t)
+
+   * int16x4_t vreinterpret_s16_u64 (uint64x1_t)
+
+   * int16x4_t vreinterpret_s16_s64 (int64x1_t)
+
+   * int16x4_t vreinterpret_s16_f32 (float32x2_t)
+
+   * int16x4_t vreinterpret_s16_p16 (poly16x4_t)
+
+   * int16x4_t vreinterpret_s16_p8 (poly8x8_t)
+
+   * int16x8_t vreinterpretq_s16_u32 (uint32x4_t)
+
+   * int16x8_t vreinterpretq_s16_u16 (uint16x8_t)
+
+   * int16x8_t vreinterpretq_s16_u8 (uint8x16_t)
+
+   * int16x8_t vreinterpretq_s16_s32 (int32x4_t)
+
+   * int16x8_t vreinterpretq_s16_s8 (int8x16_t)
+
+   * int16x8_t vreinterpretq_s16_u64 (uint64x2_t)
+
+   * int16x8_t vreinterpretq_s16_s64 (int64x2_t)
+
+   * int16x8_t vreinterpretq_s16_f32 (float32x4_t)
+
+   * int16x8_t vreinterpretq_s16_p16 (poly16x8_t)
+
+   * int16x8_t vreinterpretq_s16_p8 (poly8x16_t)
+
+   * int32x2_t vreinterpret_s32_u32 (uint32x2_t)
+
+   * int32x2_t vreinterpret_s32_u16 (uint16x4_t)
+
+   * int32x2_t vreinterpret_s32_u8 (uint8x8_t)
+
+   * int32x2_t vreinterpret_s32_s16 (int16x4_t)
+
+   * int32x2_t vreinterpret_s32_s8 (int8x8_t)
+
+   * int32x2_t vreinterpret_s32_u64 (uint64x1_t)
+
+   * int32x2_t vreinterpret_s32_s64 (int64x1_t)
+
+   * int32x2_t vreinterpret_s32_f32 (float32x2_t)
+
+   * int32x2_t vreinterpret_s32_p16 (poly16x4_t)
+
+   * int32x2_t vreinterpret_s32_p8 (poly8x8_t)
+
+   * int32x4_t vreinterpretq_s32_u32 (uint32x4_t)
+
+   * int32x4_t vreinterpretq_s32_u16 (uint16x8_t)
+
+   * int32x4_t vreinterpretq_s32_u8 (uint8x16_t)
+
+   * int32x4_t vreinterpretq_s32_s16 (int16x8_t)
+
+   * int32x4_t vreinterpretq_s32_s8 (int8x16_t)
+
+   * int32x4_t vreinterpretq_s32_u64 (uint64x2_t)
+
+   * int32x4_t vreinterpretq_s32_s64 (int64x2_t)
+
+   * int32x4_t vreinterpretq_s32_f32 (float32x4_t)
+
+   * int32x4_t vreinterpretq_s32_p16 (poly16x8_t)
+
+   * int32x4_t vreinterpretq_s32_p8 (poly8x16_t)
+
+   * uint8x8_t vreinterpret_u8_u32 (uint32x2_t)
+
+   * uint8x8_t vreinterpret_u8_u16 (uint16x4_t)
+
+   * uint8x8_t vreinterpret_u8_s32 (int32x2_t)
+
+   * uint8x8_t vreinterpret_u8_s16 (int16x4_t)
+
+   * uint8x8_t vreinterpret_u8_s8 (int8x8_t)
+
+   * uint8x8_t vreinterpret_u8_u64 (uint64x1_t)
+
+   * uint8x8_t vreinterpret_u8_s64 (int64x1_t)
+
+   * uint8x8_t vreinterpret_u8_f32 (float32x2_t)
+
+   * uint8x8_t vreinterpret_u8_p16 (poly16x4_t)
+
+   * uint8x8_t vreinterpret_u8_p8 (poly8x8_t)
+
+   * uint8x16_t vreinterpretq_u8_u32 (uint32x4_t)
+
+   * uint8x16_t vreinterpretq_u8_u16 (uint16x8_t)
+
+   * uint8x16_t vreinterpretq_u8_s32 (int32x4_t)
+
+   * uint8x16_t vreinterpretq_u8_s16 (int16x8_t)
+
+   * uint8x16_t vreinterpretq_u8_s8 (int8x16_t)
+
+   * uint8x16_t vreinterpretq_u8_u64 (uint64x2_t)
+
+   * uint8x16_t vreinterpretq_u8_s64 (int64x2_t)
+
+   * uint8x16_t vreinterpretq_u8_f32 (float32x4_t)
+
+   * uint8x16_t vreinterpretq_u8_p16 (poly16x8_t)
+
+   * uint8x16_t vreinterpretq_u8_p8 (poly8x16_t)
+
+   * uint16x4_t vreinterpret_u16_u32 (uint32x2_t)
+
+   * uint16x4_t vreinterpret_u16_u8 (uint8x8_t)
+
+   * uint16x4_t vreinterpret_u16_s32 (int32x2_t)
+
+   * uint16x4_t vreinterpret_u16_s16 (int16x4_t)
+
+   * uint16x4_t vreinterpret_u16_s8 (int8x8_t)
+
+   * uint16x4_t vreinterpret_u16_u64 (uint64x1_t)
+
+   * uint16x4_t vreinterpret_u16_s64 (int64x1_t)
+
+   * uint16x4_t vreinterpret_u16_f32 (float32x2_t)
+
+   * uint16x4_t vreinterpret_u16_p16 (poly16x4_t)
+
+   * uint16x4_t vreinterpret_u16_p8 (poly8x8_t)
+
+   * uint16x8_t vreinterpretq_u16_u32 (uint32x4_t)
+
+   * uint16x8_t vreinterpretq_u16_u8 (uint8x16_t)
+
+   * uint16x8_t vreinterpretq_u16_s32 (int32x4_t)
+
+   * uint16x8_t vreinterpretq_u16_s16 (int16x8_t)
+
+   * uint16x8_t vreinterpretq_u16_s8 (int8x16_t)
+
+   * uint16x8_t vreinterpretq_u16_u64 (uint64x2_t)
+
+   * uint16x8_t vreinterpretq_u16_s64 (int64x2_t)
+
+   * uint16x8_t vreinterpretq_u16_f32 (float32x4_t)
+
+   * uint16x8_t vreinterpretq_u16_p16 (poly16x8_t)
+
+   * uint16x8_t vreinterpretq_u16_p8 (poly8x16_t)
+
+   * uint32x2_t vreinterpret_u32_u16 (uint16x4_t)
+
+   * uint32x2_t vreinterpret_u32_u8 (uint8x8_t)
+
+   * uint32x2_t vreinterpret_u32_s32 (int32x2_t)
+
+   * uint32x2_t vreinterpret_u32_s16 (int16x4_t)
+
+   * uint32x2_t vreinterpret_u32_s8 (int8x8_t)
+
+   * uint32x2_t vreinterpret_u32_u64 (uint64x1_t)
+
+   * uint32x2_t vreinterpret_u32_s64 (int64x1_t)
+
+   * uint32x2_t vreinterpret_u32_f32 (float32x2_t)
+
+   * uint32x2_t vreinterpret_u32_p16 (poly16x4_t)
+
+   * uint32x2_t vreinterpret_u32_p8 (poly8x8_t)
+
+   * uint32x4_t vreinterpretq_u32_u16 (uint16x8_t)
+
+   * uint32x4_t vreinterpretq_u32_u8 (uint8x16_t)
+
+   * uint32x4_t vreinterpretq_u32_s32 (int32x4_t)
+
+   * uint32x4_t vreinterpretq_u32_s16 (int16x8_t)
+
+   * uint32x4_t vreinterpretq_u32_s8 (int8x16_t)
+
+   * uint32x4_t vreinterpretq_u32_u64 (uint64x2_t)
+
+   * uint32x4_t vreinterpretq_u32_s64 (int64x2_t)
+
+   * uint32x4_t vreinterpretq_u32_f32 (float32x4_t)
+
+   * uint32x4_t vreinterpretq_u32_p16 (poly16x8_t)
+
+   * uint32x4_t vreinterpretq_u32_p8 (poly8x16_t)
+
+
+File: gcc.info,  Node: Blackfin Built-in Functions,  Next: FR-V Built-in Functions,  Prev: ARM NEON Intrinsics,  Up: Target Builtins
+
+6.54.4 Blackfin Built-in Functions
+----------------------------------
+
+Currently, there are two Blackfin-specific built-in functions.  These
+are used for generating `CSYNC' and `SSYNC' machine insns without using
+inline assembly; by using these built-in functions the compiler can
+automatically add workarounds for hardware errata involving these
+instructions.  These functions are named as follows:
+
+     void __builtin_bfin_csync (void)
+     void __builtin_bfin_ssync (void)
+
+
+File: gcc.info,  Node: FR-V Built-in Functions,  Next: X86 Built-in Functions,  Prev: Blackfin Built-in Functions,  Up: Target Builtins
+
+6.54.5 FR-V Built-in Functions
+------------------------------
+
+GCC provides many FR-V-specific built-in functions.  In general, these
+functions are intended to be compatible with those described by `FR-V
+Family, Softune C/C++ Compiler Manual (V6), Fujitsu Semiconductor'.
+The two exceptions are `__MDUNPACKH' and `__MBTOHE', the gcc forms of
+which pass 128-bit values by pointer rather than by value.
+
+ Most of the functions are named after specific FR-V instructions.
+Such functions are said to be "directly mapped" and are summarized here
+in tabular form.
+
+* Menu:
+
+* Argument Types::
+* Directly-mapped Integer Functions::
+* Directly-mapped Media Functions::
+* Raw read/write Functions::
+* Other Built-in Functions::
+
+
+File: gcc.info,  Node: Argument Types,  Next: Directly-mapped Integer Functions,  Up: FR-V Built-in Functions
+
+6.54.5.1 Argument Types
+.......................
+
+The arguments to the built-in functions can be divided into three
+groups: register numbers, compile-time constants and run-time values.
+In order to make this classification clear at a glance, the arguments
+and return values are given the following pseudo types:
+
+Pseudo type    Real C type            Constant?   Description
+`uh'           `unsigned short'       No          an unsigned halfword
+`uw1'          `unsigned int'         No          an unsigned word
+`sw1'          `int'                  No          a signed word
+`uw2'          `unsigned long long'   No          an unsigned doubleword
+`sw2'          `long long'            No          a signed doubleword
+`const'        `int'                  Yes         an integer constant
+`acc'          `int'                  Yes         an ACC register number
+`iacc'         `int'                  Yes         an IACC register number
+
+ These pseudo types are not defined by GCC, they are simply a notational
+convenience used in this manual.
+
+ Arguments of type `uh', `uw1', `sw1', `uw2' and `sw2' are evaluated at
+run time.  They correspond to register operands in the underlying FR-V
+instructions.
+
+ `const' arguments represent immediate operands in the underlying FR-V
+instructions.  They must be compile-time constants.
+
+ `acc' arguments are evaluated at compile time and specify the number
+of an accumulator register.  For example, an `acc' argument of 2 will
+select the ACC2 register.
+
+ `iacc' arguments are similar to `acc' arguments but specify the number
+of an IACC register.  See *note Other Built-in Functions:: for more
+details.
+
+
+File: gcc.info,  Node: Directly-mapped Integer Functions,  Next: Directly-mapped Media Functions,  Prev: Argument Types,  Up: FR-V Built-in Functions
+
+6.54.5.2 Directly-mapped Integer Functions
+..........................................
+
+The functions listed below map directly to FR-V I-type instructions.
+
+Function prototype               Example usage           Assembly output
+`sw1 __ADDSS (sw1, sw1)'         `C = __ADDSS (A, B)'    `ADDSS A,B,C'
+`sw1 __SCAN (sw1, sw1)'          `C = __SCAN (A, B)'     `SCAN A,B,C'
+`sw1 __SCUTSS (sw1)'             `B = __SCUTSS (A)'      `SCUTSS A,B'
+`sw1 __SLASS (sw1, sw1)'         `C = __SLASS (A, B)'    `SLASS A,B,C'
+`void __SMASS (sw1, sw1)'        `__SMASS (A, B)'        `SMASS A,B'
+`void __SMSSS (sw1, sw1)'        `__SMSSS (A, B)'        `SMSSS A,B'
+`void __SMU (sw1, sw1)'          `__SMU (A, B)'          `SMU A,B'
+`sw2 __SMUL (sw1, sw1)'          `C = __SMUL (A, B)'     `SMUL A,B,C'
+`sw1 __SUBSS (sw1, sw1)'         `C = __SUBSS (A, B)'    `SUBSS A,B,C'
+`uw2 __UMUL (uw1, uw1)'          `C = __UMUL (A, B)'     `UMUL A,B,C'
+
+
+File: gcc.info,  Node: Directly-mapped Media Functions,  Next: Raw read/write Functions,  Prev: Directly-mapped Integer Functions,  Up: FR-V Built-in Functions
+
+6.54.5.3 Directly-mapped Media Functions
+........................................
+
+The functions listed below map directly to FR-V M-type instructions.
+
+Function prototype               Example usage           Assembly output
+`uw1 __MABSHS (sw1)'             `B = __MABSHS (A)'      `MABSHS A,B'
+`void __MADDACCS (acc, acc)'     `__MADDACCS (B, A)'     `MADDACCS A,B'
+`sw1 __MADDHSS (sw1, sw1)'       `C = __MADDHSS (A, B)'  `MADDHSS A,B,C'
+`uw1 __MADDHUS (uw1, uw1)'       `C = __MADDHUS (A, B)'  `MADDHUS A,B,C'
+`uw1 __MAND (uw1, uw1)'          `C = __MAND (A, B)'     `MAND A,B,C'
+`void __MASACCS (acc, acc)'      `__MASACCS (B, A)'      `MASACCS A,B'
+`uw1 __MAVEH (uw1, uw1)'         `C = __MAVEH (A, B)'    `MAVEH A,B,C'
+`uw2 __MBTOH (uw1)'              `B = __MBTOH (A)'       `MBTOH A,B'
+`void __MBTOHE (uw1 *, uw1)'     `__MBTOHE (&B, A)'      `MBTOHE A,B'
+`void __MCLRACC (acc)'           `__MCLRACC (A)'         `MCLRACC A'
+`void __MCLRACCA (void)'         `__MCLRACCA ()'         `MCLRACCA'
+`uw1 __Mcop1 (uw1, uw1)'         `C = __Mcop1 (A, B)'    `Mcop1 A,B,C'
+`uw1 __Mcop2 (uw1, uw1)'         `C = __Mcop2 (A, B)'    `Mcop2 A,B,C'
+`uw1 __MCPLHI (uw2, const)'      `C = __MCPLHI (A, B)'   `MCPLHI A,#B,C'
+`uw1 __MCPLI (uw2, const)'       `C = __MCPLI (A, B)'    `MCPLI A,#B,C'
+`void __MCPXIS (acc, sw1, sw1)'  `__MCPXIS (C, A, B)'    `MCPXIS A,B,C'
+`void __MCPXIU (acc, uw1, uw1)'  `__MCPXIU (C, A, B)'    `MCPXIU A,B,C'
+`void __MCPXRS (acc, sw1, sw1)'  `__MCPXRS (C, A, B)'    `MCPXRS A,B,C'
+`void __MCPXRU (acc, uw1, uw1)'  `__MCPXRU (C, A, B)'    `MCPXRU A,B,C'
+`uw1 __MCUT (acc, uw1)'          `C = __MCUT (A, B)'     `MCUT A,B,C'
+`uw1 __MCUTSS (acc, sw1)'        `C = __MCUTSS (A, B)'   `MCUTSS A,B,C'
+`void __MDADDACCS (acc, acc)'    `__MDADDACCS (B, A)'    `MDADDACCS A,B'
+`void __MDASACCS (acc, acc)'     `__MDASACCS (B, A)'     `MDASACCS A,B'
+`uw2 __MDCUTSSI (acc, const)'    `C = __MDCUTSSI (A, B)' `MDCUTSSI A,#B,C'
+`uw2 __MDPACKH (uw2, uw2)'       `C = __MDPACKH (A, B)'  `MDPACKH A,B,C'
+`uw2 __MDROTLI (uw2, const)'     `C = __MDROTLI (A, B)'  `MDROTLI A,#B,C'
+`void __MDSUBACCS (acc, acc)'    `__MDSUBACCS (B, A)'    `MDSUBACCS A,B'
+`void __MDUNPACKH (uw1 *, uw2)'  `__MDUNPACKH (&B, A)'   `MDUNPACKH A,B'
+`uw2 __MEXPDHD (uw1, const)'     `C = __MEXPDHD (A, B)'  `MEXPDHD A,#B,C'
+`uw1 __MEXPDHW (uw1, const)'     `C = __MEXPDHW (A, B)'  `MEXPDHW A,#B,C'
+`uw1 __MHDSETH (uw1, const)'     `C = __MHDSETH (A, B)'  `MHDSETH A,#B,C'
+`sw1 __MHDSETS (const)'          `B = __MHDSETS (A)'     `MHDSETS #A,B'
+`uw1 __MHSETHIH (uw1, const)'    `B = __MHSETHIH (B, A)' `MHSETHIH #A,B'
+`sw1 __MHSETHIS (sw1, const)'    `B = __MHSETHIS (B, A)' `MHSETHIS #A,B'
+`uw1 __MHSETLOH (uw1, const)'    `B = __MHSETLOH (B, A)' `MHSETLOH #A,B'
+`sw1 __MHSETLOS (sw1, const)'    `B = __MHSETLOS (B, A)' `MHSETLOS #A,B'
+`uw1 __MHTOB (uw2)'              `B = __MHTOB (A)'       `MHTOB A,B'
+`void __MMACHS (acc, sw1, sw1)'  `__MMACHS (C, A, B)'    `MMACHS A,B,C'
+`void __MMACHU (acc, uw1, uw1)'  `__MMACHU (C, A, B)'    `MMACHU A,B,C'
+`void __MMRDHS (acc, sw1, sw1)'  `__MMRDHS (C, A, B)'    `MMRDHS A,B,C'
+`void __MMRDHU (acc, uw1, uw1)'  `__MMRDHU (C, A, B)'    `MMRDHU A,B,C'
+`void __MMULHS (acc, sw1, sw1)'  `__MMULHS (C, A, B)'    `MMULHS A,B,C'
+`void __MMULHU (acc, uw1, uw1)'  `__MMULHU (C, A, B)'    `MMULHU A,B,C'
+`void __MMULXHS (acc, sw1, sw1)' `__MMULXHS (C, A, B)'   `MMULXHS A,B,C'
+`void __MMULXHU (acc, uw1, uw1)' `__MMULXHU (C, A, B)'   `MMULXHU A,B,C'
+`uw1 __MNOT (uw1)'               `B = __MNOT (A)'        `MNOT A,B'
+`uw1 __MOR (uw1, uw1)'           `C = __MOR (A, B)'      `MOR A,B,C'
+`uw1 __MPACKH (uh, uh)'          `C = __MPACKH (A, B)'   `MPACKH A,B,C'
+`sw2 __MQADDHSS (sw2, sw2)'      `C = __MQADDHSS (A, B)' `MQADDHSS A,B,C'
+`uw2 __MQADDHUS (uw2, uw2)'      `C = __MQADDHUS (A, B)' `MQADDHUS A,B,C'
+`void __MQCPXIS (acc, sw2, sw2)' `__MQCPXIS (C, A, B)'   `MQCPXIS A,B,C'
+`void __MQCPXIU (acc, uw2, uw2)' `__MQCPXIU (C, A, B)'   `MQCPXIU A,B,C'
+`void __MQCPXRS (acc, sw2, sw2)' `__MQCPXRS (C, A, B)'   `MQCPXRS A,B,C'
+`void __MQCPXRU (acc, uw2, uw2)' `__MQCPXRU (C, A, B)'   `MQCPXRU A,B,C'
+`sw2 __MQLCLRHS (sw2, sw2)'      `C = __MQLCLRHS (A, B)' `MQLCLRHS A,B,C'
+`sw2 __MQLMTHS (sw2, sw2)'       `C = __MQLMTHS (A, B)'  `MQLMTHS A,B,C'
+`void __MQMACHS (acc, sw2, sw2)' `__MQMACHS (C, A, B)'   `MQMACHS A,B,C'
+`void __MQMACHU (acc, uw2, uw2)' `__MQMACHU (C, A, B)'   `MQMACHU A,B,C'
+`void __MQMACXHS (acc, sw2,      `__MQMACXHS (C, A, B)'  `MQMACXHS A,B,C'
+sw2)'                                                    
+`void __MQMULHS (acc, sw2, sw2)' `__MQMULHS (C, A, B)'   `MQMULHS A,B,C'
+`void __MQMULHU (acc, uw2, uw2)' `__MQMULHU (C, A, B)'   `MQMULHU A,B,C'
+`void __MQMULXHS (acc, sw2,      `__MQMULXHS (C, A, B)'  `MQMULXHS A,B,C'
+sw2)'                                                    
+`void __MQMULXHU (acc, uw2,      `__MQMULXHU (C, A, B)'  `MQMULXHU A,B,C'
+uw2)'                                                    
+`sw2 __MQSATHS (sw2, sw2)'       `C = __MQSATHS (A, B)'  `MQSATHS A,B,C'
+`uw2 __MQSLLHI (uw2, int)'       `C = __MQSLLHI (A, B)'  `MQSLLHI A,B,C'
+`sw2 __MQSRAHI (sw2, int)'       `C = __MQSRAHI (A, B)'  `MQSRAHI A,B,C'
+`sw2 __MQSUBHSS (sw2, sw2)'      `C = __MQSUBHSS (A, B)' `MQSUBHSS A,B,C'
+`uw2 __MQSUBHUS (uw2, uw2)'      `C = __MQSUBHUS (A, B)' `MQSUBHUS A,B,C'
+`void __MQXMACHS (acc, sw2,      `__MQXMACHS (C, A, B)'  `MQXMACHS A,B,C'
+sw2)'                                                    
+`void __MQXMACXHS (acc, sw2,     `__MQXMACXHS (C, A, B)' `MQXMACXHS A,B,C'
+sw2)'                                                    
+`uw1 __MRDACC (acc)'             `B = __MRDACC (A)'      `MRDACC A,B'
+`uw1 __MRDACCG (acc)'            `B = __MRDACCG (A)'     `MRDACCG A,B'
+`uw1 __MROTLI (uw1, const)'      `C = __MROTLI (A, B)'   `MROTLI A,#B,C'
+`uw1 __MROTRI (uw1, const)'      `C = __MROTRI (A, B)'   `MROTRI A,#B,C'
+`sw1 __MSATHS (sw1, sw1)'        `C = __MSATHS (A, B)'   `MSATHS A,B,C'
+`uw1 __MSATHU (uw1, uw1)'        `C = __MSATHU (A, B)'   `MSATHU A,B,C'
+`uw1 __MSLLHI (uw1, const)'      `C = __MSLLHI (A, B)'   `MSLLHI A,#B,C'
+`sw1 __MSRAHI (sw1, const)'      `C = __MSRAHI (A, B)'   `MSRAHI A,#B,C'
+`uw1 __MSRLHI (uw1, const)'      `C = __MSRLHI (A, B)'   `MSRLHI A,#B,C'
+`void __MSUBACCS (acc, acc)'     `__MSUBACCS (B, A)'     `MSUBACCS A,B'
+`sw1 __MSUBHSS (sw1, sw1)'       `C = __MSUBHSS (A, B)'  `MSUBHSS A,B,C'
+`uw1 __MSUBHUS (uw1, uw1)'       `C = __MSUBHUS (A, B)'  `MSUBHUS A,B,C'
+`void __MTRAP (void)'            `__MTRAP ()'            `MTRAP'
+`uw2 __MUNPACKH (uw1)'           `B = __MUNPACKH (A)'    `MUNPACKH A,B'
+`uw1 __MWCUT (uw2, uw1)'         `C = __MWCUT (A, B)'    `MWCUT A,B,C'
+`void __MWTACC (acc, uw1)'       `__MWTACC (B, A)'       `MWTACC A,B'
+`void __MWTACCG (acc, uw1)'      `__MWTACCG (B, A)'      `MWTACCG A,B'
+`uw1 __MXOR (uw1, uw1)'          `C = __MXOR (A, B)'     `MXOR A,B,C'
+
+
+File: gcc.info,  Node: Raw read/write Functions,  Next: Other Built-in Functions,  Prev: Directly-mapped Media Functions,  Up: FR-V Built-in Functions
+
+6.54.5.4 Raw read/write Functions
+.................................
+
+This sections describes built-in functions related to read and write
+instructions to access memory.  These functions generate `membar'
+instructions to flush the I/O load and stores where appropriate, as
+described in Fujitsu's manual described above.
+
+`unsigned char __builtin_read8 (void *DATA)'
+
+`unsigned short __builtin_read16 (void *DATA)'
+
+`unsigned long __builtin_read32 (void *DATA)'
+
+`unsigned long long __builtin_read64 (void *DATA)'
+
+`void __builtin_write8 (void *DATA, unsigned char DATUM)'
+
+`void __builtin_write16 (void *DATA, unsigned short DATUM)'
+
+`void __builtin_write32 (void *DATA, unsigned long DATUM)'
+
+`void __builtin_write64 (void *DATA, unsigned long long DATUM)'
+
+
+File: gcc.info,  Node: Other Built-in Functions,  Prev: Raw read/write Functions,  Up: FR-V Built-in Functions
+
+6.54.5.5 Other Built-in Functions
+.................................
+
+This section describes built-in functions that are not named after a
+specific FR-V instruction.
+
+`sw2 __IACCreadll (iacc REG)'
+     Return the full 64-bit value of IACC0.  The REG argument is
+     reserved for future expansion and must be 0.
+
+`sw1 __IACCreadl (iacc REG)'
+     Return the value of IACC0H if REG is 0 and IACC0L if REG is 1.
+     Other values of REG are rejected as invalid.
+
+`void __IACCsetll (iacc REG, sw2 X)'
+     Set the full 64-bit value of IACC0 to X.  The REG argument is
+     reserved for future expansion and must be 0.
+
+`void __IACCsetl (iacc REG, sw1 X)'
+     Set IACC0H to X if REG is 0 and IACC0L to X if REG is 1.  Other
+     values of REG are rejected as invalid.
+
+`void __data_prefetch0 (const void *X)'
+     Use the `dcpl' instruction to load the contents of address X into
+     the data cache.
+
+`void __data_prefetch (const void *X)'
+     Use the `nldub' instruction to load the contents of address X into
+     the data cache.  The instruction will be issued in slot I1.
+
+
+File: gcc.info,  Node: X86 Built-in Functions,  Next: MIPS DSP Built-in Functions,  Prev: FR-V Built-in Functions,  Up: Target Builtins
+
+6.54.6 X86 Built-in Functions
+-----------------------------
+
+These built-in functions are available for the i386 and x86-64 family
+of computers, depending on the command-line switches used.
+
+ Note that, if you specify command-line switches such as `-msse', the
+compiler could use the extended instruction sets even if the built-ins
+are not used explicitly in the program.  For this reason, applications
+which perform runtime CPU detection must compile separate files for each
+supported architecture, using the appropriate flags.  In particular,
+the file containing the CPU detection code should be compiled without
+these options.
+
+ The following machine modes are available for use with MMX built-in
+functions (*note Vector Extensions::): `V2SI' for a vector of two
+32-bit integers, `V4HI' for a vector of four 16-bit integers, and
+`V8QI' for a vector of eight 8-bit integers.  Some of the built-in
+functions operate on MMX registers as a whole 64-bit entity, these use
+`V1DI' as their mode.
+
+ If 3DNow! extensions are enabled, `V2SF' is used as a mode for a vector
+of two 32-bit floating point values.
+
+ If SSE extensions are enabled, `V4SF' is used for a vector of four
+32-bit floating point values.  Some instructions use a vector of four
+32-bit integers, these use `V4SI'.  Finally, some instructions operate
+on an entire vector register, interpreting it as a 128-bit integer,
+these use mode `TI'.
+
+ In 64-bit mode, the x86-64 family of processors uses additional
+built-in functions for efficient use of `TF' (`__float128') 128-bit
+floating point and `TC' 128-bit complex floating point values.
+
+ The following floating point built-in functions are available in 64-bit
+mode.  All of them implement the function that is part of the name.
+
+     __float128 __builtin_fabsq (__float128)
+     __float128 __builtin_copysignq (__float128, __float128)
+
+ The following floating point built-in functions are made available in
+the 64-bit mode.
+
+`__float128 __builtin_infq (void)'
+     Similar to `__builtin_inf', except the return type is `__float128'.  
+
+`__float128 __builtin_huge_valq (void)'
+     Similar to `__builtin_huge_val', except the return type is
+     `__float128'.  
+
+ The following built-in functions are made available by `-mmmx'.  All
+of them generate the machine instruction that is part of the name.
+
+     v8qi __builtin_ia32_paddb (v8qi, v8qi)
+     v4hi __builtin_ia32_paddw (v4hi, v4hi)
+     v2si __builtin_ia32_paddd (v2si, v2si)
+     v8qi __builtin_ia32_psubb (v8qi, v8qi)
+     v4hi __builtin_ia32_psubw (v4hi, v4hi)
+     v2si __builtin_ia32_psubd (v2si, v2si)
+     v8qi __builtin_ia32_paddsb (v8qi, v8qi)
+     v4hi __builtin_ia32_paddsw (v4hi, v4hi)
+     v8qi __builtin_ia32_psubsb (v8qi, v8qi)
+     v4hi __builtin_ia32_psubsw (v4hi, v4hi)
+     v8qi __builtin_ia32_paddusb (v8qi, v8qi)
+     v4hi __builtin_ia32_paddusw (v4hi, v4hi)
+     v8qi __builtin_ia32_psubusb (v8qi, v8qi)
+     v4hi __builtin_ia32_psubusw (v4hi, v4hi)
+     v4hi __builtin_ia32_pmullw (v4hi, v4hi)
+     v4hi __builtin_ia32_pmulhw (v4hi, v4hi)
+     di __builtin_ia32_pand (di, di)
+     di __builtin_ia32_pandn (di,di)
+     di __builtin_ia32_por (di, di)
+     di __builtin_ia32_pxor (di, di)
+     v8qi __builtin_ia32_pcmpeqb (v8qi, v8qi)
+     v4hi __builtin_ia32_pcmpeqw (v4hi, v4hi)
+     v2si __builtin_ia32_pcmpeqd (v2si, v2si)
+     v8qi __builtin_ia32_pcmpgtb (v8qi, v8qi)
+     v4hi __builtin_ia32_pcmpgtw (v4hi, v4hi)
+     v2si __builtin_ia32_pcmpgtd (v2si, v2si)
+     v8qi __builtin_ia32_punpckhbw (v8qi, v8qi)
+     v4hi __builtin_ia32_punpckhwd (v4hi, v4hi)
+     v2si __builtin_ia32_punpckhdq (v2si, v2si)
+     v8qi __builtin_ia32_punpcklbw (v8qi, v8qi)
+     v4hi __builtin_ia32_punpcklwd (v4hi, v4hi)
+     v2si __builtin_ia32_punpckldq (v2si, v2si)
+     v8qi __builtin_ia32_packsswb (v4hi, v4hi)
+     v4hi __builtin_ia32_packssdw (v2si, v2si)
+     v8qi __builtin_ia32_packuswb (v4hi, v4hi)
+
+     v4hi __builtin_ia32_psllw (v4hi, v4hi)
+     v2si __builtin_ia32_pslld (v2si, v2si)
+     v1di __builtin_ia32_psllq (v1di, v1di)
+     v4hi __builtin_ia32_psrlw (v4hi, v4hi)
+     v2si __builtin_ia32_psrld (v2si, v2si)
+     v1di __builtin_ia32_psrlq (v1di, v1di)
+     v4hi __builtin_ia32_psraw (v4hi, v4hi)
+     v2si __builtin_ia32_psrad (v2si, v2si)
+     v4hi __builtin_ia32_psllwi (v4hi, int)
+     v2si __builtin_ia32_pslldi (v2si, int)
+     v1di __builtin_ia32_psllqi (v1di, int)
+     v4hi __builtin_ia32_psrlwi (v4hi, int)
+     v2si __builtin_ia32_psrldi (v2si, int)
+     v1di __builtin_ia32_psrlqi (v1di, int)
+     v4hi __builtin_ia32_psrawi (v4hi, int)
+     v2si __builtin_ia32_psradi (v2si, int)
+
+ The following built-in functions are made available either with
+`-msse', or with a combination of `-m3dnow' and `-march=athlon'.  All
+of them generate the machine instruction that is part of the name.
+
+     v4hi __builtin_ia32_pmulhuw (v4hi, v4hi)
+     v8qi __builtin_ia32_pavgb (v8qi, v8qi)
+     v4hi __builtin_ia32_pavgw (v4hi, v4hi)
+     v1di __builtin_ia32_psadbw (v8qi, v8qi)
+     v8qi __builtin_ia32_pmaxub (v8qi, v8qi)
+     v4hi __builtin_ia32_pmaxsw (v4hi, v4hi)
+     v8qi __builtin_ia32_pminub (v8qi, v8qi)
+     v4hi __builtin_ia32_pminsw (v4hi, v4hi)
+     int __builtin_ia32_pextrw (v4hi, int)
+     v4hi __builtin_ia32_pinsrw (v4hi, int, int)
+     int __builtin_ia32_pmovmskb (v8qi)
+     void __builtin_ia32_maskmovq (v8qi, v8qi, char *)
+     void __builtin_ia32_movntq (di *, di)
+     void __builtin_ia32_sfence (void)
+
+ The following built-in functions are available when `-msse' is used.
+All of them generate the machine instruction that is part of the name.
+
+     int __builtin_ia32_comieq (v4sf, v4sf)
+     int __builtin_ia32_comineq (v4sf, v4sf)
+     int __builtin_ia32_comilt (v4sf, v4sf)
+     int __builtin_ia32_comile (v4sf, v4sf)
+     int __builtin_ia32_comigt (v4sf, v4sf)
+     int __builtin_ia32_comige (v4sf, v4sf)
+     int __builtin_ia32_ucomieq (v4sf, v4sf)
+     int __builtin_ia32_ucomineq (v4sf, v4sf)
+     int __builtin_ia32_ucomilt (v4sf, v4sf)
+     int __builtin_ia32_ucomile (v4sf, v4sf)
+     int __builtin_ia32_ucomigt (v4sf, v4sf)
+     int __builtin_ia32_ucomige (v4sf, v4sf)
+     v4sf __builtin_ia32_addps (v4sf, v4sf)
+     v4sf __builtin_ia32_subps (v4sf, v4sf)
+     v4sf __builtin_ia32_mulps (v4sf, v4sf)
+     v4sf __builtin_ia32_divps (v4sf, v4sf)
+     v4sf __builtin_ia32_addss (v4sf, v4sf)
+     v4sf __builtin_ia32_subss (v4sf, v4sf)
+     v4sf __builtin_ia32_mulss (v4sf, v4sf)
+     v4sf __builtin_ia32_divss (v4sf, v4sf)
+     v4si __builtin_ia32_cmpeqps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpltps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpleps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpgtps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpgeps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpunordps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpneqps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpnltps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpnleps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpngtps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpngeps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpordps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpeqss (v4sf, v4sf)
+     v4si __builtin_ia32_cmpltss (v4sf, v4sf)
+     v4si __builtin_ia32_cmpless (v4sf, v4sf)
+     v4si __builtin_ia32_cmpunordss (v4sf, v4sf)
+     v4si __builtin_ia32_cmpneqss (v4sf, v4sf)
+     v4si __builtin_ia32_cmpnlts (v4sf, v4sf)
+     v4si __builtin_ia32_cmpnless (v4sf, v4sf)
+     v4si __builtin_ia32_cmpordss (v4sf, v4sf)
+     v4sf __builtin_ia32_maxps (v4sf, v4sf)
+     v4sf __builtin_ia32_maxss (v4sf, v4sf)
+     v4sf __builtin_ia32_minps (v4sf, v4sf)
+     v4sf __builtin_ia32_minss (v4sf, v4sf)
+     v4sf __builtin_ia32_andps (v4sf, v4sf)
+     v4sf __builtin_ia32_andnps (v4sf, v4sf)
+     v4sf __builtin_ia32_orps (v4sf, v4sf)
+     v4sf __builtin_ia32_xorps (v4sf, v4sf)
+     v4sf __builtin_ia32_movss (v4sf, v4sf)
+     v4sf __builtin_ia32_movhlps (v4sf, v4sf)
+     v4sf __builtin_ia32_movlhps (v4sf, v4sf)
+     v4sf __builtin_ia32_unpckhps (v4sf, v4sf)
+     v4sf __builtin_ia32_unpcklps (v4sf, v4sf)
+     v4sf __builtin_ia32_cvtpi2ps (v4sf, v2si)
+     v4sf __builtin_ia32_cvtsi2ss (v4sf, int)
+     v2si __builtin_ia32_cvtps2pi (v4sf)
+     int __builtin_ia32_cvtss2si (v4sf)
+     v2si __builtin_ia32_cvttps2pi (v4sf)
+     int __builtin_ia32_cvttss2si (v4sf)
+     v4sf __builtin_ia32_rcpps (v4sf)
+     v4sf __builtin_ia32_rsqrtps (v4sf)
+     v4sf __builtin_ia32_sqrtps (v4sf)
+     v4sf __builtin_ia32_rcpss (v4sf)
+     v4sf __builtin_ia32_rsqrtss (v4sf)
+     v4sf __builtin_ia32_sqrtss (v4sf)
+     v4sf __builtin_ia32_shufps (v4sf, v4sf, int)
+     void __builtin_ia32_movntps (float *, v4sf)
+     int __builtin_ia32_movmskps (v4sf)
+
+ The following built-in functions are available when `-msse' is used.
+
+`v4sf __builtin_ia32_loadaps (float *)'
+     Generates the `movaps' machine instruction as a load from memory.
+
+`void __builtin_ia32_storeaps (float *, v4sf)'
+     Generates the `movaps' machine instruction as a store to memory.
+
+`v4sf __builtin_ia32_loadups (float *)'
+     Generates the `movups' machine instruction as a load from memory.
+
+`void __builtin_ia32_storeups (float *, v4sf)'
+     Generates the `movups' machine instruction as a store to memory.
+
+`v4sf __builtin_ia32_loadsss (float *)'
+     Generates the `movss' machine instruction as a load from memory.
+
+`void __builtin_ia32_storess (float *, v4sf)'
+     Generates the `movss' machine instruction as a store to memory.
+
+`v4sf __builtin_ia32_loadhps (v4sf, const v2sf *)'
+     Generates the `movhps' machine instruction as a load from memory.
+
+`v4sf __builtin_ia32_loadlps (v4sf, const v2sf *)'
+     Generates the `movlps' machine instruction as a load from memory
+
+`void __builtin_ia32_storehps (v2sf *, v4sf)'
+     Generates the `movhps' machine instruction as a store to memory.
+
+`void __builtin_ia32_storelps (v2sf *, v4sf)'
+     Generates the `movlps' machine instruction as a store to memory.
+
+ The following built-in functions are available when `-msse2' is used.
+All of them generate the machine instruction that is part of the name.
+
+     int __builtin_ia32_comisdeq (v2df, v2df)
+     int __builtin_ia32_comisdlt (v2df, v2df)
+     int __builtin_ia32_comisdle (v2df, v2df)
+     int __builtin_ia32_comisdgt (v2df, v2df)
+     int __builtin_ia32_comisdge (v2df, v2df)
+     int __builtin_ia32_comisdneq (v2df, v2df)
+     int __builtin_ia32_ucomisdeq (v2df, v2df)
+     int __builtin_ia32_ucomisdlt (v2df, v2df)
+     int __builtin_ia32_ucomisdle (v2df, v2df)
+     int __builtin_ia32_ucomisdgt (v2df, v2df)
+     int __builtin_ia32_ucomisdge (v2df, v2df)
+     int __builtin_ia32_ucomisdneq (v2df, v2df)
+     v2df __builtin_ia32_cmpeqpd (v2df, v2df)
+     v2df __builtin_ia32_cmpltpd (v2df, v2df)
+     v2df __builtin_ia32_cmplepd (v2df, v2df)
+     v2df __builtin_ia32_cmpgtpd (v2df, v2df)
+     v2df __builtin_ia32_cmpgepd (v2df, v2df)
+     v2df __builtin_ia32_cmpunordpd (v2df, v2df)
+     v2df __builtin_ia32_cmpneqpd (v2df, v2df)
+     v2df __builtin_ia32_cmpnltpd (v2df, v2df)
+     v2df __builtin_ia32_cmpnlepd (v2df, v2df)
+     v2df __builtin_ia32_cmpngtpd (v2df, v2df)
+     v2df __builtin_ia32_cmpngepd (v2df, v2df)
+     v2df __builtin_ia32_cmpordpd (v2df, v2df)
+     v2df __builtin_ia32_cmpeqsd (v2df, v2df)
+     v2df __builtin_ia32_cmpltsd (v2df, v2df)
+     v2df __builtin_ia32_cmplesd (v2df, v2df)
+     v2df __builtin_ia32_cmpunordsd (v2df, v2df)
+     v2df __builtin_ia32_cmpneqsd (v2df, v2df)
+     v2df __builtin_ia32_cmpnltsd (v2df, v2df)
+     v2df __builtin_ia32_cmpnlesd (v2df, v2df)
+     v2df __builtin_ia32_cmpordsd (v2df, v2df)
+     v2di __builtin_ia32_paddq (v2di, v2di)
+     v2di __builtin_ia32_psubq (v2di, v2di)
+     v2df __builtin_ia32_addpd (v2df, v2df)
+     v2df __builtin_ia32_subpd (v2df, v2df)
+     v2df __builtin_ia32_mulpd (v2df, v2df)
+     v2df __builtin_ia32_divpd (v2df, v2df)
+     v2df __builtin_ia32_addsd (v2df, v2df)
+     v2df __builtin_ia32_subsd (v2df, v2df)
+     v2df __builtin_ia32_mulsd (v2df, v2df)
+     v2df __builtin_ia32_divsd (v2df, v2df)
+     v2df __builtin_ia32_minpd (v2df, v2df)
+     v2df __builtin_ia32_maxpd (v2df, v2df)
+     v2df __builtin_ia32_minsd (v2df, v2df)
+     v2df __builtin_ia32_maxsd (v2df, v2df)
+     v2df __builtin_ia32_andpd (v2df, v2df)
+     v2df __builtin_ia32_andnpd (v2df, v2df)
+     v2df __builtin_ia32_orpd (v2df, v2df)
+     v2df __builtin_ia32_xorpd (v2df, v2df)
+     v2df __builtin_ia32_movsd (v2df, v2df)
+     v2df __builtin_ia32_unpckhpd (v2df, v2df)
+     v2df __builtin_ia32_unpcklpd (v2df, v2df)
+     v16qi __builtin_ia32_paddb128 (v16qi, v16qi)
+     v8hi __builtin_ia32_paddw128 (v8hi, v8hi)
+     v4si __builtin_ia32_paddd128 (v4si, v4si)
+     v2di __builtin_ia32_paddq128 (v2di, v2di)
+     v16qi __builtin_ia32_psubb128 (v16qi, v16qi)
+     v8hi __builtin_ia32_psubw128 (v8hi, v8hi)
+     v4si __builtin_ia32_psubd128 (v4si, v4si)
+     v2di __builtin_ia32_psubq128 (v2di, v2di)
+     v8hi __builtin_ia32_pmullw128 (v8hi, v8hi)
+     v8hi __builtin_ia32_pmulhw128 (v8hi, v8hi)
+     v2di __builtin_ia32_pand128 (v2di, v2di)
+     v2di __builtin_ia32_pandn128 (v2di, v2di)
+     v2di __builtin_ia32_por128 (v2di, v2di)
+     v2di __builtin_ia32_pxor128 (v2di, v2di)
+     v16qi __builtin_ia32_pavgb128 (v16qi, v16qi)
+     v8hi __builtin_ia32_pavgw128 (v8hi, v8hi)
+     v16qi __builtin_ia32_pcmpeqb128 (v16qi, v16qi)
+     v8hi __builtin_ia32_pcmpeqw128 (v8hi, v8hi)
+     v4si __builtin_ia32_pcmpeqd128 (v4si, v4si)
+     v16qi __builtin_ia32_pcmpgtb128 (v16qi, v16qi)
+     v8hi __builtin_ia32_pcmpgtw128 (v8hi, v8hi)
+     v4si __builtin_ia32_pcmpgtd128 (v4si, v4si)
+     v16qi __builtin_ia32_pmaxub128 (v16qi, v16qi)
+     v8hi __builtin_ia32_pmaxsw128 (v8hi, v8hi)
+     v16qi __builtin_ia32_pminub128 (v16qi, v16qi)
+     v8hi __builtin_ia32_pminsw128 (v8hi, v8hi)
+     v16qi __builtin_ia32_punpckhbw128 (v16qi, v16qi)
+     v8hi __builtin_ia32_punpckhwd128 (v8hi, v8hi)
+     v4si __builtin_ia32_punpckhdq128 (v4si, v4si)
+     v2di __builtin_ia32_punpckhqdq128 (v2di, v2di)
+     v16qi __builtin_ia32_punpcklbw128 (v16qi, v16qi)
+     v8hi __builtin_ia32_punpcklwd128 (v8hi, v8hi)
+     v4si __builtin_ia32_punpckldq128 (v4si, v4si)
+     v2di __builtin_ia32_punpcklqdq128 (v2di, v2di)
+     v16qi __builtin_ia32_packsswb128 (v8hi, v8hi)
+     v8hi __builtin_ia32_packssdw128 (v4si, v4si)
+     v16qi __builtin_ia32_packuswb128 (v8hi, v8hi)
+     v8hi __builtin_ia32_pmulhuw128 (v8hi, v8hi)
+     void __builtin_ia32_maskmovdqu (v16qi, v16qi)
+     v2df __builtin_ia32_loadupd (double *)
+     void __builtin_ia32_storeupd (double *, v2df)
+     v2df __builtin_ia32_loadhpd (v2df, double const *)
+     v2df __builtin_ia32_loadlpd (v2df, double const *)
+     int __builtin_ia32_movmskpd (v2df)
+     int __builtin_ia32_pmovmskb128 (v16qi)
+     void __builtin_ia32_movnti (int *, int)
+     void __builtin_ia32_movntpd (double *, v2df)
+     void __builtin_ia32_movntdq (v2df *, v2df)
+     v4si __builtin_ia32_pshufd (v4si, int)
+     v8hi __builtin_ia32_pshuflw (v8hi, int)
+     v8hi __builtin_ia32_pshufhw (v8hi, int)
+     v2di __builtin_ia32_psadbw128 (v16qi, v16qi)
+     v2df __builtin_ia32_sqrtpd (v2df)
+     v2df __builtin_ia32_sqrtsd (v2df)
+     v2df __builtin_ia32_shufpd (v2df, v2df, int)
+     v2df __builtin_ia32_cvtdq2pd (v4si)
+     v4sf __builtin_ia32_cvtdq2ps (v4si)
+     v4si __builtin_ia32_cvtpd2dq (v2df)
+     v2si __builtin_ia32_cvtpd2pi (v2df)
+     v4sf __builtin_ia32_cvtpd2ps (v2df)
+     v4si __builtin_ia32_cvttpd2dq (v2df)
+     v2si __builtin_ia32_cvttpd2pi (v2df)
+     v2df __builtin_ia32_cvtpi2pd (v2si)
+     int __builtin_ia32_cvtsd2si (v2df)
+     int __builtin_ia32_cvttsd2si (v2df)
+     long long __builtin_ia32_cvtsd2si64 (v2df)
+     long long __builtin_ia32_cvttsd2si64 (v2df)
+     v4si __builtin_ia32_cvtps2dq (v4sf)
+     v2df __builtin_ia32_cvtps2pd (v4sf)
+     v4si __builtin_ia32_cvttps2dq (v4sf)
+     v2df __builtin_ia32_cvtsi2sd (v2df, int)
+     v2df __builtin_ia32_cvtsi642sd (v2df, long long)
+     v4sf __builtin_ia32_cvtsd2ss (v4sf, v2df)
+     v2df __builtin_ia32_cvtss2sd (v2df, v4sf)
+     void __builtin_ia32_clflush (const void *)
+     void __builtin_ia32_lfence (void)
+     void __builtin_ia32_mfence (void)
+     v16qi __builtin_ia32_loaddqu (const char *)
+     void __builtin_ia32_storedqu (char *, v16qi)
+     v1di __builtin_ia32_pmuludq (v2si, v2si)
+     v2di __builtin_ia32_pmuludq128 (v4si, v4si)
+     v8hi __builtin_ia32_psllw128 (v8hi, v8hi)
+     v4si __builtin_ia32_pslld128 (v4si, v4si)
+     v2di __builtin_ia32_psllq128 (v2di, v2di)
+     v8hi __builtin_ia32_psrlw128 (v8hi, v8hi)
+     v4si __builtin_ia32_psrld128 (v4si, v4si)
+     v2di __builtin_ia32_psrlq128 (v2di, v2di)
+     v8hi __builtin_ia32_psraw128 (v8hi, v8hi)
+     v4si __builtin_ia32_psrad128 (v4si, v4si)
+     v2di __builtin_ia32_pslldqi128 (v2di, int)
+     v8hi __builtin_ia32_psllwi128 (v8hi, int)
+     v4si __builtin_ia32_pslldi128 (v4si, int)
+     v2di __builtin_ia32_psllqi128 (v2di, int)
+     v2di __builtin_ia32_psrldqi128 (v2di, int)
+     v8hi __builtin_ia32_psrlwi128 (v8hi, int)
+     v4si __builtin_ia32_psrldi128 (v4si, int)
+     v2di __builtin_ia32_psrlqi128 (v2di, int)
+     v8hi __builtin_ia32_psrawi128 (v8hi, int)
+     v4si __builtin_ia32_psradi128 (v4si, int)
+     v4si __builtin_ia32_pmaddwd128 (v8hi, v8hi)
+     v2di __builtin_ia32_movq128 (v2di)
+
+ The following built-in functions are available when `-msse3' is used.
+All of them generate the machine instruction that is part of the name.
+
+     v2df __builtin_ia32_addsubpd (v2df, v2df)
+     v4sf __builtin_ia32_addsubps (v4sf, v4sf)
+     v2df __builtin_ia32_haddpd (v2df, v2df)
+     v4sf __builtin_ia32_haddps (v4sf, v4sf)
+     v2df __builtin_ia32_hsubpd (v2df, v2df)
+     v4sf __builtin_ia32_hsubps (v4sf, v4sf)
+     v16qi __builtin_ia32_lddqu (char const *)
+     void __builtin_ia32_monitor (void *, unsigned int, unsigned int)
+     v2df __builtin_ia32_movddup (v2df)
+     v4sf __builtin_ia32_movshdup (v4sf)
+     v4sf __builtin_ia32_movsldup (v4sf)
+     void __builtin_ia32_mwait (unsigned int, unsigned int)
+
+ The following built-in functions are available when `-msse3' is used.
+
+`v2df __builtin_ia32_loadddup (double const *)'
+     Generates the `movddup' machine instruction as a load from memory.
+
+ The following built-in functions are available when `-mssse3' is used.
+All of them generate the machine instruction that is part of the name
+with MMX registers.
+
+     v2si __builtin_ia32_phaddd (v2si, v2si)
+     v4hi __builtin_ia32_phaddw (v4hi, v4hi)
+     v4hi __builtin_ia32_phaddsw (v4hi, v4hi)
+     v2si __builtin_ia32_phsubd (v2si, v2si)
+     v4hi __builtin_ia32_phsubw (v4hi, v4hi)
+     v4hi __builtin_ia32_phsubsw (v4hi, v4hi)
+     v4hi __builtin_ia32_pmaddubsw (v8qi, v8qi)
+     v4hi __builtin_ia32_pmulhrsw (v4hi, v4hi)
+     v8qi __builtin_ia32_pshufb (v8qi, v8qi)
+     v8qi __builtin_ia32_psignb (v8qi, v8qi)
+     v2si __builtin_ia32_psignd (v2si, v2si)
+     v4hi __builtin_ia32_psignw (v4hi, v4hi)
+     v1di __builtin_ia32_palignr (v1di, v1di, int)
+     v8qi __builtin_ia32_pabsb (v8qi)
+     v2si __builtin_ia32_pabsd (v2si)
+     v4hi __builtin_ia32_pabsw (v4hi)
+
+ The following built-in functions are available when `-mssse3' is used.
+All of them generate the machine instruction that is part of the name
+with SSE registers.
+
+     v4si __builtin_ia32_phaddd128 (v4si, v4si)
+     v8hi __builtin_ia32_phaddw128 (v8hi, v8hi)
+     v8hi __builtin_ia32_phaddsw128 (v8hi, v8hi)
+     v4si __builtin_ia32_phsubd128 (v4si, v4si)
+     v8hi __builtin_ia32_phsubw128 (v8hi, v8hi)
+     v8hi __builtin_ia32_phsubsw128 (v8hi, v8hi)
+     v8hi __builtin_ia32_pmaddubsw128 (v16qi, v16qi)
+     v8hi __builtin_ia32_pmulhrsw128 (v8hi, v8hi)
+     v16qi __builtin_ia32_pshufb128 (v16qi, v16qi)
+     v16qi __builtin_ia32_psignb128 (v16qi, v16qi)
+     v4si __builtin_ia32_psignd128 (v4si, v4si)
+     v8hi __builtin_ia32_psignw128 (v8hi, v8hi)
+     v2di __builtin_ia32_palignr128 (v2di, v2di, int)
+     v16qi __builtin_ia32_pabsb128 (v16qi)
+     v4si __builtin_ia32_pabsd128 (v4si)
+     v8hi __builtin_ia32_pabsw128 (v8hi)
+
+ The following built-in functions are available when `-msse4.1' is
+used.  All of them generate the machine instruction that is part of the
+name.
+
+     v2df __builtin_ia32_blendpd (v2df, v2df, const int)
+     v4sf __builtin_ia32_blendps (v4sf, v4sf, const int)
+     v2df __builtin_ia32_blendvpd (v2df, v2df, v2df)
+     v4sf __builtin_ia32_blendvps (v4sf, v4sf, v4sf)
+     v2df __builtin_ia32_dppd (v2df, v2df, const int)
+     v4sf __builtin_ia32_dpps (v4sf, v4sf, const int)
+     v4sf __builtin_ia32_insertps128 (v4sf, v4sf, const int)
+     v2di __builtin_ia32_movntdqa (v2di *);
+     v16qi __builtin_ia32_mpsadbw128 (v16qi, v16qi, const int)
+     v8hi __builtin_ia32_packusdw128 (v4si, v4si)
+     v16qi __builtin_ia32_pblendvb128 (v16qi, v16qi, v16qi)
+     v8hi __builtin_ia32_pblendw128 (v8hi, v8hi, const int)
+     v2di __builtin_ia32_pcmpeqq (v2di, v2di)
+     v8hi __builtin_ia32_phminposuw128 (v8hi)
+     v16qi __builtin_ia32_pmaxsb128 (v16qi, v16qi)
+     v4si __builtin_ia32_pmaxsd128 (v4si, v4si)
+     v4si __builtin_ia32_pmaxud128 (v4si, v4si)
+     v8hi __builtin_ia32_pmaxuw128 (v8hi, v8hi)
+     v16qi __builtin_ia32_pminsb128 (v16qi, v16qi)
+     v4si __builtin_ia32_pminsd128 (v4si, v4si)
+     v4si __builtin_ia32_pminud128 (v4si, v4si)
+     v8hi __builtin_ia32_pminuw128 (v8hi, v8hi)
+     v4si __builtin_ia32_pmovsxbd128 (v16qi)
+     v2di __builtin_ia32_pmovsxbq128 (v16qi)
+     v8hi __builtin_ia32_pmovsxbw128 (v16qi)
+     v2di __builtin_ia32_pmovsxdq128 (v4si)
+     v4si __builtin_ia32_pmovsxwd128 (v8hi)
+     v2di __builtin_ia32_pmovsxwq128 (v8hi)
+     v4si __builtin_ia32_pmovzxbd128 (v16qi)
+     v2di __builtin_ia32_pmovzxbq128 (v16qi)
+     v8hi __builtin_ia32_pmovzxbw128 (v16qi)
+     v2di __builtin_ia32_pmovzxdq128 (v4si)
+     v4si __builtin_ia32_pmovzxwd128 (v8hi)
+     v2di __builtin_ia32_pmovzxwq128 (v8hi)
+     v2di __builtin_ia32_pmuldq128 (v4si, v4si)
+     v4si __builtin_ia32_pmulld128 (v4si, v4si)
+     int __builtin_ia32_ptestc128 (v2di, v2di)
+     int __builtin_ia32_ptestnzc128 (v2di, v2di)
+     int __builtin_ia32_ptestz128 (v2di, v2di)
+     v2df __builtin_ia32_roundpd (v2df, const int)
+     v4sf __builtin_ia32_roundps (v4sf, const int)
+     v2df __builtin_ia32_roundsd (v2df, v2df, const int)
+     v4sf __builtin_ia32_roundss (v4sf, v4sf, const int)
+
+ The following built-in functions are available when `-msse4.1' is used.
+
+`v4sf __builtin_ia32_vec_set_v4sf (v4sf, float, const int)'
+     Generates the `insertps' machine instruction.
+
+`int __builtin_ia32_vec_ext_v16qi (v16qi, const int)'
+     Generates the `pextrb' machine instruction.
+
+`v16qi __builtin_ia32_vec_set_v16qi (v16qi, int, const int)'
+     Generates the `pinsrb' machine instruction.
+
+`v4si __builtin_ia32_vec_set_v4si (v4si, int, const int)'
+     Generates the `pinsrd' machine instruction.
+
+`v2di __builtin_ia32_vec_set_v2di (v2di, long long, const int)'
+     Generates the `pinsrq' machine instruction in 64bit mode.
+
+ The following built-in functions are changed to generate new SSE4.1
+instructions when `-msse4.1' is used.
+
+`float __builtin_ia32_vec_ext_v4sf (v4sf, const int)'
+     Generates the `extractps' machine instruction.
+
+`int __builtin_ia32_vec_ext_v4si (v4si, const int)'
+     Generates the `pextrd' machine instruction.
+
+`long long __builtin_ia32_vec_ext_v2di (v2di, const int)'
+     Generates the `pextrq' machine instruction in 64bit mode.
+
+ The following built-in functions are available when `-msse4.2' is
+used.  All of them generate the machine instruction that is part of the
+name.
+
+     v16qi __builtin_ia32_pcmpestrm128 (v16qi, int, v16qi, int, const int)
+     int __builtin_ia32_pcmpestri128 (v16qi, int, v16qi, int, const int)
+     int __builtin_ia32_pcmpestria128 (v16qi, int, v16qi, int, const int)
+     int __builtin_ia32_pcmpestric128 (v16qi, int, v16qi, int, const int)
+     int __builtin_ia32_pcmpestrio128 (v16qi, int, v16qi, int, const int)
+     int __builtin_ia32_pcmpestris128 (v16qi, int, v16qi, int, const int)
+     int __builtin_ia32_pcmpestriz128 (v16qi, int, v16qi, int, const int)
+     v16qi __builtin_ia32_pcmpistrm128 (v16qi, v16qi, const int)
+     int __builtin_ia32_pcmpistri128 (v16qi, v16qi, const int)
+     int __builtin_ia32_pcmpistria128 (v16qi, v16qi, const int)
+     int __builtin_ia32_pcmpistric128 (v16qi, v16qi, const int)
+     int __builtin_ia32_pcmpistrio128 (v16qi, v16qi, const int)
+     int __builtin_ia32_pcmpistris128 (v16qi, v16qi, const int)
+     int __builtin_ia32_pcmpistriz128 (v16qi, v16qi, const int)
+     v2di __builtin_ia32_pcmpgtq (v2di, v2di)
+
+ The following built-in functions are available when `-msse4.2' is used.
+
+`unsigned int __builtin_ia32_crc32qi (unsigned int, unsigned char)'
+     Generates the `crc32b' machine instruction.
+
+`unsigned int __builtin_ia32_crc32hi (unsigned int, unsigned short)'
+     Generates the `crc32w' machine instruction.
+
+`unsigned int __builtin_ia32_crc32si (unsigned int, unsigned int)'
+     Generates the `crc32l' machine instruction.
+
+`unsigned long long __builtin_ia32_crc32di (unsigned long long, unsigned long long)'
+     Generates the `crc32q' machine instruction.
+
+ The following built-in functions are changed to generate new SSE4.2
+instructions when `-msse4.2' is used.
+
+`int __builtin_popcount (unsigned int)'
+     Generates the `popcntl' machine instruction.
+
+`int __builtin_popcountl (unsigned long)'
+     Generates the `popcntl' or `popcntq' machine instruction,
+     depending on the size of `unsigned long'.
+
+`int __builtin_popcountll (unsigned long long)'
+     Generates the `popcntq' machine instruction.
+
+ The following built-in functions are available when `-mavx' is used.
+All of them generate the machine instruction that is part of the name.
+
+     v4df __builtin_ia32_addpd256 (v4df,v4df)
+     v8sf __builtin_ia32_addps256 (v8sf,v8sf)
+     v4df __builtin_ia32_addsubpd256 (v4df,v4df)
+     v8sf __builtin_ia32_addsubps256 (v8sf,v8sf)
+     v4df __builtin_ia32_andnpd256 (v4df,v4df)
+     v8sf __builtin_ia32_andnps256 (v8sf,v8sf)
+     v4df __builtin_ia32_andpd256 (v4df,v4df)
+     v8sf __builtin_ia32_andps256 (v8sf,v8sf)
+     v4df __builtin_ia32_blendpd256 (v4df,v4df,int)
+     v8sf __builtin_ia32_blendps256 (v8sf,v8sf,int)
+     v4df __builtin_ia32_blendvpd256 (v4df,v4df,v4df)
+     v8sf __builtin_ia32_blendvps256 (v8sf,v8sf,v8sf)
+     v2df __builtin_ia32_cmppd (v2df,v2df,int)
+     v4df __builtin_ia32_cmppd256 (v4df,v4df,int)
+     v4sf __builtin_ia32_cmpps (v4sf,v4sf,int)
+     v8sf __builtin_ia32_cmpps256 (v8sf,v8sf,int)
+     v2df __builtin_ia32_cmpsd (v2df,v2df,int)
+     v4sf __builtin_ia32_cmpss (v4sf,v4sf,int)
+     v4df __builtin_ia32_cvtdq2pd256 (v4si)
+     v8sf __builtin_ia32_cvtdq2ps256 (v8si)
+     v4si __builtin_ia32_cvtpd2dq256 (v4df)
+     v4sf __builtin_ia32_cvtpd2ps256 (v4df)
+     v8si __builtin_ia32_cvtps2dq256 (v8sf)
+     v4df __builtin_ia32_cvtps2pd256 (v4sf)
+     v4si __builtin_ia32_cvttpd2dq256 (v4df)
+     v8si __builtin_ia32_cvttps2dq256 (v8sf)
+     v4df __builtin_ia32_divpd256 (v4df,v4df)
+     v8sf __builtin_ia32_divps256 (v8sf,v8sf)
+     v8sf __builtin_ia32_dpps256 (v8sf,v8sf,int)
+     v4df __builtin_ia32_haddpd256 (v4df,v4df)
+     v8sf __builtin_ia32_haddps256 (v8sf,v8sf)
+     v4df __builtin_ia32_hsubpd256 (v4df,v4df)
+     v8sf __builtin_ia32_hsubps256 (v8sf,v8sf)
+     v32qi __builtin_ia32_lddqu256 (pcchar)
+     v32qi __builtin_ia32_loaddqu256 (pcchar)
+     v4df __builtin_ia32_loadupd256 (pcdouble)
+     v8sf __builtin_ia32_loadups256 (pcfloat)
+     v2df __builtin_ia32_maskloadpd (pcv2df,v2df)
+     v4df __builtin_ia32_maskloadpd256 (pcv4df,v4df)
+     v4sf __builtin_ia32_maskloadps (pcv4sf,v4sf)
+     v8sf __builtin_ia32_maskloadps256 (pcv8sf,v8sf)
+     void __builtin_ia32_maskstorepd (pv2df,v2df,v2df)
+     void __builtin_ia32_maskstorepd256 (pv4df,v4df,v4df)
+     void __builtin_ia32_maskstoreps (pv4sf,v4sf,v4sf)
+     void __builtin_ia32_maskstoreps256 (pv8sf,v8sf,v8sf)
+     v4df __builtin_ia32_maxpd256 (v4df,v4df)
+     v8sf __builtin_ia32_maxps256 (v8sf,v8sf)
+     v4df __builtin_ia32_minpd256 (v4df,v4df)
+     v8sf __builtin_ia32_minps256 (v8sf,v8sf)
+     v4df __builtin_ia32_movddup256 (v4df)
+     int __builtin_ia32_movmskpd256 (v4df)
+     int __builtin_ia32_movmskps256 (v8sf)
+     v8sf __builtin_ia32_movshdup256 (v8sf)
+     v8sf __builtin_ia32_movsldup256 (v8sf)
+     v4df __builtin_ia32_mulpd256 (v4df,v4df)
+     v8sf __builtin_ia32_mulps256 (v8sf,v8sf)
+     v4df __builtin_ia32_orpd256 (v4df,v4df)
+     v8sf __builtin_ia32_orps256 (v8sf,v8sf)
+     v2df __builtin_ia32_pd_pd256 (v4df)
+     v4df __builtin_ia32_pd256_pd (v2df)
+     v4sf __builtin_ia32_ps_ps256 (v8sf)
+     v8sf __builtin_ia32_ps256_ps (v4sf)
+     int __builtin_ia32_ptestc256 (v4di,v4di,ptest)
+     int __builtin_ia32_ptestnzc256 (v4di,v4di,ptest)
+     int __builtin_ia32_ptestz256 (v4di,v4di,ptest)
+     v8sf __builtin_ia32_rcpps256 (v8sf)
+     v4df __builtin_ia32_roundpd256 (v4df,int)
+     v8sf __builtin_ia32_roundps256 (v8sf,int)
+     v8sf __builtin_ia32_rsqrtps_nr256 (v8sf)
+     v8sf __builtin_ia32_rsqrtps256 (v8sf)
+     v4df __builtin_ia32_shufpd256 (v4df,v4df,int)
+     v8sf __builtin_ia32_shufps256 (v8sf,v8sf,int)
+     v4si __builtin_ia32_si_si256 (v8si)
+     v8si __builtin_ia32_si256_si (v4si)
+     v4df __builtin_ia32_sqrtpd256 (v4df)
+     v8sf __builtin_ia32_sqrtps_nr256 (v8sf)
+     v8sf __builtin_ia32_sqrtps256 (v8sf)
+     void __builtin_ia32_storedqu256 (pchar,v32qi)
+     void __builtin_ia32_storeupd256 (pdouble,v4df)
+     void __builtin_ia32_storeups256 (pfloat,v8sf)
+     v4df __builtin_ia32_subpd256 (v4df,v4df)
+     v8sf __builtin_ia32_subps256 (v8sf,v8sf)
+     v4df __builtin_ia32_unpckhpd256 (v4df,v4df)
+     v8sf __builtin_ia32_unpckhps256 (v8sf,v8sf)
+     v4df __builtin_ia32_unpcklpd256 (v4df,v4df)
+     v8sf __builtin_ia32_unpcklps256 (v8sf,v8sf)
+     v4df __builtin_ia32_vbroadcastf128_pd256 (pcv2df)
+     v8sf __builtin_ia32_vbroadcastf128_ps256 (pcv4sf)
+     v4df __builtin_ia32_vbroadcastsd256 (pcdouble)
+     v4sf __builtin_ia32_vbroadcastss (pcfloat)
+     v8sf __builtin_ia32_vbroadcastss256 (pcfloat)
+     v2df __builtin_ia32_vextractf128_pd256 (v4df,int)
+     v4sf __builtin_ia32_vextractf128_ps256 (v8sf,int)
+     v4si __builtin_ia32_vextractf128_si256 (v8si,int)
+     v4df __builtin_ia32_vinsertf128_pd256 (v4df,v2df,int)
+     v8sf __builtin_ia32_vinsertf128_ps256 (v8sf,v4sf,int)
+     v8si __builtin_ia32_vinsertf128_si256 (v8si,v4si,int)
+     v4df __builtin_ia32_vperm2f128_pd256 (v4df,v4df,int)
+     v8sf __builtin_ia32_vperm2f128_ps256 (v8sf,v8sf,int)
+     v8si __builtin_ia32_vperm2f128_si256 (v8si,v8si,int)
+     v2df __builtin_ia32_vpermil2pd (v2df,v2df,v2di,int)
+     v4df __builtin_ia32_vpermil2pd256 (v4df,v4df,v4di,int)
+     v4sf __builtin_ia32_vpermil2ps (v4sf,v4sf,v4si,int)
+     v8sf __builtin_ia32_vpermil2ps256 (v8sf,v8sf,v8si,int)
+     v2df __builtin_ia32_vpermilpd (v2df,int)
+     v4df __builtin_ia32_vpermilpd256 (v4df,int)
+     v4sf __builtin_ia32_vpermilps (v4sf,int)
+     v8sf __builtin_ia32_vpermilps256 (v8sf,int)
+     v2df __builtin_ia32_vpermilvarpd (v2df,v2di)
+     v4df __builtin_ia32_vpermilvarpd256 (v4df,v4di)
+     v4sf __builtin_ia32_vpermilvarps (v4sf,v4si)
+     v8sf __builtin_ia32_vpermilvarps256 (v8sf,v8si)
+     int __builtin_ia32_vtestcpd (v2df,v2df,ptest)
+     int __builtin_ia32_vtestcpd256 (v4df,v4df,ptest)
+     int __builtin_ia32_vtestcps (v4sf,v4sf,ptest)
+     int __builtin_ia32_vtestcps256 (v8sf,v8sf,ptest)
+     int __builtin_ia32_vtestnzcpd (v2df,v2df,ptest)
+     int __builtin_ia32_vtestnzcpd256 (v4df,v4df,ptest)
+     int __builtin_ia32_vtestnzcps (v4sf,v4sf,ptest)
+     int __builtin_ia32_vtestnzcps256 (v8sf,v8sf,ptest)
+     int __builtin_ia32_vtestzpd (v2df,v2df,ptest)
+     int __builtin_ia32_vtestzpd256 (v4df,v4df,ptest)
+     int __builtin_ia32_vtestzps (v4sf,v4sf,ptest)
+     int __builtin_ia32_vtestzps256 (v8sf,v8sf,ptest)
+     void __builtin_ia32_vzeroall (void)
+     void __builtin_ia32_vzeroupper (void)
+     v4df __builtin_ia32_xorpd256 (v4df,v4df)
+     v8sf __builtin_ia32_xorps256 (v8sf,v8sf)
+
+ The following built-in functions are available when `-maes' is used.
+All of them generate the machine instruction that is part of the name.
+
+     v2di __builtin_ia32_aesenc128 (v2di, v2di)
+     v2di __builtin_ia32_aesenclast128 (v2di, v2di)
+     v2di __builtin_ia32_aesdec128 (v2di, v2di)
+     v2di __builtin_ia32_aesdeclast128 (v2di, v2di)
+     v2di __builtin_ia32_aeskeygenassist128 (v2di, const int)
+     v2di __builtin_ia32_aesimc128 (v2di)
+
+ The following built-in function is available when `-mpclmul' is used.
+
+`v2di __builtin_ia32_pclmulqdq128 (v2di, v2di, const int)'
+     Generates the `pclmulqdq' machine instruction.
+
+ The following built-in function is available when `-mfsgsbase' is
+used.  All of them generate the machine instruction that is part of the
+name.
+
+     unsigned int __builtin_ia32_rdfsbase32 (void)
+     unsigned long long __builtin_ia32_rdfsbase64 (void)
+     unsigned int __builtin_ia32_rdgsbase32 (void)
+     unsigned long long __builtin_ia32_rdgsbase64 (void)
+     void _writefsbase_u32 (unsigned int)
+     void _writefsbase_u64 (unsigned long long)
+     void _writegsbase_u32 (unsigned int)
+     void _writegsbase_u64 (unsigned long long)
+
+ The following built-in function is available when `-mrdrnd' is used.
+All of them generate the machine instruction that is part of the name.
+
+     unsigned int __builtin_ia32_rdrand16_step (unsigned short *)
+     unsigned int __builtin_ia32_rdrand32_step (unsigned int *)
+     unsigned int __builtin_ia32_rdrand64_step (unsigned long long *)
+
+ The following built-in functions are available when `-msse4a' is used.
+All of them generate the machine instruction that is part of the name.
+
+     void __builtin_ia32_movntsd (double *, v2df)
+     void __builtin_ia32_movntss (float *, v4sf)
+     v2di __builtin_ia32_extrq  (v2di, v16qi)
+     v2di __builtin_ia32_extrqi (v2di, const unsigned int, const unsigned int)
+     v2di __builtin_ia32_insertq (v2di, v2di)
+     v2di __builtin_ia32_insertqi (v2di, v2di, const unsigned int, const unsigned int)
+
+ The following built-in functions are available when `-mxop' is used.
+     v2df __builtin_ia32_vfrczpd (v2df)
+     v4sf __builtin_ia32_vfrczps (v4sf)
+     v2df __builtin_ia32_vfrczsd (v2df, v2df)
+     v4sf __builtin_ia32_vfrczss (v4sf, v4sf)
+     v4df __builtin_ia32_vfrczpd256 (v4df)
+     v8sf __builtin_ia32_vfrczps256 (v8sf)
+     v2di __builtin_ia32_vpcmov (v2di, v2di, v2di)
+     v2di __builtin_ia32_vpcmov_v2di (v2di, v2di, v2di)
+     v4si __builtin_ia32_vpcmov_v4si (v4si, v4si, v4si)
+     v8hi __builtin_ia32_vpcmov_v8hi (v8hi, v8hi, v8hi)
+     v16qi __builtin_ia32_vpcmov_v16qi (v16qi, v16qi, v16qi)
+     v2df __builtin_ia32_vpcmov_v2df (v2df, v2df, v2df)
+     v4sf __builtin_ia32_vpcmov_v4sf (v4sf, v4sf, v4sf)
+     v4di __builtin_ia32_vpcmov_v4di256 (v4di, v4di, v4di)
+     v8si __builtin_ia32_vpcmov_v8si256 (v8si, v8si, v8si)
+     v16hi __builtin_ia32_vpcmov_v16hi256 (v16hi, v16hi, v16hi)
+     v32qi __builtin_ia32_vpcmov_v32qi256 (v32qi, v32qi, v32qi)
+     v4df __builtin_ia32_vpcmov_v4df256 (v4df, v4df, v4df)
+     v8sf __builtin_ia32_vpcmov_v8sf256 (v8sf, v8sf, v8sf)
+     v16qi __builtin_ia32_vpcomeqb (v16qi, v16qi)
+     v8hi __builtin_ia32_vpcomeqw (v8hi, v8hi)
+     v4si __builtin_ia32_vpcomeqd (v4si, v4si)
+     v2di __builtin_ia32_vpcomeqq (v2di, v2di)
+     v16qi __builtin_ia32_vpcomequb (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomequd (v4si, v4si)
+     v2di __builtin_ia32_vpcomequq (v2di, v2di)
+     v8hi __builtin_ia32_vpcomequw (v8hi, v8hi)
+     v8hi __builtin_ia32_vpcomeqw (v8hi, v8hi)
+     v16qi __builtin_ia32_vpcomfalseb (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomfalsed (v4si, v4si)
+     v2di __builtin_ia32_vpcomfalseq (v2di, v2di)
+     v16qi __builtin_ia32_vpcomfalseub (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomfalseud (v4si, v4si)
+     v2di __builtin_ia32_vpcomfalseuq (v2di, v2di)
+     v8hi __builtin_ia32_vpcomfalseuw (v8hi, v8hi)
+     v8hi __builtin_ia32_vpcomfalsew (v8hi, v8hi)
+     v16qi __builtin_ia32_vpcomgeb (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomged (v4si, v4si)
+     v2di __builtin_ia32_vpcomgeq (v2di, v2di)
+     v16qi __builtin_ia32_vpcomgeub (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomgeud (v4si, v4si)
+     v2di __builtin_ia32_vpcomgeuq (v2di, v2di)
+     v8hi __builtin_ia32_vpcomgeuw (v8hi, v8hi)
+     v8hi __builtin_ia32_vpcomgew (v8hi, v8hi)
+     v16qi __builtin_ia32_vpcomgtb (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomgtd (v4si, v4si)
+     v2di __builtin_ia32_vpcomgtq (v2di, v2di)
+     v16qi __builtin_ia32_vpcomgtub (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomgtud (v4si, v4si)
+     v2di __builtin_ia32_vpcomgtuq (v2di, v2di)
+     v8hi __builtin_ia32_vpcomgtuw (v8hi, v8hi)
+     v8hi __builtin_ia32_vpcomgtw (v8hi, v8hi)
+     v16qi __builtin_ia32_vpcomleb (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomled (v4si, v4si)
+     v2di __builtin_ia32_vpcomleq (v2di, v2di)
+     v16qi __builtin_ia32_vpcomleub (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomleud (v4si, v4si)
+     v2di __builtin_ia32_vpcomleuq (v2di, v2di)
+     v8hi __builtin_ia32_vpcomleuw (v8hi, v8hi)
+     v8hi __builtin_ia32_vpcomlew (v8hi, v8hi)
+     v16qi __builtin_ia32_vpcomltb (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomltd (v4si, v4si)
+     v2di __builtin_ia32_vpcomltq (v2di, v2di)
+     v16qi __builtin_ia32_vpcomltub (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomltud (v4si, v4si)
+     v2di __builtin_ia32_vpcomltuq (v2di, v2di)
+     v8hi __builtin_ia32_vpcomltuw (v8hi, v8hi)
+     v8hi __builtin_ia32_vpcomltw (v8hi, v8hi)
+     v16qi __builtin_ia32_vpcomneb (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomned (v4si, v4si)
+     v2di __builtin_ia32_vpcomneq (v2di, v2di)
+     v16qi __builtin_ia32_vpcomneub (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomneud (v4si, v4si)
+     v2di __builtin_ia32_vpcomneuq (v2di, v2di)
+     v8hi __builtin_ia32_vpcomneuw (v8hi, v8hi)
+     v8hi __builtin_ia32_vpcomnew (v8hi, v8hi)
+     v16qi __builtin_ia32_vpcomtrueb (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomtrued (v4si, v4si)
+     v2di __builtin_ia32_vpcomtrueq (v2di, v2di)
+     v16qi __builtin_ia32_vpcomtrueub (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomtrueud (v4si, v4si)
+     v2di __builtin_ia32_vpcomtrueuq (v2di, v2di)
+     v8hi __builtin_ia32_vpcomtrueuw (v8hi, v8hi)
+     v8hi __builtin_ia32_vpcomtruew (v8hi, v8hi)
+     v4si __builtin_ia32_vphaddbd (v16qi)
+     v2di __builtin_ia32_vphaddbq (v16qi)
+     v8hi __builtin_ia32_vphaddbw (v16qi)
+     v2di __builtin_ia32_vphadddq (v4si)
+     v4si __builtin_ia32_vphaddubd (v16qi)
+     v2di __builtin_ia32_vphaddubq (v16qi)
+     v8hi __builtin_ia32_vphaddubw (v16qi)
+     v2di __builtin_ia32_vphaddudq (v4si)
+     v4si __builtin_ia32_vphadduwd (v8hi)
+     v2di __builtin_ia32_vphadduwq (v8hi)
+     v4si __builtin_ia32_vphaddwd (v8hi)
+     v2di __builtin_ia32_vphaddwq (v8hi)
+     v8hi __builtin_ia32_vphsubbw (v16qi)
+     v2di __builtin_ia32_vphsubdq (v4si)
+     v4si __builtin_ia32_vphsubwd (v8hi)
+     v4si __builtin_ia32_vpmacsdd (v4si, v4si, v4si)
+     v2di __builtin_ia32_vpmacsdqh (v4si, v4si, v2di)
+     v2di __builtin_ia32_vpmacsdql (v4si, v4si, v2di)
+     v4si __builtin_ia32_vpmacssdd (v4si, v4si, v4si)
+     v2di __builtin_ia32_vpmacssdqh (v4si, v4si, v2di)
+     v2di __builtin_ia32_vpmacssdql (v4si, v4si, v2di)
+     v4si __builtin_ia32_vpmacsswd (v8hi, v8hi, v4si)
+     v8hi __builtin_ia32_vpmacssww (v8hi, v8hi, v8hi)
+     v4si __builtin_ia32_vpmacswd (v8hi, v8hi, v4si)
+     v8hi __builtin_ia32_vpmacsww (v8hi, v8hi, v8hi)
+     v4si __builtin_ia32_vpmadcsswd (v8hi, v8hi, v4si)
+     v4si __builtin_ia32_vpmadcswd (v8hi, v8hi, v4si)
+     v16qi __builtin_ia32_vpperm (v16qi, v16qi, v16qi)
+     v16qi __builtin_ia32_vprotb (v16qi, v16qi)
+     v4si __builtin_ia32_vprotd (v4si, v4si)
+     v2di __builtin_ia32_vprotq (v2di, v2di)
+     v8hi __builtin_ia32_vprotw (v8hi, v8hi)
+     v16qi __builtin_ia32_vpshab (v16qi, v16qi)
+     v4si __builtin_ia32_vpshad (v4si, v4si)
+     v2di __builtin_ia32_vpshaq (v2di, v2di)
+     v8hi __builtin_ia32_vpshaw (v8hi, v8hi)
+     v16qi __builtin_ia32_vpshlb (v16qi, v16qi)
+     v4si __builtin_ia32_vpshld (v4si, v4si)
+     v2di __builtin_ia32_vpshlq (v2di, v2di)
+     v8hi __builtin_ia32_vpshlw (v8hi, v8hi)
+
+ The following built-in functions are available when `-mfma4' is used.
+All of them generate the machine instruction that is part of the name
+with MMX registers.
+
+     v2df __builtin_ia32_fmaddpd (v2df, v2df, v2df)
+     v4sf __builtin_ia32_fmaddps (v4sf, v4sf, v4sf)
+     v2df __builtin_ia32_fmaddsd (v2df, v2df, v2df)
+     v4sf __builtin_ia32_fmaddss (v4sf, v4sf, v4sf)
+     v2df __builtin_ia32_fmsubpd (v2df, v2df, v2df)
+     v4sf __builtin_ia32_fmsubps (v4sf, v4sf, v4sf)
+     v2df __builtin_ia32_fmsubsd (v2df, v2df, v2df)
+     v4sf __builtin_ia32_fmsubss (v4sf, v4sf, v4sf)
+     v2df __builtin_ia32_fnmaddpd (v2df, v2df, v2df)
+     v4sf __builtin_ia32_fnmaddps (v4sf, v4sf, v4sf)
+     v2df __builtin_ia32_fnmaddsd (v2df, v2df, v2df)
+     v4sf __builtin_ia32_fnmaddss (v4sf, v4sf, v4sf)
+     v2df __builtin_ia32_fnmsubpd (v2df, v2df, v2df)
+     v4sf __builtin_ia32_fnmsubps (v4sf, v4sf, v4sf)
+     v2df __builtin_ia32_fnmsubsd (v2df, v2df, v2df)
+     v4sf __builtin_ia32_fnmsubss (v4sf, v4sf, v4sf)
+     v2df __builtin_ia32_fmaddsubpd  (v2df, v2df, v2df)
+     v4sf __builtin_ia32_fmaddsubps  (v4sf, v4sf, v4sf)
+     v2df __builtin_ia32_fmsubaddpd  (v2df, v2df, v2df)
+     v4sf __builtin_ia32_fmsubaddps  (v4sf, v4sf, v4sf)
+     v4df __builtin_ia32_fmaddpd256 (v4df, v4df, v4df)
+     v8sf __builtin_ia32_fmaddps256 (v8sf, v8sf, v8sf)
+     v4df __builtin_ia32_fmsubpd256 (v4df, v4df, v4df)
+     v8sf __builtin_ia32_fmsubps256 (v8sf, v8sf, v8sf)
+     v4df __builtin_ia32_fnmaddpd256 (v4df, v4df, v4df)
+     v8sf __builtin_ia32_fnmaddps256 (v8sf, v8sf, v8sf)
+     v4df __builtin_ia32_fnmsubpd256 (v4df, v4df, v4df)
+     v8sf __builtin_ia32_fnmsubps256 (v8sf, v8sf, v8sf)
+     v4df __builtin_ia32_fmaddsubpd256 (v4df, v4df, v4df)
+     v8sf __builtin_ia32_fmaddsubps256 (v8sf, v8sf, v8sf)
+     v4df __builtin_ia32_fmsubaddpd256 (v4df, v4df, v4df)
+     v8sf __builtin_ia32_fmsubaddps256 (v8sf, v8sf, v8sf)
+
+ The following built-in functions are available when `-mlwp' is used.
+
+     void __builtin_ia32_llwpcb16 (void *);
+     void __builtin_ia32_llwpcb32 (void *);
+     void __builtin_ia32_llwpcb64 (void *);
+     void * __builtin_ia32_llwpcb16 (void);
+     void * __builtin_ia32_llwpcb32 (void);
+     void * __builtin_ia32_llwpcb64 (void);
+     void __builtin_ia32_lwpval16 (unsigned short, unsigned int, unsigned short)
+     void __builtin_ia32_lwpval32 (unsigned int, unsigned int, unsigned int)
+     void __builtin_ia32_lwpval64 (unsigned __int64, unsigned int, unsigned int)
+     unsigned char __builtin_ia32_lwpins16 (unsigned short, unsigned int, unsigned short)
+     unsigned char __builtin_ia32_lwpins32 (unsigned int, unsigned int, unsigned int)
+     unsigned char __builtin_ia32_lwpins64 (unsigned __int64, unsigned int, unsigned int)
+
+ The following built-in functions are available when `-mbmi' is used.
+All of them generate the machine instruction that is part of the name.
+     unsigned int __builtin_ia32_bextr_u32(unsigned int, unsigned int);
+     unsigned long long __builtin_ia32_bextr_u64 (unsigned long long, unsigned long long);
+     unsigned short __builtin_ia32_lzcnt_16(unsigned short);
+     unsigned int __builtin_ia32_lzcnt_u32(unsigned int);
+     unsigned long long __builtin_ia32_lzcnt_u64 (unsigned long long);
+
+ The following built-in functions are available when `-mtbm' is used.
+Both of them generate the immediate form of the bextr machine
+instruction.
+     unsigned int __builtin_ia32_bextri_u32 (unsigned int, const unsigned int);
+     unsigned long long __builtin_ia32_bextri_u64 (unsigned long long, const unsigned long long);
+
+ The following built-in functions are available when `-m3dnow' is used.
+All of them generate the machine instruction that is part of the name.
+
+     void __builtin_ia32_femms (void)
+     v8qi __builtin_ia32_pavgusb (v8qi, v8qi)
+     v2si __builtin_ia32_pf2id (v2sf)
+     v2sf __builtin_ia32_pfacc (v2sf, v2sf)
+     v2sf __builtin_ia32_pfadd (v2sf, v2sf)
+     v2si __builtin_ia32_pfcmpeq (v2sf, v2sf)
+     v2si __builtin_ia32_pfcmpge (v2sf, v2sf)
+     v2si __builtin_ia32_pfcmpgt (v2sf, v2sf)
+     v2sf __builtin_ia32_pfmax (v2sf, v2sf)
+     v2sf __builtin_ia32_pfmin (v2sf, v2sf)
+     v2sf __builtin_ia32_pfmul (v2sf, v2sf)
+     v2sf __builtin_ia32_pfrcp (v2sf)
+     v2sf __builtin_ia32_pfrcpit1 (v2sf, v2sf)
+     v2sf __builtin_ia32_pfrcpit2 (v2sf, v2sf)
+     v2sf __builtin_ia32_pfrsqrt (v2sf)
+     v2sf __builtin_ia32_pfrsqrtit1 (v2sf, v2sf)
+     v2sf __builtin_ia32_pfsub (v2sf, v2sf)
+     v2sf __builtin_ia32_pfsubr (v2sf, v2sf)
+     v2sf __builtin_ia32_pi2fd (v2si)
+     v4hi __builtin_ia32_pmulhrw (v4hi, v4hi)
+
+ The following built-in functions are available when both `-m3dnow' and
+`-march=athlon' are used.  All of them generate the machine instruction
+that is part of the name.
+
+     v2si __builtin_ia32_pf2iw (v2sf)
+     v2sf __builtin_ia32_pfnacc (v2sf, v2sf)
+     v2sf __builtin_ia32_pfpnacc (v2sf, v2sf)
+     v2sf __builtin_ia32_pi2fw (v2si)
+     v2sf __builtin_ia32_pswapdsf (v2sf)
+     v2si __builtin_ia32_pswapdsi (v2si)
+
+
+File: gcc.info,  Node: MIPS DSP Built-in Functions,  Next: MIPS Paired-Single Support,  Prev: X86 Built-in Functions,  Up: Target Builtins
+
+6.54.7 MIPS DSP Built-in Functions
+----------------------------------
+
+The MIPS DSP Application-Specific Extension (ASE) includes new
+instructions that are designed to improve the performance of DSP and
+media applications.  It provides instructions that operate on packed
+8-bit/16-bit integer data, Q7, Q15 and Q31 fractional data.
+
+ GCC supports MIPS DSP operations using both the generic vector
+extensions (*note Vector Extensions::) and a collection of
+MIPS-specific built-in functions.  Both kinds of support are enabled by
+the `-mdsp' command-line option.
+
+ Revision 2 of the ASE was introduced in the second half of 2006.  This
+revision adds extra instructions to the original ASE, but is otherwise
+backwards-compatible with it.  You can select revision 2 using the
+command-line option `-mdspr2'; this option implies `-mdsp'.
+
+ The SCOUNT and POS bits of the DSP control register are global.  The
+WRDSP, EXTPDP, EXTPDPV and MTHLIP instructions modify the SCOUNT and
+POS bits.  During optimization, the compiler will not delete these
+instructions and it will not delete calls to functions containing these
+instructions.
+
+ At present, GCC only provides support for operations on 32-bit
+vectors.  The vector type associated with 8-bit integer data is usually
+called `v4i8', the vector type associated with Q7 is usually called
+`v4q7', the vector type associated with 16-bit integer data is usually
+called `v2i16', and the vector type associated with Q15 is usually
+called `v2q15'.  They can be defined in C as follows:
+
+     typedef signed char v4i8 __attribute__ ((vector_size(4)));
+     typedef signed char v4q7 __attribute__ ((vector_size(4)));
+     typedef short v2i16 __attribute__ ((vector_size(4)));
+     typedef short v2q15 __attribute__ ((vector_size(4)));
+
+ `v4i8', `v4q7', `v2i16' and `v2q15' values are initialized in the same
+way as aggregates.  For example:
+
+     v4i8 a = {1, 2, 3, 4};
+     v4i8 b;
+     b = (v4i8) {5, 6, 7, 8};
+
+     v2q15 c = {0x0fcb, 0x3a75};
+     v2q15 d;
+     d = (v2q15) {0.1234 * 0x1.0p15, 0.4567 * 0x1.0p15};
+
+ _Note:_ The CPU's endianness determines the order in which values are
+packed.  On little-endian targets, the first value is the least
+significant and the last value is the most significant.  The opposite
+order applies to big-endian targets.  For example, the code above will
+set the lowest byte of `a' to `1' on little-endian targets and `4' on
+big-endian targets.
+
+ _Note:_ Q7, Q15 and Q31 values must be initialized with their integer
+representation.  As shown in this example, the integer representation
+of a Q7 value can be obtained by multiplying the fractional value by
+`0x1.0p7'.  The equivalent for Q15 values is to multiply by `0x1.0p15'.
+The equivalent for Q31 values is to multiply by `0x1.0p31'.
+
+ The table below lists the `v4i8' and `v2q15' operations for which
+hardware support exists.  `a' and `b' are `v4i8' values, and `c' and
+`d' are `v2q15' values.
+
+C code                               MIPS instruction
+`a + b'                              `addu.qb'
+`c + d'                              `addq.ph'
+`a - b'                              `subu.qb'
+`c - d'                              `subq.ph'
+
+ The table below lists the `v2i16' operation for which hardware support
+exists for the DSP ASE REV 2.  `e' and `f' are `v2i16' values.
+
+C code                               MIPS instruction
+`e * f'                              `mul.ph'
+
+ It is easier to describe the DSP built-in functions if we first define
+the following types:
+
+     typedef int q31;
+     typedef int i32;
+     typedef unsigned int ui32;
+     typedef long long a64;
+
+ `q31' and `i32' are actually the same as `int', but we use `q31' to
+indicate a Q31 fractional value and `i32' to indicate a 32-bit integer
+value.  Similarly, `a64' is the same as `long long', but we use `a64'
+to indicate values that will be placed in one of the four DSP
+accumulators (`$ac0', `$ac1', `$ac2' or `$ac3').
+
+ Also, some built-in functions prefer or require immediate numbers as
+parameters, because the corresponding DSP instructions accept both
+immediate numbers and register operands, or accept immediate numbers
+only.  The immediate parameters are listed as follows.
+
+     imm0_3: 0 to 3.
+     imm0_7: 0 to 7.
+     imm0_15: 0 to 15.
+     imm0_31: 0 to 31.
+     imm0_63: 0 to 63.
+     imm0_255: 0 to 255.
+     imm_n32_31: -32 to 31.
+     imm_n512_511: -512 to 511.
+
+ The following built-in functions map directly to a particular MIPS DSP
+instruction.  Please refer to the architecture specification for
+details on what each instruction does.
+
+     v2q15 __builtin_mips_addq_ph (v2q15, v2q15)
+     v2q15 __builtin_mips_addq_s_ph (v2q15, v2q15)
+     q31 __builtin_mips_addq_s_w (q31, q31)
+     v4i8 __builtin_mips_addu_qb (v4i8, v4i8)
+     v4i8 __builtin_mips_addu_s_qb (v4i8, v4i8)
+     v2q15 __builtin_mips_subq_ph (v2q15, v2q15)
+     v2q15 __builtin_mips_subq_s_ph (v2q15, v2q15)
+     q31 __builtin_mips_subq_s_w (q31, q31)
+     v4i8 __builtin_mips_subu_qb (v4i8, v4i8)
+     v4i8 __builtin_mips_subu_s_qb (v4i8, v4i8)
+     i32 __builtin_mips_addsc (i32, i32)
+     i32 __builtin_mips_addwc (i32, i32)
+     i32 __builtin_mips_modsub (i32, i32)
+     i32 __builtin_mips_raddu_w_qb (v4i8)
+     v2q15 __builtin_mips_absq_s_ph (v2q15)
+     q31 __builtin_mips_absq_s_w (q31)
+     v4i8 __builtin_mips_precrq_qb_ph (v2q15, v2q15)
+     v2q15 __builtin_mips_precrq_ph_w (q31, q31)
+     v2q15 __builtin_mips_precrq_rs_ph_w (q31, q31)
+     v4i8 __builtin_mips_precrqu_s_qb_ph (v2q15, v2q15)
+     q31 __builtin_mips_preceq_w_phl (v2q15)
+     q31 __builtin_mips_preceq_w_phr (v2q15)
+     v2q15 __builtin_mips_precequ_ph_qbl (v4i8)
+     v2q15 __builtin_mips_precequ_ph_qbr (v4i8)
+     v2q15 __builtin_mips_precequ_ph_qbla (v4i8)
+     v2q15 __builtin_mips_precequ_ph_qbra (v4i8)
+     v2q15 __builtin_mips_preceu_ph_qbl (v4i8)
+     v2q15 __builtin_mips_preceu_ph_qbr (v4i8)
+     v2q15 __builtin_mips_preceu_ph_qbla (v4i8)
+     v2q15 __builtin_mips_preceu_ph_qbra (v4i8)
+     v4i8 __builtin_mips_shll_qb (v4i8, imm0_7)
+     v4i8 __builtin_mips_shll_qb (v4i8, i32)
+     v2q15 __builtin_mips_shll_ph (v2q15, imm0_15)
+     v2q15 __builtin_mips_shll_ph (v2q15, i32)
+     v2q15 __builtin_mips_shll_s_ph (v2q15, imm0_15)
+     v2q15 __builtin_mips_shll_s_ph (v2q15, i32)
+     q31 __builtin_mips_shll_s_w (q31, imm0_31)
+     q31 __builtin_mips_shll_s_w (q31, i32)
+     v4i8 __builtin_mips_shrl_qb (v4i8, imm0_7)
+     v4i8 __builtin_mips_shrl_qb (v4i8, i32)
+     v2q15 __builtin_mips_shra_ph (v2q15, imm0_15)
+     v2q15 __builtin_mips_shra_ph (v2q15, i32)
+     v2q15 __builtin_mips_shra_r_ph (v2q15, imm0_15)
+     v2q15 __builtin_mips_shra_r_ph (v2q15, i32)
+     q31 __builtin_mips_shra_r_w (q31, imm0_31)
+     q31 __builtin_mips_shra_r_w (q31, i32)
+     v2q15 __builtin_mips_muleu_s_ph_qbl (v4i8, v2q15)
+     v2q15 __builtin_mips_muleu_s_ph_qbr (v4i8, v2q15)
+     v2q15 __builtin_mips_mulq_rs_ph (v2q15, v2q15)
+     q31 __builtin_mips_muleq_s_w_phl (v2q15, v2q15)
+     q31 __builtin_mips_muleq_s_w_phr (v2q15, v2q15)
+     a64 __builtin_mips_dpau_h_qbl (a64, v4i8, v4i8)
+     a64 __builtin_mips_dpau_h_qbr (a64, v4i8, v4i8)
+     a64 __builtin_mips_dpsu_h_qbl (a64, v4i8, v4i8)
+     a64 __builtin_mips_dpsu_h_qbr (a64, v4i8, v4i8)
+     a64 __builtin_mips_dpaq_s_w_ph (a64, v2q15, v2q15)
+     a64 __builtin_mips_dpaq_sa_l_w (a64, q31, q31)
+     a64 __builtin_mips_dpsq_s_w_ph (a64, v2q15, v2q15)
+     a64 __builtin_mips_dpsq_sa_l_w (a64, q31, q31)
+     a64 __builtin_mips_mulsaq_s_w_ph (a64, v2q15, v2q15)
+     a64 __builtin_mips_maq_s_w_phl (a64, v2q15, v2q15)
+     a64 __builtin_mips_maq_s_w_phr (a64, v2q15, v2q15)
+     a64 __builtin_mips_maq_sa_w_phl (a64, v2q15, v2q15)
+     a64 __builtin_mips_maq_sa_w_phr (a64, v2q15, v2q15)
+     i32 __builtin_mips_bitrev (i32)
+     i32 __builtin_mips_insv (i32, i32)
+     v4i8 __builtin_mips_repl_qb (imm0_255)
+     v4i8 __builtin_mips_repl_qb (i32)
+     v2q15 __builtin_mips_repl_ph (imm_n512_511)
+     v2q15 __builtin_mips_repl_ph (i32)
+     void __builtin_mips_cmpu_eq_qb (v4i8, v4i8)
+     void __builtin_mips_cmpu_lt_qb (v4i8, v4i8)
+     void __builtin_mips_cmpu_le_qb (v4i8, v4i8)
+     i32 __builtin_mips_cmpgu_eq_qb (v4i8, v4i8)
+     i32 __builtin_mips_cmpgu_lt_qb (v4i8, v4i8)
+     i32 __builtin_mips_cmpgu_le_qb (v4i8, v4i8)
+     void __builtin_mips_cmp_eq_ph (v2q15, v2q15)
+     void __builtin_mips_cmp_lt_ph (v2q15, v2q15)
+     void __builtin_mips_cmp_le_ph (v2q15, v2q15)
+     v4i8 __builtin_mips_pick_qb (v4i8, v4i8)
+     v2q15 __builtin_mips_pick_ph (v2q15, v2q15)
+     v2q15 __builtin_mips_packrl_ph (v2q15, v2q15)
+     i32 __builtin_mips_extr_w (a64, imm0_31)
+     i32 __builtin_mips_extr_w (a64, i32)
+     i32 __builtin_mips_extr_r_w (a64, imm0_31)
+     i32 __builtin_mips_extr_s_h (a64, i32)
+     i32 __builtin_mips_extr_rs_w (a64, imm0_31)
+     i32 __builtin_mips_extr_rs_w (a64, i32)
+     i32 __builtin_mips_extr_s_h (a64, imm0_31)
+     i32 __builtin_mips_extr_r_w (a64, i32)
+     i32 __builtin_mips_extp (a64, imm0_31)
+     i32 __builtin_mips_extp (a64, i32)
+     i32 __builtin_mips_extpdp (a64, imm0_31)
+     i32 __builtin_mips_extpdp (a64, i32)
+     a64 __builtin_mips_shilo (a64, imm_n32_31)
+     a64 __builtin_mips_shilo (a64, i32)
+     a64 __builtin_mips_mthlip (a64, i32)
+     void __builtin_mips_wrdsp (i32, imm0_63)
+     i32 __builtin_mips_rddsp (imm0_63)
+     i32 __builtin_mips_lbux (void *, i32)
+     i32 __builtin_mips_lhx (void *, i32)
+     i32 __builtin_mips_lwx (void *, i32)
+     i32 __builtin_mips_bposge32 (void)
+     a64 __builtin_mips_madd (a64, i32, i32);
+     a64 __builtin_mips_maddu (a64, ui32, ui32);
+     a64 __builtin_mips_msub (a64, i32, i32);
+     a64 __builtin_mips_msubu (a64, ui32, ui32);
+     a64 __builtin_mips_mult (i32, i32);
+     a64 __builtin_mips_multu (ui32, ui32);
+
+ The following built-in functions map directly to a particular MIPS DSP
+REV 2 instruction.  Please refer to the architecture specification for
+details on what each instruction does.
+
+     v4q7 __builtin_mips_absq_s_qb (v4q7);
+     v2i16 __builtin_mips_addu_ph (v2i16, v2i16);
+     v2i16 __builtin_mips_addu_s_ph (v2i16, v2i16);
+     v4i8 __builtin_mips_adduh_qb (v4i8, v4i8);
+     v4i8 __builtin_mips_adduh_r_qb (v4i8, v4i8);
+     i32 __builtin_mips_append (i32, i32, imm0_31);
+     i32 __builtin_mips_balign (i32, i32, imm0_3);
+     i32 __builtin_mips_cmpgdu_eq_qb (v4i8, v4i8);
+     i32 __builtin_mips_cmpgdu_lt_qb (v4i8, v4i8);
+     i32 __builtin_mips_cmpgdu_le_qb (v4i8, v4i8);
+     a64 __builtin_mips_dpa_w_ph (a64, v2i16, v2i16);
+     a64 __builtin_mips_dps_w_ph (a64, v2i16, v2i16);
+     v2i16 __builtin_mips_mul_ph (v2i16, v2i16);
+     v2i16 __builtin_mips_mul_s_ph (v2i16, v2i16);
+     q31 __builtin_mips_mulq_rs_w (q31, q31);
+     v2q15 __builtin_mips_mulq_s_ph (v2q15, v2q15);
+     q31 __builtin_mips_mulq_s_w (q31, q31);
+     a64 __builtin_mips_mulsa_w_ph (a64, v2i16, v2i16);
+     v4i8 __builtin_mips_precr_qb_ph (v2i16, v2i16);
+     v2i16 __builtin_mips_precr_sra_ph_w (i32, i32, imm0_31);
+     v2i16 __builtin_mips_precr_sra_r_ph_w (i32, i32, imm0_31);
+     i32 __builtin_mips_prepend (i32, i32, imm0_31);
+     v4i8 __builtin_mips_shra_qb (v4i8, imm0_7);
+     v4i8 __builtin_mips_shra_r_qb (v4i8, imm0_7);
+     v4i8 __builtin_mips_shra_qb (v4i8, i32);
+     v4i8 __builtin_mips_shra_r_qb (v4i8, i32);
+     v2i16 __builtin_mips_shrl_ph (v2i16, imm0_15);
+     v2i16 __builtin_mips_shrl_ph (v2i16, i32);
+     v2i16 __builtin_mips_subu_ph (v2i16, v2i16);
+     v2i16 __builtin_mips_subu_s_ph (v2i16, v2i16);
+     v4i8 __builtin_mips_subuh_qb (v4i8, v4i8);
+     v4i8 __builtin_mips_subuh_r_qb (v4i8, v4i8);
+     v2q15 __builtin_mips_addqh_ph (v2q15, v2q15);
+     v2q15 __builtin_mips_addqh_r_ph (v2q15, v2q15);
+     q31 __builtin_mips_addqh_w (q31, q31);
+     q31 __builtin_mips_addqh_r_w (q31, q31);
+     v2q15 __builtin_mips_subqh_ph (v2q15, v2q15);
+     v2q15 __builtin_mips_subqh_r_ph (v2q15, v2q15);
+     q31 __builtin_mips_subqh_w (q31, q31);
+     q31 __builtin_mips_subqh_r_w (q31, q31);
+     a64 __builtin_mips_dpax_w_ph (a64, v2i16, v2i16);
+     a64 __builtin_mips_dpsx_w_ph (a64, v2i16, v2i16);
+     a64 __builtin_mips_dpaqx_s_w_ph (a64, v2q15, v2q15);
+     a64 __builtin_mips_dpaqx_sa_w_ph (a64, v2q15, v2q15);
+     a64 __builtin_mips_dpsqx_s_w_ph (a64, v2q15, v2q15);
+     a64 __builtin_mips_dpsqx_sa_w_ph (a64, v2q15, v2q15);
+
+
+File: gcc.info,  Node: MIPS Paired-Single Support,  Next: MIPS Loongson Built-in Functions,  Prev: MIPS DSP Built-in Functions,  Up: Target Builtins
+
+6.54.8 MIPS Paired-Single Support
+---------------------------------
+
+The MIPS64 architecture includes a number of instructions that operate
+on pairs of single-precision floating-point values.  Each pair is
+packed into a 64-bit floating-point register, with one element being
+designated the "upper half" and the other being designated the "lower
+half".
+
+ GCC supports paired-single operations using both the generic vector
+extensions (*note Vector Extensions::) and a collection of
+MIPS-specific built-in functions.  Both kinds of support are enabled by
+the `-mpaired-single' command-line option.
+
+ The vector type associated with paired-single values is usually called
+`v2sf'.  It can be defined in C as follows:
+
+     typedef float v2sf __attribute__ ((vector_size (8)));
+
+ `v2sf' values are initialized in the same way as aggregates.  For
+example:
+
+     v2sf a = {1.5, 9.1};
+     v2sf b;
+     float e, f;
+     b = (v2sf) {e, f};
+
+ _Note:_ The CPU's endianness determines which value is stored in the
+upper half of a register and which value is stored in the lower half.
+On little-endian targets, the first value is the lower one and the
+second value is the upper one.  The opposite order applies to
+big-endian targets.  For example, the code above will set the lower
+half of `a' to `1.5' on little-endian targets and `9.1' on big-endian
+targets.
+
+
+File: gcc.info,  Node: MIPS Loongson Built-in Functions,  Next: Other MIPS Built-in Functions,  Prev: MIPS Paired-Single Support,  Up: Target Builtins
+
+6.54.9 MIPS Loongson Built-in Functions
+---------------------------------------
+
+GCC provides intrinsics to access the SIMD instructions provided by the
+ST Microelectronics Loongson-2E and -2F processors.  These intrinsics,
+available after inclusion of the `loongson.h' header file, operate on
+the following 64-bit vector types:
+
+   * `uint8x8_t', a vector of eight unsigned 8-bit integers;
+
+   * `uint16x4_t', a vector of four unsigned 16-bit integers;
+
+   * `uint32x2_t', a vector of two unsigned 32-bit integers;
+
+   * `int8x8_t', a vector of eight signed 8-bit integers;
+
+   * `int16x4_t', a vector of four signed 16-bit integers;
+
+   * `int32x2_t', a vector of two signed 32-bit integers.
+
+ The intrinsics provided are listed below; each is named after the
+machine instruction to which it corresponds, with suffixes added as
+appropriate to distinguish intrinsics that expand to the same machine
+instruction yet have different argument types.  Refer to the
+architecture documentation for a description of the functionality of
+each instruction.
+
+     int16x4_t packsswh (int32x2_t s, int32x2_t t);
+     int8x8_t packsshb (int16x4_t s, int16x4_t t);
+     uint8x8_t packushb (uint16x4_t s, uint16x4_t t);
+     uint32x2_t paddw_u (uint32x2_t s, uint32x2_t t);
+     uint16x4_t paddh_u (uint16x4_t s, uint16x4_t t);
+     uint8x8_t paddb_u (uint8x8_t s, uint8x8_t t);
+     int32x2_t paddw_s (int32x2_t s, int32x2_t t);
+     int16x4_t paddh_s (int16x4_t s, int16x4_t t);
+     int8x8_t paddb_s (int8x8_t s, int8x8_t t);
+     uint64_t paddd_u (uint64_t s, uint64_t t);
+     int64_t paddd_s (int64_t s, int64_t t);
+     int16x4_t paddsh (int16x4_t s, int16x4_t t);
+     int8x8_t paddsb (int8x8_t s, int8x8_t t);
+     uint16x4_t paddush (uint16x4_t s, uint16x4_t t);
+     uint8x8_t paddusb (uint8x8_t s, uint8x8_t t);
+     uint64_t pandn_ud (uint64_t s, uint64_t t);
+     uint32x2_t pandn_uw (uint32x2_t s, uint32x2_t t);
+     uint16x4_t pandn_uh (uint16x4_t s, uint16x4_t t);
+     uint8x8_t pandn_ub (uint8x8_t s, uint8x8_t t);
+     int64_t pandn_sd (int64_t s, int64_t t);
+     int32x2_t pandn_sw (int32x2_t s, int32x2_t t);
+     int16x4_t pandn_sh (int16x4_t s, int16x4_t t);
+     int8x8_t pandn_sb (int8x8_t s, int8x8_t t);
+     uint16x4_t pavgh (uint16x4_t s, uint16x4_t t);
+     uint8x8_t pavgb (uint8x8_t s, uint8x8_t t);
+     uint32x2_t pcmpeqw_u (uint32x2_t s, uint32x2_t t);
+     uint16x4_t pcmpeqh_u (uint16x4_t s, uint16x4_t t);
+     uint8x8_t pcmpeqb_u (uint8x8_t s, uint8x8_t t);
+     int32x2_t pcmpeqw_s (int32x2_t s, int32x2_t t);
+     int16x4_t pcmpeqh_s (int16x4_t s, int16x4_t t);
+     int8x8_t pcmpeqb_s (int8x8_t s, int8x8_t t);
+     uint32x2_t pcmpgtw_u (uint32x2_t s, uint32x2_t t);
+     uint16x4_t pcmpgth_u (uint16x4_t s, uint16x4_t t);
+     uint8x8_t pcmpgtb_u (uint8x8_t s, uint8x8_t t);
+     int32x2_t pcmpgtw_s (int32x2_t s, int32x2_t t);
+     int16x4_t pcmpgth_s (int16x4_t s, int16x4_t t);
+     int8x8_t pcmpgtb_s (int8x8_t s, int8x8_t t);
+     uint16x4_t pextrh_u (uint16x4_t s, int field);
+     int16x4_t pextrh_s (int16x4_t s, int field);
+     uint16x4_t pinsrh_0_u (uint16x4_t s, uint16x4_t t);
+     uint16x4_t pinsrh_1_u (uint16x4_t s, uint16x4_t t);
+     uint16x4_t pinsrh_2_u (uint16x4_t s, uint16x4_t t);
+     uint16x4_t pinsrh_3_u (uint16x4_t s, uint16x4_t t);
+     int16x4_t pinsrh_0_s (int16x4_t s, int16x4_t t);
+     int16x4_t pinsrh_1_s (int16x4_t s, int16x4_t t);
+     int16x4_t pinsrh_2_s (int16x4_t s, int16x4_t t);
+     int16x4_t pinsrh_3_s (int16x4_t s, int16x4_t t);
+     int32x2_t pmaddhw (int16x4_t s, int16x4_t t);
+     int16x4_t pmaxsh (int16x4_t s, int16x4_t t);
+     uint8x8_t pmaxub (uint8x8_t s, uint8x8_t t);
+     int16x4_t pminsh (int16x4_t s, int16x4_t t);
+     uint8x8_t pminub (uint8x8_t s, uint8x8_t t);
+     uint8x8_t pmovmskb_u (uint8x8_t s);
+     int8x8_t pmovmskb_s (int8x8_t s);
+     uint16x4_t pmulhuh (uint16x4_t s, uint16x4_t t);
+     int16x4_t pmulhh (int16x4_t s, int16x4_t t);
+     int16x4_t pmullh (int16x4_t s, int16x4_t t);
+     int64_t pmuluw (uint32x2_t s, uint32x2_t t);
+     uint8x8_t pasubub (uint8x8_t s, uint8x8_t t);
+     uint16x4_t biadd (uint8x8_t s);
+     uint16x4_t psadbh (uint8x8_t s, uint8x8_t t);
+     uint16x4_t pshufh_u (uint16x4_t dest, uint16x4_t s, uint8_t order);
+     int16x4_t pshufh_s (int16x4_t dest, int16x4_t s, uint8_t order);
+     uint16x4_t psllh_u (uint16x4_t s, uint8_t amount);
+     int16x4_t psllh_s (int16x4_t s, uint8_t amount);
+     uint32x2_t psllw_u (uint32x2_t s, uint8_t amount);
+     int32x2_t psllw_s (int32x2_t s, uint8_t amount);
+     uint16x4_t psrlh_u (uint16x4_t s, uint8_t amount);
+     int16x4_t psrlh_s (int16x4_t s, uint8_t amount);
+     uint32x2_t psrlw_u (uint32x2_t s, uint8_t amount);
+     int32x2_t psrlw_s (int32x2_t s, uint8_t amount);
+     uint16x4_t psrah_u (uint16x4_t s, uint8_t amount);
+     int16x4_t psrah_s (int16x4_t s, uint8_t amount);
+     uint32x2_t psraw_u (uint32x2_t s, uint8_t amount);
+     int32x2_t psraw_s (int32x2_t s, uint8_t amount);
+     uint32x2_t psubw_u (uint32x2_t s, uint32x2_t t);
+     uint16x4_t psubh_u (uint16x4_t s, uint16x4_t t);
+     uint8x8_t psubb_u (uint8x8_t s, uint8x8_t t);
+     int32x2_t psubw_s (int32x2_t s, int32x2_t t);
+     int16x4_t psubh_s (int16x4_t s, int16x4_t t);
+     int8x8_t psubb_s (int8x8_t s, int8x8_t t);
+     uint64_t psubd_u (uint64_t s, uint64_t t);
+     int64_t psubd_s (int64_t s, int64_t t);
+     int16x4_t psubsh (int16x4_t s, int16x4_t t);
+     int8x8_t psubsb (int8x8_t s, int8x8_t t);
+     uint16x4_t psubush (uint16x4_t s, uint16x4_t t);
+     uint8x8_t psubusb (uint8x8_t s, uint8x8_t t);
+     uint32x2_t punpckhwd_u (uint32x2_t s, uint32x2_t t);
+     uint16x4_t punpckhhw_u (uint16x4_t s, uint16x4_t t);
+     uint8x8_t punpckhbh_u (uint8x8_t s, uint8x8_t t);
+     int32x2_t punpckhwd_s (int32x2_t s, int32x2_t t);
+     int16x4_t punpckhhw_s (int16x4_t s, int16x4_t t);
+     int8x8_t punpckhbh_s (int8x8_t s, int8x8_t t);
+     uint32x2_t punpcklwd_u (uint32x2_t s, uint32x2_t t);
+     uint16x4_t punpcklhw_u (uint16x4_t s, uint16x4_t t);
+     uint8x8_t punpcklbh_u (uint8x8_t s, uint8x8_t t);
+     int32x2_t punpcklwd_s (int32x2_t s, int32x2_t t);
+     int16x4_t punpcklhw_s (int16x4_t s, int16x4_t t);
+     int8x8_t punpcklbh_s (int8x8_t s, int8x8_t t);
+
+* Menu:
+
+* Paired-Single Arithmetic::
+* Paired-Single Built-in Functions::
+* MIPS-3D Built-in Functions::
+
+
+File: gcc.info,  Node: Paired-Single Arithmetic,  Next: Paired-Single Built-in Functions,  Up: MIPS Loongson Built-in Functions
+
+6.54.9.1 Paired-Single Arithmetic
+.................................
+
+The table below lists the `v2sf' operations for which hardware support
+exists.  `a', `b' and `c' are `v2sf' values and `x' is an integral
+value.
+
+C code                               MIPS instruction
+`a + b'                              `add.ps'
+`a - b'                              `sub.ps'
+`-a'                                 `neg.ps'
+`a * b'                              `mul.ps'
+`a * b + c'                          `madd.ps'
+`a * b - c'                          `msub.ps'
+`-(a * b + c)'                       `nmadd.ps'
+`-(a * b - c)'                       `nmsub.ps'
+`x ? a : b'                          `movn.ps'/`movz.ps'
+
+ Note that the multiply-accumulate instructions can be disabled using
+the command-line option `-mno-fused-madd'.
+
+
+File: gcc.info,  Node: Paired-Single Built-in Functions,  Next: MIPS-3D Built-in Functions,  Prev: Paired-Single Arithmetic,  Up: MIPS Loongson Built-in Functions
+
+6.54.9.2 Paired-Single Built-in Functions
+.........................................
+
+The following paired-single functions map directly to a particular MIPS
+instruction.  Please refer to the architecture specification for
+details on what each instruction does.
+
+`v2sf __builtin_mips_pll_ps (v2sf, v2sf)'
+     Pair lower lower (`pll.ps').
+
+`v2sf __builtin_mips_pul_ps (v2sf, v2sf)'
+     Pair upper lower (`pul.ps').
+
+`v2sf __builtin_mips_plu_ps (v2sf, v2sf)'
+     Pair lower upper (`plu.ps').
+
+`v2sf __builtin_mips_puu_ps (v2sf, v2sf)'
+     Pair upper upper (`puu.ps').
+
+`v2sf __builtin_mips_cvt_ps_s (float, float)'
+     Convert pair to paired single (`cvt.ps.s').
+
+`float __builtin_mips_cvt_s_pl (v2sf)'
+     Convert pair lower to single (`cvt.s.pl').
+
+`float __builtin_mips_cvt_s_pu (v2sf)'
+     Convert pair upper to single (`cvt.s.pu').
+
+`v2sf __builtin_mips_abs_ps (v2sf)'
+     Absolute value (`abs.ps').
+
+`v2sf __builtin_mips_alnv_ps (v2sf, v2sf, int)'
+     Align variable (`alnv.ps').
+
+     _Note:_ The value of the third parameter must be 0 or 4 modulo 8,
+     otherwise the result will be unpredictable.  Please read the
+     instruction description for details.
+
+ The following multi-instruction functions are also available.  In each
+case, COND can be any of the 16 floating-point conditions: `f', `un',
+`eq', `ueq', `olt', `ult', `ole', `ule', `sf', `ngle', `seq', `ngl',
+`lt', `nge', `le' or `ngt'.
+
+`v2sf __builtin_mips_movt_c_COND_ps (v2sf A, v2sf B, v2sf C, v2sf D)'
+`v2sf __builtin_mips_movf_c_COND_ps (v2sf A, v2sf B, v2sf C, v2sf D)'
+     Conditional move based on floating point comparison (`c.COND.ps',
+     `movt.ps'/`movf.ps').
+
+     The `movt' functions return the value X computed by:
+
+          c.COND.ps CC,A,B
+          mov.ps X,C
+          movt.ps X,D,CC
+
+     The `movf' functions are similar but use `movf.ps' instead of
+     `movt.ps'.
+
+`int __builtin_mips_upper_c_COND_ps (v2sf A, v2sf B)'
+`int __builtin_mips_lower_c_COND_ps (v2sf A, v2sf B)'
+     Comparison of two paired-single values (`c.COND.ps',
+     `bc1t'/`bc1f').
+
+     These functions compare A and B using `c.COND.ps' and return
+     either the upper or lower half of the result.  For example:
+
+          v2sf a, b;
+          if (__builtin_mips_upper_c_eq_ps (a, b))
+            upper_halves_are_equal ();
+          else
+            upper_halves_are_unequal ();
+
+          if (__builtin_mips_lower_c_eq_ps (a, b))
+            lower_halves_are_equal ();
+          else
+            lower_halves_are_unequal ();
+
+
+File: gcc.info,  Node: MIPS-3D Built-in Functions,  Prev: Paired-Single Built-in Functions,  Up: MIPS Loongson Built-in Functions
+
+6.54.9.3 MIPS-3D Built-in Functions
+...................................
+
+The MIPS-3D Application-Specific Extension (ASE) includes additional
+paired-single instructions that are designed to improve the performance
+of 3D graphics operations.  Support for these instructions is controlled
+by the `-mips3d' command-line option.
+
+ The functions listed below map directly to a particular MIPS-3D
+instruction.  Please refer to the architecture specification for more
+details on what each instruction does.
+
+`v2sf __builtin_mips_addr_ps (v2sf, v2sf)'
+     Reduction add (`addr.ps').
+
+`v2sf __builtin_mips_mulr_ps (v2sf, v2sf)'
+     Reduction multiply (`mulr.ps').
+
+`v2sf __builtin_mips_cvt_pw_ps (v2sf)'
+     Convert paired single to paired word (`cvt.pw.ps').
+
+`v2sf __builtin_mips_cvt_ps_pw (v2sf)'
+     Convert paired word to paired single (`cvt.ps.pw').
+
+`float __builtin_mips_recip1_s (float)'
+`double __builtin_mips_recip1_d (double)'
+`v2sf __builtin_mips_recip1_ps (v2sf)'
+     Reduced precision reciprocal (sequence step 1) (`recip1.FMT').
+
+`float __builtin_mips_recip2_s (float, float)'
+`double __builtin_mips_recip2_d (double, double)'
+`v2sf __builtin_mips_recip2_ps (v2sf, v2sf)'
+     Reduced precision reciprocal (sequence step 2) (`recip2.FMT').
+
+`float __builtin_mips_rsqrt1_s (float)'
+`double __builtin_mips_rsqrt1_d (double)'
+`v2sf __builtin_mips_rsqrt1_ps (v2sf)'
+     Reduced precision reciprocal square root (sequence step 1)
+     (`rsqrt1.FMT').
+
+`float __builtin_mips_rsqrt2_s (float, float)'
+`double __builtin_mips_rsqrt2_d (double, double)'
+`v2sf __builtin_mips_rsqrt2_ps (v2sf, v2sf)'
+     Reduced precision reciprocal square root (sequence step 2)
+     (`rsqrt2.FMT').
+
+ The following multi-instruction functions are also available.  In each
+case, COND can be any of the 16 floating-point conditions: `f', `un',
+`eq', `ueq', `olt', `ult', `ole', `ule', `sf', `ngle', `seq', `ngl',
+`lt', `nge', `le' or `ngt'.
+
+`int __builtin_mips_cabs_COND_s (float A, float B)'
+`int __builtin_mips_cabs_COND_d (double A, double B)'
+     Absolute comparison of two scalar values (`cabs.COND.FMT',
+     `bc1t'/`bc1f').
+
+     These functions compare A and B using `cabs.COND.s' or
+     `cabs.COND.d' and return the result as a boolean value.  For
+     example:
+
+          float a, b;
+          if (__builtin_mips_cabs_eq_s (a, b))
+            true ();
+          else
+            false ();
+
+`int __builtin_mips_upper_cabs_COND_ps (v2sf A, v2sf B)'
+`int __builtin_mips_lower_cabs_COND_ps (v2sf A, v2sf B)'
+     Absolute comparison of two paired-single values (`cabs.COND.ps',
+     `bc1t'/`bc1f').
+
+     These functions compare A and B using `cabs.COND.ps' and return
+     either the upper or lower half of the result.  For example:
+
+          v2sf a, b;
+          if (__builtin_mips_upper_cabs_eq_ps (a, b))
+            upper_halves_are_equal ();
+          else
+            upper_halves_are_unequal ();
+
+          if (__builtin_mips_lower_cabs_eq_ps (a, b))
+            lower_halves_are_equal ();
+          else
+            lower_halves_are_unequal ();
+
+`v2sf __builtin_mips_movt_cabs_COND_ps (v2sf A, v2sf B, v2sf C, v2sf D)'
+`v2sf __builtin_mips_movf_cabs_COND_ps (v2sf A, v2sf B, v2sf C, v2sf D)'
+     Conditional move based on absolute comparison (`cabs.COND.ps',
+     `movt.ps'/`movf.ps').
+
+     The `movt' functions return the value X computed by:
+
+          cabs.COND.ps CC,A,B
+          mov.ps X,C
+          movt.ps X,D,CC
+
+     The `movf' functions are similar but use `movf.ps' instead of
+     `movt.ps'.
+
+`int __builtin_mips_any_c_COND_ps (v2sf A, v2sf B)'
+`int __builtin_mips_all_c_COND_ps (v2sf A, v2sf B)'
+`int __builtin_mips_any_cabs_COND_ps (v2sf A, v2sf B)'
+`int __builtin_mips_all_cabs_COND_ps (v2sf A, v2sf B)'
+     Comparison of two paired-single values (`c.COND.ps'/`cabs.COND.ps',
+     `bc1any2t'/`bc1any2f').
+
+     These functions compare A and B using `c.COND.ps' or
+     `cabs.COND.ps'.  The `any' forms return true if either result is
+     true and the `all' forms return true if both results are true.
+     For example:
+
+          v2sf a, b;
+          if (__builtin_mips_any_c_eq_ps (a, b))
+            one_is_true ();
+          else
+            both_are_false ();
+
+          if (__builtin_mips_all_c_eq_ps (a, b))
+            both_are_true ();
+          else
+            one_is_false ();
+
+`int __builtin_mips_any_c_COND_4s (v2sf A, v2sf B, v2sf C, v2sf D)'
+`int __builtin_mips_all_c_COND_4s (v2sf A, v2sf B, v2sf C, v2sf D)'
+`int __builtin_mips_any_cabs_COND_4s (v2sf A, v2sf B, v2sf C, v2sf D)'
+`int __builtin_mips_all_cabs_COND_4s (v2sf A, v2sf B, v2sf C, v2sf D)'
+     Comparison of four paired-single values
+     (`c.COND.ps'/`cabs.COND.ps', `bc1any4t'/`bc1any4f').
+
+     These functions use `c.COND.ps' or `cabs.COND.ps' to compare A
+     with B and to compare C with D.  The `any' forms return true if
+     any of the four results are true and the `all' forms return true
+     if all four results are true.  For example:
+
+          v2sf a, b, c, d;
+          if (__builtin_mips_any_c_eq_4s (a, b, c, d))
+            some_are_true ();
+          else
+            all_are_false ();
+
+          if (__builtin_mips_all_c_eq_4s (a, b, c, d))
+            all_are_true ();
+          else
+            some_are_false ();
+
+
+File: gcc.info,  Node: picoChip Built-in Functions,  Next: PowerPC AltiVec/VSX Built-in Functions,  Prev: Other MIPS Built-in Functions,  Up: Target Builtins
+
+6.54.10 picoChip Built-in Functions
+-----------------------------------
+
+GCC provides an interface to selected machine instructions from the
+picoChip instruction set.
+
+`int __builtin_sbc (int VALUE)'
+     Sign bit count.  Return the number of consecutive bits in VALUE
+     which have the same value as the sign-bit.  The result is the
+     number of leading sign bits minus one, giving the number of
+     redundant sign bits in VALUE.
+
+`int __builtin_byteswap (int VALUE)'
+     Byte swap.  Return the result of swapping the upper and lower
+     bytes of VALUE.
+
+`int __builtin_brev (int VALUE)'
+     Bit reversal.  Return the result of reversing the bits in VALUE.
+     Bit 15 is swapped with bit 0, bit 14 is swapped with bit 1, and so
+     on.
+
+`int __builtin_adds (int X, int Y)'
+     Saturating addition.  Return the result of adding X and Y, storing
+     the value 32767 if the result overflows.
+
+`int __builtin_subs (int X, int Y)'
+     Saturating subtraction.  Return the result of subtracting Y from
+     X, storing the value -32768 if the result overflows.
+
+`void __builtin_halt (void)'
+     Halt.  The processor will stop execution.  This built-in is useful
+     for implementing assertions.
+
+
+
+File: gcc.info,  Node: Other MIPS Built-in Functions,  Next: picoChip Built-in Functions,  Prev: MIPS Loongson Built-in Functions,  Up: Target Builtins
+
+6.54.11 Other MIPS Built-in Functions
+-------------------------------------
+
+GCC provides other MIPS-specific built-in functions:
+
+`void __builtin_mips_cache (int OP, const volatile void *ADDR)'
+     Insert a `cache' instruction with operands OP and ADDR.  GCC
+     defines the preprocessor macro `___GCC_HAVE_BUILTIN_MIPS_CACHE'
+     when this function is available.
+
+
+File: gcc.info,  Node: PowerPC AltiVec/VSX Built-in Functions,  Next: RX Built-in Functions,  Prev: picoChip Built-in Functions,  Up: Target Builtins
+
+6.54.12 PowerPC AltiVec Built-in Functions
+------------------------------------------
+
+GCC provides an interface for the PowerPC family of processors to access
+the AltiVec operations described in Motorola's AltiVec Programming
+Interface Manual.  The interface is made available by including
+`<altivec.h>' and using `-maltivec' and `-mabi=altivec'.  The interface
+supports the following vector types.
+
+     vector unsigned char
+     vector signed char
+     vector bool char
+
+     vector unsigned short
+     vector signed short
+     vector bool short
+     vector pixel
+
+     vector unsigned int
+     vector signed int
+     vector bool int
+     vector float
+
+ If `-mvsx' is used the following additional vector types are
+implemented.
+
+     vector unsigned long
+     vector signed long
+     vector double
+
+ The long types are only implemented for 64-bit code generation, and
+the long type is only used in the floating point/integer conversion
+instructions.
+
+ GCC's implementation of the high-level language interface available
+from C and C++ code differs from Motorola's documentation in several
+ways.
+
+   * A vector constant is a list of constant expressions within curly
+     braces.
+
+   * A vector initializer requires no cast if the vector constant is of
+     the same type as the variable it is initializing.
+
+   * If `signed' or `unsigned' is omitted, the signedness of the vector
+     type is the default signedness of the base type.  The default
+     varies depending on the operating system, so a portable program
+     should always specify the signedness.
+
+   * Compiling with `-maltivec' adds keywords `__vector', `vector',
+     `__pixel', `pixel', `__bool' and `bool'.  When compiling ISO C,
+     the context-sensitive substitution of the keywords `vector',
+     `pixel' and `bool' is disabled.  To use them, you must include
+     `<altivec.h>' instead.
+
+   * GCC allows using a `typedef' name as the type specifier for a
+     vector type.
+
+   * For C, overloaded functions are implemented with macros so the
+     following does not work:
+
+            vec_add ((vector signed int){1, 2, 3, 4}, foo);
+
+     Since `vec_add' is a macro, the vector constant in the example is
+     treated as four separate arguments.  Wrap the entire argument in
+     parentheses for this to work.
+
+ _Note:_ Only the `<altivec.h>' interface is supported.  Internally,
+GCC uses built-in functions to achieve the functionality in the
+aforementioned header file, but they are not supported and are subject
+to change without notice.
+
+ The following interfaces are supported for the generic and specific
+AltiVec operations and the AltiVec predicates.  In cases where there is
+a direct mapping between generic and specific operations, only the
+generic names are shown here, although the specific operations can also
+be used.
+
+ Arguments that are documented as `const int' require literal integral
+values within the range required for that operation.
+
+     vector signed char vec_abs (vector signed char);
+     vector signed short vec_abs (vector signed short);
+     vector signed int vec_abs (vector signed int);
+     vector float vec_abs (vector float);
+
+     vector signed char vec_abss (vector signed char);
+     vector signed short vec_abss (vector signed short);
+     vector signed int vec_abss (vector signed int);
+
+     vector signed char vec_add (vector bool char, vector signed char);
+     vector signed char vec_add (vector signed char, vector bool char);
+     vector signed char vec_add (vector signed char, vector signed char);
+     vector unsigned char vec_add (vector bool char, vector unsigned char);
+     vector unsigned char vec_add (vector unsigned char, vector bool char);
+     vector unsigned char vec_add (vector unsigned char,
+                                   vector unsigned char);
+     vector signed short vec_add (vector bool short, vector signed short);
+     vector signed short vec_add (vector signed short, vector bool short);
+     vector signed short vec_add (vector signed short, vector signed short);
+     vector unsigned short vec_add (vector bool short,
+                                    vector unsigned short);
+     vector unsigned short vec_add (vector unsigned short,
+                                    vector bool short);
+     vector unsigned short vec_add (vector unsigned short,
+                                    vector unsigned short);
+     vector signed int vec_add (vector bool int, vector signed int);
+     vector signed int vec_add (vector signed int, vector bool int);
+     vector signed int vec_add (vector signed int, vector signed int);
+     vector unsigned int vec_add (vector bool int, vector unsigned int);
+     vector unsigned int vec_add (vector unsigned int, vector bool int);
+     vector unsigned int vec_add (vector unsigned int, vector unsigned int);
+     vector float vec_add (vector float, vector float);
+
+     vector float vec_vaddfp (vector float, vector float);
+
+     vector signed int vec_vadduwm (vector bool int, vector signed int);
+     vector signed int vec_vadduwm (vector signed int, vector bool int);
+     vector signed int vec_vadduwm (vector signed int, vector signed int);
+     vector unsigned int vec_vadduwm (vector bool int, vector unsigned int);
+     vector unsigned int vec_vadduwm (vector unsigned int, vector bool int);
+     vector unsigned int vec_vadduwm (vector unsigned int,
+                                      vector unsigned int);
+
+     vector signed short vec_vadduhm (vector bool short,
+                                      vector signed short);
+     vector signed short vec_vadduhm (vector signed short,
+                                      vector bool short);
+     vector signed short vec_vadduhm (vector signed short,
+                                      vector signed short);
+     vector unsigned short vec_vadduhm (vector bool short,
+                                        vector unsigned short);
+     vector unsigned short vec_vadduhm (vector unsigned short,
+                                        vector bool short);
+     vector unsigned short vec_vadduhm (vector unsigned short,
+                                        vector unsigned short);
+
+     vector signed char vec_vaddubm (vector bool char, vector signed char);
+     vector signed char vec_vaddubm (vector signed char, vector bool char);
+     vector signed char vec_vaddubm (vector signed char, vector signed char);
+     vector unsigned char vec_vaddubm (vector bool char,
+                                       vector unsigned char);
+     vector unsigned char vec_vaddubm (vector unsigned char,
+                                       vector bool char);
+     vector unsigned char vec_vaddubm (vector unsigned char,
+                                       vector unsigned char);
+
+     vector unsigned int vec_addc (vector unsigned int, vector unsigned int);
+
+     vector unsigned char vec_adds (vector bool char, vector unsigned char);
+     vector unsigned char vec_adds (vector unsigned char, vector bool char);
+     vector unsigned char vec_adds (vector unsigned char,
+                                    vector unsigned char);
+     vector signed char vec_adds (vector bool char, vector signed char);
+     vector signed char vec_adds (vector signed char, vector bool char);
+     vector signed char vec_adds (vector signed char, vector signed char);
+     vector unsigned short vec_adds (vector bool short,
+                                     vector unsigned short);
+     vector unsigned short vec_adds (vector unsigned short,
+                                     vector bool short);
+     vector unsigned short vec_adds (vector unsigned short,
+                                     vector unsigned short);
+     vector signed short vec_adds (vector bool short, vector signed short);
+     vector signed short vec_adds (vector signed short, vector bool short);
+     vector signed short vec_adds (vector signed short, vector signed short);
+     vector unsigned int vec_adds (vector bool int, vector unsigned int);
+     vector unsigned int vec_adds (vector unsigned int, vector bool int);
+     vector unsigned int vec_adds (vector unsigned int, vector unsigned int);
+     vector signed int vec_adds (vector bool int, vector signed int);
+     vector signed int vec_adds (vector signed int, vector bool int);
+     vector signed int vec_adds (vector signed int, vector signed int);
+
+     vector signed int vec_vaddsws (vector bool int, vector signed int);
+     vector signed int vec_vaddsws (vector signed int, vector bool int);
+     vector signed int vec_vaddsws (vector signed int, vector signed int);
+
+     vector unsigned int vec_vadduws (vector bool int, vector unsigned int);
+     vector unsigned int vec_vadduws (vector unsigned int, vector bool int);
+     vector unsigned int vec_vadduws (vector unsigned int,
+                                      vector unsigned int);
+
+     vector signed short vec_vaddshs (vector bool short,
+                                      vector signed short);
+     vector signed short vec_vaddshs (vector signed short,
+                                      vector bool short);
+     vector signed short vec_vaddshs (vector signed short,
+                                      vector signed short);
+
+     vector unsigned short vec_vadduhs (vector bool short,
+                                        vector unsigned short);
+     vector unsigned short vec_vadduhs (vector unsigned short,
+                                        vector bool short);
+     vector unsigned short vec_vadduhs (vector unsigned short,
+                                        vector unsigned short);
+
+     vector signed char vec_vaddsbs (vector bool char, vector signed char);
+     vector signed char vec_vaddsbs (vector signed char, vector bool char);
+     vector signed char vec_vaddsbs (vector signed char, vector signed char);
+
+     vector unsigned char vec_vaddubs (vector bool char,
+                                       vector unsigned char);
+     vector unsigned char vec_vaddubs (vector unsigned char,
+                                       vector bool char);
+     vector unsigned char vec_vaddubs (vector unsigned char,
+                                       vector unsigned char);
+
+     vector float vec_and (vector float, vector float);
+     vector float vec_and (vector float, vector bool int);
+     vector float vec_and (vector bool int, vector float);
+     vector bool int vec_and (vector bool int, vector bool int);
+     vector signed int vec_and (vector bool int, vector signed int);
+     vector signed int vec_and (vector signed int, vector bool int);
+     vector signed int vec_and (vector signed int, vector signed int);
+     vector unsigned int vec_and (vector bool int, vector unsigned int);
+     vector unsigned int vec_and (vector unsigned int, vector bool int);
+     vector unsigned int vec_and (vector unsigned int, vector unsigned int);
+     vector bool short vec_and (vector bool short, vector bool short);
+     vector signed short vec_and (vector bool short, vector signed short);
+     vector signed short vec_and (vector signed short, vector bool short);
+     vector signed short vec_and (vector signed short, vector signed short);
+     vector unsigned short vec_and (vector bool short,
+                                    vector unsigned short);
+     vector unsigned short vec_and (vector unsigned short,
+                                    vector bool short);
+     vector unsigned short vec_and (vector unsigned short,
+                                    vector unsigned short);
+     vector signed char vec_and (vector bool char, vector signed char);
+     vector bool char vec_and (vector bool char, vector bool char);
+     vector signed char vec_and (vector signed char, vector bool char);
+     vector signed char vec_and (vector signed char, vector signed char);
+     vector unsigned char vec_and (vector bool char, vector unsigned char);
+     vector unsigned char vec_and (vector unsigned char, vector bool char);
+     vector unsigned char vec_and (vector unsigned char,
+                                   vector unsigned char);
+
+     vector float vec_andc (vector float, vector float);
+     vector float vec_andc (vector float, vector bool int);
+     vector float vec_andc (vector bool int, vector float);
+     vector bool int vec_andc (vector bool int, vector bool int);
+     vector signed int vec_andc (vector bool int, vector signed int);
+     vector signed int vec_andc (vector signed int, vector bool int);
+     vector signed int vec_andc (vector signed int, vector signed int);
+     vector unsigned int vec_andc (vector bool int, vector unsigned int);
+     vector unsigned int vec_andc (vector unsigned int, vector bool int);
+     vector unsigned int vec_andc (vector unsigned int, vector unsigned int);
+     vector bool short vec_andc (vector bool short, vector bool short);
+     vector signed short vec_andc (vector bool short, vector signed short);
+     vector signed short vec_andc (vector signed short, vector bool short);
+     vector signed short vec_andc (vector signed short, vector signed short);
+     vector unsigned short vec_andc (vector bool short,
+                                     vector unsigned short);
+     vector unsigned short vec_andc (vector unsigned short,
+                                     vector bool short);
+     vector unsigned short vec_andc (vector unsigned short,
+                                     vector unsigned short);
+     vector signed char vec_andc (vector bool char, vector signed char);
+     vector bool char vec_andc (vector bool char, vector bool char);
+     vector signed char vec_andc (vector signed char, vector bool char);
+     vector signed char vec_andc (vector signed char, vector signed char);
+     vector unsigned char vec_andc (vector bool char, vector unsigned char);
+     vector unsigned char vec_andc (vector unsigned char, vector bool char);
+     vector unsigned char vec_andc (vector unsigned char,
+                                    vector unsigned char);
+
+     vector unsigned char vec_avg (vector unsigned char,
+                                   vector unsigned char);
+     vector signed char vec_avg (vector signed char, vector signed char);
+     vector unsigned short vec_avg (vector unsigned short,
+                                    vector unsigned short);
+     vector signed short vec_avg (vector signed short, vector signed short);
+     vector unsigned int vec_avg (vector unsigned int, vector unsigned int);
+     vector signed int vec_avg (vector signed int, vector signed int);
+
+     vector signed int vec_vavgsw (vector signed int, vector signed int);
+
+     vector unsigned int vec_vavguw (vector unsigned int,
+                                     vector unsigned int);
+
+     vector signed short vec_vavgsh (vector signed short,
+                                     vector signed short);
+
+     vector unsigned short vec_vavguh (vector unsigned short,
+                                       vector unsigned short);
+
+     vector signed char vec_vavgsb (vector signed char, vector signed char);
+
+     vector unsigned char vec_vavgub (vector unsigned char,
+                                      vector unsigned char);
+
+     vector float vec_copysign (vector float);
+
+     vector float vec_ceil (vector float);
+
+     vector signed int vec_cmpb (vector float, vector float);
+
+     vector bool char vec_cmpeq (vector signed char, vector signed char);
+     vector bool char vec_cmpeq (vector unsigned char, vector unsigned char);
+     vector bool short vec_cmpeq (vector signed short, vector signed short);
+     vector bool short vec_cmpeq (vector unsigned short,
+                                  vector unsigned short);
+     vector bool int vec_cmpeq (vector signed int, vector signed int);
+     vector bool int vec_cmpeq (vector unsigned int, vector unsigned int);
+     vector bool int vec_cmpeq (vector float, vector float);
+
+     vector bool int vec_vcmpeqfp (vector float, vector float);
+
+     vector bool int vec_vcmpequw (vector signed int, vector signed int);
+     vector bool int vec_vcmpequw (vector unsigned int, vector unsigned int);
+
+     vector bool short vec_vcmpequh (vector signed short,
+                                     vector signed short);
+     vector bool short vec_vcmpequh (vector unsigned short,
+                                     vector unsigned short);
+
+     vector bool char vec_vcmpequb (vector signed char, vector signed char);
+     vector bool char vec_vcmpequb (vector unsigned char,
+                                    vector unsigned char);
+
+     vector bool int vec_cmpge (vector float, vector float);
+
+     vector bool char vec_cmpgt (vector unsigned char, vector unsigned char);
+     vector bool char vec_cmpgt (vector signed char, vector signed char);
+     vector bool short vec_cmpgt (vector unsigned short,
+                                  vector unsigned short);
+     vector bool short vec_cmpgt (vector signed short, vector signed short);
+     vector bool int vec_cmpgt (vector unsigned int, vector unsigned int);
+     vector bool int vec_cmpgt (vector signed int, vector signed int);
+     vector bool int vec_cmpgt (vector float, vector float);
+
+     vector bool int vec_vcmpgtfp (vector float, vector float);
+
+     vector bool int vec_vcmpgtsw (vector signed int, vector signed int);
+
+     vector bool int vec_vcmpgtuw (vector unsigned int, vector unsigned int);
+
+     vector bool short vec_vcmpgtsh (vector signed short,
+                                     vector signed short);
+
+     vector bool short vec_vcmpgtuh (vector unsigned short,
+                                     vector unsigned short);
+
+     vector bool char vec_vcmpgtsb (vector signed char, vector signed char);
+
+     vector bool char vec_vcmpgtub (vector unsigned char,
+                                    vector unsigned char);
+
+     vector bool int vec_cmple (vector float, vector float);
+
+     vector bool char vec_cmplt (vector unsigned char, vector unsigned char);
+     vector bool char vec_cmplt (vector signed char, vector signed char);
+     vector bool short vec_cmplt (vector unsigned short,
+                                  vector unsigned short);
+     vector bool short vec_cmplt (vector signed short, vector signed short);
+     vector bool int vec_cmplt (vector unsigned int, vector unsigned int);
+     vector bool int vec_cmplt (vector signed int, vector signed int);
+     vector bool int vec_cmplt (vector float, vector float);
+
+     vector float vec_ctf (vector unsigned int, const int);
+     vector float vec_ctf (vector signed int, const int);
+
+     vector float vec_vcfsx (vector signed int, const int);
+
+     vector float vec_vcfux (vector unsigned int, const int);
+
+     vector signed int vec_cts (vector float, const int);
+
+     vector unsigned int vec_ctu (vector float, const int);
+
+     void vec_dss (const int);
+
+     void vec_dssall (void);
+
+     void vec_dst (const vector unsigned char *, int, const int);
+     void vec_dst (const vector signed char *, int, const int);
+     void vec_dst (const vector bool char *, int, const int);
+     void vec_dst (const vector unsigned short *, int, const int);
+     void vec_dst (const vector signed short *, int, const int);
+     void vec_dst (const vector bool short *, int, const int);
+     void vec_dst (const vector pixel *, int, const int);
+     void vec_dst (const vector unsigned int *, int, const int);
+     void vec_dst (const vector signed int *, int, const int);
+     void vec_dst (const vector bool int *, int, const int);
+     void vec_dst (const vector float *, int, const int);
+     void vec_dst (const unsigned char *, int, const int);
+     void vec_dst (const signed char *, int, const int);
+     void vec_dst (const unsigned short *, int, const int);
+     void vec_dst (const short *, int, const int);
+     void vec_dst (const unsigned int *, int, const int);
+     void vec_dst (const int *, int, const int);
+     void vec_dst (const unsigned long *, int, const int);
+     void vec_dst (const long *, int, const int);
+     void vec_dst (const float *, int, const int);
+
+     void vec_dstst (const vector unsigned char *, int, const int);
+     void vec_dstst (const vector signed char *, int, const int);
+     void vec_dstst (const vector bool char *, int, const int);
+     void vec_dstst (const vector unsigned short *, int, const int);
+     void vec_dstst (const vector signed short *, int, const int);
+     void vec_dstst (const vector bool short *, int, const int);
+     void vec_dstst (const vector pixel *, int, const int);
+     void vec_dstst (const vector unsigned int *, int, const int);
+     void vec_dstst (const vector signed int *, int, const int);
+     void vec_dstst (const vector bool int *, int, const int);
+     void vec_dstst (const vector float *, int, const int);
+     void vec_dstst (const unsigned char *, int, const int);
+     void vec_dstst (const signed char *, int, const int);
+     void vec_dstst (const unsigned short *, int, const int);
+     void vec_dstst (const short *, int, const int);
+     void vec_dstst (const unsigned int *, int, const int);
+     void vec_dstst (const int *, int, const int);
+     void vec_dstst (const unsigned long *, int, const int);
+     void vec_dstst (const long *, int, const int);
+     void vec_dstst (const float *, int, const int);
+
+     void vec_dststt (const vector unsigned char *, int, const int);
+     void vec_dststt (const vector signed char *, int, const int);
+     void vec_dststt (const vector bool char *, int, const int);
+     void vec_dststt (const vector unsigned short *, int, const int);
+     void vec_dststt (const vector signed short *, int, const int);
+     void vec_dststt (const vector bool short *, int, const int);
+     void vec_dststt (const vector pixel *, int, const int);
+     void vec_dststt (const vector unsigned int *, int, const int);
+     void vec_dststt (const vector signed int *, int, const int);
+     void vec_dststt (const vector bool int *, int, const int);
+     void vec_dststt (const vector float *, int, const int);
+     void vec_dststt (const unsigned char *, int, const int);
+     void vec_dststt (const signed char *, int, const int);
+     void vec_dststt (const unsigned short *, int, const int);
+     void vec_dststt (const short *, int, const int);
+     void vec_dststt (const unsigned int *, int, const int);
+     void vec_dststt (const int *, int, const int);
+     void vec_dststt (const unsigned long *, int, const int);
+     void vec_dststt (const long *, int, const int);
+     void vec_dststt (const float *, int, const int);
+
+     void vec_dstt (const vector unsigned char *, int, const int);
+     void vec_dstt (const vector signed char *, int, const int);
+     void vec_dstt (const vector bool char *, int, const int);
+     void vec_dstt (const vector unsigned short *, int, const int);
+     void vec_dstt (const vector signed short *, int, const int);
+     void vec_dstt (const vector bool short *, int, const int);
+     void vec_dstt (const vector pixel *, int, const int);
+     void vec_dstt (const vector unsigned int *, int, const int);
+     void vec_dstt (const vector signed int *, int, const int);
+     void vec_dstt (const vector bool int *, int, const int);
+     void vec_dstt (const vector float *, int, const int);
+     void vec_dstt (const unsigned char *, int, const int);
+     void vec_dstt (const signed char *, int, const int);
+     void vec_dstt (const unsigned short *, int, const int);
+     void vec_dstt (const short *, int, const int);
+     void vec_dstt (const unsigned int *, int, const int);
+     void vec_dstt (const int *, int, const int);
+     void vec_dstt (const unsigned long *, int, const int);
+     void vec_dstt (const long *, int, const int);
+     void vec_dstt (const float *, int, const int);
+
+     vector float vec_expte (vector float);
+
+     vector float vec_floor (vector float);
+
+     vector float vec_ld (int, const vector float *);
+     vector float vec_ld (int, const float *);
+     vector bool int vec_ld (int, const vector bool int *);
+     vector signed int vec_ld (int, const vector signed int *);
+     vector signed int vec_ld (int, const int *);
+     vector signed int vec_ld (int, const long *);
+     vector unsigned int vec_ld (int, const vector unsigned int *);
+     vector unsigned int vec_ld (int, const unsigned int *);
+     vector unsigned int vec_ld (int, const unsigned long *);
+     vector bool short vec_ld (int, const vector bool short *);
+     vector pixel vec_ld (int, const vector pixel *);
+     vector signed short vec_ld (int, const vector signed short *);
+     vector signed short vec_ld (int, const short *);
+     vector unsigned short vec_ld (int, const vector unsigned short *);
+     vector unsigned short vec_ld (int, const unsigned short *);
+     vector bool char vec_ld (int, const vector bool char *);
+     vector signed char vec_ld (int, const vector signed char *);
+     vector signed char vec_ld (int, const signed char *);
+     vector unsigned char vec_ld (int, const vector unsigned char *);
+     vector unsigned char vec_ld (int, const unsigned char *);
+
+     vector signed char vec_lde (int, const signed char *);
+     vector unsigned char vec_lde (int, const unsigned char *);
+     vector signed short vec_lde (int, const short *);
+     vector unsigned short vec_lde (int, const unsigned short *);
+     vector float vec_lde (int, const float *);
+     vector signed int vec_lde (int, const int *);
+     vector unsigned int vec_lde (int, const unsigned int *);
+     vector signed int vec_lde (int, const long *);
+     vector unsigned int vec_lde (int, const unsigned long *);
+
+     vector float vec_lvewx (int, float *);
+     vector signed int vec_lvewx (int, int *);
+     vector unsigned int vec_lvewx (int, unsigned int *);
+     vector signed int vec_lvewx (int, long *);
+     vector unsigned int vec_lvewx (int, unsigned long *);
+
+     vector signed short vec_lvehx (int, short *);
+     vector unsigned short vec_lvehx (int, unsigned short *);
+
+     vector signed char vec_lvebx (int, char *);
+     vector unsigned char vec_lvebx (int, unsigned char *);
+
+     vector float vec_ldl (int, const vector float *);
+     vector float vec_ldl (int, const float *);
+     vector bool int vec_ldl (int, const vector bool int *);
+     vector signed int vec_ldl (int, const vector signed int *);
+     vector signed int vec_ldl (int, const int *);
+     vector signed int vec_ldl (int, const long *);
+     vector unsigned int vec_ldl (int, const vector unsigned int *);
+     vector unsigned int vec_ldl (int, const unsigned int *);
+     vector unsigned int vec_ldl (int, const unsigned long *);
+     vector bool short vec_ldl (int, const vector bool short *);
+     vector pixel vec_ldl (int, const vector pixel *);
+     vector signed short vec_ldl (int, const vector signed short *);
+     vector signed short vec_ldl (int, const short *);
+     vector unsigned short vec_ldl (int, const vector unsigned short *);
+     vector unsigned short vec_ldl (int, const unsigned short *);
+     vector bool char vec_ldl (int, const vector bool char *);
+     vector signed char vec_ldl (int, const vector signed char *);
+     vector signed char vec_ldl (int, const signed char *);
+     vector unsigned char vec_ldl (int, const vector unsigned char *);
+     vector unsigned char vec_ldl (int, const unsigned char *);
+
+     vector float vec_loge (vector float);
+
+     vector unsigned char vec_lvsl (int, const volatile unsigned char *);
+     vector unsigned char vec_lvsl (int, const volatile signed char *);
+     vector unsigned char vec_lvsl (int, const volatile unsigned short *);
+     vector unsigned char vec_lvsl (int, const volatile short *);
+     vector unsigned char vec_lvsl (int, const volatile unsigned int *);
+     vector unsigned char vec_lvsl (int, const volatile int *);
+     vector unsigned char vec_lvsl (int, const volatile unsigned long *);
+     vector unsigned char vec_lvsl (int, const volatile long *);
+     vector unsigned char vec_lvsl (int, const volatile float *);
+
+     vector unsigned char vec_lvsr (int, const volatile unsigned char *);
+     vector unsigned char vec_lvsr (int, const volatile signed char *);
+     vector unsigned char vec_lvsr (int, const volatile unsigned short *);
+     vector unsigned char vec_lvsr (int, const volatile short *);
+     vector unsigned char vec_lvsr (int, const volatile unsigned int *);
+     vector unsigned char vec_lvsr (int, const volatile int *);
+     vector unsigned char vec_lvsr (int, const volatile unsigned long *);
+     vector unsigned char vec_lvsr (int, const volatile long *);
+     vector unsigned char vec_lvsr (int, const volatile float *);
+
+     vector float vec_madd (vector float, vector float, vector float);
+
+     vector signed short vec_madds (vector signed short,
+                                    vector signed short,
+                                    vector signed short);
+
+     vector unsigned char vec_max (vector bool char, vector unsigned char);
+     vector unsigned char vec_max (vector unsigned char, vector bool char);
+     vector unsigned char vec_max (vector unsigned char,
+                                   vector unsigned char);
+     vector signed char vec_max (vector bool char, vector signed char);
+     vector signed char vec_max (vector signed char, vector bool char);
+     vector signed char vec_max (vector signed char, vector signed char);
+     vector unsigned short vec_max (vector bool short,
+                                    vector unsigned short);
+     vector unsigned short vec_max (vector unsigned short,
+                                    vector bool short);
+     vector unsigned short vec_max (vector unsigned short,
+                                    vector unsigned short);
+     vector signed short vec_max (vector bool short, vector signed short);
+     vector signed short vec_max (vector signed short, vector bool short);
+     vector signed short vec_max (vector signed short, vector signed short);
+     vector unsigned int vec_max (vector bool int, vector unsigned int);
+     vector unsigned int vec_max (vector unsigned int, vector bool int);
+     vector unsigned int vec_max (vector unsigned int, vector unsigned int);
+     vector signed int vec_max (vector bool int, vector signed int);
+     vector signed int vec_max (vector signed int, vector bool int);
+     vector signed int vec_max (vector signed int, vector signed int);
+     vector float vec_max (vector float, vector float);
+
+     vector float vec_vmaxfp (vector float, vector float);
+
+     vector signed int vec_vmaxsw (vector bool int, vector signed int);
+     vector signed int vec_vmaxsw (vector signed int, vector bool int);
+     vector signed int vec_vmaxsw (vector signed int, vector signed int);
+
+     vector unsigned int vec_vmaxuw (vector bool int, vector unsigned int);
+     vector unsigned int vec_vmaxuw (vector unsigned int, vector bool int);
+     vector unsigned int vec_vmaxuw (vector unsigned int,
+                                     vector unsigned int);
+
+     vector signed short vec_vmaxsh (vector bool short, vector signed short);
+     vector signed short vec_vmaxsh (vector signed short, vector bool short);
+     vector signed short vec_vmaxsh (vector signed short,
+                                     vector signed short);
+
+     vector unsigned short vec_vmaxuh (vector bool short,
+                                       vector unsigned short);
+     vector unsigned short vec_vmaxuh (vector unsigned short,
+                                       vector bool short);
+     vector unsigned short vec_vmaxuh (vector unsigned short,
+                                       vector unsigned short);
+
+     vector signed char vec_vmaxsb (vector bool char, vector signed char);
+     vector signed char vec_vmaxsb (vector signed char, vector bool char);
+     vector signed char vec_vmaxsb (vector signed char, vector signed char);
+
+     vector unsigned char vec_vmaxub (vector bool char,
+                                      vector unsigned char);
+     vector unsigned char vec_vmaxub (vector unsigned char,
+                                      vector bool char);
+     vector unsigned char vec_vmaxub (vector unsigned char,
+                                      vector unsigned char);
+
+     vector bool char vec_mergeh (vector bool char, vector bool char);
+     vector signed char vec_mergeh (vector signed char, vector signed char);
+     vector unsigned char vec_mergeh (vector unsigned char,
+                                      vector unsigned char);
+     vector bool short vec_mergeh (vector bool short, vector bool short);
+     vector pixel vec_mergeh (vector pixel, vector pixel);
+     vector signed short vec_mergeh (vector signed short,
+                                     vector signed short);
+     vector unsigned short vec_mergeh (vector unsigned short,
+                                       vector unsigned short);
+     vector float vec_mergeh (vector float, vector float);
+     vector bool int vec_mergeh (vector bool int, vector bool int);
+     vector signed int vec_mergeh (vector signed int, vector signed int);
+     vector unsigned int vec_mergeh (vector unsigned int,
+                                     vector unsigned int);
+
+     vector float vec_vmrghw (vector float, vector float);
+     vector bool int vec_vmrghw (vector bool int, vector bool int);
+     vector signed int vec_vmrghw (vector signed int, vector signed int);
+     vector unsigned int vec_vmrghw (vector unsigned int,
+                                     vector unsigned int);
+
+     vector bool short vec_vmrghh (vector bool short, vector bool short);
+     vector signed short vec_vmrghh (vector signed short,
+                                     vector signed short);
+     vector unsigned short vec_vmrghh (vector unsigned short,
+                                       vector unsigned short);
+     vector pixel vec_vmrghh (vector pixel, vector pixel);
+
+     vector bool char vec_vmrghb (vector bool char, vector bool char);
+     vector signed char vec_vmrghb (vector signed char, vector signed char);
+     vector unsigned char vec_vmrghb (vector unsigned char,
+                                      vector unsigned char);
+
+     vector bool char vec_mergel (vector bool char, vector bool char);
+     vector signed char vec_mergel (vector signed char, vector signed char);
+     vector unsigned char vec_mergel (vector unsigned char,
+                                      vector unsigned char);
+     vector bool short vec_mergel (vector bool short, vector bool short);
+     vector pixel vec_mergel (vector pixel, vector pixel);
+     vector signed short vec_mergel (vector signed short,
+                                     vector signed short);
+     vector unsigned short vec_mergel (vector unsigned short,
+                                       vector unsigned short);
+     vector float vec_mergel (vector float, vector float);
+     vector bool int vec_mergel (vector bool int, vector bool int);
+     vector signed int vec_mergel (vector signed int, vector signed int);
+     vector unsigned int vec_mergel (vector unsigned int,
+                                     vector unsigned int);
+
+     vector float vec_vmrglw (vector float, vector float);
+     vector signed int vec_vmrglw (vector signed int, vector signed int);
+     vector unsigned int vec_vmrglw (vector unsigned int,
+                                     vector unsigned int);
+     vector bool int vec_vmrglw (vector bool int, vector bool int);
+
+     vector bool short vec_vmrglh (vector bool short, vector bool short);
+     vector signed short vec_vmrglh (vector signed short,
+                                     vector signed short);
+     vector unsigned short vec_vmrglh (vector unsigned short,
+                                       vector unsigned short);
+     vector pixel vec_vmrglh (vector pixel, vector pixel);
+
+     vector bool char vec_vmrglb (vector bool char, vector bool char);
+     vector signed char vec_vmrglb (vector signed char, vector signed char);
+     vector unsigned char vec_vmrglb (vector unsigned char,
+                                      vector unsigned char);
+
+     vector unsigned short vec_mfvscr (void);
+
+     vector unsigned char vec_min (vector bool char, vector unsigned char);
+     vector unsigned char vec_min (vector unsigned char, vector bool char);
+     vector unsigned char vec_min (vector unsigned char,
+                                   vector unsigned char);
+     vector signed char vec_min (vector bool char, vector signed char);
+     vector signed char vec_min (vector signed char, vector bool char);
+     vector signed char vec_min (vector signed char, vector signed char);
+     vector unsigned short vec_min (vector bool short,
+                                    vector unsigned short);
+     vector unsigned short vec_min (vector unsigned short,
+                                    vector bool short);
+     vector unsigned short vec_min (vector unsigned short,
+                                    vector unsigned short);
+     vector signed short vec_min (vector bool short, vector signed short);
+     vector signed short vec_min (vector signed short, vector bool short);
+     vector signed short vec_min (vector signed short, vector signed short);
+     vector unsigned int vec_min (vector bool int, vector unsigned int);
+     vector unsigned int vec_min (vector unsigned int, vector bool int);
+     vector unsigned int vec_min (vector unsigned int, vector unsigned int);
+     vector signed int vec_min (vector bool int, vector signed int);
+     vector signed int vec_min (vector signed int, vector bool int);
+     vector signed int vec_min (vector signed int, vector signed int);
+     vector float vec_min (vector float, vector float);
+
+     vector float vec_vminfp (vector float, vector float);
+
+     vector signed int vec_vminsw (vector bool int, vector signed int);
+     vector signed int vec_vminsw (vector signed int, vector bool int);
+     vector signed int vec_vminsw (vector signed int, vector signed int);
+
+     vector unsigned int vec_vminuw (vector bool int, vector unsigned int);
+     vector unsigned int vec_vminuw (vector unsigned int, vector bool int);
+     vector unsigned int vec_vminuw (vector unsigned int,
+                                     vector unsigned int);
+
+     vector signed short vec_vminsh (vector bool short, vector signed short);
+     vector signed short vec_vminsh (vector signed short, vector bool short);
+     vector signed short vec_vminsh (vector signed short,
+                                     vector signed short);
+
+     vector unsigned short vec_vminuh (vector bool short,
+                                       vector unsigned short);
+     vector unsigned short vec_vminuh (vector unsigned short,
+                                       vector bool short);
+     vector unsigned short vec_vminuh (vector unsigned short,
+                                       vector unsigned short);
+
+     vector signed char vec_vminsb (vector bool char, vector signed char);
+     vector signed char vec_vminsb (vector signed char, vector bool char);
+     vector signed char vec_vminsb (vector signed char, vector signed char);
+
+     vector unsigned char vec_vminub (vector bool char,
+                                      vector unsigned char);
+     vector unsigned char vec_vminub (vector unsigned char,
+                                      vector bool char);
+     vector unsigned char vec_vminub (vector unsigned char,
+                                      vector unsigned char);
+
+     vector signed short vec_mladd (vector signed short,
+                                    vector signed short,
+                                    vector signed short);
+     vector signed short vec_mladd (vector signed short,
+                                    vector unsigned short,
+                                    vector unsigned short);
+     vector signed short vec_mladd (vector unsigned short,
+                                    vector signed short,
+                                    vector signed short);
+     vector unsigned short vec_mladd (vector unsigned short,
+                                      vector unsigned short,
+                                      vector unsigned short);
+
+     vector signed short vec_mradds (vector signed short,
+                                     vector signed short,
+                                     vector signed short);
+
+     vector unsigned int vec_msum (vector unsigned char,
+                                   vector unsigned char,
+                                   vector unsigned int);
+     vector signed int vec_msum (vector signed char,
+                                 vector unsigned char,
+                                 vector signed int);
+     vector unsigned int vec_msum (vector unsigned short,
+                                   vector unsigned short,
+                                   vector unsigned int);
+     vector signed int vec_msum (vector signed short,
+                                 vector signed short,
+                                 vector signed int);
+
+     vector signed int vec_vmsumshm (vector signed short,
+                                     vector signed short,
+                                     vector signed int);
+
+     vector unsigned int vec_vmsumuhm (vector unsigned short,
+                                       vector unsigned short,
+                                       vector unsigned int);
+
+     vector signed int vec_vmsummbm (vector signed char,
+                                     vector unsigned char,
+                                     vector signed int);
+
+     vector unsigned int vec_vmsumubm (vector unsigned char,
+                                       vector unsigned char,
+                                       vector unsigned int);
+
+     vector unsigned int vec_msums (vector unsigned short,
+                                    vector unsigned short,
+                                    vector unsigned int);
+     vector signed int vec_msums (vector signed short,
+                                  vector signed short,
+                                  vector signed int);
+
+     vector signed int vec_vmsumshs (vector signed short,
+                                     vector signed short,
+                                     vector signed int);
+
+     vector unsigned int vec_vmsumuhs (vector unsigned short,
+                                       vector unsigned short,
+                                       vector unsigned int);
+
+     void vec_mtvscr (vector signed int);
+     void vec_mtvscr (vector unsigned int);
+     void vec_mtvscr (vector bool int);
+     void vec_mtvscr (vector signed short);
+     void vec_mtvscr (vector unsigned short);
+     void vec_mtvscr (vector bool short);
+     void vec_mtvscr (vector pixel);
+     void vec_mtvscr (vector signed char);
+     void vec_mtvscr (vector unsigned char);
+     void vec_mtvscr (vector bool char);
+
+     vector unsigned short vec_mule (vector unsigned char,
+                                     vector unsigned char);
+     vector signed short vec_mule (vector signed char,
+                                   vector signed char);
+     vector unsigned int vec_mule (vector unsigned short,
+                                   vector unsigned short);
+     vector signed int vec_mule (vector signed short, vector signed short);
+
+     vector signed int vec_vmulesh (vector signed short,
+                                    vector signed short);
+
+     vector unsigned int vec_vmuleuh (vector unsigned short,
+                                      vector unsigned short);
+
+     vector signed short vec_vmulesb (vector signed char,
+                                      vector signed char);
+
+     vector unsigned short vec_vmuleub (vector unsigned char,
+                                       vector unsigned char);
+
+     vector unsigned short vec_mulo (vector unsigned char,
+                                     vector unsigned char);
+     vector signed short vec_mulo (vector signed char, vector signed char);
+     vector unsigned int vec_mulo (vector unsigned short,
+                                   vector unsigned short);
+     vector signed int vec_mulo (vector signed short, vector signed short);
+
+     vector signed int vec_vmulosh (vector signed short,
+                                    vector signed short);
+
+     vector unsigned int vec_vmulouh (vector unsigned short,
+                                      vector unsigned short);
+
+     vector signed short vec_vmulosb (vector signed char,
+                                      vector signed char);
+
+     vector unsigned short vec_vmuloub (vector unsigned char,
+                                        vector unsigned char);
+
+     vector float vec_nmsub (vector float, vector float, vector float);
+
+     vector float vec_nor (vector float, vector float);
+     vector signed int vec_nor (vector signed int, vector signed int);
+     vector unsigned int vec_nor (vector unsigned int, vector unsigned int);
+     vector bool int vec_nor (vector bool int, vector bool int);
+     vector signed short vec_nor (vector signed short, vector signed short);
+     vector unsigned short vec_nor (vector unsigned short,
+                                    vector unsigned short);
+     vector bool short vec_nor (vector bool short, vector bool short);
+     vector signed char vec_nor (vector signed char, vector signed char);
+     vector unsigned char vec_nor (vector unsigned char,
+                                   vector unsigned char);
+     vector bool char vec_nor (vector bool char, vector bool char);
+
+     vector float vec_or (vector float, vector float);
+     vector float vec_or (vector float, vector bool int);
+     vector float vec_or (vector bool int, vector float);
+     vector bool int vec_or (vector bool int, vector bool int);
+     vector signed int vec_or (vector bool int, vector signed int);
+     vector signed int vec_or (vector signed int, vector bool int);
+     vector signed int vec_or (vector signed int, vector signed int);
+     vector unsigned int vec_or (vector bool int, vector unsigned int);
+     vector unsigned int vec_or (vector unsigned int, vector bool int);
+     vector unsigned int vec_or (vector unsigned int, vector unsigned int);
+     vector bool short vec_or (vector bool short, vector bool short);
+     vector signed short vec_or (vector bool short, vector signed short);
+     vector signed short vec_or (vector signed short, vector bool short);
+     vector signed short vec_or (vector signed short, vector signed short);
+     vector unsigned short vec_or (vector bool short, vector unsigned short);
+     vector unsigned short vec_or (vector unsigned short, vector bool short);
+     vector unsigned short vec_or (vector unsigned short,
+                                   vector unsigned short);
+     vector signed char vec_or (vector bool char, vector signed char);
+     vector bool char vec_or (vector bool char, vector bool char);
+     vector signed char vec_or (vector signed char, vector bool char);
+     vector signed char vec_or (vector signed char, vector signed char);
+     vector unsigned char vec_or (vector bool char, vector unsigned char);
+     vector unsigned char vec_or (vector unsigned char, vector bool char);
+     vector unsigned char vec_or (vector unsigned char,
+                                  vector unsigned char);
+
+     vector signed char vec_pack (vector signed short, vector signed short);
+     vector unsigned char vec_pack (vector unsigned short,
+                                    vector unsigned short);
+     vector bool char vec_pack (vector bool short, vector bool short);
+     vector signed short vec_pack (vector signed int, vector signed int);
+     vector unsigned short vec_pack (vector unsigned int,
+                                     vector unsigned int);
+     vector bool short vec_pack (vector bool int, vector bool int);
+
+     vector bool short vec_vpkuwum (vector bool int, vector bool int);
+     vector signed short vec_vpkuwum (vector signed int, vector signed int);
+     vector unsigned short vec_vpkuwum (vector unsigned int,
+                                        vector unsigned int);
+
+     vector bool char vec_vpkuhum (vector bool short, vector bool short);
+     vector signed char vec_vpkuhum (vector signed short,
+                                     vector signed short);
+     vector unsigned char vec_vpkuhum (vector unsigned short,
+                                       vector unsigned short);
+
+     vector pixel vec_packpx (vector unsigned int, vector unsigned int);
+
+     vector unsigned char vec_packs (vector unsigned short,
+                                     vector unsigned short);
+     vector signed char vec_packs (vector signed short, vector signed short);
+     vector unsigned short vec_packs (vector unsigned int,
+                                      vector unsigned int);
+     vector signed short vec_packs (vector signed int, vector signed int);
+
+     vector signed short vec_vpkswss (vector signed int, vector signed int);
+
+     vector unsigned short vec_vpkuwus (vector unsigned int,
+                                        vector unsigned int);
+
+     vector signed char vec_vpkshss (vector signed short,
+                                     vector signed short);
+
+     vector unsigned char vec_vpkuhus (vector unsigned short,
+                                       vector unsigned short);
+
+     vector unsigned char vec_packsu (vector unsigned short,
+                                      vector unsigned short);
+     vector unsigned char vec_packsu (vector signed short,
+                                      vector signed short);
+     vector unsigned short vec_packsu (vector unsigned int,
+                                       vector unsigned int);
+     vector unsigned short vec_packsu (vector signed int, vector signed int);
+
+     vector unsigned short vec_vpkswus (vector signed int,
+                                        vector signed int);
+
+     vector unsigned char vec_vpkshus (vector signed short,
+                                       vector signed short);
+
+     vector float vec_perm (vector float,
+                            vector float,
+                            vector unsigned char);
+     vector signed int vec_perm (vector signed int,
+                                 vector signed int,
+                                 vector unsigned char);
+     vector unsigned int vec_perm (vector unsigned int,
+                                   vector unsigned int,
+                                   vector unsigned char);
+     vector bool int vec_perm (vector bool int,
+                               vector bool int,
+                               vector unsigned char);
+     vector signed short vec_perm (vector signed short,
+                                   vector signed short,
+                                   vector unsigned char);
+     vector unsigned short vec_perm (vector unsigned short,
+                                     vector unsigned short,
+                                     vector unsigned char);
+     vector bool short vec_perm (vector bool short,
+                                 vector bool short,
+                                 vector unsigned char);
+     vector pixel vec_perm (vector pixel,
+                            vector pixel,
+                            vector unsigned char);
+     vector signed char vec_perm (vector signed char,
+                                  vector signed char,
+                                  vector unsigned char);
+     vector unsigned char vec_perm (vector unsigned char,
+                                    vector unsigned char,
+                                    vector unsigned char);
+     vector bool char vec_perm (vector bool char,
+                                vector bool char,
+                                vector unsigned char);
+
+     vector float vec_re (vector float);
+
+     vector signed char vec_rl (vector signed char,
+                                vector unsigned char);
+     vector unsigned char vec_rl (vector unsigned char,
+                                  vector unsigned char);
+     vector signed short vec_rl (vector signed short, vector unsigned short);
+     vector unsigned short vec_rl (vector unsigned short,
+                                   vector unsigned short);
+     vector signed int vec_rl (vector signed int, vector unsigned int);
+     vector unsigned int vec_rl (vector unsigned int, vector unsigned int);
+
+     vector signed int vec_vrlw (vector signed int, vector unsigned int);
+     vector unsigned int vec_vrlw (vector unsigned int, vector unsigned int);
+
+     vector signed short vec_vrlh (vector signed short,
+                                   vector unsigned short);
+     vector unsigned short vec_vrlh (vector unsigned short,
+                                     vector unsigned short);
+
+     vector signed char vec_vrlb (vector signed char, vector unsigned char);
+     vector unsigned char vec_vrlb (vector unsigned char,
+                                    vector unsigned char);
+
+     vector float vec_round (vector float);
+
+     vector float vec_recip (vector float, vector float);
+
+     vector float vec_rsqrt (vector float);
+
+     vector float vec_rsqrte (vector float);
+
+     vector float vec_sel (vector float, vector float, vector bool int);
+     vector float vec_sel (vector float, vector float, vector unsigned int);
+     vector signed int vec_sel (vector signed int,
+                                vector signed int,
+                                vector bool int);
+     vector signed int vec_sel (vector signed int,
+                                vector signed int,
+                                vector unsigned int);
+     vector unsigned int vec_sel (vector unsigned int,
+                                  vector unsigned int,
+                                  vector bool int);
+     vector unsigned int vec_sel (vector unsigned int,
+                                  vector unsigned int,
+                                  vector unsigned int);
+     vector bool int vec_sel (vector bool int,
+                              vector bool int,
+                              vector bool int);
+     vector bool int vec_sel (vector bool int,
+                              vector bool int,
+                              vector unsigned int);
+     vector signed short vec_sel (vector signed short,
+                                  vector signed short,
+                                  vector bool short);
+     vector signed short vec_sel (vector signed short,
+                                  vector signed short,
+                                  vector unsigned short);
+     vector unsigned short vec_sel (vector unsigned short,
+                                    vector unsigned short,
+                                    vector bool short);
+     vector unsigned short vec_sel (vector unsigned short,
+                                    vector unsigned short,
+                                    vector unsigned short);
+     vector bool short vec_sel (vector bool short,
+                                vector bool short,
+                                vector bool short);
+     vector bool short vec_sel (vector bool short,
+                                vector bool short,
+                                vector unsigned short);
+     vector signed char vec_sel (vector signed char,
+                                 vector signed char,
+                                 vector bool char);
+     vector signed char vec_sel (vector signed char,
+                                 vector signed char,
+                                 vector unsigned char);
+     vector unsigned char vec_sel (vector unsigned char,
+                                   vector unsigned char,
+                                   vector bool char);
+     vector unsigned char vec_sel (vector unsigned char,
+                                   vector unsigned char,
+                                   vector unsigned char);
+     vector bool char vec_sel (vector bool char,
+                               vector bool char,
+                               vector bool char);
+     vector bool char vec_sel (vector bool char,
+                               vector bool char,
+                               vector unsigned char);
+
+     vector signed char vec_sl (vector signed char,
+                                vector unsigned char);
+     vector unsigned char vec_sl (vector unsigned char,
+                                  vector unsigned char);
+     vector signed short vec_sl (vector signed short, vector unsigned short);
+     vector unsigned short vec_sl (vector unsigned short,
+                                   vector unsigned short);
+     vector signed int vec_sl (vector signed int, vector unsigned int);
+     vector unsigned int vec_sl (vector unsigned int, vector unsigned int);
+
+     vector signed int vec_vslw (vector signed int, vector unsigned int);
+     vector unsigned int vec_vslw (vector unsigned int, vector unsigned int);
+
+     vector signed short vec_vslh (vector signed short,
+                                   vector unsigned short);
+     vector unsigned short vec_vslh (vector unsigned short,
+                                     vector unsigned short);
+
+     vector signed char vec_vslb (vector signed char, vector unsigned char);
+     vector unsigned char vec_vslb (vector unsigned char,
+                                    vector unsigned char);
+
+     vector float vec_sld (vector float, vector float, const int);
+     vector signed int vec_sld (vector signed int,
+                                vector signed int,
+                                const int);
+     vector unsigned int vec_sld (vector unsigned int,
+                                  vector unsigned int,
+                                  const int);
+     vector bool int vec_sld (vector bool int,
+                              vector bool int,
+                              const int);
+     vector signed short vec_sld (vector signed short,
+                                  vector signed short,
+                                  const int);
+     vector unsigned short vec_sld (vector unsigned short,
+                                    vector unsigned short,
+                                    const int);
+     vector bool short vec_sld (vector bool short,
+                                vector bool short,
+                                const int);
+     vector pixel vec_sld (vector pixel,
+                           vector pixel,
+                           const int);
+     vector signed char vec_sld (vector signed char,
+                                 vector signed char,
+                                 const int);
+     vector unsigned char vec_sld (vector unsigned char,
+                                   vector unsigned char,
+                                   const int);
+     vector bool char vec_sld (vector bool char,
+                               vector bool char,
+                               const int);
+
+     vector signed int vec_sll (vector signed int,
+                                vector unsigned int);
+     vector signed int vec_sll (vector signed int,
+                                vector unsigned short);
+     vector signed int vec_sll (vector signed int,
+                                vector unsigned char);
+     vector unsigned int vec_sll (vector unsigned int,
+                                  vector unsigned int);
+     vector unsigned int vec_sll (vector unsigned int,
+                                  vector unsigned short);
+     vector unsigned int vec_sll (vector unsigned int,
+                                  vector unsigned char);
+     vector bool int vec_sll (vector bool int,
+                              vector unsigned int);
+     vector bool int vec_sll (vector bool int,
+                              vector unsigned short);
+     vector bool int vec_sll (vector bool int,
+                              vector unsigned char);
+     vector signed short vec_sll (vector signed short,
+                                  vector unsigned int);
+     vector signed short vec_sll (vector signed short,
+                                  vector unsigned short);
+     vector signed short vec_sll (vector signed short,
+                                  vector unsigned char);
+     vector unsigned short vec_sll (vector unsigned short,
+                                    vector unsigned int);
+     vector unsigned short vec_sll (vector unsigned short,
+                                    vector unsigned short);
+     vector unsigned short vec_sll (vector unsigned short,
+                                    vector unsigned char);
+     vector bool short vec_sll (vector bool short, vector unsigned int);
+     vector bool short vec_sll (vector bool short, vector unsigned short);
+     vector bool short vec_sll (vector bool short, vector unsigned char);
+     vector pixel vec_sll (vector pixel, vector unsigned int);
+     vector pixel vec_sll (vector pixel, vector unsigned short);
+     vector pixel vec_sll (vector pixel, vector unsigned char);
+     vector signed char vec_sll (vector signed char, vector unsigned int);
+     vector signed char vec_sll (vector signed char, vector unsigned short);
+     vector signed char vec_sll (vector signed char, vector unsigned char);
+     vector unsigned char vec_sll (vector unsigned char,
+                                   vector unsigned int);
+     vector unsigned char vec_sll (vector unsigned char,
+                                   vector unsigned short);
+     vector unsigned char vec_sll (vector unsigned char,
+                                   vector unsigned char);
+     vector bool char vec_sll (vector bool char, vector unsigned int);
+     vector bool char vec_sll (vector bool char, vector unsigned short);
+     vector bool char vec_sll (vector bool char, vector unsigned char);
+
+     vector float vec_slo (vector float, vector signed char);
+     vector float vec_slo (vector float, vector unsigned char);
+     vector signed int vec_slo (vector signed int, vector signed char);
+     vector signed int vec_slo (vector signed int, vector unsigned char);
+     vector unsigned int vec_slo (vector unsigned int, vector signed char);
+     vector unsigned int vec_slo (vector unsigned int, vector unsigned char);
+     vector signed short vec_slo (vector signed short, vector signed char);
+     vector signed short vec_slo (vector signed short, vector unsigned char);
+     vector unsigned short vec_slo (vector unsigned short,
+                                    vector signed char);
+     vector unsigned short vec_slo (vector unsigned short,
+                                    vector unsigned char);
+     vector pixel vec_slo (vector pixel, vector signed char);
+     vector pixel vec_slo (vector pixel, vector unsigned char);
+     vector signed char vec_slo (vector signed char, vector signed char);
+     vector signed char vec_slo (vector signed char, vector unsigned char);
+     vector unsigned char vec_slo (vector unsigned char, vector signed char);
+     vector unsigned char vec_slo (vector unsigned char,
+                                   vector unsigned char);
+
+     vector signed char vec_splat (vector signed char, const int);
+     vector unsigned char vec_splat (vector unsigned char, const int);
+     vector bool char vec_splat (vector bool char, const int);
+     vector signed short vec_splat (vector signed short, const int);
+     vector unsigned short vec_splat (vector unsigned short, const int);
+     vector bool short vec_splat (vector bool short, const int);
+     vector pixel vec_splat (vector pixel, const int);
+     vector float vec_splat (vector float, const int);
+     vector signed int vec_splat (vector signed int, const int);
+     vector unsigned int vec_splat (vector unsigned int, const int);
+     vector bool int vec_splat (vector bool int, const int);
+
+     vector float vec_vspltw (vector float, const int);
+     vector signed int vec_vspltw (vector signed int, const int);
+     vector unsigned int vec_vspltw (vector unsigned int, const int);
+     vector bool int vec_vspltw (vector bool int, const int);
+
+     vector bool short vec_vsplth (vector bool short, const int);
+     vector signed short vec_vsplth (vector signed short, const int);
+     vector unsigned short vec_vsplth (vector unsigned short, const int);
+     vector pixel vec_vsplth (vector pixel, const int);
+
+     vector signed char vec_vspltb (vector signed char, const int);
+     vector unsigned char vec_vspltb (vector unsigned char, const int);
+     vector bool char vec_vspltb (vector bool char, const int);
+
+     vector signed char vec_splat_s8 (const int);
+
+     vector signed short vec_splat_s16 (const int);
+
+     vector signed int vec_splat_s32 (const int);
+
+     vector unsigned char vec_splat_u8 (const int);
+
+     vector unsigned short vec_splat_u16 (const int);
+
+     vector unsigned int vec_splat_u32 (const int);
+
+     vector signed char vec_sr (vector signed char, vector unsigned char);
+     vector unsigned char vec_sr (vector unsigned char,
+                                  vector unsigned char);
+     vector signed short vec_sr (vector signed short,
+                                 vector unsigned short);
+     vector unsigned short vec_sr (vector unsigned short,
+                                   vector unsigned short);
+     vector signed int vec_sr (vector signed int, vector unsigned int);
+     vector unsigned int vec_sr (vector unsigned int, vector unsigned int);
+
+     vector signed int vec_vsrw (vector signed int, vector unsigned int);
+     vector unsigned int vec_vsrw (vector unsigned int, vector unsigned int);
+
+     vector signed short vec_vsrh (vector signed short,
+                                   vector unsigned short);
+     vector unsigned short vec_vsrh (vector unsigned short,
+                                     vector unsigned short);
+
+     vector signed char vec_vsrb (vector signed char, vector unsigned char);
+     vector unsigned char vec_vsrb (vector unsigned char,
+                                    vector unsigned char);
+
+     vector signed char vec_sra (vector signed char, vector unsigned char);
+     vector unsigned char vec_sra (vector unsigned char,
+                                   vector unsigned char);
+     vector signed short vec_sra (vector signed short,
+                                  vector unsigned short);
+     vector unsigned short vec_sra (vector unsigned short,
+                                    vector unsigned short);
+     vector signed int vec_sra (vector signed int, vector unsigned int);
+     vector unsigned int vec_sra (vector unsigned int, vector unsigned int);
+
+     vector signed int vec_vsraw (vector signed int, vector unsigned int);
+     vector unsigned int vec_vsraw (vector unsigned int,
+                                    vector unsigned int);
+
+     vector signed short vec_vsrah (vector signed short,
+                                    vector unsigned short);
+     vector unsigned short vec_vsrah (vector unsigned short,
+                                      vector unsigned short);
+
+     vector signed char vec_vsrab (vector signed char, vector unsigned char);
+     vector unsigned char vec_vsrab (vector unsigned char,
+                                     vector unsigned char);
+
+     vector signed int vec_srl (vector signed int, vector unsigned int);
+     vector signed int vec_srl (vector signed int, vector unsigned short);
+     vector signed int vec_srl (vector signed int, vector unsigned char);
+     vector unsigned int vec_srl (vector unsigned int, vector unsigned int);
+     vector unsigned int vec_srl (vector unsigned int,
+                                  vector unsigned short);
+     vector unsigned int vec_srl (vector unsigned int, vector unsigned char);
+     vector bool int vec_srl (vector bool int, vector unsigned int);
+     vector bool int vec_srl (vector bool int, vector unsigned short);
+     vector bool int vec_srl (vector bool int, vector unsigned char);
+     vector signed short vec_srl (vector signed short, vector unsigned int);
+     vector signed short vec_srl (vector signed short,
+                                  vector unsigned short);
+     vector signed short vec_srl (vector signed short, vector unsigned char);
+     vector unsigned short vec_srl (vector unsigned short,
+                                    vector unsigned int);
+     vector unsigned short vec_srl (vector unsigned short,
+                                    vector unsigned short);
+     vector unsigned short vec_srl (vector unsigned short,
+                                    vector unsigned char);
+     vector bool short vec_srl (vector bool short, vector unsigned int);
+     vector bool short vec_srl (vector bool short, vector unsigned short);
+     vector bool short vec_srl (vector bool short, vector unsigned char);
+     vector pixel vec_srl (vector pixel, vector unsigned int);
+     vector pixel vec_srl (vector pixel, vector unsigned short);
+     vector pixel vec_srl (vector pixel, vector unsigned char);
+     vector signed char vec_srl (vector signed char, vector unsigned int);
+     vector signed char vec_srl (vector signed char, vector unsigned short);
+     vector signed char vec_srl (vector signed char, vector unsigned char);
+     vector unsigned char vec_srl (vector unsigned char,
+                                   vector unsigned int);
+     vector unsigned char vec_srl (vector unsigned char,
+                                   vector unsigned short);
+     vector unsigned char vec_srl (vector unsigned char,
+                                   vector unsigned char);
+     vector bool char vec_srl (vector bool char, vector unsigned int);
+     vector bool char vec_srl (vector bool char, vector unsigned short);
+     vector bool char vec_srl (vector bool char, vector unsigned char);
+
+     vector float vec_sro (vector float, vector signed char);
+     vector float vec_sro (vector float, vector unsigned char);
+     vector signed int vec_sro (vector signed int, vector signed char);
+     vector signed int vec_sro (vector signed int, vector unsigned char);
+     vector unsigned int vec_sro (vector unsigned int, vector signed char);
+     vector unsigned int vec_sro (vector unsigned int, vector unsigned char);
+     vector signed short vec_sro (vector signed short, vector signed char);
+     vector signed short vec_sro (vector signed short, vector unsigned char);
+     vector unsigned short vec_sro (vector unsigned short,
+                                    vector signed char);
+     vector unsigned short vec_sro (vector unsigned short,
+                                    vector unsigned char);
+     vector pixel vec_sro (vector pixel, vector signed char);
+     vector pixel vec_sro (vector pixel, vector unsigned char);
+     vector signed char vec_sro (vector signed char, vector signed char);
+     vector signed char vec_sro (vector signed char, vector unsigned char);
+     vector unsigned char vec_sro (vector unsigned char, vector signed char);
+     vector unsigned char vec_sro (vector unsigned char,
+                                   vector unsigned char);
+
+     void vec_st (vector float, int, vector float *);
+     void vec_st (vector float, int, float *);
+     void vec_st (vector signed int, int, vector signed int *);
+     void vec_st (vector signed int, int, int *);
+     void vec_st (vector unsigned int, int, vector unsigned int *);
+     void vec_st (vector unsigned int, int, unsigned int *);
+     void vec_st (vector bool int, int, vector bool int *);
+     void vec_st (vector bool int, int, unsigned int *);
+     void vec_st (vector bool int, int, int *);
+     void vec_st (vector signed short, int, vector signed short *);
+     void vec_st (vector signed short, int, short *);
+     void vec_st (vector unsigned short, int, vector unsigned short *);
+     void vec_st (vector unsigned short, int, unsigned short *);
+     void vec_st (vector bool short, int, vector bool short *);
+     void vec_st (vector bool short, int, unsigned short *);
+     void vec_st (vector pixel, int, vector pixel *);
+     void vec_st (vector pixel, int, unsigned short *);
+     void vec_st (vector pixel, int, short *);
+     void vec_st (vector bool short, int, short *);
+     void vec_st (vector signed char, int, vector signed char *);
+     void vec_st (vector signed char, int, signed char *);
+     void vec_st (vector unsigned char, int, vector unsigned char *);
+     void vec_st (vector unsigned char, int, unsigned char *);
+     void vec_st (vector bool char, int, vector bool char *);
+     void vec_st (vector bool char, int, unsigned char *);
+     void vec_st (vector bool char, int, signed char *);
+
+     void vec_ste (vector signed char, int, signed char *);
+     void vec_ste (vector unsigned char, int, unsigned char *);
+     void vec_ste (vector bool char, int, signed char *);
+     void vec_ste (vector bool char, int, unsigned char *);
+     void vec_ste (vector signed short, int, short *);
+     void vec_ste (vector unsigned short, int, unsigned short *);
+     void vec_ste (vector bool short, int, short *);
+     void vec_ste (vector bool short, int, unsigned short *);
+     void vec_ste (vector pixel, int, short *);
+     void vec_ste (vector pixel, int, unsigned short *);
+     void vec_ste (vector float, int, float *);
+     void vec_ste (vector signed int, int, int *);
+     void vec_ste (vector unsigned int, int, unsigned int *);
+     void vec_ste (vector bool int, int, int *);
+     void vec_ste (vector bool int, int, unsigned int *);
+
+     void vec_stvewx (vector float, int, float *);
+     void vec_stvewx (vector signed int, int, int *);
+     void vec_stvewx (vector unsigned int, int, unsigned int *);
+     void vec_stvewx (vector bool int, int, int *);
+     void vec_stvewx (vector bool int, int, unsigned int *);
+
+     void vec_stvehx (vector signed short, int, short *);
+     void vec_stvehx (vector unsigned short, int, unsigned short *);
+     void vec_stvehx (vector bool short, int, short *);
+     void vec_stvehx (vector bool short, int, unsigned short *);
+     void vec_stvehx (vector pixel, int, short *);
+     void vec_stvehx (vector pixel, int, unsigned short *);
+
+     void vec_stvebx (vector signed char, int, signed char *);
+     void vec_stvebx (vector unsigned char, int, unsigned char *);
+     void vec_stvebx (vector bool char, int, signed char *);
+     void vec_stvebx (vector bool char, int, unsigned char *);
+
+     void vec_stl (vector float, int, vector float *);
+     void vec_stl (vector float, int, float *);
+     void vec_stl (vector signed int, int, vector signed int *);
+     void vec_stl (vector signed int, int, int *);
+     void vec_stl (vector unsigned int, int, vector unsigned int *);
+     void vec_stl (vector unsigned int, int, unsigned int *);
+     void vec_stl (vector bool int, int, vector bool int *);
+     void vec_stl (vector bool int, int, unsigned int *);
+     void vec_stl (vector bool int, int, int *);
+     void vec_stl (vector signed short, int, vector signed short *);
+     void vec_stl (vector signed short, int, short *);
+     void vec_stl (vector unsigned short, int, vector unsigned short *);
+     void vec_stl (vector unsigned short, int, unsigned short *);
+     void vec_stl (vector bool short, int, vector bool short *);
+     void vec_stl (vector bool short, int, unsigned short *);
+     void vec_stl (vector bool short, int, short *);
+     void vec_stl (vector pixel, int, vector pixel *);
+     void vec_stl (vector pixel, int, unsigned short *);
+     void vec_stl (vector pixel, int, short *);
+     void vec_stl (vector signed char, int, vector signed char *);
+     void vec_stl (vector signed char, int, signed char *);
+     void vec_stl (vector unsigned char, int, vector unsigned char *);
+     void vec_stl (vector unsigned char, int, unsigned char *);
+     void vec_stl (vector bool char, int, vector bool char *);
+     void vec_stl (vector bool char, int, unsigned char *);
+     void vec_stl (vector bool char, int, signed char *);
+
+     vector signed char vec_sub (vector bool char, vector signed char);
+     vector signed char vec_sub (vector signed char, vector bool char);
+     vector signed char vec_sub (vector signed char, vector signed char);
+     vector unsigned char vec_sub (vector bool char, vector unsigned char);
+     vector unsigned char vec_sub (vector unsigned char, vector bool char);
+     vector unsigned char vec_sub (vector unsigned char,
+                                   vector unsigned char);
+     vector signed short vec_sub (vector bool short, vector signed short);
+     vector signed short vec_sub (vector signed short, vector bool short);
+     vector signed short vec_sub (vector signed short, vector signed short);
+     vector unsigned short vec_sub (vector bool short,
+                                    vector unsigned short);
+     vector unsigned short vec_sub (vector unsigned short,
+                                    vector bool short);
+     vector unsigned short vec_sub (vector unsigned short,
+                                    vector unsigned short);
+     vector signed int vec_sub (vector bool int, vector signed int);
+     vector signed int vec_sub (vector signed int, vector bool int);
+     vector signed int vec_sub (vector signed int, vector signed int);
+     vector unsigned int vec_sub (vector bool int, vector unsigned int);
+     vector unsigned int vec_sub (vector unsigned int, vector bool int);
+     vector unsigned int vec_sub (vector unsigned int, vector unsigned int);
+     vector float vec_sub (vector float, vector float);
+
+     vector float vec_vsubfp (vector float, vector float);
+
+     vector signed int vec_vsubuwm (vector bool int, vector signed int);
+     vector signed int vec_vsubuwm (vector signed int, vector bool int);
+     vector signed int vec_vsubuwm (vector signed int, vector signed int);
+     vector unsigned int vec_vsubuwm (vector bool int, vector unsigned int);
+     vector unsigned int vec_vsubuwm (vector unsigned int, vector bool int);
+     vector unsigned int vec_vsubuwm (vector unsigned int,
+                                      vector unsigned int);
+
+     vector signed short vec_vsubuhm (vector bool short,
+                                      vector signed short);
+     vector signed short vec_vsubuhm (vector signed short,
+                                      vector bool short);
+     vector signed short vec_vsubuhm (vector signed short,
+                                      vector signed short);
+     vector unsigned short vec_vsubuhm (vector bool short,
+                                        vector unsigned short);
+     vector unsigned short vec_vsubuhm (vector unsigned short,
+                                        vector bool short);
+     vector unsigned short vec_vsubuhm (vector unsigned short,
+                                        vector unsigned short);
+
+     vector signed char vec_vsububm (vector bool char, vector signed char);
+     vector signed char vec_vsububm (vector signed char, vector bool char);
+     vector signed char vec_vsububm (vector signed char, vector signed char);
+     vector unsigned char vec_vsububm (vector bool char,
+                                       vector unsigned char);
+     vector unsigned char vec_vsububm (vector unsigned char,
+                                       vector bool char);
+     vector unsigned char vec_vsububm (vector unsigned char,
+                                       vector unsigned char);
+
+     vector unsigned int vec_subc (vector unsigned int, vector unsigned int);
+
+     vector unsigned char vec_subs (vector bool char, vector unsigned char);
+     vector unsigned char vec_subs (vector unsigned char, vector bool char);
+     vector unsigned char vec_subs (vector unsigned char,
+                                    vector unsigned char);
+     vector signed char vec_subs (vector bool char, vector signed char);
+     vector signed char vec_subs (vector signed char, vector bool char);
+     vector signed char vec_subs (vector signed char, vector signed char);
+     vector unsigned short vec_subs (vector bool short,
+                                     vector unsigned short);
+     vector unsigned short vec_subs (vector unsigned short,
+                                     vector bool short);
+     vector unsigned short vec_subs (vector unsigned short,
+                                     vector unsigned short);
+     vector signed short vec_subs (vector bool short, vector signed short);
+     vector signed short vec_subs (vector signed short, vector bool short);
+     vector signed short vec_subs (vector signed short, vector signed short);
+     vector unsigned int vec_subs (vector bool int, vector unsigned int);
+     vector unsigned int vec_subs (vector unsigned int, vector bool int);
+     vector unsigned int vec_subs (vector unsigned int, vector unsigned int);
+     vector signed int vec_subs (vector bool int, vector signed int);
+     vector signed int vec_subs (vector signed int, vector bool int);
+     vector signed int vec_subs (vector signed int, vector signed int);
+
+     vector signed int vec_vsubsws (vector bool int, vector signed int);
+     vector signed int vec_vsubsws (vector signed int, vector bool int);
+     vector signed int vec_vsubsws (vector signed int, vector signed int);
+
+     vector unsigned int vec_vsubuws (vector bool int, vector unsigned int);
+     vector unsigned int vec_vsubuws (vector unsigned int, vector bool int);
+     vector unsigned int vec_vsubuws (vector unsigned int,
+                                      vector unsigned int);
+
+     vector signed short vec_vsubshs (vector bool short,
+                                      vector signed short);
+     vector signed short vec_vsubshs (vector signed short,
+                                      vector bool short);
+     vector signed short vec_vsubshs (vector signed short,
+                                      vector signed short);
+
+     vector unsigned short vec_vsubuhs (vector bool short,
+                                        vector unsigned short);
+     vector unsigned short vec_vsubuhs (vector unsigned short,
+                                        vector bool short);
+     vector unsigned short vec_vsubuhs (vector unsigned short,
+                                        vector unsigned short);
+
+     vector signed char vec_vsubsbs (vector bool char, vector signed char);
+     vector signed char vec_vsubsbs (vector signed char, vector bool char);
+     vector signed char vec_vsubsbs (vector signed char, vector signed char);
+
+     vector unsigned char vec_vsububs (vector bool char,
+                                       vector unsigned char);
+     vector unsigned char vec_vsububs (vector unsigned char,
+                                       vector bool char);
+     vector unsigned char vec_vsububs (vector unsigned char,
+                                       vector unsigned char);
+
+     vector unsigned int vec_sum4s (vector unsigned char,
+                                    vector unsigned int);
+     vector signed int vec_sum4s (vector signed char, vector signed int);
+     vector signed int vec_sum4s (vector signed short, vector signed int);
+
+     vector signed int vec_vsum4shs (vector signed short, vector signed int);
+
+     vector signed int vec_vsum4sbs (vector signed char, vector signed int);
+
+     vector unsigned int vec_vsum4ubs (vector unsigned char,
+                                       vector unsigned int);
+
+     vector signed int vec_sum2s (vector signed int, vector signed int);
+
+     vector signed int vec_sums (vector signed int, vector signed int);
+
+     vector float vec_trunc (vector float);
+
+     vector signed short vec_unpackh (vector signed char);
+     vector bool short vec_unpackh (vector bool char);
+     vector signed int vec_unpackh (vector signed short);
+     vector bool int vec_unpackh (vector bool short);
+     vector unsigned int vec_unpackh (vector pixel);
+
+     vector bool int vec_vupkhsh (vector bool short);
+     vector signed int vec_vupkhsh (vector signed short);
+
+     vector unsigned int vec_vupkhpx (vector pixel);
+
+     vector bool short vec_vupkhsb (vector bool char);
+     vector signed short vec_vupkhsb (vector signed char);
+
+     vector signed short vec_unpackl (vector signed char);
+     vector bool short vec_unpackl (vector bool char);
+     vector unsigned int vec_unpackl (vector pixel);
+     vector signed int vec_unpackl (vector signed short);
+     vector bool int vec_unpackl (vector bool short);
+
+     vector unsigned int vec_vupklpx (vector pixel);
+
+     vector bool int vec_vupklsh (vector bool short);
+     vector signed int vec_vupklsh (vector signed short);
+
+     vector bool short vec_vupklsb (vector bool char);
+     vector signed short vec_vupklsb (vector signed char);
+
+     vector float vec_xor (vector float, vector float);
+     vector float vec_xor (vector float, vector bool int);
+     vector float vec_xor (vector bool int, vector float);
+     vector bool int vec_xor (vector bool int, vector bool int);
+     vector signed int vec_xor (vector bool int, vector signed int);
+     vector signed int vec_xor (vector signed int, vector bool int);
+     vector signed int vec_xor (vector signed int, vector signed int);
+     vector unsigned int vec_xor (vector bool int, vector unsigned int);
+     vector unsigned int vec_xor (vector unsigned int, vector bool int);
+     vector unsigned int vec_xor (vector unsigned int, vector unsigned int);
+     vector bool short vec_xor (vector bool short, vector bool short);
+     vector signed short vec_xor (vector bool short, vector signed short);
+     vector signed short vec_xor (vector signed short, vector bool short);
+     vector signed short vec_xor (vector signed short, vector signed short);
+     vector unsigned short vec_xor (vector bool short,
+                                    vector unsigned short);
+     vector unsigned short vec_xor (vector unsigned short,
+                                    vector bool short);
+     vector unsigned short vec_xor (vector unsigned short,
+                                    vector unsigned short);
+     vector signed char vec_xor (vector bool char, vector signed char);
+     vector bool char vec_xor (vector bool char, vector bool char);
+     vector signed char vec_xor (vector signed char, vector bool char);
+     vector signed char vec_xor (vector signed char, vector signed char);
+     vector unsigned char vec_xor (vector bool char, vector unsigned char);
+     vector unsigned char vec_xor (vector unsigned char, vector bool char);
+     vector unsigned char vec_xor (vector unsigned char,
+                                   vector unsigned char);
+
+     int vec_all_eq (vector signed char, vector bool char);
+     int vec_all_eq (vector signed char, vector signed char);
+     int vec_all_eq (vector unsigned char, vector bool char);
+     int vec_all_eq (vector unsigned char, vector unsigned char);
+     int vec_all_eq (vector bool char, vector bool char);
+     int vec_all_eq (vector bool char, vector unsigned char);
+     int vec_all_eq (vector bool char, vector signed char);
+     int vec_all_eq (vector signed short, vector bool short);
+     int vec_all_eq (vector signed short, vector signed short);
+     int vec_all_eq (vector unsigned short, vector bool short);
+     int vec_all_eq (vector unsigned short, vector unsigned short);
+     int vec_all_eq (vector bool short, vector bool short);
+     int vec_all_eq (vector bool short, vector unsigned short);
+     int vec_all_eq (vector bool short, vector signed short);
+     int vec_all_eq (vector pixel, vector pixel);
+     int vec_all_eq (vector signed int, vector bool int);
+     int vec_all_eq (vector signed int, vector signed int);
+     int vec_all_eq (vector unsigned int, vector bool int);
+     int vec_all_eq (vector unsigned int, vector unsigned int);
+     int vec_all_eq (vector bool int, vector bool int);
+     int vec_all_eq (vector bool int, vector unsigned int);
+     int vec_all_eq (vector bool int, vector signed int);
+     int vec_all_eq (vector float, vector float);
+
+     int vec_all_ge (vector bool char, vector unsigned char);
+     int vec_all_ge (vector unsigned char, vector bool char);
+     int vec_all_ge (vector unsigned char, vector unsigned char);
+     int vec_all_ge (vector bool char, vector signed char);
+     int vec_all_ge (vector signed char, vector bool char);
+     int vec_all_ge (vector signed char, vector signed char);
+     int vec_all_ge (vector bool short, vector unsigned short);
+     int vec_all_ge (vector unsigned short, vector bool short);
+     int vec_all_ge (vector unsigned short, vector unsigned short);
+     int vec_all_ge (vector signed short, vector signed short);
+     int vec_all_ge (vector bool short, vector signed short);
+     int vec_all_ge (vector signed short, vector bool short);
+     int vec_all_ge (vector bool int, vector unsigned int);
+     int vec_all_ge (vector unsigned int, vector bool int);
+     int vec_all_ge (vector unsigned int, vector unsigned int);
+     int vec_all_ge (vector bool int, vector signed int);
+     int vec_all_ge (vector signed int, vector bool int);
+     int vec_all_ge (vector signed int, vector signed int);
+     int vec_all_ge (vector float, vector float);
+
+     int vec_all_gt (vector bool char, vector unsigned char);
+     int vec_all_gt (vector unsigned char, vector bool char);
+     int vec_all_gt (vector unsigned char, vector unsigned char);
+     int vec_all_gt (vector bool char, vector signed char);
+     int vec_all_gt (vector signed char, vector bool char);
+     int vec_all_gt (vector signed char, vector signed char);
+     int vec_all_gt (vector bool short, vector unsigned short);
+     int vec_all_gt (vector unsigned short, vector bool short);
+     int vec_all_gt (vector unsigned short, vector unsigned short);
+     int vec_all_gt (vector bool short, vector signed short);
+     int vec_all_gt (vector signed short, vector bool short);
+     int vec_all_gt (vector signed short, vector signed short);
+     int vec_all_gt (vector bool int, vector unsigned int);
+     int vec_all_gt (vector unsigned int, vector bool int);
+     int vec_all_gt (vector unsigned int, vector unsigned int);
+     int vec_all_gt (vector bool int, vector signed int);
+     int vec_all_gt (vector signed int, vector bool int);
+     int vec_all_gt (vector signed int, vector signed int);
+     int vec_all_gt (vector float, vector float);
+
+     int vec_all_in (vector float, vector float);
+
+     int vec_all_le (vector bool char, vector unsigned char);
+     int vec_all_le (vector unsigned char, vector bool char);
+     int vec_all_le (vector unsigned char, vector unsigned char);
+     int vec_all_le (vector bool char, vector signed char);
+     int vec_all_le (vector signed char, vector bool char);
+     int vec_all_le (vector signed char, vector signed char);
+     int vec_all_le (vector bool short, vector unsigned short);
+     int vec_all_le (vector unsigned short, vector bool short);
+     int vec_all_le (vector unsigned short, vector unsigned short);
+     int vec_all_le (vector bool short, vector signed short);
+     int vec_all_le (vector signed short, vector bool short);
+     int vec_all_le (vector signed short, vector signed short);
+     int vec_all_le (vector bool int, vector unsigned int);
+     int vec_all_le (vector unsigned int, vector bool int);
+     int vec_all_le (vector unsigned int, vector unsigned int);
+     int vec_all_le (vector bool int, vector signed int);
+     int vec_all_le (vector signed int, vector bool int);
+     int vec_all_le (vector signed int, vector signed int);
+     int vec_all_le (vector float, vector float);
+
+     int vec_all_lt (vector bool char, vector unsigned char);
+     int vec_all_lt (vector unsigned char, vector bool char);
+     int vec_all_lt (vector unsigned char, vector unsigned char);
+     int vec_all_lt (vector bool char, vector signed char);
+     int vec_all_lt (vector signed char, vector bool char);
+     int vec_all_lt (vector signed char, vector signed char);
+     int vec_all_lt (vector bool short, vector unsigned short);
+     int vec_all_lt (vector unsigned short, vector bool short);
+     int vec_all_lt (vector unsigned short, vector unsigned short);
+     int vec_all_lt (vector bool short, vector signed short);
+     int vec_all_lt (vector signed short, vector bool short);
+     int vec_all_lt (vector signed short, vector signed short);
+     int vec_all_lt (vector bool int, vector unsigned int);
+     int vec_all_lt (vector unsigned int, vector bool int);
+     int vec_all_lt (vector unsigned int, vector unsigned int);
+     int vec_all_lt (vector bool int, vector signed int);
+     int vec_all_lt (vector signed int, vector bool int);
+     int vec_all_lt (vector signed int, vector signed int);
+     int vec_all_lt (vector float, vector float);
+
+     int vec_all_nan (vector float);
+
+     int vec_all_ne (vector signed char, vector bool char);
+     int vec_all_ne (vector signed char, vector signed char);
+     int vec_all_ne (vector unsigned char, vector bool char);
+     int vec_all_ne (vector unsigned char, vector unsigned char);
+     int vec_all_ne (vector bool char, vector bool char);
+     int vec_all_ne (vector bool char, vector unsigned char);
+     int vec_all_ne (vector bool char, vector signed char);
+     int vec_all_ne (vector signed short, vector bool short);
+     int vec_all_ne (vector signed short, vector signed short);
+     int vec_all_ne (vector unsigned short, vector bool short);
+     int vec_all_ne (vector unsigned short, vector unsigned short);
+     int vec_all_ne (vector bool short, vector bool short);
+     int vec_all_ne (vector bool short, vector unsigned short);
+     int vec_all_ne (vector bool short, vector signed short);
+     int vec_all_ne (vector pixel, vector pixel);
+     int vec_all_ne (vector signed int, vector bool int);
+     int vec_all_ne (vector signed int, vector signed int);
+     int vec_all_ne (vector unsigned int, vector bool int);
+     int vec_all_ne (vector unsigned int, vector unsigned int);
+     int vec_all_ne (vector bool int, vector bool int);
+     int vec_all_ne (vector bool int, vector unsigned int);
+     int vec_all_ne (vector bool int, vector signed int);
+     int vec_all_ne (vector float, vector float);
+
+     int vec_all_nge (vector float, vector float);
+
+     int vec_all_ngt (vector float, vector float);
+
+     int vec_all_nle (vector float, vector float);
+
+     int vec_all_nlt (vector float, vector float);
+
+     int vec_all_numeric (vector float);
+
+     int vec_any_eq (vector signed char, vector bool char);
+     int vec_any_eq (vector signed char, vector signed char);
+     int vec_any_eq (vector unsigned char, vector bool char);
+     int vec_any_eq (vector unsigned char, vector unsigned char);
+     int vec_any_eq (vector bool char, vector bool char);
+     int vec_any_eq (vector bool char, vector unsigned char);
+     int vec_any_eq (vector bool char, vector signed char);
+     int vec_any_eq (vector signed short, vector bool short);
+     int vec_any_eq (vector signed short, vector signed short);
+     int vec_any_eq (vector unsigned short, vector bool short);
+     int vec_any_eq (vector unsigned short, vector unsigned short);
+     int vec_any_eq (vector bool short, vector bool short);
+     int vec_any_eq (vector bool short, vector unsigned short);
+     int vec_any_eq (vector bool short, vector signed short);
+     int vec_any_eq (vector pixel, vector pixel);
+     int vec_any_eq (vector signed int, vector bool int);
+     int vec_any_eq (vector signed int, vector signed int);
+     int vec_any_eq (vector unsigned int, vector bool int);
+     int vec_any_eq (vector unsigned int, vector unsigned int);
+     int vec_any_eq (vector bool int, vector bool int);
+     int vec_any_eq (vector bool int, vector unsigned int);
+     int vec_any_eq (vector bool int, vector signed int);
+     int vec_any_eq (vector float, vector float);
+
+     int vec_any_ge (vector signed char, vector bool char);
+     int vec_any_ge (vector unsigned char, vector bool char);
+     int vec_any_ge (vector unsigned char, vector unsigned char);
+     int vec_any_ge (vector signed char, vector signed char);
+     int vec_any_ge (vector bool char, vector unsigned char);
+     int vec_any_ge (vector bool char, vector signed char);
+     int vec_any_ge (vector unsigned short, vector bool short);
+     int vec_any_ge (vector unsigned short, vector unsigned short);
+     int vec_any_ge (vector signed short, vector signed short);
+     int vec_any_ge (vector signed short, vector bool short);
+     int vec_any_ge (vector bool short, vector unsigned short);
+     int vec_any_ge (vector bool short, vector signed short);
+     int vec_any_ge (vector signed int, vector bool int);
+     int vec_any_ge (vector unsigned int, vector bool int);
+     int vec_any_ge (vector unsigned int, vector unsigned int);
+     int vec_any_ge (vector signed int, vector signed int);
+     int vec_any_ge (vector bool int, vector unsigned int);
+     int vec_any_ge (vector bool int, vector signed int);
+     int vec_any_ge (vector float, vector float);
+
+     int vec_any_gt (vector bool char, vector unsigned char);
+     int vec_any_gt (vector unsigned char, vector bool char);
+     int vec_any_gt (vector unsigned char, vector unsigned char);
+     int vec_any_gt (vector bool char, vector signed char);
+     int vec_any_gt (vector signed char, vector bool char);
+     int vec_any_gt (vector signed char, vector signed char);
+     int vec_any_gt (vector bool short, vector unsigned short);
+     int vec_any_gt (vector unsigned short, vector bool short);
+     int vec_any_gt (vector unsigned short, vector unsigned short);
+     int vec_any_gt (vector bool short, vector signed short);
+     int vec_any_gt (vector signed short, vector bool short);
+     int vec_any_gt (vector signed short, vector signed short);
+     int vec_any_gt (vector bool int, vector unsigned int);
+     int vec_any_gt (vector unsigned int, vector bool int);
+     int vec_any_gt (vector unsigned int, vector unsigned int);
+     int vec_any_gt (vector bool int, vector signed int);
+     int vec_any_gt (vector signed int, vector bool int);
+     int vec_any_gt (vector signed int, vector signed int);
+     int vec_any_gt (vector float, vector float);
+
+     int vec_any_le (vector bool char, vector unsigned char);
+     int vec_any_le (vector unsigned char, vector bool char);
+     int vec_any_le (vector unsigned char, vector unsigned char);
+     int vec_any_le (vector bool char, vector signed char);
+     int vec_any_le (vector signed char, vector bool char);
+     int vec_any_le (vector signed char, vector signed char);
+     int vec_any_le (vector bool short, vector unsigned short);
+     int vec_any_le (vector unsigned short, vector bool short);
+     int vec_any_le (vector unsigned short, vector unsigned short);
+     int vec_any_le (vector bool short, vector signed short);
+     int vec_any_le (vector signed short, vector bool short);
+     int vec_any_le (vector signed short, vector signed short);
+     int vec_any_le (vector bool int, vector unsigned int);
+     int vec_any_le (vector unsigned int, vector bool int);
+     int vec_any_le (vector unsigned int, vector unsigned int);
+     int vec_any_le (vector bool int, vector signed int);
+     int vec_any_le (vector signed int, vector bool int);
+     int vec_any_le (vector signed int, vector signed int);
+     int vec_any_le (vector float, vector float);
+
+     int vec_any_lt (vector bool char, vector unsigned char);
+     int vec_any_lt (vector unsigned char, vector bool char);
+     int vec_any_lt (vector unsigned char, vector unsigned char);
+     int vec_any_lt (vector bool char, vector signed char);
+     int vec_any_lt (vector signed char, vector bool char);
+     int vec_any_lt (vector signed char, vector signed char);
+     int vec_any_lt (vector bool short, vector unsigned short);
+     int vec_any_lt (vector unsigned short, vector bool short);
+     int vec_any_lt (vector unsigned short, vector unsigned short);
+     int vec_any_lt (vector bool short, vector signed short);
+     int vec_any_lt (vector signed short, vector bool short);
+     int vec_any_lt (vector signed short, vector signed short);
+     int vec_any_lt (vector bool int, vector unsigned int);
+     int vec_any_lt (vector unsigned int, vector bool int);
+     int vec_any_lt (vector unsigned int, vector unsigned int);
+     int vec_any_lt (vector bool int, vector signed int);
+     int vec_any_lt (vector signed int, vector bool int);
+     int vec_any_lt (vector signed int, vector signed int);
+     int vec_any_lt (vector float, vector float);
+
+     int vec_any_nan (vector float);
+
+     int vec_any_ne (vector signed char, vector bool char);
+     int vec_any_ne (vector signed char, vector signed char);
+     int vec_any_ne (vector unsigned char, vector bool char);
+     int vec_any_ne (vector unsigned char, vector unsigned char);
+     int vec_any_ne (vector bool char, vector bool char);
+     int vec_any_ne (vector bool char, vector unsigned char);
+     int vec_any_ne (vector bool char, vector signed char);
+     int vec_any_ne (vector signed short, vector bool short);
+     int vec_any_ne (vector signed short, vector signed short);
+     int vec_any_ne (vector unsigned short, vector bool short);
+     int vec_any_ne (vector unsigned short, vector unsigned short);
+     int vec_any_ne (vector bool short, vector bool short);
+     int vec_any_ne (vector bool short, vector unsigned short);
+     int vec_any_ne (vector bool short, vector signed short);
+     int vec_any_ne (vector pixel, vector pixel);
+     int vec_any_ne (vector signed int, vector bool int);
+     int vec_any_ne (vector signed int, vector signed int);
+     int vec_any_ne (vector unsigned int, vector bool int);
+     int vec_any_ne (vector unsigned int, vector unsigned int);
+     int vec_any_ne (vector bool int, vector bool int);
+     int vec_any_ne (vector bool int, vector unsigned int);
+     int vec_any_ne (vector bool int, vector signed int);
+     int vec_any_ne (vector float, vector float);
+
+     int vec_any_nge (vector float, vector float);
+
+     int vec_any_ngt (vector float, vector float);
+
+     int vec_any_nle (vector float, vector float);
+
+     int vec_any_nlt (vector float, vector float);
+
+     int vec_any_numeric (vector float);
+
+     int vec_any_out (vector float, vector float);
+
+ If the vector/scalar (VSX) instruction set is available, the following
+additional functions are available:
+
+     vector double vec_abs (vector double);
+     vector double vec_add (vector double, vector double);
+     vector double vec_and (vector double, vector double);
+     vector double vec_and (vector double, vector bool long);
+     vector double vec_and (vector bool long, vector double);
+     vector double vec_andc (vector double, vector double);
+     vector double vec_andc (vector double, vector bool long);
+     vector double vec_andc (vector bool long, vector double);
+     vector double vec_ceil (vector double);
+     vector bool long vec_cmpeq (vector double, vector double);
+     vector bool long vec_cmpge (vector double, vector double);
+     vector bool long vec_cmpgt (vector double, vector double);
+     vector bool long vec_cmple (vector double, vector double);
+     vector bool long vec_cmplt (vector double, vector double);
+     vector float vec_div (vector float, vector float);
+     vector double vec_div (vector double, vector double);
+     vector double vec_floor (vector double);
+     vector double vec_ld (int, const vector double *);
+     vector double vec_ld (int, const double *);
+     vector double vec_ldl (int, const vector double *);
+     vector double vec_ldl (int, const double *);
+     vector unsigned char vec_lvsl (int, const volatile double *);
+     vector unsigned char vec_lvsr (int, const volatile double *);
+     vector double vec_madd (vector double, vector double, vector double);
+     vector double vec_max (vector double, vector double);
+     vector double vec_min (vector double, vector double);
+     vector float vec_msub (vector float, vector float, vector float);
+     vector double vec_msub (vector double, vector double, vector double);
+     vector float vec_mul (vector float, vector float);
+     vector double vec_mul (vector double, vector double);
+     vector float vec_nearbyint (vector float);
+     vector double vec_nearbyint (vector double);
+     vector float vec_nmadd (vector float, vector float, vector float);
+     vector double vec_nmadd (vector double, vector double, vector double);
+     vector double vec_nmsub (vector double, vector double, vector double);
+     vector double vec_nor (vector double, vector double);
+     vector double vec_or (vector double, vector double);
+     vector double vec_or (vector double, vector bool long);
+     vector double vec_or (vector bool long, vector double);
+     vector double vec_perm (vector double,
+                             vector double,
+                             vector unsigned char);
+     vector double vec_rint (vector double);
+     vector double vec_recip (vector double, vector double);
+     vector double vec_rsqrt (vector double);
+     vector double vec_rsqrte (vector double);
+     vector double vec_sel (vector double, vector double, vector bool long);
+     vector double vec_sel (vector double, vector double, vector unsigned long);
+     vector double vec_sub (vector double, vector double);
+     vector float vec_sqrt (vector float);
+     vector double vec_sqrt (vector double);
+     void vec_st (vector double, int, vector double *);
+     void vec_st (vector double, int, double *);
+     vector double vec_trunc (vector double);
+     vector double vec_xor (vector double, vector double);
+     vector double vec_xor (vector double, vector bool long);
+     vector double vec_xor (vector bool long, vector double);
+     int vec_all_eq (vector double, vector double);
+     int vec_all_ge (vector double, vector double);
+     int vec_all_gt (vector double, vector double);
+     int vec_all_le (vector double, vector double);
+     int vec_all_lt (vector double, vector double);
+     int vec_all_nan (vector double);
+     int vec_all_ne (vector double, vector double);
+     int vec_all_nge (vector double, vector double);
+     int vec_all_ngt (vector double, vector double);
+     int vec_all_nle (vector double, vector double);
+     int vec_all_nlt (vector double, vector double);
+     int vec_all_numeric (vector double);
+     int vec_any_eq (vector double, vector double);
+     int vec_any_ge (vector double, vector double);
+     int vec_any_gt (vector double, vector double);
+     int vec_any_le (vector double, vector double);
+     int vec_any_lt (vector double, vector double);
+     int vec_any_nan (vector double);
+     int vec_any_ne (vector double, vector double);
+     int vec_any_nge (vector double, vector double);
+     int vec_any_ngt (vector double, vector double);
+     int vec_any_nle (vector double, vector double);
+     int vec_any_nlt (vector double, vector double);
+     int vec_any_numeric (vector double);
+
+     vector double vec_vsx_ld (int, const vector double *);
+     vector double vec_vsx_ld (int, const double *);
+     vector float vec_vsx_ld (int, const vector float *);
+     vector float vec_vsx_ld (int, const float *);
+     vector bool int vec_vsx_ld (int, const vector bool int *);
+     vector signed int vec_vsx_ld (int, const vector signed int *);
+     vector signed int vec_vsx_ld (int, const int *);
+     vector signed int vec_vsx_ld (int, const long *);
+     vector unsigned int vec_vsx_ld (int, const vector unsigned int *);
+     vector unsigned int vec_vsx_ld (int, const unsigned int *);
+     vector unsigned int vec_vsx_ld (int, const unsigned long *);
+     vector bool short vec_vsx_ld (int, const vector bool short *);
+     vector pixel vec_vsx_ld (int, const vector pixel *);
+     vector signed short vec_vsx_ld (int, const vector signed short *);
+     vector signed short vec_vsx_ld (int, const short *);
+     vector unsigned short vec_vsx_ld (int, const vector unsigned short *);
+     vector unsigned short vec_vsx_ld (int, const unsigned short *);
+     vector bool char vec_vsx_ld (int, const vector bool char *);
+     vector signed char vec_vsx_ld (int, const vector signed char *);
+     vector signed char vec_vsx_ld (int, const signed char *);
+     vector unsigned char vec_vsx_ld (int, const vector unsigned char *);
+     vector unsigned char vec_vsx_ld (int, const unsigned char *);
+
+     void vec_vsx_st (vector double, int, vector double *);
+     void vec_vsx_st (vector double, int, double *);
+     void vec_vsx_st (vector float, int, vector float *);
+     void vec_vsx_st (vector float, int, float *);
+     void vec_vsx_st (vector signed int, int, vector signed int *);
+     void vec_vsx_st (vector signed int, int, int *);
+     void vec_vsx_st (vector unsigned int, int, vector unsigned int *);
+     void vec_vsx_st (vector unsigned int, int, unsigned int *);
+     void vec_vsx_st (vector bool int, int, vector bool int *);
+     void vec_vsx_st (vector bool int, int, unsigned int *);
+     void vec_vsx_st (vector bool int, int, int *);
+     void vec_vsx_st (vector signed short, int, vector signed short *);
+     void vec_vsx_st (vector signed short, int, short *);
+     void vec_vsx_st (vector unsigned short, int, vector unsigned short *);
+     void vec_vsx_st (vector unsigned short, int, unsigned short *);
+     void vec_vsx_st (vector bool short, int, vector bool short *);
+     void vec_vsx_st (vector bool short, int, unsigned short *);
+     void vec_vsx_st (vector pixel, int, vector pixel *);
+     void vec_vsx_st (vector pixel, int, unsigned short *);
+     void vec_vsx_st (vector pixel, int, short *);
+     void vec_vsx_st (vector bool short, int, short *);
+     void vec_vsx_st (vector signed char, int, vector signed char *);
+     void vec_vsx_st (vector signed char, int, signed char *);
+     void vec_vsx_st (vector unsigned char, int, vector unsigned char *);
+     void vec_vsx_st (vector unsigned char, int, unsigned char *);
+     void vec_vsx_st (vector bool char, int, vector bool char *);
+     void vec_vsx_st (vector bool char, int, unsigned char *);
+     void vec_vsx_st (vector bool char, int, signed char *);
+
+ Note that the `vec_ld' and `vec_st' builtins will always generate the
+Altivec `LVX' and `STVX' instructions even if the VSX instruction set
+is available.  The `vec_vsx_ld' and `vec_vsx_st' builtins will always
+generate the VSX `LXVD2X', `LXVW4X', `STXVD2X', and `STXVW4X'
+instructions.
+
+ GCC provides a few other builtins on Powerpc to access certain
+instructions:
+     float __builtin_recipdivf (float, float);
+     float __builtin_rsqrtf (float);
+     double __builtin_recipdiv (double, double);
+     double __builtin_rsqrt (double);
+     long __builtin_bpermd (long, long);
+     int __builtin_bswap16 (int);
+
+ The `vec_rsqrt', `__builtin_rsqrt', and `__builtin_rsqrtf' functions
+generate multiple instructions to implement the reciprocal sqrt
+functionality using reciprocal sqrt estimate instructions.
+
+ The `__builtin_recipdiv', and `__builtin_recipdivf' functions generate
+multiple instructions to implement division using the reciprocal
+estimate instructions.
+
+
+File: gcc.info,  Node: RX Built-in Functions,  Next: SPARC VIS Built-in Functions,  Prev: PowerPC AltiVec/VSX Built-in Functions,  Up: Target Builtins
+
+6.54.13 RX Built-in Functions
+-----------------------------
+
+GCC supports some of the RX instructions which cannot be expressed in
+the C programming language via the use of built-in functions.  The
+following functions are supported:
+
+ -- Built-in Function: void __builtin_rx_brk (void)
+     Generates the `brk' machine instruction.
+
+ -- Built-in Function: void __builtin_rx_clrpsw (int)
+     Generates the `clrpsw' machine instruction to clear the specified
+     bit in the processor status word.
+
+ -- Built-in Function: void __builtin_rx_int (int)
+     Generates the `int' machine instruction to generate an interrupt
+     with the specified value.
+
+ -- Built-in Function: void __builtin_rx_machi (int, int)
+     Generates the `machi' machine instruction to add the result of
+     multiplying the top 16-bits of the two arguments into the
+     accumulator.
+
+ -- Built-in Function: void __builtin_rx_maclo (int, int)
+     Generates the `maclo' machine instruction to add the result of
+     multiplying the bottom 16-bits of the two arguments into the
+     accumulator.
+
+ -- Built-in Function: void __builtin_rx_mulhi (int, int)
+     Generates the `mulhi' machine instruction to place the result of
+     multiplying the top 16-bits of the two arguments into the
+     accumulator.
+
+ -- Built-in Function: void __builtin_rx_mullo (int, int)
+     Generates the `mullo' machine instruction to place the result of
+     multiplying the bottom 16-bits of the two arguments into the
+     accumulator.
+
+ -- Built-in Function: int __builtin_rx_mvfachi (void)
+     Generates the `mvfachi' machine instruction to read the top
+     32-bits of the accumulator.
+
+ -- Built-in Function: int __builtin_rx_mvfacmi (void)
+     Generates the `mvfacmi' machine instruction to read the middle
+     32-bits of the accumulator.
+
+ -- Built-in Function: int __builtin_rx_mvfc (int)
+     Generates the `mvfc' machine instruction which reads the control
+     register specified in its argument and returns its value.
+
+ -- Built-in Function: void __builtin_rx_mvtachi (int)
+     Generates the `mvtachi' machine instruction to set the top 32-bits
+     of the accumulator.
+
+ -- Built-in Function: void __builtin_rx_mvtaclo (int)
+     Generates the `mvtaclo' machine instruction to set the bottom
+     32-bits of the accumulator.
+
+ -- Built-in Function: void __builtin_rx_mvtc (int reg, int val)
+     Generates the `mvtc' machine instruction which sets control
+     register number `reg' to `val'.
+
+ -- Built-in Function: void __builtin_rx_mvtipl (int)
+     Generates the `mvtipl' machine instruction set the interrupt
+     priority level.
+
+ -- Built-in Function: void __builtin_rx_racw (int)
+     Generates the `racw' machine instruction to round the accumulator
+     according to the specified mode.
+
+ -- Built-in Function: int __builtin_rx_revw (int)
+     Generates the `revw' machine instruction which swaps the bytes in
+     the argument so that bits 0-7 now occupy bits 8-15 and vice versa,
+     and also bits 16-23 occupy bits 24-31 and vice versa.
+
+ -- Built-in Function: void __builtin_rx_rmpa (void)
+     Generates the `rmpa' machine instruction which initiates a
+     repeated multiply and accumulate sequence.
+
+ -- Built-in Function: void __builtin_rx_round (float)
+     Generates the `round' machine instruction which returns the
+     floating point argument rounded according to the current rounding
+     mode set in the floating point status word register.
+
+ -- Built-in Function: int __builtin_rx_sat (int)
+     Generates the `sat' machine instruction which returns the
+     saturated value of the argument.
+
+ -- Built-in Function: void __builtin_rx_setpsw (int)
+     Generates the `setpsw' machine instruction to set the specified
+     bit in the processor status word.
+
+ -- Built-in Function: void __builtin_rx_wait (void)
+     Generates the `wait' machine instruction.
+
+
+File: gcc.info,  Node: SPARC VIS Built-in Functions,  Next: SPU Built-in Functions,  Prev: RX Built-in Functions,  Up: Target Builtins
+
+6.54.14 SPARC VIS Built-in Functions
+------------------------------------
+
+GCC supports SIMD operations on the SPARC using both the generic vector
+extensions (*note Vector Extensions::) as well as built-in functions for
+the SPARC Visual Instruction Set (VIS).  When you use the `-mvis'
+switch, the VIS extension is exposed as the following built-in
+functions:
+
+     typedef int v2si __attribute__ ((vector_size (8)));
+     typedef short v4hi __attribute__ ((vector_size (8)));
+     typedef short v2hi __attribute__ ((vector_size (4)));
+     typedef char v8qi __attribute__ ((vector_size (8)));
+     typedef char v4qi __attribute__ ((vector_size (4)));
+
+     void * __builtin_vis_alignaddr (void *, long);
+     int64_t __builtin_vis_faligndatadi (int64_t, int64_t);
+     v2si __builtin_vis_faligndatav2si (v2si, v2si);
+     v4hi __builtin_vis_faligndatav4hi (v4si, v4si);
+     v8qi __builtin_vis_faligndatav8qi (v8qi, v8qi);
+
+     v4hi __builtin_vis_fexpand (v4qi);
+
+     v4hi __builtin_vis_fmul8x16 (v4qi, v4hi);
+     v4hi __builtin_vis_fmul8x16au (v4qi, v4hi);
+     v4hi __builtin_vis_fmul8x16al (v4qi, v4hi);
+     v4hi __builtin_vis_fmul8sux16 (v8qi, v4hi);
+     v4hi __builtin_vis_fmul8ulx16 (v8qi, v4hi);
+     v2si __builtin_vis_fmuld8sux16 (v4qi, v2hi);
+     v2si __builtin_vis_fmuld8ulx16 (v4qi, v2hi);
+
+     v4qi __builtin_vis_fpack16 (v4hi);
+     v8qi __builtin_vis_fpack32 (v2si, v2si);
+     v2hi __builtin_vis_fpackfix (v2si);
+     v8qi __builtin_vis_fpmerge (v4qi, v4qi);
+
+     int64_t __builtin_vis_pdist (v8qi, v8qi, int64_t);
+
+
+File: gcc.info,  Node: SPU Built-in Functions,  Prev: SPARC VIS Built-in Functions,  Up: Target Builtins
+
+6.54.15 SPU Built-in Functions
+------------------------------
+
+GCC provides extensions for the SPU processor as described in the
+Sony/Toshiba/IBM SPU Language Extensions Specification, which can be
+found at `http://cell.scei.co.jp/' or
+`http://www.ibm.com/developerworks/power/cell/'.  GCC's implementation
+differs in several ways.
+
+   * The optional extension of specifying vector constants in
+     parentheses is not supported.
+
+   * A vector initializer requires no cast if the vector constant is of
+     the same type as the variable it is initializing.
+
+   * If `signed' or `unsigned' is omitted, the signedness of the vector
+     type is the default signedness of the base type.  The default
+     varies depending on the operating system, so a portable program
+     should always specify the signedness.
+
+   * By default, the keyword `__vector' is added. The macro `vector' is
+     defined in `<spu_intrinsics.h>' and can be undefined.
+
+   * GCC allows using a `typedef' name as the type specifier for a
+     vector type.
+
+   * For C, overloaded functions are implemented with macros so the
+     following does not work:
+
+            spu_add ((vector signed int){1, 2, 3, 4}, foo);
+
+     Since `spu_add' is a macro, the vector constant in the example is
+     treated as four separate arguments.  Wrap the entire argument in
+     parentheses for this to work.
+
+   * The extended version of `__builtin_expect' is not supported.
+
+
+ _Note:_ Only the interface described in the aforementioned
+specification is supported. Internally, GCC uses built-in functions to
+implement the required functionality, but these are not supported and
+are subject to change without notice.
+
+
+File: gcc.info,  Node: Target Format Checks,  Next: Pragmas,  Prev: Target Builtins,  Up: C Extensions
+
+6.55 Format Checks Specific to Particular Target Machines
+=========================================================
+
+For some target machines, GCC supports additional options to the format
+attribute (*note Declaring Attributes of Functions: Function
+Attributes.).
+
+* Menu:
+
+* Solaris Format Checks::
+* Darwin Format Checks::
+
+
+File: gcc.info,  Node: Solaris Format Checks,  Next: Darwin Format Checks,  Up: Target Format Checks
+
+6.55.1 Solaris Format Checks
+----------------------------
+
+Solaris targets support the `cmn_err' (or `__cmn_err__') format check.
+`cmn_err' accepts a subset of the standard `printf' conversions, and
+the two-argument `%b' conversion for displaying bit-fields.  See the
+Solaris man page for `cmn_err' for more information.
+
+
+File: gcc.info,  Node: Darwin Format Checks,  Prev: Solaris Format Checks,  Up: Target Format Checks
+
+6.55.2 Darwin Format Checks
+---------------------------
+
+Darwin targets support the `CFString' (or `__CFString__') in the format
+attribute context.  Declarations made with such attribution will be
+parsed for correct syntax and format argument types.  However, parsing
+of the format string itself is currently undefined and will not be
+carried out by this version of the compiler.
+
+ Additionally, `CFStringRefs' (defined by the `CoreFoundation' headers)
+may also be used as format arguments.  Note that the relevant headers
+are only likely to be available on Darwin (OSX) installations.  On such
+installations, the XCode and system documentation provide descriptions
+of `CFString', `CFStringRefs' and associated functions.
+
+
+File: gcc.info,  Node: Pragmas,  Next: Unnamed Fields,  Prev: Target Format Checks,  Up: C Extensions
+
+6.56 Pragmas Accepted by GCC
+============================
+
+GCC supports several types of pragmas, primarily in order to compile
+code originally written for other compilers.  Note that in general we
+do not recommend the use of pragmas; *Note Function Attributes::, for
+further explanation.
+
+* Menu:
+
+* ARM Pragmas::
+* M32C Pragmas::
+* MeP Pragmas::
+* RS/6000 and PowerPC Pragmas::
+* Darwin Pragmas::
+* Solaris Pragmas::
+* Symbol-Renaming Pragmas::
+* Structure-Packing Pragmas::
+* Weak Pragmas::
+* Diagnostic Pragmas::
+* Visibility Pragmas::
+* Push/Pop Macro Pragmas::
+* Function Specific Option Pragmas::
+
+
+File: gcc.info,  Node: ARM Pragmas,  Next: M32C Pragmas,  Up: Pragmas
+
+6.56.1 ARM Pragmas
+------------------
+
+The ARM target defines pragmas for controlling the default addition of
+`long_call' and `short_call' attributes to functions.  *Note Function
+Attributes::, for information about the effects of these attributes.
+
+`long_calls'
+     Set all subsequent functions to have the `long_call' attribute.
+
+`no_long_calls'
+     Set all subsequent functions to have the `short_call' attribute.
+
+`long_calls_off'
+     Do not affect the `long_call' or `short_call' attributes of
+     subsequent functions.
+
+
+File: gcc.info,  Node: M32C Pragmas,  Next: MeP Pragmas,  Prev: ARM Pragmas,  Up: Pragmas
+
+6.56.2 M32C Pragmas
+-------------------
+
+`GCC memregs NUMBER'
+     Overrides the command-line option `-memregs=' for the current
+     file.  Use with care!  This pragma must be before any function in
+     the file, and mixing different memregs values in different objects
+     may make them incompatible.  This pragma is useful when a
+     performance-critical function uses a memreg for temporary values,
+     as it may allow you to reduce the number of memregs used.
+
+`ADDRESS NAME ADDRESS'
+     For any declared symbols matching NAME, this does three things to
+     that symbol: it forces the symbol to be located at the given
+     address (a number), it forces the symbol to be volatile, and it
+     changes the symbol's scope to be static.  This pragma exists for
+     compatibility with other compilers, but note that the common
+     `1234H' numeric syntax is not supported (use `0x1234' instead).
+     Example:
+
+          #pragma ADDRESS port3 0x103
+          char port3;
+
+
+
+File: gcc.info,  Node: MeP Pragmas,  Next: RS/6000 and PowerPC Pragmas,  Prev: M32C Pragmas,  Up: Pragmas
+
+6.56.3 MeP Pragmas
+------------------
+
+`custom io_volatile (on|off)'
+     Overrides the command line option `-mio-volatile' for the current
+     file.  Note that for compatibility with future GCC releases, this
+     option should only be used once before any `io' variables in each
+     file.
+
+`GCC coprocessor available REGISTERS'
+     Specifies which coprocessor registers are available to the register
+     allocator.  REGISTERS may be a single register, register range
+     separated by ellipses, or comma-separated list of those.  Example:
+
+          #pragma GCC coprocessor available $c0...$c10, $c28
+
+`GCC coprocessor call_saved REGISTERS'
+     Specifies which coprocessor registers are to be saved and restored
+     by any function using them.  REGISTERS may be a single register,
+     register range separated by ellipses, or comma-separated list of
+     those.  Example:
+
+          #pragma GCC coprocessor call_saved $c4...$c6, $c31
+
+`GCC coprocessor subclass '(A|B|C|D)' = REGISTERS'
+     Creates and defines a register class.  These register classes can
+     be used by inline `asm' constructs.  REGISTERS may be a single
+     register, register range separated by ellipses, or comma-separated
+     list of those.  Example:
+
+          #pragma GCC coprocessor subclass 'B' = $c2, $c4, $c6
+
+          asm ("cpfoo %0" : "=B" (x));
+
+`GCC disinterrupt NAME , NAME ...'
+     For the named functions, the compiler adds code to disable
+     interrupts for the duration of those functions.  Any functions so
+     named, which are not encountered in the source, cause a warning
+     that the pragma was not used.  Examples:
+
+          #pragma disinterrupt foo
+          #pragma disinterrupt bar, grill
+          int foo () { ... }
+
+`GCC call NAME , NAME ...'
+     For the named functions, the compiler always uses a
+     register-indirect call model when calling the named functions.
+     Examples:
+
+          extern int foo ();
+          #pragma call foo
+
+
+
+File: gcc.info,  Node: RS/6000 and PowerPC Pragmas,  Next: Darwin Pragmas,  Prev: MeP Pragmas,  Up: Pragmas
+
+6.56.4 RS/6000 and PowerPC Pragmas
+----------------------------------
+
+The RS/6000 and PowerPC targets define one pragma for controlling
+whether or not the `longcall' attribute is added to function
+declarations by default.  This pragma overrides the `-mlongcall'
+option, but not the `longcall' and `shortcall' attributes.  *Note
+RS/6000 and PowerPC Options::, for more information about when long
+calls are and are not necessary.
+
+`longcall (1)'
+     Apply the `longcall' attribute to all subsequent function
+     declarations.
+
+`longcall (0)'
+     Do not apply the `longcall' attribute to subsequent function
+     declarations.
+
+
+File: gcc.info,  Node: Darwin Pragmas,  Next: Solaris Pragmas,  Prev: RS/6000 and PowerPC Pragmas,  Up: Pragmas
+
+6.56.5 Darwin Pragmas
+---------------------
+
+The following pragmas are available for all architectures running the
+Darwin operating system.  These are useful for compatibility with other
+Mac OS compilers.
+
+`mark TOKENS...'
+     This pragma is accepted, but has no effect.
+
+`options align=ALIGNMENT'
+     This pragma sets the alignment of fields in structures.  The
+     values of ALIGNMENT may be `mac68k', to emulate m68k alignment, or
+     `power', to emulate PowerPC alignment.  Uses of this pragma nest
+     properly; to restore the previous setting, use `reset' for the
+     ALIGNMENT.
+
+`segment TOKENS...'
+     This pragma is accepted, but has no effect.
+
+`unused (VAR [, VAR]...)'
+     This pragma declares variables to be possibly unused.  GCC will not
+     produce warnings for the listed variables.  The effect is similar
+     to that of the `unused' attribute, except that this pragma may
+     appear anywhere within the variables' scopes.
+
+
+File: gcc.info,  Node: Solaris Pragmas,  Next: Symbol-Renaming Pragmas,  Prev: Darwin Pragmas,  Up: Pragmas
+
+6.56.6 Solaris Pragmas
+----------------------
+
+The Solaris target supports `#pragma redefine_extname' (*note
+Symbol-Renaming Pragmas::).  It also supports additional `#pragma'
+directives for compatibility with the system compiler.
+
+`align ALIGNMENT (VARIABLE [, VARIABLE]...)'
+     Increase the minimum alignment of each VARIABLE to ALIGNMENT.
+     This is the same as GCC's `aligned' attribute *note Variable
+     Attributes::).  Macro expansion occurs on the arguments to this
+     pragma when compiling C and Objective-C.  It does not currently
+     occur when compiling C++, but this is a bug which may be fixed in
+     a future release.
+
+`fini (FUNCTION [, FUNCTION]...)'
+     This pragma causes each listed FUNCTION to be called after main,
+     or during shared module unloading, by adding a call to the `.fini'
+     section.
+
+`init (FUNCTION [, FUNCTION]...)'
+     This pragma causes each listed FUNCTION to be called during
+     initialization (before `main') or during shared module loading, by
+     adding a call to the `.init' section.
+
+
+
+File: gcc.info,  Node: Symbol-Renaming Pragmas,  Next: Structure-Packing Pragmas,  Prev: Solaris Pragmas,  Up: Pragmas
+
+6.56.7 Symbol-Renaming Pragmas
+------------------------------
+
+For compatibility with the Solaris and Tru64 UNIX system headers, GCC
+supports two `#pragma' directives which change the name used in
+assembly for a given declaration.  `#pragma extern_prefix' is only
+available on platforms whose system headers need it. To get this effect
+on all platforms supported by GCC, use the asm labels extension (*note
+Asm Labels::).
+
+`redefine_extname OLDNAME NEWNAME'
+     This pragma gives the C function OLDNAME the assembly symbol
+     NEWNAME.  The preprocessor macro `__PRAGMA_REDEFINE_EXTNAME' will
+     be defined if this pragma is available (currently on all
+     platforms).
+
+`extern_prefix STRING'
+     This pragma causes all subsequent external function and variable
+     declarations to have STRING prepended to their assembly symbols.
+     This effect may be terminated with another `extern_prefix' pragma
+     whose argument is an empty string.  The preprocessor macro
+     `__PRAGMA_EXTERN_PREFIX' will be defined if this pragma is
+     available (currently only on Tru64 UNIX).
+
+ These pragmas and the asm labels extension interact in a complicated
+manner.  Here are some corner cases you may want to be aware of.
+
+  1. Both pragmas silently apply only to declarations with external
+     linkage.  Asm labels do not have this restriction.
+
+  2. In C++, both pragmas silently apply only to declarations with "C"
+     linkage.  Again, asm labels do not have this restriction.
+
+  3. If any of the three ways of changing the assembly name of a
+     declaration is applied to a declaration whose assembly name has
+     already been determined (either by a previous use of one of these
+     features, or because the compiler needed the assembly name in
+     order to generate code), and the new name is different, a warning
+     issues and the name does not change.
+
+  4. The OLDNAME used by `#pragma redefine_extname' is always the
+     C-language name.
+
+  5. If `#pragma extern_prefix' is in effect, and a declaration occurs
+     with an asm label attached, the prefix is silently ignored for
+     that declaration.
+
+  6. If `#pragma extern_prefix' and `#pragma redefine_extname' apply to
+     the same declaration, whichever triggered first wins, and a
+     warning issues if they contradict each other.  (We would like to
+     have `#pragma redefine_extname' always win, for consistency with
+     asm labels, but if `#pragma extern_prefix' triggers first we have
+     no way of knowing that that happened.)
+
+
+File: gcc.info,  Node: Structure-Packing Pragmas,  Next: Weak Pragmas,  Prev: Symbol-Renaming Pragmas,  Up: Pragmas
+
+6.56.8 Structure-Packing Pragmas
+--------------------------------
+
+For compatibility with Microsoft Windows compilers, GCC supports a set
+of `#pragma' directives which change the maximum alignment of members
+of structures (other than zero-width bitfields), unions, and classes
+subsequently defined. The N value below always is required to be a
+small power of two and specifies the new alignment in bytes.
+
+  1. `#pragma pack(N)' simply sets the new alignment.
+
+  2. `#pragma pack()' sets the alignment to the one that was in effect
+     when compilation started (see also command-line option
+     `-fpack-struct[=N]' *note Code Gen Options::).
+
+  3. `#pragma pack(push[,N])' pushes the current alignment setting on
+     an internal stack and then optionally sets the new alignment.
+
+  4. `#pragma pack(pop)' restores the alignment setting to the one
+     saved at the top of the internal stack (and removes that stack
+     entry).  Note that `#pragma pack([N])' does not influence this
+     internal stack; thus it is possible to have `#pragma pack(push)'
+     followed by multiple `#pragma pack(N)' instances and finalized by
+     a single `#pragma pack(pop)'.
+
+ Some targets, e.g. i386 and powerpc, support the `ms_struct' `#pragma'
+which lays out a structure as the documented `__attribute__
+((ms_struct))'.
+  1. `#pragma ms_struct on' turns on the layout for structures declared.
+
+  2. `#pragma ms_struct off' turns off the layout for structures
+     declared.
+
+  3. `#pragma ms_struct reset' goes back to the default layout.
+
+
+File: gcc.info,  Node: Weak Pragmas,  Next: Diagnostic Pragmas,  Prev: Structure-Packing Pragmas,  Up: Pragmas
+
+6.56.9 Weak Pragmas
+-------------------
+
+For compatibility with SVR4, GCC supports a set of `#pragma' directives
+for declaring symbols to be weak, and defining weak aliases.
+
+`#pragma weak SYMBOL'
+     This pragma declares SYMBOL to be weak, as if the declaration had
+     the attribute of the same name.  The pragma may appear before or
+     after the declaration of SYMBOL.  It is not an error for SYMBOL to
+     never be defined at all.
+
+`#pragma weak SYMBOL1 = SYMBOL2'
+     This pragma declares SYMBOL1 to be a weak alias of SYMBOL2.  It is
+     an error if SYMBOL2 is not defined in the current translation unit.
+
+
+File: gcc.info,  Node: Diagnostic Pragmas,  Next: Visibility Pragmas,  Prev: Weak Pragmas,  Up: Pragmas
+
+6.56.10 Diagnostic Pragmas
+--------------------------
+
+GCC allows the user to selectively enable or disable certain types of
+diagnostics, and change the kind of the diagnostic.  For example, a
+project's policy might require that all sources compile with `-Werror'
+but certain files might have exceptions allowing specific types of
+warnings.  Or, a project might selectively enable diagnostics and treat
+them as errors depending on which preprocessor macros are defined.
+
+`#pragma GCC diagnostic KIND OPTION'
+     Modifies the disposition of a diagnostic.  Note that not all
+     diagnostics are modifiable; at the moment only warnings (normally
+     controlled by `-W...') can be controlled, and not all of them.
+     Use `-fdiagnostics-show-option' to determine which diagnostics are
+     controllable and which option controls them.
+
+     KIND is `error' to treat this diagnostic as an error, `warning' to
+     treat it like a warning (even if `-Werror' is in effect), or
+     `ignored' if the diagnostic is to be ignored.  OPTION is a double
+     quoted string which matches the command-line option.
+
+          #pragma GCC diagnostic warning "-Wformat"
+          #pragma GCC diagnostic error "-Wformat"
+          #pragma GCC diagnostic ignored "-Wformat"
+
+     Note that these pragmas override any command-line options.  GCC
+     keeps track of the location of each pragma, and issues diagnostics
+     according to the state as of that point in the source file.  Thus,
+     pragmas occurring after a line do not affect diagnostics caused by
+     that line.
+
+`#pragma GCC diagnostic push'
+`#pragma GCC diagnostic pop'
+     Causes GCC to remember the state of the diagnostics as of each
+     `push', and restore to that point at each `pop'.  If a `pop' has
+     no matching `push', the command line options are restored.
+
+          #pragma GCC diagnostic error "-Wuninitialized"
+            foo(a);			/* error is given for this one */
+          #pragma GCC diagnostic push
+          #pragma GCC diagnostic ignored "-Wuninitialized"
+            foo(b);			/* no diagnostic for this one */
+          #pragma GCC diagnostic pop
+            foo(c);			/* error is given for this one */
+          #pragma GCC diagnostic pop
+            foo(d);			/* depends on command line options */
+
+
+ GCC also offers a simple mechanism for printing messages during
+compilation.
+
+`#pragma message STRING'
+     Prints STRING as a compiler message on compilation.  The message
+     is informational only, and is neither a compilation warning nor an
+     error.
+
+          #pragma message "Compiling " __FILE__ "..."
+
+     STRING may be parenthesized, and is printed with location
+     information.  For example,
+
+          #define DO_PRAGMA(x) _Pragma (#x)
+          #define TODO(x) DO_PRAGMA(message ("TODO - " #x))
+
+          TODO(Remember to fix this)
+
+     prints `/tmp/file.c:4: note: #pragma message: TODO - Remember to
+     fix this'.
+
+
+
+File: gcc.info,  Node: Visibility Pragmas,  Next: Push/Pop Macro Pragmas,  Prev: Diagnostic Pragmas,  Up: Pragmas
+
+6.56.11 Visibility Pragmas
+--------------------------
+
+`#pragma GCC visibility push(VISIBILITY)'
+`#pragma GCC visibility pop'
+     This pragma allows the user to set the visibility for multiple
+     declarations without having to give each a visibility attribute
+     *Note Function Attributes::, for more information about visibility
+     and the attribute syntax.
+
+     In C++, `#pragma GCC visibility' affects only namespace-scope
+     declarations.  Class members and template specializations are not
+     affected; if you want to override the visibility for a particular
+     member or instantiation, you must use an attribute.
+
+
+
+File: gcc.info,  Node: Push/Pop Macro Pragmas,  Next: Function Specific Option Pragmas,  Prev: Visibility Pragmas,  Up: Pragmas
+
+6.56.12 Push/Pop Macro Pragmas
+------------------------------
+
+For compatibility with Microsoft Windows compilers, GCC supports
+`#pragma push_macro("MACRO_NAME")' and `#pragma
+pop_macro("MACRO_NAME")'.
+
+`#pragma push_macro("MACRO_NAME")'
+     This pragma saves the value of the macro named as MACRO_NAME to
+     the top of the stack for this macro.
+
+`#pragma pop_macro("MACRO_NAME")'
+     This pragma sets the value of the macro named as MACRO_NAME to the
+     value on top of the stack for this macro. If the stack for
+     MACRO_NAME is empty, the value of the macro remains unchanged.
+
+ For example:
+
+     #define X  1
+     #pragma push_macro("X")
+     #undef X
+     #define X -1
+     #pragma pop_macro("X")
+     int x [X];
+
+ In this example, the definition of X as 1 is saved by `#pragma
+push_macro' and restored by `#pragma pop_macro'.
+
+
+File: gcc.info,  Node: Function Specific Option Pragmas,  Prev: Push/Pop Macro Pragmas,  Up: Pragmas
+
+6.56.13 Function Specific Option Pragmas
+----------------------------------------
+
+`#pragma GCC target ("STRING"...)'
+     This pragma allows you to set target specific options for functions
+     defined later in the source file.  One or more strings can be
+     specified.  Each function that is defined after this point will be
+     as if `attribute((target("STRING")))' was specified for that
+     function.  The parenthesis around the options is optional.  *Note
+     Function Attributes::, for more information about the `target'
+     attribute and the attribute syntax.
+
+     The `#pragma GCC target' attribute is not implemented in GCC
+     versions earlier than 4.4 for the i386/x86_64 and 4.6 for the
+     PowerPC backends.  At present, it is not implemented for other
+     backends.
+
+`#pragma GCC optimize ("STRING"...)'
+     This pragma allows you to set global optimization options for
+     functions defined later in the source file.  One or more strings
+     can be specified.  Each function that is defined after this point
+     will be as if `attribute((optimize("STRING")))' was specified for
+     that function.  The parenthesis around the options is optional.
+     *Note Function Attributes::, for more information about the
+     `optimize' attribute and the attribute syntax.
+
+     The `#pragma GCC optimize' pragma is not implemented in GCC
+     versions earlier than 4.4.
+
+`#pragma GCC push_options'
+`#pragma GCC pop_options'
+     These pragmas maintain a stack of the current target and
+     optimization options.  It is intended for include files where you
+     temporarily want to switch to using a different `#pragma GCC
+     target' or `#pragma GCC optimize' and then to pop back to the
+     previous options.
+
+     The `#pragma GCC push_options' and `#pragma GCC pop_options'
+     pragmas are not implemented in GCC versions earlier than 4.4.
+
+`#pragma GCC reset_options'
+     This pragma clears the current `#pragma GCC target' and `#pragma
+     GCC optimize' to use the default switches as specified on the
+     command line.
+
+     The `#pragma GCC reset_options' pragma is not implemented in GCC
+     versions earlier than 4.4.
+
+
+File: gcc.info,  Node: Unnamed Fields,  Next: Thread-Local,  Prev: Pragmas,  Up: C Extensions
+
+6.57 Unnamed struct/union fields within structs/unions
+======================================================
+
+As permitted by ISO C1X and for compatibility with other compilers, GCC
+allows you to define a structure or union that contains, as fields,
+structures and unions without names.  For example:
+
+     struct {
+       int a;
+       union {
+         int b;
+         float c;
+       };
+       int d;
+     } foo;
+
+ In this example, the user would be able to access members of the
+unnamed union with code like `foo.b'.  Note that only unnamed structs
+and unions are allowed, you may not have, for example, an unnamed `int'.
+
+ You must never create such structures that cause ambiguous field
+definitions.  For example, this structure:
+
+     struct {
+       int a;
+       struct {
+         int a;
+       };
+     } foo;
+
+ It is ambiguous which `a' is being referred to with `foo.a'.  The
+compiler gives errors for such constructs.
+
+ Unless `-fms-extensions' is used, the unnamed field must be a
+structure or union definition without a tag (for example, `struct { int
+a; };').  If `-fms-extensions' is used, the field may also be a
+definition with a tag such as `struct foo { int a; };', a reference to
+a previously defined structure or union such as `struct foo;', or a
+reference to a `typedef' name for a previously defined structure or
+union type.
+
+ The option `-fplan9-extensions' enables `-fms-extensions' as well as
+two other extensions.  First, a pointer to a structure is automatically
+converted to a pointer to an anonymous field for assignments and
+function calls.  For example:
+
+     struct s1 { int a; };
+     struct s2 { struct s1; };
+     extern void f1 (struct s1 *);
+     void f2 (struct s2 *p) { f1 (p); }
+
+ In the call to `f1' inside `f2', the pointer `p' is converted into a
+pointer to the anonymous field.
+
+ Second, when the type of an anonymous field is a `typedef' for a
+`struct' or `union', code may refer to the field using the name of the
+`typedef'.
+
+     typedef struct { int a; } s1;
+     struct s2 { s1; };
+     s1 f1 (struct s2 *p) { return p->s1; }
+
+ These usages are only permitted when they are not ambiguous.
+
+
+File: gcc.info,  Node: Thread-Local,  Next: Binary constants,  Prev: Unnamed Fields,  Up: C Extensions
+
+6.58 Thread-Local Storage
+=========================
+
+Thread-local storage (TLS) is a mechanism by which variables are
+allocated such that there is one instance of the variable per extant
+thread.  The run-time model GCC uses to implement this originates in
+the IA-64 processor-specific ABI, but has since been migrated to other
+processors as well.  It requires significant support from the linker
+(`ld'), dynamic linker (`ld.so'), and system libraries (`libc.so' and
+`libpthread.so'), so it is not available everywhere.
+
+ At the user level, the extension is visible with a new storage class
+keyword: `__thread'.  For example:
+
+     __thread int i;
+     extern __thread struct state s;
+     static __thread char *p;
+
+ The `__thread' specifier may be used alone, with the `extern' or
+`static' specifiers, but with no other storage class specifier.  When
+used with `extern' or `static', `__thread' must appear immediately
+after the other storage class specifier.
+
+ The `__thread' specifier may be applied to any global, file-scoped
+static, function-scoped static, or static data member of a class.  It
+may not be applied to block-scoped automatic or non-static data member.
+
+ When the address-of operator is applied to a thread-local variable, it
+is evaluated at run-time and returns the address of the current thread's
+instance of that variable.  An address so obtained may be used by any
+thread.  When a thread terminates, any pointers to thread-local
+variables in that thread become invalid.
+
+ No static initialization may refer to the address of a thread-local
+variable.
+
+ In C++, if an initializer is present for a thread-local variable, it
+must be a CONSTANT-EXPRESSION, as defined in 5.19.2 of the ANSI/ISO C++
+standard.
+
+ See ELF Handling For Thread-Local Storage
+(http://www.akkadia.org/drepper/tls.pdf) for a detailed explanation of
+the four thread-local storage addressing models, and how the run-time
+is expected to function.
+
+* Menu:
+
+* C99 Thread-Local Edits::
+* C++98 Thread-Local Edits::
+
+
+File: gcc.info,  Node: C99 Thread-Local Edits,  Next: C++98 Thread-Local Edits,  Up: Thread-Local
+
+6.58.1 ISO/IEC 9899:1999 Edits for Thread-Local Storage
+-------------------------------------------------------
+
+The following are a set of changes to ISO/IEC 9899:1999 (aka C99) that
+document the exact semantics of the language extension.
+
+   * `5.1.2  Execution environments'
+
+     Add new text after paragraph 1
+
+          Within either execution environment, a "thread" is a flow of
+          control within a program.  It is implementation defined
+          whether or not there may be more than one thread associated
+          with a program.  It is implementation defined how threads
+          beyond the first are created, the name and type of the
+          function called at thread startup, and how threads may be
+          terminated.  However, objects with thread storage duration
+          shall be initialized before thread startup.
+
+   * `6.2.4  Storage durations of objects'
+
+     Add new text before paragraph 3
+
+          An object whose identifier is declared with the storage-class
+          specifier `__thread' has "thread storage duration".  Its
+          lifetime is the entire execution of the thread, and its
+          stored value is initialized only once, prior to thread
+          startup.
+
+   * `6.4.1  Keywords'
+
+     Add `__thread'.
+
+   * `6.7.1  Storage-class specifiers'
+
+     Add `__thread' to the list of storage class specifiers in
+     paragraph 1.
+
+     Change paragraph 2 to
+
+          With the exception of `__thread', at most one storage-class
+          specifier may be given [...].  The `__thread' specifier may
+          be used alone, or immediately following `extern' or `static'.
+
+     Add new text after paragraph 6
+
+          The declaration of an identifier for a variable that has
+          block scope that specifies `__thread' shall also specify
+          either `extern' or `static'.
+
+          The `__thread' specifier shall be used only with variables.
+
+
+File: gcc.info,  Node: C++98 Thread-Local Edits,  Prev: C99 Thread-Local Edits,  Up: Thread-Local
+
+6.58.2 ISO/IEC 14882:1998 Edits for Thread-Local Storage
+--------------------------------------------------------
+
+The following are a set of changes to ISO/IEC 14882:1998 (aka C++98)
+that document the exact semantics of the language extension.
+
+   * [intro.execution]
+
+     New text after paragraph 4
+
+          A "thread" is a flow of control within the abstract machine.
+          It is implementation defined whether or not there may be more
+          than one thread.
+
+     New text after paragraph 7
+
+          It is unspecified whether additional action must be taken to
+          ensure when and whether side effects are visible to other
+          threads.
+
+   * [lex.key]
+
+     Add `__thread'.
+
+   * [basic.start.main]
+
+     Add after paragraph 5
+
+          The thread that begins execution at the `main' function is
+          called the "main thread".  It is implementation defined how
+          functions beginning threads other than the main thread are
+          designated or typed.  A function so designated, as well as
+          the `main' function, is called a "thread startup function".
+          It is implementation defined what happens if a thread startup
+          function returns.  It is implementation defined what happens
+          to other threads when any thread calls `exit'.
+
+   * [basic.start.init]
+
+     Add after paragraph 4
+
+          The storage for an object of thread storage duration shall be
+          statically initialized before the first statement of the
+          thread startup function.  An object of thread storage
+          duration shall not require dynamic initialization.
+
+   * [basic.start.term]
+
+     Add after paragraph 3
+
+          The type of an object with thread storage duration shall not
+          have a non-trivial destructor, nor shall it be an array type
+          whose elements (directly or indirectly) have non-trivial
+          destructors.
+
+   * [basic.stc]
+
+     Add "thread storage duration" to the list in paragraph 1.
+
+     Change paragraph 2
+
+          Thread, static, and automatic storage durations are
+          associated with objects introduced by declarations [...].
+
+     Add `__thread' to the list of specifiers in paragraph 3.
+
+   * [basic.stc.thread]
+
+     New section before [basic.stc.static]
+
+          The keyword `__thread' applied to a non-local object gives the
+          object thread storage duration.
+
+          A local variable or class data member declared both `static'
+          and `__thread' gives the variable or member thread storage
+          duration.
+
+   * [basic.stc.static]
+
+     Change paragraph 1
+
+          All objects which have neither thread storage duration,
+          dynamic storage duration nor are local [...].
+
+   * [dcl.stc]
+
+     Add `__thread' to the list in paragraph 1.
+
+     Change paragraph 1
+
+          With the exception of `__thread', at most one
+          STORAGE-CLASS-SPECIFIER shall appear in a given
+          DECL-SPECIFIER-SEQ.  The `__thread' specifier may be used
+          alone, or immediately following the `extern' or `static'
+          specifiers.  [...]
+
+     Add after paragraph 5
+
+          The `__thread' specifier can be applied only to the names of
+          objects and to anonymous unions.
+
+   * [class.mem]
+
+     Add after paragraph 6
+
+          Non-`static' members shall not be `__thread'.
+
+
+File: gcc.info,  Node: Binary constants,  Prev: Thread-Local,  Up: C Extensions
+
+6.59 Binary constants using the `0b' prefix
+===========================================
+
+Integer constants can be written as binary constants, consisting of a
+sequence of `0' and `1' digits, prefixed by `0b' or `0B'.  This is
+particularly useful in environments that operate a lot on the bit-level
+(like microcontrollers).
+
+ The following statements are identical:
+
+     i =       42;
+     i =     0x2a;
+     i =      052;
+     i = 0b101010;
+
+ The type of these constants follows the same rules as for octal or
+hexadecimal integer constants, so suffixes like `L' or `UL' can be
+applied.
+
+
+File: gcc.info,  Node: C++ Extensions,  Next: Objective-C,  Prev: C++ Implementation,  Up: Top
+
+7 Extensions to the C++ Language
+********************************
+
+The GNU compiler provides these extensions to the C++ language (and you
+can also use most of the C language extensions in your C++ programs).
+If you want to write code that checks whether these features are
+available, you can test for the GNU compiler the same way as for C
+programs: check for a predefined macro `__GNUC__'.  You can also use
+`__GNUG__' to test specifically for GNU C++ (*note Predefined Macros:
+(cpp)Common Predefined Macros.).
+
+* Menu:
+
+* C++ Volatiles::       What constitutes an access to a volatile object.
+* Restricted Pointers:: C99 restricted pointers and references.
+* Vague Linkage::       Where G++ puts inlines, vtables and such.
+* C++ Interface::       You can use a single C++ header file for both
+                        declarations and definitions.
+* Template Instantiation:: Methods for ensuring that exactly one copy of
+                        each needed template instantiation is emitted.
+* Bound member functions:: You can extract a function pointer to the
+                        method denoted by a `->*' or `.*' expression.
+* C++ Attributes::      Variable, function, and type attributes for C++ only.
+* Namespace Association:: Strong using-directives for namespace association.
+* Type Traits::         Compiler support for type traits
+* Java Exceptions::     Tweaking exception handling to work with Java.
+* Deprecated Features:: Things will disappear from g++.
+* Backwards Compatibility:: Compatibilities with earlier definitions of C++.
+
+
+File: gcc.info,  Node: C++ Volatiles,  Next: Restricted Pointers,  Up: C++ Extensions
+
+7.1 When is a Volatile C++ Object Accessed?
+===========================================
+
+The C++ standard differs from the C standard in its treatment of
+volatile objects.  It fails to specify what constitutes a volatile
+access, except to say that C++ should behave in a similar manner to C
+with respect to volatiles, where possible.  However, the different
+lvalueness of expressions between C and C++ complicate the behavior.
+G++ behaves the same as GCC for volatile access, *Note Volatiles: C
+Extensions, for a description of GCC's behavior.
+
+ The C and C++ language specifications differ when an object is
+accessed in a void context:
+
+     volatile int *src = SOMEVALUE;
+     *src;
+
+ The C++ standard specifies that such expressions do not undergo lvalue
+to rvalue conversion, and that the type of the dereferenced object may
+be incomplete.  The C++ standard does not specify explicitly that it is
+lvalue to rvalue conversion which is responsible for causing an access.
+There is reason to believe that it is, because otherwise certain simple
+expressions become undefined.  However, because it would surprise most
+programmers, G++ treats dereferencing a pointer to volatile object of
+complete type as GCC would do for an equivalent type in C.  When the
+object has incomplete type, G++ issues a warning; if you wish to force
+an error, you must force a conversion to rvalue with, for instance, a
+static cast.
+
+ When using a reference to volatile, G++ does not treat equivalent
+expressions as accesses to volatiles, but instead issues a warning that
+no volatile is accessed.  The rationale for this is that otherwise it
+becomes difficult to determine where volatile access occur, and not
+possible to ignore the return value from functions returning volatile
+references.  Again, if you wish to force a read, cast the reference to
+an rvalue.
+
+ G++ implements the same behavior as GCC does when assigning to a
+volatile object - there is no reread of the assigned-to object, the
+assigned rvalue is reused.  Note that in C++ assignment expressions are
+lvalues, and if used as an lvalue, the volatile object will be referred
+to.  For instance, VREF will refer to VOBJ, as expected, in the
+following example:
+
+     volatile int vobj;
+     volatile int &vref = vobj = SOMETHING;
+
+
+File: gcc.info,  Node: Restricted Pointers,  Next: Vague Linkage,  Prev: C++ Volatiles,  Up: C++ Extensions
+
+7.2 Restricting Pointer Aliasing
+================================
+
+As with the C front end, G++ understands the C99 feature of restricted
+pointers, specified with the `__restrict__', or `__restrict' type
+qualifier.  Because you cannot compile C++ by specifying the `-std=c99'
+language flag, `restrict' is not a keyword in C++.
+
+ In addition to allowing restricted pointers, you can specify restricted
+references, which indicate that the reference is not aliased in the
+local context.
+
+     void fn (int *__restrict__ rptr, int &__restrict__ rref)
+     {
+       /* ... */
+     }
+
+In the body of `fn', RPTR points to an unaliased integer and RREF
+refers to a (different) unaliased integer.
+
+ You may also specify whether a member function's THIS pointer is
+unaliased by using `__restrict__' as a member function qualifier.
+
+     void T::fn () __restrict__
+     {
+       /* ... */
+     }
+
+Within the body of `T::fn', THIS will have the effective definition `T
+*__restrict__ const this'.  Notice that the interpretation of a
+`__restrict__' member function qualifier is different to that of
+`const' or `volatile' qualifier, in that it is applied to the pointer
+rather than the object.  This is consistent with other compilers which
+implement restricted pointers.
+
+ As with all outermost parameter qualifiers, `__restrict__' is ignored
+in function definition matching.  This means you only need to specify
+`__restrict__' in a function definition, rather than in a function
+prototype as well.
+
+
+File: gcc.info,  Node: Vague Linkage,  Next: C++ Interface,  Prev: Restricted Pointers,  Up: C++ Extensions
+
+7.3 Vague Linkage
+=================
+
+There are several constructs in C++ which require space in the object
+file but are not clearly tied to a single translation unit.  We say that
+these constructs have "vague linkage".  Typically such constructs are
+emitted wherever they are needed, though sometimes we can be more
+clever.
+
+Inline Functions
+     Inline functions are typically defined in a header file which can
+     be included in many different compilations.  Hopefully they can
+     usually be inlined, but sometimes an out-of-line copy is
+     necessary, if the address of the function is taken or if inlining
+     fails.  In general, we emit an out-of-line copy in all translation
+     units where one is needed.  As an exception, we only emit inline
+     virtual functions with the vtable, since it will always require a
+     copy.
+
+     Local static variables and string constants used in an inline
+     function are also considered to have vague linkage, since they
+     must be shared between all inlined and out-of-line instances of
+     the function.
+
+VTables
+     C++ virtual functions are implemented in most compilers using a
+     lookup table, known as a vtable.  The vtable contains pointers to
+     the virtual functions provided by a class, and each object of the
+     class contains a pointer to its vtable (or vtables, in some
+     multiple-inheritance situations).  If the class declares any
+     non-inline, non-pure virtual functions, the first one is chosen as
+     the "key method" for the class, and the vtable is only emitted in
+     the translation unit where the key method is defined.
+
+     _Note:_ If the chosen key method is later defined as inline, the
+     vtable will still be emitted in every translation unit which
+     defines it.  Make sure that any inline virtuals are declared
+     inline in the class body, even if they are not defined there.
+
+`type_info' objects
+     C++ requires information about types to be written out in order to
+     implement `dynamic_cast', `typeid' and exception handling.  For
+     polymorphic classes (classes with virtual functions), the
+     `type_info' object is written out along with the vtable so that
+     `dynamic_cast' can determine the dynamic type of a class object at
+     runtime.  For all other types, we write out the `type_info' object
+     when it is used: when applying `typeid' to an expression, throwing
+     an object, or referring to a type in a catch clause or exception
+     specification.
+
+Template Instantiations
+     Most everything in this section also applies to template
+     instantiations, but there are other options as well.  *Note
+     Where's the Template?: Template Instantiation.
+
+
+ When used with GNU ld version 2.8 or later on an ELF system such as
+GNU/Linux or Solaris 2, or on Microsoft Windows, duplicate copies of
+these constructs will be discarded at link time.  This is known as
+COMDAT support.
+
+ On targets that don't support COMDAT, but do support weak symbols, GCC
+will use them.  This way one copy will override all the others, but the
+unused copies will still take up space in the executable.
+
+ For targets which do not support either COMDAT or weak symbols, most
+entities with vague linkage will be emitted as local symbols to avoid
+duplicate definition errors from the linker.  This will not happen for
+local statics in inlines, however, as having multiple copies will
+almost certainly break things.
+
+ *Note Declarations and Definitions in One Header: C++ Interface, for
+another way to control placement of these constructs.
+
+
+File: gcc.info,  Node: C++ Interface,  Next: Template Instantiation,  Prev: Vague Linkage,  Up: C++ Extensions
+
+7.4 #pragma interface and implementation
+========================================
+
+`#pragma interface' and `#pragma implementation' provide the user with
+a way of explicitly directing the compiler to emit entities with vague
+linkage (and debugging information) in a particular translation unit.
+
+ _Note:_ As of GCC 2.7.2, these `#pragma's are not useful in most
+cases, because of COMDAT support and the "key method" heuristic
+mentioned in *note Vague Linkage::.  Using them can actually cause your
+program to grow due to unnecessary out-of-line copies of inline
+functions.  Currently (3.4) the only benefit of these `#pragma's is
+reduced duplication of debugging information, and that should be
+addressed soon on DWARF 2 targets with the use of COMDAT groups.
+
+`#pragma interface'
+`#pragma interface "SUBDIR/OBJECTS.h"'
+     Use this directive in _header files_ that define object classes,
+     to save space in most of the object files that use those classes.
+     Normally, local copies of certain information (backup copies of
+     inline member functions, debugging information, and the internal
+     tables that implement virtual functions) must be kept in each
+     object file that includes class definitions.  You can use this
+     pragma to avoid such duplication.  When a header file containing
+     `#pragma interface' is included in a compilation, this auxiliary
+     information will not be generated (unless the main input source
+     file itself uses `#pragma implementation').  Instead, the object
+     files will contain references to be resolved at link time.
+
+     The second form of this directive is useful for the case where you
+     have multiple headers with the same name in different directories.
+     If you use this form, you must specify the same string to `#pragma
+     implementation'.
+
+`#pragma implementation'
+`#pragma implementation "OBJECTS.h"'
+     Use this pragma in a _main input file_, when you want full output
+     from included header files to be generated (and made globally
+     visible).  The included header file, in turn, should use `#pragma
+     interface'.  Backup copies of inline member functions, debugging
+     information, and the internal tables used to implement virtual
+     functions are all generated in implementation files.
+
+     If you use `#pragma implementation' with no argument, it applies to
+     an include file with the same basename(1) as your source file.
+     For example, in `allclass.cc', giving just `#pragma implementation'
+     by itself is equivalent to `#pragma implementation "allclass.h"'.
+
+     In versions of GNU C++ prior to 2.6.0 `allclass.h' was treated as
+     an implementation file whenever you would include it from
+     `allclass.cc' even if you never specified `#pragma
+     implementation'.  This was deemed to be more trouble than it was
+     worth, however, and disabled.
+
+     Use the string argument if you want a single implementation file to
+     include code from multiple header files.  (You must also use
+     `#include' to include the header file; `#pragma implementation'
+     only specifies how to use the file--it doesn't actually include
+     it.)
+
+     There is no way to split up the contents of a single header file
+     into multiple implementation files.
+
+ `#pragma implementation' and `#pragma interface' also have an effect
+on function inlining.
+
+ If you define a class in a header file marked with `#pragma
+interface', the effect on an inline function defined in that class is
+similar to an explicit `extern' declaration--the compiler emits no code
+at all to define an independent version of the function.  Its
+definition is used only for inlining with its callers.
+
+ Conversely, when you include the same header file in a main source file
+that declares it as `#pragma implementation', the compiler emits code
+for the function itself; this defines a version of the function that
+can be found via pointers (or by callers compiled without inlining).
+If all calls to the function can be inlined, you can avoid emitting the
+function by compiling with `-fno-implement-inlines'.  If any calls were
+not inlined, you will get linker errors.
+
+ ---------- Footnotes ----------
+
+ (1) A file's "basename" was the name stripped of all leading path
+information and of trailing suffixes, such as `.h' or `.C' or `.cc'.
+
+
+File: gcc.info,  Node: Template Instantiation,  Next: Bound member functions,  Prev: C++ Interface,  Up: C++ Extensions
+
+7.5 Where's the Template?
+=========================
+
+C++ templates are the first language feature to require more
+intelligence from the environment than one usually finds on a UNIX
+system.  Somehow the compiler and linker have to make sure that each
+template instance occurs exactly once in the executable if it is needed,
+and not at all otherwise.  There are two basic approaches to this
+problem, which are referred to as the Borland model and the Cfront
+model.
+
+Borland model
+     Borland C++ solved the template instantiation problem by adding
+     the code equivalent of common blocks to their linker; the compiler
+     emits template instances in each translation unit that uses them,
+     and the linker collapses them together.  The advantage of this
+     model is that the linker only has to consider the object files
+     themselves; there is no external complexity to worry about.  This
+     disadvantage is that compilation time is increased because the
+     template code is being compiled repeatedly.  Code written for this
+     model tends to include definitions of all templates in the header
+     file, since they must be seen to be instantiated.
+
+Cfront model
+     The AT&T C++ translator, Cfront, solved the template instantiation
+     problem by creating the notion of a template repository, an
+     automatically maintained place where template instances are
+     stored.  A more modern version of the repository works as follows:
+     As individual object files are built, the compiler places any
+     template definitions and instantiations encountered in the
+     repository.  At link time, the link wrapper adds in the objects in
+     the repository and compiles any needed instances that were not
+     previously emitted.  The advantages of this model are more optimal
+     compilation speed and the ability to use the system linker; to
+     implement the Borland model a compiler vendor also needs to
+     replace the linker.  The disadvantages are vastly increased
+     complexity, and thus potential for error; for some code this can be
+     just as transparent, but in practice it can been very difficult to
+     build multiple programs in one directory and one program in
+     multiple directories.  Code written for this model tends to
+     separate definitions of non-inline member templates into a
+     separate file, which should be compiled separately.
+
+ When used with GNU ld version 2.8 or later on an ELF system such as
+GNU/Linux or Solaris 2, or on Microsoft Windows, G++ supports the
+Borland model.  On other systems, G++ implements neither automatic
+model.
+
+ A future version of G++ will support a hybrid model whereby the
+compiler will emit any instantiations for which the template definition
+is included in the compile, and store template definitions and
+instantiation context information into the object file for the rest.
+The link wrapper will extract that information as necessary and invoke
+the compiler to produce the remaining instantiations.  The linker will
+then combine duplicate instantiations.
+
+ In the mean time, you have the following options for dealing with
+template instantiations:
+
+  1. Compile your template-using code with `-frepo'.  The compiler will
+     generate files with the extension `.rpo' listing all of the
+     template instantiations used in the corresponding object files
+     which could be instantiated there; the link wrapper, `collect2',
+     will then update the `.rpo' files to tell the compiler where to
+     place those instantiations and rebuild any affected object files.
+     The link-time overhead is negligible after the first pass, as the
+     compiler will continue to place the instantiations in the same
+     files.
+
+     This is your best option for application code written for the
+     Borland model, as it will just work.  Code written for the Cfront
+     model will need to be modified so that the template definitions
+     are available at one or more points of instantiation; usually this
+     is as simple as adding `#include <tmethods.cc>' to the end of each
+     template header.
+
+     For library code, if you want the library to provide all of the
+     template instantiations it needs, just try to link all of its
+     object files together; the link will fail, but cause the
+     instantiations to be generated as a side effect.  Be warned,
+     however, that this may cause conflicts if multiple libraries try
+     to provide the same instantiations.  For greater control, use
+     explicit instantiation as described in the next option.
+
+  2. Compile your code with `-fno-implicit-templates' to disable the
+     implicit generation of template instances, and explicitly
+     instantiate all the ones you use.  This approach requires more
+     knowledge of exactly which instances you need than do the others,
+     but it's less mysterious and allows greater control.  You can
+     scatter the explicit instantiations throughout your program,
+     perhaps putting them in the translation units where the instances
+     are used or the translation units that define the templates
+     themselves; you can put all of the explicit instantiations you
+     need into one big file; or you can create small files like
+
+          #include "Foo.h"
+          #include "Foo.cc"
+
+          template class Foo<int>;
+          template ostream& operator <<
+                          (ostream&, const Foo<int>&);
+
+     for each of the instances you need, and create a template
+     instantiation library from those.
+
+     If you are using Cfront-model code, you can probably get away with
+     not using `-fno-implicit-templates' when compiling files that don't
+     `#include' the member template definitions.
+
+     If you use one big file to do the instantiations, you may want to
+     compile it without `-fno-implicit-templates' so you get all of the
+     instances required by your explicit instantiations (but not by any
+     other files) without having to specify them as well.
+
+     G++ has extended the template instantiation syntax given in the ISO
+     standard to allow forward declaration of explicit instantiations
+     (with `extern'), instantiation of the compiler support data for a
+     template class (i.e. the vtable) without instantiating any of its
+     members (with `inline'), and instantiation of only the static data
+     members of a template class, without the support data or member
+     functions (with (`static'):
+
+          extern template int max (int, int);
+          inline template class Foo<int>;
+          static template class Foo<int>;
+
+  3. Do nothing.  Pretend G++ does implement automatic instantiation
+     management.  Code written for the Borland model will work fine, but
+     each translation unit will contain instances of each of the
+     templates it uses.  In a large program, this can lead to an
+     unacceptable amount of code duplication.
+
+
+File: gcc.info,  Node: Bound member functions,  Next: C++ Attributes,  Prev: Template Instantiation,  Up: C++ Extensions
+
+7.6 Extracting the function pointer from a bound pointer to member function
+===========================================================================
+
+In C++, pointer to member functions (PMFs) are implemented using a wide
+pointer of sorts to handle all the possible call mechanisms; the PMF
+needs to store information about how to adjust the `this' pointer, and
+if the function pointed to is virtual, where to find the vtable, and
+where in the vtable to look for the member function.  If you are using
+PMFs in an inner loop, you should really reconsider that decision.  If
+that is not an option, you can extract the pointer to the function that
+would be called for a given object/PMF pair and call it directly inside
+the inner loop, to save a bit of time.
+
+ Note that you will still be paying the penalty for the call through a
+function pointer; on most modern architectures, such a call defeats the
+branch prediction features of the CPU.  This is also true of normal
+virtual function calls.
+
+ The syntax for this extension is
+
+     extern A a;
+     extern int (A::*fp)();
+     typedef int (*fptr)(A *);
+
+     fptr p = (fptr)(a.*fp);
+
+ For PMF constants (i.e. expressions of the form `&Klasse::Member'), no
+object is needed to obtain the address of the function.  They can be
+converted to function pointers directly:
+
+     fptr p1 = (fptr)(&A::foo);
+
+ You must specify `-Wno-pmf-conversions' to use this extension.
+
+
+File: gcc.info,  Node: C++ Attributes,  Next: Namespace Association,  Prev: Bound member functions,  Up: C++ Extensions
+
+7.7 C++-Specific Variable, Function, and Type Attributes
+========================================================
+
+Some attributes only make sense for C++ programs.
+
+`init_priority (PRIORITY)'
+     In Standard C++, objects defined at namespace scope are guaranteed
+     to be initialized in an order in strict accordance with that of
+     their definitions _in a given translation unit_.  No guarantee is
+     made for initializations across translation units.  However, GNU
+     C++ allows users to control the order of initialization of objects
+     defined at namespace scope with the `init_priority' attribute by
+     specifying a relative PRIORITY, a constant integral expression
+     currently bounded between 101 and 65535 inclusive.  Lower numbers
+     indicate a higher priority.
+
+     In the following example, `A' would normally be created before
+     `B', but the `init_priority' attribute has reversed that order:
+
+          Some_Class  A  __attribute__ ((init_priority (2000)));
+          Some_Class  B  __attribute__ ((init_priority (543)));
+
+     Note that the particular values of PRIORITY do not matter; only
+     their relative ordering.
+
+`java_interface'
+     This type attribute informs C++ that the class is a Java
+     interface.  It may only be applied to classes declared within an
+     `extern "Java"' block.  Calls to methods declared in this
+     interface will be dispatched using GCJ's interface table
+     mechanism, instead of regular virtual table dispatch.
+
+
+ See also *note Namespace Association::.
+
+
+File: gcc.info,  Node: Namespace Association,  Next: Type Traits,  Prev: C++ Attributes,  Up: C++ Extensions
+
+7.8 Namespace Association
+=========================
+
+*Caution:* The semantics of this extension are not fully defined.
+Users should refrain from using this extension as its semantics may
+change subtly over time.  It is possible that this extension will be
+removed in future versions of G++.
+
+ A using-directive with `__attribute ((strong))' is stronger than a
+normal using-directive in two ways:
+
+   * Templates from the used namespace can be specialized and explicitly
+     instantiated as though they were members of the using namespace.
+
+   * The using namespace is considered an associated namespace of all
+     templates in the used namespace for purposes of argument-dependent
+     name lookup.
+
+ The used namespace must be nested within the using namespace so that
+normal unqualified lookup works properly.
+
+ This is useful for composing a namespace transparently from
+implementation namespaces.  For example:
+
+     namespace std {
+       namespace debug {
+         template <class T> struct A { };
+       }
+       using namespace debug __attribute ((__strong__));
+       template <> struct A<int> { };   // ok to specialize
+
+       template <class T> void f (A<T>);
+     }
+
+     int main()
+     {
+       f (std::A<float>());             // lookup finds std::f
+       f (std::A<int>());
+     }
+
+
+File: gcc.info,  Node: Type Traits,  Next: Java Exceptions,  Prev: Namespace Association,  Up: C++ Extensions
+
+7.9 Type Traits
+===============
+
+The C++ front-end implements syntactic extensions that allow to
+determine at compile time various characteristics of a type (or of a
+pair of types).
+
+`__has_nothrow_assign (type)'
+     If `type' is const qualified or is a reference type then the trait
+     is false.  Otherwise if `__has_trivial_assign (type)' is true then
+     the trait is true, else if `type' is a cv class or union type with
+     copy assignment operators that are known not to throw an exception
+     then the trait is true, else it is false.  Requires: `type' shall
+     be a complete type, (possibly cv-qualified) `void', or an array of
+     unknown bound.
+
+`__has_nothrow_copy (type)'
+     If `__has_trivial_copy (type)' is true then the trait is true,
+     else if `type' is a cv class or union type with copy constructors
+     that are known not to throw an exception then the trait is true,
+     else it is false.  Requires: `type' shall be a complete type,
+     (possibly cv-qualified) `void', or an array of unknown bound.
+
+`__has_nothrow_constructor (type)'
+     If `__has_trivial_constructor (type)' is true then the trait is
+     true, else if `type' is a cv class or union type (or array
+     thereof) with a default constructor that is known not to throw an
+     exception then the trait is true, else it is false.  Requires:
+     `type' shall be a complete type, (possibly cv-qualified) `void',
+     or an array of unknown bound.
+
+`__has_trivial_assign (type)'
+     If `type' is const qualified or is a reference type then the trait
+     is false.  Otherwise if `__is_pod (type)' is true then the trait is
+     true, else if `type' is a cv class or union type with a trivial
+     copy assignment ([class.copy]) then the trait is true, else it is
+     false.  Requires: `type' shall be a complete type, (possibly
+     cv-qualified) `void', or an array of unknown bound.
+
+`__has_trivial_copy (type)'
+     If `__is_pod (type)' is true or `type' is a reference type then
+     the trait is true, else if `type' is a cv class or union type with
+     a trivial copy constructor ([class.copy]) then the trait is true,
+     else it is false.  Requires: `type' shall be a complete type,
+     (possibly cv-qualified) `void', or an array of unknown bound.
+
+`__has_trivial_constructor (type)'
+     If `__is_pod (type)' is true then the trait is true, else if
+     `type' is a cv class or union type (or array thereof) with a
+     trivial default constructor ([class.ctor]) then the trait is true,
+     else it is false.  Requires: `type' shall be a complete type,
+     (possibly cv-qualified) `void', or an array of unknown bound.
+
+`__has_trivial_destructor (type)'
+     If `__is_pod (type)' is true or `type' is a reference type then
+     the trait is true, else if `type' is a cv class or union type (or
+     array thereof) with a trivial destructor ([class.dtor]) then the
+     trait is true, else it is false.  Requires: `type' shall be a
+     complete type, (possibly cv-qualified) `void', or an array of
+     unknown bound.
+
+`__has_virtual_destructor (type)'
+     If `type' is a class type with a virtual destructor ([class.dtor])
+     then the trait is true, else it is false.  Requires: `type' shall
+     be a complete type, (possibly cv-qualified) `void', or an array of
+     unknown bound.
+
+`__is_abstract (type)'
+     If `type' is an abstract class ([class.abstract]) then the trait
+     is true, else it is false.  Requires: `type' shall be a complete
+     type, (possibly cv-qualified) `void', or an array of unknown bound.
+
+`__is_base_of (base_type, derived_type)'
+     If `base_type' is a base class of `derived_type' ([class.derived])
+     then the trait is true, otherwise it is false.  Top-level cv
+     qualifications of `base_type' and `derived_type' are ignored.  For
+     the purposes of this trait, a class type is considered is own
+     base.  Requires: if `__is_class (base_type)' and `__is_class
+     (derived_type)' are true and `base_type' and `derived_type' are
+     not the same type (disregarding cv-qualifiers), `derived_type'
+     shall be a complete type.  Diagnostic is produced if this
+     requirement is not met.
+
+`__is_class (type)'
+     If `type' is a cv class type, and not a union type
+     ([basic.compound]) the trait is true, else it is false.
+
+`__is_empty (type)'
+     If `__is_class (type)' is false then the trait is false.
+     Otherwise `type' is considered empty if and only if: `type' has no
+     non-static data members, or all non-static data members, if any,
+     are bit-fields of length 0, and `type' has no virtual members, and
+     `type' has no virtual base classes, and `type' has no base classes
+     `base_type' for which `__is_empty (base_type)' is false.
+     Requires: `type' shall be a complete type, (possibly cv-qualified)
+     `void', or an array of unknown bound.
+
+`__is_enum (type)'
+     If `type' is a cv enumeration type ([basic.compound]) the trait is
+     true, else it is false.
+
+`__is_literal_type (type)'
+     If `type' is a literal type ([basic.types]) the trait is true,
+     else it is false.  Requires: `type' shall be a complete type,
+     (possibly cv-qualified) `void', or an array of unknown bound.
+
+`__is_pod (type)'
+     If `type' is a cv POD type ([basic.types]) then the trait is true,
+     else it is false.  Requires: `type' shall be a complete type,
+     (possibly cv-qualified) `void', or an array of unknown bound.
+
+`__is_polymorphic (type)'
+     If `type' is a polymorphic class ([class.virtual]) then the trait
+     is true, else it is false.  Requires: `type' shall be a complete
+     type, (possibly cv-qualified) `void', or an array of unknown bound.
+
+`__is_standard_layout (type)'
+     If `type' is a standard-layout type ([basic.types]) the trait is
+     true, else it is false.  Requires: `type' shall be a complete
+     type, (possibly cv-qualified) `void', or an array of unknown bound.
+
+`__is_trivial (type)'
+     If `type' is a trivial type ([basic.types]) the trait is true,
+     else it is false.  Requires: `type' shall be a complete type,
+     (possibly cv-qualified) `void', or an array of unknown bound.
+
+`__is_union (type)'
+     If `type' is a cv union type ([basic.compound]) the trait is true,
+     else it is false.
+
+
+
+File: gcc.info,  Node: Java Exceptions,  Next: Deprecated Features,  Prev: Type Traits,  Up: C++ Extensions
+
+7.10 Java Exceptions
+====================
+
+The Java language uses a slightly different exception handling model
+from C++.  Normally, GNU C++ will automatically detect when you are
+writing C++ code that uses Java exceptions, and handle them
+appropriately.  However, if C++ code only needs to execute destructors
+when Java exceptions are thrown through it, GCC will guess incorrectly.
+Sample problematic code is:
+
+       struct S { ~S(); };
+       extern void bar();    // is written in Java, and may throw exceptions
+       void foo()
+       {
+         S s;
+         bar();
+       }
+
+The usual effect of an incorrect guess is a link failure, complaining of
+a missing routine called `__gxx_personality_v0'.
+
+ You can inform the compiler that Java exceptions are to be used in a
+translation unit, irrespective of what it might think, by writing
+`#pragma GCC java_exceptions' at the head of the file.  This `#pragma'
+must appear before any functions that throw or catch exceptions, or run
+destructors when exceptions are thrown through them.
+
+ You cannot mix Java and C++ exceptions in the same translation unit.
+It is believed to be safe to throw a C++ exception from one file through
+another file compiled for the Java exception model, or vice versa, but
+there may be bugs in this area.
+
+
+File: gcc.info,  Node: Deprecated Features,  Next: Backwards Compatibility,  Prev: Java Exceptions,  Up: C++ Extensions
+
+7.11 Deprecated Features
+========================
+
+In the past, the GNU C++ compiler was extended to experiment with new
+features, at a time when the C++ language was still evolving.  Now that
+the C++ standard is complete, some of those features are superseded by
+superior alternatives.  Using the old features might cause a warning in
+some cases that the feature will be dropped in the future.  In other
+cases, the feature might be gone already.
+
+ While the list below is not exhaustive, it documents some of the
+options that are now deprecated:
+
+`-fexternal-templates'
+`-falt-external-templates'
+     These are two of the many ways for G++ to implement template
+     instantiation.  *Note Template Instantiation::.  The C++ standard
+     clearly defines how template definitions have to be organized
+     across implementation units.  G++ has an implicit instantiation
+     mechanism that should work just fine for standard-conforming code.
+
+`-fstrict-prototype'
+`-fno-strict-prototype'
+     Previously it was possible to use an empty prototype parameter
+     list to indicate an unspecified number of parameters (like C),
+     rather than no parameters, as C++ demands.  This feature has been
+     removed, except where it is required for backwards compatibility.
+     *Note Backwards Compatibility::.
+
+ G++ allows a virtual function returning `void *' to be overridden by
+one returning a different pointer type.  This extension to the
+covariant return type rules is now deprecated and will be removed from a
+future version.
+
+ The G++ minimum and maximum operators (`<?' and `>?') and their
+compound forms (`<?=') and `>?=') have been deprecated and are now
+removed from G++.  Code using these operators should be modified to use
+`std::min' and `std::max' instead.
+
+ The named return value extension has been deprecated, and is now
+removed from G++.
+
+ The use of initializer lists with new expressions has been deprecated,
+and is now removed from G++.
+
+ Floating and complex non-type template parameters have been deprecated,
+and are now removed from G++.
+
+ The implicit typename extension has been deprecated and is now removed
+from G++.
+
+ The use of default arguments in function pointers, function typedefs
+and other places where they are not permitted by the standard is
+deprecated and will be removed from a future version of G++.
+
+ G++ allows floating-point literals to appear in integral constant
+expressions, e.g. ` enum E { e = int(2.2 * 3.7) } ' This extension is
+deprecated and will be removed from a future version.
+
+ G++ allows static data members of const floating-point type to be
+declared with an initializer in a class definition. The standard only
+allows initializers for static members of const integral types and const
+enumeration types so this extension has been deprecated and will be
+removed from a future version.
+
+
+File: gcc.info,  Node: Backwards Compatibility,  Prev: Deprecated Features,  Up: C++ Extensions
+
+7.12 Backwards Compatibility
+============================
+
+Now that there is a definitive ISO standard C++, G++ has a specification
+to adhere to.  The C++ language evolved over time, and features that
+used to be acceptable in previous drafts of the standard, such as the
+ARM [Annotated C++ Reference Manual], are no longer accepted.  In order
+to allow compilation of C++ written to such drafts, G++ contains some
+backwards compatibilities.  _All such backwards compatibility features
+are liable to disappear in future versions of G++._ They should be
+considered deprecated.   *Note Deprecated Features::.
+
+`For scope'
+     If a variable is declared at for scope, it used to remain in scope
+     until the end of the scope which contained the for statement
+     (rather than just within the for scope).  G++ retains this, but
+     issues a warning, if such a variable is accessed outside the for
+     scope.
+
+`Implicit C language'
+     Old C system header files did not contain an `extern "C" {...}'
+     scope to set the language.  On such systems, all header files are
+     implicitly scoped inside a C language scope.  Also, an empty
+     prototype `()' will be treated as an unspecified number of
+     arguments, rather than no arguments, as C++ demands.
+
+
+File: gcc.info,  Node: Objective-C,  Next: Compatibility,  Prev: C++ Extensions,  Up: Top
+
+8 GNU Objective-C features
+**************************
+
+This document is meant to describe some of the GNU Objective-C
+features.  It is not intended to teach you Objective-C.  There are
+several resources on the Internet that present the language.
+
+* Menu:
+
+* GNU Objective-C runtime API::
+* Executing code before main::
+* Type encoding::
+* Garbage Collection::
+* Constant string objects::
+* compatibility_alias::
+* Exceptions::
+* Synchronization::
+* Fast enumeration::
+* Messaging with the GNU Objective-C runtime::
+
+
+File: gcc.info,  Node: GNU Objective-C runtime API,  Next: Executing code before main,  Up: Objective-C
+
+8.1 GNU Objective-C runtime API
+===============================
+
+This section is specific for the GNU Objective-C runtime.  If you are
+using a different runtime, you can skip it.
+
+ The GNU Objective-C runtime provides an API that allows you to
+interact with the Objective-C runtime system, querying the live runtime
+structures and even manipulating them.  This allows you for example to
+inspect and navigate classes, methods and protocols; to define new
+classes or new methods, and even to modify existing classes or
+protocols.
+
+ If you are using a "Foundation" library such as GNUstep-Base, this
+library will provide you with a rich set of functionality to do most of
+the inspection tasks, and you probably will only need direct access to
+the GNU Objective-C runtime API to define new classes or methods.
+
+* Menu:
+
+* Modern GNU Objective-C runtime API::
+* Traditional GNU Objective-C runtime API::
+
+
+File: gcc.info,  Node: Modern GNU Objective-C runtime API,  Next: Traditional GNU Objective-C runtime API,  Up: GNU Objective-C runtime API
+
+8.1.1 Modern GNU Objective-C runtime API
+----------------------------------------
+
+The GNU Objective-C runtime provides an API which is similar to the one
+provided by the "Objective-C 2.0" Apple/NeXT Objective-C runtime.  The
+API is documented in the public header files of the GNU Objective-C
+runtime:
+
+   * `objc/objc.h': this is the basic Objective-C header file, defining
+     the basic Objective-C types such as `id', `Class' and `BOOL'.  You
+     have to include this header to do almost anything with Objective-C.
+
+   * `objc/runtime.h': this header declares most of the public runtime
+     API functions allowing you to inspect and manipulate the
+     Objective-C runtime data structures.  These functions are fairly
+     standardized across Objective-C runtimes and are almost identical
+     to the Apple/NeXT Objective-C runtime ones.  It does not declare
+     functions in some specialized areas (constructing and forwarding
+     message invocations, threading) which are in the other headers
+     below.  You have to include `objc/objc.h' and `objc/runtime.h' to
+     use any of the functions, such as `class_getName()', declared in
+     `objc/runtime.h'.
+
+   * `objc/message.h': this header declares public functions used to
+     construct, deconstruct and forward message invocations.  Because
+     messaging is done in quite a different way on different runtimes,
+     functions in this header are specific to the GNU Objective-C
+     runtime implementation.
+
+   * `objc/objc-exception.h': this header declares some public
+     functions related to Objective-C exceptions.  For example
+     functions in this header allow you to throw an Objective-C
+     exception from plain C/C++ code.
+
+   * `objc/objc-sync.h': this header declares some public functions
+     related to the Objective-C `@synchronized()' syntax, allowing you
+     to emulate an Objective-C `@synchronized()' block in plain C/C++
+     code.
+
+   * `objc/thr.h': this header declares a public runtime API threading
+     layer that is only provided by the GNU Objective-C runtime.  It
+     declares functions such as `objc_mutex_lock()', which provide a
+     platform-independent set of threading functions.
+
+
+ The header files contain detailed documentation for each function in
+the GNU Objective-C runtime API.
+
+
+File: gcc.info,  Node: Traditional GNU Objective-C runtime API,  Prev: Modern GNU Objective-C runtime API,  Up: GNU Objective-C runtime API
+
+8.1.2 Traditional GNU Objective-C runtime API
+---------------------------------------------
+
+The GNU Objective-C runtime used to provide a different API, which we
+call the "traditional" GNU Objective-C runtime API.  Functions
+belonging to this API are easy to recognize because they use a
+different naming convention, such as `class_get_super_class()'
+(traditional API) instead of `class_getSuperclass()' (modern API).
+Software using this API includes the file `objc/objc-api.h' where it is
+declared.
+
+ The traditional API is deprecated but it is still supported in this
+release of the runtime; you can access it as usual by including
+`objc/objc-api.h'.
+
+ If you are using the traditional API you are urged to upgrade your
+software to use the modern API because the traditional API requires
+access to private runtime internals to do anything serious with it; for
+this reason, there is no guarantee that future releases of the GNU
+Objective-C runtime library will be able to provide a fully compatible
+`objc/objc-api.h' as the private runtime internals change.  It is
+expected that the next release will hide a number of runtime internals
+making the traditional API nominally supported but fairly useless
+beyond very simple use cases.
+
+ Finally, you can not include both `objc/objc-api.h' and
+`objc/runtime.h' at the same time.  The traditional and modern APIs
+unfortunately have some conflicting declarations (such as the one for
+`Method') and can not be used at the same time.
+
+
+File: gcc.info,  Node: Executing code before main,  Next: Type encoding,  Prev: GNU Objective-C runtime API,  Up: Objective-C
+
+8.2 `+load': Executing code before main
+=======================================
+
+This section is specific for the GNU Objective-C runtime.  If you are
+using a different runtime, you can skip it.
+
+ The GNU Objective-C runtime provides a way that allows you to execute
+code before the execution of the program enters the `main' function.
+The code is executed on a per-class and a per-category basis, through a
+special class method `+load'.
+
+ This facility is very useful if you want to initialize global variables
+which can be accessed by the program directly, without sending a message
+to the class first.  The usual way to initialize global variables, in
+the `+initialize' method, might not be useful because `+initialize' is
+only called when the first message is sent to a class object, which in
+some cases could be too late.
+
+ Suppose for example you have a `FileStream' class that declares
+`Stdin', `Stdout' and `Stderr' as global variables, like below:
+
+
+     FileStream *Stdin = nil;
+     FileStream *Stdout = nil;
+     FileStream *Stderr = nil;
+
+     @implementation FileStream
+
+     + (void)initialize
+     {
+         Stdin = [[FileStream new] initWithFd:0];
+         Stdout = [[FileStream new] initWithFd:1];
+         Stderr = [[FileStream new] initWithFd:2];
+     }
+
+     /* Other methods here */
+     @end
+
+ In this example, the initialization of `Stdin', `Stdout' and `Stderr'
+in `+initialize' occurs too late.  The programmer can send a message to
+one of these objects before the variables are actually initialized,
+thus sending messages to the `nil' object.  The `+initialize' method
+which actually initializes the global variables is not invoked until
+the first message is sent to the class object.  The solution would
+require these variables to be initialized just before entering `main'.
+
+ The correct solution of the above problem is to use the `+load' method
+instead of `+initialize':
+
+
+     @implementation FileStream
+
+     + (void)load
+     {
+         Stdin = [[FileStream new] initWithFd:0];
+         Stdout = [[FileStream new] initWithFd:1];
+         Stderr = [[FileStream new] initWithFd:2];
+     }
+
+     /* Other methods here */
+     @end
+
+ The `+load' is a method that is not overridden by categories.  If a
+class and a category of it both implement `+load', both methods are
+invoked.  This allows some additional initializations to be performed in
+a category.
+
+ This mechanism is not intended to be a replacement for `+initialize'.
+You should be aware of its limitations when you decide to use it
+instead of `+initialize'.
+
+* Menu:
+
+* What you can and what you cannot do in +load::
+
+
+File: gcc.info,  Node: What you can and what you cannot do in +load,  Up: Executing code before main
+
+8.2.1 What you can and what you cannot do in `+load'
+----------------------------------------------------
+
+`+load' is to be used only as a last resort.  Because it is executed
+very early, most of the Objective-C runtime machinery will not be ready
+when `+load' is executed; hence `+load' works best for executing C code
+that is independent on the Objective-C runtime.
+
+ The `+load' implementation in the GNU runtime guarantees you the
+following things:
+
+   * you can write whatever C code you like;
+
+   * you can allocate and send messages to objects whose class is
+     implemented in the same file;
+
+   * the `+load' implementation of all super classes of a class are
+     executed before the `+load' of that class is executed;
+
+   * the `+load' implementation of a class is executed before the
+     `+load' implementation of any category.
+
+
+ In particular, the following things, even if they can work in a
+particular case, are not guaranteed:
+
+   * allocation of or sending messages to arbitrary objects;
+
+   * allocation of or sending messages to objects whose classes have a
+     category implemented in the same file;
+
+   * sending messages to Objective-C constant strings (`@"this is a
+     constant string"');
+
+
+ You should make no assumptions about receiving `+load' in sibling
+classes when you write `+load' of a class.  The order in which sibling
+classes receive `+load' is not guaranteed.
+
+ The order in which `+load' and `+initialize' are called could be
+problematic if this matters.  If you don't allocate objects inside
+`+load', it is guaranteed that `+load' is called before `+initialize'.
+If you create an object inside `+load' the `+initialize' method of
+object's class is invoked even if `+load' was not invoked.  Note if you
+explicitly call `+load' on a class, `+initialize' will be called first.
+To avoid possible problems try to implement only one of these methods.
+
+ The `+load' method is also invoked when a bundle is dynamically loaded
+into your running program.  This happens automatically without any
+intervening operation from you.  When you write bundles and you need to
+write `+load' you can safely create and send messages to objects whose
+classes already exist in the running program.  The same restrictions as
+above apply to classes defined in bundle.
+
+
+File: gcc.info,  Node: Type encoding,  Next: Garbage Collection,  Prev: Executing code before main,  Up: Objective-C
+
+8.3 Type encoding
+=================
+
+This is an advanced section.  Type encodings are used extensively by
+the compiler and by the runtime, but you generally do not need to know
+about them to use Objective-C.
+
+ The Objective-C compiler generates type encodings for all the types.
+These type encodings are used at runtime to find out information about
+selectors and methods and about objects and classes.
+
+ The types are encoded in the following way:
+
+`_Bool'            `B'
+`char'             `c'
+`unsigned char'    `C'
+`short'            `s'
+`unsigned short'   `S'
+`int'              `i'
+`unsigned int'     `I'
+`long'             `l'
+`unsigned long'    `L'
+`long long'        `q'
+`unsigned long     `Q'
+long'              
+`float'            `f'
+`double'           `d'
+`long double'      `D'
+`void'             `v'
+`id'               `@'
+`Class'            `#'
+`SEL'              `:'
+`char*'            `*'
+`enum'             an `enum' is encoded exactly as the integer type that
+                   the compiler uses for it, which depends on the
+                   enumeration values.  Often the compiler users
+                   `unsigned int', which is then encoded as `I'.
+unknown type       `?'
+Complex types      `j' followed by the inner type.  For example
+                   `_Complex double' is encoded as "jd".
+bit-fields         `b' followed by the starting position of the
+                   bit-field, the type of the bit-field and the size of
+                   the bit-field (the bit-fields encoding was changed
+                   from the NeXT's compiler encoding, see below)
+
+ The encoding of bit-fields has changed to allow bit-fields to be
+properly handled by the runtime functions that compute sizes and
+alignments of types that contain bit-fields.  The previous encoding
+contained only the size of the bit-field.  Using only this information
+it is not possible to reliably compute the size occupied by the
+bit-field.  This is very important in the presence of the Boehm's
+garbage collector because the objects are allocated using the typed
+memory facility available in this collector.  The typed memory
+allocation requires information about where the pointers are located
+inside the object.
+
+ The position in the bit-field is the position, counting in bits, of the
+bit closest to the beginning of the structure.
+
+ The non-atomic types are encoded as follows:
+
+pointers       `^' followed by the pointed type.
+arrays         `[' followed by the number of elements in the array
+               followed by the type of the elements followed by `]'
+structures     `{' followed by the name of the structure (or `?' if the
+               structure is unnamed), the `=' sign, the type of the
+               members and by `}'
+unions         `(' followed by the name of the structure (or `?' if the
+               union is unnamed), the `=' sign, the type of the members
+               followed by `)'
+vectors        `![' followed by the vector_size (the number of bytes
+               composing the vector) followed by a comma, followed by
+               the alignment (in bytes) of the vector, followed by the
+               type of the elements followed by `]'
+
+ Here are some types and their encodings, as they are generated by the
+compiler on an i386 machine:
+
+
+Objective-C type   Compiler encoding
+     int a[10];    `[10i]'
+     struct {      `{?=i[3f]b128i3b131i2c}'
+       int i;      
+       float f[3]; 
+       int a:3;    
+       int b:2;    
+       char c;     
+     }             
+     int a __attribute__ ((vector_size (16)));`![16,16i]' (alignment would depend on the machine)
+
+
+ In addition to the types the compiler also encodes the type
+specifiers.  The table below describes the encoding of the current
+Objective-C type specifiers:
+
+
+Specifier          Encoding
+`const'            `r'
+`in'               `n'
+`inout'            `N'
+`out'              `o'
+`bycopy'           `O'
+`byref'            `R'
+`oneway'           `V'
+
+
+ The type specifiers are encoded just before the type.  Unlike types
+however, the type specifiers are only encoded when they appear in method
+argument types.
+
+ Note how `const' interacts with pointers:
+
+
+Objective-C type   Compiler encoding
+     const int     `ri'
+     const int*    `^ri'
+     int *const    `r^i'
+
+
+ `const int*' is a pointer to a `const int', and so is encoded as
+`^ri'.  `int* const', instead, is a `const' pointer to an `int', and so
+is encoded as `r^i'.
+
+ Finally, there is a complication when encoding `const char *' versus
+`char * const'.  Because `char *' is encoded as `*' and not as `^c',
+there is no way to express the fact that `r' applies to the pointer or
+to the pointee.
+
+ Hence, it is assumed as a convention that `r*' means `const char *'
+(since it is what is most often meant), and there is no way to encode
+`char *const'.  `char *const' would simply be encoded as `*', and the
+`const' is lost.
+
+* Menu:
+
+* Legacy type encoding::
+* @encode::
+* Method signatures::
+
+
+File: gcc.info,  Node: Legacy type encoding,  Next: @encode,  Up: Type encoding
+
+8.3.1 Legacy type encoding
+--------------------------
+
+Unfortunately, historically GCC used to have a number of bugs in its
+encoding code.  The NeXT runtime expects GCC to emit type encodings in
+this historical format (compatible with GCC-3.3), so when using the
+NeXT runtime, GCC will introduce on purpose a number of incorrect
+encodings:
+
+   * the read-only qualifier of the pointee gets emitted before the '^'.
+     The read-only qualifier of the pointer itself gets ignored, unless
+     it is a typedef.  Also, the 'r' is only emitted for the outermost
+     type.
+
+   * 32-bit longs are encoded as 'l' or 'L', but not always.  For
+     typedefs, the compiler uses 'i' or 'I' instead if encoding a
+     struct field or a pointer.
+
+   * `enum's are always encoded as 'i' (int) even if they are actually
+     unsigned or long.
+
+
+ In addition to that, the NeXT runtime uses a different encoding for
+bitfields.  It encodes them as `b' followed by the size, without a bit
+offset or the underlying field type.
+
+
+File: gcc.info,  Node: @encode,  Next: Method signatures,  Prev: Legacy type encoding,  Up: Type encoding
+
+8.3.2 @encode
+-------------
+
+GNU Objective-C supports the `@encode' syntax that allows you to create
+a type encoding from a C/Objective-C type.  For example, `@encode(int)'
+is compiled by the compiler into `"i"'.
+
+ `@encode' does not support type qualifiers other than `const'.  For
+example, `@encode(const char*)' is valid and is compiled into `"r*"',
+while `@encode(bycopy char *)' is invalid and will cause a compilation
+error.
+
+
+File: gcc.info,  Node: Method signatures,  Prev: @encode,  Up: Type encoding
+
+8.3.3 Method signatures
+-----------------------
+
+This section documents the encoding of method types, which is rarely
+needed to use Objective-C.  You should skip it at a first reading; the
+runtime provides functions that will work on methods and can walk
+through the list of parameters and interpret them for you.  These
+functions are part of the public "API" and are the preferred way to
+interact with method signatures from user code.
+
+ But if you need to debug a problem with method signatures and need to
+know how they are implemented (i.e., the "ABI"), read on.
+
+ Methods have their "signature" encoded and made available to the
+runtime.  The "signature" encodes all the information required to
+dynamically build invocations of the method at runtime: return type and
+arguments.
+
+ The "signature" is a null-terminated string, composed of the following:
+
+   * The return type, including type qualifiers.  For example, a method
+     returning `int' would have `i' here.
+
+   * The total size (in bytes) required to pass all the parameters.
+     This includes the two hidden parameters (the object `self' and the
+     method selector `_cmd').
+
+   * Each argument, with the type encoding, followed by the offset (in
+     bytes) of the argument in the list of parameters.
+
+
+ For example, a method with no arguments and returning `int' would have
+the signature `i8@0:4' if the size of a pointer is 4.  The signature is
+interpreted as follows: the `i' is the return type (an `int'), the `8'
+is the total size of the parameters in bytes (two pointers each of size
+4), the `@0' is the first parameter (an object at byte offset `0') and
+`:4' is the second parameter (a `SEL' at byte offset `4').
+
+ You can easily find more examples by running the "strings" program on
+an Objective-C object file compiled by GCC.  You'll see a lot of
+strings that look very much like `i8@0:4'.  They are signatures of
+Objective-C methods.
+
+
+File: gcc.info,  Node: Garbage Collection,  Next: Constant string objects,  Prev: Type encoding,  Up: Objective-C
+
+8.4 Garbage Collection
+======================
+
+This section is specific for the GNU Objective-C runtime.  If you are
+using a different runtime, you can skip it.
+
+ Support for garbage collection with the GNU runtime has been added by
+using a powerful conservative garbage collector, known as the
+Boehm-Demers-Weiser conservative garbage collector.
+
+ To enable the support for it you have to configure the compiler using
+an additional argument, `--enable-objc-gc'.  This will build the
+boehm-gc library, and build an additional runtime library which has
+several enhancements to support the garbage collector.  The new library
+has a new name, `libobjc_gc.a' to not conflict with the
+non-garbage-collected library.
+
+ When the garbage collector is used, the objects are allocated using the
+so-called typed memory allocation mechanism available in the
+Boehm-Demers-Weiser collector.  This mode requires precise information
+on where pointers are located inside objects.  This information is
+computed once per class, immediately after the class has been
+initialized.
+
+ There is a new runtime function `class_ivar_set_gcinvisible()' which
+can be used to declare a so-called "weak pointer" reference.  Such a
+pointer is basically hidden for the garbage collector; this can be
+useful in certain situations, especially when you want to keep track of
+the allocated objects, yet allow them to be collected.  This kind of
+pointers can only be members of objects, you cannot declare a global
+pointer as a weak reference.  Every type which is a pointer type can be
+declared a weak pointer, including `id', `Class' and `SEL'.
+
+ Here is an example of how to use this feature.  Suppose you want to
+implement a class whose instances hold a weak pointer reference; the
+following class does this:
+
+
+     @interface WeakPointer : Object
+     {
+         const void* weakPointer;
+     }
+
+     - initWithPointer:(const void*)p;
+     - (const void*)weakPointer;
+     @end
+
+
+     @implementation WeakPointer
+
+     + (void)initialize
+     {
+       class_ivar_set_gcinvisible (self, "weakPointer", YES);
+     }
+
+     - initWithPointer:(const void*)p
+     {
+       weakPointer = p;
+       return self;
+     }
+
+     - (const void*)weakPointer
+     {
+       return weakPointer;
+     }
+
+     @end
+
+ Weak pointers are supported through a new type character specifier
+represented by the `!' character.  The `class_ivar_set_gcinvisible()'
+function adds or removes this specifier to the string type description
+of the instance variable named as argument.
+
+
+File: gcc.info,  Node: Constant string objects,  Next: compatibility_alias,  Prev: Garbage Collection,  Up: Objective-C
+
+8.5 Constant string objects
+===========================
+
+GNU Objective-C provides constant string objects that are generated
+directly by the compiler.  You declare a constant string object by
+prefixing a C constant string with the character `@':
+
+       id myString = @"this is a constant string object";
+
+ The constant string objects are by default instances of the
+`NXConstantString' class which is provided by the GNU Objective-C
+runtime.  To get the definition of this class you must include the
+`objc/NXConstStr.h' header file.
+
+ User defined libraries may want to implement their own constant string
+class.  To be able to support them, the GNU Objective-C compiler
+provides a new command line options
+`-fconstant-string-class=CLASS-NAME'.  The provided class should adhere
+to a strict structure, the same as `NXConstantString''s structure:
+
+
+     @interface MyConstantStringClass
+     {
+       Class isa;
+       char *c_string;
+       unsigned int len;
+     }
+     @end
+
+ `NXConstantString' inherits from `Object'; user class libraries may
+choose to inherit the customized constant string class from a different
+class than `Object'.  There is no requirement in the methods the
+constant string class has to implement, but the final ivar layout of
+the class must be the compatible with the given structure.
+
+ When the compiler creates the statically allocated constant string
+object, the `c_string' field will be filled by the compiler with the
+string; the `length' field will be filled by the compiler with the
+string length; the `isa' pointer will be filled with `NULL' by the
+compiler, and it will later be fixed up automatically at runtime by the
+GNU Objective-C runtime library to point to the class which was set by
+the `-fconstant-string-class' option when the object file is loaded (if
+you wonder how it works behind the scenes, the name of the class to
+use, and the list of static objects to fixup, are stored by the
+compiler in the object file in a place where the GNU runtime library
+will find them at runtime).
+
+ As a result, when a file is compiled with the
+`-fconstant-string-class' option, all the constant string objects will
+be instances of the class specified as argument to this option.  It is
+possible to have multiple compilation units referring to different
+constant string classes, neither the compiler nor the linker impose any
+restrictions in doing this.
+
+
+File: gcc.info,  Node: compatibility_alias,  Next: Exceptions,  Prev: Constant string objects,  Up: Objective-C
+
+8.6 compatibility_alias
+=======================
+
+The keyword `@compatibility_alias' allows you to define a class name as
+equivalent to another class name.  For example:
+
+     @compatibility_alias WOApplication GSWApplication;
+
+ tells the compiler that each time it encounters `WOApplication' as a
+class name, it should replace it with `GSWApplication' (that is,
+`WOApplication' is just an alias for `GSWApplication').
+
+ There are some constraints on how this can be used--
+
+   * `WOApplication' (the alias) must not be an existing class;
+
+   * `GSWApplication' (the real class) must be an existing class.
+
+
+
+File: gcc.info,  Node: Exceptions,  Next: Synchronization,  Prev: compatibility_alias,  Up: Objective-C
+
+8.7 Exceptions
+==============
+
+GNU Objective-C provides exception support built into the language, as
+in the following example:
+
+       @try {
+         ...
+            @throw expr;
+         ...
+       }
+       @catch (AnObjCClass *exc) {
+         ...
+           @throw expr;
+         ...
+           @throw;
+         ...
+       }
+       @catch (AnotherClass *exc) {
+         ...
+       }
+       @catch (id allOthers) {
+         ...
+       }
+       @finally {
+         ...
+           @throw expr;
+         ...
+       }
+
+ The `@throw' statement may appear anywhere in an Objective-C or
+Objective-C++ program; when used inside of a `@catch' block, the
+`@throw' may appear without an argument (as shown above), in which case
+the object caught by the `@catch' will be rethrown.
+
+ Note that only (pointers to) Objective-C objects may be thrown and
+caught using this scheme.  When an object is thrown, it will be caught
+by the nearest `@catch' clause capable of handling objects of that
+type, analogously to how `catch' blocks work in C++ and Java.  A
+`@catch(id ...)' clause (as shown above) may also be provided to catch
+any and all Objective-C exceptions not caught by previous `@catch'
+clauses (if any).
+
+ The `@finally' clause, if present, will be executed upon exit from the
+immediately preceding `@try ... @catch' section.  This will happen
+regardless of whether any exceptions are thrown, caught or rethrown
+inside the `@try ... @catch' section, analogously to the behavior of
+the `finally' clause in Java.
+
+ There are several caveats to using the new exception mechanism:
+
+   * The `-fobjc-exceptions' command line option must be used when
+     compiling Objective-C files that use exceptions.
+
+   * With the GNU runtime, exceptions are always implemented as "native"
+     exceptions and it is recommended that the `-fexceptions' and
+     `-shared-libgcc' options are used when linking.
+
+   * With the NeXT runtime, although currently designed to be binary
+     compatible with `NS_HANDLER'-style idioms provided by the
+     `NSException' class, the new exceptions can only be used on Mac OS
+     X 10.3 (Panther) and later systems, due to additional functionality
+     needed in the NeXT Objective-C runtime.
+
+   * As mentioned above, the new exceptions do not support handling
+     types other than Objective-C objects.   Furthermore, when used from
+     Objective-C++, the Objective-C exception model does not
+     interoperate with C++ exceptions at this time.  This means you
+     cannot `@throw' an exception from Objective-C and `catch' it in
+     C++, or vice versa (i.e., `throw ... @catch').
+
+
+File: gcc.info,  Node: Synchronization,  Next: Fast enumeration,  Prev: Exceptions,  Up: Objective-C
+
+8.8 Synchronization
+===================
+
+GNU Objective-C provides support for synchronized blocks:
+
+       @synchronized (ObjCClass *guard) {
+         ...
+       }
+
+ Upon entering the `@synchronized' block, a thread of execution shall
+first check whether a lock has been placed on the corresponding `guard'
+object by another thread.  If it has, the current thread shall wait
+until the other thread relinquishes its lock.  Once `guard' becomes
+available, the current thread will place its own lock on it, execute
+the code contained in the `@synchronized' block, and finally relinquish
+the lock (thereby making `guard' available to other threads).
+
+ Unlike Java, Objective-C does not allow for entire methods to be
+marked `@synchronized'.  Note that throwing exceptions out of
+`@synchronized' blocks is allowed, and will cause the guarding object
+to be unlocked properly.
+
+ Because of the interactions between synchronization and exception
+handling, you can only use `@synchronized' when compiling with
+exceptions enabled, that is with the command line option
+`-fobjc-exceptions'.
+
+
+File: gcc.info,  Node: Fast enumeration,  Next: Messaging with the GNU Objective-C runtime,  Prev: Synchronization,  Up: Objective-C
+
+8.9 Fast enumeration
+====================
+
+* Menu:
+
+* Using fast enumeration::
+* c99-like fast enumeration syntax::
+* Fast enumeration details::
+* Fast enumeration protocol::
+
+
+File: gcc.info,  Node: Using fast enumeration,  Next: c99-like fast enumeration syntax,  Up: Fast enumeration
+
+8.9.1 Using fast enumeration
+----------------------------
+
+GNU Objective-C provides support for the fast enumeration syntax:
+
+       id array = ...;
+       id object;
+
+       for (object in array)
+       {
+         /* Do something with 'object' */
+       }
+
+ `array' needs to be an Objective-C object (usually a collection
+object, for example an array, a dictionary or a set) which implements
+the "Fast Enumeration Protocol" (see below).  If you are using a
+Foundation library such as GNUstep Base or Apple Cocoa Foundation, all
+collection objects in the library implement this protocol and can be
+used in this way.
+
+ The code above would iterate over all objects in `array'.  For each of
+them, it assigns it to `object', then executes the `Do something with
+'object'' statements.
+
+ Here is a fully worked-out example using a Foundation library (which
+provides the implementation of `NSArray', `NSString' and `NSLog'):
+
+       NSArray *array = [NSArray arrayWithObjects: @"1", @"2", @"3", nil];
+       NSString *object;
+
+       for (object in array)
+         NSLog (@"Iterating over %@", object);
+
+
+File: gcc.info,  Node: c99-like fast enumeration syntax,  Next: Fast enumeration details,  Prev: Using fast enumeration,  Up: Fast enumeration
+
+8.9.2 c99-like fast enumeration syntax
+--------------------------------------
+
+A c99-like declaration syntax is also allowed:
+
+       id array = ...;
+
+       for (id object in array)
+       {
+         /* Do something with 'object'  */
+       }
+
+ this is completely equivalent to:
+
+       id array = ...;
+
+       {
+         id object;
+         for (object in array)
+         {
+           /* Do something with 'object'  */
+         }
+       }
+
+ but can save some typing.
+
+ Note that the option `-std=c99' is not required to allow this syntax
+in Objective-C.
+
+
+File: gcc.info,  Node: Fast enumeration details,  Next: Fast enumeration protocol,  Prev: c99-like fast enumeration syntax,  Up: Fast enumeration
+
+8.9.3 Fast enumeration details
+------------------------------
+
+Here is a more technical description with the gory details.  Consider
+the code
+
+       for (OBJECT EXPRESSION in COLLECTION EXPRESSION)
+       {
+         STATEMENTS
+       }
+
+ here is what happens when you run it:
+
+   * `COLLECTION EXPRESSION' is evaluated exactly once and the result
+     is used as the collection object to iterate over.  This means it
+     is safe to write code such as `for (object in [NSDictionary
+     keyEnumerator]) ...'.
+
+   * the iteration is implemented by the compiler by repeatedly getting
+     batches of objects from the collection object using the fast
+     enumeration protocol (see below), then iterating over all objects
+     in the batch.  This is faster than a normal enumeration where
+     objects are retrieved one by one (hence the name "fast
+     enumeration").
+
+   * if there are no objects in the collection, then `OBJECT
+     EXPRESSION' is set to `nil' and the loop immediately terminates.
+
+   * if there are objects in the collection, then for each object in the
+     collection (in the order they are returned) `OBJECT EXPRESSION' is
+     set to the object, then `STATEMENTS' are executed.
+
+   * `STATEMENTS' can contain `break' and `continue' commands, which
+     will abort the iteration or skip to the next loop iteration as
+     expected.
+
+   * when the iteration ends because there are no more objects to
+     iterate over, `OBJECT EXPRESSION' is set to `nil'.  This allows
+     you to determine whether the iteration finished because a `break'
+     command was used (in which case `OBJECT EXPRESSION' will remain
+     set to the last object that was iterated over) or because it
+     iterated over all the objects (in which case `OBJECT EXPRESSION'
+     will be set to `nil').
+
+   * `STATEMENTS' must not make any changes to the collection object;
+     if they do, it is a hard error and the fast enumeration terminates
+     by invoking `objc_enumerationMutation', a runtime function that
+     normally aborts the program but which can be customized by
+     Foundation libraries via `objc_set_mutation_handler' to do
+     something different, such as raising an exception.
+
+
+
+File: gcc.info,  Node: Fast enumeration protocol,  Prev: Fast enumeration details,  Up: Fast enumeration
+
+8.9.4 Fast enumeration protocol
+-------------------------------
+
+If you want your own collection object to be usable with fast
+enumeration, you need to have it implement the method
+
+     - (unsigned long) countByEnumeratingWithState: (NSFastEnumerationState *)state
+                                           objects: (id *)objects
+                                             count: (unsigned long)len;
+
+ where `NSFastEnumerationState' must be defined in your code as follows:
+
+     typedef struct
+     {
+       unsigned long state;
+       id            *itemsPtr;
+       unsigned long *mutationsPtr;
+       unsigned long extra[5];
+     } NSFastEnumerationState;
+
+ If no `NSFastEnumerationState' is defined in your code, the compiler
+will automatically replace `NSFastEnumerationState *' with `struct
+__objcFastEnumerationState *', where that type is silently defined by
+the compiler in an identical way.  This can be confusing and we
+recommend that you define `NSFastEnumerationState' (as shown above)
+instead.
+
+ The method is called repeatedly during a fast enumeration to retrieve
+batches of objects.  Each invocation of the method should retrieve the
+next batch of objects.
+
+ The return value of the method is the number of objects in the current
+batch; this should not exceed `len', which is the maximum size of a
+batch as requested by the caller.  The batch itself is returned in the
+`itemsPtr' field of the `NSFastEnumerationState' struct.
+
+ To help with returning the objects, the `objects' array is a C array
+preallocated by the caller (on the stack) of size `len'.  In many cases
+you can put the objects you want to return in that `objects' array,
+then do `itemsPtr = objects'.  But you don't have to; if your
+collection already has the objects to return in some form of C array,
+it could return them from there instead.
+
+ The `state' and `extra' fields of the `NSFastEnumerationState'
+structure allows your collection object to keep track of the state of
+the enumeration.  In a simple array implementation, `state' may keep
+track of the index of the last object that was returned, and `extra'
+may be unused.
+
+ The `mutationsPtr' field of the `NSFastEnumerationState' is used to
+keep track of mutations.  It should point to a number; before working
+on each object, the fast enumeration loop will check that this number
+has not changed.  If it has, a mutation has happened and the fast
+enumeration will abort.  So, `mutationsPtr' could be set to point to
+some sort of version number of your collection, which is increased by
+one every time there is a change (for example when an object is added
+or removed).  Or, if you are content with less strict mutation checks,
+it could point to the number of objects in your collection or some
+other value that can be checked to perform an approximate check that
+the collection has not been mutated.
+
+ Finally, note how we declared the `len' argument and the return value
+to be of type `unsigned long'.  They could also be declared to be of
+type `unsigned int' and everything would still work.
+
+
+File: gcc.info,  Node: Messaging with the GNU Objective-C runtime,  Prev: Fast enumeration,  Up: Objective-C
+
+8.10 Messaging with the GNU Objective-C runtime
+===============================================
+
+This section is specific for the GNU Objective-C runtime.  If you are
+using a different runtime, you can skip it.
+
+ The implementation of messaging in the GNU Objective-C runtime is
+designed to be portable, and so is based on standard C.
+
+ Sending a message in the GNU Objective-C runtime is composed of two
+separate steps.  First, there is a call to the lookup function,
+`objc_msg_lookup ()' (or, in the case of messages to super,
+`objc_msg_lookup_super ()').  This runtime function takes as argument
+the receiver and the selector of the method to be called; it returns
+the `IMP', that is a pointer to the function implementing the method.
+The second step of method invocation consists of casting this pointer
+function to the appropriate function pointer type, and calling the
+function pointed to it with the right arguments.
+
+ For example, when the compiler encounters a method invocation such as
+`[object init]', it compiles it into a call to `objc_msg_lookup
+(object, @selector(init))' followed by a cast of the returned value to
+the appropriate function pointer type, and then it calls it.
+
+* Menu:
+
+* Dynamically registering methods::
+* Forwarding hook::
+
+
+File: gcc.info,  Node: Dynamically registering methods,  Next: Forwarding hook,  Up: Messaging with the GNU Objective-C runtime
+
+8.10.1 Dynamically registering methods
+--------------------------------------
+
+If `objc_msg_lookup()' does not find a suitable method implementation,
+because the receiver does not implement the required method, it tries
+to see if the class can dynamically register the method.
+
+ To do so, the runtime checks if the class of the receiver implements
+the method
+
+     + (BOOL) resolveInstanceMethod: (SEL)selector;
+
+ in the case of an instance method, or
+
+     + (BOOL) resolveClassMethod: (SEL)selector;
+
+ in the case of a class method.  If the class implements it, the
+runtime invokes it, passing as argument the selector of the original
+method, and if it returns `YES', the runtime tries the lookup again,
+which could now succeed if a matching method was added dynamically by
+`+resolveInstanceMethod:' or `+resolveClassMethod:'.
+
+ This allows classes to dynamically register methods (by adding them to
+the class using `class_addMethod') when they are first called.  To do
+so, a class should implement `+resolveInstanceMethod:' (or, depending
+on the case, `+resolveClassMethod:') and have it recognize the
+selectors of methods that can be registered dynamically at runtime,
+register them, and return `YES'.  It should return `NO' for methods
+that it does not dynamically registered at runtime.
+
+ If `+resolveInstanceMethod:' (or `+resolveClassMethod:') is not
+implemented or returns `NO', the runtime then tries the forwarding hook.
+
+ Support for `+resolveInstanceMethod:' and `resolveClassMethod:' was
+added to the GNU Objective-C runtime in GCC version 4.6.
+
+
+File: gcc.info,  Node: Forwarding hook,  Prev: Dynamically registering methods,  Up: Messaging with the GNU Objective-C runtime
+
+8.10.2 Forwarding hook
+----------------------
+
+The GNU Objective-C runtime provides a hook, called
+`__objc_msg_forward2', which is called by `objc_msg_lookup()' when it
+can't find a method implementation in the runtime tables and after
+calling `+resolveInstanceMethod:' and `+resolveClassMethod:' has been
+attempted and did not succeed in dynamically registering the method.
+
+ To configure the hook, you set the global variable
+`__objc_msg_foward2' to a function with the same argument and return
+types of `objc_msg_lookup()'.  When `objc_msg_lookup()' can not find a
+method implementation, it invokes the hook function you provided to get
+a method implementation to return.  So, in practice
+`__objc_msg_forward2' allows you to extend `objc_msg_lookup()' by
+adding some custom code that is called to do a further lookup when no
+standard method implementation can be found using the normal lookup.
+
+ This hook is generally reserved for "Foundation" libraries such as
+GNUstep Base, which use it to implement their high-level method
+forwarding API, typically based around the `forwardInvocation:' method.
+So, unless you are implementing your own "Foundation" library, you
+should not set this hook.
+
+ In a typical forwarding implementation, the `__objc_msg_forward2' hook
+function determines the argument and return type of the method that is
+being looked up, and then creates a function that takes these arguments
+and has that return type, and returns it to the caller.  Creating this
+function is non-trivial and is typically performed using a dedicated
+library such as `libffi'.
+
+ The forwarding method implementation thus created is returned by
+`objc_msg_lookup()' and is executed as if it was a normal method
+implementation.  When the forwarding method implementation is called,
+it is usually expected to pack all arguments into some sort of object
+(typically, an `NSInvocation' in a "Foundation" library), and hand it
+over to the programmer (`forwardInvocation:') who is then allowed to
+manipulate the method invocation using a high-level API provided by the
+"Foundation" library.  For example, the programmer may want to examine
+the method invocation arguments and name and potentially change them
+before forwarding the method invocation to one or more local objects
+(`performInvocation:') or even to remote objects (by using Distributed
+Objects or some other mechanism).  When all this completes, the return
+value is passed back and must be returned correctly to the original
+caller.
+
+ Note that the GNU Objective-C runtime currently provides no support
+for method forwarding or method invocations other than the
+`__objc_msg_forward2' hook.
+
+ If the forwarding hook does not exist or returns `NULL', the runtime
+currently attempts forwarding using an older, deprecated API, and if
+that fails, it aborts the program.  In future versions of the GNU
+Objective-C runtime, the runtime will immediately abort.
+
+
+File: gcc.info,  Node: Compatibility,  Next: Gcov,  Prev: Objective-C,  Up: Top
+
+9 Binary Compatibility
+**********************
+
+Binary compatibility encompasses several related concepts:
+
+"application binary interface (ABI)"
+     The set of runtime conventions followed by all of the tools that
+     deal with binary representations of a program, including
+     compilers, assemblers, linkers, and language runtime support.
+     Some ABIs are formal with a written specification, possibly
+     designed by multiple interested parties.  Others are simply the
+     way things are actually done by a particular set of tools.
+
+"ABI conformance"
+     A compiler conforms to an ABI if it generates code that follows
+     all of the specifications enumerated by that ABI.  A library
+     conforms to an ABI if it is implemented according to that ABI.  An
+     application conforms to an ABI if it is built using tools that
+     conform to that ABI and does not contain source code that
+     specifically changes behavior specified by the ABI.
+
+"calling conventions"
+     Calling conventions are a subset of an ABI that specify of how
+     arguments are passed and function results are returned.
+
+"interoperability"
+     Different sets of tools are interoperable if they generate files
+     that can be used in the same program.  The set of tools includes
+     compilers, assemblers, linkers, libraries, header files, startup
+     files, and debuggers.  Binaries produced by different sets of
+     tools are not interoperable unless they implement the same ABI.
+     This applies to different versions of the same tools as well as
+     tools from different vendors.
+
+"intercallability"
+     Whether a function in a binary built by one set of tools can call a
+     function in a binary built by a different set of tools is a subset
+     of interoperability.
+
+"implementation-defined features"
+     Language standards include lists of implementation-defined
+     features whose behavior can vary from one implementation to
+     another.  Some of these features are normally covered by a
+     platform's ABI and others are not.  The features that are not
+     covered by an ABI generally affect how a program behaves, but not
+     intercallability.
+
+"compatibility"
+     Conformance to the same ABI and the same behavior of
+     implementation-defined features are both relevant for
+     compatibility.
+
+ The application binary interface implemented by a C or C++ compiler
+affects code generation and runtime support for:
+
+   * size and alignment of data types
+
+   * layout of structured types
+
+   * calling conventions
+
+   * register usage conventions
+
+   * interfaces for runtime arithmetic support
+
+   * object file formats
+
+ In addition, the application binary interface implemented by a C++
+compiler affects code generation and runtime support for:
+   * name mangling
+
+   * exception handling
+
+   * invoking constructors and destructors
+
+   * layout, alignment, and padding of classes
+
+   * layout and alignment of virtual tables
+
+ Some GCC compilation options cause the compiler to generate code that
+does not conform to the platform's default ABI.  Other options cause
+different program behavior for implementation-defined features that are
+not covered by an ABI.  These options are provided for consistency with
+other compilers that do not follow the platform's default ABI or the
+usual behavior of implementation-defined features for the platform.  Be
+very careful about using such options.
+
+ Most platforms have a well-defined ABI that covers C code, but ABIs
+that cover C++ functionality are not yet common.
+
+ Starting with GCC 3.2, GCC binary conventions for C++ are based on a
+written, vendor-neutral C++ ABI that was designed to be specific to
+64-bit Itanium but also includes generic specifications that apply to
+any platform.  This C++ ABI is also implemented by other compiler
+vendors on some platforms, notably GNU/Linux and BSD systems.  We have
+tried hard to provide a stable ABI that will be compatible with future
+GCC releases, but it is possible that we will encounter problems that
+make this difficult.  Such problems could include different
+interpretations of the C++ ABI by different vendors, bugs in the ABI, or
+bugs in the implementation of the ABI in different compilers.  GCC's
+`-Wabi' switch warns when G++ generates code that is probably not
+compatible with the C++ ABI.
+
+ The C++ library used with a C++ compiler includes the Standard C++
+Library, with functionality defined in the C++ Standard, plus language
+runtime support.  The runtime support is included in a C++ ABI, but
+there is no formal ABI for the Standard C++ Library.  Two
+implementations of that library are interoperable if one follows the
+de-facto ABI of the other and if they are both built with the same
+compiler, or with compilers that conform to the same ABI for C++
+compiler and runtime support.
+
+ When G++ and another C++ compiler conform to the same C++ ABI, but the
+implementations of the Standard C++ Library that they normally use do
+not follow the same ABI for the Standard C++ Library, object files
+built with those compilers can be used in the same program only if they
+use the same C++ library.  This requires specifying the location of the
+C++ library header files when invoking the compiler whose usual library
+is not being used.  The location of GCC's C++ header files depends on
+how the GCC build was configured, but can be seen by using the G++ `-v'
+option.  With default configuration options for G++ 3.3 the compile
+line for a different C++ compiler needs to include
+
+         -IGCC_INSTALL_DIRECTORY/include/c++/3.3
+
+ Similarly, compiling code with G++ that must use a C++ library other
+than the GNU C++ library requires specifying the location of the header
+files for that other library.
+
+ The most straightforward way to link a program to use a particular C++
+library is to use a C++ driver that specifies that C++ library by
+default.  The `g++' driver, for example, tells the linker where to find
+GCC's C++ library (`libstdc++') plus the other libraries and startup
+files it needs, in the proper order.
+
+ If a program must use a different C++ library and it's not possible to
+do the final link using a C++ driver that uses that library by default,
+it is necessary to tell `g++' the location and name of that library.
+It might also be necessary to specify different startup files and other
+runtime support libraries, and to suppress the use of GCC's support
+libraries with one or more of the options `-nostdlib', `-nostartfiles',
+and `-nodefaultlibs'.
+
+
+File: gcc.info,  Node: Gcov,  Next: Trouble,  Prev: Compatibility,  Up: Top
+
+10 `gcov'--a Test Coverage Program
+**********************************
+
+`gcov' is a tool you can use in conjunction with GCC to test code
+coverage in your programs.
+
+* Menu:
+
+* Gcov Intro::                  Introduction to gcov.
+* Invoking Gcov::               How to use gcov.
+* Gcov and Optimization::       Using gcov with GCC optimization.
+* Gcov Data Files::             The files used by gcov.
+* Cross-profiling::             Data file relocation.
+
+
+File: gcc.info,  Node: Gcov Intro,  Next: Invoking Gcov,  Up: Gcov
+
+10.1 Introduction to `gcov'
+===========================
+
+`gcov' is a test coverage program.  Use it in concert with GCC to
+analyze your programs to help create more efficient, faster running
+code and to discover untested parts of your program.  You can use
+`gcov' as a profiling tool to help discover where your optimization
+efforts will best affect your code.  You can also use `gcov' along with
+the other profiling tool, `gprof', to assess which parts of your code
+use the greatest amount of computing time.
+
+ Profiling tools help you analyze your code's performance.  Using a
+profiler such as `gcov' or `gprof', you can find out some basic
+performance statistics, such as:
+
+   * how often each line of code executes
+
+   * what lines of code are actually executed
+
+   * how much computing time each section of code uses
+
+ Once you know these things about how your code works when compiled, you
+can look at each module to see which modules should be optimized.
+`gcov' helps you determine where to work on optimization.
+
+ Software developers also use coverage testing in concert with
+testsuites, to make sure software is actually good enough for a release.
+Testsuites can verify that a program works as expected; a coverage
+program tests to see how much of the program is exercised by the
+testsuite.  Developers can then determine what kinds of test cases need
+to be added to the testsuites to create both better testing and a better
+final product.
+
+ You should compile your code without optimization if you plan to use
+`gcov' because the optimization, by combining some lines of code into
+one function, may not give you as much information as you need to look
+for `hot spots' where the code is using a great deal of computer time.
+Likewise, because `gcov' accumulates statistics by line (at the lowest
+resolution), it works best with a programming style that places only
+one statement on each line.  If you use complicated macros that expand
+to loops or to other control structures, the statistics are less
+helpful--they only report on the line where the macro call appears.  If
+your complex macros behave like functions, you can replace them with
+inline functions to solve this problem.
+
+ `gcov' creates a logfile called `SOURCEFILE.gcov' which indicates how
+many times each line of a source file `SOURCEFILE.c' has executed.  You
+can use these logfiles along with `gprof' to aid in fine-tuning the
+performance of your programs.  `gprof' gives timing information you can
+use along with the information you get from `gcov'.
+
+ `gcov' works only on code compiled with GCC.  It is not compatible
+with any other profiling or test coverage mechanism.
+
+
+File: gcc.info,  Node: Invoking Gcov,  Next: Gcov and Optimization,  Prev: Gcov Intro,  Up: Gcov
+
+10.2 Invoking `gcov'
+====================
+
+     gcov [OPTIONS] SOURCEFILES
+
+ `gcov' accepts the following options:
+
+`-h'
+`--help'
+     Display help about using `gcov' (on the standard output), and exit
+     without doing any further processing.
+
+`-v'
+`--version'
+     Display the `gcov' version number (on the standard output), and
+     exit without doing any further processing.
+
+`-a'
+`--all-blocks'
+     Write individual execution counts for every basic block.  Normally
+     gcov outputs execution counts only for the main blocks of a line.
+     With this option you can determine if blocks within a single line
+     are not being executed.
+
+`-b'
+`--branch-probabilities'
+     Write branch frequencies to the output file, and write branch
+     summary info to the standard output.  This option allows you to
+     see how often each branch in your program was taken.
+     Unconditional branches will not be shown, unless the `-u' option
+     is given.
+
+`-c'
+`--branch-counts'
+     Write branch frequencies as the number of branches taken, rather
+     than the percentage of branches taken.
+
+`-n'
+`--no-output'
+     Do not create the `gcov' output file.
+
+`-l'
+`--long-file-names'
+     Create long file names for included source files.  For example, if
+     the header file `x.h' contains code, and was included in the file
+     `a.c', then running `gcov' on the file `a.c' will produce an
+     output file called `a.c##x.h.gcov' instead of `x.h.gcov'.  This
+     can be useful if `x.h' is included in multiple source files.  If
+     you use the `-p' option, both the including and included file
+     names will be complete path names.
+
+`-p'
+`--preserve-paths'
+     Preserve complete path information in the names of generated
+     `.gcov' files.  Without this option, just the filename component is
+     used.  With this option, all directories are used, with `/'
+     characters translated to `#' characters, `.' directory components
+     removed and `..' components renamed to `^'.  This is useful if
+     sourcefiles are in several different directories.  It also affects
+     the `-l' option.
+
+`-f'
+`--function-summaries'
+     Output summaries for each function in addition to the file level
+     summary.
+
+`-o DIRECTORY|FILE'
+`--object-directory DIRECTORY'
+`--object-file FILE'
+     Specify either the directory containing the gcov data files, or the
+     object path name.  The `.gcno', and `.gcda' data files are
+     searched for using this option.  If a directory is specified, the
+     data files are in that directory and named after the source file
+     name, without its extension.  If a file is specified here, the
+     data files are named after that file, without its extension.  If
+     this option is not supplied, it defaults to the current directory.
+
+`-u'
+`--unconditional-branches'
+     When branch probabilities are given, include those of
+     unconditional branches.  Unconditional branches are normally not
+     interesting.
+
+`-d'
+`--display-progress'
+     Display the progress on the standard output.
+
+
+ `gcov' should be run with the current directory the same as that when
+you invoked the compiler.  Otherwise it will not be able to locate the
+source files.  `gcov' produces files called `MANGLEDNAME.gcov' in the
+current directory.  These contain the coverage information of the
+source file they correspond to.  One `.gcov' file is produced for each
+source file containing code, which was compiled to produce the data
+files.  The MANGLEDNAME part of the output file name is usually simply
+the source file name, but can be something more complicated if the `-l'
+or `-p' options are given.  Refer to those options for details.
+
+ The `.gcov' files contain the `:' separated fields along with program
+source code.  The format is
+
+     EXECUTION_COUNT:LINE_NUMBER:SOURCE LINE TEXT
+
+ Additional block information may succeed each line, when requested by
+command line option.  The EXECUTION_COUNT is `-' for lines containing
+no code and `#####' for lines which were never executed.  Some lines of
+information at the start have LINE_NUMBER of zero.
+
+ The preamble lines are of the form
+
+     -:0:TAG:VALUE
+
+ The ordering and number of these preamble lines will be augmented as
+`gcov' development progresses -- do not rely on them remaining
+unchanged.  Use TAG to locate a particular preamble line.
+
+ The additional block information is of the form
+
+     TAG INFORMATION
+
+ The INFORMATION is human readable, but designed to be simple enough
+for machine parsing too.
+
+ When printing percentages, 0% and 100% are only printed when the values
+are _exactly_ 0% and 100% respectively.  Other values which would
+conventionally be rounded to 0% or 100% are instead printed as the
+nearest non-boundary value.
+
+ When using `gcov', you must first compile your program with two
+special GCC options: `-fprofile-arcs -ftest-coverage'.  This tells the
+compiler to generate additional information needed by gcov (basically a
+flow graph of the program) and also includes additional code in the
+object files for generating the extra profiling information needed by
+gcov.  These additional files are placed in the directory where the
+object file is located.
+
+ Running the program will cause profile output to be generated.  For
+each source file compiled with `-fprofile-arcs', an accompanying
+`.gcda' file will be placed in the object file directory.
+
+ Running `gcov' with your program's source file names as arguments will
+now produce a listing of the code along with frequency of execution for
+each line.  For example, if your program is called `tmp.c', this is
+what you see when you use the basic `gcov' facility:
+
+     $ gcc -fprofile-arcs -ftest-coverage tmp.c
+     $ a.out
+     $ gcov tmp.c
+     90.00% of 10 source lines executed in file tmp.c
+     Creating tmp.c.gcov.
+
+ The file `tmp.c.gcov' contains output from `gcov'.  Here is a sample:
+
+             -:    0:Source:tmp.c
+             -:    0:Graph:tmp.gcno
+             -:    0:Data:tmp.gcda
+             -:    0:Runs:1
+             -:    0:Programs:1
+             -:    1:#include <stdio.h>
+             -:    2:
+             -:    3:int main (void)
+             1:    4:{
+             1:    5:  int i, total;
+             -:    6:
+             1:    7:  total = 0;
+             -:    8:
+            11:    9:  for (i = 0; i < 10; i++)
+            10:   10:    total += i;
+             -:   11:
+             1:   12:  if (total != 45)
+         #####:   13:    printf ("Failure\n");
+             -:   14:  else
+             1:   15:    printf ("Success\n");
+             1:   16:  return 0;
+             -:   17:}
+
+ When you use the `-a' option, you will get individual block counts,
+and the output looks like this:
+
+             -:    0:Source:tmp.c
+             -:    0:Graph:tmp.gcno
+             -:    0:Data:tmp.gcda
+             -:    0:Runs:1
+             -:    0:Programs:1
+             -:    1:#include <stdio.h>
+             -:    2:
+             -:    3:int main (void)
+             1:    4:{
+             1:    4-block  0
+             1:    5:  int i, total;
+             -:    6:
+             1:    7:  total = 0;
+             -:    8:
+            11:    9:  for (i = 0; i < 10; i++)
+            11:    9-block  0
+            10:   10:    total += i;
+            10:   10-block  0
+             -:   11:
+             1:   12:  if (total != 45)
+             1:   12-block  0
+         #####:   13:    printf ("Failure\n");
+         $$$$$:   13-block  0
+             -:   14:  else
+             1:   15:    printf ("Success\n");
+             1:   15-block  0
+             1:   16:  return 0;
+             1:   16-block  0
+             -:   17:}
+
+ In this mode, each basic block is only shown on one line - the last
+line of the block.  A multi-line block will only contribute to the
+execution count of that last line, and other lines will not be shown to
+contain code, unless previous blocks end on those lines.  The total
+execution count of a line is shown and subsequent lines show the
+execution counts for individual blocks that end on that line.  After
+each block, the branch and call counts of the block will be shown, if
+the `-b' option is given.
+
+ Because of the way GCC instruments calls, a call count can be shown
+after a line with no individual blocks.  As you can see, line 13
+contains a basic block that was not executed.
+
+ When you use the `-b' option, your output looks like this:
+
+     $ gcov -b tmp.c
+     90.00% of 10 source lines executed in file tmp.c
+     80.00% of 5 branches executed in file tmp.c
+     80.00% of 5 branches taken at least once in file tmp.c
+     50.00% of 2 calls executed in file tmp.c
+     Creating tmp.c.gcov.
+
+ Here is a sample of a resulting `tmp.c.gcov' file:
+
+             -:    0:Source:tmp.c
+             -:    0:Graph:tmp.gcno
+             -:    0:Data:tmp.gcda
+             -:    0:Runs:1
+             -:    0:Programs:1
+             -:    1:#include <stdio.h>
+             -:    2:
+             -:    3:int main (void)
+     function main called 1 returned 1 blocks executed 75%
+             1:    4:{
+             1:    5:  int i, total;
+             -:    6:
+             1:    7:  total = 0;
+             -:    8:
+            11:    9:  for (i = 0; i < 10; i++)
+     branch  0 taken 91% (fallthrough)
+     branch  1 taken 9%
+            10:   10:    total += i;
+             -:   11:
+             1:   12:  if (total != 45)
+     branch  0 taken 0% (fallthrough)
+     branch  1 taken 100%
+         #####:   13:    printf ("Failure\n");
+     call    0 never executed
+             -:   14:  else
+             1:   15:    printf ("Success\n");
+     call    0 called 1 returned 100%
+             1:   16:  return 0;
+             -:   17:}
+
+ For each function, a line is printed showing how many times the
+function is called, how many times it returns and what percentage of the
+function's blocks were executed.
+
+ For each basic block, a line is printed after the last line of the
+basic block describing the branch or call that ends the basic block.
+There can be multiple branches and calls listed for a single source
+line if there are multiple basic blocks that end on that line.  In this
+case, the branches and calls are each given a number.  There is no
+simple way to map these branches and calls back to source constructs.
+In general, though, the lowest numbered branch or call will correspond
+to the leftmost construct on the source line.
+
+ For a branch, if it was executed at least once, then a percentage
+indicating the number of times the branch was taken divided by the
+number of times the branch was executed will be printed.  Otherwise, the
+message "never executed" is printed.
+
+ For a call, if it was executed at least once, then a percentage
+indicating the number of times the call returned divided by the number
+of times the call was executed will be printed.  This will usually be
+100%, but may be less for functions that call `exit' or `longjmp', and
+thus may not return every time they are called.
+
+ The execution counts are cumulative.  If the example program were
+executed again without removing the `.gcda' file, the count for the
+number of times each line in the source was executed would be added to
+the results of the previous run(s).  This is potentially useful in
+several ways.  For example, it could be used to accumulate data over a
+number of program runs as part of a test verification suite, or to
+provide more accurate long-term information over a large number of
+program runs.
+
+ The data in the `.gcda' files is saved immediately before the program
+exits.  For each source file compiled with `-fprofile-arcs', the
+profiling code first attempts to read in an existing `.gcda' file; if
+the file doesn't match the executable (differing number of basic block
+counts) it will ignore the contents of the file.  It then adds in the
+new execution counts and finally writes the data to the file.
+
+
+File: gcc.info,  Node: Gcov and Optimization,  Next: Gcov Data Files,  Prev: Invoking Gcov,  Up: Gcov
+
+10.3 Using `gcov' with GCC Optimization
+=======================================
+
+If you plan to use `gcov' to help optimize your code, you must first
+compile your program with two special GCC options: `-fprofile-arcs
+-ftest-coverage'.  Aside from that, you can use any other GCC options;
+but if you want to prove that every single line in your program was
+executed, you should not compile with optimization at the same time.
+On some machines the optimizer can eliminate some simple code lines by
+combining them with other lines.  For example, code like this:
+
+     if (a != b)
+       c = 1;
+     else
+       c = 0;
+
+can be compiled into one instruction on some machines.  In this case,
+there is no way for `gcov' to calculate separate execution counts for
+each line because there isn't separate code for each line.  Hence the
+`gcov' output looks like this if you compiled the program with
+optimization:
+
+           100:   12:if (a != b)
+           100:   13:  c = 1;
+           100:   14:else
+           100:   15:  c = 0;
+
+ The output shows that this block of code, combined by optimization,
+executed 100 times.  In one sense this result is correct, because there
+was only one instruction representing all four of these lines.  However,
+the output does not indicate how many times the result was 0 and how
+many times the result was 1.
+
+ Inlineable functions can create unexpected line counts.  Line counts
+are shown for the source code of the inlineable function, but what is
+shown depends on where the function is inlined, or if it is not inlined
+at all.
+
+ If the function is not inlined, the compiler must emit an out of line
+copy of the function, in any object file that needs it.  If `fileA.o'
+and `fileB.o' both contain out of line bodies of a particular
+inlineable function, they will also both contain coverage counts for
+that function.  When `fileA.o' and `fileB.o' are linked together, the
+linker will, on many systems, select one of those out of line bodies
+for all calls to that function, and remove or ignore the other.
+Unfortunately, it will not remove the coverage counters for the unused
+function body.  Hence when instrumented, all but one use of that
+function will show zero counts.
+
+ If the function is inlined in several places, the block structure in
+each location might not be the same.  For instance, a condition might
+now be calculable at compile time in some instances.  Because the
+coverage of all the uses of the inline function will be shown for the
+same source lines, the line counts themselves might seem inconsistent.
+
+
+File: gcc.info,  Node: Gcov Data Files,  Next: Cross-profiling,  Prev: Gcov and Optimization,  Up: Gcov
+
+10.4 Brief description of `gcov' data files
+===========================================
+
+`gcov' uses two files for profiling.  The names of these files are
+derived from the original _object_ file by substituting the file suffix
+with either `.gcno', or `.gcda'.  All of these files are placed in the
+same directory as the object file, and contain data stored in a
+platform-independent format.
+
+ The `.gcno' file is generated when the source file is compiled with
+the GCC `-ftest-coverage' option.  It contains information to
+reconstruct the basic block graphs and assign source line numbers to
+blocks.
+
+ The `.gcda' file is generated when a program containing object files
+built with the GCC `-fprofile-arcs' option is executed.  A separate
+`.gcda' file is created for each object file compiled with this option.
+It contains arc transition counts, and some summary information.
+
+ The full details of the file format is specified in `gcov-io.h', and
+functions provided in that header file should be used to access the
+coverage files.
+
+
+File: gcc.info,  Node: Cross-profiling,  Prev: Gcov Data Files,  Up: Gcov
+
+10.5 Data file relocation to support cross-profiling
+====================================================
+
+Running the program will cause profile output to be generated.  For each
+source file compiled with `-fprofile-arcs', an accompanying `.gcda'
+file will be placed in the object file directory. That implicitly
+requires running the program on the same system as it was built or
+having the same absolute directory structure on the target system. The
+program will try to create the needed directory structure, if it is not
+already present.
+
+ To support cross-profiling, a program compiled with `-fprofile-arcs'
+can relocate the data files based on two environment variables:
+
+   * GCOV_PREFIX contains the prefix to add to the absolute paths in
+     the object file. Prefix can be absolute, or relative.  The default
+     is no prefix.
+
+   * GCOV_PREFIX_STRIP indicates the how many initial directory names
+     to strip off the hardwired absolute paths. Default value is 0.
+
+     _Note:_ If GCOV_PREFIX_STRIP is set without GCOV_PREFIX is
+     undefined,  then a relative path is made out of the hardwired
+     absolute paths.
+
+ For example, if the object file `/user/build/foo.o' was built with
+`-fprofile-arcs', the final executable will try to create the data file
+`/user/build/foo.gcda' when running on the target system.  This will
+fail if the corresponding directory does not exist and it is unable to
+create it.  This can be overcome by, for example, setting the
+environment as `GCOV_PREFIX=/target/run' and `GCOV_PREFIX_STRIP=1'.
+Such a setting will name the data file `/target/run/build/foo.gcda'.
+
+ You must move the data files to the expected directory tree in order to
+use them for profile directed optimizations (`--use-profile'), or to
+use the `gcov' tool.
+
+
+File: gcc.info,  Node: Trouble,  Next: Bugs,  Prev: Gcov,  Up: Top
+
+11 Known Causes of Trouble with GCC
+***********************************
+
+This section describes known problems that affect users of GCC.  Most
+of these are not GCC bugs per se--if they were, we would fix them.  But
+the result for a user may be like the result of a bug.
+
+ Some of these problems are due to bugs in other software, some are
+missing features that are too much work to add, and some are places
+where people's opinions differ as to what is best.
+
+* Menu:
+
+* Actual Bugs::         Bugs we will fix later.
+* Cross-Compiler Problems:: Common problems of cross compiling with GCC.
+* Interoperation::      Problems using GCC with other compilers,
+                        and with certain linkers, assemblers and debuggers.
+* Incompatibilities::   GCC is incompatible with traditional C.
+* Fixed Headers::       GCC uses corrected versions of system header files.
+                        This is necessary, but doesn't always work smoothly.
+* Standard Libraries::  GCC uses the system C library, which might not be
+                        compliant with the ISO C standard.
+* Disappointments::     Regrettable things we can't change, but not quite bugs.
+* C++ Misunderstandings:: Common misunderstandings with GNU C++.
+* Non-bugs::            Things we think are right, but some others disagree.
+* Warnings and Errors:: Which problems in your code get warnings,
+                        and which get errors.
+
+
+File: gcc.info,  Node: Actual Bugs,  Next: Cross-Compiler Problems,  Up: Trouble
+
+11.1 Actual Bugs We Haven't Fixed Yet
+=====================================
+
+   * The `fixincludes' script interacts badly with automounters; if the
+     directory of system header files is automounted, it tends to be
+     unmounted while `fixincludes' is running.  This would seem to be a
+     bug in the automounter.  We don't know any good way to work around
+     it.
+
+
+File: gcc.info,  Node: Cross-Compiler Problems,  Next: Interoperation,  Prev: Actual Bugs,  Up: Trouble
+
+11.2 Cross-Compiler Problems
+============================
+
+You may run into problems with cross compilation on certain machines,
+for several reasons.
+
+   * At present, the program `mips-tfile' which adds debug support to
+     object files on MIPS systems does not work in a cross compile
+     environment.
+
+
+File: gcc.info,  Node: Interoperation,  Next: Incompatibilities,  Prev: Cross-Compiler Problems,  Up: Trouble
+
+11.3 Interoperation
+===================
+
+This section lists various difficulties encountered in using GCC
+together with other compilers or with the assemblers, linkers,
+libraries and debuggers on certain systems.
+
+   * On many platforms, GCC supports a different ABI for C++ than do
+     other compilers, so the object files compiled by GCC cannot be
+     used with object files generated by another C++ compiler.
+
+     An area where the difference is most apparent is name mangling.
+     The use of different name mangling is intentional, to protect you
+     from more subtle problems.  Compilers differ as to many internal
+     details of C++ implementation, including: how class instances are
+     laid out, how multiple inheritance is implemented, and how virtual
+     function calls are handled.  If the name encoding were made the
+     same, your programs would link against libraries provided from
+     other compilers--but the programs would then crash when run.
+     Incompatible libraries are then detected at link time, rather than
+     at run time.
+
+   * On some BSD systems, including some versions of Ultrix, use of
+     profiling causes static variable destructors (currently used only
+     in C++) not to be run.
+
+   * On some SGI systems, when you use `-lgl_s' as an option, it gets
+     translated magically to `-lgl_s -lX11_s -lc_s'.  Naturally, this
+     does not happen when you use GCC.  You must specify all three
+     options explicitly.
+
+   * On a SPARC, GCC aligns all values of type `double' on an 8-byte
+     boundary, and it expects every `double' to be so aligned.  The Sun
+     compiler usually gives `double' values 8-byte alignment, with one
+     exception: function arguments of type `double' may not be aligned.
+
+     As a result, if a function compiled with Sun CC takes the address
+     of an argument of type `double' and passes this pointer of type
+     `double *' to a function compiled with GCC, dereferencing the
+     pointer may cause a fatal signal.
+
+     One way to solve this problem is to compile your entire program
+     with GCC.  Another solution is to modify the function that is
+     compiled with Sun CC to copy the argument into a local variable;
+     local variables are always properly aligned.  A third solution is
+     to modify the function that uses the pointer to dereference it via
+     the following function `access_double' instead of directly with
+     `*':
+
+          inline double
+          access_double (double *unaligned_ptr)
+          {
+            union d2i { double d; int i[2]; };
+
+            union d2i *p = (union d2i *) unaligned_ptr;
+            union d2i u;
+
+            u.i[0] = p->i[0];
+            u.i[1] = p->i[1];
+
+            return u.d;
+          }
+
+     Storing into the pointer can be done likewise with the same union.
+
+   * On Solaris, the `malloc' function in the `libmalloc.a' library may
+     allocate memory that is only 4 byte aligned.  Since GCC on the
+     SPARC assumes that doubles are 8 byte aligned, this may result in a
+     fatal signal if doubles are stored in memory allocated by the
+     `libmalloc.a' library.
+
+     The solution is to not use the `libmalloc.a' library.  Use instead
+     `malloc' and related functions from `libc.a'; they do not have
+     this problem.
+
+   * On the HP PA machine, ADB sometimes fails to work on functions
+     compiled with GCC.  Specifically, it fails to work on functions
+     that use `alloca' or variable-size arrays.  This is because GCC
+     doesn't generate HP-UX unwind descriptors for such functions.  It
+     may even be impossible to generate them.
+
+   * Debugging (`-g') is not supported on the HP PA machine, unless you
+     use the preliminary GNU tools.
+
+   * Taking the address of a label may generate errors from the HP-UX
+     PA assembler.  GAS for the PA does not have this problem.
+
+   * Using floating point parameters for indirect calls to static
+     functions will not work when using the HP assembler.  There simply
+     is no way for GCC to specify what registers hold arguments for
+     static functions when using the HP assembler.  GAS for the PA does
+     not have this problem.
+
+   * In extremely rare cases involving some very large functions you may
+     receive errors from the HP linker complaining about an out of
+     bounds unconditional branch offset.  This used to occur more often
+     in previous versions of GCC, but is now exceptionally rare.  If
+     you should run into it, you can work around by making your
+     function smaller.
+
+   * GCC compiled code sometimes emits warnings from the HP-UX
+     assembler of the form:
+
+          (warning) Use of GR3 when
+            frame >= 8192 may cause conflict.
+
+     These warnings are harmless and can be safely ignored.
+
+   * In extremely rare cases involving some very large functions you may
+     receive errors from the AIX Assembler complaining about a
+     displacement that is too large.  If you should run into it, you
+     can work around by making your function smaller.
+
+   * The `libstdc++.a' library in GCC relies on the SVR4 dynamic linker
+     semantics which merges global symbols between libraries and
+     applications, especially necessary for C++ streams functionality.
+     This is not the default behavior of AIX shared libraries and
+     dynamic linking.  `libstdc++.a' is built on AIX with
+     "runtime-linking" enabled so that symbol merging can occur.  To
+     utilize this feature, the application linked with `libstdc++.a'
+     must include the `-Wl,-brtl' flag on the link line.  G++ cannot
+     impose this because this option may interfere with the semantics
+     of the user program and users may not always use `g++' to link his
+     or her application.  Applications are not required to use the
+     `-Wl,-brtl' flag on the link line--the rest of the `libstdc++.a'
+     library which is not dependent on the symbol merging semantics
+     will continue to function correctly.
+
+   * An application can interpose its own definition of functions for
+     functions invoked by `libstdc++.a' with "runtime-linking" enabled
+     on AIX.  To accomplish this the application must be linked with
+     "runtime-linking" option and the functions explicitly must be
+     exported by the application (`-Wl,-brtl,-bE:exportfile').
+
+   * AIX on the RS/6000 provides support (NLS) for environments outside
+     of the United States.  Compilers and assemblers use NLS to support
+     locale-specific representations of various objects including
+     floating-point numbers (`.' vs `,' for separating decimal
+     fractions).  There have been problems reported where the library
+     linked with GCC does not produce the same floating-point formats
+     that the assembler accepts.  If you have this problem, set the
+     `LANG' environment variable to `C' or `En_US'.
+
+   * Even if you specify `-fdollars-in-identifiers', you cannot
+     successfully use `$' in identifiers on the RS/6000 due to a
+     restriction in the IBM assembler.  GAS supports these identifiers.
+
+
+
+File: gcc.info,  Node: Incompatibilities,  Next: Fixed Headers,  Prev: Interoperation,  Up: Trouble
+
+11.4 Incompatibilities of GCC
+=============================
+
+There are several noteworthy incompatibilities between GNU C and K&R
+(non-ISO) versions of C.
+
+   * GCC normally makes string constants read-only.  If several
+     identical-looking string constants are used, GCC stores only one
+     copy of the string.
+
+     One consequence is that you cannot call `mktemp' with a string
+     constant argument.  The function `mktemp' always alters the string
+     its argument points to.
+
+     Another consequence is that `sscanf' does not work on some very
+     old systems when passed a string constant as its format control
+     string or input.  This is because `sscanf' incorrectly tries to
+     write into the string constant.  Likewise `fscanf' and `scanf'.
+
+     The solution to these problems is to change the program to use
+     `char'-array variables with initialization strings for these
+     purposes instead of string constants.
+
+   * `-2147483648' is positive.
+
+     This is because 2147483648 cannot fit in the type `int', so
+     (following the ISO C rules) its data type is `unsigned long int'.
+     Negating this value yields 2147483648 again.
+
+   * GCC does not substitute macro arguments when they appear inside of
+     string constants.  For example, the following macro in GCC
+
+          #define foo(a) "a"
+
+     will produce output `"a"' regardless of what the argument A is.
+
+   * When you use `setjmp' and `longjmp', the only automatic variables
+     guaranteed to remain valid are those declared `volatile'.  This is
+     a consequence of automatic register allocation.  Consider this
+     function:
+
+          jmp_buf j;
+
+          foo ()
+          {
+            int a, b;
+
+            a = fun1 ();
+            if (setjmp (j))
+              return a;
+
+            a = fun2 ();
+            /* `longjmp (j)' may occur in `fun3'. */
+            return a + fun3 ();
+          }
+
+     Here `a' may or may not be restored to its first value when the
+     `longjmp' occurs.  If `a' is allocated in a register, then its
+     first value is restored; otherwise, it keeps the last value stored
+     in it.
+
+     If you use the `-W' option with the `-O' option, you will get a
+     warning when GCC thinks such a problem might be possible.
+
+   * Programs that use preprocessing directives in the middle of macro
+     arguments do not work with GCC.  For example, a program like this
+     will not work:
+
+          foobar (
+          #define luser
+                  hack)
+
+     ISO C does not permit such a construct.
+
+   * K&R compilers allow comments to cross over an inclusion boundary
+     (i.e. started in an include file and ended in the including file).
+
+   * Declarations of external variables and functions within a block
+     apply only to the block containing the declaration.  In other
+     words, they have the same scope as any other declaration in the
+     same place.
+
+     In some other C compilers, an `extern' declaration affects all the
+     rest of the file even if it happens within a block.
+
+   * In traditional C, you can combine `long', etc., with a typedef
+     name, as shown here:
+
+          typedef int foo;
+          typedef long foo bar;
+
+     In ISO C, this is not allowed: `long' and other type modifiers
+     require an explicit `int'.
+
+   * PCC allows typedef names to be used as function parameters.
+
+   * Traditional C allows the following erroneous pair of declarations
+     to appear together in a given scope:
+
+          typedef int foo;
+          typedef foo foo;
+
+   * GCC treats all characters of identifiers as significant.
+     According to K&R-1 (2.2), "No more than the first eight characters
+     are significant, although more may be used.".  Also according to
+     K&R-1 (2.2), "An identifier is a sequence of letters and digits;
+     the first character must be a letter.  The underscore _ counts as
+     a letter.", but GCC also allows dollar signs in identifiers.
+
+   * PCC allows whitespace in the middle of compound assignment
+     operators such as `+='.  GCC, following the ISO standard, does not
+     allow this.
+
+   * GCC complains about unterminated character constants inside of
+     preprocessing conditionals that fail.  Some programs have English
+     comments enclosed in conditionals that are guaranteed to fail; if
+     these comments contain apostrophes, GCC will probably report an
+     error.  For example, this code would produce an error:
+
+          #if 0
+          You can't expect this to work.
+          #endif
+
+     The best solution to such a problem is to put the text into an
+     actual C comment delimited by `/*...*/'.
+
+   * Many user programs contain the declaration `long time ();'.  In the
+     past, the system header files on many systems did not actually
+     declare `time', so it did not matter what type your program
+     declared it to return.  But in systems with ISO C headers, `time'
+     is declared to return `time_t', and if that is not the same as
+     `long', then `long time ();' is erroneous.
+
+     The solution is to change your program to use appropriate system
+     headers (`<time.h>' on systems with ISO C headers) and not to
+     declare `time' if the system header files declare it, or failing
+     that to use `time_t' as the return type of `time'.
+
+   * When compiling functions that return `float', PCC converts it to a
+     double.  GCC actually returns a `float'.  If you are concerned
+     with PCC compatibility, you should declare your functions to return
+     `double'; you might as well say what you mean.
+
+   * When compiling functions that return structures or unions, GCC
+     output code normally uses a method different from that used on most
+     versions of Unix.  As a result, code compiled with GCC cannot call
+     a structure-returning function compiled with PCC, and vice versa.
+
+     The method used by GCC is as follows: a structure or union which is
+     1, 2, 4 or 8 bytes long is returned like a scalar.  A structure or
+     union with any other size is stored into an address supplied by
+     the caller (usually in a special, fixed register, but on some
+     machines it is passed on the stack).  The target hook
+     `TARGET_STRUCT_VALUE_RTX' tells GCC where to pass this address.
+
+     By contrast, PCC on most target machines returns structures and
+     unions of any size by copying the data into an area of static
+     storage, and then returning the address of that storage as if it
+     were a pointer value.  The caller must copy the data from that
+     memory area to the place where the value is wanted.  GCC does not
+     use this method because it is slower and nonreentrant.
+
+     On some newer machines, PCC uses a reentrant convention for all
+     structure and union returning.  GCC on most of these machines uses
+     a compatible convention when returning structures and unions in
+     memory, but still returns small structures and unions in registers.
+
+     You can tell GCC to use a compatible convention for all structure
+     and union returning with the option `-fpcc-struct-return'.
+
+   * GCC complains about program fragments such as `0x74ae-0x4000'
+     which appear to be two hexadecimal constants separated by the minus
+     operator.  Actually, this string is a single "preprocessing token".
+     Each such token must correspond to one token in C.  Since this
+     does not, GCC prints an error message.  Although it may appear
+     obvious that what is meant is an operator and two values, the ISO
+     C standard specifically requires that this be treated as erroneous.
+
+     A "preprocessing token" is a "preprocessing number" if it begins
+     with a digit and is followed by letters, underscores, digits,
+     periods and `e+', `e-', `E+', `E-', `p+', `p-', `P+', or `P-'
+     character sequences.  (In strict C90 mode, the sequences `p+',
+     `p-', `P+' and `P-' cannot appear in preprocessing numbers.)
+
+     To make the above program fragment valid, place whitespace in
+     front of the minus sign.  This whitespace will end the
+     preprocessing number.
+
+
+File: gcc.info,  Node: Fixed Headers,  Next: Standard Libraries,  Prev: Incompatibilities,  Up: Trouble
+
+11.5 Fixed Header Files
+=======================
+
+GCC needs to install corrected versions of some system header files.
+This is because most target systems have some header files that won't
+work with GCC unless they are changed.  Some have bugs, some are
+incompatible with ISO C, and some depend on special features of other
+compilers.
+
+ Installing GCC automatically creates and installs the fixed header
+files, by running a program called `fixincludes'.  Normally, you don't
+need to pay attention to this.  But there are cases where it doesn't do
+the right thing automatically.
+
+   * If you update the system's header files, such as by installing a
+     new system version, the fixed header files of GCC are not
+     automatically updated.  They can be updated using the `mkheaders'
+     script installed in `LIBEXECDIR/gcc/TARGET/VERSION/install-tools/'.
+
+   * On some systems, header file directories contain machine-specific
+     symbolic links in certain places.  This makes it possible to share
+     most of the header files among hosts running the same version of
+     the system on different machine models.
+
+     The programs that fix the header files do not understand this
+     special way of using symbolic links; therefore, the directory of
+     fixed header files is good only for the machine model used to
+     build it.
+
+     It is possible to make separate sets of fixed header files for the
+     different machine models, and arrange a structure of symbolic
+     links so as to use the proper set, but you'll have to do this by
+     hand.
+
+
+File: gcc.info,  Node: Standard Libraries,  Next: Disappointments,  Prev: Fixed Headers,  Up: Trouble
+
+11.6 Standard Libraries
+=======================
+
+GCC by itself attempts to be a conforming freestanding implementation.
+*Note Language Standards Supported by GCC: Standards, for details of
+what this means.  Beyond the library facilities required of such an
+implementation, the rest of the C library is supplied by the vendor of
+the operating system.  If that C library doesn't conform to the C
+standards, then your programs might get warnings (especially when using
+`-Wall') that you don't expect.
+
+ For example, the `sprintf' function on SunOS 4.1.3 returns `char *'
+while the C standard says that `sprintf' returns an `int'.  The
+`fixincludes' program could make the prototype for this function match
+the Standard, but that would be wrong, since the function will still
+return `char *'.
+
+ If you need a Standard compliant library, then you need to find one, as
+GCC does not provide one.  The GNU C library (called `glibc') provides
+ISO C, POSIX, BSD, SystemV and X/Open compatibility for GNU/Linux and
+HURD-based GNU systems; no recent version of it supports other systems,
+though some very old versions did.  Version 2.2 of the GNU C library
+includes nearly complete C99 support.  You could also ask your
+operating system vendor if newer libraries are available.
+
+
+File: gcc.info,  Node: Disappointments,  Next: C++ Misunderstandings,  Prev: Standard Libraries,  Up: Trouble
+
+11.7 Disappointments and Misunderstandings
+==========================================
+
+These problems are perhaps regrettable, but we don't know any practical
+way around them.
+
+   * Certain local variables aren't recognized by debuggers when you
+     compile with optimization.
+
+     This occurs because sometimes GCC optimizes the variable out of
+     existence.  There is no way to tell the debugger how to compute the
+     value such a variable "would have had", and it is not clear that
+     would be desirable anyway.  So GCC simply does not mention the
+     eliminated variable when it writes debugging information.
+
+     You have to expect a certain amount of disagreement between the
+     executable and your source code, when you use optimization.
+
+   * Users often think it is a bug when GCC reports an error for code
+     like this:
+
+          int foo (struct mumble *);
+
+          struct mumble { ... };
+
+          int foo (struct mumble *x)
+          { ... }
+
+     This code really is erroneous, because the scope of `struct
+     mumble' in the prototype is limited to the argument list
+     containing it.  It does not refer to the `struct mumble' defined
+     with file scope immediately below--they are two unrelated types
+     with similar names in different scopes.
+
+     But in the definition of `foo', the file-scope type is used
+     because that is available to be inherited.  Thus, the definition
+     and the prototype do not match, and you get an error.
+
+     This behavior may seem silly, but it's what the ISO standard
+     specifies.  It is easy enough for you to make your code work by
+     moving the definition of `struct mumble' above the prototype.
+     It's not worth being incompatible with ISO C just to avoid an
+     error for the example shown above.
+
+   * Accesses to bit-fields even in volatile objects works by accessing
+     larger objects, such as a byte or a word.  You cannot rely on what
+     size of object is accessed in order to read or write the
+     bit-field; it may even vary for a given bit-field according to the
+     precise usage.
+
+     If you care about controlling the amount of memory that is
+     accessed, use volatile but do not use bit-fields.
+
+   * GCC comes with shell scripts to fix certain known problems in
+     system header files.  They install corrected copies of various
+     header files in a special directory where only GCC will normally
+     look for them.  The scripts adapt to various systems by searching
+     all the system header files for the problem cases that we know
+     about.
+
+     If new system header files are installed, nothing automatically
+     arranges to update the corrected header files.  They can be
+     updated using the `mkheaders' script installed in
+     `LIBEXECDIR/gcc/TARGET/VERSION/install-tools/'.
+
+   * On 68000 and x86 systems, for instance, you can get paradoxical
+     results if you test the precise values of floating point numbers.
+     For example, you can find that a floating point value which is not
+     a NaN is not equal to itself.  This results from the fact that the
+     floating point registers hold a few more bits of precision than
+     fit in a `double' in memory.  Compiled code moves values between
+     memory and floating point registers at its convenience, and moving
+     them into memory truncates them.
+
+     You can partially avoid this problem by using the `-ffloat-store'
+     option (*note Optimize Options::).
+
+   * On AIX and other platforms without weak symbol support, templates
+     need to be instantiated explicitly and symbols for static members
+     of templates will not be generated.
+
+   * On AIX, GCC scans object files and library archives for static
+     constructors and destructors when linking an application before the
+     linker prunes unreferenced symbols.  This is necessary to prevent
+     the AIX linker from mistakenly assuming that static constructor or
+     destructor are unused and removing them before the scanning can
+     occur.  All static constructors and destructors found will be
+     referenced even though the modules in which they occur may not be
+     used by the program.  This may lead to both increased executable
+     size and unexpected symbol references.
+
+
+File: gcc.info,  Node: C++ Misunderstandings,  Next: Non-bugs,  Prev: Disappointments,  Up: Trouble
+
+11.8 Common Misunderstandings with GNU C++
+==========================================
+
+C++ is a complex language and an evolving one, and its standard
+definition (the ISO C++ standard) was only recently completed.  As a
+result, your C++ compiler may occasionally surprise you, even when its
+behavior is correct.  This section discusses some areas that frequently
+give rise to questions of this sort.
+
+* Menu:
+
+* Static Definitions::  Static member declarations are not definitions
+* Name lookup::         Name lookup, templates, and accessing members of base classes
+* Temporaries::         Temporaries may vanish before you expect
+* Copy Assignment::     Copy Assignment operators copy virtual bases twice
+
+
+File: gcc.info,  Node: Static Definitions,  Next: Name lookup,  Up: C++ Misunderstandings
+
+11.8.1 Declare _and_ Define Static Members
+------------------------------------------
+
+When a class has static data members, it is not enough to _declare_ the
+static member; you must also _define_ it.  For example:
+
+     class Foo
+     {
+       ...
+       void method();
+       static int bar;
+     };
+
+ This declaration only establishes that the class `Foo' has an `int'
+named `Foo::bar', and a member function named `Foo::method'.  But you
+still need to define _both_ `method' and `bar' elsewhere.  According to
+the ISO standard, you must supply an initializer in one (and only one)
+source file, such as:
+
+     int Foo::bar = 0;
+
+ Other C++ compilers may not correctly implement the standard behavior.
+As a result, when you switch to `g++' from one of these compilers, you
+may discover that a program that appeared to work correctly in fact
+does not conform to the standard: `g++' reports as undefined symbols
+any static data members that lack definitions.
+
+
+File: gcc.info,  Node: Name lookup,  Next: Temporaries,  Prev: Static Definitions,  Up: C++ Misunderstandings
+
+11.8.2 Name lookup, templates, and accessing members of base classes
+--------------------------------------------------------------------
+
+The C++ standard prescribes that all names that are not dependent on
+template parameters are bound to their present definitions when parsing
+a template function or class.(1)  Only names that are dependent are
+looked up at the point of instantiation.  For example, consider
+
+       void foo(double);
+
+       struct A {
+         template <typename T>
+         void f () {
+           foo (1);        // 1
+           int i = N;      // 2
+           T t;
+           t.bar();        // 3
+           foo (t);        // 4
+         }
+
+         static const int N;
+       };
+
+ Here, the names `foo' and `N' appear in a context that does not depend
+on the type of `T'.  The compiler will thus require that they are
+defined in the context of use in the template, not only before the
+point of instantiation, and will here use `::foo(double)' and `A::N',
+respectively.  In particular, it will convert the integer value to a
+`double' when passing it to `::foo(double)'.
+
+ Conversely, `bar' and the call to `foo' in the fourth marked line are
+used in contexts that do depend on the type of `T', so they are only
+looked up at the point of instantiation, and you can provide
+declarations for them after declaring the template, but before
+instantiating it.  In particular, if you instantiate `A::f<int>', the
+last line will call an overloaded `::foo(int)' if one was provided,
+even if after the declaration of `struct A'.
+
+ This distinction between lookup of dependent and non-dependent names is
+called two-stage (or dependent) name lookup.  G++ implements it since
+version 3.4.
+
+ Two-stage name lookup sometimes leads to situations with behavior
+different from non-template codes.  The most common is probably this:
+
+       template <typename T> struct Base {
+         int i;
+       };
+
+       template <typename T> struct Derived : public Base<T> {
+         int get_i() { return i; }
+       };
+
+ In `get_i()', `i' is not used in a dependent context, so the compiler
+will look for a name declared at the enclosing namespace scope (which
+is the global scope here).  It will not look into the base class, since
+that is dependent and you may declare specializations of `Base' even
+after declaring `Derived', so the compiler can't really know what `i'
+would refer to.  If there is no global variable `i', then you will get
+an error message.
+
+ In order to make it clear that you want the member of the base class,
+you need to defer lookup until instantiation time, at which the base
+class is known.  For this, you need to access `i' in a dependent
+context, by either using `this->i' (remember that `this' is of type
+`Derived<T>*', so is obviously dependent), or using `Base<T>::i'.
+Alternatively, `Base<T>::i' might be brought into scope by a
+`using'-declaration.
+
+ Another, similar example involves calling member functions of a base
+class:
+
+       template <typename T> struct Base {
+           int f();
+       };
+
+       template <typename T> struct Derived : Base<T> {
+           int g() { return f(); };
+       };
+
+ Again, the call to `f()' is not dependent on template arguments (there
+are no arguments that depend on the type `T', and it is also not
+otherwise specified that the call should be in a dependent context).
+Thus a global declaration of such a function must be available, since
+the one in the base class is not visible until instantiation time.  The
+compiler will consequently produce the following error message:
+
+       x.cc: In member function `int Derived<T>::g()':
+       x.cc:6: error: there are no arguments to `f' that depend on a template
+          parameter, so a declaration of `f' must be available
+       x.cc:6: error: (if you use `-fpermissive', G++ will accept your code, but
+          allowing the use of an undeclared name is deprecated)
+
+ To make the code valid either use `this->f()', or `Base<T>::f()'.
+Using the `-fpermissive' flag will also let the compiler accept the
+code, by marking all function calls for which no declaration is visible
+at the time of definition of the template for later lookup at
+instantiation time, as if it were a dependent call.  We do not
+recommend using `-fpermissive' to work around invalid code, and it will
+also only catch cases where functions in base classes are called, not
+where variables in base classes are used (as in the example above).
+
+ Note that some compilers (including G++ versions prior to 3.4) get
+these examples wrong and accept above code without an error.  Those
+compilers do not implement two-stage name lookup correctly.
+
+ ---------- Footnotes ----------
+
+ (1) The C++ standard just uses the term "dependent" for names that
+depend on the type or value of template parameters.  This shorter term
+will also be used in the rest of this section.
+
+
+File: gcc.info,  Node: Temporaries,  Next: Copy Assignment,  Prev: Name lookup,  Up: C++ Misunderstandings
+
+11.8.3 Temporaries May Vanish Before You Expect
+-----------------------------------------------
+
+It is dangerous to use pointers or references to _portions_ of a
+temporary object.  The compiler may very well delete the object before
+you expect it to, leaving a pointer to garbage.  The most common place
+where this problem crops up is in classes like string classes,
+especially ones that define a conversion function to type `char *' or
+`const char *'--which is one reason why the standard `string' class
+requires you to call the `c_str' member function.  However, any class
+that returns a pointer to some internal structure is potentially
+subject to this problem.
+
+ For example, a program may use a function `strfunc' that returns
+`string' objects, and another function `charfunc' that operates on
+pointers to `char':
+
+     string strfunc ();
+     void charfunc (const char *);
+
+     void
+     f ()
+     {
+       const char *p = strfunc().c_str();
+       ...
+       charfunc (p);
+       ...
+       charfunc (p);
+     }
+
+In this situation, it may seem reasonable to save a pointer to the C
+string returned by the `c_str' member function and use that rather than
+call `c_str' repeatedly.  However, the temporary string created by the
+call to `strfunc' is destroyed after `p' is initialized, at which point
+`p' is left pointing to freed memory.
+
+ Code like this may run successfully under some other compilers,
+particularly obsolete cfront-based compilers that delete temporaries
+along with normal local variables.  However, the GNU C++ behavior is
+standard-conforming, so if your program depends on late destruction of
+temporaries it is not portable.
+
+ The safe way to write such code is to give the temporary a name, which
+forces it to remain until the end of the scope of the name.  For
+example:
+
+     const string& tmp = strfunc ();
+     charfunc (tmp.c_str ());
+
+
+File: gcc.info,  Node: Copy Assignment,  Prev: Temporaries,  Up: C++ Misunderstandings
+
+11.8.4 Implicit Copy-Assignment for Virtual Bases
+-------------------------------------------------
+
+When a base class is virtual, only one subobject of the base class
+belongs to each full object.  Also, the constructors and destructors are
+invoked only once, and called from the most-derived class.  However,
+such objects behave unspecified when being assigned.  For example:
+
+     struct Base{
+       char *name;
+       Base(char *n) : name(strdup(n)){}
+       Base& operator= (const Base& other){
+        free (name);
+        name = strdup (other.name);
+       }
+     };
+
+     struct A:virtual Base{
+       int val;
+       A():Base("A"){}
+     };
+
+     struct B:virtual Base{
+       int bval;
+       B():Base("B"){}
+     };
+
+     struct Derived:public A, public B{
+       Derived():Base("Derived"){}
+     };
+
+     void func(Derived &d1, Derived &d2)
+     {
+       d1 = d2;
+     }
+
+ The C++ standard specifies that `Base::Base' is only called once when
+constructing or copy-constructing a Derived object.  It is unspecified
+whether `Base::operator=' is called more than once when the implicit
+copy-assignment for Derived objects is invoked (as it is inside `func'
+in the example).
+
+ G++ implements the "intuitive" algorithm for copy-assignment: assign
+all direct bases, then assign all members.  In that algorithm, the
+virtual base subobject can be encountered more than once.  In the
+example, copying proceeds in the following order: `val', `name' (via
+`strdup'), `bval', and `name' again.
+
+ If application code relies on copy-assignment, a user-defined
+copy-assignment operator removes any uncertainties.  With such an
+operator, the application can define whether and how the virtual base
+subobject is assigned.
+
+
+File: gcc.info,  Node: Non-bugs,  Next: Warnings and Errors,  Prev: C++ Misunderstandings,  Up: Trouble
+
+11.9 Certain Changes We Don't Want to Make
+==========================================
+
+This section lists changes that people frequently request, but which we
+do not make because we think GCC is better without them.
+
+   * Checking the number and type of arguments to a function which has
+     an old-fashioned definition and no prototype.
+
+     Such a feature would work only occasionally--only for calls that
+     appear in the same file as the called function, following the
+     definition.  The only way to check all calls reliably is to add a
+     prototype for the function.  But adding a prototype eliminates the
+     motivation for this feature.  So the feature is not worthwhile.
+
+   * Warning about using an expression whose type is signed as a shift
+     count.
+
+     Shift count operands are probably signed more often than unsigned.
+     Warning about this would cause far more annoyance than good.
+
+   * Warning about assigning a signed value to an unsigned variable.
+
+     Such assignments must be very common; warning about them would
+     cause more annoyance than good.
+
+   * Warning when a non-void function value is ignored.
+
+     C contains many standard functions that return a value that most
+     programs choose to ignore.  One obvious example is `printf'.
+     Warning about this practice only leads the defensive programmer to
+     clutter programs with dozens of casts to `void'.  Such casts are
+     required so frequently that they become visual noise.  Writing
+     those casts becomes so automatic that they no longer convey useful
+     information about the intentions of the programmer.  For functions
+     where the return value should never be ignored, use the
+     `warn_unused_result' function attribute (*note Function
+     Attributes::).
+
+   * Making `-fshort-enums' the default.
+
+     This would cause storage layout to be incompatible with most other
+     C compilers.  And it doesn't seem very important, given that you
+     can get the same result in other ways.  The case where it matters
+     most is when the enumeration-valued object is inside a structure,
+     and in that case you can specify a field width explicitly.
+
+   * Making bit-fields unsigned by default on particular machines where
+     "the ABI standard" says to do so.
+
+     The ISO C standard leaves it up to the implementation whether a
+     bit-field declared plain `int' is signed or not.  This in effect
+     creates two alternative dialects of C.
+
+     The GNU C compiler supports both dialects; you can specify the
+     signed dialect with `-fsigned-bitfields' and the unsigned dialect
+     with `-funsigned-bitfields'.  However, this leaves open the
+     question of which dialect to use by default.
+
+     Currently, the preferred dialect makes plain bit-fields signed,
+     because this is simplest.  Since `int' is the same as `signed int'
+     in every other context, it is cleanest for them to be the same in
+     bit-fields as well.
+
+     Some computer manufacturers have published Application Binary
+     Interface standards which specify that plain bit-fields should be
+     unsigned.  It is a mistake, however, to say anything about this
+     issue in an ABI.  This is because the handling of plain bit-fields
+     distinguishes two dialects of C.  Both dialects are meaningful on
+     every type of machine.  Whether a particular object file was
+     compiled using signed bit-fields or unsigned is of no concern to
+     other object files, even if they access the same bit-fields in the
+     same data structures.
+
+     A given program is written in one or the other of these two
+     dialects.  The program stands a chance to work on most any machine
+     if it is compiled with the proper dialect.  It is unlikely to work
+     at all if compiled with the wrong dialect.
+
+     Many users appreciate the GNU C compiler because it provides an
+     environment that is uniform across machines.  These users would be
+     inconvenienced if the compiler treated plain bit-fields
+     differently on certain machines.
+
+     Occasionally users write programs intended only for a particular
+     machine type.  On these occasions, the users would benefit if the
+     GNU C compiler were to support by default the same dialect as the
+     other compilers on that machine.  But such applications are rare.
+     And users writing a program to run on more than one type of
+     machine cannot possibly benefit from this kind of compatibility.
+
+     This is why GCC does and will treat plain bit-fields in the same
+     fashion on all types of machines (by default).
+
+     There are some arguments for making bit-fields unsigned by default
+     on all machines.  If, for example, this becomes a universal de
+     facto standard, it would make sense for GCC to go along with it.
+     This is something to be considered in the future.
+
+     (Of course, users strongly concerned about portability should
+     indicate explicitly in each bit-field whether it is signed or not.
+     In this way, they write programs which have the same meaning in
+     both C dialects.)
+
+   * Undefining `__STDC__' when `-ansi' is not used.
+
+     Currently, GCC defines `__STDC__' unconditionally.  This provides
+     good results in practice.
+
+     Programmers normally use conditionals on `__STDC__' to ask whether
+     it is safe to use certain features of ISO C, such as function
+     prototypes or ISO token concatenation.  Since plain `gcc' supports
+     all the features of ISO C, the correct answer to these questions is
+     "yes".
+
+     Some users try to use `__STDC__' to check for the availability of
+     certain library facilities.  This is actually incorrect usage in
+     an ISO C program, because the ISO C standard says that a conforming
+     freestanding implementation should define `__STDC__' even though it
+     does not have the library facilities.  `gcc -ansi -pedantic' is a
+     conforming freestanding implementation, and it is therefore
+     required to define `__STDC__', even though it does not come with
+     an ISO C library.
+
+     Sometimes people say that defining `__STDC__' in a compiler that
+     does not completely conform to the ISO C standard somehow violates
+     the standard.  This is illogical.  The standard is a standard for
+     compilers that claim to support ISO C, such as `gcc -ansi'--not
+     for other compilers such as plain `gcc'.  Whatever the ISO C
+     standard says is relevant to the design of plain `gcc' without
+     `-ansi' only for pragmatic reasons, not as a requirement.
+
+     GCC normally defines `__STDC__' to be 1, and in addition defines
+     `__STRICT_ANSI__' if you specify the `-ansi' option, or a `-std'
+     option for strict conformance to some version of ISO C.  On some
+     hosts, system include files use a different convention, where
+     `__STDC__' is normally 0, but is 1 if the user specifies strict
+     conformance to the C Standard.  GCC follows the host convention
+     when processing system include files, but when processing user
+     files it follows the usual GNU C convention.
+
+   * Undefining `__STDC__' in C++.
+
+     Programs written to compile with C++-to-C translators get the
+     value of `__STDC__' that goes with the C compiler that is
+     subsequently used.  These programs must test `__STDC__' to
+     determine what kind of C preprocessor that compiler uses: whether
+     they should concatenate tokens in the ISO C fashion or in the
+     traditional fashion.
+
+     These programs work properly with GNU C++ if `__STDC__' is defined.
+     They would not work otherwise.
+
+     In addition, many header files are written to provide prototypes
+     in ISO C but not in traditional C.  Many of these header files can
+     work without change in C++ provided `__STDC__' is defined.  If
+     `__STDC__' is not defined, they will all fail, and will all need
+     to be changed to test explicitly for C++ as well.
+
+   * Deleting "empty" loops.
+
+     Historically, GCC has not deleted "empty" loops under the
+     assumption that the most likely reason you would put one in a
+     program is to have a delay, so deleting them will not make real
+     programs run any faster.
+
+     However, the rationale here is that optimization of a nonempty loop
+     cannot produce an empty one. This held for carefully written C
+     compiled with less powerful optimizers but is not always the case
+     for carefully written C++ or with more powerful optimizers.  Thus
+     GCC will remove operations from loops whenever it can determine
+     those operations are not externally visible (apart from the time
+     taken to execute them, of course).  In case the loop can be proved
+     to be finite, GCC will also remove the loop itself.
+
+     Be aware of this when performing timing tests, for instance the
+     following loop can be completely removed, provided
+     `some_expression' can provably not change any global state.
+
+          {
+             int sum = 0;
+             int ix;
+
+             for (ix = 0; ix != 10000; ix++)
+                sum += some_expression;
+          }
+
+     Even though `sum' is accumulated in the loop, no use is made of
+     that summation, so the accumulation can be removed.
+
+   * Making side effects happen in the same order as in some other
+     compiler.
+
+     It is never safe to depend on the order of evaluation of side
+     effects.  For example, a function call like this may very well
+     behave differently from one compiler to another:
+
+          void func (int, int);
+
+          int i = 2;
+          func (i++, i++);
+
+     There is no guarantee (in either the C or the C++ standard language
+     definitions) that the increments will be evaluated in any
+     particular order.  Either increment might happen first.  `func'
+     might get the arguments `2, 3', or it might get `3, 2', or even
+     `2, 2'.
+
+   * Making certain warnings into errors by default.
+
+     Some ISO C testsuites report failure when the compiler does not
+     produce an error message for a certain program.
+
+     ISO C requires a "diagnostic" message for certain kinds of invalid
+     programs, but a warning is defined by GCC to count as a
+     diagnostic.  If GCC produces a warning but not an error, that is
+     correct ISO C support.  If testsuites call this "failure", they
+     should be run with the GCC option `-pedantic-errors', which will
+     turn these warnings into errors.
+
+
+
+File: gcc.info,  Node: Warnings and Errors,  Prev: Non-bugs,  Up: Trouble
+
+11.10 Warning Messages and Error Messages
+=========================================
+
+The GNU compiler can produce two kinds of diagnostics: errors and
+warnings.  Each kind has a different purpose:
+
+     "Errors" report problems that make it impossible to compile your
+     program.  GCC reports errors with the source file name and line
+     number where the problem is apparent.
+
+     "Warnings" report other unusual conditions in your code that _may_
+     indicate a problem, although compilation can (and does) proceed.
+     Warning messages also report the source file name and line number,
+     but include the text `warning:' to distinguish them from error
+     messages.
+
+ Warnings may indicate danger points where you should check to make sure
+that your program really does what you intend; or the use of obsolete
+features; or the use of nonstandard features of GNU C or C++.  Many
+warnings are issued only if you ask for them, with one of the `-W'
+options (for instance, `-Wall' requests a variety of useful warnings).
+
+ GCC always tries to compile your program if possible; it never
+gratuitously rejects a program whose meaning is clear merely because
+(for instance) it fails to conform to a standard.  In some cases,
+however, the C and C++ standards specify that certain extensions are
+forbidden, and a diagnostic _must_ be issued by a conforming compiler.
+The `-pedantic' option tells GCC to issue warnings in such cases;
+`-pedantic-errors' says to make them errors instead.  This does not
+mean that _all_ non-ISO constructs get warnings or errors.
+
+ *Note Options to Request or Suppress Warnings: Warning Options, for
+more detail on these and related command-line options.
+
+
+File: gcc.info,  Node: Bugs,  Next: Service,  Prev: Trouble,  Up: Top
+
+12 Reporting Bugs
+*****************
+
+Your bug reports play an essential role in making GCC reliable.
+
+ When you encounter a problem, the first thing to do is to see if it is
+already known.  *Note Trouble::.  If it isn't known, then you should
+report the problem.
+
+* Menu:
+
+* Criteria:  Bug Criteria.   Have you really found a bug?
+* Reporting: Bug Reporting.  How to report a bug effectively.
+* Known: Trouble.            Known problems.
+* Help: Service.             Where to ask for help.
+
+
+File: gcc.info,  Node: Bug Criteria,  Next: Bug Reporting,  Up: Bugs
+
+12.1 Have You Found a Bug?
+==========================
+
+If you are not sure whether you have found a bug, here are some
+guidelines:
+
+   * If the compiler gets a fatal signal, for any input whatever, that
+     is a compiler bug.  Reliable compilers never crash.
+
+   * If the compiler produces invalid assembly code, for any input
+     whatever (except an `asm' statement), that is a compiler bug,
+     unless the compiler reports errors (not just warnings) which would
+     ordinarily prevent the assembler from being run.
+
+   * If the compiler produces valid assembly code that does not
+     correctly execute the input source code, that is a compiler bug.
+
+     However, you must double-check to make sure, because you may have a
+     program whose behavior is undefined, which happened by chance to
+     give the desired results with another C or C++ compiler.
+
+     For example, in many nonoptimizing compilers, you can write `x;'
+     at the end of a function instead of `return x;', with the same
+     results.  But the value of the function is undefined if `return'
+     is omitted; it is not a bug when GCC produces different results.
+
+     Problems often result from expressions with two increment
+     operators, as in `f (*p++, *p++)'.  Your previous compiler might
+     have interpreted that expression the way you intended; GCC might
+     interpret it another way.  Neither compiler is wrong.  The bug is
+     in your code.
+
+     After you have localized the error to a single source line, it
+     should be easy to check for these things.  If your program is
+     correct and well defined, you have found a compiler bug.
+
+   * If the compiler produces an error message for valid input, that is
+     a compiler bug.
+
+   * If the compiler does not produce an error message for invalid
+     input, that is a compiler bug.  However, you should note that your
+     idea of "invalid input" might be someone else's idea of "an
+     extension" or "support for traditional practice".
+
+   * If you are an experienced user of one of the languages GCC
+     supports, your suggestions for improvement of GCC are welcome in
+     any case.
+
+
+File: gcc.info,  Node: Bug Reporting,  Prev: Bug Criteria,  Up: Bugs
+
+12.2 How and where to Report Bugs
+=================================
+
+Bugs should be reported to the bug database at
+`http://gcc.gnu.org/bugs.html'.
+
+
+File: gcc.info,  Node: Service,  Next: Contributing,  Prev: Bugs,  Up: Top
+
+13 How To Get Help with GCC
+***************************
+
+If you need help installing, using or changing GCC, there are two ways
+to find it:
+
+   * Send a message to a suitable network mailing list.  First try
+     <gcc-help@gcc.gnu.org> (for help installing or using GCC), and if
+     that brings no response, try <gcc@gcc.gnu.org>.  For help changing
+     GCC, ask <gcc@gcc.gnu.org>.  If you think you have found a bug in
+     GCC, please report it following the instructions at *note Bug
+     Reporting::.
+
+   * Look in the service directory for someone who might help you for a
+     fee.  The service directory is found at
+     `http://www.fsf.org/resources/service'.
+
+ For further information, see `http://gcc.gnu.org/faq.html#support'.
+
+
+File: gcc.info,  Node: Contributing,  Next: Funding,  Prev: Service,  Up: Top
+
+14 Contributing to GCC Development
+**********************************
+
+If you would like to help pretest GCC releases to assure they work well,
+current development sources are available by SVN (see
+`http://gcc.gnu.org/svn.html').  Source and binary snapshots are also
+available for FTP; see `http://gcc.gnu.org/snapshots.html'.
+
+ If you would like to work on improvements to GCC, please read the
+advice at these URLs:
+
+     `http://gcc.gnu.org/contribute.html'
+     `http://gcc.gnu.org/contributewhy.html'
+
+for information on how to make useful contributions and avoid
+duplication of effort.  Suggested projects are listed at
+`http://gcc.gnu.org/projects/'.
+
+
+File: gcc.info,  Node: Funding,  Next: GNU Project,  Prev: Contributing,  Up: Top
+
+Funding Free Software
+*********************
+
+If you want to have more free software a few years from now, it makes
+sense for you to help encourage people to contribute funds for its
+development.  The most effective approach known is to encourage
+commercial redistributors to donate.
+
+ Users of free software systems can boost the pace of development by
+encouraging for-a-fee distributors to donate part of their selling price
+to free software developers--the Free Software Foundation, and others.
+
+ The way to convince distributors to do this is to demand it and expect
+it from them.  So when you compare distributors, judge them partly by
+how much they give to free software development.  Show distributors
+they must compete to be the one who gives the most.
+
+ To make this approach work, you must insist on numbers that you can
+compare, such as, "We will donate ten dollars to the Frobnitz project
+for each disk sold."  Don't be satisfied with a vague promise, such as
+"A portion of the profits are donated," since it doesn't give a basis
+for comparison.
+
+ Even a precise fraction "of the profits from this disk" is not very
+meaningful, since creative accounting and unrelated business decisions
+can greatly alter what fraction of the sales price counts as profit.
+If the price you pay is $50, ten percent of the profit is probably less
+than a dollar; it might be a few cents, or nothing at all.
+
+ Some redistributors do development work themselves.  This is useful
+too; but to keep everyone honest, you need to inquire how much they do,
+and what kind.  Some kinds of development make much more long-term
+difference than others.  For example, maintaining a separate version of
+a program contributes very little; maintaining the standard version of a
+program for the whole community contributes much.  Easy new ports
+contribute little, since someone else would surely do them; difficult
+ports such as adding a new CPU to the GNU Compiler Collection
+contribute more; major new features or packages contribute the most.
+
+ By establishing the idea that supporting further development is "the
+proper thing to do" when distributing free software for a fee, we can
+assure a steady flow of resources into making more free software.
+
+     Copyright (C) 1994 Free Software Foundation, Inc.
+     Verbatim copying and redistribution of this section is permitted
+     without royalty; alteration is not permitted.
+
+
+File: gcc.info,  Node: GNU Project,  Next: Copying,  Prev: Funding,  Up: Top
+
+The GNU Project and GNU/Linux
+*****************************
+
+The GNU Project was launched in 1984 to develop a complete Unix-like
+operating system which is free software: the GNU system.  (GNU is a
+recursive acronym for "GNU's Not Unix"; it is pronounced "guh-NEW".)
+Variants of the GNU operating system, which use the kernel Linux, are
+now widely used; though these systems are often referred to as "Linux",
+they are more accurately called GNU/Linux systems.
+
+ For more information, see:
+     `http://www.gnu.org/'
+     `http://www.gnu.org/gnu/linux-and-gnu.html'
+
+
+File: gcc.info,  Node: Copying,  Next: GNU Free Documentation License,  Prev: GNU Project,  Up: Top
+
+GNU General Public License
+**************************
+
+                        Version 3, 29 June 2007
+
+     Copyright (C) 2007 Free Software Foundation, Inc. `http://fsf.org/'
+
+     Everyone is permitted to copy and distribute verbatim copies of this
+     license document, but changing it is not allowed.
+
+Preamble
+========
+
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+ The licenses for most software and other practical works are designed
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+TERMS AND CONDITIONS
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+     recipients of the covered work and works based on it.
+
+     A patent license is "discriminatory" if it does not include within
+     the scope of its coverage, prohibits the exercise of, or is
+     conditioned on the non-exercise of one or more of the rights that
+     are specifically granted under this License.  You may not convey a
+     covered work if you are a party to an arrangement with a third
+     party that is in the business of distributing software, under
+     which you make payment to the third party based on the extent of
+     your activity of conveying the work, and under which the third
+     party grants, to any of the parties who would receive the covered
+     work from you, a discriminatory patent license (a) in connection
+     with copies of the covered work conveyed by you (or copies made
+     from those copies), or (b) primarily for and in connection with
+     specific products or compilations that contain the covered work,
+     unless you entered into that arrangement, or that patent license
+     was granted, prior to 28 March 2007.
+
+     Nothing in this License shall be construed as excluding or limiting
+     any implied license or other defenses to infringement that may
+     otherwise be available to you under applicable patent law.
+
+ 12. No Surrender of Others' Freedom.
+
+     If conditions are imposed on you (whether by court order,
+     agreement or otherwise) that contradict the conditions of this
+     License, they do not excuse you from the conditions of this
+     License.  If you cannot convey a covered work so as to satisfy
+     simultaneously your obligations under this License and any other
+     pertinent obligations, then as a consequence you may not convey it
+     at all.  For example, if you agree to terms that obligate you to
+     collect a royalty for further conveying from those to whom you
+     convey the Program, the only way you could satisfy both those
+     terms and this License would be to refrain entirely from conveying
+     the Program.
+
+ 13. Use with the GNU Affero General Public License.
+
+     Notwithstanding any other provision of this License, you have
+     permission to link or combine any covered work with a work licensed
+     under version 3 of the GNU Affero General Public License into a
+     single combined work, and to convey the resulting work.  The terms
+     of this License will continue to apply to the part which is the
+     covered work, but the special requirements of the GNU Affero
+     General Public License, section 13, concerning interaction through
+     a network will apply to the combination as such.
+
+ 14. Revised Versions of this License.
+
+     The Free Software Foundation may publish revised and/or new
+     versions of the GNU General Public License from time to time.
+     Such new versions will be similar in spirit to the present
+     version, but may differ in detail to address new problems or
+     concerns.
+
+     Each version is given a distinguishing version number.  If the
+     Program specifies that a certain numbered version of the GNU
+     General Public License "or any later version" applies to it, you
+     have the option of following the terms and conditions either of
+     that numbered version or of any later version published by the
+     Free Software Foundation.  If the Program does not specify a
+     version number of the GNU General Public License, you may choose
+     any version ever published by the Free Software Foundation.
+
+     If the Program specifies that a proxy can decide which future
+     versions of the GNU General Public License can be used, that
+     proxy's public statement of acceptance of a version permanently
+     authorizes you to choose that version for the Program.
+
+     Later license versions may give you additional or different
+     permissions.  However, no additional obligations are imposed on any
+     author or copyright holder as a result of your choosing to follow a
+     later version.
+
+ 15. Disclaimer of Warranty.
+
+     THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY
+     APPLICABLE LAW.  EXCEPT WHEN OTHERWISE STATED IN WRITING THE
+     COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS"
+     WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED,
+     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE ENTIRE
+     RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.
+     SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL
+     NECESSARY SERVICING, REPAIR OR CORRECTION.
+
+ 16. Limitation of Liability.
+
+     IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN
+     WRITING WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES
+     AND/OR CONVEYS THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU
+     FOR DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR
+     CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE
+     THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA
+     BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD
+     PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+     PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF
+     THE POSSIBILITY OF SUCH DAMAGES.
+
+ 17. Interpretation of Sections 15 and 16.
+
+     If the disclaimer of warranty and limitation of liability provided
+     above cannot be given local legal effect according to their terms,
+     reviewing courts shall apply local law that most closely
+     approximates an absolute waiver of all civil liability in
+     connection with the Program, unless a warranty or assumption of
+     liability accompanies a copy of the Program in return for a fee.
+
+
+END OF TERMS AND CONDITIONS
+===========================
+
+How to Apply These Terms to Your New Programs
+=============================================
+
+If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these
+terms.
+
+ To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+state the exclusion of warranty; and each file should have at least the
+"copyright" line and a pointer to where the full notice is found.
+
+     ONE LINE TO GIVE THE PROGRAM'S NAME AND A BRIEF IDEA OF WHAT IT DOES.
+     Copyright (C) YEAR NAME OF AUTHOR
+
+     This program is free software: you can redistribute it and/or modify
+     it under the terms of the GNU General Public License as published by
+     the Free Software Foundation, either version 3 of the License, or (at
+     your option) any later version.
+
+     This program is distributed in the hope that it will be useful, but
+     WITHOUT ANY WARRANTY; without even the implied warranty of
+     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+     General Public License for more details.
+
+     You should have received a copy of the GNU General Public License
+     along with this program.  If not, see `http://www.gnu.org/licenses/'.
+
+ Also add information on how to contact you by electronic and paper
+mail.
+
+ If the program does terminal interaction, make it output a short
+notice like this when it starts in an interactive mode:
+
+     PROGRAM Copyright (C) YEAR NAME OF AUTHOR
+     This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+     This is free software, and you are welcome to redistribute it
+     under certain conditions; type `show c' for details.
+
+ The hypothetical commands `show w' and `show c' should show the
+appropriate parts of the General Public License.  Of course, your
+program's commands might be different; for a GUI interface, you would
+use an "about box".
+
+ You should also get your employer (if you work as a programmer) or
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary.  For more information on this, and how to apply and follow
+the GNU GPL, see `http://www.gnu.org/licenses/'.
+
+ The GNU General Public License does not permit incorporating your
+program into proprietary programs.  If your program is a subroutine
+library, you may consider it more useful to permit linking proprietary
+applications with the library.  If this is what you want to do, use the
+GNU Lesser General Public License instead of this License.  But first,
+please read `http://www.gnu.org/philosophy/why-not-lgpl.html'.
+
+
+File: gcc.info,  Node: GNU Free Documentation License,  Next: Contributors,  Prev: Copying,  Up: Top
+
+GNU Free Documentation License
+******************************
+
+                     Version 1.3, 3 November 2008
+
+     Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
+     `http://fsf.org/'
+
+     Everyone is permitted to copy and distribute verbatim copies
+     of this license document, but changing it is not allowed.
+
+  0. PREAMBLE
+
+     The purpose of this License is to make a manual, textbook, or other
+     functional and useful document "free" in the sense of freedom: to
+     assure everyone the effective freedom to copy and redistribute it,
+     with or without modifying it, either commercially or
+     noncommercially.  Secondarily, this License preserves for the
+     author and publisher a way to get credit for their work, while not
+     being considered responsible for modifications made by others.
+
+     This License is a kind of "copyleft", which means that derivative
+     works of the document must themselves be free in the same sense.
+     It complements the GNU General Public License, which is a copyleft
+     license designed for free software.
+
+     We have designed this License in order to use it for manuals for
+     free software, because free software needs free documentation: a
+     free program should come with manuals providing the same freedoms
+     that the software does.  But this License is not limited to
+     software manuals; it can be used for any textual work, regardless
+     of subject matter or whether it is published as a printed book.
+     We recommend this License principally for works whose purpose is
+     instruction or reference.
+
+  1. APPLICABILITY AND DEFINITIONS
+
+     This License applies to any manual or other work, in any medium,
+     that contains a notice placed by the copyright holder saying it
+     can be distributed under the terms of this License.  Such a notice
+     grants a world-wide, royalty-free license, unlimited in duration,
+     to use that work under the conditions stated herein.  The
+     "Document", below, refers to any such manual or work.  Any member
+     of the public is a licensee, and is addressed as "you".  You
+     accept the license if you copy, modify or distribute the work in a
+     way requiring permission under copyright law.
+
+     A "Modified Version" of the Document means any work containing the
+     Document or a portion of it, either copied verbatim, or with
+     modifications and/or translated into another language.
+
+     A "Secondary Section" is a named appendix or a front-matter section
+     of the Document that deals exclusively with the relationship of the
+     publishers or authors of the Document to the Document's overall
+     subject (or to related matters) and contains nothing that could
+     fall directly within that overall subject.  (Thus, if the Document
+     is in part a textbook of mathematics, a Secondary Section may not
+     explain any mathematics.)  The relationship could be a matter of
+     historical connection with the subject or with related matters, or
+     of legal, commercial, philosophical, ethical or political position
+     regarding them.
+
+     The "Invariant Sections" are certain Secondary Sections whose
+     titles are designated, as being those of Invariant Sections, in
+     the notice that says that the Document is released under this
+     License.  If a section does not fit the above definition of
+     Secondary then it is not allowed to be designated as Invariant.
+     The Document may contain zero Invariant Sections.  If the Document
+     does not identify any Invariant Sections then there are none.
+
+     The "Cover Texts" are certain short passages of text that are
+     listed, as Front-Cover Texts or Back-Cover Texts, in the notice
+     that says that the Document is released under this License.  A
+     Front-Cover Text may be at most 5 words, and a Back-Cover Text may
+     be at most 25 words.
+
+     A "Transparent" copy of the Document means a machine-readable copy,
+     represented in a format whose specification is available to the
+     general public, that is suitable for revising the document
+     straightforwardly with generic text editors or (for images
+     composed of pixels) generic paint programs or (for drawings) some
+     widely available drawing editor, and that is suitable for input to
+     text formatters or for automatic translation to a variety of
+     formats suitable for input to text formatters.  A copy made in an
+     otherwise Transparent file format whose markup, or absence of
+     markup, has been arranged to thwart or discourage subsequent
+     modification by readers is not Transparent.  An image format is
+     not Transparent if used for any substantial amount of text.  A
+     copy that is not "Transparent" is called "Opaque".
+
+     Examples of suitable formats for Transparent copies include plain
+     ASCII without markup, Texinfo input format, LaTeX input format,
+     SGML or XML using a publicly available DTD, and
+     standard-conforming simple HTML, PostScript or PDF designed for
+     human modification.  Examples of transparent image formats include
+     PNG, XCF and JPG.  Opaque formats include proprietary formats that
+     can be read and edited only by proprietary word processors, SGML or
+     XML for which the DTD and/or processing tools are not generally
+     available, and the machine-generated HTML, PostScript or PDF
+     produced by some word processors for output purposes only.
+
+     The "Title Page" means, for a printed book, the title page itself,
+     plus such following pages as are needed to hold, legibly, the
+     material this License requires to appear in the title page.  For
+     works in formats which do not have any title page as such, "Title
+     Page" means the text near the most prominent appearance of the
+     work's title, preceding the beginning of the body of the text.
+
+     The "publisher" means any person or entity that distributes copies
+     of the Document to the public.
+
+     A section "Entitled XYZ" means a named subunit of the Document
+     whose title either is precisely XYZ or contains XYZ in parentheses
+     following text that translates XYZ in another language.  (Here XYZ
+     stands for a specific section name mentioned below, such as
+     "Acknowledgements", "Dedications", "Endorsements", or "History".)
+     To "Preserve the Title" of such a section when you modify the
+     Document means that it remains a section "Entitled XYZ" according
+     to this definition.
+
+     The Document may include Warranty Disclaimers next to the notice
+     which states that this License applies to the Document.  These
+     Warranty Disclaimers are considered to be included by reference in
+     this License, but only as regards disclaiming warranties: any other
+     implication that these Warranty Disclaimers may have is void and
+     has no effect on the meaning of this License.
+
+  2. VERBATIM COPYING
+
+     You may copy and distribute the Document in any medium, either
+     commercially or noncommercially, provided that this License, the
+     copyright notices, and the license notice saying this License
+     applies to the Document are reproduced in all copies, and that you
+     add no other conditions whatsoever to those of this License.  You
+     may not use technical measures to obstruct or control the reading
+     or further copying of the copies you make or distribute.  However,
+     you may accept compensation in exchange for copies.  If you
+     distribute a large enough number of copies you must also follow
+     the conditions in section 3.
+
+     You may also lend copies, under the same conditions stated above,
+     and you may publicly display copies.
+
+  3. COPYING IN QUANTITY
+
+     If you publish printed copies (or copies in media that commonly
+     have printed covers) of the Document, numbering more than 100, and
+     the Document's license notice requires Cover Texts, you must
+     enclose the copies in covers that carry, clearly and legibly, all
+     these Cover Texts: Front-Cover Texts on the front cover, and
+     Back-Cover Texts on the back cover.  Both covers must also clearly
+     and legibly identify you as the publisher of these copies.  The
+     front cover must present the full title with all words of the
+     title equally prominent and visible.  You may add other material
+     on the covers in addition.  Copying with changes limited to the
+     covers, as long as they preserve the title of the Document and
+     satisfy these conditions, can be treated as verbatim copying in
+     other respects.
+
+     If the required texts for either cover are too voluminous to fit
+     legibly, you should put the first ones listed (as many as fit
+     reasonably) on the actual cover, and continue the rest onto
+     adjacent pages.
+
+     If you publish or distribute Opaque copies of the Document
+     numbering more than 100, you must either include a
+     machine-readable Transparent copy along with each Opaque copy, or
+     state in or with each Opaque copy a computer-network location from
+     which the general network-using public has access to download
+     using public-standard network protocols a complete Transparent
+     copy of the Document, free of added material.  If you use the
+     latter option, you must take reasonably prudent steps, when you
+     begin distribution of Opaque copies in quantity, to ensure that
+     this Transparent copy will remain thus accessible at the stated
+     location until at least one year after the last time you
+     distribute an Opaque copy (directly or through your agents or
+     retailers) of that edition to the public.
+
+     It is requested, but not required, that you contact the authors of
+     the Document well before redistributing any large number of
+     copies, to give them a chance to provide you with an updated
+     version of the Document.
+
+  4. MODIFICATIONS
+
+     You may copy and distribute a Modified Version of the Document
+     under the conditions of sections 2 and 3 above, provided that you
+     release the Modified Version under precisely this License, with
+     the Modified Version filling the role of the Document, thus
+     licensing distribution and modification of the Modified Version to
+     whoever possesses a copy of it.  In addition, you must do these
+     things in the Modified Version:
+
+       A. Use in the Title Page (and on the covers, if any) a title
+          distinct from that of the Document, and from those of
+          previous versions (which should, if there were any, be listed
+          in the History section of the Document).  You may use the
+          same title as a previous version if the original publisher of
+          that version gives permission.
+
+       B. List on the Title Page, as authors, one or more persons or
+          entities responsible for authorship of the modifications in
+          the Modified Version, together with at least five of the
+          principal authors of the Document (all of its principal
+          authors, if it has fewer than five), unless they release you
+          from this requirement.
+
+       C. State on the Title page the name of the publisher of the
+          Modified Version, as the publisher.
+
+       D. Preserve all the copyright notices of the Document.
+
+       E. Add an appropriate copyright notice for your modifications
+          adjacent to the other copyright notices.
+
+       F. Include, immediately after the copyright notices, a license
+          notice giving the public permission to use the Modified
+          Version under the terms of this License, in the form shown in
+          the Addendum below.
+
+       G. Preserve in that license notice the full lists of Invariant
+          Sections and required Cover Texts given in the Document's
+          license notice.
+
+       H. Include an unaltered copy of this License.
+
+       I. Preserve the section Entitled "History", Preserve its Title,
+          and add to it an item stating at least the title, year, new
+          authors, and publisher of the Modified Version as given on
+          the Title Page.  If there is no section Entitled "History" in
+          the Document, create one stating the title, year, authors,
+          and publisher of the Document as given on its Title Page,
+          then add an item describing the Modified Version as stated in
+          the previous sentence.
+
+       J. Preserve the network location, if any, given in the Document
+          for public access to a Transparent copy of the Document, and
+          likewise the network locations given in the Document for
+          previous versions it was based on.  These may be placed in
+          the "History" section.  You may omit a network location for a
+          work that was published at least four years before the
+          Document itself, or if the original publisher of the version
+          it refers to gives permission.
+
+       K. For any section Entitled "Acknowledgements" or "Dedications",
+          Preserve the Title of the section, and preserve in the
+          section all the substance and tone of each of the contributor
+          acknowledgements and/or dedications given therein.
+
+       L. Preserve all the Invariant Sections of the Document,
+          unaltered in their text and in their titles.  Section numbers
+          or the equivalent are not considered part of the section
+          titles.
+
+       M. Delete any section Entitled "Endorsements".  Such a section
+          may not be included in the Modified Version.
+
+       N. Do not retitle any existing section to be Entitled
+          "Endorsements" or to conflict in title with any Invariant
+          Section.
+
+       O. Preserve any Warranty Disclaimers.
+
+     If the Modified Version includes new front-matter sections or
+     appendices that qualify as Secondary Sections and contain no
+     material copied from the Document, you may at your option
+     designate some or all of these sections as invariant.  To do this,
+     add their titles to the list of Invariant Sections in the Modified
+     Version's license notice.  These titles must be distinct from any
+     other section titles.
+
+     You may add a section Entitled "Endorsements", provided it contains
+     nothing but endorsements of your Modified Version by various
+     parties--for example, statements of peer review or that the text
+     has been approved by an organization as the authoritative
+     definition of a standard.
+
+     You may add a passage of up to five words as a Front-Cover Text,
+     and a passage of up to 25 words as a Back-Cover Text, to the end
+     of the list of Cover Texts in the Modified Version.  Only one
+     passage of Front-Cover Text and one of Back-Cover Text may be
+     added by (or through arrangements made by) any one entity.  If the
+     Document already includes a cover text for the same cover,
+     previously added by you or by arrangement made by the same entity
+     you are acting on behalf of, you may not add another; but you may
+     replace the old one, on explicit permission from the previous
+     publisher that added the old one.
+
+     The author(s) and publisher(s) of the Document do not by this
+     License give permission to use their names for publicity for or to
+     assert or imply endorsement of any Modified Version.
+
+  5. COMBINING DOCUMENTS
+
+     You may combine the Document with other documents released under
+     this License, under the terms defined in section 4 above for
+     modified versions, provided that you include in the combination
+     all of the Invariant Sections of all of the original documents,
+     unmodified, and list them all as Invariant Sections of your
+     combined work in its license notice, and that you preserve all
+     their Warranty Disclaimers.
+
+     The combined work need only contain one copy of this License, and
+     multiple identical Invariant Sections may be replaced with a single
+     copy.  If there are multiple Invariant Sections with the same name
+     but different contents, make the title of each such section unique
+     by adding at the end of it, in parentheses, the name of the
+     original author or publisher of that section if known, or else a
+     unique number.  Make the same adjustment to the section titles in
+     the list of Invariant Sections in the license notice of the
+     combined work.
+
+     In the combination, you must combine any sections Entitled
+     "History" in the various original documents, forming one section
+     Entitled "History"; likewise combine any sections Entitled
+     "Acknowledgements", and any sections Entitled "Dedications".  You
+     must delete all sections Entitled "Endorsements."
+
+  6. COLLECTIONS OF DOCUMENTS
+
+     You may make a collection consisting of the Document and other
+     documents released under this License, and replace the individual
+     copies of this License in the various documents with a single copy
+     that is included in the collection, provided that you follow the
+     rules of this License for verbatim copying of each of the
+     documents in all other respects.
+
+     You may extract a single document from such a collection, and
+     distribute it individually under this License, provided you insert
+     a copy of this License into the extracted document, and follow
+     this License in all other respects regarding verbatim copying of
+     that document.
+
+  7. AGGREGATION WITH INDEPENDENT WORKS
+
+     A compilation of the Document or its derivatives with other
+     separate and independent documents or works, in or on a volume of
+     a storage or distribution medium, is called an "aggregate" if the
+     copyright resulting from the compilation is not used to limit the
+     legal rights of the compilation's users beyond what the individual
+     works permit.  When the Document is included in an aggregate, this
+     License does not apply to the other works in the aggregate which
+     are not themselves derivative works of the Document.
+
+     If the Cover Text requirement of section 3 is applicable to these
+     copies of the Document, then if the Document is less than one half
+     of the entire aggregate, the Document's Cover Texts may be placed
+     on covers that bracket the Document within the aggregate, or the
+     electronic equivalent of covers if the Document is in electronic
+     form.  Otherwise they must appear on printed covers that bracket
+     the whole aggregate.
+
+  8. TRANSLATION
+
+     Translation is considered a kind of modification, so you may
+     distribute translations of the Document under the terms of section
+     4.  Replacing Invariant Sections with translations requires special
+     permission from their copyright holders, but you may include
+     translations of some or all Invariant Sections in addition to the
+     original versions of these Invariant Sections.  You may include a
+     translation of this License, and all the license notices in the
+     Document, and any Warranty Disclaimers, provided that you also
+     include the original English version of this License and the
+     original versions of those notices and disclaimers.  In case of a
+     disagreement between the translation and the original version of
+     this License or a notice or disclaimer, the original version will
+     prevail.
+
+     If a section in the Document is Entitled "Acknowledgements",
+     "Dedications", or "History", the requirement (section 4) to
+     Preserve its Title (section 1) will typically require changing the
+     actual title.
+
+  9. TERMINATION
+
+     You may not copy, modify, sublicense, or distribute the Document
+     except as expressly provided under this License.  Any attempt
+     otherwise to copy, modify, sublicense, or distribute it is void,
+     and will automatically terminate your rights under this License.
+
+     However, if you cease all violation of this License, then your
+     license from a particular copyright holder is reinstated (a)
+     provisionally, unless and until the copyright holder explicitly
+     and finally terminates your license, and (b) permanently, if the
+     copyright holder fails to notify you of the violation by some
+     reasonable means prior to 60 days after the cessation.
+
+     Moreover, your license from a particular copyright holder is
+     reinstated permanently if the copyright holder notifies you of the
+     violation by some reasonable means, this is the first time you have
+     received notice of violation of this License (for any work) from
+     that copyright holder, and you cure the violation prior to 30 days
+     after your receipt of the notice.
+
+     Termination of your rights under this section does not terminate
+     the licenses of parties who have received copies or rights from
+     you under this License.  If your rights have been terminated and
+     not permanently reinstated, receipt of a copy of some or all of
+     the same material does not give you any rights to use it.
+
+ 10. FUTURE REVISIONS OF THIS LICENSE
+
+     The Free Software Foundation may publish new, revised versions of
+     the GNU Free Documentation License from time to time.  Such new
+     versions will be similar in spirit to the present version, but may
+     differ in detail to address new problems or concerns.  See
+     `http://www.gnu.org/copyleft/'.
+
+     Each version of the License is given a distinguishing version
+     number.  If the Document specifies that a particular numbered
+     version of this License "or any later version" applies to it, you
+     have the option of following the terms and conditions either of
+     that specified version or of any later version that has been
+     published (not as a draft) by the Free Software Foundation.  If
+     the Document does not specify a version number of this License,
+     you may choose any version ever published (not as a draft) by the
+     Free Software Foundation.  If the Document specifies that a proxy
+     can decide which future versions of this License can be used, that
+     proxy's public statement of acceptance of a version permanently
+     authorizes you to choose that version for the Document.
+
+ 11. RELICENSING
+
+     "Massive Multiauthor Collaboration Site" (or "MMC Site") means any
+     World Wide Web server that publishes copyrightable works and also
+     provides prominent facilities for anybody to edit those works.  A
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+     corporation with a principal place of business in San Francisco,
+     California, as well as future copyleft versions of that license
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+
+     "Incorporate" means to publish or republish a Document, in whole or
+     in part, as part of another Document.
+
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+     texts or invariant sections, and (2) were thus incorporated prior
+     to November 1, 2008.
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+     site under CC-BY-SA on the same site at any time before August 1,
+     2009, provided the MMC is eligible for relicensing.
+
+
+ADDENDUM: How to use this License for your documents
+====================================================
+
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+the License in the document and put the following copyright and license
+notices just after the title page:
+
+       Copyright (C)  YEAR  YOUR NAME.
+       Permission is granted to copy, distribute and/or modify this document
+       under the terms of the GNU Free Documentation License, Version 1.3
+       or any later version published by the Free Software Foundation;
+       with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
+       Texts.  A copy of the license is included in the section entitled ``GNU
+       Free Documentation License''.
+
+ If you have Invariant Sections, Front-Cover Texts and Back-Cover Texts,
+replace the "with...Texts." line with this:
+
+         with the Invariant Sections being LIST THEIR TITLES, with
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+         being LIST.
+
+ If you have Invariant Sections without Cover Texts, or some other
+combination of the three, merge those two alternatives to suit the
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+
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+
+
+File: gcc.info,  Node: Contributors,  Next: Option Index,  Prev: GNU Free Documentation License,  Up: Top
+
+Contributors to GCC
+*******************
+
+The GCC project would like to thank its many contributors.  Without
+them the project would not have been nearly as successful as it has
+been.  Any omissions in this list are accidental.  Feel free to contact
+<law@redhat.com> or <gerald@pfeifer.com> if you have been left out or
+some of your contributions are not listed.  Please keep this list in
+alphabetical order.
+
+   * Analog Devices helped implement the support for complex data types
+     and iterators.
+
+   * John David Anglin for threading-related fixes and improvements to
+     libstdc++-v3, and the HP-UX port.
+
+   * James van Artsdalen wrote the code that makes efficient use of the
+     Intel 80387 register stack.
+
+   * Abramo and Roberto Bagnara for the SysV68 Motorola 3300 Delta
+     Series port.
+
+   * Alasdair Baird for various bug fixes.
+
+   * Giovanni Bajo for analyzing lots of complicated C++ problem
+     reports.
+
+   * Peter Barada for his work to improve code generation for new
+     ColdFire cores.
+
+   * Gerald Baumgartner added the signature extension to the C++ front
+     end.
+
+   * Godmar Back for his Java improvements and encouragement.
+
+   * Scott Bambrough for help porting the Java compiler.
+
+   * Wolfgang Bangerth for processing tons of bug reports.
+
+   * Jon Beniston for his Microsoft Windows port of Java and port to
+     Lattice Mico32.
+
+   * Daniel Berlin for better DWARF2 support, faster/better
+     optimizations, improved alias analysis, plus migrating GCC to
+     Bugzilla.
+
+   * Geoff Berry for his Java object serialization work and various
+     patches.
+
+   * Uros Bizjak for the implementation of x87 math built-in functions
+     and for various middle end and i386 back end improvements and bug
+     fixes.
+
+   * Eric Blake for helping to make GCJ and libgcj conform to the
+     specifications.
+
+   * Janne Blomqvist for contributions to GNU Fortran.
+
+   * Segher Boessenkool for various fixes.
+
+   * Hans-J. Boehm for his garbage collector, IA-64 libffi port, and
+     other Java work.
+
+   * Neil Booth for work on cpplib, lang hooks, debug hooks and other
+     miscellaneous clean-ups.
+
+   * Steven Bosscher for integrating the GNU Fortran front end into GCC
+     and for contributing to the tree-ssa branch.
+
+   * Eric Botcazou for fixing middle- and backend bugs left and right.
+
+   * Per Bothner for his direction via the steering committee and
+     various improvements to the infrastructure for supporting new
+     languages.  Chill front end implementation.  Initial
+     implementations of cpplib, fix-header, config.guess, libio, and
+     past C++ library (libg++) maintainer.  Dreaming up, designing and
+     implementing much of GCJ.
+
+   * Devon Bowen helped port GCC to the Tahoe.
+
+   * Don Bowman for mips-vxworks contributions.
+
+   * Dave Brolley for work on cpplib and Chill.
+
+   * Paul Brook for work on the ARM architecture and maintaining GNU
+     Fortran.
+
+   * Robert Brown implemented the support for Encore 32000 systems.
+
+   * Christian Bruel for improvements to local store elimination.
+
+   * Herman A.J. ten Brugge for various fixes.
+
+   * Joerg Brunsmann for Java compiler hacking and help with the GCJ
+     FAQ.
+
+   * Joe Buck for his direction via the steering committee.
+
+   * Craig Burley for leadership of the G77 Fortran effort.
+
+   * Stephan Buys for contributing Doxygen notes for libstdc++.
+
+   * Paolo Carlini for libstdc++ work: lots of efficiency improvements
+     to the C++ strings, streambufs and formatted I/O, hard detective
+     work on the frustrating localization issues, and keeping up with
+     the problem reports.
+
+   * John Carr for his alias work, SPARC hacking, infrastructure
+     improvements, previous contributions to the steering committee,
+     loop optimizations, etc.
+
+   * Stephane Carrez for 68HC11 and 68HC12 ports.
+
+   * Steve Chamberlain for support for the Renesas SH and H8 processors
+     and the PicoJava processor, and for GCJ config fixes.
+
+   * Glenn Chambers for help with the GCJ FAQ.
+
+   * John-Marc Chandonia for various libgcj patches.
+
+   * Denis Chertykov for contributing and maintaining the AVR port, the
+     first GCC port for an 8-bit architecture.
+
+   * Scott Christley for his Objective-C contributions.
+
+   * Eric Christopher for his Java porting help and clean-ups.
+
+   * Branko Cibej for more warning contributions.
+
+   * The GNU Classpath project for all of their merged runtime code.
+
+   * Nick Clifton for arm, mcore, fr30, v850, m32r, rx work, `--help',
+     and other random hacking.
+
+   * Michael Cook for libstdc++ cleanup patches to reduce warnings.
+
+   * R. Kelley Cook for making GCC buildable from a read-only directory
+     as well as other miscellaneous build process and documentation
+     clean-ups.
+
+   * Ralf Corsepius for SH testing and minor bug fixing.
+
+   * Stan Cox for care and feeding of the x86 port and lots of behind
+     the scenes hacking.
+
+   * Alex Crain provided changes for the 3b1.
+
+   * Ian Dall for major improvements to the NS32k port.
+
+   * Paul Dale for his work to add uClinux platform support to the m68k
+     backend.
+
+   * Dario Dariol contributed the four varieties of sample programs
+     that print a copy of their source.
+
+   * Russell Davidson for fstream and stringstream fixes in libstdc++.
+
+   * Bud Davis for work on the G77 and GNU Fortran compilers.
+
+   * Mo DeJong for GCJ and libgcj bug fixes.
+
+   * DJ Delorie for the DJGPP port, build and libiberty maintenance,
+     various bug fixes, and the M32C and MeP ports.
+
+   * Arnaud Desitter for helping to debug GNU Fortran.
+
+   * Gabriel Dos Reis for contributions to G++, contributions and
+     maintenance of GCC diagnostics infrastructure, libstdc++-v3,
+     including `valarray<>', `complex<>', maintaining the numerics
+     library (including that pesky `<limits>' :-) and keeping
+     up-to-date anything to do with numbers.
+
+   * Ulrich Drepper for his work on glibc, testing of GCC using glibc,
+     ISO C99 support, CFG dumping support, etc., plus support of the
+     C++ runtime libraries including for all kinds of C interface
+     issues, contributing and maintaining `complex<>', sanity checking
+     and disbursement, configuration architecture, libio maintenance,
+     and early math work.
+
+   * Zdenek Dvorak for a new loop unroller and various fixes.
+
+   * Michael Eager for his work on the Xilinx MicroBlaze port.
+
+   * Richard Earnshaw for his ongoing work with the ARM.
+
+   * David Edelsohn for his direction via the steering committee,
+     ongoing work with the RS6000/PowerPC port, help cleaning up Haifa
+     loop changes, doing the entire AIX port of libstdc++ with his bare
+     hands, and for ensuring GCC properly keeps working on AIX.
+
+   * Kevin Ediger for the floating point formatting of num_put::do_put
+     in libstdc++.
+
+   * Phil Edwards for libstdc++ work including configuration hackery,
+     documentation maintainer, chief breaker of the web pages, the
+     occasional iostream bug fix, and work on shared library symbol
+     versioning.
+
+   * Paul Eggert for random hacking all over GCC.
+
+   * Mark Elbrecht for various DJGPP improvements, and for libstdc++
+     configuration support for locales and fstream-related fixes.
+
+   * Vadim Egorov for libstdc++ fixes in strings, streambufs, and
+     iostreams.
+
+   * Christian Ehrhardt for dealing with bug reports.
+
+   * Ben Elliston for his work to move the Objective-C runtime into its
+     own subdirectory and for his work on autoconf.
+
+   * Revital Eres for work on the PowerPC 750CL port.
+
+   * Marc Espie for OpenBSD support.
+
+   * Doug Evans for much of the global optimization framework, arc,
+     m32r, and SPARC work.
+
+   * Christopher Faylor for his work on the Cygwin port and for caring
+     and feeding the gcc.gnu.org box and saving its users tons of spam.
+
+   * Fred Fish for BeOS support and Ada fixes.
+
+   * Ivan Fontes Garcia for the Portuguese translation of the GCJ FAQ.
+
+   * Peter Gerwinski for various bug fixes and the Pascal front end.
+
+   * Kaveh R. Ghazi for his direction via the steering committee,
+     amazing work to make `-W -Wall -W* -Werror' useful, and
+     continuously testing GCC on a plethora of platforms.  Kaveh
+     extends his gratitude to the CAIP Center at Rutgers University for
+     providing him with computing resources to work on Free Software
+     since the late 1980s.
+
+   * John Gilmore for a donation to the FSF earmarked improving GNU
+     Java.
+
+   * Judy Goldberg for c++ contributions.
+
+   * Torbjorn Granlund for various fixes and the c-torture testsuite,
+     multiply- and divide-by-constant optimization, improved long long
+     support, improved leaf function register allocation, and his
+     direction via the steering committee.
+
+   * Anthony Green for his `-Os' contributions, the moxie port, and
+     Java front end work.
+
+   * Stu Grossman for gdb hacking, allowing GCJ developers to debug
+     Java code.
+
+   * Michael K. Gschwind contributed the port to the PDP-11.
+
+   * Richard Guenther for his ongoing middle-end contributions and bug
+     fixes and for release management.
+
+   * Ron Guilmette implemented the `protoize' and `unprotoize' tools,
+     the support for Dwarf symbolic debugging information, and much of
+     the support for System V Release 4.  He has also worked heavily on
+     the Intel 386 and 860 support.
+
+   * Mostafa Hagog for Swing Modulo Scheduling (SMS) and post reload
+     GCSE.
+
+   * Bruno Haible for improvements in the runtime overhead for EH, new
+     warnings and assorted bug fixes.
+
+   * Andrew Haley for his amazing Java compiler and library efforts.
+
+   * Chris Hanson assisted in making GCC work on HP-UX for the 9000
+     series 300.
+
+   * Michael Hayes for various thankless work he's done trying to get
+     the c30/c40 ports functional.  Lots of loop and unroll
+     improvements and fixes.
+
+   * Dara Hazeghi for wading through myriads of target-specific bug
+     reports.
+
+   * Kate Hedstrom for staking the G77 folks with an initial testsuite.
+
+   * Richard Henderson for his ongoing SPARC, alpha, ia32, and ia64
+     work, loop opts, and generally fixing lots of old problems we've
+     ignored for years, flow rewrite and lots of further stuff,
+     including reviewing tons of patches.
+
+   * Aldy Hernandez for working on the PowerPC port, SIMD support, and
+     various fixes.
+
+   * Nobuyuki Hikichi of Software Research Associates, Tokyo,
+     contributed the support for the Sony NEWS machine.
+
+   * Kazu Hirata for caring and feeding the Renesas H8/300 port and
+     various fixes.
+
+   * Katherine Holcomb for work on GNU Fortran.
+
+   * Manfred Hollstein for his ongoing work to keep the m88k alive, lots
+     of testing and bug fixing, particularly of GCC configury code.
+
+   * Steve Holmgren for MachTen patches.
+
+   * Jan Hubicka for his x86 port improvements.
+
+   * Falk Hueffner for working on C and optimization bug reports.
+
+   * Bernardo Innocenti for his m68k work, including merging of
+     ColdFire improvements and uClinux support.
+
+   * Christian Iseli for various bug fixes.
+
+   * Kamil Iskra for general m68k hacking.
+
+   * Lee Iverson for random fixes and MIPS testing.
+
+   * Andreas Jaeger for testing and benchmarking of GCC and various bug
+     fixes.
+
+   * Jakub Jelinek for his SPARC work and sibling call optimizations as
+     well as lots of bug fixes and test cases, and for improving the
+     Java build system.
+
+   * Janis Johnson for ia64 testing and fixes, her quality improvement
+     sidetracks, and web page maintenance.
+
+   * Kean Johnston for SCO OpenServer support and various fixes.
+
+   * Tim Josling for the sample language treelang based originally on
+     Richard Kenner's "toy" language.
+
+   * Nicolai Josuttis for additional libstdc++ documentation.
+
+   * Klaus Kaempf for his ongoing work to make alpha-vms a viable
+     target.
+
+   * Steven G. Kargl for work on GNU Fortran.
+
+   * David Kashtan of SRI adapted GCC to VMS.
+
+   * Ryszard Kabatek for many, many libstdc++ bug fixes and
+     optimizations of strings, especially member functions, and for
+     auto_ptr fixes.
+
+   * Geoffrey Keating for his ongoing work to make the PPC work for
+     GNU/Linux and his automatic regression tester.
+
+   * Brendan Kehoe for his ongoing work with G++ and for a lot of early
+     work in just about every part of libstdc++.
+
+   * Oliver M. Kellogg of Deutsche Aerospace contributed the port to the
+     MIL-STD-1750A.
+
+   * Richard Kenner of the New York University Ultracomputer Research
+     Laboratory wrote the machine descriptions for the AMD 29000, the
+     DEC Alpha, the IBM RT PC, and the IBM RS/6000 as well as the
+     support for instruction attributes.  He also made changes to
+     better support RISC processors including changes to common
+     subexpression elimination, strength reduction, function calling
+     sequence handling, and condition code support, in addition to
+     generalizing the code for frame pointer elimination and delay slot
+     scheduling.  Richard Kenner was also the head maintainer of GCC
+     for several years.
+
+   * Mumit Khan for various contributions to the Cygwin and Mingw32
+     ports and maintaining binary releases for Microsoft Windows hosts,
+     and for massive libstdc++ porting work to Cygwin/Mingw32.
+
+   * Robin Kirkham for cpu32 support.
+
+   * Mark Klein for PA improvements.
+
+   * Thomas Koenig for various bug fixes.
+
+   * Bruce Korb for the new and improved fixincludes code.
+
+   * Benjamin Kosnik for his G++ work and for leading the libstdc++-v3
+     effort.
+
+   * Charles LaBrec contributed the support for the Integrated Solutions
+     68020 system.
+
+   * Asher Langton and Mike Kumbera for contributing Cray pointer
+     support to GNU Fortran, and for other GNU Fortran improvements.
+
+   * Jeff Law for his direction via the steering committee,
+     coordinating the entire egcs project and GCC 2.95, rolling out
+     snapshots and releases, handling merges from GCC2, reviewing tons
+     of patches that might have fallen through the cracks else, and
+     random but extensive hacking.
+
+   * Marc Lehmann for his direction via the steering committee and
+     helping with analysis and improvements of x86 performance.
+
+   * Victor Leikehman for work on GNU Fortran.
+
+   * Ted Lemon wrote parts of the RTL reader and printer.
+
+   * Kriang Lerdsuwanakij for C++ improvements including template as
+     template parameter support, and many C++ fixes.
+
+   * Warren Levy for tremendous work on libgcj (Java Runtime Library)
+     and random work on the Java front end.
+
+   * Alain Lichnewsky ported GCC to the MIPS CPU.
+
+   * Oskar Liljeblad for hacking on AWT and his many Java bug reports
+     and patches.
+
+   * Robert Lipe for OpenServer support, new testsuites, testing, etc.
+
+   * Chen Liqin for various S+core related fixes/improvement, and for
+     maintaining the S+core port.
+
+   * Weiwen Liu for testing and various bug fixes.
+
+   * Manuel Lo'pez-Iba'n~ez for improving `-Wconversion' and many other
+     diagnostics fixes and improvements.
+
+   * Dave Love for his ongoing work with the Fortran front end and
+     runtime libraries.
+
+   * Martin von Lo"wis for internal consistency checking infrastructure,
+     various C++ improvements including namespace support, and tons of
+     assistance with libstdc++/compiler merges.
+
+   * H.J. Lu for his previous contributions to the steering committee,
+     many x86 bug reports, prototype patches, and keeping the GNU/Linux
+     ports working.
+
+   * Greg McGary for random fixes and (someday) bounded pointers.
+
+   * Andrew MacLeod for his ongoing work in building a real EH system,
+     various code generation improvements, work on the global
+     optimizer, etc.
+
+   * Vladimir Makarov for hacking some ugly i960 problems, PowerPC
+     hacking improvements to compile-time performance, overall
+     knowledge and direction in the area of instruction scheduling, and
+     design and implementation of the automaton based instruction
+     scheduler.
+
+   * Bob Manson for his behind the scenes work on dejagnu.
+
+   * Philip Martin for lots of libstdc++ string and vector iterator
+     fixes and improvements, and string clean up and testsuites.
+
+   * All of the Mauve project contributors, for Java test code.
+
+   * Bryce McKinlay for numerous GCJ and libgcj fixes and improvements.
+
+   * Adam Megacz for his work on the Microsoft Windows port of GCJ.
+
+   * Michael Meissner for LRS framework, ia32, m32r, v850, m88k, MIPS,
+     powerpc, haifa, ECOFF debug support, and other assorted hacking.
+
+   * Jason Merrill for his direction via the steering committee and
+     leading the G++ effort.
+
+   * Martin Michlmayr for testing GCC on several architectures using the
+     entire Debian archive.
+
+   * David Miller for his direction via the steering committee, lots of
+     SPARC work, improvements in jump.c and interfacing with the Linux
+     kernel developers.
+
+   * Gary Miller ported GCC to Charles River Data Systems machines.
+
+   * Alfred Minarik for libstdc++ string and ios bug fixes, and turning
+     the entire libstdc++ testsuite namespace-compatible.
+
+   * Mark Mitchell for his direction via the steering committee,
+     mountains of C++ work, load/store hoisting out of loops, alias
+     analysis improvements, ISO C `restrict' support, and serving as
+     release manager for GCC 3.x.
+
+   * Alan Modra for various GNU/Linux bits and testing.
+
+   * Toon Moene for his direction via the steering committee, Fortran
+     maintenance, and his ongoing work to make us make Fortran run fast.
+
+   * Jason Molenda for major help in the care and feeding of all the
+     services on the gcc.gnu.org (formerly egcs.cygnus.com)
+     machine--mail, web services, ftp services, etc etc.  Doing all
+     this work on scrap paper and the backs of envelopes would have
+     been... difficult.
+
+   * Catherine Moore for fixing various ugly problems we have sent her
+     way, including the haifa bug which was killing the Alpha & PowerPC
+     Linux kernels.
+
+   * Mike Moreton for his various Java patches.
+
+   * David Mosberger-Tang for various Alpha improvements, and for the
+     initial IA-64 port.
+
+   * Stephen Moshier contributed the floating point emulator that
+     assists in cross-compilation and permits support for floating
+     point numbers wider than 64 bits and for ISO C99 support.
+
+   * Bill Moyer for his behind the scenes work on various issues.
+
+   * Philippe De Muyter for his work on the m68k port.
+
+   * Joseph S. Myers for his work on the PDP-11 port, format checking
+     and ISO C99 support, and continuous emphasis on (and contributions
+     to) documentation.
+
+   * Nathan Myers for his work on libstdc++-v3: architecture and
+     authorship through the first three snapshots, including
+     implementation of locale infrastructure, string, shadow C headers,
+     and the initial project documentation (DESIGN, CHECKLIST, and so
+     forth).  Later, more work on MT-safe string and shadow headers.
+
+   * Felix Natter for documentation on porting libstdc++.
+
+   * Nathanael Nerode for cleaning up the configuration/build process.
+
+   * NeXT, Inc. donated the front end that supports the Objective-C
+     language.
+
+   * Hans-Peter Nilsson for the CRIS and MMIX ports, improvements to
+     the search engine setup, various documentation fixes and other
+     small fixes.
+
+   * Geoff Noer for his work on getting cygwin native builds working.
+
+   * Diego Novillo for his work on Tree SSA, OpenMP, SPEC performance
+     tracking web pages, GIMPLE tuples, and assorted fixes.
+
+   * David O'Brien for the FreeBSD/alpha, FreeBSD/AMD x86-64,
+     FreeBSD/ARM, FreeBSD/PowerPC, and FreeBSD/SPARC64 ports and
+     related infrastructure improvements.
+
+   * Alexandre Oliva for various build infrastructure improvements,
+     scripts and amazing testing work, including keeping libtool issues
+     sane and happy.
+
+   * Stefan Olsson for work on mt_alloc.
+
+   * Melissa O'Neill for various NeXT fixes.
+
+   * Rainer Orth for random MIPS work, including improvements to GCC's
+     o32 ABI support, improvements to dejagnu's MIPS support, Java
+     configuration clean-ups and porting work, and maintaining the
+     IRIX, Solaris 2, and Tru64 UNIX ports.
+
+   * Hartmut Penner for work on the s390 port.
+
+   * Paul Petersen wrote the machine description for the Alliant FX/8.
+
+   * Alexandre Petit-Bianco for implementing much of the Java compiler
+     and continued Java maintainership.
+
+   * Matthias Pfaller for major improvements to the NS32k port.
+
+   * Gerald Pfeifer for his direction via the steering committee,
+     pointing out lots of problems we need to solve, maintenance of the
+     web pages, and taking care of documentation maintenance in general.
+
+   * Andrew Pinski for processing bug reports by the dozen.
+
+   * Ovidiu Predescu for his work on the Objective-C front end and
+     runtime libraries.
+
+   * Jerry Quinn for major performance improvements in C++ formatted
+     I/O.
+
+   * Ken Raeburn for various improvements to checker, MIPS ports and
+     various cleanups in the compiler.
+
+   * Rolf W. Rasmussen for hacking on AWT.
+
+   * David Reese of Sun Microsystems contributed to the Solaris on
+     PowerPC port.
+
+   * Volker Reichelt for keeping up with the problem reports.
+
+   * Joern Rennecke for maintaining the sh port, loop, regmove & reload
+     hacking.
+
+   * Loren J. Rittle for improvements to libstdc++-v3 including the
+     FreeBSD port, threading fixes, thread-related configury changes,
+     critical threading documentation, and solutions to really tricky
+     I/O problems, as well as keeping GCC properly working on FreeBSD
+     and continuous testing.
+
+   * Craig Rodrigues for processing tons of bug reports.
+
+   * Ola Ro"nnerup for work on mt_alloc.
+
+   * Gavin Romig-Koch for lots of behind the scenes MIPS work.
+
+   * David Ronis inspired and encouraged Craig to rewrite the G77
+     documentation in texinfo format by contributing a first pass at a
+     translation of the old `g77-0.5.16/f/DOC' file.
+
+   * Ken Rose for fixes to GCC's delay slot filling code.
+
+   * Paul Rubin wrote most of the preprocessor.
+
+   * Pe'tur Runo'lfsson for major performance improvements in C++
+     formatted I/O and large file support in C++ filebuf.
+
+   * Chip Salzenberg for libstdc++ patches and improvements to locales,
+     traits, Makefiles, libio, libtool hackery, and "long long" support.
+
+   * Juha Sarlin for improvements to the H8 code generator.
+
+   * Greg Satz assisted in making GCC work on HP-UX for the 9000 series
+     300.
+
+   * Roger Sayle for improvements to constant folding and GCC's RTL
+     optimizers as well as for fixing numerous bugs.
+
+   * Bradley Schatz for his work on the GCJ FAQ.
+
+   * Peter Schauer wrote the code to allow debugging to work on the
+     Alpha.
+
+   * William Schelter did most of the work on the Intel 80386 support.
+
+   * Tobias Schlu"ter for work on GNU Fortran.
+
+   * Bernd Schmidt for various code generation improvements and major
+     work in the reload pass as well a serving as release manager for
+     GCC 2.95.3.
+
+   * Peter Schmid for constant testing of libstdc++--especially
+     application testing, going above and beyond what was requested for
+     the release criteria--and libstdc++ header file tweaks.
+
+   * Jason Schroeder for jcf-dump patches.
+
+   * Andreas Schwab for his work on the m68k port.
+
+   * Lars Segerlund for work on GNU Fortran.
+
+   * Dodji Seketeli for numerous C++ bug fixes and debug info
+     improvements.
+
+   * Joel Sherrill for his direction via the steering committee, RTEMS
+     contributions and RTEMS testing.
+
+   * Nathan Sidwell for many C++ fixes/improvements.
+
+   * Jeffrey Siegal for helping RMS with the original design of GCC,
+     some code which handles the parse tree and RTL data structures,
+     constant folding and help with the original VAX & m68k ports.
+
+   * Kenny Simpson for prompting libstdc++ fixes due to defect reports
+     from the LWG (thereby keeping GCC in line with updates from the
+     ISO).
+
+   * Franz Sirl for his ongoing work with making the PPC port stable
+     for GNU/Linux.
+
+   * Andrey Slepuhin for assorted AIX hacking.
+
+   * Trevor Smigiel for contributing the SPU port.
+
+   * Christopher Smith did the port for Convex machines.
+
+   * Danny Smith for his major efforts on the Mingw (and Cygwin) ports.
+
+   * Randy Smith finished the Sun FPA support.
+
+   * Scott Snyder for queue, iterator, istream, and string fixes and
+     libstdc++ testsuite entries.  Also for providing the patch to G77
+     to add rudimentary support for `INTEGER*1', `INTEGER*2', and
+     `LOGICAL*1'.
+
+   * Brad Spencer for contributions to the GLIBCPP_FORCE_NEW technique.
+
+   * Richard Stallman, for writing the original GCC and launching the
+     GNU project.
+
+   * Jan Stein of the Chalmers Computer Society provided support for
+     Genix, as well as part of the 32000 machine description.
+
+   * Nigel Stephens for various mips16 related fixes/improvements.
+
+   * Jonathan Stone wrote the machine description for the Pyramid
+     computer.
+
+   * Graham Stott for various infrastructure improvements.
+
+   * John Stracke for his Java HTTP protocol fixes.
+
+   * Mike Stump for his Elxsi port, G++ contributions over the years
+     and more recently his vxworks contributions
+
+   * Jeff Sturm for Java porting help, bug fixes, and encouragement.
+
+   * Shigeya Suzuki for this fixes for the bsdi platforms.
+
+   * Ian Lance Taylor for the Go frontend, the initial mips16 and mips64
+     support, general configury hacking, fixincludes, etc.
+
+   * Holger Teutsch provided the support for the Clipper CPU.
+
+   * Gary Thomas for his ongoing work to make the PPC work for
+     GNU/Linux.
+
+   * Philipp Thomas for random bug fixes throughout the compiler
+
+   * Jason Thorpe for thread support in libstdc++ on NetBSD.
+
+   * Kresten Krab Thorup wrote the run time support for the Objective-C
+     language and the fantastic Java bytecode interpreter.
+
+   * Michael Tiemann for random bug fixes, the first instruction
+     scheduler, initial C++ support, function integration, NS32k, SPARC
+     and M88k machine description work, delay slot scheduling.
+
+   * Andreas Tobler for his work porting libgcj to Darwin.
+
+   * Teemu Torma for thread safe exception handling support.
+
+   * Leonard Tower wrote parts of the parser, RTL generator, and RTL
+     definitions, and of the VAX machine description.
+
+   * Daniel Towner and Hariharan Sandanagobalane contributed and
+     maintain the picoChip port.
+
+   * Tom Tromey for internationalization support and for his many Java
+     contributions and libgcj maintainership.
+
+   * Lassi Tuura for improvements to config.guess to determine HP
+     processor types.
+
+   * Petter Urkedal for libstdc++ CXXFLAGS, math, and algorithms fixes.
+
+   * Andy Vaught for the design and initial implementation of the GNU
+     Fortran front end.
+
+   * Brent Verner for work with the libstdc++ cshadow files and their
+     associated configure steps.
+
+   * Todd Vierling for contributions for NetBSD ports.
+
+   * Jonathan Wakely for contributing libstdc++ Doxygen notes and XHTML
+     guidance.
+
+   * Dean Wakerley for converting the install documentation from HTML
+     to texinfo in time for GCC 3.0.
+
+   * Krister Walfridsson for random bug fixes.
+
+   * Feng Wang for contributions to GNU Fortran.
+
+   * Stephen M. Webb for time and effort on making libstdc++ shadow
+     files work with the tricky Solaris 8+ headers, and for pushing the
+     build-time header tree.
+
+   * John Wehle for various improvements for the x86 code generator,
+     related infrastructure improvements to help x86 code generation,
+     value range propagation and other work, WE32k port.
+
+   * Ulrich Weigand for work on the s390 port.
+
+   * Zack Weinberg for major work on cpplib and various other bug fixes.
+
+   * Matt Welsh for help with Linux Threads support in GCJ.
+
+   * Urban Widmark for help fixing java.io.
+
+   * Mark Wielaard for new Java library code and his work integrating
+     with Classpath.
+
+   * Dale Wiles helped port GCC to the Tahoe.
+
+   * Bob Wilson from Tensilica, Inc. for the Xtensa port.
+
+   * Jim Wilson for his direction via the steering committee, tackling
+     hard problems in various places that nobody else wanted to work
+     on, strength reduction and other loop optimizations.
+
+   * Paul Woegerer and Tal Agmon for the CRX port.
+
+   * Carlo Wood for various fixes.
+
+   * Tom Wood for work on the m88k port.
+
+   * Canqun Yang for work on GNU Fortran.
+
+   * Masanobu Yuhara of Fujitsu Laboratories implemented the machine
+     description for the Tron architecture (specifically, the Gmicro).
+
+   * Kevin Zachmann helped port GCC to the Tahoe.
+
+   * Ayal Zaks for Swing Modulo Scheduling (SMS).
+
+   * Xiaoqiang Zhang for work on GNU Fortran.
+
+   * Gilles Zunino for help porting Java to Irix.
+
+
+ The following people are recognized for their contributions to GNAT,
+the Ada front end of GCC:
+   * Bernard Banner
+
+   * Romain Berrendonner
+
+   * Geert Bosch
+
+   * Emmanuel Briot
+
+   * Joel Brobecker
+
+   * Ben Brosgol
+
+   * Vincent Celier
+
+   * Arnaud Charlet
+
+   * Chien Chieng
+
+   * Cyrille Comar
+
+   * Cyrille Crozes
+
+   * Robert Dewar
+
+   * Gary Dismukes
+
+   * Robert Duff
+
+   * Ed Falis
+
+   * Ramon Fernandez
+
+   * Sam Figueroa
+
+   * Vasiliy Fofanov
+
+   * Michael Friess
+
+   * Franco Gasperoni
+
+   * Ted Giering
+
+   * Matthew Gingell
+
+   * Laurent Guerby
+
+   * Jerome Guitton
+
+   * Olivier Hainque
+
+   * Jerome Hugues
+
+   * Hristian Kirtchev
+
+   * Jerome Lambourg
+
+   * Bruno Leclerc
+
+   * Albert Lee
+
+   * Sean McNeil
+
+   * Javier Miranda
+
+   * Laurent Nana
+
+   * Pascal Obry
+
+   * Dong-Ik Oh
+
+   * Laurent Pautet
+
+   * Brett Porter
+
+   * Thomas Quinot
+
+   * Nicolas Roche
+
+   * Pat Rogers
+
+   * Jose Ruiz
+
+   * Douglas Rupp
+
+   * Sergey Rybin
+
+   * Gail Schenker
+
+   * Ed Schonberg
+
+   * Nicolas Setton
+
+   * Samuel Tardieu
+
+
+ The following people are recognized for their contributions of new
+features, bug reports, testing and integration of classpath/libgcj for
+GCC version 4.1:
+   * Lillian Angel for `JTree' implementation and lots Free Swing
+     additions and bug fixes.
+
+   * Wolfgang Baer for `GapContent' bug fixes.
+
+   * Anthony Balkissoon for `JList', Free Swing 1.5 updates and mouse
+     event fixes, lots of Free Swing work including `JTable' editing.
+
+   * Stuart Ballard for RMI constant fixes.
+
+   * Goffredo Baroncelli for `HTTPURLConnection' fixes.
+
+   * Gary Benson for `MessageFormat' fixes.
+
+   * Daniel Bonniot for `Serialization' fixes.
+
+   * Chris Burdess for lots of gnu.xml and http protocol fixes, `StAX'
+     and `DOM xml:id' support.
+
+   * Ka-Hing Cheung for `TreePath' and `TreeSelection' fixes.
+
+   * Archie Cobbs for build fixes, VM interface updates,
+     `URLClassLoader' updates.
+
+   * Kelley Cook for build fixes.
+
+   * Martin Cordova for Suggestions for better `SocketTimeoutException'.
+
+   * David Daney for `BitSet' bug fixes, `HttpURLConnection' rewrite
+     and improvements.
+
+   * Thomas Fitzsimmons for lots of upgrades to the gtk+ AWT and Cairo
+     2D support. Lots of imageio framework additions, lots of AWT and
+     Free Swing bug fixes.
+
+   * Jeroen Frijters for `ClassLoader' and nio cleanups, serialization
+     fixes, better `Proxy' support, bug fixes and IKVM integration.
+
+   * Santiago Gala for `AccessControlContext' fixes.
+
+   * Nicolas Geoffray for `VMClassLoader' and `AccessController'
+     improvements.
+
+   * David Gilbert for `basic' and `metal' icon and plaf support and
+     lots of documenting, Lots of Free Swing and metal theme additions.
+     `MetalIconFactory' implementation.
+
+   * Anthony Green for `MIDI' framework, `ALSA' and `DSSI' providers.
+
+   * Andrew Haley for `Serialization' and `URLClassLoader' fixes, gcj
+     build speedups.
+
+   * Kim Ho for `JFileChooser' implementation.
+
+   * Andrew John Hughes for `Locale' and net fixes, URI RFC2986
+     updates, `Serialization' fixes, `Properties' XML support and
+     generic branch work, VMIntegration guide update.
+
+   * Bastiaan Huisman for `TimeZone' bug fixing.
+
+   * Andreas Jaeger for mprec updates.
+
+   * Paul Jenner for better `-Werror' support.
+
+   * Ito Kazumitsu for `NetworkInterface' implementation and updates.
+
+   * Roman Kennke for `BoxLayout', `GrayFilter' and `SplitPane', plus
+     bug fixes all over. Lots of Free Swing work including styled text.
+
+   * Simon Kitching for `String' cleanups and optimization suggestions.
+
+   * Michael Koch for configuration fixes, `Locale' updates, bug and
+     build fixes.
+
+   * Guilhem Lavaux for configuration, thread and channel fixes and
+     Kaffe integration. JCL native `Pointer' updates. Logger bug fixes.
+
+   * David Lichteblau for JCL support library global/local reference
+     cleanups.
+
+   * Aaron Luchko for JDWP updates and documentation fixes.
+
+   * Ziga Mahkovec for `Graphics2D' upgraded to Cairo 0.5 and new regex
+     features.
+
+   * Sven de Marothy for BMP imageio support, CSS and `TextLayout'
+     fixes. `GtkImage' rewrite, 2D, awt, free swing and date/time fixes
+     and implementing the Qt4 peers.
+
+   * Casey Marshall for crypto algorithm fixes, `FileChannel' lock,
+     `SystemLogger' and `FileHandler' rotate implementations, NIO
+     `FileChannel.map' support, security and policy updates.
+
+   * Bryce McKinlay for RMI work.
+
+   * Audrius Meskauskas for lots of Free Corba, RMI and HTML work plus
+     testing and documenting.
+
+   * Kalle Olavi Niemitalo for build fixes.
+
+   * Rainer Orth for build fixes.
+
+   * Andrew Overholt for `File' locking fixes.
+
+   * Ingo Proetel for `Image', `Logger' and `URLClassLoader' updates.
+
+   * Olga Rodimina for `MenuSelectionManager' implementation.
+
+   * Jan Roehrich for `BasicTreeUI' and `JTree' fixes.
+
+   * Julian Scheid for documentation updates and gjdoc support.
+
+   * Christian Schlichtherle for zip fixes and cleanups.
+
+   * Robert Schuster for documentation updates and beans fixes,
+     `TreeNode' enumerations and `ActionCommand' and various fixes, XML
+     and URL, AWT and Free Swing bug fixes.
+
+   * Keith Seitz for lots of JDWP work.
+
+   * Christian Thalinger for 64-bit cleanups, Configuration and VM
+     interface fixes and `CACAO' integration, `fdlibm' updates.
+
+   * Gael Thomas for `VMClassLoader' boot packages support suggestions.
+
+   * Andreas Tobler for Darwin and Solaris testing and fixing, `Qt4'
+     support for Darwin/OS X, `Graphics2D' support, `gtk+' updates.
+
+   * Dalibor Topic for better `DEBUG' support, build cleanups and Kaffe
+     integration. `Qt4' build infrastructure, `SHA1PRNG' and
+     `GdkPixbugDecoder' updates.
+
+   * Tom Tromey for Eclipse integration, generics work, lots of bug
+     fixes and gcj integration including coordinating The Big Merge.
+
+   * Mark Wielaard for bug fixes, packaging and release management,
+     `Clipboard' implementation, system call interrupts and network
+     timeouts and `GdkPixpufDecoder' fixes.
+
+
+ In addition to the above, all of which also contributed time and
+energy in testing GCC, we would like to thank the following for their
+contributions to testing:
+
+   * Michael Abd-El-Malek
+
+   * Thomas Arend
+
+   * Bonzo Armstrong
+
+   * Steven Ashe
+
+   * Chris Baldwin
+
+   * David Billinghurst
+
+   * Jim Blandy
+
+   * Stephane Bortzmeyer
+
+   * Horst von Brand
+
+   * Frank Braun
+
+   * Rodney Brown
+
+   * Sidney Cadot
+
+   * Bradford Castalia
+
+   * Robert Clark
+
+   * Jonathan Corbet
+
+   * Ralph Doncaster
+
+   * Richard Emberson
+
+   * Levente Farkas
+
+   * Graham Fawcett
+
+   * Mark Fernyhough
+
+   * Robert A. French
+
+   * Jo"rgen Freyh
+
+   * Mark K. Gardner
+
+   * Charles-Antoine Gauthier
+
+   * Yung Shing Gene
+
+   * David Gilbert
+
+   * Simon Gornall
+
+   * Fred Gray
+
+   * John Griffin
+
+   * Patrik Hagglund
+
+   * Phil Hargett
+
+   * Amancio Hasty
+
+   * Takafumi Hayashi
+
+   * Bryan W. Headley
+
+   * Kevin B. Hendricks
+
+   * Joep Jansen
+
+   * Christian Joensson
+
+   * Michel Kern
+
+   * David Kidd
+
+   * Tobias Kuipers
+
+   * Anand Krishnaswamy
+
+   * A. O. V. Le Blanc
+
+   * llewelly
+
+   * Damon Love
+
+   * Brad Lucier
+
+   * Matthias Klose
+
+   * Martin Knoblauch
+
+   * Rick Lutowski
+
+   * Jesse Macnish
+
+   * Stefan Morrell
+
+   * Anon A. Mous
+
+   * Matthias Mueller
+
+   * Pekka Nikander
+
+   * Rick Niles
+
+   * Jon Olson
+
+   * Magnus Persson
+
+   * Chris Pollard
+
+   * Richard Polton
+
+   * Derk Reefman
+
+   * David Rees
+
+   * Paul Reilly
+
+   * Tom Reilly
+
+   * Torsten Rueger
+
+   * Danny Sadinoff
+
+   * Marc Schifer
+
+   * Erik Schnetter
+
+   * Wayne K. Schroll
+
+   * David Schuler
+
+   * Vin Shelton
+
+   * Tim Souder
+
+   * Adam Sulmicki
+
+   * Bill Thorson
+
+   * George Talbot
+
+   * Pedro A. M. Vazquez
+
+   * Gregory Warnes
+
+   * Ian Watson
+
+   * David E. Young
+
+   * And many others
+
+ And finally we'd like to thank everyone who uses the compiler, provides
+feedback and generally reminds us why we're doing this work in the first
+place.
+
+
+File: gcc.info,  Node: Option Index,  Next: Keyword Index,  Prev: Contributors,  Up: Top
+
+Option Index
+************
+
+GCC's command line options are indexed here without any initial `-' or
+`--'.  Where an option has both positive and negative forms (such as
+`-fOPTION' and `-fno-OPTION'), relevant entries in the manual are
+indexed under the most appropriate form; it may sometimes be useful to
+look up both forms.
+
+
+* Menu:
+
+* ###:                                   Overall Options.    (line  209)
+* -fno-keep-inline-dllexport:            Optimize Options.   (line  305)
+* -mcpu:                                 RX Options.         (line   30)
+* 8bit-idiv:                             i386 and x86-64 Options.
+                                                             (line  684)
+* A:                                     Preprocessor Options.
+                                                             (line  551)
+* all_load:                              Darwin Options.     (line  112)
+* allowable_client:                      Darwin Options.     (line  199)
+* ansi <1>:                              Non-bugs.           (line  107)
+* ansi <2>:                              Other Builtins.     (line   22)
+* ansi <3>:                              Preprocessor Options.
+                                                             (line  326)
+* ansi <4>:                              C Dialect Options.  (line   11)
+* ansi:                                  Standards.          (line   16)
+* arch_errors_fatal:                     Darwin Options.     (line  116)
+* aux-info:                              C Dialect Options.  (line  154)
+* avx256-split-unaligned-load:           i386 and x86-64 Options.
+                                                             (line  693)
+* avx256-split-unaligned-store:          i386 and x86-64 Options.
+                                                             (line  693)
+* B:                                     Directory Options.  (line   46)
+* Bdynamic:                              VxWorks Options.    (line   22)
+* bind_at_load:                          Darwin Options.     (line  120)
+* Bstatic:                               VxWorks Options.    (line   22)
+* bundle:                                Darwin Options.     (line  125)
+* bundle_loader:                         Darwin Options.     (line  129)
+* c:                                     Link Options.       (line   20)
+* C:                                     Preprocessor Options.
+                                                             (line  609)
+* c:                                     Overall Options.    (line  164)
+* client_name:                           Darwin Options.     (line  199)
+* compatibility_version:                 Darwin Options.     (line  199)
+* coverage:                              Debugging Options.  (line  367)
+* current_version:                       Darwin Options.     (line  199)
+* D:                                     Preprocessor Options.
+                                                             (line   34)
+* d:                                     Debugging Options.  (line  431)
+* dA:                                    Debugging Options.  (line  639)
+* da:                                    Debugging Options.  (line  636)
+* dD <1>:                                Preprocessor Options.
+                                                             (line  583)
+* dD:                                    Debugging Options.  (line  643)
+* dead_strip:                            Darwin Options.     (line  199)
+* dependency-file:                       Darwin Options.     (line  199)
+* dH:                                    Debugging Options.  (line  647)
+* dI:                                    Preprocessor Options.
+                                                             (line  592)
+* dM:                                    Preprocessor Options.
+                                                             (line  567)
+* dN:                                    Preprocessor Options.
+                                                             (line  589)
+* dP:                                    Debugging Options.  (line  655)
+* dp:                                    Debugging Options.  (line  650)
+* dU:                                    Preprocessor Options.
+                                                             (line  596)
+* dumpmachine:                           Debugging Options.  (line 1134)
+* dumpspecs:                             Debugging Options.  (line 1142)
+* dumpversion:                           Debugging Options.  (line 1138)
+* dv:                                    Debugging Options.  (line  659)
+* dx:                                    Debugging Options.  (line  664)
+* dylib_file:                            Darwin Options.     (line  199)
+* dylinker_install_name:                 Darwin Options.     (line  199)
+* dynamic:                               Darwin Options.     (line  199)
+* dynamiclib:                            Darwin Options.     (line  133)
+* E <1>:                                 Link Options.       (line   20)
+* E:                                     Overall Options.    (line  185)
+* EB <1>:                                MIPS Options.       (line    7)
+* EB:                                    ARC Options.        (line   12)
+* EL <1>:                                MIPS Options.       (line   10)
+* EL:                                    ARC Options.        (line    9)
+* exported_symbols_list:                 Darwin Options.     (line  199)
+* F:                                     Darwin Options.     (line   32)
+* fabi-version:                          C++ Dialect Options.
+                                                             (line   20)
+* falign-functions:                      Optimize Options.   (line 1394)
+* falign-jumps:                          Optimize Options.   (line 1444)
+* falign-labels:                         Optimize Options.   (line 1412)
+* falign-loops:                          Optimize Options.   (line 1430)
+* fassociative-math:                     Optimize Options.   (line 1868)
+* fasynchronous-unwind-tables:           Code Gen Options.   (line   64)
+* fauto-inc-dec:                         Optimize Options.   (line  510)
+* fbounds-check:                         Code Gen Options.   (line   15)
+* fbranch-probabilities:                 Optimize Options.   (line 1996)
+* fbranch-target-load-optimize:          Optimize Options.   (line 2103)
+* fbranch-target-load-optimize2:         Optimize Options.   (line 2109)
+* fbtr-bb-exclusive:                     Optimize Options.   (line 2113)
+* fcall-saved:                           Code Gen Options.   (line  262)
+* fcall-used:                            Code Gen Options.   (line  248)
+* fcaller-saves:                         Optimize Options.   (line  779)
+* fcheck-data-deps:                      Optimize Options.   (line 1052)
+* fcheck-new:                            C++ Dialect Options.
+                                                             (line   45)
+* fcombine-stack-adjustments:            Optimize Options.   (line  792)
+* fcommon:                               Variable Attributes.
+                                                             (line  105)
+* fcompare-debug:                        Debugging Options.  (line  156)
+* fcompare-debug-second:                 Debugging Options.  (line  182)
+* fcompare-elim:                         Optimize Options.   (line 1714)
+* fcond-mismatch:                        C Dialect Options.  (line  290)
+* fconserve-space:                       C++ Dialect Options.
+                                                             (line   55)
+* fconserve-stack:                       Optimize Options.   (line  798)
+* fconstant-string-class:                Objective-C and Objective-C++ Dialect Options.
+                                                             (line   30)
+* fconstexpr-depth:                      C++ Dialect Options.
+                                                             (line   67)
+* fcprop-registers:                      Optimize Options.   (line 1726)
+* fcrossjumping:                         Optimize Options.   (line  503)
+* fcse-follow-jumps:                     Optimize Options.   (line  431)
+* fcse-skip-blocks:                      Optimize Options.   (line  440)
+* fcx-fortran-rules:                     Optimize Options.   (line 1982)
+* fcx-limited-range:                     Optimize Options.   (line 1970)
+* fdata-sections:                        Optimize Options.   (line 2084)
+* fdbg-cnt:                              Debugging Options.  (line  420)
+* fdbg-cnt-list:                         Debugging Options.  (line  417)
+* fdce:                                  Optimize Options.   (line  516)
+* fdebug-prefix-map:                     Debugging Options.  (line  283)
+* fdelayed-branch:                       Optimize Options.   (line  628)
+* fdelete-null-pointer-checks:           Optimize Options.   (line  539)
+* fdevirtualize:                         Optimize Options.   (line  557)
+* fdiagnostics-show-location:            Language Independent Options.
+                                                             (line   21)
+* fdiagnostics-show-option:              Language Independent Options.
+                                                             (line   36)
+* fdirectives-only:                      Preprocessor Options.
+                                                             (line  459)
+* fdollars-in-identifiers <1>:           Interoperation.     (line  146)
+* fdollars-in-identifiers:               Preprocessor Options.
+                                                             (line  481)
+* fdse:                                  Optimize Options.   (line  520)
+* fdump-class-hierarchy:                 Debugging Options.  (line  695)
+* fdump-final-insns:                     Debugging Options.  (line  150)
+* fdump-ipa:                             Debugging Options.  (line  703)
+* fdump-noaddr:                          Debugging Options.  (line  668)
+* fdump-rtl-alignments:                  Debugging Options.  (line  450)
+* fdump-rtl-all:                         Debugging Options.  (line  636)
+* fdump-rtl-asmcons:                     Debugging Options.  (line  453)
+* fdump-rtl-auto_inc_dec:                Debugging Options.  (line  457)
+* fdump-rtl-barriers:                    Debugging Options.  (line  461)
+* fdump-rtl-bbpart:                      Debugging Options.  (line  464)
+* fdump-rtl-bbro:                        Debugging Options.  (line  467)
+* fdump-rtl-btl2:                        Debugging Options.  (line  471)
+* fdump-rtl-bypass:                      Debugging Options.  (line  475)
+* fdump-rtl-ce1:                         Debugging Options.  (line  486)
+* fdump-rtl-ce2:                         Debugging Options.  (line  486)
+* fdump-rtl-ce3:                         Debugging Options.  (line  486)
+* fdump-rtl-combine:                     Debugging Options.  (line  478)
+* fdump-rtl-compgotos:                   Debugging Options.  (line  481)
+* fdump-rtl-cprop_hardreg:               Debugging Options.  (line  490)
+* fdump-rtl-csa:                         Debugging Options.  (line  493)
+* fdump-rtl-cse1:                        Debugging Options.  (line  497)
+* fdump-rtl-cse2:                        Debugging Options.  (line  497)
+* fdump-rtl-dbr:                         Debugging Options.  (line  504)
+* fdump-rtl-dce:                         Debugging Options.  (line  501)
+* fdump-rtl-dce1:                        Debugging Options.  (line  508)
+* fdump-rtl-dce2:                        Debugging Options.  (line  508)
+* fdump-rtl-dfinish:                     Debugging Options.  (line  632)
+* fdump-rtl-dfinit:                      Debugging Options.  (line  632)
+* fdump-rtl-eh:                          Debugging Options.  (line  512)
+* fdump-rtl-eh_ranges:                   Debugging Options.  (line  515)
+* fdump-rtl-expand:                      Debugging Options.  (line  518)
+* fdump-rtl-fwprop1:                     Debugging Options.  (line  522)
+* fdump-rtl-fwprop2:                     Debugging Options.  (line  522)
+* fdump-rtl-gcse1:                       Debugging Options.  (line  527)
+* fdump-rtl-gcse2:                       Debugging Options.  (line  527)
+* fdump-rtl-init-regs:                   Debugging Options.  (line  531)
+* fdump-rtl-initvals:                    Debugging Options.  (line  534)
+* fdump-rtl-into_cfglayout:              Debugging Options.  (line  537)
+* fdump-rtl-ira:                         Debugging Options.  (line  540)
+* fdump-rtl-jump:                        Debugging Options.  (line  543)
+* fdump-rtl-loop2:                       Debugging Options.  (line  546)
+* fdump-rtl-mach:                        Debugging Options.  (line  550)
+* fdump-rtl-mode_sw:                     Debugging Options.  (line  554)
+* fdump-rtl-outof_cfglayout:             Debugging Options.  (line  560)
+* fdump-rtl-peephole2:                   Debugging Options.  (line  563)
+* fdump-rtl-postreload:                  Debugging Options.  (line  566)
+* fdump-rtl-pro_and_epilogue:            Debugging Options.  (line  569)
+* fdump-rtl-regclass:                    Debugging Options.  (line  632)
+* fdump-rtl-regmove:                     Debugging Options.  (line  572)
+* fdump-rtl-rnreg:                       Debugging Options.  (line  557)
+* fdump-rtl-sched1:                      Debugging Options.  (line  576)
+* fdump-rtl-sched2:                      Debugging Options.  (line  576)
+* fdump-rtl-see:                         Debugging Options.  (line  580)
+* fdump-rtl-seqabstr:                    Debugging Options.  (line  583)
+* fdump-rtl-shorten:                     Debugging Options.  (line  586)
+* fdump-rtl-sibling:                     Debugging Options.  (line  589)
+* fdump-rtl-sms:                         Debugging Options.  (line  602)
+* fdump-rtl-split1:                      Debugging Options.  (line  596)
+* fdump-rtl-split2:                      Debugging Options.  (line  596)
+* fdump-rtl-split3:                      Debugging Options.  (line  596)
+* fdump-rtl-split4:                      Debugging Options.  (line  596)
+* fdump-rtl-split5:                      Debugging Options.  (line  596)
+* fdump-rtl-stack:                       Debugging Options.  (line  606)
+* fdump-rtl-subreg1:                     Debugging Options.  (line  612)
+* fdump-rtl-subreg2:                     Debugging Options.  (line  612)
+* fdump-rtl-subregs_of_mode_finish:      Debugging Options.  (line  632)
+* fdump-rtl-subregs_of_mode_init:        Debugging Options.  (line  632)
+* fdump-rtl-unshare:                     Debugging Options.  (line  616)
+* fdump-rtl-vartrack:                    Debugging Options.  (line  619)
+* fdump-rtl-vregs:                       Debugging Options.  (line  622)
+* fdump-rtl-web:                         Debugging Options.  (line  625)
+* fdump-statistics:                      Debugging Options.  (line  721)
+* fdump-translation-unit:                Debugging Options.  (line  686)
+* fdump-tree:                            Debugging Options.  (line  732)
+* fdump-tree-alias:                      Debugging Options.  (line  826)
+* fdump-tree-all:                        Debugging Options.  (line  916)
+* fdump-tree-ccp:                        Debugging Options.  (line  830)
+* fdump-tree-cfg:                        Debugging Options.  (line  806)
+* fdump-tree-ch:                         Debugging Options.  (line  818)
+* fdump-tree-copyprop:                   Debugging Options.  (line  846)
+* fdump-tree-copyrename:                 Debugging Options.  (line  892)
+* fdump-tree-dce:                        Debugging Options.  (line  854)
+* fdump-tree-dom:                        Debugging Options.  (line  872)
+* fdump-tree-dse:                        Debugging Options.  (line  877)
+* fdump-tree-forwprop:                   Debugging Options.  (line  887)
+* fdump-tree-fre:                        Debugging Options.  (line  842)
+* fdump-tree-gimple:                     Debugging Options.  (line  801)
+* fdump-tree-mudflap:                    Debugging Options.  (line  858)
+* fdump-tree-nrv:                        Debugging Options.  (line  897)
+* fdump-tree-optimized:                  Debugging Options.  (line  798)
+* fdump-tree-original:                   Debugging Options.  (line  795)
+* fdump-tree-phiopt:                     Debugging Options.  (line  882)
+* fdump-tree-pre:                        Debugging Options.  (line  838)
+* fdump-tree-sink:                       Debugging Options.  (line  868)
+* fdump-tree-slp:                        Debugging Options.  (line  907)
+* fdump-tree-sra:                        Debugging Options.  (line  863)
+* fdump-tree-ssa:                        Debugging Options.  (line  822)
+* fdump-tree-store_copyprop:             Debugging Options.  (line  850)
+* fdump-tree-storeccp:                   Debugging Options.  (line  834)
+* fdump-tree-vcg:                        Debugging Options.  (line  810)
+* fdump-tree-vect:                       Debugging Options.  (line  902)
+* fdump-tree-vrp:                        Debugging Options.  (line  912)
+* fdump-unnumbered:                      Debugging Options.  (line  674)
+* fdump-unnumbered-links:                Debugging Options.  (line  680)
+* fdwarf2-cfi-asm:                       Debugging Options.  (line  287)
+* fearly-inlining:                       Optimize Options.   (line  262)
+* feliminate-dwarf2-dups:                Debugging Options.  (line  195)
+* feliminate-unused-debug-symbols:       Debugging Options.  (line   52)
+* feliminate-unused-debug-types:         Debugging Options.  (line 1146)
+* fenable-icf-debug:                     Debugging Options.  (line  270)
+* fexceptions:                           Code Gen Options.   (line   34)
+* fexcess-precision:                     Optimize Options.   (line 1796)
+* fexec-charset:                         Preprocessor Options.
+                                                             (line  508)
+* fexpensive-optimizations:              Optimize Options.   (line  564)
+* fextended-identifiers:                 Preprocessor Options.
+                                                             (line  484)
+* ffast-math:                            Optimize Options.   (line 1819)
+* ffinite-math-only:                     Optimize Options.   (line 1894)
+* ffix-and-continue:                     Darwin Options.     (line  106)
+* ffixed:                                Code Gen Options.   (line  236)
+* ffloat-store <1>:                      Disappointments.    (line   77)
+* ffloat-store:                          Optimize Options.   (line 1782)
+* ffor-scope:                            C++ Dialect Options.
+                                                             (line  121)
+* fforward-propagate:                    Optimize Options.   (line  174)
+* ffp-contract:                          Optimize Options.   (line  183)
+* ffreestanding <1>:                     Function Attributes.
+                                                             (line  459)
+* ffreestanding <2>:                     Warning Options.    (line  238)
+* ffreestanding <3>:                     C Dialect Options.  (line  225)
+* ffreestanding:                         Standards.          (line   88)
+* ffriend-injection:                     C++ Dialect Options.
+                                                             (line   91)
+* ffunction-sections:                    Optimize Options.   (line 2084)
+* fgcse:                                 Optimize Options.   (line  454)
+* fgcse-after-reload:                    Optimize Options.   (line  490)
+* fgcse-las:                             Optimize Options.   (line  483)
+* fgcse-lm:                              Optimize Options.   (line  465)
+* fgcse-sm:                              Optimize Options.   (line  474)
+* fgnu-runtime:                          Objective-C and Objective-C++ Dialect Options.
+                                                             (line   39)
+* fgnu89-inline:                         C Dialect Options.  (line  133)
+* fgraphite-identity:                    Optimize Options.   (line 1033)
+* fhosted:                               C Dialect Options.  (line  218)
+* fif-conversion:                        Optimize Options.   (line  524)
+* fif-conversion2:                       Optimize Options.   (line  533)
+* filelist:                              Darwin Options.     (line  199)
+* findirect-data:                        Darwin Options.     (line  106)
+* findirect-inlining:                    Optimize Options.   (line  235)
+* finhibit-size-directive:               Code Gen Options.   (line  158)
+* finline-functions:                     Optimize Options.   (line  243)
+* finline-functions-called-once:         Optimize Options.   (line  254)
+* finline-limit:                         Optimize Options.   (line  279)
+* finline-small-functions:               Optimize Options.   (line  227)
+* finput-charset:                        Preprocessor Options.
+                                                             (line  521)
+* finstrument-functions <1>:             Function Attributes.
+                                                             (line  899)
+* finstrument-functions:                 Code Gen Options.   (line  292)
+* finstrument-functions-exclude-file-list: Code Gen Options. (line  329)
+* finstrument-functions-exclude-function-list: Code Gen Options.
+                                                             (line  349)
+* fipa-cp:                               Optimize Options.   (line  868)
+* fipa-cp-clone:                         Optimize Options.   (line  876)
+* fipa-matrix-reorg:                     Optimize Options.   (line  886)
+* fipa-profile:                          Optimize Options.   (line  860)
+* fipa-pta:                              Optimize Options.   (line  854)
+* fipa-pure-const:                       Optimize Options.   (line  832)
+* fipa-reference:                        Optimize Options.   (line  836)
+* fipa-sra:                              Optimize Options.   (line  272)
+* fipa-struct-reorg:                     Optimize Options.   (line  840)
+* fira-loop-pressure:                    Optimize Options.   (line  603)
+* fira-verbose:                          Optimize Options.   (line  623)
+* fivopts:                               Optimize Options.   (line 1128)
+* fkeep-inline-functions <1>:            Inline.             (line   51)
+* fkeep-inline-functions:                Optimize Options.   (line  311)
+* fkeep-static-consts:                   Optimize Options.   (line  318)
+* flat_namespace:                        Darwin Options.     (line  199)
+* flax-vector-conversions:               C Dialect Options.  (line  295)
+* fleading-underscore:                   Code Gen Options.   (line  432)
+* floop-block:                           Optimize Options.   (line 1004)
+* floop-flatten:                         Optimize Options.   (line 1041)
+* floop-interchange:                     Optimize Options.   (line  957)
+* floop-parallelize-all:                 Optimize Options.   (line 1046)
+* floop-strip-mine:                      Optimize Options.   (line  982)
+* flto:                                  Optimize Options.   (line 1508)
+* flto-partition:                        Optimize Options.   (line 1672)
+* fmax-errors:                           Warning Options.    (line   18)
+* fmem-report:                           Debugging Options.  (line  311)
+* fmerge-all-constants:                  Optimize Options.   (line  337)
+* fmerge-constants:                      Optimize Options.   (line  327)
+* fmerge-debug-strings:                  Debugging Options.  (line  275)
+* fmessage-length:                       Language Independent Options.
+                                                             (line   15)
+* fmodulo-sched:                         Optimize Options.   (line  348)
+* fmodulo-sched-allow-regmoves:          Optimize Options.   (line  353)
+* fmove-loop-invariants:                 Optimize Options.   (line 2074)
+* fms-extensions <1>:                    Unnamed Fields.     (line   36)
+* fms-extensions <2>:                    C++ Dialect Options.
+                                                             (line  156)
+* fms-extensions:                        C Dialect Options.  (line  243)
+* fmudflap:                              Optimize Options.   (line  393)
+* fmudflapir:                            Optimize Options.   (line  393)
+* fmudflapth:                            Optimize Options.   (line  393)
+* fnext-runtime:                         Objective-C and Objective-C++ Dialect Options.
+                                                             (line   43)
+* fno-access-control:                    C++ Dialect Options.
+                                                             (line   41)
+* fno-asm:                               C Dialect Options.  (line  170)
+* fno-branch-count-reg:                  Optimize Options.   (line  360)
+* fno-builtin <1>:                       Other Builtins.     (line   14)
+* fno-builtin <2>:                       Function Attributes.
+                                                             (line  459)
+* fno-builtin <3>:                       Warning Options.    (line  238)
+* fno-builtin:                           C Dialect Options.  (line  184)
+* fno-common <1>:                        Variable Attributes.
+                                                             (line  105)
+* fno-common:                            Code Gen Options.   (line  135)
+* fno-compare-debug:                     Debugging Options.  (line  156)
+* fno-deduce-init-list:                  C++ Dialect Options.
+                                                             (line   73)
+* fno-default-inline <1>:                Inline.             (line   71)
+* fno-default-inline <2>:                Optimize Options.   (line  159)
+* fno-default-inline:                    C++ Dialect Options.
+                                                             (line  330)
+* fno-defer-pop:                         Optimize Options.   (line  166)
+* fno-diagnostics-show-option:           Language Independent Options.
+                                                             (line   36)
+* fno-dwarf2-cfi-asm:                    Debugging Options.  (line  287)
+* fno-elide-constructors:                C++ Dialect Options.
+                                                             (line  104)
+* fno-enforce-eh-specs:                  C++ Dialect Options.
+                                                             (line  110)
+* fno-for-scope:                         C++ Dialect Options.
+                                                             (line  121)
+* fno-function-cse:                      Optimize Options.   (line  370)
+* fno-gnu-keywords:                      C++ Dialect Options.
+                                                             (line  133)
+* fno-guess-branch-probability:          Optimize Options.   (line 1266)
+* fno-ident:                             Code Gen Options.   (line  155)
+* fno-implement-inlines <1>:             C++ Interface.      (line   75)
+* fno-implement-inlines:                 C++ Dialect Options.
+                                                             (line  150)
+* fno-implicit-inline-templates:         C++ Dialect Options.
+                                                             (line  144)
+* fno-implicit-templates <1>:            Template Instantiation.
+                                                             (line   87)
+* fno-implicit-templates:                C++ Dialect Options.
+                                                             (line  138)
+* fno-inline:                            Optimize Options.   (line  221)
+* fno-ira-share-save-slots:              Optimize Options.   (line  611)
+* fno-ira-share-spill-slots:             Optimize Options.   (line  617)
+* fno-jump-tables:                       Code Gen Options.   (line  228)
+* fno-math-errno:                        Optimize Options.   (line 1833)
+* fno-merge-debug-strings:               Debugging Options.  (line  275)
+* fno-nil-receivers:                     Objective-C and Objective-C++ Dialect Options.
+                                                             (line   49)
+* fno-nonansi-builtins:                  C++ Dialect Options.
+                                                             (line  161)
+* fno-operator-names:                    C++ Dialect Options.
+                                                             (line  177)
+* fno-optional-diags:                    C++ Dialect Options.
+                                                             (line  181)
+* fno-peephole:                          Optimize Options.   (line 1257)
+* fno-peephole2:                         Optimize Options.   (line 1257)
+* fno-pretty-templates:                  C++ Dialect Options.
+                                                             (line  191)
+* fno-rtti:                              C++ Dialect Options.
+                                                             (line  209)
+* fno-sched-interblock:                  Optimize Options.   (line  654)
+* fno-sched-spec:                        Optimize Options.   (line  659)
+* fno-set-stack-executable:              i386 and x86-64 Windows Options.
+                                                             (line   46)
+* fno-show-column:                       Preprocessor Options.
+                                                             (line  546)
+* fno-signed-bitfields:                  C Dialect Options.  (line  328)
+* fno-signed-zeros:                      Optimize Options.   (line 1906)
+* fno-stack-limit:                       Code Gen Options.   (line  400)
+* fno-threadsafe-statics:                C++ Dialect Options.
+                                                             (line  240)
+* fno-toplevel-reorder:                  Optimize Options.   (line 1464)
+* fno-trapping-math:                     Optimize Options.   (line 1916)
+* fno-unsigned-bitfields:                C Dialect Options.  (line  328)
+* fno-use-cxa-get-exception-ptr:         C++ Dialect Options.
+                                                             (line  253)
+* fno-var-tracking-assignments:          Debugging Options.  (line 1053)
+* fno-var-tracking-assignments-toggle:   Debugging Options.  (line 1063)
+* fno-weak:                              C++ Dialect Options.
+                                                             (line  315)
+* fno-working-directory:                 Preprocessor Options.
+                                                             (line  531)
+* fno-zero-initialized-in-bss:           Optimize Options.   (line  381)
+* fnon-call-exceptions:                  Code Gen Options.   (line   48)
+* fnothrow-opt:                          C++ Dialect Options.
+                                                             (line  166)
+* fobjc-abi-version:                     Objective-C and Objective-C++ Dialect Options.
+                                                             (line   56)
+* fobjc-call-cxx-cdtors:                 Objective-C and Objective-C++ Dialect Options.
+                                                             (line   67)
+* fobjc-direct-dispatch:                 Objective-C and Objective-C++ Dialect Options.
+                                                             (line   92)
+* fobjc-exceptions:                      Objective-C and Objective-C++ Dialect Options.
+                                                             (line   96)
+* fobjc-gc:                              Objective-C and Objective-C++ Dialect Options.
+                                                             (line  105)
+* fobjc-nilcheck:                        Objective-C and Objective-C++ Dialect Options.
+                                                             (line  111)
+* fobjc-std:                             Objective-C and Objective-C++ Dialect Options.
+                                                             (line  120)
+* fomit-frame-pointer:                   Optimize Options.   (line  194)
+* fopenmp:                               C Dialect Options.  (line  235)
+* foptimize-register-move:               Optimize Options.   (line  571)
+* foptimize-sibling-calls:               Optimize Options.   (line  216)
+* force_cpusubtype_ALL:                  Darwin Options.     (line  138)
+* force_flat_namespace:                  Darwin Options.     (line  199)
+* fpack-struct:                          Code Gen Options.   (line  279)
+* fpartial-inlining:                     Optimize Options.   (line 1232)
+* fpcc-struct-return <1>:                Incompatibilities.  (line  170)
+* fpcc-struct-return:                    Code Gen Options.   (line   70)
+* fpch-deps:                             Preprocessor Options.
+                                                             (line  282)
+* fpch-preprocess:                       Preprocessor Options.
+                                                             (line  290)
+* fpeel-loops:                           Optimize Options.   (line 2066)
+* fpermissive:                           C++ Dialect Options.
+                                                             (line  186)
+* fPIC:                                  Code Gen Options.   (line  205)
+* fpic:                                  Code Gen Options.   (line  184)
+* fPIE:                                  Code Gen Options.   (line  218)
+* fpie:                                  Code Gen Options.   (line  218)
+* fplan9-extensions:                     Unnamed Fields.     (line   44)
+* fpost-ipa-mem-report:                  Debugging Options.  (line  317)
+* fpre-ipa-mem-report:                   Debugging Options.  (line  315)
+* fpredictive-commoning:                 Optimize Options.   (line 1239)
+* fprefetch-loop-arrays:                 Optimize Options.   (line 1246)
+* fpreprocessed:                         Preprocessor Options.
+                                                             (line  489)
+* fprofile-arcs <1>:                     Other Builtins.     (line  247)
+* fprofile-arcs:                         Debugging Options.  (line  352)
+* fprofile-correction:                   Optimize Options.   (line 1733)
+* fprofile-dir:                          Optimize Options.   (line 1740)
+* fprofile-generate:                     Optimize Options.   (line 1750)
+* fprofile-use:                          Optimize Options.   (line 1763)
+* fprofile-values:                       Optimize Options.   (line 2015)
+* fpu:                                   RX Options.         (line   17)
+* frandom-seed:                          Debugging Options.  (line  947)
+* freciprocal-math:                      Optimize Options.   (line 1885)
+* frecord-gcc-switches:                  Code Gen Options.   (line  174)
+* freg-struct-return:                    Code Gen Options.   (line   88)
+* fregmove:                              Optimize Options.   (line  571)
+* frename-registers:                     Optimize Options.   (line 2033)
+* freorder-blocks:                       Optimize Options.   (line 1283)
+* freorder-blocks-and-partition:         Optimize Options.   (line 1289)
+* freorder-functions:                    Optimize Options.   (line 1300)
+* freplace-objc-classes:                 Objective-C and Objective-C++ Dialect Options.
+                                                             (line  131)
+* frepo <1>:                             Template Instantiation.
+                                                             (line   62)
+* frepo:                                 C++ Dialect Options.
+                                                             (line  204)
+* frerun-cse-after-loop:                 Optimize Options.   (line  448)
+* freschedule-modulo-scheduled-loops:    Optimize Options.   (line  755)
+* frounding-math:                        Optimize Options.   (line 1931)
+* fsched-critical-path-heuristic:        Optimize Options.   (line  721)
+* fsched-dep-count-heuristic:            Optimize Options.   (line  748)
+* fsched-group-heuristic:                Optimize Options.   (line  715)
+* fsched-last-insn-heuristic:            Optimize Options.   (line  741)
+* fsched-pressure:                       Optimize Options.   (line  664)
+* fsched-rank-heuristic:                 Optimize Options.   (line  734)
+* fsched-spec-insn-heuristic:            Optimize Options.   (line  727)
+* fsched-spec-load:                      Optimize Options.   (line  673)
+* fsched-spec-load-dangerous:            Optimize Options.   (line  678)
+* fsched-stalled-insns:                  Optimize Options.   (line  684)
+* fsched-stalled-insns-dep:              Optimize Options.   (line  694)
+* fsched-verbose:                        Debugging Options.  (line  957)
+* fsched2-use-superblocks:               Optimize Options.   (line  704)
+* fschedule-insns:                       Optimize Options.   (line  635)
+* fschedule-insns2:                      Optimize Options.   (line  645)
+* fsection-anchors:                      Optimize Options.   (line 2129)
+* fsel-sched-pipelining:                 Optimize Options.   (line  769)
+* fsel-sched-pipelining-outer-loops:     Optimize Options.   (line  774)
+* fselective-scheduling:                 Optimize Options.   (line  761)
+* fselective-scheduling2:                Optimize Options.   (line  765)
+* fshort-double:                         Code Gen Options.   (line  117)
+* fshort-enums <1>:                      Non-bugs.           (line   42)
+* fshort-enums <2>:                      Type Attributes.    (line  113)
+* fshort-enums <3>:                      Structures unions enumerations and bit-fields implementation.
+                                                             (line   43)
+* fshort-enums:                          Code Gen Options.   (line  106)
+* fshort-wchar:                          Code Gen Options.   (line  125)
+* fsignaling-nans:                       Optimize Options.   (line 1951)
+* fsigned-bitfields <1>:                 Non-bugs.           (line   57)
+* fsigned-bitfields:                     C Dialect Options.  (line  328)
+* fsigned-char <1>:                      Characters implementation.
+                                                             (line   31)
+* fsigned-char:                          C Dialect Options.  (line  318)
+* fsingle-precision-constant:            Optimize Options.   (line 1966)
+* fsplit-ivs-in-unroller:                Optimize Options.   (line 1213)
+* fsplit-stack <1>:                      Function Attributes.
+                                                             (line  904)
+* fsplit-stack:                          Code Gen Options.   (line  414)
+* fsplit-wide-types:                     Optimize Options.   (line  423)
+* fstack-check:                          Code Gen Options.   (line  361)
+* fstack-limit-register:                 Code Gen Options.   (line  400)
+* fstack-limit-symbol:                   Code Gen Options.   (line  400)
+* fstack-protector:                      Optimize Options.   (line 2117)
+* fstack-protector-all:                  Optimize Options.   (line 2126)
+* fstack-usage:                          Debugging Options.  (line  321)
+* fstats:                                C++ Dialect Options.
+                                                             (line  219)
+* fstrict-aliasing:                      Optimize Options.   (line 1313)
+* fstrict-enums:                         C++ Dialect Options.
+                                                             (line  224)
+* fstrict-overflow:                      Optimize Options.   (line 1359)
+* fstrict-volatile-bitfields:            Code Gen Options.   (line  517)
+* fsyntax-only:                          Warning Options.    (line   14)
+* ftabstop:                              Preprocessor Options.
+                                                             (line  502)
+* ftemplate-depth:                       C++ Dialect Options.
+                                                             (line  233)
+* ftest-coverage:                        Debugging Options.  (line  408)
+* fthread-jumps:                         Optimize Options.   (line  414)
+* ftime-report:                          Debugging Options.  (line  307)
+* ftls-model:                            Code Gen Options.   (line  443)
+* ftracer:                               Optimize Options.   (line 1196)
+* ftrapv:                                Code Gen Options.   (line   22)
+* ftree-bit-ccp:                         Optimize Options.   (line  900)
+* ftree-builtin-call-dce:                Optimize Options.   (line  920)
+* ftree-ccp:                             Optimize Options.   (line  906)
+* ftree-ch:                              Optimize Options.   (line  940)
+* ftree-copy-prop:                       Optimize Options.   (line  827)
+* ftree-copyrename:                      Optimize Options.   (line 1152)
+* ftree-dce:                             Optimize Options.   (line  916)
+* ftree-dominator-opts:                  Optimize Options.   (line  926)
+* ftree-dse:                             Optimize Options.   (line  933)
+* ftree-forwprop:                        Optimize Options.   (line  812)
+* ftree-fre:                             Optimize Options.   (line  816)
+* ftree-loop-im:                         Optimize Options.   (line 1113)
+* ftree-loop-ivcanon:                    Optimize Options.   (line 1122)
+* ftree-loop-linear:                     Optimize Options.   (line  951)
+* ftree-loop-optimize:                   Optimize Options.   (line  947)
+* ftree-parallelize-loops:               Optimize Options.   (line 1133)
+* ftree-phiprop:                         Optimize Options.   (line  823)
+* ftree-pre:                             Optimize Options.   (line  808)
+* ftree-pta:                             Optimize Options.   (line 1142)
+* ftree-reassoc:                         Optimize Options.   (line  804)
+* ftree-sink:                            Optimize Options.   (line  896)
+* ftree-slp-vectorize:                   Optimize Options.   (line 1171)
+* ftree-sra:                             Optimize Options.   (line 1146)
+* ftree-ter:                             Optimize Options.   (line 1159)
+* ftree-vect-loop-version:               Optimize Options.   (line 1175)
+* ftree-vectorize:                       Optimize Options.   (line 1167)
+* ftree-vectorizer-verbose:              Debugging Options.  (line  920)
+* ftree-vrp:                             Optimize Options.   (line 1187)
+* funit-at-a-time:                       Optimize Options.   (line 1457)
+* funroll-all-loops:                     Optimize Options.   (line 1207)
+* funroll-loops:                         Optimize Options.   (line 1201)
+* funsafe-loop-optimizations:            Optimize Options.   (line  495)
+* funsafe-math-optimizations:            Optimize Options.   (line 1851)
+* funsigned-bitfields <1>:               Non-bugs.           (line   57)
+* funsigned-bitfields <2>:               Structures unions enumerations and bit-fields implementation.
+                                                             (line   17)
+* funsigned-bitfields:                   C Dialect Options.  (line  328)
+* funsigned-char <1>:                    Characters implementation.
+                                                             (line   31)
+* funsigned-char:                        C Dialect Options.  (line  300)
+* funswitch-loops:                       Optimize Options.   (line 2078)
+* funwind-tables:                        Code Gen Options.   (line   57)
+* fuse-cxa-atexit:                       C++ Dialect Options.
+                                                             (line  246)
+* fvar-tracking:                         Debugging Options.  (line 1043)
+* fvar-tracking-assignments:             Debugging Options.  (line 1053)
+* fvar-tracking-assignments-toggle:      Debugging Options.  (line 1063)
+* fvariable-expansion-in-unroller:       Optimize Options.   (line 1227)
+* fvect-cost-model:                      Optimize Options.   (line 1184)
+* fverbose-asm:                          Code Gen Options.   (line  165)
+* fvisibility:                           Code Gen Options.   (line  451)
+* fvisibility-inlines-hidden:            C++ Dialect Options.
+                                                             (line  258)
+* fvisibility-ms-compat:                 C++ Dialect Options.
+                                                             (line  286)
+* fvpt:                                  Optimize Options.   (line 2024)
+* fweb:                                  Optimize Options.   (line 1476)
+* fwhole-program:                        Optimize Options.   (line 1487)
+* fwide-exec-charset:                    Preprocessor Options.
+                                                             (line  513)
+* fworking-directory:                    Preprocessor Options.
+                                                             (line  531)
+* fwrapv:                                Code Gen Options.   (line   26)
+* fzero-link:                            Objective-C and Objective-C++ Dialect Options.
+                                                             (line  141)
+* G <1>:                                 System V Options.   (line   10)
+* G <2>:                                 RS/6000 and PowerPC Options.
+                                                             (line  703)
+* G <3>:                                 MIPS Options.       (line  315)
+* G:                                     M32R/D Options.     (line   57)
+* g:                                     Debugging Options.  (line   10)
+* gcoff:                                 Debugging Options.  (line   70)
+* gdwarf-VERSION:                        Debugging Options.  (line   88)
+* gen-decls:                             Objective-C and Objective-C++ Dialect Options.
+                                                             (line  153)
+* gfull:                                 Darwin Options.     (line   71)
+* ggdb:                                  Debugging Options.  (line   38)
+* gno-strict-dwarf:                      Debugging Options.  (line  105)
+* gstabs:                                Debugging Options.  (line   44)
+* gstabs+:                               Debugging Options.  (line   64)
+* gstrict-dwarf:                         Debugging Options.  (line   99)
+* gtoggle:                               Debugging Options.  (line  142)
+* gused:                                 Darwin Options.     (line   66)
+* gvms:                                  Debugging Options.  (line  109)
+* gxcoff:                                Debugging Options.  (line   75)
+* gxcoff+:                               Debugging Options.  (line   80)
+* H:                                     Preprocessor Options.
+                                                             (line  664)
+* headerpad_max_install_names:           Darwin Options.     (line  199)
+* help <1>:                              Preprocessor Options.
+                                                             (line  656)
+* help:                                  Overall Options.    (line  221)
+* I <1>:                                 Directory Options.  (line   10)
+* I:                                     Preprocessor Options.
+                                                             (line   65)
+* I- <1>:                                Directory Options.  (line  112)
+* I-:                                    Preprocessor Options.
+                                                             (line  373)
+* idirafter:                             Preprocessor Options.
+                                                             (line  415)
+* iframework:                            Darwin Options.     (line   59)
+* imacros:                               Preprocessor Options.
+                                                             (line  406)
+* image_base:                            Darwin Options.     (line  199)
+* imultilib:                             Preprocessor Options.
+                                                             (line  440)
+* include:                               Preprocessor Options.
+                                                             (line  395)
+* init:                                  Darwin Options.     (line  199)
+* install_name:                          Darwin Options.     (line  199)
+* iprefix:                               Preprocessor Options.
+                                                             (line  422)
+* iquote <1>:                            Directory Options.  (line   36)
+* iquote:                                Preprocessor Options.
+                                                             (line  452)
+* isysroot:                              Preprocessor Options.
+                                                             (line  434)
+* isystem:                               Preprocessor Options.
+                                                             (line  444)
+* iwithprefix:                           Preprocessor Options.
+                                                             (line  428)
+* iwithprefixbefore:                     Preprocessor Options.
+                                                             (line  428)
+* keep_private_externs:                  Darwin Options.     (line  199)
+* L:                                     Directory Options.  (line   42)
+* l:                                     Link Options.       (line   26)
+* lobjc:                                 Link Options.       (line   53)
+* m:                                     RS/6000 and PowerPC Options.
+                                                             (line  552)
+* M:                                     Preprocessor Options.
+                                                             (line  173)
+* m1:                                    SH Options.         (line    9)
+* m10:                                   PDP-11 Options.     (line   29)
+* m128bit-long-double:                   i386 and x86-64 Options.
+                                                             (line  283)
+* m16-bit:                               CRIS Options.       (line   64)
+* m2:                                    SH Options.         (line   12)
+* m210:                                  MCore Options.      (line   43)
+* m2a:                                   SH Options.         (line   30)
+* m2a-nofpu:                             SH Options.         (line   18)
+* m2a-single:                            SH Options.         (line   26)
+* m2a-single-only:                       SH Options.         (line   22)
+* m3:                                    SH Options.         (line   34)
+* m31:                                   S/390 and zSeries Options.
+                                                             (line   87)
+* m32 <1>:                               SPARC Options.      (line  182)
+* m32 <2>:                               RS/6000 and PowerPC Options.
+                                                             (line  266)
+* m32:                                   i386 and x86-64 Options.
+                                                             (line  701)
+* m32-bit:                               CRIS Options.       (line   64)
+* m32bit-doubles:                        RX Options.         (line   10)
+* m32r:                                  M32R/D Options.     (line   15)
+* m32r2:                                 M32R/D Options.     (line    9)
+* m32rx:                                 M32R/D Options.     (line   12)
+* m340:                                  MCore Options.      (line   43)
+* m3dnow:                                i386 and x86-64 Options.
+                                                             (line  477)
+* m3e:                                   SH Options.         (line   37)
+* m4:                                    SH Options.         (line   51)
+* m4-nofpu:                              SH Options.         (line   40)
+* m4-single:                             SH Options.         (line   47)
+* m4-single-only:                        SH Options.         (line   43)
+* m40:                                   PDP-11 Options.     (line   23)
+* m45:                                   PDP-11 Options.     (line   26)
+* m4a:                                   SH Options.         (line   66)
+* m4a-nofpu:                             SH Options.         (line   54)
+* m4a-single:                            SH Options.         (line   62)
+* m4a-single-only:                       SH Options.         (line   58)
+* m4al:                                  SH Options.         (line   69)
+* m4byte-functions:                      MCore Options.      (line   27)
+* m5200:                                 M680x0 Options.     (line  146)
+* m5206e:                                M680x0 Options.     (line  155)
+* m528x:                                 M680x0 Options.     (line  159)
+* m5307:                                 M680x0 Options.     (line  163)
+* m5407:                                 M680x0 Options.     (line  167)
+* m64 <1>:                               SPARC Options.      (line  182)
+* m64 <2>:                               S/390 and zSeries Options.
+                                                             (line   87)
+* m64 <3>:                               RS/6000 and PowerPC Options.
+                                                             (line  266)
+* m64:                                   i386 and x86-64 Options.
+                                                             (line  701)
+* m64bit-doubles:                        RX Options.         (line   10)
+* m68000:                                M680x0 Options.     (line   94)
+* m68010:                                M680x0 Options.     (line  102)
+* m68020:                                M680x0 Options.     (line  108)
+* m68020-40:                             M680x0 Options.     (line  177)
+* m68020-60:                             M680x0 Options.     (line  186)
+* m68030:                                M680x0 Options.     (line  113)
+* m68040:                                M680x0 Options.     (line  118)
+* m68060:                                M680x0 Options.     (line  127)
+* m6811:                                 M68hc1x Options.    (line   13)
+* m6812:                                 M68hc1x Options.    (line   18)
+* m68881:                                M680x0 Options.     (line  196)
+* m68hc11:                               M68hc1x Options.    (line   13)
+* m68hc12:                               M68hc1x Options.    (line   18)
+* m68hcs12:                              M68hc1x Options.    (line   23)
+* m68S12:                                M68hc1x Options.    (line   23)
+* m8-bit:                                CRIS Options.       (line   64)
+* m96bit-long-double:                    i386 and x86-64 Options.
+                                                             (line  283)
+* mabi <1>:                              RS/6000 and PowerPC Options.
+                                                             (line  583)
+* mabi <2>:                              i386 and x86-64 Options.
+                                                             (line  596)
+* mabi:                                  ARM Options.        (line   10)
+* mabi=32:                               MIPS Options.       (line  130)
+* mabi=64:                               MIPS Options.       (line  130)
+* mabi=eabi:                             MIPS Options.       (line  130)
+* mabi=gnu:                              MMIX Options.       (line   20)
+* mabi=ibmlongdouble:                    RS/6000 and PowerPC Options.
+                                                             (line  596)
+* mabi=ieeelongdouble:                   RS/6000 and PowerPC Options.
+                                                             (line  600)
+* mabi=mmixware:                         MMIX Options.       (line   20)
+* mabi=n32:                              MIPS Options.       (line  130)
+* mabi=no-spe:                           RS/6000 and PowerPC Options.
+                                                             (line  593)
+* mabi=o64:                              MIPS Options.       (line  130)
+* mabi=spe:                              RS/6000 and PowerPC Options.
+                                                             (line  588)
+* mabicalls:                             MIPS Options.       (line  154)
+* mabort-on-noreturn:                    ARM Options.        (line  162)
+* mabsdiff:                              MeP Options.        (line    7)
+* mabshi:                                PDP-11 Options.     (line   55)
+* mac0:                                  PDP-11 Options.     (line   16)
+* macc-4:                                FRV Options.        (line  113)
+* macc-8:                                FRV Options.        (line  116)
+* maccumulate-outgoing-args <1>:         SH Options.         (line  203)
+* maccumulate-outgoing-args:             i386 and x86-64 Options.
+                                                             (line  613)
+* maddress-space-conversion:             SPU Options.        (line   63)
+* madjust-unroll:                        SH Options.         (line  223)
+* mads:                                  RS/6000 and PowerPC Options.
+                                                             (line  626)
+* maix-struct-return:                    RS/6000 and PowerPC Options.
+                                                             (line  576)
+* maix32:                                RS/6000 and PowerPC Options.
+                                                             (line  304)
+* maix64:                                RS/6000 and PowerPC Options.
+                                                             (line  304)
+* malign-300:                            H8/300 Options.     (line   31)
+* malign-double:                         i386 and x86-64 Options.
+                                                             (line  267)
+* malign-int:                            M680x0 Options.     (line  266)
+* malign-labels:                         FRV Options.        (line  104)
+* malign-loops:                          M32R/D Options.     (line   73)
+* malign-natural:                        RS/6000 and PowerPC Options.
+                                                             (line  343)
+* malign-power:                          RS/6000 and PowerPC Options.
+                                                             (line  343)
+* mall-opts:                             MeP Options.        (line   11)
+* malloc-cc:                             FRV Options.        (line   25)
+* malpha-as:                             DEC Alpha Options.  (line  159)
+* maltivec:                              RS/6000 and PowerPC Options.
+                                                             (line  191)
+* mam33:                                 MN10300 Options.    (line   17)
+* mam33-2:                               MN10300 Options.    (line   24)
+* mam34:                                 MN10300 Options.    (line   28)
+* mandroid:                              GNU/Linux Options.  (line   21)
+* mapcs:                                 ARM Options.        (line   22)
+* mapcs-frame:                           ARM Options.        (line   14)
+* mapp-regs <1>:                         V850 Options.       (line   57)
+* mapp-regs:                             SPARC Options.      (line   10)
+* march <1>:                             S/390 and zSeries Options.
+                                                             (line  116)
+* march <2>:                             MIPS Options.       (line   14)
+* march <3>:                             M680x0 Options.     (line   12)
+* march <4>:                             i386 and x86-64 Options.
+                                                             (line  166)
+* march <5>:                             HPPA Options.       (line    9)
+* march <6>:                             CRIS Options.       (line   10)
+* march:                                 ARM Options.        (line  108)
+* mas100-syntax:                         RX Options.         (line   75)
+* masm=DIALECT:                          i386 and x86-64 Options.
+                                                             (line  223)
+* matomic-updates:                       SPU Options.        (line   78)
+* mauto-incdec:                          M68hc1x Options.    (line   26)
+* mauto-pic:                             IA-64 Options.      (line   50)
+* maverage:                              MeP Options.        (line   16)
+* mavoid-indexed-addresses:              RS/6000 and PowerPC Options.
+                                                             (line  412)
+* mb:                                    SH Options.         (line   74)
+* mbackchain:                            S/390 and zSeries Options.
+                                                             (line   35)
+* mbarrel-shift-enabled:                 LM32 Options.       (line    9)
+* mbase-addresses:                       MMIX Options.       (line   54)
+* mbased=:                               MeP Options.        (line   20)
+* mbcopy:                                PDP-11 Options.     (line   36)
+* mbcopy-builtin:                        PDP-11 Options.     (line   32)
+* mbig:                                  RS/6000 and PowerPC Options.
+                                                             (line  493)
+* mbig-endian <1>:                       RS/6000 and PowerPC Options.
+                                                             (line  493)
+* mbig-endian <2>:                       MCore Options.      (line   39)
+* mbig-endian <3>:                       IA-64 Options.      (line    9)
+* mbig-endian:                           ARM Options.        (line   67)
+* mbig-endian-data:                      RX Options.         (line   42)
+* mbig-switch <1>:                       V850 Options.       (line   52)
+* mbig-switch:                           HPPA Options.       (line   23)
+* mbigtable:                             SH Options.         (line   90)
+* mbionic:                               GNU/Linux Options.  (line   17)
+* mbit-align:                            RS/6000 and PowerPC Options.
+                                                             (line  444)
+* mbitfield:                             M680x0 Options.     (line  234)
+* mbitops <1>:                           SH Options.         (line   94)
+* mbitops:                               MeP Options.        (line   26)
+* mblock-move-inline-limit:              RS/6000 and PowerPC Options.
+                                                             (line  697)
+* mbranch-cheap:                         PDP-11 Options.     (line   65)
+* mbranch-cost:                          MIPS Options.       (line  611)
+* mbranch-cost=NUMBER:                   M32R/D Options.     (line   82)
+* mbranch-expensive:                     PDP-11 Options.     (line   61)
+* mbranch-hints:                         SPU Options.        (line   27)
+* mbranch-likely:                        MIPS Options.       (line  618)
+* mbranch-predict:                       MMIX Options.       (line   49)
+* mbss-plt:                              RS/6000 and PowerPC Options.
+                                                             (line  214)
+* mbuild-constants:                      DEC Alpha Options.  (line  142)
+* mbwx:                                  DEC Alpha Options.  (line  171)
+* mc68000:                               M680x0 Options.     (line   94)
+* mc68020:                               M680x0 Options.     (line  108)
+* mc=:                                   MeP Options.        (line   31)
+* mcache-size:                           SPU Options.        (line   70)
+* mcall-eabi:                            RS/6000 and PowerPC Options.
+                                                             (line  546)
+* mcall-freebsd:                         RS/6000 and PowerPC Options.
+                                                             (line  564)
+* mcall-gnu:                             RS/6000 and PowerPC Options.
+                                                             (line  560)
+* mcall-linux:                           RS/6000 and PowerPC Options.
+                                                             (line  556)
+* mcall-netbsd:                          RS/6000 and PowerPC Options.
+                                                             (line  568)
+* mcall-prologues:                       AVR Options.        (line   36)
+* mcall-sysv:                            RS/6000 and PowerPC Options.
+                                                             (line  538)
+* mcall-sysv-eabi:                       RS/6000 and PowerPC Options.
+                                                             (line  546)
+* mcall-sysv-noeabi:                     RS/6000 and PowerPC Options.
+                                                             (line  549)
+* mcallee-super-interworking:            ARM Options.        (line  255)
+* mcaller-super-interworking:            ARM Options.        (line  262)
+* mcallgraph-data:                       MCore Options.      (line   31)
+* mcc-init:                              CRIS Options.       (line   41)
+* mcfv4e:                                M680x0 Options.     (line  171)
+* mcheck-zero-division:                  MIPS Options.       (line  426)
+* mcirrus-fix-invalid-insns:             ARM Options.        (line  202)
+* mcix:                                  DEC Alpha Options.  (line  171)
+* mcld:                                  i386 and x86-64 Options.
+                                                             (line  506)
+* mclip:                                 MeP Options.        (line   35)
+* mcmodel=embmedany:                     SPARC Options.      (line  204)
+* mcmodel=kernel:                        i386 and x86-64 Options.
+                                                             (line  723)
+* mcmodel=large <1>:                     RS/6000 and PowerPC Options.
+                                                             (line  185)
+* mcmodel=large:                         i386 and x86-64 Options.
+                                                             (line  735)
+* mcmodel=medany:                        SPARC Options.      (line  198)
+* mcmodel=medium <1>:                    RS/6000 and PowerPC Options.
+                                                             (line  181)
+* mcmodel=medium:                        i386 and x86-64 Options.
+                                                             (line  728)
+* mcmodel=medlow:                        SPARC Options.      (line  187)
+* mcmodel=medmid:                        SPARC Options.      (line  192)
+* mcmodel=small <1>:                     RS/6000 and PowerPC Options.
+                                                             (line  177)
+* mcmodel=small:                         i386 and x86-64 Options.
+                                                             (line  717)
+* mcmpb:                                 RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mcode-readable:                        MIPS Options.       (line  386)
+* mcond-exec:                            FRV Options.        (line  152)
+* mcond-move:                            FRV Options.        (line  128)
+* mconfig=:                              MeP Options.        (line   39)
+* mconsole:                              i386 and x86-64 Windows Options.
+                                                             (line    9)
+* mconst-align:                          CRIS Options.       (line   55)
+* mconst16:                              Xtensa Options.     (line   10)
+* mconstant-gp:                          IA-64 Options.      (line   46)
+* mcop:                                  MeP Options.        (line   48)
+* mcop32:                                MeP Options.        (line   53)
+* mcop64:                                MeP Options.        (line   56)
+* mcorea:                                Blackfin Options.   (line  150)
+* mcoreb:                                Blackfin Options.   (line  156)
+* mcpu <1>:                              SPARC Options.      (line   81)
+* mcpu <2>:                              RS/6000 and PowerPC Options.
+                                                             (line  119)
+* mcpu <3>:                              picoChip Options.   (line    9)
+* mcpu <4>:                              M680x0 Options.     (line   28)
+* mcpu <5>:                              i386 and x86-64 Options.
+                                                             (line  171)
+* mcpu <6>:                              FRV Options.        (line  212)
+* mcpu <7>:                              DEC Alpha Options.  (line  223)
+* mcpu <8>:                              CRIS Options.       (line   10)
+* mcpu <9>:                              ARM Options.        (line   79)
+* mcpu:                                  ARC Options.        (line   23)
+* mcpu32:                                M680x0 Options.     (line  137)
+* mcpu= <1>:                             MicroBlaze Options. (line   20)
+* mcpu= <2>:                             M32C Options.       (line    7)
+* mcpu=:                                 Blackfin Options.   (line    7)
+* mcrc32:                                i386 and x86-64 Options.
+                                                             (line  552)
+* mcsync-anomaly:                        Blackfin Options.   (line   56)
+* mcx16:                                 i386 and x86-64 Options.
+                                                             (line  530)
+* MD:                                    Preprocessor Options.
+                                                             (line  262)
+* mdalign:                               SH Options.         (line   80)
+* mdata:                                 ARC Options.        (line   30)
+* mdata-align:                           CRIS Options.       (line   55)
+* mdc:                                   MeP Options.        (line   62)
+* mdebug <1>:                            S/390 and zSeries Options.
+                                                             (line  112)
+* mdebug:                                M32R/D Options.     (line   69)
+* mdebug-main=PREFIX <1>:                IA-64/VMS Options.  (line   13)
+* mdebug-main=PREFIX:                    DEC Alpha/VMS Options.
+                                                             (line   13)
+* mdec-asm:                              PDP-11 Options.     (line   72)
+* mdisable-callt:                        V850 Options.       (line   93)
+* mdisable-fpregs:                       HPPA Options.       (line   33)
+* mdisable-indexing:                     HPPA Options.       (line   40)
+* mdiv <1>:                              MeP Options.        (line   65)
+* mdiv <2>:                              MCore Options.      (line   15)
+* mdiv:                                  M680x0 Options.     (line  208)
+* mdiv=STRATEGY:                         SH Options.         (line  162)
+* mdivide-breaks:                        MIPS Options.       (line  432)
+* mdivide-enabled:                       LM32 Options.       (line   12)
+* mdivide-traps:                         MIPS Options.       (line  432)
+* mdivsi3_libfunc=NAME:                  SH Options.         (line  209)
+* mdll:                                  i386 and x86-64 Windows Options.
+                                                             (line   16)
+* mdlmzb:                                RS/6000 and PowerPC Options.
+                                                             (line  437)
+* mdmx:                                  MIPS Options.       (line  279)
+* mdouble:                               FRV Options.        (line   38)
+* mdouble-float <1>:                     RS/6000 and PowerPC Options.
+                                                             (line  361)
+* mdouble-float:                         MIPS Options.       (line  237)
+* mdsp:                                  MIPS Options.       (line  256)
+* mdspr2:                                MIPS Options.       (line  262)
+* mdual-nops:                            SPU Options.        (line   90)
+* mdwarf2-asm:                           IA-64 Options.      (line   94)
+* mdword:                                FRV Options.        (line   32)
+* mdynamic-no-pic:                       RS/6000 and PowerPC Options.
+                                                             (line  498)
+* mea32:                                 SPU Options.        (line   55)
+* mea64:                                 SPU Options.        (line   55)
+* meabi:                                 RS/6000 and PowerPC Options.
+                                                             (line  645)
+* mearly-stop-bits:                      IA-64 Options.      (line  100)
+* meb <1>:                               Score Options.      (line    9)
+* meb:                                   MeP Options.        (line   68)
+* mel <1>:                               Score Options.      (line   12)
+* mel:                                   MeP Options.        (line   71)
+* melf <1>:                              MMIX Options.       (line   44)
+* melf:                                  CRIS Options.       (line   87)
+* memb:                                  RS/6000 and PowerPC Options.
+                                                             (line  640)
+* membedded-data:                        MIPS Options.       (line  373)
+* memregs=:                              M32C Options.       (line   21)
+* mep:                                   V850 Options.       (line   16)
+* mepsilon:                              MMIX Options.       (line   15)
+* merror-reloc:                          SPU Options.        (line   10)
+* mesa:                                  S/390 and zSeries Options.
+                                                             (line   95)
+* metrax100:                             CRIS Options.       (line   26)
+* metrax4:                               CRIS Options.       (line   26)
+* mexplicit-relocs <1>:                  MIPS Options.       (line  417)
+* mexplicit-relocs:                      DEC Alpha Options.  (line  184)
+* mextern-sdata:                         MIPS Options.       (line  335)
+* MF:                                    Preprocessor Options.
+                                                             (line  208)
+* mfast-fp:                              Blackfin Options.   (line  129)
+* mfast-indirect-calls:                  HPPA Options.       (line   52)
+* mfaster-structs:                       SPARC Options.      (line   71)
+* mfdpic:                                FRV Options.        (line   56)
+* mfentry:                               i386 and x86-64 Options.
+                                                             (line  677)
+* mfix:                                  DEC Alpha Options.  (line  171)
+* mfix-and-continue:                     Darwin Options.     (line  106)
+* mfix-at697f:                           SPARC Options.      (line  168)
+* mfix-cortex-m3-ldrd:                   ARM Options.        (line  284)
+* mfix-r10000:                           MIPS Options.       (line  503)
+* mfix-r4000:                            MIPS Options.       (line  482)
+* mfix-r4400:                            MIPS Options.       (line  496)
+* mfix-sb1:                              MIPS Options.       (line  535)
+* mfix-vr4120:                           MIPS Options.       (line  514)
+* mfix-vr4130:                           MIPS Options.       (line  528)
+* mfixed-cc:                             FRV Options.        (line   28)
+* mfixed-range <1>:                      SPU Options.        (line   47)
+* mfixed-range <2>:                      SH Options.         (line  216)
+* mfixed-range <3>:                      IA-64 Options.      (line  105)
+* mfixed-range:                          HPPA Options.       (line   59)
+* mflip-mips16:                          MIPS Options.       (line  110)
+* mfloat-abi:                            ARM Options.        (line   41)
+* mfloat-gprs:                           RS/6000 and PowerPC Options.
+                                                             (line  249)
+* mfloat-ieee:                           DEC Alpha Options.  (line  179)
+* mfloat-vax:                            DEC Alpha Options.  (line  179)
+* mfloat32:                              PDP-11 Options.     (line   52)
+* mfloat64:                              PDP-11 Options.     (line   48)
+* mflush-func:                           MIPS Options.       (line  602)
+* mflush-func=NAME:                      M32R/D Options.     (line   94)
+* mflush-trap=NUMBER:                    M32R/D Options.     (line   87)
+* mfmovd:                                SH Options.         (line   97)
+* mforce-no-pic:                         Xtensa Options.     (line   41)
+* mfp:                                   ARM Options.        (line  120)
+* mfp-exceptions:                        MIPS Options.       (line  629)
+* mfp-reg:                               DEC Alpha Options.  (line   25)
+* mfp-rounding-mode:                     DEC Alpha Options.  (line   85)
+* mfp-trap-mode:                         DEC Alpha Options.  (line   63)
+* mfp16-format:                          ARM Options.        (line  141)
+* mfp32:                                 MIPS Options.       (line  220)
+* mfp64:                                 MIPS Options.       (line  223)
+* mfpe:                                  ARM Options.        (line  120)
+* mfpmath <1>:                           i386 and x86-64 Options.
+                                                             (line  174)
+* mfpmath:                               Optimize Options.   (line 1811)
+* mfpr-32:                               FRV Options.        (line   13)
+* mfpr-64:                               FRV Options.        (line   16)
+* mfprnd:                                RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mfpu <1>:                              SPARC Options.      (line   20)
+* mfpu <2>:                              RS/6000 and PowerPC Options.
+                                                             (line  369)
+* mfpu <3>:                              PDP-11 Options.     (line    9)
+* mfpu:                                  ARM Options.        (line  120)
+* mfriz:                                 RS/6000 and PowerPC Options.
+                                                             (line  827)
+* mfull-toc:                             RS/6000 and PowerPC Options.
+                                                             (line  277)
+* mfused-madd <1>:                       Xtensa Options.     (line   19)
+* mfused-madd <2>:                       S/390 and zSeries Options.
+                                                             (line  137)
+* mfused-madd <3>:                       RS/6000 and PowerPC Options.
+                                                             (line  421)
+* mfused-madd <4>:                       MIPS Options.       (line  467)
+* mfused-madd <5>:                       IA-64 Options.      (line   88)
+* mfused-madd:                           i386 and x86-64 Options.
+                                                             (line  501)
+* mg:                                    VAX Options.        (line   17)
+* MG:                                    Preprocessor Options.
+                                                             (line  217)
+* mgas <1>:                              HPPA Options.       (line   75)
+* mgas:                                  DEC Alpha Options.  (line  159)
+* mgen-cell-microcode:                   RS/6000 and PowerPC Options.
+                                                             (line  202)
+* mgettrcost=NUMBER:                     SH Options.         (line  238)
+* mglibc:                                GNU/Linux Options.  (line    9)
+* mgnu:                                  VAX Options.        (line   13)
+* mgnu-as:                               IA-64 Options.      (line   18)
+* mgnu-ld <1>:                           IA-64 Options.      (line   23)
+* mgnu-ld:                               HPPA Options.       (line  111)
+* mgotplt:                               CRIS Options.       (line   81)
+* mgp32:                                 MIPS Options.       (line  214)
+* mgp64:                                 MIPS Options.       (line  217)
+* mgpopt:                                MIPS Options.       (line  358)
+* mgpr-32:                               FRV Options.        (line    7)
+* mgpr-64:                               FRV Options.        (line   10)
+* mgprel-ro:                             FRV Options.        (line   79)
+* mh:                                    H8/300 Options.     (line   14)
+* mhard-dfp <1>:                         S/390 and zSeries Options.
+                                                             (line   20)
+* mhard-dfp:                             RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mhard-float <1>:                       SPARC Options.      (line   20)
+* mhard-float <2>:                       S/390 and zSeries Options.
+                                                             (line   11)
+* mhard-float <3>:                       RS/6000 and PowerPC Options.
+                                                             (line  355)
+* mhard-float <4>:                       MIPS Options.       (line  226)
+* mhard-float <5>:                       MicroBlaze Options. (line   10)
+* mhard-float <6>:                       M680x0 Options.     (line  196)
+* mhard-float <7>:                       FRV Options.        (line   19)
+* mhard-float:                           ARM Options.        (line   57)
+* mhard-quad-float:                      SPARC Options.      (line   41)
+* mhardlit:                              MCore Options.      (line   10)
+* mhint-max-distance:                    SPU Options.        (line  102)
+* mhint-max-nops:                        SPU Options.        (line   96)
+* mhitachi:                              SH Options.         (line  101)
+* mhp-ld:                                HPPA Options.       (line  123)
+* micplb:                                Blackfin Options.   (line  169)
+* mid-shared-library:                    Blackfin Options.   (line   77)
+* mieee <1>:                             SH Options.         (line  118)
+* mieee:                                 DEC Alpha Options.  (line   39)
+* mieee-conformant:                      DEC Alpha Options.  (line  134)
+* mieee-fp:                              i386 and x86-64 Options.
+                                                             (line  229)
+* mieee-with-inexact:                    DEC Alpha Options.  (line   52)
+* milp32:                                IA-64 Options.      (line  121)
+* mimpure-text:                          Solaris 2 Options.  (line    9)
+* mincoming-stack-boundary:              i386 and x86-64 Options.
+                                                             (line  407)
+* mindexed-addressing:                   SH Options.         (line  228)
+* minline-all-stringops:                 i386 and x86-64 Options.
+                                                             (line  634)
+* minline-float-divide-max-throughput:   IA-64 Options.      (line   58)
+* minline-float-divide-min-latency:      IA-64 Options.      (line   54)
+* minline-ic_invalidate:                 SH Options.         (line  127)
+* minline-int-divide-max-throughput:     IA-64 Options.      (line   69)
+* minline-int-divide-min-latency:        IA-64 Options.      (line   65)
+* minline-plt <1>:                       FRV Options.        (line   64)
+* minline-plt:                           Blackfin Options.   (line  134)
+* minline-sqrt-max-throughput:           IA-64 Options.      (line   80)
+* minline-sqrt-min-latency:              IA-64 Options.      (line   76)
+* minline-stringops-dynamically:         i386 and x86-64 Options.
+                                                             (line  641)
+* minmax:                                M68hc1x Options.    (line   31)
+* minsert-sched-nops:                    RS/6000 and PowerPC Options.
+                                                             (line  526)
+* mint-register:                         RX Options.         (line   99)
+* mint16:                                PDP-11 Options.     (line   40)
+* mint32 <1>:                            PDP-11 Options.     (line   44)
+* mint32:                                H8/300 Options.     (line   28)
+* mint8:                                 AVR Options.        (line   43)
+* minterlink-mips16:                     MIPS Options.       (line  117)
+* minvalid-symbols:                      SH Options.         (line  261)
+* mio-volatile:                          MeP Options.        (line   74)
+* mips1:                                 MIPS Options.       (line   77)
+* mips16:                                MIPS Options.       (line  102)
+* mips2:                                 MIPS Options.       (line   80)
+* mips3:                                 MIPS Options.       (line   83)
+* mips32:                                MIPS Options.       (line   89)
+* mips32r2:                              MIPS Options.       (line   92)
+* mips3d:                                MIPS Options.       (line  285)
+* mips4:                                 MIPS Options.       (line   86)
+* mips64:                                MIPS Options.       (line   95)
+* mips64r2:                              MIPS Options.       (line   98)
+* misel:                                 RS/6000 and PowerPC Options.
+                                                             (line  220)
+* misize:                                SH Options.         (line  139)
+* missue-rate=NUMBER:                    M32R/D Options.     (line   79)
+* mivc2:                                 MeP Options.        (line   59)
+* mjump-in-delay:                        HPPA Options.       (line   28)
+* mkernel:                               Darwin Options.     (line   84)
+* mknuthdiv:                             MMIX Options.       (line   33)
+* ml <1>:                                SH Options.         (line   77)
+* ml:                                    MeP Options.        (line   78)
+* mlarge-data:                           DEC Alpha Options.  (line  195)
+* mlarge-data-threshold=NUMBER:          i386 and x86-64 Options.
+                                                             (line  309)
+* mlarge-mem:                            SPU Options.        (line   35)
+* mlarge-text:                           DEC Alpha Options.  (line  213)
+* mleadz:                                MeP Options.        (line   81)
+* mleaf-id-shared-library:               Blackfin Options.   (line   88)
+* mlibfuncs:                             MMIX Options.       (line   10)
+* mlibrary-pic:                          FRV Options.        (line  110)
+* mlinked-fp:                            FRV Options.        (line   94)
+* mlinker-opt:                           HPPA Options.       (line   85)
+* mlinux:                                CRIS Options.       (line   91)
+* mlittle:                               RS/6000 and PowerPC Options.
+                                                             (line  487)
+* mlittle-endian <1>:                    SPARC Options.      (line  176)
+* mlittle-endian <2>:                    RS/6000 and PowerPC Options.
+                                                             (line  487)
+* mlittle-endian <3>:                    MCore Options.      (line   39)
+* mlittle-endian <4>:                    IA-64 Options.      (line   13)
+* mlittle-endian:                        ARM Options.        (line   63)
+* mlittle-endian-data:                   RX Options.         (line   42)
+* mliw:                                  MN10300 Options.    (line   55)
+* mllsc:                                 MIPS Options.       (line  242)
+* mlocal-sdata:                          MIPS Options.       (line  323)
+* mlong-calls <1>:                       V850 Options.       (line   10)
+* mlong-calls <2>:                       MIPS Options.       (line  453)
+* mlong-calls <3>:                       M68hc1x Options.    (line   35)
+* mlong-calls <4>:                       FRV Options.        (line   99)
+* mlong-calls <5>:                       Blackfin Options.   (line  117)
+* mlong-calls:                           ARM Options.        (line  167)
+* mlong-double-128:                      S/390 and zSeries Options.
+                                                             (line   29)
+* mlong-double-64:                       S/390 and zSeries Options.
+                                                             (line   29)
+* mlong-load-store:                      HPPA Options.       (line   66)
+* mlong32:                               MIPS Options.       (line  298)
+* mlong64:                               MIPS Options.       (line  293)
+* mlongcall:                             RS/6000 and PowerPC Options.
+                                                             (line  717)
+* mlongcalls:                            Xtensa Options.     (line   72)
+* mlow-64k:                              Blackfin Options.   (line   66)
+* mlp64:                                 IA-64 Options.      (line  121)
+* mm:                                    MeP Options.        (line   84)
+* MM:                                    Preprocessor Options.
+                                                             (line  198)
+* mmac <1>:                              Score Options.      (line   21)
+* mmac:                                  CRX Options.        (line    9)
+* mmad:                                  MIPS Options.       (line  462)
+* mmalloc64 <1>:                         IA-64/VMS Options.  (line   17)
+* mmalloc64:                             DEC Alpha/VMS Options.
+                                                             (line   17)
+* mmangle-cpu:                           ARC Options.        (line   15)
+* mmax:                                  DEC Alpha Options.  (line  171)
+* mmax-constant-size:                    RX Options.         (line   81)
+* mmax-stack-frame:                      CRIS Options.       (line   22)
+* mmcount-ra-address:                    MIPS Options.       (line  678)
+* mmcu:                                  AVR Options.        (line    9)
+* MMD:                                   Preprocessor Options.
+                                                             (line  278)
+* mmedia:                                FRV Options.        (line   44)
+* mmemcpy <1>:                           MIPS Options.       (line  447)
+* mmemcpy:                               MicroBlaze Options. (line   13)
+* mmemory-latency:                       DEC Alpha Options.  (line  276)
+* mmfcrf:                                RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mmfpgpr:                               RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mminimal-toc:                          RS/6000 and PowerPC Options.
+                                                             (line  277)
+* mminmax:                               MeP Options.        (line   87)
+* mmmx:                                  i386 and x86-64 Options.
+                                                             (line  477)
+* mmodel=large:                          M32R/D Options.     (line   33)
+* mmodel=medium:                         M32R/D Options.     (line   27)
+* mmodel=small:                          M32R/D Options.     (line   18)
+* mmovbe:                                i386 and x86-64 Options.
+                                                             (line  548)
+* mmt:                                   MIPS Options.       (line  290)
+* mmul-bug-workaround:                   CRIS Options.       (line   31)
+* mmuladd:                               FRV Options.        (line   50)
+* mmulhw:                                RS/6000 and PowerPC Options.
+                                                             (line  430)
+* mmult:                                 MeP Options.        (line   90)
+* mmult-bug:                             MN10300 Options.    (line    9)
+* mmulti-cond-exec:                      FRV Options.        (line  176)
+* mmulticore:                            Blackfin Options.   (line  138)
+* mmultiple:                             RS/6000 and PowerPC Options.
+                                                             (line  380)
+* mmvcle:                                S/390 and zSeries Options.
+                                                             (line  105)
+* mmvme:                                 RS/6000 and PowerPC Options.
+                                                             (line  621)
+* mn:                                    H8/300 Options.     (line   20)
+* mnested-cond-exec:                     FRV Options.        (line  189)
+* mnew-mnemonics:                        RS/6000 and PowerPC Options.
+                                                             (line  104)
+* mnhwloop:                              Score Options.      (line   15)
+* mno-3dnow:                             i386 and x86-64 Options.
+                                                             (line  477)
+* mno-4byte-functions:                   MCore Options.      (line   27)
+* mno-abicalls:                          MIPS Options.       (line  154)
+* mno-abshi:                             PDP-11 Options.     (line   58)
+* mno-ac0:                               PDP-11 Options.     (line   20)
+* mno-address-space-conversion:          SPU Options.        (line   63)
+* mno-align-double:                      i386 and x86-64 Options.
+                                                             (line  267)
+* mno-align-int:                         M680x0 Options.     (line  266)
+* mno-align-loops:                       M32R/D Options.     (line   76)
+* mno-align-stringops:                   i386 and x86-64 Options.
+                                                             (line  629)
+* mno-altivec:                           RS/6000 and PowerPC Options.
+                                                             (line  191)
+* mno-am33:                              MN10300 Options.    (line   20)
+* mno-app-regs <1>:                      V850 Options.       (line   61)
+* mno-app-regs:                          SPARC Options.      (line   10)
+* mno-as100-syntax:                      RX Options.         (line   75)
+* mno-atomic-updates:                    SPU Options.        (line   78)
+* mno-avoid-indexed-addresses:           RS/6000 and PowerPC Options.
+                                                             (line  412)
+* mno-backchain:                         S/390 and zSeries Options.
+                                                             (line   35)
+* mno-base-addresses:                    MMIX Options.       (line   54)
+* mno-bit-align:                         RS/6000 and PowerPC Options.
+                                                             (line  444)
+* mno-bitfield:                          M680x0 Options.     (line  230)
+* mno-branch-likely:                     MIPS Options.       (line  618)
+* mno-branch-predict:                    MMIX Options.       (line   49)
+* mno-bwx:                               DEC Alpha Options.  (line  171)
+* mno-callgraph-data:                    MCore Options.      (line   31)
+* mno-check-zero-division:               MIPS Options.       (line  426)
+* mno-cirrus-fix-invalid-insns:          ARM Options.        (line  202)
+* mno-cix:                               DEC Alpha Options.  (line  171)
+* mno-clearbss:                          MicroBlaze Options. (line   16)
+* mno-cmpb:                              RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-cond-exec:                         FRV Options.        (line  158)
+* mno-cond-move:                         FRV Options.        (line  134)
+* mno-const-align:                       CRIS Options.       (line   55)
+* mno-const16:                           Xtensa Options.     (line   10)
+* mno-crt0:                              MN10300 Options.    (line   44)
+* mno-csync-anomaly:                     Blackfin Options.   (line   62)
+* mno-data-align:                        CRIS Options.       (line   55)
+* mno-debug:                             S/390 and zSeries Options.
+                                                             (line  112)
+* mno-div <1>:                           MCore Options.      (line   15)
+* mno-div:                               M680x0 Options.     (line  208)
+* mno-dlmzb:                             RS/6000 and PowerPC Options.
+                                                             (line  437)
+* mno-double:                            FRV Options.        (line   41)
+* mno-dsp:                               MIPS Options.       (line  256)
+* mno-dspr2:                             MIPS Options.       (line  262)
+* mno-dwarf2-asm:                        IA-64 Options.      (line   94)
+* mno-dword:                             FRV Options.        (line   35)
+* mno-eabi:                              RS/6000 and PowerPC Options.
+                                                             (line  645)
+* mno-early-stop-bits:                   IA-64 Options.      (line  100)
+* mno-eflags:                            FRV Options.        (line  125)
+* mno-embedded-data:                     MIPS Options.       (line  373)
+* mno-ep:                                V850 Options.       (line   16)
+* mno-epsilon:                           MMIX Options.       (line   15)
+* mno-explicit-relocs <1>:               MIPS Options.       (line  417)
+* mno-explicit-relocs:                   DEC Alpha Options.  (line  184)
+* mno-extern-sdata:                      MIPS Options.       (line  335)
+* mno-fancy-math-387:                    i386 and x86-64 Options.
+                                                             (line  256)
+* mno-faster-structs:                    SPARC Options.      (line   71)
+* mno-fix:                               DEC Alpha Options.  (line  171)
+* mno-fix-r10000:                        MIPS Options.       (line  503)
+* mno-fix-r4000:                         MIPS Options.       (line  482)
+* mno-fix-r4400:                         MIPS Options.       (line  496)
+* mno-float32:                           PDP-11 Options.     (line   48)
+* mno-float64:                           PDP-11 Options.     (line   52)
+* mno-flush-func:                        M32R/D Options.     (line   99)
+* mno-flush-trap:                        M32R/D Options.     (line   91)
+* mno-fp-in-toc:                         RS/6000 and PowerPC Options.
+                                                             (line  277)
+* mno-fp-regs:                           DEC Alpha Options.  (line   25)
+* mno-fp-ret-in-387:                     i386 and x86-64 Options.
+                                                             (line  246)
+* mno-fprnd:                             RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-fpu:                               SPARC Options.      (line   25)
+* mno-fused-madd <1>:                    Xtensa Options.     (line   19)
+* mno-fused-madd <2>:                    S/390 and zSeries Options.
+                                                             (line  137)
+* mno-fused-madd <3>:                    RS/6000 and PowerPC Options.
+                                                             (line  421)
+* mno-fused-madd <4>:                    MIPS Options.       (line  467)
+* mno-fused-madd <5>:                    IA-64 Options.      (line   88)
+* mno-fused-madd:                        i386 and x86-64 Options.
+                                                             (line  501)
+* mno-gnu-as:                            IA-64 Options.      (line   18)
+* mno-gnu-ld:                            IA-64 Options.      (line   23)
+* mno-gotplt:                            CRIS Options.       (line   81)
+* mno-gpopt:                             MIPS Options.       (line  358)
+* mno-hard-dfp <1>:                      S/390 and zSeries Options.
+                                                             (line   20)
+* mno-hard-dfp:                          RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-hardlit:                           MCore Options.      (line   10)
+* mno-id-shared-library:                 Blackfin Options.   (line   84)
+* mno-ieee-fp:                           i386 and x86-64 Options.
+                                                             (line  229)
+* mno-inline-float-divide:               IA-64 Options.      (line   62)
+* mno-inline-int-divide:                 IA-64 Options.      (line   73)
+* mno-inline-sqrt:                       IA-64 Options.      (line   84)
+* mno-int16:                             PDP-11 Options.     (line   44)
+* mno-int32:                             PDP-11 Options.     (line   40)
+* mno-interlink-mips16:                  MIPS Options.       (line  117)
+* mno-interrupts:                        AVR Options.        (line   32)
+* mno-isel:                              RS/6000 and PowerPC Options.
+                                                             (line  220)
+* mno-knuthdiv:                          MMIX Options.       (line   33)
+* mno-leaf-id-shared-library:            Blackfin Options.   (line   94)
+* mno-libfuncs:                          MMIX Options.       (line   10)
+* mno-llsc:                              MIPS Options.       (line  242)
+* mno-local-sdata:                       MIPS Options.       (line  323)
+* mno-long-calls <1>:                    V850 Options.       (line   10)
+* mno-long-calls <2>:                    MIPS Options.       (line  453)
+* mno-long-calls <3>:                    M68hc1x Options.    (line   35)
+* mno-long-calls <4>:                    HPPA Options.       (line  136)
+* mno-long-calls <5>:                    Blackfin Options.   (line  117)
+* mno-long-calls:                        ARM Options.        (line  167)
+* mno-longcall:                          RS/6000 and PowerPC Options.
+                                                             (line  717)
+* mno-longcalls:                         Xtensa Options.     (line   72)
+* mno-low-64k:                           Blackfin Options.   (line   70)
+* mno-lsim <1>:                          MCore Options.      (line   46)
+* mno-lsim:                              FR30 Options.       (line   14)
+* mno-mad:                               MIPS Options.       (line  462)
+* mno-max:                               DEC Alpha Options.  (line  171)
+* mno-mcount-ra-address:                 MIPS Options.       (line  678)
+* mno-mdmx:                              MIPS Options.       (line  279)
+* mno-media:                             FRV Options.        (line   47)
+* mno-memcpy:                            MIPS Options.       (line  447)
+* mno-mfcrf:                             RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-mfpgpr:                            RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-mips16:                            MIPS Options.       (line  102)
+* mno-mips3d:                            MIPS Options.       (line  285)
+* mno-mmx:                               i386 and x86-64 Options.
+                                                             (line  477)
+* mno-mt:                                MIPS Options.       (line  290)
+* mno-mul-bug-workaround:                CRIS Options.       (line   31)
+* mno-muladd:                            FRV Options.        (line   53)
+* mno-mulhw:                             RS/6000 and PowerPC Options.
+                                                             (line  430)
+* mno-mult-bug:                          MN10300 Options.    (line   13)
+* mno-multi-cond-exec:                   FRV Options.        (line  183)
+* mno-multiple:                          RS/6000 and PowerPC Options.
+                                                             (line  380)
+* mno-mvcle:                             S/390 and zSeries Options.
+                                                             (line  105)
+* mno-nested-cond-exec:                  FRV Options.        (line  195)
+* mno-optimize-membar:                   FRV Options.        (line  205)
+* mno-opts:                              MeP Options.        (line   93)
+* mno-pack:                              FRV Options.        (line  122)
+* mno-packed-stack:                      S/390 and zSeries Options.
+                                                             (line   54)
+* mno-paired:                            RS/6000 and PowerPC Options.
+                                                             (line  234)
+* mno-paired-single:                     MIPS Options.       (line  273)
+* mno-pic:                               IA-64 Options.      (line   26)
+* mno-plt:                               MIPS Options.       (line  181)
+* mno-popcntb:                           RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-popcntd:                           RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-power:                             RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-power2:                            RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-powerpc:                           RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-powerpc-gfxopt:                    RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-powerpc-gpopt:                     RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-powerpc64:                         RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-prolog-function:                   V850 Options.       (line   23)
+* mno-prologue-epilogue:                 CRIS Options.       (line   71)
+* mno-prototype:                         RS/6000 and PowerPC Options.
+                                                             (line  605)
+* mno-push-args:                         i386 and x86-64 Options.
+                                                             (line  606)
+* mno-red-zone:                          i386 and x86-64 Options.
+                                                             (line  709)
+* mno-register-names:                    IA-64 Options.      (line   37)
+* mno-regnames:                          RS/6000 and PowerPC Options.
+                                                             (line  711)
+* mno-relax-immediate:                   MCore Options.      (line   19)
+* mno-relocatable:                       RS/6000 and PowerPC Options.
+                                                             (line  461)
+* mno-relocatable-lib:                   RS/6000 and PowerPC Options.
+                                                             (line  472)
+* mno-rtd:                               M680x0 Options.     (line  261)
+* mno-scc:                               FRV Options.        (line  146)
+* mno-sched-ar-data-spec:                IA-64 Options.      (line  135)
+* mno-sched-ar-in-data-spec:             IA-64 Options.      (line  156)
+* mno-sched-br-data-spec:                IA-64 Options.      (line  128)
+* mno-sched-br-in-data-spec:             IA-64 Options.      (line  149)
+* mno-sched-control-spec:                IA-64 Options.      (line  142)
+* mno-sched-count-spec-in-critical-path: IA-64 Options.      (line  183)
+* mno-sched-in-control-spec:             IA-64 Options.      (line  163)
+* mno-sched-prefer-non-control-spec-insns: IA-64 Options.    (line  176)
+* mno-sched-prefer-non-data-spec-insns:  IA-64 Options.      (line  169)
+* mno-sched-prolog:                      ARM Options.        (line   32)
+* mno-sdata <1>:                         RS/6000 and PowerPC Options.
+                                                             (line  692)
+* mno-sdata:                             IA-64 Options.      (line   42)
+* mno-sep-data:                          Blackfin Options.   (line  112)
+* mno-serialize-volatile:                Xtensa Options.     (line   35)
+* mno-short:                             M680x0 Options.     (line  225)
+* mno-side-effects:                      CRIS Options.       (line   46)
+* mno-sim:                               RX Options.         (line   70)
+* mno-single-exit:                       MMIX Options.       (line   66)
+* mno-slow-bytes:                        MCore Options.      (line   35)
+* mno-small-exec:                        S/390 and zSeries Options.
+                                                             (line   80)
+* mno-smartmips:                         MIPS Options.       (line  269)
+* mno-soft-float:                        DEC Alpha Options.  (line   10)
+* mno-space-regs:                        HPPA Options.       (line   45)
+* mno-spe:                               RS/6000 and PowerPC Options.
+                                                             (line  229)
+* mno-specld-anomaly:                    Blackfin Options.   (line   52)
+* mno-split-addresses:                   MIPS Options.       (line  411)
+* mno-sse:                               i386 and x86-64 Options.
+                                                             (line  477)
+* mno-stack-align:                       CRIS Options.       (line   55)
+* mno-stack-bias:                        SPARC Options.      (line  213)
+* mno-strict-align <1>:                  RS/6000 and PowerPC Options.
+                                                             (line  456)
+* mno-strict-align:                      M680x0 Options.     (line  286)
+* mno-string:                            RS/6000 and PowerPC Options.
+                                                             (line  391)
+* mno-sum-in-toc:                        RS/6000 and PowerPC Options.
+                                                             (line  277)
+* mno-sym32:                             MIPS Options.       (line  308)
+* mno-target-align:                      Xtensa Options.     (line   59)
+* mno-text-section-literals:             Xtensa Options.     (line   47)
+* mno-tls-markers:                       RS/6000 and PowerPC Options.
+                                                             (line  750)
+* mno-toc:                               RS/6000 and PowerPC Options.
+                                                             (line  481)
+* mno-toplevel-symbols:                  MMIX Options.       (line   40)
+* mno-tpf-trace:                         S/390 and zSeries Options.
+                                                             (line  131)
+* mno-unaligned-doubles:                 SPARC Options.      (line   59)
+* mno-uninit-const-in-rodata:            MIPS Options.       (line  381)
+* mno-update:                            RS/6000 and PowerPC Options.
+                                                             (line  402)
+* mno-v8plus:                            SPARC Options.      (line  156)
+* mno-vis:                               SPARC Options.      (line  163)
+* mno-vliw-branch:                       FRV Options.        (line  170)
+* mno-volatile-asm-stop:                 IA-64 Options.      (line   32)
+* mno-vrsave:                            RS/6000 and PowerPC Options.
+                                                             (line  199)
+* mno-vsx:                               RS/6000 and PowerPC Options.
+                                                             (line  243)
+* mno-wide-bitfields:                    MCore Options.      (line   23)
+* mno-xgot <1>:                          MIPS Options.       (line  191)
+* mno-xgot:                              M680x0 Options.     (line  318)
+* mno-xl-compat:                         RS/6000 and PowerPC Options.
+                                                             (line  312)
+* mno-zero-extend:                       MMIX Options.       (line   27)
+* mnobitfield:                           M680x0 Options.     (line  230)
+* mnoieee:                               SH Options.         (line  118)
+* mnoliw:                                MN10300 Options.    (line   60)
+* mnomacsave:                            SH Options.         (line  112)
+* mnominmax:                             M68hc1x Options.    (line   31)
+* mnop-fun-dllimport:                    i386 and x86-64 Windows Options.
+                                                             (line   22)
+* mold-mnemonics:                        RS/6000 and PowerPC Options.
+                                                             (line  104)
+* momit-leaf-frame-pointer <1>:          i386 and x86-64 Options.
+                                                             (line  654)
+* momit-leaf-frame-pointer:              Blackfin Options.   (line   40)
+* mone-byte-bool:                        Darwin Options.     (line   92)
+* moptimize-membar:                      FRV Options.        (line  201)
+* MP:                                    Preprocessor Options.
+                                                             (line  227)
+* mpa-risc-1-0:                          HPPA Options.       (line   19)
+* mpa-risc-1-1:                          HPPA Options.       (line   19)
+* mpa-risc-2-0:                          HPPA Options.       (line   19)
+* mpack:                                 FRV Options.        (line  119)
+* mpacked-stack:                         S/390 and zSeries Options.
+                                                             (line   54)
+* mpadstruct:                            SH Options.         (line  142)
+* mpaired:                               RS/6000 and PowerPC Options.
+                                                             (line  234)
+* mpaired-single:                        MIPS Options.       (line  273)
+* mpc32:                                 i386 and x86-64 Options.
+                                                             (line  372)
+* mpc64:                                 i386 and x86-64 Options.
+                                                             (line  372)
+* mpc80:                                 i386 and x86-64 Options.
+                                                             (line  372)
+* mpcrel:                                M680x0 Options.     (line  278)
+* mpdebug:                               CRIS Options.       (line   35)
+* mpe:                                   RS/6000 and PowerPC Options.
+                                                             (line  332)
+* mpe-aligned-commons:                   i386 and x86-64 Windows Options.
+                                                             (line   53)
+* mpic-register:                         ARM Options.        (line  198)
+* mplt:                                  MIPS Options.       (line  181)
+* mpoke-function-name:                   ARM Options.        (line  212)
+* mpopcntb:                              RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mpopcntd:                              RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mportable-runtime:                     HPPA Options.       (line   71)
+* mpower:                                RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mpower2:                               RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mpowerpc:                              RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mpowerpc-gfxopt:                       RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mpowerpc-gpopt:                        RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mpowerpc64:                            RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mprefer-avx128:                        i386 and x86-64 Options.
+                                                             (line  526)
+* mprefergot:                            SH Options.         (line  149)
+* mpreferred-stack-boundary:             i386 and x86-64 Options.
+                                                             (line  402)
+* mprioritize-restricted-insns:          RS/6000 and PowerPC Options.
+                                                             (line  510)
+* mprolog-function:                      V850 Options.       (line   23)
+* mprologue-epilogue:                    CRIS Options.       (line   71)
+* mprototype:                            RS/6000 and PowerPC Options.
+                                                             (line  605)
+* mpt-fixed:                             SH Options.         (line  242)
+* mpush-args <1>:                        i386 and x86-64 Options.
+                                                             (line  606)
+* mpush-args:                            CRX Options.        (line   13)
+* MQ:                                    Preprocessor Options.
+                                                             (line  253)
+* mr10k-cache-barrier:                   MIPS Options.       (line  540)
+* mrecip <1>:                            RS/6000 and PowerPC Options.
+                                                             (line  762)
+* mrecip:                                i386 and x86-64 Options.
+                                                             (line  558)
+* mrecip-precision:                      RS/6000 and PowerPC Options.
+                                                             (line  798)
+* mrecip=opt:                            RS/6000 and PowerPC Options.
+                                                             (line  775)
+* mregister-names:                       IA-64 Options.      (line   37)
+* mregnames:                             RS/6000 and PowerPC Options.
+                                                             (line  711)
+* mregparm:                              i386 and x86-64 Options.
+                                                             (line  339)
+* mrelax <1>:                            SH Options.         (line   86)
+* mrelax <2>:                            RX Options.         (line   94)
+* mrelax <3>:                            MN10300 Options.    (line   47)
+* mrelax:                                H8/300 Options.     (line    9)
+* mrelax-immediate:                      MCore Options.      (line   19)
+* mrelax-pic-calls:                      MIPS Options.       (line  665)
+* mrelocatable:                          RS/6000 and PowerPC Options.
+                                                             (line  461)
+* mrelocatable-lib:                      RS/6000 and PowerPC Options.
+                                                             (line  472)
+* mrepeat:                               MeP Options.        (line   96)
+* mreturn-pointer-on-d0:                 MN10300 Options.    (line   37)
+* mrodata:                               ARC Options.        (line   30)
+* mrtd <1>:                              Function Attributes.
+                                                             (line  177)
+* mrtd <2>:                              M680x0 Options.     (line  239)
+* mrtd:                                  i386 and x86-64 Options.
+                                                             (line  315)
+* mrtp:                                  VxWorks Options.    (line   11)
+* ms <1>:                                MeP Options.        (line  100)
+* ms:                                    H8/300 Options.     (line   17)
+* ms2600:                                H8/300 Options.     (line   24)
+* msafe-dma:                             SPU Options.        (line   17)
+* msafe-hints:                           SPU Options.        (line  107)
+* msahf:                                 i386 and x86-64 Options.
+                                                             (line  538)
+* msatur:                                MeP Options.        (line  105)
+* msave-acc-in-interrupts:               RX Options.         (line  108)
+* mscc:                                  FRV Options.        (line  140)
+* msched-ar-data-spec:                   IA-64 Options.      (line  135)
+* msched-ar-in-data-spec:                IA-64 Options.      (line  156)
+* msched-br-data-spec:                   IA-64 Options.      (line  128)
+* msched-br-in-data-spec:                IA-64 Options.      (line  149)
+* msched-control-spec:                   IA-64 Options.      (line  142)
+* msched-costly-dep:                     RS/6000 and PowerPC Options.
+                                                             (line  517)
+* msched-count-spec-in-critical-path:    IA-64 Options.      (line  183)
+* msched-fp-mem-deps-zero-cost:          IA-64 Options.      (line  200)
+* msched-in-control-spec:                IA-64 Options.      (line  163)
+* msched-max-memory-insns:               IA-64 Options.      (line  209)
+* msched-max-memory-insns-hard-limit:    IA-64 Options.      (line  215)
+* msched-prefer-non-control-spec-insns:  IA-64 Options.      (line  176)
+* msched-prefer-non-data-spec-insns:     IA-64 Options.      (line  169)
+* msched-spec-ldc:                       IA-64 Options.      (line  189)
+* msched-stop-bits-after-every-cycle:    IA-64 Options.      (line  196)
+* mschedule:                             HPPA Options.       (line   78)
+* mscore5:                               Score Options.      (line   25)
+* mscore5u:                              Score Options.      (line   28)
+* mscore7:                               Score Options.      (line   31)
+* mscore7d:                              Score Options.      (line   34)
+* msda:                                  V850 Options.       (line   40)
+* msdata <1>:                            RS/6000 and PowerPC Options.
+                                                             (line  679)
+* msdata:                                IA-64 Options.      (line   42)
+* msdata=data:                           RS/6000 and PowerPC Options.
+                                                             (line  684)
+* msdata=default:                        RS/6000 and PowerPC Options.
+                                                             (line  679)
+* msdata=eabi:                           RS/6000 and PowerPC Options.
+                                                             (line  659)
+* msdata=none <1>:                       RS/6000 and PowerPC Options.
+                                                             (line  692)
+* msdata=none:                           M32R/D Options.     (line   40)
+* msdata=sdata:                          M32R/D Options.     (line   49)
+* msdata=sysv:                           RS/6000 and PowerPC Options.
+                                                             (line  670)
+* msdata=use:                            M32R/D Options.     (line   53)
+* msdram <1>:                            MeP Options.        (line  110)
+* msdram:                                Blackfin Options.   (line  163)
+* msecure-plt:                           RS/6000 and PowerPC Options.
+                                                             (line  209)
+* msel-sched-dont-check-control-spec:    IA-64 Options.      (line  205)
+* msep-data:                             Blackfin Options.   (line  106)
+* mserialize-volatile:                   Xtensa Options.     (line   35)
+* mshared-library-id:                    Blackfin Options.   (line   99)
+* mshort <1>:                            M68hc1x Options.    (line   40)
+* mshort:                                M680x0 Options.     (line  219)
+* msign-extend-enabled:                  LM32 Options.       (line   18)
+* msim <1>:                              Xstormy16 Options.  (line    9)
+* msim <2>:                              RX Options.         (line   70)
+* msim <3>:                              RS/6000 and PowerPC Options.
+                                                             (line  615)
+* msim <4>:                              MeP Options.        (line  114)
+* msim <5>:                              M32C Options.       (line   13)
+* msim:                                  Blackfin Options.   (line   33)
+* msimnovec:                             MeP Options.        (line  117)
+* msimple-fpu:                           RS/6000 and PowerPC Options.
+                                                             (line  365)
+* msingle-exit:                          MMIX Options.       (line   66)
+* msingle-float <1>:                     RS/6000 and PowerPC Options.
+                                                             (line  361)
+* msingle-float:                         MIPS Options.       (line  233)
+* msingle-pic-base <1>:                  RS/6000 and PowerPC Options.
+                                                             (line  504)
+* msingle-pic-base:                      ARM Options.        (line  192)
+* msio:                                  HPPA Options.       (line  105)
+* mslow-bytes:                           MCore Options.      (line   35)
+* msmall-data:                           DEC Alpha Options.  (line  195)
+* msmall-data-limit:                     RX Options.         (line   47)
+* msmall-divides:                        MicroBlaze Options. (line   38)
+* msmall-exec:                           S/390 and zSeries Options.
+                                                             (line   80)
+* msmall-mem:                            SPU Options.        (line   35)
+* msmall-model:                          FR30 Options.       (line    9)
+* msmall-text:                           DEC Alpha Options.  (line  213)
+* msmartmips:                            MIPS Options.       (line  269)
+* msoft-float <1>:                       SPARC Options.      (line   25)
+* msoft-float <2>:                       S/390 and zSeries Options.
+                                                             (line   11)
+* msoft-float <3>:                       RS/6000 and PowerPC Options.
+                                                             (line  355)
+* msoft-float <4>:                       PDP-11 Options.     (line   13)
+* msoft-float <5>:                       MIPS Options.       (line  229)
+* msoft-float <6>:                       MicroBlaze Options. (line    7)
+* msoft-float <7>:                       M680x0 Options.     (line  202)
+* msoft-float <8>:                       i386 and x86-64 Options.
+                                                             (line  234)
+* msoft-float <9>:                       HPPA Options.       (line   91)
+* msoft-float <10>:                      FRV Options.        (line   22)
+* msoft-float <11>:                      DEC Alpha Options.  (line   10)
+* msoft-float:                           ARM Options.        (line   60)
+* msoft-quad-float:                      SPARC Options.      (line   45)
+* msoft-reg-count:                       M68hc1x Options.    (line   43)
+* mspace <1>:                            V850 Options.       (line   30)
+* mspace:                                SH Options.         (line  146)
+* mspe:                                  RS/6000 and PowerPC Options.
+                                                             (line  229)
+* mspecld-anomaly:                       Blackfin Options.   (line   47)
+* msplit-addresses:                      MIPS Options.       (line  411)
+* msse:                                  i386 and x86-64 Options.
+                                                             (line  477)
+* msse2avx:                              i386 and x86-64 Options.
+                                                             (line  672)
+* msseregparm:                           i386 and x86-64 Options.
+                                                             (line  350)
+* mstack-align:                          CRIS Options.       (line   55)
+* mstack-bias:                           SPARC Options.      (line  213)
+* mstack-check-l1:                       Blackfin Options.   (line   73)
+* mstack-guard:                          S/390 and zSeries Options.
+                                                             (line  156)
+* mstack-increment:                      MCore Options.      (line   50)
+* mstack-size:                           S/390 and zSeries Options.
+                                                             (line  156)
+* mstackrealign:                         i386 and x86-64 Options.
+                                                             (line  393)
+* mstdmain:                              SPU Options.        (line   40)
+* mstrict-align <1>:                     RS/6000 and PowerPC Options.
+                                                             (line  456)
+* mstrict-align:                         M680x0 Options.     (line  286)
+* mstring:                               RS/6000 and PowerPC Options.
+                                                             (line  391)
+* mstringop-strategy=ALG:                i386 and x86-64 Options.
+                                                             (line  646)
+* mstructure-size-boundary:              ARM Options.        (line  147)
+* msvr4-struct-return:                   RS/6000 and PowerPC Options.
+                                                             (line  579)
+* msym32:                                MIPS Options.       (line  308)
+* msynci:                                MIPS Options.       (line  650)
+* MT:                                    Preprocessor Options.
+                                                             (line  239)
+* mtarget-align:                         Xtensa Options.     (line   59)
+* mtda:                                  V850 Options.       (line   34)
+* mtext:                                 ARC Options.        (line   30)
+* mtext-section-literals:                Xtensa Options.     (line   47)
+* mtf:                                   MeP Options.        (line  121)
+* mthread:                               i386 and x86-64 Windows Options.
+                                                             (line   26)
+* mthreads:                              i386 and x86-64 Options.
+                                                             (line  621)
+* mthumb:                                ARM Options.        (line  233)
+* mthumb-interwork:                      ARM Options.        (line   25)
+* mtiny-stack:                           AVR Options.        (line   40)
+* mtiny=:                                MeP Options.        (line  125)
+* mtls:                                  FRV Options.        (line   75)
+* mTLS:                                  FRV Options.        (line   72)
+* mtls-direct-seg-refs:                  i386 and x86-64 Options.
+                                                             (line  662)
+* mtls-markers:                          RS/6000 and PowerPC Options.
+                                                             (line  750)
+* mtls-size:                             IA-64 Options.      (line  112)
+* mtoc:                                  RS/6000 and PowerPC Options.
+                                                             (line  481)
+* mtomcat-stats:                         FRV Options.        (line  209)
+* mtoplevel-symbols:                     MMIX Options.       (line   40)
+* mtp:                                   ARM Options.        (line  270)
+* mtpcs-frame:                           ARM Options.        (line  243)
+* mtpcs-leaf-frame:                      ARM Options.        (line  249)
+* mtpf-trace:                            S/390 and zSeries Options.
+                                                             (line  131)
+* mtrap-precision:                       DEC Alpha Options.  (line  109)
+* mtune <1>:                             SPARC Options.      (line  143)
+* mtune <2>:                             S/390 and zSeries Options.
+                                                             (line  124)
+* mtune <3>:                             RS/6000 and PowerPC Options.
+                                                             (line  168)
+* mtune <4>:                             MN10300 Options.    (line   31)
+* mtune <5>:                             MIPS Options.       (line   62)
+* mtune <6>:                             M680x0 Options.     (line   69)
+* mtune <7>:                             IA-64 Options.      (line  116)
+* mtune <8>:                             i386 and x86-64 Options.
+                                                             (line   10)
+* mtune <9>:                             DEC Alpha Options.  (line  267)
+* mtune <10>:                            CRIS Options.       (line   16)
+* mtune:                                 ARM Options.        (line   98)
+* muclibc:                               GNU/Linux Options.  (line   13)
+* muls:                                  Score Options.      (line   18)
+* multcost=NUMBER:                       SH Options.         (line  159)
+* multi_module:                          Darwin Options.     (line  199)
+* multilib-library-pic:                  FRV Options.        (line   89)
+* multiply-enabled:                      LM32 Options.       (line   15)
+* multiply_defined:                      Darwin Options.     (line  199)
+* multiply_defined_unused:               Darwin Options.     (line  199)
+* munaligned-doubles:                    SPARC Options.      (line   59)
+* municode:                              i386 and x86-64 Windows Options.
+                                                             (line   30)
+* muninit-const-in-rodata:               MIPS Options.       (line  381)
+* munix:                                 VAX Options.        (line    9)
+* munix-asm:                             PDP-11 Options.     (line   68)
+* munsafe-dma:                           SPU Options.        (line   17)
+* mupdate:                               RS/6000 and PowerPC Options.
+                                                             (line  402)
+* muser-enabled:                         LM32 Options.       (line   21)
+* musermode:                             SH Options.         (line  154)
+* mv850:                                 V850 Options.       (line   49)
+* mv850e:                                V850 Options.       (line   81)
+* mv850e1:                               V850 Options.       (line   73)
+* mv850e2:                               V850 Options.       (line   69)
+* mv850e2v3:                             V850 Options.       (line   64)
+* mv850es:                               V850 Options.       (line   77)
+* mv8plus:                               SPARC Options.      (line  156)
+* mveclibabi <1>:                        RS/6000 and PowerPC Options.
+                                                             (line  807)
+* mveclibabi:                            i386 and x86-64 Options.
+                                                             (line  575)
+* mvect8-ret-in-mem:                     i386 and x86-64 Options.
+                                                             (line  360)
+* mvis:                                  SPARC Options.      (line  163)
+* mvliw-branch:                          FRV Options.        (line  164)
+* mvms-return-codes <1>:                 IA-64/VMS Options.  (line    9)
+* mvms-return-codes:                     DEC Alpha/VMS Options.
+                                                             (line    9)
+* mvolatile-asm-stop:                    IA-64 Options.      (line   32)
+* mvr4130-align:                         MIPS Options.       (line  639)
+* mvrsave:                               RS/6000 and PowerPC Options.
+                                                             (line  199)
+* mvsx:                                  RS/6000 and PowerPC Options.
+                                                             (line  243)
+* mvxworks:                              RS/6000 and PowerPC Options.
+                                                             (line  636)
+* mvzeroupper:                           i386 and x86-64 Options.
+                                                             (line  520)
+* mwarn-cell-microcode:                  RS/6000 and PowerPC Options.
+                                                             (line  205)
+* mwarn-dynamicstack:                    S/390 and zSeries Options.
+                                                             (line  150)
+* mwarn-framesize:                       S/390 and zSeries Options.
+                                                             (line  142)
+* mwarn-reloc:                           SPU Options.        (line   10)
+* mwide-bitfields:                       MCore Options.      (line   23)
+* mwin32:                                i386 and x86-64 Windows Options.
+                                                             (line   35)
+* mwindows:                              i386 and x86-64 Windows Options.
+                                                             (line   41)
+* mword-relocations:                     ARM Options.        (line  278)
+* mwords-little-endian:                  ARM Options.        (line   71)
+* mxgot <1>:                             MIPS Options.       (line  191)
+* mxgot:                                 M680x0 Options.     (line  318)
+* mxilinx-fpu:                           RS/6000 and PowerPC Options.
+                                                             (line  375)
+* mxl-barrel-shift:                      MicroBlaze Options. (line   32)
+* mxl-compat:                            RS/6000 and PowerPC Options.
+                                                             (line  312)
+* mxl-float-convert:                     MicroBlaze Options. (line   50)
+* mxl-float-sqrt:                        MicroBlaze Options. (line   53)
+* mxl-gp-opt:                            MicroBlaze Options. (line   44)
+* mxl-multiply-high:                     MicroBlaze Options. (line   47)
+* mxl-pattern-compare:                   MicroBlaze Options. (line   35)
+* mxl-soft-div:                          MicroBlaze Options. (line   29)
+* mxl-soft-mul:                          MicroBlaze Options. (line   26)
+* mxl-stack-check:                       MicroBlaze Options. (line   41)
+* myellowknife:                          RS/6000 and PowerPC Options.
+                                                             (line  631)
+* mzarch:                                S/390 and zSeries Options.
+                                                             (line   95)
+* mzda:                                  V850 Options.       (line   45)
+* mzero-extend:                          MMIX Options.       (line   27)
+* no-canonical-prefixes:                 Overall Options.    (line  338)
+* no-integrated-cpp:                     C Dialect Options.  (line  272)
+* no_dead_strip_inits_and_terms:         Darwin Options.     (line  199)
+* noall_load:                            Darwin Options.     (line  199)
+* nocpp:                                 MIPS Options.       (line  477)
+* nodefaultlibs:                         Link Options.       (line   62)
+* nofixprebinding:                       Darwin Options.     (line  199)
+* nofpu:                                 RX Options.         (line   17)
+* nolibdld:                              HPPA Options.       (line  188)
+* nomultidefs:                           Darwin Options.     (line  199)
+* non-static:                            VxWorks Options.    (line   16)
+* noprebind:                             Darwin Options.     (line  199)
+* noseglinkedit:                         Darwin Options.     (line  199)
+* nostartfiles:                          Link Options.       (line   57)
+* nostdinc:                              Preprocessor Options.
+                                                             (line  385)
+* nostdinc++ <1>:                        Preprocessor Options.
+                                                             (line  390)
+* nostdinc++:                            C++ Dialect Options.
+                                                             (line  322)
+* nostdlib:                              Link Options.       (line   73)
+* o:                                     Preprocessor Options.
+                                                             (line   75)
+* O:                                     Optimize Options.   (line   39)
+* o:                                     Overall Options.    (line  192)
+* O0:                                    Optimize Options.   (line  126)
+* O1:                                    Optimize Options.   (line   39)
+* O2:                                    Optimize Options.   (line   82)
+* O3:                                    Optimize Options.   (line  119)
+* Ofast:                                 Optimize Options.   (line  140)
+* Os:                                    Optimize Options.   (line  130)
+* P:                                     Preprocessor Options.
+                                                             (line  603)
+* p:                                     Debugging Options.  (line  291)
+* pagezero_size:                         Darwin Options.     (line  199)
+* param:                                 Optimize Options.   (line 2153)
+* pass-exit-codes:                       Overall Options.    (line  150)
+* pedantic <1>:                          Warnings and Errors.
+                                                             (line   25)
+* pedantic <2>:                          Alternate Keywords. (line   30)
+* pedantic <3>:                          C Extensions.       (line    6)
+* pedantic <4>:                          Preprocessor Options.
+                                                             (line  163)
+* pedantic <5>:                          Warning Options.    (line   72)
+* pedantic:                              Standards.          (line   16)
+* pedantic-errors <1>:                   Warnings and Errors.
+                                                             (line   25)
+* pedantic-errors <2>:                   Non-bugs.           (line  216)
+* pedantic-errors <3>:                   Preprocessor Options.
+                                                             (line  168)
+* pedantic-errors <4>:                   Warning Options.    (line  114)
+* pedantic-errors:                       Standards.          (line   16)
+* pg:                                    Debugging Options.  (line  297)
+* pie:                                   Link Options.       (line   95)
+* pipe:                                  Overall Options.    (line  215)
+* prebind:                               Darwin Options.     (line  199)
+* prebind_all_twolevel_modules:          Darwin Options.     (line  199)
+* print-file-name:                       Debugging Options.  (line 1067)
+* print-libgcc-file-name:                Debugging Options.  (line 1101)
+* print-multi-directory:                 Debugging Options.  (line 1073)
+* print-multi-lib:                       Debugging Options.  (line 1078)
+* print-multi-os-directory:              Debugging Options.  (line 1085)
+* print-multiarch:                       Debugging Options.  (line 1094)
+* print-objc-runtime-info:               Objective-C and Objective-C++ Dialect Options.
+                                                             (line  203)
+* print-prog-name:                       Debugging Options.  (line 1098)
+* print-search-dirs:                     Debugging Options.  (line 1109)
+* print-sysroot:                         Debugging Options.  (line 1122)
+* print-sysroot-headers-suffix:          Debugging Options.  (line 1129)
+* private_bundle:                        Darwin Options.     (line  199)
+* pthread <1>:                           Solaris 2 Options.  (line   37)
+* pthread:                               RS/6000 and PowerPC Options.
+                                                             (line  757)
+* pthreads:                              Solaris 2 Options.  (line   31)
+* Q:                                     Debugging Options.  (line  303)
+* Qn:                                    System V Options.   (line   18)
+* Qy:                                    System V Options.   (line   14)
+* rdynamic:                              Link Options.       (line  101)
+* read_only_relocs:                      Darwin Options.     (line  199)
+* remap:                                 Preprocessor Options.
+                                                             (line  651)
+* s:                                     Link Options.       (line  108)
+* S <1>:                                 Link Options.       (line   20)
+* S:                                     Overall Options.    (line  175)
+* save-temps:                            Debugging Options.  (line  975)
+* save-temps=obj:                        Debugging Options.  (line 1001)
+* sectalign:                             Darwin Options.     (line  199)
+* sectcreate:                            Darwin Options.     (line  199)
+* sectobjectsymbols:                     Darwin Options.     (line  199)
+* sectorder:                             Darwin Options.     (line  199)
+* seg1addr:                              Darwin Options.     (line  199)
+* seg_addr_table:                        Darwin Options.     (line  199)
+* seg_addr_table_filename:               Darwin Options.     (line  199)
+* segaddr:                               Darwin Options.     (line  199)
+* seglinkedit:                           Darwin Options.     (line  199)
+* segprot:                               Darwin Options.     (line  199)
+* segs_read_only_addr:                   Darwin Options.     (line  199)
+* segs_read_write_addr:                  Darwin Options.     (line  199)
+* shared:                                Link Options.       (line  117)
+* shared-libgcc:                         Link Options.       (line  125)
+* sim:                                   CRIS Options.       (line   95)
+* sim2:                                  CRIS Options.       (line  101)
+* single_module:                         Darwin Options.     (line  199)
+* specs:                                 Directory Options.  (line   89)
+* static <1>:                            HPPA Options.       (line  192)
+* static <2>:                            Darwin Options.     (line  199)
+* static:                                Link Options.       (line  112)
+* static-libgcc:                         Link Options.       (line  125)
+* std <1>:                               Non-bugs.           (line  107)
+* std <2>:                               Other Builtins.     (line   22)
+* std <3>:                               C Dialect Options.  (line   47)
+* std:                                   Standards.          (line   16)
+* std=:                                  Preprocessor Options.
+                                                             (line  326)
+* sub_library:                           Darwin Options.     (line  199)
+* sub_umbrella:                          Darwin Options.     (line  199)
+* symbolic:                              Link Options.       (line  172)
+* sysroot:                               Directory Options.  (line   97)
+* T:                                     Link Options.       (line  178)
+* target-help <1>:                       Preprocessor Options.
+                                                             (line  656)
+* target-help:                           Overall Options.    (line  230)
+* threads <1>:                           Solaris 2 Options.  (line   25)
+* threads:                               HPPA Options.       (line  205)
+* time:                                  Debugging Options.  (line 1016)
+* tno-android-cc:                        GNU/Linux Options.  (line   31)
+* tno-android-ld:                        GNU/Linux Options.  (line   35)
+* traditional <1>:                       Incompatibilities.  (line    6)
+* traditional:                           C Dialect Options.  (line  284)
+* traditional-cpp <1>:                   Preprocessor Options.
+                                                             (line  634)
+* traditional-cpp:                       C Dialect Options.  (line  284)
+* trigraphs <1>:                         Preprocessor Options.
+                                                             (line  638)
+* trigraphs:                             C Dialect Options.  (line  268)
+* twolevel_namespace:                    Darwin Options.     (line  199)
+* u:                                     Link Options.       (line  211)
+* U:                                     Preprocessor Options.
+                                                             (line   57)
+* umbrella:                              Darwin Options.     (line  199)
+* undef:                                 Preprocessor Options.
+                                                             (line   61)
+* undefined:                             Darwin Options.     (line  199)
+* unexported_symbols_list:               Darwin Options.     (line  199)
+* v <1>:                                 Preprocessor Options.
+                                                             (line  660)
+* v:                                     Overall Options.    (line  203)
+* version <1>:                           Preprocessor Options.
+                                                             (line  673)
+* version:                               Overall Options.    (line  342)
+* W:                                     Incompatibilities.  (line   64)
+* w:                                     Preprocessor Options.
+                                                             (line  159)
+* W:                                     Warning Options.    (line  166)
+* w:                                     Warning Options.    (line   25)
+* Wa:                                    Assembler Options.  (line    9)
+* Wabi:                                  C++ Dialect Options.
+                                                             (line  336)
+* Waddress:                              Warning Options.    (line 1087)
+* Waggregate-return:                     Warning Options.    (line 1105)
+* Wall <1>:                              Standard Libraries. (line    6)
+* Wall <2>:                              Preprocessor Options.
+                                                             (line   81)
+* Wall:                                  Warning Options.    (line  118)
+* Warray-bounds:                         Warning Options.    (line  786)
+* Wassign-intercept:                     Objective-C and Objective-C++ Dialect Options.
+                                                             (line  157)
+* Wattributes:                           Warning Options.    (line 1110)
+* Wbad-function-cast:                    Warning Options.    (line  977)
+* Wbuiltin-macro-redefined:              Warning Options.    (line 1116)
+* Wcast-align:                           Warning Options.    (line 1008)
+* Wcast-qual:                            Warning Options.    (line  992)
+* Wchar-subscripts:                      Warning Options.    (line  205)
+* Wclobbered:                            Warning Options.    (line 1028)
+* Wcomment <1>:                          Preprocessor Options.
+                                                             (line   89)
+* Wcomment:                              Warning Options.    (line  210)
+* Wcomments:                             Preprocessor Options.
+                                                             (line   89)
+* Wconversion:                           Warning Options.    (line 1032)
+* Wconversion-null:                      Warning Options.    (line 1050)
+* Wcoverage-mismatch:                    Language Independent Options.
+                                                             (line   42)
+* Wctor-dtor-privacy:                    C++ Dialect Options.
+                                                             (line  446)
+* Wdeclaration-after-statement:          Warning Options.    (line  918)
+* Wdeprecated:                           Warning Options.    (line 1245)
+* Wdeprecated-declarations:              Warning Options.    (line 1249)
+* Wdisabled-optimization:                Warning Options.    (line 1376)
+* Wdiv-by-zero:                          Warning Options.    (line  791)
+* Wdouble-promotion:                     Warning Options.    (line  220)
+* weak_reference_mismatches:             Darwin Options.     (line  199)
+* Weffc++:                               C++ Dialect Options.
+                                                             (line  479)
+* Wempty-body:                           Warning Options.    (line 1054)
+* Wendif-labels <1>:                     Preprocessor Options.
+                                                             (line  136)
+* Wendif-labels:                         Warning Options.    (line  928)
+* Wenum-compare:                         Warning Options.    (line 1058)
+* Werror <1>:                            Preprocessor Options.
+                                                             (line  149)
+* Werror:                                Warning Options.    (line   28)
+* Werror=:                               Warning Options.    (line   31)
+* Wextra:                                Warning Options.    (line  166)
+* Wfatal-errors:                         Warning Options.    (line   48)
+* Wfloat-equal:                          Warning Options.    (line  818)
+* Wformat <1>:                           Function Attributes.
+                                                             (line  420)
+* Wformat:                               Warning Options.    (line  238)
+* Wformat-contains-nul:                  Warning Options.    (line  277)
+* Wformat-extra-args:                    Warning Options.    (line  281)
+* Wformat-nonliteral <1>:                Function Attributes.
+                                                             (line  485)
+* Wformat-nonliteral:                    Warning Options.    (line  299)
+* Wformat-security:                      Warning Options.    (line  304)
+* Wformat-y2k:                           Warning Options.    (line  273)
+* Wformat-zero-length:                   Warning Options.    (line  295)
+* Wformat=2:                             Warning Options.    (line  315)
+* Wframe-larger-than:                    Warning Options.    (line  942)
+* whatsloaded:                           Darwin Options.     (line  199)
+* whyload:                               Darwin Options.     (line  199)
+* Wignored-qualifiers:                   Warning Options.    (line  354)
+* Wimplicit:                             Warning Options.    (line  350)
+* Wimplicit-function-declaration:        Warning Options.    (line  344)
+* Wimplicit-int:                         Warning Options.    (line  340)
+* Winit-self:                            Warning Options.    (line  327)
+* Winline <1>:                           Inline.             (line   63)
+* Winline:                               Warning Options.    (line 1315)
+* Wint-to-pointer-cast:                  Warning Options.    (line 1342)
+* Winvalid-offsetof:                     Warning Options.    (line 1328)
+* Winvalid-pch:                          Warning Options.    (line 1351)
+* Wjump-misses-init:                     Warning Options.    (line 1063)
+* Wl:                                    Link Options.       (line  203)
+* Wlarger-than-LEN:                      Warning Options.    (line  939)
+* Wlarger-than=LEN:                      Warning Options.    (line  939)
+* Wlogical-op:                           Warning Options.    (line 1100)
+* Wlong-long:                            Warning Options.    (line 1355)
+* Wmain:                                 Warning Options.    (line  365)
+* Wmissing-braces:                       Warning Options.    (line  372)
+* Wmissing-declarations:                 Warning Options.    (line 1151)
+* Wmissing-field-initializers:           Warning Options.    (line 1159)
+* Wmissing-format-attribute:             Warning Options.    (line 1177)
+* Wmissing-include-dirs:                 Warning Options.    (line  382)
+* Wmissing-parameter-type:               Warning Options.    (line 1137)
+* Wmissing-prototypes:                   Warning Options.    (line 1145)
+* Wmultichar:                            Warning Options.    (line 1196)
+* Wnested-externs:                       Warning Options.    (line 1312)
+* Wno-abi:                               C++ Dialect Options.
+                                                             (line  336)
+* Wno-address:                           Warning Options.    (line 1087)
+* Wno-aggregate-return:                  Warning Options.    (line 1105)
+* Wno-all:                               Warning Options.    (line  118)
+* Wno-array-bounds:                      Warning Options.    (line  786)
+* Wno-assign-intercept:                  Objective-C and Objective-C++ Dialect Options.
+                                                             (line  157)
+* Wno-attributes:                        Warning Options.    (line 1110)
+* Wno-bad-function-cast:                 Warning Options.    (line  977)
+* Wno-builtin-macro-redefined:           Warning Options.    (line 1116)
+* Wno-cast-align:                        Warning Options.    (line 1008)
+* Wno-cast-qual:                         Warning Options.    (line  992)
+* Wno-char-subscripts:                   Warning Options.    (line  205)
+* Wno-clobbered:                         Warning Options.    (line 1028)
+* Wno-comment:                           Warning Options.    (line  210)
+* Wno-conversion:                        Warning Options.    (line 1032)
+* Wno-conversion-null:                   Warning Options.    (line 1050)
+* Wno-ctor-dtor-privacy:                 C++ Dialect Options.
+                                                             (line  446)
+* Wno-declaration-after-statement:       Warning Options.    (line  918)
+* Wno-deprecated:                        Warning Options.    (line 1245)
+* Wno-deprecated-declarations:           Warning Options.    (line 1249)
+* Wno-disabled-optimization:             Warning Options.    (line 1376)
+* Wno-div-by-zero:                       Warning Options.    (line  791)
+* Wno-double-promotion:                  Warning Options.    (line  220)
+* Wno-effc++:                            C++ Dialect Options.
+                                                             (line  479)
+* Wno-empty-body:                        Warning Options.    (line 1054)
+* Wno-endif-labels:                      Warning Options.    (line  928)
+* Wno-enum-compare:                      Warning Options.    (line 1058)
+* Wno-error:                             Warning Options.    (line   28)
+* Wno-error=:                            Warning Options.    (line   31)
+* Wno-extra:                             Warning Options.    (line  166)
+* Wno-fatal-errors:                      Warning Options.    (line   48)
+* Wno-float-equal:                       Warning Options.    (line  818)
+* Wno-format:                            Warning Options.    (line  238)
+* Wno-format-contains-nul:               Warning Options.    (line  277)
+* Wno-format-extra-args:                 Warning Options.    (line  281)
+* Wno-format-nonliteral:                 Warning Options.    (line  299)
+* Wno-format-security:                   Warning Options.    (line  304)
+* Wno-format-y2k:                        Warning Options.    (line  273)
+* Wno-format-zero-length:                Warning Options.    (line  295)
+* Wno-format=2:                          Warning Options.    (line  315)
+* Wno-ignored-qualifiers:                Warning Options.    (line  354)
+* Wno-implicit:                          Warning Options.    (line  350)
+* Wno-implicit-function-declaration:     Warning Options.    (line  344)
+* Wno-implicit-int:                      Warning Options.    (line  340)
+* Wno-init-self:                         Warning Options.    (line  327)
+* Wno-inline:                            Warning Options.    (line 1315)
+* Wno-int-to-pointer-cast:               Warning Options.    (line 1342)
+* Wno-invalid-offsetof:                  Warning Options.    (line 1328)
+* Wno-invalid-pch:                       Warning Options.    (line 1351)
+* Wno-jump-misses-init:                  Warning Options.    (line 1063)
+* Wno-logical-op:                        Warning Options.    (line 1100)
+* Wno-long-long:                         Warning Options.    (line 1355)
+* Wno-main:                              Warning Options.    (line  365)
+* Wno-missing-braces:                    Warning Options.    (line  372)
+* Wno-missing-declarations:              Warning Options.    (line 1151)
+* Wno-missing-field-initializers:        Warning Options.    (line 1159)
+* Wno-missing-format-attribute:          Warning Options.    (line 1177)
+* Wno-missing-include-dirs:              Warning Options.    (line  382)
+* Wno-missing-parameter-type:            Warning Options.    (line 1137)
+* Wno-missing-prototypes:                Warning Options.    (line 1145)
+* Wno-mudflap:                           Warning Options.    (line 1396)
+* Wno-multichar:                         Warning Options.    (line 1196)
+* Wno-nested-externs:                    Warning Options.    (line 1312)
+* Wno-noexcept:                          C++ Dialect Options.
+                                                             (line  451)
+* Wno-non-template-friend:               C++ Dialect Options.
+                                                             (line  516)
+* Wno-non-virtual-dtor:                  C++ Dialect Options.
+                                                             (line  457)
+* Wno-nonnull:                           Warning Options.    (line  320)
+* Wno-old-style-cast:                    C++ Dialect Options.
+                                                             (line  532)
+* Wno-old-style-declaration:             Warning Options.    (line 1127)
+* Wno-old-style-definition:              Warning Options.    (line 1133)
+* Wno-overflow:                          Warning Options.    (line 1255)
+* Wno-overlength-strings:                Warning Options.    (line 1400)
+* Wno-overloaded-virtual:                C++ Dialect Options.
+                                                             (line  538)
+* Wno-override-init:                     Warning Options.    (line 1258)
+* Wno-packed:                            Warning Options.    (line 1266)
+* Wno-packed-bitfield-compat:            Warning Options.    (line 1283)
+* Wno-padded:                            Warning Options.    (line 1300)
+* Wno-parentheses:                       Warning Options.    (line  385)
+* Wno-pedantic-ms-format:                Warning Options.    (line  957)
+* Wno-pmf-conversions <1>:               Bound member functions.
+                                                             (line   35)
+* Wno-pmf-conversions:                   C++ Dialect Options.
+                                                             (line  557)
+* Wno-pointer-arith:                     Warning Options.    (line  963)
+* Wno-pointer-sign:                      Warning Options.    (line 1385)
+* Wno-pointer-to-int-cast:               Warning Options.    (line 1347)
+* Wno-pragmas:                           Warning Options.    (line  671)
+* Wno-protocol:                          Objective-C and Objective-C++ Dialect Options.
+                                                             (line  161)
+* Wno-redundant-decls:                   Warning Options.    (line 1307)
+* Wno-reorder:                           C++ Dialect Options.
+                                                             (line  463)
+* Wno-return-type:                       Warning Options.    (line  481)
+* Wno-selector:                          Objective-C and Objective-C++ Dialect Options.
+                                                             (line  171)
+* Wno-sequence-point:                    Warning Options.    (line  435)
+* Wno-shadow:                            Warning Options.    (line  932)
+* Wno-sign-compare:                      Warning Options.    (line 1074)
+* Wno-sign-conversion:                   Warning Options.    (line 1081)
+* Wno-sign-promo:                        C++ Dialect Options.
+                                                             (line  561)
+* Wno-stack-protector:                   Warning Options.    (line 1391)
+* Wno-strict-aliasing:                   Warning Options.    (line  676)
+* Wno-strict-aliasing=n:                 Warning Options.    (line  684)
+* Wno-strict-null-sentinel:              C++ Dialect Options.
+                                                             (line  509)
+* Wno-strict-overflow:                   Warning Options.    (line  717)
+* Wno-strict-prototypes:                 Warning Options.    (line 1121)
+* Wno-strict-selector-match:             Objective-C and Objective-C++ Dialect Options.
+                                                             (line  183)
+* Wno-suggest-attribute=:                Warning Options.    (line  768)
+* Wno-suggest-attribute=const:           Warning Options.    (line  774)
+* Wno-suggest-attribute=noreturn:        Warning Options.    (line  774)
+* Wno-suggest-attribute=pure:            Warning Options.    (line  774)
+* Wno-switch:                            Warning Options.    (line  496)
+* Wno-switch-default:                    Warning Options.    (line  504)
+* Wno-switch-enum:                       Warning Options.    (line  507)
+* Wno-sync-nand:                         Warning Options.    (line  516)
+* Wno-system-headers:                    Warning Options.    (line  796)
+* Wno-traditional:                       Warning Options.    (line  833)
+* Wno-traditional-conversion:            Warning Options.    (line  910)
+* Wno-trampolines:                       Warning Options.    (line  807)
+* Wno-trigraphs:                         Warning Options.    (line  521)
+* Wno-type-limits:                       Warning Options.    (line  970)
+* Wno-undeclared-selector:               Objective-C and Objective-C++ Dialect Options.
+                                                             (line  191)
+* Wno-undef:                             Warning Options.    (line  925)
+* Wno-uninitialized:                     Warning Options.    (line  594)
+* Wno-unknown-pragmas:                   Warning Options.    (line  664)
+* Wno-unsafe-loop-optimizations:         Warning Options.    (line  951)
+* Wno-unused:                            Warning Options.    (line  587)
+* Wno-unused-but-set-parameter:          Warning Options.    (line  526)
+* Wno-unused-but-set-variable:           Warning Options.    (line  535)
+* Wno-unused-function:                   Warning Options.    (line  545)
+* Wno-unused-label:                      Warning Options.    (line  550)
+* Wno-unused-parameter:                  Warning Options.    (line  557)
+* Wno-unused-result:                     Warning Options.    (line  564)
+* Wno-unused-value:                      Warning Options.    (line  577)
+* Wno-unused-variable:                   Warning Options.    (line  569)
+* Wno-variadic-macros:                   Warning Options.    (line 1360)
+* Wno-vla:                               Warning Options.    (line 1366)
+* Wno-volatile-register-var:             Warning Options.    (line 1370)
+* Wno-write-strings:                     Warning Options.    (line 1014)
+* Wnoexcept:                             C++ Dialect Options.
+                                                             (line  451)
+* Wnon-template-friend:                  C++ Dialect Options.
+                                                             (line  516)
+* Wnon-virtual-dtor:                     C++ Dialect Options.
+                                                             (line  457)
+* Wnonnull:                              Warning Options.    (line  320)
+* Wnormalized=:                          Warning Options.    (line 1202)
+* Wold-style-cast:                       C++ Dialect Options.
+                                                             (line  532)
+* Wold-style-declaration:                Warning Options.    (line 1127)
+* Wold-style-definition:                 Warning Options.    (line 1133)
+* Woverflow:                             Warning Options.    (line 1255)
+* Woverlength-strings:                   Warning Options.    (line 1400)
+* Woverloaded-virtual:                   C++ Dialect Options.
+                                                             (line  538)
+* Woverride-init:                        Warning Options.    (line 1258)
+* Wp:                                    Preprocessor Options.
+                                                             (line   14)
+* Wpacked:                               Warning Options.    (line 1266)
+* Wpacked-bitfield-compat:               Warning Options.    (line 1283)
+* Wpadded:                               Warning Options.    (line 1300)
+* Wparentheses:                          Warning Options.    (line  385)
+* Wpedantic-ms-format:                   Warning Options.    (line  957)
+* Wpmf-conversions:                      C++ Dialect Options.
+                                                             (line  557)
+* Wpointer-arith <1>:                    Pointer Arith.      (line   13)
+* Wpointer-arith:                        Warning Options.    (line  963)
+* Wpointer-sign:                         Warning Options.    (line 1385)
+* Wpointer-to-int-cast:                  Warning Options.    (line 1347)
+* Wpragmas:                              Warning Options.    (line  671)
+* Wprotocol:                             Objective-C and Objective-C++ Dialect Options.
+                                                             (line  161)
+* wrapper:                               Overall Options.    (line  345)
+* Wredundant-decls:                      Warning Options.    (line 1307)
+* Wreorder:                              C++ Dialect Options.
+                                                             (line  463)
+* Wreturn-type:                          Warning Options.    (line  481)
+* Wselector:                             Objective-C and Objective-C++ Dialect Options.
+                                                             (line  171)
+* Wsequence-point:                       Warning Options.    (line  435)
+* Wshadow:                               Warning Options.    (line  932)
+* Wsign-compare:                         Warning Options.    (line 1074)
+* Wsign-conversion:                      Warning Options.    (line 1081)
+* Wsign-promo:                           C++ Dialect Options.
+                                                             (line  561)
+* Wstack-protector:                      Warning Options.    (line 1391)
+* Wstrict-aliasing:                      Warning Options.    (line  676)
+* Wstrict-aliasing=n:                    Warning Options.    (line  684)
+* Wstrict-null-sentinel:                 C++ Dialect Options.
+                                                             (line  509)
+* Wstrict-overflow:                      Warning Options.    (line  717)
+* Wstrict-prototypes:                    Warning Options.    (line 1121)
+* Wstrict-selector-match:                Objective-C and Objective-C++ Dialect Options.
+                                                             (line  183)
+* Wsuggest-attribute=:                   Warning Options.    (line  768)
+* Wsuggest-attribute=const:              Warning Options.    (line  774)
+* Wsuggest-attribute=noreturn:           Warning Options.    (line  774)
+* Wsuggest-attribute=pure:               Warning Options.    (line  774)
+* Wswitch:                               Warning Options.    (line  496)
+* Wswitch-default:                       Warning Options.    (line  504)
+* Wswitch-enum:                          Warning Options.    (line  507)
+* Wsync-nand:                            Warning Options.    (line  516)
+* Wsystem-headers <1>:                   Preprocessor Options.
+                                                             (line  153)
+* Wsystem-headers:                       Warning Options.    (line  796)
+* Wtraditional <1>:                      Preprocessor Options.
+                                                             (line  106)
+* Wtraditional:                          Warning Options.    (line  833)
+* Wtraditional-conversion:               Warning Options.    (line  910)
+* Wtrampolines:                          Warning Options.    (line  807)
+* Wtrigraphs <1>:                        Preprocessor Options.
+                                                             (line   94)
+* Wtrigraphs:                            Warning Options.    (line  521)
+* Wtype-limits:                          Warning Options.    (line  970)
+* Wundeclared-selector:                  Objective-C and Objective-C++ Dialect Options.
+                                                             (line  191)
+* Wundef <1>:                            Preprocessor Options.
+                                                             (line  112)
+* Wundef:                                Warning Options.    (line  925)
+* Wuninitialized:                        Warning Options.    (line  594)
+* Wunknown-pragmas:                      Warning Options.    (line  664)
+* Wunsafe-loop-optimizations:            Warning Options.    (line  951)
+* Wunsuffixed-float-constants:           Warning Options.    (line 1415)
+* Wunused:                               Warning Options.    (line  587)
+* Wunused-but-set-parameter:             Warning Options.    (line  526)
+* Wunused-but-set-variable:              Warning Options.    (line  535)
+* Wunused-function:                      Warning Options.    (line  545)
+* Wunused-label:                         Warning Options.    (line  550)
+* Wunused-macros:                        Preprocessor Options.
+                                                             (line  117)
+* Wunused-parameter:                     Warning Options.    (line  557)
+* Wunused-result:                        Warning Options.    (line  564)
+* Wunused-value:                         Warning Options.    (line  577)
+* Wunused-variable:                      Warning Options.    (line  569)
+* Wvariadic-macros:                      Warning Options.    (line 1360)
+* Wvla:                                  Warning Options.    (line 1366)
+* Wvolatile-register-var:                Warning Options.    (line 1370)
+* Wwrite-strings:                        Warning Options.    (line 1014)
+* x <1>:                                 Preprocessor Options.
+                                                             (line  310)
+* x:                                     Overall Options.    (line  126)
+* Xassembler:                            Assembler Options.  (line   13)
+* Xbind-lazy:                            VxWorks Options.    (line   26)
+* Xbind-now:                             VxWorks Options.    (line   30)
+* Xlinker:                               Link Options.       (line  184)
+* Xpreprocessor:                         Preprocessor Options.
+                                                             (line   25)
+* Ym:                                    System V Options.   (line   26)
+* YP:                                    System V Options.   (line   22)
+
+
+File: gcc.info,  Node: Keyword Index,  Prev: Option Index,  Up: Top
+
+Keyword Index
+*************
+
+
+* Menu:
+
+* ! in constraint:                       Multi-Alternative.  (line   33)
+* # in constraint:                       Modifiers.          (line   57)
+* #pragma:                               Pragmas.            (line    6)
+* #pragma implementation:                C++ Interface.      (line   39)
+* #pragma implementation, implied:       C++ Interface.      (line   46)
+* #pragma interface:                     C++ Interface.      (line   20)
+* #pragma, reason for not using:         Function Attributes.
+                                                             (line 1763)
+* $:                                     Dollar Signs.       (line    6)
+* % in constraint:                       Modifiers.          (line   45)
+* %include:                              Spec Files.         (line   27)
+* %include_noerr:                        Spec Files.         (line   31)
+* %rename:                               Spec Files.         (line   35)
+* & in constraint:                       Modifiers.          (line   25)
+* ':                                     Incompatibilities.  (line  116)
+* * in constraint:                       Modifiers.          (line   62)
+* + in constraint:                       Modifiers.          (line   12)
+* -lgcc, use with -nodefaultlibs:        Link Options.       (line   82)
+* -lgcc, use with -nostdlib:             Link Options.       (line   82)
+* -nodefaultlibs and unresolved references: Link Options.    (line   82)
+* -nostdlib and unresolved references:   Link Options.       (line   82)
+* .sdata/.sdata2 references (PowerPC):   RS/6000 and PowerPC Options.
+                                                             (line  703)
+* //:                                    C++ Comments.       (line    6)
+* 0 in constraint:                       Simple Constraints. (line  127)
+* < in constraint:                       Simple Constraints. (line   48)
+* = in constraint:                       Modifiers.          (line    8)
+* > in constraint:                       Simple Constraints. (line   61)
+* ? in constraint:                       Multi-Alternative.  (line   27)
+* ?: extensions:                         Conditionals.       (line    6)
+* ?: side effect:                        Conditionals.       (line   20)
+* _ in variables in macros:              Typeof.             (line   46)
+* __builtin___clear_cache:               Other Builtins.     (line  329)
+* __builtin___fprintf_chk:               Object Size Checking.
+                                                             (line    6)
+* __builtin___memcpy_chk:                Object Size Checking.
+                                                             (line    6)
+* __builtin___memmove_chk:               Object Size Checking.
+                                                             (line    6)
+* __builtin___mempcpy_chk:               Object Size Checking.
+                                                             (line    6)
+* __builtin___memset_chk:                Object Size Checking.
+                                                             (line    6)
+* __builtin___printf_chk:                Object Size Checking.
+                                                             (line    6)
+* __builtin___snprintf_chk:              Object Size Checking.
+                                                             (line    6)
+* __builtin___sprintf_chk:               Object Size Checking.
+                                                             (line    6)
+* __builtin___stpcpy_chk:                Object Size Checking.
+                                                             (line    6)
+* __builtin___strcat_chk:                Object Size Checking.
+                                                             (line    6)
+* __builtin___strcpy_chk:                Object Size Checking.
+                                                             (line    6)
+* __builtin___strncat_chk:               Object Size Checking.
+                                                             (line    6)
+* __builtin___strncpy_chk:               Object Size Checking.
+                                                             (line    6)
+* __builtin___vfprintf_chk:              Object Size Checking.
+                                                             (line    6)
+* __builtin___vprintf_chk:               Object Size Checking.
+                                                             (line    6)
+* __builtin___vsnprintf_chk:             Object Size Checking.
+                                                             (line    6)
+* __builtin___vsprintf_chk:              Object Size Checking.
+                                                             (line    6)
+* __builtin_apply:                       Constructing Calls. (line   31)
+* __builtin_apply_args:                  Constructing Calls. (line   20)
+* __builtin_bswap32:                     Other Builtins.     (line  548)
+* __builtin_bswap64:                     Other Builtins.     (line  553)
+* __builtin_choose_expr:                 Other Builtins.     (line  157)
+* __builtin_clz:                         Other Builtins.     (line  481)
+* __builtin_clzl:                        Other Builtins.     (line  499)
+* __builtin_clzll:                       Other Builtins.     (line  519)
+* __builtin_constant_p:                  Other Builtins.     (line  197)
+* __builtin_ctz:                         Other Builtins.     (line  485)
+* __builtin_ctzl:                        Other Builtins.     (line  503)
+* __builtin_ctzll:                       Other Builtins.     (line  523)
+* __builtin_expect:                      Other Builtins.     (line  247)
+* __builtin_extract_return_address:      Return Address.     (line   37)
+* __builtin_ffs:                         Other Builtins.     (line  477)
+* __builtin_ffsl:                        Other Builtins.     (line  495)
+* __builtin_ffsll:                       Other Builtins.     (line  515)
+* __builtin_fpclassify:                  Other Builtins.     (line    6)
+* __builtin_frame_address:               Return Address.     (line   51)
+* __builtin_frob_return_address:         Return Address.     (line   46)
+* __builtin_huge_val:                    Other Builtins.     (line  380)
+* __builtin_huge_valf:                   Other Builtins.     (line  385)
+* __builtin_huge_vall:                   Other Builtins.     (line  388)
+* __builtin_huge_valq:                   X86 Built-in Functions.
+                                                             (line   51)
+* __builtin_inf:                         Other Builtins.     (line  403)
+* __builtin_infd128:                     Other Builtins.     (line  413)
+* __builtin_infd32:                      Other Builtins.     (line  407)
+* __builtin_infd64:                      Other Builtins.     (line  410)
+* __builtin_inff:                        Other Builtins.     (line  417)
+* __builtin_infl:                        Other Builtins.     (line  422)
+* __builtin_infq:                        X86 Built-in Functions.
+                                                             (line   47)
+* __builtin_isfinite:                    Other Builtins.     (line    6)
+* __builtin_isgreater:                   Other Builtins.     (line    6)
+* __builtin_isgreaterequal:              Other Builtins.     (line    6)
+* __builtin_isinf_sign:                  Other Builtins.     (line    6)
+* __builtin_isless:                      Other Builtins.     (line    6)
+* __builtin_islessequal:                 Other Builtins.     (line    6)
+* __builtin_islessgreater:               Other Builtins.     (line    6)
+* __builtin_isnormal:                    Other Builtins.     (line    6)
+* __builtin_isunordered:                 Other Builtins.     (line    6)
+* __builtin_nan:                         Other Builtins.     (line  433)
+* __builtin_nand128:                     Other Builtins.     (line  455)
+* __builtin_nand32:                      Other Builtins.     (line  449)
+* __builtin_nand64:                      Other Builtins.     (line  452)
+* __builtin_nanf:                        Other Builtins.     (line  459)
+* __builtin_nanl:                        Other Builtins.     (line  462)
+* __builtin_nans:                        Other Builtins.     (line  466)
+* __builtin_nansf:                       Other Builtins.     (line  470)
+* __builtin_nansl:                       Other Builtins.     (line  473)
+* __builtin_object_size:                 Object Size Checking.
+                                                             (line    6)
+* __builtin_offsetof:                    Offsetof.           (line    6)
+* __builtin_parity:                      Other Builtins.     (line  492)
+* __builtin_parityl:                     Other Builtins.     (line  511)
+* __builtin_parityll:                    Other Builtins.     (line  531)
+* __builtin_popcount:                    Other Builtins.     (line  489)
+* __builtin_popcountl:                   Other Builtins.     (line  507)
+* __builtin_popcountll:                  Other Builtins.     (line  527)
+* __builtin_powi:                        Other Builtins.     (line    6)
+* __builtin_powif:                       Other Builtins.     (line    6)
+* __builtin_powil:                       Other Builtins.     (line    6)
+* __builtin_prefetch:                    Other Builtins.     (line  341)
+* __builtin_return:                      Constructing Calls. (line   48)
+* __builtin_return_address:              Return Address.     (line   11)
+* __builtin_rx_brk:                      RX Built-in Functions.
+                                                             (line   11)
+* __builtin_rx_clrpsw:                   RX Built-in Functions.
+                                                             (line   14)
+* __builtin_rx_int:                      RX Built-in Functions.
+                                                             (line   18)
+* __builtin_rx_machi:                    RX Built-in Functions.
+                                                             (line   22)
+* __builtin_rx_maclo:                    RX Built-in Functions.
+                                                             (line   27)
+* __builtin_rx_mulhi:                    RX Built-in Functions.
+                                                             (line   32)
+* __builtin_rx_mullo:                    RX Built-in Functions.
+                                                             (line   37)
+* __builtin_rx_mvfachi:                  RX Built-in Functions.
+                                                             (line   42)
+* __builtin_rx_mvfacmi:                  RX Built-in Functions.
+                                                             (line   46)
+* __builtin_rx_mvfc:                     RX Built-in Functions.
+                                                             (line   50)
+* __builtin_rx_mvtachi:                  RX Built-in Functions.
+                                                             (line   54)
+* __builtin_rx_mvtaclo:                  RX Built-in Functions.
+                                                             (line   58)
+* __builtin_rx_mvtc:                     RX Built-in Functions.
+                                                             (line   62)
+* __builtin_rx_mvtipl:                   RX Built-in Functions.
+                                                             (line   66)
+* __builtin_rx_racw:                     RX Built-in Functions.
+                                                             (line   70)
+* __builtin_rx_revw:                     RX Built-in Functions.
+                                                             (line   74)
+* __builtin_rx_rmpa:                     RX Built-in Functions.
+                                                             (line   79)
+* __builtin_rx_round:                    RX Built-in Functions.
+                                                             (line   83)
+* __builtin_rx_sat:                      RX Built-in Functions.
+                                                             (line   88)
+* __builtin_rx_setpsw:                   RX Built-in Functions.
+                                                             (line   92)
+* __builtin_rx_wait:                     RX Built-in Functions.
+                                                             (line   96)
+* __builtin_trap:                        Other Builtins.     (line  271)
+* __builtin_types_compatible_p:          Other Builtins.     (line  111)
+* __builtin_unreachable:                 Other Builtins.     (line  278)
+* __builtin_va_arg_pack:                 Constructing Calls. (line   53)
+* __builtin_va_arg_pack_len:             Constructing Calls. (line   76)
+* __complex__ keyword:                   Complex.            (line    6)
+* __declspec(dllexport):                 Function Attributes.
+                                                             (line  259)
+* __declspec(dllimport):                 Function Attributes.
+                                                             (line  294)
+* __extension__:                         Alternate Keywords. (line   30)
+* __float128 data type:                  Floating Types.     (line    6)
+* __float80 data type:                   Floating Types.     (line    6)
+* __fp16 data type:                      Half-Precision.     (line    6)
+* __func__ identifier:                   Function Names.     (line    6)
+* __FUNCTION__ identifier:               Function Names.     (line    6)
+* __imag__ keyword:                      Complex.            (line   27)
+* __int128 data types:                   __int128.           (line    6)
+* __PRETTY_FUNCTION__ identifier:        Function Names.     (line    6)
+* __real__ keyword:                      Complex.            (line   27)
+* __STDC_HOSTED__:                       Standards.          (line   13)
+* __sync_add_and_fetch:                  Atomic Builtins.    (line   61)
+* __sync_and_and_fetch:                  Atomic Builtins.    (line   61)
+* __sync_bool_compare_and_swap:          Atomic Builtins.    (line   73)
+* __sync_fetch_and_add:                  Atomic Builtins.    (line   45)
+* __sync_fetch_and_and:                  Atomic Builtins.    (line   45)
+* __sync_fetch_and_nand:                 Atomic Builtins.    (line   45)
+* __sync_fetch_and_or:                   Atomic Builtins.    (line   45)
+* __sync_fetch_and_sub:                  Atomic Builtins.    (line   45)
+* __sync_fetch_and_xor:                  Atomic Builtins.    (line   45)
+* __sync_lock_release:                   Atomic Builtins.    (line  103)
+* __sync_lock_test_and_set:              Atomic Builtins.    (line   85)
+* __sync_nand_and_fetch:                 Atomic Builtins.    (line   61)
+* __sync_or_and_fetch:                   Atomic Builtins.    (line   61)
+* __sync_sub_and_fetch:                  Atomic Builtins.    (line   61)
+* __sync_synchronize:                    Atomic Builtins.    (line   82)
+* __sync_val_compare_and_swap:           Atomic Builtins.    (line   73)
+* __sync_xor_and_fetch:                  Atomic Builtins.    (line   61)
+* __thread:                              Thread-Local.       (line    6)
+* _Accum data type:                      Fixed-Point.        (line    6)
+* _Complex keyword:                      Complex.            (line    6)
+* _Decimal128 data type:                 Decimal Float.      (line    6)
+* _Decimal32 data type:                  Decimal Float.      (line    6)
+* _Decimal64 data type:                  Decimal Float.      (line    6)
+* _exit:                                 Other Builtins.     (line    6)
+* _Exit:                                 Other Builtins.     (line    6)
+* _Fract data type:                      Fixed-Point.        (line    6)
+* _Sat data type:                        Fixed-Point.        (line    6)
+* ABI:                                   Compatibility.      (line    6)
+* abort:                                 Other Builtins.     (line    6)
+* abs:                                   Other Builtins.     (line    6)
+* accessing volatiles <1>:               C++ Volatiles.      (line    6)
+* accessing volatiles:                   Volatiles.          (line    6)
+* acos:                                  Other Builtins.     (line    6)
+* acosf:                                 Other Builtins.     (line    6)
+* acosh:                                 Other Builtins.     (line    6)
+* acoshf:                                Other Builtins.     (line    6)
+* acoshl:                                Other Builtins.     (line    6)
+* acosl:                                 Other Builtins.     (line    6)
+* Ada:                                   G++ and GCC.        (line    6)
+* additional floating types:             Floating Types.     (line    6)
+* address constraints:                   Simple Constraints. (line  154)
+* address of a label:                    Labels as Values.   (line    6)
+* address_operand:                       Simple Constraints. (line  158)
+* alias attribute:                       Function Attributes.
+                                                             (line   36)
+* aligned attribute <1>:                 Type Attributes.    (line   31)
+* aligned attribute <2>:                 Variable Attributes.
+                                                             (line   23)
+* aligned attribute:                     Function Attributes.
+                                                             (line   49)
+* alignment:                             Alignment.          (line    6)
+* alloc_size attribute:                  Function Attributes.
+                                                             (line   69)
+* alloca:                                Other Builtins.     (line    6)
+* alloca vs variable-length arrays:      Variable Length.    (line   26)
+* Allow nesting in an interrupt handler on the Blackfin processor.: Function Attributes.
+                                                             (line  888)
+* alternate keywords:                    Alternate Keywords. (line    6)
+* always_inline function attribute:      Function Attributes.
+                                                             (line   90)
+* AMD x86-64 Options:                    i386 and x86-64 Options.
+                                                             (line    6)
+* AMD1:                                  Standards.          (line   13)
+* ANSI C:                                Standards.          (line   13)
+* ANSI C standard:                       Standards.          (line   13)
+* ANSI C89:                              Standards.          (line   13)
+* ANSI support:                          C Dialect Options.  (line   10)
+* ANSI X3.159-1989:                      Standards.          (line   13)
+* apostrophes:                           Incompatibilities.  (line  116)
+* application binary interface:          Compatibility.      (line    6)
+* ARC Options:                           ARC Options.        (line    6)
+* ARM [Annotated C++ Reference Manual]:  Backwards Compatibility.
+                                                             (line    6)
+* ARM options:                           ARM Options.        (line    6)
+* arrays of length zero:                 Zero Length.        (line    6)
+* arrays of variable length:             Variable Length.    (line    6)
+* arrays, non-lvalue:                    Subscripting.       (line    6)
+* artificial function attribute:         Function Attributes.
+                                                             (line  133)
+* asin:                                  Other Builtins.     (line    6)
+* asinf:                                 Other Builtins.     (line    6)
+* asinh:                                 Other Builtins.     (line    6)
+* asinhf:                                Other Builtins.     (line    6)
+* asinhl:                                Other Builtins.     (line    6)
+* asinl:                                 Other Builtins.     (line    6)
+* asm constraints:                       Constraints.        (line    6)
+* asm expressions:                       Extended Asm.       (line    6)
+* assembler instructions:                Extended Asm.       (line    6)
+* assembler names for identifiers:       Asm Labels.         (line    6)
+* assembly code, invalid:                Bug Criteria.       (line   12)
+* atan:                                  Other Builtins.     (line    6)
+* atan2:                                 Other Builtins.     (line    6)
+* atan2f:                                Other Builtins.     (line    6)
+* atan2l:                                Other Builtins.     (line    6)
+* atanf:                                 Other Builtins.     (line    6)
+* atanh:                                 Other Builtins.     (line    6)
+* atanhf:                                Other Builtins.     (line    6)
+* atanhl:                                Other Builtins.     (line    6)
+* atanl:                                 Other Builtins.     (line    6)
+* attribute of types:                    Type Attributes.    (line    6)
+* attribute of variables:                Variable Attributes.
+                                                             (line    6)
+* attribute syntax:                      Attribute Syntax.   (line    6)
+* autoincrement/decrement addressing:    Simple Constraints. (line   30)
+* automatic inline for C++ member fns:   Inline.             (line   71)
+* AVR Options:                           AVR Options.        (line    6)
+* Backwards Compatibility:               Backwards Compatibility.
+                                                             (line    6)
+* base class members:                    Name lookup.        (line    6)
+* bcmp:                                  Other Builtins.     (line    6)
+* below100 attribute:                    Variable Attributes.
+                                                             (line  562)
+* binary compatibility:                  Compatibility.      (line    6)
+* Binary constants using the 0b prefix:  Binary constants.   (line    6)
+* Blackfin Options:                      Blackfin Options.   (line    6)
+* bound pointer to member function:      Bound member functions.
+                                                             (line    6)
+* bounds checking:                       Optimize Options.   (line  393)
+* bug criteria:                          Bug Criteria.       (line    6)
+* bugs:                                  Bugs.               (line    6)
+* bugs, known:                           Trouble.            (line    6)
+* built-in functions <1>:                Other Builtins.     (line    6)
+* built-in functions:                    C Dialect Options.  (line  184)
+* bzero:                                 Other Builtins.     (line    6)
+* C compilation options:                 Invoking GCC.       (line   17)
+* C intermediate output, nonexistent:    G++ and GCC.        (line   35)
+* C language extensions:                 C Extensions.       (line    6)
+* C language, traditional:               C Dialect Options.  (line  282)
+* C standard:                            Standards.          (line   13)
+* C standards:                           Standards.          (line   13)
+* c++:                                   Invoking G++.       (line   14)
+* C++:                                   G++ and GCC.        (line   30)
+* C++ comments:                          C++ Comments.       (line    6)
+* C++ compilation options:               Invoking GCC.       (line   23)
+* C++ interface and implementation headers: C++ Interface.   (line    6)
+* C++ language extensions:               C++ Extensions.     (line    6)
+* C++ member fns, automatically inline:  Inline.             (line   71)
+* C++ misunderstandings:                 C++ Misunderstandings.
+                                                             (line    6)
+* C++ options, command line:             C++ Dialect Options.
+                                                             (line    6)
+* C++ pragmas, effect on inlining:       C++ Interface.      (line   66)
+* C++ source file suffixes:              Invoking G++.       (line    6)
+* C++ static data, declaring and defining: Static Definitions.
+                                                             (line    6)
+* C1X:                                   Standards.          (line   13)
+* C89:                                   Standards.          (line   13)
+* C90:                                   Standards.          (line   13)
+* C94:                                   Standards.          (line   13)
+* C95:                                   Standards.          (line   13)
+* C99:                                   Standards.          (line   13)
+* C9X:                                   Standards.          (line   13)
+* C_INCLUDE_PATH:                        Environment Variables.
+                                                             (line  127)
+* cabs:                                  Other Builtins.     (line    6)
+* cabsf:                                 Other Builtins.     (line    6)
+* cabsl:                                 Other Builtins.     (line    6)
+* cacos:                                 Other Builtins.     (line    6)
+* cacosf:                                Other Builtins.     (line    6)
+* cacosh:                                Other Builtins.     (line    6)
+* cacoshf:                               Other Builtins.     (line    6)
+* cacoshl:                               Other Builtins.     (line    6)
+* cacosl:                                Other Builtins.     (line    6)
+* callee_pop_aggregate_return attribute: Function Attributes.
+                                                             (line  847)
+* calling functions through the function vector on H8/300, M16C, M32C and SH2A processors: Function Attributes.
+                                                             (line  532)
+* calloc:                                Other Builtins.     (line    6)
+* carg:                                  Other Builtins.     (line    6)
+* cargf:                                 Other Builtins.     (line    6)
+* cargl:                                 Other Builtins.     (line    6)
+* case labels in initializers:           Designated Inits.   (line    6)
+* case ranges:                           Case Ranges.        (line    6)
+* casin:                                 Other Builtins.     (line    6)
+* casinf:                                Other Builtins.     (line    6)
+* casinh:                                Other Builtins.     (line    6)
+* casinhf:                               Other Builtins.     (line    6)
+* casinhl:                               Other Builtins.     (line    6)
+* casinl:                                Other Builtins.     (line    6)
+* cast to a union:                       Cast to Union.      (line    6)
+* catan:                                 Other Builtins.     (line    6)
+* catanf:                                Other Builtins.     (line    6)
+* catanh:                                Other Builtins.     (line    6)
+* catanhf:                               Other Builtins.     (line    6)
+* catanhl:                               Other Builtins.     (line    6)
+* catanl:                                Other Builtins.     (line    6)
+* cbrt:                                  Other Builtins.     (line    6)
+* cbrtf:                                 Other Builtins.     (line    6)
+* cbrtl:                                 Other Builtins.     (line    6)
+* ccos:                                  Other Builtins.     (line    6)
+* ccosf:                                 Other Builtins.     (line    6)
+* ccosh:                                 Other Builtins.     (line    6)
+* ccoshf:                                Other Builtins.     (line    6)
+* ccoshl:                                Other Builtins.     (line    6)
+* ccosl:                                 Other Builtins.     (line    6)
+* ceil:                                  Other Builtins.     (line    6)
+* ceilf:                                 Other Builtins.     (line    6)
+* ceill:                                 Other Builtins.     (line    6)
+* cexp:                                  Other Builtins.     (line    6)
+* cexpf:                                 Other Builtins.     (line    6)
+* cexpl:                                 Other Builtins.     (line    6)
+* character set, execution:              Preprocessor Options.
+                                                             (line  508)
+* character set, input:                  Preprocessor Options.
+                                                             (line  521)
+* character set, input normalization:    Warning Options.    (line 1202)
+* character set, wide execution:         Preprocessor Options.
+                                                             (line  513)
+* cimag:                                 Other Builtins.     (line    6)
+* cimagf:                                Other Builtins.     (line    6)
+* cimagl:                                Other Builtins.     (line    6)
+* cleanup attribute:                     Variable Attributes.
+                                                             (line   89)
+* clog:                                  Other Builtins.     (line    6)
+* clogf:                                 Other Builtins.     (line    6)
+* clogl:                                 Other Builtins.     (line    6)
+* COBOL:                                 G++ and GCC.        (line   23)
+* code generation conventions:           Code Gen Options.   (line    6)
+* code, mixed with declarations:         Mixed Declarations. (line    6)
+* cold function attribute:               Function Attributes.
+                                                             (line 1094)
+* command options:                       Invoking GCC.       (line    6)
+* comments, C++ style:                   C++ Comments.       (line    6)
+* common attribute:                      Variable Attributes.
+                                                             (line  105)
+* comparison of signed and unsigned values, warning: Warning Options.
+                                                             (line 1074)
+* compiler bugs, reporting:              Bug Reporting.      (line    6)
+* compiler compared to C++ preprocessor: G++ and GCC.        (line   35)
+* compiler options, C++:                 C++ Dialect Options.
+                                                             (line    6)
+* compiler options, Objective-C and Objective-C++: Objective-C and Objective-C++ Dialect Options.
+                                                             (line    6)
+* compiler version, specifying:          Target Options.     (line    6)
+* COMPILER_PATH:                         Environment Variables.
+                                                             (line   88)
+* complex conjugation:                   Complex.            (line   34)
+* complex numbers:                       Complex.            (line    6)
+* compound literals:                     Compound Literals.  (line    6)
+* computed gotos:                        Labels as Values.   (line    6)
+* conditional expressions, extensions:   Conditionals.       (line    6)
+* conflicting types:                     Disappointments.    (line   21)
+* conj:                                  Other Builtins.     (line    6)
+* conjf:                                 Other Builtins.     (line    6)
+* conjl:                                 Other Builtins.     (line    6)
+* const applied to function:             Function Attributes.
+                                                             (line    6)
+* const function attribute:              Function Attributes.
+                                                             (line  183)
+* constants in constraints:              Simple Constraints. (line   70)
+* constraint modifier characters:        Modifiers.          (line    6)
+* constraint, matching:                  Simple Constraints. (line  139)
+* constraints, asm:                      Constraints.        (line    6)
+* constraints, machine specific:         Machine Constraints.
+                                                             (line    6)
+* constructing calls:                    Constructing Calls. (line    6)
+* constructor expressions:               Compound Literals.  (line    6)
+* constructor function attribute:        Function Attributes.
+                                                             (line  211)
+* contributors:                          Contributors.       (line    6)
+* copysign:                              Other Builtins.     (line    6)
+* copysignf:                             Other Builtins.     (line    6)
+* copysignl:                             Other Builtins.     (line    6)
+* core dump:                             Bug Criteria.       (line    9)
+* cos:                                   Other Builtins.     (line    6)
+* cosf:                                  Other Builtins.     (line    6)
+* cosh:                                  Other Builtins.     (line    6)
+* coshf:                                 Other Builtins.     (line    6)
+* coshl:                                 Other Builtins.     (line    6)
+* cosl:                                  Other Builtins.     (line    6)
+* CPATH:                                 Environment Variables.
+                                                             (line  126)
+* CPLUS_INCLUDE_PATH:                    Environment Variables.
+                                                             (line  128)
+* cpow:                                  Other Builtins.     (line    6)
+* cpowf:                                 Other Builtins.     (line    6)
+* cpowl:                                 Other Builtins.     (line    6)
+* cproj:                                 Other Builtins.     (line    6)
+* cprojf:                                Other Builtins.     (line    6)
+* cprojl:                                Other Builtins.     (line    6)
+* creal:                                 Other Builtins.     (line    6)
+* crealf:                                Other Builtins.     (line    6)
+* creall:                                Other Builtins.     (line    6)
+* CRIS Options:                          CRIS Options.       (line    6)
+* cross compiling:                       Target Options.     (line    6)
+* CRX Options:                           CRX Options.        (line    6)
+* csin:                                  Other Builtins.     (line    6)
+* csinf:                                 Other Builtins.     (line    6)
+* csinh:                                 Other Builtins.     (line    6)
+* csinhf:                                Other Builtins.     (line    6)
+* csinhl:                                Other Builtins.     (line    6)
+* csinl:                                 Other Builtins.     (line    6)
+* csqrt:                                 Other Builtins.     (line    6)
+* csqrtf:                                Other Builtins.     (line    6)
+* csqrtl:                                Other Builtins.     (line    6)
+* ctan:                                  Other Builtins.     (line    6)
+* ctanf:                                 Other Builtins.     (line    6)
+* ctanh:                                 Other Builtins.     (line    6)
+* ctanhf:                                Other Builtins.     (line    6)
+* ctanhl:                                Other Builtins.     (line    6)
+* ctanl:                                 Other Builtins.     (line    6)
+* Darwin options:                        Darwin Options.     (line    6)
+* dcgettext:                             Other Builtins.     (line    6)
+* DD integer suffix:                     Decimal Float.      (line    6)
+* dd integer suffix:                     Decimal Float.      (line    6)
+* deallocating variable length arrays:   Variable Length.    (line   22)
+* debugging information options:         Debugging Options.  (line    6)
+* decimal floating types:                Decimal Float.      (line    6)
+* declaration scope:                     Incompatibilities.  (line   80)
+* declarations inside expressions:       Statement Exprs.    (line    6)
+* declarations, mixed with code:         Mixed Declarations. (line    6)
+* declaring attributes of functions:     Function Attributes.
+                                                             (line    6)
+* declaring static data in C++:          Static Definitions. (line    6)
+* defining static data in C++:           Static Definitions. (line    6)
+* dependencies for make as output:       Environment Variables.
+                                                             (line  154)
+* dependencies, make:                    Preprocessor Options.
+                                                             (line  173)
+* DEPENDENCIES_OUTPUT:                   Environment Variables.
+                                                             (line  153)
+* dependent name lookup:                 Name lookup.        (line    6)
+* deprecated attribute:                  Variable Attributes.
+                                                             (line  114)
+* deprecated attribute.:                 Function Attributes.
+                                                             (line  234)
+* designated initializers:               Designated Inits.   (line    6)
+* designator lists:                      Designated Inits.   (line   94)
+* designators:                           Designated Inits.   (line   61)
+* destructor function attribute:         Function Attributes.
+                                                             (line  211)
+* DF integer suffix:                     Decimal Float.      (line    6)
+* df integer suffix:                     Decimal Float.      (line    6)
+* dgettext:                              Other Builtins.     (line    6)
+* diagnostic messages:                   Language Independent Options.
+                                                             (line    6)
+* dialect options:                       C Dialect Options.  (line    6)
+* digits in constraint:                  Simple Constraints. (line  127)
+* directory options:                     Directory Options.  (line    6)
+* disinterrupt attribute:                Function Attributes.
+                                                             (line  254)
+* DL integer suffix:                     Decimal Float.      (line    6)
+* dl integer suffix:                     Decimal Float.      (line    6)
+* dollar signs in identifier names:      Dollar Signs.       (line    6)
+* double-word arithmetic:                Long Long.          (line    6)
+* downward funargs:                      Nested Functions.   (line    6)
+* drem:                                  Other Builtins.     (line    6)
+* dremf:                                 Other Builtins.     (line    6)
+* dreml:                                 Other Builtins.     (line    6)
+* E in constraint:                       Simple Constraints. (line   89)
+* earlyclobber operand:                  Modifiers.          (line   25)
+* eight bit data on the H8/300, H8/300H, and H8S: Function Attributes.
+                                                             (line  347)
+* empty structures:                      Empty Structures.   (line    6)
+* environment variables:                 Environment Variables.
+                                                             (line    6)
+* erf:                                   Other Builtins.     (line    6)
+* erfc:                                  Other Builtins.     (line    6)
+* erfcf:                                 Other Builtins.     (line    6)
+* erfcl:                                 Other Builtins.     (line    6)
+* erff:                                  Other Builtins.     (line    6)
+* erfl:                                  Other Builtins.     (line    6)
+* error function attribute:              Function Attributes.
+                                                             (line  152)
+* error messages:                        Warnings and Errors.
+                                                             (line    6)
+* escaped newlines:                      Escaped Newlines.   (line    6)
+* exception handler functions on the Blackfin processor: Function Attributes.
+                                                             (line  357)
+* exclamation point:                     Multi-Alternative.  (line   33)
+* exit:                                  Other Builtins.     (line    6)
+* exp:                                   Other Builtins.     (line    6)
+* exp10:                                 Other Builtins.     (line    6)
+* exp10f:                                Other Builtins.     (line    6)
+* exp10l:                                Other Builtins.     (line    6)
+* exp2:                                  Other Builtins.     (line    6)
+* exp2f:                                 Other Builtins.     (line    6)
+* exp2l:                                 Other Builtins.     (line    6)
+* expf:                                  Other Builtins.     (line    6)
+* expl:                                  Other Builtins.     (line    6)
+* explicit register variables:           Explicit Reg Vars.  (line    6)
+* expm1:                                 Other Builtins.     (line    6)
+* expm1f:                                Other Builtins.     (line    6)
+* expm1l:                                Other Builtins.     (line    6)
+* expressions containing statements:     Statement Exprs.    (line    6)
+* expressions, constructor:              Compound Literals.  (line    6)
+* extended asm:                          Extended Asm.       (line    6)
+* extensible constraints:                Simple Constraints. (line  163)
+* extensions, ?::                        Conditionals.       (line    6)
+* extensions, C language:                C Extensions.       (line    6)
+* extensions, C++ language:              C++ Extensions.     (line    6)
+* external declaration scope:            Incompatibilities.  (line   80)
+* externally_visible attribute.:         Function Attributes.
+                                                             (line  363)
+* F in constraint:                       Simple Constraints. (line   94)
+* fabs:                                  Other Builtins.     (line    6)
+* fabsf:                                 Other Builtins.     (line    6)
+* fabsl:                                 Other Builtins.     (line    6)
+* fatal signal:                          Bug Criteria.       (line    9)
+* fdim:                                  Other Builtins.     (line    6)
+* fdimf:                                 Other Builtins.     (line    6)
+* fdiml:                                 Other Builtins.     (line    6)
+* FDL, GNU Free Documentation License:   GNU Free Documentation License.
+                                                             (line    6)
+* ffs:                                   Other Builtins.     (line    6)
+* file name suffix:                      Overall Options.    (line   14)
+* file names:                            Link Options.       (line   10)
+* fixed-point types:                     Fixed-Point.        (line    6)
+* flatten function attribute:            Function Attributes.
+                                                             (line  145)
+* flexible array members:                Zero Length.        (line    6)
+* float as function value type:          Incompatibilities.  (line  141)
+* floating point precision <1>:          Disappointments.    (line   68)
+* floating point precision:              Optimize Options.   (line 1786)
+* floor:                                 Other Builtins.     (line    6)
+* floorf:                                Other Builtins.     (line    6)
+* floorl:                                Other Builtins.     (line    6)
+* fma:                                   Other Builtins.     (line    6)
+* fmaf:                                  Other Builtins.     (line    6)
+* fmal:                                  Other Builtins.     (line    6)
+* fmax:                                  Other Builtins.     (line    6)
+* fmaxf:                                 Other Builtins.     (line    6)
+* fmaxl:                                 Other Builtins.     (line    6)
+* fmin:                                  Other Builtins.     (line    6)
+* fminf:                                 Other Builtins.     (line    6)
+* fminl:                                 Other Builtins.     (line    6)
+* fmod:                                  Other Builtins.     (line    6)
+* fmodf:                                 Other Builtins.     (line    6)
+* fmodl:                                 Other Builtins.     (line    6)
+* force_align_arg_pointer attribute:     Function Attributes.
+                                                             (line 1136)
+* format function attribute:             Function Attributes.
+                                                             (line  420)
+* format_arg function attribute:         Function Attributes.
+                                                             (line  485)
+* Fortran:                               G++ and GCC.        (line    6)
+* forwarding calls:                      Constructing Calls. (line    6)
+* fprintf:                               Other Builtins.     (line    6)
+* fprintf_unlocked:                      Other Builtins.     (line    6)
+* fputs:                                 Other Builtins.     (line    6)
+* fputs_unlocked:                        Other Builtins.     (line    6)
+* FR30 Options:                          FR30 Options.       (line    6)
+* freestanding environment:              Standards.          (line   13)
+* freestanding implementation:           Standards.          (line   13)
+* frexp:                                 Other Builtins.     (line    6)
+* frexpf:                                Other Builtins.     (line    6)
+* frexpl:                                Other Builtins.     (line    6)
+* FRV Options:                           FRV Options.        (line    6)
+* fscanf:                                Other Builtins.     (line    6)
+* fscanf, and constant strings:          Incompatibilities.  (line   17)
+* function addressability on the M32R/D: Function Attributes.
+                                                             (line  807)
+* function attributes:                   Function Attributes.
+                                                             (line    6)
+* function pointers, arithmetic:         Pointer Arith.      (line    6)
+* function prototype declarations:       Function Prototypes.
+                                                             (line    6)
+* function without a prologue/epilogue code: Function Attributes.
+                                                             (line  865)
+* function, size of pointer to:          Pointer Arith.      (line    6)
+* functions called via pointer on the RS/6000 and PowerPC: Function Attributes.
+                                                             (line  761)
+* functions in arbitrary sections:       Function Attributes.
+                                                             (line    6)
+* functions that are dynamically resolved: Function Attributes.
+                                                             (line    6)
+* functions that are passed arguments in registers on the 386: Function Attributes.
+                                                             (line    6)
+* functions that behave like malloc:     Function Attributes.
+                                                             (line    6)
+* functions that do not pop the argument stack on the 386: Function Attributes.
+                                                             (line    6)
+* functions that do pop the argument stack on the 386: Function Attributes.
+                                                             (line  177)
+* functions that have different compilation options on the 386: Function Attributes.
+                                                             (line    6)
+* functions that have different optimization options: Function Attributes.
+                                                             (line    6)
+* functions that have no side effects:   Function Attributes.
+                                                             (line    6)
+* functions that never return:           Function Attributes.
+                                                             (line    6)
+* functions that pop the argument stack on the 386: Function Attributes.
+                                                             (line    6)
+* functions that return more than once:  Function Attributes.
+                                                             (line    6)
+* functions which do not handle memory bank switching on 68HC11/68HC12: Function Attributes.
+                                                             (line  878)
+* functions which handle memory bank switching: Function Attributes.
+                                                             (line  375)
+* functions with non-null pointer arguments: Function Attributes.
+                                                             (line    6)
+* functions with printf, scanf, strftime or strfmon style arguments: Function Attributes.
+                                                             (line    6)
+* g in constraint:                       Simple Constraints. (line  120)
+* G in constraint:                       Simple Constraints. (line   98)
+* g++:                                   Invoking G++.       (line   14)
+* G++:                                   G++ and GCC.        (line   30)
+* gamma:                                 Other Builtins.     (line    6)
+* gamma_r:                               Other Builtins.     (line    6)
+* gammaf:                                Other Builtins.     (line    6)
+* gammaf_r:                              Other Builtins.     (line    6)
+* gammal:                                Other Builtins.     (line    6)
+* gammal_r:                              Other Builtins.     (line    6)
+* GCC:                                   G++ and GCC.        (line    6)
+* GCC command options:                   Invoking GCC.       (line    6)
+* GCC_EXEC_PREFIX:                       Environment Variables.
+                                                             (line   52)
+* gcc_struct:                            Type Attributes.    (line  319)
+* gcc_struct attribute:                  Variable Attributes.
+                                                             (line  419)
+* gcov:                                  Debugging Options.  (line  366)
+* gettext:                               Other Builtins.     (line    6)
+* global offset table:                   Code Gen Options.   (line  184)
+* global register after longjmp:         Global Reg Vars.    (line   66)
+* global register variables:             Global Reg Vars.    (line    6)
+* GNAT:                                  G++ and GCC.        (line   30)
+* GNU C Compiler:                        G++ and GCC.        (line    6)
+* GNU Compiler Collection:               G++ and GCC.        (line    6)
+* gnu_inline function attribute:         Function Attributes.
+                                                             (line   95)
+* Go:                                    G++ and GCC.        (line    6)
+* goto with computed label:              Labels as Values.   (line    6)
+* gprof:                                 Debugging Options.  (line  296)
+* grouping options:                      Invoking GCC.       (line   26)
+* H in constraint:                       Simple Constraints. (line   98)
+* half-precision floating point:         Half-Precision.     (line    6)
+* hardware models and configurations, specifying: Submodel Options.
+                                                             (line    6)
+* hex floats:                            Hex Floats.         (line    6)
+* HK fixed-suffix:                       Fixed-Point.        (line    6)
+* hk fixed-suffix:                       Fixed-Point.        (line    6)
+* hosted environment <1>:                C Dialect Options.  (line  218)
+* hosted environment:                    Standards.          (line   13)
+* hosted implementation:                 Standards.          (line   13)
+* hot function attribute:                Function Attributes.
+                                                             (line 1081)
+* HPPA Options:                          HPPA Options.       (line    6)
+* HR fixed-suffix:                       Fixed-Point.        (line    6)
+* hr fixed-suffix:                       Fixed-Point.        (line    6)
+* hypot:                                 Other Builtins.     (line    6)
+* hypotf:                                Other Builtins.     (line    6)
+* hypotl:                                Other Builtins.     (line    6)
+* I in constraint:                       Simple Constraints. (line   81)
+* i in constraint:                       Simple Constraints. (line   70)
+* i386 and x86-64 Windows Options:       i386 and x86-64 Windows Options.
+                                                             (line    6)
+* i386 Options:                          i386 and x86-64 Options.
+                                                             (line    6)
+* IA-64 Options:                         IA-64 Options.      (line    6)
+* IBM RS/6000 and PowerPC Options:       RS/6000 and PowerPC Options.
+                                                             (line    6)
+* identifier names, dollar signs in:     Dollar Signs.       (line    6)
+* identifiers, names in assembler code:  Asm Labels.         (line    6)
+* ifunc attribute:                       Function Attributes.
+                                                             (line  648)
+* ilogb:                                 Other Builtins.     (line    6)
+* ilogbf:                                Other Builtins.     (line    6)
+* ilogbl:                                Other Builtins.     (line    6)
+* imaxabs:                               Other Builtins.     (line    6)
+* implementation-defined behavior, C language: C Implementation.
+                                                             (line    6)
+* implementation-defined behavior, C++ language: C++ Implementation.
+                                                             (line    6)
+* implied #pragma implementation:        C++ Interface.      (line   46)
+* incompatibilities of GCC:              Incompatibilities.  (line    6)
+* increment operators:                   Bug Criteria.       (line   17)
+* index:                                 Other Builtins.     (line    6)
+* indirect calls on ARM:                 Function Attributes.
+                                                             (line  751)
+* indirect calls on MIPS:                Function Attributes.
+                                                             (line  773)
+* init_priority attribute:               C++ Attributes.     (line    9)
+* initializations in expressions:        Compound Literals.  (line    6)
+* initializers with labeled elements:    Designated Inits.   (line    6)
+* initializers, non-constant:            Initializers.       (line    6)
+* inline automatic for C++ member fns:   Inline.             (line   71)
+* inline functions:                      Inline.             (line    6)
+* inline functions, omission of:         Inline.             (line   51)
+* inlining and C++ pragmas:              C++ Interface.      (line   66)
+* installation trouble:                  Trouble.            (line    6)
+* integrating function code:             Inline.             (line    6)
+* Intel 386 Options:                     i386 and x86-64 Options.
+                                                             (line    6)
+* interface and implementation headers, C++: C++ Interface.  (line    6)
+* intermediate C version, nonexistent:   G++ and GCC.        (line   35)
+* interrupt handler functions:           Function Attributes.
+                                                             (line  140)
+* interrupt handler functions on the Blackfin, m68k, H8/300 and SH processors: Function Attributes.
+                                                             (line  688)
+* interrupt service routines on ARM:     Function Attributes.
+                                                             (line  703)
+* interrupt thread functions on fido:    Function Attributes.
+                                                             (line  695)
+* introduction:                          Top.                (line    6)
+* invalid assembly code:                 Bug Criteria.       (line   12)
+* invalid input:                         Bug Criteria.       (line   42)
+* invoking g++:                          Invoking G++.       (line   22)
+* isalnum:                               Other Builtins.     (line    6)
+* isalpha:                               Other Builtins.     (line    6)
+* isascii:                               Other Builtins.     (line    6)
+* isblank:                               Other Builtins.     (line    6)
+* iscntrl:                               Other Builtins.     (line    6)
+* isdigit:                               Other Builtins.     (line    6)
+* isgraph:                               Other Builtins.     (line    6)
+* islower:                               Other Builtins.     (line    6)
+* ISO 9899:                              Standards.          (line   13)
+* ISO C:                                 Standards.          (line   13)
+* ISO C standard:                        Standards.          (line   13)
+* ISO C1X:                               Standards.          (line   13)
+* ISO C90:                               Standards.          (line   13)
+* ISO C94:                               Standards.          (line   13)
+* ISO C95:                               Standards.          (line   13)
+* ISO C99:                               Standards.          (line   13)
+* ISO C9X:                               Standards.          (line   13)
+* ISO support:                           C Dialect Options.  (line   10)
+* ISO/IEC 9899:                          Standards.          (line   13)
+* isprint:                               Other Builtins.     (line    6)
+* ispunct:                               Other Builtins.     (line    6)
+* isspace:                               Other Builtins.     (line    6)
+* isupper:                               Other Builtins.     (line    6)
+* iswalnum:                              Other Builtins.     (line    6)
+* iswalpha:                              Other Builtins.     (line    6)
+* iswblank:                              Other Builtins.     (line    6)
+* iswcntrl:                              Other Builtins.     (line    6)
+* iswdigit:                              Other Builtins.     (line    6)
+* iswgraph:                              Other Builtins.     (line    6)
+* iswlower:                              Other Builtins.     (line    6)
+* iswprint:                              Other Builtins.     (line    6)
+* iswpunct:                              Other Builtins.     (line    6)
+* iswspace:                              Other Builtins.     (line    6)
+* iswupper:                              Other Builtins.     (line    6)
+* iswxdigit:                             Other Builtins.     (line    6)
+* isxdigit:                              Other Builtins.     (line    6)
+* j0:                                    Other Builtins.     (line    6)
+* j0f:                                   Other Builtins.     (line    6)
+* j0l:                                   Other Builtins.     (line    6)
+* j1:                                    Other Builtins.     (line    6)
+* j1f:                                   Other Builtins.     (line    6)
+* j1l:                                   Other Builtins.     (line    6)
+* Java:                                  G++ and GCC.        (line    6)
+* java_interface attribute:              C++ Attributes.     (line   29)
+* jn:                                    Other Builtins.     (line    6)
+* jnf:                                   Other Builtins.     (line    6)
+* jnl:                                   Other Builtins.     (line    6)
+* K fixed-suffix:                        Fixed-Point.        (line    6)
+* k fixed-suffix:                        Fixed-Point.        (line    6)
+* keep_interrupts_masked attribute:      Function Attributes.
+                                                             (line  624)
+* keywords, alternate:                   Alternate Keywords. (line    6)
+* known causes of trouble:               Trouble.            (line    6)
+* l1_data variable attribute:            Variable Attributes.
+                                                             (line  330)
+* l1_data_A variable attribute:          Variable Attributes.
+                                                             (line  330)
+* l1_data_B variable attribute:          Variable Attributes.
+                                                             (line  330)
+* l1_text function attribute:            Function Attributes.
+                                                             (line  712)
+* l2 function attribute:                 Function Attributes.
+                                                             (line  718)
+* l2 variable attribute:                 Variable Attributes.
+                                                             (line  338)
+* labeled elements in initializers:      Designated Inits.   (line    6)
+* labels as values:                      Labels as Values.   (line    6)
+* labs:                                  Other Builtins.     (line    6)
+* LANG:                                  Environment Variables.
+                                                             (line   21)
+* language dialect options:              C Dialect Options.  (line    6)
+* LC_ALL:                                Environment Variables.
+                                                             (line   21)
+* LC_CTYPE:                              Environment Variables.
+                                                             (line   21)
+* LC_MESSAGES:                           Environment Variables.
+                                                             (line   21)
+* ldexp:                                 Other Builtins.     (line    6)
+* ldexpf:                                Other Builtins.     (line    6)
+* ldexpl:                                Other Builtins.     (line    6)
+* leaf function attribute:               Function Attributes.
+                                                             (line  724)
+* length-zero arrays:                    Zero Length.        (line    6)
+* lgamma:                                Other Builtins.     (line    6)
+* lgamma_r:                              Other Builtins.     (line    6)
+* lgammaf:                               Other Builtins.     (line    6)
+* lgammaf_r:                             Other Builtins.     (line    6)
+* lgammal:                               Other Builtins.     (line    6)
+* lgammal_r:                             Other Builtins.     (line    6)
+* Libraries:                             Link Options.       (line   24)
+* LIBRARY_PATH:                          Environment Variables.
+                                                             (line   94)
+* link options:                          Link Options.       (line    6)
+* linker script:                         Link Options.       (line  178)
+* LK fixed-suffix:                       Fixed-Point.        (line    6)
+* lk fixed-suffix:                       Fixed-Point.        (line    6)
+* LL integer suffix:                     Long Long.          (line    6)
+* llabs:                                 Other Builtins.     (line    6)
+* LLK fixed-suffix:                      Fixed-Point.        (line    6)
+* llk fixed-suffix:                      Fixed-Point.        (line    6)
+* LLR fixed-suffix:                      Fixed-Point.        (line    6)
+* llr fixed-suffix:                      Fixed-Point.        (line    6)
+* llrint:                                Other Builtins.     (line    6)
+* llrintf:                               Other Builtins.     (line    6)
+* llrintl:                               Other Builtins.     (line    6)
+* llround:                               Other Builtins.     (line    6)
+* llroundf:                              Other Builtins.     (line    6)
+* llroundl:                              Other Builtins.     (line    6)
+* LM32 options:                          LM32 Options.       (line    6)
+* load address instruction:              Simple Constraints. (line  154)
+* local labels:                          Local Labels.       (line    6)
+* local variables in macros:             Typeof.             (line   46)
+* local variables, specifying registers: Local Reg Vars.     (line    6)
+* locale:                                Environment Variables.
+                                                             (line   21)
+* locale definition:                     Environment Variables.
+                                                             (line  103)
+* log:                                   Other Builtins.     (line    6)
+* log10:                                 Other Builtins.     (line    6)
+* log10f:                                Other Builtins.     (line    6)
+* log10l:                                Other Builtins.     (line    6)
+* log1p:                                 Other Builtins.     (line    6)
+* log1pf:                                Other Builtins.     (line    6)
+* log1pl:                                Other Builtins.     (line    6)
+* log2:                                  Other Builtins.     (line    6)
+* log2f:                                 Other Builtins.     (line    6)
+* log2l:                                 Other Builtins.     (line    6)
+* logb:                                  Other Builtins.     (line    6)
+* logbf:                                 Other Builtins.     (line    6)
+* logbl:                                 Other Builtins.     (line    6)
+* logf:                                  Other Builtins.     (line    6)
+* logl:                                  Other Builtins.     (line    6)
+* long long data types:                  Long Long.          (line    6)
+* longjmp:                               Global Reg Vars.    (line   66)
+* longjmp incompatibilities:             Incompatibilities.  (line   39)
+* longjmp warnings:                      Warning Options.    (line  647)
+* LR fixed-suffix:                       Fixed-Point.        (line    6)
+* lr fixed-suffix:                       Fixed-Point.        (line    6)
+* lrint:                                 Other Builtins.     (line    6)
+* lrintf:                                Other Builtins.     (line    6)
+* lrintl:                                Other Builtins.     (line    6)
+* lround:                                Other Builtins.     (line    6)
+* lroundf:                               Other Builtins.     (line    6)
+* lroundl:                               Other Builtins.     (line    6)
+* m in constraint:                       Simple Constraints. (line   17)
+* M32C options:                          M32C Options.       (line    6)
+* M32R/D options:                        M32R/D Options.     (line    6)
+* M680x0 options:                        M680x0 Options.     (line    6)
+* M68hc1x options:                       M68hc1x Options.    (line    6)
+* machine dependent options:             Submodel Options.   (line    6)
+* machine specific constraints:          Machine Constraints.
+                                                             (line    6)
+* macro with variable arguments:         Variadic Macros.    (line    6)
+* macros containing asm:                 Extended Asm.       (line  242)
+* macros, inline alternative:            Inline.             (line    6)
+* macros, local labels:                  Local Labels.       (line    6)
+* macros, local variables in:            Typeof.             (line   46)
+* macros, statements in expressions:     Statement Exprs.    (line    6)
+* macros, types of arguments:            Typeof.             (line    6)
+* make:                                  Preprocessor Options.
+                                                             (line  173)
+* malloc:                                Other Builtins.     (line    6)
+* malloc attribute:                      Function Attributes.
+                                                             (line  783)
+* matching constraint:                   Simple Constraints. (line  139)
+* MCore options:                         MCore Options.      (line    6)
+* member fns, automatically inline:      Inline.             (line   71)
+* memchr:                                Other Builtins.     (line    6)
+* memcmp:                                Other Builtins.     (line    6)
+* memcpy:                                Other Builtins.     (line    6)
+* memory references in constraints:      Simple Constraints. (line   17)
+* mempcpy:                               Other Builtins.     (line    6)
+* memset:                                Other Builtins.     (line    6)
+* MeP options:                           MeP Options.        (line    6)
+* Mercury:                               G++ and GCC.        (line   23)
+* message formatting:                    Language Independent Options.
+                                                             (line    6)
+* messages, warning:                     Warning Options.    (line    6)
+* messages, warning and error:           Warnings and Errors.
+                                                             (line    6)
+* MicroBlaze Options:                    MicroBlaze Options. (line    6)
+* middle-operands, omitted:              Conditionals.       (line    6)
+* MIPS options:                          MIPS Options.       (line    6)
+* mips16 attribute:                      Function Attributes.
+                                                             (line  793)
+* misunderstandings in C++:              C++ Misunderstandings.
+                                                             (line    6)
+* mixed declarations and code:           Mixed Declarations. (line    6)
+* mktemp, and constant strings:          Incompatibilities.  (line   13)
+* MMIX Options:                          MMIX Options.       (line    6)
+* MN10300 options:                       MN10300 Options.    (line    6)
+* mode attribute:                        Variable Attributes.
+                                                             (line  134)
+* modf:                                  Other Builtins.     (line    6)
+* modff:                                 Other Builtins.     (line    6)
+* modfl:                                 Other Builtins.     (line    6)
+* modifiers in constraints:              Modifiers.          (line    6)
+* ms_abi attribute:                      Function Attributes.
+                                                             (line  835)
+* ms_hook_prologue attribute:            Function Attributes.
+                                                             (line  859)
+* ms_struct:                             Type Attributes.    (line  319)
+* ms_struct attribute:                   Variable Attributes.
+                                                             (line  419)
+* mudflap:                               Optimize Options.   (line  393)
+* multiple alternative constraints:      Multi-Alternative.  (line    6)
+* multiprecision arithmetic:             Long Long.          (line    6)
+* n in constraint:                       Simple Constraints. (line   75)
+* named address spaces:                  Named Address Spaces.
+                                                             (line    6)
+* names used in assembler code:          Asm Labels.         (line    6)
+* naming convention, implementation headers: C++ Interface.  (line   46)
+* nearbyint:                             Other Builtins.     (line    6)
+* nearbyintf:                            Other Builtins.     (line    6)
+* nearbyintl:                            Other Builtins.     (line    6)
+* nested functions:                      Nested Functions.   (line    6)
+* newlines (escaped):                    Escaped Newlines.   (line    6)
+* nextafter:                             Other Builtins.     (line    6)
+* nextafterf:                            Other Builtins.     (line    6)
+* nextafterl:                            Other Builtins.     (line    6)
+* nexttoward:                            Other Builtins.     (line    6)
+* nexttowardf:                           Other Builtins.     (line    6)
+* nexttowardl:                           Other Builtins.     (line    6)
+* NFC:                                   Warning Options.    (line 1202)
+* NFKC:                                  Warning Options.    (line 1202)
+* NMI handler functions on the Blackfin processor: Function Attributes.
+                                                             (line  893)
+* no_instrument_function function attribute: Function Attributes.
+                                                             (line  899)
+* no_split_stack function attribute:     Function Attributes.
+                                                             (line  904)
+* noclone function attribute:            Function Attributes.
+                                                             (line  920)
+* nocommon attribute:                    Variable Attributes.
+                                                             (line  105)
+* noinline function attribute:           Function Attributes.
+                                                             (line  910)
+* nomips16 attribute:                    Function Attributes.
+                                                             (line  793)
+* non-constant initializers:             Initializers.       (line    6)
+* non-static inline function:            Inline.             (line   85)
+* nonnull function attribute:            Function Attributes.
+                                                             (line  926)
+* noreturn function attribute:           Function Attributes.
+                                                             (line  949)
+* nothrow function attribute:            Function Attributes.
+                                                             (line  991)
+* o in constraint:                       Simple Constraints. (line   23)
+* OBJC_INCLUDE_PATH:                     Environment Variables.
+                                                             (line  129)
+* Objective-C <1>:                       Standards.          (line  157)
+* Objective-C:                           G++ and GCC.        (line    6)
+* Objective-C and Objective-C++ options, command line: Objective-C and Objective-C++ Dialect Options.
+                                                             (line    6)
+* Objective-C++ <1>:                     Standards.          (line  157)
+* Objective-C++:                         G++ and GCC.        (line    6)
+* offsettable address:                   Simple Constraints. (line   23)
+* old-style function definitions:        Function Prototypes.
+                                                             (line    6)
+* omitted middle-operands:               Conditionals.       (line    6)
+* open coding:                           Inline.             (line    6)
+* OpenMP parallel:                       C Dialect Options.  (line  235)
+* operand constraints, asm:              Constraints.        (line    6)
+* optimize function attribute:           Function Attributes.
+                                                             (line  999)
+* optimize options:                      Optimize Options.   (line    6)
+* options to control diagnostics formatting: Language Independent Options.
+                                                             (line    6)
+* options to control warnings:           Warning Options.    (line    6)
+* options, C++:                          C++ Dialect Options.
+                                                             (line    6)
+* options, code generation:              Code Gen Options.   (line    6)
+* options, debugging:                    Debugging Options.  (line    6)
+* options, dialect:                      C Dialect Options.  (line    6)
+* options, directory search:             Directory Options.  (line    6)
+* options, GCC command:                  Invoking GCC.       (line    6)
+* options, grouping:                     Invoking GCC.       (line   26)
+* options, linking:                      Link Options.       (line    6)
+* options, Objective-C and Objective-C++: Objective-C and Objective-C++ Dialect Options.
+                                                             (line    6)
+* options, optimization:                 Optimize Options.   (line    6)
+* options, order:                        Invoking GCC.       (line   30)
+* options, preprocessor:                 Preprocessor Options.
+                                                             (line    6)
+* order of evaluation, side effects:     Non-bugs.           (line  196)
+* order of options:                      Invoking GCC.       (line   30)
+* OS_main AVR function attribute:        Function Attributes.
+                                                             (line 1016)
+* OS_task AVR function attribute:        Function Attributes.
+                                                             (line 1016)
+* other register constraints:            Simple Constraints. (line  163)
+* output file option:                    Overall Options.    (line  191)
+* overloaded virtual function, warning:  C++ Dialect Options.
+                                                             (line  538)
+* p in constraint:                       Simple Constraints. (line  154)
+* packed attribute:                      Variable Attributes.
+                                                             (line  145)
+* parameter forward declaration:         Variable Length.    (line   59)
+* Pascal:                                G++ and GCC.        (line   23)
+* pcs function attribute:                Function Attributes.
+                                                             (line 1041)
+* PDP-11 Options:                        PDP-11 Options.     (line    6)
+* PIC:                                   Code Gen Options.   (line  184)
+* picoChip options:                      picoChip Options.   (line    6)
+* pmf:                                   Bound member functions.
+                                                             (line    6)
+* pointer arguments:                     Function Attributes.
+                                                             (line  188)
+* pointer to member function:            Bound member functions.
+                                                             (line    6)
+* portions of temporary objects, pointers to: Temporaries.   (line    6)
+* pow:                                   Other Builtins.     (line    6)
+* pow10:                                 Other Builtins.     (line    6)
+* pow10f:                                Other Builtins.     (line    6)
+* pow10l:                                Other Builtins.     (line    6)
+* PowerPC options:                       PowerPC Options.    (line    6)
+* powf:                                  Other Builtins.     (line    6)
+* powl:                                  Other Builtins.     (line    6)
+* pragma GCC optimize:                   Function Specific Option Pragmas.
+                                                             (line   21)
+* pragma GCC pop_options:                Function Specific Option Pragmas.
+                                                             (line   34)
+* pragma GCC push_options:               Function Specific Option Pragmas.
+                                                             (line   34)
+* pragma GCC reset_options:              Function Specific Option Pragmas.
+                                                             (line   44)
+* pragma GCC target:                     Function Specific Option Pragmas.
+                                                             (line    7)
+* pragma, address:                       M32C Pragmas.       (line   15)
+* pragma, align:                         Solaris Pragmas.    (line   11)
+* pragma, call:                          MeP Pragmas.        (line   48)
+* pragma, coprocessor available:         MeP Pragmas.        (line   13)
+* pragma, coprocessor call_saved:        MeP Pragmas.        (line   20)
+* pragma, coprocessor subclass:          MeP Pragmas.        (line   28)
+* pragma, custom io_volatile:            MeP Pragmas.        (line    7)
+* pragma, diagnostic:                    Diagnostic Pragmas. (line   14)
+* pragma, disinterrupt:                  MeP Pragmas.        (line   38)
+* pragma, extern_prefix:                 Symbol-Renaming Pragmas.
+                                                             (line   20)
+* pragma, fini:                          Solaris Pragmas.    (line   19)
+* pragma, init:                          Solaris Pragmas.    (line   24)
+* pragma, long_calls:                    ARM Pragmas.        (line   11)
+* pragma, long_calls_off:                ARM Pragmas.        (line   17)
+* pragma, longcall:                      RS/6000 and PowerPC Pragmas.
+                                                             (line   14)
+* pragma, mark:                          Darwin Pragmas.     (line   11)
+* pragma, memregs:                       M32C Pragmas.       (line    7)
+* pragma, no_long_calls:                 ARM Pragmas.        (line   14)
+* pragma, options align:                 Darwin Pragmas.     (line   14)
+* pragma, pop_macro:                     Push/Pop Macro Pragmas.
+                                                             (line   15)
+* pragma, push_macro:                    Push/Pop Macro Pragmas.
+                                                             (line   11)
+* pragma, reason for not using:          Function Attributes.
+                                                             (line 1763)
+* pragma, redefine_extname:              Symbol-Renaming Pragmas.
+                                                             (line   14)
+* pragma, segment:                       Darwin Pragmas.     (line   21)
+* pragma, unused:                        Darwin Pragmas.     (line   24)
+* pragma, visibility:                    Visibility Pragmas. (line    8)
+* pragma, weak:                          Weak Pragmas.       (line   10)
+* pragmas:                               Pragmas.            (line    6)
+* pragmas in C++, effect on inlining:    C++ Interface.      (line   66)
+* pragmas, interface and implementation: C++ Interface.      (line    6)
+* pragmas, warning of unknown:           Warning Options.    (line  664)
+* precompiled headers:                   Precompiled Headers.
+                                                             (line    6)
+* preprocessing numbers:                 Incompatibilities.  (line  173)
+* preprocessing tokens:                  Incompatibilities.  (line  173)
+* preprocessor options:                  Preprocessor Options.
+                                                             (line    6)
+* printf:                                Other Builtins.     (line    6)
+* printf_unlocked:                       Other Builtins.     (line    6)
+* prof:                                  Debugging Options.  (line  290)
+* progmem AVR variable attribute:        Variable Attributes.
+                                                             (line  314)
+* promotion of formal parameters:        Function Prototypes.
+                                                             (line    6)
+* pure function attribute:               Function Attributes.
+                                                             (line 1059)
+* push address instruction:              Simple Constraints. (line  154)
+* putchar:                               Other Builtins.     (line    6)
+* puts:                                  Other Builtins.     (line    6)
+* Q floating point suffix:               Floating Types.     (line    6)
+* q floating point suffix:               Floating Types.     (line    6)
+* qsort, and global register variables:  Global Reg Vars.    (line   42)
+* question mark:                         Multi-Alternative.  (line   27)
+* R fixed-suffix:                        Fixed-Point.        (line    6)
+* r fixed-suffix:                        Fixed-Point.        (line    6)
+* r in constraint:                       Simple Constraints. (line   66)
+* ranges in case statements:             Case Ranges.        (line    6)
+* read-only strings:                     Incompatibilities.  (line    9)
+* register variable after longjmp:       Global Reg Vars.    (line   66)
+* registers:                             Extended Asm.       (line    6)
+* registers for local variables:         Local Reg Vars.     (line    6)
+* registers in constraints:              Simple Constraints. (line   66)
+* registers, global allocation:          Explicit Reg Vars.  (line    6)
+* registers, global variables in:        Global Reg Vars.    (line    6)
+* regparm attribute:                     Function Attributes.
+                                                             (line 1112)
+* relocation truncated to fit (ColdFire): M680x0 Options.    (line  328)
+* relocation truncated to fit (MIPS):    MIPS Options.       (line  199)
+* remainder:                             Other Builtins.     (line    6)
+* remainderf:                            Other Builtins.     (line    6)
+* remainderl:                            Other Builtins.     (line    6)
+* remquo:                                Other Builtins.     (line    6)
+* remquof:                               Other Builtins.     (line    6)
+* remquol:                               Other Builtins.     (line    6)
+* reordering, warning:                   C++ Dialect Options.
+                                                             (line  463)
+* reporting bugs:                        Bugs.               (line    6)
+* resbank attribute:                     Function Attributes.
+                                                             (line 1144)
+* rest argument (in macro):              Variadic Macros.    (line    6)
+* restricted pointers:                   Restricted Pointers.
+                                                             (line    6)
+* restricted references:                 Restricted Pointers.
+                                                             (line    6)
+* restricted this pointer:               Restricted Pointers.
+                                                             (line    6)
+* returns_twice attribute:               Function Attributes.
+                                                             (line 1158)
+* rindex:                                Other Builtins.     (line    6)
+* rint:                                  Other Builtins.     (line    6)
+* rintf:                                 Other Builtins.     (line    6)
+* rintl:                                 Other Builtins.     (line    6)
+* round:                                 Other Builtins.     (line    6)
+* roundf:                                Other Builtins.     (line    6)
+* roundl:                                Other Builtins.     (line    6)
+* RS/6000 and PowerPC Options:           RS/6000 and PowerPC Options.
+                                                             (line    6)
+* RTTI:                                  Vague Linkage.      (line   43)
+* run-time options:                      Code Gen Options.   (line    6)
+* RX Options:                            RX Options.         (line    6)
+* s in constraint:                       Simple Constraints. (line  102)
+* S/390 and zSeries Options:             S/390 and zSeries Options.
+                                                             (line    6)
+* save all registers on the Blackfin, H8/300, H8/300H, and H8S: Function Attributes.
+                                                             (line 1167)
+* save volatile registers on the MicroBlaze: Function Attributes.
+                                                             (line 1172)
+* scalb:                                 Other Builtins.     (line    6)
+* scalbf:                                Other Builtins.     (line    6)
+* scalbl:                                Other Builtins.     (line    6)
+* scalbln:                               Other Builtins.     (line    6)
+* scalblnf:                              Other Builtins.     (line    6)
+* scalbn:                                Other Builtins.     (line    6)
+* scalbnf:                               Other Builtins.     (line    6)
+* scanf, and constant strings:           Incompatibilities.  (line   17)
+* scanfnl:                               Other Builtins.     (line    6)
+* scope of a variable length array:      Variable Length.    (line   22)
+* scope of declaration:                  Disappointments.    (line   21)
+* scope of external declarations:        Incompatibilities.  (line   80)
+* Score Options:                         Score Options.      (line    6)
+* search path:                           Directory Options.  (line    6)
+* section function attribute:            Function Attributes.
+                                                             (line 1180)
+* section variable attribute:            Variable Attributes.
+                                                             (line  166)
+* sentinel function attribute:           Function Attributes.
+                                                             (line 1196)
+* setjmp:                                Global Reg Vars.    (line   66)
+* setjmp incompatibilities:              Incompatibilities.  (line   39)
+* shared strings:                        Incompatibilities.  (line    9)
+* shared variable attribute:             Variable Attributes.
+                                                             (line  211)
+* side effect in ?::                     Conditionals.       (line   20)
+* side effects, macro argument:          Statement Exprs.    (line   35)
+* side effects, order of evaluation:     Non-bugs.           (line  196)
+* signal handler functions on the AVR processors: Function Attributes.
+                                                             (line 1227)
+* signbit:                               Other Builtins.     (line    6)
+* signbitd128:                           Other Builtins.     (line    6)
+* signbitd32:                            Other Builtins.     (line    6)
+* signbitd64:                            Other Builtins.     (line    6)
+* signbitf:                              Other Builtins.     (line    6)
+* signbitl:                              Other Builtins.     (line    6)
+* signed and unsigned values, comparison warning: Warning Options.
+                                                             (line 1074)
+* significand:                           Other Builtins.     (line    6)
+* significandf:                          Other Builtins.     (line    6)
+* significandl:                          Other Builtins.     (line    6)
+* simple constraints:                    Simple Constraints. (line    6)
+* sin:                                   Other Builtins.     (line    6)
+* sincos:                                Other Builtins.     (line    6)
+* sincosf:                               Other Builtins.     (line    6)
+* sincosl:                               Other Builtins.     (line    6)
+* sinf:                                  Other Builtins.     (line    6)
+* sinh:                                  Other Builtins.     (line    6)
+* sinhf:                                 Other Builtins.     (line    6)
+* sinhl:                                 Other Builtins.     (line    6)
+* sinl:                                  Other Builtins.     (line    6)
+* sizeof:                                Typeof.             (line    6)
+* smaller data references:               M32R/D Options.     (line   57)
+* smaller data references (PowerPC):     RS/6000 and PowerPC Options.
+                                                             (line  703)
+* snprintf:                              Other Builtins.     (line    6)
+* Solaris 2 options:                     Solaris 2 Options.  (line    6)
+* SPARC options:                         SPARC Options.      (line    6)
+* Spec Files:                            Spec Files.         (line    6)
+* specified registers:                   Explicit Reg Vars.  (line    6)
+* specifying compiler version and target machine: Target Options.
+                                                             (line    6)
+* specifying hardware config:            Submodel Options.   (line    6)
+* specifying machine version:            Target Options.     (line    6)
+* specifying registers for local variables: Local Reg Vars.  (line    6)
+* speed of compilation:                  Precompiled Headers.
+                                                             (line    6)
+* sprintf:                               Other Builtins.     (line    6)
+* SPU options:                           SPU Options.        (line    6)
+* sqrt:                                  Other Builtins.     (line    6)
+* sqrtf:                                 Other Builtins.     (line    6)
+* sqrtl:                                 Other Builtins.     (line    6)
+* sscanf:                                Other Builtins.     (line    6)
+* sscanf, and constant strings:          Incompatibilities.  (line   17)
+* sseregparm attribute:                  Function Attributes.
+                                                             (line 1129)
+* statements inside expressions:         Statement Exprs.    (line    6)
+* static data in C++, declaring and defining: Static Definitions.
+                                                             (line    6)
+* stpcpy:                                Other Builtins.     (line    6)
+* stpncpy:                               Other Builtins.     (line    6)
+* strcasecmp:                            Other Builtins.     (line    6)
+* strcat:                                Other Builtins.     (line    6)
+* strchr:                                Other Builtins.     (line    6)
+* strcmp:                                Other Builtins.     (line    6)
+* strcpy:                                Other Builtins.     (line    6)
+* strcspn:                               Other Builtins.     (line    6)
+* strdup:                                Other Builtins.     (line    6)
+* strfmon:                               Other Builtins.     (line    6)
+* strftime:                              Other Builtins.     (line    6)
+* string constants:                      Incompatibilities.  (line    9)
+* strlen:                                Other Builtins.     (line    6)
+* strncasecmp:                           Other Builtins.     (line    6)
+* strncat:                               Other Builtins.     (line    6)
+* strncmp:                               Other Builtins.     (line    6)
+* strncpy:                               Other Builtins.     (line    6)
+* strndup:                               Other Builtins.     (line    6)
+* strpbrk:                               Other Builtins.     (line    6)
+* strrchr:                               Other Builtins.     (line    6)
+* strspn:                                Other Builtins.     (line    6)
+* strstr:                                Other Builtins.     (line    6)
+* struct:                                Unnamed Fields.     (line    6)
+* structures:                            Incompatibilities.  (line  146)
+* structures, constructor expression:    Compound Literals.  (line    6)
+* submodel options:                      Submodel Options.   (line    6)
+* subscripting:                          Subscripting.       (line    6)
+* subscripting and function values:      Subscripting.       (line    6)
+* suffixes for C++ source:               Invoking G++.       (line    6)
+* SUNPRO_DEPENDENCIES:                   Environment Variables.
+                                                             (line  169)
+* suppressing warnings:                  Warning Options.    (line    6)
+* surprises in C++:                      C++ Misunderstandings.
+                                                             (line    6)
+* syntax checking:                       Warning Options.    (line   13)
+* syscall_linkage attribute:             Function Attributes.
+                                                             (line 1249)
+* system headers, warnings from:         Warning Options.    (line  796)
+* sysv_abi attribute:                    Function Attributes.
+                                                             (line  835)
+* tan:                                   Other Builtins.     (line    6)
+* tanf:                                  Other Builtins.     (line    6)
+* tanh:                                  Other Builtins.     (line    6)
+* tanhf:                                 Other Builtins.     (line    6)
+* tanhl:                                 Other Builtins.     (line    6)
+* tanl:                                  Other Builtins.     (line    6)
+* target function attribute:             Function Attributes.
+                                                             (line 1256)
+* target machine, specifying:            Target Options.     (line    6)
+* target options:                        Target Options.     (line    6)
+* target("abm") attribute:               Function Attributes.
+                                                             (line 1283)
+* target("aes") attribute:               Function Attributes.
+                                                             (line 1288)
+* target("align-stringops") attribute:   Function Attributes.
+                                                             (line 1378)
+* target("altivec") attribute:           Function Attributes.
+                                                             (line 1404)
+* target("arch=ARCH") attribute:         Function Attributes.
+                                                             (line 1387)
+* target("avoid-indexed-addresses") attribute: Function Attributes.
+                                                             (line 1524)
+* target("cld") attribute:               Function Attributes.
+                                                             (line 1349)
+* target("cmpb") attribute:              Function Attributes.
+                                                             (line 1410)
+* target("cpu=CPU") attribute:           Function Attributes.
+                                                             (line 1539)
+* target("dlmzb") attribute:             Function Attributes.
+                                                             (line 1416)
+* target("fancy-math-387") attribute:    Function Attributes.
+                                                             (line 1353)
+* target("fma4") attribute:              Function Attributes.
+                                                             (line 1333)
+* target("fpmath=FPMATH") attribute:     Function Attributes.
+                                                             (line 1395)
+* target("fprnd") attribute:             Function Attributes.
+                                                             (line 1423)
+* target("friz") attribute:              Function Attributes.
+                                                             (line 1515)
+* target("fused-madd") attribute:        Function Attributes.
+                                                             (line 1358)
+* target("hard-dfp") attribute:          Function Attributes.
+                                                             (line 1429)
+* target("ieee-fp") attribute:           Function Attributes.
+                                                             (line 1363)
+* target("inline-all-stringops") attribute: Function Attributes.
+                                                             (line 1368)
+* target("inline-stringops-dynamically") attribute: Function Attributes.
+                                                             (line 1372)
+* target("isel") attribute:              Function Attributes.
+                                                             (line 1434)
+* target("longcall") attribute:          Function Attributes.
+                                                             (line 1534)
+* target("lwp") attribute:               Function Attributes.
+                                                             (line 1341)
+* target("mfcrf") attribute:             Function Attributes.
+                                                             (line 1438)
+* target("mfpgpr") attribute:            Function Attributes.
+                                                             (line 1445)
+* target("mmx") attribute:               Function Attributes.
+                                                             (line 1292)
+* target("mulhw") attribute:             Function Attributes.
+                                                             (line 1452)
+* target("multiple") attribute:          Function Attributes.
+                                                             (line 1459)
+* target("paired") attribute:            Function Attributes.
+                                                             (line 1529)
+* target("pclmul") attribute:            Function Attributes.
+                                                             (line 1296)
+* target("popcnt") attribute:            Function Attributes.
+                                                             (line 1300)
+* target("popcntb") attribute:           Function Attributes.
+                                                             (line 1470)
+* target("popcntd") attribute:           Function Attributes.
+                                                             (line 1477)
+* target("powerpc-gfxopt") attribute:    Function Attributes.
+                                                             (line 1483)
+* target("powerpc-gpopt") attribute:     Function Attributes.
+                                                             (line 1489)
+* target("recip") attribute:             Function Attributes.
+                                                             (line 1382)
+* target("recip-precision") attribute:   Function Attributes.
+                                                             (line 1495)
+* target("sse") attribute:               Function Attributes.
+                                                             (line 1304)
+* target("sse2") attribute:              Function Attributes.
+                                                             (line 1308)
+* target("sse3") attribute:              Function Attributes.
+                                                             (line 1312)
+* target("sse4") attribute:              Function Attributes.
+                                                             (line 1316)
+* target("sse4.1") attribute:            Function Attributes.
+                                                             (line 1321)
+* target("sse4.2") attribute:            Function Attributes.
+                                                             (line 1325)
+* target("sse4a") attribute:             Function Attributes.
+                                                             (line 1329)
+* target("ssse3") attribute:             Function Attributes.
+                                                             (line 1345)
+* target("string") attribute:            Function Attributes.
+                                                             (line 1501)
+* target("tune=TUNE") attribute:         Function Attributes.
+                                                             (line 1391)
+* target("update") attribute:            Function Attributes.
+                                                             (line 1464)
+* target("vsx") attribute:               Function Attributes.
+                                                             (line 1507)
+* target("xop") attribute:               Function Attributes.
+                                                             (line 1337)
+* TC1:                                   Standards.          (line   13)
+* TC2:                                   Standards.          (line   13)
+* TC3:                                   Standards.          (line   13)
+* Technical Corrigenda:                  Standards.          (line   13)
+* Technical Corrigendum 1:               Standards.          (line   13)
+* Technical Corrigendum 2:               Standards.          (line   13)
+* Technical Corrigendum 3:               Standards.          (line   13)
+* template instantiation:                Template Instantiation.
+                                                             (line    6)
+* temporaries, lifetime of:              Temporaries.        (line    6)
+* tgamma:                                Other Builtins.     (line    6)
+* tgammaf:                               Other Builtins.     (line    6)
+* tgammal:                               Other Builtins.     (line    6)
+* Thread-Local Storage:                  Thread-Local.       (line    6)
+* thunks:                                Nested Functions.   (line    6)
+* tiny data section on the H8/300H and H8S: Function Attributes.
+                                                             (line 1568)
+* TLS:                                   Thread-Local.       (line    6)
+* tls_model attribute:                   Variable Attributes.
+                                                             (line  235)
+* TMPDIR:                                Environment Variables.
+                                                             (line   45)
+* toascii:                               Other Builtins.     (line    6)
+* tolower:                               Other Builtins.     (line    6)
+* toupper:                               Other Builtins.     (line    6)
+* towlower:                              Other Builtins.     (line    6)
+* towupper:                              Other Builtins.     (line    6)
+* traditional C language:                C Dialect Options.  (line  282)
+* trunc:                                 Other Builtins.     (line    6)
+* truncf:                                Other Builtins.     (line    6)
+* truncl:                                Other Builtins.     (line    6)
+* two-stage name lookup:                 Name lookup.        (line    6)
+* type alignment:                        Alignment.          (line    6)
+* type attributes:                       Type Attributes.    (line    6)
+* type_info:                             Vague Linkage.      (line   43)
+* typedef names as function parameters:  Incompatibilities.  (line   97)
+* typeof:                                Typeof.             (line    6)
+* UHK fixed-suffix:                      Fixed-Point.        (line    6)
+* uhk fixed-suffix:                      Fixed-Point.        (line    6)
+* UHR fixed-suffix:                      Fixed-Point.        (line    6)
+* uhr fixed-suffix:                      Fixed-Point.        (line    6)
+* UK fixed-suffix:                       Fixed-Point.        (line    6)
+* uk fixed-suffix:                       Fixed-Point.        (line    6)
+* ULK fixed-suffix:                      Fixed-Point.        (line    6)
+* ulk fixed-suffix:                      Fixed-Point.        (line    6)
+* ULL integer suffix:                    Long Long.          (line    6)
+* ULLK fixed-suffix:                     Fixed-Point.        (line    6)
+* ullk fixed-suffix:                     Fixed-Point.        (line    6)
+* ULLR fixed-suffix:                     Fixed-Point.        (line    6)
+* ullr fixed-suffix:                     Fixed-Point.        (line    6)
+* ULR fixed-suffix:                      Fixed-Point.        (line    6)
+* ulr fixed-suffix:                      Fixed-Point.        (line    6)
+* undefined behavior:                    Bug Criteria.       (line   17)
+* undefined function value:              Bug Criteria.       (line   17)
+* underscores in variables in macros:    Typeof.             (line   46)
+* union:                                 Unnamed Fields.     (line    6)
+* union, casting to a:                   Cast to Union.      (line    6)
+* unions:                                Incompatibilities.  (line  146)
+* unknown pragmas, warning:              Warning Options.    (line  664)
+* unresolved references and -nodefaultlibs: Link Options.    (line   82)
+* unresolved references and -nostdlib:   Link Options.       (line   82)
+* unused attribute.:                     Function Attributes.
+                                                             (line 1580)
+* UR fixed-suffix:                       Fixed-Point.        (line    6)
+* ur fixed-suffix:                       Fixed-Point.        (line    6)
+* use_debug_exception_return attribute:  Function Attributes.
+                                                             (line  629)
+* use_shadow_register_set attribute:     Function Attributes.
+                                                             (line  620)
+* used attribute.:                       Function Attributes.
+                                                             (line 1585)
+* User stack pointer in interrupts on the Blackfin: Function Attributes.
+                                                             (line  707)
+* V in constraint:                       Simple Constraints. (line   43)
+* V850 Options:                          V850 Options.       (line    6)
+* vague linkage:                         Vague Linkage.      (line    6)
+* value after longjmp:                   Global Reg Vars.    (line   66)
+* variable addressability on the IA-64:  Function Attributes.
+                                                             (line  807)
+* variable addressability on the M32R/D: Variable Attributes.
+                                                             (line  348)
+* variable alignment:                    Alignment.          (line    6)
+* variable attributes:                   Variable Attributes.
+                                                             (line    6)
+* variable number of arguments:          Variadic Macros.    (line    6)
+* variable-length array scope:           Variable Length.    (line   22)
+* variable-length arrays:                Variable Length.    (line    6)
+* variables in specified registers:      Explicit Reg Vars.  (line    6)
+* variables, local, in macros:           Typeof.             (line   46)
+* variadic macros:                       Variadic Macros.    (line    6)
+* VAX options:                           VAX Options.        (line    6)
+* version_id attribute:                  Function Attributes.
+                                                             (line 1591)
+* vfprintf:                              Other Builtins.     (line    6)
+* vfscanf:                               Other Builtins.     (line    6)
+* visibility attribute:                  Function Attributes.
+                                                             (line 1601)
+* VLAs:                                  Variable Length.    (line    6)
+* vliw attribute:                        Function Attributes.
+                                                             (line 1695)
+* void pointers, arithmetic:             Pointer Arith.      (line    6)
+* void, size of pointer to:              Pointer Arith.      (line    6)
+* volatile access <1>:                   C++ Volatiles.      (line    6)
+* volatile access:                       Volatiles.          (line    6)
+* volatile applied to function:          Function Attributes.
+                                                             (line    6)
+* volatile read <1>:                     C++ Volatiles.      (line    6)
+* volatile read:                         Volatiles.          (line    6)
+* volatile write <1>:                    C++ Volatiles.      (line    6)
+* volatile write:                        Volatiles.          (line    6)
+* vprintf:                               Other Builtins.     (line    6)
+* vscanf:                                Other Builtins.     (line    6)
+* vsnprintf:                             Other Builtins.     (line    6)
+* vsprintf:                              Other Builtins.     (line    6)
+* vsscanf:                               Other Builtins.     (line    6)
+* vtable:                                Vague Linkage.      (line   28)
+* VxWorks Options:                       VxWorks Options.    (line    6)
+* W floating point suffix:               Floating Types.     (line    6)
+* w floating point suffix:               Floating Types.     (line    6)
+* warn_unused_result attribute:          Function Attributes.
+                                                             (line 1701)
+* warning for comparison of signed and unsigned values: Warning Options.
+                                                             (line 1074)
+* warning for overloaded virtual function: C++ Dialect Options.
+                                                             (line  538)
+* warning for reordering of member initializers: C++ Dialect Options.
+                                                             (line  463)
+* warning for unknown pragmas:           Warning Options.    (line  664)
+* warning function attribute:            Function Attributes.
+                                                             (line  165)
+* warning messages:                      Warning Options.    (line    6)
+* warnings from system headers:          Warning Options.    (line  796)
+* warnings vs errors:                    Warnings and Errors.
+                                                             (line    6)
+* weak attribute:                        Function Attributes.
+                                                             (line 1718)
+* weakref attribute:                     Function Attributes.
+                                                             (line 1727)
+* whitespace:                            Incompatibilities.  (line  112)
+* X in constraint:                       Simple Constraints. (line  124)
+* X3.159-1989:                           Standards.          (line   13)
+* x86-64 options:                        x86-64 Options.     (line    6)
+* x86-64 Options:                        i386 and x86-64 Options.
+                                                             (line    6)
+* Xstormy16 Options:                     Xstormy16 Options.  (line    6)
+* Xtensa Options:                        Xtensa Options.     (line    6)
+* y0:                                    Other Builtins.     (line    6)
+* y0f:                                   Other Builtins.     (line    6)
+* y0l:                                   Other Builtins.     (line    6)
+* y1:                                    Other Builtins.     (line    6)
+* y1f:                                   Other Builtins.     (line    6)
+* y1l:                                   Other Builtins.     (line    6)
+* yn:                                    Other Builtins.     (line    6)
+* ynf:                                   Other Builtins.     (line    6)
+* ynl:                                   Other Builtins.     (line    6)
+* zero-length arrays:                    Zero Length.        (line    6)
+* zero-size structures:                  Empty Structures.   (line    6)
+* zSeries options:                       zSeries Options.    (line    6)
+
+
+
+Tag Table:
+Node: Top2095
+Node: G++ and GCC3861
+Node: Standards5930
+Node: Invoking GCC18097
+Node: Option Summary21848
+Node: Overall Options58577
+Node: Invoking G++72913
+Node: C Dialect Options74436
+Node: C++ Dialect Options89516
+Node: Objective-C and Objective-C++ Dialect Options114516
+Node: Language Independent Options125055
+Node: Warning Options127979
+Node: Debugging Options191645
+Node: Optimize Options239454
+Ref: Type-punning295492
+Node: Preprocessor Options367866
+Ref: Wtrigraphs371964
+Ref: dashMF376712
+Ref: fdollars-in-identifiers387556
+Node: Assembler Options396117
+Node: Link Options396822
+Ref: Link Options-Footnote-1407180
+Node: Directory Options407514
+Node: Spec Files413803
+Node: Target Options435399
+Node: Submodel Options435798
+Node: ARC Options437417
+Node: ARM Options438607
+Node: AVR Options452338
+Node: Blackfin Options457916
+Node: CRIS Options465864
+Node: CRX Options469605
+Node: Darwin Options470030
+Node: DEC Alpha Options477522
+Node: DEC Alpha/VMS Options489438
+Node: FR30 Options490012
+Node: FRV Options490587
+Node: GNU/Linux Options497304
+Node: H8/300 Options498565
+Node: HPPA Options499632
+Node: i386 and x86-64 Options509132
+Node: i386 and x86-64 Windows Options540439
+Node: IA-64 Options542987
+Node: IA-64/VMS Options551005
+Node: LM32 Options551560
+Node: M32C Options552089
+Node: M32R/D Options553379
+Node: M680x0 Options556966
+Node: M68hc1x Options570973
+Node: MCore Options572542
+Node: MeP Options574049
+Node: MicroBlaze Options578022
+Node: MIPS Options580593
+Node: MMIX Options608513
+Node: MN10300 Options610995
+Node: PDP-11 Options613203
+Node: picoChip Options614897
+Node: PowerPC Options617096
+Node: RS/6000 and PowerPC Options617332
+Node: RX Options654074
+Node: S/390 and zSeries Options659646
+Node: Score Options667577
+Node: SH Options668405
+Node: Solaris 2 Options679658
+Node: SPARC Options681178
+Node: SPU Options690996
+Node: System V Options696000
+Node: V850 Options696823
+Node: VAX Options700402
+Node: VxWorks Options700950
+Node: x86-64 Options702105
+Node: Xstormy16 Options702323
+Node: Xtensa Options702612
+Node: zSeries Options706946
+Node: Code Gen Options707142
+Node: Environment Variables733573
+Node: Precompiled Headers741469
+Node: C Implementation747668
+Node: Translation implementation749331
+Node: Environment implementation749905
+Node: Identifiers implementation750455
+Node: Characters implementation751509
+Node: Integers implementation754315
+Node: Floating point implementation756140
+Node: Arrays and pointers implementation759069
+Ref: Arrays and pointers implementation-Footnote-1760504
+Node: Hints implementation760628
+Node: Structures unions enumerations and bit-fields implementation762094
+Node: Qualifiers implementation764080
+Node: Declarators implementation765852
+Node: Statements implementation766194
+Node: Preprocessing directives implementation766521
+Node: Library functions implementation768626
+Node: Architecture implementation769266
+Node: Locale-specific behavior implementation769969
+Node: C++ Implementation770274
+Node: Conditionally-supported behavior771554
+Node: Exception handling772064
+Node: C Extensions772473
+Node: Statement Exprs777308
+Node: Local Labels781821
+Node: Labels as Values784800
+Ref: Labels as Values-Footnote-1787209
+Node: Nested Functions787392
+Node: Constructing Calls791325
+Node: Typeof796056
+Node: Conditionals799371
+Node: __int128800262
+Node: Long Long800782
+Node: Complex802284
+Node: Floating Types804855
+Node: Half-Precision805993
+Node: Decimal Float808175
+Node: Hex Floats810042
+Node: Fixed-Point811083
+Node: Named Address Spaces814377
+Node: Zero Length815676
+Node: Empty Structures818963
+Node: Variable Length819379
+Node: Variadic Macros822032
+Node: Escaped Newlines824414
+Node: Subscripting825253
+Node: Pointer Arith825976
+Node: Initializers826544
+Node: Compound Literals827040
+Node: Designated Inits829215
+Node: Case Ranges832870
+Node: Cast to Union833553
+Node: Mixed Declarations834649
+Node: Function Attributes835155
+Node: Attribute Syntax916135
+Node: Function Prototypes926581
+Node: C++ Comments928362
+Node: Dollar Signs928881
+Node: Character Escapes929346
+Node: Variable Attributes929640
+Ref: MeP Variable Attributes944966
+Ref: i386 Variable Attributes946927
+Node: Type Attributes952620
+Ref: MeP Type Attributes966361
+Ref: i386 Type Attributes966635
+Ref: PowerPC Type Attributes967475
+Ref: SPU Type Attributes968337
+Node: Alignment968628
+Node: Inline970002
+Node: Volatiles974986
+Node: Extended Asm977881
+Ref: Example of asm with clobbered asm reg983970
+Ref: Extended asm with goto993737
+Node: Constraints1001472
+Node: Simple Constraints1002556
+Node: Multi-Alternative1009877
+Node: Modifiers1011594
+Node: Machine Constraints1014488
+Node: Asm Labels1053132
+Node: Explicit Reg Vars1054808
+Node: Global Reg Vars1056416
+Node: Local Reg Vars1060966
+Node: Alternate Keywords1063407
+Node: Incomplete Enums1064893
+Node: Function Names1065650
+Node: Return Address1067812
+Node: Vector Extensions1071365
+Node: Offsetof1075771
+Node: Atomic Builtins1076585
+Node: Object Size Checking1081963
+Node: Other Builtins1087391
+Node: Target Builtins1114071
+Node: Alpha Built-in Functions1114995
+Node: ARM iWMMXt Built-in Functions1117994
+Node: ARM NEON Intrinsics1124713
+Node: Blackfin Built-in Functions1330913
+Node: FR-V Built-in Functions1331527
+Node: Argument Types1332386
+Node: Directly-mapped Integer Functions1334142
+Node: Directly-mapped Media Functions1335224
+Node: Raw read/write Functions1342256
+Node: Other Built-in Functions1343168
+Node: X86 Built-in Functions1344357
+Node: MIPS DSP Built-in Functions1389493
+Node: MIPS Paired-Single Support1401940
+Node: MIPS Loongson Built-in Functions1403441
+Node: Paired-Single Arithmetic1409959
+Node: Paired-Single Built-in Functions1410905
+Node: MIPS-3D Built-in Functions1413575
+Node: picoChip Built-in Functions1418950
+Node: Other MIPS Built-in Functions1420316
+Node: PowerPC AltiVec/VSX Built-in Functions1420840
+Node: RX Built-in Functions1531498
+Node: SPARC VIS Built-in Functions1535508
+Node: SPU Built-in Functions1537187
+Node: Target Format Checks1538969
+Node: Solaris Format Checks1539401
+Node: Darwin Format Checks1539827
+Node: Pragmas1540654
+Node: ARM Pragmas1541364
+Node: M32C Pragmas1541967
+Node: MeP Pragmas1543041
+Node: RS/6000 and PowerPC Pragmas1545110
+Node: Darwin Pragmas1545851
+Node: Solaris Pragmas1546918
+Node: Symbol-Renaming Pragmas1548079
+Node: Structure-Packing Pragmas1550713
+Node: Weak Pragmas1552363
+Node: Diagnostic Pragmas1553097
+Node: Visibility Pragmas1556125
+Node: Push/Pop Macro Pragmas1556877
+Node: Function Specific Option Pragmas1557850
+Node: Unnamed Fields1560114
+Node: Thread-Local1562352
+Node: C99 Thread-Local Edits1564459
+Node: C++98 Thread-Local Edits1566471
+Node: Binary constants1569916
+Node: C++ Extensions1570587
+Node: C++ Volatiles1572235
+Node: Restricted Pointers1574595
+Node: Vague Linkage1576193
+Node: C++ Interface1579855
+Ref: C++ Interface-Footnote-11584152
+Node: Template Instantiation1584289
+Node: Bound member functions1591301
+Node: C++ Attributes1592844
+Node: Namespace Association1594502
+Node: Type Traits1595916
+Node: Java Exceptions1602271
+Node: Deprecated Features1603668
+Node: Backwards Compatibility1606633
+Node: Objective-C1607991
+Node: GNU Objective-C runtime API1608600
+Node: Modern GNU Objective-C runtime API1609607
+Node: Traditional GNU Objective-C runtime API1612044
+Node: Executing code before main1613666
+Node: What you can and what you cannot do in +load1616404
+Node: Type encoding1618794
+Node: Legacy type encoding1623870
+Node: @encode1624961
+Node: Method signatures1625502
+Node: Garbage Collection1627497
+Node: Constant string objects1630131
+Node: compatibility_alias1632639
+Node: Exceptions1633361
+Node: Synchronization1636072
+Node: Fast enumeration1637256
+Node: Using fast enumeration1637568
+Node: c99-like fast enumeration syntax1638779
+Node: Fast enumeration details1639482
+Node: Fast enumeration protocol1641823
+Node: Messaging with the GNU Objective-C runtime1644975
+Node: Dynamically registering methods1646346
+Node: Forwarding hook1648037
+Node: Compatibility1651076
+Node: Gcov1657643
+Node: Gcov Intro1658176
+Node: Invoking Gcov1660894
+Node: Gcov and Optimization1672834
+Node: Gcov Data Files1675489
+Node: Cross-profiling1676629
+Node: Trouble1678480
+Node: Actual Bugs1679965
+Node: Cross-Compiler Problems1680421
+Node: Interoperation1680835
+Node: Incompatibilities1687972
+Node: Fixed Headers1696123
+Node: Standard Libraries1697786
+Node: Disappointments1699158
+Node: C++ Misunderstandings1703516
+Node: Static Definitions1704327
+Node: Name lookup1705380
+Ref: Name lookup-Footnote-11710158
+Node: Temporaries1710345
+Node: Copy Assignment1712321
+Node: Non-bugs1714128
+Node: Warnings and Errors1724635
+Node: Bugs1726399
+Node: Bug Criteria1726963
+Node: Bug Reporting1729173
+Node: Service1729394
+Node: Contributing1730213
+Node: Funding1730953
+Node: GNU Project1733442
+Node: Copying1734088
+Node: GNU Free Documentation License1771616
+Node: Contributors1796753
+Node: Option Index1833622
+Node: Keyword Index2010711
+
+End Tag Table
diff --git a/gcc/doc/gcc.texi b/gcc/doc/gcc.texi
new file mode 100644
index 000000000..0e167bae0
--- /dev/null
+++ b/gcc/doc/gcc.texi
@@ -0,0 +1,209 @@
+\input texinfo  @c -*-texinfo-*-
+@c %**start of header
+@setfilename gcc.info
+@c INTERNALS is used by md.texi to determine whether to include the
+@c whole of that file, in the internals manual, or only the part
+@c dealing with constraints, in the user manual.
+@clear INTERNALS
+
+@c NOTE: checks/things to do:
+@c
+@c -have bob do a search in all seven files for "mew" (ideally --mew,
+@c  but i may have forgotten the occasional "--"..).
+@c     Just checked... all have `--'!  Bob 22Jul96
+@c     Use this to search:   grep -n '\-\-mew' *.texi
+@c -item/itemx, text after all (sub/sub)section titles, etc..
+@c -consider putting the lists of options on pp 17--> etc in columns or
+@c  some such.
+@c -overfulls.  do a search for "mew" in the files, and you will see
+@c   overfulls that i noted but could not deal with.
+@c -have to add text:  beginning of chapter 8
+
+@c
+@c anything else?                       --mew 10feb93
+
+@include gcc-common.texi
+
+@settitle Using the GNU Compiler Collection (GCC)
+
+@c Create a separate index for command line options.
+@defcodeindex op
+@c Merge the standard indexes into a single one.
+@syncodeindex fn cp
+@syncodeindex vr cp
+@syncodeindex ky cp
+@syncodeindex pg cp
+@syncodeindex tp cp
+
+@paragraphindent 1
+
+@c %**end of header
+
+@copying
+Copyright @copyright{} 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
+1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
+2010 Free Software Foundation, Inc.
+
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being ``Funding Free Software'', the Front-Cover
+Texts being (a) (see below), and with the Back-Cover Texts being (b)
+(see below).  A copy of the license is included in the section entitled
+``GNU Free Documentation License''.
+
+(a) The FSF's Front-Cover Text is:
+
+     A GNU Manual
+
+(b) The FSF's Back-Cover Text is:
+
+     You have freedom to copy and modify this GNU Manual, like GNU
+     software.  Copies published by the Free Software Foundation raise
+     funds for GNU development.
+@end copying
+@ifnottex
+@dircategory Software development
+@direntry
+* gcc: (gcc).                  The GNU Compiler Collection.
+* g++: (gcc).                  The GNU C++ compiler.
+@end direntry
+This file documents the use of the GNU compilers.
+@sp 1
+@insertcopying
+@sp 1
+@end ifnottex
+
+@setchapternewpage odd
+@titlepage
+@title Using the GNU Compiler Collection
+@versionsubtitle
+@author Richard M. Stallman and the @sc{GCC} Developer Community
+@page
+@vskip 0pt plus 1filll
+Published by:
+@multitable @columnfractions 0.5 0.5
+@item GNU Press
+@tab Website: www.gnupress.org
+@item a division of the
+@tab General: @tex press@@gnu.org @end tex
+@item Free Software Foundation
+@tab Orders:  @tex sales@@gnu.org @end tex
+@item 51 Franklin Street, Fifth Floor
+@tab Tel 617-542-5942
+@item Boston, MA 02110-1301 USA
+@tab Fax 617-542-2652
+@end multitable
+@sp 2
+@ifset FSFPRINT
+@c Update this ISBN when printing a new edition.
+@acronym{ISBN} 1-882114-39-6
+
+Cover art by Gary M. Torrisi.  Cover design by Jonathan Richard.
+@end ifset
+@ifclear FSFPRINT
+Last printed October 2003 for GCC 3.3.1.@*
+Printed copies are available for $45 each.
+@end ifclear
+@sp 1
+@insertcopying
+@end titlepage
+@summarycontents
+@contents
+@page
+
+@node Top, G++ and GCC,, (DIR)
+@top Introduction
+@cindex introduction
+
+This manual documents how to use the GNU compilers,
+as well as their features and incompatibilities, and how to report
+bugs.  It corresponds to the compilers
+@ifset VERSION_PACKAGE
+@value{VERSION_PACKAGE}
+@end ifset
+version @value{version-GCC}.
+The internals of the GNU compilers, including how to port them to new
+targets and some information about how to write front ends for new
+languages, are documented in a separate manual.  @xref{Top,,
+Introduction, gccint, GNU Compiler Collection (GCC) Internals}.
+
+@menu
+* G++ and GCC::     You can compile C or C++ programs.
+* Standards::       Language standards supported by GCC.
+* Invoking GCC::    Command options supported by @samp{gcc}.
+* C Implementation:: How GCC implements the ISO C specification.
+* C Extensions::    GNU extensions to the C language family.
+* C++ Implementation:: How GCC implements the ISO C++ specification.
+* C++ Extensions::  GNU extensions to the C++ language.
+* Objective-C::     GNU Objective-C runtime features.
+* Compatibility::   Binary Compatibility
+* Gcov::            @command{gcov}---a test coverage program.
+* Trouble::         If you have trouble using GCC.
+* Bugs::            How, why and where to report bugs.
+* Service::         How to find suppliers of support for GCC.
+* Contributing::    How to contribute to testing and developing GCC.
+
+* Funding::         How to help assure funding for free software.
+* GNU Project::     The GNU Project and GNU/Linux.
+
+* Copying::         GNU General Public License says
+                    how you can copy and share GCC.
+* GNU Free Documentation License:: How you can copy and share this manual.
+* Contributors::    People who have contributed to GCC.
+
+* Option Index::    Index to command line options.
+* Keyword Index::   Index of concepts and symbol names.
+@end menu
+
+@include frontends.texi
+@include standards.texi
+@include invoke.texi
+@include implement-c.texi
+@include implement-cxx.texi
+@include extend.texi
+@include objc.texi
+@include compat.texi
+@include gcov.texi
+@include trouble.texi
+@include bugreport.texi
+@include service.texi
+@include contribute.texi
+
+@include funding.texi
+@include gnu.texi
+@include gpl_v3.texi
+
+@c ---------------------------------------------------------------------
+@c GFDL
+@c ---------------------------------------------------------------------
+
+@include fdl.texi
+
+@include contrib.texi
+
+@c ---------------------------------------------------------------------
+@c Indexes
+@c ---------------------------------------------------------------------
+
+@node Option Index
+@unnumbered Option Index
+
+GCC's command line options are indexed here without any initial @samp{-}
+or @samp{--}.  Where an option has both positive and negative forms
+(such as @option{-f@var{option}} and @option{-fno-@var{option}}),
+relevant entries in the manual are indexed under the most appropriate
+form; it may sometimes be useful to look up both forms.
+
+@printindex op
+
+@node Keyword Index
+@unnumbered Keyword Index
+
+@printindex cp
+
+@c ---------------------------------------------------------------------
+@c Epilogue
+@c ---------------------------------------------------------------------
+
+@bye
diff --git a/gcc/doc/gccinstall.info b/gcc/doc/gccinstall.info
new file mode 100644
index 000000000..d178d36e0
--- /dev/null
+++ b/gcc/doc/gccinstall.info
@@ -0,0 +1,4621 @@
+This is doc/gccinstall.info, produced by makeinfo version 4.13 from
+/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/doc/install.texi.
+
+Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+Free Software Foundation, Inc.
+
+   Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, the Front-Cover texts being (a) (see below), and
+with the Back-Cover Texts being (b) (see below).  A copy of the license
+is included in the section entitled "GNU Free Documentation License".
+
+   (a) The FSF's Front-Cover Text is:
+
+   A GNU Manual
+
+   (b) The FSF's Back-Cover Text is:
+
+   You have freedom to copy and modify this GNU Manual, like GNU
+software.  Copies published by the Free Software Foundation raise
+funds for GNU development.
+
+   Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+Free Software Foundation, Inc.
+
+   Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, the Front-Cover texts being (a) (see below), and
+with the Back-Cover Texts being (b) (see below).  A copy of the license
+is included in the section entitled "GNU Free Documentation License".
+
+   (a) The FSF's Front-Cover Text is:
+
+   A GNU Manual
+
+   (b) The FSF's Back-Cover Text is:
+
+   You have freedom to copy and modify this GNU Manual, like GNU
+software.  Copies published by the Free Software Foundation raise
+funds for GNU development.
+
+INFO-DIR-SECTION Software development
+START-INFO-DIR-ENTRY
+* gccinstall: (gccinstall).    Installing the GNU Compiler Collection.
+END-INFO-DIR-ENTRY
+
+
+File: gccinstall.info,  Node: Top,  Up: (dir)
+
+* Menu:
+
+* Installing GCC::  This document describes the generic installation
+                    procedure for GCC as well as detailing some target
+                    specific installation instructions.
+
+* Specific::        Host/target specific installation notes for GCC.
+* Binaries::        Where to get pre-compiled binaries.
+
+* Old::             Old installation documentation.
+
+* GNU Free Documentation License:: How you can copy and share this manual.
+* Concept Index::   This index has two entries.
+
+
+File: gccinstall.info,  Node: Installing GCC,  Next: Binaries,  Up: Top
+
+1 Installing GCC
+****************
+
+   The latest version of this document is always available at
+http://gcc.gnu.org/install/.
+
+   This document describes the generic installation procedure for GCC
+as well as detailing some target specific installation instructions.
+
+   GCC includes several components that previously were separate
+distributions with their own installation instructions.  This document
+supersedes all package specific installation instructions.
+
+   _Before_ starting the build/install procedure please check the *note
+host/target specific installation notes: Specific.  We recommend you
+browse the entire generic installation instructions before you proceed.
+
+   Lists of successful builds for released versions of GCC are
+available at `http://gcc.gnu.org/buildstat.html'.  These lists are
+updated as new information becomes available.
+
+   The installation procedure itself is broken into five steps.
+
+* Menu:
+
+* Prerequisites::
+* Downloading the source::
+* Configuration::
+* Building::
+* Testing:: (optional)
+* Final install::
+
+   Please note that GCC does not support `make uninstall' and probably
+won't do so in the near future as this would open a can of worms.
+Instead, we suggest that you install GCC into a directory of its own
+and simply remove that directory when you do not need that specific
+version of GCC any longer, and, if shared libraries are installed there
+as well, no more binaries exist that use them.
+
+
+File: gccinstall.info,  Node: Prerequisites,  Next: Downloading the source,  Up: Installing GCC
+
+2 Prerequisites
+***************
+
+   GCC requires that various tools and packages be available for use in
+the build procedure.  Modifying GCC sources requires additional tools
+described below.
+
+Tools/packages necessary for building GCC
+=========================================
+
+ISO C90 compiler
+     Necessary to bootstrap GCC, although versions of GCC prior to 3.4
+     also allow bootstrapping with a traditional (K&R) C compiler.
+
+     To build all languages in a cross-compiler or other configuration
+     where 3-stage bootstrap is not performed, you need to start with
+     an existing GCC binary (version 2.95 or later) because source code
+     for language frontends other than C might use GCC extensions.
+
+GNAT
+     In order to build the Ada compiler (GNAT) you must already have
+     GNAT installed because portions of the Ada frontend are written in
+     Ada (with GNAT extensions.)  Refer to the Ada installation
+     instructions for more specific information.
+
+A "working" POSIX compatible shell, or GNU bash
+     Necessary when running `configure' because some `/bin/sh' shells
+     have bugs and may crash when configuring the target libraries.  In
+     other cases, `/bin/sh' or `ksh' have disastrous corner-case
+     performance problems.  This can cause target `configure' runs to
+     literally take days to complete in some cases.
+
+     So on some platforms `/bin/ksh' is sufficient, on others it isn't.
+     See the host/target specific instructions for your platform, or
+     use `bash' to be sure.  Then set `CONFIG_SHELL' in your
+     environment to your "good" shell prior to running
+     `configure'/`make'.
+
+     `zsh' is not a fully compliant POSIX shell and will not work when
+     configuring GCC.
+
+A POSIX or SVR4 awk
+     Necessary for creating some of the generated source files for GCC.
+     If in doubt, use a recent GNU awk version, as some of the older
+     ones are broken.  GNU awk version 3.1.5 is known to work.
+
+GNU binutils
+     Necessary in some circumstances, optional in others.  See the
+     host/target specific instructions for your platform for the exact
+     requirements.
+
+gzip version 1.2.4 (or later) or
+bzip2 version 1.0.2 (or later)
+     Necessary to uncompress GCC `tar' files when source code is
+     obtained via FTP mirror sites.
+
+GNU make version 3.80 (or later)
+     You must have GNU make installed to build GCC.
+
+GNU tar version 1.14 (or later)
+     Necessary (only on some platforms) to untar the source code.  Many
+     systems' `tar' programs will also work, only try GNU `tar' if you
+     have problems.
+
+Perl version 5.6.1 (or later)
+     Necessary when targetting Darwin, building `libstdc++', and not
+     using `--disable-symvers'.  Necessary when targetting Solaris 2
+     with Sun `ld' and not using `--disable-symvers'.  A helper script
+     needs `Glob.pm', which is missing from `perl' 5.005 included in
+     Solaris 8.  The bundled `perl' in Solaris 9 and up works.
+
+     Necessary when regenerating `Makefile' dependencies in libiberty.
+     Necessary when regenerating `libiberty/functions.texi'.  Necessary
+     when generating manpages from Texinfo manuals.  Used by various
+     scripts to generate some files included in SVN (mainly
+     Unicode-related and rarely changing) from source tables.
+
+`jar', or InfoZIP (`zip' and `unzip')
+     Necessary to build libgcj, the GCJ runtime.
+
+
+   Several support libraries are necessary to build GCC, some are
+required, others optional.  While any sufficiently new version of
+required tools usually work, library requirements are generally
+stricter.  Newer versions may work in some cases, but it's safer to use
+the exact versions documented.  We appreciate bug reports about
+problems with newer versions, though.
+
+GNU Multiple Precision Library (GMP) version 4.3.2 (or later)
+     Necessary to build GCC.  If you do not have it installed in your
+     library search path, you will have to configure with the
+     `--with-gmp' configure option.  See also `--with-gmp-lib' and
+     `--with-gmp-include'.  Alternatively, if a GMP source distribution
+     is found in a subdirectory of your GCC sources named `gmp', it
+     will be built together with GCC.
+
+MPFR Library version 2.4.2 (or later)
+     Necessary to build GCC.  It can be downloaded from
+     `http://www.mpfr.org/'.  The `--with-mpfr' configure option should
+     be used if your MPFR Library is not installed in your default
+     library search path.  See also `--with-mpfr-lib' and
+     `--with-mpfr-include'.  Alternatively, if a MPFR source
+     distribution is found in a subdirectory of your GCC sources named
+     `mpfr', it will be built together with GCC.
+
+MPC Library version 0.8.1 (or later)
+     Necessary to build GCC.  It can be downloaded from
+     `http://www.multiprecision.org/'.  The `--with-mpc' configure
+     option should be used if your MPC Library is not installed in your
+     default library search path.  See also `--with-mpc-lib' and
+     `--with-mpc-include'.  Alternatively, if an MPC source
+     distribution is found in a subdirectory of your GCC sources named
+     `mpc', it will be built together with GCC.
+
+Parma Polyhedra Library (PPL) version 0.11
+     Necessary to build GCC with the Graphite loop optimizations.  It
+     can be downloaded from `http://www.cs.unipr.it/ppl/Download/'.
+
+     The `--with-ppl' configure option should be used if PPL is not
+     installed in your default library search path.
+
+CLooG-PPL version 0.15 or CLooG 0.16
+     Necessary to build GCC with the Graphite loop optimizations.  There
+     are two versions available.  CLooG-PPL 0.15 as well as CLooG 0.16.
+     The former is the default right now.  It can be downloaded from
+     `ftp://gcc.gnu.org/pub/gcc/infrastructure/' as
+     `cloog-ppl-0.15.tar.gz'.
+
+     CLooG 0.16 support is still in testing stage, but will be the
+     default in future GCC releases.  It is also available at
+     `ftp://gcc.gnu.org/pub/gcc/infrastructure/' as
+     `cloog-0.16.1.tar.gz'.  To use it add the additional configure
+     option `--enable-cloog-backend=isl'.  Even if CLooG 0.16 does not
+     use PPL, PPL is still required for Graphite.
+
+     In both cases `--with-cloog' configure option should be used if
+     CLooG is not installed in your default library search path.
+
+
+Tools/packages necessary for modifying GCC
+==========================================
+
+autoconf version 2.64
+GNU m4 version 1.4.6 (or later)
+     Necessary when modifying `configure.ac', `aclocal.m4', etc.  to
+     regenerate `configure' and `config.in' files.
+
+automake version 1.11.1
+     Necessary when modifying a `Makefile.am' file to regenerate its
+     associated `Makefile.in'.
+
+     Much of GCC does not use automake, so directly edit the
+     `Makefile.in' file.  Specifically this applies to the `gcc',
+     `intl', `libcpp', `libiberty', `libobjc' directories as well as
+     any of their subdirectories.
+
+     For directories that use automake, GCC requires the latest release
+     in the 1.11 series, which is currently 1.11.1.  When regenerating
+     a directory to a newer version, please update all the directories
+     using an older 1.11 to the latest released version.
+
+gettext version 0.14.5 (or later)
+     Needed to regenerate `gcc.pot'.
+
+gperf version 2.7.2 (or later)
+     Necessary when modifying `gperf' input files, e.g.
+     `gcc/cp/cfns.gperf' to regenerate its associated header file, e.g.
+     `gcc/cp/cfns.h'.
+
+DejaGnu 1.4.4
+Expect
+Tcl
+     Necessary to run the GCC testsuite; see the section on testing for
+     details.
+
+autogen version 5.5.4 (or later) and
+guile version 1.4.1 (or later)
+     Necessary to regenerate `fixinc/fixincl.x' from
+     `fixinc/inclhack.def' and `fixinc/*.tpl'.
+
+     Necessary to run `make check' for `fixinc'.
+
+     Necessary to regenerate the top level `Makefile.in' file from
+     `Makefile.tpl' and `Makefile.def'.
+
+Flex version 2.5.4 (or later)
+     Necessary when modifying `*.l' files.
+
+     Necessary to build GCC during development because the generated
+     output files are not included in the SVN repository.  They are
+     included in releases.
+
+Texinfo version 4.7 (or later)
+     Necessary for running `makeinfo' when modifying `*.texi' files to
+     test your changes.
+
+     Necessary for running `make dvi' or `make pdf' to create printable
+     documentation in DVI or PDF format.  Texinfo version 4.8 or later
+     is required for `make pdf'.
+
+     Necessary to build GCC documentation during development because the
+     generated output files are not included in the SVN repository.
+     They are included in releases.
+
+TeX (any working version)
+     Necessary for running `texi2dvi' and `texi2pdf', which are used
+     when running `make dvi' or `make pdf' to create DVI or PDF files,
+     respectively.
+
+SVN (any version)
+SSH (any version)
+     Necessary to access the SVN repository.  Public releases and weekly
+     snapshots of the development sources are also available via FTP.
+
+GNU diffutils version 2.7 (or later)
+     Useful when submitting patches for the GCC source code.
+
+patch version 2.5.4 (or later)
+     Necessary when applying patches, created with `diff', to one's own
+     sources.
+
+ecj1
+gjavah
+     If you wish to modify `.java' files in libjava, you will need to
+     configure with `--enable-java-maintainer-mode', and you will need
+     to have executables named `ecj1' and `gjavah' in your path.  The
+     `ecj1' executable should run the Eclipse Java compiler via the
+     GCC-specific entry point.  You can download a suitable jar from
+     `ftp://sourceware.org/pub/java/', or by running the script
+     `contrib/download_ecj'.
+
+antlr.jar version 2.7.1 (or later)
+antlr binary
+     If you wish to build the `gjdoc' binary in libjava, you will need
+     to have an `antlr.jar' library available. The library is searched
+     in system locations but can be configured with `--with-antlr-jar='
+     instead.  When configuring with `--enable-java-maintainer-mode',
+     you will need to have one of the executables named `cantlr',
+     `runantlr' or `antlr' in your path.
+
+
+
+File: gccinstall.info,  Node: Downloading the source,  Next: Configuration,  Prev: Prerequisites,  Up: Installing GCC
+
+3 Downloading GCC
+*****************
+
+   GCC is distributed via SVN and FTP tarballs compressed with `gzip' or
+`bzip2'.  It is possible to download a full distribution or specific
+components.
+
+   Please refer to the releases web page for information on how to
+obtain GCC.
+
+   The full distribution includes the C, C++, Objective-C, Fortran,
+Java, and Ada (in the case of GCC 3.1 and later) compilers.  The full
+distribution also includes runtime libraries for C++, Objective-C,
+Fortran, and Java.  In GCC 3.0 and later versions, the GNU compiler
+testsuites are also included in the full distribution.
+
+   If you choose to download specific components, you must download the
+core GCC distribution plus any language specific distributions you wish
+to use.  The core distribution includes the C language front end as
+well as the shared components.  Each language has a tarball which
+includes the language front end as well as the language runtime (when
+appropriate).
+
+   Unpack the core distribution as well as any language specific
+distributions in the same directory.
+
+   If you also intend to build binutils (either to upgrade an existing
+installation or for use in place of the corresponding tools of your
+OS), unpack the binutils distribution either in the same directory or a
+separate one.  In the latter case, add symbolic links to any components
+of the binutils you intend to build alongside the compiler (`bfd',
+`binutils', `gas', `gprof', `ld', `opcodes', ...) to the directory
+containing the GCC sources.
+
+   Likewise the GMP, MPFR and MPC libraries can be automatically built
+together with GCC.  Unpack the GMP, MPFR and/or MPC source
+distributions in the directory containing the GCC sources and rename
+their directories to `gmp', `mpfr' and `mpc', respectively (or use
+symbolic links with the same name).
+
+
+File: gccinstall.info,  Node: Configuration,  Next: Building,  Prev: Downloading the source,  Up: Installing GCC
+
+4 Installing GCC: Configuration
+*******************************
+
+   Like most GNU software, GCC must be configured before it can be
+built.  This document describes the recommended configuration procedure
+for both native and cross targets.
+
+   We use SRCDIR to refer to the toplevel source directory for GCC; we
+use OBJDIR to refer to the toplevel build/object directory.
+
+   If you obtained the sources via SVN, SRCDIR must refer to the top
+`gcc' directory, the one where the `MAINTAINERS' file can be found, and
+not its `gcc' subdirectory, otherwise the build will fail.
+
+   If either SRCDIR or OBJDIR is located on an automounted NFS file
+system, the shell's built-in `pwd' command will return temporary
+pathnames.  Using these can lead to various sorts of build problems.
+To avoid this issue, set the `PWDCMD' environment variable to an
+automounter-aware `pwd' command, e.g., `pawd' or `amq -w', during the
+configuration and build phases.
+
+   First, we *highly* recommend that GCC be built into a separate
+directory from the sources which does *not* reside within the source
+tree.  This is how we generally build GCC; building where SRCDIR ==
+OBJDIR should still work, but doesn't get extensive testing; building
+where OBJDIR is a subdirectory of SRCDIR is unsupported.
+
+   If you have previously built GCC in the same directory for a
+different target machine, do `make distclean' to delete all files that
+might be invalid.  One of the files this deletes is `Makefile'; if
+`make distclean' complains that `Makefile' does not exist or issues a
+message like "don't know how to make distclean" it probably means that
+the directory is already suitably clean.  However, with the recommended
+method of building in a separate OBJDIR, you should simply use a
+different OBJDIR for each target.
+
+   Second, when configuring a native system, either `cc' or `gcc' must
+be in your path or you must set `CC' in your environment before running
+configure.  Otherwise the configuration scripts may fail.
+
+   To configure GCC:
+
+     % mkdir OBJDIR
+     % cd OBJDIR
+     % SRCDIR/configure [OPTIONS] [TARGET]
+
+Distributor options
+===================
+
+If you will be distributing binary versions of GCC, with modifications
+to the source code, you should use the options described in this
+section to make clear that your version contains modifications.
+
+`--with-pkgversion=VERSION'
+     Specify a string that identifies your package.  You may wish to
+     include a build number or build date.  This version string will be
+     included in the output of `gcc --version'.  This suffix does not
+     replace the default version string, only the `GCC' part.
+
+     The default value is `GCC'.
+
+`--with-bugurl=URL'
+     Specify the URL that users should visit if they wish to report a
+     bug.  You are of course welcome to forward bugs reported to you to
+     the FSF, if you determine that they are not bugs in your
+     modifications.
+
+     The default value refers to the FSF's GCC bug tracker.
+
+
+Target specification
+====================
+
+   * GCC has code to correctly determine the correct value for TARGET
+     for nearly all native systems.  Therefore, we highly recommend you
+     do not provide a configure target when configuring a native
+     compiler.
+
+   * TARGET must be specified as `--target=TARGET' when configuring a
+     cross compiler; examples of valid targets would be m68k-elf,
+     sh-elf, etc.
+
+   * Specifying just TARGET instead of `--target=TARGET' implies that
+     the host defaults to TARGET.
+
+Options specification
+=====================
+
+Use OPTIONS to override several configure time options for GCC.  A list
+of supported OPTIONS follows; `configure --help' may list other
+options, but those not listed below may not work and should not
+normally be used.
+
+   Note that each `--enable' option has a corresponding `--disable'
+option and that each `--with' option has a corresponding `--without'
+option.
+
+`--prefix=DIRNAME'
+     Specify the toplevel installation directory.  This is the
+     recommended way to install the tools into a directory other than
+     the default.  The toplevel installation directory defaults to
+     `/usr/local'.
+
+     We *highly* recommend against DIRNAME being the same or a
+     subdirectory of OBJDIR or vice versa.  If specifying a directory
+     beneath a user's home directory tree, some shells will not expand
+     DIRNAME correctly if it contains the `~' metacharacter; use
+     `$HOME' instead.
+
+     The following standard `autoconf' options are supported.  Normally
+     you should not need to use these options.
+    `--exec-prefix=DIRNAME'
+          Specify the toplevel installation directory for
+          architecture-dependent files.  The default is `PREFIX'.
+
+    `--bindir=DIRNAME'
+          Specify the installation directory for the executables called
+          by users (such as `gcc' and `g++').  The default is
+          `EXEC-PREFIX/bin'.
+
+    `--libdir=DIRNAME'
+          Specify the installation directory for object code libraries
+          and internal data files of GCC.  The default is
+          `EXEC-PREFIX/lib'.
+
+    `--libexecdir=DIRNAME'
+          Specify the installation directory for internal executables
+          of GCC.  The default is `EXEC-PREFIX/libexec'.
+
+    `--with-slibdir=DIRNAME'
+          Specify the installation directory for the shared libgcc
+          library.  The default is `LIBDIR'.
+
+    `--datarootdir=DIRNAME'
+          Specify the root of the directory tree for read-only
+          architecture-independent data files referenced by GCC.  The
+          default is `PREFIX/share'.
+
+    `--infodir=DIRNAME'
+          Specify the installation directory for documentation in info
+          format.  The default is `DATAROOTDIR/info'.
+
+    `--datadir=DIRNAME'
+          Specify the installation directory for some
+          architecture-independent data files referenced by GCC.  The
+          default is `DATAROOTDIR'.
+
+    `--docdir=DIRNAME'
+          Specify the installation directory for documentation files
+          (other than Info) for GCC.  The default is `DATAROOTDIR/doc'.
+
+    `--htmldir=DIRNAME'
+          Specify the installation directory for HTML documentation
+          files.  The default is `DOCDIR'.
+
+    `--pdfdir=DIRNAME'
+          Specify the installation directory for PDF documentation
+          files.  The default is `DOCDIR'.
+
+    `--mandir=DIRNAME'
+          Specify the installation directory for manual pages.  The
+          default is `DATAROOTDIR/man'.  (Note that the manual pages
+          are only extracts from the full GCC manuals, which are
+          provided in Texinfo format.  The manpages are derived by an
+          automatic conversion process from parts of the full manual.)
+
+    `--with-gxx-include-dir=DIRNAME'
+          Specify the installation directory for G++ header files.  The
+          default depends on other configuration options, and differs
+          between cross and native configurations.
+
+
+`--program-prefix=PREFIX'
+     GCC supports some transformations of the names of its programs when
+     installing them.  This option prepends PREFIX to the names of
+     programs to install in BINDIR (see above).  For example, specifying
+     `--program-prefix=foo-' would result in `gcc' being installed as
+     `/usr/local/bin/foo-gcc'.
+
+`--program-suffix=SUFFIX'
+     Appends SUFFIX to the names of programs to install in BINDIR (see
+     above).  For example, specifying `--program-suffix=-3.1' would
+     result in `gcc' being installed as `/usr/local/bin/gcc-3.1'.
+
+`--program-transform-name=PATTERN'
+     Applies the `sed' script PATTERN to be applied to the names of
+     programs to install in BINDIR (see above).  PATTERN has to consist
+     of one or more basic `sed' editing commands, separated by
+     semicolons.  For example, if you want the `gcc' program name to be
+     transformed to the installed program `/usr/local/bin/myowngcc' and
+     the `g++' program name to be transformed to
+     `/usr/local/bin/gspecial++' without changing other program names,
+     you could use the pattern
+     `--program-transform-name='s/^gcc$/myowngcc/; s/^g++$/gspecial++/''
+     to achieve this effect.
+
+     All three options can be combined and used together, resulting in
+     more complex conversion patterns.  As a basic rule, PREFIX (and
+     SUFFIX) are prepended (appended) before further transformations
+     can happen with a special transformation script PATTERN.
+
+     As currently implemented, this option only takes effect for native
+     builds; cross compiler binaries' names are not transformed even
+     when a transformation is explicitly asked for by one of these
+     options.
+
+     For native builds, some of the installed programs are also
+     installed with the target alias in front of their name, as in
+     `i686-pc-linux-gnu-gcc'.  All of the above transformations happen
+     before the target alias is prepended to the name--so, specifying
+     `--program-prefix=foo-' and `program-suffix=-3.1', the resulting
+     binary would be installed as
+     `/usr/local/bin/i686-pc-linux-gnu-foo-gcc-3.1'.
+
+     As a last shortcoming, none of the installed Ada programs are
+     transformed yet, which will be fixed in some time.
+
+`--with-local-prefix=DIRNAME'
+     Specify the installation directory for local include files.  The
+     default is `/usr/local'.  Specify this option if you want the
+     compiler to search directory `DIRNAME/include' for locally
+     installed header files _instead_ of `/usr/local/include'.
+
+     You should specify `--with-local-prefix' *only* if your site has a
+     different convention (not `/usr/local') for where to put
+     site-specific files.
+
+     The default value for `--with-local-prefix' is `/usr/local'
+     regardless of the value of `--prefix'.  Specifying `--prefix' has
+     no effect on which directory GCC searches for local header files.
+     This may seem counterintuitive, but actually it is logical.
+
+     The purpose of `--prefix' is to specify where to _install GCC_.
+     The local header files in `/usr/local/include'--if you put any in
+     that directory--are not part of GCC.  They are part of other
+     programs--perhaps many others.  (GCC installs its own header files
+     in another directory which is based on the `--prefix' value.)
+
+     Both the local-prefix include directory and the GCC-prefix include
+     directory are part of GCC's "system include" directories.
+     Although these two directories are not fixed, they need to be
+     searched in the proper order for the correct processing of the
+     include_next directive.  The local-prefix include directory is
+     searched before the GCC-prefix include directory.  Another
+     characteristic of system include directories is that pedantic
+     warnings are turned off for headers in these directories.
+
+     Some autoconf macros add `-I DIRECTORY' options to the compiler
+     command line, to ensure that directories containing installed
+     packages' headers are searched.  When DIRECTORY is one of GCC's
+     system include directories, GCC will ignore the option so that
+     system directories continue to be processed in the correct order.
+     This may result in a search order different from what was
+     specified but the directory will still be searched.
+
+     GCC automatically searches for ordinary libraries using
+     `GCC_EXEC_PREFIX'.  Thus, when the same installation prefix is
+     used for both GCC and packages, GCC will automatically search for
+     both headers and libraries.  This provides a configuration that is
+     easy to use.  GCC behaves in a manner similar to that when it is
+     installed as a system compiler in `/usr'.
+
+     Sites that need to install multiple versions of GCC may not want to
+     use the above simple configuration.  It is possible to use the
+     `--program-prefix', `--program-suffix' and
+     `--program-transform-name' options to install multiple versions
+     into a single directory, but it may be simpler to use different
+     prefixes and the `--with-local-prefix' option to specify the
+     location of the site-specific files for each version.  It will
+     then be necessary for users to specify explicitly the location of
+     local site libraries (e.g., with `LIBRARY_PATH').
+
+     The same value can be used for both `--with-local-prefix' and
+     `--prefix' provided it is not `/usr'.  This can be used to avoid
+     the default search of `/usr/local/include'.
+
+     *Do not* specify `/usr' as the `--with-local-prefix'!  The
+     directory you use for `--with-local-prefix' *must not* contain any
+     of the system's standard header files.  If it did contain them,
+     certain programs would be miscompiled (including GNU Emacs, on
+     certain targets), because this would override and nullify the
+     header file corrections made by the `fixincludes' script.
+
+     Indications are that people who use this option use it based on
+     mistaken ideas of what it is for.  People use it as if it
+     specified where to install part of GCC.  Perhaps they make this
+     assumption because installing GCC creates the directory.
+
+`--enable-shared[=PACKAGE[,...]]'
+     Build shared versions of libraries, if shared libraries are
+     supported on the target platform.  Unlike GCC 2.95.x and earlier,
+     shared libraries are enabled by default on all platforms that
+     support shared libraries.
+
+     If a list of packages is given as an argument, build shared
+     libraries only for the listed packages.  For other packages, only
+     static libraries will be built.  Package names currently
+     recognized in the GCC tree are `libgcc' (also known as `gcc'),
+     `libstdc++' (not `libstdc++-v3'), `libffi', `zlib', `boehm-gc',
+     `ada', `libada', `libjava', `libgo', and `libobjc'.  Note
+     `libiberty' does not support shared libraries at all.
+
+     Use `--disable-shared' to build only static libraries.  Note that
+     `--disable-shared' does not accept a list of package names as
+     argument, only `--enable-shared' does.
+
+`--with-gnu-as'
+     Specify that the compiler should assume that the assembler it
+     finds is the GNU assembler.  However, this does not modify the
+     rules to find an assembler and will result in confusion if the
+     assembler found is not actually the GNU assembler.  (Confusion may
+     also result if the compiler finds the GNU assembler but has not
+     been configured with `--with-gnu-as'.)  If you have more than one
+     assembler installed on your system, you may want to use this
+     option in connection with `--with-as=PATHNAME' or
+     `--with-build-time-tools=PATHNAME'.
+
+     The following systems are the only ones where it makes a difference
+     whether you use the GNU assembler.  On any other system,
+     `--with-gnu-as' has no effect.
+
+        * `hppa1.0-ANY-ANY'
+
+        * `hppa1.1-ANY-ANY'
+
+        * `sparc-sun-solaris2.ANY'
+
+        * `sparc64-ANY-solaris2.ANY'
+
+`--with-as=PATHNAME'
+     Specify that the compiler should use the assembler pointed to by
+     PATHNAME, rather than the one found by the standard rules to find
+     an assembler, which are:
+        * Unless GCC is being built with a cross compiler, check the
+          `LIBEXEC/gcc/TARGET/VERSION' directory.  LIBEXEC defaults to
+          `EXEC-PREFIX/libexec'; EXEC-PREFIX defaults to PREFIX, which
+          defaults to `/usr/local' unless overridden by the
+          `--prefix=PATHNAME' switch described above.  TARGET is the
+          target system triple, such as `sparc-sun-solaris2.7', and
+          VERSION denotes the GCC version, such as 3.0.
+
+        * If the target system is the same that you are building on,
+          check operating system specific directories (e.g.
+          `/usr/ccs/bin' on Sun Solaris 2).
+
+        * Check in the `PATH' for a tool whose name is prefixed by the
+          target system triple.
+
+        * Check in the `PATH' for a tool whose name is not prefixed by
+          the target system triple, if the host and target system
+          triple are the same (in other words, we use a host tool if it
+          can be used for the target as well).
+
+     You may want to use `--with-as' if no assembler is installed in
+     the directories listed above, or if you have multiple assemblers
+     installed and want to choose one that is not found by the above
+     rules.
+
+`--with-gnu-ld'
+     Same as `--with-gnu-as' but for the linker.
+
+`--with-ld=PATHNAME'
+     Same as `--with-as' but for the linker.
+
+`--with-stabs'
+     Specify that stabs debugging information should be used instead of
+     whatever format the host normally uses.  Normally GCC uses the
+     same debug format as the host system.
+
+     On MIPS based systems and on Alphas, you must specify whether you
+     want GCC to create the normal ECOFF debugging format, or to use
+     BSD-style stabs passed through the ECOFF symbol table.  The normal
+     ECOFF debug format cannot fully handle languages other than C.
+     BSD stabs format can handle other languages, but it only works
+     with the GNU debugger GDB.
+
+     Normally, GCC uses the ECOFF debugging format by default; if you
+     prefer BSD stabs, specify `--with-stabs' when you configure GCC.
+
+     No matter which default you choose when you configure GCC, the user
+     can use the `-gcoff' and `-gstabs+' options to specify explicitly
+     the debug format for a particular compilation.
+
+     `--with-stabs' is meaningful on the ISC system on the 386, also, if
+     `--with-gas' is used.  It selects use of stabs debugging
+     information embedded in COFF output.  This kind of debugging
+     information supports C++ well; ordinary COFF debugging information
+     does not.
+
+     `--with-stabs' is also meaningful on 386 systems running SVR4.  It
+     selects use of stabs debugging information embedded in ELF output.
+     The C++ compiler currently (2.6.0) does not support the DWARF
+     debugging information normally used on 386 SVR4 platforms; stabs
+     provide a workable alternative.  This requires gas and gdb, as the
+     normal SVR4 tools can not generate or interpret stabs.
+
+`--enable-multiarch'
+     Specify whether to enable or disable multiarch support.  The
+     default is to check for glibc start files in a multiarch location,
+     and enable it if the files are found.  The auto detection is
+     enabled for native builds, and for cross builds configured with
+     `--with-sysroot'.  More documentation about multiarch can be found
+     at `http://wiki.debian.org/Multiarch'.
+
+`--disable-multilib'
+     Specify that multiple target libraries to support different target
+     variants, calling conventions, etc. should not be built.  The
+     default is to build a predefined set of them.
+
+     Some targets provide finer-grained control over which multilibs
+     are built (e.g., `--disable-softfloat'):
+    `arc-*-elf*'
+          biendian.
+
+    `arm-*-*'
+          fpu, 26bit, underscore, interwork, biendian, nofmult.
+
+    `m68*-*-*'
+          softfloat, m68881, m68000, m68020.
+
+    `mips*-*-*'
+          single-float, biendian, softfloat.
+
+    `powerpc*-*-*, rs6000*-*-*'
+          aix64, pthread, softfloat, powercpu, powerpccpu, powerpcos,
+          biendian, sysv, aix.
+
+
+`--with-multilib-list=LIST'
+`--without-multilib-list'
+     Specify what multilibs to build.  Currently only implemented for
+     sh*-*-*.
+
+     LIST is a comma separated list of CPU names.  These must be of the
+     form `sh*' or `m*' (in which case they match the compiler option
+     for that processor).  The list should not contain any endian
+     options - these are handled by `--with-endian'.
+
+     If LIST is empty, then there will be no multilibs for extra
+     processors.  The multilib for the secondary endian remains enabled.
+
+     As a special case, if an entry in the list starts with a `!'
+     (exclamation point), then it is added to the list of excluded
+     multilibs.  Entries of this sort should be compatible with
+     `MULTILIB_EXCLUDES' (once the leading `!' has been stripped).
+
+     If `--with-multilib-list' is not given, then a default set of
+     multilibs is selected based on the value of `--target'.  This is
+     usually the complete set of libraries, but some targets imply a
+     more specialized subset.
+
+     Example 1: to configure a compiler for SH4A only, but supporting
+     both endians, with little endian being the default:
+          --with-cpu=sh4a --with-endian=little,big --with-multilib-list=
+
+     Example 2: to configure a compiler for both SH4A and SH4AL-DSP,
+     but with only little endian SH4AL:
+          --with-cpu=sh4a --with-endian=little,big \
+          --with-multilib-list=sh4al,!mb/m4al
+
+`--with-endian=ENDIANS'
+     Specify what endians to use.  Currently only implemented for
+     sh*-*-*.
+
+     ENDIANS may be one of the following:
+    `big'
+          Use big endian exclusively.
+
+    `little'
+          Use little endian exclusively.
+
+    `big,little'
+          Use big endian by default.  Provide a multilib for little
+          endian.
+
+    `little,big'
+          Use little endian by default.  Provide a multilib for big
+          endian.
+
+`--enable-threads'
+     Specify that the target supports threads.  This affects the
+     Objective-C compiler and runtime library, and exception handling
+     for other languages like C++ and Java.  On some systems, this is
+     the default.
+
+     In general, the best (and, in many cases, the only known) threading
+     model available will be configured for use.  Beware that on some
+     systems, GCC has not been taught what threading models are
+     generally available for the system.  In this case,
+     `--enable-threads' is an alias for `--enable-threads=single'.
+
+`--disable-threads'
+     Specify that threading support should be disabled for the system.
+     This is an alias for `--enable-threads=single'.
+
+`--enable-threads=LIB'
+     Specify that LIB is the thread support library.  This affects the
+     Objective-C compiler and runtime library, and exception handling
+     for other languages like C++ and Java.  The possibilities for LIB
+     are:
+
+    `aix'
+          AIX thread support.
+
+    `dce'
+          DCE thread support.
+
+    `gnat'
+          Ada tasking support.  For non-Ada programs, this setting is
+          equivalent to `single'.  When used in conjunction with the
+          Ada run time, it causes GCC to use the same thread primitives
+          as Ada uses.  This option is necessary when using both Ada
+          and the back end exception handling, which is the default for
+          most Ada targets.
+
+    `mach'
+          Generic MACH thread support, known to work on NeXTSTEP.
+          (Please note that the file needed to support this
+          configuration, `gthr-mach.h', is missing and thus this
+          setting will cause a known bootstrap failure.)
+
+    `no'
+          This is an alias for `single'.
+
+    `posix'
+          Generic POSIX/Unix98 thread support.
+
+    `posix95'
+          Generic POSIX/Unix95 thread support.
+
+    `rtems'
+          RTEMS thread support.
+
+    `single'
+          Disable thread support, should work for all platforms.
+
+    `solaris'
+          Sun Solaris 2/Unix International thread support.  Only use
+          this if you really need to use this legacy API instead of the
+          default, `posix'.
+
+    `vxworks'
+          VxWorks thread support.
+
+    `win32'
+          Microsoft Win32 API thread support.
+
+    `nks'
+          Novell Kernel Services thread support.
+
+`--enable-tls'
+     Specify that the target supports TLS (Thread Local Storage).
+     Usually configure can correctly determine if TLS is supported.  In
+     cases where it guesses incorrectly, TLS can be explicitly enabled
+     or disabled with `--enable-tls' or `--disable-tls'.  This can
+     happen if the assembler supports TLS but the C library does not,
+     or if the assumptions made by the configure test are incorrect.
+
+`--disable-tls'
+     Specify that the target does not support TLS.  This is an alias
+     for `--enable-tls=no'.
+
+`--with-cpu=CPU'
+`--with-cpu-32=CPU'
+`--with-cpu-64=CPU'
+     Specify which cpu variant the compiler should generate code for by
+     default.  CPU will be used as the default value of the `-mcpu='
+     switch.  This option is only supported on some targets, including
+     ARM, i386, M68k, PowerPC, and SPARC.  The `--with-cpu-32' and
+     `--with-cpu-64' options specify separate default CPUs for 32-bit
+     and 64-bit modes; these options are only supported for i386,
+     x86-64 and PowerPC.
+
+`--with-schedule=CPU'
+`--with-arch=CPU'
+`--with-arch-32=CPU'
+`--with-arch-64=CPU'
+`--with-tune=CPU'
+`--with-tune-32=CPU'
+`--with-tune-64=CPU'
+`--with-abi=ABI'
+`--with-fpu=TYPE'
+`--with-float=TYPE'
+     These configure options provide default values for the
+     `-mschedule=', `-march=', `-mtune=', `-mabi=', and `-mfpu='
+     options and for `-mhard-float' or `-msoft-float'.  As with
+     `--with-cpu', which switches will be accepted and acceptable values
+     of the arguments depend on the target.
+
+`--with-mode=MODE'
+     Specify if the compiler should default to `-marm' or `-mthumb'.
+     This option is only supported on ARM targets.
+
+`--with-fpmath=ISA'
+     This options sets `-mfpmath=sse' by default and specifies the
+     default ISA for floating-point arithmetics.  You can select either
+     `sse' which enables `-msse2' or `avx' which enables `-mavx' by
+     default.  This option is only supported on i386 and x86-64 targets.
+
+`--with-divide=TYPE'
+     Specify how the compiler should generate code for checking for
+     division by zero.  This option is only supported on the MIPS
+     target.  The possibilities for TYPE are:
+    `traps'
+          Division by zero checks use conditional traps (this is the
+          default on systems that support conditional traps).
+
+    `breaks'
+          Division by zero checks use the break instruction.
+
+`--with-llsc'
+     On MIPS targets, make `-mllsc' the default when no `-mno-llsc'
+     option is passed.  This is the default for Linux-based targets, as
+     the kernel will emulate them if the ISA does not provide them.
+
+`--without-llsc'
+     On MIPS targets, make `-mno-llsc' the default when no `-mllsc'
+     option is passed.
+
+`--with-synci'
+     On MIPS targets, make `-msynci' the default when no `-mno-synci'
+     option is passed.
+
+`--without-synci'
+     On MIPS targets, make `-mno-synci' the default when no `-msynci'
+     option is passed.  This is the default.
+
+`--with-mips-plt'
+     On MIPS targets, make use of copy relocations and PLTs.  These
+     features are extensions to the traditional SVR4-based MIPS ABIs
+     and require support from GNU binutils and the runtime C library.
+
+`--enable-__cxa_atexit'
+     Define if you want to use __cxa_atexit, rather than atexit, to
+     register C++ destructors for local statics and global objects.
+     This is essential for fully standards-compliant handling of
+     destructors, but requires __cxa_atexit in libc.  This option is
+     currently only available on systems with GNU libc.  When enabled,
+     this will cause `-fuse-cxa-atexit' to be passed by default.
+
+`--enable-indirect-function'
+     Define if you want to enable the `ifunc' attribute.  This option is
+     currently only available on systems with GNU libc on certain
+     targets.
+
+`--enable-target-optspace'
+     Specify that target libraries should be optimized for code space
+     instead of code speed.  This is the default for the m32r platform.
+
+`--with-cpp-install-dir=DIRNAME'
+     Specify that the user visible `cpp' program should be installed in
+     `PREFIX/DIRNAME/cpp', in addition to BINDIR.
+
+`--enable-comdat'
+     Enable COMDAT group support.  This is primarily used to override
+     the automatically detected value.
+
+`--enable-initfini-array'
+     Force the use of sections `.init_array' and `.fini_array' (instead
+     of `.init' and `.fini') for constructors and destructors.  Option
+     `--disable-initfini-array' has the opposite effect.  If neither
+     option is specified, the configure script will try to guess
+     whether the `.init_array' and `.fini_array' sections are supported
+     and, if they are, use them.
+
+`--enable-build-with-cxx'
+     Build GCC using a C++ compiler rather than a C compiler.  This is
+     an experimental option which may become the default in a later
+     release.
+
+`--enable-maintainer-mode'
+     The build rules that regenerate the Autoconf and Automake output
+     files as well as the GCC master message catalog `gcc.pot' are
+     normally disabled.  This is because it can only be rebuilt if the
+     complete source tree is present.  If you have changed the sources
+     and want to rebuild the catalog, configuring with
+     `--enable-maintainer-mode' will enable this.  Note that you need a
+     recent version of the `gettext' tools to do so.
+
+`--disable-bootstrap'
+     For a native build, the default configuration is to perform a
+     3-stage bootstrap of the compiler when `make' is invoked, testing
+     that GCC can compile itself correctly.  If you want to disable
+     this process, you can configure with `--disable-bootstrap'.
+
+`--enable-bootstrap'
+     In special cases, you may want to perform a 3-stage build even if
+     the target and host triplets are different.  This is possible when
+     the host can run code compiled for the target (e.g. host is
+     i686-linux, target is i486-linux).  Starting from GCC 4.2, to do
+     this you have to configure explicitly with `--enable-bootstrap'.
+
+`--enable-generated-files-in-srcdir'
+     Neither the .c and .h files that are generated from Bison and flex
+     nor the info manuals and man pages that are built from the .texi
+     files are present in the SVN development tree.  When building GCC
+     from that development tree, or from one of our snapshots, those
+     generated files are placed in your build directory, which allows
+     for the source to be in a readonly directory.
+
+     If you configure with `--enable-generated-files-in-srcdir' then
+     those generated files will go into the source directory.  This is
+     mainly intended for generating release or prerelease tarballs of
+     the GCC sources, since it is not a requirement that the users of
+     source releases to have flex, Bison, or makeinfo.
+
+`--enable-version-specific-runtime-libs'
+     Specify that runtime libraries should be installed in the compiler
+     specific subdirectory (`LIBDIR/gcc') rather than the usual places.
+     In addition, `libstdc++''s include files will be installed into
+     `LIBDIR' unless you overruled it by using
+     `--with-gxx-include-dir=DIRNAME'.  Using this option is
+     particularly useful if you intend to use several versions of GCC in
+     parallel.  This is currently supported by `libgfortran',
+     `libjava', `libmudflap', `libstdc++', and `libobjc'.
+
+`--enable-languages=LANG1,LANG2,...'
+     Specify that only a particular subset of compilers and their
+     runtime libraries should be built.  For a list of valid values for
+     LANGN you can issue the following command in the `gcc' directory
+     of your GCC source tree:
+          grep language= */config-lang.in
+     Currently, you can use any of the following: `all', `ada', `c',
+     `c++', `fortran', `go', `java', `objc', `obj-c++'.  Building the
+     Ada compiler has special requirements, see below.  If you do not
+     pass this flag, or specify the option `all', then all default
+     languages available in the `gcc' sub-tree will be configured.
+     Ada, Go and Objective-C++ are not default languages; the rest are.
+
+`--enable-stage1-languages=LANG1,LANG2,...'
+     Specify that a particular subset of compilers and their runtime
+     libraries should be built with the system C compiler during stage
+     1 of the bootstrap process, rather than only in later stages with
+     the bootstrapped C compiler.  The list of valid values is the same
+     as for `--enable-languages', and the option `all' will select all
+     of the languages enabled by `--enable-languages'.  This option is
+     primarily useful for GCC development; for instance, when a
+     development version of the compiler cannot bootstrap due to
+     compiler bugs, or when one is debugging front ends other than the
+     C front end.  When this option is used, one can then build the
+     target libraries for the specified languages with the stage-1
+     compiler by using `make stage1-bubble all-target', or run the
+     testsuite on the stage-1 compiler for the specified languages
+     using `make stage1-start check-gcc'.
+
+`--disable-libada'
+     Specify that the run-time libraries and tools used by GNAT should
+     not be built.  This can be useful for debugging, or for
+     compatibility with previous Ada build procedures, when it was
+     required to explicitly do a `make -C gcc gnatlib_and_tools'.
+
+`--disable-libssp'
+     Specify that the run-time libraries for stack smashing protection
+     should not be built.
+
+`--disable-libquadmath'
+     Specify that the GCC quad-precision math library should not be
+     built.  On some systems, the library is required to be linkable
+     when building the Fortran front end, unless
+     `--disable-libquadmath-support' is used.
+
+`--disable-libquadmath-support'
+     Specify that the Fortran front end and `libgfortran' do not add
+     support for `libquadmath' on systems supporting it.
+
+`--disable-libgomp'
+     Specify that the run-time libraries used by GOMP should not be
+     built.
+
+`--with-dwarf2'
+     Specify that the compiler should use DWARF 2 debugging information
+     as the default.
+
+`--enable-targets=all'
+`--enable-targets=TARGET_LIST'
+     Some GCC targets, e.g. powerpc64-linux, build bi-arch compilers.
+     These are compilers that are able to generate either 64-bit or
+     32-bit code.  Typically, the corresponding 32-bit target, e.g.
+     powerpc-linux for powerpc64-linux, only generates 32-bit code.
+     This option enables the 32-bit target to be a bi-arch compiler,
+     which is useful when you want a bi-arch compiler that defaults to
+     32-bit, and you are building a bi-arch or multi-arch binutils in a
+     combined tree.  On mips-linux, this will build a tri-arch compiler
+     (ABI o32/n32/64), defaulted to o32.  Currently, this option only
+     affects sparc-linux, powerpc-linux, x86-linux and mips-linux.
+
+`--enable-secureplt'
+     This option enables `-msecure-plt' by default for powerpc-linux.
+     *Note RS/6000 and PowerPC Options: (gcc)RS/6000 and PowerPC
+     Options,
+
+`--enable-cld'
+     This option enables `-mcld' by default for 32-bit x86 targets.
+     *Note i386 and x86-64 Options: (gcc)i386 and x86-64 Options,
+
+`--enable-win32-registry'
+`--enable-win32-registry=KEY'
+`--disable-win32-registry'
+     The `--enable-win32-registry' option enables Microsoft
+     Windows-hosted GCC to look up installations paths in the registry
+     using the following key:
+
+          `HKEY_LOCAL_MACHINE\SOFTWARE\Free Software Foundation\KEY'
+
+     KEY defaults to GCC version number, and can be overridden by the
+     `--enable-win32-registry=KEY' option.  Vendors and distributors
+     who use custom installers are encouraged to provide a different
+     key, perhaps one comprised of vendor name and GCC version number,
+     to avoid conflict with existing installations.  This feature is
+     enabled by default, and can be disabled by
+     `--disable-win32-registry' option.  This option has no effect on
+     the other hosts.
+
+`--nfp'
+     Specify that the machine does not have a floating point unit.  This
+     option only applies to `m68k-sun-sunosN'.  On any other system,
+     `--nfp' has no effect.
+
+`--enable-werror'
+`--disable-werror'
+`--enable-werror=yes'
+`--enable-werror=no'
+     When you specify this option, it controls whether certain files in
+     the compiler are built with `-Werror' in bootstrap stage2 and
+     later.  If you don't specify it, `-Werror' is turned on for the
+     main development trunk.  However it defaults to off for release
+     branches and final releases.  The specific files which get
+     `-Werror' are controlled by the Makefiles.
+
+`--enable-checking'
+`--enable-checking=LIST'
+     When you specify this option, the compiler is built to perform
+     internal consistency checks of the requested complexity.  This
+     does not change the generated code, but adds error checking within
+     the compiler.  This will slow down the compiler and may only work
+     properly if you are building the compiler with GCC.  This is `yes'
+     by default when building from SVN or snapshots, but `release' for
+     releases.  The default for building the stage1 compiler is `yes'.
+     More control over the checks may be had by specifying LIST.  The
+     categories of checks available are `yes' (most common checks
+     `assert,misc,tree,gc,rtlflag,runtime'), `no' (no checks at all),
+     `all' (all but `valgrind'), `release' (cheapest checks
+     `assert,runtime') or `none' (same as `no').  Individual checks can
+     be enabled with these flags `assert', `df', `fold', `gc', `gcac'
+     `misc', `rtl', `rtlflag', `runtime', `tree', and `valgrind'.
+
+     The `valgrind' check requires the external `valgrind' simulator,
+     available from `http://valgrind.org/'.  The `df', `rtl', `gcac'
+     and `valgrind' checks are very expensive.  To disable all
+     checking, `--disable-checking' or `--enable-checking=none' must be
+     explicitly requested.  Disabling assertions will make the compiler
+     and runtime slightly faster but increase the risk of undetected
+     internal errors causing wrong code to be generated.
+
+`--disable-stage1-checking'
+`--enable-stage1-checking'
+`--enable-stage1-checking=LIST'
+     If no `--enable-checking' option is specified the stage1 compiler
+     will be built with `yes' checking enabled, otherwise the stage1
+     checking flags are the same as specified by `--enable-checking'.
+     To build the stage1 compiler with different checking options use
+     `--enable-stage1-checking'.  The list of checking options is the
+     same as for `--enable-checking'.  If your system is too slow or
+     too small to bootstrap a released compiler with checking for
+     stage1 enabled, you can use `--disable-stage1-checking' to disable
+     checking for the stage1 compiler.
+
+`--enable-coverage'
+`--enable-coverage=LEVEL'
+     With this option, the compiler is built to collect self coverage
+     information, every time it is run.  This is for internal
+     development purposes, and only works when the compiler is being
+     built with gcc.  The LEVEL argument controls whether the compiler
+     is built optimized or not, values are `opt' and `noopt'.  For
+     coverage analysis you want to disable optimization, for
+     performance analysis you want to enable optimization.  When
+     coverage is enabled, the default level is without optimization.
+
+`--enable-gather-detailed-mem-stats'
+     When this option is specified more detailed information on memory
+     allocation is gathered.  This information is printed when using
+     `-fmem-report'.
+
+`--with-gc'
+`--with-gc=CHOICE'
+     With this option you can specify the garbage collector
+     implementation used during the compilation process.  CHOICE can be
+     one of `page' and `zone', where `page' is the default.
+
+`--enable-nls'
+`--disable-nls'
+     The `--enable-nls' option enables Native Language Support (NLS),
+     which lets GCC output diagnostics in languages other than American
+     English.  Native Language Support is enabled by default if not
+     doing a canadian cross build.  The `--disable-nls' option disables
+     NLS.
+
+`--with-included-gettext'
+     If NLS is enabled, the `--with-included-gettext' option causes the
+     build procedure to prefer its copy of GNU `gettext'.
+
+`--with-catgets'
+     If NLS is enabled, and if the host lacks `gettext' but has the
+     inferior `catgets' interface, the GCC build procedure normally
+     ignores `catgets' and instead uses GCC's copy of the GNU `gettext'
+     library.  The `--with-catgets' option causes the build procedure
+     to use the host's `catgets' in this situation.
+
+`--with-libiconv-prefix=DIR'
+     Search for libiconv header files in `DIR/include' and libiconv
+     library files in `DIR/lib'.
+
+`--enable-obsolete'
+     Enable configuration for an obsoleted system.  If you attempt to
+     configure GCC for a system (build, host, or target) which has been
+     obsoleted, and you do not specify this flag, configure will halt
+     with an error message.
+
+     All support for systems which have been obsoleted in one release
+     of GCC is removed entirely in the next major release, unless
+     someone steps forward to maintain the port.
+
+`--enable-decimal-float'
+`--enable-decimal-float=yes'
+`--enable-decimal-float=no'
+`--enable-decimal-float=bid'
+`--enable-decimal-float=dpd'
+`--disable-decimal-float'
+     Enable (or disable) support for the C decimal floating point
+     extension that is in the IEEE 754-2008 standard.  This is enabled
+     by default only on PowerPC, i386, and x86_64 GNU/Linux systems.
+     Other systems may also support it, but require the user to
+     specifically enable it.  You can optionally control which decimal
+     floating point format is used (either `bid' or `dpd').  The `bid'
+     (binary integer decimal) format is default on i386 and x86_64
+     systems, and the `dpd' (densely packed decimal) format is default
+     on PowerPC systems.
+
+`--enable-fixed-point'
+`--disable-fixed-point'
+     Enable (or disable) support for C fixed-point arithmetic.  This
+     option is enabled by default for some targets (such as MIPS) which
+     have hardware-support for fixed-point operations.  On other
+     targets, you may enable this option manually.
+
+`--with-long-double-128'
+     Specify if `long double' type should be 128-bit by default on
+     selected GNU/Linux architectures.  If using
+     `--without-long-double-128', `long double' will be by default
+     64-bit, the same as `double' type.  When neither of these
+     configure options are used, the default will be 128-bit `long
+     double' when built against GNU C Library 2.4 and later, 64-bit
+     `long double' otherwise.
+
+`--with-gmp=PATHNAME'
+`--with-gmp-include=PATHNAME'
+`--with-gmp-lib=PATHNAME'
+`--with-mpfr=PATHNAME'
+`--with-mpfr-include=PATHNAME'
+`--with-mpfr-lib=PATHNAME'
+`--with-mpc=PATHNAME'
+`--with-mpc-include=PATHNAME'
+`--with-mpc-lib=PATHNAME'
+     If you do not have GMP (the GNU Multiple Precision library), the
+     MPFR library and/or the MPC library installed in a standard
+     location and you want to build GCC, you can explicitly specify the
+     directory where they are installed (`--with-gmp=GMPINSTALLDIR',
+     `--with-mpfr=MPFRINSTALLDIR', `--with-mpc=MPCINSTALLDIR').  The
+     `--with-gmp=GMPINSTALLDIR' option is shorthand for
+     `--with-gmp-lib=GMPINSTALLDIR/lib' and
+     `--with-gmp-include=GMPINSTALLDIR/include'.  Likewise the
+     `--with-mpfr=MPFRINSTALLDIR' option is shorthand for
+     `--with-mpfr-lib=MPFRINSTALLDIR/lib' and
+     `--with-mpfr-include=MPFRINSTALLDIR/include', also the
+     `--with-mpc=MPCINSTALLDIR' option is shorthand for
+     `--with-mpc-lib=MPCINSTALLDIR/lib' and
+     `--with-mpc-include=MPCINSTALLDIR/include'.  If these shorthand
+     assumptions are not correct, you can use the explicit include and
+     lib options directly.  You might also need to ensure the shared
+     libraries can be found by the dynamic linker when building and
+     using GCC, for example by setting the runtime shared library path
+     variable (`LD_LIBRARY_PATH' on GNU/Linux and Solaris systems).
+
+     These flags are applicable to the host platform only.  When
+     building a cross compiler, they will not be used to configure
+     target libraries.
+
+`--with-ppl=PATHNAME'
+`--with-ppl-include=PATHNAME'
+`--with-ppl-lib=PATHNAME'
+`--with-cloog=PATHNAME'
+`--with-cloog-include=PATHNAME'
+`--with-cloog-lib=PATHNAME'
+     If you do not have PPL (the Parma Polyhedra Library) and the CLooG
+     libraries installed in a standard location and you want to build
+     GCC, you can explicitly specify the directory where they are
+     installed (`--with-ppl=PPLINSTALLDIR',
+     `--with-cloog=CLOOGINSTALLDIR'). The `--with-ppl=PPLINSTALLDIR'
+     option is shorthand for `--with-ppl-lib=PPLINSTALLDIR/lib' and
+     `--with-ppl-include=PPLINSTALLDIR/include'.  Likewise the
+     `--with-cloog=CLOOGINSTALLDIR' option is shorthand for
+     `--with-cloog-lib=CLOOGINSTALLDIR/lib' and
+     `--with-cloog-include=CLOOGINSTALLDIR/include'.  If these
+     shorthand assumptions are not correct, you can use the explicit
+     include and lib options directly.
+
+     These flags are applicable to the host platform only.  When
+     building a cross compiler, they will not be used to configure
+     target libraries.
+
+`--with-host-libstdcxx=LINKER-ARGS'
+     If you are linking with a static copy of PPL, you can use this
+     option to specify how the linker should find the standard C++
+     library used internally by PPL.  Typical values of LINKER-ARGS
+     might be `-lstdc++' or `-Wl,-Bstatic,-lstdc++,-Bdynamic -lm'.  If
+     you are linking with a shared copy of PPL, you probably do not
+     need this option; shared library dependencies will cause the
+     linker to search for the standard C++ library automatically.
+
+`--with-stage1-ldflags=FLAGS'
+     This option may be used to set linker flags to be used when linking
+     stage 1 of GCC.  These are also used when linking GCC if
+     configured with `--disable-bootstrap'.  By default no special
+     flags are used.
+
+`--with-stage1-libs=LIBS'
+     This option may be used to set libraries to be used when linking
+     stage 1 of GCC.  These are also used when linking GCC if
+     configured with `--disable-bootstrap'.  The default is the
+     argument to `--with-host-libstdcxx', if specified.
+
+`--with-boot-ldflags=FLAGS'
+     This option may be used to set linker flags to be used when linking
+     stage 2 and later when bootstrapping GCC.  If neither
+     -with-boot-libs nor -with-host-libstdcxx is set to a value, then
+     the default is `-static-libstdc++ -static-libgcc'.
+
+`--with-boot-libs=LIBS'
+     This option may be used to set libraries to be used when linking
+     stage 2 and later when bootstrapping GCC.  The default is the
+     argument to `--with-host-libstdcxx', if specified.
+
+`--with-debug-prefix-map=MAP'
+     Convert source directory names using `-fdebug-prefix-map' when
+     building runtime libraries.  `MAP' is a space-separated list of
+     maps of the form `OLD=NEW'.
+
+`--enable-linker-build-id'
+     Tells GCC to pass `--build-id' option to the linker for all final
+     links (links performed without the `-r' or `--relocatable'
+     option), if the linker supports it.  If you specify
+     `--enable-linker-build-id', but your linker does not support
+     `--build-id' option, a warning is issued and the
+     `--enable-linker-build-id' option is ignored.  The default is off.
+
+`--enable-gnu-unique-object'
+`--disable-gnu-unique-object'
+     Tells GCC to use the gnu_unique_object relocation for C++ template
+     static data members and inline function local statics.  Enabled by
+     default for a native toolchain with an assembler that accepts it
+     and GLIBC 2.11 or above, otherwise disabled.
+
+`--enable-lto'
+`--disable-lto'
+     Enable support for link-time optimization (LTO).  This is enabled
+     by default, and may be disabled using `--disable-lto'.
+
+`--with-plugin-ld=PATHNAME'
+     Enable an alternate linker to be used at link-time optimization
+     (LTO) link time when `-fuse-linker-plugin' is enabled.  This
+     linker should have plugin support such as gold starting with
+     version 2.20 or GNU ld starting with version 2.21.  See
+     `-fuse-linker-plugin' for details.
+
+Cross-Compiler-Specific Options
+-------------------------------
+
+The following options only apply to building cross compilers.
+
+`--with-sysroot'
+`--with-sysroot=DIR'
+     Tells GCC to consider DIR as the root of a tree that contains (a
+     subset of) the root filesystem of the target operating system.
+     Target system headers, libraries and run-time object files will be
+     searched in there.  More specifically, this acts as if
+     `--sysroot=DIR' was added to the default options of the built
+     compiler.  The specified directory is not copied into the install
+     tree, unlike the options `--with-headers' and `--with-libs' that
+     this option obsoletes.  The default value, in case
+     `--with-sysroot' is not given an argument, is
+     `${gcc_tooldir}/sys-root'.  If the specified directory is a
+     subdirectory of `${exec_prefix}', then it will be found relative to
+     the GCC binaries if the installation tree is moved.
+
+     This option affects the system root for the compiler used to build
+     target libraries (which runs on the build system) and the compiler
+     newly installed with `make install'; it does not affect the
+     compiler which is used to build GCC itself.
+
+`--with-build-sysroot'
+`--with-build-sysroot=DIR'
+     Tells GCC to consider DIR as the system root (see
+     `--with-sysroot') while building target libraries, instead of the
+     directory specified with `--with-sysroot'.  This option is only
+     useful when you are already using `--with-sysroot'.  You can use
+     `--with-build-sysroot' when you are configuring with `--prefix'
+     set to a directory that is different from the one in which you are
+     installing GCC and your target libraries.
+
+     This option affects the system root for the compiler used to build
+     target libraries (which runs on the build system); it does not
+     affect the compiler which is used to build GCC itself.
+
+`--with-headers'
+`--with-headers=DIR'
+     Deprecated in favor of `--with-sysroot'.  Specifies that target
+     headers are available when building a cross compiler.  The DIR
+     argument specifies a directory which has the target include files.
+     These include files will be copied into the `gcc' install
+     directory.  _This option with the DIR argument is required_ when
+     building a cross compiler, if `PREFIX/TARGET/sys-include' doesn't
+     pre-exist.  If `PREFIX/TARGET/sys-include' does pre-exist, the DIR
+     argument may be omitted.  `fixincludes' will be run on these files
+     to make them compatible with GCC.
+
+`--without-headers'
+     Tells GCC not use any target headers from a libc when building a
+     cross compiler.  When crossing to GNU/Linux, you need the headers
+     so GCC can build the exception handling for libgcc.
+
+`--with-libs'
+`--with-libs="DIR1 DIR2 ... DIRN"'
+     Deprecated in favor of `--with-sysroot'.  Specifies a list of
+     directories which contain the target runtime libraries.  These
+     libraries will be copied into the `gcc' install directory.  If the
+     directory list is omitted, this option has no effect.
+
+`--with-newlib'
+     Specifies that `newlib' is being used as the target C library.
+     This causes `__eprintf' to be omitted from `libgcc.a' on the
+     assumption that it will be provided by `newlib'.
+
+`--with-build-time-tools=DIR'
+     Specifies where to find the set of target tools (assembler,
+     linker, etc.)  that will be used while building GCC itself.  This
+     option can be useful if the directory layouts are different
+     between the system you are building GCC on, and the system where
+     you will deploy it.
+
+     For example, on an `ia64-hp-hpux' system, you may have the GNU
+     assembler and linker in `/usr/bin', and the native tools in a
+     different path, and build a toolchain that expects to find the
+     native tools in `/usr/bin'.
+
+     When you use this option, you should ensure that DIR includes
+     `ar', `as', `ld', `nm', `ranlib' and `strip' if necessary, and
+     possibly `objdump'.  Otherwise, GCC may use an inconsistent set of
+     tools.
+
+Java-Specific Options
+---------------------
+
+The following option applies to the build of the Java front end.
+
+`--disable-libgcj'
+     Specify that the run-time libraries used by GCJ should not be
+     built.  This is useful in case you intend to use GCJ with some
+     other run-time, or you're going to install it separately, or it
+     just happens not to build on your particular machine.  In general,
+     if the Java front end is enabled, the GCJ libraries will be
+     enabled too, unless they're known to not work on the target
+     platform.  If GCJ is enabled but `libgcj' isn't built, you may
+     need to port it; in this case, before modifying the top-level
+     `configure.in' so that `libgcj' is enabled by default on this
+     platform, you may use `--enable-libgcj' to override the default.
+
+
+   The following options apply to building `libgcj'.
+
+General Options
+...............
+
+`--enable-java-maintainer-mode'
+     By default the `libjava' build will not attempt to compile the
+     `.java' source files to `.class'.  Instead, it will use the
+     `.class' files from the source tree.  If you use this option you
+     must have executables named `ecj1' and `gjavah' in your path for
+     use by the build.  You must use this option if you intend to
+     modify any `.java' files in `libjava'.
+
+`--with-java-home=DIRNAME'
+     This `libjava' option overrides the default value of the
+     `java.home' system property.  It is also used to set
+     `sun.boot.class.path' to `DIRNAME/lib/rt.jar'.  By default
+     `java.home' is set to `PREFIX' and `sun.boot.class.path' to
+     `DATADIR/java/libgcj-VERSION.jar'.
+
+`--with-ecj-jar=FILENAME'
+     This option can be used to specify the location of an external jar
+     file containing the Eclipse Java compiler.  A specially modified
+     version of this compiler is used by `gcj' to parse `.java' source
+     files.  If this option is given, the `libjava' build will create
+     and install an `ecj1' executable which uses this jar file at
+     runtime.
+
+     If this option is not given, but an `ecj.jar' file is found in the
+     topmost source tree at configure time, then the `libgcj' build
+     will create and install `ecj1', and will also install the
+     discovered `ecj.jar' into a suitable place in the install tree.
+
+     If `ecj1' is not installed, then the user will have to supply one
+     on his path in order for `gcj' to properly parse `.java' source
+     files.  A suitable jar is available from
+     `ftp://sourceware.org/pub/java/'.
+
+`--disable-getenv-properties'
+     Don't set system properties from `GCJ_PROPERTIES'.
+
+`--enable-hash-synchronization'
+     Use a global hash table for monitor locks.  Ordinarily, `libgcj''s
+     `configure' script automatically makes the correct choice for this
+     option for your platform.  Only use this if you know you need the
+     library to be configured differently.
+
+`--enable-interpreter'
+     Enable the Java interpreter.  The interpreter is automatically
+     enabled by default on all platforms that support it.  This option
+     is really only useful if you want to disable the interpreter
+     (using `--disable-interpreter').
+
+`--disable-java-net'
+     Disable java.net.  This disables the native part of java.net only,
+     using non-functional stubs for native method implementations.
+
+`--disable-jvmpi'
+     Disable JVMPI support.
+
+`--disable-libgcj-bc'
+     Disable BC ABI compilation of certain parts of libgcj.  By default,
+     some portions of libgcj are compiled with `-findirect-dispatch'
+     and `-fno-indirect-classes', allowing them to be overridden at
+     run-time.
+
+     If `--disable-libgcj-bc' is specified, libgcj is built without
+     these options.  This allows the compile-time linker to resolve
+     dependencies when statically linking to libgcj.  However it makes
+     it impossible to override the affected portions of libgcj at
+     run-time.
+
+`--enable-reduced-reflection'
+     Build most of libgcj with `-freduced-reflection'.  This reduces
+     the size of libgcj at the expense of not being able to do accurate
+     reflection on the classes it contains.  This option is safe if you
+     know that code using libgcj will never use reflection on the
+     standard runtime classes in libgcj (including using serialization,
+     RMI or CORBA).
+
+`--with-ecos'
+     Enable runtime eCos target support.
+
+`--without-libffi'
+     Don't use `libffi'.  This will disable the interpreter and JNI
+     support as well, as these require `libffi' to work.
+
+`--enable-libgcj-debug'
+     Enable runtime debugging code.
+
+`--enable-libgcj-multifile'
+     If specified, causes all `.java' source files to be compiled into
+     `.class' files in one invocation of `gcj'.  This can speed up
+     build time, but is more resource-intensive.  If this option is
+     unspecified or disabled, `gcj' is invoked once for each `.java'
+     file to compile into a `.class' file.
+
+`--with-libiconv-prefix=DIR'
+     Search for libiconv in `DIR/include' and `DIR/lib'.
+
+`--enable-sjlj-exceptions'
+     Force use of the `setjmp'/`longjmp'-based scheme for exceptions.
+     `configure' ordinarily picks the correct value based on the
+     platform.  Only use this option if you are sure you need a
+     different setting.
+
+`--with-system-zlib'
+     Use installed `zlib' rather than that included with GCC.
+
+`--with-win32-nlsapi=ansi, unicows or unicode'
+     Indicates how MinGW `libgcj' translates between UNICODE characters
+     and the Win32 API.
+
+`--enable-java-home'
+     If enabled, this creates a JPackage compatible SDK environment
+     during install.  Note that if -enable-java-home is used,
+     -with-arch-directory=ARCH must also be specified.
+
+`--with-arch-directory=ARCH'
+     Specifies the name to use for the `jre/lib/ARCH' directory in the
+     SDK environment created when -enable-java-home is passed. Typical
+     names for this directory include i386, amd64, ia64, etc.
+
+`--with-os-directory=DIR'
+     Specifies the OS directory for the SDK include directory. This is
+     set to auto detect, and is typically 'linux'.
+
+`--with-origin-name=NAME'
+     Specifies the JPackage origin name. This defaults to the 'gcj' in
+     java-1.5.0-gcj.
+
+`--with-arch-suffix=SUFFIX'
+     Specifies the suffix for the sdk directory. Defaults to the empty
+     string.  Examples include '.x86_64' in
+     'java-1.5.0-gcj-1.5.0.0.x86_64'.
+
+`--with-jvm-root-dir=DIR'
+     Specifies where to install the SDK. Default is $(prefix)/lib/jvm.
+
+`--with-jvm-jar-dir=DIR'
+     Specifies where to install jars. Default is
+     $(prefix)/lib/jvm-exports.
+
+`--with-python-dir=DIR'
+     Specifies where to install the Python modules used for
+     aot-compile. DIR should not include the prefix used in
+     installation. For example, if the Python modules are to be
+     installed in /usr/lib/python2.5/site-packages, then
+     -with-python-dir=/lib/python2.5/site-packages should be passed. If
+     this is not specified, then the Python modules are installed in
+     $(prefix)/share/python.
+
+`--enable-aot-compile-rpm'
+     Adds aot-compile-rpm to the list of installed scripts.
+
+`--enable-browser-plugin'
+     Build the gcjwebplugin web browser plugin.
+
+    `ansi'
+          Use the single-byte `char' and the Win32 A functions natively,
+          translating to and from UNICODE when using these functions.
+          If unspecified, this is the default.
+
+    `unicows'
+          Use the `WCHAR' and Win32 W functions natively.  Adds
+          `-lunicows' to `libgcj.spec' to link with `libunicows'.
+          `unicows.dll' needs to be deployed on Microsoft Windows 9X
+          machines running built executables.  `libunicows.a', an
+          open-source import library around Microsoft's `unicows.dll',
+          is obtained from `http://libunicows.sourceforge.net/', which
+          also gives details on getting `unicows.dll' from Microsoft.
+
+    `unicode'
+          Use the `WCHAR' and Win32 W functions natively.  Does _not_
+          add `-lunicows' to `libgcj.spec'.  The built executables will
+          only run on Microsoft Windows NT and above.
+
+AWT-Specific Options
+....................
+
+`--with-x'
+     Use the X Window System.
+
+`--enable-java-awt=PEER(S)'
+     Specifies the AWT peer library or libraries to build alongside
+     `libgcj'.  If this option is unspecified or disabled, AWT will be
+     non-functional.  Current valid values are `gtk' and `xlib'.
+     Multiple libraries should be separated by a comma (i.e.
+     `--enable-java-awt=gtk,xlib').
+
+`--enable-gtk-cairo'
+     Build the cairo Graphics2D implementation on GTK.
+
+`--enable-java-gc=TYPE'
+     Choose garbage collector.  Defaults to `boehm' if unspecified.
+
+`--disable-gtktest'
+     Do not try to compile and run a test GTK+ program.
+
+`--disable-glibtest'
+     Do not try to compile and run a test GLIB program.
+
+`--with-libart-prefix=PFX'
+     Prefix where libart is installed (optional).
+
+`--with-libart-exec-prefix=PFX'
+     Exec prefix where libart is installed (optional).
+
+`--disable-libarttest'
+     Do not try to compile and run a test libart program.
+
+
+Overriding `configure' test results
+...................................
+
+Sometimes, it might be necessary to override the result of some
+`configure' test, for example in order to ease porting to a new system
+or work around a bug in a test.  The toplevel `configure' script
+provides three variables for this:
+
+`build_configargs'
+     The contents of this variable is passed to all build `configure'
+     scripts.
+
+`host_configargs'
+     The contents of this variable is passed to all host `configure'
+     scripts.
+
+`target_configargs'
+     The contents of this variable is passed to all target `configure'
+     scripts.
+
+
+   In order to avoid shell and `make' quoting issues for complex
+overrides, you can pass a setting for `CONFIG_SITE' and set variables
+in the site file.
+
+
+File: gccinstall.info,  Node: Building,  Next: Testing,  Prev: Configuration,  Up: Installing GCC
+
+5 Building
+**********
+
+   Now that GCC is configured, you are ready to build the compiler and
+runtime libraries.
+
+   Some commands executed when making the compiler may fail (return a
+nonzero status) and be ignored by `make'.  These failures, which are
+often due to files that were not found, are expected, and can safely be
+ignored.
+
+   It is normal to have compiler warnings when compiling certain files.
+Unless you are a GCC developer, you can generally ignore these warnings
+unless they cause compilation to fail.  Developers should attempt to fix
+any warnings encountered, however they can temporarily continue past
+warnings-as-errors by specifying the configure flag `--disable-werror'.
+
+   On certain old systems, defining certain environment variables such
+as `CC' can interfere with the functioning of `make'.
+
+   If you encounter seemingly strange errors when trying to build the
+compiler in a directory other than the source directory, it could be
+because you have previously configured the compiler in the source
+directory.  Make sure you have done all the necessary preparations.
+
+   If you build GCC on a BSD system using a directory stored in an old
+System V file system, problems may occur in running `fixincludes' if the
+System V file system doesn't support symbolic links.  These problems
+result in a failure to fix the declaration of `size_t' in
+`sys/types.h'.  If you find that `size_t' is a signed type and that
+type mismatches occur, this could be the cause.
+
+   The solution is not to use such a directory for building GCC.
+
+   Similarly, when building from SVN or snapshots, or if you modify
+`*.l' files, you need the Flex lexical analyzer generator installed.
+If you do not modify `*.l' files, releases contain the Flex-generated
+files and you do not need Flex installed to build them.  There is still
+one Flex-based lexical analyzer (part of the build machinery, not of
+GCC itself) that is used even if you only build the C front end.
+
+   When building from SVN or snapshots, or if you modify Texinfo
+documentation, you need version 4.7 or later of Texinfo installed if you
+want Info documentation to be regenerated.  Releases contain Info
+documentation pre-built for the unmodified documentation in the release.
+
+5.1 Building a native compiler
+==============================
+
+For a native build, the default configuration is to perform a 3-stage
+bootstrap of the compiler when `make' is invoked.  This will build the
+entire GCC system and ensure that it compiles itself correctly.  It can
+be disabled with the `--disable-bootstrap' parameter to `configure',
+but bootstrapping is suggested because the compiler will be tested more
+completely and could also have better performance.
+
+   The bootstrapping process will complete the following steps:
+
+   * Build tools necessary to build the compiler.
+
+   * Perform a 3-stage bootstrap of the compiler.  This includes
+     building three times the target tools for use by the compiler such
+     as binutils (bfd, binutils, gas, gprof, ld, and opcodes) if they
+     have been individually linked or moved into the top level GCC
+     source tree before configuring.
+
+   * Perform a comparison test of the stage2 and stage3 compilers.
+
+   * Build runtime libraries using the stage3 compiler from the
+     previous step.
+
+
+   If you are short on disk space you might consider `make
+bootstrap-lean' instead.  The sequence of compilation is the same
+described above, but object files from the stage1 and stage2 of the
+3-stage bootstrap of the compiler are deleted as soon as they are no
+longer needed.
+
+   If you wish to use non-default GCC flags when compiling the stage2
+and stage3 compilers, set `BOOT_CFLAGS' on the command line when doing
+`make'.  For example, if you want to save additional space during the
+bootstrap and in the final installation as well, you can build the
+compiler binaries without debugging information as in the following
+example.  This will save roughly 40% of disk space both for the
+bootstrap and the final installation.  (Libraries will still contain
+debugging information.)
+
+     make BOOT_CFLAGS='-O' bootstrap
+
+   You can place non-default optimization flags into `BOOT_CFLAGS'; they
+are less well tested here than the default of `-g -O2', but should
+still work.  In a few cases, you may find that you need to specify
+special flags such as `-msoft-float' here to complete the bootstrap; or,
+if the native compiler miscompiles the stage1 compiler, you may need to
+work around this, by choosing `BOOT_CFLAGS' to avoid the parts of the
+stage1 compiler that were miscompiled, or by using `make bootstrap4' to
+increase the number of stages of bootstrap.
+
+   `BOOT_CFLAGS' does not apply to bootstrapped target libraries.
+Since these are always compiled with the compiler currently being
+bootstrapped, you can use `CFLAGS_FOR_TARGET' to modify their
+compilation flags, as for non-bootstrapped target libraries.  Again, if
+the native compiler miscompiles the stage1 compiler, you may need to
+work around this by avoiding non-working parts of the stage1 compiler.
+Use `STAGE1_TFLAGS' to this end.
+
+   If you used the flag `--enable-languages=...' to restrict the
+compilers to be built, only those you've actually enabled will be
+built.  This will of course only build those runtime libraries, for
+which the particular compiler has been built.  Please note, that
+re-defining `LANGUAGES' when calling `make' *does not* work anymore!
+
+   If the comparison of stage2 and stage3 fails, this normally indicates
+that the stage2 compiler has compiled GCC incorrectly, and is therefore
+a potentially serious bug which you should investigate and report.  (On
+a few systems, meaningful comparison of object files is impossible; they
+always appear "different".  If you encounter this problem, you will
+need to disable comparison in the `Makefile'.)
+
+   If you do not want to bootstrap your compiler, you can configure with
+`--disable-bootstrap'.  In particular cases, you may want to bootstrap
+your compiler even if the target system is not the same as the one you
+are building on: for example, you could build a
+`powerpc-unknown-linux-gnu' toolchain on a
+`powerpc64-unknown-linux-gnu' host.  In this case, pass
+`--enable-bootstrap' to the configure script.
+
+   `BUILD_CONFIG' can be used to bring in additional customization to
+the build.  It can be set to a whitespace-separated list of names.  For
+each such `NAME', top-level `config/`NAME'.mk' will be included by the
+top-level `Makefile', bringing in any settings it contains.  The
+default `BUILD_CONFIG' can be set using the configure option
+`--with-build-config=`NAME'...'.  Some examples of supported build
+configurations are:
+
+`bootstrap-O1'
+     Removes any `-O'-started option from `BOOT_CFLAGS', and adds `-O1'
+     to it.  `BUILD_CONFIG=bootstrap-O1' is equivalent to
+     `BOOT_CFLAGS='-g -O1''.
+
+`bootstrap-O3'
+     Analogous to `bootstrap-O1'.
+
+`bootstrap-lto'
+     Enables Link-Time Optimization for host tools during bootstrapping.
+     `BUILD_CONFIG=bootstrap-lto' is equivalent to adding `-flto' to
+     `BOOT_CFLAGS'.
+
+`bootstrap-debug'
+     Verifies that the compiler generates the same executable code,
+     whether or not it is asked to emit debug information.  To this
+     end, this option builds stage2 host programs without debug
+     information, and uses `contrib/compare-debug' to compare them with
+     the stripped stage3 object files.  If `BOOT_CFLAGS' is overridden
+     so as to not enable debug information, stage2 will have it, and
+     stage3 won't.  This option is enabled by default when GCC
+     bootstrapping is enabled, if `strip' can turn object files
+     compiled with and without debug info into identical object files.
+     In addition to better test coverage, this option makes default
+     bootstraps faster and leaner.
+
+`bootstrap-debug-big'
+     Rather than comparing stripped object files, as in
+     `bootstrap-debug', this option saves internal compiler dumps
+     during stage2 and stage3 and compares them as well, which helps
+     catch additional potential problems, but at a great cost in terms
+     of disk space.  It can be specified in addition to
+     `bootstrap-debug'.
+
+`bootstrap-debug-lean'
+     This option saves disk space compared with `bootstrap-debug-big',
+     but at the expense of some recompilation.  Instead of saving the
+     dumps of stage2 and stage3 until the final compare, it uses
+     `-fcompare-debug' to generate, compare and remove the dumps during
+     stage3, repeating the compilation that already took place in
+     stage2, whose dumps were not saved.
+
+`bootstrap-debug-lib'
+     This option tests executable code invariance over debug information
+     generation on target libraries, just like `bootstrap-debug-lean'
+     tests it on host programs.  It builds stage3 libraries with
+     `-fcompare-debug', and it can be used along with any of the
+     `bootstrap-debug' options above.
+
+     There aren't `-lean' or `-big' counterparts to this option because
+     most libraries are only build in stage3, so bootstrap compares
+     would not get significant coverage.  Moreover, the few libraries
+     built in stage2 are used in stage3 host programs, so we wouldn't
+     want to compile stage2 libraries with different options for
+     comparison purposes.
+
+`bootstrap-debug-ckovw'
+     Arranges for error messages to be issued if the compiler built on
+     any stage is run without the option `-fcompare-debug'.  This is
+     useful to verify the full `-fcompare-debug' testing coverage.  It
+     must be used along with `bootstrap-debug-lean' and
+     `bootstrap-debug-lib'.
+
+`bootstrap-time'
+     Arranges for the run time of each program started by the GCC
+     driver, built in any stage, to be logged to `time.log', in the top
+     level of the build tree.
+
+
+5.2 Building a cross compiler
+=============================
+
+When building a cross compiler, it is not generally possible to do a
+3-stage bootstrap of the compiler.  This makes for an interesting
+problem as parts of GCC can only be built with GCC.
+
+   To build a cross compiler, we recommend first building and
+installing a native compiler.  You can then use the native GCC compiler
+to build the cross compiler.  The installed native compiler needs to be
+GCC version 2.95 or later.
+
+   If the cross compiler is to be built with support for the Java
+programming language and the ability to compile .java source files is
+desired, the installed native compiler used to build the cross compiler
+needs to be the same GCC version as the cross compiler.  In addition
+the cross compiler needs to be configured with `--with-ecj-jar=...'.
+
+   Assuming you have already installed a native copy of GCC and
+configured your cross compiler, issue the command `make', which
+performs the following steps:
+
+   * Build host tools necessary to build the compiler.
+
+   * Build target tools for use by the compiler such as binutils (bfd,
+     binutils, gas, gprof, ld, and opcodes) if they have been
+     individually linked or moved into the top level GCC source tree
+     before configuring.
+
+   * Build the compiler (single stage only).
+
+   * Build runtime libraries using the compiler from the previous step.
+
+   Note that if an error occurs in any step the make process will exit.
+
+   If you are not building GNU binutils in the same source tree as GCC,
+you will need a cross-assembler and cross-linker installed before
+configuring GCC.  Put them in the directory `PREFIX/TARGET/bin'.  Here
+is a table of the tools you should put in this directory:
+
+`as'
+     This should be the cross-assembler.
+
+`ld'
+     This should be the cross-linker.
+
+`ar'
+     This should be the cross-archiver: a program which can manipulate
+     archive files (linker libraries) in the target machine's format.
+
+`ranlib'
+     This should be a program to construct a symbol table in an archive
+     file.
+
+   The installation of GCC will find these programs in that directory,
+and copy or link them to the proper place to for the cross-compiler to
+find them when run later.
+
+   The easiest way to provide these files is to build the Binutils
+package.  Configure it with the same `--host' and `--target' options
+that you use for configuring GCC, then build and install them.  They
+install their executables automatically into the proper directory.
+Alas, they do not support all the targets that GCC supports.
+
+   If you are not building a C library in the same source tree as GCC,
+you should also provide the target libraries and headers before
+configuring GCC, specifying the directories with `--with-sysroot' or
+`--with-headers' and `--with-libs'.  Many targets also require "start
+files" such as `crt0.o' and `crtn.o' which are linked into each
+executable.  There may be several alternatives for `crt0.o', for use
+with profiling or other compilation options.  Check your target's
+definition of `STARTFILE_SPEC' to find out what start files it uses.
+
+5.3 Building in parallel
+========================
+
+GNU Make 3.80 and above, which is necessary to build GCC, support
+building in parallel.  To activate this, you can use `make -j 2'
+instead of `make'.  You can also specify a bigger number, and in most
+cases using a value greater than the number of processors in your
+machine will result in fewer and shorter I/O latency hits, thus
+improving overall throughput; this is especially true for slow drives
+and network filesystems.
+
+5.4 Building the Ada compiler
+=============================
+
+In order to build GNAT, the Ada compiler, you need a working GNAT
+compiler (GCC version 4.0 or later).  This includes GNAT tools such as
+`gnatmake' and `gnatlink', since the Ada front end is written in Ada and
+uses some GNAT-specific extensions.
+
+   In order to build a cross compiler, it is suggested to install the
+new compiler as native first, and then use it to build the cross
+compiler.
+
+   `configure' does not test whether the GNAT installation works and
+has a sufficiently recent version; if too old a GNAT version is
+installed, the build will fail unless `--enable-languages' is used to
+disable building the Ada front end.
+
+   `ADA_INCLUDE_PATH' and `ADA_OBJECT_PATH' environment variables must
+not be set when building the Ada compiler, the Ada tools, or the Ada
+runtime libraries. You can check that your build environment is clean
+by verifying that `gnatls -v' lists only one explicit path in each
+section.
+
+5.5 Building with profile feedback
+==================================
+
+It is possible to use profile feedback to optimize the compiler itself.
+This should result in a faster compiler binary.  Experiments done on
+x86 using gcc 3.3 showed approximately 7 percent speedup on compiling C
+programs.  To bootstrap the compiler with profile feedback, use `make
+profiledbootstrap'.
+
+   When `make profiledbootstrap' is run, it will first build a `stage1'
+compiler.  This compiler is used to build a `stageprofile' compiler
+instrumented to collect execution counts of instruction and branch
+probabilities.  Then runtime libraries are compiled with profile
+collected.  Finally a `stagefeedback' compiler is built using the
+information collected.
+
+   Unlike standard bootstrap, several additional restrictions apply.
+The compiler used to build `stage1' needs to support a 64-bit integral
+type.  It is recommended to only use GCC for this.  Also parallel make
+is currently not supported since collisions in profile collecting may
+occur.
+
+
+File: gccinstall.info,  Node: Testing,  Next: Final install,  Prev: Building,  Up: Installing GCC
+
+6 Installing GCC: Testing
+*************************
+
+   Before you install GCC, we encourage you to run the testsuites and to
+compare your results with results from a similar configuration that have
+been submitted to the gcc-testresults mailing list.  Some of these
+archived results are linked from the build status lists at
+`http://gcc.gnu.org/buildstat.html', although not everyone who reports
+a successful build runs the testsuites and submits the results.  This
+step is optional and may require you to download additional software,
+but it can give you confidence in your new GCC installation or point out
+problems before you install and start using your new GCC.
+
+   First, you must have downloaded the testsuites.  These are part of
+the full distribution, but if you downloaded the "core" compiler plus
+any front ends, you must download the testsuites separately.
+
+   Second, you must have the testing tools installed.  This includes
+DejaGnu, Tcl, and Expect; the DejaGnu site has links to these.
+
+   If the directories where `runtest' and `expect' were installed are
+not in the `PATH', you may need to set the following environment
+variables appropriately, as in the following example (which assumes
+that DejaGnu has been installed under `/usr/local'):
+
+     TCL_LIBRARY = /usr/local/share/tcl8.0
+     DEJAGNULIBS = /usr/local/share/dejagnu
+
+   (On systems such as Cygwin, these paths are required to be actual
+paths, not mounts or links; presumably this is due to some lack of
+portability in the DejaGnu code.)
+
+   Finally, you can run the testsuite (which may take a long time):
+     cd OBJDIR; make -k check
+
+   This will test various components of GCC, such as compiler front
+ends and runtime libraries.  While running the testsuite, DejaGnu might
+emit some harmless messages resembling `WARNING: Couldn't find the
+global config file.' or `WARNING: Couldn't find tool init file' that
+can be ignored.
+
+   If you are testing a cross-compiler, you may want to run the
+testsuite on a simulator as described at
+`http://gcc.gnu.org/simtest-howto.html'.
+
+6.1 How can you run the testsuite on selected tests?
+====================================================
+
+In order to run sets of tests selectively, there are targets `make
+check-gcc' and `make check-g++' in the `gcc' subdirectory of the object
+directory.  You can also just run `make check' in a subdirectory of the
+object directory.
+
+   A more selective way to just run all `gcc' execute tests in the
+testsuite is to use
+
+     make check-gcc RUNTESTFLAGS="execute.exp OTHER-OPTIONS"
+
+   Likewise, in order to run only the `g++' "old-deja" tests in the
+testsuite with filenames matching `9805*', you would use
+
+     make check-g++ RUNTESTFLAGS="old-deja.exp=9805* OTHER-OPTIONS"
+
+   The `*.exp' files are located in the testsuite directories of the GCC
+source, the most important ones being `compile.exp', `execute.exp',
+`dg.exp' and `old-deja.exp'.  To get a list of the possible `*.exp'
+files, pipe the output of `make check' into a file and look at the
+`Running ...  .exp' lines.
+
+6.2 Passing options and running multiple testsuites
+===================================================
+
+You can pass multiple options to the testsuite using the
+`--target_board' option of DejaGNU, either passed as part of
+`RUNTESTFLAGS', or directly to `runtest' if you prefer to work outside
+the makefiles.  For example,
+
+     make check-g++ RUNTESTFLAGS="--target_board=unix/-O3/-fmerge-constants"
+
+   will run the standard `g++' testsuites ("unix" is the target name
+for a standard native testsuite situation), passing `-O3
+-fmerge-constants' to the compiler on every test, i.e., slashes
+separate options.
+
+   You can run the testsuites multiple times using combinations of
+options with a syntax similar to the brace expansion of popular shells:
+
+     ..."--target_board=arm-sim\{-mhard-float,-msoft-float\}\{-O1,-O2,-O3,\}"
+
+   (Note the empty option caused by the trailing comma in the final
+group.)  The following will run each testsuite eight times using the
+`arm-sim' target, as if you had specified all possible combinations
+yourself:
+
+     --target_board=arm-sim/-mhard-float/-O1
+     --target_board=arm-sim/-mhard-float/-O2
+     --target_board=arm-sim/-mhard-float/-O3
+     --target_board=arm-sim/-mhard-float
+     --target_board=arm-sim/-msoft-float/-O1
+     --target_board=arm-sim/-msoft-float/-O2
+     --target_board=arm-sim/-msoft-float/-O3
+     --target_board=arm-sim/-msoft-float
+
+   They can be combined as many times as you wish, in arbitrary ways.
+This list:
+
+     ..."--target_board=unix/-Wextra\{-O3,-fno-strength\}\{-fomit-frame,\}"
+
+   will generate four combinations, all involving `-Wextra'.
+
+   The disadvantage to this method is that the testsuites are run in
+serial, which is a waste on multiprocessor systems.  For users with GNU
+Make and a shell which performs brace expansion, you can run the
+testsuites in parallel by having the shell perform the combinations and
+`make' do the parallel runs.  Instead of using `--target_board', use a
+special makefile target:
+
+     make -jN check-TESTSUITE//TEST-TARGET/OPTION1/OPTION2/...
+
+   For example,
+
+     make -j3 check-gcc//sh-hms-sim/{-m1,-m2,-m3,-m3e,-m4}/{,-nofpu}
+
+   will run three concurrent "make-gcc" testsuites, eventually testing
+all ten combinations as described above.  Note that this is currently
+only supported in the `gcc' subdirectory.  (To see how this works, try
+typing `echo' before the example given here.)
+
+6.3 Additional testing for Java Class Libraries
+===============================================
+
+The Java runtime tests can be executed via `make check' in the
+`TARGET/libjava/testsuite' directory in the build tree.
+
+   The Mauve Project provides a suite of tests for the Java Class
+Libraries.  This suite can be run as part of libgcj testing by placing
+the Mauve tree within the libjava testsuite at
+`libjava/testsuite/libjava.mauve/mauve', or by specifying the location
+of that tree when invoking `make', as in `make MAUVEDIR=~/mauve check'.
+
+6.4 How to interpret test results
+=================================
+
+The result of running the testsuite are various `*.sum' and `*.log'
+files in the testsuite subdirectories.  The `*.log' files contain a
+detailed log of the compiler invocations and the corresponding results,
+the `*.sum' files summarize the results.  These summaries contain
+status codes for all tests:
+
+   * PASS: the test passed as expected
+
+   * XPASS: the test unexpectedly passed
+
+   * FAIL: the test unexpectedly failed
+
+   * XFAIL: the test failed as expected
+
+   * UNSUPPORTED: the test is not supported on this platform
+
+   * ERROR: the testsuite detected an error
+
+   * WARNING: the testsuite detected a possible problem
+
+   It is normal for some tests to report unexpected failures.  At the
+current time the testing harness does not allow fine grained control
+over whether or not a test is expected to fail.  This problem should be
+fixed in future releases.
+
+6.5 Submitting test results
+===========================
+
+If you want to report the results to the GCC project, use the
+`contrib/test_summary' shell script.  Start it in the OBJDIR with
+
+     SRCDIR/contrib/test_summary -p your_commentary.txt \
+         -m gcc-testresults@gcc.gnu.org |sh
+
+   This script uses the `Mail' program to send the results, so make
+sure it is in your `PATH'.  The file `your_commentary.txt' is prepended
+to the testsuite summary and should contain any special remarks you
+have on your results or your build environment.  Please do not edit the
+testsuite result block or the subject line, as these messages may be
+automatically processed.
+
+
+File: gccinstall.info,  Node: Final install,  Prev: Testing,  Up: Installing GCC
+
+7 Installing GCC: Final installation
+************************************
+
+   Now that GCC has been built (and optionally tested), you can install
+it with
+     cd OBJDIR && make install
+
+   We strongly recommend to install into a target directory where there
+is no previous version of GCC present.  Also, the GNAT runtime should
+not be stripped, as this would break certain features of the debugger
+that depend on this debugging information (catching Ada exceptions for
+instance).
+
+   That step completes the installation of GCC; user level binaries can
+be found in `PREFIX/bin' where PREFIX is the value you specified with
+the `--prefix' to configure (or `/usr/local' by default).  (If you
+specified `--bindir', that directory will be used instead; otherwise,
+if you specified `--exec-prefix', `EXEC-PREFIX/bin' will be used.)
+Headers for the C++ and Java libraries are installed in
+`PREFIX/include'; libraries in `LIBDIR' (normally `PREFIX/lib');
+internal parts of the compiler in `LIBDIR/gcc' and `LIBEXECDIR/gcc';
+documentation in info format in `INFODIR' (normally `PREFIX/info').
+
+   When installing cross-compilers, GCC's executables are not only
+installed into `BINDIR', that is, `EXEC-PREFIX/bin', but additionally
+into `EXEC-PREFIX/TARGET-ALIAS/bin', if that directory exists.
+Typically, such "tooldirs" hold target-specific binutils, including
+assembler and linker.
+
+   Installation into a temporary staging area or into a `chroot' jail
+can be achieved with the command
+
+     make DESTDIR=PATH-TO-ROOTDIR install
+
+where PATH-TO-ROOTDIR is the absolute path of a directory relative to
+which all installation paths will be interpreted.  Note that the
+directory specified by `DESTDIR' need not exist yet; it will be created
+if necessary.
+
+   There is a subtle point with tooldirs and `DESTDIR': If you relocate
+a cross-compiler installation with e.g. `DESTDIR=ROOTDIR', then the
+directory `ROOTDIR/EXEC-PREFIX/TARGET-ALIAS/bin' will be filled with
+duplicated GCC executables only if it already exists, it will not be
+created otherwise.  This is regarded as a feature, not as a bug,
+because it gives slightly more control to the packagers using the
+`DESTDIR' feature.
+
+   You can install stripped programs and libraries with
+
+     make install-strip
+
+   If you are bootstrapping a released version of GCC then please
+quickly review the build status page for your release, available from
+`http://gcc.gnu.org/buildstat.html'.  If your system is not listed for
+the version of GCC that you built, send a note to <gcc@gcc.gnu.org>
+indicating that you successfully built and installed GCC.  Include the
+following information:
+
+   * Output from running `SRCDIR/config.guess'.  Do not send that file
+     itself, just the one-line output from running it.
+
+   * The output of `gcc -v' for your newly installed `gcc'.  This tells
+     us which version of GCC you built and the options you passed to
+     configure.
+
+   * Whether you enabled all languages or a subset of them.  If you
+     used a full distribution then this information is part of the
+     configure options in the output of `gcc -v', but if you downloaded
+     the "core" compiler plus additional front ends then it isn't
+     apparent which ones you built unless you tell us about it.
+
+   * If the build was for GNU/Linux, also include:
+        * The distribution name and version (e.g., Red Hat 7.1 or
+          Debian 2.2.3); this information should be available from
+          `/etc/issue'.
+
+        * The version of the Linux kernel, available from `uname
+          --version' or `uname -a'.
+
+        * The version of glibc you used; for RPM-based systems like Red
+          Hat, Mandrake, and SuSE type `rpm -q glibc' to get the glibc
+          version, and on systems like Debian and Progeny use `dpkg -l
+          libc6'.
+     For other systems, you can include similar information if you
+     think it is relevant.
+
+   * Any other information that you think would be useful to people
+     building GCC on the same configuration.  The new entry in the
+     build status list will include a link to the archived copy of your
+     message.
+
+   We'd also like to know if the *note host/target specific
+installation notes: Specific.  didn't include your host/target
+information or if that information is incomplete or out of date.  Send
+a note to <gcc@gcc.gnu.org> detailing how the information should be
+changed.
+
+   If you find a bug, please report it following the bug reporting
+guidelines.
+
+   If you want to print the GCC manuals, do `cd OBJDIR; make dvi'.  You
+will need to have `texi2dvi' (version at least 4.7) and TeX installed.
+This creates a number of `.dvi' files in subdirectories of `OBJDIR';
+these may be converted for printing with programs such as `dvips'.
+Alternately, by using `make pdf' in place of `make dvi', you can create
+documentation in the form of `.pdf' files; this requires `texi2pdf',
+which is included with Texinfo version 4.8 and later.  You can also buy
+printed manuals from the Free Software Foundation, though such manuals
+may not be for the most recent version of GCC.
+
+   If you would like to generate online HTML documentation, do `cd
+OBJDIR; make html' and HTML will be generated for the gcc manuals in
+`OBJDIR/gcc/HTML'.
+
+
+File: gccinstall.info,  Node: Binaries,  Next: Specific,  Prev: Installing GCC,  Up: Top
+
+8 Installing GCC: Binaries
+**************************
+
+   We are often asked about pre-compiled versions of GCC.  While we
+cannot provide these for all platforms, below you'll find links to
+binaries for various platforms where creating them by yourself is not
+easy due to various reasons.
+
+   Please note that we did not create these binaries, nor do we support
+them.  If you have any problems installing them, please contact their
+makers.
+
+   * AIX:
+        * Bull's Freeware and Shareware Archive for AIX;
+
+        * Hudson Valley Community College Open Source Software for IBM
+          System p;
+
+        * AIX 5L and 6 Open Source Packages.
+
+   * DOS--DJGPP.
+
+   * Renesas H8/300[HS]--GNU Development Tools for the Renesas
+     H8/300[HS] Series.
+
+   * HP-UX:
+        * HP-UX Porting Center;
+
+        * Binaries for HP-UX 11.00 at Aachen University of Technology.
+
+   * SCO OpenServer/Unixware.
+
+   * Solaris 2 (SPARC, Intel):
+        * Sunfreeware
+
+        * Blastwave
+
+        * OpenCSW
+
+        * TGCware
+
+   * SGI IRIX:
+        * Nekoware
+
+        * TGCware
+
+   * Microsoft Windows:
+        * The Cygwin project;
+
+        * The MinGW project.
+
+   * The Written Word offers binaries for AIX 4.3.3, 5.1 and 5.2, IRIX
+     6.5, Tru64 UNIX 4.0D and 5.1, GNU/Linux (i386), HP-UX 10.20,
+     11.00, and 11.11, and Solaris/SPARC 2.5.1, 2.6, 7, 8, 9 and 10.
+
+   * OpenPKG offers binaries for quite a number of platforms.
+
+   * The GFortran Wiki has links to GNU Fortran binaries for several
+     platforms.
+
+
+File: gccinstall.info,  Node: Specific,  Next: Old,  Prev: Binaries,  Up: Top
+
+9 Host/target specific installation notes for GCC
+*************************************************
+
+   Please read this document carefully _before_ installing the GNU
+Compiler Collection on your machine.
+
+   Note that this list of install notes is _not_ a list of supported
+hosts or targets.  Not all supported hosts and targets are listed here,
+only the ones that require host-specific or target-specific information
+are.
+
+alpha*-*-*
+==========
+
+This section contains general configuration information for all
+alpha-based platforms using ELF (in particular, ignore this section for
+DEC OSF/1, Digital UNIX and Tru64 UNIX).  In addition to reading this
+section, please read all other sections that match your target.
+
+   We require binutils 2.11.2 or newer.  Previous binutils releases had
+a number of problems with DWARF 2 debugging information, not the least
+of which is incorrect linking of shared libraries.
+
+alpha*-dec-osf5.1
+=================
+
+Systems using processors that implement the DEC Alpha architecture and
+are running the DEC/Compaq/HP Unix (DEC OSF/1, Digital UNIX, or
+Compaq/HP Tru64 UNIX) operating system, for example the DEC Alpha AXP
+systems.
+
+   As of GCC 3.2, versions before `alpha*-dec-osf4' are no longer
+supported.  (These are the versions which identify themselves as DEC
+OSF/1.)  As of GCC 4.6, support for Tru64 UNIX V4.0 and V5.0 has been
+removed.
+
+   On Tru64 UNIX, virtual memory exhausted bootstrap failures may be
+fixed by reconfiguring Kernel Virtual Memory and Swap parameters per
+the `/usr/sbin/sys_check' Tuning Suggestions, or applying the patch in
+`http://gcc.gnu.org/ml/gcc/2002-08/msg00822.html'.  Depending on the OS
+version used, you need a data segment size between 512 MB and 1 GB, so
+simply use `ulimit -Sd unlimited'.
+
+   As of GNU binutils 2.21, neither GNU `as' nor GNU `ld' are supported
+on Tru64 UNIX, so you must not configure GCC with `--with-gnu-as' or
+`--with-gnu-ld'.
+
+   GCC writes a `.verstamp' directive to the assembler output file
+unless it is built as a cross-compiler.  It gets the version to use from
+the system header file `/usr/include/stamp.h'.  If you install a new
+version of Tru64 UNIX, you should rebuild GCC to pick up the new version
+stamp.
+
+   GCC now supports both the native (ECOFF) debugging format used by DBX
+and GDB and an encapsulated STABS format for use only with GDB.  See the
+discussion of the `--with-stabs' option of `configure' above for more
+information on these formats and how to select them.
+
+   There is a bug in DEC's assembler that produces incorrect line
+numbers for ECOFF format when the `.align' directive is used.  To work
+around this problem, GCC will not emit such alignment directives while
+writing ECOFF format debugging information even if optimization is
+being performed.  Unfortunately, this has the very undesirable
+side-effect that code addresses when `-O' is specified are different
+depending on whether or not `-g' is also specified.
+
+   To avoid this behavior, specify `-gstabs+' and use GDB instead of
+DBX.  DEC is now aware of this problem with the assembler and hopes to
+provide a fix shortly.
+
+arc-*-elf
+=========
+
+Argonaut ARC processor.  This configuration is intended for embedded
+systems.
+
+arm-*-elf
+=========
+
+ARM-family processors.  Subtargets that use the ELF object format
+require GNU binutils 2.13 or newer.  Such subtargets include:
+`arm-*-freebsd', `arm-*-netbsdelf', `arm-*-*linux' and `arm-*-rtems'.
+
+avr
+===
+
+ATMEL AVR-family micro controllers.  These are used in embedded
+applications.  There are no standard Unix configurations.  *Note AVR
+Options: (gcc)AVR Options, for the list of supported MCU types.
+
+   Use `configure --target=avr --enable-languages="c"' to configure GCC.
+
+   Further installation notes and other useful information about AVR
+tools can also be obtained from:
+
+   * http://www.nongnu.org/avr/
+
+   * http://www.amelek.gda.pl/avr/
+
+   We _strongly_ recommend using binutils 2.13 or newer.
+
+   The following error:
+     Error: register required
+
+   indicates that you should upgrade to a newer version of the binutils.
+
+Blackfin
+========
+
+The Blackfin processor, an Analog Devices DSP.  *Note Blackfin Options:
+(gcc)Blackfin Options,
+
+   More information, and a version of binutils with support for this
+processor, is available at `http://blackfin.uclinux.org'
+
+CRIS
+====
+
+CRIS is the CPU architecture in Axis Communications ETRAX
+system-on-a-chip series.  These are used in embedded applications.
+
+   *Note CRIS Options: (gcc)CRIS Options, for a list of CRIS-specific
+options.
+
+   There are a few different CRIS targets:
+`cris-axis-elf'
+     Mainly for monolithic embedded systems.  Includes a multilib for
+     the `v10' core used in `ETRAX 100 LX'.
+
+`cris-axis-linux-gnu'
+     A GNU/Linux port for the CRIS architecture, currently targeting
+     `ETRAX 100 LX' by default.
+
+   For `cris-axis-elf' you need binutils 2.11 or newer.  For
+`cris-axis-linux-gnu' you need binutils 2.12 or newer.
+
+   Pre-packaged tools can be obtained from
+`ftp://ftp.axis.com/pub/axis/tools/cris/compiler-kit/'.  More
+information about this platform is available at
+`http://developer.axis.com/'.
+
+CRX
+===
+
+The CRX CompactRISC architecture is a low-power 32-bit architecture with
+fast context switching and architectural extensibility features.
+
+   *Note CRX Options: (gcc)CRX Options,
+
+   Use `configure --target=crx-elf --enable-languages=c,c++' to
+configure GCC for building a CRX cross-compiler. The option
+`--target=crx-elf' is also used to build the `newlib' C library for CRX.
+
+   It is also possible to build libstdc++-v3 for the CRX architecture.
+This needs to be done in a separate step with the following configure
+settings:
+
+     gcc/libstdc++-v3/configure --host=crx-elf --with-newlib \
+         --enable-sjlj-exceptions --enable-cxx-flags='-fexceptions -frtti'
+
+DOS
+===
+
+Please have a look at the binaries page.
+
+   You cannot install GCC by itself on MSDOS; it will not compile under
+any MSDOS compiler except itself.  You need to get the complete
+compilation package DJGPP, which includes binaries as well as sources,
+and includes all the necessary compilation tools and libraries.
+
+*-*-freebsd*
+============
+
+Support for FreeBSD 1 was discontinued in GCC 3.2.  Support for FreeBSD
+2 (and any mutant a.out variants of FreeBSD 3) was discontinued in GCC
+4.0.
+
+   In order to better utilize FreeBSD base system functionality and
+match the configuration of the system compiler, GCC 4.5 and above as
+well as GCC 4.4 past 2010-06-20 leverage SSP support in libc (which is
+present on FreeBSD 7 or later) and the use of `__cxa_atexit' by default
+(on FreeBSD 6 or later).  The use of `dl_iterate_phdr' inside
+`libgcc_s.so.1' and boehm-gc (on FreeBSD 7 or later) is enabled by GCC
+4.5 and above.
+
+   We support FreeBSD using the ELF file format with DWARF 2 debugging
+for all CPU architectures.  You may use `-gstabs' instead of `-g', if
+you really want the old debugging format.  There are no known issues
+with mixing object files and libraries with different debugging
+formats.  Otherwise, this release of GCC should now match more of the
+configuration used in the stock FreeBSD configuration of GCC.  In
+particular, `--enable-threads' is now configured by default.  However,
+as a general user, do not attempt to replace the system compiler with
+this release.  Known to bootstrap and check with good results on
+FreeBSD 7.2-STABLE.  In the past, known to bootstrap and check with
+good results on FreeBSD 3.0, 3.4, 4.0, 4.2, 4.3, 4.4, 4.5, 4.8, 4.9 and
+5-CURRENT.
+
+   The version of binutils installed in `/usr/bin' probably works with
+this release of GCC.  Bootstrapping against the latest GNU binutils
+and/or the version found in `/usr/ports/devel/binutils' has been known
+to enable additional features and improve overall testsuite results.
+However, it is currently known that boehm-gc (which itself is required
+for java) may not configure properly on FreeBSD prior to the FreeBSD
+7.0 release with GNU binutils after 2.16.1.
+
+h8300-hms
+=========
+
+Renesas H8/300 series of processors.
+
+   Please have a look at the binaries page.
+
+   The calling convention and structure layout has changed in release
+2.6.  All code must be recompiled.  The calling convention now passes
+the first three arguments in function calls in registers.  Structures
+are no longer a multiple of 2 bytes.
+
+hppa*-hp-hpux*
+==============
+
+Support for HP-UX version 9 and older was discontinued in GCC 3.4.
+
+   We require using gas/binutils on all hppa platforms.  Version 2.19 or
+later is recommended.
+
+   It may be helpful to configure GCC with the `--with-gnu-as' and
+`--with-as=...' options to ensure that GCC can find GAS.
+
+   The HP assembler should not be used with GCC.  It is rarely tested
+and may not work.  It shouldn't be used with any languages other than C
+due to its many limitations.
+
+   Specifically, `-g' does not work (HP-UX uses a peculiar debugging
+format which GCC does not know about).  It also inserts timestamps into
+each object file it creates, causing the 3-stage comparison test to
+fail during a bootstrap.  You should be able to continue by saying
+`make all-host all-target' after getting the failure from `make'.
+
+   Various GCC features are not supported.  For example, it does not
+support weak symbols or alias definitions.  As a result, explicit
+template instantiations are required when using C++.  This makes it
+difficult if not impossible to build many C++ applications.
+
+   There are two default scheduling models for instructions.  These are
+PROCESSOR_7100LC and PROCESSOR_8000.  They are selected from the pa-risc
+architecture specified for the target machine when configuring.
+PROCESSOR_8000 is the default.  PROCESSOR_7100LC is selected when the
+target is a `hppa1*' machine.
+
+   The PROCESSOR_8000 model is not well suited to older processors.
+Thus, it is important to completely specify the machine architecture
+when configuring if you want a model other than PROCESSOR_8000.  The
+macro TARGET_SCHED_DEFAULT can be defined in BOOT_CFLAGS if a different
+default scheduling model is desired.
+
+   As of GCC 4.0, GCC uses the UNIX 95 namespace for HP-UX 10.10
+through 11.00, and the UNIX 98 namespace for HP-UX 11.11 and later.
+This namespace change might cause problems when bootstrapping with an
+earlier version of GCC or the HP compiler as essentially the same
+namespace is required for an entire build.  This problem can be avoided
+in a number of ways.  With HP cc, `UNIX_STD' can be set to `95' or
+`98'.  Another way is to add an appropriate set of predefines to `CC'.
+The description for the `munix=' option contains a list of the
+predefines used with each standard.
+
+   More specific information to `hppa*-hp-hpux*' targets follows.
+
+hppa*-hp-hpux10
+===============
+
+For hpux10.20, we _highly_ recommend you pick up the latest sed patch
+`PHCO_19798' from HP.
+
+   The C++ ABI has changed incompatibly in GCC 4.0.  COMDAT subspaces
+are used for one-only code and data.  This resolves many of the previous
+problems in using C++ on this target.  However, the ABI is not
+compatible with the one implemented under HP-UX 11 using secondary
+definitions.
+
+hppa*-hp-hpux11
+===============
+
+GCC 3.0 and up support HP-UX 11.  GCC 2.95.x is not supported and cannot
+be used to compile GCC 3.0 and up.
+
+   The libffi and libjava libraries haven't been ported to 64-bit HP-UX
+and don't build.
+
+   Refer to binaries for information about obtaining precompiled GCC
+binaries for HP-UX.  Precompiled binaries must be obtained to build the
+Ada language as it can't be bootstrapped using C.  Ada is only
+available for the 32-bit PA-RISC runtime.
+
+   Starting with GCC 3.4 an ISO C compiler is required to bootstrap.
+The bundled compiler supports only traditional C; you will need either
+HP's unbundled compiler, or a binary distribution of GCC.
+
+   It is possible to build GCC 3.3 starting with the bundled HP
+compiler, but the process requires several steps.  GCC 3.3 can then be
+used to build later versions.  The fastjar program contains ISO C code
+and can't be built with the HP bundled compiler.  This problem can be
+avoided by not building the Java language.  For example, use the
+`--enable-languages="c,c++,f77,objc"' option in your configure command.
+
+   There are several possible approaches to building the distribution.
+Binutils can be built first using the HP tools.  Then, the GCC
+distribution can be built.  The second approach is to build GCC first
+using the HP tools, then build binutils, then rebuild GCC.  There have
+been problems with various binary distributions, so it is best not to
+start from a binary distribution.
+
+   On 64-bit capable systems, there are two distinct targets.  Different
+installation prefixes must be used if both are to be installed on the
+same system.  The `hppa[1-2]*-hp-hpux11*' target generates code for the
+32-bit PA-RISC runtime architecture and uses the HP linker.  The
+`hppa64-hp-hpux11*' target generates 64-bit code for the PA-RISC 2.0
+architecture.
+
+   The script config.guess now selects the target type based on the
+compiler detected during configuration.  You must define `PATH' or `CC'
+so that configure finds an appropriate compiler for the initial
+bootstrap.  When `CC' is used, the definition should contain the
+options that are needed whenever `CC' is used.
+
+   Specifically, options that determine the runtime architecture must be
+in `CC' to correctly select the target for the build.  It is also
+convenient to place many other compiler options in `CC'.  For example,
+`CC="cc -Ac +DA2.0W -Wp,-H16376 -D_CLASSIC_TYPES -D_HPUX_SOURCE"' can
+be used to bootstrap the GCC 3.3 branch with the HP compiler in 64-bit
+K&R/bundled mode.  The `+DA2.0W' option will result in the automatic
+selection of the `hppa64-hp-hpux11*' target.  The macro definition
+table of cpp needs to be increased for a successful build with the HP
+compiler.  _CLASSIC_TYPES and _HPUX_SOURCE need to be defined when
+building with the bundled compiler, or when using the `-Ac' option.
+These defines aren't necessary with `-Ae'.
+
+   It is best to explicitly configure the `hppa64-hp-hpux11*' target
+with the `--with-ld=...' option.  This overrides the standard search
+for ld.  The two linkers supported on this target require different
+commands.  The default linker is determined during configuration.  As a
+result, it's not possible to switch linkers in the middle of a GCC
+build.  This has been reported to sometimes occur in unified builds of
+binutils and GCC.
+
+   A recent linker patch must be installed for the correct operation of
+GCC 3.3 and later.  `PHSS_26559' and `PHSS_24304' are the oldest linker
+patches that are known to work.  They are for HP-UX 11.00 and 11.11,
+respectively.  `PHSS_24303', the companion to `PHSS_24304', might be
+usable but it hasn't been tested.  These patches have been superseded.
+Consult the HP patch database to obtain the currently recommended
+linker patch for your system.
+
+   The patches are necessary for the support of weak symbols on the
+32-bit port, and for the running of initializers and finalizers.  Weak
+symbols are implemented using SOM secondary definition symbols.  Prior
+to HP-UX 11, there are bugs in the linker support for secondary symbols.
+The patches correct a problem of linker core dumps creating shared
+libraries containing secondary symbols, as well as various other
+linking issues involving secondary symbols.
+
+   GCC 3.3 uses the ELF DT_INIT_ARRAY and DT_FINI_ARRAY capabilities to
+run initializers and finalizers on the 64-bit port.  The 32-bit port
+uses the linker `+init' and `+fini' options for the same purpose.  The
+patches correct various problems with the +init/+fini options,
+including program core dumps.  Binutils 2.14 corrects a problem on the
+64-bit port resulting from HP's non-standard use of the .init and .fini
+sections for array initializers and finalizers.
+
+   Although the HP and GNU linkers are both supported for the
+`hppa64-hp-hpux11*' target, it is strongly recommended that the HP
+linker be used for link editing on this target.
+
+   At this time, the GNU linker does not support the creation of long
+branch stubs.  As a result, it can't successfully link binaries
+containing branch offsets larger than 8 megabytes.  In addition, there
+are problems linking shared libraries, linking executables with
+`-static', and with dwarf2 unwind and exception support.  It also
+doesn't provide stubs for internal calls to global functions in shared
+libraries, so these calls can't be overloaded.
+
+   The HP dynamic loader does not support GNU symbol versioning, so
+symbol versioning is not supported.  It may be necessary to disable
+symbol versioning with `--disable-symvers' when using GNU ld.
+
+   POSIX threads are the default.  The optional DCE thread library is
+not supported, so `--enable-threads=dce' does not work.
+
+*-*-linux-gnu
+=============
+
+Versions of libstdc++-v3 starting with 3.2.1 require bug fixes present
+in glibc 2.2.5 and later.  More information is available in the
+libstdc++-v3 documentation.
+
+i?86-*-linux*
+=============
+
+As of GCC 3.3, binutils 2.13.1 or later is required for this platform.
+See bug 10877 for more information.
+
+   If you receive Signal 11 errors when building on GNU/Linux, then it
+is possible you have a hardware problem.  Further information on this
+can be found on www.bitwizard.nl.
+
+i?86-*-solaris2.[89]
+====================
+
+The Sun assembler in Solaris 8 and 9 has several bugs and limitations.
+While GCC works around them, several features are missing, so it is
+recommended to use the GNU assembler instead.  There is no bundled
+version, but the current version, from GNU binutils 2.21, is known to
+work.
+
+   Solaris 2/x86 doesn't support the execution of SSE/SSE2 instructions
+before Solaris 9 4/04, even if the CPU supports them.  Programs will
+receive `SIGILL' if they try.  The fix is available both in Solaris 9
+Update 6 and kernel patch 112234-12 or newer.  There is no
+corresponding patch for Solaris 8.  To avoid this problem, `-march'
+defaults to `pentiumpro' on Solaris 8 and 9.  If you have the patch
+installed, you can configure GCC with an appropriate `--with-arch'
+option, but need GNU `as' for SSE2 support.
+
+i?86-*-solaris2.10
+==================
+
+Use this for Solaris 10 or later on x86 and x86-64 systems.  This
+configuration is supported by GCC 4.0 and later versions only.  Unlike
+`sparcv9-sun-solaris2*', there is no corresponding 64-bit configuration
+like `amd64-*-solaris2*' or `x86_64-*-solaris2*'.
+
+   It is recommended that you configure GCC to use the GNU assembler, in
+`/usr/sfw/bin/gas'.  The versions included in Solaris 10, from GNU
+binutils 2.15, and Solaris 11, from GNU binutils 2.19, work fine,
+although the current version, from GNU binutils 2.21, is known to work,
+too.  Recent versions of the Sun assembler in `/usr/ccs/bin/as' work
+almost as well, though.
+
+   For linking, the Sun linker, is preferred.  If you want to use the
+GNU linker instead, which is available in `/usr/sfw/bin/gld', note that
+due to a packaging bug the version in Solaris 10, from GNU binutils
+2.15, cannot be used, while the version in Solaris 11, from GNU binutils
+2.19, works, as does the latest version, from GNU binutils 2.21.
+
+   To use GNU `as', configure with the options `--with-gnu-as
+--with-as=/usr/sfw/bin/gas'.  It may be necessary to configure with
+`--without-gnu-ld --with-ld=/usr/ccs/bin/ld' to guarantee use of Sun
+`ld'.
+
+ia64-*-linux
+============
+
+IA-64 processor (also known as IPF, or Itanium Processor Family)
+running GNU/Linux.
+
+   If you are using the installed system libunwind library with
+`--with-system-libunwind', then you must use libunwind 0.98 or later.
+
+   None of the following versions of GCC has an ABI that is compatible
+with any of the other versions in this list, with the exception that
+Red Hat 2.96 and Trillian 000171 are compatible with each other: 3.1,
+3.0.2, 3.0.1, 3.0, Red Hat 2.96, and Trillian 000717.  This primarily
+affects C++ programs and programs that create shared libraries.  GCC
+3.1 or later is recommended for compiling linux, the kernel.  As of
+version 3.1 GCC is believed to be fully ABI compliant, and hence no
+more major ABI changes are expected.
+
+ia64-*-hpux*
+============
+
+Building GCC on this target requires the GNU Assembler.  The bundled HP
+assembler will not work.  To prevent GCC from using the wrong assembler,
+the option `--with-gnu-as' may be necessary.
+
+   The GCC libunwind library has not been ported to HPUX.  This means
+that for GCC versions 3.2.3 and earlier, `--enable-libunwind-exceptions'
+is required to build GCC.  For GCC 3.3 and later, this is the default.
+For gcc 3.4.3 and later, `--enable-libunwind-exceptions' is removed and
+the system libunwind library will always be used.
+
+*-ibm-aix*
+==========
+
+Support for AIX version 3 and older was discontinued in GCC 3.4.
+Support for AIX version 4.2 and older was discontinued in GCC 4.5.
+
+   "out of memory" bootstrap failures may indicate a problem with
+process resource limits (ulimit).  Hard limits are configured in the
+`/etc/security/limits' system configuration file.
+
+   GCC can bootstrap with recent versions of IBM XLC, but bootstrapping
+with an earlier release of GCC is recommended.  Bootstrapping with XLC
+requires a larger data segment, which can be enabled through the
+LDR_CNTRL environment variable, e.g.,
+
+     % LDR_CNTRL=MAXDATA=0x50000000
+     % export LDR_CNTRL
+
+   One can start with a pre-compiled version of GCC to build from
+sources.  One may delete GCC's "fixed" header files when starting with
+a version of GCC built for an earlier release of AIX.
+
+   To speed up the configuration phases of bootstrapping and installing
+GCC, one may use GNU Bash instead of AIX `/bin/sh', e.g.,
+
+     % CONFIG_SHELL=/opt/freeware/bin/bash
+     % export CONFIG_SHELL
+
+   and then proceed as described in the build instructions, where we
+strongly recommend specifying an absolute path to invoke
+SRCDIR/configure.
+
+   Because GCC on AIX is built as a 32-bit executable by default,
+(although it can generate 64-bit programs) the GMP and MPFR libraries
+required by gfortran must be 32-bit libraries.  Building GMP and MPFR
+as static archive libraries works better than shared libraries.
+
+   Errors involving `alloca' when building GCC generally are due to an
+incorrect definition of `CC' in the Makefile or mixing files compiled
+with the native C compiler and GCC.  During the stage1 phase of the
+build, the native AIX compiler *must* be invoked as `cc' (not `xlc').
+Once `configure' has been informed of `xlc', one needs to use `make
+distclean' to remove the configure cache files and ensure that `CC'
+environment variable does not provide a definition that will confuse
+`configure'.  If this error occurs during stage2 or later, then the
+problem most likely is the version of Make (see above).
+
+   The native `as' and `ld' are recommended for bootstrapping on AIX.
+The GNU Assembler, GNU Linker, and GNU Binutils version 2.20 is
+required to bootstrap on AIX 5.  The native AIX tools do interoperate
+with GCC.
+
+   Building `libstdc++.a' requires a fix for an AIX Assembler bug APAR
+IY26685 (AIX 4.3) or APAR IY25528 (AIX 5.1).  It also requires a fix
+for another AIX Assembler bug and a co-dependent AIX Archiver fix
+referenced as APAR IY53606 (AIX 5.2) or as APAR IY54774 (AIX 5.1)
+
+   `libstdc++' in GCC 3.4 increments the major version number of the
+shared object and GCC installation places the `libstdc++.a' shared
+library in a common location which will overwrite the and GCC 3.3
+version of the shared library.  Applications either need to be
+re-linked against the new shared library or the GCC 3.1 and GCC 3.3
+versions of the `libstdc++' shared object needs to be available to the
+AIX runtime loader.  The GCC 3.1 `libstdc++.so.4', if present, and GCC
+3.3 `libstdc++.so.5' shared objects can be installed for runtime
+dynamic loading using the following steps to set the `F_LOADONLY' flag
+in the shared object for _each_ multilib `libstdc++.a' installed:
+
+   Extract the shared objects from the currently installed
+`libstdc++.a' archive:
+     % ar -x libstdc++.a libstdc++.so.4 libstdc++.so.5
+
+   Enable the `F_LOADONLY' flag so that the shared object will be
+available for runtime dynamic loading, but not linking:
+     % strip -e libstdc++.so.4 libstdc++.so.5
+
+   Archive the runtime-only shared object in the GCC 3.4 `libstdc++.a'
+archive:
+     % ar -q libstdc++.a libstdc++.so.4 libstdc++.so.5
+
+   Linking executables and shared libraries may produce warnings of
+duplicate symbols.  The assembly files generated by GCC for AIX always
+have included multiple symbol definitions for certain global variable
+and function declarations in the original program.  The warnings should
+not prevent the linker from producing a correct library or runnable
+executable.
+
+   AIX 4.3 utilizes a "large format" archive to support both 32-bit and
+64-bit object modules.  The routines provided in AIX 4.3.0 and AIX 4.3.1
+to parse archive libraries did not handle the new format correctly.
+These routines are used by GCC and result in error messages during
+linking such as "not a COFF file".  The version of the routines shipped
+with AIX 4.3.1 should work for a 32-bit environment.  The `-g' option
+of the archive command may be used to create archives of 32-bit objects
+using the original "small format".  A correct version of the routines
+is shipped with AIX 4.3.2 and above.
+
+   Some versions of the AIX binder (linker) can fail with a relocation
+overflow severe error when the `-bbigtoc' option is used to link
+GCC-produced object files into an executable that overflows the TOC.  A
+fix for APAR IX75823 (OVERFLOW DURING LINK WHEN USING GCC AND -BBIGTOC)
+is available from IBM Customer Support and from its
+techsupport.services.ibm.com website as PTF U455193.
+
+   The AIX 4.3.2.1 linker (bos.rte.bind_cmds Level 4.3.2.1) will dump
+core with a segmentation fault when invoked by any version of GCC.  A
+fix for APAR IX87327 is available from IBM Customer Support and from its
+techsupport.services.ibm.com website as PTF U461879.  This fix is
+incorporated in AIX 4.3.3 and above.
+
+   The initial assembler shipped with AIX 4.3.0 generates incorrect
+object files.  A fix for APAR IX74254 (64BIT DISASSEMBLED OUTPUT FROM
+COMPILER FAILS TO ASSEMBLE/BIND) is available from IBM Customer Support
+and from its techsupport.services.ibm.com website as PTF U453956.  This
+fix is incorporated in AIX 4.3.1 and above.
+
+   AIX provides National Language Support (NLS).  Compilers and
+assemblers use NLS to support locale-specific representations of
+various data formats including floating-point numbers (e.g., `.'  vs
+`,' for separating decimal fractions).  There have been problems
+reported where GCC does not produce the same floating-point formats
+that the assembler expects.  If one encounters this problem, set the
+`LANG' environment variable to `C' or `En_US'.
+
+   A default can be specified with the `-mcpu=CPU_TYPE' switch and
+using the configure option `--with-cpu-CPU_TYPE'.
+
+iq2000-*-elf
+============
+
+Vitesse IQ2000 processors.  These are used in embedded applications.
+There are no standard Unix configurations.
+
+lm32-*-elf
+==========
+
+Lattice Mico32 processor.  This configuration is intended for embedded
+systems.
+
+lm32-*-uclinux
+==============
+
+Lattice Mico32 processor.  This configuration is intended for embedded
+systems running uClinux.
+
+m32c-*-elf
+==========
+
+Renesas M32C processor.  This configuration is intended for embedded
+systems.
+
+m32r-*-elf
+==========
+
+Renesas M32R processor.  This configuration is intended for embedded
+systems.
+
+m6811-elf
+=========
+
+Motorola 68HC11 family micro controllers.  These are used in embedded
+applications.  There are no standard Unix configurations.
+
+m6812-elf
+=========
+
+Motorola 68HC12 family micro controllers.  These are used in embedded
+applications.  There are no standard Unix configurations.
+
+m68k-*-*
+========
+
+By default, `m68k-*-elf*', `m68k-*-rtems',  `m68k-*-uclinux' and
+`m68k-*-linux' build libraries for both M680x0 and ColdFire processors.
+If you only need the M680x0 libraries, you can omit the ColdFire ones
+by passing `--with-arch=m68k' to `configure'.  Alternatively, you can
+omit the M680x0 libraries by passing `--with-arch=cf' to `configure'.
+These targets default to 5206 or 5475 code as appropriate for the
+target system when configured with `--with-arch=cf' and 68020 code
+otherwise.
+
+   The `m68k-*-netbsd' and `m68k-*-openbsd' targets also support the
+`--with-arch' option.  They will generate ColdFire CFV4e code when
+configured with `--with-arch=cf' and 68020 code otherwise.
+
+   You can override the default processors listed above by configuring
+with `--with-cpu=TARGET'.  This TARGET can either be a `-mcpu' argument
+or one of the following values: `m68000', `m68010', `m68020', `m68030',
+`m68040', `m68060', `m68020-40' and `m68020-60'.
+
+m68k-*-uclinux
+==============
+
+GCC 4.3 changed the uClinux configuration so that it uses the
+`m68k-linux-gnu' ABI rather than the `m68k-elf' ABI.  It also added
+improved support for C++ and flat shared libraries, both of which were
+ABI changes.  However, you can still use the original ABI by
+configuring for `m68k-uclinuxoldabi' or `m68k-VENDOR-uclinuxoldabi'.
+
+mep-*-elf
+=========
+
+Toshiba Media embedded Processor.  This configuration is intended for
+embedded systems.
+
+microblaze-*-elf
+================
+
+Xilinx MicroBlaze processor.  This configuration is intended for
+embedded systems.
+
+mips-*-*
+========
+
+If on a MIPS system you get an error message saying "does not have gp
+sections for all it's [sic] sectons [sic]", don't worry about it.  This
+happens whenever you use GAS with the MIPS linker, but there is not
+really anything wrong, and it is okay to use the output file.  You can
+stop such warnings by installing the GNU linker.
+
+   It would be nice to extend GAS to produce the gp tables, but they are
+optional, and there should not be a warning about their absence.
+
+   The libstdc++ atomic locking routines for MIPS targets requires MIPS
+II and later.  A patch went in just after the GCC 3.3 release to make
+`mips*-*-*' use the generic implementation instead.  You can also
+configure for `mipsel-elf' as a workaround.  The `mips*-*-linux*'
+target continues to use the MIPS II routines.  More work on this is
+expected in future releases.
+
+   The built-in `__sync_*' functions are available on MIPS II and later
+systems and others that support the `ll', `sc' and `sync' instructions.
+This can be overridden by passing `--with-llsc' or `--without-llsc'
+when configuring GCC.  Since the Linux kernel emulates these
+instructions if they are missing, the default for `mips*-*-linux*'
+targets is `--with-llsc'.  The `--with-llsc' and `--without-llsc'
+configure options may be overridden at compile time by passing the
+`-mllsc' or `-mno-llsc' options to the compiler.
+
+   MIPS systems check for division by zero (unless
+`-mno-check-zero-division' is passed to the compiler) by generating
+either a conditional trap or a break instruction.  Using trap results
+in smaller code, but is only supported on MIPS II and later.  Also,
+some versions of the Linux kernel have a bug that prevents trap from
+generating the proper signal (`SIGFPE').  To enable the use of break,
+use the `--with-divide=breaks' `configure' option when configuring GCC.
+The default is to use traps on systems that support them.
+
+   Cross-compilers for the MIPS as target using the MIPS assembler
+currently do not work, because the auxiliary programs `mips-tdump.c'
+and `mips-tfile.c' can't be compiled on anything but a MIPS.  It does
+work to cross compile for a MIPS if you use the GNU assembler and
+linker.
+
+   The assembler from GNU binutils 2.17 and earlier has a bug in the way
+it sorts relocations for REL targets (o32, o64, EABI).  This can cause
+bad code to be generated for simple C++ programs.  Also the linker from
+GNU binutils versions prior to 2.17 has a bug which causes the runtime
+linker stubs in very large programs, like `libgcj.so', to be
+incorrectly generated.  GNU Binutils 2.18 and later (and snapshots made
+after Nov. 9, 2006) should be free from both of these problems.
+
+mips-sgi-irix5
+==============
+
+Support for IRIX 5 has been removed in GCC 4.6.
+
+mips-sgi-irix6
+==============
+
+Support for IRIX 6 releases before 6.5 has been removed in GCC 4.6, as
+well as support for the O32 ABI.  It is _strongly_ recommended to
+upgrade to at least IRIX 6.5.18.  This release introduced full ISO C99
+support, though for the N32 and N64 ABIs only.
+
+   To build and use GCC on IRIX 6.5, you need the IRIX Development
+Foundation (IDF) and IRIX Development Libraries (IDL).  They are
+included with the IRIX 6.5 media.
+
+   If you are using SGI's MIPSpro `cc' as your bootstrap compiler, you
+must ensure that the N32 ABI is in use.  To test this, compile a simple
+C file with `cc' and then run `file' on the resulting object file.  The
+output should look like:
+
+     test.o: ELF N32 MSB ...
+
+If you see:
+
+     test.o: ELF 32-bit MSB ...
+
+or
+
+     test.o: ELF 64-bit MSB ...
+
+then your version of `cc' uses the O32 or N64 ABI by default.  You
+should set the environment variable `CC' to `cc -n32' before
+configuring GCC.
+
+   If you want the resulting `gcc' to run on old 32-bit systems with
+the MIPS R4400 CPU, you need to ensure that only code for the `mips3'
+instruction set architecture (ISA) is generated.  While GCC 3.x does
+this correctly, both GCC 2.95 and SGI's MIPSpro `cc' may change the ISA
+depending on the machine where GCC is built.  Using one of them as the
+bootstrap compiler may result in `mips4' code, which won't run at all
+on `mips3'-only systems.  For the test program above, you should see:
+
+     test.o: ELF N32 MSB mips-3 ...
+
+If you get:
+
+     test.o: ELF N32 MSB mips-4 ...
+
+instead, you should set the environment variable `CC' to `cc -n32
+-mips3' or `gcc -mips3' respectively before configuring GCC.
+
+   MIPSpro C 7.4 may cause bootstrap failures, due to a bug when
+inlining `memcmp'.  Either add `-U__INLINE_INTRINSICS' to the `CC'
+environment variable as a workaround or upgrade to MIPSpro C 7.4.1m.
+
+   GCC on IRIX 6.5 is usually built to support the N32 and N64 ABIs.  If
+you build GCC on a system that doesn't have the N64 libraries installed
+or cannot run 64-bit binaries, you need to configure with
+`--disable-multilib' so GCC doesn't try to use them.  Look for
+`/usr/lib64/libc.so.1' to see if you have the 64-bit libraries
+installed.
+
+   GCC must be configured with GNU `as'.  The latest version, from GNU
+binutils 2.21, is known to work.  On the other hand, bootstrap fails
+with GNU `ld' at least since GNU binutils 2.17.
+
+   The `--enable-libgcj' option is disabled by default: IRIX 6 uses a
+very low default limit (20480) for the command line length.  Although
+`libtool' contains a workaround for this problem, at least the N64
+`libgcj' is known not to build despite this, running into an internal
+error of the native `ld'.  A sure fix is to increase this limit
+(`ncargs') to its maximum of 262144 bytes.  If you have root access,
+you can use the `systune' command to do this.
+
+   `wchar_t' support in `libstdc++' is not available for old IRIX 6.5.x
+releases, x < 19.  The problem cannot be autodetected and in order to
+build GCC for such targets you need to configure with
+`--disable-wchar_t'.
+
+moxie-*-elf
+===========
+
+The moxie processor.  See `http://moxielogic.org/' for more information
+about this processor.
+
+powerpc-*-*
+===========
+
+You can specify a default version for the `-mcpu=CPU_TYPE' switch by
+using the configure option `--with-cpu-CPU_TYPE'.
+
+   You will need binutils 2.15 or newer for a working GCC.
+
+powerpc-*-darwin*
+=================
+
+PowerPC running Darwin (Mac OS X kernel).
+
+   Pre-installed versions of Mac OS X may not include any developer
+tools, meaning that you will not be able to build GCC from source.  Tool
+binaries are available at `http://opensource.apple.com/'.
+
+   This version of GCC requires at least cctools-590.36.  The
+cctools-590.36 package referenced from
+`http://gcc.gnu.org/ml/gcc/2006-03/msg00507.html' will not work on
+systems older than 10.3.9 (aka darwin7.9.0).
+
+powerpc-*-elf
+=============
+
+PowerPC system in big endian mode, running System V.4.
+
+powerpc*-*-linux-gnu*
+=====================
+
+PowerPC system in big endian mode running Linux.
+
+powerpc-*-netbsd*
+=================
+
+PowerPC system in big endian mode running NetBSD.
+
+powerpc-*-eabisim
+=================
+
+Embedded PowerPC system in big endian mode for use in running under the
+PSIM simulator.
+
+powerpc-*-eabi
+==============
+
+Embedded PowerPC system in big endian mode.
+
+powerpcle-*-elf
+===============
+
+PowerPC system in little endian mode, running System V.4.
+
+powerpcle-*-eabisim
+===================
+
+Embedded PowerPC system in little endian mode for use in running under
+the PSIM simulator.
+
+powerpcle-*-eabi
+================
+
+Embedded PowerPC system in little endian mode.
+
+rx-*-elf
+========
+
+The Renesas RX processor.  See
+`http://eu.renesas.com/fmwk.jsp?cnt=rx600_series_landing.jsp&fp=/products/mpumcu/rx_family/rx600_series'
+for more information about this processor.
+
+s390-*-linux*
+=============
+
+S/390 system running GNU/Linux for S/390.
+
+s390x-*-linux*
+==============
+
+zSeries system (64-bit) running GNU/Linux for zSeries.
+
+s390x-ibm-tpf*
+==============
+
+zSeries system (64-bit) running TPF.  This platform is supported as
+cross-compilation target only.
+
+*-*-solaris2*
+=============
+
+Support for Solaris 7 has been removed in GCC 4.6.
+
+   Sun does not ship a C compiler with Solaris 2, though you can
+download the Sun Studio compilers for free.  Alternatively, you can
+install a pre-built GCC to bootstrap and install GCC.  See the binaries
+page for details.
+
+   The Solaris 2 `/bin/sh' will often fail to configure `libstdc++-v3',
+`boehm-gc' or `libjava'.  We therefore recommend using the following
+initial sequence of commands
+
+     % CONFIG_SHELL=/bin/ksh
+     % export CONFIG_SHELL
+
+and proceed as described in the configure instructions.  In addition we
+strongly recommend specifying an absolute path to invoke
+`SRCDIR/configure'.
+
+   Solaris 2 comes with a number of optional OS packages.  Some of these
+are needed to use GCC fully, namely `SUNWarc', `SUNWbtool', `SUNWesu',
+`SUNWhea', `SUNWlibm', `SUNWsprot', and `SUNWtoo'.  If you did not
+install all optional packages when installing Solaris 2, you will need
+to verify that the packages that GCC needs are installed.
+
+   To check whether an optional package is installed, use the `pkginfo'
+command.  To add an optional package, use the `pkgadd' command.  For
+further details, see the Solaris 2 documentation.
+
+   Trying to use the linker and other tools in `/usr/ucb' to install
+GCC has been observed to cause trouble.  For example, the linker may
+hang indefinitely.  The fix is to remove `/usr/ucb' from your `PATH'.
+
+   The build process works more smoothly with the legacy Sun tools so,
+if you have `/usr/xpg4/bin' in your `PATH', we recommend that you place
+`/usr/bin' before `/usr/xpg4/bin' for the duration of the build.
+
+   We recommend the use of the Sun assembler or the GNU assembler, in
+conjunction with the Sun linker.  The GNU `as' versions included in
+Solaris 10, from GNU binutils 2.15, and Solaris 11, from GNU binutils
+2.19, are known to work.  They can be found in `/usr/sfw/bin/gas'.
+Current versions of GNU binutils (2.21) are known to work as well.
+Note that your mileage may vary if you use a combination of the GNU
+tools and the Sun tools: while the combination GNU `as' + Sun `ld'
+should reasonably work, the reverse combination Sun `as' + GNU `ld' is
+known to cause memory corruption at runtime in some cases for C++
+programs.  GNU `ld' usually works as well, although the version
+included in Solaris 10 cannot be used due to several bugs.  Again, the
+current version (2.21) is known to work, but generally lacks platform
+specific features, so better stay with Sun `ld'.
+
+   To enable symbol versioning in `libstdc++' with Sun `ld', you need
+to have any version of GNU `c++filt', which is part of GNU binutils.
+`libstdc++' symbol versioning will be disabled if no appropriate
+version is found.  Sun `c++filt' from the Sun Studio compilers does
+_not_ work.
+
+   Sun bug 4296832 turns up when compiling X11 headers with GCC 2.95 or
+newer: `g++' will complain that types are missing.  These headers
+assume that omitting the type means `int'; this assumption worked for
+C90 but is wrong for C++, and is now wrong for C99 also.
+
+   `g++' accepts such (invalid) constructs with the option
+`-fpermissive'; it will assume that any missing type is `int' (as
+defined by C90).
+
+   There are patches for Solaris 8 (108652-24 or newer for SPARC,
+108653-22 for Intel) that fix this bug.
+
+   Sun bug 4927647 sometimes causes random spurious testsuite failures
+related to missing diagnostic output.  This bug doesn't affect GCC
+itself, rather it is a kernel bug triggered by the `expect' program
+which is used only by the GCC testsuite driver.  When the bug causes
+the `expect' program to miss anticipated output, extra testsuite
+failures appear.
+
+   There are patches for Solaris 8 (117350-12 or newer for SPARC,
+117351-12 or newer for Intel) and Solaris 9 (117171-11 or newer for
+SPARC, 117172-11 or newer for Intel) that address this problem.
+
+   Solaris 8 provides an alternate implementation of the thread
+libraries, `libpthread' and `libthread'.  They are required for TLS
+support and have been made the default in Solaris 9, so they are always
+used on Solaris 8.
+
+   Thread-local storage (TLS) is supported in Solaris 8 and 9, but
+requires some patches.  The `libthread' patches provide the
+`__tls_get_addr' (SPARC, 64-bit x86) resp. `___tls_get_addr' (32-bit
+x86) functions.  On Solaris 8, you need 108993-26 or newer on SPARC,
+108994-26 or newer on Intel.  On Solaris 9, the necessary support on
+SPARC is present since FCS, while 114432-05 or newer is required on
+Intel.  Additionally, on Solaris 8, patch 109147-14 or newer on SPARC or
+109148-22 or newer on Intel are required for the Sun `ld' and runtime
+linker (`ld.so.1') support.  Again, Solaris 9/SPARC works since FCS,
+while 113986-02 is required on Intel.  The linker patches must be
+installed even if GNU `ld' is used. Sun `as' in Solaris 8 and 9 doesn't
+support the necessary relocations, so GNU `as' must be used.  The
+`configure' script checks for those prerequisites and automatically
+enables TLS support if they are met.  Although those minimal patch
+versions should work, it is recommended to use the latest patch
+versions which include additional bug fixes.
+
+sparc*-*-*
+==========
+
+This section contains general configuration information for all
+SPARC-based platforms.  In addition to reading this section, please
+read all other sections that match your target.
+
+   Newer versions of the GNU Multiple Precision Library (GMP), the MPFR
+library and the MPC library are known to be miscompiled by earlier
+versions of GCC on these platforms.  We therefore recommend the use of
+the exact versions of these libraries listed as minimal versions in the
+prerequisites.
+
+sparc-sun-solaris2*
+===================
+
+When GCC is configured to use GNU binutils 2.14 or later, the binaries
+produced are smaller than the ones produced using Sun's native tools;
+this difference is quite significant for binaries containing debugging
+information.
+
+   Starting with Solaris 7, the operating system is capable of executing
+64-bit SPARC V9 binaries.  GCC 3.1 and later properly supports this;
+the `-m64' option enables 64-bit code generation.  However, if all you
+want is code tuned for the UltraSPARC CPU, you should try the
+`-mtune=ultrasparc' option instead, which produces code that, unlike
+full 64-bit code, can still run on non-UltraSPARC machines.
+
+   When configuring on a Solaris 7 or later system that is running a
+kernel that supports only 32-bit binaries, one must configure with
+`--disable-multilib', since we will not be able to build the 64-bit
+target libraries.
+
+   GCC 3.3 and GCC 3.4 trigger code generation bugs in earlier versions
+of the GNU compiler (especially GCC 3.0.x versions), which lead to the
+miscompilation of the stage1 compiler and the subsequent failure of the
+bootstrap process.  A workaround is to use GCC 3.2.3 as an intermediary
+stage, i.e. to bootstrap that compiler with the base compiler and then
+use it to bootstrap the final compiler.
+
+   GCC 3.4 triggers a code generation bug in versions 5.4 (Sun ONE
+Studio 7) and 5.5 (Sun ONE Studio 8) of the Sun compiler, which causes
+a bootstrap failure in form of a miscompilation of the stage1 compiler
+by the Sun compiler.  This is Sun bug 4974440.  This is fixed with
+patch 112760-07.
+
+   GCC 3.4 changed the default debugging format from Stabs to DWARF-2
+for 32-bit code on Solaris 7 and later.  If you use the Sun assembler,
+this change apparently runs afoul of Sun bug 4910101 (which is
+referenced as an x86-only problem by Sun, probably because they do not
+use DWARF-2).  A symptom of the problem is that you cannot compile C++
+programs like `groff' 1.19.1 without getting messages similar to the
+following:
+
+     ld: warning: relocation error: R_SPARC_UA32: ...
+       external symbolic relocation against non-allocatable section
+       .debug_info cannot be processed at runtime: relocation ignored.
+
+To work around this problem, compile with `-gstabs+' instead of plain
+`-g'.
+
+   When configuring the GNU Multiple Precision Library (GMP), the MPFR
+library or the MPC library on a Solaris 7 or later system, the canonical
+target triplet must be specified as the `build' parameter on the
+configure line.  This target triplet can be obtained by invoking
+`./config.guess' in the toplevel source directory of GCC (and not that
+of GMP or MPFR or MPC).  For example on a Solaris 9 system:
+
+     % ./configure --build=sparc-sun-solaris2.9 --prefix=xxx
+
+sparc-sun-solaris2.10
+=====================
+
+There is a bug in older versions of the Sun assembler which breaks
+thread-local storage (TLS).  A typical error message is
+
+     ld: fatal: relocation error: R_SPARC_TLS_LE_HIX22: file /var/tmp//ccamPA1v.o:
+       symbol <unknown>: bad symbol type SECT: symbol type must be TLS
+
+This bug is fixed in Sun patch 118683-03 or later.
+
+sparc-*-linux*
+==============
+
+GCC versions 3.0 and higher require binutils 2.11.2 and glibc 2.2.4 or
+newer on this platform.  All earlier binutils and glibc releases
+mishandled unaligned relocations on `sparc-*-*' targets.
+
+sparc64-*-solaris2*
+===================
+
+When configuring the GNU Multiple Precision Library (GMP), the MPFR
+library or the MPC library, the canonical target triplet must be
+specified as the `build' parameter on the configure line.  For example
+on a Solaris 9 system:
+
+     % ./configure --build=sparc64-sun-solaris2.9 --prefix=xxx
+
+   The following compiler flags must be specified in the configure step
+in order to bootstrap this target with the Sun compiler:
+
+     % CC="cc -xarch=v9 -xildoff" SRCDIR/configure [OPTIONS] [TARGET]
+
+`-xarch=v9' specifies the SPARC-V9 architecture to the Sun toolchain
+and `-xildoff' turns off the incremental linker.
+
+sparcv9-*-solaris2*
+===================
+
+This is a synonym for `sparc64-*-solaris2*'.
+
+*-*-vxworks*
+============
+
+Support for VxWorks is in flux.  At present GCC supports _only_ the
+very recent VxWorks 5.5 (aka Tornado 2.2) release, and only on PowerPC.
+We welcome patches for other architectures supported by VxWorks 5.5.
+Support for VxWorks AE would also be welcome; we believe this is merely
+a matter of writing an appropriate "configlette" (see below).  We are
+not interested in supporting older, a.out or COFF-based, versions of
+VxWorks in GCC 3.
+
+   VxWorks comes with an older version of GCC installed in
+`$WIND_BASE/host'; we recommend you do not overwrite it.  Choose an
+installation PREFIX entirely outside $WIND_BASE.  Before running
+`configure', create the directories `PREFIX' and `PREFIX/bin'.  Link or
+copy the appropriate assembler, linker, etc. into `PREFIX/bin', and set
+your PATH to include that directory while running both `configure' and
+`make'.
+
+   You must give `configure' the `--with-headers=$WIND_BASE/target/h'
+switch so that it can find the VxWorks system headers.  Since VxWorks
+is a cross compilation target only, you must also specify
+`--target=TARGET'.  `configure' will attempt to create the directory
+`PREFIX/TARGET/sys-include' and copy files into it; make sure the user
+running `configure' has sufficient privilege to do so.
+
+   GCC's exception handling runtime requires a special "configlette"
+module, `contrib/gthr_supp_vxw_5x.c'.  Follow the instructions in that
+file to add the module to your kernel build.  (Future versions of
+VxWorks will incorporate this module.)
+
+x86_64-*-*, amd64-*-*
+=====================
+
+GCC supports the x86-64 architecture implemented by the AMD64 processor
+(amd64-*-* is an alias for x86_64-*-*) on GNU/Linux, FreeBSD and NetBSD.
+On GNU/Linux the default is a bi-arch compiler which is able to generate
+both 64-bit x86-64 and 32-bit x86 code (via the `-m32' switch).
+
+xtensa*-*-elf
+=============
+
+This target is intended for embedded Xtensa systems using the `newlib'
+C library.  It uses ELF but does not support shared objects.
+Designed-defined instructions specified via the Tensilica Instruction
+Extension (TIE) language are only supported through inline assembly.
+
+   The Xtensa configuration information must be specified prior to
+building GCC.  The `include/xtensa-config.h' header file contains the
+configuration information.  If you created your own Xtensa
+configuration with the Xtensa Processor Generator, the downloaded files
+include a customized copy of this header file, which you can use to
+replace the default header file.
+
+xtensa*-*-linux*
+================
+
+This target is for Xtensa systems running GNU/Linux.  It supports ELF
+shared objects and the GNU C library (glibc).  It also generates
+position-independent code (PIC) regardless of whether the `-fpic' or
+`-fPIC' options are used.  In other respects, this target is the same
+as the `xtensa*-*-elf' target.
+
+Microsoft Windows
+=================
+
+Intel 16-bit versions
+---------------------
+
+The 16-bit versions of Microsoft Windows, such as Windows 3.1, are not
+supported.
+
+   However, the 32-bit port has limited support for Microsoft Windows
+3.11 in the Win32s environment, as a target only.  See below.
+
+Intel 32-bit versions
+---------------------
+
+The 32-bit versions of Windows, including Windows 95, Windows NT,
+Windows XP, and Windows Vista, are supported by several different target
+platforms.  These targets differ in which Windows subsystem they target
+and which C libraries are used.
+
+   * Cygwin *-*-cygwin: Cygwin provides a user-space Linux API
+     emulation layer in the Win32 subsystem.
+
+   * Interix *-*-interix: The Interix subsystem provides native support
+     for POSIX.
+
+   * MinGW *-*-mingw32: MinGW is a native GCC port for the Win32
+     subsystem that provides a subset of POSIX.
+
+   * MKS i386-pc-mks: NuTCracker from MKS.  See
+     `http://www.mkssoftware.com/' for more information.
+
+Intel 64-bit versions
+---------------------
+
+GCC contains support for x86-64 using the mingw-w64 runtime library,
+available from `http://mingw-w64.sourceforge.net/'.  This library
+should be used with the target triple x86_64-pc-mingw32.
+
+   Presently Windows for Itanium is not supported.
+
+Windows CE
+----------
+
+Windows CE is supported as a target only on ARM (arm-wince-pe), Hitachi
+SuperH (sh-wince-pe), and MIPS (mips-wince-pe).
+
+Other Windows Platforms
+-----------------------
+
+GCC no longer supports Windows NT on the Alpha or PowerPC.
+
+   GCC no longer supports the Windows POSIX subsystem.  However, it does
+support the Interix subsystem.  See above.
+
+   Old target names including *-*-winnt and *-*-windowsnt are no longer
+used.
+
+   PW32 (i386-pc-pw32) support was never completed, and the project
+seems to be inactive.  See `http://pw32.sourceforge.net/' for more
+information.
+
+   UWIN support has been removed due to a lack of maintenance.
+
+*-*-cygwin
+==========
+
+Ports of GCC are included with the Cygwin environment.
+
+   GCC will build under Cygwin without modification; it does not build
+with Microsoft's C++ compiler and there are no plans to make it do so.
+
+   The Cygwin native compiler can be configured to target any 32-bit x86
+cpu architecture desired; the default is i686-pc-cygwin.  It should be
+used with as up-to-date a version of binutils as possible; use either
+the latest official GNU binutils release in the Cygwin distribution, or
+version 2.20 or above if building your own.
+
+*-*-interix
+===========
+
+The Interix target is used by OpenNT, Interix, Services For UNIX (SFU),
+and Subsystem for UNIX-based Applications (SUA).  Applications compiled
+with this target run in the Interix subsystem, which is separate from
+the Win32 subsystem.  This target was last known to work in GCC 3.3.
+
+*-*-mingw32
+===========
+
+GCC will build with and support only MinGW runtime 3.12 and later.
+Earlier versions of headers are incompatible with the new default
+semantics of `extern inline' in `-std=c99' and `-std=gnu99' modes.
+
+Older systems
+=============
+
+GCC contains support files for many older (1980s and early 1990s) Unix
+variants.  For the most part, support for these systems has not been
+deliberately removed, but it has not been maintained for several years
+and may suffer from bitrot.
+
+   Starting with GCC 3.1, each release has a list of "obsoleted"
+systems.  Support for these systems is still present in that release,
+but `configure' will fail unless the `--enable-obsolete' option is
+given.  Unless a maintainer steps forward, support for these systems
+will be removed from the next release of GCC.
+
+   Support for old systems as hosts for GCC can cause problems if the
+workarounds for compiler, library and operating system bugs affect the
+cleanliness or maintainability of the rest of GCC.  In some cases, to
+bring GCC up on such a system, if still possible with current GCC, may
+require first installing an old version of GCC which did work on that
+system, and using it to compile a more recent GCC, to avoid bugs in the
+vendor compiler.  Old releases of GCC 1 and GCC 2 are available in the
+`old-releases' directory on the GCC mirror sites.  Header bugs may
+generally be avoided using `fixincludes', but bugs or deficiencies in
+libraries and the operating system may still cause problems.
+
+   Support for older systems as targets for cross-compilation is less
+problematic than support for them as hosts for GCC; if an enthusiast
+wishes to make such a target work again (including resurrecting any of
+the targets that never worked with GCC 2, starting from the last
+version before they were removed), patches following the usual
+requirements would be likely to be accepted, since they should not
+affect the support for more modern targets.
+
+   For some systems, old versions of GNU binutils may also be useful,
+and are available from `pub/binutils/old-releases' on sourceware.org
+mirror sites.
+
+   Some of the information on specific systems above relates to such
+older systems, but much of the information about GCC on such systems
+(which may no longer be applicable to current GCC) is to be found in
+the GCC texinfo manual.
+
+all ELF targets (SVR4, Solaris 2, etc.)
+=======================================
+
+C++ support is significantly better on ELF targets if you use the GNU
+linker; duplicate copies of inlines, vtables and template
+instantiations will be discarded automatically.
+
+
+File: gccinstall.info,  Node: Old,  Next: GNU Free Documentation License,  Prev: Specific,  Up: Top
+
+10 Old installation documentation
+*********************************
+
+   Note most of this information is out of date and superseded by the
+previous chapters of this manual.  It is provided for historical
+reference only, because of a lack of volunteers to merge it into the
+main manual.
+
+* Menu:
+
+* Configurations::    Configurations Supported by GCC.
+
+   Here is the procedure for installing GCC on a GNU or Unix system.
+
+  1. If you have chosen a configuration for GCC which requires other GNU
+     tools (such as GAS or the GNU linker) instead of the standard
+     system tools, install the required tools in the build directory
+     under the names `as', `ld' or whatever is appropriate.
+
+     Alternatively, you can do subsequent compilation using a value of
+     the `PATH' environment variable such that the necessary GNU tools
+     come before the standard system tools.
+
+  2. Specify the host, build and target machine configurations.  You do
+     this when you run the `configure' script.
+
+     The "build" machine is the system which you are using, the "host"
+     machine is the system where you want to run the resulting compiler
+     (normally the build machine), and the "target" machine is the
+     system for which you want the compiler to generate code.
+
+     If you are building a compiler to produce code for the machine it
+     runs on (a native compiler), you normally do not need to specify
+     any operands to `configure'; it will try to guess the type of
+     machine you are on and use that as the build, host and target
+     machines.  So you don't need to specify a configuration when
+     building a native compiler unless `configure' cannot figure out
+     what your configuration is or guesses wrong.
+
+     In those cases, specify the build machine's "configuration name"
+     with the `--host' option; the host and target will default to be
+     the same as the host machine.
+
+     Here is an example:
+
+          ./configure --host=sparc-sun-sunos4.1
+
+     A configuration name may be canonical or it may be more or less
+     abbreviated.
+
+     A canonical configuration name has three parts, separated by
+     dashes.  It looks like this: `CPU-COMPANY-SYSTEM'.  (The three
+     parts may themselves contain dashes; `configure' can figure out
+     which dashes serve which purpose.)  For example,
+     `m68k-sun-sunos4.1' specifies a Sun 3.
+
+     You can also replace parts of the configuration by nicknames or
+     aliases.  For example, `sun3' stands for `m68k-sun', so
+     `sun3-sunos4.1' is another way to specify a Sun 3.
+
+     You can specify a version number after any of the system types,
+     and some of the CPU types.  In most cases, the version is
+     irrelevant, and will be ignored.  So you might as well specify the
+     version if you know it.
+
+     See *note Configurations::, for a list of supported configuration
+     names and notes on many of the configurations.  You should check
+     the notes in that section before proceeding any further with the
+     installation of GCC.
+
+
+
+File: gccinstall.info,  Node: Configurations,  Up: Old
+
+10.1 Configurations Supported by GCC
+====================================
+
+   Here are the possible CPU types:
+
+     1750a, a29k, alpha, arm, avr, cN, clipper, dsp16xx, elxsi, fr30,
+     h8300, hppa1.0, hppa1.1, i370, i386, i486, i586, i686, i786, i860,
+     i960, ip2k, m32r, m68000, m68k, m6811, m6812, m88k, mcore, mips,
+     mipsel, mips64, mips64el, mn10200, mn10300, ns32k, pdp11, powerpc,
+     powerpcle, romp, rs6000, sh, sparc, sparclite, sparc64, v850, vax,
+     we32k.
+
+   Here are the recognized company names.  As you can see, customary
+abbreviations are used rather than the longer official names.
+
+     acorn, alliant, altos, apollo, apple, att, bull, cbm, convergent,
+     convex, crds, dec, dg, dolphin, elxsi, encore, harris, hitachi,
+     hp, ibm, intergraph, isi, mips, motorola, ncr, next, ns, omron,
+     plexus, sequent, sgi, sony, sun, tti, unicom, wrs.
+
+   The company name is meaningful only to disambiguate when the rest of
+the information supplied is insufficient.  You can omit it, writing
+just `CPU-SYSTEM', if it is not needed.  For example, `vax-ultrix4.2'
+is equivalent to `vax-dec-ultrix4.2'.
+
+   Here is a list of system types:
+
+     386bsd, aix, acis, amigaos, aos, aout, aux, bosx, bsd, clix, coff,
+     ctix, cxux, dgux, dynix, ebmon, ecoff, elf, esix, freebsd, hms,
+     genix, gnu, linux, linux-gnu, hiux, hpux, iris, irix, isc, luna,
+     lynxos, mach, minix, msdos, mvs, netbsd, newsos, nindy, ns, osf,
+     osfrose, ptx, riscix, riscos, rtu, sco, sim, solaris, sunos, sym,
+     sysv, udi, ultrix, unicos, uniplus, unos, vms, vsta, vxworks,
+     winnt, xenix.
+
+You can omit the system type; then `configure' guesses the operating
+system from the CPU and company.
+
+   You can add a version number to the system type; this may or may not
+make a difference.  For example, you can write `bsd4.3' or `bsd4.4' to
+distinguish versions of BSD.  In practice, the version number is most
+needed for `sysv3' and `sysv4', which are often treated differently.
+
+   `linux-gnu' is the canonical name for the GNU/Linux target; however
+GCC will also accept `linux'.  The version of the kernel in use is not
+relevant on these systems.  A suffix such as `libc1' or `aout'
+distinguishes major versions of the C library; all of the suffixed
+versions are obsolete.
+
+   If you specify an impossible combination such as `i860-dg-vms', then
+you may get an error message from `configure', or it may ignore part of
+the information and do the best it can with the rest.  `configure'
+always prints the canonical name for the alternative that it used.  GCC
+does not support all possible alternatives.
+
+   Often a particular model of machine has a name.  Many machine names
+are recognized as aliases for CPU/company combinations.  Thus, the
+machine name `sun3', mentioned above, is an alias for `m68k-sun'.
+Sometimes we accept a company name as a machine name, when the name is
+popularly used for a particular machine.  Here is a table of the known
+machine names:
+
+     3300, 3b1, 3bN, 7300, altos3068, altos, apollo68, att-7300,
+     balance, convex-cN, crds, decstation-3100, decstation, delta,
+     encore, fx2800, gmicro, hp7NN, hp8NN, hp9k2NN, hp9k3NN, hp9k7NN,
+     hp9k8NN, iris4d, iris, isi68, m3230, magnum, merlin, miniframe,
+     mmax, news-3600, news800, news, next, pbd, pc532, pmax, powerpc,
+     powerpcle, ps2, risc-news, rtpc, sun2, sun386i, sun386, sun3,
+     sun4, symmetry, tower-32, tower.
+
+Remember that a machine name specifies both the cpu type and the company
+name.  If you want to install your own homemade configuration files,
+you can use `local' as the company name to access them.  If you use
+configuration `CPU-local', the configuration name without the cpu prefix
+is used to form the configuration file names.
+
+   Thus, if you specify `m68k-local', configuration uses files
+`m68k.md', `local.h', `m68k.c', `xm-local.h', `t-local', and `x-local',
+all in the directory `config/m68k'.
+
+
+File: gccinstall.info,  Node: GNU Free Documentation License,  Next: Concept Index,  Prev: Old,  Up: Top
+
+GNU Free Documentation License
+******************************
+
+                     Version 1.3, 3 November 2008
+
+     Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
+     `http://fsf.org/'
+
+     Everyone is permitted to copy and distribute verbatim copies
+     of this license document, but changing it is not allowed.
+
+  0. PREAMBLE
+
+     The purpose of this License is to make a manual, textbook, or other
+     functional and useful document "free" in the sense of freedom: to
+     assure everyone the effective freedom to copy and redistribute it,
+     with or without modifying it, either commercially or
+     noncommercially.  Secondarily, this License preserves for the
+     author and publisher a way to get credit for their work, while not
+     being considered responsible for modifications made by others.
+
+     This License is a kind of "copyleft", which means that derivative
+     works of the document must themselves be free in the same sense.
+     It complements the GNU General Public License, which is a copyleft
+     license designed for free software.
+
+     We have designed this License in order to use it for manuals for
+     free software, because free software needs free documentation: a
+     free program should come with manuals providing the same freedoms
+     that the software does.  But this License is not limited to
+     software manuals; it can be used for any textual work, regardless
+     of subject matter or whether it is published as a printed book.
+     We recommend this License principally for works whose purpose is
+     instruction or reference.
+
+  1. APPLICABILITY AND DEFINITIONS
+
+     This License applies to any manual or other work, in any medium,
+     that contains a notice placed by the copyright holder saying it
+     can be distributed under the terms of this License.  Such a notice
+     grants a world-wide, royalty-free license, unlimited in duration,
+     to use that work under the conditions stated herein.  The
+     "Document", below, refers to any such manual or work.  Any member
+     of the public is a licensee, and is addressed as "you".  You
+     accept the license if you copy, modify or distribute the work in a
+     way requiring permission under copyright law.
+
+     A "Modified Version" of the Document means any work containing the
+     Document or a portion of it, either copied verbatim, or with
+     modifications and/or translated into another language.
+
+     A "Secondary Section" is a named appendix or a front-matter section
+     of the Document that deals exclusively with the relationship of the
+     publishers or authors of the Document to the Document's overall
+     subject (or to related matters) and contains nothing that could
+     fall directly within that overall subject.  (Thus, if the Document
+     is in part a textbook of mathematics, a Secondary Section may not
+     explain any mathematics.)  The relationship could be a matter of
+     historical connection with the subject or with related matters, or
+     of legal, commercial, philosophical, ethical or political position
+     regarding them.
+
+     The "Invariant Sections" are certain Secondary Sections whose
+     titles are designated, as being those of Invariant Sections, in
+     the notice that says that the Document is released under this
+     License.  If a section does not fit the above definition of
+     Secondary then it is not allowed to be designated as Invariant.
+     The Document may contain zero Invariant Sections.  If the Document
+     does not identify any Invariant Sections then there are none.
+
+     The "Cover Texts" are certain short passages of text that are
+     listed, as Front-Cover Texts or Back-Cover Texts, in the notice
+     that says that the Document is released under this License.  A
+     Front-Cover Text may be at most 5 words, and a Back-Cover Text may
+     be at most 25 words.
+
+     A "Transparent" copy of the Document means a machine-readable copy,
+     represented in a format whose specification is available to the
+     general public, that is suitable for revising the document
+     straightforwardly with generic text editors or (for images
+     composed of pixels) generic paint programs or (for drawings) some
+     widely available drawing editor, and that is suitable for input to
+     text formatters or for automatic translation to a variety of
+     formats suitable for input to text formatters.  A copy made in an
+     otherwise Transparent file format whose markup, or absence of
+     markup, has been arranged to thwart or discourage subsequent
+     modification by readers is not Transparent.  An image format is
+     not Transparent if used for any substantial amount of text.  A
+     copy that is not "Transparent" is called "Opaque".
+
+     Examples of suitable formats for Transparent copies include plain
+     ASCII without markup, Texinfo input format, LaTeX input format,
+     SGML or XML using a publicly available DTD, and
+     standard-conforming simple HTML, PostScript or PDF designed for
+     human modification.  Examples of transparent image formats include
+     PNG, XCF and JPG.  Opaque formats include proprietary formats that
+     can be read and edited only by proprietary word processors, SGML or
+     XML for which the DTD and/or processing tools are not generally
+     available, and the machine-generated HTML, PostScript or PDF
+     produced by some word processors for output purposes only.
+
+     The "Title Page" means, for a printed book, the title page itself,
+     plus such following pages as are needed to hold, legibly, the
+     material this License requires to appear in the title page.  For
+     works in formats which do not have any title page as such, "Title
+     Page" means the text near the most prominent appearance of the
+     work's title, preceding the beginning of the body of the text.
+
+     The "publisher" means any person or entity that distributes copies
+     of the Document to the public.
+
+     A section "Entitled XYZ" means a named subunit of the Document
+     whose title either is precisely XYZ or contains XYZ in parentheses
+     following text that translates XYZ in another language.  (Here XYZ
+     stands for a specific section name mentioned below, such as
+     "Acknowledgements", "Dedications", "Endorsements", or "History".)
+     To "Preserve the Title" of such a section when you modify the
+     Document means that it remains a section "Entitled XYZ" according
+     to this definition.
+
+     The Document may include Warranty Disclaimers next to the notice
+     which states that this License applies to the Document.  These
+     Warranty Disclaimers are considered to be included by reference in
+     this License, but only as regards disclaiming warranties: any other
+     implication that these Warranty Disclaimers may have is void and
+     has no effect on the meaning of this License.
+
+  2. VERBATIM COPYING
+
+     You may copy and distribute the Document in any medium, either
+     commercially or noncommercially, provided that this License, the
+     copyright notices, and the license notice saying this License
+     applies to the Document are reproduced in all copies, and that you
+     add no other conditions whatsoever to those of this License.  You
+     may not use technical measures to obstruct or control the reading
+     or further copying of the copies you make or distribute.  However,
+     you may accept compensation in exchange for copies.  If you
+     distribute a large enough number of copies you must also follow
+     the conditions in section 3.
+
+     You may also lend copies, under the same conditions stated above,
+     and you may publicly display copies.
+
+  3. COPYING IN QUANTITY
+
+     If you publish printed copies (or copies in media that commonly
+     have printed covers) of the Document, numbering more than 100, and
+     the Document's license notice requires Cover Texts, you must
+     enclose the copies in covers that carry, clearly and legibly, all
+     these Cover Texts: Front-Cover Texts on the front cover, and
+     Back-Cover Texts on the back cover.  Both covers must also clearly
+     and legibly identify you as the publisher of these copies.  The
+     front cover must present the full title with all words of the
+     title equally prominent and visible.  You may add other material
+     on the covers in addition.  Copying with changes limited to the
+     covers, as long as they preserve the title of the Document and
+     satisfy these conditions, can be treated as verbatim copying in
+     other respects.
+
+     If the required texts for either cover are too voluminous to fit
+     legibly, you should put the first ones listed (as many as fit
+     reasonably) on the actual cover, and continue the rest onto
+     adjacent pages.
+
+     If you publish or distribute Opaque copies of the Document
+     numbering more than 100, you must either include a
+     machine-readable Transparent copy along with each Opaque copy, or
+     state in or with each Opaque copy a computer-network location from
+     which the general network-using public has access to download
+     using public-standard network protocols a complete Transparent
+     copy of the Document, free of added material.  If you use the
+     latter option, you must take reasonably prudent steps, when you
+     begin distribution of Opaque copies in quantity, to ensure that
+     this Transparent copy will remain thus accessible at the stated
+     location until at least one year after the last time you
+     distribute an Opaque copy (directly or through your agents or
+     retailers) of that edition to the public.
+
+     It is requested, but not required, that you contact the authors of
+     the Document well before redistributing any large number of
+     copies, to give them a chance to provide you with an updated
+     version of the Document.
+
+  4. MODIFICATIONS
+
+     You may copy and distribute a Modified Version of the Document
+     under the conditions of sections 2 and 3 above, provided that you
+     release the Modified Version under precisely this License, with
+     the Modified Version filling the role of the Document, thus
+     licensing distribution and modification of the Modified Version to
+     whoever possesses a copy of it.  In addition, you must do these
+     things in the Modified Version:
+
+       A. Use in the Title Page (and on the covers, if any) a title
+          distinct from that of the Document, and from those of
+          previous versions (which should, if there were any, be listed
+          in the History section of the Document).  You may use the
+          same title as a previous version if the original publisher of
+          that version gives permission.
+
+       B. List on the Title Page, as authors, one or more persons or
+          entities responsible for authorship of the modifications in
+          the Modified Version, together with at least five of the
+          principal authors of the Document (all of its principal
+          authors, if it has fewer than five), unless they release you
+          from this requirement.
+
+       C. State on the Title page the name of the publisher of the
+          Modified Version, as the publisher.
+
+       D. Preserve all the copyright notices of the Document.
+
+       E. Add an appropriate copyright notice for your modifications
+          adjacent to the other copyright notices.
+
+       F. Include, immediately after the copyright notices, a license
+          notice giving the public permission to use the Modified
+          Version under the terms of this License, in the form shown in
+          the Addendum below.
+
+       G. Preserve in that license notice the full lists of Invariant
+          Sections and required Cover Texts given in the Document's
+          license notice.
+
+       H. Include an unaltered copy of this License.
+
+       I. Preserve the section Entitled "History", Preserve its Title,
+          and add to it an item stating at least the title, year, new
+          authors, and publisher of the Modified Version as given on
+          the Title Page.  If there is no section Entitled "History" in
+          the Document, create one stating the title, year, authors,
+          and publisher of the Document as given on its Title Page,
+          then add an item describing the Modified Version as stated in
+          the previous sentence.
+
+       J. Preserve the network location, if any, given in the Document
+          for public access to a Transparent copy of the Document, and
+          likewise the network locations given in the Document for
+          previous versions it was based on.  These may be placed in
+          the "History" section.  You may omit a network location for a
+          work that was published at least four years before the
+          Document itself, or if the original publisher of the version
+          it refers to gives permission.
+
+       K. For any section Entitled "Acknowledgements" or "Dedications",
+          Preserve the Title of the section, and preserve in the
+          section all the substance and tone of each of the contributor
+          acknowledgements and/or dedications given therein.
+
+       L. Preserve all the Invariant Sections of the Document,
+          unaltered in their text and in their titles.  Section numbers
+          or the equivalent are not considered part of the section
+          titles.
+
+       M. Delete any section Entitled "Endorsements".  Such a section
+          may not be included in the Modified Version.
+
+       N. Do not retitle any existing section to be Entitled
+          "Endorsements" or to conflict in title with any Invariant
+          Section.
+
+       O. Preserve any Warranty Disclaimers.
+
+     If the Modified Version includes new front-matter sections or
+     appendices that qualify as Secondary Sections and contain no
+     material copied from the Document, you may at your option
+     designate some or all of these sections as invariant.  To do this,
+     add their titles to the list of Invariant Sections in the Modified
+     Version's license notice.  These titles must be distinct from any
+     other section titles.
+
+     You may add a section Entitled "Endorsements", provided it contains
+     nothing but endorsements of your Modified Version by various
+     parties--for example, statements of peer review or that the text
+     has been approved by an organization as the authoritative
+     definition of a standard.
+
+     You may add a passage of up to five words as a Front-Cover Text,
+     and a passage of up to 25 words as a Back-Cover Text, to the end
+     of the list of Cover Texts in the Modified Version.  Only one
+     passage of Front-Cover Text and one of Back-Cover Text may be
+     added by (or through arrangements made by) any one entity.  If the
+     Document already includes a cover text for the same cover,
+     previously added by you or by arrangement made by the same entity
+     you are acting on behalf of, you may not add another; but you may
+     replace the old one, on explicit permission from the previous
+     publisher that added the old one.
+
+     The author(s) and publisher(s) of the Document do not by this
+     License give permission to use their names for publicity for or to
+     assert or imply endorsement of any Modified Version.
+
+  5. COMBINING DOCUMENTS
+
+     You may combine the Document with other documents released under
+     this License, under the terms defined in section 4 above for
+     modified versions, provided that you include in the combination
+     all of the Invariant Sections of all of the original documents,
+     unmodified, and list them all as Invariant Sections of your
+     combined work in its license notice, and that you preserve all
+     their Warranty Disclaimers.
+
+     The combined work need only contain one copy of this License, and
+     multiple identical Invariant Sections may be replaced with a single
+     copy.  If there are multiple Invariant Sections with the same name
+     but different contents, make the title of each such section unique
+     by adding at the end of it, in parentheses, the name of the
+     original author or publisher of that section if known, or else a
+     unique number.  Make the same adjustment to the section titles in
+     the list of Invariant Sections in the license notice of the
+     combined work.
+
+     In the combination, you must combine any sections Entitled
+     "History" in the various original documents, forming one section
+     Entitled "History"; likewise combine any sections Entitled
+     "Acknowledgements", and any sections Entitled "Dedications".  You
+     must delete all sections Entitled "Endorsements."
+
+  6. COLLECTIONS OF DOCUMENTS
+
+     You may make a collection consisting of the Document and other
+     documents released under this License, and replace the individual
+     copies of this License in the various documents with a single copy
+     that is included in the collection, provided that you follow the
+     rules of this License for verbatim copying of each of the
+     documents in all other respects.
+
+     You may extract a single document from such a collection, and
+     distribute it individually under this License, provided you insert
+     a copy of this License into the extracted document, and follow
+     this License in all other respects regarding verbatim copying of
+     that document.
+
+  7. AGGREGATION WITH INDEPENDENT WORKS
+
+     A compilation of the Document or its derivatives with other
+     separate and independent documents or works, in or on a volume of
+     a storage or distribution medium, is called an "aggregate" if the
+     copyright resulting from the compilation is not used to limit the
+     legal rights of the compilation's users beyond what the individual
+     works permit.  When the Document is included in an aggregate, this
+     License does not apply to the other works in the aggregate which
+     are not themselves derivative works of the Document.
+
+     If the Cover Text requirement of section 3 is applicable to these
+     copies of the Document, then if the Document is less than one half
+     of the entire aggregate, the Document's Cover Texts may be placed
+     on covers that bracket the Document within the aggregate, or the
+     electronic equivalent of covers if the Document is in electronic
+     form.  Otherwise they must appear on printed covers that bracket
+     the whole aggregate.
+
+  8. TRANSLATION
+
+     Translation is considered a kind of modification, so you may
+     distribute translations of the Document under the terms of section
+     4.  Replacing Invariant Sections with translations requires special
+     permission from their copyright holders, but you may include
+     translations of some or all Invariant Sections in addition to the
+     original versions of these Invariant Sections.  You may include a
+     translation of this License, and all the license notices in the
+     Document, and any Warranty Disclaimers, provided that you also
+     include the original English version of this License and the
+     original versions of those notices and disclaimers.  In case of a
+     disagreement between the translation and the original version of
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+
+     If a section in the Document is Entitled "Acknowledgements",
+     "Dedications", or "History", the requirement (section 4) to
+     Preserve its Title (section 1) will typically require changing the
+     actual title.
+
+  9. TERMINATION
+
+     You may not copy, modify, sublicense, or distribute the Document
+     except as expressly provided under this License.  Any attempt
+     otherwise to copy, modify, sublicense, or distribute it is void,
+     and will automatically terminate your rights under this License.
+
+     However, if you cease all violation of this License, then your
+     license from a particular copyright holder is reinstated (a)
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+     Moreover, your license from a particular copyright holder is
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+     violation by some reasonable means, this is the first time you have
+     received notice of violation of this License (for any work) from
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+     after your receipt of the notice.
+
+     Termination of your rights under this section does not terminate
+     the licenses of parties who have received copies or rights from
+     you under this License.  If your rights have been terminated and
+     not permanently reinstated, receipt of a copy of some or all of
+     the same material does not give you any rights to use it.
+
+ 10. FUTURE REVISIONS OF THIS LICENSE
+
+     The Free Software Foundation may publish new, revised versions of
+     the GNU Free Documentation License from time to time.  Such new
+     versions will be similar in spirit to the present version, but may
+     differ in detail to address new problems or concerns.  See
+     `http://www.gnu.org/copyleft/'.
+
+     Each version of the License is given a distinguishing version
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+     version of this License "or any later version" applies to it, you
+     have the option of following the terms and conditions either of
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+     published (not as a draft) by the Free Software Foundation.  If
+     the Document does not specify a version number of this License,
+     you may choose any version ever published (not as a draft) by the
+     Free Software Foundation.  If the Document specifies that a proxy
+     can decide which future versions of this License can be used, that
+     proxy's public statement of acceptance of a version permanently
+     authorizes you to choose that version for the Document.
+
+ 11. RELICENSING
+
+     "Massive Multiauthor Collaboration Site" (or "MMC Site") means any
+     World Wide Web server that publishes copyrightable works and also
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+     A "Massive Multiauthor Collaboration" (or "MMC") contained in the
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+     site.
+
+     "CC-BY-SA" means the Creative Commons Attribution-Share Alike 3.0
+     license published by Creative Commons Corporation, a not-for-profit
+     corporation with a principal place of business in San Francisco,
+     California, as well as future copyleft versions of that license
+     published by that same organization.
+
+     "Incorporate" means to publish or republish a Document, in whole or
+     in part, as part of another Document.
+
+     An MMC is "eligible for relicensing" if it is licensed under this
+     License, and if all works that were first published under this
+     License somewhere other than this MMC, and subsequently
+     incorporated in whole or in part into the MMC, (1) had no cover
+     texts or invariant sections, and (2) were thus incorporated prior
+     to November 1, 2008.
+
+     The operator of an MMC Site may republish an MMC contained in the
+     site under CC-BY-SA on the same site at any time before August 1,
+     2009, provided the MMC is eligible for relicensing.
+
+
+ADDENDUM: How to use this License for your documents
+====================================================
+
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and license
+notices just after the title page:
+
+       Copyright (C)  YEAR  YOUR NAME.
+       Permission is granted to copy, distribute and/or modify this document
+       under the terms of the GNU Free Documentation License, Version 1.3
+       or any later version published by the Free Software Foundation;
+       with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
+       Texts.  A copy of the license is included in the section entitled ``GNU
+       Free Documentation License''.
+
+   If you have Invariant Sections, Front-Cover Texts and Back-Cover
+Texts, replace the "with...Texts." line with this:
+
+         with the Invariant Sections being LIST THEIR TITLES, with
+         the Front-Cover Texts being LIST, and with the Back-Cover Texts
+         being LIST.
+
+   If you have Invariant Sections without Cover Texts, or some other
+combination of the three, merge those two alternatives to suit the
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+
+   If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
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+
+
+File: gccinstall.info,  Node: Concept Index,  Prev: GNU Free Documentation License,  Up: Top
+
+Concept Index
+*************
+
+
+* Menu:
+
+* Binaries:                              Binaries.           (line    6)
+* build_configargs:                      Configuration.      (line 1401)
+* Configuration:                         Configuration.      (line    6)
+* configurations supported by GCC:       Configurations.     (line    6)
+* Downloading GCC:                       Downloading the source.
+                                                             (line    6)
+* Downloading the Source:                Downloading the source.
+                                                             (line    6)
+* FDL, GNU Free Documentation License:   GNU Free Documentation License.
+                                                             (line    6)
+* Host specific installation:            Specific.           (line    6)
+* host_configargs:                       Configuration.      (line 1405)
+* Installing GCC: Binaries:              Binaries.           (line    6)
+* Installing GCC: Building:              Building.           (line    6)
+* Installing GCC: Configuration:         Configuration.      (line    6)
+* Installing GCC: Testing:               Testing.            (line    6)
+* Prerequisites:                         Prerequisites.      (line    6)
+* Specific:                              Specific.           (line    6)
+* Specific installation notes:           Specific.           (line    6)
+* Target specific installation:          Specific.           (line    6)
+* Target specific installation notes:    Specific.           (line    6)
+* target_configargs:                     Configuration.      (line 1409)
+* Testing:                               Testing.            (line    6)
+* Testsuite:                             Testing.            (line    6)
+
+
+
+Tag Table:
+Node: Top1972
+Node: Installing GCC2530
+Node: Prerequisites4045
+Node: Downloading the source14201
+Node: Configuration16138
+Ref: with-gnu-as30281
+Ref: with-as31179
+Ref: with-gnu-ld32592
+Node: Building77932
+Node: Testing93417
+Node: Final install101114
+Node: Binaries106428
+Node: Specific108029
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+Ref: alpha-dec-osf51109024
+Ref: arc-x-elf111222
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+Ref: x-x-linux-gnu124873
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+Node: Configurations166527
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+
+End Tag Table
diff --git a/gcc/doc/gccint.info b/gcc/doc/gccint.info
new file mode 100644
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--- /dev/null
+++ b/gcc/doc/gccint.info
@@ -0,0 +1,47923 @@
+This is doc/gccint.info, produced by makeinfo version 4.13 from
+/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/doc/gccint.texi.
+
+Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010 Free
+Software Foundation, Inc.
+
+ Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being "Funding Free Software", the Front-Cover Texts
+being (a) (see below), and with the Back-Cover Texts being (b) (see
+below).  A copy of the license is included in the section entitled "GNU
+Free Documentation License".
+
+ (a) The FSF's Front-Cover Text is:
+
+ A GNU Manual
+
+ (b) The FSF's Back-Cover Text is:
+
+ You have freedom to copy and modify this GNU Manual, like GNU
+software.  Copies published by the Free Software Foundation raise
+funds for GNU development.
+
+INFO-DIR-SECTION Software development
+START-INFO-DIR-ENTRY
+* gccint: (gccint).            Internals of the GNU Compiler Collection.
+END-INFO-DIR-ENTRY
+ This file documents the internals of the GNU compilers.
+
+ Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010 Free
+Software Foundation, Inc.
+
+ Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being "Funding Free Software", the Front-Cover Texts
+being (a) (see below), and with the Back-Cover Texts being (b) (see
+below).  A copy of the license is included in the section entitled "GNU
+Free Documentation License".
+
+ (a) The FSF's Front-Cover Text is:
+
+ A GNU Manual
+
+ (b) The FSF's Back-Cover Text is:
+
+ You have freedom to copy and modify this GNU Manual, like GNU
+software.  Copies published by the Free Software Foundation raise
+funds for GNU development.
+
+
+
+File: gccint.info,  Node: Top,  Next: Contributing,  Up: (DIR)
+
+Introduction
+************
+
+This manual documents the internals of the GNU compilers, including how
+to port them to new targets and some information about how to write
+front ends for new languages.  It corresponds to the compilers
+(GCC) version 4.6.4.  The use of the GNU compilers is documented in a
+separate manual.  *Note Introduction: (gcc)Top.
+
+ This manual is mainly a reference manual rather than a tutorial.  It
+discusses how to contribute to GCC (*note Contributing::), the
+characteristics of the machines supported by GCC as hosts and targets
+(*note Portability::), how GCC relates to the ABIs on such systems
+(*note Interface::), and the characteristics of the languages for which
+GCC front ends are written (*note Languages::).  It then describes the
+GCC source tree structure and build system, some of the interfaces to
+GCC front ends, and how support for a target system is implemented in
+GCC.
+
+ Additional tutorial information is linked to from
+`http://gcc.gnu.org/readings.html'.
+
+* Menu:
+
+* Contributing::    How to contribute to testing and developing GCC.
+* Portability::     Goals of GCC's portability features.
+* Interface::       Function-call interface of GCC output.
+* Libgcc::          Low-level runtime library used by GCC.
+* Languages::       Languages for which GCC front ends are written.
+* Source Tree::     GCC source tree structure and build system.
+* Testsuites::      GCC testsuites.
+* Options::         Option specification files.
+* Passes::          Order of passes, what they do, and what each file is for.
+* GENERIC::         Language-independent representation generated by Front Ends
+* GIMPLE::          Tuple representation used by Tree SSA optimizers
+* Tree SSA::        Analysis and optimization of GIMPLE
+* RTL::             Machine-dependent low-level intermediate representation.
+* Control Flow::    Maintaining and manipulating the control flow graph.
+* Loop Analysis and Representation:: Analysis and representation of loops
+* Machine Desc::    How to write machine description instruction patterns.
+* Target Macros::   How to write the machine description C macros and functions.
+* Host Config::     Writing the `xm-MACHINE.h' file.
+* Fragments::       Writing the `t-TARGET' and `x-HOST' files.
+* Collect2::        How `collect2' works; how it finds `ld'.
+* Header Dirs::     Understanding the standard header file directories.
+* Type Information:: GCC's memory management; generating type information.
+* Plugins::         Extending the compiler with plugins.
+* LTO::             Using Link-Time Optimization.
+
+* Funding::         How to help assure funding for free software.
+* GNU Project::     The GNU Project and GNU/Linux.
+
+* Copying::         GNU General Public License says
+                    how you can copy and share GCC.
+* GNU Free Documentation License:: How you can copy and share this manual.
+* Contributors::    People who have contributed to GCC.
+
+* Option Index::    Index to command line options.
+* Concept Index::   Index of concepts and symbol names.
+
+
+File: gccint.info,  Node: Contributing,  Next: Portability,  Prev: Top,  Up: Top
+
+1 Contributing to GCC Development
+*********************************
+
+If you would like to help pretest GCC releases to assure they work well,
+current development sources are available by SVN (see
+`http://gcc.gnu.org/svn.html').  Source and binary snapshots are also
+available for FTP; see `http://gcc.gnu.org/snapshots.html'.
+
+ If you would like to work on improvements to GCC, please read the
+advice at these URLs:
+
+     `http://gcc.gnu.org/contribute.html'
+     `http://gcc.gnu.org/contributewhy.html'
+
+for information on how to make useful contributions and avoid
+duplication of effort.  Suggested projects are listed at
+`http://gcc.gnu.org/projects/'.
+
+
+File: gccint.info,  Node: Portability,  Next: Interface,  Prev: Contributing,  Up: Top
+
+2 GCC and Portability
+*********************
+
+GCC itself aims to be portable to any machine where `int' is at least a
+32-bit type.  It aims to target machines with a flat (non-segmented)
+byte addressed data address space (the code address space can be
+separate).  Target ABIs may have 8, 16, 32 or 64-bit `int' type.  `char'
+can be wider than 8 bits.
+
+ GCC gets most of the information about the target machine from a
+machine description which gives an algebraic formula for each of the
+machine's instructions.  This is a very clean way to describe the
+target.  But when the compiler needs information that is difficult to
+express in this fashion, ad-hoc parameters have been defined for
+machine descriptions.  The purpose of portability is to reduce the
+total work needed on the compiler; it was not of interest for its own
+sake.
+
+ GCC does not contain machine dependent code, but it does contain code
+that depends on machine parameters such as endianness (whether the most
+significant byte has the highest or lowest address of the bytes in a
+word) and the availability of autoincrement addressing.  In the
+RTL-generation pass, it is often necessary to have multiple strategies
+for generating code for a particular kind of syntax tree, strategies
+that are usable for different combinations of parameters.  Often, not
+all possible cases have been addressed, but only the common ones or
+only the ones that have been encountered.  As a result, a new target
+may require additional strategies.  You will know if this happens
+because the compiler will call `abort'.  Fortunately, the new
+strategies can be added in a machine-independent fashion, and will
+affect only the target machines that need them.
+
+
+File: gccint.info,  Node: Interface,  Next: Libgcc,  Prev: Portability,  Up: Top
+
+3 Interfacing to GCC Output
+***************************
+
+GCC is normally configured to use the same function calling convention
+normally in use on the target system.  This is done with the
+machine-description macros described (*note Target Macros::).
+
+ However, returning of structure and union values is done differently on
+some target machines.  As a result, functions compiled with PCC
+returning such types cannot be called from code compiled with GCC, and
+vice versa.  This does not cause trouble often because few Unix library
+routines return structures or unions.
+
+ GCC code returns structures and unions that are 1, 2, 4 or 8 bytes
+long in the same registers used for `int' or `double' return values.
+(GCC typically allocates variables of such types in registers also.)
+Structures and unions of other sizes are returned by storing them into
+an address passed by the caller (usually in a register).  The target
+hook `TARGET_STRUCT_VALUE_RTX' tells GCC where to pass this address.
+
+ By contrast, PCC on most target machines returns structures and unions
+of any size by copying the data into an area of static storage, and then
+returning the address of that storage as if it were a pointer value.
+The caller must copy the data from that memory area to the place where
+the value is wanted.  This is slower than the method used by GCC, and
+fails to be reentrant.
+
+ On some target machines, such as RISC machines and the 80386, the
+standard system convention is to pass to the subroutine the address of
+where to return the value.  On these machines, GCC has been configured
+to be compatible with the standard compiler, when this method is used.
+It may not be compatible for structures of 1, 2, 4 or 8 bytes.
+
+ GCC uses the system's standard convention for passing arguments.  On
+some machines, the first few arguments are passed in registers; in
+others, all are passed on the stack.  It would be possible to use
+registers for argument passing on any machine, and this would probably
+result in a significant speedup.  But the result would be complete
+incompatibility with code that follows the standard convention.  So this
+change is practical only if you are switching to GCC as the sole C
+compiler for the system.  We may implement register argument passing on
+certain machines once we have a complete GNU system so that we can
+compile the libraries with GCC.
+
+ On some machines (particularly the SPARC), certain types of arguments
+are passed "by invisible reference".  This means that the value is
+stored in memory, and the address of the memory location is passed to
+the subroutine.
+
+ If you use `longjmp', beware of automatic variables.  ISO C says that
+automatic variables that are not declared `volatile' have undefined
+values after a `longjmp'.  And this is all GCC promises to do, because
+it is very difficult to restore register variables correctly, and one
+of GCC's features is that it can put variables in registers without
+your asking it to.
+
+
+File: gccint.info,  Node: Libgcc,  Next: Languages,  Prev: Interface,  Up: Top
+
+4 The GCC low-level runtime library
+***********************************
+
+GCC provides a low-level runtime library, `libgcc.a' or `libgcc_s.so.1'
+on some platforms.  GCC generates calls to routines in this library
+automatically, whenever it needs to perform some operation that is too
+complicated to emit inline code for.
+
+ Most of the routines in `libgcc' handle arithmetic operations that the
+target processor cannot perform directly.  This includes integer
+multiply and divide on some machines, and all floating-point and
+fixed-point operations on other machines.  `libgcc' also includes
+routines for exception handling, and a handful of miscellaneous
+operations.
+
+ Some of these routines can be defined in mostly machine-independent C.
+Others must be hand-written in assembly language for each processor
+that needs them.
+
+ GCC will also generate calls to C library routines, such as `memcpy'
+and `memset', in some cases.  The set of routines that GCC may possibly
+use is documented in *note Other Builtins: (gcc)Other Builtins.
+
+ These routines take arguments and return values of a specific machine
+mode, not a specific C type.  *Note Machine Modes::, for an explanation
+of this concept.  For illustrative purposes, in this chapter the
+floating point type `float' is assumed to correspond to `SFmode';
+`double' to `DFmode'; and `long double' to both `TFmode' and `XFmode'.
+Similarly, the integer types `int' and `unsigned int' correspond to
+`SImode'; `long' and `unsigned long' to `DImode'; and `long long' and
+`unsigned long long' to `TImode'.
+
+* Menu:
+
+* Integer library routines::
+* Soft float library routines::
+* Decimal float library routines::
+* Fixed-point fractional library routines::
+* Exception handling routines::
+* Miscellaneous routines::
+
+
+File: gccint.info,  Node: Integer library routines,  Next: Soft float library routines,  Up: Libgcc
+
+4.1 Routines for integer arithmetic
+===================================
+
+The integer arithmetic routines are used on platforms that don't provide
+hardware support for arithmetic operations on some modes.
+
+4.1.1 Arithmetic functions
+--------------------------
+
+ -- Runtime Function: int __ashlsi3 (int A, int B)
+ -- Runtime Function: long __ashldi3 (long A, int B)
+ -- Runtime Function: long long __ashlti3 (long long A, int B)
+     These functions return the result of shifting A left by B bits.
+
+ -- Runtime Function: int __ashrsi3 (int A, int B)
+ -- Runtime Function: long __ashrdi3 (long A, int B)
+ -- Runtime Function: long long __ashrti3 (long long A, int B)
+     These functions return the result of arithmetically shifting A
+     right by B bits.
+
+ -- Runtime Function: int __divsi3 (int A, int B)
+ -- Runtime Function: long __divdi3 (long A, long B)
+ -- Runtime Function: long long __divti3 (long long A, long long B)
+     These functions return the quotient of the signed division of A and
+     B.
+
+ -- Runtime Function: int __lshrsi3 (int A, int B)
+ -- Runtime Function: long __lshrdi3 (long A, int B)
+ -- Runtime Function: long long __lshrti3 (long long A, int B)
+     These functions return the result of logically shifting A right by
+     B bits.
+
+ -- Runtime Function: int __modsi3 (int A, int B)
+ -- Runtime Function: long __moddi3 (long A, long B)
+ -- Runtime Function: long long __modti3 (long long A, long long B)
+     These functions return the remainder of the signed division of A
+     and B.
+
+ -- Runtime Function: int __mulsi3 (int A, int B)
+ -- Runtime Function: long __muldi3 (long A, long B)
+ -- Runtime Function: long long __multi3 (long long A, long long B)
+     These functions return the product of A and B.
+
+ -- Runtime Function: long __negdi2 (long A)
+ -- Runtime Function: long long __negti2 (long long A)
+     These functions return the negation of A.
+
+ -- Runtime Function: unsigned int __udivsi3 (unsigned int A, unsigned
+          int B)
+ -- Runtime Function: unsigned long __udivdi3 (unsigned long A,
+          unsigned long B)
+ -- Runtime Function: unsigned long long __udivti3 (unsigned long long
+          A, unsigned long long B)
+     These functions return the quotient of the unsigned division of A
+     and B.
+
+ -- Runtime Function: unsigned long __udivmoddi3 (unsigned long A,
+          unsigned long B, unsigned long *C)
+ -- Runtime Function: unsigned long long __udivti3 (unsigned long long
+          A, unsigned long long B, unsigned long long *C)
+     These functions calculate both the quotient and remainder of the
+     unsigned division of A and B.  The return value is the quotient,
+     and the remainder is placed in variable pointed to by C.
+
+ -- Runtime Function: unsigned int __umodsi3 (unsigned int A, unsigned
+          int B)
+ -- Runtime Function: unsigned long __umoddi3 (unsigned long A,
+          unsigned long B)
+ -- Runtime Function: unsigned long long __umodti3 (unsigned long long
+          A, unsigned long long B)
+     These functions return the remainder of the unsigned division of A
+     and B.
+
+4.1.2 Comparison functions
+--------------------------
+
+The following functions implement integral comparisons.  These functions
+implement a low-level compare, upon which the higher level comparison
+operators (such as less than and greater than or equal to) can be
+constructed.  The returned values lie in the range zero to two, to allow
+the high-level operators to be implemented by testing the returned
+result using either signed or unsigned comparison.
+
+ -- Runtime Function: int __cmpdi2 (long A, long B)
+ -- Runtime Function: int __cmpti2 (long long A, long long B)
+     These functions perform a signed comparison of A and B.  If A is
+     less than B, they return 0; if A is greater than B, they return 2;
+     and if A and B are equal they return 1.
+
+ -- Runtime Function: int __ucmpdi2 (unsigned long A, unsigned long B)
+ -- Runtime Function: int __ucmpti2 (unsigned long long A, unsigned
+          long long B)
+     These functions perform an unsigned comparison of A and B.  If A
+     is less than B, they return 0; if A is greater than B, they return
+     2; and if A and B are equal they return 1.
+
+4.1.3 Trapping arithmetic functions
+-----------------------------------
+
+The following functions implement trapping arithmetic.  These functions
+call the libc function `abort' upon signed arithmetic overflow.
+
+ -- Runtime Function: int __absvsi2 (int A)
+ -- Runtime Function: long __absvdi2 (long A)
+     These functions return the absolute value of A.
+
+ -- Runtime Function: int __addvsi3 (int A, int B)
+ -- Runtime Function: long __addvdi3 (long A, long B)
+     These functions return the sum of A and B; that is `A + B'.
+
+ -- Runtime Function: int __mulvsi3 (int A, int B)
+ -- Runtime Function: long __mulvdi3 (long A, long B)
+     The functions return the product of A and B; that is `A * B'.
+
+ -- Runtime Function: int __negvsi2 (int A)
+ -- Runtime Function: long __negvdi2 (long A)
+     These functions return the negation of A; that is `-A'.
+
+ -- Runtime Function: int __subvsi3 (int A, int B)
+ -- Runtime Function: long __subvdi3 (long A, long B)
+     These functions return the difference between B and A; that is `A
+     - B'.
+
+4.1.4 Bit operations
+--------------------
+
+ -- Runtime Function: int __clzsi2 (int A)
+ -- Runtime Function: int __clzdi2 (long A)
+ -- Runtime Function: int __clzti2 (long long A)
+     These functions return the number of leading 0-bits in A, starting
+     at the most significant bit position.  If A is zero, the result is
+     undefined.
+
+ -- Runtime Function: int __ctzsi2 (int A)
+ -- Runtime Function: int __ctzdi2 (long A)
+ -- Runtime Function: int __ctzti2 (long long A)
+     These functions return the number of trailing 0-bits in A, starting
+     at the least significant bit position.  If A is zero, the result is
+     undefined.
+
+ -- Runtime Function: int __ffsdi2 (long A)
+ -- Runtime Function: int __ffsti2 (long long A)
+     These functions return the index of the least significant 1-bit in
+     A, or the value zero if A is zero.  The least significant bit is
+     index one.
+
+ -- Runtime Function: int __paritysi2 (int A)
+ -- Runtime Function: int __paritydi2 (long A)
+ -- Runtime Function: int __parityti2 (long long A)
+     These functions return the value zero if the number of bits set in
+     A is even, and the value one otherwise.
+
+ -- Runtime Function: int __popcountsi2 (int A)
+ -- Runtime Function: int __popcountdi2 (long A)
+ -- Runtime Function: int __popcountti2 (long long A)
+     These functions return the number of bits set in A.
+
+ -- Runtime Function: int32_t __bswapsi2 (int32_t A)
+ -- Runtime Function: int64_t __bswapdi2 (int64_t A)
+     These functions return the A byteswapped.
+
+
+File: gccint.info,  Node: Soft float library routines,  Next: Decimal float library routines,  Prev: Integer library routines,  Up: Libgcc
+
+4.2 Routines for floating point emulation
+=========================================
+
+The software floating point library is used on machines which do not
+have hardware support for floating point.  It is also used whenever
+`-msoft-float' is used to disable generation of floating point
+instructions.  (Not all targets support this switch.)
+
+ For compatibility with other compilers, the floating point emulation
+routines can be renamed with the `DECLARE_LIBRARY_RENAMES' macro (*note
+Library Calls::).  In this section, the default names are used.
+
+ Presently the library does not support `XFmode', which is used for
+`long double' on some architectures.
+
+4.2.1 Arithmetic functions
+--------------------------
+
+ -- Runtime Function: float __addsf3 (float A, float B)
+ -- Runtime Function: double __adddf3 (double A, double B)
+ -- Runtime Function: long double __addtf3 (long double A, long double
+          B)
+ -- Runtime Function: long double __addxf3 (long double A, long double
+          B)
+     These functions return the sum of A and B.
+
+ -- Runtime Function: float __subsf3 (float A, float B)
+ -- Runtime Function: double __subdf3 (double A, double B)
+ -- Runtime Function: long double __subtf3 (long double A, long double
+          B)
+ -- Runtime Function: long double __subxf3 (long double A, long double
+          B)
+     These functions return the difference between B and A; that is,
+     A - B.
+
+ -- Runtime Function: float __mulsf3 (float A, float B)
+ -- Runtime Function: double __muldf3 (double A, double B)
+ -- Runtime Function: long double __multf3 (long double A, long double
+          B)
+ -- Runtime Function: long double __mulxf3 (long double A, long double
+          B)
+     These functions return the product of A and B.
+
+ -- Runtime Function: float __divsf3 (float A, float B)
+ -- Runtime Function: double __divdf3 (double A, double B)
+ -- Runtime Function: long double __divtf3 (long double A, long double
+          B)
+ -- Runtime Function: long double __divxf3 (long double A, long double
+          B)
+     These functions return the quotient of A and B; that is, A / B.
+
+ -- Runtime Function: float __negsf2 (float A)
+ -- Runtime Function: double __negdf2 (double A)
+ -- Runtime Function: long double __negtf2 (long double A)
+ -- Runtime Function: long double __negxf2 (long double A)
+     These functions return the negation of A.  They simply flip the
+     sign bit, so they can produce negative zero and negative NaN.
+
+4.2.2 Conversion functions
+--------------------------
+
+ -- Runtime Function: double __extendsfdf2 (float A)
+ -- Runtime Function: long double __extendsftf2 (float A)
+ -- Runtime Function: long double __extendsfxf2 (float A)
+ -- Runtime Function: long double __extenddftf2 (double A)
+ -- Runtime Function: long double __extenddfxf2 (double A)
+     These functions extend A to the wider mode of their return type.
+
+ -- Runtime Function: double __truncxfdf2 (long double A)
+ -- Runtime Function: double __trunctfdf2 (long double A)
+ -- Runtime Function: float __truncxfsf2 (long double A)
+ -- Runtime Function: float __trunctfsf2 (long double A)
+ -- Runtime Function: float __truncdfsf2 (double A)
+     These functions truncate A to the narrower mode of their return
+     type, rounding toward zero.
+
+ -- Runtime Function: int __fixsfsi (float A)
+ -- Runtime Function: int __fixdfsi (double A)
+ -- Runtime Function: int __fixtfsi (long double A)
+ -- Runtime Function: int __fixxfsi (long double A)
+     These functions convert A to a signed integer, rounding toward
+     zero.
+
+ -- Runtime Function: long __fixsfdi (float A)
+ -- Runtime Function: long __fixdfdi (double A)
+ -- Runtime Function: long __fixtfdi (long double A)
+ -- Runtime Function: long __fixxfdi (long double A)
+     These functions convert A to a signed long, rounding toward zero.
+
+ -- Runtime Function: long long __fixsfti (float A)
+ -- Runtime Function: long long __fixdfti (double A)
+ -- Runtime Function: long long __fixtfti (long double A)
+ -- Runtime Function: long long __fixxfti (long double A)
+     These functions convert A to a signed long long, rounding toward
+     zero.
+
+ -- Runtime Function: unsigned int __fixunssfsi (float A)
+ -- Runtime Function: unsigned int __fixunsdfsi (double A)
+ -- Runtime Function: unsigned int __fixunstfsi (long double A)
+ -- Runtime Function: unsigned int __fixunsxfsi (long double A)
+     These functions convert A to an unsigned integer, rounding toward
+     zero.  Negative values all become zero.
+
+ -- Runtime Function: unsigned long __fixunssfdi (float A)
+ -- Runtime Function: unsigned long __fixunsdfdi (double A)
+ -- Runtime Function: unsigned long __fixunstfdi (long double A)
+ -- Runtime Function: unsigned long __fixunsxfdi (long double A)
+     These functions convert A to an unsigned long, rounding toward
+     zero.  Negative values all become zero.
+
+ -- Runtime Function: unsigned long long __fixunssfti (float A)
+ -- Runtime Function: unsigned long long __fixunsdfti (double A)
+ -- Runtime Function: unsigned long long __fixunstfti (long double A)
+ -- Runtime Function: unsigned long long __fixunsxfti (long double A)
+     These functions convert A to an unsigned long long, rounding
+     toward zero.  Negative values all become zero.
+
+ -- Runtime Function: float __floatsisf (int I)
+ -- Runtime Function: double __floatsidf (int I)
+ -- Runtime Function: long double __floatsitf (int I)
+ -- Runtime Function: long double __floatsixf (int I)
+     These functions convert I, a signed integer, to floating point.
+
+ -- Runtime Function: float __floatdisf (long I)
+ -- Runtime Function: double __floatdidf (long I)
+ -- Runtime Function: long double __floatditf (long I)
+ -- Runtime Function: long double __floatdixf (long I)
+     These functions convert I, a signed long, to floating point.
+
+ -- Runtime Function: float __floattisf (long long I)
+ -- Runtime Function: double __floattidf (long long I)
+ -- Runtime Function: long double __floattitf (long long I)
+ -- Runtime Function: long double __floattixf (long long I)
+     These functions convert I, a signed long long, to floating point.
+
+ -- Runtime Function: float __floatunsisf (unsigned int I)
+ -- Runtime Function: double __floatunsidf (unsigned int I)
+ -- Runtime Function: long double __floatunsitf (unsigned int I)
+ -- Runtime Function: long double __floatunsixf (unsigned int I)
+     These functions convert I, an unsigned integer, to floating point.
+
+ -- Runtime Function: float __floatundisf (unsigned long I)
+ -- Runtime Function: double __floatundidf (unsigned long I)
+ -- Runtime Function: long double __floatunditf (unsigned long I)
+ -- Runtime Function: long double __floatundixf (unsigned long I)
+     These functions convert I, an unsigned long, to floating point.
+
+ -- Runtime Function: float __floatuntisf (unsigned long long I)
+ -- Runtime Function: double __floatuntidf (unsigned long long I)
+ -- Runtime Function: long double __floatuntitf (unsigned long long I)
+ -- Runtime Function: long double __floatuntixf (unsigned long long I)
+     These functions convert I, an unsigned long long, to floating
+     point.
+
+4.2.3 Comparison functions
+--------------------------
+
+There are two sets of basic comparison functions.
+
+ -- Runtime Function: int __cmpsf2 (float A, float B)
+ -- Runtime Function: int __cmpdf2 (double A, double B)
+ -- Runtime Function: int __cmptf2 (long double A, long double B)
+     These functions calculate a <=> b.  That is, if A is less than B,
+     they return -1; if A is greater than B, they return 1; and if A
+     and B are equal they return 0.  If either argument is NaN they
+     return 1, but you should not rely on this; if NaN is a
+     possibility, use one of the higher-level comparison functions.
+
+ -- Runtime Function: int __unordsf2 (float A, float B)
+ -- Runtime Function: int __unorddf2 (double A, double B)
+ -- Runtime Function: int __unordtf2 (long double A, long double B)
+     These functions return a nonzero value if either argument is NaN,
+     otherwise 0.
+
+ There is also a complete group of higher level functions which
+correspond directly to comparison operators.  They implement the ISO C
+semantics for floating-point comparisons, taking NaN into account.  Pay
+careful attention to the return values defined for each set.  Under the
+hood, all of these routines are implemented as
+
+       if (__unordXf2 (a, b))
+         return E;
+       return __cmpXf2 (a, b);
+
+where E is a constant chosen to give the proper behavior for NaN.
+Thus, the meaning of the return value is different for each set.  Do
+not rely on this implementation; only the semantics documented below
+are guaranteed.
+
+ -- Runtime Function: int __eqsf2 (float A, float B)
+ -- Runtime Function: int __eqdf2 (double A, double B)
+ -- Runtime Function: int __eqtf2 (long double A, long double B)
+     These functions return zero if neither argument is NaN, and A and
+     B are equal.
+
+ -- Runtime Function: int __nesf2 (float A, float B)
+ -- Runtime Function: int __nedf2 (double A, double B)
+ -- Runtime Function: int __netf2 (long double A, long double B)
+     These functions return a nonzero value if either argument is NaN,
+     or if A and B are unequal.
+
+ -- Runtime Function: int __gesf2 (float A, float B)
+ -- Runtime Function: int __gedf2 (double A, double B)
+ -- Runtime Function: int __getf2 (long double A, long double B)
+     These functions return a value greater than or equal to zero if
+     neither argument is NaN, and A is greater than or equal to B.
+
+ -- Runtime Function: int __ltsf2 (float A, float B)
+ -- Runtime Function: int __ltdf2 (double A, double B)
+ -- Runtime Function: int __lttf2 (long double A, long double B)
+     These functions return a value less than zero if neither argument
+     is NaN, and A is strictly less than B.
+
+ -- Runtime Function: int __lesf2 (float A, float B)
+ -- Runtime Function: int __ledf2 (double A, double B)
+ -- Runtime Function: int __letf2 (long double A, long double B)
+     These functions return a value less than or equal to zero if
+     neither argument is NaN, and A is less than or equal to B.
+
+ -- Runtime Function: int __gtsf2 (float A, float B)
+ -- Runtime Function: int __gtdf2 (double A, double B)
+ -- Runtime Function: int __gttf2 (long double A, long double B)
+     These functions return a value greater than zero if neither
+     argument is NaN, and A is strictly greater than B.
+
+4.2.4 Other floating-point functions
+------------------------------------
+
+ -- Runtime Function: float __powisf2 (float A, int B)
+ -- Runtime Function: double __powidf2 (double A, int B)
+ -- Runtime Function: long double __powitf2 (long double A, int B)
+ -- Runtime Function: long double __powixf2 (long double A, int B)
+     These functions convert raise A to the power B.
+
+ -- Runtime Function: complex float __mulsc3 (float A, float B, float
+          C, float D)
+ -- Runtime Function: complex double __muldc3 (double A, double B,
+          double C, double D)
+ -- Runtime Function: complex long double __multc3 (long double A, long
+          double B, long double C, long double D)
+ -- Runtime Function: complex long double __mulxc3 (long double A, long
+          double B, long double C, long double D)
+     These functions return the product of A + iB and C + iD, following
+     the rules of C99 Annex G.
+
+ -- Runtime Function: complex float __divsc3 (float A, float B, float
+          C, float D)
+ -- Runtime Function: complex double __divdc3 (double A, double B,
+          double C, double D)
+ -- Runtime Function: complex long double __divtc3 (long double A, long
+          double B, long double C, long double D)
+ -- Runtime Function: complex long double __divxc3 (long double A, long
+          double B, long double C, long double D)
+     These functions return the quotient of A + iB and C + iD (i.e., (A
+     + iB) / (C + iD)), following the rules of C99 Annex G.
+
+
+File: gccint.info,  Node: Decimal float library routines,  Next: Fixed-point fractional library routines,  Prev: Soft float library routines,  Up: Libgcc
+
+4.3 Routines for decimal floating point emulation
+=================================================
+
+The software decimal floating point library implements IEEE 754-2008
+decimal floating point arithmetic and is only activated on selected
+targets.
+
+ The software decimal floating point library supports either DPD
+(Densely Packed Decimal) or BID (Binary Integer Decimal) encoding as
+selected at configure time.
+
+4.3.1 Arithmetic functions
+--------------------------
+
+ -- Runtime Function: _Decimal32 __dpd_addsd3 (_Decimal32 A, _Decimal32
+          B)
+ -- Runtime Function: _Decimal32 __bid_addsd3 (_Decimal32 A, _Decimal32
+          B)
+ -- Runtime Function: _Decimal64 __dpd_adddd3 (_Decimal64 A, _Decimal64
+          B)
+ -- Runtime Function: _Decimal64 __bid_adddd3 (_Decimal64 A, _Decimal64
+          B)
+ -- Runtime Function: _Decimal128 __dpd_addtd3 (_Decimal128 A,
+          _Decimal128 B)
+ -- Runtime Function: _Decimal128 __bid_addtd3 (_Decimal128 A,
+          _Decimal128 B)
+     These functions return the sum of A and B.
+
+ -- Runtime Function: _Decimal32 __dpd_subsd3 (_Decimal32 A, _Decimal32
+          B)
+ -- Runtime Function: _Decimal32 __bid_subsd3 (_Decimal32 A, _Decimal32
+          B)
+ -- Runtime Function: _Decimal64 __dpd_subdd3 (_Decimal64 A, _Decimal64
+          B)
+ -- Runtime Function: _Decimal64 __bid_subdd3 (_Decimal64 A, _Decimal64
+          B)
+ -- Runtime Function: _Decimal128 __dpd_subtd3 (_Decimal128 A,
+          _Decimal128 B)
+ -- Runtime Function: _Decimal128 __bid_subtd3 (_Decimal128 A,
+          _Decimal128 B)
+     These functions return the difference between B and A; that is,
+     A - B.
+
+ -- Runtime Function: _Decimal32 __dpd_mulsd3 (_Decimal32 A, _Decimal32
+          B)
+ -- Runtime Function: _Decimal32 __bid_mulsd3 (_Decimal32 A, _Decimal32
+          B)
+ -- Runtime Function: _Decimal64 __dpd_muldd3 (_Decimal64 A, _Decimal64
+          B)
+ -- Runtime Function: _Decimal64 __bid_muldd3 (_Decimal64 A, _Decimal64
+          B)
+ -- Runtime Function: _Decimal128 __dpd_multd3 (_Decimal128 A,
+          _Decimal128 B)
+ -- Runtime Function: _Decimal128 __bid_multd3 (_Decimal128 A,
+          _Decimal128 B)
+     These functions return the product of A and B.
+
+ -- Runtime Function: _Decimal32 __dpd_divsd3 (_Decimal32 A, _Decimal32
+          B)
+ -- Runtime Function: _Decimal32 __bid_divsd3 (_Decimal32 A, _Decimal32
+          B)
+ -- Runtime Function: _Decimal64 __dpd_divdd3 (_Decimal64 A, _Decimal64
+          B)
+ -- Runtime Function: _Decimal64 __bid_divdd3 (_Decimal64 A, _Decimal64
+          B)
+ -- Runtime Function: _Decimal128 __dpd_divtd3 (_Decimal128 A,
+          _Decimal128 B)
+ -- Runtime Function: _Decimal128 __bid_divtd3 (_Decimal128 A,
+          _Decimal128 B)
+     These functions return the quotient of A and B; that is, A / B.
+
+ -- Runtime Function: _Decimal32 __dpd_negsd2 (_Decimal32 A)
+ -- Runtime Function: _Decimal32 __bid_negsd2 (_Decimal32 A)
+ -- Runtime Function: _Decimal64 __dpd_negdd2 (_Decimal64 A)
+ -- Runtime Function: _Decimal64 __bid_negdd2 (_Decimal64 A)
+ -- Runtime Function: _Decimal128 __dpd_negtd2 (_Decimal128 A)
+ -- Runtime Function: _Decimal128 __bid_negtd2 (_Decimal128 A)
+     These functions return the negation of A.  They simply flip the
+     sign bit, so they can produce negative zero and negative NaN.
+
+4.3.2 Conversion functions
+--------------------------
+
+ -- Runtime Function: _Decimal64 __dpd_extendsddd2 (_Decimal32 A)
+ -- Runtime Function: _Decimal64 __bid_extendsddd2 (_Decimal32 A)
+ -- Runtime Function: _Decimal128 __dpd_extendsdtd2 (_Decimal32 A)
+ -- Runtime Function: _Decimal128 __bid_extendsdtd2 (_Decimal32 A)
+ -- Runtime Function: _Decimal128 __dpd_extendddtd2 (_Decimal64 A)
+ -- Runtime Function: _Decimal128 __bid_extendddtd2 (_Decimal64 A)
+ -- Runtime Function: _Decimal32 __dpd_truncddsd2 (_Decimal64 A)
+ -- Runtime Function: _Decimal32 __bid_truncddsd2 (_Decimal64 A)
+ -- Runtime Function: _Decimal32 __dpd_trunctdsd2 (_Decimal128 A)
+ -- Runtime Function: _Decimal32 __bid_trunctdsd2 (_Decimal128 A)
+ -- Runtime Function: _Decimal64 __dpd_trunctddd2 (_Decimal128 A)
+ -- Runtime Function: _Decimal64 __bid_trunctddd2 (_Decimal128 A)
+     These functions convert the value A from one decimal floating type
+     to another.
+
+ -- Runtime Function: _Decimal64 __dpd_extendsfdd (float A)
+ -- Runtime Function: _Decimal64 __bid_extendsfdd (float A)
+ -- Runtime Function: _Decimal128 __dpd_extendsftd (float A)
+ -- Runtime Function: _Decimal128 __bid_extendsftd (float A)
+ -- Runtime Function: _Decimal128 __dpd_extenddftd (double A)
+ -- Runtime Function: _Decimal128 __bid_extenddftd (double A)
+ -- Runtime Function: _Decimal128 __dpd_extendxftd (long double A)
+ -- Runtime Function: _Decimal128 __bid_extendxftd (long double A)
+ -- Runtime Function: _Decimal32 __dpd_truncdfsd (double A)
+ -- Runtime Function: _Decimal32 __bid_truncdfsd (double A)
+ -- Runtime Function: _Decimal32 __dpd_truncxfsd (long double A)
+ -- Runtime Function: _Decimal32 __bid_truncxfsd (long double A)
+ -- Runtime Function: _Decimal32 __dpd_trunctfsd (long double A)
+ -- Runtime Function: _Decimal32 __bid_trunctfsd (long double A)
+ -- Runtime Function: _Decimal64 __dpd_truncxfdd (long double A)
+ -- Runtime Function: _Decimal64 __bid_truncxfdd (long double A)
+ -- Runtime Function: _Decimal64 __dpd_trunctfdd (long double A)
+ -- Runtime Function: _Decimal64 __bid_trunctfdd (long double A)
+     These functions convert the value of A from a binary floating type
+     to a decimal floating type of a different size.
+
+ -- Runtime Function: float __dpd_truncddsf (_Decimal64 A)
+ -- Runtime Function: float __bid_truncddsf (_Decimal64 A)
+ -- Runtime Function: float __dpd_trunctdsf (_Decimal128 A)
+ -- Runtime Function: float __bid_trunctdsf (_Decimal128 A)
+ -- Runtime Function: double __dpd_extendsddf (_Decimal32 A)
+ -- Runtime Function: double __bid_extendsddf (_Decimal32 A)
+ -- Runtime Function: double __dpd_trunctddf (_Decimal128 A)
+ -- Runtime Function: double __bid_trunctddf (_Decimal128 A)
+ -- Runtime Function: long double __dpd_extendsdxf (_Decimal32 A)
+ -- Runtime Function: long double __bid_extendsdxf (_Decimal32 A)
+ -- Runtime Function: long double __dpd_extendddxf (_Decimal64 A)
+ -- Runtime Function: long double __bid_extendddxf (_Decimal64 A)
+ -- Runtime Function: long double __dpd_trunctdxf (_Decimal128 A)
+ -- Runtime Function: long double __bid_trunctdxf (_Decimal128 A)
+ -- Runtime Function: long double __dpd_extendsdtf (_Decimal32 A)
+ -- Runtime Function: long double __bid_extendsdtf (_Decimal32 A)
+ -- Runtime Function: long double __dpd_extendddtf (_Decimal64 A)
+ -- Runtime Function: long double __bid_extendddtf (_Decimal64 A)
+     These functions convert the value of A from a decimal floating type
+     to a binary floating type of a different size.
+
+ -- Runtime Function: _Decimal32 __dpd_extendsfsd (float A)
+ -- Runtime Function: _Decimal32 __bid_extendsfsd (float A)
+ -- Runtime Function: _Decimal64 __dpd_extenddfdd (double A)
+ -- Runtime Function: _Decimal64 __bid_extenddfdd (double A)
+ -- Runtime Function: _Decimal128 __dpd_extendtftd (long double A)
+ -- Runtime Function: _Decimal128 __bid_extendtftd (long double A)
+ -- Runtime Function: float __dpd_truncsdsf (_Decimal32 A)
+ -- Runtime Function: float __bid_truncsdsf (_Decimal32 A)
+ -- Runtime Function: double __dpd_truncdddf (_Decimal64 A)
+ -- Runtime Function: double __bid_truncdddf (_Decimal64 A)
+ -- Runtime Function: long double __dpd_trunctdtf (_Decimal128 A)
+ -- Runtime Function: long double __bid_trunctdtf (_Decimal128 A)
+     These functions convert the value of A between decimal and binary
+     floating types of the same size.
+
+ -- Runtime Function: int __dpd_fixsdsi (_Decimal32 A)
+ -- Runtime Function: int __bid_fixsdsi (_Decimal32 A)
+ -- Runtime Function: int __dpd_fixddsi (_Decimal64 A)
+ -- Runtime Function: int __bid_fixddsi (_Decimal64 A)
+ -- Runtime Function: int __dpd_fixtdsi (_Decimal128 A)
+ -- Runtime Function: int __bid_fixtdsi (_Decimal128 A)
+     These functions convert A to a signed integer.
+
+ -- Runtime Function: long __dpd_fixsddi (_Decimal32 A)
+ -- Runtime Function: long __bid_fixsddi (_Decimal32 A)
+ -- Runtime Function: long __dpd_fixdddi (_Decimal64 A)
+ -- Runtime Function: long __bid_fixdddi (_Decimal64 A)
+ -- Runtime Function: long __dpd_fixtddi (_Decimal128 A)
+ -- Runtime Function: long __bid_fixtddi (_Decimal128 A)
+     These functions convert A to a signed long.
+
+ -- Runtime Function: unsigned int __dpd_fixunssdsi (_Decimal32 A)
+ -- Runtime Function: unsigned int __bid_fixunssdsi (_Decimal32 A)
+ -- Runtime Function: unsigned int __dpd_fixunsddsi (_Decimal64 A)
+ -- Runtime Function: unsigned int __bid_fixunsddsi (_Decimal64 A)
+ -- Runtime Function: unsigned int __dpd_fixunstdsi (_Decimal128 A)
+ -- Runtime Function: unsigned int __bid_fixunstdsi (_Decimal128 A)
+     These functions convert A to an unsigned integer.  Negative values
+     all become zero.
+
+ -- Runtime Function: unsigned long __dpd_fixunssddi (_Decimal32 A)
+ -- Runtime Function: unsigned long __bid_fixunssddi (_Decimal32 A)
+ -- Runtime Function: unsigned long __dpd_fixunsdddi (_Decimal64 A)
+ -- Runtime Function: unsigned long __bid_fixunsdddi (_Decimal64 A)
+ -- Runtime Function: unsigned long __dpd_fixunstddi (_Decimal128 A)
+ -- Runtime Function: unsigned long __bid_fixunstddi (_Decimal128 A)
+     These functions convert A to an unsigned long.  Negative values
+     all become zero.
+
+ -- Runtime Function: _Decimal32 __dpd_floatsisd (int I)
+ -- Runtime Function: _Decimal32 __bid_floatsisd (int I)
+ -- Runtime Function: _Decimal64 __dpd_floatsidd (int I)
+ -- Runtime Function: _Decimal64 __bid_floatsidd (int I)
+ -- Runtime Function: _Decimal128 __dpd_floatsitd (int I)
+ -- Runtime Function: _Decimal128 __bid_floatsitd (int I)
+     These functions convert I, a signed integer, to decimal floating
+     point.
+
+ -- Runtime Function: _Decimal32 __dpd_floatdisd (long I)
+ -- Runtime Function: _Decimal32 __bid_floatdisd (long I)
+ -- Runtime Function: _Decimal64 __dpd_floatdidd (long I)
+ -- Runtime Function: _Decimal64 __bid_floatdidd (long I)
+ -- Runtime Function: _Decimal128 __dpd_floatditd (long I)
+ -- Runtime Function: _Decimal128 __bid_floatditd (long I)
+     These functions convert I, a signed long, to decimal floating
+     point.
+
+ -- Runtime Function: _Decimal32 __dpd_floatunssisd (unsigned int I)
+ -- Runtime Function: _Decimal32 __bid_floatunssisd (unsigned int I)
+ -- Runtime Function: _Decimal64 __dpd_floatunssidd (unsigned int I)
+ -- Runtime Function: _Decimal64 __bid_floatunssidd (unsigned int I)
+ -- Runtime Function: _Decimal128 __dpd_floatunssitd (unsigned int I)
+ -- Runtime Function: _Decimal128 __bid_floatunssitd (unsigned int I)
+     These functions convert I, an unsigned integer, to decimal
+     floating point.
+
+ -- Runtime Function: _Decimal32 __dpd_floatunsdisd (unsigned long I)
+ -- Runtime Function: _Decimal32 __bid_floatunsdisd (unsigned long I)
+ -- Runtime Function: _Decimal64 __dpd_floatunsdidd (unsigned long I)
+ -- Runtime Function: _Decimal64 __bid_floatunsdidd (unsigned long I)
+ -- Runtime Function: _Decimal128 __dpd_floatunsditd (unsigned long I)
+ -- Runtime Function: _Decimal128 __bid_floatunsditd (unsigned long I)
+     These functions convert I, an unsigned long, to decimal floating
+     point.
+
+4.3.3 Comparison functions
+--------------------------
+
+ -- Runtime Function: int __dpd_unordsd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __bid_unordsd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __dpd_unorddd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __bid_unorddd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __dpd_unordtd2 (_Decimal128 A, _Decimal128 B)
+ -- Runtime Function: int __bid_unordtd2 (_Decimal128 A, _Decimal128 B)
+     These functions return a nonzero value if either argument is NaN,
+     otherwise 0.
+
+ There is also a complete group of higher level functions which
+correspond directly to comparison operators.  They implement the ISO C
+semantics for floating-point comparisons, taking NaN into account.  Pay
+careful attention to the return values defined for each set.  Under the
+hood, all of these routines are implemented as
+
+       if (__bid_unordXd2 (a, b))
+         return E;
+       return __bid_cmpXd2 (a, b);
+
+where E is a constant chosen to give the proper behavior for NaN.
+Thus, the meaning of the return value is different for each set.  Do
+not rely on this implementation; only the semantics documented below
+are guaranteed.
+
+ -- Runtime Function: int __dpd_eqsd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __bid_eqsd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __dpd_eqdd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __bid_eqdd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __dpd_eqtd2 (_Decimal128 A, _Decimal128 B)
+ -- Runtime Function: int __bid_eqtd2 (_Decimal128 A, _Decimal128 B)
+     These functions return zero if neither argument is NaN, and A and
+     B are equal.
+
+ -- Runtime Function: int __dpd_nesd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __bid_nesd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __dpd_nedd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __bid_nedd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __dpd_netd2 (_Decimal128 A, _Decimal128 B)
+ -- Runtime Function: int __bid_netd2 (_Decimal128 A, _Decimal128 B)
+     These functions return a nonzero value if either argument is NaN,
+     or if A and B are unequal.
+
+ -- Runtime Function: int __dpd_gesd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __bid_gesd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __dpd_gedd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __bid_gedd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __dpd_getd2 (_Decimal128 A, _Decimal128 B)
+ -- Runtime Function: int __bid_getd2 (_Decimal128 A, _Decimal128 B)
+     These functions return a value greater than or equal to zero if
+     neither argument is NaN, and A is greater than or equal to B.
+
+ -- Runtime Function: int __dpd_ltsd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __bid_ltsd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __dpd_ltdd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __bid_ltdd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __dpd_lttd2 (_Decimal128 A, _Decimal128 B)
+ -- Runtime Function: int __bid_lttd2 (_Decimal128 A, _Decimal128 B)
+     These functions return a value less than zero if neither argument
+     is NaN, and A is strictly less than B.
+
+ -- Runtime Function: int __dpd_lesd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __bid_lesd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __dpd_ledd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __bid_ledd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __dpd_letd2 (_Decimal128 A, _Decimal128 B)
+ -- Runtime Function: int __bid_letd2 (_Decimal128 A, _Decimal128 B)
+     These functions return a value less than or equal to zero if
+     neither argument is NaN, and A is less than or equal to B.
+
+ -- Runtime Function: int __dpd_gtsd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __bid_gtsd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __dpd_gtdd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __bid_gtdd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __dpd_gttd2 (_Decimal128 A, _Decimal128 B)
+ -- Runtime Function: int __bid_gttd2 (_Decimal128 A, _Decimal128 B)
+     These functions return a value greater than zero if neither
+     argument is NaN, and A is strictly greater than B.
+
+
+File: gccint.info,  Node: Fixed-point fractional library routines,  Next: Exception handling routines,  Prev: Decimal float library routines,  Up: Libgcc
+
+4.4 Routines for fixed-point fractional emulation
+=================================================
+
+The software fixed-point library implements fixed-point fractional
+arithmetic, and is only activated on selected targets.
+
+ For ease of comprehension `fract' is an alias for the `_Fract' type,
+`accum' an alias for `_Accum', and `sat' an alias for `_Sat'.
+
+ For illustrative purposes, in this section the fixed-point fractional
+type `short fract' is assumed to correspond to machine mode `QQmode';
+`unsigned short fract' to `UQQmode'; `fract' to `HQmode';
+`unsigned fract' to `UHQmode'; `long fract' to `SQmode';
+`unsigned long fract' to `USQmode'; `long long fract' to `DQmode'; and
+`unsigned long long fract' to `UDQmode'.  Similarly the fixed-point
+accumulator type `short accum' corresponds to `HAmode';
+`unsigned short accum' to `UHAmode'; `accum' to `SAmode';
+`unsigned accum' to `USAmode'; `long accum' to `DAmode';
+`unsigned long accum' to `UDAmode'; `long long accum' to `TAmode'; and
+`unsigned long long accum' to `UTAmode'.
+
+4.4.1 Arithmetic functions
+--------------------------
+
+ -- Runtime Function: short fract __addqq3 (short fract A, short fract
+          B)
+ -- Runtime Function: fract __addhq3 (fract A, fract B)
+ -- Runtime Function: long fract __addsq3 (long fract A, long fract B)
+ -- Runtime Function: long long fract __adddq3 (long long fract A, long
+          long fract B)
+ -- Runtime Function: unsigned short fract __adduqq3 (unsigned short
+          fract A, unsigned short fract B)
+ -- Runtime Function: unsigned fract __adduhq3 (unsigned fract A,
+          unsigned fract B)
+ -- Runtime Function: unsigned long fract __addusq3 (unsigned long
+          fract A, unsigned long fract B)
+ -- Runtime Function: unsigned long long fract __addudq3 (unsigned long
+          long fract A, unsigned long long fract B)
+ -- Runtime Function: short accum __addha3 (short accum A, short accum
+          B)
+ -- Runtime Function: accum __addsa3 (accum A, accum B)
+ -- Runtime Function: long accum __addda3 (long accum A, long accum B)
+ -- Runtime Function: long long accum __addta3 (long long accum A, long
+          long accum B)
+ -- Runtime Function: unsigned short accum __adduha3 (unsigned short
+          accum A, unsigned short accum B)
+ -- Runtime Function: unsigned accum __addusa3 (unsigned accum A,
+          unsigned accum B)
+ -- Runtime Function: unsigned long accum __adduda3 (unsigned long
+          accum A, unsigned long accum B)
+ -- Runtime Function: unsigned long long accum __adduta3 (unsigned long
+          long accum A, unsigned long long accum B)
+     These functions return the sum of A and B.
+
+ -- Runtime Function: short fract __ssaddqq3 (short fract A, short
+          fract B)
+ -- Runtime Function: fract __ssaddhq3 (fract A, fract B)
+ -- Runtime Function: long fract __ssaddsq3 (long fract A, long fract B)
+ -- Runtime Function: long long fract __ssadddq3 (long long fract A,
+          long long fract B)
+ -- Runtime Function: short accum __ssaddha3 (short accum A, short
+          accum B)
+ -- Runtime Function: accum __ssaddsa3 (accum A, accum B)
+ -- Runtime Function: long accum __ssaddda3 (long accum A, long accum B)
+ -- Runtime Function: long long accum __ssaddta3 (long long accum A,
+          long long accum B)
+     These functions return the sum of A and B with signed saturation.
+
+ -- Runtime Function: unsigned short fract __usadduqq3 (unsigned short
+          fract A, unsigned short fract B)
+ -- Runtime Function: unsigned fract __usadduhq3 (unsigned fract A,
+          unsigned fract B)
+ -- Runtime Function: unsigned long fract __usaddusq3 (unsigned long
+          fract A, unsigned long fract B)
+ -- Runtime Function: unsigned long long fract __usaddudq3 (unsigned
+          long long fract A, unsigned long long fract B)
+ -- Runtime Function: unsigned short accum __usadduha3 (unsigned short
+          accum A, unsigned short accum B)
+ -- Runtime Function: unsigned accum __usaddusa3 (unsigned accum A,
+          unsigned accum B)
+ -- Runtime Function: unsigned long accum __usadduda3 (unsigned long
+          accum A, unsigned long accum B)
+ -- Runtime Function: unsigned long long accum __usadduta3 (unsigned
+          long long accum A, unsigned long long accum B)
+     These functions return the sum of A and B with unsigned saturation.
+
+ -- Runtime Function: short fract __subqq3 (short fract A, short fract
+          B)
+ -- Runtime Function: fract __subhq3 (fract A, fract B)
+ -- Runtime Function: long fract __subsq3 (long fract A, long fract B)
+ -- Runtime Function: long long fract __subdq3 (long long fract A, long
+          long fract B)
+ -- Runtime Function: unsigned short fract __subuqq3 (unsigned short
+          fract A, unsigned short fract B)
+ -- Runtime Function: unsigned fract __subuhq3 (unsigned fract A,
+          unsigned fract B)
+ -- Runtime Function: unsigned long fract __subusq3 (unsigned long
+          fract A, unsigned long fract B)
+ -- Runtime Function: unsigned long long fract __subudq3 (unsigned long
+          long fract A, unsigned long long fract B)
+ -- Runtime Function: short accum __subha3 (short accum A, short accum
+          B)
+ -- Runtime Function: accum __subsa3 (accum A, accum B)
+ -- Runtime Function: long accum __subda3 (long accum A, long accum B)
+ -- Runtime Function: long long accum __subta3 (long long accum A, long
+          long accum B)
+ -- Runtime Function: unsigned short accum __subuha3 (unsigned short
+          accum A, unsigned short accum B)
+ -- Runtime Function: unsigned accum __subusa3 (unsigned accum A,
+          unsigned accum B)
+ -- Runtime Function: unsigned long accum __subuda3 (unsigned long
+          accum A, unsigned long accum B)
+ -- Runtime Function: unsigned long long accum __subuta3 (unsigned long
+          long accum A, unsigned long long accum B)
+     These functions return the difference of A and B; that is, `A - B'.
+
+ -- Runtime Function: short fract __sssubqq3 (short fract A, short
+          fract B)
+ -- Runtime Function: fract __sssubhq3 (fract A, fract B)
+ -- Runtime Function: long fract __sssubsq3 (long fract A, long fract B)
+ -- Runtime Function: long long fract __sssubdq3 (long long fract A,
+          long long fract B)
+ -- Runtime Function: short accum __sssubha3 (short accum A, short
+          accum B)
+ -- Runtime Function: accum __sssubsa3 (accum A, accum B)
+ -- Runtime Function: long accum __sssubda3 (long accum A, long accum B)
+ -- Runtime Function: long long accum __sssubta3 (long long accum A,
+          long long accum B)
+     These functions return the difference of A and B with signed
+     saturation;  that is, `A - B'.
+
+ -- Runtime Function: unsigned short fract __ussubuqq3 (unsigned short
+          fract A, unsigned short fract B)
+ -- Runtime Function: unsigned fract __ussubuhq3 (unsigned fract A,
+          unsigned fract B)
+ -- Runtime Function: unsigned long fract __ussubusq3 (unsigned long
+          fract A, unsigned long fract B)
+ -- Runtime Function: unsigned long long fract __ussubudq3 (unsigned
+          long long fract A, unsigned long long fract B)
+ -- Runtime Function: unsigned short accum __ussubuha3 (unsigned short
+          accum A, unsigned short accum B)
+ -- Runtime Function: unsigned accum __ussubusa3 (unsigned accum A,
+          unsigned accum B)
+ -- Runtime Function: unsigned long accum __ussubuda3 (unsigned long
+          accum A, unsigned long accum B)
+ -- Runtime Function: unsigned long long accum __ussubuta3 (unsigned
+          long long accum A, unsigned long long accum B)
+     These functions return the difference of A and B with unsigned
+     saturation;  that is, `A - B'.
+
+ -- Runtime Function: short fract __mulqq3 (short fract A, short fract
+          B)
+ -- Runtime Function: fract __mulhq3 (fract A, fract B)
+ -- Runtime Function: long fract __mulsq3 (long fract A, long fract B)
+ -- Runtime Function: long long fract __muldq3 (long long fract A, long
+          long fract B)
+ -- Runtime Function: unsigned short fract __muluqq3 (unsigned short
+          fract A, unsigned short fract B)
+ -- Runtime Function: unsigned fract __muluhq3 (unsigned fract A,
+          unsigned fract B)
+ -- Runtime Function: unsigned long fract __mulusq3 (unsigned long
+          fract A, unsigned long fract B)
+ -- Runtime Function: unsigned long long fract __muludq3 (unsigned long
+          long fract A, unsigned long long fract B)
+ -- Runtime Function: short accum __mulha3 (short accum A, short accum
+          B)
+ -- Runtime Function: accum __mulsa3 (accum A, accum B)
+ -- Runtime Function: long accum __mulda3 (long accum A, long accum B)
+ -- Runtime Function: long long accum __multa3 (long long accum A, long
+          long accum B)
+ -- Runtime Function: unsigned short accum __muluha3 (unsigned short
+          accum A, unsigned short accum B)
+ -- Runtime Function: unsigned accum __mulusa3 (unsigned accum A,
+          unsigned accum B)
+ -- Runtime Function: unsigned long accum __muluda3 (unsigned long
+          accum A, unsigned long accum B)
+ -- Runtime Function: unsigned long long accum __muluta3 (unsigned long
+          long accum A, unsigned long long accum B)
+     These functions return the product of A and B.
+
+ -- Runtime Function: short fract __ssmulqq3 (short fract A, short
+          fract B)
+ -- Runtime Function: fract __ssmulhq3 (fract A, fract B)
+ -- Runtime Function: long fract __ssmulsq3 (long fract A, long fract B)
+ -- Runtime Function: long long fract __ssmuldq3 (long long fract A,
+          long long fract B)
+ -- Runtime Function: short accum __ssmulha3 (short accum A, short
+          accum B)
+ -- Runtime Function: accum __ssmulsa3 (accum A, accum B)
+ -- Runtime Function: long accum __ssmulda3 (long accum A, long accum B)
+ -- Runtime Function: long long accum __ssmulta3 (long long accum A,
+          long long accum B)
+     These functions return the product of A and B with signed
+     saturation.
+
+ -- Runtime Function: unsigned short fract __usmuluqq3 (unsigned short
+          fract A, unsigned short fract B)
+ -- Runtime Function: unsigned fract __usmuluhq3 (unsigned fract A,
+          unsigned fract B)
+ -- Runtime Function: unsigned long fract __usmulusq3 (unsigned long
+          fract A, unsigned long fract B)
+ -- Runtime Function: unsigned long long fract __usmuludq3 (unsigned
+          long long fract A, unsigned long long fract B)
+ -- Runtime Function: unsigned short accum __usmuluha3 (unsigned short
+          accum A, unsigned short accum B)
+ -- Runtime Function: unsigned accum __usmulusa3 (unsigned accum A,
+          unsigned accum B)
+ -- Runtime Function: unsigned long accum __usmuluda3 (unsigned long
+          accum A, unsigned long accum B)
+ -- Runtime Function: unsigned long long accum __usmuluta3 (unsigned
+          long long accum A, unsigned long long accum B)
+     These functions return the product of A and B with unsigned
+     saturation.
+
+ -- Runtime Function: short fract __divqq3 (short fract A, short fract
+          B)
+ -- Runtime Function: fract __divhq3 (fract A, fract B)
+ -- Runtime Function: long fract __divsq3 (long fract A, long fract B)
+ -- Runtime Function: long long fract __divdq3 (long long fract A, long
+          long fract B)
+ -- Runtime Function: short accum __divha3 (short accum A, short accum
+          B)
+ -- Runtime Function: accum __divsa3 (accum A, accum B)
+ -- Runtime Function: long accum __divda3 (long accum A, long accum B)
+ -- Runtime Function: long long accum __divta3 (long long accum A, long
+          long accum B)
+     These functions return the quotient of the signed division of A
+     and B.
+
+ -- Runtime Function: unsigned short fract __udivuqq3 (unsigned short
+          fract A, unsigned short fract B)
+ -- Runtime Function: unsigned fract __udivuhq3 (unsigned fract A,
+          unsigned fract B)
+ -- Runtime Function: unsigned long fract __udivusq3 (unsigned long
+          fract A, unsigned long fract B)
+ -- Runtime Function: unsigned long long fract __udivudq3 (unsigned
+          long long fract A, unsigned long long fract B)
+ -- Runtime Function: unsigned short accum __udivuha3 (unsigned short
+          accum A, unsigned short accum B)
+ -- Runtime Function: unsigned accum __udivusa3 (unsigned accum A,
+          unsigned accum B)
+ -- Runtime Function: unsigned long accum __udivuda3 (unsigned long
+          accum A, unsigned long accum B)
+ -- Runtime Function: unsigned long long accum __udivuta3 (unsigned
+          long long accum A, unsigned long long accum B)
+     These functions return the quotient of the unsigned division of A
+     and B.
+
+ -- Runtime Function: short fract __ssdivqq3 (short fract A, short
+          fract B)
+ -- Runtime Function: fract __ssdivhq3 (fract A, fract B)
+ -- Runtime Function: long fract __ssdivsq3 (long fract A, long fract B)
+ -- Runtime Function: long long fract __ssdivdq3 (long long fract A,
+          long long fract B)
+ -- Runtime Function: short accum __ssdivha3 (short accum A, short
+          accum B)
+ -- Runtime Function: accum __ssdivsa3 (accum A, accum B)
+ -- Runtime Function: long accum __ssdivda3 (long accum A, long accum B)
+ -- Runtime Function: long long accum __ssdivta3 (long long accum A,
+          long long accum B)
+     These functions return the quotient of the signed division of A
+     and B with signed saturation.
+
+ -- Runtime Function: unsigned short fract __usdivuqq3 (unsigned short
+          fract A, unsigned short fract B)
+ -- Runtime Function: unsigned fract __usdivuhq3 (unsigned fract A,
+          unsigned fract B)
+ -- Runtime Function: unsigned long fract __usdivusq3 (unsigned long
+          fract A, unsigned long fract B)
+ -- Runtime Function: unsigned long long fract __usdivudq3 (unsigned
+          long long fract A, unsigned long long fract B)
+ -- Runtime Function: unsigned short accum __usdivuha3 (unsigned short
+          accum A, unsigned short accum B)
+ -- Runtime Function: unsigned accum __usdivusa3 (unsigned accum A,
+          unsigned accum B)
+ -- Runtime Function: unsigned long accum __usdivuda3 (unsigned long
+          accum A, unsigned long accum B)
+ -- Runtime Function: unsigned long long accum __usdivuta3 (unsigned
+          long long accum A, unsigned long long accum B)
+     These functions return the quotient of the unsigned division of A
+     and B with unsigned saturation.
+
+ -- Runtime Function: short fract __negqq2 (short fract A)
+ -- Runtime Function: fract __neghq2 (fract A)
+ -- Runtime Function: long fract __negsq2 (long fract A)
+ -- Runtime Function: long long fract __negdq2 (long long fract A)
+ -- Runtime Function: unsigned short fract __neguqq2 (unsigned short
+          fract A)
+ -- Runtime Function: unsigned fract __neguhq2 (unsigned fract A)
+ -- Runtime Function: unsigned long fract __negusq2 (unsigned long
+          fract A)
+ -- Runtime Function: unsigned long long fract __negudq2 (unsigned long
+          long fract A)
+ -- Runtime Function: short accum __negha2 (short accum A)
+ -- Runtime Function: accum __negsa2 (accum A)
+ -- Runtime Function: long accum __negda2 (long accum A)
+ -- Runtime Function: long long accum __negta2 (long long accum A)
+ -- Runtime Function: unsigned short accum __neguha2 (unsigned short
+          accum A)
+ -- Runtime Function: unsigned accum __negusa2 (unsigned accum A)
+ -- Runtime Function: unsigned long accum __neguda2 (unsigned long
+          accum A)
+ -- Runtime Function: unsigned long long accum __neguta2 (unsigned long
+          long accum A)
+     These functions return the negation of A.
+
+ -- Runtime Function: short fract __ssnegqq2 (short fract A)
+ -- Runtime Function: fract __ssneghq2 (fract A)
+ -- Runtime Function: long fract __ssnegsq2 (long fract A)
+ -- Runtime Function: long long fract __ssnegdq2 (long long fract A)
+ -- Runtime Function: short accum __ssnegha2 (short accum A)
+ -- Runtime Function: accum __ssnegsa2 (accum A)
+ -- Runtime Function: long accum __ssnegda2 (long accum A)
+ -- Runtime Function: long long accum __ssnegta2 (long long accum A)
+     These functions return the negation of A with signed saturation.
+
+ -- Runtime Function: unsigned short fract __usneguqq2 (unsigned short
+          fract A)
+ -- Runtime Function: unsigned fract __usneguhq2 (unsigned fract A)
+ -- Runtime Function: unsigned long fract __usnegusq2 (unsigned long
+          fract A)
+ -- Runtime Function: unsigned long long fract __usnegudq2 (unsigned
+          long long fract A)
+ -- Runtime Function: unsigned short accum __usneguha2 (unsigned short
+          accum A)
+ -- Runtime Function: unsigned accum __usnegusa2 (unsigned accum A)
+ -- Runtime Function: unsigned long accum __usneguda2 (unsigned long
+          accum A)
+ -- Runtime Function: unsigned long long accum __usneguta2 (unsigned
+          long long accum A)
+     These functions return the negation of A with unsigned saturation.
+
+ -- Runtime Function: short fract __ashlqq3 (short fract A, int B)
+ -- Runtime Function: fract __ashlhq3 (fract A, int B)
+ -- Runtime Function: long fract __ashlsq3 (long fract A, int B)
+ -- Runtime Function: long long fract __ashldq3 (long long fract A, int
+          B)
+ -- Runtime Function: unsigned short fract __ashluqq3 (unsigned short
+          fract A, int B)
+ -- Runtime Function: unsigned fract __ashluhq3 (unsigned fract A, int
+          B)
+ -- Runtime Function: unsigned long fract __ashlusq3 (unsigned long
+          fract A, int B)
+ -- Runtime Function: unsigned long long fract __ashludq3 (unsigned
+          long long fract A, int B)
+ -- Runtime Function: short accum __ashlha3 (short accum A, int B)
+ -- Runtime Function: accum __ashlsa3 (accum A, int B)
+ -- Runtime Function: long accum __ashlda3 (long accum A, int B)
+ -- Runtime Function: long long accum __ashlta3 (long long accum A, int
+          B)
+ -- Runtime Function: unsigned short accum __ashluha3 (unsigned short
+          accum A, int B)
+ -- Runtime Function: unsigned accum __ashlusa3 (unsigned accum A, int
+          B)
+ -- Runtime Function: unsigned long accum __ashluda3 (unsigned long
+          accum A, int B)
+ -- Runtime Function: unsigned long long accum __ashluta3 (unsigned
+          long long accum A, int B)
+     These functions return the result of shifting A left by B bits.
+
+ -- Runtime Function: short fract __ashrqq3 (short fract A, int B)
+ -- Runtime Function: fract __ashrhq3 (fract A, int B)
+ -- Runtime Function: long fract __ashrsq3 (long fract A, int B)
+ -- Runtime Function: long long fract __ashrdq3 (long long fract A, int
+          B)
+ -- Runtime Function: short accum __ashrha3 (short accum A, int B)
+ -- Runtime Function: accum __ashrsa3 (accum A, int B)
+ -- Runtime Function: long accum __ashrda3 (long accum A, int B)
+ -- Runtime Function: long long accum __ashrta3 (long long accum A, int
+          B)
+     These functions return the result of arithmetically shifting A
+     right by B bits.
+
+ -- Runtime Function: unsigned short fract __lshruqq3 (unsigned short
+          fract A, int B)
+ -- Runtime Function: unsigned fract __lshruhq3 (unsigned fract A, int
+          B)
+ -- Runtime Function: unsigned long fract __lshrusq3 (unsigned long
+          fract A, int B)
+ -- Runtime Function: unsigned long long fract __lshrudq3 (unsigned
+          long long fract A, int B)
+ -- Runtime Function: unsigned short accum __lshruha3 (unsigned short
+          accum A, int B)
+ -- Runtime Function: unsigned accum __lshrusa3 (unsigned accum A, int
+          B)
+ -- Runtime Function: unsigned long accum __lshruda3 (unsigned long
+          accum A, int B)
+ -- Runtime Function: unsigned long long accum __lshruta3 (unsigned
+          long long accum A, int B)
+     These functions return the result of logically shifting A right by
+     B bits.
+
+ -- Runtime Function: fract __ssashlhq3 (fract A, int B)
+ -- Runtime Function: long fract __ssashlsq3 (long fract A, int B)
+ -- Runtime Function: long long fract __ssashldq3 (long long fract A,
+          int B)
+ -- Runtime Function: short accum __ssashlha3 (short accum A, int B)
+ -- Runtime Function: accum __ssashlsa3 (accum A, int B)
+ -- Runtime Function: long accum __ssashlda3 (long accum A, int B)
+ -- Runtime Function: long long accum __ssashlta3 (long long accum A,
+          int B)
+     These functions return the result of shifting A left by B bits
+     with signed saturation.
+
+ -- Runtime Function: unsigned short fract __usashluqq3 (unsigned short
+          fract A, int B)
+ -- Runtime Function: unsigned fract __usashluhq3 (unsigned fract A,
+          int B)
+ -- Runtime Function: unsigned long fract __usashlusq3 (unsigned long
+          fract A, int B)
+ -- Runtime Function: unsigned long long fract __usashludq3 (unsigned
+          long long fract A, int B)
+ -- Runtime Function: unsigned short accum __usashluha3 (unsigned short
+          accum A, int B)
+ -- Runtime Function: unsigned accum __usashlusa3 (unsigned accum A,
+          int B)
+ -- Runtime Function: unsigned long accum __usashluda3 (unsigned long
+          accum A, int B)
+ -- Runtime Function: unsigned long long accum __usashluta3 (unsigned
+          long long accum A, int B)
+     These functions return the result of shifting A left by B bits
+     with unsigned saturation.
+
+4.4.2 Comparison functions
+--------------------------
+
+The following functions implement fixed-point comparisons.  These
+functions implement a low-level compare, upon which the higher level
+comparison operators (such as less than and greater than or equal to)
+can be constructed.  The returned values lie in the range zero to two,
+to allow the high-level operators to be implemented by testing the
+returned result using either signed or unsigned comparison.
+
+ -- Runtime Function: int __cmpqq2 (short fract A, short fract B)
+ -- Runtime Function: int __cmphq2 (fract A, fract B)
+ -- Runtime Function: int __cmpsq2 (long fract A, long fract B)
+ -- Runtime Function: int __cmpdq2 (long long fract A, long long fract
+          B)
+ -- Runtime Function: int __cmpuqq2 (unsigned short fract A, unsigned
+          short fract B)
+ -- Runtime Function: int __cmpuhq2 (unsigned fract A, unsigned fract B)
+ -- Runtime Function: int __cmpusq2 (unsigned long fract A, unsigned
+          long fract B)
+ -- Runtime Function: int __cmpudq2 (unsigned long long fract A,
+          unsigned long long fract B)
+ -- Runtime Function: int __cmpha2 (short accum A, short accum B)
+ -- Runtime Function: int __cmpsa2 (accum A, accum B)
+ -- Runtime Function: int __cmpda2 (long accum A, long accum B)
+ -- Runtime Function: int __cmpta2 (long long accum A, long long accum
+          B)
+ -- Runtime Function: int __cmpuha2 (unsigned short accum A, unsigned
+          short accum B)
+ -- Runtime Function: int __cmpusa2 (unsigned accum A, unsigned accum B)
+ -- Runtime Function: int __cmpuda2 (unsigned long accum A, unsigned
+          long accum B)
+ -- Runtime Function: int __cmputa2 (unsigned long long accum A,
+          unsigned long long accum B)
+     These functions perform a signed or unsigned comparison of A and B
+     (depending on the selected machine mode).  If A is less than B,
+     they return 0; if A is greater than B, they return 2; and if A and
+     B are equal they return 1.
+
+4.4.3 Conversion functions
+--------------------------
+
+ -- Runtime Function: fract __fractqqhq2 (short fract A)
+ -- Runtime Function: long fract __fractqqsq2 (short fract A)
+ -- Runtime Function: long long fract __fractqqdq2 (short fract A)
+ -- Runtime Function: short accum __fractqqha (short fract A)
+ -- Runtime Function: accum __fractqqsa (short fract A)
+ -- Runtime Function: long accum __fractqqda (short fract A)
+ -- Runtime Function: long long accum __fractqqta (short fract A)
+ -- Runtime Function: unsigned short fract __fractqquqq (short fract A)
+ -- Runtime Function: unsigned fract __fractqquhq (short fract A)
+ -- Runtime Function: unsigned long fract __fractqqusq (short fract A)
+ -- Runtime Function: unsigned long long fract __fractqqudq (short
+          fract A)
+ -- Runtime Function: unsigned short accum __fractqquha (short fract A)
+ -- Runtime Function: unsigned accum __fractqqusa (short fract A)
+ -- Runtime Function: unsigned long accum __fractqquda (short fract A)
+ -- Runtime Function: unsigned long long accum __fractqquta (short
+          fract A)
+ -- Runtime Function: signed char __fractqqqi (short fract A)
+ -- Runtime Function: short __fractqqhi (short fract A)
+ -- Runtime Function: int __fractqqsi (short fract A)
+ -- Runtime Function: long __fractqqdi (short fract A)
+ -- Runtime Function: long long __fractqqti (short fract A)
+ -- Runtime Function: float __fractqqsf (short fract A)
+ -- Runtime Function: double __fractqqdf (short fract A)
+ -- Runtime Function: short fract __fracthqqq2 (fract A)
+ -- Runtime Function: long fract __fracthqsq2 (fract A)
+ -- Runtime Function: long long fract __fracthqdq2 (fract A)
+ -- Runtime Function: short accum __fracthqha (fract A)
+ -- Runtime Function: accum __fracthqsa (fract A)
+ -- Runtime Function: long accum __fracthqda (fract A)
+ -- Runtime Function: long long accum __fracthqta (fract A)
+ -- Runtime Function: unsigned short fract __fracthquqq (fract A)
+ -- Runtime Function: unsigned fract __fracthquhq (fract A)
+ -- Runtime Function: unsigned long fract __fracthqusq (fract A)
+ -- Runtime Function: unsigned long long fract __fracthqudq (fract A)
+ -- Runtime Function: unsigned short accum __fracthquha (fract A)
+ -- Runtime Function: unsigned accum __fracthqusa (fract A)
+ -- Runtime Function: unsigned long accum __fracthquda (fract A)
+ -- Runtime Function: unsigned long long accum __fracthquta (fract A)
+ -- Runtime Function: signed char __fracthqqi (fract A)
+ -- Runtime Function: short __fracthqhi (fract A)
+ -- Runtime Function: int __fracthqsi (fract A)
+ -- Runtime Function: long __fracthqdi (fract A)
+ -- Runtime Function: long long __fracthqti (fract A)
+ -- Runtime Function: float __fracthqsf (fract A)
+ -- Runtime Function: double __fracthqdf (fract A)
+ -- Runtime Function: short fract __fractsqqq2 (long fract A)
+ -- Runtime Function: fract __fractsqhq2 (long fract A)
+ -- Runtime Function: long long fract __fractsqdq2 (long fract A)
+ -- Runtime Function: short accum __fractsqha (long fract A)
+ -- Runtime Function: accum __fractsqsa (long fract A)
+ -- Runtime Function: long accum __fractsqda (long fract A)
+ -- Runtime Function: long long accum __fractsqta (long fract A)
+ -- Runtime Function: unsigned short fract __fractsquqq (long fract A)
+ -- Runtime Function: unsigned fract __fractsquhq (long fract A)
+ -- Runtime Function: unsigned long fract __fractsqusq (long fract A)
+ -- Runtime Function: unsigned long long fract __fractsqudq (long fract
+          A)
+ -- Runtime Function: unsigned short accum __fractsquha (long fract A)
+ -- Runtime Function: unsigned accum __fractsqusa (long fract A)
+ -- Runtime Function: unsigned long accum __fractsquda (long fract A)
+ -- Runtime Function: unsigned long long accum __fractsquta (long fract
+          A)
+ -- Runtime Function: signed char __fractsqqi (long fract A)
+ -- Runtime Function: short __fractsqhi (long fract A)
+ -- Runtime Function: int __fractsqsi (long fract A)
+ -- Runtime Function: long __fractsqdi (long fract A)
+ -- Runtime Function: long long __fractsqti (long fract A)
+ -- Runtime Function: float __fractsqsf (long fract A)
+ -- Runtime Function: double __fractsqdf (long fract A)
+ -- Runtime Function: short fract __fractdqqq2 (long long fract A)
+ -- Runtime Function: fract __fractdqhq2 (long long fract A)
+ -- Runtime Function: long fract __fractdqsq2 (long long fract A)
+ -- Runtime Function: short accum __fractdqha (long long fract A)
+ -- Runtime Function: accum __fractdqsa (long long fract A)
+ -- Runtime Function: long accum __fractdqda (long long fract A)
+ -- Runtime Function: long long accum __fractdqta (long long fract A)
+ -- Runtime Function: unsigned short fract __fractdquqq (long long
+          fract A)
+ -- Runtime Function: unsigned fract __fractdquhq (long long fract A)
+ -- Runtime Function: unsigned long fract __fractdqusq (long long fract
+          A)
+ -- Runtime Function: unsigned long long fract __fractdqudq (long long
+          fract A)
+ -- Runtime Function: unsigned short accum __fractdquha (long long
+          fract A)
+ -- Runtime Function: unsigned accum __fractdqusa (long long fract A)
+ -- Runtime Function: unsigned long accum __fractdquda (long long fract
+          A)
+ -- Runtime Function: unsigned long long accum __fractdquta (long long
+          fract A)
+ -- Runtime Function: signed char __fractdqqi (long long fract A)
+ -- Runtime Function: short __fractdqhi (long long fract A)
+ -- Runtime Function: int __fractdqsi (long long fract A)
+ -- Runtime Function: long __fractdqdi (long long fract A)
+ -- Runtime Function: long long __fractdqti (long long fract A)
+ -- Runtime Function: float __fractdqsf (long long fract A)
+ -- Runtime Function: double __fractdqdf (long long fract A)
+ -- Runtime Function: short fract __fracthaqq (short accum A)
+ -- Runtime Function: fract __fracthahq (short accum A)
+ -- Runtime Function: long fract __fracthasq (short accum A)
+ -- Runtime Function: long long fract __fracthadq (short accum A)
+ -- Runtime Function: accum __fracthasa2 (short accum A)
+ -- Runtime Function: long accum __fracthada2 (short accum A)
+ -- Runtime Function: long long accum __fracthata2 (short accum A)
+ -- Runtime Function: unsigned short fract __fracthauqq (short accum A)
+ -- Runtime Function: unsigned fract __fracthauhq (short accum A)
+ -- Runtime Function: unsigned long fract __fracthausq (short accum A)
+ -- Runtime Function: unsigned long long fract __fracthaudq (short
+          accum A)
+ -- Runtime Function: unsigned short accum __fracthauha (short accum A)
+ -- Runtime Function: unsigned accum __fracthausa (short accum A)
+ -- Runtime Function: unsigned long accum __fracthauda (short accum A)
+ -- Runtime Function: unsigned long long accum __fracthauta (short
+          accum A)
+ -- Runtime Function: signed char __fracthaqi (short accum A)
+ -- Runtime Function: short __fracthahi (short accum A)
+ -- Runtime Function: int __fracthasi (short accum A)
+ -- Runtime Function: long __fracthadi (short accum A)
+ -- Runtime Function: long long __fracthati (short accum A)
+ -- Runtime Function: float __fracthasf (short accum A)
+ -- Runtime Function: double __fracthadf (short accum A)
+ -- Runtime Function: short fract __fractsaqq (accum A)
+ -- Runtime Function: fract __fractsahq (accum A)
+ -- Runtime Function: long fract __fractsasq (accum A)
+ -- Runtime Function: long long fract __fractsadq (accum A)
+ -- Runtime Function: short accum __fractsaha2 (accum A)
+ -- Runtime Function: long accum __fractsada2 (accum A)
+ -- Runtime Function: long long accum __fractsata2 (accum A)
+ -- Runtime Function: unsigned short fract __fractsauqq (accum A)
+ -- Runtime Function: unsigned fract __fractsauhq (accum A)
+ -- Runtime Function: unsigned long fract __fractsausq (accum A)
+ -- Runtime Function: unsigned long long fract __fractsaudq (accum A)
+ -- Runtime Function: unsigned short accum __fractsauha (accum A)
+ -- Runtime Function: unsigned accum __fractsausa (accum A)
+ -- Runtime Function: unsigned long accum __fractsauda (accum A)
+ -- Runtime Function: unsigned long long accum __fractsauta (accum A)
+ -- Runtime Function: signed char __fractsaqi (accum A)
+ -- Runtime Function: short __fractsahi (accum A)
+ -- Runtime Function: int __fractsasi (accum A)
+ -- Runtime Function: long __fractsadi (accum A)
+ -- Runtime Function: long long __fractsati (accum A)
+ -- Runtime Function: float __fractsasf (accum A)
+ -- Runtime Function: double __fractsadf (accum A)
+ -- Runtime Function: short fract __fractdaqq (long accum A)
+ -- Runtime Function: fract __fractdahq (long accum A)
+ -- Runtime Function: long fract __fractdasq (long accum A)
+ -- Runtime Function: long long fract __fractdadq (long accum A)
+ -- Runtime Function: short accum __fractdaha2 (long accum A)
+ -- Runtime Function: accum __fractdasa2 (long accum A)
+ -- Runtime Function: long long accum __fractdata2 (long accum A)
+ -- Runtime Function: unsigned short fract __fractdauqq (long accum A)
+ -- Runtime Function: unsigned fract __fractdauhq (long accum A)
+ -- Runtime Function: unsigned long fract __fractdausq (long accum A)
+ -- Runtime Function: unsigned long long fract __fractdaudq (long accum
+          A)
+ -- Runtime Function: unsigned short accum __fractdauha (long accum A)
+ -- Runtime Function: unsigned accum __fractdausa (long accum A)
+ -- Runtime Function: unsigned long accum __fractdauda (long accum A)
+ -- Runtime Function: unsigned long long accum __fractdauta (long accum
+          A)
+ -- Runtime Function: signed char __fractdaqi (long accum A)
+ -- Runtime Function: short __fractdahi (long accum A)
+ -- Runtime Function: int __fractdasi (long accum A)
+ -- Runtime Function: long __fractdadi (long accum A)
+ -- Runtime Function: long long __fractdati (long accum A)
+ -- Runtime Function: float __fractdasf (long accum A)
+ -- Runtime Function: double __fractdadf (long accum A)
+ -- Runtime Function: short fract __fracttaqq (long long accum A)
+ -- Runtime Function: fract __fracttahq (long long accum A)
+ -- Runtime Function: long fract __fracttasq (long long accum A)
+ -- Runtime Function: long long fract __fracttadq (long long accum A)
+ -- Runtime Function: short accum __fracttaha2 (long long accum A)
+ -- Runtime Function: accum __fracttasa2 (long long accum A)
+ -- Runtime Function: long accum __fracttada2 (long long accum A)
+ -- Runtime Function: unsigned short fract __fracttauqq (long long
+          accum A)
+ -- Runtime Function: unsigned fract __fracttauhq (long long accum A)
+ -- Runtime Function: unsigned long fract __fracttausq (long long accum
+          A)
+ -- Runtime Function: unsigned long long fract __fracttaudq (long long
+          accum A)
+ -- Runtime Function: unsigned short accum __fracttauha (long long
+          accum A)
+ -- Runtime Function: unsigned accum __fracttausa (long long accum A)
+ -- Runtime Function: unsigned long accum __fracttauda (long long accum
+          A)
+ -- Runtime Function: unsigned long long accum __fracttauta (long long
+          accum A)
+ -- Runtime Function: signed char __fracttaqi (long long accum A)
+ -- Runtime Function: short __fracttahi (long long accum A)
+ -- Runtime Function: int __fracttasi (long long accum A)
+ -- Runtime Function: long __fracttadi (long long accum A)
+ -- Runtime Function: long long __fracttati (long long accum A)
+ -- Runtime Function: float __fracttasf (long long accum A)
+ -- Runtime Function: double __fracttadf (long long accum A)
+ -- Runtime Function: short fract __fractuqqqq (unsigned short fract A)
+ -- Runtime Function: fract __fractuqqhq (unsigned short fract A)
+ -- Runtime Function: long fract __fractuqqsq (unsigned short fract A)
+ -- Runtime Function: long long fract __fractuqqdq (unsigned short
+          fract A)
+ -- Runtime Function: short accum __fractuqqha (unsigned short fract A)
+ -- Runtime Function: accum __fractuqqsa (unsigned short fract A)
+ -- Runtime Function: long accum __fractuqqda (unsigned short fract A)
+ -- Runtime Function: long long accum __fractuqqta (unsigned short
+          fract A)
+ -- Runtime Function: unsigned fract __fractuqquhq2 (unsigned short
+          fract A)
+ -- Runtime Function: unsigned long fract __fractuqqusq2 (unsigned
+          short fract A)
+ -- Runtime Function: unsigned long long fract __fractuqqudq2 (unsigned
+          short fract A)
+ -- Runtime Function: unsigned short accum __fractuqquha (unsigned
+          short fract A)
+ -- Runtime Function: unsigned accum __fractuqqusa (unsigned short
+          fract A)
+ -- Runtime Function: unsigned long accum __fractuqquda (unsigned short
+          fract A)
+ -- Runtime Function: unsigned long long accum __fractuqquta (unsigned
+          short fract A)
+ -- Runtime Function: signed char __fractuqqqi (unsigned short fract A)
+ -- Runtime Function: short __fractuqqhi (unsigned short fract A)
+ -- Runtime Function: int __fractuqqsi (unsigned short fract A)
+ -- Runtime Function: long __fractuqqdi (unsigned short fract A)
+ -- Runtime Function: long long __fractuqqti (unsigned short fract A)
+ -- Runtime Function: float __fractuqqsf (unsigned short fract A)
+ -- Runtime Function: double __fractuqqdf (unsigned short fract A)
+ -- Runtime Function: short fract __fractuhqqq (unsigned fract A)
+ -- Runtime Function: fract __fractuhqhq (unsigned fract A)
+ -- Runtime Function: long fract __fractuhqsq (unsigned fract A)
+ -- Runtime Function: long long fract __fractuhqdq (unsigned fract A)
+ -- Runtime Function: short accum __fractuhqha (unsigned fract A)
+ -- Runtime Function: accum __fractuhqsa (unsigned fract A)
+ -- Runtime Function: long accum __fractuhqda (unsigned fract A)
+ -- Runtime Function: long long accum __fractuhqta (unsigned fract A)
+ -- Runtime Function: unsigned short fract __fractuhquqq2 (unsigned
+          fract A)
+ -- Runtime Function: unsigned long fract __fractuhqusq2 (unsigned
+          fract A)
+ -- Runtime Function: unsigned long long fract __fractuhqudq2 (unsigned
+          fract A)
+ -- Runtime Function: unsigned short accum __fractuhquha (unsigned
+          fract A)
+ -- Runtime Function: unsigned accum __fractuhqusa (unsigned fract A)
+ -- Runtime Function: unsigned long accum __fractuhquda (unsigned fract
+          A)
+ -- Runtime Function: unsigned long long accum __fractuhquta (unsigned
+          fract A)
+ -- Runtime Function: signed char __fractuhqqi (unsigned fract A)
+ -- Runtime Function: short __fractuhqhi (unsigned fract A)
+ -- Runtime Function: int __fractuhqsi (unsigned fract A)
+ -- Runtime Function: long __fractuhqdi (unsigned fract A)
+ -- Runtime Function: long long __fractuhqti (unsigned fract A)
+ -- Runtime Function: float __fractuhqsf (unsigned fract A)
+ -- Runtime Function: double __fractuhqdf (unsigned fract A)
+ -- Runtime Function: short fract __fractusqqq (unsigned long fract A)
+ -- Runtime Function: fract __fractusqhq (unsigned long fract A)
+ -- Runtime Function: long fract __fractusqsq (unsigned long fract A)
+ -- Runtime Function: long long fract __fractusqdq (unsigned long fract
+          A)
+ -- Runtime Function: short accum __fractusqha (unsigned long fract A)
+ -- Runtime Function: accum __fractusqsa (unsigned long fract A)
+ -- Runtime Function: long accum __fractusqda (unsigned long fract A)
+ -- Runtime Function: long long accum __fractusqta (unsigned long fract
+          A)
+ -- Runtime Function: unsigned short fract __fractusquqq2 (unsigned
+          long fract A)
+ -- Runtime Function: unsigned fract __fractusquhq2 (unsigned long
+          fract A)
+ -- Runtime Function: unsigned long long fract __fractusqudq2 (unsigned
+          long fract A)
+ -- Runtime Function: unsigned short accum __fractusquha (unsigned long
+          fract A)
+ -- Runtime Function: unsigned accum __fractusqusa (unsigned long fract
+          A)
+ -- Runtime Function: unsigned long accum __fractusquda (unsigned long
+          fract A)
+ -- Runtime Function: unsigned long long accum __fractusquta (unsigned
+          long fract A)
+ -- Runtime Function: signed char __fractusqqi (unsigned long fract A)
+ -- Runtime Function: short __fractusqhi (unsigned long fract A)
+ -- Runtime Function: int __fractusqsi (unsigned long fract A)
+ -- Runtime Function: long __fractusqdi (unsigned long fract A)
+ -- Runtime Function: long long __fractusqti (unsigned long fract A)
+ -- Runtime Function: float __fractusqsf (unsigned long fract A)
+ -- Runtime Function: double __fractusqdf (unsigned long fract A)
+ -- Runtime Function: short fract __fractudqqq (unsigned long long
+          fract A)
+ -- Runtime Function: fract __fractudqhq (unsigned long long fract A)
+ -- Runtime Function: long fract __fractudqsq (unsigned long long fract
+          A)
+ -- Runtime Function: long long fract __fractudqdq (unsigned long long
+          fract A)
+ -- Runtime Function: short accum __fractudqha (unsigned long long
+          fract A)
+ -- Runtime Function: accum __fractudqsa (unsigned long long fract A)
+ -- Runtime Function: long accum __fractudqda (unsigned long long fract
+          A)
+ -- Runtime Function: long long accum __fractudqta (unsigned long long
+          fract A)
+ -- Runtime Function: unsigned short fract __fractudquqq2 (unsigned
+          long long fract A)
+ -- Runtime Function: unsigned fract __fractudquhq2 (unsigned long long
+          fract A)
+ -- Runtime Function: unsigned long fract __fractudqusq2 (unsigned long
+          long fract A)
+ -- Runtime Function: unsigned short accum __fractudquha (unsigned long
+          long fract A)
+ -- Runtime Function: unsigned accum __fractudqusa (unsigned long long
+          fract A)
+ -- Runtime Function: unsigned long accum __fractudquda (unsigned long
+          long fract A)
+ -- Runtime Function: unsigned long long accum __fractudquta (unsigned
+          long long fract A)
+ -- Runtime Function: signed char __fractudqqi (unsigned long long
+          fract A)
+ -- Runtime Function: short __fractudqhi (unsigned long long fract A)
+ -- Runtime Function: int __fractudqsi (unsigned long long fract A)
+ -- Runtime Function: long __fractudqdi (unsigned long long fract A)
+ -- Runtime Function: long long __fractudqti (unsigned long long fract
+          A)
+ -- Runtime Function: float __fractudqsf (unsigned long long fract A)
+ -- Runtime Function: double __fractudqdf (unsigned long long fract A)
+ -- Runtime Function: short fract __fractuhaqq (unsigned short accum A)
+ -- Runtime Function: fract __fractuhahq (unsigned short accum A)
+ -- Runtime Function: long fract __fractuhasq (unsigned short accum A)
+ -- Runtime Function: long long fract __fractuhadq (unsigned short
+          accum A)
+ -- Runtime Function: short accum __fractuhaha (unsigned short accum A)
+ -- Runtime Function: accum __fractuhasa (unsigned short accum A)
+ -- Runtime Function: long accum __fractuhada (unsigned short accum A)
+ -- Runtime Function: long long accum __fractuhata (unsigned short
+          accum A)
+ -- Runtime Function: unsigned short fract __fractuhauqq (unsigned
+          short accum A)
+ -- Runtime Function: unsigned fract __fractuhauhq (unsigned short
+          accum A)
+ -- Runtime Function: unsigned long fract __fractuhausq (unsigned short
+          accum A)
+ -- Runtime Function: unsigned long long fract __fractuhaudq (unsigned
+          short accum A)
+ -- Runtime Function: unsigned accum __fractuhausa2 (unsigned short
+          accum A)
+ -- Runtime Function: unsigned long accum __fractuhauda2 (unsigned
+          short accum A)
+ -- Runtime Function: unsigned long long accum __fractuhauta2 (unsigned
+          short accum A)
+ -- Runtime Function: signed char __fractuhaqi (unsigned short accum A)
+ -- Runtime Function: short __fractuhahi (unsigned short accum A)
+ -- Runtime Function: int __fractuhasi (unsigned short accum A)
+ -- Runtime Function: long __fractuhadi (unsigned short accum A)
+ -- Runtime Function: long long __fractuhati (unsigned short accum A)
+ -- Runtime Function: float __fractuhasf (unsigned short accum A)
+ -- Runtime Function: double __fractuhadf (unsigned short accum A)
+ -- Runtime Function: short fract __fractusaqq (unsigned accum A)
+ -- Runtime Function: fract __fractusahq (unsigned accum A)
+ -- Runtime Function: long fract __fractusasq (unsigned accum A)
+ -- Runtime Function: long long fract __fractusadq (unsigned accum A)
+ -- Runtime Function: short accum __fractusaha (unsigned accum A)
+ -- Runtime Function: accum __fractusasa (unsigned accum A)
+ -- Runtime Function: long accum __fractusada (unsigned accum A)
+ -- Runtime Function: long long accum __fractusata (unsigned accum A)
+ -- Runtime Function: unsigned short fract __fractusauqq (unsigned
+          accum A)
+ -- Runtime Function: unsigned fract __fractusauhq (unsigned accum A)
+ -- Runtime Function: unsigned long fract __fractusausq (unsigned accum
+          A)
+ -- Runtime Function: unsigned long long fract __fractusaudq (unsigned
+          accum A)
+ -- Runtime Function: unsigned short accum __fractusauha2 (unsigned
+          accum A)
+ -- Runtime Function: unsigned long accum __fractusauda2 (unsigned
+          accum A)
+ -- Runtime Function: unsigned long long accum __fractusauta2 (unsigned
+          accum A)
+ -- Runtime Function: signed char __fractusaqi (unsigned accum A)
+ -- Runtime Function: short __fractusahi (unsigned accum A)
+ -- Runtime Function: int __fractusasi (unsigned accum A)
+ -- Runtime Function: long __fractusadi (unsigned accum A)
+ -- Runtime Function: long long __fractusati (unsigned accum A)
+ -- Runtime Function: float __fractusasf (unsigned accum A)
+ -- Runtime Function: double __fractusadf (unsigned accum A)
+ -- Runtime Function: short fract __fractudaqq (unsigned long accum A)
+ -- Runtime Function: fract __fractudahq (unsigned long accum A)
+ -- Runtime Function: long fract __fractudasq (unsigned long accum A)
+ -- Runtime Function: long long fract __fractudadq (unsigned long accum
+          A)
+ -- Runtime Function: short accum __fractudaha (unsigned long accum A)
+ -- Runtime Function: accum __fractudasa (unsigned long accum A)
+ -- Runtime Function: long accum __fractudada (unsigned long accum A)
+ -- Runtime Function: long long accum __fractudata (unsigned long accum
+          A)
+ -- Runtime Function: unsigned short fract __fractudauqq (unsigned long
+          accum A)
+ -- Runtime Function: unsigned fract __fractudauhq (unsigned long accum
+          A)
+ -- Runtime Function: unsigned long fract __fractudausq (unsigned long
+          accum A)
+ -- Runtime Function: unsigned long long fract __fractudaudq (unsigned
+          long accum A)
+ -- Runtime Function: unsigned short accum __fractudauha2 (unsigned
+          long accum A)
+ -- Runtime Function: unsigned accum __fractudausa2 (unsigned long
+          accum A)
+ -- Runtime Function: unsigned long long accum __fractudauta2 (unsigned
+          long accum A)
+ -- Runtime Function: signed char __fractudaqi (unsigned long accum A)
+ -- Runtime Function: short __fractudahi (unsigned long accum A)
+ -- Runtime Function: int __fractudasi (unsigned long accum A)
+ -- Runtime Function: long __fractudadi (unsigned long accum A)
+ -- Runtime Function: long long __fractudati (unsigned long accum A)
+ -- Runtime Function: float __fractudasf (unsigned long accum A)
+ -- Runtime Function: double __fractudadf (unsigned long accum A)
+ -- Runtime Function: short fract __fractutaqq (unsigned long long
+          accum A)
+ -- Runtime Function: fract __fractutahq (unsigned long long accum A)
+ -- Runtime Function: long fract __fractutasq (unsigned long long accum
+          A)
+ -- Runtime Function: long long fract __fractutadq (unsigned long long
+          accum A)
+ -- Runtime Function: short accum __fractutaha (unsigned long long
+          accum A)
+ -- Runtime Function: accum __fractutasa (unsigned long long accum A)
+ -- Runtime Function: long accum __fractutada (unsigned long long accum
+          A)
+ -- Runtime Function: long long accum __fractutata (unsigned long long
+          accum A)
+ -- Runtime Function: unsigned short fract __fractutauqq (unsigned long
+          long accum A)
+ -- Runtime Function: unsigned fract __fractutauhq (unsigned long long
+          accum A)
+ -- Runtime Function: unsigned long fract __fractutausq (unsigned long
+          long accum A)
+ -- Runtime Function: unsigned long long fract __fractutaudq (unsigned
+          long long accum A)
+ -- Runtime Function: unsigned short accum __fractutauha2 (unsigned
+          long long accum A)
+ -- Runtime Function: unsigned accum __fractutausa2 (unsigned long long
+          accum A)
+ -- Runtime Function: unsigned long accum __fractutauda2 (unsigned long
+          long accum A)
+ -- Runtime Function: signed char __fractutaqi (unsigned long long
+          accum A)
+ -- Runtime Function: short __fractutahi (unsigned long long accum A)
+ -- Runtime Function: int __fractutasi (unsigned long long accum A)
+ -- Runtime Function: long __fractutadi (unsigned long long accum A)
+ -- Runtime Function: long long __fractutati (unsigned long long accum
+          A)
+ -- Runtime Function: float __fractutasf (unsigned long long accum A)
+ -- Runtime Function: double __fractutadf (unsigned long long accum A)
+ -- Runtime Function: short fract __fractqiqq (signed char A)
+ -- Runtime Function: fract __fractqihq (signed char A)
+ -- Runtime Function: long fract __fractqisq (signed char A)
+ -- Runtime Function: long long fract __fractqidq (signed char A)
+ -- Runtime Function: short accum __fractqiha (signed char A)
+ -- Runtime Function: accum __fractqisa (signed char A)
+ -- Runtime Function: long accum __fractqida (signed char A)
+ -- Runtime Function: long long accum __fractqita (signed char A)
+ -- Runtime Function: unsigned short fract __fractqiuqq (signed char A)
+ -- Runtime Function: unsigned fract __fractqiuhq (signed char A)
+ -- Runtime Function: unsigned long fract __fractqiusq (signed char A)
+ -- Runtime Function: unsigned long long fract __fractqiudq (signed
+          char A)
+ -- Runtime Function: unsigned short accum __fractqiuha (signed char A)
+ -- Runtime Function: unsigned accum __fractqiusa (signed char A)
+ -- Runtime Function: unsigned long accum __fractqiuda (signed char A)
+ -- Runtime Function: unsigned long long accum __fractqiuta (signed
+          char A)
+ -- Runtime Function: short fract __fracthiqq (short A)
+ -- Runtime Function: fract __fracthihq (short A)
+ -- Runtime Function: long fract __fracthisq (short A)
+ -- Runtime Function: long long fract __fracthidq (short A)
+ -- Runtime Function: short accum __fracthiha (short A)
+ -- Runtime Function: accum __fracthisa (short A)
+ -- Runtime Function: long accum __fracthida (short A)
+ -- Runtime Function: long long accum __fracthita (short A)
+ -- Runtime Function: unsigned short fract __fracthiuqq (short A)
+ -- Runtime Function: unsigned fract __fracthiuhq (short A)
+ -- Runtime Function: unsigned long fract __fracthiusq (short A)
+ -- Runtime Function: unsigned long long fract __fracthiudq (short A)
+ -- Runtime Function: unsigned short accum __fracthiuha (short A)
+ -- Runtime Function: unsigned accum __fracthiusa (short A)
+ -- Runtime Function: unsigned long accum __fracthiuda (short A)
+ -- Runtime Function: unsigned long long accum __fracthiuta (short A)
+ -- Runtime Function: short fract __fractsiqq (int A)
+ -- Runtime Function: fract __fractsihq (int A)
+ -- Runtime Function: long fract __fractsisq (int A)
+ -- Runtime Function: long long fract __fractsidq (int A)
+ -- Runtime Function: short accum __fractsiha (int A)
+ -- Runtime Function: accum __fractsisa (int A)
+ -- Runtime Function: long accum __fractsida (int A)
+ -- Runtime Function: long long accum __fractsita (int A)
+ -- Runtime Function: unsigned short fract __fractsiuqq (int A)
+ -- Runtime Function: unsigned fract __fractsiuhq (int A)
+ -- Runtime Function: unsigned long fract __fractsiusq (int A)
+ -- Runtime Function: unsigned long long fract __fractsiudq (int A)
+ -- Runtime Function: unsigned short accum __fractsiuha (int A)
+ -- Runtime Function: unsigned accum __fractsiusa (int A)
+ -- Runtime Function: unsigned long accum __fractsiuda (int A)
+ -- Runtime Function: unsigned long long accum __fractsiuta (int A)
+ -- Runtime Function: short fract __fractdiqq (long A)
+ -- Runtime Function: fract __fractdihq (long A)
+ -- Runtime Function: long fract __fractdisq (long A)
+ -- Runtime Function: long long fract __fractdidq (long A)
+ -- Runtime Function: short accum __fractdiha (long A)
+ -- Runtime Function: accum __fractdisa (long A)
+ -- Runtime Function: long accum __fractdida (long A)
+ -- Runtime Function: long long accum __fractdita (long A)
+ -- Runtime Function: unsigned short fract __fractdiuqq (long A)
+ -- Runtime Function: unsigned fract __fractdiuhq (long A)
+ -- Runtime Function: unsigned long fract __fractdiusq (long A)
+ -- Runtime Function: unsigned long long fract __fractdiudq (long A)
+ -- Runtime Function: unsigned short accum __fractdiuha (long A)
+ -- Runtime Function: unsigned accum __fractdiusa (long A)
+ -- Runtime Function: unsigned long accum __fractdiuda (long A)
+ -- Runtime Function: unsigned long long accum __fractdiuta (long A)
+ -- Runtime Function: short fract __fracttiqq (long long A)
+ -- Runtime Function: fract __fracttihq (long long A)
+ -- Runtime Function: long fract __fracttisq (long long A)
+ -- Runtime Function: long long fract __fracttidq (long long A)
+ -- Runtime Function: short accum __fracttiha (long long A)
+ -- Runtime Function: accum __fracttisa (long long A)
+ -- Runtime Function: long accum __fracttida (long long A)
+ -- Runtime Function: long long accum __fracttita (long long A)
+ -- Runtime Function: unsigned short fract __fracttiuqq (long long A)
+ -- Runtime Function: unsigned fract __fracttiuhq (long long A)
+ -- Runtime Function: unsigned long fract __fracttiusq (long long A)
+ -- Runtime Function: unsigned long long fract __fracttiudq (long long
+          A)
+ -- Runtime Function: unsigned short accum __fracttiuha (long long A)
+ -- Runtime Function: unsigned accum __fracttiusa (long long A)
+ -- Runtime Function: unsigned long accum __fracttiuda (long long A)
+ -- Runtime Function: unsigned long long accum __fracttiuta (long long
+          A)
+ -- Runtime Function: short fract __fractsfqq (float A)
+ -- Runtime Function: fract __fractsfhq (float A)
+ -- Runtime Function: long fract __fractsfsq (float A)
+ -- Runtime Function: long long fract __fractsfdq (float A)
+ -- Runtime Function: short accum __fractsfha (float A)
+ -- Runtime Function: accum __fractsfsa (float A)
+ -- Runtime Function: long accum __fractsfda (float A)
+ -- Runtime Function: long long accum __fractsfta (float A)
+ -- Runtime Function: unsigned short fract __fractsfuqq (float A)
+ -- Runtime Function: unsigned fract __fractsfuhq (float A)
+ -- Runtime Function: unsigned long fract __fractsfusq (float A)
+ -- Runtime Function: unsigned long long fract __fractsfudq (float A)
+ -- Runtime Function: unsigned short accum __fractsfuha (float A)
+ -- Runtime Function: unsigned accum __fractsfusa (float A)
+ -- Runtime Function: unsigned long accum __fractsfuda (float A)
+ -- Runtime Function: unsigned long long accum __fractsfuta (float A)
+ -- Runtime Function: short fract __fractdfqq (double A)
+ -- Runtime Function: fract __fractdfhq (double A)
+ -- Runtime Function: long fract __fractdfsq (double A)
+ -- Runtime Function: long long fract __fractdfdq (double A)
+ -- Runtime Function: short accum __fractdfha (double A)
+ -- Runtime Function: accum __fractdfsa (double A)
+ -- Runtime Function: long accum __fractdfda (double A)
+ -- Runtime Function: long long accum __fractdfta (double A)
+ -- Runtime Function: unsigned short fract __fractdfuqq (double A)
+ -- Runtime Function: unsigned fract __fractdfuhq (double A)
+ -- Runtime Function: unsigned long fract __fractdfusq (double A)
+ -- Runtime Function: unsigned long long fract __fractdfudq (double A)
+ -- Runtime Function: unsigned short accum __fractdfuha (double A)
+ -- Runtime Function: unsigned accum __fractdfusa (double A)
+ -- Runtime Function: unsigned long accum __fractdfuda (double A)
+ -- Runtime Function: unsigned long long accum __fractdfuta (double A)
+     These functions convert from fractional and signed non-fractionals
+     to fractionals and signed non-fractionals, without saturation.
+
+ -- Runtime Function: fract __satfractqqhq2 (short fract A)
+ -- Runtime Function: long fract __satfractqqsq2 (short fract A)
+ -- Runtime Function: long long fract __satfractqqdq2 (short fract A)
+ -- Runtime Function: short accum __satfractqqha (short fract A)
+ -- Runtime Function: accum __satfractqqsa (short fract A)
+ -- Runtime Function: long accum __satfractqqda (short fract A)
+ -- Runtime Function: long long accum __satfractqqta (short fract A)
+ -- Runtime Function: unsigned short fract __satfractqquqq (short fract
+          A)
+ -- Runtime Function: unsigned fract __satfractqquhq (short fract A)
+ -- Runtime Function: unsigned long fract __satfractqqusq (short fract
+          A)
+ -- Runtime Function: unsigned long long fract __satfractqqudq (short
+          fract A)
+ -- Runtime Function: unsigned short accum __satfractqquha (short fract
+          A)
+ -- Runtime Function: unsigned accum __satfractqqusa (short fract A)
+ -- Runtime Function: unsigned long accum __satfractqquda (short fract
+          A)
+ -- Runtime Function: unsigned long long accum __satfractqquta (short
+          fract A)
+ -- Runtime Function: short fract __satfracthqqq2 (fract A)
+ -- Runtime Function: long fract __satfracthqsq2 (fract A)
+ -- Runtime Function: long long fract __satfracthqdq2 (fract A)
+ -- Runtime Function: short accum __satfracthqha (fract A)
+ -- Runtime Function: accum __satfracthqsa (fract A)
+ -- Runtime Function: long accum __satfracthqda (fract A)
+ -- Runtime Function: long long accum __satfracthqta (fract A)
+ -- Runtime Function: unsigned short fract __satfracthquqq (fract A)
+ -- Runtime Function: unsigned fract __satfracthquhq (fract A)
+ -- Runtime Function: unsigned long fract __satfracthqusq (fract A)
+ -- Runtime Function: unsigned long long fract __satfracthqudq (fract A)
+ -- Runtime Function: unsigned short accum __satfracthquha (fract A)
+ -- Runtime Function: unsigned accum __satfracthqusa (fract A)
+ -- Runtime Function: unsigned long accum __satfracthquda (fract A)
+ -- Runtime Function: unsigned long long accum __satfracthquta (fract A)
+ -- Runtime Function: short fract __satfractsqqq2 (long fract A)
+ -- Runtime Function: fract __satfractsqhq2 (long fract A)
+ -- Runtime Function: long long fract __satfractsqdq2 (long fract A)
+ -- Runtime Function: short accum __satfractsqha (long fract A)
+ -- Runtime Function: accum __satfractsqsa (long fract A)
+ -- Runtime Function: long accum __satfractsqda (long fract A)
+ -- Runtime Function: long long accum __satfractsqta (long fract A)
+ -- Runtime Function: unsigned short fract __satfractsquqq (long fract
+          A)
+ -- Runtime Function: unsigned fract __satfractsquhq (long fract A)
+ -- Runtime Function: unsigned long fract __satfractsqusq (long fract A)
+ -- Runtime Function: unsigned long long fract __satfractsqudq (long
+          fract A)
+ -- Runtime Function: unsigned short accum __satfractsquha (long fract
+          A)
+ -- Runtime Function: unsigned accum __satfractsqusa (long fract A)
+ -- Runtime Function: unsigned long accum __satfractsquda (long fract A)
+ -- Runtime Function: unsigned long long accum __satfractsquta (long
+          fract A)
+ -- Runtime Function: short fract __satfractdqqq2 (long long fract A)
+ -- Runtime Function: fract __satfractdqhq2 (long long fract A)
+ -- Runtime Function: long fract __satfractdqsq2 (long long fract A)
+ -- Runtime Function: short accum __satfractdqha (long long fract A)
+ -- Runtime Function: accum __satfractdqsa (long long fract A)
+ -- Runtime Function: long accum __satfractdqda (long long fract A)
+ -- Runtime Function: long long accum __satfractdqta (long long fract A)
+ -- Runtime Function: unsigned short fract __satfractdquqq (long long
+          fract A)
+ -- Runtime Function: unsigned fract __satfractdquhq (long long fract A)
+ -- Runtime Function: unsigned long fract __satfractdqusq (long long
+          fract A)
+ -- Runtime Function: unsigned long long fract __satfractdqudq (long
+          long fract A)
+ -- Runtime Function: unsigned short accum __satfractdquha (long long
+          fract A)
+ -- Runtime Function: unsigned accum __satfractdqusa (long long fract A)
+ -- Runtime Function: unsigned long accum __satfractdquda (long long
+          fract A)
+ -- Runtime Function: unsigned long long accum __satfractdquta (long
+          long fract A)
+ -- Runtime Function: short fract __satfracthaqq (short accum A)
+ -- Runtime Function: fract __satfracthahq (short accum A)
+ -- Runtime Function: long fract __satfracthasq (short accum A)
+ -- Runtime Function: long long fract __satfracthadq (short accum A)
+ -- Runtime Function: accum __satfracthasa2 (short accum A)
+ -- Runtime Function: long accum __satfracthada2 (short accum A)
+ -- Runtime Function: long long accum __satfracthata2 (short accum A)
+ -- Runtime Function: unsigned short fract __satfracthauqq (short accum
+          A)
+ -- Runtime Function: unsigned fract __satfracthauhq (short accum A)
+ -- Runtime Function: unsigned long fract __satfracthausq (short accum
+          A)
+ -- Runtime Function: unsigned long long fract __satfracthaudq (short
+          accum A)
+ -- Runtime Function: unsigned short accum __satfracthauha (short accum
+          A)
+ -- Runtime Function: unsigned accum __satfracthausa (short accum A)
+ -- Runtime Function: unsigned long accum __satfracthauda (short accum
+          A)
+ -- Runtime Function: unsigned long long accum __satfracthauta (short
+          accum A)
+ -- Runtime Function: short fract __satfractsaqq (accum A)
+ -- Runtime Function: fract __satfractsahq (accum A)
+ -- Runtime Function: long fract __satfractsasq (accum A)
+ -- Runtime Function: long long fract __satfractsadq (accum A)
+ -- Runtime Function: short accum __satfractsaha2 (accum A)
+ -- Runtime Function: long accum __satfractsada2 (accum A)
+ -- Runtime Function: long long accum __satfractsata2 (accum A)
+ -- Runtime Function: unsigned short fract __satfractsauqq (accum A)
+ -- Runtime Function: unsigned fract __satfractsauhq (accum A)
+ -- Runtime Function: unsigned long fract __satfractsausq (accum A)
+ -- Runtime Function: unsigned long long fract __satfractsaudq (accum A)
+ -- Runtime Function: unsigned short accum __satfractsauha (accum A)
+ -- Runtime Function: unsigned accum __satfractsausa (accum A)
+ -- Runtime Function: unsigned long accum __satfractsauda (accum A)
+ -- Runtime Function: unsigned long long accum __satfractsauta (accum A)
+ -- Runtime Function: short fract __satfractdaqq (long accum A)
+ -- Runtime Function: fract __satfractdahq (long accum A)
+ -- Runtime Function: long fract __satfractdasq (long accum A)
+ -- Runtime Function: long long fract __satfractdadq (long accum A)
+ -- Runtime Function: short accum __satfractdaha2 (long accum A)
+ -- Runtime Function: accum __satfractdasa2 (long accum A)
+ -- Runtime Function: long long accum __satfractdata2 (long accum A)
+ -- Runtime Function: unsigned short fract __satfractdauqq (long accum
+          A)
+ -- Runtime Function: unsigned fract __satfractdauhq (long accum A)
+ -- Runtime Function: unsigned long fract __satfractdausq (long accum A)
+ -- Runtime Function: unsigned long long fract __satfractdaudq (long
+          accum A)
+ -- Runtime Function: unsigned short accum __satfractdauha (long accum
+          A)
+ -- Runtime Function: unsigned accum __satfractdausa (long accum A)
+ -- Runtime Function: unsigned long accum __satfractdauda (long accum A)
+ -- Runtime Function: unsigned long long accum __satfractdauta (long
+          accum A)
+ -- Runtime Function: short fract __satfracttaqq (long long accum A)
+ -- Runtime Function: fract __satfracttahq (long long accum A)
+ -- Runtime Function: long fract __satfracttasq (long long accum A)
+ -- Runtime Function: long long fract __satfracttadq (long long accum A)
+ -- Runtime Function: short accum __satfracttaha2 (long long accum A)
+ -- Runtime Function: accum __satfracttasa2 (long long accum A)
+ -- Runtime Function: long accum __satfracttada2 (long long accum A)
+ -- Runtime Function: unsigned short fract __satfracttauqq (long long
+          accum A)
+ -- Runtime Function: unsigned fract __satfracttauhq (long long accum A)
+ -- Runtime Function: unsigned long fract __satfracttausq (long long
+          accum A)
+ -- Runtime Function: unsigned long long fract __satfracttaudq (long
+          long accum A)
+ -- Runtime Function: unsigned short accum __satfracttauha (long long
+          accum A)
+ -- Runtime Function: unsigned accum __satfracttausa (long long accum A)
+ -- Runtime Function: unsigned long accum __satfracttauda (long long
+          accum A)
+ -- Runtime Function: unsigned long long accum __satfracttauta (long
+          long accum A)
+ -- Runtime Function: short fract __satfractuqqqq (unsigned short fract
+          A)
+ -- Runtime Function: fract __satfractuqqhq (unsigned short fract A)
+ -- Runtime Function: long fract __satfractuqqsq (unsigned short fract
+          A)
+ -- Runtime Function: long long fract __satfractuqqdq (unsigned short
+          fract A)
+ -- Runtime Function: short accum __satfractuqqha (unsigned short fract
+          A)
+ -- Runtime Function: accum __satfractuqqsa (unsigned short fract A)
+ -- Runtime Function: long accum __satfractuqqda (unsigned short fract
+          A)
+ -- Runtime Function: long long accum __satfractuqqta (unsigned short
+          fract A)
+ -- Runtime Function: unsigned fract __satfractuqquhq2 (unsigned short
+          fract A)
+ -- Runtime Function: unsigned long fract __satfractuqqusq2 (unsigned
+          short fract A)
+ -- Runtime Function: unsigned long long fract __satfractuqqudq2
+          (unsigned short fract A)
+ -- Runtime Function: unsigned short accum __satfractuqquha (unsigned
+          short fract A)
+ -- Runtime Function: unsigned accum __satfractuqqusa (unsigned short
+          fract A)
+ -- Runtime Function: unsigned long accum __satfractuqquda (unsigned
+          short fract A)
+ -- Runtime Function: unsigned long long accum __satfractuqquta
+          (unsigned short fract A)
+ -- Runtime Function: short fract __satfractuhqqq (unsigned fract A)
+ -- Runtime Function: fract __satfractuhqhq (unsigned fract A)
+ -- Runtime Function: long fract __satfractuhqsq (unsigned fract A)
+ -- Runtime Function: long long fract __satfractuhqdq (unsigned fract A)
+ -- Runtime Function: short accum __satfractuhqha (unsigned fract A)
+ -- Runtime Function: accum __satfractuhqsa (unsigned fract A)
+ -- Runtime Function: long accum __satfractuhqda (unsigned fract A)
+ -- Runtime Function: long long accum __satfractuhqta (unsigned fract A)
+ -- Runtime Function: unsigned short fract __satfractuhquqq2 (unsigned
+          fract A)
+ -- Runtime Function: unsigned long fract __satfractuhqusq2 (unsigned
+          fract A)
+ -- Runtime Function: unsigned long long fract __satfractuhqudq2
+          (unsigned fract A)
+ -- Runtime Function: unsigned short accum __satfractuhquha (unsigned
+          fract A)
+ -- Runtime Function: unsigned accum __satfractuhqusa (unsigned fract A)
+ -- Runtime Function: unsigned long accum __satfractuhquda (unsigned
+          fract A)
+ -- Runtime Function: unsigned long long accum __satfractuhquta
+          (unsigned fract A)
+ -- Runtime Function: short fract __satfractusqqq (unsigned long fract
+          A)
+ -- Runtime Function: fract __satfractusqhq (unsigned long fract A)
+ -- Runtime Function: long fract __satfractusqsq (unsigned long fract A)
+ -- Runtime Function: long long fract __satfractusqdq (unsigned long
+          fract A)
+ -- Runtime Function: short accum __satfractusqha (unsigned long fract
+          A)
+ -- Runtime Function: accum __satfractusqsa (unsigned long fract A)
+ -- Runtime Function: long accum __satfractusqda (unsigned long fract A)
+ -- Runtime Function: long long accum __satfractusqta (unsigned long
+          fract A)
+ -- Runtime Function: unsigned short fract __satfractusquqq2 (unsigned
+          long fract A)
+ -- Runtime Function: unsigned fract __satfractusquhq2 (unsigned long
+          fract A)
+ -- Runtime Function: unsigned long long fract __satfractusqudq2
+          (unsigned long fract A)
+ -- Runtime Function: unsigned short accum __satfractusquha (unsigned
+          long fract A)
+ -- Runtime Function: unsigned accum __satfractusqusa (unsigned long
+          fract A)
+ -- Runtime Function: unsigned long accum __satfractusquda (unsigned
+          long fract A)
+ -- Runtime Function: unsigned long long accum __satfractusquta
+          (unsigned long fract A)
+ -- Runtime Function: short fract __satfractudqqq (unsigned long long
+          fract A)
+ -- Runtime Function: fract __satfractudqhq (unsigned long long fract A)
+ -- Runtime Function: long fract __satfractudqsq (unsigned long long
+          fract A)
+ -- Runtime Function: long long fract __satfractudqdq (unsigned long
+          long fract A)
+ -- Runtime Function: short accum __satfractudqha (unsigned long long
+          fract A)
+ -- Runtime Function: accum __satfractudqsa (unsigned long long fract A)
+ -- Runtime Function: long accum __satfractudqda (unsigned long long
+          fract A)
+ -- Runtime Function: long long accum __satfractudqta (unsigned long
+          long fract A)
+ -- Runtime Function: unsigned short fract __satfractudquqq2 (unsigned
+          long long fract A)
+ -- Runtime Function: unsigned fract __satfractudquhq2 (unsigned long
+          long fract A)
+ -- Runtime Function: unsigned long fract __satfractudqusq2 (unsigned
+          long long fract A)
+ -- Runtime Function: unsigned short accum __satfractudquha (unsigned
+          long long fract A)
+ -- Runtime Function: unsigned accum __satfractudqusa (unsigned long
+          long fract A)
+ -- Runtime Function: unsigned long accum __satfractudquda (unsigned
+          long long fract A)
+ -- Runtime Function: unsigned long long accum __satfractudquta
+          (unsigned long long fract A)
+ -- Runtime Function: short fract __satfractuhaqq (unsigned short accum
+          A)
+ -- Runtime Function: fract __satfractuhahq (unsigned short accum A)
+ -- Runtime Function: long fract __satfractuhasq (unsigned short accum
+          A)
+ -- Runtime Function: long long fract __satfractuhadq (unsigned short
+          accum A)
+ -- Runtime Function: short accum __satfractuhaha (unsigned short accum
+          A)
+ -- Runtime Function: accum __satfractuhasa (unsigned short accum A)
+ -- Runtime Function: long accum __satfractuhada (unsigned short accum
+          A)
+ -- Runtime Function: long long accum __satfractuhata (unsigned short
+          accum A)
+ -- Runtime Function: unsigned short fract __satfractuhauqq (unsigned
+          short accum A)
+ -- Runtime Function: unsigned fract __satfractuhauhq (unsigned short
+          accum A)
+ -- Runtime Function: unsigned long fract __satfractuhausq (unsigned
+          short accum A)
+ -- Runtime Function: unsigned long long fract __satfractuhaudq
+          (unsigned short accum A)
+ -- Runtime Function: unsigned accum __satfractuhausa2 (unsigned short
+          accum A)
+ -- Runtime Function: unsigned long accum __satfractuhauda2 (unsigned
+          short accum A)
+ -- Runtime Function: unsigned long long accum __satfractuhauta2
+          (unsigned short accum A)
+ -- Runtime Function: short fract __satfractusaqq (unsigned accum A)
+ -- Runtime Function: fract __satfractusahq (unsigned accum A)
+ -- Runtime Function: long fract __satfractusasq (unsigned accum A)
+ -- Runtime Function: long long fract __satfractusadq (unsigned accum A)
+ -- Runtime Function: short accum __satfractusaha (unsigned accum A)
+ -- Runtime Function: accum __satfractusasa (unsigned accum A)
+ -- Runtime Function: long accum __satfractusada (unsigned accum A)
+ -- Runtime Function: long long accum __satfractusata (unsigned accum A)
+ -- Runtime Function: unsigned short fract __satfractusauqq (unsigned
+          accum A)
+ -- Runtime Function: unsigned fract __satfractusauhq (unsigned accum A)
+ -- Runtime Function: unsigned long fract __satfractusausq (unsigned
+          accum A)
+ -- Runtime Function: unsigned long long fract __satfractusaudq
+          (unsigned accum A)
+ -- Runtime Function: unsigned short accum __satfractusauha2 (unsigned
+          accum A)
+ -- Runtime Function: unsigned long accum __satfractusauda2 (unsigned
+          accum A)
+ -- Runtime Function: unsigned long long accum __satfractusauta2
+          (unsigned accum A)
+ -- Runtime Function: short fract __satfractudaqq (unsigned long accum
+          A)
+ -- Runtime Function: fract __satfractudahq (unsigned long accum A)
+ -- Runtime Function: long fract __satfractudasq (unsigned long accum A)
+ -- Runtime Function: long long fract __satfractudadq (unsigned long
+          accum A)
+ -- Runtime Function: short accum __satfractudaha (unsigned long accum
+          A)
+ -- Runtime Function: accum __satfractudasa (unsigned long accum A)
+ -- Runtime Function: long accum __satfractudada (unsigned long accum A)
+ -- Runtime Function: long long accum __satfractudata (unsigned long
+          accum A)
+ -- Runtime Function: unsigned short fract __satfractudauqq (unsigned
+          long accum A)
+ -- Runtime Function: unsigned fract __satfractudauhq (unsigned long
+          accum A)
+ -- Runtime Function: unsigned long fract __satfractudausq (unsigned
+          long accum A)
+ -- Runtime Function: unsigned long long fract __satfractudaudq
+          (unsigned long accum A)
+ -- Runtime Function: unsigned short accum __satfractudauha2 (unsigned
+          long accum A)
+ -- Runtime Function: unsigned accum __satfractudausa2 (unsigned long
+          accum A)
+ -- Runtime Function: unsigned long long accum __satfractudauta2
+          (unsigned long accum A)
+ -- Runtime Function: short fract __satfractutaqq (unsigned long long
+          accum A)
+ -- Runtime Function: fract __satfractutahq (unsigned long long accum A)
+ -- Runtime Function: long fract __satfractutasq (unsigned long long
+          accum A)
+ -- Runtime Function: long long fract __satfractutadq (unsigned long
+          long accum A)
+ -- Runtime Function: short accum __satfractutaha (unsigned long long
+          accum A)
+ -- Runtime Function: accum __satfractutasa (unsigned long long accum A)
+ -- Runtime Function: long accum __satfractutada (unsigned long long
+          accum A)
+ -- Runtime Function: long long accum __satfractutata (unsigned long
+          long accum A)
+ -- Runtime Function: unsigned short fract __satfractutauqq (unsigned
+          long long accum A)
+ -- Runtime Function: unsigned fract __satfractutauhq (unsigned long
+          long accum A)
+ -- Runtime Function: unsigned long fract __satfractutausq (unsigned
+          long long accum A)
+ -- Runtime Function: unsigned long long fract __satfractutaudq
+          (unsigned long long accum A)
+ -- Runtime Function: unsigned short accum __satfractutauha2 (unsigned
+          long long accum A)
+ -- Runtime Function: unsigned accum __satfractutausa2 (unsigned long
+          long accum A)
+ -- Runtime Function: unsigned long accum __satfractutauda2 (unsigned
+          long long accum A)
+ -- Runtime Function: short fract __satfractqiqq (signed char A)
+ -- Runtime Function: fract __satfractqihq (signed char A)
+ -- Runtime Function: long fract __satfractqisq (signed char A)
+ -- Runtime Function: long long fract __satfractqidq (signed char A)
+ -- Runtime Function: short accum __satfractqiha (signed char A)
+ -- Runtime Function: accum __satfractqisa (signed char A)
+ -- Runtime Function: long accum __satfractqida (signed char A)
+ -- Runtime Function: long long accum __satfractqita (signed char A)
+ -- Runtime Function: unsigned short fract __satfractqiuqq (signed char
+          A)
+ -- Runtime Function: unsigned fract __satfractqiuhq (signed char A)
+ -- Runtime Function: unsigned long fract __satfractqiusq (signed char
+          A)
+ -- Runtime Function: unsigned long long fract __satfractqiudq (signed
+          char A)
+ -- Runtime Function: unsigned short accum __satfractqiuha (signed char
+          A)
+ -- Runtime Function: unsigned accum __satfractqiusa (signed char A)
+ -- Runtime Function: unsigned long accum __satfractqiuda (signed char
+          A)
+ -- Runtime Function: unsigned long long accum __satfractqiuta (signed
+          char A)
+ -- Runtime Function: short fract __satfracthiqq (short A)
+ -- Runtime Function: fract __satfracthihq (short A)
+ -- Runtime Function: long fract __satfracthisq (short A)
+ -- Runtime Function: long long fract __satfracthidq (short A)
+ -- Runtime Function: short accum __satfracthiha (short A)
+ -- Runtime Function: accum __satfracthisa (short A)
+ -- Runtime Function: long accum __satfracthida (short A)
+ -- Runtime Function: long long accum __satfracthita (short A)
+ -- Runtime Function: unsigned short fract __satfracthiuqq (short A)
+ -- Runtime Function: unsigned fract __satfracthiuhq (short A)
+ -- Runtime Function: unsigned long fract __satfracthiusq (short A)
+ -- Runtime Function: unsigned long long fract __satfracthiudq (short A)
+ -- Runtime Function: unsigned short accum __satfracthiuha (short A)
+ -- Runtime Function: unsigned accum __satfracthiusa (short A)
+ -- Runtime Function: unsigned long accum __satfracthiuda (short A)
+ -- Runtime Function: unsigned long long accum __satfracthiuta (short A)
+ -- Runtime Function: short fract __satfractsiqq (int A)
+ -- Runtime Function: fract __satfractsihq (int A)
+ -- Runtime Function: long fract __satfractsisq (int A)
+ -- Runtime Function: long long fract __satfractsidq (int A)
+ -- Runtime Function: short accum __satfractsiha (int A)
+ -- Runtime Function: accum __satfractsisa (int A)
+ -- Runtime Function: long accum __satfractsida (int A)
+ -- Runtime Function: long long accum __satfractsita (int A)
+ -- Runtime Function: unsigned short fract __satfractsiuqq (int A)
+ -- Runtime Function: unsigned fract __satfractsiuhq (int A)
+ -- Runtime Function: unsigned long fract __satfractsiusq (int A)
+ -- Runtime Function: unsigned long long fract __satfractsiudq (int A)
+ -- Runtime Function: unsigned short accum __satfractsiuha (int A)
+ -- Runtime Function: unsigned accum __satfractsiusa (int A)
+ -- Runtime Function: unsigned long accum __satfractsiuda (int A)
+ -- Runtime Function: unsigned long long accum __satfractsiuta (int A)
+ -- Runtime Function: short fract __satfractdiqq (long A)
+ -- Runtime Function: fract __satfractdihq (long A)
+ -- Runtime Function: long fract __satfractdisq (long A)
+ -- Runtime Function: long long fract __satfractdidq (long A)
+ -- Runtime Function: short accum __satfractdiha (long A)
+ -- Runtime Function: accum __satfractdisa (long A)
+ -- Runtime Function: long accum __satfractdida (long A)
+ -- Runtime Function: long long accum __satfractdita (long A)
+ -- Runtime Function: unsigned short fract __satfractdiuqq (long A)
+ -- Runtime Function: unsigned fract __satfractdiuhq (long A)
+ -- Runtime Function: unsigned long fract __satfractdiusq (long A)
+ -- Runtime Function: unsigned long long fract __satfractdiudq (long A)
+ -- Runtime Function: unsigned short accum __satfractdiuha (long A)
+ -- Runtime Function: unsigned accum __satfractdiusa (long A)
+ -- Runtime Function: unsigned long accum __satfractdiuda (long A)
+ -- Runtime Function: unsigned long long accum __satfractdiuta (long A)
+ -- Runtime Function: short fract __satfracttiqq (long long A)
+ -- Runtime Function: fract __satfracttihq (long long A)
+ -- Runtime Function: long fract __satfracttisq (long long A)
+ -- Runtime Function: long long fract __satfracttidq (long long A)
+ -- Runtime Function: short accum __satfracttiha (long long A)
+ -- Runtime Function: accum __satfracttisa (long long A)
+ -- Runtime Function: long accum __satfracttida (long long A)
+ -- Runtime Function: long long accum __satfracttita (long long A)
+ -- Runtime Function: unsigned short fract __satfracttiuqq (long long A)
+ -- Runtime Function: unsigned fract __satfracttiuhq (long long A)
+ -- Runtime Function: unsigned long fract __satfracttiusq (long long A)
+ -- Runtime Function: unsigned long long fract __satfracttiudq (long
+          long A)
+ -- Runtime Function: unsigned short accum __satfracttiuha (long long A)
+ -- Runtime Function: unsigned accum __satfracttiusa (long long A)
+ -- Runtime Function: unsigned long accum __satfracttiuda (long long A)
+ -- Runtime Function: unsigned long long accum __satfracttiuta (long
+          long A)
+ -- Runtime Function: short fract __satfractsfqq (float A)
+ -- Runtime Function: fract __satfractsfhq (float A)
+ -- Runtime Function: long fract __satfractsfsq (float A)
+ -- Runtime Function: long long fract __satfractsfdq (float A)
+ -- Runtime Function: short accum __satfractsfha (float A)
+ -- Runtime Function: accum __satfractsfsa (float A)
+ -- Runtime Function: long accum __satfractsfda (float A)
+ -- Runtime Function: long long accum __satfractsfta (float A)
+ -- Runtime Function: unsigned short fract __satfractsfuqq (float A)
+ -- Runtime Function: unsigned fract __satfractsfuhq (float A)
+ -- Runtime Function: unsigned long fract __satfractsfusq (float A)
+ -- Runtime Function: unsigned long long fract __satfractsfudq (float A)
+ -- Runtime Function: unsigned short accum __satfractsfuha (float A)
+ -- Runtime Function: unsigned accum __satfractsfusa (float A)
+ -- Runtime Function: unsigned long accum __satfractsfuda (float A)
+ -- Runtime Function: unsigned long long accum __satfractsfuta (float A)
+ -- Runtime Function: short fract __satfractdfqq (double A)
+ -- Runtime Function: fract __satfractdfhq (double A)
+ -- Runtime Function: long fract __satfractdfsq (double A)
+ -- Runtime Function: long long fract __satfractdfdq (double A)
+ -- Runtime Function: short accum __satfractdfha (double A)
+ -- Runtime Function: accum __satfractdfsa (double A)
+ -- Runtime Function: long accum __satfractdfda (double A)
+ -- Runtime Function: long long accum __satfractdfta (double A)
+ -- Runtime Function: unsigned short fract __satfractdfuqq (double A)
+ -- Runtime Function: unsigned fract __satfractdfuhq (double A)
+ -- Runtime Function: unsigned long fract __satfractdfusq (double A)
+ -- Runtime Function: unsigned long long fract __satfractdfudq (double
+          A)
+ -- Runtime Function: unsigned short accum __satfractdfuha (double A)
+ -- Runtime Function: unsigned accum __satfractdfusa (double A)
+ -- Runtime Function: unsigned long accum __satfractdfuda (double A)
+ -- Runtime Function: unsigned long long accum __satfractdfuta (double
+          A)
+     The functions convert from fractional and signed non-fractionals to
+     fractionals, with saturation.
+
+ -- Runtime Function: unsigned char __fractunsqqqi (short fract A)
+ -- Runtime Function: unsigned short __fractunsqqhi (short fract A)
+ -- Runtime Function: unsigned int __fractunsqqsi (short fract A)
+ -- Runtime Function: unsigned long __fractunsqqdi (short fract A)
+ -- Runtime Function: unsigned long long __fractunsqqti (short fract A)
+ -- Runtime Function: unsigned char __fractunshqqi (fract A)
+ -- Runtime Function: unsigned short __fractunshqhi (fract A)
+ -- Runtime Function: unsigned int __fractunshqsi (fract A)
+ -- Runtime Function: unsigned long __fractunshqdi (fract A)
+ -- Runtime Function: unsigned long long __fractunshqti (fract A)
+ -- Runtime Function: unsigned char __fractunssqqi (long fract A)
+ -- Runtime Function: unsigned short __fractunssqhi (long fract A)
+ -- Runtime Function: unsigned int __fractunssqsi (long fract A)
+ -- Runtime Function: unsigned long __fractunssqdi (long fract A)
+ -- Runtime Function: unsigned long long __fractunssqti (long fract A)
+ -- Runtime Function: unsigned char __fractunsdqqi (long long fract A)
+ -- Runtime Function: unsigned short __fractunsdqhi (long long fract A)
+ -- Runtime Function: unsigned int __fractunsdqsi (long long fract A)
+ -- Runtime Function: unsigned long __fractunsdqdi (long long fract A)
+ -- Runtime Function: unsigned long long __fractunsdqti (long long
+          fract A)
+ -- Runtime Function: unsigned char __fractunshaqi (short accum A)
+ -- Runtime Function: unsigned short __fractunshahi (short accum A)
+ -- Runtime Function: unsigned int __fractunshasi (short accum A)
+ -- Runtime Function: unsigned long __fractunshadi (short accum A)
+ -- Runtime Function: unsigned long long __fractunshati (short accum A)
+ -- Runtime Function: unsigned char __fractunssaqi (accum A)
+ -- Runtime Function: unsigned short __fractunssahi (accum A)
+ -- Runtime Function: unsigned int __fractunssasi (accum A)
+ -- Runtime Function: unsigned long __fractunssadi (accum A)
+ -- Runtime Function: unsigned long long __fractunssati (accum A)
+ -- Runtime Function: unsigned char __fractunsdaqi (long accum A)
+ -- Runtime Function: unsigned short __fractunsdahi (long accum A)
+ -- Runtime Function: unsigned int __fractunsdasi (long accum A)
+ -- Runtime Function: unsigned long __fractunsdadi (long accum A)
+ -- Runtime Function: unsigned long long __fractunsdati (long accum A)
+ -- Runtime Function: unsigned char __fractunstaqi (long long accum A)
+ -- Runtime Function: unsigned short __fractunstahi (long long accum A)
+ -- Runtime Function: unsigned int __fractunstasi (long long accum A)
+ -- Runtime Function: unsigned long __fractunstadi (long long accum A)
+ -- Runtime Function: unsigned long long __fractunstati (long long
+          accum A)
+ -- Runtime Function: unsigned char __fractunsuqqqi (unsigned short
+          fract A)
+ -- Runtime Function: unsigned short __fractunsuqqhi (unsigned short
+          fract A)
+ -- Runtime Function: unsigned int __fractunsuqqsi (unsigned short
+          fract A)
+ -- Runtime Function: unsigned long __fractunsuqqdi (unsigned short
+          fract A)
+ -- Runtime Function: unsigned long long __fractunsuqqti (unsigned
+          short fract A)
+ -- Runtime Function: unsigned char __fractunsuhqqi (unsigned fract A)
+ -- Runtime Function: unsigned short __fractunsuhqhi (unsigned fract A)
+ -- Runtime Function: unsigned int __fractunsuhqsi (unsigned fract A)
+ -- Runtime Function: unsigned long __fractunsuhqdi (unsigned fract A)
+ -- Runtime Function: unsigned long long __fractunsuhqti (unsigned
+          fract A)
+ -- Runtime Function: unsigned char __fractunsusqqi (unsigned long
+          fract A)
+ -- Runtime Function: unsigned short __fractunsusqhi (unsigned long
+          fract A)
+ -- Runtime Function: unsigned int __fractunsusqsi (unsigned long fract
+          A)
+ -- Runtime Function: unsigned long __fractunsusqdi (unsigned long
+          fract A)
+ -- Runtime Function: unsigned long long __fractunsusqti (unsigned long
+          fract A)
+ -- Runtime Function: unsigned char __fractunsudqqi (unsigned long long
+          fract A)
+ -- Runtime Function: unsigned short __fractunsudqhi (unsigned long
+          long fract A)
+ -- Runtime Function: unsigned int __fractunsudqsi (unsigned long long
+          fract A)
+ -- Runtime Function: unsigned long __fractunsudqdi (unsigned long long
+          fract A)
+ -- Runtime Function: unsigned long long __fractunsudqti (unsigned long
+          long fract A)
+ -- Runtime Function: unsigned char __fractunsuhaqi (unsigned short
+          accum A)
+ -- Runtime Function: unsigned short __fractunsuhahi (unsigned short
+          accum A)
+ -- Runtime Function: unsigned int __fractunsuhasi (unsigned short
+          accum A)
+ -- Runtime Function: unsigned long __fractunsuhadi (unsigned short
+          accum A)
+ -- Runtime Function: unsigned long long __fractunsuhati (unsigned
+          short accum A)
+ -- Runtime Function: unsigned char __fractunsusaqi (unsigned accum A)
+ -- Runtime Function: unsigned short __fractunsusahi (unsigned accum A)
+ -- Runtime Function: unsigned int __fractunsusasi (unsigned accum A)
+ -- Runtime Function: unsigned long __fractunsusadi (unsigned accum A)
+ -- Runtime Function: unsigned long long __fractunsusati (unsigned
+          accum A)
+ -- Runtime Function: unsigned char __fractunsudaqi (unsigned long
+          accum A)
+ -- Runtime Function: unsigned short __fractunsudahi (unsigned long
+          accum A)
+ -- Runtime Function: unsigned int __fractunsudasi (unsigned long accum
+          A)
+ -- Runtime Function: unsigned long __fractunsudadi (unsigned long
+          accum A)
+ -- Runtime Function: unsigned long long __fractunsudati (unsigned long
+          accum A)
+ -- Runtime Function: unsigned char __fractunsutaqi (unsigned long long
+          accum A)
+ -- Runtime Function: unsigned short __fractunsutahi (unsigned long
+          long accum A)
+ -- Runtime Function: unsigned int __fractunsutasi (unsigned long long
+          accum A)
+ -- Runtime Function: unsigned long __fractunsutadi (unsigned long long
+          accum A)
+ -- Runtime Function: unsigned long long __fractunsutati (unsigned long
+          long accum A)
+ -- Runtime Function: short fract __fractunsqiqq (unsigned char A)
+ -- Runtime Function: fract __fractunsqihq (unsigned char A)
+ -- Runtime Function: long fract __fractunsqisq (unsigned char A)
+ -- Runtime Function: long long fract __fractunsqidq (unsigned char A)
+ -- Runtime Function: short accum __fractunsqiha (unsigned char A)
+ -- Runtime Function: accum __fractunsqisa (unsigned char A)
+ -- Runtime Function: long accum __fractunsqida (unsigned char A)
+ -- Runtime Function: long long accum __fractunsqita (unsigned char A)
+ -- Runtime Function: unsigned short fract __fractunsqiuqq (unsigned
+          char A)
+ -- Runtime Function: unsigned fract __fractunsqiuhq (unsigned char A)
+ -- Runtime Function: unsigned long fract __fractunsqiusq (unsigned
+          char A)
+ -- Runtime Function: unsigned long long fract __fractunsqiudq
+          (unsigned char A)
+ -- Runtime Function: unsigned short accum __fractunsqiuha (unsigned
+          char A)
+ -- Runtime Function: unsigned accum __fractunsqiusa (unsigned char A)
+ -- Runtime Function: unsigned long accum __fractunsqiuda (unsigned
+          char A)
+ -- Runtime Function: unsigned long long accum __fractunsqiuta
+          (unsigned char A)
+ -- Runtime Function: short fract __fractunshiqq (unsigned short A)
+ -- Runtime Function: fract __fractunshihq (unsigned short A)
+ -- Runtime Function: long fract __fractunshisq (unsigned short A)
+ -- Runtime Function: long long fract __fractunshidq (unsigned short A)
+ -- Runtime Function: short accum __fractunshiha (unsigned short A)
+ -- Runtime Function: accum __fractunshisa (unsigned short A)
+ -- Runtime Function: long accum __fractunshida (unsigned short A)
+ -- Runtime Function: long long accum __fractunshita (unsigned short A)
+ -- Runtime Function: unsigned short fract __fractunshiuqq (unsigned
+          short A)
+ -- Runtime Function: unsigned fract __fractunshiuhq (unsigned short A)
+ -- Runtime Function: unsigned long fract __fractunshiusq (unsigned
+          short A)
+ -- Runtime Function: unsigned long long fract __fractunshiudq
+          (unsigned short A)
+ -- Runtime Function: unsigned short accum __fractunshiuha (unsigned
+          short A)
+ -- Runtime Function: unsigned accum __fractunshiusa (unsigned short A)
+ -- Runtime Function: unsigned long accum __fractunshiuda (unsigned
+          short A)
+ -- Runtime Function: unsigned long long accum __fractunshiuta
+          (unsigned short A)
+ -- Runtime Function: short fract __fractunssiqq (unsigned int A)
+ -- Runtime Function: fract __fractunssihq (unsigned int A)
+ -- Runtime Function: long fract __fractunssisq (unsigned int A)
+ -- Runtime Function: long long fract __fractunssidq (unsigned int A)
+ -- Runtime Function: short accum __fractunssiha (unsigned int A)
+ -- Runtime Function: accum __fractunssisa (unsigned int A)
+ -- Runtime Function: long accum __fractunssida (unsigned int A)
+ -- Runtime Function: long long accum __fractunssita (unsigned int A)
+ -- Runtime Function: unsigned short fract __fractunssiuqq (unsigned
+          int A)
+ -- Runtime Function: unsigned fract __fractunssiuhq (unsigned int A)
+ -- Runtime Function: unsigned long fract __fractunssiusq (unsigned int
+          A)
+ -- Runtime Function: unsigned long long fract __fractunssiudq
+          (unsigned int A)
+ -- Runtime Function: unsigned short accum __fractunssiuha (unsigned
+          int A)
+ -- Runtime Function: unsigned accum __fractunssiusa (unsigned int A)
+ -- Runtime Function: unsigned long accum __fractunssiuda (unsigned int
+          A)
+ -- Runtime Function: unsigned long long accum __fractunssiuta
+          (unsigned int A)
+ -- Runtime Function: short fract __fractunsdiqq (unsigned long A)
+ -- Runtime Function: fract __fractunsdihq (unsigned long A)
+ -- Runtime Function: long fract __fractunsdisq (unsigned long A)
+ -- Runtime Function: long long fract __fractunsdidq (unsigned long A)
+ -- Runtime Function: short accum __fractunsdiha (unsigned long A)
+ -- Runtime Function: accum __fractunsdisa (unsigned long A)
+ -- Runtime Function: long accum __fractunsdida (unsigned long A)
+ -- Runtime Function: long long accum __fractunsdita (unsigned long A)
+ -- Runtime Function: unsigned short fract __fractunsdiuqq (unsigned
+          long A)
+ -- Runtime Function: unsigned fract __fractunsdiuhq (unsigned long A)
+ -- Runtime Function: unsigned long fract __fractunsdiusq (unsigned
+          long A)
+ -- Runtime Function: unsigned long long fract __fractunsdiudq
+          (unsigned long A)
+ -- Runtime Function: unsigned short accum __fractunsdiuha (unsigned
+          long A)
+ -- Runtime Function: unsigned accum __fractunsdiusa (unsigned long A)
+ -- Runtime Function: unsigned long accum __fractunsdiuda (unsigned
+          long A)
+ -- Runtime Function: unsigned long long accum __fractunsdiuta
+          (unsigned long A)
+ -- Runtime Function: short fract __fractunstiqq (unsigned long long A)
+ -- Runtime Function: fract __fractunstihq (unsigned long long A)
+ -- Runtime Function: long fract __fractunstisq (unsigned long long A)
+ -- Runtime Function: long long fract __fractunstidq (unsigned long
+          long A)
+ -- Runtime Function: short accum __fractunstiha (unsigned long long A)
+ -- Runtime Function: accum __fractunstisa (unsigned long long A)
+ -- Runtime Function: long accum __fractunstida (unsigned long long A)
+ -- Runtime Function: long long accum __fractunstita (unsigned long
+          long A)
+ -- Runtime Function: unsigned short fract __fractunstiuqq (unsigned
+          long long A)
+ -- Runtime Function: unsigned fract __fractunstiuhq (unsigned long
+          long A)
+ -- Runtime Function: unsigned long fract __fractunstiusq (unsigned
+          long long A)
+ -- Runtime Function: unsigned long long fract __fractunstiudq
+          (unsigned long long A)
+ -- Runtime Function: unsigned short accum __fractunstiuha (unsigned
+          long long A)
+ -- Runtime Function: unsigned accum __fractunstiusa (unsigned long
+          long A)
+ -- Runtime Function: unsigned long accum __fractunstiuda (unsigned
+          long long A)
+ -- Runtime Function: unsigned long long accum __fractunstiuta
+          (unsigned long long A)
+     These functions convert from fractionals to unsigned
+     non-fractionals; and from unsigned non-fractionals to fractionals,
+     without saturation.
+
+ -- Runtime Function: short fract __satfractunsqiqq (unsigned char A)
+ -- Runtime Function: fract __satfractunsqihq (unsigned char A)
+ -- Runtime Function: long fract __satfractunsqisq (unsigned char A)
+ -- Runtime Function: long long fract __satfractunsqidq (unsigned char
+          A)
+ -- Runtime Function: short accum __satfractunsqiha (unsigned char A)
+ -- Runtime Function: accum __satfractunsqisa (unsigned char A)
+ -- Runtime Function: long accum __satfractunsqida (unsigned char A)
+ -- Runtime Function: long long accum __satfractunsqita (unsigned char
+          A)
+ -- Runtime Function: unsigned short fract __satfractunsqiuqq (unsigned
+          char A)
+ -- Runtime Function: unsigned fract __satfractunsqiuhq (unsigned char
+          A)
+ -- Runtime Function: unsigned long fract __satfractunsqiusq (unsigned
+          char A)
+ -- Runtime Function: unsigned long long fract __satfractunsqiudq
+          (unsigned char A)
+ -- Runtime Function: unsigned short accum __satfractunsqiuha (unsigned
+          char A)
+ -- Runtime Function: unsigned accum __satfractunsqiusa (unsigned char
+          A)
+ -- Runtime Function: unsigned long accum __satfractunsqiuda (unsigned
+          char A)
+ -- Runtime Function: unsigned long long accum __satfractunsqiuta
+          (unsigned char A)
+ -- Runtime Function: short fract __satfractunshiqq (unsigned short A)
+ -- Runtime Function: fract __satfractunshihq (unsigned short A)
+ -- Runtime Function: long fract __satfractunshisq (unsigned short A)
+ -- Runtime Function: long long fract __satfractunshidq (unsigned short
+          A)
+ -- Runtime Function: short accum __satfractunshiha (unsigned short A)
+ -- Runtime Function: accum __satfractunshisa (unsigned short A)
+ -- Runtime Function: long accum __satfractunshida (unsigned short A)
+ -- Runtime Function: long long accum __satfractunshita (unsigned short
+          A)
+ -- Runtime Function: unsigned short fract __satfractunshiuqq (unsigned
+          short A)
+ -- Runtime Function: unsigned fract __satfractunshiuhq (unsigned short
+          A)
+ -- Runtime Function: unsigned long fract __satfractunshiusq (unsigned
+          short A)
+ -- Runtime Function: unsigned long long fract __satfractunshiudq
+          (unsigned short A)
+ -- Runtime Function: unsigned short accum __satfractunshiuha (unsigned
+          short A)
+ -- Runtime Function: unsigned accum __satfractunshiusa (unsigned short
+          A)
+ -- Runtime Function: unsigned long accum __satfractunshiuda (unsigned
+          short A)
+ -- Runtime Function: unsigned long long accum __satfractunshiuta
+          (unsigned short A)
+ -- Runtime Function: short fract __satfractunssiqq (unsigned int A)
+ -- Runtime Function: fract __satfractunssihq (unsigned int A)
+ -- Runtime Function: long fract __satfractunssisq (unsigned int A)
+ -- Runtime Function: long long fract __satfractunssidq (unsigned int A)
+ -- Runtime Function: short accum __satfractunssiha (unsigned int A)
+ -- Runtime Function: accum __satfractunssisa (unsigned int A)
+ -- Runtime Function: long accum __satfractunssida (unsigned int A)
+ -- Runtime Function: long long accum __satfractunssita (unsigned int A)
+ -- Runtime Function: unsigned short fract __satfractunssiuqq (unsigned
+          int A)
+ -- Runtime Function: unsigned fract __satfractunssiuhq (unsigned int A)
+ -- Runtime Function: unsigned long fract __satfractunssiusq (unsigned
+          int A)
+ -- Runtime Function: unsigned long long fract __satfractunssiudq
+          (unsigned int A)
+ -- Runtime Function: unsigned short accum __satfractunssiuha (unsigned
+          int A)
+ -- Runtime Function: unsigned accum __satfractunssiusa (unsigned int A)
+ -- Runtime Function: unsigned long accum __satfractunssiuda (unsigned
+          int A)
+ -- Runtime Function: unsigned long long accum __satfractunssiuta
+          (unsigned int A)
+ -- Runtime Function: short fract __satfractunsdiqq (unsigned long A)
+ -- Runtime Function: fract __satfractunsdihq (unsigned long A)
+ -- Runtime Function: long fract __satfractunsdisq (unsigned long A)
+ -- Runtime Function: long long fract __satfractunsdidq (unsigned long
+          A)
+ -- Runtime Function: short accum __satfractunsdiha (unsigned long A)
+ -- Runtime Function: accum __satfractunsdisa (unsigned long A)
+ -- Runtime Function: long accum __satfractunsdida (unsigned long A)
+ -- Runtime Function: long long accum __satfractunsdita (unsigned long
+          A)
+ -- Runtime Function: unsigned short fract __satfractunsdiuqq (unsigned
+          long A)
+ -- Runtime Function: unsigned fract __satfractunsdiuhq (unsigned long
+          A)
+ -- Runtime Function: unsigned long fract __satfractunsdiusq (unsigned
+          long A)
+ -- Runtime Function: unsigned long long fract __satfractunsdiudq
+          (unsigned long A)
+ -- Runtime Function: unsigned short accum __satfractunsdiuha (unsigned
+          long A)
+ -- Runtime Function: unsigned accum __satfractunsdiusa (unsigned long
+          A)
+ -- Runtime Function: unsigned long accum __satfractunsdiuda (unsigned
+          long A)
+ -- Runtime Function: unsigned long long accum __satfractunsdiuta
+          (unsigned long A)
+ -- Runtime Function: short fract __satfractunstiqq (unsigned long long
+          A)
+ -- Runtime Function: fract __satfractunstihq (unsigned long long A)
+ -- Runtime Function: long fract __satfractunstisq (unsigned long long
+          A)
+ -- Runtime Function: long long fract __satfractunstidq (unsigned long
+          long A)
+ -- Runtime Function: short accum __satfractunstiha (unsigned long long
+          A)
+ -- Runtime Function: accum __satfractunstisa (unsigned long long A)
+ -- Runtime Function: long accum __satfractunstida (unsigned long long
+          A)
+ -- Runtime Function: long long accum __satfractunstita (unsigned long
+          long A)
+ -- Runtime Function: unsigned short fract __satfractunstiuqq (unsigned
+          long long A)
+ -- Runtime Function: unsigned fract __satfractunstiuhq (unsigned long
+          long A)
+ -- Runtime Function: unsigned long fract __satfractunstiusq (unsigned
+          long long A)
+ -- Runtime Function: unsigned long long fract __satfractunstiudq
+          (unsigned long long A)
+ -- Runtime Function: unsigned short accum __satfractunstiuha (unsigned
+          long long A)
+ -- Runtime Function: unsigned accum __satfractunstiusa (unsigned long
+          long A)
+ -- Runtime Function: unsigned long accum __satfractunstiuda (unsigned
+          long long A)
+ -- Runtime Function: unsigned long long accum __satfractunstiuta
+          (unsigned long long A)
+     These functions convert from unsigned non-fractionals to
+     fractionals, with saturation.
+
+
+File: gccint.info,  Node: Exception handling routines,  Next: Miscellaneous routines,  Prev: Fixed-point fractional library routines,  Up: Libgcc
+
+4.5 Language-independent routines for exception handling
+========================================================
+
+document me!
+
+       _Unwind_DeleteException
+       _Unwind_Find_FDE
+       _Unwind_ForcedUnwind
+       _Unwind_GetGR
+       _Unwind_GetIP
+       _Unwind_GetLanguageSpecificData
+       _Unwind_GetRegionStart
+       _Unwind_GetTextRelBase
+       _Unwind_GetDataRelBase
+       _Unwind_RaiseException
+       _Unwind_Resume
+       _Unwind_SetGR
+       _Unwind_SetIP
+       _Unwind_FindEnclosingFunction
+       _Unwind_SjLj_Register
+       _Unwind_SjLj_Unregister
+       _Unwind_SjLj_RaiseException
+       _Unwind_SjLj_ForcedUnwind
+       _Unwind_SjLj_Resume
+       __deregister_frame
+       __deregister_frame_info
+       __deregister_frame_info_bases
+       __register_frame
+       __register_frame_info
+       __register_frame_info_bases
+       __register_frame_info_table
+       __register_frame_info_table_bases
+       __register_frame_table
+
+
+File: gccint.info,  Node: Miscellaneous routines,  Prev: Exception handling routines,  Up: Libgcc
+
+4.6 Miscellaneous runtime library routines
+==========================================
+
+4.6.1 Cache control functions
+-----------------------------
+
+ -- Runtime Function: void __clear_cache (char *BEG, char *END)
+     This function clears the instruction cache between BEG and END.
+
+4.6.2 Split stack functions and variables
+-----------------------------------------
+
+ -- Runtime Function: void * __splitstack_find (void *SEGMENT_ARG, void
+          *SP, size_t LEN, void **NEXT_SEGMENT, void **NEXT_SP, void
+          **INITIAL_SP)
+     When using `-fsplit-stack', this call may be used to iterate over
+     the stack segments.  It may be called like this:
+            void *next_segment = NULL;
+            void *next_sp = NULL;
+            void *initial_sp = NULL;
+            void *stack;
+            size_t stack_size;
+            while ((stack = __splitstack_find (next_segment, next_sp,
+                                               &stack_size, &next_segment,
+                                               &next_sp, &initial_sp))
+                   != NULL)
+              {
+                /* Stack segment starts at stack and is
+                   stack_size bytes long.  */
+              }
+
+     There is no way to iterate over the stack segments of a different
+     thread.  However, what is permitted is for one thread to call this
+     with the SEGMENT_ARG and SP arguments NULL, to pass NEXT_SEGMENT,
+     NEXT_SP, and INITIAL_SP to a different thread, and then to suspend
+     one way or another.  A different thread may run the subsequent
+     `__splitstack_find' iterations.  Of course, this will only work if
+     the first thread is suspended while the second thread is calling
+     `__splitstack_find'.  If not, the second thread could be looking
+     at the stack while it is changing, and anything could happen.
+
+ -- Variable: __morestack_segments
+ -- Variable: __morestack_current_segment
+ -- Variable: __morestack_initial_sp
+     Internal variables used by the `-fsplit-stack' implementation.
+
+
+File: gccint.info,  Node: Languages,  Next: Source Tree,  Prev: Libgcc,  Up: Top
+
+5 Language Front Ends in GCC
+****************************
+
+The interface to front ends for languages in GCC, and in particular the
+`tree' structure (*note GENERIC::), was initially designed for C, and
+many aspects of it are still somewhat biased towards C and C-like
+languages.  It is, however, reasonably well suited to other procedural
+languages, and front ends for many such languages have been written for
+GCC.
+
+ Writing a compiler as a front end for GCC, rather than compiling
+directly to assembler or generating C code which is then compiled by
+GCC, has several advantages:
+
+   * GCC front ends benefit from the support for many different target
+     machines already present in GCC.
+
+   * GCC front ends benefit from all the optimizations in GCC.  Some of
+     these, such as alias analysis, may work better when GCC is
+     compiling directly from source code then when it is compiling from
+     generated C code.
+
+   * Better debugging information is generated when compiling directly
+     from source code than when going via intermediate generated C code.
+
+ Because of the advantages of writing a compiler as a GCC front end,
+GCC front ends have also been created for languages very different from
+those for which GCC was designed, such as the declarative
+logic/functional language Mercury.  For these reasons, it may also be
+useful to implement compilers created for specialized purposes (for
+example, as part of a research project) as GCC front ends.
+
+
+File: gccint.info,  Node: Source Tree,  Next: Testsuites,  Prev: Languages,  Up: Top
+
+6 Source Tree Structure and Build System
+****************************************
+
+This chapter describes the structure of the GCC source tree, and how
+GCC is built.  The user documentation for building and installing GCC
+is in a separate manual (`http://gcc.gnu.org/install/'), with which it
+is presumed that you are familiar.
+
+* Menu:
+
+* Configure Terms:: Configuration terminology and history.
+* Top Level::       The top level source directory.
+* gcc Directory::   The `gcc' subdirectory.
+
+
+File: gccint.info,  Node: Configure Terms,  Next: Top Level,  Up: Source Tree
+
+6.1 Configure Terms and History
+===============================
+
+The configure and build process has a long and colorful history, and can
+be confusing to anyone who doesn't know why things are the way they are.
+While there are other documents which describe the configuration process
+in detail, here are a few things that everyone working on GCC should
+know.
+
+ There are three system names that the build knows about: the machine
+you are building on ("build"), the machine that you are building for
+("host"), and the machine that GCC will produce code for ("target").
+When you configure GCC, you specify these with `--build=', `--host=',
+and `--target='.
+
+ Specifying the host without specifying the build should be avoided, as
+`configure' may (and once did) assume that the host you specify is also
+the build, which may not be true.
+
+ If build, host, and target are all the same, this is called a
+"native".  If build and host are the same but target is different, this
+is called a "cross".  If build, host, and target are all different this
+is called a "canadian" (for obscure reasons dealing with Canada's
+political party and the background of the person working on the build
+at that time).  If host and target are the same, but build is
+different, you are using a cross-compiler to build a native for a
+different system.  Some people call this a "host-x-host", "crossed
+native", or "cross-built native".  If build and target are the same,
+but host is different, you are using a cross compiler to build a cross
+compiler that produces code for the machine you're building on.  This
+is rare, so there is no common way of describing it.  There is a
+proposal to call this a "crossback".
+
+ If build and host are the same, the GCC you are building will also be
+used to build the target libraries (like `libstdc++').  If build and
+host are different, you must have already built and installed a cross
+compiler that will be used to build the target libraries (if you
+configured with `--target=foo-bar', this compiler will be called
+`foo-bar-gcc').
+
+ In the case of target libraries, the machine you're building for is the
+machine you specified with `--target'.  So, build is the machine you're
+building on (no change there), host is the machine you're building for
+(the target libraries are built for the target, so host is the target
+you specified), and target doesn't apply (because you're not building a
+compiler, you're building libraries).  The configure/make process will
+adjust these variables as needed.  It also sets `$with_cross_host' to
+the original `--host' value in case you need it.
+
+ The `libiberty' support library is built up to three times: once for
+the host, once for the target (even if they are the same), and once for
+the build if build and host are different.  This allows it to be used
+by all programs which are generated in the course of the build process.
+
+
+File: gccint.info,  Node: Top Level,  Next: gcc Directory,  Prev: Configure Terms,  Up: Source Tree
+
+6.2 Top Level Source Directory
+==============================
+
+The top level source directory in a GCC distribution contains several
+files and directories that are shared with other software distributions
+such as that of GNU Binutils.  It also contains several subdirectories
+that contain parts of GCC and its runtime libraries:
+
+`boehm-gc'
+     The Boehm conservative garbage collector, used as part of the Java
+     runtime library.
+
+`config'
+     Autoconf macros and Makefile fragments used throughout the tree.
+
+`contrib'
+     Contributed scripts that may be found useful in conjunction with
+     GCC.  One of these, `contrib/texi2pod.pl', is used to generate man
+     pages from Texinfo manuals as part of the GCC build process.
+
+`fixincludes'
+     The support for fixing system headers to work with GCC.  See
+     `fixincludes/README' for more information.  The headers fixed by
+     this mechanism are installed in `LIBSUBDIR/include-fixed'.  Along
+     with those headers, `README-fixinc' is also installed, as
+     `LIBSUBDIR/include-fixed/README'.
+
+`gcc'
+     The main sources of GCC itself (except for runtime libraries),
+     including optimizers, support for different target architectures,
+     language front ends, and testsuites.  *Note The `gcc'
+     Subdirectory: gcc Directory, for details.
+
+`gnattools'
+     Support tools for GNAT.
+
+`include'
+     Headers for the `libiberty' library.
+
+`intl'
+     GNU `libintl', from GNU `gettext', for systems which do not
+     include it in `libc'.
+
+`libada'
+     The Ada runtime library.
+
+`libcpp'
+     The C preprocessor library.
+
+`libdecnumber'
+     The Decimal Float support library.
+
+`libffi'
+     The `libffi' library, used as part of the Java runtime library.
+
+`libgcc'
+     The GCC runtime library.
+
+`libgfortran'
+     The Fortran runtime library.
+
+`libgo'
+     The Go runtime library.  The bulk of this library is mirrored from
+     the master Go repository (http://code.google.com/p/go/).
+
+`libgomp'
+     The GNU OpenMP runtime library.
+
+`libiberty'
+     The `libiberty' library, used for portability and for some
+     generally useful data structures and algorithms.  *Note
+     Introduction: (libiberty)Top, for more information about this
+     library.
+
+`libjava'
+     The Java runtime library.
+
+`libmudflap'
+     The `libmudflap' library, used for instrumenting pointer and array
+     dereferencing operations.
+
+`libobjc'
+     The Objective-C and Objective-C++ runtime library.
+
+`libssp'
+     The Stack protector runtime library.
+
+`libstdc++-v3'
+     The C++ runtime library.
+
+`lto-plugin'
+     Plugin used by `gold' if link-time optimizations are enabled.
+
+`maintainer-scripts'
+     Scripts used by the `gccadmin' account on `gcc.gnu.org'.
+
+`zlib'
+     The `zlib' compression library, used by the Java front end, as
+     part of the Java runtime library, and for compressing and
+     uncompressing GCC's intermediate language in LTO object files.
+
+ The build system in the top level directory, including how recursion
+into subdirectories works and how building runtime libraries for
+multilibs is handled, is documented in a separate manual, included with
+GNU Binutils.  *Note GNU configure and build system: (configure)Top,
+for details.
+
+
+File: gccint.info,  Node: gcc Directory,  Prev: Top Level,  Up: Source Tree
+
+6.3 The `gcc' Subdirectory
+==========================
+
+The `gcc' directory contains many files that are part of the C sources
+of GCC, other files used as part of the configuration and build
+process, and subdirectories including documentation and a testsuite.
+The files that are sources of GCC are documented in a separate chapter.
+*Note Passes and Files of the Compiler: Passes.
+
+* Menu:
+
+* Subdirectories:: Subdirectories of `gcc'.
+* Configuration::  The configuration process, and the files it uses.
+* Build::          The build system in the `gcc' directory.
+* Makefile::       Targets in `gcc/Makefile'.
+* Library Files::  Library source files and headers under `gcc/'.
+* Headers::        Headers installed by GCC.
+* Documentation::  Building documentation in GCC.
+* Front End::      Anatomy of a language front end.
+* Back End::       Anatomy of a target back end.
+
+
+File: gccint.info,  Node: Subdirectories,  Next: Configuration,  Up: gcc Directory
+
+6.3.1 Subdirectories of `gcc'
+-----------------------------
+
+The `gcc' directory contains the following subdirectories:
+
+`LANGUAGE'
+     Subdirectories for various languages.  Directories containing a
+     file `config-lang.in' are language subdirectories.  The contents of
+     the subdirectories `cp' (for C++), `lto' (for LTO), `objc' (for
+     Objective-C) and `objcp' (for Objective-C++) are documented in
+     this manual (*note Passes and Files of the Compiler: Passes.);
+     those for other languages are not.  *Note Anatomy of a Language
+     Front End: Front End, for details of the files in these
+     directories.
+
+`config'
+     Configuration files for supported architectures and operating
+     systems.  *Note Anatomy of a Target Back End: Back End, for
+     details of the files in this directory.
+
+`doc'
+     Texinfo documentation for GCC, together with automatically
+     generated man pages and support for converting the installation
+     manual to HTML.  *Note Documentation::.
+
+`ginclude'
+     System headers installed by GCC, mainly those required by the C
+     standard of freestanding implementations.  *Note Headers Installed
+     by GCC: Headers, for details of when these and other headers are
+     installed.
+
+`po'
+     Message catalogs with translations of messages produced by GCC into
+     various languages, `LANGUAGE.po'.  This directory also contains
+     `gcc.pot', the template for these message catalogues, `exgettext',
+     a wrapper around `gettext' to extract the messages from the GCC
+     sources and create `gcc.pot', which is run by `make gcc.pot', and
+     `EXCLUDES', a list of files from which messages should not be
+     extracted.
+
+`testsuite'
+     The GCC testsuites (except for those for runtime libraries).
+     *Note Testsuites::.
+
+
+File: gccint.info,  Node: Configuration,  Next: Build,  Prev: Subdirectories,  Up: gcc Directory
+
+6.3.2 Configuration in the `gcc' Directory
+------------------------------------------
+
+The `gcc' directory is configured with an Autoconf-generated script
+`configure'.  The `configure' script is generated from `configure.ac'
+and `aclocal.m4'.  From the files `configure.ac' and `acconfig.h',
+Autoheader generates the file `config.in'.  The file `cstamp-h.in' is
+used as a timestamp.
+
+* Menu:
+
+* Config Fragments::     Scripts used by `configure'.
+* System Config::        The `config.build', `config.host', and
+                         `config.gcc' files.
+* Configuration Files::  Files created by running `configure'.
+
+
+File: gccint.info,  Node: Config Fragments,  Next: System Config,  Up: Configuration
+
+6.3.2.1 Scripts Used by `configure'
+...................................
+
+`configure' uses some other scripts to help in its work:
+
+   * The standard GNU `config.sub' and `config.guess' files, kept in
+     the top level directory, are used.
+
+   * The file `config.gcc' is used to handle configuration specific to
+     the particular target machine.  The file `config.build' is used to
+     handle configuration specific to the particular build machine.
+     The file `config.host' is used to handle configuration specific to
+     the particular host machine.  (In general, these should only be
+     used for features that cannot reasonably be tested in Autoconf
+     feature tests.)  *Note The `config.build'; `config.host'; and
+     `config.gcc' Files: System Config, for details of the contents of
+     these files.
+
+   * Each language subdirectory has a file `LANGUAGE/config-lang.in'
+     that is used for front-end-specific configuration.  *Note The
+     Front End `config-lang.in' File: Front End Config, for details of
+     this file.
+
+   * A helper script `configure.frag' is used as part of creating the
+     output of `configure'.
+
+
+File: gccint.info,  Node: System Config,  Next: Configuration Files,  Prev: Config Fragments,  Up: Configuration
+
+6.3.2.2 The `config.build'; `config.host'; and `config.gcc' Files
+.................................................................
+
+The `config.build' file contains specific rules for particular systems
+which GCC is built on.  This should be used as rarely as possible, as
+the behavior of the build system can always be detected by autoconf.
+
+ The `config.host' file contains specific rules for particular systems
+which GCC will run on.  This is rarely needed.
+
+ The `config.gcc' file contains specific rules for particular systems
+which GCC will generate code for.  This is usually needed.
+
+ Each file has a list of the shell variables it sets, with
+descriptions, at the top of the file.
+
+ FIXME: document the contents of these files, and what variables should
+be set to control build, host and target configuration.
+
+
+File: gccint.info,  Node: Configuration Files,  Prev: System Config,  Up: Configuration
+
+6.3.2.3 Files Created by `configure'
+....................................
+
+Here we spell out what files will be set up by `configure' in the `gcc'
+directory.  Some other files are created as temporary files in the
+configuration process, and are not used in the subsequent build; these
+are not documented.
+
+   * `Makefile' is constructed from `Makefile.in', together with the
+     host and target fragments (*note Makefile Fragments: Fragments.)
+     `t-TARGET' and `x-HOST' from `config', if any, and language
+     Makefile fragments `LANGUAGE/Make-lang.in'.
+
+   * `auto-host.h' contains information about the host machine
+     determined by `configure'.  If the host machine is different from
+     the build machine, then `auto-build.h' is also created, containing
+     such information about the build machine.
+
+   * `config.status' is a script that may be run to recreate the
+     current configuration.
+
+   * `configargs.h' is a header containing details of the arguments
+     passed to `configure' to configure GCC, and of the thread model
+     used.
+
+   * `cstamp-h' is used as a timestamp.
+
+   * If a language `config-lang.in' file (*note The Front End
+     `config-lang.in' File: Front End Config.) sets `outputs', then the
+     files listed in `outputs' there are also generated.
+
+ The following configuration headers are created from the Makefile,
+using `mkconfig.sh', rather than directly by `configure'.  `config.h',
+`bconfig.h' and `tconfig.h' all contain the `xm-MACHINE.h' header, if
+any, appropriate to the host, build and target machines respectively,
+the configuration headers for the target, and some definitions; for the
+host and build machines, these include the autoconfigured headers
+generated by `configure'.  The other configuration headers are
+determined by `config.gcc'.  They also contain the typedefs for `rtx',
+`rtvec' and `tree'.
+
+   * `config.h', for use in programs that run on the host machine.
+
+   * `bconfig.h', for use in programs that run on the build machine.
+
+   * `tconfig.h', for use in programs and libraries for the target
+     machine.
+
+   * `tm_p.h', which includes the header `MACHINE-protos.h' that
+     contains prototypes for functions in the target `.c' file.  FIXME:
+     why is such a separate header necessary?
+
+
+File: gccint.info,  Node: Build,  Next: Makefile,  Prev: Configuration,  Up: gcc Directory
+
+6.3.3 Build System in the `gcc' Directory
+-----------------------------------------
+
+FIXME: describe the build system, including what is built in what
+stages.  Also list the various source files that are used in the build
+process but aren't source files of GCC itself and so aren't documented
+below (*note Passes::).
+
+
+File: gccint.info,  Node: Makefile,  Next: Library Files,  Prev: Build,  Up: gcc Directory
+
+6.3.4 Makefile Targets
+----------------------
+
+These targets are available from the `gcc' directory:
+
+`all'
+     This is the default target.  Depending on what your
+     build/host/target configuration is, it coordinates all the things
+     that need to be built.
+
+`doc'
+     Produce info-formatted documentation and man pages.  Essentially it
+     calls `make man' and `make info'.
+
+`dvi'
+     Produce DVI-formatted documentation.
+
+`pdf'
+     Produce PDF-formatted documentation.
+
+`html'
+     Produce HTML-formatted documentation.
+
+`man'
+     Generate man pages.
+
+`info'
+     Generate info-formatted pages.
+
+`mostlyclean'
+     Delete the files made while building the compiler.
+
+`clean'
+     That, and all the other files built by `make all'.
+
+`distclean'
+     That, and all the files created by `configure'.
+
+`maintainer-clean'
+     Distclean plus any file that can be generated from other files.
+     Note that additional tools may be required beyond what is normally
+     needed to build GCC.
+
+`srcextra'
+     Generates files in the source directory that are not
+     version-controlled but should go into a release tarball.
+
+`srcinfo'
+`srcman'
+     Copies the info-formatted and manpage documentation into the source
+     directory usually for the purpose of generating a release tarball.
+
+`install'
+     Installs GCC.
+
+`uninstall'
+     Deletes installed files, though this is not supported.
+
+`check'
+     Run the testsuite.  This creates a `testsuite' subdirectory that
+     has various `.sum' and `.log' files containing the results of the
+     testing.  You can run subsets with, for example, `make check-gcc'.
+     You can specify specific tests by setting `RUNTESTFLAGS' to be the
+     name of the `.exp' file, optionally followed by (for some tests)
+     an equals and a file wildcard, like:
+
+          make check-gcc RUNTESTFLAGS="execute.exp=19980413-*"
+
+     Note that running the testsuite may require additional tools be
+     installed, such as Tcl or DejaGnu.
+
+ The toplevel tree from which you start GCC compilation is not the GCC
+directory, but rather a complex Makefile that coordinates the various
+steps of the build, including bootstrapping the compiler and using the
+new compiler to build target libraries.
+
+ When GCC is configured for a native configuration, the default action
+for `make' is to do a full three-stage bootstrap.  This means that GCC
+is built three times--once with the native compiler, once with the
+native-built compiler it just built, and once with the compiler it
+built the second time.  In theory, the last two should produce the same
+results, which `make compare' can check.  Each stage is configured
+separately and compiled into a separate directory, to minimize problems
+due to ABI incompatibilities between the native compiler and GCC.
+
+ If you do a change, rebuilding will also start from the first stage
+and "bubble" up the change through the three stages.  Each stage is
+taken from its build directory (if it had been built previously),
+rebuilt, and copied to its subdirectory.  This will allow you to, for
+example, continue a bootstrap after fixing a bug which causes the
+stage2 build to crash.  It does not provide as good coverage of the
+compiler as bootstrapping from scratch, but it ensures that the new
+code is syntactically correct (e.g., that you did not use GCC extensions
+by mistake), and avoids spurious bootstrap comparison failures(1).
+
+ Other targets available from the top level include:
+
+`bootstrap-lean'
+     Like `bootstrap', except that the various stages are removed once
+     they're no longer needed.  This saves disk space.
+
+`bootstrap2'
+`bootstrap2-lean'
+     Performs only the first two stages of bootstrap.  Unlike a
+     three-stage bootstrap, this does not perform a comparison to test
+     that the compiler is running properly.  Note that the disk space
+     required by a "lean" bootstrap is approximately independent of the
+     number of stages.
+
+`stageN-bubble (N = 1...4, profile, feedback)'
+     Rebuild all the stages up to N, with the appropriate flags,
+     "bubbling" the changes as described above.
+
+`all-stageN (N = 1...4, profile, feedback)'
+     Assuming that stage N has already been built, rebuild it with the
+     appropriate flags.  This is rarely needed.
+
+`cleanstrap'
+     Remove everything (`make clean') and rebuilds (`make bootstrap').
+
+`compare'
+     Compares the results of stages 2 and 3.  This ensures that the
+     compiler is running properly, since it should produce the same
+     object files regardless of how it itself was compiled.
+
+`profiledbootstrap'
+     Builds a compiler with profiling feedback information.  In this
+     case, the second and third stages are named `profile' and
+     `feedback', respectively.  For more information, see *note
+     Building with profile feedback: (gccinstall)Building.
+
+`restrap'
+     Restart a bootstrap, so that everything that was not built with
+     the system compiler is rebuilt.
+
+`stageN-start (N = 1...4, profile, feedback)'
+     For each package that is bootstrapped, rename directories so that,
+     for example, `gcc' points to the stageN GCC, compiled with the
+     stageN-1 GCC(2).
+
+     You will invoke this target if you need to test or debug the
+     stageN GCC.  If you only need to execute GCC (but you need not run
+     `make' either to rebuild it or to run test suites), you should be
+     able to work directly in the `stageN-gcc' directory.  This makes
+     it easier to debug multiple stages in parallel.
+
+`stage'
+     For each package that is bootstrapped, relocate its build directory
+     to indicate its stage.  For example, if the `gcc' directory points
+     to the stage2 GCC, after invoking this target it will be renamed
+     to `stage2-gcc'.
+
+
+ If you wish to use non-default GCC flags when compiling the stage2 and
+stage3 compilers, set `BOOT_CFLAGS' on the command line when doing
+`make'.
+
+ Usually, the first stage only builds the languages that the compiler
+is written in: typically, C and maybe Ada.  If you are debugging a
+miscompilation of a different stage2 front-end (for example, of the
+Fortran front-end), you may want to have front-ends for other languages
+in the first stage as well.  To do so, set `STAGE1_LANGUAGES' on the
+command line when doing `make'.
+
+ For example, in the aforementioned scenario of debugging a Fortran
+front-end miscompilation caused by the stage1 compiler, you may need a
+command like
+
+     make stage2-bubble STAGE1_LANGUAGES=c,fortran
+
+ Alternatively, you can use per-language targets to build and test
+languages that are not enabled by default in stage1.  For example,
+`make f951' will build a Fortran compiler even in the stage1 build
+directory.
+
+ ---------- Footnotes ----------
+
+ (1) Except if the compiler was buggy and miscompiled some of the files
+that were not modified.  In this case, it's best to use `make restrap'.
+
+ (2) Customarily, the system compiler is also termed the `stage0' GCC.
+
+
+File: gccint.info,  Node: Library Files,  Next: Headers,  Prev: Makefile,  Up: gcc Directory
+
+6.3.5 Library Source Files and Headers under the `gcc' Directory
+----------------------------------------------------------------
+
+FIXME: list here, with explanation, all the C source files and headers
+under the `gcc' directory that aren't built into the GCC executable but
+rather are part of runtime libraries and object files, such as
+`crtstuff.c' and `unwind-dw2.c'.  *Note Headers Installed by GCC:
+Headers, for more information about the `ginclude' directory.
+
+
+File: gccint.info,  Node: Headers,  Next: Documentation,  Prev: Library Files,  Up: gcc Directory
+
+6.3.6 Headers Installed by GCC
+------------------------------
+
+In general, GCC expects the system C library to provide most of the
+headers to be used with it.  However, GCC will fix those headers if
+necessary to make them work with GCC, and will install some headers
+required of freestanding implementations.  These headers are installed
+in `LIBSUBDIR/include'.  Headers for non-C runtime libraries are also
+installed by GCC; these are not documented here.  (FIXME: document them
+somewhere.)
+
+ Several of the headers GCC installs are in the `ginclude' directory.
+These headers, `iso646.h', `stdarg.h', `stdbool.h', and `stddef.h', are
+installed in `LIBSUBDIR/include', unless the target Makefile fragment
+(*note Target Fragment::) overrides this by setting `USER_H'.
+
+ In addition to these headers and those generated by fixing system
+headers to work with GCC, some other headers may also be installed in
+`LIBSUBDIR/include'.  `config.gcc' may set `extra_headers'; this
+specifies additional headers under `config' to be installed on some
+systems.
+
+ GCC installs its own version of `<float.h>', from `ginclude/float.h'.
+This is done to cope with command-line options that change the
+representation of floating point numbers.
+
+ GCC also installs its own version of `<limits.h>'; this is generated
+from `glimits.h', together with `limitx.h' and `limity.h' if the system
+also has its own version of `<limits.h>'.  (GCC provides its own header
+because it is required of ISO C freestanding implementations, but needs
+to include the system header from its own header as well because other
+standards such as POSIX specify additional values to be defined in
+`<limits.h>'.)  The system's `<limits.h>' header is used via
+`LIBSUBDIR/include/syslimits.h', which is copied from `gsyslimits.h' if
+it does not need fixing to work with GCC; if it needs fixing,
+`syslimits.h' is the fixed copy.
+
+ GCC can also install `<tgmath.h>'.  It will do this when `config.gcc'
+sets `use_gcc_tgmath' to `yes'.
+
+
+File: gccint.info,  Node: Documentation,  Next: Front End,  Prev: Headers,  Up: gcc Directory
+
+6.3.7 Building Documentation
+----------------------------
+
+The main GCC documentation is in the form of manuals in Texinfo format.
+These are installed in Info format; DVI versions may be generated by
+`make dvi', PDF versions by `make pdf', and HTML versions by `make
+html'.  In addition, some man pages are generated from the Texinfo
+manuals, there are some other text files with miscellaneous
+documentation, and runtime libraries have their own documentation
+outside the `gcc' directory.  FIXME: document the documentation for
+runtime libraries somewhere.
+
+* Menu:
+
+* Texinfo Manuals::      GCC manuals in Texinfo format.
+* Man Page Generation::  Generating man pages from Texinfo manuals.
+* Miscellaneous Docs::   Miscellaneous text files with documentation.
+
+
+File: gccint.info,  Node: Texinfo Manuals,  Next: Man Page Generation,  Up: Documentation
+
+6.3.7.1 Texinfo Manuals
+.......................
+
+The manuals for GCC as a whole, and the C and C++ front ends, are in
+files `doc/*.texi'.  Other front ends have their own manuals in files
+`LANGUAGE/*.texi'.  Common files `doc/include/*.texi' are provided
+which may be included in multiple manuals; the following files are in
+`doc/include':
+
+`fdl.texi'
+     The GNU Free Documentation License.
+
+`funding.texi'
+     The section "Funding Free Software".
+
+`gcc-common.texi'
+     Common definitions for manuals.
+
+`gpl.texi'
+`gpl_v3.texi'
+     The GNU General Public License.
+
+`texinfo.tex'
+     A copy of `texinfo.tex' known to work with the GCC manuals.
+
+ DVI-formatted manuals are generated by `make dvi', which uses
+`texi2dvi' (via the Makefile macro `$(TEXI2DVI)').  PDF-formatted
+manuals are generated by `make pdf', which uses `texi2pdf' (via the
+Makefile macro `$(TEXI2PDF)').  HTML formatted manuals are generated by
+`make html'.  Info manuals are generated by `make info' (which is run
+as part of a bootstrap); this generates the manuals in the source
+directory, using `makeinfo' via the Makefile macro `$(MAKEINFO)', and
+they are included in release distributions.
+
+ Manuals are also provided on the GCC web site, in both HTML and
+PostScript forms.  This is done via the script
+`maintainer-scripts/update_web_docs_svn'.  Each manual to be provided
+online must be listed in the definition of `MANUALS' in that file; a
+file `NAME.texi' must only appear once in the source tree, and the
+output manual must have the same name as the source file.  (However,
+other Texinfo files, included in manuals but not themselves the root
+files of manuals, may have names that appear more than once in the
+source tree.)  The manual file `NAME.texi' should only include other
+files in its own directory or in `doc/include'.  HTML manuals will be
+generated by `makeinfo --html', PostScript manuals by `texi2dvi' and
+`dvips', and PDF manuals by `texi2pdf'.  All Texinfo files that are
+parts of manuals must be version-controlled, even if they are generated
+files, for the generation of online manuals to work.
+
+ The installation manual, `doc/install.texi', is also provided on the
+GCC web site.  The HTML version is generated by the script
+`doc/install.texi2html'.
+
+
+File: gccint.info,  Node: Man Page Generation,  Next: Miscellaneous Docs,  Prev: Texinfo Manuals,  Up: Documentation
+
+6.3.7.2 Man Page Generation
+...........................
+
+Because of user demand, in addition to full Texinfo manuals, man pages
+are provided which contain extracts from those manuals.  These man
+pages are generated from the Texinfo manuals using
+`contrib/texi2pod.pl' and `pod2man'.  (The man page for `g++',
+`cp/g++.1', just contains a `.so' reference to `gcc.1', but all the
+other man pages are generated from Texinfo manuals.)
+
+ Because many systems may not have the necessary tools installed to
+generate the man pages, they are only generated if the `configure'
+script detects that recent enough tools are installed, and the
+Makefiles allow generating man pages to fail without aborting the
+build.  Man pages are also included in release distributions.  They are
+generated in the source directory.
+
+ Magic comments in Texinfo files starting `@c man' control what parts
+of a Texinfo file go into a man page.  Only a subset of Texinfo is
+supported by `texi2pod.pl', and it may be necessary to add support for
+more Texinfo features to this script when generating new man pages.  To
+improve the man page output, some special Texinfo macros are provided
+in `doc/include/gcc-common.texi' which `texi2pod.pl' understands:
+
+`@gcctabopt'
+     Use in the form `@table @gcctabopt' for tables of options, where
+     for printed output the effect of `@code' is better than that of
+     `@option' but for man page output a different effect is wanted.
+
+`@gccoptlist'
+     Use for summary lists of options in manuals.
+
+`@gol'
+     Use at the end of each line inside `@gccoptlist'.  This is
+     necessary to avoid problems with differences in how the
+     `@gccoptlist' macro is handled by different Texinfo formatters.
+
+ FIXME: describe the `texi2pod.pl' input language and magic comments in
+more detail.
+
+
+File: gccint.info,  Node: Miscellaneous Docs,  Prev: Man Page Generation,  Up: Documentation
+
+6.3.7.3 Miscellaneous Documentation
+...................................
+
+In addition to the formal documentation that is installed by GCC, there
+are several other text files in the `gcc' subdirectory with
+miscellaneous documentation:
+
+`ABOUT-GCC-NLS'
+     Notes on GCC's Native Language Support.  FIXME: this should be
+     part of this manual rather than a separate file.
+
+`ABOUT-NLS'
+     Notes on the Free Translation Project.
+
+`COPYING'
+`COPYING3'
+     The GNU General Public License, Versions 2 and 3.
+
+`COPYING.LIB'
+`COPYING3.LIB'
+     The GNU Lesser General Public License, Versions 2.1 and 3.
+
+`*ChangeLog*'
+`*/ChangeLog*'
+     Change log files for various parts of GCC.
+
+`LANGUAGES'
+     Details of a few changes to the GCC front-end interface.  FIXME:
+     the information in this file should be part of general
+     documentation of the front-end interface in this manual.
+
+`ONEWS'
+     Information about new features in old versions of GCC.  (For recent
+     versions, the information is on the GCC web site.)
+
+`README.Portability'
+     Information about portability issues when writing code in GCC.
+     FIXME: why isn't this part of this manual or of the GCC Coding
+     Conventions?
+
+ FIXME: document such files in subdirectories, at least `config', `cp',
+`objc', `testsuite'.
+
+
+File: gccint.info,  Node: Front End,  Next: Back End,  Prev: Documentation,  Up: gcc Directory
+
+6.3.8 Anatomy of a Language Front End
+-------------------------------------
+
+A front end for a language in GCC has the following parts:
+
+   * A directory `LANGUAGE' under `gcc' containing source files for
+     that front end.  *Note The Front End `LANGUAGE' Directory: Front
+     End Directory, for details.
+
+   * A mention of the language in the list of supported languages in
+     `gcc/doc/install.texi'.
+
+   * A mention of the name under which the language's runtime library is
+     recognized by `--enable-shared=PACKAGE' in the documentation of
+     that option in `gcc/doc/install.texi'.
+
+   * A mention of any special prerequisites for building the front end
+     in the documentation of prerequisites in `gcc/doc/install.texi'.
+
+   * Details of contributors to that front end in
+     `gcc/doc/contrib.texi'.  If the details are in that front end's
+     own manual then there should be a link to that manual's list in
+     `contrib.texi'.
+
+   * Information about support for that language in
+     `gcc/doc/frontends.texi'.
+
+   * Information about standards for that language, and the front end's
+     support for them, in `gcc/doc/standards.texi'.  This may be a link
+     to such information in the front end's own manual.
+
+   * Details of source file suffixes for that language and `-x LANG'
+     options supported, in `gcc/doc/invoke.texi'.
+
+   * Entries in `default_compilers' in `gcc.c' for source file suffixes
+     for that language.
+
+   * Preferably testsuites, which may be under `gcc/testsuite' or
+     runtime library directories.  FIXME: document somewhere how to
+     write testsuite harnesses.
+
+   * Probably a runtime library for the language, outside the `gcc'
+     directory.  FIXME: document this further.
+
+   * Details of the directories of any runtime libraries in
+     `gcc/doc/sourcebuild.texi'.
+
+   * Check targets in `Makefile.def' for the top-level `Makefile' to
+     check just the compiler or the compiler and runtime library for the
+     language.
+
+ If the front end is added to the official GCC source repository, the
+following are also necessary:
+
+   * At least one Bugzilla component for bugs in that front end and
+     runtime libraries.  This category needs to be added to the
+     Bugzilla database.
+
+   * Normally, one or more maintainers of that front end listed in
+     `MAINTAINERS'.
+
+   * Mentions on the GCC web site in `index.html' and `frontends.html',
+     with any relevant links on `readings.html'.  (Front ends that are
+     not an official part of GCC may also be listed on
+     `frontends.html', with relevant links.)
+
+   * A news item on `index.html', and possibly an announcement on the
+     <gcc-announce@gcc.gnu.org> mailing list.
+
+   * The front end's manuals should be mentioned in
+     `maintainer-scripts/update_web_docs_svn' (*note Texinfo Manuals::)
+     and the online manuals should be linked to from
+     `onlinedocs/index.html'.
+
+   * Any old releases or CVS repositories of the front end, before its
+     inclusion in GCC, should be made available on the GCC FTP site
+     `ftp://gcc.gnu.org/pub/gcc/old-releases/'.
+
+   * The release and snapshot script `maintainer-scripts/gcc_release'
+     should be updated to generate appropriate tarballs for this front
+     end.
+
+   * If this front end includes its own version files that include the
+     current date, `maintainer-scripts/update_version' should be
+     updated accordingly.
+
+* Menu:
+
+* Front End Directory::  The front end `LANGUAGE' directory.
+* Front End Config::     The front end `config-lang.in' file.
+* Front End Makefile::   The front end `Make-lang.in' file.
+
+
+File: gccint.info,  Node: Front End Directory,  Next: Front End Config,  Up: Front End
+
+6.3.8.1 The Front End `LANGUAGE' Directory
+..........................................
+
+A front end `LANGUAGE' directory contains the source files of that
+front end (but not of any runtime libraries, which should be outside
+the `gcc' directory).  This includes documentation, and possibly some
+subsidiary programs built alongside the front end.  Certain files are
+special and other parts of the compiler depend on their names:
+
+`config-lang.in'
+     This file is required in all language subdirectories.  *Note The
+     Front End `config-lang.in' File: Front End Config, for details of
+     its contents
+
+`Make-lang.in'
+     This file is required in all language subdirectories.  *Note The
+     Front End `Make-lang.in' File: Front End Makefile, for details of
+     its contents.
+
+`lang.opt'
+     This file registers the set of switches that the front end accepts
+     on the command line, and their `--help' text.  *Note Options::.
+
+`lang-specs.h'
+     This file provides entries for `default_compilers' in `gcc.c'
+     which override the default of giving an error that a compiler for
+     that language is not installed.
+
+`LANGUAGE-tree.def'
+     This file, which need not exist, defines any language-specific tree
+     codes.
+
+
+File: gccint.info,  Node: Front End Config,  Next: Front End Makefile,  Prev: Front End Directory,  Up: Front End
+
+6.3.8.2 The Front End `config-lang.in' File
+...........................................
+
+Each language subdirectory contains a `config-lang.in' file.  In
+addition the main directory contains `c-config-lang.in', which contains
+limited information for the C language.  This file is a shell script
+that may define some variables describing the language:
+
+`language'
+     This definition must be present, and gives the name of the language
+     for some purposes such as arguments to `--enable-languages'.
+
+`lang_requires'
+     If defined, this variable lists (space-separated) language front
+     ends other than C that this front end requires to be enabled (with
+     the names given being their `language' settings).  For example, the
+     Java front end depends on the C++ front end, so sets
+     `lang_requires=c++'.
+
+`subdir_requires'
+     If defined, this variable lists (space-separated) front end
+     directories other than C that this front end requires to be
+     present.  For example, the Objective-C++ front end uses source
+     files from the C++ and Objective-C front ends, so sets
+     `subdir_requires="cp objc"'.
+
+`target_libs'
+     If defined, this variable lists (space-separated) targets in the
+     top level `Makefile' to build the runtime libraries for this
+     language, such as `target-libobjc'.
+
+`lang_dirs'
+     If defined, this variable lists (space-separated) top level
+     directories (parallel to `gcc'), apart from the runtime libraries,
+     that should not be configured if this front end is not built.
+
+`build_by_default'
+     If defined to `no', this language front end is not built unless
+     enabled in a `--enable-languages' argument.  Otherwise, front ends
+     are built by default, subject to any special logic in
+     `configure.ac' (as is present to disable the Ada front end if the
+     Ada compiler is not already installed).
+
+`boot_language'
+     If defined to `yes', this front end is built in stage1 of the
+     bootstrap.  This is only relevant to front ends written in their
+     own languages.
+
+`compilers'
+     If defined, a space-separated list of compiler executables that
+     will be run by the driver.  The names here will each end with
+     `\$(exeext)'.
+
+`outputs'
+     If defined, a space-separated list of files that should be
+     generated by `configure' substituting values in them.  This
+     mechanism can be used to create a file `LANGUAGE/Makefile' from
+     `LANGUAGE/Makefile.in', but this is deprecated, building
+     everything from the single `gcc/Makefile' is preferred.
+
+`gtfiles'
+     If defined, a space-separated list of files that should be scanned
+     by `gengtype.c' to generate the garbage collection tables and
+     routines for this language.  This excludes the files that are
+     common to all front ends.  *Note Type Information::.
+
+
+
+File: gccint.info,  Node: Front End Makefile,  Prev: Front End Config,  Up: Front End
+
+6.3.8.3 The Front End `Make-lang.in' File
+.........................................
+
+Each language subdirectory contains a `Make-lang.in' file.  It contains
+targets `LANG.HOOK' (where `LANG' is the setting of `language' in
+`config-lang.in') for the following values of `HOOK', and any other
+Makefile rules required to build those targets (which may if necessary
+use other Makefiles specified in `outputs' in `config-lang.in',
+although this is deprecated).  It also adds any testsuite targets that
+can use the standard rule in `gcc/Makefile.in' to the variable
+`lang_checks'.
+
+`all.cross'
+`start.encap'
+`rest.encap'
+     FIXME: exactly what goes in each of these targets?
+
+`tags'
+     Build an `etags' `TAGS' file in the language subdirectory in the
+     source tree.
+
+`info'
+     Build info documentation for the front end, in the build directory.
+     This target is only called by `make bootstrap' if a suitable
+     version of `makeinfo' is available, so does not need to check for
+     this, and should fail if an error occurs.
+
+`dvi'
+     Build DVI documentation for the front end, in the build directory.
+     This should be done using `$(TEXI2DVI)', with appropriate `-I'
+     arguments pointing to directories of included files.
+
+`pdf'
+     Build PDF documentation for the front end, in the build directory.
+     This should be done using `$(TEXI2PDF)', with appropriate `-I'
+     arguments pointing to directories of included files.
+
+`html'
+     Build HTML documentation for the front end, in the build directory.
+
+`man'
+     Build generated man pages for the front end from Texinfo manuals
+     (*note Man Page Generation::), in the build directory.  This target
+     is only called if the necessary tools are available, but should
+     ignore errors so as not to stop the build if errors occur; man
+     pages are optional and the tools involved may be installed in a
+     broken way.
+
+`install-common'
+     Install everything that is part of the front end, apart from the
+     compiler executables listed in `compilers' in `config-lang.in'.
+
+`install-info'
+     Install info documentation for the front end, if it is present in
+     the source directory.  This target should have dependencies on
+     info files that should be installed.
+
+`install-man'
+     Install man pages for the front end.  This target should ignore
+     errors.
+
+`install-plugin'
+     Install headers needed for plugins.
+
+`srcextra'
+     Copies its dependencies into the source directory.  This generally
+     should be used for generated files such as Bison output files
+     which are not version-controlled, but should be included in any
+     release tarballs.  This target will be executed during a bootstrap
+     if `--enable-generated-files-in-srcdir' was specified as a
+     `configure' option.
+
+`srcinfo'
+`srcman'
+     Copies its dependencies into the source directory.  These targets
+     will be executed during a bootstrap if
+     `--enable-generated-files-in-srcdir' was specified as a
+     `configure' option.
+
+`uninstall'
+     Uninstall files installed by installing the compiler.  This is
+     currently documented not to be supported, so the hook need not do
+     anything.
+
+`mostlyclean'
+`clean'
+`distclean'
+`maintainer-clean'
+     The language parts of the standard GNU `*clean' targets.  *Note
+     Standard Targets for Users: (standards)Standard Targets, for
+     details of the standard targets.  For GCC, `maintainer-clean'
+     should delete all generated files in the source directory that are
+     not version-controlled, but should not delete anything that is.
+
+ `Make-lang.in' must also define a variable `LANG_OBJS' to a list of
+host object files that are used by that language.
+
+
+File: gccint.info,  Node: Back End,  Prev: Front End,  Up: gcc Directory
+
+6.3.9 Anatomy of a Target Back End
+----------------------------------
+
+A back end for a target architecture in GCC has the following parts:
+
+   * A directory `MACHINE' under `gcc/config', containing a machine
+     description `MACHINE.md' file (*note Machine Descriptions: Machine
+     Desc.), header files `MACHINE.h' and `MACHINE-protos.h' and a
+     source file `MACHINE.c' (*note Target Description Macros and
+     Functions: Target Macros.), possibly a target Makefile fragment
+     `t-MACHINE' (*note The Target Makefile Fragment: Target
+     Fragment.), and maybe some other files.  The names of these files
+     may be changed from the defaults given by explicit specifications
+     in `config.gcc'.
+
+   * If necessary, a file `MACHINE-modes.def' in the `MACHINE'
+     directory, containing additional machine modes to represent
+     condition codes.  *Note Condition Code::, for further details.
+
+   * An optional `MACHINE.opt' file in the `MACHINE' directory,
+     containing a list of target-specific options.  You can also add
+     other option files using the `extra_options' variable in
+     `config.gcc'.  *Note Options::.
+
+   * Entries in `config.gcc' (*note The `config.gcc' File: System
+     Config.) for the systems with this target architecture.
+
+   * Documentation in `gcc/doc/invoke.texi' for any command-line
+     options supported by this target (*note Run-time Target
+     Specification: Run-time Target.).  This means both entries in the
+     summary table of options and details of the individual options.
+
+   * Documentation in `gcc/doc/extend.texi' for any target-specific
+     attributes supported (*note Defining target-specific uses of
+     `__attribute__': Target Attributes.), including where the same
+     attribute is already supported on some targets, which are
+     enumerated in the manual.
+
+   * Documentation in `gcc/doc/extend.texi' for any target-specific
+     pragmas supported.
+
+   * Documentation in `gcc/doc/extend.texi' of any target-specific
+     built-in functions supported.
+
+   * Documentation in `gcc/doc/extend.texi' of any target-specific
+     format checking styles supported.
+
+   * Documentation in `gcc/doc/md.texi' of any target-specific
+     constraint letters (*note Constraints for Particular Machines:
+     Machine Constraints.).
+
+   * A note in `gcc/doc/contrib.texi' under the person or people who
+     contributed the target support.
+
+   * Entries in `gcc/doc/install.texi' for all target triplets
+     supported with this target architecture, giving details of any
+     special notes about installation for this target, or saying that
+     there are no special notes if there are none.
+
+   * Possibly other support outside the `gcc' directory for runtime
+     libraries.  FIXME: reference docs for this.  The `libstdc++'
+     porting manual needs to be installed as info for this to work, or
+     to be a chapter of this manual.
+
+ If the back end is added to the official GCC source repository, the
+following are also necessary:
+
+   * An entry for the target architecture in `readings.html' on the GCC
+     web site, with any relevant links.
+
+   * Details of the properties of the back end and target architecture
+     in `backends.html' on the GCC web site.
+
+   * A news item about the contribution of support for that target
+     architecture, in `index.html' on the GCC web site.
+
+   * Normally, one or more maintainers of that target listed in
+     `MAINTAINERS'.  Some existing architectures may be unmaintained,
+     but it would be unusual to add support for a target that does not
+     have a maintainer when support is added.
+
+
+File: gccint.info,  Node: Testsuites,  Next: Options,  Prev: Source Tree,  Up: Top
+
+7 Testsuites
+************
+
+GCC contains several testsuites to help maintain compiler quality.
+Most of the runtime libraries and language front ends in GCC have
+testsuites.  Currently only the C language testsuites are documented
+here; FIXME: document the others.
+
+* Menu:
+
+* Test Idioms::     Idioms used in testsuite code.
+* Test Directives:: Directives used within DejaGnu tests.
+* Ada Tests::       The Ada language testsuites.
+* C Tests::         The C language testsuites.
+* libgcj Tests::    The Java library testsuites.
+* LTO Testing::     Support for testing link-time optimizations.
+* gcov Testing::    Support for testing gcov.
+* profopt Testing:: Support for testing profile-directed optimizations.
+* compat Testing::  Support for testing binary compatibility.
+* Torture Tests::   Support for torture testing using multiple options.
+
+
+File: gccint.info,  Node: Test Idioms,  Next: Test Directives,  Up: Testsuites
+
+7.1 Idioms Used in Testsuite Code
+=================================
+
+In general, C testcases have a trailing `-N.c', starting with `-1.c',
+in case other testcases with similar names are added later.  If the
+test is a test of some well-defined feature, it should have a name
+referring to that feature such as `FEATURE-1.c'.  If it does not test a
+well-defined feature but just happens to exercise a bug somewhere in
+the compiler, and a bug report has been filed for this bug in the GCC
+bug database, `prBUG-NUMBER-1.c' is the appropriate form of name.
+Otherwise (for miscellaneous bugs not filed in the GCC bug database),
+and previously more generally, test cases are named after the date on
+which they were added.  This allows people to tell at a glance whether
+a test failure is because of a recently found bug that has not yet been
+fixed, or whether it may be a regression, but does not give any other
+information about the bug or where discussion of it may be found.  Some
+other language testsuites follow similar conventions.
+
+ In the `gcc.dg' testsuite, it is often necessary to test that an error
+is indeed a hard error and not just a warning--for example, where it is
+a constraint violation in the C standard, which must become an error
+with `-pedantic-errors'.  The following idiom, where the first line
+shown is line LINE of the file and the line that generates the error,
+is used for this:
+
+     /* { dg-bogus "warning" "warning in place of error" } */
+     /* { dg-error "REGEXP" "MESSAGE" { target *-*-* } LINE } */
+
+ It may be necessary to check that an expression is an integer constant
+expression and has a certain value.  To check that `E' has value `V',
+an idiom similar to the following is used:
+
+     char x[((E) == (V) ? 1 : -1)];
+
+ In `gcc.dg' tests, `__typeof__' is sometimes used to make assertions
+about the types of expressions.  See, for example,
+`gcc.dg/c99-condexpr-1.c'.  The more subtle uses depend on the exact
+rules for the types of conditional expressions in the C standard; see,
+for example, `gcc.dg/c99-intconst-1.c'.
+
+ It is useful to be able to test that optimizations are being made
+properly.  This cannot be done in all cases, but it can be done where
+the optimization will lead to code being optimized away (for example,
+where flow analysis or alias analysis should show that certain code
+cannot be called) or to functions not being called because they have
+been expanded as built-in functions.  Such tests go in
+`gcc.c-torture/execute'.  Where code should be optimized away, a call
+to a nonexistent function such as `link_failure ()' may be inserted; a
+definition
+
+     #ifndef __OPTIMIZE__
+     void
+     link_failure (void)
+     {
+       abort ();
+     }
+     #endif
+
+will also be needed so that linking still succeeds when the test is run
+without optimization.  When all calls to a built-in function should
+have been optimized and no calls to the non-built-in version of the
+function should remain, that function may be defined as `static' to
+call `abort ()' (although redeclaring a function as static may not work
+on all targets).
+
+ All testcases must be portable.  Target-specific testcases must have
+appropriate code to avoid causing failures on unsupported systems;
+unfortunately, the mechanisms for this differ by directory.
+
+ FIXME: discuss non-C testsuites here.
+
+
+File: gccint.info,  Node: Test Directives,  Next: Ada Tests,  Prev: Test Idioms,  Up: Testsuites
+
+7.2 Directives used within DejaGnu tests
+========================================
+
+* Menu:
+
+* Directives::  Syntax and descriptions of test directives.
+* Selectors:: Selecting targets to which a test applies.
+* Effective-Target Keywords:: Keywords describing target attributes.
+* Add Options:: Features for `dg-add-options'
+* Require Support:: Variants of `dg-require-SUPPORT'
+* Final Actions:: Commands for use in `dg-final'
+
+
+File: gccint.info,  Node: Directives,  Next: Selectors,  Up: Test Directives
+
+7.2.1 Syntax and Descriptions of test directives
+------------------------------------------------
+
+Test directives appear within comments in a test source file and begin
+with `dg-'.  Some of these are defined within DejaGnu and others are
+local to the GCC testsuite.
+
+ The order in which test directives appear in a test can be important:
+directives local to GCC sometimes override information used by the
+DejaGnu directives, which know nothing about the GCC directives, so the
+DejaGnu directives must precede GCC directives.
+
+ Several test directives include selectors (*note Selectors::) which
+are usually preceded by the keyword `target' or `xfail'.
+
+7.2.1.1 Specify how to build the test
+.....................................
+
+`{ dg-do DO-WHAT-KEYWORD [{ target/xfail SELECTOR }] }'
+     DO-WHAT-KEYWORD specifies how the test is compiled and whether it
+     is executed.  It is one of:
+
+    `preprocess'
+          Compile with `-E' to run only the preprocessor.
+
+    `compile'
+          Compile with `-S' to produce an assembly code file.
+
+    `assemble'
+          Compile with `-c' to produce a relocatable object file.
+
+    `link'
+          Compile, assemble, and link to produce an executable file.
+
+    `run'
+          Produce and run an executable file, which is expected to
+          return an exit code of 0.
+
+     The default is `compile'.  That can be overridden for a set of
+     tests by redefining `dg-do-what-default' within the `.exp' file
+     for those tests.
+
+     If the directive includes the optional `{ target SELECTOR }' then
+     the test is skipped unless the target system matches the SELECTOR.
+
+     If DO-WHAT-KEYWORD is `run' and the directive includes the
+     optional `{ xfail SELECTOR }' and the selector is met then the
+     test is expected to fail.  The `xfail' clause is ignored for other
+     values of DO-WHAT-KEYWORD; those tests can use directive
+     `dg-xfail-if'.
+
+7.2.1.2 Specify additional compiler options
+...........................................
+
+`{ dg-options OPTIONS [{ target SELECTOR }] }'
+     This DejaGnu directive provides a list of compiler options, to be
+     used if the target system matches SELECTOR, that replace the
+     default options used for this set of tests.
+
+`{ dg-add-options FEATURE ... }'
+     Add any compiler options that are needed to access certain
+     features.  This directive does nothing on targets that enable the
+     features by default, or that don't provide them at all.  It must
+     come after all `dg-options' directives.  For supported values of
+     FEATURE see *note Add Options::.
+
+7.2.1.3 Modify the test timeout value
+.....................................
+
+The normal timeout limit, in seconds, is found by searching the
+following in order:
+
+   * the value defined by an earlier `dg-timeout' directive in the test
+
+   * variable TOOL_TIMEOUT defined by the set of tests
+
+   * GCC,TIMEOUT set in the target board
+
+   * 300
+
+`{ dg-timeout N [{target SELECTOR }] }'
+     Set the time limit for the compilation and for the execution of
+     the test to the specified number of seconds.
+
+`{ dg-timeout-factor X [{ target SELECTOR }] }'
+     Multiply the normal time limit for compilation and execution of
+     the test by the specified floating-point factor.
+
+7.2.1.4 Skip a test for some targets
+....................................
+
+`{ dg-skip-if COMMENT { SELECTOR } [{ INCLUDE-OPTS } [{ EXCLUDE-OPTS }]] }'
+     Arguments INCLUDE-OPTS and EXCLUDE-OPTS are lists in which each
+     element is a string of zero or more GCC options.  Skip the test if
+     all of the following conditions are met:
+        * the test system is included in SELECTOR
+
+        * for at least one of the option strings in INCLUDE-OPTS, every
+          option from that string is in the set of options with which
+          the test would be compiled; use `"*"' for an INCLUDE-OPTS list
+          that matches any options; that is the default if INCLUDE-OPTS
+          is not specified
+
+        * for each of the option strings in EXCLUDE-OPTS, at least one
+          option from that string is not in the set of options with
+          which the test would be compiled; use `""' for an empty
+          EXCLUDE-OPTS list; that is the default if EXCLUDE-OPTS is not
+          specified
+
+     For example, to skip a test if option `-Os' is present:
+
+          /* { dg-skip-if "" { *-*-* }  { "-Os" } { "" } } */
+
+     To skip a test if both options `-O2' and `-g' are present:
+
+          /* { dg-skip-if "" { *-*-* }  { "-O2 -g" } { "" } } */
+
+     To skip a test if either `-O2' or `-O3' is present:
+
+          /* { dg-skip-if "" { *-*-* }  { "-O2" "-O3" } { "" } } */
+
+     To skip a test unless option `-Os' is present:
+
+          /* { dg-skip-if "" { *-*-* }  { "*" } { "-Os" } } */
+
+     To skip a test if either `-O2' or `-O3' is used with `-g' but not
+     if `-fpic' is also present:
+
+          /* { dg-skip-if "" { *-*-* }  { "-O2 -g" "-O3 -g" } { "-fpic" } } */
+
+`{ dg-require-effective-target KEYWORD [{ SELECTOR }] }'
+     Skip the test if the test target, including current multilib flags,
+     is not covered by the effective-target keyword.  If the directive
+     includes the optional `{ SELECTOR }' then the effective-target
+     test is only performed if the target system matches the SELECTOR.
+     This directive must appear after any `dg-do' directive in the test
+     and before any `dg-additional-sources' directive.  *Note
+     Effective-Target Keywords::.
+
+`{ dg-require-SUPPORT args }'
+     Skip the test if the target does not provide the required support.
+     These directives must appear after any `dg-do' directive in the
+     test and before any `dg-additional-sources' directive.  They
+     require at least one argument, which can be an empty string if the
+     specific procedure does not examine the argument.  *Note Require
+     Support::, for a complete list of these directives.
+
+7.2.1.5 Expect a test to fail for some targets
+..............................................
+
+`{ dg-xfail-if COMMENT { SELECTOR } [{ INCLUDE-OPTS } [{ EXCLUDE-OPTS }]] }'
+     Expect the test to fail if the conditions (which are the same as
+     for `dg-skip-if') are met.  This does not affect the execute step.
+
+`{ dg-xfail-run-if COMMENT { SELECTOR } [{ INCLUDE-OPTS } [{ EXCLUDE-OPTS }]] }'
+     Expect the execute step of a test to fail if the conditions (which
+     are the same as for `dg-skip-if') are met.
+
+7.2.1.6 Expect the test executable to fail
+..........................................
+
+`{ dg-shouldfail COMMENT [{ SELECTOR } [{ INCLUDE-OPTS } [{ EXCLUDE-OPTS }]]] }'
+     Expect the test executable to return a nonzero exit status if the
+     conditions (which are the same as for `dg-skip-if') are met.
+
+7.2.1.7 Verify compiler messages
+................................
+
+`{ dg-error REGEXP [COMMENT [{ target/xfail SELECTOR } [LINE] }]] }'
+     This DejaGnu directive appears on a source line that is expected
+     to get an error message, or else specifies the source line
+     associated with the message.  If there is no message for that line
+     or if the text of that message is not matched by REGEXP then the
+     check fails and COMMENT is included in the `FAIL' message.  The
+     check does not look for the string `error' unless it is part of
+     REGEXP.
+
+`{ dg-warning REGEXP [COMMENT [{ target/xfail SELECTOR } [LINE] }]] }'
+     This DejaGnu directive appears on a source line that is expected
+     to get a warning message, or else specifies the source line
+     associated with the message.  If there is no message for that line
+     or if the text of that message is not matched by REGEXP then the
+     check fails and COMMENT is included in the `FAIL' message.  The
+     check does not look for the string `warning' unless it is part of
+     REGEXP.
+
+`{ dg-message REGEXP [COMMENT [{ target/xfail SELECTOR } [LINE] }]] }'
+     The line is expected to get a message other than an error or
+     warning.  If there is no message for that line or if the text of
+     that message is not matched by REGEXP then the check fails and
+     COMMENT is included in the `FAIL' message.
+
+`{ dg-bogus REGEXP [COMMENT [{ target/xfail SELECTOR } [LINE] }]] }'
+     This DejaGnu directive appears on a source line that should not
+     get a message matching REGEXP, or else specifies the source line
+     associated with the bogus message.  It is usually used with `xfail'
+     to indicate that the message is a known problem for a particular
+     set of targets.
+
+`{ dg-excess-errors COMMENT [{ target/xfail SELECTOR }] }'
+     This DejaGnu directive indicates that the test is expected to fail
+     due to compiler messages that are not handled by `dg-error',
+     `dg-warning' or `dg-bogus'.  For this directive `xfail' has the
+     same effect as `target'.
+
+`{ dg-prune-output REGEXP }'
+     Prune messages matching REGEXP from the test output.
+
+7.2.1.8 Verify output of the test executable
+............................................
+
+`{ dg-output REGEXP [{ target/xfail SELECTOR }] }'
+     This DejaGnu directive compares REGEXP to the combined output that
+     the test executable writes to `stdout' and `stderr'.
+
+7.2.1.9 Specify additional files for a test
+...........................................
+
+`{ dg-additional-files "FILELIST" }'
+     Specify additional files, other than source files, that must be
+     copied to the system where the compiler runs.
+
+`{ dg-additional-sources "FILELIST" }'
+     Specify additional source files to appear in the compile line
+     following the main test file.
+
+7.2.1.10 Add checks at the end of a test
+........................................
+
+`{ dg-final { LOCAL-DIRECTIVE } }'
+     This DejaGnu directive is placed within a comment anywhere in the
+     source file and is processed after the test has been compiled and
+     run.  Multiple `dg-final' commands are processed in the order in
+     which they appear in the source file.  *Note Final Actions::, for
+     a list of directives that can be used within `dg-final'.
+
+
+File: gccint.info,  Node: Selectors,  Next: Effective-Target Keywords,  Prev: Directives,  Up: Test Directives
+
+7.2.2 Selecting targets to which a test applies
+-----------------------------------------------
+
+Several test directives include SELECTORs to limit the targets for
+which a test is run or to declare that a test is expected to fail on
+particular targets.
+
+ A selector is:
+   * one or more target triplets, possibly including wildcard characters
+
+   * a single effective-target keyword (*note Effective-Target
+     Keywords::)
+
+   * a logical expression
+
+ Depending on the context, the selector specifies whether a test is
+skipped and reported as unsupported or is expected to fail.  Use
+`*-*-*' to match any target.
+
+ A selector expression appears within curly braces and uses a single
+logical operator: one of `!', `&&', or `||'.  An operand is another
+selector expression, an effective-target keyword, a single target
+triplet, or a list of target triplets within quotes or curly braces.
+For example:
+
+     { target { ! "hppa*-*-* ia64*-*-*" } }
+     { target { powerpc*-*-* && lp64 } }
+     { xfail { lp64 || vect_no_align } }
+
+
+File: gccint.info,  Node: Effective-Target Keywords,  Next: Add Options,  Prev: Selectors,  Up: Test Directives
+
+7.2.3 Keywords describing target attributes
+-------------------------------------------
+
+Effective-target keywords identify sets of targets that support
+particular functionality.  They are used to limit tests to be run only
+for particular targets, or to specify that particular sets of targets
+are expected to fail some tests.
+
+ Effective-target keywords are defined in `lib/target-supports.exp' in
+the GCC testsuite, with the exception of those that are documented as
+being local to a particular test directory.
+
+ The `effective target' takes into account all of the compiler options
+with which the test will be compiled, including the multilib options.
+By convention, keywords ending in `_nocache' can also include options
+specified for the particular test in an earlier `dg-options' or
+`dg-add-options' directive.
+
+7.2.3.1 Data type sizes
+.......................
+
+`ilp32'
+     Target has 32-bit `int', `long', and pointers.
+
+`lp64'
+     Target has 32-bit `int', 64-bit `long' and pointers.
+
+`llp64'
+     Target has 32-bit `int' and `long', 64-bit `long long' and
+     pointers.
+
+`double64'
+     Target has 64-bit `double'.
+
+`double64plus'
+     Target has `double' that is 64 bits or longer.
+
+`int32plus'
+     Target has `int' that is at 32 bits or longer.
+
+`int16'
+     Target has `int' that is 16 bits or shorter.
+
+`large_double'
+     Target supports `double' that is longer than `float'.
+
+`large_long_double'
+     Target supports `long double' that is longer than `double'.
+
+`ptr32plus'
+     Target has pointers that are 32 bits or longer.
+
+`size32plus'
+     Target supports array and structure sizes that are 32 bits or
+     longer.
+
+`4byte_wchar_t'
+     Target has `wchar_t' that is at least 4 bytes.
+
+7.2.3.2 Fortran-specific attributes
+...................................
+
+`fortran_integer_16'
+     Target supports Fortran `integer' that is 16 bytes or longer.
+
+`fortran_large_int'
+     Target supports Fortran `integer' kinds larger than `integer(8)'.
+
+`fortran_large_real'
+     Target supports Fortran `real' kinds larger than `real(8)'.
+
+7.2.3.3 Vector-specific attributes
+..................................
+
+`vect_condition'
+     Target supports vector conditional operations.
+
+`vect_double'
+     Target supports hardware vectors of `double'.
+
+`vect_float'
+     Target supports hardware vectors of `float'.
+
+`vect_int'
+     Target supports hardware vectors of `int'.
+
+`vect_long'
+     Target supports hardware vectors of `long'.
+
+`vect_long_long'
+     Target supports hardware vectors of `long long'.
+
+`vect_aligned_arrays'
+     Target aligns arrays to vector alignment boundary.
+
+`vect_hw_misalign'
+     Target supports a vector misalign access.
+
+`vect_no_align'
+     Target does not support a vector alignment mechanism.
+
+`vect_no_int_max'
+     Target does not support a vector max instruction on `int'.
+
+`vect_no_int_add'
+     Target does not support a vector add instruction on `int'.
+
+`vect_no_bitwise'
+     Target does not support vector bitwise instructions.
+
+`vect_char_mult'
+     Target supports `vector char' multiplication.
+
+`vect_short_mult'
+     Target supports `vector short' multiplication.
+
+`vect_int_mult'
+     Target supports `vector int' multiplication.
+
+`vect_extract_even_odd'
+     Target supports vector even/odd element extraction.
+
+`vect_extract_even_odd_wide'
+     Target supports vector even/odd element extraction of vectors with
+     elements `SImode' or larger.
+
+`vect_interleave'
+     Target supports vector interleaving.
+
+`vect_strided'
+     Target supports vector interleaving and extract even/odd.
+
+`vect_strided_wide'
+     Target supports vector interleaving and extract even/odd for wide
+     element types.
+
+`vect_perm'
+     Target supports vector permutation.
+
+`vect_shift'
+     Target supports a hardware vector shift operation.
+
+`vect_widen_sum_hi_to_si'
+     Target supports a vector widening summation of `short' operands
+     into `int' results, or can promote (unpack) from `short' to `int'.
+
+`vect_widen_sum_qi_to_hi'
+     Target supports a vector widening summation of `char' operands
+     into `short' results, or can promote (unpack) from `char' to
+     `short'.
+
+`vect_widen_sum_qi_to_si'
+     Target supports a vector widening summation of `char' operands
+     into `int' results.
+
+`vect_widen_mult_qi_to_hi'
+     Target supports a vector widening multiplication of `char' operands
+     into `short' results, or can promote (unpack) from `char' to
+     `short' and perform non-widening multiplication of `short'.
+
+`vect_widen_mult_hi_to_si'
+     Target supports a vector widening multiplication of `short'
+     operands into `int' results, or can promote (unpack) from `short'
+     to `int' and perform non-widening multiplication of `int'.
+
+`vect_sdot_qi'
+     Target supports a vector dot-product of `signed char'.
+
+`vect_udot_qi'
+     Target supports a vector dot-product of `unsigned char'.
+
+`vect_sdot_hi'
+     Target supports a vector dot-product of `signed short'.
+
+`vect_udot_hi'
+     Target supports a vector dot-product of `unsigned short'.
+
+`vect_pack_trunc'
+     Target supports a vector demotion (packing) of `short' to `char'
+     and from `int' to `short' using modulo arithmetic.
+
+`vect_unpack'
+     Target supports a vector promotion (unpacking) of `char' to `short'
+     and from `char' to `int'.
+
+`vect_intfloat_cvt'
+     Target supports conversion from `signed int' to `float'.
+
+`vect_uintfloat_cvt'
+     Target supports conversion from `unsigned int' to `float'.
+
+`vect_floatint_cvt'
+     Target supports conversion from `float' to `signed int'.
+
+`vect_floatuint_cvt'
+     Target supports conversion from `float' to `unsigned int'.
+
+7.2.3.4 Thread Local Storage attributes
+.......................................
+
+`tls'
+     Target supports thread-local storage.
+
+`tls_native'
+     Target supports native (rather than emulated) thread-local storage.
+
+`tls_runtime'
+     Test system supports executing TLS executables.
+
+7.2.3.5 Decimal floating point attributes
+.........................................
+
+`dfp'
+     Targets supports compiling decimal floating point extension to C.
+
+`dfp_nocache'
+     Including the options used to compile this particular test, the
+     target supports compiling decimal floating point extension to C.
+
+`dfprt'
+     Test system can execute decimal floating point tests.
+
+`dfprt_nocache'
+     Including the options used to compile this particular test, the
+     test system can execute decimal floating point tests.
+
+`hard_dfp'
+     Target generates decimal floating point instructions with current
+     options.
+
+7.2.3.6 ARM-specific attributes
+...............................
+
+`arm32'
+     ARM target generates 32-bit code.
+
+`arm_eabi'
+     ARM target adheres to the ABI for the ARM Architecture.
+
+`arm_hard_vfp_ok'
+     ARM target supports `-mfpu=vfp -mfloat-abi=hard'.  Some multilibs
+     may be incompatible with these options.
+
+`arm_iwmmxt_ok'
+     ARM target supports `-mcpu=iwmmxt'.  Some multilibs may be
+     incompatible with this option.
+
+`arm_neon'
+     ARM target supports generating NEON instructions.
+
+`arm_neon_hw'
+     Test system supports executing NEON instructions.
+
+`arm_neon_ok'
+     ARM Target supports `-mfpu=neon -mfloat-abi=softfp' or compatible
+     options.  Some multilibs may be incompatible with these options.
+
+`arm_neon_fp16_ok'
+     ARM Target supports `-mfpu=neon-fp16 -mfloat-abi=softfp' or
+     compatible options.  Some multilibs may be incompatible with these
+     options.
+
+`arm_thumb1_ok'
+     ARM target generates Thumb-1 code for `-mthumb'.
+
+`arm_thumb2_ok'
+     ARM target generates Thumb-2 code for `-mthumb'.
+
+`arm_vfp_ok'
+     ARM target supports `-mfpu=vfp -mfloat-abi=softfp'.  Some
+     multilibs may be incompatible with these options.
+
+7.2.3.7 MIPS-specific attributes
+................................
+
+`mips64'
+     MIPS target supports 64-bit instructions.
+
+`nomips16'
+     MIPS target does not produce MIPS16 code.
+
+`mips16_attribute'
+     MIPS target can generate MIPS16 code.
+
+`mips_loongson'
+     MIPS target is a Loongson-2E or -2F target using an ABI that
+     supports the Loongson vector modes.
+
+`mips_newabi_large_long_double'
+     MIPS target supports `long double' larger than `double' when using
+     the new ABI.
+
+`mpaired_single'
+     MIPS target supports `-mpaired-single'.
+
+7.2.3.8 PowerPC-specific attributes
+...................................
+
+`powerpc64'
+     Test system supports executing 64-bit instructions.
+
+`powerpc_altivec'
+     PowerPC target supports AltiVec.
+
+`powerpc_altivec_ok'
+     PowerPC target supports `-maltivec'.
+
+`powerpc_fprs'
+     PowerPC target supports floating-point registers.
+
+`powerpc_hard_double'
+     PowerPC target supports hardware double-precision floating-point.
+
+`powerpc_ppu_ok'
+     PowerPC target supports `-mcpu=cell'.
+
+`powerpc_spe'
+     PowerPC target supports PowerPC SPE.
+
+`powerpc_spe_nocache'
+     Including the options used to compile this particular test, the
+     PowerPC target supports PowerPC SPE.
+
+`powerpc_spu'
+     PowerPC target supports PowerPC SPU.
+
+`spu_auto_overlay'
+     SPU target has toolchain that supports automatic overlay
+     generation.
+
+`powerpc_vsx_ok'
+     PowerPC target supports `-mvsx'.
+
+`powerpc_405_nocache'
+     Including the options used to compile this particular test, the
+     PowerPC target supports PowerPC 405.
+
+`vmx_hw'
+     PowerPC target supports executing AltiVec instructions.
+
+7.2.3.9 Other hardware attributes
+.................................
+
+`avx'
+     Target supports compiling `avx' instructions.
+
+`avx_runtime'
+     Target supports the execution of `avx' instructions.
+
+`cell_hw'
+     Test system can execute AltiVec and Cell PPU instructions.
+
+`coldfire_fpu'
+     Target uses a ColdFire FPU.
+
+`hard_float'
+     Target supports FPU instructions.
+
+`sse'
+     Target supports compiling `sse' instructions.
+
+`sse_runtime'
+     Target supports the execution of `sse' instructions.
+
+`sse2'
+     Target supports compiling `sse2' instructions.
+
+`sse2_runtime'
+     Target supports the execution of `sse2' instructions.
+
+`sync_char_short'
+     Target supports atomic operations on `char' and `short'.
+
+`sync_int_long'
+     Target supports atomic operations on `int' and `long'.
+
+`ultrasparc_hw'
+     Test environment appears to run executables on a simulator that
+     accepts only `EM_SPARC' executables and chokes on `EM_SPARC32PLUS'
+     or `EM_SPARCV9' executables.
+
+`vect_cmdline_needed'
+     Target requires a command line argument to enable a SIMD
+     instruction set.
+
+7.2.3.10 Environment attributes
+...............................
+
+`c'
+     The language for the compiler under test is C.
+
+`c++'
+     The language for the compiler under test is C++.
+
+`c99_runtime'
+     Target provides a full C99 runtime.
+
+`correct_iso_cpp_string_wchar_protos'
+     Target `string.h' and `wchar.h' headers provide C++ required
+     overloads for `strchr' etc. functions.
+
+`dummy_wcsftime'
+     Target uses a dummy `wcsftime' function that always returns zero.
+
+`fd_truncate'
+     Target can truncate a file from a file descriptor, as used by
+     `libgfortran/io/unix.c:fd_truncate'; i.e. `ftruncate' or `chsize'.
+
+`freestanding'
+     Target is `freestanding' as defined in section 4 of the C99
+     standard.  Effectively, it is a target which supports no extra
+     headers or libraries other than what is considered essential.
+
+`init_priority'
+     Target supports constructors with initialization priority
+     arguments.
+
+`inttypes_types'
+     Target has the basic signed and unsigned types in `inttypes.h'.
+     This is for tests that GCC's notions of these types agree with
+     those in the header, as some systems have only `inttypes.h'.
+
+`lax_strtofp'
+     Target might have errors of a few ULP in string to floating-point
+     conversion functions and overflow is not always detected correctly
+     by those functions.
+
+`newlib'
+     Target supports Newlib.
+
+`pow10'
+     Target provides `pow10' function.
+
+`pthread'
+     Target can compile using `pthread.h' with no errors or warnings.
+
+`pthread_h'
+     Target has `pthread.h'.
+
+`run_expensive_tests'
+     Expensive testcases (usually those that consume excessive amounts
+     of CPU time) should be run on this target.  This can be enabled by
+     setting the `GCC_TEST_RUN_EXPENSIVE' environment variable to a
+     non-empty string.
+
+`simulator'
+     Test system runs executables on a simulator (i.e. slowly) rather
+     than hardware (i.e. fast).
+
+`stdint_types'
+     Target has the basic signed and unsigned C types in `stdint.h'.
+     This will be obsolete when GCC ensures a working `stdint.h' for
+     all targets.
+
+`trampolines'
+     Target supports trampolines.
+
+`uclibc'
+     Target supports uClibc.
+
+`unwrapped'
+     Target does not use a status wrapper.
+
+`vxworks_kernel'
+     Target is a VxWorks kernel.
+
+`vxworks_rtp'
+     Target is a VxWorks RTP.
+
+`wchar'
+     Target supports wide characters.
+
+7.2.3.11 Other attributes
+.........................
+
+`automatic_stack_alignment'
+     Target supports automatic stack alignment.
+
+`cxa_atexit'
+     Target uses `__cxa_atexit'.
+
+`default_packed'
+     Target has packed layout of structure members by default.
+
+`fgraphite'
+     Target supports Graphite optimizations.
+
+`fixed_point'
+     Target supports fixed-point extension to C.
+
+`fopenmp'
+     Target supports OpenMP via `-fopenmp'.
+
+`fpic'
+     Target supports `-fpic' and `-fPIC'.
+
+`freorder'
+     Target supports `-freorder-blocks-and-partition'.
+
+`fstack_protector'
+     Target supports `-fstack-protector'.
+
+`gas'
+     Target uses GNU `as'.
+
+`gc_sections'
+     Target supports `--gc-sections'.
+
+`keeps_null_pointer_checks'
+     Target keeps null pointer checks, either due to the use of
+     `-fno-delete-null-pointer-checks' or hardwired into the target.
+
+`lto'
+     Compiler has been configured to support link-time optimization
+     (LTO).
+
+`named_sections'
+     Target supports named sections.
+
+`natural_alignment_32'
+     Target uses natural alignment (aligned to type size) for types of
+     32 bits or less.
+
+`target_natural_alignment_64'
+     Target uses natural alignment (aligned to type size) for types of
+     64 bits or less.
+
+`nonpic'
+     Target does not generate PIC by default.
+
+`pcc_bitfield_type_matters'
+     Target defines `PCC_BITFIELD_TYPE_MATTERS'.
+
+`pe_aligned_commons'
+     Target supports `-mpe-aligned-commons'.
+
+`section_anchors'
+     Target supports section anchors.
+
+`short_enums'
+     Target defaults to short enums.
+
+`static'
+     Target supports `-static'.
+
+`static_libgfortran'
+     Target supports statically linking `libgfortran'.
+
+`string_merging'
+     Target supports merging string constants at link time.
+
+`ucn'
+     Target supports compiling and assembling UCN.
+
+`ucn_nocache'
+     Including the options used to compile this particular test, the
+     target supports compiling and assembling UCN.
+
+`unaligned_stack'
+     Target does not guarantee that its `STACK_BOUNDARY' is greater than
+     or equal to the required vector alignment.
+
+`vector_alignment_reachable'
+     Vector alignment is reachable for types of 32 bits or less.
+
+`vector_alignment_reachable_for_64bit'
+     Vector alignment is reachable for types of 64 bits or less.
+
+`wchar_t_char16_t_compatible'
+     Target supports `wchar_t' that is compatible with `char16_t'.
+
+`wchar_t_char32_t_compatible'
+     Target supports `wchar_t' that is compatible with `char32_t'.
+
+7.2.3.12 Local to tests in `gcc.target/i386'
+............................................
+
+`3dnow'
+     Target supports compiling `3dnow' instructions.
+
+`aes'
+     Target supports compiling `aes' instructions.
+
+`fma4'
+     Target supports compiling `fma4' instructions.
+
+`ms_hook_prologue'
+     Target supports attribute `ms_hook_prologue'.
+
+`pclmul'
+     Target supports compiling `pclmul' instructions.
+
+`sse3'
+     Target supports compiling `sse3' instructions.
+
+`sse4'
+     Target supports compiling `sse4' instructions.
+
+`sse4a'
+     Target supports compiling `sse4a' instructions.
+
+`ssse3'
+     Target supports compiling `ssse3' instructions.
+
+`vaes'
+     Target supports compiling `vaes' instructions.
+
+`vpclmul'
+     Target supports compiling `vpclmul' instructions.
+
+`xop'
+     Target supports compiling `xop' instructions.
+
+7.2.3.13 Local to tests in `gcc.target/spu/ea'
+..............................................
+
+`ealib'
+     Target `__ea' library functions are available.
+
+7.2.3.14 Local to tests in `gcc.test-framework'
+...............................................
+
+`no'
+     Always returns 0.
+
+`yes'
+     Always returns 1.
+
+
+File: gccint.info,  Node: Add Options,  Next: Require Support,  Prev: Effective-Target Keywords,  Up: Test Directives
+
+7.2.4 Features for `dg-add-options'
+-----------------------------------
+
+The supported values of FEATURE for directive `dg-add-options' are:
+
+`arm_neon'
+     NEON support.  Only ARM targets support this feature, and only then
+     in certain modes; see the *note arm_neon_ok effective target
+     keyword: arm_neon_ok.
+
+`arm_neon_fp16'
+     NEON and half-precision floating point support.  Only ARM targets
+     support this feature, and only then in certain modes; see the
+     *note arm_neon_fp16_ok effective target keyword: arm_neon_ok.
+
+`bind_pic_locally'
+     Add the target-specific flags needed to enable functions to bind
+     locally when using pic/PIC passes in the testsuite.
+
+`c99_runtime'
+     Add the target-specific flags needed to access the C99 runtime.
+
+`ieee'
+     Add the target-specific flags needed to enable full IEEE
+     compliance mode.
+
+`mips16_attribute'
+     `mips16' function attributes.  Only MIPS targets support this
+     feature, and only then in certain modes.
+
+`tls'
+     Add the target-specific flags needed to use thread-local storage.
+
+
+File: gccint.info,  Node: Require Support,  Next: Final Actions,  Prev: Add Options,  Up: Test Directives
+
+7.2.5 Variants of `dg-require-SUPPORT'
+--------------------------------------
+
+A few of the `dg-require' directives take arguments.
+
+`dg-require-iconv CODESET'
+     Skip the test if the target does not support iconv.  CODESET is
+     the codeset to convert to.
+
+`dg-require-profiling PROFOPT'
+     Skip the test if the target does not support profiling with option
+     PROFOPT.
+
+`dg-require-visibility VIS'
+     Skip the test if the target does not support the `visibility'
+     attribute.  If VIS is `""', support for `visibility("hidden")' is
+     checked, for `visibility("VIS")' otherwise.
+
+ The original `dg-require' directives were defined before there was
+support for effective-target keywords.  The directives that do not take
+arguments could be replaced with effective-target keywords.
+
+`dg-require-alias ""'
+     Skip the test if the target does not support the `alias' attribute.
+
+`dg-require-ascii-locale ""'
+     Skip the test if the host does not support an ASCII locale.
+
+`dg-require-compat-dfp ""'
+     Skip this test unless both compilers in a `compat' testsuite
+     support decimal floating point.
+
+`dg-require-cxa-atexit ""'
+     Skip the test if the target does not support `__cxa_atexit'.  This
+     is equivalent to `dg-require-effective-target cxa_atexit'.
+
+`dg-require-dll ""'
+     Skip the test if the target does not support DLL attributes.
+
+`dg-require-fork ""'
+     Skip the test if the target does not support `fork'.
+
+`dg-require-gc-sections ""'
+     Skip the test if the target's linker does not support the
+     `--gc-sections' flags.  This is equivalent to
+     `dg-require-effective-target gc-sections'.
+
+`dg-require-host-local ""'
+     Skip the test if the host is remote, rather than the same as the
+     build system.  Some tests are incompatible with DejaGnu's handling
+     of remote hosts, which involves copying the source file to the
+     host and compiling it with a relative path and "`-o a.out'".
+
+`dg-require-mkfifo ""'
+     Skip the test if the target does not support `mkfifo'.
+
+`dg-require-named-sections ""'
+     Skip the test is the target does not support named sections.  This
+     is equivalent to `dg-require-effective-target named_sections'.
+
+`dg-require-weak ""'
+     Skip the test if the target does not support weak symbols.
+
+`dg-require-weak-override ""'
+     Skip the test if the target does not support overriding weak
+     symbols.
+
+
+File: gccint.info,  Node: Final Actions,  Prev: Require Support,  Up: Test Directives
+
+7.2.6 Commands for use in `dg-final'
+------------------------------------
+
+The GCC testsuite defines the following directives to be used within
+`dg-final'.
+
+7.2.6.1 Scan a particular file
+..............................
+
+`scan-file FILENAME REGEXP [{ target/xfail SELECTOR }]'
+     Passes if REGEXP matches text in FILENAME.
+
+`scan-file-not FILENAME REGEXP [{ target/xfail SELECTOR }]'
+     Passes if REGEXP does not match text in FILENAME.
+
+`scan-module MODULE REGEXP [{ target/xfail SELECTOR }]'
+     Passes if REGEXP matches in Fortran module MODULE.
+
+7.2.6.2 Scan the assembly output
+................................
+
+`scan-assembler REGEX [{ target/xfail SELECTOR }]'
+     Passes if REGEX matches text in the test's assembler output.
+
+`scan-assembler-not REGEX [{ target/xfail SELECTOR }]'
+     Passes if REGEX does not match text in the test's assembler output.
+
+`scan-assembler-times REGEX NUM [{ target/xfail SELECTOR }]'
+     Passes if REGEX is matched exactly NUM times in the test's
+     assembler output.
+
+`scan-assembler-dem REGEX [{ target/xfail SELECTOR }]'
+     Passes if REGEX matches text in the test's demangled assembler
+     output.
+
+`scan-assembler-dem-not REGEX [{ target/xfail SELECTOR }]'
+     Passes if REGEX does not match text in the test's demangled
+     assembler output.
+
+`scan-hidden SYMBOL [{ target/xfail SELECTOR }]'
+     Passes if SYMBOL is defined as a hidden symbol in the test's
+     assembly output.
+
+`scan-not-hidden SYMBOL [{ target/xfail SELECTOR }]'
+     Passes if SYMBOL is not defined as a hidden symbol in the test's
+     assembly output.
+
+7.2.6.3 Scan optimization dump files
+....................................
+
+These commands are available for KIND of `tree', `rtl', and `ipa'.
+
+`scan-KIND-dump REGEX SUFFIX [{ target/xfail SELECTOR }]'
+     Passes if REGEX matches text in the dump file with suffix SUFFIX.
+
+`scan-KIND-dump-not REGEX SUFFIX [{ target/xfail SELECTOR }]'
+     Passes if REGEX does not match text in the dump file with suffix
+     SUFFIX.
+
+`scan-KIND-dump-times REGEX NUM SUFFIX [{ target/xfail SELECTOR }]'
+     Passes if REGEX is found exactly NUM times in the dump file with
+     suffix SUFFIX.
+
+`scan-KIND-dump-dem REGEX SUFFIX [{ target/xfail SELECTOR }]'
+     Passes if REGEX matches demangled text in the dump file with
+     suffix SUFFIX.
+
+`scan-KIND-dump-dem-not REGEX SUFFIX [{ target/xfail SELECTOR }]'
+     Passes if REGEX does not match demangled text in the dump file with
+     suffix SUFFIX.
+
+7.2.6.4 Verify that an output files exists or not
+.................................................
+
+`output-exists [{ target/xfail SELECTOR }]'
+     Passes if compiler output file exists.
+
+`output-exists-not [{ target/xfail SELECTOR }]'
+     Passes if compiler output file does not exist.
+
+7.2.6.5 Check for LTO tests
+...........................
+
+`scan-symbol REGEXP [{ target/xfail SELECTOR }]'
+     Passes if the pattern is present in the final executable.
+
+7.2.6.6 Checks for `gcov' tests
+...............................
+
+`run-gcov SOURCEFILE'
+     Check line counts in `gcov' tests.
+
+`run-gcov [branches] [calls] { OPTS SOURCEFILE }'
+     Check branch and/or call counts, in addition to line counts, in
+     `gcov' tests.
+
+7.2.6.7 Clean up generated test files
+.....................................
+
+`cleanup-coverage-files'
+     Removes coverage data files generated for this test.
+
+`cleanup-ipa-dump SUFFIX'
+     Removes IPA dump files generated for this test.
+
+`cleanup-modules'
+     Removes Fortran module files generated for this test.
+
+`cleanup-profile-file'
+     Removes profiling files generated for this test.
+
+`cleanup-repo-files'
+     Removes files generated for this test for `-frepo'.
+
+`cleanup-rtl-dump SUFFIX'
+     Removes RTL dump files generated for this test.
+
+`cleanup-saved-temps'
+     Removes files for the current test which were kept for
+     `-save-temps'.
+
+`cleanup-tree-dump SUFFIX'
+     Removes tree dump files matching SUFFIX which were generated for
+     this test.
+
+
+File: gccint.info,  Node: Ada Tests,  Next: C Tests,  Prev: Test Directives,  Up: Testsuites
+
+7.3 Ada Language Testsuites
+===========================
+
+The Ada testsuite includes executable tests from the ACATS 2.5
+testsuite, publicly available at
+`http://www.adaic.org/compilers/acats/2.5'.
+
+ These tests are integrated in the GCC testsuite in the `ada/acats'
+directory, and enabled automatically when running `make check', assuming
+the Ada language has been enabled when configuring GCC.
+
+ You can also run the Ada testsuite independently, using `make
+check-ada', or run a subset of the tests by specifying which chapter to
+run, e.g.:
+
+     $ make check-ada CHAPTERS="c3 c9"
+
+ The tests are organized by directory, each directory corresponding to
+a chapter of the Ada Reference Manual.  So for example, `c9' corresponds
+to chapter 9, which deals with tasking features of the language.
+
+ There is also an extra chapter called `gcc' containing a template for
+creating new executable tests, although this is deprecated in favor of
+the `gnat.dg' testsuite.
+
+ The tests are run using two `sh' scripts: `run_acats' and
+`run_all.sh'.  To run the tests using a simulator or a cross target,
+see the small customization section at the top of `run_all.sh'.
+
+ These tests are run using the build tree: they can be run without doing
+a `make install'.
+
+
+File: gccint.info,  Node: C Tests,  Next: libgcj Tests,  Prev: Ada Tests,  Up: Testsuites
+
+7.4 C Language Testsuites
+=========================
+
+GCC contains the following C language testsuites, in the
+`gcc/testsuite' directory:
+
+`gcc.dg'
+     This contains tests of particular features of the C compiler,
+     using the more modern `dg' harness.  Correctness tests for various
+     compiler features should go here if possible.
+
+     Magic comments determine whether the file is preprocessed,
+     compiled, linked or run.  In these tests, error and warning
+     message texts are compared against expected texts or regular
+     expressions given in comments.  These tests are run with the
+     options `-ansi -pedantic' unless other options are given in the
+     test.  Except as noted below they are not run with multiple
+     optimization options.
+
+`gcc.dg/compat'
+     This subdirectory contains tests for binary compatibility using
+     `lib/compat.exp', which in turn uses the language-independent
+     support (*note Support for testing binary compatibility: compat
+     Testing.).
+
+`gcc.dg/cpp'
+     This subdirectory contains tests of the preprocessor.
+
+`gcc.dg/debug'
+     This subdirectory contains tests for debug formats.  Tests in this
+     subdirectory are run for each debug format that the compiler
+     supports.
+
+`gcc.dg/format'
+     This subdirectory contains tests of the `-Wformat' format
+     checking.  Tests in this directory are run with and without
+     `-DWIDE'.
+
+`gcc.dg/noncompile'
+     This subdirectory contains tests of code that should not compile
+     and does not need any special compilation options.  They are run
+     with multiple optimization options, since sometimes invalid code
+     crashes the compiler with optimization.
+
+`gcc.dg/special'
+     FIXME: describe this.
+
+`gcc.c-torture'
+     This contains particular code fragments which have historically
+     broken easily.  These tests are run with multiple optimization
+     options, so tests for features which only break at some
+     optimization levels belong here.  This also contains tests to
+     check that certain optimizations occur.  It might be worthwhile to
+     separate the correctness tests cleanly from the code quality
+     tests, but it hasn't been done yet.
+
+`gcc.c-torture/compat'
+     FIXME: describe this.
+
+     This directory should probably not be used for new tests.
+
+`gcc.c-torture/compile'
+     This testsuite contains test cases that should compile, but do not
+     need to link or run.  These test cases are compiled with several
+     different combinations of optimization options.  All warnings are
+     disabled for these test cases, so this directory is not suitable if
+     you wish to test for the presence or absence of compiler warnings.
+     While special options can be set, and tests disabled on specific
+     platforms, by the use of `.x' files, mostly these test cases
+     should not contain platform dependencies.  FIXME: discuss how
+     defines such as `NO_LABEL_VALUES' and `STACK_SIZE' are used.
+
+`gcc.c-torture/execute'
+     This testsuite contains test cases that should compile, link and
+     run; otherwise the same comments as for `gcc.c-torture/compile'
+     apply.
+
+`gcc.c-torture/execute/ieee'
+     This contains tests which are specific to IEEE floating point.
+
+`gcc.c-torture/unsorted'
+     FIXME: describe this.
+
+     This directory should probably not be used for new tests.
+
+`gcc.misc-tests'
+     This directory contains C tests that require special handling.
+     Some of these tests have individual expect files, and others share
+     special-purpose expect files:
+
+    ``bprob*.c''
+          Test `-fbranch-probabilities' using
+          `gcc.misc-tests/bprob.exp', which in turn uses the generic,
+          language-independent framework (*note Support for testing
+          profile-directed optimizations: profopt Testing.).
+
+    ``gcov*.c''
+          Test `gcov' output using `gcov.exp', which in turn uses the
+          language-independent support (*note Support for testing gcov:
+          gcov Testing.).
+
+    ``i386-pf-*.c''
+          Test i386-specific support for data prefetch using
+          `i386-prefetch.exp'.
+
+`gcc.test-framework'
+
+    ``dg-*.c''
+          Test the testsuite itself using
+          `gcc.test-framework/test-framework.exp'.
+
+
+ FIXME: merge in `testsuite/README.gcc' and discuss the format of test
+cases and magic comments more.
+
+
+File: gccint.info,  Node: libgcj Tests,  Next: LTO Testing,  Prev: C Tests,  Up: Testsuites
+
+7.5 The Java library testsuites.
+================================
+
+Runtime tests are executed via `make check' in the
+`TARGET/libjava/testsuite' directory in the build tree.  Additional
+runtime tests can be checked into this testsuite.
+
+ Regression testing of the core packages in libgcj is also covered by
+the Mauve testsuite.  The Mauve Project develops tests for the Java
+Class Libraries.  These tests are run as part of libgcj testing by
+placing the Mauve tree within the libjava testsuite sources at
+`libjava/testsuite/libjava.mauve/mauve', or by specifying the location
+of that tree when invoking `make', as in `make MAUVEDIR=~/mauve check'.
+
+ To detect regressions, a mechanism in `mauve.exp' compares the
+failures for a test run against the list of expected failures in
+`libjava/testsuite/libjava.mauve/xfails' from the source hierarchy.
+Update this file when adding new failing tests to Mauve, or when fixing
+bugs in libgcj that had caused Mauve test failures.
+
+ We encourage developers to contribute test cases to Mauve.
+
+
+File: gccint.info,  Node: LTO Testing,  Next: gcov Testing,  Prev: libgcj Tests,  Up: Testsuites
+
+7.6 Support for testing link-time optimizations
+===============================================
+
+Tests for link-time optimizations usually require multiple source files
+that are compiled separately, perhaps with different sets of options.
+There are several special-purpose test directives used for these tests.
+
+`{ dg-lto-do DO-WHAT-KEYWORD }'
+     DO-WHAT-KEYWORD specifies how the test is compiled and whether it
+     is executed.  It is one of:
+
+    `assemble'
+          Compile with `-c' to produce a relocatable object file.
+
+    `link'
+          Compile, assemble, and link to produce an executable file.
+
+    `run'
+          Produce and run an executable file, which is expected to
+          return an exit code of 0.
+
+     The default is `assemble'.  That can be overridden for a set of
+     tests by redefining `dg-do-what-default' within the `.exp' file
+     for those tests.
+
+     Unlike `dg-do', `dg-lto-do' does not support an optional `target'
+     or `xfail' list.  Use `dg-skip-if', `dg-xfail-if', or
+     `dg-xfail-run-if'.
+
+`{ dg-lto-options { { OPTIONS } [{ OPTIONS }] } [{ target SELECTOR }]}'
+     This directive provides a list of one or more sets of compiler
+     options to override LTO_OPTIONS.  Each test will be compiled and
+     run with each of these sets of options.
+
+`{ dg-extra-ld-options OPTIONS [{ target SELECTOR }]}'
+     This directive adds OPTIONS to the linker options used.
+
+`{ dg-suppress-ld-options OPTIONS [{ target SELECTOR }]}'
+     This directive removes OPTIONS from the set of linker options used.
+
+
+File: gccint.info,  Node: gcov Testing,  Next: profopt Testing,  Prev: LTO Testing,  Up: Testsuites
+
+7.7 Support for testing `gcov'
+==============================
+
+Language-independent support for testing `gcov', and for checking that
+branch profiling produces expected values, is provided by the expect
+file `lib/gcov.exp'.  `gcov' tests also rely on procedures in
+`lib/gcc-dg.exp' to compile and run the test program.  A typical `gcov'
+test contains the following DejaGnu commands within comments:
+
+     { dg-options "-fprofile-arcs -ftest-coverage" }
+     { dg-do run { target native } }
+     { dg-final { run-gcov sourcefile } }
+
+ Checks of `gcov' output can include line counts, branch percentages,
+and call return percentages.  All of these checks are requested via
+commands that appear in comments in the test's source file.  Commands
+to check line counts are processed by default.  Commands to check
+branch percentages and call return percentages are processed if the
+`run-gcov' command has arguments `branches' or `calls', respectively.
+For example, the following specifies checking both, as well as passing
+`-b' to `gcov':
+
+     { dg-final { run-gcov branches calls { -b sourcefile } } }
+
+ A line count command appears within a comment on the source line that
+is expected to get the specified count and has the form `count(CNT)'.
+A test should only check line counts for lines that will get the same
+count for any architecture.
+
+ Commands to check branch percentages (`branch') and call return
+percentages (`returns') are very similar to each other.  A beginning
+command appears on or before the first of a range of lines that will
+report the percentage, and the ending command follows that range of
+lines.  The beginning command can include a list of percentages, all of
+which are expected to be found within the range.  A range is terminated
+by the next command of the same kind.  A command `branch(end)' or
+`returns(end)' marks the end of a range without starting a new one.
+For example:
+
+     if (i > 10 && j > i && j < 20)  /* branch(27 50 75) */
+                                     /* branch(end) */
+       foo (i, j);
+
+ For a call return percentage, the value specified is the percentage of
+calls reported to return.  For a branch percentage, the value is either
+the expected percentage or 100 minus that value, since the direction of
+a branch can differ depending on the target or the optimization level.
+
+ Not all branches and calls need to be checked.  A test should not
+check for branches that might be optimized away or replaced with
+predicated instructions.  Don't check for calls inserted by the
+compiler or ones that might be inlined or optimized away.
+
+ A single test can check for combinations of line counts, branch
+percentages, and call return percentages.  The command to check a line
+count must appear on the line that will report that count, but commands
+to check branch percentages and call return percentages can bracket the
+lines that report them.
+
+
+File: gccint.info,  Node: profopt Testing,  Next: compat Testing,  Prev: gcov Testing,  Up: Testsuites
+
+7.8 Support for testing profile-directed optimizations
+======================================================
+
+The file `profopt.exp' provides language-independent support for
+checking correct execution of a test built with profile-directed
+optimization.  This testing requires that a test program be built and
+executed twice.  The first time it is compiled to generate profile
+data, and the second time it is compiled to use the data that was
+generated during the first execution.  The second execution is to
+verify that the test produces the expected results.
+
+ To check that the optimization actually generated better code, a test
+can be built and run a third time with normal optimizations to verify
+that the performance is better with the profile-directed optimizations.
+`profopt.exp' has the beginnings of this kind of support.
+
+ `profopt.exp' provides generic support for profile-directed
+optimizations.  Each set of tests that uses it provides information
+about a specific optimization:
+
+`tool'
+     tool being tested, e.g., `gcc'
+
+`profile_option'
+     options used to generate profile data
+
+`feedback_option'
+     options used to optimize using that profile data
+
+`prof_ext'
+     suffix of profile data files
+
+`PROFOPT_OPTIONS'
+     list of options with which to run each test, similar to the lists
+     for torture tests
+
+`{ dg-final-generate { LOCAL-DIRECTIVE } }'
+     This directive is similar to `dg-final', but the LOCAL-DIRECTIVE
+     is run after the generation of profile data.
+
+`{ dg-final-use { LOCAL-DIRECTIVE } }'
+     The LOCAL-DIRECTIVE is run after the profile data have been used.
+
+
+File: gccint.info,  Node: compat Testing,  Next: Torture Tests,  Prev: profopt Testing,  Up: Testsuites
+
+7.9 Support for testing binary compatibility
+============================================
+
+The file `compat.exp' provides language-independent support for binary
+compatibility testing.  It supports testing interoperability of two
+compilers that follow the same ABI, or of multiple sets of compiler
+options that should not affect binary compatibility.  It is intended to
+be used for testsuites that complement ABI testsuites.
+
+ A test supported by this framework has three parts, each in a separate
+source file: a main program and two pieces that interact with each
+other to split up the functionality being tested.
+
+`TESTNAME_main.SUFFIX'
+     Contains the main program, which calls a function in file
+     `TESTNAME_x.SUFFIX'.
+
+`TESTNAME_x.SUFFIX'
+     Contains at least one call to a function in `TESTNAME_y.SUFFIX'.
+
+`TESTNAME_y.SUFFIX'
+     Shares data with, or gets arguments from, `TESTNAME_x.SUFFIX'.
+
+ Within each test, the main program and one functional piece are
+compiled by the GCC under test.  The other piece can be compiled by an
+alternate compiler.  If no alternate compiler is specified, then all
+three source files are all compiled by the GCC under test.  You can
+specify pairs of sets of compiler options.  The first element of such a
+pair specifies options used with the GCC under test, and the second
+element of the pair specifies options used with the alternate compiler.
+Each test is compiled with each pair of options.
+
+ `compat.exp' defines default pairs of compiler options.  These can be
+overridden by defining the environment variable `COMPAT_OPTIONS' as:
+
+     COMPAT_OPTIONS="[list [list {TST1} {ALT1}]
+       ...[list {TSTN} {ALTN}]]"
+
+ where TSTI and ALTI are lists of options, with TSTI used by the
+compiler under test and ALTI used by the alternate compiler.  For
+example, with `[list [list {-g -O0} {-O3}] [list {-fpic} {-fPIC -O2}]]',
+the test is first built with `-g -O0' by the compiler under test and
+with `-O3' by the alternate compiler.  The test is built a second time
+using `-fpic' by the compiler under test and `-fPIC -O2' by the
+alternate compiler.
+
+ An alternate compiler is specified by defining an environment variable
+to be the full pathname of an installed compiler; for C define
+`ALT_CC_UNDER_TEST', and for C++ define `ALT_CXX_UNDER_TEST'.  These
+will be written to the `site.exp' file used by DejaGnu.  The default is
+to build each test with the compiler under test using the first of each
+pair of compiler options from `COMPAT_OPTIONS'.  When
+`ALT_CC_UNDER_TEST' or `ALT_CXX_UNDER_TEST' is `same', each test is
+built using the compiler under test but with combinations of the
+options from `COMPAT_OPTIONS'.
+
+ To run only the C++ compatibility suite using the compiler under test
+and another version of GCC using specific compiler options, do the
+following from `OBJDIR/gcc':
+
+     rm site.exp
+     make -k \
+       ALT_CXX_UNDER_TEST=${alt_prefix}/bin/g++ \
+       COMPAT_OPTIONS="LISTS AS SHOWN ABOVE" \
+       check-c++ \
+       RUNTESTFLAGS="compat.exp"
+
+ A test that fails when the source files are compiled with different
+compilers, but passes when the files are compiled with the same
+compiler, demonstrates incompatibility of the generated code or runtime
+support.  A test that fails for the alternate compiler but passes for
+the compiler under test probably tests for a bug that was fixed in the
+compiler under test but is present in the alternate compiler.
+
+ The binary compatibility tests support a small number of test framework
+commands that appear within comments in a test file.
+
+`dg-require-*'
+     These commands can be used in `TESTNAME_main.SUFFIX' to skip the
+     test if specific support is not available on the target.
+
+`dg-options'
+     The specified options are used for compiling this particular source
+     file, appended to the options from `COMPAT_OPTIONS'.  When this
+     command appears in `TESTNAME_main.SUFFIX' the options are also
+     used to link the test program.
+
+`dg-xfail-if'
+     This command can be used in a secondary source file to specify that
+     compilation is expected to fail for particular options on
+     particular targets.
+
+
+File: gccint.info,  Node: Torture Tests,  Prev: compat Testing,  Up: Testsuites
+
+7.10 Support for torture testing using multiple options
+=======================================================
+
+Throughout the compiler testsuite there are several directories whose
+tests are run multiple times, each with a different set of options.
+These are known as torture tests.  `lib/torture-options.exp' defines
+procedures to set up these lists:
+
+`torture-init'
+     Initialize use of torture lists.
+
+`set-torture-options'
+     Set lists of torture options to use for tests with and without
+     loops.  Optionally combine a set of torture options with a set of
+     other options, as is done with Objective-C runtime options.
+
+`torture-finish'
+     Finalize use of torture lists.
+
+ The `.exp' file for a set of tests that use torture options must
+include calls to these three procedures if:
+
+   * It calls `gcc-dg-runtest' and overrides DG_TORTURE_OPTIONS.
+
+   * It calls ${TOOL}`-torture' or ${TOOL}`-torture-execute', where
+     TOOL is `c', `fortran', or `objc'.
+
+   * It calls `dg-pch'.
+
+ It is not necessary for a `.exp' file that calls `gcc-dg-runtest' to
+call the torture procedures if the tests should use the list in
+DG_TORTURE_OPTIONS defined in `gcc-dg.exp'.
+
+ Most uses of torture options can override the default lists by defining
+TORTURE_OPTIONS or add to the default list by defining
+ADDITIONAL_TORTURE_OPTIONS.  Define these in a `.dejagnurc' file or add
+them to the `site.exp' file; for example
+
+     set ADDITIONAL_TORTURE_OPTIONS  [list \
+       { -O2 -ftree-loop-linear } \
+       { -O2 -fpeel-loops } ]
+
+
+File: gccint.info,  Node: Options,  Next: Passes,  Prev: Testsuites,  Up: Top
+
+8 Option specification files
+****************************
+
+Most GCC command-line options are described by special option
+definition files, the names of which conventionally end in `.opt'.
+This chapter describes the format of these files.
+
+* Menu:
+
+* Option file format::   The general layout of the files
+* Option properties::    Supported option properties
+
+
+File: gccint.info,  Node: Option file format,  Next: Option properties,  Up: Options
+
+8.1 Option file format
+======================
+
+Option files are a simple list of records in which each field occupies
+its own line and in which the records themselves are separated by blank
+lines.  Comments may appear on their own line anywhere within the file
+and are preceded by semicolons.  Whitespace is allowed before the
+semicolon.
+
+ The files can contain the following types of record:
+
+   * A language definition record.  These records have two fields: the
+     string `Language' and the name of the language.  Once a language
+     has been declared in this way, it can be used as an option
+     property.  *Note Option properties::.
+
+   * A target specific save record to save additional information. These
+     records have two fields: the string `TargetSave', and a
+     declaration type to go in the `cl_target_option' structure.
+
+   * A variable record to define a variable used to store option
+     information.  These records have two fields: the string
+     `Variable', and a declaration of the type and name of the
+     variable, optionally with an initializer (but without any trailing
+     `;').  These records may be used for variables used for many
+     options where declaring the initializer in a single option
+     definition record, or duplicating it in many records, would be
+     inappropriate, or for variables set in option handlers rather than
+     referenced by `Var' properties.
+
+   * A variable record to define a variable used to store option
+     information.  These records have two fields: the string
+     `TargetVariable', and a declaration of the type and name of the
+     variable, optionally with an initializer (but without any trailing
+     `;').  `TargetVariable' is a combination of `Variable' and
+     `TargetSave' records in that the variable is defined in the
+     `gcc_options' structure, but these variables are also stored in
+     the `cl_target_option' structure.  The variables are saved in the
+     target save code and restored in the target restore code.
+
+   * A variable record to record any additional files that the
+     `options.h' file should include.  This is useful to provide
+     enumeration or structure definitions needed for target variables.
+     These records have two fields: the string `HeaderInclude' and the
+     name of the include file.
+
+   * A variable record to record any additional files that the
+     `options.c' file should include.  This is useful to provide inline
+     functions needed for target variables and/or `#ifdef' sequences to
+     properly set up the initialization.  These records have two
+     fields: the string `SourceInclude' and the name of the include
+     file.
+
+   * An enumeration record to define a set of strings that may be used
+     as arguments to an option or options.  These records have three
+     fields: the string `Enum', a space-separated list of properties
+     and help text used to describe the set of strings in `--help'
+     output.  Properties use the same format as option properties; the
+     following are valid:
+    `Name(NAME)'
+          This property is required; NAME must be a name (suitable for
+          use in C identifiers) used to identify the set of strings in
+          `Enum' option properties.
+
+    `Type(TYPE)'
+          This property is required; TYPE is the C type for variables
+          set by options using this enumeration together with `Var'.
+
+    `UnknownError(MESSAGE)'
+          The message MESSAGE will be used as an error message if the
+          argument is invalid; for enumerations without `UnknownError',
+          a generic error message is used.  MESSAGE should contain a
+          single `%qs' format, which will be used to format the invalid
+          argument.
+
+   * An enumeration value record to define one of the strings in a set
+     given in an `Enum' record.  These records have two fields: the
+     string `EnumValue' and a space-separated list of properties.
+     Properties use the same format as option properties; the following
+     are valid:
+    `Enum(NAME)'
+          This property is required; NAME says which `Enum' record this
+          `EnumValue' record corresponds to.
+
+    `String(STRING)'
+          This property is required; STRING is the string option
+          argument being described by this record.
+
+    `Value(VALUE)'
+          This property is required; it says what value (representable
+          as `int') should be used for the given string.
+
+    `Canonical'
+          This property is optional.  If present, it says the present
+          string is the canonical one among all those with the given
+          value.  Other strings yielding that value will be mapped to
+          this one so specs do not need to handle them.
+
+    `DriverOnly'
+          This property is optional.  If present, the present string
+          will only be accepted by the driver.  This is used for cases
+          such as `-march=native' that are processed by the driver so
+          that `gcc -v' shows how the options chosen depended on the
+          system on which the compiler was run.
+
+   * An option definition record.  These records have the following
+     fields:
+       1. the name of the option, with the leading "-" removed
+
+       2. a space-separated list of option properties (*note Option
+          properties::)
+
+       3. the help text to use for `--help' (omitted if the second field
+          contains the `Undocumented' property).
+
+     By default, all options beginning with "f", "W" or "m" are
+     implicitly assumed to take a "no-" form.  This form should not be
+     listed separately.  If an option beginning with one of these
+     letters does not have a "no-" form, you can use the
+     `RejectNegative' property to reject it.
+
+     The help text is automatically line-wrapped before being displayed.
+     Normally the name of the option is printed on the left-hand side of
+     the output and the help text is printed on the right.  However, if
+     the help text contains a tab character, the text to the left of
+     the tab is used instead of the option's name and the text to the
+     right of the tab forms the help text.  This allows you to
+     elaborate on what type of argument the option takes.
+
+   * A target mask record.  These records have one field of the form
+     `Mask(X)'.  The options-processing script will automatically
+     allocate a bit in `target_flags' (*note Run-time Target::) for
+     each mask name X and set the macro `MASK_X' to the appropriate
+     bitmask.  It will also declare a `TARGET_X' macro that has the
+     value 1 when bit `MASK_X' is set and 0 otherwise.
+
+     They are primarily intended to declare target masks that are not
+     associated with user options, either because these masks represent
+     internal switches or because the options are not available on all
+     configurations and yet the masks always need to be defined.
+
+
+File: gccint.info,  Node: Option properties,  Prev: Option file format,  Up: Options
+
+8.2 Option properties
+=====================
+
+The second field of an option record can specify any of the following
+properties.  When an option takes an argument, it is enclosed in
+parentheses following the option property name.  The parser that
+handles option files is quite simplistic, and will be tricked by any
+nested parentheses within the argument text itself; in this case, the
+entire option argument can be wrapped in curly braces within the
+parentheses to demarcate it, e.g.:
+
+     Condition({defined (USE_CYGWIN_LIBSTDCXX_WRAPPERS)})
+
+`Common'
+     The option is available for all languages and targets.
+
+`Target'
+     The option is available for all languages but is target-specific.
+
+`Driver'
+     The option is handled by the compiler driver using code not shared
+     with the compilers proper (`cc1' etc.).
+
+`LANGUAGE'
+     The option is available when compiling for the given language.
+
+     It is possible to specify several different languages for the same
+     option.  Each LANGUAGE must have been declared by an earlier
+     `Language' record.  *Note Option file format::.
+
+`RejectDriver'
+     The option is only handled by the compilers proper (`cc1' etc.)
+     and should not be accepted by the driver.
+
+`RejectNegative'
+     The option does not have a "no-" form.  All options beginning with
+     "f", "W" or "m" are assumed to have a "no-" form unless this
+     property is used.
+
+`Negative(OTHERNAME)'
+     The option will turn off another option OTHERNAME, which is the
+     option name with the leading "-" removed.  This chain action will
+     propagate through the `Negative' property of the option to be
+     turned off.
+
+`Joined'
+`Separate'
+     The option takes a mandatory argument.  `Joined' indicates that
+     the option and argument can be included in the same `argv' entry
+     (as with `-mflush-func=NAME', for example).  `Separate' indicates
+     that the option and argument can be separate `argv' entries (as
+     with `-o').  An option is allowed to have both of these properties.
+
+`JoinedOrMissing'
+     The option takes an optional argument.  If the argument is given,
+     it will be part of the same `argv' entry as the option itself.
+
+     This property cannot be used alongside `Joined' or `Separate'.
+
+`MissingArgError(MESSAGE)'
+     For an option marked `Joined' or `Separate', the message MESSAGE
+     will be used as an error message if the mandatory argument is
+     missing; for options without `MissingArgError', a generic error
+     message is used.  MESSAGE should contain a single `%qs' format,
+     which will be used to format the name of the option passed.
+
+`Args(N)'
+     For an option marked `Separate', indicate that it takes N
+     arguments.  The default is 1.
+
+`UInteger'
+     The option's argument is a non-negative integer.  The option parser
+     will check and convert the argument before passing it to the
+     relevant option handler.  `UInteger' should also be used on
+     options like `-falign-loops' where both `-falign-loops' and
+     `-falign-loops'=N are supported to make sure the saved options are
+     given a full integer.
+
+`NoDriverArg'
+     For an option marked `Separate', the option only takes an argument
+     in the compiler proper, not in the driver.  This is for
+     compatibility with existing options that are used both directly and
+     via `-Wp,'; new options should not have this property.
+
+`Var(VAR)'
+     The state of this option should be stored in variable VAR
+     (actually a macro for `global_options.x_VAR').  The way that the
+     state is stored depends on the type of option:
+
+        * If the option uses the `Mask' or `InverseMask' properties,
+          VAR is the integer variable that contains the mask.
+
+        * If the option is a normal on/off switch, VAR is an integer
+          variable that is nonzero when the option is enabled.  The
+          options parser will set the variable to 1 when the positive
+          form of the option is used and 0 when the "no-" form is used.
+
+        * If the option takes an argument and has the `UInteger'
+          property, VAR is an integer variable that stores the value of
+          the argument.
+
+        * If the option takes an argument and has the `Enum' property,
+          VAR is a variable (type given in the `Type' property of the
+          `Enum' record whose `Name' property has the same argument as
+          the `Enum' property of this option) that stores the value of
+          the argument.
+
+        * If the option has the `Defer' property, VAR is a pointer to a
+          `VEC(cl_deferred_option,heap)' that stores the option for
+          later processing.  (VAR is declared with type `void *' and
+          needs to be cast to `VEC(cl_deferred_option,heap)' before
+          use.)
+
+        * Otherwise, if the option takes an argument, VAR is a pointer
+          to the argument string.  The pointer will be null if the
+          argument is optional and wasn't given.
+
+     The option-processing script will usually zero-initialize VAR.
+     You can modify this behavior using `Init'.
+
+`Var(VAR, SET)'
+     The option controls an integer variable VAR and is active when VAR
+     equals SET.  The option parser will set VAR to SET when the
+     positive form of the option is used and `!SET' when the "no-" form
+     is used.
+
+     VAR is declared in the same way as for the single-argument form
+     described above.
+
+`Init(VALUE)'
+     The variable specified by the `Var' property should be statically
+     initialized to VALUE.  If more than one option using the same
+     variable specifies `Init', all must specify the same initializer.
+
+`Mask(NAME)'
+     The option is associated with a bit in the `target_flags' variable
+     (*note Run-time Target::) and is active when that bit is set.  You
+     may also specify `Var' to select a variable other than
+     `target_flags'.
+
+     The options-processing script will automatically allocate a unique
+     bit for the option.  If the option is attached to `target_flags',
+     the script will set the macro `MASK_NAME' to the appropriate
+     bitmask.  It will also declare a `TARGET_NAME' macro that has the
+     value 1 when the option is active and 0 otherwise.  If you use
+     `Var' to attach the option to a different variable, the associated
+     macros are called `OPTION_MASK_NAME' and `OPTION_NAME'
+     respectively.
+
+     You can disable automatic bit allocation using `MaskExists'.
+
+`InverseMask(OTHERNAME)'
+`InverseMask(OTHERNAME, THISNAME)'
+     The option is the inverse of another option that has the
+     `Mask(OTHERNAME)' property.  If THISNAME is given, the
+     options-processing script will declare a `TARGET_THISNAME' macro
+     that is 1 when the option is active and 0 otherwise.
+
+`MaskExists'
+     The mask specified by the `Mask' property already exists.  No
+     `MASK' or `TARGET' definitions should be added to `options.h' in
+     response to this option record.
+
+     The main purpose of this property is to support synonymous options.
+     The first option should use `Mask(NAME)' and the others should use
+     `Mask(NAME) MaskExists'.
+
+`Enum(NAME)'
+     The option's argument is a string from the set of strings
+     associated with the corresponding `Enum' record.  The string is
+     checked and converted to the integer specified in the corresponding
+     `EnumValue' record before being passed to option handlers.
+
+`Defer'
+     The option should be stored in a vector, specified with `Var', for
+     later processing.
+
+`Alias(OPT)'
+`Alias(OPT, ARG)'
+`Alias(OPT, POSARG, NEGARG)'
+     The option is an alias for `-OPT'.  In the first form, any
+     argument passed to the alias is considered to be passed to `-OPT',
+     and `-OPT' is considered to be negated if the alias is used in
+     negated form.  In the second form, the alias may not be negated or
+     have an argument, and POSARG is considered to be passed as an
+     argument to `-OPT'.  In the third form, the alias may not have an
+     argument, if the alias is used in the positive form then POSARG is
+     considered to be passed to `-OPT', and if the alias is used in the
+     negative form then NEGARG is considered to be passed to `-OPT'.
+
+     Aliases should not specify `Var' or `Mask' or `UInteger'.  Aliases
+     should normally specify the same languages as the target of the
+     alias; the flags on the target will be used to determine any
+     diagnostic for use of an option for the wrong language, while
+     those on the alias will be used to identify what command-line text
+     is the option and what text is any argument to that option.
+
+     When an `Alias' definition is used for an option, driver specs do
+     not need to handle it and no `OPT_' enumeration value is defined
+     for it; only the canonical form of the option will be seen in those
+     places.
+
+`Ignore'
+     This option is ignored apart from printing any warning specified
+     using `Warn'.  The option will not be seen by specs and no `OPT_'
+     enumeration value is defined for it.
+
+`SeparateAlias'
+     For an option marked with `Joined', `Separate' and `Alias', the
+     option only acts as an alias when passed a separate argument; with
+     a joined argument it acts as a normal option, with an `OPT_'
+     enumeration value.  This is for compatibility with the Java `-d'
+     option and should not be used for new options.
+
+`Warn(MESSAGE)'
+     If this option is used, output the warning MESSAGE.  MESSAGE is a
+     format string, either taking a single operand with a `%qs' format
+     which is the option name, or not taking any operands, which is
+     passed to the `warning' function.  If an alias is marked `Warn',
+     the target of the alias must not also be marked `Warn'.
+
+`Report'
+     The state of the option should be printed by `-fverbose-asm'.
+
+`Warning'
+     This is a warning option and should be shown as such in `--help'
+     output.  This flag does not currently affect anything other than
+     `--help'.
+
+`Optimization'
+     This is an optimization option.  It should be shown as such in
+     `--help' output, and any associated variable named using `Var'
+     should be saved and restored when the optimization level is
+     changed with `optimize' attributes.
+
+`Undocumented'
+     The option is deliberately missing documentation and should not be
+     included in the `--help' output.
+
+`Condition(COND)'
+     The option should only be accepted if preprocessor condition COND
+     is true.  Note that any C declarations associated with the option
+     will be present even if COND is false; COND simply controls
+     whether the option is accepted and whether it is printed in the
+     `--help' output.
+
+`Save'
+     Build the `cl_target_option' structure to hold a copy of the
+     option, add the functions `cl_target_option_save' and
+     `cl_target_option_restore' to save and restore the options.
+
+`SetByCombined'
+     The option may also be set by a combined option such as
+     `-ffast-math'.  This causes the `gcc_options' struct to have a
+     field `frontend_set_NAME', where `NAME' is the name of the field
+     holding the value of this option (without the leading `x_').  This
+     gives the front end a way to indicate that the value has been set
+     explicitly and should not be changed by the combined option.  For
+     example, some front ends use this to prevent `-ffast-math' and
+     `-fno-fast-math' from changing the value of `-fmath-errno' for
+     languages that do not use `errno'.
+
+
+
+File: gccint.info,  Node: Passes,  Next: GENERIC,  Prev: Options,  Up: Top
+
+9 Passes and Files of the Compiler
+**********************************
+
+This chapter is dedicated to giving an overview of the optimization and
+code generation passes of the compiler.  In the process, it describes
+some of the language front end interface, though this description is no
+where near complete.
+
+* Menu:
+
+* Parsing pass::         The language front end turns text into bits.
+* Gimplification pass::  The bits are turned into something we can optimize.
+* Pass manager::         Sequencing the optimization passes.
+* Tree SSA passes::      Optimizations on a high-level representation.
+* RTL passes::           Optimizations on a low-level representation.
+
+
+File: gccint.info,  Node: Parsing pass,  Next: Gimplification pass,  Up: Passes
+
+9.1 Parsing pass
+================
+
+The language front end is invoked only once, via
+`lang_hooks.parse_file', to parse the entire input.  The language front
+end may use any intermediate language representation deemed
+appropriate.  The C front end uses GENERIC trees (*note GENERIC::), plus
+a double handful of language specific tree codes defined in
+`c-common.def'.  The Fortran front end uses a completely different
+private representation.
+
+ At some point the front end must translate the representation used in
+the front end to a representation understood by the language-independent
+portions of the compiler.  Current practice takes one of two forms.
+The C front end manually invokes the gimplifier (*note GIMPLE::) on
+each function, and uses the gimplifier callbacks to convert the
+language-specific tree nodes directly to GIMPLE before passing the
+function off to be compiled.  The Fortran front end converts from a
+private representation to GENERIC, which is later lowered to GIMPLE
+when the function is compiled.  Which route to choose probably depends
+on how well GENERIC (plus extensions) can be made to match up with the
+source language and necessary parsing data structures.
+
+ BUG: Gimplification must occur before nested function lowering, and
+nested function lowering must be done by the front end before passing
+the data off to cgraph.
+
+ TODO: Cgraph should control nested function lowering.  It would only
+be invoked when it is certain that the outer-most function is used.
+
+ TODO: Cgraph needs a gimplify_function callback.  It should be invoked
+when (1) it is certain that the function is used, (2) warning flags
+specified by the user require some amount of compilation in order to
+honor, (3) the language indicates that semantic analysis is not
+complete until gimplification occurs.  Hum... this sounds overly
+complicated.  Perhaps we should just have the front end gimplify
+always; in most cases it's only one function call.
+
+ The front end needs to pass all function definitions and top level
+declarations off to the middle-end so that they can be compiled and
+emitted to the object file.  For a simple procedural language, it is
+usually most convenient to do this as each top level declaration or
+definition is seen.  There is also a distinction to be made between
+generating functional code and generating complete debug information.
+The only thing that is absolutely required for functional code is that
+function and data _definitions_ be passed to the middle-end.  For
+complete debug information, function, data and type declarations should
+all be passed as well.
+
+ In any case, the front end needs each complete top-level function or
+data declaration, and each data definition should be passed to
+`rest_of_decl_compilation'.  Each complete type definition should be
+passed to `rest_of_type_compilation'.  Each function definition should
+be passed to `cgraph_finalize_function'.
+
+ TODO: I know rest_of_compilation currently has all sorts of RTL
+generation semantics.  I plan to move all code generation bits (both
+Tree and RTL) to compile_function.  Should we hide cgraph from the
+front ends and move back to rest_of_compilation as the official
+interface?  Possibly we should rename all three interfaces such that
+the names match in some meaningful way and that is more descriptive
+than "rest_of".
+
+ The middle-end will, at its option, emit the function and data
+definitions immediately or queue them for later processing.
+
+
+File: gccint.info,  Node: Gimplification pass,  Next: Pass manager,  Prev: Parsing pass,  Up: Passes
+
+9.2 Gimplification pass
+=======================
+
+"Gimplification" is a whimsical term for the process of converting the
+intermediate representation of a function into the GIMPLE language
+(*note GIMPLE::).  The term stuck, and so words like "gimplification",
+"gimplify", "gimplifier" and the like are sprinkled throughout this
+section of code.
+
+ While a front end may certainly choose to generate GIMPLE directly if
+it chooses, this can be a moderately complex process unless the
+intermediate language used by the front end is already fairly simple.
+Usually it is easier to generate GENERIC trees plus extensions and let
+the language-independent gimplifier do most of the work.
+
+ The main entry point to this pass is `gimplify_function_tree' located
+in `gimplify.c'.  From here we process the entire function gimplifying
+each statement in turn.  The main workhorse for this pass is
+`gimplify_expr'.  Approximately everything passes through here at least
+once, and it is from here that we invoke the `lang_hooks.gimplify_expr'
+callback.
+
+ The callback should examine the expression in question and return
+`GS_UNHANDLED' if the expression is not a language specific construct
+that requires attention.  Otherwise it should alter the expression in
+some way to such that forward progress is made toward producing valid
+GIMPLE.  If the callback is certain that the transformation is complete
+and the expression is valid GIMPLE, it should return `GS_ALL_DONE'.
+Otherwise it should return `GS_OK', which will cause the expression to
+be processed again.  If the callback encounters an error during the
+transformation (because the front end is relying on the gimplification
+process to finish semantic checks), it should return `GS_ERROR'.
+
+
+File: gccint.info,  Node: Pass manager,  Next: Tree SSA passes,  Prev: Gimplification pass,  Up: Passes
+
+9.3 Pass manager
+================
+
+The pass manager is located in `passes.c', `tree-optimize.c' and
+`tree-pass.h'.  Its job is to run all of the individual passes in the
+correct order, and take care of standard bookkeeping that applies to
+every pass.
+
+ The theory of operation is that each pass defines a structure that
+represents everything we need to know about that pass--when it should
+be run, how it should be run, what intermediate language form or
+on-the-side data structures it needs.  We register the pass to be run
+in some particular order, and the pass manager arranges for everything
+to happen in the correct order.
+
+ The actuality doesn't completely live up to the theory at present.
+Command-line switches and `timevar_id_t' enumerations must still be
+defined elsewhere.  The pass manager validates constraints but does not
+attempt to (re-)generate data structures or lower intermediate language
+form based on the requirements of the next pass.  Nevertheless, what is
+present is useful, and a far sight better than nothing at all.
+
+ Each pass should have a unique name.  Each pass may have its own dump
+file (for GCC debugging purposes).  Passes with a name starting with a
+star do not dump anything.  Sometimes passes are supposed to share a
+dump file / option name.  To still give these unique names, you can use
+a prefix that is delimited by a space from the part that is used for
+the dump file / option name.  E.g. When the pass name is "ud dce", the
+name used for dump file/options is "dce".
+
+ TODO: describe the global variables set up by the pass manager, and a
+brief description of how a new pass should use it.  I need to look at
+what info RTL passes use first...
+
+
+File: gccint.info,  Node: Tree SSA passes,  Next: RTL passes,  Prev: Pass manager,  Up: Passes
+
+9.4 Tree SSA passes
+===================
+
+The following briefly describes the Tree optimization passes that are
+run after gimplification and what source files they are located in.
+
+   * Remove useless statements
+
+     This pass is an extremely simple sweep across the gimple code in
+     which we identify obviously dead code and remove it.  Here we do
+     things like simplify `if' statements with constant conditions,
+     remove exception handling constructs surrounding code that
+     obviously cannot throw, remove lexical bindings that contain no
+     variables, and other assorted simplistic cleanups.  The idea is to
+     get rid of the obvious stuff quickly rather than wait until later
+     when it's more work to get rid of it.  This pass is located in
+     `tree-cfg.c' and described by `pass_remove_useless_stmts'.
+
+   * Mudflap declaration registration
+
+     If mudflap (*note -fmudflap -fmudflapth -fmudflapir: (gcc)Optimize
+     Options.) is enabled, we generate code to register some variable
+     declarations with the mudflap runtime.  Specifically, the runtime
+     tracks the lifetimes of those variable declarations that have
+     their addresses taken, or whose bounds are unknown at compile time
+     (`extern').  This pass generates new exception handling constructs
+     (`try'/`finally'), and so must run before those are lowered.  In
+     addition, the pass enqueues declarations of static variables whose
+     lifetimes extend to the entire program.  The pass is located in
+     `tree-mudflap.c' and is described by `pass_mudflap_1'.
+
+   * OpenMP lowering
+
+     If OpenMP generation (`-fopenmp') is enabled, this pass lowers
+     OpenMP constructs into GIMPLE.
+
+     Lowering of OpenMP constructs involves creating replacement
+     expressions for local variables that have been mapped using data
+     sharing clauses, exposing the control flow of most synchronization
+     directives and adding region markers to facilitate the creation of
+     the control flow graph.  The pass is located in `omp-low.c' and is
+     described by `pass_lower_omp'.
+
+   * OpenMP expansion
+
+     If OpenMP generation (`-fopenmp') is enabled, this pass expands
+     parallel regions into their own functions to be invoked by the
+     thread library.  The pass is located in `omp-low.c' and is
+     described by `pass_expand_omp'.
+
+   * Lower control flow
+
+     This pass flattens `if' statements (`COND_EXPR') and moves lexical
+     bindings (`BIND_EXPR') out of line.  After this pass, all `if'
+     statements will have exactly two `goto' statements in its `then'
+     and `else' arms.  Lexical binding information for each statement
+     will be found in `TREE_BLOCK' rather than being inferred from its
+     position under a `BIND_EXPR'.  This pass is found in
+     `gimple-low.c' and is described by `pass_lower_cf'.
+
+   * Lower exception handling control flow
+
+     This pass decomposes high-level exception handling constructs
+     (`TRY_FINALLY_EXPR' and `TRY_CATCH_EXPR') into a form that
+     explicitly represents the control flow involved.  After this pass,
+     `lookup_stmt_eh_region' will return a non-negative number for any
+     statement that may have EH control flow semantics; examine
+     `tree_can_throw_internal' or `tree_can_throw_external' for exact
+     semantics.  Exact control flow may be extracted from
+     `foreach_reachable_handler'.  The EH region nesting tree is defined
+     in `except.h' and built in `except.c'.  The lowering pass itself
+     is in `tree-eh.c' and is described by `pass_lower_eh'.
+
+   * Build the control flow graph
+
+     This pass decomposes a function into basic blocks and creates all
+     of the edges that connect them.  It is located in `tree-cfg.c' and
+     is described by `pass_build_cfg'.
+
+   * Find all referenced variables
+
+     This pass walks the entire function and collects an array of all
+     variables referenced in the function, `referenced_vars'.  The
+     index at which a variable is found in the array is used as a UID
+     for the variable within this function.  This data is needed by the
+     SSA rewriting routines.  The pass is located in `tree-dfa.c' and
+     is described by `pass_referenced_vars'.
+
+   * Enter static single assignment form
+
+     This pass rewrites the function such that it is in SSA form.  After
+     this pass, all `is_gimple_reg' variables will be referenced by
+     `SSA_NAME', and all occurrences of other variables will be
+     annotated with `VDEFS' and `VUSES'; PHI nodes will have been
+     inserted as necessary for each basic block.  This pass is located
+     in `tree-ssa.c' and is described by `pass_build_ssa'.
+
+   * Warn for uninitialized variables
+
+     This pass scans the function for uses of `SSA_NAME's that are fed
+     by default definition.  For non-parameter variables, such uses are
+     uninitialized.  The pass is run twice, before and after
+     optimization (if turned on).  In the first pass we only warn for
+     uses that are positively uninitialized; in the second pass we warn
+     for uses that are possibly uninitialized.  The pass is located in
+     `tree-ssa.c' and is defined by `pass_early_warn_uninitialized' and
+     `pass_late_warn_uninitialized'.
+
+   * Dead code elimination
+
+     This pass scans the function for statements without side effects
+     whose result is unused.  It does not do memory life analysis, so
+     any value that is stored in memory is considered used.  The pass
+     is run multiple times throughout the optimization process.  It is
+     located in `tree-ssa-dce.c' and is described by `pass_dce'.
+
+   * Dominator optimizations
+
+     This pass performs trivial dominator-based copy and constant
+     propagation, expression simplification, and jump threading.  It is
+     run multiple times throughout the optimization process.  It is
+     located in `tree-ssa-dom.c' and is described by `pass_dominator'.
+
+   * Forward propagation of single-use variables
+
+     This pass attempts to remove redundant computation by substituting
+     variables that are used once into the expression that uses them and
+     seeing if the result can be simplified.  It is located in
+     `tree-ssa-forwprop.c' and is described by `pass_forwprop'.
+
+   * Copy Renaming
+
+     This pass attempts to change the name of compiler temporaries
+     involved in copy operations such that SSA->normal can coalesce the
+     copy away.  When compiler temporaries are copies of user
+     variables, it also renames the compiler temporary to the user
+     variable resulting in better use of user symbols.  It is located
+     in `tree-ssa-copyrename.c' and is described by `pass_copyrename'.
+
+   * PHI node optimizations
+
+     This pass recognizes forms of PHI inputs that can be represented as
+     conditional expressions and rewrites them into straight line code.
+     It is located in `tree-ssa-phiopt.c' and is described by
+     `pass_phiopt'.
+
+   * May-alias optimization
+
+     This pass performs a flow sensitive SSA-based points-to analysis.
+     The resulting may-alias, must-alias, and escape analysis
+     information is used to promote variables from in-memory
+     addressable objects to non-aliased variables that can be renamed
+     into SSA form.  We also update the `VDEF'/`VUSE' memory tags for
+     non-renameable aggregates so that we get fewer false kills.  The
+     pass is located in `tree-ssa-alias.c' and is described by
+     `pass_may_alias'.
+
+     Interprocedural points-to information is located in
+     `tree-ssa-structalias.c' and described by `pass_ipa_pta'.
+
+   * Profiling
+
+     This pass rewrites the function in order to collect runtime block
+     and value profiling data.  Such data may be fed back into the
+     compiler on a subsequent run so as to allow optimization based on
+     expected execution frequencies.  The pass is located in
+     `predict.c' and is described by `pass_profile'.
+
+   * Lower complex arithmetic
+
+     This pass rewrites complex arithmetic operations into their
+     component scalar arithmetic operations.  The pass is located in
+     `tree-complex.c' and is described by `pass_lower_complex'.
+
+   * Scalar replacement of aggregates
+
+     This pass rewrites suitable non-aliased local aggregate variables
+     into a set of scalar variables.  The resulting scalar variables are
+     rewritten into SSA form, which allows subsequent optimization
+     passes to do a significantly better job with them.  The pass is
+     located in `tree-sra.c' and is described by `pass_sra'.
+
+   * Dead store elimination
+
+     This pass eliminates stores to memory that are subsequently
+     overwritten by another store, without any intervening loads.  The
+     pass is located in `tree-ssa-dse.c' and is described by `pass_dse'.
+
+   * Tail recursion elimination
+
+     This pass transforms tail recursion into a loop.  It is located in
+     `tree-tailcall.c' and is described by `pass_tail_recursion'.
+
+   * Forward store motion
+
+     This pass sinks stores and assignments down the flowgraph closer
+     to their use point.  The pass is located in `tree-ssa-sink.c' and
+     is described by `pass_sink_code'.
+
+   * Partial redundancy elimination
+
+     This pass eliminates partially redundant computations, as well as
+     performing load motion.  The pass is located in `tree-ssa-pre.c'
+     and is described by `pass_pre'.
+
+     Just before partial redundancy elimination, if
+     `-funsafe-math-optimizations' is on, GCC tries to convert
+     divisions to multiplications by the reciprocal.  The pass is
+     located in `tree-ssa-math-opts.c' and is described by
+     `pass_cse_reciprocal'.
+
+   * Full redundancy elimination
+
+     This is a simpler form of PRE that only eliminates redundancies
+     that occur an all paths.  It is located in `tree-ssa-pre.c' and
+     described by `pass_fre'.
+
+   * Loop optimization
+
+     The main driver of the pass is placed in `tree-ssa-loop.c' and
+     described by `pass_loop'.
+
+     The optimizations performed by this pass are:
+
+     Loop invariant motion.  This pass moves only invariants that would
+     be hard to handle on RTL level (function calls, operations that
+     expand to nontrivial sequences of insns).  With `-funswitch-loops'
+     it also moves operands of conditions that are invariant out of the
+     loop, so that we can use just trivial invariantness analysis in
+     loop unswitching.  The pass also includes store motion.  The pass
+     is implemented in `tree-ssa-loop-im.c'.
+
+     Canonical induction variable creation.  This pass creates a simple
+     counter for number of iterations of the loop and replaces the exit
+     condition of the loop using it, in case when a complicated
+     analysis is necessary to determine the number of iterations.
+     Later optimizations then may determine the number easily.  The
+     pass is implemented in `tree-ssa-loop-ivcanon.c'.
+
+     Induction variable optimizations.  This pass performs standard
+     induction variable optimizations, including strength reduction,
+     induction variable merging and induction variable elimination.
+     The pass is implemented in `tree-ssa-loop-ivopts.c'.
+
+     Loop unswitching.  This pass moves the conditional jumps that are
+     invariant out of the loops.  To achieve this, a duplicate of the
+     loop is created for each possible outcome of conditional jump(s).
+     The pass is implemented in `tree-ssa-loop-unswitch.c'.  This pass
+     should eventually replace the RTL level loop unswitching in
+     `loop-unswitch.c', but currently the RTL level pass is not
+     completely redundant yet due to deficiencies in tree level alias
+     analysis.
+
+     The optimizations also use various utility functions contained in
+     `tree-ssa-loop-manip.c', `cfgloop.c', `cfgloopanal.c' and
+     `cfgloopmanip.c'.
+
+     Vectorization.  This pass transforms loops to operate on vector
+     types instead of scalar types.  Data parallelism across loop
+     iterations is exploited to group data elements from consecutive
+     iterations into a vector and operate on them in parallel.
+     Depending on available target support the loop is conceptually
+     unrolled by a factor `VF' (vectorization factor), which is the
+     number of elements operated upon in parallel in each iteration,
+     and the `VF' copies of each scalar operation are fused to form a
+     vector operation.  Additional loop transformations such as peeling
+     and versioning may take place to align the number of iterations,
+     and to align the memory accesses in the loop.  The pass is
+     implemented in `tree-vectorizer.c' (the main driver),
+     `tree-vect-loop.c' and `tree-vect-loop-manip.c' (loop specific
+     parts and general loop utilities), `tree-vect-slp' (loop-aware SLP
+     functionality), `tree-vect-stmts.c' and `tree-vect-data-refs.c'.
+     Analysis of data references is in `tree-data-ref.c'.
+
+     SLP Vectorization.  This pass performs vectorization of
+     straight-line code. The pass is implemented in `tree-vectorizer.c'
+     (the main driver), `tree-vect-slp.c', `tree-vect-stmts.c' and
+     `tree-vect-data-refs.c'.
+
+     Autoparallelization.  This pass splits the loop iteration space to
+     run into several threads.  The pass is implemented in
+     `tree-parloops.c'.
+
+     Graphite is a loop transformation framework based on the polyhedral
+     model.  Graphite stands for Gimple Represented as Polyhedra.  The
+     internals of this infrastructure are documented in
+     `http://gcc.gnu.org/wiki/Graphite'.  The passes working on this
+     representation are implemented in the various `graphite-*' files.
+
+   * Tree level if-conversion for vectorizer
+
+     This pass applies if-conversion to simple loops to help vectorizer.
+     We identify if convertible loops, if-convert statements and merge
+     basic blocks in one big block.  The idea is to present loop in such
+     form so that vectorizer can have one to one mapping between
+     statements and available vector operations.  This pass is located
+     in `tree-if-conv.c' and is described by `pass_if_conversion'.
+
+   * Conditional constant propagation
+
+     This pass relaxes a lattice of values in order to identify those
+     that must be constant even in the presence of conditional branches.
+     The pass is located in `tree-ssa-ccp.c' and is described by
+     `pass_ccp'.
+
+     A related pass that works on memory loads and stores, and not just
+     register values, is located in `tree-ssa-ccp.c' and described by
+     `pass_store_ccp'.
+
+   * Conditional copy propagation
+
+     This is similar to constant propagation but the lattice of values
+     is the "copy-of" relation.  It eliminates redundant copies from the
+     code.  The pass is located in `tree-ssa-copy.c' and described by
+     `pass_copy_prop'.
+
+     A related pass that works on memory copies, and not just register
+     copies, is located in `tree-ssa-copy.c' and described by
+     `pass_store_copy_prop'.
+
+   * Value range propagation
+
+     This transformation is similar to constant propagation but instead
+     of propagating single constant values, it propagates known value
+     ranges.  The implementation is based on Patterson's range
+     propagation algorithm (Accurate Static Branch Prediction by Value
+     Range Propagation, J. R. C. Patterson, PLDI '95).  In contrast to
+     Patterson's algorithm, this implementation does not propagate
+     branch probabilities nor it uses more than a single range per SSA
+     name. This means that the current implementation cannot be used
+     for branch prediction (though adapting it would not be difficult).
+     The pass is located in `tree-vrp.c' and is described by `pass_vrp'.
+
+   * Folding built-in functions
+
+     This pass simplifies built-in functions, as applicable, with
+     constant arguments or with inferable string lengths.  It is
+     located in `tree-ssa-ccp.c' and is described by
+     `pass_fold_builtins'.
+
+   * Split critical edges
+
+     This pass identifies critical edges and inserts empty basic blocks
+     such that the edge is no longer critical.  The pass is located in
+     `tree-cfg.c' and is described by `pass_split_crit_edges'.
+
+   * Control dependence dead code elimination
+
+     This pass is a stronger form of dead code elimination that can
+     eliminate unnecessary control flow statements.   It is located in
+     `tree-ssa-dce.c' and is described by `pass_cd_dce'.
+
+   * Tail call elimination
+
+     This pass identifies function calls that may be rewritten into
+     jumps.  No code transformation is actually applied here, but the
+     data and control flow problem is solved.  The code transformation
+     requires target support, and so is delayed until RTL.  In the
+     meantime `CALL_EXPR_TAILCALL' is set indicating the possibility.
+     The pass is located in `tree-tailcall.c' and is described by
+     `pass_tail_calls'.  The RTL transformation is handled by
+     `fixup_tail_calls' in `calls.c'.
+
+   * Warn for function return without value
+
+     For non-void functions, this pass locates return statements that do
+     not specify a value and issues a warning.  Such a statement may
+     have been injected by falling off the end of the function.  This
+     pass is run last so that we have as much time as possible to prove
+     that the statement is not reachable.  It is located in
+     `tree-cfg.c' and is described by `pass_warn_function_return'.
+
+   * Mudflap statement annotation
+
+     If mudflap is enabled, we rewrite some memory accesses with code to
+     validate that the memory access is correct.  In particular,
+     expressions involving pointer dereferences (`INDIRECT_REF',
+     `ARRAY_REF', etc.) are replaced by code that checks the selected
+     address range against the mudflap runtime's database of valid
+     regions.  This check includes an inline lookup into a
+     direct-mapped cache, based on shift/mask operations of the pointer
+     value, with a fallback function call into the runtime.  The pass
+     is located in `tree-mudflap.c' and is described by
+     `pass_mudflap_2'.
+
+   * Leave static single assignment form
+
+     This pass rewrites the function such that it is in normal form.  At
+     the same time, we eliminate as many single-use temporaries as
+     possible, so the intermediate language is no longer GIMPLE, but
+     GENERIC.  The pass is located in `tree-outof-ssa.c' and is
+     described by `pass_del_ssa'.
+
+   * Merge PHI nodes that feed into one another
+
+     This is part of the CFG cleanup passes.  It attempts to join PHI
+     nodes from a forwarder CFG block into another block with PHI
+     nodes.  The pass is located in `tree-cfgcleanup.c' and is
+     described by `pass_merge_phi'.
+
+   * Return value optimization
+
+     If a function always returns the same local variable, and that
+     local variable is an aggregate type, then the variable is replaced
+     with the return value for the function (i.e., the function's
+     DECL_RESULT).  This is equivalent to the C++ named return value
+     optimization applied to GIMPLE.  The pass is located in
+     `tree-nrv.c' and is described by `pass_nrv'.
+
+   * Return slot optimization
+
+     If a function returns a memory object and is called as `var =
+     foo()', this pass tries to change the call so that the address of
+     `var' is sent to the caller to avoid an extra memory copy.  This
+     pass is located in `tree-nrv.c' and is described by
+     `pass_return_slot'.
+
+   * Optimize calls to `__builtin_object_size'
+
+     This is a propagation pass similar to CCP that tries to remove
+     calls to `__builtin_object_size' when the size of the object can be
+     computed at compile-time.  This pass is located in
+     `tree-object-size.c' and is described by `pass_object_sizes'.
+
+   * Loop invariant motion
+
+     This pass removes expensive loop-invariant computations out of
+     loops.  The pass is located in `tree-ssa-loop.c' and described by
+     `pass_lim'.
+
+   * Loop nest optimizations
+
+     This is a family of loop transformations that works on loop nests.
+     It includes loop interchange, scaling, skewing and reversal and
+     they are all geared to the optimization of data locality in array
+     traversals and the removal of dependencies that hamper
+     optimizations such as loop parallelization and vectorization.  The
+     pass is located in `tree-loop-linear.c' and described by
+     `pass_linear_transform'.
+
+   * Removal of empty loops
+
+     This pass removes loops with no code in them.  The pass is located
+     in `tree-ssa-loop-ivcanon.c' and described by `pass_empty_loop'.
+
+   * Unrolling of small loops
+
+     This pass completely unrolls loops with few iterations.  The pass
+     is located in `tree-ssa-loop-ivcanon.c' and described by
+     `pass_complete_unroll'.
+
+   * Predictive commoning
+
+     This pass makes the code reuse the computations from the previous
+     iterations of the loops, especially loads and stores to memory.
+     It does so by storing the values of these computations to a bank
+     of temporary variables that are rotated at the end of loop.  To
+     avoid the need for this rotation, the loop is then unrolled and
+     the copies of the loop body are rewritten to use the appropriate
+     version of the temporary variable.  This pass is located in
+     `tree-predcom.c' and described by `pass_predcom'.
+
+   * Array prefetching
+
+     This pass issues prefetch instructions for array references inside
+     loops.  The pass is located in `tree-ssa-loop-prefetch.c' and
+     described by `pass_loop_prefetch'.
+
+   * Reassociation
+
+     This pass rewrites arithmetic expressions to enable optimizations
+     that operate on them, like redundancy elimination and
+     vectorization.  The pass is located in `tree-ssa-reassoc.c' and
+     described by `pass_reassoc'.
+
+   * Optimization of `stdarg' functions
+
+     This pass tries to avoid the saving of register arguments into the
+     stack on entry to `stdarg' functions.  If the function doesn't use
+     any `va_start' macros, no registers need to be saved.  If
+     `va_start' macros are used, the `va_list' variables don't escape
+     the function, it is only necessary to save registers that will be
+     used in `va_arg' macros.  For instance, if `va_arg' is only used
+     with integral types in the function, floating point registers
+     don't need to be saved.  This pass is located in `tree-stdarg.c'
+     and described by `pass_stdarg'.
+
+
+
+File: gccint.info,  Node: RTL passes,  Prev: Tree SSA passes,  Up: Passes
+
+9.5 RTL passes
+==============
+
+The following briefly describes the RTL generation and optimization
+passes that are run after the Tree optimization passes.
+
+   * RTL generation
+
+     The source files for RTL generation include `stmt.c', `calls.c',
+     `expr.c', `explow.c', `expmed.c', `function.c', `optabs.c' and
+     `emit-rtl.c'.  Also, the file `insn-emit.c', generated from the
+     machine description by the program `genemit', is used in this
+     pass.  The header file `expr.h' is used for communication within
+     this pass.
+
+     The header files `insn-flags.h' and `insn-codes.h', generated from
+     the machine description by the programs `genflags' and `gencodes',
+     tell this pass which standard names are available for use and
+     which patterns correspond to them.
+
+   * Generation of exception landing pads
+
+     This pass generates the glue that handles communication between the
+     exception handling library routines and the exception handlers
+     within the function.  Entry points in the function that are
+     invoked by the exception handling library are called "landing
+     pads".  The code for this pass is located in `except.c'.
+
+   * Control flow graph cleanup
+
+     This pass removes unreachable code, simplifies jumps to next,
+     jumps to jump, jumps across jumps, etc.  The pass is run multiple
+     times.  For historical reasons, it is occasionally referred to as
+     the "jump optimization pass".  The bulk of the code for this pass
+     is in `cfgcleanup.c', and there are support routines in `cfgrtl.c'
+     and `jump.c'.
+
+   * Forward propagation of single-def values
+
+     This pass attempts to remove redundant computation by substituting
+     variables that come from a single definition, and seeing if the
+     result can be simplified.  It performs copy propagation and
+     addressing mode selection.  The pass is run twice, with values
+     being propagated into loops only on the second run.  The code is
+     located in `fwprop.c'.
+
+   * Common subexpression elimination
+
+     This pass removes redundant computation within basic blocks, and
+     optimizes addressing modes based on cost.  The pass is run twice.
+     The code for this pass is located in `cse.c'.
+
+   * Global common subexpression elimination
+
+     This pass performs two different types of GCSE  depending on
+     whether you are optimizing for size or not (LCM based GCSE tends
+     to increase code size for a gain in speed, while Morel-Renvoise
+     based GCSE does not).  When optimizing for size, GCSE is done
+     using Morel-Renvoise Partial Redundancy Elimination, with the
+     exception that it does not try to move invariants out of
+     loops--that is left to  the loop optimization pass.  If MR PRE
+     GCSE is done, code hoisting (aka unification) is also done, as
+     well as load motion.  If you are optimizing for speed, LCM (lazy
+     code motion) based GCSE is done.  LCM is based on the work of
+     Knoop, Ruthing, and Steffen.  LCM based GCSE also does loop
+     invariant code motion.  We also perform load and store motion when
+     optimizing for speed.  Regardless of which type of GCSE is used,
+     the GCSE pass also performs global constant and  copy propagation.
+     The source file for this pass is `gcse.c', and the LCM routines
+     are in `lcm.c'.
+
+   * Loop optimization
+
+     This pass performs several loop related optimizations.  The source
+     files `cfgloopanal.c' and `cfgloopmanip.c' contain generic loop
+     analysis and manipulation code.  Initialization and finalization
+     of loop structures is handled by `loop-init.c'.  A loop invariant
+     motion pass is implemented in `loop-invariant.c'.  Basic block
+     level optimizations--unrolling, peeling and unswitching loops--
+     are implemented in `loop-unswitch.c' and `loop-unroll.c'.
+     Replacing of the exit condition of loops by special
+     machine-dependent instructions is handled by `loop-doloop.c'.
+
+   * Jump bypassing
+
+     This pass is an aggressive form of GCSE that transforms the control
+     flow graph of a function by propagating constants into conditional
+     branch instructions.  The source file for this pass is `gcse.c'.
+
+   * If conversion
+
+     This pass attempts to replace conditional branches and surrounding
+     assignments with arithmetic, boolean value producing comparison
+     instructions, and conditional move instructions.  In the very last
+     invocation after reload, it will generate predicated instructions
+     when supported by the target.  The code is located in `ifcvt.c'.
+
+   * Web construction
+
+     This pass splits independent uses of each pseudo-register.  This
+     can improve effect of the other transformation, such as CSE or
+     register allocation.  The code for this pass is located in `web.c'.
+
+   * Instruction combination
+
+     This pass attempts to combine groups of two or three instructions
+     that are related by data flow into single instructions.  It
+     combines the RTL expressions for the instructions by substitution,
+     simplifies the result using algebra, and then attempts to match
+     the result against the machine description.  The code is located
+     in `combine.c'.
+
+   * Register movement
+
+     This pass looks for cases where matching constraints would force an
+     instruction to need a reload, and this reload would be a
+     register-to-register move.  It then attempts to change the
+     registers used by the instruction to avoid the move instruction.
+     The code is located in `regmove.c'.
+
+   * Mode switching optimization
+
+     This pass looks for instructions that require the processor to be
+     in a specific "mode" and minimizes the number of mode changes
+     required to satisfy all users.  What these modes are, and what
+     they apply to are completely target-specific.  The code for this
+     pass is located in `mode-switching.c'.
+
+   * Modulo scheduling
+
+     This pass looks at innermost loops and reorders their instructions
+     by overlapping different iterations.  Modulo scheduling is
+     performed immediately before instruction scheduling.  The code for
+     this pass is located in `modulo-sched.c'.
+
+   * Instruction scheduling
+
+     This pass looks for instructions whose output will not be
+     available by the time that it is used in subsequent instructions.
+     Memory loads and floating point instructions often have this
+     behavior on RISC machines.  It re-orders instructions within a
+     basic block to try to separate the definition and use of items
+     that otherwise would cause pipeline stalls.  This pass is
+     performed twice, before and after register allocation.  The code
+     for this pass is located in `haifa-sched.c', `sched-deps.c',
+     `sched-ebb.c', `sched-rgn.c' and `sched-vis.c'.
+
+   * Register allocation
+
+     These passes make sure that all occurrences of pseudo registers are
+     eliminated, either by allocating them to a hard register, replacing
+     them by an equivalent expression (e.g. a constant) or by placing
+     them on the stack.  This is done in several subpasses:
+
+        * Register move optimizations.  This pass makes some simple RTL
+          code transformations which improve the subsequent register
+          allocation.  The source file is `regmove.c'.
+
+        * The integrated register allocator (IRA).  It is called
+          integrated because coalescing, register live range splitting,
+          and hard register preferencing are done on-the-fly during
+          coloring.  It also has better integration with the reload
+          pass.  Pseudo-registers spilled by the allocator or the
+          reload have still a chance to get hard-registers if the
+          reload evicts some pseudo-registers from hard-registers.  The
+          allocator helps to choose better pseudos for spilling based
+          on their live ranges and to coalesce stack slots allocated
+          for the spilled pseudo-registers.  IRA is a regional register
+          allocator which is transformed into Chaitin-Briggs allocator
+          if there is one region.  By default, IRA chooses regions using
+          register pressure but the user can force it to use one region
+          or regions corresponding to all loops.
+
+          Source files of the allocator are `ira.c', `ira-build.c',
+          `ira-costs.c', `ira-conflicts.c', `ira-color.c',
+          `ira-emit.c', `ira-lives', plus header files `ira.h' and
+          `ira-int.h' used for the communication between the allocator
+          and the rest of the compiler and between the IRA files.
+
+        * Reloading.  This pass renumbers pseudo registers with the
+          hardware registers numbers they were allocated.  Pseudo
+          registers that did not get hard registers are replaced with
+          stack slots.  Then it finds instructions that are invalid
+          because a value has failed to end up in a register, or has
+          ended up in a register of the wrong kind.  It fixes up these
+          instructions by reloading the problematical values
+          temporarily into registers.  Additional instructions are
+          generated to do the copying.
+
+          The reload pass also optionally eliminates the frame pointer
+          and inserts instructions to save and restore call-clobbered
+          registers around calls.
+
+          Source files are `reload.c' and `reload1.c', plus the header
+          `reload.h' used for communication between them.
+
+   * Basic block reordering
+
+     This pass implements profile guided code positioning.  If profile
+     information is not available, various types of static analysis are
+     performed to make the predictions normally coming from the profile
+     feedback (IE execution frequency, branch probability, etc).  It is
+     implemented in the file `bb-reorder.c', and the various prediction
+     routines are in `predict.c'.
+
+   * Variable tracking
+
+     This pass computes where the variables are stored at each position
+     in code and generates notes describing the variable locations to
+     RTL code.  The location lists are then generated according to these
+     notes to debug information if the debugging information format
+     supports location lists.  The code is located in `var-tracking.c'.
+
+   * Delayed branch scheduling
+
+     This optional pass attempts to find instructions that can go into
+     the delay slots of other instructions, usually jumps and calls.
+     The code for this pass is located in `reorg.c'.
+
+   * Branch shortening
+
+     On many RISC machines, branch instructions have a limited range.
+     Thus, longer sequences of instructions must be used for long
+     branches.  In this pass, the compiler figures out what how far
+     each instruction will be from each other instruction, and
+     therefore whether the usual instructions, or the longer sequences,
+     must be used for each branch.  The code for this pass is located
+     in `final.c'.
+
+   * Register-to-stack conversion
+
+     Conversion from usage of some hard registers to usage of a register
+     stack may be done at this point.  Currently, this is supported only
+     for the floating-point registers of the Intel 80387 coprocessor.
+     The code for this pass is located in `reg-stack.c'.
+
+   * Final
+
+     This pass outputs the assembler code for the function.  The source
+     files are `final.c' plus `insn-output.c'; the latter is generated
+     automatically from the machine description by the tool `genoutput'.
+     The header file `conditions.h' is used for communication between
+     these files.  If mudflap is enabled, the queue of deferred
+     declarations and any addressed constants (e.g., string literals)
+     is processed by `mudflap_finish_file' into a synthetic constructor
+     function containing calls into the mudflap runtime.
+
+   * Debugging information output
+
+     This is run after final because it must output the stack slot
+     offsets for pseudo registers that did not get hard registers.
+     Source files are `dbxout.c' for DBX symbol table format,
+     `sdbout.c' for SDB symbol table format, `dwarfout.c' for DWARF
+     symbol table format, files `dwarf2out.c' and `dwarf2asm.c' for
+     DWARF2 symbol table format, and `vmsdbgout.c' for VMS debug symbol
+     table format.
+
+
+
+File: gccint.info,  Node: RTL,  Next: Control Flow,  Prev: Tree SSA,  Up: Top
+
+10 RTL Representation
+*********************
+
+The last part of the compiler work is done on a low-level intermediate
+representation called Register Transfer Language.  In this language, the
+instructions to be output are described, pretty much one by one, in an
+algebraic form that describes what the instruction does.
+
+ RTL is inspired by Lisp lists.  It has both an internal form, made up
+of structures that point at other structures, and a textual form that
+is used in the machine description and in printed debugging dumps.  The
+textual form uses nested parentheses to indicate the pointers in the
+internal form.
+
+* Menu:
+
+* RTL Objects::       Expressions vs vectors vs strings vs integers.
+* RTL Classes::       Categories of RTL expression objects, and their structure.
+* Accessors::         Macros to access expression operands or vector elts.
+* Special Accessors:: Macros to access specific annotations on RTL.
+* Flags::             Other flags in an RTL expression.
+* Machine Modes::     Describing the size and format of a datum.
+* Constants::         Expressions with constant values.
+* Regs and Memory::   Expressions representing register contents or memory.
+* Arithmetic::        Expressions representing arithmetic on other expressions.
+* Comparisons::       Expressions representing comparison of expressions.
+* Bit-Fields::        Expressions representing bit-fields in memory or reg.
+* Vector Operations:: Expressions involving vector datatypes.
+* Conversions::       Extending, truncating, floating or fixing.
+* RTL Declarations::  Declaring volatility, constancy, etc.
+* Side Effects::      Expressions for storing in registers, etc.
+* Incdec::            Embedded side-effects for autoincrement addressing.
+* Assembler::         Representing `asm' with operands.
+* Debug Information:: Expressions representing debugging information.
+* Insns::             Expression types for entire insns.
+* Calls::             RTL representation of function call insns.
+* Sharing::           Some expressions are unique; others *must* be copied.
+* Reading RTL::       Reading textual RTL from a file.
+
+
+File: gccint.info,  Node: RTL Objects,  Next: RTL Classes,  Up: RTL
+
+10.1 RTL Object Types
+=====================
+
+RTL uses five kinds of objects: expressions, integers, wide integers,
+strings and vectors.  Expressions are the most important ones.  An RTL
+expression ("RTX", for short) is a C structure, but it is usually
+referred to with a pointer; a type that is given the typedef name `rtx'.
+
+ An integer is simply an `int'; their written form uses decimal digits.
+A wide integer is an integral object whose type is `HOST_WIDE_INT';
+their written form uses decimal digits.
+
+ A string is a sequence of characters.  In core it is represented as a
+`char *' in usual C fashion, and it is written in C syntax as well.
+However, strings in RTL may never be null.  If you write an empty
+string in a machine description, it is represented in core as a null
+pointer rather than as a pointer to a null character.  In certain
+contexts, these null pointers instead of strings are valid.  Within RTL
+code, strings are most commonly found inside `symbol_ref' expressions,
+but they appear in other contexts in the RTL expressions that make up
+machine descriptions.
+
+ In a machine description, strings are normally written with double
+quotes, as you would in C.  However, strings in machine descriptions may
+extend over many lines, which is invalid C, and adjacent string
+constants are not concatenated as they are in C.  Any string constant
+may be surrounded with a single set of parentheses.  Sometimes this
+makes the machine description easier to read.
+
+ There is also a special syntax for strings, which can be useful when C
+code is embedded in a machine description.  Wherever a string can
+appear, it is also valid to write a C-style brace block.  The entire
+brace block, including the outermost pair of braces, is considered to be
+the string constant.  Double quote characters inside the braces are not
+special.  Therefore, if you write string constants in the C code, you
+need not escape each quote character with a backslash.
+
+ A vector contains an arbitrary number of pointers to expressions.  The
+number of elements in the vector is explicitly present in the vector.
+The written form of a vector consists of square brackets (`[...]')
+surrounding the elements, in sequence and with whitespace separating
+them.  Vectors of length zero are not created; null pointers are used
+instead.
+
+ Expressions are classified by "expression codes" (also called RTX
+codes).  The expression code is a name defined in `rtl.def', which is
+also (in uppercase) a C enumeration constant.  The possible expression
+codes and their meanings are machine-independent.  The code of an RTX
+can be extracted with the macro `GET_CODE (X)' and altered with
+`PUT_CODE (X, NEWCODE)'.
+
+ The expression code determines how many operands the expression
+contains, and what kinds of objects they are.  In RTL, unlike Lisp, you
+cannot tell by looking at an operand what kind of object it is.
+Instead, you must know from its context--from the expression code of
+the containing expression.  For example, in an expression of code
+`subreg', the first operand is to be regarded as an expression and the
+second operand as an integer.  In an expression of code `plus', there
+are two operands, both of which are to be regarded as expressions.  In
+a `symbol_ref' expression, there is one operand, which is to be
+regarded as a string.
+
+ Expressions are written as parentheses containing the name of the
+expression type, its flags and machine mode if any, and then the
+operands of the expression (separated by spaces).
+
+ Expression code names in the `md' file are written in lowercase, but
+when they appear in C code they are written in uppercase.  In this
+manual, they are shown as follows: `const_int'.
+
+ In a few contexts a null pointer is valid where an expression is
+normally wanted.  The written form of this is `(nil)'.
+
+
+File: gccint.info,  Node: RTL Classes,  Next: Accessors,  Prev: RTL Objects,  Up: RTL
+
+10.2 RTL Classes and Formats
+============================
+
+The various expression codes are divided into several "classes", which
+are represented by single characters.  You can determine the class of
+an RTX code with the macro `GET_RTX_CLASS (CODE)'.  Currently,
+`rtl.def' defines these classes:
+
+`RTX_OBJ'
+     An RTX code that represents an actual object, such as a register
+     (`REG') or a memory location (`MEM', `SYMBOL_REF').  `LO_SUM') is
+     also included; instead, `SUBREG' and `STRICT_LOW_PART' are not in
+     this class, but in class `x'.
+
+`RTX_CONST_OBJ'
+     An RTX code that represents a constant object.  `HIGH' is also
+     included in this class.
+
+`RTX_COMPARE'
+     An RTX code for a non-symmetric comparison, such as `GEU' or `LT'.
+
+`RTX_COMM_COMPARE'
+     An RTX code for a symmetric (commutative) comparison, such as `EQ'
+     or `ORDERED'.
+
+`RTX_UNARY'
+     An RTX code for a unary arithmetic operation, such as `NEG',
+     `NOT', or `ABS'.  This category also includes value extension
+     (sign or zero) and conversions between integer and floating point.
+
+`RTX_COMM_ARITH'
+     An RTX code for a commutative binary operation, such as `PLUS' or
+     `AND'.  `NE' and `EQ' are comparisons, so they have class `<'.
+
+`RTX_BIN_ARITH'
+     An RTX code for a non-commutative binary operation, such as
+     `MINUS', `DIV', or `ASHIFTRT'.
+
+`RTX_BITFIELD_OPS'
+     An RTX code for a bit-field operation.  Currently only
+     `ZERO_EXTRACT' and `SIGN_EXTRACT'.  These have three inputs and
+     are lvalues (so they can be used for insertion as well).  *Note
+     Bit-Fields::.
+
+`RTX_TERNARY'
+     An RTX code for other three input operations.  Currently only
+     `IF_THEN_ELSE',  `VEC_MERGE', `SIGN_EXTRACT', `ZERO_EXTRACT', and
+     `FMA'.
+
+`RTX_INSN'
+     An RTX code for an entire instruction:  `INSN', `JUMP_INSN', and
+     `CALL_INSN'.  *Note Insns::.
+
+`RTX_MATCH'
+     An RTX code for something that matches in insns, such as
+     `MATCH_DUP'.  These only occur in machine descriptions.
+
+`RTX_AUTOINC'
+     An RTX code for an auto-increment addressing mode, such as
+     `POST_INC'.
+
+`RTX_EXTRA'
+     All other RTX codes.  This category includes the remaining codes
+     used only in machine descriptions (`DEFINE_*', etc.).  It also
+     includes all the codes describing side effects (`SET', `USE',
+     `CLOBBER', etc.) and the non-insns that may appear on an insn
+     chain, such as `NOTE', `BARRIER', and `CODE_LABEL'.  `SUBREG' is
+     also part of this class.
+
+ For each expression code, `rtl.def' specifies the number of contained
+objects and their kinds using a sequence of characters called the
+"format" of the expression code.  For example, the format of `subreg'
+is `ei'.
+
+ These are the most commonly used format characters:
+
+`e'
+     An expression (actually a pointer to an expression).
+
+`i'
+     An integer.
+
+`w'
+     A wide integer.
+
+`s'
+     A string.
+
+`E'
+     A vector of expressions.
+
+ A few other format characters are used occasionally:
+
+`u'
+     `u' is equivalent to `e' except that it is printed differently in
+     debugging dumps.  It is used for pointers to insns.
+
+`n'
+     `n' is equivalent to `i' except that it is printed differently in
+     debugging dumps.  It is used for the line number or code number of
+     a `note' insn.
+
+`S'
+     `S' indicates a string which is optional.  In the RTL objects in
+     core, `S' is equivalent to `s', but when the object is read, from
+     an `md' file, the string value of this operand may be omitted.  An
+     omitted string is taken to be the null string.
+
+`V'
+     `V' indicates a vector which is optional.  In the RTL objects in
+     core, `V' is equivalent to `E', but when the object is read from
+     an `md' file, the vector value of this operand may be omitted.  An
+     omitted vector is effectively the same as a vector of no elements.
+
+`B'
+     `B' indicates a pointer to basic block structure.
+
+`0'
+     `0' means a slot whose contents do not fit any normal category.
+     `0' slots are not printed at all in dumps, and are often used in
+     special ways by small parts of the compiler.
+
+ There are macros to get the number of operands and the format of an
+expression code:
+
+`GET_RTX_LENGTH (CODE)'
+     Number of operands of an RTX of code CODE.
+
+`GET_RTX_FORMAT (CODE)'
+     The format of an RTX of code CODE, as a C string.
+
+ Some classes of RTX codes always have the same format.  For example, it
+is safe to assume that all comparison operations have format `ee'.
+
+`1'
+     All codes of this class have format `e'.
+
+`<'
+`c'
+`2'
+     All codes of these classes have format `ee'.
+
+`b'
+`3'
+     All codes of these classes have format `eee'.
+
+`i'
+     All codes of this class have formats that begin with `iuueiee'.
+     *Note Insns::.  Note that not all RTL objects linked onto an insn
+     chain are of class `i'.
+
+`o'
+`m'
+`x'
+     You can make no assumptions about the format of these codes.
+
+
+File: gccint.info,  Node: Accessors,  Next: Special Accessors,  Prev: RTL Classes,  Up: RTL
+
+10.3 Access to Operands
+=======================
+
+Operands of expressions are accessed using the macros `XEXP', `XINT',
+`XWINT' and `XSTR'.  Each of these macros takes two arguments: an
+expression-pointer (RTX) and an operand number (counting from zero).
+Thus,
+
+     XEXP (X, 2)
+
+accesses operand 2 of expression X, as an expression.
+
+     XINT (X, 2)
+
+accesses the same operand as an integer.  `XSTR', used in the same
+fashion, would access it as a string.
+
+ Any operand can be accessed as an integer, as an expression or as a
+string.  You must choose the correct method of access for the kind of
+value actually stored in the operand.  You would do this based on the
+expression code of the containing expression.  That is also how you
+would know how many operands there are.
+
+ For example, if X is a `subreg' expression, you know that it has two
+operands which can be correctly accessed as `XEXP (X, 0)' and `XINT (X,
+1)'.  If you did `XINT (X, 0)', you would get the address of the
+expression operand but cast as an integer; that might occasionally be
+useful, but it would be cleaner to write `(int) XEXP (X, 0)'.  `XEXP
+(X, 1)' would also compile without error, and would return the second,
+integer operand cast as an expression pointer, which would probably
+result in a crash when accessed.  Nothing stops you from writing `XEXP
+(X, 28)' either, but this will access memory past the end of the
+expression with unpredictable results.
+
+ Access to operands which are vectors is more complicated.  You can use
+the macro `XVEC' to get the vector-pointer itself, or the macros
+`XVECEXP' and `XVECLEN' to access the elements and length of a vector.
+
+`XVEC (EXP, IDX)'
+     Access the vector-pointer which is operand number IDX in EXP.
+
+`XVECLEN (EXP, IDX)'
+     Access the length (number of elements) in the vector which is in
+     operand number IDX in EXP.  This value is an `int'.
+
+`XVECEXP (EXP, IDX, ELTNUM)'
+     Access element number ELTNUM in the vector which is in operand
+     number IDX in EXP.  This value is an RTX.
+
+     It is up to you to make sure that ELTNUM is not negative and is
+     less than `XVECLEN (EXP, IDX)'.
+
+ All the macros defined in this section expand into lvalues and
+therefore can be used to assign the operands, lengths and vector
+elements as well as to access them.
+
+
+File: gccint.info,  Node: Special Accessors,  Next: Flags,  Prev: Accessors,  Up: RTL
+
+10.4 Access to Special Operands
+===============================
+
+Some RTL nodes have special annotations associated with them.
+
+`MEM'
+
+    `MEM_ALIAS_SET (X)'
+          If 0, X is not in any alias set, and may alias anything.
+          Otherwise, X can only alias `MEM's in a conflicting alias
+          set.  This value is set in a language-dependent manner in the
+          front-end, and should not be altered in the back-end.  In
+          some front-ends, these numbers may correspond in some way to
+          types, or other language-level entities, but they need not,
+          and the back-end makes no such assumptions.  These set
+          numbers are tested with `alias_sets_conflict_p'.
+
+    `MEM_EXPR (X)'
+          If this register is known to hold the value of some user-level
+          declaration, this is that tree node.  It may also be a
+          `COMPONENT_REF', in which case this is some field reference,
+          and `TREE_OPERAND (X, 0)' contains the declaration, or
+          another `COMPONENT_REF', or null if there is no compile-time
+          object associated with the reference.
+
+    `MEM_OFFSET (X)'
+          The offset from the start of `MEM_EXPR' as a `CONST_INT' rtx.
+
+    `MEM_SIZE (X)'
+          The size in bytes of the memory reference as a `CONST_INT'
+          rtx.  This is mostly relevant for `BLKmode' references as
+          otherwise the size is implied by the mode.
+
+    `MEM_ALIGN (X)'
+          The known alignment in bits of the memory reference.
+
+    `MEM_ADDR_SPACE (X)'
+          The address space of the memory reference.  This will
+          commonly be zero for the generic address space.
+
+`REG'
+
+    `ORIGINAL_REGNO (X)'
+          This field holds the number the register "originally" had;
+          for a pseudo register turned into a hard reg this will hold
+          the old pseudo register number.
+
+    `REG_EXPR (X)'
+          If this register is known to hold the value of some user-level
+          declaration, this is that tree node.
+
+    `REG_OFFSET (X)'
+          If this register is known to hold the value of some user-level
+          declaration, this is the offset into that logical storage.
+
+`SYMBOL_REF'
+
+    `SYMBOL_REF_DECL (X)'
+          If the `symbol_ref' X was created for a `VAR_DECL' or a
+          `FUNCTION_DECL', that tree is recorded here.  If this value is
+          null, then X was created by back end code generation routines,
+          and there is no associated front end symbol table entry.
+
+          `SYMBOL_REF_DECL' may also point to a tree of class `'c'',
+          that is, some sort of constant.  In this case, the
+          `symbol_ref' is an entry in the per-file constant pool;
+          again, there is no associated front end symbol table entry.
+
+    `SYMBOL_REF_CONSTANT (X)'
+          If `CONSTANT_POOL_ADDRESS_P (X)' is true, this is the constant
+          pool entry for X.  It is null otherwise.
+
+    `SYMBOL_REF_DATA (X)'
+          A field of opaque type used to store `SYMBOL_REF_DECL' or
+          `SYMBOL_REF_CONSTANT'.
+
+    `SYMBOL_REF_FLAGS (X)'
+          In a `symbol_ref', this is used to communicate various
+          predicates about the symbol.  Some of these are common enough
+          to be computed by common code, some are specific to the
+          target.  The common bits are:
+
+         `SYMBOL_FLAG_FUNCTION'
+               Set if the symbol refers to a function.
+
+         `SYMBOL_FLAG_LOCAL'
+               Set if the symbol is local to this "module".  See
+               `TARGET_BINDS_LOCAL_P'.
+
+         `SYMBOL_FLAG_EXTERNAL'
+               Set if this symbol is not defined in this translation
+               unit.  Note that this is not the inverse of
+               `SYMBOL_FLAG_LOCAL'.
+
+         `SYMBOL_FLAG_SMALL'
+               Set if the symbol is located in the small data section.
+               See `TARGET_IN_SMALL_DATA_P'.
+
+         `SYMBOL_REF_TLS_MODEL (X)'
+               This is a multi-bit field accessor that returns the
+               `tls_model' to be used for a thread-local storage
+               symbol.  It returns zero for non-thread-local symbols.
+
+         `SYMBOL_FLAG_HAS_BLOCK_INFO'
+               Set if the symbol has `SYMBOL_REF_BLOCK' and
+               `SYMBOL_REF_BLOCK_OFFSET' fields.
+
+         `SYMBOL_FLAG_ANCHOR'
+               Set if the symbol is used as a section anchor.  "Section
+               anchors" are symbols that have a known position within
+               an `object_block' and that can be used to access nearby
+               members of that block.  They are used to implement
+               `-fsection-anchors'.
+
+               If this flag is set, then `SYMBOL_FLAG_HAS_BLOCK_INFO'
+               will be too.
+
+          Bits beginning with `SYMBOL_FLAG_MACH_DEP' are available for
+          the target's use.
+
+`SYMBOL_REF_BLOCK (X)'
+     If `SYMBOL_REF_HAS_BLOCK_INFO_P (X)', this is the `object_block'
+     structure to which the symbol belongs, or `NULL' if it has not
+     been assigned a block.
+
+`SYMBOL_REF_BLOCK_OFFSET (X)'
+     If `SYMBOL_REF_HAS_BLOCK_INFO_P (X)', this is the offset of X from
+     the first object in `SYMBOL_REF_BLOCK (X)'.  The value is negative
+     if X has not yet been assigned to a block, or it has not been
+     given an offset within that block.
+
+
+File: gccint.info,  Node: Flags,  Next: Machine Modes,  Prev: Special Accessors,  Up: RTL
+
+10.5 Flags in an RTL Expression
+===============================
+
+RTL expressions contain several flags (one-bit bit-fields) that are
+used in certain types of expression.  Most often they are accessed with
+the following macros, which expand into lvalues.
+
+`CONSTANT_POOL_ADDRESS_P (X)'
+     Nonzero in a `symbol_ref' if it refers to part of the current
+     function's constant pool.  For most targets these addresses are in
+     a `.rodata' section entirely separate from the function, but for
+     some targets the addresses are close to the beginning of the
+     function.  In either case GCC assumes these addresses can be
+     addressed directly, perhaps with the help of base registers.
+     Stored in the `unchanging' field and printed as `/u'.
+
+`RTL_CONST_CALL_P (X)'
+     In a `call_insn' indicates that the insn represents a call to a
+     const function.  Stored in the `unchanging' field and printed as
+     `/u'.
+
+`RTL_PURE_CALL_P (X)'
+     In a `call_insn' indicates that the insn represents a call to a
+     pure function.  Stored in the `return_val' field and printed as
+     `/i'.
+
+`RTL_CONST_OR_PURE_CALL_P (X)'
+     In a `call_insn', true if `RTL_CONST_CALL_P' or `RTL_PURE_CALL_P'
+     is true.
+
+`RTL_LOOPING_CONST_OR_PURE_CALL_P (X)'
+     In a `call_insn' indicates that the insn represents a possibly
+     infinite looping call to a const or pure function.  Stored in the
+     `call' field and printed as `/c'.  Only true if one of
+     `RTL_CONST_CALL_P' or `RTL_PURE_CALL_P' is true.
+
+`INSN_ANNULLED_BRANCH_P (X)'
+     In a `jump_insn', `call_insn', or `insn' indicates that the branch
+     is an annulling one.  See the discussion under `sequence' below.
+     Stored in the `unchanging' field and printed as `/u'.
+
+`INSN_DELETED_P (X)'
+     In an `insn', `call_insn', `jump_insn', `code_label', `barrier',
+     or `note', nonzero if the insn has been deleted.  Stored in the
+     `volatil' field and printed as `/v'.
+
+`INSN_FROM_TARGET_P (X)'
+     In an `insn' or `jump_insn' or `call_insn' in a delay slot of a
+     branch, indicates that the insn is from the target of the branch.
+     If the branch insn has `INSN_ANNULLED_BRANCH_P' set, this insn
+     will only be executed if the branch is taken.  For annulled
+     branches with `INSN_FROM_TARGET_P' clear, the insn will be
+     executed only if the branch is not taken.  When
+     `INSN_ANNULLED_BRANCH_P' is not set, this insn will always be
+     executed.  Stored in the `in_struct' field and printed as `/s'.
+
+`LABEL_PRESERVE_P (X)'
+     In a `code_label' or `note', indicates that the label is
+     referenced by code or data not visible to the RTL of a given
+     function.  Labels referenced by a non-local goto will have this
+     bit set.  Stored in the `in_struct' field and printed as `/s'.
+
+`LABEL_REF_NONLOCAL_P (X)'
+     In `label_ref' and `reg_label' expressions, nonzero if this is a
+     reference to a non-local label.  Stored in the `volatil' field and
+     printed as `/v'.
+
+`MEM_IN_STRUCT_P (X)'
+     In `mem' expressions, nonzero for reference to an entire structure,
+     union or array, or to a component of one.  Zero for references to a
+     scalar variable or through a pointer to a scalar.  If both this
+     flag and `MEM_SCALAR_P' are clear, then we don't know whether this
+     `mem' is in a structure or not.  Both flags should never be
+     simultaneously set.  Stored in the `in_struct' field and printed
+     as `/s'.
+
+`MEM_KEEP_ALIAS_SET_P (X)'
+     In `mem' expressions, 1 if we should keep the alias set for this
+     mem unchanged when we access a component.  Set to 1, for example,
+     when we are already in a non-addressable component of an aggregate.
+     Stored in the `jump' field and printed as `/j'.
+
+`MEM_SCALAR_P (X)'
+     In `mem' expressions, nonzero for reference to a scalar known not
+     to be a member of a structure, union, or array.  Zero for such
+     references and for indirections through pointers, even pointers
+     pointing to scalar types.  If both this flag and `MEM_IN_STRUCT_P'
+     are clear, then we don't know whether this `mem' is in a structure
+     or not.  Both flags should never be simultaneously set.  Stored in
+     the `return_val' field and printed as `/i'.
+
+`MEM_VOLATILE_P (X)'
+     In `mem', `asm_operands', and `asm_input' expressions, nonzero for
+     volatile memory references.  Stored in the `volatil' field and
+     printed as `/v'.
+
+`MEM_NOTRAP_P (X)'
+     In `mem', nonzero for memory references that will not trap.
+     Stored in the `call' field and printed as `/c'.
+
+`MEM_POINTER (X)'
+     Nonzero in a `mem' if the memory reference holds a pointer.
+     Stored in the `frame_related' field and printed as `/f'.
+
+`REG_FUNCTION_VALUE_P (X)'
+     Nonzero in a `reg' if it is the place in which this function's
+     value is going to be returned.  (This happens only in a hard
+     register.)  Stored in the `return_val' field and printed as `/i'.
+
+`REG_POINTER (X)'
+     Nonzero in a `reg' if the register holds a pointer.  Stored in the
+     `frame_related' field and printed as `/f'.
+
+`REG_USERVAR_P (X)'
+     In a `reg', nonzero if it corresponds to a variable present in the
+     user's source code.  Zero for temporaries generated internally by
+     the compiler.  Stored in the `volatil' field and printed as `/v'.
+
+     The same hard register may be used also for collecting the values
+     of functions called by this one, but `REG_FUNCTION_VALUE_P' is zero
+     in this kind of use.
+
+`RTX_FRAME_RELATED_P (X)'
+     Nonzero in an `insn', `call_insn', `jump_insn', `barrier', or
+     `set' which is part of a function prologue and sets the stack
+     pointer, sets the frame pointer, or saves a register.  This flag
+     should also be set on an instruction that sets up a temporary
+     register to use in place of the frame pointer.  Stored in the
+     `frame_related' field and printed as `/f'.
+
+     In particular, on RISC targets where there are limits on the sizes
+     of immediate constants, it is sometimes impossible to reach the
+     register save area directly from the stack pointer.  In that case,
+     a temporary register is used that is near enough to the register
+     save area, and the Canonical Frame Address, i.e., DWARF2's logical
+     frame pointer, register must (temporarily) be changed to be this
+     temporary register.  So, the instruction that sets this temporary
+     register must be marked as `RTX_FRAME_RELATED_P'.
+
+     If the marked instruction is overly complex (defined in terms of
+     what `dwarf2out_frame_debug_expr' can handle), you will also have
+     to create a `REG_FRAME_RELATED_EXPR' note and attach it to the
+     instruction.  This note should contain a simple expression of the
+     computation performed by this instruction, i.e., one that
+     `dwarf2out_frame_debug_expr' can handle.
+
+     This flag is required for exception handling support on targets
+     with RTL prologues.
+
+`MEM_READONLY_P (X)'
+     Nonzero in a `mem', if the memory is statically allocated and
+     read-only.
+
+     Read-only in this context means never modified during the lifetime
+     of the program, not necessarily in ROM or in write-disabled pages.
+     A common example of the later is a shared library's global offset
+     table.  This table is initialized by the runtime loader, so the
+     memory is technically writable, but after control is transfered
+     from the runtime loader to the application, this memory will never
+     be subsequently modified.
+
+     Stored in the `unchanging' field and printed as `/u'.
+
+`SCHED_GROUP_P (X)'
+     During instruction scheduling, in an `insn', `call_insn' or
+     `jump_insn', indicates that the previous insn must be scheduled
+     together with this insn.  This is used to ensure that certain
+     groups of instructions will not be split up by the instruction
+     scheduling pass, for example, `use' insns before a `call_insn' may
+     not be separated from the `call_insn'.  Stored in the `in_struct'
+     field and printed as `/s'.
+
+`SET_IS_RETURN_P (X)'
+     For a `set', nonzero if it is for a return.  Stored in the `jump'
+     field and printed as `/j'.
+
+`SIBLING_CALL_P (X)'
+     For a `call_insn', nonzero if the insn is a sibling call.  Stored
+     in the `jump' field and printed as `/j'.
+
+`STRING_POOL_ADDRESS_P (X)'
+     For a `symbol_ref' expression, nonzero if it addresses this
+     function's string constant pool.  Stored in the `frame_related'
+     field and printed as `/f'.
+
+`SUBREG_PROMOTED_UNSIGNED_P (X)'
+     Returns a value greater then zero for a `subreg' that has
+     `SUBREG_PROMOTED_VAR_P' nonzero if the object being referenced is
+     kept zero-extended, zero if it is kept sign-extended, and less
+     then zero if it is extended some other way via the `ptr_extend'
+     instruction.  Stored in the `unchanging' field and `volatil'
+     field, printed as `/u' and `/v'.  This macro may only be used to
+     get the value it may not be used to change the value.  Use
+     `SUBREG_PROMOTED_UNSIGNED_SET' to change the value.
+
+`SUBREG_PROMOTED_UNSIGNED_SET (X)'
+     Set the `unchanging' and `volatil' fields in a `subreg' to reflect
+     zero, sign, or other extension.  If `volatil' is zero, then
+     `unchanging' as nonzero means zero extension and as zero means
+     sign extension.  If `volatil' is nonzero then some other type of
+     extension was done via the `ptr_extend' instruction.
+
+`SUBREG_PROMOTED_VAR_P (X)'
+     Nonzero in a `subreg' if it was made when accessing an object that
+     was promoted to a wider mode in accord with the `PROMOTED_MODE'
+     machine description macro (*note Storage Layout::).  In this case,
+     the mode of the `subreg' is the declared mode of the object and
+     the mode of `SUBREG_REG' is the mode of the register that holds
+     the object.  Promoted variables are always either sign- or
+     zero-extended to the wider mode on every assignment.  Stored in
+     the `in_struct' field and printed as `/s'.
+
+`SYMBOL_REF_USED (X)'
+     In a `symbol_ref', indicates that X has been used.  This is
+     normally only used to ensure that X is only declared external
+     once.  Stored in the `used' field.
+
+`SYMBOL_REF_WEAK (X)'
+     In a `symbol_ref', indicates that X has been declared weak.
+     Stored in the `return_val' field and printed as `/i'.
+
+`SYMBOL_REF_FLAG (X)'
+     In a `symbol_ref', this is used as a flag for machine-specific
+     purposes.  Stored in the `volatil' field and printed as `/v'.
+
+     Most uses of `SYMBOL_REF_FLAG' are historic and may be subsumed by
+     `SYMBOL_REF_FLAGS'.  Certainly use of `SYMBOL_REF_FLAGS' is
+     mandatory if the target requires more than one bit of storage.
+
+`PREFETCH_SCHEDULE_BARRIER_P (X)'
+     In a `prefetch', indicates that the prefetch is a scheduling
+     barrier.  No other INSNs will be moved over it.  Stored in the
+     `volatil' field and printed as `/v'.
+
+ These are the fields to which the above macros refer:
+
+`call'
+     In a `mem', 1 means that the memory reference will not trap.
+
+     In a `call', 1 means that this pure or const call may possibly
+     infinite loop.
+
+     In an RTL dump, this flag is represented as `/c'.
+
+`frame_related'
+     In an `insn' or `set' expression, 1 means that it is part of a
+     function prologue and sets the stack pointer, sets the frame
+     pointer, saves a register, or sets up a temporary register to use
+     in place of the frame pointer.
+
+     In `reg' expressions, 1 means that the register holds a pointer.
+
+     In `mem' expressions, 1 means that the memory reference holds a
+     pointer.
+
+     In `symbol_ref' expressions, 1 means that the reference addresses
+     this function's string constant pool.
+
+     In an RTL dump, this flag is represented as `/f'.
+
+`in_struct'
+     In `mem' expressions, it is 1 if the memory datum referred to is
+     all or part of a structure or array; 0 if it is (or might be) a
+     scalar variable.  A reference through a C pointer has 0 because
+     the pointer might point to a scalar variable.  This information
+     allows the compiler to determine something about possible cases of
+     aliasing.
+
+     In `reg' expressions, it is 1 if the register has its entire life
+     contained within the test expression of some loop.
+
+     In `subreg' expressions, 1 means that the `subreg' is accessing an
+     object that has had its mode promoted from a wider mode.
+
+     In `label_ref' expressions, 1 means that the referenced label is
+     outside the innermost loop containing the insn in which the
+     `label_ref' was found.
+
+     In `code_label' expressions, it is 1 if the label may never be
+     deleted.  This is used for labels which are the target of
+     non-local gotos.  Such a label that would have been deleted is
+     replaced with a `note' of type `NOTE_INSN_DELETED_LABEL'.
+
+     In an `insn' during dead-code elimination, 1 means that the insn is
+     dead code.
+
+     In an `insn' or `jump_insn' during reorg for an insn in the delay
+     slot of a branch, 1 means that this insn is from the target of the
+     branch.
+
+     In an `insn' during instruction scheduling, 1 means that this insn
+     must be scheduled as part of a group together with the previous
+     insn.
+
+     In an RTL dump, this flag is represented as `/s'.
+
+`return_val'
+     In `reg' expressions, 1 means the register contains the value to
+     be returned by the current function.  On machines that pass
+     parameters in registers, the same register number may be used for
+     parameters as well, but this flag is not set on such uses.
+
+     In `mem' expressions, 1 means the memory reference is to a scalar
+     known not to be a member of a structure, union, or array.
+
+     In `symbol_ref' expressions, 1 means the referenced symbol is weak.
+
+     In `call' expressions, 1 means the call is pure.
+
+     In an RTL dump, this flag is represented as `/i'.
+
+`jump'
+     In a `mem' expression, 1 means we should keep the alias set for
+     this mem unchanged when we access a component.
+
+     In a `set', 1 means it is for a return.
+
+     In a `call_insn', 1 means it is a sibling call.
+
+     In an RTL dump, this flag is represented as `/j'.
+
+`unchanging'
+     In `reg' and `mem' expressions, 1 means that the value of the
+     expression never changes.
+
+     In `subreg' expressions, it is 1 if the `subreg' references an
+     unsigned object whose mode has been promoted to a wider mode.
+
+     In an `insn' or `jump_insn' in the delay slot of a branch
+     instruction, 1 means an annulling branch should be used.
+
+     In a `symbol_ref' expression, 1 means that this symbol addresses
+     something in the per-function constant pool.
+
+     In a `call_insn' 1 means that this instruction is a call to a const
+     function.
+
+     In an RTL dump, this flag is represented as `/u'.
+
+`used'
+     This flag is used directly (without an access macro) at the end of
+     RTL generation for a function, to count the number of times an
+     expression appears in insns.  Expressions that appear more than
+     once are copied, according to the rules for shared structure
+     (*note Sharing::).
+
+     For a `reg', it is used directly (without an access macro) by the
+     leaf register renumbering code to ensure that each register is only
+     renumbered once.
+
+     In a `symbol_ref', it indicates that an external declaration for
+     the symbol has already been written.
+
+`volatil'
+     In a `mem', `asm_operands', or `asm_input' expression, it is 1 if
+     the memory reference is volatile.  Volatile memory references may
+     not be deleted, reordered or combined.
+
+     In a `symbol_ref' expression, it is used for machine-specific
+     purposes.
+
+     In a `reg' expression, it is 1 if the value is a user-level
+     variable.  0 indicates an internal compiler temporary.
+
+     In an `insn', 1 means the insn has been deleted.
+
+     In `label_ref' and `reg_label' expressions, 1 means a reference to
+     a non-local label.
+
+     In `prefetch' expressions, 1 means that the containing insn is a
+     scheduling barrier.
+
+     In an RTL dump, this flag is represented as `/v'.
+
+
+File: gccint.info,  Node: Machine Modes,  Next: Constants,  Prev: Flags,  Up: RTL
+
+10.6 Machine Modes
+==================
+
+A machine mode describes a size of data object and the representation
+used for it.  In the C code, machine modes are represented by an
+enumeration type, `enum machine_mode', defined in `machmode.def'.  Each
+RTL expression has room for a machine mode and so do certain kinds of
+tree expressions (declarations and types, to be precise).
+
+ In debugging dumps and machine descriptions, the machine mode of an RTL
+expression is written after the expression code with a colon to separate
+them.  The letters `mode' which appear at the end of each machine mode
+name are omitted.  For example, `(reg:SI 38)' is a `reg' expression
+with machine mode `SImode'.  If the mode is `VOIDmode', it is not
+written at all.
+
+ Here is a table of machine modes.  The term "byte" below refers to an
+object of `BITS_PER_UNIT' bits (*note Storage Layout::).
+
+`BImode'
+     "Bit" mode represents a single bit, for predicate registers.
+
+`QImode'
+     "Quarter-Integer" mode represents a single byte treated as an
+     integer.
+
+`HImode'
+     "Half-Integer" mode represents a two-byte integer.
+
+`PSImode'
+     "Partial Single Integer" mode represents an integer which occupies
+     four bytes but which doesn't really use all four.  On some
+     machines, this is the right mode to use for pointers.
+
+`SImode'
+     "Single Integer" mode represents a four-byte integer.
+
+`PDImode'
+     "Partial Double Integer" mode represents an integer which occupies
+     eight bytes but which doesn't really use all eight.  On some
+     machines, this is the right mode to use for certain pointers.
+
+`DImode'
+     "Double Integer" mode represents an eight-byte integer.
+
+`TImode'
+     "Tetra Integer" (?) mode represents a sixteen-byte integer.
+
+`OImode'
+     "Octa Integer" (?) mode represents a thirty-two-byte integer.
+
+`QFmode'
+     "Quarter-Floating" mode represents a quarter-precision (single
+     byte) floating point number.
+
+`HFmode'
+     "Half-Floating" mode represents a half-precision (two byte)
+     floating point number.
+
+`TQFmode'
+     "Three-Quarter-Floating" (?) mode represents a
+     three-quarter-precision (three byte) floating point number.
+
+`SFmode'
+     "Single Floating" mode represents a four byte floating point
+     number.  In the common case, of a processor with IEEE arithmetic
+     and 8-bit bytes, this is a single-precision IEEE floating point
+     number; it can also be used for double-precision (on processors
+     with 16-bit bytes) and single-precision VAX and IBM types.
+
+`DFmode'
+     "Double Floating" mode represents an eight byte floating point
+     number.  In the common case, of a processor with IEEE arithmetic
+     and 8-bit bytes, this is a double-precision IEEE floating point
+     number.
+
+`XFmode'
+     "Extended Floating" mode represents an IEEE extended floating point
+     number.  This mode only has 80 meaningful bits (ten bytes).  Some
+     processors require such numbers to be padded to twelve bytes,
+     others to sixteen; this mode is used for either.
+
+`SDmode'
+     "Single Decimal Floating" mode represents a four byte decimal
+     floating point number (as distinct from conventional binary
+     floating point).
+
+`DDmode'
+     "Double Decimal Floating" mode represents an eight byte decimal
+     floating point number.
+
+`TDmode'
+     "Tetra Decimal Floating" mode represents a sixteen byte decimal
+     floating point number all 128 of whose bits are meaningful.
+
+`TFmode'
+     "Tetra Floating" mode represents a sixteen byte floating point
+     number all 128 of whose bits are meaningful.  One common use is the
+     IEEE quad-precision format.
+
+`QQmode'
+     "Quarter-Fractional" mode represents a single byte treated as a
+     signed fractional number.  The default format is "s.7".
+
+`HQmode'
+     "Half-Fractional" mode represents a two-byte signed fractional
+     number.  The default format is "s.15".
+
+`SQmode'
+     "Single Fractional" mode represents a four-byte signed fractional
+     number.  The default format is "s.31".
+
+`DQmode'
+     "Double Fractional" mode represents an eight-byte signed
+     fractional number.  The default format is "s.63".
+
+`TQmode'
+     "Tetra Fractional" mode represents a sixteen-byte signed
+     fractional number.  The default format is "s.127".
+
+`UQQmode'
+     "Unsigned Quarter-Fractional" mode represents a single byte
+     treated as an unsigned fractional number.  The default format is
+     ".8".
+
+`UHQmode'
+     "Unsigned Half-Fractional" mode represents a two-byte unsigned
+     fractional number.  The default format is ".16".
+
+`USQmode'
+     "Unsigned Single Fractional" mode represents a four-byte unsigned
+     fractional number.  The default format is ".32".
+
+`UDQmode'
+     "Unsigned Double Fractional" mode represents an eight-byte unsigned
+     fractional number.  The default format is ".64".
+
+`UTQmode'
+     "Unsigned Tetra Fractional" mode represents a sixteen-byte unsigned
+     fractional number.  The default format is ".128".
+
+`HAmode'
+     "Half-Accumulator" mode represents a two-byte signed accumulator.
+     The default format is "s8.7".
+
+`SAmode'
+     "Single Accumulator" mode represents a four-byte signed
+     accumulator.  The default format is "s16.15".
+
+`DAmode'
+     "Double Accumulator" mode represents an eight-byte signed
+     accumulator.  The default format is "s32.31".
+
+`TAmode'
+     "Tetra Accumulator" mode represents a sixteen-byte signed
+     accumulator.  The default format is "s64.63".
+
+`UHAmode'
+     "Unsigned Half-Accumulator" mode represents a two-byte unsigned
+     accumulator.  The default format is "8.8".
+
+`USAmode'
+     "Unsigned Single Accumulator" mode represents a four-byte unsigned
+     accumulator.  The default format is "16.16".
+
+`UDAmode'
+     "Unsigned Double Accumulator" mode represents an eight-byte
+     unsigned accumulator.  The default format is "32.32".
+
+`UTAmode'
+     "Unsigned Tetra Accumulator" mode represents a sixteen-byte
+     unsigned accumulator.  The default format is "64.64".
+
+`CCmode'
+     "Condition Code" mode represents the value of a condition code,
+     which is a machine-specific set of bits used to represent the
+     result of a comparison operation.  Other machine-specific modes
+     may also be used for the condition code.  These modes are not used
+     on machines that use `cc0' (*note Condition Code::).
+
+`BLKmode'
+     "Block" mode represents values that are aggregates to which none of
+     the other modes apply.  In RTL, only memory references can have
+     this mode, and only if they appear in string-move or vector
+     instructions.  On machines which have no such instructions,
+     `BLKmode' will not appear in RTL.
+
+`VOIDmode'
+     Void mode means the absence of a mode or an unspecified mode.  For
+     example, RTL expressions of code `const_int' have mode `VOIDmode'
+     because they can be taken to have whatever mode the context
+     requires.  In debugging dumps of RTL, `VOIDmode' is expressed by
+     the absence of any mode.
+
+`QCmode, HCmode, SCmode, DCmode, XCmode, TCmode'
+     These modes stand for a complex number represented as a pair of
+     floating point values.  The floating point values are in `QFmode',
+     `HFmode', `SFmode', `DFmode', `XFmode', and `TFmode', respectively.
+
+`CQImode, CHImode, CSImode, CDImode, CTImode, COImode'
+     These modes stand for a complex number represented as a pair of
+     integer values.  The integer values are in `QImode', `HImode',
+     `SImode', `DImode', `TImode', and `OImode', respectively.
+
+ The machine description defines `Pmode' as a C macro which expands
+into the machine mode used for addresses.  Normally this is the mode
+whose size is `BITS_PER_WORD', `SImode' on 32-bit machines.
+
+ The only modes which a machine description must support are `QImode',
+and the modes corresponding to `BITS_PER_WORD', `FLOAT_TYPE_SIZE' and
+`DOUBLE_TYPE_SIZE'.  The compiler will attempt to use `DImode' for
+8-byte structures and unions, but this can be prevented by overriding
+the definition of `MAX_FIXED_MODE_SIZE'.  Alternatively, you can have
+the compiler use `TImode' for 16-byte structures and unions.  Likewise,
+you can arrange for the C type `short int' to avoid using `HImode'.
+
+ Very few explicit references to machine modes remain in the compiler
+and these few references will soon be removed.  Instead, the machine
+modes are divided into mode classes.  These are represented by the
+enumeration type `enum mode_class' defined in `machmode.h'.  The
+possible mode classes are:
+
+`MODE_INT'
+     Integer modes.  By default these are `BImode', `QImode', `HImode',
+     `SImode', `DImode', `TImode', and `OImode'.
+
+`MODE_PARTIAL_INT'
+     The "partial integer" modes, `PQImode', `PHImode', `PSImode' and
+     `PDImode'.
+
+`MODE_FLOAT'
+     Floating point modes.  By default these are `QFmode', `HFmode',
+     `TQFmode', `SFmode', `DFmode', `XFmode' and `TFmode'.
+
+`MODE_DECIMAL_FLOAT'
+     Decimal floating point modes.  By default these are `SDmode',
+     `DDmode' and `TDmode'.
+
+`MODE_FRACT'
+     Signed fractional modes.  By default these are `QQmode', `HQmode',
+     `SQmode', `DQmode' and `TQmode'.
+
+`MODE_UFRACT'
+     Unsigned fractional modes.  By default these are `UQQmode',
+     `UHQmode', `USQmode', `UDQmode' and `UTQmode'.
+
+`MODE_ACCUM'
+     Signed accumulator modes.  By default these are `HAmode',
+     `SAmode', `DAmode' and `TAmode'.
+
+`MODE_UACCUM'
+     Unsigned accumulator modes.  By default these are `UHAmode',
+     `USAmode', `UDAmode' and `UTAmode'.
+
+`MODE_COMPLEX_INT'
+     Complex integer modes.  (These are not currently implemented).
+
+`MODE_COMPLEX_FLOAT'
+     Complex floating point modes.  By default these are `QCmode',
+     `HCmode', `SCmode', `DCmode', `XCmode', and `TCmode'.
+
+`MODE_FUNCTION'
+     Algol or Pascal function variables including a static chain.
+     (These are not currently implemented).
+
+`MODE_CC'
+     Modes representing condition code values.  These are `CCmode' plus
+     any `CC_MODE' modes listed in the `MACHINE-modes.def'.  *Note Jump
+     Patterns::, also see *note Condition Code::.
+
+`MODE_RANDOM'
+     This is a catchall mode class for modes which don't fit into the
+     above classes.  Currently `VOIDmode' and `BLKmode' are in
+     `MODE_RANDOM'.
+
+ Here are some C macros that relate to machine modes:
+
+`GET_MODE (X)'
+     Returns the machine mode of the RTX X.
+
+`PUT_MODE (X, NEWMODE)'
+     Alters the machine mode of the RTX X to be NEWMODE.
+
+`NUM_MACHINE_MODES'
+     Stands for the number of machine modes available on the target
+     machine.  This is one greater than the largest numeric value of any
+     machine mode.
+
+`GET_MODE_NAME (M)'
+     Returns the name of mode M as a string.
+
+`GET_MODE_CLASS (M)'
+     Returns the mode class of mode M.
+
+`GET_MODE_WIDER_MODE (M)'
+     Returns the next wider natural mode.  For example, the expression
+     `GET_MODE_WIDER_MODE (QImode)' returns `HImode'.
+
+`GET_MODE_SIZE (M)'
+     Returns the size in bytes of a datum of mode M.
+
+`GET_MODE_BITSIZE (M)'
+     Returns the size in bits of a datum of mode M.
+
+`GET_MODE_IBIT (M)'
+     Returns the number of integral bits of a datum of fixed-point mode
+     M.
+
+`GET_MODE_FBIT (M)'
+     Returns the number of fractional bits of a datum of fixed-point
+     mode M.
+
+`GET_MODE_MASK (M)'
+     Returns a bitmask containing 1 for all bits in a word that fit
+     within mode M.  This macro can only be used for modes whose
+     bitsize is less than or equal to `HOST_BITS_PER_INT'.
+
+`GET_MODE_ALIGNMENT (M)'
+     Return the required alignment, in bits, for an object of mode M.
+
+`GET_MODE_UNIT_SIZE (M)'
+     Returns the size in bytes of the subunits of a datum of mode M.
+     This is the same as `GET_MODE_SIZE' except in the case of complex
+     modes.  For them, the unit size is the size of the real or
+     imaginary part.
+
+`GET_MODE_NUNITS (M)'
+     Returns the number of units contained in a mode, i.e.,
+     `GET_MODE_SIZE' divided by `GET_MODE_UNIT_SIZE'.
+
+`GET_CLASS_NARROWEST_MODE (C)'
+     Returns the narrowest mode in mode class C.
+
+ The global variables `byte_mode' and `word_mode' contain modes whose
+classes are `MODE_INT' and whose bitsizes are either `BITS_PER_UNIT' or
+`BITS_PER_WORD', respectively.  On 32-bit machines, these are `QImode'
+and `SImode', respectively.
+
+
+File: gccint.info,  Node: Constants,  Next: Regs and Memory,  Prev: Machine Modes,  Up: RTL
+
+10.7 Constant Expression Types
+==============================
+
+The simplest RTL expressions are those that represent constant values.
+
+`(const_int I)'
+     This type of expression represents the integer value I.  I is
+     customarily accessed with the macro `INTVAL' as in `INTVAL (EXP)',
+     which is equivalent to `XWINT (EXP, 0)'.
+
+     Constants generated for modes with fewer bits than `HOST_WIDE_INT'
+     must be sign extended to full width (e.g., with `gen_int_mode').
+
+     There is only one expression object for the integer value zero; it
+     is the value of the variable `const0_rtx'.  Likewise, the only
+     expression for integer value one is found in `const1_rtx', the only
+     expression for integer value two is found in `const2_rtx', and the
+     only expression for integer value negative one is found in
+     `constm1_rtx'.  Any attempt to create an expression of code
+     `const_int' and value zero, one, two or negative one will return
+     `const0_rtx', `const1_rtx', `const2_rtx' or `constm1_rtx' as
+     appropriate.
+
+     Similarly, there is only one object for the integer whose value is
+     `STORE_FLAG_VALUE'.  It is found in `const_true_rtx'.  If
+     `STORE_FLAG_VALUE' is one, `const_true_rtx' and `const1_rtx' will
+     point to the same object.  If `STORE_FLAG_VALUE' is -1,
+     `const_true_rtx' and `constm1_rtx' will point to the same object.
+
+`(const_double:M I0 I1 ...)'
+     Represents either a floating-point constant of mode M or an
+     integer constant too large to fit into `HOST_BITS_PER_WIDE_INT'
+     bits but small enough to fit within twice that number of bits (GCC
+     does not provide a mechanism to represent even larger constants).
+     In the latter case, M will be `VOIDmode'.
+
+     If M is `VOIDmode', the bits of the value are stored in I0 and I1.
+     I0 is customarily accessed with the macro `CONST_DOUBLE_LOW' and
+     I1 with `CONST_DOUBLE_HIGH'.
+
+     If the constant is floating point (regardless of its precision),
+     then the number of integers used to store the value depends on the
+     size of `REAL_VALUE_TYPE' (*note Floating Point::).  The integers
+     represent a floating point number, but not precisely in the target
+     machine's or host machine's floating point format.  To convert
+     them to the precise bit pattern used by the target machine, use
+     the macro `REAL_VALUE_TO_TARGET_DOUBLE' and friends (*note Data
+     Output::).
+
+`(const_fixed:M ...)'
+     Represents a fixed-point constant of mode M.  The operand is a
+     data structure of type `struct fixed_value' and is accessed with
+     the macro `CONST_FIXED_VALUE'.  The high part of data is accessed
+     with `CONST_FIXED_VALUE_HIGH'; the low part is accessed with
+     `CONST_FIXED_VALUE_LOW'.
+
+`(const_vector:M [X0 X1 ...])'
+     Represents a vector constant.  The square brackets stand for the
+     vector containing the constant elements.  X0, X1 and so on are the
+     `const_int', `const_double' or `const_fixed' elements.
+
+     The number of units in a `const_vector' is obtained with the macro
+     `CONST_VECTOR_NUNITS' as in `CONST_VECTOR_NUNITS (V)'.
+
+     Individual elements in a vector constant are accessed with the
+     macro `CONST_VECTOR_ELT' as in `CONST_VECTOR_ELT (V, N)' where V
+     is the vector constant and N is the element desired.
+
+`(const_string STR)'
+     Represents a constant string with value STR.  Currently this is
+     used only for insn attributes (*note Insn Attributes::) since
+     constant strings in C are placed in memory.
+
+`(symbol_ref:MODE SYMBOL)'
+     Represents the value of an assembler label for data.  SYMBOL is a
+     string that describes the name of the assembler label.  If it
+     starts with a `*', the label is the rest of SYMBOL not including
+     the `*'.  Otherwise, the label is SYMBOL, usually prefixed with
+     `_'.
+
+     The `symbol_ref' contains a mode, which is usually `Pmode'.
+     Usually that is the only mode for which a symbol is directly valid.
+
+`(label_ref:MODE LABEL)'
+     Represents the value of an assembler label for code.  It contains
+     one operand, an expression, which must be a `code_label' or a
+     `note' of type `NOTE_INSN_DELETED_LABEL' that appears in the
+     instruction sequence to identify the place where the label should
+     go.
+
+     The reason for using a distinct expression type for code label
+     references is so that jump optimization can distinguish them.
+
+     The `label_ref' contains a mode, which is usually `Pmode'.
+     Usually that is the only mode for which a label is directly valid.
+
+`(const:M EXP)'
+     Represents a constant that is the result of an assembly-time
+     arithmetic computation.  The operand, EXP, is an expression that
+     contains only constants (`const_int', `symbol_ref' and `label_ref'
+     expressions) combined with `plus' and `minus'.  However, not all
+     combinations are valid, since the assembler cannot do arbitrary
+     arithmetic on relocatable symbols.
+
+     M should be `Pmode'.
+
+`(high:M EXP)'
+     Represents the high-order bits of EXP, usually a `symbol_ref'.
+     The number of bits is machine-dependent and is normally the number
+     of bits specified in an instruction that initializes the high
+     order bits of a register.  It is used with `lo_sum' to represent
+     the typical two-instruction sequence used in RISC machines to
+     reference a global memory location.
+
+     M should be `Pmode'.
+
+ The macro `CONST0_RTX (MODE)' refers to an expression with value 0 in
+mode MODE.  If mode MODE is of mode class `MODE_INT', it returns
+`const0_rtx'.  If mode MODE is of mode class `MODE_FLOAT', it returns a
+`CONST_DOUBLE' expression in mode MODE.  Otherwise, it returns a
+`CONST_VECTOR' expression in mode MODE.  Similarly, the macro
+`CONST1_RTX (MODE)' refers to an expression with value 1 in mode MODE
+and similarly for `CONST2_RTX'.  The `CONST1_RTX' and `CONST2_RTX'
+macros are undefined for vector modes.
+
+
+File: gccint.info,  Node: Regs and Memory,  Next: Arithmetic,  Prev: Constants,  Up: RTL
+
+10.8 Registers and Memory
+=========================
+
+Here are the RTL expression types for describing access to machine
+registers and to main memory.
+
+`(reg:M N)'
+     For small values of the integer N (those that are less than
+     `FIRST_PSEUDO_REGISTER'), this stands for a reference to machine
+     register number N: a "hard register".  For larger values of N, it
+     stands for a temporary value or "pseudo register".  The compiler's
+     strategy is to generate code assuming an unlimited number of such
+     pseudo registers, and later convert them into hard registers or
+     into memory references.
+
+     M is the machine mode of the reference.  It is necessary because
+     machines can generally refer to each register in more than one
+     mode.  For example, a register may contain a full word but there
+     may be instructions to refer to it as a half word or as a single
+     byte, as well as instructions to refer to it as a floating point
+     number of various precisions.
+
+     Even for a register that the machine can access in only one mode,
+     the mode must always be specified.
+
+     The symbol `FIRST_PSEUDO_REGISTER' is defined by the machine
+     description, since the number of hard registers on the machine is
+     an invariant characteristic of the machine.  Note, however, that
+     not all of the machine registers must be general registers.  All
+     the machine registers that can be used for storage of data are
+     given hard register numbers, even those that can be used only in
+     certain instructions or can hold only certain types of data.
+
+     A hard register may be accessed in various modes throughout one
+     function, but each pseudo register is given a natural mode and is
+     accessed only in that mode.  When it is necessary to describe an
+     access to a pseudo register using a nonnatural mode, a `subreg'
+     expression is used.
+
+     A `reg' expression with a machine mode that specifies more than
+     one word of data may actually stand for several consecutive
+     registers.  If in addition the register number specifies a
+     hardware register, then it actually represents several consecutive
+     hardware registers starting with the specified one.
+
+     Each pseudo register number used in a function's RTL code is
+     represented by a unique `reg' expression.
+
+     Some pseudo register numbers, those within the range of
+     `FIRST_VIRTUAL_REGISTER' to `LAST_VIRTUAL_REGISTER' only appear
+     during the RTL generation phase and are eliminated before the
+     optimization phases.  These represent locations in the stack frame
+     that cannot be determined until RTL generation for the function
+     has been completed.  The following virtual register numbers are
+     defined:
+
+    `VIRTUAL_INCOMING_ARGS_REGNUM'
+          This points to the first word of the incoming arguments
+          passed on the stack.  Normally these arguments are placed
+          there by the caller, but the callee may have pushed some
+          arguments that were previously passed in registers.
+
+          When RTL generation is complete, this virtual register is
+          replaced by the sum of the register given by
+          `ARG_POINTER_REGNUM' and the value of `FIRST_PARM_OFFSET'.
+
+    `VIRTUAL_STACK_VARS_REGNUM'
+          If `FRAME_GROWS_DOWNWARD' is defined to a nonzero value, this
+          points to immediately above the first variable on the stack.
+          Otherwise, it points to the first variable on the stack.
+
+          `VIRTUAL_STACK_VARS_REGNUM' is replaced with the sum of the
+          register given by `FRAME_POINTER_REGNUM' and the value
+          `STARTING_FRAME_OFFSET'.
+
+    `VIRTUAL_STACK_DYNAMIC_REGNUM'
+          This points to the location of dynamically allocated memory
+          on the stack immediately after the stack pointer has been
+          adjusted by the amount of memory desired.
+
+          This virtual register is replaced by the sum of the register
+          given by `STACK_POINTER_REGNUM' and the value
+          `STACK_DYNAMIC_OFFSET'.
+
+    `VIRTUAL_OUTGOING_ARGS_REGNUM'
+          This points to the location in the stack at which outgoing
+          arguments should be written when the stack is pre-pushed
+          (arguments pushed using push insns should always use
+          `STACK_POINTER_REGNUM').
+
+          This virtual register is replaced by the sum of the register
+          given by `STACK_POINTER_REGNUM' and the value
+          `STACK_POINTER_OFFSET'.
+
+`(subreg:M1 REG:M2 BYTENUM)'
+     `subreg' expressions are used to refer to a register in a machine
+     mode other than its natural one, or to refer to one register of a
+     multi-part `reg' that actually refers to several registers.
+
+     Each pseudo register has a natural mode.  If it is necessary to
+     operate on it in a different mode, the register must be enclosed
+     in a `subreg'.
+
+     There are currently three supported types for the first operand of
+     a `subreg':
+        * pseudo registers This is the most common case.  Most
+          `subreg's have pseudo `reg's as their first operand.
+
+        * mem `subreg's of `mem' were common in earlier versions of GCC
+          and are still supported.  During the reload pass these are
+          replaced by plain `mem's.  On machines that do not do
+          instruction scheduling, use of `subreg's of `mem' are still
+          used, but this is no longer recommended.  Such `subreg's are
+          considered to be `register_operand's rather than
+          `memory_operand's before and during reload.  Because of this,
+          the scheduling passes cannot properly schedule instructions
+          with `subreg's of `mem', so for machines that do scheduling,
+          `subreg's of `mem' should never be used.  To support this,
+          the combine and recog passes have explicit code to inhibit
+          the creation of `subreg's of `mem' when `INSN_SCHEDULING' is
+          defined.
+
+          The use of `subreg's of `mem' after the reload pass is an area
+          that is not well understood and should be avoided.  There is
+          still some code in the compiler to support this, but this
+          code has possibly rotted.  This use of `subreg's is
+          discouraged and will most likely not be supported in the
+          future.
+
+        * hard registers It is seldom necessary to wrap hard registers
+          in `subreg's; such registers would normally reduce to a
+          single `reg' rtx.  This use of `subreg's is discouraged and
+          may not be supported in the future.
+
+
+     `subreg's of `subreg's are not supported.  Using
+     `simplify_gen_subreg' is the recommended way to avoid this problem.
+
+     `subreg's come in two distinct flavors, each having its own usage
+     and rules:
+
+    Paradoxical subregs
+          When M1 is strictly wider than M2, the `subreg' expression is
+          called "paradoxical".  The canonical test for this class of
+          `subreg' is:
+
+               GET_MODE_SIZE (M1) > GET_MODE_SIZE (M2)
+
+          Paradoxical `subreg's can be used as both lvalues and rvalues.
+          When used as an lvalue, the low-order bits of the source value
+          are stored in REG and the high-order bits are discarded.
+          When used as an rvalue, the low-order bits of the `subreg' are
+          taken from REG while the high-order bits may or may not be
+          defined.
+
+          The high-order bits of rvalues are in the following
+          circumstances:
+
+             * `subreg's of `mem' When M2 is smaller than a word, the
+               macro `LOAD_EXTEND_OP', can control how the high-order
+               bits are defined.
+
+             * `subreg' of `reg's The upper bits are defined when
+               `SUBREG_PROMOTED_VAR_P' is true.
+               `SUBREG_PROMOTED_UNSIGNED_P' describes what the upper
+               bits hold.  Such subregs usually represent local
+               variables, register variables and parameter pseudo
+               variables that have been promoted to a wider mode.
+
+
+          BYTENUM is always zero for a paradoxical `subreg', even on
+          big-endian targets.
+
+          For example, the paradoxical `subreg':
+
+               (set (subreg:SI (reg:HI X) 0) Y)
+
+          stores the lower 2 bytes of Y in X and discards the upper 2
+          bytes.  A subsequent:
+
+               (set Z (subreg:SI (reg:HI X) 0))
+
+          would set the lower two bytes of Z to Y and set the upper two
+          bytes to an unknown value assuming `SUBREG_PROMOTED_VAR_P' is
+          false.
+
+    Normal subregs
+          When M1 is at least as narrow as M2 the `subreg' expression
+          is called "normal".
+
+          Normal `subreg's restrict consideration to certain bits of
+          REG.  There are two cases.  If M1 is smaller than a word, the
+          `subreg' refers to the least-significant part (or "lowpart")
+          of one word of REG.  If M1 is word-sized or greater, the
+          `subreg' refers to one or more complete words.
+
+          When used as an lvalue, `subreg' is a word-based accessor.
+          Storing to a `subreg' modifies all the words of REG that
+          overlap the `subreg', but it leaves the other words of REG
+          alone.
+
+          When storing to a normal `subreg' that is smaller than a word,
+          the other bits of the referenced word are usually left in an
+          undefined state.  This laxity makes it easier to generate
+          efficient code for such instructions.  To represent an
+          instruction that preserves all the bits outside of those in
+          the `subreg', use `strict_low_part' or `zero_extract' around
+          the `subreg'.
+
+          BYTENUM must identify the offset of the first byte of the
+          `subreg' from the start of REG, assuming that REG is laid out
+          in memory order.  The memory order of bytes is defined by two
+          target macros, `WORDS_BIG_ENDIAN' and `BYTES_BIG_ENDIAN':
+
+             * `WORDS_BIG_ENDIAN', if set to 1, says that byte number
+               zero is part of the most significant word; otherwise, it
+               is part of the least significant word.
+
+             * `BYTES_BIG_ENDIAN', if set to 1, says that byte number
+               zero is the most significant byte within a word;
+               otherwise, it is the least significant byte within a
+               word.
+
+          On a few targets, `FLOAT_WORDS_BIG_ENDIAN' disagrees with
+          `WORDS_BIG_ENDIAN'.  However, most parts of the compiler treat
+          floating point values as if they had the same endianness as
+          integer values.  This works because they handle them solely
+          as a collection of integer values, with no particular
+          numerical value.  Only real.c and the runtime libraries care
+          about `FLOAT_WORDS_BIG_ENDIAN'.
+
+          Thus,
+
+               (subreg:HI (reg:SI X) 2)
+
+          on a `BYTES_BIG_ENDIAN', `UNITS_PER_WORD == 4' target is the
+          same as
+
+               (subreg:HI (reg:SI X) 0)
+
+          on a little-endian, `UNITS_PER_WORD == 4' target.  Both
+          `subreg's access the lower two bytes of register X.
+
+
+     A `MODE_PARTIAL_INT' mode behaves as if it were as wide as the
+     corresponding `MODE_INT' mode, except that it has an unknown
+     number of undefined bits.  For example:
+
+          (subreg:PSI (reg:SI 0) 0)
+
+     accesses the whole of `(reg:SI 0)', but the exact relationship
+     between the `PSImode' value and the `SImode' value is not defined.
+     If we assume `UNITS_PER_WORD <= 4', then the following two
+     `subreg's:
+
+          (subreg:PSI (reg:DI 0) 0)
+          (subreg:PSI (reg:DI 0) 4)
+
+     represent independent 4-byte accesses to the two halves of
+     `(reg:DI 0)'.  Both `subreg's have an unknown number of undefined
+     bits.
+
+     If `UNITS_PER_WORD <= 2' then these two `subreg's:
+
+          (subreg:HI (reg:PSI 0) 0)
+          (subreg:HI (reg:PSI 0) 2)
+
+     represent independent 2-byte accesses that together span the whole
+     of `(reg:PSI 0)'.  Storing to the first `subreg' does not affect
+     the value of the second, and vice versa.  `(reg:PSI 0)' has an
+     unknown number of undefined bits, so the assignment:
+
+          (set (subreg:HI (reg:PSI 0) 0) (reg:HI 4))
+
+     does not guarantee that `(subreg:HI (reg:PSI 0) 0)' has the value
+     `(reg:HI 4)'.
+
+     The rules above apply to both pseudo REGs and hard REGs.  If the
+     semantics are not correct for particular combinations of M1, M2
+     and hard REG, the target-specific code must ensure that those
+     combinations are never used.  For example:
+
+          CANNOT_CHANGE_MODE_CLASS (M2, M1, CLASS)
+
+     must be true for every class CLASS that includes REG.
+
+     The first operand of a `subreg' expression is customarily accessed
+     with the `SUBREG_REG' macro and the second operand is customarily
+     accessed with the `SUBREG_BYTE' macro.
+
+     It has been several years since a platform in which
+     `BYTES_BIG_ENDIAN' not equal to `WORDS_BIG_ENDIAN' has been
+     tested.  Anyone wishing to support such a platform in the future
+     may be confronted with code rot.
+
+`(scratch:M)'
+     This represents a scratch register that will be required for the
+     execution of a single instruction and not used subsequently.  It is
+     converted into a `reg' by either the local register allocator or
+     the reload pass.
+
+     `scratch' is usually present inside a `clobber' operation (*note
+     Side Effects::).
+
+`(cc0)'
+     This refers to the machine's condition code register.  It has no
+     operands and may not have a machine mode.  There are two ways to
+     use it:
+
+        * To stand for a complete set of condition code flags.  This is
+          best on most machines, where each comparison sets the entire
+          series of flags.
+
+          With this technique, `(cc0)' may be validly used in only two
+          contexts: as the destination of an assignment (in test and
+          compare instructions) and in comparison operators comparing
+          against zero (`const_int' with value zero; that is to say,
+          `const0_rtx').
+
+        * To stand for a single flag that is the result of a single
+          condition.  This is useful on machines that have only a
+          single flag bit, and in which comparison instructions must
+          specify the condition to test.
+
+          With this technique, `(cc0)' may be validly used in only two
+          contexts: as the destination of an assignment (in test and
+          compare instructions) where the source is a comparison
+          operator, and as the first operand of `if_then_else' (in a
+          conditional branch).
+
+     There is only one expression object of code `cc0'; it is the value
+     of the variable `cc0_rtx'.  Any attempt to create an expression of
+     code `cc0' will return `cc0_rtx'.
+
+     Instructions can set the condition code implicitly.  On many
+     machines, nearly all instructions set the condition code based on
+     the value that they compute or store.  It is not necessary to
+     record these actions explicitly in the RTL because the machine
+     description includes a prescription for recognizing the
+     instructions that do so (by means of the macro
+     `NOTICE_UPDATE_CC').  *Note Condition Code::.  Only instructions
+     whose sole purpose is to set the condition code, and instructions
+     that use the condition code, need mention `(cc0)'.
+
+     On some machines, the condition code register is given a register
+     number and a `reg' is used instead of `(cc0)'.  This is usually the
+     preferable approach if only a small subset of instructions modify
+     the condition code.  Other machines store condition codes in
+     general registers; in such cases a pseudo register should be used.
+
+     Some machines, such as the SPARC and RS/6000, have two sets of
+     arithmetic instructions, one that sets and one that does not set
+     the condition code.  This is best handled by normally generating
+     the instruction that does not set the condition code, and making a
+     pattern that both performs the arithmetic and sets the condition
+     code register (which would not be `(cc0)' in this case).  For
+     examples, search for `addcc' and `andcc' in `sparc.md'.
+
+`(pc)'
+     This represents the machine's program counter.  It has no operands
+     and may not have a machine mode.  `(pc)' may be validly used only
+     in certain specific contexts in jump instructions.
+
+     There is only one expression object of code `pc'; it is the value
+     of the variable `pc_rtx'.  Any attempt to create an expression of
+     code `pc' will return `pc_rtx'.
+
+     All instructions that do not jump alter the program counter
+     implicitly by incrementing it, but there is no need to mention
+     this in the RTL.
+
+`(mem:M ADDR ALIAS)'
+     This RTX represents a reference to main memory at an address
+     represented by the expression ADDR.  M specifies how large a unit
+     of memory is accessed.  ALIAS specifies an alias set for the
+     reference.  In general two items are in different alias sets if
+     they cannot reference the same memory address.
+
+     The construct `(mem:BLK (scratch))' is considered to alias all
+     other memories.  Thus it may be used as a memory barrier in
+     epilogue stack deallocation patterns.
+
+`(concatM RTX RTX)'
+     This RTX represents the concatenation of two other RTXs.  This is
+     used for complex values.  It should only appear in the RTL
+     attached to declarations and during RTL generation.  It should not
+     appear in the ordinary insn chain.
+
+`(concatnM [RTX ...])'
+     This RTX represents the concatenation of all the RTX to make a
+     single value.  Like `concat', this should only appear in
+     declarations, and not in the insn chain.
+
+
+File: gccint.info,  Node: Arithmetic,  Next: Comparisons,  Prev: Regs and Memory,  Up: RTL
+
+10.9 RTL Expressions for Arithmetic
+===================================
+
+Unless otherwise specified, all the operands of arithmetic expressions
+must be valid for mode M.  An operand is valid for mode M if it has
+mode M, or if it is a `const_int' or `const_double' and M is a mode of
+class `MODE_INT'.
+
+ For commutative binary operations, constants should be placed in the
+second operand.
+
+`(plus:M X Y)'
+`(ss_plus:M X Y)'
+`(us_plus:M X Y)'
+     These three expressions all represent the sum of the values
+     represented by X and Y carried out in machine mode M.  They differ
+     in their behavior on overflow of integer modes.  `plus' wraps
+     round modulo the width of M; `ss_plus' saturates at the maximum
+     signed value representable in M; `us_plus' saturates at the
+     maximum unsigned value.
+
+`(lo_sum:M X Y)'
+     This expression represents the sum of X and the low-order bits of
+     Y.  It is used with `high' (*note Constants::) to represent the
+     typical two-instruction sequence used in RISC machines to
+     reference a global memory location.
+
+     The number of low order bits is machine-dependent but is normally
+     the number of bits in a `Pmode' item minus the number of bits set
+     by `high'.
+
+     M should be `Pmode'.
+
+`(minus:M X Y)'
+`(ss_minus:M X Y)'
+`(us_minus:M X Y)'
+     These three expressions represent the result of subtracting Y from
+     X, carried out in mode M.  Behavior on overflow is the same as for
+     the three variants of `plus' (see above).
+
+`(compare:M X Y)'
+     Represents the result of subtracting Y from X for purposes of
+     comparison.  The result is computed without overflow, as if with
+     infinite precision.
+
+     Of course, machines can't really subtract with infinite precision.
+     However, they can pretend to do so when only the sign of the
+     result will be used, which is the case when the result is stored
+     in the condition code.  And that is the _only_ way this kind of
+     expression may validly be used: as a value to be stored in the
+     condition codes, either `(cc0)' or a register.  *Note
+     Comparisons::.
+
+     The mode M is not related to the modes of X and Y, but instead is
+     the mode of the condition code value.  If `(cc0)' is used, it is
+     `VOIDmode'.  Otherwise it is some mode in class `MODE_CC', often
+     `CCmode'.  *Note Condition Code::.  If M is `VOIDmode' or
+     `CCmode', the operation returns sufficient information (in an
+     unspecified format) so that any comparison operator can be applied
+     to the result of the `COMPARE' operation.  For other modes in
+     class `MODE_CC', the operation only returns a subset of this
+     information.
+
+     Normally, X and Y must have the same mode.  Otherwise, `compare'
+     is valid only if the mode of X is in class `MODE_INT' and Y is a
+     `const_int' or `const_double' with mode `VOIDmode'.  The mode of X
+     determines what mode the comparison is to be done in; thus it must
+     not be `VOIDmode'.
+
+     If one of the operands is a constant, it should be placed in the
+     second operand and the comparison code adjusted as appropriate.
+
+     A `compare' specifying two `VOIDmode' constants is not valid since
+     there is no way to know in what mode the comparison is to be
+     performed; the comparison must either be folded during the
+     compilation or the first operand must be loaded into a register
+     while its mode is still known.
+
+`(neg:M X)'
+`(ss_neg:M X)'
+`(us_neg:M X)'
+     These two expressions represent the negation (subtraction from
+     zero) of the value represented by X, carried out in mode M.  They
+     differ in the behavior on overflow of integer modes.  In the case
+     of `neg', the negation of the operand may be a number not
+     representable in mode M, in which case it is truncated to M.
+     `ss_neg' and `us_neg' ensure that an out-of-bounds result
+     saturates to the maximum or minimum signed or unsigned value.
+
+`(mult:M X Y)'
+`(ss_mult:M X Y)'
+`(us_mult:M X Y)'
+     Represents the signed product of the values represented by X and Y
+     carried out in machine mode M.  `ss_mult' and `us_mult' ensure
+     that an out-of-bounds result saturates to the maximum or minimum
+     signed or unsigned value.
+
+     Some machines support a multiplication that generates a product
+     wider than the operands.  Write the pattern for this as
+
+          (mult:M (sign_extend:M X) (sign_extend:M Y))
+
+     where M is wider than the modes of X and Y, which need not be the
+     same.
+
+     For unsigned widening multiplication, use the same idiom, but with
+     `zero_extend' instead of `sign_extend'.
+
+`(fma:M X Y Z)'
+     Represents the `fma', `fmaf', and `fmal' builtin functions that do
+     a combined multiply of X and Y and then adding toZ without doing
+     an intermediate rounding step.
+
+`(div:M X Y)'
+`(ss_div:M X Y)'
+     Represents the quotient in signed division of X by Y, carried out
+     in machine mode M.  If M is a floating point mode, it represents
+     the exact quotient; otherwise, the integerized quotient.  `ss_div'
+     ensures that an out-of-bounds result saturates to the maximum or
+     minimum signed value.
+
+     Some machines have division instructions in which the operands and
+     quotient widths are not all the same; you should represent such
+     instructions using `truncate' and `sign_extend' as in,
+
+          (truncate:M1 (div:M2 X (sign_extend:M2 Y)))
+
+`(udiv:M X Y)'
+`(us_div:M X Y)'
+     Like `div' but represents unsigned division.  `us_div' ensures
+     that an out-of-bounds result saturates to the maximum or minimum
+     unsigned value.
+
+`(mod:M X Y)'
+`(umod:M X Y)'
+     Like `div' and `udiv' but represent the remainder instead of the
+     quotient.
+
+`(smin:M X Y)'
+`(smax:M X Y)'
+     Represents the smaller (for `smin') or larger (for `smax') of X
+     and Y, interpreted as signed values in mode M.  When used with
+     floating point, if both operands are zeros, or if either operand
+     is `NaN', then it is unspecified which of the two operands is
+     returned as the result.
+
+`(umin:M X Y)'
+`(umax:M X Y)'
+     Like `smin' and `smax', but the values are interpreted as unsigned
+     integers.
+
+`(not:M X)'
+     Represents the bitwise complement of the value represented by X,
+     carried out in mode M, which must be a fixed-point machine mode.
+
+`(and:M X Y)'
+     Represents the bitwise logical-and of the values represented by X
+     and Y, carried out in machine mode M, which must be a fixed-point
+     machine mode.
+
+`(ior:M X Y)'
+     Represents the bitwise inclusive-or of the values represented by X
+     and Y, carried out in machine mode M, which must be a fixed-point
+     mode.
+
+`(xor:M X Y)'
+     Represents the bitwise exclusive-or of the values represented by X
+     and Y, carried out in machine mode M, which must be a fixed-point
+     mode.
+
+`(ashift:M X C)'
+`(ss_ashift:M X C)'
+`(us_ashift:M X C)'
+     These three expressions represent the result of arithmetically
+     shifting X left by C places.  They differ in their behavior on
+     overflow of integer modes.  An `ashift' operation is a plain shift
+     with no special behavior in case of a change in the sign bit;
+     `ss_ashift' and `us_ashift' saturates to the minimum or maximum
+     representable value if any of the bits shifted out differs from
+     the final sign bit.
+
+     X have mode M, a fixed-point machine mode.  C be a fixed-point
+     mode or be a constant with mode `VOIDmode'; which mode is
+     determined by the mode called for in the machine description entry
+     for the left-shift instruction.  For example, on the VAX, the mode
+     of C is `QImode' regardless of M.
+
+`(lshiftrt:M X C)'
+`(ashiftrt:M X C)'
+     Like `ashift' but for right shift.  Unlike the case for left shift,
+     these two operations are distinct.
+
+`(rotate:M X C)'
+`(rotatert:M X C)'
+     Similar but represent left and right rotate.  If C is a constant,
+     use `rotate'.
+
+`(abs:M X)'
+
+`(ss_abs:M X)'
+     Represents the absolute value of X, computed in mode M.  `ss_abs'
+     ensures that an out-of-bounds result saturates to the maximum
+     signed value.
+
+`(sqrt:M X)'
+     Represents the square root of X, computed in mode M.  Most often M
+     will be a floating point mode.
+
+`(ffs:M X)'
+     Represents one plus the index of the least significant 1-bit in X,
+     represented as an integer of mode M.  (The value is zero if X is
+     zero.)  The mode of X need not be M; depending on the target
+     machine, various mode combinations may be valid.
+
+`(clz:M X)'
+     Represents the number of leading 0-bits in X, represented as an
+     integer of mode M, starting at the most significant bit position.
+     If X is zero, the value is determined by
+     `CLZ_DEFINED_VALUE_AT_ZERO' (*note Misc::).  Note that this is one
+     of the few expressions that is not invariant under widening.  The
+     mode of X will usually be an integer mode.
+
+`(ctz:M X)'
+     Represents the number of trailing 0-bits in X, represented as an
+     integer of mode M, starting at the least significant bit position.
+     If X is zero, the value is determined by
+     `CTZ_DEFINED_VALUE_AT_ZERO' (*note Misc::).  Except for this case,
+     `ctz(x)' is equivalent to `ffs(X) - 1'.  The mode of X will
+     usually be an integer mode.
+
+`(popcount:M X)'
+     Represents the number of 1-bits in X, represented as an integer of
+     mode M.  The mode of X will usually be an integer mode.
+
+`(parity:M X)'
+     Represents the number of 1-bits modulo 2 in X, represented as an
+     integer of mode M.  The mode of X will usually be an integer mode.
+
+`(bswap:M X)'
+     Represents the value X with the order of bytes reversed, carried
+     out in mode M, which must be a fixed-point machine mode.
+
+
+File: gccint.info,  Node: Comparisons,  Next: Bit-Fields,  Prev: Arithmetic,  Up: RTL
+
+10.10 Comparison Operations
+===========================
+
+Comparison operators test a relation on two operands and are considered
+to represent a machine-dependent nonzero value described by, but not
+necessarily equal to, `STORE_FLAG_VALUE' (*note Misc::) if the relation
+holds, or zero if it does not, for comparison operators whose results
+have a `MODE_INT' mode, `FLOAT_STORE_FLAG_VALUE' (*note Misc::) if the
+relation holds, or zero if it does not, for comparison operators that
+return floating-point values, and a vector of either
+`VECTOR_STORE_FLAG_VALUE' (*note Misc::) if the relation holds, or of
+zeros if it does not, for comparison operators that return vector
+results.  The mode of the comparison operation is independent of the
+mode of the data being compared.  If the comparison operation is being
+tested (e.g., the first operand of an `if_then_else'), the mode must be
+`VOIDmode'.
+
+ There are two ways that comparison operations may be used.  The
+comparison operators may be used to compare the condition codes `(cc0)'
+against zero, as in `(eq (cc0) (const_int 0))'.  Such a construct
+actually refers to the result of the preceding instruction in which the
+condition codes were set.  The instruction setting the condition code
+must be adjacent to the instruction using the condition code; only
+`note' insns may separate them.
+
+ Alternatively, a comparison operation may directly compare two data
+objects.  The mode of the comparison is determined by the operands; they
+must both be valid for a common machine mode.  A comparison with both
+operands constant would be invalid as the machine mode could not be
+deduced from it, but such a comparison should never exist in RTL due to
+constant folding.
+
+ In the example above, if `(cc0)' were last set to `(compare X Y)', the
+comparison operation is identical to `(eq X Y)'.  Usually only one style
+of comparisons is supported on a particular machine, but the combine
+pass will try to merge the operations to produce the `eq' shown in case
+it exists in the context of the particular insn involved.
+
+ Inequality comparisons come in two flavors, signed and unsigned.  Thus,
+there are distinct expression codes `gt' and `gtu' for signed and
+unsigned greater-than.  These can produce different results for the same
+pair of integer values: for example, 1 is signed greater-than -1 but not
+unsigned greater-than, because -1 when regarded as unsigned is actually
+`0xffffffff' which is greater than 1.
+
+ The signed comparisons are also used for floating point values.
+Floating point comparisons are distinguished by the machine modes of
+the operands.
+
+`(eq:M X Y)'
+     `STORE_FLAG_VALUE' if the values represented by X and Y are equal,
+     otherwise 0.
+
+`(ne:M X Y)'
+     `STORE_FLAG_VALUE' if the values represented by X and Y are not
+     equal, otherwise 0.
+
+`(gt:M X Y)'
+     `STORE_FLAG_VALUE' if the X is greater than Y.  If they are
+     fixed-point, the comparison is done in a signed sense.
+
+`(gtu:M X Y)'
+     Like `gt' but does unsigned comparison, on fixed-point numbers
+     only.
+
+`(lt:M X Y)'
+`(ltu:M X Y)'
+     Like `gt' and `gtu' but test for "less than".
+
+`(ge:M X Y)'
+`(geu:M X Y)'
+     Like `gt' and `gtu' but test for "greater than or equal".
+
+`(le:M X Y)'
+`(leu:M X Y)'
+     Like `gt' and `gtu' but test for "less than or equal".
+
+`(if_then_else COND THEN ELSE)'
+     This is not a comparison operation but is listed here because it is
+     always used in conjunction with a comparison operation.  To be
+     precise, COND is a comparison expression.  This expression
+     represents a choice, according to COND, between the value
+     represented by THEN and the one represented by ELSE.
+
+     On most machines, `if_then_else' expressions are valid only to
+     express conditional jumps.
+
+`(cond [TEST1 VALUE1 TEST2 VALUE2 ...] DEFAULT)'
+     Similar to `if_then_else', but more general.  Each of TEST1,
+     TEST2, ... is performed in turn.  The result of this expression is
+     the VALUE corresponding to the first nonzero test, or DEFAULT if
+     none of the tests are nonzero expressions.
+
+     This is currently not valid for instruction patterns and is
+     supported only for insn attributes.  *Note Insn Attributes::.
+
+
+File: gccint.info,  Node: Bit-Fields,  Next: Vector Operations,  Prev: Comparisons,  Up: RTL
+
+10.11 Bit-Fields
+================
+
+Special expression codes exist to represent bit-field instructions.
+
+`(sign_extract:M LOC SIZE POS)'
+     This represents a reference to a sign-extended bit-field contained
+     or starting in LOC (a memory or register reference).  The bit-field
+     is SIZE bits wide and starts at bit POS.  The compilation option
+     `BITS_BIG_ENDIAN' says which end of the memory unit POS counts
+     from.
+
+     If LOC is in memory, its mode must be a single-byte integer mode.
+     If LOC is in a register, the mode to use is specified by the
+     operand of the `insv' or `extv' pattern (*note Standard Names::)
+     and is usually a full-word integer mode, which is the default if
+     none is specified.
+
+     The mode of POS is machine-specific and is also specified in the
+     `insv' or `extv' pattern.
+
+     The mode M is the same as the mode that would be used for LOC if
+     it were a register.
+
+     A `sign_extract' can not appear as an lvalue, or part thereof, in
+     RTL.
+
+`(zero_extract:M LOC SIZE POS)'
+     Like `sign_extract' but refers to an unsigned or zero-extended
+     bit-field.  The same sequence of bits are extracted, but they are
+     filled to an entire word with zeros instead of by sign-extension.
+
+     Unlike `sign_extract', this type of expressions can be lvalues in
+     RTL; they may appear on the left side of an assignment, indicating
+     insertion of a value into the specified bit-field.
+
+
+File: gccint.info,  Node: Vector Operations,  Next: Conversions,  Prev: Bit-Fields,  Up: RTL
+
+10.12 Vector Operations
+=======================
+
+All normal RTL expressions can be used with vector modes; they are
+interpreted as operating on each part of the vector independently.
+Additionally, there are a few new expressions to describe specific
+vector operations.
+
+`(vec_merge:M VEC1 VEC2 ITEMS)'
+     This describes a merge operation between two vectors.  The result
+     is a vector of mode M; its elements are selected from either VEC1
+     or VEC2.  Which elements are selected is described by ITEMS, which
+     is a bit mask represented by a `const_int'; a zero bit indicates
+     the corresponding element in the result vector is taken from VEC2
+     while a set bit indicates it is taken from VEC1.
+
+`(vec_select:M VEC1 SELECTION)'
+     This describes an operation that selects parts of a vector.  VEC1
+     is the source vector, and SELECTION is a `parallel' that contains a
+     `const_int' for each of the subparts of the result vector, giving
+     the number of the source subpart that should be stored into it.
+     The result mode M is either the submode for a single element of
+     VEC1 (if only one subpart is selected), or another vector mode
+     with that element submode (if multiple subparts are selected).
+
+`(vec_concat:M VEC1 VEC2)'
+     Describes a vector concat operation.  The result is a
+     concatenation of the vectors VEC1 and VEC2; its length is the sum
+     of the lengths of the two inputs.
+
+`(vec_duplicate:M VEC)'
+     This operation converts a small vector into a larger one by
+     duplicating the input values.  The output vector mode must have
+     the same submodes as the input vector mode, and the number of
+     output parts must be an integer multiple of the number of input
+     parts.
+
+
+
+File: gccint.info,  Node: Conversions,  Next: RTL Declarations,  Prev: Vector Operations,  Up: RTL
+
+10.13 Conversions
+=================
+
+All conversions between machine modes must be represented by explicit
+conversion operations.  For example, an expression which is the sum of
+a byte and a full word cannot be written as `(plus:SI (reg:QI 34)
+(reg:SI 80))' because the `plus' operation requires two operands of the
+same machine mode.  Therefore, the byte-sized operand is enclosed in a
+conversion operation, as in
+
+     (plus:SI (sign_extend:SI (reg:QI 34)) (reg:SI 80))
+
+ The conversion operation is not a mere placeholder, because there may
+be more than one way of converting from a given starting mode to the
+desired final mode.  The conversion operation code says how to do it.
+
+ For all conversion operations, X must not be `VOIDmode' because the
+mode in which to do the conversion would not be known.  The conversion
+must either be done at compile-time or X must be placed into a register.
+
+`(sign_extend:M X)'
+     Represents the result of sign-extending the value X to machine
+     mode M.  M must be a fixed-point mode and X a fixed-point value of
+     a mode narrower than M.
+
+`(zero_extend:M X)'
+     Represents the result of zero-extending the value X to machine
+     mode M.  M must be a fixed-point mode and X a fixed-point value of
+     a mode narrower than M.
+
+`(float_extend:M X)'
+     Represents the result of extending the value X to machine mode M.
+     M must be a floating point mode and X a floating point value of a
+     mode narrower than M.
+
+`(truncate:M X)'
+     Represents the result of truncating the value X to machine mode M.
+     M must be a fixed-point mode and X a fixed-point value of a mode
+     wider than M.
+
+`(ss_truncate:M X)'
+     Represents the result of truncating the value X to machine mode M,
+     using signed saturation in the case of overflow.  Both M and the
+     mode of X must be fixed-point modes.
+
+`(us_truncate:M X)'
+     Represents the result of truncating the value X to machine mode M,
+     using unsigned saturation in the case of overflow.  Both M and the
+     mode of X must be fixed-point modes.
+
+`(float_truncate:M X)'
+     Represents the result of truncating the value X to machine mode M.
+     M must be a floating point mode and X a floating point value of a
+     mode wider than M.
+
+`(float:M X)'
+     Represents the result of converting fixed point value X, regarded
+     as signed, to floating point mode M.
+
+`(unsigned_float:M X)'
+     Represents the result of converting fixed point value X, regarded
+     as unsigned, to floating point mode M.
+
+`(fix:M X)'
+     When M is a floating-point mode, represents the result of
+     converting floating point value X (valid for mode M) to an
+     integer, still represented in floating point mode M, by rounding
+     towards zero.
+
+     When M is a fixed-point mode, represents the result of converting
+     floating point value X to mode M, regarded as signed.  How
+     rounding is done is not specified, so this operation may be used
+     validly in compiling C code only for integer-valued operands.
+
+`(unsigned_fix:M X)'
+     Represents the result of converting floating point value X to
+     fixed point mode M, regarded as unsigned.  How rounding is done is
+     not specified.
+
+`(fract_convert:M X)'
+     Represents the result of converting fixed-point value X to
+     fixed-point mode M, signed integer value X to fixed-point mode M,
+     floating-point value X to fixed-point mode M, fixed-point value X
+     to integer mode M regarded as signed, or fixed-point value X to
+     floating-point mode M.  When overflows or underflows happen, the
+     results are undefined.
+
+`(sat_fract:M X)'
+     Represents the result of converting fixed-point value X to
+     fixed-point mode M, signed integer value X to fixed-point mode M,
+     or floating-point value X to fixed-point mode M.  When overflows
+     or underflows happen, the results are saturated to the maximum or
+     the minimum.
+
+`(unsigned_fract_convert:M X)'
+     Represents the result of converting fixed-point value X to integer
+     mode M regarded as unsigned, or unsigned integer value X to
+     fixed-point mode M.  When overflows or underflows happen, the
+     results are undefined.
+
+`(unsigned_sat_fract:M X)'
+     Represents the result of converting unsigned integer value X to
+     fixed-point mode M.  When overflows or underflows happen, the
+     results are saturated to the maximum or the minimum.
+
+
+File: gccint.info,  Node: RTL Declarations,  Next: Side Effects,  Prev: Conversions,  Up: RTL
+
+10.14 Declarations
+==================
+
+Declaration expression codes do not represent arithmetic operations but
+rather state assertions about their operands.
+
+`(strict_low_part (subreg:M (reg:N R) 0))'
+     This expression code is used in only one context: as the
+     destination operand of a `set' expression.  In addition, the
+     operand of this expression must be a non-paradoxical `subreg'
+     expression.
+
+     The presence of `strict_low_part' says that the part of the
+     register which is meaningful in mode N, but is not part of mode M,
+     is not to be altered.  Normally, an assignment to such a subreg is
+     allowed to have undefined effects on the rest of the register when
+     M is less than a word.
+
+
+File: gccint.info,  Node: Side Effects,  Next: Incdec,  Prev: RTL Declarations,  Up: RTL
+
+10.15 Side Effect Expressions
+=============================
+
+The expression codes described so far represent values, not actions.
+But machine instructions never produce values; they are meaningful only
+for their side effects on the state of the machine.  Special expression
+codes are used to represent side effects.
+
+ The body of an instruction is always one of these side effect codes;
+the codes described above, which represent values, appear only as the
+operands of these.
+
+`(set LVAL X)'
+     Represents the action of storing the value of X into the place
+     represented by LVAL.  LVAL must be an expression representing a
+     place that can be stored in: `reg' (or `subreg', `strict_low_part'
+     or `zero_extract'), `mem', `pc', `parallel', or `cc0'.
+
+     If LVAL is a `reg', `subreg' or `mem', it has a machine mode; then
+     X must be valid for that mode.
+
+     If LVAL is a `reg' whose machine mode is less than the full width
+     of the register, then it means that the part of the register
+     specified by the machine mode is given the specified value and the
+     rest of the register receives an undefined value.  Likewise, if
+     LVAL is a `subreg' whose machine mode is narrower than the mode of
+     the register, the rest of the register can be changed in an
+     undefined way.
+
+     If LVAL is a `strict_low_part' of a subreg, then the part of the
+     register specified by the machine mode of the `subreg' is given
+     the value X and the rest of the register is not changed.
+
+     If LVAL is a `zero_extract', then the referenced part of the
+     bit-field (a memory or register reference) specified by the
+     `zero_extract' is given the value X and the rest of the bit-field
+     is not changed.  Note that `sign_extract' can not appear in LVAL.
+
+     If LVAL is `(cc0)', it has no machine mode, and X may be either a
+     `compare' expression or a value that may have any mode.  The
+     latter case represents a "test" instruction.  The expression `(set
+     (cc0) (reg:M N))' is equivalent to `(set (cc0) (compare (reg:M N)
+     (const_int 0)))'.  Use the former expression to save space during
+     the compilation.
+
+     If LVAL is a `parallel', it is used to represent the case of a
+     function returning a structure in multiple registers.  Each element
+     of the `parallel' is an `expr_list' whose first operand is a `reg'
+     and whose second operand is a `const_int' representing the offset
+     (in bytes) into the structure at which the data in that register
+     corresponds.  The first element may be null to indicate that the
+     structure is also passed partly in memory.
+
+     If LVAL is `(pc)', we have a jump instruction, and the
+     possibilities for X are very limited.  It may be a `label_ref'
+     expression (unconditional jump).  It may be an `if_then_else'
+     (conditional jump), in which case either the second or the third
+     operand must be `(pc)' (for the case which does not jump) and the
+     other of the two must be a `label_ref' (for the case which does
+     jump).  X may also be a `mem' or `(plus:SI (pc) Y)', where Y may
+     be a `reg' or a `mem'; these unusual patterns are used to
+     represent jumps through branch tables.
+
+     If LVAL is neither `(cc0)' nor `(pc)', the mode of LVAL must not
+     be `VOIDmode' and the mode of X must be valid for the mode of LVAL.
+
+     LVAL is customarily accessed with the `SET_DEST' macro and X with
+     the `SET_SRC' macro.
+
+`(return)'
+     As the sole expression in a pattern, represents a return from the
+     current function, on machines where this can be done with one
+     instruction, such as VAXen.  On machines where a multi-instruction
+     "epilogue" must be executed in order to return from the function,
+     returning is done by jumping to a label which precedes the
+     epilogue, and the `return' expression code is never used.
+
+     Inside an `if_then_else' expression, represents the value to be
+     placed in `pc' to return to the caller.
+
+     Note that an insn pattern of `(return)' is logically equivalent to
+     `(set (pc) (return))', but the latter form is never used.
+
+`(call FUNCTION NARGS)'
+     Represents a function call.  FUNCTION is a `mem' expression whose
+     address is the address of the function to be called.  NARGS is an
+     expression which can be used for two purposes: on some machines it
+     represents the number of bytes of stack argument; on others, it
+     represents the number of argument registers.
+
+     Each machine has a standard machine mode which FUNCTION must have.
+     The machine description defines macro `FUNCTION_MODE' to expand
+     into the requisite mode name.  The purpose of this mode is to
+     specify what kind of addressing is allowed, on machines where the
+     allowed kinds of addressing depend on the machine mode being
+     addressed.
+
+`(clobber X)'
+     Represents the storing or possible storing of an unpredictable,
+     undescribed value into X, which must be a `reg', `scratch',
+     `parallel' or `mem' expression.
+
+     One place this is used is in string instructions that store
+     standard values into particular hard registers.  It may not be
+     worth the trouble to describe the values that are stored, but it
+     is essential to inform the compiler that the registers will be
+     altered, lest it attempt to keep data in them across the string
+     instruction.
+
+     If X is `(mem:BLK (const_int 0))' or `(mem:BLK (scratch))', it
+     means that all memory locations must be presumed clobbered.  If X
+     is a `parallel', it has the same meaning as a `parallel' in a
+     `set' expression.
+
+     Note that the machine description classifies certain hard
+     registers as "call-clobbered".  All function call instructions are
+     assumed by default to clobber these registers, so there is no need
+     to use `clobber' expressions to indicate this fact.  Also, each
+     function call is assumed to have the potential to alter any memory
+     location, unless the function is declared `const'.
+
+     If the last group of expressions in a `parallel' are each a
+     `clobber' expression whose arguments are `reg' or `match_scratch'
+     (*note RTL Template::) expressions, the combiner phase can add the
+     appropriate `clobber' expressions to an insn it has constructed
+     when doing so will cause a pattern to be matched.
+
+     This feature can be used, for example, on a machine that whose
+     multiply and add instructions don't use an MQ register but which
+     has an add-accumulate instruction that does clobber the MQ
+     register.  Similarly, a combined instruction might require a
+     temporary register while the constituent instructions might not.
+
+     When a `clobber' expression for a register appears inside a
+     `parallel' with other side effects, the register allocator
+     guarantees that the register is unoccupied both before and after
+     that insn if it is a hard register clobber.  For pseudo-register
+     clobber, the register allocator and the reload pass do not assign
+     the same hard register to the clobber and the input operands if
+     there is an insn alternative containing the `&' constraint (*note
+     Modifiers::) for the clobber and the hard register is in register
+     classes of the clobber in the alternative.  You can clobber either
+     a specific hard register, a pseudo register, or a `scratch'
+     expression; in the latter two cases, GCC will allocate a hard
+     register that is available there for use as a temporary.
+
+     For instructions that require a temporary register, you should use
+     `scratch' instead of a pseudo-register because this will allow the
+     combiner phase to add the `clobber' when required.  You do this by
+     coding (`clobber' (`match_scratch' ...)).  If you do clobber a
+     pseudo register, use one which appears nowhere else--generate a
+     new one each time.  Otherwise, you may confuse CSE.
+
+     There is one other known use for clobbering a pseudo register in a
+     `parallel': when one of the input operands of the insn is also
+     clobbered by the insn.  In this case, using the same pseudo
+     register in the clobber and elsewhere in the insn produces the
+     expected results.
+
+`(use X)'
+     Represents the use of the value of X.  It indicates that the value
+     in X at this point in the program is needed, even though it may
+     not be apparent why this is so.  Therefore, the compiler will not
+     attempt to delete previous instructions whose only effect is to
+     store a value in X.  X must be a `reg' expression.
+
+     In some situations, it may be tempting to add a `use' of a
+     register in a `parallel' to describe a situation where the value
+     of a special register will modify the behavior of the instruction.
+     A hypothetical example might be a pattern for an addition that can
+     either wrap around or use saturating addition depending on the
+     value of a special control register:
+
+          (parallel [(set (reg:SI 2) (unspec:SI [(reg:SI 3)
+                                                 (reg:SI 4)] 0))
+                     (use (reg:SI 1))])
+
+     This will not work, several of the optimizers only look at
+     expressions locally; it is very likely that if you have multiple
+     insns with identical inputs to the `unspec', they will be
+     optimized away even if register 1 changes in between.
+
+     This means that `use' can _only_ be used to describe that the
+     register is live.  You should think twice before adding `use'
+     statements, more often you will want to use `unspec' instead.  The
+     `use' RTX is most commonly useful to describe that a fixed
+     register is implicitly used in an insn.  It is also safe to use in
+     patterns where the compiler knows for other reasons that the result
+     of the whole pattern is variable, such as `movmemM' or `call'
+     patterns.
+
+     During the reload phase, an insn that has a `use' as pattern can
+     carry a reg_equal note.  These `use' insns will be deleted before
+     the reload phase exits.
+
+     During the delayed branch scheduling phase, X may be an insn.
+     This indicates that X previously was located at this place in the
+     code and its data dependencies need to be taken into account.
+     These `use' insns will be deleted before the delayed branch
+     scheduling phase exits.
+
+`(parallel [X0 X1 ...])'
+     Represents several side effects performed in parallel.  The square
+     brackets stand for a vector; the operand of `parallel' is a vector
+     of expressions.  X0, X1 and so on are individual side effect
+     expressions--expressions of code `set', `call', `return',
+     `clobber' or `use'.
+
+     "In parallel" means that first all the values used in the
+     individual side-effects are computed, and second all the actual
+     side-effects are performed.  For example,
+
+          (parallel [(set (reg:SI 1) (mem:SI (reg:SI 1)))
+                     (set (mem:SI (reg:SI 1)) (reg:SI 1))])
+
+     says unambiguously that the values of hard register 1 and the
+     memory location addressed by it are interchanged.  In both places
+     where `(reg:SI 1)' appears as a memory address it refers to the
+     value in register 1 _before_ the execution of the insn.
+
+     It follows that it is _incorrect_ to use `parallel' and expect the
+     result of one `set' to be available for the next one.  For
+     example, people sometimes attempt to represent a jump-if-zero
+     instruction this way:
+
+          (parallel [(set (cc0) (reg:SI 34))
+                     (set (pc) (if_then_else
+                                  (eq (cc0) (const_int 0))
+                                  (label_ref ...)
+                                  (pc)))])
+
+     But this is incorrect, because it says that the jump condition
+     depends on the condition code value _before_ this instruction, not
+     on the new value that is set by this instruction.
+
+     Peephole optimization, which takes place together with final
+     assembly code output, can produce insns whose patterns consist of
+     a `parallel' whose elements are the operands needed to output the
+     resulting assembler code--often `reg', `mem' or constant
+     expressions.  This would not be well-formed RTL at any other stage
+     in compilation, but it is ok then because no further optimization
+     remains to be done.  However, the definition of the macro
+     `NOTICE_UPDATE_CC', if any, must deal with such insns if you
+     define any peephole optimizations.
+
+`(cond_exec [COND EXPR])'
+     Represents a conditionally executed expression.  The EXPR is
+     executed only if the COND is nonzero.  The COND expression must
+     not have side-effects, but the EXPR may very well have
+     side-effects.
+
+`(sequence [INSNS ...])'
+     Represents a sequence of insns.  Each of the INSNS that appears in
+     the vector is suitable for appearing in the chain of insns, so it
+     must be an `insn', `jump_insn', `call_insn', `code_label',
+     `barrier' or `note'.
+
+     A `sequence' RTX is never placed in an actual insn during RTL
+     generation.  It represents the sequence of insns that result from a
+     `define_expand' _before_ those insns are passed to `emit_insn' to
+     insert them in the chain of insns.  When actually inserted, the
+     individual sub-insns are separated out and the `sequence' is
+     forgotten.
+
+     After delay-slot scheduling is completed, an insn and all the
+     insns that reside in its delay slots are grouped together into a
+     `sequence'.  The insn requiring the delay slot is the first insn
+     in the vector; subsequent insns are to be placed in the delay slot.
+
+     `INSN_ANNULLED_BRANCH_P' is set on an insn in a delay slot to
+     indicate that a branch insn should be used that will conditionally
+     annul the effect of the insns in the delay slots.  In such a case,
+     `INSN_FROM_TARGET_P' indicates that the insn is from the target of
+     the branch and should be executed only if the branch is taken;
+     otherwise the insn should be executed only if the branch is not
+     taken.  *Note Delay Slots::.
+
+ These expression codes appear in place of a side effect, as the body of
+an insn, though strictly speaking they do not always describe side
+effects as such:
+
+`(asm_input S)'
+     Represents literal assembler code as described by the string S.
+
+`(unspec [OPERANDS ...] INDEX)'
+`(unspec_volatile [OPERANDS ...] INDEX)'
+     Represents a machine-specific operation on OPERANDS.  INDEX
+     selects between multiple machine-specific operations.
+     `unspec_volatile' is used for volatile operations and operations
+     that may trap; `unspec' is used for other operations.
+
+     These codes may appear inside a `pattern' of an insn, inside a
+     `parallel', or inside an expression.
+
+`(addr_vec:M [LR0 LR1 ...])'
+     Represents a table of jump addresses.  The vector elements LR0,
+     etc., are `label_ref' expressions.  The mode M specifies how much
+     space is given to each address; normally M would be `Pmode'.
+
+`(addr_diff_vec:M BASE [LR0 LR1 ...] MIN MAX FLAGS)'
+     Represents a table of jump addresses expressed as offsets from
+     BASE.  The vector elements LR0, etc., are `label_ref' expressions
+     and so is BASE.  The mode M specifies how much space is given to
+     each address-difference.  MIN and MAX are set up by branch
+     shortening and hold a label with a minimum and a maximum address,
+     respectively.  FLAGS indicates the relative position of BASE, MIN
+     and MAX to the containing insn and of MIN and MAX to BASE.  See
+     rtl.def for details.
+
+`(prefetch:M ADDR RW LOCALITY)'
+     Represents prefetch of memory at address ADDR.  Operand RW is 1 if
+     the prefetch is for data to be written, 0 otherwise; targets that
+     do not support write prefetches should treat this as a normal
+     prefetch.  Operand LOCALITY specifies the amount of temporal
+     locality; 0 if there is none or 1, 2, or 3 for increasing levels
+     of temporal locality; targets that do not support locality hints
+     should ignore this.
+
+     This insn is used to minimize cache-miss latency by moving data
+     into a cache before it is accessed.  It should use only
+     non-faulting data prefetch instructions.
+
+
+File: gccint.info,  Node: Incdec,  Next: Assembler,  Prev: Side Effects,  Up: RTL
+
+10.16 Embedded Side-Effects on Addresses
+========================================
+
+Six special side-effect expression codes appear as memory addresses.
+
+`(pre_dec:M X)'
+     Represents the side effect of decrementing X by a standard amount
+     and represents also the value that X has after being decremented.
+     X must be a `reg' or `mem', but most machines allow only a `reg'.
+     M must be the machine mode for pointers on the machine in use.
+     The amount X is decremented by is the length in bytes of the
+     machine mode of the containing memory reference of which this
+     expression serves as the address.  Here is an example of its use:
+
+          (mem:DF (pre_dec:SI (reg:SI 39)))
+
+     This says to decrement pseudo register 39 by the length of a
+     `DFmode' value and use the result to address a `DFmode' value.
+
+`(pre_inc:M X)'
+     Similar, but specifies incrementing X instead of decrementing it.
+
+`(post_dec:M X)'
+     Represents the same side effect as `pre_dec' but a different
+     value.  The value represented here is the value X has before being
+     decremented.
+
+`(post_inc:M X)'
+     Similar, but specifies incrementing X instead of decrementing it.
+
+`(post_modify:M X Y)'
+     Represents the side effect of setting X to Y and represents X
+     before X is modified.  X must be a `reg' or `mem', but most
+     machines allow only a `reg'.  M must be the machine mode for
+     pointers on the machine in use.
+
+     The expression Y must be one of three forms: `(plus:M X Z)',
+     `(minus:M X Z)', or `(plus:M X I)', where Z is an index register
+     and I is a constant.
+
+     Here is an example of its use:
+
+          (mem:SF (post_modify:SI (reg:SI 42) (plus (reg:SI 42)
+                                                    (reg:SI 48))))
+
+     This says to modify pseudo register 42 by adding the contents of
+     pseudo register 48 to it, after the use of what ever 42 points to.
+
+`(pre_modify:M X EXPR)'
+     Similar except side effects happen before the use.
+
+ These embedded side effect expressions must be used with care.
+Instruction patterns may not use them.  Until the `flow' pass of the
+compiler, they may occur only to represent pushes onto the stack.  The
+`flow' pass finds cases where registers are incremented or decremented
+in one instruction and used as an address shortly before or after;
+these cases are then transformed to use pre- or post-increment or
+-decrement.
+
+ If a register used as the operand of these expressions is used in
+another address in an insn, the original value of the register is used.
+Uses of the register outside of an address are not permitted within the
+same insn as a use in an embedded side effect expression because such
+insns behave differently on different machines and hence must be treated
+as ambiguous and disallowed.
+
+ An instruction that can be represented with an embedded side effect
+could also be represented using `parallel' containing an additional
+`set' to describe how the address register is altered.  This is not
+done because machines that allow these operations at all typically
+allow them wherever a memory address is called for.  Describing them as
+additional parallel stores would require doubling the number of entries
+in the machine description.
+
+
+File: gccint.info,  Node: Assembler,  Next: Debug Information,  Prev: Incdec,  Up: RTL
+
+10.17 Assembler Instructions as Expressions
+===========================================
+
+The RTX code `asm_operands' represents a value produced by a
+user-specified assembler instruction.  It is used to represent an `asm'
+statement with arguments.  An `asm' statement with a single output
+operand, like this:
+
+     asm ("foo %1,%2,%0" : "=a" (outputvar) : "g" (x + y), "di" (*z));
+
+is represented using a single `asm_operands' RTX which represents the
+value that is stored in `outputvar':
+
+     (set RTX-FOR-OUTPUTVAR
+          (asm_operands "foo %1,%2,%0" "a" 0
+                        [RTX-FOR-ADDITION-RESULT RTX-FOR-*Z]
+                        [(asm_input:M1 "g")
+                         (asm_input:M2 "di")]))
+
+Here the operands of the `asm_operands' RTX are the assembler template
+string, the output-operand's constraint, the index-number of the output
+operand among the output operands specified, a vector of input operand
+RTX's, and a vector of input-operand modes and constraints.  The mode
+M1 is the mode of the sum `x+y'; M2 is that of `*z'.
+
+ When an `asm' statement has multiple output values, its insn has
+several such `set' RTX's inside of a `parallel'.  Each `set' contains
+an `asm_operands'; all of these share the same assembler template and
+vectors, but each contains the constraint for the respective output
+operand.  They are also distinguished by the output-operand index
+number, which is 0, 1, ... for successive output operands.
+
+
+File: gccint.info,  Node: Debug Information,  Next: Insns,  Prev: Assembler,  Up: RTL
+
+10.18 Variable Location Debug Information in RTL
+================================================
+
+Variable tracking relies on `MEM_EXPR' and `REG_EXPR' annotations to
+determine what user variables memory and register references refer to.
+
+ Variable tracking at assignments uses these notes only when they refer
+to variables that live at fixed locations (e.g., addressable variables,
+global non-automatic variables).  For variables whose location may
+vary, it relies on the following types of notes.
+
+`(var_location:MODE VAR EXP STAT)'
+     Binds variable `var', a tree, to value EXP, an RTL expression.  It
+     appears only in `NOTE_INSN_VAR_LOCATION' and `DEBUG_INSN's, with
+     slightly different meanings.  MODE, if present, represents the
+     mode of EXP, which is useful if it is a modeless expression.  STAT
+     is only meaningful in notes, indicating whether the variable is
+     known to be initialized or uninitialized.
+
+`(debug_expr:MODE DECL)'
+     Stands for the value bound to the `DEBUG_EXPR_DECL' DECL, that
+     points back to it, within value expressions in `VAR_LOCATION'
+     nodes.
+
+
+
+File: gccint.info,  Node: Insns,  Next: Calls,  Prev: Debug Information,  Up: RTL
+
+10.19 Insns
+===========
+
+The RTL representation of the code for a function is a doubly-linked
+chain of objects called "insns".  Insns are expressions with special
+codes that are used for no other purpose.  Some insns are actual
+instructions; others represent dispatch tables for `switch' statements;
+others represent labels to jump to or various sorts of declarative
+information.
+
+ In addition to its own specific data, each insn must have a unique
+id-number that distinguishes it from all other insns in the current
+function (after delayed branch scheduling, copies of an insn with the
+same id-number may be present in multiple places in a function, but
+these copies will always be identical and will only appear inside a
+`sequence'), and chain pointers to the preceding and following insns.
+These three fields occupy the same position in every insn, independent
+of the expression code of the insn.  They could be accessed with `XEXP'
+and `XINT', but instead three special macros are always used:
+
+`INSN_UID (I)'
+     Accesses the unique id of insn I.
+
+`PREV_INSN (I)'
+     Accesses the chain pointer to the insn preceding I.  If I is the
+     first insn, this is a null pointer.
+
+`NEXT_INSN (I)'
+     Accesses the chain pointer to the insn following I.  If I is the
+     last insn, this is a null pointer.
+
+ The first insn in the chain is obtained by calling `get_insns'; the
+last insn is the result of calling `get_last_insn'.  Within the chain
+delimited by these insns, the `NEXT_INSN' and `PREV_INSN' pointers must
+always correspond: if INSN is not the first insn,
+
+     NEXT_INSN (PREV_INSN (INSN)) == INSN
+
+is always true and if INSN is not the last insn,
+
+     PREV_INSN (NEXT_INSN (INSN)) == INSN
+
+is always true.
+
+ After delay slot scheduling, some of the insns in the chain might be
+`sequence' expressions, which contain a vector of insns.  The value of
+`NEXT_INSN' in all but the last of these insns is the next insn in the
+vector; the value of `NEXT_INSN' of the last insn in the vector is the
+same as the value of `NEXT_INSN' for the `sequence' in which it is
+contained.  Similar rules apply for `PREV_INSN'.
+
+ This means that the above invariants are not necessarily true for insns
+inside `sequence' expressions.  Specifically, if INSN is the first insn
+in a `sequence', `NEXT_INSN (PREV_INSN (INSN))' is the insn containing
+the `sequence' expression, as is the value of `PREV_INSN (NEXT_INSN
+(INSN))' if INSN is the last insn in the `sequence' expression.  You
+can use these expressions to find the containing `sequence' expression.
+
+ Every insn has one of the following expression codes:
+
+`insn'
+     The expression code `insn' is used for instructions that do not
+     jump and do not do function calls.  `sequence' expressions are
+     always contained in insns with code `insn' even if one of those
+     insns should jump or do function calls.
+
+     Insns with code `insn' have four additional fields beyond the three
+     mandatory ones listed above.  These four are described in a table
+     below.
+
+`jump_insn'
+     The expression code `jump_insn' is used for instructions that may
+     jump (or, more generally, may contain `label_ref' expressions to
+     which `pc' can be set in that instruction).  If there is an
+     instruction to return from the current function, it is recorded as
+     a `jump_insn'.
+
+     `jump_insn' insns have the same extra fields as `insn' insns,
+     accessed in the same way and in addition contain a field
+     `JUMP_LABEL' which is defined once jump optimization has completed.
+
+     For simple conditional and unconditional jumps, this field contains
+     the `code_label' to which this insn will (possibly conditionally)
+     branch.  In a more complex jump, `JUMP_LABEL' records one of the
+     labels that the insn refers to; other jump target labels are
+     recorded as `REG_LABEL_TARGET' notes.  The exception is `addr_vec'
+     and `addr_diff_vec', where `JUMP_LABEL' is `NULL_RTX' and the only
+     way to find the labels is to scan the entire body of the insn.
+
+     Return insns count as jumps, but since they do not refer to any
+     labels, their `JUMP_LABEL' is `NULL_RTX'.
+
+`call_insn'
+     The expression code `call_insn' is used for instructions that may
+     do function calls.  It is important to distinguish these
+     instructions because they imply that certain registers and memory
+     locations may be altered unpredictably.
+
+     `call_insn' insns have the same extra fields as `insn' insns,
+     accessed in the same way and in addition contain a field
+     `CALL_INSN_FUNCTION_USAGE', which contains a list (chain of
+     `expr_list' expressions) containing `use' and `clobber'
+     expressions that denote hard registers and `MEM's used or
+     clobbered by the called function.
+
+     A `MEM' generally points to a stack slots in which arguments passed
+     to the libcall by reference (*note TARGET_PASS_BY_REFERENCE:
+     Register Arguments.) are stored.  If the argument is caller-copied
+     (*note TARGET_CALLEE_COPIES: Register Arguments.), the stack slot
+     will be mentioned in `CLOBBER' and `USE' entries; if it's
+     callee-copied, only a `USE' will appear, and the `MEM' may point
+     to addresses that are not stack slots.
+
+     `CLOBBER'ed registers in this list augment registers specified in
+     `CALL_USED_REGISTERS' (*note Register Basics::).
+
+`code_label'
+     A `code_label' insn represents a label that a jump insn can jump
+     to.  It contains two special fields of data in addition to the
+     three standard ones.  `CODE_LABEL_NUMBER' is used to hold the
+     "label number", a number that identifies this label uniquely among
+     all the labels in the compilation (not just in the current
+     function).  Ultimately, the label is represented in the assembler
+     output as an assembler label, usually of the form `LN' where N is
+     the label number.
+
+     When a `code_label' appears in an RTL expression, it normally
+     appears within a `label_ref' which represents the address of the
+     label, as a number.
+
+     Besides as a `code_label', a label can also be represented as a
+     `note' of type `NOTE_INSN_DELETED_LABEL'.
+
+     The field `LABEL_NUSES' is only defined once the jump optimization
+     phase is completed.  It contains the number of times this label is
+     referenced in the current function.
+
+     The field `LABEL_KIND' differentiates four different types of
+     labels: `LABEL_NORMAL', `LABEL_STATIC_ENTRY',
+     `LABEL_GLOBAL_ENTRY', and `LABEL_WEAK_ENTRY'.  The only labels
+     that do not have type `LABEL_NORMAL' are "alternate entry points"
+     to the current function.  These may be static (visible only in the
+     containing translation unit), global (exposed to all translation
+     units), or weak (global, but can be overridden by another symbol
+     with the same name).
+
+     Much of the compiler treats all four kinds of label identically.
+     Some of it needs to know whether or not a label is an alternate
+     entry point; for this purpose, the macro `LABEL_ALT_ENTRY_P' is
+     provided.  It is equivalent to testing whether `LABEL_KIND (label)
+     == LABEL_NORMAL'.  The only place that cares about the distinction
+     between static, global, and weak alternate entry points, besides
+     the front-end code that creates them, is the function
+     `output_alternate_entry_point', in `final.c'.
+
+     To set the kind of a label, use the `SET_LABEL_KIND' macro.
+
+`barrier'
+     Barriers are placed in the instruction stream when control cannot
+     flow past them.  They are placed after unconditional jump
+     instructions to indicate that the jumps are unconditional and
+     after calls to `volatile' functions, which do not return (e.g.,
+     `exit').  They contain no information beyond the three standard
+     fields.
+
+`note'
+     `note' insns are used to represent additional debugging and
+     declarative information.  They contain two nonstandard fields, an
+     integer which is accessed with the macro `NOTE_LINE_NUMBER' and a
+     string accessed with `NOTE_SOURCE_FILE'.
+
+     If `NOTE_LINE_NUMBER' is positive, the note represents the
+     position of a source line and `NOTE_SOURCE_FILE' is the source
+     file name that the line came from.  These notes control generation
+     of line number data in the assembler output.
+
+     Otherwise, `NOTE_LINE_NUMBER' is not really a line number but a
+     code with one of the following values (and `NOTE_SOURCE_FILE' must
+     contain a null pointer):
+
+    `NOTE_INSN_DELETED'
+          Such a note is completely ignorable.  Some passes of the
+          compiler delete insns by altering them into notes of this
+          kind.
+
+    `NOTE_INSN_DELETED_LABEL'
+          This marks what used to be a `code_label', but was not used
+          for other purposes than taking its address and was
+          transformed to mark that no code jumps to it.
+
+    `NOTE_INSN_BLOCK_BEG'
+    `NOTE_INSN_BLOCK_END'
+          These types of notes indicate the position of the beginning
+          and end of a level of scoping of variable names.  They
+          control the output of debugging information.
+
+    `NOTE_INSN_EH_REGION_BEG'
+    `NOTE_INSN_EH_REGION_END'
+          These types of notes indicate the position of the beginning
+          and end of a level of scoping for exception handling.
+          `NOTE_BLOCK_NUMBER' identifies which `CODE_LABEL' or `note'
+          of type `NOTE_INSN_DELETED_LABEL' is associated with the
+          given region.
+
+    `NOTE_INSN_LOOP_BEG'
+    `NOTE_INSN_LOOP_END'
+          These types of notes indicate the position of the beginning
+          and end of a `while' or `for' loop.  They enable the loop
+          optimizer to find loops quickly.
+
+    `NOTE_INSN_LOOP_CONT'
+          Appears at the place in a loop that `continue' statements
+          jump to.
+
+    `NOTE_INSN_LOOP_VTOP'
+          This note indicates the place in a loop where the exit test
+          begins for those loops in which the exit test has been
+          duplicated.  This position becomes another virtual start of
+          the loop when considering loop invariants.
+
+    `NOTE_INSN_FUNCTION_BEG'
+          Appears at the start of the function body, after the function
+          prologue.
+
+    `NOTE_INSN_VAR_LOCATION'
+          This note is used to generate variable location debugging
+          information.  It indicates that the user variable in its
+          `VAR_LOCATION' operand is at the location given in the RTL
+          expression, or holds a value that can be computed by
+          evaluating the RTL expression from that static point in the
+          program up to the next such note for the same user variable.
+
+
+     These codes are printed symbolically when they appear in debugging
+     dumps.
+
+`debug_insn'
+     The expression code `debug_insn' is used for pseudo-instructions
+     that hold debugging information for variable tracking at
+     assignments (see `-fvar-tracking-assignments' option).  They are
+     the RTL representation of `GIMPLE_DEBUG' statements (*note
+     `GIMPLE_DEBUG'::), with a `VAR_LOCATION' operand that binds a user
+     variable tree to an RTL representation of the `value' in the
+     corresponding statement.  A `DEBUG_EXPR' in it stands for the
+     value bound to the corresponding `DEBUG_EXPR_DECL'.
+
+     Throughout optimization passes, binding information is kept in
+     pseudo-instruction form, so that, unlike notes, it gets the same
+     treatment and adjustments that regular instructions would.  It is
+     the variable tracking pass that turns these pseudo-instructions
+     into var location notes, analyzing control flow, value
+     equivalences and changes to registers and memory referenced in
+     value expressions, propagating the values of debug temporaries and
+     determining expressions that can be used to compute the value of
+     each user variable at as many points (ranges, actually) in the
+     program as possible.
+
+     Unlike `NOTE_INSN_VAR_LOCATION', the value expression in an
+     `INSN_VAR_LOCATION' denotes a value at that specific point in the
+     program, rather than an expression that can be evaluated at any
+     later point before an overriding `VAR_LOCATION' is encountered.
+     E.g., if a user variable is bound to a `REG' and then a subsequent
+     insn modifies the `REG', the note location would keep mapping the
+     user variable to the register across the insn, whereas the insn
+     location would keep the variable bound to the value, so that the
+     variable tracking pass would emit another location note for the
+     variable at the point in which the register is modified.
+
+
+ The machine mode of an insn is normally `VOIDmode', but some phases
+use the mode for various purposes.
+
+ The common subexpression elimination pass sets the mode of an insn to
+`QImode' when it is the first insn in a block that has already been
+processed.
+
+ The second Haifa scheduling pass, for targets that can multiple issue,
+sets the mode of an insn to `TImode' when it is believed that the
+instruction begins an issue group.  That is, when the instruction
+cannot issue simultaneously with the previous.  This may be relied on
+by later passes, in particular machine-dependent reorg.
+
+ Here is a table of the extra fields of `insn', `jump_insn' and
+`call_insn' insns:
+
+`PATTERN (I)'
+     An expression for the side effect performed by this insn.  This
+     must be one of the following codes: `set', `call', `use',
+     `clobber', `return', `asm_input', `asm_output', `addr_vec',
+     `addr_diff_vec', `trap_if', `unspec', `unspec_volatile',
+     `parallel', `cond_exec', or `sequence'.  If it is a `parallel',
+     each element of the `parallel' must be one these codes, except that
+     `parallel' expressions cannot be nested and `addr_vec' and
+     `addr_diff_vec' are not permitted inside a `parallel' expression.
+
+`INSN_CODE (I)'
+     An integer that says which pattern in the machine description
+     matches this insn, or -1 if the matching has not yet been
+     attempted.
+
+     Such matching is never attempted and this field remains -1 on an
+     insn whose pattern consists of a single `use', `clobber',
+     `asm_input', `addr_vec' or `addr_diff_vec' expression.
+
+     Matching is also never attempted on insns that result from an `asm'
+     statement.  These contain at least one `asm_operands' expression.
+     The function `asm_noperands' returns a non-negative value for such
+     insns.
+
+     In the debugging output, this field is printed as a number
+     followed by a symbolic representation that locates the pattern in
+     the `md' file as some small positive or negative offset from a
+     named pattern.
+
+`LOG_LINKS (I)'
+     A list (chain of `insn_list' expressions) giving information about
+     dependencies between instructions within a basic block.  Neither a
+     jump nor a label may come between the related insns.  These are
+     only used by the schedulers and by combine.  This is a deprecated
+     data structure.  Def-use and use-def chains are now preferred.
+
+`REG_NOTES (I)'
+     A list (chain of `expr_list' and `insn_list' expressions) giving
+     miscellaneous information about the insn.  It is often information
+     pertaining to the registers used in this insn.
+
+ The `LOG_LINKS' field of an insn is a chain of `insn_list'
+expressions.  Each of these has two operands: the first is an insn, and
+the second is another `insn_list' expression (the next one in the
+chain).  The last `insn_list' in the chain has a null pointer as second
+operand.  The significant thing about the chain is which insns appear
+in it (as first operands of `insn_list' expressions).  Their order is
+not significant.
+
+ This list is originally set up by the flow analysis pass; it is a null
+pointer until then.  Flow only adds links for those data dependencies
+which can be used for instruction combination.  For each insn, the flow
+analysis pass adds a link to insns which store into registers values
+that are used for the first time in this insn.
+
+ The `REG_NOTES' field of an insn is a chain similar to the `LOG_LINKS'
+field but it includes `expr_list' expressions in addition to
+`insn_list' expressions.  There are several kinds of register notes,
+which are distinguished by the machine mode, which in a register note
+is really understood as being an `enum reg_note'.  The first operand OP
+of the note is data whose meaning depends on the kind of note.
+
+ The macro `REG_NOTE_KIND (X)' returns the kind of register note.  Its
+counterpart, the macro `PUT_REG_NOTE_KIND (X, NEWKIND)' sets the
+register note type of X to be NEWKIND.
+
+ Register notes are of three classes: They may say something about an
+input to an insn, they may say something about an output of an insn, or
+they may create a linkage between two insns.  There are also a set of
+values that are only used in `LOG_LINKS'.
+
+ These register notes annotate inputs to an insn:
+
+`REG_DEAD'
+     The value in OP dies in this insn; that is to say, altering the
+     value immediately after this insn would not affect the future
+     behavior of the program.
+
+     It does not follow that the register OP has no useful value after
+     this insn since OP is not necessarily modified by this insn.
+     Rather, no subsequent instruction uses the contents of OP.
+
+`REG_UNUSED'
+     The register OP being set by this insn will not be used in a
+     subsequent insn.  This differs from a `REG_DEAD' note, which
+     indicates that the value in an input will not be used subsequently.
+     These two notes are independent; both may be present for the same
+     register.
+
+`REG_INC'
+     The register OP is incremented (or decremented; at this level
+     there is no distinction) by an embedded side effect inside this
+     insn.  This means it appears in a `post_inc', `pre_inc',
+     `post_dec' or `pre_dec' expression.
+
+`REG_NONNEG'
+     The register OP is known to have a nonnegative value when this
+     insn is reached.  This is used so that decrement and branch until
+     zero instructions, such as the m68k dbra, can be matched.
+
+     The `REG_NONNEG' note is added to insns only if the machine
+     description has a `decrement_and_branch_until_zero' pattern.
+
+`REG_LABEL_OPERAND'
+     This insn uses OP, a `code_label' or a `note' of type
+     `NOTE_INSN_DELETED_LABEL', but is not a `jump_insn', or it is a
+     `jump_insn' that refers to the operand as an ordinary operand.
+     The label may still eventually be a jump target, but if so in an
+     indirect jump in a subsequent insn.  The presence of this note
+     allows jump optimization to be aware that OP is, in fact, being
+     used, and flow optimization to build an accurate flow graph.
+
+`REG_LABEL_TARGET'
+     This insn is a `jump_insn' but not an `addr_vec' or
+     `addr_diff_vec'.  It uses OP, a `code_label' as a direct or
+     indirect jump target.  Its purpose is similar to that of
+     `REG_LABEL_OPERAND'.  This note is only present if the insn has
+     multiple targets; the last label in the insn (in the highest
+     numbered insn-field) goes into the `JUMP_LABEL' field and does not
+     have a `REG_LABEL_TARGET' note.  *Note JUMP_LABEL: Insns.
+
+`REG_CROSSING_JUMP'
+     This insn is a branching instruction (either an unconditional jump
+     or an indirect jump) which crosses between hot and cold sections,
+     which could potentially be very far apart in the executable.  The
+     presence of this note indicates to other optimizations that this
+     branching instruction should not be "collapsed" into a simpler
+     branching construct.  It is used when the optimization to
+     partition basic blocks into hot and cold sections is turned on.
+
+`REG_SETJMP'
+     Appears attached to each `CALL_INSN' to `setjmp' or a related
+     function.
+
+ The following notes describe attributes of outputs of an insn:
+
+`REG_EQUIV'
+`REG_EQUAL'
+     This note is only valid on an insn that sets only one register and
+     indicates that that register will be equal to OP at run time; the
+     scope of this equivalence differs between the two types of notes.
+     The value which the insn explicitly copies into the register may
+     look different from OP, but they will be equal at run time.  If the
+     output of the single `set' is a `strict_low_part' expression, the
+     note refers to the register that is contained in `SUBREG_REG' of
+     the `subreg' expression.
+
+     For `REG_EQUIV', the register is equivalent to OP throughout the
+     entire function, and could validly be replaced in all its
+     occurrences by OP.  ("Validly" here refers to the data flow of the
+     program; simple replacement may make some insns invalid.)  For
+     example, when a constant is loaded into a register that is never
+     assigned any other value, this kind of note is used.
+
+     When a parameter is copied into a pseudo-register at entry to a
+     function, a note of this kind records that the register is
+     equivalent to the stack slot where the parameter was passed.
+     Although in this case the register may be set by other insns, it
+     is still valid to replace the register by the stack slot
+     throughout the function.
+
+     A `REG_EQUIV' note is also used on an instruction which copies a
+     register parameter into a pseudo-register at entry to a function,
+     if there is a stack slot where that parameter could be stored.
+     Although other insns may set the pseudo-register, it is valid for
+     the compiler to replace the pseudo-register by stack slot
+     throughout the function, provided the compiler ensures that the
+     stack slot is properly initialized by making the replacement in
+     the initial copy instruction as well.  This is used on machines
+     for which the calling convention allocates stack space for
+     register parameters.  See `REG_PARM_STACK_SPACE' in *note Stack
+     Arguments::.
+
+     In the case of `REG_EQUAL', the register that is set by this insn
+     will be equal to OP at run time at the end of this insn but not
+     necessarily elsewhere in the function.  In this case, OP is
+     typically an arithmetic expression.  For example, when a sequence
+     of insns such as a library call is used to perform an arithmetic
+     operation, this kind of note is attached to the insn that produces
+     or copies the final value.
+
+     These two notes are used in different ways by the compiler passes.
+     `REG_EQUAL' is used by passes prior to register allocation (such as
+     common subexpression elimination and loop optimization) to tell
+     them how to think of that value.  `REG_EQUIV' notes are used by
+     register allocation to indicate that there is an available
+     substitute expression (either a constant or a `mem' expression for
+     the location of a parameter on the stack) that may be used in
+     place of a register if insufficient registers are available.
+
+     Except for stack homes for parameters, which are indicated by a
+     `REG_EQUIV' note and are not useful to the early optimization
+     passes and pseudo registers that are equivalent to a memory
+     location throughout their entire life, which is not detected until
+     later in the compilation, all equivalences are initially indicated
+     by an attached `REG_EQUAL' note.  In the early stages of register
+     allocation, a `REG_EQUAL' note is changed into a `REG_EQUIV' note
+     if OP is a constant and the insn represents the only set of its
+     destination register.
+
+     Thus, compiler passes prior to register allocation need only check
+     for `REG_EQUAL' notes and passes subsequent to register allocation
+     need only check for `REG_EQUIV' notes.
+
+ These notes describe linkages between insns.  They occur in pairs: one
+insn has one of a pair of notes that points to a second insn, which has
+the inverse note pointing back to the first insn.
+
+`REG_CC_SETTER'
+`REG_CC_USER'
+     On machines that use `cc0', the insns which set and use `cc0' set
+     and use `cc0' are adjacent.  However, when branch delay slot
+     filling is done, this may no longer be true.  In this case a
+     `REG_CC_USER' note will be placed on the insn setting `cc0' to
+     point to the insn using `cc0' and a `REG_CC_SETTER' note will be
+     placed on the insn using `cc0' to point to the insn setting `cc0'.
+
+ These values are only used in the `LOG_LINKS' field, and indicate the
+type of dependency that each link represents.  Links which indicate a
+data dependence (a read after write dependence) do not use any code,
+they simply have mode `VOIDmode', and are printed without any
+descriptive text.
+
+`REG_DEP_TRUE'
+     This indicates a true dependence (a read after write dependence).
+
+`REG_DEP_OUTPUT'
+     This indicates an output dependence (a write after write
+     dependence).
+
+`REG_DEP_ANTI'
+     This indicates an anti dependence (a write after read dependence).
+
+
+ These notes describe information gathered from gcov profile data.  They
+are stored in the `REG_NOTES' field of an insn as an `expr_list'.
+
+`REG_BR_PROB'
+     This is used to specify the ratio of branches to non-branches of a
+     branch insn according to the profile data.  The value is stored as
+     a value between 0 and REG_BR_PROB_BASE; larger values indicate a
+     higher probability that the branch will be taken.
+
+`REG_BR_PRED'
+     These notes are found in JUMP insns after delayed branch scheduling
+     has taken place.  They indicate both the direction and the
+     likelihood of the JUMP.  The format is a bitmask of ATTR_FLAG_*
+     values.
+
+`REG_FRAME_RELATED_EXPR'
+     This is used on an RTX_FRAME_RELATED_P insn wherein the attached
+     expression is used in place of the actual insn pattern.  This is
+     done in cases where the pattern is either complex or misleading.
+
+ For convenience, the machine mode in an `insn_list' or `expr_list' is
+printed using these symbolic codes in debugging dumps.
+
+ The only difference between the expression codes `insn_list' and
+`expr_list' is that the first operand of an `insn_list' is assumed to
+be an insn and is printed in debugging dumps as the insn's unique id;
+the first operand of an `expr_list' is printed in the ordinary way as
+an expression.
+
+
+File: gccint.info,  Node: Calls,  Next: Sharing,  Prev: Insns,  Up: RTL
+
+10.20 RTL Representation of Function-Call Insns
+===============================================
+
+Insns that call subroutines have the RTL expression code `call_insn'.
+These insns must satisfy special rules, and their bodies must use a
+special RTL expression code, `call'.
+
+ A `call' expression has two operands, as follows:
+
+     (call (mem:FM ADDR) NBYTES)
+
+Here NBYTES is an operand that represents the number of bytes of
+argument data being passed to the subroutine, FM is a machine mode
+(which must equal as the definition of the `FUNCTION_MODE' macro in the
+machine description) and ADDR represents the address of the subroutine.
+
+ For a subroutine that returns no value, the `call' expression as shown
+above is the entire body of the insn, except that the insn might also
+contain `use' or `clobber' expressions.
+
+ For a subroutine that returns a value whose mode is not `BLKmode', the
+value is returned in a hard register.  If this register's number is R,
+then the body of the call insn looks like this:
+
+     (set (reg:M R)
+          (call (mem:FM ADDR) NBYTES))
+
+This RTL expression makes it clear (to the optimizer passes) that the
+appropriate register receives a useful value in this insn.
+
+ When a subroutine returns a `BLKmode' value, it is handled by passing
+to the subroutine the address of a place to store the value.  So the
+call insn itself does not "return" any value, and it has the same RTL
+form as a call that returns nothing.
+
+ On some machines, the call instruction itself clobbers some register,
+for example to contain the return address.  `call_insn' insns on these
+machines should have a body which is a `parallel' that contains both
+the `call' expression and `clobber' expressions that indicate which
+registers are destroyed.  Similarly, if the call instruction requires
+some register other than the stack pointer that is not explicitly
+mentioned in its RTL, a `use' subexpression should mention that
+register.
+
+ Functions that are called are assumed to modify all registers listed in
+the configuration macro `CALL_USED_REGISTERS' (*note Register Basics::)
+and, with the exception of `const' functions and library calls, to
+modify all of memory.
+
+ Insns containing just `use' expressions directly precede the
+`call_insn' insn to indicate which registers contain inputs to the
+function.  Similarly, if registers other than those in
+`CALL_USED_REGISTERS' are clobbered by the called function, insns
+containing a single `clobber' follow immediately after the call to
+indicate which registers.
+
+
+File: gccint.info,  Node: Sharing,  Next: Reading RTL,  Prev: Calls,  Up: RTL
+
+10.21 Structure Sharing Assumptions
+===================================
+
+The compiler assumes that certain kinds of RTL expressions are unique;
+there do not exist two distinct objects representing the same value.
+In other cases, it makes an opposite assumption: that no RTL expression
+object of a certain kind appears in more than one place in the
+containing structure.
+
+ These assumptions refer to a single function; except for the RTL
+objects that describe global variables and external functions, and a
+few standard objects such as small integer constants, no RTL objects
+are common to two functions.
+
+   * Each pseudo-register has only a single `reg' object to represent
+     it, and therefore only a single machine mode.
+
+   * For any symbolic label, there is only one `symbol_ref' object
+     referring to it.
+
+   * All `const_int' expressions with equal values are shared.
+
+   * There is only one `pc' expression.
+
+   * There is only one `cc0' expression.
+
+   * There is only one `const_double' expression with value 0 for each
+     floating point mode.  Likewise for values 1 and 2.
+
+   * There is only one `const_vector' expression with value 0 for each
+     vector mode, be it an integer or a double constant vector.
+
+   * No `label_ref' or `scratch' appears in more than one place in the
+     RTL structure; in other words, it is safe to do a tree-walk of all
+     the insns in the function and assume that each time a `label_ref'
+     or `scratch' is seen it is distinct from all others that are seen.
+
+   * Only one `mem' object is normally created for each static variable
+     or stack slot, so these objects are frequently shared in all the
+     places they appear.  However, separate but equal objects for these
+     variables are occasionally made.
+
+   * When a single `asm' statement has multiple output operands, a
+     distinct `asm_operands' expression is made for each output operand.
+     However, these all share the vector which contains the sequence of
+     input operands.  This sharing is used later on to test whether two
+     `asm_operands' expressions come from the same statement, so all
+     optimizations must carefully preserve the sharing if they copy the
+     vector at all.
+
+   * No RTL object appears in more than one place in the RTL structure
+     except as described above.  Many passes of the compiler rely on
+     this by assuming that they can modify RTL objects in place without
+     unwanted side-effects on other insns.
+
+   * During initial RTL generation, shared structure is freely
+     introduced.  After all the RTL for a function has been generated,
+     all shared structure is copied by `unshare_all_rtl' in
+     `emit-rtl.c', after which the above rules are guaranteed to be
+     followed.
+
+   * During the combiner pass, shared structure within an insn can exist
+     temporarily.  However, the shared structure is copied before the
+     combiner is finished with the insn.  This is done by calling
+     `copy_rtx_if_shared', which is a subroutine of `unshare_all_rtl'.
+
+
+File: gccint.info,  Node: Reading RTL,  Prev: Sharing,  Up: RTL
+
+10.22 Reading RTL
+=================
+
+To read an RTL object from a file, call `read_rtx'.  It takes one
+argument, a stdio stream, and returns a single RTL object.  This routine
+is defined in `read-rtl.c'.  It is not available in the compiler
+itself, only the various programs that generate the compiler back end
+from the machine description.
+
+ People frequently have the idea of using RTL stored as text in a file
+as an interface between a language front end and the bulk of GCC.  This
+idea is not feasible.
+
+ GCC was designed to use RTL internally only.  Correct RTL for a given
+program is very dependent on the particular target machine.  And the RTL
+does not contain all the information about the program.
+
+ The proper way to interface GCC to a new language front end is with
+the "tree" data structure, described in the files `tree.h' and
+`tree.def'.  The documentation for this structure (*note GENERIC::) is
+incomplete.
+
+
+File: gccint.info,  Node: GENERIC,  Next: GIMPLE,  Prev: Passes,  Up: Top
+
+11 GENERIC
+**********
+
+The purpose of GENERIC is simply to provide a language-independent way
+of representing an entire function in trees.  To this end, it was
+necessary to add a few new tree codes to the back end, but most
+everything was already there.  If you can express it with the codes in
+`gcc/tree.def', it's GENERIC.
+
+ Early on, there was a great deal of debate about how to think about
+statements in a tree IL.  In GENERIC, a statement is defined as any
+expression whose value, if any, is ignored.  A statement will always
+have `TREE_SIDE_EFFECTS' set (or it will be discarded), but a
+non-statement expression may also have side effects.  A `CALL_EXPR',
+for instance.
+
+ It would be possible for some local optimizations to work on the
+GENERIC form of a function; indeed, the adapted tree inliner works fine
+on GENERIC, but the current compiler performs inlining after lowering
+to GIMPLE (a restricted form described in the next section). Indeed,
+currently the frontends perform this lowering before handing off to
+`tree_rest_of_compilation', but this seems inelegant.
+
+* Menu:
+
+* Deficiencies::                Topics net yet covered in this document.
+* Tree overview::               All about `tree's.
+* Types::                       Fundamental and aggregate types.
+* Declarations::                Type declarations and variables.
+* Attributes::                  Declaration and type attributes.
+* Expressions: Expression trees.            Operating on data.
+* Statements::                  Control flow and related trees.
+* Functions::           	Function bodies, linkage, and other aspects.
+* Language-dependent trees::    Topics and trees specific to language front ends.
+* C and C++ Trees::     	Trees specific to C and C++.
+* Java Trees:: 	                Trees specific to Java.
+
+
+File: gccint.info,  Node: Deficiencies,  Next: Tree overview,  Up: GENERIC
+
+11.1 Deficiencies
+=================
+
+There are many places in which this document is incomplet and incorrekt.
+It is, as of yet, only _preliminary_ documentation.
+
+
+File: gccint.info,  Node: Tree overview,  Next: Types,  Prev: Deficiencies,  Up: GENERIC
+
+11.2 Overview
+=============
+
+The central data structure used by the internal representation is the
+`tree'.  These nodes, while all of the C type `tree', are of many
+varieties.  A `tree' is a pointer type, but the object to which it
+points may be of a variety of types.  From this point forward, we will
+refer to trees in ordinary type, rather than in `this font', except
+when talking about the actual C type `tree'.
+
+ You can tell what kind of node a particular tree is by using the
+`TREE_CODE' macro.  Many, many macros take trees as input and return
+trees as output.  However, most macros require a certain kind of tree
+node as input.  In other words, there is a type-system for trees, but
+it is not reflected in the C type-system.
+
+ For safety, it is useful to configure GCC with `--enable-checking'.
+Although this results in a significant performance penalty (since all
+tree types are checked at run-time), and is therefore inappropriate in a
+release version, it is extremely helpful during the development process.
+
+ Many macros behave as predicates.  Many, although not all, of these
+predicates end in `_P'.  Do not rely on the result type of these macros
+being of any particular type.  You may, however, rely on the fact that
+the type can be compared to `0', so that statements like
+     if (TEST_P (t) && !TEST_P (y))
+       x = 1;
+ and
+     int i = (TEST_P (t) != 0);
+ are legal.  Macros that return `int' values now may be changed to
+return `tree' values, or other pointers in the future.  Even those that
+continue to return `int' may return multiple nonzero codes where
+previously they returned only zero and one.  Therefore, you should not
+write code like
+     if (TEST_P (t) == 1)
+ as this code is not guaranteed to work correctly in the future.
+
+ You should not take the address of values returned by the macros or
+functions described here.  In particular, no guarantee is given that the
+values are lvalues.
+
+ In general, the names of macros are all in uppercase, while the names
+of functions are entirely in lowercase.  There are rare exceptions to
+this rule.  You should assume that any macro or function whose name is
+made up entirely of uppercase letters may evaluate its arguments more
+than once.  You may assume that a macro or function whose name is made
+up entirely of lowercase letters will evaluate its arguments only once.
+
+ The `error_mark_node' is a special tree.  Its tree code is
+`ERROR_MARK', but since there is only ever one node with that code, the
+usual practice is to compare the tree against `error_mark_node'.  (This
+test is just a test for pointer equality.)  If an error has occurred
+during front-end processing the flag `errorcount' will be set.  If the
+front end has encountered code it cannot handle, it will issue a
+message to the user and set `sorrycount'.  When these flags are set,
+any macro or function which normally returns a tree of a particular
+kind may instead return the `error_mark_node'.  Thus, if you intend to
+do any processing of erroneous code, you must be prepared to deal with
+the `error_mark_node'.
+
+ Occasionally, a particular tree slot (like an operand to an expression,
+or a particular field in a declaration) will be referred to as
+"reserved for the back end".  These slots are used to store RTL when
+the tree is converted to RTL for use by the GCC back end.  However, if
+that process is not taking place (e.g., if the front end is being hooked
+up to an intelligent editor), then those slots may be used by the back
+end presently in use.
+
+ If you encounter situations that do not match this documentation, such
+as tree nodes of types not mentioned here, or macros documented to
+return entities of a particular kind that instead return entities of
+some different kind, you have found a bug, either in the front end or in
+the documentation.  Please report these bugs as you would any other bug.
+
+* Menu:
+
+* Macros and Functions::Macros and functions that can be used with all trees.
+* Identifiers::         The names of things.
+* Containers::          Lists and vectors.
+
+
+File: gccint.info,  Node: Macros and Functions,  Next: Identifiers,  Up: Tree overview
+
+11.2.1 Trees
+------------
+
+All GENERIC trees have two fields in common.  First, `TREE_CHAIN' is a
+pointer that can be used as a singly-linked list to other trees.  The
+other is `TREE_TYPE'.  Many trees store the type of an expression or
+declaration in this field.
+
+ These are some other functions for handling trees:
+
+`tree_size'
+     Return the number of bytes a tree takes.
+
+`build0'
+`build1'
+`build2'
+`build3'
+`build4'
+`build5'
+`build6'
+     These functions build a tree and supply values to put in each
+     parameter.  The basic signature is `code, type, [operands]'.
+     `code' is the `TREE_CODE', and `type' is a tree representing the
+     `TREE_TYPE'.  These are followed by the operands, each of which is
+     also a tree.
+
+
+
+File: gccint.info,  Node: Identifiers,  Next: Containers,  Prev: Macros and Functions,  Up: Tree overview
+
+11.2.2 Identifiers
+------------------
+
+An `IDENTIFIER_NODE' represents a slightly more general concept that
+the standard C or C++ concept of identifier.  In particular, an
+`IDENTIFIER_NODE' may contain a `$', or other extraordinary characters.
+
+ There are never two distinct `IDENTIFIER_NODE's representing the same
+identifier.  Therefore, you may use pointer equality to compare
+`IDENTIFIER_NODE's, rather than using a routine like `strcmp'.  Use
+`get_identifier' to obtain the unique `IDENTIFIER_NODE' for a supplied
+string.
+
+ You can use the following macros to access identifiers:
+`IDENTIFIER_POINTER'
+     The string represented by the identifier, represented as a
+     `char*'.  This string is always `NUL'-terminated, and contains no
+     embedded `NUL' characters.
+
+`IDENTIFIER_LENGTH'
+     The length of the string returned by `IDENTIFIER_POINTER', not
+     including the trailing `NUL'.  This value of `IDENTIFIER_LENGTH
+     (x)' is always the same as `strlen (IDENTIFIER_POINTER (x))'.
+
+`IDENTIFIER_OPNAME_P'
+     This predicate holds if the identifier represents the name of an
+     overloaded operator.  In this case, you should not depend on the
+     contents of either the `IDENTIFIER_POINTER' or the
+     `IDENTIFIER_LENGTH'.
+
+`IDENTIFIER_TYPENAME_P'
+     This predicate holds if the identifier represents the name of a
+     user-defined conversion operator.  In this case, the `TREE_TYPE' of
+     the `IDENTIFIER_NODE' holds the type to which the conversion
+     operator converts.
+
+
+
+File: gccint.info,  Node: Containers,  Prev: Identifiers,  Up: Tree overview
+
+11.2.3 Containers
+-----------------
+
+Two common container data structures can be represented directly with
+tree nodes.  A `TREE_LIST' is a singly linked list containing two trees
+per node.  These are the `TREE_PURPOSE' and `TREE_VALUE' of each node.
+(Often, the `TREE_PURPOSE' contains some kind of tag, or additional
+information, while the `TREE_VALUE' contains the majority of the
+payload.  In other cases, the `TREE_PURPOSE' is simply `NULL_TREE',
+while in still others both the `TREE_PURPOSE' and `TREE_VALUE' are of
+equal stature.)  Given one `TREE_LIST' node, the next node is found by
+following the `TREE_CHAIN'.  If the `TREE_CHAIN' is `NULL_TREE', then
+you have reached the end of the list.
+
+ A `TREE_VEC' is a simple vector.  The `TREE_VEC_LENGTH' is an integer
+(not a tree) giving the number of nodes in the vector.  The nodes
+themselves are accessed using the `TREE_VEC_ELT' macro, which takes two
+arguments.  The first is the `TREE_VEC' in question; the second is an
+integer indicating which element in the vector is desired.  The
+elements are indexed from zero.
+
+
+File: gccint.info,  Node: Types,  Next: Declarations,  Prev: Tree overview,  Up: GENERIC
+
+11.3 Types
+==========
+
+All types have corresponding tree nodes.  However, you should not assume
+that there is exactly one tree node corresponding to each type.  There
+are often multiple nodes corresponding to the same type.
+
+ For the most part, different kinds of types have different tree codes.
+(For example, pointer types use a `POINTER_TYPE' code while arrays use
+an `ARRAY_TYPE' code.)  However, pointers to member functions use the
+`RECORD_TYPE' code.  Therefore, when writing a `switch' statement that
+depends on the code associated with a particular type, you should take
+care to handle pointers to member functions under the `RECORD_TYPE'
+case label.
+
+ The following functions and macros deal with cv-qualification of types:
+`TYPE_MAIN_VARIANT'
+     This macro returns the unqualified version of a type.  It may be
+     applied to an unqualified type, but it is not always the identity
+     function in that case.
+
+ A few other macros and functions are usable with all types:
+`TYPE_SIZE'
+     The number of bits required to represent the type, represented as
+     an `INTEGER_CST'.  For an incomplete type, `TYPE_SIZE' will be
+     `NULL_TREE'.
+
+`TYPE_ALIGN'
+     The alignment of the type, in bits, represented as an `int'.
+
+`TYPE_NAME'
+     This macro returns a declaration (in the form of a `TYPE_DECL') for
+     the type.  (Note this macro does _not_ return an
+     `IDENTIFIER_NODE', as you might expect, given its name!)  You can
+     look at the `DECL_NAME' of the `TYPE_DECL' to obtain the actual
+     name of the type.  The `TYPE_NAME' will be `NULL_TREE' for a type
+     that is not a built-in type, the result of a typedef, or a named
+     class type.
+
+`TYPE_CANONICAL'
+     This macro returns the "canonical" type for the given type node.
+     Canonical types are used to improve performance in the C++ and
+     Objective-C++ front ends by allowing efficient comparison between
+     two type nodes in `same_type_p': if the `TYPE_CANONICAL' values of
+     the types are equal, the types are equivalent; otherwise, the types
+     are not equivalent. The notion of equivalence for canonical types
+     is the same as the notion of type equivalence in the language
+     itself. For instance,
+
+     When `TYPE_CANONICAL' is `NULL_TREE', there is no canonical type
+     for the given type node. In this case, comparison between this
+     type and any other type requires the compiler to perform a deep,
+     "structural" comparison to see if the two type nodes have the same
+     form and properties.
+
+     The canonical type for a node is always the most fundamental type
+     in the equivalence class of types. For instance, `int' is its own
+     canonical type. A typedef `I' of `int' will have `int' as its
+     canonical type. Similarly, `I*' and a typedef `IP' (defined to
+     `I*') will has `int*' as their canonical type. When building a new
+     type node, be sure to set `TYPE_CANONICAL' to the appropriate
+     canonical type. If the new type is a compound type (built from
+     other types), and any of those other types require structural
+     equality, use `SET_TYPE_STRUCTURAL_EQUALITY' to ensure that the
+     new type also requires structural equality. Finally, if for some
+     reason you cannot guarantee that `TYPE_CANONICAL' will point to
+     the canonical type, use `SET_TYPE_STRUCTURAL_EQUALITY' to make
+     sure that the new type-and any type constructed based on
+     it-requires structural equality. If you suspect that the canonical
+     type system is miscomparing types, pass `--param
+     verify-canonical-types=1' to the compiler or configure with
+     `--enable-checking' to force the compiler to verify its
+     canonical-type comparisons against the structural comparisons; the
+     compiler will then print any warnings if the canonical types
+     miscompare.
+
+`TYPE_STRUCTURAL_EQUALITY_P'
+     This predicate holds when the node requires structural equality
+     checks, e.g., when `TYPE_CANONICAL' is `NULL_TREE'.
+
+`SET_TYPE_STRUCTURAL_EQUALITY'
+     This macro states that the type node it is given requires
+     structural equality checks, e.g., it sets `TYPE_CANONICAL' to
+     `NULL_TREE'.
+
+`same_type_p'
+     This predicate takes two types as input, and holds if they are the
+     same type.  For example, if one type is a `typedef' for the other,
+     or both are `typedef's for the same type.  This predicate also
+     holds if the two trees given as input are simply copies of one
+     another; i.e., there is no difference between them at the source
+     level, but, for whatever reason, a duplicate has been made in the
+     representation.  You should never use `==' (pointer equality) to
+     compare types; always use `same_type_p' instead.
+
+ Detailed below are the various kinds of types, and the macros that can
+be used to access them.  Although other kinds of types are used
+elsewhere in G++, the types described here are the only ones that you
+will encounter while examining the intermediate representation.
+
+`VOID_TYPE'
+     Used to represent the `void' type.
+
+`INTEGER_TYPE'
+     Used to represent the various integral types, including `char',
+     `short', `int', `long', and `long long'.  This code is not used
+     for enumeration types, nor for the `bool' type.  The
+     `TYPE_PRECISION' is the number of bits used in the representation,
+     represented as an `unsigned int'.  (Note that in the general case
+     this is not the same value as `TYPE_SIZE'; suppose that there were
+     a 24-bit integer type, but that alignment requirements for the ABI
+     required 32-bit alignment.  Then, `TYPE_SIZE' would be an
+     `INTEGER_CST' for 32, while `TYPE_PRECISION' would be 24.)  The
+     integer type is unsigned if `TYPE_UNSIGNED' holds; otherwise, it
+     is signed.
+
+     The `TYPE_MIN_VALUE' is an `INTEGER_CST' for the smallest integer
+     that may be represented by this type.  Similarly, the
+     `TYPE_MAX_VALUE' is an `INTEGER_CST' for the largest integer that
+     may be represented by this type.
+
+`REAL_TYPE'
+     Used to represent the `float', `double', and `long double' types.
+     The number of bits in the floating-point representation is given
+     by `TYPE_PRECISION', as in the `INTEGER_TYPE' case.
+
+`FIXED_POINT_TYPE'
+     Used to represent the `short _Fract', `_Fract', `long _Fract',
+     `long long _Fract', `short _Accum', `_Accum', `long _Accum', and
+     `long long _Accum' types.  The number of bits in the fixed-point
+     representation is given by `TYPE_PRECISION', as in the
+     `INTEGER_TYPE' case.  There may be padding bits, fractional bits
+     and integral bits.  The number of fractional bits is given by
+     `TYPE_FBIT', and the number of integral bits is given by
+     `TYPE_IBIT'.  The fixed-point type is unsigned if `TYPE_UNSIGNED'
+     holds; otherwise, it is signed.  The fixed-point type is
+     saturating if `TYPE_SATURATING' holds; otherwise, it is not
+     saturating.
+
+`COMPLEX_TYPE'
+     Used to represent GCC built-in `__complex__' data types.  The
+     `TREE_TYPE' is the type of the real and imaginary parts.
+
+`ENUMERAL_TYPE'
+     Used to represent an enumeration type.  The `TYPE_PRECISION' gives
+     (as an `int'), the number of bits used to represent the type.  If
+     there are no negative enumeration constants, `TYPE_UNSIGNED' will
+     hold.  The minimum and maximum enumeration constants may be
+     obtained with `TYPE_MIN_VALUE' and `TYPE_MAX_VALUE', respectively;
+     each of these macros returns an `INTEGER_CST'.
+
+     The actual enumeration constants themselves may be obtained by
+     looking at the `TYPE_VALUES'.  This macro will return a
+     `TREE_LIST', containing the constants.  The `TREE_PURPOSE' of each
+     node will be an `IDENTIFIER_NODE' giving the name of the constant;
+     the `TREE_VALUE' will be an `INTEGER_CST' giving the value
+     assigned to that constant.  These constants will appear in the
+     order in which they were declared.  The `TREE_TYPE' of each of
+     these constants will be the type of enumeration type itself.
+
+`BOOLEAN_TYPE'
+     Used to represent the `bool' type.
+
+`POINTER_TYPE'
+     Used to represent pointer types, and pointer to data member types.
+     The `TREE_TYPE' gives the type to which this type points.
+
+`REFERENCE_TYPE'
+     Used to represent reference types.  The `TREE_TYPE' gives the type
+     to which this type refers.
+
+`FUNCTION_TYPE'
+     Used to represent the type of non-member functions and of static
+     member functions.  The `TREE_TYPE' gives the return type of the
+     function.  The `TYPE_ARG_TYPES' are a `TREE_LIST' of the argument
+     types.  The `TREE_VALUE' of each node in this list is the type of
+     the corresponding argument; the `TREE_PURPOSE' is an expression
+     for the default argument value, if any.  If the last node in the
+     list is `void_list_node' (a `TREE_LIST' node whose `TREE_VALUE' is
+     the `void_type_node'), then functions of this type do not take
+     variable arguments.  Otherwise, they do take a variable number of
+     arguments.
+
+     Note that in C (but not in C++) a function declared like `void f()'
+     is an unprototyped function taking a variable number of arguments;
+     the `TYPE_ARG_TYPES' of such a function will be `NULL'.
+
+`METHOD_TYPE'
+     Used to represent the type of a non-static member function.  Like a
+     `FUNCTION_TYPE', the return type is given by the `TREE_TYPE'.  The
+     type of `*this', i.e., the class of which functions of this type
+     are a member, is given by the `TYPE_METHOD_BASETYPE'.  The
+     `TYPE_ARG_TYPES' is the parameter list, as for a `FUNCTION_TYPE',
+     and includes the `this' argument.
+
+`ARRAY_TYPE'
+     Used to represent array types.  The `TREE_TYPE' gives the type of
+     the elements in the array.  If the array-bound is present in the
+     type, the `TYPE_DOMAIN' is an `INTEGER_TYPE' whose
+     `TYPE_MIN_VALUE' and `TYPE_MAX_VALUE' will be the lower and upper
+     bounds of the array, respectively.  The `TYPE_MIN_VALUE' will
+     always be an `INTEGER_CST' for zero, while the `TYPE_MAX_VALUE'
+     will be one less than the number of elements in the array, i.e.,
+     the highest value which may be used to index an element in the
+     array.
+
+`RECORD_TYPE'
+     Used to represent `struct' and `class' types, as well as pointers
+     to member functions and similar constructs in other languages.
+     `TYPE_FIELDS' contains the items contained in this type, each of
+     which can be a `FIELD_DECL', `VAR_DECL', `CONST_DECL', or
+     `TYPE_DECL'.  You may not make any assumptions about the ordering
+     of the fields in the type or whether one or more of them overlap.
+
+`UNION_TYPE'
+     Used to represent `union' types.  Similar to `RECORD_TYPE' except
+     that all `FIELD_DECL' nodes in `TYPE_FIELD' start at bit position
+     zero.
+
+`QUAL_UNION_TYPE'
+     Used to represent part of a variant record in Ada.  Similar to
+     `UNION_TYPE' except that each `FIELD_DECL' has a `DECL_QUALIFIER'
+     field, which contains a boolean expression that indicates whether
+     the field is present in the object.  The type will only have one
+     field, so each field's `DECL_QUALIFIER' is only evaluated if none
+     of the expressions in the previous fields in `TYPE_FIELDS' are
+     nonzero.  Normally these expressions will reference a field in the
+     outer object using a `PLACEHOLDER_EXPR'.
+
+`LANG_TYPE'
+     This node is used to represent a language-specific type.  The front
+     end must handle it.
+
+`OFFSET_TYPE'
+     This node is used to represent a pointer-to-data member.  For a
+     data member `X::m' the `TYPE_OFFSET_BASETYPE' is `X' and the
+     `TREE_TYPE' is the type of `m'.
+
+
+ There are variables whose values represent some of the basic types.
+These include:
+`void_type_node'
+     A node for `void'.
+
+`integer_type_node'
+     A node for `int'.
+
+`unsigned_type_node.'
+     A node for `unsigned int'.
+
+`char_type_node.'
+     A node for `char'.
+ It may sometimes be useful to compare one of these variables with a
+type in hand, using `same_type_p'.
+
+
+File: gccint.info,  Node: Declarations,  Next: Attributes,  Prev: Types,  Up: GENERIC
+
+11.4 Declarations
+=================
+
+This section covers the various kinds of declarations that appear in the
+internal representation, except for declarations of functions
+(represented by `FUNCTION_DECL' nodes), which are described in *note
+Functions::.
+
+* Menu:
+
+* Working with declarations::  Macros and functions that work on
+declarations.
+* Internal structure:: How declaration nodes are represented.
+
+
+File: gccint.info,  Node: Working with declarations,  Next: Internal structure,  Up: Declarations
+
+11.4.1 Working with declarations
+--------------------------------
+
+Some macros can be used with any kind of declaration.  These include:
+`DECL_NAME'
+     This macro returns an `IDENTIFIER_NODE' giving the name of the
+     entity.
+
+`TREE_TYPE'
+     This macro returns the type of the entity declared.
+
+`EXPR_FILENAME'
+     This macro returns the name of the file in which the entity was
+     declared, as a `char*'.  For an entity declared implicitly by the
+     compiler (like `__builtin_memcpy'), this will be the string
+     `"<internal>"'.
+
+`EXPR_LINENO'
+     This macro returns the line number at which the entity was
+     declared, as an `int'.
+
+`DECL_ARTIFICIAL'
+     This predicate holds if the declaration was implicitly generated
+     by the compiler.  For example, this predicate will hold of an
+     implicitly declared member function, or of the `TYPE_DECL'
+     implicitly generated for a class type.  Recall that in C++ code
+     like:
+          struct S {};
+     is roughly equivalent to C code like:
+          struct S {};
+          typedef struct S S;
+     The implicitly generated `typedef' declaration is represented by a
+     `TYPE_DECL' for which `DECL_ARTIFICIAL' holds.
+
+
+ The various kinds of declarations include:
+`LABEL_DECL'
+     These nodes are used to represent labels in function bodies.  For
+     more information, see *note Functions::.  These nodes only appear
+     in block scopes.
+
+`CONST_DECL'
+     These nodes are used to represent enumeration constants.  The
+     value of the constant is given by `DECL_INITIAL' which will be an
+     `INTEGER_CST' with the same type as the `TREE_TYPE' of the
+     `CONST_DECL', i.e., an `ENUMERAL_TYPE'.
+
+`RESULT_DECL'
+     These nodes represent the value returned by a function.  When a
+     value is assigned to a `RESULT_DECL', that indicates that the
+     value should be returned, via bitwise copy, by the function.  You
+     can use `DECL_SIZE' and `DECL_ALIGN' on a `RESULT_DECL', just as
+     with a `VAR_DECL'.
+
+`TYPE_DECL'
+     These nodes represent `typedef' declarations.  The `TREE_TYPE' is
+     the type declared to have the name given by `DECL_NAME'.  In some
+     cases, there is no associated name.
+
+`VAR_DECL'
+     These nodes represent variables with namespace or block scope, as
+     well as static data members.  The `DECL_SIZE' and `DECL_ALIGN' are
+     analogous to `TYPE_SIZE' and `TYPE_ALIGN'.  For a declaration, you
+     should always use the `DECL_SIZE' and `DECL_ALIGN' rather than the
+     `TYPE_SIZE' and `TYPE_ALIGN' given by the `TREE_TYPE', since
+     special attributes may have been applied to the variable to give
+     it a particular size and alignment.  You may use the predicates
+     `DECL_THIS_STATIC' or `DECL_THIS_EXTERN' to test whether the
+     storage class specifiers `static' or `extern' were used to declare
+     a variable.
+
+     If this variable is initialized (but does not require a
+     constructor), the `DECL_INITIAL' will be an expression for the
+     initializer.  The initializer should be evaluated, and a bitwise
+     copy into the variable performed.  If the `DECL_INITIAL' is the
+     `error_mark_node', there is an initializer, but it is given by an
+     explicit statement later in the code; no bitwise copy is required.
+
+     GCC provides an extension that allows either automatic variables,
+     or global variables, to be placed in particular registers.  This
+     extension is being used for a particular `VAR_DECL' if
+     `DECL_REGISTER' holds for the `VAR_DECL', and if
+     `DECL_ASSEMBLER_NAME' is not equal to `DECL_NAME'.  In that case,
+     `DECL_ASSEMBLER_NAME' is the name of the register into which the
+     variable will be placed.
+
+`PARM_DECL'
+     Used to represent a parameter to a function.  Treat these nodes
+     similarly to `VAR_DECL' nodes.  These nodes only appear in the
+     `DECL_ARGUMENTS' for a `FUNCTION_DECL'.
+
+     The `DECL_ARG_TYPE' for a `PARM_DECL' is the type that will
+     actually be used when a value is passed to this function.  It may
+     be a wider type than the `TREE_TYPE' of the parameter; for
+     example, the ordinary type might be `short' while the
+     `DECL_ARG_TYPE' is `int'.
+
+`DEBUG_EXPR_DECL'
+     Used to represent an anonymous debug-information temporary created
+     to hold an expression as it is optimized away, so that its value
+     can be referenced in debug bind statements.
+
+`FIELD_DECL'
+     These nodes represent non-static data members.  The `DECL_SIZE' and
+     `DECL_ALIGN' behave as for `VAR_DECL' nodes.  The position of the
+     field within the parent record is specified by a combination of
+     three attributes.  `DECL_FIELD_OFFSET' is the position, counting
+     in bytes, of the `DECL_OFFSET_ALIGN'-bit sized word containing the
+     bit of the field closest to the beginning of the structure.
+     `DECL_FIELD_BIT_OFFSET' is the bit offset of the first bit of the
+     field within this word; this may be nonzero even for fields that
+     are not bit-fields, since `DECL_OFFSET_ALIGN' may be greater than
+     the natural alignment of the field's type.
+
+     If `DECL_C_BIT_FIELD' holds, this field is a bit-field.  In a
+     bit-field, `DECL_BIT_FIELD_TYPE' also contains the type that was
+     originally specified for it, while DECL_TYPE may be a modified
+     type with lesser precision, according to the size of the bit field.
+
+`NAMESPACE_DECL'
+     Namespaces provide a name hierarchy for other declarations.  They
+     appear in the `DECL_CONTEXT' of other `_DECL' nodes.
+
+
+
+File: gccint.info,  Node: Internal structure,  Prev: Working with declarations,  Up: Declarations
+
+11.4.2 Internal structure
+-------------------------
+
+`DECL' nodes are represented internally as a hierarchy of structures.
+
+* Menu:
+
+* Current structure hierarchy::  The current DECL node structure
+hierarchy.
+* Adding new DECL node types:: How to add a new DECL node to a
+frontend.
+
+
+File: gccint.info,  Node: Current structure hierarchy,  Next: Adding new DECL node types,  Up: Internal structure
+
+11.4.2.1 Current structure hierarchy
+....................................
+
+`struct tree_decl_minimal'
+     This is the minimal structure to inherit from in order for common
+     `DECL' macros to work.  The fields it contains are a unique ID,
+     source location, context, and name.
+
+`struct tree_decl_common'
+     This structure inherits from `struct tree_decl_minimal'.  It
+     contains fields that most `DECL' nodes need, such as a field to
+     store alignment, machine mode, size, and attributes.
+
+`struct tree_field_decl'
+     This structure inherits from `struct tree_decl_common'.  It is
+     used to represent `FIELD_DECL'.
+
+`struct tree_label_decl'
+     This structure inherits from `struct tree_decl_common'.  It is
+     used to represent `LABEL_DECL'.
+
+`struct tree_translation_unit_decl'
+     This structure inherits from `struct tree_decl_common'.  It is
+     used to represent `TRANSLATION_UNIT_DECL'.
+
+`struct tree_decl_with_rtl'
+     This structure inherits from `struct tree_decl_common'.  It
+     contains a field to store the low-level RTL associated with a
+     `DECL' node.
+
+`struct tree_result_decl'
+     This structure inherits from `struct tree_decl_with_rtl'.  It is
+     used to represent `RESULT_DECL'.
+
+`struct tree_const_decl'
+     This structure inherits from `struct tree_decl_with_rtl'.  It is
+     used to represent `CONST_DECL'.
+
+`struct tree_parm_decl'
+     This structure inherits from `struct tree_decl_with_rtl'.  It is
+     used to represent `PARM_DECL'.
+
+`struct tree_decl_with_vis'
+     This structure inherits from `struct tree_decl_with_rtl'.  It
+     contains fields necessary to store visibility information, as well
+     as a section name and assembler name.
+
+`struct tree_var_decl'
+     This structure inherits from `struct tree_decl_with_vis'.  It is
+     used to represent `VAR_DECL'.
+
+`struct tree_function_decl'
+     This structure inherits from `struct tree_decl_with_vis'.  It is
+     used to represent `FUNCTION_DECL'.
+
+
+
+File: gccint.info,  Node: Adding new DECL node types,  Prev: Current structure hierarchy,  Up: Internal structure
+
+11.4.2.2 Adding new DECL node types
+...................................
+
+Adding a new `DECL' tree consists of the following steps
+
+Add a new tree code for the `DECL' node
+     For language specific `DECL' nodes, there is a `.def' file in each
+     frontend directory where the tree code should be added.  For
+     `DECL' nodes that are part of the middle-end, the code should be
+     added to `tree.def'.
+
+Create a new structure type for the `DECL' node
+     These structures should inherit from one of the existing
+     structures in the language hierarchy by using that structure as
+     the first member.
+
+          struct tree_foo_decl
+          {
+             struct tree_decl_with_vis common;
+          }
+
+     Would create a structure name `tree_foo_decl' that inherits from
+     `struct tree_decl_with_vis'.
+
+     For language specific `DECL' nodes, this new structure type should
+     go in the appropriate `.h' file.  For `DECL' nodes that are part
+     of the middle-end, the structure type should go in `tree.h'.
+
+Add a member to the tree structure enumerator for the node
+     For garbage collection and dynamic checking purposes, each `DECL'
+     node structure type is required to have a unique enumerator value
+     specified with it.  For language specific `DECL' nodes, this new
+     enumerator value should go in the appropriate `.def' file.  For
+     `DECL' nodes that are part of the middle-end, the enumerator
+     values are specified in `treestruct.def'.
+
+Update `union tree_node'
+     In order to make your new structure type usable, it must be added
+     to `union tree_node'.  For language specific `DECL' nodes, a new
+     entry should be added to the appropriate `.h' file of the form
+            struct tree_foo_decl GTY ((tag ("TS_VAR_DECL"))) foo_decl;
+     For `DECL' nodes that are part of the middle-end, the additional
+     member goes directly into `union tree_node' in `tree.h'.
+
+Update dynamic checking info
+     In order to be able to check whether accessing a named portion of
+     `union tree_node' is legal, and whether a certain `DECL' node
+     contains one of the enumerated `DECL' node structures in the
+     hierarchy, a simple lookup table is used.  This lookup table needs
+     to be kept up to date with the tree structure hierarchy, or else
+     checking and containment macros will fail inappropriately.
+
+     For language specific `DECL' nodes, their is an `init_ts' function
+     in an appropriate `.c' file, which initializes the lookup table.
+     Code setting up the table for new `DECL' nodes should be added
+     there.  For each `DECL' tree code and enumerator value
+     representing a member of the inheritance  hierarchy, the table
+     should contain 1 if that tree code inherits (directly or
+     indirectly) from that member.  Thus, a `FOO_DECL' node derived
+     from `struct decl_with_rtl', and enumerator value `TS_FOO_DECL',
+     would be set up as follows
+          tree_contains_struct[FOO_DECL][TS_FOO_DECL] = 1;
+          tree_contains_struct[FOO_DECL][TS_DECL_WRTL] = 1;
+          tree_contains_struct[FOO_DECL][TS_DECL_COMMON] = 1;
+          tree_contains_struct[FOO_DECL][TS_DECL_MINIMAL] = 1;
+
+     For `DECL' nodes that are part of the middle-end, the setup code
+     goes into `tree.c'.
+
+Add macros to access any new fields and flags
+     Each added field or flag should have a macro that is used to access
+     it, that performs appropriate checking to ensure only the right
+     type of `DECL' nodes access the field.
+
+     These macros generally take the following form
+          #define FOO_DECL_FIELDNAME(NODE) FOO_DECL_CHECK(NODE)->foo_decl.fieldname
+     However, if the structure is simply a base class for further
+     structures, something like the following should be used
+          #define BASE_STRUCT_CHECK(T) CONTAINS_STRUCT_CHECK(T, TS_BASE_STRUCT)
+          #define BASE_STRUCT_FIELDNAME(NODE) \
+             (BASE_STRUCT_CHECK(NODE)->base_struct.fieldname
+
+
+
+File: gccint.info,  Node: Attributes,  Next: Expression trees,  Prev: Declarations,  Up: GENERIC
+
+11.5 Attributes in trees
+========================
+
+Attributes, as specified using the `__attribute__' keyword, are
+represented internally as a `TREE_LIST'.  The `TREE_PURPOSE' is the
+name of the attribute, as an `IDENTIFIER_NODE'.  The `TREE_VALUE' is a
+`TREE_LIST' of the arguments of the attribute, if any, or `NULL_TREE'
+if there are no arguments; the arguments are stored as the `TREE_VALUE'
+of successive entries in the list, and may be identifiers or
+expressions.  The `TREE_CHAIN' of the attribute is the next attribute
+in a list of attributes applying to the same declaration or type, or
+`NULL_TREE' if there are no further attributes in the list.
+
+ Attributes may be attached to declarations and to types; these
+attributes may be accessed with the following macros.  All attributes
+are stored in this way, and many also cause other changes to the
+declaration or type or to other internal compiler data structures.
+
+ -- Tree Macro: tree DECL_ATTRIBUTES (tree DECL)
+     This macro returns the attributes on the declaration DECL.
+
+ -- Tree Macro: tree TYPE_ATTRIBUTES (tree TYPE)
+     This macro returns the attributes on the type TYPE.
+
+
+File: gccint.info,  Node: Expression trees,  Next: Statements,  Prev: Attributes,  Up: GENERIC
+
+11.6 Expressions
+================
+
+The internal representation for expressions is for the most part quite
+straightforward.  However, there are a few facts that one must bear in
+mind.  In particular, the expression "tree" is actually a directed
+acyclic graph.  (For example there may be many references to the integer
+constant zero throughout the source program; many of these will be
+represented by the same expression node.)  You should not rely on
+certain kinds of node being shared, nor should you rely on certain
+kinds of nodes being unshared.
+
+ The following macros can be used with all expression nodes:
+
+`TREE_TYPE'
+     Returns the type of the expression.  This value may not be
+     precisely the same type that would be given the expression in the
+     original program.
+
+ In what follows, some nodes that one might expect to always have type
+`bool' are documented to have either integral or boolean type.  At some
+point in the future, the C front end may also make use of this same
+intermediate representation, and at this point these nodes will
+certainly have integral type.  The previous sentence is not meant to
+imply that the C++ front end does not or will not give these nodes
+integral type.
+
+ Below, we list the various kinds of expression nodes.  Except where
+noted otherwise, the operands to an expression are accessed using the
+`TREE_OPERAND' macro.  For example, to access the first operand to a
+binary plus expression `expr', use:
+
+     TREE_OPERAND (expr, 0)
+ As this example indicates, the operands are zero-indexed.
+
+* Menu:
+
+* Constants: Constant expressions.
+* Storage References::
+* Unary and Binary Expressions::
+* Vectors::
+
+
+File: gccint.info,  Node: Constant expressions,  Next: Storage References,  Up: Expression trees
+
+11.6.1 Constant expressions
+---------------------------
+
+The table below begins with constants, moves on to unary expressions,
+then proceeds to binary expressions, and concludes with various other
+kinds of expressions:
+
+`INTEGER_CST'
+     These nodes represent integer constants.  Note that the type of
+     these constants is obtained with `TREE_TYPE'; they are not always
+     of type `int'.  In particular, `char' constants are represented
+     with `INTEGER_CST' nodes.  The value of the integer constant `e' is
+     given by
+          ((TREE_INT_CST_HIGH (e) << HOST_BITS_PER_WIDE_INT)
+          + TREE_INST_CST_LOW (e))
+     HOST_BITS_PER_WIDE_INT is at least thirty-two on all platforms.
+     Both `TREE_INT_CST_HIGH' and `TREE_INT_CST_LOW' return a
+     `HOST_WIDE_INT'.  The value of an `INTEGER_CST' is interpreted as
+     a signed or unsigned quantity depending on the type of the
+     constant.  In general, the expression given above will overflow,
+     so it should not be used to calculate the value of the constant.
+
+     The variable `integer_zero_node' is an integer constant with value
+     zero.  Similarly, `integer_one_node' is an integer constant with
+     value one.  The `size_zero_node' and `size_one_node' variables are
+     analogous, but have type `size_t' rather than `int'.
+
+     The function `tree_int_cst_lt' is a predicate which holds if its
+     first argument is less than its second.  Both constants are
+     assumed to have the same signedness (i.e., either both should be
+     signed or both should be unsigned.)  The full width of the
+     constant is used when doing the comparison; the usual rules about
+     promotions and conversions are ignored.  Similarly,
+     `tree_int_cst_equal' holds if the two constants are equal.  The
+     `tree_int_cst_sgn' function returns the sign of a constant.  The
+     value is `1', `0', or `-1' according on whether the constant is
+     greater than, equal to, or less than zero.  Again, the signedness
+     of the constant's type is taken into account; an unsigned constant
+     is never less than zero, no matter what its bit-pattern.
+
+`REAL_CST'
+     FIXME: Talk about how to obtain representations of this constant,
+     do comparisons, and so forth.
+
+`FIXED_CST'
+     These nodes represent fixed-point constants.  The type of these
+     constants is obtained with `TREE_TYPE'.  `TREE_FIXED_CST_PTR'
+     points to a `struct fixed_value';  `TREE_FIXED_CST' returns the
+     structure itself.  `struct fixed_value' contains `data' with the
+     size of two `HOST_BITS_PER_WIDE_INT' and `mode' as the associated
+     fixed-point machine mode for `data'.
+
+`COMPLEX_CST'
+     These nodes are used to represent complex number constants, that
+     is a `__complex__' whose parts are constant nodes.  The
+     `TREE_REALPART' and `TREE_IMAGPART' return the real and the
+     imaginary parts respectively.
+
+`VECTOR_CST'
+     These nodes are used to represent vector constants, whose parts are
+     constant nodes.  Each individual constant node is either an
+     integer or a double constant node.  The first operand is a
+     `TREE_LIST' of the constant nodes and is accessed through
+     `TREE_VECTOR_CST_ELTS'.
+
+`STRING_CST'
+     These nodes represent string-constants.  The `TREE_STRING_LENGTH'
+     returns the length of the string, as an `int'.  The
+     `TREE_STRING_POINTER' is a `char*' containing the string itself.
+     The string may not be `NUL'-terminated, and it may contain
+     embedded `NUL' characters.  Therefore, the `TREE_STRING_LENGTH'
+     includes the trailing `NUL' if it is present.
+
+     For wide string constants, the `TREE_STRING_LENGTH' is the number
+     of bytes in the string, and the `TREE_STRING_POINTER' points to an
+     array of the bytes of the string, as represented on the target
+     system (that is, as integers in the target endianness).  Wide and
+     non-wide string constants are distinguished only by the `TREE_TYPE'
+     of the `STRING_CST'.
+
+     FIXME: The formats of string constants are not well-defined when
+     the target system bytes are not the same width as host system
+     bytes.
+
+
+
+File: gccint.info,  Node: Storage References,  Next: Unary and Binary Expressions,  Prev: Constant expressions,  Up: Expression trees
+
+11.6.2 References to storage
+----------------------------
+
+`ARRAY_REF'
+     These nodes represent array accesses.  The first operand is the
+     array; the second is the index.  To calculate the address of the
+     memory accessed, you must scale the index by the size of the type
+     of the array elements.  The type of these expressions must be the
+     type of a component of the array.  The third and fourth operands
+     are used after gimplification to represent the lower bound and
+     component size but should not be used directly; call
+     `array_ref_low_bound' and `array_ref_element_size' instead.
+
+`ARRAY_RANGE_REF'
+     These nodes represent access to a range (or "slice") of an array.
+     The operands are the same as that for `ARRAY_REF' and have the same
+     meanings.  The type of these expressions must be an array whose
+     component type is the same as that of the first operand.  The
+     range of that array type determines the amount of data these
+     expressions access.
+
+`TARGET_MEM_REF'
+     These nodes represent memory accesses whose address directly map to
+     an addressing mode of the target architecture.  The first argument
+     is `TMR_SYMBOL' and must be a `VAR_DECL' of an object with a fixed
+     address.  The second argument is `TMR_BASE' and the third one is
+     `TMR_INDEX'.  The fourth argument is `TMR_STEP' and must be an
+     `INTEGER_CST'.  The fifth argument is `TMR_OFFSET' and must be an
+     `INTEGER_CST'.  Any of the arguments may be NULL if the
+     appropriate component does not appear in the address.  Address of
+     the `TARGET_MEM_REF' is determined in the following way.
+
+          &TMR_SYMBOL + TMR_BASE + TMR_INDEX * TMR_STEP + TMR_OFFSET
+
+     The sixth argument is the reference to the original memory access,
+     which is preserved for the purposes of the RTL alias analysis.
+     The seventh argument is a tag representing the results of tree
+     level alias analysis.
+
+`ADDR_EXPR'
+     These nodes are used to represent the address of an object.  (These
+     expressions will always have pointer or reference type.)  The
+     operand may be another expression, or it may be a declaration.
+
+     As an extension, GCC allows users to take the address of a label.
+     In this case, the operand of the `ADDR_EXPR' will be a
+     `LABEL_DECL'.  The type of such an expression is `void*'.
+
+     If the object addressed is not an lvalue, a temporary is created,
+     and the address of the temporary is used.
+
+`INDIRECT_REF'
+     These nodes are used to represent the object pointed to by a
+     pointer.  The operand is the pointer being dereferenced; it will
+     always have pointer or reference type.
+
+`MEM_REF'
+     These nodes are used to represent the object pointed to by a
+     pointer offset by a constant.  The first operand is the pointer
+     being dereferenced; it will always have pointer or reference type.
+     The second operand is a pointer constant.  Its type is specifying
+     the type to be used for type-based alias analysis.
+
+`COMPONENT_REF'
+     These nodes represent non-static data member accesses.  The first
+     operand is the object (rather than a pointer to it); the second
+     operand is the `FIELD_DECL' for the data member.  The third
+     operand represents the byte offset of the field, but should not be
+     used directly; call `component_ref_field_offset' instead.
+
+
+
+File: gccint.info,  Node: Unary and Binary Expressions,  Next: Vectors,  Prev: Storage References,  Up: Expression trees
+
+11.6.3 Unary and Binary Expressions
+-----------------------------------
+
+`NEGATE_EXPR'
+     These nodes represent unary negation of the single operand, for
+     both integer and floating-point types.  The type of negation can be
+     determined by looking at the type of the expression.
+
+     The behavior of this operation on signed arithmetic overflow is
+     controlled by the `flag_wrapv' and `flag_trapv' variables.
+
+`ABS_EXPR'
+     These nodes represent the absolute value of the single operand, for
+     both integer and floating-point types.  This is typically used to
+     implement the `abs', `labs' and `llabs' builtins for integer
+     types, and the `fabs', `fabsf' and `fabsl' builtins for floating
+     point types.  The type of abs operation can be determined by
+     looking at the type of the expression.
+
+     This node is not used for complex types.  To represent the modulus
+     or complex abs of a complex value, use the `BUILT_IN_CABS',
+     `BUILT_IN_CABSF' or `BUILT_IN_CABSL' builtins, as used to
+     implement the C99 `cabs', `cabsf' and `cabsl' built-in functions.
+
+`BIT_NOT_EXPR'
+     These nodes represent bitwise complement, and will always have
+     integral type.  The only operand is the value to be complemented.
+
+`TRUTH_NOT_EXPR'
+     These nodes represent logical negation, and will always have
+     integral (or boolean) type.  The operand is the value being
+     negated.  The type of the operand and that of the result are
+     always of `BOOLEAN_TYPE' or `INTEGER_TYPE'.
+
+`PREDECREMENT_EXPR'
+`PREINCREMENT_EXPR'
+`POSTDECREMENT_EXPR'
+`POSTINCREMENT_EXPR'
+     These nodes represent increment and decrement expressions.  The
+     value of the single operand is computed, and the operand
+     incremented or decremented.  In the case of `PREDECREMENT_EXPR' and
+     `PREINCREMENT_EXPR', the value of the expression is the value
+     resulting after the increment or decrement; in the case of
+     `POSTDECREMENT_EXPR' and `POSTINCREMENT_EXPR' is the value before
+     the increment or decrement occurs.  The type of the operand, like
+     that of the result, will be either integral, boolean, or
+     floating-point.
+
+`FIX_TRUNC_EXPR'
+     These nodes represent conversion of a floating-point value to an
+     integer.  The single operand will have a floating-point type, while
+     the complete expression will have an integral (or boolean) type.
+     The operand is rounded towards zero.
+
+`FLOAT_EXPR'
+     These nodes represent conversion of an integral (or boolean) value
+     to a floating-point value.  The single operand will have integral
+     type, while the complete expression will have a floating-point
+     type.
+
+     FIXME: How is the operand supposed to be rounded?  Is this
+     dependent on `-mieee'?
+
+`COMPLEX_EXPR'
+     These nodes are used to represent complex numbers constructed from
+     two expressions of the same (integer or real) type.  The first
+     operand is the real part and the second operand is the imaginary
+     part.
+
+`CONJ_EXPR'
+     These nodes represent the conjugate of their operand.
+
+`REALPART_EXPR'
+`IMAGPART_EXPR'
+     These nodes represent respectively the real and the imaginary parts
+     of complex numbers (their sole argument).
+
+`NON_LVALUE_EXPR'
+     These nodes indicate that their one and only operand is not an
+     lvalue.  A back end can treat these identically to the single
+     operand.
+
+`NOP_EXPR'
+     These nodes are used to represent conversions that do not require
+     any code-generation.  For example, conversion of a `char*' to an
+     `int*' does not require any code be generated; such a conversion is
+     represented by a `NOP_EXPR'.  The single operand is the expression
+     to be converted.  The conversion from a pointer to a reference is
+     also represented with a `NOP_EXPR'.
+
+`CONVERT_EXPR'
+     These nodes are similar to `NOP_EXPR's, but are used in those
+     situations where code may need to be generated.  For example, if an
+     `int*' is converted to an `int' code may need to be generated on
+     some platforms.  These nodes are never used for C++-specific
+     conversions, like conversions between pointers to different
+     classes in an inheritance hierarchy.  Any adjustments that need to
+     be made in such cases are always indicated explicitly.  Similarly,
+     a user-defined conversion is never represented by a
+     `CONVERT_EXPR'; instead, the function calls are made explicit.
+
+`FIXED_CONVERT_EXPR'
+     These nodes are used to represent conversions that involve
+     fixed-point values.  For example, from a fixed-point value to
+     another fixed-point value, from an integer to a fixed-point value,
+     from a fixed-point value to an integer, from a floating-point
+     value to a fixed-point value, or from a fixed-point value to a
+     floating-point value.
+
+`LSHIFT_EXPR'
+`RSHIFT_EXPR'
+     These nodes represent left and right shifts, respectively.  The
+     first operand is the value to shift; it will always be of integral
+     type.  The second operand is an expression for the number of bits
+     by which to shift.  Right shift should be treated as arithmetic,
+     i.e., the high-order bits should be zero-filled when the
+     expression has unsigned type and filled with the sign bit when the
+     expression has signed type.  Note that the result is undefined if
+     the second operand is larger than or equal to the first operand's
+     type size.
+
+`BIT_IOR_EXPR'
+`BIT_XOR_EXPR'
+`BIT_AND_EXPR'
+     These nodes represent bitwise inclusive or, bitwise exclusive or,
+     and bitwise and, respectively.  Both operands will always have
+     integral type.
+
+`TRUTH_ANDIF_EXPR'
+`TRUTH_ORIF_EXPR'
+     These nodes represent logical "and" and logical "or", respectively.
+     These operators are not strict; i.e., the second operand is
+     evaluated only if the value of the expression is not determined by
+     evaluation of the first operand.  The type of the operands and
+     that of the result are always of `BOOLEAN_TYPE' or `INTEGER_TYPE'.
+
+`TRUTH_AND_EXPR'
+`TRUTH_OR_EXPR'
+`TRUTH_XOR_EXPR'
+     These nodes represent logical and, logical or, and logical
+     exclusive or.  They are strict; both arguments are always
+     evaluated.  There are no corresponding operators in C or C++, but
+     the front end will sometimes generate these expressions anyhow, if
+     it can tell that strictness does not matter.  The type of the
+     operands and that of the result are always of `BOOLEAN_TYPE' or
+     `INTEGER_TYPE'.
+
+`POINTER_PLUS_EXPR'
+     This node represents pointer arithmetic.  The first operand is
+     always a pointer/reference type.  The second operand is always an
+     unsigned integer type compatible with sizetype.  This is the only
+     binary arithmetic operand that can operate on pointer types.
+
+`PLUS_EXPR'
+`MINUS_EXPR'
+`MULT_EXPR'
+     These nodes represent various binary arithmetic operations.
+     Respectively, these operations are addition, subtraction (of the
+     second operand from the first) and multiplication.  Their operands
+     may have either integral or floating type, but there will never be
+     case in which one operand is of floating type and the other is of
+     integral type.
+
+     The behavior of these operations on signed arithmetic overflow is
+     controlled by the `flag_wrapv' and `flag_trapv' variables.
+
+`RDIV_EXPR'
+     This node represents a floating point division operation.
+
+`TRUNC_DIV_EXPR'
+`FLOOR_DIV_EXPR'
+`CEIL_DIV_EXPR'
+`ROUND_DIV_EXPR'
+     These nodes represent integer division operations that return an
+     integer result.  `TRUNC_DIV_EXPR' rounds towards zero,
+     `FLOOR_DIV_EXPR' rounds towards negative infinity, `CEIL_DIV_EXPR'
+     rounds towards positive infinity and `ROUND_DIV_EXPR' rounds to
+     the closest integer.  Integer division in C and C++ is truncating,
+     i.e. `TRUNC_DIV_EXPR'.
+
+     The behavior of these operations on signed arithmetic overflow,
+     when dividing the minimum signed integer by minus one, is
+     controlled by the `flag_wrapv' and `flag_trapv' variables.
+
+`TRUNC_MOD_EXPR'
+`FLOOR_MOD_EXPR'
+`CEIL_MOD_EXPR'
+`ROUND_MOD_EXPR'
+     These nodes represent the integer remainder or modulus operation.
+     The integer modulus of two operands `a' and `b' is defined as `a -
+     (a/b)*b' where the division calculated using the corresponding
+     division operator.  Hence for `TRUNC_MOD_EXPR' this definition
+     assumes division using truncation towards zero, i.e.
+     `TRUNC_DIV_EXPR'.  Integer remainder in C and C++ uses truncating
+     division, i.e. `TRUNC_MOD_EXPR'.
+
+`EXACT_DIV_EXPR'
+     The `EXACT_DIV_EXPR' code is used to represent integer divisions
+     where the numerator is known to be an exact multiple of the
+     denominator.  This allows the backend to choose between the faster
+     of `TRUNC_DIV_EXPR', `CEIL_DIV_EXPR' and `FLOOR_DIV_EXPR' for the
+     current target.
+
+`LT_EXPR'
+`LE_EXPR'
+`GT_EXPR'
+`GE_EXPR'
+`EQ_EXPR'
+`NE_EXPR'
+     These nodes represent the less than, less than or equal to, greater
+     than, greater than or equal to, equal, and not equal comparison
+     operators.  The first and second operand with either be both of
+     integral type or both of floating type.  The result type of these
+     expressions will always be of integral or boolean type.  These
+     operations return the result type's zero value for false, and the
+     result type's one value for true.
+
+     For floating point comparisons, if we honor IEEE NaNs and either
+     operand is NaN, then `NE_EXPR' always returns true and the
+     remaining operators always return false.  On some targets,
+     comparisons against an IEEE NaN, other than equality and
+     inequality, may generate a floating point exception.
+
+`ORDERED_EXPR'
+`UNORDERED_EXPR'
+     These nodes represent non-trapping ordered and unordered comparison
+     operators.  These operations take two floating point operands and
+     determine whether they are ordered or unordered relative to each
+     other.  If either operand is an IEEE NaN, their comparison is
+     defined to be unordered, otherwise the comparison is defined to be
+     ordered.  The result type of these expressions will always be of
+     integral or boolean type.  These operations return the result
+     type's zero value for false, and the result type's one value for
+     true.
+
+`UNLT_EXPR'
+`UNLE_EXPR'
+`UNGT_EXPR'
+`UNGE_EXPR'
+`UNEQ_EXPR'
+`LTGT_EXPR'
+     These nodes represent the unordered comparison operators.  These
+     operations take two floating point operands and determine whether
+     the operands are unordered or are less than, less than or equal to,
+     greater than, greater than or equal to, or equal respectively.  For
+     example, `UNLT_EXPR' returns true if either operand is an IEEE NaN
+     or the first operand is less than the second.  With the possible
+     exception of `LTGT_EXPR', all of these operations are guaranteed
+     not to generate a floating point exception.  The result type of
+     these expressions will always be of integral or boolean type.
+     These operations return the result type's zero value for false,
+     and the result type's one value for true.
+
+`MODIFY_EXPR'
+     These nodes represent assignment.  The left-hand side is the first
+     operand; the right-hand side is the second operand.  The left-hand
+     side will be a `VAR_DECL', `INDIRECT_REF', `COMPONENT_REF', or
+     other lvalue.
+
+     These nodes are used to represent not only assignment with `=' but
+     also compound assignments (like `+='), by reduction to `='
+     assignment.  In other words, the representation for `i += 3' looks
+     just like that for `i = i + 3'.
+
+`INIT_EXPR'
+     These nodes are just like `MODIFY_EXPR', but are used only when a
+     variable is initialized, rather than assigned to subsequently.
+     This means that we can assume that the target of the
+     initialization is not used in computing its own value; any
+     reference to the lhs in computing the rhs is undefined.
+
+`COMPOUND_EXPR'
+     These nodes represent comma-expressions.  The first operand is an
+     expression whose value is computed and thrown away prior to the
+     evaluation of the second operand.  The value of the entire
+     expression is the value of the second operand.
+
+`COND_EXPR'
+     These nodes represent `?:' expressions.  The first operand is of
+     boolean or integral type.  If it evaluates to a nonzero value, the
+     second operand should be evaluated, and returned as the value of
+     the expression.  Otherwise, the third operand is evaluated, and
+     returned as the value of the expression.
+
+     The second operand must have the same type as the entire
+     expression, unless it unconditionally throws an exception or calls
+     a noreturn function, in which case it should have void type.  The
+     same constraints apply to the third operand.  This allows array
+     bounds checks to be represented conveniently as `(i >= 0 && i <
+     10) ? i : abort()'.
+
+     As a GNU extension, the C language front-ends allow the second
+     operand of the `?:' operator may be omitted in the source.  For
+     example, `x ? : 3' is equivalent to `x ? x : 3', assuming that `x'
+     is an expression without side-effects.  In the tree
+     representation, however, the second operand is always present,
+     possibly protected by `SAVE_EXPR' if the first argument does cause
+     side-effects.
+
+`CALL_EXPR'
+     These nodes are used to represent calls to functions, including
+     non-static member functions.  `CALL_EXPR's are implemented as
+     expression nodes with a variable number of operands.  Rather than
+     using `TREE_OPERAND' to extract them, it is preferable to use the
+     specialized accessor macros and functions that operate
+     specifically on `CALL_EXPR' nodes.
+
+     `CALL_EXPR_FN' returns a pointer to the function to call; it is
+     always an expression whose type is a `POINTER_TYPE'.
+
+     The number of arguments to the call is returned by
+     `call_expr_nargs', while the arguments themselves can be accessed
+     with the `CALL_EXPR_ARG' macro.  The arguments are zero-indexed
+     and numbered left-to-right.  You can iterate over the arguments
+     using `FOR_EACH_CALL_EXPR_ARG', as in:
+
+          tree call, arg;
+          call_expr_arg_iterator iter;
+          FOR_EACH_CALL_EXPR_ARG (arg, iter, call)
+            /* arg is bound to successive arguments of call.  */
+            ...;
+
+     For non-static member functions, there will be an operand
+     corresponding to the `this' pointer.  There will always be
+     expressions corresponding to all of the arguments, even if the
+     function is declared with default arguments and some arguments are
+     not explicitly provided at the call sites.
+
+     `CALL_EXPR's also have a `CALL_EXPR_STATIC_CHAIN' operand that is
+     used to implement nested functions.  This operand is otherwise
+     null.
+
+`CLEANUP_POINT_EXPR'
+     These nodes represent full-expressions.  The single operand is an
+     expression to evaluate.  Any destructor calls engendered by the
+     creation of temporaries during the evaluation of that expression
+     should be performed immediately after the expression is evaluated.
+
+`CONSTRUCTOR'
+     These nodes represent the brace-enclosed initializers for a
+     structure or array.  The first operand is reserved for use by the
+     back end.  The second operand is a `TREE_LIST'.  If the
+     `TREE_TYPE' of the `CONSTRUCTOR' is a `RECORD_TYPE' or
+     `UNION_TYPE', then the `TREE_PURPOSE' of each node in the
+     `TREE_LIST' will be a `FIELD_DECL' and the `TREE_VALUE' of each
+     node will be the expression used to initialize that field.
+
+     If the `TREE_TYPE' of the `CONSTRUCTOR' is an `ARRAY_TYPE', then
+     the `TREE_PURPOSE' of each element in the `TREE_LIST' will be an
+     `INTEGER_CST' or a `RANGE_EXPR' of two `INTEGER_CST's.  A single
+     `INTEGER_CST' indicates which element of the array (indexed from
+     zero) is being assigned to.  A `RANGE_EXPR' indicates an inclusive
+     range of elements to initialize.  In both cases the `TREE_VALUE'
+     is the corresponding initializer.  It is re-evaluated for each
+     element of a `RANGE_EXPR'.  If the `TREE_PURPOSE' is `NULL_TREE',
+     then the initializer is for the next available array element.
+
+     In the front end, you should not depend on the fields appearing in
+     any particular order.  However, in the middle end, fields must
+     appear in declaration order.  You should not assume that all
+     fields will be represented.  Unrepresented fields will be set to
+     zero.
+
+`COMPOUND_LITERAL_EXPR'
+     These nodes represent ISO C99 compound literals.  The
+     `COMPOUND_LITERAL_EXPR_DECL_EXPR' is a `DECL_EXPR' containing an
+     anonymous `VAR_DECL' for the unnamed object represented by the
+     compound literal; the `DECL_INITIAL' of that `VAR_DECL' is a
+     `CONSTRUCTOR' representing the brace-enclosed list of initializers
+     in the compound literal.  That anonymous `VAR_DECL' can also be
+     accessed directly by the `COMPOUND_LITERAL_EXPR_DECL' macro.
+
+`SAVE_EXPR'
+     A `SAVE_EXPR' represents an expression (possibly involving
+     side-effects) that is used more than once.  The side-effects should
+     occur only the first time the expression is evaluated.  Subsequent
+     uses should just reuse the computed value.  The first operand to
+     the `SAVE_EXPR' is the expression to evaluate.  The side-effects
+     should be executed where the `SAVE_EXPR' is first encountered in a
+     depth-first preorder traversal of the expression tree.
+
+`TARGET_EXPR'
+     A `TARGET_EXPR' represents a temporary object.  The first operand
+     is a `VAR_DECL' for the temporary variable.  The second operand is
+     the initializer for the temporary.  The initializer is evaluated
+     and, if non-void, copied (bitwise) into the temporary.  If the
+     initializer is void, that means that it will perform the
+     initialization itself.
+
+     Often, a `TARGET_EXPR' occurs on the right-hand side of an
+     assignment, or as the second operand to a comma-expression which is
+     itself the right-hand side of an assignment, etc.  In this case,
+     we say that the `TARGET_EXPR' is "normal"; otherwise, we say it is
+     "orphaned".  For a normal `TARGET_EXPR' the temporary variable
+     should be treated as an alias for the left-hand side of the
+     assignment, rather than as a new temporary variable.
+
+     The third operand to the `TARGET_EXPR', if present, is a
+     cleanup-expression (i.e., destructor call) for the temporary.  If
+     this expression is orphaned, then this expression must be executed
+     when the statement containing this expression is complete.  These
+     cleanups must always be executed in the order opposite to that in
+     which they were encountered.  Note that if a temporary is created
+     on one branch of a conditional operator (i.e., in the second or
+     third operand to a `COND_EXPR'), the cleanup must be run only if
+     that branch is actually executed.
+
+`VA_ARG_EXPR'
+     This node is used to implement support for the C/C++ variable
+     argument-list mechanism.  It represents expressions like `va_arg
+     (ap, type)'.  Its `TREE_TYPE' yields the tree representation for
+     `type' and its sole argument yields the representation for `ap'.
+
+
+
+File: gccint.info,  Node: Vectors,  Prev: Unary and Binary Expressions,  Up: Expression trees
+
+11.6.4 Vectors
+--------------
+
+`VEC_LSHIFT_EXPR'
+`VEC_RSHIFT_EXPR'
+     These nodes represent whole vector left and right shifts,
+     respectively.  The first operand is the vector to shift; it will
+     always be of vector type.  The second operand is an expression for
+     the number of bits by which to shift.  Note that the result is
+     undefined if the second operand is larger than or equal to the
+     first operand's type size.
+
+`VEC_WIDEN_MULT_HI_EXPR'
+`VEC_WIDEN_MULT_LO_EXPR'
+     These nodes represent widening vector multiplication of the high
+     and low parts of the two input vectors, respectively.  Their
+     operands are vectors that contain the same number of elements
+     (`N') of the same integral type.  The result is a vector that
+     contains half as many elements, of an integral type whose size is
+     twice as wide.  In the case of `VEC_WIDEN_MULT_HI_EXPR' the high
+     `N/2' elements of the two vector are multiplied to produce the
+     vector of `N/2' products. In the case of `VEC_WIDEN_MULT_LO_EXPR'
+     the low `N/2' elements of the two vector are multiplied to produce
+     the vector of `N/2' products.
+
+`VEC_UNPACK_HI_EXPR'
+`VEC_UNPACK_LO_EXPR'
+     These nodes represent unpacking of the high and low parts of the
+     input vector, respectively.  The single operand is a vector that
+     contains `N' elements of the same integral or floating point type.
+     The result is a vector that contains half as many elements, of an
+     integral or floating point type whose size is twice as wide.  In
+     the case of `VEC_UNPACK_HI_EXPR' the high `N/2' elements of the
+     vector are extracted and widened (promoted).  In the case of
+     `VEC_UNPACK_LO_EXPR' the low `N/2' elements of the vector are
+     extracted and widened (promoted).
+
+`VEC_UNPACK_FLOAT_HI_EXPR'
+`VEC_UNPACK_FLOAT_LO_EXPR'
+     These nodes represent unpacking of the high and low parts of the
+     input vector, where the values are converted from fixed point to
+     floating point.  The single operand is a vector that contains `N'
+     elements of the same integral type.  The result is a vector that
+     contains half as many elements of a floating point type whose size
+     is twice as wide.  In the case of `VEC_UNPACK_HI_EXPR' the high
+     `N/2' elements of the vector are extracted, converted and widened.
+     In the case of `VEC_UNPACK_LO_EXPR' the low `N/2' elements of the
+     vector are extracted, converted and widened.
+
+`VEC_PACK_TRUNC_EXPR'
+     This node represents packing of truncated elements of the two
+     input vectors into the output vector.  Input operands are vectors
+     that contain the same number of elements of the same integral or
+     floating point type.  The result is a vector that contains twice
+     as many elements of an integral or floating point type whose size
+     is half as wide. The elements of the two vectors are demoted and
+     merged (concatenated) to form the output vector.
+
+`VEC_PACK_SAT_EXPR'
+     This node represents packing of elements of the two input vectors
+     into the output vector using saturation.  Input operands are
+     vectors that contain the same number of elements of the same
+     integral type.  The result is a vector that contains twice as many
+     elements of an integral type whose size is half as wide.  The
+     elements of the two vectors are demoted and merged (concatenated)
+     to form the output vector.
+
+`VEC_PACK_FIX_TRUNC_EXPR'
+     This node represents packing of elements of the two input vectors
+     into the output vector, where the values are converted from
+     floating point to fixed point.  Input operands are vectors that
+     contain the same number of elements of a floating point type.  The
+     result is a vector that contains twice as many elements of an
+     integral type whose size is half as wide.  The elements of the two
+     vectors are merged (concatenated) to form the output vector.
+
+`VEC_EXTRACT_EVEN_EXPR'
+`VEC_EXTRACT_ODD_EXPR'
+     These nodes represent extracting of the even/odd elements of the
+     two input vectors, respectively. Their operands and result are
+     vectors that contain the same number of elements of the same type.
+
+`VEC_INTERLEAVE_HIGH_EXPR'
+`VEC_INTERLEAVE_LOW_EXPR'
+     These nodes represent merging and interleaving of the high/low
+     elements of the two input vectors, respectively. The operands and
+     the result are vectors that contain the same number of elements
+     (`N') of the same type.  In the case of
+     `VEC_INTERLEAVE_HIGH_EXPR', the high `N/2' elements of the first
+     input vector are interleaved with the high `N/2' elements of the
+     second input vector. In the case of `VEC_INTERLEAVE_LOW_EXPR', the
+     low `N/2' elements of the first input vector are interleaved with
+     the low `N/2' elements of the second input vector.
+
+
+
+File: gccint.info,  Node: Statements,  Next: Functions,  Prev: Expression trees,  Up: GENERIC
+
+11.7 Statements
+===============
+
+Most statements in GIMPLE are assignment statements, represented by
+`GIMPLE_ASSIGN'.  No other C expressions can appear at statement level;
+a reference to a volatile object is converted into a `GIMPLE_ASSIGN'.
+
+ There are also several varieties of complex statements.
+
+* Menu:
+
+* Basic Statements::
+* Blocks::
+* Statement Sequences::
+* Empty Statements::
+* Jumps::
+* Cleanups::
+* OpenMP::
+
+
+File: gccint.info,  Node: Basic Statements,  Next: Blocks,  Up: Statements
+
+11.7.1 Basic Statements
+-----------------------
+
+`ASM_EXPR'
+     Used to represent an inline assembly statement.  For an inline
+     assembly statement like:
+          asm ("mov x, y");
+     The `ASM_STRING' macro will return a `STRING_CST' node for `"mov
+     x, y"'.  If the original statement made use of the
+     extended-assembly syntax, then `ASM_OUTPUTS', `ASM_INPUTS', and
+     `ASM_CLOBBERS' will be the outputs, inputs, and clobbers for the
+     statement, represented as `STRING_CST' nodes.  The
+     extended-assembly syntax looks like:
+          asm ("fsinx %1,%0" : "=f" (result) : "f" (angle));
+     The first string is the `ASM_STRING', containing the instruction
+     template.  The next two strings are the output and inputs,
+     respectively; this statement has no clobbers.  As this example
+     indicates, "plain" assembly statements are merely a special case
+     of extended assembly statements; they have no cv-qualifiers,
+     outputs, inputs, or clobbers.  All of the strings will be
+     `NUL'-terminated, and will contain no embedded `NUL'-characters.
+
+     If the assembly statement is declared `volatile', or if the
+     statement was not an extended assembly statement, and is therefore
+     implicitly volatile, then the predicate `ASM_VOLATILE_P' will hold
+     of the `ASM_EXPR'.
+
+`DECL_EXPR'
+     Used to represent a local declaration.  The `DECL_EXPR_DECL' macro
+     can be used to obtain the entity declared.  This declaration may
+     be a `LABEL_DECL', indicating that the label declared is a local
+     label.  (As an extension, GCC allows the declaration of labels
+     with scope.)  In C, this declaration may be a `FUNCTION_DECL',
+     indicating the use of the GCC nested function extension.  For more
+     information, *note Functions::.
+
+`LABEL_EXPR'
+     Used to represent a label.  The `LABEL_DECL' declared by this
+     statement can be obtained with the `LABEL_EXPR_LABEL' macro.  The
+     `IDENTIFIER_NODE' giving the name of the label can be obtained from
+     the `LABEL_DECL' with `DECL_NAME'.
+
+`GOTO_EXPR'
+     Used to represent a `goto' statement.  The `GOTO_DESTINATION' will
+     usually be a `LABEL_DECL'.  However, if the "computed goto"
+     extension has been used, the `GOTO_DESTINATION' will be an
+     arbitrary expression indicating the destination.  This expression
+     will always have pointer type.
+
+`RETURN_EXPR'
+     Used to represent a `return' statement.  Operand 0 represents the
+     value to return.  It should either be the `RESULT_DECL' for the
+     containing function, or a `MODIFY_EXPR' or `INIT_EXPR' setting the
+     function's `RESULT_DECL'.  It will be `NULL_TREE' if the statement
+     was just
+          return;
+
+`LOOP_EXPR'
+     These nodes represent "infinite" loops.  The `LOOP_EXPR_BODY'
+     represents the body of the loop.  It should be executed forever,
+     unless an `EXIT_EXPR' is encountered.
+
+`EXIT_EXPR'
+     These nodes represent conditional exits from the nearest enclosing
+     `LOOP_EXPR'.  The single operand is the condition; if it is
+     nonzero, then the loop should be exited.  An `EXIT_EXPR' will only
+     appear within a `LOOP_EXPR'.
+
+`SWITCH_STMT'
+     Used to represent a `switch' statement.  The `SWITCH_STMT_COND' is
+     the expression on which the switch is occurring.  See the
+     documentation for an `IF_STMT' for more information on the
+     representation used for the condition.  The `SWITCH_STMT_BODY' is
+     the body of the switch statement.   The `SWITCH_STMT_TYPE' is the
+     original type of switch expression as given in the source, before
+     any compiler conversions.
+
+`CASE_LABEL_EXPR'
+     Use to represent a `case' label, range of `case' labels, or a
+     `default' label.  If `CASE_LOW' is `NULL_TREE', then this is a
+     `default' label.  Otherwise, if `CASE_HIGH' is `NULL_TREE', then
+     this is an ordinary `case' label.  In this case, `CASE_LOW' is an
+     expression giving the value of the label.  Both `CASE_LOW' and
+     `CASE_HIGH' are `INTEGER_CST' nodes.  These values will have the
+     same type as the condition expression in the switch statement.
+
+     Otherwise, if both `CASE_LOW' and `CASE_HIGH' are defined, the
+     statement is a range of case labels.  Such statements originate
+     with the extension that allows users to write things of the form:
+          case 2 ... 5:
+     The first value will be `CASE_LOW', while the second will be
+     `CASE_HIGH'.
+
+
+
+File: gccint.info,  Node: Blocks,  Next: Statement Sequences,  Prev: Basic Statements,  Up: Statements
+
+11.7.2 Blocks
+-------------
+
+Block scopes and the variables they declare in GENERIC are expressed
+using the `BIND_EXPR' code, which in previous versions of GCC was
+primarily used for the C statement-expression extension.
+
+ Variables in a block are collected into `BIND_EXPR_VARS' in
+declaration order through their `TREE_CHAIN' field.  Any runtime
+initialization is moved out of `DECL_INITIAL' and into a statement in
+the controlled block.  When gimplifying from C or C++, this
+initialization replaces the `DECL_STMT'.  These variables will never
+require cleanups.  The scope of these variables is just the body
+
+ Variable-length arrays (VLAs) complicate this process, as their size
+often refers to variables initialized earlier in the block.  To handle
+this, we currently split the block at that point, and move the VLA into
+a new, inner `BIND_EXPR'.  This strategy may change in the future.
+
+ A C++ program will usually contain more `BIND_EXPR's than there are
+syntactic blocks in the source code, since several C++ constructs have
+implicit scopes associated with them.  On the other hand, although the
+C++ front end uses pseudo-scopes to handle cleanups for objects with
+destructors, these don't translate into the GIMPLE form; multiple
+declarations at the same level use the same `BIND_EXPR'.
+
+
+File: gccint.info,  Node: Statement Sequences,  Next: Empty Statements,  Prev: Blocks,  Up: Statements
+
+11.7.3 Statement Sequences
+--------------------------
+
+Multiple statements at the same nesting level are collected into a
+`STATEMENT_LIST'.  Statement lists are modified and traversed using the
+interface in `tree-iterator.h'.
+
+
+File: gccint.info,  Node: Empty Statements,  Next: Jumps,  Prev: Statement Sequences,  Up: Statements
+
+11.7.4 Empty Statements
+-----------------------
+
+Whenever possible, statements with no effect are discarded.  But if
+they are nested within another construct which cannot be discarded for
+some reason, they are instead replaced with an empty statement,
+generated by `build_empty_stmt'.  Initially, all empty statements were
+shared, after the pattern of the Java front end, but this caused a lot
+of trouble in practice.
+
+ An empty statement is represented as `(void)0'.
+
+
+File: gccint.info,  Node: Jumps,  Next: Cleanups,  Prev: Empty Statements,  Up: Statements
+
+11.7.5 Jumps
+------------
+
+Other jumps are expressed by either `GOTO_EXPR' or `RETURN_EXPR'.
+
+ The operand of a `GOTO_EXPR' must be either a label or a variable
+containing the address to jump to.
+
+ The operand of a `RETURN_EXPR' is either `NULL_TREE', `RESULT_DECL',
+or a `MODIFY_EXPR' which sets the return value.  It would be nice to
+move the `MODIFY_EXPR' into a separate statement, but the special
+return semantics in `expand_return' make that difficult.  It may still
+happen in the future, perhaps by moving most of that logic into
+`expand_assignment'.
+
+
+File: gccint.info,  Node: Cleanups,  Next: OpenMP,  Prev: Jumps,  Up: Statements
+
+11.7.6 Cleanups
+---------------
+
+Destructors for local C++ objects and similar dynamic cleanups are
+represented in GIMPLE by a `TRY_FINALLY_EXPR'.  `TRY_FINALLY_EXPR' has
+two operands, both of which are a sequence of statements to execute.
+The first sequence is executed.  When it completes the second sequence
+is executed.
+
+ The first sequence may complete in the following ways:
+
+  1. Execute the last statement in the sequence and fall off the end.
+
+  2. Execute a goto statement (`GOTO_EXPR') to an ordinary label
+     outside the sequence.
+
+  3. Execute a return statement (`RETURN_EXPR').
+
+  4. Throw an exception.  This is currently not explicitly represented
+     in GIMPLE.
+
+
+ The second sequence is not executed if the first sequence completes by
+calling `setjmp' or `exit' or any other function that does not return.
+The second sequence is also not executed if the first sequence
+completes via a non-local goto or a computed goto (in general the
+compiler does not know whether such a goto statement exits the first
+sequence or not, so we assume that it doesn't).
+
+ After the second sequence is executed, if it completes normally by
+falling off the end, execution continues wherever the first sequence
+would have continued, by falling off the end, or doing a goto, etc.
+
+ `TRY_FINALLY_EXPR' complicates the flow graph, since the cleanup needs
+to appear on every edge out of the controlled block; this reduces the
+freedom to move code across these edges.  Therefore, the EH lowering
+pass which runs before most of the optimization passes eliminates these
+expressions by explicitly adding the cleanup to each edge.  Rethrowing
+the exception is represented using `RESX_EXPR'.
+
+
+File: gccint.info,  Node: OpenMP,  Prev: Cleanups,  Up: Statements
+
+11.7.7 OpenMP
+-------------
+
+All the statements starting with `OMP_' represent directives and
+clauses used by the OpenMP API `http://www.openmp.org/'.
+
+`OMP_PARALLEL'
+     Represents `#pragma omp parallel [clause1 ... clauseN]'. It has
+     four operands:
+
+     Operand `OMP_PARALLEL_BODY' is valid while in GENERIC and High
+     GIMPLE forms.  It contains the body of code to be executed by all
+     the threads.  During GIMPLE lowering, this operand becomes `NULL'
+     and the body is emitted linearly after `OMP_PARALLEL'.
+
+     Operand `OMP_PARALLEL_CLAUSES' is the list of clauses associated
+     with the directive.
+
+     Operand `OMP_PARALLEL_FN' is created by `pass_lower_omp', it
+     contains the `FUNCTION_DECL' for the function that will contain
+     the body of the parallel region.
+
+     Operand `OMP_PARALLEL_DATA_ARG' is also created by
+     `pass_lower_omp'. If there are shared variables to be communicated
+     to the children threads, this operand will contain the `VAR_DECL'
+     that contains all the shared values and variables.
+
+`OMP_FOR'
+     Represents `#pragma omp for [clause1 ... clauseN]'.  It has 5
+     operands:
+
+     Operand `OMP_FOR_BODY' contains the loop body.
+
+     Operand `OMP_FOR_CLAUSES' is the list of clauses associated with
+     the directive.
+
+     Operand `OMP_FOR_INIT' is the loop initialization code of the form
+     `VAR = N1'.
+
+     Operand `OMP_FOR_COND' is the loop conditional expression of the
+     form `VAR {<,>,<=,>=} N2'.
+
+     Operand `OMP_FOR_INCR' is the loop index increment of the form
+     `VAR {+=,-=} INCR'.
+
+     Operand `OMP_FOR_PRE_BODY' contains side-effect code from operands
+     `OMP_FOR_INIT', `OMP_FOR_COND' and `OMP_FOR_INC'.  These
+     side-effects are part of the `OMP_FOR' block but must be evaluated
+     before the start of loop body.
+
+     The loop index variable `VAR' must be a signed integer variable,
+     which is implicitly private to each thread.  Bounds `N1' and `N2'
+     and the increment expression `INCR' are required to be loop
+     invariant integer expressions that are evaluated without any
+     synchronization. The evaluation order, frequency of evaluation and
+     side-effects are unspecified by the standard.
+
+`OMP_SECTIONS'
+     Represents `#pragma omp sections [clause1 ... clauseN]'.
+
+     Operand `OMP_SECTIONS_BODY' contains the sections body, which in
+     turn contains a set of `OMP_SECTION' nodes for each of the
+     concurrent sections delimited by `#pragma omp section'.
+
+     Operand `OMP_SECTIONS_CLAUSES' is the list of clauses associated
+     with the directive.
+
+`OMP_SECTION'
+     Section delimiter for `OMP_SECTIONS'.
+
+`OMP_SINGLE'
+     Represents `#pragma omp single'.
+
+     Operand `OMP_SINGLE_BODY' contains the body of code to be executed
+     by a single thread.
+
+     Operand `OMP_SINGLE_CLAUSES' is the list of clauses associated
+     with the directive.
+
+`OMP_MASTER'
+     Represents `#pragma omp master'.
+
+     Operand `OMP_MASTER_BODY' contains the body of code to be executed
+     by the master thread.
+
+`OMP_ORDERED'
+     Represents `#pragma omp ordered'.
+
+     Operand `OMP_ORDERED_BODY' contains the body of code to be
+     executed in the sequential order dictated by the loop index
+     variable.
+
+`OMP_CRITICAL'
+     Represents `#pragma omp critical [name]'.
+
+     Operand `OMP_CRITICAL_BODY' is the critical section.
+
+     Operand `OMP_CRITICAL_NAME' is an optional identifier to label the
+     critical section.
+
+`OMP_RETURN'
+     This does not represent any OpenMP directive, it is an artificial
+     marker to indicate the end of the body of an OpenMP. It is used by
+     the flow graph (`tree-cfg.c') and OpenMP region building code
+     (`omp-low.c').
+
+`OMP_CONTINUE'
+     Similarly, this instruction does not represent an OpenMP
+     directive, it is used by `OMP_FOR' and `OMP_SECTIONS' to mark the
+     place where the code needs to loop to the next iteration (in the
+     case of `OMP_FOR') or the next section (in the case of
+     `OMP_SECTIONS').
+
+     In some cases, `OMP_CONTINUE' is placed right before `OMP_RETURN'.
+     But if there are cleanups that need to occur right after the
+     looping body, it will be emitted between `OMP_CONTINUE' and
+     `OMP_RETURN'.
+
+`OMP_ATOMIC'
+     Represents `#pragma omp atomic'.
+
+     Operand 0 is the address at which the atomic operation is to be
+     performed.
+
+     Operand 1 is the expression to evaluate.  The gimplifier tries
+     three alternative code generation strategies.  Whenever possible,
+     an atomic update built-in is used.  If that fails, a
+     compare-and-swap loop is attempted.  If that also fails, a regular
+     critical section around the expression is used.
+
+`OMP_CLAUSE'
+     Represents clauses associated with one of the `OMP_' directives.
+     Clauses are represented by separate sub-codes defined in `tree.h'.
+     Clauses codes can be one of: `OMP_CLAUSE_PRIVATE',
+     `OMP_CLAUSE_SHARED', `OMP_CLAUSE_FIRSTPRIVATE',
+     `OMP_CLAUSE_LASTPRIVATE', `OMP_CLAUSE_COPYIN',
+     `OMP_CLAUSE_COPYPRIVATE', `OMP_CLAUSE_IF',
+     `OMP_CLAUSE_NUM_THREADS', `OMP_CLAUSE_SCHEDULE',
+     `OMP_CLAUSE_NOWAIT', `OMP_CLAUSE_ORDERED', `OMP_CLAUSE_DEFAULT',
+     and `OMP_CLAUSE_REDUCTION'.  Each code represents the
+     corresponding OpenMP clause.
+
+     Clauses associated with the same directive are chained together
+     via `OMP_CLAUSE_CHAIN'. Those clauses that accept a list of
+     variables are restricted to exactly one, accessed with
+     `OMP_CLAUSE_VAR'.  Therefore, multiple variables under the same
+     clause `C' need to be represented as multiple `C' clauses chained
+     together.  This facilitates adding new clauses during compilation.
+
+
+
+File: gccint.info,  Node: Functions,  Next: Language-dependent trees,  Prev: Statements,  Up: GENERIC
+
+11.8 Functions
+==============
+
+A function is represented by a `FUNCTION_DECL' node.  It stores the
+basic pieces of the function such as body, parameters, and return type
+as well as information on the surrounding context, visibility, and
+linkage.
+
+* Menu:
+
+* Function Basics::     Function names, body, and parameters.
+* Function Properties:: Context, linkage, etc.
+
+
+File: gccint.info,  Node: Function Basics,  Next: Function Properties,  Up: Functions
+
+11.8.1 Function Basics
+----------------------
+
+A function has four core parts: the name, the parameters, the result,
+and the body.  The following macros and functions access these parts of
+a `FUNCTION_DECL' as well as other basic features:
+`DECL_NAME'
+     This macro returns the unqualified name of the function, as an
+     `IDENTIFIER_NODE'.  For an instantiation of a function template,
+     the `DECL_NAME' is the unqualified name of the template, not
+     something like `f<int>'.  The value of `DECL_NAME' is undefined
+     when used on a constructor, destructor, overloaded operator, or
+     type-conversion operator, or any function that is implicitly
+     generated by the compiler.  See below for macros that can be used
+     to distinguish these cases.
+
+`DECL_ASSEMBLER_NAME'
+     This macro returns the mangled name of the function, also an
+     `IDENTIFIER_NODE'.  This name does not contain leading underscores
+     on systems that prefix all identifiers with underscores.  The
+     mangled name is computed in the same way on all platforms; if
+     special processing is required to deal with the object file format
+     used on a particular platform, it is the responsibility of the
+     back end to perform those modifications.  (Of course, the back end
+     should not modify `DECL_ASSEMBLER_NAME' itself.)
+
+     Using `DECL_ASSEMBLER_NAME' will cause additional memory to be
+     allocated (for the mangled name of the entity) so it should be used
+     only when emitting assembly code.  It should not be used within the
+     optimizers to determine whether or not two declarations are the
+     same, even though some of the existing optimizers do use it in
+     that way.  These uses will be removed over time.
+
+`DECL_ARGUMENTS'
+     This macro returns the `PARM_DECL' for the first argument to the
+     function.  Subsequent `PARM_DECL' nodes can be obtained by
+     following the `TREE_CHAIN' links.
+
+`DECL_RESULT'
+     This macro returns the `RESULT_DECL' for the function.
+
+`DECL_SAVED_TREE'
+     This macro returns the complete body of the function.
+
+`TREE_TYPE'
+     This macro returns the `FUNCTION_TYPE' or `METHOD_TYPE' for the
+     function.
+
+`DECL_INITIAL'
+     A function that has a definition in the current translation unit
+     will have a non-`NULL' `DECL_INITIAL'.  However, back ends should
+     not make use of the particular value given by `DECL_INITIAL'.
+
+     It should contain a tree of `BLOCK' nodes that mirrors the scopes
+     that variables are bound in the function.  Each block contains a
+     list of decls declared in a basic block, a pointer to a chain of
+     blocks at the next lower scope level, then a pointer to the next
+     block at the same level and a backpointer to the parent `BLOCK' or
+     `FUNCTION_DECL'.  So given a function as follows:
+
+          void foo()
+          {
+            int a;
+            {
+              int b;
+            }
+            int c;
+          }
+
+     you would get the following:
+
+          tree foo = FUNCTION_DECL;
+          tree decl_a = VAR_DECL;
+          tree decl_b = VAR_DECL;
+          tree decl_c = VAR_DECL;
+          tree block_a = BLOCK;
+          tree block_b = BLOCK;
+          tree block_c = BLOCK;
+          BLOCK_VARS(block_a) = decl_a;
+          BLOCK_SUBBLOCKS(block_a) = block_b;
+          BLOCK_CHAIN(block_a) = block_c;
+          BLOCK_SUPERCONTEXT(block_a) = foo;
+          BLOCK_VARS(block_b) = decl_b;
+          BLOCK_SUPERCONTEXT(block_b) = block_a;
+          BLOCK_VARS(block_c) = decl_c;
+          BLOCK_SUPERCONTEXT(block_c) = foo;
+          DECL_INITIAL(foo) = block_a;
+
+
+
+File: gccint.info,  Node: Function Properties,  Prev: Function Basics,  Up: Functions
+
+11.8.2 Function Properties
+--------------------------
+
+To determine the scope of a function, you can use the `DECL_CONTEXT'
+macro.  This macro will return the class (either a `RECORD_TYPE' or a
+`UNION_TYPE') or namespace (a `NAMESPACE_DECL') of which the function
+is a member.  For a virtual function, this macro returns the class in
+which the function was actually defined, not the base class in which
+the virtual declaration occurred.
+
+ In C, the `DECL_CONTEXT' for a function maybe another function.  This
+representation indicates that the GNU nested function extension is in
+use.  For details on the semantics of nested functions, see the GCC
+Manual.  The nested function can refer to local variables in its
+containing function.  Such references are not explicitly marked in the
+tree structure; back ends must look at the `DECL_CONTEXT' for the
+referenced `VAR_DECL'.  If the `DECL_CONTEXT' for the referenced
+`VAR_DECL' is not the same as the function currently being processed,
+and neither `DECL_EXTERNAL' nor `TREE_STATIC' hold, then the reference
+is to a local variable in a containing function, and the back end must
+take appropriate action.
+
+`DECL_EXTERNAL'
+     This predicate holds if the function is undefined.
+
+`TREE_PUBLIC'
+     This predicate holds if the function has external linkage.
+
+`TREE_STATIC'
+     This predicate holds if the function has been defined.
+
+`TREE_THIS_VOLATILE'
+     This predicate holds if the function does not return normally.
+
+`TREE_READONLY'
+     This predicate holds if the function can only read its arguments.
+
+`DECL_PURE_P'
+     This predicate holds if the function can only read its arguments,
+     but may also read global memory.
+
+`DECL_VIRTUAL_P'
+     This predicate holds if the function is virtual.
+
+`DECL_ARTIFICIAL'
+     This macro holds if the function was implicitly generated by the
+     compiler, rather than explicitly declared.  In addition to
+     implicitly generated class member functions, this macro holds for
+     the special functions created to implement static initialization
+     and destruction, to compute run-time type information, and so
+     forth.
+
+`DECL_FUNCTION_SPECIFIC_TARGET'
+     This macro returns a tree node that holds the target options that
+     are to be used to compile this particular function or `NULL_TREE'
+     if the function is to be compiled with the target options
+     specified on the command line.
+
+`DECL_FUNCTION_SPECIFIC_OPTIMIZATION'
+     This macro returns a tree node that holds the optimization options
+     that are to be used to compile this particular function or
+     `NULL_TREE' if the function is to be compiled with the
+     optimization options specified on the command line.
+
+
+
+File: gccint.info,  Node: Language-dependent trees,  Next: C and C++ Trees,  Prev: Functions,  Up: GENERIC
+
+11.9 Language-dependent trees
+=============================
+
+Front ends may wish to keep some state associated with various GENERIC
+trees while parsing.  To support this, trees provide a set of flags
+that may be used by the front end.  They are accessed using
+`TREE_LANG_FLAG_n' where `n' is currently 0 through 6.
+
+ If necessary, a front end can use some language-dependent tree codes
+in its GENERIC representation, so long as it provides a hook for
+converting them to GIMPLE and doesn't expect them to work with any
+(hypothetical) optimizers that run before the conversion to GIMPLE. The
+intermediate representation used while parsing C and C++ looks very
+little like GENERIC, but the C and C++ gimplifier hooks are perfectly
+happy to take it as input and spit out GIMPLE.
+
+
+File: gccint.info,  Node: C and C++ Trees,  Next: Java Trees,  Prev: Language-dependent trees,  Up: GENERIC
+
+11.10 C and C++ Trees
+=====================
+
+This section documents the internal representation used by GCC to
+represent C and C++ source programs.  When presented with a C or C++
+source program, GCC parses the program, performs semantic analysis
+(including the generation of error messages), and then produces the
+internal representation described here.  This representation contains a
+complete representation for the entire translation unit provided as
+input to the front end.  This representation is then typically processed
+by a code-generator in order to produce machine code, but could also be
+used in the creation of source browsers, intelligent editors, automatic
+documentation generators, interpreters, and any other programs needing
+the ability to process C or C++ code.
+
+ This section explains the internal representation.  In particular, it
+documents the internal representation for C and C++ source constructs,
+and the macros, functions, and variables that can be used to access
+these constructs.  The C++ representation is largely a superset of the
+representation used in the C front end.  There is only one construct
+used in C that does not appear in the C++ front end and that is the GNU
+"nested function" extension.  Many of the macros documented here do not
+apply in C because the corresponding language constructs do not appear
+in C.
+
+ The C and C++ front ends generate a mix of GENERIC trees and ones
+specific to C and C++.  These language-specific trees are higher-level
+constructs than the ones in GENERIC to make the parser's job easier.
+This section describes those trees that aren't part of GENERIC as well
+as aspects of GENERIC trees that are treated in a language-specific
+manner.
+
+ If you are developing a "back end", be it is a code-generator or some
+other tool, that uses this representation, you may occasionally find
+that you need to ask questions not easily answered by the functions and
+macros available here.  If that situation occurs, it is quite likely
+that GCC already supports the functionality you desire, but that the
+interface is simply not documented here.  In that case, you should ask
+the GCC maintainers (via mail to <gcc@gcc.gnu.org>) about documenting
+the functionality you require.  Similarly, if you find yourself writing
+functions that do not deal directly with your back end, but instead
+might be useful to other people using the GCC front end, you should
+submit your patches for inclusion in GCC.
+
+* Menu:
+
+* Types for C++::               Fundamental and aggregate types.
+* Namespaces::                  Namespaces.
+* Classes::                     Classes.
+* Functions for C++::           Overloading and accessors for C++.
+* Statements for C++::          Statements specific to C and C++.
+* C++ Expressions::    From `typeid' to `throw'.
+
+
+File: gccint.info,  Node: Types for C++,  Next: Namespaces,  Up: C and C++ Trees
+
+11.10.1 Types for C++
+---------------------
+
+In C++, an array type is not qualified; rather the type of the array
+elements is qualified.  This situation is reflected in the intermediate
+representation.  The macros described here will always examine the
+qualification of the underlying element type when applied to an array
+type.  (If the element type is itself an array, then the recursion
+continues until a non-array type is found, and the qualification of this
+type is examined.)  So, for example, `CP_TYPE_CONST_P' will hold of the
+type `const int ()[7]', denoting an array of seven `int's.
+
+ The following functions and macros deal with cv-qualification of types:
+`CP_TYPE_QUALS'
+     This macro returns the set of type qualifiers applied to this type.
+     This value is `TYPE_UNQUALIFIED' if no qualifiers have been
+     applied.  The `TYPE_QUAL_CONST' bit is set if the type is
+     `const'-qualified.  The `TYPE_QUAL_VOLATILE' bit is set if the
+     type is `volatile'-qualified.  The `TYPE_QUAL_RESTRICT' bit is set
+     if the type is `restrict'-qualified.
+
+`CP_TYPE_CONST_P'
+     This macro holds if the type is `const'-qualified.
+
+`CP_TYPE_VOLATILE_P'
+     This macro holds if the type is `volatile'-qualified.
+
+`CP_TYPE_RESTRICT_P'
+     This macro holds if the type is `restrict'-qualified.
+
+`CP_TYPE_CONST_NON_VOLATILE_P'
+     This predicate holds for a type that is `const'-qualified, but
+     _not_ `volatile'-qualified; other cv-qualifiers are ignored as
+     well: only the `const'-ness is tested.
+
+
+ A few other macros and functions are usable with all types:
+`TYPE_SIZE'
+     The number of bits required to represent the type, represented as
+     an `INTEGER_CST'.  For an incomplete type, `TYPE_SIZE' will be
+     `NULL_TREE'.
+
+`TYPE_ALIGN'
+     The alignment of the type, in bits, represented as an `int'.
+
+`TYPE_NAME'
+     This macro returns a declaration (in the form of a `TYPE_DECL') for
+     the type.  (Note this macro does _not_ return an
+     `IDENTIFIER_NODE', as you might expect, given its name!)  You can
+     look at the `DECL_NAME' of the `TYPE_DECL' to obtain the actual
+     name of the type.  The `TYPE_NAME' will be `NULL_TREE' for a type
+     that is not a built-in type, the result of a typedef, or a named
+     class type.
+
+`CP_INTEGRAL_TYPE'
+     This predicate holds if the type is an integral type.  Notice that
+     in C++, enumerations are _not_ integral types.
+
+`ARITHMETIC_TYPE_P'
+     This predicate holds if the type is an integral type (in the C++
+     sense) or a floating point type.
+
+`CLASS_TYPE_P'
+     This predicate holds for a class-type.
+
+`TYPE_BUILT_IN'
+     This predicate holds for a built-in type.
+
+`TYPE_PTRMEM_P'
+     This predicate holds if the type is a pointer to data member.
+
+`TYPE_PTR_P'
+     This predicate holds if the type is a pointer type, and the
+     pointee is not a data member.
+
+`TYPE_PTRFN_P'
+     This predicate holds for a pointer to function type.
+
+`TYPE_PTROB_P'
+     This predicate holds for a pointer to object type.  Note however
+     that it does not hold for the generic pointer to object type `void
+     *'.  You may use `TYPE_PTROBV_P' to test for a pointer to object
+     type as well as `void *'.
+
+
+ The table below describes types specific to C and C++ as well as
+language-dependent info about GENERIC types.
+
+`POINTER_TYPE'
+     Used to represent pointer types, and pointer to data member types.
+     If `TREE_TYPE' is a pointer to data member type, then
+     `TYPE_PTRMEM_P' will hold.  For a pointer to data member type of
+     the form `T X::*', `TYPE_PTRMEM_CLASS_TYPE' will be the type `X',
+     while `TYPE_PTRMEM_POINTED_TO_TYPE' will be the type `T'.
+
+`RECORD_TYPE'
+     Used to represent `struct' and `class' types in C and C++.  If
+     `TYPE_PTRMEMFUNC_P' holds, then this type is a pointer-to-member
+     type.  In that case, the `TYPE_PTRMEMFUNC_FN_TYPE' is a
+     `POINTER_TYPE' pointing to a `METHOD_TYPE'.  The `METHOD_TYPE' is
+     the type of a function pointed to by the pointer-to-member
+     function.  If `TYPE_PTRMEMFUNC_P' does not hold, this type is a
+     class type.  For more information, *note Classes::.
+
+`UNKNOWN_TYPE'
+     This node is used to represent a type the knowledge of which is
+     insufficient for a sound processing.
+
+`TYPENAME_TYPE'
+     Used to represent a construct of the form `typename T::A'.  The
+     `TYPE_CONTEXT' is `T'; the `TYPE_NAME' is an `IDENTIFIER_NODE' for
+     `A'.  If the type is specified via a template-id, then
+     `TYPENAME_TYPE_FULLNAME' yields a `TEMPLATE_ID_EXPR'.  The
+     `TREE_TYPE' is non-`NULL' if the node is implicitly generated in
+     support for the implicit typename extension; in which case the
+     `TREE_TYPE' is a type node for the base-class.
+
+`TYPEOF_TYPE'
+     Used to represent the `__typeof__' extension.  The `TYPE_FIELDS'
+     is the expression the type of which is being represented.
+
+
+
+File: gccint.info,  Node: Namespaces,  Next: Classes,  Prev: Types for C++,  Up: C and C++ Trees
+
+11.10.2 Namespaces
+------------------
+
+The root of the entire intermediate representation is the variable
+`global_namespace'.  This is the namespace specified with `::' in C++
+source code.  All other namespaces, types, variables, functions, and so
+forth can be found starting with this namespace.
+
+ However, except for the fact that it is distinguished as the root of
+the representation, the global namespace is no different from any other
+namespace.  Thus, in what follows, we describe namespaces generally,
+rather than the global namespace in particular.
+
+ A namespace is represented by a `NAMESPACE_DECL' node.
+
+ The following macros and functions can be used on a `NAMESPACE_DECL':
+
+`DECL_NAME'
+     This macro is used to obtain the `IDENTIFIER_NODE' corresponding to
+     the unqualified name of the name of the namespace (*note
+     Identifiers::).  The name of the global namespace is `::', even
+     though in C++ the global namespace is unnamed.  However, you
+     should use comparison with `global_namespace', rather than
+     `DECL_NAME' to determine whether or not a namespace is the global
+     one.  An unnamed namespace will have a `DECL_NAME' equal to
+     `anonymous_namespace_name'.  Within a single translation unit, all
+     unnamed namespaces will have the same name.
+
+`DECL_CONTEXT'
+     This macro returns the enclosing namespace.  The `DECL_CONTEXT' for
+     the `global_namespace' is `NULL_TREE'.
+
+`DECL_NAMESPACE_ALIAS'
+     If this declaration is for a namespace alias, then
+     `DECL_NAMESPACE_ALIAS' is the namespace for which this one is an
+     alias.
+
+     Do not attempt to use `cp_namespace_decls' for a namespace which is
+     an alias.  Instead, follow `DECL_NAMESPACE_ALIAS' links until you
+     reach an ordinary, non-alias, namespace, and call
+     `cp_namespace_decls' there.
+
+`DECL_NAMESPACE_STD_P'
+     This predicate holds if the namespace is the special `::std'
+     namespace.
+
+`cp_namespace_decls'
+     This function will return the declarations contained in the
+     namespace, including types, overloaded functions, other
+     namespaces, and so forth.  If there are no declarations, this
+     function will return `NULL_TREE'.  The declarations are connected
+     through their `TREE_CHAIN' fields.
+
+     Although most entries on this list will be declarations,
+     `TREE_LIST' nodes may also appear.  In this case, the `TREE_VALUE'
+     will be an `OVERLOAD'.  The value of the `TREE_PURPOSE' is
+     unspecified; back ends should ignore this value.  As with the
+     other kinds of declarations returned by `cp_namespace_decls', the
+     `TREE_CHAIN' will point to the next declaration in this list.
+
+     For more information on the kinds of declarations that can occur
+     on this list, *Note Declarations::.  Some declarations will not
+     appear on this list.  In particular, no `FIELD_DECL',
+     `LABEL_DECL', or `PARM_DECL' nodes will appear here.
+
+     This function cannot be used with namespaces that have
+     `DECL_NAMESPACE_ALIAS' set.
+
+
+
+File: gccint.info,  Node: Classes,  Next: Functions for C++,  Prev: Namespaces,  Up: C and C++ Trees
+
+11.10.3 Classes
+---------------
+
+Besides namespaces, the other high-level scoping construct in C++ is the
+class.  (Throughout this manual the term "class" is used to mean the
+types referred to in the ANSI/ISO C++ Standard as classes; these include
+types defined with the `class', `struct', and `union' keywords.)
+
+ A class type is represented by either a `RECORD_TYPE' or a
+`UNION_TYPE'.  A class declared with the `union' tag is represented by
+a `UNION_TYPE', while classes declared with either the `struct' or the
+`class' tag are represented by `RECORD_TYPE's.  You can use the
+`CLASSTYPE_DECLARED_CLASS' macro to discern whether or not a particular
+type is a `class' as opposed to a `struct'.  This macro will be true
+only for classes declared with the `class' tag.
+
+ Almost all non-function members are available on the `TYPE_FIELDS'
+list.  Given one member, the next can be found by following the
+`TREE_CHAIN'.  You should not depend in any way on the order in which
+fields appear on this list.  All nodes on this list will be `DECL'
+nodes.  A `FIELD_DECL' is used to represent a non-static data member, a
+`VAR_DECL' is used to represent a static data member, and a `TYPE_DECL'
+is used to represent a type.  Note that the `CONST_DECL' for an
+enumeration constant will appear on this list, if the enumeration type
+was declared in the class.  (Of course, the `TYPE_DECL' for the
+enumeration type will appear here as well.)  There are no entries for
+base classes on this list.  In particular, there is no `FIELD_DECL' for
+the "base-class portion" of an object.
+
+ The `TYPE_VFIELD' is a compiler-generated field used to point to
+virtual function tables.  It may or may not appear on the `TYPE_FIELDS'
+list.  However, back ends should handle the `TYPE_VFIELD' just like all
+the entries on the `TYPE_FIELDS' list.
+
+ The function members are available on the `TYPE_METHODS' list.  Again,
+subsequent members are found by following the `TREE_CHAIN' field.  If a
+function is overloaded, each of the overloaded functions appears; no
+`OVERLOAD' nodes appear on the `TYPE_METHODS' list.  Implicitly
+declared functions (including default constructors, copy constructors,
+assignment operators, and destructors) will appear on this list as well.
+
+ Every class has an associated "binfo", which can be obtained with
+`TYPE_BINFO'.  Binfos are used to represent base-classes.  The binfo
+given by `TYPE_BINFO' is the degenerate case, whereby every class is
+considered to be its own base-class.  The base binfos for a particular
+binfo are held in a vector, whose length is obtained with
+`BINFO_N_BASE_BINFOS'.  The base binfos themselves are obtained with
+`BINFO_BASE_BINFO' and `BINFO_BASE_ITERATE'.  To add a new binfo, use
+`BINFO_BASE_APPEND'.  The vector of base binfos can be obtained with
+`BINFO_BASE_BINFOS', but normally you do not need to use that.  The
+class type associated with a binfo is given by `BINFO_TYPE'.  It is not
+always the case that `BINFO_TYPE (TYPE_BINFO (x))', because of typedefs
+and qualified types.  Neither is it the case that `TYPE_BINFO
+(BINFO_TYPE (y))' is the same binfo as `y'.  The reason is that if `y'
+is a binfo representing a base-class `B' of a derived class `D', then
+`BINFO_TYPE (y)' will be `B', and `TYPE_BINFO (BINFO_TYPE (y))' will be
+`B' as its own base-class, rather than as a base-class of `D'.
+
+ The access to a base type can be found with `BINFO_BASE_ACCESS'.  This
+will produce `access_public_node', `access_private_node' or
+`access_protected_node'.  If bases are always public,
+`BINFO_BASE_ACCESSES' may be `NULL'.
+
+ `BINFO_VIRTUAL_P' is used to specify whether the binfo is inherited
+virtually or not.  The other flags, `BINFO_MARKED_P' and `BINFO_FLAG_1'
+to `BINFO_FLAG_6' can be used for language specific use.
+
+ The following macros can be used on a tree node representing a
+class-type.
+
+`LOCAL_CLASS_P'
+     This predicate holds if the class is local class _i.e._ declared
+     inside a function body.
+
+`TYPE_POLYMORPHIC_P'
+     This predicate holds if the class has at least one virtual function
+     (declared or inherited).
+
+`TYPE_HAS_DEFAULT_CONSTRUCTOR'
+     This predicate holds whenever its argument represents a class-type
+     with default constructor.
+
+`CLASSTYPE_HAS_MUTABLE'
+`TYPE_HAS_MUTABLE_P'
+     These predicates hold for a class-type having a mutable data
+     member.
+
+`CLASSTYPE_NON_POD_P'
+     This predicate holds only for class-types that are not PODs.
+
+`TYPE_HAS_NEW_OPERATOR'
+     This predicate holds for a class-type that defines `operator new'.
+
+`TYPE_HAS_ARRAY_NEW_OPERATOR'
+     This predicate holds for a class-type for which `operator new[]'
+     is defined.
+
+`TYPE_OVERLOADS_CALL_EXPR'
+     This predicate holds for class-type for which the function call
+     `operator()' is overloaded.
+
+`TYPE_OVERLOADS_ARRAY_REF'
+     This predicate holds for a class-type that overloads `operator[]'
+
+`TYPE_OVERLOADS_ARROW'
+     This predicate holds for a class-type for which `operator->' is
+     overloaded.
+
+
+
+File: gccint.info,  Node: Functions for C++,  Next: Statements for C++,  Prev: Classes,  Up: C and C++ Trees
+
+11.10.4 Functions for C++
+-------------------------
+
+A function is represented by a `FUNCTION_DECL' node.  A set of
+overloaded functions is sometimes represented by an `OVERLOAD' node.
+
+ An `OVERLOAD' node is not a declaration, so none of the `DECL_' macros
+should be used on an `OVERLOAD'.  An `OVERLOAD' node is similar to a
+`TREE_LIST'.  Use `OVL_CURRENT' to get the function associated with an
+`OVERLOAD' node; use `OVL_NEXT' to get the next `OVERLOAD' node in the
+list of overloaded functions.  The macros `OVL_CURRENT' and `OVL_NEXT'
+are actually polymorphic; you can use them to work with `FUNCTION_DECL'
+nodes as well as with overloads.  In the case of a `FUNCTION_DECL',
+`OVL_CURRENT' will always return the function itself, and `OVL_NEXT'
+will always be `NULL_TREE'.
+
+ To determine the scope of a function, you can use the `DECL_CONTEXT'
+macro.  This macro will return the class (either a `RECORD_TYPE' or a
+`UNION_TYPE') or namespace (a `NAMESPACE_DECL') of which the function
+is a member.  For a virtual function, this macro returns the class in
+which the function was actually defined, not the base class in which
+the virtual declaration occurred.
+
+ If a friend function is defined in a class scope, the
+`DECL_FRIEND_CONTEXT' macro can be used to determine the class in which
+it was defined.  For example, in
+     class C { friend void f() {} };
+ the `DECL_CONTEXT' for `f' will be the `global_namespace', but the
+`DECL_FRIEND_CONTEXT' will be the `RECORD_TYPE' for `C'.
+
+ The following macros and functions can be used on a `FUNCTION_DECL':
+`DECL_MAIN_P'
+     This predicate holds for a function that is the program entry point
+     `::code'.
+
+`DECL_LOCAL_FUNCTION_P'
+     This predicate holds if the function was declared at block scope,
+     even though it has a global scope.
+
+`DECL_ANTICIPATED'
+     This predicate holds if the function is a built-in function but its
+     prototype is not yet explicitly declared.
+
+`DECL_EXTERN_C_FUNCTION_P'
+     This predicate holds if the function is declared as an ``extern
+     "C"'' function.
+
+`DECL_LINKONCE_P'
+     This macro holds if multiple copies of this function may be
+     emitted in various translation units.  It is the responsibility of
+     the linker to merge the various copies.  Template instantiations
+     are the most common example of functions for which
+     `DECL_LINKONCE_P' holds; G++ instantiates needed templates in all
+     translation units which require them, and then relies on the
+     linker to remove duplicate instantiations.
+
+     FIXME: This macro is not yet implemented.
+
+`DECL_FUNCTION_MEMBER_P'
+     This macro holds if the function is a member of a class, rather
+     than a member of a namespace.
+
+`DECL_STATIC_FUNCTION_P'
+     This predicate holds if the function a static member function.
+
+`DECL_NONSTATIC_MEMBER_FUNCTION_P'
+     This macro holds for a non-static member function.
+
+`DECL_CONST_MEMFUNC_P'
+     This predicate holds for a `const'-member function.
+
+`DECL_VOLATILE_MEMFUNC_P'
+     This predicate holds for a `volatile'-member function.
+
+`DECL_CONSTRUCTOR_P'
+     This macro holds if the function is a constructor.
+
+`DECL_NONCONVERTING_P'
+     This predicate holds if the constructor is a non-converting
+     constructor.
+
+`DECL_COMPLETE_CONSTRUCTOR_P'
+     This predicate holds for a function which is a constructor for an
+     object of a complete type.
+
+`DECL_BASE_CONSTRUCTOR_P'
+     This predicate holds for a function which is a constructor for a
+     base class sub-object.
+
+`DECL_COPY_CONSTRUCTOR_P'
+     This predicate holds for a function which is a copy-constructor.
+
+`DECL_DESTRUCTOR_P'
+     This macro holds if the function is a destructor.
+
+`DECL_COMPLETE_DESTRUCTOR_P'
+     This predicate holds if the function is the destructor for an
+     object a complete type.
+
+`DECL_OVERLOADED_OPERATOR_P'
+     This macro holds if the function is an overloaded operator.
+
+`DECL_CONV_FN_P'
+     This macro holds if the function is a type-conversion operator.
+
+`DECL_GLOBAL_CTOR_P'
+     This predicate holds if the function is a file-scope initialization
+     function.
+
+`DECL_GLOBAL_DTOR_P'
+     This predicate holds if the function is a file-scope finalization
+     function.
+
+`DECL_THUNK_P'
+     This predicate holds if the function is a thunk.
+
+     These functions represent stub code that adjusts the `this' pointer
+     and then jumps to another function.  When the jumped-to function
+     returns, control is transferred directly to the caller, without
+     returning to the thunk.  The first parameter to the thunk is
+     always the `this' pointer; the thunk should add `THUNK_DELTA' to
+     this value.  (The `THUNK_DELTA' is an `int', not an `INTEGER_CST'.)
+
+     Then, if `THUNK_VCALL_OFFSET' (an `INTEGER_CST') is nonzero the
+     adjusted `this' pointer must be adjusted again.  The complete
+     calculation is given by the following pseudo-code:
+
+          this += THUNK_DELTA
+          if (THUNK_VCALL_OFFSET)
+            this += (*((ptrdiff_t **) this))[THUNK_VCALL_OFFSET]
+
+     Finally, the thunk should jump to the location given by
+     `DECL_INITIAL'; this will always be an expression for the address
+     of a function.
+
+`DECL_NON_THUNK_FUNCTION_P'
+     This predicate holds if the function is _not_ a thunk function.
+
+`GLOBAL_INIT_PRIORITY'
+     If either `DECL_GLOBAL_CTOR_P' or `DECL_GLOBAL_DTOR_P' holds, then
+     this gives the initialization priority for the function.  The
+     linker will arrange that all functions for which
+     `DECL_GLOBAL_CTOR_P' holds are run in increasing order of priority
+     before `main' is called.  When the program exits, all functions for
+     which `DECL_GLOBAL_DTOR_P' holds are run in the reverse order.
+
+`TYPE_RAISES_EXCEPTIONS'
+     This macro returns the list of exceptions that a (member-)function
+     can raise.  The returned list, if non `NULL', is comprised of nodes
+     whose `TREE_VALUE' represents a type.
+
+`TYPE_NOTHROW_P'
+     This predicate holds when the exception-specification of its
+     arguments is of the form ``()''.
+
+`DECL_ARRAY_DELETE_OPERATOR_P'
+     This predicate holds if the function an overloaded `operator
+     delete[]'.
+
+
+
+File: gccint.info,  Node: Statements for C++,  Next: C++ Expressions,  Prev: Functions for C++,  Up: C and C++ Trees
+
+11.10.5 Statements for C++
+--------------------------
+
+A function that has a definition in the current translation unit will
+have a non-`NULL' `DECL_INITIAL'.  However, back ends should not make
+use of the particular value given by `DECL_INITIAL'.
+
+ The `DECL_SAVED_TREE' macro will give the complete body of the
+function.
+
+11.10.5.1 Statements
+....................
+
+There are tree nodes corresponding to all of the source-level statement
+constructs, used within the C and C++ frontends.  These are enumerated
+here, together with a list of the various macros that can be used to
+obtain information about them.  There are a few macros that can be used
+with all statements:
+
+`STMT_IS_FULL_EXPR_P'
+     In C++, statements normally constitute "full expressions";
+     temporaries created during a statement are destroyed when the
+     statement is complete.  However, G++ sometimes represents
+     expressions by statements; these statements will not have
+     `STMT_IS_FULL_EXPR_P' set.  Temporaries created during such
+     statements should be destroyed when the innermost enclosing
+     statement with `STMT_IS_FULL_EXPR_P' set is exited.
+
+
+ Here is the list of the various statement nodes, and the macros used to
+access them.  This documentation describes the use of these nodes in
+non-template functions (including instantiations of template functions).
+In template functions, the same nodes are used, but sometimes in
+slightly different ways.
+
+ Many of the statements have substatements.  For example, a `while'
+loop will have a body, which is itself a statement.  If the substatement
+is `NULL_TREE', it is considered equivalent to a statement consisting
+of a single `;', i.e., an expression statement in which the expression
+has been omitted.  A substatement may in fact be a list of statements,
+connected via their `TREE_CHAIN's.  So, you should always process the
+statement tree by looping over substatements, like this:
+     void process_stmt (stmt)
+          tree stmt;
+     {
+       while (stmt)
+         {
+           switch (TREE_CODE (stmt))
+             {
+             case IF_STMT:
+               process_stmt (THEN_CLAUSE (stmt));
+               /* More processing here.  */
+               break;
+
+             ...
+             }
+
+           stmt = TREE_CHAIN (stmt);
+         }
+     }
+ In other words, while the `then' clause of an `if' statement in C++
+can be only one statement (although that one statement may be a
+compound statement), the intermediate representation will sometimes use
+several statements chained together.
+
+`BREAK_STMT'
+     Used to represent a `break' statement.  There are no additional
+     fields.
+
+`CLEANUP_STMT'
+     Used to represent an action that should take place upon exit from
+     the enclosing scope.  Typically, these actions are calls to
+     destructors for local objects, but back ends cannot rely on this
+     fact.  If these nodes are in fact representing such destructors,
+     `CLEANUP_DECL' will be the `VAR_DECL' destroyed.  Otherwise,
+     `CLEANUP_DECL' will be `NULL_TREE'.  In any case, the
+     `CLEANUP_EXPR' is the expression to execute.  The cleanups
+     executed on exit from a scope should be run in the reverse order
+     of the order in which the associated `CLEANUP_STMT's were
+     encountered.
+
+`CONTINUE_STMT'
+     Used to represent a `continue' statement.  There are no additional
+     fields.
+
+`CTOR_STMT'
+     Used to mark the beginning (if `CTOR_BEGIN_P' holds) or end (if
+     `CTOR_END_P' holds of the main body of a constructor.  See also
+     `SUBOBJECT' for more information on how to use these nodes.
+
+`DO_STMT'
+     Used to represent a `do' loop.  The body of the loop is given by
+     `DO_BODY' while the termination condition for the loop is given by
+     `DO_COND'.  The condition for a `do'-statement is always an
+     expression.
+
+`EMPTY_CLASS_EXPR'
+     Used to represent a temporary object of a class with no data whose
+     address is never taken.  (All such objects are interchangeable.)
+     The `TREE_TYPE' represents the type of the object.
+
+`EXPR_STMT'
+     Used to represent an expression statement.  Use `EXPR_STMT_EXPR' to
+     obtain the expression.
+
+`FOR_STMT'
+     Used to represent a `for' statement.  The `FOR_INIT_STMT' is the
+     initialization statement for the loop.  The `FOR_COND' is the
+     termination condition.  The `FOR_EXPR' is the expression executed
+     right before the `FOR_COND' on each loop iteration; often, this
+     expression increments a counter.  The body of the loop is given by
+     `FOR_BODY'.  Note that `FOR_INIT_STMT' and `FOR_BODY' return
+     statements, while `FOR_COND' and `FOR_EXPR' return expressions.
+
+`HANDLER'
+     Used to represent a C++ `catch' block.  The `HANDLER_TYPE' is the
+     type of exception that will be caught by this handler; it is equal
+     (by pointer equality) to `NULL' if this handler is for all types.
+     `HANDLER_PARMS' is the `DECL_STMT' for the catch parameter, and
+     `HANDLER_BODY' is the code for the block itself.
+
+`IF_STMT'
+     Used to represent an `if' statement.  The `IF_COND' is the
+     expression.
+
+     If the condition is a `TREE_LIST', then the `TREE_PURPOSE' is a
+     statement (usually a `DECL_STMT').  Each time the condition is
+     evaluated, the statement should be executed.  Then, the
+     `TREE_VALUE' should be used as the conditional expression itself.
+     This representation is used to handle C++ code like this:
+
+     C++ distinguishes between this and `COND_EXPR' for handling
+     templates.
+
+          if (int i = 7) ...
+
+     where there is a new local variable (or variables) declared within
+     the condition.
+
+     The `THEN_CLAUSE' represents the statement given by the `then'
+     condition, while the `ELSE_CLAUSE' represents the statement given
+     by the `else' condition.
+
+`SUBOBJECT'
+     In a constructor, these nodes are used to mark the point at which a
+     subobject of `this' is fully constructed.  If, after this point, an
+     exception is thrown before a `CTOR_STMT' with `CTOR_END_P' set is
+     encountered, the `SUBOBJECT_CLEANUP' must be executed.  The
+     cleanups must be executed in the reverse order in which they
+     appear.
+
+`SWITCH_STMT'
+     Used to represent a `switch' statement.  The `SWITCH_STMT_COND' is
+     the expression on which the switch is occurring.  See the
+     documentation for an `IF_STMT' for more information on the
+     representation used for the condition.  The `SWITCH_STMT_BODY' is
+     the body of the switch statement.   The `SWITCH_STMT_TYPE' is the
+     original type of switch expression as given in the source, before
+     any compiler conversions.
+
+`TRY_BLOCK'
+     Used to represent a `try' block.  The body of the try block is
+     given by `TRY_STMTS'.  Each of the catch blocks is a `HANDLER'
+     node.  The first handler is given by `TRY_HANDLERS'.  Subsequent
+     handlers are obtained by following the `TREE_CHAIN' link from one
+     handler to the next.  The body of the handler is given by
+     `HANDLER_BODY'.
+
+     If `CLEANUP_P' holds of the `TRY_BLOCK', then the `TRY_HANDLERS'
+     will not be a `HANDLER' node.  Instead, it will be an expression
+     that should be executed if an exception is thrown in the try
+     block.  It must rethrow the exception after executing that code.
+     And, if an exception is thrown while the expression is executing,
+     `terminate' must be called.
+
+`USING_STMT'
+     Used to represent a `using' directive.  The namespace is given by
+     `USING_STMT_NAMESPACE', which will be a NAMESPACE_DECL.  This node
+     is needed inside template functions, to implement using directives
+     during instantiation.
+
+`WHILE_STMT'
+     Used to represent a `while' loop.  The `WHILE_COND' is the
+     termination condition for the loop.  See the documentation for an
+     `IF_STMT' for more information on the representation used for the
+     condition.
+
+     The `WHILE_BODY' is the body of the loop.
+
+
+
+File: gccint.info,  Node: C++ Expressions,  Prev: Statements for C++,  Up: C and C++ Trees
+
+11.10.6 C++ Expressions
+-----------------------
+
+This section describes expressions specific to the C and C++ front ends.
+
+`TYPEID_EXPR'
+     Used to represent a `typeid' expression.
+
+`NEW_EXPR'
+`VEC_NEW_EXPR'
+     Used to represent a call to `new' and `new[]' respectively.
+
+`DELETE_EXPR'
+`VEC_DELETE_EXPR'
+     Used to represent a call to `delete' and `delete[]' respectively.
+
+`MEMBER_REF'
+     Represents a reference to a member of a class.
+
+`THROW_EXPR'
+     Represents an instance of `throw' in the program.  Operand 0,
+     which is the expression to throw, may be `NULL_TREE'.
+
+`AGGR_INIT_EXPR'
+     An `AGGR_INIT_EXPR' represents the initialization as the return
+     value of a function call, or as the result of a constructor.  An
+     `AGGR_INIT_EXPR' will only appear as a full-expression, or as the
+     second operand of a `TARGET_EXPR'.  `AGGR_INIT_EXPR's have a
+     representation similar to that of `CALL_EXPR's.  You can use the
+     `AGGR_INIT_EXPR_FN' and `AGGR_INIT_EXPR_ARG' macros to access the
+     function to call and the arguments to pass.
+
+     If `AGGR_INIT_VIA_CTOR_P' holds of the `AGGR_INIT_EXPR', then the
+     initialization is via a constructor call.  The address of the
+     `AGGR_INIT_EXPR_SLOT' operand, which is always a `VAR_DECL', is
+     taken, and this value replaces the first argument in the argument
+     list.
+
+     In either case, the expression is void.
+
+
+
+File: gccint.info,  Node: Java Trees,  Prev: C and C++ Trees,  Up: GENERIC
+
+11.11 Java Trees
+================
+
+
+File: gccint.info,  Node: GIMPLE,  Next: Tree SSA,  Prev: GENERIC,  Up: Top
+
+12 GIMPLE
+*********
+
+GIMPLE is a three-address representation derived from GENERIC by
+breaking down GENERIC expressions into tuples of no more than 3
+operands (with some exceptions like function calls).  GIMPLE was
+heavily influenced by the SIMPLE IL used by the McCAT compiler project
+at McGill University, though we have made some different choices.  For
+one thing, SIMPLE doesn't support `goto'.
+
+ Temporaries are introduced to hold intermediate values needed to
+compute complex expressions. Additionally, all the control structures
+used in GENERIC are lowered into conditional jumps, lexical scopes are
+removed and exception regions are converted into an on the side
+exception region tree.
+
+ The compiler pass which converts GENERIC into GIMPLE is referred to as
+the `gimplifier'.  The gimplifier works recursively, generating GIMPLE
+tuples out of the original GENERIC expressions.
+
+ One of the early implementation strategies used for the GIMPLE
+representation was to use the same internal data structures used by
+front ends to represent parse trees. This simplified implementation
+because we could leverage existing functionality and interfaces.
+However, GIMPLE is a much more restrictive representation than abstract
+syntax trees (AST), therefore it does not require the full structural
+complexity provided by the main tree data structure.
+
+ The GENERIC representation of a function is stored in the
+`DECL_SAVED_TREE' field of the associated `FUNCTION_DECL' tree node.
+It is converted to GIMPLE by a call to `gimplify_function_tree'.
+
+ If a front end wants to include language-specific tree codes in the
+tree representation which it provides to the back end, it must provide a
+definition of `LANG_HOOKS_GIMPLIFY_EXPR' which knows how to convert the
+front end trees to GIMPLE.  Usually such a hook will involve much of
+the same code for expanding front end trees to RTL.  This function can
+return fully lowered GIMPLE, or it can return GENERIC trees and let the
+main gimplifier lower them the rest of the way; this is often simpler.
+GIMPLE that is not fully lowered is known as "High GIMPLE" and consists
+of the IL before the pass `pass_lower_cf'.  High GIMPLE contains some
+container statements like lexical scopes (represented by `GIMPLE_BIND')
+and nested expressions (e.g., `GIMPLE_TRY'), while "Low GIMPLE" exposes
+all of the implicit jumps for control and exception expressions
+directly in the IL and EH region trees.
+
+ The C and C++ front ends currently convert directly from front end
+trees to GIMPLE, and hand that off to the back end rather than first
+converting to GENERIC.  Their gimplifier hooks know about all the
+`_STMT' nodes and how to convert them to GENERIC forms.  There was some
+work done on a genericization pass which would run first, but the
+existence of `STMT_EXPR' meant that in order to convert all of the C
+statements into GENERIC equivalents would involve walking the entire
+tree anyway, so it was simpler to lower all the way.  This might change
+in the future if someone writes an optimization pass which would work
+better with higher-level trees, but currently the optimizers all expect
+GIMPLE.
+
+ You can request to dump a C-like representation of the GIMPLE form
+with the flag `-fdump-tree-gimple'.
+
+* Menu:
+
+* Tuple representation::
+* GIMPLE instruction set::
+* GIMPLE Exception Handling::
+* Temporaries::
+* Operands::
+* Manipulating GIMPLE statements::
+* Tuple specific accessors::
+* GIMPLE sequences::
+* Sequence iterators::
+* Adding a new GIMPLE statement code::
+* Statement and operand traversals::
+
+
+File: gccint.info,  Node: Tuple representation,  Next: GIMPLE instruction set,  Up: GIMPLE
+
+12.1 Tuple representation
+=========================
+
+GIMPLE instructions are tuples of variable size divided in two groups:
+a header describing the instruction and its locations, and a variable
+length body with all the operands. Tuples are organized into a
+hierarchy with 3 main classes of tuples.
+
+12.1.1 `gimple_statement_base' (gsbase)
+---------------------------------------
+
+This is the root of the hierarchy, it holds basic information needed by
+most GIMPLE statements. There are some fields that may not be relevant
+to every GIMPLE statement, but those were moved into the base structure
+to take advantage of holes left by other fields (thus making the
+structure more compact).  The structure takes 4 words (32 bytes) on 64
+bit hosts:
+
+Field                   Size (bits)
+`code'                  8
+`subcode'               16
+`no_warning'            1
+`visited'               1
+`nontemporal_move'      1
+`plf'                   2
+`modified'              1
+`has_volatile_ops'      1
+`references_memory_p'   1
+`uid'                   32
+`location'              32
+`num_ops'               32
+`bb'                    64
+`block'                 63
+Total size              32 bytes
+
+   * `code' Main identifier for a GIMPLE instruction.
+
+   * `subcode' Used to distinguish different variants of the same basic
+     instruction or provide flags applicable to a given code. The
+     `subcode' flags field has different uses depending on the code of
+     the instruction, but mostly it distinguishes instructions of the
+     same family. The most prominent use of this field is in
+     assignments, where subcode indicates the operation done on the RHS
+     of the assignment. For example, a = b + c is encoded as
+     `GIMPLE_ASSIGN <PLUS_EXPR, a, b, c>'.
+
+   * `no_warning' Bitflag to indicate whether a warning has already
+     been issued on this statement.
+
+   * `visited' General purpose "visited" marker. Set and cleared by
+     each pass when needed.
+
+   * `nontemporal_move' Bitflag used in assignments that represent
+     non-temporal moves.  Although this bitflag is only used in
+     assignments, it was moved into the base to take advantage of the
+     bit holes left by the previous fields.
+
+   * `plf' Pass Local Flags. This 2-bit mask can be used as general
+     purpose markers by any pass. Passes are responsible for clearing
+     and setting these two flags accordingly.
+
+   * `modified' Bitflag to indicate whether the statement has been
+     modified.  Used mainly by the operand scanner to determine when to
+     re-scan a statement for operands.
+
+   * `has_volatile_ops' Bitflag to indicate whether this statement
+     contains operands that have been marked volatile.
+
+   * `references_memory_p' Bitflag to indicate whether this statement
+     contains memory references (i.e., its operands are either global
+     variables, or pointer dereferences or anything that must reside in
+     memory).
+
+   * `uid' This is an unsigned integer used by passes that want to
+     assign IDs to every statement. These IDs must be assigned and used
+     by each pass.
+
+   * `location' This is a `location_t' identifier to specify source code
+     location for this statement. It is inherited from the front end.
+
+   * `num_ops' Number of operands that this statement has. This
+     specifies the size of the operand vector embedded in the tuple.
+     Only used in some tuples, but it is declared in the base tuple to
+     take advantage of the 32-bit hole left by the previous fields.
+
+   * `bb' Basic block holding the instruction.
+
+   * `block' Lexical block holding this statement.  Also used for debug
+     information generation.
+
+12.1.2 `gimple_statement_with_ops'
+----------------------------------
+
+This tuple is actually split in two: `gimple_statement_with_ops_base'
+and `gimple_statement_with_ops'. This is needed to accommodate the way
+the operand vector is allocated. The operand vector is defined to be an
+array of 1 element. So, to allocate a dynamic number of operands, the
+memory allocator (`gimple_alloc') simply allocates enough memory to
+hold the structure itself plus `N - 1' operands which run "off the end"
+of the structure. For example, to allocate space for a tuple with 3
+operands, `gimple_alloc' reserves `sizeof (struct
+gimple_statement_with_ops) + 2 * sizeof (tree)' bytes.
+
+ On the other hand, several fields in this tuple need to be shared with
+the `gimple_statement_with_memory_ops' tuple. So, these common fields
+are placed in `gimple_statement_with_ops_base' which is then inherited
+from the other two tuples.
+
+`gsbase'    256
+`def_ops'   64
+`use_ops'   64
+`op'        `num_ops' * 64
+Total size  48 + 8 * `num_ops' bytes
+
+   * `gsbase' Inherited from `struct gimple_statement_base'.
+
+   * `def_ops' Array of pointers into the operand array indicating all
+     the slots that contain a variable written-to by the statement.
+     This array is also used for immediate use chaining. Note that it
+     would be possible to not rely on this array, but the changes
+     required to implement this are pretty invasive.
+
+   * `use_ops' Similar to `def_ops' but for variables read by the
+     statement.
+
+   * `op' Array of trees with `num_ops' slots.
+
+12.1.3 `gimple_statement_with_memory_ops'
+-----------------------------------------
+
+This tuple is essentially identical to `gimple_statement_with_ops',
+except that it contains 4 additional fields to hold vectors related
+memory stores and loads.  Similar to the previous case, the structure
+is split in two to accommodate for the operand vector
+(`gimple_statement_with_memory_ops_base' and
+`gimple_statement_with_memory_ops').
+
+Field        Size (bits)
+`gsbase'     256
+`def_ops'    64
+`use_ops'    64
+`vdef_ops'   64
+`vuse_ops'   64
+`stores'     64
+`loads'      64
+`op'         `num_ops' * 64
+Total size   80 + 8 * `num_ops' bytes
+
+   * `vdef_ops' Similar to `def_ops' but for `VDEF' operators. There is
+     one entry per memory symbol written by this statement. This is
+     used to maintain the memory SSA use-def and def-def chains.
+
+   * `vuse_ops' Similar to `use_ops' but for `VUSE' operators. There is
+     one entry per memory symbol loaded by this statement. This is used
+     to maintain the memory SSA use-def chains.
+
+   * `stores' Bitset with all the UIDs for the symbols written-to by the
+     statement.  This is different than `vdef_ops' in that all the
+     affected symbols are mentioned in this set.  If memory
+     partitioning is enabled, the `vdef_ops' vector will refer to memory
+     partitions. Furthermore, no SSA information is stored in this set.
+
+   * `loads' Similar to `stores', but for memory loads. (Note that there
+     is some amount of redundancy here, it should be possible to reduce
+     memory utilization further by removing these sets).
+
+ All the other tuples are defined in terms of these three basic ones.
+Each tuple will add some fields. The main gimple type is defined to be
+the union of all these structures (`GTY' markers elided for clarity):
+
+     union gimple_statement_d
+     {
+       struct gimple_statement_base gsbase;
+       struct gimple_statement_with_ops gsops;
+       struct gimple_statement_with_memory_ops gsmem;
+       struct gimple_statement_omp omp;
+       struct gimple_statement_bind gimple_bind;
+       struct gimple_statement_catch gimple_catch;
+       struct gimple_statement_eh_filter gimple_eh_filter;
+       struct gimple_statement_phi gimple_phi;
+       struct gimple_statement_resx gimple_resx;
+       struct gimple_statement_try gimple_try;
+       struct gimple_statement_wce gimple_wce;
+       struct gimple_statement_asm gimple_asm;
+       struct gimple_statement_omp_critical gimple_omp_critical;
+       struct gimple_statement_omp_for gimple_omp_for;
+       struct gimple_statement_omp_parallel gimple_omp_parallel;
+       struct gimple_statement_omp_task gimple_omp_task;
+       struct gimple_statement_omp_sections gimple_omp_sections;
+       struct gimple_statement_omp_single gimple_omp_single;
+       struct gimple_statement_omp_continue gimple_omp_continue;
+       struct gimple_statement_omp_atomic_load gimple_omp_atomic_load;
+       struct gimple_statement_omp_atomic_store gimple_omp_atomic_store;
+     };
+
+
+File: gccint.info,  Node: GIMPLE instruction set,  Next: GIMPLE Exception Handling,  Prev: Tuple representation,  Up: GIMPLE
+
+12.2 GIMPLE instruction set
+===========================
+
+The following table briefly describes the GIMPLE instruction set.
+
+Instruction                    High GIMPLE   Low GIMPLE
+`GIMPLE_ASM'                   x             x
+`GIMPLE_ASSIGN'                x             x
+`GIMPLE_BIND'                  x             
+`GIMPLE_CALL'                  x             x
+`GIMPLE_CATCH'                 x             
+`GIMPLE_COND'                  x             x
+`GIMPLE_DEBUG'                 x             x
+`GIMPLE_EH_FILTER'             x             
+`GIMPLE_GOTO'                  x             x
+`GIMPLE_LABEL'                 x             x
+`GIMPLE_NOP'                   x             x
+`GIMPLE_OMP_ATOMIC_LOAD'       x             x
+`GIMPLE_OMP_ATOMIC_STORE'      x             x
+`GIMPLE_OMP_CONTINUE'          x             x
+`GIMPLE_OMP_CRITICAL'          x             x
+`GIMPLE_OMP_FOR'               x             x
+`GIMPLE_OMP_MASTER'            x             x
+`GIMPLE_OMP_ORDERED'           x             x
+`GIMPLE_OMP_PARALLEL'          x             x
+`GIMPLE_OMP_RETURN'            x             x
+`GIMPLE_OMP_SECTION'           x             x
+`GIMPLE_OMP_SECTIONS'          x             x
+`GIMPLE_OMP_SECTIONS_SWITCH'   x             x
+`GIMPLE_OMP_SINGLE'            x             x
+`GIMPLE_PHI'                                 x
+`GIMPLE_RESX'                                x
+`GIMPLE_RETURN'                x             x
+`GIMPLE_SWITCH'                x             x
+`GIMPLE_TRY'                   x             
+
+
+File: gccint.info,  Node: GIMPLE Exception Handling,  Next: Temporaries,  Prev: GIMPLE instruction set,  Up: GIMPLE
+
+12.3 Exception Handling
+=======================
+
+Other exception handling constructs are represented using
+`GIMPLE_TRY_CATCH'.  `GIMPLE_TRY_CATCH' has two operands.  The first
+operand is a sequence of statements to execute.  If executing these
+statements does not throw an exception, then the second operand is
+ignored.  Otherwise, if an exception is thrown, then the second operand
+of the `GIMPLE_TRY_CATCH' is checked.  The second operand may have the
+following forms:
+
+  1. A sequence of statements to execute.  When an exception occurs,
+     these statements are executed, and then the exception is rethrown.
+
+  2. A sequence of `GIMPLE_CATCH' statements.  Each `GIMPLE_CATCH' has
+     a list of applicable exception types and handler code.  If the
+     thrown exception matches one of the caught types, the associated
+     handler code is executed.  If the handler code falls off the
+     bottom, execution continues after the original `GIMPLE_TRY_CATCH'.
+
+  3. A `GIMPLE_EH_FILTER' statement.  This has a list of permitted
+     exception types, and code to handle a match failure.  If the
+     thrown exception does not match one of the allowed types, the
+     associated match failure code is executed.  If the thrown exception
+     does match, it continues unwinding the stack looking for the next
+     handler.
+
+
+ Currently throwing an exception is not directly represented in GIMPLE,
+since it is implemented by calling a function.  At some point in the
+future we will want to add some way to express that the call will throw
+an exception of a known type.
+
+ Just before running the optimizers, the compiler lowers the high-level
+EH constructs above into a set of `goto's, magic labels, and EH
+regions.  Continuing to unwind at the end of a cleanup is represented
+with a `GIMPLE_RESX'.
+
+
+File: gccint.info,  Node: Temporaries,  Next: Operands,  Prev: GIMPLE Exception Handling,  Up: GIMPLE
+
+12.4 Temporaries
+================
+
+When gimplification encounters a subexpression that is too complex, it
+creates a new temporary variable to hold the value of the
+subexpression, and adds a new statement to initialize it before the
+current statement. These special temporaries are known as `expression
+temporaries', and are allocated using `get_formal_tmp_var'.  The
+compiler tries to always evaluate identical expressions into the same
+temporary, to simplify elimination of redundant calculations.
+
+ We can only use expression temporaries when we know that it will not
+be reevaluated before its value is used, and that it will not be
+otherwise modified(1). Other temporaries can be allocated using
+`get_initialized_tmp_var' or `create_tmp_var'.
+
+ Currently, an expression like `a = b + 5' is not reduced any further.
+We tried converting it to something like
+     T1 = b + 5;
+     a = T1;
+ but this bloated the representation for minimal benefit.  However, a
+variable which must live in memory cannot appear in an expression; its
+value is explicitly loaded into a temporary first.  Similarly, storing
+the value of an expression to a memory variable goes through a
+temporary.
+
+ ---------- Footnotes ----------
+
+ (1) These restrictions are derived from those in Morgan 4.8.
+
+
+File: gccint.info,  Node: Operands,  Next: Manipulating GIMPLE statements,  Prev: Temporaries,  Up: GIMPLE
+
+12.5 Operands
+=============
+
+In general, expressions in GIMPLE consist of an operation and the
+appropriate number of simple operands; these operands must either be a
+GIMPLE rvalue (`is_gimple_val'), i.e. a constant or a register
+variable.  More complex operands are factored out into temporaries, so
+that
+     a = b + c + d
+ becomes
+     T1 = b + c;
+     a = T1 + d;
+
+ The same rule holds for arguments to a `GIMPLE_CALL'.
+
+ The target of an assignment is usually a variable, but can also be a
+`MEM_REF' or a compound lvalue as described below.
+
+* Menu:
+
+* Compound Expressions::
+* Compound Lvalues::
+* Conditional Expressions::
+* Logical Operators::
+
+
+File: gccint.info,  Node: Compound Expressions,  Next: Compound Lvalues,  Up: Operands
+
+12.5.1 Compound Expressions
+---------------------------
+
+The left-hand side of a C comma expression is simply moved into a
+separate statement.
+
+
+File: gccint.info,  Node: Compound Lvalues,  Next: Conditional Expressions,  Prev: Compound Expressions,  Up: Operands
+
+12.5.2 Compound Lvalues
+-----------------------
+
+Currently compound lvalues involving array and structure field
+references are not broken down; an expression like `a.b[2] = 42' is not
+reduced any further (though complex array subscripts are).  This
+restriction is a workaround for limitations in later optimizers; if we
+were to convert this to
+
+     T1 = &a.b;
+     T1[2] = 42;
+
+ alias analysis would not remember that the reference to `T1[2]' came
+by way of `a.b', so it would think that the assignment could alias
+another member of `a'; this broke `struct-alias-1.c'.  Future optimizer
+improvements may make this limitation unnecessary.
+
+
+File: gccint.info,  Node: Conditional Expressions,  Next: Logical Operators,  Prev: Compound Lvalues,  Up: Operands
+
+12.5.3 Conditional Expressions
+------------------------------
+
+A C `?:' expression is converted into an `if' statement with each
+branch assigning to the same temporary.  So,
+
+     a = b ? c : d;
+ becomes
+     if (b == 1)
+       T1 = c;
+     else
+       T1 = d;
+     a = T1;
+
+ The GIMPLE level if-conversion pass re-introduces `?:' expression, if
+appropriate. It is used to vectorize loops with conditions using vector
+conditional operations.
+
+ Note that in GIMPLE, `if' statements are represented using
+`GIMPLE_COND', as described below.
+
+
+File: gccint.info,  Node: Logical Operators,  Prev: Conditional Expressions,  Up: Operands
+
+12.5.4 Logical Operators
+------------------------
+
+Except when they appear in the condition operand of a `GIMPLE_COND',
+logical `and' and `or' operators are simplified as follows: `a = b &&
+c' becomes
+
+     T1 = (bool)b;
+     if (T1 == true)
+       T1 = (bool)c;
+     a = T1;
+
+ Note that `T1' in this example cannot be an expression temporary,
+because it has two different assignments.
+
+12.5.5 Manipulating operands
+----------------------------
+
+All gimple operands are of type `tree'.  But only certain types of
+trees are allowed to be used as operand tuples.  Basic validation is
+controlled by the function `get_gimple_rhs_class', which given a tree
+code, returns an `enum' with the following values of type `enum
+gimple_rhs_class'
+
+   * `GIMPLE_INVALID_RHS' The tree cannot be used as a GIMPLE operand.
+
+   * `GIMPLE_TERNARY_RHS' The tree is a valid GIMPLE ternary operation.
+
+   * `GIMPLE_BINARY_RHS' The tree is a valid GIMPLE binary operation.
+
+   * `GIMPLE_UNARY_RHS' The tree is a valid GIMPLE unary operation.
+
+   * `GIMPLE_SINGLE_RHS' The tree is a single object, that cannot be
+     split into simpler operands (for instance, `SSA_NAME', `VAR_DECL',
+     `COMPONENT_REF', etc).
+
+     This operand class also acts as an escape hatch for tree nodes
+     that may be flattened out into the operand vector, but would need
+     more than two slots on the RHS.  For instance, a `COND_EXPR'
+     expression of the form `(a op b) ? x : y' could be flattened out
+     on the operand vector using 4 slots, but it would also require
+     additional processing to distinguish `c = a op b' from `c = a op b
+     ? x : y'.  Something similar occurs with `ASSERT_EXPR'.   In time,
+     these special case tree expressions should be flattened into the
+     operand vector.
+
+ For tree nodes in the categories `GIMPLE_TERNARY_RHS',
+`GIMPLE_BINARY_RHS' and `GIMPLE_UNARY_RHS', they cannot be stored
+inside tuples directly.  They first need to be flattened and separated
+into individual components.  For instance, given the GENERIC expression
+
+     a = b + c
+
+ its tree representation is:
+
+     MODIFY_EXPR <VAR_DECL  <a>, PLUS_EXPR <VAR_DECL <b>, VAR_DECL <c>>>
+
+ In this case, the GIMPLE form for this statement is logically
+identical to its GENERIC form but in GIMPLE, the `PLUS_EXPR' on the RHS
+of the assignment is not represented as a tree, instead the two
+operands are taken out of the `PLUS_EXPR' sub-tree and flattened into
+the GIMPLE tuple as follows:
+
+     GIMPLE_ASSIGN <PLUS_EXPR, VAR_DECL <a>, VAR_DECL <b>, VAR_DECL <c>>
+
+12.5.6 Operand vector allocation
+--------------------------------
+
+The operand vector is stored at the bottom of the three tuple
+structures that accept operands. This means, that depending on the code
+of a given statement, its operand vector will be at different offsets
+from the base of the structure.  To access tuple operands use the
+following accessors
+
+ -- GIMPLE function: unsigned gimple_num_ops (gimple g)
+     Returns the number of operands in statement G.
+
+ -- GIMPLE function: tree gimple_op (gimple g, unsigned i)
+     Returns operand `I' from statement `G'.
+
+ -- GIMPLE function: tree * gimple_ops (gimple g)
+     Returns a pointer into the operand vector for statement `G'.  This
+     is computed using an internal table called `gimple_ops_offset_'[].
+     This table is indexed by the gimple code of `G'.
+
+     When the compiler is built, this table is filled-in using the
+     sizes of the structures used by each statement code defined in
+     gimple.def.  Since the operand vector is at the bottom of the
+     structure, for a gimple code `C' the offset is computed as sizeof
+     (struct-of `C') - sizeof (tree).
+
+     This mechanism adds one memory indirection to every access when
+     using `gimple_op'(), if this becomes a bottleneck, a pass can
+     choose to memoize the result from `gimple_ops'() and use that to
+     access the operands.
+
+12.5.7 Operand validation
+-------------------------
+
+When adding a new operand to a gimple statement, the operand will be
+validated according to what each tuple accepts in its operand vector.
+These predicates are called by the `gimple_NAME_set_...()'.  Each tuple
+will use one of the following predicates (Note, this list is not
+exhaustive):
+
+ -- GIMPLE function: bool is_gimple_val (tree t)
+     Returns true if t is a "GIMPLE value", which are all the
+     non-addressable stack variables (variables for which
+     `is_gimple_reg' returns true) and constants (expressions for which
+     `is_gimple_min_invariant' returns true).
+
+ -- GIMPLE function: bool is_gimple_addressable (tree t)
+     Returns true if t is a symbol or memory reference whose address
+     can be taken.
+
+ -- GIMPLE function: bool is_gimple_asm_val (tree t)
+     Similar to `is_gimple_val' but it also accepts hard registers.
+
+ -- GIMPLE function: bool is_gimple_call_addr (tree t)
+     Return true if t is a valid expression to use as the function
+     called by a `GIMPLE_CALL'.
+
+ -- GIMPLE function: bool is_gimple_mem_ref_addr (tree t)
+     Return true if t is a valid expression to use as first operand of
+     a `MEM_REF' expression.
+
+ -- GIMPLE function: bool is_gimple_constant (tree t)
+     Return true if t is a valid gimple constant.
+
+ -- GIMPLE function: bool is_gimple_min_invariant (tree t)
+     Return true if t is a valid minimal invariant.  This is different
+     from constants, in that the specific value of t may not be known
+     at compile time, but it is known that it doesn't change (e.g., the
+     address of a function local variable).
+
+ -- GIMPLE function: bool is_gimple_ip_invariant (tree t)
+     Return true if t is an interprocedural invariant.  This means that
+     t is a valid invariant in all functions (e.g. it can be an address
+     of a global variable but not of a local one).
+
+ -- GIMPLE function: bool is_gimple_ip_invariant_address (tree t)
+     Return true if t is an `ADDR_EXPR' that does not change once the
+     program is running (and which is valid in all functions).
+
+12.5.8 Statement validation
+---------------------------
+
+ -- GIMPLE function: bool is_gimple_assign (gimple g)
+     Return true if the code of g is `GIMPLE_ASSIGN'.
+
+ -- GIMPLE function: bool is_gimple_call (gimple g)
+     Return true if the code of g is `GIMPLE_CALL'.
+
+ -- GIMPLE function: bool is_gimple_debug (gimple g)
+     Return true if the code of g is `GIMPLE_DEBUG'.
+
+ -- GIMPLE function: bool gimple_assign_cast_p (gimple g)
+     Return true if g is a `GIMPLE_ASSIGN' that performs a type cast
+     operation.
+
+ -- GIMPLE function: bool gimple_debug_bind_p (gimple g)
+     Return true if g is a `GIMPLE_DEBUG' that binds the value of an
+     expression to a variable.
+
+
+File: gccint.info,  Node: Manipulating GIMPLE statements,  Next: Tuple specific accessors,  Prev: Operands,  Up: GIMPLE
+
+12.6 Manipulating GIMPLE statements
+===================================
+
+This section documents all the functions available to handle each of
+the GIMPLE instructions.
+
+12.6.1 Common accessors
+-----------------------
+
+The following are common accessors for gimple statements.
+
+ -- GIMPLE function: enum gimple_code gimple_code (gimple g)
+     Return the code for statement `G'.
+
+ -- GIMPLE function: basic_block gimple_bb (gimple g)
+     Return the basic block to which statement `G' belongs to.
+
+ -- GIMPLE function: tree gimple_block (gimple g)
+     Return the lexical scope block holding statement `G'.
+
+ -- GIMPLE function: tree gimple_expr_type (gimple stmt)
+     Return the type of the main expression computed by `STMT'. Return
+     `void_type_node' if `STMT' computes nothing. This will only return
+     something meaningful for `GIMPLE_ASSIGN', `GIMPLE_COND' and
+     `GIMPLE_CALL'.  For all other tuple codes, it will return
+     `void_type_node'.
+
+ -- GIMPLE function: enum tree_code gimple_expr_code (gimple stmt)
+     Return the tree code for the expression computed by `STMT'.  This
+     is only meaningful for `GIMPLE_CALL', `GIMPLE_ASSIGN' and
+     `GIMPLE_COND'.  If `STMT' is `GIMPLE_CALL', it will return
+     `CALL_EXPR'.  For `GIMPLE_COND', it returns the code of the
+     comparison predicate.  For `GIMPLE_ASSIGN' it returns the code of
+     the operation performed by the `RHS' of the assignment.
+
+ -- GIMPLE function: void gimple_set_block (gimple g, tree block)
+     Set the lexical scope block of `G' to `BLOCK'.
+
+ -- GIMPLE function: location_t gimple_locus (gimple g)
+     Return locus information for statement `G'.
+
+ -- GIMPLE function: void gimple_set_locus (gimple g, location_t locus)
+     Set locus information for statement `G'.
+
+ -- GIMPLE function: bool gimple_locus_empty_p (gimple g)
+     Return true if `G' does not have locus information.
+
+ -- GIMPLE function: bool gimple_no_warning_p (gimple stmt)
+     Return true if no warnings should be emitted for statement `STMT'.
+
+ -- GIMPLE function: void gimple_set_visited (gimple stmt, bool
+          visited_p)
+     Set the visited status on statement `STMT' to `VISITED_P'.
+
+ -- GIMPLE function: bool gimple_visited_p (gimple stmt)
+     Return the visited status on statement `STMT'.
+
+ -- GIMPLE function: void gimple_set_plf (gimple stmt, enum plf_mask
+          plf, bool val_p)
+     Set pass local flag `PLF' on statement `STMT' to `VAL_P'.
+
+ -- GIMPLE function: unsigned int gimple_plf (gimple stmt, enum
+          plf_mask plf)
+     Return the value of pass local flag `PLF' on statement `STMT'.
+
+ -- GIMPLE function: bool gimple_has_ops (gimple g)
+     Return true if statement `G' has register or memory operands.
+
+ -- GIMPLE function: bool gimple_has_mem_ops (gimple g)
+     Return true if statement `G' has memory operands.
+
+ -- GIMPLE function: unsigned gimple_num_ops (gimple g)
+     Return the number of operands for statement `G'.
+
+ -- GIMPLE function: tree * gimple_ops (gimple g)
+     Return the array of operands for statement `G'.
+
+ -- GIMPLE function: tree gimple_op (gimple g, unsigned i)
+     Return operand `I' for statement `G'.
+
+ -- GIMPLE function: tree * gimple_op_ptr (gimple g, unsigned i)
+     Return a pointer to operand `I' for statement `G'.
+
+ -- GIMPLE function: void gimple_set_op (gimple g, unsigned i, tree op)
+     Set operand `I' of statement `G' to `OP'.
+
+ -- GIMPLE function: bitmap gimple_addresses_taken (gimple stmt)
+     Return the set of symbols that have had their address taken by
+     `STMT'.
+
+ -- GIMPLE function: struct def_optype_d * gimple_def_ops (gimple g)
+     Return the set of `DEF' operands for statement `G'.
+
+ -- GIMPLE function: void gimple_set_def_ops (gimple g, struct
+          def_optype_d *def)
+     Set `DEF' to be the set of `DEF' operands for statement `G'.
+
+ -- GIMPLE function: struct use_optype_d * gimple_use_ops (gimple g)
+     Return the set of `USE' operands for statement `G'.
+
+ -- GIMPLE function: void gimple_set_use_ops (gimple g, struct
+          use_optype_d *use)
+     Set `USE' to be the set of `USE' operands for statement `G'.
+
+ -- GIMPLE function: struct voptype_d * gimple_vuse_ops (gimple g)
+     Return the set of `VUSE' operands for statement `G'.
+
+ -- GIMPLE function: void gimple_set_vuse_ops (gimple g, struct
+          voptype_d *ops)
+     Set `OPS' to be the set of `VUSE' operands for statement `G'.
+
+ -- GIMPLE function: struct voptype_d * gimple_vdef_ops (gimple g)
+     Return the set of `VDEF' operands for statement `G'.
+
+ -- GIMPLE function: void gimple_set_vdef_ops (gimple g, struct
+          voptype_d *ops)
+     Set `OPS' to be the set of `VDEF' operands for statement `G'.
+
+ -- GIMPLE function: bitmap gimple_loaded_syms (gimple g)
+     Return the set of symbols loaded by statement `G'.  Each element of
+     the set is the `DECL_UID' of the corresponding symbol.
+
+ -- GIMPLE function: bitmap gimple_stored_syms (gimple g)
+     Return the set of symbols stored by statement `G'.  Each element of
+     the set is the `DECL_UID' of the corresponding symbol.
+
+ -- GIMPLE function: bool gimple_modified_p (gimple g)
+     Return true if statement `G' has operands and the modified field
+     has been set.
+
+ -- GIMPLE function: bool gimple_has_volatile_ops (gimple stmt)
+     Return true if statement `STMT' contains volatile operands.
+
+ -- GIMPLE function: void gimple_set_has_volatile_ops (gimple stmt,
+          bool volatilep)
+     Return true if statement `STMT' contains volatile operands.
+
+ -- GIMPLE function: void update_stmt (gimple s)
+     Mark statement `S' as modified, and update it.
+
+ -- GIMPLE function: void update_stmt_if_modified (gimple s)
+     Update statement `S' if it has been marked modified.
+
+ -- GIMPLE function: gimple gimple_copy (gimple stmt)
+     Return a deep copy of statement `STMT'.
+
+
+File: gccint.info,  Node: Tuple specific accessors,  Next: GIMPLE sequences,  Prev: Manipulating GIMPLE statements,  Up: GIMPLE
+
+12.7 Tuple specific accessors
+=============================
+
+* Menu:
+
+* `GIMPLE_ASM'::
+* `GIMPLE_ASSIGN'::
+* `GIMPLE_BIND'::
+* `GIMPLE_CALL'::
+* `GIMPLE_CATCH'::
+* `GIMPLE_COND'::
+* `GIMPLE_DEBUG'::
+* `GIMPLE_EH_FILTER'::
+* `GIMPLE_LABEL'::
+* `GIMPLE_NOP'::
+* `GIMPLE_OMP_ATOMIC_LOAD'::
+* `GIMPLE_OMP_ATOMIC_STORE'::
+* `GIMPLE_OMP_CONTINUE'::
+* `GIMPLE_OMP_CRITICAL'::
+* `GIMPLE_OMP_FOR'::
+* `GIMPLE_OMP_MASTER'::
+* `GIMPLE_OMP_ORDERED'::
+* `GIMPLE_OMP_PARALLEL'::
+* `GIMPLE_OMP_RETURN'::
+* `GIMPLE_OMP_SECTION'::
+* `GIMPLE_OMP_SECTIONS'::
+* `GIMPLE_OMP_SINGLE'::
+* `GIMPLE_PHI'::
+* `GIMPLE_RESX'::
+* `GIMPLE_RETURN'::
+* `GIMPLE_SWITCH'::
+* `GIMPLE_TRY'::
+* `GIMPLE_WITH_CLEANUP_EXPR'::
+
+
+File: gccint.info,  Node: `GIMPLE_ASM',  Next: `GIMPLE_ASSIGN',  Up: Tuple specific accessors
+
+12.7.1 `GIMPLE_ASM'
+-------------------
+
+ -- GIMPLE function: gimple gimple_build_asm (const char *string,
+          ninputs, noutputs, nclobbers, ...)
+     Build a `GIMPLE_ASM' statement.  This statement is used for
+     building in-line assembly constructs.  `STRING' is the assembly
+     code.  `NINPUT' is the number of register inputs.  `NOUTPUT' is the
+     number of register outputs.  `NCLOBBERS' is the number of clobbered
+     registers.  The rest of the arguments trees for each input,
+     output, and clobbered registers.
+
+ -- GIMPLE function: gimple gimple_build_asm_vec (const char *,
+          VEC(tree,gc) *, VEC(tree,gc) *, VEC(tree,gc) *)
+     Identical to gimple_build_asm, but the arguments are passed in
+     VECs.
+
+ -- GIMPLE function: unsigned gimple_asm_ninputs (gimple g)
+     Return the number of input operands for `GIMPLE_ASM' `G'.
+
+ -- GIMPLE function: unsigned gimple_asm_noutputs (gimple g)
+     Return the number of output operands for `GIMPLE_ASM' `G'.
+
+ -- GIMPLE function: unsigned gimple_asm_nclobbers (gimple g)
+     Return the number of clobber operands for `GIMPLE_ASM' `G'.
+
+ -- GIMPLE function: tree gimple_asm_input_op (gimple g, unsigned index)
+     Return input operand `INDEX' of `GIMPLE_ASM' `G'.
+
+ -- GIMPLE function: void gimple_asm_set_input_op (gimple g, unsigned
+          index, tree in_op)
+     Set `IN_OP' to be input operand `INDEX' in `GIMPLE_ASM' `G'.
+
+ -- GIMPLE function: tree gimple_asm_output_op (gimple g, unsigned
+          index)
+     Return output operand `INDEX' of `GIMPLE_ASM' `G'.
+
+ -- GIMPLE function: void gimple_asm_set_output_op (gimple g, unsigned
+          index, tree out_op)
+     Set `OUT_OP' to be output operand `INDEX' in `GIMPLE_ASM' `G'.
+
+ -- GIMPLE function: tree gimple_asm_clobber_op (gimple g, unsigned
+          index)
+     Return clobber operand `INDEX' of `GIMPLE_ASM' `G'.
+
+ -- GIMPLE function: void gimple_asm_set_clobber_op (gimple g, unsigned
+          index, tree clobber_op)
+     Set `CLOBBER_OP' to be clobber operand `INDEX' in `GIMPLE_ASM' `G'.
+
+ -- GIMPLE function: const char * gimple_asm_string (gimple g)
+     Return the string representing the assembly instruction in
+     `GIMPLE_ASM' `G'.
+
+ -- GIMPLE function: bool gimple_asm_volatile_p (gimple g)
+     Return true if `G' is an asm statement marked volatile.
+
+ -- GIMPLE function: void gimple_asm_set_volatile (gimple g)
+     Mark asm statement `G' as volatile.
+
+ -- GIMPLE function: void gimple_asm_clear_volatile (gimple g)
+     Remove volatile marker from asm statement `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_ASSIGN',  Next: `GIMPLE_BIND',  Prev: `GIMPLE_ASM',  Up: Tuple specific accessors
+
+12.7.2 `GIMPLE_ASSIGN'
+----------------------
+
+ -- GIMPLE function: gimple gimple_build_assign (tree lhs, tree rhs)
+     Build a `GIMPLE_ASSIGN' statement.  The left-hand side is an lvalue
+     passed in lhs.  The right-hand side can be either a unary or
+     binary tree expression.  The expression tree rhs will be flattened
+     and its operands assigned to the corresponding operand slots in
+     the new statement.  This function is useful when you already have
+     a tree expression that you want to convert into a tuple.  However,
+     try to avoid building expression trees for the sole purpose of
+     calling this function.  If you already have the operands in
+     separate trees, it is better to use `gimple_build_assign_with_ops'.
+
+ -- GIMPLE function: gimple gimplify_assign (tree dst, tree src,
+          gimple_seq *seq_p)
+     Build a new `GIMPLE_ASSIGN' tuple and append it to the end of
+     `*SEQ_P'.
+
+ `DST'/`SRC' are the destination and source respectively.  You can pass
+ungimplified trees in `DST' or `SRC', in which case they will be
+converted to a gimple operand if necessary.
+
+ This function returns the newly created `GIMPLE_ASSIGN' tuple.
+
+ -- GIMPLE function: gimple gimple_build_assign_with_ops (enum
+          tree_code subcode, tree lhs, tree op1, tree op2)
+     This function is similar to `gimple_build_assign', but is used to
+     build a `GIMPLE_ASSIGN' statement when the operands of the
+     right-hand side of the assignment are already split into different
+     operands.
+
+     The left-hand side is an lvalue passed in lhs.  Subcode is the
+     `tree_code' for the right-hand side of the assignment.  Op1 and op2
+     are the operands.  If op2 is null, subcode must be a `tree_code'
+     for a unary expression.
+
+ -- GIMPLE function: enum tree_code gimple_assign_rhs_code (gimple g)
+     Return the code of the expression computed on the `RHS' of
+     assignment statement `G'.
+
+ -- GIMPLE function: enum gimple_rhs_class gimple_assign_rhs_class
+          (gimple g)
+     Return the gimple rhs class of the code for the expression
+     computed on the rhs of assignment statement `G'.  This will never
+     return `GIMPLE_INVALID_RHS'.
+
+ -- GIMPLE function: tree gimple_assign_lhs (gimple g)
+     Return the `LHS' of assignment statement `G'.
+
+ -- GIMPLE function: tree * gimple_assign_lhs_ptr (gimple g)
+     Return a pointer to the `LHS' of assignment statement `G'.
+
+ -- GIMPLE function: tree gimple_assign_rhs1 (gimple g)
+     Return the first operand on the `RHS' of assignment statement `G'.
+
+ -- GIMPLE function: tree * gimple_assign_rhs1_ptr (gimple g)
+     Return the address of the first operand on the `RHS' of assignment
+     statement `G'.
+
+ -- GIMPLE function: tree gimple_assign_rhs2 (gimple g)
+     Return the second operand on the `RHS' of assignment statement `G'.
+
+ -- GIMPLE function: tree * gimple_assign_rhs2_ptr (gimple g)
+     Return the address of the second operand on the `RHS' of assignment
+     statement `G'.
+
+ -- GIMPLE function: tree gimple_assign_rhs3 (gimple g)
+     Return the third operand on the `RHS' of assignment statement `G'.
+
+ -- GIMPLE function: tree * gimple_assign_rhs3_ptr (gimple g)
+     Return the address of the third operand on the `RHS' of assignment
+     statement `G'.
+
+ -- GIMPLE function: void gimple_assign_set_lhs (gimple g, tree lhs)
+     Set `LHS' to be the `LHS' operand of assignment statement `G'.
+
+ -- GIMPLE function: void gimple_assign_set_rhs1 (gimple g, tree rhs)
+     Set `RHS' to be the first operand on the `RHS' of assignment
+     statement `G'.
+
+ -- GIMPLE function: void gimple_assign_set_rhs2 (gimple g, tree rhs)
+     Set `RHS' to be the second operand on the `RHS' of assignment
+     statement `G'.
+
+ -- GIMPLE function: void gimple_assign_set_rhs3 (gimple g, tree rhs)
+     Set `RHS' to be the third operand on the `RHS' of assignment
+     statement `G'.
+
+ -- GIMPLE function: bool gimple_assign_cast_p (gimple s)
+     Return true if `S' is a type-cast assignment.
+
+
+File: gccint.info,  Node: `GIMPLE_BIND',  Next: `GIMPLE_CALL',  Prev: `GIMPLE_ASSIGN',  Up: Tuple specific accessors
+
+12.7.3 `GIMPLE_BIND'
+--------------------
+
+ -- GIMPLE function: gimple gimple_build_bind (tree vars, gimple_seq
+          body)
+     Build a `GIMPLE_BIND' statement with a list of variables in `VARS'
+     and a body of statements in sequence `BODY'.
+
+ -- GIMPLE function: tree gimple_bind_vars (gimple g)
+     Return the variables declared in the `GIMPLE_BIND' statement `G'.
+
+ -- GIMPLE function: void gimple_bind_set_vars (gimple g, tree vars)
+     Set `VARS' to be the set of variables declared in the `GIMPLE_BIND'
+     statement `G'.
+
+ -- GIMPLE function: void gimple_bind_append_vars (gimple g, tree vars)
+     Append `VARS' to the set of variables declared in the `GIMPLE_BIND'
+     statement `G'.
+
+ -- GIMPLE function: gimple_seq gimple_bind_body (gimple g)
+     Return the GIMPLE sequence contained in the `GIMPLE_BIND' statement
+     `G'.
+
+ -- GIMPLE function: void gimple_bind_set_body (gimple g, gimple_seq
+          seq)
+     Set `SEQ' to be sequence contained in the `GIMPLE_BIND' statement
+     `G'.
+
+ -- GIMPLE function: void gimple_bind_add_stmt (gimple gs, gimple stmt)
+     Append a statement to the end of a `GIMPLE_BIND''s body.
+
+ -- GIMPLE function: void gimple_bind_add_seq (gimple gs, gimple_seq
+          seq)
+     Append a sequence of statements to the end of a `GIMPLE_BIND''s
+     body.
+
+ -- GIMPLE function: tree gimple_bind_block (gimple g)
+     Return the `TREE_BLOCK' node associated with `GIMPLE_BIND'
+     statement `G'. This is analogous to the `BIND_EXPR_BLOCK' field in
+     trees.
+
+ -- GIMPLE function: void gimple_bind_set_block (gimple g, tree block)
+     Set `BLOCK' to be the `TREE_BLOCK' node associated with
+     `GIMPLE_BIND' statement `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_CALL',  Next: `GIMPLE_CATCH',  Prev: `GIMPLE_BIND',  Up: Tuple specific accessors
+
+12.7.4 `GIMPLE_CALL'
+--------------------
+
+ -- GIMPLE function: gimple gimple_build_call (tree fn, unsigned nargs,
+          ...)
+     Build a `GIMPLE_CALL' statement to function `FN'.  The argument
+     `FN' must be either a `FUNCTION_DECL' or a gimple call address as
+     determined by `is_gimple_call_addr'.  `NARGS' are the number of
+     arguments.  The rest of the arguments follow the argument `NARGS',
+     and must be trees that are valid as rvalues in gimple (i.e., each
+     operand is validated with `is_gimple_operand').
+
+ -- GIMPLE function: gimple gimple_build_call_from_tree (tree call_expr)
+     Build a `GIMPLE_CALL' from a `CALL_EXPR' node.  The arguments and
+     the function are taken from the expression directly.  This routine
+     assumes that `call_expr' is already in GIMPLE form.  That is, its
+     operands are GIMPLE values and the function call needs no further
+     simplification.  All the call flags in `call_expr' are copied over
+     to the new `GIMPLE_CALL'.
+
+ -- GIMPLE function: gimple gimple_build_call_vec (tree fn, `VEC'(tree,
+          heap) *args)
+     Identical to `gimple_build_call' but the arguments are stored in a
+     `VEC'().
+
+ -- GIMPLE function: tree gimple_call_lhs (gimple g)
+     Return the `LHS' of call statement `G'.
+
+ -- GIMPLE function: tree * gimple_call_lhs_ptr (gimple g)
+     Return a pointer to the `LHS' of call statement `G'.
+
+ -- GIMPLE function: void gimple_call_set_lhs (gimple g, tree lhs)
+     Set `LHS' to be the `LHS' operand of call statement `G'.
+
+ -- GIMPLE function: tree gimple_call_fn (gimple g)
+     Return the tree node representing the function called by call
+     statement `G'.
+
+ -- GIMPLE function: void gimple_call_set_fn (gimple g, tree fn)
+     Set `FN' to be the function called by call statement `G'.  This has
+     to be a gimple value specifying the address of the called function.
+
+ -- GIMPLE function: tree gimple_call_fndecl (gimple g)
+     If a given `GIMPLE_CALL''s callee is a `FUNCTION_DECL', return it.
+     Otherwise return `NULL'.  This function is analogous to
+     `get_callee_fndecl' in `GENERIC'.
+
+ -- GIMPLE function: tree gimple_call_set_fndecl (gimple g, tree fndecl)
+     Set the called function to `FNDECL'.
+
+ -- GIMPLE function: tree gimple_call_return_type (gimple g)
+     Return the type returned by call statement `G'.
+
+ -- GIMPLE function: tree gimple_call_chain (gimple g)
+     Return the static chain for call statement `G'.
+
+ -- GIMPLE function: void gimple_call_set_chain (gimple g, tree chain)
+     Set `CHAIN' to be the static chain for call statement `G'.
+
+ -- GIMPLE function: unsigned gimple_call_num_args (gimple g)
+     Return the number of arguments used by call statement `G'.
+
+ -- GIMPLE function: tree gimple_call_arg (gimple g, unsigned index)
+     Return the argument at position `INDEX' for call statement `G'.
+     The first argument is 0.
+
+ -- GIMPLE function: tree * gimple_call_arg_ptr (gimple g, unsigned
+          index)
+     Return a pointer to the argument at position `INDEX' for call
+     statement `G'.
+
+ -- GIMPLE function: void gimple_call_set_arg (gimple g, unsigned
+          index, tree arg)
+     Set `ARG' to be the argument at position `INDEX' for call statement
+     `G'.
+
+ -- GIMPLE function: void gimple_call_set_tail (gimple s)
+     Mark call statement `S' as being a tail call (i.e., a call just
+     before the exit of a function). These calls are candidate for tail
+     call optimization.
+
+ -- GIMPLE function: bool gimple_call_tail_p (gimple s)
+     Return true if `GIMPLE_CALL' `S' is marked as a tail call.
+
+ -- GIMPLE function: void gimple_call_mark_uninlinable (gimple s)
+     Mark `GIMPLE_CALL' `S' as being uninlinable.
+
+ -- GIMPLE function: bool gimple_call_cannot_inline_p (gimple s)
+     Return true if `GIMPLE_CALL' `S' cannot be inlined.
+
+ -- GIMPLE function: bool gimple_call_noreturn_p (gimple s)
+     Return true if `S' is a noreturn call.
+
+ -- GIMPLE function: gimple gimple_call_copy_skip_args (gimple stmt,
+          bitmap args_to_skip)
+     Build a `GIMPLE_CALL' identical to `STMT' but skipping the
+     arguments in the positions marked by the set `ARGS_TO_SKIP'.
+
+
+File: gccint.info,  Node: `GIMPLE_CATCH',  Next: `GIMPLE_COND',  Prev: `GIMPLE_CALL',  Up: Tuple specific accessors
+
+12.7.5 `GIMPLE_CATCH'
+---------------------
+
+ -- GIMPLE function: gimple gimple_build_catch (tree types, gimple_seq
+          handler)
+     Build a `GIMPLE_CATCH' statement.  `TYPES' are the tree types this
+     catch handles.  `HANDLER' is a sequence of statements with the code
+     for the handler.
+
+ -- GIMPLE function: tree gimple_catch_types (gimple g)
+     Return the types handled by `GIMPLE_CATCH' statement `G'.
+
+ -- GIMPLE function: tree * gimple_catch_types_ptr (gimple g)
+     Return a pointer to the types handled by `GIMPLE_CATCH' statement
+     `G'.
+
+ -- GIMPLE function: gimple_seq gimple_catch_handler (gimple g)
+     Return the GIMPLE sequence representing the body of the handler of
+     `GIMPLE_CATCH' statement `G'.
+
+ -- GIMPLE function: void gimple_catch_set_types (gimple g, tree t)
+     Set `T' to be the set of types handled by `GIMPLE_CATCH' `G'.
+
+ -- GIMPLE function: void gimple_catch_set_handler (gimple g,
+          gimple_seq handler)
+     Set `HANDLER' to be the body of `GIMPLE_CATCH' `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_COND',  Next: `GIMPLE_DEBUG',  Prev: `GIMPLE_CATCH',  Up: Tuple specific accessors
+
+12.7.6 `GIMPLE_COND'
+--------------------
+
+ -- GIMPLE function: gimple gimple_build_cond (enum tree_code
+          pred_code, tree lhs, tree rhs, tree t_label, tree f_label)
+     Build a `GIMPLE_COND' statement.  `A' `GIMPLE_COND' statement
+     compares `LHS' and `RHS' and if the condition in `PRED_CODE' is
+     true, jump to the label in `t_label', otherwise jump to the label
+     in `f_label'.  `PRED_CODE' are relational operator tree codes like
+     `EQ_EXPR', `LT_EXPR', `LE_EXPR', `NE_EXPR', etc.
+
+ -- GIMPLE function: gimple gimple_build_cond_from_tree (tree cond,
+          tree t_label, tree f_label)
+     Build a `GIMPLE_COND' statement from the conditional expression
+     tree `COND'.  `T_LABEL' and `F_LABEL' are as in
+     `gimple_build_cond'.
+
+ -- GIMPLE function: enum tree_code gimple_cond_code (gimple g)
+     Return the code of the predicate computed by conditional statement
+     `G'.
+
+ -- GIMPLE function: void gimple_cond_set_code (gimple g, enum
+          tree_code code)
+     Set `CODE' to be the predicate code for the conditional statement
+     `G'.
+
+ -- GIMPLE function: tree gimple_cond_lhs (gimple g)
+     Return the `LHS' of the predicate computed by conditional statement
+     `G'.
+
+ -- GIMPLE function: void gimple_cond_set_lhs (gimple g, tree lhs)
+     Set `LHS' to be the `LHS' operand of the predicate computed by
+     conditional statement `G'.
+
+ -- GIMPLE function: tree gimple_cond_rhs (gimple g)
+     Return the `RHS' operand of the predicate computed by conditional
+     `G'.
+
+ -- GIMPLE function: void gimple_cond_set_rhs (gimple g, tree rhs)
+     Set `RHS' to be the `RHS' operand of the predicate computed by
+     conditional statement `G'.
+
+ -- GIMPLE function: tree gimple_cond_true_label (gimple g)
+     Return the label used by conditional statement `G' when its
+     predicate evaluates to true.
+
+ -- GIMPLE function: void gimple_cond_set_true_label (gimple g, tree
+          label)
+     Set `LABEL' to be the label used by conditional statement `G' when
+     its predicate evaluates to true.
+
+ -- GIMPLE function: void gimple_cond_set_false_label (gimple g, tree
+          label)
+     Set `LABEL' to be the label used by conditional statement `G' when
+     its predicate evaluates to false.
+
+ -- GIMPLE function: tree gimple_cond_false_label (gimple g)
+     Return the label used by conditional statement `G' when its
+     predicate evaluates to false.
+
+ -- GIMPLE function: void gimple_cond_make_false (gimple g)
+     Set the conditional `COND_STMT' to be of the form 'if (1 == 0)'.
+
+ -- GIMPLE function: void gimple_cond_make_true (gimple g)
+     Set the conditional `COND_STMT' to be of the form 'if (1 == 1)'.
+
+
+File: gccint.info,  Node: `GIMPLE_DEBUG',  Next: `GIMPLE_EH_FILTER',  Prev: `GIMPLE_COND',  Up: Tuple specific accessors
+
+12.7.7 `GIMPLE_DEBUG'
+---------------------
+
+ -- GIMPLE function: gimple gimple_build_debug_bind (tree var, tree
+          value, gimple stmt)
+     Build a `GIMPLE_DEBUG' statement with `GIMPLE_DEBUG_BIND' of
+     `subcode'.  The effect of this statement is to tell debug
+     information generation machinery that the value of user variable
+     `var' is given by `value' at that point, and to remain with that
+     value until `var' runs out of scope, a dynamically-subsequent
+     debug bind statement overrides the binding, or conflicting values
+     reach a control flow merge point.  Even if components of the
+     `value' expression change afterwards, the variable is supposed to
+     retain the same value, though not necessarily the same location.
+
+     It is expected that `var' be most often a tree for automatic user
+     variables (`VAR_DECL' or `PARM_DECL') that satisfy the
+     requirements for gimple registers, but it may also be a tree for a
+     scalarized component of a user variable (`ARRAY_REF',
+     `COMPONENT_REF'), or a debug temporary (`DEBUG_EXPR_DECL').
+
+     As for `value', it can be an arbitrary tree expression, but it is
+     recommended that it be in a suitable form for a gimple assignment
+     `RHS'.  It is not expected that user variables that could appear
+     as `var' ever appear in `value', because in the latter we'd have
+     their `SSA_NAME's instead, but even if they were not in SSA form,
+     user variables appearing in `value' are to be regarded as part of
+     the executable code space, whereas those in `var' are to be
+     regarded as part of the source code space.  There is no way to
+     refer to the value bound to a user variable within a `value'
+     expression.
+
+     If `value' is `GIMPLE_DEBUG_BIND_NOVALUE', debug information
+     generation machinery is informed that the variable `var' is
+     unbound, i.e., that its value is indeterminate, which sometimes
+     means it is really unavailable, and other times that the compiler
+     could not keep track of it.
+
+     Block and location information for the newly-created stmt are
+     taken from `stmt', if given.
+
+ -- GIMPLE function: tree gimple_debug_bind_get_var (gimple stmt)
+     Return the user variable VAR that is bound at `stmt'.
+
+ -- GIMPLE function: tree gimple_debug_bind_get_value (gimple stmt)
+     Return the value expression that is bound to a user variable at
+     `stmt'.
+
+ -- GIMPLE function: tree * gimple_debug_bind_get_value_ptr (gimple
+          stmt)
+     Return a pointer to the value expression that is bound to a user
+     variable at `stmt'.
+
+ -- GIMPLE function: void gimple_debug_bind_set_var (gimple stmt, tree
+          var)
+     Modify the user variable bound at `stmt' to VAR.
+
+ -- GIMPLE function: void gimple_debug_bind_set_value (gimple stmt,
+          tree var)
+     Modify the value bound to the user variable bound at `stmt' to
+     VALUE.
+
+ -- GIMPLE function: void gimple_debug_bind_reset_value (gimple stmt)
+     Modify the value bound to the user variable bound at `stmt' so
+     that the variable becomes unbound.
+
+ -- GIMPLE function: bool gimple_debug_bind_has_value_p (gimple stmt)
+     Return `TRUE' if `stmt' binds a user variable to a value, and
+     `FALSE' if it unbinds the variable.
+
+
+File: gccint.info,  Node: `GIMPLE_EH_FILTER',  Next: `GIMPLE_LABEL',  Prev: `GIMPLE_DEBUG',  Up: Tuple specific accessors
+
+12.7.8 `GIMPLE_EH_FILTER'
+-------------------------
+
+ -- GIMPLE function: gimple gimple_build_eh_filter (tree types,
+          gimple_seq failure)
+     Build a `GIMPLE_EH_FILTER' statement.  `TYPES' are the filter's
+     types.  `FAILURE' is a sequence with the filter's failure action.
+
+ -- GIMPLE function: tree gimple_eh_filter_types (gimple g)
+     Return the types handled by `GIMPLE_EH_FILTER' statement `G'.
+
+ -- GIMPLE function: tree * gimple_eh_filter_types_ptr (gimple g)
+     Return a pointer to the types handled by `GIMPLE_EH_FILTER'
+     statement `G'.
+
+ -- GIMPLE function: gimple_seq gimple_eh_filter_failure (gimple g)
+     Return the sequence of statement to execute when `GIMPLE_EH_FILTER'
+     statement fails.
+
+ -- GIMPLE function: void gimple_eh_filter_set_types (gimple g, tree
+          types)
+     Set `TYPES' to be the set of types handled by `GIMPLE_EH_FILTER'
+     `G'.
+
+ -- GIMPLE function: void gimple_eh_filter_set_failure (gimple g,
+          gimple_seq failure)
+     Set `FAILURE' to be the sequence of statements to execute on
+     failure for `GIMPLE_EH_FILTER' `G'.
+
+ -- GIMPLE function: bool gimple_eh_filter_must_not_throw (gimple g)
+     Return the `EH_FILTER_MUST_NOT_THROW' flag.
+
+ -- GIMPLE function: void gimple_eh_filter_set_must_not_throw (gimple
+          g, bool mntp)
+     Set the `EH_FILTER_MUST_NOT_THROW' flag.
+
+
+File: gccint.info,  Node: `GIMPLE_LABEL',  Next: `GIMPLE_NOP',  Prev: `GIMPLE_EH_FILTER',  Up: Tuple specific accessors
+
+12.7.9 `GIMPLE_LABEL'
+---------------------
+
+ -- GIMPLE function: gimple gimple_build_label (tree label)
+     Build a `GIMPLE_LABEL' statement with corresponding to the tree
+     label, `LABEL'.
+
+ -- GIMPLE function: tree gimple_label_label (gimple g)
+     Return the `LABEL_DECL' node used by `GIMPLE_LABEL' statement `G'.
+
+ -- GIMPLE function: void gimple_label_set_label (gimple g, tree label)
+     Set `LABEL' to be the `LABEL_DECL' node used by `GIMPLE_LABEL'
+     statement `G'.
+
+ -- GIMPLE function: gimple gimple_build_goto (tree dest)
+     Build a `GIMPLE_GOTO' statement to label `DEST'.
+
+ -- GIMPLE function: tree gimple_goto_dest (gimple g)
+     Return the destination of the unconditional jump `G'.
+
+ -- GIMPLE function: void gimple_goto_set_dest (gimple g, tree dest)
+     Set `DEST' to be the destination of the unconditional jump `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_NOP',  Next: `GIMPLE_OMP_ATOMIC_LOAD',  Prev: `GIMPLE_LABEL',  Up: Tuple specific accessors
+
+12.7.10 `GIMPLE_NOP'
+--------------------
+
+ -- GIMPLE function: gimple gimple_build_nop (void)
+     Build a `GIMPLE_NOP' statement.
+
+ -- GIMPLE function: bool gimple_nop_p (gimple g)
+     Returns `TRUE' if statement `G' is a `GIMPLE_NOP'.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_ATOMIC_LOAD',  Next: `GIMPLE_OMP_ATOMIC_STORE',  Prev: `GIMPLE_NOP',  Up: Tuple specific accessors
+
+12.7.11 `GIMPLE_OMP_ATOMIC_LOAD'
+--------------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_atomic_load (tree lhs,
+          tree rhs)
+     Build a `GIMPLE_OMP_ATOMIC_LOAD' statement.  `LHS' is the left-hand
+     side of the assignment.  `RHS' is the right-hand side of the
+     assignment.
+
+ -- GIMPLE function: void gimple_omp_atomic_load_set_lhs (gimple g,
+          tree lhs)
+     Set the `LHS' of an atomic load.
+
+ -- GIMPLE function: tree gimple_omp_atomic_load_lhs (gimple g)
+     Get the `LHS' of an atomic load.
+
+ -- GIMPLE function: void gimple_omp_atomic_load_set_rhs (gimple g,
+          tree rhs)
+     Set the `RHS' of an atomic set.
+
+ -- GIMPLE function: tree gimple_omp_atomic_load_rhs (gimple g)
+     Get the `RHS' of an atomic set.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_ATOMIC_STORE',  Next: `GIMPLE_OMP_CONTINUE',  Prev: `GIMPLE_OMP_ATOMIC_LOAD',  Up: Tuple specific accessors
+
+12.7.12 `GIMPLE_OMP_ATOMIC_STORE'
+---------------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_atomic_store (tree val)
+     Build a `GIMPLE_OMP_ATOMIC_STORE' statement. `VAL' is the value to
+     be stored.
+
+ -- GIMPLE function: void gimple_omp_atomic_store_set_val (gimple g,
+          tree val)
+     Set the value being stored in an atomic store.
+
+ -- GIMPLE function: tree gimple_omp_atomic_store_val (gimple g)
+     Return the value being stored in an atomic store.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_CONTINUE',  Next: `GIMPLE_OMP_CRITICAL',  Prev: `GIMPLE_OMP_ATOMIC_STORE',  Up: Tuple specific accessors
+
+12.7.13 `GIMPLE_OMP_CONTINUE'
+-----------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_continue (tree
+          control_def, tree control_use)
+     Build a `GIMPLE_OMP_CONTINUE' statement.  `CONTROL_DEF' is the
+     definition of the control variable.  `CONTROL_USE' is the use of
+     the control variable.
+
+ -- GIMPLE function: tree gimple_omp_continue_control_def (gimple s)
+     Return the definition of the control variable on a
+     `GIMPLE_OMP_CONTINUE' in `S'.
+
+ -- GIMPLE function: tree gimple_omp_continue_control_def_ptr (gimple s)
+     Same as above, but return the pointer.
+
+ -- GIMPLE function: tree gimple_omp_continue_set_control_def (gimple s)
+     Set the control variable definition for a `GIMPLE_OMP_CONTINUE'
+     statement in `S'.
+
+ -- GIMPLE function: tree gimple_omp_continue_control_use (gimple s)
+     Return the use of the control variable on a `GIMPLE_OMP_CONTINUE'
+     in `S'.
+
+ -- GIMPLE function: tree gimple_omp_continue_control_use_ptr (gimple s)
+     Same as above, but return the pointer.
+
+ -- GIMPLE function: tree gimple_omp_continue_set_control_use (gimple s)
+     Set the control variable use for a `GIMPLE_OMP_CONTINUE' statement
+     in `S'.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_CRITICAL',  Next: `GIMPLE_OMP_FOR',  Prev: `GIMPLE_OMP_CONTINUE',  Up: Tuple specific accessors
+
+12.7.14 `GIMPLE_OMP_CRITICAL'
+-----------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_critical (gimple_seq body,
+          tree name)
+     Build a `GIMPLE_OMP_CRITICAL' statement. `BODY' is the sequence of
+     statements for which only one thread can execute.  `NAME' is an
+     optional identifier for this critical block.
+
+ -- GIMPLE function: tree gimple_omp_critical_name (gimple g)
+     Return the name associated with `OMP_CRITICAL' statement `G'.
+
+ -- GIMPLE function: tree * gimple_omp_critical_name_ptr (gimple g)
+     Return a pointer to the name associated with `OMP' critical
+     statement `G'.
+
+ -- GIMPLE function: void gimple_omp_critical_set_name (gimple g, tree
+          name)
+     Set `NAME' to be the name associated with `OMP' critical statement
+     `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_FOR',  Next: `GIMPLE_OMP_MASTER',  Prev: `GIMPLE_OMP_CRITICAL',  Up: Tuple specific accessors
+
+12.7.15 `GIMPLE_OMP_FOR'
+------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_for (gimple_seq body, tree
+          clauses, tree index, tree initial, tree final, tree incr,
+          gimple_seq pre_body, enum tree_code omp_for_cond)
+     Build a `GIMPLE_OMP_FOR' statement. `BODY' is sequence of
+     statements inside the for loop.  `CLAUSES', are any of the `OMP'
+     loop construct's clauses: private, firstprivate,  lastprivate,
+     reductions, ordered, schedule, and nowait.  `PRE_BODY' is the
+     sequence of statements that are loop invariant.  `INDEX' is the
+     index variable.  `INITIAL' is the initial value of `INDEX'.
+     `FINAL' is final value of `INDEX'.  OMP_FOR_COND is the predicate
+     used to compare `INDEX' and `FINAL'.  `INCR' is the increment
+     expression.
+
+ -- GIMPLE function: tree gimple_omp_for_clauses (gimple g)
+     Return the clauses associated with `OMP_FOR' `G'.
+
+ -- GIMPLE function: tree * gimple_omp_for_clauses_ptr (gimple g)
+     Return a pointer to the `OMP_FOR' `G'.
+
+ -- GIMPLE function: void gimple_omp_for_set_clauses (gimple g, tree
+          clauses)
+     Set `CLAUSES' to be the list of clauses associated with `OMP_FOR'
+     `G'.
+
+ -- GIMPLE function: tree gimple_omp_for_index (gimple g)
+     Return the index variable for `OMP_FOR' `G'.
+
+ -- GIMPLE function: tree * gimple_omp_for_index_ptr (gimple g)
+     Return a pointer to the index variable for `OMP_FOR' `G'.
+
+ -- GIMPLE function: void gimple_omp_for_set_index (gimple g, tree
+          index)
+     Set `INDEX' to be the index variable for `OMP_FOR' `G'.
+
+ -- GIMPLE function: tree gimple_omp_for_initial (gimple g)
+     Return the initial value for `OMP_FOR' `G'.
+
+ -- GIMPLE function: tree * gimple_omp_for_initial_ptr (gimple g)
+     Return a pointer to the initial value for `OMP_FOR' `G'.
+
+ -- GIMPLE function: void gimple_omp_for_set_initial (gimple g, tree
+          initial)
+     Set `INITIAL' to be the initial value for `OMP_FOR' `G'.
+
+ -- GIMPLE function: tree gimple_omp_for_final (gimple g)
+     Return the final value for `OMP_FOR' `G'.
+
+ -- GIMPLE function: tree * gimple_omp_for_final_ptr (gimple g)
+     turn a pointer to the final value for `OMP_FOR' `G'.
+
+ -- GIMPLE function: void gimple_omp_for_set_final (gimple g, tree
+          final)
+     Set `FINAL' to be the final value for `OMP_FOR' `G'.
+
+ -- GIMPLE function: tree gimple_omp_for_incr (gimple g)
+     Return the increment value for `OMP_FOR' `G'.
+
+ -- GIMPLE function: tree * gimple_omp_for_incr_ptr (gimple g)
+     Return a pointer to the increment value for `OMP_FOR' `G'.
+
+ -- GIMPLE function: void gimple_omp_for_set_incr (gimple g, tree incr)
+     Set `INCR' to be the increment value for `OMP_FOR' `G'.
+
+ -- GIMPLE function: gimple_seq gimple_omp_for_pre_body (gimple g)
+     Return the sequence of statements to execute before the `OMP_FOR'
+     statement `G' starts.
+
+ -- GIMPLE function: void gimple_omp_for_set_pre_body (gimple g,
+          gimple_seq pre_body)
+     Set `PRE_BODY' to be the sequence of statements to execute before
+     the `OMP_FOR' statement `G' starts.
+
+ -- GIMPLE function: void gimple_omp_for_set_cond (gimple g, enum
+          tree_code cond)
+     Set `COND' to be the condition code for `OMP_FOR' `G'.
+
+ -- GIMPLE function: enum tree_code gimple_omp_for_cond (gimple g)
+     Return the condition code associated with `OMP_FOR' `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_MASTER',  Next: `GIMPLE_OMP_ORDERED',  Prev: `GIMPLE_OMP_FOR',  Up: Tuple specific accessors
+
+12.7.16 `GIMPLE_OMP_MASTER'
+---------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_master (gimple_seq body)
+     Build a `GIMPLE_OMP_MASTER' statement. `BODY' is the sequence of
+     statements to be executed by just the master.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_ORDERED',  Next: `GIMPLE_OMP_PARALLEL',  Prev: `GIMPLE_OMP_MASTER',  Up: Tuple specific accessors
+
+12.7.17 `GIMPLE_OMP_ORDERED'
+----------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_ordered (gimple_seq body)
+     Build a `GIMPLE_OMP_ORDERED' statement.
+
+ `BODY' is the sequence of statements inside a loop that will executed
+in sequence.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_PARALLEL',  Next: `GIMPLE_OMP_RETURN',  Prev: `GIMPLE_OMP_ORDERED',  Up: Tuple specific accessors
+
+12.7.18 `GIMPLE_OMP_PARALLEL'
+-----------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_parallel (gimple_seq body,
+          tree clauses, tree child_fn, tree data_arg)
+     Build a `GIMPLE_OMP_PARALLEL' statement.
+
+ `BODY' is sequence of statements which are executed in parallel.
+`CLAUSES', are the `OMP' parallel construct's clauses.  `CHILD_FN' is
+the function created for the parallel threads to execute.  `DATA_ARG'
+are the shared data argument(s).
+
+ -- GIMPLE function: bool gimple_omp_parallel_combined_p (gimple g)
+     Return true if `OMP' parallel statement `G' has the
+     `GF_OMP_PARALLEL_COMBINED' flag set.
+
+ -- GIMPLE function: void gimple_omp_parallel_set_combined_p (gimple g)
+     Set the `GF_OMP_PARALLEL_COMBINED' field in `OMP' parallel
+     statement `G'.
+
+ -- GIMPLE function: gimple_seq gimple_omp_body (gimple g)
+     Return the body for the `OMP' statement `G'.
+
+ -- GIMPLE function: void gimple_omp_set_body (gimple g, gimple_seq
+          body)
+     Set `BODY' to be the body for the `OMP' statement `G'.
+
+ -- GIMPLE function: tree gimple_omp_parallel_clauses (gimple g)
+     Return the clauses associated with `OMP_PARALLEL' `G'.
+
+ -- GIMPLE function: tree * gimple_omp_parallel_clauses_ptr (gimple g)
+     Return a pointer to the clauses associated with `OMP_PARALLEL' `G'.
+
+ -- GIMPLE function: void gimple_omp_parallel_set_clauses (gimple g,
+          tree clauses)
+     Set `CLAUSES' to be the list of clauses associated with
+     `OMP_PARALLEL' `G'.
+
+ -- GIMPLE function: tree gimple_omp_parallel_child_fn (gimple g)
+     Return the child function used to hold the body of `OMP_PARALLEL'
+     `G'.
+
+ -- GIMPLE function: tree * gimple_omp_parallel_child_fn_ptr (gimple g)
+     Return a pointer to the child function used to hold the body of
+     `OMP_PARALLEL' `G'.
+
+ -- GIMPLE function: void gimple_omp_parallel_set_child_fn (gimple g,
+          tree child_fn)
+     Set `CHILD_FN' to be the child function for `OMP_PARALLEL' `G'.
+
+ -- GIMPLE function: tree gimple_omp_parallel_data_arg (gimple g)
+     Return the artificial argument used to send variables and values
+     from the parent to the children threads in `OMP_PARALLEL' `G'.
+
+ -- GIMPLE function: tree * gimple_omp_parallel_data_arg_ptr (gimple g)
+     Return a pointer to the data argument for `OMP_PARALLEL' `G'.
+
+ -- GIMPLE function: void gimple_omp_parallel_set_data_arg (gimple g,
+          tree data_arg)
+     Set `DATA_ARG' to be the data argument for `OMP_PARALLEL' `G'.
+
+ -- GIMPLE function: bool is_gimple_omp (gimple stmt)
+     Returns true when the gimple statement `STMT' is any of the OpenMP
+     types.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_RETURN',  Next: `GIMPLE_OMP_SECTION',  Prev: `GIMPLE_OMP_PARALLEL',  Up: Tuple specific accessors
+
+12.7.19 `GIMPLE_OMP_RETURN'
+---------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_return (bool wait_p)
+     Build a `GIMPLE_OMP_RETURN' statement. `WAIT_P' is true if this is
+     a non-waiting return.
+
+ -- GIMPLE function: void gimple_omp_return_set_nowait (gimple s)
+     Set the nowait flag on `GIMPLE_OMP_RETURN' statement `S'.
+
+ -- GIMPLE function: bool gimple_omp_return_nowait_p (gimple g)
+     Return true if `OMP' return statement `G' has the
+     `GF_OMP_RETURN_NOWAIT' flag set.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_SECTION',  Next: `GIMPLE_OMP_SECTIONS',  Prev: `GIMPLE_OMP_RETURN',  Up: Tuple specific accessors
+
+12.7.20 `GIMPLE_OMP_SECTION'
+----------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_section (gimple_seq body)
+     Build a `GIMPLE_OMP_SECTION' statement for a sections statement.
+
+ `BODY' is the sequence of statements in the section.
+
+ -- GIMPLE function: bool gimple_omp_section_last_p (gimple g)
+     Return true if `OMP' section statement `G' has the
+     `GF_OMP_SECTION_LAST' flag set.
+
+ -- GIMPLE function: void gimple_omp_section_set_last (gimple g)
+     Set the `GF_OMP_SECTION_LAST' flag on `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_SECTIONS',  Next: `GIMPLE_OMP_SINGLE',  Prev: `GIMPLE_OMP_SECTION',  Up: Tuple specific accessors
+
+12.7.21 `GIMPLE_OMP_SECTIONS'
+-----------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_sections (gimple_seq body,
+          tree clauses)
+     Build a `GIMPLE_OMP_SECTIONS' statement. `BODY' is a sequence of
+     section statements.  `CLAUSES' are any of the `OMP' sections
+     construct's clauses: private, firstprivate, lastprivate,
+     reduction, and nowait.
+
+ -- GIMPLE function: gimple gimple_build_omp_sections_switch (void)
+     Build a `GIMPLE_OMP_SECTIONS_SWITCH' statement.
+
+ -- GIMPLE function: tree gimple_omp_sections_control (gimple g)
+     Return the control variable associated with the
+     `GIMPLE_OMP_SECTIONS' in `G'.
+
+ -- GIMPLE function: tree * gimple_omp_sections_control_ptr (gimple g)
+     Return a pointer to the clauses associated with the
+     `GIMPLE_OMP_SECTIONS' in `G'.
+
+ -- GIMPLE function: void gimple_omp_sections_set_control (gimple g,
+          tree control)
+     Set `CONTROL' to be the set of clauses associated with the
+     `GIMPLE_OMP_SECTIONS' in `G'.
+
+ -- GIMPLE function: tree gimple_omp_sections_clauses (gimple g)
+     Return the clauses associated with `OMP_SECTIONS' `G'.
+
+ -- GIMPLE function: tree * gimple_omp_sections_clauses_ptr (gimple g)
+     Return a pointer to the clauses associated with `OMP_SECTIONS' `G'.
+
+ -- GIMPLE function: void gimple_omp_sections_set_clauses (gimple g,
+          tree clauses)
+     Set `CLAUSES' to be the set of clauses associated with
+     `OMP_SECTIONS' `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_SINGLE',  Next: `GIMPLE_PHI',  Prev: `GIMPLE_OMP_SECTIONS',  Up: Tuple specific accessors
+
+12.7.22 `GIMPLE_OMP_SINGLE'
+---------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_single (gimple_seq body,
+          tree clauses)
+     Build a `GIMPLE_OMP_SINGLE' statement. `BODY' is the sequence of
+     statements that will be executed once.  `CLAUSES' are any of the
+     `OMP' single construct's clauses: private, firstprivate,
+     copyprivate, nowait.
+
+ -- GIMPLE function: tree gimple_omp_single_clauses (gimple g)
+     Return the clauses associated with `OMP_SINGLE' `G'.
+
+ -- GIMPLE function: tree * gimple_omp_single_clauses_ptr (gimple g)
+     Return a pointer to the clauses associated with `OMP_SINGLE' `G'.
+
+ -- GIMPLE function: void gimple_omp_single_set_clauses (gimple g, tree
+          clauses)
+     Set `CLAUSES' to be the clauses associated with `OMP_SINGLE' `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_PHI',  Next: `GIMPLE_RESX',  Prev: `GIMPLE_OMP_SINGLE',  Up: Tuple specific accessors
+
+12.7.23 `GIMPLE_PHI'
+--------------------
+
+ -- GIMPLE function: gimple make_phi_node (tree var, int len)
+     Build a `PHI' node with len argument slots for variable var.
+
+ -- GIMPLE function: unsigned gimple_phi_capacity (gimple g)
+     Return the maximum number of arguments supported by `GIMPLE_PHI'
+     `G'.
+
+ -- GIMPLE function: unsigned gimple_phi_num_args (gimple g)
+     Return the number of arguments in `GIMPLE_PHI' `G'. This must
+     always be exactly the number of incoming edges for the basic block
+     holding `G'.
+
+ -- GIMPLE function: tree gimple_phi_result (gimple g)
+     Return the `SSA' name created by `GIMPLE_PHI' `G'.
+
+ -- GIMPLE function: tree * gimple_phi_result_ptr (gimple g)
+     Return a pointer to the `SSA' name created by `GIMPLE_PHI' `G'.
+
+ -- GIMPLE function: void gimple_phi_set_result (gimple g, tree result)
+     Set `RESULT' to be the `SSA' name created by `GIMPLE_PHI' `G'.
+
+ -- GIMPLE function: struct phi_arg_d * gimple_phi_arg (gimple g, index)
+     Return the `PHI' argument corresponding to incoming edge `INDEX'
+     for `GIMPLE_PHI' `G'.
+
+ -- GIMPLE function: void gimple_phi_set_arg (gimple g, index, struct
+          phi_arg_d * phiarg)
+     Set `PHIARG' to be the argument corresponding to incoming edge
+     `INDEX' for `GIMPLE_PHI' `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_RESX',  Next: `GIMPLE_RETURN',  Prev: `GIMPLE_PHI',  Up: Tuple specific accessors
+
+12.7.24 `GIMPLE_RESX'
+---------------------
+
+ -- GIMPLE function: gimple gimple_build_resx (int region)
+     Build a `GIMPLE_RESX' statement which is a statement.  This
+     statement is a placeholder for _Unwind_Resume before we know if a
+     function call or a branch is needed.  `REGION' is the exception
+     region from which control is flowing.
+
+ -- GIMPLE function: int gimple_resx_region (gimple g)
+     Return the region number for `GIMPLE_RESX' `G'.
+
+ -- GIMPLE function: void gimple_resx_set_region (gimple g, int region)
+     Set `REGION' to be the region number for `GIMPLE_RESX' `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_RETURN',  Next: `GIMPLE_SWITCH',  Prev: `GIMPLE_RESX',  Up: Tuple specific accessors
+
+12.7.25 `GIMPLE_RETURN'
+-----------------------
+
+ -- GIMPLE function: gimple gimple_build_return (tree retval)
+     Build a `GIMPLE_RETURN' statement whose return value is retval.
+
+ -- GIMPLE function: tree gimple_return_retval (gimple g)
+     Return the return value for `GIMPLE_RETURN' `G'.
+
+ -- GIMPLE function: void gimple_return_set_retval (gimple g, tree
+          retval)
+     Set `RETVAL' to be the return value for `GIMPLE_RETURN' `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_SWITCH',  Next: `GIMPLE_TRY',  Prev: `GIMPLE_RETURN',  Up: Tuple specific accessors
+
+12.7.26 `GIMPLE_SWITCH'
+-----------------------
+
+ -- GIMPLE function: gimple gimple_build_switch (unsigned nlabels, tree
+          index, tree default_label, ...)
+     Build a `GIMPLE_SWITCH' statement.  `NLABELS' are the number of
+     labels excluding the default label.  The default label is passed
+     in `DEFAULT_LABEL'.  The rest of the arguments are trees
+     representing the labels.  Each label is a tree of code
+     `CASE_LABEL_EXPR'.
+
+ -- GIMPLE function: gimple gimple_build_switch_vec (tree index, tree
+          default_label, `VEC'(tree,heap) *args)
+     This function is an alternate way of building `GIMPLE_SWITCH'
+     statements.  `INDEX' and `DEFAULT_LABEL' are as in
+     gimple_build_switch.  `ARGS' is a vector of `CASE_LABEL_EXPR' trees
+     that contain the labels.
+
+ -- GIMPLE function: unsigned gimple_switch_num_labels (gimple g)
+     Return the number of labels associated with the switch statement
+     `G'.
+
+ -- GIMPLE function: void gimple_switch_set_num_labels (gimple g,
+          unsigned nlabels)
+     Set `NLABELS' to be the number of labels for the switch statement
+     `G'.
+
+ -- GIMPLE function: tree gimple_switch_index (gimple g)
+     Return the index variable used by the switch statement `G'.
+
+ -- GIMPLE function: void gimple_switch_set_index (gimple g, tree index)
+     Set `INDEX' to be the index variable for switch statement `G'.
+
+ -- GIMPLE function: tree gimple_switch_label (gimple g, unsigned index)
+     Return the label numbered `INDEX'. The default label is 0, followed
+     by any labels in a switch statement.
+
+ -- GIMPLE function: void gimple_switch_set_label (gimple g, unsigned
+          index, tree label)
+     Set the label number `INDEX' to `LABEL'. 0 is always the default
+     label.
+
+ -- GIMPLE function: tree gimple_switch_default_label (gimple g)
+     Return the default label for a switch statement.
+
+ -- GIMPLE function: void gimple_switch_set_default_label (gimple g,
+          tree label)
+     Set the default label for a switch statement.
+
+
+File: gccint.info,  Node: `GIMPLE_TRY',  Next: `GIMPLE_WITH_CLEANUP_EXPR',  Prev: `GIMPLE_SWITCH',  Up: Tuple specific accessors
+
+12.7.27 `GIMPLE_TRY'
+--------------------
+
+ -- GIMPLE function: gimple gimple_build_try (gimple_seq eval,
+          gimple_seq cleanup, unsigned int kind)
+     Build a `GIMPLE_TRY' statement.  `EVAL' is a sequence with the
+     expression to evaluate.  `CLEANUP' is a sequence of statements to
+     run at clean-up time.  `KIND' is the enumeration value
+     `GIMPLE_TRY_CATCH' if this statement denotes a try/catch construct
+     or `GIMPLE_TRY_FINALLY' if this statement denotes a try/finally
+     construct.
+
+ -- GIMPLE function: enum gimple_try_flags gimple_try_kind (gimple g)
+     Return the kind of try block represented by `GIMPLE_TRY' `G'. This
+     is either `GIMPLE_TRY_CATCH' or `GIMPLE_TRY_FINALLY'.
+
+ -- GIMPLE function: bool gimple_try_catch_is_cleanup (gimple g)
+     Return the `GIMPLE_TRY_CATCH_IS_CLEANUP' flag.
+
+ -- GIMPLE function: gimple_seq gimple_try_eval (gimple g)
+     Return the sequence of statements used as the body for `GIMPLE_TRY'
+     `G'.
+
+ -- GIMPLE function: gimple_seq gimple_try_cleanup (gimple g)
+     Return the sequence of statements used as the cleanup body for
+     `GIMPLE_TRY' `G'.
+
+ -- GIMPLE function: void gimple_try_set_catch_is_cleanup (gimple g,
+          bool catch_is_cleanup)
+     Set the `GIMPLE_TRY_CATCH_IS_CLEANUP' flag.
+
+ -- GIMPLE function: void gimple_try_set_eval (gimple g, gimple_seq
+          eval)
+     Set `EVAL' to be the sequence of statements to use as the body for
+     `GIMPLE_TRY' `G'.
+
+ -- GIMPLE function: void gimple_try_set_cleanup (gimple g, gimple_seq
+          cleanup)
+     Set `CLEANUP' to be the sequence of statements to use as the
+     cleanup body for `GIMPLE_TRY' `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_WITH_CLEANUP_EXPR',  Prev: `GIMPLE_TRY',  Up: Tuple specific accessors
+
+12.7.28 `GIMPLE_WITH_CLEANUP_EXPR'
+----------------------------------
+
+ -- GIMPLE function: gimple gimple_build_wce (gimple_seq cleanup)
+     Build a `GIMPLE_WITH_CLEANUP_EXPR' statement.  `CLEANUP' is the
+     clean-up expression.
+
+ -- GIMPLE function: gimple_seq gimple_wce_cleanup (gimple g)
+     Return the cleanup sequence for cleanup statement `G'.
+
+ -- GIMPLE function: void gimple_wce_set_cleanup (gimple g, gimple_seq
+          cleanup)
+     Set `CLEANUP' to be the cleanup sequence for `G'.
+
+ -- GIMPLE function: bool gimple_wce_cleanup_eh_only (gimple g)
+     Return the `CLEANUP_EH_ONLY' flag for a `WCE' tuple.
+
+ -- GIMPLE function: void gimple_wce_set_cleanup_eh_only (gimple g,
+          bool eh_only_p)
+     Set the `CLEANUP_EH_ONLY' flag for a `WCE' tuple.
+
+
+File: gccint.info,  Node: GIMPLE sequences,  Next: Sequence iterators,  Prev: Tuple specific accessors,  Up: GIMPLE
+
+12.8 GIMPLE sequences
+=====================
+
+GIMPLE sequences are the tuple equivalent of `STATEMENT_LIST''s used in
+`GENERIC'.  They are used to chain statements together, and when used
+in conjunction with sequence iterators, provide a framework for
+iterating through statements.
+
+ GIMPLE sequences are of type struct `gimple_sequence', but are more
+commonly passed by reference to functions dealing with sequences.  The
+type for a sequence pointer is `gimple_seq' which is the same as struct
+`gimple_sequence' *.  When declaring a local sequence, you can define a
+local variable of type struct `gimple_sequence'.  When declaring a
+sequence allocated on the garbage collected heap, use the function
+`gimple_seq_alloc' documented below.
+
+ There are convenience functions for iterating through sequences in the
+section entitled Sequence Iterators.
+
+ Below is a list of functions to manipulate and query sequences.
+
+ -- GIMPLE function: void gimple_seq_add_stmt (gimple_seq *seq, gimple
+          g)
+     Link a gimple statement to the end of the sequence *`SEQ' if `G' is
+     not `NULL'.  If *`SEQ' is `NULL', allocate a sequence before
+     linking.
+
+ -- GIMPLE function: void gimple_seq_add_seq (gimple_seq *dest,
+          gimple_seq src)
+     Append sequence `SRC' to the end of sequence *`DEST' if `SRC' is
+     not `NULL'.  If *`DEST' is `NULL', allocate a new sequence before
+     appending.
+
+ -- GIMPLE function: gimple_seq gimple_seq_deep_copy (gimple_seq src)
+     Perform a deep copy of sequence `SRC' and return the result.
+
+ -- GIMPLE function: gimple_seq gimple_seq_reverse (gimple_seq seq)
+     Reverse the order of the statements in the sequence `SEQ'.  Return
+     `SEQ'.
+
+ -- GIMPLE function: gimple gimple_seq_first (gimple_seq s)
+     Return the first statement in sequence `S'.
+
+ -- GIMPLE function: gimple gimple_seq_last (gimple_seq s)
+     Return the last statement in sequence `S'.
+
+ -- GIMPLE function: void gimple_seq_set_last (gimple_seq s, gimple
+          last)
+     Set the last statement in sequence `S' to the statement in `LAST'.
+
+ -- GIMPLE function: void gimple_seq_set_first (gimple_seq s, gimple
+          first)
+     Set the first statement in sequence `S' to the statement in
+     `FIRST'.
+
+ -- GIMPLE function: void gimple_seq_init (gimple_seq s)
+     Initialize sequence `S' to an empty sequence.
+
+ -- GIMPLE function: gimple_seq gimple_seq_alloc (void)
+     Allocate a new sequence in the garbage collected store and return
+     it.
+
+ -- GIMPLE function: void gimple_seq_copy (gimple_seq dest, gimple_seq
+          src)
+     Copy the sequence `SRC' into the sequence `DEST'.
+
+ -- GIMPLE function: bool gimple_seq_empty_p (gimple_seq s)
+     Return true if the sequence `S' is empty.
+
+ -- GIMPLE function: gimple_seq bb_seq (basic_block bb)
+     Returns the sequence of statements in `BB'.
+
+ -- GIMPLE function: void set_bb_seq (basic_block bb, gimple_seq seq)
+     Sets the sequence of statements in `BB' to `SEQ'.
+
+ -- GIMPLE function: bool gimple_seq_singleton_p (gimple_seq seq)
+     Determine whether `SEQ' contains exactly one statement.
+
+
+File: gccint.info,  Node: Sequence iterators,  Next: Adding a new GIMPLE statement code,  Prev: GIMPLE sequences,  Up: GIMPLE
+
+12.9 Sequence iterators
+=======================
+
+Sequence iterators are convenience constructs for iterating through
+statements in a sequence.  Given a sequence `SEQ', here is a typical
+use of gimple sequence iterators:
+
+     gimple_stmt_iterator gsi;
+
+     for (gsi = gsi_start (seq); !gsi_end_p (gsi); gsi_next (&gsi))
+       {
+         gimple g = gsi_stmt (gsi);
+         /* Do something with gimple statement `G'.  */
+       }
+
+ Backward iterations are possible:
+
+             for (gsi = gsi_last (seq); !gsi_end_p (gsi); gsi_prev (&gsi))
+
+ Forward and backward iterations on basic blocks are possible with
+`gsi_start_bb' and `gsi_last_bb'.
+
+ In the documentation below we sometimes refer to enum
+`gsi_iterator_update'.  The valid options for this enumeration are:
+
+   * `GSI_NEW_STMT' Only valid when a single statement is added.  Move
+     the iterator to it.
+
+   * `GSI_SAME_STMT' Leave the iterator at the same statement.
+
+   * `GSI_CONTINUE_LINKING' Move iterator to whatever position is
+     suitable for linking other statements in the same direction.
+
+ Below is a list of the functions used to manipulate and use statement
+iterators.
+
+ -- GIMPLE function: gimple_stmt_iterator gsi_start (gimple_seq seq)
+     Return a new iterator pointing to the sequence `SEQ''s first
+     statement.  If `SEQ' is empty, the iterator's basic block is
+     `NULL'.  Use `gsi_start_bb' instead when the iterator needs to
+     always have the correct basic block set.
+
+ -- GIMPLE function: gimple_stmt_iterator gsi_start_bb (basic_block bb)
+     Return a new iterator pointing to the first statement in basic
+     block `BB'.
+
+ -- GIMPLE function: gimple_stmt_iterator gsi_last (gimple_seq seq)
+     Return a new iterator initially pointing to the last statement of
+     sequence `SEQ'.  If `SEQ' is empty, the iterator's basic block is
+     `NULL'.  Use `gsi_last_bb' instead when the iterator needs to
+     always have the correct basic block set.
+
+ -- GIMPLE function: gimple_stmt_iterator gsi_last_bb (basic_block bb)
+     Return a new iterator pointing to the last statement in basic
+     block `BB'.
+
+ -- GIMPLE function: bool gsi_end_p (gimple_stmt_iterator i)
+     Return `TRUE' if at the end of `I'.
+
+ -- GIMPLE function: bool gsi_one_before_end_p (gimple_stmt_iterator i)
+     Return `TRUE' if we're one statement before the end of `I'.
+
+ -- GIMPLE function: void gsi_next (gimple_stmt_iterator *i)
+     Advance the iterator to the next gimple statement.
+
+ -- GIMPLE function: void gsi_prev (gimple_stmt_iterator *i)
+     Advance the iterator to the previous gimple statement.
+
+ -- GIMPLE function: gimple gsi_stmt (gimple_stmt_iterator i)
+     Return the current stmt.
+
+ -- GIMPLE function: gimple_stmt_iterator gsi_after_labels (basic_block
+          bb)
+     Return a block statement iterator that points to the first
+     non-label statement in block `BB'.
+
+ -- GIMPLE function: gimple * gsi_stmt_ptr (gimple_stmt_iterator *i)
+     Return a pointer to the current stmt.
+
+ -- GIMPLE function: basic_block gsi_bb (gimple_stmt_iterator i)
+     Return the basic block associated with this iterator.
+
+ -- GIMPLE function: gimple_seq gsi_seq (gimple_stmt_iterator i)
+     Return the sequence associated with this iterator.
+
+ -- GIMPLE function: void gsi_remove (gimple_stmt_iterator *i, bool
+          remove_eh_info)
+     Remove the current stmt from the sequence.  The iterator is
+     updated to point to the next statement.  When `REMOVE_EH_INFO' is
+     true we remove the statement pointed to by iterator `I' from the
+     `EH' tables.  Otherwise we do not modify the `EH' tables.
+     Generally, `REMOVE_EH_INFO' should be true when the statement is
+     going to be removed from the `IL' and not reinserted elsewhere.
+
+ -- GIMPLE function: void gsi_link_seq_before (gimple_stmt_iterator *i,
+          gimple_seq seq, enum gsi_iterator_update mode)
+     Links the sequence of statements `SEQ' before the statement pointed
+     by iterator `I'.  `MODE' indicates what to do with the iterator
+     after insertion (see `enum gsi_iterator_update' above).
+
+ -- GIMPLE function: void gsi_link_before (gimple_stmt_iterator *i,
+          gimple g, enum gsi_iterator_update mode)
+     Links statement `G' before the statement pointed-to by iterator
+     `I'.  Updates iterator `I' according to `MODE'.
+
+ -- GIMPLE function: void gsi_link_seq_after (gimple_stmt_iterator *i,
+          gimple_seq seq, enum gsi_iterator_update mode)
+     Links sequence `SEQ' after the statement pointed-to by iterator
+     `I'.  `MODE' is as in `gsi_insert_after'.
+
+ -- GIMPLE function: void gsi_link_after (gimple_stmt_iterator *i,
+          gimple g, enum gsi_iterator_update mode)
+     Links statement `G' after the statement pointed-to by iterator `I'.
+     `MODE' is as in `gsi_insert_after'.
+
+ -- GIMPLE function: gimple_seq gsi_split_seq_after
+          (gimple_stmt_iterator i)
+     Move all statements in the sequence after `I' to a new sequence.
+     Return this new sequence.
+
+ -- GIMPLE function: gimple_seq gsi_split_seq_before
+          (gimple_stmt_iterator *i)
+     Move all statements in the sequence before `I' to a new sequence.
+     Return this new sequence.
+
+ -- GIMPLE function: void gsi_replace (gimple_stmt_iterator *i, gimple
+          stmt, bool update_eh_info)
+     Replace the statement pointed-to by `I' to `STMT'.  If
+     `UPDATE_EH_INFO' is true, the exception handling information of
+     the original statement is moved to the new statement.
+
+ -- GIMPLE function: void gsi_insert_before (gimple_stmt_iterator *i,
+          gimple stmt, enum gsi_iterator_update mode)
+     Insert statement `STMT' before the statement pointed-to by iterator
+     `I', update `STMT''s basic block and scan it for new operands.
+     `MODE' specifies how to update iterator `I' after insertion (see
+     enum `gsi_iterator_update').
+
+ -- GIMPLE function: void gsi_insert_seq_before (gimple_stmt_iterator
+          *i, gimple_seq seq, enum gsi_iterator_update mode)
+     Like `gsi_insert_before', but for all the statements in `SEQ'.
+
+ -- GIMPLE function: void gsi_insert_after (gimple_stmt_iterator *i,
+          gimple stmt, enum gsi_iterator_update mode)
+     Insert statement `STMT' after the statement pointed-to by iterator
+     `I', update `STMT''s basic block and scan it for new operands.
+     `MODE' specifies how to update iterator `I' after insertion (see
+     enum `gsi_iterator_update').
+
+ -- GIMPLE function: void gsi_insert_seq_after (gimple_stmt_iterator
+          *i, gimple_seq seq, enum gsi_iterator_update mode)
+     Like `gsi_insert_after', but for all the statements in `SEQ'.
+
+ -- GIMPLE function: gimple_stmt_iterator gsi_for_stmt (gimple stmt)
+     Finds iterator for `STMT'.
+
+ -- GIMPLE function: void gsi_move_after (gimple_stmt_iterator *from,
+          gimple_stmt_iterator *to)
+     Move the statement at `FROM' so it comes right after the statement
+     at `TO'.
+
+ -- GIMPLE function: void gsi_move_before (gimple_stmt_iterator *from,
+          gimple_stmt_iterator *to)
+     Move the statement at `FROM' so it comes right before the statement
+     at `TO'.
+
+ -- GIMPLE function: void gsi_move_to_bb_end (gimple_stmt_iterator
+          *from, basic_block bb)
+     Move the statement at `FROM' to the end of basic block `BB'.
+
+ -- GIMPLE function: void gsi_insert_on_edge (edge e, gimple stmt)
+     Add `STMT' to the pending list of edge `E'.  No actual insertion is
+     made until a call to `gsi_commit_edge_inserts'() is made.
+
+ -- GIMPLE function: void gsi_insert_seq_on_edge (edge e, gimple_seq
+          seq)
+     Add the sequence of statements in `SEQ' to the pending list of edge
+     `E'.  No actual insertion is made until a call to
+     `gsi_commit_edge_inserts'() is made.
+
+ -- GIMPLE function: basic_block gsi_insert_on_edge_immediate (edge e,
+          gimple stmt)
+     Similar to `gsi_insert_on_edge'+`gsi_commit_edge_inserts'.  If a
+     new block has to be created, it is returned.
+
+ -- GIMPLE function: void gsi_commit_one_edge_insert (edge e,
+          basic_block *new_bb)
+     Commit insertions pending at edge `E'.  If a new block is created,
+     set `NEW_BB' to this block, otherwise set it to `NULL'.
+
+ -- GIMPLE function: void gsi_commit_edge_inserts (void)
+     This routine will commit all pending edge insertions, creating any
+     new basic blocks which are necessary.
+
+
+File: gccint.info,  Node: Adding a new GIMPLE statement code,  Next: Statement and operand traversals,  Prev: Sequence iterators,  Up: GIMPLE
+
+12.10 Adding a new GIMPLE statement code
+========================================
+
+The first step in adding a new GIMPLE statement code, is modifying the
+file `gimple.def', which contains all the GIMPLE codes.  Then you must
+add a corresponding structure, and an entry in `union
+gimple_statement_d', both of which are located in `gimple.h'.  This in
+turn, will require you to add a corresponding `GTY' tag in
+`gsstruct.def', and code to handle this tag in `gss_for_code' which is
+located in `gimple.c'.
+
+ In order for the garbage collector to know the size of the structure
+you created in `gimple.h', you need to add a case to handle your new
+GIMPLE statement in `gimple_size' which is located in `gimple.c'.
+
+ You will probably want to create a function to build the new gimple
+statement in `gimple.c'.  The function should be called
+`gimple_build_NEW-TUPLE-NAME', and should return the new tuple of type
+gimple.
+
+ If your new statement requires accessors for any members or operands
+it may have, put simple inline accessors in `gimple.h' and any
+non-trivial accessors in `gimple.c' with a corresponding prototype in
+`gimple.h'.
+
+
+File: gccint.info,  Node: Statement and operand traversals,  Prev: Adding a new GIMPLE statement code,  Up: GIMPLE
+
+12.11 Statement and operand traversals
+======================================
+
+There are two functions available for walking statements and sequences:
+`walk_gimple_stmt' and `walk_gimple_seq', accordingly, and a third
+function for walking the operands in a statement: `walk_gimple_op'.
+
+ -- GIMPLE function: tree walk_gimple_stmt (gimple_stmt_iterator *gsi,
+          walk_stmt_fn callback_stmt, walk_tree_fn callback_op, struct
+          walk_stmt_info *wi)
+     This function is used to walk the current statement in `GSI',
+     optionally using traversal state stored in `WI'.  If `WI' is
+     `NULL', no state is kept during the traversal.
+
+     The callback `CALLBACK_STMT' is called.  If `CALLBACK_STMT' returns
+     true, it means that the callback function has handled all the
+     operands of the statement and it is not necessary to walk its
+     operands.
+
+     If `CALLBACK_STMT' is `NULL' or it returns false, `CALLBACK_OP' is
+     called on each operand of the statement via `walk_gimple_op'.  If
+     `walk_gimple_op' returns non-`NULL' for any operand, the remaining
+     operands are not scanned.
+
+     The return value is that returned by the last call to
+     `walk_gimple_op', or `NULL_TREE' if no `CALLBACK_OP' is specified.
+
+ -- GIMPLE function: tree walk_gimple_op (gimple stmt, walk_tree_fn
+          callback_op, struct walk_stmt_info *wi)
+     Use this function to walk the operands of statement `STMT'.  Every
+     operand is walked via `walk_tree' with optional state information
+     in `WI'.
+
+     `CALLBACK_OP' is called on each operand of `STMT' via `walk_tree'.
+     Additional parameters to `walk_tree' must be stored in `WI'.  For
+     each operand `OP', `walk_tree' is called as:
+
+          walk_tree (&`OP', `CALLBACK_OP', `WI', `PSET')
+
+     If `CALLBACK_OP' returns non-`NULL' for an operand, the remaining
+     operands are not scanned.  The return value is that returned by
+     the last call to `walk_tree', or `NULL_TREE' if no `CALLBACK_OP' is
+     specified.
+
+ -- GIMPLE function: tree walk_gimple_seq (gimple_seq seq, walk_stmt_fn
+          callback_stmt, walk_tree_fn callback_op, struct
+          walk_stmt_info *wi)
+     This function walks all the statements in the sequence `SEQ'
+     calling `walk_gimple_stmt' on each one.  `WI' is as in
+     `walk_gimple_stmt'.  If `walk_gimple_stmt' returns non-`NULL', the
+     walk is stopped and the value returned.  Otherwise, all the
+     statements are walked and `NULL_TREE' returned.
+
+
+File: gccint.info,  Node: Tree SSA,  Next: RTL,  Prev: GIMPLE,  Up: Top
+
+13 Analysis and Optimization of GIMPLE tuples
+*********************************************
+
+GCC uses three main intermediate languages to represent the program
+during compilation: GENERIC, GIMPLE and RTL.  GENERIC is a
+language-independent representation generated by each front end.  It is
+used to serve as an interface between the parser and optimizer.
+GENERIC is a common representation that is able to represent programs
+written in all the languages supported by GCC.
+
+ GIMPLE and RTL are used to optimize the program.  GIMPLE is used for
+target and language independent optimizations (e.g., inlining, constant
+propagation, tail call elimination, redundancy elimination, etc).  Much
+like GENERIC, GIMPLE is a language independent, tree based
+representation.  However, it differs from GENERIC in that the GIMPLE
+grammar is more restrictive: expressions contain no more than 3
+operands (except function calls), it has no control flow structures and
+expressions with side-effects are only allowed on the right hand side
+of assignments.  See the chapter describing GENERIC and GIMPLE for more
+details.
+
+ This chapter describes the data structures and functions used in the
+GIMPLE optimizers (also known as "tree optimizers" or "middle end").
+In particular, it focuses on all the macros, data structures, functions
+and programming constructs needed to implement optimization passes for
+GIMPLE.
+
+* Menu:
+
+* Annotations::         Attributes for variables.
+* SSA Operands::        SSA names referenced by GIMPLE statements.
+* SSA::                 Static Single Assignment representation.
+* Alias analysis::      Representing aliased loads and stores.
+* Memory model::        Memory model used by the middle-end.
+
+
+File: gccint.info,  Node: Annotations,  Next: SSA Operands,  Up: Tree SSA
+
+13.1 Annotations
+================
+
+The optimizers need to associate attributes with variables during the
+optimization process.  For instance, we need to know whether a variable
+has aliases.  All these attributes are stored in data structures called
+annotations which are then linked to the field `ann' in `struct
+tree_common'.
+
+ Presently, we define annotations for variables (`var_ann_t').
+Annotations are defined and documented in `tree-flow.h'.
+
+
+File: gccint.info,  Node: SSA Operands,  Next: SSA,  Prev: Annotations,  Up: Tree SSA
+
+13.2 SSA Operands
+=================
+
+Almost every GIMPLE statement will contain a reference to a variable or
+memory location.  Since statements come in different shapes and sizes,
+their operands are going to be located at various spots inside the
+statement's tree.  To facilitate access to the statement's operands,
+they are organized into lists associated inside each statement's
+annotation.  Each element in an operand list is a pointer to a
+`VAR_DECL', `PARM_DECL' or `SSA_NAME' tree node.  This provides a very
+convenient way of examining and replacing operands.
+
+ Data flow analysis and optimization is done on all tree nodes
+representing variables.  Any node for which `SSA_VAR_P' returns nonzero
+is considered when scanning statement operands.  However, not all
+`SSA_VAR_P' variables are processed in the same way.  For the purposes
+of optimization, we need to distinguish between references to local
+scalar variables and references to globals, statics, structures,
+arrays, aliased variables, etc.  The reason is simple, the compiler can
+gather complete data flow information for a local scalar.  On the other
+hand, a global variable may be modified by a function call, it may not
+be possible to keep track of all the elements of an array or the fields
+of a structure, etc.
+
+ The operand scanner gathers two kinds of operands: "real" and
+"virtual".  An operand for which `is_gimple_reg' returns true is
+considered real, otherwise it is a virtual operand.  We also
+distinguish between uses and definitions.  An operand is used if its
+value is loaded by the statement (e.g., the operand at the RHS of an
+assignment).  If the statement assigns a new value to the operand, the
+operand is considered a definition (e.g., the operand at the LHS of an
+assignment).
+
+ Virtual and real operands also have very different data flow
+properties.  Real operands are unambiguous references to the full
+object that they represent.  For instance, given
+
+     {
+       int a, b;
+       a = b
+     }
+
+ Since `a' and `b' are non-aliased locals, the statement `a = b' will
+have one real definition and one real use because variable `a' is
+completely modified with the contents of variable `b'.  Real definition
+are also known as "killing definitions".  Similarly, the use of `b'
+reads all its bits.
+
+ In contrast, virtual operands are used with variables that can have a
+partial or ambiguous reference.  This includes structures, arrays,
+globals, and aliased variables.  In these cases, we have two types of
+definitions.  For globals, structures, and arrays, we can determine from
+a statement whether a variable of these types has a killing definition.
+If the variable does, then the statement is marked as having a "must
+definition" of that variable.  However, if a statement is only defining
+a part of the variable (i.e. a field in a structure), or if we know
+that a statement might define the variable but we cannot say for sure,
+then we mark that statement as having a "may definition".  For
+instance, given
+
+     {
+       int a, b, *p;
+
+       if (...)
+         p = &a;
+       else
+         p = &b;
+       *p = 5;
+       return *p;
+     }
+
+ The assignment `*p = 5' may be a definition of `a' or `b'.  If we
+cannot determine statically where `p' is pointing to at the time of the
+store operation, we create virtual definitions to mark that statement
+as a potential definition site for `a' and `b'.  Memory loads are
+similarly marked with virtual use operands.  Virtual operands are shown
+in tree dumps right before the statement that contains them.  To
+request a tree dump with virtual operands, use the `-vops' option to
+`-fdump-tree':
+
+     {
+       int a, b, *p;
+
+       if (...)
+         p = &a;
+       else
+         p = &b;
+       # a = VDEF <a>
+       # b = VDEF <b>
+       *p = 5;
+
+       # VUSE <a>
+       # VUSE <b>
+       return *p;
+     }
+
+ Notice that `VDEF' operands have two copies of the referenced
+variable.  This indicates that this is not a killing definition of that
+variable.  In this case we refer to it as a "may definition" or
+"aliased store".  The presence of the second copy of the variable in
+the `VDEF' operand will become important when the function is converted
+into SSA form.  This will be used to link all the non-killing
+definitions to prevent optimizations from making incorrect assumptions
+about them.
+
+ Operands are updated as soon as the statement is finished via a call
+to `update_stmt'.  If statement elements are changed via `SET_USE' or
+`SET_DEF', then no further action is required (i.e., those macros take
+care of updating the statement).  If changes are made by manipulating
+the statement's tree directly, then a call must be made to
+`update_stmt' when complete.  Calling one of the `bsi_insert' routines
+or `bsi_replace' performs an implicit call to `update_stmt'.
+
+13.2.1 Operand Iterators And Access Routines
+--------------------------------------------
+
+Operands are collected by `tree-ssa-operands.c'.  They are stored
+inside each statement's annotation and can be accessed through either
+the operand iterators or an access routine.
+
+ The following access routines are available for examining operands:
+
+  1. `SINGLE_SSA_{USE,DEF,TREE}_OPERAND': These accessors will return
+     NULL unless there is exactly one operand matching the specified
+     flags.  If there is exactly one operand, the operand is returned
+     as either a `tree', `def_operand_p', or `use_operand_p'.
+
+          tree t = SINGLE_SSA_TREE_OPERAND (stmt, flags);
+          use_operand_p u = SINGLE_SSA_USE_OPERAND (stmt, SSA_ALL_VIRTUAL_USES);
+          def_operand_p d = SINGLE_SSA_DEF_OPERAND (stmt, SSA_OP_ALL_DEFS);
+
+  2. `ZERO_SSA_OPERANDS': This macro returns true if there are no
+     operands matching the specified flags.
+
+          if (ZERO_SSA_OPERANDS (stmt, SSA_OP_ALL_VIRTUALS))
+            return;
+
+  3. `NUM_SSA_OPERANDS': This macro Returns the number of operands
+     matching 'flags'.  This actually executes a loop to perform the
+     count, so only use this if it is really needed.
+
+          int count = NUM_SSA_OPERANDS (stmt, flags)
+
+ If you wish to iterate over some or all operands, use the
+`FOR_EACH_SSA_{USE,DEF,TREE}_OPERAND' iterator.  For example, to print
+all the operands for a statement:
+
+     void
+     print_ops (tree stmt)
+     {
+       ssa_op_iter;
+       tree var;
+
+       FOR_EACH_SSA_TREE_OPERAND (var, stmt, iter, SSA_OP_ALL_OPERANDS)
+         print_generic_expr (stderr, var, TDF_SLIM);
+     }
+
+ How to choose the appropriate iterator:
+
+  1. Determine whether you are need to see the operand pointers, or
+     just the trees, and choose the appropriate macro:
+
+          Need            Macro:
+          ----            -------
+          use_operand_p   FOR_EACH_SSA_USE_OPERAND
+          def_operand_p   FOR_EACH_SSA_DEF_OPERAND
+          tree            FOR_EACH_SSA_TREE_OPERAND
+
+  2. You need to declare a variable of the type you are interested in,
+     and an ssa_op_iter structure which serves as the loop controlling
+     variable.
+
+  3. Determine which operands you wish to use, and specify the flags of
+     those you are interested in.  They are documented in
+     `tree-ssa-operands.h':
+
+          #define SSA_OP_USE              0x01    /* Real USE operands.  */
+          #define SSA_OP_DEF              0x02    /* Real DEF operands.  */
+          #define SSA_OP_VUSE             0x04    /* VUSE operands.  */
+          #define SSA_OP_VMAYUSE          0x08    /* USE portion of VDEFS.  */
+          #define SSA_OP_VDEF             0x10    /* DEF portion of VDEFS.  */
+
+          /* These are commonly grouped operand flags.  */
+          #define SSA_OP_VIRTUAL_USES     (SSA_OP_VUSE | SSA_OP_VMAYUSE)
+          #define SSA_OP_VIRTUAL_DEFS     (SSA_OP_VDEF)
+          #define SSA_OP_ALL_USES         (SSA_OP_VIRTUAL_USES | SSA_OP_USE)
+          #define SSA_OP_ALL_DEFS         (SSA_OP_VIRTUAL_DEFS | SSA_OP_DEF)
+          #define SSA_OP_ALL_OPERANDS     (SSA_OP_ALL_USES | SSA_OP_ALL_DEFS)
+
+ So if you want to look at the use pointers for all the `USE' and
+`VUSE' operands, you would do something like:
+
+       use_operand_p use_p;
+       ssa_op_iter iter;
+
+       FOR_EACH_SSA_USE_OPERAND (use_p, stmt, iter, (SSA_OP_USE | SSA_OP_VUSE))
+         {
+           process_use_ptr (use_p);
+         }
+
+ The `TREE' macro is basically the same as the `USE' and `DEF' macros,
+only with the use or def dereferenced via `USE_FROM_PTR (use_p)' and
+`DEF_FROM_PTR (def_p)'.  Since we aren't using operand pointers, use
+and defs flags can be mixed.
+
+       tree var;
+       ssa_op_iter iter;
+
+       FOR_EACH_SSA_TREE_OPERAND (var, stmt, iter, SSA_OP_VUSE)
+         {
+            print_generic_expr (stderr, var, TDF_SLIM);
+         }
+
+ `VDEF's are broken into two flags, one for the `DEF' portion
+(`SSA_OP_VDEF') and one for the USE portion (`SSA_OP_VMAYUSE').  If all
+you want to look at are the `VDEF's together, there is a fourth
+iterator macro for this, which returns both a def_operand_p and a
+use_operand_p for each `VDEF' in the statement.  Note that you don't
+need any flags for this one.
+
+       use_operand_p use_p;
+       def_operand_p def_p;
+       ssa_op_iter iter;
+
+       FOR_EACH_SSA_MAYDEF_OPERAND (def_p, use_p, stmt, iter)
+         {
+           my_code;
+         }
+
+ There are many examples in the code as well, as well as the
+documentation in `tree-ssa-operands.h'.
+
+ There are also a couple of variants on the stmt iterators regarding PHI
+nodes.
+
+ `FOR_EACH_PHI_ARG' Works exactly like `FOR_EACH_SSA_USE_OPERAND',
+except it works over `PHI' arguments instead of statement operands.
+
+     /* Look at every virtual PHI use.  */
+     FOR_EACH_PHI_ARG (use_p, phi_stmt, iter, SSA_OP_VIRTUAL_USES)
+     {
+        my_code;
+     }
+
+     /* Look at every real PHI use.  */
+     FOR_EACH_PHI_ARG (use_p, phi_stmt, iter, SSA_OP_USES)
+       my_code;
+
+     /* Look at every PHI use.  */
+     FOR_EACH_PHI_ARG (use_p, phi_stmt, iter, SSA_OP_ALL_USES)
+       my_code;
+
+ `FOR_EACH_PHI_OR_STMT_{USE,DEF}' works exactly like
+`FOR_EACH_SSA_{USE,DEF}_OPERAND', except it will function on either a
+statement or a `PHI' node.  These should be used when it is appropriate
+but they are not quite as efficient as the individual `FOR_EACH_PHI'
+and `FOR_EACH_SSA' routines.
+
+     FOR_EACH_PHI_OR_STMT_USE (use_operand_p, stmt, iter, flags)
+       {
+          my_code;
+       }
+
+     FOR_EACH_PHI_OR_STMT_DEF (def_operand_p, phi, iter, flags)
+       {
+          my_code;
+       }
+
+13.2.2 Immediate Uses
+---------------------
+
+Immediate use information is now always available.  Using the immediate
+use iterators, you may examine every use of any `SSA_NAME'. For
+instance, to change each use of `ssa_var' to `ssa_var2' and call
+fold_stmt on each stmt after that is done:
+
+       use_operand_p imm_use_p;
+       imm_use_iterator iterator;
+       tree ssa_var, stmt;
+
+
+       FOR_EACH_IMM_USE_STMT (stmt, iterator, ssa_var)
+         {
+           FOR_EACH_IMM_USE_ON_STMT (imm_use_p, iterator)
+             SET_USE (imm_use_p, ssa_var_2);
+           fold_stmt (stmt);
+         }
+
+ There are 2 iterators which can be used. `FOR_EACH_IMM_USE_FAST' is
+used when the immediate uses are not changed, i.e., you are looking at
+the uses, but not setting them.
+
+ If they do get changed, then care must be taken that things are not
+changed under the iterators, so use the `FOR_EACH_IMM_USE_STMT' and
+`FOR_EACH_IMM_USE_ON_STMT' iterators.  They attempt to preserve the
+sanity of the use list by moving all the uses for a statement into a
+controlled position, and then iterating over those uses.  Then the
+optimization can manipulate the stmt when all the uses have been
+processed.  This is a little slower than the FAST version since it adds
+a placeholder element and must sort through the list a bit for each
+statement.  This placeholder element must be also be removed if the
+loop is terminated early.  The macro `BREAK_FROM_IMM_USE_SAFE' is
+provided to do this :
+
+       FOR_EACH_IMM_USE_STMT (stmt, iterator, ssa_var)
+         {
+           if (stmt == last_stmt)
+             BREAK_FROM_SAFE_IMM_USE (iter);
+
+           FOR_EACH_IMM_USE_ON_STMT (imm_use_p, iterator)
+             SET_USE (imm_use_p, ssa_var_2);
+           fold_stmt (stmt);
+         }
+
+ There are checks in `verify_ssa' which verify that the immediate use
+list is up to date, as well as checking that an optimization didn't
+break from the loop without using this macro.  It is safe to simply
+'break'; from a `FOR_EACH_IMM_USE_FAST' traverse.
+
+ Some useful functions and macros:
+  1. `has_zero_uses (ssa_var)' : Returns true if there are no uses of
+     `ssa_var'.
+
+  2. `has_single_use (ssa_var)' : Returns true if there is only a
+     single use of `ssa_var'.
+
+  3. `single_imm_use (ssa_var, use_operand_p *ptr, tree *stmt)' :
+     Returns true if there is only a single use of `ssa_var', and also
+     returns the use pointer and statement it occurs in, in the second
+     and third parameters.
+
+  4. `num_imm_uses (ssa_var)' : Returns the number of immediate uses of
+     `ssa_var'. It is better not to use this if possible since it simply
+     utilizes a loop to count the uses.
+
+  5. `PHI_ARG_INDEX_FROM_USE (use_p)' : Given a use within a `PHI'
+     node, return the index number for the use.  An assert is triggered
+     if the use isn't located in a `PHI' node.
+
+  6. `USE_STMT (use_p)' : Return the statement a use occurs in.
+
+ Note that uses are not put into an immediate use list until their
+statement is actually inserted into the instruction stream via a
+`bsi_*' routine.
+
+ It is also still possible to utilize lazy updating of statements, but
+this should be used only when absolutely required.  Both alias analysis
+and the dominator optimizations currently do this.
+
+ When lazy updating is being used, the immediate use information is out
+of date and cannot be used reliably.  Lazy updating is achieved by
+simply marking statements modified via calls to `mark_stmt_modified'
+instead of `update_stmt'.  When lazy updating is no longer required,
+all the modified statements must have `update_stmt' called in order to
+bring them up to date.  This must be done before the optimization is
+finished, or `verify_ssa' will trigger an abort.
+
+ This is done with a simple loop over the instruction stream:
+       block_stmt_iterator bsi;
+       basic_block bb;
+       FOR_EACH_BB (bb)
+         {
+           for (bsi = bsi_start (bb); !bsi_end_p (bsi); bsi_next (&bsi))
+             update_stmt_if_modified (bsi_stmt (bsi));
+         }
+
+
+File: gccint.info,  Node: SSA,  Next: Alias analysis,  Prev: SSA Operands,  Up: Tree SSA
+
+13.3 Static Single Assignment
+=============================
+
+Most of the tree optimizers rely on the data flow information provided
+by the Static Single Assignment (SSA) form.  We implement the SSA form
+as described in `R. Cytron, J. Ferrante, B. Rosen, M. Wegman, and K.
+Zadeck.  Efficiently Computing Static Single Assignment Form and the
+Control Dependence Graph.  ACM Transactions on Programming Languages
+and Systems, 13(4):451-490, October 1991'.
+
+ The SSA form is based on the premise that program variables are
+assigned in exactly one location in the program.  Multiple assignments
+to the same variable create new versions of that variable.  Naturally,
+actual programs are seldom in SSA form initially because variables tend
+to be assigned multiple times.  The compiler modifies the program
+representation so that every time a variable is assigned in the code, a
+new version of the variable is created.  Different versions of the same
+variable are distinguished by subscripting the variable name with its
+version number.  Variables used in the right-hand side of expressions
+are renamed so that their version number matches that of the most
+recent assignment.
+
+ We represent variable versions using `SSA_NAME' nodes.  The renaming
+process in `tree-ssa.c' wraps every real and virtual operand with an
+`SSA_NAME' node which contains the version number and the statement
+that created the `SSA_NAME'.  Only definitions and virtual definitions
+may create new `SSA_NAME' nodes.
+
+ Sometimes, flow of control makes it impossible to determine the most
+recent version of a variable.  In these cases, the compiler inserts an
+artificial definition for that variable called "PHI function" or "PHI
+node".  This new definition merges all the incoming versions of the
+variable to create a new name for it.  For instance,
+
+     if (...)
+       a_1 = 5;
+     else if (...)
+       a_2 = 2;
+     else
+       a_3 = 13;
+
+     # a_4 = PHI <a_1, a_2, a_3>
+     return a_4;
+
+ Since it is not possible to determine which of the three branches will
+be taken at runtime, we don't know which of `a_1', `a_2' or `a_3' to
+use at the return statement.  So, the SSA renamer creates a new version
+`a_4' which is assigned the result of "merging" `a_1', `a_2' and `a_3'.
+Hence, PHI nodes mean "one of these operands.  I don't know which".
+
+ The following macros can be used to examine PHI nodes
+
+ -- Macro: PHI_RESULT (PHI)
+     Returns the `SSA_NAME' created by PHI node PHI (i.e., PHI's LHS).
+
+ -- Macro: PHI_NUM_ARGS (PHI)
+     Returns the number of arguments in PHI.  This number is exactly
+     the number of incoming edges to the basic block holding PHI.
+
+ -- Macro: PHI_ARG_ELT (PHI, I)
+     Returns a tuple representing the Ith argument of PHI.  Each
+     element of this tuple contains an `SSA_NAME' VAR and the incoming
+     edge through which VAR flows.
+
+ -- Macro: PHI_ARG_EDGE (PHI, I)
+     Returns the incoming edge for the Ith argument of PHI.
+
+ -- Macro: PHI_ARG_DEF (PHI, I)
+     Returns the `SSA_NAME' for the Ith argument of PHI.
+
+13.3.1 Preserving the SSA form
+------------------------------
+
+Some optimization passes make changes to the function that invalidate
+the SSA property.  This can happen when a pass has added new symbols or
+changed the program so that variables that were previously aliased
+aren't anymore.  Whenever something like this happens, the affected
+symbols must be renamed into SSA form again.  Transformations that emit
+new code or replicate existing statements will also need to update the
+SSA form.
+
+ Since GCC implements two different SSA forms for register and virtual
+variables, keeping the SSA form up to date depends on whether you are
+updating register or virtual names.  In both cases, the general idea
+behind incremental SSA updates is similar: when new SSA names are
+created, they typically are meant to replace other existing names in
+the program.
+
+ For instance, given the following code:
+
+          1  L0:
+          2  x_1 = PHI (0, x_5)
+          3  if (x_1 < 10)
+          4    if (x_1 > 7)
+          5      y_2 = 0
+          6    else
+          7      y_3 = x_1 + x_7
+          8    endif
+          9    x_5 = x_1 + 1
+          10   goto L0;
+          11 endif
+
+ Suppose that we insert new names `x_10' and `x_11' (lines `4' and `8').
+
+          1  L0:
+          2  x_1 = PHI (0, x_5)
+          3  if (x_1 < 10)
+          4    x_10 = ...
+          5    if (x_1 > 7)
+          6      y_2 = 0
+          7    else
+          8      x_11 = ...
+          9      y_3 = x_1 + x_7
+          10   endif
+          11   x_5 = x_1 + 1
+          12   goto L0;
+          13 endif
+
+ We want to replace all the uses of `x_1' with the new definitions of
+`x_10' and `x_11'.  Note that the only uses that should be replaced are
+those at lines `5', `9' and `11'.  Also, the use of `x_7' at line `9'
+should _not_ be replaced (this is why we cannot just mark symbol `x' for
+renaming).
+
+ Additionally, we may need to insert a PHI node at line `11' because
+that is a merge point for `x_10' and `x_11'.  So the use of `x_1' at
+line `11' will be replaced with the new PHI node.  The insertion of PHI
+nodes is optional.  They are not strictly necessary to preserve the SSA
+form, and depending on what the caller inserted, they may not even be
+useful for the optimizers.
+
+ Updating the SSA form is a two step process.  First, the pass has to
+identify which names need to be updated and/or which symbols need to be
+renamed into SSA form for the first time.  When new names are
+introduced to replace existing names in the program, the mapping
+between the old and the new names are registered by calling
+`register_new_name_mapping' (note that if your pass creates new code by
+duplicating basic blocks, the call to `tree_duplicate_bb' will set up
+the necessary mappings automatically).  On the other hand, if your pass
+exposes a new symbol that should be put in SSA form for the first time,
+the new symbol should be registered with `mark_sym_for_renaming'.
+
+ After the replacement mappings have been registered and new symbols
+marked for renaming, a call to `update_ssa' makes the registered
+changes.  This can be done with an explicit call or by creating `TODO'
+flags in the `tree_opt_pass' structure for your pass.  There are
+several `TODO' flags that control the behavior of `update_ssa':
+
+   * `TODO_update_ssa'.  Update the SSA form inserting PHI nodes for
+     newly exposed symbols and virtual names marked for updating.  When
+     updating real names, only insert PHI nodes for a real name `O_j'
+     in blocks reached by all the new and old definitions for `O_j'.
+     If the iterated dominance frontier for `O_j' is not pruned, we may
+     end up inserting PHI nodes in blocks that have one or more edges
+     with no incoming definition for `O_j'.  This would lead to
+     uninitialized warnings for `O_j''s symbol.
+
+   * `TODO_update_ssa_no_phi'.  Update the SSA form without inserting
+     any new PHI nodes at all.  This is used by passes that have either
+     inserted all the PHI nodes themselves or passes that need only to
+     patch use-def and def-def chains for virtuals (e.g., DCE).
+
+   * `TODO_update_ssa_full_phi'.  Insert PHI nodes everywhere they are
+     needed.  No pruning of the IDF is done.  This is used by passes
+     that need the PHI nodes for `O_j' even if it means that some
+     arguments will come from the default definition of `O_j''s symbol
+     (e.g., `pass_linear_transform').
+
+     WARNING: If you need to use this flag, chances are that your pass
+     may be doing something wrong.  Inserting PHI nodes for an old name
+     where not all edges carry a new replacement may lead to silent
+     codegen errors or spurious uninitialized warnings.
+
+   * `TODO_update_ssa_only_virtuals'.  Passes that update the SSA form
+     on their own may want to delegate the updating of virtual names to
+     the generic updater.  Since FUD chains are easier to maintain,
+     this simplifies the work they need to do.  NOTE: If this flag is
+     used, any OLD->NEW mappings for real names are explicitly
+     destroyed and only the symbols marked for renaming are processed.
+
+13.3.2 Preserving the virtual SSA form
+--------------------------------------
+
+The virtual SSA form is harder to preserve than the non-virtual SSA form
+mainly because the set of virtual operands for a statement may change at
+what some would consider unexpected times.  In general, statement
+modifications should be bracketed between calls to `push_stmt_changes'
+and `pop_stmt_changes'.  For example,
+
+         munge_stmt (tree stmt)
+         {
+            push_stmt_changes (&stmt);
+            ... rewrite STMT ...
+            pop_stmt_changes (&stmt);
+         }
+
+ The call to `push_stmt_changes' saves the current state of the
+statement operands and the call to `pop_stmt_changes' compares the
+saved state with the current one and does the appropriate symbol
+marking for the SSA renamer.
+
+ It is possible to modify several statements at a time, provided that
+`push_stmt_changes' and `pop_stmt_changes' are called in LIFO order, as
+when processing a stack of statements.
+
+ Additionally, if the pass discovers that it did not need to make
+changes to the statement after calling `push_stmt_changes', it can
+simply discard the topmost change buffer by calling
+`discard_stmt_changes'.  This will avoid the expensive operand re-scan
+operation and the buffer comparison that determines if symbols need to
+be marked for renaming.
+
+13.3.3 Examining `SSA_NAME' nodes
+---------------------------------
+
+The following macros can be used to examine `SSA_NAME' nodes
+
+ -- Macro: SSA_NAME_DEF_STMT (VAR)
+     Returns the statement S that creates the `SSA_NAME' VAR.  If S is
+     an empty statement (i.e., `IS_EMPTY_STMT (S)' returns `true'), it
+     means that the first reference to this variable is a USE or a VUSE.
+
+ -- Macro: SSA_NAME_VERSION (VAR)
+     Returns the version number of the `SSA_NAME' object VAR.
+
+13.3.4 Walking use-def chains
+-----------------------------
+
+ -- Tree SSA function: void walk_use_def_chains (VAR, FN, DATA)
+     Walks use-def chains starting at the `SSA_NAME' node VAR.  Calls
+     function FN at each reaching definition found.  Function FN takes
+     three arguments: VAR, its defining statement (DEF_STMT) and a
+     generic pointer to whatever state information that FN may want to
+     maintain (DATA).  Function FN is able to stop the walk by
+     returning `true', otherwise in order to continue the walk, FN
+     should return `false'.
+
+     Note, that if DEF_STMT is a `PHI' node, the semantics are slightly
+     different.  For each argument ARG of the PHI node, this function
+     will:
+
+       1. Walk the use-def chains for ARG.
+
+       2. Call `FN (ARG, PHI, DATA)'.
+
+     Note how the first argument to FN is no longer the original
+     variable VAR, but the PHI argument currently being examined.  If
+     FN wants to get at VAR, it should call `PHI_RESULT' (PHI).
+
+13.3.5 Walking the dominator tree
+---------------------------------
+
+ -- Tree SSA function: void walk_dominator_tree (WALK_DATA, BB)
+     This function walks the dominator tree for the current CFG calling
+     a set of callback functions defined in STRUCT DOM_WALK_DATA in
+     `domwalk.h'.  The call back functions you need to define give you
+     hooks to execute custom code at various points during traversal:
+
+       1. Once to initialize any local data needed while processing BB
+          and its children.  This local data is pushed into an internal
+          stack which is automatically pushed and popped as the walker
+          traverses the dominator tree.
+
+       2. Once before traversing all the statements in the BB.
+
+       3. Once for every statement inside BB.
+
+       4. Once after traversing all the statements and before recursing
+          into BB's dominator children.
+
+       5. It then recurses into all the dominator children of BB.
+
+       6. After recursing into all the dominator children of BB it can,
+          optionally, traverse every statement in BB again (i.e.,
+          repeating steps 2 and 3).
+
+       7. Once after walking the statements in BB and BB's dominator
+          children.  At this stage, the block local data stack is
+          popped.
+
+
+File: gccint.info,  Node: Alias analysis,  Next: Memory model,  Prev: SSA,  Up: Tree SSA
+
+13.4 Alias analysis
+===================
+
+Alias analysis in GIMPLE SSA form consists of two pieces.  First the
+virtual SSA web ties conflicting memory accesses and provides a SSA
+use-def chain and SSA immediate-use chains for walking possibly
+dependent memory accesses.  Second an alias-oracle can be queried to
+disambiguate explicit and implicit memory references.
+
+  1. Memory SSA form.
+
+     All statements that may use memory have exactly one accompanied
+     use of a virtual SSA name that represents the state of memory at
+     the given point in the IL.
+
+     All statements that may define memory have exactly one accompanied
+     definition of a virtual SSA name using the previous state of memory
+     and defining the new state of memory after the given point in the
+     IL.
+
+          int i;
+          int foo (void)
+          {
+            # .MEM_3 = VDEF <.MEM_2(D)>
+            i = 1;
+            # VUSE <.MEM_3>
+            return i;
+          }
+
+     The virtual SSA names in this case are `.MEM_2(D)' and `.MEM_3'.
+     The store to the global variable `i' defines `.MEM_3' invalidating
+     `.MEM_2(D)'.  The load from `i' uses that new state `.MEM_3'.
+
+     The virtual SSA web serves as constraints to SSA optimizers
+     preventing illegitimate code-motion and optimization.  It also
+     provides a way to walk related memory statements.
+
+  2. Points-to and escape analysis.
+
+     Points-to analysis builds a set of constraints from the GIMPLE SSA
+     IL representing all pointer operations and facts we do or do not
+     know about pointers.  Solving this set of constraints yields a
+     conservatively correct solution for each pointer variable in the
+     program (though we are only interested in SSA name pointers) as to
+     what it may possibly point to.
+
+     This points-to solution for a given SSA name pointer is stored in
+     the `pt_solution' sub-structure of the `SSA_NAME_PTR_INFO' record.
+     The following accessor functions are available:
+
+        * `pt_solution_includes'
+
+        * `pt_solutions_intersect'
+
+     Points-to analysis also computes the solution for two special set
+     of pointers, `ESCAPED' and `CALLUSED'.  Those represent all memory
+     that has escaped the scope of analysis or that is used by pure or
+     nested const calls.
+
+  3. Type-based alias analysis
+
+     Type-based alias analysis is frontend dependent though generic
+     support is provided by the middle-end in `alias.c'.  TBAA code is
+     used by both tree optimizers and RTL optimizers.
+
+     Every language that wishes to perform language-specific alias
+     analysis should define a function that computes, given a `tree'
+     node, an alias set for the node.  Nodes in different alias sets
+     are not allowed to alias.  For an example, see the C front-end
+     function `c_get_alias_set'.
+
+  4. Tree alias-oracle
+
+     The tree alias-oracle provides means to disambiguate two memory
+     references and memory references against statements.  The following
+     queries are available:
+
+        * `refs_may_alias_p'
+
+        * `ref_maybe_used_by_stmt_p'
+
+        * `stmt_may_clobber_ref_p'
+
+     In addition to those two kind of statement walkers are available
+     walking statements related to a reference ref.
+     `walk_non_aliased_vuses' walks over dominating memory defining
+     statements and calls back if the statement does not clobber ref
+     providing the non-aliased VUSE.  The walk stops at the first
+     clobbering statement or if asked to.  `walk_aliased_vdefs' walks
+     over dominating memory defining statements and calls back on each
+     statement clobbering ref providing its aliasing VDEF.  The walk
+     stops if asked to.
+
+
+
+File: gccint.info,  Node: Memory model,  Prev: Alias analysis,  Up: Tree SSA
+
+13.5 Memory model
+=================
+
+The memory model used by the middle-end models that of the C/C++
+languages.  The middle-end has the notion of an effective type of a
+memory region which is used for type-based alias analysis.
+
+ The following is a refinement of ISO C99 6.5/6, clarifying the block
+copy case to follow common sense and extending the concept of a dynamic
+effective type to objects with a declared type as required for C++.
+
+     The effective type of an object for an access to its stored value is
+     the declared type of the object or the effective type determined by
+     a previous store to it.  If a value is stored into an object through
+     an lvalue having a type that is not a character type, then the
+     type of the lvalue becomes the effective type of the object for that
+     access and for subsequent accesses that do not modify the stored value.
+     If a value is copied into an object using `memcpy' or `memmove',
+     or is copied as an array of character type, then the effective type
+     of the modified object for that access and for subsequent accesses that
+     do not modify the value is undetermined.  For all other accesses to an
+     object, the effective type of the object is simply the type of the
+     lvalue used for the access.
+
+
+File: gccint.info,  Node: Loop Analysis and Representation,  Next: Machine Desc,  Prev: Control Flow,  Up: Top
+
+14 Analysis and Representation of Loops
+***************************************
+
+GCC provides extensive infrastructure for work with natural loops, i.e.,
+strongly connected components of CFG with only one entry block.  This
+chapter describes representation of loops in GCC, both on GIMPLE and in
+RTL, as well as the interfaces to loop-related analyses (induction
+variable analysis and number of iterations analysis).
+
+* Menu:
+
+* Loop representation::         Representation and analysis of loops.
+* Loop querying::               Getting information about loops.
+* Loop manipulation::           Loop manipulation functions.
+* LCSSA::                       Loop-closed SSA form.
+* Scalar evolutions::           Induction variables on GIMPLE.
+* loop-iv::                     Induction variables on RTL.
+* Number of iterations::        Number of iterations analysis.
+* Dependency analysis::         Data dependency analysis.
+* Lambda::                      Linear loop transformations framework.
+* Omega::                       A solver for linear programming problems.
+
+
+File: gccint.info,  Node: Loop representation,  Next: Loop querying,  Up: Loop Analysis and Representation
+
+14.1 Loop representation
+========================
+
+This chapter describes the representation of loops in GCC, and functions
+that can be used to build, modify and analyze this representation.  Most
+of the interfaces and data structures are declared in `cfgloop.h'.  At
+the moment, loop structures are analyzed and this information is
+updated only by the optimization passes that deal with loops, but some
+efforts are being made to make it available throughout most of the
+optimization passes.
+
+ In general, a natural loop has one entry block (header) and possibly
+several back edges (latches) leading to the header from the inside of
+the loop.  Loops with several latches may appear if several loops share
+a single header, or if there is a branching in the middle of the loop.
+The representation of loops in GCC however allows only loops with a
+single latch.  During loop analysis, headers of such loops are split and
+forwarder blocks are created in order to disambiguate their structures.
+Heuristic based on profile information and structure of the induction
+variables in the loops is used to determine whether the latches
+correspond to sub-loops or to control flow in a single loop.  This means
+that the analysis sometimes changes the CFG, and if you run it in the
+middle of an optimization pass, you must be able to deal with the new
+blocks.  You may avoid CFG changes by passing
+`LOOPS_MAY_HAVE_MULTIPLE_LATCHES' flag to the loop discovery, note
+however that most other loop manipulation functions will not work
+correctly for loops with multiple latch edges (the functions that only
+query membership of blocks to loops and subloop relationships, or
+enumerate and test loop exits, can be expected to work).
+
+ Body of the loop is the set of blocks that are dominated by its header,
+and reachable from its latch against the direction of edges in CFG.  The
+loops are organized in a containment hierarchy (tree) such that all the
+loops immediately contained inside loop L are the children of L in the
+tree.  This tree is represented by the `struct loops' structure.  The
+root of this tree is a fake loop that contains all blocks in the
+function.  Each of the loops is represented in a `struct loop'
+structure.  Each loop is assigned an index (`num' field of the `struct
+loop' structure), and the pointer to the loop is stored in the
+corresponding field of the `larray' vector in the loops structure.  The
+indices do not have to be continuous, there may be empty (`NULL')
+entries in the `larray' created by deleting loops.  Also, there is no
+guarantee on the relative order of a loop and its subloops in the
+numbering.  The index of a loop never changes.
+
+ The entries of the `larray' field should not be accessed directly.
+The function `get_loop' returns the loop description for a loop with
+the given index.  `number_of_loops' function returns number of loops in
+the function.  To traverse all loops, use `FOR_EACH_LOOP' macro.  The
+`flags' argument of the macro is used to determine the direction of
+traversal and the set of loops visited.  Each loop is guaranteed to be
+visited exactly once, regardless of the changes to the loop tree, and
+the loops may be removed during the traversal.  The newly created loops
+are never traversed, if they need to be visited, this must be done
+separately after their creation.  The `FOR_EACH_LOOP' macro allocates
+temporary variables.  If the `FOR_EACH_LOOP' loop were ended using
+break or goto, they would not be released; `FOR_EACH_LOOP_BREAK' macro
+must be used instead.
+
+ Each basic block contains the reference to the innermost loop it
+belongs to (`loop_father').  For this reason, it is only possible to
+have one `struct loops' structure initialized at the same time for each
+CFG.  The global variable `current_loops' contains the `struct loops'
+structure.  Many of the loop manipulation functions assume that
+dominance information is up-to-date.
+
+ The loops are analyzed through `loop_optimizer_init' function.  The
+argument of this function is a set of flags represented in an integer
+bitmask.  These flags specify what other properties of the loop
+structures should be calculated/enforced and preserved later:
+
+   * `LOOPS_MAY_HAVE_MULTIPLE_LATCHES': If this flag is set, no changes
+     to CFG will be performed in the loop analysis, in particular,
+     loops with multiple latch edges will not be disambiguated.  If a
+     loop has multiple latches, its latch block is set to NULL.  Most of
+     the loop manipulation functions will not work for loops in this
+     shape.  No other flags that require CFG changes can be passed to
+     loop_optimizer_init.
+
+   * `LOOPS_HAVE_PREHEADERS': Forwarder blocks are created in such a
+     way that each loop has only one entry edge, and additionally, the
+     source block of this entry edge has only one successor.  This
+     creates a natural place where the code can be moved out of the
+     loop, and ensures that the entry edge of the loop leads from its
+     immediate super-loop.
+
+   * `LOOPS_HAVE_SIMPLE_LATCHES': Forwarder blocks are created to force
+     the latch block of each loop to have only one successor.  This
+     ensures that the latch of the loop does not belong to any of its
+     sub-loops, and makes manipulation with the loops significantly
+     easier.  Most of the loop manipulation functions assume that the
+     loops are in this shape.  Note that with this flag, the "normal"
+     loop without any control flow inside and with one exit consists of
+     two basic blocks.
+
+   * `LOOPS_HAVE_MARKED_IRREDUCIBLE_REGIONS': Basic blocks and edges in
+     the strongly connected components that are not natural loops (have
+     more than one entry block) are marked with `BB_IRREDUCIBLE_LOOP'
+     and `EDGE_IRREDUCIBLE_LOOP' flags.  The flag is not set for blocks
+     and edges that belong to natural loops that are in such an
+     irreducible region (but it is set for the entry and exit edges of
+     such a loop, if they lead to/from this region).
+
+   * `LOOPS_HAVE_RECORDED_EXITS': The lists of exits are recorded and
+     updated for each loop.  This makes some functions (e.g.,
+     `get_loop_exit_edges') more efficient.  Some functions (e.g.,
+     `single_exit') can be used only if the lists of exits are recorded.
+
+ These properties may also be computed/enforced later, using functions
+`create_preheaders', `force_single_succ_latches',
+`mark_irreducible_loops' and `record_loop_exits'.
+
+ The memory occupied by the loops structures should be freed with
+`loop_optimizer_finalize' function.
+
+ The CFG manipulation functions in general do not update loop
+structures.  Specialized versions that additionally do so are provided
+for the most common tasks.  On GIMPLE, `cleanup_tree_cfg_loop' function
+can be used to cleanup CFG while updating the loops structures if
+`current_loops' is set.
+
+
+File: gccint.info,  Node: Loop querying,  Next: Loop manipulation,  Prev: Loop representation,  Up: Loop Analysis and Representation
+
+14.2 Loop querying
+==================
+
+The functions to query the information about loops are declared in
+`cfgloop.h'.  Some of the information can be taken directly from the
+structures.  `loop_father' field of each basic block contains the
+innermost loop to that the block belongs.  The most useful fields of
+loop structure (that are kept up-to-date at all times) are:
+
+   * `header', `latch': Header and latch basic blocks of the loop.
+
+   * `num_nodes': Number of basic blocks in the loop (including the
+     basic blocks of the sub-loops).
+
+   * `depth': The depth of the loop in the loops tree, i.e., the number
+     of super-loops of the loop.
+
+   * `outer', `inner', `next': The super-loop, the first sub-loop, and
+     the sibling of the loop in the loops tree.
+
+ There are other fields in the loop structures, many of them used only
+by some of the passes, or not updated during CFG changes; in general,
+they should not be accessed directly.
+
+ The most important functions to query loop structures are:
+
+   * `flow_loops_dump': Dumps the information about loops to a file.
+
+   * `verify_loop_structure': Checks consistency of the loop structures.
+
+   * `loop_latch_edge': Returns the latch edge of a loop.
+
+   * `loop_preheader_edge': If loops have preheaders, returns the
+     preheader edge of a loop.
+
+   * `flow_loop_nested_p': Tests whether loop is a sub-loop of another
+     loop.
+
+   * `flow_bb_inside_loop_p': Tests whether a basic block belongs to a
+     loop (including its sub-loops).
+
+   * `find_common_loop': Finds the common super-loop of two loops.
+
+   * `superloop_at_depth': Returns the super-loop of a loop with the
+     given depth.
+
+   * `tree_num_loop_insns', `num_loop_insns': Estimates the number of
+     insns in the loop, on GIMPLE and on RTL.
+
+   * `loop_exit_edge_p': Tests whether edge is an exit from a loop.
+
+   * `mark_loop_exit_edges': Marks all exit edges of all loops with
+     `EDGE_LOOP_EXIT' flag.
+
+   * `get_loop_body', `get_loop_body_in_dom_order',
+     `get_loop_body_in_bfs_order': Enumerates the basic blocks in the
+     loop in depth-first search order in reversed CFG, ordered by
+     dominance relation, and breath-first search order, respectively.
+
+   * `single_exit': Returns the single exit edge of the loop, or `NULL'
+     if the loop has more than one exit.  You can only use this
+     function if LOOPS_HAVE_MARKED_SINGLE_EXITS property is used.
+
+   * `get_loop_exit_edges': Enumerates the exit edges of a loop.
+
+   * `just_once_each_iteration_p': Returns true if the basic block is
+     executed exactly once during each iteration of a loop (that is, it
+     does not belong to a sub-loop, and it dominates the latch of the
+     loop).
+
+
+File: gccint.info,  Node: Loop manipulation,  Next: LCSSA,  Prev: Loop querying,  Up: Loop Analysis and Representation
+
+14.3 Loop manipulation
+======================
+
+The loops tree can be manipulated using the following functions:
+
+   * `flow_loop_tree_node_add': Adds a node to the tree.
+
+   * `flow_loop_tree_node_remove': Removes a node from the tree.
+
+   * `add_bb_to_loop': Adds a basic block to a loop.
+
+   * `remove_bb_from_loops': Removes a basic block from loops.
+
+ Most low-level CFG functions update loops automatically.  The following
+functions handle some more complicated cases of CFG manipulations:
+
+   * `remove_path': Removes an edge and all blocks it dominates.
+
+   * `split_loop_exit_edge': Splits exit edge of the loop, ensuring
+     that PHI node arguments remain in the loop (this ensures that
+     loop-closed SSA form is preserved).  Only useful on GIMPLE.
+
+ Finally, there are some higher-level loop transformations implemented.
+While some of them are written so that they should work on non-innermost
+loops, they are mostly untested in that case, and at the moment, they
+are only reliable for the innermost loops:
+
+   * `create_iv': Creates a new induction variable.  Only works on
+     GIMPLE.  `standard_iv_increment_position' can be used to find a
+     suitable place for the iv increment.
+
+   * `duplicate_loop_to_header_edge',
+     `tree_duplicate_loop_to_header_edge': These functions (on RTL and
+     on GIMPLE) duplicate the body of the loop prescribed number of
+     times on one of the edges entering loop header, thus performing
+     either loop unrolling or loop peeling.  `can_duplicate_loop_p'
+     (`can_unroll_loop_p' on GIMPLE) must be true for the duplicated
+     loop.
+
+   * `loop_version', `tree_ssa_loop_version': These function create a
+     copy of a loop, and a branch before them that selects one of them
+     depending on the prescribed condition.  This is useful for
+     optimizations that need to verify some assumptions in runtime (one
+     of the copies of the loop is usually left unchanged, while the
+     other one is transformed in some way).
+
+   * `tree_unroll_loop': Unrolls the loop, including peeling the extra
+     iterations to make the number of iterations divisible by unroll
+     factor, updating the exit condition, and removing the exits that
+     now cannot be taken.  Works only on GIMPLE.
+
+
+File: gccint.info,  Node: LCSSA,  Next: Scalar evolutions,  Prev: Loop manipulation,  Up: Loop Analysis and Representation
+
+14.4 Loop-closed SSA form
+=========================
+
+Throughout the loop optimizations on tree level, one extra condition is
+enforced on the SSA form:  No SSA name is used outside of the loop in
+that it is defined.  The SSA form satisfying this condition is called
+"loop-closed SSA form" - LCSSA.  To enforce LCSSA, PHI nodes must be
+created at the exits of the loops for the SSA names that are used
+outside of them.  Only the real operands (not virtual SSA names) are
+held in LCSSA, in order to save memory.
+
+ There are various benefits of LCSSA:
+
+   * Many optimizations (value range analysis, final value replacement)
+     are interested in the values that are defined in the loop and used
+     outside of it, i.e., exactly those for that we create new PHI
+     nodes.
+
+   * In induction variable analysis, it is not necessary to specify the
+     loop in that the analysis should be performed - the scalar
+     evolution analysis always returns the results with respect to the
+     loop in that the SSA name is defined.
+
+   * It makes updating of SSA form during loop transformations simpler.
+     Without LCSSA, operations like loop unrolling may force creation
+     of PHI nodes arbitrarily far from the loop, while in LCSSA, the
+     SSA form can be updated locally.  However, since we only keep real
+     operands in LCSSA, we cannot use this advantage (we could have
+     local updating of real operands, but it is not much more efficient
+     than to use generic SSA form updating for it as well; the amount
+     of changes to SSA is the same).
+
+ However, it also means LCSSA must be updated.  This is usually
+straightforward, unless you create a new value in loop and use it
+outside, or unless you manipulate loop exit edges (functions are
+provided to make these manipulations simple).
+`rewrite_into_loop_closed_ssa' is used to rewrite SSA form to LCSSA,
+and `verify_loop_closed_ssa' to check that the invariant of LCSSA is
+preserved.
+
+
+File: gccint.info,  Node: Scalar evolutions,  Next: loop-iv,  Prev: LCSSA,  Up: Loop Analysis and Representation
+
+14.5 Scalar evolutions
+======================
+
+Scalar evolutions (SCEV) are used to represent results of induction
+variable analysis on GIMPLE.  They enable us to represent variables with
+complicated behavior in a simple and consistent way (we only use it to
+express values of polynomial induction variables, but it is possible to
+extend it).  The interfaces to SCEV analysis are declared in
+`tree-scalar-evolution.h'.  To use scalar evolutions analysis,
+`scev_initialize' must be used.  To stop using SCEV, `scev_finalize'
+should be used.  SCEV analysis caches results in order to save time and
+memory.  This cache however is made invalid by most of the loop
+transformations, including removal of code.  If such a transformation
+is performed, `scev_reset' must be called to clean the caches.
+
+ Given an SSA name, its behavior in loops can be analyzed using the
+`analyze_scalar_evolution' function.  The returned SCEV however does
+not have to be fully analyzed and it may contain references to other
+SSA names defined in the loop.  To resolve these (potentially
+recursive) references, `instantiate_parameters' or `resolve_mixers'
+functions must be used.  `instantiate_parameters' is useful when you
+use the results of SCEV only for some analysis, and when you work with
+whole nest of loops at once.  It will try replacing all SSA names by
+their SCEV in all loops, including the super-loops of the current loop,
+thus providing a complete information about the behavior of the
+variable in the loop nest.  `resolve_mixers' is useful if you work with
+only one loop at a time, and if you possibly need to create code based
+on the value of the induction variable.  It will only resolve the SSA
+names defined in the current loop, leaving the SSA names defined
+outside unchanged, even if their evolution in the outer loops is known.
+
+ The SCEV is a normal tree expression, except for the fact that it may
+contain several special tree nodes.  One of them is `SCEV_NOT_KNOWN',
+used for SSA names whose value cannot be expressed.  The other one is
+`POLYNOMIAL_CHREC'.  Polynomial chrec has three arguments - base, step
+and loop (both base and step may contain further polynomial chrecs).
+Type of the expression and of base and step must be the same.  A
+variable has evolution `POLYNOMIAL_CHREC(base, step, loop)' if it is
+(in the specified loop) equivalent to `x_1' in the following example
+
+     while (...)
+       {
+         x_1 = phi (base, x_2);
+         x_2 = x_1 + step;
+       }
+
+ Note that this includes the language restrictions on the operations.
+For example, if we compile C code and `x' has signed type, then the
+overflow in addition would cause undefined behavior, and we may assume
+that this does not happen.  Hence, the value with this SCEV cannot
+overflow (which restricts the number of iterations of such a loop).
+
+ In many cases, one wants to restrict the attention just to affine
+induction variables.  In this case, the extra expressive power of SCEV
+is not useful, and may complicate the optimizations.  In this case,
+`simple_iv' function may be used to analyze a value - the result is a
+loop-invariant base and step.
+
+
+File: gccint.info,  Node: loop-iv,  Next: Number of iterations,  Prev: Scalar evolutions,  Up: Loop Analysis and Representation
+
+14.6 IV analysis on RTL
+=======================
+
+The induction variable on RTL is simple and only allows analysis of
+affine induction variables, and only in one loop at once.  The interface
+is declared in `cfgloop.h'.  Before analyzing induction variables in a
+loop L, `iv_analysis_loop_init' function must be called on L.  After
+the analysis (possibly calling `iv_analysis_loop_init' for several
+loops) is finished, `iv_analysis_done' should be called.  The following
+functions can be used to access the results of the analysis:
+
+   * `iv_analyze': Analyzes a single register used in the given insn.
+     If no use of the register in this insn is found, the following
+     insns are scanned, so that this function can be called on the insn
+     returned by get_condition.
+
+   * `iv_analyze_result': Analyzes result of the assignment in the
+     given insn.
+
+   * `iv_analyze_expr': Analyzes a more complicated expression.  All
+     its operands are analyzed by `iv_analyze', and hence they must be
+     used in the specified insn or one of the following insns.
+
+ The description of the induction variable is provided in `struct
+rtx_iv'.  In order to handle subregs, the representation is a bit
+complicated; if the value of the `extend' field is not `UNKNOWN', the
+value of the induction variable in the i-th iteration is
+
+     delta + mult * extend_{extend_mode} (subreg_{mode} (base + i * step)),
+
+ with the following exception:  if `first_special' is true, then the
+value in the first iteration (when `i' is zero) is `delta + mult *
+base'.  However, if `extend' is equal to `UNKNOWN', then
+`first_special' must be false, `delta' 0, `mult' 1 and the value in the
+i-th iteration is
+
+     subreg_{mode} (base + i * step)
+
+ The function `get_iv_value' can be used to perform these calculations.
+
+
+File: gccint.info,  Node: Number of iterations,  Next: Dependency analysis,  Prev: loop-iv,  Up: Loop Analysis and Representation
+
+14.7 Number of iterations analysis
+==================================
+
+Both on GIMPLE and on RTL, there are functions available to determine
+the number of iterations of a loop, with a similar interface.  The
+number of iterations of a loop in GCC is defined as the number of
+executions of the loop latch.  In many cases, it is not possible to
+determine the number of iterations unconditionally - the determined
+number is correct only if some assumptions are satisfied.  The analysis
+tries to verify these conditions using the information contained in the
+program; if it fails, the conditions are returned together with the
+result.  The following information and conditions are provided by the
+analysis:
+
+   * `assumptions': If this condition is false, the rest of the
+     information is invalid.
+
+   * `noloop_assumptions' on RTL, `may_be_zero' on GIMPLE: If this
+     condition is true, the loop exits in the first iteration.
+
+   * `infinite': If this condition is true, the loop is infinite.  This
+     condition is only available on RTL.  On GIMPLE, conditions for
+     finiteness of the loop are included in `assumptions'.
+
+   * `niter_expr' on RTL, `niter' on GIMPLE: The expression that gives
+     number of iterations.  The number of iterations is defined as the
+     number of executions of the loop latch.
+
+ Both on GIMPLE and on RTL, it necessary for the induction variable
+analysis framework to be initialized (SCEV on GIMPLE, loop-iv on RTL).
+On GIMPLE, the results are stored to `struct tree_niter_desc'
+structure.  Number of iterations before the loop is exited through a
+given exit can be determined using `number_of_iterations_exit'
+function.  On RTL, the results are returned in `struct niter_desc'
+structure.  The corresponding function is named `check_simple_exit'.
+There are also functions that pass through all the exits of a loop and
+try to find one with easy to determine number of iterations -
+`find_loop_niter' on GIMPLE and `find_simple_exit' on RTL.  Finally,
+there are functions that provide the same information, but additionally
+cache it, so that repeated calls to number of iterations are not so
+costly - `number_of_latch_executions' on GIMPLE and
+`get_simple_loop_desc' on RTL.
+
+ Note that some of these functions may behave slightly differently than
+others - some of them return only the expression for the number of
+iterations, and fail if there are some assumptions.  The function
+`number_of_latch_executions' works only for single-exit loops.  The
+function `number_of_cond_exit_executions' can be used to determine
+number of executions of the exit condition of a single-exit loop (i.e.,
+the `number_of_latch_executions' increased by one).
+
+
+File: gccint.info,  Node: Dependency analysis,  Next: Lambda,  Prev: Number of iterations,  Up: Loop Analysis and Representation
+
+14.8 Data Dependency Analysis
+=============================
+
+The code for the data dependence analysis can be found in
+`tree-data-ref.c' and its interface and data structures are described
+in `tree-data-ref.h'.  The function that computes the data dependences
+for all the array and pointer references for a given loop is
+`compute_data_dependences_for_loop'.  This function is currently used
+by the linear loop transform and the vectorization passes.  Before
+calling this function, one has to allocate two vectors: a first vector
+will contain the set of data references that are contained in the
+analyzed loop body, and the second vector will contain the dependence
+relations between the data references.  Thus if the vector of data
+references is of size `n', the vector containing the dependence
+relations will contain `n*n' elements.  However if the analyzed loop
+contains side effects, such as calls that potentially can interfere
+with the data references in the current analyzed loop, the analysis
+stops while scanning the loop body for data references, and inserts a
+single `chrec_dont_know' in the dependence relation array.
+
+ The data references are discovered in a particular order during the
+scanning of the loop body: the loop body is analyzed in execution order,
+and the data references of each statement are pushed at the end of the
+data reference array.  Two data references syntactically occur in the
+program in the same order as in the array of data references.  This
+syntactic order is important in some classical data dependence tests,
+and mapping this order to the elements of this array avoids costly
+queries to the loop body representation.
+
+ Three types of data references are currently handled: ARRAY_REF,
+INDIRECT_REF and COMPONENT_REF. The data structure for the data
+reference is `data_reference', where `data_reference_p' is a name of a
+pointer to the data reference structure. The structure contains the
+following elements:
+
+   * `base_object_info': Provides information about the base object of
+     the data reference and its access functions. These access functions
+     represent the evolution of the data reference in the loop relative
+     to its base, in keeping with the classical meaning of the data
+     reference access function for the support of arrays. For example,
+     for a reference `a.b[i][j]', the base object is `a.b' and the
+     access functions, one for each array subscript, are: `{i_init, +
+     i_step}_1, {j_init, +, j_step}_2'.
+
+   * `first_location_in_loop': Provides information about the first
+     location accessed by the data reference in the loop and about the
+     access function used to represent evolution relative to this
+     location. This data is used to support pointers, and is not used
+     for arrays (for which we have base objects). Pointer accesses are
+     represented as a one-dimensional access that starts from the first
+     location accessed in the loop. For example:
+
+                for1 i
+                   for2 j
+                    *((int *)p + i + j) = a[i][j];
+
+     The access function of the pointer access is `{0, + 4B}_for2'
+     relative to `p + i'. The access functions of the array are
+     `{i_init, + i_step}_for1' and `{j_init, +, j_step}_for2' relative
+     to `a'.
+
+     Usually, the object the pointer refers to is either unknown, or we
+     can't prove that the access is confined to the boundaries of a
+     certain object.
+
+     Two data references can be compared only if at least one of these
+     two representations has all its fields filled for both data
+     references.
+
+     The current strategy for data dependence tests is as follows: If
+     both `a' and `b' are represented as arrays, compare
+     `a.base_object' and `b.base_object'; if they are equal, apply
+     dependence tests (use access functions based on base_objects).
+     Else if both `a' and `b' are represented as pointers, compare
+     `a.first_location' and `b.first_location'; if they are equal,
+     apply dependence tests (use access functions based on first
+     location).  However, if `a' and `b' are represented differently,
+     only try to prove that the bases are definitely different.
+
+   * Aliasing information.
+
+   * Alignment information.
+
+ The structure describing the relation between two data references is
+`data_dependence_relation' and the shorter name for a pointer to such a
+structure is `ddr_p'.  This structure contains:
+
+   * a pointer to each data reference,
+
+   * a tree node `are_dependent' that is set to `chrec_known' if the
+     analysis has proved that there is no dependence between these two
+     data references, `chrec_dont_know' if the analysis was not able to
+     determine any useful result and potentially there could exist a
+     dependence between these data references, and `are_dependent' is
+     set to `NULL_TREE' if there exist a dependence relation between the
+     data references, and the description of this dependence relation is
+     given in the `subscripts', `dir_vects', and `dist_vects' arrays,
+
+   * a boolean that determines whether the dependence relation can be
+     represented by a classical distance vector,
+
+   * an array `subscripts' that contains a description of each
+     subscript of the data references.  Given two array accesses a
+     subscript is the tuple composed of the access functions for a given
+     dimension.  For example, given `A[f1][f2][f3]' and
+     `B[g1][g2][g3]', there are three subscripts: `(f1, g1), (f2, g2),
+     (f3, g3)'.
+
+   * two arrays `dir_vects' and `dist_vects' that contain classical
+     representations of the data dependences under the form of
+     direction and distance dependence vectors,
+
+   * an array of loops `loop_nest' that contains the loops to which the
+     distance and direction vectors refer to.
+
+ Several functions for pretty printing the information extracted by the
+data dependence analysis are available: `dump_ddrs' prints with a
+maximum verbosity the details of a data dependence relations array,
+`dump_dist_dir_vectors' prints only the classical distance and
+direction vectors for a data dependence relations array, and
+`dump_data_references' prints the details of the data references
+contained in a data reference array.
+
+
+File: gccint.info,  Node: Lambda,  Next: Omega,  Prev: Dependency analysis,  Up: Loop Analysis and Representation
+
+14.9 Linear loop transformations framework
+==========================================
+
+Lambda is a framework that allows transformations of loops using
+non-singular matrix based transformations of the iteration space and
+loop bounds. This allows compositions of skewing, scaling, interchange,
+and reversal transformations.  These transformations are often used to
+improve cache behavior or remove inner loop dependencies to allow
+parallelization and vectorization to take place.
+
+ To perform these transformations, Lambda requires that the loopnest be
+converted into an internal form that can be matrix transformed easily.
+To do this conversion, the function `gcc_loopnest_to_lambda_loopnest'
+is provided.  If the loop cannot be transformed using lambda, this
+function will return NULL.
+
+ Once a `lambda_loopnest' is obtained from the conversion function, it
+can be transformed by using `lambda_loopnest_transform', which takes a
+transformation matrix to apply.  Note that it is up to the caller to
+verify that the transformation matrix is legal to apply to the loop
+(dependence respecting, etc).  Lambda simply applies whatever matrix it
+is told to provide.  It can be extended to make legal matrices out of
+any non-singular matrix, but this is not currently implemented.
+Legality of a matrix for a given loopnest can be verified using
+`lambda_transform_legal_p'.
+
+ Given a transformed loopnest, conversion back into gcc IR is done by
+`lambda_loopnest_to_gcc_loopnest'.  This function will modify the loops
+so that they match the transformed loopnest.
+
+
+File: gccint.info,  Node: Omega,  Prev: Lambda,  Up: Loop Analysis and Representation
+
+14.10 Omega a solver for linear programming problems
+====================================================
+
+The data dependence analysis contains several solvers triggered
+sequentially from the less complex ones to the more sophisticated.  For
+ensuring the consistency of the results of these solvers, a data
+dependence check pass has been implemented based on two different
+solvers.  The second method that has been integrated to GCC is based on
+the Omega dependence solver, written in the 1990's by William Pugh and
+David Wonnacott.  Data dependence tests can be formulated using a
+subset of the Presburger arithmetics that can be translated to linear
+constraint systems.  These linear constraint systems can then be solved
+using the Omega solver.
+
+ The Omega solver is using Fourier-Motzkin's algorithm for variable
+elimination: a linear constraint system containing `n' variables is
+reduced to a linear constraint system with `n-1' variables.  The Omega
+solver can also be used for solving other problems that can be
+expressed under the form of a system of linear equalities and
+inequalities.  The Omega solver is known to have an exponential worst
+case, also known under the name of "omega nightmare" in the literature,
+but in practice, the omega test is known to be efficient for the common
+data dependence tests.
+
+ The interface used by the Omega solver for describing the linear
+programming problems is described in `omega.h', and the solver is
+`omega_solve_problem'.
+
+
+File: gccint.info,  Node: Control Flow,  Next: Loop Analysis and Representation,  Prev: RTL,  Up: Top
+
+15 Control Flow Graph
+*********************
+
+A control flow graph (CFG) is a data structure built on top of the
+intermediate code representation (the RTL or `tree' instruction stream)
+abstracting the control flow behavior of a function that is being
+compiled.  The CFG is a directed graph where the vertices represent
+basic blocks and edges represent possible transfer of control flow from
+one basic block to another.  The data structures used to represent the
+control flow graph are defined in `basic-block.h'.
+
+* Menu:
+
+* Basic Blocks::           The definition and representation of basic blocks.
+* Edges::                  Types of edges and their representation.
+* Profile information::    Representation of frequencies and probabilities.
+* Maintaining the CFG::    Keeping the control flow graph and up to date.
+* Liveness information::   Using and maintaining liveness information.
+
+
+File: gccint.info,  Node: Basic Blocks,  Next: Edges,  Up: Control Flow
+
+15.1 Basic Blocks
+=================
+
+A basic block is a straight-line sequence of code with only one entry
+point and only one exit.  In GCC, basic blocks are represented using
+the `basic_block' data type.
+
+ Two pointer members of the `basic_block' structure are the pointers
+`next_bb' and `prev_bb'.  These are used to keep doubly linked chain of
+basic blocks in the same order as the underlying instruction stream.
+The chain of basic blocks is updated transparently by the provided API
+for manipulating the CFG.  The macro `FOR_EACH_BB' can be used to visit
+all the basic blocks in lexicographical order.  Dominator traversals
+are also possible using `walk_dominator_tree'.  Given two basic blocks
+A and B, block A dominates block B if A is _always_ executed before B.
+
+ The `BASIC_BLOCK' array contains all basic blocks in an unspecified
+order.  Each `basic_block' structure has a field that holds a unique
+integer identifier `index' that is the index of the block in the
+`BASIC_BLOCK' array.  The total number of basic blocks in the function
+is `n_basic_blocks'.  Both the basic block indices and the total number
+of basic blocks may vary during the compilation process, as passes
+reorder, create, duplicate, and destroy basic blocks.  The index for
+any block should never be greater than `last_basic_block'.
+
+ Special basic blocks represent possible entry and exit points of a
+function.  These blocks are called `ENTRY_BLOCK_PTR' and
+`EXIT_BLOCK_PTR'.  These blocks do not contain any code, and are not
+elements of the `BASIC_BLOCK' array.  Therefore they have been assigned
+unique, negative index numbers.
+
+ Each `basic_block' also contains pointers to the first instruction
+(the "head") and the last instruction (the "tail") or "end" of the
+instruction stream contained in a basic block.  In fact, since the
+`basic_block' data type is used to represent blocks in both major
+intermediate representations of GCC (`tree' and RTL), there are
+pointers to the head and end of a basic block for both representations.
+
+ For RTL, these pointers are `rtx head, end'.  In the RTL function
+representation, the head pointer always points either to a
+`NOTE_INSN_BASIC_BLOCK' or to a `CODE_LABEL', if present.  In the RTL
+representation of a function, the instruction stream contains not only
+the "real" instructions, but also "notes".  Any function that moves or
+duplicates the basic blocks needs to take care of updating of these
+notes.  Many of these notes expect that the instruction stream consists
+of linear regions, making such updates difficult.   The
+`NOTE_INSN_BASIC_BLOCK' note is the only kind of note that may appear
+in the instruction stream contained in a basic block.  The instruction
+stream of a basic block always follows a `NOTE_INSN_BASIC_BLOCK',  but
+zero or more `CODE_LABEL' nodes can precede the block note.   A basic
+block ends by control flow instruction or last instruction before
+following `CODE_LABEL' or `NOTE_INSN_BASIC_BLOCK'.  A `CODE_LABEL'
+cannot appear in the instruction stream of a basic block.
+
+ In addition to notes, the jump table vectors are also represented as
+"pseudo-instructions" inside the insn stream.  These vectors never
+appear in the basic block and should always be placed just after the
+table jump instructions referencing them.  After removing the
+table-jump it is often difficult to eliminate the code computing the
+address and referencing the vector, so cleaning up these vectors is
+postponed until after liveness analysis.   Thus the jump table vectors
+may appear in the insn stream unreferenced and without any purpose.
+Before any edge is made "fall-thru", the existence of such construct in
+the way needs to be checked by calling `can_fallthru' function.
+
+ For the `tree' representation, the head and end of the basic block are
+being pointed to by the `stmt_list' field, but this special `tree'
+should never be referenced directly.  Instead, at the tree level
+abstract containers and iterators are used to access statements and
+expressions in basic blocks.  These iterators are called "block
+statement iterators" (BSIs).  Grep for `^bsi' in the various `tree-*'
+files.  The following snippet will pretty-print all the statements of
+the program in the GIMPLE representation.
+
+     FOR_EACH_BB (bb)
+       {
+          block_stmt_iterator si;
+
+          for (si = bsi_start (bb); !bsi_end_p (si); bsi_next (&si))
+            {
+               tree stmt = bsi_stmt (si);
+               print_generic_stmt (stderr, stmt, 0);
+            }
+       }
+
+
+File: gccint.info,  Node: Edges,  Next: Profile information,  Prev: Basic Blocks,  Up: Control Flow
+
+15.2 Edges
+==========
+
+Edges represent possible control flow transfers from the end of some
+basic block A to the head of another basic block B.  We say that A is a
+predecessor of B, and B is a successor of A.  Edges are represented in
+GCC with the `edge' data type.  Each `edge' acts as a link between two
+basic blocks: the `src' member of an edge points to the predecessor
+basic block of the `dest' basic block.  The members `preds' and `succs'
+of the `basic_block' data type point to type-safe vectors of edges to
+the predecessors and successors of the block.
+
+ When walking the edges in an edge vector, "edge iterators" should be
+used.  Edge iterators are constructed using the `edge_iterator' data
+structure and several methods are available to operate on them:
+
+`ei_start'
+     This function initializes an `edge_iterator' that points to the
+     first edge in a vector of edges.
+
+`ei_last'
+     This function initializes an `edge_iterator' that points to the
+     last edge in a vector of edges.
+
+`ei_end_p'
+     This predicate is `true' if an `edge_iterator' represents the last
+     edge in an edge vector.
+
+`ei_one_before_end_p'
+     This predicate is `true' if an `edge_iterator' represents the
+     second last edge in an edge vector.
+
+`ei_next'
+     This function takes a pointer to an `edge_iterator' and makes it
+     point to the next edge in the sequence.
+
+`ei_prev'
+     This function takes a pointer to an `edge_iterator' and makes it
+     point to the previous edge in the sequence.
+
+`ei_edge'
+     This function returns the `edge' currently pointed to by an
+     `edge_iterator'.
+
+`ei_safe_safe'
+     This function returns the `edge' currently pointed to by an
+     `edge_iterator', but returns `NULL' if the iterator is pointing at
+     the end of the sequence.  This function has been provided for
+     existing code makes the assumption that a `NULL' edge indicates
+     the end of the sequence.
+
+
+ The convenience macro `FOR_EACH_EDGE' can be used to visit all of the
+edges in a sequence of predecessor or successor edges.  It must not be
+used when an element might be removed during the traversal, otherwise
+elements will be missed.  Here is an example of how to use the macro:
+
+     edge e;
+     edge_iterator ei;
+
+     FOR_EACH_EDGE (e, ei, bb->succs)
+       {
+          if (e->flags & EDGE_FALLTHRU)
+            break;
+       }
+
+ There are various reasons why control flow may transfer from one block
+to another.  One possibility is that some instruction, for example a
+`CODE_LABEL', in a linearized instruction stream just always starts a
+new basic block.  In this case a "fall-thru" edge links the basic block
+to the first following basic block.  But there are several other
+reasons why edges may be created.  The `flags' field of the `edge' data
+type is used to store information about the type of edge we are dealing
+with.  Each edge is of one of the following types:
+
+_jump_
+     No type flags are set for edges corresponding to jump instructions.
+     These edges are used for unconditional or conditional jumps and in
+     RTL also for table jumps.  They are the easiest to manipulate as
+     they may be freely redirected when the flow graph is not in SSA
+     form.
+
+_fall-thru_
+     Fall-thru edges are present in case where the basic block may
+     continue execution to the following one without branching.  These
+     edges have the `EDGE_FALLTHRU' flag set.  Unlike other types of
+     edges, these edges must come into the basic block immediately
+     following in the instruction stream.  The function
+     `force_nonfallthru' is available to insert an unconditional jump
+     in the case that redirection is needed.  Note that this may
+     require creation of a new basic block.
+
+_exception handling_
+     Exception handling edges represent possible control transfers from
+     a trapping instruction to an exception handler.  The definition of
+     "trapping" varies.  In C++, only function calls can throw, but for
+     Java, exceptions like division by zero or segmentation fault are
+     defined and thus each instruction possibly throwing this kind of
+     exception needs to be handled as control flow instruction.
+     Exception edges have the `EDGE_ABNORMAL' and `EDGE_EH' flags set.
+
+     When updating the instruction stream it is easy to change possibly
+     trapping instruction to non-trapping, by simply removing the
+     exception edge.  The opposite conversion is difficult, but should
+     not happen anyway.  The edges can be eliminated via
+     `purge_dead_edges' call.
+
+     In the RTL representation, the destination of an exception edge is
+     specified by `REG_EH_REGION' note attached to the insn.  In case
+     of a trapping call the `EDGE_ABNORMAL_CALL' flag is set too.  In
+     the `tree' representation, this extra flag is not set.
+
+     In the RTL representation, the predicate `may_trap_p' may be used
+     to check whether instruction still may trap or not.  For the tree
+     representation, the `tree_could_trap_p' predicate is available,
+     but this predicate only checks for possible memory traps, as in
+     dereferencing an invalid pointer location.
+
+_sibling calls_
+     Sibling calls or tail calls terminate the function in a
+     non-standard way and thus an edge to the exit must be present.
+     `EDGE_SIBCALL' and `EDGE_ABNORMAL' are set in such case.  These
+     edges only exist in the RTL representation.
+
+_computed jumps_
+     Computed jumps contain edges to all labels in the function
+     referenced from the code.  All those edges have `EDGE_ABNORMAL'
+     flag set.  The edges used to represent computed jumps often cause
+     compile time performance problems, since functions consisting of
+     many taken labels and many computed jumps may have _very_ dense
+     flow graphs, so these edges need to be handled with special care.
+     During the earlier stages of the compilation process, GCC tries to
+     avoid such dense flow graphs by factoring computed jumps.  For
+     example, given the following series of jumps,
+
+            goto *x;
+            [ ... ]
+
+            goto *x;
+            [ ... ]
+
+            goto *x;
+            [ ... ]
+
+     factoring the computed jumps results in the following code sequence
+     which has a much simpler flow graph:
+
+            goto y;
+            [ ... ]
+
+            goto y;
+            [ ... ]
+
+            goto y;
+            [ ... ]
+
+          y:
+            goto *x;
+
+     However, the classic problem with this transformation is that it
+     has a runtime cost in there resulting code: An extra jump.
+     Therefore, the computed jumps are un-factored in the later passes
+     of the compiler.  Be aware of that when you work on passes in that
+     area.  There have been numerous examples already where the compile
+     time for code with unfactored computed jumps caused some serious
+     headaches.
+
+_nonlocal goto handlers_
+     GCC allows nested functions to return into caller using a `goto'
+     to a label passed to as an argument to the callee.  The labels
+     passed to nested functions contain special code to cleanup after
+     function call.  Such sections of code are referred to as "nonlocal
+     goto receivers".  If a function contains such nonlocal goto
+     receivers, an edge from the call to the label is created with the
+     `EDGE_ABNORMAL' and `EDGE_ABNORMAL_CALL' flags set.
+
+_function entry points_
+     By definition, execution of function starts at basic block 0, so
+     there is always an edge from the `ENTRY_BLOCK_PTR' to basic block
+     0.  There is no `tree' representation for alternate entry points at
+     this moment.  In RTL, alternate entry points are specified by
+     `CODE_LABEL' with `LABEL_ALTERNATE_NAME' defined.  This feature is
+     currently used for multiple entry point prologues and is limited
+     to post-reload passes only.  This can be used by back-ends to emit
+     alternate prologues for functions called from different contexts.
+     In future full support for multiple entry functions defined by
+     Fortran 90 needs to be implemented.
+
+_function exits_
+     In the pre-reload representation a function terminates after the
+     last instruction in the insn chain and no explicit return
+     instructions are used.  This corresponds to the fall-thru edge
+     into exit block.  After reload, optimal RTL epilogues are used
+     that use explicit (conditional) return instructions that are
+     represented by edges with no flags set.
+
+
+
+File: gccint.info,  Node: Profile information,  Next: Maintaining the CFG,  Prev: Edges,  Up: Control Flow
+
+15.3 Profile information
+========================
+
+In many cases a compiler must make a choice whether to trade speed in
+one part of code for speed in another, or to trade code size for code
+speed.  In such cases it is useful to know information about how often
+some given block will be executed.  That is the purpose for maintaining
+profile within the flow graph.  GCC can handle profile information
+obtained through "profile feedback", but it can also  estimate branch
+probabilities based on statics and heuristics.
+
+ The feedback based profile is produced by compiling the program with
+instrumentation, executing it on a train run and reading the numbers of
+executions of basic blocks and edges back to the compiler while
+re-compiling the program to produce the final executable.  This method
+provides very accurate information about where a program spends most of
+its time on the train run.  Whether it matches the average run of
+course depends on the choice of train data set, but several studies
+have shown that the behavior of a program usually changes just
+marginally over different data sets.
+
+ When profile feedback is not available, the compiler may be asked to
+attempt to predict the behavior of each branch in the program using a
+set of heuristics (see `predict.def' for details) and compute estimated
+frequencies of each basic block by propagating the probabilities over
+the graph.
+
+ Each `basic_block' contains two integer fields to represent profile
+information: `frequency' and `count'.  The `frequency' is an estimation
+how often is basic block executed within a function.  It is represented
+as an integer scaled in the range from 0 to `BB_FREQ_BASE'.  The most
+frequently executed basic block in function is initially set to
+`BB_FREQ_BASE' and the rest of frequencies are scaled accordingly.
+During optimization, the frequency of the most frequent basic block can
+both decrease (for instance by loop unrolling) or grow (for instance by
+cross-jumping optimization), so scaling sometimes has to be performed
+multiple times.
+
+ The `count' contains hard-counted numbers of execution measured during
+training runs and is nonzero only when profile feedback is available.
+This value is represented as the host's widest integer (typically a 64
+bit integer) of the special type `gcov_type'.
+
+ Most optimization passes can use only the frequency information of a
+basic block, but a few passes may want to know hard execution counts.
+The frequencies should always match the counts after scaling, however
+during updating of the profile information numerical error may
+accumulate into quite large errors.
+
+ Each edge also contains a branch probability field: an integer in the
+range from 0 to `REG_BR_PROB_BASE'.  It represents probability of
+passing control from the end of the `src' basic block to the `dest'
+basic block, i.e. the probability that control will flow along this
+edge.   The `EDGE_FREQUENCY' macro is available to compute how
+frequently a given edge is taken.  There is a `count' field for each
+edge as well, representing same information as for a basic block.
+
+ The basic block frequencies are not represented in the instruction
+stream, but in the RTL representation the edge frequencies are
+represented for conditional jumps (via the `REG_BR_PROB' macro) since
+they are used when instructions are output to the assembly file and the
+flow graph is no longer maintained.
+
+ The probability that control flow arrives via a given edge to its
+destination basic block is called "reverse probability" and is not
+directly represented, but it may be easily computed from frequencies of
+basic blocks.
+
+ Updating profile information is a delicate task that can unfortunately
+not be easily integrated with the CFG manipulation API.  Many of the
+functions and hooks to modify the CFG, such as
+`redirect_edge_and_branch', do not have enough information to easily
+update the profile, so updating it is in the majority of cases left up
+to the caller.  It is difficult to uncover bugs in the profile updating
+code, because they manifest themselves only by producing worse code,
+and checking profile consistency is not possible because of numeric
+error accumulation.  Hence special attention needs to be given to this
+issue in each pass that modifies the CFG.
+
+ It is important to point out that `REG_BR_PROB_BASE' and
+`BB_FREQ_BASE' are both set low enough to be possible to compute second
+power of any frequency or probability in the flow graph, it is not
+possible to even square the `count' field, as modern CPUs are fast
+enough to execute $2^32$ operations quickly.
+
+
+File: gccint.info,  Node: Maintaining the CFG,  Next: Liveness information,  Prev: Profile information,  Up: Control Flow
+
+15.4 Maintaining the CFG
+========================
+
+An important task of each compiler pass is to keep both the control
+flow graph and all profile information up-to-date.  Reconstruction of
+the control flow graph after each pass is not an option, since it may be
+very expensive and lost profile information cannot be reconstructed at
+all.
+
+ GCC has two major intermediate representations, and both use the
+`basic_block' and `edge' data types to represent control flow.  Both
+representations share as much of the CFG maintenance code as possible.
+For each representation, a set of "hooks" is defined so that each
+representation can provide its own implementation of CFG manipulation
+routines when necessary.  These hooks are defined in `cfghooks.h'.
+There are hooks for almost all common CFG manipulations, including
+block splitting and merging, edge redirection and creating and deleting
+basic blocks.  These hooks should provide everything you need to
+maintain and manipulate the CFG in both the RTL and `tree'
+representation.
+
+ At the moment, the basic block boundaries are maintained transparently
+when modifying instructions, so there rarely is a need to move them
+manually (such as in case someone wants to output instruction outside
+basic block explicitly).  Often the CFG may be better viewed as
+integral part of instruction chain, than structure built on the top of
+it.  However, in principle the control flow graph for the `tree'
+representation is _not_ an integral part of the representation, in that
+a function tree may be expanded without first building a  flow graph
+for the `tree' representation at all.  This happens when compiling
+without any `tree' optimization enabled.  When the `tree' optimizations
+are enabled and the instruction stream is rewritten in SSA form, the
+CFG is very tightly coupled with the instruction stream.  In
+particular, statement insertion and removal has to be done with care.
+In fact, the whole `tree' representation can not be easily used or
+maintained without proper maintenance of the CFG simultaneously.
+
+ In the RTL representation, each instruction has a `BLOCK_FOR_INSN'
+value that represents pointer to the basic block that contains the
+instruction.  In the `tree' representation, the function `bb_for_stmt'
+returns a pointer to the basic block containing the queried statement.
+
+ When changes need to be applied to a function in its `tree'
+representation, "block statement iterators" should be used.  These
+iterators provide an integrated abstraction of the flow graph and the
+instruction stream.  Block statement iterators are constructed using
+the `block_stmt_iterator' data structure and several modifier are
+available, including the following:
+
+`bsi_start'
+     This function initializes a `block_stmt_iterator' that points to
+     the first non-empty statement in a basic block.
+
+`bsi_last'
+     This function initializes a `block_stmt_iterator' that points to
+     the last statement in a basic block.
+
+`bsi_end_p'
+     This predicate is `true' if a `block_stmt_iterator' represents the
+     end of a basic block.
+
+`bsi_next'
+     This function takes a `block_stmt_iterator' and makes it point to
+     its successor.
+
+`bsi_prev'
+     This function takes a `block_stmt_iterator' and makes it point to
+     its predecessor.
+
+`bsi_insert_after'
+     This function inserts a statement after the `block_stmt_iterator'
+     passed in.  The final parameter determines whether the statement
+     iterator is updated to point to the newly inserted statement, or
+     left pointing to the original statement.
+
+`bsi_insert_before'
+     This function inserts a statement before the `block_stmt_iterator'
+     passed in.  The final parameter determines whether the statement
+     iterator is updated to point to the newly inserted statement, or
+     left pointing to the original  statement.
+
+`bsi_remove'
+     This function removes the `block_stmt_iterator' passed in and
+     rechains the remaining statements in a basic block, if any.
+
+ In the RTL representation, the macros `BB_HEAD' and `BB_END' may be
+used to get the head and end `rtx' of a basic block.  No abstract
+iterators are defined for traversing the insn chain, but you can just
+use `NEXT_INSN' and `PREV_INSN' instead.  *Note Insns::.
+
+ Usually a code manipulating pass simplifies the instruction stream and
+the flow of control, possibly eliminating some edges.  This may for
+example happen when a conditional jump is replaced with an
+unconditional jump, but also when simplifying possibly trapping
+instruction to non-trapping while compiling Java.  Updating of edges is
+not transparent and each optimization pass is required to do so
+manually.  However only few cases occur in practice.  The pass may call
+`purge_dead_edges' on a given basic block to remove superfluous edges,
+if any.
+
+ Another common scenario is redirection of branch instructions, but
+this is best modeled as redirection of edges in the control flow graph
+and thus use of `redirect_edge_and_branch' is preferred over more low
+level functions, such as `redirect_jump' that operate on RTL chain
+only.  The CFG hooks defined in `cfghooks.h' should provide the
+complete API required for manipulating and maintaining the CFG.
+
+ It is also possible that a pass has to insert control flow instruction
+into the middle of a basic block, thus creating an entry point in the
+middle of the basic block, which is impossible by definition: The block
+must be split to make sure it only has one entry point, i.e. the head
+of the basic block.  The CFG hook `split_block' may be used when an
+instruction in the middle of a basic block has to become the target of
+a jump or branch instruction.
+
+ For a global optimizer, a common operation is to split edges in the
+flow graph and insert instructions on them.  In the RTL representation,
+this can be easily done using the `insert_insn_on_edge' function that
+emits an instruction "on the edge", caching it for a later
+`commit_edge_insertions' call that will take care of moving the
+inserted instructions off the edge into the instruction stream
+contained in a basic block.  This includes the creation of new basic
+blocks where needed.  In the `tree' representation, the equivalent
+functions are `bsi_insert_on_edge' which inserts a block statement
+iterator on an edge, and `bsi_commit_edge_inserts' which flushes the
+instruction to actual instruction stream.
+
+ While debugging the optimization pass, a `verify_flow_info' function
+may be useful to find bugs in the control flow graph updating code.
+
+ Note that at present, the representation of control flow in the `tree'
+representation is discarded before expanding to RTL.  Long term the CFG
+should be maintained and "expanded" to the RTL representation along
+with the function `tree' itself.
+
+
+File: gccint.info,  Node: Liveness information,  Prev: Maintaining the CFG,  Up: Control Flow
+
+15.5 Liveness information
+=========================
+
+Liveness information is useful to determine whether some register is
+"live" at given point of program, i.e. that it contains a value that
+may be used at a later point in the program.  This information is used,
+for instance, during register allocation, as the pseudo registers only
+need to be assigned to a unique hard register or to a stack slot if
+they are live.  The hard registers and stack slots may be freely reused
+for other values when a register is dead.
+
+ Liveness information is available in the back end starting with
+`pass_df_initialize' and ending with `pass_df_finish'.  Three flavors
+of live analysis are available: With `LR', it is possible to determine
+at any point `P' in the function if the register may be used on some
+path from `P' to the end of the function.  With `UR', it is possible to
+determine if there is a path from the beginning of the function to `P'
+that defines the variable.  `LIVE' is the intersection of the `LR' and
+`UR' and a variable is live at `P' if there is both an assignment that
+reaches it from the beginning of the function and a use that can be
+reached on some path from `P' to the end of the function.
+
+ In general `LIVE' is the most useful of the three.  The macros
+`DF_[LR,UR,LIVE]_[IN,OUT]' can be used to access this information.  The
+macros take a basic block number and return a bitmap that is indexed by
+the register number.  This information is only guaranteed to be up to
+date after calls are made to `df_analyze'.  See the file `df-core.c'
+for details on using the dataflow.
+
+ The liveness information is stored partly in the RTL instruction stream
+and partly in the flow graph.  Local information is stored in the
+instruction stream: Each instruction may contain `REG_DEAD' notes
+representing that the value of a given register is no longer needed, or
+`REG_UNUSED' notes representing that the value computed by the
+instruction is never used.  The second is useful for instructions
+computing multiple values at once.
+
+
+File: gccint.info,  Node: Machine Desc,  Next: Target Macros,  Prev: Loop Analysis and Representation,  Up: Top
+
+16 Machine Descriptions
+***********************
+
+A machine description has two parts: a file of instruction patterns
+(`.md' file) and a C header file of macro definitions.
+
+ The `.md' file for a target machine contains a pattern for each
+instruction that the target machine supports (or at least each
+instruction that is worth telling the compiler about).  It may also
+contain comments.  A semicolon causes the rest of the line to be a
+comment, unless the semicolon is inside a quoted string.
+
+ See the next chapter for information on the C header file.
+
+* Menu:
+
+* Overview::            How the machine description is used.
+* Patterns::            How to write instruction patterns.
+* Example::             An explained example of a `define_insn' pattern.
+* RTL Template::        The RTL template defines what insns match a pattern.
+* Output Template::     The output template says how to make assembler code
+                        from such an insn.
+* Output Statement::    For more generality, write C code to output
+                        the assembler code.
+* Predicates::          Controlling what kinds of operands can be used
+                        for an insn.
+* Constraints::         Fine-tuning operand selection.
+* Standard Names::      Names mark patterns to use for code generation.
+* Pattern Ordering::    When the order of patterns makes a difference.
+* Dependent Patterns::  Having one pattern may make you need another.
+* Jump Patterns::       Special considerations for patterns for jump insns.
+* Looping Patterns::    How to define patterns for special looping insns.
+* Insn Canonicalizations::Canonicalization of Instructions
+* Expander Definitions::Generating a sequence of several RTL insns
+                        for a standard operation.
+* Insn Splitting::      Splitting Instructions into Multiple Instructions.
+* Including Patterns::  Including Patterns in Machine Descriptions.
+* Peephole Definitions::Defining machine-specific peephole optimizations.
+* Insn Attributes::     Specifying the value of attributes for generated insns.
+* Conditional Execution::Generating `define_insn' patterns for
+                         predication.
+* Constant Definitions::Defining symbolic constants that can be used in the
+                        md file.
+* Iterators::           Using iterators to generate patterns from a template.
+
+
+File: gccint.info,  Node: Overview,  Next: Patterns,  Up: Machine Desc
+
+16.1 Overview of How the Machine Description is Used
+====================================================
+
+There are three main conversions that happen in the compiler:
+
+  1. The front end reads the source code and builds a parse tree.
+
+  2. The parse tree is used to generate an RTL insn list based on named
+     instruction patterns.
+
+  3. The insn list is matched against the RTL templates to produce
+     assembler code.
+
+
+ For the generate pass, only the names of the insns matter, from either
+a named `define_insn' or a `define_expand'.  The compiler will choose
+the pattern with the right name and apply the operands according to the
+documentation later in this chapter, without regard for the RTL
+template or operand constraints.  Note that the names the compiler looks
+for are hard-coded in the compiler--it will ignore unnamed patterns and
+patterns with names it doesn't know about, but if you don't provide a
+named pattern it needs, it will abort.
+
+ If a `define_insn' is used, the template given is inserted into the
+insn list.  If a `define_expand' is used, one of three things happens,
+based on the condition logic.  The condition logic may manually create
+new insns for the insn list, say via `emit_insn()', and invoke `DONE'.
+For certain named patterns, it may invoke `FAIL' to tell the compiler
+to use an alternate way of performing that task.  If it invokes neither
+`DONE' nor `FAIL', the template given in the pattern is inserted, as if
+the `define_expand' were a `define_insn'.
+
+ Once the insn list is generated, various optimization passes convert,
+replace, and rearrange the insns in the insn list.  This is where the
+`define_split' and `define_peephole' patterns get used, for example.
+
+ Finally, the insn list's RTL is matched up with the RTL templates in
+the `define_insn' patterns, and those patterns are used to emit the
+final assembly code.  For this purpose, each named `define_insn' acts
+like it's unnamed, since the names are ignored.
+
+
+File: gccint.info,  Node: Patterns,  Next: Example,  Prev: Overview,  Up: Machine Desc
+
+16.2 Everything about Instruction Patterns
+==========================================
+
+Each instruction pattern contains an incomplete RTL expression, with
+pieces to be filled in later, operand constraints that restrict how the
+pieces can be filled in, and an output pattern or C code to generate
+the assembler output, all wrapped up in a `define_insn' expression.
+
+ A `define_insn' is an RTL expression containing four or five operands:
+
+  1. An optional name.  The presence of a name indicate that this
+     instruction pattern can perform a certain standard job for the
+     RTL-generation pass of the compiler.  This pass knows certain
+     names and will use the instruction patterns with those names, if
+     the names are defined in the machine description.
+
+     The absence of a name is indicated by writing an empty string
+     where the name should go.  Nameless instruction patterns are never
+     used for generating RTL code, but they may permit several simpler
+     insns to be combined later on.
+
+     Names that are not thus known and used in RTL-generation have no
+     effect; they are equivalent to no name at all.
+
+     For the purpose of debugging the compiler, you may also specify a
+     name beginning with the `*' character.  Such a name is used only
+     for identifying the instruction in RTL dumps; it is entirely
+     equivalent to having a nameless pattern for all other purposes.
+
+  2. The "RTL template" (*note RTL Template::) is a vector of incomplete
+     RTL expressions which show what the instruction should look like.
+     It is incomplete because it may contain `match_operand',
+     `match_operator', and `match_dup' expressions that stand for
+     operands of the instruction.
+
+     If the vector has only one element, that element is the template
+     for the instruction pattern.  If the vector has multiple elements,
+     then the instruction pattern is a `parallel' expression containing
+     the elements described.
+
+  3. A condition.  This is a string which contains a C expression that
+     is the final test to decide whether an insn body matches this
+     pattern.
+
+     For a named pattern, the condition (if present) may not depend on
+     the data in the insn being matched, but only the
+     target-machine-type flags.  The compiler needs to test these
+     conditions during initialization in order to learn exactly which
+     named instructions are available in a particular run.
+
+     For nameless patterns, the condition is applied only when matching
+     an individual insn, and only after the insn has matched the
+     pattern's recognition template.  The insn's operands may be found
+     in the vector `operands'.  For an insn where the condition has
+     once matched, it can't be used to control register allocation, for
+     example by excluding certain hard registers or hard register
+     combinations.
+
+  4. The "output template": a string that says how to output matching
+     insns as assembler code.  `%' in this string specifies where to
+     substitute the value of an operand.  *Note Output Template::.
+
+     When simple substitution isn't general enough, you can specify a
+     piece of C code to compute the output.  *Note Output Statement::.
+
+  5. Optionally, a vector containing the values of attributes for insns
+     matching this pattern.  *Note Insn Attributes::.
+
+
+File: gccint.info,  Node: Example,  Next: RTL Template,  Prev: Patterns,  Up: Machine Desc
+
+16.3 Example of `define_insn'
+=============================
+
+Here is an actual example of an instruction pattern, for the
+68000/68020.
+
+     (define_insn "tstsi"
+       [(set (cc0)
+             (match_operand:SI 0 "general_operand" "rm"))]
+       ""
+       "*
+     {
+       if (TARGET_68020 || ! ADDRESS_REG_P (operands[0]))
+         return \"tstl %0\";
+       return \"cmpl #0,%0\";
+     }")
+
+This can also be written using braced strings:
+
+     (define_insn "tstsi"
+       [(set (cc0)
+             (match_operand:SI 0 "general_operand" "rm"))]
+       ""
+     {
+       if (TARGET_68020 || ! ADDRESS_REG_P (operands[0]))
+         return "tstl %0";
+       return "cmpl #0,%0";
+     })
+
+ This is an instruction that sets the condition codes based on the
+value of a general operand.  It has no condition, so any insn whose RTL
+description has the form shown may be handled according to this
+pattern.  The name `tstsi' means "test a `SImode' value" and tells the
+RTL generation pass that, when it is necessary to test such a value, an
+insn to do so can be constructed using this pattern.
+
+ The output control string is a piece of C code which chooses which
+output template to return based on the kind of operand and the specific
+type of CPU for which code is being generated.
+
+ `"rm"' is an operand constraint.  Its meaning is explained below.
+
+
+File: gccint.info,  Node: RTL Template,  Next: Output Template,  Prev: Example,  Up: Machine Desc
+
+16.4 RTL Template
+=================
+
+The RTL template is used to define which insns match the particular
+pattern and how to find their operands.  For named patterns, the RTL
+template also says how to construct an insn from specified operands.
+
+ Construction involves substituting specified operands into a copy of
+the template.  Matching involves determining the values that serve as
+the operands in the insn being matched.  Both of these activities are
+controlled by special expression types that direct matching and
+substitution of the operands.
+
+`(match_operand:M N PREDICATE CONSTRAINT)'
+     This expression is a placeholder for operand number N of the insn.
+     When constructing an insn, operand number N will be substituted at
+     this point.  When matching an insn, whatever appears at this
+     position in the insn will be taken as operand number N; but it
+     must satisfy PREDICATE or this instruction pattern will not match
+     at all.
+
+     Operand numbers must be chosen consecutively counting from zero in
+     each instruction pattern.  There may be only one `match_operand'
+     expression in the pattern for each operand number.  Usually
+     operands are numbered in the order of appearance in `match_operand'
+     expressions.  In the case of a `define_expand', any operand numbers
+     used only in `match_dup' expressions have higher values than all
+     other operand numbers.
+
+     PREDICATE is a string that is the name of a function that accepts
+     two arguments, an expression and a machine mode.  *Note
+     Predicates::.  During matching, the function will be called with
+     the putative operand as the expression and M as the mode argument
+     (if M is not specified, `VOIDmode' will be used, which normally
+     causes PREDICATE to accept any mode).  If it returns zero, this
+     instruction pattern fails to match.  PREDICATE may be an empty
+     string; then it means no test is to be done on the operand, so
+     anything which occurs in this position is valid.
+
+     Most of the time, PREDICATE will reject modes other than M--but
+     not always.  For example, the predicate `address_operand' uses M
+     as the mode of memory ref that the address should be valid for.
+     Many predicates accept `const_int' nodes even though their mode is
+     `VOIDmode'.
+
+     CONSTRAINT controls reloading and the choice of the best register
+     class to use for a value, as explained later (*note Constraints::).
+     If the constraint would be an empty string, it can be omitted.
+
+     People are often unclear on the difference between the constraint
+     and the predicate.  The predicate helps decide whether a given
+     insn matches the pattern.  The constraint plays no role in this
+     decision; instead, it controls various decisions in the case of an
+     insn which does match.
+
+`(match_scratch:M N CONSTRAINT)'
+     This expression is also a placeholder for operand number N and
+     indicates that operand must be a `scratch' or `reg' expression.
+
+     When matching patterns, this is equivalent to
+
+          (match_operand:M N "scratch_operand" PRED)
+
+     but, when generating RTL, it produces a (`scratch':M) expression.
+
+     If the last few expressions in a `parallel' are `clobber'
+     expressions whose operands are either a hard register or
+     `match_scratch', the combiner can add or delete them when
+     necessary.  *Note Side Effects::.
+
+`(match_dup N)'
+     This expression is also a placeholder for operand number N.  It is
+     used when the operand needs to appear more than once in the insn.
+
+     In construction, `match_dup' acts just like `match_operand': the
+     operand is substituted into the insn being constructed.  But in
+     matching, `match_dup' behaves differently.  It assumes that operand
+     number N has already been determined by a `match_operand'
+     appearing earlier in the recognition template, and it matches only
+     an identical-looking expression.
+
+     Note that `match_dup' should not be used to tell the compiler that
+     a particular register is being used for two operands (example:
+     `add' that adds one register to another; the second register is
+     both an input operand and the output operand).  Use a matching
+     constraint (*note Simple Constraints::) for those.  `match_dup' is
+     for the cases where one operand is used in two places in the
+     template, such as an instruction that computes both a quotient and
+     a remainder, where the opcode takes two input operands but the RTL
+     template has to refer to each of those twice; once for the
+     quotient pattern and once for the remainder pattern.
+
+`(match_operator:M N PREDICATE [OPERANDS...])'
+     This pattern is a kind of placeholder for a variable RTL expression
+     code.
+
+     When constructing an insn, it stands for an RTL expression whose
+     expression code is taken from that of operand N, and whose
+     operands are constructed from the patterns OPERANDS.
+
+     When matching an expression, it matches an expression if the
+     function PREDICATE returns nonzero on that expression _and_ the
+     patterns OPERANDS match the operands of the expression.
+
+     Suppose that the function `commutative_operator' is defined as
+     follows, to match any expression whose operator is one of the
+     commutative arithmetic operators of RTL and whose mode is MODE:
+
+          int
+          commutative_integer_operator (x, mode)
+               rtx x;
+               enum machine_mode mode;
+          {
+            enum rtx_code code = GET_CODE (x);
+            if (GET_MODE (x) != mode)
+              return 0;
+            return (GET_RTX_CLASS (code) == RTX_COMM_ARITH
+                    || code == EQ || code == NE);
+          }
+
+     Then the following pattern will match any RTL expression consisting
+     of a commutative operator applied to two general operands:
+
+          (match_operator:SI 3 "commutative_operator"
+            [(match_operand:SI 1 "general_operand" "g")
+             (match_operand:SI 2 "general_operand" "g")])
+
+     Here the vector `[OPERANDS...]' contains two patterns because the
+     expressions to be matched all contain two operands.
+
+     When this pattern does match, the two operands of the commutative
+     operator are recorded as operands 1 and 2 of the insn.  (This is
+     done by the two instances of `match_operand'.)  Operand 3 of the
+     insn will be the entire commutative expression: use `GET_CODE
+     (operands[3])' to see which commutative operator was used.
+
+     The machine mode M of `match_operator' works like that of
+     `match_operand': it is passed as the second argument to the
+     predicate function, and that function is solely responsible for
+     deciding whether the expression to be matched "has" that mode.
+
+     When constructing an insn, argument 3 of the gen-function will
+     specify the operation (i.e. the expression code) for the
+     expression to be made.  It should be an RTL expression, whose
+     expression code is copied into a new expression whose operands are
+     arguments 1 and 2 of the gen-function.  The subexpressions of
+     argument 3 are not used; only its expression code matters.
+
+     When `match_operator' is used in a pattern for matching an insn,
+     it usually best if the operand number of the `match_operator' is
+     higher than that of the actual operands of the insn.  This improves
+     register allocation because the register allocator often looks at
+     operands 1 and 2 of insns to see if it can do register tying.
+
+     There is no way to specify constraints in `match_operator'.  The
+     operand of the insn which corresponds to the `match_operator'
+     never has any constraints because it is never reloaded as a whole.
+     However, if parts of its OPERANDS are matched by `match_operand'
+     patterns, those parts may have constraints of their own.
+
+`(match_op_dup:M N[OPERANDS...])'
+     Like `match_dup', except that it applies to operators instead of
+     operands.  When constructing an insn, operand number N will be
+     substituted at this point.  But in matching, `match_op_dup' behaves
+     differently.  It assumes that operand number N has already been
+     determined by a `match_operator' appearing earlier in the
+     recognition template, and it matches only an identical-looking
+     expression.
+
+`(match_parallel N PREDICATE [SUBPAT...])'
+     This pattern is a placeholder for an insn that consists of a
+     `parallel' expression with a variable number of elements.  This
+     expression should only appear at the top level of an insn pattern.
+
+     When constructing an insn, operand number N will be substituted at
+     this point.  When matching an insn, it matches if the body of the
+     insn is a `parallel' expression with at least as many elements as
+     the vector of SUBPAT expressions in the `match_parallel', if each
+     SUBPAT matches the corresponding element of the `parallel', _and_
+     the function PREDICATE returns nonzero on the `parallel' that is
+     the body of the insn.  It is the responsibility of the predicate
+     to validate elements of the `parallel' beyond those listed in the
+     `match_parallel'.
+
+     A typical use of `match_parallel' is to match load and store
+     multiple expressions, which can contain a variable number of
+     elements in a `parallel'.  For example,
+
+          (define_insn ""
+            [(match_parallel 0 "load_multiple_operation"
+               [(set (match_operand:SI 1 "gpc_reg_operand" "=r")
+                     (match_operand:SI 2 "memory_operand" "m"))
+                (use (reg:SI 179))
+                (clobber (reg:SI 179))])]
+            ""
+            "loadm 0,0,%1,%2")
+
+     This example comes from `a29k.md'.  The function
+     `load_multiple_operation' is defined in `a29k.c' and checks that
+     subsequent elements in the `parallel' are the same as the `set' in
+     the pattern, except that they are referencing subsequent registers
+     and memory locations.
+
+     An insn that matches this pattern might look like:
+
+          (parallel
+           [(set (reg:SI 20) (mem:SI (reg:SI 100)))
+            (use (reg:SI 179))
+            (clobber (reg:SI 179))
+            (set (reg:SI 21)
+                 (mem:SI (plus:SI (reg:SI 100)
+                                  (const_int 4))))
+            (set (reg:SI 22)
+                 (mem:SI (plus:SI (reg:SI 100)
+                                  (const_int 8))))])
+
+`(match_par_dup N [SUBPAT...])'
+     Like `match_op_dup', but for `match_parallel' instead of
+     `match_operator'.
+
+
+
+File: gccint.info,  Node: Output Template,  Next: Output Statement,  Prev: RTL Template,  Up: Machine Desc
+
+16.5 Output Templates and Operand Substitution
+==============================================
+
+The "output template" is a string which specifies how to output the
+assembler code for an instruction pattern.  Most of the template is a
+fixed string which is output literally.  The character `%' is used to
+specify where to substitute an operand; it can also be used to identify
+places where different variants of the assembler require different
+syntax.
+
+ In the simplest case, a `%' followed by a digit N says to output
+operand N at that point in the string.
+
+ `%' followed by a letter and a digit says to output an operand in an
+alternate fashion.  Four letters have standard, built-in meanings
+described below.  The machine description macro `PRINT_OPERAND' can
+define additional letters with nonstandard meanings.
+
+ `%cDIGIT' can be used to substitute an operand that is a constant
+value without the syntax that normally indicates an immediate operand.
+
+ `%nDIGIT' is like `%cDIGIT' except that the value of the constant is
+negated before printing.
+
+ `%aDIGIT' can be used to substitute an operand as if it were a memory
+reference, with the actual operand treated as the address.  This may be
+useful when outputting a "load address" instruction, because often the
+assembler syntax for such an instruction requires you to write the
+operand as if it were a memory reference.
+
+ `%lDIGIT' is used to substitute a `label_ref' into a jump instruction.
+
+ `%=' outputs a number which is unique to each instruction in the
+entire compilation.  This is useful for making local labels to be
+referred to more than once in a single template that generates multiple
+assembler instructions.
+
+ `%' followed by a punctuation character specifies a substitution that
+does not use an operand.  Only one case is standard: `%%' outputs a `%'
+into the assembler code.  Other nonstandard cases can be defined in the
+`PRINT_OPERAND' macro.  You must also define which punctuation
+characters are valid with the `PRINT_OPERAND_PUNCT_VALID_P' macro.
+
+ The template may generate multiple assembler instructions.  Write the
+text for the instructions, with `\;' between them.
+
+ When the RTL contains two operands which are required by constraint to
+match each other, the output template must refer only to the
+lower-numbered operand.  Matching operands are not always identical,
+and the rest of the compiler arranges to put the proper RTL expression
+for printing into the lower-numbered operand.
+
+ One use of nonstandard letters or punctuation following `%' is to
+distinguish between different assembler languages for the same machine;
+for example, Motorola syntax versus MIT syntax for the 68000.  Motorola
+syntax requires periods in most opcode names, while MIT syntax does
+not.  For example, the opcode `movel' in MIT syntax is `move.l' in
+Motorola syntax.  The same file of patterns is used for both kinds of
+output syntax, but the character sequence `%.' is used in each place
+where Motorola syntax wants a period.  The `PRINT_OPERAND' macro for
+Motorola syntax defines the sequence to output a period; the macro for
+MIT syntax defines it to do nothing.
+
+ As a special case, a template consisting of the single character `#'
+instructs the compiler to first split the insn, and then output the
+resulting instructions separately.  This helps eliminate redundancy in
+the output templates.   If you have a `define_insn' that needs to emit
+multiple assembler instructions, and there is a matching `define_split'
+already defined, then you can simply use `#' as the output template
+instead of writing an output template that emits the multiple assembler
+instructions.
+
+ If the macro `ASSEMBLER_DIALECT' is defined, you can use construct of
+the form `{option0|option1|option2}' in the templates.  These describe
+multiple variants of assembler language syntax.  *Note Instruction
+Output::.
+
+
+File: gccint.info,  Node: Output Statement,  Next: Predicates,  Prev: Output Template,  Up: Machine Desc
+
+16.6 C Statements for Assembler Output
+======================================
+
+Often a single fixed template string cannot produce correct and
+efficient assembler code for all the cases that are recognized by a
+single instruction pattern.  For example, the opcodes may depend on the
+kinds of operands; or some unfortunate combinations of operands may
+require extra machine instructions.
+
+ If the output control string starts with a `@', then it is actually a
+series of templates, each on a separate line.  (Blank lines and leading
+spaces and tabs are ignored.)  The templates correspond to the
+pattern's constraint alternatives (*note Multi-Alternative::).  For
+example, if a target machine has a two-address add instruction `addr'
+to add into a register and another `addm' to add a register to memory,
+you might write this pattern:
+
+     (define_insn "addsi3"
+       [(set (match_operand:SI 0 "general_operand" "=r,m")
+             (plus:SI (match_operand:SI 1 "general_operand" "0,0")
+                      (match_operand:SI 2 "general_operand" "g,r")))]
+       ""
+       "@
+        addr %2,%0
+        addm %2,%0")
+
+ If the output control string starts with a `*', then it is not an
+output template but rather a piece of C program that should compute a
+template.  It should execute a `return' statement to return the
+template-string you want.  Most such templates use C string literals,
+which require doublequote characters to delimit them.  To include these
+doublequote characters in the string, prefix each one with `\'.
+
+ If the output control string is written as a brace block instead of a
+double-quoted string, it is automatically assumed to be C code.  In that
+case, it is not necessary to put in a leading asterisk, or to escape the
+doublequotes surrounding C string literals.
+
+ The operands may be found in the array `operands', whose C data type
+is `rtx []'.
+
+ It is very common to select different ways of generating assembler code
+based on whether an immediate operand is within a certain range.  Be
+careful when doing this, because the result of `INTVAL' is an integer
+on the host machine.  If the host machine has more bits in an `int'
+than the target machine has in the mode in which the constant will be
+used, then some of the bits you get from `INTVAL' will be superfluous.
+For proper results, you must carefully disregard the values of those
+bits.
+
+ It is possible to output an assembler instruction and then go on to
+output or compute more of them, using the subroutine `output_asm_insn'.
+This receives two arguments: a template-string and a vector of
+operands.  The vector may be `operands', or it may be another array of
+`rtx' that you declare locally and initialize yourself.
+
+ When an insn pattern has multiple alternatives in its constraints,
+often the appearance of the assembler code is determined mostly by
+which alternative was matched.  When this is so, the C code can test
+the variable `which_alternative', which is the ordinal number of the
+alternative that was actually satisfied (0 for the first, 1 for the
+second alternative, etc.).
+
+ For example, suppose there are two opcodes for storing zero, `clrreg'
+for registers and `clrmem' for memory locations.  Here is how a pattern
+could use `which_alternative' to choose between them:
+
+     (define_insn ""
+       [(set (match_operand:SI 0 "general_operand" "=r,m")
+             (const_int 0))]
+       ""
+       {
+       return (which_alternative == 0
+               ? "clrreg %0" : "clrmem %0");
+       })
+
+ The example above, where the assembler code to generate was _solely_
+determined by the alternative, could also have been specified as
+follows, having the output control string start with a `@':
+
+     (define_insn ""
+       [(set (match_operand:SI 0 "general_operand" "=r,m")
+             (const_int 0))]
+       ""
+       "@
+        clrreg %0
+        clrmem %0")
+
+
+File: gccint.info,  Node: Predicates,  Next: Constraints,  Prev: Output Statement,  Up: Machine Desc
+
+16.7 Predicates
+===============
+
+A predicate determines whether a `match_operand' or `match_operator'
+expression matches, and therefore whether the surrounding instruction
+pattern will be used for that combination of operands.  GCC has a
+number of machine-independent predicates, and you can define
+machine-specific predicates as needed.  By convention, predicates used
+with `match_operand' have names that end in `_operand', and those used
+with `match_operator' have names that end in `_operator'.
+
+ All predicates are Boolean functions (in the mathematical sense) of
+two arguments: the RTL expression that is being considered at that
+position in the instruction pattern, and the machine mode that the
+`match_operand' or `match_operator' specifies.  In this section, the
+first argument is called OP and the second argument MODE.  Predicates
+can be called from C as ordinary two-argument functions; this can be
+useful in output templates or other machine-specific code.
+
+ Operand predicates can allow operands that are not actually acceptable
+to the hardware, as long as the constraints give reload the ability to
+fix them up (*note Constraints::).  However, GCC will usually generate
+better code if the predicates specify the requirements of the machine
+instructions as closely as possible.  Reload cannot fix up operands
+that must be constants ("immediate operands"); you must use a predicate
+that allows only constants, or else enforce the requirement in the
+extra condition.
+
+ Most predicates handle their MODE argument in a uniform manner.  If
+MODE is `VOIDmode' (unspecified), then OP can have any mode.  If MODE
+is anything else, then OP must have the same mode, unless OP is a
+`CONST_INT' or integer `CONST_DOUBLE'.  These RTL expressions always
+have `VOIDmode', so it would be counterproductive to check that their
+mode matches.  Instead, predicates that accept `CONST_INT' and/or
+integer `CONST_DOUBLE' check that the value stored in the constant will
+fit in the requested mode.
+
+ Predicates with this behavior are called "normal".  `genrecog' can
+optimize the instruction recognizer based on knowledge of how normal
+predicates treat modes.  It can also diagnose certain kinds of common
+errors in the use of normal predicates; for instance, it is almost
+always an error to use a normal predicate without specifying a mode.
+
+ Predicates that do something different with their MODE argument are
+called "special".  The generic predicates `address_operand' and
+`pmode_register_operand' are special predicates.  `genrecog' does not
+do any optimizations or diagnosis when special predicates are used.
+
+* Menu:
+
+* Machine-Independent Predicates::  Predicates available to all back ends.
+* Defining Predicates::             How to write machine-specific predicate
+                                    functions.
+
+
+File: gccint.info,  Node: Machine-Independent Predicates,  Next: Defining Predicates,  Up: Predicates
+
+16.7.1 Machine-Independent Predicates
+-------------------------------------
+
+These are the generic predicates available to all back ends.  They are
+defined in `recog.c'.  The first category of predicates allow only
+constant, or "immediate", operands.
+
+ -- Function: immediate_operand
+     This predicate allows any sort of constant that fits in MODE.  It
+     is an appropriate choice for instructions that take operands that
+     must be constant.
+
+ -- Function: const_int_operand
+     This predicate allows any `CONST_INT' expression that fits in
+     MODE.  It is an appropriate choice for an immediate operand that
+     does not allow a symbol or label.
+
+ -- Function: const_double_operand
+     This predicate accepts any `CONST_DOUBLE' expression that has
+     exactly MODE.  If MODE is `VOIDmode', it will also accept
+     `CONST_INT'.  It is intended for immediate floating point
+     constants.
+
+The second category of predicates allow only some kind of machine
+register.
+
+ -- Function: register_operand
+     This predicate allows any `REG' or `SUBREG' expression that is
+     valid for MODE.  It is often suitable for arithmetic instruction
+     operands on a RISC machine.
+
+ -- Function: pmode_register_operand
+     This is a slight variant on `register_operand' which works around
+     a limitation in the machine-description reader.
+
+          (match_operand N "pmode_register_operand" CONSTRAINT)
+
+     means exactly what
+
+          (match_operand:P N "register_operand" CONSTRAINT)
+
+     would mean, if the machine-description reader accepted `:P' mode
+     suffixes.  Unfortunately, it cannot, because `Pmode' is an alias
+     for some other mode, and might vary with machine-specific options.
+     *Note Misc::.
+
+ -- Function: scratch_operand
+     This predicate allows hard registers and `SCRATCH' expressions,
+     but not pseudo-registers.  It is used internally by
+     `match_scratch'; it should not be used directly.
+
+The third category of predicates allow only some kind of memory
+reference.
+
+ -- Function: memory_operand
+     This predicate allows any valid reference to a quantity of mode
+     MODE in memory, as determined by the weak form of
+     `GO_IF_LEGITIMATE_ADDRESS' (*note Addressing Modes::).
+
+ -- Function: address_operand
+     This predicate is a little unusual; it allows any operand that is a
+     valid expression for the _address_ of a quantity of mode MODE,
+     again determined by the weak form of `GO_IF_LEGITIMATE_ADDRESS'.
+     To first order, if `(mem:MODE (EXP))' is acceptable to
+     `memory_operand', then EXP is acceptable to `address_operand'.
+     Note that EXP does not necessarily have the mode MODE.
+
+ -- Function: indirect_operand
+     This is a stricter form of `memory_operand' which allows only
+     memory references with a `general_operand' as the address
+     expression.  New uses of this predicate are discouraged, because
+     `general_operand' is very permissive, so it's hard to tell what an
+     `indirect_operand' does or does not allow.  If a target has
+     different requirements for memory operands for different
+     instructions, it is better to define target-specific predicates
+     which enforce the hardware's requirements explicitly.
+
+ -- Function: push_operand
+     This predicate allows a memory reference suitable for pushing a
+     value onto the stack.  This will be a `MEM' which refers to
+     `stack_pointer_rtx', with a side-effect in its address expression
+     (*note Incdec::); which one is determined by the `STACK_PUSH_CODE'
+     macro (*note Frame Layout::).
+
+ -- Function: pop_operand
+     This predicate allows a memory reference suitable for popping a
+     value off the stack.  Again, this will be a `MEM' referring to
+     `stack_pointer_rtx', with a side-effect in its address expression.
+     However, this time `STACK_POP_CODE' is expected.
+
+The fourth category of predicates allow some combination of the above
+operands.
+
+ -- Function: nonmemory_operand
+     This predicate allows any immediate or register operand valid for
+     MODE.
+
+ -- Function: nonimmediate_operand
+     This predicate allows any register or memory operand valid for
+     MODE.
+
+ -- Function: general_operand
+     This predicate allows any immediate, register, or memory operand
+     valid for MODE.
+
+Finally, there are two generic operator predicates.
+
+ -- Function: comparison_operator
+     This predicate matches any expression which performs an arithmetic
+     comparison in MODE; that is, `COMPARISON_P' is true for the
+     expression code.
+
+ -- Function: ordered_comparison_operator
+     This predicate matches any expression which performs an arithmetic
+     comparison in MODE and whose expression code is valid for integer
+     modes; that is, the expression code will be one of `eq', `ne',
+     `lt', `ltu', `le', `leu', `gt', `gtu', `ge', `geu'.
+
+
+File: gccint.info,  Node: Defining Predicates,  Prev: Machine-Independent Predicates,  Up: Predicates
+
+16.7.2 Defining Machine-Specific Predicates
+-------------------------------------------
+
+Many machines have requirements for their operands that cannot be
+expressed precisely using the generic predicates.  You can define
+additional predicates using `define_predicate' and
+`define_special_predicate' expressions.  These expressions have three
+operands:
+
+   * The name of the predicate, as it will be referred to in
+     `match_operand' or `match_operator' expressions.
+
+   * An RTL expression which evaluates to true if the predicate allows
+     the operand OP, false if it does not.  This expression can only use
+     the following RTL codes:
+
+    `MATCH_OPERAND'
+          When written inside a predicate expression, a `MATCH_OPERAND'
+          expression evaluates to true if the predicate it names would
+          allow OP.  The operand number and constraint are ignored.
+          Due to limitations in `genrecog', you can only refer to
+          generic predicates and predicates that have already been
+          defined.
+
+    `MATCH_CODE'
+          This expression evaluates to true if OP or a specified
+          subexpression of OP has one of a given list of RTX codes.
+
+          The first operand of this expression is a string constant
+          containing a comma-separated list of RTX code names (in lower
+          case).  These are the codes for which the `MATCH_CODE' will
+          be true.
+
+          The second operand is a string constant which indicates what
+          subexpression of OP to examine.  If it is absent or the empty
+          string, OP itself is examined.  Otherwise, the string constant
+          must be a sequence of digits and/or lowercase letters.  Each
+          character indicates a subexpression to extract from the
+          current expression; for the first character this is OP, for
+          the second and subsequent characters it is the result of the
+          previous character.  A digit N extracts `XEXP (E, N)'; a
+          letter L extracts `XVECEXP (E, 0, N)' where N is the
+          alphabetic ordinal of L (0 for `a', 1 for 'b', and so on).
+          The `MATCH_CODE' then examines the RTX code of the
+          subexpression extracted by the complete string.  It is not
+          possible to extract components of an `rtvec' that is not at
+          position 0 within its RTX object.
+
+    `MATCH_TEST'
+          This expression has one operand, a string constant containing
+          a C expression.  The predicate's arguments, OP and MODE, are
+          available with those names in the C expression.  The
+          `MATCH_TEST' evaluates to true if the C expression evaluates
+          to a nonzero value.  `MATCH_TEST' expressions must not have
+          side effects.
+
+    `AND'
+    `IOR'
+    `NOT'
+    `IF_THEN_ELSE'
+          The basic `MATCH_' expressions can be combined using these
+          logical operators, which have the semantics of the C operators
+          `&&', `||', `!', and `? :' respectively.  As in Common Lisp,
+          you may give an `AND' or `IOR' expression an arbitrary number
+          of arguments; this has exactly the same effect as writing a
+          chain of two-argument `AND' or `IOR' expressions.
+
+   * An optional block of C code, which should execute `return true' if
+     the predicate is found to match and `return false' if it does not.
+     It must not have any side effects.  The predicate arguments, OP
+     and MODE, are available with those names.
+
+     If a code block is present in a predicate definition, then the RTL
+     expression must evaluate to true _and_ the code block must execute
+     `return true' for the predicate to allow the operand.  The RTL
+     expression is evaluated first; do not re-check anything in the
+     code block that was checked in the RTL expression.
+
+ The program `genrecog' scans `define_predicate' and
+`define_special_predicate' expressions to determine which RTX codes are
+possibly allowed.  You should always make this explicit in the RTL
+predicate expression, using `MATCH_OPERAND' and `MATCH_CODE'.
+
+ Here is an example of a simple predicate definition, from the IA64
+machine description:
+
+     ;; True if OP is a `SYMBOL_REF' which refers to the sdata section.
+     (define_predicate "small_addr_symbolic_operand"
+       (and (match_code "symbol_ref")
+            (match_test "SYMBOL_REF_SMALL_ADDR_P (op)")))
+
+And here is another, showing the use of the C block.
+
+     ;; True if OP is a register operand that is (or could be) a GR reg.
+     (define_predicate "gr_register_operand"
+       (match_operand 0 "register_operand")
+     {
+       unsigned int regno;
+       if (GET_CODE (op) == SUBREG)
+         op = SUBREG_REG (op);
+
+       regno = REGNO (op);
+       return (regno >= FIRST_PSEUDO_REGISTER || GENERAL_REGNO_P (regno));
+     })
+
+ Predicates written with `define_predicate' automatically include a
+test that MODE is `VOIDmode', or OP has the same mode as MODE, or OP is
+a `CONST_INT' or `CONST_DOUBLE'.  They do _not_ check specifically for
+integer `CONST_DOUBLE', nor do they test that the value of either kind
+of constant fits in the requested mode.  This is because
+target-specific predicates that take constants usually have to do more
+stringent value checks anyway.  If you need the exact same treatment of
+`CONST_INT' or `CONST_DOUBLE' that the generic predicates provide, use
+a `MATCH_OPERAND' subexpression to call `const_int_operand',
+`const_double_operand', or `immediate_operand'.
+
+ Predicates written with `define_special_predicate' do not get any
+automatic mode checks, and are treated as having special mode handling
+by `genrecog'.
+
+ The program `genpreds' is responsible for generating code to test
+predicates.  It also writes a header file containing function
+declarations for all machine-specific predicates.  It is not necessary
+to declare these predicates in `CPU-protos.h'.
+
+
+File: gccint.info,  Node: Constraints,  Next: Standard Names,  Prev: Predicates,  Up: Machine Desc
+
+16.8 Operand Constraints
+========================
+
+Each `match_operand' in an instruction pattern can specify constraints
+for the operands allowed.  The constraints allow you to fine-tune
+matching within the set of operands allowed by the predicate.
+
+ Constraints can say whether an operand may be in a register, and which
+kinds of register; whether the operand can be a memory reference, and
+which kinds of address; whether the operand may be an immediate
+constant, and which possible values it may have.  Constraints can also
+require two operands to match.  Side-effects aren't allowed in operands
+of inline `asm', unless `<' or `>' constraints are used, because there
+is no guarantee that the side-effects will happen exactly once in an
+instruction that can update the addressing register.
+
+* Menu:
+
+* Simple Constraints::  Basic use of constraints.
+* Multi-Alternative::   When an insn has two alternative constraint-patterns.
+* Class Preferences::   Constraints guide which hard register to put things in.
+* Modifiers::           More precise control over effects of constraints.
+* Disable Insn Alternatives:: Disable insn alternatives using the `enabled' attribute.
+* Machine Constraints:: Existing constraints for some particular machines.
+* Define Constraints::  How to define machine-specific constraints.
+* C Constraint Interface:: How to test constraints from C code.
+
+
+File: gccint.info,  Node: Simple Constraints,  Next: Multi-Alternative,  Up: Constraints
+
+16.8.1 Simple Constraints
+-------------------------
+
+The simplest kind of constraint is a string full of letters, each of
+which describes one kind of operand that is permitted.  Here are the
+letters that are allowed:
+
+whitespace
+     Whitespace characters are ignored and can be inserted at any
+     position except the first.  This enables each alternative for
+     different operands to be visually aligned in the machine
+     description even if they have different number of constraints and
+     modifiers.
+
+`m'
+     A memory operand is allowed, with any kind of address that the
+     machine supports in general.  Note that the letter used for the
+     general memory constraint can be re-defined by a back end using
+     the `TARGET_MEM_CONSTRAINT' macro.
+
+`o'
+     A memory operand is allowed, but only if the address is
+     "offsettable".  This means that adding a small integer (actually,
+     the width in bytes of the operand, as determined by its machine
+     mode) may be added to the address and the result is also a valid
+     memory address.
+
+     For example, an address which is constant is offsettable; so is an
+     address that is the sum of a register and a constant (as long as a
+     slightly larger constant is also within the range of
+     address-offsets supported by the machine); but an autoincrement or
+     autodecrement address is not offsettable.  More complicated
+     indirect/indexed addresses may or may not be offsettable depending
+     on the other addressing modes that the machine supports.
+
+     Note that in an output operand which can be matched by another
+     operand, the constraint letter `o' is valid only when accompanied
+     by both `<' (if the target machine has predecrement addressing)
+     and `>' (if the target machine has preincrement addressing).
+
+`V'
+     A memory operand that is not offsettable.  In other words,
+     anything that would fit the `m' constraint but not the `o'
+     constraint.
+
+`<'
+     A memory operand with autodecrement addressing (either
+     predecrement or postdecrement) is allowed.  In inline `asm' this
+     constraint is only allowed if the operand is used exactly once in
+     an instruction that can handle the side-effects.  Not using an
+     operand with `<' in constraint string in the inline `asm' pattern
+     at all or using it in multiple instructions isn't valid, because
+     the side-effects wouldn't be performed or would be performed more
+     than once.  Furthermore, on some targets the operand with `<' in
+     constraint string must be accompanied by special instruction
+     suffixes like `%U0' instruction suffix on PowerPC or `%P0' on
+     IA-64.
+
+`>'
+     A memory operand with autoincrement addressing (either
+     preincrement or postincrement) is allowed.  In inline `asm' the
+     same restrictions as for `<' apply.
+
+`r'
+     A register operand is allowed provided that it is in a general
+     register.
+
+`i'
+     An immediate integer operand (one with constant value) is allowed.
+     This includes symbolic constants whose values will be known only at
+     assembly time or later.
+
+`n'
+     An immediate integer operand with a known numeric value is allowed.
+     Many systems cannot support assembly-time constants for operands
+     less than a word wide.  Constraints for these operands should use
+     `n' rather than `i'.
+
+`I', `J', `K', ... `P'
+     Other letters in the range `I' through `P' may be defined in a
+     machine-dependent fashion to permit immediate integer operands with
+     explicit integer values in specified ranges.  For example, on the
+     68000, `I' is defined to stand for the range of values 1 to 8.
+     This is the range permitted as a shift count in the shift
+     instructions.
+
+`E'
+     An immediate floating operand (expression code `const_double') is
+     allowed, but only if the target floating point format is the same
+     as that of the host machine (on which the compiler is running).
+
+`F'
+     An immediate floating operand (expression code `const_double' or
+     `const_vector') is allowed.
+
+`G', `H'
+     `G' and `H' may be defined in a machine-dependent fashion to
+     permit immediate floating operands in particular ranges of values.
+
+`s'
+     An immediate integer operand whose value is not an explicit
+     integer is allowed.
+
+     This might appear strange; if an insn allows a constant operand
+     with a value not known at compile time, it certainly must allow
+     any known value.  So why use `s' instead of `i'?  Sometimes it
+     allows better code to be generated.
+
+     For example, on the 68000 in a fullword instruction it is possible
+     to use an immediate operand; but if the immediate value is between
+     -128 and 127, better code results from loading the value into a
+     register and using the register.  This is because the load into
+     the register can be done with a `moveq' instruction.  We arrange
+     for this to happen by defining the letter `K' to mean "any integer
+     outside the range -128 to 127", and then specifying `Ks' in the
+     operand constraints.
+
+`g'
+     Any register, memory or immediate integer operand is allowed,
+     except for registers that are not general registers.
+
+`X'
+     Any operand whatsoever is allowed, even if it does not satisfy
+     `general_operand'.  This is normally used in the constraint of a
+     `match_scratch' when certain alternatives will not actually
+     require a scratch register.
+
+`0', `1', `2', ... `9'
+     An operand that matches the specified operand number is allowed.
+     If a digit is used together with letters within the same
+     alternative, the digit should come last.
+
+     This number is allowed to be more than a single digit.  If multiple
+     digits are encountered consecutively, they are interpreted as a
+     single decimal integer.  There is scant chance for ambiguity,
+     since to-date it has never been desirable that `10' be interpreted
+     as matching either operand 1 _or_ operand 0.  Should this be
+     desired, one can use multiple alternatives instead.
+
+     This is called a "matching constraint" and what it really means is
+     that the assembler has only a single operand that fills two roles
+     considered separate in the RTL insn.  For example, an add insn has
+     two input operands and one output operand in the RTL, but on most
+     CISC machines an add instruction really has only two operands, one
+     of them an input-output operand:
+
+          addl #35,r12
+
+     Matching constraints are used in these circumstances.  More
+     precisely, the two operands that match must include one input-only
+     operand and one output-only operand.  Moreover, the digit must be a
+     smaller number than the number of the operand that uses it in the
+     constraint.
+
+     For operands to match in a particular case usually means that they
+     are identical-looking RTL expressions.  But in a few special cases
+     specific kinds of dissimilarity are allowed.  For example, `*x' as
+     an input operand will match `*x++' as an output operand.  For
+     proper results in such cases, the output template should always
+     use the output-operand's number when printing the operand.
+
+`p'
+     An operand that is a valid memory address is allowed.  This is for
+     "load address" and "push address" instructions.
+
+     `p' in the constraint must be accompanied by `address_operand' as
+     the predicate in the `match_operand'.  This predicate interprets
+     the mode specified in the `match_operand' as the mode of the memory
+     reference for which the address would be valid.
+
+OTHER-LETTERS
+     Other letters can be defined in machine-dependent fashion to stand
+     for particular classes of registers or other arbitrary operand
+     types.  `d', `a' and `f' are defined on the 68000/68020 to stand
+     for data, address and floating point registers.
+
+ In order to have valid assembler code, each operand must satisfy its
+constraint.  But a failure to do so does not prevent the pattern from
+applying to an insn.  Instead, it directs the compiler to modify the
+code so that the constraint will be satisfied.  Usually this is done by
+copying an operand into a register.
+
+ Contrast, therefore, the two instruction patterns that follow:
+
+     (define_insn ""
+       [(set (match_operand:SI 0 "general_operand" "=r")
+             (plus:SI (match_dup 0)
+                      (match_operand:SI 1 "general_operand" "r")))]
+       ""
+       "...")
+
+which has two operands, one of which must appear in two places, and
+
+     (define_insn ""
+       [(set (match_operand:SI 0 "general_operand" "=r")
+             (plus:SI (match_operand:SI 1 "general_operand" "0")
+                      (match_operand:SI 2 "general_operand" "r")))]
+       ""
+       "...")
+
+which has three operands, two of which are required by a constraint to
+be identical.  If we are considering an insn of the form
+
+     (insn N PREV NEXT
+       (set (reg:SI 3)
+            (plus:SI (reg:SI 6) (reg:SI 109)))
+       ...)
+
+the first pattern would not apply at all, because this insn does not
+contain two identical subexpressions in the right place.  The pattern
+would say, "That does not look like an add instruction; try other
+patterns".  The second pattern would say, "Yes, that's an add
+instruction, but there is something wrong with it".  It would direct
+the reload pass of the compiler to generate additional insns to make
+the constraint true.  The results might look like this:
+
+     (insn N2 PREV N
+       (set (reg:SI 3) (reg:SI 6))
+       ...)
+
+     (insn N N2 NEXT
+       (set (reg:SI 3)
+            (plus:SI (reg:SI 3) (reg:SI 109)))
+       ...)
+
+ It is up to you to make sure that each operand, in each pattern, has
+constraints that can handle any RTL expression that could be present for
+that operand.  (When multiple alternatives are in use, each pattern
+must, for each possible combination of operand expressions, have at
+least one alternative which can handle that combination of operands.)
+The constraints don't need to _allow_ any possible operand--when this is
+the case, they do not constrain--but they must at least point the way to
+reloading any possible operand so that it will fit.
+
+   * If the constraint accepts whatever operands the predicate permits,
+     there is no problem: reloading is never necessary for this operand.
+
+     For example, an operand whose constraints permit everything except
+     registers is safe provided its predicate rejects registers.
+
+     An operand whose predicate accepts only constant values is safe
+     provided its constraints include the letter `i'.  If any possible
+     constant value is accepted, then nothing less than `i' will do; if
+     the predicate is more selective, then the constraints may also be
+     more selective.
+
+   * Any operand expression can be reloaded by copying it into a
+     register.  So if an operand's constraints allow some kind of
+     register, it is certain to be safe.  It need not permit all
+     classes of registers; the compiler knows how to copy a register
+     into another register of the proper class in order to make an
+     instruction valid.
+
+   * A nonoffsettable memory reference can be reloaded by copying the
+     address into a register.  So if the constraint uses the letter
+     `o', all memory references are taken care of.
+
+   * A constant operand can be reloaded by allocating space in memory to
+     hold it as preinitialized data.  Then the memory reference can be
+     used in place of the constant.  So if the constraint uses the
+     letters `o' or `m', constant operands are not a problem.
+
+   * If the constraint permits a constant and a pseudo register used in
+     an insn was not allocated to a hard register and is equivalent to
+     a constant, the register will be replaced with the constant.  If
+     the predicate does not permit a constant and the insn is
+     re-recognized for some reason, the compiler will crash.  Thus the
+     predicate must always recognize any objects allowed by the
+     constraint.
+
+ If the operand's predicate can recognize registers, but the constraint
+does not permit them, it can make the compiler crash.  When this
+operand happens to be a register, the reload pass will be stymied,
+because it does not know how to copy a register temporarily into memory.
+
+ If the predicate accepts a unary operator, the constraint applies to
+the operand.  For example, the MIPS processor at ISA level 3 supports an
+instruction which adds two registers in `SImode' to produce a `DImode'
+result, but only if the registers are correctly sign extended.  This
+predicate for the input operands accepts a `sign_extend' of an `SImode'
+register.  Write the constraint to indicate the type of register that
+is required for the operand of the `sign_extend'.
+
+
+File: gccint.info,  Node: Multi-Alternative,  Next: Class Preferences,  Prev: Simple Constraints,  Up: Constraints
+
+16.8.2 Multiple Alternative Constraints
+---------------------------------------
+
+Sometimes a single instruction has multiple alternative sets of possible
+operands.  For example, on the 68000, a logical-or instruction can
+combine register or an immediate value into memory, or it can combine
+any kind of operand into a register; but it cannot combine one memory
+location into another.
+
+ These constraints are represented as multiple alternatives.  An
+alternative can be described by a series of letters for each operand.
+The overall constraint for an operand is made from the letters for this
+operand from the first alternative, a comma, the letters for this
+operand from the second alternative, a comma, and so on until the last
+alternative.  Here is how it is done for fullword logical-or on the
+68000:
+
+     (define_insn "iorsi3"
+       [(set (match_operand:SI 0 "general_operand" "=m,d")
+             (ior:SI (match_operand:SI 1 "general_operand" "%0,0")
+                     (match_operand:SI 2 "general_operand" "dKs,dmKs")))]
+       ...)
+
+ The first alternative has `m' (memory) for operand 0, `0' for operand
+1 (meaning it must match operand 0), and `dKs' for operand 2.  The
+second alternative has `d' (data register) for operand 0, `0' for
+operand 1, and `dmKs' for operand 2.  The `=' and `%' in the
+constraints apply to all the alternatives; their meaning is explained
+in the next section (*note Class Preferences::).
+
+ If all the operands fit any one alternative, the instruction is valid.
+Otherwise, for each alternative, the compiler counts how many
+instructions must be added to copy the operands so that that
+alternative applies.  The alternative requiring the least copying is
+chosen.  If two alternatives need the same amount of copying, the one
+that comes first is chosen.  These choices can be altered with the `?'
+and `!' characters:
+
+`?'
+     Disparage slightly the alternative that the `?' appears in, as a
+     choice when no alternative applies exactly.  The compiler regards
+     this alternative as one unit more costly for each `?' that appears
+     in it.
+
+`!'
+     Disparage severely the alternative that the `!' appears in.  This
+     alternative can still be used if it fits without reloading, but if
+     reloading is needed, some other alternative will be used.
+
+ When an insn pattern has multiple alternatives in its constraints,
+often the appearance of the assembler code is determined mostly by which
+alternative was matched.  When this is so, the C code for writing the
+assembler code can use the variable `which_alternative', which is the
+ordinal number of the alternative that was actually satisfied (0 for
+the first, 1 for the second alternative, etc.).  *Note Output
+Statement::.
+
+
+File: gccint.info,  Node: Class Preferences,  Next: Modifiers,  Prev: Multi-Alternative,  Up: Constraints
+
+16.8.3 Register Class Preferences
+---------------------------------
+
+The operand constraints have another function: they enable the compiler
+to decide which kind of hardware register a pseudo register is best
+allocated to.  The compiler examines the constraints that apply to the
+insns that use the pseudo register, looking for the machine-dependent
+letters such as `d' and `a' that specify classes of registers.  The
+pseudo register is put in whichever class gets the most "votes".  The
+constraint letters `g' and `r' also vote: they vote in favor of a
+general register.  The machine description says which registers are
+considered general.
+
+ Of course, on some machines all registers are equivalent, and no
+register classes are defined.  Then none of this complexity is relevant.
+
+
+File: gccint.info,  Node: Modifiers,  Next: Disable Insn Alternatives,  Prev: Class Preferences,  Up: Constraints
+
+16.8.4 Constraint Modifier Characters
+-------------------------------------
+
+Here are constraint modifier characters.
+
+`='
+     Means that this operand is write-only for this instruction: the
+     previous value is discarded and replaced by output data.
+
+`+'
+     Means that this operand is both read and written by the
+     instruction.
+
+     When the compiler fixes up the operands to satisfy the constraints,
+     it needs to know which operands are inputs to the instruction and
+     which are outputs from it.  `=' identifies an output; `+'
+     identifies an operand that is both input and output; all other
+     operands are assumed to be input only.
+
+     If you specify `=' or `+' in a constraint, you put it in the first
+     character of the constraint string.
+
+`&'
+     Means (in a particular alternative) that this operand is an
+     "earlyclobber" operand, which is modified before the instruction is
+     finished using the input operands.  Therefore, this operand may
+     not lie in a register that is used as an input operand or as part
+     of any memory address.
+
+     `&' applies only to the alternative in which it is written.  In
+     constraints with multiple alternatives, sometimes one alternative
+     requires `&' while others do not.  See, for example, the `movdf'
+     insn of the 68000.
+
+     An input operand can be tied to an earlyclobber operand if its only
+     use as an input occurs before the early result is written.  Adding
+     alternatives of this form often allows GCC to produce better code
+     when only some of the inputs can be affected by the earlyclobber.
+     See, for example, the `mulsi3' insn of the ARM.
+
+     `&' does not obviate the need to write `='.
+
+`%'
+     Declares the instruction to be commutative for this operand and the
+     following operand.  This means that the compiler may interchange
+     the two operands if that is the cheapest way to make all operands
+     fit the constraints.  This is often used in patterns for addition
+     instructions that really have only two operands: the result must
+     go in one of the arguments.  Here for example, is how the 68000
+     halfword-add instruction is defined:
+
+          (define_insn "addhi3"
+            [(set (match_operand:HI 0 "general_operand" "=m,r")
+               (plus:HI (match_operand:HI 1 "general_operand" "%0,0")
+                        (match_operand:HI 2 "general_operand" "di,g")))]
+            ...)
+     GCC can only handle one commutative pair in an asm; if you use
+     more, the compiler may fail.  Note that you need not use the
+     modifier if the two alternatives are strictly identical; this
+     would only waste time in the reload pass.  The modifier is not
+     operational after register allocation, so the result of
+     `define_peephole2' and `define_split's performed after reload
+     cannot rely on `%' to make the intended insn match.
+
+`#'
+     Says that all following characters, up to the next comma, are to be
+     ignored as a constraint.  They are significant only for choosing
+     register preferences.
+
+`*'
+     Says that the following character should be ignored when choosing
+     register preferences.  `*' has no effect on the meaning of the
+     constraint as a constraint, and no effect on reloading.
+
+     Here is an example: the 68000 has an instruction to sign-extend a
+     halfword in a data register, and can also sign-extend a value by
+     copying it into an address register.  While either kind of
+     register is acceptable, the constraints on an address-register
+     destination are less strict, so it is best if register allocation
+     makes an address register its goal.  Therefore, `*' is used so
+     that the `d' constraint letter (for data register) is ignored when
+     computing register preferences.
+
+          (define_insn "extendhisi2"
+            [(set (match_operand:SI 0 "general_operand" "=*d,a")
+                  (sign_extend:SI
+                   (match_operand:HI 1 "general_operand" "0,g")))]
+            ...)
+
+
+File: gccint.info,  Node: Machine Constraints,  Next: Define Constraints,  Prev: Disable Insn Alternatives,  Up: Constraints
+
+16.8.5 Constraints for Particular Machines
+------------------------------------------
+
+Whenever possible, you should use the general-purpose constraint letters
+in `asm' arguments, since they will convey meaning more readily to
+people reading your code.  Failing that, use the constraint letters
+that usually have very similar meanings across architectures.  The most
+commonly used constraints are `m' and `r' (for memory and
+general-purpose registers respectively; *note Simple Constraints::), and
+`I', usually the letter indicating the most common immediate-constant
+format.
+
+ Each architecture defines additional constraints.  These constraints
+are used by the compiler itself for instruction generation, as well as
+for `asm' statements; therefore, some of the constraints are not
+particularly useful for `asm'.  Here is a summary of some of the
+machine-dependent constraints available on some particular machines; it
+includes both constraints that are useful for `asm' and constraints
+that aren't.  The compiler source file mentioned in the table heading
+for each architecture is the definitive reference for the meanings of
+that architecture's constraints.
+
+_ARM family--`config/arm/arm.h'_
+
+    `f'
+          Floating-point register
+
+    `w'
+          VFP floating-point register
+
+    `F'
+          One of the floating-point constants 0.0, 0.5, 1.0, 2.0, 3.0,
+          4.0, 5.0 or 10.0
+
+    `G'
+          Floating-point constant that would satisfy the constraint `F'
+          if it were negated
+
+    `I'
+          Integer that is valid as an immediate operand in a data
+          processing instruction.  That is, an integer in the range 0
+          to 255 rotated by a multiple of 2
+
+    `J'
+          Integer in the range -4095 to 4095
+
+    `K'
+          Integer that satisfies constraint `I' when inverted (ones
+          complement)
+
+    `L'
+          Integer that satisfies constraint `I' when negated (twos
+          complement)
+
+    `M'
+          Integer in the range 0 to 32
+
+    `Q'
+          A memory reference where the exact address is in a single
+          register (``m'' is preferable for `asm' statements)
+
+    `R'
+          An item in the constant pool
+
+    `S'
+          A symbol in the text segment of the current file
+
+    `Uv'
+          A memory reference suitable for VFP load/store insns
+          (reg+constant offset)
+
+    `Uy'
+          A memory reference suitable for iWMMXt load/store
+          instructions.
+
+    `Uq'
+          A memory reference suitable for the ARMv4 ldrsb instruction.
+
+_AVR family--`config/avr/constraints.md'_
+
+    `l'
+          Registers from r0 to r15
+
+    `a'
+          Registers from r16 to r23
+
+    `d'
+          Registers from r16 to r31
+
+    `w'
+          Registers from r24 to r31.  These registers can be used in
+          `adiw' command
+
+    `e'
+          Pointer register (r26-r31)
+
+    `b'
+          Base pointer register (r28-r31)
+
+    `q'
+          Stack pointer register (SPH:SPL)
+
+    `t'
+          Temporary register r0
+
+    `x'
+          Register pair X (r27:r26)
+
+    `y'
+          Register pair Y (r29:r28)
+
+    `z'
+          Register pair Z (r31:r30)
+
+    `I'
+          Constant greater than -1, less than 64
+
+    `J'
+          Constant greater than -64, less than 1
+
+    `K'
+          Constant integer 2
+
+    `L'
+          Constant integer 0
+
+    `M'
+          Constant that fits in 8 bits
+
+    `N'
+          Constant integer -1
+
+    `O'
+          Constant integer 8, 16, or 24
+
+    `P'
+          Constant integer 1
+
+    `G'
+          A floating point constant 0.0
+
+    `R'
+          Integer constant in the range -6 ... 5.
+
+    `Q'
+          A memory address based on Y or Z pointer with displacement.
+
+_CRX Architecture--`config/crx/crx.h'_
+
+    `b'
+          Registers from r0 to r14 (registers without stack pointer)
+
+    `l'
+          Register r16 (64-bit accumulator lo register)
+
+    `h'
+          Register r17 (64-bit accumulator hi register)
+
+    `k'
+          Register pair r16-r17. (64-bit accumulator lo-hi pair)
+
+    `I'
+          Constant that fits in 3 bits
+
+    `J'
+          Constant that fits in 4 bits
+
+    `K'
+          Constant that fits in 5 bits
+
+    `L'
+          Constant that is one of -1, 4, -4, 7, 8, 12, 16, 20, 32, 48
+
+    `G'
+          Floating point constant that is legal for store immediate
+
+_Hewlett-Packard PA-RISC--`config/pa/pa.h'_
+
+    `a'
+          General register 1
+
+    `f'
+          Floating point register
+
+    `q'
+          Shift amount register
+
+    `x'
+          Floating point register (deprecated)
+
+    `y'
+          Upper floating point register (32-bit), floating point
+          register (64-bit)
+
+    `Z'
+          Any register
+
+    `I'
+          Signed 11-bit integer constant
+
+    `J'
+          Signed 14-bit integer constant
+
+    `K'
+          Integer constant that can be deposited with a `zdepi'
+          instruction
+
+    `L'
+          Signed 5-bit integer constant
+
+    `M'
+          Integer constant 0
+
+    `N'
+          Integer constant that can be loaded with a `ldil' instruction
+
+    `O'
+          Integer constant whose value plus one is a power of 2
+
+    `P'
+          Integer constant that can be used for `and' operations in
+          `depi' and `extru' instructions
+
+    `S'
+          Integer constant 31
+
+    `U'
+          Integer constant 63
+
+    `G'
+          Floating-point constant 0.0
+
+    `A'
+          A `lo_sum' data-linkage-table memory operand
+
+    `Q'
+          A memory operand that can be used as the destination operand
+          of an integer store instruction
+
+    `R'
+          A scaled or unscaled indexed memory operand
+
+    `T'
+          A memory operand for floating-point loads and stores
+
+    `W'
+          A register indirect memory operand
+
+_picoChip family--`picochip.h'_
+
+    `k'
+          Stack register.
+
+    `f'
+          Pointer register.  A register which can be used to access
+          memory without supplying an offset.  Any other register can
+          be used to access memory, but will need a constant offset.
+          In the case of the offset being zero, it is more efficient to
+          use a pointer register, since this reduces code size.
+
+    `t'
+          A twin register.  A register which may be paired with an
+          adjacent register to create a 32-bit register.
+
+    `a'
+          Any absolute memory address (e.g., symbolic constant, symbolic
+          constant + offset).
+
+    `I'
+          4-bit signed integer.
+
+    `J'
+          4-bit unsigned integer.
+
+    `K'
+          8-bit signed integer.
+
+    `M'
+          Any constant whose absolute value is no greater than 4-bits.
+
+    `N'
+          10-bit signed integer
+
+    `O'
+          16-bit signed integer.
+
+
+_PowerPC and IBM RS6000--`config/rs6000/rs6000.h'_
+
+    `b'
+          Address base register
+
+    `d'
+          Floating point register (containing 64-bit value)
+
+    `f'
+          Floating point register (containing 32-bit value)
+
+    `v'
+          Altivec vector register
+
+    `wd'
+          VSX vector register to hold vector double data
+
+    `wf'
+          VSX vector register to hold vector float data
+
+    `ws'
+          VSX vector register to hold scalar float data
+
+    `wa'
+          Any VSX register
+
+    `h'
+          `MQ', `CTR', or `LINK' register
+
+    `q'
+          `MQ' register
+
+    `c'
+          `CTR' register
+
+    `l'
+          `LINK' register
+
+    `x'
+          `CR' register (condition register) number 0
+
+    `y'
+          `CR' register (condition register)
+
+    `z'
+          `XER[CA]' carry bit (part of the XER register)
+
+    `I'
+          Signed 16-bit constant
+
+    `J'
+          Unsigned 16-bit constant shifted left 16 bits (use `L'
+          instead for `SImode' constants)
+
+    `K'
+          Unsigned 16-bit constant
+
+    `L'
+          Signed 16-bit constant shifted left 16 bits
+
+    `M'
+          Constant larger than 31
+
+    `N'
+          Exact power of 2
+
+    `O'
+          Zero
+
+    `P'
+          Constant whose negation is a signed 16-bit constant
+
+    `G'
+          Floating point constant that can be loaded into a register
+          with one instruction per word
+
+    `H'
+          Integer/Floating point constant that can be loaded into a
+          register using three instructions
+
+    `m'
+          Memory operand.  Normally, `m' does not allow addresses that
+          update the base register.  If `<' or `>' constraint is also
+          used, they are allowed and therefore on PowerPC targets in
+          that case it is only safe to use `m<>' in an `asm' statement
+          if that `asm' statement accesses the operand exactly once.
+          The `asm' statement must also use `%U<OPNO>' as a placeholder
+          for the "update" flag in the corresponding load or store
+          instruction.  For example:
+
+               asm ("st%U0 %1,%0" : "=m<>" (mem) : "r" (val));
+
+          is correct but:
+
+               asm ("st %1,%0" : "=m<>" (mem) : "r" (val));
+
+          is not.
+
+    `es'
+          A "stable" memory operand; that is, one which does not
+          include any automodification of the base register.  This used
+          to be useful when `m' allowed automodification of the base
+          register, but as those are now only allowed when `<' or `>'
+          is used, `es' is basically the same as `m' without `<' and
+          `>'.
+
+    `Q'
+          Memory operand that is an offset from a register (it is
+          usually better to use `m' or `es' in `asm' statements)
+
+    `Z'
+          Memory operand that is an indexed or indirect from a register
+          (it is usually better to use `m' or `es' in `asm' statements)
+
+    `R'
+          AIX TOC entry
+
+    `a'
+          Address operand that is an indexed or indirect from a
+          register (`p' is preferable for `asm' statements)
+
+    `S'
+          Constant suitable as a 64-bit mask operand
+
+    `T'
+          Constant suitable as a 32-bit mask operand
+
+    `U'
+          System V Release 4 small data area reference
+
+    `t'
+          AND masks that can be performed by two rldic{l, r}
+          instructions
+
+    `W'
+          Vector constant that does not require memory
+
+    `j'
+          Vector constant that is all zeros.
+
+
+_Intel 386--`config/i386/constraints.md'_
+
+    `R'
+          Legacy register--the eight integer registers available on all
+          i386 processors (`a', `b', `c', `d', `si', `di', `bp', `sp').
+
+    `q'
+          Any register accessible as `Rl'.  In 32-bit mode, `a', `b',
+          `c', and `d'; in 64-bit mode, any integer register.
+
+    `Q'
+          Any register accessible as `Rh': `a', `b', `c', and `d'.
+
+    `l'
+          Any register that can be used as the index in a base+index
+          memory access: that is, any general register except the stack
+          pointer.
+
+    `a'
+          The `a' register.
+
+    `b'
+          The `b' register.
+
+    `c'
+          The `c' register.
+
+    `d'
+          The `d' register.
+
+    `S'
+          The `si' register.
+
+    `D'
+          The `di' register.
+
+    `A'
+          The `a' and `d' registers.  This class is used for
+          instructions that return double word results in the `ax:dx'
+          register pair.  Single word values will be allocated either
+          in `ax' or `dx'.  For example on i386 the following
+          implements `rdtsc':
+
+               unsigned long long rdtsc (void)
+               {
+                 unsigned long long tick;
+                 __asm__ __volatile__("rdtsc":"=A"(tick));
+                 return tick;
+               }
+
+          This is not correct on x86_64 as it would allocate tick in
+          either `ax' or `dx'.  You have to use the following variant
+          instead:
+
+               unsigned long long rdtsc (void)
+               {
+                 unsigned int tickl, tickh;
+                 __asm__ __volatile__("rdtsc":"=a"(tickl),"=d"(tickh));
+                 return ((unsigned long long)tickh << 32)|tickl;
+               }
+
+    `f'
+          Any 80387 floating-point (stack) register.
+
+    `t'
+          Top of 80387 floating-point stack (`%st(0)').
+
+    `u'
+          Second from top of 80387 floating-point stack (`%st(1)').
+
+    `y'
+          Any MMX register.
+
+    `x'
+          Any SSE register.
+
+    `Yz'
+          First SSE register (`%xmm0').
+
+    `Y2'
+          Any SSE register, when SSE2 is enabled.
+
+    `Yi'
+          Any SSE register, when SSE2 and inter-unit moves are enabled.
+
+    `Ym'
+          Any MMX register, when inter-unit moves are enabled.
+
+    `I'
+          Integer constant in the range 0 ... 31, for 32-bit shifts.
+
+    `J'
+          Integer constant in the range 0 ... 63, for 64-bit shifts.
+
+    `K'
+          Signed 8-bit integer constant.
+
+    `L'
+          `0xFF' or `0xFFFF', for andsi as a zero-extending move.
+
+    `M'
+          0, 1, 2, or 3 (shifts for the `lea' instruction).
+
+    `N'
+          Unsigned 8-bit integer constant (for `in' and `out'
+          instructions).
+
+    `O'
+          Integer constant in the range 0 ... 127, for 128-bit shifts.
+
+    `G'
+          Standard 80387 floating point constant.
+
+    `C'
+          Standard SSE floating point constant.
+
+    `e'
+          32-bit signed integer constant, or a symbolic reference known
+          to fit that range (for immediate operands in sign-extending
+          x86-64 instructions).
+
+    `Z'
+          32-bit unsigned integer constant, or a symbolic reference
+          known to fit that range (for immediate operands in
+          zero-extending x86-64 instructions).
+
+
+_Intel IA-64--`config/ia64/ia64.h'_
+
+    `a'
+          General register `r0' to `r3' for `addl' instruction
+
+    `b'
+          Branch register
+
+    `c'
+          Predicate register (`c' as in "conditional")
+
+    `d'
+          Application register residing in M-unit
+
+    `e'
+          Application register residing in I-unit
+
+    `f'
+          Floating-point register
+
+    `m'
+          Memory operand.  If used together with `<' or `>', the
+          operand can have postincrement and postdecrement which
+          require printing with `%Pn' on IA-64.
+
+    `G'
+          Floating-point constant 0.0 or 1.0
+
+    `I'
+          14-bit signed integer constant
+
+    `J'
+          22-bit signed integer constant
+
+    `K'
+          8-bit signed integer constant for logical instructions
+
+    `L'
+          8-bit adjusted signed integer constant for compare pseudo-ops
+
+    `M'
+          6-bit unsigned integer constant for shift counts
+
+    `N'
+          9-bit signed integer constant for load and store
+          postincrements
+
+    `O'
+          The constant zero
+
+    `P'
+          0 or -1 for `dep' instruction
+
+    `Q'
+          Non-volatile memory for floating-point loads and stores
+
+    `R'
+          Integer constant in the range 1 to 4 for `shladd' instruction
+
+    `S'
+          Memory operand except postincrement and postdecrement.  This
+          is now roughly the same as `m' when not used together with `<'
+          or `>'.
+
+_FRV--`config/frv/frv.h'_
+
+    `a'
+          Register in the class `ACC_REGS' (`acc0' to `acc7').
+
+    `b'
+          Register in the class `EVEN_ACC_REGS' (`acc0' to `acc7').
+
+    `c'
+          Register in the class `CC_REGS' (`fcc0' to `fcc3' and `icc0'
+          to `icc3').
+
+    `d'
+          Register in the class `GPR_REGS' (`gr0' to `gr63').
+
+    `e'
+          Register in the class `EVEN_REGS' (`gr0' to `gr63').  Odd
+          registers are excluded not in the class but through the use
+          of a machine mode larger than 4 bytes.
+
+    `f'
+          Register in the class `FPR_REGS' (`fr0' to `fr63').
+
+    `h'
+          Register in the class `FEVEN_REGS' (`fr0' to `fr63').  Odd
+          registers are excluded not in the class but through the use
+          of a machine mode larger than 4 bytes.
+
+    `l'
+          Register in the class `LR_REG' (the `lr' register).
+
+    `q'
+          Register in the class `QUAD_REGS' (`gr2' to `gr63').
+          Register numbers not divisible by 4 are excluded not in the
+          class but through the use of a machine mode larger than 8
+          bytes.
+
+    `t'
+          Register in the class `ICC_REGS' (`icc0' to `icc3').
+
+    `u'
+          Register in the class `FCC_REGS' (`fcc0' to `fcc3').
+
+    `v'
+          Register in the class `ICR_REGS' (`cc4' to `cc7').
+
+    `w'
+          Register in the class `FCR_REGS' (`cc0' to `cc3').
+
+    `x'
+          Register in the class `QUAD_FPR_REGS' (`fr0' to `fr63').
+          Register numbers not divisible by 4 are excluded not in the
+          class but through the use of a machine mode larger than 8
+          bytes.
+
+    `z'
+          Register in the class `SPR_REGS' (`lcr' and `lr').
+
+    `A'
+          Register in the class `QUAD_ACC_REGS' (`acc0' to `acc7').
+
+    `B'
+          Register in the class `ACCG_REGS' (`accg0' to `accg7').
+
+    `C'
+          Register in the class `CR_REGS' (`cc0' to `cc7').
+
+    `G'
+          Floating point constant zero
+
+    `I'
+          6-bit signed integer constant
+
+    `J'
+          10-bit signed integer constant
+
+    `L'
+          16-bit signed integer constant
+
+    `M'
+          16-bit unsigned integer constant
+
+    `N'
+          12-bit signed integer constant that is negative--i.e. in the
+          range of -2048 to -1
+
+    `O'
+          Constant zero
+
+    `P'
+          12-bit signed integer constant that is greater than
+          zero--i.e. in the range of 1 to 2047.
+
+
+_Blackfin family--`config/bfin/constraints.md'_
+
+    `a'
+          P register
+
+    `d'
+          D register
+
+    `z'
+          A call clobbered P register.
+
+    `qN'
+          A single register.  If N is in the range 0 to 7, the
+          corresponding D register.  If it is `A', then the register P0.
+
+    `D'
+          Even-numbered D register
+
+    `W'
+          Odd-numbered D register
+
+    `e'
+          Accumulator register.
+
+    `A'
+          Even-numbered accumulator register.
+
+    `B'
+          Odd-numbered accumulator register.
+
+    `b'
+          I register
+
+    `v'
+          B register
+
+    `f'
+          M register
+
+    `c'
+          Registers used for circular buffering, i.e. I, B, or L
+          registers.
+
+    `C'
+          The CC register.
+
+    `t'
+          LT0 or LT1.
+
+    `k'
+          LC0 or LC1.
+
+    `u'
+          LB0 or LB1.
+
+    `x'
+          Any D, P, B, M, I or L register.
+
+    `y'
+          Additional registers typically used only in prologues and
+          epilogues: RETS, RETN, RETI, RETX, RETE, ASTAT, SEQSTAT and
+          USP.
+
+    `w'
+          Any register except accumulators or CC.
+
+    `Ksh'
+          Signed 16 bit integer (in the range -32768 to 32767)
+
+    `Kuh'
+          Unsigned 16 bit integer (in the range 0 to 65535)
+
+    `Ks7'
+          Signed 7 bit integer (in the range -64 to 63)
+
+    `Ku7'
+          Unsigned 7 bit integer (in the range 0 to 127)
+
+    `Ku5'
+          Unsigned 5 bit integer (in the range 0 to 31)
+
+    `Ks4'
+          Signed 4 bit integer (in the range -8 to 7)
+
+    `Ks3'
+          Signed 3 bit integer (in the range -3 to 4)
+
+    `Ku3'
+          Unsigned 3 bit integer (in the range 0 to 7)
+
+    `PN'
+          Constant N, where N is a single-digit constant in the range 0
+          to 4.
+
+    `PA'
+          An integer equal to one of the MACFLAG_XXX constants that is
+          suitable for use with either accumulator.
+
+    `PB'
+          An integer equal to one of the MACFLAG_XXX constants that is
+          suitable for use only with accumulator A1.
+
+    `M1'
+          Constant 255.
+
+    `M2'
+          Constant 65535.
+
+    `J'
+          An integer constant with exactly a single bit set.
+
+    `L'
+          An integer constant with all bits set except exactly one.
+
+    `H'
+
+    `Q'
+          Any SYMBOL_REF.
+
+_M32C--`config/m32c/m32c.c'_
+
+    `Rsp'
+    `Rfb'
+    `Rsb'
+          `$sp', `$fb', `$sb'.
+
+    `Rcr'
+          Any control register, when they're 16 bits wide (nothing if
+          control registers are 24 bits wide)
+
+    `Rcl'
+          Any control register, when they're 24 bits wide.
+
+    `R0w'
+    `R1w'
+    `R2w'
+    `R3w'
+          $r0, $r1, $r2, $r3.
+
+    `R02'
+          $r0 or $r2, or $r2r0 for 32 bit values.
+
+    `R13'
+          $r1 or $r3, or $r3r1 for 32 bit values.
+
+    `Rdi'
+          A register that can hold a 64 bit value.
+
+    `Rhl'
+          $r0 or $r1 (registers with addressable high/low bytes)
+
+    `R23'
+          $r2 or $r3
+
+    `Raa'
+          Address registers
+
+    `Raw'
+          Address registers when they're 16 bits wide.
+
+    `Ral'
+          Address registers when they're 24 bits wide.
+
+    `Rqi'
+          Registers that can hold QI values.
+
+    `Rad'
+          Registers that can be used with displacements ($a0, $a1, $sb).
+
+    `Rsi'
+          Registers that can hold 32 bit values.
+
+    `Rhi'
+          Registers that can hold 16 bit values.
+
+    `Rhc'
+          Registers chat can hold 16 bit values, including all control
+          registers.
+
+    `Rra'
+          $r0 through R1, plus $a0 and $a1.
+
+    `Rfl'
+          The flags register.
+
+    `Rmm'
+          The memory-based pseudo-registers $mem0 through $mem15.
+
+    `Rpi'
+          Registers that can hold pointers (16 bit registers for r8c,
+          m16c; 24 bit registers for m32cm, m32c).
+
+    `Rpa'
+          Matches multiple registers in a PARALLEL to form a larger
+          register.  Used to match function return values.
+
+    `Is3'
+          -8 ... 7
+
+    `IS1'
+          -128 ... 127
+
+    `IS2'
+          -32768 ... 32767
+
+    `IU2'
+          0 ... 65535
+
+    `In4'
+          -8 ... -1 or 1 ... 8
+
+    `In5'
+          -16 ... -1 or 1 ... 16
+
+    `In6'
+          -32 ... -1 or 1 ... 32
+
+    `IM2'
+          -65536 ... -1
+
+    `Ilb'
+          An 8 bit value with exactly one bit set.
+
+    `Ilw'
+          A 16 bit value with exactly one bit set.
+
+    `Sd'
+          The common src/dest memory addressing modes.
+
+    `Sa'
+          Memory addressed using $a0 or $a1.
+
+    `Si'
+          Memory addressed with immediate addresses.
+
+    `Ss'
+          Memory addressed using the stack pointer ($sp).
+
+    `Sf'
+          Memory addressed using the frame base register ($fb).
+
+    `Ss'
+          Memory addressed using the small base register ($sb).
+
+    `S1'
+          $r1h
+
+_MeP--`config/mep/constraints.md'_
+
+    `a'
+          The $sp register.
+
+    `b'
+          The $tp register.
+
+    `c'
+          Any control register.
+
+    `d'
+          Either the $hi or the $lo register.
+
+    `em'
+          Coprocessor registers that can be directly loaded ($c0-$c15).
+
+    `ex'
+          Coprocessor registers that can be moved to each other.
+
+    `er'
+          Coprocessor registers that can be moved to core registers.
+
+    `h'
+          The $hi register.
+
+    `j'
+          The $rpc register.
+
+    `l'
+          The $lo register.
+
+    `t'
+          Registers which can be used in $tp-relative addressing.
+
+    `v'
+          The $gp register.
+
+    `x'
+          The coprocessor registers.
+
+    `y'
+          The coprocessor control registers.
+
+    `z'
+          The $0 register.
+
+    `A'
+          User-defined register set A.
+
+    `B'
+          User-defined register set B.
+
+    `C'
+          User-defined register set C.
+
+    `D'
+          User-defined register set D.
+
+    `I'
+          Offsets for $gp-rel addressing.
+
+    `J'
+          Constants that can be used directly with boolean insns.
+
+    `K'
+          Constants that can be moved directly to registers.
+
+    `L'
+          Small constants that can be added to registers.
+
+    `M'
+          Long shift counts.
+
+    `N'
+          Small constants that can be compared to registers.
+
+    `O'
+          Constants that can be loaded into the top half of registers.
+
+    `S'
+          Signed 8-bit immediates.
+
+    `T'
+          Symbols encoded for $tp-rel or $gp-rel addressing.
+
+    `U'
+          Non-constant addresses for loading/saving coprocessor
+          registers.
+
+    `W'
+          The top half of a symbol's value.
+
+    `Y'
+          A register indirect address without offset.
+
+    `Z'
+          Symbolic references to the control bus.
+
+
+_MicroBlaze--`config/microblaze/constraints.md'_
+
+    `d'
+          A general register (`r0' to `r31').
+
+    `z'
+          A status register (`rmsr', `$fcc1' to `$fcc7').
+
+
+_MIPS--`config/mips/constraints.md'_
+
+    `d'
+          An address register.  This is equivalent to `r' unless
+          generating MIPS16 code.
+
+    `f'
+          A floating-point register (if available).
+
+    `h'
+          Formerly the `hi' register.  This constraint is no longer
+          supported.
+
+    `l'
+          The `lo' register.  Use this register to store values that are
+          no bigger than a word.
+
+    `x'
+          The concatenated `hi' and `lo' registers.  Use this register
+          to store doubleword values.
+
+    `c'
+          A register suitable for use in an indirect jump.  This will
+          always be `$25' for `-mabicalls'.
+
+    `v'
+          Register `$3'.  Do not use this constraint in new code; it is
+          retained only for compatibility with glibc.
+
+    `y'
+          Equivalent to `r'; retained for backwards compatibility.
+
+    `z'
+          A floating-point condition code register.
+
+    `I'
+          A signed 16-bit constant (for arithmetic instructions).
+
+    `J'
+          Integer zero.
+
+    `K'
+          An unsigned 16-bit constant (for logic instructions).
+
+    `L'
+          A signed 32-bit constant in which the lower 16 bits are zero.
+          Such constants can be loaded using `lui'.
+
+    `M'
+          A constant that cannot be loaded using `lui', `addiu' or
+          `ori'.
+
+    `N'
+          A constant in the range -65535 to -1 (inclusive).
+
+    `O'
+          A signed 15-bit constant.
+
+    `P'
+          A constant in the range 1 to 65535 (inclusive).
+
+    `G'
+          Floating-point zero.
+
+    `R'
+          An address that can be used in a non-macro load or store.
+
+_Motorola 680x0--`config/m68k/constraints.md'_
+
+    `a'
+          Address register
+
+    `d'
+          Data register
+
+    `f'
+          68881 floating-point register, if available
+
+    `I'
+          Integer in the range 1 to 8
+
+    `J'
+          16-bit signed number
+
+    `K'
+          Signed number whose magnitude is greater than 0x80
+
+    `L'
+          Integer in the range -8 to -1
+
+    `M'
+          Signed number whose magnitude is greater than 0x100
+
+    `N'
+          Range 24 to 31, rotatert:SI 8 to 1 expressed as rotate
+
+    `O'
+          16 (for rotate using swap)
+
+    `P'
+          Range 8 to 15, rotatert:HI 8 to 1 expressed as rotate
+
+    `R'
+          Numbers that mov3q can handle
+
+    `G'
+          Floating point constant that is not a 68881 constant
+
+    `S'
+          Operands that satisfy 'm' when -mpcrel is in effect
+
+    `T'
+          Operands that satisfy 's' when -mpcrel is not in effect
+
+    `Q'
+          Address register indirect addressing mode
+
+    `U'
+          Register offset addressing
+
+    `W'
+          const_call_operand
+
+    `Cs'
+          symbol_ref or const
+
+    `Ci'
+          const_int
+
+    `C0'
+          const_int 0
+
+    `Cj'
+          Range of signed numbers that don't fit in 16 bits
+
+    `Cmvq'
+          Integers valid for mvq
+
+    `Capsw'
+          Integers valid for a moveq followed by a swap
+
+    `Cmvz'
+          Integers valid for mvz
+
+    `Cmvs'
+          Integers valid for mvs
+
+    `Ap'
+          push_operand
+
+    `Ac'
+          Non-register operands allowed in clr
+
+
+_Motorola 68HC11 & 68HC12 families--`config/m68hc11/m68hc11.h'_
+
+    `a'
+          Register `a'
+
+    `b'
+          Register `b'
+
+    `d'
+          Register `d'
+
+    `q'
+          An 8-bit register
+
+    `t'
+          Temporary soft register _.tmp
+
+    `u'
+          A soft register _.d1 to _.d31
+
+    `w'
+          Stack pointer register
+
+    `x'
+          Register `x'
+
+    `y'
+          Register `y'
+
+    `z'
+          Pseudo register `z' (replaced by `x' or `y' at the end)
+
+    `A'
+          An address register: x, y or z
+
+    `B'
+          An address register: x or y
+
+    `D'
+          Register pair (x:d) to form a 32-bit value
+
+    `L'
+          Constants in the range -65536 to 65535
+
+    `M'
+          Constants whose 16-bit low part is zero
+
+    `N'
+          Constant integer 1 or -1
+
+    `O'
+          Constant integer 16
+
+    `P'
+          Constants in the range -8 to 2
+
+
+_Moxie--`config/moxie/constraints.md'_
+
+    `A'
+          An absolute address
+
+    `B'
+          An offset address
+
+    `W'
+          A register indirect memory operand
+
+    `I'
+          A constant in the range of 0 to 255.
+
+    `N'
+          A constant in the range of 0 to -255.
+
+
+_PDP-11--`config/pdp11/constraints.md'_
+
+    `a'
+          Floating point registers AC0 through AC3.  These can be
+          loaded from/to memory with a single instruction.
+
+    `d'
+          Odd numbered general registers (R1, R3, R5).  These are used
+          for 16-bit multiply operations.
+
+    `f'
+          Any of the floating point registers (AC0 through AC5).
+
+    `G'
+          Floating point constant 0.
+
+    `I'
+          An integer constant that fits in 16 bits.
+
+    `J'
+          An integer constant whose low order 16 bits are zero.
+
+    `K'
+          An integer constant that does not meet the constraints for
+          codes `I' or `J'.
+
+    `L'
+          The integer constant 1.
+
+    `M'
+          The integer constant -1.
+
+    `N'
+          The integer constant 0.
+
+    `O'
+          Integer constants -4 through -1 and 1 through 4; shifts by
+          these amounts are handled as multiple single-bit shifts
+          rather than a single variable-length shift.
+
+    `Q'
+          A memory reference which requires an additional word (address
+          or offset) after the opcode.
+
+    `R'
+          A memory reference that is encoded within the opcode.
+
+
+_RX--`config/rx/constraints.md'_
+
+    `Q'
+          An address which does not involve register indirect
+          addressing or pre/post increment/decrement addressing.
+
+    `Symbol'
+          A symbol reference.
+
+    `Int08'
+          A constant in the range -256 to 255, inclusive.
+
+    `Sint08'
+          A constant in the range -128 to 127, inclusive.
+
+    `Sint16'
+          A constant in the range -32768 to 32767, inclusive.
+
+    `Sint24'
+          A constant in the range -8388608 to 8388607, inclusive.
+
+    `Uint04'
+          A constant in the range 0 to 15, inclusive.
+
+
+_SPARC--`config/sparc/sparc.h'_
+
+    `f'
+          Floating-point register on the SPARC-V8 architecture and
+          lower floating-point register on the SPARC-V9 architecture.
+
+    `e'
+          Floating-point register.  It is equivalent to `f' on the
+          SPARC-V8 architecture and contains both lower and upper
+          floating-point registers on the SPARC-V9 architecture.
+
+    `c'
+          Floating-point condition code register.
+
+    `d'
+          Lower floating-point register.  It is only valid on the
+          SPARC-V9 architecture when the Visual Instruction Set is
+          available.
+
+    `b'
+          Floating-point register.  It is only valid on the SPARC-V9
+          architecture when the Visual Instruction Set is available.
+
+    `h'
+          64-bit global or out register for the SPARC-V8+ architecture.
+
+    `D'
+          A vector constant
+
+    `I'
+          Signed 13-bit constant
+
+    `J'
+          Zero
+
+    `K'
+          32-bit constant with the low 12 bits clear (a constant that
+          can be loaded with the `sethi' instruction)
+
+    `L'
+          A constant in the range supported by `movcc' instructions
+
+    `M'
+          A constant in the range supported by `movrcc' instructions
+
+    `N'
+          Same as `K', except that it verifies that bits that are not
+          in the lower 32-bit range are all zero.  Must be used instead
+          of `K' for modes wider than `SImode'
+
+    `O'
+          The constant 4096
+
+    `G'
+          Floating-point zero
+
+    `H'
+          Signed 13-bit constant, sign-extended to 32 or 64 bits
+
+    `Q'
+          Floating-point constant whose integral representation can be
+          moved into an integer register using a single sethi
+          instruction
+
+    `R'
+          Floating-point constant whose integral representation can be
+          moved into an integer register using a single mov instruction
+
+    `S'
+          Floating-point constant whose integral representation can be
+          moved into an integer register using a high/lo_sum
+          instruction sequence
+
+    `T'
+          Memory address aligned to an 8-byte boundary
+
+    `U'
+          Even register
+
+    `W'
+          Memory address for `e' constraint registers
+
+    `Y'
+          Vector zero
+
+
+_SPU--`config/spu/spu.h'_
+
+    `a'
+          An immediate which can be loaded with the il/ila/ilh/ilhu
+          instructions.  const_int is treated as a 64 bit value.
+
+    `c'
+          An immediate for and/xor/or instructions.  const_int is
+          treated as a 64 bit value.
+
+    `d'
+          An immediate for the `iohl' instruction.  const_int is
+          treated as a 64 bit value.
+
+    `f'
+          An immediate which can be loaded with `fsmbi'.
+
+    `A'
+          An immediate which can be loaded with the il/ila/ilh/ilhu
+          instructions.  const_int is treated as a 32 bit value.
+
+    `B'
+          An immediate for most arithmetic instructions.  const_int is
+          treated as a 32 bit value.
+
+    `C'
+          An immediate for and/xor/or instructions.  const_int is
+          treated as a 32 bit value.
+
+    `D'
+          An immediate for the `iohl' instruction.  const_int is
+          treated as a 32 bit value.
+
+    `I'
+          A constant in the range [-64, 63] for shift/rotate
+          instructions.
+
+    `J'
+          An unsigned 7-bit constant for conversion/nop/channel
+          instructions.
+
+    `K'
+          A signed 10-bit constant for most arithmetic instructions.
+
+    `M'
+          A signed 16 bit immediate for `stop'.
+
+    `N'
+          An unsigned 16-bit constant for `iohl' and `fsmbi'.
+
+    `O'
+          An unsigned 7-bit constant whose 3 least significant bits are
+          0.
+
+    `P'
+          An unsigned 3-bit constant for 16-byte rotates and shifts
+
+    `R'
+          Call operand, reg, for indirect calls
+
+    `S'
+          Call operand, symbol, for relative calls.
+
+    `T'
+          Call operand, const_int, for absolute calls.
+
+    `U'
+          An immediate which can be loaded with the il/ila/ilh/ilhu
+          instructions.  const_int is sign extended to 128 bit.
+
+    `W'
+          An immediate for shift and rotate instructions.  const_int is
+          treated as a 32 bit value.
+
+    `Y'
+          An immediate for and/xor/or instructions.  const_int is sign
+          extended as a 128 bit.
+
+    `Z'
+          An immediate for the `iohl' instruction.  const_int is sign
+          extended to 128 bit.
+
+
+_S/390 and zSeries--`config/s390/s390.h'_
+
+    `a'
+          Address register (general purpose register except r0)
+
+    `c'
+          Condition code register
+
+    `d'
+          Data register (arbitrary general purpose register)
+
+    `f'
+          Floating-point register
+
+    `I'
+          Unsigned 8-bit constant (0-255)
+
+    `J'
+          Unsigned 12-bit constant (0-4095)
+
+    `K'
+          Signed 16-bit constant (-32768-32767)
+
+    `L'
+          Value appropriate as displacement.
+         `(0..4095)'
+               for short displacement
+
+         `(-524288..524287)'
+               for long displacement
+
+    `M'
+          Constant integer with a value of 0x7fffffff.
+
+    `N'
+          Multiple letter constraint followed by 4 parameter letters.
+         `0..9:'
+               number of the part counting from most to least
+               significant
+
+         `H,Q:'
+               mode of the part
+
+         `D,S,H:'
+               mode of the containing operand
+
+         `0,F:'
+               value of the other parts (F--all bits set)
+          The constraint matches if the specified part of a constant
+          has a value different from its other parts.
+
+    `Q'
+          Memory reference without index register and with short
+          displacement.
+
+    `R'
+          Memory reference with index register and short displacement.
+
+    `S'
+          Memory reference without index register but with long
+          displacement.
+
+    `T'
+          Memory reference with index register and long displacement.
+
+    `U'
+          Pointer with short displacement.
+
+    `W'
+          Pointer with long displacement.
+
+    `Y'
+          Shift count operand.
+
+
+_Score family--`config/score/score.h'_
+
+    `d'
+          Registers from r0 to r32.
+
+    `e'
+          Registers from r0 to r16.
+
+    `t'
+          r8--r11 or r22--r27 registers.
+
+    `h'
+          hi register.
+
+    `l'
+          lo register.
+
+    `x'
+          hi + lo register.
+
+    `q'
+          cnt register.
+
+    `y'
+          lcb register.
+
+    `z'
+          scb register.
+
+    `a'
+          cnt + lcb + scb register.
+
+    `c'
+          cr0--cr15 register.
+
+    `b'
+          cp1 registers.
+
+    `f'
+          cp2 registers.
+
+    `i'
+          cp3 registers.
+
+    `j'
+          cp1 + cp2 + cp3 registers.
+
+    `I'
+          High 16-bit constant (32-bit constant with 16 LSBs zero).
+
+    `J'
+          Unsigned 5 bit integer (in the range 0 to 31).
+
+    `K'
+          Unsigned 16 bit integer (in the range 0 to 65535).
+
+    `L'
+          Signed 16 bit integer (in the range -32768 to 32767).
+
+    `M'
+          Unsigned 14 bit integer (in the range 0 to 16383).
+
+    `N'
+          Signed 14 bit integer (in the range -8192 to 8191).
+
+    `Z'
+          Any SYMBOL_REF.
+
+_Xstormy16--`config/stormy16/stormy16.h'_
+
+    `a'
+          Register r0.
+
+    `b'
+          Register r1.
+
+    `c'
+          Register r2.
+
+    `d'
+          Register r8.
+
+    `e'
+          Registers r0 through r7.
+
+    `t'
+          Registers r0 and r1.
+
+    `y'
+          The carry register.
+
+    `z'
+          Registers r8 and r9.
+
+    `I'
+          A constant between 0 and 3 inclusive.
+
+    `J'
+          A constant that has exactly one bit set.
+
+    `K'
+          A constant that has exactly one bit clear.
+
+    `L'
+          A constant between 0 and 255 inclusive.
+
+    `M'
+          A constant between -255 and 0 inclusive.
+
+    `N'
+          A constant between -3 and 0 inclusive.
+
+    `O'
+          A constant between 1 and 4 inclusive.
+
+    `P'
+          A constant between -4 and -1 inclusive.
+
+    `Q'
+          A memory reference that is a stack push.
+
+    `R'
+          A memory reference that is a stack pop.
+
+    `S'
+          A memory reference that refers to a constant address of known
+          value.
+
+    `T'
+          The register indicated by Rx (not implemented yet).
+
+    `U'
+          A constant that is not between 2 and 15 inclusive.
+
+    `Z'
+          The constant 0.
+
+
+_Xtensa--`config/xtensa/constraints.md'_
+
+    `a'
+          General-purpose 32-bit register
+
+    `b'
+          One-bit boolean register
+
+    `A'
+          MAC16 40-bit accumulator register
+
+    `I'
+          Signed 12-bit integer constant, for use in MOVI instructions
+
+    `J'
+          Signed 8-bit integer constant, for use in ADDI instructions
+
+    `K'
+          Integer constant valid for BccI instructions
+
+    `L'
+          Unsigned constant valid for BccUI instructions
+
+
+
+
+File: gccint.info,  Node: Disable Insn Alternatives,  Next: Machine Constraints,  Prev: Modifiers,  Up: Constraints
+
+16.8.6 Disable insn alternatives using the `enabled' attribute
+--------------------------------------------------------------
+
+The `enabled' insn attribute may be used to disable certain insn
+alternatives for machine-specific reasons.  This is useful when adding
+new instructions to an existing pattern which are only available for
+certain cpu architecture levels as specified with the `-march=' option.
+
+ If an insn alternative is disabled, then it will never be used.  The
+compiler treats the constraints for the disabled alternative as
+unsatisfiable.
+
+ In order to make use of the `enabled' attribute a back end has to add
+in the machine description files:
+
+  1. A definition of the `enabled' insn attribute.  The attribute is
+     defined as usual using the `define_attr' command.  This definition
+     should be based on other insn attributes and/or target flags.  The
+     `enabled' attribute is a numeric attribute and should evaluate to
+     `(const_int 1)' for an enabled alternative and to `(const_int 0)'
+     otherwise.
+
+  2. A definition of another insn attribute used to describe for what
+     reason an insn alternative might be available or not.  E.g.
+     `cpu_facility' as in the example below.
+
+  3. An assignment for the second attribute to each insn definition
+     combining instructions which are not all available under the same
+     circumstances.  (Note: It obviously only makes sense for
+     definitions with more than one alternative.  Otherwise the insn
+     pattern should be disabled or enabled using the insn condition.)
+
+ E.g. the following two patterns could easily be merged using the
+`enabled' attribute:
+
+
+     (define_insn "*movdi_old"
+       [(set (match_operand:DI 0 "register_operand" "=d")
+             (match_operand:DI 1 "register_operand" " d"))]
+       "!TARGET_NEW"
+       "lgr %0,%1")
+
+     (define_insn "*movdi_new"
+       [(set (match_operand:DI 0 "register_operand" "=d,f,d")
+             (match_operand:DI 1 "register_operand" " d,d,f"))]
+       "TARGET_NEW"
+       "@
+        lgr  %0,%1
+        ldgr %0,%1
+        lgdr %0,%1")
+
+ to:
+
+
+     (define_insn "*movdi_combined"
+       [(set (match_operand:DI 0 "register_operand" "=d,f,d")
+             (match_operand:DI 1 "register_operand" " d,d,f"))]
+       ""
+       "@
+        lgr  %0,%1
+        ldgr %0,%1
+        lgdr %0,%1"
+       [(set_attr "cpu_facility" "*,new,new")])
+
+ with the `enabled' attribute defined like this:
+
+
+     (define_attr "cpu_facility" "standard,new" (const_string "standard"))
+
+     (define_attr "enabled" ""
+       (cond [(eq_attr "cpu_facility" "standard") (const_int 1)
+              (and (eq_attr "cpu_facility" "new")
+                   (ne (symbol_ref "TARGET_NEW") (const_int 0)))
+              (const_int 1)]
+             (const_int 0)))
+
+
+File: gccint.info,  Node: Define Constraints,  Next: C Constraint Interface,  Prev: Machine Constraints,  Up: Constraints
+
+16.8.7 Defining Machine-Specific Constraints
+--------------------------------------------
+
+Machine-specific constraints fall into two categories: register and
+non-register constraints.  Within the latter category, constraints
+which allow subsets of all possible memory or address operands should
+be specially marked, to give `reload' more information.
+
+ Machine-specific constraints can be given names of arbitrary length,
+but they must be entirely composed of letters, digits, underscores
+(`_'), and angle brackets (`< >').  Like C identifiers, they must begin
+with a letter or underscore.
+
+ In order to avoid ambiguity in operand constraint strings, no
+constraint can have a name that begins with any other constraint's
+name.  For example, if `x' is defined as a constraint name, `xy' may
+not be, and vice versa.  As a consequence of this rule, no constraint
+may begin with one of the generic constraint letters: `E F V X g i m n
+o p r s'.
+
+ Register constraints correspond directly to register classes.  *Note
+Register Classes::.  There is thus not much flexibility in their
+definitions.
+
+ -- MD Expression: define_register_constraint name regclass docstring
+     All three arguments are string constants.  NAME is the name of the
+     constraint, as it will appear in `match_operand' expressions.  If
+     NAME is a multi-letter constraint its length shall be the same for
+     all constraints starting with the same letter.  REGCLASS can be
+     either the name of the corresponding register class (*note
+     Register Classes::), or a C expression which evaluates to the
+     appropriate register class.  If it is an expression, it must have
+     no side effects, and it cannot look at the operand.  The usual use
+     of expressions is to map some register constraints to `NO_REGS'
+     when the register class is not available on a given
+     subarchitecture.
+
+     DOCSTRING is a sentence documenting the meaning of the constraint.
+     Docstrings are explained further below.
+
+ Non-register constraints are more like predicates: the constraint
+definition gives a Boolean expression which indicates whether the
+constraint matches.
+
+ -- MD Expression: define_constraint name docstring exp
+     The NAME and DOCSTRING arguments are the same as for
+     `define_register_constraint', but note that the docstring comes
+     immediately after the name for these expressions.  EXP is an RTL
+     expression, obeying the same rules as the RTL expressions in
+     predicate definitions.  *Note Defining Predicates::, for details.
+     If it evaluates true, the constraint matches; if it evaluates
+     false, it doesn't. Constraint expressions should indicate which
+     RTL codes they might match, just like predicate expressions.
+
+     `match_test' C expressions have access to the following variables:
+
+    OP
+          The RTL object defining the operand.
+
+    MODE
+          The machine mode of OP.
+
+    IVAL
+          `INTVAL (OP)', if OP is a `const_int'.
+
+    HVAL
+          `CONST_DOUBLE_HIGH (OP)', if OP is an integer `const_double'.
+
+    LVAL
+          `CONST_DOUBLE_LOW (OP)', if OP is an integer `const_double'.
+
+    RVAL
+          `CONST_DOUBLE_REAL_VALUE (OP)', if OP is a floating-point
+          `const_double'.
+
+     The *VAL variables should only be used once another piece of the
+     expression has verified that OP is the appropriate kind of RTL
+     object.
+
+ Most non-register constraints should be defined with
+`define_constraint'.  The remaining two definition expressions are only
+appropriate for constraints that should be handled specially by
+`reload' if they fail to match.
+
+ -- MD Expression: define_memory_constraint name docstring exp
+     Use this expression for constraints that match a subset of all
+     memory operands: that is, `reload' can make them match by
+     converting the operand to the form `(mem (reg X))', where X is a
+     base register (from the register class specified by
+     `BASE_REG_CLASS', *note Register Classes::).
+
+     For example, on the S/390, some instructions do not accept
+     arbitrary memory references, but only those that do not make use
+     of an index register.  The constraint letter `Q' is defined to
+     represent a memory address of this type.  If `Q' is defined with
+     `define_memory_constraint', a `Q' constraint can handle any memory
+     operand, because `reload' knows it can simply copy the memory
+     address into a base register if required.  This is analogous to
+     the way an `o' constraint can handle any memory operand.
+
+     The syntax and semantics are otherwise identical to
+     `define_constraint'.
+
+ -- MD Expression: define_address_constraint name docstring exp
+     Use this expression for constraints that match a subset of all
+     address operands: that is, `reload' can make the constraint match
+     by converting the operand to the form `(reg X)', again with X a
+     base register.
+
+     Constraints defined with `define_address_constraint' can only be
+     used with the `address_operand' predicate, or machine-specific
+     predicates that work the same way.  They are treated analogously to
+     the generic `p' constraint.
+
+     The syntax and semantics are otherwise identical to
+     `define_constraint'.
+
+ For historical reasons, names beginning with the letters `G H' are
+reserved for constraints that match only `const_double's, and names
+beginning with the letters `I J K L M N O P' are reserved for
+constraints that match only `const_int's.  This may change in the
+future.  For the time being, constraints with these names must be
+written in a stylized form, so that `genpreds' can tell you did it
+correctly:
+
+     (define_constraint "[GHIJKLMNOP]..."
+       "DOC..."
+       (and (match_code "const_int")  ; `const_double' for G/H
+            CONDITION...))            ; usually a `match_test'
+
+ It is fine to use names beginning with other letters for constraints
+that match `const_double's or `const_int's.
+
+ Each docstring in a constraint definition should be one or more
+complete sentences, marked up in Texinfo format.  _They are currently
+unused._ In the future they will be copied into the GCC manual, in
+*note Machine Constraints::, replacing the hand-maintained tables
+currently found in that section.  Also, in the future the compiler may
+use this to give more helpful diagnostics when poor choice of `asm'
+constraints causes a reload failure.
+
+ If you put the pseudo-Texinfo directive `@internal' at the beginning
+of a docstring, then (in the future) it will appear only in the
+internals manual's version of the machine-specific constraint tables.
+Use this for constraints that should not appear in `asm' statements.
+
+
+File: gccint.info,  Node: C Constraint Interface,  Prev: Define Constraints,  Up: Constraints
+
+16.8.8 Testing constraints from C
+---------------------------------
+
+It is occasionally useful to test a constraint from C code rather than
+implicitly via the constraint string in a `match_operand'.  The
+generated file `tm_p.h' declares a few interfaces for working with
+machine-specific constraints.  None of these interfaces work with the
+generic constraints described in *note Simple Constraints::.  This may
+change in the future.
+
+ *Warning:* `tm_p.h' may declare other functions that operate on
+constraints, besides the ones documented here.  Do not use those
+functions from machine-dependent code.  They exist to implement the old
+constraint interface that machine-independent components of the
+compiler still expect.  They will change or disappear in the future.
+
+ Some valid constraint names are not valid C identifiers, so there is a
+mangling scheme for referring to them from C.  Constraint names that do
+not contain angle brackets or underscores are left unchanged.
+Underscores are doubled, each `<' is replaced with `_l', and each `>'
+with `_g'.  Here are some examples:
+
+     *Original* *Mangled*
+     `x'        `x'
+     `P42x'     `P42x'
+     `P4_x'     `P4__x'
+     `P4>x'     `P4_gx'
+     `P4>>'     `P4_g_g'
+     `P4_g>'    `P4__g_g'
+
+ Throughout this section, the variable C is either a constraint in the
+abstract sense, or a constant from `enum constraint_num'; the variable
+M is a mangled constraint name (usually as part of a larger identifier).
+
+ -- Enum: constraint_num
+     For each machine-specific constraint, there is a corresponding
+     enumeration constant: `CONSTRAINT_' plus the mangled name of the
+     constraint.  Functions that take an `enum constraint_num' as an
+     argument expect one of these constants.
+
+     Machine-independent constraints do not have associated constants.
+     This may change in the future.
+
+ -- Function: inline bool satisfies_constraint_M (rtx EXP)
+     For each machine-specific, non-register constraint M, there is one
+     of these functions; it returns `true' if EXP satisfies the
+     constraint.  These functions are only visible if `rtl.h' was
+     included before `tm_p.h'.
+
+ -- Function: bool constraint_satisfied_p (rtx EXP, enum constraint_num
+          C)
+     Like the `satisfies_constraint_M' functions, but the constraint to
+     test is given as an argument, C.  If C specifies a register
+     constraint, this function will always return `false'.
+
+ -- Function: enum reg_class regclass_for_constraint (enum
+          constraint_num C)
+     Returns the register class associated with C.  If C is not a
+     register constraint, or those registers are not available for the
+     currently selected subtarget, returns `NO_REGS'.
+
+ Here is an example use of `satisfies_constraint_M'.  In peephole
+optimizations (*note Peephole Definitions::), operand constraint
+strings are ignored, so if there are relevant constraints, they must be
+tested in the C condition.  In the example, the optimization is applied
+if operand 2 does _not_ satisfy the `K' constraint.  (This is a
+simplified version of a peephole definition from the i386 machine
+description.)
+
+     (define_peephole2
+       [(match_scratch:SI 3 "r")
+        (set (match_operand:SI 0 "register_operand" "")
+             (mult:SI (match_operand:SI 1 "memory_operand" "")
+                      (match_operand:SI 2 "immediate_operand" "")))]
+
+       "!satisfies_constraint_K (operands[2])"
+
+       [(set (match_dup 3) (match_dup 1))
+        (set (match_dup 0) (mult:SI (match_dup 3) (match_dup 2)))]
+
+       "")
+
+
+File: gccint.info,  Node: Standard Names,  Next: Pattern Ordering,  Prev: Constraints,  Up: Machine Desc
+
+16.9 Standard Pattern Names For Generation
+==========================================
+
+Here is a table of the instruction names that are meaningful in the RTL
+generation pass of the compiler.  Giving one of these names to an
+instruction pattern tells the RTL generation pass that it can use the
+pattern to accomplish a certain task.
+
+`movM'
+     Here M stands for a two-letter machine mode name, in lowercase.
+     This instruction pattern moves data with that machine mode from
+     operand 1 to operand 0.  For example, `movsi' moves full-word data.
+
+     If operand 0 is a `subreg' with mode M of a register whose own
+     mode is wider than M, the effect of this instruction is to store
+     the specified value in the part of the register that corresponds
+     to mode M.  Bits outside of M, but which are within the same
+     target word as the `subreg' are undefined.  Bits which are outside
+     the target word are left unchanged.
+
+     This class of patterns is special in several ways.  First of all,
+     each of these names up to and including full word size _must_ be
+     defined, because there is no other way to copy a datum from one
+     place to another.  If there are patterns accepting operands in
+     larger modes, `movM' must be defined for integer modes of those
+     sizes.
+
+     Second, these patterns are not used solely in the RTL generation
+     pass.  Even the reload pass can generate move insns to copy values
+     from stack slots into temporary registers.  When it does so, one
+     of the operands is a hard register and the other is an operand
+     that can need to be reloaded into a register.
+
+     Therefore, when given such a pair of operands, the pattern must
+     generate RTL which needs no reloading and needs no temporary
+     registers--no registers other than the operands.  For example, if
+     you support the pattern with a `define_expand', then in such a
+     case the `define_expand' mustn't call `force_reg' or any other such
+     function which might generate new pseudo registers.
+
+     This requirement exists even for subword modes on a RISC machine
+     where fetching those modes from memory normally requires several
+     insns and some temporary registers.
+
+     During reload a memory reference with an invalid address may be
+     passed as an operand.  Such an address will be replaced with a
+     valid address later in the reload pass.  In this case, nothing may
+     be done with the address except to use it as it stands.  If it is
+     copied, it will not be replaced with a valid address.  No attempt
+     should be made to make such an address into a valid address and no
+     routine (such as `change_address') that will do so may be called.
+     Note that `general_operand' will fail when applied to such an
+     address.
+
+     The global variable `reload_in_progress' (which must be explicitly
+     declared if required) can be used to determine whether such special
+     handling is required.
+
+     The variety of operands that have reloads depends on the rest of
+     the machine description, but typically on a RISC machine these can
+     only be pseudo registers that did not get hard registers, while on
+     other machines explicit memory references will get optional
+     reloads.
+
+     If a scratch register is required to move an object to or from
+     memory, it can be allocated using `gen_reg_rtx' prior to life
+     analysis.
+
+     If there are cases which need scratch registers during or after
+     reload, you must provide an appropriate secondary_reload target
+     hook.
+
+     The macro `can_create_pseudo_p' can be used to determine if it is
+     unsafe to create new pseudo registers.  If this variable is
+     nonzero, then it is unsafe to call `gen_reg_rtx' to allocate a new
+     pseudo.
+
+     The constraints on a `movM' must permit moving any hard register
+     to any other hard register provided that `HARD_REGNO_MODE_OK'
+     permits mode M in both registers and `TARGET_REGISTER_MOVE_COST'
+     applied to their classes returns a value of 2.
+
+     It is obligatory to support floating point `movM' instructions
+     into and out of any registers that can hold fixed point values,
+     because unions and structures (which have modes `SImode' or
+     `DImode') can be in those registers and they may have floating
+     point members.
+
+     There may also be a need to support fixed point `movM'
+     instructions in and out of floating point registers.
+     Unfortunately, I have forgotten why this was so, and I don't know
+     whether it is still true.  If `HARD_REGNO_MODE_OK' rejects fixed
+     point values in floating point registers, then the constraints of
+     the fixed point `movM' instructions must be designed to avoid ever
+     trying to reload into a floating point register.
+
+`reload_inM'
+`reload_outM'
+     These named patterns have been obsoleted by the target hook
+     `secondary_reload'.
+
+     Like `movM', but used when a scratch register is required to move
+     between operand 0 and operand 1.  Operand 2 describes the scratch
+     register.  See the discussion of the `SECONDARY_RELOAD_CLASS'
+     macro in *note Register Classes::.
+
+     There are special restrictions on the form of the `match_operand's
+     used in these patterns.  First, only the predicate for the reload
+     operand is examined, i.e., `reload_in' examines operand 1, but not
+     the predicates for operand 0 or 2.  Second, there may be only one
+     alternative in the constraints.  Third, only a single register
+     class letter may be used for the constraint; subsequent constraint
+     letters are ignored.  As a special exception, an empty constraint
+     string matches the `ALL_REGS' register class.  This may relieve
+     ports of the burden of defining an `ALL_REGS' constraint letter
+     just for these patterns.
+
+`movstrictM'
+     Like `movM' except that if operand 0 is a `subreg' with mode M of
+     a register whose natural mode is wider, the `movstrictM'
+     instruction is guaranteed not to alter any of the register except
+     the part which belongs to mode M.
+
+`movmisalignM'
+     This variant of a move pattern is designed to load or store a value
+     from a memory address that is not naturally aligned for its mode.
+     For a store, the memory will be in operand 0; for a load, the
+     memory will be in operand 1.  The other operand is guaranteed not
+     to be a memory, so that it's easy to tell whether this is a load
+     or store.
+
+     This pattern is used by the autovectorizer, and when expanding a
+     `MISALIGNED_INDIRECT_REF' expression.
+
+`load_multiple'
+     Load several consecutive memory locations into consecutive
+     registers.  Operand 0 is the first of the consecutive registers,
+     operand 1 is the first memory location, and operand 2 is a
+     constant: the number of consecutive registers.
+
+     Define this only if the target machine really has such an
+     instruction; do not define this if the most efficient way of
+     loading consecutive registers from memory is to do them one at a
+     time.
+
+     On some machines, there are restrictions as to which consecutive
+     registers can be stored into memory, such as particular starting or
+     ending register numbers or only a range of valid counts.  For those
+     machines, use a `define_expand' (*note Expander Definitions::) and
+     make the pattern fail if the restrictions are not met.
+
+     Write the generated insn as a `parallel' with elements being a
+     `set' of one register from the appropriate memory location (you may
+     also need `use' or `clobber' elements).  Use a `match_parallel'
+     (*note RTL Template::) to recognize the insn.  See `rs6000.md' for
+     examples of the use of this insn pattern.
+
+`store_multiple'
+     Similar to `load_multiple', but store several consecutive registers
+     into consecutive memory locations.  Operand 0 is the first of the
+     consecutive memory locations, operand 1 is the first register, and
+     operand 2 is a constant: the number of consecutive registers.
+
+`vec_setM'
+     Set given field in the vector value.  Operand 0 is the vector to
+     modify, operand 1 is new value of field and operand 2 specify the
+     field index.
+
+`vec_extractM'
+     Extract given field from the vector value.  Operand 1 is the
+     vector, operand 2 specify field index and operand 0 place to store
+     value into.
+
+`vec_extract_evenM'
+     Extract even elements from the input vectors (operand 1 and
+     operand 2).  The even elements of operand 2 are concatenated to
+     the even elements of operand 1 in their original order. The result
+     is stored in operand 0.  The output and input vectors should have
+     the same modes.
+
+`vec_extract_oddM'
+     Extract odd elements from the input vectors (operand 1 and operand
+     2).  The odd elements of operand 2 are concatenated to the odd
+     elements of operand 1 in their original order. The result is
+     stored in operand 0.  The output and input vectors should have the
+     same modes.
+
+`vec_interleave_highM'
+     Merge high elements of the two input vectors into the output
+     vector. The output and input vectors should have the same modes
+     (`N' elements). The high `N/2' elements of the first input vector
+     are interleaved with the high `N/2' elements of the second input
+     vector.
+
+`vec_interleave_lowM'
+     Merge low elements of the two input vectors into the output
+     vector. The output and input vectors should have the same modes
+     (`N' elements). The low `N/2' elements of the first input vector
+     are interleaved with the low `N/2' elements of the second input
+     vector.
+
+`vec_initM'
+     Initialize the vector to given values.  Operand 0 is the vector to
+     initialize and operand 1 is parallel containing values for
+     individual fields.
+
+`pushM1'
+     Output a push instruction.  Operand 0 is value to push.  Used only
+     when `PUSH_ROUNDING' is defined.  For historical reason, this
+     pattern may be missing and in such case an `mov' expander is used
+     instead, with a `MEM' expression forming the push operation.  The
+     `mov' expander method is deprecated.
+
+`addM3'
+     Add operand 2 and operand 1, storing the result in operand 0.  All
+     operands must have mode M.  This can be used even on two-address
+     machines, by means of constraints requiring operands 1 and 0 to be
+     the same location.
+
+`ssaddM3', `usaddM3'
+
+`subM3', `sssubM3', `ussubM3'
+
+`mulM3', `ssmulM3', `usmulM3'
+`divM3', `ssdivM3'
+`udivM3', `usdivM3'
+`modM3', `umodM3'
+`uminM3', `umaxM3'
+`andM3', `iorM3', `xorM3'
+     Similar, for other arithmetic operations.
+
+`fmaM4'
+     Multiply operand 2 and operand 1, then add operand 3, storing the
+     result in operand 0.  All operands must have mode M.  This pattern
+     is used to implement the `fma', `fmaf', and `fmal' builtin
+     functions from the ISO C99 standard.  The `fma' operation may
+     produce different results than doing the multiply followed by the
+     add if the machine does not perform a rounding step between the
+     operations.
+
+`fmsM4'
+     Like `fmaM4', except operand 3 subtracted from the product instead
+     of added to the product.  This is represented in the rtl as
+
+          (fma:M OP1 OP2 (neg:M OP3))
+
+`fnmaM4'
+     Like `fmaM4' except that the intermediate product is negated
+     before being added to operand 3.  This is represented in the rtl as
+
+          (fma:M (neg:M OP1) OP2 OP3)
+
+`fnmsM4'
+     Like `fmsM4' except that the intermediate product is negated
+     before subtracting operand 3.  This is represented in the rtl as
+
+          (fma:M (neg:M OP1) OP2 (neg:M OP3))
+
+`sminM3', `smaxM3'
+     Signed minimum and maximum operations.  When used with floating
+     point, if both operands are zeros, or if either operand is `NaN',
+     then it is unspecified which of the two operands is returned as
+     the result.
+
+`reduc_smin_M', `reduc_smax_M'
+     Find the signed minimum/maximum of the elements of a vector. The
+     vector is operand 1, and the scalar result is stored in the least
+     significant bits of operand 0 (also a vector). The output and
+     input vector should have the same modes.
+
+`reduc_umin_M', `reduc_umax_M'
+     Find the unsigned minimum/maximum of the elements of a vector. The
+     vector is operand 1, and the scalar result is stored in the least
+     significant bits of operand 0 (also a vector). The output and
+     input vector should have the same modes.
+
+`reduc_splus_M'
+     Compute the sum of the signed elements of a vector. The vector is
+     operand 1, and the scalar result is stored in the least
+     significant bits of operand 0 (also a vector). The output and
+     input vector should have the same modes.
+
+`reduc_uplus_M'
+     Compute the sum of the unsigned elements of a vector. The vector
+     is operand 1, and the scalar result is stored in the least
+     significant bits of operand 0 (also a vector). The output and
+     input vector should have the same modes.
+
+`sdot_prodM'
+
+`udot_prodM'
+     Compute the sum of the products of two signed/unsigned elements.
+     Operand 1 and operand 2 are of the same mode. Their product, which
+     is of a wider mode, is computed and added to operand 3. Operand 3
+     is of a mode equal or wider than the mode of the product. The
+     result is placed in operand 0, which is of the same mode as
+     operand 3.
+
+`ssum_widenM3'
+
+`usum_widenM3'
+     Operands 0 and 2 are of the same mode, which is wider than the
+     mode of operand 1. Add operand 1 to operand 2 and place the
+     widened result in operand 0. (This is used express accumulation of
+     elements into an accumulator of a wider mode.)
+
+`vec_shl_M', `vec_shr_M'
+     Whole vector left/right shift in bits.  Operand 1 is a vector to
+     be shifted.  Operand 2 is an integer shift amount in bits.
+     Operand 0 is where the resulting shifted vector is stored.  The
+     output and input vectors should have the same modes.
+
+`vec_pack_trunc_M'
+     Narrow (demote) and merge the elements of two vectors. Operands 1
+     and 2 are vectors of the same mode having N integral or floating
+     point elements of size S.  Operand 0 is the resulting vector in
+     which 2*N elements of size N/2 are concatenated after narrowing
+     them down using truncation.
+
+`vec_pack_ssat_M', `vec_pack_usat_M'
+     Narrow (demote) and merge the elements of two vectors.  Operands 1
+     and 2 are vectors of the same mode having N integral elements of
+     size S.  Operand 0 is the resulting vector in which the elements
+     of the two input vectors are concatenated after narrowing them
+     down using signed/unsigned saturating arithmetic.
+
+`vec_pack_sfix_trunc_M', `vec_pack_ufix_trunc_M'
+     Narrow, convert to signed/unsigned integral type and merge the
+     elements of two vectors.  Operands 1 and 2 are vectors of the same
+     mode having N floating point elements of size S.  Operand 0 is the
+     resulting vector in which 2*N elements of size N/2 are
+     concatenated.
+
+`vec_unpacks_hi_M', `vec_unpacks_lo_M'
+     Extract and widen (promote) the high/low part of a vector of signed
+     integral or floating point elements.  The input vector (operand 1)
+     has N elements of size S.  Widen (promote) the high/low elements
+     of the vector using signed or floating point extension and place
+     the resulting N/2 values of size 2*S in the output vector (operand
+     0).
+
+`vec_unpacku_hi_M', `vec_unpacku_lo_M'
+     Extract and widen (promote) the high/low part of a vector of
+     unsigned integral elements.  The input vector (operand 1) has N
+     elements of size S.  Widen (promote) the high/low elements of the
+     vector using zero extension and place the resulting N/2 values of
+     size 2*S in the output vector (operand 0).
+
+`vec_unpacks_float_hi_M', `vec_unpacks_float_lo_M'
+`vec_unpacku_float_hi_M', `vec_unpacku_float_lo_M'
+     Extract, convert to floating point type and widen the high/low
+     part of a vector of signed/unsigned integral elements.  The input
+     vector (operand 1) has N elements of size S.  Convert the high/low
+     elements of the vector using floating point conversion and place
+     the resulting N/2 values of size 2*S in the output vector (operand
+     0).
+
+`vec_widen_umult_hi_M', `vec_widen_umult_lo_M'
+`vec_widen_smult_hi_M', `vec_widen_smult_lo_M'
+     Signed/Unsigned widening multiplication.  The two inputs (operands
+     1 and 2) are vectors with N signed/unsigned elements of size S.
+     Multiply the high/low elements of the two vectors, and put the N/2
+     products of size 2*S in the output vector (operand 0).
+
+`mulhisi3'
+     Multiply operands 1 and 2, which have mode `HImode', and store a
+     `SImode' product in operand 0.
+
+`mulqihi3', `mulsidi3'
+     Similar widening-multiplication instructions of other widths.
+
+`umulqihi3', `umulhisi3', `umulsidi3'
+     Similar widening-multiplication instructions that do unsigned
+     multiplication.
+
+`usmulqihi3', `usmulhisi3', `usmulsidi3'
+     Similar widening-multiplication instructions that interpret the
+     first operand as unsigned and the second operand as signed, then
+     do a signed multiplication.
+
+`smulM3_highpart'
+     Perform a signed multiplication of operands 1 and 2, which have
+     mode M, and store the most significant half of the product in
+     operand 0.  The least significant half of the product is discarded.
+
+`umulM3_highpart'
+     Similar, but the multiplication is unsigned.
+
+`maddMN4'
+     Multiply operands 1 and 2, sign-extend them to mode N, add operand
+     3, and store the result in operand 0.  Operands 1 and 2 have mode
+     M and operands 0 and 3 have mode N.  Both modes must be integer or
+     fixed-point modes and N must be twice the size of M.
+
+     In other words, `maddMN4' is like `mulMN3' except that it also
+     adds operand 3.
+
+     These instructions are not allowed to `FAIL'.
+
+`umaddMN4'
+     Like `maddMN4', but zero-extend the multiplication operands
+     instead of sign-extending them.
+
+`ssmaddMN4'
+     Like `maddMN4', but all involved operations must be
+     signed-saturating.
+
+`usmaddMN4'
+     Like `umaddMN4', but all involved operations must be
+     unsigned-saturating.
+
+`msubMN4'
+     Multiply operands 1 and 2, sign-extend them to mode N, subtract the
+     result from operand 3, and store the result in operand 0.
+     Operands 1 and 2 have mode M and operands 0 and 3 have mode N.
+     Both modes must be integer or fixed-point modes and N must be twice
+     the size of M.
+
+     In other words, `msubMN4' is like `mulMN3' except that it also
+     subtracts the result from operand 3.
+
+     These instructions are not allowed to `FAIL'.
+
+`umsubMN4'
+     Like `msubMN4', but zero-extend the multiplication operands
+     instead of sign-extending them.
+
+`ssmsubMN4'
+     Like `msubMN4', but all involved operations must be
+     signed-saturating.
+
+`usmsubMN4'
+     Like `umsubMN4', but all involved operations must be
+     unsigned-saturating.
+
+`divmodM4'
+     Signed division that produces both a quotient and a remainder.
+     Operand 1 is divided by operand 2 to produce a quotient stored in
+     operand 0 and a remainder stored in operand 3.
+
+     For machines with an instruction that produces both a quotient and
+     a remainder, provide a pattern for `divmodM4' but do not provide
+     patterns for `divM3' and `modM3'.  This allows optimization in the
+     relatively common case when both the quotient and remainder are
+     computed.
+
+     If an instruction that just produces a quotient or just a remainder
+     exists and is more efficient than the instruction that produces
+     both, write the output routine of `divmodM4' to call
+     `find_reg_note' and look for a `REG_UNUSED' note on the quotient
+     or remainder and generate the appropriate instruction.
+
+`udivmodM4'
+     Similar, but does unsigned division.
+
+`ashlM3', `ssashlM3', `usashlM3'
+     Arithmetic-shift operand 1 left by a number of bits specified by
+     operand 2, and store the result in operand 0.  Here M is the mode
+     of operand 0 and operand 1; operand 2's mode is specified by the
+     instruction pattern, and the compiler will convert the operand to
+     that mode before generating the instruction.  The meaning of
+     out-of-range shift counts can optionally be specified by
+     `TARGET_SHIFT_TRUNCATION_MASK'.  *Note
+     TARGET_SHIFT_TRUNCATION_MASK::.  Operand 2 is always a scalar type.
+
+`ashrM3', `lshrM3', `rotlM3', `rotrM3'
+     Other shift and rotate instructions, analogous to the `ashlM3'
+     instructions.  Operand 2 is always a scalar type.
+
+`vashlM3', `vashrM3', `vlshrM3', `vrotlM3', `vrotrM3'
+     Vector shift and rotate instructions that take vectors as operand 2
+     instead of a scalar type.
+
+`negM2', `ssnegM2', `usnegM2'
+     Negate operand 1 and store the result in operand 0.
+
+`absM2'
+     Store the absolute value of operand 1 into operand 0.
+
+`sqrtM2'
+     Store the square root of operand 1 into operand 0.
+
+     The `sqrt' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `sqrtf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`fmodM3'
+     Store the remainder of dividing operand 1 by operand 2 into
+     operand 0, rounded towards zero to an integer.
+
+     The `fmod' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `fmodf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`remainderM3'
+     Store the remainder of dividing operand 1 by operand 2 into
+     operand 0, rounded to the nearest integer.
+
+     The `remainder' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `remainderf'
+     built-in function uses the mode which corresponds to the C data
+     type `float'.
+
+`cosM2'
+     Store the cosine of operand 1 into operand 0.
+
+     The `cos' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `cosf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`sinM2'
+     Store the sine of operand 1 into operand 0.
+
+     The `sin' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `sinf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`expM2'
+     Store the exponential of operand 1 into operand 0.
+
+     The `exp' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `expf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`logM2'
+     Store the natural logarithm of operand 1 into operand 0.
+
+     The `log' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `logf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`powM3'
+     Store the value of operand 1 raised to the exponent operand 2 into
+     operand 0.
+
+     The `pow' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `powf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`atan2M3'
+     Store the arc tangent (inverse tangent) of operand 1 divided by
+     operand 2 into operand 0, using the signs of both arguments to
+     determine the quadrant of the result.
+
+     The `atan2' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `atan2f' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`floorM2'
+     Store the largest integral value not greater than argument.
+
+     The `floor' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `floorf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`btruncM2'
+     Store the argument rounded to integer towards zero.
+
+     The `trunc' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `truncf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`roundM2'
+     Store the argument rounded to integer away from zero.
+
+     The `round' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `roundf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`ceilM2'
+     Store the argument rounded to integer away from zero.
+
+     The `ceil' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `ceilf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`nearbyintM2'
+     Store the argument rounded according to the default rounding mode
+
+     The `nearbyint' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `nearbyintf'
+     built-in function uses the mode which corresponds to the C data
+     type `float'.
+
+`rintM2'
+     Store the argument rounded according to the default rounding mode
+     and raise the inexact exception when the result differs in value
+     from the argument
+
+     The `rint' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `rintf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`lrintMN2'
+     Convert operand 1 (valid for floating point mode M) to fixed point
+     mode N as a signed number according to the current rounding mode
+     and store in operand 0 (which has mode N).
+
+`lroundMN2'
+     Convert operand 1 (valid for floating point mode M) to fixed point
+     mode N as a signed number rounding to nearest and away from zero
+     and store in operand 0 (which has mode N).
+
+`lfloorMN2'
+     Convert operand 1 (valid for floating point mode M) to fixed point
+     mode N as a signed number rounding down and store in operand 0
+     (which has mode N).
+
+`lceilMN2'
+     Convert operand 1 (valid for floating point mode M) to fixed point
+     mode N as a signed number rounding up and store in operand 0
+     (which has mode N).
+
+`copysignM3'
+     Store a value with the magnitude of operand 1 and the sign of
+     operand 2 into operand 0.
+
+     The `copysign' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `copysignf'
+     built-in function uses the mode which corresponds to the C data
+     type `float'.
+
+`ffsM2'
+     Store into operand 0 one plus the index of the least significant
+     1-bit of operand 1.  If operand 1 is zero, store zero.  M is the
+     mode of operand 0; operand 1's mode is specified by the instruction
+     pattern, and the compiler will convert the operand to that mode
+     before generating the instruction.
+
+     The `ffs' built-in function of C always uses the mode which
+     corresponds to the C data type `int'.
+
+`clzM2'
+     Store into operand 0 the number of leading 0-bits in X, starting
+     at the most significant bit position.  If X is 0, the
+     `CLZ_DEFINED_VALUE_AT_ZERO' (*note Misc::) macro defines if the
+     result is undefined or has a useful value.  M is the mode of
+     operand 0; operand 1's mode is specified by the instruction
+     pattern, and the compiler will convert the operand to that mode
+     before generating the instruction.
+
+`ctzM2'
+     Store into operand 0 the number of trailing 0-bits in X, starting
+     at the least significant bit position.  If X is 0, the
+     `CTZ_DEFINED_VALUE_AT_ZERO' (*note Misc::) macro defines if the
+     result is undefined or has a useful value.  M is the mode of
+     operand 0; operand 1's mode is specified by the instruction
+     pattern, and the compiler will convert the operand to that mode
+     before generating the instruction.
+
+`popcountM2'
+     Store into operand 0 the number of 1-bits in X.  M is the mode of
+     operand 0; operand 1's mode is specified by the instruction
+     pattern, and the compiler will convert the operand to that mode
+     before generating the instruction.
+
+`parityM2'
+     Store into operand 0 the parity of X, i.e. the number of 1-bits in
+     X modulo 2.  M is the mode of operand 0; operand 1's mode is
+     specified by the instruction pattern, and the compiler will convert
+     the operand to that mode before generating the instruction.
+
+`one_cmplM2'
+     Store the bitwise-complement of operand 1 into operand 0.
+
+`movmemM'
+     Block move instruction.  The destination and source blocks of
+     memory are the first two operands, and both are `mem:BLK's with an
+     address in mode `Pmode'.
+
+     The number of bytes to move is the third operand, in mode M.
+     Usually, you specify `word_mode' for M.  However, if you can
+     generate better code knowing the range of valid lengths is smaller
+     than those representable in a full word, you should provide a
+     pattern with a mode corresponding to the range of values you can
+     handle efficiently (e.g., `QImode' for values in the range 0-127;
+     note we avoid numbers that appear negative) and also a pattern
+     with `word_mode'.
+
+     The fourth operand is the known shared alignment of the source and
+     destination, in the form of a `const_int' rtx.  Thus, if the
+     compiler knows that both source and destination are word-aligned,
+     it may provide the value 4 for this operand.
+
+     Optional operands 5 and 6 specify expected alignment and size of
+     block respectively.  The expected alignment differs from alignment
+     in operand 4 in a way that the blocks are not required to be
+     aligned according to it in all cases. This expected alignment is
+     also in bytes, just like operand 4.  Expected size, when unknown,
+     is set to `(const_int -1)'.
+
+     Descriptions of multiple `movmemM' patterns can only be beneficial
+     if the patterns for smaller modes have fewer restrictions on their
+     first, second and fourth operands.  Note that the mode M in
+     `movmemM' does not impose any restriction on the mode of
+     individually moved data units in the block.
+
+     These patterns need not give special consideration to the
+     possibility that the source and destination strings might overlap.
+
+`movstr'
+     String copy instruction, with `stpcpy' semantics.  Operand 0 is an
+     output operand in mode `Pmode'.  The addresses of the destination
+     and source strings are operands 1 and 2, and both are `mem:BLK's
+     with addresses in mode `Pmode'.  The execution of the expansion of
+     this pattern should store in operand 0 the address in which the
+     `NUL' terminator was stored in the destination string.
+
+`setmemM'
+     Block set instruction.  The destination string is the first
+     operand, given as a `mem:BLK' whose address is in mode `Pmode'.
+     The number of bytes to set is the second operand, in mode M.  The
+     value to initialize the memory with is the third operand. Targets
+     that only support the clearing of memory should reject any value
+     that is not the constant 0.  See `movmemM' for a discussion of the
+     choice of mode.
+
+     The fourth operand is the known alignment of the destination, in
+     the form of a `const_int' rtx.  Thus, if the compiler knows that
+     the destination is word-aligned, it may provide the value 4 for
+     this operand.
+
+     Optional operands 5 and 6 specify expected alignment and size of
+     block respectively.  The expected alignment differs from alignment
+     in operand 4 in a way that the blocks are not required to be
+     aligned according to it in all cases. This expected alignment is
+     also in bytes, just like operand 4.  Expected size, when unknown,
+     is set to `(const_int -1)'.
+
+     The use for multiple `setmemM' is as for `movmemM'.
+
+`cmpstrnM'
+     String compare instruction, with five operands.  Operand 0 is the
+     output; it has mode M.  The remaining four operands are like the
+     operands of `movmemM'.  The two memory blocks specified are
+     compared byte by byte in lexicographic order starting at the
+     beginning of each string.  The instruction is not allowed to
+     prefetch more than one byte at a time since either string may end
+     in the first byte and reading past that may access an invalid page
+     or segment and cause a fault.  The comparison terminates early if
+     the fetched bytes are different or if they are equal to zero.  The
+     effect of the instruction is to store a value in operand 0 whose
+     sign indicates the result of the comparison.
+
+`cmpstrM'
+     String compare instruction, without known maximum length.  Operand
+     0 is the output; it has mode M.  The second and third operand are
+     the blocks of memory to be compared; both are `mem:BLK' with an
+     address in mode `Pmode'.
+
+     The fourth operand is the known shared alignment of the source and
+     destination, in the form of a `const_int' rtx.  Thus, if the
+     compiler knows that both source and destination are word-aligned,
+     it may provide the value 4 for this operand.
+
+     The two memory blocks specified are compared byte by byte in
+     lexicographic order starting at the beginning of each string.  The
+     instruction is not allowed to prefetch more than one byte at a
+     time since either string may end in the first byte and reading
+     past that may access an invalid page or segment and cause a fault.
+     The comparison will terminate when the fetched bytes are different
+     or if they are equal to zero.  The effect of the instruction is to
+     store a value in operand 0 whose sign indicates the result of the
+     comparison.
+
+`cmpmemM'
+     Block compare instruction, with five operands like the operands of
+     `cmpstrM'.  The two memory blocks specified are compared byte by
+     byte in lexicographic order starting at the beginning of each
+     block.  Unlike `cmpstrM' the instruction can prefetch any bytes in
+     the two memory blocks.  Also unlike `cmpstrM' the comparison will
+     not stop if both bytes are zero.  The effect of the instruction is
+     to store a value in operand 0 whose sign indicates the result of
+     the comparison.
+
+`strlenM'
+     Compute the length of a string, with three operands.  Operand 0 is
+     the result (of mode M), operand 1 is a `mem' referring to the
+     first character of the string, operand 2 is the character to
+     search for (normally zero), and operand 3 is a constant describing
+     the known alignment of the beginning of the string.
+
+`floatMN2'
+     Convert signed integer operand 1 (valid for fixed point mode M) to
+     floating point mode N and store in operand 0 (which has mode N).
+
+`floatunsMN2'
+     Convert unsigned integer operand 1 (valid for fixed point mode M)
+     to floating point mode N and store in operand 0 (which has mode N).
+
+`fixMN2'
+     Convert operand 1 (valid for floating point mode M) to fixed point
+     mode N as a signed number and store in operand 0 (which has mode
+     N).  This instruction's result is defined only when the value of
+     operand 1 is an integer.
+
+     If the machine description defines this pattern, it also needs to
+     define the `ftrunc' pattern.
+
+`fixunsMN2'
+     Convert operand 1 (valid for floating point mode M) to fixed point
+     mode N as an unsigned number and store in operand 0 (which has
+     mode N).  This instruction's result is defined only when the value
+     of operand 1 is an integer.
+
+`ftruncM2'
+     Convert operand 1 (valid for floating point mode M) to an integer
+     value, still represented in floating point mode M, and store it in
+     operand 0 (valid for floating point mode M).
+
+`fix_truncMN2'
+     Like `fixMN2' but works for any floating point value of mode M by
+     converting the value to an integer.
+
+`fixuns_truncMN2'
+     Like `fixunsMN2' but works for any floating point value of mode M
+     by converting the value to an integer.
+
+`truncMN2'
+     Truncate operand 1 (valid for mode M) to mode N and store in
+     operand 0 (which has mode N).  Both modes must be fixed point or
+     both floating point.
+
+`extendMN2'
+     Sign-extend operand 1 (valid for mode M) to mode N and store in
+     operand 0 (which has mode N).  Both modes must be fixed point or
+     both floating point.
+
+`zero_extendMN2'
+     Zero-extend operand 1 (valid for mode M) to mode N and store in
+     operand 0 (which has mode N).  Both modes must be fixed point.
+
+`fractMN2'
+     Convert operand 1 of mode M to mode N and store in operand 0
+     (which has mode N).  Mode M and mode N could be fixed-point to
+     fixed-point, signed integer to fixed-point, fixed-point to signed
+     integer, floating-point to fixed-point, or fixed-point to
+     floating-point.  When overflows or underflows happen, the results
+     are undefined.
+
+`satfractMN2'
+     Convert operand 1 of mode M to mode N and store in operand 0
+     (which has mode N).  Mode M and mode N could be fixed-point to
+     fixed-point, signed integer to fixed-point, or floating-point to
+     fixed-point.  When overflows or underflows happen, the instruction
+     saturates the results to the maximum or the minimum.
+
+`fractunsMN2'
+     Convert operand 1 of mode M to mode N and store in operand 0
+     (which has mode N).  Mode M and mode N could be unsigned integer
+     to fixed-point, or fixed-point to unsigned integer.  When
+     overflows or underflows happen, the results are undefined.
+
+`satfractunsMN2'
+     Convert unsigned integer operand 1 of mode M to fixed-point mode N
+     and store in operand 0 (which has mode N).  When overflows or
+     underflows happen, the instruction saturates the results to the
+     maximum or the minimum.
+
+`extv'
+     Extract a bit-field from operand 1 (a register or memory operand),
+     where operand 2 specifies the width in bits and operand 3 the
+     starting bit, and store it in operand 0.  Operand 0 must have mode
+     `word_mode'.  Operand 1 may have mode `byte_mode' or `word_mode';
+     often `word_mode' is allowed only for registers.  Operands 2 and 3
+     must be valid for `word_mode'.
+
+     The RTL generation pass generates this instruction only with
+     constants for operands 2 and 3 and the constant is never zero for
+     operand 2.
+
+     The bit-field value is sign-extended to a full word integer before
+     it is stored in operand 0.
+
+`extzv'
+     Like `extv' except that the bit-field value is zero-extended.
+
+`insv'
+     Store operand 3 (which must be valid for `word_mode') into a
+     bit-field in operand 0, where operand 1 specifies the width in
+     bits and operand 2 the starting bit.  Operand 0 may have mode
+     `byte_mode' or `word_mode'; often `word_mode' is allowed only for
+     registers.  Operands 1 and 2 must be valid for `word_mode'.
+
+     The RTL generation pass generates this instruction only with
+     constants for operands 1 and 2 and the constant is never zero for
+     operand 1.
+
+`movMODEcc'
+     Conditionally move operand 2 or operand 3 into operand 0 according
+     to the comparison in operand 1.  If the comparison is true,
+     operand 2 is moved into operand 0, otherwise operand 3 is moved.
+
+     The mode of the operands being compared need not be the same as
+     the operands being moved.  Some machines, sparc64 for example,
+     have instructions that conditionally move an integer value based
+     on the floating point condition codes and vice versa.
+
+     If the machine does not have conditional move instructions, do not
+     define these patterns.
+
+`addMODEcc'
+     Similar to `movMODEcc' but for conditional addition.  Conditionally
+     move operand 2 or (operands 2 + operand 3) into operand 0
+     according to the comparison in operand 1.  If the comparison is
+     true, operand 2 is moved into operand 0, otherwise (operand 2 +
+     operand 3) is moved.
+
+`cstoreMODE4'
+     Store zero or nonzero in operand 0 according to whether a
+     comparison is true.  Operand 1 is a comparison operator.  Operand
+     2 and operand 3 are the first and second operand of the
+     comparison, respectively.  You specify the mode that operand 0
+     must have when you write the `match_operand' expression.  The
+     compiler automatically sees which mode you have used and supplies
+     an operand of that mode.
+
+     The value stored for a true condition must have 1 as its low bit,
+     or else must be negative.  Otherwise the instruction is not
+     suitable and you should omit it from the machine description.  You
+     describe to the compiler exactly which value is stored by defining
+     the macro `STORE_FLAG_VALUE' (*note Misc::).  If a description
+     cannot be found that can be used for all the possible comparison
+     operators, you should pick one and use a `define_expand' to map
+     all results onto the one you chose.
+
+     These operations may `FAIL', but should do so only in relatively
+     uncommon cases; if they would `FAIL' for common cases involving
+     integer comparisons, it is best to restrict the predicates to not
+     allow these operands.  Likewise if a given comparison operator will
+     always fail, independent of the operands (for floating-point
+     modes, the `ordered_comparison_operator' predicate is often useful
+     in this case).
+
+     If this pattern is omitted, the compiler will generate a
+     conditional branch--for example, it may copy a constant one to the
+     target and branching around an assignment of zero to the
+     target--or a libcall.  If the predicate for operand 1 only rejects
+     some operators, it will also try reordering the operands and/or
+     inverting the result value (e.g. by an exclusive OR).  These
+     possibilities could be cheaper or equivalent to the instructions
+     used for the `cstoreMODE4' pattern followed by those required to
+     convert a positive result from `STORE_FLAG_VALUE' to 1; in this
+     case, you can and should make operand 1's predicate reject some
+     operators in the `cstoreMODE4' pattern, or remove the pattern
+     altogether from the machine description.
+
+`cbranchMODE4'
+     Conditional branch instruction combined with a compare instruction.
+     Operand 0 is a comparison operator.  Operand 1 and operand 2 are
+     the first and second operands of the comparison, respectively.
+     Operand 3 is a `label_ref' that refers to the label to jump to.
+
+`jump'
+     A jump inside a function; an unconditional branch.  Operand 0 is
+     the `label_ref' of the label to jump to.  This pattern name is
+     mandatory on all machines.
+
+`call'
+     Subroutine call instruction returning no value.  Operand 0 is the
+     function to call; operand 1 is the number of bytes of arguments
+     pushed as a `const_int'; operand 2 is the number of registers used
+     as operands.
+
+     On most machines, operand 2 is not actually stored into the RTL
+     pattern.  It is supplied for the sake of some RISC machines which
+     need to put this information into the assembler code; they can put
+     it in the RTL instead of operand 1.
+
+     Operand 0 should be a `mem' RTX whose address is the address of the
+     function.  Note, however, that this address can be a `symbol_ref'
+     expression even if it would not be a legitimate memory address on
+     the target machine.  If it is also not a valid argument for a call
+     instruction, the pattern for this operation should be a
+     `define_expand' (*note Expander Definitions::) that places the
+     address into a register and uses that register in the call
+     instruction.
+
+`call_value'
+     Subroutine call instruction returning a value.  Operand 0 is the
+     hard register in which the value is returned.  There are three more
+     operands, the same as the three operands of the `call' instruction
+     (but with numbers increased by one).
+
+     Subroutines that return `BLKmode' objects use the `call' insn.
+
+`call_pop', `call_value_pop'
+     Similar to `call' and `call_value', except used if defined and if
+     `RETURN_POPS_ARGS' is nonzero.  They should emit a `parallel' that
+     contains both the function call and a `set' to indicate the
+     adjustment made to the frame pointer.
+
+     For machines where `RETURN_POPS_ARGS' can be nonzero, the use of
+     these patterns increases the number of functions for which the
+     frame pointer can be eliminated, if desired.
+
+`untyped_call'
+     Subroutine call instruction returning a value of any type.
+     Operand 0 is the function to call; operand 1 is a memory location
+     where the result of calling the function is to be stored; operand
+     2 is a `parallel' expression where each element is a `set'
+     expression that indicates the saving of a function return value
+     into the result block.
+
+     This instruction pattern should be defined to support
+     `__builtin_apply' on machines where special instructions are needed
+     to call a subroutine with arbitrary arguments or to save the value
+     returned.  This instruction pattern is required on machines that
+     have multiple registers that can hold a return value (i.e.
+     `FUNCTION_VALUE_REGNO_P' is true for more than one register).
+
+`return'
+     Subroutine return instruction.  This instruction pattern name
+     should be defined only if a single instruction can do all the work
+     of returning from a function.
+
+     Like the `movM' patterns, this pattern is also used after the RTL
+     generation phase.  In this case it is to support machines where
+     multiple instructions are usually needed to return from a
+     function, but some class of functions only requires one
+     instruction to implement a return.  Normally, the applicable
+     functions are those which do not need to save any registers or
+     allocate stack space.
+
+     For such machines, the condition specified in this pattern should
+     only be true when `reload_completed' is nonzero and the function's
+     epilogue would only be a single instruction.  For machines with
+     register windows, the routine `leaf_function_p' may be used to
+     determine if a register window push is required.
+
+     Machines that have conditional return instructions should define
+     patterns such as
+
+          (define_insn ""
+            [(set (pc)
+                  (if_then_else (match_operator
+                                   0 "comparison_operator"
+                                   [(cc0) (const_int 0)])
+                                (return)
+                                (pc)))]
+            "CONDITION"
+            "...")
+
+     where CONDITION would normally be the same condition specified on
+     the named `return' pattern.
+
+`untyped_return'
+     Untyped subroutine return instruction.  This instruction pattern
+     should be defined to support `__builtin_return' on machines where
+     special instructions are needed to return a value of any type.
+
+     Operand 0 is a memory location where the result of calling a
+     function with `__builtin_apply' is stored; operand 1 is a
+     `parallel' expression where each element is a `set' expression
+     that indicates the restoring of a function return value from the
+     result block.
+
+`nop'
+     No-op instruction.  This instruction pattern name should always be
+     defined to output a no-op in assembler code.  `(const_int 0)' will
+     do as an RTL pattern.
+
+`indirect_jump'
+     An instruction to jump to an address which is operand zero.  This
+     pattern name is mandatory on all machines.
+
+`casesi'
+     Instruction to jump through a dispatch table, including bounds
+     checking.  This instruction takes five operands:
+
+       1. The index to dispatch on, which has mode `SImode'.
+
+       2. The lower bound for indices in the table, an integer constant.
+
+       3. The total range of indices in the table--the largest index
+          minus the smallest one (both inclusive).
+
+       4. A label that precedes the table itself.
+
+       5. A label to jump to if the index has a value outside the
+          bounds.
+
+     The table is an `addr_vec' or `addr_diff_vec' inside of a
+     `jump_insn'.  The number of elements in the table is one plus the
+     difference between the upper bound and the lower bound.
+
+`tablejump'
+     Instruction to jump to a variable address.  This is a low-level
+     capability which can be used to implement a dispatch table when
+     there is no `casesi' pattern.
+
+     This pattern requires two operands: the address or offset, and a
+     label which should immediately precede the jump table.  If the
+     macro `CASE_VECTOR_PC_RELATIVE' evaluates to a nonzero value then
+     the first operand is an offset which counts from the address of
+     the table; otherwise, it is an absolute address to jump to.  In
+     either case, the first operand has mode `Pmode'.
+
+     The `tablejump' insn is always the last insn before the jump table
+     it uses.  Its assembler code normally has no need to use the
+     second operand, but you should incorporate it in the RTL pattern so
+     that the jump optimizer will not delete the table as unreachable
+     code.
+
+`decrement_and_branch_until_zero'
+     Conditional branch instruction that decrements a register and
+     jumps if the register is nonzero.  Operand 0 is the register to
+     decrement and test; operand 1 is the label to jump to if the
+     register is nonzero.  *Note Looping Patterns::.
+
+     This optional instruction pattern is only used by the combiner,
+     typically for loops reversed by the loop optimizer when strength
+     reduction is enabled.
+
+`doloop_end'
+     Conditional branch instruction that decrements a register and
+     jumps if the register is nonzero.  This instruction takes five
+     operands: Operand 0 is the register to decrement and test; operand
+     1 is the number of loop iterations as a `const_int' or
+     `const0_rtx' if this cannot be determined until run-time; operand
+     2 is the actual or estimated maximum number of iterations as a
+     `const_int'; operand 3 is the number of enclosed loops as a
+     `const_int' (an innermost loop has a value of 1); operand 4 is the
+     label to jump to if the register is nonzero.  *Note Looping
+     Patterns::.
+
+     This optional instruction pattern should be defined for machines
+     with low-overhead looping instructions as the loop optimizer will
+     try to modify suitable loops to utilize it.  If nested
+     low-overhead looping is not supported, use a `define_expand'
+     (*note Expander Definitions::) and make the pattern fail if
+     operand 3 is not `const1_rtx'.  Similarly, if the actual or
+     estimated maximum number of iterations is too large for this
+     instruction, make it fail.
+
+`doloop_begin'
+     Companion instruction to `doloop_end' required for machines that
+     need to perform some initialization, such as loading special
+     registers used by a low-overhead looping instruction.  If
+     initialization insns do not always need to be emitted, use a
+     `define_expand' (*note Expander Definitions::) and make it fail.
+
+`canonicalize_funcptr_for_compare'
+     Canonicalize the function pointer in operand 1 and store the result
+     into operand 0.
+
+     Operand 0 is always a `reg' and has mode `Pmode'; operand 1 may be
+     a `reg', `mem', `symbol_ref', `const_int', etc and also has mode
+     `Pmode'.
+
+     Canonicalization of a function pointer usually involves computing
+     the address of the function which would be called if the function
+     pointer were used in an indirect call.
+
+     Only define this pattern if function pointers on the target machine
+     can have different values but still call the same function when
+     used in an indirect call.
+
+`save_stack_block'
+`save_stack_function'
+`save_stack_nonlocal'
+`restore_stack_block'
+`restore_stack_function'
+`restore_stack_nonlocal'
+     Most machines save and restore the stack pointer by copying it to
+     or from an object of mode `Pmode'.  Do not define these patterns on
+     such machines.
+
+     Some machines require special handling for stack pointer saves and
+     restores.  On those machines, define the patterns corresponding to
+     the non-standard cases by using a `define_expand' (*note Expander
+     Definitions::) that produces the required insns.  The three types
+     of saves and restores are:
+
+       1. `save_stack_block' saves the stack pointer at the start of a
+          block that allocates a variable-sized object, and
+          `restore_stack_block' restores the stack pointer when the
+          block is exited.
+
+       2. `save_stack_function' and `restore_stack_function' do a
+          similar job for the outermost block of a function and are
+          used when the function allocates variable-sized objects or
+          calls `alloca'.  Only the epilogue uses the restored stack
+          pointer, allowing a simpler save or restore sequence on some
+          machines.
+
+       3. `save_stack_nonlocal' is used in functions that contain labels
+          branched to by nested functions.  It saves the stack pointer
+          in such a way that the inner function can use
+          `restore_stack_nonlocal' to restore the stack pointer.  The
+          compiler generates code to restore the frame and argument
+          pointer registers, but some machines require saving and
+          restoring additional data such as register window information
+          or stack backchains.  Place insns in these patterns to save
+          and restore any such required data.
+
+     When saving the stack pointer, operand 0 is the save area and
+     operand 1 is the stack pointer.  The mode used to allocate the
+     save area defaults to `Pmode' but you can override that choice by
+     defining the `STACK_SAVEAREA_MODE' macro (*note Storage Layout::).
+     You must specify an integral mode, or `VOIDmode' if no save area
+     is needed for a particular type of save (either because no save is
+     needed or because a machine-specific save area can be used).
+     Operand 0 is the stack pointer and operand 1 is the save area for
+     restore operations.  If `save_stack_block' is defined, operand 0
+     must not be `VOIDmode' since these saves can be arbitrarily nested.
+
+     A save area is a `mem' that is at a constant offset from
+     `virtual_stack_vars_rtx' when the stack pointer is saved for use by
+     nonlocal gotos and a `reg' in the other two cases.
+
+`allocate_stack'
+     Subtract (or add if `STACK_GROWS_DOWNWARD' is undefined) operand 1
+     from the stack pointer to create space for dynamically allocated
+     data.
+
+     Store the resultant pointer to this space into operand 0.  If you
+     are allocating space from the main stack, do this by emitting a
+     move insn to copy `virtual_stack_dynamic_rtx' to operand 0.  If
+     you are allocating the space elsewhere, generate code to copy the
+     location of the space to operand 0.  In the latter case, you must
+     ensure this space gets freed when the corresponding space on the
+     main stack is free.
+
+     Do not define this pattern if all that must be done is the
+     subtraction.  Some machines require other operations such as stack
+     probes or maintaining the back chain.  Define this pattern to emit
+     those operations in addition to updating the stack pointer.
+
+`check_stack'
+     If stack checking (*note Stack Checking::) cannot be done on your
+     system by probing the stack, define this pattern to perform the
+     needed check and signal an error if the stack has overflowed.  The
+     single operand is the address in the stack farthest from the
+     current stack pointer that you need to validate.  Normally, on
+     platforms where this pattern is needed, you would obtain the stack
+     limit from a global or thread-specific variable or register.
+
+`probe_stack'
+     If stack checking (*note Stack Checking::) can be done on your
+     system by probing the stack but doing it with a "store zero"
+     instruction is not valid or optimal, define this pattern to do the
+     probing differently and signal an error if the stack has
+     overflowed.  The single operand is the memory reference in the
+     stack that needs to be probed.
+
+`nonlocal_goto'
+     Emit code to generate a non-local goto, e.g., a jump from one
+     function to a label in an outer function.  This pattern has four
+     arguments, each representing a value to be used in the jump.  The
+     first argument is to be loaded into the frame pointer, the second
+     is the address to branch to (code to dispatch to the actual label),
+     the third is the address of a location where the stack is saved,
+     and the last is the address of the label, to be placed in the
+     location for the incoming static chain.
+
+     On most machines you need not define this pattern, since GCC will
+     already generate the correct code, which is to load the frame
+     pointer and static chain, restore the stack (using the
+     `restore_stack_nonlocal' pattern, if defined), and jump indirectly
+     to the dispatcher.  You need only define this pattern if this code
+     will not work on your machine.
+
+`nonlocal_goto_receiver'
+     This pattern, if defined, contains code needed at the target of a
+     nonlocal goto after the code already generated by GCC.  You will
+     not normally need to define this pattern.  A typical reason why
+     you might need this pattern is if some value, such as a pointer to
+     a global table, must be restored when the frame pointer is
+     restored.  Note that a nonlocal goto only occurs within a
+     unit-of-translation, so a global table pointer that is shared by
+     all functions of a given module need not be restored.  There are
+     no arguments.
+
+`exception_receiver'
+     This pattern, if defined, contains code needed at the site of an
+     exception handler that isn't needed at the site of a nonlocal
+     goto.  You will not normally need to define this pattern.  A
+     typical reason why you might need this pattern is if some value,
+     such as a pointer to a global table, must be restored after
+     control flow is branched to the handler of an exception.  There
+     are no arguments.
+
+`builtin_setjmp_setup'
+     This pattern, if defined, contains additional code needed to
+     initialize the `jmp_buf'.  You will not normally need to define
+     this pattern.  A typical reason why you might need this pattern is
+     if some value, such as a pointer to a global table, must be
+     restored.  Though it is preferred that the pointer value be
+     recalculated if possible (given the address of a label for
+     instance).  The single argument is a pointer to the `jmp_buf'.
+     Note that the buffer is five words long and that the first three
+     are normally used by the generic mechanism.
+
+`builtin_setjmp_receiver'
+     This pattern, if defined, contains code needed at the site of a
+     built-in setjmp that isn't needed at the site of a nonlocal goto.
+     You will not normally need to define this pattern.  A typical
+     reason why you might need this pattern is if some value, such as a
+     pointer to a global table, must be restored.  It takes one
+     argument, which is the label to which builtin_longjmp transfered
+     control; this pattern may be emitted at a small offset from that
+     label.
+
+`builtin_longjmp'
+     This pattern, if defined, performs the entire action of the
+     longjmp.  You will not normally need to define this pattern unless
+     you also define `builtin_setjmp_setup'.  The single argument is a
+     pointer to the `jmp_buf'.
+
+`eh_return'
+     This pattern, if defined, affects the way `__builtin_eh_return',
+     and thence the call frame exception handling library routines, are
+     built.  It is intended to handle non-trivial actions needed along
+     the abnormal return path.
+
+     The address of the exception handler to which the function should
+     return is passed as operand to this pattern.  It will normally
+     need to copied by the pattern to some special register or memory
+     location.  If the pattern needs to determine the location of the
+     target call frame in order to do so, it may use
+     `EH_RETURN_STACKADJ_RTX', if defined; it will have already been
+     assigned.
+
+     If this pattern is not defined, the default action will be to
+     simply copy the return address to `EH_RETURN_HANDLER_RTX'.  Either
+     that macro or this pattern needs to be defined if call frame
+     exception handling is to be used.
+
+`prologue'
+     This pattern, if defined, emits RTL for entry to a function.  The
+     function entry is responsible for setting up the stack frame,
+     initializing the frame pointer register, saving callee saved
+     registers, etc.
+
+     Using a prologue pattern is generally preferred over defining
+     `TARGET_ASM_FUNCTION_PROLOGUE' to emit assembly code for the
+     prologue.
+
+     The `prologue' pattern is particularly useful for targets which
+     perform instruction scheduling.
+
+`epilogue'
+     This pattern emits RTL for exit from a function.  The function
+     exit is responsible for deallocating the stack frame, restoring
+     callee saved registers and emitting the return instruction.
+
+     Using an epilogue pattern is generally preferred over defining
+     `TARGET_ASM_FUNCTION_EPILOGUE' to emit assembly code for the
+     epilogue.
+
+     The `epilogue' pattern is particularly useful for targets which
+     perform instruction scheduling or which have delay slots for their
+     return instruction.
+
+`sibcall_epilogue'
+     This pattern, if defined, emits RTL for exit from a function
+     without the final branch back to the calling function.  This
+     pattern will be emitted before any sibling call (aka tail call)
+     sites.
+
+     The `sibcall_epilogue' pattern must not clobber any arguments used
+     for parameter passing or any stack slots for arguments passed to
+     the current function.
+
+`trap'
+     This pattern, if defined, signals an error, typically by causing
+     some kind of signal to be raised.  Among other places, it is used
+     by the Java front end to signal `invalid array index' exceptions.
+
+`ctrapMM4'
+     Conditional trap instruction.  Operand 0 is a piece of RTL which
+     performs a comparison, and operands 1 and 2 are the arms of the
+     comparison.  Operand 3 is the trap code, an integer.
+
+     A typical `ctrap' pattern looks like
+
+          (define_insn "ctrapsi4"
+            [(trap_if (match_operator 0 "trap_operator"
+                       [(match_operand 1 "register_operand")
+                        (match_operand 2 "immediate_operand")])
+                      (match_operand 3 "const_int_operand" "i"))]
+            ""
+            "...")
+
+`prefetch'
+     This pattern, if defined, emits code for a non-faulting data
+     prefetch instruction.  Operand 0 is the address of the memory to
+     prefetch.  Operand 1 is a constant 1 if the prefetch is preparing
+     for a write to the memory address, or a constant 0 otherwise.
+     Operand 2 is the expected degree of temporal locality of the data
+     and is a value between 0 and 3, inclusive; 0 means that the data
+     has no temporal locality, so it need not be left in the cache
+     after the access; 3 means that the data has a high degree of
+     temporal locality and should be left in all levels of cache
+     possible;  1 and 2 mean, respectively, a low or moderate degree of
+     temporal locality.
+
+     Targets that do not support write prefetches or locality hints can
+     ignore the values of operands 1 and 2.
+
+`blockage'
+     This pattern defines a pseudo insn that prevents the instruction
+     scheduler from moving instructions across the boundary defined by
+     the blockage insn.  Normally an UNSPEC_VOLATILE pattern.
+
+`memory_barrier'
+     If the target memory model is not fully synchronous, then this
+     pattern should be defined to an instruction that orders both loads
+     and stores before the instruction with respect to loads and stores
+     after the instruction.  This pattern has no operands.
+
+`sync_compare_and_swapMODE'
+     This pattern, if defined, emits code for an atomic compare-and-swap
+     operation.  Operand 1 is the memory on which the atomic operation
+     is performed.  Operand 2 is the "old" value to be compared against
+     the current contents of the memory location.  Operand 3 is the
+     "new" value to store in the memory if the compare succeeds.
+     Operand 0 is the result of the operation; it should contain the
+     contents of the memory before the operation.  If the compare
+     succeeds, this should obviously be a copy of operand 2.
+
+     This pattern must show that both operand 0 and operand 1 are
+     modified.
+
+     This pattern must issue any memory barrier instructions such that
+     all memory operations before the atomic operation occur before the
+     atomic operation and all memory operations after the atomic
+     operation occur after the atomic operation.
+
+     For targets where the success or failure of the compare-and-swap
+     operation is available via the status flags, it is possible to
+     avoid a separate compare operation and issue the subsequent branch
+     or store-flag operation immediately after the compare-and-swap.
+     To this end, GCC will look for a `MODE_CC' set in the output of
+     `sync_compare_and_swapMODE'; if the machine description includes
+     such a set, the target should also define special `cbranchcc4'
+     and/or `cstorecc4' instructions.  GCC will then be able to take
+     the destination of the `MODE_CC' set and pass it to the
+     `cbranchcc4' or `cstorecc4' pattern as the first operand of the
+     comparison (the second will be `(const_int 0)').
+
+`sync_addMODE', `sync_subMODE'
+`sync_iorMODE', `sync_andMODE'
+`sync_xorMODE', `sync_nandMODE'
+     These patterns emit code for an atomic operation on memory.
+     Operand 0 is the memory on which the atomic operation is performed.
+     Operand 1 is the second operand to the binary operator.
+
+     This pattern must issue any memory barrier instructions such that
+     all memory operations before the atomic operation occur before the
+     atomic operation and all memory operations after the atomic
+     operation occur after the atomic operation.
+
+     If these patterns are not defined, the operation will be
+     constructed from a compare-and-swap operation, if defined.
+
+`sync_old_addMODE', `sync_old_subMODE'
+`sync_old_iorMODE', `sync_old_andMODE'
+`sync_old_xorMODE', `sync_old_nandMODE'
+     These patterns are emit code for an atomic operation on memory,
+     and return the value that the memory contained before the
+     operation.  Operand 0 is the result value, operand 1 is the memory
+     on which the atomic operation is performed, and operand 2 is the
+     second operand to the binary operator.
+
+     This pattern must issue any memory barrier instructions such that
+     all memory operations before the atomic operation occur before the
+     atomic operation and all memory operations after the atomic
+     operation occur after the atomic operation.
+
+     If these patterns are not defined, the operation will be
+     constructed from a compare-and-swap operation, if defined.
+
+`sync_new_addMODE', `sync_new_subMODE'
+`sync_new_iorMODE', `sync_new_andMODE'
+`sync_new_xorMODE', `sync_new_nandMODE'
+     These patterns are like their `sync_old_OP' counterparts, except
+     that they return the value that exists in the memory location
+     after the operation, rather than before the operation.
+
+`sync_lock_test_and_setMODE'
+     This pattern takes two forms, based on the capabilities of the
+     target.  In either case, operand 0 is the result of the operand,
+     operand 1 is the memory on which the atomic operation is
+     performed, and operand 2 is the value to set in the lock.
+
+     In the ideal case, this operation is an atomic exchange operation,
+     in which the previous value in memory operand is copied into the
+     result operand, and the value operand is stored in the memory
+     operand.
+
+     For less capable targets, any value operand that is not the
+     constant 1 should be rejected with `FAIL'.  In this case the
+     target may use an atomic test-and-set bit operation.  The result
+     operand should contain 1 if the bit was previously set and 0 if
+     the bit was previously clear.  The true contents of the memory
+     operand are implementation defined.
+
+     This pattern must issue any memory barrier instructions such that
+     the pattern as a whole acts as an acquire barrier, that is all
+     memory operations after the pattern do not occur until the lock is
+     acquired.
+
+     If this pattern is not defined, the operation will be constructed
+     from a compare-and-swap operation, if defined.
+
+`sync_lock_releaseMODE'
+     This pattern, if defined, releases a lock set by
+     `sync_lock_test_and_setMODE'.  Operand 0 is the memory that
+     contains the lock; operand 1 is the value to store in the lock.
+
+     If the target doesn't implement full semantics for
+     `sync_lock_test_and_setMODE', any value operand which is not the
+     constant 0 should be rejected with `FAIL', and the true contents
+     of the memory operand are implementation defined.
+
+     This pattern must issue any memory barrier instructions such that
+     the pattern as a whole acts as a release barrier, that is the lock
+     is released only after all previous memory operations have
+     completed.
+
+     If this pattern is not defined, then a `memory_barrier' pattern
+     will be emitted, followed by a store of the value to the memory
+     operand.
+
+`stack_protect_set'
+     This pattern, if defined, moves a `ptr_mode' value from the memory
+     in operand 1 to the memory in operand 0 without leaving the value
+     in a register afterward.  This is to avoid leaking the value some
+     place that an attacker might use to rewrite the stack guard slot
+     after having clobbered it.
+
+     If this pattern is not defined, then a plain move pattern is
+     generated.
+
+`stack_protect_test'
+     This pattern, if defined, compares a `ptr_mode' value from the
+     memory in operand 1 with the memory in operand 0 without leaving
+     the value in a register afterward and branches to operand 2 if the
+     values weren't equal.
+
+     If this pattern is not defined, then a plain compare pattern and
+     conditional branch pattern is used.
+
+`clear_cache'
+     This pattern, if defined, flushes the instruction cache for a
+     region of memory.  The region is bounded to by the Pmode pointers
+     in operand 0 inclusive and operand 1 exclusive.
+
+     If this pattern is not defined, a call to the library function
+     `__clear_cache' is used.
+
+
+
+File: gccint.info,  Node: Pattern Ordering,  Next: Dependent Patterns,  Prev: Standard Names,  Up: Machine Desc
+
+16.10 When the Order of Patterns Matters
+========================================
+
+Sometimes an insn can match more than one instruction pattern.  Then the
+pattern that appears first in the machine description is the one used.
+Therefore, more specific patterns (patterns that will match fewer
+things) and faster instructions (those that will produce better code
+when they do match) should usually go first in the description.
+
+ In some cases the effect of ordering the patterns can be used to hide
+a pattern when it is not valid.  For example, the 68000 has an
+instruction for converting a fullword to floating point and another for
+converting a byte to floating point.  An instruction converting an
+integer to floating point could match either one.  We put the pattern
+to convert the fullword first to make sure that one will be used rather
+than the other.  (Otherwise a large integer might be generated as a
+single-byte immediate quantity, which would not work.)  Instead of
+using this pattern ordering it would be possible to make the pattern
+for convert-a-byte smart enough to deal properly with any constant
+value.
+
+
+File: gccint.info,  Node: Dependent Patterns,  Next: Jump Patterns,  Prev: Pattern Ordering,  Up: Machine Desc
+
+16.11 Interdependence of Patterns
+=================================
+
+In some cases machines support instructions identical except for the
+machine mode of one or more operands.  For example, there may be
+"sign-extend halfword" and "sign-extend byte" instructions whose
+patterns are
+
+     (set (match_operand:SI 0 ...)
+          (extend:SI (match_operand:HI 1 ...)))
+
+     (set (match_operand:SI 0 ...)
+          (extend:SI (match_operand:QI 1 ...)))
+
+Constant integers do not specify a machine mode, so an instruction to
+extend a constant value could match either pattern.  The pattern it
+actually will match is the one that appears first in the file.  For
+correct results, this must be the one for the widest possible mode
+(`HImode', here).  If the pattern matches the `QImode' instruction, the
+results will be incorrect if the constant value does not actually fit
+that mode.
+
+ Such instructions to extend constants are rarely generated because
+they are optimized away, but they do occasionally happen in nonoptimized
+compilations.
+
+ If a constraint in a pattern allows a constant, the reload pass may
+replace a register with a constant permitted by the constraint in some
+cases.  Similarly for memory references.  Because of this substitution,
+you should not provide separate patterns for increment and decrement
+instructions.  Instead, they should be generated from the same pattern
+that supports register-register add insns by examining the operands and
+generating the appropriate machine instruction.
+
+
+File: gccint.info,  Node: Jump Patterns,  Next: Looping Patterns,  Prev: Dependent Patterns,  Up: Machine Desc
+
+16.12 Defining Jump Instruction Patterns
+========================================
+
+GCC does not assume anything about how the machine realizes jumps.  The
+machine description should define a single pattern, usually a
+`define_expand', which expands to all the required insns.
+
+ Usually, this would be a comparison insn to set the condition code and
+a separate branch insn testing the condition code and branching or not
+according to its value.  For many machines, however, separating
+compares and branches is limiting, which is why the more flexible
+approach with one `define_expand' is used in GCC.  The machine
+description becomes clearer for architectures that have
+compare-and-branch instructions but no condition code.  It also works
+better when different sets of comparison operators are supported by
+different kinds of conditional branches (e.g. integer vs.
+floating-point), or by conditional branches with respect to conditional
+stores.
+
+ Two separate insns are always used if the machine description
+represents a condition code register using the legacy RTL expression
+`(cc0)', and on most machines that use a separate condition code
+register (*note Condition Code::).  For machines that use `(cc0)', in
+fact, the set and use of the condition code must be separate and
+adjacent(1), thus allowing flags in `cc_status' to be used (*note
+Condition Code::) and so that the comparison and branch insns could be
+located from each other by using the functions `prev_cc0_setter' and
+`next_cc0_user'.
+
+ Even in this case having a single entry point for conditional branches
+is advantageous, because it handles equally well the case where a single
+comparison instruction records the results of both signed and unsigned
+comparison of the given operands (with the branch insns coming in
+distinct signed and unsigned flavors) as in the x86 or SPARC, and the
+case where there are distinct signed and unsigned compare instructions
+and only one set of conditional branch instructions as in the PowerPC.
+
+ ---------- Footnotes ----------
+
+ (1) `note' insns can separate them, though.
+
+
+File: gccint.info,  Node: Looping Patterns,  Next: Insn Canonicalizations,  Prev: Jump Patterns,  Up: Machine Desc
+
+16.13 Defining Looping Instruction Patterns
+===========================================
+
+Some machines have special jump instructions that can be utilized to
+make loops more efficient.  A common example is the 68000 `dbra'
+instruction which performs a decrement of a register and a branch if the
+result was greater than zero.  Other machines, in particular digital
+signal processors (DSPs), have special block repeat instructions to
+provide low-overhead loop support.  For example, the TI TMS320C3x/C4x
+DSPs have a block repeat instruction that loads special registers to
+mark the top and end of a loop and to count the number of loop
+iterations.  This avoids the need for fetching and executing a
+`dbra'-like instruction and avoids pipeline stalls associated with the
+jump.
+
+ GCC has three special named patterns to support low overhead looping.
+They are `decrement_and_branch_until_zero', `doloop_begin', and
+`doloop_end'.  The first pattern, `decrement_and_branch_until_zero', is
+not emitted during RTL generation but may be emitted during the
+instruction combination phase.  This requires the assistance of the
+loop optimizer, using information collected during strength reduction,
+to reverse a loop to count down to zero.  Some targets also require the
+loop optimizer to add a `REG_NONNEG' note to indicate that the
+iteration count is always positive.  This is needed if the target
+performs a signed loop termination test.  For example, the 68000 uses a
+pattern similar to the following for its `dbra' instruction:
+
+     (define_insn "decrement_and_branch_until_zero"
+       [(set (pc)
+             (if_then_else
+               (ge (plus:SI (match_operand:SI 0 "general_operand" "+d*am")
+                            (const_int -1))
+                   (const_int 0))
+               (label_ref (match_operand 1 "" ""))
+               (pc)))
+        (set (match_dup 0)
+             (plus:SI (match_dup 0)
+                      (const_int -1)))]
+       "find_reg_note (insn, REG_NONNEG, 0)"
+       "...")
+
+ Note that since the insn is both a jump insn and has an output, it must
+deal with its own reloads, hence the `m' constraints.  Also note that
+since this insn is generated by the instruction combination phase
+combining two sequential insns together into an implicit parallel insn,
+the iteration counter needs to be biased by the same amount as the
+decrement operation, in this case -1.  Note that the following similar
+pattern will not be matched by the combiner.
+
+     (define_insn "decrement_and_branch_until_zero"
+       [(set (pc)
+             (if_then_else
+               (ge (match_operand:SI 0 "general_operand" "+d*am")
+                   (const_int 1))
+               (label_ref (match_operand 1 "" ""))
+               (pc)))
+        (set (match_dup 0)
+             (plus:SI (match_dup 0)
+                      (const_int -1)))]
+       "find_reg_note (insn, REG_NONNEG, 0)"
+       "...")
+
+ The other two special looping patterns, `doloop_begin' and
+`doloop_end', are emitted by the loop optimizer for certain
+well-behaved loops with a finite number of loop iterations using
+information collected during strength reduction.
+
+ The `doloop_end' pattern describes the actual looping instruction (or
+the implicit looping operation) and the `doloop_begin' pattern is an
+optional companion pattern that can be used for initialization needed
+for some low-overhead looping instructions.
+
+ Note that some machines require the actual looping instruction to be
+emitted at the top of the loop (e.g., the TMS320C3x/C4x DSPs).  Emitting
+the true RTL for a looping instruction at the top of the loop can cause
+problems with flow analysis.  So instead, a dummy `doloop' insn is
+emitted at the end of the loop.  The machine dependent reorg pass checks
+for the presence of this `doloop' insn and then searches back to the
+top of the loop, where it inserts the true looping insn (provided there
+are no instructions in the loop which would cause problems).  Any
+additional labels can be emitted at this point.  In addition, if the
+desired special iteration counter register was not allocated, this
+machine dependent reorg pass could emit a traditional compare and jump
+instruction pair.
+
+ The essential difference between the `decrement_and_branch_until_zero'
+and the `doloop_end' patterns is that the loop optimizer allocates an
+additional pseudo register for the latter as an iteration counter.
+This pseudo register cannot be used within the loop (i.e., general
+induction variables cannot be derived from it), however, in many cases
+the loop induction variable may become redundant and removed by the
+flow pass.
+
+
+File: gccint.info,  Node: Insn Canonicalizations,  Next: Expander Definitions,  Prev: Looping Patterns,  Up: Machine Desc
+
+16.14 Canonicalization of Instructions
+======================================
+
+There are often cases where multiple RTL expressions could represent an
+operation performed by a single machine instruction.  This situation is
+most commonly encountered with logical, branch, and multiply-accumulate
+instructions.  In such cases, the compiler attempts to convert these
+multiple RTL expressions into a single canonical form to reduce the
+number of insn patterns required.
+
+ In addition to algebraic simplifications, following canonicalizations
+are performed:
+
+   * For commutative and comparison operators, a constant is always
+     made the second operand.  If a machine only supports a constant as
+     the second operand, only patterns that match a constant in the
+     second operand need be supplied.
+
+   * For associative operators, a sequence of operators will always
+     chain to the left; for instance, only the left operand of an
+     integer `plus' can itself be a `plus'.  `and', `ior', `xor',
+     `plus', `mult', `smin', `smax', `umin', and `umax' are associative
+     when applied to integers, and sometimes to floating-point.
+
+   * For these operators, if only one operand is a `neg', `not',
+     `mult', `plus', or `minus' expression, it will be the first
+     operand.
+
+   * In combinations of `neg', `mult', `plus', and `minus', the `neg'
+     operations (if any) will be moved inside the operations as far as
+     possible.  For instance, `(neg (mult A B))' is canonicalized as
+     `(mult (neg A) B)', but `(plus (mult (neg B) C) A)' is
+     canonicalized as `(minus A (mult B C))'.
+
+   * For the `compare' operator, a constant is always the second operand
+     if the first argument is a condition code register or `(cc0)'.
+
+   * An operand of `neg', `not', `mult', `plus', or `minus' is made the
+     first operand under the same conditions as above.
+
+   * `(ltu (plus A B) B)' is converted to `(ltu (plus A B) A)'.
+     Likewise with `geu' instead of `ltu'.
+
+   * `(minus X (const_int N))' is converted to `(plus X (const_int
+     -N))'.
+
+   * Within address computations (i.e., inside `mem'), a left shift is
+     converted into the appropriate multiplication by a power of two.
+
+   * De Morgan's Law is used to move bitwise negation inside a bitwise
+     logical-and or logical-or operation.  If this results in only one
+     operand being a `not' expression, it will be the first one.
+
+     A machine that has an instruction that performs a bitwise
+     logical-and of one operand with the bitwise negation of the other
+     should specify the pattern for that instruction as
+
+          (define_insn ""
+            [(set (match_operand:M 0 ...)
+                  (and:M (not:M (match_operand:M 1 ...))
+                               (match_operand:M 2 ...)))]
+            "..."
+            "...")
+
+     Similarly, a pattern for a "NAND" instruction should be written
+
+          (define_insn ""
+            [(set (match_operand:M 0 ...)
+                  (ior:M (not:M (match_operand:M 1 ...))
+                               (not:M (match_operand:M 2 ...))))]
+            "..."
+            "...")
+
+     In both cases, it is not necessary to include patterns for the many
+     logically equivalent RTL expressions.
+
+   * The only possible RTL expressions involving both bitwise
+     exclusive-or and bitwise negation are `(xor:M X Y)' and `(not:M
+     (xor:M X Y))'.
+
+   * The sum of three items, one of which is a constant, will only
+     appear in the form
+
+          (plus:M (plus:M X Y) CONSTANT)
+
+   * Equality comparisons of a group of bits (usually a single bit)
+     with zero will be written using `zero_extract' rather than the
+     equivalent `and' or `sign_extract' operations.
+
+
+ Further canonicalization rules are defined in the function
+`commutative_operand_precedence' in `gcc/rtlanal.c'.
+
+
+File: gccint.info,  Node: Expander Definitions,  Next: Insn Splitting,  Prev: Insn Canonicalizations,  Up: Machine Desc
+
+16.15 Defining RTL Sequences for Code Generation
+================================================
+
+On some target machines, some standard pattern names for RTL generation
+cannot be handled with single insn, but a sequence of RTL insns can
+represent them.  For these target machines, you can write a
+`define_expand' to specify how to generate the sequence of RTL.
+
+ A `define_expand' is an RTL expression that looks almost like a
+`define_insn'; but, unlike the latter, a `define_expand' is used only
+for RTL generation and it can produce more than one RTL insn.
+
+ A `define_expand' RTX has four operands:
+
+   * The name.  Each `define_expand' must have a name, since the only
+     use for it is to refer to it by name.
+
+   * The RTL template.  This is a vector of RTL expressions representing
+     a sequence of separate instructions.  Unlike `define_insn', there
+     is no implicit surrounding `PARALLEL'.
+
+   * The condition, a string containing a C expression.  This
+     expression is used to express how the availability of this pattern
+     depends on subclasses of target machine, selected by command-line
+     options when GCC is run.  This is just like the condition of a
+     `define_insn' that has a standard name.  Therefore, the condition
+     (if present) may not depend on the data in the insn being matched,
+     but only the target-machine-type flags.  The compiler needs to
+     test these conditions during initialization in order to learn
+     exactly which named instructions are available in a particular run.
+
+   * The preparation statements, a string containing zero or more C
+     statements which are to be executed before RTL code is generated
+     from the RTL template.
+
+     Usually these statements prepare temporary registers for use as
+     internal operands in the RTL template, but they can also generate
+     RTL insns directly by calling routines such as `emit_insn', etc.
+     Any such insns precede the ones that come from the RTL template.
+
+ Every RTL insn emitted by a `define_expand' must match some
+`define_insn' in the machine description.  Otherwise, the compiler will
+crash when trying to generate code for the insn or trying to optimize
+it.
+
+ The RTL template, in addition to controlling generation of RTL insns,
+also describes the operands that need to be specified when this pattern
+is used.  In particular, it gives a predicate for each operand.
+
+ A true operand, which needs to be specified in order to generate RTL
+from the pattern, should be described with a `match_operand' in its
+first occurrence in the RTL template.  This enters information on the
+operand's predicate into the tables that record such things.  GCC uses
+the information to preload the operand into a register if that is
+required for valid RTL code.  If the operand is referred to more than
+once, subsequent references should use `match_dup'.
+
+ The RTL template may also refer to internal "operands" which are
+temporary registers or labels used only within the sequence made by the
+`define_expand'.  Internal operands are substituted into the RTL
+template with `match_dup', never with `match_operand'.  The values of
+the internal operands are not passed in as arguments by the compiler
+when it requests use of this pattern.  Instead, they are computed
+within the pattern, in the preparation statements.  These statements
+compute the values and store them into the appropriate elements of
+`operands' so that `match_dup' can find them.
+
+ There are two special macros defined for use in the preparation
+statements: `DONE' and `FAIL'.  Use them with a following semicolon, as
+a statement.
+
+`DONE'
+     Use the `DONE' macro to end RTL generation for the pattern.  The
+     only RTL insns resulting from the pattern on this occasion will be
+     those already emitted by explicit calls to `emit_insn' within the
+     preparation statements; the RTL template will not be generated.
+
+`FAIL'
+     Make the pattern fail on this occasion.  When a pattern fails, it
+     means that the pattern was not truly available.  The calling
+     routines in the compiler will try other strategies for code
+     generation using other patterns.
+
+     Failure is currently supported only for binary (addition,
+     multiplication, shifting, etc.) and bit-field (`extv', `extzv',
+     and `insv') operations.
+
+ If the preparation falls through (invokes neither `DONE' nor `FAIL'),
+then the `define_expand' acts like a `define_insn' in that the RTL
+template is used to generate the insn.
+
+ The RTL template is not used for matching, only for generating the
+initial insn list.  If the preparation statement always invokes `DONE'
+or `FAIL', the RTL template may be reduced to a simple list of
+operands, such as this example:
+
+     (define_expand "addsi3"
+       [(match_operand:SI 0 "register_operand" "")
+        (match_operand:SI 1 "register_operand" "")
+        (match_operand:SI 2 "register_operand" "")]
+       ""
+       "
+     {
+       handle_add (operands[0], operands[1], operands[2]);
+       DONE;
+     }")
+
+ Here is an example, the definition of left-shift for the SPUR chip:
+
+     (define_expand "ashlsi3"
+       [(set (match_operand:SI 0 "register_operand" "")
+             (ashift:SI
+               (match_operand:SI 1 "register_operand" "")
+               (match_operand:SI 2 "nonmemory_operand" "")))]
+       ""
+       "
+
+     {
+       if (GET_CODE (operands[2]) != CONST_INT
+           || (unsigned) INTVAL (operands[2]) > 3)
+         FAIL;
+     }")
+
+This example uses `define_expand' so that it can generate an RTL insn
+for shifting when the shift-count is in the supported range of 0 to 3
+but fail in other cases where machine insns aren't available.  When it
+fails, the compiler tries another strategy using different patterns
+(such as, a library call).
+
+ If the compiler were able to handle nontrivial condition-strings in
+patterns with names, then it would be possible to use a `define_insn'
+in that case.  Here is another case (zero-extension on the 68000) which
+makes more use of the power of `define_expand':
+
+     (define_expand "zero_extendhisi2"
+       [(set (match_operand:SI 0 "general_operand" "")
+             (const_int 0))
+        (set (strict_low_part
+               (subreg:HI
+                 (match_dup 0)
+                 0))
+             (match_operand:HI 1 "general_operand" ""))]
+       ""
+       "operands[1] = make_safe_from (operands[1], operands[0]);")
+
+Here two RTL insns are generated, one to clear the entire output operand
+and the other to copy the input operand into its low half.  This
+sequence is incorrect if the input operand refers to [the old value of]
+the output operand, so the preparation statement makes sure this isn't
+so.  The function `make_safe_from' copies the `operands[1]' into a
+temporary register if it refers to `operands[0]'.  It does this by
+emitting another RTL insn.
+
+ Finally, a third example shows the use of an internal operand.
+Zero-extension on the SPUR chip is done by `and'-ing the result against
+a halfword mask.  But this mask cannot be represented by a `const_int'
+because the constant value is too large to be legitimate on this
+machine.  So it must be copied into a register with `force_reg' and
+then the register used in the `and'.
+
+     (define_expand "zero_extendhisi2"
+       [(set (match_operand:SI 0 "register_operand" "")
+             (and:SI (subreg:SI
+                       (match_operand:HI 1 "register_operand" "")
+                       0)
+                     (match_dup 2)))]
+       ""
+       "operands[2]
+          = force_reg (SImode, GEN_INT (65535)); ")
+
+ _Note:_ If the `define_expand' is used to serve a standard binary or
+unary arithmetic operation or a bit-field operation, then the last insn
+it generates must not be a `code_label', `barrier' or `note'.  It must
+be an `insn', `jump_insn' or `call_insn'.  If you don't need a real insn
+at the end, emit an insn to copy the result of the operation into
+itself.  Such an insn will generate no code, but it can avoid problems
+in the compiler.
+
+
+File: gccint.info,  Node: Insn Splitting,  Next: Including Patterns,  Prev: Expander Definitions,  Up: Machine Desc
+
+16.16 Defining How to Split Instructions
+========================================
+
+There are two cases where you should specify how to split a pattern
+into multiple insns.  On machines that have instructions requiring
+delay slots (*note Delay Slots::) or that have instructions whose
+output is not available for multiple cycles (*note Processor pipeline
+description::), the compiler phases that optimize these cases need to
+be able to move insns into one-instruction delay slots.  However, some
+insns may generate more than one machine instruction.  These insns
+cannot be placed into a delay slot.
+
+ Often you can rewrite the single insn as a list of individual insns,
+each corresponding to one machine instruction.  The disadvantage of
+doing so is that it will cause the compilation to be slower and require
+more space.  If the resulting insns are too complex, it may also
+suppress some optimizations.  The compiler splits the insn if there is a
+reason to believe that it might improve instruction or delay slot
+scheduling.
+
+ The insn combiner phase also splits putative insns.  If three insns are
+merged into one insn with a complex expression that cannot be matched by
+some `define_insn' pattern, the combiner phase attempts to split the
+complex pattern into two insns that are recognized.  Usually it can
+break the complex pattern into two patterns by splitting out some
+subexpression.  However, in some other cases, such as performing an
+addition of a large constant in two insns on a RISC machine, the way to
+split the addition into two insns is machine-dependent.
+
+ The `define_split' definition tells the compiler how to split a
+complex insn into several simpler insns.  It looks like this:
+
+     (define_split
+       [INSN-PATTERN]
+       "CONDITION"
+       [NEW-INSN-PATTERN-1
+        NEW-INSN-PATTERN-2
+        ...]
+       "PREPARATION-STATEMENTS")
+
+ INSN-PATTERN is a pattern that needs to be split and CONDITION is the
+final condition to be tested, as in a `define_insn'.  When an insn
+matching INSN-PATTERN and satisfying CONDITION is found, it is replaced
+in the insn list with the insns given by NEW-INSN-PATTERN-1,
+NEW-INSN-PATTERN-2, etc.
+
+ The PREPARATION-STATEMENTS are similar to those statements that are
+specified for `define_expand' (*note Expander Definitions::) and are
+executed before the new RTL is generated to prepare for the generated
+code or emit some insns whose pattern is not fixed.  Unlike those in
+`define_expand', however, these statements must not generate any new
+pseudo-registers.  Once reload has completed, they also must not
+allocate any space in the stack frame.
+
+ Patterns are matched against INSN-PATTERN in two different
+circumstances.  If an insn needs to be split for delay slot scheduling
+or insn scheduling, the insn is already known to be valid, which means
+that it must have been matched by some `define_insn' and, if
+`reload_completed' is nonzero, is known to satisfy the constraints of
+that `define_insn'.  In that case, the new insn patterns must also be
+insns that are matched by some `define_insn' and, if `reload_completed'
+is nonzero, must also satisfy the constraints of those definitions.
+
+ As an example of this usage of `define_split', consider the following
+example from `a29k.md', which splits a `sign_extend' from `HImode' to
+`SImode' into a pair of shift insns:
+
+     (define_split
+       [(set (match_operand:SI 0 "gen_reg_operand" "")
+             (sign_extend:SI (match_operand:HI 1 "gen_reg_operand" "")))]
+       ""
+       [(set (match_dup 0)
+             (ashift:SI (match_dup 1)
+                        (const_int 16)))
+        (set (match_dup 0)
+             (ashiftrt:SI (match_dup 0)
+                          (const_int 16)))]
+       "
+     { operands[1] = gen_lowpart (SImode, operands[1]); }")
+
+ When the combiner phase tries to split an insn pattern, it is always
+the case that the pattern is _not_ matched by any `define_insn'.  The
+combiner pass first tries to split a single `set' expression and then
+the same `set' expression inside a `parallel', but followed by a
+`clobber' of a pseudo-reg to use as a scratch register.  In these
+cases, the combiner expects exactly two new insn patterns to be
+generated.  It will verify that these patterns match some `define_insn'
+definitions, so you need not do this test in the `define_split' (of
+course, there is no point in writing a `define_split' that will never
+produce insns that match).
+
+ Here is an example of this use of `define_split', taken from
+`rs6000.md':
+
+     (define_split
+       [(set (match_operand:SI 0 "gen_reg_operand" "")
+             (plus:SI (match_operand:SI 1 "gen_reg_operand" "")
+                      (match_operand:SI 2 "non_add_cint_operand" "")))]
+       ""
+       [(set (match_dup 0) (plus:SI (match_dup 1) (match_dup 3)))
+        (set (match_dup 0) (plus:SI (match_dup 0) (match_dup 4)))]
+     "
+     {
+       int low = INTVAL (operands[2]) & 0xffff;
+       int high = (unsigned) INTVAL (operands[2]) >> 16;
+
+       if (low & 0x8000)
+         high++, low |= 0xffff0000;
+
+       operands[3] = GEN_INT (high << 16);
+       operands[4] = GEN_INT (low);
+     }")
+
+ Here the predicate `non_add_cint_operand' matches any `const_int' that
+is _not_ a valid operand of a single add insn.  The add with the
+smaller displacement is written so that it can be substituted into the
+address of a subsequent operation.
+
+ An example that uses a scratch register, from the same file, generates
+an equality comparison of a register and a large constant:
+
+     (define_split
+       [(set (match_operand:CC 0 "cc_reg_operand" "")
+             (compare:CC (match_operand:SI 1 "gen_reg_operand" "")
+                         (match_operand:SI 2 "non_short_cint_operand" "")))
+        (clobber (match_operand:SI 3 "gen_reg_operand" ""))]
+       "find_single_use (operands[0], insn, 0)
+        && (GET_CODE (*find_single_use (operands[0], insn, 0)) == EQ
+            || GET_CODE (*find_single_use (operands[0], insn, 0)) == NE)"
+       [(set (match_dup 3) (xor:SI (match_dup 1) (match_dup 4)))
+        (set (match_dup 0) (compare:CC (match_dup 3) (match_dup 5)))]
+       "
+     {
+       /* Get the constant we are comparing against, C, and see what it
+          looks like sign-extended to 16 bits.  Then see what constant
+          could be XOR'ed with C to get the sign-extended value.  */
+
+       int c = INTVAL (operands[2]);
+       int sextc = (c << 16) >> 16;
+       int xorv = c ^ sextc;
+
+       operands[4] = GEN_INT (xorv);
+       operands[5] = GEN_INT (sextc);
+     }")
+
+ To avoid confusion, don't write a single `define_split' that accepts
+some insns that match some `define_insn' as well as some insns that
+don't.  Instead, write two separate `define_split' definitions, one for
+the insns that are valid and one for the insns that are not valid.
+
+ The splitter is allowed to split jump instructions into sequence of
+jumps or create new jumps in while splitting non-jump instructions.  As
+the central flowgraph and branch prediction information needs to be
+updated, several restriction apply.
+
+ Splitting of jump instruction into sequence that over by another jump
+instruction is always valid, as compiler expect identical behavior of
+new jump.  When new sequence contains multiple jump instructions or new
+labels, more assistance is needed.  Splitter is required to create only
+unconditional jumps, or simple conditional jump instructions.
+Additionally it must attach a `REG_BR_PROB' note to each conditional
+jump.  A global variable `split_branch_probability' holds the
+probability of the original branch in case it was a simple conditional
+jump, -1 otherwise.  To simplify recomputing of edge frequencies, the
+new sequence is required to have only forward jumps to the newly
+created labels.
+
+ For the common case where the pattern of a define_split exactly
+matches the pattern of a define_insn, use `define_insn_and_split'.  It
+looks like this:
+
+     (define_insn_and_split
+       [INSN-PATTERN]
+       "CONDITION"
+       "OUTPUT-TEMPLATE"
+       "SPLIT-CONDITION"
+       [NEW-INSN-PATTERN-1
+        NEW-INSN-PATTERN-2
+        ...]
+       "PREPARATION-STATEMENTS"
+       [INSN-ATTRIBUTES])
+
+ INSN-PATTERN, CONDITION, OUTPUT-TEMPLATE, and INSN-ATTRIBUTES are used
+as in `define_insn'.  The NEW-INSN-PATTERN vector and the
+PREPARATION-STATEMENTS are used as in a `define_split'.  The
+SPLIT-CONDITION is also used as in `define_split', with the additional
+behavior that if the condition starts with `&&', the condition used for
+the split will be the constructed as a logical "and" of the split
+condition with the insn condition.  For example, from i386.md:
+
+     (define_insn_and_split "zero_extendhisi2_and"
+       [(set (match_operand:SI 0 "register_operand" "=r")
+          (zero_extend:SI (match_operand:HI 1 "register_operand" "0")))
+        (clobber (reg:CC 17))]
+       "TARGET_ZERO_EXTEND_WITH_AND && !optimize_size"
+       "#"
+       "&& reload_completed"
+       [(parallel [(set (match_dup 0)
+                        (and:SI (match_dup 0) (const_int 65535)))
+                   (clobber (reg:CC 17))])]
+       ""
+       [(set_attr "type" "alu1")])
+
+ In this case, the actual split condition will be
+`TARGET_ZERO_EXTEND_WITH_AND && !optimize_size && reload_completed'.
+
+ The `define_insn_and_split' construction provides exactly the same
+functionality as two separate `define_insn' and `define_split'
+patterns.  It exists for compactness, and as a maintenance tool to
+prevent having to ensure the two patterns' templates match.
+
+
+File: gccint.info,  Node: Including Patterns,  Next: Peephole Definitions,  Prev: Insn Splitting,  Up: Machine Desc
+
+16.17 Including Patterns in Machine Descriptions.
+=================================================
+
+The `include' pattern tells the compiler tools where to look for
+patterns that are in files other than in the file `.md'.  This is used
+only at build time and there is no preprocessing allowed.
+
+ It looks like:
+
+
+     (include
+       PATHNAME)
+
+ For example:
+
+
+     (include "filestuff")
+
+ Where PATHNAME is a string that specifies the location of the file,
+specifies the include file to be in `gcc/config/target/filestuff'.  The
+directory `gcc/config/target' is regarded as the default directory.
+
+ Machine descriptions may be split up into smaller more manageable
+subsections and placed into subdirectories.
+
+ By specifying:
+
+
+     (include "BOGUS/filestuff")
+
+ the include file is specified to be in
+`gcc/config/TARGET/BOGUS/filestuff'.
+
+ Specifying an absolute path for the include file such as;
+
+     (include "/u2/BOGUS/filestuff")
+ is permitted but is not encouraged.
+
+16.17.1 RTL Generation Tool Options for Directory Search
+--------------------------------------------------------
+
+The `-IDIR' option specifies directories to search for machine
+descriptions.  For example:
+
+
+     genrecog -I/p1/abc/proc1 -I/p2/abcd/pro2 target.md
+
+ Add the directory DIR to the head of the list of directories to be
+searched for header files.  This can be used to override a system
+machine definition file, substituting your own version, since these
+directories are searched before the default machine description file
+directories.  If you use more than one `-I' option, the directories are
+scanned in left-to-right order; the standard default directory come
+after.
+
+
+File: gccint.info,  Node: Peephole Definitions,  Next: Insn Attributes,  Prev: Including Patterns,  Up: Machine Desc
+
+16.18 Machine-Specific Peephole Optimizers
+==========================================
+
+In addition to instruction patterns the `md' file may contain
+definitions of machine-specific peephole optimizations.
+
+ The combiner does not notice certain peephole optimizations when the
+data flow in the program does not suggest that it should try them.  For
+example, sometimes two consecutive insns related in purpose can be
+combined even though the second one does not appear to use a register
+computed in the first one.  A machine-specific peephole optimizer can
+detect such opportunities.
+
+ There are two forms of peephole definitions that may be used.  The
+original `define_peephole' is run at assembly output time to match
+insns and substitute assembly text.  Use of `define_peephole' is
+deprecated.
+
+ A newer `define_peephole2' matches insns and substitutes new insns.
+The `peephole2' pass is run after register allocation but before
+scheduling, which may result in much better code for targets that do
+scheduling.
+
+* Menu:
+
+* define_peephole::     RTL to Text Peephole Optimizers
+* define_peephole2::    RTL to RTL Peephole Optimizers
+
+
+File: gccint.info,  Node: define_peephole,  Next: define_peephole2,  Up: Peephole Definitions
+
+16.18.1 RTL to Text Peephole Optimizers
+---------------------------------------
+
+A definition looks like this:
+
+     (define_peephole
+       [INSN-PATTERN-1
+        INSN-PATTERN-2
+        ...]
+       "CONDITION"
+       "TEMPLATE"
+       "OPTIONAL-INSN-ATTRIBUTES")
+
+The last string operand may be omitted if you are not using any
+machine-specific information in this machine description.  If present,
+it must obey the same rules as in a `define_insn'.
+
+ In this skeleton, INSN-PATTERN-1 and so on are patterns to match
+consecutive insns.  The optimization applies to a sequence of insns when
+INSN-PATTERN-1 matches the first one, INSN-PATTERN-2 matches the next,
+and so on.
+
+ Each of the insns matched by a peephole must also match a
+`define_insn'.  Peepholes are checked only at the last stage just
+before code generation, and only optionally.  Therefore, any insn which
+would match a peephole but no `define_insn' will cause a crash in code
+generation in an unoptimized compilation, or at various optimization
+stages.
+
+ The operands of the insns are matched with `match_operands',
+`match_operator', and `match_dup', as usual.  What is not usual is that
+the operand numbers apply to all the insn patterns in the definition.
+So, you can check for identical operands in two insns by using
+`match_operand' in one insn and `match_dup' in the other.
+
+ The operand constraints used in `match_operand' patterns do not have
+any direct effect on the applicability of the peephole, but they will
+be validated afterward, so make sure your constraints are general enough
+to apply whenever the peephole matches.  If the peephole matches but
+the constraints are not satisfied, the compiler will crash.
+
+ It is safe to omit constraints in all the operands of the peephole; or
+you can write constraints which serve as a double-check on the criteria
+previously tested.
+
+ Once a sequence of insns matches the patterns, the CONDITION is
+checked.  This is a C expression which makes the final decision whether
+to perform the optimization (we do so if the expression is nonzero).  If
+CONDITION is omitted (in other words, the string is empty) then the
+optimization is applied to every sequence of insns that matches the
+patterns.
+
+ The defined peephole optimizations are applied after register
+allocation is complete.  Therefore, the peephole definition can check
+which operands have ended up in which kinds of registers, just by
+looking at the operands.
+
+ The way to refer to the operands in CONDITION is to write
+`operands[I]' for operand number I (as matched by `(match_operand I
+...)').  Use the variable `insn' to refer to the last of the insns
+being matched; use `prev_active_insn' to find the preceding insns.
+
+ When optimizing computations with intermediate results, you can use
+CONDITION to match only when the intermediate results are not used
+elsewhere.  Use the C expression `dead_or_set_p (INSN, OP)', where INSN
+is the insn in which you expect the value to be used for the last time
+(from the value of `insn', together with use of `prev_nonnote_insn'),
+and OP is the intermediate value (from `operands[I]').
+
+ Applying the optimization means replacing the sequence of insns with
+one new insn.  The TEMPLATE controls ultimate output of assembler code
+for this combined insn.  It works exactly like the template of a
+`define_insn'.  Operand numbers in this template are the same ones used
+in matching the original sequence of insns.
+
+ The result of a defined peephole optimizer does not need to match any
+of the insn patterns in the machine description; it does not even have
+an opportunity to match them.  The peephole optimizer definition itself
+serves as the insn pattern to control how the insn is output.
+
+ Defined peephole optimizers are run as assembler code is being output,
+so the insns they produce are never combined or rearranged in any way.
+
+ Here is an example, taken from the 68000 machine description:
+
+     (define_peephole
+       [(set (reg:SI 15) (plus:SI (reg:SI 15) (const_int 4)))
+        (set (match_operand:DF 0 "register_operand" "=f")
+             (match_operand:DF 1 "register_operand" "ad"))]
+       "FP_REG_P (operands[0]) && ! FP_REG_P (operands[1])"
+     {
+       rtx xoperands[2];
+       xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
+     #ifdef MOTOROLA
+       output_asm_insn ("move.l %1,(sp)", xoperands);
+       output_asm_insn ("move.l %1,-(sp)", operands);
+       return "fmove.d (sp)+,%0";
+     #else
+       output_asm_insn ("movel %1,sp@", xoperands);
+       output_asm_insn ("movel %1,sp@-", operands);
+       return "fmoved sp@+,%0";
+     #endif
+     })
+
+ The effect of this optimization is to change
+
+     jbsr _foobar
+     addql #4,sp
+     movel d1,sp@-
+     movel d0,sp@-
+     fmoved sp@+,fp0
+
+into
+
+     jbsr _foobar
+     movel d1,sp@
+     movel d0,sp@-
+     fmoved sp@+,fp0
+
+ INSN-PATTERN-1 and so on look _almost_ like the second operand of
+`define_insn'.  There is one important difference: the second operand
+of `define_insn' consists of one or more RTX's enclosed in square
+brackets.  Usually, there is only one: then the same action can be
+written as an element of a `define_peephole'.  But when there are
+multiple actions in a `define_insn', they are implicitly enclosed in a
+`parallel'.  Then you must explicitly write the `parallel', and the
+square brackets within it, in the `define_peephole'.  Thus, if an insn
+pattern looks like this,
+
+     (define_insn "divmodsi4"
+       [(set (match_operand:SI 0 "general_operand" "=d")
+             (div:SI (match_operand:SI 1 "general_operand" "0")
+                     (match_operand:SI 2 "general_operand" "dmsK")))
+        (set (match_operand:SI 3 "general_operand" "=d")
+             (mod:SI (match_dup 1) (match_dup 2)))]
+       "TARGET_68020"
+       "divsl%.l %2,%3:%0")
+
+then the way to mention this insn in a peephole is as follows:
+
+     (define_peephole
+       [...
+        (parallel
+         [(set (match_operand:SI 0 "general_operand" "=d")
+               (div:SI (match_operand:SI 1 "general_operand" "0")
+                       (match_operand:SI 2 "general_operand" "dmsK")))
+          (set (match_operand:SI 3 "general_operand" "=d")
+               (mod:SI (match_dup 1) (match_dup 2)))])
+        ...]
+       ...)
+
+
+File: gccint.info,  Node: define_peephole2,  Prev: define_peephole,  Up: Peephole Definitions
+
+16.18.2 RTL to RTL Peephole Optimizers
+--------------------------------------
+
+The `define_peephole2' definition tells the compiler how to substitute
+one sequence of instructions for another sequence, what additional
+scratch registers may be needed and what their lifetimes must be.
+
+     (define_peephole2
+       [INSN-PATTERN-1
+        INSN-PATTERN-2
+        ...]
+       "CONDITION"
+       [NEW-INSN-PATTERN-1
+        NEW-INSN-PATTERN-2
+        ...]
+       "PREPARATION-STATEMENTS")
+
+ The definition is almost identical to `define_split' (*note Insn
+Splitting::) except that the pattern to match is not a single
+instruction, but a sequence of instructions.
+
+ It is possible to request additional scratch registers for use in the
+output template.  If appropriate registers are not free, the pattern
+will simply not match.
+
+ Scratch registers are requested with a `match_scratch' pattern at the
+top level of the input pattern.  The allocated register (initially) will
+be dead at the point requested within the original sequence.  If the
+scratch is used at more than a single point, a `match_dup' pattern at
+the top level of the input pattern marks the last position in the input
+sequence at which the register must be available.
+
+ Here is an example from the IA-32 machine description:
+
+     (define_peephole2
+       [(match_scratch:SI 2 "r")
+        (parallel [(set (match_operand:SI 0 "register_operand" "")
+                        (match_operator:SI 3 "arith_or_logical_operator"
+                          [(match_dup 0)
+                           (match_operand:SI 1 "memory_operand" "")]))
+                   (clobber (reg:CC 17))])]
+       "! optimize_size && ! TARGET_READ_MODIFY"
+       [(set (match_dup 2) (match_dup 1))
+        (parallel [(set (match_dup 0)
+                        (match_op_dup 3 [(match_dup 0) (match_dup 2)]))
+                   (clobber (reg:CC 17))])]
+       "")
+
+This pattern tries to split a load from its use in the hopes that we'll
+be able to schedule around the memory load latency.  It allocates a
+single `SImode' register of class `GENERAL_REGS' (`"r"') that needs to
+be live only at the point just before the arithmetic.
+
+ A real example requiring extended scratch lifetimes is harder to come
+by, so here's a silly made-up example:
+
+     (define_peephole2
+       [(match_scratch:SI 4 "r")
+        (set (match_operand:SI 0 "" "") (match_operand:SI 1 "" ""))
+        (set (match_operand:SI 2 "" "") (match_dup 1))
+        (match_dup 4)
+        (set (match_operand:SI 3 "" "") (match_dup 1))]
+       "/* determine 1 does not overlap 0 and 2 */"
+       [(set (match_dup 4) (match_dup 1))
+        (set (match_dup 0) (match_dup 4))
+        (set (match_dup 2) (match_dup 4))]
+        (set (match_dup 3) (match_dup 4))]
+       "")
+
+If we had not added the `(match_dup 4)' in the middle of the input
+sequence, it might have been the case that the register we chose at the
+beginning of the sequence is killed by the first or second `set'.
+
+
+File: gccint.info,  Node: Insn Attributes,  Next: Conditional Execution,  Prev: Peephole Definitions,  Up: Machine Desc
+
+16.19 Instruction Attributes
+============================
+
+In addition to describing the instruction supported by the target
+machine, the `md' file also defines a group of "attributes" and a set of
+values for each.  Every generated insn is assigned a value for each
+attribute.  One possible attribute would be the effect that the insn
+has on the machine's condition code.  This attribute can then be used
+by `NOTICE_UPDATE_CC' to track the condition codes.
+
+* Menu:
+
+* Defining Attributes:: Specifying attributes and their values.
+* Expressions::         Valid expressions for attribute values.
+* Tagging Insns::       Assigning attribute values to insns.
+* Attr Example::        An example of assigning attributes.
+* Insn Lengths::        Computing the length of insns.
+* Constant Attributes:: Defining attributes that are constant.
+* Delay Slots::         Defining delay slots required for a machine.
+* Processor pipeline description:: Specifying information for insn scheduling.
+
+
+File: gccint.info,  Node: Defining Attributes,  Next: Expressions,  Up: Insn Attributes
+
+16.19.1 Defining Attributes and their Values
+--------------------------------------------
+
+The `define_attr' expression is used to define each attribute required
+by the target machine.  It looks like:
+
+     (define_attr NAME LIST-OF-VALUES DEFAULT)
+
+ NAME is a string specifying the name of the attribute being defined.
+
+ LIST-OF-VALUES is either a string that specifies a comma-separated
+list of values that can be assigned to the attribute, or a null string
+to indicate that the attribute takes numeric values.
+
+ DEFAULT is an attribute expression that gives the value of this
+attribute for insns that match patterns whose definition does not
+include an explicit value for this attribute.  *Note Attr Example::,
+for more information on the handling of defaults.  *Note Constant
+Attributes::, for information on attributes that do not depend on any
+particular insn.
+
+ For each defined attribute, a number of definitions are written to the
+`insn-attr.h' file.  For cases where an explicit set of values is
+specified for an attribute, the following are defined:
+
+   * A `#define' is written for the symbol `HAVE_ATTR_NAME'.
+
+   * An enumerated class is defined for `attr_NAME' with elements of
+     the form `UPPER-NAME_UPPER-VALUE' where the attribute name and
+     value are first converted to uppercase.
+
+   * A function `get_attr_NAME' is defined that is passed an insn and
+     returns the attribute value for that insn.
+
+ For example, if the following is present in the `md' file:
+
+     (define_attr "type" "branch,fp,load,store,arith" ...)
+
+the following lines will be written to the file `insn-attr.h'.
+
+     #define HAVE_ATTR_type
+     enum attr_type {TYPE_BRANCH, TYPE_FP, TYPE_LOAD,
+                      TYPE_STORE, TYPE_ARITH};
+     extern enum attr_type get_attr_type ();
+
+ If the attribute takes numeric values, no `enum' type will be defined
+and the function to obtain the attribute's value will return `int'.
+
+ There are attributes which are tied to a specific meaning.  These
+attributes are not free to use for other purposes:
+
+`length'
+     The `length' attribute is used to calculate the length of emitted
+     code chunks.  This is especially important when verifying branch
+     distances. *Note Insn Lengths::.
+
+`enabled'
+     The `enabled' attribute can be defined to prevent certain
+     alternatives of an insn definition from being used during code
+     generation. *Note Disable Insn Alternatives::.
+
+ Another way of defining an attribute is to use:
+
+     (define_enum_attr "ATTR" "ENUM" DEFAULT)
+
+ This works in just the same way as `define_attr', except that the list
+of values is taken from a separate enumeration called ENUM (*note
+define_enum::).  This form allows you to use the same list of values
+for several attributes without having to repeat the list each time.
+For example:
+
+     (define_enum "processor" [
+       model_a
+       model_b
+       ...
+     ])
+     (define_enum_attr "arch" "processor"
+       (const (symbol_ref "target_arch")))
+     (define_enum_attr "tune" "processor"
+       (const (symbol_ref "target_tune")))
+
+ defines the same attributes as:
+
+     (define_attr "arch" "model_a,model_b,..."
+       (const (symbol_ref "target_arch")))
+     (define_attr "tune" "model_a,model_b,..."
+       (const (symbol_ref "target_tune")))
+
+ but without duplicating the processor list.  The second example
+defines two separate C enums (`attr_arch' and `attr_tune') whereas the
+first defines a single C enum (`processor').
+
+
+File: gccint.info,  Node: Expressions,  Next: Tagging Insns,  Prev: Defining Attributes,  Up: Insn Attributes
+
+16.19.2 Attribute Expressions
+-----------------------------
+
+RTL expressions used to define attributes use the codes described above
+plus a few specific to attribute definitions, to be discussed below.
+Attribute value expressions must have one of the following forms:
+
+`(const_int I)'
+     The integer I specifies the value of a numeric attribute.  I must
+     be non-negative.
+
+     The value of a numeric attribute can be specified either with a
+     `const_int', or as an integer represented as a string in
+     `const_string', `eq_attr' (see below), `attr', `symbol_ref',
+     simple arithmetic expressions, and `set_attr' overrides on
+     specific instructions (*note Tagging Insns::).
+
+`(const_string VALUE)'
+     The string VALUE specifies a constant attribute value.  If VALUE
+     is specified as `"*"', it means that the default value of the
+     attribute is to be used for the insn containing this expression.
+     `"*"' obviously cannot be used in the DEFAULT expression of a
+     `define_attr'.
+
+     If the attribute whose value is being specified is numeric, VALUE
+     must be a string containing a non-negative integer (normally
+     `const_int' would be used in this case).  Otherwise, it must
+     contain one of the valid values for the attribute.
+
+`(if_then_else TEST TRUE-VALUE FALSE-VALUE)'
+     TEST specifies an attribute test, whose format is defined below.
+     The value of this expression is TRUE-VALUE if TEST is true,
+     otherwise it is FALSE-VALUE.
+
+`(cond [TEST1 VALUE1 ...] DEFAULT)'
+     The first operand of this expression is a vector containing an even
+     number of expressions and consisting of pairs of TEST and VALUE
+     expressions.  The value of the `cond' expression is that of the
+     VALUE corresponding to the first true TEST expression.  If none of
+     the TEST expressions are true, the value of the `cond' expression
+     is that of the DEFAULT expression.
+
+ TEST expressions can have one of the following forms:
+
+`(const_int I)'
+     This test is true if I is nonzero and false otherwise.
+
+`(not TEST)'
+`(ior TEST1 TEST2)'
+`(and TEST1 TEST2)'
+     These tests are true if the indicated logical function is true.
+
+`(match_operand:M N PRED CONSTRAINTS)'
+     This test is true if operand N of the insn whose attribute value
+     is being determined has mode M (this part of the test is ignored
+     if M is `VOIDmode') and the function specified by the string PRED
+     returns a nonzero value when passed operand N and mode M (this
+     part of the test is ignored if PRED is the null string).
+
+     The CONSTRAINTS operand is ignored and should be the null string.
+
+`(le ARITH1 ARITH2)'
+`(leu ARITH1 ARITH2)'
+`(lt ARITH1 ARITH2)'
+`(ltu ARITH1 ARITH2)'
+`(gt ARITH1 ARITH2)'
+`(gtu ARITH1 ARITH2)'
+`(ge ARITH1 ARITH2)'
+`(geu ARITH1 ARITH2)'
+`(ne ARITH1 ARITH2)'
+`(eq ARITH1 ARITH2)'
+     These tests are true if the indicated comparison of the two
+     arithmetic expressions is true.  Arithmetic expressions are formed
+     with `plus', `minus', `mult', `div', `mod', `abs', `neg', `and',
+     `ior', `xor', `not', `ashift', `lshiftrt', and `ashiftrt'
+     expressions.
+
+     `const_int' and `symbol_ref' are always valid terms (*note Insn
+     Lengths::,for additional forms).  `symbol_ref' is a string
+     denoting a C expression that yields an `int' when evaluated by the
+     `get_attr_...' routine.  It should normally be a global variable.
+
+`(eq_attr NAME VALUE)'
+     NAME is a string specifying the name of an attribute.
+
+     VALUE is a string that is either a valid value for attribute NAME,
+     a comma-separated list of values, or `!' followed by a value or
+     list.  If VALUE does not begin with a `!', this test is true if
+     the value of the NAME attribute of the current insn is in the list
+     specified by VALUE.  If VALUE begins with a `!', this test is true
+     if the attribute's value is _not_ in the specified list.
+
+     For example,
+
+          (eq_attr "type" "load,store")
+
+     is equivalent to
+
+          (ior (eq_attr "type" "load") (eq_attr "type" "store"))
+
+     If NAME specifies an attribute of `alternative', it refers to the
+     value of the compiler variable `which_alternative' (*note Output
+     Statement::) and the values must be small integers.  For example,
+
+          (eq_attr "alternative" "2,3")
+
+     is equivalent to
+
+          (ior (eq (symbol_ref "which_alternative") (const_int 2))
+               (eq (symbol_ref "which_alternative") (const_int 3)))
+
+     Note that, for most attributes, an `eq_attr' test is simplified in
+     cases where the value of the attribute being tested is known for
+     all insns matching a particular pattern.  This is by far the most
+     common case.
+
+`(attr_flag NAME)'
+     The value of an `attr_flag' expression is true if the flag
+     specified by NAME is true for the `insn' currently being scheduled.
+
+     NAME is a string specifying one of a fixed set of flags to test.
+     Test the flags `forward' and `backward' to determine the direction
+     of a conditional branch.  Test the flags `very_likely', `likely',
+     `very_unlikely', and `unlikely' to determine if a conditional
+     branch is expected to be taken.
+
+     If the `very_likely' flag is true, then the `likely' flag is also
+     true.  Likewise for the `very_unlikely' and `unlikely' flags.
+
+     This example describes a conditional branch delay slot which can
+     be nullified for forward branches that are taken (annul-true) or
+     for backward branches which are not taken (annul-false).
+
+          (define_delay (eq_attr "type" "cbranch")
+            [(eq_attr "in_branch_delay" "true")
+             (and (eq_attr "in_branch_delay" "true")
+                  (attr_flag "forward"))
+             (and (eq_attr "in_branch_delay" "true")
+                  (attr_flag "backward"))])
+
+     The `forward' and `backward' flags are false if the current `insn'
+     being scheduled is not a conditional branch.
+
+     The `very_likely' and `likely' flags are true if the `insn' being
+     scheduled is not a conditional branch.  The `very_unlikely' and
+     `unlikely' flags are false if the `insn' being scheduled is not a
+     conditional branch.
+
+     `attr_flag' is only used during delay slot scheduling and has no
+     meaning to other passes of the compiler.
+
+`(attr NAME)'
+     The value of another attribute is returned.  This is most useful
+     for numeric attributes, as `eq_attr' and `attr_flag' produce more
+     efficient code for non-numeric attributes.
+
+
+File: gccint.info,  Node: Tagging Insns,  Next: Attr Example,  Prev: Expressions,  Up: Insn Attributes
+
+16.19.3 Assigning Attribute Values to Insns
+-------------------------------------------
+
+The value assigned to an attribute of an insn is primarily determined by
+which pattern is matched by that insn (or which `define_peephole'
+generated it).  Every `define_insn' and `define_peephole' can have an
+optional last argument to specify the values of attributes for matching
+insns.  The value of any attribute not specified in a particular insn
+is set to the default value for that attribute, as specified in its
+`define_attr'.  Extensive use of default values for attributes permits
+the specification of the values for only one or two attributes in the
+definition of most insn patterns, as seen in the example in the next
+section.
+
+ The optional last argument of `define_insn' and `define_peephole' is a
+vector of expressions, each of which defines the value for a single
+attribute.  The most general way of assigning an attribute's value is
+to use a `set' expression whose first operand is an `attr' expression
+giving the name of the attribute being set.  The second operand of the
+`set' is an attribute expression (*note Expressions::) giving the value
+of the attribute.
+
+ When the attribute value depends on the `alternative' attribute (i.e.,
+which is the applicable alternative in the constraint of the insn), the
+`set_attr_alternative' expression can be used.  It allows the
+specification of a vector of attribute expressions, one for each
+alternative.
+
+ When the generality of arbitrary attribute expressions is not required,
+the simpler `set_attr' expression can be used, which allows specifying
+a string giving either a single attribute value or a list of attribute
+values, one for each alternative.
+
+ The form of each of the above specifications is shown below.  In each
+case, NAME is a string specifying the attribute to be set.
+
+`(set_attr NAME VALUE-STRING)'
+     VALUE-STRING is either a string giving the desired attribute value,
+     or a string containing a comma-separated list giving the values for
+     succeeding alternatives.  The number of elements must match the
+     number of alternatives in the constraint of the insn pattern.
+
+     Note that it may be useful to specify `*' for some alternative, in
+     which case the attribute will assume its default value for insns
+     matching that alternative.
+
+`(set_attr_alternative NAME [VALUE1 VALUE2 ...])'
+     Depending on the alternative of the insn, the value will be one of
+     the specified values.  This is a shorthand for using a `cond' with
+     tests on the `alternative' attribute.
+
+`(set (attr NAME) VALUE)'
+     The first operand of this `set' must be the special RTL expression
+     `attr', whose sole operand is a string giving the name of the
+     attribute being set.  VALUE is the value of the attribute.
+
+ The following shows three different ways of representing the same
+attribute value specification:
+
+     (set_attr "type" "load,store,arith")
+
+     (set_attr_alternative "type"
+                           [(const_string "load") (const_string "store")
+                            (const_string "arith")])
+
+     (set (attr "type")
+          (cond [(eq_attr "alternative" "1") (const_string "load")
+                 (eq_attr "alternative" "2") (const_string "store")]
+                (const_string "arith")))
+
+ The `define_asm_attributes' expression provides a mechanism to specify
+the attributes assigned to insns produced from an `asm' statement.  It
+has the form:
+
+     (define_asm_attributes [ATTR-SETS])
+
+where ATTR-SETS is specified the same as for both the `define_insn' and
+the `define_peephole' expressions.
+
+ These values will typically be the "worst case" attribute values.  For
+example, they might indicate that the condition code will be clobbered.
+
+ A specification for a `length' attribute is handled specially.  The
+way to compute the length of an `asm' insn is to multiply the length
+specified in the expression `define_asm_attributes' by the number of
+machine instructions specified in the `asm' statement, determined by
+counting the number of semicolons and newlines in the string.
+Therefore, the value of the `length' attribute specified in a
+`define_asm_attributes' should be the maximum possible length of a
+single machine instruction.
+
+
+File: gccint.info,  Node: Attr Example,  Next: Insn Lengths,  Prev: Tagging Insns,  Up: Insn Attributes
+
+16.19.4 Example of Attribute Specifications
+-------------------------------------------
+
+The judicious use of defaulting is important in the efficient use of
+insn attributes.  Typically, insns are divided into "types" and an
+attribute, customarily called `type', is used to represent this value.
+This attribute is normally used only to define the default value for
+other attributes.  An example will clarify this usage.
+
+ Assume we have a RISC machine with a condition code and in which only
+full-word operations are performed in registers.  Let us assume that we
+can divide all insns into loads, stores, (integer) arithmetic
+operations, floating point operations, and branches.
+
+ Here we will concern ourselves with determining the effect of an insn
+on the condition code and will limit ourselves to the following possible
+effects:  The condition code can be set unpredictably (clobbered), not
+be changed, be set to agree with the results of the operation, or only
+changed if the item previously set into the condition code has been
+modified.
+
+ Here is part of a sample `md' file for such a machine:
+
+     (define_attr "type" "load,store,arith,fp,branch" (const_string "arith"))
+
+     (define_attr "cc" "clobber,unchanged,set,change0"
+                  (cond [(eq_attr "type" "load")
+                             (const_string "change0")
+                         (eq_attr "type" "store,branch")
+                             (const_string "unchanged")
+                         (eq_attr "type" "arith")
+                             (if_then_else (match_operand:SI 0 "" "")
+                                           (const_string "set")
+                                           (const_string "clobber"))]
+                        (const_string "clobber")))
+
+     (define_insn ""
+       [(set (match_operand:SI 0 "general_operand" "=r,r,m")
+             (match_operand:SI 1 "general_operand" "r,m,r"))]
+       ""
+       "@
+        move %0,%1
+        load %0,%1
+        store %0,%1"
+       [(set_attr "type" "arith,load,store")])
+
+ Note that we assume in the above example that arithmetic operations
+performed on quantities smaller than a machine word clobber the
+condition code since they will set the condition code to a value
+corresponding to the full-word result.
+
+
+File: gccint.info,  Node: Insn Lengths,  Next: Constant Attributes,  Prev: Attr Example,  Up: Insn Attributes
+
+16.19.5 Computing the Length of an Insn
+---------------------------------------
+
+For many machines, multiple types of branch instructions are provided,
+each for different length branch displacements.  In most cases, the
+assembler will choose the correct instruction to use.  However, when
+the assembler cannot do so, GCC can when a special attribute, the
+`length' attribute, is defined.  This attribute must be defined to have
+numeric values by specifying a null string in its `define_attr'.
+
+ In the case of the `length' attribute, two additional forms of
+arithmetic terms are allowed in test expressions:
+
+`(match_dup N)'
+     This refers to the address of operand N of the current insn, which
+     must be a `label_ref'.
+
+`(pc)'
+     This refers to the address of the _current_ insn.  It might have
+     been more consistent with other usage to make this the address of
+     the _next_ insn but this would be confusing because the length of
+     the current insn is to be computed.
+
+ For normal insns, the length will be determined by value of the
+`length' attribute.  In the case of `addr_vec' and `addr_diff_vec' insn
+patterns, the length is computed as the number of vectors multiplied by
+the size of each vector.
+
+ Lengths are measured in addressable storage units (bytes).
+
+ The following macros can be used to refine the length computation:
+
+`ADJUST_INSN_LENGTH (INSN, LENGTH)'
+     If defined, modifies the length assigned to instruction INSN as a
+     function of the context in which it is used.  LENGTH is an lvalue
+     that contains the initially computed length of the insn and should
+     be updated with the correct length of the insn.
+
+     This macro will normally not be required.  A case in which it is
+     required is the ROMP.  On this machine, the size of an `addr_vec'
+     insn must be increased by two to compensate for the fact that
+     alignment may be required.
+
+ The routine that returns `get_attr_length' (the value of the `length'
+attribute) can be used by the output routine to determine the form of
+the branch instruction to be written, as the example below illustrates.
+
+ As an example of the specification of variable-length branches,
+consider the IBM 360.  If we adopt the convention that a register will
+be set to the starting address of a function, we can jump to labels
+within 4k of the start using a four-byte instruction.  Otherwise, we
+need a six-byte sequence to load the address from memory and then
+branch to it.
+
+ On such a machine, a pattern for a branch instruction might be
+specified as follows:
+
+     (define_insn "jump"
+       [(set (pc)
+             (label_ref (match_operand 0 "" "")))]
+       ""
+     {
+        return (get_attr_length (insn) == 4
+                ? "b %l0" : "l r15,=a(%l0); br r15");
+     }
+       [(set (attr "length")
+             (if_then_else (lt (match_dup 0) (const_int 4096))
+                           (const_int 4)
+                           (const_int 6)))])
+
+
+File: gccint.info,  Node: Constant Attributes,  Next: Delay Slots,  Prev: Insn Lengths,  Up: Insn Attributes
+
+16.19.6 Constant Attributes
+---------------------------
+
+A special form of `define_attr', where the expression for the default
+value is a `const' expression, indicates an attribute that is constant
+for a given run of the compiler.  Constant attributes may be used to
+specify which variety of processor is used.  For example,
+
+     (define_attr "cpu" "m88100,m88110,m88000"
+      (const
+       (cond [(symbol_ref "TARGET_88100") (const_string "m88100")
+              (symbol_ref "TARGET_88110") (const_string "m88110")]
+             (const_string "m88000"))))
+
+     (define_attr "memory" "fast,slow"
+      (const
+       (if_then_else (symbol_ref "TARGET_FAST_MEM")
+                     (const_string "fast")
+                     (const_string "slow"))))
+
+ The routine generated for constant attributes has no parameters as it
+does not depend on any particular insn.  RTL expressions used to define
+the value of a constant attribute may use the `symbol_ref' form, but
+may not use either the `match_operand' form or `eq_attr' forms
+involving insn attributes.
+
+
+File: gccint.info,  Node: Delay Slots,  Next: Processor pipeline description,  Prev: Constant Attributes,  Up: Insn Attributes
+
+16.19.7 Delay Slot Scheduling
+-----------------------------
+
+The insn attribute mechanism can be used to specify the requirements for
+delay slots, if any, on a target machine.  An instruction is said to
+require a "delay slot" if some instructions that are physically after
+the instruction are executed as if they were located before it.
+Classic examples are branch and call instructions, which often execute
+the following instruction before the branch or call is performed.
+
+ On some machines, conditional branch instructions can optionally
+"annul" instructions in the delay slot.  This means that the
+instruction will not be executed for certain branch outcomes.  Both
+instructions that annul if the branch is true and instructions that
+annul if the branch is false are supported.
+
+ Delay slot scheduling differs from instruction scheduling in that
+determining whether an instruction needs a delay slot is dependent only
+on the type of instruction being generated, not on data flow between the
+instructions.  See the next section for a discussion of data-dependent
+instruction scheduling.
+
+ The requirement of an insn needing one or more delay slots is indicated
+via the `define_delay' expression.  It has the following form:
+
+     (define_delay TEST
+                   [DELAY-1 ANNUL-TRUE-1 ANNUL-FALSE-1
+                    DELAY-2 ANNUL-TRUE-2 ANNUL-FALSE-2
+                    ...])
+
+ TEST is an attribute test that indicates whether this `define_delay'
+applies to a particular insn.  If so, the number of required delay
+slots is determined by the length of the vector specified as the second
+argument.  An insn placed in delay slot N must satisfy attribute test
+DELAY-N.  ANNUL-TRUE-N is an attribute test that specifies which insns
+may be annulled if the branch is true.  Similarly, ANNUL-FALSE-N
+specifies which insns in the delay slot may be annulled if the branch
+is false.  If annulling is not supported for that delay slot, `(nil)'
+should be coded.
+
+ For example, in the common case where branch and call insns require a
+single delay slot, which may contain any insn other than a branch or
+call, the following would be placed in the `md' file:
+
+     (define_delay (eq_attr "type" "branch,call")
+                   [(eq_attr "type" "!branch,call") (nil) (nil)])
+
+ Multiple `define_delay' expressions may be specified.  In this case,
+each such expression specifies different delay slot requirements and
+there must be no insn for which tests in two `define_delay' expressions
+are both true.
+
+ For example, if we have a machine that requires one delay slot for
+branches but two for calls,  no delay slot can contain a branch or call
+insn, and any valid insn in the delay slot for the branch can be
+annulled if the branch is true, we might represent this as follows:
+
+     (define_delay (eq_attr "type" "branch")
+        [(eq_attr "type" "!branch,call")
+         (eq_attr "type" "!branch,call")
+         (nil)])
+
+     (define_delay (eq_attr "type" "call")
+                   [(eq_attr "type" "!branch,call") (nil) (nil)
+                    (eq_attr "type" "!branch,call") (nil) (nil)])
+
+
+File: gccint.info,  Node: Processor pipeline description,  Prev: Delay Slots,  Up: Insn Attributes
+
+16.19.8 Specifying processor pipeline description
+-------------------------------------------------
+
+To achieve better performance, most modern processors (super-pipelined,
+superscalar RISC, and VLIW processors) have many "functional units" on
+which several instructions can be executed simultaneously.  An
+instruction starts execution if its issue conditions are satisfied.  If
+not, the instruction is stalled until its conditions are satisfied.
+Such "interlock (pipeline) delay" causes interruption of the fetching
+of successor instructions (or demands nop instructions, e.g. for some
+MIPS processors).
+
+ There are two major kinds of interlock delays in modern processors.
+The first one is a data dependence delay determining "instruction
+latency time".  The instruction execution is not started until all
+source data have been evaluated by prior instructions (there are more
+complex cases when the instruction execution starts even when the data
+are not available but will be ready in given time after the instruction
+execution start).  Taking the data dependence delays into account is
+simple.  The data dependence (true, output, and anti-dependence) delay
+between two instructions is given by a constant.  In most cases this
+approach is adequate.  The second kind of interlock delays is a
+reservation delay.  The reservation delay means that two instructions
+under execution will be in need of shared processors resources, i.e.
+buses, internal registers, and/or functional units, which are reserved
+for some time.  Taking this kind of delay into account is complex
+especially for modern RISC processors.
+
+ The task of exploiting more processor parallelism is solved by an
+instruction scheduler.  For a better solution to this problem, the
+instruction scheduler has to have an adequate description of the
+processor parallelism (or "pipeline description").  GCC machine
+descriptions describe processor parallelism and functional unit
+reservations for groups of instructions with the aid of "regular
+expressions".
+
+ The GCC instruction scheduler uses a "pipeline hazard recognizer" to
+figure out the possibility of the instruction issue by the processor on
+a given simulated processor cycle.  The pipeline hazard recognizer is
+automatically generated from the processor pipeline description.  The
+pipeline hazard recognizer generated from the machine description is
+based on a deterministic finite state automaton (DFA): the instruction
+issue is possible if there is a transition from one automaton state to
+another one.  This algorithm is very fast, and furthermore, its speed
+is not dependent on processor complexity(1).
+
+ The rest of this section describes the directives that constitute an
+automaton-based processor pipeline description.  The order of these
+constructions within the machine description file is not important.
+
+ The following optional construction describes names of automata
+generated and used for the pipeline hazards recognition.  Sometimes the
+generated finite state automaton used by the pipeline hazard recognizer
+is large.  If we use more than one automaton and bind functional units
+to the automata, the total size of the automata is usually less than
+the size of the single automaton.  If there is no one such
+construction, only one finite state automaton is generated.
+
+     (define_automaton AUTOMATA-NAMES)
+
+ AUTOMATA-NAMES is a string giving names of the automata.  The names
+are separated by commas.  All the automata should have unique names.
+The automaton name is used in the constructions `define_cpu_unit' and
+`define_query_cpu_unit'.
+
+ Each processor functional unit used in the description of instruction
+reservations should be described by the following construction.
+
+     (define_cpu_unit UNIT-NAMES [AUTOMATON-NAME])
+
+ UNIT-NAMES is a string giving the names of the functional units
+separated by commas.  Don't use name `nothing', it is reserved for
+other goals.
+
+ AUTOMATON-NAME is a string giving the name of the automaton with which
+the unit is bound.  The automaton should be described in construction
+`define_automaton'.  You should give "automaton-name", if there is a
+defined automaton.
+
+ The assignment of units to automata are constrained by the uses of the
+units in insn reservations.  The most important constraint is: if a
+unit reservation is present on a particular cycle of an alternative for
+an insn reservation, then some unit from the same automaton must be
+present on the same cycle for the other alternatives of the insn
+reservation.  The rest of the constraints are mentioned in the
+description of the subsequent constructions.
+
+ The following construction describes CPU functional units analogously
+to `define_cpu_unit'.  The reservation of such units can be queried for
+an automaton state.  The instruction scheduler never queries
+reservation of functional units for given automaton state.  So as a
+rule, you don't need this construction.  This construction could be
+used for future code generation goals (e.g. to generate VLIW insn
+templates).
+
+     (define_query_cpu_unit UNIT-NAMES [AUTOMATON-NAME])
+
+ UNIT-NAMES is a string giving names of the functional units separated
+by commas.
+
+ AUTOMATON-NAME is a string giving the name of the automaton with which
+the unit is bound.
+
+ The following construction is the major one to describe pipeline
+characteristics of an instruction.
+
+     (define_insn_reservation INSN-NAME DEFAULT_LATENCY
+                              CONDITION REGEXP)
+
+ DEFAULT_LATENCY is a number giving latency time of the instruction.
+There is an important difference between the old description and the
+automaton based pipeline description.  The latency time is used for all
+dependencies when we use the old description.  In the automaton based
+pipeline description, the given latency time is only used for true
+dependencies.  The cost of anti-dependencies is always zero and the
+cost of output dependencies is the difference between latency times of
+the producing and consuming insns (if the difference is negative, the
+cost is considered to be zero).  You can always change the default
+costs for any description by using the target hook
+`TARGET_SCHED_ADJUST_COST' (*note Scheduling::).
+
+ INSN-NAME is a string giving the internal name of the insn.  The
+internal names are used in constructions `define_bypass' and in the
+automaton description file generated for debugging.  The internal name
+has nothing in common with the names in `define_insn'.  It is a good
+practice to use insn classes described in the processor manual.
+
+ CONDITION defines what RTL insns are described by this construction.
+You should remember that you will be in trouble if CONDITION for two or
+more different `define_insn_reservation' constructions is TRUE for an
+insn.  In this case what reservation will be used for the insn is not
+defined.  Such cases are not checked during generation of the pipeline
+hazards recognizer because in general recognizing that two conditions
+may have the same value is quite difficult (especially if the conditions
+contain `symbol_ref').  It is also not checked during the pipeline
+hazard recognizer work because it would slow down the recognizer
+considerably.
+
+ REGEXP is a string describing the reservation of the cpu's functional
+units by the instruction.  The reservations are described by a regular
+expression according to the following syntax:
+
+            regexp = regexp "," oneof
+                   | oneof
+
+            oneof = oneof "|" allof
+                  | allof
+
+            allof = allof "+" repeat
+                  | repeat
+
+            repeat = element "*" number
+                   | element
+
+            element = cpu_function_unit_name
+                    | reservation_name
+                    | result_name
+                    | "nothing"
+                    | "(" regexp ")"
+
+   * `,' is used for describing the start of the next cycle in the
+     reservation.
+
+   * `|' is used for describing a reservation described by the first
+     regular expression *or* a reservation described by the second
+     regular expression *or* etc.
+
+   * `+' is used for describing a reservation described by the first
+     regular expression *and* a reservation described by the second
+     regular expression *and* etc.
+
+   * `*' is used for convenience and simply means a sequence in which
+     the regular expression are repeated NUMBER times with cycle
+     advancing (see `,').
+
+   * `cpu_function_unit_name' denotes reservation of the named
+     functional unit.
+
+   * `reservation_name' -- see description of construction
+     `define_reservation'.
+
+   * `nothing' denotes no unit reservations.
+
+ Sometimes unit reservations for different insns contain common parts.
+In such case, you can simplify the pipeline description by describing
+the common part by the following construction
+
+     (define_reservation RESERVATION-NAME REGEXP)
+
+ RESERVATION-NAME is a string giving name of REGEXP.  Functional unit
+names and reservation names are in the same name space.  So the
+reservation names should be different from the functional unit names
+and can not be the reserved name `nothing'.
+
+ The following construction is used to describe exceptions in the
+latency time for given instruction pair.  This is so called bypasses.
+
+     (define_bypass NUMBER OUT_INSN_NAMES IN_INSN_NAMES
+                    [GUARD])
+
+ NUMBER defines when the result generated by the instructions given in
+string OUT_INSN_NAMES will be ready for the instructions given in
+string IN_INSN_NAMES.  The instructions in the string are separated by
+commas.
+
+ GUARD is an optional string giving the name of a C function which
+defines an additional guard for the bypass.  The function will get the
+two insns as parameters.  If the function returns zero the bypass will
+be ignored for this case.  The additional guard is necessary to
+recognize complicated bypasses, e.g. when the consumer is only an
+address of insn `store' (not a stored value).
+
+ If there are more one bypass with the same output and input insns, the
+chosen bypass is the first bypass with a guard in description whose
+guard function returns nonzero.  If there is no such bypass, then
+bypass without the guard function is chosen.
+
+ The following five constructions are usually used to describe VLIW
+processors, or more precisely, to describe a placement of small
+instructions into VLIW instruction slots.  They can be used for RISC
+processors, too.
+
+     (exclusion_set UNIT-NAMES UNIT-NAMES)
+     (presence_set UNIT-NAMES PATTERNS)
+     (final_presence_set UNIT-NAMES PATTERNS)
+     (absence_set UNIT-NAMES PATTERNS)
+     (final_absence_set UNIT-NAMES PATTERNS)
+
+ UNIT-NAMES is a string giving names of functional units separated by
+commas.
+
+ PATTERNS is a string giving patterns of functional units separated by
+comma.  Currently pattern is one unit or units separated by
+white-spaces.
+
+ The first construction (`exclusion_set') means that each functional
+unit in the first string can not be reserved simultaneously with a unit
+whose name is in the second string and vice versa.  For example, the
+construction is useful for describing processors (e.g. some SPARC
+processors) with a fully pipelined floating point functional unit which
+can execute simultaneously only single floating point insns or only
+double floating point insns.
+
+ The second construction (`presence_set') means that each functional
+unit in the first string can not be reserved unless at least one of
+pattern of units whose names are in the second string is reserved.
+This is an asymmetric relation.  For example, it is useful for
+description that VLIW `slot1' is reserved after `slot0' reservation.
+We could describe it by the following construction
+
+     (presence_set "slot1" "slot0")
+
+ Or `slot1' is reserved only after `slot0' and unit `b0' reservation.
+In this case we could write
+
+     (presence_set "slot1" "slot0 b0")
+
+ The third construction (`final_presence_set') is analogous to
+`presence_set'.  The difference between them is when checking is done.
+When an instruction is issued in given automaton state reflecting all
+current and planned unit reservations, the automaton state is changed.
+The first state is a source state, the second one is a result state.
+Checking for `presence_set' is done on the source state reservation,
+checking for `final_presence_set' is done on the result reservation.
+This construction is useful to describe a reservation which is actually
+two subsequent reservations.  For example, if we use
+
+     (presence_set "slot1" "slot0")
+
+ the following insn will be never issued (because `slot1' requires
+`slot0' which is absent in the source state).
+
+     (define_reservation "insn_and_nop" "slot0 + slot1")
+
+ but it can be issued if we use analogous `final_presence_set'.
+
+ The forth construction (`absence_set') means that each functional unit
+in the first string can be reserved only if each pattern of units whose
+names are in the second string is not reserved.  This is an asymmetric
+relation (actually `exclusion_set' is analogous to this one but it is
+symmetric).  For example it might be useful in a VLIW description to
+say that `slot0' cannot be reserved after either `slot1' or `slot2'
+have been reserved.  This can be described as:
+
+     (absence_set "slot0" "slot1, slot2")
+
+ Or `slot2' can not be reserved if `slot0' and unit `b0' are reserved
+or `slot1' and unit `b1' are reserved.  In this case we could write
+
+     (absence_set "slot2" "slot0 b0, slot1 b1")
+
+ All functional units mentioned in a set should belong to the same
+automaton.
+
+ The last construction (`final_absence_set') is analogous to
+`absence_set' but checking is done on the result (state) reservation.
+See comments for `final_presence_set'.
+
+ You can control the generator of the pipeline hazard recognizer with
+the following construction.
+
+     (automata_option OPTIONS)
+
+ OPTIONS is a string giving options which affect the generated code.
+Currently there are the following options:
+
+   * "no-minimization" makes no minimization of the automaton.  This is
+     only worth to do when we are debugging the description and need to
+     look more accurately at reservations of states.
+
+   * "time" means printing time statistics about the generation of
+     automata.
+
+   * "stats" means printing statistics about the generated automata
+     such as the number of DFA states, NDFA states and arcs.
+
+   * "v" means a generation of the file describing the result automata.
+     The file has suffix `.dfa' and can be used for the description
+     verification and debugging.
+
+   * "w" means a generation of warning instead of error for
+     non-critical errors.
+
+   * "ndfa" makes nondeterministic finite state automata.  This affects
+     the treatment of operator `|' in the regular expressions.  The
+     usual treatment of the operator is to try the first alternative
+     and, if the reservation is not possible, the second alternative.
+     The nondeterministic treatment means trying all alternatives, some
+     of them may be rejected by reservations in the subsequent insns.
+
+   * "progress" means output of a progress bar showing how many states
+     were generated so far for automaton being processed.  This is
+     useful during debugging a DFA description.  If you see too many
+     generated states, you could interrupt the generator of the pipeline
+     hazard recognizer and try to figure out a reason for generation of
+     the huge automaton.
+
+ As an example, consider a superscalar RISC machine which can issue
+three insns (two integer insns and one floating point insn) on the
+cycle but can finish only two insns.  To describe this, we define the
+following functional units.
+
+     (define_cpu_unit "i0_pipeline, i1_pipeline, f_pipeline")
+     (define_cpu_unit "port0, port1")
+
+ All simple integer insns can be executed in any integer pipeline and
+their result is ready in two cycles.  The simple integer insns are
+issued into the first pipeline unless it is reserved, otherwise they
+are issued into the second pipeline.  Integer division and
+multiplication insns can be executed only in the second integer
+pipeline and their results are ready correspondingly in 8 and 4 cycles.
+The integer division is not pipelined, i.e. the subsequent integer
+division insn can not be issued until the current division insn
+finished.  Floating point insns are fully pipelined and their results
+are ready in 3 cycles.  Where the result of a floating point insn is
+used by an integer insn, an additional delay of one cycle is incurred.
+To describe all of this we could specify
+
+     (define_cpu_unit "div")
+
+     (define_insn_reservation "simple" 2 (eq_attr "type" "int")
+                              "(i0_pipeline | i1_pipeline), (port0 | port1)")
+
+     (define_insn_reservation "mult" 4 (eq_attr "type" "mult")
+                              "i1_pipeline, nothing*2, (port0 | port1)")
+
+     (define_insn_reservation "div" 8 (eq_attr "type" "div")
+                              "i1_pipeline, div*7, div + (port0 | port1)")
+
+     (define_insn_reservation "float" 3 (eq_attr "type" "float")
+                              "f_pipeline, nothing, (port0 | port1))
+
+     (define_bypass 4 "float" "simple,mult,div")
+
+ To simplify the description we could describe the following reservation
+
+     (define_reservation "finish" "port0|port1")
+
+ and use it in all `define_insn_reservation' as in the following
+construction
+
+     (define_insn_reservation "simple" 2 (eq_attr "type" "int")
+                              "(i0_pipeline | i1_pipeline), finish")
+
+ ---------- Footnotes ----------
+
+ (1) However, the size of the automaton depends on processor
+complexity.  To limit this effect, machine descriptions can split
+orthogonal parts of the machine description among several automata: but
+then, since each of these must be stepped independently, this does
+cause a small decrease in the algorithm's performance.
+
+
+File: gccint.info,  Node: Conditional Execution,  Next: Constant Definitions,  Prev: Insn Attributes,  Up: Machine Desc
+
+16.20 Conditional Execution
+===========================
+
+A number of architectures provide for some form of conditional
+execution, or predication.  The hallmark of this feature is the ability
+to nullify most of the instructions in the instruction set.  When the
+instruction set is large and not entirely symmetric, it can be quite
+tedious to describe these forms directly in the `.md' file.  An
+alternative is the `define_cond_exec' template.
+
+     (define_cond_exec
+       [PREDICATE-PATTERN]
+       "CONDITION"
+       "OUTPUT-TEMPLATE")
+
+ PREDICATE-PATTERN is the condition that must be true for the insn to
+be executed at runtime and should match a relational operator.  One can
+use `match_operator' to match several relational operators at once.
+Any `match_operand' operands must have no more than one alternative.
+
+ CONDITION is a C expression that must be true for the generated
+pattern to match.
+
+ OUTPUT-TEMPLATE is a string similar to the `define_insn' output
+template (*note Output Template::), except that the `*' and `@' special
+cases do not apply.  This is only useful if the assembly text for the
+predicate is a simple prefix to the main insn.  In order to handle the
+general case, there is a global variable `current_insn_predicate' that
+will contain the entire predicate if the current insn is predicated,
+and will otherwise be `NULL'.
+
+ When `define_cond_exec' is used, an implicit reference to the
+`predicable' instruction attribute is made.  *Note Insn Attributes::.
+This attribute must be boolean (i.e. have exactly two elements in its
+LIST-OF-VALUES).  Further, it must not be used with complex
+expressions.  That is, the default and all uses in the insns must be a
+simple constant, not dependent on the alternative or anything else.
+
+ For each `define_insn' for which the `predicable' attribute is true, a
+new `define_insn' pattern will be generated that matches a predicated
+version of the instruction.  For example,
+
+     (define_insn "addsi"
+       [(set (match_operand:SI 0 "register_operand" "r")
+             (plus:SI (match_operand:SI 1 "register_operand" "r")
+                      (match_operand:SI 2 "register_operand" "r")))]
+       "TEST1"
+       "add %2,%1,%0")
+
+     (define_cond_exec
+       [(ne (match_operand:CC 0 "register_operand" "c")
+            (const_int 0))]
+       "TEST2"
+       "(%0)")
+
+generates a new pattern
+
+     (define_insn ""
+       [(cond_exec
+          (ne (match_operand:CC 3 "register_operand" "c") (const_int 0))
+          (set (match_operand:SI 0 "register_operand" "r")
+               (plus:SI (match_operand:SI 1 "register_operand" "r")
+                        (match_operand:SI 2 "register_operand" "r"))))]
+       "(TEST2) && (TEST1)"
+       "(%3) add %2,%1,%0")
+
+
+File: gccint.info,  Node: Constant Definitions,  Next: Iterators,  Prev: Conditional Execution,  Up: Machine Desc
+
+16.21 Constant Definitions
+==========================
+
+Using literal constants inside instruction patterns reduces legibility
+and can be a maintenance problem.
+
+ To overcome this problem, you may use the `define_constants'
+expression.  It contains a vector of name-value pairs.  From that point
+on, wherever any of the names appears in the MD file, it is as if the
+corresponding value had been written instead.  You may use
+`define_constants' multiple times; each appearance adds more constants
+to the table.  It is an error to redefine a constant with a different
+value.
+
+ To come back to the a29k load multiple example, instead of
+
+     (define_insn ""
+       [(match_parallel 0 "load_multiple_operation"
+          [(set (match_operand:SI 1 "gpc_reg_operand" "=r")
+                (match_operand:SI 2 "memory_operand" "m"))
+           (use (reg:SI 179))
+           (clobber (reg:SI 179))])]
+       ""
+       "loadm 0,0,%1,%2")
+
+ You could write:
+
+     (define_constants [
+         (R_BP 177)
+         (R_FC 178)
+         (R_CR 179)
+         (R_Q  180)
+     ])
+
+     (define_insn ""
+       [(match_parallel 0 "load_multiple_operation"
+          [(set (match_operand:SI 1 "gpc_reg_operand" "=r")
+                (match_operand:SI 2 "memory_operand" "m"))
+           (use (reg:SI R_CR))
+           (clobber (reg:SI R_CR))])]
+       ""
+       "loadm 0,0,%1,%2")
+
+ The constants that are defined with a define_constant are also output
+in the insn-codes.h header file as #defines.
+
+ You can also use the machine description file to define enumerations.
+Like the constants defined by `define_constant', these enumerations are
+visible to both the machine description file and the main C code.
+
+ The syntax is as follows:
+
+     (define_c_enum "NAME" [
+       VALUE0
+       VALUE1
+       ...
+       VALUEN
+     ])
+
+ This definition causes the equivalent of the following C code to appear
+in `insn-constants.h':
+
+     enum NAME {
+       VALUE0 = 0,
+       VALUE1 = 1,
+       ...
+       VALUEN = N
+     };
+     #define NUM_CNAME_VALUES (N + 1)
+
+ where CNAME is the capitalized form of NAME.  It also makes each
+VALUEI available in the machine description file, just as if it had
+been declared with:
+
+     (define_constants [(VALUEI I)])
+
+ Each VALUEI is usually an upper-case identifier and usually begins
+with CNAME.
+
+ You can split the enumeration definition into as many statements as
+you like.  The above example is directly equivalent to:
+
+     (define_c_enum "NAME" [VALUE0])
+     (define_c_enum "NAME" [VALUE1])
+     ...
+     (define_c_enum "NAME" [VALUEN])
+
+ Splitting the enumeration helps to improve the modularity of each
+individual `.md' file.  For example, if a port defines its
+synchronization instructions in a separate `sync.md' file, it is
+convenient to define all synchronization-specific enumeration values in
+`sync.md' rather than in the main `.md' file.
+
+ Some enumeration names have special significance to GCC:
+
+`unspecv'
+     If an enumeration called `unspecv' is defined, GCC will use it
+     when printing out `unspec_volatile' expressions.  For example:
+
+          (define_c_enum "unspecv" [
+            UNSPECV_BLOCKAGE
+          ])
+
+     causes GCC to print `(unspec_volatile ... 0)' as:
+
+          (unspec_volatile ... UNSPECV_BLOCKAGE)
+
+`unspec'
+     If an enumeration called `unspec' is defined, GCC will use it when
+     printing out `unspec' expressions.  GCC will also use it when
+     printing out `unspec_volatile' expressions unless an `unspecv'
+     enumeration is also defined.  You can therefore decide whether to
+     keep separate enumerations for volatile and non-volatile
+     expressions or whether to use the same enumeration for both.
+
+ Another way of defining an enumeration is to use `define_enum':
+
+     (define_enum "NAME" [
+       VALUE0
+       VALUE1
+       ...
+       VALUEN
+     ])
+
+ This directive implies:
+
+     (define_c_enum "NAME" [
+       CNAME_CVALUE0
+       CNAME_CVALUE1
+       ...
+       CNAME_CVALUEN
+     ])
+
+ where CVALUEI is the capitalized form of VALUEI.  However, unlike
+`define_c_enum', the enumerations defined by `define_enum' can be used
+in attribute specifications (*note define_enum_attr::).
+
+
+File: gccint.info,  Node: Iterators,  Prev: Constant Definitions,  Up: Machine Desc
+
+16.22 Iterators
+===============
+
+Ports often need to define similar patterns for more than one machine
+mode or for more than one rtx code.  GCC provides some simple iterator
+facilities to make this process easier.
+
+* Menu:
+
+* Mode Iterators::         Generating variations of patterns for different modes.
+* Code Iterators::         Doing the same for codes.
+
+
+File: gccint.info,  Node: Mode Iterators,  Next: Code Iterators,  Up: Iterators
+
+16.22.1 Mode Iterators
+----------------------
+
+Ports often need to define similar patterns for two or more different
+modes.  For example:
+
+   * If a processor has hardware support for both single and double
+     floating-point arithmetic, the `SFmode' patterns tend to be very
+     similar to the `DFmode' ones.
+
+   * If a port uses `SImode' pointers in one configuration and `DImode'
+     pointers in another, it will usually have very similar `SImode'
+     and `DImode' patterns for manipulating pointers.
+
+ Mode iterators allow several patterns to be instantiated from one
+`.md' file template.  They can be used with any type of rtx-based
+construct, such as a `define_insn', `define_split', or
+`define_peephole2'.
+
+* Menu:
+
+* Defining Mode Iterators:: Defining a new mode iterator.
+* Substitutions::           Combining mode iterators with substitutions
+* Examples::                Examples
+
+
+File: gccint.info,  Node: Defining Mode Iterators,  Next: Substitutions,  Up: Mode Iterators
+
+16.22.1.1 Defining Mode Iterators
+.................................
+
+The syntax for defining a mode iterator is:
+
+     (define_mode_iterator NAME [(MODE1 "COND1") ... (MODEN "CONDN")])
+
+ This allows subsequent `.md' file constructs to use the mode suffix
+`:NAME'.  Every construct that does so will be expanded N times, once
+with every use of `:NAME' replaced by `:MODE1', once with every use
+replaced by `:MODE2', and so on.  In the expansion for a particular
+MODEI, every C condition will also require that CONDI be true.
+
+ For example:
+
+     (define_mode_iterator P [(SI "Pmode == SImode") (DI "Pmode == DImode")])
+
+ defines a new mode suffix `:P'.  Every construct that uses `:P' will
+be expanded twice, once with every `:P' replaced by `:SI' and once with
+every `:P' replaced by `:DI'.  The `:SI' version will only apply if
+`Pmode == SImode' and the `:DI' version will only apply if `Pmode ==
+DImode'.
+
+ As with other `.md' conditions, an empty string is treated as "always
+true".  `(MODE "")' can also be abbreviated to `MODE'.  For example:
+
+     (define_mode_iterator GPR [SI (DI "TARGET_64BIT")])
+
+ means that the `:DI' expansion only applies if `TARGET_64BIT' but that
+the `:SI' expansion has no such constraint.
+
+ Iterators are applied in the order they are defined.  This can be
+significant if two iterators are used in a construct that requires
+substitutions.  *Note Substitutions::.
+
+
+File: gccint.info,  Node: Substitutions,  Next: Examples,  Prev: Defining Mode Iterators,  Up: Mode Iterators
+
+16.22.1.2 Substitution in Mode Iterators
+........................................
+
+If an `.md' file construct uses mode iterators, each version of the
+construct will often need slightly different strings or modes.  For
+example:
+
+   * When a `define_expand' defines several `addM3' patterns (*note
+     Standard Names::), each expander will need to use the appropriate
+     mode name for M.
+
+   * When a `define_insn' defines several instruction patterns, each
+     instruction will often use a different assembler mnemonic.
+
+   * When a `define_insn' requires operands with different modes, using
+     an iterator for one of the operand modes usually requires a
+     specific mode for the other operand(s).
+
+ GCC supports such variations through a system of "mode attributes".
+There are two standard attributes: `mode', which is the name of the
+mode in lower case, and `MODE', which is the same thing in upper case.
+You can define other attributes using:
+
+     (define_mode_attr NAME [(MODE1 "VALUE1") ... (MODEN "VALUEN")])
+
+ where NAME is the name of the attribute and VALUEI is the value
+associated with MODEI.
+
+ When GCC replaces some :ITERATOR with :MODE, it will scan each string
+and mode in the pattern for sequences of the form `<ITERATOR:ATTR>',
+where ATTR is the name of a mode attribute.  If the attribute is
+defined for MODE, the whole `<...>' sequence will be replaced by the
+appropriate attribute value.
+
+ For example, suppose an `.md' file has:
+
+     (define_mode_iterator P [(SI "Pmode == SImode") (DI "Pmode == DImode")])
+     (define_mode_attr load [(SI "lw") (DI "ld")])
+
+ If one of the patterns that uses `:P' contains the string
+`"<P:load>\t%0,%1"', the `SI' version of that pattern will use
+`"lw\t%0,%1"' and the `DI' version will use `"ld\t%0,%1"'.
+
+ Here is an example of using an attribute for a mode:
+
+     (define_mode_iterator LONG [SI DI])
+     (define_mode_attr SHORT [(SI "HI") (DI "SI")])
+     (define_insn ...
+       (sign_extend:LONG (match_operand:<LONG:SHORT> ...)) ...)
+
+ The `ITERATOR:' prefix may be omitted, in which case the substitution
+will be attempted for every iterator expansion.
+
+
+File: gccint.info,  Node: Examples,  Prev: Substitutions,  Up: Mode Iterators
+
+16.22.1.3 Mode Iterator Examples
+................................
+
+Here is an example from the MIPS port.  It defines the following modes
+and attributes (among others):
+
+     (define_mode_iterator GPR [SI (DI "TARGET_64BIT")])
+     (define_mode_attr d [(SI "") (DI "d")])
+
+ and uses the following template to define both `subsi3' and `subdi3':
+
+     (define_insn "sub<mode>3"
+       [(set (match_operand:GPR 0 "register_operand" "=d")
+             (minus:GPR (match_operand:GPR 1 "register_operand" "d")
+                        (match_operand:GPR 2 "register_operand" "d")))]
+       ""
+       "<d>subu\t%0,%1,%2"
+       [(set_attr "type" "arith")
+        (set_attr "mode" "<MODE>")])
+
+ This is exactly equivalent to:
+
+     (define_insn "subsi3"
+       [(set (match_operand:SI 0 "register_operand" "=d")
+             (minus:SI (match_operand:SI 1 "register_operand" "d")
+                       (match_operand:SI 2 "register_operand" "d")))]
+       ""
+       "subu\t%0,%1,%2"
+       [(set_attr "type" "arith")
+        (set_attr "mode" "SI")])
+
+     (define_insn "subdi3"
+       [(set (match_operand:DI 0 "register_operand" "=d")
+             (minus:DI (match_operand:DI 1 "register_operand" "d")
+                       (match_operand:DI 2 "register_operand" "d")))]
+       ""
+       "dsubu\t%0,%1,%2"
+       [(set_attr "type" "arith")
+        (set_attr "mode" "DI")])
+
+
+File: gccint.info,  Node: Code Iterators,  Prev: Mode Iterators,  Up: Iterators
+
+16.22.2 Code Iterators
+----------------------
+
+Code iterators operate in a similar way to mode iterators.  *Note Mode
+Iterators::.
+
+ The construct:
+
+     (define_code_iterator NAME [(CODE1 "COND1") ... (CODEN "CONDN")])
+
+ defines a pseudo rtx code NAME that can be instantiated as CODEI if
+condition CONDI is true.  Each CODEI must have the same rtx format.
+*Note RTL Classes::.
+
+ As with mode iterators, each pattern that uses NAME will be expanded N
+times, once with all uses of NAME replaced by CODE1, once with all uses
+replaced by CODE2, and so on.  *Note Defining Mode Iterators::.
+
+ It is possible to define attributes for codes as well as for modes.
+There are two standard code attributes: `code', the name of the code in
+lower case, and `CODE', the name of the code in upper case.  Other
+attributes are defined using:
+
+     (define_code_attr NAME [(CODE1 "VALUE1") ... (CODEN "VALUEN")])
+
+ Here's an example of code iterators in action, taken from the MIPS
+port:
+
+     (define_code_iterator any_cond [unordered ordered unlt unge uneq ltgt unle ungt
+                                     eq ne gt ge lt le gtu geu ltu leu])
+
+     (define_expand "b<code>"
+       [(set (pc)
+             (if_then_else (any_cond:CC (cc0)
+                                        (const_int 0))
+                           (label_ref (match_operand 0 ""))
+                           (pc)))]
+       ""
+     {
+       gen_conditional_branch (operands, <CODE>);
+       DONE;
+     })
+
+ This is equivalent to:
+
+     (define_expand "bunordered"
+       [(set (pc)
+             (if_then_else (unordered:CC (cc0)
+                                         (const_int 0))
+                           (label_ref (match_operand 0 ""))
+                           (pc)))]
+       ""
+     {
+       gen_conditional_branch (operands, UNORDERED);
+       DONE;
+     })
+
+     (define_expand "bordered"
+       [(set (pc)
+             (if_then_else (ordered:CC (cc0)
+                                       (const_int 0))
+                           (label_ref (match_operand 0 ""))
+                           (pc)))]
+       ""
+     {
+       gen_conditional_branch (operands, ORDERED);
+       DONE;
+     })
+
+     ...
+
+
+File: gccint.info,  Node: Target Macros,  Next: Host Config,  Prev: Machine Desc,  Up: Top
+
+17 Target Description Macros and Functions
+******************************************
+
+In addition to the file `MACHINE.md', a machine description includes a
+C header file conventionally given the name `MACHINE.h' and a C source
+file named `MACHINE.c'.  The header file defines numerous macros that
+convey the information about the target machine that does not fit into
+the scheme of the `.md' file.  The file `tm.h' should be a link to
+`MACHINE.h'.  The header file `config.h' includes `tm.h' and most
+compiler source files include `config.h'.  The source file defines a
+variable `targetm', which is a structure containing pointers to
+functions and data relating to the target machine.  `MACHINE.c' should
+also contain their definitions, if they are not defined elsewhere in
+GCC, and other functions called through the macros defined in the `.h'
+file.
+
+* Menu:
+
+* Target Structure::    The `targetm' variable.
+* Driver::              Controlling how the driver runs the compilation passes.
+* Run-time Target::     Defining `-m' options like `-m68000' and `-m68020'.
+* Per-Function Data::   Defining data structures for per-function information.
+* Storage Layout::      Defining sizes and alignments of data.
+* Type Layout::         Defining sizes and properties of basic user data types.
+* Registers::           Naming and describing the hardware registers.
+* Register Classes::    Defining the classes of hardware registers.
+* Old Constraints::     The old way to define machine-specific constraints.
+* Stack and Calling::   Defining which way the stack grows and by how much.
+* Varargs::             Defining the varargs macros.
+* Trampolines::         Code set up at run time to enter a nested function.
+* Library Calls::       Controlling how library routines are implicitly called.
+* Addressing Modes::    Defining addressing modes valid for memory operands.
+* Anchored Addresses::  Defining how `-fsection-anchors' should work.
+* Condition Code::      Defining how insns update the condition code.
+* Costs::               Defining relative costs of different operations.
+* Scheduling::          Adjusting the behavior of the instruction scheduler.
+* Sections::            Dividing storage into text, data, and other sections.
+* PIC::                 Macros for position independent code.
+* Assembler Format::    Defining how to write insns and pseudo-ops to output.
+* Debugging Info::      Defining the format of debugging output.
+* Floating Point::      Handling floating point for cross-compilers.
+* Mode Switching::      Insertion of mode-switching instructions.
+* Target Attributes::   Defining target-specific uses of `__attribute__'.
+* Emulated TLS::        Emulated TLS support.
+* MIPS Coprocessors::   MIPS coprocessor support and how to customize it.
+* PCH Target::          Validity checking for precompiled headers.
+* C++ ABI::             Controlling C++ ABI changes.
+* Named Address Spaces:: Adding support for named address spaces
+* Misc::                Everything else.
+
+
+File: gccint.info,  Node: Target Structure,  Next: Driver,  Up: Target Macros
+
+17.1 The Global `targetm' Variable
+==================================
+
+ -- Variable: struct gcc_target targetm
+     The target `.c' file must define the global `targetm' variable
+     which contains pointers to functions and data relating to the
+     target machine.  The variable is declared in `target.h';
+     `target-def.h' defines the macro `TARGET_INITIALIZER' which is
+     used to initialize the variable, and macros for the default
+     initializers for elements of the structure.  The `.c' file should
+     override those macros for which the default definition is
+     inappropriate.  For example:
+          #include "target.h"
+          #include "target-def.h"
+
+          /* Initialize the GCC target structure.  */
+
+          #undef TARGET_COMP_TYPE_ATTRIBUTES
+          #define TARGET_COMP_TYPE_ATTRIBUTES MACHINE_comp_type_attributes
+
+          struct gcc_target targetm = TARGET_INITIALIZER;
+
+Where a macro should be defined in the `.c' file in this manner to form
+part of the `targetm' structure, it is documented below as a "Target
+Hook" with a prototype.  Many macros will change in future from being
+defined in the `.h' file to being part of the `targetm' structure.
+
+
+File: gccint.info,  Node: Driver,  Next: Run-time Target,  Prev: Target Structure,  Up: Target Macros
+
+17.2 Controlling the Compilation Driver, `gcc'
+==============================================
+
+You can control the compilation driver.
+
+ -- Macro: DRIVER_SELF_SPECS
+     A list of specs for the driver itself.  It should be a suitable
+     initializer for an array of strings, with no surrounding braces.
+
+     The driver applies these specs to its own command line between
+     loading default `specs' files (but not command-line specified
+     ones) and choosing the multilib directory or running any
+     subcommands.  It applies them in the order given, so each spec can
+     depend on the options added by earlier ones.  It is also possible
+     to remove options using `%<OPTION' in the usual way.
+
+     This macro can be useful when a port has several interdependent
+     target options.  It provides a way of standardizing the command
+     line so that the other specs are easier to write.
+
+     Do not define this macro if it does not need to do anything.
+
+ -- Macro: OPTION_DEFAULT_SPECS
+     A list of specs used to support configure-time default options
+     (i.e.  `--with' options) in the driver.  It should be a suitable
+     initializer for an array of structures, each containing two
+     strings, without the outermost pair of surrounding braces.
+
+     The first item in the pair is the name of the default.  This must
+     match the code in `config.gcc' for the target.  The second item is
+     a spec to apply if a default with this name was specified.  The
+     string `%(VALUE)' in the spec will be replaced by the value of the
+     default everywhere it occurs.
+
+     The driver will apply these specs to its own command line between
+     loading default `specs' files and processing `DRIVER_SELF_SPECS',
+     using the same mechanism as `DRIVER_SELF_SPECS'.
+
+     Do not define this macro if it does not need to do anything.
+
+ -- Macro: CPP_SPEC
+     A C string constant that tells the GCC driver program options to
+     pass to CPP.  It can also specify how to translate options you
+     give to GCC into options for GCC to pass to the CPP.
+
+     Do not define this macro if it does not need to do anything.
+
+ -- Macro: CPLUSPLUS_CPP_SPEC
+     This macro is just like `CPP_SPEC', but is used for C++, rather
+     than C.  If you do not define this macro, then the value of
+     `CPP_SPEC' (if any) will be used instead.
+
+ -- Macro: CC1_SPEC
+     A C string constant that tells the GCC driver program options to
+     pass to `cc1', `cc1plus', `f771', and the other language front
+     ends.  It can also specify how to translate options you give to
+     GCC into options for GCC to pass to front ends.
+
+     Do not define this macro if it does not need to do anything.
+
+ -- Macro: CC1PLUS_SPEC
+     A C string constant that tells the GCC driver program options to
+     pass to `cc1plus'.  It can also specify how to translate options
+     you give to GCC into options for GCC to pass to the `cc1plus'.
+
+     Do not define this macro if it does not need to do anything.  Note
+     that everything defined in CC1_SPEC is already passed to `cc1plus'
+     so there is no need to duplicate the contents of CC1_SPEC in
+     CC1PLUS_SPEC.
+
+ -- Macro: ASM_SPEC
+     A C string constant that tells the GCC driver program options to
+     pass to the assembler.  It can also specify how to translate
+     options you give to GCC into options for GCC to pass to the
+     assembler.  See the file `sun3.h' for an example of this.
+
+     Do not define this macro if it does not need to do anything.
+
+ -- Macro: ASM_FINAL_SPEC
+     A C string constant that tells the GCC driver program how to run
+     any programs which cleanup after the normal assembler.  Normally,
+     this is not needed.  See the file `mips.h' for an example of this.
+
+     Do not define this macro if it does not need to do anything.
+
+ -- Macro: AS_NEEDS_DASH_FOR_PIPED_INPUT
+     Define this macro, with no value, if the driver should give the
+     assembler an argument consisting of a single dash, `-', to
+     instruct it to read from its standard input (which will be a pipe
+     connected to the output of the compiler proper).  This argument is
+     given after any `-o' option specifying the name of the output file.
+
+     If you do not define this macro, the assembler is assumed to read
+     its standard input if given no non-option arguments.  If your
+     assembler cannot read standard input at all, use a `%{pipe:%e}'
+     construct; see `mips.h' for instance.
+
+ -- Macro: LINK_SPEC
+     A C string constant that tells the GCC driver program options to
+     pass to the linker.  It can also specify how to translate options
+     you give to GCC into options for GCC to pass to the linker.
+
+     Do not define this macro if it does not need to do anything.
+
+ -- Macro: LIB_SPEC
+     Another C string constant used much like `LINK_SPEC'.  The
+     difference between the two is that `LIB_SPEC' is used at the end
+     of the command given to the linker.
+
+     If this macro is not defined, a default is provided that loads the
+     standard C library from the usual place.  See `gcc.c'.
+
+ -- Macro: LIBGCC_SPEC
+     Another C string constant that tells the GCC driver program how
+     and when to place a reference to `libgcc.a' into the linker
+     command line.  This constant is placed both before and after the
+     value of `LIB_SPEC'.
+
+     If this macro is not defined, the GCC driver provides a default
+     that passes the string `-lgcc' to the linker.
+
+ -- Macro: REAL_LIBGCC_SPEC
+     By default, if `ENABLE_SHARED_LIBGCC' is defined, the
+     `LIBGCC_SPEC' is not directly used by the driver program but is
+     instead modified to refer to different versions of `libgcc.a'
+     depending on the values of the command line flags `-static',
+     `-shared', `-static-libgcc', and `-shared-libgcc'.  On targets
+     where these modifications are inappropriate, define
+     `REAL_LIBGCC_SPEC' instead.  `REAL_LIBGCC_SPEC' tells the driver
+     how to place a reference to `libgcc' on the link command line,
+     but, unlike `LIBGCC_SPEC', it is used unmodified.
+
+ -- Macro: USE_LD_AS_NEEDED
+     A macro that controls the modifications to `LIBGCC_SPEC' mentioned
+     in `REAL_LIBGCC_SPEC'.  If nonzero, a spec will be generated that
+     uses -as-needed and the shared libgcc in place of the static
+     exception handler library, when linking without any of `-static',
+     `-static-libgcc', or `-shared-libgcc'.
+
+ -- Macro: LINK_EH_SPEC
+     If defined, this C string constant is added to `LINK_SPEC'.  When
+     `USE_LD_AS_NEEDED' is zero or undefined, it also affects the
+     modifications to `LIBGCC_SPEC' mentioned in `REAL_LIBGCC_SPEC'.
+
+ -- Macro: STARTFILE_SPEC
+     Another C string constant used much like `LINK_SPEC'.  The
+     difference between the two is that `STARTFILE_SPEC' is used at the
+     very beginning of the command given to the linker.
+
+     If this macro is not defined, a default is provided that loads the
+     standard C startup file from the usual place.  See `gcc.c'.
+
+ -- Macro: ENDFILE_SPEC
+     Another C string constant used much like `LINK_SPEC'.  The
+     difference between the two is that `ENDFILE_SPEC' is used at the
+     very end of the command given to the linker.
+
+     Do not define this macro if it does not need to do anything.
+
+ -- Macro: THREAD_MODEL_SPEC
+     GCC `-v' will print the thread model GCC was configured to use.
+     However, this doesn't work on platforms that are multilibbed on
+     thread models, such as AIX 4.3.  On such platforms, define
+     `THREAD_MODEL_SPEC' such that it evaluates to a string without
+     blanks that names one of the recognized thread models.  `%*', the
+     default value of this macro, will expand to the value of
+     `thread_file' set in `config.gcc'.
+
+ -- Macro: SYSROOT_SUFFIX_SPEC
+     Define this macro to add a suffix to the target sysroot when GCC is
+     configured with a sysroot.  This will cause GCC to search for
+     usr/lib, et al, within sysroot+suffix.
+
+ -- Macro: SYSROOT_HEADERS_SUFFIX_SPEC
+     Define this macro to add a headers_suffix to the target sysroot
+     when GCC is configured with a sysroot.  This will cause GCC to
+     pass the updated sysroot+headers_suffix to CPP, causing it to
+     search for usr/include, et al, within sysroot+headers_suffix.
+
+ -- Macro: EXTRA_SPECS
+     Define this macro to provide additional specifications to put in
+     the `specs' file that can be used in various specifications like
+     `CC1_SPEC'.
+
+     The definition should be an initializer for an array of structures,
+     containing a string constant, that defines the specification name,
+     and a string constant that provides the specification.
+
+     Do not define this macro if it does not need to do anything.
+
+     `EXTRA_SPECS' is useful when an architecture contains several
+     related targets, which have various `..._SPECS' which are similar
+     to each other, and the maintainer would like one central place to
+     keep these definitions.
+
+     For example, the PowerPC System V.4 targets use `EXTRA_SPECS' to
+     define either `_CALL_SYSV' when the System V calling sequence is
+     used or `_CALL_AIX' when the older AIX-based calling sequence is
+     used.
+
+     The `config/rs6000/rs6000.h' target file defines:
+
+          #define EXTRA_SPECS \
+            { "cpp_sysv_default", CPP_SYSV_DEFAULT },
+
+          #define CPP_SYS_DEFAULT ""
+
+     The `config/rs6000/sysv.h' target file defines:
+          #undef CPP_SPEC
+          #define CPP_SPEC \
+          "%{posix: -D_POSIX_SOURCE } \
+          %{mcall-sysv: -D_CALL_SYSV } \
+          %{!mcall-sysv: %(cpp_sysv_default) } \
+          %{msoft-float: -D_SOFT_FLOAT} %{mcpu=403: -D_SOFT_FLOAT}"
+
+          #undef CPP_SYSV_DEFAULT
+          #define CPP_SYSV_DEFAULT "-D_CALL_SYSV"
+
+     while the `config/rs6000/eabiaix.h' target file defines
+     `CPP_SYSV_DEFAULT' as:
+
+          #undef CPP_SYSV_DEFAULT
+          #define CPP_SYSV_DEFAULT "-D_CALL_AIX"
+
+ -- Macro: LINK_LIBGCC_SPECIAL_1
+     Define this macro if the driver program should find the library
+     `libgcc.a'.  If you do not define this macro, the driver program
+     will pass the argument `-lgcc' to tell the linker to do the search.
+
+ -- Macro: LINK_GCC_C_SEQUENCE_SPEC
+     The sequence in which libgcc and libc are specified to the linker.
+     By default this is `%G %L %G'.
+
+ -- Macro: LINK_COMMAND_SPEC
+     A C string constant giving the complete command line need to
+     execute the linker.  When you do this, you will need to update
+     your port each time a change is made to the link command line
+     within `gcc.c'.  Therefore, define this macro only if you need to
+     completely redefine the command line for invoking the linker and
+     there is no other way to accomplish the effect you need.
+     Overriding this macro may be avoidable by overriding
+     `LINK_GCC_C_SEQUENCE_SPEC' instead.
+
+ -- Macro: LINK_ELIMINATE_DUPLICATE_LDIRECTORIES
+     A nonzero value causes `collect2' to remove duplicate
+     `-LDIRECTORY' search directories from linking commands.  Do not
+     give it a nonzero value if removing duplicate search directories
+     changes the linker's semantics.
+
+ -- Macro: MULTILIB_DEFAULTS
+     Define this macro as a C expression for the initializer of an
+     array of string to tell the driver program which options are
+     defaults for this target and thus do not need to be handled
+     specially when using `MULTILIB_OPTIONS'.
+
+     Do not define this macro if `MULTILIB_OPTIONS' is not defined in
+     the target makefile fragment or if none of the options listed in
+     `MULTILIB_OPTIONS' are set by default.  *Note Target Fragment::.
+
+ -- Macro: RELATIVE_PREFIX_NOT_LINKDIR
+     Define this macro to tell `gcc' that it should only translate a
+     `-B' prefix into a `-L' linker option if the prefix indicates an
+     absolute file name.
+
+ -- Macro: MD_EXEC_PREFIX
+     If defined, this macro is an additional prefix to try after
+     `STANDARD_EXEC_PREFIX'.  `MD_EXEC_PREFIX' is not searched when the
+     compiler is built as a cross compiler.  If you define
+     `MD_EXEC_PREFIX', then be sure to add it to the list of
+     directories used to find the assembler in `configure.in'.
+
+ -- Macro: STANDARD_STARTFILE_PREFIX
+     Define this macro as a C string constant if you wish to override
+     the standard choice of `libdir' as the default prefix to try when
+     searching for startup files such as `crt0.o'.
+     `STANDARD_STARTFILE_PREFIX' is not searched when the compiler is
+     built as a cross compiler.
+
+ -- Macro: STANDARD_STARTFILE_PREFIX_1
+     Define this macro as a C string constant if you wish to override
+     the standard choice of `/lib' as a prefix to try after the default
+     prefix when searching for startup files such as `crt0.o'.
+     `STANDARD_STARTFILE_PREFIX_1' is not searched when the compiler is
+     built as a cross compiler.
+
+ -- Macro: STANDARD_STARTFILE_PREFIX_2
+     Define this macro as a C string constant if you wish to override
+     the standard choice of `/lib' as yet another prefix to try after
+     the default prefix when searching for startup files such as
+     `crt0.o'.  `STANDARD_STARTFILE_PREFIX_2' is not searched when the
+     compiler is built as a cross compiler.
+
+ -- Macro: MD_STARTFILE_PREFIX
+     If defined, this macro supplies an additional prefix to try after
+     the standard prefixes.  `MD_EXEC_PREFIX' is not searched when the
+     compiler is built as a cross compiler.
+
+ -- Macro: MD_STARTFILE_PREFIX_1
+     If defined, this macro supplies yet another prefix to try after the
+     standard prefixes.  It is not searched when the compiler is built
+     as a cross compiler.
+
+ -- Macro: INIT_ENVIRONMENT
+     Define this macro as a C string constant if you wish to set
+     environment variables for programs called by the driver, such as
+     the assembler and loader.  The driver passes the value of this
+     macro to `putenv' to initialize the necessary environment
+     variables.
+
+ -- Macro: LOCAL_INCLUDE_DIR
+     Define this macro as a C string constant if you wish to override
+     the standard choice of `/usr/local/include' as the default prefix
+     to try when searching for local header files.  `LOCAL_INCLUDE_DIR'
+     comes before `SYSTEM_INCLUDE_DIR' in the search order.
+
+     Cross compilers do not search either `/usr/local/include' or its
+     replacement.
+
+ -- Macro: SYSTEM_INCLUDE_DIR
+     Define this macro as a C string constant if you wish to specify a
+     system-specific directory to search for header files before the
+     standard directory.  `SYSTEM_INCLUDE_DIR' comes before
+     `STANDARD_INCLUDE_DIR' in the search order.
+
+     Cross compilers do not use this macro and do not search the
+     directory specified.
+
+ -- Macro: STANDARD_INCLUDE_DIR
+     Define this macro as a C string constant if you wish to override
+     the standard choice of `/usr/include' as the default prefix to try
+     when searching for header files.
+
+     Cross compilers ignore this macro and do not search either
+     `/usr/include' or its replacement.
+
+ -- Macro: STANDARD_INCLUDE_COMPONENT
+     The "component" corresponding to `STANDARD_INCLUDE_DIR'.  See
+     `INCLUDE_DEFAULTS', below, for the description of components.  If
+     you do not define this macro, no component is used.
+
+ -- Macro: INCLUDE_DEFAULTS
+     Define this macro if you wish to override the entire default
+     search path for include files.  For a native compiler, the default
+     search path usually consists of `GCC_INCLUDE_DIR',
+     `LOCAL_INCLUDE_DIR', `SYSTEM_INCLUDE_DIR',
+     `GPLUSPLUS_INCLUDE_DIR', and `STANDARD_INCLUDE_DIR'.  In addition,
+     `GPLUSPLUS_INCLUDE_DIR' and `GCC_INCLUDE_DIR' are defined
+     automatically by `Makefile', and specify private search areas for
+     GCC.  The directory `GPLUSPLUS_INCLUDE_DIR' is used only for C++
+     programs.
+
+     The definition should be an initializer for an array of structures.
+     Each array element should have four elements: the directory name (a
+     string constant), the component name (also a string constant), a
+     flag for C++-only directories, and a flag showing that the
+     includes in the directory don't need to be wrapped in `extern `C''
+     when compiling C++.  Mark the end of the array with a null element.
+
+     The component name denotes what GNU package the include file is
+     part of, if any, in all uppercase letters.  For example, it might
+     be `GCC' or `BINUTILS'.  If the package is part of a
+     vendor-supplied operating system, code the component name as `0'.
+
+     For example, here is the definition used for VAX/VMS:
+
+          #define INCLUDE_DEFAULTS \
+          {                                       \
+            { "GNU_GXX_INCLUDE:", "G++", 1, 1},   \
+            { "GNU_CC_INCLUDE:", "GCC", 0, 0},    \
+            { "SYS$SYSROOT:[SYSLIB.]", 0, 0, 0},  \
+            { ".", 0, 0, 0},                      \
+            { 0, 0, 0, 0}                         \
+          }
+
+ Here is the order of prefixes tried for exec files:
+
+  1. Any prefixes specified by the user with `-B'.
+
+  2. The environment variable `GCC_EXEC_PREFIX' or, if `GCC_EXEC_PREFIX'
+     is not set and the compiler has not been installed in the
+     configure-time PREFIX, the location in which the compiler has
+     actually been installed.
+
+  3. The directories specified by the environment variable
+     `COMPILER_PATH'.
+
+  4. The macro `STANDARD_EXEC_PREFIX', if the compiler has been
+     installed in the configured-time PREFIX.
+
+  5. The location `/usr/libexec/gcc/', but only if this is a native
+     compiler.
+
+  6. The location `/usr/lib/gcc/', but only if this is a native
+     compiler.
+
+  7. The macro `MD_EXEC_PREFIX', if defined, but only if this is a
+     native compiler.
+
+ Here is the order of prefixes tried for startfiles:
+
+  1. Any prefixes specified by the user with `-B'.
+
+  2. The environment variable `GCC_EXEC_PREFIX' or its automatically
+     determined value based on the installed toolchain location.
+
+  3. The directories specified by the environment variable
+     `LIBRARY_PATH' (or port-specific name; native only, cross
+     compilers do not use this).
+
+  4. The macro `STANDARD_EXEC_PREFIX', but only if the toolchain is
+     installed in the configured PREFIX or this is a native compiler.
+
+  5. The location `/usr/lib/gcc/', but only if this is a native
+     compiler.
+
+  6. The macro `MD_EXEC_PREFIX', if defined, but only if this is a
+     native compiler.
+
+  7. The macro `MD_STARTFILE_PREFIX', if defined, but only if this is a
+     native compiler, or we have a target system root.
+
+  8. The macro `MD_STARTFILE_PREFIX_1', if defined, but only if this is
+     a native compiler, or we have a target system root.
+
+  9. The macro `STANDARD_STARTFILE_PREFIX', with any sysroot
+     modifications.  If this path is relative it will be prefixed by
+     `GCC_EXEC_PREFIX' and the machine suffix or `STANDARD_EXEC_PREFIX'
+     and the machine suffix.
+
+ 10. The macro `STANDARD_STARTFILE_PREFIX_1', but only if this is a
+     native compiler, or we have a target system root. The default for
+     this macro is `/lib/'.
+
+ 11. The macro `STANDARD_STARTFILE_PREFIX_2', but only if this is a
+     native compiler, or we have a target system root. The default for
+     this macro is `/usr/lib/'.
+
+
+File: gccint.info,  Node: Run-time Target,  Next: Per-Function Data,  Prev: Driver,  Up: Target Macros
+
+17.3 Run-time Target Specification
+==================================
+
+Here are run-time target specifications.
+
+ -- Macro: TARGET_CPU_CPP_BUILTINS ()
+     This function-like macro expands to a block of code that defines
+     built-in preprocessor macros and assertions for the target CPU,
+     using the functions `builtin_define', `builtin_define_std' and
+     `builtin_assert'.  When the front end calls this macro it provides
+     a trailing semicolon, and since it has finished command line
+     option processing your code can use those results freely.
+
+     `builtin_assert' takes a string in the form you pass to the
+     command-line option `-A', such as `cpu=mips', and creates the
+     assertion.  `builtin_define' takes a string in the form accepted
+     by option `-D' and unconditionally defines the macro.
+
+     `builtin_define_std' takes a string representing the name of an
+     object-like macro.  If it doesn't lie in the user's namespace,
+     `builtin_define_std' defines it unconditionally.  Otherwise, it
+     defines a version with two leading underscores, and another version
+     with two leading and trailing underscores, and defines the original
+     only if an ISO standard was not requested on the command line.  For
+     example, passing `unix' defines `__unix', `__unix__' and possibly
+     `unix'; passing `_mips' defines `__mips', `__mips__' and possibly
+     `_mips', and passing `_ABI64' defines only `_ABI64'.
+
+     You can also test for the C dialect being compiled.  The variable
+     `c_language' is set to one of `clk_c', `clk_cplusplus' or
+     `clk_objective_c'.  Note that if we are preprocessing assembler,
+     this variable will be `clk_c' but the function-like macro
+     `preprocessing_asm_p()' will return true, so you might want to
+     check for that first.  If you need to check for strict ANSI, the
+     variable `flag_iso' can be used.  The function-like macro
+     `preprocessing_trad_p()' can be used to check for traditional
+     preprocessing.
+
+ -- Macro: TARGET_OS_CPP_BUILTINS ()
+     Similarly to `TARGET_CPU_CPP_BUILTINS' but this macro is optional
+     and is used for the target operating system instead.
+
+ -- Macro: TARGET_OBJFMT_CPP_BUILTINS ()
+     Similarly to `TARGET_CPU_CPP_BUILTINS' but this macro is optional
+     and is used for the target object format.  `elfos.h' uses this
+     macro to define `__ELF__', so you probably do not need to define
+     it yourself.
+
+ -- Variable: extern int target_flags
+     This variable is declared in `options.h', which is included before
+     any target-specific headers.
+
+ -- Target Hook: int TARGET_DEFAULT_TARGET_FLAGS
+     This variable specifies the initial value of `target_flags'.  Its
+     default setting is 0.
+
+ -- Target Hook: bool TARGET_HANDLE_OPTION (size_t CODE, const char
+          *ARG, int VALUE)
+     This hook is called whenever the user specifies one of the
+     target-specific options described by the `.opt' definition files
+     (*note Options::).  It has the opportunity to do some
+     option-specific processing and should return true if the option is
+     valid.  The default definition does nothing but return true.
+
+     CODE specifies the `OPT_NAME' enumeration value associated with
+     the selected option; NAME is just a rendering of the option name
+     in which non-alphanumeric characters are replaced by underscores.
+     ARG specifies the string argument and is null if no argument was
+     given.  If the option is flagged as a `UInteger' (*note Option
+     properties::), VALUE is the numeric value of the argument.
+     Otherwise VALUE is 1 if the positive form of the option was used
+     and 0 if the "no-" form was.
+
+ -- Target Hook: bool TARGET_HANDLE_C_OPTION (size_t CODE, const char
+          *ARG, int VALUE)
+     This target hook is called whenever the user specifies one of the
+     target-specific C language family options described by the `.opt'
+     definition files(*note Options::).  It has the opportunity to do
+     some option-specific processing and should return true if the
+     option is valid.  The arguments are like for
+     `TARGET_HANDLE_OPTION'.  The default definition does nothing but
+     return false.
+
+     In general, you should use `TARGET_HANDLE_OPTION' to handle
+     options.  However, if processing an option requires routines that
+     are only available in the C (and related language) front ends,
+     then you should use `TARGET_HANDLE_C_OPTION' instead.
+
+ -- Target Hook: tree TARGET_OBJC_CONSTRUCT_STRING_OBJECT (tree STRING)
+     Targets may provide a string object type that can be used within
+     and between C, C++ and their respective Objective-C dialects. A
+     string object might, for example, embed encoding and length
+     information. These objects are considered opaque to the compiler
+     and handled as references. An ideal implementation makes the
+     composition of the string object match that of the Objective-C
+     `NSString' (`NXString' for GNUStep), allowing efficient
+     interworking between C-only and Objective-C code. If a target
+     implements string objects then this hook should return a reference
+     to such an object constructed from the normal `C' string
+     representation provided in STRING. At present, the hook is used by
+     Objective-C only, to obtain a common-format string object when the
+     target provides one.
+
+ -- Target Hook: bool TARGET_STRING_OBJECT_REF_TYPE_P (const_tree
+          STRINGREF)
+     If a target implements string objects then this hook should return
+     `true' if STRINGREF is a valid reference to such an object.
+
+ -- Target Hook: void TARGET_CHECK_STRING_OBJECT_FORMAT_ARG (tree
+          FORMAT_ARG, tree ARGS_LIST)
+     If a target implements string objects then this hook should should
+     provide a facility to check the function arguments in ARGS_LIST
+     against the format specifiers in FORMAT_ARG where the type of
+     FORMAT_ARG is one recognized as a valid string reference type.
+
+ -- Macro: TARGET_VERSION
+     This macro is a C statement to print on `stderr' a string
+     describing the particular machine description choice.  Every
+     machine description should define `TARGET_VERSION'.  For example:
+
+          #ifdef MOTOROLA
+          #define TARGET_VERSION \
+            fprintf (stderr, " (68k, Motorola syntax)");
+          #else
+          #define TARGET_VERSION \
+            fprintf (stderr, " (68k, MIT syntax)");
+          #endif
+
+ -- Target Hook: void TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE (void)
+     This target function is similar to the hook
+     `TARGET_OPTION_OVERRIDE' but is called when the optimize level is
+     changed via an attribute or pragma or when it is reset at the end
+     of the code affected by the attribute or pragma.  It is not called
+     at the beginning of compilation when `TARGET_OPTION_OVERRIDE' is
+     called so if you want to perform these actions then, you should
+     have `TARGET_OPTION_OVERRIDE' call
+     `TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE'.
+
+ -- Macro: C_COMMON_OVERRIDE_OPTIONS
+     This is similar to the `TARGET_OPTION_OVERRIDE' hook but is only
+     used in the C language frontends (C, Objective-C, C++,
+     Objective-C++) and so can be used to alter option flag variables
+     which only exist in those frontends.
+
+ -- Target Hook: const struct default_options *
+TARGET_OPTION_OPTIMIZATION_TABLE
+     Some machines may desire to change what optimizations are
+     performed for various optimization levels.   This variable, if
+     defined, describes options to enable at particular sets of
+     optimization levels.  These options are processed once just after
+     the optimization level is determined and before the remainder of
+     the command options have been parsed, so may be overridden by other
+     options passed explicitly.
+
+     This processing is run once at program startup and when the
+     optimization options are changed via `#pragma GCC optimize' or by
+     using the `optimize' attribute.
+
+ -- Target Hook: void TARGET_OPTION_INIT_STRUCT (struct gcc_options
+          *OPTS)
+     Set target-dependent initial values of fields in OPTS.
+
+ -- Target Hook: void TARGET_OPTION_DEFAULT_PARAMS (void)
+     Set target-dependent default values for `--param' settings, using
+     calls to `set_default_param_value'.
+
+ -- Target Hook: void TARGET_HELP (void)
+     This hook is called in response to the user invoking
+     `--target-help' on the command line.  It gives the target a chance
+     to display extra information on the target specific command line
+     options found in its `.opt' file.
+
+ -- Macro: SWITCHABLE_TARGET
+     Some targets need to switch between substantially different
+     subtargets during compilation.  For example, the MIPS target has
+     one subtarget for the traditional MIPS architecture and another
+     for MIPS16.  Source code can switch between these two
+     subarchitectures using the `mips16' and `nomips16' attributes.
+
+     Such subtargets can differ in things like the set of available
+     registers, the set of available instructions, the costs of various
+     operations, and so on.  GCC caches a lot of this type of
+     information in global variables, and recomputing them for each
+     subtarget takes a significant amount of time.  The compiler
+     therefore provides a facility for maintaining several versions of
+     the global variables and quickly switching between them; see
+     `target-globals.h' for details.
+
+     Define this macro to 1 if your target needs this facility.  The
+     default is 0.
+
+
+File: gccint.info,  Node: Per-Function Data,  Next: Storage Layout,  Prev: Run-time Target,  Up: Target Macros
+
+17.4 Defining data structures for per-function information.
+===========================================================
+
+If the target needs to store information on a per-function basis, GCC
+provides a macro and a couple of variables to allow this.  Note, just
+using statics to store the information is a bad idea, since GCC supports
+nested functions, so you can be halfway through encoding one function
+when another one comes along.
+
+ GCC defines a data structure called `struct function' which contains
+all of the data specific to an individual function.  This structure
+contains a field called `machine' whose type is `struct
+machine_function *', which can be used by targets to point to their own
+specific data.
+
+ If a target needs per-function specific data it should define the type
+`struct machine_function' and also the macro `INIT_EXPANDERS'.  This
+macro should be used to initialize the function pointer
+`init_machine_status'.  This pointer is explained below.
+
+ One typical use of per-function, target specific data is to create an
+RTX to hold the register containing the function's return address.  This
+RTX can then be used to implement the `__builtin_return_address'
+function, for level 0.
+
+ Note--earlier implementations of GCC used a single data area to hold
+all of the per-function information.  Thus when processing of a nested
+function began the old per-function data had to be pushed onto a stack,
+and when the processing was finished, it had to be popped off the
+stack.  GCC used to provide function pointers called
+`save_machine_status' and `restore_machine_status' to handle the saving
+and restoring of the target specific information.  Since the single
+data area approach is no longer used, these pointers are no longer
+supported.
+
+ -- Macro: INIT_EXPANDERS
+     Macro called to initialize any target specific information.  This
+     macro is called once per function, before generation of any RTL
+     has begun.  The intention of this macro is to allow the
+     initialization of the function pointer `init_machine_status'.
+
+ -- Variable: void (*)(struct function *) init_machine_status
+     If this function pointer is non-`NULL' it will be called once per
+     function, before function compilation starts, in order to allow the
+     target to perform any target specific initialization of the
+     `struct function' structure.  It is intended that this would be
+     used to initialize the `machine' of that structure.
+
+     `struct machine_function' structures are expected to be freed by
+     GC.  Generally, any memory that they reference must be allocated
+     by using GC allocation, including the structure itself.
+
+
+File: gccint.info,  Node: Storage Layout,  Next: Type Layout,  Prev: Per-Function Data,  Up: Target Macros
+
+17.5 Storage Layout
+===================
+
+Note that the definitions of the macros in this table which are sizes or
+alignments measured in bits do not need to be constant.  They can be C
+expressions that refer to static variables, such as the `target_flags'.
+*Note Run-time Target::.
+
+ -- Macro: BITS_BIG_ENDIAN
+     Define this macro to have the value 1 if the most significant bit
+     in a byte has the lowest number; otherwise define it to have the
+     value zero.  This means that bit-field instructions count from the
+     most significant bit.  If the machine has no bit-field
+     instructions, then this must still be defined, but it doesn't
+     matter which value it is defined to.  This macro need not be a
+     constant.
+
+     This macro does not affect the way structure fields are packed into
+     bytes or words; that is controlled by `BYTES_BIG_ENDIAN'.
+
+ -- Macro: BYTES_BIG_ENDIAN
+     Define this macro to have the value 1 if the most significant byte
+     in a word has the lowest number.  This macro need not be a
+     constant.
+
+ -- Macro: WORDS_BIG_ENDIAN
+     Define this macro to have the value 1 if, in a multiword object,
+     the most significant word has the lowest number.  This applies to
+     both memory locations and registers; GCC fundamentally assumes
+     that the order of words in memory is the same as the order in
+     registers.  This macro need not be a constant.
+
+ -- Macro: FLOAT_WORDS_BIG_ENDIAN
+     Define this macro to have the value 1 if `DFmode', `XFmode' or
+     `TFmode' floating point numbers are stored in memory with the word
+     containing the sign bit at the lowest address; otherwise define it
+     to have the value 0.  This macro need not be a constant.
+
+     You need not define this macro if the ordering is the same as for
+     multi-word integers.
+
+ -- Macro: BITS_PER_UNIT
+     Define this macro to be the number of bits in an addressable
+     storage unit (byte).  If you do not define this macro the default
+     is 8.
+
+ -- Macro: BITS_PER_WORD
+     Number of bits in a word.  If you do not define this macro, the
+     default is `BITS_PER_UNIT * UNITS_PER_WORD'.
+
+ -- Macro: MAX_BITS_PER_WORD
+     Maximum number of bits in a word.  If this is undefined, the
+     default is `BITS_PER_WORD'.  Otherwise, it is the constant value
+     that is the largest value that `BITS_PER_WORD' can have at
+     run-time.
+
+ -- Macro: UNITS_PER_WORD
+     Number of storage units in a word; normally the size of a
+     general-purpose register, a power of two from 1 or 8.
+
+ -- Macro: MIN_UNITS_PER_WORD
+     Minimum number of units in a word.  If this is undefined, the
+     default is `UNITS_PER_WORD'.  Otherwise, it is the constant value
+     that is the smallest value that `UNITS_PER_WORD' can have at
+     run-time.
+
+ -- Macro: POINTER_SIZE
+     Width of a pointer, in bits.  You must specify a value no wider
+     than the width of `Pmode'.  If it is not equal to the width of
+     `Pmode', you must define `POINTERS_EXTEND_UNSIGNED'.  If you do
+     not specify a value the default is `BITS_PER_WORD'.
+
+ -- Macro: POINTERS_EXTEND_UNSIGNED
+     A C expression that determines how pointers should be extended from
+     `ptr_mode' to either `Pmode' or `word_mode'.  It is greater than
+     zero if pointers should be zero-extended, zero if they should be
+     sign-extended, and negative if some other sort of conversion is
+     needed.  In the last case, the extension is done by the target's
+     `ptr_extend' instruction.
+
+     You need not define this macro if the `ptr_mode', `Pmode' and
+     `word_mode' are all the same width.
+
+ -- Macro: PROMOTE_MODE (M, UNSIGNEDP, TYPE)
+     A macro to update M and UNSIGNEDP when an object whose type is
+     TYPE and which has the specified mode and signedness is to be
+     stored in a register.  This macro is only called when TYPE is a
+     scalar type.
+
+     On most RISC machines, which only have operations that operate on
+     a full register, define this macro to set M to `word_mode' if M is
+     an integer mode narrower than `BITS_PER_WORD'.  In most cases,
+     only integer modes should be widened because wider-precision
+     floating-point operations are usually more expensive than their
+     narrower counterparts.
+
+     For most machines, the macro definition does not change UNSIGNEDP.
+     However, some machines, have instructions that preferentially
+     handle either signed or unsigned quantities of certain modes.  For
+     example, on the DEC Alpha, 32-bit loads from memory and 32-bit add
+     instructions sign-extend the result to 64 bits.  On such machines,
+     set UNSIGNEDP according to which kind of extension is more
+     efficient.
+
+     Do not define this macro if it would never modify M.
+
+ -- Target Hook: enum machine_mode TARGET_PROMOTE_FUNCTION_MODE
+          (const_tree TYPE, enum machine_mode MODE, int *PUNSIGNEDP,
+          const_tree FUNTYPE, int FOR_RETURN)
+     Like `PROMOTE_MODE', but it is applied to outgoing function
+     arguments or function return values.  The target hook should
+     return the new mode and possibly change `*PUNSIGNEDP' if the
+     promotion should change signedness.  This function is called only
+     for scalar _or pointer_ types.
+
+     FOR_RETURN allows to distinguish the promotion of arguments and
+     return values.  If it is `1', a return value is being promoted and
+     `TARGET_FUNCTION_VALUE' must perform the same promotions done here.
+     If it is `2', the returned mode should be that of the register in
+     which an incoming parameter is copied, or the outgoing result is
+     computed; then the hook should return the same mode as
+     `promote_mode', though the signedness may be different.
+
+     The default is to not promote arguments and return values.  You can
+     also define the hook to
+     `default_promote_function_mode_always_promote' if you would like
+     to apply the same rules given by `PROMOTE_MODE'.
+
+ -- Macro: PARM_BOUNDARY
+     Normal alignment required for function parameters on the stack, in
+     bits.  All stack parameters receive at least this much alignment
+     regardless of data type.  On most machines, this is the same as the
+     size of an integer.
+
+ -- Macro: STACK_BOUNDARY
+     Define this macro to the minimum alignment enforced by hardware
+     for the stack pointer on this machine.  The definition is a C
+     expression for the desired alignment (measured in bits).  This
+     value is used as a default if `PREFERRED_STACK_BOUNDARY' is not
+     defined.  On most machines, this should be the same as
+     `PARM_BOUNDARY'.
+
+ -- Macro: PREFERRED_STACK_BOUNDARY
+     Define this macro if you wish to preserve a certain alignment for
+     the stack pointer, greater than what the hardware enforces.  The
+     definition is a C expression for the desired alignment (measured
+     in bits).  This macro must evaluate to a value equal to or larger
+     than `STACK_BOUNDARY'.
+
+ -- Macro: INCOMING_STACK_BOUNDARY
+     Define this macro if the incoming stack boundary may be different
+     from `PREFERRED_STACK_BOUNDARY'.  This macro must evaluate to a
+     value equal to or larger than `STACK_BOUNDARY'.
+
+ -- Macro: FUNCTION_BOUNDARY
+     Alignment required for a function entry point, in bits.
+
+ -- Macro: BIGGEST_ALIGNMENT
+     Biggest alignment that any data type can require on this machine,
+     in bits.  Note that this is not the biggest alignment that is
+     supported, just the biggest alignment that, when violated, may
+     cause a fault.
+
+ -- Macro: MALLOC_ABI_ALIGNMENT
+     Alignment, in bits, a C conformant malloc implementation has to
+     provide.  If not defined, the default value is `BITS_PER_WORD'.
+
+ -- Macro: ATTRIBUTE_ALIGNED_VALUE
+     Alignment used by the `__attribute__ ((aligned))' construct.  If
+     not defined, the default value is `BIGGEST_ALIGNMENT'.
+
+ -- Macro: MINIMUM_ATOMIC_ALIGNMENT
+     If defined, the smallest alignment, in bits, that can be given to
+     an object that can be referenced in one operation, without
+     disturbing any nearby object.  Normally, this is `BITS_PER_UNIT',
+     but may be larger on machines that don't have byte or half-word
+     store operations.
+
+ -- Macro: BIGGEST_FIELD_ALIGNMENT
+     Biggest alignment that any structure or union field can require on
+     this machine, in bits.  If defined, this overrides
+     `BIGGEST_ALIGNMENT' for structure and union fields only, unless
+     the field alignment has been set by the `__attribute__ ((aligned
+     (N)))' construct.
+
+ -- Macro: ADJUST_FIELD_ALIGN (FIELD, COMPUTED)
+     An expression for the alignment of a structure field FIELD if the
+     alignment computed in the usual way (including applying of
+     `BIGGEST_ALIGNMENT' and `BIGGEST_FIELD_ALIGNMENT' to the
+     alignment) is COMPUTED.  It overrides alignment only if the field
+     alignment has not been set by the `__attribute__ ((aligned (N)))'
+     construct.
+
+ -- Macro: MAX_STACK_ALIGNMENT
+     Biggest stack alignment guaranteed by the backend.  Use this macro
+     to specify the maximum alignment of a variable on stack.
+
+     If not defined, the default value is `STACK_BOUNDARY'.
+
+
+ -- Macro: MAX_OFILE_ALIGNMENT
+     Biggest alignment supported by the object file format of this
+     machine.  Use this macro to limit the alignment which can be
+     specified using the `__attribute__ ((aligned (N)))' construct.  If
+     not defined, the default value is `BIGGEST_ALIGNMENT'.
+
+     On systems that use ELF, the default (in `config/elfos.h') is the
+     largest supported 32-bit ELF section alignment representable on a
+     32-bit host e.g. `(((unsigned HOST_WIDEST_INT) 1 << 28) * 8)'.  On
+     32-bit ELF the largest supported section alignment in bits is
+     `(0x80000000 * 8)', but this is not representable on 32-bit hosts.
+
+ -- Macro: DATA_ALIGNMENT (TYPE, BASIC-ALIGN)
+     If defined, a C expression to compute the alignment for a variable
+     in the static store.  TYPE is the data type, and BASIC-ALIGN is
+     the alignment that the object would ordinarily have.  The value of
+     this macro is used instead of that alignment to align the object.
+
+     If this macro is not defined, then BASIC-ALIGN is used.
+
+     One use of this macro is to increase alignment of medium-size data
+     to make it all fit in fewer cache lines.  Another is to cause
+     character arrays to be word-aligned so that `strcpy' calls that
+     copy constants to character arrays can be done inline.
+
+ -- Macro: CONSTANT_ALIGNMENT (CONSTANT, BASIC-ALIGN)
+     If defined, a C expression to compute the alignment given to a
+     constant that is being placed in memory.  CONSTANT is the constant
+     and BASIC-ALIGN is the alignment that the object would ordinarily
+     have.  The value of this macro is used instead of that alignment to
+     align the object.
+
+     If this macro is not defined, then BASIC-ALIGN is used.
+
+     The typical use of this macro is to increase alignment for string
+     constants to be word aligned so that `strcpy' calls that copy
+     constants can be done inline.
+
+ -- Macro: LOCAL_ALIGNMENT (TYPE, BASIC-ALIGN)
+     If defined, a C expression to compute the alignment for a variable
+     in the local store.  TYPE is the data type, and BASIC-ALIGN is the
+     alignment that the object would ordinarily have.  The value of this
+     macro is used instead of that alignment to align the object.
+
+     If this macro is not defined, then BASIC-ALIGN is used.
+
+     One use of this macro is to increase alignment of medium-size data
+     to make it all fit in fewer cache lines.
+
+     If the value of this macro has a type, it should be an unsigned
+     type.
+
+ -- Target Hook: HOST_WIDE_INT TARGET_VECTOR_ALIGNMENT (const_tree TYPE)
+     This hook can be used to define the alignment for a vector of type
+     TYPE, in order to comply with a platform ABI.  The default is to
+     require natural alignment for vector types.  The alignment
+     returned by this hook must be a power-of-two multiple of the
+     default alignment of the vector element type.
+
+ -- Macro: STACK_SLOT_ALIGNMENT (TYPE, MODE, BASIC-ALIGN)
+     If defined, a C expression to compute the alignment for stack slot.
+     TYPE is the data type, MODE is the widest mode available, and
+     BASIC-ALIGN is the alignment that the slot would ordinarily have.
+     The value of this macro is used instead of that alignment to align
+     the slot.
+
+     If this macro is not defined, then BASIC-ALIGN is used when TYPE
+     is `NULL'.  Otherwise, `LOCAL_ALIGNMENT' will be used.
+
+     This macro is to set alignment of stack slot to the maximum
+     alignment of all possible modes which the slot may have.
+
+     If the value of this macro has a type, it should be an unsigned
+     type.
+
+ -- Macro: LOCAL_DECL_ALIGNMENT (DECL)
+     If defined, a C expression to compute the alignment for a local
+     variable DECL.
+
+     If this macro is not defined, then `LOCAL_ALIGNMENT (TREE_TYPE
+     (DECL), DECL_ALIGN (DECL))' is used.
+
+     One use of this macro is to increase alignment of medium-size data
+     to make it all fit in fewer cache lines.
+
+     If the value of this macro has a type, it should be an unsigned
+     type.
+
+ -- Macro: MINIMUM_ALIGNMENT (EXP, MODE, ALIGN)
+     If defined, a C expression to compute the minimum required
+     alignment for dynamic stack realignment purposes for EXP (a type
+     or decl), MODE, assuming normal alignment ALIGN.
+
+     If this macro is not defined, then ALIGN will be used.
+
+ -- Macro: EMPTY_FIELD_BOUNDARY
+     Alignment in bits to be given to a structure bit-field that
+     follows an empty field such as `int : 0;'.
+
+     If `PCC_BITFIELD_TYPE_MATTERS' is true, it overrides this macro.
+
+ -- Macro: STRUCTURE_SIZE_BOUNDARY
+     Number of bits which any structure or union's size must be a
+     multiple of.  Each structure or union's size is rounded up to a
+     multiple of this.
+
+     If you do not define this macro, the default is the same as
+     `BITS_PER_UNIT'.
+
+ -- Macro: STRICT_ALIGNMENT
+     Define this macro to be the value 1 if instructions will fail to
+     work if given data not on the nominal alignment.  If instructions
+     will merely go slower in that case, define this macro as 0.
+
+ -- Macro: PCC_BITFIELD_TYPE_MATTERS
+     Define this if you wish to imitate the way many other C compilers
+     handle alignment of bit-fields and the structures that contain
+     them.
+
+     The behavior is that the type written for a named bit-field (`int',
+     `short', or other integer type) imposes an alignment for the entire
+     structure, as if the structure really did contain an ordinary
+     field of that type.  In addition, the bit-field is placed within
+     the structure so that it would fit within such a field, not
+     crossing a boundary for it.
+
+     Thus, on most machines, a named bit-field whose type is written as
+     `int' would not cross a four-byte boundary, and would force
+     four-byte alignment for the whole structure.  (The alignment used
+     may not be four bytes; it is controlled by the other alignment
+     parameters.)
+
+     An unnamed bit-field will not affect the alignment of the
+     containing structure.
+
+     If the macro is defined, its definition should be a C expression;
+     a nonzero value for the expression enables this behavior.
+
+     Note that if this macro is not defined, or its value is zero, some
+     bit-fields may cross more than one alignment boundary.  The
+     compiler can support such references if there are `insv', `extv',
+     and `extzv' insns that can directly reference memory.
+
+     The other known way of making bit-fields work is to define
+     `STRUCTURE_SIZE_BOUNDARY' as large as `BIGGEST_ALIGNMENT'.  Then
+     every structure can be accessed with fullwords.
+
+     Unless the machine has bit-field instructions or you define
+     `STRUCTURE_SIZE_BOUNDARY' that way, you must define
+     `PCC_BITFIELD_TYPE_MATTERS' to have a nonzero value.
+
+     If your aim is to make GCC use the same conventions for laying out
+     bit-fields as are used by another compiler, here is how to
+     investigate what the other compiler does.  Compile and run this
+     program:
+
+          struct foo1
+          {
+            char x;
+            char :0;
+            char y;
+          };
+
+          struct foo2
+          {
+            char x;
+            int :0;
+            char y;
+          };
+
+          main ()
+          {
+            printf ("Size of foo1 is %d\n",
+                    sizeof (struct foo1));
+            printf ("Size of foo2 is %d\n",
+                    sizeof (struct foo2));
+            exit (0);
+          }
+
+     If this prints 2 and 5, then the compiler's behavior is what you
+     would get from `PCC_BITFIELD_TYPE_MATTERS'.
+
+ -- Macro: BITFIELD_NBYTES_LIMITED
+     Like `PCC_BITFIELD_TYPE_MATTERS' except that its effect is limited
+     to aligning a bit-field within the structure.
+
+ -- Target Hook: bool TARGET_ALIGN_ANON_BITFIELD (void)
+     When `PCC_BITFIELD_TYPE_MATTERS' is true this hook will determine
+     whether unnamed bitfields affect the alignment of the containing
+     structure.  The hook should return true if the structure should
+     inherit the alignment requirements of an unnamed bitfield's type.
+
+ -- Target Hook: bool TARGET_NARROW_VOLATILE_BITFIELD (void)
+     This target hook should return `true' if accesses to volatile
+     bitfields should use the narrowest mode possible.  It should
+     return `false' if these accesses should use the bitfield container
+     type.
+
+     The default is `!TARGET_STRICT_ALIGN'.
+
+ -- Macro: MEMBER_TYPE_FORCES_BLK (FIELD, MODE)
+     Return 1 if a structure or array containing FIELD should be
+     accessed using `BLKMODE'.
+
+     If FIELD is the only field in the structure, MODE is its mode,
+     otherwise MODE is VOIDmode.  MODE is provided in the case where
+     structures of one field would require the structure's mode to
+     retain the field's mode.
+
+     Normally, this is not needed.
+
+ -- Macro: ROUND_TYPE_ALIGN (TYPE, COMPUTED, SPECIFIED)
+     Define this macro as an expression for the alignment of a type
+     (given by TYPE as a tree node) if the alignment computed in the
+     usual way is COMPUTED and the alignment explicitly specified was
+     SPECIFIED.
+
+     The default is to use SPECIFIED if it is larger; otherwise, use
+     the smaller of COMPUTED and `BIGGEST_ALIGNMENT'
+
+ -- Macro: MAX_FIXED_MODE_SIZE
+     An integer expression for the size in bits of the largest integer
+     machine mode that should actually be used.  All integer machine
+     modes of this size or smaller can be used for structures and
+     unions with the appropriate sizes.  If this macro is undefined,
+     `GET_MODE_BITSIZE (DImode)' is assumed.
+
+ -- Macro: STACK_SAVEAREA_MODE (SAVE_LEVEL)
+     If defined, an expression of type `enum machine_mode' that
+     specifies the mode of the save area operand of a
+     `save_stack_LEVEL' named pattern (*note Standard Names::).
+     SAVE_LEVEL is one of `SAVE_BLOCK', `SAVE_FUNCTION', or
+     `SAVE_NONLOCAL' and selects which of the three named patterns is
+     having its mode specified.
+
+     You need not define this macro if it always returns `Pmode'.  You
+     would most commonly define this macro if the `save_stack_LEVEL'
+     patterns need to support both a 32- and a 64-bit mode.
+
+ -- Macro: STACK_SIZE_MODE
+     If defined, an expression of type `enum machine_mode' that
+     specifies the mode of the size increment operand of an
+     `allocate_stack' named pattern (*note Standard Names::).
+
+     You need not define this macro if it always returns `word_mode'.
+     You would most commonly define this macro if the `allocate_stack'
+     pattern needs to support both a 32- and a 64-bit mode.
+
+ -- Target Hook: enum machine_mode TARGET_LIBGCC_CMP_RETURN_MODE (void)
+     This target hook should return the mode to be used for the return
+     value of compare instructions expanded to libgcc calls.  If not
+     defined `word_mode' is returned which is the right choice for a
+     majority of targets.
+
+ -- Target Hook: enum machine_mode TARGET_LIBGCC_SHIFT_COUNT_MODE (void)
+     This target hook should return the mode to be used for the shift
+     count operand of shift instructions expanded to libgcc calls.  If
+     not defined `word_mode' is returned which is the right choice for
+     a majority of targets.
+
+ -- Target Hook: enum machine_mode TARGET_UNWIND_WORD_MODE (void)
+     Return machine mode to be used for `_Unwind_Word' type.  The
+     default is to use `word_mode'.
+
+ -- Macro: ROUND_TOWARDS_ZERO
+     If defined, this macro should be true if the prevailing rounding
+     mode is towards zero.
+
+     Defining this macro only affects the way `libgcc.a' emulates
+     floating-point arithmetic.
+
+     Not defining this macro is equivalent to returning zero.
+
+ -- Macro: LARGEST_EXPONENT_IS_NORMAL (SIZE)
+     This macro should return true if floats with SIZE bits do not have
+     a NaN or infinity representation, but use the largest exponent for
+     normal numbers instead.
+
+     Defining this macro only affects the way `libgcc.a' emulates
+     floating-point arithmetic.
+
+     The default definition of this macro returns false for all sizes.
+
+ -- Target Hook: bool TARGET_MS_BITFIELD_LAYOUT_P (const_tree
+          RECORD_TYPE)
+     This target hook returns `true' if bit-fields in the given
+     RECORD_TYPE are to be laid out following the rules of Microsoft
+     Visual C/C++, namely: (i) a bit-field won't share the same storage
+     unit with the previous bit-field if their underlying types have
+     different sizes, and the bit-field will be aligned to the highest
+     alignment of the underlying types of itself and of the previous
+     bit-field; (ii) a zero-sized bit-field will affect the alignment of
+     the whole enclosing structure, even if it is unnamed; except that
+     (iii) a zero-sized bit-field will be disregarded unless it follows
+     another bit-field of nonzero size.  If this hook returns `true',
+     other macros that control bit-field layout are ignored.
+
+     When a bit-field is inserted into a packed record, the whole size
+     of the underlying type is used by one or more same-size adjacent
+     bit-fields (that is, if its long:3, 32 bits is used in the record,
+     and any additional adjacent long bit-fields are packed into the
+     same chunk of 32 bits.  However, if the size changes, a new field
+     of that size is allocated).  In an unpacked record, this is the
+     same as using alignment, but not equivalent when packing.
+
+     If both MS bit-fields and `__attribute__((packed))' are used, the
+     latter will take precedence.  If `__attribute__((packed))' is used
+     on a single field when MS bit-fields are in use, it will take
+     precedence for that field, but the alignment of the rest of the
+     structure may affect its placement.
+
+ -- Target Hook: bool TARGET_DECIMAL_FLOAT_SUPPORTED_P (void)
+     Returns true if the target supports decimal floating point.
+
+ -- Target Hook: bool TARGET_FIXED_POINT_SUPPORTED_P (void)
+     Returns true if the target supports fixed-point arithmetic.
+
+ -- Target Hook: void TARGET_EXPAND_TO_RTL_HOOK (void)
+     This hook is called just before expansion into rtl, allowing the
+     target to perform additional initializations or analysis before
+     the expansion.  For example, the rs6000 port uses it to allocate a
+     scratch stack slot for use in copying SDmode values between memory
+     and floating point registers whenever the function being expanded
+     has any SDmode usage.
+
+ -- Target Hook: void TARGET_INSTANTIATE_DECLS (void)
+     This hook allows the backend to perform additional instantiations
+     on rtl that are not actually in any insns yet, but will be later.
+
+ -- Target Hook: const char * TARGET_MANGLE_TYPE (const_tree TYPE)
+     If your target defines any fundamental types, or any types your
+     target uses should be mangled differently from the default, define
+     this hook to return the appropriate encoding for these types as
+     part of a C++ mangled name.  The TYPE argument is the tree
+     structure representing the type to be mangled.  The hook may be
+     applied to trees which are not target-specific fundamental types;
+     it should return `NULL' for all such types, as well as arguments
+     it does not recognize.  If the return value is not `NULL', it must
+     point to a statically-allocated string constant.
+
+     Target-specific fundamental types might be new fundamental types or
+     qualified versions of ordinary fundamental types.  Encode new
+     fundamental types as `u N NAME', where NAME is the name used for
+     the type in source code, and N is the length of NAME in decimal.
+     Encode qualified versions of ordinary types as `U N NAME CODE',
+     where NAME is the name used for the type qualifier in source code,
+     N is the length of NAME as above, and CODE is the code used to
+     represent the unqualified version of this type.  (See
+     `write_builtin_type' in `cp/mangle.c' for the list of codes.)  In
+     both cases the spaces are for clarity; do not include any spaces
+     in your string.
+
+     This hook is applied to types prior to typedef resolution.  If the
+     mangled name for a particular type depends only on that type's
+     main variant, you can perform typedef resolution yourself using
+     `TYPE_MAIN_VARIANT' before mangling.
+
+     The default version of this hook always returns `NULL', which is
+     appropriate for a target that does not define any new fundamental
+     types.
+
+
+File: gccint.info,  Node: Type Layout,  Next: Registers,  Prev: Storage Layout,  Up: Target Macros
+
+17.6 Layout of Source Language Data Types
+=========================================
+
+These macros define the sizes and other characteristics of the standard
+basic data types used in programs being compiled.  Unlike the macros in
+the previous section, these apply to specific features of C and related
+languages, rather than to fundamental aspects of storage layout.
+
+ -- Macro: INT_TYPE_SIZE
+     A C expression for the size in bits of the type `int' on the
+     target machine.  If you don't define this, the default is one word.
+
+ -- Macro: SHORT_TYPE_SIZE
+     A C expression for the size in bits of the type `short' on the
+     target machine.  If you don't define this, the default is half a
+     word.  (If this would be less than one storage unit, it is rounded
+     up to one unit.)
+
+ -- Macro: LONG_TYPE_SIZE
+     A C expression for the size in bits of the type `long' on the
+     target machine.  If you don't define this, the default is one word.
+
+ -- Macro: ADA_LONG_TYPE_SIZE
+     On some machines, the size used for the Ada equivalent of the type
+     `long' by a native Ada compiler differs from that used by C.  In
+     that situation, define this macro to be a C expression to be used
+     for the size of that type.  If you don't define this, the default
+     is the value of `LONG_TYPE_SIZE'.
+
+ -- Macro: LONG_LONG_TYPE_SIZE
+     A C expression for the size in bits of the type `long long' on the
+     target machine.  If you don't define this, the default is two
+     words.  If you want to support GNU Ada on your machine, the value
+     of this macro must be at least 64.
+
+ -- Macro: CHAR_TYPE_SIZE
+     A C expression for the size in bits of the type `char' on the
+     target machine.  If you don't define this, the default is
+     `BITS_PER_UNIT'.
+
+ -- Macro: BOOL_TYPE_SIZE
+     A C expression for the size in bits of the C++ type `bool' and C99
+     type `_Bool' on the target machine.  If you don't define this, and
+     you probably shouldn't, the default is `CHAR_TYPE_SIZE'.
+
+ -- Macro: FLOAT_TYPE_SIZE
+     A C expression for the size in bits of the type `float' on the
+     target machine.  If you don't define this, the default is one word.
+
+ -- Macro: DOUBLE_TYPE_SIZE
+     A C expression for the size in bits of the type `double' on the
+     target machine.  If you don't define this, the default is two
+     words.
+
+ -- Macro: LONG_DOUBLE_TYPE_SIZE
+     A C expression for the size in bits of the type `long double' on
+     the target machine.  If you don't define this, the default is two
+     words.
+
+ -- Macro: SHORT_FRACT_TYPE_SIZE
+     A C expression for the size in bits of the type `short _Fract' on
+     the target machine.  If you don't define this, the default is
+     `BITS_PER_UNIT'.
+
+ -- Macro: FRACT_TYPE_SIZE
+     A C expression for the size in bits of the type `_Fract' on the
+     target machine.  If you don't define this, the default is
+     `BITS_PER_UNIT * 2'.
+
+ -- Macro: LONG_FRACT_TYPE_SIZE
+     A C expression for the size in bits of the type `long _Fract' on
+     the target machine.  If you don't define this, the default is
+     `BITS_PER_UNIT * 4'.
+
+ -- Macro: LONG_LONG_FRACT_TYPE_SIZE
+     A C expression for the size in bits of the type `long long _Fract'
+     on the target machine.  If you don't define this, the default is
+     `BITS_PER_UNIT * 8'.
+
+ -- Macro: SHORT_ACCUM_TYPE_SIZE
+     A C expression for the size in bits of the type `short _Accum' on
+     the target machine.  If you don't define this, the default is
+     `BITS_PER_UNIT * 2'.
+
+ -- Macro: ACCUM_TYPE_SIZE
+     A C expression for the size in bits of the type `_Accum' on the
+     target machine.  If you don't define this, the default is
+     `BITS_PER_UNIT * 4'.
+
+ -- Macro: LONG_ACCUM_TYPE_SIZE
+     A C expression for the size in bits of the type `long _Accum' on
+     the target machine.  If you don't define this, the default is
+     `BITS_PER_UNIT * 8'.
+
+ -- Macro: LONG_LONG_ACCUM_TYPE_SIZE
+     A C expression for the size in bits of the type `long long _Accum'
+     on the target machine.  If you don't define this, the default is
+     `BITS_PER_UNIT * 16'.
+
+ -- Macro: LIBGCC2_LONG_DOUBLE_TYPE_SIZE
+     Define this macro if `LONG_DOUBLE_TYPE_SIZE' is not constant or if
+     you want routines in `libgcc2.a' for a size other than
+     `LONG_DOUBLE_TYPE_SIZE'.  If you don't define this, the default is
+     `LONG_DOUBLE_TYPE_SIZE'.
+
+ -- Macro: LIBGCC2_HAS_DF_MODE
+     Define this macro if neither `DOUBLE_TYPE_SIZE' nor
+     `LIBGCC2_LONG_DOUBLE_TYPE_SIZE' is `DFmode' but you want `DFmode'
+     routines in `libgcc2.a' anyway.  If you don't define this and
+     either `DOUBLE_TYPE_SIZE' or `LIBGCC2_LONG_DOUBLE_TYPE_SIZE' is 64
+     then the default is 1, otherwise it is 0.
+
+ -- Macro: LIBGCC2_HAS_XF_MODE
+     Define this macro if `LIBGCC2_LONG_DOUBLE_TYPE_SIZE' is not
+     `XFmode' but you want `XFmode' routines in `libgcc2.a' anyway.  If
+     you don't define this and `LIBGCC2_LONG_DOUBLE_TYPE_SIZE' is 80
+     then the default is 1, otherwise it is 0.
+
+ -- Macro: LIBGCC2_HAS_TF_MODE
+     Define this macro if `LIBGCC2_LONG_DOUBLE_TYPE_SIZE' is not
+     `TFmode' but you want `TFmode' routines in `libgcc2.a' anyway.  If
+     you don't define this and `LIBGCC2_LONG_DOUBLE_TYPE_SIZE' is 128
+     then the default is 1, otherwise it is 0.
+
+ -- Macro: SF_SIZE
+ -- Macro: DF_SIZE
+ -- Macro: XF_SIZE
+ -- Macro: TF_SIZE
+     Define these macros to be the size in bits of the mantissa of
+     `SFmode', `DFmode', `XFmode' and `TFmode' values, if the defaults
+     in `libgcc2.h' are inappropriate.  By default, `FLT_MANT_DIG' is
+     used for `SF_SIZE', `LDBL_MANT_DIG' for `XF_SIZE' and `TF_SIZE',
+     and `DBL_MANT_DIG' or `LDBL_MANT_DIG' for `DF_SIZE' according to
+     whether `DOUBLE_TYPE_SIZE' or `LIBGCC2_LONG_DOUBLE_TYPE_SIZE' is
+     64.
+
+ -- Macro: TARGET_FLT_EVAL_METHOD
+     A C expression for the value for `FLT_EVAL_METHOD' in `float.h',
+     assuming, if applicable, that the floating-point control word is
+     in its default state.  If you do not define this macro the value of
+     `FLT_EVAL_METHOD' will be zero.
+
+ -- Macro: WIDEST_HARDWARE_FP_SIZE
+     A C expression for the size in bits of the widest floating-point
+     format supported by the hardware.  If you define this macro, you
+     must specify a value less than or equal to the value of
+     `LONG_DOUBLE_TYPE_SIZE'.  If you do not define this macro, the
+     value of `LONG_DOUBLE_TYPE_SIZE' is the default.
+
+ -- Macro: DEFAULT_SIGNED_CHAR
+     An expression whose value is 1 or 0, according to whether the type
+     `char' should be signed or unsigned by default.  The user can
+     always override this default with the options `-fsigned-char' and
+     `-funsigned-char'.
+
+ -- Target Hook: bool TARGET_DEFAULT_SHORT_ENUMS (void)
+     This target hook should return true if the compiler should give an
+     `enum' type only as many bytes as it takes to represent the range
+     of possible values of that type.  It should return false if all
+     `enum' types should be allocated like `int'.
+
+     The default is to return false.
+
+ -- Macro: SIZE_TYPE
+     A C expression for a string describing the name of the data type
+     to use for size values.  The typedef name `size_t' is defined
+     using the contents of the string.
+
+     The string can contain more than one keyword.  If so, separate
+     them with spaces, and write first any length keyword, then
+     `unsigned' if appropriate, and finally `int'.  The string must
+     exactly match one of the data type names defined in the function
+     `init_decl_processing' in the file `c-decl.c'.  You may not omit
+     `int' or change the order--that would cause the compiler to crash
+     on startup.
+
+     If you don't define this macro, the default is `"long unsigned
+     int"'.
+
+ -- Macro: PTRDIFF_TYPE
+     A C expression for a string describing the name of the data type
+     to use for the result of subtracting two pointers.  The typedef
+     name `ptrdiff_t' is defined using the contents of the string.  See
+     `SIZE_TYPE' above for more information.
+
+     If you don't define this macro, the default is `"long int"'.
+
+ -- Macro: WCHAR_TYPE
+     A C expression for a string describing the name of the data type
+     to use for wide characters.  The typedef name `wchar_t' is defined
+     using the contents of the string.  See `SIZE_TYPE' above for more
+     information.
+
+     If you don't define this macro, the default is `"int"'.
+
+ -- Macro: WCHAR_TYPE_SIZE
+     A C expression for the size in bits of the data type for wide
+     characters.  This is used in `cpp', which cannot make use of
+     `WCHAR_TYPE'.
+
+ -- Macro: WINT_TYPE
+     A C expression for a string describing the name of the data type to
+     use for wide characters passed to `printf' and returned from
+     `getwc'.  The typedef name `wint_t' is defined using the contents
+     of the string.  See `SIZE_TYPE' above for more information.
+
+     If you don't define this macro, the default is `"unsigned int"'.
+
+ -- Macro: INTMAX_TYPE
+     A C expression for a string describing the name of the data type
+     that can represent any value of any standard or extended signed
+     integer type.  The typedef name `intmax_t' is defined using the
+     contents of the string.  See `SIZE_TYPE' above for more
+     information.
+
+     If you don't define this macro, the default is the first of
+     `"int"', `"long int"', or `"long long int"' that has as much
+     precision as `long long int'.
+
+ -- Macro: UINTMAX_TYPE
+     A C expression for a string describing the name of the data type
+     that can represent any value of any standard or extended unsigned
+     integer type.  The typedef name `uintmax_t' is defined using the
+     contents of the string.  See `SIZE_TYPE' above for more
+     information.
+
+     If you don't define this macro, the default is the first of
+     `"unsigned int"', `"long unsigned int"', or `"long long unsigned
+     int"' that has as much precision as `long long unsigned int'.
+
+ -- Macro: SIG_ATOMIC_TYPE
+ -- Macro: INT8_TYPE
+ -- Macro: INT16_TYPE
+ -- Macro: INT32_TYPE
+ -- Macro: INT64_TYPE
+ -- Macro: UINT8_TYPE
+ -- Macro: UINT16_TYPE
+ -- Macro: UINT32_TYPE
+ -- Macro: UINT64_TYPE
+ -- Macro: INT_LEAST8_TYPE
+ -- Macro: INT_LEAST16_TYPE
+ -- Macro: INT_LEAST32_TYPE
+ -- Macro: INT_LEAST64_TYPE
+ -- Macro: UINT_LEAST8_TYPE
+ -- Macro: UINT_LEAST16_TYPE
+ -- Macro: UINT_LEAST32_TYPE
+ -- Macro: UINT_LEAST64_TYPE
+ -- Macro: INT_FAST8_TYPE
+ -- Macro: INT_FAST16_TYPE
+ -- Macro: INT_FAST32_TYPE
+ -- Macro: INT_FAST64_TYPE
+ -- Macro: UINT_FAST8_TYPE
+ -- Macro: UINT_FAST16_TYPE
+ -- Macro: UINT_FAST32_TYPE
+ -- Macro: UINT_FAST64_TYPE
+ -- Macro: INTPTR_TYPE
+ -- Macro: UINTPTR_TYPE
+     C expressions for the standard types `sig_atomic_t', `int8_t',
+     `int16_t', `int32_t', `int64_t', `uint8_t', `uint16_t',
+     `uint32_t', `uint64_t', `int_least8_t', `int_least16_t',
+     `int_least32_t', `int_least64_t', `uint_least8_t',
+     `uint_least16_t', `uint_least32_t', `uint_least64_t',
+     `int_fast8_t', `int_fast16_t', `int_fast32_t', `int_fast64_t',
+     `uint_fast8_t', `uint_fast16_t', `uint_fast32_t', `uint_fast64_t',
+     `intptr_t', and `uintptr_t'.  See `SIZE_TYPE' above for more
+     information.
+
+     If any of these macros evaluates to a null pointer, the
+     corresponding type is not supported; if GCC is configured to
+     provide `<stdint.h>' in such a case, the header provided may not
+     conform to C99, depending on the type in question.  The defaults
+     for all of these macros are null pointers.
+
+ -- Macro: TARGET_PTRMEMFUNC_VBIT_LOCATION
+     The C++ compiler represents a pointer-to-member-function with a
+     struct that looks like:
+
+            struct {
+              union {
+                void (*fn)();
+                ptrdiff_t vtable_index;
+              };
+              ptrdiff_t delta;
+            };
+
+     The C++ compiler must use one bit to indicate whether the function
+     that will be called through a pointer-to-member-function is
+     virtual.  Normally, we assume that the low-order bit of a function
+     pointer must always be zero.  Then, by ensuring that the
+     vtable_index is odd, we can distinguish which variant of the union
+     is in use.  But, on some platforms function pointers can be odd,
+     and so this doesn't work.  In that case, we use the low-order bit
+     of the `delta' field, and shift the remainder of the `delta' field
+     to the left.
+
+     GCC will automatically make the right selection about where to
+     store this bit using the `FUNCTION_BOUNDARY' setting for your
+     platform.  However, some platforms such as ARM/Thumb have
+     `FUNCTION_BOUNDARY' set such that functions always start at even
+     addresses, but the lowest bit of pointers to functions indicate
+     whether the function at that address is in ARM or Thumb mode.  If
+     this is the case of your architecture, you should define this
+     macro to `ptrmemfunc_vbit_in_delta'.
+
+     In general, you should not have to define this macro.  On
+     architectures in which function addresses are always even,
+     according to `FUNCTION_BOUNDARY', GCC will automatically define
+     this macro to `ptrmemfunc_vbit_in_pfn'.
+
+ -- Macro: TARGET_VTABLE_USES_DESCRIPTORS
+     Normally, the C++ compiler uses function pointers in vtables.  This
+     macro allows the target to change to use "function descriptors"
+     instead.  Function descriptors are found on targets for whom a
+     function pointer is actually a small data structure.  Normally the
+     data structure consists of the actual code address plus a data
+     pointer to which the function's data is relative.
+
+     If vtables are used, the value of this macro should be the number
+     of words that the function descriptor occupies.
+
+ -- Macro: TARGET_VTABLE_ENTRY_ALIGN
+     By default, the vtable entries are void pointers, the so the
+     alignment is the same as pointer alignment.  The value of this
+     macro specifies the alignment of the vtable entry in bits.  It
+     should be defined only when special alignment is necessary. */
+
+ -- Macro: TARGET_VTABLE_DATA_ENTRY_DISTANCE
+     There are a few non-descriptor entries in the vtable at offsets
+     below zero.  If these entries must be padded (say, to preserve the
+     alignment specified by `TARGET_VTABLE_ENTRY_ALIGN'), set this to
+     the number of words in each data entry.
+
+
+File: gccint.info,  Node: Registers,  Next: Register Classes,  Prev: Type Layout,  Up: Target Macros
+
+17.7 Register Usage
+===================
+
+This section explains how to describe what registers the target machine
+has, and how (in general) they can be used.
+
+ The description of which registers a specific instruction can use is
+done with register classes; see *note Register Classes::.  For
+information on using registers to access a stack frame, see *note Frame
+Registers::.  For passing values in registers, see *note Register
+Arguments::.  For returning values in registers, see *note Scalar
+Return::.
+
+* Menu:
+
+* Register Basics::             Number and kinds of registers.
+* Allocation Order::            Order in which registers are allocated.
+* Values in Registers::         What kinds of values each reg can hold.
+* Leaf Functions::              Renumbering registers for leaf functions.
+* Stack Registers::             Handling a register stack such as 80387.
+
+
+File: gccint.info,  Node: Register Basics,  Next: Allocation Order,  Up: Registers
+
+17.7.1 Basic Characteristics of Registers
+-----------------------------------------
+
+Registers have various characteristics.
+
+ -- Macro: FIRST_PSEUDO_REGISTER
+     Number of hardware registers known to the compiler.  They receive
+     numbers 0 through `FIRST_PSEUDO_REGISTER-1'; thus, the first
+     pseudo register's number really is assigned the number
+     `FIRST_PSEUDO_REGISTER'.
+
+ -- Macro: FIXED_REGISTERS
+     An initializer that says which registers are used for fixed
+     purposes all throughout the compiled code and are therefore not
+     available for general allocation.  These would include the stack
+     pointer, the frame pointer (except on machines where that can be
+     used as a general register when no frame pointer is needed), the
+     program counter on machines where that is considered one of the
+     addressable registers, and any other numbered register with a
+     standard use.
+
+     This information is expressed as a sequence of numbers, separated
+     by commas and surrounded by braces.  The Nth number is 1 if
+     register N is fixed, 0 otherwise.
+
+     The table initialized from this macro, and the table initialized by
+     the following one, may be overridden at run time either
+     automatically, by the actions of the macro
+     `CONDITIONAL_REGISTER_USAGE', or by the user with the command
+     options `-ffixed-REG', `-fcall-used-REG' and `-fcall-saved-REG'.
+
+ -- Macro: CALL_USED_REGISTERS
+     Like `FIXED_REGISTERS' but has 1 for each register that is
+     clobbered (in general) by function calls as well as for fixed
+     registers.  This macro therefore identifies the registers that are
+     not available for general allocation of values that must live
+     across function calls.
+
+     If a register has 0 in `CALL_USED_REGISTERS', the compiler
+     automatically saves it on function entry and restores it on
+     function exit, if the register is used within the function.
+
+ -- Macro: CALL_REALLY_USED_REGISTERS
+     Like `CALL_USED_REGISTERS' except this macro doesn't require that
+     the entire set of `FIXED_REGISTERS' be included.
+     (`CALL_USED_REGISTERS' must be a superset of `FIXED_REGISTERS').
+     This macro is optional.  If not specified, it defaults to the value
+     of `CALL_USED_REGISTERS'.
+
+ -- Macro: HARD_REGNO_CALL_PART_CLOBBERED (REGNO, MODE)
+     A C expression that is nonzero if it is not permissible to store a
+     value of mode MODE in hard register number REGNO across a call
+     without some part of it being clobbered.  For most machines this
+     macro need not be defined.  It is only required for machines that
+     do not preserve the entire contents of a register across a call.
+
+ -- Target Hook: void TARGET_CONDITIONAL_REGISTER_USAGE (void)
+     This hook may conditionally modify five variables `fixed_regs',
+     `call_used_regs', `global_regs', `reg_names', and
+     `reg_class_contents', to take into account any dependence of these
+     register sets on target flags.  The first three of these are of
+     type `char []' (interpreted as Boolean vectors).  `global_regs' is
+     a `const char *[]', and `reg_class_contents' is a `HARD_REG_SET'.
+     Before the macro is called, `fixed_regs', `call_used_regs',
+     `reg_class_contents', and `reg_names' have been initialized from
+     `FIXED_REGISTERS', `CALL_USED_REGISTERS', `REG_CLASS_CONTENTS',
+     and `REGISTER_NAMES', respectively.  `global_regs' has been
+     cleared, and any `-ffixed-REG', `-fcall-used-REG' and
+     `-fcall-saved-REG' command options have been applied.
+
+     If the usage of an entire class of registers depends on the target
+     flags, you may indicate this to GCC by using this macro to modify
+     `fixed_regs' and `call_used_regs' to 1 for each of the registers
+     in the classes which should not be used by GCC.  Also define the
+     macro `REG_CLASS_FROM_LETTER' / `REG_CLASS_FROM_CONSTRAINT' to
+     return `NO_REGS' if it is called with a letter for a class that
+     shouldn't be used.
+
+     (However, if this class is not included in `GENERAL_REGS' and all
+     of the insn patterns whose constraints permit this class are
+     controlled by target switches, then GCC will automatically avoid
+     using these registers when the target switches are opposed to
+     them.)
+
+ -- Macro: INCOMING_REGNO (OUT)
+     Define this macro if the target machine has register windows.
+     This C expression returns the register number as seen by the
+     called function corresponding to the register number OUT as seen
+     by the calling function.  Return OUT if register number OUT is not
+     an outbound register.
+
+ -- Macro: OUTGOING_REGNO (IN)
+     Define this macro if the target machine has register windows.
+     This C expression returns the register number as seen by the
+     calling function corresponding to the register number IN as seen
+     by the called function.  Return IN if register number IN is not an
+     inbound register.
+
+ -- Macro: LOCAL_REGNO (REGNO)
+     Define this macro if the target machine has register windows.
+     This C expression returns true if the register is call-saved but
+     is in the register window.  Unlike most call-saved registers, such
+     registers need not be explicitly restored on function exit or
+     during non-local gotos.
+
+ -- Macro: PC_REGNUM
+     If the program counter has a register number, define this as that
+     register number.  Otherwise, do not define it.
+
+
+File: gccint.info,  Node: Allocation Order,  Next: Values in Registers,  Prev: Register Basics,  Up: Registers
+
+17.7.2 Order of Allocation of Registers
+---------------------------------------
+
+Registers are allocated in order.
+
+ -- Macro: REG_ALLOC_ORDER
+     If defined, an initializer for a vector of integers, containing the
+     numbers of hard registers in the order in which GCC should prefer
+     to use them (from most preferred to least).
+
+     If this macro is not defined, registers are used lowest numbered
+     first (all else being equal).
+
+     One use of this macro is on machines where the highest numbered
+     registers must always be saved and the save-multiple-registers
+     instruction supports only sequences of consecutive registers.  On
+     such machines, define `REG_ALLOC_ORDER' to be an initializer that
+     lists the highest numbered allocable register first.
+
+ -- Macro: ADJUST_REG_ALLOC_ORDER
+     A C statement (sans semicolon) to choose the order in which to
+     allocate hard registers for pseudo-registers local to a basic
+     block.
+
+     Store the desired register order in the array `reg_alloc_order'.
+     Element 0 should be the register to allocate first; element 1, the
+     next register; and so on.
+
+     The macro body should not assume anything about the contents of
+     `reg_alloc_order' before execution of the macro.
+
+     On most machines, it is not necessary to define this macro.
+
+ -- Macro: HONOR_REG_ALLOC_ORDER
+     Normally, IRA tries to estimate the costs for saving a register in
+     the prologue and restoring it in the epilogue.  This discourages
+     it from using call-saved registers.  If a machine wants to ensure
+     that IRA allocates registers in the order given by REG_ALLOC_ORDER
+     even if some call-saved registers appear earlier than call-used
+     ones, this macro should be defined.
+
+ -- Macro: IRA_HARD_REGNO_ADD_COST_MULTIPLIER (REGNO)
+     In some case register allocation order is not enough for the
+     Integrated Register Allocator (IRA) to generate a good code.  If
+     this macro is defined, it should return a floating point value
+     based on REGNO.  The cost of using REGNO for a pseudo will be
+     increased by approximately the pseudo's usage frequency times the
+     value returned by this macro.  Not defining this macro is
+     equivalent to having it always return `0.0'.
+
+     On most machines, it is not necessary to define this macro.
+
+
+File: gccint.info,  Node: Values in Registers,  Next: Leaf Functions,  Prev: Allocation Order,  Up: Registers
+
+17.7.3 How Values Fit in Registers
+----------------------------------
+
+This section discusses the macros that describe which kinds of values
+(specifically, which machine modes) each register can hold, and how many
+consecutive registers are needed for a given mode.
+
+ -- Macro: HARD_REGNO_NREGS (REGNO, MODE)
+     A C expression for the number of consecutive hard registers,
+     starting at register number REGNO, required to hold a value of mode
+     MODE.  This macro must never return zero, even if a register
+     cannot hold the requested mode - indicate that with
+     HARD_REGNO_MODE_OK and/or CANNOT_CHANGE_MODE_CLASS instead.
+
+     On a machine where all registers are exactly one word, a suitable
+     definition of this macro is
+
+          #define HARD_REGNO_NREGS(REGNO, MODE)            \
+             ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1)  \
+              / UNITS_PER_WORD)
+
+ -- Macro: HARD_REGNO_NREGS_HAS_PADDING (REGNO, MODE)
+     A C expression that is nonzero if a value of mode MODE, stored in
+     memory, ends with padding that causes it to take up more space than
+     in registers starting at register number REGNO (as determined by
+     multiplying GCC's notion of the size of the register when
+     containing this mode by the number of registers returned by
+     `HARD_REGNO_NREGS').  By default this is zero.
+
+     For example, if a floating-point value is stored in three 32-bit
+     registers but takes up 128 bits in memory, then this would be
+     nonzero.
+
+     This macros only needs to be defined if there are cases where
+     `subreg_get_info' would otherwise wrongly determine that a
+     `subreg' can be represented by an offset to the register number,
+     when in fact such a `subreg' would contain some of the padding not
+     stored in registers and so not be representable.
+
+ -- Macro: HARD_REGNO_NREGS_WITH_PADDING (REGNO, MODE)
+     For values of REGNO and MODE for which
+     `HARD_REGNO_NREGS_HAS_PADDING' returns nonzero, a C expression
+     returning the greater number of registers required to hold the
+     value including any padding.  In the example above, the value
+     would be four.
+
+ -- Macro: REGMODE_NATURAL_SIZE (MODE)
+     Define this macro if the natural size of registers that hold values
+     of mode MODE is not the word size.  It is a C expression that
+     should give the natural size in bytes for the specified mode.  It
+     is used by the register allocator to try to optimize its results.
+     This happens for example on SPARC 64-bit where the natural size of
+     floating-point registers is still 32-bit.
+
+ -- Macro: HARD_REGNO_MODE_OK (REGNO, MODE)
+     A C expression that is nonzero if it is permissible to store a
+     value of mode MODE in hard register number REGNO (or in several
+     registers starting with that one).  For a machine where all
+     registers are equivalent, a suitable definition is
+
+          #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
+
+     You need not include code to check for the numbers of fixed
+     registers, because the allocation mechanism considers them to be
+     always occupied.
+
+     On some machines, double-precision values must be kept in even/odd
+     register pairs.  You can implement that by defining this macro to
+     reject odd register numbers for such modes.
+
+     The minimum requirement for a mode to be OK in a register is that
+     the `movMODE' instruction pattern support moves between the
+     register and other hard register in the same class and that moving
+     a value into the register and back out not alter it.
+
+     Since the same instruction used to move `word_mode' will work for
+     all narrower integer modes, it is not necessary on any machine for
+     `HARD_REGNO_MODE_OK' to distinguish between these modes, provided
+     you define patterns `movhi', etc., to take advantage of this.  This
+     is useful because of the interaction between `HARD_REGNO_MODE_OK'
+     and `MODES_TIEABLE_P'; it is very desirable for all integer modes
+     to be tieable.
+
+     Many machines have special registers for floating point arithmetic.
+     Often people assume that floating point machine modes are allowed
+     only in floating point registers.  This is not true.  Any
+     registers that can hold integers can safely _hold_ a floating
+     point machine mode, whether or not floating arithmetic can be done
+     on it in those registers.  Integer move instructions can be used
+     to move the values.
+
+     On some machines, though, the converse is true: fixed-point machine
+     modes may not go in floating registers.  This is true if the
+     floating registers normalize any value stored in them, because
+     storing a non-floating value there would garble it.  In this case,
+     `HARD_REGNO_MODE_OK' should reject fixed-point machine modes in
+     floating registers.  But if the floating registers do not
+     automatically normalize, if you can store any bit pattern in one
+     and retrieve it unchanged without a trap, then any machine mode
+     may go in a floating register, so you can define this macro to say
+     so.
+
+     The primary significance of special floating registers is rather
+     that they are the registers acceptable in floating point arithmetic
+     instructions.  However, this is of no concern to
+     `HARD_REGNO_MODE_OK'.  You handle it by writing the proper
+     constraints for those instructions.
+
+     On some machines, the floating registers are especially slow to
+     access, so that it is better to store a value in a stack frame
+     than in such a register if floating point arithmetic is not being
+     done.  As long as the floating registers are not in class
+     `GENERAL_REGS', they will not be used unless some pattern's
+     constraint asks for one.
+
+ -- Macro: HARD_REGNO_RENAME_OK (FROM, TO)
+     A C expression that is nonzero if it is OK to rename a hard
+     register FROM to another hard register TO.
+
+     One common use of this macro is to prevent renaming of a register
+     to another register that is not saved by a prologue in an interrupt
+     handler.
+
+     The default is always nonzero.
+
+ -- Macro: MODES_TIEABLE_P (MODE1, MODE2)
+     A C expression that is nonzero if a value of mode MODE1 is
+     accessible in mode MODE2 without copying.
+
+     If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R,
+     MODE2)' are always the same for any R, then `MODES_TIEABLE_P
+     (MODE1, MODE2)' should be nonzero.  If they differ for any R, you
+     should define this macro to return zero unless some other
+     mechanism ensures the accessibility of the value in a narrower
+     mode.
+
+     You should define this macro to return nonzero in as many cases as
+     possible since doing so will allow GCC to perform better register
+     allocation.
+
+ -- Target Hook: bool TARGET_HARD_REGNO_SCRATCH_OK (unsigned int REGNO)
+     This target hook should return `true' if it is OK to use a hard
+     register REGNO as scratch reg in peephole2.
+
+     One common use of this macro is to prevent using of a register that
+     is not saved by a prologue in an interrupt handler.
+
+     The default version of this hook always returns `true'.
+
+ -- Macro: AVOID_CCMODE_COPIES
+     Define this macro if the compiler should avoid copies to/from
+     `CCmode' registers.  You should only define this macro if support
+     for copying to/from `CCmode' is incomplete.
+
+
+File: gccint.info,  Node: Leaf Functions,  Next: Stack Registers,  Prev: Values in Registers,  Up: Registers
+
+17.7.4 Handling Leaf Functions
+------------------------------
+
+On some machines, a leaf function (i.e., one which makes no calls) can
+run more efficiently if it does not make its own register window.
+Often this means it is required to receive its arguments in the
+registers where they are passed by the caller, instead of the registers
+where they would normally arrive.
+
+ The special treatment for leaf functions generally applies only when
+other conditions are met; for example, often they may use only those
+registers for its own variables and temporaries.  We use the term "leaf
+function" to mean a function that is suitable for this special
+handling, so that functions with no calls are not necessarily "leaf
+functions".
+
+ GCC assigns register numbers before it knows whether the function is
+suitable for leaf function treatment.  So it needs to renumber the
+registers in order to output a leaf function.  The following macros
+accomplish this.
+
+ -- Macro: LEAF_REGISTERS
+     Name of a char vector, indexed by hard register number, which
+     contains 1 for a register that is allowable in a candidate for leaf
+     function treatment.
+
+     If leaf function treatment involves renumbering the registers,
+     then the registers marked here should be the ones before
+     renumbering--those that GCC would ordinarily allocate.  The
+     registers which will actually be used in the assembler code, after
+     renumbering, should not be marked with 1 in this vector.
+
+     Define this macro only if the target machine offers a way to
+     optimize the treatment of leaf functions.
+
+ -- Macro: LEAF_REG_REMAP (REGNO)
+     A C expression whose value is the register number to which REGNO
+     should be renumbered, when a function is treated as a leaf
+     function.
+
+     If REGNO is a register number which should not appear in a leaf
+     function before renumbering, then the expression should yield -1,
+     which will cause the compiler to abort.
+
+     Define this macro only if the target machine offers a way to
+     optimize the treatment of leaf functions, and registers need to be
+     renumbered to do this.
+
+ `TARGET_ASM_FUNCTION_PROLOGUE' and `TARGET_ASM_FUNCTION_EPILOGUE' must
+usually treat leaf functions specially.  They can test the C variable
+`current_function_is_leaf' which is nonzero for leaf functions.
+`current_function_is_leaf' is set prior to local register allocation
+and is valid for the remaining compiler passes.  They can also test the
+C variable `current_function_uses_only_leaf_regs' which is nonzero for
+leaf functions which only use leaf registers.
+`current_function_uses_only_leaf_regs' is valid after all passes that
+modify the instructions have been run and is only useful if
+`LEAF_REGISTERS' is defined.
+
+
+File: gccint.info,  Node: Stack Registers,  Prev: Leaf Functions,  Up: Registers
+
+17.7.5 Registers That Form a Stack
+----------------------------------
+
+There are special features to handle computers where some of the
+"registers" form a stack.  Stack registers are normally written by
+pushing onto the stack, and are numbered relative to the top of the
+stack.
+
+ Currently, GCC can only handle one group of stack-like registers, and
+they must be consecutively numbered.  Furthermore, the existing support
+for stack-like registers is specific to the 80387 floating point
+coprocessor.  If you have a new architecture that uses stack-like
+registers, you will need to do substantial work on `reg-stack.c' and
+write your machine description to cooperate with it, as well as
+defining these macros.
+
+ -- Macro: STACK_REGS
+     Define this if the machine has any stack-like registers.
+
+ -- Macro: STACK_REG_COVER_CLASS
+     This is a cover class containing the stack registers.  Define this
+     if the machine has any stack-like registers.
+
+ -- Macro: FIRST_STACK_REG
+     The number of the first stack-like register.  This one is the top
+     of the stack.
+
+ -- Macro: LAST_STACK_REG
+     The number of the last stack-like register.  This one is the
+     bottom of the stack.
+
+
+File: gccint.info,  Node: Register Classes,  Next: Old Constraints,  Prev: Registers,  Up: Target Macros
+
+17.8 Register Classes
+=====================
+
+On many machines, the numbered registers are not all equivalent.  For
+example, certain registers may not be allowed for indexed addressing;
+certain registers may not be allowed in some instructions.  These
+machine restrictions are described to the compiler using "register
+classes".
+
+ You define a number of register classes, giving each one a name and
+saying which of the registers belong to it.  Then you can specify
+register classes that are allowed as operands to particular instruction
+patterns.
+
+ In general, each register will belong to several classes.  In fact, one
+class must be named `ALL_REGS' and contain all the registers.  Another
+class must be named `NO_REGS' and contain no registers.  Often the
+union of two classes will be another class; however, this is not
+required.
+
+ One of the classes must be named `GENERAL_REGS'.  There is nothing
+terribly special about the name, but the operand constraint letters `r'
+and `g' specify this class.  If `GENERAL_REGS' is the same as
+`ALL_REGS', just define it as a macro which expands to `ALL_REGS'.
+
+ Order the classes so that if class X is contained in class Y then X
+has a lower class number than Y.
+
+ The way classes other than `GENERAL_REGS' are specified in operand
+constraints is through machine-dependent operand constraint letters.
+You can define such letters to correspond to various classes, then use
+them in operand constraints.
+
+ You should define a class for the union of two classes whenever some
+instruction allows both classes.  For example, if an instruction allows
+either a floating point (coprocessor) register or a general register
+for a certain operand, you should define a class `FLOAT_OR_GENERAL_REGS'
+which includes both of them.  Otherwise you will get suboptimal code,
+or even internal compiler errors when reload cannot find a register in
+the the class computed via `reg_class_subunion'.
+
+ You must also specify certain redundant information about the register
+classes: for each class, which classes contain it and which ones are
+contained in it; for each pair of classes, the largest class contained
+in their union.
+
+ When a value occupying several consecutive registers is expected in a
+certain class, all the registers used must belong to that class.
+Therefore, register classes cannot be used to enforce a requirement for
+a register pair to start with an even-numbered register.  The way to
+specify this requirement is with `HARD_REGNO_MODE_OK'.
+
+ Register classes used for input-operands of bitwise-and or shift
+instructions have a special requirement: each such class must have, for
+each fixed-point machine mode, a subclass whose registers can transfer
+that mode to or from memory.  For example, on some machines, the
+operations for single-byte values (`QImode') are limited to certain
+registers.  When this is so, each register class that is used in a
+bitwise-and or shift instruction must have a subclass consisting of
+registers from which single-byte values can be loaded or stored.  This
+is so that `PREFERRED_RELOAD_CLASS' can always have a possible value to
+return.
+
+ -- Data type: enum reg_class
+     An enumerated type that must be defined with all the register
+     class names as enumerated values.  `NO_REGS' must be first.
+     `ALL_REGS' must be the last register class, followed by one more
+     enumerated value, `LIM_REG_CLASSES', which is not a register class
+     but rather tells how many classes there are.
+
+     Each register class has a number, which is the value of casting
+     the class name to type `int'.  The number serves as an index in
+     many of the tables described below.
+
+ -- Macro: N_REG_CLASSES
+     The number of distinct register classes, defined as follows:
+
+          #define N_REG_CLASSES (int) LIM_REG_CLASSES
+
+ -- Macro: REG_CLASS_NAMES
+     An initializer containing the names of the register classes as C
+     string constants.  These names are used in writing some of the
+     debugging dumps.
+
+ -- Macro: REG_CLASS_CONTENTS
+     An initializer containing the contents of the register classes, as
+     integers which are bit masks.  The Nth integer specifies the
+     contents of class N.  The way the integer MASK is interpreted is
+     that register R is in the class if `MASK & (1 << R)' is 1.
+
+     When the machine has more than 32 registers, an integer does not
+     suffice.  Then the integers are replaced by sub-initializers,
+     braced groupings containing several integers.  Each
+     sub-initializer must be suitable as an initializer for the type
+     `HARD_REG_SET' which is defined in `hard-reg-set.h'.  In this
+     situation, the first integer in each sub-initializer corresponds to
+     registers 0 through 31, the second integer to registers 32 through
+     63, and so on.
+
+ -- Macro: REGNO_REG_CLASS (REGNO)
+     A C expression whose value is a register class containing hard
+     register REGNO.  In general there is more than one such class;
+     choose a class which is "minimal", meaning that no smaller class
+     also contains the register.
+
+ -- Macro: BASE_REG_CLASS
+     A macro whose definition is the name of the class to which a valid
+     base register must belong.  A base register is one used in an
+     address which is the register value plus a displacement.
+
+ -- Macro: MODE_BASE_REG_CLASS (MODE)
+     This is a variation of the `BASE_REG_CLASS' macro which allows the
+     selection of a base register in a mode dependent manner.  If MODE
+     is VOIDmode then it should return the same value as
+     `BASE_REG_CLASS'.
+
+ -- Macro: MODE_BASE_REG_REG_CLASS (MODE)
+     A C expression whose value is the register class to which a valid
+     base register must belong in order to be used in a base plus index
+     register address.  You should define this macro if base plus index
+     addresses have different requirements than other base register
+     uses.
+
+ -- Macro: MODE_CODE_BASE_REG_CLASS (MODE, OUTER_CODE, INDEX_CODE)
+     A C expression whose value is the register class to which a valid
+     base register must belong.  OUTER_CODE and INDEX_CODE define the
+     context in which the base register occurs.  OUTER_CODE is the code
+     of the immediately enclosing expression (`MEM' for the top level
+     of an address, `ADDRESS' for something that occurs in an
+     `address_operand').  INDEX_CODE is the code of the corresponding
+     index expression if OUTER_CODE is `PLUS'; `SCRATCH' otherwise.
+
+ -- Macro: INDEX_REG_CLASS
+     A macro whose definition is the name of the class to which a valid
+     index register must belong.  An index register is one used in an
+     address where its value is either multiplied by a scale factor or
+     added to another register (as well as added to a displacement).
+
+ -- Macro: REGNO_OK_FOR_BASE_P (NUM)
+     A C expression which is nonzero if register number NUM is suitable
+     for use as a base register in operand addresses.
+
+ -- Macro: REGNO_MODE_OK_FOR_BASE_P (NUM, MODE)
+     A C expression that is just like `REGNO_OK_FOR_BASE_P', except that
+     that expression may examine the mode of the memory reference in
+     MODE.  You should define this macro if the mode of the memory
+     reference affects whether a register may be used as a base
+     register.  If you define this macro, the compiler will use it
+     instead of `REGNO_OK_FOR_BASE_P'.  The mode may be `VOIDmode' for
+     addresses that appear outside a `MEM', i.e., as an
+     `address_operand'.
+
+ -- Macro: REGNO_MODE_OK_FOR_REG_BASE_P (NUM, MODE)
+     A C expression which is nonzero if register number NUM is suitable
+     for use as a base register in base plus index operand addresses,
+     accessing memory in mode MODE.  It may be either a suitable hard
+     register or a pseudo register that has been allocated such a hard
+     register.  You should define this macro if base plus index
+     addresses have different requirements than other base register
+     uses.
+
+     Use of this macro is deprecated; please use the more general
+     `REGNO_MODE_CODE_OK_FOR_BASE_P'.
+
+ -- Macro: REGNO_MODE_CODE_OK_FOR_BASE_P (NUM, MODE, OUTER_CODE,
+          INDEX_CODE)
+     A C expression that is just like `REGNO_MODE_OK_FOR_BASE_P', except
+     that that expression may examine the context in which the register
+     appears in the memory reference.  OUTER_CODE is the code of the
+     immediately enclosing expression (`MEM' if at the top level of the
+     address, `ADDRESS' for something that occurs in an
+     `address_operand').  INDEX_CODE is the code of the corresponding
+     index expression if OUTER_CODE is `PLUS'; `SCRATCH' otherwise.
+     The mode may be `VOIDmode' for addresses that appear outside a
+     `MEM', i.e., as an `address_operand'.
+
+ -- Macro: REGNO_OK_FOR_INDEX_P (NUM)
+     A C expression which is nonzero if register number NUM is suitable
+     for use as an index register in operand addresses.  It may be
+     either a suitable hard register or a pseudo register that has been
+     allocated such a hard register.
+
+     The difference between an index register and a base register is
+     that the index register may be scaled.  If an address involves the
+     sum of two registers, neither one of them scaled, then either one
+     may be labeled the "base" and the other the "index"; but whichever
+     labeling is used must fit the machine's constraints of which
+     registers may serve in each capacity.  The compiler will try both
+     labelings, looking for one that is valid, and will reload one or
+     both registers only if neither labeling works.
+
+ -- Target Hook: reg_class_t TARGET_PREFERRED_RENAME_CLASS (reg_class_t
+          RCLASS)
+     A target hook that places additional preference on the register
+     class to use when it is necessary to rename a register in class
+     RCLASS to another class, or perhaps NO_REGS, if no preferred
+     register class is found or hook `preferred_rename_class' is not
+     implemented. Sometimes returning a more restrictive class makes
+     better code.  For example, on ARM, thumb-2 instructions using
+     `LO_REGS' may be smaller than instructions using `GENERIC_REGS'.
+     By returning `LO_REGS' from `preferred_rename_class', code size
+     can be reduced.
+
+ -- Target Hook: reg_class_t TARGET_PREFERRED_RELOAD_CLASS (rtx X,
+          reg_class_t RCLASS)
+     A target hook that places additional restrictions on the register
+     class to use when it is necessary to copy value X into a register
+     in class RCLASS.  The value is a register class; perhaps RCLASS,
+     or perhaps another, smaller class.
+
+     The default version of this hook always returns value of `rclass'
+     argument.
+
+     Sometimes returning a more restrictive class makes better code.
+     For example, on the 68000, when X is an integer constant that is
+     in range for a `moveq' instruction, the value of this macro is
+     always `DATA_REGS' as long as RCLASS includes the data registers.
+     Requiring a data register guarantees that a `moveq' will be used.
+
+     One case where `TARGET_PREFERRED_RELOAD_CLASS' must not return
+     RCLASS is if X is a legitimate constant which cannot be loaded
+     into some register class.  By returning `NO_REGS' you can force X
+     into a memory location.  For example, rs6000 can load immediate
+     values into general-purpose registers, but does not have an
+     instruction for loading an immediate value into a floating-point
+     register, so `TARGET_PREFERRED_RELOAD_CLASS' returns `NO_REGS' when
+     X is a floating-point constant.  If the constant can't be loaded
+     into any kind of register, code generation will be better if
+     `LEGITIMATE_CONSTANT_P' makes the constant illegitimate instead of
+     using `TARGET_PREFERRED_RELOAD_CLASS'.
+
+     If an insn has pseudos in it after register allocation, reload
+     will go through the alternatives and call repeatedly
+     `TARGET_PREFERRED_RELOAD_CLASS' to find the best one.  Returning
+     `NO_REGS', in this case, makes reload add a `!' in front of the
+     constraint: the x86 back-end uses this feature to discourage usage
+     of 387 registers when math is done in the SSE registers (and vice
+     versa).
+
+ -- Macro: PREFERRED_RELOAD_CLASS (X, CLASS)
+     A C expression that places additional restrictions on the register
+     class to use when it is necessary to copy value X into a register
+     in class CLASS.  The value is a register class; perhaps CLASS, or
+     perhaps another, smaller class.  On many machines, the following
+     definition is safe:
+
+          #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
+
+     Sometimes returning a more restrictive class makes better code.
+     For example, on the 68000, when X is an integer constant that is
+     in range for a `moveq' instruction, the value of this macro is
+     always `DATA_REGS' as long as CLASS includes the data registers.
+     Requiring a data register guarantees that a `moveq' will be used.
+
+     One case where `PREFERRED_RELOAD_CLASS' must not return CLASS is
+     if X is a legitimate constant which cannot be loaded into some
+     register class.  By returning `NO_REGS' you can force X into a
+     memory location.  For example, rs6000 can load immediate values
+     into general-purpose registers, but does not have an instruction
+     for loading an immediate value into a floating-point register, so
+     `PREFERRED_RELOAD_CLASS' returns `NO_REGS' when X is a
+     floating-point constant.  If the constant can't be loaded into any
+     kind of register, code generation will be better if
+     `LEGITIMATE_CONSTANT_P' makes the constant illegitimate instead of
+     using `PREFERRED_RELOAD_CLASS'.
+
+     If an insn has pseudos in it after register allocation, reload
+     will go through the alternatives and call repeatedly
+     `PREFERRED_RELOAD_CLASS' to find the best one.  Returning
+     `NO_REGS', in this case, makes reload add a `!' in front of the
+     constraint: the x86 back-end uses this feature to discourage usage
+     of 387 registers when math is done in the SSE registers (and vice
+     versa).
+
+ -- Macro: PREFERRED_OUTPUT_RELOAD_CLASS (X, CLASS)
+     Like `PREFERRED_RELOAD_CLASS', but for output reloads instead of
+     input reloads.  If you don't define this macro, the default is to
+     use CLASS, unchanged.
+
+     You can also use `PREFERRED_OUTPUT_RELOAD_CLASS' to discourage
+     reload from using some alternatives, like `PREFERRED_RELOAD_CLASS'.
+
+ -- Target Hook: reg_class_t TARGET_PREFERRED_OUTPUT_RELOAD_CLASS (rtx
+          X, reg_class_t RCLASS)
+     Like `TARGET_PREFERRED_RELOAD_CLASS', but for output reloads
+     instead of input reloads.
+
+     The default version of this hook always returns value of `rclass'
+     argument.
+
+     You can also use `TARGET_PREFERRED_OUTPUT_RELOAD_CLASS' to
+     discourage reload from using some alternatives, like
+     `TARGET_PREFERRED_RELOAD_CLASS'.
+
+ -- Macro: LIMIT_RELOAD_CLASS (MODE, CLASS)
+     A C expression that places additional restrictions on the register
+     class to use when it is necessary to be able to hold a value of
+     mode MODE in a reload register for which class CLASS would
+     ordinarily be used.
+
+     Unlike `PREFERRED_RELOAD_CLASS', this macro should be used when
+     there are certain modes that simply can't go in certain reload
+     classes.
+
+     The value is a register class; perhaps CLASS, or perhaps another,
+     smaller class.
+
+     Don't define this macro unless the target machine has limitations
+     which require the macro to do something nontrivial.
+
+ -- Target Hook: reg_class_t TARGET_SECONDARY_RELOAD (bool IN_P, rtx X,
+          reg_class_t RELOAD_CLASS, enum machine_mode RELOAD_MODE,
+          secondary_reload_info *SRI)
+     Many machines have some registers that cannot be copied directly
+     to or from memory or even from other types of registers.  An
+     example is the `MQ' register, which on most machines, can only be
+     copied to or from general registers, but not memory.  Below, we
+     shall be using the term 'intermediate register' when a move
+     operation cannot be performed directly, but has to be done by
+     copying the source into the intermediate register first, and then
+     copying the intermediate register to the destination.  An
+     intermediate register always has the same mode as source and
+     destination.  Since it holds the actual value being copied, reload
+     might apply optimizations to re-use an intermediate register and
+     eliding the copy from the source when it can determine that the
+     intermediate register still holds the required value.
+
+     Another kind of secondary reload is required on some machines which
+     allow copying all registers to and from memory, but require a
+     scratch register for stores to some memory locations (e.g., those
+     with symbolic address on the RT, and those with certain symbolic
+     address on the SPARC when compiling PIC).  Scratch registers need
+     not have the same mode as the value being copied, and usually hold
+     a different value than that being copied.  Special patterns in the
+     md file are needed to describe how the copy is performed with the
+     help of the scratch register; these patterns also describe the
+     number, register class(es) and mode(s) of the scratch register(s).
+
+     In some cases, both an intermediate and a scratch register are
+     required.
+
+     For input reloads, this target hook is called with nonzero IN_P,
+     and X is an rtx that needs to be copied to a register of class
+     RELOAD_CLASS in RELOAD_MODE.  For output reloads, this target hook
+     is called with zero IN_P, and a register of class RELOAD_CLASS
+     needs to be copied to rtx X in RELOAD_MODE.
+
+     If copying a register of RELOAD_CLASS from/to X requires an
+     intermediate register, the hook `secondary_reload' should return
+     the register class required for this intermediate register.  If no
+     intermediate register is required, it should return NO_REGS.  If
+     more than one intermediate register is required, describe the one
+     that is closest in the copy chain to the reload register.
+
+     If scratch registers are needed, you also have to describe how to
+     perform the copy from/to the reload register to/from this closest
+     intermediate register.  Or if no intermediate register is
+     required, but still a scratch register is needed, describe the
+     copy  from/to the reload register to/from the reload operand X.
+
+     You do this by setting `sri->icode' to the instruction code of a
+     pattern in the md file which performs the move.  Operands 0 and 1
+     are the output and input of this copy, respectively.  Operands
+     from operand 2 onward are for scratch operands.  These scratch
+     operands must have a mode, and a single-register-class output
+     constraint.
+
+     When an intermediate register is used, the `secondary_reload' hook
+     will be called again to determine how to copy the intermediate
+     register to/from the reload operand X, so your hook must also have
+     code to handle the register class of the intermediate operand.
+
+     X might be a pseudo-register or a `subreg' of a pseudo-register,
+     which could either be in a hard register or in memory.  Use
+     `true_regnum' to find out; it will return -1 if the pseudo is in
+     memory and the hard register number if it is in a register.
+
+     Scratch operands in memory (constraint `"=m"' / `"=&m"') are
+     currently not supported.  For the time being, you will have to
+     continue to use `SECONDARY_MEMORY_NEEDED' for that purpose.
+
+     `copy_cost' also uses this target hook to find out how values are
+     copied.  If you want it to include some extra cost for the need to
+     allocate (a) scratch register(s), set `sri->extra_cost' to the
+     additional cost.  Or if two dependent moves are supposed to have a
+     lower cost than the sum of the individual moves due to expected
+     fortuitous scheduling and/or special forwarding logic, you can set
+     `sri->extra_cost' to a negative amount.
+
+ -- Macro: SECONDARY_RELOAD_CLASS (CLASS, MODE, X)
+ -- Macro: SECONDARY_INPUT_RELOAD_CLASS (CLASS, MODE, X)
+ -- Macro: SECONDARY_OUTPUT_RELOAD_CLASS (CLASS, MODE, X)
+     These macros are obsolete, new ports should use the target hook
+     `TARGET_SECONDARY_RELOAD' instead.
+
+     These are obsolete macros, replaced by the
+     `TARGET_SECONDARY_RELOAD' target hook.  Older ports still define
+     these macros to indicate to the reload phase that it may need to
+     allocate at least one register for a reload in addition to the
+     register to contain the data.  Specifically, if copying X to a
+     register CLASS in MODE requires an intermediate register, you were
+     supposed to define `SECONDARY_INPUT_RELOAD_CLASS' to return the
+     largest register class all of whose registers can be used as
+     intermediate registers or scratch registers.
+
+     If copying a register CLASS in MODE to X requires an intermediate
+     or scratch register, `SECONDARY_OUTPUT_RELOAD_CLASS' was supposed
+     to be defined be defined to return the largest register class
+     required.  If the requirements for input and output reloads were
+     the same, the macro `SECONDARY_RELOAD_CLASS' should have been used
+     instead of defining both macros identically.
+
+     The values returned by these macros are often `GENERAL_REGS'.
+     Return `NO_REGS' if no spare register is needed; i.e., if X can be
+     directly copied to or from a register of CLASS in MODE without
+     requiring a scratch register.  Do not define this macro if it
+     would always return `NO_REGS'.
+
+     If a scratch register is required (either with or without an
+     intermediate register), you were supposed to define patterns for
+     `reload_inM' or `reload_outM', as required (*note Standard
+     Names::.  These patterns, which were normally implemented with a
+     `define_expand', should be similar to the `movM' patterns, except
+     that operand 2 is the scratch register.
+
+     These patterns need constraints for the reload register and scratch
+     register that contain a single register class.  If the original
+     reload register (whose class is CLASS) can meet the constraint
+     given in the pattern, the value returned by these macros is used
+     for the class of the scratch register.  Otherwise, two additional
+     reload registers are required.  Their classes are obtained from
+     the constraints in the insn pattern.
+
+     X might be a pseudo-register or a `subreg' of a pseudo-register,
+     which could either be in a hard register or in memory.  Use
+     `true_regnum' to find out; it will return -1 if the pseudo is in
+     memory and the hard register number if it is in a register.
+
+     These macros should not be used in the case where a particular
+     class of registers can only be copied to memory and not to another
+     class of registers.  In that case, secondary reload registers are
+     not needed and would not be helpful.  Instead, a stack location
+     must be used to perform the copy and the `movM' pattern should use
+     memory as an intermediate storage.  This case often occurs between
+     floating-point and general registers.
+
+ -- Macro: SECONDARY_MEMORY_NEEDED (CLASS1, CLASS2, M)
+     Certain machines have the property that some registers cannot be
+     copied to some other registers without using memory.  Define this
+     macro on those machines to be a C expression that is nonzero if
+     objects of mode M in registers of CLASS1 can only be copied to
+     registers of class CLASS2 by storing a register of CLASS1 into
+     memory and loading that memory location into a register of CLASS2.
+
+     Do not define this macro if its value would always be zero.
+
+ -- Macro: SECONDARY_MEMORY_NEEDED_RTX (MODE)
+     Normally when `SECONDARY_MEMORY_NEEDED' is defined, the compiler
+     allocates a stack slot for a memory location needed for register
+     copies.  If this macro is defined, the compiler instead uses the
+     memory location defined by this macro.
+
+     Do not define this macro if you do not define
+     `SECONDARY_MEMORY_NEEDED'.
+
+ -- Macro: SECONDARY_MEMORY_NEEDED_MODE (MODE)
+     When the compiler needs a secondary memory location to copy
+     between two registers of mode MODE, it normally allocates
+     sufficient memory to hold a quantity of `BITS_PER_WORD' bits and
+     performs the store and load operations in a mode that many bits
+     wide and whose class is the same as that of MODE.
+
+     This is right thing to do on most machines because it ensures that
+     all bits of the register are copied and prevents accesses to the
+     registers in a narrower mode, which some machines prohibit for
+     floating-point registers.
+
+     However, this default behavior is not correct on some machines,
+     such as the DEC Alpha, that store short integers in floating-point
+     registers differently than in integer registers.  On those
+     machines, the default widening will not work correctly and you
+     must define this macro to suppress that widening in some cases.
+     See the file `alpha.h' for details.
+
+     Do not define this macro if you do not define
+     `SECONDARY_MEMORY_NEEDED' or if widening MODE to a mode that is
+     `BITS_PER_WORD' bits wide is correct for your machine.
+
+ -- Target Hook: bool TARGET_CLASS_LIKELY_SPILLED_P (reg_class_t RCLASS)
+     A target hook which returns `true' if pseudos that have been
+     assigned to registers of class RCLASS would likely be spilled
+     because registers of RCLASS are needed for spill registers.
+
+     The default version of this target hook returns `true' if RCLASS
+     has exactly one register and `false' otherwise.  On most machines,
+     this default should be used.  Only use this target hook to some
+     other expression if pseudos allocated by `local-alloc.c' end up in
+     memory because their hard registers were needed for spill
+     registers.  If this target hook returns `false' for those classes,
+     those pseudos will only be allocated by `global.c', which knows
+     how to reallocate the pseudo to another register.  If there would
+     not be another register available for reallocation, you should not
+     change the implementation of this target hook since the only
+     effect of such implementation would be to slow down register
+     allocation.
+
+ -- Macro: CLASS_MAX_NREGS (CLASS, MODE)
+     A C expression for the maximum number of consecutive registers of
+     class CLASS needed to hold a value of mode MODE.
+
+     This is closely related to the macro `HARD_REGNO_NREGS'.  In fact,
+     the value of the macro `CLASS_MAX_NREGS (CLASS, MODE)' should be
+     the maximum value of `HARD_REGNO_NREGS (REGNO, MODE)' for all
+     REGNO values in the class CLASS.
+
+     This macro helps control the handling of multiple-word values in
+     the reload pass.
+
+ -- Macro: CANNOT_CHANGE_MODE_CLASS (FROM, TO, CLASS)
+     If defined, a C expression that returns nonzero for a CLASS for
+     which a change from mode FROM to mode TO is invalid.
+
+     For the example, loading 32-bit integer or floating-point objects
+     into floating-point registers on the Alpha extends them to 64 bits.
+     Therefore loading a 64-bit object and then storing it as a 32-bit
+     object does not store the low-order 32 bits, as would be the case
+     for a normal register.  Therefore, `alpha.h' defines
+     `CANNOT_CHANGE_MODE_CLASS' as below:
+
+          #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
+            (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
+             ? reg_classes_intersect_p (FLOAT_REGS, (CLASS)) : 0)
+
+ -- Target Hook: const reg_class_t * TARGET_IRA_COVER_CLASSES (void)
+     Return an array of cover classes for the Integrated Register
+     Allocator (IRA).  Cover classes are a set of non-intersecting
+     register classes covering all hard registers used for register
+     allocation purposes.  If a move between two registers in the same
+     cover class is possible, it should be cheaper than a load or store
+     of the registers.  The array is terminated by a `LIM_REG_CLASSES'
+     element.
+
+     The order of cover classes in the array is important.  If two
+     classes have the same cost of usage for a pseudo, the class
+     occurred first in the array is chosen for the pseudo.
+
+     This hook is called once at compiler startup, after the
+     command-line options have been processed. It is then re-examined
+     by every call to `target_reinit'.
+
+     The default implementation returns `IRA_COVER_CLASSES', if defined,
+     otherwise there is no default implementation.  You must define
+     either this macro or `IRA_COVER_CLASSES' in order to use the
+     integrated register allocator with Chaitin-Briggs coloring. If the
+     macro is not defined, the only available coloring algorithm is
+     Chow's priority coloring.
+
+     This hook must not be modified from `NULL' to non-`NULL' or vice
+     versa by command-line option processing.
+
+ -- Macro: IRA_COVER_CLASSES
+     See the documentation for `TARGET_IRA_COVER_CLASSES'.
+
+
+File: gccint.info,  Node: Old Constraints,  Next: Stack and Calling,  Prev: Register Classes,  Up: Target Macros
+
+17.9 Obsolete Macros for Defining Constraints
+=============================================
+
+Machine-specific constraints can be defined with these macros instead
+of the machine description constructs described in *note Define
+Constraints::.  This mechanism is obsolete.  New ports should not use
+it; old ports should convert to the new mechanism.
+
+ -- Macro: CONSTRAINT_LEN (CHAR, STR)
+     For the constraint at the start of STR, which starts with the
+     letter C, return the length.  This allows you to have register
+     class / constant / extra constraints that are longer than a single
+     letter; you don't need to define this macro if you can do with
+     single-letter constraints only.  The definition of this macro
+     should use DEFAULT_CONSTRAINT_LEN for all the characters that you
+     don't want to handle specially.  There are some sanity checks in
+     genoutput.c that check the constraint lengths for the md file, so
+     you can also use this macro to help you while you are
+     transitioning from a byzantine single-letter-constraint scheme:
+     when you return a negative length for a constraint you want to
+     re-use, genoutput will complain about every instance where it is
+     used in the md file.
+
+ -- Macro: REG_CLASS_FROM_LETTER (CHAR)
+     A C expression which defines the machine-dependent operand
+     constraint letters for register classes.  If CHAR is such a
+     letter, the value should be the register class corresponding to
+     it.  Otherwise, the value should be `NO_REGS'.  The register
+     letter `r', corresponding to class `GENERAL_REGS', will not be
+     passed to this macro; you do not need to handle it.
+
+ -- Macro: REG_CLASS_FROM_CONSTRAINT (CHAR, STR)
+     Like `REG_CLASS_FROM_LETTER', but you also get the constraint
+     string passed in STR, so that you can use suffixes to distinguish
+     between different variants.
+
+ -- Macro: CONST_OK_FOR_LETTER_P (VALUE, C)
+     A C expression that defines the machine-dependent operand
+     constraint letters (`I', `J', `K', ... `P') that specify
+     particular ranges of integer values.  If C is one of those
+     letters, the expression should check that VALUE, an integer, is in
+     the appropriate range and return 1 if so, 0 otherwise.  If C is
+     not one of those letters, the value should be 0 regardless of
+     VALUE.
+
+ -- Macro: CONST_OK_FOR_CONSTRAINT_P (VALUE, C, STR)
+     Like `CONST_OK_FOR_LETTER_P', but you also get the constraint
+     string passed in STR, so that you can use suffixes to distinguish
+     between different variants.
+
+ -- Macro: CONST_DOUBLE_OK_FOR_LETTER_P (VALUE, C)
+     A C expression that defines the machine-dependent operand
+     constraint letters that specify particular ranges of
+     `const_double' values (`G' or `H').
+
+     If C is one of those letters, the expression should check that
+     VALUE, an RTX of code `const_double', is in the appropriate range
+     and return 1 if so, 0 otherwise.  If C is not one of those
+     letters, the value should be 0 regardless of VALUE.
+
+     `const_double' is used for all floating-point constants and for
+     `DImode' fixed-point constants.  A given letter can accept either
+     or both kinds of values.  It can use `GET_MODE' to distinguish
+     between these kinds.
+
+ -- Macro: CONST_DOUBLE_OK_FOR_CONSTRAINT_P (VALUE, C, STR)
+     Like `CONST_DOUBLE_OK_FOR_LETTER_P', but you also get the
+     constraint string passed in STR, so that you can use suffixes to
+     distinguish between different variants.
+
+ -- Macro: EXTRA_CONSTRAINT (VALUE, C)
+     A C expression that defines the optional machine-dependent
+     constraint letters that can be used to segregate specific types of
+     operands, usually memory references, for the target machine.  Any
+     letter that is not elsewhere defined and not matched by
+     `REG_CLASS_FROM_LETTER' / `REG_CLASS_FROM_CONSTRAINT' may be used.
+     Normally this macro will not be defined.
+
+     If it is required for a particular target machine, it should
+     return 1 if VALUE corresponds to the operand type represented by
+     the constraint letter C.  If C is not defined as an extra
+     constraint, the value returned should be 0 regardless of VALUE.
+
+     For example, on the ROMP, load instructions cannot have their
+     output in r0 if the memory reference contains a symbolic address.
+     Constraint letter `Q' is defined as representing a memory address
+     that does _not_ contain a symbolic address.  An alternative is
+     specified with a `Q' constraint on the input and `r' on the
+     output.  The next alternative specifies `m' on the input and a
+     register class that does not include r0 on the output.
+
+ -- Macro: EXTRA_CONSTRAINT_STR (VALUE, C, STR)
+     Like `EXTRA_CONSTRAINT', but you also get the constraint string
+     passed in STR, so that you can use suffixes to distinguish between
+     different variants.
+
+ -- Macro: EXTRA_MEMORY_CONSTRAINT (C, STR)
+     A C expression that defines the optional machine-dependent
+     constraint letters, amongst those accepted by `EXTRA_CONSTRAINT',
+     that should be treated like memory constraints by the reload pass.
+
+     It should return 1 if the operand type represented by the
+     constraint at the start of STR, the first letter of which is the
+     letter C, comprises a subset of all memory references including
+     all those whose address is simply a base register.  This allows
+     the reload pass to reload an operand, if it does not directly
+     correspond to the operand type of C, by copying its address into a
+     base register.
+
+     For example, on the S/390, some instructions do not accept
+     arbitrary memory references, but only those that do not make use
+     of an index register.  The constraint letter `Q' is defined via
+     `EXTRA_CONSTRAINT' as representing a memory address of this type.
+     If the letter `Q' is marked as `EXTRA_MEMORY_CONSTRAINT', a `Q'
+     constraint can handle any memory operand, because the reload pass
+     knows it can be reloaded by copying the memory address into a base
+     register if required.  This is analogous to the way an `o'
+     constraint can handle any memory operand.
+
+ -- Macro: EXTRA_ADDRESS_CONSTRAINT (C, STR)
+     A C expression that defines the optional machine-dependent
+     constraint letters, amongst those accepted by `EXTRA_CONSTRAINT' /
+     `EXTRA_CONSTRAINT_STR', that should be treated like address
+     constraints by the reload pass.
+
+     It should return 1 if the operand type represented by the
+     constraint at the start of STR, which starts with the letter C,
+     comprises a subset of all memory addresses including all those
+     that consist of just a base register.  This allows the reload pass
+     to reload an operand, if it does not directly correspond to the
+     operand type of STR, by copying it into a base register.
+
+     Any constraint marked as `EXTRA_ADDRESS_CONSTRAINT' can only be
+     used with the `address_operand' predicate.  It is treated
+     analogously to the `p' constraint.
+
+
+File: gccint.info,  Node: Stack and Calling,  Next: Varargs,  Prev: Old Constraints,  Up: Target Macros
+
+17.10 Stack Layout and Calling Conventions
+==========================================
+
+This describes the stack layout and calling conventions.
+
+* Menu:
+
+* Frame Layout::
+* Exception Handling::
+* Stack Checking::
+* Frame Registers::
+* Elimination::
+* Stack Arguments::
+* Register Arguments::
+* Scalar Return::
+* Aggregate Return::
+* Caller Saves::
+* Function Entry::
+* Profiling::
+* Tail Calls::
+* Stack Smashing Protection::
+
+
+File: gccint.info,  Node: Frame Layout,  Next: Exception Handling,  Up: Stack and Calling
+
+17.10.1 Basic Stack Layout
+--------------------------
+
+Here is the basic stack layout.
+
+ -- Macro: STACK_GROWS_DOWNWARD
+     Define this macro if pushing a word onto the stack moves the stack
+     pointer to a smaller address.
+
+     When we say, "define this macro if ...", it means that the
+     compiler checks this macro only with `#ifdef' so the precise
+     definition used does not matter.
+
+ -- Macro: STACK_PUSH_CODE
+     This macro defines the operation used when something is pushed on
+     the stack.  In RTL, a push operation will be `(set (mem
+     (STACK_PUSH_CODE (reg sp))) ...)'
+
+     The choices are `PRE_DEC', `POST_DEC', `PRE_INC', and `POST_INC'.
+     Which of these is correct depends on the stack direction and on
+     whether the stack pointer points to the last item on the stack or
+     whether it points to the space for the next item on the stack.
+
+     The default is `PRE_DEC' when `STACK_GROWS_DOWNWARD' is defined,
+     which is almost always right, and `PRE_INC' otherwise, which is
+     often wrong.
+
+ -- Macro: FRAME_GROWS_DOWNWARD
+     Define this macro to nonzero value if the addresses of local
+     variable slots are at negative offsets from the frame pointer.
+
+ -- Macro: ARGS_GROW_DOWNWARD
+     Define this macro if successive arguments to a function occupy
+     decreasing addresses on the stack.
+
+ -- Macro: STARTING_FRAME_OFFSET
+     Offset from the frame pointer to the first local variable slot to
+     be allocated.
+
+     If `FRAME_GROWS_DOWNWARD', find the next slot's offset by
+     subtracting the first slot's length from `STARTING_FRAME_OFFSET'.
+     Otherwise, it is found by adding the length of the first slot to
+     the value `STARTING_FRAME_OFFSET'.
+
+ -- Macro: STACK_ALIGNMENT_NEEDED
+     Define to zero to disable final alignment of the stack during
+     reload.  The nonzero default for this macro is suitable for most
+     ports.
+
+     On ports where `STARTING_FRAME_OFFSET' is nonzero or where there
+     is a register save block following the local block that doesn't
+     require alignment to `STACK_BOUNDARY', it may be beneficial to
+     disable stack alignment and do it in the backend.
+
+ -- Macro: STACK_POINTER_OFFSET
+     Offset from the stack pointer register to the first location at
+     which outgoing arguments are placed.  If not specified, the
+     default value of zero is used.  This is the proper value for most
+     machines.
+
+     If `ARGS_GROW_DOWNWARD', this is the offset to the location above
+     the first location at which outgoing arguments are placed.
+
+ -- Macro: FIRST_PARM_OFFSET (FUNDECL)
+     Offset from the argument pointer register to the first argument's
+     address.  On some machines it may depend on the data type of the
+     function.
+
+     If `ARGS_GROW_DOWNWARD', this is the offset to the location above
+     the first argument's address.
+
+ -- Macro: STACK_DYNAMIC_OFFSET (FUNDECL)
+     Offset from the stack pointer register to an item dynamically
+     allocated on the stack, e.g., by `alloca'.
+
+     The default value for this macro is `STACK_POINTER_OFFSET' plus the
+     length of the outgoing arguments.  The default is correct for most
+     machines.  See `function.c' for details.
+
+ -- Macro: INITIAL_FRAME_ADDRESS_RTX
+     A C expression whose value is RTL representing the address of the
+     initial stack frame. This address is passed to `RETURN_ADDR_RTX'
+     and `DYNAMIC_CHAIN_ADDRESS'.  If you don't define this macro, a
+     reasonable default value will be used.  Define this macro in order
+     to make frame pointer elimination work in the presence of
+     `__builtin_frame_address (count)' and `__builtin_return_address
+     (count)' for `count' not equal to zero.
+
+ -- Macro: DYNAMIC_CHAIN_ADDRESS (FRAMEADDR)
+     A C expression whose value is RTL representing the address in a
+     stack frame where the pointer to the caller's frame is stored.
+     Assume that FRAMEADDR is an RTL expression for the address of the
+     stack frame itself.
+
+     If you don't define this macro, the default is to return the value
+     of FRAMEADDR--that is, the stack frame address is also the address
+     of the stack word that points to the previous frame.
+
+ -- Macro: SETUP_FRAME_ADDRESSES
+     If defined, a C expression that produces the machine-specific code
+     to setup the stack so that arbitrary frames can be accessed.  For
+     example, on the SPARC, we must flush all of the register windows
+     to the stack before we can access arbitrary stack frames.  You
+     will seldom need to define this macro.
+
+ -- Target Hook: rtx TARGET_BUILTIN_SETJMP_FRAME_VALUE (void)
+     This target hook should return an rtx that is used to store the
+     address of the current frame into the built in `setjmp' buffer.
+     The default value, `virtual_stack_vars_rtx', is correct for most
+     machines.  One reason you may need to define this target hook is if
+     `hard_frame_pointer_rtx' is the appropriate value on your machine.
+
+ -- Macro: FRAME_ADDR_RTX (FRAMEADDR)
+     A C expression whose value is RTL representing the value of the
+     frame address for the current frame.  FRAMEADDR is the frame
+     pointer of the current frame.  This is used for
+     __builtin_frame_address.  You need only define this macro if the
+     frame address is not the same as the frame pointer.  Most machines
+     do not need to define it.
+
+ -- Macro: RETURN_ADDR_RTX (COUNT, FRAMEADDR)
+     A C expression whose value is RTL representing the value of the
+     return address for the frame COUNT steps up from the current
+     frame, after the prologue.  FRAMEADDR is the frame pointer of the
+     COUNT frame, or the frame pointer of the COUNT - 1 frame if
+     `RETURN_ADDR_IN_PREVIOUS_FRAME' is defined.
+
+     The value of the expression must always be the correct address when
+     COUNT is zero, but may be `NULL_RTX' if there is no way to
+     determine the return address of other frames.
+
+ -- Macro: RETURN_ADDR_IN_PREVIOUS_FRAME
+     Define this if the return address of a particular stack frame is
+     accessed from the frame pointer of the previous stack frame.
+
+ -- Macro: INCOMING_RETURN_ADDR_RTX
+     A C expression whose value is RTL representing the location of the
+     incoming return address at the beginning of any function, before
+     the prologue.  This RTL is either a `REG', indicating that the
+     return value is saved in `REG', or a `MEM' representing a location
+     in the stack.
+
+     You only need to define this macro if you want to support call
+     frame debugging information like that provided by DWARF 2.
+
+     If this RTL is a `REG', you should also define
+     `DWARF_FRAME_RETURN_COLUMN' to `DWARF_FRAME_REGNUM (REGNO)'.
+
+ -- Macro: DWARF_ALT_FRAME_RETURN_COLUMN
+     A C expression whose value is an integer giving a DWARF 2 column
+     number that may be used as an alternative return column.  The
+     column must not correspond to any gcc hard register (that is, it
+     must not be in the range of `DWARF_FRAME_REGNUM').
+
+     This macro can be useful if `DWARF_FRAME_RETURN_COLUMN' is set to a
+     general register, but an alternative column needs to be used for
+     signal frames.  Some targets have also used different frame return
+     columns over time.
+
+ -- Macro: DWARF_ZERO_REG
+     A C expression whose value is an integer giving a DWARF 2 register
+     number that is considered to always have the value zero.  This
+     should only be defined if the target has an architected zero
+     register, and someone decided it was a good idea to use that
+     register number to terminate the stack backtrace.  New ports
+     should avoid this.
+
+ -- Target Hook: void TARGET_DWARF_HANDLE_FRAME_UNSPEC (const char
+          *LABEL, rtx PATTERN, int INDEX)
+     This target hook allows the backend to emit frame-related insns
+     that contain UNSPECs or UNSPEC_VOLATILEs.  The DWARF 2 call frame
+     debugging info engine will invoke it on insns of the form
+          (set (reg) (unspec [...] UNSPEC_INDEX))
+     and
+          (set (reg) (unspec_volatile [...] UNSPECV_INDEX)).
+     to let the backend emit the call frame instructions.  LABEL is the
+     CFI label attached to the insn, PATTERN is the pattern of the insn
+     and INDEX is `UNSPEC_INDEX' or `UNSPECV_INDEX'.
+
+ -- Macro: INCOMING_FRAME_SP_OFFSET
+     A C expression whose value is an integer giving the offset, in
+     bytes, from the value of the stack pointer register to the top of
+     the stack frame at the beginning of any function, before the
+     prologue.  The top of the frame is defined to be the value of the
+     stack pointer in the previous frame, just before the call
+     instruction.
+
+     You only need to define this macro if you want to support call
+     frame debugging information like that provided by DWARF 2.
+
+ -- Macro: ARG_POINTER_CFA_OFFSET (FUNDECL)
+     A C expression whose value is an integer giving the offset, in
+     bytes, from the argument pointer to the canonical frame address
+     (cfa).  The final value should coincide with that calculated by
+     `INCOMING_FRAME_SP_OFFSET'.  Which is unfortunately not usable
+     during virtual register instantiation.
+
+     The default value for this macro is `FIRST_PARM_OFFSET (fundecl) +
+     crtl->args.pretend_args_size', which is correct for most machines;
+     in general, the arguments are found immediately before the stack
+     frame.  Note that this is not the case on some targets that save
+     registers into the caller's frame, such as SPARC and rs6000, and
+     so such targets need to define this macro.
+
+     You only need to define this macro if the default is incorrect,
+     and you want to support call frame debugging information like that
+     provided by DWARF 2.
+
+ -- Macro: FRAME_POINTER_CFA_OFFSET (FUNDECL)
+     If defined, a C expression whose value is an integer giving the
+     offset in bytes from the frame pointer to the canonical frame
+     address (cfa).  The final value should coincide with that
+     calculated by `INCOMING_FRAME_SP_OFFSET'.
+
+     Normally the CFA is calculated as an offset from the argument
+     pointer, via `ARG_POINTER_CFA_OFFSET', but if the argument pointer
+     is variable due to the ABI, this may not be possible.  If this
+     macro is defined, it implies that the virtual register
+     instantiation should be based on the frame pointer instead of the
+     argument pointer.  Only one of `FRAME_POINTER_CFA_OFFSET' and
+     `ARG_POINTER_CFA_OFFSET' should be defined.
+
+ -- Macro: CFA_FRAME_BASE_OFFSET (FUNDECL)
+     If defined, a C expression whose value is an integer giving the
+     offset in bytes from the canonical frame address (cfa) to the
+     frame base used in DWARF 2 debug information.  The default is
+     zero.  A different value may reduce the size of debug information
+     on some ports.
+
+
+File: gccint.info,  Node: Exception Handling,  Next: Stack Checking,  Prev: Frame Layout,  Up: Stack and Calling
+
+17.10.2 Exception Handling Support
+----------------------------------
+
+ -- Macro: EH_RETURN_DATA_REGNO (N)
+     A C expression whose value is the Nth register number used for
+     data by exception handlers, or `INVALID_REGNUM' if fewer than N
+     registers are usable.
+
+     The exception handling library routines communicate with the
+     exception handlers via a set of agreed upon registers.  Ideally
+     these registers should be call-clobbered; it is possible to use
+     call-saved registers, but may negatively impact code size.  The
+     target must support at least 2 data registers, but should define 4
+     if there are enough free registers.
+
+     You must define this macro if you want to support call frame
+     exception handling like that provided by DWARF 2.
+
+ -- Macro: EH_RETURN_STACKADJ_RTX
+     A C expression whose value is RTL representing a location in which
+     to store a stack adjustment to be applied before function return.
+     This is used to unwind the stack to an exception handler's call
+     frame.  It will be assigned zero on code paths that return
+     normally.
+
+     Typically this is a call-clobbered hard register that is otherwise
+     untouched by the epilogue, but could also be a stack slot.
+
+     Do not define this macro if the stack pointer is saved and restored
+     by the regular prolog and epilog code in the call frame itself; in
+     this case, the exception handling library routines will update the
+     stack location to be restored in place.  Otherwise, you must define
+     this macro if you want to support call frame exception handling
+     like that provided by DWARF 2.
+
+ -- Macro: EH_RETURN_HANDLER_RTX
+     A C expression whose value is RTL representing a location in which
+     to store the address of an exception handler to which we should
+     return.  It will not be assigned on code paths that return
+     normally.
+
+     Typically this is the location in the call frame at which the
+     normal return address is stored.  For targets that return by
+     popping an address off the stack, this might be a memory address
+     just below the _target_ call frame rather than inside the current
+     call frame.  If defined, `EH_RETURN_STACKADJ_RTX' will have already
+     been assigned, so it may be used to calculate the location of the
+     target call frame.
+
+     Some targets have more complex requirements than storing to an
+     address calculable during initial code generation.  In that case
+     the `eh_return' instruction pattern should be used instead.
+
+     If you want to support call frame exception handling, you must
+     define either this macro or the `eh_return' instruction pattern.
+
+ -- Macro: RETURN_ADDR_OFFSET
+     If defined, an integer-valued C expression for which rtl will be
+     generated to add it to the exception handler address before it is
+     searched in the exception handling tables, and to subtract it
+     again from the address before using it to return to the exception
+     handler.
+
+ -- Macro: ASM_PREFERRED_EH_DATA_FORMAT (CODE, GLOBAL)
+     This macro chooses the encoding of pointers embedded in the
+     exception handling sections.  If at all possible, this should be
+     defined such that the exception handling section will not require
+     dynamic relocations, and so may be read-only.
+
+     CODE is 0 for data, 1 for code labels, 2 for function pointers.
+     GLOBAL is true if the symbol may be affected by dynamic
+     relocations.  The macro should return a combination of the
+     `DW_EH_PE_*' defines as found in `dwarf2.h'.
+
+     If this macro is not defined, pointers will not be encoded but
+     represented directly.
+
+ -- Macro: ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX (FILE, ENCODING, SIZE,
+          ADDR, DONE)
+     This macro allows the target to emit whatever special magic is
+     required to represent the encoding chosen by
+     `ASM_PREFERRED_EH_DATA_FORMAT'.  Generic code takes care of
+     pc-relative and indirect encodings; this must be defined if the
+     target uses text-relative or data-relative encodings.
+
+     This is a C statement that branches to DONE if the format was
+     handled.  ENCODING is the format chosen, SIZE is the number of
+     bytes that the format occupies, ADDR is the `SYMBOL_REF' to be
+     emitted.
+
+ -- Macro: MD_UNWIND_SUPPORT
+     A string specifying a file to be #include'd in unwind-dw2.c.  The
+     file so included typically defines `MD_FALLBACK_FRAME_STATE_FOR'.
+
+ -- Macro: MD_FALLBACK_FRAME_STATE_FOR (CONTEXT, FS)
+     This macro allows the target to add CPU and operating system
+     specific code to the call-frame unwinder for use when there is no
+     unwind data available.  The most common reason to implement this
+     macro is to unwind through signal frames.
+
+     This macro is called from `uw_frame_state_for' in `unwind-dw2.c',
+     `unwind-dw2-xtensa.c' and `unwind-ia64.c'.  CONTEXT is an
+     `_Unwind_Context'; FS is an `_Unwind_FrameState'.  Examine
+     `context->ra' for the address of the code being executed and
+     `context->cfa' for the stack pointer value.  If the frame can be
+     decoded, the register save addresses should be updated in FS and
+     the macro should evaluate to `_URC_NO_REASON'.  If the frame
+     cannot be decoded, the macro should evaluate to
+     `_URC_END_OF_STACK'.
+
+     For proper signal handling in Java this macro is accompanied by
+     `MAKE_THROW_FRAME', defined in `libjava/include/*-signal.h'
+     headers.
+
+ -- Macro: MD_HANDLE_UNWABI (CONTEXT, FS)
+     This macro allows the target to add operating system specific code
+     to the call-frame unwinder to handle the IA-64 `.unwabi' unwinding
+     directive, usually used for signal or interrupt frames.
+
+     This macro is called from `uw_update_context' in `unwind-ia64.c'.
+     CONTEXT is an `_Unwind_Context'; FS is an `_Unwind_FrameState'.
+     Examine `fs->unwabi' for the abi and context in the `.unwabi'
+     directive.  If the `.unwabi' directive can be handled, the
+     register save addresses should be updated in FS.
+
+ -- Macro: TARGET_USES_WEAK_UNWIND_INFO
+     A C expression that evaluates to true if the target requires unwind
+     info to be given comdat linkage.  Define it to be `1' if comdat
+     linkage is necessary.  The default is `0'.
+
+
+File: gccint.info,  Node: Stack Checking,  Next: Frame Registers,  Prev: Exception Handling,  Up: Stack and Calling
+
+17.10.3 Specifying How Stack Checking is Done
+---------------------------------------------
+
+GCC will check that stack references are within the boundaries of the
+stack, if the option `-fstack-check' is specified, in one of three ways:
+
+  1. If the value of the `STACK_CHECK_BUILTIN' macro is nonzero, GCC
+     will assume that you have arranged for full stack checking to be
+     done at appropriate places in the configuration files.  GCC will
+     not do other special processing.
+
+  2. If `STACK_CHECK_BUILTIN' is zero and the value of the
+     `STACK_CHECK_STATIC_BUILTIN' macro is nonzero, GCC will assume
+     that you have arranged for static stack checking (checking of the
+     static stack frame of functions) to be done at appropriate places
+     in the configuration files.  GCC will only emit code to do dynamic
+     stack checking (checking on dynamic stack allocations) using the
+     third approach below.
+
+  3. If neither of the above are true, GCC will generate code to
+     periodically "probe" the stack pointer using the values of the
+     macros defined below.
+
+ If neither STACK_CHECK_BUILTIN nor STACK_CHECK_STATIC_BUILTIN is
+defined, GCC will change its allocation strategy for large objects if
+the option `-fstack-check' is specified: they will always be allocated
+dynamically if their size exceeds `STACK_CHECK_MAX_VAR_SIZE' bytes.
+
+ -- Macro: STACK_CHECK_BUILTIN
+     A nonzero value if stack checking is done by the configuration
+     files in a machine-dependent manner.  You should define this macro
+     if stack checking is required by the ABI of your machine or if you
+     would like to do stack checking in some more efficient way than
+     the generic approach.  The default value of this macro is zero.
+
+ -- Macro: STACK_CHECK_STATIC_BUILTIN
+     A nonzero value if static stack checking is done by the
+     configuration files in a machine-dependent manner.  You should
+     define this macro if you would like to do static stack checking in
+     some more efficient way than the generic approach.  The default
+     value of this macro is zero.
+
+ -- Macro: STACK_CHECK_PROBE_INTERVAL_EXP
+     An integer specifying the interval at which GCC must generate
+     stack probe instructions, defined as 2 raised to this integer.
+     You will normally define this macro so that the interval be no
+     larger than the size of the "guard pages" at the end of a stack
+     area.  The default value of 12 (4096-byte interval) is suitable
+     for most systems.
+
+ -- Macro: STACK_CHECK_MOVING_SP
+     An integer which is nonzero if GCC should move the stack pointer
+     page by page when doing probes.  This can be necessary on systems
+     where the stack pointer contains the bottom address of the memory
+     area accessible to the executing thread at any point in time.  In
+     this situation an alternate signal stack is required in order to
+     be able to recover from a stack overflow.  The default value of
+     this macro is zero.
+
+ -- Macro: STACK_CHECK_PROTECT
+     The number of bytes of stack needed to recover from a stack
+     overflow, for languages where such a recovery is supported.  The
+     default value of 75 words with the `setjmp'/`longjmp'-based
+     exception handling mechanism and 8192 bytes with other exception
+     handling mechanisms should be adequate for most machines.
+
+ The following macros are relevant only if neither STACK_CHECK_BUILTIN
+nor STACK_CHECK_STATIC_BUILTIN is defined; you can omit them altogether
+in the opposite case.
+
+ -- Macro: STACK_CHECK_MAX_FRAME_SIZE
+     The maximum size of a stack frame, in bytes.  GCC will generate
+     probe instructions in non-leaf functions to ensure at least this
+     many bytes of stack are available.  If a stack frame is larger
+     than this size, stack checking will not be reliable and GCC will
+     issue a warning.  The default is chosen so that GCC only generates
+     one instruction on most systems.  You should normally not change
+     the default value of this macro.
+
+ -- Macro: STACK_CHECK_FIXED_FRAME_SIZE
+     GCC uses this value to generate the above warning message.  It
+     represents the amount of fixed frame used by a function, not
+     including space for any callee-saved registers, temporaries and
+     user variables.  You need only specify an upper bound for this
+     amount and will normally use the default of four words.
+
+ -- Macro: STACK_CHECK_MAX_VAR_SIZE
+     The maximum size, in bytes, of an object that GCC will place in the
+     fixed area of the stack frame when the user specifies
+     `-fstack-check'.  GCC computed the default from the values of the
+     above macros and you will normally not need to override that
+     default.
+
+
+File: gccint.info,  Node: Frame Registers,  Next: Elimination,  Prev: Stack Checking,  Up: Stack and Calling
+
+17.10.4 Registers That Address the Stack Frame
+----------------------------------------------
+
+This discusses registers that address the stack frame.
+
+ -- Macro: STACK_POINTER_REGNUM
+     The register number of the stack pointer register, which must also
+     be a fixed register according to `FIXED_REGISTERS'.  On most
+     machines, the hardware determines which register this is.
+
+ -- Macro: FRAME_POINTER_REGNUM
+     The register number of the frame pointer register, which is used to
+     access automatic variables in the stack frame.  On some machines,
+     the hardware determines which register this is.  On other
+     machines, you can choose any register you wish for this purpose.
+
+ -- Macro: HARD_FRAME_POINTER_REGNUM
+     On some machines the offset between the frame pointer and starting
+     offset of the automatic variables is not known until after register
+     allocation has been done (for example, because the saved registers
+     are between these two locations).  On those machines, define
+     `FRAME_POINTER_REGNUM' the number of a special, fixed register to
+     be used internally until the offset is known, and define
+     `HARD_FRAME_POINTER_REGNUM' to be the actual hard register number
+     used for the frame pointer.
+
+     You should define this macro only in the very rare circumstances
+     when it is not possible to calculate the offset between the frame
+     pointer and the automatic variables until after register
+     allocation has been completed.  When this macro is defined, you
+     must also indicate in your definition of `ELIMINABLE_REGS' how to
+     eliminate `FRAME_POINTER_REGNUM' into either
+     `HARD_FRAME_POINTER_REGNUM' or `STACK_POINTER_REGNUM'.
+
+     Do not define this macro if it would be the same as
+     `FRAME_POINTER_REGNUM'.
+
+ -- Macro: ARG_POINTER_REGNUM
+     The register number of the arg pointer register, which is used to
+     access the function's argument list.  On some machines, this is
+     the same as the frame pointer register.  On some machines, the
+     hardware determines which register this is.  On other machines,
+     you can choose any register you wish for this purpose.  If this is
+     not the same register as the frame pointer register, then you must
+     mark it as a fixed register according to `FIXED_REGISTERS', or
+     arrange to be able to eliminate it (*note Elimination::).
+
+ -- Macro: HARD_FRAME_POINTER_IS_FRAME_POINTER
+     Define this to a preprocessor constant that is nonzero if
+     `hard_frame_pointer_rtx' and `frame_pointer_rtx' should be the
+     same.  The default definition is `(HARD_FRAME_POINTER_REGNUM ==
+     FRAME_POINTER_REGNUM)'; you only need to define this macro if that
+     definition is not suitable for use in preprocessor conditionals.
+
+ -- Macro: HARD_FRAME_POINTER_IS_ARG_POINTER
+     Define this to a preprocessor constant that is nonzero if
+     `hard_frame_pointer_rtx' and `arg_pointer_rtx' should be the same.
+     The default definition is `(HARD_FRAME_POINTER_REGNUM ==
+     ARG_POINTER_REGNUM)'; you only need to define this macro if that
+     definition is not suitable for use in preprocessor conditionals.
+
+ -- Macro: RETURN_ADDRESS_POINTER_REGNUM
+     The register number of the return address pointer register, which
+     is used to access the current function's return address from the
+     stack.  On some machines, the return address is not at a fixed
+     offset from the frame pointer or stack pointer or argument
+     pointer.  This register can be defined to point to the return
+     address on the stack, and then be converted by `ELIMINABLE_REGS'
+     into either the frame pointer or stack pointer.
+
+     Do not define this macro unless there is no other way to get the
+     return address from the stack.
+
+ -- Macro: STATIC_CHAIN_REGNUM
+ -- Macro: STATIC_CHAIN_INCOMING_REGNUM
+     Register numbers used for passing a function's static chain
+     pointer.  If register windows are used, the register number as
+     seen by the called function is `STATIC_CHAIN_INCOMING_REGNUM',
+     while the register number as seen by the calling function is
+     `STATIC_CHAIN_REGNUM'.  If these registers are the same,
+     `STATIC_CHAIN_INCOMING_REGNUM' need not be defined.
+
+     The static chain register need not be a fixed register.
+
+     If the static chain is passed in memory, these macros should not be
+     defined; instead, the `TARGET_STATIC_CHAIN' hook should be used.
+
+ -- Target Hook: rtx TARGET_STATIC_CHAIN (const_tree FNDECL, bool
+          INCOMING_P)
+     This hook replaces the use of `STATIC_CHAIN_REGNUM' et al for
+     targets that may use different static chain locations for different
+     nested functions.  This may be required if the target has function
+     attributes that affect the calling conventions of the function and
+     those calling conventions use different static chain locations.
+
+     The default version of this hook uses `STATIC_CHAIN_REGNUM' et al.
+
+     If the static chain is passed in memory, this hook should be used
+     to provide rtx giving `mem' expressions that denote where they are
+     stored.  Often the `mem' expression as seen by the caller will be
+     at an offset from the stack pointer and the `mem' expression as
+     seen by the callee will be at an offset from the frame pointer.  The
+     variables `stack_pointer_rtx', `frame_pointer_rtx', and
+     `arg_pointer_rtx' will have been initialized and should be used to
+     refer to those items.
+
+ -- Macro: DWARF_FRAME_REGISTERS
+     This macro specifies the maximum number of hard registers that can
+     be saved in a call frame.  This is used to size data structures
+     used in DWARF2 exception handling.
+
+     Prior to GCC 3.0, this macro was needed in order to establish a
+     stable exception handling ABI in the face of adding new hard
+     registers for ISA extensions.  In GCC 3.0 and later, the EH ABI is
+     insulated from changes in the number of hard registers.
+     Nevertheless, this macro can still be used to reduce the runtime
+     memory requirements of the exception handling routines, which can
+     be substantial if the ISA contains a lot of registers that are not
+     call-saved.
+
+     If this macro is not defined, it defaults to
+     `FIRST_PSEUDO_REGISTER'.
+
+ -- Macro: PRE_GCC3_DWARF_FRAME_REGISTERS
+     This macro is similar to `DWARF_FRAME_REGISTERS', but is provided
+     for backward compatibility in pre GCC 3.0 compiled code.
+
+     If this macro is not defined, it defaults to
+     `DWARF_FRAME_REGISTERS'.
+
+ -- Macro: DWARF_REG_TO_UNWIND_COLUMN (REGNO)
+     Define this macro if the target's representation for dwarf
+     registers is different than the internal representation for unwind
+     column.  Given a dwarf register, this macro should return the
+     internal unwind column number to use instead.
+
+     See the PowerPC's SPE target for an example.
+
+ -- Macro: DWARF_FRAME_REGNUM (REGNO)
+     Define this macro if the target's representation for dwarf
+     registers used in .eh_frame or .debug_frame is different from that
+     used in other debug info sections.  Given a GCC hard register
+     number, this macro should return the .eh_frame register number.
+     The default is `DBX_REGISTER_NUMBER (REGNO)'.
+
+
+ -- Macro: DWARF2_FRAME_REG_OUT (REGNO, FOR_EH)
+     Define this macro to map register numbers held in the call frame
+     info that GCC has collected using `DWARF_FRAME_REGNUM' to those
+     that should be output in .debug_frame (`FOR_EH' is zero) and
+     .eh_frame (`FOR_EH' is nonzero).  The default is to return `REGNO'.
+
+
+
+File: gccint.info,  Node: Elimination,  Next: Stack Arguments,  Prev: Frame Registers,  Up: Stack and Calling
+
+17.10.5 Eliminating Frame Pointer and Arg Pointer
+-------------------------------------------------
+
+This is about eliminating the frame pointer and arg pointer.
+
+ -- Target Hook: bool TARGET_FRAME_POINTER_REQUIRED (void)
+     This target hook should return `true' if a function must have and
+     use a frame pointer.  This target hook is called in the reload
+     pass.  If its return value is `true' the function will have a
+     frame pointer.
+
+     This target hook can in principle examine the current function and
+     decide according to the facts, but on most machines the constant
+     `false' or the constant `true' suffices.  Use `false' when the
+     machine allows code to be generated with no frame pointer, and
+     doing so saves some time or space.  Use `true' when there is no
+     possible advantage to avoiding a frame pointer.
+
+     In certain cases, the compiler does not know how to produce valid
+     code without a frame pointer.  The compiler recognizes those cases
+     and automatically gives the function a frame pointer regardless of
+     what `TARGET_FRAME_POINTER_REQUIRED' returns.  You don't need to
+     worry about them.
+
+     In a function that does not require a frame pointer, the frame
+     pointer register can be allocated for ordinary usage, unless you
+     mark it as a fixed register.  See `FIXED_REGISTERS' for more
+     information.
+
+     Default return value is `false'.
+
+ -- Macro: INITIAL_FRAME_POINTER_OFFSET (DEPTH-VAR)
+     A C statement to store in the variable DEPTH-VAR the difference
+     between the frame pointer and the stack pointer values immediately
+     after the function prologue.  The value would be computed from
+     information such as the result of `get_frame_size ()' and the
+     tables of registers `regs_ever_live' and `call_used_regs'.
+
+     If `ELIMINABLE_REGS' is defined, this macro will be not be used and
+     need not be defined.  Otherwise, it must be defined even if
+     `TARGET_FRAME_POINTER_REQUIRED' always returns true; in that case,
+     you may set DEPTH-VAR to anything.
+
+ -- Macro: ELIMINABLE_REGS
+     If defined, this macro specifies a table of register pairs used to
+     eliminate unneeded registers that point into the stack frame.  If
+     it is not defined, the only elimination attempted by the compiler
+     is to replace references to the frame pointer with references to
+     the stack pointer.
+
+     The definition of this macro is a list of structure
+     initializations, each of which specifies an original and
+     replacement register.
+
+     On some machines, the position of the argument pointer is not
+     known until the compilation is completed.  In such a case, a
+     separate hard register must be used for the argument pointer.
+     This register can be eliminated by replacing it with either the
+     frame pointer or the argument pointer, depending on whether or not
+     the frame pointer has been eliminated.
+
+     In this case, you might specify:
+          #define ELIMINABLE_REGS  \
+          {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
+           {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
+           {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
+
+     Note that the elimination of the argument pointer with the stack
+     pointer is specified first since that is the preferred elimination.
+
+ -- Target Hook: bool TARGET_CAN_ELIMINATE (const int FROM_REG, const
+          int TO_REG)
+     This target hook should returns `true' if the compiler is allowed
+     to try to replace register number FROM_REG with register number
+     TO_REG.  This target hook need only be defined if `ELIMINABLE_REGS'
+     is defined, and will usually be `true', since most of the cases
+     preventing register elimination are things that the compiler
+     already knows about.
+
+     Default return value is `true'.
+
+ -- Macro: INITIAL_ELIMINATION_OFFSET (FROM-REG, TO-REG, OFFSET-VAR)
+     This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'.  It
+     specifies the initial difference between the specified pair of
+     registers.  This macro must be defined if `ELIMINABLE_REGS' is
+     defined.
+
+
+File: gccint.info,  Node: Stack Arguments,  Next: Register Arguments,  Prev: Elimination,  Up: Stack and Calling
+
+17.10.6 Passing Function Arguments on the Stack
+-----------------------------------------------
+
+The macros in this section control how arguments are passed on the
+stack.  See the following section for other macros that control passing
+certain arguments in registers.
+
+ -- Target Hook: bool TARGET_PROMOTE_PROTOTYPES (const_tree FNTYPE)
+     This target hook returns `true' if an argument declared in a
+     prototype as an integral type smaller than `int' should actually be
+     passed as an `int'.  In addition to avoiding errors in certain
+     cases of mismatch, it also makes for better code on certain
+     machines.  The default is to not promote prototypes.
+
+ -- Macro: PUSH_ARGS
+     A C expression.  If nonzero, push insns will be used to pass
+     outgoing arguments.  If the target machine does not have a push
+     instruction, set it to zero.  That directs GCC to use an alternate
+     strategy: to allocate the entire argument block and then store the
+     arguments into it.  When `PUSH_ARGS' is nonzero, `PUSH_ROUNDING'
+     must be defined too.
+
+ -- Macro: PUSH_ARGS_REVERSED
+     A C expression.  If nonzero, function arguments will be evaluated
+     from last to first, rather than from first to last.  If this macro
+     is not defined, it defaults to `PUSH_ARGS' on targets where the
+     stack and args grow in opposite directions, and 0 otherwise.
+
+ -- Macro: PUSH_ROUNDING (NPUSHED)
+     A C expression that is the number of bytes actually pushed onto the
+     stack when an instruction attempts to push NPUSHED bytes.
+
+     On some machines, the definition
+
+          #define PUSH_ROUNDING(BYTES) (BYTES)
+
+     will suffice.  But on other machines, instructions that appear to
+     push one byte actually push two bytes in an attempt to maintain
+     alignment.  Then the definition should be
+
+          #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & ~1)
+
+     If the value of this macro has a type, it should be an unsigned
+     type.
+
+ -- Macro: ACCUMULATE_OUTGOING_ARGS
+     A C expression.  If nonzero, the maximum amount of space required
+     for outgoing arguments will be computed and placed into the
+     variable `current_function_outgoing_args_size'.  No space will be
+     pushed onto the stack for each call; instead, the function
+     prologue should increase the stack frame size by this amount.
+
+     Setting both `PUSH_ARGS' and `ACCUMULATE_OUTGOING_ARGS' is not
+     proper.
+
+ -- Macro: REG_PARM_STACK_SPACE (FNDECL)
+     Define this macro if functions should assume that stack space has
+     been allocated for arguments even when their values are passed in
+     registers.
+
+     The value of this macro is the size, in bytes, of the area
+     reserved for arguments passed in registers for the function
+     represented by FNDECL, which can be zero if GCC is calling a
+     library function.  The argument FNDECL can be the FUNCTION_DECL,
+     or the type itself of the function.
+
+     This space can be allocated by the caller, or be a part of the
+     machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE' says
+     which.
+
+ -- Macro: OUTGOING_REG_PARM_STACK_SPACE (FNTYPE)
+     Define this to a nonzero value if it is the responsibility of the
+     caller to allocate the area reserved for arguments passed in
+     registers when calling a function of FNTYPE.  FNTYPE may be NULL
+     if the function called is a library function.
+
+     If `ACCUMULATE_OUTGOING_ARGS' is defined, this macro controls
+     whether the space for these arguments counts in the value of
+     `current_function_outgoing_args_size'.
+
+ -- Macro: STACK_PARMS_IN_REG_PARM_AREA
+     Define this macro if `REG_PARM_STACK_SPACE' is defined, but the
+     stack parameters don't skip the area specified by it.
+
+     Normally, when a parameter is not passed in registers, it is
+     placed on the stack beyond the `REG_PARM_STACK_SPACE' area.
+     Defining this macro suppresses this behavior and causes the
+     parameter to be passed on the stack in its natural location.
+
+ -- Target Hook: int TARGET_RETURN_POPS_ARGS (tree FUNDECL, tree
+          FUNTYPE, int SIZE)
+     This target hook returns the number of bytes of its own arguments
+     that a function pops on returning, or 0 if the function pops no
+     arguments and the caller must therefore pop them all after the
+     function returns.
+
+     FUNDECL is a C variable whose value is a tree node that describes
+     the function in question.  Normally it is a node of type
+     `FUNCTION_DECL' that describes the declaration of the function.
+     From this you can obtain the `DECL_ATTRIBUTES' of the function.
+
+     FUNTYPE is a C variable whose value is a tree node that describes
+     the function in question.  Normally it is a node of type
+     `FUNCTION_TYPE' that describes the data type of the function.
+     From this it is possible to obtain the data types of the value and
+     arguments (if known).
+
+     When a call to a library function is being considered, FUNDECL
+     will contain an identifier node for the library function.  Thus, if
+     you need to distinguish among various library functions, you can
+     do so by their names.  Note that "library function" in this
+     context means a function used to perform arithmetic, whose name is
+     known specially in the compiler and was not mentioned in the C
+     code being compiled.
+
+     SIZE is the number of bytes of arguments passed on the stack.  If
+     a variable number of bytes is passed, it is zero, and argument
+     popping will always be the responsibility of the calling function.
+
+     On the VAX, all functions always pop their arguments, so the
+     definition of this macro is SIZE.  On the 68000, using the standard
+     calling convention, no functions pop their arguments, so the value
+     of the macro is always 0 in this case.  But an alternative calling
+     convention is available in which functions that take a fixed
+     number of arguments pop them but other functions (such as
+     `printf') pop nothing (the caller pops all).  When this convention
+     is in use, FUNTYPE is examined to determine whether a function
+     takes a fixed number of arguments.
+
+ -- Macro: CALL_POPS_ARGS (CUM)
+     A C expression that should indicate the number of bytes a call
+     sequence pops off the stack.  It is added to the value of
+     `RETURN_POPS_ARGS' when compiling a function call.
+
+     CUM is the variable in which all arguments to the called function
+     have been accumulated.
+
+     On certain architectures, such as the SH5, a call trampoline is
+     used that pops certain registers off the stack, depending on the
+     arguments that have been passed to the function.  Since this is a
+     property of the call site, not of the called function,
+     `RETURN_POPS_ARGS' is not appropriate.
+
+
+File: gccint.info,  Node: Register Arguments,  Next: Scalar Return,  Prev: Stack Arguments,  Up: Stack and Calling
+
+17.10.7 Passing Arguments in Registers
+--------------------------------------
+
+This section describes the macros which let you control how various
+types of arguments are passed in registers or how they are arranged in
+the stack.
+
+ -- Macro: FUNCTION_ARG (CUM, MODE, TYPE, NAMED)
+     A C expression that controls whether a function argument is passed
+     in a register, and which register.
+
+     The arguments are CUM, which summarizes all the previous
+     arguments; MODE, the machine mode of the argument; TYPE, the data
+     type of the argument as a tree node or 0 if that is not known
+     (which happens for C support library functions); and NAMED, which
+     is 1 for an ordinary argument and 0 for nameless arguments that
+     correspond to `...' in the called function's prototype.  TYPE can
+     be an incomplete type if a syntax error has previously occurred.
+
+     The value of the expression is usually either a `reg' RTX for the
+     hard register in which to pass the argument, or zero to pass the
+     argument on the stack.
+
+     For machines like the VAX and 68000, where normally all arguments
+     are pushed, zero suffices as a definition.
+
+     The value of the expression can also be a `parallel' RTX.  This is
+     used when an argument is passed in multiple locations.  The mode
+     of the `parallel' should be the mode of the entire argument.  The
+     `parallel' holds any number of `expr_list' pairs; each one
+     describes where part of the argument is passed.  In each
+     `expr_list' the first operand must be a `reg' RTX for the hard
+     register in which to pass this part of the argument, and the mode
+     of the register RTX indicates how large this part of the argument
+     is.  The second operand of the `expr_list' is a `const_int' which
+     gives the offset in bytes into the entire argument of where this
+     part starts.  As a special exception the first `expr_list' in the
+     `parallel' RTX may have a first operand of zero.  This indicates
+     that the entire argument is also stored on the stack.
+
+     The last time this macro is called, it is called with `MODE ==
+     VOIDmode', and its result is passed to the `call' or `call_value'
+     pattern as operands 2 and 3 respectively.
+
+     The usual way to make the ISO library `stdarg.h' work on a machine
+     where some arguments are usually passed in registers, is to cause
+     nameless arguments to be passed on the stack instead.  This is done
+     by making `FUNCTION_ARG' return 0 whenever NAMED is 0.
+
+     You may use the hook `targetm.calls.must_pass_in_stack' in the
+     definition of this macro to determine if this argument is of a
+     type that must be passed in the stack.  If `REG_PARM_STACK_SPACE'
+     is not defined and `FUNCTION_ARG' returns nonzero for such an
+     argument, the compiler will abort.  If `REG_PARM_STACK_SPACE' is
+     defined, the argument will be computed in the stack and then
+     loaded into a register.
+
+ -- Target Hook: bool TARGET_MUST_PASS_IN_STACK (enum machine_mode
+          MODE, const_tree TYPE)
+     This target hook should return `true' if we should not pass TYPE
+     solely in registers.  The file `expr.h' defines a definition that
+     is usually appropriate, refer to `expr.h' for additional
+     documentation.
+
+ -- Macro: FUNCTION_INCOMING_ARG (CUM, MODE, TYPE, NAMED)
+     Define this macro if the target machine has "register windows", so
+     that the register in which a function sees an arguments is not
+     necessarily the same as the one in which the caller passed the
+     argument.
+
+     For such machines, `FUNCTION_ARG' computes the register in which
+     the caller passes the value, and `FUNCTION_INCOMING_ARG' should be
+     defined in a similar fashion to tell the function being called
+     where the arguments will arrive.
+
+     If `FUNCTION_INCOMING_ARG' is not defined, `FUNCTION_ARG' serves
+     both purposes.
+
+ -- Target Hook: int TARGET_ARG_PARTIAL_BYTES (CUMULATIVE_ARGS *CUM,
+          enum machine_mode MODE, tree TYPE, bool NAMED)
+     This target hook returns the number of bytes at the beginning of an
+     argument that must be put in registers.  The value must be zero for
+     arguments that are passed entirely in registers or that are
+     entirely pushed on the stack.
+
+     On some machines, certain arguments must be passed partially in
+     registers and partially in memory.  On these machines, typically
+     the first few words of arguments are passed in registers, and the
+     rest on the stack.  If a multi-word argument (a `double' or a
+     structure) crosses that boundary, its first few words must be
+     passed in registers and the rest must be pushed.  This macro tells
+     the compiler when this occurs, and how many bytes should go in
+     registers.
+
+     `FUNCTION_ARG' for these arguments should return the first
+     register to be used by the caller for this argument; likewise
+     `FUNCTION_INCOMING_ARG', for the called function.
+
+ -- Target Hook: bool TARGET_PASS_BY_REFERENCE (CUMULATIVE_ARGS *CUM,
+          enum machine_mode MODE, const_tree TYPE, bool NAMED)
+     This target hook should return `true' if an argument at the
+     position indicated by CUM should be passed by reference.  This
+     predicate is queried after target independent reasons for being
+     passed by reference, such as `TREE_ADDRESSABLE (type)'.
+
+     If the hook returns true, a copy of that argument is made in
+     memory and a pointer to the argument is passed instead of the
+     argument itself.  The pointer is passed in whatever way is
+     appropriate for passing a pointer to that type.
+
+ -- Target Hook: bool TARGET_CALLEE_COPIES (CUMULATIVE_ARGS *CUM, enum
+          machine_mode MODE, const_tree TYPE, bool NAMED)
+     The function argument described by the parameters to this hook is
+     known to be passed by reference.  The hook should return true if
+     the function argument should be copied by the callee instead of
+     copied by the caller.
+
+     For any argument for which the hook returns true, if it can be
+     determined that the argument is not modified, then a copy need not
+     be generated.
+
+     The default version of this hook always returns false.
+
+ -- Macro: CUMULATIVE_ARGS
+     A C type for declaring a variable that is used as the first
+     argument of `FUNCTION_ARG' and other related values.  For some
+     target machines, the type `int' suffices and can hold the number
+     of bytes of argument so far.
+
+     There is no need to record in `CUMULATIVE_ARGS' anything about the
+     arguments that have been passed on the stack.  The compiler has
+     other variables to keep track of that.  For target machines on
+     which all arguments are passed on the stack, there is no need to
+     store anything in `CUMULATIVE_ARGS'; however, the data structure
+     must exist and should not be empty, so use `int'.
+
+ -- Macro: OVERRIDE_ABI_FORMAT (FNDECL)
+     If defined, this macro is called before generating any code for a
+     function, but after the CFUN descriptor for the function has been
+     created.  The back end may use this macro to update CFUN to
+     reflect an ABI other than that which would normally be used by
+     default.  If the compiler is generating code for a
+     compiler-generated function, FNDECL may be `NULL'.
+
+ -- Macro: INIT_CUMULATIVE_ARGS (CUM, FNTYPE, LIBNAME, FNDECL,
+          N_NAMED_ARGS)
+     A C statement (sans semicolon) for initializing the variable CUM
+     for the state at the beginning of the argument list.  The variable
+     has type `CUMULATIVE_ARGS'.  The value of FNTYPE is the tree node
+     for the data type of the function which will receive the args, or
+     0 if the args are to a compiler support library function.  For
+     direct calls that are not libcalls, FNDECL contain the declaration
+     node of the function.  FNDECL is also set when
+     `INIT_CUMULATIVE_ARGS' is used to find arguments for the function
+     being compiled.  N_NAMED_ARGS is set to the number of named
+     arguments, including a structure return address if it is passed as
+     a parameter, when making a call.  When processing incoming
+     arguments, N_NAMED_ARGS is set to -1.
+
+     When processing a call to a compiler support library function,
+     LIBNAME identifies which one.  It is a `symbol_ref' rtx which
+     contains the name of the function, as a string.  LIBNAME is 0 when
+     an ordinary C function call is being processed.  Thus, each time
+     this macro is called, either LIBNAME or FNTYPE is nonzero, but
+     never both of them at once.
+
+ -- Macro: INIT_CUMULATIVE_LIBCALL_ARGS (CUM, MODE, LIBNAME)
+     Like `INIT_CUMULATIVE_ARGS' but only used for outgoing libcalls,
+     it gets a `MODE' argument instead of FNTYPE, that would be `NULL'.
+     INDIRECT would always be zero, too.  If this macro is not defined,
+     `INIT_CUMULATIVE_ARGS (cum, NULL_RTX, libname, 0)' is used instead.
+
+ -- Macro: INIT_CUMULATIVE_INCOMING_ARGS (CUM, FNTYPE, LIBNAME)
+     Like `INIT_CUMULATIVE_ARGS' but overrides it for the purposes of
+     finding the arguments for the function being compiled.  If this
+     macro is undefined, `INIT_CUMULATIVE_ARGS' is used instead.
+
+     The value passed for LIBNAME is always 0, since library routines
+     with special calling conventions are never compiled with GCC.  The
+     argument LIBNAME exists for symmetry with `INIT_CUMULATIVE_ARGS'.
+
+ -- Macro: FUNCTION_ARG_ADVANCE (CUM, MODE, TYPE, NAMED)
+     A C statement (sans semicolon) to update the summarizer variable
+     CUM to advance past an argument in the argument list.  The values
+     MODE, TYPE and NAMED describe that argument.  Once this is done,
+     the variable CUM is suitable for analyzing the _following_
+     argument with `FUNCTION_ARG', etc.
+
+     This macro need not do anything if the argument in question was
+     passed on the stack.  The compiler knows how to track the amount
+     of stack space used for arguments without any special help.
+
+ -- Macro: FUNCTION_ARG_OFFSET (MODE, TYPE)
+     If defined, a C expression that is the number of bytes to add to
+     the offset of the argument passed in memory.  This is needed for
+     the SPU, which passes `char' and `short' arguments in the preferred
+     slot that is in the middle of the quad word instead of starting at
+     the top.
+
+ -- Macro: FUNCTION_ARG_PADDING (MODE, TYPE)
+     If defined, a C expression which determines whether, and in which
+     direction, to pad out an argument with extra space.  The value
+     should be of type `enum direction': either `upward' to pad above
+     the argument, `downward' to pad below, or `none' to inhibit
+     padding.
+
+     The _amount_ of padding is always just enough to reach the next
+     multiple of `TARGET_FUNCTION_ARG_BOUNDARY'; this macro does not
+     control it.
+
+     This macro has a default definition which is right for most
+     systems.  For little-endian machines, the default is to pad
+     upward.  For big-endian machines, the default is to pad downward
+     for an argument of constant size shorter than an `int', and upward
+     otherwise.
+
+ -- Macro: PAD_VARARGS_DOWN
+     If defined, a C expression which determines whether the default
+     implementation of va_arg will attempt to pad down before reading
+     the next argument, if that argument is smaller than its aligned
+     space as controlled by `PARM_BOUNDARY'.  If this macro is not
+     defined, all such arguments are padded down if `BYTES_BIG_ENDIAN'
+     is true.
+
+ -- Macro: BLOCK_REG_PADDING (MODE, TYPE, FIRST)
+     Specify padding for the last element of a block move between
+     registers and memory.  FIRST is nonzero if this is the only
+     element.  Defining this macro allows better control of register
+     function parameters on big-endian machines, without using
+     `PARALLEL' rtl.  In particular, `MUST_PASS_IN_STACK' need not test
+     padding and mode of types in registers, as there is no longer a
+     "wrong" part of a register;  For example, a three byte aggregate
+     may be passed in the high part of a register if so required.
+
+ -- Target Hook: unsigned int TARGET_FUNCTION_ARG_BOUNDARY (enum
+          machine_mode MODE, const_tree TYPE)
+     This hook returns the alignment boundary, in bits, of an argument
+     with the specified mode and type.  The default hook returns
+     `PARM_BOUNDARY' for all arguments.
+
+ -- Macro: FUNCTION_ARG_REGNO_P (REGNO)
+     A C expression that is nonzero if REGNO is the number of a hard
+     register in which function arguments are sometimes passed.  This
+     does _not_ include implicit arguments such as the static chain and
+     the structure-value address.  On many machines, no registers can be
+     used for this purpose since all function arguments are pushed on
+     the stack.
+
+ -- Target Hook: bool TARGET_SPLIT_COMPLEX_ARG (const_tree TYPE)
+     This hook should return true if parameter of type TYPE are passed
+     as two scalar parameters.  By default, GCC will attempt to pack
+     complex arguments into the target's word size.  Some ABIs require
+     complex arguments to be split and treated as their individual
+     components.  For example, on AIX64, complex floats should be
+     passed in a pair of floating point registers, even though a
+     complex float would fit in one 64-bit floating point register.
+
+     The default value of this hook is `NULL', which is treated as
+     always false.
+
+ -- Target Hook: tree TARGET_BUILD_BUILTIN_VA_LIST (void)
+     This hook returns a type node for `va_list' for the target.  The
+     default version of the hook returns `void*'.
+
+ -- Target Hook: int TARGET_ENUM_VA_LIST_P (int IDX, const char
+          **PNAME, tree *PTREE)
+     This target hook is used in function `c_common_nodes_and_builtins'
+     to iterate through the target specific builtin types for va_list.
+     The variable IDX is used as iterator. PNAME has to be a pointer to
+     a `const char *' and PTREE a pointer to a `tree' typed variable.
+     The arguments PNAME and PTREE are used to store the result of this
+     macro and are set to the name of the va_list builtin type and its
+     internal type.  If the return value of this macro is zero, then
+     there is no more element.  Otherwise the IDX should be increased
+     for the next call of this macro to iterate through all types.
+
+ -- Target Hook: tree TARGET_FN_ABI_VA_LIST (tree FNDECL)
+     This hook returns the va_list type of the calling convention
+     specified by FNDECL.  The default version of this hook returns
+     `va_list_type_node'.
+
+ -- Target Hook: tree TARGET_CANONICAL_VA_LIST_TYPE (tree TYPE)
+     This hook returns the va_list type of the calling convention
+     specified by the type of TYPE. If TYPE is not a valid va_list
+     type, it returns `NULL_TREE'.
+
+ -- Target Hook: tree TARGET_GIMPLIFY_VA_ARG_EXPR (tree VALIST, tree
+          TYPE, gimple_seq *PRE_P, gimple_seq *POST_P)
+     This hook performs target-specific gimplification of
+     `VA_ARG_EXPR'.  The first two parameters correspond to the
+     arguments to `va_arg'; the latter two are as in
+     `gimplify.c:gimplify_expr'.
+
+ -- Target Hook: bool TARGET_VALID_POINTER_MODE (enum machine_mode MODE)
+     Define this to return nonzero if the port can handle pointers with
+     machine mode MODE.  The default version of this hook returns true
+     for both `ptr_mode' and `Pmode'.
+
+ -- Target Hook: bool TARGET_REF_MAY_ALIAS_ERRNO (struct ao_ref_s *REF)
+     Define this to return nonzero if the memory reference REF  may
+     alias with the system C library errno location.  The default
+     version of this hook assumes the system C library errno location
+     is either a declaration of type int or accessed by dereferencing
+     a pointer to int.
+
+ -- Target Hook: bool TARGET_SCALAR_MODE_SUPPORTED_P (enum machine_mode
+          MODE)
+     Define this to return nonzero if the port is prepared to handle
+     insns involving scalar mode MODE.  For a scalar mode to be
+     considered supported, all the basic arithmetic and comparisons
+     must work.
+
+     The default version of this hook returns true for any mode
+     required to handle the basic C types (as defined by the port).
+     Included here are the double-word arithmetic supported by the code
+     in `optabs.c'.
+
+ -- Target Hook: bool TARGET_VECTOR_MODE_SUPPORTED_P (enum machine_mode
+          MODE)
+     Define this to return nonzero if the port is prepared to handle
+     insns involving vector mode MODE.  At the very least, it must have
+     move patterns for this mode.
+
+ -- Target Hook: bool TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P (enum
+          machine_mode MODE)
+     Define this to return nonzero for machine modes for which the port
+     has small register classes.  If this target hook returns nonzero
+     for a given MODE, the compiler will try to minimize the lifetime
+     of registers in MODE.  The hook may be called with `VOIDmode' as
+     argument.  In this case, the hook is expected to return nonzero if
+     it returns nonzero for any mode.
+
+     On some machines, it is risky to let hard registers live across
+     arbitrary insns.  Typically, these machines have instructions that
+     require values to be in specific registers (like an accumulator),
+     and reload will fail if the required hard register is used for
+     another purpose across such an insn.
+
+     Passes before reload do not know which hard registers will be used
+     in an instruction, but the machine modes of the registers set or
+     used in the instruction are already known.  And for some machines,
+     register classes are small for, say, integer registers but not for
+     floating point registers.  For example, the AMD x86-64
+     architecture requires specific registers for the legacy x86
+     integer instructions, but there are many SSE registers for
+     floating point operations.  On such targets, a good strategy may
+     be to return nonzero from this hook for `INTEGRAL_MODE_P' machine
+     modes but zero for the SSE register classes.
+
+     The default version of this hook returns false for any mode.  It
+     is always safe to redefine this hook to return with a nonzero
+     value.  But if you unnecessarily define it, you will reduce the
+     amount of optimizations that can be performed in some cases.  If
+     you do not define this hook to return a nonzero value when it is
+     required, the compiler will run out of spill registers and print a
+     fatal error message.
+
+ -- Target Hook: unsigned int TARGET_FLAGS_REGNUM
+     If the target has a dedicated flags register, and it needs to use
+     the post-reload comparison elimination pass, then this value
+     should be set appropriately.
+
+
+File: gccint.info,  Node: Scalar Return,  Next: Aggregate Return,  Prev: Register Arguments,  Up: Stack and Calling
+
+17.10.8 How Scalar Function Values Are Returned
+-----------------------------------------------
+
+This section discusses the macros that control returning scalars as
+values--values that can fit in registers.
+
+ -- Target Hook: rtx TARGET_FUNCTION_VALUE (const_tree RET_TYPE,
+          const_tree FN_DECL_OR_TYPE, bool OUTGOING)
+     Define this to return an RTX representing the place where a
+     function returns or receives a value of data type RET_TYPE, a tree
+     node representing a data type.  FN_DECL_OR_TYPE is a tree node
+     representing `FUNCTION_DECL' or `FUNCTION_TYPE' of a function
+     being called.  If OUTGOING is false, the hook should compute the
+     register in which the caller will see the return value.
+     Otherwise, the hook should return an RTX representing the place
+     where a function returns a value.
+
+     On many machines, only `TYPE_MODE (RET_TYPE)' is relevant.
+     (Actually, on most machines, scalar values are returned in the same
+     place regardless of mode.)  The value of the expression is usually
+     a `reg' RTX for the hard register where the return value is stored.
+     The value can also be a `parallel' RTX, if the return value is in
+     multiple places.  See `FUNCTION_ARG' for an explanation of the
+     `parallel' form.   Note that the callee will populate every
+     location specified in the `parallel', but if the first element of
+     the `parallel' contains the whole return value, callers will use
+     that element as the canonical location and ignore the others.  The
+     m68k port uses this type of `parallel' to return pointers in both
+     `%a0' (the canonical location) and `%d0'.
+
+     If `TARGET_PROMOTE_FUNCTION_RETURN' returns true, you must apply
+     the same promotion rules specified in `PROMOTE_MODE' if VALTYPE is
+     a scalar type.
+
+     If the precise function being called is known, FUNC is a tree node
+     (`FUNCTION_DECL') for it; otherwise, FUNC is a null pointer.  This
+     makes it possible to use a different value-returning convention
+     for specific functions when all their calls are known.
+
+     Some target machines have "register windows" so that the register
+     in which a function returns its value is not the same as the one
+     in which the caller sees the value.  For such machines, you should
+     return different RTX depending on OUTGOING.
+
+     `TARGET_FUNCTION_VALUE' is not used for return values with
+     aggregate data types, because these are returned in another way.
+     See `TARGET_STRUCT_VALUE_RTX' and related macros, below.
+
+ -- Macro: FUNCTION_VALUE (VALTYPE, FUNC)
+     This macro has been deprecated.  Use `TARGET_FUNCTION_VALUE' for a
+     new target instead.
+
+ -- Macro: LIBCALL_VALUE (MODE)
+     A C expression to create an RTX representing the place where a
+     library function returns a value of mode MODE.
+
+     Note that "library function" in this context means a compiler
+     support routine, used to perform arithmetic, whose name is known
+     specially by the compiler and was not mentioned in the C code being
+     compiled.
+
+ -- Target Hook: rtx TARGET_LIBCALL_VALUE (enum machine_mode MODE,
+          const_rtx FUN)
+     Define this hook if the back-end needs to know the name of the
+     libcall function in order to determine where the result should be
+     returned.
+
+     The mode of the result is given by MODE and the name of the called
+     library function is given by FUN.  The hook should return an RTX
+     representing the place where the library function result will be
+     returned.
+
+     If this hook is not defined, then LIBCALL_VALUE will be used.
+
+ -- Macro: FUNCTION_VALUE_REGNO_P (REGNO)
+     A C expression that is nonzero if REGNO is the number of a hard
+     register in which the values of called function may come back.
+
+     A register whose use for returning values is limited to serving as
+     the second of a pair (for a value of type `double', say) need not
+     be recognized by this macro.  So for most machines, this definition
+     suffices:
+
+          #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
+
+     If the machine has register windows, so that the caller and the
+     called function use different registers for the return value, this
+     macro should recognize only the caller's register numbers.
+
+     This macro has been deprecated.  Use
+     `TARGET_FUNCTION_VALUE_REGNO_P' for a new target instead.
+
+ -- Target Hook: bool TARGET_FUNCTION_VALUE_REGNO_P (const unsigned int
+          REGNO)
+     A target hook that return `true' if REGNO is the number of a hard
+     register in which the values of called function may come back.
+
+     A register whose use for returning values is limited to serving as
+     the second of a pair (for a value of type `double', say) need not
+     be recognized by this target hook.
+
+     If the machine has register windows, so that the caller and the
+     called function use different registers for the return value, this
+     target hook should recognize only the caller's register numbers.
+
+     If this hook is not defined, then FUNCTION_VALUE_REGNO_P will be
+     used.
+
+ -- Macro: APPLY_RESULT_SIZE
+     Define this macro if `untyped_call' and `untyped_return' need more
+     space than is implied by `FUNCTION_VALUE_REGNO_P' for saving and
+     restoring an arbitrary return value.
+
+ -- Target Hook: bool TARGET_RETURN_IN_MSB (const_tree TYPE)
+     This hook should return true if values of type TYPE are returned
+     at the most significant end of a register (in other words, if they
+     are padded at the least significant end).  You can assume that TYPE
+     is returned in a register; the caller is required to check this.
+
+     Note that the register provided by `TARGET_FUNCTION_VALUE' must be
+     able to hold the complete return value.  For example, if a 1-, 2-
+     or 3-byte structure is returned at the most significant end of a
+     4-byte register, `TARGET_FUNCTION_VALUE' should provide an
+     `SImode' rtx.
+
+
+File: gccint.info,  Node: Aggregate Return,  Next: Caller Saves,  Prev: Scalar Return,  Up: Stack and Calling
+
+17.10.9 How Large Values Are Returned
+-------------------------------------
+
+When a function value's mode is `BLKmode' (and in some other cases),
+the value is not returned according to `TARGET_FUNCTION_VALUE' (*note
+Scalar Return::).  Instead, the caller passes the address of a block of
+memory in which the value should be stored.  This address is called the
+"structure value address".
+
+ This section describes how to control returning structure values in
+memory.
+
+ -- Target Hook: bool TARGET_RETURN_IN_MEMORY (const_tree TYPE,
+          const_tree FNTYPE)
+     This target hook should return a nonzero value to say to return the
+     function value in memory, just as large structures are always
+     returned.  Here TYPE will be the data type of the value, and FNTYPE
+     will be the type of the function doing the returning, or `NULL' for
+     libcalls.
+
+     Note that values of mode `BLKmode' must be explicitly handled by
+     this function.  Also, the option `-fpcc-struct-return' takes
+     effect regardless of this macro.  On most systems, it is possible
+     to leave the hook undefined; this causes a default definition to
+     be used, whose value is the constant 1 for `BLKmode' values, and 0
+     otherwise.
+
+     Do not use this hook to indicate that structures and unions should
+     always be returned in memory.  You should instead use
+     `DEFAULT_PCC_STRUCT_RETURN' to indicate this.
+
+ -- Macro: DEFAULT_PCC_STRUCT_RETURN
+     Define this macro to be 1 if all structure and union return values
+     must be in memory.  Since this results in slower code, this should
+     be defined only if needed for compatibility with other compilers
+     or with an ABI.  If you define this macro to be 0, then the
+     conventions used for structure and union return values are decided
+     by the `TARGET_RETURN_IN_MEMORY' target hook.
+
+     If not defined, this defaults to the value 1.
+
+ -- Target Hook: rtx TARGET_STRUCT_VALUE_RTX (tree FNDECL, int INCOMING)
+     This target hook should return the location of the structure value
+     address (normally a `mem' or `reg'), or 0 if the address is passed
+     as an "invisible" first argument.  Note that FNDECL may be `NULL',
+     for libcalls.  You do not need to define this target hook if the
+     address is always passed as an "invisible" first argument.
+
+     On some architectures the place where the structure value address
+     is found by the called function is not the same place that the
+     caller put it.  This can be due to register windows, or it could
+     be because the function prologue moves it to a different place.
+     INCOMING is `1' or `2' when the location is needed in the context
+     of the called function, and `0' in the context of the caller.
+
+     If INCOMING is nonzero and the address is to be found on the
+     stack, return a `mem' which refers to the frame pointer. If
+     INCOMING is `2', the result is being used to fetch the structure
+     value address at the beginning of a function.  If you need to emit
+     adjusting code, you should do it at this point.
+
+ -- Macro: PCC_STATIC_STRUCT_RETURN
+     Define this macro if the usual system convention on the target
+     machine for returning structures and unions is for the called
+     function to return the address of a static variable containing the
+     value.
+
+     Do not define this if the usual system convention is for the
+     caller to pass an address to the subroutine.
+
+     This macro has effect in `-fpcc-struct-return' mode, but it does
+     nothing when you use `-freg-struct-return' mode.
+
+ -- Target Hook: enum machine_mode TARGET_GET_RAW_RESULT_MODE (int
+          REGNO)
+     This target hook returns the mode to be used when accessing raw
+     return registers in `__builtin_return'.  Define this macro if the
+     value in REG_RAW_MODE is not correct.
+
+ -- Target Hook: enum machine_mode TARGET_GET_RAW_ARG_MODE (int REGNO)
+     This target hook returns the mode to be used when accessing raw
+     argument registers in `__builtin_apply_args'.  Define this macro
+     if the value in REG_RAW_MODE is not correct.
+
+
+File: gccint.info,  Node: Caller Saves,  Next: Function Entry,  Prev: Aggregate Return,  Up: Stack and Calling
+
+17.10.10 Caller-Saves Register Allocation
+-----------------------------------------
+
+If you enable it, GCC can save registers around function calls.  This
+makes it possible to use call-clobbered registers to hold variables that
+must live across calls.
+
+ -- Macro: CALLER_SAVE_PROFITABLE (REFS, CALLS)
+     A C expression to determine whether it is worthwhile to consider
+     placing a pseudo-register in a call-clobbered hard register and
+     saving and restoring it around each function call.  The expression
+     should be 1 when this is worth doing, and 0 otherwise.
+
+     If you don't define this macro, a default is used which is good on
+     most machines: `4 * CALLS < REFS'.
+
+ -- Macro: HARD_REGNO_CALLER_SAVE_MODE (REGNO, NREGS)
+     A C expression specifying which mode is required for saving NREGS
+     of a pseudo-register in call-clobbered hard register REGNO.  If
+     REGNO is unsuitable for caller save, `VOIDmode' should be
+     returned.  For most machines this macro need not be defined since
+     GCC will select the smallest suitable mode.
+
+
+File: gccint.info,  Node: Function Entry,  Next: Profiling,  Prev: Caller Saves,  Up: Stack and Calling
+
+17.10.11 Function Entry and Exit
+--------------------------------
+
+This section describes the macros that output function entry
+("prologue") and exit ("epilogue") code.
+
+ -- Target Hook: void TARGET_ASM_FUNCTION_PROLOGUE (FILE *FILE,
+          HOST_WIDE_INT SIZE)
+     If defined, a function that outputs the assembler code for entry
+     to a function.  The prologue is responsible for setting up the
+     stack frame, initializing the frame pointer register, saving
+     registers that must be saved, and allocating SIZE additional bytes
+     of storage for the local variables.  SIZE is an integer.  FILE is
+     a stdio stream to which the assembler code should be output.
+
+     The label for the beginning of the function need not be output by
+     this macro.  That has already been done when the macro is run.
+
+     To determine which registers to save, the macro can refer to the
+     array `regs_ever_live': element R is nonzero if hard register R is
+     used anywhere within the function.  This implies the function
+     prologue should save register R, provided it is not one of the
+     call-used registers.  (`TARGET_ASM_FUNCTION_EPILOGUE' must
+     likewise use `regs_ever_live'.)
+
+     On machines that have "register windows", the function entry code
+     does not save on the stack the registers that are in the windows,
+     even if they are supposed to be preserved by function calls;
+     instead it takes appropriate steps to "push" the register stack,
+     if any non-call-used registers are used in the function.
+
+     On machines where functions may or may not have frame-pointers, the
+     function entry code must vary accordingly; it must set up the frame
+     pointer if one is wanted, and not otherwise.  To determine whether
+     a frame pointer is in wanted, the macro can refer to the variable
+     `frame_pointer_needed'.  The variable's value will be 1 at run
+     time in a function that needs a frame pointer.  *Note
+     Elimination::.
+
+     The function entry code is responsible for allocating any stack
+     space required for the function.  This stack space consists of the
+     regions listed below.  In most cases, these regions are allocated
+     in the order listed, with the last listed region closest to the
+     top of the stack (the lowest address if `STACK_GROWS_DOWNWARD' is
+     defined, and the highest address if it is not defined).  You can
+     use a different order for a machine if doing so is more convenient
+     or required for compatibility reasons.  Except in cases where
+     required by standard or by a debugger, there is no reason why the
+     stack layout used by GCC need agree with that used by other
+     compilers for a machine.
+
+ -- Target Hook: void TARGET_ASM_FUNCTION_END_PROLOGUE (FILE *FILE)
+     If defined, a function that outputs assembler code at the end of a
+     prologue.  This should be used when the function prologue is being
+     emitted as RTL, and you have some extra assembler that needs to be
+     emitted.  *Note prologue instruction pattern::.
+
+ -- Target Hook: void TARGET_ASM_FUNCTION_BEGIN_EPILOGUE (FILE *FILE)
+     If defined, a function that outputs assembler code at the start of
+     an epilogue.  This should be used when the function epilogue is
+     being emitted as RTL, and you have some extra assembler that needs
+     to be emitted.  *Note epilogue instruction pattern::.
+
+ -- Target Hook: void TARGET_ASM_FUNCTION_EPILOGUE (FILE *FILE,
+          HOST_WIDE_INT SIZE)
+     If defined, a function that outputs the assembler code for exit
+     from a function.  The epilogue is responsible for restoring the
+     saved registers and stack pointer to their values when the
+     function was called, and returning control to the caller.  This
+     macro takes the same arguments as the macro
+     `TARGET_ASM_FUNCTION_PROLOGUE', and the registers to restore are
+     determined from `regs_ever_live' and `CALL_USED_REGISTERS' in the
+     same way.
+
+     On some machines, there is a single instruction that does all the
+     work of returning from the function.  On these machines, give that
+     instruction the name `return' and do not define the macro
+     `TARGET_ASM_FUNCTION_EPILOGUE' at all.
+
+     Do not define a pattern named `return' if you want the
+     `TARGET_ASM_FUNCTION_EPILOGUE' to be used.  If you want the target
+     switches to control whether return instructions or epilogues are
+     used, define a `return' pattern with a validity condition that
+     tests the target switches appropriately.  If the `return'
+     pattern's validity condition is false, epilogues will be used.
+
+     On machines where functions may or may not have frame-pointers, the
+     function exit code must vary accordingly.  Sometimes the code for
+     these two cases is completely different.  To determine whether a
+     frame pointer is wanted, the macro can refer to the variable
+     `frame_pointer_needed'.  The variable's value will be 1 when
+     compiling a function that needs a frame pointer.
+
+     Normally, `TARGET_ASM_FUNCTION_PROLOGUE' and
+     `TARGET_ASM_FUNCTION_EPILOGUE' must treat leaf functions specially.
+     The C variable `current_function_is_leaf' is nonzero for such a
+     function.  *Note Leaf Functions::.
+
+     On some machines, some functions pop their arguments on exit while
+     others leave that for the caller to do.  For example, the 68020
+     when given `-mrtd' pops arguments in functions that take a fixed
+     number of arguments.
+
+     Your definition of the macro `RETURN_POPS_ARGS' decides which
+     functions pop their own arguments.  `TARGET_ASM_FUNCTION_EPILOGUE'
+     needs to know what was decided.  The number of bytes of the current
+     function's arguments that this function should pop is available in
+     `crtl->args.pops_args'.  *Note Scalar Return::.
+
+   * A region of `current_function_pretend_args_size' bytes of
+     uninitialized space just underneath the first argument arriving on
+     the stack.  (This may not be at the very start of the allocated
+     stack region if the calling sequence has pushed anything else
+     since pushing the stack arguments.  But usually, on such machines,
+     nothing else has been pushed yet, because the function prologue
+     itself does all the pushing.)  This region is used on machines
+     where an argument may be passed partly in registers and partly in
+     memory, and, in some cases to support the features in `<stdarg.h>'.
+
+   * An area of memory used to save certain registers used by the
+     function.  The size of this area, which may also include space for
+     such things as the return address and pointers to previous stack
+     frames, is machine-specific and usually depends on which registers
+     have been used in the function.  Machines with register windows
+     often do not require a save area.
+
+   * A region of at least SIZE bytes, possibly rounded up to an
+     allocation boundary, to contain the local variables of the
+     function.  On some machines, this region and the save area may
+     occur in the opposite order, with the save area closer to the top
+     of the stack.
+
+   * Optionally, when `ACCUMULATE_OUTGOING_ARGS' is defined, a region of
+     `current_function_outgoing_args_size' bytes to be used for outgoing
+     argument lists of the function.  *Note Stack Arguments::.
+
+ -- Macro: EXIT_IGNORE_STACK
+     Define this macro as a C expression that is nonzero if the return
+     instruction or the function epilogue ignores the value of the stack
+     pointer; in other words, if it is safe to delete an instruction to
+     adjust the stack pointer before a return from the function.  The
+     default is 0.
+
+     Note that this macro's value is relevant only for functions for
+     which frame pointers are maintained.  It is never safe to delete a
+     final stack adjustment in a function that has no frame pointer,
+     and the compiler knows this regardless of `EXIT_IGNORE_STACK'.
+
+ -- Macro: EPILOGUE_USES (REGNO)
+     Define this macro as a C expression that is nonzero for registers
+     that are used by the epilogue or the `return' pattern.  The stack
+     and frame pointer registers are already assumed to be used as
+     needed.
+
+ -- Macro: EH_USES (REGNO)
+     Define this macro as a C expression that is nonzero for registers
+     that are used by the exception handling mechanism, and so should
+     be considered live on entry to an exception edge.
+
+ -- Macro: DELAY_SLOTS_FOR_EPILOGUE
+     Define this macro if the function epilogue contains delay slots to
+     which instructions from the rest of the function can be "moved".
+     The definition should be a C expression whose value is an integer
+     representing the number of delay slots there.
+
+ -- Macro: ELIGIBLE_FOR_EPILOGUE_DELAY (INSN, N)
+     A C expression that returns 1 if INSN can be placed in delay slot
+     number N of the epilogue.
+
+     The argument N is an integer which identifies the delay slot now
+     being considered (since different slots may have different rules of
+     eligibility).  It is never negative and is always less than the
+     number of epilogue delay slots (what `DELAY_SLOTS_FOR_EPILOGUE'
+     returns).  If you reject a particular insn for a given delay slot,
+     in principle, it may be reconsidered for a subsequent delay slot.
+     Also, other insns may (at least in principle) be considered for
+     the so far unfilled delay slot.
+
+     The insns accepted to fill the epilogue delay slots are put in an
+     RTL list made with `insn_list' objects, stored in the variable
+     `current_function_epilogue_delay_list'.  The insn for the first
+     delay slot comes first in the list.  Your definition of the macro
+     `TARGET_ASM_FUNCTION_EPILOGUE' should fill the delay slots by
+     outputting the insns in this list, usually by calling
+     `final_scan_insn'.
+
+     You need not define this macro if you did not define
+     `DELAY_SLOTS_FOR_EPILOGUE'.
+
+ -- Target Hook: void TARGET_ASM_OUTPUT_MI_THUNK (FILE *FILE, tree
+          THUNK_FNDECL, HOST_WIDE_INT DELTA, HOST_WIDE_INT
+          VCALL_OFFSET, tree FUNCTION)
+     A function that outputs the assembler code for a thunk function,
+     used to implement C++ virtual function calls with multiple
+     inheritance.  The thunk acts as a wrapper around a virtual
+     function, adjusting the implicit object parameter before handing
+     control off to the real function.
+
+     First, emit code to add the integer DELTA to the location that
+     contains the incoming first argument.  Assume that this argument
+     contains a pointer, and is the one used to pass the `this' pointer
+     in C++.  This is the incoming argument _before_ the function
+     prologue, e.g. `%o0' on a sparc.  The addition must preserve the
+     values of all other incoming arguments.
+
+     Then, if VCALL_OFFSET is nonzero, an additional adjustment should
+     be made after adding `delta'.  In particular, if P is the adjusted
+     pointer, the following adjustment should be made:
+
+          p += (*((ptrdiff_t **)p))[vcall_offset/sizeof(ptrdiff_t)]
+
+     After the additions, emit code to jump to FUNCTION, which is a
+     `FUNCTION_DECL'.  This is a direct pure jump, not a call, and does
+     not touch the return address.  Hence returning from FUNCTION will
+     return to whoever called the current `thunk'.
+
+     The effect must be as if FUNCTION had been called directly with
+     the adjusted first argument.  This macro is responsible for
+     emitting all of the code for a thunk function;
+     `TARGET_ASM_FUNCTION_PROLOGUE' and `TARGET_ASM_FUNCTION_EPILOGUE'
+     are not invoked.
+
+     The THUNK_FNDECL is redundant.  (DELTA and FUNCTION have already
+     been extracted from it.)  It might possibly be useful on some
+     targets, but probably not.
+
+     If you do not define this macro, the target-independent code in
+     the C++ front end will generate a less efficient heavyweight thunk
+     that calls FUNCTION instead of jumping to it.  The generic
+     approach does not support varargs.
+
+ -- Target Hook: bool TARGET_ASM_CAN_OUTPUT_MI_THUNK (const_tree
+          THUNK_FNDECL, HOST_WIDE_INT DELTA, HOST_WIDE_INT
+          VCALL_OFFSET, const_tree FUNCTION)
+     A function that returns true if TARGET_ASM_OUTPUT_MI_THUNK would
+     be able to output the assembler code for the thunk function
+     specified by the arguments it is passed, and false otherwise.  In
+     the latter case, the generic approach will be used by the C++
+     front end, with the limitations previously exposed.
+
+
+File: gccint.info,  Node: Profiling,  Next: Tail Calls,  Prev: Function Entry,  Up: Stack and Calling
+
+17.10.12 Generating Code for Profiling
+--------------------------------------
+
+These macros will help you generate code for profiling.
+
+ -- Macro: FUNCTION_PROFILER (FILE, LABELNO)
+     A C statement or compound statement to output to FILE some
+     assembler code to call the profiling subroutine `mcount'.
+
+     The details of how `mcount' expects to be called are determined by
+     your operating system environment, not by GCC.  To figure them out,
+     compile a small program for profiling using the system's installed
+     C compiler and look at the assembler code that results.
+
+     Older implementations of `mcount' expect the address of a counter
+     variable to be loaded into some register.  The name of this
+     variable is `LP' followed by the number LABELNO, so you would
+     generate the name using `LP%d' in a `fprintf'.
+
+ -- Macro: PROFILE_HOOK
+     A C statement or compound statement to output to FILE some assembly
+     code to call the profiling subroutine `mcount' even the target does
+     not support profiling.
+
+ -- Macro: NO_PROFILE_COUNTERS
+     Define this macro to be an expression with a nonzero value if the
+     `mcount' subroutine on your system does not need a counter variable
+     allocated for each function.  This is true for almost all modern
+     implementations.  If you define this macro, you must not use the
+     LABELNO argument to `FUNCTION_PROFILER'.
+
+ -- Macro: PROFILE_BEFORE_PROLOGUE
+     Define this macro if the code for function profiling should come
+     before the function prologue.  Normally, the profiling code comes
+     after.
+
+
+File: gccint.info,  Node: Tail Calls,  Next: Stack Smashing Protection,  Prev: Profiling,  Up: Stack and Calling
+
+17.10.13 Permitting tail calls
+------------------------------
+
+ -- Target Hook: bool TARGET_FUNCTION_OK_FOR_SIBCALL (tree DECL, tree
+          EXP)
+     True if it is ok to do sibling call optimization for the specified
+     call expression EXP.  DECL will be the called function, or `NULL'
+     if this is an indirect call.
+
+     It is not uncommon for limitations of calling conventions to
+     prevent tail calls to functions outside the current unit of
+     translation, or during PIC compilation.  The hook is used to
+     enforce these restrictions, as the `sibcall' md pattern can not
+     fail, or fall over to a "normal" call.  The criteria for
+     successful sibling call optimization may vary greatly between
+     different architectures.
+
+ -- Target Hook: void TARGET_EXTRA_LIVE_ON_ENTRY (bitmap REGS)
+     Add any hard registers to REGS that are live on entry to the
+     function.  This hook only needs to be defined to provide registers
+     that cannot be found by examination of FUNCTION_ARG_REGNO_P, the
+     callee saved registers, STATIC_CHAIN_INCOMING_REGNUM,
+     STATIC_CHAIN_REGNUM, TARGET_STRUCT_VALUE_RTX,
+     FRAME_POINTER_REGNUM, EH_USES, FRAME_POINTER_REGNUM,
+     ARG_POINTER_REGNUM, and the PIC_OFFSET_TABLE_REGNUM.
+
+
+File: gccint.info,  Node: Stack Smashing Protection,  Prev: Tail Calls,  Up: Stack and Calling
+
+17.10.14 Stack smashing protection
+----------------------------------
+
+ -- Target Hook: tree TARGET_STACK_PROTECT_GUARD (void)
+     This hook returns a `DECL' node for the external variable to use
+     for the stack protection guard.  This variable is initialized by
+     the runtime to some random value and is used to initialize the
+     guard value that is placed at the top of the local stack frame.
+     The type of this variable must be `ptr_type_node'.
+
+     The default version of this hook creates a variable called
+     `__stack_chk_guard', which is normally defined in `libgcc2.c'.
+
+ -- Target Hook: tree TARGET_STACK_PROTECT_FAIL (void)
+     This hook returns a tree expression that alerts the runtime that
+     the stack protect guard variable has been modified.  This
+     expression should involve a call to a `noreturn' function.
+
+     The default version of this hook invokes a function called
+     `__stack_chk_fail', taking no arguments.  This function is
+     normally defined in `libgcc2.c'.
+
+ -- Target Hook: bool TARGET_SUPPORTS_SPLIT_STACK (bool REPORT, struct
+          gcc_options *OPTS)
+     Whether this target supports splitting the stack when the options
+     described in OPTS have been passed.  This is called after options
+     have been parsed, so the target may reject splitting the stack in
+     some configurations.  The default version of this hook returns
+     false.  If REPORT is true, this function may issue a warning or
+     error; if REPORT is false, it must simply return a value
+
+
+File: gccint.info,  Node: Varargs,  Next: Trampolines,  Prev: Stack and Calling,  Up: Target Macros
+
+17.11 Implementing the Varargs Macros
+=====================================
+
+GCC comes with an implementation of `<varargs.h>' and `<stdarg.h>' that
+work without change on machines that pass arguments on the stack.
+Other machines require their own implementations of varargs, and the
+two machine independent header files must have conditionals to include
+it.
+
+ ISO `<stdarg.h>' differs from traditional `<varargs.h>' mainly in the
+calling convention for `va_start'.  The traditional implementation
+takes just one argument, which is the variable in which to store the
+argument pointer.  The ISO implementation of `va_start' takes an
+additional second argument.  The user is supposed to write the last
+named argument of the function here.
+
+ However, `va_start' should not use this argument.  The way to find the
+end of the named arguments is with the built-in functions described
+below.
+
+ -- Macro: __builtin_saveregs ()
+     Use this built-in function to save the argument registers in
+     memory so that the varargs mechanism can access them.  Both ISO
+     and traditional versions of `va_start' must use
+     `__builtin_saveregs', unless you use
+     `TARGET_SETUP_INCOMING_VARARGS' (see below) instead.
+
+     On some machines, `__builtin_saveregs' is open-coded under the
+     control of the target hook `TARGET_EXPAND_BUILTIN_SAVEREGS'.  On
+     other machines, it calls a routine written in assembler language,
+     found in `libgcc2.c'.
+
+     Code generated for the call to `__builtin_saveregs' appears at the
+     beginning of the function, as opposed to where the call to
+     `__builtin_saveregs' is written, regardless of what the code is.
+     This is because the registers must be saved before the function
+     starts to use them for its own purposes.
+
+ -- Macro: __builtin_next_arg (LASTARG)
+     This builtin returns the address of the first anonymous stack
+     argument, as type `void *'.  If `ARGS_GROW_DOWNWARD', it returns
+     the address of the location above the first anonymous stack
+     argument.  Use it in `va_start' to initialize the pointer for
+     fetching arguments from the stack.  Also use it in `va_start' to
+     verify that the second parameter LASTARG is the last named argument
+     of the current function.
+
+ -- Macro: __builtin_classify_type (OBJECT)
+     Since each machine has its own conventions for which data types are
+     passed in which kind of register, your implementation of `va_arg'
+     has to embody these conventions.  The easiest way to categorize the
+     specified data type is to use `__builtin_classify_type' together
+     with `sizeof' and `__alignof__'.
+
+     `__builtin_classify_type' ignores the value of OBJECT, considering
+     only its data type.  It returns an integer describing what kind of
+     type that is--integer, floating, pointer, structure, and so on.
+
+     The file `typeclass.h' defines an enumeration that you can use to
+     interpret the values of `__builtin_classify_type'.
+
+ These machine description macros help implement varargs:
+
+ -- Target Hook: rtx TARGET_EXPAND_BUILTIN_SAVEREGS (void)
+     If defined, this hook produces the machine-specific code for a
+     call to `__builtin_saveregs'.  This code will be moved to the very
+     beginning of the function, before any parameter access are made.
+     The return value of this function should be an RTX that contains
+     the value to use as the return of `__builtin_saveregs'.
+
+ -- Target Hook: void TARGET_SETUP_INCOMING_VARARGS (CUMULATIVE_ARGS
+          *ARGS_SO_FAR, enum machine_mode MODE, tree TYPE, int
+          *PRETEND_ARGS_SIZE, int SECOND_TIME)
+     This target hook offers an alternative to using
+     `__builtin_saveregs' and defining the hook
+     `TARGET_EXPAND_BUILTIN_SAVEREGS'.  Use it to store the anonymous
+     register arguments into the stack so that all the arguments appear
+     to have been passed consecutively on the stack.  Once this is
+     done, you can use the standard implementation of varargs that
+     works for machines that pass all their arguments on the stack.
+
+     The argument ARGS_SO_FAR points to the `CUMULATIVE_ARGS' data
+     structure, containing the values that are obtained after
+     processing the named arguments.  The arguments MODE and TYPE
+     describe the last named argument--its machine mode and its data
+     type as a tree node.
+
+     The target hook should do two things: first, push onto the stack
+     all the argument registers _not_ used for the named arguments, and
+     second, store the size of the data thus pushed into the
+     `int'-valued variable pointed to by PRETEND_ARGS_SIZE.  The value
+     that you store here will serve as additional offset for setting up
+     the stack frame.
+
+     Because you must generate code to push the anonymous arguments at
+     compile time without knowing their data types,
+     `TARGET_SETUP_INCOMING_VARARGS' is only useful on machines that
+     have just a single category of argument register and use it
+     uniformly for all data types.
+
+     If the argument SECOND_TIME is nonzero, it means that the
+     arguments of the function are being analyzed for the second time.
+     This happens for an inline function, which is not actually
+     compiled until the end of the source file.  The hook
+     `TARGET_SETUP_INCOMING_VARARGS' should not generate any
+     instructions in this case.
+
+ -- Target Hook: bool TARGET_STRICT_ARGUMENT_NAMING (CUMULATIVE_ARGS
+          *CA)
+     Define this hook to return `true' if the location where a function
+     argument is passed depends on whether or not it is a named
+     argument.
+
+     This hook controls how the NAMED argument to `FUNCTION_ARG' is set
+     for varargs and stdarg functions.  If this hook returns `true',
+     the NAMED argument is always true for named arguments, and false
+     for unnamed arguments.  If it returns `false', but
+     `TARGET_PRETEND_OUTGOING_VARARGS_NAMED' returns `true', then all
+     arguments are treated as named.  Otherwise, all named arguments
+     except the last are treated as named.
+
+     You need not define this hook if it always returns `false'.
+
+ -- Target Hook: bool TARGET_PRETEND_OUTGOING_VARARGS_NAMED
+          (CUMULATIVE_ARGS *CA)
+     If you need to conditionally change ABIs so that one works with
+     `TARGET_SETUP_INCOMING_VARARGS', but the other works like neither
+     `TARGET_SETUP_INCOMING_VARARGS' nor
+     `TARGET_STRICT_ARGUMENT_NAMING' was defined, then define this hook
+     to return `true' if `TARGET_SETUP_INCOMING_VARARGS' is used,
+     `false' otherwise.  Otherwise, you should not define this hook.
+
+
+File: gccint.info,  Node: Trampolines,  Next: Library Calls,  Prev: Varargs,  Up: Target Macros
+
+17.12 Trampolines for Nested Functions
+======================================
+
+A "trampoline" is a small piece of code that is created at run time
+when the address of a nested function is taken.  It normally resides on
+the stack, in the stack frame of the containing function.  These macros
+tell GCC how to generate code to allocate and initialize a trampoline.
+
+ The instructions in the trampoline must do two things: load a constant
+address into the static chain register, and jump to the real address of
+the nested function.  On CISC machines such as the m68k, this requires
+two instructions, a move immediate and a jump.  Then the two addresses
+exist in the trampoline as word-long immediate operands.  On RISC
+machines, it is often necessary to load each address into a register in
+two parts.  Then pieces of each address form separate immediate
+operands.
+
+ The code generated to initialize the trampoline must store the variable
+parts--the static chain value and the function address--into the
+immediate operands of the instructions.  On a CISC machine, this is
+simply a matter of copying each address to a memory reference at the
+proper offset from the start of the trampoline.  On a RISC machine, it
+may be necessary to take out pieces of the address and store them
+separately.
+
+ -- Target Hook: void TARGET_ASM_TRAMPOLINE_TEMPLATE (FILE *F)
+     This hook is called by `assemble_trampoline_template' to output,
+     on the stream F, assembler code for a block of data that contains
+     the constant parts of a trampoline.  This code should not include a
+     label--the label is taken care of automatically.
+
+     If you do not define this hook, it means no template is needed for
+     the target.  Do not define this hook on systems where the block
+     move code to copy the trampoline into place would be larger than
+     the code to generate it on the spot.
+
+ -- Macro: TRAMPOLINE_SECTION
+     Return the section into which the trampoline template is to be
+     placed (*note Sections::).  The default value is
+     `readonly_data_section'.
+
+ -- Macro: TRAMPOLINE_SIZE
+     A C expression for the size in bytes of the trampoline, as an
+     integer.
+
+ -- Macro: TRAMPOLINE_ALIGNMENT
+     Alignment required for trampolines, in bits.
+
+     If you don't define this macro, the value of `FUNCTION_ALIGNMENT'
+     is used for aligning trampolines.
+
+ -- Target Hook: void TARGET_TRAMPOLINE_INIT (rtx M_TRAMP, tree FNDECL,
+          rtx STATIC_CHAIN)
+     This hook is called to initialize a trampoline.  M_TRAMP is an RTX
+     for the memory block for the trampoline; FNDECL is the
+     `FUNCTION_DECL' for the nested function; STATIC_CHAIN is an RTX
+     for the static chain value that should be passed to the function
+     when it is called.
+
+     If the target defines `TARGET_ASM_TRAMPOLINE_TEMPLATE', then the
+     first thing this hook should do is emit a block move into M_TRAMP
+     from the memory block returned by `assemble_trampoline_template'.
+     Note that the block move need only cover the constant parts of the
+     trampoline.  If the target isolates the variable parts of the
+     trampoline to the end, not all `TRAMPOLINE_SIZE' bytes need be
+     copied.
+
+     If the target requires any other actions, such as flushing caches
+     or enabling stack execution, these actions should be performed
+     after initializing the trampoline proper.
+
+ -- Target Hook: rtx TARGET_TRAMPOLINE_ADJUST_ADDRESS (rtx ADDR)
+     This hook should perform any machine-specific adjustment in the
+     address of the trampoline.  Its argument contains the address of
+     the memory block that was passed to `TARGET_TRAMPOLINE_INIT'.  In
+     case the address to be used for a function call should be
+     different from the address at which the template was stored, the
+     different address should be returned; otherwise ADDR should be
+     returned unchanged.  If this hook is not defined, ADDR will be
+     used for function calls.
+
+ Implementing trampolines is difficult on many machines because they
+have separate instruction and data caches.  Writing into a stack
+location fails to clear the memory in the instruction cache, so when
+the program jumps to that location, it executes the old contents.
+
+ Here are two possible solutions.  One is to clear the relevant parts of
+the instruction cache whenever a trampoline is set up.  The other is to
+make all trampolines identical, by having them jump to a standard
+subroutine.  The former technique makes trampoline execution faster; the
+latter makes initialization faster.
+
+ To clear the instruction cache when a trampoline is initialized, define
+the following macro.
+
+ -- Macro: CLEAR_INSN_CACHE (BEG, END)
+     If defined, expands to a C expression clearing the _instruction
+     cache_ in the specified interval.  The definition of this macro
+     would typically be a series of `asm' statements.  Both BEG and END
+     are both pointer expressions.
+
+ The operating system may also require the stack to be made executable
+before calling the trampoline.  To implement this requirement, define
+the following macro.
+
+ -- Macro: ENABLE_EXECUTE_STACK
+     Define this macro if certain operations must be performed before
+     executing code located on the stack.  The macro should expand to a
+     series of C file-scope constructs (e.g. functions) and provide a
+     unique entry point named `__enable_execute_stack'.  The target is
+     responsible for emitting calls to the entry point in the code, for
+     example from the `TARGET_TRAMPOLINE_INIT' hook.
+
+ To use a standard subroutine, define the following macro.  In addition,
+you must make sure that the instructions in a trampoline fill an entire
+cache line with identical instructions, or else ensure that the
+beginning of the trampoline code is always aligned at the same point in
+its cache line.  Look in `m68k.h' as a guide.
+
+ -- Macro: TRANSFER_FROM_TRAMPOLINE
+     Define this macro if trampolines need a special subroutine to do
+     their work.  The macro should expand to a series of `asm'
+     statements which will be compiled with GCC.  They go in a library
+     function named `__transfer_from_trampoline'.
+
+     If you need to avoid executing the ordinary prologue code of a
+     compiled C function when you jump to the subroutine, you can do so
+     by placing a special label of your own in the assembler code.  Use
+     one `asm' statement to generate an assembler label, and another to
+     make the label global.  Then trampolines can use that label to
+     jump directly to your special assembler code.
+
+
+File: gccint.info,  Node: Library Calls,  Next: Addressing Modes,  Prev: Trampolines,  Up: Target Macros
+
+17.13 Implicit Calls to Library Routines
+========================================
+
+Here is an explanation of implicit calls to library routines.
+
+ -- Macro: DECLARE_LIBRARY_RENAMES
+     This macro, if defined, should expand to a piece of C code that
+     will get expanded when compiling functions for libgcc.a.  It can
+     be used to provide alternate names for GCC's internal library
+     functions if there are ABI-mandated names that the compiler should
+     provide.
+
+ -- Target Hook: void TARGET_INIT_LIBFUNCS (void)
+     This hook should declare additional library routines or rename
+     existing ones, using the functions `set_optab_libfunc' and
+     `init_one_libfunc' defined in `optabs.c'.  `init_optabs' calls
+     this macro after initializing all the normal library routines.
+
+     The default is to do nothing.  Most ports don't need to define
+     this hook.
+
+ -- Macro: FLOAT_LIB_COMPARE_RETURNS_BOOL (MODE, COMPARISON)
+     This macro should return `true' if the library routine that
+     implements the floating point comparison operator COMPARISON in
+     mode MODE will return a boolean, and FALSE if it will return a
+     tristate.
+
+     GCC's own floating point libraries return tristates from the
+     comparison operators, so the default returns false always.  Most
+     ports don't need to define this macro.
+
+ -- Macro: TARGET_LIB_INT_CMP_BIASED
+     This macro should evaluate to `true' if the integer comparison
+     functions (like `__cmpdi2') return 0 to indicate that the first
+     operand is smaller than the second, 1 to indicate that they are
+     equal, and 2 to indicate that the first operand is greater than
+     the second.  If this macro evaluates to `false' the comparison
+     functions return -1, 0, and 1 instead of 0, 1, and 2.  If the
+     target uses the routines in `libgcc.a', you do not need to define
+     this macro.
+
+ -- Macro: TARGET_EDOM
+     The value of `EDOM' on the target machine, as a C integer constant
+     expression.  If you don't define this macro, GCC does not attempt
+     to deposit the value of `EDOM' into `errno' directly.  Look in
+     `/usr/include/errno.h' to find the value of `EDOM' on your system.
+
+     If you do not define `TARGET_EDOM', then compiled code reports
+     domain errors by calling the library function and letting it
+     report the error.  If mathematical functions on your system use
+     `matherr' when there is an error, then you should leave
+     `TARGET_EDOM' undefined so that `matherr' is used normally.
+
+ -- Macro: GEN_ERRNO_RTX
+     Define this macro as a C expression to create an rtl expression
+     that refers to the global "variable" `errno'.  (On certain systems,
+     `errno' may not actually be a variable.)  If you don't define this
+     macro, a reasonable default is used.
+
+ -- Macro: TARGET_C99_FUNCTIONS
+     When this macro is nonzero, GCC will implicitly optimize `sin'
+     calls into `sinf' and similarly for other functions defined by C99
+     standard.  The default is zero because a number of existing
+     systems lack support for these functions in their runtime so this
+     macro needs to be redefined to one on systems that do support the
+     C99 runtime.
+
+ -- Macro: TARGET_HAS_SINCOS
+     When this macro is nonzero, GCC will implicitly optimize calls to
+     `sin' and `cos' with the same argument to a call to `sincos'.  The
+     default is zero.  The target has to provide the following
+     functions:
+          void sincos(double x, double *sin, double *cos);
+          void sincosf(float x, float *sin, float *cos);
+          void sincosl(long double x, long double *sin, long double *cos);
+
+ -- Macro: NEXT_OBJC_RUNTIME
+     Define this macro to generate code for Objective-C message sending
+     using the calling convention of the NeXT system.  This calling
+     convention involves passing the object, the selector and the
+     method arguments all at once to the method-lookup library function.
+
+     The default calling convention passes just the object and the
+     selector to the lookup function, which returns a pointer to the
+     method.
+
+
+File: gccint.info,  Node: Addressing Modes,  Next: Anchored Addresses,  Prev: Library Calls,  Up: Target Macros
+
+17.14 Addressing Modes
+======================
+
+This is about addressing modes.
+
+ -- Macro: HAVE_PRE_INCREMENT
+ -- Macro: HAVE_PRE_DECREMENT
+ -- Macro: HAVE_POST_INCREMENT
+ -- Macro: HAVE_POST_DECREMENT
+     A C expression that is nonzero if the machine supports
+     pre-increment, pre-decrement, post-increment, or post-decrement
+     addressing respectively.
+
+ -- Macro: HAVE_PRE_MODIFY_DISP
+ -- Macro: HAVE_POST_MODIFY_DISP
+     A C expression that is nonzero if the machine supports pre- or
+     post-address side-effect generation involving constants other than
+     the size of the memory operand.
+
+ -- Macro: HAVE_PRE_MODIFY_REG
+ -- Macro: HAVE_POST_MODIFY_REG
+     A C expression that is nonzero if the machine supports pre- or
+     post-address side-effect generation involving a register
+     displacement.
+
+ -- Macro: CONSTANT_ADDRESS_P (X)
+     A C expression that is 1 if the RTX X is a constant which is a
+     valid address.  On most machines the default definition of
+     `(CONSTANT_P (X) && GET_CODE (X) != CONST_DOUBLE)' is acceptable,
+     but a few machines are more restrictive as to which constant
+     addresses are supported.
+
+ -- Macro: CONSTANT_P (X)
+     `CONSTANT_P', which is defined by target-independent code, accepts
+     integer-values expressions whose values are not explicitly known,
+     such as `symbol_ref', `label_ref', and `high' expressions and
+     `const' arithmetic expressions, in addition to `const_int' and
+     `const_double' expressions.
+
+ -- Macro: MAX_REGS_PER_ADDRESS
+     A number, the maximum number of registers that can appear in a
+     valid memory address.  Note that it is up to you to specify a
+     value equal to the maximum number that
+     `TARGET_LEGITIMATE_ADDRESS_P' would ever accept.
+
+ -- Target Hook: bool TARGET_LEGITIMATE_ADDRESS_P (enum machine_mode
+          MODE, rtx X, bool STRICT)
+     A function that returns whether X (an RTX) is a legitimate memory
+     address on the target machine for a memory operand of mode MODE.
+
+     Legitimate addresses are defined in two variants: a strict variant
+     and a non-strict one.  The STRICT parameter chooses which variant
+     is desired by the caller.
+
+     The strict variant is used in the reload pass.  It must be defined
+     so that any pseudo-register that has not been allocated a hard
+     register is considered a memory reference.  This is because in
+     contexts where some kind of register is required, a
+     pseudo-register with no hard register must be rejected.  For
+     non-hard registers, the strict variant should look up the
+     `reg_renumber' array; it should then proceed using the hard
+     register number in the array, or treat the pseudo as a memory
+     reference if the array holds `-1'.
+
+     The non-strict variant is used in other passes.  It must be
+     defined to accept all pseudo-registers in every context where some
+     kind of register is required.
+
+     Normally, constant addresses which are the sum of a `symbol_ref'
+     and an integer are stored inside a `const' RTX to mark them as
+     constant.  Therefore, there is no need to recognize such sums
+     specifically as legitimate addresses.  Normally you would simply
+     recognize any `const' as legitimate.
+
+     Usually `PRINT_OPERAND_ADDRESS' is not prepared to handle constant
+     sums that are not marked with  `const'.  It assumes that a naked
+     `plus' indicates indexing.  If so, then you _must_ reject such
+     naked constant sums as illegitimate addresses, so that none of
+     them will be given to `PRINT_OPERAND_ADDRESS'.
+
+     On some machines, whether a symbolic address is legitimate depends
+     on the section that the address refers to.  On these machines,
+     define the target hook `TARGET_ENCODE_SECTION_INFO' to store the
+     information into the `symbol_ref', and then check for it here.
+     When you see a `const', you will have to look inside it to find the
+     `symbol_ref' in order to determine the section.  *Note Assembler
+     Format::.
+
+     Some ports are still using a deprecated legacy substitute for this
+     hook, the `GO_IF_LEGITIMATE_ADDRESS' macro.  This macro has this
+     syntax:
+
+          #define GO_IF_LEGITIMATE_ADDRESS (MODE, X, LABEL)
+
+     and should `goto LABEL' if the address X is a valid address on the
+     target machine for a memory operand of mode MODE.
+
+     Compiler source files that want to use the strict variant of this
+     macro define the macro `REG_OK_STRICT'.  You should use an `#ifdef
+     REG_OK_STRICT' conditional to define the strict variant in that
+     case and the non-strict variant otherwise.
+
+     Using the hook is usually simpler because it limits the number of
+     files that are recompiled when changes are made.
+
+ -- Macro: TARGET_MEM_CONSTRAINT
+     A single character to be used instead of the default `'m''
+     character for general memory addresses.  This defines the
+     constraint letter which matches the memory addresses accepted by
+     `TARGET_LEGITIMATE_ADDRESS_P'.  Define this macro if you want to
+     support new address formats in your back end without changing the
+     semantics of the `'m'' constraint.  This is necessary in order to
+     preserve functionality of inline assembly constructs using the
+     `'m'' constraint.
+
+ -- Macro: FIND_BASE_TERM (X)
+     A C expression to determine the base term of address X, or to
+     provide a simplified version of X from which `alias.c' can easily
+     find the base term.  This macro is used in only two places:
+     `find_base_value' and `find_base_term' in `alias.c'.
+
+     It is always safe for this macro to not be defined.  It exists so
+     that alias analysis can understand machine-dependent addresses.
+
+     The typical use of this macro is to handle addresses containing a
+     label_ref or symbol_ref within an UNSPEC.
+
+ -- Target Hook: rtx TARGET_LEGITIMIZE_ADDRESS (rtx X, rtx OLDX, enum
+          machine_mode MODE)
+     This hook is given an invalid memory address X for an operand of
+     mode MODE and should try to return a valid memory address.
+
+     X will always be the result of a call to `break_out_memory_refs',
+     and OLDX will be the operand that was given to that function to
+     produce X.
+
+     The code of the hook should not alter the substructure of X.  If
+     it transforms X into a more legitimate form, it should return the
+     new X.
+
+     It is not necessary for this hook to come up with a legitimate
+     address.  The compiler has standard ways of doing so in all cases.
+     In fact, it is safe to omit this hook or make it return X if it
+     cannot find a valid way to legitimize the address.  But often a
+     machine-dependent strategy can generate better code.
+
+ -- Macro: LEGITIMIZE_RELOAD_ADDRESS (X, MODE, OPNUM, TYPE, IND_LEVELS,
+          WIN)
+     A C compound statement that attempts to replace X, which is an
+     address that needs reloading, with a valid memory address for an
+     operand of mode MODE.  WIN will be a C statement label elsewhere
+     in the code.  It is not necessary to define this macro, but it
+     might be useful for performance reasons.
+
+     For example, on the i386, it is sometimes possible to use a single
+     reload register instead of two by reloading a sum of two pseudo
+     registers into a register.  On the other hand, for number of RISC
+     processors offsets are limited so that often an intermediate
+     address needs to be generated in order to address a stack slot.
+     By defining `LEGITIMIZE_RELOAD_ADDRESS' appropriately, the
+     intermediate addresses generated for adjacent some stack slots can
+     be made identical, and thus be shared.
+
+     _Note_: This macro should be used with caution.  It is necessary
+     to know something of how reload works in order to effectively use
+     this, and it is quite easy to produce macros that build in too
+     much knowledge of reload internals.
+
+     _Note_: This macro must be able to reload an address created by a
+     previous invocation of this macro.  If it fails to handle such
+     addresses then the compiler may generate incorrect code or abort.
+
+     The macro definition should use `push_reload' to indicate parts
+     that need reloading; OPNUM, TYPE and IND_LEVELS are usually
+     suitable to be passed unaltered to `push_reload'.
+
+     The code generated by this macro must not alter the substructure of
+     X.  If it transforms X into a more legitimate form, it should
+     assign X (which will always be a C variable) a new value.  This
+     also applies to parts that you change indirectly by calling
+     `push_reload'.
+
+     The macro definition may use `strict_memory_address_p' to test if
+     the address has become legitimate.
+
+     If you want to change only a part of X, one standard way of doing
+     this is to use `copy_rtx'.  Note, however, that it unshares only a
+     single level of rtl.  Thus, if the part to be changed is not at the
+     top level, you'll need to replace first the top level.  It is not
+     necessary for this macro to come up with a legitimate address;
+     but often a machine-dependent strategy can generate better code.
+
+ -- Target Hook: bool TARGET_MODE_DEPENDENT_ADDRESS_P (const_rtx ADDR)
+     This hook returns `true' if memory address ADDR can have different
+     meanings depending on the machine mode of the memory reference it
+     is used for or if the address is valid for some modes but not
+     others.
+
+     Autoincrement and autodecrement addresses typically have
+     mode-dependent effects because the amount of the increment or
+     decrement is the size of the operand being addressed.  Some
+     machines have other mode-dependent addresses.  Many RISC machines
+     have no mode-dependent addresses.
+
+     You may assume that ADDR is a valid address for the machine.
+
+     The default version of this hook returns `false'.
+
+ -- Macro: GO_IF_MODE_DEPENDENT_ADDRESS (ADDR, LABEL)
+     A C statement or compound statement with a conditional `goto
+     LABEL;' executed if memory address X (an RTX) can have different
+     meanings depending on the machine mode of the memory reference it
+     is used for or if the address is valid for some modes but not
+     others.
+
+     Autoincrement and autodecrement addresses typically have
+     mode-dependent effects because the amount of the increment or
+     decrement is the size of the operand being addressed.  Some
+     machines have other mode-dependent addresses.  Many RISC machines
+     have no mode-dependent addresses.
+
+     You may assume that ADDR is a valid address for the machine.
+
+     These are obsolete macros, replaced by the
+     `TARGET_MODE_DEPENDENT_ADDRESS_P' target hook.
+
+ -- Macro: LEGITIMATE_CONSTANT_P (X)
+     A C expression that is nonzero if X is a legitimate constant for
+     an immediate operand on the target machine.  You can assume that X
+     satisfies `CONSTANT_P', so you need not check this.  In fact, `1'
+     is a suitable definition for this macro on machines where anything
+     `CONSTANT_P' is valid.
+
+ -- Target Hook: rtx TARGET_DELEGITIMIZE_ADDRESS (rtx X)
+     This hook is used to undo the possibly obfuscating effects of the
+     `LEGITIMIZE_ADDRESS' and `LEGITIMIZE_RELOAD_ADDRESS' target
+     macros.  Some backend implementations of these macros wrap symbol
+     references inside an `UNSPEC' rtx to represent PIC or similar
+     addressing modes.  This target hook allows GCC's optimizers to
+     understand the semantics of these opaque `UNSPEC's by converting
+     them back into their original form.
+
+ -- Target Hook: bool TARGET_CANNOT_FORCE_CONST_MEM (rtx X)
+     This hook should return true if X is of a form that cannot (or
+     should not) be spilled to the constant pool.  The default version
+     of this hook returns false.
+
+     The primary reason to define this hook is to prevent reload from
+     deciding that a non-legitimate constant would be better reloaded
+     from the constant pool instead of spilling and reloading a register
+     holding the constant.  This restriction is often true of addresses
+     of TLS symbols for various targets.
+
+ -- Target Hook: bool TARGET_USE_BLOCKS_FOR_CONSTANT_P (enum
+          machine_mode MODE, const_rtx X)
+     This hook should return true if pool entries for constant X can be
+     placed in an `object_block' structure.  MODE is the mode of X.
+
+     The default version returns false for all constants.
+
+ -- Target Hook: tree TARGET_BUILTIN_RECIPROCAL (unsigned FN, bool
+          MD_FN, bool SQRT)
+     This hook should return the DECL of a function that implements
+     reciprocal of the builtin function with builtin function code FN,
+     or `NULL_TREE' if such a function is not available.  MD_FN is true
+     when FN is a code of a machine-dependent builtin function.  When
+     SQRT is true, additional optimizations that apply only to the
+     reciprocal of a square root function are performed, and only
+     reciprocals of `sqrt' function are valid.
+
+ -- Target Hook: tree TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD (void)
+     This hook should return the DECL of a function F that given an
+     address ADDR as an argument returns a mask M that can be used to
+     extract from two vectors the relevant data that resides in ADDR in
+     case ADDR is not properly aligned.
+
+     The autovectorizer, when vectorizing a load operation from an
+     address ADDR that may be unaligned, will generate two vector loads
+     from the two aligned addresses around ADDR. It then generates a
+     `REALIGN_LOAD' operation to extract the relevant data from the two
+     loaded vectors. The first two arguments to `REALIGN_LOAD', V1 and
+     V2, are the two vectors, each of size VS, and the third argument,
+     OFF, defines how the data will be extracted from these two
+     vectors: if OFF is 0, then the returned vector is V2; otherwise,
+     the returned vector is composed from the last VS-OFF elements of
+     V1 concatenated to the first OFF elements of V2.
+
+     If this hook is defined, the autovectorizer will generate a call
+     to F (using the DECL tree that this hook returns) and will use the
+     return value of F as the argument OFF to `REALIGN_LOAD'.
+     Therefore, the mask M returned by F should comply with the
+     semantics expected by `REALIGN_LOAD' described above.  If this
+     hook is not defined, then ADDR will be used as the argument OFF to
+     `REALIGN_LOAD', in which case the low log2(VS) - 1 bits of ADDR
+     will be considered.
+
+ -- Target Hook: tree TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_EVEN (tree X)
+     This hook should return the DECL of a function F that implements
+     widening multiplication of the even elements of two input vectors
+     of type X.
+
+     If this hook is defined, the autovectorizer will use it along with
+     the `TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_ODD' target hook when
+     vectorizing widening multiplication in cases that the order of the
+     results does not have to be preserved (e.g. used only by a
+     reduction computation). Otherwise, the `widen_mult_hi/lo' idioms
+     will be used.
+
+ -- Target Hook: tree TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_ODD (tree X)
+     This hook should return the DECL of a function F that implements
+     widening multiplication of the odd elements of two input vectors
+     of type X.
+
+     If this hook is defined, the autovectorizer will use it along with
+     the `TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_EVEN' target hook when
+     vectorizing widening multiplication in cases that the order of the
+     results does not have to be preserved (e.g. used only by a
+     reduction computation). Otherwise, the `widen_mult_hi/lo' idioms
+     will be used.
+
+ -- Target Hook: int TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST (enum
+          vect_cost_for_stmt TYPE_OF_COST, tree VECTYPE, int MISALIGN)
+     Returns cost of different scalar or vector statements for
+     vectorization cost model.  For vector memory operations the cost
+     may depend on type (VECTYPE) and misalignment value (MISALIGN).
+
+ -- Target Hook: bool TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE
+          (const_tree TYPE, bool IS_PACKED)
+     Return true if vector alignment is reachable (by peeling N
+     iterations) for the given type.
+
+ -- Target Hook: tree TARGET_VECTORIZE_BUILTIN_VEC_PERM (tree TYPE,
+          tree *MASK_ELEMENT_TYPE)
+     Target builtin that implements vector permute.
+
+ -- Target Hook: bool TARGET_VECTORIZE_BUILTIN_VEC_PERM_OK (tree
+          VEC_TYPE, tree MASK)
+     Return true if a vector created for `builtin_vec_perm' is valid.
+
+ -- Target Hook: tree TARGET_VECTORIZE_BUILTIN_CONVERSION (unsigned
+          CODE, tree DEST_TYPE, tree SRC_TYPE)
+     This hook should return the DECL of a function that implements
+     conversion of the input vector of type SRC_TYPE to type DEST_TYPE.
+     The value of CODE is one of the enumerators in `enum tree_code' and
+     specifies how the conversion is to be applied (truncation,
+     rounding, etc.).
+
+     If this hook is defined, the autovectorizer will use the
+     `TARGET_VECTORIZE_BUILTIN_CONVERSION' target hook when vectorizing
+     conversion. Otherwise, it will return `NULL_TREE'.
+
+ -- Target Hook: tree TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION
+          (tree FNDECL, tree VEC_TYPE_OUT, tree VEC_TYPE_IN)
+     This hook should return the decl of a function that implements the
+     vectorized variant of the builtin function with builtin function
+     code CODE or `NULL_TREE' if such a function is not available.  The
+     value of FNDECL is the builtin function declaration.  The return
+     type of the vectorized function shall be of vector type
+     VEC_TYPE_OUT and the argument types should be VEC_TYPE_IN.
+
+ -- Target Hook: bool TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT
+          (enum machine_mode MODE, const_tree TYPE, int MISALIGNMENT,
+          bool IS_PACKED)
+     This hook should return true if the target supports misaligned
+     vector store/load of a specific factor denoted in the MISALIGNMENT
+     parameter.  The vector store/load should be of machine mode MODE
+     and the elements in the vectors should be of type TYPE.  IS_PACKED
+     parameter is true if the memory access is defined in a packed
+     struct.
+
+ -- Target Hook: enum machine_mode TARGET_VECTORIZE_PREFERRED_SIMD_MODE
+          (enum machine_mode MODE)
+     This hook should return the preferred mode for vectorizing scalar
+     mode MODE.  The default is equal to `word_mode', because the
+     vectorizer can do some transformations even in absence of
+     specialized SIMD hardware.
+
+ -- Target Hook: unsigned int
+TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES (void)
+     This hook should return a mask of sizes that should be iterated
+     over after trying to autovectorize using the vector size derived
+     from the mode returned by `TARGET_VECTORIZE_PREFERRED_SIMD_MODE'.
+     The default is zero which means to not iterate over other vector
+     sizes.
+
+
+File: gccint.info,  Node: Anchored Addresses,  Next: Condition Code,  Prev: Addressing Modes,  Up: Target Macros
+
+17.15 Anchored Addresses
+========================
+
+GCC usually addresses every static object as a separate entity.  For
+example, if we have:
+
+     static int a, b, c;
+     int foo (void) { return a + b + c; }
+
+ the code for `foo' will usually calculate three separate symbolic
+addresses: those of `a', `b' and `c'.  On some targets, it would be
+better to calculate just one symbolic address and access the three
+variables relative to it.  The equivalent pseudocode would be something
+like:
+
+     int foo (void)
+     {
+       register int *xr = &x;
+       return xr[&a - &x] + xr[&b - &x] + xr[&c - &x];
+     }
+
+ (which isn't valid C).  We refer to shared addresses like `x' as
+"section anchors".  Their use is controlled by `-fsection-anchors'.
+
+ The hooks below describe the target properties that GCC needs to know
+in order to make effective use of section anchors.  It won't use
+section anchors at all unless either `TARGET_MIN_ANCHOR_OFFSET' or
+`TARGET_MAX_ANCHOR_OFFSET' is set to a nonzero value.
+
+ -- Target Hook: HOST_WIDE_INT TARGET_MIN_ANCHOR_OFFSET
+     The minimum offset that should be applied to a section anchor.  On
+     most targets, it should be the smallest offset that can be applied
+     to a base register while still giving a legitimate address for
+     every mode.  The default value is 0.
+
+ -- Target Hook: HOST_WIDE_INT TARGET_MAX_ANCHOR_OFFSET
+     Like `TARGET_MIN_ANCHOR_OFFSET', but the maximum (inclusive)
+     offset that should be applied to section anchors.  The default
+     value is 0.
+
+ -- Target Hook: void TARGET_ASM_OUTPUT_ANCHOR (rtx X)
+     Write the assembly code to define section anchor X, which is a
+     `SYMBOL_REF' for which `SYMBOL_REF_ANCHOR_P (X)' is true.  The
+     hook is called with the assembly output position set to the
+     beginning of `SYMBOL_REF_BLOCK (X)'.
+
+     If `ASM_OUTPUT_DEF' is available, the hook's default definition
+     uses it to define the symbol as `. + SYMBOL_REF_BLOCK_OFFSET (X)'.
+     If `ASM_OUTPUT_DEF' is not available, the hook's default definition
+     is `NULL', which disables the use of section anchors altogether.
+
+ -- Target Hook: bool TARGET_USE_ANCHORS_FOR_SYMBOL_P (const_rtx X)
+     Return true if GCC should attempt to use anchors to access
+     `SYMBOL_REF' X.  You can assume `SYMBOL_REF_HAS_BLOCK_INFO_P (X)'
+     and `!SYMBOL_REF_ANCHOR_P (X)'.
+
+     The default version is correct for most targets, but you might
+     need to intercept this hook to handle things like target-specific
+     attributes or target-specific sections.
+
+
+File: gccint.info,  Node: Condition Code,  Next: Costs,  Prev: Anchored Addresses,  Up: Target Macros
+
+17.16 Condition Code Status
+===========================
+
+The macros in this section can be split in two families, according to
+the two ways of representing condition codes in GCC.
+
+ The first representation is the so called `(cc0)' representation
+(*note Jump Patterns::), where all instructions can have an implicit
+clobber of the condition codes.  The second is the condition code
+register representation, which provides better schedulability for
+architectures that do have a condition code register, but on which most
+instructions do not affect it.  The latter category includes most RISC
+machines.
+
+ The implicit clobbering poses a strong restriction on the placement of
+the definition and use of the condition code, which need to be in
+adjacent insns for machines using `(cc0)'.  This can prevent important
+optimizations on some machines.  For example, on the IBM RS/6000, there
+is a delay for taken branches unless the condition code register is set
+three instructions earlier than the conditional branch.  The instruction
+scheduler cannot perform this optimization if it is not permitted to
+separate the definition and use of the condition code register.
+
+ For this reason, it is possible and suggested to use a register to
+represent the condition code for new ports.  If there is a specific
+condition code register in the machine, use a hard register.  If the
+condition code or comparison result can be placed in any general
+register, or if there are multiple condition registers, use a pseudo
+register.  Registers used to store the condition code value will
+usually have a mode that is in class `MODE_CC'.
+
+ Alternatively, you can use `BImode' if the comparison operator is
+specified already in the compare instruction.  In this case, you are not
+interested in most macros in this section.
+
+* Menu:
+
+* CC0 Condition Codes::      Old style representation of condition codes.
+* MODE_CC Condition Codes::  Modern representation of condition codes.
+* Cond Exec Macros::         Macros to control conditional execution.
+
+
+File: gccint.info,  Node: CC0 Condition Codes,  Next: MODE_CC Condition Codes,  Up: Condition Code
+
+17.16.1 Representation of condition codes using `(cc0)'
+-------------------------------------------------------
+
+The file `conditions.h' defines a variable `cc_status' to describe how
+the condition code was computed (in case the interpretation of the
+condition code depends on the instruction that it was set by).  This
+variable contains the RTL expressions on which the condition code is
+currently based, and several standard flags.
+
+ Sometimes additional machine-specific flags must be defined in the
+machine description header file.  It can also add additional
+machine-specific information by defining `CC_STATUS_MDEP'.
+
+ -- Macro: CC_STATUS_MDEP
+     C code for a data type which is used for declaring the `mdep'
+     component of `cc_status'.  It defaults to `int'.
+
+     This macro is not used on machines that do not use `cc0'.
+
+ -- Macro: CC_STATUS_MDEP_INIT
+     A C expression to initialize the `mdep' field to "empty".  The
+     default definition does nothing, since most machines don't use the
+     field anyway.  If you want to use the field, you should probably
+     define this macro to initialize it.
+
+     This macro is not used on machines that do not use `cc0'.
+
+ -- Macro: NOTICE_UPDATE_CC (EXP, INSN)
+     A C compound statement to set the components of `cc_status'
+     appropriately for an insn INSN whose body is EXP.  It is this
+     macro's responsibility to recognize insns that set the condition
+     code as a byproduct of other activity as well as those that
+     explicitly set `(cc0)'.
+
+     This macro is not used on machines that do not use `cc0'.
+
+     If there are insns that do not set the condition code but do alter
+     other machine registers, this macro must check to see whether they
+     invalidate the expressions that the condition code is recorded as
+     reflecting.  For example, on the 68000, insns that store in address
+     registers do not set the condition code, which means that usually
+     `NOTICE_UPDATE_CC' can leave `cc_status' unaltered for such insns.
+     But suppose that the previous insn set the condition code based on
+     location `a4@(102)' and the current insn stores a new value in
+     `a4'.  Although the condition code is not changed by this, it will
+     no longer be true that it reflects the contents of `a4@(102)'.
+     Therefore, `NOTICE_UPDATE_CC' must alter `cc_status' in this case
+     to say that nothing is known about the condition code value.
+
+     The definition of `NOTICE_UPDATE_CC' must be prepared to deal with
+     the results of peephole optimization: insns whose patterns are
+     `parallel' RTXs containing various `reg', `mem' or constants which
+     are just the operands.  The RTL structure of these insns is not
+     sufficient to indicate what the insns actually do.  What
+     `NOTICE_UPDATE_CC' should do when it sees one is just to run
+     `CC_STATUS_INIT'.
+
+     A possible definition of `NOTICE_UPDATE_CC' is to call a function
+     that looks at an attribute (*note Insn Attributes::) named, for
+     example, `cc'.  This avoids having detailed information about
+     patterns in two places, the `md' file and in `NOTICE_UPDATE_CC'.
+
+
+File: gccint.info,  Node: MODE_CC Condition Codes,  Next: Cond Exec Macros,  Prev: CC0 Condition Codes,  Up: Condition Code
+
+17.16.2 Representation of condition codes using registers
+---------------------------------------------------------
+
+ -- Macro: SELECT_CC_MODE (OP, X, Y)
+     On many machines, the condition code may be produced by other
+     instructions than compares, for example the branch can use
+     directly the condition code set by a subtract instruction.
+     However, on some machines when the condition code is set this way
+     some bits (such as the overflow bit) are not set in the same way
+     as a test instruction, so that a different branch instruction must
+     be used for some conditional branches.  When this happens, use the
+     machine mode of the condition code register to record different
+     formats of the condition code register.  Modes can also be used to
+     record which compare instruction (e.g. a signed or an unsigned
+     comparison) produced the condition codes.
+
+     If other modes than `CCmode' are required, add them to
+     `MACHINE-modes.def' and define `SELECT_CC_MODE' to choose a mode
+     given an operand of a compare.  This is needed because the modes
+     have to be chosen not only during RTL generation but also, for
+     example, by instruction combination.  The result of
+     `SELECT_CC_MODE' should be consistent with the mode used in the
+     patterns; for example to support the case of the add on the SPARC
+     discussed above, we have the pattern
+
+          (define_insn ""
+            [(set (reg:CC_NOOV 0)
+                  (compare:CC_NOOV
+                    (plus:SI (match_operand:SI 0 "register_operand" "%r")
+                             (match_operand:SI 1 "arith_operand" "rI"))
+                    (const_int 0)))]
+            ""
+            "...")
+
+     together with a `SELECT_CC_MODE' that returns `CC_NOOVmode' for
+     comparisons whose argument is a `plus':
+
+          #define SELECT_CC_MODE(OP,X,Y) \
+            (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT          \
+             ? ((OP == EQ || OP == NE) ? CCFPmode : CCFPEmode)    \
+             : ((GET_CODE (X) == PLUS || GET_CODE (X) == MINUS    \
+                 || GET_CODE (X) == NEG) \
+                ? CC_NOOVmode : CCmode))
+
+     Another reason to use modes is to retain information on which
+     operands were used by the comparison; see `REVERSIBLE_CC_MODE'
+     later in this section.
+
+     You should define this macro if and only if you define extra CC
+     modes in `MACHINE-modes.def'.
+
+ -- Macro: CANONICALIZE_COMPARISON (CODE, OP0, OP1)
+     On some machines not all possible comparisons are defined, but you
+     can convert an invalid comparison into a valid one.  For example,
+     the Alpha does not have a `GT' comparison, but you can use an `LT'
+     comparison instead and swap the order of the operands.
+
+     On such machines, define this macro to be a C statement to do any
+     required conversions.  CODE is the initial comparison code and OP0
+     and OP1 are the left and right operands of the comparison,
+     respectively.  You should modify CODE, OP0, and OP1 as required.
+
+     GCC will not assume that the comparison resulting from this macro
+     is valid but will see if the resulting insn matches a pattern in
+     the `md' file.
+
+     You need not define this macro if it would never change the
+     comparison code or operands.
+
+ -- Macro: REVERSIBLE_CC_MODE (MODE)
+     A C expression whose value is one if it is always safe to reverse a
+     comparison whose mode is MODE.  If `SELECT_CC_MODE' can ever
+     return MODE for a floating-point inequality comparison, then
+     `REVERSIBLE_CC_MODE (MODE)' must be zero.
+
+     You need not define this macro if it would always returns zero or
+     if the floating-point format is anything other than
+     `IEEE_FLOAT_FORMAT'.  For example, here is the definition used on
+     the SPARC, where floating-point inequality comparisons are always
+     given `CCFPEmode':
+
+          #define REVERSIBLE_CC_MODE(MODE)  ((MODE) != CCFPEmode)
+
+ -- Macro: REVERSE_CONDITION (CODE, MODE)
+     A C expression whose value is reversed condition code of the CODE
+     for comparison done in CC_MODE MODE.  The macro is used only in
+     case `REVERSIBLE_CC_MODE (MODE)' is nonzero.  Define this macro in
+     case machine has some non-standard way how to reverse certain
+     conditionals.  For instance in case all floating point conditions
+     are non-trapping, compiler may freely convert unordered compares
+     to ordered one.  Then definition may look like:
+
+          #define REVERSE_CONDITION(CODE, MODE) \
+             ((MODE) != CCFPmode ? reverse_condition (CODE) \
+              : reverse_condition_maybe_unordered (CODE))
+
+ -- Target Hook: bool TARGET_FIXED_CONDITION_CODE_REGS (unsigned int
+          *P1, unsigned int *P2)
+     On targets which do not use `(cc0)', and which use a hard register
+     rather than a pseudo-register to hold condition codes, the regular
+     CSE passes are often not able to identify cases in which the hard
+     register is set to a common value.  Use this hook to enable a
+     small pass which optimizes such cases.  This hook should return
+     true to enable this pass, and it should set the integers to which
+     its arguments point to the hard register numbers used for
+     condition codes.  When there is only one such register, as is true
+     on most systems, the integer pointed to by P2 should be set to
+     `INVALID_REGNUM'.
+
+     The default version of this hook returns false.
+
+ -- Target Hook: enum machine_mode TARGET_CC_MODES_COMPATIBLE (enum
+          machine_mode M1, enum machine_mode M2)
+     On targets which use multiple condition code modes in class
+     `MODE_CC', it is sometimes the case that a comparison can be
+     validly done in more than one mode.  On such a system, define this
+     target hook to take two mode arguments and to return a mode in
+     which both comparisons may be validly done.  If there is no such
+     mode, return `VOIDmode'.
+
+     The default version of this hook checks whether the modes are the
+     same.  If they are, it returns that mode.  If they are different,
+     it returns `VOIDmode'.
+
+
+File: gccint.info,  Node: Cond Exec Macros,  Prev: MODE_CC Condition Codes,  Up: Condition Code
+
+17.16.3 Macros to control conditional execution
+-----------------------------------------------
+
+There is one macro that may need to be defined for targets supporting
+conditional execution, independent of how they represent conditional
+branches.
+
+ -- Macro: REVERSE_CONDEXEC_PREDICATES_P (OP1, OP2)
+     A C expression that returns true if the conditional execution
+     predicate OP1, a comparison operation, is the inverse of OP2 and
+     vice versa.  Define this to return 0 if the target has conditional
+     execution predicates that cannot be reversed safely.  There is no
+     need to validate that the arguments of op1 and op2 are the same,
+     this is done separately.  If no expansion is specified, this macro
+     is defined as follows:
+
+          #define REVERSE_CONDEXEC_PREDICATES_P (x, y) \
+             (GET_CODE ((x)) == reversed_comparison_code ((y), NULL))
+
+
+File: gccint.info,  Node: Costs,  Next: Scheduling,  Prev: Condition Code,  Up: Target Macros
+
+17.17 Describing Relative Costs of Operations
+=============================================
+
+These macros let you describe the relative speed of various operations
+on the target machine.
+
+ -- Macro: REGISTER_MOVE_COST (MODE, FROM, TO)
+     A C expression for the cost of moving data of mode MODE from a
+     register in class FROM to one in class TO.  The classes are
+     expressed using the enumeration values such as `GENERAL_REGS'.  A
+     value of 2 is the default; other values are interpreted relative to
+     that.
+
+     It is not required that the cost always equal 2 when FROM is the
+     same as TO; on some machines it is expensive to move between
+     registers if they are not general registers.
+
+     If reload sees an insn consisting of a single `set' between two
+     hard registers, and if `REGISTER_MOVE_COST' applied to their
+     classes returns a value of 2, reload does not check to ensure that
+     the constraints of the insn are met.  Setting a cost of other than
+     2 will allow reload to verify that the constraints are met.  You
+     should do this if the `movM' pattern's constraints do not allow
+     such copying.
+
+     These macros are obsolete, new ports should use the target hook
+     `TARGET_REGISTER_MOVE_COST' instead.
+
+ -- Target Hook: int TARGET_REGISTER_MOVE_COST (enum machine_mode MODE,
+          reg_class_t FROM, reg_class_t TO)
+     This target hook should return the cost of moving data of mode MODE
+     from a register in class FROM to one in class TO.  The classes are
+     expressed using the enumeration values such as `GENERAL_REGS'.  A
+     value of 2 is the default; other values are interpreted relative to
+     that.
+
+     It is not required that the cost always equal 2 when FROM is the
+     same as TO; on some machines it is expensive to move between
+     registers if they are not general registers.
+
+     If reload sees an insn consisting of a single `set' between two
+     hard registers, and if `TARGET_REGISTER_MOVE_COST' applied to their
+     classes returns a value of 2, reload does not check to ensure that
+     the constraints of the insn are met.  Setting a cost of other than
+     2 will allow reload to verify that the constraints are met.  You
+     should do this if the `movM' pattern's constraints do not allow
+     such copying.
+
+     The default version of this function returns 2.
+
+ -- Macro: MEMORY_MOVE_COST (MODE, CLASS, IN)
+     A C expression for the cost of moving data of mode MODE between a
+     register of class CLASS and memory; IN is zero if the value is to
+     be written to memory, nonzero if it is to be read in.  This cost
+     is relative to those in `REGISTER_MOVE_COST'.  If moving between
+     registers and memory is more expensive than between two registers,
+     you should define this macro to express the relative cost.
+
+     If you do not define this macro, GCC uses a default cost of 4 plus
+     the cost of copying via a secondary reload register, if one is
+     needed.  If your machine requires a secondary reload register to
+     copy between memory and a register of CLASS but the reload
+     mechanism is more complex than copying via an intermediate, define
+     this macro to reflect the actual cost of the move.
+
+     GCC defines the function `memory_move_secondary_cost' if secondary
+     reloads are needed.  It computes the costs due to copying via a
+     secondary register.  If your machine copies from memory using a
+     secondary register in the conventional way but the default base
+     value of 4 is not correct for your machine, define this macro to
+     add some other value to the result of that function.  The
+     arguments to that function are the same as to this macro.
+
+     These macros are obsolete, new ports should use the target hook
+     `TARGET_MEMORY_MOVE_COST' instead.
+
+ -- Target Hook: int TARGET_MEMORY_MOVE_COST (enum machine_mode MODE,
+          reg_class_t RCLASS, bool IN)
+     This target hook should return the cost of moving data of mode MODE
+     between a register of class RCLASS and memory; IN is `false' if
+     the value is to be written to memory, `true' if it is to be read
+     in.  This cost is relative to those in `TARGET_REGISTER_MOVE_COST'.
+     If moving between registers and memory is more expensive than
+     between two registers, you should add this target hook to express
+     the relative cost.
+
+     If you do not add this target hook, GCC uses a default cost of 4
+     plus the cost of copying via a secondary reload register, if one is
+     needed.  If your machine requires a secondary reload register to
+     copy between memory and a register of RCLASS but the reload
+     mechanism is more complex than copying via an intermediate, use
+     this target hook to reflect the actual cost of the move.
+
+     GCC defines the function `memory_move_secondary_cost' if secondary
+     reloads are needed.  It computes the costs due to copying via a
+     secondary register.  If your machine copies from memory using a
+     secondary register in the conventional way but the default base
+     value of 4 is not correct for your machine, use this target hook
+     to add some other value to the result of that function.  The
+     arguments to that function are the same as to this target hook.
+
+ -- Macro: BRANCH_COST (SPEED_P, PREDICTABLE_P)
+     A C expression for the cost of a branch instruction.  A value of 1
+     is the default; other values are interpreted relative to that.
+     Parameter SPEED_P is true when the branch in question should be
+     optimized for speed.  When it is false, `BRANCH_COST' should
+     return a value optimal for code size rather than performance.
+     PREDICTABLE_P is true for well-predicted branches. On many
+     architectures the `BRANCH_COST' can be reduced then.
+
+ Here are additional macros which do not specify precise relative costs,
+but only that certain actions are more expensive than GCC would
+ordinarily expect.
+
+ -- Macro: SLOW_BYTE_ACCESS
+     Define this macro as a C expression which is nonzero if accessing
+     less than a word of memory (i.e. a `char' or a `short') is no
+     faster than accessing a word of memory, i.e., if such access
+     require more than one instruction or if there is no difference in
+     cost between byte and (aligned) word loads.
+
+     When this macro is not defined, the compiler will access a field by
+     finding the smallest containing object; when it is defined, a
+     fullword load will be used if alignment permits.  Unless bytes
+     accesses are faster than word accesses, using word accesses is
+     preferable since it may eliminate subsequent memory access if
+     subsequent accesses occur to other fields in the same word of the
+     structure, but to different bytes.
+
+ -- Macro: SLOW_UNALIGNED_ACCESS (MODE, ALIGNMENT)
+     Define this macro to be the value 1 if memory accesses described
+     by the MODE and ALIGNMENT parameters have a cost many times greater
+     than aligned accesses, for example if they are emulated in a trap
+     handler.
+
+     When this macro is nonzero, the compiler will act as if
+     `STRICT_ALIGNMENT' were nonzero when generating code for block
+     moves.  This can cause significantly more instructions to be
+     produced.  Therefore, do not set this macro nonzero if unaligned
+     accesses only add a cycle or two to the time for a memory access.
+
+     If the value of this macro is always zero, it need not be defined.
+     If this macro is defined, it should produce a nonzero value when
+     `STRICT_ALIGNMENT' is nonzero.
+
+ -- Macro: MOVE_RATIO (SPEED)
+     The threshold of number of scalar memory-to-memory move insns,
+     _below_ which a sequence of insns should be generated instead of a
+     string move insn or a library call.  Increasing the value will
+     always make code faster, but eventually incurs high cost in
+     increased code size.
+
+     Note that on machines where the corresponding move insn is a
+     `define_expand' that emits a sequence of insns, this macro counts
+     the number of such sequences.
+
+     The parameter SPEED is true if the code is currently being
+     optimized for speed rather than size.
+
+     If you don't define this, a reasonable default is used.
+
+ -- Macro: MOVE_BY_PIECES_P (SIZE, ALIGNMENT)
+     A C expression used to determine whether `move_by_pieces' will be
+     used to copy a chunk of memory, or whether some other block move
+     mechanism will be used.  Defaults to 1 if `move_by_pieces_ninsns'
+     returns less than `MOVE_RATIO'.
+
+ -- Macro: MOVE_MAX_PIECES
+     A C expression used by `move_by_pieces' to determine the largest
+     unit a load or store used to copy memory is.  Defaults to
+     `MOVE_MAX'.
+
+ -- Macro: CLEAR_RATIO (SPEED)
+     The threshold of number of scalar move insns, _below_ which a
+     sequence of insns should be generated to clear memory instead of a
+     string clear insn or a library call.  Increasing the value will
+     always make code faster, but eventually incurs high cost in
+     increased code size.
+
+     The parameter SPEED is true if the code is currently being
+     optimized for speed rather than size.
+
+     If you don't define this, a reasonable default is used.
+
+ -- Macro: CLEAR_BY_PIECES_P (SIZE, ALIGNMENT)
+     A C expression used to determine whether `clear_by_pieces' will be
+     used to clear a chunk of memory, or whether some other block clear
+     mechanism will be used.  Defaults to 1 if `move_by_pieces_ninsns'
+     returns less than `CLEAR_RATIO'.
+
+ -- Macro: SET_RATIO (SPEED)
+     The threshold of number of scalar move insns, _below_ which a
+     sequence of insns should be generated to set memory to a constant
+     value, instead of a block set insn or a library call.  Increasing
+     the value will always make code faster, but eventually incurs high
+     cost in increased code size.
+
+     The parameter SPEED is true if the code is currently being
+     optimized for speed rather than size.
+
+     If you don't define this, it defaults to the value of `MOVE_RATIO'.
+
+ -- Macro: SET_BY_PIECES_P (SIZE, ALIGNMENT)
+     A C expression used to determine whether `store_by_pieces' will be
+     used to set a chunk of memory to a constant value, or whether some
+     other mechanism will be used.  Used by `__builtin_memset' when
+     storing values other than constant zero.  Defaults to 1 if
+     `move_by_pieces_ninsns' returns less than `SET_RATIO'.
+
+ -- Macro: STORE_BY_PIECES_P (SIZE, ALIGNMENT)
+     A C expression used to determine whether `store_by_pieces' will be
+     used to set a chunk of memory to a constant string value, or
+     whether some other mechanism will be used.  Used by
+     `__builtin_strcpy' when called with a constant source string.
+     Defaults to 1 if `move_by_pieces_ninsns' returns less than
+     `MOVE_RATIO'.
+
+ -- Macro: USE_LOAD_POST_INCREMENT (MODE)
+     A C expression used to determine whether a load postincrement is a
+     good thing to use for a given mode.  Defaults to the value of
+     `HAVE_POST_INCREMENT'.
+
+ -- Macro: USE_LOAD_POST_DECREMENT (MODE)
+     A C expression used to determine whether a load postdecrement is a
+     good thing to use for a given mode.  Defaults to the value of
+     `HAVE_POST_DECREMENT'.
+
+ -- Macro: USE_LOAD_PRE_INCREMENT (MODE)
+     A C expression used to determine whether a load preincrement is a
+     good thing to use for a given mode.  Defaults to the value of
+     `HAVE_PRE_INCREMENT'.
+
+ -- Macro: USE_LOAD_PRE_DECREMENT (MODE)
+     A C expression used to determine whether a load predecrement is a
+     good thing to use for a given mode.  Defaults to the value of
+     `HAVE_PRE_DECREMENT'.
+
+ -- Macro: USE_STORE_POST_INCREMENT (MODE)
+     A C expression used to determine whether a store postincrement is
+     a good thing to use for a given mode.  Defaults to the value of
+     `HAVE_POST_INCREMENT'.
+
+ -- Macro: USE_STORE_POST_DECREMENT (MODE)
+     A C expression used to determine whether a store postdecrement is
+     a good thing to use for a given mode.  Defaults to the value of
+     `HAVE_POST_DECREMENT'.
+
+ -- Macro: USE_STORE_PRE_INCREMENT (MODE)
+     This macro is used to determine whether a store preincrement is a
+     good thing to use for a given mode.  Defaults to the value of
+     `HAVE_PRE_INCREMENT'.
+
+ -- Macro: USE_STORE_PRE_DECREMENT (MODE)
+     This macro is used to determine whether a store predecrement is a
+     good thing to use for a given mode.  Defaults to the value of
+     `HAVE_PRE_DECREMENT'.
+
+ -- Macro: NO_FUNCTION_CSE
+     Define this macro if it is as good or better to call a constant
+     function address than to call an address kept in a register.
+
+ -- Macro: RANGE_TEST_NON_SHORT_CIRCUIT
+     Define this macro if a non-short-circuit operation produced by
+     `fold_range_test ()' is optimal.  This macro defaults to true if
+     `BRANCH_COST' is greater than or equal to the value 2.
+
+ -- Target Hook: bool TARGET_RTX_COSTS (rtx X, int CODE, int
+          OUTER_CODE, int *TOTAL, bool SPEED)
+     This target hook describes the relative costs of RTL expressions.
+
+     The cost may depend on the precise form of the expression, which is
+     available for examination in X, and the rtx code of the expression
+     in which it is contained, found in OUTER_CODE.  CODE is the
+     expression code--redundant, since it can be obtained with
+     `GET_CODE (X)'.
+
+     In implementing this hook, you can use the construct
+     `COSTS_N_INSNS (N)' to specify a cost equal to N fast instructions.
+
+     On entry to the hook, `*TOTAL' contains a default estimate for the
+     cost of the expression.  The hook should modify this value as
+     necessary.  Traditionally, the default costs are `COSTS_N_INSNS
+     (5)' for multiplications, `COSTS_N_INSNS (7)' for division and
+     modulus operations, and `COSTS_N_INSNS (1)' for all other
+     operations.
+
+     When optimizing for code size, i.e. when `speed' is false, this
+     target hook should be used to estimate the relative size cost of
+     an expression, again relative to `COSTS_N_INSNS'.
+
+     The hook returns true when all subexpressions of X have been
+     processed, and false when `rtx_cost' should recurse.
+
+ -- Target Hook: int TARGET_ADDRESS_COST (rtx ADDRESS, bool SPEED)
+     This hook computes the cost of an addressing mode that contains
+     ADDRESS.  If not defined, the cost is computed from the ADDRESS
+     expression and the `TARGET_RTX_COST' hook.
+
+     For most CISC machines, the default cost is a good approximation
+     of the true cost of the addressing mode.  However, on RISC
+     machines, all instructions normally have the same length and
+     execution time.  Hence all addresses will have equal costs.
+
+     In cases where more than one form of an address is known, the form
+     with the lowest cost will be used.  If multiple forms have the
+     same, lowest, cost, the one that is the most complex will be used.
+
+     For example, suppose an address that is equal to the sum of a
+     register and a constant is used twice in the same basic block.
+     When this macro is not defined, the address will be computed in a
+     register and memory references will be indirect through that
+     register.  On machines where the cost of the addressing mode
+     containing the sum is no higher than that of a simple indirect
+     reference, this will produce an additional instruction and
+     possibly require an additional register.  Proper specification of
+     this macro eliminates this overhead for such machines.
+
+     This hook is never called with an invalid address.
+
+     On machines where an address involving more than one register is as
+     cheap as an address computation involving only one register,
+     defining `TARGET_ADDRESS_COST' to reflect this can cause two
+     registers to be live over a region of code where only one would
+     have been if `TARGET_ADDRESS_COST' were not defined in that
+     manner.  This effect should be considered in the definition of
+     this macro.  Equivalent costs should probably only be given to
+     addresses with different numbers of registers on machines with
+     lots of registers.
+
+
+File: gccint.info,  Node: Scheduling,  Next: Sections,  Prev: Costs,  Up: Target Macros
+
+17.18 Adjusting the Instruction Scheduler
+=========================================
+
+The instruction scheduler may need a fair amount of machine-specific
+adjustment in order to produce good code.  GCC provides several target
+hooks for this purpose.  It is usually enough to define just a few of
+them: try the first ones in this list first.
+
+ -- Target Hook: int TARGET_SCHED_ISSUE_RATE (void)
+     This hook returns the maximum number of instructions that can ever
+     issue at the same time on the target machine.  The default is one.
+     Although the insn scheduler can define itself the possibility of
+     issue an insn on the same cycle, the value can serve as an
+     additional constraint to issue insns on the same simulated
+     processor cycle (see hooks `TARGET_SCHED_REORDER' and
+     `TARGET_SCHED_REORDER2').  This value must be constant over the
+     entire compilation.  If you need it to vary depending on what the
+     instructions are, you must use `TARGET_SCHED_VARIABLE_ISSUE'.
+
+ -- Target Hook: int TARGET_SCHED_VARIABLE_ISSUE (FILE *FILE, int
+          VERBOSE, rtx INSN, int MORE)
+     This hook is executed by the scheduler after it has scheduled an
+     insn from the ready list.  It should return the number of insns
+     which can still be issued in the current cycle.  The default is
+     `MORE - 1' for insns other than `CLOBBER' and `USE', which
+     normally are not counted against the issue rate.  You should
+     define this hook if some insns take more machine resources than
+     others, so that fewer insns can follow them in the same cycle.
+     FILE is either a null pointer, or a stdio stream to write any
+     debug output to.  VERBOSE is the verbose level provided by
+     `-fsched-verbose-N'.  INSN is the instruction that was scheduled.
+
+ -- Target Hook: int TARGET_SCHED_ADJUST_COST (rtx INSN, rtx LINK, rtx
+          DEP_INSN, int COST)
+     This function corrects the value of COST based on the relationship
+     between INSN and DEP_INSN through the dependence LINK.  It should
+     return the new value.  The default is to make no adjustment to
+     COST.  This can be used for example to specify to the scheduler
+     using the traditional pipeline description that an output- or
+     anti-dependence does not incur the same cost as a data-dependence.
+     If the scheduler using the automaton based pipeline description,
+     the cost of anti-dependence is zero and the cost of
+     output-dependence is maximum of one and the difference of latency
+     times of the first and the second insns.  If these values are not
+     acceptable, you could use the hook to modify them too.  See also
+     *note Processor pipeline description::.
+
+ -- Target Hook: int TARGET_SCHED_ADJUST_PRIORITY (rtx INSN, int
+          PRIORITY)
+     This hook adjusts the integer scheduling priority PRIORITY of
+     INSN.  It should return the new priority.  Increase the priority to
+     execute INSN earlier, reduce the priority to execute INSN later.
+     Do not define this hook if you do not need to adjust the
+     scheduling priorities of insns.
+
+ -- Target Hook: int TARGET_SCHED_REORDER (FILE *FILE, int VERBOSE, rtx
+          *READY, int *N_READYP, int CLOCK)
+     This hook is executed by the scheduler after it has scheduled the
+     ready list, to allow the machine description to reorder it (for
+     example to combine two small instructions together on `VLIW'
+     machines).  FILE is either a null pointer, or a stdio stream to
+     write any debug output to.  VERBOSE is the verbose level provided
+     by `-fsched-verbose-N'.  READY is a pointer to the ready list of
+     instructions that are ready to be scheduled.  N_READYP is a
+     pointer to the number of elements in the ready list.  The scheduler
+     reads the ready list in reverse order, starting with
+     READY[*N_READYP - 1] and going to READY[0].  CLOCK is the timer
+     tick of the scheduler.  You may modify the ready list and the
+     number of ready insns.  The return value is the number of insns
+     that can issue this cycle; normally this is just `issue_rate'.
+     See also `TARGET_SCHED_REORDER2'.
+
+ -- Target Hook: int TARGET_SCHED_REORDER2 (FILE *FILE, int VERBOSE,
+          rtx *READY, int *N_READYP, int CLOCK)
+     Like `TARGET_SCHED_REORDER', but called at a different time.  That
+     function is called whenever the scheduler starts a new cycle.
+     This one is called once per iteration over a cycle, immediately
+     after `TARGET_SCHED_VARIABLE_ISSUE'; it can reorder the ready list
+     and return the number of insns to be scheduled in the same cycle.
+     Defining this hook can be useful if there are frequent situations
+     where scheduling one insn causes other insns to become ready in
+     the same cycle.  These other insns can then be taken into account
+     properly.
+
+ -- Target Hook: void TARGET_SCHED_DEPENDENCIES_EVALUATION_HOOK (rtx
+          HEAD, rtx TAIL)
+     This hook is called after evaluation forward dependencies of insns
+     in chain given by two parameter values (HEAD and TAIL
+     correspondingly) but before insns scheduling of the insn chain.
+     For example, it can be used for better insn classification if it
+     requires analysis of dependencies.  This hook can use backward and
+     forward dependencies of the insn scheduler because they are already
+     calculated.
+
+ -- Target Hook: void TARGET_SCHED_INIT (FILE *FILE, int VERBOSE, int
+          MAX_READY)
+     This hook is executed by the scheduler at the beginning of each
+     block of instructions that are to be scheduled.  FILE is either a
+     null pointer, or a stdio stream to write any debug output to.
+     VERBOSE is the verbose level provided by `-fsched-verbose-N'.
+     MAX_READY is the maximum number of insns in the current scheduling
+     region that can be live at the same time.  This can be used to
+     allocate scratch space if it is needed, e.g. by
+     `TARGET_SCHED_REORDER'.
+
+ -- Target Hook: void TARGET_SCHED_FINISH (FILE *FILE, int VERBOSE)
+     This hook is executed by the scheduler at the end of each block of
+     instructions that are to be scheduled.  It can be used to perform
+     cleanup of any actions done by the other scheduling hooks.  FILE
+     is either a null pointer, or a stdio stream to write any debug
+     output to.  VERBOSE is the verbose level provided by
+     `-fsched-verbose-N'.
+
+ -- Target Hook: void TARGET_SCHED_INIT_GLOBAL (FILE *FILE, int
+          VERBOSE, int OLD_MAX_UID)
+     This hook is executed by the scheduler after function level
+     initializations.  FILE is either a null pointer, or a stdio stream
+     to write any debug output to.  VERBOSE is the verbose level
+     provided by `-fsched-verbose-N'.  OLD_MAX_UID is the maximum insn
+     uid when scheduling begins.
+
+ -- Target Hook: void TARGET_SCHED_FINISH_GLOBAL (FILE *FILE, int
+          VERBOSE)
+     This is the cleanup hook corresponding to
+     `TARGET_SCHED_INIT_GLOBAL'.  FILE is either a null pointer, or a
+     stdio stream to write any debug output to.  VERBOSE is the verbose
+     level provided by `-fsched-verbose-N'.
+
+ -- Target Hook: rtx TARGET_SCHED_DFA_PRE_CYCLE_INSN (void)
+     The hook returns an RTL insn.  The automaton state used in the
+     pipeline hazard recognizer is changed as if the insn were scheduled
+     when the new simulated processor cycle starts.  Usage of the hook
+     may simplify the automaton pipeline description for some VLIW
+     processors.  If the hook is defined, it is used only for the
+     automaton based pipeline description.  The default is not to
+     change the state when the new simulated processor cycle starts.
+
+ -- Target Hook: void TARGET_SCHED_INIT_DFA_PRE_CYCLE_INSN (void)
+     The hook can be used to initialize data used by the previous hook.
+
+ -- Target Hook: rtx TARGET_SCHED_DFA_POST_CYCLE_INSN (void)
+     The hook is analogous to `TARGET_SCHED_DFA_PRE_CYCLE_INSN' but used
+     to changed the state as if the insn were scheduled when the new
+     simulated processor cycle finishes.
+
+ -- Target Hook: void TARGET_SCHED_INIT_DFA_POST_CYCLE_INSN (void)
+     The hook is analogous to `TARGET_SCHED_INIT_DFA_PRE_CYCLE_INSN' but
+     used to initialize data used by the previous hook.
+
+ -- Target Hook: void TARGET_SCHED_DFA_PRE_ADVANCE_CYCLE (void)
+     The hook to notify target that the current simulated cycle is
+     about to finish.  The hook is analogous to
+     `TARGET_SCHED_DFA_PRE_CYCLE_INSN' but used to change the state in
+     more complicated situations - e.g., when advancing state on a
+     single insn is not enough.
+
+ -- Target Hook: void TARGET_SCHED_DFA_POST_ADVANCE_CYCLE (void)
+     The hook to notify target that new simulated cycle has just
+     started.  The hook is analogous to
+     `TARGET_SCHED_DFA_POST_CYCLE_INSN' but used to change the state in
+     more complicated situations - e.g., when advancing state on a
+     single insn is not enough.
+
+ -- Target Hook: int TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
+          (void)
+     This hook controls better choosing an insn from the ready insn
+     queue for the DFA-based insn scheduler.  Usually the scheduler
+     chooses the first insn from the queue.  If the hook returns a
+     positive value, an additional scheduler code tries all
+     permutations of `TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
+     ()' subsequent ready insns to choose an insn whose issue will
+     result in maximal number of issued insns on the same cycle.  For
+     the VLIW processor, the code could actually solve the problem of
+     packing simple insns into the VLIW insn.  Of course, if the rules
+     of VLIW packing are described in the automaton.
+
+     This code also could be used for superscalar RISC processors.  Let
+     us consider a superscalar RISC processor with 3 pipelines.  Some
+     insns can be executed in pipelines A or B, some insns can be
+     executed only in pipelines B or C, and one insn can be executed in
+     pipeline B.  The processor may issue the 1st insn into A and the
+     2nd one into B.  In this case, the 3rd insn will wait for freeing B
+     until the next cycle.  If the scheduler issues the 3rd insn the
+     first, the processor could issue all 3 insns per cycle.
+
+     Actually this code demonstrates advantages of the automaton based
+     pipeline hazard recognizer.  We try quickly and easy many insn
+     schedules to choose the best one.
+
+     The default is no multipass scheduling.
+
+ -- Target Hook: int
+TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD (rtx INSN)
+     This hook controls what insns from the ready insn queue will be
+     considered for the multipass insn scheduling.  If the hook returns
+     zero for INSN, the insn will be not chosen to be issued.
+
+     The default is that any ready insns can be chosen to be issued.
+
+ -- Target Hook: void TARGET_SCHED_FIRST_CYCLE_MULTIPASS_BEGIN (void
+          *DATA, char *READY_TRY, int N_READY, bool FIRST_CYCLE_INSN_P)
+     This hook prepares the target backend for a new round of multipass
+     scheduling.
+
+ -- Target Hook: void TARGET_SCHED_FIRST_CYCLE_MULTIPASS_ISSUE (void
+          *DATA, char *READY_TRY, int N_READY, rtx INSN, const void
+          *PREV_DATA)
+     This hook is called when multipass scheduling evaluates
+     instruction INSN.
+
+ -- Target Hook: void TARGET_SCHED_FIRST_CYCLE_MULTIPASS_BACKTRACK
+          (const void *DATA, char *READY_TRY, int N_READY)
+     This is called when multipass scheduling backtracks from
+     evaluation of an instruction.
+
+ -- Target Hook: void TARGET_SCHED_FIRST_CYCLE_MULTIPASS_END (const
+          void *DATA)
+     This hook notifies the target about the result of the concluded
+     current round of multipass scheduling.
+
+ -- Target Hook: void TARGET_SCHED_FIRST_CYCLE_MULTIPASS_INIT (void
+          *DATA)
+     This hook initializes target-specific data used in multipass
+     scheduling.
+
+ -- Target Hook: void TARGET_SCHED_FIRST_CYCLE_MULTIPASS_FINI (void
+          *DATA)
+     This hook finalizes target-specific data used in multipass
+     scheduling.
+
+ -- Target Hook: int TARGET_SCHED_DFA_NEW_CYCLE (FILE *DUMP, int
+          VERBOSE, rtx INSN, int LAST_CLOCK, int CLOCK, int *SORT_P)
+     This hook is called by the insn scheduler before issuing INSN on
+     cycle CLOCK.  If the hook returns nonzero, INSN is not issued on
+     this processor cycle.  Instead, the processor cycle is advanced.
+     If *SORT_P is zero, the insn ready queue is not sorted on the new
+     cycle start as usually.  DUMP and VERBOSE specify the file and
+     verbosity level to use for debugging output.  LAST_CLOCK and CLOCK
+     are, respectively, the processor cycle on which the previous insn
+     has been issued, and the current processor cycle.
+
+ -- Target Hook: bool TARGET_SCHED_IS_COSTLY_DEPENDENCE (struct _dep
+          *_DEP, int COST, int DISTANCE)
+     This hook is used to define which dependences are considered
+     costly by the target, so costly that it is not advisable to
+     schedule the insns that are involved in the dependence too close
+     to one another.  The parameters to this hook are as follows:  The
+     first parameter _DEP is the dependence being evaluated.  The
+     second parameter COST is the cost of the dependence as estimated
+     by the scheduler, and the third parameter DISTANCE is the distance
+     in cycles between the two insns.  The hook returns `true' if
+     considering the distance between the two insns the dependence
+     between them is considered costly by the target, and `false'
+     otherwise.
+
+     Defining this hook can be useful in multiple-issue out-of-order
+     machines, where (a) it's practically hopeless to predict the
+     actual data/resource delays, however: (b) there's a better chance
+     to predict the actual grouping that will be formed, and (c)
+     correctly emulating the grouping can be very important.  In such
+     targets one may want to allow issuing dependent insns closer to
+     one another--i.e., closer than the dependence distance;  however,
+     not in cases of "costly dependences", which this hooks allows to
+     define.
+
+ -- Target Hook: void TARGET_SCHED_H_I_D_EXTENDED (void)
+     This hook is called by the insn scheduler after emitting a new
+     instruction to the instruction stream.  The hook notifies a target
+     backend to extend its per instruction data structures.
+
+ -- Target Hook: void * TARGET_SCHED_ALLOC_SCHED_CONTEXT (void)
+     Return a pointer to a store large enough to hold target scheduling
+     context.
+
+ -- Target Hook: void TARGET_SCHED_INIT_SCHED_CONTEXT (void *TC, bool
+          CLEAN_P)
+     Initialize store pointed to by TC to hold target scheduling
+     context.  It CLEAN_P is true then initialize TC as if scheduler is
+     at the beginning of the block.  Otherwise, copy the current
+     context into TC.
+
+ -- Target Hook: void TARGET_SCHED_SET_SCHED_CONTEXT (void *TC)
+     Copy target scheduling context pointed to by TC to the current
+     context.
+
+ -- Target Hook: void TARGET_SCHED_CLEAR_SCHED_CONTEXT (void *TC)
+     Deallocate internal data in target scheduling context pointed to
+     by TC.
+
+ -- Target Hook: void TARGET_SCHED_FREE_SCHED_CONTEXT (void *TC)
+     Deallocate a store for target scheduling context pointed to by TC.
+
+ -- Target Hook: int TARGET_SCHED_SPECULATE_INSN (rtx INSN, int
+          REQUEST, rtx *NEW_PAT)
+     This hook is called by the insn scheduler when INSN has only
+     speculative dependencies and therefore can be scheduled
+     speculatively.  The hook is used to check if the pattern of INSN
+     has a speculative version and, in case of successful check, to
+     generate that speculative pattern.  The hook should return 1, if
+     the instruction has a speculative form, or -1, if it doesn't.
+     REQUEST describes the type of requested speculation.  If the
+     return value equals 1 then NEW_PAT is assigned the generated
+     speculative pattern.
+
+ -- Target Hook: bool TARGET_SCHED_NEEDS_BLOCK_P (int DEP_STATUS)
+     This hook is called by the insn scheduler during generation of
+     recovery code for INSN.  It should return `true', if the
+     corresponding check instruction should branch to recovery code, or
+     `false' otherwise.
+
+ -- Target Hook: rtx TARGET_SCHED_GEN_SPEC_CHECK (rtx INSN, rtx LABEL,
+          int MUTATE_P)
+     This hook is called by the insn scheduler to generate a pattern
+     for recovery check instruction.  If MUTATE_P is zero, then INSN is
+     a speculative instruction for which the check should be generated.
+     LABEL is either a label of a basic block, where recovery code
+     should be emitted, or a null pointer, when requested check doesn't
+     branch to recovery code (a simple check).  If MUTATE_P is nonzero,
+     then a pattern for a branchy check corresponding to a simple check
+     denoted by INSN should be generated.  In this case LABEL can't be
+     null.
+
+ -- Target Hook: bool
+TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD_SPEC (const_rtx
+          INSN)
+     This hook is used as a workaround for
+     `TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD' not being
+     called on the first instruction of the ready list.  The hook is
+     used to discard speculative instructions that stand first in the
+     ready list from being scheduled on the current cycle.  If the hook
+     returns `false', INSN will not be chosen to be issued.  For
+     non-speculative instructions, the hook should always return
+     `true'.  For example, in the ia64 backend the hook is used to
+     cancel data speculative insns when the ALAT table is nearly full.
+
+ -- Target Hook: void TARGET_SCHED_SET_SCHED_FLAGS (struct
+          spec_info_def *SPEC_INFO)
+     This hook is used by the insn scheduler to find out what features
+     should be enabled/used.  The structure *SPEC_INFO should be filled
+     in by the target.  The structure describes speculation types that
+     can be used in the scheduler.
+
+ -- Target Hook: int TARGET_SCHED_SMS_RES_MII (struct ddg *G)
+     This hook is called by the swing modulo scheduler to calculate a
+     resource-based lower bound which is based on the resources
+     available in the machine and the resources required by each
+     instruction.  The target backend can use G to calculate such
+     bound.  A very simple lower bound will be used in case this hook
+     is not implemented: the total number of instructions divided by
+     the issue rate.
+
+ -- Target Hook: bool TARGET_SCHED_DISPATCH (rtx INSN, int X)
+     This hook is called by Haifa Scheduler.  It returns true if
+     dispatch scheduling is supported in hardware and the condition
+     specified in the parameter is true.
+
+ -- Target Hook: void TARGET_SCHED_DISPATCH_DO (rtx INSN, int X)
+     This hook is called by Haifa Scheduler.  It performs the operation
+     specified in its second parameter.
+
+
+File: gccint.info,  Node: Sections,  Next: PIC,  Prev: Scheduling,  Up: Target Macros
+
+17.19 Dividing the Output into Sections (Texts, Data, ...)
+==========================================================
+
+An object file is divided into sections containing different types of
+data.  In the most common case, there are three sections: the "text
+section", which holds instructions and read-only data; the "data
+section", which holds initialized writable data; and the "bss section",
+which holds uninitialized data.  Some systems have other kinds of
+sections.
+
+ `varasm.c' provides several well-known sections, such as
+`text_section', `data_section' and `bss_section'.  The normal way of
+controlling a `FOO_section' variable is to define the associated
+`FOO_SECTION_ASM_OP' macro, as described below.  The macros are only
+read once, when `varasm.c' initializes itself, so their values must be
+run-time constants.  They may however depend on command-line flags.
+
+ _Note:_ Some run-time files, such `crtstuff.c', also make use of the
+`FOO_SECTION_ASM_OP' macros, and expect them to be string literals.
+
+ Some assemblers require a different string to be written every time a
+section is selected.  If your assembler falls into this category, you
+should define the `TARGET_ASM_INIT_SECTIONS' hook and use
+`get_unnamed_section' to set up the sections.
+
+ You must always create a `text_section', either by defining
+`TEXT_SECTION_ASM_OP' or by initializing `text_section' in
+`TARGET_ASM_INIT_SECTIONS'.  The same is true of `data_section' and
+`DATA_SECTION_ASM_OP'.  If you do not create a distinct
+`readonly_data_section', the default is to reuse `text_section'.
+
+ All the other `varasm.c' sections are optional, and are null if the
+target does not provide them.
+
+ -- Macro: TEXT_SECTION_ASM_OP
+     A C expression whose value is a string, including spacing,
+     containing the assembler operation that should precede
+     instructions and read-only data.  Normally `"\t.text"' is right.
+
+ -- Macro: HOT_TEXT_SECTION_NAME
+     If defined, a C string constant for the name of the section
+     containing most frequently executed functions of the program.  If
+     not defined, GCC will provide a default definition if the target
+     supports named sections.
+
+ -- Macro: UNLIKELY_EXECUTED_TEXT_SECTION_NAME
+     If defined, a C string constant for the name of the section
+     containing unlikely executed functions in the program.
+
+ -- Macro: DATA_SECTION_ASM_OP
+     A C expression whose value is a string, including spacing,
+     containing the assembler operation to identify the following data
+     as writable initialized data.  Normally `"\t.data"' is right.
+
+ -- Macro: SDATA_SECTION_ASM_OP
+     If defined, a C expression whose value is a string, including
+     spacing, containing the assembler operation to identify the
+     following data as initialized, writable small data.
+
+ -- Macro: READONLY_DATA_SECTION_ASM_OP
+     A C expression whose value is a string, including spacing,
+     containing the assembler operation to identify the following data
+     as read-only initialized data.
+
+ -- Macro: BSS_SECTION_ASM_OP
+     If defined, a C expression whose value is a string, including
+     spacing, containing the assembler operation to identify the
+     following data as uninitialized global data.  If not defined, and
+     neither `ASM_OUTPUT_BSS' nor `ASM_OUTPUT_ALIGNED_BSS' are defined,
+     uninitialized global data will be output in the data section if
+     `-fno-common' is passed, otherwise `ASM_OUTPUT_COMMON' will be
+     used.
+
+ -- Macro: SBSS_SECTION_ASM_OP
+     If defined, a C expression whose value is a string, including
+     spacing, containing the assembler operation to identify the
+     following data as uninitialized, writable small data.
+
+ -- Macro: TLS_COMMON_ASM_OP
+     If defined, a C expression whose value is a string containing the
+     assembler operation to identify the following data as thread-local
+     common data.  The default is `".tls_common"'.
+
+ -- Macro: TLS_SECTION_ASM_FLAG
+     If defined, a C expression whose value is a character constant
+     containing the flag used to mark a section as a TLS section.  The
+     default is `'T''.
+
+ -- Macro: INIT_SECTION_ASM_OP
+     If defined, a C expression whose value is a string, including
+     spacing, containing the assembler operation to identify the
+     following data as initialization code.  If not defined, GCC will
+     assume such a section does not exist.  This section has no
+     corresponding `init_section' variable; it is used entirely in
+     runtime code.
+
+ -- Macro: FINI_SECTION_ASM_OP
+     If defined, a C expression whose value is a string, including
+     spacing, containing the assembler operation to identify the
+     following data as finalization code.  If not defined, GCC will
+     assume such a section does not exist.  This section has no
+     corresponding `fini_section' variable; it is used entirely in
+     runtime code.
+
+ -- Macro: INIT_ARRAY_SECTION_ASM_OP
+     If defined, a C expression whose value is a string, including
+     spacing, containing the assembler operation to identify the
+     following data as part of the `.init_array' (or equivalent)
+     section.  If not defined, GCC will assume such a section does not
+     exist.  Do not define both this macro and `INIT_SECTION_ASM_OP'.
+
+ -- Macro: FINI_ARRAY_SECTION_ASM_OP
+     If defined, a C expression whose value is a string, including
+     spacing, containing the assembler operation to identify the
+     following data as part of the `.fini_array' (or equivalent)
+     section.  If not defined, GCC will assume such a section does not
+     exist.  Do not define both this macro and `FINI_SECTION_ASM_OP'.
+
+ -- Macro: CRT_CALL_STATIC_FUNCTION (SECTION_OP, FUNCTION)
+     If defined, an ASM statement that switches to a different section
+     via SECTION_OP, calls FUNCTION, and switches back to the text
+     section.  This is used in `crtstuff.c' if `INIT_SECTION_ASM_OP' or
+     `FINI_SECTION_ASM_OP' to calls to initialization and finalization
+     functions from the init and fini sections.  By default, this macro
+     uses a simple function call.  Some ports need hand-crafted
+     assembly code to avoid dependencies on registers initialized in
+     the function prologue or to ensure that constant pools don't end
+     up too far way in the text section.
+
+ -- Macro: TARGET_LIBGCC_SDATA_SECTION
+     If defined, a string which names the section into which small
+     variables defined in crtstuff and libgcc should go.  This is useful
+     when the target has options for optimizing access to small data,
+     and you want the crtstuff and libgcc routines to be conservative
+     in what they expect of your application yet liberal in what your
+     application expects.  For example, for targets with a `.sdata'
+     section (like MIPS), you could compile crtstuff with `-G 0' so
+     that it doesn't require small data support from your application,
+     but use this macro to put small data into `.sdata' so that your
+     application can access these variables whether it uses small data
+     or not.
+
+ -- Macro: FORCE_CODE_SECTION_ALIGN
+     If defined, an ASM statement that aligns a code section to some
+     arbitrary boundary.  This is used to force all fragments of the
+     `.init' and `.fini' sections to have to same alignment and thus
+     prevent the linker from having to add any padding.
+
+ -- Macro: JUMP_TABLES_IN_TEXT_SECTION
+     Define this macro to be an expression with a nonzero value if jump
+     tables (for `tablejump' insns) should be output in the text
+     section, along with the assembler instructions.  Otherwise, the
+     readonly data section is used.
+
+     This macro is irrelevant if there is no separate readonly data
+     section.
+
+ -- Target Hook: void TARGET_ASM_INIT_SECTIONS (void)
+     Define this hook if you need to do something special to set up the
+     `varasm.c' sections, or if your target has some special sections
+     of its own that you need to create.
+
+     GCC calls this hook after processing the command line, but before
+     writing any assembly code, and before calling any of the
+     section-returning hooks described below.
+
+ -- Target Hook: int TARGET_ASM_RELOC_RW_MASK (void)
+     Return a mask describing how relocations should be treated when
+     selecting sections.  Bit 1 should be set if global relocations
+     should be placed in a read-write section; bit 0 should be set if
+     local relocations should be placed in a read-write section.
+
+     The default version of this function returns 3 when `-fpic' is in
+     effect, and 0 otherwise.  The hook is typically redefined when the
+     target cannot support (some kinds of) dynamic relocations in
+     read-only sections even in executables.
+
+ -- Target Hook: section * TARGET_ASM_SELECT_SECTION (tree EXP, int
+          RELOC, unsigned HOST_WIDE_INT ALIGN)
+     Return the section into which EXP should be placed.  You can
+     assume that EXP is either a `VAR_DECL' node or a constant of some
+     sort.  RELOC indicates whether the initial value of EXP requires
+     link-time relocations.  Bit 0 is set when variable contains local
+     relocations only, while bit 1 is set for global relocations.
+     ALIGN is the constant alignment in bits.
+
+     The default version of this function takes care of putting
+     read-only variables in `readonly_data_section'.
+
+     See also USE_SELECT_SECTION_FOR_FUNCTIONS.
+
+ -- Macro: USE_SELECT_SECTION_FOR_FUNCTIONS
+     Define this macro if you wish TARGET_ASM_SELECT_SECTION to be
+     called for `FUNCTION_DECL's as well as for variables and constants.
+
+     In the case of a `FUNCTION_DECL', RELOC will be zero if the
+     function has been determined to be likely to be called, and
+     nonzero if it is unlikely to be called.
+
+ -- Target Hook: void TARGET_ASM_UNIQUE_SECTION (tree DECL, int RELOC)
+     Build up a unique section name, expressed as a `STRING_CST' node,
+     and assign it to `DECL_SECTION_NAME (DECL)'.  As with
+     `TARGET_ASM_SELECT_SECTION', RELOC indicates whether the initial
+     value of EXP requires link-time relocations.
+
+     The default version of this function appends the symbol name to the
+     ELF section name that would normally be used for the symbol.  For
+     example, the function `foo' would be placed in `.text.foo'.
+     Whatever the actual target object format, this is often good
+     enough.
+
+ -- Target Hook: section * TARGET_ASM_FUNCTION_RODATA_SECTION (tree
+          DECL)
+     Return the readonly data section associated with
+     `DECL_SECTION_NAME (DECL)'.  The default version of this function
+     selects `.gnu.linkonce.r.name' if the function's section is
+     `.gnu.linkonce.t.name', `.rodata.name' if function is in
+     `.text.name', and the normal readonly-data section otherwise.
+
+ -- Target Hook: section * TARGET_ASM_SELECT_RTX_SECTION (enum
+          machine_mode MODE, rtx X, unsigned HOST_WIDE_INT ALIGN)
+     Return the section into which a constant X, of mode MODE, should
+     be placed.  You can assume that X is some kind of constant in RTL.
+     The argument MODE is redundant except in the case of a `const_int'
+     rtx.  ALIGN is the constant alignment in bits.
+
+     The default version of this function takes care of putting symbolic
+     constants in `flag_pic' mode in `data_section' and everything else
+     in `readonly_data_section'.
+
+ -- Target Hook: tree TARGET_MANGLE_DECL_ASSEMBLER_NAME (tree DECL,
+          tree ID)
+     Define this hook if you need to postprocess the assembler name
+     generated by target-independent code.  The ID provided to this
+     hook will be the computed name (e.g., the macro `DECL_NAME' of the
+     DECL in C, or the mangled name of the DECL in C++).  The return
+     value of the hook is an `IDENTIFIER_NODE' for the appropriate
+     mangled name on your target system.  The default implementation of
+     this hook just returns the ID provided.
+
+ -- Target Hook: void TARGET_ENCODE_SECTION_INFO (tree DECL, rtx RTL,
+          int NEW_DECL_P)
+     Define this hook if references to a symbol or a constant must be
+     treated differently depending on something about the variable or
+     function named by the symbol (such as what section it is in).
+
+     The hook is executed immediately after rtl has been created for
+     DECL, which may be a variable or function declaration or an entry
+     in the constant pool.  In either case, RTL is the rtl in question.
+     Do _not_ use `DECL_RTL (DECL)' in this hook; that field may not
+     have been initialized yet.
+
+     In the case of a constant, it is safe to assume that the rtl is a
+     `mem' whose address is a `symbol_ref'.  Most decls will also have
+     this form, but that is not guaranteed.  Global register variables,
+     for instance, will have a `reg' for their rtl.  (Normally the
+     right thing to do with such unusual rtl is leave it alone.)
+
+     The NEW_DECL_P argument will be true if this is the first time
+     that `TARGET_ENCODE_SECTION_INFO' has been invoked on this decl.
+     It will be false for subsequent invocations, which will happen for
+     duplicate declarations.  Whether or not anything must be done for
+     the duplicate declaration depends on whether the hook examines
+     `DECL_ATTRIBUTES'.  NEW_DECL_P is always true when the hook is
+     called for a constant.
+
+     The usual thing for this hook to do is to record flags in the
+     `symbol_ref', using `SYMBOL_REF_FLAG' or `SYMBOL_REF_FLAGS'.
+     Historically, the name string was modified if it was necessary to
+     encode more than one bit of information, but this practice is now
+     discouraged; use `SYMBOL_REF_FLAGS'.
+
+     The default definition of this hook, `default_encode_section_info'
+     in `varasm.c', sets a number of commonly-useful bits in
+     `SYMBOL_REF_FLAGS'.  Check whether the default does what you need
+     before overriding it.
+
+ -- Target Hook: const char * TARGET_STRIP_NAME_ENCODING (const char
+          *NAME)
+     Decode NAME and return the real name part, sans the characters
+     that `TARGET_ENCODE_SECTION_INFO' may have added.
+
+ -- Target Hook: bool TARGET_IN_SMALL_DATA_P (const_tree EXP)
+     Returns true if EXP should be placed into a "small data" section.
+     The default version of this hook always returns false.
+
+ -- Target Hook: bool TARGET_HAVE_SRODATA_SECTION
+     Contains the value true if the target places read-only "small
+     data" into a separate section.  The default value is false.
+
+ -- Target Hook: bool TARGET_PROFILE_BEFORE_PROLOGUE (void)
+     It returns true if target wants profile code emitted before
+     prologue.
+
+     The default version of this hook use the target macro
+     `PROFILE_BEFORE_PROLOGUE'.
+
+ -- Target Hook: bool TARGET_BINDS_LOCAL_P (const_tree EXP)
+     Returns true if EXP names an object for which name resolution
+     rules must resolve to the current "module" (dynamic shared library
+     or executable image).
+
+     The default version of this hook implements the name resolution
+     rules for ELF, which has a looser model of global name binding
+     than other currently supported object file formats.
+
+ -- Target Hook: bool TARGET_HAVE_TLS
+     Contains the value true if the target supports thread-local
+     storage.  The default value is false.
+
+
+File: gccint.info,  Node: PIC,  Next: Assembler Format,  Prev: Sections,  Up: Target Macros
+
+17.20 Position Independent Code
+===============================
+
+This section describes macros that help implement generation of position
+independent code.  Simply defining these macros is not enough to
+generate valid PIC; you must also add support to the hook
+`TARGET_LEGITIMATE_ADDRESS_P' and to the macro `PRINT_OPERAND_ADDRESS',
+as well as `LEGITIMIZE_ADDRESS'.  You must modify the definition of
+`movsi' to do something appropriate when the source operand contains a
+symbolic address.  You may also need to alter the handling of switch
+statements so that they use relative addresses.
+
+ -- Macro: PIC_OFFSET_TABLE_REGNUM
+     The register number of the register used to address a table of
+     static data addresses in memory.  In some cases this register is
+     defined by a processor's "application binary interface" (ABI).
+     When this macro is defined, RTL is generated for this register
+     once, as with the stack pointer and frame pointer registers.  If
+     this macro is not defined, it is up to the machine-dependent files
+     to allocate such a register (if necessary).  Note that this
+     register must be fixed when in use (e.g.  when `flag_pic' is true).
+
+ -- Macro: PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
+     A C expression that is nonzero if the register defined by
+     `PIC_OFFSET_TABLE_REGNUM' is clobbered by calls.  If not defined,
+     the default is zero.  Do not define this macro if
+     `PIC_OFFSET_TABLE_REGNUM' is not defined.
+
+ -- Macro: LEGITIMATE_PIC_OPERAND_P (X)
+     A C expression that is nonzero if X is a legitimate immediate
+     operand on the target machine when generating position independent
+     code.  You can assume that X satisfies `CONSTANT_P', so you need
+     not check this.  You can also assume FLAG_PIC is true, so you need
+     not check it either.  You need not define this macro if all
+     constants (including `SYMBOL_REF') can be immediate operands when
+     generating position independent code.
+
+
+File: gccint.info,  Node: Assembler Format,  Next: Debugging Info,  Prev: PIC,  Up: Target Macros
+
+17.21 Defining the Output Assembler Language
+============================================
+
+This section describes macros whose principal purpose is to describe how
+to write instructions in assembler language--rather than what the
+instructions do.
+
+* Menu:
+
+* File Framework::       Structural information for the assembler file.
+* Data Output::          Output of constants (numbers, strings, addresses).
+* Uninitialized Data::   Output of uninitialized variables.
+* Label Output::         Output and generation of labels.
+* Initialization::       General principles of initialization
+                         and termination routines.
+* Macros for Initialization::
+                         Specific macros that control the handling of
+                         initialization and termination routines.
+* Instruction Output::   Output of actual instructions.
+* Dispatch Tables::      Output of jump tables.
+* Exception Region Output:: Output of exception region code.
+* Alignment Output::     Pseudo ops for alignment and skipping data.
+
+
+File: gccint.info,  Node: File Framework,  Next: Data Output,  Up: Assembler Format
+
+17.21.1 The Overall Framework of an Assembler File
+--------------------------------------------------
+
+This describes the overall framework of an assembly file.
+
+ -- Target Hook: void TARGET_ASM_FILE_START (void)
+     Output to `asm_out_file' any text which the assembler expects to
+     find at the beginning of a file.  The default behavior is
+     controlled by two flags, documented below.  Unless your target's
+     assembler is quite unusual, if you override the default, you
+     should call `default_file_start' at some point in your target
+     hook.  This lets other target files rely on these variables.
+
+ -- Target Hook: bool TARGET_ASM_FILE_START_APP_OFF
+     If this flag is true, the text of the macro `ASM_APP_OFF' will be
+     printed as the very first line in the assembly file, unless
+     `-fverbose-asm' is in effect.  (If that macro has been defined to
+     the empty string, this variable has no effect.)  With the normal
+     definition of `ASM_APP_OFF', the effect is to notify the GNU
+     assembler that it need not bother stripping comments or extra
+     whitespace from its input.  This allows it to work a bit faster.
+
+     The default is false.  You should not set it to true unless you
+     have verified that your port does not generate any extra
+     whitespace or comments that will cause GAS to issue errors in
+     NO_APP mode.
+
+ -- Target Hook: bool TARGET_ASM_FILE_START_FILE_DIRECTIVE
+     If this flag is true, `output_file_directive' will be called for
+     the primary source file, immediately after printing `ASM_APP_OFF'
+     (if that is enabled).  Most ELF assemblers expect this to be done.
+     The default is false.
+
+ -- Target Hook: void TARGET_ASM_FILE_END (void)
+     Output to `asm_out_file' any text which the assembler expects to
+     find at the end of a file.  The default is to output nothing.
+
+ -- Function: void file_end_indicate_exec_stack ()
+     Some systems use a common convention, the `.note.GNU-stack'
+     special section, to indicate whether or not an object file relies
+     on the stack being executable.  If your system uses this
+     convention, you should define `TARGET_ASM_FILE_END' to this
+     function.  If you need to do other things in that hook, have your
+     hook function call this function.
+
+ -- Target Hook: void TARGET_ASM_LTO_START (void)
+     Output to `asm_out_file' any text which the assembler expects to
+     find at the start of an LTO section.  The default is to output
+     nothing.
+
+ -- Target Hook: void TARGET_ASM_LTO_END (void)
+     Output to `asm_out_file' any text which the assembler expects to
+     find at the end of an LTO section.  The default is to output
+     nothing.
+
+ -- Target Hook: void TARGET_ASM_CODE_END (void)
+     Output to `asm_out_file' any text which is needed before emitting
+     unwind info and debug info at the end of a file.  Some targets emit
+     here PIC setup thunks that cannot be emitted at the end of file,
+     because they couldn't have unwind info then.  The default is to
+     output nothing.
+
+ -- Macro: ASM_COMMENT_START
+     A C string constant describing how to begin a comment in the target
+     assembler language.  The compiler assumes that the comment will
+     end at the end of the line.
+
+ -- Macro: ASM_APP_ON
+     A C string constant for text to be output before each `asm'
+     statement or group of consecutive ones.  Normally this is
+     `"#APP"', which is a comment that has no effect on most assemblers
+     but tells the GNU assembler that it must check the lines that
+     follow for all valid assembler constructs.
+
+ -- Macro: ASM_APP_OFF
+     A C string constant for text to be output after each `asm'
+     statement or group of consecutive ones.  Normally this is
+     `"#NO_APP"', which tells the GNU assembler to resume making the
+     time-saving assumptions that are valid for ordinary compiler
+     output.
+
+ -- Macro: ASM_OUTPUT_SOURCE_FILENAME (STREAM, NAME)
+     A C statement to output COFF information or DWARF debugging
+     information which indicates that filename NAME is the current
+     source file to the stdio stream STREAM.
+
+     This macro need not be defined if the standard form of output for
+     the file format in use is appropriate.
+
+ -- Target Hook: void TARGET_ASM_OUTPUT_SOURCE_FILENAME (FILE *FILE,
+          const char *NAME)
+     Output COFF information or DWARF debugging information which
+     indicates that filename NAME is the current source file to the
+     stdio stream FILE.
+
+     This target hook need not be defined if the standard form of
+     output for the file format in use is appropriate.
+
+ -- Macro: OUTPUT_QUOTED_STRING (STREAM, STRING)
+     A C statement to output the string STRING to the stdio stream
+     STREAM.  If you do not call the function `output_quoted_string' in
+     your config files, GCC will only call it to output filenames to
+     the assembler source.  So you can use it to canonicalize the format
+     of the filename using this macro.
+
+ -- Macro: ASM_OUTPUT_IDENT (STREAM, STRING)
+     A C statement to output something to the assembler file to handle a
+     `#ident' directive containing the text STRING.  If this macro is
+     not defined, nothing is output for a `#ident' directive.
+
+ -- Target Hook: void TARGET_ASM_NAMED_SECTION (const char *NAME,
+          unsigned int FLAGS, tree DECL)
+     Output assembly directives to switch to section NAME.  The section
+     should have attributes as specified by FLAGS, which is a bit mask
+     of the `SECTION_*' flags defined in `output.h'.  If DECL is
+     non-NULL, it is the `VAR_DECL' or `FUNCTION_DECL' with which this
+     section is associated.
+
+ -- Target Hook: section * TARGET_ASM_FUNCTION_SECTION (tree DECL, enum
+          node_frequency FREQ, bool STARTUP, bool EXIT)
+     Return preferred text (sub)section for function DECL.  Main
+     purpose of this function is to separate cold, normal and hot
+     functions. STARTUP is true when function is known to be used only
+     at startup (from static constructors or it is `main()').  EXIT is
+     true when function is known to be used only at exit (from static
+     destructors).  Return NULL if function should go to default text
+     section.
+
+ -- Target Hook: void TARGET_ASM_FUNCTION_SWITCHED_TEXT_SECTIONS (FILE
+          *FILE, tree DECL, bool NEW_IS_COLD)
+     Used by the target to emit any assembler directives or additional
+     labels needed when a function is partitioned between different
+     sections.  Output should be written to FILE.  The function  decl
+     is available as DECL and the new section is `cold' if  NEW_IS_COLD
+     is `true'.
+
+ -- Target Hook: bool TARGET_HAVE_NAMED_SECTIONS
+     This flag is true if the target supports
+     `TARGET_ASM_NAMED_SECTION'.  It must not be modified by
+     command-line option processing.
+
+ -- Target Hook: bool TARGET_HAVE_SWITCHABLE_BSS_SECTIONS
+     This flag is true if we can create zeroed data by switching to a
+     BSS section and then using `ASM_OUTPUT_SKIP' to allocate the space.
+     This is true on most ELF targets.
+
+ -- Target Hook: unsigned int TARGET_SECTION_TYPE_FLAGS (tree DECL,
+          const char *NAME, int RELOC)
+     Choose a set of section attributes for use by
+     `TARGET_ASM_NAMED_SECTION' based on a variable or function decl, a
+     section name, and whether or not the declaration's initializer may
+     contain runtime relocations.  DECL may be null, in which case
+     read-write data should be assumed.
+
+     The default version of this function handles choosing code vs data,
+     read-only vs read-write data, and `flag_pic'.  You should only
+     need to override this if your target has special flags that might
+     be set via `__attribute__'.
+
+ -- Target Hook: int TARGET_ASM_RECORD_GCC_SWITCHES (print_switch_type
+          TYPE, const char *TEXT)
+     Provides the target with the ability to record the gcc command line
+     switches that have been passed to the compiler, and options that
+     are enabled.  The TYPE argument specifies what is being recorded.
+     It can take the following values:
+
+    `SWITCH_TYPE_PASSED'
+          TEXT is a command line switch that has been set by the user.
+
+    `SWITCH_TYPE_ENABLED'
+          TEXT is an option which has been enabled.  This might be as a
+          direct result of a command line switch, or because it is
+          enabled by default or because it has been enabled as a side
+          effect of a different command line switch.  For example, the
+          `-O2' switch enables various different individual
+          optimization passes.
+
+    `SWITCH_TYPE_DESCRIPTIVE'
+          TEXT is either NULL or some descriptive text which should be
+          ignored.  If TEXT is NULL then it is being used to warn the
+          target hook that either recording is starting or ending.  The
+          first time TYPE is SWITCH_TYPE_DESCRIPTIVE and TEXT is NULL,
+          the warning is for start up and the second time the warning
+          is for wind down.  This feature is to allow the target hook
+          to make any necessary preparations before it starts to record
+          switches and to perform any necessary tidying up after it has
+          finished recording switches.
+
+    `SWITCH_TYPE_LINE_START'
+          This option can be ignored by this target hook.
+
+    `SWITCH_TYPE_LINE_END'
+          This option can be ignored by this target hook.
+
+     The hook's return value must be zero.  Other return values may be
+     supported in the future.
+
+     By default this hook is set to NULL, but an example implementation
+     is provided for ELF based targets.  Called ELF_RECORD_GCC_SWITCHES,
+     it records the switches as ASCII text inside a new, string
+     mergeable section in the assembler output file.  The name of the
+     new section is provided by the
+     `TARGET_ASM_RECORD_GCC_SWITCHES_SECTION' target hook.
+
+ -- Target Hook: const char * TARGET_ASM_RECORD_GCC_SWITCHES_SECTION
+     This is the name of the section that will be created by the example
+     ELF implementation of the `TARGET_ASM_RECORD_GCC_SWITCHES' target
+     hook.
+
+
+File: gccint.info,  Node: Data Output,  Next: Uninitialized Data,  Prev: File Framework,  Up: Assembler Format
+
+17.21.2 Output of Data
+----------------------
+
+ -- Target Hook: const char * TARGET_ASM_BYTE_OP
+ -- Target Hook: const char * TARGET_ASM_ALIGNED_HI_OP
+ -- Target Hook: const char * TARGET_ASM_ALIGNED_SI_OP
+ -- Target Hook: const char * TARGET_ASM_ALIGNED_DI_OP
+ -- Target Hook: const char * TARGET_ASM_ALIGNED_TI_OP
+ -- Target Hook: const char * TARGET_ASM_UNALIGNED_HI_OP
+ -- Target Hook: const char * TARGET_ASM_UNALIGNED_SI_OP
+ -- Target Hook: const char * TARGET_ASM_UNALIGNED_DI_OP
+ -- Target Hook: const char * TARGET_ASM_UNALIGNED_TI_OP
+     These hooks specify assembly directives for creating certain kinds
+     of integer object.  The `TARGET_ASM_BYTE_OP' directive creates a
+     byte-sized object, the `TARGET_ASM_ALIGNED_HI_OP' one creates an
+     aligned two-byte object, and so on.  Any of the hooks may be
+     `NULL', indicating that no suitable directive is available.
+
+     The compiler will print these strings at the start of a new line,
+     followed immediately by the object's initial value.  In most cases,
+     the string should contain a tab, a pseudo-op, and then another tab.
+
+ -- Target Hook: bool TARGET_ASM_INTEGER (rtx X, unsigned int SIZE, int
+          ALIGNED_P)
+     The `assemble_integer' function uses this hook to output an
+     integer object.  X is the object's value, SIZE is its size in
+     bytes and ALIGNED_P indicates whether it is aligned.  The function
+     should return `true' if it was able to output the object.  If it
+     returns false, `assemble_integer' will try to split the object
+     into smaller parts.
+
+     The default implementation of this hook will use the
+     `TARGET_ASM_BYTE_OP' family of strings, returning `false' when the
+     relevant string is `NULL'.
+
+ -- Target Hook: bool TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA (FILE *FILE,
+          rtx X)
+     A target hook to recognize RTX patterns that `output_addr_const'
+     can't deal with, and output assembly code to FILE corresponding to
+     the pattern X.  This may be used to allow machine-dependent
+     `UNSPEC's to appear within constants.
+
+     If target hook fails to recognize a pattern, it must return
+     `false', so that a standard error message is printed.  If it
+     prints an error message itself, by calling, for example,
+     `output_operand_lossage', it may just return `true'.
+
+ -- Macro: OUTPUT_ADDR_CONST_EXTRA (STREAM, X, FAIL)
+     A C statement to recognize RTX patterns that `output_addr_const'
+     can't deal with, and output assembly code to STREAM corresponding
+     to the pattern X.  This may be used to allow machine-dependent
+     `UNSPEC's to appear within constants.
+
+     If `OUTPUT_ADDR_CONST_EXTRA' fails to recognize a pattern, it must
+     `goto fail', so that a standard error message is printed.  If it
+     prints an error message itself, by calling, for example,
+     `output_operand_lossage', it may just complete normally.
+
+ -- Macro: ASM_OUTPUT_ASCII (STREAM, PTR, LEN)
+     A C statement to output to the stdio stream STREAM an assembler
+     instruction to assemble a string constant containing the LEN bytes
+     at PTR.  PTR will be a C expression of type `char *' and LEN a C
+     expression of type `int'.
+
+     If the assembler has a `.ascii' pseudo-op as found in the Berkeley
+     Unix assembler, do not define the macro `ASM_OUTPUT_ASCII'.
+
+ -- Macro: ASM_OUTPUT_FDESC (STREAM, DECL, N)
+     A C statement to output word N of a function descriptor for DECL.
+     This must be defined if `TARGET_VTABLE_USES_DESCRIPTORS' is
+     defined, and is otherwise unused.
+
+ -- Macro: CONSTANT_POOL_BEFORE_FUNCTION
+     You may define this macro as a C expression.  You should define the
+     expression to have a nonzero value if GCC should output the
+     constant pool for a function before the code for the function, or
+     a zero value if GCC should output the constant pool after the
+     function.  If you do not define this macro, the usual case, GCC
+     will output the constant pool before the function.
+
+ -- Macro: ASM_OUTPUT_POOL_PROLOGUE (FILE, FUNNAME, FUNDECL, SIZE)
+     A C statement to output assembler commands to define the start of
+     the constant pool for a function.  FUNNAME is a string giving the
+     name of the function.  Should the return type of the function be
+     required, it can be obtained via FUNDECL.  SIZE is the size, in
+     bytes, of the constant pool that will be written immediately after
+     this call.
+
+     If no constant-pool prefix is required, the usual case, this macro
+     need not be defined.
+
+ -- Macro: ASM_OUTPUT_SPECIAL_POOL_ENTRY (FILE, X, MODE, ALIGN,
+          LABELNO, JUMPTO)
+     A C statement (with or without semicolon) to output a constant in
+     the constant pool, if it needs special treatment.  (This macro
+     need not do anything for RTL expressions that can be output
+     normally.)
+
+     The argument FILE is the standard I/O stream to output the
+     assembler code on.  X is the RTL expression for the constant to
+     output, and MODE is the machine mode (in case X is a `const_int').
+     ALIGN is the required alignment for the value X; you should output
+     an assembler directive to force this much alignment.
+
+     The argument LABELNO is a number to use in an internal label for
+     the address of this pool entry.  The definition of this macro is
+     responsible for outputting the label definition at the proper
+     place.  Here is how to do this:
+
+          `(*targetm.asm_out.internal_label)' (FILE, "LC", LABELNO);
+
+     When you output a pool entry specially, you should end with a
+     `goto' to the label JUMPTO.  This will prevent the same pool entry
+     from being output a second time in the usual manner.
+
+     You need not define this macro if it would do nothing.
+
+ -- Macro: ASM_OUTPUT_POOL_EPILOGUE (FILE FUNNAME FUNDECL SIZE)
+     A C statement to output assembler commands to at the end of the
+     constant pool for a function.  FUNNAME is a string giving the name
+     of the function.  Should the return type of the function be
+     required, you can obtain it via FUNDECL.  SIZE is the size, in
+     bytes, of the constant pool that GCC wrote immediately before this
+     call.
+
+     If no constant-pool epilogue is required, the usual case, you need
+     not define this macro.
+
+ -- Macro: IS_ASM_LOGICAL_LINE_SEPARATOR (C, STR)
+     Define this macro as a C expression which is nonzero if C is used
+     as a logical line separator by the assembler.  STR points to the
+     position in the string where C was found; this can be used if a
+     line separator uses multiple characters.
+
+     If you do not define this macro, the default is that only the
+     character `;' is treated as a logical line separator.
+
+ -- Target Hook: const char * TARGET_ASM_OPEN_PAREN
+ -- Target Hook: const char * TARGET_ASM_CLOSE_PAREN
+     These target hooks are C string constants, describing the syntax
+     in the assembler for grouping arithmetic expressions.  If not
+     overridden, they default to normal parentheses, which is correct
+     for most assemblers.
+
+ These macros are provided by `real.h' for writing the definitions of
+`ASM_OUTPUT_DOUBLE' and the like:
+
+ -- Macro: REAL_VALUE_TO_TARGET_SINGLE (X, L)
+ -- Macro: REAL_VALUE_TO_TARGET_DOUBLE (X, L)
+ -- Macro: REAL_VALUE_TO_TARGET_LONG_DOUBLE (X, L)
+ -- Macro: REAL_VALUE_TO_TARGET_DECIMAL32 (X, L)
+ -- Macro: REAL_VALUE_TO_TARGET_DECIMAL64 (X, L)
+ -- Macro: REAL_VALUE_TO_TARGET_DECIMAL128 (X, L)
+     These translate X, of type `REAL_VALUE_TYPE', to the target's
+     floating point representation, and store its bit pattern in the
+     variable L.  For `REAL_VALUE_TO_TARGET_SINGLE' and
+     `REAL_VALUE_TO_TARGET_DECIMAL32', this variable should be a simple
+     `long int'.  For the others, it should be an array of `long int'.
+     The number of elements in this array is determined by the size of
+     the desired target floating point data type: 32 bits of it go in
+     each `long int' array element.  Each array element holds 32 bits
+     of the result, even if `long int' is wider than 32 bits on the
+     host machine.
+
+     The array element values are designed so that you can print them
+     out using `fprintf' in the order they should appear in the target
+     machine's memory.
+
+
+File: gccint.info,  Node: Uninitialized Data,  Next: Label Output,  Prev: Data Output,  Up: Assembler Format
+
+17.21.3 Output of Uninitialized Variables
+-----------------------------------------
+
+Each of the macros in this section is used to do the whole job of
+outputting a single uninitialized variable.
+
+ -- Macro: ASM_OUTPUT_COMMON (STREAM, NAME, SIZE, ROUNDED)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM the assembler definition of a common-label named NAME whose
+     size is SIZE bytes.  The variable ROUNDED is the size rounded up
+     to whatever alignment the caller wants.  It is possible that SIZE
+     may be zero, for instance if a struct with no other member than a
+     zero-length array is defined.  In this case, the backend must
+     output a symbol definition that allocates at least one byte, both
+     so that the address of the resulting object does not compare equal
+     to any other, and because some object formats cannot even express
+     the concept of a zero-sized common symbol, as that is how they
+     represent an ordinary undefined external.
+
+     Use the expression `assemble_name (STREAM, NAME)' to output the
+     name itself; before and after that, output the additional
+     assembler syntax for defining the name, and a newline.
+
+     This macro controls how the assembler definitions of uninitialized
+     common global variables are output.
+
+ -- Macro: ASM_OUTPUT_ALIGNED_COMMON (STREAM, NAME, SIZE, ALIGNMENT)
+     Like `ASM_OUTPUT_COMMON' except takes the required alignment as a
+     separate, explicit argument.  If you define this macro, it is used
+     in place of `ASM_OUTPUT_COMMON', and gives you more flexibility in
+     handling the required alignment of the variable.  The alignment is
+     specified as the number of bits.
+
+ -- Macro: ASM_OUTPUT_ALIGNED_DECL_COMMON (STREAM, DECL, NAME, SIZE,
+          ALIGNMENT)
+     Like `ASM_OUTPUT_ALIGNED_COMMON' except that DECL of the variable
+     to be output, if there is one, or `NULL_TREE' if there is no
+     corresponding variable.  If you define this macro, GCC will use it
+     in place of both `ASM_OUTPUT_COMMON' and
+     `ASM_OUTPUT_ALIGNED_COMMON'.  Define this macro when you need to
+     see the variable's decl in order to chose what to output.
+
+ -- Macro: ASM_OUTPUT_BSS (STREAM, DECL, NAME, SIZE, ROUNDED)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM the assembler definition of uninitialized global DECL named
+     NAME whose size is SIZE bytes.  The variable ROUNDED is the size
+     rounded up to whatever alignment the caller wants.
+
+     Try to use function `asm_output_bss' defined in `varasm.c' when
+     defining this macro.  If unable, use the expression `assemble_name
+     (STREAM, NAME)' to output the name itself; before and after that,
+     output the additional assembler syntax for defining the name, and
+     a newline.
+
+     There are two ways of handling global BSS.  One is to define either
+     this macro or its aligned counterpart, `ASM_OUTPUT_ALIGNED_BSS'.
+     The other is to have `TARGET_ASM_SELECT_SECTION' return a
+     switchable BSS section (*note
+     TARGET_HAVE_SWITCHABLE_BSS_SECTIONS::).  You do not need to do
+     both.
+
+     Some languages do not have `common' data, and require a non-common
+     form of global BSS in order to handle uninitialized globals
+     efficiently.  C++ is one example of this.  However, if the target
+     does not support global BSS, the front end may choose to make
+     globals common in order to save space in the object file.
+
+ -- Macro: ASM_OUTPUT_ALIGNED_BSS (STREAM, DECL, NAME, SIZE, ALIGNMENT)
+     Like `ASM_OUTPUT_BSS' except takes the required alignment as a
+     separate, explicit argument.  If you define this macro, it is used
+     in place of `ASM_OUTPUT_BSS', and gives you more flexibility in
+     handling the required alignment of the variable.  The alignment is
+     specified as the number of bits.
+
+     Try to use function `asm_output_aligned_bss' defined in file
+     `varasm.c' when defining this macro.
+
+ -- Macro: ASM_OUTPUT_LOCAL (STREAM, NAME, SIZE, ROUNDED)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM the assembler definition of a local-common-label named NAME
+     whose size is SIZE bytes.  The variable ROUNDED is the size
+     rounded up to whatever alignment the caller wants.
+
+     Use the expression `assemble_name (STREAM, NAME)' to output the
+     name itself; before and after that, output the additional
+     assembler syntax for defining the name, and a newline.
+
+     This macro controls how the assembler definitions of uninitialized
+     static variables are output.
+
+ -- Macro: ASM_OUTPUT_ALIGNED_LOCAL (STREAM, NAME, SIZE, ALIGNMENT)
+     Like `ASM_OUTPUT_LOCAL' except takes the required alignment as a
+     separate, explicit argument.  If you define this macro, it is used
+     in place of `ASM_OUTPUT_LOCAL', and gives you more flexibility in
+     handling the required alignment of the variable.  The alignment is
+     specified as the number of bits.
+
+ -- Macro: ASM_OUTPUT_ALIGNED_DECL_LOCAL (STREAM, DECL, NAME, SIZE,
+          ALIGNMENT)
+     Like `ASM_OUTPUT_ALIGNED_DECL' except that DECL of the variable to
+     be output, if there is one, or `NULL_TREE' if there is no
+     corresponding variable.  If you define this macro, GCC will use it
+     in place of both `ASM_OUTPUT_DECL' and `ASM_OUTPUT_ALIGNED_DECL'.
+     Define this macro when you need to see the variable's decl in
+     order to chose what to output.
+
+
+File: gccint.info,  Node: Label Output,  Next: Initialization,  Prev: Uninitialized Data,  Up: Assembler Format
+
+17.21.4 Output and Generation of Labels
+---------------------------------------
+
+This is about outputting labels.
+
+ -- Macro: ASM_OUTPUT_LABEL (STREAM, NAME)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM the assembler definition of a label named NAME.  Use the
+     expression `assemble_name (STREAM, NAME)' to output the name
+     itself; before and after that, output the additional assembler
+     syntax for defining the name, and a newline.  A default definition
+     of this macro is provided which is correct for most systems.
+
+ -- Macro: ASM_OUTPUT_FUNCTION_LABEL (STREAM, NAME, DECL)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM the assembler definition of a label named NAME of a
+     function.  Use the expression `assemble_name (STREAM, NAME)' to
+     output the name itself; before and after that, output the
+     additional assembler syntax for defining the name, and a newline.
+     A default definition of this macro is provided which is correct
+     for most systems.
+
+     If this macro is not defined, then the function name is defined in
+     the usual manner as a label (by means of `ASM_OUTPUT_LABEL').
+
+ -- Macro: ASM_OUTPUT_INTERNAL_LABEL (STREAM, NAME)
+     Identical to `ASM_OUTPUT_LABEL', except that NAME is known to
+     refer to a compiler-generated label.  The default definition uses
+     `assemble_name_raw', which is like `assemble_name' except that it
+     is more efficient.
+
+ -- Macro: SIZE_ASM_OP
+     A C string containing the appropriate assembler directive to
+     specify the size of a symbol, without any arguments.  On systems
+     that use ELF, the default (in `config/elfos.h') is `"\t.size\t"';
+     on other systems, the default is not to define this macro.
+
+     Define this macro only if it is correct to use the default
+     definitions of `ASM_OUTPUT_SIZE_DIRECTIVE' and
+     `ASM_OUTPUT_MEASURED_SIZE' for your system.  If you need your own
+     custom definitions of those macros, or if you do not need explicit
+     symbol sizes at all, do not define this macro.
+
+ -- Macro: ASM_OUTPUT_SIZE_DIRECTIVE (STREAM, NAME, SIZE)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM a directive telling the assembler that the size of the
+     symbol NAME is SIZE.  SIZE is a `HOST_WIDE_INT'.  If you define
+     `SIZE_ASM_OP', a default definition of this macro is provided.
+
+ -- Macro: ASM_OUTPUT_MEASURED_SIZE (STREAM, NAME)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM a directive telling the assembler to calculate the size of
+     the symbol NAME by subtracting its address from the current
+     address.
+
+     If you define `SIZE_ASM_OP', a default definition of this macro is
+     provided.  The default assumes that the assembler recognizes a
+     special `.' symbol as referring to the current address, and can
+     calculate the difference between this and another symbol.  If your
+     assembler does not recognize `.' or cannot do calculations with
+     it, you will need to redefine `ASM_OUTPUT_MEASURED_SIZE' to use
+     some other technique.
+
+ -- Macro: TYPE_ASM_OP
+     A C string containing the appropriate assembler directive to
+     specify the type of a symbol, without any arguments.  On systems
+     that use ELF, the default (in `config/elfos.h') is `"\t.type\t"';
+     on other systems, the default is not to define this macro.
+
+     Define this macro only if it is correct to use the default
+     definition of `ASM_OUTPUT_TYPE_DIRECTIVE' for your system.  If you
+     need your own custom definition of this macro, or if you do not
+     need explicit symbol types at all, do not define this macro.
+
+ -- Macro: TYPE_OPERAND_FMT
+     A C string which specifies (using `printf' syntax) the format of
+     the second operand to `TYPE_ASM_OP'.  On systems that use ELF, the
+     default (in `config/elfos.h') is `"@%s"'; on other systems, the
+     default is not to define this macro.
+
+     Define this macro only if it is correct to use the default
+     definition of `ASM_OUTPUT_TYPE_DIRECTIVE' for your system.  If you
+     need your own custom definition of this macro, or if you do not
+     need explicit symbol types at all, do not define this macro.
+
+ -- Macro: ASM_OUTPUT_TYPE_DIRECTIVE (STREAM, TYPE)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM a directive telling the assembler that the type of the
+     symbol NAME is TYPE.  TYPE is a C string; currently, that string
+     is always either `"function"' or `"object"', but you should not
+     count on this.
+
+     If you define `TYPE_ASM_OP' and `TYPE_OPERAND_FMT', a default
+     definition of this macro is provided.
+
+ -- Macro: ASM_DECLARE_FUNCTION_NAME (STREAM, NAME, DECL)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM any text necessary for declaring the name NAME of a
+     function which is being defined.  This macro is responsible for
+     outputting the label definition (perhaps using
+     `ASM_OUTPUT_FUNCTION_LABEL').  The argument DECL is the
+     `FUNCTION_DECL' tree node representing the function.
+
+     If this macro is not defined, then the function name is defined in
+     the usual manner as a label (by means of
+     `ASM_OUTPUT_FUNCTION_LABEL').
+
+     You may wish to use `ASM_OUTPUT_TYPE_DIRECTIVE' in the definition
+     of this macro.
+
+ -- Macro: ASM_DECLARE_FUNCTION_SIZE (STREAM, NAME, DECL)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM any text necessary for declaring the size of a function
+     which is being defined.  The argument NAME is the name of the
+     function.  The argument DECL is the `FUNCTION_DECL' tree node
+     representing the function.
+
+     If this macro is not defined, then the function size is not
+     defined.
+
+     You may wish to use `ASM_OUTPUT_MEASURED_SIZE' in the definition
+     of this macro.
+
+ -- Macro: ASM_DECLARE_OBJECT_NAME (STREAM, NAME, DECL)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM any text necessary for declaring the name NAME of an
+     initialized variable which is being defined.  This macro must
+     output the label definition (perhaps using `ASM_OUTPUT_LABEL').
+     The argument DECL is the `VAR_DECL' tree node representing the
+     variable.
+
+     If this macro is not defined, then the variable name is defined in
+     the usual manner as a label (by means of `ASM_OUTPUT_LABEL').
+
+     You may wish to use `ASM_OUTPUT_TYPE_DIRECTIVE' and/or
+     `ASM_OUTPUT_SIZE_DIRECTIVE' in the definition of this macro.
+
+ -- Target Hook: void TARGET_ASM_DECLARE_CONSTANT_NAME (FILE *FILE,
+          const char *NAME, const_tree EXPR, HOST_WIDE_INT SIZE)
+     A target hook to output to the stdio stream FILE any text necessary
+     for declaring the name NAME of a constant which is being defined.
+     This target hook is responsible for outputting the label
+     definition (perhaps using `assemble_label').  The argument EXP is
+     the value of the constant, and SIZE is the size of the constant in
+     bytes.  The NAME will be an internal label.
+
+     The default version of this target hook, define the NAME in the
+     usual manner as a label (by means of `assemble_label').
+
+     You may wish to use `ASM_OUTPUT_TYPE_DIRECTIVE' in this target
+     hook.
+
+ -- Macro: ASM_DECLARE_REGISTER_GLOBAL (STREAM, DECL, REGNO, NAME)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM any text necessary for claiming a register REGNO for a
+     global variable DECL with name NAME.
+
+     If you don't define this macro, that is equivalent to defining it
+     to do nothing.
+
+ -- Macro: ASM_FINISH_DECLARE_OBJECT (STREAM, DECL, TOPLEVEL, ATEND)
+     A C statement (sans semicolon) to finish up declaring a variable
+     name once the compiler has processed its initializer fully and
+     thus has had a chance to determine the size of an array when
+     controlled by an initializer.  This is used on systems where it's
+     necessary to declare something about the size of the object.
+
+     If you don't define this macro, that is equivalent to defining it
+     to do nothing.
+
+     You may wish to use `ASM_OUTPUT_SIZE_DIRECTIVE' and/or
+     `ASM_OUTPUT_MEASURED_SIZE' in the definition of this macro.
+
+ -- Target Hook: void TARGET_ASM_GLOBALIZE_LABEL (FILE *STREAM, const
+          char *NAME)
+     This target hook is a function to output to the stdio stream
+     STREAM some commands that will make the label NAME global; that
+     is, available for reference from other files.
+
+     The default implementation relies on a proper definition of
+     `GLOBAL_ASM_OP'.
+
+ -- Target Hook: void TARGET_ASM_GLOBALIZE_DECL_NAME (FILE *STREAM,
+          tree DECL)
+     This target hook is a function to output to the stdio stream
+     STREAM some commands that will make the name associated with DECL
+     global; that is, available for reference from other files.
+
+     The default implementation uses the TARGET_ASM_GLOBALIZE_LABEL
+     target hook.
+
+ -- Macro: ASM_WEAKEN_LABEL (STREAM, NAME)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM some commands that will make the label NAME weak; that is,
+     available for reference from other files but only used if no other
+     definition is available.  Use the expression `assemble_name
+     (STREAM, NAME)' to output the name itself; before and after that,
+     output the additional assembler syntax for making that name weak,
+     and a newline.
+
+     If you don't define this macro or `ASM_WEAKEN_DECL', GCC will not
+     support weak symbols and you should not define the `SUPPORTS_WEAK'
+     macro.
+
+ -- Macro: ASM_WEAKEN_DECL (STREAM, DECL, NAME, VALUE)
+     Combines (and replaces) the function of `ASM_WEAKEN_LABEL' and
+     `ASM_OUTPUT_WEAK_ALIAS', allowing access to the associated function
+     or variable decl.  If VALUE is not `NULL', this C statement should
+     output to the stdio stream STREAM assembler code which defines
+     (equates) the weak symbol NAME to have the value VALUE.  If VALUE
+     is `NULL', it should output commands to make NAME weak.
+
+ -- Macro: ASM_OUTPUT_WEAKREF (STREAM, DECL, NAME, VALUE)
+     Outputs a directive that enables NAME to be used to refer to
+     symbol VALUE with weak-symbol semantics.  `decl' is the
+     declaration of `name'.
+
+ -- Macro: SUPPORTS_WEAK
+     A preprocessor constant expression which evaluates to true if the
+     target supports weak symbols.
+
+     If you don't define this macro, `defaults.h' provides a default
+     definition.  If either `ASM_WEAKEN_LABEL' or `ASM_WEAKEN_DECL' is
+     defined, the default definition is `1'; otherwise, it is `0'.
+
+ -- Macro: TARGET_SUPPORTS_WEAK
+     A C expression which evaluates to true if the target supports weak
+     symbols.
+
+     If you don't define this macro, `defaults.h' provides a default
+     definition.  The default definition is `(SUPPORTS_WEAK)'.  Define
+     this macro if you want to control weak symbol support with a
+     compiler flag such as `-melf'.
+
+ -- Macro: MAKE_DECL_ONE_ONLY (DECL)
+     A C statement (sans semicolon) to mark DECL to be emitted as a
+     public symbol such that extra copies in multiple translation units
+     will be discarded by the linker.  Define this macro if your object
+     file format provides support for this concept, such as the `COMDAT'
+     section flags in the Microsoft Windows PE/COFF format, and this
+     support requires changes to DECL, such as putting it in a separate
+     section.
+
+ -- Macro: SUPPORTS_ONE_ONLY
+     A C expression which evaluates to true if the target supports
+     one-only semantics.
+
+     If you don't define this macro, `varasm.c' provides a default
+     definition.  If `MAKE_DECL_ONE_ONLY' is defined, the default
+     definition is `1'; otherwise, it is `0'.  Define this macro if you
+     want to control one-only symbol support with a compiler flag, or if
+     setting the `DECL_ONE_ONLY' flag is enough to mark a declaration to
+     be emitted as one-only.
+
+ -- Target Hook: void TARGET_ASM_ASSEMBLE_VISIBILITY (tree DECL, int
+          VISIBILITY)
+     This target hook is a function to output to ASM_OUT_FILE some
+     commands that will make the symbol(s) associated with DECL have
+     hidden, protected or internal visibility as specified by
+     VISIBILITY.
+
+ -- Macro: TARGET_WEAK_NOT_IN_ARCHIVE_TOC
+     A C expression that evaluates to true if the target's linker
+     expects that weak symbols do not appear in a static archive's
+     table of contents.  The default is `0'.
+
+     Leaving weak symbols out of an archive's table of contents means
+     that, if a symbol will only have a definition in one translation
+     unit and will have undefined references from other translation
+     units, that symbol should not be weak.  Defining this macro to be
+     nonzero will thus have the effect that certain symbols that would
+     normally be weak (explicit template instantiations, and vtables
+     for polymorphic classes with noninline key methods) will instead
+     be nonweak.
+
+     The C++ ABI requires this macro to be zero.  Define this macro for
+     targets where full C++ ABI compliance is impossible and where
+     linker restrictions require weak symbols to be left out of a
+     static archive's table of contents.
+
+ -- Macro: ASM_OUTPUT_EXTERNAL (STREAM, DECL, NAME)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM any text necessary for declaring the name of an external
+     symbol named NAME which is referenced in this compilation but not
+     defined.  The value of DECL is the tree node for the declaration.
+
+     This macro need not be defined if it does not need to output
+     anything.  The GNU assembler and most Unix assemblers don't
+     require anything.
+
+ -- Target Hook: void TARGET_ASM_EXTERNAL_LIBCALL (rtx SYMREF)
+     This target hook is a function to output to ASM_OUT_FILE an
+     assembler pseudo-op to declare a library function name external.
+     The name of the library function is given by SYMREF, which is a
+     `symbol_ref'.
+
+ -- Target Hook: void TARGET_ASM_MARK_DECL_PRESERVED (const char
+          *SYMBOL)
+     This target hook is a function to output to ASM_OUT_FILE an
+     assembler directive to annotate SYMBOL as used.  The Darwin target
+     uses the .no_dead_code_strip directive.
+
+ -- Macro: ASM_OUTPUT_LABELREF (STREAM, NAME)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM a reference in assembler syntax to a label named NAME.
+     This should add `_' to the front of the name, if that is customary
+     on your operating system, as it is in most Berkeley Unix systems.
+     This macro is used in `assemble_name'.
+
+ -- Target Hook: tree TARGET_MANGLE_ASSEMBLER_NAME (const char *NAME)
+     Given a symbol NAME, perform same mangling as `varasm.c''s
+     `assemble_name', but in memory rather than to a file stream,
+     returning result as an `IDENTIFIER_NODE'.  Required for correct
+     LTO symtabs.  The default implementation calls the
+     `TARGET_STRIP_NAME_ENCODING' hook and then prepends the
+     `USER_LABEL_PREFIX', if any.
+
+ -- Macro: ASM_OUTPUT_SYMBOL_REF (STREAM, SYM)
+     A C statement (sans semicolon) to output a reference to
+     `SYMBOL_REF' SYM.  If not defined, `assemble_name' will be used to
+     output the name of the symbol.  This macro may be used to modify
+     the way a symbol is referenced depending on information encoded by
+     `TARGET_ENCODE_SECTION_INFO'.
+
+ -- Macro: ASM_OUTPUT_LABEL_REF (STREAM, BUF)
+     A C statement (sans semicolon) to output a reference to BUF, the
+     result of `ASM_GENERATE_INTERNAL_LABEL'.  If not defined,
+     `assemble_name' will be used to output the name of the symbol.
+     This macro is not used by `output_asm_label', or the `%l'
+     specifier that calls it; the intention is that this macro should
+     be set when it is necessary to output a label differently when its
+     address is being taken.
+
+ -- Target Hook: void TARGET_ASM_INTERNAL_LABEL (FILE *STREAM, const
+          char *PREFIX, unsigned long LABELNO)
+     A function to output to the stdio stream STREAM a label whose name
+     is made from the string PREFIX and the number LABELNO.
+
+     It is absolutely essential that these labels be distinct from the
+     labels used for user-level functions and variables.  Otherwise,
+     certain programs will have name conflicts with internal labels.
+
+     It is desirable to exclude internal labels from the symbol table
+     of the object file.  Most assemblers have a naming convention for
+     labels that should be excluded; on many systems, the letter `L' at
+     the beginning of a label has this effect.  You should find out what
+     convention your system uses, and follow it.
+
+     The default version of this function utilizes
+     `ASM_GENERATE_INTERNAL_LABEL'.
+
+ -- Macro: ASM_OUTPUT_DEBUG_LABEL (STREAM, PREFIX, NUM)
+     A C statement to output to the stdio stream STREAM a debug info
+     label whose name is made from the string PREFIX and the number
+     NUM.  This is useful for VLIW targets, where debug info labels may
+     need to be treated differently than branch target labels.  On some
+     systems, branch target labels must be at the beginning of
+     instruction bundles, but debug info labels can occur in the middle
+     of instruction bundles.
+
+     If this macro is not defined, then
+     `(*targetm.asm_out.internal_label)' will be used.
+
+ -- Macro: ASM_GENERATE_INTERNAL_LABEL (STRING, PREFIX, NUM)
+     A C statement to store into the string STRING a label whose name
+     is made from the string PREFIX and the number NUM.
+
+     This string, when output subsequently by `assemble_name', should
+     produce the output that `(*targetm.asm_out.internal_label)' would
+     produce with the same PREFIX and NUM.
+
+     If the string begins with `*', then `assemble_name' will output
+     the rest of the string unchanged.  It is often convenient for
+     `ASM_GENERATE_INTERNAL_LABEL' to use `*' in this way.  If the
+     string doesn't start with `*', then `ASM_OUTPUT_LABELREF' gets to
+     output the string, and may change it.  (Of course,
+     `ASM_OUTPUT_LABELREF' is also part of your machine description, so
+     you should know what it does on your machine.)
+
+ -- Macro: ASM_FORMAT_PRIVATE_NAME (OUTVAR, NAME, NUMBER)
+     A C expression to assign to OUTVAR (which is a variable of type
+     `char *') a newly allocated string made from the string NAME and
+     the number NUMBER, with some suitable punctuation added.  Use
+     `alloca' to get space for the string.
+
+     The string will be used as an argument to `ASM_OUTPUT_LABELREF' to
+     produce an assembler label for an internal static variable whose
+     name is NAME.  Therefore, the string must be such as to result in
+     valid assembler code.  The argument NUMBER is different each time
+     this macro is executed; it prevents conflicts between
+     similarly-named internal static variables in different scopes.
+
+     Ideally this string should not be a valid C identifier, to prevent
+     any conflict with the user's own symbols.  Most assemblers allow
+     periods or percent signs in assembler symbols; putting at least
+     one of these between the name and the number will suffice.
+
+     If this macro is not defined, a default definition will be provided
+     which is correct for most systems.
+
+ -- Macro: ASM_OUTPUT_DEF (STREAM, NAME, VALUE)
+     A C statement to output to the stdio stream STREAM assembler code
+     which defines (equates) the symbol NAME to have the value VALUE.
+
+     If `SET_ASM_OP' is defined, a default definition is provided which
+     is correct for most systems.
+
+ -- Macro: ASM_OUTPUT_DEF_FROM_DECLS (STREAM, DECL_OF_NAME,
+          DECL_OF_VALUE)
+     A C statement to output to the stdio stream STREAM assembler code
+     which defines (equates) the symbol whose tree node is DECL_OF_NAME
+     to have the value of the tree node DECL_OF_VALUE.  This macro will
+     be used in preference to `ASM_OUTPUT_DEF' if it is defined and if
+     the tree nodes are available.
+
+     If `SET_ASM_OP' is defined, a default definition is provided which
+     is correct for most systems.
+
+ -- Macro: TARGET_DEFERRED_OUTPUT_DEFS (DECL_OF_NAME, DECL_OF_VALUE)
+     A C statement that evaluates to true if the assembler code which
+     defines (equates) the symbol whose tree node is DECL_OF_NAME to
+     have the value of the tree node DECL_OF_VALUE should be emitted
+     near the end of the current compilation unit.  The default is to
+     not defer output of defines.  This macro affects defines output by
+     `ASM_OUTPUT_DEF' and `ASM_OUTPUT_DEF_FROM_DECLS'.
+
+ -- Macro: ASM_OUTPUT_WEAK_ALIAS (STREAM, NAME, VALUE)
+     A C statement to output to the stdio stream STREAM assembler code
+     which defines (equates) the weak symbol NAME to have the value
+     VALUE.  If VALUE is `NULL', it defines NAME as an undefined weak
+     symbol.
+
+     Define this macro if the target only supports weak aliases; define
+     `ASM_OUTPUT_DEF' instead if possible.
+
+ -- Macro: OBJC_GEN_METHOD_LABEL (BUF, IS_INST, CLASS_NAME, CAT_NAME,
+          SEL_NAME)
+     Define this macro to override the default assembler names used for
+     Objective-C methods.
+
+     The default name is a unique method number followed by the name of
+     the class (e.g. `_1_Foo').  For methods in categories, the name of
+     the category is also included in the assembler name (e.g.
+     `_1_Foo_Bar').
+
+     These names are safe on most systems, but make debugging difficult
+     since the method's selector is not present in the name.
+     Therefore, particular systems define other ways of computing names.
+
+     BUF is an expression of type `char *' which gives you a buffer in
+     which to store the name; its length is as long as CLASS_NAME,
+     CAT_NAME and SEL_NAME put together, plus 50 characters extra.
+
+     The argument IS_INST specifies whether the method is an instance
+     method or a class method; CLASS_NAME is the name of the class;
+     CAT_NAME is the name of the category (or `NULL' if the method is
+     not in a category); and SEL_NAME is the name of the selector.
+
+     On systems where the assembler can handle quoted names, you can
+     use this macro to provide more human-readable names.
+
+ -- Macro: ASM_DECLARE_CLASS_REFERENCE (STREAM, NAME)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM commands to declare that the label NAME is an Objective-C
+     class reference.  This is only needed for targets whose linkers
+     have special support for NeXT-style runtimes.
+
+ -- Macro: ASM_DECLARE_UNRESOLVED_REFERENCE (STREAM, NAME)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM commands to declare that the label NAME is an unresolved
+     Objective-C class reference.  This is only needed for targets
+     whose linkers have special support for NeXT-style runtimes.
+
+
+File: gccint.info,  Node: Initialization,  Next: Macros for Initialization,  Prev: Label Output,  Up: Assembler Format
+
+17.21.5 How Initialization Functions Are Handled
+------------------------------------------------
+
+The compiled code for certain languages includes "constructors" (also
+called "initialization routines")--functions to initialize data in the
+program when the program is started.  These functions need to be called
+before the program is "started"--that is to say, before `main' is
+called.
+
+ Compiling some languages generates "destructors" (also called
+"termination routines") that should be called when the program
+terminates.
+
+ To make the initialization and termination functions work, the compiler
+must output something in the assembler code to cause those functions to
+be called at the appropriate time.  When you port the compiler to a new
+system, you need to specify how to do this.
+
+ There are two major ways that GCC currently supports the execution of
+initialization and termination functions.  Each way has two variants.
+Much of the structure is common to all four variations.
+
+ The linker must build two lists of these functions--a list of
+initialization functions, called `__CTOR_LIST__', and a list of
+termination functions, called `__DTOR_LIST__'.
+
+ Each list always begins with an ignored function pointer (which may
+hold 0, -1, or a count of the function pointers after it, depending on
+the environment).  This is followed by a series of zero or more function
+pointers to constructors (or destructors), followed by a function
+pointer containing zero.
+
+ Depending on the operating system and its executable file format,
+either `crtstuff.c' or `libgcc2.c' traverses these lists at startup
+time and exit time.  Constructors are called in reverse order of the
+list; destructors in forward order.
+
+ The best way to handle static constructors works only for object file
+formats which provide arbitrarily-named sections.  A section is set
+aside for a list of constructors, and another for a list of destructors.
+Traditionally these are called `.ctors' and `.dtors'.  Each object file
+that defines an initialization function also puts a word in the
+constructor section to point to that function.  The linker accumulates
+all these words into one contiguous `.ctors' section.  Termination
+functions are handled similarly.
+
+ This method will be chosen as the default by `target-def.h' if
+`TARGET_ASM_NAMED_SECTION' is defined.  A target that does not support
+arbitrary sections, but does support special designated constructor and
+destructor sections may define `CTORS_SECTION_ASM_OP' and
+`DTORS_SECTION_ASM_OP' to achieve the same effect.
+
+ When arbitrary sections are available, there are two variants,
+depending upon how the code in `crtstuff.c' is called.  On systems that
+support a ".init" section which is executed at program startup, parts
+of `crtstuff.c' are compiled into that section.  The program is linked
+by the `gcc' driver like this:
+
+     ld -o OUTPUT_FILE crti.o crtbegin.o ... -lgcc crtend.o crtn.o
+
+ The prologue of a function (`__init') appears in the `.init' section
+of `crti.o'; the epilogue appears in `crtn.o'.  Likewise for the
+function `__fini' in the ".fini" section.  Normally these files are
+provided by the operating system or by the GNU C library, but are
+provided by GCC for a few targets.
+
+ The objects `crtbegin.o' and `crtend.o' are (for most targets)
+compiled from `crtstuff.c'.  They contain, among other things, code
+fragments within the `.init' and `.fini' sections that branch to
+routines in the `.text' section.  The linker will pull all parts of a
+section together, which results in a complete `__init' function that
+invokes the routines we need at startup.
+
+ To use this variant, you must define the `INIT_SECTION_ASM_OP' macro
+properly.
+
+ If no init section is available, when GCC compiles any function called
+`main' (or more accurately, any function designated as a program entry
+point by the language front end calling `expand_main_function'), it
+inserts a procedure call to `__main' as the first executable code after
+the function prologue.  The `__main' function is defined in `libgcc2.c'
+and runs the global constructors.
+
+ In file formats that don't support arbitrary sections, there are again
+two variants.  In the simplest variant, the GNU linker (GNU `ld') and
+an `a.out' format must be used.  In this case, `TARGET_ASM_CONSTRUCTOR'
+is defined to produce a `.stabs' entry of type `N_SETT', referencing
+the name `__CTOR_LIST__', and with the address of the void function
+containing the initialization code as its value.  The GNU linker
+recognizes this as a request to add the value to a "set"; the values
+are accumulated, and are eventually placed in the executable as a
+vector in the format described above, with a leading (ignored) count
+and a trailing zero element.  `TARGET_ASM_DESTRUCTOR' is handled
+similarly.  Since no init section is available, the absence of
+`INIT_SECTION_ASM_OP' causes the compilation of `main' to call `__main'
+as above, starting the initialization process.
+
+ The last variant uses neither arbitrary sections nor the GNU linker.
+This is preferable when you want to do dynamic linking and when using
+file formats which the GNU linker does not support, such as `ECOFF'.  In
+this case, `TARGET_HAVE_CTORS_DTORS' is false, initialization and
+termination functions are recognized simply by their names.  This
+requires an extra program in the linkage step, called `collect2'.  This
+program pretends to be the linker, for use with GCC; it does its job by
+running the ordinary linker, but also arranges to include the vectors of
+initialization and termination functions.  These functions are called
+via `__main' as described above.  In order to use this method,
+`use_collect2' must be defined in the target in `config.gcc'.
+
+ The following section describes the specific macros that control and
+customize the handling of initialization and termination functions.
+
+
+File: gccint.info,  Node: Macros for Initialization,  Next: Instruction Output,  Prev: Initialization,  Up: Assembler Format
+
+17.21.6 Macros Controlling Initialization Routines
+--------------------------------------------------
+
+Here are the macros that control how the compiler handles initialization
+and termination functions:
+
+ -- Macro: INIT_SECTION_ASM_OP
+     If defined, a C string constant, including spacing, for the
+     assembler operation to identify the following data as
+     initialization code.  If not defined, GCC will assume such a
+     section does not exist.  When you are using special sections for
+     initialization and termination functions, this macro also controls
+     how `crtstuff.c' and `libgcc2.c' arrange to run the initialization
+     functions.
+
+ -- Macro: HAS_INIT_SECTION
+     If defined, `main' will not call `__main' as described above.
+     This macro should be defined for systems that control start-up code
+     on a symbol-by-symbol basis, such as OSF/1, and should not be
+     defined explicitly for systems that support `INIT_SECTION_ASM_OP'.
+
+ -- Macro: LD_INIT_SWITCH
+     If defined, a C string constant for a switch that tells the linker
+     that the following symbol is an initialization routine.
+
+ -- Macro: LD_FINI_SWITCH
+     If defined, a C string constant for a switch that tells the linker
+     that the following symbol is a finalization routine.
+
+ -- Macro: COLLECT_SHARED_INIT_FUNC (STREAM, FUNC)
+     If defined, a C statement that will write a function that can be
+     automatically called when a shared library is loaded.  The function
+     should call FUNC, which takes no arguments.  If not defined, and
+     the object format requires an explicit initialization function,
+     then a function called `_GLOBAL__DI' will be generated.
+
+     This function and the following one are used by collect2 when
+     linking a shared library that needs constructors or destructors,
+     or has DWARF2 exception tables embedded in the code.
+
+ -- Macro: COLLECT_SHARED_FINI_FUNC (STREAM, FUNC)
+     If defined, a C statement that will write a function that can be
+     automatically called when a shared library is unloaded.  The
+     function should call FUNC, which takes no arguments.  If not
+     defined, and the object format requires an explicit finalization
+     function, then a function called `_GLOBAL__DD' will be generated.
+
+ -- Macro: INVOKE__main
+     If defined, `main' will call `__main' despite the presence of
+     `INIT_SECTION_ASM_OP'.  This macro should be defined for systems
+     where the init section is not actually run automatically, but is
+     still useful for collecting the lists of constructors and
+     destructors.
+
+ -- Macro: SUPPORTS_INIT_PRIORITY
+     If nonzero, the C++ `init_priority' attribute is supported and the
+     compiler should emit instructions to control the order of
+     initialization of objects.  If zero, the compiler will issue an
+     error message upon encountering an `init_priority' attribute.
+
+ -- Target Hook: bool TARGET_HAVE_CTORS_DTORS
+     This value is true if the target supports some "native" method of
+     collecting constructors and destructors to be run at startup and
+     exit.  It is false if we must use `collect2'.
+
+ -- Target Hook: void TARGET_ASM_CONSTRUCTOR (rtx SYMBOL, int PRIORITY)
+     If defined, a function that outputs assembler code to arrange to
+     call the function referenced by SYMBOL at initialization time.
+
+     Assume that SYMBOL is a `SYMBOL_REF' for a function taking no
+     arguments and with no return value.  If the target supports
+     initialization priorities, PRIORITY is a value between 0 and
+     `MAX_INIT_PRIORITY'; otherwise it must be `DEFAULT_INIT_PRIORITY'.
+
+     If this macro is not defined by the target, a suitable default will
+     be chosen if (1) the target supports arbitrary section names, (2)
+     the target defines `CTORS_SECTION_ASM_OP', or (3) `USE_COLLECT2'
+     is not defined.
+
+ -- Target Hook: void TARGET_ASM_DESTRUCTOR (rtx SYMBOL, int PRIORITY)
+     This is like `TARGET_ASM_CONSTRUCTOR' but used for termination
+     functions rather than initialization functions.
+
+ If `TARGET_HAVE_CTORS_DTORS' is true, the initialization routine
+generated for the generated object file will have static linkage.
+
+ If your system uses `collect2' as the means of processing
+constructors, then that program normally uses `nm' to scan an object
+file for constructor functions to be called.
+
+ On certain kinds of systems, you can define this macro to make
+`collect2' work faster (and, in some cases, make it work at all):
+
+ -- Macro: OBJECT_FORMAT_COFF
+     Define this macro if the system uses COFF (Common Object File
+     Format) object files, so that `collect2' can assume this format
+     and scan object files directly for dynamic constructor/destructor
+     functions.
+
+     This macro is effective only in a native compiler; `collect2' as
+     part of a cross compiler always uses `nm' for the target machine.
+
+ -- Macro: REAL_NM_FILE_NAME
+     Define this macro as a C string constant containing the file name
+     to use to execute `nm'.  The default is to search the path
+     normally for `nm'.
+
+ -- Macro: NM_FLAGS
+     `collect2' calls `nm' to scan object files for static constructors
+     and destructors and LTO info.  By default, `-n' is passed.  Define
+     `NM_FLAGS' to a C string constant if other options are needed to
+     get the same output format as GNU `nm -n' produces.
+
+ If your system supports shared libraries and has a program to list the
+dynamic dependencies of a given library or executable, you can define
+these macros to enable support for running initialization and
+termination functions in shared libraries:
+
+ -- Macro: LDD_SUFFIX
+     Define this macro to a C string constant containing the name of
+     the program which lists dynamic dependencies, like `ldd' under
+     SunOS 4.
+
+ -- Macro: PARSE_LDD_OUTPUT (PTR)
+     Define this macro to be C code that extracts filenames from the
+     output of the program denoted by `LDD_SUFFIX'.  PTR is a variable
+     of type `char *' that points to the beginning of a line of output
+     from `LDD_SUFFIX'.  If the line lists a dynamic dependency, the
+     code must advance PTR to the beginning of the filename on that
+     line.  Otherwise, it must set PTR to `NULL'.
+
+ -- Macro: SHLIB_SUFFIX
+     Define this macro to a C string constant containing the default
+     shared library extension of the target (e.g., `".so"').  `collect2'
+     strips version information after this suffix when generating global
+     constructor and destructor names.  This define is only needed on
+     targets that use `collect2' to process constructors and
+     destructors.
+
+
+File: gccint.info,  Node: Instruction Output,  Next: Dispatch Tables,  Prev: Macros for Initialization,  Up: Assembler Format
+
+17.21.7 Output of Assembler Instructions
+----------------------------------------
+
+This describes assembler instruction output.
+
+ -- Macro: REGISTER_NAMES
+     A C initializer containing the assembler's names for the machine
+     registers, each one as a C string constant.  This is what
+     translates register numbers in the compiler into assembler
+     language.
+
+ -- Macro: ADDITIONAL_REGISTER_NAMES
+     If defined, a C initializer for an array of structures containing
+     a name and a register number.  This macro defines additional names
+     for hard registers, thus allowing the `asm' option in declarations
+     to refer to registers using alternate names.
+
+ -- Macro: OVERLAPPING_REGISTER_NAMES
+     If defined, a C initializer for an array of structures containing a
+     name, a register number and a count of the number of consecutive
+     machine registers the name overlaps.  This macro defines additional
+     names for hard registers, thus allowing the `asm' option in
+     declarations to refer to registers using alternate names.  Unlike
+     `ADDITIONAL_REGISTER_NAMES', this macro should be used when the
+     register name implies multiple underlying registers.
+
+     This macro should be used when it is important that a clobber in an
+     `asm' statement clobbers all the underlying values implied by the
+     register name.  For example, on ARM, clobbering the
+     double-precision VFP register "d0" implies clobbering both
+     single-precision registers "s0" and "s1".
+
+ -- Macro: ASM_OUTPUT_OPCODE (STREAM, PTR)
+     Define this macro if you are using an unusual assembler that
+     requires different names for the machine instructions.
+
+     The definition is a C statement or statements which output an
+     assembler instruction opcode to the stdio stream STREAM.  The
+     macro-operand PTR is a variable of type `char *' which points to
+     the opcode name in its "internal" form--the form that is written
+     in the machine description.  The definition should output the
+     opcode name to STREAM, performing any translation you desire, and
+     increment the variable PTR to point at the end of the opcode so
+     that it will not be output twice.
+
+     In fact, your macro definition may process less than the entire
+     opcode name, or more than the opcode name; but if you want to
+     process text that includes `%'-sequences to substitute operands,
+     you must take care of the substitution yourself.  Just be sure to
+     increment PTR over whatever text should not be output normally.
+
+     If you need to look at the operand values, they can be found as the
+     elements of `recog_data.operand'.
+
+     If the macro definition does nothing, the instruction is output in
+     the usual way.
+
+ -- Macro: FINAL_PRESCAN_INSN (INSN, OPVEC, NOPERANDS)
+     If defined, a C statement to be executed just prior to the output
+     of assembler code for INSN, to modify the extracted operands so
+     they will be output differently.
+
+     Here the argument OPVEC is the vector containing the operands
+     extracted from INSN, and NOPERANDS is the number of elements of
+     the vector which contain meaningful data for this insn.  The
+     contents of this vector are what will be used to convert the insn
+     template into assembler code, so you can change the assembler
+     output by changing the contents of the vector.
+
+     This macro is useful when various assembler syntaxes share a single
+     file of instruction patterns; by defining this macro differently,
+     you can cause a large class of instructions to be output
+     differently (such as with rearranged operands).  Naturally,
+     variations in assembler syntax affecting individual insn patterns
+     ought to be handled by writing conditional output routines in
+     those patterns.
+
+     If this macro is not defined, it is equivalent to a null statement.
+
+ -- Target Hook: void TARGET_ASM_FINAL_POSTSCAN_INSN (FILE *FILE, rtx
+          INSN, rtx *OPVEC, int NOPERANDS)
+     If defined, this target hook is a function which is executed just
+     after the output of assembler code for INSN, to change the mode of
+     the assembler if necessary.
+
+     Here the argument OPVEC is the vector containing the operands
+     extracted from INSN, and NOPERANDS is the number of elements of
+     the vector which contain meaningful data for this insn.  The
+     contents of this vector are what was used to convert the insn
+     template into assembler code, so you can change the assembler mode
+     by checking the contents of the vector.
+
+ -- Macro: PRINT_OPERAND (STREAM, X, CODE)
+     A C compound statement to output to stdio stream STREAM the
+     assembler syntax for an instruction operand X.  X is an RTL
+     expression.
+
+     CODE is a value that can be used to specify one of several ways of
+     printing the operand.  It is used when identical operands must be
+     printed differently depending on the context.  CODE comes from the
+     `%' specification that was used to request printing of the
+     operand.  If the specification was just `%DIGIT' then CODE is 0;
+     if the specification was `%LTR DIGIT' then CODE is the ASCII code
+     for LTR.
+
+     If X is a register, this macro should print the register's name.
+     The names can be found in an array `reg_names' whose type is `char
+     *[]'.  `reg_names' is initialized from `REGISTER_NAMES'.
+
+     When the machine description has a specification `%PUNCT' (a `%'
+     followed by a punctuation character), this macro is called with a
+     null pointer for X and the punctuation character for CODE.
+
+ -- Macro: PRINT_OPERAND_PUNCT_VALID_P (CODE)
+     A C expression which evaluates to true if CODE is a valid
+     punctuation character for use in the `PRINT_OPERAND' macro.  If
+     `PRINT_OPERAND_PUNCT_VALID_P' is not defined, it means that no
+     punctuation characters (except for the standard one, `%') are used
+     in this way.
+
+ -- Macro: PRINT_OPERAND_ADDRESS (STREAM, X)
+     A C compound statement to output to stdio stream STREAM the
+     assembler syntax for an instruction operand that is a memory
+     reference whose address is X.  X is an RTL expression.
+
+     On some machines, the syntax for a symbolic address depends on the
+     section that the address refers to.  On these machines, define the
+     hook `TARGET_ENCODE_SECTION_INFO' to store the information into the
+     `symbol_ref', and then check for it here.  *Note Assembler
+     Format::.
+
+ -- Macro: DBR_OUTPUT_SEQEND (FILE)
+     A C statement, to be executed after all slot-filler instructions
+     have been output.  If necessary, call `dbr_sequence_length' to
+     determine the number of slots filled in a sequence (zero if not
+     currently outputting a sequence), to decide how many no-ops to
+     output, or whatever.
+
+     Don't define this macro if it has nothing to do, but it is helpful
+     in reading assembly output if the extent of the delay sequence is
+     made explicit (e.g. with white space).
+
+ Note that output routines for instructions with delay slots must be
+prepared to deal with not being output as part of a sequence (i.e. when
+the scheduling pass is not run, or when no slot fillers could be
+found.)  The variable `final_sequence' is null when not processing a
+sequence, otherwise it contains the `sequence' rtx being output.
+
+ -- Macro: REGISTER_PREFIX
+ -- Macro: LOCAL_LABEL_PREFIX
+ -- Macro: USER_LABEL_PREFIX
+ -- Macro: IMMEDIATE_PREFIX
+     If defined, C string expressions to be used for the `%R', `%L',
+     `%U', and `%I' options of `asm_fprintf' (see `final.c').  These
+     are useful when a single `md' file must support multiple assembler
+     formats.  In that case, the various `tm.h' files can define these
+     macros differently.
+
+ -- Macro: ASM_FPRINTF_EXTENSIONS (FILE, ARGPTR, FORMAT)
+     If defined this macro should expand to a series of `case'
+     statements which will be parsed inside the `switch' statement of
+     the `asm_fprintf' function.  This allows targets to define extra
+     printf formats which may useful when generating their assembler
+     statements.  Note that uppercase letters are reserved for future
+     generic extensions to asm_fprintf, and so are not available to
+     target specific code.  The output file is given by the parameter
+     FILE.  The varargs input pointer is ARGPTR and the rest of the
+     format string, starting the character after the one that is being
+     switched upon, is pointed to by FORMAT.
+
+ -- Macro: ASSEMBLER_DIALECT
+     If your target supports multiple dialects of assembler language
+     (such as different opcodes), define this macro as a C expression
+     that gives the numeric index of the assembler language dialect to
+     use, with zero as the first variant.
+
+     If this macro is defined, you may use constructs of the form
+          `{option0|option1|option2...}'
+     in the output templates of patterns (*note Output Template::) or
+     in the first argument of `asm_fprintf'.  This construct outputs
+     `option0', `option1', `option2', etc., if the value of
+     `ASSEMBLER_DIALECT' is zero, one, two, etc.  Any special characters
+     within these strings retain their usual meaning.  If there are
+     fewer alternatives within the braces than the value of
+     `ASSEMBLER_DIALECT', the construct outputs nothing.
+
+     If you do not define this macro, the characters `{', `|' and `}'
+     do not have any special meaning when used in templates or operands
+     to `asm_fprintf'.
+
+     Define the macros `REGISTER_PREFIX', `LOCAL_LABEL_PREFIX',
+     `USER_LABEL_PREFIX' and `IMMEDIATE_PREFIX' if you can express the
+     variations in assembler language syntax with that mechanism.
+     Define `ASSEMBLER_DIALECT' and use the `{option0|option1}' syntax
+     if the syntax variant are larger and involve such things as
+     different opcodes or operand order.
+
+ -- Macro: ASM_OUTPUT_REG_PUSH (STREAM, REGNO)
+     A C expression to output to STREAM some assembler code which will
+     push hard register number REGNO onto the stack.  The code need not
+     be optimal, since this macro is used only when profiling.
+
+ -- Macro: ASM_OUTPUT_REG_POP (STREAM, REGNO)
+     A C expression to output to STREAM some assembler code which will
+     pop hard register number REGNO off of the stack.  The code need
+     not be optimal, since this macro is used only when profiling.
+
+
+File: gccint.info,  Node: Dispatch Tables,  Next: Exception Region Output,  Prev: Instruction Output,  Up: Assembler Format
+
+17.21.8 Output of Dispatch Tables
+---------------------------------
+
+This concerns dispatch tables.
+
+ -- Macro: ASM_OUTPUT_ADDR_DIFF_ELT (STREAM, BODY, VALUE, REL)
+     A C statement to output to the stdio stream STREAM an assembler
+     pseudo-instruction to generate a difference between two labels.
+     VALUE and REL are the numbers of two internal labels.  The
+     definitions of these labels are output using
+     `(*targetm.asm_out.internal_label)', and they must be printed in
+     the same way here.  For example,
+
+          fprintf (STREAM, "\t.word L%d-L%d\n",
+                   VALUE, REL)
+
+     You must provide this macro on machines where the addresses in a
+     dispatch table are relative to the table's own address.  If
+     defined, GCC will also use this macro on all machines when
+     producing PIC.  BODY is the body of the `ADDR_DIFF_VEC'; it is
+     provided so that the mode and flags can be read.
+
+ -- Macro: ASM_OUTPUT_ADDR_VEC_ELT (STREAM, VALUE)
+     This macro should be provided on machines where the addresses in a
+     dispatch table are absolute.
+
+     The definition should be a C statement to output to the stdio
+     stream STREAM an assembler pseudo-instruction to generate a
+     reference to a label.  VALUE is the number of an internal label
+     whose definition is output using
+     `(*targetm.asm_out.internal_label)'.  For example,
+
+          fprintf (STREAM, "\t.word L%d\n", VALUE)
+
+ -- Macro: ASM_OUTPUT_CASE_LABEL (STREAM, PREFIX, NUM, TABLE)
+     Define this if the label before a jump-table needs to be output
+     specially.  The first three arguments are the same as for
+     `(*targetm.asm_out.internal_label)'; the fourth argument is the
+     jump-table which follows (a `jump_insn' containing an `addr_vec'
+     or `addr_diff_vec').
+
+     This feature is used on system V to output a `swbeg' statement for
+     the table.
+
+     If this macro is not defined, these labels are output with
+     `(*targetm.asm_out.internal_label)'.
+
+ -- Macro: ASM_OUTPUT_CASE_END (STREAM, NUM, TABLE)
+     Define this if something special must be output at the end of a
+     jump-table.  The definition should be a C statement to be executed
+     after the assembler code for the table is written.  It should write
+     the appropriate code to stdio stream STREAM.  The argument TABLE
+     is the jump-table insn, and NUM is the label-number of the
+     preceding label.
+
+     If this macro is not defined, nothing special is output at the end
+     of the jump-table.
+
+ -- Target Hook: void TARGET_ASM_EMIT_UNWIND_LABEL (FILE *STREAM, tree
+          DECL, int FOR_EH, int EMPTY)
+     This target hook emits a label at the beginning of each FDE.  It
+     should be defined on targets where FDEs need special labels, and it
+     should write the appropriate label, for the FDE associated with the
+     function declaration DECL, to the stdio stream STREAM.  The third
+     argument, FOR_EH, is a boolean: true if this is for an exception
+     table.  The fourth argument, EMPTY, is a boolean: true if this is
+     a placeholder label for an omitted FDE.
+
+     The default is that FDEs are not given nonlocal labels.
+
+ -- Target Hook: void TARGET_ASM_EMIT_EXCEPT_TABLE_LABEL (FILE *STREAM)
+     This target hook emits a label at the beginning of the exception
+     table.  It should be defined on targets where it is desirable for
+     the table to be broken up according to function.
+
+     The default is that no label is emitted.
+
+ -- Target Hook: void TARGET_ASM_EMIT_EXCEPT_PERSONALITY (rtx
+          PERSONALITY)
+     If the target implements `TARGET_ASM_UNWIND_EMIT', this hook may
+     be used to emit a directive to install a personality hook into the
+     unwind info.  This hook should not be used if dwarf2 unwind info
+     is used.
+
+ -- Target Hook: void TARGET_ASM_UNWIND_EMIT (FILE *STREAM, rtx INSN)
+     This target hook emits assembly directives required to unwind the
+     given instruction.  This is only used when
+     `TARGET_EXCEPT_UNWIND_INFO' returns `UI_TARGET'.
+
+ -- Target Hook: bool TARGET_ASM_UNWIND_EMIT_BEFORE_INSN
+     True if the `TARGET_ASM_UNWIND_EMIT' hook should be called before
+     the assembly for INSN has been emitted, false if the hook should
+     be called afterward.
+
+
+File: gccint.info,  Node: Exception Region Output,  Next: Alignment Output,  Prev: Dispatch Tables,  Up: Assembler Format
+
+17.21.9 Assembler Commands for Exception Regions
+------------------------------------------------
+
+This describes commands marking the start and the end of an exception
+region.
+
+ -- Macro: EH_FRAME_SECTION_NAME
+     If defined, a C string constant for the name of the section
+     containing exception handling frame unwind information.  If not
+     defined, GCC will provide a default definition if the target
+     supports named sections.  `crtstuff.c' uses this macro to switch
+     to the appropriate section.
+
+     You should define this symbol if your target supports DWARF 2 frame
+     unwind information and the default definition does not work.
+
+ -- Macro: EH_FRAME_IN_DATA_SECTION
+     If defined, DWARF 2 frame unwind information will be placed in the
+     data section even though the target supports named sections.  This
+     might be necessary, for instance, if the system linker does garbage
+     collection and sections cannot be marked as not to be collected.
+
+     Do not define this macro unless `TARGET_ASM_NAMED_SECTION' is also
+     defined.
+
+ -- Macro: EH_TABLES_CAN_BE_READ_ONLY
+     Define this macro to 1 if your target is such that no frame unwind
+     information encoding used with non-PIC code will ever require a
+     runtime relocation, but the linker may not support merging
+     read-only and read-write sections into a single read-write section.
+
+ -- Macro: MASK_RETURN_ADDR
+     An rtx used to mask the return address found via
+     `RETURN_ADDR_RTX', so that it does not contain any extraneous set
+     bits in it.
+
+ -- Macro: DWARF2_UNWIND_INFO
+     Define this macro to 0 if your target supports DWARF 2 frame unwind
+     information, but it does not yet work with exception handling.
+     Otherwise, if your target supports this information (if it defines
+     `INCOMING_RETURN_ADDR_RTX' and either `UNALIGNED_INT_ASM_OP' or
+     `OBJECT_FORMAT_ELF'), GCC will provide a default definition of 1.
+
+ -- Target Hook: enum unwind_info_type TARGET_EXCEPT_UNWIND_INFO
+          (struct gcc_options *OPTS)
+     This hook defines the mechanism that will be used for exception
+     handling by the target.  If the target has ABI specified unwind
+     tables, the hook should return `UI_TARGET'.  If the target is to
+     use the `setjmp'/`longjmp'-based exception handling scheme, the
+     hook should return `UI_SJLJ'.  If the target supports DWARF 2
+     frame unwind information, the hook should return `UI_DWARF2'.
+
+     A target may, if exceptions are disabled, choose to return
+     `UI_NONE'.  This may end up simplifying other parts of
+     target-specific code.  The default implementation of this hook
+     never returns `UI_NONE'.
+
+     Note that the value returned by this hook should be constant.  It
+     should not depend on anything except the command-line switches
+     described by OPTS.  In particular, the setting `UI_SJLJ' must be
+     fixed at compiler start-up as C pre-processor macros and builtin
+     functions related to exception handling are set up depending on
+     this setting.
+
+     The default implementation of the hook first honors the
+     `--enable-sjlj-exceptions' configure option, then
+     `DWARF2_UNWIND_INFO', and finally defaults to `UI_SJLJ'.  If
+     `DWARF2_UNWIND_INFO' depends on command-line options, the target
+     must define this hook so that OPTS is used correctly.
+
+ -- Target Hook: bool TARGET_UNWIND_TABLES_DEFAULT
+     This variable should be set to `true' if the target ABI requires
+     unwinding tables even when exceptions are not used.  It must not
+     be modified by command-line option processing.
+
+ -- Macro: DONT_USE_BUILTIN_SETJMP
+     Define this macro to 1 if the `setjmp'/`longjmp'-based scheme
+     should use the `setjmp'/`longjmp' functions from the C library
+     instead of the `__builtin_setjmp'/`__builtin_longjmp' machinery.
+
+ -- Macro: DWARF_CIE_DATA_ALIGNMENT
+     This macro need only be defined if the target might save registers
+     in the function prologue at an offset to the stack pointer that is
+     not aligned to `UNITS_PER_WORD'.  The definition should be the
+     negative minimum alignment if `STACK_GROWS_DOWNWARD' is defined,
+     and the positive minimum alignment otherwise.  *Note SDB and
+     DWARF::.  Only applicable if the target supports DWARF 2 frame
+     unwind information.
+
+ -- Target Hook: bool TARGET_TERMINATE_DW2_EH_FRAME_INFO
+     Contains the value true if the target should add a zero word onto
+     the end of a Dwarf-2 frame info section when used for exception
+     handling.  Default value is false if `EH_FRAME_SECTION_NAME' is
+     defined, and true otherwise.
+
+ -- Target Hook: rtx TARGET_DWARF_REGISTER_SPAN (rtx REG)
+     Given a register, this hook should return a parallel of registers
+     to represent where to find the register pieces.  Define this hook
+     if the register and its mode are represented in Dwarf in
+     non-contiguous locations, or if the register should be represented
+     in more than one register in Dwarf.  Otherwise, this hook should
+     return `NULL_RTX'.  If not defined, the default is to return
+     `NULL_RTX'.
+
+ -- Target Hook: void TARGET_INIT_DWARF_REG_SIZES_EXTRA (tree ADDRESS)
+     If some registers are represented in Dwarf-2 unwind information in
+     multiple pieces, define this hook to fill in information about the
+     sizes of those pieces in the table used by the unwinder at runtime.
+     It will be called by `expand_builtin_init_dwarf_reg_sizes' after
+     filling in a single size corresponding to each hard register;
+     ADDRESS is the address of the table.
+
+ -- Target Hook: bool TARGET_ASM_TTYPE (rtx SYM)
+     This hook is used to output a reference from a frame unwinding
+     table to the type_info object identified by SYM.  It should return
+     `true' if the reference was output.  Returning `false' will cause
+     the reference to be output using the normal Dwarf2 routines.
+
+ -- Target Hook: bool TARGET_ARM_EABI_UNWINDER
+     This flag should be set to `true' on targets that use an ARM EABI
+     based unwinding library, and `false' on other targets.  This
+     effects the format of unwinding tables, and how the unwinder in
+     entered after running a cleanup.  The default is `false'.
+
+
+File: gccint.info,  Node: Alignment Output,  Prev: Exception Region Output,  Up: Assembler Format
+
+17.21.10 Assembler Commands for Alignment
+-----------------------------------------
+
+This describes commands for alignment.
+
+ -- Macro: JUMP_ALIGN (LABEL)
+     The alignment (log base 2) to put in front of LABEL, which is a
+     common destination of jumps and has no fallthru incoming edge.
+
+     This macro need not be defined if you don't want any special
+     alignment to be done at such a time.  Most machine descriptions do
+     not currently define the macro.
+
+     Unless it's necessary to inspect the LABEL parameter, it is better
+     to set the variable ALIGN_JUMPS in the target's
+     `TARGET_OPTION_OVERRIDE'.  Otherwise, you should try to honor the
+     user's selection in ALIGN_JUMPS in a `JUMP_ALIGN' implementation.
+
+ -- Target Hook: int TARGET_ASM_JUMP_ALIGN_MAX_SKIP (rtx LABEL)
+     The maximum number of bytes to skip before LABEL when applying
+     `JUMP_ALIGN'.  This works only if `ASM_OUTPUT_MAX_SKIP_ALIGN' is
+     defined.
+
+ -- Macro: LABEL_ALIGN_AFTER_BARRIER (LABEL)
+     The alignment (log base 2) to put in front of LABEL, which follows
+     a `BARRIER'.
+
+     This macro need not be defined if you don't want any special
+     alignment to be done at such a time.  Most machine descriptions do
+     not currently define the macro.
+
+ -- Target Hook: int TARGET_ASM_LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP (rtx
+          LABEL)
+     The maximum number of bytes to skip before LABEL when applying
+     `LABEL_ALIGN_AFTER_BARRIER'.  This works only if
+     `ASM_OUTPUT_MAX_SKIP_ALIGN' is defined.
+
+ -- Macro: LOOP_ALIGN (LABEL)
+     The alignment (log base 2) to put in front of LABEL, which follows
+     a `NOTE_INSN_LOOP_BEG' note.
+
+     This macro need not be defined if you don't want any special
+     alignment to be done at such a time.  Most machine descriptions do
+     not currently define the macro.
+
+     Unless it's necessary to inspect the LABEL parameter, it is better
+     to set the variable `align_loops' in the target's
+     `TARGET_OPTION_OVERRIDE'.  Otherwise, you should try to honor the
+     user's selection in `align_loops' in a `LOOP_ALIGN' implementation.
+
+ -- Target Hook: int TARGET_ASM_LOOP_ALIGN_MAX_SKIP (rtx LABEL)
+     The maximum number of bytes to skip when applying `LOOP_ALIGN' to
+     LABEL.  This works only if `ASM_OUTPUT_MAX_SKIP_ALIGN' is defined.
+
+ -- Macro: LABEL_ALIGN (LABEL)
+     The alignment (log base 2) to put in front of LABEL.  If
+     `LABEL_ALIGN_AFTER_BARRIER' / `LOOP_ALIGN' specify a different
+     alignment, the maximum of the specified values is used.
+
+     Unless it's necessary to inspect the LABEL parameter, it is better
+     to set the variable `align_labels' in the target's
+     `TARGET_OPTION_OVERRIDE'.  Otherwise, you should try to honor the
+     user's selection in `align_labels' in a `LABEL_ALIGN'
+     implementation.
+
+ -- Target Hook: int TARGET_ASM_LABEL_ALIGN_MAX_SKIP (rtx LABEL)
+     The maximum number of bytes to skip when applying `LABEL_ALIGN' to
+     LABEL.  This works only if `ASM_OUTPUT_MAX_SKIP_ALIGN' is defined.
+
+ -- Macro: ASM_OUTPUT_SKIP (STREAM, NBYTES)
+     A C statement to output to the stdio stream STREAM an assembler
+     instruction to advance the location counter by NBYTES bytes.
+     Those bytes should be zero when loaded.  NBYTES will be a C
+     expression of type `unsigned HOST_WIDE_INT'.
+
+ -- Macro: ASM_NO_SKIP_IN_TEXT
+     Define this macro if `ASM_OUTPUT_SKIP' should not be used in the
+     text section because it fails to put zeros in the bytes that are
+     skipped.  This is true on many Unix systems, where the pseudo-op
+     to skip bytes produces no-op instructions rather than zeros when
+     used in the text section.
+
+ -- Macro: ASM_OUTPUT_ALIGN (STREAM, POWER)
+     A C statement to output to the stdio stream STREAM an assembler
+     command to advance the location counter to a multiple of 2 to the
+     POWER bytes.  POWER will be a C expression of type `int'.
+
+ -- Macro: ASM_OUTPUT_ALIGN_WITH_NOP (STREAM, POWER)
+     Like `ASM_OUTPUT_ALIGN', except that the "nop" instruction is used
+     for padding, if necessary.
+
+ -- Macro: ASM_OUTPUT_MAX_SKIP_ALIGN (STREAM, POWER, MAX_SKIP)
+     A C statement to output to the stdio stream STREAM an assembler
+     command to advance the location counter to a multiple of 2 to the
+     POWER bytes, but only if MAX_SKIP or fewer bytes are needed to
+     satisfy the alignment request.  POWER and MAX_SKIP will be a C
+     expression of type `int'.
+
+
+File: gccint.info,  Node: Debugging Info,  Next: Floating Point,  Prev: Assembler Format,  Up: Target Macros
+
+17.22 Controlling Debugging Information Format
+==============================================
+
+This describes how to specify debugging information.
+
+* Menu:
+
+* All Debuggers::      Macros that affect all debugging formats uniformly.
+* DBX Options::        Macros enabling specific options in DBX format.
+* DBX Hooks::          Hook macros for varying DBX format.
+* File Names and DBX:: Macros controlling output of file names in DBX format.
+* SDB and DWARF::      Macros for SDB (COFF) and DWARF formats.
+* VMS Debug::          Macros for VMS debug format.
+
+
+File: gccint.info,  Node: All Debuggers,  Next: DBX Options,  Up: Debugging Info
+
+17.22.1 Macros Affecting All Debugging Formats
+----------------------------------------------
+
+These macros affect all debugging formats.
+
+ -- Macro: DBX_REGISTER_NUMBER (REGNO)
+     A C expression that returns the DBX register number for the
+     compiler register number REGNO.  In the default macro provided,
+     the value of this expression will be REGNO itself.  But sometimes
+     there are some registers that the compiler knows about and DBX
+     does not, or vice versa.  In such cases, some register may need to
+     have one number in the compiler and another for DBX.
+
+     If two registers have consecutive numbers inside GCC, and they can
+     be used as a pair to hold a multiword value, then they _must_ have
+     consecutive numbers after renumbering with `DBX_REGISTER_NUMBER'.
+     Otherwise, debuggers will be unable to access such a pair, because
+     they expect register pairs to be consecutive in their own
+     numbering scheme.
+
+     If you find yourself defining `DBX_REGISTER_NUMBER' in way that
+     does not preserve register pairs, then what you must do instead is
+     redefine the actual register numbering scheme.
+
+ -- Macro: DEBUGGER_AUTO_OFFSET (X)
+     A C expression that returns the integer offset value for an
+     automatic variable having address X (an RTL expression).  The
+     default computation assumes that X is based on the frame-pointer
+     and gives the offset from the frame-pointer.  This is required for
+     targets that produce debugging output for DBX or COFF-style
+     debugging output for SDB and allow the frame-pointer to be
+     eliminated when the `-g' options is used.
+
+ -- Macro: DEBUGGER_ARG_OFFSET (OFFSET, X)
+     A C expression that returns the integer offset value for an
+     argument having address X (an RTL expression).  The nominal offset
+     is OFFSET.
+
+ -- Macro: PREFERRED_DEBUGGING_TYPE
+     A C expression that returns the type of debugging output GCC should
+     produce when the user specifies just `-g'.  Define this if you
+     have arranged for GCC to support more than one format of debugging
+     output.  Currently, the allowable values are `DBX_DEBUG',
+     `SDB_DEBUG', `DWARF_DEBUG', `DWARF2_DEBUG', `XCOFF_DEBUG',
+     `VMS_DEBUG', and `VMS_AND_DWARF2_DEBUG'.
+
+     When the user specifies `-ggdb', GCC normally also uses the value
+     of this macro to select the debugging output format, but with two
+     exceptions.  If `DWARF2_DEBUGGING_INFO' is defined, GCC uses the
+     value `DWARF2_DEBUG'.  Otherwise, if `DBX_DEBUGGING_INFO' is
+     defined, GCC uses `DBX_DEBUG'.
+
+     The value of this macro only affects the default debugging output;
+     the user can always get a specific type of output by using
+     `-gstabs', `-gcoff', `-gdwarf-2', `-gxcoff', or `-gvms'.
+
+
+File: gccint.info,  Node: DBX Options,  Next: DBX Hooks,  Prev: All Debuggers,  Up: Debugging Info
+
+17.22.2 Specific Options for DBX Output
+---------------------------------------
+
+These are specific options for DBX output.
+
+ -- Macro: DBX_DEBUGGING_INFO
+     Define this macro if GCC should produce debugging output for DBX
+     in response to the `-g' option.
+
+ -- Macro: XCOFF_DEBUGGING_INFO
+     Define this macro if GCC should produce XCOFF format debugging
+     output in response to the `-g' option.  This is a variant of DBX
+     format.
+
+ -- Macro: DEFAULT_GDB_EXTENSIONS
+     Define this macro to control whether GCC should by default generate
+     GDB's extended version of DBX debugging information (assuming
+     DBX-format debugging information is enabled at all).  If you don't
+     define the macro, the default is 1: always generate the extended
+     information if there is any occasion to.
+
+ -- Macro: DEBUG_SYMS_TEXT
+     Define this macro if all `.stabs' commands should be output while
+     in the text section.
+
+ -- Macro: ASM_STABS_OP
+     A C string constant, including spacing, naming the assembler
+     pseudo op to use instead of `"\t.stabs\t"' to define an ordinary
+     debugging symbol.  If you don't define this macro, `"\t.stabs\t"'
+     is used.  This macro applies only to DBX debugging information
+     format.
+
+ -- Macro: ASM_STABD_OP
+     A C string constant, including spacing, naming the assembler
+     pseudo op to use instead of `"\t.stabd\t"' to define a debugging
+     symbol whose value is the current location.  If you don't define
+     this macro, `"\t.stabd\t"' is used.  This macro applies only to
+     DBX debugging information format.
+
+ -- Macro: ASM_STABN_OP
+     A C string constant, including spacing, naming the assembler
+     pseudo op to use instead of `"\t.stabn\t"' to define a debugging
+     symbol with no name.  If you don't define this macro,
+     `"\t.stabn\t"' is used.  This macro applies only to DBX debugging
+     information format.
+
+ -- Macro: DBX_NO_XREFS
+     Define this macro if DBX on your system does not support the
+     construct `xsTAGNAME'.  On some systems, this construct is used to
+     describe a forward reference to a structure named TAGNAME.  On
+     other systems, this construct is not supported at all.
+
+ -- Macro: DBX_CONTIN_LENGTH
+     A symbol name in DBX-format debugging information is normally
+     continued (split into two separate `.stabs' directives) when it
+     exceeds a certain length (by default, 80 characters).  On some
+     operating systems, DBX requires this splitting; on others,
+     splitting must not be done.  You can inhibit splitting by defining
+     this macro with the value zero.  You can override the default
+     splitting-length by defining this macro as an expression for the
+     length you desire.
+
+ -- Macro: DBX_CONTIN_CHAR
+     Normally continuation is indicated by adding a `\' character to
+     the end of a `.stabs' string when a continuation follows.  To use
+     a different character instead, define this macro as a character
+     constant for the character you want to use.  Do not define this
+     macro if backslash is correct for your system.
+
+ -- Macro: DBX_STATIC_STAB_DATA_SECTION
+     Define this macro if it is necessary to go to the data section
+     before outputting the `.stabs' pseudo-op for a non-global static
+     variable.
+
+ -- Macro: DBX_TYPE_DECL_STABS_CODE
+     The value to use in the "code" field of the `.stabs' directive for
+     a typedef.  The default is `N_LSYM'.
+
+ -- Macro: DBX_STATIC_CONST_VAR_CODE
+     The value to use in the "code" field of the `.stabs' directive for
+     a static variable located in the text section.  DBX format does not
+     provide any "right" way to do this.  The default is `N_FUN'.
+
+ -- Macro: DBX_REGPARM_STABS_CODE
+     The value to use in the "code" field of the `.stabs' directive for
+     a parameter passed in registers.  DBX format does not provide any
+     "right" way to do this.  The default is `N_RSYM'.
+
+ -- Macro: DBX_REGPARM_STABS_LETTER
+     The letter to use in DBX symbol data to identify a symbol as a
+     parameter passed in registers.  DBX format does not customarily
+     provide any way to do this.  The default is `'P''.
+
+ -- Macro: DBX_FUNCTION_FIRST
+     Define this macro if the DBX information for a function and its
+     arguments should precede the assembler code for the function.
+     Normally, in DBX format, the debugging information entirely
+     follows the assembler code.
+
+ -- Macro: DBX_BLOCKS_FUNCTION_RELATIVE
+     Define this macro, with value 1, if the value of a symbol
+     describing the scope of a block (`N_LBRAC' or `N_RBRAC') should be
+     relative to the start of the enclosing function.  Normally, GCC
+     uses an absolute address.
+
+ -- Macro: DBX_LINES_FUNCTION_RELATIVE
+     Define this macro, with value 1, if the value of a symbol
+     indicating the current line number (`N_SLINE') should be relative
+     to the start of the enclosing function.  Normally, GCC uses an
+     absolute address.
+
+ -- Macro: DBX_USE_BINCL
+     Define this macro if GCC should generate `N_BINCL' and `N_EINCL'
+     stabs for included header files, as on Sun systems.  This macro
+     also directs GCC to output a type number as a pair of a file
+     number and a type number within the file.  Normally, GCC does not
+     generate `N_BINCL' or `N_EINCL' stabs, and it outputs a single
+     number for a type number.
+
+
+File: gccint.info,  Node: DBX Hooks,  Next: File Names and DBX,  Prev: DBX Options,  Up: Debugging Info
+
+17.22.3 Open-Ended Hooks for DBX Format
+---------------------------------------
+
+These are hooks for DBX format.
+
+ -- Macro: DBX_OUTPUT_LBRAC (STREAM, NAME)
+     Define this macro to say how to output to STREAM the debugging
+     information for the start of a scope level for variable names.  The
+     argument NAME is the name of an assembler symbol (for use with
+     `assemble_name') whose value is the address where the scope begins.
+
+ -- Macro: DBX_OUTPUT_RBRAC (STREAM, NAME)
+     Like `DBX_OUTPUT_LBRAC', but for the end of a scope level.
+
+ -- Macro: DBX_OUTPUT_NFUN (STREAM, LSCOPE_LABEL, DECL)
+     Define this macro if the target machine requires special handling
+     to output an `N_FUN' entry for the function DECL.
+
+ -- Macro: DBX_OUTPUT_SOURCE_LINE (STREAM, LINE, COUNTER)
+     A C statement to output DBX debugging information before code for
+     line number LINE of the current source file to the stdio stream
+     STREAM.  COUNTER is the number of time the macro was invoked,
+     including the current invocation; it is intended to generate
+     unique labels in the assembly output.
+
+     This macro should not be defined if the default output is correct,
+     or if it can be made correct by defining
+     `DBX_LINES_FUNCTION_RELATIVE'.
+
+ -- Macro: NO_DBX_FUNCTION_END
+     Some stabs encapsulation formats (in particular ECOFF), cannot
+     handle the `.stabs "",N_FUN,,0,0,Lscope-function-1' gdb dbx
+     extension construct.  On those machines, define this macro to turn
+     this feature off without disturbing the rest of the gdb extensions.
+
+ -- Macro: NO_DBX_BNSYM_ENSYM
+     Some assemblers cannot handle the `.stabd BNSYM/ENSYM,0,0' gdb dbx
+     extension construct.  On those machines, define this macro to turn
+     this feature off without disturbing the rest of the gdb extensions.
+
+
+File: gccint.info,  Node: File Names and DBX,  Next: SDB and DWARF,  Prev: DBX Hooks,  Up: Debugging Info
+
+17.22.4 File Names in DBX Format
+--------------------------------
+
+This describes file names in DBX format.
+
+ -- Macro: DBX_OUTPUT_MAIN_SOURCE_FILENAME (STREAM, NAME)
+     A C statement to output DBX debugging information to the stdio
+     stream STREAM, which indicates that file NAME is the main source
+     file--the file specified as the input file for compilation.  This
+     macro is called only once, at the beginning of compilation.
+
+     This macro need not be defined if the standard form of output for
+     DBX debugging information is appropriate.
+
+     It may be necessary to refer to a label equal to the beginning of
+     the text section.  You can use `assemble_name (stream,
+     ltext_label_name)' to do so.  If you do this, you must also set
+     the variable USED_LTEXT_LABEL_NAME to `true'.
+
+ -- Macro: NO_DBX_MAIN_SOURCE_DIRECTORY
+     Define this macro, with value 1, if GCC should not emit an
+     indication of the current directory for compilation and current
+     source language at the beginning of the file.
+
+ -- Macro: NO_DBX_GCC_MARKER
+     Define this macro, with value 1, if GCC should not emit an
+     indication that this object file was compiled by GCC.  The default
+     is to emit an `N_OPT' stab at the beginning of every source file,
+     with `gcc2_compiled.' for the string and value 0.
+
+ -- Macro: DBX_OUTPUT_MAIN_SOURCE_FILE_END (STREAM, NAME)
+     A C statement to output DBX debugging information at the end of
+     compilation of the main source file NAME.  Output should be
+     written to the stdio stream STREAM.
+
+     If you don't define this macro, nothing special is output at the
+     end of compilation, which is correct for most machines.
+
+ -- Macro: DBX_OUTPUT_NULL_N_SO_AT_MAIN_SOURCE_FILE_END
+     Define this macro _instead of_ defining
+     `DBX_OUTPUT_MAIN_SOURCE_FILE_END', if what needs to be output at
+     the end of compilation is an `N_SO' stab with an empty string,
+     whose value is the highest absolute text address in the file.
+
+
+File: gccint.info,  Node: SDB and DWARF,  Next: VMS Debug,  Prev: File Names and DBX,  Up: Debugging Info
+
+17.22.5 Macros for SDB and DWARF Output
+---------------------------------------
+
+Here are macros for SDB and DWARF output.
+
+ -- Macro: SDB_DEBUGGING_INFO
+     Define this macro if GCC should produce COFF-style debugging output
+     for SDB in response to the `-g' option.
+
+ -- Macro: DWARF2_DEBUGGING_INFO
+     Define this macro if GCC should produce dwarf version 2 format
+     debugging output in response to the `-g' option.
+
+      -- Target Hook: int TARGET_DWARF_CALLING_CONVENTION (const_tree
+               FUNCTION)
+          Define this to enable the dwarf attribute
+          `DW_AT_calling_convention' to be emitted for each function.
+          Instead of an integer return the enum value for the `DW_CC_'
+          tag.
+
+     To support optional call frame debugging information, you must also
+     define `INCOMING_RETURN_ADDR_RTX' and either set
+     `RTX_FRAME_RELATED_P' on the prologue insns if you use RTL for the
+     prologue, or call `dwarf2out_def_cfa' and `dwarf2out_reg_save' as
+     appropriate from `TARGET_ASM_FUNCTION_PROLOGUE' if you don't.
+
+ -- Macro: DWARF2_FRAME_INFO
+     Define this macro to a nonzero value if GCC should always output
+     Dwarf 2 frame information.  If `TARGET_EXCEPT_UNWIND_INFO' (*note
+     Exception Region Output::) returns `UI_DWARF2', and exceptions are
+     enabled, GCC will output this information not matter how you
+     define `DWARF2_FRAME_INFO'.
+
+ -- Target Hook: enum unwind_info_type TARGET_DEBUG_UNWIND_INFO (void)
+     This hook defines the mechanism that will be used for describing
+     frame unwind information to the debugger.  Normally the hook will
+     return `UI_DWARF2' if DWARF 2 debug information is enabled, and
+     return `UI_NONE' otherwise.
+
+     A target may return `UI_DWARF2' even when DWARF 2 debug information
+     is disabled in order to always output DWARF 2 frame information.
+
+     A target may return `UI_TARGET' if it has ABI specified unwind
+     tables.  This will suppress generation of the normal debug frame
+     unwind information.
+
+ -- Macro: DWARF2_ASM_LINE_DEBUG_INFO
+     Define this macro to be a nonzero value if the assembler can
+     generate Dwarf 2 line debug info sections.  This will result in
+     much more compact line number tables, and hence is desirable if it
+     works.
+
+ -- Target Hook: bool TARGET_WANT_DEBUG_PUB_SECTIONS
+     True if the `.debug_pubtypes' and `.debug_pubnames' sections
+     should be emitted.  These sections are not used on most platforms,
+     and in particular GDB does not use them.
+
+ -- Target Hook: bool TARGET_DELAY_SCHED2
+     True if sched2 is not to be run at its normal place.  This usually
+     means it will be run as part of machine-specific reorg.
+
+ -- Target Hook: bool TARGET_DELAY_VARTRACK
+     True if vartrack is not to be run at its normal place.  This
+     usually means it will be run as part of machine-specific reorg.
+
+ -- Macro: ASM_OUTPUT_DWARF_DELTA (STREAM, SIZE, LABEL1, LABEL2)
+     A C statement to issue assembly directives that create a difference
+     LAB1 minus LAB2, using an integer of the given SIZE.
+
+ -- Macro: ASM_OUTPUT_DWARF_VMS_DELTA (STREAM, SIZE, LABEL1, LABEL2)
+     A C statement to issue assembly directives that create a difference
+     between the two given labels in system defined units, e.g.
+     instruction slots on IA64 VMS, using an integer of the given size.
+
+ -- Macro: ASM_OUTPUT_DWARF_OFFSET (STREAM, SIZE, LABEL, SECTION)
+     A C statement to issue assembly directives that create a
+     section-relative reference to the given LABEL, using an integer of
+     the given SIZE.  The label is known to be defined in the given
+     SECTION.
+
+ -- Macro: ASM_OUTPUT_DWARF_PCREL (STREAM, SIZE, LABEL)
+     A C statement to issue assembly directives that create a
+     self-relative reference to the given LABEL, using an integer of
+     the given SIZE.
+
+ -- Macro: ASM_OUTPUT_DWARF_TABLE_REF (LABEL)
+     A C statement to issue assembly directives that create a reference
+     to the DWARF table identifier LABEL from the current section.  This
+     is used on some systems to avoid garbage collecting a DWARF table
+     which is referenced by a function.
+
+ -- Target Hook: void TARGET_ASM_OUTPUT_DWARF_DTPREL (FILE *FILE, int
+          SIZE, rtx X)
+     If defined, this target hook is a function which outputs a
+     DTP-relative reference to the given TLS symbol of the specified
+     size.
+
+ -- Macro: PUT_SDB_...
+     Define these macros to override the assembler syntax for the
+     special SDB assembler directives.  See `sdbout.c' for a list of
+     these macros and their arguments.  If the standard syntax is used,
+     you need not define them yourself.
+
+ -- Macro: SDB_DELIM
+     Some assemblers do not support a semicolon as a delimiter, even
+     between SDB assembler directives.  In that case, define this macro
+     to be the delimiter to use (usually `\n').  It is not necessary to
+     define a new set of `PUT_SDB_OP' macros if this is the only change
+     required.
+
+ -- Macro: SDB_ALLOW_UNKNOWN_REFERENCES
+     Define this macro to allow references to unknown structure, union,
+     or enumeration tags to be emitted.  Standard COFF does not allow
+     handling of unknown references, MIPS ECOFF has support for it.
+
+ -- Macro: SDB_ALLOW_FORWARD_REFERENCES
+     Define this macro to allow references to structure, union, or
+     enumeration tags that have not yet been seen to be handled.  Some
+     assemblers choke if forward tags are used, while some require it.
+
+ -- Macro: SDB_OUTPUT_SOURCE_LINE (STREAM, LINE)
+     A C statement to output SDB debugging information before code for
+     line number LINE of the current source file to the stdio stream
+     STREAM.  The default is to emit an `.ln' directive.
+
+
+File: gccint.info,  Node: VMS Debug,  Prev: SDB and DWARF,  Up: Debugging Info
+
+17.22.6 Macros for VMS Debug Format
+-----------------------------------
+
+Here are macros for VMS debug format.
+
+ -- Macro: VMS_DEBUGGING_INFO
+     Define this macro if GCC should produce debugging output for VMS
+     in response to the `-g' option.  The default behavior for VMS is
+     to generate minimal debug info for a traceback in the absence of
+     `-g' unless explicitly overridden with `-g0'.  This behavior is
+     controlled by `TARGET_OPTION_OPTIMIZATION' and
+     `TARGET_OPTION_OVERRIDE'.
+
+
+File: gccint.info,  Node: Floating Point,  Next: Mode Switching,  Prev: Debugging Info,  Up: Target Macros
+
+17.23 Cross Compilation and Floating Point
+==========================================
+
+While all modern machines use twos-complement representation for
+integers, there are a variety of representations for floating point
+numbers.  This means that in a cross-compiler the representation of
+floating point numbers in the compiled program may be different from
+that used in the machine doing the compilation.
+
+ Because different representation systems may offer different amounts of
+range and precision, all floating point constants must be represented in
+the target machine's format.  Therefore, the cross compiler cannot
+safely use the host machine's floating point arithmetic; it must emulate
+the target's arithmetic.  To ensure consistency, GCC always uses
+emulation to work with floating point values, even when the host and
+target floating point formats are identical.
+
+ The following macros are provided by `real.h' for the compiler to use.
+All parts of the compiler which generate or optimize floating-point
+calculations must use these macros.  They may evaluate their operands
+more than once, so operands must not have side effects.
+
+ -- Macro: REAL_VALUE_TYPE
+     The C data type to be used to hold a floating point value in the
+     target machine's format.  Typically this is a `struct' containing
+     an array of `HOST_WIDE_INT', but all code should treat it as an
+     opaque quantity.
+
+ -- Macro: int REAL_VALUES_EQUAL (REAL_VALUE_TYPE X, REAL_VALUE_TYPE Y)
+     Compares for equality the two values, X and Y.  If the target
+     floating point format supports negative zeroes and/or NaNs,
+     `REAL_VALUES_EQUAL (-0.0, 0.0)' is true, and `REAL_VALUES_EQUAL
+     (NaN, NaN)' is false.
+
+ -- Macro: int REAL_VALUES_LESS (REAL_VALUE_TYPE X, REAL_VALUE_TYPE Y)
+     Tests whether X is less than Y.
+
+ -- Macro: HOST_WIDE_INT REAL_VALUE_FIX (REAL_VALUE_TYPE X)
+     Truncates X to a signed integer, rounding toward zero.
+
+ -- Macro: unsigned HOST_WIDE_INT REAL_VALUE_UNSIGNED_FIX
+          (REAL_VALUE_TYPE X)
+     Truncates X to an unsigned integer, rounding toward zero.  If X is
+     negative, returns zero.
+
+ -- Macro: REAL_VALUE_TYPE REAL_VALUE_ATOF (const char *STRING, enum
+          machine_mode MODE)
+     Converts STRING into a floating point number in the target
+     machine's representation for mode MODE.  This routine can handle
+     both decimal and hexadecimal floating point constants, using the
+     syntax defined by the C language for both.
+
+ -- Macro: int REAL_VALUE_NEGATIVE (REAL_VALUE_TYPE X)
+     Returns 1 if X is negative (including negative zero), 0 otherwise.
+
+ -- Macro: int REAL_VALUE_ISINF (REAL_VALUE_TYPE X)
+     Determines whether X represents infinity (positive or negative).
+
+ -- Macro: int REAL_VALUE_ISNAN (REAL_VALUE_TYPE X)
+     Determines whether X represents a "NaN" (not-a-number).
+
+ -- Macro: void REAL_ARITHMETIC (REAL_VALUE_TYPE OUTPUT, enum tree_code
+          CODE, REAL_VALUE_TYPE X, REAL_VALUE_TYPE Y)
+     Calculates an arithmetic operation on the two floating point values
+     X and Y, storing the result in OUTPUT (which must be a variable).
+
+     The operation to be performed is specified by CODE.  Only the
+     following codes are supported: `PLUS_EXPR', `MINUS_EXPR',
+     `MULT_EXPR', `RDIV_EXPR', `MAX_EXPR', `MIN_EXPR'.
+
+     If `REAL_ARITHMETIC' is asked to evaluate division by zero and the
+     target's floating point format cannot represent infinity, it will
+     call `abort'.  Callers should check for this situation first, using
+     `MODE_HAS_INFINITIES'.  *Note Storage Layout::.
+
+ -- Macro: REAL_VALUE_TYPE REAL_VALUE_NEGATE (REAL_VALUE_TYPE X)
+     Returns the negative of the floating point value X.
+
+ -- Macro: REAL_VALUE_TYPE REAL_VALUE_ABS (REAL_VALUE_TYPE X)
+     Returns the absolute value of X.
+
+ -- Macro: REAL_VALUE_TYPE REAL_VALUE_TRUNCATE (REAL_VALUE_TYPE MODE,
+          enum machine_mode X)
+     Truncates the floating point value X to fit in MODE.  The return
+     value is still a full-size `REAL_VALUE_TYPE', but it has an
+     appropriate bit pattern to be output as a floating constant whose
+     precision accords with mode MODE.
+
+ -- Macro: void REAL_VALUE_TO_INT (HOST_WIDE_INT LOW, HOST_WIDE_INT
+          HIGH, REAL_VALUE_TYPE X)
+     Converts a floating point value X into a double-precision integer
+     which is then stored into LOW and HIGH.  If the value is not
+     integral, it is truncated.
+
+ -- Macro: void REAL_VALUE_FROM_INT (REAL_VALUE_TYPE X, HOST_WIDE_INT
+          LOW, HOST_WIDE_INT HIGH, enum machine_mode MODE)
+     Converts a double-precision integer found in LOW and HIGH, into a
+     floating point value which is then stored into X.  The value is
+     truncated to fit in mode MODE.
+
+
+File: gccint.info,  Node: Mode Switching,  Next: Target Attributes,  Prev: Floating Point,  Up: Target Macros
+
+17.24 Mode Switching Instructions
+=================================
+
+The following macros control mode switching optimizations:
+
+ -- Macro: OPTIMIZE_MODE_SWITCHING (ENTITY)
+     Define this macro if the port needs extra instructions inserted
+     for mode switching in an optimizing compilation.
+
+     For an example, the SH4 can perform both single and double
+     precision floating point operations, but to perform a single
+     precision operation, the FPSCR PR bit has to be cleared, while for
+     a double precision operation, this bit has to be set.  Changing
+     the PR bit requires a general purpose register as a scratch
+     register, hence these FPSCR sets have to be inserted before
+     reload, i.e. you can't put this into instruction emitting or
+     `TARGET_MACHINE_DEPENDENT_REORG'.
+
+     You can have multiple entities that are mode-switched, and select
+     at run time which entities actually need it.
+     `OPTIMIZE_MODE_SWITCHING' should return nonzero for any ENTITY
+     that needs mode-switching.  If you define this macro, you also
+     have to define `NUM_MODES_FOR_MODE_SWITCHING', `MODE_NEEDED',
+     `MODE_PRIORITY_TO_MODE' and `EMIT_MODE_SET'.  `MODE_AFTER',
+     `MODE_ENTRY', and `MODE_EXIT' are optional.
+
+ -- Macro: NUM_MODES_FOR_MODE_SWITCHING
+     If you define `OPTIMIZE_MODE_SWITCHING', you have to define this as
+     initializer for an array of integers.  Each initializer element N
+     refers to an entity that needs mode switching, and specifies the
+     number of different modes that might need to be set for this
+     entity.  The position of the initializer in the
+     initializer--starting counting at zero--determines the integer
+     that is used to refer to the mode-switched entity in question.  In
+     macros that take mode arguments / yield a mode result, modes are
+     represented as numbers 0 ... N - 1.  N is used to specify that no
+     mode switch is needed / supplied.
+
+ -- Macro: MODE_NEEDED (ENTITY, INSN)
+     ENTITY is an integer specifying a mode-switched entity.  If
+     `OPTIMIZE_MODE_SWITCHING' is defined, you must define this macro to
+     return an integer value not larger than the corresponding element
+     in `NUM_MODES_FOR_MODE_SWITCHING', to denote the mode that ENTITY
+     must be switched into prior to the execution of INSN.
+
+ -- Macro: MODE_AFTER (MODE, INSN)
+     If this macro is defined, it is evaluated for every INSN during
+     mode switching.  It determines the mode that an insn results in (if
+     different from the incoming mode).
+
+ -- Macro: MODE_ENTRY (ENTITY)
+     If this macro is defined, it is evaluated for every ENTITY that
+     needs mode switching.  It should evaluate to an integer, which is
+     a mode that ENTITY is assumed to be switched to at function entry.
+     If `MODE_ENTRY' is defined then `MODE_EXIT' must be defined.
+
+ -- Macro: MODE_EXIT (ENTITY)
+     If this macro is defined, it is evaluated for every ENTITY that
+     needs mode switching.  It should evaluate to an integer, which is
+     a mode that ENTITY is assumed to be switched to at function exit.
+     If `MODE_EXIT' is defined then `MODE_ENTRY' must be defined.
+
+ -- Macro: MODE_PRIORITY_TO_MODE (ENTITY, N)
+     This macro specifies the order in which modes for ENTITY are
+     processed.  0 is the highest priority,
+     `NUM_MODES_FOR_MODE_SWITCHING[ENTITY] - 1' the lowest.  The value
+     of the macro should be an integer designating a mode for ENTITY.
+     For any fixed ENTITY, `mode_priority_to_mode' (ENTITY, N) shall be
+     a bijection in 0 ...  `num_modes_for_mode_switching[ENTITY] - 1'.
+
+ -- Macro: EMIT_MODE_SET (ENTITY, MODE, HARD_REGS_LIVE)
+     Generate one or more insns to set ENTITY to MODE.  HARD_REG_LIVE
+     is the set of hard registers live at the point where the insn(s)
+     are to be inserted.
+
+
+File: gccint.info,  Node: Target Attributes,  Next: Emulated TLS,  Prev: Mode Switching,  Up: Target Macros
+
+17.25 Defining target-specific uses of `__attribute__'
+======================================================
+
+Target-specific attributes may be defined for functions, data and types.
+These are described using the following target hooks; they also need to
+be documented in `extend.texi'.
+
+ -- Target Hook: const struct attribute_spec * TARGET_ATTRIBUTE_TABLE
+     If defined, this target hook points to an array of `struct
+     attribute_spec' (defined in `tree.h') specifying the machine
+     specific attributes for this target and some of the restrictions
+     on the entities to which these attributes are applied and the
+     arguments they take.
+
+ -- Target Hook: bool TARGET_ATTRIBUTE_TAKES_IDENTIFIER_P (const_tree
+          NAME)
+     If defined, this target hook is a function which returns true if
+     the machine-specific attribute named NAME expects an identifier
+     given as its first argument to be passed on as a plain identifier,
+     not subjected to name lookup.  If this is not defined, the default
+     is false for all machine-specific attributes.
+
+ -- Target Hook: int TARGET_COMP_TYPE_ATTRIBUTES (const_tree TYPE1,
+          const_tree TYPE2)
+     If defined, this target hook is a function which returns zero if
+     the attributes on TYPE1 and TYPE2 are incompatible, one if they
+     are compatible, and two if they are nearly compatible (which
+     causes a warning to be generated).  If this is not defined,
+     machine-specific attributes are supposed always to be compatible.
+
+ -- Target Hook: void TARGET_SET_DEFAULT_TYPE_ATTRIBUTES (tree TYPE)
+     If defined, this target hook is a function which assigns default
+     attributes to the newly defined TYPE.
+
+ -- Target Hook: tree TARGET_MERGE_TYPE_ATTRIBUTES (tree TYPE1, tree
+          TYPE2)
+     Define this target hook if the merging of type attributes needs
+     special handling.  If defined, the result is a list of the combined
+     `TYPE_ATTRIBUTES' of TYPE1 and TYPE2.  It is assumed that
+     `comptypes' has already been called and returned 1.  This function
+     may call `merge_attributes' to handle machine-independent merging.
+
+ -- Target Hook: tree TARGET_MERGE_DECL_ATTRIBUTES (tree OLDDECL, tree
+          NEWDECL)
+     Define this target hook if the merging of decl attributes needs
+     special handling.  If defined, the result is a list of the combined
+     `DECL_ATTRIBUTES' of OLDDECL and NEWDECL.  NEWDECL is a duplicate
+     declaration of OLDDECL.  Examples of when this is needed are when
+     one attribute overrides another, or when an attribute is nullified
+     by a subsequent definition.  This function may call
+     `merge_attributes' to handle machine-independent merging.
+
+     If the only target-specific handling you require is `dllimport'
+     for Microsoft Windows targets, you should define the macro
+     `TARGET_DLLIMPORT_DECL_ATTRIBUTES' to `1'.  The compiler will then
+     define a function called `merge_dllimport_decl_attributes' which
+     can then be defined as the expansion of
+     `TARGET_MERGE_DECL_ATTRIBUTES'.  You can also add
+     `handle_dll_attribute' in the attribute table for your port to
+     perform initial processing of the `dllimport' and `dllexport'
+     attributes.  This is done in `i386/cygwin.h' and `i386/i386.c',
+     for example.
+
+ -- Target Hook: bool TARGET_VALID_DLLIMPORT_ATTRIBUTE_P (const_tree
+          DECL)
+     DECL is a variable or function with `__attribute__((dllimport))'
+     specified.  Use this hook if the target needs to add extra
+     validation checks to `handle_dll_attribute'.
+
+ -- Macro: TARGET_DECLSPEC
+     Define this macro to a nonzero value if you want to treat
+     `__declspec(X)' as equivalent to `__attribute((X))'.  By default,
+     this behavior is enabled only for targets that define
+     `TARGET_DLLIMPORT_DECL_ATTRIBUTES'.  The current implementation of
+     `__declspec' is via a built-in macro, but you should not rely on
+     this implementation detail.
+
+ -- Target Hook: void TARGET_INSERT_ATTRIBUTES (tree NODE, tree
+          *ATTR_PTR)
+     Define this target hook if you want to be able to add attributes
+     to a decl when it is being created.  This is normally useful for
+     back ends which wish to implement a pragma by using the attributes
+     which correspond to the pragma's effect.  The NODE argument is the
+     decl which is being created.  The ATTR_PTR argument is a pointer
+     to the attribute list for this decl.  The list itself should not
+     be modified, since it may be shared with other decls, but
+     attributes may be chained on the head of the list and `*ATTR_PTR'
+     modified to point to the new attributes, or a copy of the list may
+     be made if further changes are needed.
+
+ -- Target Hook: bool TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P (const_tree
+          FNDECL)
+     This target hook returns `true' if it is ok to inline FNDECL into
+     the current function, despite its having target-specific
+     attributes, `false' otherwise.  By default, if a function has a
+     target specific attribute attached to it, it will not be inlined.
+
+ -- Target Hook: bool TARGET_OPTION_VALID_ATTRIBUTE_P (tree FNDECL,
+          tree NAME, tree ARGS, int FLAGS)
+     This hook is called to parse the `attribute(option("..."))', and
+     it allows the function to set different target machine compile time
+     options for the current function that might be different than the
+     options specified on the command line.  The hook should return
+     `true' if the options are valid.
+
+     The hook should set the DECL_FUNCTION_SPECIFIC_TARGET field in the
+     function declaration to hold a pointer to a target specific STRUCT
+     CL_TARGET_OPTION structure.
+
+ -- Target Hook: void TARGET_OPTION_SAVE (struct cl_target_option *PTR)
+     This hook is called to save any additional target specific
+     information in the STRUCT CL_TARGET_OPTION structure for function
+     specific options.  *Note Option file format::.
+
+ -- Target Hook: void TARGET_OPTION_RESTORE (struct cl_target_option
+          *PTR)
+     This hook is called to restore any additional target specific
+     information in the STRUCT CL_TARGET_OPTION structure for function
+     specific options.
+
+ -- Target Hook: void TARGET_OPTION_PRINT (FILE *FILE, int INDENT,
+          struct cl_target_option *PTR)
+     This hook is called to print any additional target specific
+     information in the STRUCT CL_TARGET_OPTION structure for function
+     specific options.
+
+ -- Target Hook: bool TARGET_OPTION_PRAGMA_PARSE (tree ARGS, tree
+          POP_TARGET)
+     This target hook parses the options for `#pragma GCC option' to
+     set the machine specific options for functions that occur later in
+     the input stream.  The options should be the same as handled by the
+     `TARGET_OPTION_VALID_ATTRIBUTE_P' hook.
+
+ -- Target Hook: void TARGET_OPTION_OVERRIDE (void)
+     Sometimes certain combinations of command options do not make
+     sense on a particular target machine.  You can override the hook
+     `TARGET_OPTION_OVERRIDE' to take account of this.  This hooks is
+     called once just after all the command options have been parsed.
+
+     Don't use this hook to turn on various extra optimizations for
+     `-O'.  That is what `TARGET_OPTION_OPTIMIZATION' is for.
+
+     If you need to do something whenever the optimization level is
+     changed via the optimize attribute or pragma, see
+     `TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE'
+
+ -- Target Hook: bool TARGET_CAN_INLINE_P (tree CALLER, tree CALLEE)
+     This target hook returns `false' if the CALLER function cannot
+     inline CALLEE, based on target specific information.  By default,
+     inlining is not allowed if the callee function has function
+     specific target options and the caller does not use the same
+     options.
+
+
+File: gccint.info,  Node: Emulated TLS,  Next: MIPS Coprocessors,  Prev: Target Attributes,  Up: Target Macros
+
+17.26 Emulating TLS
+===================
+
+For targets whose psABI does not provide Thread Local Storage via
+specific relocations and instruction sequences, an emulation layer is
+used.  A set of target hooks allows this emulation layer to be
+configured for the requirements of a particular target.  For instance
+the psABI may in fact specify TLS support in terms of an emulation
+layer.
+
+ The emulation layer works by creating a control object for every TLS
+object.  To access the TLS object, a lookup function is provided which,
+when given the address of the control object, will return the address
+of the current thread's instance of the TLS object.
+
+ -- Target Hook: const char * TARGET_EMUTLS_GET_ADDRESS
+     Contains the name of the helper function that uses a TLS control
+     object to locate a TLS instance.  The default causes libgcc's
+     emulated TLS helper function to be used.
+
+ -- Target Hook: const char * TARGET_EMUTLS_REGISTER_COMMON
+     Contains the name of the helper function that should be used at
+     program startup to register TLS objects that are implicitly
+     initialized to zero.  If this is `NULL', all TLS objects will have
+     explicit initializers.  The default causes libgcc's emulated TLS
+     registration function to be used.
+
+ -- Target Hook: const char * TARGET_EMUTLS_VAR_SECTION
+     Contains the name of the section in which TLS control variables
+     should be placed.  The default of `NULL' allows these to be placed
+     in any section.
+
+ -- Target Hook: const char * TARGET_EMUTLS_TMPL_SECTION
+     Contains the name of the section in which TLS initializers should
+     be placed.  The default of `NULL' allows these to be placed in any
+     section.
+
+ -- Target Hook: const char * TARGET_EMUTLS_VAR_PREFIX
+     Contains the prefix to be prepended to TLS control variable names.
+     The default of `NULL' uses a target-specific prefix.
+
+ -- Target Hook: const char * TARGET_EMUTLS_TMPL_PREFIX
+     Contains the prefix to be prepended to TLS initializer objects.
+     The default of `NULL' uses a target-specific prefix.
+
+ -- Target Hook: tree TARGET_EMUTLS_VAR_FIELDS (tree TYPE, tree *NAME)
+     Specifies a function that generates the FIELD_DECLs for a TLS
+     control object type.  TYPE is the RECORD_TYPE the fields are for
+     and NAME should be filled with the structure tag, if the default of
+     `__emutls_object' is unsuitable.  The default creates a type
+     suitable for libgcc's emulated TLS function.
+
+ -- Target Hook: tree TARGET_EMUTLS_VAR_INIT (tree VAR, tree DECL, tree
+          TMPL_ADDR)
+     Specifies a function that generates the CONSTRUCTOR to initialize a
+     TLS control object.  VAR is the TLS control object, DECL is the
+     TLS object and TMPL_ADDR is the address of the initializer.  The
+     default initializes libgcc's emulated TLS control object.
+
+ -- Target Hook: bool TARGET_EMUTLS_VAR_ALIGN_FIXED
+     Specifies whether the alignment of TLS control variable objects is
+     fixed and should not be increased as some backends may do to
+     optimize single objects.  The default is false.
+
+ -- Target Hook: bool TARGET_EMUTLS_DEBUG_FORM_TLS_ADDRESS
+     Specifies whether a DWARF `DW_OP_form_tls_address' location
+     descriptor may be used to describe emulated TLS control objects.
+
+
+File: gccint.info,  Node: MIPS Coprocessors,  Next: PCH Target,  Prev: Emulated TLS,  Up: Target Macros
+
+17.27 Defining coprocessor specifics for MIPS targets.
+======================================================
+
+The MIPS specification allows MIPS implementations to have as many as 4
+coprocessors, each with as many as 32 private registers.  GCC supports
+accessing these registers and transferring values between the registers
+and memory using asm-ized variables.  For example:
+
+       register unsigned int cp0count asm ("c0r1");
+       unsigned int d;
+
+       d = cp0count + 3;
+
+ ("c0r1" is the default name of register 1 in coprocessor 0; alternate
+names may be added as described below, or the default names may be
+overridden entirely in `SUBTARGET_CONDITIONAL_REGISTER_USAGE'.)
+
+ Coprocessor registers are assumed to be epilogue-used; sets to them
+will be preserved even if it does not appear that the register is used
+again later in the function.
+
+ Another note: according to the MIPS spec, coprocessor 1 (if present) is
+the FPU.  One accesses COP1 registers through standard mips
+floating-point support; they are not included in this mechanism.
+
+ There is one macro used in defining the MIPS coprocessor interface
+which you may want to override in subtargets; it is described below.
+
+ -- Macro: ALL_COP_ADDITIONAL_REGISTER_NAMES
+     A comma-separated list (with leading comma) of pairs describing the
+     alternate names of coprocessor registers.  The format of each
+     entry should be
+          { ALTERNATENAME, REGISTER_NUMBER}
+     Default: empty.
+
+
+File: gccint.info,  Node: PCH Target,  Next: C++ ABI,  Prev: MIPS Coprocessors,  Up: Target Macros
+
+17.28 Parameters for Precompiled Header Validity Checking
+=========================================================
+
+ -- Target Hook: void * TARGET_GET_PCH_VALIDITY (size_t *SZ)
+     This hook returns a pointer to the data needed by
+     `TARGET_PCH_VALID_P' and sets `*SZ' to the size of the data in
+     bytes.
+
+ -- Target Hook: const char * TARGET_PCH_VALID_P (const void *DATA,
+          size_t SZ)
+     This hook checks whether the options used to create a PCH file are
+     compatible with the current settings.  It returns `NULL' if so and
+     a suitable error message if not.  Error messages will be presented
+     to the user and must be localized using `_(MSG)'.
+
+     DATA is the data that was returned by `TARGET_GET_PCH_VALIDITY'
+     when the PCH file was created and SZ is the size of that data in
+     bytes.  It's safe to assume that the data was created by the same
+     version of the compiler, so no format checking is needed.
+
+     The default definition of `default_pch_valid_p' should be suitable
+     for most targets.
+
+ -- Target Hook: const char * TARGET_CHECK_PCH_TARGET_FLAGS (int
+          PCH_FLAGS)
+     If this hook is nonnull, the default implementation of
+     `TARGET_PCH_VALID_P' will use it to check for compatible values of
+     `target_flags'.  PCH_FLAGS specifies the value that `target_flags'
+     had when the PCH file was created.  The return value is the same
+     as for `TARGET_PCH_VALID_P'.
+
+
+File: gccint.info,  Node: C++ ABI,  Next: Named Address Spaces,  Prev: PCH Target,  Up: Target Macros
+
+17.29 C++ ABI parameters
+========================
+
+ -- Target Hook: tree TARGET_CXX_GUARD_TYPE (void)
+     Define this hook to override the integer type used for guard
+     variables.  These are used to implement one-time construction of
+     static objects.  The default is long_long_integer_type_node.
+
+ -- Target Hook: bool TARGET_CXX_GUARD_MASK_BIT (void)
+     This hook determines how guard variables are used.  It should
+     return `false' (the default) if the first byte should be used.  A
+     return value of `true' indicates that only the least significant
+     bit should be used.
+
+ -- Target Hook: tree TARGET_CXX_GET_COOKIE_SIZE (tree TYPE)
+     This hook returns the size of the cookie to use when allocating an
+     array whose elements have the indicated TYPE.  Assumes that it is
+     already known that a cookie is needed.  The default is `max(sizeof
+     (size_t), alignof(type))', as defined in section 2.7 of the
+     IA64/Generic C++ ABI.
+
+ -- Target Hook: bool TARGET_CXX_COOKIE_HAS_SIZE (void)
+     This hook should return `true' if the element size should be
+     stored in array cookies.  The default is to return `false'.
+
+ -- Target Hook: int TARGET_CXX_IMPORT_EXPORT_CLASS (tree TYPE, int
+          IMPORT_EXPORT)
+     If defined by a backend this hook allows the decision made to
+     export class TYPE to be overruled.  Upon entry IMPORT_EXPORT will
+     contain 1 if the class is going to be exported, -1 if it is going
+     to be imported and 0 otherwise.  This function should return the
+     modified value and perform any other actions necessary to support
+     the backend's targeted operating system.
+
+ -- Target Hook: bool TARGET_CXX_CDTOR_RETURNS_THIS (void)
+     This hook should return `true' if constructors and destructors
+     return the address of the object created/destroyed.  The default
+     is to return `false'.
+
+ -- Target Hook: bool TARGET_CXX_KEY_METHOD_MAY_BE_INLINE (void)
+     This hook returns true if the key method for a class (i.e., the
+     method which, if defined in the current translation unit, causes
+     the virtual table to be emitted) may be an inline function.  Under
+     the standard Itanium C++ ABI the key method may be an inline
+     function so long as the function is not declared inline in the
+     class definition.  Under some variants of the ABI, an inline
+     function can never be the key method.  The default is to return
+     `true'.
+
+ -- Target Hook: void TARGET_CXX_DETERMINE_CLASS_DATA_VISIBILITY (tree
+          DECL)
+     DECL is a virtual table, virtual table table, typeinfo object, or
+     other similar implicit class data object that will be emitted with
+     external linkage in this translation unit.  No ELF visibility has
+     been explicitly specified.  If the target needs to specify a
+     visibility other than that of the containing class, use this hook
+     to set `DECL_VISIBILITY' and `DECL_VISIBILITY_SPECIFIED'.
+
+ -- Target Hook: bool TARGET_CXX_CLASS_DATA_ALWAYS_COMDAT (void)
+     This hook returns true (the default) if virtual tables and other
+     similar implicit class data objects are always COMDAT if they have
+     external linkage.  If this hook returns false, then class data for
+     classes whose virtual table will be emitted in only one translation
+     unit will not be COMDAT.
+
+ -- Target Hook: bool TARGET_CXX_LIBRARY_RTTI_COMDAT (void)
+     This hook returns true (the default) if the RTTI information for
+     the basic types which is defined in the C++ runtime should always
+     be COMDAT, false if it should not be COMDAT.
+
+ -- Target Hook: bool TARGET_CXX_USE_AEABI_ATEXIT (void)
+     This hook returns true if `__aeabi_atexit' (as defined by the ARM
+     EABI) should be used to register static destructors when
+     `-fuse-cxa-atexit' is in effect.  The default is to return false
+     to use `__cxa_atexit'.
+
+ -- Target Hook: bool TARGET_CXX_USE_ATEXIT_FOR_CXA_ATEXIT (void)
+     This hook returns true if the target `atexit' function can be used
+     in the same manner as `__cxa_atexit' to register C++ static
+     destructors. This requires that `atexit'-registered functions in
+     shared libraries are run in the correct order when the libraries
+     are unloaded. The default is to return false.
+
+ -- Target Hook: void TARGET_CXX_ADJUST_CLASS_AT_DEFINITION (tree TYPE)
+     TYPE is a C++ class (i.e., RECORD_TYPE or UNION_TYPE) that has
+     just been defined.  Use this hook to make adjustments to the class
+     (eg, tweak visibility or perform any other required target
+     modifications).
+
+
+File: gccint.info,  Node: Named Address Spaces,  Next: Misc,  Prev: C++ ABI,  Up: Target Macros
+
+17.30 Adding support for named address spaces
+=============================================
+
+The draft technical report of the ISO/IEC JTC1 S22 WG14 N1275 standards
+committee, `Programming Languages - C - Extensions to support embedded
+processors', specifies a syntax for embedded processors to specify
+alternate address spaces.  You can configure a GCC port to support
+section 5.1 of the draft report to add support for address spaces other
+than the default address space.  These address spaces are new keywords
+that are similar to the `volatile' and `const' type attributes.
+
+ Pointers to named address spaces can have a different size than
+pointers to the generic address space.
+
+ For example, the SPU port uses the `__ea' address space to refer to
+memory in the host processor, rather than memory local to the SPU
+processor.  Access to memory in the `__ea' address space involves
+issuing DMA operations to move data between the host processor and the
+local processor memory address space.  Pointers in the `__ea' address
+space are either 32 bits or 64 bits based on the `-mea32' or `-mea64'
+switches (native SPU pointers are always 32 bits).
+
+ Internally, address spaces are represented as a small integer in the
+range 0 to 15 with address space 0 being reserved for the generic
+address space.
+
+ To register a named address space qualifier keyword with the C front
+end, the target may call the `c_register_addr_space' routine.  For
+example, the SPU port uses the following to declare `__ea' as the
+keyword for named address space #1:
+     #define ADDR_SPACE_EA 1
+     c_register_addr_space ("__ea", ADDR_SPACE_EA);
+
+ -- Target Hook: enum machine_mode TARGET_ADDR_SPACE_POINTER_MODE
+          (addr_space_t ADDRESS_SPACE)
+     Define this to return the machine mode to use for pointers to
+     ADDRESS_SPACE if the target supports named address spaces.  The
+     default version of this hook returns `ptr_mode' for the generic
+     address space only.
+
+ -- Target Hook: enum machine_mode TARGET_ADDR_SPACE_ADDRESS_MODE
+          (addr_space_t ADDRESS_SPACE)
+     Define this to return the machine mode to use for addresses in
+     ADDRESS_SPACE if the target supports named address spaces.  The
+     default version of this hook returns `Pmode' for the generic
+     address space only.
+
+ -- Target Hook: bool TARGET_ADDR_SPACE_VALID_POINTER_MODE (enum
+          machine_mode MODE, addr_space_t AS)
+     Define this to return nonzero if the port can handle pointers with
+     machine mode MODE to address space AS.  This target hook is the
+     same as the `TARGET_VALID_POINTER_MODE' target hook, except that
+     it includes explicit named address space support.  The default
+     version of this hook returns true for the modes returned by either
+     the `TARGET_ADDR_SPACE_POINTER_MODE' or
+     `TARGET_ADDR_SPACE_ADDRESS_MODE' target hooks for the given
+     address space.
+
+ -- Target Hook: bool TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P (enum
+          machine_mode MODE, rtx EXP, bool STRICT, addr_space_t AS)
+     Define this to return true if EXP is a valid address for mode MODE
+     in the named address space AS.  The STRICT parameter says whether
+     strict addressing is in effect after reload has finished.  This
+     target hook is the same as the `TARGET_LEGITIMATE_ADDRESS_P'
+     target hook, except that it includes explicit named address space
+     support.
+
+ -- Target Hook: rtx TARGET_ADDR_SPACE_LEGITIMIZE_ADDRESS (rtx X, rtx
+          OLDX, enum machine_mode MODE, addr_space_t AS)
+     Define this to modify an invalid address X to be a valid address
+     with mode MODE in the named address space AS.  This target hook is
+     the same as the `TARGET_LEGITIMIZE_ADDRESS' target hook, except
+     that it includes explicit named address space support.
+
+ -- Target Hook: bool TARGET_ADDR_SPACE_SUBSET_P (addr_space_t
+          SUPERSET, addr_space_t SUBSET)
+     Define this to return whether the SUBSET named address space is
+     contained within the SUPERSET named address space.  Pointers to a
+     named address space that is a subset of another named address space
+     will be converted automatically without a cast if used together in
+     arithmetic operations.  Pointers to a superset address space can be
+     converted to pointers to a subset address space via explicit casts.
+
+ -- Target Hook: rtx TARGET_ADDR_SPACE_CONVERT (rtx OP, tree FROM_TYPE,
+          tree TO_TYPE)
+     Define this to convert the pointer expression represented by the
+     RTL OP with type FROM_TYPE that points to a named address space to
+     a new pointer expression with type TO_TYPE that points to a
+     different named address space.  When this hook it called, it is
+     guaranteed that one of the two address spaces is a subset of the
+     other, as determined by the `TARGET_ADDR_SPACE_SUBSET_P' target
+     hook.
+
+
+File: gccint.info,  Node: Misc,  Prev: Named Address Spaces,  Up: Target Macros
+
+17.31 Miscellaneous Parameters
+==============================
+
+Here are several miscellaneous parameters.
+
+ -- Macro: HAS_LONG_COND_BRANCH
+     Define this boolean macro to indicate whether or not your
+     architecture has conditional branches that can span all of memory.
+     It is used in conjunction with an optimization that partitions hot
+     and cold basic blocks into separate sections of the executable.
+     If this macro is set to false, gcc will convert any conditional
+     branches that attempt to cross between sections into unconditional
+     branches or indirect jumps.
+
+ -- Macro: HAS_LONG_UNCOND_BRANCH
+     Define this boolean macro to indicate whether or not your
+     architecture has unconditional branches that can span all of
+     memory.  It is used in conjunction with an optimization that
+     partitions hot and cold basic blocks into separate sections of the
+     executable.  If this macro is set to false, gcc will convert any
+     unconditional branches that attempt to cross between sections into
+     indirect jumps.
+
+ -- Macro: CASE_VECTOR_MODE
+     An alias for a machine mode name.  This is the machine mode that
+     elements of a jump-table should have.
+
+ -- Macro: CASE_VECTOR_SHORTEN_MODE (MIN_OFFSET, MAX_OFFSET, BODY)
+     Optional: return the preferred mode for an `addr_diff_vec' when
+     the minimum and maximum offset are known.  If you define this, it
+     enables extra code in branch shortening to deal with
+     `addr_diff_vec'.  To make this work, you also have to define
+     `INSN_ALIGN' and make the alignment for `addr_diff_vec' explicit.
+     The BODY argument is provided so that the offset_unsigned and scale
+     flags can be updated.
+
+ -- Macro: CASE_VECTOR_PC_RELATIVE
+     Define this macro to be a C expression to indicate when jump-tables
+     should contain relative addresses.  You need not define this macro
+     if jump-tables never contain relative addresses, or jump-tables
+     should contain relative addresses only when `-fPIC' or `-fPIC' is
+     in effect.
+
+ -- Target Hook: unsigned int TARGET_CASE_VALUES_THRESHOLD (void)
+     This function return the smallest number of different values for
+     which it is best to use a jump-table instead of a tree of
+     conditional branches.  The default is four for machines with a
+     `casesi' instruction and five otherwise.  This is best for most
+     machines.
+
+ -- Macro: CASE_USE_BIT_TESTS
+     Define this macro to be a C expression to indicate whether C switch
+     statements may be implemented by a sequence of bit tests.  This is
+     advantageous on processors that can efficiently implement left
+     shift of 1 by the number of bits held in a register, but
+     inappropriate on targets that would require a loop.  By default,
+     this macro returns `true' if the target defines an `ashlsi3'
+     pattern, and `false' otherwise.
+
+ -- Macro: WORD_REGISTER_OPERATIONS
+     Define this macro if operations between registers with integral
+     mode smaller than a word are always performed on the entire
+     register.  Most RISC machines have this property and most CISC
+     machines do not.
+
+ -- Macro: LOAD_EXTEND_OP (MEM_MODE)
+     Define this macro to be a C expression indicating when insns that
+     read memory in MEM_MODE, an integral mode narrower than a word,
+     set the bits outside of MEM_MODE to be either the sign-extension
+     or the zero-extension of the data read.  Return `SIGN_EXTEND' for
+     values of MEM_MODE for which the insn sign-extends, `ZERO_EXTEND'
+     for which it zero-extends, and `UNKNOWN' for other modes.
+
+     This macro is not called with MEM_MODE non-integral or with a width
+     greater than or equal to `BITS_PER_WORD', so you may return any
+     value in this case.  Do not define this macro if it would always
+     return `UNKNOWN'.  On machines where this macro is defined, you
+     will normally define it as the constant `SIGN_EXTEND' or
+     `ZERO_EXTEND'.
+
+     You may return a non-`UNKNOWN' value even if for some hard
+     registers the sign extension is not performed, if for the
+     `REGNO_REG_CLASS' of these hard registers
+     `CANNOT_CHANGE_MODE_CLASS' returns nonzero when the FROM mode is
+     MEM_MODE and the TO mode is any integral mode larger than this but
+     not larger than `word_mode'.
+
+     You must return `UNKNOWN' if for some hard registers that allow
+     this mode, `CANNOT_CHANGE_MODE_CLASS' says that they cannot change
+     to `word_mode', but that they can change to another integral mode
+     that is larger then MEM_MODE but still smaller than `word_mode'.
+
+ -- Macro: SHORT_IMMEDIATES_SIGN_EXTEND
+     Define this macro if loading short immediate values into registers
+     sign extends.
+
+ -- Macro: FIXUNS_TRUNC_LIKE_FIX_TRUNC
+     Define this macro if the same instructions that convert a floating
+     point number to a signed fixed point number also convert validly
+     to an unsigned one.
+
+ -- Target Hook: unsigned int TARGET_MIN_DIVISIONS_FOR_RECIP_MUL (enum
+          machine_mode MODE)
+     When `-ffast-math' is in effect, GCC tries to optimize divisions
+     by the same divisor, by turning them into multiplications by the
+     reciprocal.  This target hook specifies the minimum number of
+     divisions that should be there for GCC to perform the optimization
+     for a variable of mode MODE.  The default implementation returns 3
+     if the machine has an instruction for the division, and 2 if it
+     does not.
+
+ -- Macro: MOVE_MAX
+     The maximum number of bytes that a single instruction can move
+     quickly between memory and registers or between two memory
+     locations.
+
+ -- Macro: MAX_MOVE_MAX
+     The maximum number of bytes that a single instruction can move
+     quickly between memory and registers or between two memory
+     locations.  If this is undefined, the default is `MOVE_MAX'.
+     Otherwise, it is the constant value that is the largest value that
+     `MOVE_MAX' can have at run-time.
+
+ -- Macro: SHIFT_COUNT_TRUNCATED
+     A C expression that is nonzero if on this machine the number of
+     bits actually used for the count of a shift operation is equal to
+     the number of bits needed to represent the size of the object
+     being shifted.  When this macro is nonzero, the compiler will
+     assume that it is safe to omit a sign-extend, zero-extend, and
+     certain bitwise `and' instructions that truncates the count of a
+     shift operation.  On machines that have instructions that act on
+     bit-fields at variable positions, which may include `bit test'
+     instructions, a nonzero `SHIFT_COUNT_TRUNCATED' also enables
+     deletion of truncations of the values that serve as arguments to
+     bit-field instructions.
+
+     If both types of instructions truncate the count (for shifts) and
+     position (for bit-field operations), or if no variable-position
+     bit-field instructions exist, you should define this macro.
+
+     However, on some machines, such as the 80386 and the 680x0,
+     truncation only applies to shift operations and not the (real or
+     pretended) bit-field operations.  Define `SHIFT_COUNT_TRUNCATED'
+     to be zero on such machines.  Instead, add patterns to the `md'
+     file that include the implied truncation of the shift instructions.
+
+     You need not define this macro if it would always have the value
+     of zero.
+
+ -- Target Hook: unsigned HOST_WIDE_INT TARGET_SHIFT_TRUNCATION_MASK
+          (enum machine_mode MODE)
+     This function describes how the standard shift patterns for MODE
+     deal with shifts by negative amounts or by more than the width of
+     the mode.  *Note shift patterns::.
+
+     On many machines, the shift patterns will apply a mask M to the
+     shift count, meaning that a fixed-width shift of X by Y is
+     equivalent to an arbitrary-width shift of X by Y & M.  If this is
+     true for mode MODE, the function should return M, otherwise it
+     should return 0.  A return value of 0 indicates that no particular
+     behavior is guaranteed.
+
+     Note that, unlike `SHIFT_COUNT_TRUNCATED', this function does
+     _not_ apply to general shift rtxes; it applies only to instructions
+     that are generated by the named shift patterns.
+
+     The default implementation of this function returns
+     `GET_MODE_BITSIZE (MODE) - 1' if `SHIFT_COUNT_TRUNCATED' and 0
+     otherwise.  This definition is always safe, but if
+     `SHIFT_COUNT_TRUNCATED' is false, and some shift patterns
+     nevertheless truncate the shift count, you may get better code by
+     overriding it.
+
+ -- Macro: TRULY_NOOP_TRUNCATION (OUTPREC, INPREC)
+     A C expression which is nonzero if on this machine it is safe to
+     "convert" an integer of INPREC bits to one of OUTPREC bits (where
+     OUTPREC is smaller than INPREC) by merely operating on it as if it
+     had only OUTPREC bits.
+
+     On many machines, this expression can be 1.
+
+     When `TRULY_NOOP_TRUNCATION' returns 1 for a pair of sizes for
+     modes for which `MODES_TIEABLE_P' is 0, suboptimal code can result.
+     If this is the case, making `TRULY_NOOP_TRUNCATION' return 0 in
+     such cases may improve things.
+
+ -- Target Hook: int TARGET_MODE_REP_EXTENDED (enum machine_mode MODE,
+          enum machine_mode REP_MODE)
+     The representation of an integral mode can be such that the values
+     are always extended to a wider integral mode.  Return
+     `SIGN_EXTEND' if values of MODE are represented in sign-extended
+     form to REP_MODE.  Return `UNKNOWN' otherwise.  (Currently, none
+     of the targets use zero-extended representation this way so unlike
+     `LOAD_EXTEND_OP', `TARGET_MODE_REP_EXTENDED' is expected to return
+     either `SIGN_EXTEND' or `UNKNOWN'.  Also no target extends MODE to
+     REP_MODE so that REP_MODE is not the next widest integral mode and
+     currently we take advantage of this fact.)
+
+     Similarly to `LOAD_EXTEND_OP' you may return a non-`UNKNOWN' value
+     even if the extension is not performed on certain hard registers
+     as long as for the `REGNO_REG_CLASS' of these hard registers
+     `CANNOT_CHANGE_MODE_CLASS' returns nonzero.
+
+     Note that `TARGET_MODE_REP_EXTENDED' and `LOAD_EXTEND_OP' describe
+     two related properties.  If you define `TARGET_MODE_REP_EXTENDED
+     (mode, word_mode)' you probably also want to define
+     `LOAD_EXTEND_OP (mode)' to return the same type of extension.
+
+     In order to enforce the representation of `mode',
+     `TRULY_NOOP_TRUNCATION' should return false when truncating to
+     `mode'.
+
+ -- Macro: STORE_FLAG_VALUE
+     A C expression describing the value returned by a comparison
+     operator with an integral mode and stored by a store-flag
+     instruction (`cstoreMODE4') when the condition is true.  This
+     description must apply to _all_ the `cstoreMODE4' patterns and all
+     the comparison operators whose results have a `MODE_INT' mode.
+
+     A value of 1 or -1 means that the instruction implementing the
+     comparison operator returns exactly 1 or -1 when the comparison is
+     true and 0 when the comparison is false.  Otherwise, the value
+     indicates which bits of the result are guaranteed to be 1 when the
+     comparison is true.  This value is interpreted in the mode of the
+     comparison operation, which is given by the mode of the first
+     operand in the `cstoreMODE4' pattern.  Either the low bit or the
+     sign bit of `STORE_FLAG_VALUE' be on.  Presently, only those bits
+     are used by the compiler.
+
+     If `STORE_FLAG_VALUE' is neither 1 or -1, the compiler will
+     generate code that depends only on the specified bits.  It can also
+     replace comparison operators with equivalent operations if they
+     cause the required bits to be set, even if the remaining bits are
+     undefined.  For example, on a machine whose comparison operators
+     return an `SImode' value and where `STORE_FLAG_VALUE' is defined as
+     `0x80000000', saying that just the sign bit is relevant, the
+     expression
+
+          (ne:SI (and:SI X (const_int POWER-OF-2)) (const_int 0))
+
+     can be converted to
+
+          (ashift:SI X (const_int N))
+
+     where N is the appropriate shift count to move the bit being
+     tested into the sign bit.
+
+     There is no way to describe a machine that always sets the
+     low-order bit for a true value, but does not guarantee the value
+     of any other bits, but we do not know of any machine that has such
+     an instruction.  If you are trying to port GCC to such a machine,
+     include an instruction to perform a logical-and of the result with
+     1 in the pattern for the comparison operators and let us know at
+     <gcc@gcc.gnu.org>.
+
+     Often, a machine will have multiple instructions that obtain a
+     value from a comparison (or the condition codes).  Here are rules
+     to guide the choice of value for `STORE_FLAG_VALUE', and hence the
+     instructions to be used:
+
+        * Use the shortest sequence that yields a valid definition for
+          `STORE_FLAG_VALUE'.  It is more efficient for the compiler to
+          "normalize" the value (convert it to, e.g., 1 or 0) than for
+          the comparison operators to do so because there may be
+          opportunities to combine the normalization with other
+          operations.
+
+        * For equal-length sequences, use a value of 1 or -1, with -1
+          being slightly preferred on machines with expensive jumps and
+          1 preferred on other machines.
+
+        * As a second choice, choose a value of `0x80000001' if
+          instructions exist that set both the sign and low-order bits
+          but do not define the others.
+
+        * Otherwise, use a value of `0x80000000'.
+
+     Many machines can produce both the value chosen for
+     `STORE_FLAG_VALUE' and its negation in the same number of
+     instructions.  On those machines, you should also define a pattern
+     for those cases, e.g., one matching
+
+          (set A (neg:M (ne:M B C)))
+
+     Some machines can also perform `and' or `plus' operations on
+     condition code values with less instructions than the corresponding
+     `cstoreMODE4' insn followed by `and' or `plus'.  On those
+     machines, define the appropriate patterns.  Use the names `incscc'
+     and `decscc', respectively, for the patterns which perform `plus'
+     or `minus' operations on condition code values.  See `rs6000.md'
+     for some examples.  The GNU Superoptimizer can be used to find
+     such instruction sequences on other machines.
+
+     If this macro is not defined, the default value, 1, is used.  You
+     need not define `STORE_FLAG_VALUE' if the machine has no store-flag
+     instructions, or if the value generated by these instructions is 1.
+
+ -- Macro: FLOAT_STORE_FLAG_VALUE (MODE)
+     A C expression that gives a nonzero `REAL_VALUE_TYPE' value that is
+     returned when comparison operators with floating-point results are
+     true.  Define this macro on machines that have comparison
+     operations that return floating-point values.  If there are no
+     such operations, do not define this macro.
+
+ -- Macro: VECTOR_STORE_FLAG_VALUE (MODE)
+     A C expression that gives a rtx representing the nonzero true
+     element for vector comparisons.  The returned rtx should be valid
+     for the inner mode of MODE which is guaranteed to be a vector
+     mode.  Define this macro on machines that have vector comparison
+     operations that return a vector result.  If there are no such
+     operations, do not define this macro.  Typically, this macro is
+     defined as `const1_rtx' or `constm1_rtx'.  This macro may return
+     `NULL_RTX' to prevent the compiler optimizing such vector
+     comparison operations for the given mode.
+
+ -- Macro: CLZ_DEFINED_VALUE_AT_ZERO (MODE, VALUE)
+ -- Macro: CTZ_DEFINED_VALUE_AT_ZERO (MODE, VALUE)
+     A C expression that indicates whether the architecture defines a
+     value for `clz' or `ctz' with a zero operand.  A result of `0'
+     indicates the value is undefined.  If the value is defined for
+     only the RTL expression, the macro should evaluate to `1'; if the
+     value applies also to the corresponding optab entry (which is
+     normally the case if it expands directly into the corresponding
+     RTL), then the macro should evaluate to `2'.  In the cases where
+     the value is defined, VALUE should be set to this value.
+
+     If this macro is not defined, the value of `clz' or `ctz' at zero
+     is assumed to be undefined.
+
+     This macro must be defined if the target's expansion for `ffs'
+     relies on a particular value to get correct results.  Otherwise it
+     is not necessary, though it may be used to optimize some corner
+     cases, and to provide a default expansion for the `ffs' optab.
+
+     Note that regardless of this macro the "definedness" of `clz' and
+     `ctz' at zero do _not_ extend to the builtin functions visible to
+     the user.  Thus one may be free to adjust the value at will to
+     match the target expansion of these operations without fear of
+     breaking the API.
+
+ -- Macro: Pmode
+     An alias for the machine mode for pointers.  On most machines,
+     define this to be the integer mode corresponding to the width of a
+     hardware pointer; `SImode' on 32-bit machine or `DImode' on 64-bit
+     machines.  On some machines you must define this to be one of the
+     partial integer modes, such as `PSImode'.
+
+     The width of `Pmode' must be at least as large as the value of
+     `POINTER_SIZE'.  If it is not equal, you must define the macro
+     `POINTERS_EXTEND_UNSIGNED' to specify how pointers are extended to
+     `Pmode'.
+
+ -- Macro: FUNCTION_MODE
+     An alias for the machine mode used for memory references to
+     functions being called, in `call' RTL expressions.  On most CISC
+     machines, where an instruction can begin at any byte address, this
+     should be `QImode'.  On most RISC machines, where all instructions
+     have fixed size and alignment, this should be a mode with the same
+     size and alignment as the machine instruction words - typically
+     `SImode' or `HImode'.
+
+ -- Macro: STDC_0_IN_SYSTEM_HEADERS
+     In normal operation, the preprocessor expands `__STDC__' to the
+     constant 1, to signify that GCC conforms to ISO Standard C.  On
+     some hosts, like Solaris, the system compiler uses a different
+     convention, where `__STDC__' is normally 0, but is 1 if the user
+     specifies strict conformance to the C Standard.
+
+     Defining `STDC_0_IN_SYSTEM_HEADERS' makes GNU CPP follows the host
+     convention when processing system header files, but when
+     processing user files `__STDC__' will always expand to 1.
+
+ -- Macro: NO_IMPLICIT_EXTERN_C
+     Define this macro if the system header files support C++ as well
+     as C.  This macro inhibits the usual method of using system header
+     files in C++, which is to pretend that the file's contents are
+     enclosed in `extern "C" {...}'.
+
+ -- Macro: REGISTER_TARGET_PRAGMAS ()
+     Define this macro if you want to implement any target-specific
+     pragmas.  If defined, it is a C expression which makes a series of
+     calls to `c_register_pragma' or `c_register_pragma_with_expansion'
+     for each pragma.  The macro may also do any setup required for the
+     pragmas.
+
+     The primary reason to define this macro is to provide
+     compatibility with other compilers for the same target.  In
+     general, we discourage definition of target-specific pragmas for
+     GCC.
+
+     If the pragma can be implemented by attributes then you should
+     consider defining the target hook `TARGET_INSERT_ATTRIBUTES' as
+     well.
+
+     Preprocessor macros that appear on pragma lines are not expanded.
+     All `#pragma' directives that do not match any registered pragma
+     are silently ignored, unless the user specifies
+     `-Wunknown-pragmas'.
+
+ -- Function: void c_register_pragma (const char *SPACE, const char
+          *NAME, void (*CALLBACK) (struct cpp_reader *))
+ -- Function: void c_register_pragma_with_expansion (const char *SPACE,
+          const char *NAME, void (*CALLBACK) (struct cpp_reader *))
+     Each call to `c_register_pragma' or
+     `c_register_pragma_with_expansion' establishes one pragma.  The
+     CALLBACK routine will be called when the preprocessor encounters a
+     pragma of the form
+
+          #pragma [SPACE] NAME ...
+
+     SPACE is the case-sensitive namespace of the pragma, or `NULL' to
+     put the pragma in the global namespace.  The callback routine
+     receives PFILE as its first argument, which can be passed on to
+     cpplib's functions if necessary.  You can lex tokens after the
+     NAME by calling `pragma_lex'.  Tokens that are not read by the
+     callback will be silently ignored.  The end of the line is
+     indicated by a token of type `CPP_EOF'.  Macro expansion occurs on
+     the arguments of pragmas registered with
+     `c_register_pragma_with_expansion' but not on the arguments of
+     pragmas registered with `c_register_pragma'.
+
+     Note that the use of `pragma_lex' is specific to the C and C++
+     compilers.  It will not work in the Java or Fortran compilers, or
+     any other language compilers for that matter.  Thus if
+     `pragma_lex' is going to be called from target-specific code, it
+     must only be done so when building the C and C++ compilers.  This
+     can be done by defining the variables `c_target_objs' and
+     `cxx_target_objs' in the target entry in the `config.gcc' file.
+     These variables should name the target-specific, language-specific
+     object file which contains the code that uses `pragma_lex'.  Note
+     it will also be necessary to add a rule to the makefile fragment
+     pointed to by `tmake_file' that shows how to build this object
+     file.
+
+ -- Macro: HANDLE_PRAGMA_PACK_WITH_EXPANSION
+     Define this macro if macros should be expanded in the arguments of
+     `#pragma pack'.
+
+ -- Target Hook: bool TARGET_HANDLE_PRAGMA_EXTERN_PREFIX
+     True if `#pragma extern_prefix' is to be supported.
+
+ -- Macro: TARGET_DEFAULT_PACK_STRUCT
+     If your target requires a structure packing default other than 0
+     (meaning the machine default), define this macro to the necessary
+     value (in bytes).  This must be a value that would also be valid
+     to use with `#pragma pack()' (that is, a small power of two).
+
+ -- Macro: DOLLARS_IN_IDENTIFIERS
+     Define this macro to control use of the character `$' in
+     identifier names for the C family of languages.  0 means `$' is
+     not allowed by default; 1 means it is allowed.  1 is the default;
+     there is no need to define this macro in that case.
+
+ -- Macro: NO_DOLLAR_IN_LABEL
+     Define this macro if the assembler does not accept the character
+     `$' in label names.  By default constructors and destructors in
+     G++ have `$' in the identifiers.  If this macro is defined, `.' is
+     used instead.
+
+ -- Macro: NO_DOT_IN_LABEL
+     Define this macro if the assembler does not accept the character
+     `.' in label names.  By default constructors and destructors in G++
+     have names that use `.'.  If this macro is defined, these names
+     are rewritten to avoid `.'.
+
+ -- Macro: INSN_SETS_ARE_DELAYED (INSN)
+     Define this macro as a C expression that is nonzero if it is safe
+     for the delay slot scheduler to place instructions in the delay
+     slot of INSN, even if they appear to use a resource set or
+     clobbered in INSN.  INSN is always a `jump_insn' or an `insn'; GCC
+     knows that every `call_insn' has this behavior.  On machines where
+     some `insn' or `jump_insn' is really a function call and hence has
+     this behavior, you should define this macro.
+
+     You need not define this macro if it would always return zero.
+
+ -- Macro: INSN_REFERENCES_ARE_DELAYED (INSN)
+     Define this macro as a C expression that is nonzero if it is safe
+     for the delay slot scheduler to place instructions in the delay
+     slot of INSN, even if they appear to set or clobber a resource
+     referenced in INSN.  INSN is always a `jump_insn' or an `insn'.
+     On machines where some `insn' or `jump_insn' is really a function
+     call and its operands are registers whose use is actually in the
+     subroutine it calls, you should define this macro.  Doing so
+     allows the delay slot scheduler to move instructions which copy
+     arguments into the argument registers into the delay slot of INSN.
+
+     You need not define this macro if it would always return zero.
+
+ -- Macro: MULTIPLE_SYMBOL_SPACES
+     Define this macro as a C expression that is nonzero if, in some
+     cases, global symbols from one translation unit may not be bound
+     to undefined symbols in another translation unit without user
+     intervention.  For instance, under Microsoft Windows symbols must
+     be explicitly imported from shared libraries (DLLs).
+
+     You need not define this macro if it would always evaluate to zero.
+
+ -- Target Hook: tree TARGET_MD_ASM_CLOBBERS (tree OUTPUTS, tree
+          INPUTS, tree CLOBBERS)
+     This target hook should add to CLOBBERS `STRING_CST' trees for any
+     hard regs the port wishes to automatically clobber for an asm.  It
+     should return the result of the last `tree_cons' used to add a
+     clobber.  The OUTPUTS, INPUTS and CLOBBER lists are the
+     corresponding parameters to the asm and may be inspected to avoid
+     clobbering a register that is an input or output of the asm.  You
+     can use `tree_overlaps_hard_reg_set', declared in `tree.h', to test
+     for overlap with regards to asm-declared registers.
+
+ -- Macro: MATH_LIBRARY
+     Define this macro as a C string constant for the linker argument
+     to link in the system math library, minus the initial `"-l"', or
+     `""' if the target does not have a separate math library.
+
+     You need only define this macro if the default of `"m"' is wrong.
+
+ -- Macro: LIBRARY_PATH_ENV
+     Define this macro as a C string constant for the environment
+     variable that specifies where the linker should look for libraries.
+
+     You need only define this macro if the default of `"LIBRARY_PATH"'
+     is wrong.
+
+ -- Macro: TARGET_POSIX_IO
+     Define this macro if the target supports the following POSIX file
+     functions, access, mkdir and  file locking with fcntl / F_SETLKW.
+     Defining `TARGET_POSIX_IO' will enable the test coverage code to
+     use file locking when exiting a program, which avoids race
+     conditions if the program has forked. It will also create
+     directories at run-time for cross-profiling.
+
+ -- Macro: MAX_CONDITIONAL_EXECUTE
+     A C expression for the maximum number of instructions to execute
+     via conditional execution instructions instead of a branch.  A
+     value of `BRANCH_COST'+1 is the default if the machine does not
+     use cc0, and 1 if it does use cc0.
+
+ -- Macro: IFCVT_MODIFY_TESTS (CE_INFO, TRUE_EXPR, FALSE_EXPR)
+     Used if the target needs to perform machine-dependent
+     modifications on the conditionals used for turning basic blocks
+     into conditionally executed code.  CE_INFO points to a data
+     structure, `struct ce_if_block', which contains information about
+     the currently processed blocks.  TRUE_EXPR and FALSE_EXPR are the
+     tests that are used for converting the then-block and the
+     else-block, respectively.  Set either TRUE_EXPR or FALSE_EXPR to a
+     null pointer if the tests cannot be converted.
+
+ -- Macro: IFCVT_MODIFY_MULTIPLE_TESTS (CE_INFO, BB, TRUE_EXPR,
+          FALSE_EXPR)
+     Like `IFCVT_MODIFY_TESTS', but used when converting more
+     complicated if-statements into conditions combined by `and' and
+     `or' operations.  BB contains the basic block that contains the
+     test that is currently being processed and about to be turned into
+     a condition.
+
+ -- Macro: IFCVT_MODIFY_INSN (CE_INFO, PATTERN, INSN)
+     A C expression to modify the PATTERN of an INSN that is to be
+     converted to conditional execution format.  CE_INFO points to a
+     data structure, `struct ce_if_block', which contains information
+     about the currently processed blocks.
+
+ -- Macro: IFCVT_MODIFY_FINAL (CE_INFO)
+     A C expression to perform any final machine dependent
+     modifications in converting code to conditional execution.  The
+     involved basic blocks can be found in the `struct ce_if_block'
+     structure that is pointed to by CE_INFO.
+
+ -- Macro: IFCVT_MODIFY_CANCEL (CE_INFO)
+     A C expression to cancel any machine dependent modifications in
+     converting code to conditional execution.  The involved basic
+     blocks can be found in the `struct ce_if_block' structure that is
+     pointed to by CE_INFO.
+
+ -- Macro: IFCVT_INIT_EXTRA_FIELDS (CE_INFO)
+     A C expression to initialize any extra fields in a `struct
+     ce_if_block' structure, which are defined by the
+     `IFCVT_EXTRA_FIELDS' macro.
+
+ -- Macro: IFCVT_EXTRA_FIELDS
+     If defined, it should expand to a set of field declarations that
+     will be added to the `struct ce_if_block' structure.  These should
+     be initialized by the `IFCVT_INIT_EXTRA_FIELDS' macro.
+
+ -- Target Hook: void TARGET_MACHINE_DEPENDENT_REORG (void)
+     If non-null, this hook performs a target-specific pass over the
+     instruction stream.  The compiler will run it at all optimization
+     levels, just before the point at which it normally does
+     delayed-branch scheduling.
+
+     The exact purpose of the hook varies from target to target.  Some
+     use it to do transformations that are necessary for correctness,
+     such as laying out in-function constant pools or avoiding hardware
+     hazards.  Others use it as an opportunity to do some
+     machine-dependent optimizations.
+
+     You need not implement the hook if it has nothing to do.  The
+     default definition is null.
+
+ -- Target Hook: void TARGET_INIT_BUILTINS (void)
+     Define this hook if you have any machine-specific built-in
+     functions that need to be defined.  It should be a function that
+     performs the necessary setup.
+
+     Machine specific built-in functions can be useful to expand
+     special machine instructions that would otherwise not normally be
+     generated because they have no equivalent in the source language
+     (for example, SIMD vector instructions or prefetch instructions).
+
+     To create a built-in function, call the function
+     `lang_hooks.builtin_function' which is defined by the language
+     front end.  You can use any type nodes set up by
+     `build_common_tree_nodes' and `build_common_tree_nodes_2'; only
+     language front ends that use those two functions will call
+     `TARGET_INIT_BUILTINS'.
+
+ -- Target Hook: tree TARGET_BUILTIN_DECL (unsigned CODE, bool
+          INITIALIZE_P)
+     Define this hook if you have any machine-specific built-in
+     functions that need to be defined.  It should be a function that
+     returns the builtin function declaration for the builtin function
+     code CODE.  If there is no such builtin and it cannot be
+     initialized at this time if INITIALIZE_P is true the function
+     should return `NULL_TREE'.  If CODE is out of range the function
+     should return `error_mark_node'.
+
+ -- Target Hook: rtx TARGET_EXPAND_BUILTIN (tree EXP, rtx TARGET, rtx
+          SUBTARGET, enum machine_mode MODE, int IGNORE)
+     Expand a call to a machine specific built-in function that was set
+     up by `TARGET_INIT_BUILTINS'.  EXP is the expression for the
+     function call; the result should go to TARGET if that is
+     convenient, and have mode MODE if that is convenient.  SUBTARGET
+     may be used as the target for computing one of EXP's operands.
+     IGNORE is nonzero if the value is to be ignored.  This function
+     should return the result of the call to the built-in function.
+
+ -- Target Hook: tree TARGET_RESOLVE_OVERLOADED_BUILTIN (unsigned int
+          LOC, tree FNDECL, void *ARGLIST)
+     Select a replacement for a machine specific built-in function that
+     was set up by `TARGET_INIT_BUILTINS'.  This is done _before_
+     regular type checking, and so allows the target to implement a
+     crude form of function overloading.  FNDECL is the declaration of
+     the built-in function.  ARGLIST is the list of arguments passed to
+     the built-in function.  The result is a complete expression that
+     implements the operation, usually another `CALL_EXPR'.  ARGLIST
+     really has type `VEC(tree,gc)*'
+
+ -- Target Hook: tree TARGET_FOLD_BUILTIN (tree FNDECL, int N_ARGS,
+          tree *ARGP, bool IGNORE)
+     Fold a call to a machine specific built-in function that was set
+     up by `TARGET_INIT_BUILTINS'.  FNDECL is the declaration of the
+     built-in function.  N_ARGS is the number of arguments passed to
+     the function; the arguments themselves are pointed to by ARGP.
+     The result is another tree containing a simplified expression for
+     the call's result.  If IGNORE is true the value will be ignored.
+
+ -- Target Hook: const char * TARGET_INVALID_WITHIN_DOLOOP (const_rtx
+          INSN)
+     Take an instruction in INSN and return NULL if it is valid within a
+     low-overhead loop, otherwise return a string explaining why doloop
+     could not be applied.
+
+     Many targets use special registers for low-overhead looping. For
+     any instruction that clobbers these this function should return a
+     string indicating the reason why the doloop could not be applied.
+     By default, the RTL loop optimizer does not use a present doloop
+     pattern for loops containing function calls or branch on table
+     instructions.
+
+ -- Macro: MD_CAN_REDIRECT_BRANCH (BRANCH1, BRANCH2)
+     Take a branch insn in BRANCH1 and another in BRANCH2.  Return true
+     if redirecting BRANCH1 to the destination of BRANCH2 is possible.
+
+     On some targets, branches may have a limited range.  Optimizing the
+     filling of delay slots can result in branches being redirected,
+     and this may in turn cause a branch offset to overflow.
+
+ -- Target Hook: bool TARGET_COMMUTATIVE_P (const_rtx X, int OUTER_CODE)
+     This target hook returns `true' if X is considered to be
+     commutative.  Usually, this is just COMMUTATIVE_P (X), but the HP
+     PA doesn't consider PLUS to be commutative inside a MEM.
+     OUTER_CODE is the rtx code of the enclosing rtl, if known,
+     otherwise it is UNKNOWN.
+
+ -- Target Hook: rtx TARGET_ALLOCATE_INITIAL_VALUE (rtx HARD_REG)
+     When the initial value of a hard register has been copied in a
+     pseudo register, it is often not necessary to actually allocate
+     another register to this pseudo register, because the original
+     hard register or a stack slot it has been saved into can be used.
+     `TARGET_ALLOCATE_INITIAL_VALUE' is called at the start of register
+     allocation once for each hard register that had its initial value
+     copied by using `get_func_hard_reg_initial_val' or
+     `get_hard_reg_initial_val'.  Possible values are `NULL_RTX', if
+     you don't want to do any special allocation, a `REG' rtx--that
+     would typically be the hard register itself, if it is known not to
+     be clobbered--or a `MEM'.  If you are returning a `MEM', this is
+     only a hint for the allocator; it might decide to use another
+     register anyways.  You may use `current_function_leaf_function' in
+     the hook, functions that use `REG_N_SETS', to determine if the hard
+     register in question will not be clobbered.  The default value of
+     this hook is `NULL', which disables any special allocation.
+
+ -- Target Hook: int TARGET_UNSPEC_MAY_TRAP_P (const_rtx X, unsigned
+          FLAGS)
+     This target hook returns nonzero if X, an `unspec' or
+     `unspec_volatile' operation, might cause a trap.  Targets can use
+     this hook to enhance precision of analysis for `unspec' and
+     `unspec_volatile' operations.  You may call `may_trap_p_1' to
+     analyze inner elements of X in which case FLAGS should be passed
+     along.
+
+ -- Target Hook: void TARGET_SET_CURRENT_FUNCTION (tree DECL)
+     The compiler invokes this hook whenever it changes its current
+     function context (`cfun').  You can define this function if the
+     back end needs to perform any initialization or reset actions on a
+     per-function basis.  For example, it may be used to implement
+     function attributes that affect register usage or code generation
+     patterns.  The argument DECL is the declaration for the new
+     function context, and may be null to indicate that the compiler
+     has left a function context and is returning to processing at the
+     top level.  The default hook function does nothing.
+
+     GCC sets `cfun' to a dummy function context during initialization
+     of some parts of the back end.  The hook function is not invoked
+     in this situation; you need not worry about the hook being invoked
+     recursively, or when the back end is in a partially-initialized
+     state.  `cfun' might be `NULL' to indicate processing at top level,
+     outside of any function scope.
+
+ -- Macro: TARGET_OBJECT_SUFFIX
+     Define this macro to be a C string representing the suffix for
+     object files on your target machine.  If you do not define this
+     macro, GCC will use `.o' as the suffix for object files.
+
+ -- Macro: TARGET_EXECUTABLE_SUFFIX
+     Define this macro to be a C string representing the suffix to be
+     automatically added to executable files on your target machine.
+     If you do not define this macro, GCC will use the null string as
+     the suffix for executable files.
+
+ -- Macro: COLLECT_EXPORT_LIST
+     If defined, `collect2' will scan the individual object files
+     specified on its command line and create an export list for the
+     linker.  Define this macro for systems like AIX, where the linker
+     discards object files that are not referenced from `main' and uses
+     export lists.
+
+ -- Macro: MODIFY_JNI_METHOD_CALL (MDECL)
+     Define this macro to a C expression representing a variant of the
+     method call MDECL, if Java Native Interface (JNI) methods must be
+     invoked differently from other methods on your target.  For
+     example, on 32-bit Microsoft Windows, JNI methods must be invoked
+     using the `stdcall' calling convention and this macro is then
+     defined as this expression:
+
+          build_type_attribute_variant (MDECL,
+                                        build_tree_list
+                                        (get_identifier ("stdcall"),
+                                         NULL))
+
+ -- Target Hook: bool TARGET_CANNOT_MODIFY_JUMPS_P (void)
+     This target hook returns `true' past the point in which new jump
+     instructions could be created.  On machines that require a
+     register for every jump such as the SHmedia ISA of SH5, this point
+     would typically be reload, so this target hook should be defined
+     to a function such as:
+
+          static bool
+          cannot_modify_jumps_past_reload_p ()
+          {
+            return (reload_completed || reload_in_progress);
+          }
+
+ -- Target Hook: reg_class_t TARGET_BRANCH_TARGET_REGISTER_CLASS (void)
+     This target hook returns a register class for which branch target
+     register optimizations should be applied.  All registers in this
+     class should be usable interchangeably.  After reload, registers
+     in this class will be re-allocated and loads will be hoisted out
+     of loops and be subjected to inter-block scheduling.
+
+ -- Target Hook: bool TARGET_BRANCH_TARGET_REGISTER_CALLEE_SAVED (bool
+          AFTER_PROLOGUE_EPILOGUE_GEN)
+     Branch target register optimization will by default exclude
+     callee-saved registers that are not already live during the
+     current function; if this target hook returns true, they will be
+     included.  The target code must than make sure that all target
+     registers in the class returned by
+     `TARGET_BRANCH_TARGET_REGISTER_CLASS' that might need saving are
+     saved.  AFTER_PROLOGUE_EPILOGUE_GEN indicates if prologues and
+     epilogues have already been generated.  Note, even if you only
+     return true when AFTER_PROLOGUE_EPILOGUE_GEN is false, you still
+     are likely to have to make special provisions in
+     `INITIAL_ELIMINATION_OFFSET' to reserve space for caller-saved
+     target registers.
+
+ -- Target Hook: bool TARGET_HAVE_CONDITIONAL_EXECUTION (void)
+     This target hook returns true if the target supports conditional
+     execution.  This target hook is required only when the target has
+     several different modes and they have different conditional
+     execution capability, such as ARM.
+
+ -- Target Hook: unsigned TARGET_LOOP_UNROLL_ADJUST (unsigned NUNROLL,
+          struct loop *LOOP)
+     This target hook returns a new value for the number of times LOOP
+     should be unrolled. The parameter NUNROLL is the number of times
+     the loop is to be unrolled. The parameter LOOP is a pointer to the
+     loop, which is going to be checked for unrolling. This target hook
+     is required only when the target has special constraints like
+     maximum number of memory accesses.
+
+ -- Macro: POWI_MAX_MULTS
+     If defined, this macro is interpreted as a signed integer C
+     expression that specifies the maximum number of floating point
+     multiplications that should be emitted when expanding
+     exponentiation by an integer constant inline.  When this value is
+     defined, exponentiation requiring more than this number of
+     multiplications is implemented by calling the system library's
+     `pow', `powf' or `powl' routines.  The default value places no
+     upper bound on the multiplication count.
+
+ -- Macro: void TARGET_EXTRA_INCLUDES (const char *SYSROOT, const char
+          *IPREFIX, int STDINC)
+     This target hook should register any extra include files for the
+     target.  The parameter STDINC indicates if normal include files
+     are present.  The parameter SYSROOT is the system root directory.
+     The parameter IPREFIX is the prefix for the gcc directory.
+
+ -- Macro: void TARGET_EXTRA_PRE_INCLUDES (const char *SYSROOT, const
+          char *IPREFIX, int STDINC)
+     This target hook should register any extra include files for the
+     target before any standard headers.  The parameter STDINC
+     indicates if normal include files are present.  The parameter
+     SYSROOT is the system root directory.  The parameter IPREFIX is
+     the prefix for the gcc directory.
+
+ -- Macro: void TARGET_OPTF (char *PATH)
+     This target hook should register special include paths for the
+     target.  The parameter PATH is the include to register.  On Darwin
+     systems, this is used for Framework includes, which have semantics
+     that are different from `-I'.
+
+ -- Macro: bool TARGET_USE_LOCAL_THUNK_ALIAS_P (tree FNDECL)
+     This target macro returns `true' if it is safe to use a local alias
+     for a virtual function FNDECL when constructing thunks, `false'
+     otherwise.  By default, the macro returns `true' for all
+     functions, if a target supports aliases (i.e. defines
+     `ASM_OUTPUT_DEF'), `false' otherwise,
+
+ -- Macro: TARGET_FORMAT_TYPES
+     If defined, this macro is the name of a global variable containing
+     target-specific format checking information for the `-Wformat'
+     option.  The default is to have no target-specific format checks.
+
+ -- Macro: TARGET_N_FORMAT_TYPES
+     If defined, this macro is the number of entries in
+     `TARGET_FORMAT_TYPES'.
+
+ -- Macro: TARGET_OVERRIDES_FORMAT_ATTRIBUTES
+     If defined, this macro is the name of a global variable containing
+     target-specific format overrides for the `-Wformat' option. The
+     default is to have no target-specific format overrides. If defined,
+     `TARGET_FORMAT_TYPES' must be defined, too.
+
+ -- Macro: TARGET_OVERRIDES_FORMAT_ATTRIBUTES_COUNT
+     If defined, this macro specifies the number of entries in
+     `TARGET_OVERRIDES_FORMAT_ATTRIBUTES'.
+
+ -- Macro: TARGET_OVERRIDES_FORMAT_INIT
+     If defined, this macro specifies the optional initialization
+     routine for target specific customizations of the system printf
+     and scanf formatter settings.
+
+ -- Target Hook: bool TARGET_RELAXED_ORDERING
+     If set to `true', means that the target's memory model does not
+     guarantee that loads which do not depend on one another will access
+     main memory in the order of the instruction stream; if ordering is
+     important, an explicit memory barrier must be used.  This is true
+     of many recent processors which implement a policy of "relaxed,"
+     "weak," or "release" memory consistency, such as Alpha, PowerPC,
+     and ia64.  The default is `false'.
+
+ -- Target Hook: const char * TARGET_INVALID_ARG_FOR_UNPROTOTYPED_FN
+          (const_tree TYPELIST, const_tree FUNCDECL, const_tree VAL)
+     If defined, this macro returns the diagnostic message when it is
+     illegal to pass argument VAL to function FUNCDECL with prototype
+     TYPELIST.
+
+ -- Target Hook: const char * TARGET_INVALID_CONVERSION (const_tree
+          FROMTYPE, const_tree TOTYPE)
+     If defined, this macro returns the diagnostic message when it is
+     invalid to convert from FROMTYPE to TOTYPE, or `NULL' if validity
+     should be determined by the front end.
+
+ -- Target Hook: const char * TARGET_INVALID_UNARY_OP (int OP,
+          const_tree TYPE)
+     If defined, this macro returns the diagnostic message when it is
+     invalid to apply operation OP (where unary plus is denoted by
+     `CONVERT_EXPR') to an operand of type TYPE, or `NULL' if validity
+     should be determined by the front end.
+
+ -- Target Hook: const char * TARGET_INVALID_BINARY_OP (int OP,
+          const_tree TYPE1, const_tree TYPE2)
+     If defined, this macro returns the diagnostic message when it is
+     invalid to apply operation OP to operands of types TYPE1 and
+     TYPE2, or `NULL' if validity should be determined by the front end.
+
+ -- Target Hook: const char * TARGET_INVALID_PARAMETER_TYPE (const_tree
+          TYPE)
+     If defined, this macro returns the diagnostic message when it is
+     invalid for functions to include parameters of type TYPE, or
+     `NULL' if validity should be determined by the front end.  This is
+     currently used only by the C and C++ front ends.
+
+ -- Target Hook: const char * TARGET_INVALID_RETURN_TYPE (const_tree
+          TYPE)
+     If defined, this macro returns the diagnostic message when it is
+     invalid for functions to have return type TYPE, or `NULL' if
+     validity should be determined by the front end.  This is currently
+     used only by the C and C++ front ends.
+
+ -- Target Hook: tree TARGET_PROMOTED_TYPE (const_tree TYPE)
+     If defined, this target hook returns the type to which values of
+     TYPE should be promoted when they appear in expressions, analogous
+     to the integer promotions, or `NULL_TREE' to use the front end's
+     normal promotion rules.  This hook is useful when there are
+     target-specific types with special promotion rules.  This is
+     currently used only by the C and C++ front ends.
+
+ -- Target Hook: tree TARGET_CONVERT_TO_TYPE (tree TYPE, tree EXPR)
+     If defined, this hook returns the result of converting EXPR to
+     TYPE.  It should return the converted expression, or `NULL_TREE'
+     to apply the front end's normal conversion rules.  This hook is
+     useful when there are target-specific types with special
+     conversion rules.  This is currently used only by the C and C++
+     front ends.
+
+ -- Macro: TARGET_USE_JCR_SECTION
+     This macro determines whether to use the JCR section to register
+     Java classes. By default, TARGET_USE_JCR_SECTION is defined to 1
+     if both SUPPORTS_WEAK and TARGET_HAVE_NAMED_SECTIONS are true,
+     else 0.
+
+ -- Macro: OBJC_JBLEN
+     This macro determines the size of the objective C jump buffer for
+     the NeXT runtime. By default, OBJC_JBLEN is defined to an
+     innocuous value.
+
+ -- Macro: LIBGCC2_UNWIND_ATTRIBUTE
+     Define this macro if any target-specific attributes need to be
+     attached to the functions in `libgcc' that provide low-level
+     support for call stack unwinding.  It is used in declarations in
+     `unwind-generic.h' and the associated definitions of those
+     functions.
+
+ -- Target Hook: void TARGET_UPDATE_STACK_BOUNDARY (void)
+     Define this macro to update the current function stack boundary if
+     necessary.
+
+ -- Target Hook: rtx TARGET_GET_DRAP_RTX (void)
+     This hook should return an rtx for Dynamic Realign Argument
+     Pointer (DRAP) if a different argument pointer register is needed
+     to access the function's argument list due to stack realignment.
+     Return `NULL' if no DRAP is needed.
+
+ -- Target Hook: bool TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS (void)
+     When optimization is disabled, this hook indicates whether or not
+     arguments should be allocated to stack slots.  Normally, GCC
+     allocates stacks slots for arguments when not optimizing in order
+     to make debugging easier.  However, when a function is declared
+     with `__attribute__((naked))', there is no stack frame, and the
+     compiler cannot safely move arguments from the registers in which
+     they are passed to the stack.  Therefore, this hook should return
+     true in general, but false for naked functions.  The default
+     implementation always returns true.
+
+ -- Target Hook: unsigned HOST_WIDE_INT TARGET_CONST_ANCHOR
+     On some architectures it can take multiple instructions to
+     synthesize a constant.  If there is another constant already in a
+     register that is close enough in value then it is preferable that
+     the new constant is computed from this register using immediate
+     addition or subtraction.  We accomplish this through CSE.  Besides
+     the value of the constant we also add a lower and an upper
+     constant anchor to the available expressions.  These are then
+     queried when encountering new constants.  The anchors are computed
+     by rounding the constant up and down to a multiple of the value of
+     `TARGET_CONST_ANCHOR'.  `TARGET_CONST_ANCHOR' should be the
+     maximum positive value accepted by immediate-add plus one.  We
+     currently assume that the value of `TARGET_CONST_ANCHOR' is a
+     power of 2.  For example, on MIPS, where add-immediate takes a
+     16-bit signed value, `TARGET_CONST_ANCHOR' is set to `0x8000'.
+     The default value is zero, which disables this optimization.
+
+
+File: gccint.info,  Node: Host Config,  Next: Fragments,  Prev: Target Macros,  Up: Top
+
+18 Host Configuration
+*********************
+
+Most details about the machine and system on which the compiler is
+actually running are detected by the `configure' script.  Some things
+are impossible for `configure' to detect; these are described in two
+ways, either by macros defined in a file named `xm-MACHINE.h' or by
+hook functions in the file specified by the OUT_HOST_HOOK_OBJ variable
+in `config.gcc'.  (The intention is that very few hosts will need a
+header file but nearly every fully supported host will need to override
+some hooks.)
+
+ If you need to define only a few macros, and they have simple
+definitions, consider using the `xm_defines' variable in your
+`config.gcc' entry instead of creating a host configuration header.
+*Note System Config::.
+
+* Menu:
+
+* Host Common::         Things every host probably needs implemented.
+* Filesystem::          Your host can't have the letter `a' in filenames?
+* Host Misc::           Rare configuration options for hosts.
+
+
+File: gccint.info,  Node: Host Common,  Next: Filesystem,  Up: Host Config
+
+18.1 Host Common
+================
+
+Some things are just not portable, even between similar operating
+systems, and are too difficult for autoconf to detect.  They get
+implemented using hook functions in the file specified by the
+HOST_HOOK_OBJ variable in `config.gcc'.
+
+ -- Host Hook: void HOST_HOOKS_EXTRA_SIGNALS (void)
+     This host hook is used to set up handling for extra signals.  The
+     most common thing to do in this hook is to detect stack overflow.
+
+ -- Host Hook: void * HOST_HOOKS_GT_PCH_GET_ADDRESS (size_t SIZE, int
+          FD)
+     This host hook returns the address of some space that is likely to
+     be free in some subsequent invocation of the compiler.  We intend
+     to load the PCH data at this address such that the data need not
+     be relocated.  The area should be able to hold SIZE bytes.  If the
+     host uses `mmap', FD is an open file descriptor that can be used
+     for probing.
+
+ -- Host Hook: int HOST_HOOKS_GT_PCH_USE_ADDRESS (void * ADDRESS,
+          size_t SIZE, int FD, size_t OFFSET)
+     This host hook is called when a PCH file is about to be loaded.
+     We want to load SIZE bytes from FD at OFFSET into memory at
+     ADDRESS.  The given address will be the result of a previous
+     invocation of `HOST_HOOKS_GT_PCH_GET_ADDRESS'.  Return -1 if we
+     couldn't allocate SIZE bytes at ADDRESS.  Return 0 if the memory
+     is allocated but the data is not loaded.  Return 1 if the hook has
+     performed everything.
+
+     If the implementation uses reserved address space, free any
+     reserved space beyond SIZE, regardless of the return value.  If no
+     PCH will be loaded, this hook may be called with SIZE zero, in
+     which case all reserved address space should be freed.
+
+     Do not try to handle values of ADDRESS that could not have been
+     returned by this executable; just return -1.  Such values usually
+     indicate an out-of-date PCH file (built by some other GCC
+     executable), and such a PCH file won't work.
+
+ -- Host Hook: size_t HOST_HOOKS_GT_PCH_ALLOC_GRANULARITY (void);
+     This host hook returns the alignment required for allocating
+     virtual memory.  Usually this is the same as getpagesize, but on
+     some hosts the alignment for reserving memory differs from the
+     pagesize for committing memory.
+
+
+File: gccint.info,  Node: Filesystem,  Next: Host Misc,  Prev: Host Common,  Up: Host Config
+
+18.2 Host Filesystem
+====================
+
+GCC needs to know a number of things about the semantics of the host
+machine's filesystem.  Filesystems with Unix and MS-DOS semantics are
+automatically detected.  For other systems, you can define the
+following macros in `xm-MACHINE.h'.
+
+`HAVE_DOS_BASED_FILE_SYSTEM'
+     This macro is automatically defined by `system.h' if the host file
+     system obeys the semantics defined by MS-DOS instead of Unix.  DOS
+     file systems are case insensitive, file specifications may begin
+     with a drive letter, and both forward slash and backslash (`/' and
+     `\') are directory separators.
+
+`DIR_SEPARATOR'
+`DIR_SEPARATOR_2'
+     If defined, these macros expand to character constants specifying
+     separators for directory names within a file specification.
+     `system.h' will automatically give them appropriate values on Unix
+     and MS-DOS file systems.  If your file system is neither of these,
+     define one or both appropriately in `xm-MACHINE.h'.
+
+     However, operating systems like VMS, where constructing a pathname
+     is more complicated than just stringing together directory names
+     separated by a special character, should not define either of these
+     macros.
+
+`PATH_SEPARATOR'
+     If defined, this macro should expand to a character constant
+     specifying the separator for elements of search paths.  The default
+     value is a colon (`:').  DOS-based systems usually, but not
+     always, use semicolon (`;').
+
+`VMS'
+     Define this macro if the host system is VMS.
+
+`HOST_OBJECT_SUFFIX'
+     Define this macro to be a C string representing the suffix for
+     object files on your host machine.  If you do not define this
+     macro, GCC will use `.o' as the suffix for object files.
+
+`HOST_EXECUTABLE_SUFFIX'
+     Define this macro to be a C string representing the suffix for
+     executable files on your host machine.  If you do not define this
+     macro, GCC will use the null string as the suffix for executable
+     files.
+
+`HOST_BIT_BUCKET'
+     A pathname defined by the host operating system, which can be
+     opened as a file and written to, but all the information written
+     is discarded.  This is commonly known as a "bit bucket" or "null
+     device".  If you do not define this macro, GCC will use
+     `/dev/null' as the bit bucket.  If the host does not support a bit
+     bucket, define this macro to an invalid filename.
+
+`UPDATE_PATH_HOST_CANONICALIZE (PATH)'
+     If defined, a C statement (sans semicolon) that performs
+     host-dependent canonicalization when a path used in a compilation
+     driver or preprocessor is canonicalized.  PATH is a malloc-ed path
+     to be canonicalized.  If the C statement does canonicalize PATH
+     into a different buffer, the old path should be freed and the new
+     buffer should have been allocated with malloc.
+
+`DUMPFILE_FORMAT'
+     Define this macro to be a C string representing the format to use
+     for constructing the index part of debugging dump file names.  The
+     resultant string must fit in fifteen bytes.  The full filename
+     will be the concatenation of: the prefix of the assembler file
+     name, the string resulting from applying this format to an index
+     number, and a string unique to each dump file kind, e.g. `rtl'.
+
+     If you do not define this macro, GCC will use `.%02d.'.  You should
+     define this macro if using the default will create an invalid file
+     name.
+
+`DELETE_IF_ORDINARY'
+     Define this macro to be a C statement (sans semicolon) that
+     performs host-dependent removal of ordinary temp files in the
+     compilation driver.
+
+     If you do not define this macro, GCC will use the default version.
+     You should define this macro if the default version does not
+     reliably remove the temp file as, for example, on VMS which allows
+     multiple versions of a file.
+
+`HOST_LACKS_INODE_NUMBERS'
+     Define this macro if the host filesystem does not report
+     meaningful inode numbers in struct stat.
+
+
+File: gccint.info,  Node: Host Misc,  Prev: Filesystem,  Up: Host Config
+
+18.3 Host Misc
+==============
+
+`FATAL_EXIT_CODE'
+     A C expression for the status code to be returned when the compiler
+     exits after serious errors.  The default is the system-provided
+     macro `EXIT_FAILURE', or `1' if the system doesn't define that
+     macro.  Define this macro only if these defaults are incorrect.
+
+`SUCCESS_EXIT_CODE'
+     A C expression for the status code to be returned when the compiler
+     exits without serious errors.  (Warnings are not serious errors.)
+     The default is the system-provided macro `EXIT_SUCCESS', or `0' if
+     the system doesn't define that macro.  Define this macro only if
+     these defaults are incorrect.
+
+`USE_C_ALLOCA'
+     Define this macro if GCC should use the C implementation of
+     `alloca' provided by `libiberty.a'.  This only affects how some
+     parts of the compiler itself allocate memory.  It does not change
+     code generation.
+
+     When GCC is built with a compiler other than itself, the C `alloca'
+     is always used.  This is because most other implementations have
+     serious bugs.  You should define this macro only on a system where
+     no stack-based `alloca' can possibly work.  For instance, if a
+     system has a small limit on the size of the stack, GCC's builtin
+     `alloca' will not work reliably.
+
+`COLLECT2_HOST_INITIALIZATION'
+     If defined, a C statement (sans semicolon) that performs
+     host-dependent initialization when `collect2' is being initialized.
+
+`GCC_DRIVER_HOST_INITIALIZATION'
+     If defined, a C statement (sans semicolon) that performs
+     host-dependent initialization when a compilation driver is being
+     initialized.
+
+`HOST_LONG_LONG_FORMAT'
+     If defined, the string used to indicate an argument of type `long
+     long' to functions like `printf'.  The default value is `"ll"'.
+
+`HOST_LONG_FORMAT'
+     If defined, the string used to indicate an argument of type `long'
+     to functions like `printf'.  The default value is `"l"'.
+
+`HOST_PTR_PRINTF'
+     If defined, the string used to indicate an argument of type `void
+     *' to functions like `printf'.  The default value is `"%p"'.
+
+ In addition, if `configure' generates an incorrect definition of any
+of the macros in `auto-host.h', you can override that definition in a
+host configuration header.  If you need to do this, first see if it is
+possible to fix `configure'.
+
+
+File: gccint.info,  Node: Fragments,  Next: Collect2,  Prev: Host Config,  Up: Top
+
+19 Makefile Fragments
+*********************
+
+When you configure GCC using the `configure' script, it will construct
+the file `Makefile' from the template file `Makefile.in'.  When it does
+this, it can incorporate makefile fragments from the `config'
+directory.  These are used to set Makefile parameters that are not
+amenable to being calculated by autoconf.  The list of fragments to
+incorporate is set by `config.gcc' (and occasionally `config.build' and
+`config.host'); *Note System Config::.
+
+ Fragments are named either `t-TARGET' or `x-HOST', depending on
+whether they are relevant to configuring GCC to produce code for a
+particular target, or to configuring GCC to run on a particular host.
+Here TARGET and HOST are mnemonics which usually have some relationship
+to the canonical system name, but no formal connection.
+
+ If these files do not exist, it means nothing needs to be added for a
+given target or host.  Most targets need a few `t-TARGET' fragments,
+but needing `x-HOST' fragments is rare.
+
+* Menu:
+
+* Target Fragment:: Writing `t-TARGET' files.
+* Host Fragment::   Writing `x-HOST' files.
+
+
+File: gccint.info,  Node: Target Fragment,  Next: Host Fragment,  Up: Fragments
+
+19.1 Target Makefile Fragments
+==============================
+
+Target makefile fragments can set these Makefile variables.
+
+`LIBGCC2_CFLAGS'
+     Compiler flags to use when compiling `libgcc2.c'.
+
+`LIB2FUNCS_EXTRA'
+     A list of source file names to be compiled or assembled and
+     inserted into `libgcc.a'.
+
+`Floating Point Emulation'
+     To have GCC include software floating point libraries in `libgcc.a'
+     define `FPBIT' and `DPBIT' along with a few rules as follows:
+          # We want fine grained libraries, so use the new code
+          # to build the floating point emulation libraries.
+          FPBIT = fp-bit.c
+          DPBIT = dp-bit.c
+
+
+          fp-bit.c: $(srcdir)/config/fp-bit.c
+                  echo '#define FLOAT' > fp-bit.c
+                  cat $(srcdir)/config/fp-bit.c >> fp-bit.c
+
+          dp-bit.c: $(srcdir)/config/fp-bit.c
+                  cat $(srcdir)/config/fp-bit.c > dp-bit.c
+
+     You may need to provide additional #defines at the beginning of
+     `fp-bit.c' and `dp-bit.c' to control target endianness and other
+     options.
+
+`CRTSTUFF_T_CFLAGS'
+     Special flags used when compiling `crtstuff.c'.  *Note
+     Initialization::.
+
+`CRTSTUFF_T_CFLAGS_S'
+     Special flags used when compiling `crtstuff.c' for shared linking.
+     Used if you use `crtbeginS.o' and `crtendS.o' in `EXTRA-PARTS'.
+     *Note Initialization::.
+
+`MULTILIB_OPTIONS'
+     For some targets, invoking GCC in different ways produces objects
+     that can not be linked together.  For example, for some targets GCC
+     produces both big and little endian code.  For these targets, you
+     must arrange for multiple versions of `libgcc.a' to be compiled,
+     one for each set of incompatible options.  When GCC invokes the
+     linker, it arranges to link in the right version of `libgcc.a',
+     based on the command line options used.
+
+     The `MULTILIB_OPTIONS' macro lists the set of options for which
+     special versions of `libgcc.a' must be built.  Write options that
+     are mutually incompatible side by side, separated by a slash.
+     Write options that may be used together separated by a space.  The
+     build procedure will build all combinations of compatible options.
+
+     For example, if you set `MULTILIB_OPTIONS' to `m68000/m68020
+     msoft-float', `Makefile' will build special versions of `libgcc.a'
+     using the following sets of options:  `-m68000', `-m68020',
+     `-msoft-float', `-m68000 -msoft-float', and `-m68020 -msoft-float'.
+
+`MULTILIB_DIRNAMES'
+     If `MULTILIB_OPTIONS' is used, this variable specifies the
+     directory names that should be used to hold the various libraries.
+     Write one element in `MULTILIB_DIRNAMES' for each element in
+     `MULTILIB_OPTIONS'.  If `MULTILIB_DIRNAMES' is not used, the
+     default value will be `MULTILIB_OPTIONS', with all slashes treated
+     as spaces.
+
+     `MULTILIB_DIRNAMES' describes the multilib directories using GCC
+     conventions and is applied to directories that are part of the GCC
+     installation.  When multilib-enabled, the compiler will add a
+     subdirectory of the form PREFIX/MULTILIB before each directory in
+     the search path for libraries and crt files.
+
+     For example, if `MULTILIB_OPTIONS' is set to `m68000/m68020
+     msoft-float', then the default value of `MULTILIB_DIRNAMES' is
+     `m68000 m68020 msoft-float'.  You may specify a different value if
+     you desire a different set of directory names.
+
+`MULTILIB_MATCHES'
+     Sometimes the same option may be written in two different ways.
+     If an option is listed in `MULTILIB_OPTIONS', GCC needs to know
+     about any synonyms.  In that case, set `MULTILIB_MATCHES' to a
+     list of items of the form `option=option' to describe all relevant
+     synonyms.  For example, `m68000=mc68000 m68020=mc68020'.
+
+`MULTILIB_EXCEPTIONS'
+     Sometimes when there are multiple sets of `MULTILIB_OPTIONS' being
+     specified, there are combinations that should not be built.  In
+     that case, set `MULTILIB_EXCEPTIONS' to be all of the switch
+     exceptions in shell case syntax that should not be built.
+
+     For example the ARM processor cannot execute both hardware floating
+     point instructions and the reduced size THUMB instructions at the
+     same time, so there is no need to build libraries with both of
+     these options enabled.  Therefore `MULTILIB_EXCEPTIONS' is set to:
+          *mthumb/*mhard-float*
+
+`MULTILIB_EXTRA_OPTS'
+     Sometimes it is desirable that when building multiple versions of
+     `libgcc.a' certain options should always be passed on to the
+     compiler.  In that case, set `MULTILIB_EXTRA_OPTS' to be the list
+     of options to be used for all builds.  If you set this, you should
+     probably set `CRTSTUFF_T_CFLAGS' to a dash followed by it.
+
+`NATIVE_SYSTEM_HEADER_DIR'
+     If the default location for system headers is not `/usr/include',
+     you must set this to the directory containing the headers.  This
+     value should match the value of the `SYSTEM_INCLUDE_DIR' macro.
+
+`MULTILIB_OSDIRNAMES'
+     If `MULTILIB_OPTIONS' is used, this variable specifies a list of
+     subdirectory names, that are used to modify the search path
+     depending on the chosen multilib.  Unlike `MULTILIB_DIRNAMES',
+     `MULTILIB_OSDIRNAMES' describes the multilib directories using
+     operating systems conventions, and is applied to the directories
+     such as `lib' or those in the `LIBRARY_PATH' environment variable.
+     The format is either the same as of `MULTILIB_DIRNAMES', or a set
+     of mappings.  When it is the same as `MULTILIB_DIRNAMES', it
+     describes the multilib directories using operating system
+     conventions, rather than GCC conventions.  When it is a set of
+     mappings of the form GCCDIR=OSDIR, the left side gives the GCC
+     convention and the right gives the equivalent OS defined location.
+     If the OSDIR part begins with a `!', GCC will not search in the
+     non-multilib directory and use exclusively the multilib directory.
+     Otherwise, the compiler will examine the search path for libraries
+     and crt files twice; the first time it will add MULTILIB to each
+     directory in the search path, the second it will not.
+
+     For configurations that support both multilib and multiarch,
+     `MULTILIB_OSDIRNAMES' also encodes the multiarch name, thus
+     subsuming `MULTIARCH_DIRNAME'.  The multiarch name is appended to
+     each directory name, separated by a colon (e.g.
+     `../lib32:i386-linux-gnu').
+
+     Each multiarch subdirectory will be searched before the
+     corresponding OS multilib directory, for example
+     `/lib/i386-linux-gnu' before `/lib/../lib32'.  The multiarch name
+     will also be used to modify the system header search path, as
+     explained for `MULTIARCH_DIRNAME'.
+
+`MULTIARCH_DIRNAME'
+     This variable specifies the multiarch name for configurations that
+     are multiarch-enabled but not multilibbed configurations.
+
+     The multiarch name is used to augment the search path for
+     libraries, crt files and system header files with additional
+     locations.  The compiler will add a multiarch subdirectory of the
+     form PREFIX/MULTIARCH before each directory in the library and crt
+     search path.  It will also add two directories
+     `LOCAL_INCLUDE_DIR'/MULTIARCH and
+     `NATIVE_SYSTEM_HEADER_DIR'/MULTIARCH) to the system header search
+     path, respectively before `LOCAL_INCLUDE_DIR' and
+     `NATIVE_SYSTEM_HEADER_DIR'.
+
+     `MULTIARCH_DIRNAME' is not used for configurations that support
+     both multilib and multiarch.  In that case, multiarch names are
+     encoded in `MULTILIB_OSDIRNAMES' instead.
+
+     More documentation about multiarch can be found at
+     `http://wiki.debian.org/Multiarch'.
+
+`SPECS'
+     Unfortunately, setting `MULTILIB_EXTRA_OPTS' is not enough, since
+     it does not affect the build of target libraries, at least not the
+     build of the default multilib.  One possible work-around is to use
+     `DRIVER_SELF_SPECS' to bring options from the `specs' file as if
+     they had been passed in the compiler driver command line.
+     However, you don't want to be adding these options after the
+     toolchain is installed, so you can instead tweak the `specs' file
+     that will be used during the toolchain build, while you still
+     install the original, built-in `specs'.  The trick is to set
+     `SPECS' to some other filename (say `specs.install'), that will
+     then be created out of the built-in specs, and introduce a
+     `Makefile' rule to generate the `specs' file that's going to be
+     used at build time out of your `specs.install'.
+
+`T_CFLAGS'
+     These are extra flags to pass to the C compiler.  They are used
+     both when building GCC, and when compiling things with the
+     just-built GCC.  This variable is deprecated and should not be
+     used.
+
+
+File: gccint.info,  Node: Host Fragment,  Prev: Target Fragment,  Up: Fragments
+
+19.2 Host Makefile Fragments
+============================
+
+The use of `x-HOST' fragments is discouraged.  You should only use it
+for makefile dependencies.
+
+
+File: gccint.info,  Node: Collect2,  Next: Header Dirs,  Prev: Fragments,  Up: Top
+
+20 `collect2'
+*************
+
+GCC uses a utility called `collect2' on nearly all systems to arrange
+to call various initialization functions at start time.
+
+ The program `collect2' works by linking the program once and looking
+through the linker output file for symbols with particular names
+indicating they are constructor functions.  If it finds any, it creates
+a new temporary `.c' file containing a table of them, compiles it, and
+links the program a second time including that file.
+
+ The actual calls to the constructors are carried out by a subroutine
+called `__main', which is called (automatically) at the beginning of
+the body of `main' (provided `main' was compiled with GNU CC).  Calling
+`__main' is necessary, even when compiling C code, to allow linking C
+and C++ object code together.  (If you use `-nostdlib', you get an
+unresolved reference to `__main', since it's defined in the standard
+GCC library.  Include `-lgcc' at the end of your compiler command line
+to resolve this reference.)
+
+ The program `collect2' is installed as `ld' in the directory where the
+passes of the compiler are installed.  When `collect2' needs to find
+the _real_ `ld', it tries the following file names:
+
+   * a hard coded linker file name, if GCC was configured with the
+     `--with-ld' option.
+
+   * `real-ld' in the directories listed in the compiler's search
+     directories.
+
+   * `real-ld' in the directories listed in the environment variable
+     `PATH'.
+
+   * The file specified in the `REAL_LD_FILE_NAME' configuration macro,
+     if specified.
+
+   * `ld' in the compiler's search directories, except that `collect2'
+     will not execute itself recursively.
+
+   * `ld' in `PATH'.
+
+ "The compiler's search directories" means all the directories where
+`gcc' searches for passes of the compiler.  This includes directories
+that you specify with `-B'.
+
+ Cross-compilers search a little differently:
+
+   * `real-ld' in the compiler's search directories.
+
+   * `TARGET-real-ld' in `PATH'.
+
+   * The file specified in the `REAL_LD_FILE_NAME' configuration macro,
+     if specified.
+
+   * `ld' in the compiler's search directories.
+
+   * `TARGET-ld' in `PATH'.
+
+ `collect2' explicitly avoids running `ld' using the file name under
+which `collect2' itself was invoked.  In fact, it remembers up a list
+of such names--in case one copy of `collect2' finds another copy (or
+version) of `collect2' installed as `ld' in a second place in the
+search path.
+
+ `collect2' searches for the utilities `nm' and `strip' using the same
+algorithm as above for `ld'.
+
+
+File: gccint.info,  Node: Header Dirs,  Next: Type Information,  Prev: Collect2,  Up: Top
+
+21 Standard Header File Directories
+***********************************
+
+`GCC_INCLUDE_DIR' means the same thing for native and cross.  It is
+where GCC stores its private include files, and also where GCC stores
+the fixed include files.  A cross compiled GCC runs `fixincludes' on
+the header files in `$(tooldir)/include'.  (If the cross compilation
+header files need to be fixed, they must be installed before GCC is
+built.  If the cross compilation header files are already suitable for
+GCC, nothing special need be done).
+
+ `GPLUSPLUS_INCLUDE_DIR' means the same thing for native and cross.  It
+is where `g++' looks first for header files.  The C++ library installs
+only target independent header files in that directory.
+
+ `LOCAL_INCLUDE_DIR' is used only by native compilers.  GCC doesn't
+install anything there.  It is normally `/usr/local/include'.  This is
+where local additions to a packaged system should place header files.
+
+ `CROSS_INCLUDE_DIR' is used only by cross compilers.  GCC doesn't
+install anything there.
+
+ `TOOL_INCLUDE_DIR' is used for both native and cross compilers.  It is
+the place for other packages to install header files that GCC will use.
+For a cross-compiler, this is the equivalent of `/usr/include'.  When
+you build a cross-compiler, `fixincludes' processes any header files in
+this directory.
+
+
+File: gccint.info,  Node: Type Information,  Next: Plugins,  Prev: Header Dirs,  Up: Top
+
+22 Memory Management and Type Information
+*****************************************
+
+GCC uses some fairly sophisticated memory management techniques, which
+involve determining information about GCC's data structures from GCC's
+source code and using this information to perform garbage collection and
+implement precompiled headers.
+
+ A full C parser would be too complicated for this task, so a limited
+subset of C is interpreted and special markers are used to determine
+what parts of the source to look at.  All `struct' and `union'
+declarations that define data structures that are allocated under
+control of the garbage collector must be marked.  All global variables
+that hold pointers to garbage-collected memory must also be marked.
+Finally, all global variables that need to be saved and restored by a
+precompiled header must be marked.  (The precompiled header mechanism
+can only save static variables if they're scalar.  Complex data
+structures must be allocated in garbage-collected memory to be saved in
+a precompiled header.)
+
+ The full format of a marker is
+     GTY (([OPTION] [(PARAM)], [OPTION] [(PARAM)] ...))
+ but in most cases no options are needed.  The outer double parentheses
+are still necessary, though: `GTY(())'.  Markers can appear:
+
+   * In a structure definition, before the open brace;
+
+   * In a global variable declaration, after the keyword `static' or
+     `extern'; and
+
+   * In a structure field definition, before the name of the field.
+
+ Here are some examples of marking simple data structures and globals.
+
+     struct GTY(()) TAG
+     {
+       FIELDS...
+     };
+
+     typedef struct GTY(()) TAG
+     {
+       FIELDS...
+     } *TYPENAME;
+
+     static GTY(()) struct TAG *LIST;   /* points to GC memory */
+     static GTY(()) int COUNTER;        /* save counter in a PCH */
+
+ The parser understands simple typedefs such as `typedef struct TAG
+*NAME;' and `typedef int NAME;'.  These don't need to be marked.
+
+* Menu:
+
+* GTY Options::         What goes inside a `GTY(())'.
+* GGC Roots::           Making global variables GGC roots.
+* Files::               How the generated files work.
+* Invoking the garbage collector::   How to invoke the garbage collector.
+* Troubleshooting::     When something does not work as expected.
+
+
+File: gccint.info,  Node: GTY Options,  Next: GGC Roots,  Up: Type Information
+
+22.1 The Inside of a `GTY(())'
+==============================
+
+Sometimes the C code is not enough to fully describe the type
+structure.  Extra information can be provided with `GTY' options and
+additional markers.  Some options take a parameter, which may be either
+a string or a type name, depending on the parameter.  If an option
+takes no parameter, it is acceptable either to omit the parameter
+entirely, or to provide an empty string as a parameter.  For example,
+`GTY ((skip))' and `GTY ((skip ("")))' are equivalent.
+
+ When the parameter is a string, often it is a fragment of C code.  Four
+special escapes may be used in these strings, to refer to pieces of the
+data structure being marked:
+
+`%h'
+     The current structure.
+
+`%1'
+     The structure that immediately contains the current structure.
+
+`%0'
+     The outermost structure that contains the current structure.
+
+`%a'
+     A partial expression of the form `[i1][i2]...' that indexes the
+     array item currently being marked.
+
+ For instance, suppose that you have a structure of the form
+     struct A {
+       ...
+     };
+     struct B {
+       struct A foo[12];
+     };
+ and `b' is a variable of type `struct B'.  When marking `b.foo[11]',
+`%h' would expand to `b.foo[11]', `%0' and `%1' would both expand to
+`b', and `%a' would expand to `[11]'.
+
+ As in ordinary C, adjacent strings will be concatenated; this is
+helpful when you have a complicated expression.
+     GTY ((chain_next ("TREE_CODE (&%h.generic) == INTEGER_TYPE"
+                       " ? TYPE_NEXT_VARIANT (&%h.generic)"
+                       " : TREE_CHAIN (&%h.generic)")))
+
+ The available options are:
+
+`length ("EXPRESSION")'
+     There are two places the type machinery will need to be explicitly
+     told the length of an array.  The first case is when a structure
+     ends in a variable-length array, like this:
+          struct GTY(()) rtvec_def {
+            int num_elem;         /* number of elements */
+            rtx GTY ((length ("%h.num_elem"))) elem[1];
+          };
+
+     In this case, the `length' option is used to override the specified
+     array length (which should usually be `1').  The parameter of the
+     option is a fragment of C code that calculates the length.
+
+     The second case is when a structure or a global variable contains a
+     pointer to an array, like this:
+          struct gimple_omp_for_iter * GTY((length ("%h.collapse"))) iter;
+     In this case, `iter' has been allocated by writing something like
+            x->iter = ggc_alloc_cleared_vec_gimple_omp_for_iter (collapse);
+     and the `collapse' provides the length of the field.
+
+     This second use of `length' also works on global variables, like: static GTY((length("reg_known_value_size"))) rtx *reg_known_value;
+
+`skip'
+     If `skip' is applied to a field, the type machinery will ignore it.
+     This is somewhat dangerous; the only safe use is in a union when
+     one field really isn't ever used.
+
+`desc ("EXPRESSION")'
+`tag ("CONSTANT")'
+`default'
+     The type machinery needs to be told which field of a `union' is
+     currently active.  This is done by giving each field a constant
+     `tag' value, and then specifying a discriminator using `desc'.
+     The value of the expression given by `desc' is compared against
+     each `tag' value, each of which should be different.  If no `tag'
+     is matched, the field marked with `default' is used if there is
+     one, otherwise no field in the union will be marked.
+
+     In the `desc' option, the "current structure" is the union that it
+     discriminates.  Use `%1' to mean the structure containing it.
+     There are no escapes available to the `tag' option, since it is a
+     constant.
+
+     For example,
+          struct GTY(()) tree_binding
+          {
+            struct tree_common common;
+            union tree_binding_u {
+              tree GTY ((tag ("0"))) scope;
+              struct cp_binding_level * GTY ((tag ("1"))) level;
+            } GTY ((desc ("BINDING_HAS_LEVEL_P ((tree)&%0)"))) xscope;
+            tree value;
+          };
+
+     In this example, the value of BINDING_HAS_LEVEL_P when applied to a
+     `struct tree_binding *' is presumed to be 0 or 1.  If 1, the type
+     mechanism will treat the field `level' as being present and if 0,
+     will treat the field `scope' as being present.
+
+`param_is (TYPE)'
+`use_param'
+     Sometimes it's convenient to define some data structure to work on
+     generic pointers (that is, `PTR') and then use it with a specific
+     type.  `param_is' specifies the real type pointed to, and
+     `use_param' says where in the generic data structure that type
+     should be put.
+
+     For instance, to have a `htab_t' that points to trees, one would
+     write the definition of `htab_t' like this:
+          typedef struct GTY(()) {
+            ...
+            void ** GTY ((use_param, ...)) entries;
+            ...
+          } htab_t;
+     and then declare variables like this:
+            static htab_t GTY ((param_is (union tree_node))) ict;
+
+`paramN_is (TYPE)'
+`use_paramN'
+     In more complicated cases, the data structure might need to work on
+     several different types, which might not necessarily all be
+     pointers.  For this, `param1_is' through `param9_is' may be used to
+     specify the real type of a field identified by `use_param1' through
+     `use_param9'.
+
+`use_params'
+     When a structure contains another structure that is parameterized,
+     there's no need to do anything special, the inner structure
+     inherits the parameters of the outer one.  When a structure
+     contains a pointer to a parameterized structure, the type
+     machinery won't automatically detect this (it could, it just
+     doesn't yet), so it's necessary to tell it that the pointed-to
+     structure should use the same parameters as the outer structure.
+     This is done by marking the pointer with the `use_params' option.
+
+`deletable'
+     `deletable', when applied to a global variable, indicates that when
+     garbage collection runs, there's no need to mark anything pointed
+     to by this variable, it can just be set to `NULL' instead.  This
+     is used to keep a list of free structures around for re-use.
+
+`if_marked ("EXPRESSION")'
+     Suppose you want some kinds of object to be unique, and so you put
+     them in a hash table.  If garbage collection marks the hash table,
+     these objects will never be freed, even if the last other
+     reference to them goes away.  GGC has special handling to deal
+     with this: if you use the `if_marked' option on a global hash
+     table, GGC will call the routine whose name is the parameter to
+     the option on each hash table entry.  If the routine returns
+     nonzero, the hash table entry will be marked as usual.  If the
+     routine returns zero, the hash table entry will be deleted.
+
+     The routine `ggc_marked_p' can be used to determine if an element
+     has been marked already; in fact, the usual case is to use
+     `if_marked ("ggc_marked_p")'.
+
+`mark_hook ("HOOK-ROUTINE-NAME")'
+     If provided for a structure or union type, the given
+     HOOK-ROUTINE-NAME (between double-quotes) is the name of a routine
+     called when the garbage collector has just marked the data as
+     reachable. This routine should not change the data, or call any ggc
+     routine. Its only argument is a pointer to the just marked (const)
+     structure or union.
+
+`maybe_undef'
+     When applied to a field, `maybe_undef' indicates that it's OK if
+     the structure that this fields points to is never defined, so long
+     as this field is always `NULL'.  This is used to avoid requiring
+     backends to define certain optional structures.  It doesn't work
+     with language frontends.
+
+`nested_ptr (TYPE, "TO EXPRESSION", "FROM EXPRESSION")'
+     The type machinery expects all pointers to point to the start of an
+     object.  Sometimes for abstraction purposes it's convenient to have
+     a pointer which points inside an object.  So long as it's possible
+     to convert the original object to and from the pointer, such
+     pointers can still be used.  TYPE is the type of the original
+     object, the TO EXPRESSION returns the pointer given the original
+     object, and the FROM EXPRESSION returns the original object given
+     the pointer.  The pointer will be available using the `%h' escape.
+
+`chain_next ("EXPRESSION")'
+`chain_prev ("EXPRESSION")'
+`chain_circular ("EXPRESSION")'
+     It's helpful for the type machinery to know if objects are often
+     chained together in long lists; this lets it generate code that
+     uses less stack space by iterating along the list instead of
+     recursing down it.  `chain_next' is an expression for the next
+     item in the list, `chain_prev' is an expression for the previous
+     item.  For singly linked lists, use only `chain_next'; for doubly
+     linked lists, use both.  The machinery requires that taking the
+     next item of the previous item gives the original item.
+     `chain_circular' is similar to `chain_next', but can be used for
+     circular single linked lists.
+
+`reorder ("FUNCTION NAME")'
+     Some data structures depend on the relative ordering of pointers.
+     If the precompiled header machinery needs to change that ordering,
+     it will call the function referenced by the `reorder' option,
+     before changing the pointers in the object that's pointed to by
+     the field the option applies to.  The function must take four
+     arguments, with the signature
+     `void *, void *, gt_pointer_operator, void *'.  The first
+     parameter is a pointer to the structure that contains the object
+     being updated, or the object itself if there is no containing
+     structure.  The second parameter is a cookie that should be
+     ignored.  The third parameter is a routine that, given a pointer,
+     will update it to its correct new value.  The fourth parameter is
+     a cookie that must be passed to the second parameter.
+
+     PCH cannot handle data structures that depend on the absolute
+     values of pointers.  `reorder' functions can be expensive.  When
+     possible, it is better to depend on properties of the data, like
+     an ID number or the hash of a string instead.
+
+`variable_size'
+     The type machinery expects the types to be of constant size.  When
+     this is not true, for example, with structs that have array fields
+     or unions, the type machinery cannot tell how many bytes need to
+     be allocated at each allocation.  The `variable_size' is used to
+     mark such types.  The type machinery then provides allocators that
+     take a parameter indicating an exact size of object being
+     allocated.  Note that the size must be provided in bytes whereas
+     the `length' option works with array lengths in number of elements.
+
+     For example,
+          struct GTY((variable_size)) sorted_fields_type {
+            int len;
+            tree GTY((length ("%h.len"))) elts[1];
+          };
+
+     Then the objects of `struct sorted_fields_type' are allocated in GC
+     memory as follows:
+            field_vec = ggc_alloc_sorted_fields_type (size);
+
+     If FIELD_VEC->ELTS stores N elements, then SIZE could be
+     calculated as follows:
+            size_t size = sizeof (struct sorted_fields_type) + n * sizeof (tree);
+
+`special ("NAME")'
+     The `special' option is used to mark types that have to be dealt
+     with by special case machinery.  The parameter is the name of the
+     special case.  See `gengtype.c' for further details.  Avoid adding
+     new special cases unless there is no other alternative.
+
+
+File: gccint.info,  Node: GGC Roots,  Next: Files,  Prev: GTY Options,  Up: Type Information
+
+22.2 Marking Roots for the Garbage Collector
+============================================
+
+In addition to keeping track of types, the type machinery also locates
+the global variables ("roots") that the garbage collector starts at.
+Roots must be declared using one of the following syntaxes:
+
+   * `extern GTY(([OPTIONS])) TYPE NAME;'
+
+   * `static GTY(([OPTIONS])) TYPE NAME;'
+ The syntax
+   * `GTY(([OPTIONS])) TYPE NAME;'
+ is _not_ accepted.  There should be an `extern' declaration of such a
+variable in a header somewhere--mark that, not the definition.  Or, if
+the variable is only used in one file, make it `static'.
+
+
+File: gccint.info,  Node: Files,  Next: Invoking the garbage collector,  Prev: GGC Roots,  Up: Type Information
+
+22.3 Source Files Containing Type Information
+=============================================
+
+Whenever you add `GTY' markers to a source file that previously had
+none, or create a new source file containing `GTY' markers, there are
+three things you need to do:
+
+  1. You need to add the file to the list of source files the type
+     machinery scans.  There are four cases:
+
+       a. For a back-end file, this is usually done automatically; if
+          not, you should add it to `target_gtfiles' in the appropriate
+          port's entries in `config.gcc'.
+
+       b. For files shared by all front ends, add the filename to the
+          `GTFILES' variable in `Makefile.in'.
+
+       c. For files that are part of one front end, add the filename to
+          the `gtfiles' variable defined in the appropriate
+          `config-lang.in'.  For C, the file is `c-config-lang.in'.
+          Headers should appear before non-headers in this list.
+
+       d. For files that are part of some but not all front ends, add
+          the filename to the `gtfiles' variable of _all_ the front ends
+          that use it.
+
+  2. If the file was a header file, you'll need to check that it's
+     included in the right place to be visible to the generated files.
+     For a back-end header file, this should be done automatically.
+     For a front-end header file, it needs to be included by the same
+     file that includes `gtype-LANG.h'.  For other header files, it
+     needs to be included in `gtype-desc.c', which is a generated file,
+     so add it to `ifiles' in `open_base_file' in `gengtype.c'.
+
+     For source files that aren't header files, the machinery will
+     generate a header file that should be included in the source file
+     you just changed.  The file will be called `gt-PATH.h' where PATH
+     is the pathname relative to the `gcc' directory with slashes
+     replaced by -, so for example the header file to be included in
+     `cp/parser.c' is called `gt-cp-parser.c'.  The generated header
+     file should be included after everything else in the source file.
+     Don't forget to mention this file as a dependency in the
+     `Makefile'!
+
+
+ For language frontends, there is another file that needs to be included
+somewhere.  It will be called `gtype-LANG.h', where LANG is the name of
+the subdirectory the language is contained in.
+
+ Plugins can add additional root tables.  Run the `gengtype' utility in
+plugin mode as `gengtype -P pluginout.h SOURCE-DIR FILE-LIST PLUGIN*.C'
+with your plugin files PLUGIN*.C using `GTY' to generate the
+PLUGINOUT.H file.  The GCC build tree is needed to be present in that
+mode.
+
+
+File: gccint.info,  Node: Invoking the garbage collector,  Next: Troubleshooting,  Prev: Files,  Up: Type Information
+
+22.4 How to invoke the garbage collector
+========================================
+
+The GCC garbage collector GGC is only invoked explicitly. In contrast
+with many other garbage collectors, it is not implicitly invoked by
+allocation routines when a lot of memory has been consumed. So the only
+way to have GGC reclaim storage it to call the `ggc_collect' function
+explicitly.  This call is an expensive operation, as it may have to
+scan the entire heap.  Beware that local variables (on the GCC call
+stack) are not followed by such an invocation (as many other garbage
+collectors do): you should reference all your data from static or
+external `GTY'-ed variables, and it is advised to call `ggc_collect'
+with a shallow call stack.  The GGC is an exact mark and sweep garbage
+collector (so it does not scan the call stack for pointers).  In
+practice GCC passes don't often call `ggc_collect' themselves, because
+it is called by the pass manager between passes.
+
+ At the time of the `ggc_collect' call all pointers in the GC-marked
+structures must be valid or `NULL'.  In practice this means that there
+should not be uninitialized pointer fields in the structures even if
+your code never reads or writes those fields at a particular instance.
+One way to ensure this is to use cleared versions of allocators unless
+all the fields are initialized manually immediately after allocation.
+
+
+File: gccint.info,  Node: Troubleshooting,  Prev: Invoking the garbage collector,  Up: Type Information
+
+22.5 Troubleshooting the garbage collector
+==========================================
+
+With the current garbage collector implementation, most issues should
+show up as GCC compilation errors.  Some of the most commonly
+encountered issues are described below.
+
+   * Gengtype does not produce allocators for a `GTY'-marked type.
+     Gengtype checks if there is at least one possible path from GC
+     roots to at least one instance of each type before outputting
+     allocators.  If there is no such path, the `GTY' markers will be
+     ignored and no allocators will be output.  Solve this by making
+     sure that there exists at least one such path.  If creating it is
+     unfeasible or raises a "code smell", consider if you really must
+     use GC for allocating such type.
+
+   * Link-time errors about undefined `gt_ggc_r_foo_bar' and
+     similarly-named symbols.  Check if your `foo_bar' source file has
+     `#include "gt-foo_bar.h"' as its very last line.
+
+
+
+File: gccint.info,  Node: Plugins,  Next: LTO,  Prev: Type Information,  Up: Top
+
+23 Plugins
+**********
+
+23.1 Loading Plugins
+====================
+
+Plugins are supported on platforms that support `-ldl -rdynamic'.  They
+are loaded by the compiler using `dlopen' and invoked at pre-determined
+locations in the compilation process.
+
+ Plugins are loaded with
+
+ `-fplugin=/path/to/NAME.so' `-fplugin-arg-NAME-KEY1[=VALUE1]'
+
+ The plugin arguments are parsed by GCC and passed to respective
+plugins as key-value pairs. Multiple plugins can be invoked by
+specifying multiple `-fplugin' arguments.
+
+ A plugin can be simply given by its short name (no dots or slashes).
+When simply passing `-fplugin=NAME', the plugin is loaded from the
+`plugin' directory, so `-fplugin=NAME' is the same as `-fplugin=`gcc
+-print-file-name=plugin`/NAME.so', using backquote shell syntax to
+query the `plugin' directory.
+
+23.2 Plugin API
+===============
+
+Plugins are activated by the compiler at specific events as defined in
+`gcc-plugin.h'.  For each event of interest, the plugin should call
+`register_callback' specifying the name of the event and address of the
+callback function that will handle that event.
+
+ The header `gcc-plugin.h' must be the first gcc header to be included.
+
+23.2.1 Plugin license check
+---------------------------
+
+Every plugin should define the global symbol `plugin_is_GPL_compatible'
+to assert that it has been licensed under a GPL-compatible license.  If
+this symbol does not exist, the compiler will emit a fatal error and
+exit with the error message:
+
+     fatal error: plugin NAME is not licensed under a GPL-compatible license
+     NAME: undefined symbol: plugin_is_GPL_compatible
+     compilation terminated
+
+ The declared type of the symbol should be int, to match a forward
+declaration in `gcc-plugin.h' that suppresses C++ mangling.  It does
+not need to be in any allocated section, though.  The compiler merely
+asserts that the symbol exists in the global scope.  Something like
+this is enough:
+
+     int plugin_is_GPL_compatible;
+
+23.2.2 Plugin initialization
+----------------------------
+
+Every plugin should export a function called `plugin_init' that is
+called right after the plugin is loaded. This function is responsible
+for registering all the callbacks required by the plugin and do any
+other required initialization.
+
+ This function is called from `compile_file' right before invoking the
+parser.  The arguments to `plugin_init' are:
+
+   * `plugin_info': Plugin invocation information.
+
+   * `version': GCC version.
+
+ The `plugin_info' struct is defined as follows:
+
+     struct plugin_name_args
+     {
+       char *base_name;              /* Short name of the plugin
+                                        (filename without .so suffix). */
+       const char *full_name;        /* Path to the plugin as specified with
+                                        -fplugin=. */
+       int argc;                     /* Number of arguments specified with
+                                        -fplugin-arg-.... */
+       struct plugin_argument *argv; /* Array of ARGC key-value pairs. */
+       const char *version;          /* Version string provided by plugin. */
+       const char *help;             /* Help string provided by plugin. */
+     }
+
+ If initialization fails, `plugin_init' must return a non-zero value.
+Otherwise, it should return 0.
+
+ The version of the GCC compiler loading the plugin is described by the
+following structure:
+
+     struct plugin_gcc_version
+     {
+       const char *basever;
+       const char *datestamp;
+       const char *devphase;
+       const char *revision;
+       const char *configuration_arguments;
+     };
+
+ The function `plugin_default_version_check' takes two pointers to such
+structure and compare them field by field. It can be used by the
+plugin's `plugin_init' function.
+
+ The version of GCC used to compile the plugin can be found in the
+symbol `gcc_version' defined in the header `plugin-version.h'. The
+recommended version check to perform looks like
+
+     #include "plugin-version.h"
+     ...
+
+     int
+     plugin_init (struct plugin_name_args *plugin_info,
+                  struct plugin_gcc_version *version)
+     {
+       if (!plugin_default_version_check (version, &gcc_version))
+         return 1;
+
+     }
+
+ but you can also check the individual fields if you want a less strict
+check.
+
+23.2.3 Plugin callbacks
+-----------------------
+
+Callback functions have the following prototype:
+
+     /* The prototype for a plugin callback function.
+          gcc_data  - event-specific data provided by GCC
+          user_data - plugin-specific data provided by the plug-in.  */
+     typedef void (*plugin_callback_func)(void *gcc_data, void *user_data);
+
+ Callbacks can be invoked at the following pre-determined events:
+
+     enum plugin_event
+     {
+       PLUGIN_PASS_MANAGER_SETUP,    /* To hook into pass manager.  */
+       PLUGIN_FINISH_TYPE,           /* After finishing parsing a type.  */
+       PLUGIN_FINISH_UNIT,           /* Useful for summary processing.  */
+       PLUGIN_PRE_GENERICIZE,        /* Allows to see low level AST in C and C++ frontends.  */
+       PLUGIN_FINISH,                /* Called before GCC exits.  */
+       PLUGIN_INFO,                  /* Information about the plugin. */
+       PLUGIN_GGC_START,             /* Called at start of GCC Garbage Collection. */
+       PLUGIN_GGC_MARKING,           /* Extend the GGC marking. */
+       PLUGIN_GGC_END,               /* Called at end of GGC. */
+       PLUGIN_REGISTER_GGC_ROOTS,    /* Register an extra GGC root table. */
+       PLUGIN_REGISTER_GGC_CACHES,   /* Register an extra GGC cache table. */
+       PLUGIN_ATTRIBUTES,            /* Called during attribute registration */
+       PLUGIN_START_UNIT,            /* Called before processing a translation unit.  */
+       PLUGIN_PRAGMAS,               /* Called during pragma registration. */
+       /* Called before first pass from all_passes.  */
+       PLUGIN_ALL_PASSES_START,
+       /* Called after last pass from all_passes.  */
+       PLUGIN_ALL_PASSES_END,
+       /* Called before first ipa pass.  */
+       PLUGIN_ALL_IPA_PASSES_START,
+       /* Called after last ipa pass.  */
+       PLUGIN_ALL_IPA_PASSES_END,
+       /* Allows to override pass gate decision for current_pass.  */
+       PLUGIN_OVERRIDE_GATE,
+       /* Called before executing a pass.  */
+       PLUGIN_PASS_EXECUTION,
+       /* Called before executing subpasses of a GIMPLE_PASS in
+          execute_ipa_pass_list.  */
+       PLUGIN_EARLY_GIMPLE_PASSES_START,
+       /* Called after executing subpasses of a GIMPLE_PASS in
+          execute_ipa_pass_list.  */
+       PLUGIN_EARLY_GIMPLE_PASSES_END,
+       /* Called when a pass is first instantiated.  */
+       PLUGIN_NEW_PASS,
+
+       PLUGIN_EVENT_FIRST_DYNAMIC    /* Dummy event used for indexing callback
+                                        array.  */
+     };
+
+ In addition, plugins can also look up the enumerator of a named event,
+and / or generate new events dynamically, by calling the function
+`get_named_event_id'.
+
+ To register a callback, the plugin calls `register_callback' with the
+arguments:
+
+   * `char *name': Plugin name.
+
+   * `int event': The event code.
+
+   * `plugin_callback_func callback': The function that handles `event'.
+
+   * `void *user_data': Pointer to plugin-specific data.
+
+ For the PLUGIN_PASS_MANAGER_SETUP, PLUGIN_INFO,
+PLUGIN_REGISTER_GGC_ROOTS and PLUGIN_REGISTER_GGC_CACHES pseudo-events
+the `callback' should be null, and the `user_data' is specific.
+
+ When the PLUGIN_PRAGMAS event is triggered (with a null pointer as
+data from GCC), plugins may register their own pragmas using functions
+like `c_register_pragma' or `c_register_pragma_with_expansion'.
+
+23.3 Interacting with the pass manager
+======================================
+
+There needs to be a way to add/reorder/remove passes dynamically. This
+is useful for both analysis plugins (plugging in after a certain pass
+such as CFG or an IPA pass) and optimization plugins.
+
+ Basic support for inserting new passes or replacing existing passes is
+provided. A plugin registers a new pass with GCC by calling
+`register_callback' with the `PLUGIN_PASS_MANAGER_SETUP' event and a
+pointer to a `struct register_pass_info' object defined as follows
+
+     enum pass_positioning_ops
+     {
+       PASS_POS_INSERT_AFTER,  // Insert after the reference pass.
+       PASS_POS_INSERT_BEFORE, // Insert before the reference pass.
+       PASS_POS_REPLACE        // Replace the reference pass.
+     };
+
+     struct register_pass_info
+     {
+       struct opt_pass *pass;            /* New pass provided by the plugin.  */
+       const char *reference_pass_name;  /* Name of the reference pass for hooking
+                                            up the new pass.  */
+       int ref_pass_instance_number;     /* Insert the pass at the specified
+                                            instance number of the reference pass.  */
+                                         /* Do it for every instance if it is 0.  */
+       enum pass_positioning_ops pos_op; /* how to insert the new pass.  */
+     };
+
+
+     /* Sample plugin code that registers a new pass.  */
+     int
+     plugin_init (struct plugin_name_args *plugin_info,
+                  struct plugin_gcc_version *version)
+     {
+       struct register_pass_info pass_info;
+
+       ...
+
+       /* Code to fill in the pass_info object with new pass information.  */
+
+       ...
+
+       /* Register the new pass.  */
+       register_callback (plugin_info->base_name, PLUGIN_PASS_MANAGER_SETUP, NULL, &pass_info);
+
+       ...
+     }
+
+23.4 Interacting with the GCC Garbage Collector
+===============================================
+
+Some plugins may want to be informed when GGC (the GCC Garbage
+Collector) is running. They can register callbacks for the
+`PLUGIN_GGC_START' and `PLUGIN_GGC_END' events (for which the callback
+is called with a null `gcc_data') to be notified of the start or end of
+the GCC garbage collection.
+
+ Some plugins may need to have GGC mark additional data. This can be
+done by registering a callback (called with a null `gcc_data') for the
+`PLUGIN_GGC_MARKING' event. Such callbacks can call the `ggc_set_mark'
+routine, preferably thru the `ggc_mark' macro (and conversely, these
+routines should usually not be used in plugins outside of the
+`PLUGIN_GGC_MARKING' event).
+
+ Some plugins may need to add extra GGC root tables, e.g. to handle
+their own `GTY'-ed data. This can be done with the
+`PLUGIN_REGISTER_GGC_ROOTS' pseudo-event with a null callback and the
+extra root table (of type `struct ggc_root_tab*') as `user_data'.
+Plugins that want to use the `if_marked' hash table option can add the
+extra GGC cache tables generated by `gengtype' using the
+`PLUGIN_REGISTER_GGC_CACHES' pseudo-event with a null callback and the
+extra cache table (of type `struct ggc_cache_tab*') as `user_data'.
+Running the `gengtype -p SOURCE-DIR FILE-LIST PLUGIN*.C ...' utility
+generates these extra root tables.
+
+ You should understand the details of memory management inside GCC
+before using `PLUGIN_GGC_MARKING', `PLUGIN_REGISTER_GGC_ROOTS' or
+`PLUGIN_REGISTER_GGC_CACHES'.
+
+23.5 Giving information about a plugin
+======================================
+
+A plugin should give some information to the user about itself. This
+uses the following structure:
+
+     struct plugin_info
+     {
+       const char *version;
+       const char *help;
+     };
+
+ Such a structure is passed as the `user_data' by the plugin's init
+routine using `register_callback' with the `PLUGIN_INFO' pseudo-event
+and a null callback.
+
+23.6 Registering custom attributes or pragmas
+=============================================
+
+For analysis (or other) purposes it is useful to be able to add custom
+attributes or pragmas.
+
+ The `PLUGIN_ATTRIBUTES' callback is called during attribute
+registration. Use the `register_attribute' function to register custom
+attributes.
+
+     /* Attribute handler callback */
+     static tree
+     handle_user_attribute (tree *node, tree name, tree args,
+                            int flags, bool *no_add_attrs)
+     {
+       return NULL_TREE;
+     }
+
+     /* Attribute definition */
+     static struct attribute_spec user_attr =
+       { "user", 1, 1, false,  false, false, handle_user_attribute };
+
+     /* Plugin callback called during attribute registration.
+     Registered with register_callback (plugin_name, PLUGIN_ATTRIBUTES, register_attributes, NULL)
+     */
+     static void
+     register_attributes (void *event_data, void *data)
+     {
+       warning (0, G_("Callback to register attributes"));
+       register_attribute (&user_attr);
+     }
+
+ The `PLUGIN_PRAGMAS' callback is called during pragmas registration.
+Use the `c_register_pragma' or `c_register_pragma_with_expansion'
+functions to register custom pragmas.
+
+     /* Plugin callback called during pragmas registration. Registered with
+          register_callback (plugin_name, PLUGIN_PRAGMAS,
+                             register_my_pragma, NULL);
+     */
+     static void
+     register_my_pragma (void *event_data, void *data)
+     {
+       warning (0, G_("Callback to register pragmas"));
+       c_register_pragma ("GCCPLUGIN", "sayhello", handle_pragma_sayhello);
+     }
+
+ It is suggested to pass `"GCCPLUGIN"' (or a short name identifying
+your plugin) as the "space" argument of your pragma.
+
+23.7 Recording information about pass execution
+===============================================
+
+The event PLUGIN_PASS_EXECUTION passes the pointer to the executed pass
+(the same as current_pass) as `gcc_data' to the callback.  You can also
+inspect cfun to find out about which function this pass is executed for.
+Note that this event will only be invoked if the gate check (if
+applicable, modified by PLUGIN_OVERRIDE_GATE) succeeds.  You can use
+other hooks, like `PLUGIN_ALL_PASSES_START', `PLUGIN_ALL_PASSES_END',
+`PLUGIN_ALL_IPA_PASSES_START', `PLUGIN_ALL_IPA_PASSES_END',
+`PLUGIN_EARLY_GIMPLE_PASSES_START', and/or
+`PLUGIN_EARLY_GIMPLE_PASSES_END' to manipulate global state in your
+plugin(s) in order to get context for the pass execution.
+
+23.8 Controlling which passes are being run
+===========================================
+
+After the original gate function for a pass is called, its result - the
+gate status - is stored as an integer.  Then the event
+`PLUGIN_OVERRIDE_GATE' is invoked, with a pointer to the gate status in
+the `gcc_data' parameter to the callback function.  A nonzero value of
+the gate status means that the pass is to be executed.  You can both
+read and write the gate status via the passed pointer.
+
+23.9 Keeping track of available passes
+======================================
+
+When your plugin is loaded, you can inspect the various pass lists to
+determine what passes are available.  However, other plugins might add
+new passes.  Also, future changes to GCC might cause generic passes to
+be added after plugin loading.  When a pass is first added to one of
+the pass lists, the event `PLUGIN_NEW_PASS' is invoked, with the
+callback parameter `gcc_data' pointing to the new pass.
+
+23.10 Building GCC plugins
+==========================
+
+If plugins are enabled, GCC installs the headers needed to build a
+plugin (somewhere in the installation tree, e.g. under `/usr/local').
+In particular a `plugin/include' directory is installed, containing all
+the header files needed to build plugins.
+
+ On most systems, you can query this `plugin' directory by invoking
+`gcc -print-file-name=plugin' (replace if needed `gcc' with the
+appropriate program path).
+
+ Inside plugins, this `plugin' directory name can be queried by calling
+`default_plugin_dir_name ()'.
+
+ The following GNU Makefile excerpt shows how to build a simple plugin:
+
+     GCC=gcc
+     PLUGIN_SOURCE_FILES= plugin1.c plugin2.c
+     PLUGIN_OBJECT_FILES= $(patsubst %.c,%.o,$(PLUGIN_SOURCE_FILES))
+     GCCPLUGINS_DIR:= $(shell $(GCC) -print-file-name=plugin)
+     CFLAGS+= -I$(GCCPLUGINS_DIR)/include -fPIC -O2
+
+     plugin.so: $(PLUGIN_OBJECT_FILES)
+        $(GCC) -shared $^ -o $@
+
+ A single source file plugin may be built with `gcc -I`gcc
+-print-file-name=plugin`/include -fPIC -shared -O2 plugin.c -o
+plugin.so', using backquote shell syntax to query the `plugin'
+directory.
+
+ Plugins needing to use `gengtype' require a GCC build directory for
+the same version of GCC that they will be linked against.
+
+
+File: gccint.info,  Node: LTO,  Next: Funding,  Prev: Plugins,  Up: Top
+
+24 Link Time Optimization
+*************************
+
+24.1 Design Overview
+====================
+
+Link time optimization is implemented as a GCC front end for a bytecode
+representation of GIMPLE that is emitted in special sections of `.o'
+files.  Currently, LTO support is enabled in most ELF-based systems, as
+well as darwin, cygwin and mingw systems.
+
+ Since GIMPLE bytecode is saved alongside final object code, object
+files generated with LTO support are larger than regular object files.
+This "fat" object format makes it easy to integrate LTO into existing
+build systems, as one can, for instance, produce archives of the files.
+Additionally, one might be able to ship one set of fat objects which
+could be used both for development and the production of optimized
+builds.  A, perhaps surprising, side effect of this feature is that any
+mistake in the toolchain that leads to LTO information not being used
+(e.g. an older `libtool' calling `ld' directly).  This is both an
+advantage, as the system is more robust, and a disadvantage, as the
+user is not informed that the optimization has been disabled.
+
+ The current implementation only produces "fat" objects, effectively
+doubling compilation time and increasing file sizes up to 5x the
+original size.  This hides the problem that some tools, such as `ar'
+and `nm', need to understand symbol tables of LTO sections.  These
+tools were extended to use the plugin infrastructure, and with these
+problems solved, GCC will also support "slim" objects consisting of the
+intermediate code alone.
+
+ At the highest level, LTO splits the compiler in two.  The first half
+(the "writer") produces a streaming representation of all the internal
+data structures needed to optimize and generate code.  This includes
+declarations, types, the callgraph and the GIMPLE representation of
+function bodies.
+
+ When `-flto' is given during compilation of a source file, the pass
+manager executes all the passes in `all_lto_gen_passes'.  Currently,
+this phase is composed of two IPA passes:
+
+   * `pass_ipa_lto_gimple_out' This pass executes the function
+     `lto_output' in `lto-streamer-out.c', which traverses the call
+     graph encoding every reachable declaration, type and function.
+     This generates a memory representation of all the file sections
+     described below.
+
+   * `pass_ipa_lto_finish_out' This pass executes the function
+     `produce_asm_for_decls' in `lto-streamer-out.c', which takes the
+     memory image built in the previous pass and encodes it in the
+     corresponding ELF file sections.
+
+ The second half of LTO support is the "reader".  This is implemented
+as the GCC front end `lto1' in `lto/lto.c'.  When `collect2' detects a
+link set of `.o'/`.a' files with LTO information and the `-flto' is
+enabled, it invokes `lto1' which reads the set of files and aggregates
+them into a single translation unit for optimization.  The main entry
+point for the reader is `lto/lto.c':`lto_main'.
+
+24.1.1 LTO modes of operation
+-----------------------------
+
+One of the main goals of the GCC link-time infrastructure was to allow
+effective compilation of large programs.  For this reason GCC
+implements two link-time compilation modes.
+
+  1. _LTO mode_, in which the whole program is read into the compiler
+     at link-time and optimized in a similar way as if it were a single
+     source-level compilation unit.
+
+  2. _WHOPR or partitioned mode_, designed to utilize multiple CPUs
+     and/or a distributed compilation environment to quickly link large
+     applications.  WHOPR stands for WHOle Program optimizeR (not to be
+     confused with the semantics of `-fwhole-program').  It partitions
+     the aggregated callgraph from many different `.o' files and
+     distributes the compilation of the sub-graphs to different CPUs.
+
+     Note that distributed compilation is not implemented yet, but since
+     the parallelism is facilitated via generating a `Makefile', it
+     would be easy to implement.
+
+ WHOPR splits LTO into three main stages:
+  1. Local generation (LGEN) This stage executes in parallel.  Every
+     file in the program is compiled into the intermediate language and
+     packaged together with the local call-graph and summary
+     information.  This stage is the same for both the LTO and WHOPR
+     compilation mode.
+
+  2. Whole Program Analysis (WPA) WPA is performed sequentially.  The
+     global call-graph is generated, and a global analysis procedure
+     makes transformation decisions.  The global call-graph is
+     partitioned to facilitate parallel optimization during phase 3.
+     The results of the WPA stage are stored into new object files
+     which contain the partitions of program expressed in the
+     intermediate language and the optimization decisions.
+
+  3. Local transformations (LTRANS) This stage executes in parallel.
+     All the decisions made during phase 2 are implemented locally in
+     each partitioned object file, and the final object code is
+     generated.  Optimizations which cannot be decided efficiently
+     during the phase 2 may be performed on the local call-graph
+     partitions.
+
+ WHOPR can be seen as an extension of the usual LTO mode of
+compilation.  In LTO, WPA and LTRANS are executed within a single
+execution of the compiler, after the whole program has been read into
+memory.
+
+ When compiling in WHOPR mode, the callgraph is partitioned during the
+WPA stage.  The whole program is split into a given number of
+partitions of roughly the same size.  The compiler tries to minimize
+the number of references which cross partition boundaries.  The main
+advantage of WHOPR is to allow the parallel execution of LTRANS stages,
+which are the most time-consuming part of the compilation process.
+Additionally, it avoids the need to load the whole program into memory.
+
+24.2 LTO file sections
+======================
+
+LTO information is stored in several ELF sections inside object files.
+Data structures and enum codes for sections are defined in
+`lto-streamer.h'.
+
+ These sections are emitted from `lto-streamer-out.c' and mapped in all
+at once from `lto/lto.c':`lto_file_read'.  The individual functions
+dealing with the reading/writing of each section are described below.
+
+   * Command line options (`.gnu.lto_.opts')
+
+     This section contains the command line options used to generate the
+     object files.  This is used at link time to determine the
+     optimization level and other settings when they are not explicitly
+     specified at the linker command line.
+
+     Currently, GCC does not support combining LTO object files compiled
+     with different set of the command line options into a single
+     binary.  At link time, the options given on the command line and
+     the options saved on all the files in a link-time set are applied
+     globally.  No attempt is made at validating the combination of
+     flags (other than the usual validation done by option processing).
+     This is implemented in `lto/lto.c':`lto_read_all_file_options'.
+
+   * Symbol table (`.gnu.lto_.symtab')
+
+     This table replaces the ELF symbol table for functions and
+     variables represented in the LTO IL.  Symbols used and exported by
+     the optimized assembly code of "fat" objects might not match the
+     ones used and exported by the intermediate code.  This table is
+     necessary because the intermediate code is less optimized and thus
+     requires a separate symbol table.
+
+     Additionally, the binary code in the "fat" object will lack a call
+     to a function, since the call was optimized out at compilation time
+     after the intermediate language was streamed out.  In some special
+     cases, the same optimization may not happen during link-time
+     optimization.  This would lead to an undefined symbol if only one
+     symbol table was used.
+
+     The symbol table is emitted in
+     `lto-streamer-out.c':`produce_symtab'.
+
+   * Global declarations and types (`.gnu.lto_.decls')
+
+     This section contains an intermediate language dump of all
+     declarations and types required to represent the callgraph, static
+     variables and top-level debug info.
+
+     The contents of this section are emitted in
+     `lto-streamer-out.c':`produce_asm_for_decls'.  Types and symbols
+     are emitted in a topological order that preserves the sharing of
+     pointers when the file is read back in
+     (`lto.c':`read_cgraph_and_symbols').
+
+   * The callgraph (`.gnu.lto_.cgraph')
+
+     This section contains the basic data structure used by the GCC
+     inter-procedural optimization infrastructure.  This section stores
+     an annotated multi-graph which represents the functions and call
+     sites as well as the variables, aliases and top-level `asm'
+     statements.
+
+     This section is emitted in `lto-streamer-out.c':`output_cgraph'
+     and read in `lto-cgraph.c':`input_cgraph'.
+
+   * IPA references (`.gnu.lto_.refs')
+
+     This section contains references between function and static
+     variables.  It is emitted by `lto-cgraph.c':`output_refs' and read
+     by `lto-cgraph.c':`input_refs'.
+
+   * Function bodies (`.gnu.lto_.function_body.<name>')
+
+     This section contains function bodies in the intermediate language
+     representation.  Every function body is in a separate section to
+     allow copying of the section independently to different object
+     files or reading the function on demand.
+
+     Functions are emitted in `lto-streamer-out.c':`output_function'
+     and read in `lto-streamer-in.c':`input_function'.
+
+   * Static variable initializers (`.gnu.lto_.vars')
+
+     This section contains all the symbols in the global variable pool.
+     It is emitted by `lto-cgraph.c':`output_varpool' and read in
+     `lto-cgraph.c':`input_cgraph'.
+
+   * Summaries and optimization summaries used by IPA passes
+     (`.gnu.lto_.<xxx>', where `<xxx>' is one of `jmpfuncs',
+     `pureconst' or `reference')
+
+     These sections are used by IPA passes that need to emit summary
+     information during LTO generation to be read and aggregated at
+     link time.  Each pass is responsible for implementing two pass
+     manager hooks: one for writing the summary and another for reading
+     it in.  The format of these sections is entirely up to each
+     individual pass.  The only requirement is that the writer and
+     reader hooks agree on the format.
+
+24.3 Using summary information in IPA passes
+============================================
+
+Programs are represented internally as a _callgraph_ (a multi-graph
+where nodes are functions and edges are call sites) and a _varpool_ (a
+list of static and external variables in the program).
+
+ The inter-procedural optimization is organized as a sequence of
+individual passes, which operate on the callgraph and the varpool.  To
+make the implementation of WHOPR possible, every inter-procedural
+optimization pass is split into several stages that are executed at
+different times during WHOPR compilation:
+
+   * LGEN time
+       1. _Generate summary_ (`generate_summary' in `struct
+          ipa_opt_pass_d').  This stage analyzes every function body
+          and variable initializer is examined and stores relevant
+          information into a pass-specific data structure.
+
+       2. _Write summary_ (`write_summary' in `struct ipa_opt_pass_d').
+          This stage writes all the pass-specific information generated
+          by `generate_summary'.  Summaries go into their own
+          `LTO_section_*' sections that have to be declared in
+          `lto-streamer.h':`enum lto_section_type'.  A new section is
+          created by calling `create_output_block' and data can be
+          written using the `lto_output_*' routines.
+
+   * WPA time
+       1. _Read summary_ (`read_summary' in `struct ipa_opt_pass_d').
+          This stage reads all the pass-specific information in exactly
+          the same order that it was written by `write_summary'.
+
+       2. _Execute_ (`execute' in `struct opt_pass').  This performs
+          inter-procedural propagation.  This must be done without
+          actual access to the individual function bodies or variable
+          initializers.  Typically, this results in a transitive
+          closure operation over the summary information of all the
+          nodes in the callgraph.
+
+       3. _Write optimization summary_ (`write_optimization_summary' in
+          `struct ipa_opt_pass_d').  This writes the result of the
+          inter-procedural propagation into the object file.  This can
+          use the same data structures and helper routines used in
+          `write_summary'.
+
+   * LTRANS time
+       1. _Read optimization summary_ (`read_optimization_summary' in
+          `struct ipa_opt_pass_d').  The counterpart to
+          `write_optimization_summary'.  This reads the interprocedural
+          optimization decisions in exactly the same format emitted by
+          `write_optimization_summary'.
+
+       2. _Transform_ (`function_transform' and `variable_transform' in
+          `struct ipa_opt_pass_d').  The actual function bodies and
+          variable initializers are updated based on the information
+          passed down from the _Execute_ stage.
+
+ The implementation of the inter-procedural passes are shared between
+LTO, WHOPR and classic non-LTO compilation.
+
+   * During the traditional file-by-file mode every pass executes its
+     own _Generate summary_, _Execute_, and _Transform_ stages within
+     the single execution context of the compiler.
+
+   * In LTO compilation mode, every pass uses _Generate summary_ and
+     _Write summary_ stages at compilation time, while the _Read
+     summary_, _Execute_, and _Transform_ stages are executed at link
+     time.
+
+   * In WHOPR mode all stages are used.
+
+ To simplify development, the GCC pass manager differentiates between
+normal inter-procedural passes and small inter-procedural passes.  A
+_small inter-procedural pass_ (`SIMPLE_IPA_PASS') is a pass that does
+everything at once and thus it can not be executed during WPA in WHOPR
+mode.  It defines only the _Execute_ stage and during this stage it
+accesses and modifies the function bodies.  Such passes are useful for
+optimization at LGEN or LTRANS time and are used, for example, to
+implement early optimization before writing object files.  The simple
+inter-procedural passes can also be used for easier prototyping and
+development of a new inter-procedural pass.
+
+24.3.1 Virtual clones
+---------------------
+
+One of the main challenges of introducing the WHOPR compilation mode
+was addressing the interactions between optimization passes.  In LTO
+compilation mode, the passes are executed in a sequence, each of which
+consists of analysis (or _Generate summary_), propagation (or
+_Execute_) and _Transform_ stages.  Once the work of one pass is
+finished, the next pass sees the updated program representation and can
+execute.  This makes the individual passes dependent on each other.
+
+ In WHOPR mode all passes first execute their _Generate summary_ stage.
+Then summary writing marks the end of the LGEN stage.  At WPA time, the
+summaries are read back into memory and all passes run the _Execute_
+stage.  Optimization summaries are streamed and sent to LTRANS, where
+all the passes execute the _Transform_ stage.
+
+ Most optimization passes split naturally into analysis, propagation
+and transformation stages.  But some do not.  The main problem arises
+when one pass performs changes and the following pass gets confused by
+seeing different callgraphs between the _Transform_ stage and the
+_Generate summary_ or _Execute_ stage.  This means that the passes are
+required to communicate their decisions with each other.
+
+ To facilitate this communication, the GCC callgraph infrastructure
+implements _virtual clones_, a method of representing the changes
+performed by the optimization passes in the callgraph without needing
+to update function bodies.
+
+ A _virtual clone_ in the callgraph is a function that has no
+associated body, just a description of how to create its body based on
+a different function (which itself may be a virtual clone).
+
+ The description of function modifications includes adjustments to the
+function's signature (which allows, for example, removing or adding
+function arguments), substitutions to perform on the function body,
+and, for inlined functions, a pointer to the function that it will be
+inlined into.
+
+ It is also possible to redirect any edge of the callgraph from a
+function to its virtual clone.  This implies updating of the call site
+to adjust for the new function signature.
+
+ Most of the transformations performed by inter-procedural
+optimizations can be represented via virtual clones.  For instance, a
+constant propagation pass can produce a virtual clone of the function
+which replaces one of its arguments by a constant.  The inliner can
+represent its decisions by producing a clone of a function whose body
+will be later integrated into a given function.
+
+ Using _virtual clones_, the program can be easily updated during the
+_Execute_ stage, solving most of pass interactions problems that would
+otherwise occur during _Transform_.
+
+ Virtual clones are later materialized in the LTRANS stage and turned
+into real functions.  Passes executed after the virtual clone were
+introduced also perform their _Transform_ stage on new functions, so
+for a pass there is no significant difference between operating on a
+real function or a virtual clone introduced before its _Execute_ stage.
+
+ Optimization passes then work on virtual clones introduced before
+their _Execute_ stage as if they were real functions.  The only
+difference is that clones are not visible during the _Generate Summary_
+stage.
+
+ To keep function summaries updated, the callgraph interface allows an
+optimizer to register a callback that is called every time a new clone
+is introduced as well as when the actual function or variable is
+generated or when a function or variable is removed.  These hooks are
+registered in the _Generate summary_ stage and allow the pass to keep
+its information intact until the _Execute_ stage.  The same hooks can
+also be registered during the _Execute_ stage to keep the optimization
+summaries updated for the _Transform_ stage.
+
+24.3.2 IPA references
+---------------------
+
+GCC represents IPA references in the callgraph.  For a function or
+variable `A', the _IPA reference_ is a list of all locations where the
+address of `A' is taken and, when `A' is a variable, a list of all
+direct stores and reads to/from `A'.  References represent an oriented
+multi-graph on the union of nodes of the callgraph and the varpool.  See
+`ipa-reference.c':`ipa_reference_write_optimization_summary' and
+`ipa-reference.c':`ipa_reference_read_optimization_summary' for details.
+
+24.3.3 Jump functions
+---------------------
+
+Suppose that an optimization pass sees a function `A' and it knows the
+values of (some of) its arguments.  The _jump function_ describes the
+value of a parameter of a given function call in function `A' based on
+this knowledge.
+
+ Jump functions are used by several optimizations, such as the
+inter-procedural constant propagation pass and the devirtualization
+pass.  The inliner also uses jump functions to perform inlining of
+callbacks.
+
+24.4 Whole program assumptions, linker plugin and symbol visibilities
+=====================================================================
+
+Link-time optimization gives relatively minor benefits when used alone.
+The problem is that propagation of inter-procedural information does
+not work well across functions and variables that are called or
+referenced by other compilation units (such as from a dynamically
+linked library).  We say that such functions are variables are
+_externally visible_.
+
+ To make the situation even more difficult, many applications organize
+themselves as a set of shared libraries, and the default ELF visibility
+rules allow one to overwrite any externally visible symbol with a
+different symbol at runtime.  This basically disables any optimizations
+across such functions and variables, because the compiler cannot be
+sure that the function body it is seeing is the same function body that
+will be used at runtime.  Any function or variable not declared
+`static' in the sources degrades the quality of inter-procedural
+optimization.
+
+ To avoid this problem the compiler must assume that it sees the whole
+program when doing link-time optimization.  Strictly speaking, the
+whole program is rarely visible even at link-time.  Standard system
+libraries are usually linked dynamically or not provided with the
+link-time information.  In GCC, the whole program option
+(`-fwhole-program') asserts that every function and variable defined in
+the current compilation unit is static, except for function `main'
+(note: at link time, the current unit is the union of all objects
+compiled with LTO).  Since some functions and variables need to be
+referenced externally, for example by another DSO or from an assembler
+file, GCC also provides the function and variable attribute
+`externally_visible' which can be used to disable the effect of
+`-fwhole-program' on a specific symbol.
+
+ The whole program mode assumptions are slightly more complex in C++,
+where inline functions in headers are put into _COMDAT_ sections.
+COMDAT function and variables can be defined by multiple object files
+and their bodies are unified at link-time and dynamic link-time.
+COMDAT functions are changed to local only when their address is not
+taken and thus un-sharing them with a library is not harmful.  COMDAT
+variables always remain externally visible, however for readonly
+variables it is assumed that their initializers cannot be overwritten
+by a different value.
+
+ GCC provides the function and variable attribute `visibility' that can
+be used to specify the visibility of externally visible symbols (or
+alternatively an `-fdefault-visibility' command line option).  ELF
+defines the `default', `protected', `hidden' and `internal'
+visibilities.
+
+ The most commonly used is visibility is `hidden'.  It specifies that
+the symbol cannot be referenced from outside of the current shared
+library.  Unfortunately, this information cannot be used directly by
+the link-time optimization in the compiler since the whole shared
+library also might contain non-LTO objects and those are not visible to
+the compiler.
+
+ GCC solves this problem using linker plugins.  A _linker plugin_ is an
+interface to the linker that allows an external program to claim the
+ownership of a given object file.  The linker then performs the linking
+procedure by querying the plugin about the symbol table of the claimed
+objects and once the linking decisions are complete, the plugin is
+allowed to provide the final object file before the actual linking is
+made.  The linker plugin obtains the symbol resolution information
+which specifies which symbols provided by the claimed objects are bound
+from the rest of a binary being linked.
+
+ Currently, the linker plugin  works only in combination with the Gold
+linker, but a GNU ld implementation is under development.
+
+ GCC is designed to be independent of the rest of the toolchain and
+aims to support linkers without plugin support.  For this reason it
+does not use the linker plugin by default.  Instead, the object files
+are examined by `collect2' before being passed to the linker and
+objects found to have LTO sections are passed to `lto1' first.  This
+mode does not work for library archives.  The decision on what object
+files from the archive are needed depends on the actual linking and
+thus GCC would have to implement the linker itself.  The resolution
+information is missing too and thus GCC needs to make an educated guess
+based on `-fwhole-program'.  Without the linker plugin GCC also assumes
+that symbols are declared `hidden' and not referred by non-LTO code by
+default.
+
+24.5 Internal flags controlling `lto1'
+======================================
+
+The following flags are passed into `lto1' and are not meant to be used
+directly from the command line.
+
+   * -fwpa This option runs the serial part of the link-time optimizer
+     performing the inter-procedural propagation (WPA mode).  The
+     compiler reads in summary information from all inputs and performs
+     an analysis based on summary information only.  It generates
+     object files for subsequent runs of the link-time optimizer where
+     individual object files are optimized using both summary
+     information from the WPA mode and the actual function bodies.  It
+     then drives the LTRANS phase.
+
+   * -fltrans This option runs the link-time optimizer in the
+     local-transformation (LTRANS) mode, which reads in output from a
+     previous run of the LTO in WPA mode.  In the LTRANS mode, LTO
+     optimizes an object and produces the final assembly.
+
+   * -fltrans-output-list=FILE This option specifies a file to which
+     the names of LTRANS output files are written.  This option is only
+     meaningful in conjunction with `-fwpa'.
+
+
+File: gccint.info,  Node: Funding,  Next: GNU Project,  Prev: LTO,  Up: Top
+
+Funding Free Software
+*********************
+
+If you want to have more free software a few years from now, it makes
+sense for you to help encourage people to contribute funds for its
+development.  The most effective approach known is to encourage
+commercial redistributors to donate.
+
+ Users of free software systems can boost the pace of development by
+encouraging for-a-fee distributors to donate part of their selling price
+to free software developers--the Free Software Foundation, and others.
+
+ The way to convince distributors to do this is to demand it and expect
+it from them.  So when you compare distributors, judge them partly by
+how much they give to free software development.  Show distributors
+they must compete to be the one who gives the most.
+
+ To make this approach work, you must insist on numbers that you can
+compare, such as, "We will donate ten dollars to the Frobnitz project
+for each disk sold."  Don't be satisfied with a vague promise, such as
+"A portion of the profits are donated," since it doesn't give a basis
+for comparison.
+
+ Even a precise fraction "of the profits from this disk" is not very
+meaningful, since creative accounting and unrelated business decisions
+can greatly alter what fraction of the sales price counts as profit.
+If the price you pay is $50, ten percent of the profit is probably less
+than a dollar; it might be a few cents, or nothing at all.
+
+ Some redistributors do development work themselves.  This is useful
+too; but to keep everyone honest, you need to inquire how much they do,
+and what kind.  Some kinds of development make much more long-term
+difference than others.  For example, maintaining a separate version of
+a program contributes very little; maintaining the standard version of a
+program for the whole community contributes much.  Easy new ports
+contribute little, since someone else would surely do them; difficult
+ports such as adding a new CPU to the GNU Compiler Collection
+contribute more; major new features or packages contribute the most.
+
+ By establishing the idea that supporting further development is "the
+proper thing to do" when distributing free software for a fee, we can
+assure a steady flow of resources into making more free software.
+
+     Copyright (C) 1994 Free Software Foundation, Inc.
+     Verbatim copying and redistribution of this section is permitted
+     without royalty; alteration is not permitted.
+
+
+File: gccint.info,  Node: GNU Project,  Next: Copying,  Prev: Funding,  Up: Top
+
+The GNU Project and GNU/Linux
+*****************************
+
+The GNU Project was launched in 1984 to develop a complete Unix-like
+operating system which is free software: the GNU system.  (GNU is a
+recursive acronym for "GNU's Not Unix"; it is pronounced "guh-NEW".)
+Variants of the GNU operating system, which use the kernel Linux, are
+now widely used; though these systems are often referred to as "Linux",
+they are more accurately called GNU/Linux systems.
+
+ For more information, see:
+     `http://www.gnu.org/'
+     `http://www.gnu.org/gnu/linux-and-gnu.html'
+
+
+File: gccint.info,  Node: Copying,  Next: GNU Free Documentation License,  Prev: GNU Project,  Up: Top
+
+GNU General Public License
+**************************
+
+                        Version 3, 29 June 2007
+
+     Copyright (C) 2007 Free Software Foundation, Inc. `http://fsf.org/'
+
+     Everyone is permitted to copy and distribute verbatim copies of this
+     license document, but changing it is not allowed.
+
+Preamble
+========
+
+The GNU General Public License is a free, copyleft license for software
+and other kinds of works.
+
+ The licenses for most software and other practical works are designed
+to take away your freedom to share and change the works.  By contrast,
+the GNU General Public License is intended to guarantee your freedom to
+share and change all versions of a program-to make sure it remains free
+software for all its users.  We, the Free Software Foundation, use the
+GNU General Public License for most of our software; it applies also to
+any other work released this way by its authors.  You can apply it to
+your programs, too.
+
+ When we speak of free software, we are referring to freedom, not
+price.  Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+them if you wish), that you receive source code or can get it if you
+want it, that you can change the software or use pieces of it in new
+free programs, and that you know you can do these things.
+
+ To protect your rights, we need to prevent others from denying you
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+ 16. Limitation of Liability.
+
+     IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN
+     WRITING WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES
+     AND/OR CONVEYS THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU
+     FOR DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR
+     CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE
+     THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA
+     BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD
+     PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+     PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF
+     THE POSSIBILITY OF SUCH DAMAGES.
+
+ 17. Interpretation of Sections 15 and 16.
+
+     If the disclaimer of warranty and limitation of liability provided
+     above cannot be given local legal effect according to their terms,
+     reviewing courts shall apply local law that most closely
+     approximates an absolute waiver of all civil liability in
+     connection with the Program, unless a warranty or assumption of
+     liability accompanies a copy of the Program in return for a fee.
+
+
+END OF TERMS AND CONDITIONS
+===========================
+
+How to Apply These Terms to Your New Programs
+=============================================
+
+If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these
+terms.
+
+ To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+state the exclusion of warranty; and each file should have at least the
+"copyright" line and a pointer to where the full notice is found.
+
+     ONE LINE TO GIVE THE PROGRAM'S NAME AND A BRIEF IDEA OF WHAT IT DOES.
+     Copyright (C) YEAR NAME OF AUTHOR
+
+     This program is free software: you can redistribute it and/or modify
+     it under the terms of the GNU General Public License as published by
+     the Free Software Foundation, either version 3 of the License, or (at
+     your option) any later version.
+
+     This program is distributed in the hope that it will be useful, but
+     WITHOUT ANY WARRANTY; without even the implied warranty of
+     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+     General Public License for more details.
+
+     You should have received a copy of the GNU General Public License
+     along with this program.  If not, see `http://www.gnu.org/licenses/'.
+
+ Also add information on how to contact you by electronic and paper
+mail.
+
+ If the program does terminal interaction, make it output a short
+notice like this when it starts in an interactive mode:
+
+     PROGRAM Copyright (C) YEAR NAME OF AUTHOR
+     This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+     This is free software, and you are welcome to redistribute it
+     under certain conditions; type `show c' for details.
+
+ The hypothetical commands `show w' and `show c' should show the
+appropriate parts of the General Public License.  Of course, your
+program's commands might be different; for a GUI interface, you would
+use an "about box".
+
+ You should also get your employer (if you work as a programmer) or
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary.  For more information on this, and how to apply and follow
+the GNU GPL, see `http://www.gnu.org/licenses/'.
+
+ The GNU General Public License does not permit incorporating your
+program into proprietary programs.  If your program is a subroutine
+library, you may consider it more useful to permit linking proprietary
+applications with the library.  If this is what you want to do, use the
+GNU Lesser General Public License instead of this License.  But first,
+please read `http://www.gnu.org/philosophy/why-not-lgpl.html'.
+
+
+File: gccint.info,  Node: GNU Free Documentation License,  Next: Contributors,  Prev: Copying,  Up: Top
+
+GNU Free Documentation License
+******************************
+
+                     Version 1.3, 3 November 2008
+
+     Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
+     `http://fsf.org/'
+
+     Everyone is permitted to copy and distribute verbatim copies
+     of this license document, but changing it is not allowed.
+
+  0. PREAMBLE
+
+     The purpose of this License is to make a manual, textbook, or other
+     functional and useful document "free" in the sense of freedom: to
+     assure everyone the effective freedom to copy and redistribute it,
+     with or without modifying it, either commercially or
+     noncommercially.  Secondarily, this License preserves for the
+     author and publisher a way to get credit for their work, while not
+     being considered responsible for modifications made by others.
+
+     This License is a kind of "copyleft", which means that derivative
+     works of the document must themselves be free in the same sense.
+     It complements the GNU General Public License, which is a copyleft
+     license designed for free software.
+
+     We have designed this License in order to use it for manuals for
+     free software, because free software needs free documentation: a
+     free program should come with manuals providing the same freedoms
+     that the software does.  But this License is not limited to
+     software manuals; it can be used for any textual work, regardless
+     of subject matter or whether it is published as a printed book.
+     We recommend this License principally for works whose purpose is
+     instruction or reference.
+
+  1. APPLICABILITY AND DEFINITIONS
+
+     This License applies to any manual or other work, in any medium,
+     that contains a notice placed by the copyright holder saying it
+     can be distributed under the terms of this License.  Such a notice
+     grants a world-wide, royalty-free license, unlimited in duration,
+     to use that work under the conditions stated herein.  The
+     "Document", below, refers to any such manual or work.  Any member
+     of the public is a licensee, and is addressed as "you".  You
+     accept the license if you copy, modify or distribute the work in a
+     way requiring permission under copyright law.
+
+     A "Modified Version" of the Document means any work containing the
+     Document or a portion of it, either copied verbatim, or with
+     modifications and/or translated into another language.
+
+     A "Secondary Section" is a named appendix or a front-matter section
+     of the Document that deals exclusively with the relationship of the
+     publishers or authors of the Document to the Document's overall
+     subject (or to related matters) and contains nothing that could
+     fall directly within that overall subject.  (Thus, if the Document
+     is in part a textbook of mathematics, a Secondary Section may not
+     explain any mathematics.)  The relationship could be a matter of
+     historical connection with the subject or with related matters, or
+     of legal, commercial, philosophical, ethical or political position
+     regarding them.
+
+     The "Invariant Sections" are certain Secondary Sections whose
+     titles are designated, as being those of Invariant Sections, in
+     the notice that says that the Document is released under this
+     License.  If a section does not fit the above definition of
+     Secondary then it is not allowed to be designated as Invariant.
+     The Document may contain zero Invariant Sections.  If the Document
+     does not identify any Invariant Sections then there are none.
+
+     The "Cover Texts" are certain short passages of text that are
+     listed, as Front-Cover Texts or Back-Cover Texts, in the notice
+     that says that the Document is released under this License.  A
+     Front-Cover Text may be at most 5 words, and a Back-Cover Text may
+     be at most 25 words.
+
+     A "Transparent" copy of the Document means a machine-readable copy,
+     represented in a format whose specification is available to the
+     general public, that is suitable for revising the document
+     straightforwardly with generic text editors or (for images
+     composed of pixels) generic paint programs or (for drawings) some
+     widely available drawing editor, and that is suitable for input to
+     text formatters or for automatic translation to a variety of
+     formats suitable for input to text formatters.  A copy made in an
+     otherwise Transparent file format whose markup, or absence of
+     markup, has been arranged to thwart or discourage subsequent
+     modification by readers is not Transparent.  An image format is
+     not Transparent if used for any substantial amount of text.  A
+     copy that is not "Transparent" is called "Opaque".
+
+     Examples of suitable formats for Transparent copies include plain
+     ASCII without markup, Texinfo input format, LaTeX input format,
+     SGML or XML using a publicly available DTD, and
+     standard-conforming simple HTML, PostScript or PDF designed for
+     human modification.  Examples of transparent image formats include
+     PNG, XCF and JPG.  Opaque formats include proprietary formats that
+     can be read and edited only by proprietary word processors, SGML or
+     XML for which the DTD and/or processing tools are not generally
+     available, and the machine-generated HTML, PostScript or PDF
+     produced by some word processors for output purposes only.
+
+     The "Title Page" means, for a printed book, the title page itself,
+     plus such following pages as are needed to hold, legibly, the
+     material this License requires to appear in the title page.  For
+     works in formats which do not have any title page as such, "Title
+     Page" means the text near the most prominent appearance of the
+     work's title, preceding the beginning of the body of the text.
+
+     The "publisher" means any person or entity that distributes copies
+     of the Document to the public.
+
+     A section "Entitled XYZ" means a named subunit of the Document
+     whose title either is precisely XYZ or contains XYZ in parentheses
+     following text that translates XYZ in another language.  (Here XYZ
+     stands for a specific section name mentioned below, such as
+     "Acknowledgements", "Dedications", "Endorsements", or "History".)
+     To "Preserve the Title" of such a section when you modify the
+     Document means that it remains a section "Entitled XYZ" according
+     to this definition.
+
+     The Document may include Warranty Disclaimers next to the notice
+     which states that this License applies to the Document.  These
+     Warranty Disclaimers are considered to be included by reference in
+     this License, but only as regards disclaiming warranties: any other
+     implication that these Warranty Disclaimers may have is void and
+     has no effect on the meaning of this License.
+
+  2. VERBATIM COPYING
+
+     You may copy and distribute the Document in any medium, either
+     commercially or noncommercially, provided that this License, the
+     copyright notices, and the license notice saying this License
+     applies to the Document are reproduced in all copies, and that you
+     add no other conditions whatsoever to those of this License.  You
+     may not use technical measures to obstruct or control the reading
+     or further copying of the copies you make or distribute.  However,
+     you may accept compensation in exchange for copies.  If you
+     distribute a large enough number of copies you must also follow
+     the conditions in section 3.
+
+     You may also lend copies, under the same conditions stated above,
+     and you may publicly display copies.
+
+  3. COPYING IN QUANTITY
+
+     If you publish printed copies (or copies in media that commonly
+     have printed covers) of the Document, numbering more than 100, and
+     the Document's license notice requires Cover Texts, you must
+     enclose the copies in covers that carry, clearly and legibly, all
+     these Cover Texts: Front-Cover Texts on the front cover, and
+     Back-Cover Texts on the back cover.  Both covers must also clearly
+     and legibly identify you as the publisher of these copies.  The
+     front cover must present the full title with all words of the
+     title equally prominent and visible.  You may add other material
+     on the covers in addition.  Copying with changes limited to the
+     covers, as long as they preserve the title of the Document and
+     satisfy these conditions, can be treated as verbatim copying in
+     other respects.
+
+     If the required texts for either cover are too voluminous to fit
+     legibly, you should put the first ones listed (as many as fit
+     reasonably) on the actual cover, and continue the rest onto
+     adjacent pages.
+
+     If you publish or distribute Opaque copies of the Document
+     numbering more than 100, you must either include a
+     machine-readable Transparent copy along with each Opaque copy, or
+     state in or with each Opaque copy a computer-network location from
+     which the general network-using public has access to download
+     using public-standard network protocols a complete Transparent
+     copy of the Document, free of added material.  If you use the
+     latter option, you must take reasonably prudent steps, when you
+     begin distribution of Opaque copies in quantity, to ensure that
+     this Transparent copy will remain thus accessible at the stated
+     location until at least one year after the last time you
+     distribute an Opaque copy (directly or through your agents or
+     retailers) of that edition to the public.
+
+     It is requested, but not required, that you contact the authors of
+     the Document well before redistributing any large number of
+     copies, to give them a chance to provide you with an updated
+     version of the Document.
+
+  4. MODIFICATIONS
+
+     You may copy and distribute a Modified Version of the Document
+     under the conditions of sections 2 and 3 above, provided that you
+     release the Modified Version under precisely this License, with
+     the Modified Version filling the role of the Document, thus
+     licensing distribution and modification of the Modified Version to
+     whoever possesses a copy of it.  In addition, you must do these
+     things in the Modified Version:
+
+       A. Use in the Title Page (and on the covers, if any) a title
+          distinct from that of the Document, and from those of
+          previous versions (which should, if there were any, be listed
+          in the History section of the Document).  You may use the
+          same title as a previous version if the original publisher of
+          that version gives permission.
+
+       B. List on the Title Page, as authors, one or more persons or
+          entities responsible for authorship of the modifications in
+          the Modified Version, together with at least five of the
+          principal authors of the Document (all of its principal
+          authors, if it has fewer than five), unless they release you
+          from this requirement.
+
+       C. State on the Title page the name of the publisher of the
+          Modified Version, as the publisher.
+
+       D. Preserve all the copyright notices of the Document.
+
+       E. Add an appropriate copyright notice for your modifications
+          adjacent to the other copyright notices.
+
+       F. Include, immediately after the copyright notices, a license
+          notice giving the public permission to use the Modified
+          Version under the terms of this License, in the form shown in
+          the Addendum below.
+
+       G. Preserve in that license notice the full lists of Invariant
+          Sections and required Cover Texts given in the Document's
+          license notice.
+
+       H. Include an unaltered copy of this License.
+
+       I. Preserve the section Entitled "History", Preserve its Title,
+          and add to it an item stating at least the title, year, new
+          authors, and publisher of the Modified Version as given on
+          the Title Page.  If there is no section Entitled "History" in
+          the Document, create one stating the title, year, authors,
+          and publisher of the Document as given on its Title Page,
+          then add an item describing the Modified Version as stated in
+          the previous sentence.
+
+       J. Preserve the network location, if any, given in the Document
+          for public access to a Transparent copy of the Document, and
+          likewise the network locations given in the Document for
+          previous versions it was based on.  These may be placed in
+          the "History" section.  You may omit a network location for a
+          work that was published at least four years before the
+          Document itself, or if the original publisher of the version
+          it refers to gives permission.
+
+       K. For any section Entitled "Acknowledgements" or "Dedications",
+          Preserve the Title of the section, and preserve in the
+          section all the substance and tone of each of the contributor
+          acknowledgements and/or dedications given therein.
+
+       L. Preserve all the Invariant Sections of the Document,
+          unaltered in their text and in their titles.  Section numbers
+          or the equivalent are not considered part of the section
+          titles.
+
+       M. Delete any section Entitled "Endorsements".  Such a section
+          may not be included in the Modified Version.
+
+       N. Do not retitle any existing section to be Entitled
+          "Endorsements" or to conflict in title with any Invariant
+          Section.
+
+       O. Preserve any Warranty Disclaimers.
+
+     If the Modified Version includes new front-matter sections or
+     appendices that qualify as Secondary Sections and contain no
+     material copied from the Document, you may at your option
+     designate some or all of these sections as invariant.  To do this,
+     add their titles to the list of Invariant Sections in the Modified
+     Version's license notice.  These titles must be distinct from any
+     other section titles.
+
+     You may add a section Entitled "Endorsements", provided it contains
+     nothing but endorsements of your Modified Version by various
+     parties--for example, statements of peer review or that the text
+     has been approved by an organization as the authoritative
+     definition of a standard.
+
+     You may add a passage of up to five words as a Front-Cover Text,
+     and a passage of up to 25 words as a Back-Cover Text, to the end
+     of the list of Cover Texts in the Modified Version.  Only one
+     passage of Front-Cover Text and one of Back-Cover Text may be
+     added by (or through arrangements made by) any one entity.  If the
+     Document already includes a cover text for the same cover,
+     previously added by you or by arrangement made by the same entity
+     you are acting on behalf of, you may not add another; but you may
+     replace the old one, on explicit permission from the previous
+     publisher that added the old one.
+
+     The author(s) and publisher(s) of the Document do not by this
+     License give permission to use their names for publicity for or to
+     assert or imply endorsement of any Modified Version.
+
+  5. COMBINING DOCUMENTS
+
+     You may combine the Document with other documents released under
+     this License, under the terms defined in section 4 above for
+     modified versions, provided that you include in the combination
+     all of the Invariant Sections of all of the original documents,
+     unmodified, and list them all as Invariant Sections of your
+     combined work in its license notice, and that you preserve all
+     their Warranty Disclaimers.
+
+     The combined work need only contain one copy of this License, and
+     multiple identical Invariant Sections may be replaced with a single
+     copy.  If there are multiple Invariant Sections with the same name
+     but different contents, make the title of each such section unique
+     by adding at the end of it, in parentheses, the name of the
+     original author or publisher of that section if known, or else a
+     unique number.  Make the same adjustment to the section titles in
+     the list of Invariant Sections in the license notice of the
+     combined work.
+
+     In the combination, you must combine any sections Entitled
+     "History" in the various original documents, forming one section
+     Entitled "History"; likewise combine any sections Entitled
+     "Acknowledgements", and any sections Entitled "Dedications".  You
+     must delete all sections Entitled "Endorsements."
+
+  6. COLLECTIONS OF DOCUMENTS
+
+     You may make a collection consisting of the Document and other
+     documents released under this License, and replace the individual
+     copies of this License in the various documents with a single copy
+     that is included in the collection, provided that you follow the
+     rules of this License for verbatim copying of each of the
+     documents in all other respects.
+
+     You may extract a single document from such a collection, and
+     distribute it individually under this License, provided you insert
+     a copy of this License into the extracted document, and follow
+     this License in all other respects regarding verbatim copying of
+     that document.
+
+  7. AGGREGATION WITH INDEPENDENT WORKS
+
+     A compilation of the Document or its derivatives with other
+     separate and independent documents or works, in or on a volume of
+     a storage or distribution medium, is called an "aggregate" if the
+     copyright resulting from the compilation is not used to limit the
+     legal rights of the compilation's users beyond what the individual
+     works permit.  When the Document is included in an aggregate, this
+     License does not apply to the other works in the aggregate which
+     are not themselves derivative works of the Document.
+
+     If the Cover Text requirement of section 3 is applicable to these
+     copies of the Document, then if the Document is less than one half
+     of the entire aggregate, the Document's Cover Texts may be placed
+     on covers that bracket the Document within the aggregate, or the
+     electronic equivalent of covers if the Document is in electronic
+     form.  Otherwise they must appear on printed covers that bracket
+     the whole aggregate.
+
+  8. TRANSLATION
+
+     Translation is considered a kind of modification, so you may
+     distribute translations of the Document under the terms of section
+     4.  Replacing Invariant Sections with translations requires special
+     permission from their copyright holders, but you may include
+     translations of some or all Invariant Sections in addition to the
+     original versions of these Invariant Sections.  You may include a
+     translation of this License, and all the license notices in the
+     Document, and any Warranty Disclaimers, provided that you also
+     include the original English version of this License and the
+     original versions of those notices and disclaimers.  In case of a
+     disagreement between the translation and the original version of
+     this License or a notice or disclaimer, the original version will
+     prevail.
+
+     If a section in the Document is Entitled "Acknowledgements",
+     "Dedications", or "History", the requirement (section 4) to
+     Preserve its Title (section 1) will typically require changing the
+     actual title.
+
+  9. TERMINATION
+
+     You may not copy, modify, sublicense, or distribute the Document
+     except as expressly provided under this License.  Any attempt
+     otherwise to copy, modify, sublicense, or distribute it is void,
+     and will automatically terminate your rights under this License.
+
+     However, if you cease all violation of this License, then your
+     license from a particular copyright holder is reinstated (a)
+     provisionally, unless and until the copyright holder explicitly
+     and finally terminates your license, and (b) permanently, if the
+     copyright holder fails to notify you of the violation by some
+     reasonable means prior to 60 days after the cessation.
+
+     Moreover, your license from a particular copyright holder is
+     reinstated permanently if the copyright holder notifies you of the
+     violation by some reasonable means, this is the first time you have
+     received notice of violation of this License (for any work) from
+     that copyright holder, and you cure the violation prior to 30 days
+     after your receipt of the notice.
+
+     Termination of your rights under this section does not terminate
+     the licenses of parties who have received copies or rights from
+     you under this License.  If your rights have been terminated and
+     not permanently reinstated, receipt of a copy of some or all of
+     the same material does not give you any rights to use it.
+
+ 10. FUTURE REVISIONS OF THIS LICENSE
+
+     The Free Software Foundation may publish new, revised versions of
+     the GNU Free Documentation License from time to time.  Such new
+     versions will be similar in spirit to the present version, but may
+     differ in detail to address new problems or concerns.  See
+     `http://www.gnu.org/copyleft/'.
+
+     Each version of the License is given a distinguishing version
+     number.  If the Document specifies that a particular numbered
+     version of this License "or any later version" applies to it, you
+     have the option of following the terms and conditions either of
+     that specified version or of any later version that has been
+     published (not as a draft) by the Free Software Foundation.  If
+     the Document does not specify a version number of this License,
+     you may choose any version ever published (not as a draft) by the
+     Free Software Foundation.  If the Document specifies that a proxy
+     can decide which future versions of this License can be used, that
+     proxy's public statement of acceptance of a version permanently
+     authorizes you to choose that version for the Document.
+
+ 11. RELICENSING
+
+     "Massive Multiauthor Collaboration Site" (or "MMC Site") means any
+     World Wide Web server that publishes copyrightable works and also
+     provides prominent facilities for anybody to edit those works.  A
+     public wiki that anybody can edit is an example of such a server.
+     A "Massive Multiauthor Collaboration" (or "MMC") contained in the
+     site means any set of copyrightable works thus published on the MMC
+     site.
+
+     "CC-BY-SA" means the Creative Commons Attribution-Share Alike 3.0
+     license published by Creative Commons Corporation, a not-for-profit
+     corporation with a principal place of business in San Francisco,
+     California, as well as future copyleft versions of that license
+     published by that same organization.
+
+     "Incorporate" means to publish or republish a Document, in whole or
+     in part, as part of another Document.
+
+     An MMC is "eligible for relicensing" if it is licensed under this
+     License, and if all works that were first published under this
+     License somewhere other than this MMC, and subsequently
+     incorporated in whole or in part into the MMC, (1) had no cover
+     texts or invariant sections, and (2) were thus incorporated prior
+     to November 1, 2008.
+
+     The operator of an MMC Site may republish an MMC contained in the
+     site under CC-BY-SA on the same site at any time before August 1,
+     2009, provided the MMC is eligible for relicensing.
+
+
+ADDENDUM: How to use this License for your documents
+====================================================
+
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and license
+notices just after the title page:
+
+       Copyright (C)  YEAR  YOUR NAME.
+       Permission is granted to copy, distribute and/or modify this document
+       under the terms of the GNU Free Documentation License, Version 1.3
+       or any later version published by the Free Software Foundation;
+       with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
+       Texts.  A copy of the license is included in the section entitled ``GNU
+       Free Documentation License''.
+
+ If you have Invariant Sections, Front-Cover Texts and Back-Cover Texts,
+replace the "with...Texts." line with this:
+
+         with the Invariant Sections being LIST THEIR TITLES, with
+         the Front-Cover Texts being LIST, and with the Back-Cover Texts
+         being LIST.
+
+ If you have Invariant Sections without Cover Texts, or some other
+combination of the three, merge those two alternatives to suit the
+situation.
+
+ If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
+free software license, such as the GNU General Public License, to
+permit their use in free software.
+
+
+File: gccint.info,  Node: Contributors,  Next: Option Index,  Prev: GNU Free Documentation License,  Up: Top
+
+Contributors to GCC
+*******************
+
+The GCC project would like to thank its many contributors.  Without
+them the project would not have been nearly as successful as it has
+been.  Any omissions in this list are accidental.  Feel free to contact
+<law@redhat.com> or <gerald@pfeifer.com> if you have been left out or
+some of your contributions are not listed.  Please keep this list in
+alphabetical order.
+
+   * Analog Devices helped implement the support for complex data types
+     and iterators.
+
+   * John David Anglin for threading-related fixes and improvements to
+     libstdc++-v3, and the HP-UX port.
+
+   * James van Artsdalen wrote the code that makes efficient use of the
+     Intel 80387 register stack.
+
+   * Abramo and Roberto Bagnara for the SysV68 Motorola 3300 Delta
+     Series port.
+
+   * Alasdair Baird for various bug fixes.
+
+   * Giovanni Bajo for analyzing lots of complicated C++ problem
+     reports.
+
+   * Peter Barada for his work to improve code generation for new
+     ColdFire cores.
+
+   * Gerald Baumgartner added the signature extension to the C++ front
+     end.
+
+   * Godmar Back for his Java improvements and encouragement.
+
+   * Scott Bambrough for help porting the Java compiler.
+
+   * Wolfgang Bangerth for processing tons of bug reports.
+
+   * Jon Beniston for his Microsoft Windows port of Java and port to
+     Lattice Mico32.
+
+   * Daniel Berlin for better DWARF2 support, faster/better
+     optimizations, improved alias analysis, plus migrating GCC to
+     Bugzilla.
+
+   * Geoff Berry for his Java object serialization work and various
+     patches.
+
+   * Uros Bizjak for the implementation of x87 math built-in functions
+     and for various middle end and i386 back end improvements and bug
+     fixes.
+
+   * Eric Blake for helping to make GCJ and libgcj conform to the
+     specifications.
+
+   * Janne Blomqvist for contributions to GNU Fortran.
+
+   * Segher Boessenkool for various fixes.
+
+   * Hans-J. Boehm for his garbage collector, IA-64 libffi port, and
+     other Java work.
+
+   * Neil Booth for work on cpplib, lang hooks, debug hooks and other
+     miscellaneous clean-ups.
+
+   * Steven Bosscher for integrating the GNU Fortran front end into GCC
+     and for contributing to the tree-ssa branch.
+
+   * Eric Botcazou for fixing middle- and backend bugs left and right.
+
+   * Per Bothner for his direction via the steering committee and
+     various improvements to the infrastructure for supporting new
+     languages.  Chill front end implementation.  Initial
+     implementations of cpplib, fix-header, config.guess, libio, and
+     past C++ library (libg++) maintainer.  Dreaming up, designing and
+     implementing much of GCJ.
+
+   * Devon Bowen helped port GCC to the Tahoe.
+
+   * Don Bowman for mips-vxworks contributions.
+
+   * Dave Brolley for work on cpplib and Chill.
+
+   * Paul Brook for work on the ARM architecture and maintaining GNU
+     Fortran.
+
+   * Robert Brown implemented the support for Encore 32000 systems.
+
+   * Christian Bruel for improvements to local store elimination.
+
+   * Herman A.J. ten Brugge for various fixes.
+
+   * Joerg Brunsmann for Java compiler hacking and help with the GCJ
+     FAQ.
+
+   * Joe Buck for his direction via the steering committee.
+
+   * Craig Burley for leadership of the G77 Fortran effort.
+
+   * Stephan Buys for contributing Doxygen notes for libstdc++.
+
+   * Paolo Carlini for libstdc++ work: lots of efficiency improvements
+     to the C++ strings, streambufs and formatted I/O, hard detective
+     work on the frustrating localization issues, and keeping up with
+     the problem reports.
+
+   * John Carr for his alias work, SPARC hacking, infrastructure
+     improvements, previous contributions to the steering committee,
+     loop optimizations, etc.
+
+   * Stephane Carrez for 68HC11 and 68HC12 ports.
+
+   * Steve Chamberlain for support for the Renesas SH and H8 processors
+     and the PicoJava processor, and for GCJ config fixes.
+
+   * Glenn Chambers for help with the GCJ FAQ.
+
+   * John-Marc Chandonia for various libgcj patches.
+
+   * Denis Chertykov for contributing and maintaining the AVR port, the
+     first GCC port for an 8-bit architecture.
+
+   * Scott Christley for his Objective-C contributions.
+
+   * Eric Christopher for his Java porting help and clean-ups.
+
+   * Branko Cibej for more warning contributions.
+
+   * The GNU Classpath project for all of their merged runtime code.
+
+   * Nick Clifton for arm, mcore, fr30, v850, m32r, rx work, `--help',
+     and other random hacking.
+
+   * Michael Cook for libstdc++ cleanup patches to reduce warnings.
+
+   * R. Kelley Cook for making GCC buildable from a read-only directory
+     as well as other miscellaneous build process and documentation
+     clean-ups.
+
+   * Ralf Corsepius for SH testing and minor bug fixing.
+
+   * Stan Cox for care and feeding of the x86 port and lots of behind
+     the scenes hacking.
+
+   * Alex Crain provided changes for the 3b1.
+
+   * Ian Dall for major improvements to the NS32k port.
+
+   * Paul Dale for his work to add uClinux platform support to the m68k
+     backend.
+
+   * Dario Dariol contributed the four varieties of sample programs
+     that print a copy of their source.
+
+   * Russell Davidson for fstream and stringstream fixes in libstdc++.
+
+   * Bud Davis for work on the G77 and GNU Fortran compilers.
+
+   * Mo DeJong for GCJ and libgcj bug fixes.
+
+   * DJ Delorie for the DJGPP port, build and libiberty maintenance,
+     various bug fixes, and the M32C and MeP ports.
+
+   * Arnaud Desitter for helping to debug GNU Fortran.
+
+   * Gabriel Dos Reis for contributions to G++, contributions and
+     maintenance of GCC diagnostics infrastructure, libstdc++-v3,
+     including `valarray<>', `complex<>', maintaining the numerics
+     library (including that pesky `<limits>' :-) and keeping
+     up-to-date anything to do with numbers.
+
+   * Ulrich Drepper for his work on glibc, testing of GCC using glibc,
+     ISO C99 support, CFG dumping support, etc., plus support of the
+     C++ runtime libraries including for all kinds of C interface
+     issues, contributing and maintaining `complex<>', sanity checking
+     and disbursement, configuration architecture, libio maintenance,
+     and early math work.
+
+   * Zdenek Dvorak for a new loop unroller and various fixes.
+
+   * Michael Eager for his work on the Xilinx MicroBlaze port.
+
+   * Richard Earnshaw for his ongoing work with the ARM.
+
+   * David Edelsohn for his direction via the steering committee,
+     ongoing work with the RS6000/PowerPC port, help cleaning up Haifa
+     loop changes, doing the entire AIX port of libstdc++ with his bare
+     hands, and for ensuring GCC properly keeps working on AIX.
+
+   * Kevin Ediger for the floating point formatting of num_put::do_put
+     in libstdc++.
+
+   * Phil Edwards for libstdc++ work including configuration hackery,
+     documentation maintainer, chief breaker of the web pages, the
+     occasional iostream bug fix, and work on shared library symbol
+     versioning.
+
+   * Paul Eggert for random hacking all over GCC.
+
+   * Mark Elbrecht for various DJGPP improvements, and for libstdc++
+     configuration support for locales and fstream-related fixes.
+
+   * Vadim Egorov for libstdc++ fixes in strings, streambufs, and
+     iostreams.
+
+   * Christian Ehrhardt for dealing with bug reports.
+
+   * Ben Elliston for his work to move the Objective-C runtime into its
+     own subdirectory and for his work on autoconf.
+
+   * Revital Eres for work on the PowerPC 750CL port.
+
+   * Marc Espie for OpenBSD support.
+
+   * Doug Evans for much of the global optimization framework, arc,
+     m32r, and SPARC work.
+
+   * Christopher Faylor for his work on the Cygwin port and for caring
+     and feeding the gcc.gnu.org box and saving its users tons of spam.
+
+   * Fred Fish for BeOS support and Ada fixes.
+
+   * Ivan Fontes Garcia for the Portuguese translation of the GCJ FAQ.
+
+   * Peter Gerwinski for various bug fixes and the Pascal front end.
+
+   * Kaveh R. Ghazi for his direction via the steering committee,
+     amazing work to make `-W -Wall -W* -Werror' useful, and
+     continuously testing GCC on a plethora of platforms.  Kaveh
+     extends his gratitude to the CAIP Center at Rutgers University for
+     providing him with computing resources to work on Free Software
+     since the late 1980s.
+
+   * John Gilmore for a donation to the FSF earmarked improving GNU
+     Java.
+
+   * Judy Goldberg for c++ contributions.
+
+   * Torbjorn Granlund for various fixes and the c-torture testsuite,
+     multiply- and divide-by-constant optimization, improved long long
+     support, improved leaf function register allocation, and his
+     direction via the steering committee.
+
+   * Anthony Green for his `-Os' contributions, the moxie port, and
+     Java front end work.
+
+   * Stu Grossman for gdb hacking, allowing GCJ developers to debug
+     Java code.
+
+   * Michael K. Gschwind contributed the port to the PDP-11.
+
+   * Richard Guenther for his ongoing middle-end contributions and bug
+     fixes and for release management.
+
+   * Ron Guilmette implemented the `protoize' and `unprotoize' tools,
+     the support for Dwarf symbolic debugging information, and much of
+     the support for System V Release 4.  He has also worked heavily on
+     the Intel 386 and 860 support.
+
+   * Mostafa Hagog for Swing Modulo Scheduling (SMS) and post reload
+     GCSE.
+
+   * Bruno Haible for improvements in the runtime overhead for EH, new
+     warnings and assorted bug fixes.
+
+   * Andrew Haley for his amazing Java compiler and library efforts.
+
+   * Chris Hanson assisted in making GCC work on HP-UX for the 9000
+     series 300.
+
+   * Michael Hayes for various thankless work he's done trying to get
+     the c30/c40 ports functional.  Lots of loop and unroll
+     improvements and fixes.
+
+   * Dara Hazeghi for wading through myriads of target-specific bug
+     reports.
+
+   * Kate Hedstrom for staking the G77 folks with an initial testsuite.
+
+   * Richard Henderson for his ongoing SPARC, alpha, ia32, and ia64
+     work, loop opts, and generally fixing lots of old problems we've
+     ignored for years, flow rewrite and lots of further stuff,
+     including reviewing tons of patches.
+
+   * Aldy Hernandez for working on the PowerPC port, SIMD support, and
+     various fixes.
+
+   * Nobuyuki Hikichi of Software Research Associates, Tokyo,
+     contributed the support for the Sony NEWS machine.
+
+   * Kazu Hirata for caring and feeding the Renesas H8/300 port and
+     various fixes.
+
+   * Katherine Holcomb for work on GNU Fortran.
+
+   * Manfred Hollstein for his ongoing work to keep the m88k alive, lots
+     of testing and bug fixing, particularly of GCC configury code.
+
+   * Steve Holmgren for MachTen patches.
+
+   * Jan Hubicka for his x86 port improvements.
+
+   * Falk Hueffner for working on C and optimization bug reports.
+
+   * Bernardo Innocenti for his m68k work, including merging of
+     ColdFire improvements and uClinux support.
+
+   * Christian Iseli for various bug fixes.
+
+   * Kamil Iskra for general m68k hacking.
+
+   * Lee Iverson for random fixes and MIPS testing.
+
+   * Andreas Jaeger for testing and benchmarking of GCC and various bug
+     fixes.
+
+   * Jakub Jelinek for his SPARC work and sibling call optimizations as
+     well as lots of bug fixes and test cases, and for improving the
+     Java build system.
+
+   * Janis Johnson for ia64 testing and fixes, her quality improvement
+     sidetracks, and web page maintenance.
+
+   * Kean Johnston for SCO OpenServer support and various fixes.
+
+   * Tim Josling for the sample language treelang based originally on
+     Richard Kenner's "toy" language.
+
+   * Nicolai Josuttis for additional libstdc++ documentation.
+
+   * Klaus Kaempf for his ongoing work to make alpha-vms a viable
+     target.
+
+   * Steven G. Kargl for work on GNU Fortran.
+
+   * David Kashtan of SRI adapted GCC to VMS.
+
+   * Ryszard Kabatek for many, many libstdc++ bug fixes and
+     optimizations of strings, especially member functions, and for
+     auto_ptr fixes.
+
+   * Geoffrey Keating for his ongoing work to make the PPC work for
+     GNU/Linux and his automatic regression tester.
+
+   * Brendan Kehoe for his ongoing work with G++ and for a lot of early
+     work in just about every part of libstdc++.
+
+   * Oliver M. Kellogg of Deutsche Aerospace contributed the port to the
+     MIL-STD-1750A.
+
+   * Richard Kenner of the New York University Ultracomputer Research
+     Laboratory wrote the machine descriptions for the AMD 29000, the
+     DEC Alpha, the IBM RT PC, and the IBM RS/6000 as well as the
+     support for instruction attributes.  He also made changes to
+     better support RISC processors including changes to common
+     subexpression elimination, strength reduction, function calling
+     sequence handling, and condition code support, in addition to
+     generalizing the code for frame pointer elimination and delay slot
+     scheduling.  Richard Kenner was also the head maintainer of GCC
+     for several years.
+
+   * Mumit Khan for various contributions to the Cygwin and Mingw32
+     ports and maintaining binary releases for Microsoft Windows hosts,
+     and for massive libstdc++ porting work to Cygwin/Mingw32.
+
+   * Robin Kirkham for cpu32 support.
+
+   * Mark Klein for PA improvements.
+
+   * Thomas Koenig for various bug fixes.
+
+   * Bruce Korb for the new and improved fixincludes code.
+
+   * Benjamin Kosnik for his G++ work and for leading the libstdc++-v3
+     effort.
+
+   * Charles LaBrec contributed the support for the Integrated Solutions
+     68020 system.
+
+   * Asher Langton and Mike Kumbera for contributing Cray pointer
+     support to GNU Fortran, and for other GNU Fortran improvements.
+
+   * Jeff Law for his direction via the steering committee,
+     coordinating the entire egcs project and GCC 2.95, rolling out
+     snapshots and releases, handling merges from GCC2, reviewing tons
+     of patches that might have fallen through the cracks else, and
+     random but extensive hacking.
+
+   * Marc Lehmann for his direction via the steering committee and
+     helping with analysis and improvements of x86 performance.
+
+   * Victor Leikehman for work on GNU Fortran.
+
+   * Ted Lemon wrote parts of the RTL reader and printer.
+
+   * Kriang Lerdsuwanakij for C++ improvements including template as
+     template parameter support, and many C++ fixes.
+
+   * Warren Levy for tremendous work on libgcj (Java Runtime Library)
+     and random work on the Java front end.
+
+   * Alain Lichnewsky ported GCC to the MIPS CPU.
+
+   * Oskar Liljeblad for hacking on AWT and his many Java bug reports
+     and patches.
+
+   * Robert Lipe for OpenServer support, new testsuites, testing, etc.
+
+   * Chen Liqin for various S+core related fixes/improvement, and for
+     maintaining the S+core port.
+
+   * Weiwen Liu for testing and various bug fixes.
+
+   * Manuel Lo'pez-Iba'n~ez for improving `-Wconversion' and many other
+     diagnostics fixes and improvements.
+
+   * Dave Love for his ongoing work with the Fortran front end and
+     runtime libraries.
+
+   * Martin von Lo"wis for internal consistency checking infrastructure,
+     various C++ improvements including namespace support, and tons of
+     assistance with libstdc++/compiler merges.
+
+   * H.J. Lu for his previous contributions to the steering committee,
+     many x86 bug reports, prototype patches, and keeping the GNU/Linux
+     ports working.
+
+   * Greg McGary for random fixes and (someday) bounded pointers.
+
+   * Andrew MacLeod for his ongoing work in building a real EH system,
+     various code generation improvements, work on the global
+     optimizer, etc.
+
+   * Vladimir Makarov for hacking some ugly i960 problems, PowerPC
+     hacking improvements to compile-time performance, overall
+     knowledge and direction in the area of instruction scheduling, and
+     design and implementation of the automaton based instruction
+     scheduler.
+
+   * Bob Manson for his behind the scenes work on dejagnu.
+
+   * Philip Martin for lots of libstdc++ string and vector iterator
+     fixes and improvements, and string clean up and testsuites.
+
+   * All of the Mauve project contributors, for Java test code.
+
+   * Bryce McKinlay for numerous GCJ and libgcj fixes and improvements.
+
+   * Adam Megacz for his work on the Microsoft Windows port of GCJ.
+
+   * Michael Meissner for LRS framework, ia32, m32r, v850, m88k, MIPS,
+     powerpc, haifa, ECOFF debug support, and other assorted hacking.
+
+   * Jason Merrill for his direction via the steering committee and
+     leading the G++ effort.
+
+   * Martin Michlmayr for testing GCC on several architectures using the
+     entire Debian archive.
+
+   * David Miller for his direction via the steering committee, lots of
+     SPARC work, improvements in jump.c and interfacing with the Linux
+     kernel developers.
+
+   * Gary Miller ported GCC to Charles River Data Systems machines.
+
+   * Alfred Minarik for libstdc++ string and ios bug fixes, and turning
+     the entire libstdc++ testsuite namespace-compatible.
+
+   * Mark Mitchell for his direction via the steering committee,
+     mountains of C++ work, load/store hoisting out of loops, alias
+     analysis improvements, ISO C `restrict' support, and serving as
+     release manager for GCC 3.x.
+
+   * Alan Modra for various GNU/Linux bits and testing.
+
+   * Toon Moene for his direction via the steering committee, Fortran
+     maintenance, and his ongoing work to make us make Fortran run fast.
+
+   * Jason Molenda for major help in the care and feeding of all the
+     services on the gcc.gnu.org (formerly egcs.cygnus.com)
+     machine--mail, web services, ftp services, etc etc.  Doing all
+     this work on scrap paper and the backs of envelopes would have
+     been... difficult.
+
+   * Catherine Moore for fixing various ugly problems we have sent her
+     way, including the haifa bug which was killing the Alpha & PowerPC
+     Linux kernels.
+
+   * Mike Moreton for his various Java patches.
+
+   * David Mosberger-Tang for various Alpha improvements, and for the
+     initial IA-64 port.
+
+   * Stephen Moshier contributed the floating point emulator that
+     assists in cross-compilation and permits support for floating
+     point numbers wider than 64 bits and for ISO C99 support.
+
+   * Bill Moyer for his behind the scenes work on various issues.
+
+   * Philippe De Muyter for his work on the m68k port.
+
+   * Joseph S. Myers for his work on the PDP-11 port, format checking
+     and ISO C99 support, and continuous emphasis on (and contributions
+     to) documentation.
+
+   * Nathan Myers for his work on libstdc++-v3: architecture and
+     authorship through the first three snapshots, including
+     implementation of locale infrastructure, string, shadow C headers,
+     and the initial project documentation (DESIGN, CHECKLIST, and so
+     forth).  Later, more work on MT-safe string and shadow headers.
+
+   * Felix Natter for documentation on porting libstdc++.
+
+   * Nathanael Nerode for cleaning up the configuration/build process.
+
+   * NeXT, Inc. donated the front end that supports the Objective-C
+     language.
+
+   * Hans-Peter Nilsson for the CRIS and MMIX ports, improvements to
+     the search engine setup, various documentation fixes and other
+     small fixes.
+
+   * Geoff Noer for his work on getting cygwin native builds working.
+
+   * Diego Novillo for his work on Tree SSA, OpenMP, SPEC performance
+     tracking web pages, GIMPLE tuples, and assorted fixes.
+
+   * David O'Brien for the FreeBSD/alpha, FreeBSD/AMD x86-64,
+     FreeBSD/ARM, FreeBSD/PowerPC, and FreeBSD/SPARC64 ports and
+     related infrastructure improvements.
+
+   * Alexandre Oliva for various build infrastructure improvements,
+     scripts and amazing testing work, including keeping libtool issues
+     sane and happy.
+
+   * Stefan Olsson for work on mt_alloc.
+
+   * Melissa O'Neill for various NeXT fixes.
+
+   * Rainer Orth for random MIPS work, including improvements to GCC's
+     o32 ABI support, improvements to dejagnu's MIPS support, Java
+     configuration clean-ups and porting work, and maintaining the
+     IRIX, Solaris 2, and Tru64 UNIX ports.
+
+   * Hartmut Penner for work on the s390 port.
+
+   * Paul Petersen wrote the machine description for the Alliant FX/8.
+
+   * Alexandre Petit-Bianco for implementing much of the Java compiler
+     and continued Java maintainership.
+
+   * Matthias Pfaller for major improvements to the NS32k port.
+
+   * Gerald Pfeifer for his direction via the steering committee,
+     pointing out lots of problems we need to solve, maintenance of the
+     web pages, and taking care of documentation maintenance in general.
+
+   * Andrew Pinski for processing bug reports by the dozen.
+
+   * Ovidiu Predescu for his work on the Objective-C front end and
+     runtime libraries.
+
+   * Jerry Quinn for major performance improvements in C++ formatted
+     I/O.
+
+   * Ken Raeburn for various improvements to checker, MIPS ports and
+     various cleanups in the compiler.
+
+   * Rolf W. Rasmussen for hacking on AWT.
+
+   * David Reese of Sun Microsystems contributed to the Solaris on
+     PowerPC port.
+
+   * Volker Reichelt for keeping up with the problem reports.
+
+   * Joern Rennecke for maintaining the sh port, loop, regmove & reload
+     hacking.
+
+   * Loren J. Rittle for improvements to libstdc++-v3 including the
+     FreeBSD port, threading fixes, thread-related configury changes,
+     critical threading documentation, and solutions to really tricky
+     I/O problems, as well as keeping GCC properly working on FreeBSD
+     and continuous testing.
+
+   * Craig Rodrigues for processing tons of bug reports.
+
+   * Ola Ro"nnerup for work on mt_alloc.
+
+   * Gavin Romig-Koch for lots of behind the scenes MIPS work.
+
+   * David Ronis inspired and encouraged Craig to rewrite the G77
+     documentation in texinfo format by contributing a first pass at a
+     translation of the old `g77-0.5.16/f/DOC' file.
+
+   * Ken Rose for fixes to GCC's delay slot filling code.
+
+   * Paul Rubin wrote most of the preprocessor.
+
+   * Pe'tur Runo'lfsson for major performance improvements in C++
+     formatted I/O and large file support in C++ filebuf.
+
+   * Chip Salzenberg for libstdc++ patches and improvements to locales,
+     traits, Makefiles, libio, libtool hackery, and "long long" support.
+
+   * Juha Sarlin for improvements to the H8 code generator.
+
+   * Greg Satz assisted in making GCC work on HP-UX for the 9000 series
+     300.
+
+   * Roger Sayle for improvements to constant folding and GCC's RTL
+     optimizers as well as for fixing numerous bugs.
+
+   * Bradley Schatz for his work on the GCJ FAQ.
+
+   * Peter Schauer wrote the code to allow debugging to work on the
+     Alpha.
+
+   * William Schelter did most of the work on the Intel 80386 support.
+
+   * Tobias Schlu"ter for work on GNU Fortran.
+
+   * Bernd Schmidt for various code generation improvements and major
+     work in the reload pass as well a serving as release manager for
+     GCC 2.95.3.
+
+   * Peter Schmid for constant testing of libstdc++--especially
+     application testing, going above and beyond what was requested for
+     the release criteria--and libstdc++ header file tweaks.
+
+   * Jason Schroeder for jcf-dump patches.
+
+   * Andreas Schwab for his work on the m68k port.
+
+   * Lars Segerlund for work on GNU Fortran.
+
+   * Dodji Seketeli for numerous C++ bug fixes and debug info
+     improvements.
+
+   * Joel Sherrill for his direction via the steering committee, RTEMS
+     contributions and RTEMS testing.
+
+   * Nathan Sidwell for many C++ fixes/improvements.
+
+   * Jeffrey Siegal for helping RMS with the original design of GCC,
+     some code which handles the parse tree and RTL data structures,
+     constant folding and help with the original VAX & m68k ports.
+
+   * Kenny Simpson for prompting libstdc++ fixes due to defect reports
+     from the LWG (thereby keeping GCC in line with updates from the
+     ISO).
+
+   * Franz Sirl for his ongoing work with making the PPC port stable
+     for GNU/Linux.
+
+   * Andrey Slepuhin for assorted AIX hacking.
+
+   * Trevor Smigiel for contributing the SPU port.
+
+   * Christopher Smith did the port for Convex machines.
+
+   * Danny Smith for his major efforts on the Mingw (and Cygwin) ports.
+
+   * Randy Smith finished the Sun FPA support.
+
+   * Scott Snyder for queue, iterator, istream, and string fixes and
+     libstdc++ testsuite entries.  Also for providing the patch to G77
+     to add rudimentary support for `INTEGER*1', `INTEGER*2', and
+     `LOGICAL*1'.
+
+   * Brad Spencer for contributions to the GLIBCPP_FORCE_NEW technique.
+
+   * Richard Stallman, for writing the original GCC and launching the
+     GNU project.
+
+   * Jan Stein of the Chalmers Computer Society provided support for
+     Genix, as well as part of the 32000 machine description.
+
+   * Nigel Stephens for various mips16 related fixes/improvements.
+
+   * Jonathan Stone wrote the machine description for the Pyramid
+     computer.
+
+   * Graham Stott for various infrastructure improvements.
+
+   * John Stracke for his Java HTTP protocol fixes.
+
+   * Mike Stump for his Elxsi port, G++ contributions over the years
+     and more recently his vxworks contributions
+
+   * Jeff Sturm for Java porting help, bug fixes, and encouragement.
+
+   * Shigeya Suzuki for this fixes for the bsdi platforms.
+
+   * Ian Lance Taylor for the Go frontend, the initial mips16 and mips64
+     support, general configury hacking, fixincludes, etc.
+
+   * Holger Teutsch provided the support for the Clipper CPU.
+
+   * Gary Thomas for his ongoing work to make the PPC work for
+     GNU/Linux.
+
+   * Philipp Thomas for random bug fixes throughout the compiler
+
+   * Jason Thorpe for thread support in libstdc++ on NetBSD.
+
+   * Kresten Krab Thorup wrote the run time support for the Objective-C
+     language and the fantastic Java bytecode interpreter.
+
+   * Michael Tiemann for random bug fixes, the first instruction
+     scheduler, initial C++ support, function integration, NS32k, SPARC
+     and M88k machine description work, delay slot scheduling.
+
+   * Andreas Tobler for his work porting libgcj to Darwin.
+
+   * Teemu Torma for thread safe exception handling support.
+
+   * Leonard Tower wrote parts of the parser, RTL generator, and RTL
+     definitions, and of the VAX machine description.
+
+   * Daniel Towner and Hariharan Sandanagobalane contributed and
+     maintain the picoChip port.
+
+   * Tom Tromey for internationalization support and for his many Java
+     contributions and libgcj maintainership.
+
+   * Lassi Tuura for improvements to config.guess to determine HP
+     processor types.
+
+   * Petter Urkedal for libstdc++ CXXFLAGS, math, and algorithms fixes.
+
+   * Andy Vaught for the design and initial implementation of the GNU
+     Fortran front end.
+
+   * Brent Verner for work with the libstdc++ cshadow files and their
+     associated configure steps.
+
+   * Todd Vierling for contributions for NetBSD ports.
+
+   * Jonathan Wakely for contributing libstdc++ Doxygen notes and XHTML
+     guidance.
+
+   * Dean Wakerley for converting the install documentation from HTML
+     to texinfo in time for GCC 3.0.
+
+   * Krister Walfridsson for random bug fixes.
+
+   * Feng Wang for contributions to GNU Fortran.
+
+   * Stephen M. Webb for time and effort on making libstdc++ shadow
+     files work with the tricky Solaris 8+ headers, and for pushing the
+     build-time header tree.
+
+   * John Wehle for various improvements for the x86 code generator,
+     related infrastructure improvements to help x86 code generation,
+     value range propagation and other work, WE32k port.
+
+   * Ulrich Weigand for work on the s390 port.
+
+   * Zack Weinberg for major work on cpplib and various other bug fixes.
+
+   * Matt Welsh for help with Linux Threads support in GCJ.
+
+   * Urban Widmark for help fixing java.io.
+
+   * Mark Wielaard for new Java library code and his work integrating
+     with Classpath.
+
+   * Dale Wiles helped port GCC to the Tahoe.
+
+   * Bob Wilson from Tensilica, Inc. for the Xtensa port.
+
+   * Jim Wilson for his direction via the steering committee, tackling
+     hard problems in various places that nobody else wanted to work
+     on, strength reduction and other loop optimizations.
+
+   * Paul Woegerer and Tal Agmon for the CRX port.
+
+   * Carlo Wood for various fixes.
+
+   * Tom Wood for work on the m88k port.
+
+   * Canqun Yang for work on GNU Fortran.
+
+   * Masanobu Yuhara of Fujitsu Laboratories implemented the machine
+     description for the Tron architecture (specifically, the Gmicro).
+
+   * Kevin Zachmann helped port GCC to the Tahoe.
+
+   * Ayal Zaks for Swing Modulo Scheduling (SMS).
+
+   * Xiaoqiang Zhang for work on GNU Fortran.
+
+   * Gilles Zunino for help porting Java to Irix.
+
+
+ The following people are recognized for their contributions to GNAT,
+the Ada front end of GCC:
+   * Bernard Banner
+
+   * Romain Berrendonner
+
+   * Geert Bosch
+
+   * Emmanuel Briot
+
+   * Joel Brobecker
+
+   * Ben Brosgol
+
+   * Vincent Celier
+
+   * Arnaud Charlet
+
+   * Chien Chieng
+
+   * Cyrille Comar
+
+   * Cyrille Crozes
+
+   * Robert Dewar
+
+   * Gary Dismukes
+
+   * Robert Duff
+
+   * Ed Falis
+
+   * Ramon Fernandez
+
+   * Sam Figueroa
+
+   * Vasiliy Fofanov
+
+   * Michael Friess
+
+   * Franco Gasperoni
+
+   * Ted Giering
+
+   * Matthew Gingell
+
+   * Laurent Guerby
+
+   * Jerome Guitton
+
+   * Olivier Hainque
+
+   * Jerome Hugues
+
+   * Hristian Kirtchev
+
+   * Jerome Lambourg
+
+   * Bruno Leclerc
+
+   * Albert Lee
+
+   * Sean McNeil
+
+   * Javier Miranda
+
+   * Laurent Nana
+
+   * Pascal Obry
+
+   * Dong-Ik Oh
+
+   * Laurent Pautet
+
+   * Brett Porter
+
+   * Thomas Quinot
+
+   * Nicolas Roche
+
+   * Pat Rogers
+
+   * Jose Ruiz
+
+   * Douglas Rupp
+
+   * Sergey Rybin
+
+   * Gail Schenker
+
+   * Ed Schonberg
+
+   * Nicolas Setton
+
+   * Samuel Tardieu
+
+
+ The following people are recognized for their contributions of new
+features, bug reports, testing and integration of classpath/libgcj for
+GCC version 4.1:
+   * Lillian Angel for `JTree' implementation and lots Free Swing
+     additions and bug fixes.
+
+   * Wolfgang Baer for `GapContent' bug fixes.
+
+   * Anthony Balkissoon for `JList', Free Swing 1.5 updates and mouse
+     event fixes, lots of Free Swing work including `JTable' editing.
+
+   * Stuart Ballard for RMI constant fixes.
+
+   * Goffredo Baroncelli for `HTTPURLConnection' fixes.
+
+   * Gary Benson for `MessageFormat' fixes.
+
+   * Daniel Bonniot for `Serialization' fixes.
+
+   * Chris Burdess for lots of gnu.xml and http protocol fixes, `StAX'
+     and `DOM xml:id' support.
+
+   * Ka-Hing Cheung for `TreePath' and `TreeSelection' fixes.
+
+   * Archie Cobbs for build fixes, VM interface updates,
+     `URLClassLoader' updates.
+
+   * Kelley Cook for build fixes.
+
+   * Martin Cordova for Suggestions for better `SocketTimeoutException'.
+
+   * David Daney for `BitSet' bug fixes, `HttpURLConnection' rewrite
+     and improvements.
+
+   * Thomas Fitzsimmons for lots of upgrades to the gtk+ AWT and Cairo
+     2D support. Lots of imageio framework additions, lots of AWT and
+     Free Swing bug fixes.
+
+   * Jeroen Frijters for `ClassLoader' and nio cleanups, serialization
+     fixes, better `Proxy' support, bug fixes and IKVM integration.
+
+   * Santiago Gala for `AccessControlContext' fixes.
+
+   * Nicolas Geoffray for `VMClassLoader' and `AccessController'
+     improvements.
+
+   * David Gilbert for `basic' and `metal' icon and plaf support and
+     lots of documenting, Lots of Free Swing and metal theme additions.
+     `MetalIconFactory' implementation.
+
+   * Anthony Green for `MIDI' framework, `ALSA' and `DSSI' providers.
+
+   * Andrew Haley for `Serialization' and `URLClassLoader' fixes, gcj
+     build speedups.
+
+   * Kim Ho for `JFileChooser' implementation.
+
+   * Andrew John Hughes for `Locale' and net fixes, URI RFC2986
+     updates, `Serialization' fixes, `Properties' XML support and
+     generic branch work, VMIntegration guide update.
+
+   * Bastiaan Huisman for `TimeZone' bug fixing.
+
+   * Andreas Jaeger for mprec updates.
+
+   * Paul Jenner for better `-Werror' support.
+
+   * Ito Kazumitsu for `NetworkInterface' implementation and updates.
+
+   * Roman Kennke for `BoxLayout', `GrayFilter' and `SplitPane', plus
+     bug fixes all over. Lots of Free Swing work including styled text.
+
+   * Simon Kitching for `String' cleanups and optimization suggestions.
+
+   * Michael Koch for configuration fixes, `Locale' updates, bug and
+     build fixes.
+
+   * Guilhem Lavaux for configuration, thread and channel fixes and
+     Kaffe integration. JCL native `Pointer' updates. Logger bug fixes.
+
+   * David Lichteblau for JCL support library global/local reference
+     cleanups.
+
+   * Aaron Luchko for JDWP updates and documentation fixes.
+
+   * Ziga Mahkovec for `Graphics2D' upgraded to Cairo 0.5 and new regex
+     features.
+
+   * Sven de Marothy for BMP imageio support, CSS and `TextLayout'
+     fixes. `GtkImage' rewrite, 2D, awt, free swing and date/time fixes
+     and implementing the Qt4 peers.
+
+   * Casey Marshall for crypto algorithm fixes, `FileChannel' lock,
+     `SystemLogger' and `FileHandler' rotate implementations, NIO
+     `FileChannel.map' support, security and policy updates.
+
+   * Bryce McKinlay for RMI work.
+
+   * Audrius Meskauskas for lots of Free Corba, RMI and HTML work plus
+     testing and documenting.
+
+   * Kalle Olavi Niemitalo for build fixes.
+
+   * Rainer Orth for build fixes.
+
+   * Andrew Overholt for `File' locking fixes.
+
+   * Ingo Proetel for `Image', `Logger' and `URLClassLoader' updates.
+
+   * Olga Rodimina for `MenuSelectionManager' implementation.
+
+   * Jan Roehrich for `BasicTreeUI' and `JTree' fixes.
+
+   * Julian Scheid for documentation updates and gjdoc support.
+
+   * Christian Schlichtherle for zip fixes and cleanups.
+
+   * Robert Schuster for documentation updates and beans fixes,
+     `TreeNode' enumerations and `ActionCommand' and various fixes, XML
+     and URL, AWT and Free Swing bug fixes.
+
+   * Keith Seitz for lots of JDWP work.
+
+   * Christian Thalinger for 64-bit cleanups, Configuration and VM
+     interface fixes and `CACAO' integration, `fdlibm' updates.
+
+   * Gael Thomas for `VMClassLoader' boot packages support suggestions.
+
+   * Andreas Tobler for Darwin and Solaris testing and fixing, `Qt4'
+     support for Darwin/OS X, `Graphics2D' support, `gtk+' updates.
+
+   * Dalibor Topic for better `DEBUG' support, build cleanups and Kaffe
+     integration. `Qt4' build infrastructure, `SHA1PRNG' and
+     `GdkPixbugDecoder' updates.
+
+   * Tom Tromey for Eclipse integration, generics work, lots of bug
+     fixes and gcj integration including coordinating The Big Merge.
+
+   * Mark Wielaard for bug fixes, packaging and release management,
+     `Clipboard' implementation, system call interrupts and network
+     timeouts and `GdkPixpufDecoder' fixes.
+
+
+ In addition to the above, all of which also contributed time and
+energy in testing GCC, we would like to thank the following for their
+contributions to testing:
+
+   * Michael Abd-El-Malek
+
+   * Thomas Arend
+
+   * Bonzo Armstrong
+
+   * Steven Ashe
+
+   * Chris Baldwin
+
+   * David Billinghurst
+
+   * Jim Blandy
+
+   * Stephane Bortzmeyer
+
+   * Horst von Brand
+
+   * Frank Braun
+
+   * Rodney Brown
+
+   * Sidney Cadot
+
+   * Bradford Castalia
+
+   * Robert Clark
+
+   * Jonathan Corbet
+
+   * Ralph Doncaster
+
+   * Richard Emberson
+
+   * Levente Farkas
+
+   * Graham Fawcett
+
+   * Mark Fernyhough
+
+   * Robert A. French
+
+   * Jo"rgen Freyh
+
+   * Mark K. Gardner
+
+   * Charles-Antoine Gauthier
+
+   * Yung Shing Gene
+
+   * David Gilbert
+
+   * Simon Gornall
+
+   * Fred Gray
+
+   * John Griffin
+
+   * Patrik Hagglund
+
+   * Phil Hargett
+
+   * Amancio Hasty
+
+   * Takafumi Hayashi
+
+   * Bryan W. Headley
+
+   * Kevin B. Hendricks
+
+   * Joep Jansen
+
+   * Christian Joensson
+
+   * Michel Kern
+
+   * David Kidd
+
+   * Tobias Kuipers
+
+   * Anand Krishnaswamy
+
+   * A. O. V. Le Blanc
+
+   * llewelly
+
+   * Damon Love
+
+   * Brad Lucier
+
+   * Matthias Klose
+
+   * Martin Knoblauch
+
+   * Rick Lutowski
+
+   * Jesse Macnish
+
+   * Stefan Morrell
+
+   * Anon A. Mous
+
+   * Matthias Mueller
+
+   * Pekka Nikander
+
+   * Rick Niles
+
+   * Jon Olson
+
+   * Magnus Persson
+
+   * Chris Pollard
+
+   * Richard Polton
+
+   * Derk Reefman
+
+   * David Rees
+
+   * Paul Reilly
+
+   * Tom Reilly
+
+   * Torsten Rueger
+
+   * Danny Sadinoff
+
+   * Marc Schifer
+
+   * Erik Schnetter
+
+   * Wayne K. Schroll
+
+   * David Schuler
+
+   * Vin Shelton
+
+   * Tim Souder
+
+   * Adam Sulmicki
+
+   * Bill Thorson
+
+   * George Talbot
+
+   * Pedro A. M. Vazquez
+
+   * Gregory Warnes
+
+   * Ian Watson
+
+   * David E. Young
+
+   * And many others
+
+ And finally we'd like to thank everyone who uses the compiler, provides
+feedback and generally reminds us why we're doing this work in the first
+place.
+
+
+File: gccint.info,  Node: Option Index,  Next: Concept Index,  Prev: Contributors,  Up: Top
+
+Option Index
+************
+
+GCC's command line options are indexed here without any initial `-' or
+`--'.  Where an option has both positive and negative forms (such as
+`-fOPTION' and `-fno-OPTION'), relevant entries in the manual are
+indexed under the most appropriate form; it may sometimes be useful to
+look up both forms.
+
+
+* Menu:
+
+* fltrans:                               LTO.                 (line 499)
+* fltrans-output-list:                   LTO.                 (line 504)
+* fwpa:                                  LTO.                 (line 490)
+* msoft-float:                           Soft float library routines.
+                                                              (line   6)
+
+
+File: gccint.info,  Node: Concept Index,  Prev: Option Index,  Up: Top
+
+Concept Index
+*************
+
+
+* Menu:
+
+* ! in constraint:                       Multi-Alternative.  (line   47)
+* # in constraint:                       Modifiers.          (line   67)
+* # in template:                         Output Template.    (line   66)
+* #pragma:                               Misc.               (line  381)
+* % in constraint:                       Modifiers.          (line   45)
+* % in GTY option:                       GTY Options.        (line   18)
+* % in template:                         Output Template.    (line    6)
+* & in constraint:                       Modifiers.          (line   25)
+* (nil):                                 RTL Objects.        (line   73)
+* * in constraint:                       Modifiers.          (line   72)
+* * in template:                         Output Statement.   (line   29)
+* + in constraint:                       Modifiers.          (line   12)
+* -fsection-anchors <1>:                 Anchored Addresses. (line    6)
+* -fsection-anchors:                     Special Accessors.  (line  110)
+* /c in RTL dump:                        Flags.              (line  239)
+* /f in RTL dump:                        Flags.              (line  247)
+* /i in RTL dump:                        Flags.              (line  299)
+* /j in RTL dump:                        Flags.              (line  314)
+* /s in RTL dump:                        Flags.              (line  263)
+* /u in RTL dump:                        Flags.              (line  324)
+* /v in RTL dump:                        Flags.              (line  356)
+* 0 in constraint:                       Simple Constraints. (line  130)
+* < in constraint:                       Simple Constraints. (line   48)
+* = in constraint:                       Modifiers.          (line    8)
+* > in constraint:                       Simple Constraints. (line   61)
+* ? in constraint:                       Multi-Alternative.  (line   41)
+* \:                                     Output Template.    (line   46)
+* __absvdi2:                             Integer library routines.
+                                                             (line  107)
+* __absvsi2:                             Integer library routines.
+                                                             (line  106)
+* __addda3:                              Fixed-point fractional library routines.
+                                                             (line   45)
+* __adddf3:                              Soft float library routines.
+                                                             (line   23)
+* __adddq3:                              Fixed-point fractional library routines.
+                                                             (line   33)
+* __addha3:                              Fixed-point fractional library routines.
+                                                             (line   43)
+* __addhq3:                              Fixed-point fractional library routines.
+                                                             (line   30)
+* __addqq3:                              Fixed-point fractional library routines.
+                                                             (line   29)
+* __addsa3:                              Fixed-point fractional library routines.
+                                                             (line   44)
+* __addsf3:                              Soft float library routines.
+                                                             (line   22)
+* __addsq3:                              Fixed-point fractional library routines.
+                                                             (line   31)
+* __addta3:                              Fixed-point fractional library routines.
+                                                             (line   47)
+* __addtf3:                              Soft float library routines.
+                                                             (line   25)
+* __adduda3:                             Fixed-point fractional library routines.
+                                                             (line   53)
+* __addudq3:                             Fixed-point fractional library routines.
+                                                             (line   41)
+* __adduha3:                             Fixed-point fractional library routines.
+                                                             (line   49)
+* __adduhq3:                             Fixed-point fractional library routines.
+                                                             (line   37)
+* __adduqq3:                             Fixed-point fractional library routines.
+                                                             (line   35)
+* __addusa3:                             Fixed-point fractional library routines.
+                                                             (line   51)
+* __addusq3:                             Fixed-point fractional library routines.
+                                                             (line   39)
+* __adduta3:                             Fixed-point fractional library routines.
+                                                             (line   55)
+* __addvdi3:                             Integer library routines.
+                                                             (line  111)
+* __addvsi3:                             Integer library routines.
+                                                             (line  110)
+* __addxf3:                              Soft float library routines.
+                                                             (line   27)
+* __ashlda3:                             Fixed-point fractional library routines.
+                                                             (line  351)
+* __ashldi3:                             Integer library routines.
+                                                             (line   14)
+* __ashldq3:                             Fixed-point fractional library routines.
+                                                             (line  340)
+* __ashlha3:                             Fixed-point fractional library routines.
+                                                             (line  349)
+* __ashlhq3:                             Fixed-point fractional library routines.
+                                                             (line  337)
+* __ashlqq3:                             Fixed-point fractional library routines.
+                                                             (line  336)
+* __ashlsa3:                             Fixed-point fractional library routines.
+                                                             (line  350)
+* __ashlsi3:                             Integer library routines.
+                                                             (line   13)
+* __ashlsq3:                             Fixed-point fractional library routines.
+                                                             (line  338)
+* __ashlta3:                             Fixed-point fractional library routines.
+                                                             (line  353)
+* __ashlti3:                             Integer library routines.
+                                                             (line   15)
+* __ashluda3:                            Fixed-point fractional library routines.
+                                                             (line  359)
+* __ashludq3:                            Fixed-point fractional library routines.
+                                                             (line  348)
+* __ashluha3:                            Fixed-point fractional library routines.
+                                                             (line  355)
+* __ashluhq3:                            Fixed-point fractional library routines.
+                                                             (line  344)
+* __ashluqq3:                            Fixed-point fractional library routines.
+                                                             (line  342)
+* __ashlusa3:                            Fixed-point fractional library routines.
+                                                             (line  357)
+* __ashlusq3:                            Fixed-point fractional library routines.
+                                                             (line  346)
+* __ashluta3:                            Fixed-point fractional library routines.
+                                                             (line  361)
+* __ashrda3:                             Fixed-point fractional library routines.
+                                                             (line  371)
+* __ashrdi3:                             Integer library routines.
+                                                             (line   19)
+* __ashrdq3:                             Fixed-point fractional library routines.
+                                                             (line  368)
+* __ashrha3:                             Fixed-point fractional library routines.
+                                                             (line  369)
+* __ashrhq3:                             Fixed-point fractional library routines.
+                                                             (line  365)
+* __ashrqq3:                             Fixed-point fractional library routines.
+                                                             (line  364)
+* __ashrsa3:                             Fixed-point fractional library routines.
+                                                             (line  370)
+* __ashrsi3:                             Integer library routines.
+                                                             (line   18)
+* __ashrsq3:                             Fixed-point fractional library routines.
+                                                             (line  366)
+* __ashrta3:                             Fixed-point fractional library routines.
+                                                             (line  373)
+* __ashrti3:                             Integer library routines.
+                                                             (line   20)
+* __bid_adddd3:                          Decimal float library routines.
+                                                             (line   25)
+* __bid_addsd3:                          Decimal float library routines.
+                                                             (line   21)
+* __bid_addtd3:                          Decimal float library routines.
+                                                             (line   29)
+* __bid_divdd3:                          Decimal float library routines.
+                                                             (line   68)
+* __bid_divsd3:                          Decimal float library routines.
+                                                             (line   64)
+* __bid_divtd3:                          Decimal float library routines.
+                                                             (line   72)
+* __bid_eqdd2:                           Decimal float library routines.
+                                                             (line  259)
+* __bid_eqsd2:                           Decimal float library routines.
+                                                             (line  257)
+* __bid_eqtd2:                           Decimal float library routines.
+                                                             (line  261)
+* __bid_extendddtd2:                     Decimal float library routines.
+                                                             (line   92)
+* __bid_extendddtf:                      Decimal float library routines.
+                                                             (line  140)
+* __bid_extendddxf:                      Decimal float library routines.
+                                                             (line  134)
+* __bid_extenddfdd:                      Decimal float library routines.
+                                                             (line  147)
+* __bid_extenddftd:                      Decimal float library routines.
+                                                             (line  107)
+* __bid_extendsddd2:                     Decimal float library routines.
+                                                             (line   88)
+* __bid_extendsddf:                      Decimal float library routines.
+                                                             (line  128)
+* __bid_extendsdtd2:                     Decimal float library routines.
+                                                             (line   90)
+* __bid_extendsdtf:                      Decimal float library routines.
+                                                             (line  138)
+* __bid_extendsdxf:                      Decimal float library routines.
+                                                             (line  132)
+* __bid_extendsfdd:                      Decimal float library routines.
+                                                             (line  103)
+* __bid_extendsfsd:                      Decimal float library routines.
+                                                             (line  145)
+* __bid_extendsftd:                      Decimal float library routines.
+                                                             (line  105)
+* __bid_extendtftd:                      Decimal float library routines.
+                                                             (line  149)
+* __bid_extendxftd:                      Decimal float library routines.
+                                                             (line  109)
+* __bid_fixdddi:                         Decimal float library routines.
+                                                             (line  170)
+* __bid_fixddsi:                         Decimal float library routines.
+                                                             (line  162)
+* __bid_fixsddi:                         Decimal float library routines.
+                                                             (line  168)
+* __bid_fixsdsi:                         Decimal float library routines.
+                                                             (line  160)
+* __bid_fixtddi:                         Decimal float library routines.
+                                                             (line  172)
+* __bid_fixtdsi:                         Decimal float library routines.
+                                                             (line  164)
+* __bid_fixunsdddi:                      Decimal float library routines.
+                                                             (line  187)
+* __bid_fixunsddsi:                      Decimal float library routines.
+                                                             (line  178)
+* __bid_fixunssddi:                      Decimal float library routines.
+                                                             (line  185)
+* __bid_fixunssdsi:                      Decimal float library routines.
+                                                             (line  176)
+* __bid_fixunstddi:                      Decimal float library routines.
+                                                             (line  189)
+* __bid_fixunstdsi:                      Decimal float library routines.
+                                                             (line  180)
+* __bid_floatdidd:                       Decimal float library routines.
+                                                             (line  205)
+* __bid_floatdisd:                       Decimal float library routines.
+                                                             (line  203)
+* __bid_floatditd:                       Decimal float library routines.
+                                                             (line  207)
+* __bid_floatsidd:                       Decimal float library routines.
+                                                             (line  196)
+* __bid_floatsisd:                       Decimal float library routines.
+                                                             (line  194)
+* __bid_floatsitd:                       Decimal float library routines.
+                                                             (line  198)
+* __bid_floatunsdidd:                    Decimal float library routines.
+                                                             (line  223)
+* __bid_floatunsdisd:                    Decimal float library routines.
+                                                             (line  221)
+* __bid_floatunsditd:                    Decimal float library routines.
+                                                             (line  225)
+* __bid_floatunssidd:                    Decimal float library routines.
+                                                             (line  214)
+* __bid_floatunssisd:                    Decimal float library routines.
+                                                             (line  212)
+* __bid_floatunssitd:                    Decimal float library routines.
+                                                             (line  216)
+* __bid_gedd2:                           Decimal float library routines.
+                                                             (line  277)
+* __bid_gesd2:                           Decimal float library routines.
+                                                             (line  275)
+* __bid_getd2:                           Decimal float library routines.
+                                                             (line  279)
+* __bid_gtdd2:                           Decimal float library routines.
+                                                             (line  304)
+* __bid_gtsd2:                           Decimal float library routines.
+                                                             (line  302)
+* __bid_gttd2:                           Decimal float library routines.
+                                                             (line  306)
+* __bid_ledd2:                           Decimal float library routines.
+                                                             (line  295)
+* __bid_lesd2:                           Decimal float library routines.
+                                                             (line  293)
+* __bid_letd2:                           Decimal float library routines.
+                                                             (line  297)
+* __bid_ltdd2:                           Decimal float library routines.
+                                                             (line  286)
+* __bid_ltsd2:                           Decimal float library routines.
+                                                             (line  284)
+* __bid_lttd2:                           Decimal float library routines.
+                                                             (line  288)
+* __bid_muldd3:                          Decimal float library routines.
+                                                             (line   54)
+* __bid_mulsd3:                          Decimal float library routines.
+                                                             (line   50)
+* __bid_multd3:                          Decimal float library routines.
+                                                             (line   58)
+* __bid_nedd2:                           Decimal float library routines.
+                                                             (line  268)
+* __bid_negdd2:                          Decimal float library routines.
+                                                             (line   78)
+* __bid_negsd2:                          Decimal float library routines.
+                                                             (line   76)
+* __bid_negtd2:                          Decimal float library routines.
+                                                             (line   80)
+* __bid_nesd2:                           Decimal float library routines.
+                                                             (line  266)
+* __bid_netd2:                           Decimal float library routines.
+                                                             (line  270)
+* __bid_subdd3:                          Decimal float library routines.
+                                                             (line   39)
+* __bid_subsd3:                          Decimal float library routines.
+                                                             (line   35)
+* __bid_subtd3:                          Decimal float library routines.
+                                                             (line   43)
+* __bid_truncdddf:                       Decimal float library routines.
+                                                             (line  153)
+* __bid_truncddsd2:                      Decimal float library routines.
+                                                             (line   94)
+* __bid_truncddsf:                       Decimal float library routines.
+                                                             (line  124)
+* __bid_truncdfsd:                       Decimal float library routines.
+                                                             (line  111)
+* __bid_truncsdsf:                       Decimal float library routines.
+                                                             (line  151)
+* __bid_trunctddd2:                      Decimal float library routines.
+                                                             (line   98)
+* __bid_trunctddf:                       Decimal float library routines.
+                                                             (line  130)
+* __bid_trunctdsd2:                      Decimal float library routines.
+                                                             (line   96)
+* __bid_trunctdsf:                       Decimal float library routines.
+                                                             (line  126)
+* __bid_trunctdtf:                       Decimal float library routines.
+                                                             (line  155)
+* __bid_trunctdxf:                       Decimal float library routines.
+                                                             (line  136)
+* __bid_trunctfdd:                       Decimal float library routines.
+                                                             (line  119)
+* __bid_trunctfsd:                       Decimal float library routines.
+                                                             (line  115)
+* __bid_truncxfdd:                       Decimal float library routines.
+                                                             (line  117)
+* __bid_truncxfsd:                       Decimal float library routines.
+                                                             (line  113)
+* __bid_unorddd2:                        Decimal float library routines.
+                                                             (line  235)
+* __bid_unordsd2:                        Decimal float library routines.
+                                                             (line  233)
+* __bid_unordtd2:                        Decimal float library routines.
+                                                             (line  237)
+* __bswapdi2:                            Integer library routines.
+                                                             (line  162)
+* __bswapsi2:                            Integer library routines.
+                                                             (line  161)
+* __builtin_classify_type:               Varargs.            (line   51)
+* __builtin_next_arg:                    Varargs.            (line   42)
+* __builtin_saveregs:                    Varargs.            (line   24)
+* __clear_cache:                         Miscellaneous routines.
+                                                             (line   10)
+* __clzdi2:                              Integer library routines.
+                                                             (line  131)
+* __clzsi2:                              Integer library routines.
+                                                             (line  130)
+* __clzti2:                              Integer library routines.
+                                                             (line  132)
+* __cmpda2:                              Fixed-point fractional library routines.
+                                                             (line  451)
+* __cmpdf2:                              Soft float library routines.
+                                                             (line  164)
+* __cmpdi2:                              Integer library routines.
+                                                             (line   87)
+* __cmpdq2:                              Fixed-point fractional library routines.
+                                                             (line  441)
+* __cmpha2:                              Fixed-point fractional library routines.
+                                                             (line  449)
+* __cmphq2:                              Fixed-point fractional library routines.
+                                                             (line  438)
+* __cmpqq2:                              Fixed-point fractional library routines.
+                                                             (line  437)
+* __cmpsa2:                              Fixed-point fractional library routines.
+                                                             (line  450)
+* __cmpsf2:                              Soft float library routines.
+                                                             (line  163)
+* __cmpsq2:                              Fixed-point fractional library routines.
+                                                             (line  439)
+* __cmpta2:                              Fixed-point fractional library routines.
+                                                             (line  453)
+* __cmptf2:                              Soft float library routines.
+                                                             (line  165)
+* __cmpti2:                              Integer library routines.
+                                                             (line   88)
+* __cmpuda2:                             Fixed-point fractional library routines.
+                                                             (line  458)
+* __cmpudq2:                             Fixed-point fractional library routines.
+                                                             (line  448)
+* __cmpuha2:                             Fixed-point fractional library routines.
+                                                             (line  455)
+* __cmpuhq2:                             Fixed-point fractional library routines.
+                                                             (line  444)
+* __cmpuqq2:                             Fixed-point fractional library routines.
+                                                             (line  443)
+* __cmpusa2:                             Fixed-point fractional library routines.
+                                                             (line  456)
+* __cmpusq2:                             Fixed-point fractional library routines.
+                                                             (line  446)
+* __cmputa2:                             Fixed-point fractional library routines.
+                                                             (line  460)
+* __CTOR_LIST__:                         Initialization.     (line   25)
+* __ctzdi2:                              Integer library routines.
+                                                             (line  138)
+* __ctzsi2:                              Integer library routines.
+                                                             (line  137)
+* __ctzti2:                              Integer library routines.
+                                                             (line  139)
+* __divda3:                              Fixed-point fractional library routines.
+                                                             (line  227)
+* __divdc3:                              Soft float library routines.
+                                                             (line  252)
+* __divdf3:                              Soft float library routines.
+                                                             (line   48)
+* __divdi3:                              Integer library routines.
+                                                             (line   25)
+* __divdq3:                              Fixed-point fractional library routines.
+                                                             (line  223)
+* __divha3:                              Fixed-point fractional library routines.
+                                                             (line  225)
+* __divhq3:                              Fixed-point fractional library routines.
+                                                             (line  220)
+* __divqq3:                              Fixed-point fractional library routines.
+                                                             (line  219)
+* __divsa3:                              Fixed-point fractional library routines.
+                                                             (line  226)
+* __divsc3:                              Soft float library routines.
+                                                             (line  250)
+* __divsf3:                              Soft float library routines.
+                                                             (line   47)
+* __divsi3:                              Integer library routines.
+                                                             (line   24)
+* __divsq3:                              Fixed-point fractional library routines.
+                                                             (line  221)
+* __divta3:                              Fixed-point fractional library routines.
+                                                             (line  229)
+* __divtc3:                              Soft float library routines.
+                                                             (line  254)
+* __divtf3:                              Soft float library routines.
+                                                             (line   50)
+* __divti3:                              Integer library routines.
+                                                             (line   26)
+* __divxc3:                              Soft float library routines.
+                                                             (line  256)
+* __divxf3:                              Soft float library routines.
+                                                             (line   52)
+* __dpd_adddd3:                          Decimal float library routines.
+                                                             (line   23)
+* __dpd_addsd3:                          Decimal float library routines.
+                                                             (line   19)
+* __dpd_addtd3:                          Decimal float library routines.
+                                                             (line   27)
+* __dpd_divdd3:                          Decimal float library routines.
+                                                             (line   66)
+* __dpd_divsd3:                          Decimal float library routines.
+                                                             (line   62)
+* __dpd_divtd3:                          Decimal float library routines.
+                                                             (line   70)
+* __dpd_eqdd2:                           Decimal float library routines.
+                                                             (line  258)
+* __dpd_eqsd2:                           Decimal float library routines.
+                                                             (line  256)
+* __dpd_eqtd2:                           Decimal float library routines.
+                                                             (line  260)
+* __dpd_extendddtd2:                     Decimal float library routines.
+                                                             (line   91)
+* __dpd_extendddtf:                      Decimal float library routines.
+                                                             (line  139)
+* __dpd_extendddxf:                      Decimal float library routines.
+                                                             (line  133)
+* __dpd_extenddfdd:                      Decimal float library routines.
+                                                             (line  146)
+* __dpd_extenddftd:                      Decimal float library routines.
+                                                             (line  106)
+* __dpd_extendsddd2:                     Decimal float library routines.
+                                                             (line   87)
+* __dpd_extendsddf:                      Decimal float library routines.
+                                                             (line  127)
+* __dpd_extendsdtd2:                     Decimal float library routines.
+                                                             (line   89)
+* __dpd_extendsdtf:                      Decimal float library routines.
+                                                             (line  137)
+* __dpd_extendsdxf:                      Decimal float library routines.
+                                                             (line  131)
+* __dpd_extendsfdd:                      Decimal float library routines.
+                                                             (line  102)
+* __dpd_extendsfsd:                      Decimal float library routines.
+                                                             (line  144)
+* __dpd_extendsftd:                      Decimal float library routines.
+                                                             (line  104)
+* __dpd_extendtftd:                      Decimal float library routines.
+                                                             (line  148)
+* __dpd_extendxftd:                      Decimal float library routines.
+                                                             (line  108)
+* __dpd_fixdddi:                         Decimal float library routines.
+                                                             (line  169)
+* __dpd_fixddsi:                         Decimal float library routines.
+                                                             (line  161)
+* __dpd_fixsddi:                         Decimal float library routines.
+                                                             (line  167)
+* __dpd_fixsdsi:                         Decimal float library routines.
+                                                             (line  159)
+* __dpd_fixtddi:                         Decimal float library routines.
+                                                             (line  171)
+* __dpd_fixtdsi:                         Decimal float library routines.
+                                                             (line  163)
+* __dpd_fixunsdddi:                      Decimal float library routines.
+                                                             (line  186)
+* __dpd_fixunsddsi:                      Decimal float library routines.
+                                                             (line  177)
+* __dpd_fixunssddi:                      Decimal float library routines.
+                                                             (line  184)
+* __dpd_fixunssdsi:                      Decimal float library routines.
+                                                             (line  175)
+* __dpd_fixunstddi:                      Decimal float library routines.
+                                                             (line  188)
+* __dpd_fixunstdsi:                      Decimal float library routines.
+                                                             (line  179)
+* __dpd_floatdidd:                       Decimal float library routines.
+                                                             (line  204)
+* __dpd_floatdisd:                       Decimal float library routines.
+                                                             (line  202)
+* __dpd_floatditd:                       Decimal float library routines.
+                                                             (line  206)
+* __dpd_floatsidd:                       Decimal float library routines.
+                                                             (line  195)
+* __dpd_floatsisd:                       Decimal float library routines.
+                                                             (line  193)
+* __dpd_floatsitd:                       Decimal float library routines.
+                                                             (line  197)
+* __dpd_floatunsdidd:                    Decimal float library routines.
+                                                             (line  222)
+* __dpd_floatunsdisd:                    Decimal float library routines.
+                                                             (line  220)
+* __dpd_floatunsditd:                    Decimal float library routines.
+                                                             (line  224)
+* __dpd_floatunssidd:                    Decimal float library routines.
+                                                             (line  213)
+* __dpd_floatunssisd:                    Decimal float library routines.
+                                                             (line  211)
+* __dpd_floatunssitd:                    Decimal float library routines.
+                                                             (line  215)
+* __dpd_gedd2:                           Decimal float library routines.
+                                                             (line  276)
+* __dpd_gesd2:                           Decimal float library routines.
+                                                             (line  274)
+* __dpd_getd2:                           Decimal float library routines.
+                                                             (line  278)
+* __dpd_gtdd2:                           Decimal float library routines.
+                                                             (line  303)
+* __dpd_gtsd2:                           Decimal float library routines.
+                                                             (line  301)
+* __dpd_gttd2:                           Decimal float library routines.
+                                                             (line  305)
+* __dpd_ledd2:                           Decimal float library routines.
+                                                             (line  294)
+* __dpd_lesd2:                           Decimal float library routines.
+                                                             (line  292)
+* __dpd_letd2:                           Decimal float library routines.
+                                                             (line  296)
+* __dpd_ltdd2:                           Decimal float library routines.
+                                                             (line  285)
+* __dpd_ltsd2:                           Decimal float library routines.
+                                                             (line  283)
+* __dpd_lttd2:                           Decimal float library routines.
+                                                             (line  287)
+* __dpd_muldd3:                          Decimal float library routines.
+                                                             (line   52)
+* __dpd_mulsd3:                          Decimal float library routines.
+                                                             (line   48)
+* __dpd_multd3:                          Decimal float library routines.
+                                                             (line   56)
+* __dpd_nedd2:                           Decimal float library routines.
+                                                             (line  267)
+* __dpd_negdd2:                          Decimal float library routines.
+                                                             (line   77)
+* __dpd_negsd2:                          Decimal float library routines.
+                                                             (line   75)
+* __dpd_negtd2:                          Decimal float library routines.
+                                                             (line   79)
+* __dpd_nesd2:                           Decimal float library routines.
+                                                             (line  265)
+* __dpd_netd2:                           Decimal float library routines.
+                                                             (line  269)
+* __dpd_subdd3:                          Decimal float library routines.
+                                                             (line   37)
+* __dpd_subsd3:                          Decimal float library routines.
+                                                             (line   33)
+* __dpd_subtd3:                          Decimal float library routines.
+                                                             (line   41)
+* __dpd_truncdddf:                       Decimal float library routines.
+                                                             (line  152)
+* __dpd_truncddsd2:                      Decimal float library routines.
+                                                             (line   93)
+* __dpd_truncddsf:                       Decimal float library routines.
+                                                             (line  123)
+* __dpd_truncdfsd:                       Decimal float library routines.
+                                                             (line  110)
+* __dpd_truncsdsf:                       Decimal float library routines.
+                                                             (line  150)
+* __dpd_trunctddd2:                      Decimal float library routines.
+                                                             (line   97)
+* __dpd_trunctddf:                       Decimal float library routines.
+                                                             (line  129)
+* __dpd_trunctdsd2:                      Decimal float library routines.
+                                                             (line   95)
+* __dpd_trunctdsf:                       Decimal float library routines.
+                                                             (line  125)
+* __dpd_trunctdtf:                       Decimal float library routines.
+                                                             (line  154)
+* __dpd_trunctdxf:                       Decimal float library routines.
+                                                             (line  135)
+* __dpd_trunctfdd:                       Decimal float library routines.
+                                                             (line  118)
+* __dpd_trunctfsd:                       Decimal float library routines.
+                                                             (line  114)
+* __dpd_truncxfdd:                       Decimal float library routines.
+                                                             (line  116)
+* __dpd_truncxfsd:                       Decimal float library routines.
+                                                             (line  112)
+* __dpd_unorddd2:                        Decimal float library routines.
+                                                             (line  234)
+* __dpd_unordsd2:                        Decimal float library routines.
+                                                             (line  232)
+* __dpd_unordtd2:                        Decimal float library routines.
+                                                             (line  236)
+* __DTOR_LIST__:                         Initialization.     (line   25)
+* __eqdf2:                               Soft float library routines.
+                                                             (line  194)
+* __eqsf2:                               Soft float library routines.
+                                                             (line  193)
+* __eqtf2:                               Soft float library routines.
+                                                             (line  195)
+* __extenddftf2:                         Soft float library routines.
+                                                             (line   68)
+* __extenddfxf2:                         Soft float library routines.
+                                                             (line   69)
+* __extendsfdf2:                         Soft float library routines.
+                                                             (line   65)
+* __extendsftf2:                         Soft float library routines.
+                                                             (line   66)
+* __extendsfxf2:                         Soft float library routines.
+                                                             (line   67)
+* __ffsdi2:                              Integer library routines.
+                                                             (line  144)
+* __ffsti2:                              Integer library routines.
+                                                             (line  145)
+* __fixdfdi:                             Soft float library routines.
+                                                             (line   88)
+* __fixdfsi:                             Soft float library routines.
+                                                             (line   81)
+* __fixdfti:                             Soft float library routines.
+                                                             (line   94)
+* __fixsfdi:                             Soft float library routines.
+                                                             (line   87)
+* __fixsfsi:                             Soft float library routines.
+                                                             (line   80)
+* __fixsfti:                             Soft float library routines.
+                                                             (line   93)
+* __fixtfdi:                             Soft float library routines.
+                                                             (line   89)
+* __fixtfsi:                             Soft float library routines.
+                                                             (line   82)
+* __fixtfti:                             Soft float library routines.
+                                                             (line   95)
+* __fixunsdfdi:                          Soft float library routines.
+                                                             (line  108)
+* __fixunsdfsi:                          Soft float library routines.
+                                                             (line  101)
+* __fixunsdfti:                          Soft float library routines.
+                                                             (line  115)
+* __fixunssfdi:                          Soft float library routines.
+                                                             (line  107)
+* __fixunssfsi:                          Soft float library routines.
+                                                             (line  100)
+* __fixunssfti:                          Soft float library routines.
+                                                             (line  114)
+* __fixunstfdi:                          Soft float library routines.
+                                                             (line  109)
+* __fixunstfsi:                          Soft float library routines.
+                                                             (line  102)
+* __fixunstfti:                          Soft float library routines.
+                                                             (line  116)
+* __fixunsxfdi:                          Soft float library routines.
+                                                             (line  110)
+* __fixunsxfsi:                          Soft float library routines.
+                                                             (line  103)
+* __fixunsxfti:                          Soft float library routines.
+                                                             (line  117)
+* __fixxfdi:                             Soft float library routines.
+                                                             (line   90)
+* __fixxfsi:                             Soft float library routines.
+                                                             (line   83)
+* __fixxfti:                             Soft float library routines.
+                                                             (line   96)
+* __floatdidf:                           Soft float library routines.
+                                                             (line  128)
+* __floatdisf:                           Soft float library routines.
+                                                             (line  127)
+* __floatditf:                           Soft float library routines.
+                                                             (line  129)
+* __floatdixf:                           Soft float library routines.
+                                                             (line  130)
+* __floatsidf:                           Soft float library routines.
+                                                             (line  122)
+* __floatsisf:                           Soft float library routines.
+                                                             (line  121)
+* __floatsitf:                           Soft float library routines.
+                                                             (line  123)
+* __floatsixf:                           Soft float library routines.
+                                                             (line  124)
+* __floattidf:                           Soft float library routines.
+                                                             (line  134)
+* __floattisf:                           Soft float library routines.
+                                                             (line  133)
+* __floattitf:                           Soft float library routines.
+                                                             (line  135)
+* __floattixf:                           Soft float library routines.
+                                                             (line  136)
+* __floatundidf:                         Soft float library routines.
+                                                             (line  146)
+* __floatundisf:                         Soft float library routines.
+                                                             (line  145)
+* __floatunditf:                         Soft float library routines.
+                                                             (line  147)
+* __floatundixf:                         Soft float library routines.
+                                                             (line  148)
+* __floatunsidf:                         Soft float library routines.
+                                                             (line  140)
+* __floatunsisf:                         Soft float library routines.
+                                                             (line  139)
+* __floatunsitf:                         Soft float library routines.
+                                                             (line  141)
+* __floatunsixf:                         Soft float library routines.
+                                                             (line  142)
+* __floatuntidf:                         Soft float library routines.
+                                                             (line  152)
+* __floatuntisf:                         Soft float library routines.
+                                                             (line  151)
+* __floatuntitf:                         Soft float library routines.
+                                                             (line  153)
+* __floatuntixf:                         Soft float library routines.
+                                                             (line  154)
+* __fractdadf:                           Fixed-point fractional library routines.
+                                                             (line  636)
+* __fractdadi:                           Fixed-point fractional library routines.
+                                                             (line  633)
+* __fractdadq:                           Fixed-point fractional library routines.
+                                                             (line  616)
+* __fractdaha2:                          Fixed-point fractional library routines.
+                                                             (line  617)
+* __fractdahi:                           Fixed-point fractional library routines.
+                                                             (line  631)
+* __fractdahq:                           Fixed-point fractional library routines.
+                                                             (line  614)
+* __fractdaqi:                           Fixed-point fractional library routines.
+                                                             (line  630)
+* __fractdaqq:                           Fixed-point fractional library routines.
+                                                             (line  613)
+* __fractdasa2:                          Fixed-point fractional library routines.
+                                                             (line  618)
+* __fractdasf:                           Fixed-point fractional library routines.
+                                                             (line  635)
+* __fractdasi:                           Fixed-point fractional library routines.
+                                                             (line  632)
+* __fractdasq:                           Fixed-point fractional library routines.
+                                                             (line  615)
+* __fractdata2:                          Fixed-point fractional library routines.
+                                                             (line  619)
+* __fractdati:                           Fixed-point fractional library routines.
+                                                             (line  634)
+* __fractdauda:                          Fixed-point fractional library routines.
+                                                             (line  627)
+* __fractdaudq:                          Fixed-point fractional library routines.
+                                                             (line  624)
+* __fractdauha:                          Fixed-point fractional library routines.
+                                                             (line  625)
+* __fractdauhq:                          Fixed-point fractional library routines.
+                                                             (line  621)
+* __fractdauqq:                          Fixed-point fractional library routines.
+                                                             (line  620)
+* __fractdausa:                          Fixed-point fractional library routines.
+                                                             (line  626)
+* __fractdausq:                          Fixed-point fractional library routines.
+                                                             (line  622)
+* __fractdauta:                          Fixed-point fractional library routines.
+                                                             (line  629)
+* __fractdfda:                           Fixed-point fractional library routines.
+                                                             (line 1025)
+* __fractdfdq:                           Fixed-point fractional library routines.
+                                                             (line 1022)
+* __fractdfha:                           Fixed-point fractional library routines.
+                                                             (line 1023)
+* __fractdfhq:                           Fixed-point fractional library routines.
+                                                             (line 1020)
+* __fractdfqq:                           Fixed-point fractional library routines.
+                                                             (line 1019)
+* __fractdfsa:                           Fixed-point fractional library routines.
+                                                             (line 1024)
+* __fractdfsq:                           Fixed-point fractional library routines.
+                                                             (line 1021)
+* __fractdfta:                           Fixed-point fractional library routines.
+                                                             (line 1026)
+* __fractdfuda:                          Fixed-point fractional library routines.
+                                                             (line 1033)
+* __fractdfudq:                          Fixed-point fractional library routines.
+                                                             (line 1030)
+* __fractdfuha:                          Fixed-point fractional library routines.
+                                                             (line 1031)
+* __fractdfuhq:                          Fixed-point fractional library routines.
+                                                             (line 1028)
+* __fractdfuqq:                          Fixed-point fractional library routines.
+                                                             (line 1027)
+* __fractdfusa:                          Fixed-point fractional library routines.
+                                                             (line 1032)
+* __fractdfusq:                          Fixed-point fractional library routines.
+                                                             (line 1029)
+* __fractdfuta:                          Fixed-point fractional library routines.
+                                                             (line 1034)
+* __fractdida:                           Fixed-point fractional library routines.
+                                                             (line  975)
+* __fractdidq:                           Fixed-point fractional library routines.
+                                                             (line  972)
+* __fractdiha:                           Fixed-point fractional library routines.
+                                                             (line  973)
+* __fractdihq:                           Fixed-point fractional library routines.
+                                                             (line  970)
+* __fractdiqq:                           Fixed-point fractional library routines.
+                                                             (line  969)
+* __fractdisa:                           Fixed-point fractional library routines.
+                                                             (line  974)
+* __fractdisq:                           Fixed-point fractional library routines.
+                                                             (line  971)
+* __fractdita:                           Fixed-point fractional library routines.
+                                                             (line  976)
+* __fractdiuda:                          Fixed-point fractional library routines.
+                                                             (line  983)
+* __fractdiudq:                          Fixed-point fractional library routines.
+                                                             (line  980)
+* __fractdiuha:                          Fixed-point fractional library routines.
+                                                             (line  981)
+* __fractdiuhq:                          Fixed-point fractional library routines.
+                                                             (line  978)
+* __fractdiuqq:                          Fixed-point fractional library routines.
+                                                             (line  977)
+* __fractdiusa:                          Fixed-point fractional library routines.
+                                                             (line  982)
+* __fractdiusq:                          Fixed-point fractional library routines.
+                                                             (line  979)
+* __fractdiuta:                          Fixed-point fractional library routines.
+                                                             (line  984)
+* __fractdqda:                           Fixed-point fractional library routines.
+                                                             (line  544)
+* __fractdqdf:                           Fixed-point fractional library routines.
+                                                             (line  566)
+* __fractdqdi:                           Fixed-point fractional library routines.
+                                                             (line  563)
+* __fractdqha:                           Fixed-point fractional library routines.
+                                                             (line  542)
+* __fractdqhi:                           Fixed-point fractional library routines.
+                                                             (line  561)
+* __fractdqhq2:                          Fixed-point fractional library routines.
+                                                             (line  540)
+* __fractdqqi:                           Fixed-point fractional library routines.
+                                                             (line  560)
+* __fractdqqq2:                          Fixed-point fractional library routines.
+                                                             (line  539)
+* __fractdqsa:                           Fixed-point fractional library routines.
+                                                             (line  543)
+* __fractdqsf:                           Fixed-point fractional library routines.
+                                                             (line  565)
+* __fractdqsi:                           Fixed-point fractional library routines.
+                                                             (line  562)
+* __fractdqsq2:                          Fixed-point fractional library routines.
+                                                             (line  541)
+* __fractdqta:                           Fixed-point fractional library routines.
+                                                             (line  545)
+* __fractdqti:                           Fixed-point fractional library routines.
+                                                             (line  564)
+* __fractdquda:                          Fixed-point fractional library routines.
+                                                             (line  557)
+* __fractdqudq:                          Fixed-point fractional library routines.
+                                                             (line  552)
+* __fractdquha:                          Fixed-point fractional library routines.
+                                                             (line  554)
+* __fractdquhq:                          Fixed-point fractional library routines.
+                                                             (line  548)
+* __fractdquqq:                          Fixed-point fractional library routines.
+                                                             (line  547)
+* __fractdqusa:                          Fixed-point fractional library routines.
+                                                             (line  555)
+* __fractdqusq:                          Fixed-point fractional library routines.
+                                                             (line  550)
+* __fractdquta:                          Fixed-point fractional library routines.
+                                                             (line  559)
+* __fracthada2:                          Fixed-point fractional library routines.
+                                                             (line  572)
+* __fracthadf:                           Fixed-point fractional library routines.
+                                                             (line  590)
+* __fracthadi:                           Fixed-point fractional library routines.
+                                                             (line  587)
+* __fracthadq:                           Fixed-point fractional library routines.
+                                                             (line  570)
+* __fracthahi:                           Fixed-point fractional library routines.
+                                                             (line  585)
+* __fracthahq:                           Fixed-point fractional library routines.
+                                                             (line  568)
+* __fracthaqi:                           Fixed-point fractional library routines.
+                                                             (line  584)
+* __fracthaqq:                           Fixed-point fractional library routines.
+                                                             (line  567)
+* __fracthasa2:                          Fixed-point fractional library routines.
+                                                             (line  571)
+* __fracthasf:                           Fixed-point fractional library routines.
+                                                             (line  589)
+* __fracthasi:                           Fixed-point fractional library routines.
+                                                             (line  586)
+* __fracthasq:                           Fixed-point fractional library routines.
+                                                             (line  569)
+* __fracthata2:                          Fixed-point fractional library routines.
+                                                             (line  573)
+* __fracthati:                           Fixed-point fractional library routines.
+                                                             (line  588)
+* __fracthauda:                          Fixed-point fractional library routines.
+                                                             (line  581)
+* __fracthaudq:                          Fixed-point fractional library routines.
+                                                             (line  578)
+* __fracthauha:                          Fixed-point fractional library routines.
+                                                             (line  579)
+* __fracthauhq:                          Fixed-point fractional library routines.
+                                                             (line  575)
+* __fracthauqq:                          Fixed-point fractional library routines.
+                                                             (line  574)
+* __fracthausa:                          Fixed-point fractional library routines.
+                                                             (line  580)
+* __fracthausq:                          Fixed-point fractional library routines.
+                                                             (line  576)
+* __fracthauta:                          Fixed-point fractional library routines.
+                                                             (line  583)
+* __fracthida:                           Fixed-point fractional library routines.
+                                                             (line  943)
+* __fracthidq:                           Fixed-point fractional library routines.
+                                                             (line  940)
+* __fracthiha:                           Fixed-point fractional library routines.
+                                                             (line  941)
+* __fracthihq:                           Fixed-point fractional library routines.
+                                                             (line  938)
+* __fracthiqq:                           Fixed-point fractional library routines.
+                                                             (line  937)
+* __fracthisa:                           Fixed-point fractional library routines.
+                                                             (line  942)
+* __fracthisq:                           Fixed-point fractional library routines.
+                                                             (line  939)
+* __fracthita:                           Fixed-point fractional library routines.
+                                                             (line  944)
+* __fracthiuda:                          Fixed-point fractional library routines.
+                                                             (line  951)
+* __fracthiudq:                          Fixed-point fractional library routines.
+                                                             (line  948)
+* __fracthiuha:                          Fixed-point fractional library routines.
+                                                             (line  949)
+* __fracthiuhq:                          Fixed-point fractional library routines.
+                                                             (line  946)
+* __fracthiuqq:                          Fixed-point fractional library routines.
+                                                             (line  945)
+* __fracthiusa:                          Fixed-point fractional library routines.
+                                                             (line  950)
+* __fracthiusq:                          Fixed-point fractional library routines.
+                                                             (line  947)
+* __fracthiuta:                          Fixed-point fractional library routines.
+                                                             (line  952)
+* __fracthqda:                           Fixed-point fractional library routines.
+                                                             (line  498)
+* __fracthqdf:                           Fixed-point fractional library routines.
+                                                             (line  514)
+* __fracthqdi:                           Fixed-point fractional library routines.
+                                                             (line  511)
+* __fracthqdq2:                          Fixed-point fractional library routines.
+                                                             (line  495)
+* __fracthqha:                           Fixed-point fractional library routines.
+                                                             (line  496)
+* __fracthqhi:                           Fixed-point fractional library routines.
+                                                             (line  509)
+* __fracthqqi:                           Fixed-point fractional library routines.
+                                                             (line  508)
+* __fracthqqq2:                          Fixed-point fractional library routines.
+                                                             (line  493)
+* __fracthqsa:                           Fixed-point fractional library routines.
+                                                             (line  497)
+* __fracthqsf:                           Fixed-point fractional library routines.
+                                                             (line  513)
+* __fracthqsi:                           Fixed-point fractional library routines.
+                                                             (line  510)
+* __fracthqsq2:                          Fixed-point fractional library routines.
+                                                             (line  494)
+* __fracthqta:                           Fixed-point fractional library routines.
+                                                             (line  499)
+* __fracthqti:                           Fixed-point fractional library routines.
+                                                             (line  512)
+* __fracthquda:                          Fixed-point fractional library routines.
+                                                             (line  506)
+* __fracthqudq:                          Fixed-point fractional library routines.
+                                                             (line  503)
+* __fracthquha:                          Fixed-point fractional library routines.
+                                                             (line  504)
+* __fracthquhq:                          Fixed-point fractional library routines.
+                                                             (line  501)
+* __fracthquqq:                          Fixed-point fractional library routines.
+                                                             (line  500)
+* __fracthqusa:                          Fixed-point fractional library routines.
+                                                             (line  505)
+* __fracthqusq:                          Fixed-point fractional library routines.
+                                                             (line  502)
+* __fracthquta:                          Fixed-point fractional library routines.
+                                                             (line  507)
+* __fractqida:                           Fixed-point fractional library routines.
+                                                             (line  925)
+* __fractqidq:                           Fixed-point fractional library routines.
+                                                             (line  922)
+* __fractqiha:                           Fixed-point fractional library routines.
+                                                             (line  923)
+* __fractqihq:                           Fixed-point fractional library routines.
+                                                             (line  920)
+* __fractqiqq:                           Fixed-point fractional library routines.
+                                                             (line  919)
+* __fractqisa:                           Fixed-point fractional library routines.
+                                                             (line  924)
+* __fractqisq:                           Fixed-point fractional library routines.
+                                                             (line  921)
+* __fractqita:                           Fixed-point fractional library routines.
+                                                             (line  926)
+* __fractqiuda:                          Fixed-point fractional library routines.
+                                                             (line  934)
+* __fractqiudq:                          Fixed-point fractional library routines.
+                                                             (line  931)
+* __fractqiuha:                          Fixed-point fractional library routines.
+                                                             (line  932)
+* __fractqiuhq:                          Fixed-point fractional library routines.
+                                                             (line  928)
+* __fractqiuqq:                          Fixed-point fractional library routines.
+                                                             (line  927)
+* __fractqiusa:                          Fixed-point fractional library routines.
+                                                             (line  933)
+* __fractqiusq:                          Fixed-point fractional library routines.
+                                                             (line  929)
+* __fractqiuta:                          Fixed-point fractional library routines.
+                                                             (line  936)
+* __fractqqda:                           Fixed-point fractional library routines.
+                                                             (line  474)
+* __fractqqdf:                           Fixed-point fractional library routines.
+                                                             (line  492)
+* __fractqqdi:                           Fixed-point fractional library routines.
+                                                             (line  489)
+* __fractqqdq2:                          Fixed-point fractional library routines.
+                                                             (line  471)
+* __fractqqha:                           Fixed-point fractional library routines.
+                                                             (line  472)
+* __fractqqhi:                           Fixed-point fractional library routines.
+                                                             (line  487)
+* __fractqqhq2:                          Fixed-point fractional library routines.
+                                                             (line  469)
+* __fractqqqi:                           Fixed-point fractional library routines.
+                                                             (line  486)
+* __fractqqsa:                           Fixed-point fractional library routines.
+                                                             (line  473)
+* __fractqqsf:                           Fixed-point fractional library routines.
+                                                             (line  491)
+* __fractqqsi:                           Fixed-point fractional library routines.
+                                                             (line  488)
+* __fractqqsq2:                          Fixed-point fractional library routines.
+                                                             (line  470)
+* __fractqqta:                           Fixed-point fractional library routines.
+                                                             (line  475)
+* __fractqqti:                           Fixed-point fractional library routines.
+                                                             (line  490)
+* __fractqquda:                          Fixed-point fractional library routines.
+                                                             (line  483)
+* __fractqqudq:                          Fixed-point fractional library routines.
+                                                             (line  480)
+* __fractqquha:                          Fixed-point fractional library routines.
+                                                             (line  481)
+* __fractqquhq:                          Fixed-point fractional library routines.
+                                                             (line  477)
+* __fractqquqq:                          Fixed-point fractional library routines.
+                                                             (line  476)
+* __fractqqusa:                          Fixed-point fractional library routines.
+                                                             (line  482)
+* __fractqqusq:                          Fixed-point fractional library routines.
+                                                             (line  478)
+* __fractqquta:                          Fixed-point fractional library routines.
+                                                             (line  485)
+* __fractsada2:                          Fixed-point fractional library routines.
+                                                             (line  596)
+* __fractsadf:                           Fixed-point fractional library routines.
+                                                             (line  612)
+* __fractsadi:                           Fixed-point fractional library routines.
+                                                             (line  609)
+* __fractsadq:                           Fixed-point fractional library routines.
+                                                             (line  594)
+* __fractsaha2:                          Fixed-point fractional library routines.
+                                                             (line  595)
+* __fractsahi:                           Fixed-point fractional library routines.
+                                                             (line  607)
+* __fractsahq:                           Fixed-point fractional library routines.
+                                                             (line  592)
+* __fractsaqi:                           Fixed-point fractional library routines.
+                                                             (line  606)
+* __fractsaqq:                           Fixed-point fractional library routines.
+                                                             (line  591)
+* __fractsasf:                           Fixed-point fractional library routines.
+                                                             (line  611)
+* __fractsasi:                           Fixed-point fractional library routines.
+                                                             (line  608)
+* __fractsasq:                           Fixed-point fractional library routines.
+                                                             (line  593)
+* __fractsata2:                          Fixed-point fractional library routines.
+                                                             (line  597)
+* __fractsati:                           Fixed-point fractional library routines.
+                                                             (line  610)
+* __fractsauda:                          Fixed-point fractional library routines.
+                                                             (line  604)
+* __fractsaudq:                          Fixed-point fractional library routines.
+                                                             (line  601)
+* __fractsauha:                          Fixed-point fractional library routines.
+                                                             (line  602)
+* __fractsauhq:                          Fixed-point fractional library routines.
+                                                             (line  599)
+* __fractsauqq:                          Fixed-point fractional library routines.
+                                                             (line  598)
+* __fractsausa:                          Fixed-point fractional library routines.
+                                                             (line  603)
+* __fractsausq:                          Fixed-point fractional library routines.
+                                                             (line  600)
+* __fractsauta:                          Fixed-point fractional library routines.
+                                                             (line  605)
+* __fractsfda:                           Fixed-point fractional library routines.
+                                                             (line 1009)
+* __fractsfdq:                           Fixed-point fractional library routines.
+                                                             (line 1006)
+* __fractsfha:                           Fixed-point fractional library routines.
+                                                             (line 1007)
+* __fractsfhq:                           Fixed-point fractional library routines.
+                                                             (line 1004)
+* __fractsfqq:                           Fixed-point fractional library routines.
+                                                             (line 1003)
+* __fractsfsa:                           Fixed-point fractional library routines.
+                                                             (line 1008)
+* __fractsfsq:                           Fixed-point fractional library routines.
+                                                             (line 1005)
+* __fractsfta:                           Fixed-point fractional library routines.
+                                                             (line 1010)
+* __fractsfuda:                          Fixed-point fractional library routines.
+                                                             (line 1017)
+* __fractsfudq:                          Fixed-point fractional library routines.
+                                                             (line 1014)
+* __fractsfuha:                          Fixed-point fractional library routines.
+                                                             (line 1015)
+* __fractsfuhq:                          Fixed-point fractional library routines.
+                                                             (line 1012)
+* __fractsfuqq:                          Fixed-point fractional library routines.
+                                                             (line 1011)
+* __fractsfusa:                          Fixed-point fractional library routines.
+                                                             (line 1016)
+* __fractsfusq:                          Fixed-point fractional library routines.
+                                                             (line 1013)
+* __fractsfuta:                          Fixed-point fractional library routines.
+                                                             (line 1018)
+* __fractsida:                           Fixed-point fractional library routines.
+                                                             (line  959)
+* __fractsidq:                           Fixed-point fractional library routines.
+                                                             (line  956)
+* __fractsiha:                           Fixed-point fractional library routines.
+                                                             (line  957)
+* __fractsihq:                           Fixed-point fractional library routines.
+                                                             (line  954)
+* __fractsiqq:                           Fixed-point fractional library routines.
+                                                             (line  953)
+* __fractsisa:                           Fixed-point fractional library routines.
+                                                             (line  958)
+* __fractsisq:                           Fixed-point fractional library routines.
+                                                             (line  955)
+* __fractsita:                           Fixed-point fractional library routines.
+                                                             (line  960)
+* __fractsiuda:                          Fixed-point fractional library routines.
+                                                             (line  967)
+* __fractsiudq:                          Fixed-point fractional library routines.
+                                                             (line  964)
+* __fractsiuha:                          Fixed-point fractional library routines.
+                                                             (line  965)
+* __fractsiuhq:                          Fixed-point fractional library routines.
+                                                             (line  962)
+* __fractsiuqq:                          Fixed-point fractional library routines.
+                                                             (line  961)
+* __fractsiusa:                          Fixed-point fractional library routines.
+                                                             (line  966)
+* __fractsiusq:                          Fixed-point fractional library routines.
+                                                             (line  963)
+* __fractsiuta:                          Fixed-point fractional library routines.
+                                                             (line  968)
+* __fractsqda:                           Fixed-point fractional library routines.
+                                                             (line  520)
+* __fractsqdf:                           Fixed-point fractional library routines.
+                                                             (line  538)
+* __fractsqdi:                           Fixed-point fractional library routines.
+                                                             (line  535)
+* __fractsqdq2:                          Fixed-point fractional library routines.
+                                                             (line  517)
+* __fractsqha:                           Fixed-point fractional library routines.
+                                                             (line  518)
+* __fractsqhi:                           Fixed-point fractional library routines.
+                                                             (line  533)
+* __fractsqhq2:                          Fixed-point fractional library routines.
+                                                             (line  516)
+* __fractsqqi:                           Fixed-point fractional library routines.
+                                                             (line  532)
+* __fractsqqq2:                          Fixed-point fractional library routines.
+                                                             (line  515)
+* __fractsqsa:                           Fixed-point fractional library routines.
+                                                             (line  519)
+* __fractsqsf:                           Fixed-point fractional library routines.
+                                                             (line  537)
+* __fractsqsi:                           Fixed-point fractional library routines.
+                                                             (line  534)
+* __fractsqta:                           Fixed-point fractional library routines.
+                                                             (line  521)
+* __fractsqti:                           Fixed-point fractional library routines.
+                                                             (line  536)
+* __fractsquda:                          Fixed-point fractional library routines.
+                                                             (line  529)
+* __fractsqudq:                          Fixed-point fractional library routines.
+                                                             (line  526)
+* __fractsquha:                          Fixed-point fractional library routines.
+                                                             (line  527)
+* __fractsquhq:                          Fixed-point fractional library routines.
+                                                             (line  523)
+* __fractsquqq:                          Fixed-point fractional library routines.
+                                                             (line  522)
+* __fractsqusa:                          Fixed-point fractional library routines.
+                                                             (line  528)
+* __fractsqusq:                          Fixed-point fractional library routines.
+                                                             (line  524)
+* __fractsquta:                          Fixed-point fractional library routines.
+                                                             (line  531)
+* __fracttada2:                          Fixed-point fractional library routines.
+                                                             (line  643)
+* __fracttadf:                           Fixed-point fractional library routines.
+                                                             (line  664)
+* __fracttadi:                           Fixed-point fractional library routines.
+                                                             (line  661)
+* __fracttadq:                           Fixed-point fractional library routines.
+                                                             (line  640)
+* __fracttaha2:                          Fixed-point fractional library routines.
+                                                             (line  641)
+* __fracttahi:                           Fixed-point fractional library routines.
+                                                             (line  659)
+* __fracttahq:                           Fixed-point fractional library routines.
+                                                             (line  638)
+* __fracttaqi:                           Fixed-point fractional library routines.
+                                                             (line  658)
+* __fracttaqq:                           Fixed-point fractional library routines.
+                                                             (line  637)
+* __fracttasa2:                          Fixed-point fractional library routines.
+                                                             (line  642)
+* __fracttasf:                           Fixed-point fractional library routines.
+                                                             (line  663)
+* __fracttasi:                           Fixed-point fractional library routines.
+                                                             (line  660)
+* __fracttasq:                           Fixed-point fractional library routines.
+                                                             (line  639)
+* __fracttati:                           Fixed-point fractional library routines.
+                                                             (line  662)
+* __fracttauda:                          Fixed-point fractional library routines.
+                                                             (line  655)
+* __fracttaudq:                          Fixed-point fractional library routines.
+                                                             (line  650)
+* __fracttauha:                          Fixed-point fractional library routines.
+                                                             (line  652)
+* __fracttauhq:                          Fixed-point fractional library routines.
+                                                             (line  646)
+* __fracttauqq:                          Fixed-point fractional library routines.
+                                                             (line  645)
+* __fracttausa:                          Fixed-point fractional library routines.
+                                                             (line  653)
+* __fracttausq:                          Fixed-point fractional library routines.
+                                                             (line  648)
+* __fracttauta:                          Fixed-point fractional library routines.
+                                                             (line  657)
+* __fracttida:                           Fixed-point fractional library routines.
+                                                             (line  991)
+* __fracttidq:                           Fixed-point fractional library routines.
+                                                             (line  988)
+* __fracttiha:                           Fixed-point fractional library routines.
+                                                             (line  989)
+* __fracttihq:                           Fixed-point fractional library routines.
+                                                             (line  986)
+* __fracttiqq:                           Fixed-point fractional library routines.
+                                                             (line  985)
+* __fracttisa:                           Fixed-point fractional library routines.
+                                                             (line  990)
+* __fracttisq:                           Fixed-point fractional library routines.
+                                                             (line  987)
+* __fracttita:                           Fixed-point fractional library routines.
+                                                             (line  992)
+* __fracttiuda:                          Fixed-point fractional library routines.
+                                                             (line 1000)
+* __fracttiudq:                          Fixed-point fractional library routines.
+                                                             (line  997)
+* __fracttiuha:                          Fixed-point fractional library routines.
+                                                             (line  998)
+* __fracttiuhq:                          Fixed-point fractional library routines.
+                                                             (line  994)
+* __fracttiuqq:                          Fixed-point fractional library routines.
+                                                             (line  993)
+* __fracttiusa:                          Fixed-point fractional library routines.
+                                                             (line  999)
+* __fracttiusq:                          Fixed-point fractional library routines.
+                                                             (line  995)
+* __fracttiuta:                          Fixed-point fractional library routines.
+                                                             (line 1002)
+* __fractudada:                          Fixed-point fractional library routines.
+                                                             (line  858)
+* __fractudadf:                          Fixed-point fractional library routines.
+                                                             (line  881)
+* __fractudadi:                          Fixed-point fractional library routines.
+                                                             (line  878)
+* __fractudadq:                          Fixed-point fractional library routines.
+                                                             (line  855)
+* __fractudaha:                          Fixed-point fractional library routines.
+                                                             (line  856)
+* __fractudahi:                          Fixed-point fractional library routines.
+                                                             (line  876)
+* __fractudahq:                          Fixed-point fractional library routines.
+                                                             (line  852)
+* __fractudaqi:                          Fixed-point fractional library routines.
+                                                             (line  875)
+* __fractudaqq:                          Fixed-point fractional library routines.
+                                                             (line  851)
+* __fractudasa:                          Fixed-point fractional library routines.
+                                                             (line  857)
+* __fractudasf:                          Fixed-point fractional library routines.
+                                                             (line  880)
+* __fractudasi:                          Fixed-point fractional library routines.
+                                                             (line  877)
+* __fractudasq:                          Fixed-point fractional library routines.
+                                                             (line  853)
+* __fractudata:                          Fixed-point fractional library routines.
+                                                             (line  860)
+* __fractudati:                          Fixed-point fractional library routines.
+                                                             (line  879)
+* __fractudaudq:                         Fixed-point fractional library routines.
+                                                             (line  868)
+* __fractudauha2:                        Fixed-point fractional library routines.
+                                                             (line  870)
+* __fractudauhq:                         Fixed-point fractional library routines.
+                                                             (line  864)
+* __fractudauqq:                         Fixed-point fractional library routines.
+                                                             (line  862)
+* __fractudausa2:                        Fixed-point fractional library routines.
+                                                             (line  872)
+* __fractudausq:                         Fixed-point fractional library routines.
+                                                             (line  866)
+* __fractudauta2:                        Fixed-point fractional library routines.
+                                                             (line  874)
+* __fractudqda:                          Fixed-point fractional library routines.
+                                                             (line  766)
+* __fractudqdf:                          Fixed-point fractional library routines.
+                                                             (line  791)
+* __fractudqdi:                          Fixed-point fractional library routines.
+                                                             (line  787)
+* __fractudqdq:                          Fixed-point fractional library routines.
+                                                             (line  761)
+* __fractudqha:                          Fixed-point fractional library routines.
+                                                             (line  763)
+* __fractudqhi:                          Fixed-point fractional library routines.
+                                                             (line  785)
+* __fractudqhq:                          Fixed-point fractional library routines.
+                                                             (line  757)
+* __fractudqqi:                          Fixed-point fractional library routines.
+                                                             (line  784)
+* __fractudqqq:                          Fixed-point fractional library routines.
+                                                             (line  756)
+* __fractudqsa:                          Fixed-point fractional library routines.
+                                                             (line  764)
+* __fractudqsf:                          Fixed-point fractional library routines.
+                                                             (line  790)
+* __fractudqsi:                          Fixed-point fractional library routines.
+                                                             (line  786)
+* __fractudqsq:                          Fixed-point fractional library routines.
+                                                             (line  759)
+* __fractudqta:                          Fixed-point fractional library routines.
+                                                             (line  768)
+* __fractudqti:                          Fixed-point fractional library routines.
+                                                             (line  789)
+* __fractudquda:                         Fixed-point fractional library routines.
+                                                             (line  780)
+* __fractudquha:                         Fixed-point fractional library routines.
+                                                             (line  776)
+* __fractudquhq2:                        Fixed-point fractional library routines.
+                                                             (line  772)
+* __fractudquqq2:                        Fixed-point fractional library routines.
+                                                             (line  770)
+* __fractudqusa:                         Fixed-point fractional library routines.
+                                                             (line  778)
+* __fractudqusq2:                        Fixed-point fractional library routines.
+                                                             (line  774)
+* __fractudquta:                         Fixed-point fractional library routines.
+                                                             (line  782)
+* __fractuhada:                          Fixed-point fractional library routines.
+                                                             (line  799)
+* __fractuhadf:                          Fixed-point fractional library routines.
+                                                             (line  822)
+* __fractuhadi:                          Fixed-point fractional library routines.
+                                                             (line  819)
+* __fractuhadq:                          Fixed-point fractional library routines.
+                                                             (line  796)
+* __fractuhaha:                          Fixed-point fractional library routines.
+                                                             (line  797)
+* __fractuhahi:                          Fixed-point fractional library routines.
+                                                             (line  817)
+* __fractuhahq:                          Fixed-point fractional library routines.
+                                                             (line  793)
+* __fractuhaqi:                          Fixed-point fractional library routines.
+                                                             (line  816)
+* __fractuhaqq:                          Fixed-point fractional library routines.
+                                                             (line  792)
+* __fractuhasa:                          Fixed-point fractional library routines.
+                                                             (line  798)
+* __fractuhasf:                          Fixed-point fractional library routines.
+                                                             (line  821)
+* __fractuhasi:                          Fixed-point fractional library routines.
+                                                             (line  818)
+* __fractuhasq:                          Fixed-point fractional library routines.
+                                                             (line  794)
+* __fractuhata:                          Fixed-point fractional library routines.
+                                                             (line  801)
+* __fractuhati:                          Fixed-point fractional library routines.
+                                                             (line  820)
+* __fractuhauda2:                        Fixed-point fractional library routines.
+                                                             (line  813)
+* __fractuhaudq:                         Fixed-point fractional library routines.
+                                                             (line  809)
+* __fractuhauhq:                         Fixed-point fractional library routines.
+                                                             (line  805)
+* __fractuhauqq:                         Fixed-point fractional library routines.
+                                                             (line  803)
+* __fractuhausa2:                        Fixed-point fractional library routines.
+                                                             (line  811)
+* __fractuhausq:                         Fixed-point fractional library routines.
+                                                             (line  807)
+* __fractuhauta2:                        Fixed-point fractional library routines.
+                                                             (line  815)
+* __fractuhqda:                          Fixed-point fractional library routines.
+                                                             (line  702)
+* __fractuhqdf:                          Fixed-point fractional library routines.
+                                                             (line  723)
+* __fractuhqdi:                          Fixed-point fractional library routines.
+                                                             (line  720)
+* __fractuhqdq:                          Fixed-point fractional library routines.
+                                                             (line  699)
+* __fractuhqha:                          Fixed-point fractional library routines.
+                                                             (line  700)
+* __fractuhqhi:                          Fixed-point fractional library routines.
+                                                             (line  718)
+* __fractuhqhq:                          Fixed-point fractional library routines.
+                                                             (line  697)
+* __fractuhqqi:                          Fixed-point fractional library routines.
+                                                             (line  717)
+* __fractuhqqq:                          Fixed-point fractional library routines.
+                                                             (line  696)
+* __fractuhqsa:                          Fixed-point fractional library routines.
+                                                             (line  701)
+* __fractuhqsf:                          Fixed-point fractional library routines.
+                                                             (line  722)
+* __fractuhqsi:                          Fixed-point fractional library routines.
+                                                             (line  719)
+* __fractuhqsq:                          Fixed-point fractional library routines.
+                                                             (line  698)
+* __fractuhqta:                          Fixed-point fractional library routines.
+                                                             (line  703)
+* __fractuhqti:                          Fixed-point fractional library routines.
+                                                             (line  721)
+* __fractuhquda:                         Fixed-point fractional library routines.
+                                                             (line  714)
+* __fractuhqudq2:                        Fixed-point fractional library routines.
+                                                             (line  709)
+* __fractuhquha:                         Fixed-point fractional library routines.
+                                                             (line  711)
+* __fractuhquqq2:                        Fixed-point fractional library routines.
+                                                             (line  705)
+* __fractuhqusa:                         Fixed-point fractional library routines.
+                                                             (line  712)
+* __fractuhqusq2:                        Fixed-point fractional library routines.
+                                                             (line  707)
+* __fractuhquta:                         Fixed-point fractional library routines.
+                                                             (line  716)
+* __fractunsdadi:                        Fixed-point fractional library routines.
+                                                             (line 1555)
+* __fractunsdahi:                        Fixed-point fractional library routines.
+                                                             (line 1553)
+* __fractunsdaqi:                        Fixed-point fractional library routines.
+                                                             (line 1552)
+* __fractunsdasi:                        Fixed-point fractional library routines.
+                                                             (line 1554)
+* __fractunsdati:                        Fixed-point fractional library routines.
+                                                             (line 1556)
+* __fractunsdida:                        Fixed-point fractional library routines.
+                                                             (line 1707)
+* __fractunsdidq:                        Fixed-point fractional library routines.
+                                                             (line 1704)
+* __fractunsdiha:                        Fixed-point fractional library routines.
+                                                             (line 1705)
+* __fractunsdihq:                        Fixed-point fractional library routines.
+                                                             (line 1702)
+* __fractunsdiqq:                        Fixed-point fractional library routines.
+                                                             (line 1701)
+* __fractunsdisa:                        Fixed-point fractional library routines.
+                                                             (line 1706)
+* __fractunsdisq:                        Fixed-point fractional library routines.
+                                                             (line 1703)
+* __fractunsdita:                        Fixed-point fractional library routines.
+                                                             (line 1708)
+* __fractunsdiuda:                       Fixed-point fractional library routines.
+                                                             (line 1720)
+* __fractunsdiudq:                       Fixed-point fractional library routines.
+                                                             (line 1715)
+* __fractunsdiuha:                       Fixed-point fractional library routines.
+                                                             (line 1717)
+* __fractunsdiuhq:                       Fixed-point fractional library routines.
+                                                             (line 1711)
+* __fractunsdiuqq:                       Fixed-point fractional library routines.
+                                                             (line 1710)
+* __fractunsdiusa:                       Fixed-point fractional library routines.
+                                                             (line 1718)
+* __fractunsdiusq:                       Fixed-point fractional library routines.
+                                                             (line 1713)
+* __fractunsdiuta:                       Fixed-point fractional library routines.
+                                                             (line 1722)
+* __fractunsdqdi:                        Fixed-point fractional library routines.
+                                                             (line 1539)
+* __fractunsdqhi:                        Fixed-point fractional library routines.
+                                                             (line 1537)
+* __fractunsdqqi:                        Fixed-point fractional library routines.
+                                                             (line 1536)
+* __fractunsdqsi:                        Fixed-point fractional library routines.
+                                                             (line 1538)
+* __fractunsdqti:                        Fixed-point fractional library routines.
+                                                             (line 1541)
+* __fractunshadi:                        Fixed-point fractional library routines.
+                                                             (line 1545)
+* __fractunshahi:                        Fixed-point fractional library routines.
+                                                             (line 1543)
+* __fractunshaqi:                        Fixed-point fractional library routines.
+                                                             (line 1542)
+* __fractunshasi:                        Fixed-point fractional library routines.
+                                                             (line 1544)
+* __fractunshati:                        Fixed-point fractional library routines.
+                                                             (line 1546)
+* __fractunshida:                        Fixed-point fractional library routines.
+                                                             (line 1663)
+* __fractunshidq:                        Fixed-point fractional library routines.
+                                                             (line 1660)
+* __fractunshiha:                        Fixed-point fractional library routines.
+                                                             (line 1661)
+* __fractunshihq:                        Fixed-point fractional library routines.
+                                                             (line 1658)
+* __fractunshiqq:                        Fixed-point fractional library routines.
+                                                             (line 1657)
+* __fractunshisa:                        Fixed-point fractional library routines.
+                                                             (line 1662)
+* __fractunshisq:                        Fixed-point fractional library routines.
+                                                             (line 1659)
+* __fractunshita:                        Fixed-point fractional library routines.
+                                                             (line 1664)
+* __fractunshiuda:                       Fixed-point fractional library routines.
+                                                             (line 1676)
+* __fractunshiudq:                       Fixed-point fractional library routines.
+                                                             (line 1671)
+* __fractunshiuha:                       Fixed-point fractional library routines.
+                                                             (line 1673)
+* __fractunshiuhq:                       Fixed-point fractional library routines.
+                                                             (line 1667)
+* __fractunshiuqq:                       Fixed-point fractional library routines.
+                                                             (line 1666)
+* __fractunshiusa:                       Fixed-point fractional library routines.
+                                                             (line 1674)
+* __fractunshiusq:                       Fixed-point fractional library routines.
+                                                             (line 1669)
+* __fractunshiuta:                       Fixed-point fractional library routines.
+                                                             (line 1678)
+* __fractunshqdi:                        Fixed-point fractional library routines.
+                                                             (line 1529)
+* __fractunshqhi:                        Fixed-point fractional library routines.
+                                                             (line 1527)
+* __fractunshqqi:                        Fixed-point fractional library routines.
+                                                             (line 1526)
+* __fractunshqsi:                        Fixed-point fractional library routines.
+                                                             (line 1528)
+* __fractunshqti:                        Fixed-point fractional library routines.
+                                                             (line 1530)
+* __fractunsqida:                        Fixed-point fractional library routines.
+                                                             (line 1641)
+* __fractunsqidq:                        Fixed-point fractional library routines.
+                                                             (line 1638)
+* __fractunsqiha:                        Fixed-point fractional library routines.
+                                                             (line 1639)
+* __fractunsqihq:                        Fixed-point fractional library routines.
+                                                             (line 1636)
+* __fractunsqiqq:                        Fixed-point fractional library routines.
+                                                             (line 1635)
+* __fractunsqisa:                        Fixed-point fractional library routines.
+                                                             (line 1640)
+* __fractunsqisq:                        Fixed-point fractional library routines.
+                                                             (line 1637)
+* __fractunsqita:                        Fixed-point fractional library routines.
+                                                             (line 1642)
+* __fractunsqiuda:                       Fixed-point fractional library routines.
+                                                             (line 1654)
+* __fractunsqiudq:                       Fixed-point fractional library routines.
+                                                             (line 1649)
+* __fractunsqiuha:                       Fixed-point fractional library routines.
+                                                             (line 1651)
+* __fractunsqiuhq:                       Fixed-point fractional library routines.
+                                                             (line 1645)
+* __fractunsqiuqq:                       Fixed-point fractional library routines.
+                                                             (line 1644)
+* __fractunsqiusa:                       Fixed-point fractional library routines.
+                                                             (line 1652)
+* __fractunsqiusq:                       Fixed-point fractional library routines.
+                                                             (line 1647)
+* __fractunsqiuta:                       Fixed-point fractional library routines.
+                                                             (line 1656)
+* __fractunsqqdi:                        Fixed-point fractional library routines.
+                                                             (line 1524)
+* __fractunsqqhi:                        Fixed-point fractional library routines.
+                                                             (line 1522)
+* __fractunsqqqi:                        Fixed-point fractional library routines.
+                                                             (line 1521)
+* __fractunsqqsi:                        Fixed-point fractional library routines.
+                                                             (line 1523)
+* __fractunsqqti:                        Fixed-point fractional library routines.
+                                                             (line 1525)
+* __fractunssadi:                        Fixed-point fractional library routines.
+                                                             (line 1550)
+* __fractunssahi:                        Fixed-point fractional library routines.
+                                                             (line 1548)
+* __fractunssaqi:                        Fixed-point fractional library routines.
+                                                             (line 1547)
+* __fractunssasi:                        Fixed-point fractional library routines.
+                                                             (line 1549)
+* __fractunssati:                        Fixed-point fractional library routines.
+                                                             (line 1551)
+* __fractunssida:                        Fixed-point fractional library routines.
+                                                             (line 1685)
+* __fractunssidq:                        Fixed-point fractional library routines.
+                                                             (line 1682)
+* __fractunssiha:                        Fixed-point fractional library routines.
+                                                             (line 1683)
+* __fractunssihq:                        Fixed-point fractional library routines.
+                                                             (line 1680)
+* __fractunssiqq:                        Fixed-point fractional library routines.
+                                                             (line 1679)
+* __fractunssisa:                        Fixed-point fractional library routines.
+                                                             (line 1684)
+* __fractunssisq:                        Fixed-point fractional library routines.
+                                                             (line 1681)
+* __fractunssita:                        Fixed-point fractional library routines.
+                                                             (line 1686)
+* __fractunssiuda:                       Fixed-point fractional library routines.
+                                                             (line 1698)
+* __fractunssiudq:                       Fixed-point fractional library routines.
+                                                             (line 1693)
+* __fractunssiuha:                       Fixed-point fractional library routines.
+                                                             (line 1695)
+* __fractunssiuhq:                       Fixed-point fractional library routines.
+                                                             (line 1689)
+* __fractunssiuqq:                       Fixed-point fractional library routines.
+                                                             (line 1688)
+* __fractunssiusa:                       Fixed-point fractional library routines.
+                                                             (line 1696)
+* __fractunssiusq:                       Fixed-point fractional library routines.
+                                                             (line 1691)
+* __fractunssiuta:                       Fixed-point fractional library routines.
+                                                             (line 1700)
+* __fractunssqdi:                        Fixed-point fractional library routines.
+                                                             (line 1534)
+* __fractunssqhi:                        Fixed-point fractional library routines.
+                                                             (line 1532)
+* __fractunssqqi:                        Fixed-point fractional library routines.
+                                                             (line 1531)
+* __fractunssqsi:                        Fixed-point fractional library routines.
+                                                             (line 1533)
+* __fractunssqti:                        Fixed-point fractional library routines.
+                                                             (line 1535)
+* __fractunstadi:                        Fixed-point fractional library routines.
+                                                             (line 1560)
+* __fractunstahi:                        Fixed-point fractional library routines.
+                                                             (line 1558)
+* __fractunstaqi:                        Fixed-point fractional library routines.
+                                                             (line 1557)
+* __fractunstasi:                        Fixed-point fractional library routines.
+                                                             (line 1559)
+* __fractunstati:                        Fixed-point fractional library routines.
+                                                             (line 1562)
+* __fractunstida:                        Fixed-point fractional library routines.
+                                                             (line 1730)
+* __fractunstidq:                        Fixed-point fractional library routines.
+                                                             (line 1727)
+* __fractunstiha:                        Fixed-point fractional library routines.
+                                                             (line 1728)
+* __fractunstihq:                        Fixed-point fractional library routines.
+                                                             (line 1724)
+* __fractunstiqq:                        Fixed-point fractional library routines.
+                                                             (line 1723)
+* __fractunstisa:                        Fixed-point fractional library routines.
+                                                             (line 1729)
+* __fractunstisq:                        Fixed-point fractional library routines.
+                                                             (line 1725)
+* __fractunstita:                        Fixed-point fractional library routines.
+                                                             (line 1732)
+* __fractunstiuda:                       Fixed-point fractional library routines.
+                                                             (line 1746)
+* __fractunstiudq:                       Fixed-point fractional library routines.
+                                                             (line 1740)
+* __fractunstiuha:                       Fixed-point fractional library routines.
+                                                             (line 1742)
+* __fractunstiuhq:                       Fixed-point fractional library routines.
+                                                             (line 1736)
+* __fractunstiuqq:                       Fixed-point fractional library routines.
+                                                             (line 1734)
+* __fractunstiusa:                       Fixed-point fractional library routines.
+                                                             (line 1744)
+* __fractunstiusq:                       Fixed-point fractional library routines.
+                                                             (line 1738)
+* __fractunstiuta:                       Fixed-point fractional library routines.
+                                                             (line 1748)
+* __fractunsudadi:                       Fixed-point fractional library routines.
+                                                             (line 1622)
+* __fractunsudahi:                       Fixed-point fractional library routines.
+                                                             (line 1618)
+* __fractunsudaqi:                       Fixed-point fractional library routines.
+                                                             (line 1616)
+* __fractunsudasi:                       Fixed-point fractional library routines.
+                                                             (line 1620)
+* __fractunsudati:                       Fixed-point fractional library routines.
+                                                             (line 1624)
+* __fractunsudqdi:                       Fixed-point fractional library routines.
+                                                             (line 1596)
+* __fractunsudqhi:                       Fixed-point fractional library routines.
+                                                             (line 1592)
+* __fractunsudqqi:                       Fixed-point fractional library routines.
+                                                             (line 1590)
+* __fractunsudqsi:                       Fixed-point fractional library routines.
+                                                             (line 1594)
+* __fractunsudqti:                       Fixed-point fractional library routines.
+                                                             (line 1598)
+* __fractunsuhadi:                       Fixed-point fractional library routines.
+                                                             (line 1606)
+* __fractunsuhahi:                       Fixed-point fractional library routines.
+                                                             (line 1602)
+* __fractunsuhaqi:                       Fixed-point fractional library routines.
+                                                             (line 1600)
+* __fractunsuhasi:                       Fixed-point fractional library routines.
+                                                             (line 1604)
+* __fractunsuhati:                       Fixed-point fractional library routines.
+                                                             (line 1608)
+* __fractunsuhqdi:                       Fixed-point fractional library routines.
+                                                             (line 1576)
+* __fractunsuhqhi:                       Fixed-point fractional library routines.
+                                                             (line 1574)
+* __fractunsuhqqi:                       Fixed-point fractional library routines.
+                                                             (line 1573)
+* __fractunsuhqsi:                       Fixed-point fractional library routines.
+                                                             (line 1575)
+* __fractunsuhqti:                       Fixed-point fractional library routines.
+                                                             (line 1578)
+* __fractunsuqqdi:                       Fixed-point fractional library routines.
+                                                             (line 1570)
+* __fractunsuqqhi:                       Fixed-point fractional library routines.
+                                                             (line 1566)
+* __fractunsuqqqi:                       Fixed-point fractional library routines.
+                                                             (line 1564)
+* __fractunsuqqsi:                       Fixed-point fractional library routines.
+                                                             (line 1568)
+* __fractunsuqqti:                       Fixed-point fractional library routines.
+                                                             (line 1572)
+* __fractunsusadi:                       Fixed-point fractional library routines.
+                                                             (line 1612)
+* __fractunsusahi:                       Fixed-point fractional library routines.
+                                                             (line 1610)
+* __fractunsusaqi:                       Fixed-point fractional library routines.
+                                                             (line 1609)
+* __fractunsusasi:                       Fixed-point fractional library routines.
+                                                             (line 1611)
+* __fractunsusati:                       Fixed-point fractional library routines.
+                                                             (line 1614)
+* __fractunsusqdi:                       Fixed-point fractional library routines.
+                                                             (line 1586)
+* __fractunsusqhi:                       Fixed-point fractional library routines.
+                                                             (line 1582)
+* __fractunsusqqi:                       Fixed-point fractional library routines.
+                                                             (line 1580)
+* __fractunsusqsi:                       Fixed-point fractional library routines.
+                                                             (line 1584)
+* __fractunsusqti:                       Fixed-point fractional library routines.
+                                                             (line 1588)
+* __fractunsutadi:                       Fixed-point fractional library routines.
+                                                             (line 1632)
+* __fractunsutahi:                       Fixed-point fractional library routines.
+                                                             (line 1628)
+* __fractunsutaqi:                       Fixed-point fractional library routines.
+                                                             (line 1626)
+* __fractunsutasi:                       Fixed-point fractional library routines.
+                                                             (line 1630)
+* __fractunsutati:                       Fixed-point fractional library routines.
+                                                             (line 1634)
+* __fractuqqda:                          Fixed-point fractional library routines.
+                                                             (line  672)
+* __fractuqqdf:                          Fixed-point fractional library routines.
+                                                             (line  695)
+* __fractuqqdi:                          Fixed-point fractional library routines.
+                                                             (line  692)
+* __fractuqqdq:                          Fixed-point fractional library routines.
+                                                             (line  669)
+* __fractuqqha:                          Fixed-point fractional library routines.
+                                                             (line  670)
+* __fractuqqhi:                          Fixed-point fractional library routines.
+                                                             (line  690)
+* __fractuqqhq:                          Fixed-point fractional library routines.
+                                                             (line  666)
+* __fractuqqqi:                          Fixed-point fractional library routines.
+                                                             (line  689)
+* __fractuqqqq:                          Fixed-point fractional library routines.
+                                                             (line  665)
+* __fractuqqsa:                          Fixed-point fractional library routines.
+                                                             (line  671)
+* __fractuqqsf:                          Fixed-point fractional library routines.
+                                                             (line  694)
+* __fractuqqsi:                          Fixed-point fractional library routines.
+                                                             (line  691)
+* __fractuqqsq:                          Fixed-point fractional library routines.
+                                                             (line  667)
+* __fractuqqta:                          Fixed-point fractional library routines.
+                                                             (line  674)
+* __fractuqqti:                          Fixed-point fractional library routines.
+                                                             (line  693)
+* __fractuqquda:                         Fixed-point fractional library routines.
+                                                             (line  686)
+* __fractuqqudq2:                        Fixed-point fractional library routines.
+                                                             (line  680)
+* __fractuqquha:                         Fixed-point fractional library routines.
+                                                             (line  682)
+* __fractuqquhq2:                        Fixed-point fractional library routines.
+                                                             (line  676)
+* __fractuqqusa:                         Fixed-point fractional library routines.
+                                                             (line  684)
+* __fractuqqusq2:                        Fixed-point fractional library routines.
+                                                             (line  678)
+* __fractuqquta:                         Fixed-point fractional library routines.
+                                                             (line  688)
+* __fractusada:                          Fixed-point fractional library routines.
+                                                             (line  829)
+* __fractusadf:                          Fixed-point fractional library routines.
+                                                             (line  850)
+* __fractusadi:                          Fixed-point fractional library routines.
+                                                             (line  847)
+* __fractusadq:                          Fixed-point fractional library routines.
+                                                             (line  826)
+* __fractusaha:                          Fixed-point fractional library routines.
+                                                             (line  827)
+* __fractusahi:                          Fixed-point fractional library routines.
+                                                             (line  845)
+* __fractusahq:                          Fixed-point fractional library routines.
+                                                             (line  824)
+* __fractusaqi:                          Fixed-point fractional library routines.
+                                                             (line  844)
+* __fractusaqq:                          Fixed-point fractional library routines.
+                                                             (line  823)
+* __fractusasa:                          Fixed-point fractional library routines.
+                                                             (line  828)
+* __fractusasf:                          Fixed-point fractional library routines.
+                                                             (line  849)
+* __fractusasi:                          Fixed-point fractional library routines.
+                                                             (line  846)
+* __fractusasq:                          Fixed-point fractional library routines.
+                                                             (line  825)
+* __fractusata:                          Fixed-point fractional library routines.
+                                                             (line  830)
+* __fractusati:                          Fixed-point fractional library routines.
+                                                             (line  848)
+* __fractusauda2:                        Fixed-point fractional library routines.
+                                                             (line  841)
+* __fractusaudq:                         Fixed-point fractional library routines.
+                                                             (line  837)
+* __fractusauha2:                        Fixed-point fractional library routines.
+                                                             (line  839)
+* __fractusauhq:                         Fixed-point fractional library routines.
+                                                             (line  833)
+* __fractusauqq:                         Fixed-point fractional library routines.
+                                                             (line  832)
+* __fractusausq:                         Fixed-point fractional library routines.
+                                                             (line  835)
+* __fractusauta2:                        Fixed-point fractional library routines.
+                                                             (line  843)
+* __fractusqda:                          Fixed-point fractional library routines.
+                                                             (line  731)
+* __fractusqdf:                          Fixed-point fractional library routines.
+                                                             (line  754)
+* __fractusqdi:                          Fixed-point fractional library routines.
+                                                             (line  751)
+* __fractusqdq:                          Fixed-point fractional library routines.
+                                                             (line  728)
+* __fractusqha:                          Fixed-point fractional library routines.
+                                                             (line  729)
+* __fractusqhi:                          Fixed-point fractional library routines.
+                                                             (line  749)
+* __fractusqhq:                          Fixed-point fractional library routines.
+                                                             (line  725)
+* __fractusqqi:                          Fixed-point fractional library routines.
+                                                             (line  748)
+* __fractusqqq:                          Fixed-point fractional library routines.
+                                                             (line  724)
+* __fractusqsa:                          Fixed-point fractional library routines.
+                                                             (line  730)
+* __fractusqsf:                          Fixed-point fractional library routines.
+                                                             (line  753)
+* __fractusqsi:                          Fixed-point fractional library routines.
+                                                             (line  750)
+* __fractusqsq:                          Fixed-point fractional library routines.
+                                                             (line  726)
+* __fractusqta:                          Fixed-point fractional library routines.
+                                                             (line  733)
+* __fractusqti:                          Fixed-point fractional library routines.
+                                                             (line  752)
+* __fractusquda:                         Fixed-point fractional library routines.
+                                                             (line  745)
+* __fractusqudq2:                        Fixed-point fractional library routines.
+                                                             (line  739)
+* __fractusquha:                         Fixed-point fractional library routines.
+                                                             (line  741)
+* __fractusquhq2:                        Fixed-point fractional library routines.
+                                                             (line  737)
+* __fractusquqq2:                        Fixed-point fractional library routines.
+                                                             (line  735)
+* __fractusqusa:                         Fixed-point fractional library routines.
+                                                             (line  743)
+* __fractusquta:                         Fixed-point fractional library routines.
+                                                             (line  747)
+* __fractutada:                          Fixed-point fractional library routines.
+                                                             (line  893)
+* __fractutadf:                          Fixed-point fractional library routines.
+                                                             (line  918)
+* __fractutadi:                          Fixed-point fractional library routines.
+                                                             (line  914)
+* __fractutadq:                          Fixed-point fractional library routines.
+                                                             (line  888)
+* __fractutaha:                          Fixed-point fractional library routines.
+                                                             (line  890)
+* __fractutahi:                          Fixed-point fractional library routines.
+                                                             (line  912)
+* __fractutahq:                          Fixed-point fractional library routines.
+                                                             (line  884)
+* __fractutaqi:                          Fixed-point fractional library routines.
+                                                             (line  911)
+* __fractutaqq:                          Fixed-point fractional library routines.
+                                                             (line  883)
+* __fractutasa:                          Fixed-point fractional library routines.
+                                                             (line  891)
+* __fractutasf:                          Fixed-point fractional library routines.
+                                                             (line  917)
+* __fractutasi:                          Fixed-point fractional library routines.
+                                                             (line  913)
+* __fractutasq:                          Fixed-point fractional library routines.
+                                                             (line  886)
+* __fractutata:                          Fixed-point fractional library routines.
+                                                             (line  895)
+* __fractutati:                          Fixed-point fractional library routines.
+                                                             (line  916)
+* __fractutauda2:                        Fixed-point fractional library routines.
+                                                             (line  909)
+* __fractutaudq:                         Fixed-point fractional library routines.
+                                                             (line  903)
+* __fractutauha2:                        Fixed-point fractional library routines.
+                                                             (line  905)
+* __fractutauhq:                         Fixed-point fractional library routines.
+                                                             (line  899)
+* __fractutauqq:                         Fixed-point fractional library routines.
+                                                             (line  897)
+* __fractutausa2:                        Fixed-point fractional library routines.
+                                                             (line  907)
+* __fractutausq:                         Fixed-point fractional library routines.
+                                                             (line  901)
+* __gedf2:                               Soft float library routines.
+                                                             (line  206)
+* __gesf2:                               Soft float library routines.
+                                                             (line  205)
+* __getf2:                               Soft float library routines.
+                                                             (line  207)
+* __gtdf2:                               Soft float library routines.
+                                                             (line  224)
+* __gtsf2:                               Soft float library routines.
+                                                             (line  223)
+* __gttf2:                               Soft float library routines.
+                                                             (line  225)
+* __ledf2:                               Soft float library routines.
+                                                             (line  218)
+* __lesf2:                               Soft float library routines.
+                                                             (line  217)
+* __letf2:                               Soft float library routines.
+                                                             (line  219)
+* __lshrdi3:                             Integer library routines.
+                                                             (line   31)
+* __lshrsi3:                             Integer library routines.
+                                                             (line   30)
+* __lshrti3:                             Integer library routines.
+                                                             (line   32)
+* __lshruda3:                            Fixed-point fractional library routines.
+                                                             (line  390)
+* __lshrudq3:                            Fixed-point fractional library routines.
+                                                             (line  384)
+* __lshruha3:                            Fixed-point fractional library routines.
+                                                             (line  386)
+* __lshruhq3:                            Fixed-point fractional library routines.
+                                                             (line  380)
+* __lshruqq3:                            Fixed-point fractional library routines.
+                                                             (line  378)
+* __lshrusa3:                            Fixed-point fractional library routines.
+                                                             (line  388)
+* __lshrusq3:                            Fixed-point fractional library routines.
+                                                             (line  382)
+* __lshruta3:                            Fixed-point fractional library routines.
+                                                             (line  392)
+* __ltdf2:                               Soft float library routines.
+                                                             (line  212)
+* __ltsf2:                               Soft float library routines.
+                                                             (line  211)
+* __lttf2:                               Soft float library routines.
+                                                             (line  213)
+* __main:                                Collect2.           (line   15)
+* __moddi3:                              Integer library routines.
+                                                             (line   37)
+* __modsi3:                              Integer library routines.
+                                                             (line   36)
+* __modti3:                              Integer library routines.
+                                                             (line   38)
+* __morestack_current_segment:           Miscellaneous routines.
+                                                             (line   46)
+* __morestack_initial_sp:                Miscellaneous routines.
+                                                             (line   47)
+* __morestack_segments:                  Miscellaneous routines.
+                                                             (line   45)
+* __mulda3:                              Fixed-point fractional library routines.
+                                                             (line  171)
+* __muldc3:                              Soft float library routines.
+                                                             (line  241)
+* __muldf3:                              Soft float library routines.
+                                                             (line   40)
+* __muldi3:                              Integer library routines.
+                                                             (line   43)
+* __muldq3:                              Fixed-point fractional library routines.
+                                                             (line  159)
+* __mulha3:                              Fixed-point fractional library routines.
+                                                             (line  169)
+* __mulhq3:                              Fixed-point fractional library routines.
+                                                             (line  156)
+* __mulqq3:                              Fixed-point fractional library routines.
+                                                             (line  155)
+* __mulsa3:                              Fixed-point fractional library routines.
+                                                             (line  170)
+* __mulsc3:                              Soft float library routines.
+                                                             (line  239)
+* __mulsf3:                              Soft float library routines.
+                                                             (line   39)
+* __mulsi3:                              Integer library routines.
+                                                             (line   42)
+* __mulsq3:                              Fixed-point fractional library routines.
+                                                             (line  157)
+* __multa3:                              Fixed-point fractional library routines.
+                                                             (line  173)
+* __multc3:                              Soft float library routines.
+                                                             (line  243)
+* __multf3:                              Soft float library routines.
+                                                             (line   42)
+* __multi3:                              Integer library routines.
+                                                             (line   44)
+* __muluda3:                             Fixed-point fractional library routines.
+                                                             (line  179)
+* __muludq3:                             Fixed-point fractional library routines.
+                                                             (line  167)
+* __muluha3:                             Fixed-point fractional library routines.
+                                                             (line  175)
+* __muluhq3:                             Fixed-point fractional library routines.
+                                                             (line  163)
+* __muluqq3:                             Fixed-point fractional library routines.
+                                                             (line  161)
+* __mulusa3:                             Fixed-point fractional library routines.
+                                                             (line  177)
+* __mulusq3:                             Fixed-point fractional library routines.
+                                                             (line  165)
+* __muluta3:                             Fixed-point fractional library routines.
+                                                             (line  181)
+* __mulvdi3:                             Integer library routines.
+                                                             (line  115)
+* __mulvsi3:                             Integer library routines.
+                                                             (line  114)
+* __mulxc3:                              Soft float library routines.
+                                                             (line  245)
+* __mulxf3:                              Soft float library routines.
+                                                             (line   44)
+* __nedf2:                               Soft float library routines.
+                                                             (line  200)
+* __negda2:                              Fixed-point fractional library routines.
+                                                             (line  299)
+* __negdf2:                              Soft float library routines.
+                                                             (line   56)
+* __negdi2:                              Integer library routines.
+                                                             (line   47)
+* __negdq2:                              Fixed-point fractional library routines.
+                                                             (line  289)
+* __negha2:                              Fixed-point fractional library routines.
+                                                             (line  297)
+* __neghq2:                              Fixed-point fractional library routines.
+                                                             (line  287)
+* __negqq2:                              Fixed-point fractional library routines.
+                                                             (line  286)
+* __negsa2:                              Fixed-point fractional library routines.
+                                                             (line  298)
+* __negsf2:                              Soft float library routines.
+                                                             (line   55)
+* __negsq2:                              Fixed-point fractional library routines.
+                                                             (line  288)
+* __negta2:                              Fixed-point fractional library routines.
+                                                             (line  300)
+* __negtf2:                              Soft float library routines.
+                                                             (line   57)
+* __negti2:                              Integer library routines.
+                                                             (line   48)
+* __neguda2:                             Fixed-point fractional library routines.
+                                                             (line  305)
+* __negudq2:                             Fixed-point fractional library routines.
+                                                             (line  296)
+* __neguha2:                             Fixed-point fractional library routines.
+                                                             (line  302)
+* __neguhq2:                             Fixed-point fractional library routines.
+                                                             (line  292)
+* __neguqq2:                             Fixed-point fractional library routines.
+                                                             (line  291)
+* __negusa2:                             Fixed-point fractional library routines.
+                                                             (line  303)
+* __negusq2:                             Fixed-point fractional library routines.
+                                                             (line  294)
+* __neguta2:                             Fixed-point fractional library routines.
+                                                             (line  307)
+* __negvdi2:                             Integer library routines.
+                                                             (line  119)
+* __negvsi2:                             Integer library routines.
+                                                             (line  118)
+* __negxf2:                              Soft float library routines.
+                                                             (line   58)
+* __nesf2:                               Soft float library routines.
+                                                             (line  199)
+* __netf2:                               Soft float library routines.
+                                                             (line  201)
+* __paritydi2:                           Integer library routines.
+                                                             (line  151)
+* __paritysi2:                           Integer library routines.
+                                                             (line  150)
+* __parityti2:                           Integer library routines.
+                                                             (line  152)
+* __popcountdi2:                         Integer library routines.
+                                                             (line  157)
+* __popcountsi2:                         Integer library routines.
+                                                             (line  156)
+* __popcountti2:                         Integer library routines.
+                                                             (line  158)
+* __powidf2:                             Soft float library routines.
+                                                             (line  233)
+* __powisf2:                             Soft float library routines.
+                                                             (line  232)
+* __powitf2:                             Soft float library routines.
+                                                             (line  234)
+* __powixf2:                             Soft float library routines.
+                                                             (line  235)
+* __satfractdadq:                        Fixed-point fractional library routines.
+                                                             (line 1153)
+* __satfractdaha2:                       Fixed-point fractional library routines.
+                                                             (line 1154)
+* __satfractdahq:                        Fixed-point fractional library routines.
+                                                             (line 1151)
+* __satfractdaqq:                        Fixed-point fractional library routines.
+                                                             (line 1150)
+* __satfractdasa2:                       Fixed-point fractional library routines.
+                                                             (line 1155)
+* __satfractdasq:                        Fixed-point fractional library routines.
+                                                             (line 1152)
+* __satfractdata2:                       Fixed-point fractional library routines.
+                                                             (line 1156)
+* __satfractdauda:                       Fixed-point fractional library routines.
+                                                             (line 1166)
+* __satfractdaudq:                       Fixed-point fractional library routines.
+                                                             (line 1162)
+* __satfractdauha:                       Fixed-point fractional library routines.
+                                                             (line 1164)
+* __satfractdauhq:                       Fixed-point fractional library routines.
+                                                             (line 1159)
+* __satfractdauqq:                       Fixed-point fractional library routines.
+                                                             (line 1158)
+* __satfractdausa:                       Fixed-point fractional library routines.
+                                                             (line 1165)
+* __satfractdausq:                       Fixed-point fractional library routines.
+                                                             (line 1160)
+* __satfractdauta:                       Fixed-point fractional library routines.
+                                                             (line 1168)
+* __satfractdfda:                        Fixed-point fractional library routines.
+                                                             (line 1506)
+* __satfractdfdq:                        Fixed-point fractional library routines.
+                                                             (line 1503)
+* __satfractdfha:                        Fixed-point fractional library routines.
+                                                             (line 1504)
+* __satfractdfhq:                        Fixed-point fractional library routines.
+                                                             (line 1501)
+* __satfractdfqq:                        Fixed-point fractional library routines.
+                                                             (line 1500)
+* __satfractdfsa:                        Fixed-point fractional library routines.
+                                                             (line 1505)
+* __satfractdfsq:                        Fixed-point fractional library routines.
+                                                             (line 1502)
+* __satfractdfta:                        Fixed-point fractional library routines.
+                                                             (line 1507)
+* __satfractdfuda:                       Fixed-point fractional library routines.
+                                                             (line 1515)
+* __satfractdfudq:                       Fixed-point fractional library routines.
+                                                             (line 1512)
+* __satfractdfuha:                       Fixed-point fractional library routines.
+                                                             (line 1513)
+* __satfractdfuhq:                       Fixed-point fractional library routines.
+                                                             (line 1509)
+* __satfractdfuqq:                       Fixed-point fractional library routines.
+                                                             (line 1508)
+* __satfractdfusa:                       Fixed-point fractional library routines.
+                                                             (line 1514)
+* __satfractdfusq:                       Fixed-point fractional library routines.
+                                                             (line 1510)
+* __satfractdfuta:                       Fixed-point fractional library routines.
+                                                             (line 1517)
+* __satfractdida:                        Fixed-point fractional library routines.
+                                                             (line 1456)
+* __satfractdidq:                        Fixed-point fractional library routines.
+                                                             (line 1453)
+* __satfractdiha:                        Fixed-point fractional library routines.
+                                                             (line 1454)
+* __satfractdihq:                        Fixed-point fractional library routines.
+                                                             (line 1451)
+* __satfractdiqq:                        Fixed-point fractional library routines.
+                                                             (line 1450)
+* __satfractdisa:                        Fixed-point fractional library routines.
+                                                             (line 1455)
+* __satfractdisq:                        Fixed-point fractional library routines.
+                                                             (line 1452)
+* __satfractdita:                        Fixed-point fractional library routines.
+                                                             (line 1457)
+* __satfractdiuda:                       Fixed-point fractional library routines.
+                                                             (line 1464)
+* __satfractdiudq:                       Fixed-point fractional library routines.
+                                                             (line 1461)
+* __satfractdiuha:                       Fixed-point fractional library routines.
+                                                             (line 1462)
+* __satfractdiuhq:                       Fixed-point fractional library routines.
+                                                             (line 1459)
+* __satfractdiuqq:                       Fixed-point fractional library routines.
+                                                             (line 1458)
+* __satfractdiusa:                       Fixed-point fractional library routines.
+                                                             (line 1463)
+* __satfractdiusq:                       Fixed-point fractional library routines.
+                                                             (line 1460)
+* __satfractdiuta:                       Fixed-point fractional library routines.
+                                                             (line 1465)
+* __satfractdqda:                        Fixed-point fractional library routines.
+                                                             (line 1098)
+* __satfractdqha:                        Fixed-point fractional library routines.
+                                                             (line 1096)
+* __satfractdqhq2:                       Fixed-point fractional library routines.
+                                                             (line 1094)
+* __satfractdqqq2:                       Fixed-point fractional library routines.
+                                                             (line 1093)
+* __satfractdqsa:                        Fixed-point fractional library routines.
+                                                             (line 1097)
+* __satfractdqsq2:                       Fixed-point fractional library routines.
+                                                             (line 1095)
+* __satfractdqta:                        Fixed-point fractional library routines.
+                                                             (line 1099)
+* __satfractdquda:                       Fixed-point fractional library routines.
+                                                             (line 1111)
+* __satfractdqudq:                       Fixed-point fractional library routines.
+                                                             (line 1106)
+* __satfractdquha:                       Fixed-point fractional library routines.
+                                                             (line 1108)
+* __satfractdquhq:                       Fixed-point fractional library routines.
+                                                             (line 1102)
+* __satfractdquqq:                       Fixed-point fractional library routines.
+                                                             (line 1101)
+* __satfractdqusa:                       Fixed-point fractional library routines.
+                                                             (line 1109)
+* __satfractdqusq:                       Fixed-point fractional library routines.
+                                                             (line 1104)
+* __satfractdquta:                       Fixed-point fractional library routines.
+                                                             (line 1113)
+* __satfracthada2:                       Fixed-point fractional library routines.
+                                                             (line 1119)
+* __satfracthadq:                        Fixed-point fractional library routines.
+                                                             (line 1117)
+* __satfracthahq:                        Fixed-point fractional library routines.
+                                                             (line 1115)
+* __satfracthaqq:                        Fixed-point fractional library routines.
+                                                             (line 1114)
+* __satfracthasa2:                       Fixed-point fractional library routines.
+                                                             (line 1118)
+* __satfracthasq:                        Fixed-point fractional library routines.
+                                                             (line 1116)
+* __satfracthata2:                       Fixed-point fractional library routines.
+                                                             (line 1120)
+* __satfracthauda:                       Fixed-point fractional library routines.
+                                                             (line 1132)
+* __satfracthaudq:                       Fixed-point fractional library routines.
+                                                             (line 1127)
+* __satfracthauha:                       Fixed-point fractional library routines.
+                                                             (line 1129)
+* __satfracthauhq:                       Fixed-point fractional library routines.
+                                                             (line 1123)
+* __satfracthauqq:                       Fixed-point fractional library routines.
+                                                             (line 1122)
+* __satfracthausa:                       Fixed-point fractional library routines.
+                                                             (line 1130)
+* __satfracthausq:                       Fixed-point fractional library routines.
+                                                             (line 1125)
+* __satfracthauta:                       Fixed-point fractional library routines.
+                                                             (line 1134)
+* __satfracthida:                        Fixed-point fractional library routines.
+                                                             (line 1424)
+* __satfracthidq:                        Fixed-point fractional library routines.
+                                                             (line 1421)
+* __satfracthiha:                        Fixed-point fractional library routines.
+                                                             (line 1422)
+* __satfracthihq:                        Fixed-point fractional library routines.
+                                                             (line 1419)
+* __satfracthiqq:                        Fixed-point fractional library routines.
+                                                             (line 1418)
+* __satfracthisa:                        Fixed-point fractional library routines.
+                                                             (line 1423)
+* __satfracthisq:                        Fixed-point fractional library routines.
+                                                             (line 1420)
+* __satfracthita:                        Fixed-point fractional library routines.
+                                                             (line 1425)
+* __satfracthiuda:                       Fixed-point fractional library routines.
+                                                             (line 1432)
+* __satfracthiudq:                       Fixed-point fractional library routines.
+                                                             (line 1429)
+* __satfracthiuha:                       Fixed-point fractional library routines.
+                                                             (line 1430)
+* __satfracthiuhq:                       Fixed-point fractional library routines.
+                                                             (line 1427)
+* __satfracthiuqq:                       Fixed-point fractional library routines.
+                                                             (line 1426)
+* __satfracthiusa:                       Fixed-point fractional library routines.
+                                                             (line 1431)
+* __satfracthiusq:                       Fixed-point fractional library routines.
+                                                             (line 1428)
+* __satfracthiuta:                       Fixed-point fractional library routines.
+                                                             (line 1433)
+* __satfracthqda:                        Fixed-point fractional library routines.
+                                                             (line 1064)
+* __satfracthqdq2:                       Fixed-point fractional library routines.
+                                                             (line 1061)
+* __satfracthqha:                        Fixed-point fractional library routines.
+                                                             (line 1062)
+* __satfracthqqq2:                       Fixed-point fractional library routines.
+                                                             (line 1059)
+* __satfracthqsa:                        Fixed-point fractional library routines.
+                                                             (line 1063)
+* __satfracthqsq2:                       Fixed-point fractional library routines.
+                                                             (line 1060)
+* __satfracthqta:                        Fixed-point fractional library routines.
+                                                             (line 1065)
+* __satfracthquda:                       Fixed-point fractional library routines.
+                                                             (line 1072)
+* __satfracthqudq:                       Fixed-point fractional library routines.
+                                                             (line 1069)
+* __satfracthquha:                       Fixed-point fractional library routines.
+                                                             (line 1070)
+* __satfracthquhq:                       Fixed-point fractional library routines.
+                                                             (line 1067)
+* __satfracthquqq:                       Fixed-point fractional library routines.
+                                                             (line 1066)
+* __satfracthqusa:                       Fixed-point fractional library routines.
+                                                             (line 1071)
+* __satfracthqusq:                       Fixed-point fractional library routines.
+                                                             (line 1068)
+* __satfracthquta:                       Fixed-point fractional library routines.
+                                                             (line 1073)
+* __satfractqida:                        Fixed-point fractional library routines.
+                                                             (line 1402)
+* __satfractqidq:                        Fixed-point fractional library routines.
+                                                             (line 1399)
+* __satfractqiha:                        Fixed-point fractional library routines.
+                                                             (line 1400)
+* __satfractqihq:                        Fixed-point fractional library routines.
+                                                             (line 1397)
+* __satfractqiqq:                        Fixed-point fractional library routines.
+                                                             (line 1396)
+* __satfractqisa:                        Fixed-point fractional library routines.
+                                                             (line 1401)
+* __satfractqisq:                        Fixed-point fractional library routines.
+                                                             (line 1398)
+* __satfractqita:                        Fixed-point fractional library routines.
+                                                             (line 1403)
+* __satfractqiuda:                       Fixed-point fractional library routines.
+                                                             (line 1415)
+* __satfractqiudq:                       Fixed-point fractional library routines.
+                                                             (line 1410)
+* __satfractqiuha:                       Fixed-point fractional library routines.
+                                                             (line 1412)
+* __satfractqiuhq:                       Fixed-point fractional library routines.
+                                                             (line 1406)
+* __satfractqiuqq:                       Fixed-point fractional library routines.
+                                                             (line 1405)
+* __satfractqiusa:                       Fixed-point fractional library routines.
+                                                             (line 1413)
+* __satfractqiusq:                       Fixed-point fractional library routines.
+                                                             (line 1408)
+* __satfractqiuta:                       Fixed-point fractional library routines.
+                                                             (line 1417)
+* __satfractqqda:                        Fixed-point fractional library routines.
+                                                             (line 1043)
+* __satfractqqdq2:                       Fixed-point fractional library routines.
+                                                             (line 1040)
+* __satfractqqha:                        Fixed-point fractional library routines.
+                                                             (line 1041)
+* __satfractqqhq2:                       Fixed-point fractional library routines.
+                                                             (line 1038)
+* __satfractqqsa:                        Fixed-point fractional library routines.
+                                                             (line 1042)
+* __satfractqqsq2:                       Fixed-point fractional library routines.
+                                                             (line 1039)
+* __satfractqqta:                        Fixed-point fractional library routines.
+                                                             (line 1044)
+* __satfractqquda:                       Fixed-point fractional library routines.
+                                                             (line 1056)
+* __satfractqqudq:                       Fixed-point fractional library routines.
+                                                             (line 1051)
+* __satfractqquha:                       Fixed-point fractional library routines.
+                                                             (line 1053)
+* __satfractqquhq:                       Fixed-point fractional library routines.
+                                                             (line 1047)
+* __satfractqquqq:                       Fixed-point fractional library routines.
+                                                             (line 1046)
+* __satfractqqusa:                       Fixed-point fractional library routines.
+                                                             (line 1054)
+* __satfractqqusq:                       Fixed-point fractional library routines.
+                                                             (line 1049)
+* __satfractqquta:                       Fixed-point fractional library routines.
+                                                             (line 1058)
+* __satfractsada2:                       Fixed-point fractional library routines.
+                                                             (line 1140)
+* __satfractsadq:                        Fixed-point fractional library routines.
+                                                             (line 1138)
+* __satfractsaha2:                       Fixed-point fractional library routines.
+                                                             (line 1139)
+* __satfractsahq:                        Fixed-point fractional library routines.
+                                                             (line 1136)
+* __satfractsaqq:                        Fixed-point fractional library routines.
+                                                             (line 1135)
+* __satfractsasq:                        Fixed-point fractional library routines.
+                                                             (line 1137)
+* __satfractsata2:                       Fixed-point fractional library routines.
+                                                             (line 1141)
+* __satfractsauda:                       Fixed-point fractional library routines.
+                                                             (line 1148)
+* __satfractsaudq:                       Fixed-point fractional library routines.
+                                                             (line 1145)
+* __satfractsauha:                       Fixed-point fractional library routines.
+                                                             (line 1146)
+* __satfractsauhq:                       Fixed-point fractional library routines.
+                                                             (line 1143)
+* __satfractsauqq:                       Fixed-point fractional library routines.
+                                                             (line 1142)
+* __satfractsausa:                       Fixed-point fractional library routines.
+                                                             (line 1147)
+* __satfractsausq:                       Fixed-point fractional library routines.
+                                                             (line 1144)
+* __satfractsauta:                       Fixed-point fractional library routines.
+                                                             (line 1149)
+* __satfractsfda:                        Fixed-point fractional library routines.
+                                                             (line 1490)
+* __satfractsfdq:                        Fixed-point fractional library routines.
+                                                             (line 1487)
+* __satfractsfha:                        Fixed-point fractional library routines.
+                                                             (line 1488)
+* __satfractsfhq:                        Fixed-point fractional library routines.
+                                                             (line 1485)
+* __satfractsfqq:                        Fixed-point fractional library routines.
+                                                             (line 1484)
+* __satfractsfsa:                        Fixed-point fractional library routines.
+                                                             (line 1489)
+* __satfractsfsq:                        Fixed-point fractional library routines.
+                                                             (line 1486)
+* __satfractsfta:                        Fixed-point fractional library routines.
+                                                             (line 1491)
+* __satfractsfuda:                       Fixed-point fractional library routines.
+                                                             (line 1498)
+* __satfractsfudq:                       Fixed-point fractional library routines.
+                                                             (line 1495)
+* __satfractsfuha:                       Fixed-point fractional library routines.
+                                                             (line 1496)
+* __satfractsfuhq:                       Fixed-point fractional library routines.
+                                                             (line 1493)
+* __satfractsfuqq:                       Fixed-point fractional library routines.
+                                                             (line 1492)
+* __satfractsfusa:                       Fixed-point fractional library routines.
+                                                             (line 1497)
+* __satfractsfusq:                       Fixed-point fractional library routines.
+                                                             (line 1494)
+* __satfractsfuta:                       Fixed-point fractional library routines.
+                                                             (line 1499)
+* __satfractsida:                        Fixed-point fractional library routines.
+                                                             (line 1440)
+* __satfractsidq:                        Fixed-point fractional library routines.
+                                                             (line 1437)
+* __satfractsiha:                        Fixed-point fractional library routines.
+                                                             (line 1438)
+* __satfractsihq:                        Fixed-point fractional library routines.
+                                                             (line 1435)
+* __satfractsiqq:                        Fixed-point fractional library routines.
+                                                             (line 1434)
+* __satfractsisa:                        Fixed-point fractional library routines.
+                                                             (line 1439)
+* __satfractsisq:                        Fixed-point fractional library routines.
+                                                             (line 1436)
+* __satfractsita:                        Fixed-point fractional library routines.
+                                                             (line 1441)
+* __satfractsiuda:                       Fixed-point fractional library routines.
+                                                             (line 1448)
+* __satfractsiudq:                       Fixed-point fractional library routines.
+                                                             (line 1445)
+* __satfractsiuha:                       Fixed-point fractional library routines.
+                                                             (line 1446)
+* __satfractsiuhq:                       Fixed-point fractional library routines.
+                                                             (line 1443)
+* __satfractsiuqq:                       Fixed-point fractional library routines.
+                                                             (line 1442)
+* __satfractsiusa:                       Fixed-point fractional library routines.
+                                                             (line 1447)
+* __satfractsiusq:                       Fixed-point fractional library routines.
+                                                             (line 1444)
+* __satfractsiuta:                       Fixed-point fractional library routines.
+                                                             (line 1449)
+* __satfractsqda:                        Fixed-point fractional library routines.
+                                                             (line 1079)
+* __satfractsqdq2:                       Fixed-point fractional library routines.
+                                                             (line 1076)
+* __satfractsqha:                        Fixed-point fractional library routines.
+                                                             (line 1077)
+* __satfractsqhq2:                       Fixed-point fractional library routines.
+                                                             (line 1075)
+* __satfractsqqq2:                       Fixed-point fractional library routines.
+                                                             (line 1074)
+* __satfractsqsa:                        Fixed-point fractional library routines.
+                                                             (line 1078)
+* __satfractsqta:                        Fixed-point fractional library routines.
+                                                             (line 1080)
+* __satfractsquda:                       Fixed-point fractional library routines.
+                                                             (line 1090)
+* __satfractsqudq:                       Fixed-point fractional library routines.
+                                                             (line 1086)
+* __satfractsquha:                       Fixed-point fractional library routines.
+                                                             (line 1088)
+* __satfractsquhq:                       Fixed-point fractional library routines.
+                                                             (line 1083)
+* __satfractsquqq:                       Fixed-point fractional library routines.
+                                                             (line 1082)
+* __satfractsqusa:                       Fixed-point fractional library routines.
+                                                             (line 1089)
+* __satfractsqusq:                       Fixed-point fractional library routines.
+                                                             (line 1084)
+* __satfractsquta:                       Fixed-point fractional library routines.
+                                                             (line 1092)
+* __satfracttada2:                       Fixed-point fractional library routines.
+                                                             (line 1175)
+* __satfracttadq:                        Fixed-point fractional library routines.
+                                                             (line 1172)
+* __satfracttaha2:                       Fixed-point fractional library routines.
+                                                             (line 1173)
+* __satfracttahq:                        Fixed-point fractional library routines.
+                                                             (line 1170)
+* __satfracttaqq:                        Fixed-point fractional library routines.
+                                                             (line 1169)
+* __satfracttasa2:                       Fixed-point fractional library routines.
+                                                             (line 1174)
+* __satfracttasq:                        Fixed-point fractional library routines.
+                                                             (line 1171)
+* __satfracttauda:                       Fixed-point fractional library routines.
+                                                             (line 1187)
+* __satfracttaudq:                       Fixed-point fractional library routines.
+                                                             (line 1182)
+* __satfracttauha:                       Fixed-point fractional library routines.
+                                                             (line 1184)
+* __satfracttauhq:                       Fixed-point fractional library routines.
+                                                             (line 1178)
+* __satfracttauqq:                       Fixed-point fractional library routines.
+                                                             (line 1177)
+* __satfracttausa:                       Fixed-point fractional library routines.
+                                                             (line 1185)
+* __satfracttausq:                       Fixed-point fractional library routines.
+                                                             (line 1180)
+* __satfracttauta:                       Fixed-point fractional library routines.
+                                                             (line 1189)
+* __satfracttida:                        Fixed-point fractional library routines.
+                                                             (line 1472)
+* __satfracttidq:                        Fixed-point fractional library routines.
+                                                             (line 1469)
+* __satfracttiha:                        Fixed-point fractional library routines.
+                                                             (line 1470)
+* __satfracttihq:                        Fixed-point fractional library routines.
+                                                             (line 1467)
+* __satfracttiqq:                        Fixed-point fractional library routines.
+                                                             (line 1466)
+* __satfracttisa:                        Fixed-point fractional library routines.
+                                                             (line 1471)
+* __satfracttisq:                        Fixed-point fractional library routines.
+                                                             (line 1468)
+* __satfracttita:                        Fixed-point fractional library routines.
+                                                             (line 1473)
+* __satfracttiuda:                       Fixed-point fractional library routines.
+                                                             (line 1481)
+* __satfracttiudq:                       Fixed-point fractional library routines.
+                                                             (line 1478)
+* __satfracttiuha:                       Fixed-point fractional library routines.
+                                                             (line 1479)
+* __satfracttiuhq:                       Fixed-point fractional library routines.
+                                                             (line 1475)
+* __satfracttiuqq:                       Fixed-point fractional library routines.
+                                                             (line 1474)
+* __satfracttiusa:                       Fixed-point fractional library routines.
+                                                             (line 1480)
+* __satfracttiusq:                       Fixed-point fractional library routines.
+                                                             (line 1476)
+* __satfracttiuta:                       Fixed-point fractional library routines.
+                                                             (line 1483)
+* __satfractudada:                       Fixed-point fractional library routines.
+                                                             (line 1351)
+* __satfractudadq:                       Fixed-point fractional library routines.
+                                                             (line 1347)
+* __satfractudaha:                       Fixed-point fractional library routines.
+                                                             (line 1349)
+* __satfractudahq:                       Fixed-point fractional library routines.
+                                                             (line 1344)
+* __satfractudaqq:                       Fixed-point fractional library routines.
+                                                             (line 1343)
+* __satfractudasa:                       Fixed-point fractional library routines.
+                                                             (line 1350)
+* __satfractudasq:                       Fixed-point fractional library routines.
+                                                             (line 1345)
+* __satfractudata:                       Fixed-point fractional library routines.
+                                                             (line 1353)
+* __satfractudaudq:                      Fixed-point fractional library routines.
+                                                             (line 1361)
+* __satfractudauha2:                     Fixed-point fractional library routines.
+                                                             (line 1363)
+* __satfractudauhq:                      Fixed-point fractional library routines.
+                                                             (line 1357)
+* __satfractudauqq:                      Fixed-point fractional library routines.
+                                                             (line 1355)
+* __satfractudausa2:                     Fixed-point fractional library routines.
+                                                             (line 1365)
+* __satfractudausq:                      Fixed-point fractional library routines.
+                                                             (line 1359)
+* __satfractudauta2:                     Fixed-point fractional library routines.
+                                                             (line 1367)
+* __satfractudqda:                       Fixed-point fractional library routines.
+                                                             (line 1276)
+* __satfractudqdq:                       Fixed-point fractional library routines.
+                                                             (line 1271)
+* __satfractudqha:                       Fixed-point fractional library routines.
+                                                             (line 1273)
+* __satfractudqhq:                       Fixed-point fractional library routines.
+                                                             (line 1267)
+* __satfractudqqq:                       Fixed-point fractional library routines.
+                                                             (line 1266)
+* __satfractudqsa:                       Fixed-point fractional library routines.
+                                                             (line 1274)
+* __satfractudqsq:                       Fixed-point fractional library routines.
+                                                             (line 1269)
+* __satfractudqta:                       Fixed-point fractional library routines.
+                                                             (line 1278)
+* __satfractudquda:                      Fixed-point fractional library routines.
+                                                             (line 1290)
+* __satfractudquha:                      Fixed-point fractional library routines.
+                                                             (line 1286)
+* __satfractudquhq2:                     Fixed-point fractional library routines.
+                                                             (line 1282)
+* __satfractudquqq2:                     Fixed-point fractional library routines.
+                                                             (line 1280)
+* __satfractudqusa:                      Fixed-point fractional library routines.
+                                                             (line 1288)
+* __satfractudqusq2:                     Fixed-point fractional library routines.
+                                                             (line 1284)
+* __satfractudquta:                      Fixed-point fractional library routines.
+                                                             (line 1292)
+* __satfractuhada:                       Fixed-point fractional library routines.
+                                                             (line 1304)
+* __satfractuhadq:                       Fixed-point fractional library routines.
+                                                             (line 1299)
+* __satfractuhaha:                       Fixed-point fractional library routines.
+                                                             (line 1301)
+* __satfractuhahq:                       Fixed-point fractional library routines.
+                                                             (line 1295)
+* __satfractuhaqq:                       Fixed-point fractional library routines.
+                                                             (line 1294)
+* __satfractuhasa:                       Fixed-point fractional library routines.
+                                                             (line 1302)
+* __satfractuhasq:                       Fixed-point fractional library routines.
+                                                             (line 1297)
+* __satfractuhata:                       Fixed-point fractional library routines.
+                                                             (line 1306)
+* __satfractuhauda2:                     Fixed-point fractional library routines.
+                                                             (line 1318)
+* __satfractuhaudq:                      Fixed-point fractional library routines.
+                                                             (line 1314)
+* __satfractuhauhq:                      Fixed-point fractional library routines.
+                                                             (line 1310)
+* __satfractuhauqq:                      Fixed-point fractional library routines.
+                                                             (line 1308)
+* __satfractuhausa2:                     Fixed-point fractional library routines.
+                                                             (line 1316)
+* __satfractuhausq:                      Fixed-point fractional library routines.
+                                                             (line 1312)
+* __satfractuhauta2:                     Fixed-point fractional library routines.
+                                                             (line 1320)
+* __satfractuhqda:                       Fixed-point fractional library routines.
+                                                             (line 1224)
+* __satfractuhqdq:                       Fixed-point fractional library routines.
+                                                             (line 1221)
+* __satfractuhqha:                       Fixed-point fractional library routines.
+                                                             (line 1222)
+* __satfractuhqhq:                       Fixed-point fractional library routines.
+                                                             (line 1219)
+* __satfractuhqqq:                       Fixed-point fractional library routines.
+                                                             (line 1218)
+* __satfractuhqsa:                       Fixed-point fractional library routines.
+                                                             (line 1223)
+* __satfractuhqsq:                       Fixed-point fractional library routines.
+                                                             (line 1220)
+* __satfractuhqta:                       Fixed-point fractional library routines.
+                                                             (line 1225)
+* __satfractuhquda:                      Fixed-point fractional library routines.
+                                                             (line 1236)
+* __satfractuhqudq2:                     Fixed-point fractional library routines.
+                                                             (line 1231)
+* __satfractuhquha:                      Fixed-point fractional library routines.
+                                                             (line 1233)
+* __satfractuhquqq2:                     Fixed-point fractional library routines.
+                                                             (line 1227)
+* __satfractuhqusa:                      Fixed-point fractional library routines.
+                                                             (line 1234)
+* __satfractuhqusq2:                     Fixed-point fractional library routines.
+                                                             (line 1229)
+* __satfractuhquta:                      Fixed-point fractional library routines.
+                                                             (line 1238)
+* __satfractunsdida:                     Fixed-point fractional library routines.
+                                                             (line 1834)
+* __satfractunsdidq:                     Fixed-point fractional library routines.
+                                                             (line 1831)
+* __satfractunsdiha:                     Fixed-point fractional library routines.
+                                                             (line 1832)
+* __satfractunsdihq:                     Fixed-point fractional library routines.
+                                                             (line 1828)
+* __satfractunsdiqq:                     Fixed-point fractional library routines.
+                                                             (line 1827)
+* __satfractunsdisa:                     Fixed-point fractional library routines.
+                                                             (line 1833)
+* __satfractunsdisq:                     Fixed-point fractional library routines.
+                                                             (line 1829)
+* __satfractunsdita:                     Fixed-point fractional library routines.
+                                                             (line 1836)
+* __satfractunsdiuda:                    Fixed-point fractional library routines.
+                                                             (line 1850)
+* __satfractunsdiudq:                    Fixed-point fractional library routines.
+                                                             (line 1844)
+* __satfractunsdiuha:                    Fixed-point fractional library routines.
+                                                             (line 1846)
+* __satfractunsdiuhq:                    Fixed-point fractional library routines.
+                                                             (line 1840)
+* __satfractunsdiuqq:                    Fixed-point fractional library routines.
+                                                             (line 1838)
+* __satfractunsdiusa:                    Fixed-point fractional library routines.
+                                                             (line 1848)
+* __satfractunsdiusq:                    Fixed-point fractional library routines.
+                                                             (line 1842)
+* __satfractunsdiuta:                    Fixed-point fractional library routines.
+                                                             (line 1852)
+* __satfractunshida:                     Fixed-point fractional library routines.
+                                                             (line 1786)
+* __satfractunshidq:                     Fixed-point fractional library routines.
+                                                             (line 1783)
+* __satfractunshiha:                     Fixed-point fractional library routines.
+                                                             (line 1784)
+* __satfractunshihq:                     Fixed-point fractional library routines.
+                                                             (line 1780)
+* __satfractunshiqq:                     Fixed-point fractional library routines.
+                                                             (line 1779)
+* __satfractunshisa:                     Fixed-point fractional library routines.
+                                                             (line 1785)
+* __satfractunshisq:                     Fixed-point fractional library routines.
+                                                             (line 1781)
+* __satfractunshita:                     Fixed-point fractional library routines.
+                                                             (line 1788)
+* __satfractunshiuda:                    Fixed-point fractional library routines.
+                                                             (line 1802)
+* __satfractunshiudq:                    Fixed-point fractional library routines.
+                                                             (line 1796)
+* __satfractunshiuha:                    Fixed-point fractional library routines.
+                                                             (line 1798)
+* __satfractunshiuhq:                    Fixed-point fractional library routines.
+                                                             (line 1792)
+* __satfractunshiuqq:                    Fixed-point fractional library routines.
+                                                             (line 1790)
+* __satfractunshiusa:                    Fixed-point fractional library routines.
+                                                             (line 1800)
+* __satfractunshiusq:                    Fixed-point fractional library routines.
+                                                             (line 1794)
+* __satfractunshiuta:                    Fixed-point fractional library routines.
+                                                             (line 1804)
+* __satfractunsqida:                     Fixed-point fractional library routines.
+                                                             (line 1760)
+* __satfractunsqidq:                     Fixed-point fractional library routines.
+                                                             (line 1757)
+* __satfractunsqiha:                     Fixed-point fractional library routines.
+                                                             (line 1758)
+* __satfractunsqihq:                     Fixed-point fractional library routines.
+                                                             (line 1754)
+* __satfractunsqiqq:                     Fixed-point fractional library routines.
+                                                             (line 1753)
+* __satfractunsqisa:                     Fixed-point fractional library routines.
+                                                             (line 1759)
+* __satfractunsqisq:                     Fixed-point fractional library routines.
+                                                             (line 1755)
+* __satfractunsqita:                     Fixed-point fractional library routines.
+                                                             (line 1762)
+* __satfractunsqiuda:                    Fixed-point fractional library routines.
+                                                             (line 1776)
+* __satfractunsqiudq:                    Fixed-point fractional library routines.
+                                                             (line 1770)
+* __satfractunsqiuha:                    Fixed-point fractional library routines.
+                                                             (line 1772)
+* __satfractunsqiuhq:                    Fixed-point fractional library routines.
+                                                             (line 1766)
+* __satfractunsqiuqq:                    Fixed-point fractional library routines.
+                                                             (line 1764)
+* __satfractunsqiusa:                    Fixed-point fractional library routines.
+                                                             (line 1774)
+* __satfractunsqiusq:                    Fixed-point fractional library routines.
+                                                             (line 1768)
+* __satfractunsqiuta:                    Fixed-point fractional library routines.
+                                                             (line 1778)
+* __satfractunssida:                     Fixed-point fractional library routines.
+                                                             (line 1811)
+* __satfractunssidq:                     Fixed-point fractional library routines.
+                                                             (line 1808)
+* __satfractunssiha:                     Fixed-point fractional library routines.
+                                                             (line 1809)
+* __satfractunssihq:                     Fixed-point fractional library routines.
+                                                             (line 1806)
+* __satfractunssiqq:                     Fixed-point fractional library routines.
+                                                             (line 1805)
+* __satfractunssisa:                     Fixed-point fractional library routines.
+                                                             (line 1810)
+* __satfractunssisq:                     Fixed-point fractional library routines.
+                                                             (line 1807)
+* __satfractunssita:                     Fixed-point fractional library routines.
+                                                             (line 1812)
+* __satfractunssiuda:                    Fixed-point fractional library routines.
+                                                             (line 1824)
+* __satfractunssiudq:                    Fixed-point fractional library routines.
+                                                             (line 1819)
+* __satfractunssiuha:                    Fixed-point fractional library routines.
+                                                             (line 1821)
+* __satfractunssiuhq:                    Fixed-point fractional library routines.
+                                                             (line 1815)
+* __satfractunssiuqq:                    Fixed-point fractional library routines.
+                                                             (line 1814)
+* __satfractunssiusa:                    Fixed-point fractional library routines.
+                                                             (line 1822)
+* __satfractunssiusq:                    Fixed-point fractional library routines.
+                                                             (line 1817)
+* __satfractunssiuta:                    Fixed-point fractional library routines.
+                                                             (line 1826)
+* __satfractunstida:                     Fixed-point fractional library routines.
+                                                             (line 1864)
+* __satfractunstidq:                     Fixed-point fractional library routines.
+                                                             (line 1859)
+* __satfractunstiha:                     Fixed-point fractional library routines.
+                                                             (line 1861)
+* __satfractunstihq:                     Fixed-point fractional library routines.
+                                                             (line 1855)
+* __satfractunstiqq:                     Fixed-point fractional library routines.
+                                                             (line 1854)
+* __satfractunstisa:                     Fixed-point fractional library routines.
+                                                             (line 1862)
+* __satfractunstisq:                     Fixed-point fractional library routines.
+                                                             (line 1857)
+* __satfractunstita:                     Fixed-point fractional library routines.
+                                                             (line 1866)
+* __satfractunstiuda:                    Fixed-point fractional library routines.
+                                                             (line 1880)
+* __satfractunstiudq:                    Fixed-point fractional library routines.
+                                                             (line 1874)
+* __satfractunstiuha:                    Fixed-point fractional library routines.
+                                                             (line 1876)
+* __satfractunstiuhq:                    Fixed-point fractional library routines.
+                                                             (line 1870)
+* __satfractunstiuqq:                    Fixed-point fractional library routines.
+                                                             (line 1868)
+* __satfractunstiusa:                    Fixed-point fractional library routines.
+                                                             (line 1878)
+* __satfractunstiusq:                    Fixed-point fractional library routines.
+                                                             (line 1872)
+* __satfractunstiuta:                    Fixed-point fractional library routines.
+                                                             (line 1882)
+* __satfractuqqda:                       Fixed-point fractional library routines.
+                                                             (line 1201)
+* __satfractuqqdq:                       Fixed-point fractional library routines.
+                                                             (line 1196)
+* __satfractuqqha:                       Fixed-point fractional library routines.
+                                                             (line 1198)
+* __satfractuqqhq:                       Fixed-point fractional library routines.
+                                                             (line 1192)
+* __satfractuqqqq:                       Fixed-point fractional library routines.
+                                                             (line 1191)
+* __satfractuqqsa:                       Fixed-point fractional library routines.
+                                                             (line 1199)
+* __satfractuqqsq:                       Fixed-point fractional library routines.
+                                                             (line 1194)
+* __satfractuqqta:                       Fixed-point fractional library routines.
+                                                             (line 1203)
+* __satfractuqquda:                      Fixed-point fractional library routines.
+                                                             (line 1215)
+* __satfractuqqudq2:                     Fixed-point fractional library routines.
+                                                             (line 1209)
+* __satfractuqquha:                      Fixed-point fractional library routines.
+                                                             (line 1211)
+* __satfractuqquhq2:                     Fixed-point fractional library routines.
+                                                             (line 1205)
+* __satfractuqqusa:                      Fixed-point fractional library routines.
+                                                             (line 1213)
+* __satfractuqqusq2:                     Fixed-point fractional library routines.
+                                                             (line 1207)
+* __satfractuqquta:                      Fixed-point fractional library routines.
+                                                             (line 1217)
+* __satfractusada:                       Fixed-point fractional library routines.
+                                                             (line 1327)
+* __satfractusadq:                       Fixed-point fractional library routines.
+                                                             (line 1324)
+* __satfractusaha:                       Fixed-point fractional library routines.
+                                                             (line 1325)
+* __satfractusahq:                       Fixed-point fractional library routines.
+                                                             (line 1322)
+* __satfractusaqq:                       Fixed-point fractional library routines.
+                                                             (line 1321)
+* __satfractusasa:                       Fixed-point fractional library routines.
+                                                             (line 1326)
+* __satfractusasq:                       Fixed-point fractional library routines.
+                                                             (line 1323)
+* __satfractusata:                       Fixed-point fractional library routines.
+                                                             (line 1328)
+* __satfractusauda2:                     Fixed-point fractional library routines.
+                                                             (line 1339)
+* __satfractusaudq:                      Fixed-point fractional library routines.
+                                                             (line 1335)
+* __satfractusauha2:                     Fixed-point fractional library routines.
+                                                             (line 1337)
+* __satfractusauhq:                      Fixed-point fractional library routines.
+                                                             (line 1331)
+* __satfractusauqq:                      Fixed-point fractional library routines.
+                                                             (line 1330)
+* __satfractusausq:                      Fixed-point fractional library routines.
+                                                             (line 1333)
+* __satfractusauta2:                     Fixed-point fractional library routines.
+                                                             (line 1341)
+* __satfractusqda:                       Fixed-point fractional library routines.
+                                                             (line 1248)
+* __satfractusqdq:                       Fixed-point fractional library routines.
+                                                             (line 1244)
+* __satfractusqha:                       Fixed-point fractional library routines.
+                                                             (line 1246)
+* __satfractusqhq:                       Fixed-point fractional library routines.
+                                                             (line 1241)
+* __satfractusqqq:                       Fixed-point fractional library routines.
+                                                             (line 1240)
+* __satfractusqsa:                       Fixed-point fractional library routines.
+                                                             (line 1247)
+* __satfractusqsq:                       Fixed-point fractional library routines.
+                                                             (line 1242)
+* __satfractusqta:                       Fixed-point fractional library routines.
+                                                             (line 1250)
+* __satfractusquda:                      Fixed-point fractional library routines.
+                                                             (line 1262)
+* __satfractusqudq2:                     Fixed-point fractional library routines.
+                                                             (line 1256)
+* __satfractusquha:                      Fixed-point fractional library routines.
+                                                             (line 1258)
+* __satfractusquhq2:                     Fixed-point fractional library routines.
+                                                             (line 1254)
+* __satfractusquqq2:                     Fixed-point fractional library routines.
+                                                             (line 1252)
+* __satfractusqusa:                      Fixed-point fractional library routines.
+                                                             (line 1260)
+* __satfractusquta:                      Fixed-point fractional library routines.
+                                                             (line 1264)
+* __satfractutada:                       Fixed-point fractional library routines.
+                                                             (line 1379)
+* __satfractutadq:                       Fixed-point fractional library routines.
+                                                             (line 1374)
+* __satfractutaha:                       Fixed-point fractional library routines.
+                                                             (line 1376)
+* __satfractutahq:                       Fixed-point fractional library routines.
+                                                             (line 1370)
+* __satfractutaqq:                       Fixed-point fractional library routines.
+                                                             (line 1369)
+* __satfractutasa:                       Fixed-point fractional library routines.
+                                                             (line 1377)
+* __satfractutasq:                       Fixed-point fractional library routines.
+                                                             (line 1372)
+* __satfractutata:                       Fixed-point fractional library routines.
+                                                             (line 1381)
+* __satfractutauda2:                     Fixed-point fractional library routines.
+                                                             (line 1395)
+* __satfractutaudq:                      Fixed-point fractional library routines.
+                                                             (line 1389)
+* __satfractutauha2:                     Fixed-point fractional library routines.
+                                                             (line 1391)
+* __satfractutauhq:                      Fixed-point fractional library routines.
+                                                             (line 1385)
+* __satfractutauqq:                      Fixed-point fractional library routines.
+                                                             (line 1383)
+* __satfractutausa2:                     Fixed-point fractional library routines.
+                                                             (line 1393)
+* __satfractutausq:                      Fixed-point fractional library routines.
+                                                             (line 1387)
+* __splitstack_find:                     Miscellaneous routines.
+                                                             (line   18)
+* __ssaddda3:                            Fixed-point fractional library routines.
+                                                             (line   67)
+* __ssadddq3:                            Fixed-point fractional library routines.
+                                                             (line   63)
+* __ssaddha3:                            Fixed-point fractional library routines.
+                                                             (line   65)
+* __ssaddhq3:                            Fixed-point fractional library routines.
+                                                             (line   60)
+* __ssaddqq3:                            Fixed-point fractional library routines.
+                                                             (line   59)
+* __ssaddsa3:                            Fixed-point fractional library routines.
+                                                             (line   66)
+* __ssaddsq3:                            Fixed-point fractional library routines.
+                                                             (line   61)
+* __ssaddta3:                            Fixed-point fractional library routines.
+                                                             (line   69)
+* __ssashlda3:                           Fixed-point fractional library routines.
+                                                             (line  402)
+* __ssashldq3:                           Fixed-point fractional library routines.
+                                                             (line  399)
+* __ssashlha3:                           Fixed-point fractional library routines.
+                                                             (line  400)
+* __ssashlhq3:                           Fixed-point fractional library routines.
+                                                             (line  396)
+* __ssashlsa3:                           Fixed-point fractional library routines.
+                                                             (line  401)
+* __ssashlsq3:                           Fixed-point fractional library routines.
+                                                             (line  397)
+* __ssashlta3:                           Fixed-point fractional library routines.
+                                                             (line  404)
+* __ssdivda3:                            Fixed-point fractional library routines.
+                                                             (line  261)
+* __ssdivdq3:                            Fixed-point fractional library routines.
+                                                             (line  257)
+* __ssdivha3:                            Fixed-point fractional library routines.
+                                                             (line  259)
+* __ssdivhq3:                            Fixed-point fractional library routines.
+                                                             (line  254)
+* __ssdivqq3:                            Fixed-point fractional library routines.
+                                                             (line  253)
+* __ssdivsa3:                            Fixed-point fractional library routines.
+                                                             (line  260)
+* __ssdivsq3:                            Fixed-point fractional library routines.
+                                                             (line  255)
+* __ssdivta3:                            Fixed-point fractional library routines.
+                                                             (line  263)
+* __ssmulda3:                            Fixed-point fractional library routines.
+                                                             (line  193)
+* __ssmuldq3:                            Fixed-point fractional library routines.
+                                                             (line  189)
+* __ssmulha3:                            Fixed-point fractional library routines.
+                                                             (line  191)
+* __ssmulhq3:                            Fixed-point fractional library routines.
+                                                             (line  186)
+* __ssmulqq3:                            Fixed-point fractional library routines.
+                                                             (line  185)
+* __ssmulsa3:                            Fixed-point fractional library routines.
+                                                             (line  192)
+* __ssmulsq3:                            Fixed-point fractional library routines.
+                                                             (line  187)
+* __ssmulta3:                            Fixed-point fractional library routines.
+                                                             (line  195)
+* __ssnegda2:                            Fixed-point fractional library routines.
+                                                             (line  316)
+* __ssnegdq2:                            Fixed-point fractional library routines.
+                                                             (line  313)
+* __ssnegha2:                            Fixed-point fractional library routines.
+                                                             (line  314)
+* __ssneghq2:                            Fixed-point fractional library routines.
+                                                             (line  311)
+* __ssnegqq2:                            Fixed-point fractional library routines.
+                                                             (line  310)
+* __ssnegsa2:                            Fixed-point fractional library routines.
+                                                             (line  315)
+* __ssnegsq2:                            Fixed-point fractional library routines.
+                                                             (line  312)
+* __ssnegta2:                            Fixed-point fractional library routines.
+                                                             (line  317)
+* __sssubda3:                            Fixed-point fractional library routines.
+                                                             (line  129)
+* __sssubdq3:                            Fixed-point fractional library routines.
+                                                             (line  125)
+* __sssubha3:                            Fixed-point fractional library routines.
+                                                             (line  127)
+* __sssubhq3:                            Fixed-point fractional library routines.
+                                                             (line  122)
+* __sssubqq3:                            Fixed-point fractional library routines.
+                                                             (line  121)
+* __sssubsa3:                            Fixed-point fractional library routines.
+                                                             (line  128)
+* __sssubsq3:                            Fixed-point fractional library routines.
+                                                             (line  123)
+* __sssubta3:                            Fixed-point fractional library routines.
+                                                             (line  131)
+* __subda3:                              Fixed-point fractional library routines.
+                                                             (line  107)
+* __subdf3:                              Soft float library routines.
+                                                             (line   31)
+* __subdq3:                              Fixed-point fractional library routines.
+                                                             (line   95)
+* __subha3:                              Fixed-point fractional library routines.
+                                                             (line  105)
+* __subhq3:                              Fixed-point fractional library routines.
+                                                             (line   92)
+* __subqq3:                              Fixed-point fractional library routines.
+                                                             (line   91)
+* __subsa3:                              Fixed-point fractional library routines.
+                                                             (line  106)
+* __subsf3:                              Soft float library routines.
+                                                             (line   30)
+* __subsq3:                              Fixed-point fractional library routines.
+                                                             (line   93)
+* __subta3:                              Fixed-point fractional library routines.
+                                                             (line  109)
+* __subtf3:                              Soft float library routines.
+                                                             (line   33)
+* __subuda3:                             Fixed-point fractional library routines.
+                                                             (line  115)
+* __subudq3:                             Fixed-point fractional library routines.
+                                                             (line  103)
+* __subuha3:                             Fixed-point fractional library routines.
+                                                             (line  111)
+* __subuhq3:                             Fixed-point fractional library routines.
+                                                             (line   99)
+* __subuqq3:                             Fixed-point fractional library routines.
+                                                             (line   97)
+* __subusa3:                             Fixed-point fractional library routines.
+                                                             (line  113)
+* __subusq3:                             Fixed-point fractional library routines.
+                                                             (line  101)
+* __subuta3:                             Fixed-point fractional library routines.
+                                                             (line  117)
+* __subvdi3:                             Integer library routines.
+                                                             (line  123)
+* __subvsi3:                             Integer library routines.
+                                                             (line  122)
+* __subxf3:                              Soft float library routines.
+                                                             (line   35)
+* __truncdfsf2:                          Soft float library routines.
+                                                             (line   76)
+* __trunctfdf2:                          Soft float library routines.
+                                                             (line   73)
+* __trunctfsf2:                          Soft float library routines.
+                                                             (line   75)
+* __truncxfdf2:                          Soft float library routines.
+                                                             (line   72)
+* __truncxfsf2:                          Soft float library routines.
+                                                             (line   74)
+* __ucmpdi2:                             Integer library routines.
+                                                             (line   93)
+* __ucmpti2:                             Integer library routines.
+                                                             (line   95)
+* __udivdi3:                             Integer library routines.
+                                                             (line   54)
+* __udivmoddi3:                          Integer library routines.
+                                                             (line   61)
+* __udivsi3:                             Integer library routines.
+                                                             (line   52)
+* __udivti3:                             Integer library routines.
+                                                             (line   56)
+* __udivuda3:                            Fixed-point fractional library routines.
+                                                             (line  246)
+* __udivudq3:                            Fixed-point fractional library routines.
+                                                             (line  240)
+* __udivuha3:                            Fixed-point fractional library routines.
+                                                             (line  242)
+* __udivuhq3:                            Fixed-point fractional library routines.
+                                                             (line  236)
+* __udivuqq3:                            Fixed-point fractional library routines.
+                                                             (line  234)
+* __udivusa3:                            Fixed-point fractional library routines.
+                                                             (line  244)
+* __udivusq3:                            Fixed-point fractional library routines.
+                                                             (line  238)
+* __udivuta3:                            Fixed-point fractional library routines.
+                                                             (line  248)
+* __umoddi3:                             Integer library routines.
+                                                             (line   71)
+* __umodsi3:                             Integer library routines.
+                                                             (line   69)
+* __umodti3:                             Integer library routines.
+                                                             (line   73)
+* __unorddf2:                            Soft float library routines.
+                                                             (line  173)
+* __unordsf2:                            Soft float library routines.
+                                                             (line  172)
+* __unordtf2:                            Soft float library routines.
+                                                             (line  174)
+* __usadduda3:                           Fixed-point fractional library routines.
+                                                             (line   85)
+* __usaddudq3:                           Fixed-point fractional library routines.
+                                                             (line   79)
+* __usadduha3:                           Fixed-point fractional library routines.
+                                                             (line   81)
+* __usadduhq3:                           Fixed-point fractional library routines.
+                                                             (line   75)
+* __usadduqq3:                           Fixed-point fractional library routines.
+                                                             (line   73)
+* __usaddusa3:                           Fixed-point fractional library routines.
+                                                             (line   83)
+* __usaddusq3:                           Fixed-point fractional library routines.
+                                                             (line   77)
+* __usadduta3:                           Fixed-point fractional library routines.
+                                                             (line   87)
+* __usashluda3:                          Fixed-point fractional library routines.
+                                                             (line  421)
+* __usashludq3:                          Fixed-point fractional library routines.
+                                                             (line  415)
+* __usashluha3:                          Fixed-point fractional library routines.
+                                                             (line  417)
+* __usashluhq3:                          Fixed-point fractional library routines.
+                                                             (line  411)
+* __usashluqq3:                          Fixed-point fractional library routines.
+                                                             (line  409)
+* __usashlusa3:                          Fixed-point fractional library routines.
+                                                             (line  419)
+* __usashlusq3:                          Fixed-point fractional library routines.
+                                                             (line  413)
+* __usashluta3:                          Fixed-point fractional library routines.
+                                                             (line  423)
+* __usdivuda3:                           Fixed-point fractional library routines.
+                                                             (line  280)
+* __usdivudq3:                           Fixed-point fractional library routines.
+                                                             (line  274)
+* __usdivuha3:                           Fixed-point fractional library routines.
+                                                             (line  276)
+* __usdivuhq3:                           Fixed-point fractional library routines.
+                                                             (line  270)
+* __usdivuqq3:                           Fixed-point fractional library routines.
+                                                             (line  268)
+* __usdivusa3:                           Fixed-point fractional library routines.
+                                                             (line  278)
+* __usdivusq3:                           Fixed-point fractional library routines.
+                                                             (line  272)
+* __usdivuta3:                           Fixed-point fractional library routines.
+                                                             (line  282)
+* __usmuluda3:                           Fixed-point fractional library routines.
+                                                             (line  212)
+* __usmuludq3:                           Fixed-point fractional library routines.
+                                                             (line  206)
+* __usmuluha3:                           Fixed-point fractional library routines.
+                                                             (line  208)
+* __usmuluhq3:                           Fixed-point fractional library routines.
+                                                             (line  202)
+* __usmuluqq3:                           Fixed-point fractional library routines.
+                                                             (line  200)
+* __usmulusa3:                           Fixed-point fractional library routines.
+                                                             (line  210)
+* __usmulusq3:                           Fixed-point fractional library routines.
+                                                             (line  204)
+* __usmuluta3:                           Fixed-point fractional library routines.
+                                                             (line  214)
+* __usneguda2:                           Fixed-point fractional library routines.
+                                                             (line  331)
+* __usnegudq2:                           Fixed-point fractional library routines.
+                                                             (line  326)
+* __usneguha2:                           Fixed-point fractional library routines.
+                                                             (line  328)
+* __usneguhq2:                           Fixed-point fractional library routines.
+                                                             (line  322)
+* __usneguqq2:                           Fixed-point fractional library routines.
+                                                             (line  321)
+* __usnegusa2:                           Fixed-point fractional library routines.
+                                                             (line  329)
+* __usnegusq2:                           Fixed-point fractional library routines.
+                                                             (line  324)
+* __usneguta2:                           Fixed-point fractional library routines.
+                                                             (line  333)
+* __ussubuda3:                           Fixed-point fractional library routines.
+                                                             (line  148)
+* __ussubudq3:                           Fixed-point fractional library routines.
+                                                             (line  142)
+* __ussubuha3:                           Fixed-point fractional library routines.
+                                                             (line  144)
+* __ussubuhq3:                           Fixed-point fractional library routines.
+                                                             (line  138)
+* __ussubuqq3:                           Fixed-point fractional library routines.
+                                                             (line  136)
+* __ussubusa3:                           Fixed-point fractional library routines.
+                                                             (line  146)
+* __ussubusq3:                           Fixed-point fractional library routines.
+                                                             (line  140)
+* __ussubuta3:                           Fixed-point fractional library routines.
+                                                             (line  150)
+* abort:                                 Portability.        (line   21)
+* abs:                                   Arithmetic.         (line  200)
+* abs and attributes:                    Expressions.        (line   64)
+* ABS_EXPR:                              Unary and Binary Expressions.
+                                                             (line    6)
+* absence_set:                           Processor pipeline description.
+                                                             (line  220)
+* absM2 instruction pattern:             Standard Names.     (line  479)
+* absolute value:                        Arithmetic.         (line  200)
+* access to operands:                    Accessors.          (line    6)
+* access to special operands:            Special Accessors.  (line    6)
+* accessors:                             Accessors.          (line    6)
+* ACCUM_TYPE_SIZE:                       Type Layout.        (line   88)
+* ACCUMULATE_OUTGOING_ARGS:              Stack Arguments.    (line   49)
+* ACCUMULATE_OUTGOING_ARGS and stack frames: Function Entry. (line  135)
+* ADA_LONG_TYPE_SIZE:                    Type Layout.        (line   26)
+* Adding a new GIMPLE statement code:    Adding a new GIMPLE statement code.
+                                                             (line    6)
+* ADDITIONAL_REGISTER_NAMES:             Instruction Output. (line   15)
+* addM3 instruction pattern:             Standard Names.     (line  216)
+* addMODEcc instruction pattern:         Standard Names.     (line  917)
+* addr_diff_vec:                         Side Effects.       (line  302)
+* addr_diff_vec, length of:              Insn Lengths.       (line   26)
+* ADDR_EXPR:                             Storage References. (line    6)
+* addr_vec:                              Side Effects.       (line  297)
+* addr_vec, length of:                   Insn Lengths.       (line   26)
+* address constraints:                   Simple Constraints. (line  164)
+* address_operand <1>:                   Simple Constraints. (line  168)
+* address_operand:                       Machine-Independent Predicates.
+                                                             (line   63)
+* addressing modes:                      Addressing Modes.   (line    6)
+* ADJUST_FIELD_ALIGN:                    Storage Layout.     (line  189)
+* ADJUST_INSN_LENGTH:                    Insn Lengths.       (line   35)
+* ADJUST_REG_ALLOC_ORDER:                Allocation Order.   (line   23)
+* aggregates as return values:           Aggregate Return.   (line    6)
+* alias:                                 Alias analysis.     (line    6)
+* ALL_COP_ADDITIONAL_REGISTER_NAMES:     MIPS Coprocessors.  (line   32)
+* ALL_REGS:                              Register Classes.   (line   17)
+* allocate_stack instruction pattern:    Standard Names.     (line 1227)
+* alternate entry points:                Insns.              (line  140)
+* anchored addresses:                    Anchored Addresses. (line    6)
+* and:                                   Arithmetic.         (line  158)
+* and and attributes:                    Expressions.        (line   50)
+* and, canonicalization of:              Insn Canonicalizations.
+                                                             (line   52)
+* andM3 instruction pattern:             Standard Names.     (line  222)
+* annotations:                           Annotations.        (line    6)
+* APPLY_RESULT_SIZE:                     Scalar Return.      (line  112)
+* ARG_POINTER_CFA_OFFSET:                Frame Layout.       (line  194)
+* ARG_POINTER_REGNUM:                    Frame Registers.    (line   41)
+* ARG_POINTER_REGNUM and virtual registers: Regs and Memory. (line   65)
+* arg_pointer_rtx:                       Frame Registers.    (line  104)
+* ARGS_GROW_DOWNWARD:                    Frame Layout.       (line   35)
+* argument passing:                      Interface.          (line   36)
+* arguments in registers:                Register Arguments. (line    6)
+* arguments on stack:                    Stack Arguments.    (line    6)
+* arithmetic library:                    Soft float library routines.
+                                                             (line    6)
+* arithmetic shift:                      Arithmetic.         (line  173)
+* arithmetic shift with signed saturation: Arithmetic.       (line  173)
+* arithmetic shift with unsigned saturation: Arithmetic.     (line  173)
+* arithmetic, in RTL:                    Arithmetic.         (line    6)
+* ARITHMETIC_TYPE_P:                     Types for C++.      (line   61)
+* array:                                 Types.              (line    6)
+* ARRAY_RANGE_REF:                       Storage References. (line    6)
+* ARRAY_REF:                             Storage References. (line    6)
+* ARRAY_TYPE:                            Types.              (line    6)
+* AS_NEEDS_DASH_FOR_PIPED_INPUT:         Driver.             (line   89)
+* ashift:                                Arithmetic.         (line  173)
+* ashift and attributes:                 Expressions.        (line   64)
+* ashiftrt:                              Arithmetic.         (line  190)
+* ashiftrt and attributes:               Expressions.        (line   64)
+* ashlM3 instruction pattern:            Standard Names.     (line  458)
+* ashrM3 instruction pattern:            Standard Names.     (line  468)
+* ASM_APP_OFF:                           File Framework.     (line   78)
+* ASM_APP_ON:                            File Framework.     (line   71)
+* ASM_COMMENT_START:                     File Framework.     (line   66)
+* ASM_DECLARE_CLASS_REFERENCE:           Label Output.       (line  465)
+* ASM_DECLARE_FUNCTION_NAME:             Label Output.       (line   99)
+* ASM_DECLARE_FUNCTION_SIZE:             Label Output.       (line  114)
+* ASM_DECLARE_OBJECT_NAME:               Label Output.       (line  127)
+* ASM_DECLARE_REGISTER_GLOBAL:           Label Output.       (line  156)
+* ASM_DECLARE_UNRESOLVED_REFERENCE:      Label Output.       (line  471)
+* ASM_FINAL_SPEC:                        Driver.             (line   82)
+* ASM_FINISH_DECLARE_OBJECT:             Label Output.       (line  164)
+* ASM_FORMAT_PRIVATE_NAME:               Label Output.       (line  383)
+* asm_fprintf:                           Instruction Output. (line  151)
+* ASM_FPRINTF_EXTENSIONS:                Instruction Output. (line  162)
+* ASM_GENERATE_INTERNAL_LABEL:           Label Output.       (line  367)
+* asm_input:                             Side Effects.       (line  284)
+* asm_input and /v:                      Flags.              (line   94)
+* ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX:     Exception Handling. (line   82)
+* ASM_NO_SKIP_IN_TEXT:                   Alignment Output.   (line   79)
+* asm_noperands:                         Insns.              (line  307)
+* asm_operands and /v:                   Flags.              (line   94)
+* asm_operands, RTL sharing:             Sharing.            (line   45)
+* asm_operands, usage:                   Assembler.          (line    6)
+* ASM_OUTPUT_ADDR_DIFF_ELT:              Dispatch Tables.    (line    9)
+* ASM_OUTPUT_ADDR_VEC_ELT:               Dispatch Tables.    (line   26)
+* ASM_OUTPUT_ALIGN:                      Alignment Output.   (line   86)
+* ASM_OUTPUT_ALIGN_WITH_NOP:             Alignment Output.   (line   91)
+* ASM_OUTPUT_ALIGNED_BSS:                Uninitialized Data. (line   71)
+* ASM_OUTPUT_ALIGNED_COMMON:             Uninitialized Data. (line   30)
+* ASM_OUTPUT_ALIGNED_DECL_COMMON:        Uninitialized Data. (line   38)
+* ASM_OUTPUT_ALIGNED_DECL_LOCAL:         Uninitialized Data. (line  102)
+* ASM_OUTPUT_ALIGNED_LOCAL:              Uninitialized Data. (line   94)
+* ASM_OUTPUT_ASCII:                      Data Output.        (line   62)
+* ASM_OUTPUT_BSS:                        Uninitialized Data. (line   46)
+* ASM_OUTPUT_CASE_END:                   Dispatch Tables.    (line   51)
+* ASM_OUTPUT_CASE_LABEL:                 Dispatch Tables.    (line   38)
+* ASM_OUTPUT_COMMON:                     Uninitialized Data. (line   10)
+* ASM_OUTPUT_DEBUG_LABEL:                Label Output.       (line  355)
+* ASM_OUTPUT_DEF:                        Label Output.       (line  404)
+* ASM_OUTPUT_DEF_FROM_DECLS:             Label Output.       (line  412)
+* ASM_OUTPUT_DWARF_DELTA:                SDB and DWARF.      (line   69)
+* ASM_OUTPUT_DWARF_OFFSET:               SDB and DWARF.      (line   78)
+* ASM_OUTPUT_DWARF_PCREL:                SDB and DWARF.      (line   84)
+* ASM_OUTPUT_DWARF_TABLE_REF:            SDB and DWARF.      (line   89)
+* ASM_OUTPUT_DWARF_VMS_DELTA:            SDB and DWARF.      (line   73)
+* ASM_OUTPUT_EXTERNAL:                   Label Output.       (line  284)
+* ASM_OUTPUT_FDESC:                      Data Output.        (line   71)
+* ASM_OUTPUT_FUNCTION_LABEL:             Label Output.       (line   17)
+* ASM_OUTPUT_IDENT:                      File Framework.     (line  109)
+* ASM_OUTPUT_INTERNAL_LABEL:             Label Output.       (line   29)
+* ASM_OUTPUT_LABEL:                      Label Output.       (line    9)
+* ASM_OUTPUT_LABEL_REF:                  Label Output.       (line  328)
+* ASM_OUTPUT_LABELREF:                   Label Output.       (line  306)
+* ASM_OUTPUT_LOCAL:                      Uninitialized Data. (line   81)
+* ASM_OUTPUT_MAX_SKIP_ALIGN:             Alignment Output.   (line   95)
+* ASM_OUTPUT_MEASURED_SIZE:              Label Output.       (line   53)
+* ASM_OUTPUT_OPCODE:                     Instruction Output. (line   36)
+* ASM_OUTPUT_POOL_EPILOGUE:              Data Output.        (line  121)
+* ASM_OUTPUT_POOL_PROLOGUE:              Data Output.        (line   84)
+* ASM_OUTPUT_REG_POP:                    Instruction Output. (line  206)
+* ASM_OUTPUT_REG_PUSH:                   Instruction Output. (line  201)
+* ASM_OUTPUT_SIZE_DIRECTIVE:             Label Output.       (line   47)
+* ASM_OUTPUT_SKIP:                       Alignment Output.   (line   73)
+* ASM_OUTPUT_SOURCE_FILENAME:            File Framework.     (line   85)
+* ASM_OUTPUT_SPECIAL_POOL_ENTRY:         Data Output.        (line   96)
+* ASM_OUTPUT_SYMBOL_REF:                 Label Output.       (line  321)
+* ASM_OUTPUT_TYPE_DIRECTIVE:             Label Output.       (line   89)
+* ASM_OUTPUT_WEAK_ALIAS:                 Label Output.       (line  430)
+* ASM_OUTPUT_WEAKREF:                    Label Output.       (line  216)
+* ASM_PREFERRED_EH_DATA_FORMAT:          Exception Handling. (line   67)
+* ASM_SPEC:                              Driver.             (line   74)
+* ASM_STABD_OP:                          DBX Options.        (line   36)
+* ASM_STABN_OP:                          DBX Options.        (line   43)
+* ASM_STABS_OP:                          DBX Options.        (line   29)
+* ASM_WEAKEN_DECL:                       Label Output.       (line  208)
+* ASM_WEAKEN_LABEL:                      Label Output.       (line  195)
+* assemble_name:                         Label Output.       (line    8)
+* assemble_name_raw:                     Label Output.       (line   28)
+* assembler format:                      File Framework.     (line    6)
+* assembler instructions in RTL:         Assembler.          (line    6)
+* ASSEMBLER_DIALECT:                     Instruction Output. (line  174)
+* assigning attribute values to insns:   Tagging Insns.      (line    6)
+* asterisk in template:                  Output Statement.   (line   29)
+* atan2M3 instruction pattern:           Standard Names.     (line  549)
+* attr <1>:                              Tagging Insns.      (line   54)
+* attr:                                  Expressions.        (line  154)
+* attr_flag:                             Expressions.        (line  119)
+* attribute expressions:                 Expressions.        (line    6)
+* attribute specifications:              Attr Example.       (line    6)
+* attribute specifications example:      Attr Example.       (line    6)
+* ATTRIBUTE_ALIGNED_VALUE:               Storage Layout.     (line  171)
+* attributes:                            Attributes.         (line    6)
+* attributes, defining:                  Defining Attributes.
+                                                             (line    6)
+* attributes, target-specific:           Target Attributes.  (line    6)
+* autoincrement addressing, availability: Portability.       (line   21)
+* autoincrement/decrement addressing:    Simple Constraints. (line   30)
+* automata_option:                       Processor pipeline description.
+                                                             (line  301)
+* automaton based pipeline description:  Processor pipeline description.
+                                                             (line    6)
+* automaton based scheduler:             Processor pipeline description.
+                                                             (line    6)
+* AVOID_CCMODE_COPIES:                   Values in Registers.
+                                                             (line  153)
+* backslash:                             Output Template.    (line   46)
+* barrier:                               Insns.              (line  160)
+* barrier and /f:                        Flags.              (line  125)
+* barrier and /v:                        Flags.              (line   44)
+* BASE_REG_CLASS:                        Register Classes.   (line  109)
+* basic block:                           Basic Blocks.       (line    6)
+* Basic Statements:                      Basic Statements.   (line    6)
+* basic-block.h:                         Control Flow.       (line    6)
+* BASIC_BLOCK:                           Basic Blocks.       (line   19)
+* basic_block:                           Basic Blocks.       (line    6)
+* BB_HEAD, BB_END:                       Maintaining the CFG.
+                                                             (line   88)
+* bb_seq:                                GIMPLE sequences.   (line   73)
+* BIGGEST_ALIGNMENT:                     Storage Layout.     (line  161)
+* BIGGEST_FIELD_ALIGNMENT:               Storage Layout.     (line  182)
+* BImode:                                Machine Modes.      (line   22)
+* BIND_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* BINFO_TYPE:                            Classes.            (line    6)
+* bit-fields:                            Bit-Fields.         (line    6)
+* BIT_AND_EXPR:                          Unary and Binary Expressions.
+                                                             (line    6)
+* BIT_IOR_EXPR:                          Unary and Binary Expressions.
+                                                             (line    6)
+* BIT_NOT_EXPR:                          Unary and Binary Expressions.
+                                                             (line    6)
+* BIT_XOR_EXPR:                          Unary and Binary Expressions.
+                                                             (line    6)
+* BITFIELD_NBYTES_LIMITED:               Storage Layout.     (line  386)
+* BITS_BIG_ENDIAN:                       Storage Layout.     (line   12)
+* BITS_BIG_ENDIAN, effect on sign_extract: Bit-Fields.       (line    8)
+* BITS_PER_UNIT:                         Storage Layout.     (line   45)
+* BITS_PER_WORD:                         Storage Layout.     (line   50)
+* bitwise complement:                    Arithmetic.         (line  154)
+* bitwise exclusive-or:                  Arithmetic.         (line  168)
+* bitwise inclusive-or:                  Arithmetic.         (line  163)
+* bitwise logical-and:                   Arithmetic.         (line  158)
+* BLKmode:                               Machine Modes.      (line  183)
+* BLKmode, and function return values:   Calls.              (line   23)
+* block statement iterators <1>:         Maintaining the CFG.
+                                                             (line   45)
+* block statement iterators:             Basic Blocks.       (line   68)
+* BLOCK_FOR_INSN, bb_for_stmt:           Maintaining the CFG.
+                                                             (line   40)
+* BLOCK_REG_PADDING:                     Register Arguments. (line  228)
+* blockage instruction pattern:          Standard Names.     (line 1417)
+* Blocks:                                Blocks.             (line    6)
+* bool:                                  Misc.               (line  844)
+* BOOL_TYPE_SIZE:                        Type Layout.        (line   44)
+* BOOLEAN_TYPE:                          Types.              (line    6)
+* branch prediction:                     Profile information.
+                                                             (line   24)
+* BRANCH_COST:                           Costs.              (line  105)
+* break_out_memory_refs:                 Addressing Modes.   (line  135)
+* BREAK_STMT:                            Statements for C++. (line    6)
+* bsi_commit_edge_inserts:               Maintaining the CFG.
+                                                             (line  118)
+* bsi_end_p:                             Maintaining the CFG.
+                                                             (line   60)
+* bsi_insert_after:                      Maintaining the CFG.
+                                                             (line   72)
+* bsi_insert_before:                     Maintaining the CFG.
+                                                             (line   78)
+* bsi_insert_on_edge:                    Maintaining the CFG.
+                                                             (line  118)
+* bsi_last:                              Maintaining the CFG.
+                                                             (line   56)
+* bsi_next:                              Maintaining the CFG.
+                                                             (line   64)
+* bsi_prev:                              Maintaining the CFG.
+                                                             (line   68)
+* bsi_remove:                            Maintaining the CFG.
+                                                             (line   84)
+* bsi_start:                             Maintaining the CFG.
+                                                             (line   52)
+* BSS_SECTION_ASM_OP:                    Sections.           (line   68)
+* bswap:                                 Arithmetic.         (line  241)
+* btruncM2 instruction pattern:          Standard Names.     (line  567)
+* build0:                                Macros and Functions.
+                                                             (line   16)
+* build1:                                Macros and Functions.
+                                                             (line   17)
+* build2:                                Macros and Functions.
+                                                             (line   18)
+* build3:                                Macros and Functions.
+                                                             (line   19)
+* build4:                                Macros and Functions.
+                                                             (line   20)
+* build5:                                Macros and Functions.
+                                                             (line   21)
+* build6:                                Macros and Functions.
+                                                             (line   22)
+* builtin_longjmp instruction pattern:   Standard Names.     (line 1320)
+* builtin_setjmp_receiver instruction pattern: Standard Names.
+                                                             (line 1310)
+* builtin_setjmp_setup instruction pattern: Standard Names.  (line 1299)
+* byte_mode:                             Machine Modes.      (line  336)
+* BYTES_BIG_ENDIAN:                      Storage Layout.     (line   24)
+* BYTES_BIG_ENDIAN, effect on subreg:    Regs and Memory.    (line  221)
+* C statements for assembler output:     Output Statement.   (line    6)
+* C99 math functions, implicit usage:    Library Calls.      (line   62)
+* C_COMMON_OVERRIDE_OPTIONS:             Run-time Target.    (line  142)
+* c_register_pragma:                     Misc.               (line  404)
+* c_register_pragma_with_expansion:      Misc.               (line  406)
+* call <1>:                              Side Effects.       (line   86)
+* call:                                  Flags.              (line  239)
+* call instruction pattern:              Standard Names.     (line  974)
+* call usage:                            Calls.              (line   10)
+* call, in call_insn:                    Flags.              (line   33)
+* call, in mem:                          Flags.              (line   99)
+* call-clobbered register:               Register Basics.    (line   35)
+* call-saved register:                   Register Basics.    (line   35)
+* call-used register:                    Register Basics.    (line   35)
+* CALL_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* call_insn:                             Insns.              (line   95)
+* call_insn and /c:                      Flags.              (line   33)
+* call_insn and /f:                      Flags.              (line  125)
+* call_insn and /i:                      Flags.              (line   24)
+* call_insn and /j:                      Flags.              (line  179)
+* call_insn and /s:                      Flags.              (line   49)
+* call_insn and /u:                      Flags.              (line   19)
+* call_insn and /u or /i:                Flags.              (line   29)
+* call_insn and /v:                      Flags.              (line   44)
+* CALL_INSN_FUNCTION_USAGE:              Insns.              (line  101)
+* call_pop instruction pattern:          Standard Names.     (line 1002)
+* CALL_POPS_ARGS:                        Stack Arguments.    (line  133)
+* CALL_REALLY_USED_REGISTERS:            Register Basics.    (line   46)
+* CALL_USED_REGISTERS:                   Register Basics.    (line   35)
+* call_used_regs:                        Register Basics.    (line   59)
+* call_value instruction pattern:        Standard Names.     (line  994)
+* call_value_pop instruction pattern:    Standard Names.     (line 1002)
+* CALLER_SAVE_PROFITABLE:                Caller Saves.       (line   11)
+* calling conventions:                   Stack and Calling.  (line    6)
+* calling functions in RTL:              Calls.              (line    6)
+* can_create_pseudo_p:                   Standard Names.     (line   75)
+* can_fallthru:                          Basic Blocks.       (line   57)
+* canadian:                              Configure Terms.    (line    6)
+* CANNOT_CHANGE_MODE_CLASS:              Register Classes.   (line  522)
+* CANNOT_CHANGE_MODE_CLASS and subreg semantics: Regs and Memory.
+                                                             (line  280)
+* canonicalization of instructions:      Insn Canonicalizations.
+                                                             (line    6)
+* CANONICALIZE_COMPARISON:               MODE_CC Condition Codes.
+                                                             (line   55)
+* canonicalize_funcptr_for_compare instruction pattern: Standard Names.
+                                                             (line 1158)
+* CASE_USE_BIT_TESTS:                    Misc.               (line   54)
+* CASE_VECTOR_MODE:                      Misc.               (line   27)
+* CASE_VECTOR_PC_RELATIVE:               Misc.               (line   40)
+* CASE_VECTOR_SHORTEN_MODE:              Misc.               (line   31)
+* casesi instruction pattern:            Standard Names.     (line 1082)
+* cbranchMODE4 instruction pattern:      Standard Names.     (line  963)
+* cc0 <1>:                               CC0 Condition Codes.
+                                                             (line    6)
+* cc0:                                   Regs and Memory.    (line  307)
+* cc0, RTL sharing:                      Sharing.            (line   27)
+* cc0_rtx:                               Regs and Memory.    (line  333)
+* CC1_SPEC:                              Driver.             (line   56)
+* CC1PLUS_SPEC:                          Driver.             (line   64)
+* cc_status:                             CC0 Condition Codes.
+                                                             (line    6)
+* CC_STATUS_MDEP:                        CC0 Condition Codes.
+                                                             (line   17)
+* CC_STATUS_MDEP_INIT:                   CC0 Condition Codes.
+                                                             (line   23)
+* CCmode <1>:                            MODE_CC Condition Codes.
+                                                             (line    6)
+* CCmode:                                Machine Modes.      (line  176)
+* CDImode:                               Machine Modes.      (line  202)
+* CEIL_DIV_EXPR:                         Unary and Binary Expressions.
+                                                             (line    6)
+* CEIL_MOD_EXPR:                         Unary and Binary Expressions.
+                                                             (line    6)
+* ceilM2 instruction pattern:            Standard Names.     (line  583)
+* CFA_FRAME_BASE_OFFSET:                 Frame Layout.       (line  226)
+* CFG, Control Flow Graph:               Control Flow.       (line    6)
+* cfghooks.h:                            Maintaining the CFG.
+                                                             (line    6)
+* cgraph_finalize_function:              Parsing pass.       (line   52)
+* chain_circular:                        GTY Options.        (line  191)
+* chain_next:                            GTY Options.        (line  191)
+* chain_prev:                            GTY Options.        (line  191)
+* change_address:                        Standard Names.     (line   47)
+* CHAR_TYPE_SIZE:                        Type Layout.        (line   39)
+* check_stack instruction pattern:       Standard Names.     (line 1245)
+* CHImode:                               Machine Modes.      (line  202)
+* class definitions, register:           Register Classes.   (line    6)
+* class preference constraints:          Class Preferences.  (line    6)
+* class, scope:                          Classes.            (line    6)
+* CLASS_MAX_NREGS:                       Register Classes.   (line  510)
+* CLASS_TYPE_P:                          Types for C++.      (line   65)
+* classes of RTX codes:                  RTL Classes.        (line    6)
+* CLASSTYPE_DECLARED_CLASS:              Classes.            (line    6)
+* CLASSTYPE_HAS_MUTABLE:                 Classes.            (line   85)
+* CLASSTYPE_NON_POD_P:                   Classes.            (line   90)
+* CLEANUP_DECL:                          Statements for C++. (line    6)
+* CLEANUP_EXPR:                          Statements for C++. (line    6)
+* CLEANUP_POINT_EXPR:                    Unary and Binary Expressions.
+                                                             (line    6)
+* CLEANUP_STMT:                          Statements for C++. (line    6)
+* Cleanups:                              Cleanups.           (line    6)
+* CLEAR_BY_PIECES_P:                     Costs.              (line  188)
+* clear_cache instruction pattern:       Standard Names.     (line 1561)
+* CLEAR_INSN_CACHE:                      Trampolines.        (line   99)
+* CLEAR_RATIO:                           Costs.              (line  176)
+* clobber:                               Side Effects.       (line  100)
+* clz:                                   Arithmetic.         (line  217)
+* CLZ_DEFINED_VALUE_AT_ZERO:             Misc.               (line  319)
+* clzM2 instruction pattern:             Standard Names.     (line  648)
+* cmpmemM instruction pattern:           Standard Names.     (line  781)
+* cmpstrM instruction pattern:           Standard Names.     (line  760)
+* cmpstrnM instruction pattern:          Standard Names.     (line  747)
+* code generation RTL sequences:         Expander Definitions.
+                                                             (line    6)
+* code iterators in .md files:           Code Iterators.     (line    6)
+* code_label:                            Insns.              (line  119)
+* code_label and /i:                     Flags.              (line   59)
+* code_label and /v:                     Flags.              (line   44)
+* CODE_LABEL_NUMBER:                     Insns.              (line  119)
+* codes, RTL expression:                 RTL Objects.        (line   47)
+* COImode:                               Machine Modes.      (line  202)
+* COLLECT2_HOST_INITIALIZATION:          Host Misc.          (line   32)
+* COLLECT_EXPORT_LIST:                   Misc.               (line  743)
+* COLLECT_SHARED_FINI_FUNC:              Macros for Initialization.
+                                                             (line   44)
+* COLLECT_SHARED_INIT_FUNC:              Macros for Initialization.
+                                                             (line   33)
+* commit_edge_insertions:                Maintaining the CFG.
+                                                             (line  118)
+* compare:                               Arithmetic.         (line   43)
+* compare, canonicalization of:          Insn Canonicalizations.
+                                                             (line   37)
+* comparison_operator:                   Machine-Independent Predicates.
+                                                             (line  111)
+* compiler passes and files:             Passes.             (line    6)
+* complement, bitwise:                   Arithmetic.         (line  154)
+* COMPLEX_CST:                           Constant expressions.
+                                                             (line    6)
+* COMPLEX_EXPR:                          Unary and Binary Expressions.
+                                                             (line    6)
+* COMPLEX_TYPE:                          Types.              (line    6)
+* COMPONENT_REF:                         Storage References. (line    6)
+* Compound Expressions:                  Compound Expressions.
+                                                             (line    6)
+* Compound Lvalues:                      Compound Lvalues.   (line    6)
+* COMPOUND_EXPR:                         Unary and Binary Expressions.
+                                                             (line    6)
+* COMPOUND_LITERAL_EXPR:                 Unary and Binary Expressions.
+                                                             (line    6)
+* COMPOUND_LITERAL_EXPR_DECL:            Unary and Binary Expressions.
+                                                             (line  367)
+* COMPOUND_LITERAL_EXPR_DECL_EXPR:       Unary and Binary Expressions.
+                                                             (line  367)
+* computed jump:                         Edges.              (line  128)
+* computing the length of an insn:       Insn Lengths.       (line    6)
+* concat:                                Regs and Memory.    (line  385)
+* concatn:                               Regs and Memory.    (line  391)
+* cond:                                  Comparisons.        (line   90)
+* cond and attributes:                   Expressions.        (line   37)
+* cond_exec:                             Side Effects.       (line  248)
+* COND_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* condition code register:               Regs and Memory.    (line  307)
+* condition code status:                 Condition Code.     (line    6)
+* condition codes:                       Comparisons.        (line   20)
+* conditional execution <1>:             Cond Exec Macros.   (line    6)
+* conditional execution:                 Conditional Execution.
+                                                             (line    6)
+* Conditional Expressions:               Conditional Expressions.
+                                                             (line    6)
+* conditions, in patterns:               Patterns.           (line   43)
+* configuration file <1>:                Host Misc.          (line    6)
+* configuration file:                    Filesystem.         (line    6)
+* configure terms:                       Configure Terms.    (line    6)
+* CONJ_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* const:                                 Constants.          (line   99)
+* CONST0_RTX:                            Constants.          (line  119)
+* const0_rtx:                            Constants.          (line   16)
+* CONST1_RTX:                            Constants.          (line  119)
+* const1_rtx:                            Constants.          (line   16)
+* CONST2_RTX:                            Constants.          (line  119)
+* const2_rtx:                            Constants.          (line   16)
+* CONST_DECL:                            Declarations.       (line    6)
+* const_double:                          Constants.          (line   32)
+* const_double, RTL sharing:             Sharing.            (line   29)
+* CONST_DOUBLE_LOW:                      Constants.          (line   39)
+* CONST_DOUBLE_OK_FOR_CONSTRAINT_P:      Old Constraints.    (line   69)
+* CONST_DOUBLE_OK_FOR_LETTER_P:          Old Constraints.    (line   54)
+* const_double_operand:                  Machine-Independent Predicates.
+                                                             (line   21)
+* const_fixed:                           Constants.          (line   52)
+* const_int:                             Constants.          (line    8)
+* const_int and attribute tests:         Expressions.        (line   47)
+* const_int and attributes:              Expressions.        (line   10)
+* const_int, RTL sharing:                Sharing.            (line   23)
+* const_int_operand:                     Machine-Independent Predicates.
+                                                             (line   16)
+* CONST_OK_FOR_CONSTRAINT_P:             Old Constraints.    (line   49)
+* CONST_OK_FOR_LETTER_P:                 Old Constraints.    (line   40)
+* const_string:                          Constants.          (line   71)
+* const_string and attributes:           Expressions.        (line   20)
+* const_true_rtx:                        Constants.          (line   26)
+* const_vector:                          Constants.          (line   59)
+* const_vector, RTL sharing:             Sharing.            (line   32)
+* constant attributes:                   Constant Attributes.
+                                                             (line    6)
+* constant definitions:                  Constant Definitions.
+                                                             (line    6)
+* CONSTANT_ADDRESS_P:                    Addressing Modes.   (line   29)
+* CONSTANT_ALIGNMENT:                    Storage Layout.     (line  229)
+* CONSTANT_P:                            Addressing Modes.   (line   36)
+* CONSTANT_POOL_ADDRESS_P:               Flags.              (line   10)
+* CONSTANT_POOL_BEFORE_FUNCTION:         Data Output.        (line   76)
+* constants in constraints:              Simple Constraints. (line   70)
+* constm1_rtx:                           Constants.          (line   16)
+* constraint modifier characters:        Modifiers.          (line    6)
+* constraint, matching:                  Simple Constraints. (line  142)
+* CONSTRAINT_LEN:                        Old Constraints.    (line   12)
+* constraint_num:                        C Constraint Interface.
+                                                             (line   38)
+* constraint_satisfied_p:                C Constraint Interface.
+                                                             (line   54)
+* constraints:                           Constraints.        (line    6)
+* constraints, defining:                 Define Constraints. (line    6)
+* constraints, defining, obsolete method: Old Constraints.   (line    6)
+* constraints, machine specific:         Machine Constraints.
+                                                             (line    6)
+* constraints, testing:                  C Constraint Interface.
+                                                             (line    6)
+* CONSTRUCTOR:                           Unary and Binary Expressions.
+                                                             (line    6)
+* constructors, automatic calls:         Collect2.           (line   15)
+* constructors, output of:               Initialization.     (line    6)
+* container:                             Containers.         (line    6)
+* CONTINUE_STMT:                         Statements for C++. (line    6)
+* contributors:                          Contributors.       (line    6)
+* controlling register usage:            Register Basics.    (line   73)
+* controlling the compilation driver:    Driver.             (line    6)
+* conventions, run-time:                 Interface.          (line    6)
+* conversions:                           Conversions.        (line    6)
+* CONVERT_EXPR:                          Unary and Binary Expressions.
+                                                             (line    6)
+* copy_rtx:                              Addressing Modes.   (line  188)
+* copy_rtx_if_shared:                    Sharing.            (line   64)
+* copysignM3 instruction pattern:        Standard Names.     (line  629)
+* cosM2 instruction pattern:             Standard Names.     (line  508)
+* costs of instructions:                 Costs.              (line    6)
+* CP_INTEGRAL_TYPE:                      Types for C++.      (line   57)
+* cp_namespace_decls:                    Namespaces.         (line   49)
+* CP_TYPE_CONST_NON_VOLATILE_P:          Types for C++.      (line   33)
+* CP_TYPE_CONST_P:                       Types for C++.      (line   24)
+* CP_TYPE_QUALS:                         Types for C++.      (line    6)
+* CP_TYPE_RESTRICT_P:                    Types for C++.      (line   30)
+* CP_TYPE_VOLATILE_P:                    Types for C++.      (line   27)
+* CPLUSPLUS_CPP_SPEC:                    Driver.             (line   51)
+* CPP_SPEC:                              Driver.             (line   44)
+* CQImode:                               Machine Modes.      (line  202)
+* cross compilation and floating point:  Floating Point.     (line    6)
+* CRT_CALL_STATIC_FUNCTION:              Sections.           (line  122)
+* CRTSTUFF_T_CFLAGS:                     Target Fragment.    (line   35)
+* CRTSTUFF_T_CFLAGS_S:                   Target Fragment.    (line   39)
+* CSImode:                               Machine Modes.      (line  202)
+* cstoreMODE4 instruction pattern:       Standard Names.     (line  924)
+* CTImode:                               Machine Modes.      (line  202)
+* ctrapMM4 instruction pattern:          Standard Names.     (line 1386)
+* ctz:                                   Arithmetic.         (line  225)
+* CTZ_DEFINED_VALUE_AT_ZERO:             Misc.               (line  320)
+* ctzM2 instruction pattern:             Standard Names.     (line  657)
+* CUMULATIVE_ARGS:                       Register Arguments. (line  127)
+* current_function_epilogue_delay_list:  Function Entry.     (line  181)
+* current_function_is_leaf:              Leaf Functions.     (line   51)
+* current_function_outgoing_args_size:   Stack Arguments.    (line   48)
+* current_function_pops_args:            Function Entry.     (line  106)
+* current_function_pretend_args_size:    Function Entry.     (line  112)
+* current_function_uses_only_leaf_regs:  Leaf Functions.     (line   51)
+* current_insn_predicate:                Conditional Execution.
+                                                             (line   26)
+* DAmode:                                Machine Modes.      (line  152)
+* data bypass:                           Processor pipeline description.
+                                                             (line  106)
+* data dependence delays:                Processor pipeline description.
+                                                             (line    6)
+* Data Dependency Analysis:              Dependency analysis.
+                                                             (line    6)
+* data structures:                       Per-Function Data.  (line    6)
+* DATA_ALIGNMENT:                        Storage Layout.     (line  216)
+* DATA_SECTION_ASM_OP:                   Sections.           (line   53)
+* DBR_OUTPUT_SEQEND:                     Instruction Output. (line  135)
+* dbr_sequence_length:                   Instruction Output. (line  134)
+* DBX_BLOCKS_FUNCTION_RELATIVE:          DBX Options.        (line  103)
+* DBX_CONTIN_CHAR:                       DBX Options.        (line   66)
+* DBX_CONTIN_LENGTH:                     DBX Options.        (line   56)
+* DBX_DEBUGGING_INFO:                    DBX Options.        (line    9)
+* DBX_FUNCTION_FIRST:                    DBX Options.        (line   97)
+* DBX_LINES_FUNCTION_RELATIVE:           DBX Options.        (line  109)
+* DBX_NO_XREFS:                          DBX Options.        (line   50)
+* DBX_OUTPUT_LBRAC:                      DBX Hooks.          (line    9)
+* DBX_OUTPUT_MAIN_SOURCE_FILE_END:       File Names and DBX. (line   34)
+* DBX_OUTPUT_MAIN_SOURCE_FILENAME:       File Names and DBX. (line    9)
+* DBX_OUTPUT_NFUN:                       DBX Hooks.          (line   18)
+* DBX_OUTPUT_NULL_N_SO_AT_MAIN_SOURCE_FILE_END: File Names and DBX.
+                                                             (line   42)
+* DBX_OUTPUT_RBRAC:                      DBX Hooks.          (line   15)
+* DBX_OUTPUT_SOURCE_LINE:                DBX Hooks.          (line   22)
+* DBX_REGISTER_NUMBER:                   All Debuggers.      (line    9)
+* DBX_REGPARM_STABS_CODE:                DBX Options.        (line   87)
+* DBX_REGPARM_STABS_LETTER:              DBX Options.        (line   92)
+* DBX_STATIC_CONST_VAR_CODE:             DBX Options.        (line   82)
+* DBX_STATIC_STAB_DATA_SECTION:          DBX Options.        (line   73)
+* DBX_TYPE_DECL_STABS_CODE:              DBX Options.        (line   78)
+* DBX_USE_BINCL:                         DBX Options.        (line  115)
+* DCmode:                                Machine Modes.      (line  197)
+* DDmode:                                Machine Modes.      (line   90)
+* De Morgan's law:                       Insn Canonicalizations.
+                                                             (line   52)
+* dead_or_set_p:                         define_peephole.    (line   65)
+* debug_expr:                            Debug Information.  (line   22)
+* DEBUG_EXPR_DECL:                       Declarations.       (line    6)
+* debug_insn:                            Insns.              (line  239)
+* DEBUG_SYMS_TEXT:                       DBX Options.        (line   25)
+* DEBUGGER_ARG_OFFSET:                   All Debuggers.      (line   37)
+* DEBUGGER_AUTO_OFFSET:                  All Debuggers.      (line   28)
+* decimal float library:                 Decimal float library routines.
+                                                             (line    6)
+* DECL_ALIGN:                            Declarations.       (line    6)
+* DECL_ANTICIPATED:                      Functions for C++.  (line   42)
+* DECL_ARGUMENTS:                        Function Basics.    (line   36)
+* DECL_ARRAY_DELETE_OPERATOR_P:          Functions for C++.  (line  158)
+* DECL_ARTIFICIAL <1>:                   Function Properties.
+                                                             (line   47)
+* DECL_ARTIFICIAL <2>:                   Function Basics.    (line    6)
+* DECL_ARTIFICIAL:                       Working with declarations.
+                                                             (line   24)
+* DECL_ASSEMBLER_NAME:                   Function Basics.    (line    6)
+* DECL_ATTRIBUTES:                       Attributes.         (line   22)
+* DECL_BASE_CONSTRUCTOR_P:               Functions for C++.  (line   88)
+* DECL_COMPLETE_CONSTRUCTOR_P:           Functions for C++.  (line   84)
+* DECL_COMPLETE_DESTRUCTOR_P:            Functions for C++.  (line   98)
+* DECL_CONST_MEMFUNC_P:                  Functions for C++.  (line   71)
+* DECL_CONSTRUCTOR_P:                    Functions for C++.  (line   77)
+* DECL_CONTEXT:                          Namespaces.         (line   31)
+* DECL_CONV_FN_P:                        Functions for C++.  (line  105)
+* DECL_COPY_CONSTRUCTOR_P:               Functions for C++.  (line   92)
+* DECL_DESTRUCTOR_P:                     Functions for C++.  (line   95)
+* DECL_EXTERN_C_FUNCTION_P:              Functions for C++.  (line   46)
+* DECL_EXTERNAL <1>:                     Function Properties.
+                                                             (line   25)
+* DECL_EXTERNAL:                         Declarations.       (line    6)
+* DECL_FUNCTION_MEMBER_P:                Functions for C++.  (line   61)
+* DECL_FUNCTION_SPECIFIC_OPTIMIZATION <1>: Function Properties.
+                                                             (line   61)
+* DECL_FUNCTION_SPECIFIC_OPTIMIZATION:   Function Basics.    (line    6)
+* DECL_FUNCTION_SPECIFIC_TARGET <1>:     Function Properties.
+                                                             (line   55)
+* DECL_FUNCTION_SPECIFIC_TARGET:         Function Basics.    (line    6)
+* DECL_GLOBAL_CTOR_P:                    Functions for C++.  (line  108)
+* DECL_GLOBAL_DTOR_P:                    Functions for C++.  (line  112)
+* DECL_INITIAL <1>:                      Function Basics.    (line   51)
+* DECL_INITIAL:                          Declarations.       (line    6)
+* DECL_LINKONCE_P:                       Functions for C++.  (line   50)
+* DECL_LOCAL_FUNCTION_P:                 Functions for C++.  (line   38)
+* DECL_MAIN_P:                           Functions for C++.  (line   34)
+* DECL_NAME <1>:                         Namespaces.         (line   20)
+* DECL_NAME <2>:                         Function Basics.    (line    6)
+* DECL_NAME:                             Working with declarations.
+                                                             (line    7)
+* DECL_NAMESPACE_ALIAS:                  Namespaces.         (line   35)
+* DECL_NAMESPACE_STD_P:                  Namespaces.         (line   45)
+* DECL_NON_THUNK_FUNCTION_P:             Functions for C++.  (line  138)
+* DECL_NONCONVERTING_P:                  Functions for C++.  (line   80)
+* DECL_NONSTATIC_MEMBER_FUNCTION_P:      Functions for C++.  (line   68)
+* DECL_OVERLOADED_OPERATOR_P:            Functions for C++.  (line  102)
+* DECL_PURE_P:                           Function Properties.
+                                                             (line   40)
+* DECL_RESULT:                           Function Basics.    (line   41)
+* DECL_SAVED_TREE:                       Function Basics.    (line   44)
+* DECL_SIZE:                             Declarations.       (line    6)
+* DECL_STATIC_FUNCTION_P:                Functions for C++.  (line   65)
+* DECL_STMT:                             Statements for C++. (line    6)
+* DECL_STMT_DECL:                        Statements for C++. (line    6)
+* DECL_THUNK_P:                          Functions for C++.  (line  116)
+* DECL_VIRTUAL_P:                        Function Properties.
+                                                             (line   44)
+* DECL_VOLATILE_MEMFUNC_P:               Functions for C++.  (line   74)
+* declaration:                           Declarations.       (line    6)
+* declarations, RTL:                     RTL Declarations.   (line    6)
+* DECLARE_LIBRARY_RENAMES:               Library Calls.      (line    9)
+* decrement_and_branch_until_zero instruction pattern: Standard Names.
+                                                             (line 1120)
+* default:                               GTY Options.        (line   77)
+* default_file_start:                    File Framework.     (line    8)
+* DEFAULT_GDB_EXTENSIONS:                DBX Options.        (line   18)
+* DEFAULT_PCC_STRUCT_RETURN:             Aggregate Return.   (line   35)
+* DEFAULT_SIGNED_CHAR:                   Type Layout.        (line  153)
+* define_address_constraint:             Define Constraints. (line  107)
+* define_asm_attributes:                 Tagging Insns.      (line   73)
+* define_attr:                           Defining Attributes.
+                                                             (line    6)
+* define_automaton:                      Processor pipeline description.
+                                                             (line   53)
+* define_bypass:                         Processor pipeline description.
+                                                             (line  197)
+* define_c_enum:                         Constant Definitions.
+                                                             (line   49)
+* define_code_attr:                      Code Iterators.     (line    6)
+* define_code_iterator:                  Code Iterators.     (line    6)
+* define_cond_exec:                      Conditional Execution.
+                                                             (line   13)
+* define_constants:                      Constant Definitions.
+                                                             (line    6)
+* define_constraint:                     Define Constraints. (line   48)
+* define_cpu_unit:                       Processor pipeline description.
+                                                             (line   68)
+* define_delay:                          Delay Slots.        (line   25)
+* define_enum:                           Constant Definitions.
+                                                             (line  118)
+* define_enum_attr <1>:                  Constant Definitions.
+                                                             (line  136)
+* define_enum_attr:                      Defining Attributes.
+                                                             (line   64)
+* define_expand:                         Expander Definitions.
+                                                             (line   11)
+* define_insn:                           Patterns.           (line    6)
+* define_insn example:                   Example.            (line    6)
+* define_insn_and_split:                 Insn Splitting.     (line  170)
+* define_insn_reservation:               Processor pipeline description.
+                                                             (line  106)
+* define_memory_constraint:              Define Constraints. (line   88)
+* define_mode_attr:                      Substitutions.      (line    6)
+* define_mode_iterator:                  Defining Mode Iterators.
+                                                             (line    6)
+* define_peephole:                       define_peephole.    (line    6)
+* define_peephole2:                      define_peephole2.   (line    6)
+* define_predicate:                      Defining Predicates.
+                                                             (line    6)
+* define_query_cpu_unit:                 Processor pipeline description.
+                                                             (line   90)
+* define_register_constraint:            Define Constraints. (line   28)
+* define_reservation:                    Processor pipeline description.
+                                                             (line  186)
+* define_special_predicate:              Defining Predicates.
+                                                             (line    6)
+* define_split:                          Insn Splitting.     (line   32)
+* defining attributes and their values:  Defining Attributes.
+                                                             (line    6)
+* defining constraints:                  Define Constraints. (line    6)
+* defining constraints, obsolete method: Old Constraints.    (line    6)
+* defining jump instruction patterns:    Jump Patterns.      (line    6)
+* defining looping instruction patterns: Looping Patterns.   (line    6)
+* defining peephole optimizers:          Peephole Definitions.
+                                                             (line    6)
+* defining predicates:                   Defining Predicates.
+                                                             (line    6)
+* defining RTL sequences for code generation: Expander Definitions.
+                                                             (line    6)
+* delay slots, defining:                 Delay Slots.        (line    6)
+* DELAY_SLOTS_FOR_EPILOGUE:              Function Entry.     (line  163)
+* deletable:                             GTY Options.        (line  145)
+* DELETE_IF_ORDINARY:                    Filesystem.         (line   79)
+* Dependent Patterns:                    Dependent Patterns. (line    6)
+* desc:                                  GTY Options.        (line   77)
+* destructors, output of:                Initialization.     (line    6)
+* deterministic finite state automaton:  Processor pipeline description.
+                                                             (line    6)
+* DF_SIZE:                               Type Layout.        (line  129)
+* DFmode:                                Machine Modes.      (line   73)
+* digits in constraint:                  Simple Constraints. (line  130)
+* DImode:                                Machine Modes.      (line   45)
+* DIR_SEPARATOR:                         Filesystem.         (line   18)
+* DIR_SEPARATOR_2:                       Filesystem.         (line   19)
+* directory options .md:                 Including Patterns. (line   44)
+* disabling certain registers:           Register Basics.    (line   73)
+* dispatch table:                        Dispatch Tables.    (line    8)
+* div:                                   Arithmetic.         (line  116)
+* div and attributes:                    Expressions.        (line   64)
+* division:                              Arithmetic.         (line  116)
+* divM3 instruction pattern:             Standard Names.     (line  222)
+* divmodM4 instruction pattern:          Standard Names.     (line  438)
+* DO_BODY:                               Statements for C++. (line    6)
+* DO_COND:                               Statements for C++. (line    6)
+* DO_STMT:                               Statements for C++. (line    6)
+* DOLLARS_IN_IDENTIFIERS:                Misc.               (line  451)
+* doloop_begin instruction pattern:      Standard Names.     (line 1151)
+* doloop_end instruction pattern:        Standard Names.     (line 1130)
+* DONE:                                  Expander Definitions.
+                                                             (line   74)
+* DONT_USE_BUILTIN_SETJMP:               Exception Region Output.
+                                                             (line   79)
+* DOUBLE_TYPE_SIZE:                      Type Layout.        (line   53)
+* DQmode:                                Machine Modes.      (line  115)
+* driver:                                Driver.             (line    6)
+* DRIVER_SELF_SPECS:                     Driver.             (line    9)
+* DUMPFILE_FORMAT:                       Filesystem.         (line   67)
+* DWARF2_ASM_LINE_DEBUG_INFO:            SDB and DWARF.      (line   50)
+* DWARF2_DEBUGGING_INFO:                 SDB and DWARF.      (line   13)
+* DWARF2_FRAME_INFO:                     SDB and DWARF.      (line   30)
+* DWARF2_FRAME_REG_OUT:                  Frame Registers.    (line  150)
+* DWARF2_UNWIND_INFO:                    Exception Region Output.
+                                                             (line   40)
+* DWARF_ALT_FRAME_RETURN_COLUMN:         Frame Layout.       (line  152)
+* DWARF_CIE_DATA_ALIGNMENT:              Exception Region Output.
+                                                             (line   84)
+* DWARF_FRAME_REGISTERS:                 Frame Registers.    (line  110)
+* DWARF_FRAME_REGNUM:                    Frame Registers.    (line  142)
+* DWARF_REG_TO_UNWIND_COLUMN:            Frame Registers.    (line  134)
+* DWARF_ZERO_REG:                        Frame Layout.       (line  163)
+* DYNAMIC_CHAIN_ADDRESS:                 Frame Layout.       (line   92)
+* E in constraint:                       Simple Constraints. (line   89)
+* earlyclobber operand:                  Modifiers.          (line   25)
+* edge:                                  Edges.              (line    6)
+* edge in the flow graph:                Edges.              (line    6)
+* edge iterators:                        Edges.              (line   15)
+* edge splitting:                        Maintaining the CFG.
+                                                             (line  118)
+* EDGE_ABNORMAL:                         Edges.              (line  128)
+* EDGE_ABNORMAL, EDGE_ABNORMAL_CALL:     Edges.              (line  171)
+* EDGE_ABNORMAL, EDGE_EH:                Edges.              (line   96)
+* EDGE_ABNORMAL, EDGE_SIBCALL:           Edges.              (line  122)
+* EDGE_FALLTHRU, force_nonfallthru:      Edges.              (line   86)
+* EDOM, implicit usage:                  Library Calls.      (line   44)
+* EH_FRAME_IN_DATA_SECTION:              Exception Region Output.
+                                                             (line   20)
+* EH_FRAME_SECTION_NAME:                 Exception Region Output.
+                                                             (line   10)
+* eh_return instruction pattern:         Standard Names.     (line 1326)
+* EH_RETURN_DATA_REGNO:                  Exception Handling. (line    7)
+* EH_RETURN_HANDLER_RTX:                 Exception Handling. (line   39)
+* EH_RETURN_STACKADJ_RTX:                Exception Handling. (line   22)
+* EH_TABLES_CAN_BE_READ_ONLY:            Exception Region Output.
+                                                             (line   29)
+* EH_USES:                               Function Entry.     (line  158)
+* ei_edge:                               Edges.              (line   43)
+* ei_end_p:                              Edges.              (line   27)
+* ei_last:                               Edges.              (line   23)
+* ei_next:                               Edges.              (line   35)
+* ei_one_before_end_p:                   Edges.              (line   31)
+* ei_prev:                               Edges.              (line   39)
+* ei_safe_safe:                          Edges.              (line   47)
+* ei_start:                              Edges.              (line   19)
+* ELIGIBLE_FOR_EPILOGUE_DELAY:           Function Entry.     (line  169)
+* ELIMINABLE_REGS:                       Elimination.        (line   47)
+* ELSE_CLAUSE:                           Statements for C++. (line    6)
+* Embedded C:                            Fixed-point fractional library routines.
+                                                             (line    6)
+* EMIT_MODE_SET:                         Mode Switching.     (line   74)
+* Empty Statements:                      Empty Statements.   (line    6)
+* EMPTY_CLASS_EXPR:                      Statements for C++. (line    6)
+* EMPTY_FIELD_BOUNDARY:                  Storage Layout.     (line  299)
+* Emulated TLS:                          Emulated TLS.       (line    6)
+* ENABLE_EXECUTE_STACK:                  Trampolines.        (line  109)
+* enabled:                               Disable Insn Alternatives.
+                                                             (line    6)
+* ENDFILE_SPEC:                          Driver.             (line  156)
+* endianness:                            Portability.        (line   21)
+* ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR:       Basic Blocks.       (line   28)
+* enum machine_mode:                     Machine Modes.      (line    6)
+* enum reg_class:                        Register Classes.   (line   67)
+* ENUMERAL_TYPE:                         Types.              (line    6)
+* enumerations:                          Constant Definitions.
+                                                             (line   49)
+* epilogue:                              Function Entry.     (line    6)
+* epilogue instruction pattern:          Standard Names.     (line 1358)
+* EPILOGUE_USES:                         Function Entry.     (line  152)
+* eq:                                    Comparisons.        (line   52)
+* eq and attributes:                     Expressions.        (line   64)
+* eq_attr:                               Expressions.        (line   85)
+* EQ_EXPR:                               Unary and Binary Expressions.
+                                                             (line    6)
+* equal:                                 Comparisons.        (line   52)
+* errno, implicit usage:                 Library Calls.      (line   56)
+* EXACT_DIV_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* examining SSA_NAMEs:                   SSA.                (line  218)
+* exception handling <1>:                Exception Handling. (line    6)
+* exception handling:                    Edges.              (line   96)
+* exception_receiver instruction pattern: Standard Names.    (line 1290)
+* exclamation point:                     Multi-Alternative.  (line   47)
+* exclusion_set:                         Processor pipeline description.
+                                                             (line  220)
+* exclusive-or, bitwise:                 Arithmetic.         (line  168)
+* EXIT_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* EXIT_IGNORE_STACK:                     Function Entry.     (line  140)
+* expander definitions:                  Expander Definitions.
+                                                             (line    6)
+* expM2 instruction pattern:             Standard Names.     (line  524)
+* EXPR_FILENAME:                         Working with declarations.
+                                                             (line   14)
+* EXPR_LINENO:                           Working with declarations.
+                                                             (line   20)
+* expr_list:                             Insns.              (line  545)
+* EXPR_STMT:                             Statements for C++. (line    6)
+* EXPR_STMT_EXPR:                        Statements for C++. (line    6)
+* expression:                            Expression trees.   (line    6)
+* expression codes:                      RTL Objects.        (line   47)
+* extendMN2 instruction pattern:         Standard Names.     (line  839)
+* extensible constraints:                Simple Constraints. (line  173)
+* EXTRA_ADDRESS_CONSTRAINT:              Old Constraints.    (line  123)
+* EXTRA_CONSTRAINT:                      Old Constraints.    (line   74)
+* EXTRA_CONSTRAINT_STR:                  Old Constraints.    (line   95)
+* EXTRA_MEMORY_CONSTRAINT:               Old Constraints.    (line  100)
+* EXTRA_SPECS:                           Driver.             (line  183)
+* extv instruction pattern:              Standard Names.     (line  875)
+* extzv instruction pattern:             Standard Names.     (line  890)
+* F in constraint:                       Simple Constraints. (line   94)
+* FAIL:                                  Expander Definitions.
+                                                             (line   80)
+* fall-thru:                             Edges.              (line   69)
+* FATAL_EXIT_CODE:                       Host Misc.          (line    6)
+* FDL, GNU Free Documentation License:   GNU Free Documentation License.
+                                                             (line    6)
+* features, optional, in system conventions: Run-time Target.
+                                                             (line   59)
+* ffs:                                   Arithmetic.         (line  211)
+* ffsM2 instruction pattern:             Standard Names.     (line  638)
+* FIELD_DECL:                            Declarations.       (line    6)
+* file_end_indicate_exec_stack:          File Framework.     (line   41)
+* files and passes of the compiler:      Passes.             (line    6)
+* files, generated:                      Files.              (line    6)
+* final_absence_set:                     Processor pipeline description.
+                                                             (line  220)
+* FINAL_PRESCAN_INSN:                    Instruction Output. (line   61)
+* final_presence_set:                    Processor pipeline description.
+                                                             (line  220)
+* final_scan_insn:                       Function Entry.     (line  181)
+* final_sequence:                        Instruction Output. (line  145)
+* FIND_BASE_TERM:                        Addressing Modes.   (line  119)
+* FINI_ARRAY_SECTION_ASM_OP:             Sections.           (line  115)
+* FINI_SECTION_ASM_OP:                   Sections.           (line  100)
+* finite state automaton minimization:   Processor pipeline description.
+                                                             (line  301)
+* FIRST_PARM_OFFSET:                     Frame Layout.       (line   67)
+* FIRST_PARM_OFFSET and virtual registers: Regs and Memory.  (line   65)
+* FIRST_PSEUDO_REGISTER:                 Register Basics.    (line    9)
+* FIRST_STACK_REG:                       Stack Registers.    (line   27)
+* FIRST_VIRTUAL_REGISTER:                Regs and Memory.    (line   51)
+* fix:                                   Conversions.        (line   66)
+* FIX_TRUNC_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* fix_truncMN2 instruction pattern:      Standard Names.     (line  826)
+* fixed register:                        Register Basics.    (line   15)
+* fixed-point fractional library:        Fixed-point fractional library routines.
+                                                             (line    6)
+* FIXED_CONVERT_EXPR:                    Unary and Binary Expressions.
+                                                             (line    6)
+* FIXED_CST:                             Constant expressions.
+                                                             (line    6)
+* FIXED_POINT_TYPE:                      Types.              (line    6)
+* FIXED_REGISTERS:                       Register Basics.    (line   15)
+* fixed_regs:                            Register Basics.    (line   59)
+* fixMN2 instruction pattern:            Standard Names.     (line  806)
+* FIXUNS_TRUNC_LIKE_FIX_TRUNC:           Misc.               (line  100)
+* fixuns_truncMN2 instruction pattern:   Standard Names.     (line  830)
+* fixunsMN2 instruction pattern:         Standard Names.     (line  815)
+* flags in RTL expression:               Flags.              (line    6)
+* float:                                 Conversions.        (line   58)
+* FLOAT_EXPR:                            Unary and Binary Expressions.
+                                                             (line    6)
+* float_extend:                          Conversions.        (line   33)
+* FLOAT_LIB_COMPARE_RETURNS_BOOL:        Library Calls.      (line   25)
+* FLOAT_STORE_FLAG_VALUE:                Misc.               (line  301)
+* float_truncate:                        Conversions.        (line   53)
+* FLOAT_TYPE_SIZE:                       Type Layout.        (line   49)
+* FLOAT_WORDS_BIG_ENDIAN:                Storage Layout.     (line   36)
+* FLOAT_WORDS_BIG_ENDIAN, (lack of) effect on subreg: Regs and Memory.
+                                                             (line  226)
+* floating point and cross compilation:  Floating Point.     (line    6)
+* Floating Point Emulation:              Target Fragment.    (line   15)
+* floatMN2 instruction pattern:          Standard Names.     (line  798)
+* floatunsMN2 instruction pattern:       Standard Names.     (line  802)
+* FLOOR_DIV_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* FLOOR_MOD_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* floorM2 instruction pattern:           Standard Names.     (line  559)
+* flow-insensitive alias analysis:       Alias analysis.     (line    6)
+* flow-sensitive alias analysis:         Alias analysis.     (line    6)
+* fma:                                   Arithmetic.         (line  111)
+* fmaM4 instruction pattern:             Standard Names.     (line  234)
+* fmodM3 instruction pattern:            Standard Names.     (line  490)
+* fmsM4 instruction pattern:             Standard Names.     (line  243)
+* fnmaM4 instruction pattern:            Standard Names.     (line  249)
+* fnmsM4 instruction pattern:            Standard Names.     (line  255)
+* FOR_BODY:                              Statements for C++. (line    6)
+* FOR_COND:                              Statements for C++. (line    6)
+* FOR_EXPR:                              Statements for C++. (line    6)
+* FOR_INIT_STMT:                         Statements for C++. (line    6)
+* FOR_STMT:                              Statements for C++. (line    6)
+* FORCE_CODE_SECTION_ALIGN:              Sections.           (line  146)
+* force_reg:                             Standard Names.     (line   36)
+* fract_convert:                         Conversions.        (line   82)
+* FRACT_TYPE_SIZE:                       Type Layout.        (line   68)
+* fractional types:                      Fixed-point fractional library routines.
+                                                             (line    6)
+* fractMN2 instruction pattern:          Standard Names.     (line  848)
+* fractunsMN2 instruction pattern:       Standard Names.     (line  863)
+* frame layout:                          Frame Layout.       (line    6)
+* FRAME_ADDR_RTX:                        Frame Layout.       (line  116)
+* FRAME_GROWS_DOWNWARD:                  Frame Layout.       (line   31)
+* FRAME_GROWS_DOWNWARD and virtual registers: Regs and Memory.
+                                                             (line   69)
+* FRAME_POINTER_CFA_OFFSET:              Frame Layout.       (line  212)
+* frame_pointer_needed:                  Function Entry.     (line   34)
+* FRAME_POINTER_REGNUM:                  Frame Registers.    (line   14)
+* FRAME_POINTER_REGNUM and virtual registers: Regs and Memory.
+                                                             (line   74)
+* frame_pointer_rtx:                     Frame Registers.    (line  104)
+* frame_related:                         Flags.              (line  247)
+* frame_related, in insn, call_insn, jump_insn, barrier, and set: Flags.
+                                                             (line  125)
+* frame_related, in mem:                 Flags.              (line  103)
+* frame_related, in reg:                 Flags.              (line  112)
+* frame_related, in symbol_ref:          Flags.              (line  183)
+* frequency, count, BB_FREQ_BASE:        Profile information.
+                                                             (line   30)
+* ftruncM2 instruction pattern:          Standard Names.     (line  821)
+* function <1>:                          Functions for C++.  (line    6)
+* function:                              Functions.          (line    6)
+* function call conventions:             Interface.          (line    6)
+* function entry and exit:               Function Entry.     (line    6)
+* function entry point, alternate function entry point: Edges.
+                                                             (line  180)
+* function properties:                   Function Properties.
+                                                             (line    6)
+* function-call insns:                   Calls.              (line    6)
+* FUNCTION_ARG:                          Register Arguments. (line   11)
+* FUNCTION_ARG_ADVANCE:                  Register Arguments. (line  185)
+* FUNCTION_ARG_OFFSET:                   Register Arguments. (line  196)
+* FUNCTION_ARG_PADDING:                  Register Arguments. (line  203)
+* FUNCTION_ARG_REGNO_P:                  Register Arguments. (line  244)
+* FUNCTION_BOUNDARY:                     Storage Layout.     (line  158)
+* FUNCTION_DECL <1>:                     Functions for C++.  (line    6)
+* FUNCTION_DECL:                         Functions.          (line    6)
+* FUNCTION_INCOMING_ARG:                 Register Arguments. (line   68)
+* FUNCTION_MODE:                         Misc.               (line  356)
+* FUNCTION_PROFILER:                     Profiling.          (line    9)
+* FUNCTION_TYPE:                         Types.              (line    6)
+* FUNCTION_VALUE:                        Scalar Return.      (line   52)
+* FUNCTION_VALUE_REGNO_P:                Scalar Return.      (line   78)
+* functions, leaf:                       Leaf Functions.     (line    6)
+* fundamental type:                      Types.              (line    6)
+* g in constraint:                       Simple Constraints. (line  120)
+* G in constraint:                       Simple Constraints. (line   98)
+* garbage collector, invocation:         Invoking the garbage collector.
+                                                             (line    6)
+* garbage collector, troubleshooting:    Troubleshooting.    (line    6)
+* GCC and portability:                   Portability.        (line    6)
+* GCC_DRIVER_HOST_INITIALIZATION:        Host Misc.          (line   36)
+* gcov_type:                             Profile information.
+                                                             (line   41)
+* ge:                                    Comparisons.        (line   72)
+* ge and attributes:                     Expressions.        (line   64)
+* GE_EXPR:                               Unary and Binary Expressions.
+                                                             (line    6)
+* GEN_ERRNO_RTX:                         Library Calls.      (line   57)
+* gencodes:                              RTL passes.         (line   18)
+* general_operand:                       Machine-Independent Predicates.
+                                                             (line  105)
+* GENERAL_REGS:                          Register Classes.   (line   23)
+* generated files:                       Files.              (line    6)
+* generating assembler output:           Output Statement.   (line    6)
+* generating insns:                      RTL Template.       (line    6)
+* GENERIC <1>:                           GENERIC.            (line    6)
+* GENERIC:                               Parsing pass.       (line    6)
+* generic predicates:                    Machine-Independent Predicates.
+                                                             (line    6)
+* genflags:                              RTL passes.         (line   18)
+* get_attr:                              Expressions.        (line   80)
+* get_attr_length:                       Insn Lengths.       (line   46)
+* GET_CLASS_NARROWEST_MODE:              Machine Modes.      (line  333)
+* GET_CODE:                              RTL Objects.        (line   47)
+* get_frame_size:                        Elimination.        (line   34)
+* get_insns:                             Insns.              (line   34)
+* get_last_insn:                         Insns.              (line   34)
+* GET_MODE:                              Machine Modes.      (line  280)
+* GET_MODE_ALIGNMENT:                    Machine Modes.      (line  320)
+* GET_MODE_BITSIZE:                      Machine Modes.      (line  304)
+* GET_MODE_CLASS:                        Machine Modes.      (line  294)
+* GET_MODE_FBIT:                         Machine Modes.      (line  311)
+* GET_MODE_IBIT:                         Machine Modes.      (line  307)
+* GET_MODE_MASK:                         Machine Modes.      (line  315)
+* GET_MODE_NAME:                         Machine Modes.      (line  291)
+* GET_MODE_NUNITS:                       Machine Modes.      (line  329)
+* GET_MODE_SIZE:                         Machine Modes.      (line  301)
+* GET_MODE_UNIT_SIZE:                    Machine Modes.      (line  323)
+* GET_MODE_WIDER_MODE:                   Machine Modes.      (line  297)
+* GET_RTX_CLASS:                         RTL Classes.        (line    6)
+* GET_RTX_FORMAT:                        RTL Classes.        (line  131)
+* GET_RTX_LENGTH:                        RTL Classes.        (line  128)
+* geu:                                   Comparisons.        (line   72)
+* geu and attributes:                    Expressions.        (line   64)
+* GGC:                                   Type Information.   (line    6)
+* ggc_collect:                           Invoking the garbage collector.
+                                                             (line    6)
+* GIMPLE <1>:                            GIMPLE.             (line    6)
+* GIMPLE <2>:                            Gimplification pass.
+                                                             (line    6)
+* GIMPLE:                                Parsing pass.       (line   14)
+* GIMPLE Exception Handling:             GIMPLE Exception Handling.
+                                                             (line    6)
+* GIMPLE instruction set:                GIMPLE instruction set.
+                                                             (line    6)
+* GIMPLE sequences:                      GIMPLE sequences.   (line    6)
+* gimple_addresses_taken:                Manipulating GIMPLE statements.
+                                                             (line   90)
+* GIMPLE_ASM:                            GIMPLE_ASM.         (line    6)
+* gimple_asm_clear_volatile:             GIMPLE_ASM.         (line   63)
+* gimple_asm_clobber_op:                 GIMPLE_ASM.         (line   46)
+* gimple_asm_input_op:                   GIMPLE_ASM.         (line   30)
+* gimple_asm_nclobbers:                  GIMPLE_ASM.         (line   27)
+* gimple_asm_ninputs:                    GIMPLE_ASM.         (line   21)
+* gimple_asm_noutputs:                   GIMPLE_ASM.         (line   24)
+* gimple_asm_output_op:                  GIMPLE_ASM.         (line   38)
+* gimple_asm_set_clobber_op:             GIMPLE_ASM.         (line   50)
+* gimple_asm_set_input_op:               GIMPLE_ASM.         (line   34)
+* gimple_asm_set_output_op:              GIMPLE_ASM.         (line   42)
+* gimple_asm_set_volatile:               GIMPLE_ASM.         (line   60)
+* gimple_asm_string:                     GIMPLE_ASM.         (line   53)
+* gimple_asm_volatile_p:                 GIMPLE_ASM.         (line   57)
+* GIMPLE_ASSIGN:                         GIMPLE_ASSIGN.      (line    6)
+* gimple_assign_cast_p <1>:              GIMPLE_ASSIGN.      (line   93)
+* gimple_assign_cast_p:                  Logical Operators.  (line  160)
+* gimple_assign_lhs:                     GIMPLE_ASSIGN.      (line   51)
+* gimple_assign_lhs_ptr:                 GIMPLE_ASSIGN.      (line   54)
+* gimple_assign_rhs1:                    GIMPLE_ASSIGN.      (line   57)
+* gimple_assign_rhs1_ptr:                GIMPLE_ASSIGN.      (line   60)
+* gimple_assign_rhs2:                    GIMPLE_ASSIGN.      (line   64)
+* gimple_assign_rhs2_ptr:                GIMPLE_ASSIGN.      (line   67)
+* gimple_assign_rhs3:                    GIMPLE_ASSIGN.      (line   71)
+* gimple_assign_rhs3_ptr:                GIMPLE_ASSIGN.      (line   74)
+* gimple_assign_rhs_class:               GIMPLE_ASSIGN.      (line   46)
+* gimple_assign_rhs_code:                GIMPLE_ASSIGN.      (line   41)
+* gimple_assign_set_lhs:                 GIMPLE_ASSIGN.      (line   78)
+* gimple_assign_set_rhs1:                GIMPLE_ASSIGN.      (line   81)
+* gimple_assign_set_rhs2:                GIMPLE_ASSIGN.      (line   85)
+* gimple_assign_set_rhs3:                GIMPLE_ASSIGN.      (line   89)
+* gimple_bb:                             Manipulating GIMPLE statements.
+                                                             (line   18)
+* GIMPLE_BIND:                           GIMPLE_BIND.        (line    6)
+* gimple_bind_add_seq:                   GIMPLE_BIND.        (line   36)
+* gimple_bind_add_stmt:                  GIMPLE_BIND.        (line   32)
+* gimple_bind_append_vars:               GIMPLE_BIND.        (line   19)
+* gimple_bind_block:                     GIMPLE_BIND.        (line   40)
+* gimple_bind_body:                      GIMPLE_BIND.        (line   23)
+* gimple_bind_set_block:                 GIMPLE_BIND.        (line   45)
+* gimple_bind_set_body:                  GIMPLE_BIND.        (line   28)
+* gimple_bind_set_vars:                  GIMPLE_BIND.        (line   15)
+* gimple_bind_vars:                      GIMPLE_BIND.        (line   12)
+* gimple_block:                          Manipulating GIMPLE statements.
+                                                             (line   21)
+* gimple_build_asm:                      GIMPLE_ASM.         (line    8)
+* gimple_build_asm_vec:                  GIMPLE_ASM.         (line   17)
+* gimple_build_assign:                   GIMPLE_ASSIGN.      (line    7)
+* gimple_build_assign_with_ops:          GIMPLE_ASSIGN.      (line   30)
+* gimple_build_bind:                     GIMPLE_BIND.        (line    8)
+* gimple_build_call:                     GIMPLE_CALL.        (line    8)
+* gimple_build_call_from_tree:           GIMPLE_CALL.        (line   16)
+* gimple_build_call_vec:                 GIMPLE_CALL.        (line   25)
+* gimple_build_catch:                    GIMPLE_CATCH.       (line    8)
+* gimple_build_cond:                     GIMPLE_COND.        (line    8)
+* gimple_build_cond_from_tree:           GIMPLE_COND.        (line   16)
+* gimple_build_debug_bind:               GIMPLE_DEBUG.       (line    8)
+* gimple_build_eh_filter:                GIMPLE_EH_FILTER.   (line    8)
+* gimple_build_goto:                     GIMPLE_LABEL.       (line   18)
+* gimple_build_label:                    GIMPLE_LABEL.       (line    7)
+* gimple_build_nop:                      GIMPLE_NOP.         (line    7)
+* gimple_build_omp_atomic_load:          GIMPLE_OMP_ATOMIC_LOAD.
+                                                             (line    8)
+* gimple_build_omp_atomic_store:         GIMPLE_OMP_ATOMIC_STORE.
+                                                             (line    7)
+* gimple_build_omp_continue:             GIMPLE_OMP_CONTINUE.
+                                                             (line    8)
+* gimple_build_omp_critical:             GIMPLE_OMP_CRITICAL.
+                                                             (line    8)
+* gimple_build_omp_for:                  GIMPLE_OMP_FOR.     (line    9)
+* gimple_build_omp_master:               GIMPLE_OMP_MASTER.  (line    7)
+* gimple_build_omp_ordered:              GIMPLE_OMP_ORDERED. (line    7)
+* gimple_build_omp_parallel:             GIMPLE_OMP_PARALLEL.
+                                                             (line    8)
+* gimple_build_omp_return:               GIMPLE_OMP_RETURN.  (line    7)
+* gimple_build_omp_section:              GIMPLE_OMP_SECTION. (line    7)
+* gimple_build_omp_sections:             GIMPLE_OMP_SECTIONS.
+                                                             (line    8)
+* gimple_build_omp_sections_switch:      GIMPLE_OMP_SECTIONS.
+                                                             (line   14)
+* gimple_build_omp_single:               GIMPLE_OMP_SINGLE.  (line    8)
+* gimple_build_resx:                     GIMPLE_RESX.        (line    7)
+* gimple_build_return:                   GIMPLE_RETURN.      (line    7)
+* gimple_build_switch:                   GIMPLE_SWITCH.      (line    8)
+* gimple_build_switch_vec:               GIMPLE_SWITCH.      (line   16)
+* gimple_build_try:                      GIMPLE_TRY.         (line    8)
+* gimple_build_wce:                      GIMPLE_WITH_CLEANUP_EXPR.
+                                                             (line    7)
+* GIMPLE_CALL:                           GIMPLE_CALL.        (line    6)
+* gimple_call_arg:                       GIMPLE_CALL.        (line   66)
+* gimple_call_arg_ptr:                   GIMPLE_CALL.        (line   71)
+* gimple_call_cannot_inline_p:           GIMPLE_CALL.        (line   91)
+* gimple_call_chain:                     GIMPLE_CALL.        (line   57)
+* gimple_call_copy_skip_args:            GIMPLE_CALL.        (line   98)
+* gimple_call_fn:                        GIMPLE_CALL.        (line   38)
+* gimple_call_fndecl:                    GIMPLE_CALL.        (line   46)
+* gimple_call_lhs:                       GIMPLE_CALL.        (line   29)
+* gimple_call_lhs_ptr:                   GIMPLE_CALL.        (line   32)
+* gimple_call_mark_uninlinable:          GIMPLE_CALL.        (line   88)
+* gimple_call_noreturn_p:                GIMPLE_CALL.        (line   94)
+* gimple_call_num_args:                  GIMPLE_CALL.        (line   63)
+* gimple_call_return_type:               GIMPLE_CALL.        (line   54)
+* gimple_call_set_arg:                   GIMPLE_CALL.        (line   76)
+* gimple_call_set_chain:                 GIMPLE_CALL.        (line   60)
+* gimple_call_set_fn:                    GIMPLE_CALL.        (line   42)
+* gimple_call_set_fndecl:                GIMPLE_CALL.        (line   51)
+* gimple_call_set_lhs:                   GIMPLE_CALL.        (line   35)
+* gimple_call_set_tail:                  GIMPLE_CALL.        (line   80)
+* gimple_call_tail_p:                    GIMPLE_CALL.        (line   85)
+* GIMPLE_CATCH:                          GIMPLE_CATCH.       (line    6)
+* gimple_catch_handler:                  GIMPLE_CATCH.       (line   20)
+* gimple_catch_set_handler:              GIMPLE_CATCH.       (line   28)
+* gimple_catch_set_types:                GIMPLE_CATCH.       (line   24)
+* gimple_catch_types:                    GIMPLE_CATCH.       (line   13)
+* gimple_catch_types_ptr:                GIMPLE_CATCH.       (line   16)
+* gimple_code:                           Manipulating GIMPLE statements.
+                                                             (line   15)
+* GIMPLE_COND:                           GIMPLE_COND.        (line    6)
+* gimple_cond_code:                      GIMPLE_COND.        (line   21)
+* gimple_cond_false_label:               GIMPLE_COND.        (line   60)
+* gimple_cond_lhs:                       GIMPLE_COND.        (line   30)
+* gimple_cond_make_false:                GIMPLE_COND.        (line   64)
+* gimple_cond_make_true:                 GIMPLE_COND.        (line   67)
+* gimple_cond_rhs:                       GIMPLE_COND.        (line   38)
+* gimple_cond_set_code:                  GIMPLE_COND.        (line   26)
+* gimple_cond_set_false_label:           GIMPLE_COND.        (line   56)
+* gimple_cond_set_lhs:                   GIMPLE_COND.        (line   34)
+* gimple_cond_set_rhs:                   GIMPLE_COND.        (line   42)
+* gimple_cond_set_true_label:            GIMPLE_COND.        (line   51)
+* gimple_cond_true_label:                GIMPLE_COND.        (line   46)
+* gimple_copy:                           Manipulating GIMPLE statements.
+                                                             (line  147)
+* GIMPLE_DEBUG:                          GIMPLE_DEBUG.       (line    6)
+* GIMPLE_DEBUG_BIND:                     GIMPLE_DEBUG.       (line    6)
+* gimple_debug_bind_get_value:           GIMPLE_DEBUG.       (line   48)
+* gimple_debug_bind_get_value_ptr:       GIMPLE_DEBUG.       (line   53)
+* gimple_debug_bind_get_var:             GIMPLE_DEBUG.       (line   45)
+* gimple_debug_bind_has_value_p:         GIMPLE_DEBUG.       (line   70)
+* gimple_debug_bind_p:                   Logical Operators.  (line  164)
+* gimple_debug_bind_reset_value:         GIMPLE_DEBUG.       (line   66)
+* gimple_debug_bind_set_value:           GIMPLE_DEBUG.       (line   62)
+* gimple_debug_bind_set_var:             GIMPLE_DEBUG.       (line   58)
+* gimple_def_ops:                        Manipulating GIMPLE statements.
+                                                             (line   94)
+* GIMPLE_EH_FILTER:                      GIMPLE_EH_FILTER.   (line    6)
+* gimple_eh_filter_failure:              GIMPLE_EH_FILTER.   (line   19)
+* gimple_eh_filter_must_not_throw:       GIMPLE_EH_FILTER.   (line   33)
+* gimple_eh_filter_set_failure:          GIMPLE_EH_FILTER.   (line   29)
+* gimple_eh_filter_set_must_not_throw:   GIMPLE_EH_FILTER.   (line   37)
+* gimple_eh_filter_set_types:            GIMPLE_EH_FILTER.   (line   24)
+* gimple_eh_filter_types:                GIMPLE_EH_FILTER.   (line   12)
+* gimple_eh_filter_types_ptr:            GIMPLE_EH_FILTER.   (line   15)
+* gimple_expr_code:                      Manipulating GIMPLE statements.
+                                                             (line   31)
+* gimple_expr_type:                      Manipulating GIMPLE statements.
+                                                             (line   24)
+* gimple_goto_dest:                      GIMPLE_LABEL.       (line   21)
+* gimple_goto_set_dest:                  GIMPLE_LABEL.       (line   24)
+* gimple_has_mem_ops:                    Manipulating GIMPLE statements.
+                                                             (line   72)
+* gimple_has_ops:                        Manipulating GIMPLE statements.
+                                                             (line   69)
+* gimple_has_volatile_ops:               Manipulating GIMPLE statements.
+                                                             (line  134)
+* GIMPLE_LABEL:                          GIMPLE_LABEL.       (line    6)
+* gimple_label_label:                    GIMPLE_LABEL.       (line   11)
+* gimple_label_set_label:                GIMPLE_LABEL.       (line   14)
+* gimple_loaded_syms:                    Manipulating GIMPLE statements.
+                                                             (line  122)
+* gimple_locus:                          Manipulating GIMPLE statements.
+                                                             (line   42)
+* gimple_locus_empty_p:                  Manipulating GIMPLE statements.
+                                                             (line   48)
+* gimple_modified_p:                     Manipulating GIMPLE statements.
+                                                             (line  130)
+* gimple_no_warning_p:                   Manipulating GIMPLE statements.
+                                                             (line   51)
+* GIMPLE_NOP:                            GIMPLE_NOP.         (line    6)
+* gimple_nop_p:                          GIMPLE_NOP.         (line   10)
+* gimple_num_ops <1>:                    Manipulating GIMPLE statements.
+                                                             (line   75)
+* gimple_num_ops:                        Logical Operators.  (line   78)
+* GIMPLE_OMP_ATOMIC_LOAD:                GIMPLE_OMP_ATOMIC_LOAD.
+                                                             (line    6)
+* gimple_omp_atomic_load_lhs:            GIMPLE_OMP_ATOMIC_LOAD.
+                                                             (line   17)
+* gimple_omp_atomic_load_rhs:            GIMPLE_OMP_ATOMIC_LOAD.
+                                                             (line   24)
+* gimple_omp_atomic_load_set_lhs:        GIMPLE_OMP_ATOMIC_LOAD.
+                                                             (line   14)
+* gimple_omp_atomic_load_set_rhs:        GIMPLE_OMP_ATOMIC_LOAD.
+                                                             (line   21)
+* GIMPLE_OMP_ATOMIC_STORE:               GIMPLE_OMP_ATOMIC_STORE.
+                                                             (line    6)
+* gimple_omp_atomic_store_set_val:       GIMPLE_OMP_ATOMIC_STORE.
+                                                             (line   12)
+* gimple_omp_atomic_store_val:           GIMPLE_OMP_ATOMIC_STORE.
+                                                             (line   15)
+* gimple_omp_body:                       GIMPLE_OMP_PARALLEL.
+                                                             (line   24)
+* GIMPLE_OMP_CONTINUE:                   GIMPLE_OMP_CONTINUE.
+                                                             (line    6)
+* gimple_omp_continue_control_def:       GIMPLE_OMP_CONTINUE.
+                                                             (line   13)
+* gimple_omp_continue_control_def_ptr:   GIMPLE_OMP_CONTINUE.
+                                                             (line   17)
+* gimple_omp_continue_control_use:       GIMPLE_OMP_CONTINUE.
+                                                             (line   24)
+* gimple_omp_continue_control_use_ptr:   GIMPLE_OMP_CONTINUE.
+                                                             (line   28)
+* gimple_omp_continue_set_control_def:   GIMPLE_OMP_CONTINUE.
+                                                             (line   20)
+* gimple_omp_continue_set_control_use:   GIMPLE_OMP_CONTINUE.
+                                                             (line   31)
+* GIMPLE_OMP_CRITICAL:                   GIMPLE_OMP_CRITICAL.
+                                                             (line    6)
+* gimple_omp_critical_name:              GIMPLE_OMP_CRITICAL.
+                                                             (line   13)
+* gimple_omp_critical_name_ptr:          GIMPLE_OMP_CRITICAL.
+                                                             (line   16)
+* gimple_omp_critical_set_name:          GIMPLE_OMP_CRITICAL.
+                                                             (line   21)
+* GIMPLE_OMP_FOR:                        GIMPLE_OMP_FOR.     (line    6)
+* gimple_omp_for_clauses:                GIMPLE_OMP_FOR.     (line   20)
+* gimple_omp_for_clauses_ptr:            GIMPLE_OMP_FOR.     (line   23)
+* gimple_omp_for_cond:                   GIMPLE_OMP_FOR.     (line   83)
+* gimple_omp_for_final:                  GIMPLE_OMP_FOR.     (line   51)
+* gimple_omp_for_final_ptr:              GIMPLE_OMP_FOR.     (line   54)
+* gimple_omp_for_incr:                   GIMPLE_OMP_FOR.     (line   61)
+* gimple_omp_for_incr_ptr:               GIMPLE_OMP_FOR.     (line   64)
+* gimple_omp_for_index:                  GIMPLE_OMP_FOR.     (line   31)
+* gimple_omp_for_index_ptr:              GIMPLE_OMP_FOR.     (line   34)
+* gimple_omp_for_initial:                GIMPLE_OMP_FOR.     (line   41)
+* gimple_omp_for_initial_ptr:            GIMPLE_OMP_FOR.     (line   44)
+* gimple_omp_for_pre_body:               GIMPLE_OMP_FOR.     (line   70)
+* gimple_omp_for_set_clauses:            GIMPLE_OMP_FOR.     (line   27)
+* gimple_omp_for_set_cond:               GIMPLE_OMP_FOR.     (line   80)
+* gimple_omp_for_set_final:              GIMPLE_OMP_FOR.     (line   58)
+* gimple_omp_for_set_incr:               GIMPLE_OMP_FOR.     (line   67)
+* gimple_omp_for_set_index:              GIMPLE_OMP_FOR.     (line   38)
+* gimple_omp_for_set_initial:            GIMPLE_OMP_FOR.     (line   48)
+* gimple_omp_for_set_pre_body:           GIMPLE_OMP_FOR.     (line   75)
+* GIMPLE_OMP_MASTER:                     GIMPLE_OMP_MASTER.  (line    6)
+* GIMPLE_OMP_ORDERED:                    GIMPLE_OMP_ORDERED. (line    6)
+* GIMPLE_OMP_PARALLEL:                   GIMPLE_OMP_PARALLEL.
+                                                             (line    6)
+* gimple_omp_parallel_child_fn:          GIMPLE_OMP_PARALLEL.
+                                                             (line   42)
+* gimple_omp_parallel_child_fn_ptr:      GIMPLE_OMP_PARALLEL.
+                                                             (line   46)
+* gimple_omp_parallel_clauses:           GIMPLE_OMP_PARALLEL.
+                                                             (line   31)
+* gimple_omp_parallel_clauses_ptr:       GIMPLE_OMP_PARALLEL.
+                                                             (line   34)
+* gimple_omp_parallel_combined_p:        GIMPLE_OMP_PARALLEL.
+                                                             (line   16)
+* gimple_omp_parallel_data_arg:          GIMPLE_OMP_PARALLEL.
+                                                             (line   54)
+* gimple_omp_parallel_data_arg_ptr:      GIMPLE_OMP_PARALLEL.
+                                                             (line   58)
+* gimple_omp_parallel_set_child_fn:      GIMPLE_OMP_PARALLEL.
+                                                             (line   51)
+* gimple_omp_parallel_set_clauses:       GIMPLE_OMP_PARALLEL.
+                                                             (line   38)
+* gimple_omp_parallel_set_combined_p:    GIMPLE_OMP_PARALLEL.
+                                                             (line   20)
+* gimple_omp_parallel_set_data_arg:      GIMPLE_OMP_PARALLEL.
+                                                             (line   62)
+* GIMPLE_OMP_RETURN:                     GIMPLE_OMP_RETURN.  (line    6)
+* gimple_omp_return_nowait_p:            GIMPLE_OMP_RETURN.  (line   14)
+* gimple_omp_return_set_nowait:          GIMPLE_OMP_RETURN.  (line   11)
+* GIMPLE_OMP_SECTION:                    GIMPLE_OMP_SECTION. (line    6)
+* gimple_omp_section_last_p:             GIMPLE_OMP_SECTION. (line   12)
+* gimple_omp_section_set_last:           GIMPLE_OMP_SECTION. (line   16)
+* GIMPLE_OMP_SECTIONS:                   GIMPLE_OMP_SECTIONS.
+                                                             (line    6)
+* gimple_omp_sections_clauses:           GIMPLE_OMP_SECTIONS.
+                                                             (line   30)
+* gimple_omp_sections_clauses_ptr:       GIMPLE_OMP_SECTIONS.
+                                                             (line   33)
+* gimple_omp_sections_control:           GIMPLE_OMP_SECTIONS.
+                                                             (line   17)
+* gimple_omp_sections_control_ptr:       GIMPLE_OMP_SECTIONS.
+                                                             (line   21)
+* gimple_omp_sections_set_clauses:       GIMPLE_OMP_SECTIONS.
+                                                             (line   37)
+* gimple_omp_sections_set_control:       GIMPLE_OMP_SECTIONS.
+                                                             (line   26)
+* gimple_omp_set_body:                   GIMPLE_OMP_PARALLEL.
+                                                             (line   28)
+* GIMPLE_OMP_SINGLE:                     GIMPLE_OMP_SINGLE.  (line    6)
+* gimple_omp_single_clauses:             GIMPLE_OMP_SINGLE.  (line   14)
+* gimple_omp_single_clauses_ptr:         GIMPLE_OMP_SINGLE.  (line   17)
+* gimple_omp_single_set_clauses:         GIMPLE_OMP_SINGLE.  (line   21)
+* gimple_op <1>:                         Manipulating GIMPLE statements.
+                                                             (line   81)
+* gimple_op:                             Logical Operators.  (line   81)
+* gimple_op_ptr:                         Manipulating GIMPLE statements.
+                                                             (line   84)
+* gimple_ops <1>:                        Manipulating GIMPLE statements.
+                                                             (line   78)
+* gimple_ops:                            Logical Operators.  (line   84)
+* GIMPLE_PHI:                            GIMPLE_PHI.         (line    6)
+* gimple_phi_arg:                        GIMPLE_PHI.         (line   28)
+* gimple_phi_capacity:                   GIMPLE_PHI.         (line   10)
+* gimple_phi_num_args:                   GIMPLE_PHI.         (line   14)
+* gimple_phi_result:                     GIMPLE_PHI.         (line   19)
+* gimple_phi_result_ptr:                 GIMPLE_PHI.         (line   22)
+* gimple_phi_set_arg:                    GIMPLE_PHI.         (line   33)
+* gimple_phi_set_result:                 GIMPLE_PHI.         (line   25)
+* gimple_plf:                            Manipulating GIMPLE statements.
+                                                             (line   66)
+* GIMPLE_RESX:                           GIMPLE_RESX.        (line    6)
+* gimple_resx_region:                    GIMPLE_RESX.        (line   13)
+* gimple_resx_set_region:                GIMPLE_RESX.        (line   16)
+* GIMPLE_RETURN:                         GIMPLE_RETURN.      (line    6)
+* gimple_return_retval:                  GIMPLE_RETURN.      (line   10)
+* gimple_return_set_retval:              GIMPLE_RETURN.      (line   14)
+* gimple_seq_add_seq:                    GIMPLE sequences.   (line   32)
+* gimple_seq_add_stmt:                   GIMPLE sequences.   (line   26)
+* gimple_seq_alloc:                      GIMPLE sequences.   (line   62)
+* gimple_seq_copy:                       GIMPLE sequences.   (line   67)
+* gimple_seq_deep_copy:                  GIMPLE sequences.   (line   37)
+* gimple_seq_empty_p:                    GIMPLE sequences.   (line   70)
+* gimple_seq_first:                      GIMPLE sequences.   (line   44)
+* gimple_seq_init:                       GIMPLE sequences.   (line   59)
+* gimple_seq_last:                       GIMPLE sequences.   (line   47)
+* gimple_seq_reverse:                    GIMPLE sequences.   (line   40)
+* gimple_seq_set_first:                  GIMPLE sequences.   (line   55)
+* gimple_seq_set_last:                   GIMPLE sequences.   (line   51)
+* gimple_seq_singleton_p:                GIMPLE sequences.   (line   79)
+* gimple_set_block:                      Manipulating GIMPLE statements.
+                                                             (line   39)
+* gimple_set_def_ops:                    Manipulating GIMPLE statements.
+                                                             (line   98)
+* gimple_set_has_volatile_ops:           Manipulating GIMPLE statements.
+                                                             (line  138)
+* gimple_set_locus:                      Manipulating GIMPLE statements.
+                                                             (line   45)
+* gimple_set_op:                         Manipulating GIMPLE statements.
+                                                             (line   87)
+* gimple_set_plf:                        Manipulating GIMPLE statements.
+                                                             (line   62)
+* gimple_set_use_ops:                    Manipulating GIMPLE statements.
+                                                             (line  105)
+* gimple_set_vdef_ops:                   Manipulating GIMPLE statements.
+                                                             (line  119)
+* gimple_set_visited:                    Manipulating GIMPLE statements.
+                                                             (line   55)
+* gimple_set_vuse_ops:                   Manipulating GIMPLE statements.
+                                                             (line  112)
+* gimple_statement_base:                 Tuple representation.
+                                                             (line   14)
+* gimple_statement_with_ops:             Tuple representation.
+                                                             (line   96)
+* gimple_stored_syms:                    Manipulating GIMPLE statements.
+                                                             (line  126)
+* GIMPLE_SWITCH:                         GIMPLE_SWITCH.      (line    6)
+* gimple_switch_default_label:           GIMPLE_SWITCH.      (line   46)
+* gimple_switch_index:                   GIMPLE_SWITCH.      (line   31)
+* gimple_switch_label:                   GIMPLE_SWITCH.      (line   37)
+* gimple_switch_num_labels:              GIMPLE_SWITCH.      (line   22)
+* gimple_switch_set_default_label:       GIMPLE_SWITCH.      (line   50)
+* gimple_switch_set_index:               GIMPLE_SWITCH.      (line   34)
+* gimple_switch_set_label:               GIMPLE_SWITCH.      (line   42)
+* gimple_switch_set_num_labels:          GIMPLE_SWITCH.      (line   27)
+* GIMPLE_TRY:                            GIMPLE_TRY.         (line    6)
+* gimple_try_catch_is_cleanup:           GIMPLE_TRY.         (line   20)
+* gimple_try_cleanup:                    GIMPLE_TRY.         (line   27)
+* gimple_try_eval:                       GIMPLE_TRY.         (line   23)
+* gimple_try_kind:                       GIMPLE_TRY.         (line   16)
+* gimple_try_set_catch_is_cleanup:       GIMPLE_TRY.         (line   32)
+* gimple_try_set_cleanup:                GIMPLE_TRY.         (line   41)
+* gimple_try_set_eval:                   GIMPLE_TRY.         (line   36)
+* gimple_use_ops:                        Manipulating GIMPLE statements.
+                                                             (line  101)
+* gimple_vdef_ops:                       Manipulating GIMPLE statements.
+                                                             (line  115)
+* gimple_visited_p:                      Manipulating GIMPLE statements.
+                                                             (line   58)
+* gimple_vuse_ops:                       Manipulating GIMPLE statements.
+                                                             (line  108)
+* gimple_wce_cleanup:                    GIMPLE_WITH_CLEANUP_EXPR.
+                                                             (line   11)
+* gimple_wce_cleanup_eh_only:            GIMPLE_WITH_CLEANUP_EXPR.
+                                                             (line   18)
+* gimple_wce_set_cleanup:                GIMPLE_WITH_CLEANUP_EXPR.
+                                                             (line   15)
+* gimple_wce_set_cleanup_eh_only:        GIMPLE_WITH_CLEANUP_EXPR.
+                                                             (line   22)
+* GIMPLE_WITH_CLEANUP_EXPR:              GIMPLE_WITH_CLEANUP_EXPR.
+                                                             (line    6)
+* gimplification <1>:                    Gimplification pass.
+                                                             (line    6)
+* gimplification:                        Parsing pass.       (line   14)
+* gimplifier:                            Parsing pass.       (line   14)
+* gimplify_assign:                       GIMPLE_ASSIGN.      (line   19)
+* gimplify_expr:                         Gimplification pass.
+                                                             (line   18)
+* gimplify_function_tree:                Gimplification pass.
+                                                             (line   18)
+* GLOBAL_INIT_PRIORITY:                  Functions for C++.  (line  141)
+* global_regs:                           Register Basics.    (line   59)
+* GO_IF_LEGITIMATE_ADDRESS:              Addressing Modes.   (line   91)
+* GO_IF_MODE_DEPENDENT_ADDRESS:          Addressing Modes.   (line  212)
+* greater than:                          Comparisons.        (line   60)
+* gsi_after_labels:                      Sequence iterators. (line   76)
+* gsi_bb:                                Sequence iterators. (line   83)
+* gsi_commit_edge_inserts:               Sequence iterators. (line  194)
+* gsi_commit_one_edge_insert:            Sequence iterators. (line  190)
+* gsi_end_p:                             Sequence iterators. (line   60)
+* gsi_for_stmt:                          Sequence iterators. (line  157)
+* gsi_insert_after:                      Sequence iterators. (line  147)
+* gsi_insert_before:                     Sequence iterators. (line  136)
+* gsi_insert_on_edge:                    Sequence iterators. (line  174)
+* gsi_insert_on_edge_immediate:          Sequence iterators. (line  185)
+* gsi_insert_seq_after:                  Sequence iterators. (line  154)
+* gsi_insert_seq_before:                 Sequence iterators. (line  143)
+* gsi_insert_seq_on_edge:                Sequence iterators. (line  179)
+* gsi_last:                              Sequence iterators. (line   50)
+* gsi_last_bb:                           Sequence iterators. (line   56)
+* gsi_link_after:                        Sequence iterators. (line  115)
+* gsi_link_before:                       Sequence iterators. (line  105)
+* gsi_link_seq_after:                    Sequence iterators. (line  110)
+* gsi_link_seq_before:                   Sequence iterators. (line   99)
+* gsi_move_after:                        Sequence iterators. (line  161)
+* gsi_move_before:                       Sequence iterators. (line  166)
+* gsi_move_to_bb_end:                    Sequence iterators. (line  171)
+* gsi_next:                              Sequence iterators. (line   66)
+* gsi_one_before_end_p:                  Sequence iterators. (line   63)
+* gsi_prev:                              Sequence iterators. (line   69)
+* gsi_remove:                            Sequence iterators. (line   90)
+* gsi_replace:                           Sequence iterators. (line  130)
+* gsi_seq:                               Sequence iterators. (line   86)
+* gsi_split_seq_after:                   Sequence iterators. (line  120)
+* gsi_split_seq_before:                  Sequence iterators. (line  125)
+* gsi_start:                             Sequence iterators. (line   40)
+* gsi_start_bb:                          Sequence iterators. (line   46)
+* gsi_stmt:                              Sequence iterators. (line   72)
+* gsi_stmt_ptr:                          Sequence iterators. (line   80)
+* gt:                                    Comparisons.        (line   60)
+* gt and attributes:                     Expressions.        (line   64)
+* GT_EXPR:                               Unary and Binary Expressions.
+                                                             (line    6)
+* gtu:                                   Comparisons.        (line   64)
+* gtu and attributes:                    Expressions.        (line   64)
+* GTY:                                   Type Information.   (line    6)
+* H in constraint:                       Simple Constraints. (line   98)
+* HAmode:                                Machine Modes.      (line  144)
+* HANDLE_PRAGMA_PACK_WITH_EXPANSION:     Misc.               (line  438)
+* HANDLER:                               Statements for C++. (line    6)
+* HANDLER_BODY:                          Statements for C++. (line    6)
+* HANDLER_PARMS:                         Statements for C++. (line    6)
+* hard registers:                        Regs and Memory.    (line    9)
+* HARD_FRAME_POINTER_IS_ARG_POINTER:     Frame Registers.    (line   58)
+* HARD_FRAME_POINTER_IS_FRAME_POINTER:   Frame Registers.    (line   51)
+* HARD_FRAME_POINTER_REGNUM:             Frame Registers.    (line   20)
+* HARD_REGNO_CALL_PART_CLOBBERED:        Register Basics.    (line   53)
+* HARD_REGNO_CALLER_SAVE_MODE:           Caller Saves.       (line   20)
+* HARD_REGNO_MODE_OK:                    Values in Registers.
+                                                             (line   58)
+* HARD_REGNO_NREGS:                      Values in Registers.
+                                                             (line   11)
+* HARD_REGNO_NREGS_HAS_PADDING:          Values in Registers.
+                                                             (line   25)
+* HARD_REGNO_NREGS_WITH_PADDING:         Values in Registers.
+                                                             (line   43)
+* HARD_REGNO_RENAME_OK:                  Values in Registers.
+                                                             (line  119)
+* HAS_INIT_SECTION:                      Macros for Initialization.
+                                                             (line   19)
+* HAS_LONG_COND_BRANCH:                  Misc.               (line    9)
+* HAS_LONG_UNCOND_BRANCH:                Misc.               (line   18)
+* HAVE_DOS_BASED_FILE_SYSTEM:            Filesystem.         (line   11)
+* HAVE_POST_DECREMENT:                   Addressing Modes.   (line   12)
+* HAVE_POST_INCREMENT:                   Addressing Modes.   (line   11)
+* HAVE_POST_MODIFY_DISP:                 Addressing Modes.   (line   18)
+* HAVE_POST_MODIFY_REG:                  Addressing Modes.   (line   24)
+* HAVE_PRE_DECREMENT:                    Addressing Modes.   (line   10)
+* HAVE_PRE_INCREMENT:                    Addressing Modes.   (line    9)
+* HAVE_PRE_MODIFY_DISP:                  Addressing Modes.   (line   17)
+* HAVE_PRE_MODIFY_REG:                   Addressing Modes.   (line   23)
+* HCmode:                                Machine Modes.      (line  197)
+* HFmode:                                Machine Modes.      (line   58)
+* high:                                  Constants.          (line  109)
+* HImode:                                Machine Modes.      (line   29)
+* HImode, in insn:                       Insns.              (line  272)
+* HONOR_REG_ALLOC_ORDER:                 Allocation Order.   (line   37)
+* host configuration:                    Host Config.        (line    6)
+* host functions:                        Host Common.        (line    6)
+* host hooks:                            Host Common.        (line    6)
+* host makefile fragment:                Host Fragment.      (line    6)
+* HOST_BIT_BUCKET:                       Filesystem.         (line   51)
+* HOST_EXECUTABLE_SUFFIX:                Filesystem.         (line   45)
+* HOST_HOOKS_EXTRA_SIGNALS:              Host Common.        (line   12)
+* HOST_HOOKS_GT_PCH_ALLOC_GRANULARITY:   Host Common.        (line   45)
+* HOST_HOOKS_GT_PCH_GET_ADDRESS:         Host Common.        (line   17)
+* HOST_HOOKS_GT_PCH_USE_ADDRESS:         Host Common.        (line   26)
+* HOST_LACKS_INODE_NUMBERS:              Filesystem.         (line   89)
+* HOST_LONG_FORMAT:                      Host Misc.          (line   45)
+* HOST_LONG_LONG_FORMAT:                 Host Misc.          (line   41)
+* HOST_OBJECT_SUFFIX:                    Filesystem.         (line   40)
+* HOST_PTR_PRINTF:                       Host Misc.          (line   49)
+* HOT_TEXT_SECTION_NAME:                 Sections.           (line   43)
+* HQmode:                                Machine Modes.      (line  107)
+* I in constraint:                       Simple Constraints. (line   81)
+* i in constraint:                       Simple Constraints. (line   70)
+* identifier:                            Identifiers.        (line    6)
+* IDENTIFIER_LENGTH:                     Identifiers.        (line   22)
+* IDENTIFIER_NODE:                       Identifiers.        (line    6)
+* IDENTIFIER_OPNAME_P:                   Identifiers.        (line   27)
+* IDENTIFIER_POINTER:                    Identifiers.        (line   17)
+* IDENTIFIER_TYPENAME_P:                 Identifiers.        (line   33)
+* IEEE 754-2008:                         Decimal float library routines.
+                                                             (line    6)
+* IF_COND:                               Statements for C++. (line    6)
+* if_marked:                             GTY Options.        (line  151)
+* IF_STMT:                               Statements for C++. (line    6)
+* if_then_else:                          Comparisons.        (line   80)
+* if_then_else and attributes:           Expressions.        (line   32)
+* if_then_else usage:                    Side Effects.       (line   56)
+* IFCVT_EXTRA_FIELDS:                    Misc.               (line  582)
+* IFCVT_INIT_EXTRA_FIELDS:               Misc.               (line  577)
+* IFCVT_MODIFY_CANCEL:                   Misc.               (line  571)
+* IFCVT_MODIFY_FINAL:                    Misc.               (line  565)
+* IFCVT_MODIFY_INSN:                     Misc.               (line  559)
+* IFCVT_MODIFY_MULTIPLE_TESTS:           Misc.               (line  552)
+* IFCVT_MODIFY_TESTS:                    Misc.               (line  541)
+* IMAGPART_EXPR:                         Unary and Binary Expressions.
+                                                             (line    6)
+* Immediate Uses:                        SSA Operands.       (line  274)
+* immediate_operand:                     Machine-Independent Predicates.
+                                                             (line   11)
+* IMMEDIATE_PREFIX:                      Instruction Output. (line  155)
+* in_struct:                             Flags.              (line  263)
+* in_struct, in code_label and note:     Flags.              (line   59)
+* in_struct, in insn and jump_insn and call_insn: Flags.     (line   49)
+* in_struct, in insn, jump_insn and call_insn: Flags.        (line  166)
+* in_struct, in mem:                     Flags.              (line   70)
+* in_struct, in subreg:                  Flags.              (line  205)
+* include:                               Including Patterns. (line    6)
+* INCLUDE_DEFAULTS:                      Driver.             (line  344)
+* inclusive-or, bitwise:                 Arithmetic.         (line  163)
+* INCOMING_FRAME_SP_OFFSET:              Frame Layout.       (line  183)
+* INCOMING_REGNO:                        Register Basics.    (line   88)
+* INCOMING_RETURN_ADDR_RTX:              Frame Layout.       (line  139)
+* INCOMING_STACK_BOUNDARY:               Storage Layout.     (line  153)
+* INDEX_REG_CLASS:                       Register Classes.   (line  136)
+* indirect_jump instruction pattern:     Standard Names.     (line 1078)
+* indirect_operand:                      Machine-Independent Predicates.
+                                                             (line   71)
+* INDIRECT_REF:                          Storage References. (line    6)
+* INIT_ARRAY_SECTION_ASM_OP:             Sections.           (line  108)
+* INIT_CUMULATIVE_ARGS:                  Register Arguments. (line  149)
+* INIT_CUMULATIVE_INCOMING_ARGS:         Register Arguments. (line  176)
+* INIT_CUMULATIVE_LIBCALL_ARGS:          Register Arguments. (line  170)
+* INIT_ENVIRONMENT:                      Driver.             (line  306)
+* INIT_EXPANDERS:                        Per-Function Data.  (line   39)
+* INIT_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* init_machine_status:                   Per-Function Data.  (line   45)
+* init_one_libfunc:                      Library Calls.      (line   15)
+* INIT_SECTION_ASM_OP <1>:               Macros for Initialization.
+                                                             (line   10)
+* INIT_SECTION_ASM_OP:                   Sections.           (line   92)
+* INITIAL_ELIMINATION_OFFSET:            Elimination.        (line   85)
+* INITIAL_FRAME_ADDRESS_RTX:             Frame Layout.       (line   83)
+* INITIAL_FRAME_POINTER_OFFSET:          Elimination.        (line   35)
+* initialization routines:               Initialization.     (line    6)
+* inlining:                              Target Attributes.  (line   95)
+* insert_insn_on_edge:                   Maintaining the CFG.
+                                                             (line  118)
+* insn:                                  Insns.              (line   63)
+* insn and /f:                           Flags.              (line  125)
+* insn and /j:                           Flags.              (line  175)
+* insn and /s:                           Flags.              (line   49)
+* insn and /u:                           Flags.              (line   39)
+* insn and /v:                           Flags.              (line   44)
+* insn attributes:                       Insn Attributes.    (line    6)
+* insn canonicalization:                 Insn Canonicalizations.
+                                                             (line    6)
+* insn includes:                         Including Patterns. (line    6)
+* insn lengths, computing:               Insn Lengths.       (line    6)
+* insn splitting:                        Insn Splitting.     (line    6)
+* insn-attr.h:                           Defining Attributes.
+                                                             (line   24)
+* INSN_ANNULLED_BRANCH_P:                Flags.              (line   39)
+* INSN_CODE:                             Insns.              (line  298)
+* INSN_DELETED_P:                        Flags.              (line   44)
+* INSN_FROM_TARGET_P:                    Flags.              (line   49)
+* insn_list:                             Insns.              (line  545)
+* INSN_REFERENCES_ARE_DELAYED:           Misc.               (line  480)
+* INSN_SETS_ARE_DELAYED:                 Misc.               (line  469)
+* INSN_UID:                              Insns.              (line   23)
+* INSN_VAR_LOCATION:                     Insns.              (line  239)
+* insns:                                 Insns.              (line    6)
+* insns, generating:                     RTL Template.       (line    6)
+* insns, recognizing:                    RTL Template.       (line    6)
+* instruction attributes:                Insn Attributes.    (line    6)
+* instruction latency time:              Processor pipeline description.
+                                                             (line    6)
+* instruction patterns:                  Patterns.           (line    6)
+* instruction splitting:                 Insn Splitting.     (line    6)
+* insv instruction pattern:              Standard Names.     (line  893)
+* INT16_TYPE:                            Type Layout.        (line  236)
+* INT32_TYPE:                            Type Layout.        (line  237)
+* INT64_TYPE:                            Type Layout.        (line  238)
+* INT8_TYPE:                             Type Layout.        (line  235)
+* INT_FAST16_TYPE:                       Type Layout.        (line  252)
+* INT_FAST32_TYPE:                       Type Layout.        (line  253)
+* INT_FAST64_TYPE:                       Type Layout.        (line  254)
+* INT_FAST8_TYPE:                        Type Layout.        (line  251)
+* INT_LEAST16_TYPE:                      Type Layout.        (line  244)
+* INT_LEAST32_TYPE:                      Type Layout.        (line  245)
+* INT_LEAST64_TYPE:                      Type Layout.        (line  246)
+* INT_LEAST8_TYPE:                       Type Layout.        (line  243)
+* INT_TYPE_SIZE:                         Type Layout.        (line   12)
+* INTEGER_CST:                           Constant expressions.
+                                                             (line    6)
+* INTEGER_TYPE:                          Types.              (line    6)
+* Interdependence of Patterns:           Dependent Patterns. (line    6)
+* interfacing to GCC output:             Interface.          (line    6)
+* interlock delays:                      Processor pipeline description.
+                                                             (line    6)
+* intermediate representation lowering:  Parsing pass.       (line   14)
+* INTMAX_TYPE:                           Type Layout.        (line  212)
+* INTPTR_TYPE:                           Type Layout.        (line  259)
+* introduction:                          Top.                (line    6)
+* INVOKE__main:                          Macros for Initialization.
+                                                             (line   51)
+* ior:                                   Arithmetic.         (line  163)
+* ior and attributes:                    Expressions.        (line   50)
+* ior, canonicalization of:              Insn Canonicalizations.
+                                                             (line   52)
+* iorM3 instruction pattern:             Standard Names.     (line  222)
+* IRA_COVER_CLASSES:                     Register Classes.   (line  564)
+* IRA_HARD_REGNO_ADD_COST_MULTIPLIER:    Allocation Order.   (line   45)
+* IS_ASM_LOGICAL_LINE_SEPARATOR:         Data Output.        (line  132)
+* is_gimple_addressable:                 Logical Operators.  (line  115)
+* is_gimple_asm_val:                     Logical Operators.  (line  119)
+* is_gimple_assign:                      Logical Operators.  (line  151)
+* is_gimple_call:                        Logical Operators.  (line  154)
+* is_gimple_call_addr:                   Logical Operators.  (line  122)
+* is_gimple_constant:                    Logical Operators.  (line  130)
+* is_gimple_debug:                       Logical Operators.  (line  157)
+* is_gimple_ip_invariant:                Logical Operators.  (line  139)
+* is_gimple_ip_invariant_address:        Logical Operators.  (line  144)
+* is_gimple_mem_ref_addr:                Logical Operators.  (line  126)
+* is_gimple_min_invariant:               Logical Operators.  (line  133)
+* is_gimple_omp:                         GIMPLE_OMP_PARALLEL.
+                                                             (line   65)
+* is_gimple_val:                         Logical Operators.  (line  109)
+* iterators in .md files:                Iterators.          (line    6)
+* IV analysis on GIMPLE:                 Scalar evolutions.  (line    6)
+* IV analysis on RTL:                    loop-iv.            (line    6)
+* jump:                                  Flags.              (line  314)
+* jump instruction pattern:              Standard Names.     (line  969)
+* jump instruction patterns:             Jump Patterns.      (line    6)
+* jump instructions and set:             Side Effects.       (line   56)
+* jump, in call_insn:                    Flags.              (line  179)
+* jump, in insn:                         Flags.              (line  175)
+* jump, in mem:                          Flags.              (line   79)
+* JUMP_ALIGN:                            Alignment Output.   (line    9)
+* jump_insn:                             Insns.              (line   73)
+* jump_insn and /f:                      Flags.              (line  125)
+* jump_insn and /s:                      Flags.              (line   49)
+* jump_insn and /u:                      Flags.              (line   39)
+* jump_insn and /v:                      Flags.              (line   44)
+* JUMP_LABEL:                            Insns.              (line   80)
+* JUMP_TABLES_IN_TEXT_SECTION:           Sections.           (line  152)
+* Jumps:                                 Jumps.              (line    6)
+* LABEL_ALIGN:                           Alignment Output.   (line   58)
+* LABEL_ALIGN_AFTER_BARRIER:             Alignment Output.   (line   27)
+* LABEL_ALT_ENTRY_P:                     Insns.              (line  140)
+* LABEL_ALTERNATE_NAME:                  Edges.              (line  180)
+* LABEL_DECL:                            Declarations.       (line    6)
+* LABEL_KIND:                            Insns.              (line  140)
+* LABEL_NUSES:                           Insns.              (line  136)
+* LABEL_PRESERVE_P:                      Flags.              (line   59)
+* label_ref:                             Constants.          (line   86)
+* label_ref and /v:                      Flags.              (line   65)
+* label_ref, RTL sharing:                Sharing.            (line   35)
+* LABEL_REF_NONLOCAL_P:                  Flags.              (line   65)
+* lang_hooks.gimplify_expr:              Gimplification pass.
+                                                             (line   18)
+* lang_hooks.parse_file:                 Parsing pass.       (line    6)
+* language-dependent trees:              Language-dependent trees.
+                                                             (line    6)
+* language-independent intermediate representation: Parsing pass.
+                                                             (line   14)
+* large return values:                   Aggregate Return.   (line    6)
+* LARGEST_EXPONENT_IS_NORMAL:            Storage Layout.     (line  477)
+* LAST_STACK_REG:                        Stack Registers.    (line   31)
+* LAST_VIRTUAL_REGISTER:                 Regs and Memory.    (line   51)
+* lceilMN2:                              Standard Names.     (line  624)
+* LCSSA:                                 LCSSA.              (line    6)
+* LD_FINI_SWITCH:                        Macros for Initialization.
+                                                             (line   29)
+* LD_INIT_SWITCH:                        Macros for Initialization.
+                                                             (line   25)
+* LDD_SUFFIX:                            Macros for Initialization.
+                                                             (line  122)
+* le:                                    Comparisons.        (line   76)
+* le and attributes:                     Expressions.        (line   64)
+* LE_EXPR:                               Unary and Binary Expressions.
+                                                             (line    6)
+* leaf functions:                        Leaf Functions.     (line    6)
+* leaf_function_p:                       Standard Names.     (line 1040)
+* LEAF_REG_REMAP:                        Leaf Functions.     (line   39)
+* LEAF_REGISTERS:                        Leaf Functions.     (line   25)
+* left rotate:                           Arithmetic.         (line  195)
+* left shift:                            Arithmetic.         (line  173)
+* LEGITIMATE_CONSTANT_P:                 Addressing Modes.   (line  230)
+* LEGITIMATE_PIC_OPERAND_P:              PIC.                (line   32)
+* LEGITIMIZE_RELOAD_ADDRESS:             Addressing Modes.   (line  151)
+* length:                                GTY Options.        (line   50)
+* less than:                             Comparisons.        (line   68)
+* less than or equal:                    Comparisons.        (line   76)
+* leu:                                   Comparisons.        (line   76)
+* leu and attributes:                    Expressions.        (line   64)
+* lfloorMN2:                             Standard Names.     (line  619)
+* LIB2FUNCS_EXTRA:                       Target Fragment.    (line   11)
+* LIB_SPEC:                              Driver.             (line  108)
+* LIBCALL_VALUE:                         Scalar Return.      (line   56)
+* libgcc.a:                              Library Calls.      (line    6)
+* LIBGCC2_CFLAGS:                        Target Fragment.    (line    8)
+* LIBGCC2_HAS_DF_MODE:                   Type Layout.        (line  109)
+* LIBGCC2_HAS_TF_MODE:                   Type Layout.        (line  122)
+* LIBGCC2_HAS_XF_MODE:                   Type Layout.        (line  116)
+* LIBGCC2_LONG_DOUBLE_TYPE_SIZE:         Type Layout.        (line  103)
+* LIBGCC2_UNWIND_ATTRIBUTE:              Misc.               (line  950)
+* LIBGCC_SPEC:                           Driver.             (line  116)
+* library subroutine names:              Library Calls.      (line    6)
+* LIBRARY_PATH_ENV:                      Misc.               (line  520)
+* LIMIT_RELOAD_CLASS:                    Register Classes.   (line  298)
+* Linear loop transformations framework: Lambda.             (line    6)
+* LINK_COMMAND_SPEC:                     Driver.             (line  237)
+* LINK_EH_SPEC:                          Driver.             (line  143)
+* LINK_ELIMINATE_DUPLICATE_LDIRECTORIES: Driver.             (line  247)
+* LINK_GCC_C_SEQUENCE_SPEC:              Driver.             (line  233)
+* LINK_LIBGCC_SPECIAL_1:                 Driver.             (line  228)
+* LINK_SPEC:                             Driver.             (line  101)
+* list:                                  Containers.         (line    6)
+* Liveness representation:               Liveness information.
+                                                             (line    6)
+* lo_sum:                                Arithmetic.         (line   24)
+* load address instruction:              Simple Constraints. (line  164)
+* LOAD_EXTEND_OP:                        Misc.               (line   69)
+* load_multiple instruction pattern:     Standard Names.     (line  137)
+* LOCAL_ALIGNMENT:                       Storage Layout.     (line  242)
+* LOCAL_CLASS_P:                         Classes.            (line   73)
+* LOCAL_DECL_ALIGNMENT:                  Storage Layout.     (line  279)
+* LOCAL_INCLUDE_DIR:                     Driver.             (line  313)
+* LOCAL_LABEL_PREFIX:                    Instruction Output. (line  153)
+* LOCAL_REGNO:                           Register Basics.    (line  102)
+* LOG_LINKS:                             Insns.              (line  317)
+* Logical Operators:                     Logical Operators.  (line    6)
+* logical-and, bitwise:                  Arithmetic.         (line  158)
+* logM2 instruction pattern:             Standard Names.     (line  532)
+* LONG_ACCUM_TYPE_SIZE:                  Type Layout.        (line   93)
+* LONG_DOUBLE_TYPE_SIZE:                 Type Layout.        (line   58)
+* LONG_FRACT_TYPE_SIZE:                  Type Layout.        (line   73)
+* LONG_LONG_ACCUM_TYPE_SIZE:             Type Layout.        (line   98)
+* LONG_LONG_FRACT_TYPE_SIZE:             Type Layout.        (line   78)
+* LONG_LONG_TYPE_SIZE:                   Type Layout.        (line   33)
+* LONG_TYPE_SIZE:                        Type Layout.        (line   22)
+* longjmp and automatic variables:       Interface.          (line   52)
+* Loop analysis:                         Loop representation.
+                                                             (line    6)
+* Loop manipulation:                     Loop manipulation.  (line    6)
+* Loop querying:                         Loop querying.      (line    6)
+* Loop representation:                   Loop representation.
+                                                             (line    6)
+* Loop-closed SSA form:                  LCSSA.              (line    6)
+* LOOP_ALIGN:                            Alignment Output.   (line   41)
+* LOOP_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* looping instruction patterns:          Looping Patterns.   (line    6)
+* lowering, language-dependent intermediate representation: Parsing pass.
+                                                             (line   14)
+* lrintMN2:                              Standard Names.     (line  609)
+* lroundMN2:                             Standard Names.     (line  614)
+* LSHIFT_EXPR:                           Unary and Binary Expressions.
+                                                             (line    6)
+* lshiftrt:                              Arithmetic.         (line  190)
+* lshiftrt and attributes:               Expressions.        (line   64)
+* lshrM3 instruction pattern:            Standard Names.     (line  468)
+* lt:                                    Comparisons.        (line   68)
+* lt and attributes:                     Expressions.        (line   64)
+* LT_EXPR:                               Unary and Binary Expressions.
+                                                             (line    6)
+* LTGT_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* lto:                                   LTO.                (line    6)
+* ltrans:                                LTO.                (line    6)
+* ltu:                                   Comparisons.        (line   68)
+* m in constraint:                       Simple Constraints. (line   17)
+* machine attributes:                    Target Attributes.  (line    6)
+* machine description macros:            Target Macros.      (line    6)
+* machine descriptions:                  Machine Desc.       (line    6)
+* machine mode conversions:              Conversions.        (line    6)
+* machine modes:                         Machine Modes.      (line    6)
+* machine specific constraints:          Machine Constraints.
+                                                             (line    6)
+* machine-independent predicates:        Machine-Independent Predicates.
+                                                             (line    6)
+* macros, target description:            Target Macros.      (line    6)
+* maddMN4 instruction pattern:           Standard Names.     (line  391)
+* MAKE_DECL_ONE_ONLY:                    Label Output.       (line  238)
+* make_phi_node:                         GIMPLE_PHI.         (line    7)
+* make_safe_from:                        Expander Definitions.
+                                                             (line  148)
+* makefile fragment:                     Fragments.          (line    6)
+* makefile targets:                      Makefile.           (line    6)
+* MALLOC_ABI_ALIGNMENT:                  Storage Layout.     (line  167)
+* Manipulating GIMPLE statements:        Manipulating GIMPLE statements.
+                                                             (line    6)
+* mark_hook:                             GTY Options.        (line  166)
+* marking roots:                         GGC Roots.          (line    6)
+* MASK_RETURN_ADDR:                      Exception Region Output.
+                                                             (line   35)
+* match_dup <1>:                         define_peephole2.   (line   28)
+* match_dup:                             RTL Template.       (line   73)
+* match_dup and attributes:              Insn Lengths.       (line   16)
+* match_op_dup:                          RTL Template.       (line  163)
+* match_operand:                         RTL Template.       (line   16)
+* match_operand and attributes:          Expressions.        (line   55)
+* match_operator:                        RTL Template.       (line   95)
+* match_par_dup:                         RTL Template.       (line  219)
+* match_parallel:                        RTL Template.       (line  172)
+* match_scratch <1>:                     define_peephole2.   (line   28)
+* match_scratch:                         RTL Template.       (line   58)
+* matching constraint:                   Simple Constraints. (line  142)
+* matching operands:                     Output Template.    (line   49)
+* math library:                          Soft float library routines.
+                                                             (line    6)
+* math, in RTL:                          Arithmetic.         (line    6)
+* MATH_LIBRARY:                          Misc.               (line  513)
+* matherr:                               Library Calls.      (line   44)
+* MAX_BITS_PER_WORD:                     Storage Layout.     (line   54)
+* MAX_CONDITIONAL_EXECUTE:               Misc.               (line  535)
+* MAX_FIXED_MODE_SIZE:                   Storage Layout.     (line  424)
+* MAX_MOVE_MAX:                          Misc.               (line  120)
+* MAX_OFILE_ALIGNMENT:                   Storage Layout.     (line  204)
+* MAX_REGS_PER_ADDRESS:                  Addressing Modes.   (line   43)
+* MAX_STACK_ALIGNMENT:                   Storage Layout.     (line  197)
+* maxM3 instruction pattern:             Standard Names.     (line  261)
+* may_trap_p, tree_could_trap_p:         Edges.              (line  115)
+* maybe_undef:                           GTY Options.        (line  174)
+* mcount:                                Profiling.          (line   12)
+* MD_CAN_REDIRECT_BRANCH:                Misc.               (line  672)
+* MD_EXEC_PREFIX:                        Driver.             (line  268)
+* MD_FALLBACK_FRAME_STATE_FOR:           Exception Handling. (line   98)
+* MD_HANDLE_UNWABI:                      Exception Handling. (line  118)
+* MD_STARTFILE_PREFIX:                   Driver.             (line  296)
+* MD_STARTFILE_PREFIX_1:                 Driver.             (line  301)
+* MD_UNWIND_SUPPORT:                     Exception Handling. (line   94)
+* mem:                                   Regs and Memory.    (line  374)
+* mem and /c:                            Flags.              (line   99)
+* mem and /f:                            Flags.              (line  103)
+* mem and /i:                            Flags.              (line   85)
+* mem and /j:                            Flags.              (line   79)
+* mem and /s:                            Flags.              (line   70)
+* mem and /u:                            Flags.              (line  152)
+* mem and /v:                            Flags.              (line   94)
+* mem, RTL sharing:                      Sharing.            (line   40)
+* MEM_ADDR_SPACE:                        Special Accessors.  (line   39)
+* MEM_ALIAS_SET:                         Special Accessors.  (line    9)
+* MEM_ALIGN:                             Special Accessors.  (line   36)
+* MEM_EXPR:                              Special Accessors.  (line   20)
+* MEM_IN_STRUCT_P:                       Flags.              (line   70)
+* MEM_KEEP_ALIAS_SET_P:                  Flags.              (line   79)
+* MEM_NOTRAP_P:                          Flags.              (line   99)
+* MEM_OFFSET:                            Special Accessors.  (line   28)
+* MEM_POINTER:                           Flags.              (line  103)
+* MEM_READONLY_P:                        Flags.              (line  152)
+* MEM_REF:                               Storage References. (line    6)
+* MEM_SCALAR_P:                          Flags.              (line   85)
+* MEM_SIZE:                              Special Accessors.  (line   31)
+* MEM_VOLATILE_P:                        Flags.              (line   94)
+* MEMBER_TYPE_FORCES_BLK:                Storage Layout.     (line  404)
+* memory model:                          Memory model.       (line    6)
+* memory reference, nonoffsettable:      Simple Constraints. (line  256)
+* memory references in constraints:      Simple Constraints. (line   17)
+* memory_barrier instruction pattern:    Standard Names.     (line 1422)
+* MEMORY_MOVE_COST:                      Costs.              (line   54)
+* memory_operand:                        Machine-Independent Predicates.
+                                                             (line   58)
+* METHOD_TYPE:                           Types.              (line    6)
+* MIN_UNITS_PER_WORD:                    Storage Layout.     (line   64)
+* MINIMUM_ALIGNMENT:                     Storage Layout.     (line  292)
+* MINIMUM_ATOMIC_ALIGNMENT:              Storage Layout.     (line  175)
+* minM3 instruction pattern:             Standard Names.     (line  261)
+* minus:                                 Arithmetic.         (line   36)
+* minus and attributes:                  Expressions.        (line   64)
+* minus, canonicalization of:            Insn Canonicalizations.
+                                                             (line   27)
+* MINUS_EXPR:                            Unary and Binary Expressions.
+                                                             (line    6)
+* MIPS coprocessor-definition macros:    MIPS Coprocessors.  (line    6)
+* mod:                                   Arithmetic.         (line  136)
+* mod and attributes:                    Expressions.        (line   64)
+* mode classes:                          Machine Modes.      (line  219)
+* mode iterators in .md files:           Mode Iterators.     (line    6)
+* mode switching:                        Mode Switching.     (line    6)
+* MODE_ACCUM:                            Machine Modes.      (line  249)
+* MODE_AFTER:                            Mode Switching.     (line   49)
+* MODE_BASE_REG_CLASS:                   Register Classes.   (line  114)
+* MODE_BASE_REG_REG_CLASS:               Register Classes.   (line  120)
+* MODE_CC <1>:                           MODE_CC Condition Codes.
+                                                             (line    6)
+* MODE_CC:                               Machine Modes.      (line  268)
+* MODE_CODE_BASE_REG_CLASS:              Register Classes.   (line  127)
+* MODE_COMPLEX_FLOAT:                    Machine Modes.      (line  260)
+* MODE_COMPLEX_INT:                      Machine Modes.      (line  257)
+* MODE_DECIMAL_FLOAT:                    Machine Modes.      (line  237)
+* MODE_ENTRY:                            Mode Switching.     (line   54)
+* MODE_EXIT:                             Mode Switching.     (line   60)
+* MODE_FLOAT:                            Machine Modes.      (line  233)
+* MODE_FRACT:                            Machine Modes.      (line  241)
+* MODE_FUNCTION:                         Machine Modes.      (line  264)
+* MODE_INT:                              Machine Modes.      (line  225)
+* MODE_NEEDED:                           Mode Switching.     (line   42)
+* MODE_PARTIAL_INT:                      Machine Modes.      (line  229)
+* MODE_PRIORITY_TO_MODE:                 Mode Switching.     (line   66)
+* MODE_RANDOM:                           Machine Modes.      (line  273)
+* MODE_UACCUM:                           Machine Modes.      (line  253)
+* MODE_UFRACT:                           Machine Modes.      (line  245)
+* MODES_TIEABLE_P:                       Values in Registers.
+                                                             (line  129)
+* modifiers in constraints:              Modifiers.          (line    6)
+* MODIFY_EXPR:                           Unary and Binary Expressions.
+                                                             (line    6)
+* MODIFY_JNI_METHOD_CALL:                Misc.               (line  750)
+* modM3 instruction pattern:             Standard Names.     (line  222)
+* modulo scheduling:                     RTL passes.         (line  131)
+* MOVE_BY_PIECES_P:                      Costs.              (line  165)
+* MOVE_MAX:                              Misc.               (line  115)
+* MOVE_MAX_PIECES:                       Costs.              (line  171)
+* MOVE_RATIO:                            Costs.              (line  149)
+* movM instruction pattern:              Standard Names.     (line   11)
+* movmemM instruction pattern:           Standard Names.     (line  681)
+* movmisalignM instruction pattern:      Standard Names.     (line  126)
+* movMODEcc instruction pattern:         Standard Names.     (line  904)
+* movstr instruction pattern:            Standard Names.     (line  716)
+* movstrictM instruction pattern:        Standard Names.     (line  120)
+* msubMN4 instruction pattern:           Standard Names.     (line  414)
+* mulhisi3 instruction pattern:          Standard Names.     (line  367)
+* mulM3 instruction pattern:             Standard Names.     (line  222)
+* mulqihi3 instruction pattern:          Standard Names.     (line  371)
+* mulsidi3 instruction pattern:          Standard Names.     (line  371)
+* mult:                                  Arithmetic.         (line   92)
+* mult and attributes:                   Expressions.        (line   64)
+* mult, canonicalization of:             Insn Canonicalizations.
+                                                             (line   27)
+* MULT_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* MULTIARCH_DIRNAME:                     Target Fragment.    (line  145)
+* MULTILIB_DEFAULTS:                     Driver.             (line  253)
+* MULTILIB_DIRNAMES:                     Target Fragment.    (line   64)
+* MULTILIB_EXCEPTIONS:                   Target Fragment.    (line   90)
+* MULTILIB_EXTRA_OPTS:                   Target Fragment.    (line  102)
+* MULTILIB_MATCHES:                      Target Fragment.    (line   83)
+* MULTILIB_OPTIONS:                      Target Fragment.    (line   44)
+* MULTILIB_OSDIRNAMES:                   Target Fragment.    (line  114)
+* multiple alternative constraints:      Multi-Alternative.  (line    6)
+* MULTIPLE_SYMBOL_SPACES:                Misc.               (line  493)
+* multiplication:                        Arithmetic.         (line   92)
+* multiplication with signed saturation: Arithmetic.         (line   92)
+* multiplication with unsigned saturation: Arithmetic.       (line   92)
+* n in constraint:                       Simple Constraints. (line   75)
+* N_REG_CLASSES:                         Register Classes.   (line   78)
+* name:                                  Identifiers.        (line    6)
+* named address spaces:                  Named Address Spaces.
+                                                             (line    6)
+* named patterns and conditions:         Patterns.           (line   47)
+* names, pattern:                        Standard Names.     (line    6)
+* namespace, scope:                      Namespaces.         (line    6)
+* NAMESPACE_DECL <1>:                    Namespaces.         (line    6)
+* NAMESPACE_DECL:                        Declarations.       (line    6)
+* NATIVE_SYSTEM_HEADER_DIR:              Target Fragment.    (line  109)
+* ne:                                    Comparisons.        (line   56)
+* ne and attributes:                     Expressions.        (line   64)
+* NE_EXPR:                               Unary and Binary Expressions.
+                                                             (line    6)
+* nearbyintM2 instruction pattern:       Standard Names.     (line  591)
+* neg:                                   Arithmetic.         (line   81)
+* neg and attributes:                    Expressions.        (line   64)
+* neg, canonicalization of:              Insn Canonicalizations.
+                                                             (line   27)
+* NEGATE_EXPR:                           Unary and Binary Expressions.
+                                                             (line    6)
+* negation:                              Arithmetic.         (line   81)
+* negation with signed saturation:       Arithmetic.         (line   81)
+* negation with unsigned saturation:     Arithmetic.         (line   81)
+* negM2 instruction pattern:             Standard Names.     (line  476)
+* nested functions, trampolines for:     Trampolines.        (line    6)
+* nested_ptr:                            GTY Options.        (line  181)
+* next_bb, prev_bb, FOR_EACH_BB:         Basic Blocks.       (line   10)
+* NEXT_INSN:                             Insns.              (line   30)
+* NEXT_OBJC_RUNTIME:                     Library Calls.      (line   80)
+* nil:                                   RTL Objects.        (line   73)
+* NM_FLAGS:                              Macros for Initialization.
+                                                             (line  111)
+* NO_DBX_BNSYM_ENSYM:                    DBX Hooks.          (line   39)
+* NO_DBX_FUNCTION_END:                   DBX Hooks.          (line   33)
+* NO_DBX_GCC_MARKER:                     File Names and DBX. (line   28)
+* NO_DBX_MAIN_SOURCE_DIRECTORY:          File Names and DBX. (line   23)
+* NO_DOLLAR_IN_LABEL:                    Misc.               (line  457)
+* NO_DOT_IN_LABEL:                       Misc.               (line  463)
+* NO_FUNCTION_CSE:                       Costs.              (line  261)
+* NO_IMPLICIT_EXTERN_C:                  Misc.               (line  376)
+* NO_PROFILE_COUNTERS:                   Profiling.          (line   28)
+* NO_REGS:                               Register Classes.   (line   17)
+* NON_LVALUE_EXPR:                       Unary and Binary Expressions.
+                                                             (line    6)
+* nondeterministic finite state automaton: Processor pipeline description.
+                                                             (line  301)
+* nonimmediate_operand:                  Machine-Independent Predicates.
+                                                             (line  101)
+* nonlocal goto handler:                 Edges.              (line  171)
+* nonlocal_goto instruction pattern:     Standard Names.     (line 1262)
+* nonlocal_goto_receiver instruction pattern: Standard Names.
+                                                             (line 1279)
+* nonmemory_operand:                     Machine-Independent Predicates.
+                                                             (line   97)
+* nonoffsettable memory reference:       Simple Constraints. (line  256)
+* nop instruction pattern:               Standard Names.     (line 1073)
+* NOP_EXPR:                              Unary and Binary Expressions.
+                                                             (line    6)
+* normal predicates:                     Predicates.         (line   31)
+* not:                                   Arithmetic.         (line  154)
+* not and attributes:                    Expressions.        (line   50)
+* not equal:                             Comparisons.        (line   56)
+* not, canonicalization of:              Insn Canonicalizations.
+                                                             (line   27)
+* note:                                  Insns.              (line  168)
+* note and /i:                           Flags.              (line   59)
+* note and /v:                           Flags.              (line   44)
+* NOTE_INSN_BASIC_BLOCK, CODE_LABEL, notes: Basic Blocks.    (line   41)
+* NOTE_INSN_BLOCK_BEG:                   Insns.              (line  193)
+* NOTE_INSN_BLOCK_END:                   Insns.              (line  193)
+* NOTE_INSN_DELETED:                     Insns.              (line  183)
+* NOTE_INSN_DELETED_LABEL:               Insns.              (line  188)
+* NOTE_INSN_EH_REGION_BEG:               Insns.              (line  199)
+* NOTE_INSN_EH_REGION_END:               Insns.              (line  199)
+* NOTE_INSN_FUNCTION_BEG:                Insns.              (line  223)
+* NOTE_INSN_LOOP_BEG:                    Insns.              (line  207)
+* NOTE_INSN_LOOP_CONT:                   Insns.              (line  213)
+* NOTE_INSN_LOOP_END:                    Insns.              (line  207)
+* NOTE_INSN_LOOP_VTOP:                   Insns.              (line  217)
+* NOTE_INSN_VAR_LOCATION:                Insns.              (line  227)
+* NOTE_LINE_NUMBER:                      Insns.              (line  168)
+* NOTE_SOURCE_FILE:                      Insns.              (line  168)
+* NOTE_VAR_LOCATION:                     Insns.              (line  227)
+* NOTICE_UPDATE_CC:                      CC0 Condition Codes.
+                                                             (line   31)
+* NUM_MACHINE_MODES:                     Machine Modes.      (line  286)
+* NUM_MODES_FOR_MODE_SWITCHING:          Mode Switching.     (line   30)
+* Number of iterations analysis:         Number of iterations.
+                                                             (line    6)
+* o in constraint:                       Simple Constraints. (line   23)
+* OBJC_GEN_METHOD_LABEL:                 Label Output.       (line  440)
+* OBJC_JBLEN:                            Misc.               (line  945)
+* OBJECT_FORMAT_COFF:                    Macros for Initialization.
+                                                             (line   97)
+* OFFSET_TYPE:                           Types.              (line    6)
+* offsettable address:                   Simple Constraints. (line   23)
+* OImode:                                Machine Modes.      (line   51)
+* Omega a solver for linear programming problems: Omega.     (line    6)
+* OMP_ATOMIC:                            OpenMP.             (line    6)
+* OMP_CLAUSE:                            OpenMP.             (line    6)
+* OMP_CONTINUE:                          OpenMP.             (line    6)
+* OMP_CRITICAL:                          OpenMP.             (line    6)
+* OMP_FOR:                               OpenMP.             (line    6)
+* OMP_MASTER:                            OpenMP.             (line    6)
+* OMP_ORDERED:                           OpenMP.             (line    6)
+* OMP_PARALLEL:                          OpenMP.             (line    6)
+* OMP_RETURN:                            OpenMP.             (line    6)
+* OMP_SECTION:                           OpenMP.             (line    6)
+* OMP_SECTIONS:                          OpenMP.             (line    6)
+* OMP_SINGLE:                            OpenMP.             (line    6)
+* one_cmplM2 instruction pattern:        Standard Names.     (line  678)
+* operand access:                        Accessors.          (line    6)
+* Operand Access Routines:               SSA Operands.       (line  119)
+* operand constraints:                   Constraints.        (line    6)
+* Operand Iterators:                     SSA Operands.       (line  119)
+* operand predicates:                    Predicates.         (line    6)
+* operand substitution:                  Output Template.    (line    6)
+* operands <1>:                          Patterns.           (line   53)
+* operands:                              SSA Operands.       (line    6)
+* Operands:                              Operands.           (line    6)
+* operator predicates:                   Predicates.         (line    6)
+* optc-gen.awk:                          Options.            (line    6)
+* Optimization infrastructure for GIMPLE: Tree SSA.          (line    6)
+* OPTIMIZE_MODE_SWITCHING:               Mode Switching.     (line    9)
+* option specification files:            Options.            (line    6)
+* OPTION_DEFAULT_SPECS:                  Driver.             (line   26)
+* optional hardware or system features:  Run-time Target.    (line   59)
+* options, directory search:             Including Patterns. (line   44)
+* order of register allocation:          Allocation Order.   (line    6)
+* ordered_comparison_operator:           Machine-Independent Predicates.
+                                                             (line  116)
+* ORDERED_EXPR:                          Unary and Binary Expressions.
+                                                             (line    6)
+* Ordering of Patterns:                  Pattern Ordering.   (line    6)
+* ORIGINAL_REGNO:                        Special Accessors.  (line   44)
+* other register constraints:            Simple Constraints. (line  173)
+* OUTGOING_REG_PARM_STACK_SPACE:         Stack Arguments.    (line   74)
+* OUTGOING_REGNO:                        Register Basics.    (line   95)
+* output of assembler code:              File Framework.     (line    6)
+* output statements:                     Output Statement.   (line    6)
+* output templates:                      Output Template.    (line    6)
+* OUTPUT_ADDR_CONST_EXTRA:               Data Output.        (line   51)
+* output_asm_insn:                       Output Statement.   (line   53)
+* OUTPUT_QUOTED_STRING:                  File Framework.     (line  102)
+* OVERLAPPING_REGISTER_NAMES:            Instruction Output. (line   21)
+* OVERLOAD:                              Functions for C++.  (line    6)
+* OVERRIDE_ABI_FORMAT:                   Register Arguments. (line  140)
+* OVL_CURRENT:                           Functions for C++.  (line    6)
+* OVL_NEXT:                              Functions for C++.  (line    6)
+* p in constraint:                       Simple Constraints. (line  164)
+* PAD_VARARGS_DOWN:                      Register Arguments. (line  220)
+* parallel:                              Side Effects.       (line  204)
+* param_is:                              GTY Options.        (line  109)
+* parameters, c++ abi:                   C++ ABI.            (line    6)
+* parameters, miscellaneous:             Misc.               (line    6)
+* parameters, precompiled headers:       PCH Target.         (line    6)
+* paramN_is:                             GTY Options.        (line  127)
+* parity:                                Arithmetic.         (line  237)
+* parityM2 instruction pattern:          Standard Names.     (line  672)
+* PARM_BOUNDARY:                         Storage Layout.     (line  132)
+* PARM_DECL:                             Declarations.       (line    6)
+* PARSE_LDD_OUTPUT:                      Macros for Initialization.
+                                                             (line  127)
+* passes and files of the compiler:      Passes.             (line    6)
+* passing arguments:                     Interface.          (line   36)
+* PATH_SEPARATOR:                        Filesystem.         (line   31)
+* PATTERN:                               Insns.              (line  288)
+* pattern conditions:                    Patterns.           (line   43)
+* pattern names:                         Standard Names.     (line    6)
+* Pattern Ordering:                      Pattern Ordering.   (line    6)
+* patterns:                              Patterns.           (line    6)
+* pc:                                    Regs and Memory.    (line  361)
+* pc and attributes:                     Insn Lengths.       (line   20)
+* pc, RTL sharing:                       Sharing.            (line   25)
+* PC_REGNUM:                             Register Basics.    (line  109)
+* pc_rtx:                                Regs and Memory.    (line  366)
+* PCC_BITFIELD_TYPE_MATTERS:             Storage Layout.     (line  318)
+* PCC_STATIC_STRUCT_RETURN:              Aggregate Return.   (line   65)
+* PDImode:                               Machine Modes.      (line   40)
+* peephole optimization, RTL representation: Side Effects.   (line  238)
+* peephole optimizer definitions:        Peephole Definitions.
+                                                             (line    6)
+* per-function data:                     Per-Function Data.  (line    6)
+* percent sign:                          Output Template.    (line    6)
+* PHI nodes:                             SSA.                (line   31)
+* PHI_ARG_DEF:                           SSA.                (line   71)
+* PHI_ARG_EDGE:                          SSA.                (line   68)
+* PHI_ARG_ELT:                           SSA.                (line   63)
+* PHI_NUM_ARGS:                          SSA.                (line   59)
+* PHI_RESULT:                            SSA.                (line   56)
+* PIC:                                   PIC.                (line    6)
+* PIC_OFFSET_TABLE_REG_CALL_CLOBBERED:   PIC.                (line   26)
+* PIC_OFFSET_TABLE_REGNUM:               PIC.                (line   16)
+* pipeline hazard recognizer:            Processor pipeline description.
+                                                             (line    6)
+* Plugins:                               Plugins.            (line    6)
+* plus:                                  Arithmetic.         (line   14)
+* plus and attributes:                   Expressions.        (line   64)
+* plus, canonicalization of:             Insn Canonicalizations.
+                                                             (line   27)
+* PLUS_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* Pmode:                                 Misc.               (line  344)
+* pmode_register_operand:                Machine-Independent Predicates.
+                                                             (line   35)
+* pointer:                               Types.              (line    6)
+* POINTER_PLUS_EXPR:                     Unary and Binary Expressions.
+                                                             (line    6)
+* POINTER_SIZE:                          Storage Layout.     (line   70)
+* POINTER_TYPE:                          Types.              (line    6)
+* POINTERS_EXTEND_UNSIGNED:              Storage Layout.     (line   76)
+* pop_operand:                           Machine-Independent Predicates.
+                                                             (line   88)
+* popcount:                              Arithmetic.         (line  233)
+* popcountM2 instruction pattern:        Standard Names.     (line  666)
+* portability:                           Portability.        (line    6)
+* position independent code:             PIC.                (line    6)
+* post_dec:                              Incdec.             (line   25)
+* post_inc:                              Incdec.             (line   30)
+* post_modify:                           Incdec.             (line   33)
+* POSTDECREMENT_EXPR:                    Unary and Binary Expressions.
+                                                             (line    6)
+* POSTINCREMENT_EXPR:                    Unary and Binary Expressions.
+                                                             (line    6)
+* POWI_MAX_MULTS:                        Misc.               (line  813)
+* powM3 instruction pattern:             Standard Names.     (line  540)
+* pragma:                                Misc.               (line  381)
+* pre_dec:                               Incdec.             (line    8)
+* PRE_GCC3_DWARF_FRAME_REGISTERS:        Frame Registers.    (line  127)
+* pre_inc:                               Incdec.             (line   22)
+* pre_modify:                            Incdec.             (line   51)
+* PREDECREMENT_EXPR:                     Unary and Binary Expressions.
+                                                             (line    6)
+* predefined macros:                     Run-time Target.    (line    6)
+* predicates:                            Predicates.         (line    6)
+* predicates and machine modes:          Predicates.         (line   31)
+* predication <1>:                       Cond Exec Macros.   (line    6)
+* predication:                           Conditional Execution.
+                                                             (line    6)
+* predict.def:                           Profile information.
+                                                             (line   24)
+* PREFERRED_DEBUGGING_TYPE:              All Debuggers.      (line   42)
+* PREFERRED_OUTPUT_RELOAD_CLASS:         Register Classes.   (line  278)
+* PREFERRED_RELOAD_CLASS:                Register Classes.   (line  243)
+* PREFERRED_STACK_BOUNDARY:              Storage Layout.     (line  146)
+* prefetch:                              Side Effects.       (line  312)
+* prefetch and /v:                       Flags.              (line  232)
+* prefetch instruction pattern:          Standard Names.     (line 1401)
+* PREFETCH_SCHEDULE_BARRIER_P:           Flags.              (line  232)
+* PREINCREMENT_EXPR:                     Unary and Binary Expressions.
+                                                             (line    6)
+* presence_set:                          Processor pipeline description.
+                                                             (line  220)
+* preserving SSA form:                   SSA.                (line   76)
+* preserving virtual SSA form:           SSA.                (line  186)
+* prev_active_insn:                      define_peephole.    (line   60)
+* PREV_INSN:                             Insns.              (line   26)
+* PRINT_OPERAND:                         Instruction Output. (line   96)
+* PRINT_OPERAND_ADDRESS:                 Instruction Output. (line  124)
+* PRINT_OPERAND_PUNCT_VALID_P:           Instruction Output. (line  117)
+* probe_stack instruction pattern:       Standard Names.     (line 1254)
+* processor functional units:            Processor pipeline description.
+                                                             (line    6)
+* processor pipeline description:        Processor pipeline description.
+                                                             (line    6)
+* product:                               Arithmetic.         (line   92)
+* profile feedback:                      Profile information.
+                                                             (line   14)
+* profile representation:                Profile information.
+                                                             (line    6)
+* PROFILE_BEFORE_PROLOGUE:               Profiling.          (line   35)
+* PROFILE_HOOK:                          Profiling.          (line   23)
+* profiling, code generation:            Profiling.          (line    6)
+* program counter:                       Regs and Memory.    (line  362)
+* prologue:                              Function Entry.     (line    6)
+* prologue instruction pattern:          Standard Names.     (line 1345)
+* PROMOTE_MODE:                          Storage Layout.     (line   87)
+* pseudo registers:                      Regs and Memory.    (line    9)
+* PSImode:                               Machine Modes.      (line   32)
+* PTRDIFF_TYPE:                          Type Layout.        (line  183)
+* purge_dead_edges <1>:                  Maintaining the CFG.
+                                                             (line   93)
+* purge_dead_edges:                      Edges.              (line  104)
+* push address instruction:              Simple Constraints. (line  164)
+* PUSH_ARGS:                             Stack Arguments.    (line   18)
+* PUSH_ARGS_REVERSED:                    Stack Arguments.    (line   26)
+* push_operand:                          Machine-Independent Predicates.
+                                                             (line   81)
+* push_reload:                           Addressing Modes.   (line  175)
+* PUSH_ROUNDING:                         Stack Arguments.    (line   32)
+* pushM1 instruction pattern:            Standard Names.     (line  209)
+* PUT_CODE:                              RTL Objects.        (line   47)
+* PUT_MODE:                              Machine Modes.      (line  283)
+* PUT_REG_NOTE_KIND:                     Insns.              (line  350)
+* PUT_SDB_:                              SDB and DWARF.      (line  101)
+* QCmode:                                Machine Modes.      (line  197)
+* QFmode:                                Machine Modes.      (line   54)
+* QImode:                                Machine Modes.      (line   25)
+* QImode, in insn:                       Insns.              (line  272)
+* QQmode:                                Machine Modes.      (line  103)
+* qualified type <1>:                    Types for C++.      (line    6)
+* qualified type:                        Types.              (line    6)
+* querying function unit reservations:   Processor pipeline description.
+                                                             (line   90)
+* question mark:                         Multi-Alternative.  (line   41)
+* quotient:                              Arithmetic.         (line  116)
+* r in constraint:                       Simple Constraints. (line   66)
+* RANGE_TEST_NON_SHORT_CIRCUIT:          Costs.              (line  265)
+* RDIV_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* READONLY_DATA_SECTION_ASM_OP:          Sections.           (line   63)
+* real operands:                         SSA Operands.       (line    6)
+* REAL_ARITHMETIC:                       Floating Point.     (line   66)
+* REAL_CST:                              Constant expressions.
+                                                             (line    6)
+* REAL_LIBGCC_SPEC:                      Driver.             (line  125)
+* REAL_NM_FILE_NAME:                     Macros for Initialization.
+                                                             (line  106)
+* REAL_TYPE:                             Types.              (line    6)
+* REAL_VALUE_ABS:                        Floating Point.     (line   82)
+* REAL_VALUE_ATOF:                       Floating Point.     (line   50)
+* REAL_VALUE_FIX:                        Floating Point.     (line   41)
+* REAL_VALUE_FROM_INT:                   Floating Point.     (line   99)
+* REAL_VALUE_ISINF:                      Floating Point.     (line   59)
+* REAL_VALUE_ISNAN:                      Floating Point.     (line   62)
+* REAL_VALUE_NEGATE:                     Floating Point.     (line   79)
+* REAL_VALUE_NEGATIVE:                   Floating Point.     (line   56)
+* REAL_VALUE_TO_INT:                     Floating Point.     (line   93)
+* REAL_VALUE_TO_TARGET_DECIMAL128:       Data Output.        (line  156)
+* REAL_VALUE_TO_TARGET_DECIMAL32:        Data Output.        (line  154)
+* REAL_VALUE_TO_TARGET_DECIMAL64:        Data Output.        (line  155)
+* REAL_VALUE_TO_TARGET_DOUBLE:           Data Output.        (line  152)
+* REAL_VALUE_TO_TARGET_LONG_DOUBLE:      Data Output.        (line  153)
+* REAL_VALUE_TO_TARGET_SINGLE:           Data Output.        (line  151)
+* REAL_VALUE_TRUNCATE:                   Floating Point.     (line   86)
+* REAL_VALUE_TYPE:                       Floating Point.     (line   26)
+* REAL_VALUE_UNSIGNED_FIX:               Floating Point.     (line   45)
+* REAL_VALUES_EQUAL:                     Floating Point.     (line   32)
+* REAL_VALUES_LESS:                      Floating Point.     (line   38)
+* REALPART_EXPR:                         Unary and Binary Expressions.
+                                                             (line    6)
+* recog_data.operand:                    Instruction Output. (line   54)
+* recognizing insns:                     RTL Template.       (line    6)
+* RECORD_TYPE <1>:                       Classes.            (line    6)
+* RECORD_TYPE:                           Types.              (line    6)
+* redirect_edge_and_branch:              Profile information.
+                                                             (line   71)
+* redirect_edge_and_branch, redirect_jump: Maintaining the CFG.
+                                                             (line  103)
+* reduc_smax_M instruction pattern:      Standard Names.     (line  267)
+* reduc_smin_M instruction pattern:      Standard Names.     (line  267)
+* reduc_splus_M instruction pattern:     Standard Names.     (line  279)
+* reduc_umax_M instruction pattern:      Standard Names.     (line  273)
+* reduc_umin_M instruction pattern:      Standard Names.     (line  273)
+* reduc_uplus_M instruction pattern:     Standard Names.     (line  285)
+* reference:                             Types.              (line    6)
+* REFERENCE_TYPE:                        Types.              (line    6)
+* reg:                                   Regs and Memory.    (line    9)
+* reg and /f:                            Flags.              (line  112)
+* reg and /i:                            Flags.              (line  107)
+* reg and /v:                            Flags.              (line  116)
+* reg, RTL sharing:                      Sharing.            (line   17)
+* REG_ALLOC_ORDER:                       Allocation Order.   (line    9)
+* REG_BR_PRED:                           Insns.              (line  531)
+* REG_BR_PROB:                           Insns.              (line  525)
+* REG_BR_PROB_BASE, BB_FREQ_BASE, count: Profile information.
+                                                             (line   82)
+* REG_BR_PROB_BASE, EDGE_FREQUENCY:      Profile information.
+                                                             (line   52)
+* REG_CC_SETTER:                         Insns.              (line  496)
+* REG_CC_USER:                           Insns.              (line  496)
+* REG_CLASS_CONTENTS:                    Register Classes.   (line   88)
+* reg_class_contents:                    Register Basics.    (line   59)
+* REG_CLASS_FROM_CONSTRAINT:             Old Constraints.    (line   35)
+* REG_CLASS_FROM_LETTER:                 Old Constraints.    (line   27)
+* REG_CLASS_NAMES:                       Register Classes.   (line   83)
+* REG_CROSSING_JUMP:                     Insns.              (line  409)
+* REG_DEAD:                              Insns.              (line  361)
+* REG_DEAD, REG_UNUSED:                  Liveness information.
+                                                             (line   32)
+* REG_DEP_ANTI:                          Insns.              (line  518)
+* REG_DEP_OUTPUT:                        Insns.              (line  514)
+* REG_DEP_TRUE:                          Insns.              (line  511)
+* REG_EH_REGION, EDGE_ABNORMAL_CALL:     Edges.              (line  110)
+* REG_EQUAL:                             Insns.              (line  424)
+* REG_EQUIV:                             Insns.              (line  424)
+* REG_EXPR:                              Special Accessors.  (line   50)
+* REG_FRAME_RELATED_EXPR:                Insns.              (line  537)
+* REG_FUNCTION_VALUE_P:                  Flags.              (line  107)
+* REG_INC:                               Insns.              (line  377)
+* reg_label and /v:                      Flags.              (line   65)
+* REG_LABEL_OPERAND:                     Insns.              (line  391)
+* REG_LABEL_TARGET:                      Insns.              (line  400)
+* reg_names <1>:                         Instruction Output. (line  108)
+* reg_names:                             Register Basics.    (line   59)
+* REG_NONNEG:                            Insns.              (line  383)
+* REG_NOTE_KIND:                         Insns.              (line  350)
+* REG_NOTES:                             Insns.              (line  324)
+* REG_OFFSET:                            Special Accessors.  (line   54)
+* REG_OK_STRICT:                         Addressing Modes.   (line  100)
+* REG_PARM_STACK_SPACE:                  Stack Arguments.    (line   59)
+* REG_PARM_STACK_SPACE, and FUNCTION_ARG: Register Arguments.
+                                                             (line   52)
+* REG_POINTER:                           Flags.              (line  112)
+* REG_SETJMP:                            Insns.              (line  418)
+* REG_UNUSED:                            Insns.              (line  370)
+* REG_USERVAR_P:                         Flags.              (line  116)
+* regclass_for_constraint:               C Constraint Interface.
+                                                             (line   60)
+* register allocation order:             Allocation Order.   (line    6)
+* register class definitions:            Register Classes.   (line    6)
+* register class preference constraints: Class Preferences.  (line    6)
+* register pairs:                        Values in Registers.
+                                                             (line   69)
+* Register Transfer Language (RTL):      RTL.                (line    6)
+* register usage:                        Registers.          (line    6)
+* REGISTER_MOVE_COST:                    Costs.              (line   10)
+* REGISTER_NAMES:                        Instruction Output. (line    9)
+* register_operand:                      Machine-Independent Predicates.
+                                                             (line   30)
+* REGISTER_PREFIX:                       Instruction Output. (line  152)
+* REGISTER_TARGET_PRAGMAS:               Misc.               (line  382)
+* registers arguments:                   Register Arguments. (line    6)
+* registers in constraints:              Simple Constraints. (line   66)
+* REGMODE_NATURAL_SIZE:                  Values in Registers.
+                                                             (line   50)
+* REGNO_MODE_CODE_OK_FOR_BASE_P:         Register Classes.   (line  169)
+* REGNO_MODE_OK_FOR_BASE_P:              Register Classes.   (line  146)
+* REGNO_MODE_OK_FOR_REG_BASE_P:          Register Classes.   (line  156)
+* REGNO_OK_FOR_BASE_P:                   Register Classes.   (line  142)
+* REGNO_OK_FOR_INDEX_P:                  Register Classes.   (line  180)
+* REGNO_REG_CLASS:                       Register Classes.   (line  103)
+* regs_ever_live:                        Function Entry.     (line   21)
+* regular expressions:                   Processor pipeline description.
+                                                             (line    6)
+* relative costs:                        Costs.              (line    6)
+* RELATIVE_PREFIX_NOT_LINKDIR:           Driver.             (line  263)
+* reload_completed:                      Standard Names.     (line 1040)
+* reload_in instruction pattern:         Standard Names.     (line   99)
+* reload_in_progress:                    Standard Names.     (line   57)
+* reload_out instruction pattern:        Standard Names.     (line   99)
+* reloading:                             RTL passes.         (line  182)
+* remainder:                             Arithmetic.         (line  136)
+* remainderM3 instruction pattern:       Standard Names.     (line  499)
+* reorder:                               GTY Options.        (line  205)
+* representation of RTL:                 RTL.                (line    6)
+* reservation delays:                    Processor pipeline description.
+                                                             (line    6)
+* rest_of_decl_compilation:              Parsing pass.       (line   52)
+* rest_of_type_compilation:              Parsing pass.       (line   52)
+* restore_stack_block instruction pattern: Standard Names.   (line 1174)
+* restore_stack_function instruction pattern: Standard Names.
+                                                             (line 1174)
+* restore_stack_nonlocal instruction pattern: Standard Names.
+                                                             (line 1174)
+* RESULT_DECL:                           Declarations.       (line    6)
+* return:                                Side Effects.       (line   72)
+* return instruction pattern:            Standard Names.     (line 1027)
+* return values in registers:            Scalar Return.      (line    6)
+* RETURN_ADDR_IN_PREVIOUS_FRAME:         Frame Layout.       (line  135)
+* RETURN_ADDR_OFFSET:                    Exception Handling. (line   60)
+* RETURN_ADDR_RTX:                       Frame Layout.       (line  124)
+* RETURN_ADDRESS_POINTER_REGNUM:         Frame Registers.    (line   65)
+* RETURN_EXPR:                           Statements for C++. (line    6)
+* RETURN_STMT:                           Statements for C++. (line    6)
+* return_val:                            Flags.              (line  299)
+* return_val, in call_insn:              Flags.              (line   24)
+* return_val, in mem:                    Flags.              (line   85)
+* return_val, in reg:                    Flags.              (line  107)
+* return_val, in symbol_ref:             Flags.              (line  220)
+* returning aggregate values:            Aggregate Return.   (line    6)
+* returning structures and unions:       Interface.          (line   10)
+* reverse probability:                   Profile information.
+                                                             (line   66)
+* REVERSE_CONDEXEC_PREDICATES_P:         Cond Exec Macros.   (line   11)
+* REVERSE_CONDITION:                     MODE_CC Condition Codes.
+                                                             (line   87)
+* REVERSIBLE_CC_MODE:                    MODE_CC Condition Codes.
+                                                             (line   73)
+* right rotate:                          Arithmetic.         (line  195)
+* right shift:                           Arithmetic.         (line  190)
+* rintM2 instruction pattern:            Standard Names.     (line  599)
+* RISC:                                  Processor pipeline description.
+                                                             (line    6)
+* roots, marking:                        GGC Roots.          (line    6)
+* rotate:                                Arithmetic.         (line  195)
+* rotatert:                              Arithmetic.         (line  195)
+* rotlM3 instruction pattern:            Standard Names.     (line  468)
+* rotrM3 instruction pattern:            Standard Names.     (line  468)
+* ROUND_DIV_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* ROUND_MOD_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* ROUND_TOWARDS_ZERO:                    Storage Layout.     (line  468)
+* ROUND_TYPE_ALIGN:                      Storage Layout.     (line  415)
+* roundM2 instruction pattern:           Standard Names.     (line  575)
+* RSHIFT_EXPR:                           Unary and Binary Expressions.
+                                                             (line    6)
+* RTL addition:                          Arithmetic.         (line   14)
+* RTL addition with signed saturation:   Arithmetic.         (line   14)
+* RTL addition with unsigned saturation: Arithmetic.         (line   14)
+* RTL classes:                           RTL Classes.        (line    6)
+* RTL comparison:                        Arithmetic.         (line   43)
+* RTL comparison operations:             Comparisons.        (line    6)
+* RTL constant expression types:         Constants.          (line    6)
+* RTL constants:                         Constants.          (line    6)
+* RTL declarations:                      RTL Declarations.   (line    6)
+* RTL difference:                        Arithmetic.         (line   36)
+* RTL expression:                        RTL Objects.        (line    6)
+* RTL expressions for arithmetic:        Arithmetic.         (line    6)
+* RTL format:                            RTL Classes.        (line   72)
+* RTL format characters:                 RTL Classes.        (line   77)
+* RTL function-call insns:               Calls.              (line    6)
+* RTL insn template:                     RTL Template.       (line    6)
+* RTL integers:                          RTL Objects.        (line    6)
+* RTL memory expressions:                Regs and Memory.    (line    6)
+* RTL object types:                      RTL Objects.        (line    6)
+* RTL postdecrement:                     Incdec.             (line    6)
+* RTL postincrement:                     Incdec.             (line    6)
+* RTL predecrement:                      Incdec.             (line    6)
+* RTL preincrement:                      Incdec.             (line    6)
+* RTL register expressions:              Regs and Memory.    (line    6)
+* RTL representation:                    RTL.                (line    6)
+* RTL side effect expressions:           Side Effects.       (line    6)
+* RTL strings:                           RTL Objects.        (line    6)
+* RTL structure sharing assumptions:     Sharing.            (line    6)
+* RTL subtraction:                       Arithmetic.         (line   36)
+* RTL subtraction with signed saturation: Arithmetic.        (line   36)
+* RTL subtraction with unsigned saturation: Arithmetic.      (line   36)
+* RTL sum:                               Arithmetic.         (line   14)
+* RTL vectors:                           RTL Objects.        (line    6)
+* RTL_CONST_CALL_P:                      Flags.              (line   19)
+* RTL_CONST_OR_PURE_CALL_P:              Flags.              (line   29)
+* RTL_LOOPING_CONST_OR_PURE_CALL_P:      Flags.              (line   33)
+* RTL_PURE_CALL_P:                       Flags.              (line   24)
+* RTX (See RTL):                         RTL Objects.        (line    6)
+* RTX codes, classes of:                 RTL Classes.        (line    6)
+* RTX_FRAME_RELATED_P:                   Flags.              (line  125)
+* run-time conventions:                  Interface.          (line    6)
+* run-time target specification:         Run-time Target.    (line    6)
+* s in constraint:                       Simple Constraints. (line  102)
+* same_type_p:                           Types.              (line   88)
+* SAmode:                                Machine Modes.      (line  148)
+* sat_fract:                             Conversions.        (line   90)
+* satfractMN2 instruction pattern:       Standard Names.     (line  856)
+* satfractunsMN2 instruction pattern:    Standard Names.     (line  869)
+* satisfies_constraint_:                 C Constraint Interface.
+                                                             (line   47)
+* SAVE_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* save_stack_block instruction pattern:  Standard Names.     (line 1174)
+* save_stack_function instruction pattern: Standard Names.   (line 1174)
+* save_stack_nonlocal instruction pattern: Standard Names.   (line 1174)
+* SBSS_SECTION_ASM_OP:                   Sections.           (line   77)
+* Scalar evolutions:                     Scalar evolutions.  (line    6)
+* scalars, returned as values:           Scalar Return.      (line    6)
+* SCHED_GROUP_P:                         Flags.              (line  166)
+* SCmode:                                Machine Modes.      (line  197)
+* scratch:                               Regs and Memory.    (line  298)
+* scratch operands:                      Regs and Memory.    (line  298)
+* scratch, RTL sharing:                  Sharing.            (line   35)
+* scratch_operand:                       Machine-Independent Predicates.
+                                                             (line   50)
+* SDATA_SECTION_ASM_OP:                  Sections.           (line   58)
+* SDB_ALLOW_FORWARD_REFERENCES:          SDB and DWARF.      (line  119)
+* SDB_ALLOW_UNKNOWN_REFERENCES:          SDB and DWARF.      (line  114)
+* SDB_DEBUGGING_INFO:                    SDB and DWARF.      (line    9)
+* SDB_DELIM:                             SDB and DWARF.      (line  107)
+* SDB_OUTPUT_SOURCE_LINE:                SDB and DWARF.      (line  124)
+* SDmode:                                Machine Modes.      (line   85)
+* sdot_prodM instruction pattern:        Standard Names.     (line  291)
+* search options:                        Including Patterns. (line   44)
+* SECONDARY_INPUT_RELOAD_CLASS:          Register Classes.   (line  394)
+* SECONDARY_MEMORY_NEEDED:               Register Classes.   (line  450)
+* SECONDARY_MEMORY_NEEDED_MODE:          Register Classes.   (line  469)
+* SECONDARY_MEMORY_NEEDED_RTX:           Register Classes.   (line  460)
+* SECONDARY_OUTPUT_RELOAD_CLASS:         Register Classes.   (line  395)
+* SECONDARY_RELOAD_CLASS:                Register Classes.   (line  393)
+* SELECT_CC_MODE:                        MODE_CC Condition Codes.
+                                                             (line    7)
+* sequence:                              Side Effects.       (line  254)
+* Sequence iterators:                    Sequence iterators. (line    6)
+* set:                                   Side Effects.       (line   15)
+* set and /f:                            Flags.              (line  125)
+* SET_ASM_OP:                            Label Output.       (line  407)
+* set_attr:                              Tagging Insns.      (line   31)
+* set_attr_alternative:                  Tagging Insns.      (line   49)
+* set_bb_seq:                            GIMPLE sequences.   (line   76)
+* SET_BY_PIECES_P:                       Costs.              (line  206)
+* SET_DEST:                              Side Effects.       (line   69)
+* SET_IS_RETURN_P:                       Flags.              (line  175)
+* SET_LABEL_KIND:                        Insns.              (line  140)
+* set_optab_libfunc:                     Library Calls.      (line   15)
+* SET_RATIO:                             Costs.              (line  194)
+* SET_SRC:                               Side Effects.       (line   69)
+* SET_TYPE_STRUCTURAL_EQUALITY:          Types.              (line    6)
+* setmemM instruction pattern:           Standard Names.     (line  724)
+* SETUP_FRAME_ADDRESSES:                 Frame Layout.       (line  102)
+* SF_SIZE:                               Type Layout.        (line  128)
+* SFmode:                                Machine Modes.      (line   66)
+* sharing of RTL components:             Sharing.            (line    6)
+* shift:                                 Arithmetic.         (line  173)
+* SHIFT_COUNT_TRUNCATED:                 Misc.               (line  127)
+* SHLIB_SUFFIX:                          Macros for Initialization.
+                                                             (line  135)
+* SHORT_ACCUM_TYPE_SIZE:                 Type Layout.        (line   83)
+* SHORT_FRACT_TYPE_SIZE:                 Type Layout.        (line   63)
+* SHORT_IMMEDIATES_SIGN_EXTEND:          Misc.               (line   96)
+* SHORT_TYPE_SIZE:                       Type Layout.        (line   16)
+* sibcall_epilogue instruction pattern:  Standard Names.     (line 1371)
+* sibling call:                          Edges.              (line  122)
+* SIBLING_CALL_P:                        Flags.              (line  179)
+* SIG_ATOMIC_TYPE:                       Type Layout.        (line  234)
+* sign_extend:                           Conversions.        (line   23)
+* sign_extract:                          Bit-Fields.         (line    8)
+* sign_extract, canonicalization of:     Insn Canonicalizations.
+                                                             (line   88)
+* signed division:                       Arithmetic.         (line  116)
+* signed division with signed saturation: Arithmetic.        (line  116)
+* signed maximum:                        Arithmetic.         (line  141)
+* signed minimum:                        Arithmetic.         (line  141)
+* SImode:                                Machine Modes.      (line   37)
+* simple constraints:                    Simple Constraints. (line    6)
+* sincos math function, implicit usage:  Library Calls.      (line   70)
+* sinM2 instruction pattern:             Standard Names.     (line  516)
+* SIZE_ASM_OP:                           Label Output.       (line   35)
+* SIZE_TYPE:                             Type Layout.        (line  167)
+* skip:                                  GTY Options.        (line   72)
+* SLOW_BYTE_ACCESS:                      Costs.              (line  118)
+* SLOW_UNALIGNED_ACCESS:                 Costs.              (line  133)
+* smax:                                  Arithmetic.         (line  141)
+* smin:                                  Arithmetic.         (line  141)
+* sms, swing, software pipelining:       RTL passes.         (line  131)
+* smulM3_highpart instruction pattern:   Standard Names.     (line  383)
+* soft float library:                    Soft float library routines.
+                                                             (line    6)
+* special:                               GTY Options.        (line  249)
+* special predicates:                    Predicates.         (line   31)
+* SPECS:                                 Target Fragment.    (line  166)
+* speed of instructions:                 Costs.              (line    6)
+* split_block:                           Maintaining the CFG.
+                                                             (line  110)
+* splitting instructions:                Insn Splitting.     (line    6)
+* SQmode:                                Machine Modes.      (line  111)
+* sqrt:                                  Arithmetic.         (line  207)
+* sqrtM2 instruction pattern:            Standard Names.     (line  482)
+* square root:                           Arithmetic.         (line  207)
+* ss_abs:                                Arithmetic.         (line  200)
+* ss_ashift:                             Arithmetic.         (line  173)
+* ss_div:                                Arithmetic.         (line  116)
+* ss_minus:                              Arithmetic.         (line   36)
+* ss_mult:                               Arithmetic.         (line   92)
+* ss_neg:                                Arithmetic.         (line   81)
+* ss_plus:                               Arithmetic.         (line   14)
+* ss_truncate:                           Conversions.        (line   43)
+* SSA:                                   SSA.                (line    6)
+* SSA_NAME_DEF_STMT:                     SSA.                (line  221)
+* SSA_NAME_VERSION:                      SSA.                (line  226)
+* ssaddM3 instruction pattern:           Standard Names.     (line  222)
+* ssashlM3 instruction pattern:          Standard Names.     (line  458)
+* ssdivM3 instruction pattern:           Standard Names.     (line  222)
+* ssmaddMN4 instruction pattern:         Standard Names.     (line  406)
+* ssmsubMN4 instruction pattern:         Standard Names.     (line  430)
+* ssmulM3 instruction pattern:           Standard Names.     (line  222)
+* ssnegM2 instruction pattern:           Standard Names.     (line  476)
+* sssubM3 instruction pattern:           Standard Names.     (line  222)
+* ssum_widenM3 instruction pattern:      Standard Names.     (line  301)
+* stack arguments:                       Stack Arguments.    (line    6)
+* stack frame layout:                    Frame Layout.       (line    6)
+* stack smashing protection:             Stack Smashing Protection.
+                                                             (line    6)
+* STACK_ALIGNMENT_NEEDED:                Frame Layout.       (line   48)
+* STACK_BOUNDARY:                        Storage Layout.     (line  138)
+* STACK_CHECK_BUILTIN:                   Stack Checking.     (line   32)
+* STACK_CHECK_FIXED_FRAME_SIZE:          Stack Checking.     (line   83)
+* STACK_CHECK_MAX_FRAME_SIZE:            Stack Checking.     (line   74)
+* STACK_CHECK_MAX_VAR_SIZE:              Stack Checking.     (line   90)
+* STACK_CHECK_MOVING_SP:                 Stack Checking.     (line   54)
+* STACK_CHECK_PROBE_INTERVAL_EXP:        Stack Checking.     (line   46)
+* STACK_CHECK_PROTECT:                   Stack Checking.     (line   63)
+* STACK_CHECK_STATIC_BUILTIN:            Stack Checking.     (line   39)
+* STACK_DYNAMIC_OFFSET:                  Frame Layout.       (line   75)
+* STACK_DYNAMIC_OFFSET and virtual registers: Regs and Memory.
+                                                             (line   83)
+* STACK_GROWS_DOWNWARD:                  Frame Layout.       (line    9)
+* STACK_PARMS_IN_REG_PARM_AREA:          Stack Arguments.    (line   84)
+* STACK_POINTER_OFFSET:                  Frame Layout.       (line   58)
+* STACK_POINTER_OFFSET and virtual registers: Regs and Memory.
+                                                             (line   93)
+* STACK_POINTER_REGNUM:                  Frame Registers.    (line    9)
+* STACK_POINTER_REGNUM and virtual registers: Regs and Memory.
+                                                             (line   83)
+* stack_pointer_rtx:                     Frame Registers.    (line  104)
+* stack_protect_set instruction pattern: Standard Names.     (line 1542)
+* stack_protect_test instruction pattern: Standard Names.    (line 1552)
+* STACK_PUSH_CODE:                       Frame Layout.       (line   17)
+* STACK_REG_COVER_CLASS:                 Stack Registers.    (line   23)
+* STACK_REGS:                            Stack Registers.    (line   20)
+* STACK_SAVEAREA_MODE:                   Storage Layout.     (line  431)
+* STACK_SIZE_MODE:                       Storage Layout.     (line  443)
+* STACK_SLOT_ALIGNMENT:                  Storage Layout.     (line  263)
+* standard pattern names:                Standard Names.     (line    6)
+* STANDARD_INCLUDE_COMPONENT:            Driver.             (line  339)
+* STANDARD_INCLUDE_DIR:                  Driver.             (line  331)
+* STANDARD_STARTFILE_PREFIX:             Driver.             (line  275)
+* STANDARD_STARTFILE_PREFIX_1:           Driver.             (line  282)
+* STANDARD_STARTFILE_PREFIX_2:           Driver.             (line  289)
+* STARTFILE_SPEC:                        Driver.             (line  148)
+* STARTING_FRAME_OFFSET:                 Frame Layout.       (line   39)
+* STARTING_FRAME_OFFSET and virtual registers: Regs and Memory.
+                                                             (line   74)
+* Statement and operand traversals:      Statement and operand traversals.
+                                                             (line    6)
+* Statement Sequences:                   Statement Sequences.
+                                                             (line    6)
+* statements <1>:                        Statements for C++. (line    6)
+* statements:                            Function Properties.
+                                                             (line    6)
+* Statements:                            Statements.         (line    6)
+* Static profile estimation:             Profile information.
+                                                             (line   24)
+* static single assignment:              SSA.                (line    6)
+* STATIC_CHAIN_INCOMING_REGNUM:          Frame Registers.    (line   78)
+* STATIC_CHAIN_REGNUM:                   Frame Registers.    (line   77)
+* stdarg.h and register arguments:       Register Arguments. (line   47)
+* STDC_0_IN_SYSTEM_HEADERS:              Misc.               (line  365)
+* STMT_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* STMT_IS_FULL_EXPR_P:                   Statements for C++. (line   22)
+* storage layout:                        Storage Layout.     (line    6)
+* STORE_BY_PIECES_P:                     Costs.              (line  213)
+* STORE_FLAG_VALUE:                      Misc.               (line  216)
+* store_multiple instruction pattern:    Standard Names.     (line  160)
+* strcpy:                                Storage Layout.     (line  223)
+* STRICT_ALIGNMENT:                      Storage Layout.     (line  313)
+* strict_low_part:                       RTL Declarations.   (line    9)
+* strict_memory_address_p:               Addressing Modes.   (line  185)
+* STRING_CST:                            Constant expressions.
+                                                             (line    6)
+* STRING_POOL_ADDRESS_P:                 Flags.              (line  183)
+* strlenM instruction pattern:           Standard Names.     (line  791)
+* structure value address:               Aggregate Return.   (line    6)
+* STRUCTURE_SIZE_BOUNDARY:               Storage Layout.     (line  305)
+* structures, returning:                 Interface.          (line   10)
+* subM3 instruction pattern:             Standard Names.     (line  222)
+* SUBOBJECT:                             Statements for C++. (line    6)
+* SUBOBJECT_CLEANUP:                     Statements for C++. (line    6)
+* subreg:                                Regs and Memory.    (line   97)
+* subreg and /s:                         Flags.              (line  205)
+* subreg and /u:                         Flags.              (line  198)
+* subreg and /u and /v:                  Flags.              (line  188)
+* subreg, in strict_low_part:            RTL Declarations.   (line    9)
+* SUBREG_BYTE:                           Regs and Memory.    (line  289)
+* SUBREG_PROMOTED_UNSIGNED_P:            Flags.              (line  188)
+* SUBREG_PROMOTED_UNSIGNED_SET:          Flags.              (line  198)
+* SUBREG_PROMOTED_VAR_P:                 Flags.              (line  205)
+* SUBREG_REG:                            Regs and Memory.    (line  289)
+* SUCCESS_EXIT_CODE:                     Host Misc.          (line   12)
+* SUPPORTS_INIT_PRIORITY:                Macros for Initialization.
+                                                             (line   58)
+* SUPPORTS_ONE_ONLY:                     Label Output.       (line  247)
+* SUPPORTS_WEAK:                         Label Output.       (line  221)
+* SWITCH_BODY:                           Statements for C++. (line    6)
+* SWITCH_COND:                           Statements for C++. (line    6)
+* SWITCH_STMT:                           Statements for C++. (line    6)
+* SWITCHABLE_TARGET:                     Run-time Target.    (line  176)
+* SYMBOL_FLAG_ANCHOR:                    Special Accessors.  (line  110)
+* SYMBOL_FLAG_EXTERNAL:                  Special Accessors.  (line   92)
+* SYMBOL_FLAG_FUNCTION:                  Special Accessors.  (line   85)
+* SYMBOL_FLAG_HAS_BLOCK_INFO:            Special Accessors.  (line  106)
+* SYMBOL_FLAG_LOCAL:                     Special Accessors.  (line   88)
+* SYMBOL_FLAG_SMALL:                     Special Accessors.  (line   97)
+* SYMBOL_FLAG_TLS_SHIFT:                 Special Accessors.  (line  101)
+* symbol_ref:                            Constants.          (line   76)
+* symbol_ref and /f:                     Flags.              (line  183)
+* symbol_ref and /i:                     Flags.              (line  220)
+* symbol_ref and /u:                     Flags.              (line   10)
+* symbol_ref and /v:                     Flags.              (line  224)
+* symbol_ref, RTL sharing:               Sharing.            (line   20)
+* SYMBOL_REF_ANCHOR_P:                   Special Accessors.  (line  110)
+* SYMBOL_REF_BLOCK:                      Special Accessors.  (line  123)
+* SYMBOL_REF_BLOCK_OFFSET:               Special Accessors.  (line  128)
+* SYMBOL_REF_CONSTANT:                   Special Accessors.  (line   71)
+* SYMBOL_REF_DATA:                       Special Accessors.  (line   75)
+* SYMBOL_REF_DECL:                       Special Accessors.  (line   59)
+* SYMBOL_REF_EXTERNAL_P:                 Special Accessors.  (line   92)
+* SYMBOL_REF_FLAG:                       Flags.              (line  224)
+* SYMBOL_REF_FLAG, in TARGET_ENCODE_SECTION_INFO: Sections.  (line  269)
+* SYMBOL_REF_FLAGS:                      Special Accessors.  (line   79)
+* SYMBOL_REF_FUNCTION_P:                 Special Accessors.  (line   85)
+* SYMBOL_REF_HAS_BLOCK_INFO_P:           Special Accessors.  (line  106)
+* SYMBOL_REF_LOCAL_P:                    Special Accessors.  (line   88)
+* SYMBOL_REF_SMALL_P:                    Special Accessors.  (line   97)
+* SYMBOL_REF_TLS_MODEL:                  Special Accessors.  (line  101)
+* SYMBOL_REF_USED:                       Flags.              (line  215)
+* SYMBOL_REF_WEAK:                       Flags.              (line  220)
+* symbolic label:                        Sharing.            (line   20)
+* sync_addMODE instruction pattern:      Standard Names.     (line 1458)
+* sync_andMODE instruction pattern:      Standard Names.     (line 1458)
+* sync_compare_and_swapMODE instruction pattern: Standard Names.
+                                                             (line 1428)
+* sync_iorMODE instruction pattern:      Standard Names.     (line 1458)
+* sync_lock_releaseMODE instruction pattern: Standard Names. (line 1523)
+* sync_lock_test_and_setMODE instruction pattern: Standard Names.
+                                                             (line 1497)
+* sync_nandMODE instruction pattern:     Standard Names.     (line 1458)
+* sync_new_addMODE instruction pattern:  Standard Names.     (line 1490)
+* sync_new_andMODE instruction pattern:  Standard Names.     (line 1490)
+* sync_new_iorMODE instruction pattern:  Standard Names.     (line 1490)
+* sync_new_nandMODE instruction pattern: Standard Names.     (line 1490)
+* sync_new_subMODE instruction pattern:  Standard Names.     (line 1490)
+* sync_new_xorMODE instruction pattern:  Standard Names.     (line 1490)
+* sync_old_addMODE instruction pattern:  Standard Names.     (line 1473)
+* sync_old_andMODE instruction pattern:  Standard Names.     (line 1473)
+* sync_old_iorMODE instruction pattern:  Standard Names.     (line 1473)
+* sync_old_nandMODE instruction pattern: Standard Names.     (line 1473)
+* sync_old_subMODE instruction pattern:  Standard Names.     (line 1473)
+* sync_old_xorMODE instruction pattern:  Standard Names.     (line 1473)
+* sync_subMODE instruction pattern:      Standard Names.     (line 1458)
+* sync_xorMODE instruction pattern:      Standard Names.     (line 1458)
+* SYSROOT_HEADERS_SUFFIX_SPEC:           Driver.             (line  177)
+* SYSROOT_SUFFIX_SPEC:                   Driver.             (line  172)
+* SYSTEM_INCLUDE_DIR:                    Driver.             (line  322)
+* t-TARGET:                              Target Fragment.    (line    6)
+* table jump:                            Basic Blocks.       (line   57)
+* tablejump instruction pattern:         Standard Names.     (line 1102)
+* tag:                                   GTY Options.        (line   77)
+* tagging insns:                         Tagging Insns.      (line    6)
+* tail calls:                            Tail Calls.         (line    6)
+* TAmode:                                Machine Modes.      (line  156)
+* target attributes:                     Target Attributes.  (line    6)
+* target description macros:             Target Macros.      (line    6)
+* target functions:                      Target Structure.   (line    6)
+* target hooks:                          Target Structure.   (line    6)
+* target makefile fragment:              Target Fragment.    (line    6)
+* target specifications:                 Run-time Target.    (line    6)
+* TARGET_ADDR_SPACE_ADDRESS_MODE:        Named Address Spaces.
+                                                             (line   45)
+* TARGET_ADDR_SPACE_CONVERT:             Named Address Spaces.
+                                                             (line   88)
+* TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P: Named Address Spaces.
+                                                             (line   63)
+* TARGET_ADDR_SPACE_LEGITIMIZE_ADDRESS:  Named Address Spaces.
+                                                             (line   72)
+* TARGET_ADDR_SPACE_POINTER_MODE:        Named Address Spaces.
+                                                             (line   38)
+* TARGET_ADDR_SPACE_SUBSET_P:            Named Address Spaces.
+                                                             (line   79)
+* TARGET_ADDR_SPACE_VALID_POINTER_MODE:  Named Address Spaces.
+                                                             (line   52)
+* TARGET_ADDRESS_COST:                   Costs.              (line  297)
+* TARGET_ALIGN_ANON_BITFIELD:            Storage Layout.     (line  390)
+* TARGET_ALLOCATE_INITIAL_VALUE:         Misc.               (line  687)
+* TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS:  Misc.               (line  967)
+* TARGET_ARG_PARTIAL_BYTES:              Register Arguments. (line   83)
+* TARGET_ARM_EABI_UNWINDER:              Exception Region Output.
+                                                             (line  122)
+* TARGET_ASM_ALIGNED_DI_OP:              Data Output.        (line   10)
+* TARGET_ASM_ALIGNED_HI_OP:              Data Output.        (line    8)
+* TARGET_ASM_ALIGNED_SI_OP:              Data Output.        (line    9)
+* TARGET_ASM_ALIGNED_TI_OP:              Data Output.        (line   11)
+* TARGET_ASM_ASSEMBLE_VISIBILITY:        Label Output.       (line  259)
+* TARGET_ASM_BYTE_OP:                    Data Output.        (line    7)
+* TARGET_ASM_CAN_OUTPUT_MI_THUNK:        Function Entry.     (line  237)
+* TARGET_ASM_CLOSE_PAREN:                Data Output.        (line  142)
+* TARGET_ASM_CODE_END:                   File Framework.     (line   59)
+* TARGET_ASM_CONSTRUCTOR:                Macros for Initialization.
+                                                             (line   69)
+* TARGET_ASM_DECLARE_CONSTANT_NAME:      Label Output.       (line  142)
+* TARGET_ASM_DESTRUCTOR:                 Macros for Initialization.
+                                                             (line   83)
+* TARGET_ASM_EMIT_EXCEPT_PERSONALITY:    Dispatch Tables.    (line   82)
+* TARGET_ASM_EMIT_EXCEPT_TABLE_LABEL:    Dispatch Tables.    (line   74)
+* TARGET_ASM_EMIT_UNWIND_LABEL:          Dispatch Tables.    (line   63)
+* TARGET_ASM_EXTERNAL_LIBCALL:           Label Output.       (line  294)
+* TARGET_ASM_FILE_END:                   File Framework.     (line   37)
+* TARGET_ASM_FILE_START:                 File Framework.     (line    9)
+* TARGET_ASM_FILE_START_APP_OFF:         File Framework.     (line   17)
+* TARGET_ASM_FILE_START_FILE_DIRECTIVE:  File Framework.     (line   31)
+* TARGET_ASM_FINAL_POSTSCAN_INSN:        Instruction Output. (line   84)
+* TARGET_ASM_FUNCTION_BEGIN_EPILOGUE:    Function Entry.     (line   61)
+* TARGET_ASM_FUNCTION_END_PROLOGUE:      Function Entry.     (line   55)
+* TARGET_ASM_FUNCTION_EPILOGUE:          Function Entry.     (line   68)
+* TARGET_ASM_FUNCTION_PROLOGUE:          Function Entry.     (line   11)
+* TARGET_ASM_FUNCTION_RODATA_SECTION:    Sections.           (line  216)
+* TARGET_ASM_FUNCTION_SECTION:           File Framework.     (line  123)
+* TARGET_ASM_FUNCTION_SWITCHED_TEXT_SECTIONS: File Framework.
+                                                             (line  133)
+* TARGET_ASM_GLOBALIZE_DECL_NAME:        Label Output.       (line  187)
+* TARGET_ASM_GLOBALIZE_LABEL:            Label Output.       (line  178)
+* TARGET_ASM_INIT_SECTIONS:              Sections.           (line  161)
+* TARGET_ASM_INTEGER:                    Data Output.        (line   27)
+* TARGET_ASM_INTERNAL_LABEL:             Label Output.       (line  338)
+* TARGET_ASM_JUMP_ALIGN_MAX_SKIP:        Alignment Output.   (line   22)
+* TARGET_ASM_LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP: Alignment Output.
+                                                             (line   36)
+* TARGET_ASM_LABEL_ALIGN_MAX_SKIP:       Alignment Output.   (line   69)
+* TARGET_ASM_LOOP_ALIGN_MAX_SKIP:        Alignment Output.   (line   54)
+* TARGET_ASM_LTO_END:                    File Framework.     (line   54)
+* TARGET_ASM_LTO_START:                  File Framework.     (line   49)
+* TARGET_ASM_MARK_DECL_PRESERVED:        Label Output.       (line  301)
+* TARGET_ASM_NAMED_SECTION:              File Framework.     (line  115)
+* TARGET_ASM_OPEN_PAREN:                 Data Output.        (line  141)
+* TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA:    Data Output.        (line   40)
+* TARGET_ASM_OUTPUT_ANCHOR:              Anchored Addresses. (line   44)
+* TARGET_ASM_OUTPUT_DWARF_DTPREL:        SDB and DWARF.      (line   96)
+* TARGET_ASM_OUTPUT_MI_THUNK:            Function Entry.     (line  195)
+* TARGET_ASM_OUTPUT_SOURCE_FILENAME:     File Framework.     (line   94)
+* TARGET_ASM_RECORD_GCC_SWITCHES:        File Framework.     (line  164)
+* TARGET_ASM_RECORD_GCC_SWITCHES_SECTION: File Framework.    (line  208)
+* TARGET_ASM_RELOC_RW_MASK:              Sections.           (line  170)
+* TARGET_ASM_SELECT_RTX_SECTION:         Sections.           (line  224)
+* TARGET_ASM_SELECT_SECTION:             Sections.           (line  182)
+* TARGET_ASM_TRAMPOLINE_TEMPLATE:        Trampolines.        (line   29)
+* TARGET_ASM_TTYPE:                      Exception Region Output.
+                                                             (line  116)
+* TARGET_ASM_UNALIGNED_DI_OP:            Data Output.        (line   14)
+* TARGET_ASM_UNALIGNED_HI_OP:            Data Output.        (line   12)
+* TARGET_ASM_UNALIGNED_SI_OP:            Data Output.        (line   13)
+* TARGET_ASM_UNALIGNED_TI_OP:            Data Output.        (line   15)
+* TARGET_ASM_UNIQUE_SECTION:             Sections.           (line  203)
+* TARGET_ASM_UNWIND_EMIT:                Dispatch Tables.    (line   88)
+* TARGET_ASM_UNWIND_EMIT_BEFORE_INSN:    Dispatch Tables.    (line   93)
+* TARGET_ATTRIBUTE_TABLE:                Target Attributes.  (line   11)
+* TARGET_ATTRIBUTE_TAKES_IDENTIFIER_P:   Target Attributes.  (line   19)
+* TARGET_BINDS_LOCAL_P:                  Sections.           (line  301)
+* TARGET_BRANCH_TARGET_REGISTER_CALLEE_SAVED: Misc.          (line  784)
+* TARGET_BRANCH_TARGET_REGISTER_CLASS:   Misc.               (line  776)
+* TARGET_BUILD_BUILTIN_VA_LIST:          Register Arguments. (line  264)
+* TARGET_BUILTIN_DECL:                   Misc.               (line  620)
+* TARGET_BUILTIN_RECIPROCAL:             Addressing Modes.   (line  265)
+* TARGET_BUILTIN_SETJMP_FRAME_VALUE:     Frame Layout.       (line  109)
+* TARGET_C99_FUNCTIONS:                  Library Calls.      (line   63)
+* TARGET_CALLEE_COPIES:                  Register Arguments. (line  115)
+* TARGET_CAN_ELIMINATE:                  Elimination.        (line   75)
+* TARGET_CAN_INLINE_P:                   Target Attributes.  (line  150)
+* TARGET_CANNOT_FORCE_CONST_MEM:         Addressing Modes.   (line  246)
+* TARGET_CANNOT_MODIFY_JUMPS_P:          Misc.               (line  763)
+* TARGET_CANONICAL_VA_LIST_TYPE:         Register Arguments. (line  285)
+* TARGET_CASE_VALUES_THRESHOLD:          Misc.               (line   47)
+* TARGET_CC_MODES_COMPATIBLE:            MODE_CC Condition Codes.
+                                                             (line  116)
+* TARGET_CHECK_PCH_TARGET_FLAGS:         PCH Target.         (line   28)
+* TARGET_CHECK_STRING_OBJECT_FORMAT_ARG: Run-time Target.    (line  113)
+* TARGET_CLASS_LIKELY_SPILLED_P:         Register Classes.   (line  492)
+* TARGET_COMMUTATIVE_P:                  Misc.               (line  680)
+* TARGET_COMP_TYPE_ATTRIBUTES:           Target Attributes.  (line   27)
+* TARGET_CONDITIONAL_REGISTER_USAGE:     Register Basics.    (line   60)
+* TARGET_CONST_ANCHOR:                   Misc.               (line  978)
+* TARGET_CONVERT_TO_TYPE:                Misc.               (line  931)
+* TARGET_CPU_CPP_BUILTINS:               Run-time Target.    (line    9)
+* TARGET_CXX_ADJUST_CLASS_AT_DEFINITION: C++ ABI.            (line   87)
+* TARGET_CXX_CDTOR_RETURNS_THIS:         C++ ABI.            (line   38)
+* TARGET_CXX_CLASS_DATA_ALWAYS_COMDAT:   C++ ABI.            (line   62)
+* TARGET_CXX_COOKIE_HAS_SIZE:            C++ ABI.            (line   25)
+* TARGET_CXX_DETERMINE_CLASS_DATA_VISIBILITY: C++ ABI.       (line   54)
+* TARGET_CXX_GET_COOKIE_SIZE:            C++ ABI.            (line   18)
+* TARGET_CXX_GUARD_MASK_BIT:             C++ ABI.            (line   12)
+* TARGET_CXX_GUARD_TYPE:                 C++ ABI.            (line    7)
+* TARGET_CXX_IMPORT_EXPORT_CLASS:        C++ ABI.            (line   30)
+* TARGET_CXX_KEY_METHOD_MAY_BE_INLINE:   C++ ABI.            (line   43)
+* TARGET_CXX_LIBRARY_RTTI_COMDAT:        C++ ABI.            (line   69)
+* TARGET_CXX_USE_AEABI_ATEXIT:           C++ ABI.            (line   74)
+* TARGET_CXX_USE_ATEXIT_FOR_CXA_ATEXIT:  C++ ABI.            (line   80)
+* TARGET_DEBUG_UNWIND_INFO:              SDB and DWARF.      (line   37)
+* TARGET_DECIMAL_FLOAT_SUPPORTED_P:      Storage Layout.     (line  515)
+* TARGET_DECLSPEC:                       Target Attributes.  (line   73)
+* TARGET_DEFAULT_PACK_STRUCT:            Misc.               (line  445)
+* TARGET_DEFAULT_SHORT_ENUMS:            Type Layout.        (line  159)
+* TARGET_DEFAULT_TARGET_FLAGS:           Run-time Target.    (line   56)
+* TARGET_DEFERRED_OUTPUT_DEFS:           Label Output.       (line  422)
+* TARGET_DELAY_SCHED2:                   SDB and DWARF.      (line   61)
+* TARGET_DELAY_VARTRACK:                 SDB and DWARF.      (line   65)
+* TARGET_DELEGITIMIZE_ADDRESS:           Addressing Modes.   (line  237)
+* TARGET_DLLIMPORT_DECL_ATTRIBUTES:      Target Attributes.  (line   55)
+* TARGET_DWARF_CALLING_CONVENTION:       SDB and DWARF.      (line   18)
+* TARGET_DWARF_HANDLE_FRAME_UNSPEC:      Frame Layout.       (line  172)
+* TARGET_DWARF_REGISTER_SPAN:            Exception Region Output.
+                                                             (line   99)
+* TARGET_EDOM:                           Library Calls.      (line   45)
+* TARGET_EMUTLS_DEBUG_FORM_TLS_ADDRESS:  Emulated TLS.       (line   68)
+* TARGET_EMUTLS_GET_ADDRESS:             Emulated TLS.       (line   19)
+* TARGET_EMUTLS_REGISTER_COMMON:         Emulated TLS.       (line   24)
+* TARGET_EMUTLS_TMPL_PREFIX:             Emulated TLS.       (line   45)
+* TARGET_EMUTLS_TMPL_SECTION:            Emulated TLS.       (line   36)
+* TARGET_EMUTLS_VAR_ALIGN_FIXED:         Emulated TLS.       (line   63)
+* TARGET_EMUTLS_VAR_FIELDS:              Emulated TLS.       (line   49)
+* TARGET_EMUTLS_VAR_INIT:                Emulated TLS.       (line   57)
+* TARGET_EMUTLS_VAR_PREFIX:              Emulated TLS.       (line   41)
+* TARGET_EMUTLS_VAR_SECTION:             Emulated TLS.       (line   31)
+* TARGET_ENCODE_SECTION_INFO:            Sections.           (line  245)
+* TARGET_ENCODE_SECTION_INFO and address validation: Addressing Modes.
+                                                             (line   83)
+* TARGET_ENCODE_SECTION_INFO usage:      Instruction Output. (line  128)
+* TARGET_ENUM_VA_LIST_P:                 Register Arguments. (line  269)
+* TARGET_EXCEPT_UNWIND_INFO:             Exception Region Output.
+                                                             (line   48)
+* TARGET_EXECUTABLE_SUFFIX:              Misc.               (line  737)
+* TARGET_EXPAND_BUILTIN:                 Misc.               (line  630)
+* TARGET_EXPAND_BUILTIN_SAVEREGS:        Varargs.            (line   67)
+* TARGET_EXPAND_TO_RTL_HOOK:             Storage Layout.     (line  521)
+* TARGET_EXPR:                           Unary and Binary Expressions.
+                                                             (line    6)
+* TARGET_EXTRA_INCLUDES:                 Misc.               (line  824)
+* TARGET_EXTRA_LIVE_ON_ENTRY:            Tail Calls.         (line   21)
+* TARGET_EXTRA_PRE_INCLUDES:             Misc.               (line  831)
+* TARGET_FIXED_CONDITION_CODE_REGS:      MODE_CC Condition Codes.
+                                                             (line  101)
+* TARGET_FIXED_POINT_SUPPORTED_P:        Storage Layout.     (line  518)
+* target_flags:                          Run-time Target.    (line   52)
+* TARGET_FLAGS_REGNUM:                   Register Arguments. (line  361)
+* TARGET_FLT_EVAL_METHOD:                Type Layout.        (line  140)
+* TARGET_FN_ABI_VA_LIST:                 Register Arguments. (line  280)
+* TARGET_FOLD_BUILTIN:                   Misc.               (line  651)
+* TARGET_FORMAT_TYPES:                   Misc.               (line  851)
+* TARGET_FRAME_POINTER_REQUIRED:         Elimination.        (line    9)
+* TARGET_FUNCTION_ARG_BOUNDARY:          Register Arguments. (line  239)
+* TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P: Target Attributes.  (line   95)
+* TARGET_FUNCTION_OK_FOR_SIBCALL:        Tail Calls.         (line    8)
+* TARGET_FUNCTION_VALUE:                 Scalar Return.      (line   11)
+* TARGET_FUNCTION_VALUE_REGNO_P:         Scalar Return.      (line   97)
+* TARGET_GET_DRAP_RTX:                   Misc.               (line  961)
+* TARGET_GET_PCH_VALIDITY:               PCH Target.         (line    7)
+* TARGET_GET_RAW_ARG_MODE:               Aggregate Return.   (line   83)
+* TARGET_GET_RAW_RESULT_MODE:            Aggregate Return.   (line   78)
+* TARGET_GIMPLIFY_VA_ARG_EXPR:           Register Arguments. (line  291)
+* TARGET_HANDLE_C_OPTION:                Run-time Target.    (line   78)
+* TARGET_HANDLE_OPTION:                  Run-time Target.    (line   61)
+* TARGET_HANDLE_PRAGMA_EXTERN_PREFIX:    Misc.               (line  442)
+* TARGET_HARD_REGNO_SCRATCH_OK:          Values in Registers.
+                                                             (line  144)
+* TARGET_HAS_SINCOS:                     Library Calls.      (line   71)
+* TARGET_HAVE_CONDITIONAL_EXECUTION:     Misc.               (line  798)
+* TARGET_HAVE_CTORS_DTORS:               Macros for Initialization.
+                                                             (line   64)
+* TARGET_HAVE_NAMED_SECTIONS:            File Framework.     (line  140)
+* TARGET_HAVE_SRODATA_SECTION:           Sections.           (line  290)
+* TARGET_HAVE_SWITCHABLE_BSS_SECTIONS:   File Framework.     (line  145)
+* TARGET_HAVE_TLS:                       Sections.           (line  310)
+* TARGET_HELP:                           Run-time Target.    (line  170)
+* TARGET_IN_SMALL_DATA_P:                Sections.           (line  286)
+* TARGET_INIT_BUILTINS:                  Misc.               (line  602)
+* TARGET_INIT_DWARF_REG_SIZES_EXTRA:     Exception Region Output.
+                                                             (line  108)
+* TARGET_INIT_LIBFUNCS:                  Library Calls.      (line   16)
+* TARGET_INSERT_ATTRIBUTES:              Target Attributes.  (line   82)
+* TARGET_INSTANTIATE_DECLS:              Storage Layout.     (line  529)
+* TARGET_INVALID_ARG_FOR_UNPROTOTYPED_FN: Misc.              (line  885)
+* TARGET_INVALID_BINARY_OP:              Misc.               (line  904)
+* TARGET_INVALID_CONVERSION:             Misc.               (line  891)
+* TARGET_INVALID_PARAMETER_TYPE:         Misc.               (line  910)
+* TARGET_INVALID_RETURN_TYPE:            Misc.               (line  917)
+* TARGET_INVALID_UNARY_OP:               Misc.               (line  897)
+* TARGET_INVALID_WITHIN_DOLOOP:          Misc.               (line  660)
+* TARGET_IRA_COVER_CLASSES:              Register Classes.   (line  537)
+* TARGET_LEGITIMATE_ADDRESS_P:           Addressing Modes.   (line   50)
+* TARGET_LEGITIMIZE_ADDRESS:             Addressing Modes.   (line  132)
+* TARGET_LIB_INT_CMP_BIASED:             Library Calls.      (line   35)
+* TARGET_LIBCALL_VALUE:                  Scalar Return.      (line   66)
+* TARGET_LIBGCC_CMP_RETURN_MODE:         Storage Layout.     (line  452)
+* TARGET_LIBGCC_SDATA_SECTION:           Sections.           (line  133)
+* TARGET_LIBGCC_SHIFT_COUNT_MODE:        Storage Layout.     (line  458)
+* TARGET_LOOP_UNROLL_ADJUST:             Misc.               (line  805)
+* TARGET_MACHINE_DEPENDENT_REORG:        Misc.               (line  587)
+* TARGET_MANGLE_ASSEMBLER_NAME:          Label Output.       (line  313)
+* TARGET_MANGLE_DECL_ASSEMBLER_NAME:     Sections.           (line  235)
+* TARGET_MANGLE_TYPE:                    Storage Layout.     (line  533)
+* TARGET_MAX_ANCHOR_OFFSET:              Anchored Addresses. (line   39)
+* TARGET_MD_ASM_CLOBBERS:                Misc.               (line  503)
+* TARGET_MEM_CONSTRAINT:                 Addressing Modes.   (line  109)
+* TARGET_MEM_REF:                        Storage References. (line    6)
+* TARGET_MEMORY_MOVE_COST:               Costs.              (line   81)
+* TARGET_MERGE_DECL_ATTRIBUTES:          Target Attributes.  (line   47)
+* TARGET_MERGE_TYPE_ATTRIBUTES:          Target Attributes.  (line   39)
+* TARGET_MIN_ANCHOR_OFFSET:              Anchored Addresses. (line   33)
+* TARGET_MIN_DIVISIONS_FOR_RECIP_MUL:    Misc.               (line  106)
+* TARGET_MODE_DEPENDENT_ADDRESS_P:       Addressing Modes.   (line  196)
+* TARGET_MODE_REP_EXTENDED:              Misc.               (line  191)
+* TARGET_MS_BITFIELD_LAYOUT_P:           Storage Layout.     (line  488)
+* TARGET_MUST_PASS_IN_STACK:             Register Arguments. (line   62)
+* TARGET_MUST_PASS_IN_STACK, and FUNCTION_ARG: Register Arguments.
+                                                             (line   52)
+* TARGET_N_FORMAT_TYPES:                 Misc.               (line  856)
+* TARGET_NARROW_VOLATILE_BITFIELD:       Storage Layout.     (line  396)
+* TARGET_OBJC_CONSTRUCT_STRING_OBJECT:   Run-time Target.    (line   92)
+* TARGET_OBJECT_SUFFIX:                  Misc.               (line  732)
+* TARGET_OBJFMT_CPP_BUILTINS:            Run-time Target.    (line   46)
+* TARGET_OPTF:                           Misc.               (line  838)
+* TARGET_OPTION_DEFAULT_PARAMS:          Run-time Target.    (line  166)
+* TARGET_OPTION_INIT_STRUCT:             Run-time Target.    (line  163)
+* TARGET_OPTION_OPTIMIZATION_TABLE:      Run-time Target.    (line  149)
+* TARGET_OPTION_OVERRIDE:                Target Attributes.  (line  137)
+* TARGET_OPTION_PRAGMA_PARSE:            Target Attributes.  (line  131)
+* TARGET_OPTION_PRINT:                   Target Attributes.  (line  125)
+* TARGET_OPTION_RESTORE:                 Target Attributes.  (line  119)
+* TARGET_OPTION_SAVE:                    Target Attributes.  (line  113)
+* TARGET_OPTION_VALID_ATTRIBUTE_P:       Target Attributes.  (line  102)
+* TARGET_OS_CPP_BUILTINS:                Run-time Target.    (line   42)
+* TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE:  Run-time Target.    (line  132)
+* TARGET_OVERRIDES_FORMAT_ATTRIBUTES:    Misc.               (line  860)
+* TARGET_OVERRIDES_FORMAT_ATTRIBUTES_COUNT: Misc.            (line  866)
+* TARGET_OVERRIDES_FORMAT_INIT:          Misc.               (line  870)
+* TARGET_PASS_BY_REFERENCE:              Register Arguments. (line  103)
+* TARGET_PCH_VALID_P:                    PCH Target.         (line   13)
+* TARGET_POSIX_IO:                       Misc.               (line  527)
+* TARGET_PREFERRED_OUTPUT_RELOAD_CLASS:  Register Classes.   (line  287)
+* TARGET_PREFERRED_RELOAD_CLASS:         Register Classes.   (line  208)
+* TARGET_PREFERRED_RENAME_CLASS:         Register Classes.   (line  196)
+* TARGET_PRETEND_OUTGOING_VARARGS_NAMED: Varargs.            (line  128)
+* TARGET_PROFILE_BEFORE_PROLOGUE:        Sections.           (line  294)
+* TARGET_PROMOTE_FUNCTION_MODE:          Storage Layout.     (line  112)
+* TARGET_PROMOTE_PROTOTYPES:             Stack Arguments.    (line   11)
+* TARGET_PROMOTED_TYPE:                  Misc.               (line  923)
+* TARGET_PTRMEMFUNC_VBIT_LOCATION:       Type Layout.        (line  277)
+* TARGET_REF_MAY_ALIAS_ERRNO:            Register Arguments. (line  302)
+* TARGET_REGISTER_MOVE_COST:             Costs.              (line   33)
+* TARGET_RELAXED_ORDERING:               Misc.               (line  875)
+* TARGET_RESOLVE_OVERLOADED_BUILTIN:     Misc.               (line  640)
+* TARGET_RETURN_IN_MEMORY:               Aggregate Return.   (line   17)
+* TARGET_RETURN_IN_MSB:                  Scalar Return.      (line  117)
+* TARGET_RETURN_POPS_ARGS:               Stack Arguments.    (line   94)
+* TARGET_RTX_COSTS:                      Costs.              (line  271)
+* TARGET_SCALAR_MODE_SUPPORTED_P:        Register Arguments. (line  310)
+* TARGET_SCHED_ADJUST_COST:              Scheduling.         (line   37)
+* TARGET_SCHED_ADJUST_PRIORITY:          Scheduling.         (line   52)
+* TARGET_SCHED_ALLOC_SCHED_CONTEXT:      Scheduling.         (line  274)
+* TARGET_SCHED_CLEAR_SCHED_CONTEXT:      Scheduling.         (line  289)
+* TARGET_SCHED_DEPENDENCIES_EVALUATION_HOOK: Scheduling.     (line   89)
+* TARGET_SCHED_DFA_NEW_CYCLE:            Scheduling.         (line  235)
+* TARGET_SCHED_DFA_POST_ADVANCE_CYCLE:   Scheduling.         (line  160)
+* TARGET_SCHED_DFA_POST_CYCLE_INSN:      Scheduling.         (line  144)
+* TARGET_SCHED_DFA_PRE_ADVANCE_CYCLE:    Scheduling.         (line  153)
+* TARGET_SCHED_DFA_PRE_CYCLE_INSN:       Scheduling.         (line  132)
+* TARGET_SCHED_DISPATCH:                 Scheduling.         (line  355)
+* TARGET_SCHED_DISPATCH_DO:              Scheduling.         (line  360)
+* TARGET_SCHED_FINISH:                   Scheduling.         (line  109)
+* TARGET_SCHED_FINISH_GLOBAL:            Scheduling.         (line  126)
+* TARGET_SCHED_FIRST_CYCLE_MULTIPASS_BACKTRACK: Scheduling.  (line  215)
+* TARGET_SCHED_FIRST_CYCLE_MULTIPASS_BEGIN: Scheduling.      (line  204)
+* TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD: Scheduling.
+                                                             (line  168)
+* TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD: Scheduling.
+                                                             (line  196)
+* TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD_SPEC: Scheduling.
+                                                             (line  328)
+* TARGET_SCHED_FIRST_CYCLE_MULTIPASS_END: Scheduling.        (line  220)
+* TARGET_SCHED_FIRST_CYCLE_MULTIPASS_FINI: Scheduling.       (line  230)
+* TARGET_SCHED_FIRST_CYCLE_MULTIPASS_INIT: Scheduling.       (line  225)
+* TARGET_SCHED_FIRST_CYCLE_MULTIPASS_ISSUE: Scheduling.      (line  210)
+* TARGET_SCHED_FREE_SCHED_CONTEXT:       Scheduling.         (line  293)
+* TARGET_SCHED_GEN_SPEC_CHECK:           Scheduling.         (line  315)
+* TARGET_SCHED_H_I_D_EXTENDED:           Scheduling.         (line  269)
+* TARGET_SCHED_INIT:                     Scheduling.         (line   99)
+* TARGET_SCHED_INIT_DFA_POST_CYCLE_INSN: Scheduling.         (line  149)
+* TARGET_SCHED_INIT_DFA_PRE_CYCLE_INSN:  Scheduling.         (line  141)
+* TARGET_SCHED_INIT_GLOBAL:              Scheduling.         (line  118)
+* TARGET_SCHED_INIT_SCHED_CONTEXT:       Scheduling.         (line  279)
+* TARGET_SCHED_IS_COSTLY_DEPENDENCE:     Scheduling.         (line  246)
+* TARGET_SCHED_ISSUE_RATE:               Scheduling.         (line   12)
+* TARGET_SCHED_NEEDS_BLOCK_P:            Scheduling.         (line  308)
+* TARGET_SCHED_REORDER:                  Scheduling.         (line   60)
+* TARGET_SCHED_REORDER2:                 Scheduling.         (line   77)
+* TARGET_SCHED_SET_SCHED_CONTEXT:        Scheduling.         (line  285)
+* TARGET_SCHED_SET_SCHED_FLAGS:          Scheduling.         (line  340)
+* TARGET_SCHED_SMS_RES_MII:              Scheduling.         (line  346)
+* TARGET_SCHED_SPECULATE_INSN:           Scheduling.         (line  297)
+* TARGET_SCHED_VARIABLE_ISSUE:           Scheduling.         (line   24)
+* TARGET_SECONDARY_RELOAD:               Register Classes.   (line  316)
+* TARGET_SECTION_TYPE_FLAGS:             File Framework.     (line  151)
+* TARGET_SET_CURRENT_FUNCTION:           Misc.               (line  714)
+* TARGET_SET_DEFAULT_TYPE_ATTRIBUTES:    Target Attributes.  (line   34)
+* TARGET_SETUP_INCOMING_VARARGS:         Varargs.            (line   76)
+* TARGET_SHIFT_TRUNCATION_MASK:          Misc.               (line  154)
+* TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P: Register Arguments.
+                                                             (line  328)
+* TARGET_SPLIT_COMPLEX_ARG:              Register Arguments. (line  252)
+* TARGET_STACK_PROTECT_FAIL:             Stack Smashing Protection.
+                                                             (line   17)
+* TARGET_STACK_PROTECT_GUARD:            Stack Smashing Protection.
+                                                             (line    7)
+* TARGET_STATIC_CHAIN:                   Frame Registers.    (line   92)
+* TARGET_STRICT_ARGUMENT_NAMING:         Varargs.            (line  112)
+* TARGET_STRING_OBJECT_REF_TYPE_P:       Run-time Target.    (line  108)
+* TARGET_STRIP_NAME_ENCODING:            Sections.           (line  282)
+* TARGET_STRUCT_VALUE_RTX:               Aggregate Return.   (line   45)
+* TARGET_SUPPORTS_SPLIT_STACK:           Stack Smashing Protection.
+                                                             (line   27)
+* TARGET_SUPPORTS_WEAK:                  Label Output.       (line  229)
+* TARGET_TERMINATE_DW2_EH_FRAME_INFO:    Exception Region Output.
+                                                             (line   93)
+* TARGET_TRAMPOLINE_ADJUST_ADDRESS:      Trampolines.        (line   75)
+* TARGET_TRAMPOLINE_INIT:                Trampolines.        (line   56)
+* TARGET_UNSPEC_MAY_TRAP_P:              Misc.               (line  706)
+* TARGET_UNWIND_TABLES_DEFAULT:          Exception Region Output.
+                                                             (line   74)
+* TARGET_UNWIND_WORD_MODE:               Storage Layout.     (line  464)
+* TARGET_UPDATE_STACK_BOUNDARY:          Misc.               (line  957)
+* TARGET_USE_ANCHORS_FOR_SYMBOL_P:       Anchored Addresses. (line   55)
+* TARGET_USE_BLOCKS_FOR_CONSTANT_P:      Addressing Modes.   (line  258)
+* TARGET_USE_JCR_SECTION:                Misc.               (line  939)
+* TARGET_USES_WEAK_UNWIND_INFO:          Exception Handling. (line  129)
+* TARGET_VALID_DLLIMPORT_ATTRIBUTE_P:    Target Attributes.  (line   68)
+* TARGET_VALID_POINTER_MODE:             Register Arguments. (line  297)
+* TARGET_VECTOR_ALIGNMENT:               Storage Layout.     (line  256)
+* TARGET_VECTOR_MODE_SUPPORTED_P:        Register Arguments. (line  322)
+* TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES: Addressing Modes.
+                                                             (line  382)
+* TARGET_VECTORIZE_BUILTIN_CONVERSION:   Addressing Modes.   (line  344)
+* TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD: Addressing Modes.  (line  274)
+* TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_EVEN: Addressing Modes. (line  300)
+* TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_ODD: Addressing Modes.  (line  312)
+* TARGET_VECTORIZE_BUILTIN_VEC_PERM:     Addressing Modes.   (line  336)
+* TARGET_VECTORIZE_BUILTIN_VEC_PERM_OK:  Addressing Modes.   (line  340)
+* TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST: Addressing Modes.
+                                                             (line  325)
+* TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION: Addressing Modes.
+                                                             (line  356)
+* TARGET_VECTORIZE_PREFERRED_SIMD_MODE:  Addressing Modes.   (line  375)
+* TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT: Addressing Modes.
+                                                             (line  366)
+* TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE: Addressing Modes.
+                                                             (line  331)
+* TARGET_VERSION:                        Run-time Target.    (line  119)
+* TARGET_VTABLE_DATA_ENTRY_DISTANCE:     Type Layout.        (line  330)
+* TARGET_VTABLE_ENTRY_ALIGN:             Type Layout.        (line  324)
+* TARGET_VTABLE_USES_DESCRIPTORS:        Type Layout.        (line  313)
+* TARGET_WANT_DEBUG_PUB_SECTIONS:        SDB and DWARF.      (line   56)
+* TARGET_WEAK_NOT_IN_ARCHIVE_TOC:        Label Output.       (line  265)
+* targetm:                               Target Structure.   (line    7)
+* targets, makefile:                     Makefile.           (line    6)
+* TCmode:                                Machine Modes.      (line  197)
+* TDmode:                                Machine Modes.      (line   94)
+* TEMPLATE_DECL:                         Declarations.       (line    6)
+* Temporaries:                           Temporaries.        (line    6)
+* termination routines:                  Initialization.     (line    6)
+* testing constraints:                   C Constraint Interface.
+                                                             (line    6)
+* TEXT_SECTION_ASM_OP:                   Sections.           (line   38)
+* TF_SIZE:                               Type Layout.        (line  131)
+* TFmode:                                Machine Modes.      (line   98)
+* THEN_CLAUSE:                           Statements for C++. (line    6)
+* THREAD_MODEL_SPEC:                     Driver.             (line  163)
+* THROW_EXPR:                            Unary and Binary Expressions.
+                                                             (line    6)
+* THUNK_DECL:                            Declarations.       (line    6)
+* THUNK_DELTA:                           Declarations.       (line    6)
+* TImode:                                Machine Modes.      (line   48)
+* TImode, in insn:                       Insns.              (line  272)
+* TLS_COMMON_ASM_OP:                     Sections.           (line   82)
+* TLS_SECTION_ASM_FLAG:                  Sections.           (line   87)
+* tm.h macros:                           Target Macros.      (line    6)
+* TQFmode:                               Machine Modes.      (line   62)
+* TQmode:                                Machine Modes.      (line  119)
+* TRAMPOLINE_ALIGNMENT:                  Trampolines.        (line   49)
+* TRAMPOLINE_SECTION:                    Trampolines.        (line   40)
+* TRAMPOLINE_SIZE:                       Trampolines.        (line   45)
+* trampolines for nested functions:      Trampolines.        (line    6)
+* TRANSFER_FROM_TRAMPOLINE:              Trampolines.        (line  123)
+* trap instruction pattern:              Standard Names.     (line 1381)
+* tree <1>:                              Macros and Functions.
+                                                             (line    6)
+* tree:                                  Tree overview.      (line    6)
+* Tree SSA:                              Tree SSA.           (line    6)
+* TREE_CHAIN:                            Macros and Functions.
+                                                             (line    6)
+* TREE_CODE:                             Tree overview.      (line    6)
+* tree_int_cst_equal:                    Constant expressions.
+                                                             (line    6)
+* TREE_INT_CST_HIGH:                     Constant expressions.
+                                                             (line    6)
+* TREE_INT_CST_LOW:                      Constant expressions.
+                                                             (line    6)
+* tree_int_cst_lt:                       Constant expressions.
+                                                             (line    6)
+* TREE_LIST:                             Containers.         (line    6)
+* TREE_OPERAND:                          Expression trees.   (line    6)
+* TREE_PUBLIC <1>:                       Function Properties.
+                                                             (line   28)
+* TREE_PUBLIC:                           Function Basics.    (line    6)
+* TREE_PURPOSE:                          Containers.         (line    6)
+* TREE_READONLY:                         Function Properties.
+                                                             (line   37)
+* tree_size:                             Macros and Functions.
+                                                             (line   13)
+* TREE_STATIC:                           Function Properties.
+                                                             (line   31)
+* TREE_STRING_LENGTH:                    Constant expressions.
+                                                             (line    6)
+* TREE_STRING_POINTER:                   Constant expressions.
+                                                             (line    6)
+* TREE_THIS_VOLATILE:                    Function Properties.
+                                                             (line   34)
+* TREE_TYPE <1>:                         Types for C++.      (line    6)
+* TREE_TYPE <2>:                         Function Basics.    (line   47)
+* TREE_TYPE <3>:                         Expression trees.   (line    6)
+* TREE_TYPE <4>:                         Working with declarations.
+                                                             (line   11)
+* TREE_TYPE <5>:                         Types.              (line    6)
+* TREE_TYPE:                             Macros and Functions.
+                                                             (line    6)
+* TREE_VALUE:                            Containers.         (line    6)
+* TREE_VEC:                              Containers.         (line    6)
+* TREE_VEC_ELT:                          Containers.         (line    6)
+* TREE_VEC_LENGTH:                       Containers.         (line    6)
+* TRULY_NOOP_TRUNCATION:                 Misc.               (line  177)
+* TRUNC_DIV_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* TRUNC_MOD_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* truncate:                              Conversions.        (line   38)
+* truncMN2 instruction pattern:          Standard Names.     (line  834)
+* TRUTH_AND_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* TRUTH_ANDIF_EXPR:                      Unary and Binary Expressions.
+                                                             (line    6)
+* TRUTH_NOT_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* TRUTH_OR_EXPR:                         Unary and Binary Expressions.
+                                                             (line    6)
+* TRUTH_ORIF_EXPR:                       Unary and Binary Expressions.
+                                                             (line    6)
+* TRUTH_XOR_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* TRY_BLOCK:                             Statements for C++. (line    6)
+* TRY_HANDLERS:                          Statements for C++. (line    6)
+* TRY_STMTS:                             Statements for C++. (line    6)
+* Tuple specific accessors:              Tuple specific accessors.
+                                                             (line    6)
+* tuples:                                Tuple representation.
+                                                             (line    6)
+* type:                                  Types.              (line    6)
+* type declaration:                      Declarations.       (line    6)
+* TYPE_ALIGN <1>:                        Types for C++.      (line    6)
+* TYPE_ALIGN:                            Types.              (line    6)
+* TYPE_ARG_TYPES <1>:                    Types for C++.      (line    6)
+* TYPE_ARG_TYPES:                        Types.              (line    6)
+* TYPE_ASM_OP:                           Label Output.       (line   67)
+* TYPE_ATTRIBUTES:                       Attributes.         (line   25)
+* TYPE_BINFO:                            Classes.            (line    6)
+* TYPE_BUILT_IN:                         Types for C++.      (line   68)
+* TYPE_CANONICAL:                        Types.              (line    6)
+* TYPE_CONTEXT <1>:                      Types for C++.      (line    6)
+* TYPE_CONTEXT:                          Types.              (line    6)
+* TYPE_DECL:                             Declarations.       (line    6)
+* TYPE_FIELDS <1>:                       Classes.            (line    6)
+* TYPE_FIELDS <2>:                       Types for C++.      (line    6)
+* TYPE_FIELDS:                           Types.              (line    6)
+* TYPE_HAS_ARRAY_NEW_OPERATOR:           Classes.            (line   96)
+* TYPE_HAS_DEFAULT_CONSTRUCTOR:          Classes.            (line   81)
+* TYPE_HAS_MUTABLE_P:                    Classes.            (line   86)
+* TYPE_HAS_NEW_OPERATOR:                 Classes.            (line   93)
+* TYPE_MAIN_VARIANT <1>:                 Types for C++.      (line    6)
+* TYPE_MAIN_VARIANT:                     Types.              (line    6)
+* TYPE_MAX_VALUE:                        Types.              (line    6)
+* TYPE_METHOD_BASETYPE <1>:              Types for C++.      (line    6)
+* TYPE_METHOD_BASETYPE:                  Types.              (line    6)
+* TYPE_METHODS:                          Classes.            (line    6)
+* TYPE_MIN_VALUE:                        Types.              (line    6)
+* TYPE_NAME <1>:                         Types for C++.      (line    6)
+* TYPE_NAME:                             Types.              (line    6)
+* TYPE_NOTHROW_P:                        Functions for C++.  (line  154)
+* TYPE_OFFSET_BASETYPE <1>:              Types for C++.      (line    6)
+* TYPE_OFFSET_BASETYPE:                  Types.              (line    6)
+* TYPE_OPERAND_FMT:                      Label Output.       (line   78)
+* TYPE_OVERLOADS_ARRAY_REF:              Classes.            (line  104)
+* TYPE_OVERLOADS_ARROW:                  Classes.            (line  107)
+* TYPE_OVERLOADS_CALL_EXPR:              Classes.            (line  100)
+* TYPE_POLYMORPHIC_P:                    Classes.            (line   77)
+* TYPE_PRECISION <1>:                    Types for C++.      (line    6)
+* TYPE_PRECISION:                        Types.              (line    6)
+* TYPE_PTR_P:                            Types for C++.      (line   74)
+* TYPE_PTRFN_P:                          Types for C++.      (line   78)
+* TYPE_PTRMEM_P:                         Types for C++.      (line    6)
+* TYPE_PTROB_P:                          Types for C++.      (line   81)
+* TYPE_PTROBV_P:                         Types for C++.      (line    6)
+* TYPE_QUAL_CONST <1>:                   Types for C++.      (line    6)
+* TYPE_QUAL_CONST:                       Types.              (line    6)
+* TYPE_QUAL_RESTRICT <1>:                Types for C++.      (line    6)
+* TYPE_QUAL_RESTRICT:                    Types.              (line    6)
+* TYPE_QUAL_VOLATILE <1>:                Types for C++.      (line    6)
+* TYPE_QUAL_VOLATILE:                    Types.              (line    6)
+* TYPE_RAISES_EXCEPTIONS:                Functions for C++.  (line  149)
+* TYPE_SIZE <1>:                         Types for C++.      (line    6)
+* TYPE_SIZE:                             Types.              (line    6)
+* TYPE_STRUCTURAL_EQUALITY_P:            Types.              (line    6)
+* TYPE_UNQUALIFIED <1>:                  Types for C++.      (line    6)
+* TYPE_UNQUALIFIED:                      Types.              (line    6)
+* TYPE_VFIELD:                           Classes.            (line    6)
+* TYPENAME_TYPE:                         Types for C++.      (line    6)
+* TYPENAME_TYPE_FULLNAME <1>:            Types for C++.      (line    6)
+* TYPENAME_TYPE_FULLNAME:                Types.              (line    6)
+* TYPEOF_TYPE:                           Types for C++.      (line    6)
+* UDAmode:                               Machine Modes.      (line  168)
+* udiv:                                  Arithmetic.         (line  130)
+* udivM3 instruction pattern:            Standard Names.     (line  222)
+* udivmodM4 instruction pattern:         Standard Names.     (line  455)
+* udot_prodM instruction pattern:        Standard Names.     (line  292)
+* UDQmode:                               Machine Modes.      (line  136)
+* UHAmode:                               Machine Modes.      (line  160)
+* UHQmode:                               Machine Modes.      (line  128)
+* UINT16_TYPE:                           Type Layout.        (line  240)
+* UINT32_TYPE:                           Type Layout.        (line  241)
+* UINT64_TYPE:                           Type Layout.        (line  242)
+* UINT8_TYPE:                            Type Layout.        (line  239)
+* UINT_FAST16_TYPE:                      Type Layout.        (line  256)
+* UINT_FAST32_TYPE:                      Type Layout.        (line  257)
+* UINT_FAST64_TYPE:                      Type Layout.        (line  258)
+* UINT_FAST8_TYPE:                       Type Layout.        (line  255)
+* UINT_LEAST16_TYPE:                     Type Layout.        (line  248)
+* UINT_LEAST32_TYPE:                     Type Layout.        (line  249)
+* UINT_LEAST64_TYPE:                     Type Layout.        (line  250)
+* UINT_LEAST8_TYPE:                      Type Layout.        (line  247)
+* UINTMAX_TYPE:                          Type Layout.        (line  223)
+* UINTPTR_TYPE:                          Type Layout.        (line  260)
+* umaddMN4 instruction pattern:          Standard Names.     (line  402)
+* umax:                                  Arithmetic.         (line  149)
+* umaxM3 instruction pattern:            Standard Names.     (line  222)
+* umin:                                  Arithmetic.         (line  149)
+* uminM3 instruction pattern:            Standard Names.     (line  222)
+* umod:                                  Arithmetic.         (line  136)
+* umodM3 instruction pattern:            Standard Names.     (line  222)
+* umsubMN4 instruction pattern:          Standard Names.     (line  426)
+* umulhisi3 instruction pattern:         Standard Names.     (line  374)
+* umulM3_highpart instruction pattern:   Standard Names.     (line  388)
+* umulqihi3 instruction pattern:         Standard Names.     (line  374)
+* umulsidi3 instruction pattern:         Standard Names.     (line  374)
+* unchanging:                            Flags.              (line  324)
+* unchanging, in call_insn:              Flags.              (line   19)
+* unchanging, in jump_insn, call_insn and insn: Flags.       (line   39)
+* unchanging, in mem:                    Flags.              (line  152)
+* unchanging, in subreg:                 Flags.              (line  188)
+* unchanging, in symbol_ref:             Flags.              (line   10)
+* UNEQ_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* UNGE_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* UNGT_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* UNION_TYPE <1>:                        Classes.            (line    6)
+* UNION_TYPE:                            Types.              (line    6)
+* unions, returning:                     Interface.          (line   10)
+* UNITS_PER_WORD:                        Storage Layout.     (line   60)
+* UNKNOWN_TYPE <1>:                      Types for C++.      (line    6)
+* UNKNOWN_TYPE:                          Types.              (line    6)
+* UNLE_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* UNLIKELY_EXECUTED_TEXT_SECTION_NAME:   Sections.           (line   49)
+* UNLT_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* UNORDERED_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* unshare_all_rtl:                       Sharing.            (line   58)
+* unsigned division:                     Arithmetic.         (line  130)
+* unsigned division with unsigned saturation: Arithmetic.    (line  130)
+* unsigned greater than:                 Comparisons.        (line   64)
+* unsigned less than:                    Comparisons.        (line   68)
+* unsigned minimum and maximum:          Arithmetic.         (line  149)
+* unsigned_fix:                          Conversions.        (line   77)
+* unsigned_float:                        Conversions.        (line   62)
+* unsigned_fract_convert:                Conversions.        (line   97)
+* unsigned_sat_fract:                    Conversions.        (line  103)
+* unspec <1>:                            Constant Definitions.
+                                                             (line  111)
+* unspec:                                Side Effects.       (line  287)
+* unspec_volatile <1>:                   Constant Definitions.
+                                                             (line   99)
+* unspec_volatile:                       Side Effects.       (line  287)
+* untyped_call instruction pattern:      Standard Names.     (line 1012)
+* untyped_return instruction pattern:    Standard Names.     (line 1062)
+* UPDATE_PATH_HOST_CANONICALIZE (PATH):  Filesystem.         (line   59)
+* update_ssa:                            SSA.                (line   76)
+* update_stmt <1>:                       SSA Operands.       (line    6)
+* update_stmt:                           Manipulating GIMPLE statements.
+                                                             (line  141)
+* update_stmt_if_modified:               Manipulating GIMPLE statements.
+                                                             (line  144)
+* UQQmode:                               Machine Modes.      (line  123)
+* us_ashift:                             Arithmetic.         (line  173)
+* us_minus:                              Arithmetic.         (line   36)
+* us_mult:                               Arithmetic.         (line   92)
+* us_neg:                                Arithmetic.         (line   81)
+* us_plus:                               Arithmetic.         (line   14)
+* us_truncate:                           Conversions.        (line   48)
+* usaddM3 instruction pattern:           Standard Names.     (line  222)
+* USAmode:                               Machine Modes.      (line  164)
+* usashlM3 instruction pattern:          Standard Names.     (line  458)
+* usdivM3 instruction pattern:           Standard Names.     (line  222)
+* use:                                   Side Effects.       (line  162)
+* USE_C_ALLOCA:                          Host Misc.          (line   19)
+* USE_LD_AS_NEEDED:                      Driver.             (line  136)
+* USE_LOAD_POST_DECREMENT:               Costs.              (line  226)
+* USE_LOAD_POST_INCREMENT:               Costs.              (line  221)
+* USE_LOAD_PRE_DECREMENT:                Costs.              (line  236)
+* USE_LOAD_PRE_INCREMENT:                Costs.              (line  231)
+* use_param:                             GTY Options.        (line  109)
+* use_paramN:                            GTY Options.        (line  127)
+* use_params:                            GTY Options.        (line  135)
+* USE_SELECT_SECTION_FOR_FUNCTIONS:      Sections.           (line  195)
+* USE_STORE_POST_DECREMENT:              Costs.              (line  246)
+* USE_STORE_POST_INCREMENT:              Costs.              (line  241)
+* USE_STORE_PRE_DECREMENT:               Costs.              (line  256)
+* USE_STORE_PRE_INCREMENT:               Costs.              (line  251)
+* used:                                  Flags.              (line  342)
+* used, in symbol_ref:                   Flags.              (line  215)
+* USER_LABEL_PREFIX:                     Instruction Output. (line  154)
+* USING_STMT:                            Statements for C++. (line    6)
+* usmaddMN4 instruction pattern:         Standard Names.     (line  410)
+* usmsubMN4 instruction pattern:         Standard Names.     (line  434)
+* usmulhisi3 instruction pattern:        Standard Names.     (line  378)
+* usmulM3 instruction pattern:           Standard Names.     (line  222)
+* usmulqihi3 instruction pattern:        Standard Names.     (line  378)
+* usmulsidi3 instruction pattern:        Standard Names.     (line  378)
+* usnegM2 instruction pattern:           Standard Names.     (line  476)
+* USQmode:                               Machine Modes.      (line  132)
+* ussubM3 instruction pattern:           Standard Names.     (line  222)
+* usum_widenM3 instruction pattern:      Standard Names.     (line  302)
+* UTAmode:                               Machine Modes.      (line  172)
+* UTQmode:                               Machine Modes.      (line  140)
+* V in constraint:                       Simple Constraints. (line   43)
+* VA_ARG_EXPR:                           Unary and Binary Expressions.
+                                                             (line    6)
+* values, returned by functions:         Scalar Return.      (line    6)
+* VAR_DECL:                              Declarations.       (line    6)
+* var_location:                          Debug Information.  (line   14)
+* varargs implementation:                Varargs.            (line    6)
+* variable:                              Declarations.       (line    6)
+* Variable Location Debug Information in RTL: Debug Information.
+                                                             (line    6)
+* variable_size:                         GTY Options.        (line  225)
+* vashlM3 instruction pattern:           Standard Names.     (line  472)
+* vashrM3 instruction pattern:           Standard Names.     (line  472)
+* vec_concat:                            Vector Operations.  (line   28)
+* vec_duplicate:                         Vector Operations.  (line   33)
+* VEC_EXTRACT_EVEN_EXPR:                 Vectors.            (line    6)
+* vec_extract_evenM instruction pattern: Standard Names.     (line  176)
+* VEC_EXTRACT_ODD_EXPR:                  Vectors.            (line    6)
+* vec_extract_oddM instruction pattern:  Standard Names.     (line  183)
+* vec_extractM instruction pattern:      Standard Names.     (line  171)
+* vec_initM instruction pattern:         Standard Names.     (line  204)
+* VEC_INTERLEAVE_HIGH_EXPR:              Vectors.            (line    6)
+* vec_interleave_highM instruction pattern: Standard Names.  (line  190)
+* VEC_INTERLEAVE_LOW_EXPR:               Vectors.            (line    6)
+* vec_interleave_lowM instruction pattern: Standard Names.   (line  197)
+* VEC_LSHIFT_EXPR:                       Vectors.            (line    6)
+* vec_merge:                             Vector Operations.  (line   11)
+* VEC_PACK_FIX_TRUNC_EXPR:               Vectors.            (line    6)
+* VEC_PACK_SAT_EXPR:                     Vectors.            (line    6)
+* vec_pack_sfix_trunc_M instruction pattern: Standard Names. (line  329)
+* vec_pack_ssat_M instruction pattern:   Standard Names.     (line  322)
+* VEC_PACK_TRUNC_EXPR:                   Vectors.            (line    6)
+* vec_pack_trunc_M instruction pattern:  Standard Names.     (line  315)
+* vec_pack_ufix_trunc_M instruction pattern: Standard Names. (line  329)
+* vec_pack_usat_M instruction pattern:   Standard Names.     (line  322)
+* VEC_RSHIFT_EXPR:                       Vectors.            (line    6)
+* vec_select:                            Vector Operations.  (line   19)
+* vec_setM instruction pattern:          Standard Names.     (line  166)
+* vec_shl_M instruction pattern:         Standard Names.     (line  309)
+* vec_shr_M instruction pattern:         Standard Names.     (line  309)
+* VEC_UNPACK_FLOAT_HI_EXPR:              Vectors.            (line    6)
+* VEC_UNPACK_FLOAT_LO_EXPR:              Vectors.            (line    6)
+* VEC_UNPACK_HI_EXPR:                    Vectors.            (line    6)
+* VEC_UNPACK_LO_EXPR:                    Vectors.            (line    6)
+* vec_unpacks_float_hi_M instruction pattern: Standard Names.
+                                                             (line  351)
+* vec_unpacks_float_lo_M instruction pattern: Standard Names.
+                                                             (line  351)
+* vec_unpacks_hi_M instruction pattern:  Standard Names.     (line  336)
+* vec_unpacks_lo_M instruction pattern:  Standard Names.     (line  336)
+* vec_unpacku_float_hi_M instruction pattern: Standard Names.
+                                                             (line  351)
+* vec_unpacku_float_lo_M instruction pattern: Standard Names.
+                                                             (line  351)
+* vec_unpacku_hi_M instruction pattern:  Standard Names.     (line  344)
+* vec_unpacku_lo_M instruction pattern:  Standard Names.     (line  344)
+* VEC_WIDEN_MULT_HI_EXPR:                Vectors.            (line    6)
+* VEC_WIDEN_MULT_LO_EXPR:                Vectors.            (line    6)
+* vec_widen_smult_hi_M instruction pattern: Standard Names.  (line  360)
+* vec_widen_smult_lo_M instruction pattern: Standard Names.  (line  360)
+* vec_widen_umult_hi_M instruction pattern: Standard Names.  (line  360)
+* vec_widen_umult_lo__M instruction pattern: Standard Names. (line  360)
+* vector:                                Containers.         (line    6)
+* vector operations:                     Vector Operations.  (line    6)
+* VECTOR_CST:                            Constant expressions.
+                                                             (line    6)
+* VECTOR_STORE_FLAG_VALUE:               Misc.               (line  308)
+* virtual operands:                      SSA Operands.       (line    6)
+* VIRTUAL_INCOMING_ARGS_REGNUM:          Regs and Memory.    (line   59)
+* VIRTUAL_OUTGOING_ARGS_REGNUM:          Regs and Memory.    (line   87)
+* VIRTUAL_STACK_DYNAMIC_REGNUM:          Regs and Memory.    (line   78)
+* VIRTUAL_STACK_VARS_REGNUM:             Regs and Memory.    (line   69)
+* VLIW:                                  Processor pipeline description.
+                                                             (line    6)
+* vlshrM3 instruction pattern:           Standard Names.     (line  472)
+* VMS:                                   Filesystem.         (line   37)
+* VMS_DEBUGGING_INFO:                    VMS Debug.          (line    9)
+* VOID_TYPE:                             Types.              (line    6)
+* VOIDmode:                              Machine Modes.      (line  190)
+* volatil:                               Flags.              (line  356)
+* volatil, in insn, call_insn, jump_insn, code_label, barrier, and note: Flags.
+                                                             (line   44)
+* volatil, in label_ref and reg_label:   Flags.              (line   65)
+* volatil, in mem, asm_operands, and asm_input: Flags.       (line   94)
+* volatil, in reg:                       Flags.              (line  116)
+* volatil, in subreg:                    Flags.              (line  188)
+* volatil, in symbol_ref:                Flags.              (line  224)
+* volatile memory references:            Flags.              (line  357)
+* volatile, in prefetch:                 Flags.              (line  232)
+* voting between constraint alternatives: Class Preferences. (line    6)
+* vrotlM3 instruction pattern:           Standard Names.     (line  472)
+* vrotrM3 instruction pattern:           Standard Names.     (line  472)
+* walk_dominator_tree:                   SSA.                (line  256)
+* walk_gimple_op:                        Statement and operand traversals.
+                                                             (line   32)
+* walk_gimple_seq:                       Statement and operand traversals.
+                                                             (line   50)
+* walk_gimple_stmt:                      Statement and operand traversals.
+                                                             (line   13)
+* walk_use_def_chains:                   SSA.                (line  232)
+* WCHAR_TYPE:                            Type Layout.        (line  191)
+* WCHAR_TYPE_SIZE:                       Type Layout.        (line  199)
+* which_alternative:                     Output Statement.   (line   59)
+* WHILE_BODY:                            Statements for C++. (line    6)
+* WHILE_COND:                            Statements for C++. (line    6)
+* WHILE_STMT:                            Statements for C++. (line    6)
+* whopr:                                 LTO.                (line    6)
+* WIDEST_HARDWARE_FP_SIZE:               Type Layout.        (line  146)
+* WINT_TYPE:                             Type Layout.        (line  204)
+* word_mode:                             Machine Modes.      (line  336)
+* WORD_REGISTER_OPERATIONS:              Misc.               (line   63)
+* WORDS_BIG_ENDIAN:                      Storage Layout.     (line   29)
+* WORDS_BIG_ENDIAN, effect on subreg:    Regs and Memory.    (line  217)
+* wpa:                                   LTO.                (line    6)
+* X in constraint:                       Simple Constraints. (line  124)
+* x-HOST:                                Host Fragment.      (line    6)
+* XCmode:                                Machine Modes.      (line  197)
+* XCOFF_DEBUGGING_INFO:                  DBX Options.        (line   13)
+* XEXP:                                  Accessors.          (line    6)
+* XF_SIZE:                               Type Layout.        (line  130)
+* XFmode:                                Machine Modes.      (line   79)
+* XINT:                                  Accessors.          (line    6)
+* xm-MACHINE.h <1>:                      Host Misc.          (line    6)
+* xm-MACHINE.h:                          Filesystem.         (line    6)
+* xor:                                   Arithmetic.         (line  168)
+* xor, canonicalization of:              Insn Canonicalizations.
+                                                             (line   79)
+* xorM3 instruction pattern:             Standard Names.     (line  222)
+* XSTR:                                  Accessors.          (line    6)
+* XVEC:                                  Accessors.          (line   41)
+* XVECEXP:                               Accessors.          (line   48)
+* XVECLEN:                               Accessors.          (line   44)
+* XWINT:                                 Accessors.          (line    6)
+* zero_extend:                           Conversions.        (line   28)
+* zero_extendMN2 instruction pattern:    Standard Names.     (line  844)
+* zero_extract:                          Bit-Fields.         (line   30)
+* zero_extract, canonicalization of:     Insn Canonicalizations.
+                                                             (line   88)
+
+
+
+Tag Table:
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+Ref: Processor pipeline description-Footnote-11057498
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+Node: Invoking the garbage collector1631434
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+Node: Copying1678562
+Node: GNU Free Documentation License1716093
+Node: Contributors1741233
+Node: Option Index1778105
+Node: Concept Index1778909
+
+End Tag Table
diff --git a/gcc/doc/gccint.texi b/gcc/doc/gccint.texi
new file mode 100644
index 000000000..d4a8a583c
--- /dev/null
+++ b/gcc/doc/gccint.texi
@@ -0,0 +1,200 @@
+\input texinfo  @c -*-texinfo-*-
+@c %**start of header
+@setfilename gccint.info
+@c INTERNALS is used by md.texi to determine whether to include the
+@c whole of that file, in the internals manual, or only the part
+@c dealing with constraints, in the user manual.
+@set INTERNALS
+
+@c See miscellaneous notes in gcc.texi on checks/things to do.
+
+@include gcc-common.texi
+
+@settitle GNU Compiler Collection (GCC) Internals
+
+@c Create a separate index for command line options.
+@defcodeindex op
+@c Merge the standard indexes into a single one.
+@syncodeindex fn cp
+@syncodeindex vr cp
+@syncodeindex ky cp
+@syncodeindex pg cp
+@syncodeindex tp cp
+
+@paragraphindent 1
+
+@c %**end of header
+
+@copying
+Copyright @copyright{} 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
+2008, 2010 Free Software Foundation, Inc.
+
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being ``Funding Free Software'', the Front-Cover
+Texts being (a) (see below), and with the Back-Cover Texts being (b)
+(see below).  A copy of the license is included in the section entitled
+``GNU Free Documentation License''.
+
+(a) The FSF's Front-Cover Text is:
+
+     A GNU Manual
+
+(b) The FSF's Back-Cover Text is:
+
+     You have freedom to copy and modify this GNU Manual, like GNU
+     software.  Copies published by the Free Software Foundation raise
+     funds for GNU development.
+@end copying
+@ifnottex
+@dircategory Software development
+@direntry
+* gccint: (gccint).            Internals of the GNU Compiler Collection.
+@end direntry
+This file documents the internals of the GNU compilers.
+@sp 1
+@insertcopying
+@sp 1
+@end ifnottex
+
+@setchapternewpage odd
+@titlepage
+@title GNU Compiler Collection Internals
+@versionsubtitle
+@author Richard M. Stallman and the @sc{GCC} Developer Community
+@page
+@vskip 0pt plus 1filll
+@insertcopying
+@end titlepage
+@summarycontents
+@contents
+@page
+
+@node Top, Contributing,, (DIR)
+@top Introduction
+@cindex introduction
+
+This manual documents the internals of the GNU compilers, including
+how to port them to new targets and some information about how to
+write front ends for new languages.  It corresponds to the compilers
+@ifset VERSION_PACKAGE
+@value{VERSION_PACKAGE}
+@end ifset
+version @value{version-GCC}.  The use of the GNU compilers is documented in a
+separate manual.  @xref{Top,, Introduction, gcc, Using the GNU
+Compiler Collection (GCC)}.
+
+This manual is mainly a reference manual rather than a tutorial.  It
+discusses how to contribute to GCC (@pxref{Contributing}), the
+characteristics of the machines supported by GCC as hosts and targets
+(@pxref{Portability}), how GCC relates to the ABIs on such systems
+(@pxref{Interface}), and the characteristics of the languages for
+which GCC front ends are written (@pxref{Languages}).  It then
+describes the GCC source tree structure and build system, some of the
+interfaces to GCC front ends, and how support for a target system is
+implemented in GCC@.
+
+Additional tutorial information is linked to from
+@uref{http://gcc.gnu.org/readings.html}.
+
+@menu
+* Contributing::    How to contribute to testing and developing GCC.
+* Portability::     Goals of GCC's portability features.
+* Interface::       Function-call interface of GCC output.
+* Libgcc::          Low-level runtime library used by GCC.
+* Languages::       Languages for which GCC front ends are written.
+* Source Tree::     GCC source tree structure and build system.
+* Testsuites::      GCC testsuites.
+* Options::         Option specification files.
+* Passes::          Order of passes, what they do, and what each file is for.
+* GENERIC::         Language-independent representation generated by Front Ends
+* GIMPLE::          Tuple representation used by Tree SSA optimizers
+* Tree SSA::        Analysis and optimization of GIMPLE
+* RTL::             Machine-dependent low-level intermediate representation.
+* Control Flow::    Maintaining and manipulating the control flow graph.
+* Loop Analysis and Representation:: Analysis and representation of loops
+* Machine Desc::    How to write machine description instruction patterns.
+* Target Macros::   How to write the machine description C macros and functions.
+* Host Config::     Writing the @file{xm-@var{machine}.h} file.
+* Fragments::       Writing the @file{t-@var{target}} and @file{x-@var{host}} files.
+* Collect2::        How @code{collect2} works; how it finds @code{ld}.
+* Header Dirs::     Understanding the standard header file directories.
+* Type Information:: GCC's memory management; generating type information.
+* Plugins::         Extending the compiler with plugins.
+* LTO::             Using Link-Time Optimization.
+
+* Funding::         How to help assure funding for free software.
+* GNU Project::     The GNU Project and GNU/Linux.
+
+* Copying::         GNU General Public License says
+                    how you can copy and share GCC.
+* GNU Free Documentation License:: How you can copy and share this manual.
+* Contributors::    People who have contributed to GCC.
+
+* Option Index::    Index to command line options.
+* Concept Index::   Index of concepts and symbol names.
+@end menu
+
+@include contribute.texi
+@include portability.texi
+@include interface.texi
+@include libgcc.texi
+@include languages.texi
+@include sourcebuild.texi
+@include options.texi
+@include passes.texi
+@include rtl.texi
+@include generic.texi
+@include gimple.texi
+@include tree-ssa.texi
+@include loop.texi
+@include cfg.texi
+@include md.texi
+@include tm.texi
+@include hostconfig.texi
+@include fragments.texi
+@include collect2.texi
+@include headerdirs.texi
+@include gty.texi
+@include plugins.texi
+@include lto.texi
+
+@include funding.texi
+@include gnu.texi
+@include gpl_v3.texi
+
+@c ---------------------------------------------------------------------
+@c GFDL
+@c ---------------------------------------------------------------------
+
+@include fdl.texi
+
+@include contrib.texi
+
+@c ---------------------------------------------------------------------
+@c Indexes
+@c ---------------------------------------------------------------------
+
+@node Option Index
+@unnumbered Option Index
+
+GCC's command line options are indexed here without any initial @samp{-}
+or @samp{--}.  Where an option has both positive and negative forms
+(such as @option{-f@var{option}} and @option{-fno-@var{option}}),
+relevant entries in the manual are indexed under the most appropriate
+form; it may sometimes be useful to look up both forms.
+
+@printindex op
+
+@node Concept Index
+@unnumbered Concept Index
+
+@printindex cp
+
+@c ---------------------------------------------------------------------
+@c Epilogue
+@c ---------------------------------------------------------------------
+
+@bye
diff --git a/gcc/doc/gcj-dbtool.1 b/gcc/doc/gcj-dbtool.1
new file mode 100644
index 000000000..2b3015055
--- /dev/null
+++ b/gcc/doc/gcj-dbtool.1
@@ -0,0 +1,238 @@
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+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GCJ-DBTOOL 1"
+.TH GCJ-DBTOOL 1 "2013-04-12" "gcc-4.6.4" "GNU"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+gcj\-dbtool \- Manipulate class file mapping databases for libgcj
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+gcj-dbtool \fB\s-1OPTION\s0\fR \fI\s-1DBFILE\s0\fR [\fB\s-1MORE\s0\fR] ...
+.PP
+gcj-dbtool [\fB\-0\fR] [\fB\-\fR] [\fB\-n\fR] [\fB\-a\fR] [\fB\-f\fR]
+  [\fB\-t\fR] [\fB\-l\fR] [\fB\-p\fR [\fI\s-1LIBDIR\s0\fR]]
+  [\fB\-v\fR] [\fB\-m\fR] [\fB\-\-version\fR] [\fB\-\-help\fR]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\f(CW\*(C`gcj\-dbtool\*(C'\fR is a tool for creating and manipulating class file
+mapping databases.  \f(CW\*(C`libgcj\*(C'\fR can use these databases to find a
+shared library corresponding to the bytecode representation of a
+class.  This functionality is useful for ahead-of-time compilation of
+a program that has no knowledge of \f(CW\*(C`gcj\*(C'\fR.
+.PP
+\&\f(CW\*(C`gcj\-dbtool\*(C'\fR works best if all the jar files added to it are
+compiled using \f(CW\*(C`\-findirect\-dispatch\*(C'\fR.
+.PP
+Note that \f(CW\*(C`gcj\-dbtool\*(C'\fR is currently available as \*(L"preview
+technology\*(R".  We believe it is a reasonable way to allow
+application-transparent ahead-of-time compilation, but this is an
+unexplored area.  We welcome your comments.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-n\fR \fI\s-1DBFILE\s0\fR \fB[\fR\fI\s-1SIZE\s0\fR\fB]\fR" 4
+.IX Item "-n DBFILE [SIZE]"
+This creates a new database.  Currently, databases cannot be resized;
+you can choose a larger initial size if desired.  The default size is
+32,749.
+.IP "\fB\-a\fR \fI\s-1DBFILE\s0\fR\fB \fR\fI\s-1JARFILE\s0\fR\fB \fR\fI\s-1LIB\s0\fR" 4
+.IX Item "-a DBFILE JARFILE LIB"
+.PD 0
+.IP "\fB\-f\fR \fI\s-1DBFILE\s0\fR\fB \fR\fI\s-1JARFILE\s0\fR\fB \fR\fI\s-1LIB\s0\fR" 4
+.IX Item "-f DBFILE JARFILE LIB"
+.PD
+This adds a jar file to the database.  For each class file in the jar,
+a cryptographic signature of the bytecode representation of the class
+is recorded in the database.  At runtime, a class is looked up by its
+signature and the compiled form of the class is looked for in the
+corresponding shared library.  The \fB\-a\fR option will verify
+that \fI\s-1LIB\s0\fR exists before adding it to the database; \fB\-f\fR
+skips this check.
+.IP "\fB[\fR\fB\-\fR\fB][\fR\fB\-0\fR\fB] \-m\fR \fI\s-1DBFILE\s0\fR\fB \fR\fI\s-1DBFILE\s0\fR\fB,[\fR\fI\s-1DBFILE\s0\fR\fB]\fR" 4
+.IX Item "[-][-0] -m DBFILE DBFILE,[DBFILE]"
+Merge a number of databases.  The output database overwrites any
+existing database.  To add databases into an existing database,
+include the destination in the list of sources.
+.Sp
+If \fB\-\fR or \fB\-0\fR are used, the list of files to read is
+taken from standard input instead of the command line.  For
+\&\fB\-0\fR, Input filenames are terminated by a null character
+instead of by whitespace.  Useful when arguments might contain white
+space.  The \s-1GNU\s0 find \-print0 option produces input suitable for this
+mode.
+.IP "\fB\-t\fR \fI\s-1DBFILE\s0\fR" 4
+.IX Item "-t DBFILE"
+Test a database.
+.IP "\fB\-l\fR \fI\s-1DBFILE\s0\fR" 4
+.IX Item "-l DBFILE"
+List the contents of a database.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+Print the name of the default database.  If there is no default
+database, this prints a blank line.  If \fI\s-1LIBDIR\s0\fR is specified, use
+it instead of the default library directory component of the database
+name.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Print a help message, then exit.
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD 0
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD
+Print version information, then exit.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgcc\fR\|(1), \fIgcj\fR\|(1), \fIgcjh\fR\|(1), \fIjcf\-dump\fR\|(1), \fIgfdl\fR\|(7),
+and the Info entries for \fIgcj\fR and \fIgcc\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, the Front-Cover Texts being (a) (see below), and
+with the Back-Cover Texts being (b) (see below).
+A copy of the license is included in the
+man page \fIgfdl\fR\|(7).
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\&     A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\&     You have freedom to copy and modify this GNU Manual, like GNU
+\&     software.  Copies published by the Free Software Foundation raise
+\&     funds for GNU development.
+.Ve
diff --git a/gcc/doc/gcj.1 b/gcc/doc/gcj.1
new file mode 100644
index 000000000..0d20410a4
--- /dev/null
+++ b/gcc/doc/gcj.1
@@ -0,0 +1,584 @@
+.\" Automatically generated by Pod::Man 2.25 (Pod::Simple 3.16)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  \*(C+ will
+.\" give a nicer C++.  Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available.  \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GCJ 1"
+.TH GCJ 1 "2013-04-12" "gcc-4.6.4" "GNU"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+gcj \- Ahead\-of\-time compiler for the Java language
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+gcj [\fB\-I\fR\fIdir\fR...] [\fB\-d\fR \fIdir\fR...]
+    [\fB\-\-CLASSPATH\fR=\fIpath\fR] [\fB\-\-classpath\fR=\fIpath\fR]
+    [\fB\-f\fR\fIoption\fR...] [\fB\-\-encoding\fR=\fIname\fR]
+    [\fB\-\-main\fR=\fIclassname\fR] [\fB\-D\fR\fIname\fR[=\fIvalue\fR]...]
+    [\fB\-C\fR] [\fB\-\-resource\fR \fIresource-name\fR] [\fB\-d\fR \fIdirectory\fR]
+    [\fB\-W\fR\fIwarn\fR...]
+    \fIsourcefile\fR...
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+As \fBgcj\fR is just another front end to \fBgcc\fR, it supports many
+of the same options as gcc.    This manual only documents the
+options specific to \fBgcj\fR.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.SS "Input and output files"
+.IX Subsection "Input and output files"
+A \fBgcj\fR command is like a \fBgcc\fR command, in that it
+consists of a number of options and file names.  The following kinds
+of input file names are supported:
+.IP "\fIfile\fR\fB.java\fR" 4
+.IX Item "file.java"
+Java source files.
+.IP "\fIfile\fR\fB.class\fR" 4
+.IX Item "file.class"
+Java bytecode files.
+.IP "\fIfile\fR\fB.zip\fR" 4
+.IX Item "file.zip"
+.PD 0
+.IP "\fIfile\fR\fB.jar\fR" 4
+.IX Item "file.jar"
+.PD
+An archive containing one or more \f(CW\*(C`.class\*(C'\fR files, all of
+which are compiled.  The archive may be compressed.  Files in
+an archive which don't end with \fB.class\fR are treated as
+resource files; they are compiled into the resulting object file
+as \fBcore:\fR URLs.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+A file containing a whitespace-separated list of input file names.
+(Currently, these must all be \f(CW\*(C`.java\*(C'\fR source files, but that
+may change.)
+Each named file is compiled, just as if it had been on the command line.
+.IP "\fIlibrary\fR\fB.a\fR" 4
+.IX Item "library.a"
+.PD 0
+.IP "\fIlibrary\fR\fB.so\fR" 4
+.IX Item "library.so"
+.IP "\fB\-l\fR\fIlibname\fR" 4
+.IX Item "-llibname"
+.PD
+Libraries to use when linking.  See the \fBgcc\fR manual.
+.PP
+You can specify more than one input file on the \fBgcj\fR command line,
+in which case they will all be compiled.  If you specify a
+\&\f(CW\*(C`\-o \f(CIFILENAME\f(CW\*(C'\fR
+option, all the input files will be compiled together, producing a
+single output file, named \fI\s-1FILENAME\s0\fR.
+This is allowed even when using \f(CW\*(C`\-S\*(C'\fR or \f(CW\*(C`\-c\*(C'\fR,
+but not when using \f(CW\*(C`\-C\*(C'\fR or \f(CW\*(C`\-\-resource\*(C'\fR.
+(This is an extension beyond the what plain \fBgcc\fR allows.)
+(If more than one input file is specified, all must currently
+be \f(CW\*(C`.java\*(C'\fR files, though we hope to fix this.)
+.SS "Input Options"
+.IX Subsection "Input Options"
+\&\fBgcj\fR has options to control where it looks to find files it needs.
+For instance, \fBgcj\fR might need to load a class that is referenced
+by the file it has been asked to compile.  Like other compilers for the
+Java language, \fBgcj\fR has a notion of a \fIclass path\fR.  There are
+several options and environment variables which can be used to
+manipulate the class path.  When \fBgcj\fR looks for a given class, it
+searches the class path looking for matching \fI.class\fR or
+\&\fI.java\fR file.  \fBgcj\fR comes with a built-in class path which
+points at the installed \fIlibgcj.jar\fR, a file which contains all the
+standard classes.
+.PP
+In the text below, a directory or path component can refer either to an
+actual directory on the filesystem, or to a \fI.zip\fR or \fI.jar\fR
+file, which \fBgcj\fR will search as if it is a directory.
+.IP "\fB\-I\fR\fIdir\fR" 4
+.IX Item "-Idir"
+All directories specified by \f(CW\*(C`\-I\*(C'\fR are kept in order and prepended
+to the class path constructed from all the other options.  Unless
+compatibility with tools like \f(CW\*(C`javac\*(C'\fR is important, we recommend
+always using \f(CW\*(C`\-I\*(C'\fR instead of the other options for manipulating the
+class path.
+.IP "\fB\-\-classpath=\fR\fIpath\fR" 4
+.IX Item "--classpath=path"
+This sets the class path to \fIpath\fR, a colon-separated list of paths
+(on Windows-based systems, a semicolon-separate list of paths).
+This does not override the builtin (\*(L"boot\*(R") search path.
+.IP "\fB\-\-CLASSPATH=\fR\fIpath\fR" 4
+.IX Item "--CLASSPATH=path"
+Deprecated synonym for \f(CW\*(C`\-\-classpath\*(C'\fR.
+.IP "\fB\-\-bootclasspath=\fR\fIpath\fR" 4
+.IX Item "--bootclasspath=path"
+Where to find the standard builtin classes, such as \f(CW\*(C`java.lang.String\*(C'\fR.
+.IP "\fB\-\-extdirs=\fR\fIpath\fR" 4
+.IX Item "--extdirs=path"
+For each directory in the \fIpath\fR, place the contents of that
+directory at the end of the class path.
+.IP "\fB\s-1CLASSPATH\s0\fR" 4
+.IX Item "CLASSPATH"
+This is an environment variable which holds a list of paths.
+.PP
+The final class path is constructed like so:
+.IP "\(bu" 4
+First come all directories specified via \f(CW\*(C`\-I\*(C'\fR.
+.IP "\(bu" 4
+If \fB\-\-classpath\fR is specified, its value is appended.
+Otherwise, if the \f(CW\*(C`CLASSPATH\*(C'\fR environment variable is specified,
+then its value is appended.
+Otherwise, the current directory (\f(CW"."\fR) is appended.
+.IP "\(bu" 4
+If \f(CW\*(C`\-\-bootclasspath\*(C'\fR was specified, append its value.
+Otherwise, append the built-in system directory, \fIlibgcj.jar\fR.
+.IP "\(bu" 4
+Finally, if \f(CW\*(C`\-\-extdirs\*(C'\fR was specified, append the contents of the
+specified directories at the end of the class path.  Otherwise, append
+the contents of the built-in extdirs at \f(CW\*(C`$(prefix)/share/java/ext\*(C'\fR.
+.PP
+The classfile built by \fBgcj\fR for the class \f(CW\*(C`java.lang.Object\*(C'\fR
+(and placed in \f(CW\*(C`libgcj.jar\*(C'\fR) contains a special zero length
+attribute \f(CW\*(C`gnu.gcj.gcj\-compiled\*(C'\fR. The compiler looks for this
+attribute when loading \f(CW\*(C`java.lang.Object\*(C'\fR and will report an error
+if it isn't found, unless it compiles to bytecode (the option
+\&\f(CW\*(C`\-fforce\-classes\-archive\-check\*(C'\fR can be used to override this
+behavior in this particular case.)
+.IP "\fB\-fforce\-classes\-archive\-check\fR" 4
+.IX Item "-fforce-classes-archive-check"
+This forces the compiler to always check for the special zero length
+attribute \f(CW\*(C`gnu.gcj.gcj\-compiled\*(C'\fR in \f(CW\*(C`java.lang.Object\*(C'\fR and
+issue an error if it isn't found.
+.IP "\fB\-fsource=\fR\fI\s-1VERSION\s0\fR" 4
+.IX Item "-fsource=VERSION"
+This option is used to choose the source version accepted by
+\&\fBgcj\fR.  The default is \fB1.5\fR.
+.SS "Encodings"
+.IX Subsection "Encodings"
+The Java programming language uses Unicode throughout.  In an effort to
+integrate well with other locales, \fBgcj\fR allows \fI.java\fR files
+to be written using almost any encoding.  \fBgcj\fR knows how to
+convert these encodings into its internal encoding at compile time.
+.PP
+You can use the \f(CW\*(C`\-\-encoding=\f(CINAME\f(CW\*(C'\fR option to specify an
+encoding (of a particular character set) to use for source files.  If
+this is not specified, the default encoding comes from your current
+locale.  If your host system has insufficient locale support, then
+\&\fBgcj\fR assumes the default encoding to be the \fB\s-1UTF\-8\s0\fR encoding
+of Unicode.
+.PP
+To implement \f(CW\*(C`\-\-encoding\*(C'\fR, \fBgcj\fR simply uses the host
+platform's \f(CW\*(C`iconv\*(C'\fR conversion routine.  This means that in practice
+\&\fBgcj\fR is limited by the capabilities of the host platform.
+.PP
+The names allowed for the argument \f(CW\*(C`\-\-encoding\*(C'\fR vary from platform
+to platform (since they are not standardized anywhere).  However,
+\&\fBgcj\fR implements the encoding named \fB\s-1UTF\-8\s0\fR internally, so if
+you choose to use this for your source files you can be assured that it
+will work on every host.
+.SS "Warnings"
+.IX Subsection "Warnings"
+\&\fBgcj\fR implements several warnings.  As with other generic
+\&\fBgcc\fR warnings, if an option of the form \f(CW\*(C`\-Wfoo\*(C'\fR enables a
+warning, then \f(CW\*(C`\-Wno\-foo\*(C'\fR will disable it.  Here we've chosen to
+document the form of the warning which will have an effect \*(-- the
+default being the opposite of what is listed.
+.IP "\fB\-Wredundant\-modifiers\fR" 4
+.IX Item "-Wredundant-modifiers"
+With this flag, \fBgcj\fR will warn about redundant modifiers.  For
+instance, it will warn if an interface method is declared \f(CW\*(C`public\*(C'\fR.
+.IP "\fB\-Wextraneous\-semicolon\fR" 4
+.IX Item "-Wextraneous-semicolon"
+This causes \fBgcj\fR to warn about empty statements.  Empty statements
+have been deprecated.
+.IP "\fB\-Wno\-out\-of\-date\fR" 4
+.IX Item "-Wno-out-of-date"
+This option will cause \fBgcj\fR not to warn when a source file is
+newer than its matching class file.  By default \fBgcj\fR will warn
+about this.
+.IP "\fB\-Wno\-deprecated\fR" 4
+.IX Item "-Wno-deprecated"
+Warn if a deprecated class, method, or field is referred to.
+.IP "\fB\-Wunused\fR" 4
+.IX Item "-Wunused"
+This is the same as \fBgcc\fR's \f(CW\*(C`\-Wunused\*(C'\fR.
+.IP "\fB\-Wall\fR" 4
+.IX Item "-Wall"
+This is the same as \f(CW\*(C`\-Wredundant\-modifiers \-Wextraneous\-semicolon
+\&\-Wunused\*(C'\fR.
+.SS "Linking"
+.IX Subsection "Linking"
+To turn a Java application into an executable program,
+you need to link it with the needed libraries, just as for C or \*(C+.
+The linker by default looks for a global function named \f(CW\*(C`main\*(C'\fR.
+Since Java does not have global functions, and a
+collection of Java classes may have more than one class with a
+\&\f(CW\*(C`main\*(C'\fR method, you need to let the linker know which of those
+\&\f(CW\*(C`main\*(C'\fR methods it should invoke when starting the application.
+You can do that in any of these ways:
+.IP "\(bu" 4
+Specify the class containing the desired \f(CW\*(C`main\*(C'\fR method
+when you link the application, using the \f(CW\*(C`\-\-main\*(C'\fR flag,
+described below.
+.IP "\(bu" 4
+Link the Java package(s) into a shared library (dll) rather than an
+executable.  Then invoke the application using the \f(CW\*(C`gij\*(C'\fR program,
+making sure that \f(CW\*(C`gij\*(C'\fR can find the libraries it needs.
+.IP "\(bu" 4
+Link the Java packages(s) with the flag \f(CW\*(C`\-lgij\*(C'\fR, which links
+in the \f(CW\*(C`main\*(C'\fR routine from the \f(CW\*(C`gij\*(C'\fR command.
+This allows you to select the class whose \f(CW\*(C`main\*(C'\fR method you
+want to run when you run the application.  You can also use
+other \f(CW\*(C`gij\*(C'\fR flags, such as \f(CW\*(C`\-D\*(C'\fR flags to set properties.
+Using the \f(CW\*(C`\-lgij\*(C'\fR library (rather than the \f(CW\*(C`gij\*(C'\fR program
+of the previous mechanism) has some advantages: it is compatible with
+static linking, and does not require configuring or installing libraries.
+.PP
+These \f(CW\*(C`gij\*(C'\fR options relate to linking an executable:
+.IP "\fB\-\-main=\fR\fI\s-1CLASSNAME\s0\fR" 4
+.IX Item "--main=CLASSNAME"
+This option is used when linking to specify the name of the class whose
+\&\f(CW\*(C`main\*(C'\fR method should be invoked when the resulting executable is
+run.
+.IP "\fB\-D\fR\fIname\fR\fB[=\fR\fIvalue\fR\fB]\fR" 4
+.IX Item "-Dname[=value]"
+This option can only be used with \f(CW\*(C`\-\-main\*(C'\fR.  It defines a system
+property named \fIname\fR with value \fIvalue\fR.  If \fIvalue\fR is not
+specified then it defaults to the empty string.  These system properties
+are initialized at the program's startup and can be retrieved at runtime
+using the \f(CW\*(C`java.lang.System.getProperty\*(C'\fR method.
+.IP "\fB\-lgij\fR" 4
+.IX Item "-lgij"
+Create an application whose command-line processing is that
+of the \f(CW\*(C`gij\*(C'\fR command.
+.Sp
+This option is an alternative to using \f(CW\*(C`\-\-main\*(C'\fR; you cannot use both.
+.IP "\fB\-static\-libgcj\fR" 4
+.IX Item "-static-libgcj"
+This option causes linking to be done against a static version of the
+libgcj runtime library.  This option is only available if
+corresponding linker support exists.
+.Sp
+\&\fBCaution:\fR Static linking of libgcj may cause essential parts
+of libgcj to be omitted.  Some parts of libgcj use reflection to load
+classes at runtime.  Since the linker does not see these references at
+link time, it can omit the referred to classes.  The result is usually
+(but not always) a \f(CW\*(C`ClassNotFoundException\*(C'\fR being thrown at
+runtime. Caution must be used when using this option.  For more
+details see:
+<\fBhttp://gcc.gnu.org/wiki/Statically%20linking%20libgcj\fR>
+.SS "Code Generation"
+.IX Subsection "Code Generation"
+In addition to the many \fBgcc\fR options controlling code generation,
+\&\fBgcj\fR has several options specific to itself.
+.IP "\fB\-C\fR" 4
+.IX Item "-C"
+This option is used to tell \fBgcj\fR to generate bytecode
+(\fI.class\fR files) rather than object code.
+.IP "\fB\-\-resource\fR \fIresource-name\fR" 4
+.IX Item "--resource resource-name"
+This option is used to tell \fBgcj\fR to compile the contents of a
+given file to object code so it may be accessed at runtime with the core
+protocol handler as \fBcore:/\fR\fIresource-name\fR.  Note that
+\&\fIresource-name\fR is the name of the resource as found at runtime; for
+instance, it could be used in a call to \f(CW\*(C`ResourceBundle.getBundle\*(C'\fR.
+The actual file name to be compiled this way must be specified
+separately.
+.IP "\fB\-ftarget=\fR\fI\s-1VERSION\s0\fR" 4
+.IX Item "-ftarget=VERSION"
+This can be used with \fB\-C\fR to choose the version of bytecode
+emitted by \fBgcj\fR.  The default is \fB1.5\fR.  When not
+generating bytecode, this option has no effect.
+.IP "\fB\-d\fR \fIdirectory\fR" 4
+.IX Item "-d directory"
+When used with \f(CW\*(C`\-C\*(C'\fR, this causes all generated \fI.class\fR files
+to be put in the appropriate subdirectory of \fIdirectory\fR.  By
+default they will be put in subdirectories of the current working
+directory.
+.IP "\fB\-fno\-bounds\-check\fR" 4
+.IX Item "-fno-bounds-check"
+By default, \fBgcj\fR generates code which checks the bounds of all
+array indexing operations.  With this option, these checks are omitted, which
+can improve performance for code that uses arrays extensively.  Note that this 
+can result in unpredictable behavior if the code in question actually does 
+violate array bounds constraints.  It is safe to use this option if you are 
+sure that your code will never throw an \f(CW\*(C`ArrayIndexOutOfBoundsException\*(C'\fR.
+.IP "\fB\-fno\-store\-check\fR" 4
+.IX Item "-fno-store-check"
+Don't generate array store checks.  When storing objects into arrays, a runtime
+check is normally generated in order to ensure that the object is assignment
+compatible with the component type of the array (which may not be known
+at compile-time).  With this option, these checks are omitted.  This can 
+improve performance for code which stores objects into arrays frequently.
+It is safe to use this option if you are sure your code will never throw an 
+\&\f(CW\*(C`ArrayStoreException\*(C'\fR.
+.IP "\fB\-fjni\fR" 4
+.IX Item "-fjni"
+With \fBgcj\fR there are two options for writing native methods: \s-1CNI\s0
+and \s-1JNI\s0.  By default \fBgcj\fR assumes you are using \s-1CNI\s0.  If you are
+compiling a class with native methods, and these methods are implemented
+using \s-1JNI\s0, then you must use \f(CW\*(C`\-fjni\*(C'\fR.  This option causes
+\&\fBgcj\fR to generate stubs which will invoke the underlying \s-1JNI\s0
+methods.
+.IP "\fB\-fno\-assert\fR" 4
+.IX Item "-fno-assert"
+Don't recognize the \f(CW\*(C`assert\*(C'\fR keyword.  This is for compatibility
+with older versions of the language specification.
+.IP "\fB\-fno\-optimize\-static\-class\-initialization\fR" 4
+.IX Item "-fno-optimize-static-class-initialization"
+When the optimization level is greater or equal to \f(CW\*(C`\-O2\*(C'\fR,
+\&\fBgcj\fR will try to optimize the way calls into the runtime are made
+to initialize static classes upon their first use (this optimization
+isn't carried out if \f(CW\*(C`\-C\*(C'\fR was specified.) When compiling to native
+code, \f(CW\*(C`\-fno\-optimize\-static\-class\-initialization\*(C'\fR will turn this
+optimization off, regardless of the optimization level in use.
+.IP "\fB\-\-disable\-assertions[=\fR\fIclass-or-package\fR\fB]\fR" 4
+.IX Item "--disable-assertions[=class-or-package]"
+Don't include code for checking assertions in the compiled code.
+If \f(CW\*(C`=\f(CIclass\-or\-package\f(CW\*(C'\fR is missing disables assertion code
+generation for all classes, unless overridden by a more
+specific \f(CW\*(C`\-\-enable\-assertions\*(C'\fR flag.
+If \fIclass-or-package\fR is a class name, only disables generating
+assertion checks within the named class or its inner classes.
+If \fIclass-or-package\fR is a package name, disables generating
+assertion checks within the named package or a subpackage.
+.Sp
+By default, assertions are enabled when generating class files
+or when not optimizing, and disabled when generating optimized binaries.
+.IP "\fB\-\-enable\-assertions[=\fR\fIclass-or-package\fR\fB]\fR" 4
+.IX Item "--enable-assertions[=class-or-package]"
+Generates code to check assertions.  The option is perhaps misnamed,
+as you still need to turn on assertion checking at run-time,
+and we don't support any easy way to do that.
+So this flag isn't very useful yet, except to partially override
+\&\f(CW\*(C`\-\-disable\-assertions\*(C'\fR.
+.IP "\fB\-findirect\-dispatch\fR" 4
+.IX Item "-findirect-dispatch"
+\&\fBgcj\fR has a special binary compatibility \s-1ABI\s0, which is enabled
+by the \f(CW\*(C`\-findirect\-dispatch\*(C'\fR option.  In this mode, the code
+generated by \fBgcj\fR honors the binary compatibility guarantees
+in the Java Language Specification, and the resulting object files do
+not need to be directly linked against their dependencies.  Instead,
+all dependencies are looked up at runtime.  This allows free mixing of
+interpreted and compiled code.
+.Sp
+Note that, at present, \f(CW\*(C`\-findirect\-dispatch\*(C'\fR can only be used
+when compiling \fI.class\fR files.  It will not work when compiling
+from source.  \s-1CNI\s0 also does not yet work with the binary compatibility
+\&\s-1ABI\s0.  These restrictions will be lifted in some future release.
+.Sp
+However, if you compile \s-1CNI\s0 code with the standard \s-1ABI\s0, you can call
+it from code built with the binary compatibility \s-1ABI\s0.
+.IP "\fB\-fbootstrap\-classes\fR" 4
+.IX Item "-fbootstrap-classes"
+This option can be use to tell \f(CW\*(C`libgcj\*(C'\fR that the compiled classes
+should be loaded by the bootstrap loader, not the system class loader.
+By default, if you compile a class and link it into an executable, it
+will be treated as if it was loaded using the system class loader.
+This is convenient, as it means that things like
+\&\f(CW\*(C`Class.forName()\*(C'\fR will search \fB\s-1CLASSPATH\s0\fR to find the
+desired class.
+.IP "\fB\-freduced\-reflection\fR" 4
+.IX Item "-freduced-reflection"
+This option causes the code generated by \fBgcj\fR to contain a
+reduced amount of the class meta-data used to support runtime
+reflection. The cost of this savings is the loss of
+the ability to use certain reflection capabilities of the standard
+Java runtime environment. When set all meta-data except for that
+which is needed to obtain correct runtime semantics is eliminated.
+.Sp
+For code that does not use reflection (i.e. serialization, \s-1RMI\s0, \s-1CORBA\s0
+or call methods in the \f(CW\*(C`java.lang.reflect\*(C'\fR package),
+\&\f(CW\*(C`\-freduced\-reflection\*(C'\fR will result in proper operation with a
+savings in executable code size.
+.Sp
+\&\s-1JNI\s0 (\f(CW\*(C`\-fjni\*(C'\fR) and the binary compatibility \s-1ABI\s0
+(\f(CW\*(C`\-findirect\-dispatch\*(C'\fR) do not work properly without full
+reflection meta-data.  Because of this, it is an error to use these options
+with \f(CW\*(C`\-freduced\-reflection\*(C'\fR.
+.Sp
+\&\fBCaution:\fR If there is no reflection meta-data, code that uses
+a \f(CW\*(C`SecurityManager\*(C'\fR may not work properly.  Also calling
+\&\f(CW\*(C`Class.forName()\*(C'\fR may fail if the calling method has no
+reflection meta-data.
+.SS "Configure-time Options"
+.IX Subsection "Configure-time Options"
+Some \fBgcj\fR code generations options affect the resulting \s-1ABI\s0, and
+so can only be meaningfully given when \f(CW\*(C`libgcj\*(C'\fR, the runtime
+package, is configured.  \f(CW\*(C`libgcj\*(C'\fR puts the appropriate options from
+this group into a \fBspec\fR file which is read by \fBgcj\fR.  These
+options are listed here for completeness; if you are using \f(CW\*(C`libgcj\*(C'\fR
+then you won't want to touch these options.
+.IP "\fB\-fuse\-boehm\-gc\fR" 4
+.IX Item "-fuse-boehm-gc"
+This enables the use of the Boehm \s-1GC\s0 bitmap marking code.  In particular
+this causes \fBgcj\fR to put an object marking descriptor into each
+vtable.
+.IP "\fB\-fhash\-synchronization\fR" 4
+.IX Item "-fhash-synchronization"
+By default, synchronization data (the data used for \f(CW\*(C`synchronize\*(C'\fR,
+\&\f(CW\*(C`wait\*(C'\fR, and \f(CW\*(C`notify\*(C'\fR) is pointed to by a word in each object.
+With this option \fBgcj\fR assumes that this information is stored in a
+hash table and not in the object itself.
+.IP "\fB\-fuse\-divide\-subroutine\fR" 4
+.IX Item "-fuse-divide-subroutine"
+On some systems, a library routine is called to perform integer
+division.  This is required to get exception handling correct when
+dividing by zero.
+.IP "\fB\-fcheck\-references\fR" 4
+.IX Item "-fcheck-references"
+On some systems it's necessary to insert inline checks whenever
+accessing an object via a reference.  On other systems you won't need
+this because null pointer accesses are caught automatically by the
+processor.
+.IP "\fB\-fuse\-atomic\-builtins\fR" 4
+.IX Item "-fuse-atomic-builtins"
+On some systems, gcc can generate code for built-in atomic operations.
+Use this option to force gcj to use these builtins when compiling Java
+code.  Where this capability is present it should be automatically
+detected, so you won't usually need to use this option.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgcc\fR\|(1), \fIgcjh\fR\|(1), \fIgjnih\fR\|(1), \fIgij\fR\|(1), \fIjcf\-dump\fR\|(1), \fIgfdl\fR\|(7),
+and the Info entries for \fIgcj\fR and \fIgcc\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, the Front-Cover Texts being (a) (see below), and
+with the Back-Cover Texts being (b) (see below).
+A copy of the license is included in the
+man page \fIgfdl\fR\|(7).
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\&     A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\&     You have freedom to copy and modify this GNU Manual, like GNU
+\&     software.  Copies published by the Free Software Foundation raise
+\&     funds for GNU development.
+.Ve
diff --git a/gcc/doc/gcj.info b/gcc/doc/gcj.info
new file mode 100644
index 000000000..b4b0ef359
--- /dev/null
+++ b/gcc/doc/gcj.info
@@ -0,0 +1,3694 @@
+This is doc/gcj.info, produced by makeinfo version 4.13 from
+/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/java/gcj.texi.
+
+Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010 Free
+Software Foundation, Inc.
+
+   Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, the Front-Cover Texts being (a) (see below), and
+with the Back-Cover Texts being (b) (see below).  A copy of the license
+is included in the section entitled "GNU Free Documentation License".
+
+   (a) The FSF's Front-Cover Text is:
+
+   A GNU Manual
+
+   (b) The FSF's Back-Cover Text is:
+
+   You have freedom to copy and modify this GNU Manual, like GNU
+software.  Copies published by the Free Software Foundation raise
+funds for GNU development.
+
+INFO-DIR-SECTION Software development
+START-INFO-DIR-ENTRY
+* Gcj: (gcj).               Ahead-of-time compiler for the Java language
+END-INFO-DIR-ENTRY
+
+INFO-DIR-SECTION Individual utilities
+START-INFO-DIR-ENTRY
+* jcf-dump: (gcj)Invoking jcf-dump.
+                            Print information about Java class files
+* gij: (gcj)Invoking gij.   GNU interpreter for Java bytecode
+* gcj-dbtool: (gcj)Invoking gcj-dbtool.
+                            Tool for manipulating class file databases.
+* jv-convert: (gcj)Invoking jv-convert.
+                            Convert file from one encoding to another
+* grmic: (gcj)Invoking grmic.
+                            Generate stubs for Remote Method Invocation.
+* gc-analyze: (gcj)Invoking gc-analyze.
+                            Analyze Garbage Collector (GC) memory dumps.
+* aot-compile: (gcj)Invoking aot-compile.
+                            Compile bytecode to native and generate databases.
+* rebuild-gcj-db: (gcj)Invoking rebuild-gcj-db.
+                            Merge the per-solib databases made by aot-compile
+                            into one system-wide database.
+END-INFO-DIR-ENTRY
+
+   Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010
+Free Software Foundation, Inc.
+
+   Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, the Front-Cover Texts being (a) (see below), and
+with the Back-Cover Texts being (b) (see below).  A copy of the license
+is included in the section entitled "GNU Free Documentation License".
+
+   (a) The FSF's Front-Cover Text is:
+
+   A GNU Manual
+
+   (b) The FSF's Back-Cover Text is:
+
+   You have freedom to copy and modify this GNU Manual, like GNU
+software.  Copies published by the Free Software Foundation raise
+funds for GNU development.
+
+
+File: gcj.info,  Node: Top,  Next: Copying,  Up: (dir)
+
+Introduction
+************
+
+This manual describes how to use `gcj', the GNU compiler for the Java
+programming language.  `gcj' can generate both `.class' files and
+object files, and it can read both Java source code and `.class' files.
+
+* Menu:
+
+* Copying::             The GNU General Public License
+* GNU Free Documentation License::
+                        How you can share and copy this manual
+* Invoking gcj::        Compiler options supported by `gcj'
+* Compatibility::       Compatibility between gcj and other tools for Java
+* Invoking jcf-dump::   Print information about class files
+* Invoking gij::        Interpreting Java bytecodes
+* Invoking gcj-dbtool:: Tool for manipulating class file databases.
+* Invoking jv-convert:: Converting from one encoding to another
+* Invoking grmic::      Generate stubs for Remote Method Invocation.
+* Invoking gc-analyze:: Analyze Garbage Collector (GC) memory dumps.
+* Invoking aot-compile:: Compile bytecode to native and generate databases.
+* Invoking rebuild-gcj-db:: Merge the per-solib databases made by aot-compile
+                            into one system-wide database.
+* About CNI::           Description of the Compiled Native Interface
+* System properties::   Modifying runtime behavior of the libgcj library
+* Resources::           Where to look for more information
+* Index::               Index.
+
+
+File: gcj.info,  Node: Copying,  Next: GNU Free Documentation License,  Prev: Top,  Up: Top
+
+GNU General Public License
+**************************
+
+                        Version 3, 29 June 2007
+
+     Copyright (C) 2007 Free Software Foundation, Inc. `http://fsf.org/'
+
+     Everyone is permitted to copy and distribute verbatim copies of this
+     license document, but changing it is not allowed.
+
+Preamble
+========
+
+The GNU General Public License is a free, copyleft license for software
+and other kinds of works.
+
+   The licenses for most software and other practical works are designed
+to take away your freedom to share and change the works.  By contrast,
+the GNU General Public License is intended to guarantee your freedom to
+share and change all versions of a program-to make sure it remains free
+software for all its users.  We, the Free Software Foundation, use the
+GNU General Public License for most of our software; it applies also to
+any other work released this way by its authors.  You can apply it to
+your programs, too.
+
+   When we speak of free software, we are referring to freedom, not
+price.  Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+them if you wish), that you receive source code or can get it if you
+want it, that you can change the software or use pieces of it in new
+free programs, and that you know you can do these things.
+
+   To protect your rights, we need to prevent others from denying you
+these rights or asking you to surrender the rights.  Therefore, you
+have certain responsibilities if you distribute copies of the software,
+or if you modify it: responsibilities to respect the freedom of others.
+
+   For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must pass on to the recipients the same
+freedoms that you received.  You must make sure that they, too, receive
+or can get the source code.  And you must show them these terms so they
+know their rights.
+
+   Developers that use the GNU GPL protect your rights with two steps:
+(1) assert copyright on the software, and (2) offer you this License
+giving you legal permission to copy, distribute and/or modify it.
+
+   For the developers' and authors' protection, the GPL clearly explains
+that there is no warranty for this free software.  For both users' and
+authors' sake, the GPL requires that modified versions be marked as
+changed, so that their problems will not be attributed erroneously to
+authors of previous versions.
+
+   Some devices are designed to deny users access to install or run
+modified versions of the software inside them, although the
+manufacturer can do so.  This is fundamentally incompatible with the
+aim of protecting users' freedom to change the software.  The
+systematic pattern of such abuse occurs in the area of products for
+individuals to use, which is precisely where it is most unacceptable.
+Therefore, we have designed this version of the GPL to prohibit the
+practice for those products.  If such problems arise substantially in
+other domains, we stand ready to extend this provision to those domains
+in future versions of the GPL, as needed to protect the freedom of
+users.
+
+   Finally, every program is threatened constantly by software patents.
+States should not allow patents to restrict development and use of
+software on general-purpose computers, but in those that do, we wish to
+avoid the special danger that patents applied to a free program could
+make it effectively proprietary.  To prevent this, the GPL assures that
+patents cannot be used to render the program non-free.
+
+   The precise terms and conditions for copying, distribution and
+modification follow.
+
+TERMS AND CONDITIONS
+====================
+
+  0. Definitions.
+
+     "This License" refers to version 3 of the GNU General Public
+     License.
+
+     "Copyright" also means copyright-like laws that apply to other
+     kinds of works, such as semiconductor masks.
+
+     "The Program" refers to any copyrightable work licensed under this
+     License.  Each licensee is addressed as "you".  "Licensees" and
+     "recipients" may be individuals or organizations.
+
+     To "modify" a work means to copy from or adapt all or part of the
+     work in a fashion requiring copyright permission, other than the
+     making of an exact copy.  The resulting work is called a "modified
+     version" of the earlier work or a work "based on" the earlier work.
+
+     A "covered work" means either the unmodified Program or a work
+     based on the Program.
+
+     To "propagate" a work means to do anything with it that, without
+     permission, would make you directly or secondarily liable for
+     infringement under applicable copyright law, except executing it
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+     copying, distribution (with or without modification), making
+     available to the public, and in some countries other activities as
+     well.
+
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+     An interactive user interface displays "Appropriate Legal Notices"
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+  1. Source Code.
+
+     The "source code" for a work means the preferred form of the work
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+
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+     Source.
+
+     The Corresponding Source for a work in source code form is that
+     same work.
+
+  2. Basic Permissions.
+
+     All rights granted under this License are granted for the term of
+     copyright on the Program, and are irrevocable provided the stated
+     conditions are met.  This License explicitly affirms your unlimited
+     permission to run the unmodified Program.  The output from running
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+     given its content, constitutes a covered work.  This License
+     acknowledges your rights of fair use or other equivalent, as
+     provided by copyright law.
+
+     You may make, run and propagate covered works that you do not
+     convey, without conditions so long as your license otherwise
+     remains in force.  You may convey covered works to others for the
+     sole purpose of having them make modifications exclusively for
+     you, or provide you with facilities for running those works,
+     provided that you comply with the terms of this License in
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+     Those thus making or running the covered works for you must do so
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+     copyrighted material outside their relationship with you.
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+     Conveying under any other circumstances is permitted solely under
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+
+  3. Protecting Users' Legal Rights From Anti-Circumvention Law.
+
+     No covered work shall be deemed part of an effective technological
+     measure under any applicable law fulfilling obligations under
+     article 11 of the WIPO copyright treaty adopted on 20 December
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+     such measures.
+
+     When you convey a covered work, you waive any legal power to forbid
+     circumvention of technological measures to the extent such
+     circumvention is effected by exercising rights under this License
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+     to limit operation or modification of the work as a means of
+     enforcing, against the work's users, your or third parties' legal
+     rights to forbid circumvention of technological measures.
+
+  4. Conveying Verbatim Copies.
+
+     You may convey verbatim copies of the Program's source code as you
+     receive it, in any medium, provided that you conspicuously and
+     appropriately publish on each copy an appropriate copyright notice;
+     keep intact all notices stating that this License and any
+     non-permissive terms added in accord with section 7 apply to the
+     code; keep intact all notices of the absence of any warranty; and
+     give all recipients a copy of this License along with the Program.
+
+     You may charge any price or no price for each copy that you convey,
+     and you may offer support or warranty protection for a fee.
+
+  5. Conveying Modified Source Versions.
+
+     You may convey a work based on the Program, or the modifications to
+     produce it from the Program, in the form of source code under the
+     terms of section 4, provided that you also meet all of these
+     conditions:
+
+       a. The work must carry prominent notices stating that you
+          modified it, and giving a relevant date.
+
+       b. The work must carry prominent notices stating that it is
+          released under this License and any conditions added under
+          section 7.  This requirement modifies the requirement in
+          section 4 to "keep intact all notices".
+
+       c. You must license the entire work, as a whole, under this
+          License to anyone who comes into possession of a copy.  This
+          License will therefore apply, along with any applicable
+          section 7 additional terms, to the whole of the work, and all
+          its parts, regardless of how they are packaged.  This License
+          gives no permission to license the work in any other way, but
+          it does not invalidate such permission if you have separately
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+
+       d. If the work has interactive user interfaces, each must display
+          Appropriate Legal Notices; however, if the Program has
+          interactive interfaces that do not display Appropriate Legal
+          Notices, your work need not make them do so.
+
+     A compilation of a covered work with other separate and independent
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+     program, in or on a volume of a storage or distribution medium, is
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+     copyright are not used to limit the access or legal rights of the
+     compilation's users beyond what the individual works permit.
+     Inclusion of a covered work in an aggregate does not cause this
+     License to apply to the other parts of the aggregate.
+
+  6. Conveying Non-Source Forms.
+
+     You may convey a covered work in object code form under the terms
+     of sections 4 and 5, provided that you also convey the
+     machine-readable Corresponding Source under the terms of this
+     License, in one of these ways:
+
+       a. Convey the object code in, or embodied in, a physical product
+          (including a physical distribution medium), accompanied by the
+          Corresponding Source fixed on a durable physical medium
+          customarily used for software interchange.
+
+       b. Convey the object code in, or embodied in, a physical product
+          (including a physical distribution medium), accompanied by a
+          written offer, valid for at least three years and valid for
+          as long as you offer spare parts or customer support for that
+          product model, to give anyone who possesses the object code
+          either (1) a copy of the Corresponding Source for all the
+          software in the product that is covered by this License, on a
+          durable physical medium customarily used for software
+          interchange, for a price no more than your reasonable cost of
+          physically performing this conveying of source, or (2) access
+          to copy the Corresponding Source from a network server at no
+          charge.
+
+       c. Convey individual copies of the object code with a copy of
+          the written offer to provide the Corresponding Source.  This
+          alternative is allowed only occasionally and noncommercially,
+          and only if you received the object code with such an offer,
+          in accord with subsection 6b.
+
+       d. Convey the object code by offering access from a designated
+          place (gratis or for a charge), and offer equivalent access
+          to the Corresponding Source in the same way through the same
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+          to copy the Corresponding Source along with the object code.
+          If the place to copy the object code is a network server, the
+          Corresponding Source may be on a different server (operated
+          by you or a third party) that supports equivalent copying
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+          the object code saying where to find the Corresponding Source.
+          Regardless of what server hosts the Corresponding Source, you
+          remain obligated to ensure that it is available for as long
+          as needed to satisfy these requirements.
+
+       e. Convey the object code using peer-to-peer transmission,
+          provided you inform other peers where the object code and
+          Corresponding Source of the work are being offered to the
+          general public at no charge under subsection 6d.
+
+
+     A separable portion of the object code, whose source code is
+     excluded from the Corresponding Source as a System Library, need
+     not be included in conveying the object code work.
+
+     A "User Product" is either (1) a "consumer product", which means
+     any tangible personal property which is normally used for personal,
+     family, or household purposes, or (2) anything designed or sold for
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+     "normally used" refers to a typical or common use of that class of
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+     way in which the particular user actually uses, or expects or is
+     expected to use, the product.  A product is a consumer product
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+
+     "Installation Information" for a User Product means any methods,
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+     The information must suffice to ensure that the continued
+     functioning of the modified object code is in no case prevented or
+     interfered with solely because modification has been made.
+
+     If you convey an object code work under this section in, or with,
+     or specifically for use in, a User Product, and the conveying
+     occurs as part of a transaction in which the right of possession
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+     section must be accompanied by the Installation Information.  But
+     this requirement does not apply if neither you nor any third party
+     retains the ability to install modified object code on the User
+     Product (for example, the work has been installed in ROM).
+
+     The requirement to provide Installation Information does not
+     include a requirement to continue to provide support service,
+     warranty, or updates for a work that has been modified or
+     installed by the recipient, or for the User Product in which it
+     has been modified or installed.  Access to a network may be denied
+     when the modification itself materially and adversely affects the
+     operation of the network or violates the rules and protocols for
+     communication across the network.
+
+     Corresponding Source conveyed, and Installation Information
+     provided, in accord with this section must be in a format that is
+     publicly documented (and with an implementation available to the
+     public in source code form), and must require no special password
+     or key for unpacking, reading or copying.
+
+  7. Additional Terms.
+
+     "Additional permissions" are terms that supplement the terms of
+     this License by making exceptions from one or more of its
+     conditions.  Additional permissions that are applicable to the
+     entire Program shall be treated as though they were included in
+     this License, to the extent that they are valid under applicable
+     law.  If additional permissions apply only to part of the Program,
+     that part may be used separately under those permissions, but the
+     entire Program remains governed by this License without regard to
+     the additional permissions.
+
+     When you convey a copy of a covered work, you may at your option
+     remove any additional permissions from that copy, or from any part
+     of it.  (Additional permissions may be written to require their own
+     removal in certain cases when you modify the work.)  You may place
+     additional permissions on material, added by you to a covered work,
+     for which you have or can give appropriate copyright permission.
+
+     Notwithstanding any other provision of this License, for material
+     you add to a covered work, you may (if authorized by the copyright
+     holders of that material) supplement the terms of this License
+     with terms:
+
+       a. Disclaiming warranty or limiting liability differently from
+          the terms of sections 15 and 16 of this License; or
+
+       b. Requiring preservation of specified reasonable legal notices
+          or author attributions in that material or in the Appropriate
+          Legal Notices displayed by works containing it; or
+
+       c. Prohibiting misrepresentation of the origin of that material,
+          or requiring that modified versions of such material be
+          marked in reasonable ways as different from the original
+          version; or
+
+       d. Limiting the use for publicity purposes of names of licensors
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+
+       e. Declining to grant rights under trademark law for use of some
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+
+       f. Requiring indemnification of licensors and authors of that
+          material by anyone who conveys the material (or modified
+          versions of it) with contractual assumptions of liability to
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+          assumptions directly impose on those licensors and authors.
+
+     All other non-permissive additional terms are considered "further
+     restrictions" within the meaning of section 10.  If the Program as
+     you received it, or any part of it, contains a notice stating that
+     it is governed by this License along with a term that is a further
+     restriction, you may remove that term.  If a license document
+     contains a further restriction but permits relicensing or
+     conveying under this License, you may add to a covered work
+     material governed by the terms of that license document, provided
+     that the further restriction does not survive such relicensing or
+     conveying.
+
+     If you add terms to a covered work in accord with this section, you
+     must place, in the relevant source files, a statement of the
+     additional terms that apply to those files, or a notice indicating
+     where to find the applicable terms.
+
+     Additional terms, permissive or non-permissive, may be stated in
+     the form of a separately written license, or stated as exceptions;
+     the above requirements apply either way.
+
+  8. Termination.
+
+     You may not propagate or modify a covered work except as expressly
+     provided under this License.  Any attempt otherwise to propagate or
+     modify it is void, and will automatically terminate your rights
+     under this License (including any patent licenses granted under
+     the third paragraph of section 11).
+
+     However, if you cease all violation of this License, then your
+     license from a particular copyright holder is reinstated (a)
+     provisionally, unless and until the copyright holder explicitly
+     and finally terminates your license, and (b) permanently, if the
+     copyright holder fails to notify you of the violation by some
+     reasonable means prior to 60 days after the cessation.
+
+     Moreover, your license from a particular copyright holder is
+     reinstated permanently if the copyright holder notifies you of the
+     violation by some reasonable means, this is the first time you have
+     received notice of violation of this License (for any work) from
+     that copyright holder, and you cure the violation prior to 30 days
+     after your receipt of the notice.
+
+     Termination of your rights under this section does not terminate
+     the licenses of parties who have received copies or rights from
+     you under this License.  If your rights have been terminated and
+     not permanently reinstated, you do not qualify to receive new
+     licenses for the same material under section 10.
+
+  9. Acceptance Not Required for Having Copies.
+
+     You are not required to accept this License in order to receive or
+     run a copy of the Program.  Ancillary propagation of a covered work
+     occurring solely as a consequence of using peer-to-peer
+     transmission to receive a copy likewise does not require
+     acceptance.  However, nothing other than this License grants you
+     permission to propagate or modify any covered work.  These actions
+     infringe copyright if you do not accept this License.  Therefore,
+     by modifying or propagating a covered work, you indicate your
+     acceptance of this License to do so.
+
+ 10. Automatic Licensing of Downstream Recipients.
+
+     Each time you convey a covered work, the recipient automatically
+     receives a license from the original licensors, to run, modify and
+     propagate that work, subject to this License.  You are not
+     responsible for enforcing compliance by third parties with this
+     License.
+
+     An "entity transaction" is a transaction transferring control of an
+     organization, or substantially all assets of one, or subdividing an
+     organization, or merging organizations.  If propagation of a
+     covered work results from an entity transaction, each party to that
+     transaction who receives a copy of the work also receives whatever
+     licenses to the work the party's predecessor in interest had or
+     could give under the previous paragraph, plus a right to
+     possession of the Corresponding Source of the work from the
+     predecessor in interest, if the predecessor has it or can get it
+     with reasonable efforts.
+
+     You may not impose any further restrictions on the exercise of the
+     rights granted or affirmed under this License.  For example, you
+     may not impose a license fee, royalty, or other charge for
+     exercise of rights granted under this License, and you may not
+     initiate litigation (including a cross-claim or counterclaim in a
+     lawsuit) alleging that any patent claim is infringed by making,
+     using, selling, offering for sale, or importing the Program or any
+     portion of it.
+
+ 11. Patents.
+
+     A "contributor" is a copyright holder who authorizes use under this
+     License of the Program or a work on which the Program is based.
+     The work thus licensed is called the contributor's "contributor
+     version".
+
+     A contributor's "essential patent claims" are all patent claims
+     owned or controlled by the contributor, whether already acquired or
+     hereafter acquired, that would be infringed by some manner,
+     permitted by this License, of making, using, or selling its
+     contributor version, but do not include claims that would be
+     infringed only as a consequence of further modification of the
+     contributor version.  For purposes of this definition, "control"
+     includes the right to grant patent sublicenses in a manner
+     consistent with the requirements of this License.
+
+     Each contributor grants you a non-exclusive, worldwide,
+     royalty-free patent license under the contributor's essential
+     patent claims, to make, use, sell, offer for sale, import and
+     otherwise run, modify and propagate the contents of its
+     contributor version.
+
+     In the following three paragraphs, a "patent license" is any
+     express agreement or commitment, however denominated, not to
+     enforce a patent (such as an express permission to practice a
+     patent or covenant not to sue for patent infringement).  To
+     "grant" such a patent license to a party means to make such an
+     agreement or commitment not to enforce a patent against the party.
+
+     If you convey a covered work, knowingly relying on a patent
+     license, and the Corresponding Source of the work is not available
+     for anyone to copy, free of charge and under the terms of this
+     License, through a publicly available network server or other
+     readily accessible means, then you must either (1) cause the
+     Corresponding Source to be so available, or (2) arrange to deprive
+     yourself of the benefit of the patent license for this particular
+     work, or (3) arrange, in a manner consistent with the requirements
+     of this License, to extend the patent license to downstream
+     recipients.  "Knowingly relying" means you have actual knowledge
+     that, but for the patent license, your conveying the covered work
+     in a country, or your recipient's use of the covered work in a
+     country, would infringe one or more identifiable patents in that
+     country that you have reason to believe are valid.
+
+     If, pursuant to or in connection with a single transaction or
+     arrangement, you convey, or propagate by procuring conveyance of, a
+     covered work, and grant a patent license to some of the parties
+     receiving the covered work authorizing them to use, propagate,
+     modify or convey a specific copy of the covered work, then the
+     patent license you grant is automatically extended to all
+     recipients of the covered work and works based on it.
+
+     A patent license is "discriminatory" if it does not include within
+     the scope of its coverage, prohibits the exercise of, or is
+     conditioned on the non-exercise of one or more of the rights that
+     are specifically granted under this License.  You may not convey a
+     covered work if you are a party to an arrangement with a third
+     party that is in the business of distributing software, under
+     which you make payment to the third party based on the extent of
+     your activity of conveying the work, and under which the third
+     party grants, to any of the parties who would receive the covered
+     work from you, a discriminatory patent license (a) in connection
+     with copies of the covered work conveyed by you (or copies made
+     from those copies), or (b) primarily for and in connection with
+     specific products or compilations that contain the covered work,
+     unless you entered into that arrangement, or that patent license
+     was granted, prior to 28 March 2007.
+
+     Nothing in this License shall be construed as excluding or limiting
+     any implied license or other defenses to infringement that may
+     otherwise be available to you under applicable patent law.
+
+ 12. No Surrender of Others' Freedom.
+
+     If conditions are imposed on you (whether by court order,
+     agreement or otherwise) that contradict the conditions of this
+     License, they do not excuse you from the conditions of this
+     License.  If you cannot convey a covered work so as to satisfy
+     simultaneously your obligations under this License and any other
+     pertinent obligations, then as a consequence you may not convey it
+     at all.  For example, if you agree to terms that obligate you to
+     collect a royalty for further conveying from those to whom you
+     convey the Program, the only way you could satisfy both those
+     terms and this License would be to refrain entirely from conveying
+     the Program.
+
+ 13. Use with the GNU Affero General Public License.
+
+     Notwithstanding any other provision of this License, you have
+     permission to link or combine any covered work with a work licensed
+     under version 3 of the GNU Affero General Public License into a
+     single combined work, and to convey the resulting work.  The terms
+     of this License will continue to apply to the part which is the
+     covered work, but the special requirements of the GNU Affero
+     General Public License, section 13, concerning interaction through
+     a network will apply to the combination as such.
+
+ 14. Revised Versions of this License.
+
+     The Free Software Foundation may publish revised and/or new
+     versions of the GNU General Public License from time to time.
+     Such new versions will be similar in spirit to the present
+     version, but may differ in detail to address new problems or
+     concerns.
+
+     Each version is given a distinguishing version number.  If the
+     Program specifies that a certain numbered version of the GNU
+     General Public License "or any later version" applies to it, you
+     have the option of following the terms and conditions either of
+     that numbered version or of any later version published by the
+     Free Software Foundation.  If the Program does not specify a
+     version number of the GNU General Public License, you may choose
+     any version ever published by the Free Software Foundation.
+
+     If the Program specifies that a proxy can decide which future
+     versions of the GNU General Public License can be used, that
+     proxy's public statement of acceptance of a version permanently
+     authorizes you to choose that version for the Program.
+
+     Later license versions may give you additional or different
+     permissions.  However, no additional obligations are imposed on any
+     author or copyright holder as a result of your choosing to follow a
+     later version.
+
+ 15. Disclaimer of Warranty.
+
+     THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY
+     APPLICABLE LAW.  EXCEPT WHEN OTHERWISE STATED IN WRITING THE
+     COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS"
+     WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED,
+     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE ENTIRE
+     RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.
+     SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL
+     NECESSARY SERVICING, REPAIR OR CORRECTION.
+
+ 16. Limitation of Liability.
+
+     IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN
+     WRITING WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES
+     AND/OR CONVEYS THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU
+     FOR DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR
+     CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE
+     THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA
+     BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD
+     PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+     PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF
+     THE POSSIBILITY OF SUCH DAMAGES.
+
+ 17. Interpretation of Sections 15 and 16.
+
+     If the disclaimer of warranty and limitation of liability provided
+     above cannot be given local legal effect according to their terms,
+     reviewing courts shall apply local law that most closely
+     approximates an absolute waiver of all civil liability in
+     connection with the Program, unless a warranty or assumption of
+     liability accompanies a copy of the Program in return for a fee.
+
+
+END OF TERMS AND CONDITIONS
+===========================
+
+How to Apply These Terms to Your New Programs
+=============================================
+
+If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these
+terms.
+
+   To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+state the exclusion of warranty; and each file should have at least the
+"copyright" line and a pointer to where the full notice is found.
+
+     ONE LINE TO GIVE THE PROGRAM'S NAME AND A BRIEF IDEA OF WHAT IT DOES.
+     Copyright (C) YEAR NAME OF AUTHOR
+
+     This program is free software: you can redistribute it and/or modify
+     it under the terms of the GNU General Public License as published by
+     the Free Software Foundation, either version 3 of the License, or (at
+     your option) any later version.
+
+     This program is distributed in the hope that it will be useful, but
+     WITHOUT ANY WARRANTY; without even the implied warranty of
+     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+     General Public License for more details.
+
+     You should have received a copy of the GNU General Public License
+     along with this program.  If not, see `http://www.gnu.org/licenses/'.
+
+   Also add information on how to contact you by electronic and paper
+mail.
+
+   If the program does terminal interaction, make it output a short
+notice like this when it starts in an interactive mode:
+
+     PROGRAM Copyright (C) YEAR NAME OF AUTHOR
+     This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+     This is free software, and you are welcome to redistribute it
+     under certain conditions; type `show c' for details.
+
+   The hypothetical commands `show w' and `show c' should show the
+appropriate parts of the General Public License.  Of course, your
+program's commands might be different; for a GUI interface, you would
+use an "about box".
+
+   You should also get your employer (if you work as a programmer) or
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary.  For more information on this, and how to apply and follow
+the GNU GPL, see `http://www.gnu.org/licenses/'.
+
+   The GNU General Public License does not permit incorporating your
+program into proprietary programs.  If your program is a subroutine
+library, you may consider it more useful to permit linking proprietary
+applications with the library.  If this is what you want to do, use the
+GNU Lesser General Public License instead of this License.  But first,
+please read `http://www.gnu.org/philosophy/why-not-lgpl.html'.
+
+
+File: gcj.info,  Node: GNU Free Documentation License,  Next: Invoking gcj,  Prev: Copying,  Up: Top
+
+GNU Free Documentation License
+******************************
+
+                     Version 1.3, 3 November 2008
+
+     Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
+     `http://fsf.org/'
+
+     Everyone is permitted to copy and distribute verbatim copies
+     of this license document, but changing it is not allowed.
+
+  0. PREAMBLE
+
+     The purpose of this License is to make a manual, textbook, or other
+     functional and useful document "free" in the sense of freedom: to
+     assure everyone the effective freedom to copy and redistribute it,
+     with or without modifying it, either commercially or
+     noncommercially.  Secondarily, this License preserves for the
+     author and publisher a way to get credit for their work, while not
+     being considered responsible for modifications made by others.
+
+     This License is a kind of "copyleft", which means that derivative
+     works of the document must themselves be free in the same sense.
+     It complements the GNU General Public License, which is a copyleft
+     license designed for free software.
+
+     We have designed this License in order to use it for manuals for
+     free software, because free software needs free documentation: a
+     free program should come with manuals providing the same freedoms
+     that the software does.  But this License is not limited to
+     software manuals; it can be used for any textual work, regardless
+     of subject matter or whether it is published as a printed book.
+     We recommend this License principally for works whose purpose is
+     instruction or reference.
+
+  1. APPLICABILITY AND DEFINITIONS
+
+     This License applies to any manual or other work, in any medium,
+     that contains a notice placed by the copyright holder saying it
+     can be distributed under the terms of this License.  Such a notice
+     grants a world-wide, royalty-free license, unlimited in duration,
+     to use that work under the conditions stated herein.  The
+     "Document", below, refers to any such manual or work.  Any member
+     of the public is a licensee, and is addressed as "you".  You
+     accept the license if you copy, modify or distribute the work in a
+     way requiring permission under copyright law.
+
+     A "Modified Version" of the Document means any work containing the
+     Document or a portion of it, either copied verbatim, or with
+     modifications and/or translated into another language.
+
+     A "Secondary Section" is a named appendix or a front-matter section
+     of the Document that deals exclusively with the relationship of the
+     publishers or authors of the Document to the Document's overall
+     subject (or to related matters) and contains nothing that could
+     fall directly within that overall subject.  (Thus, if the Document
+     is in part a textbook of mathematics, a Secondary Section may not
+     explain any mathematics.)  The relationship could be a matter of
+     historical connection with the subject or with related matters, or
+     of legal, commercial, philosophical, ethical or political position
+     regarding them.
+
+     The "Invariant Sections" are certain Secondary Sections whose
+     titles are designated, as being those of Invariant Sections, in
+     the notice that says that the Document is released under this
+     License.  If a section does not fit the above definition of
+     Secondary then it is not allowed to be designated as Invariant.
+     The Document may contain zero Invariant Sections.  If the Document
+     does not identify any Invariant Sections then there are none.
+
+     The "Cover Texts" are certain short passages of text that are
+     listed, as Front-Cover Texts or Back-Cover Texts, in the notice
+     that says that the Document is released under this License.  A
+     Front-Cover Text may be at most 5 words, and a Back-Cover Text may
+     be at most 25 words.
+
+     A "Transparent" copy of the Document means a machine-readable copy,
+     represented in a format whose specification is available to the
+     general public, that is suitable for revising the document
+     straightforwardly with generic text editors or (for images
+     composed of pixels) generic paint programs or (for drawings) some
+     widely available drawing editor, and that is suitable for input to
+     text formatters or for automatic translation to a variety of
+     formats suitable for input to text formatters.  A copy made in an
+     otherwise Transparent file format whose markup, or absence of
+     markup, has been arranged to thwart or discourage subsequent
+     modification by readers is not Transparent.  An image format is
+     not Transparent if used for any substantial amount of text.  A
+     copy that is not "Transparent" is called "Opaque".
+
+     Examples of suitable formats for Transparent copies include plain
+     ASCII without markup, Texinfo input format, LaTeX input format,
+     SGML or XML using a publicly available DTD, and
+     standard-conforming simple HTML, PostScript or PDF designed for
+     human modification.  Examples of transparent image formats include
+     PNG, XCF and JPG.  Opaque formats include proprietary formats that
+     can be read and edited only by proprietary word processors, SGML or
+     XML for which the DTD and/or processing tools are not generally
+     available, and the machine-generated HTML, PostScript or PDF
+     produced by some word processors for output purposes only.
+
+     The "Title Page" means, for a printed book, the title page itself,
+     plus such following pages as are needed to hold, legibly, the
+     material this License requires to appear in the title page.  For
+     works in formats which do not have any title page as such, "Title
+     Page" means the text near the most prominent appearance of the
+     work's title, preceding the beginning of the body of the text.
+
+     The "publisher" means any person or entity that distributes copies
+     of the Document to the public.
+
+     A section "Entitled XYZ" means a named subunit of the Document
+     whose title either is precisely XYZ or contains XYZ in parentheses
+     following text that translates XYZ in another language.  (Here XYZ
+     stands for a specific section name mentioned below, such as
+     "Acknowledgements", "Dedications", "Endorsements", or "History".)
+     To "Preserve the Title" of such a section when you modify the
+     Document means that it remains a section "Entitled XYZ" according
+     to this definition.
+
+     The Document may include Warranty Disclaimers next to the notice
+     which states that this License applies to the Document.  These
+     Warranty Disclaimers are considered to be included by reference in
+     this License, but only as regards disclaiming warranties: any other
+     implication that these Warranty Disclaimers may have is void and
+     has no effect on the meaning of this License.
+
+  2. VERBATIM COPYING
+
+     You may copy and distribute the Document in any medium, either
+     commercially or noncommercially, provided that this License, the
+     copyright notices, and the license notice saying this License
+     applies to the Document are reproduced in all copies, and that you
+     add no other conditions whatsoever to those of this License.  You
+     may not use technical measures to obstruct or control the reading
+     or further copying of the copies you make or distribute.  However,
+     you may accept compensation in exchange for copies.  If you
+     distribute a large enough number of copies you must also follow
+     the conditions in section 3.
+
+     You may also lend copies, under the same conditions stated above,
+     and you may publicly display copies.
+
+  3. COPYING IN QUANTITY
+
+     If you publish printed copies (or copies in media that commonly
+     have printed covers) of the Document, numbering more than 100, and
+     the Document's license notice requires Cover Texts, you must
+     enclose the copies in covers that carry, clearly and legibly, all
+     these Cover Texts: Front-Cover Texts on the front cover, and
+     Back-Cover Texts on the back cover.  Both covers must also clearly
+     and legibly identify you as the publisher of these copies.  The
+     front cover must present the full title with all words of the
+     title equally prominent and visible.  You may add other material
+     on the covers in addition.  Copying with changes limited to the
+     covers, as long as they preserve the title of the Document and
+     satisfy these conditions, can be treated as verbatim copying in
+     other respects.
+
+     If the required texts for either cover are too voluminous to fit
+     legibly, you should put the first ones listed (as many as fit
+     reasonably) on the actual cover, and continue the rest onto
+     adjacent pages.
+
+     If you publish or distribute Opaque copies of the Document
+     numbering more than 100, you must either include a
+     machine-readable Transparent copy along with each Opaque copy, or
+     state in or with each Opaque copy a computer-network location from
+     which the general network-using public has access to download
+     using public-standard network protocols a complete Transparent
+     copy of the Document, free of added material.  If you use the
+     latter option, you must take reasonably prudent steps, when you
+     begin distribution of Opaque copies in quantity, to ensure that
+     this Transparent copy will remain thus accessible at the stated
+     location until at least one year after the last time you
+     distribute an Opaque copy (directly or through your agents or
+     retailers) of that edition to the public.
+
+     It is requested, but not required, that you contact the authors of
+     the Document well before redistributing any large number of
+     copies, to give them a chance to provide you with an updated
+     version of the Document.
+
+  4. MODIFICATIONS
+
+     You may copy and distribute a Modified Version of the Document
+     under the conditions of sections 2 and 3 above, provided that you
+     release the Modified Version under precisely this License, with
+     the Modified Version filling the role of the Document, thus
+     licensing distribution and modification of the Modified Version to
+     whoever possesses a copy of it.  In addition, you must do these
+     things in the Modified Version:
+
+       A. Use in the Title Page (and on the covers, if any) a title
+          distinct from that of the Document, and from those of
+          previous versions (which should, if there were any, be listed
+          in the History section of the Document).  You may use the
+          same title as a previous version if the original publisher of
+          that version gives permission.
+
+       B. List on the Title Page, as authors, one or more persons or
+          entities responsible for authorship of the modifications in
+          the Modified Version, together with at least five of the
+          principal authors of the Document (all of its principal
+          authors, if it has fewer than five), unless they release you
+          from this requirement.
+
+       C. State on the Title page the name of the publisher of the
+          Modified Version, as the publisher.
+
+       D. Preserve all the copyright notices of the Document.
+
+       E. Add an appropriate copyright notice for your modifications
+          adjacent to the other copyright notices.
+
+       F. Include, immediately after the copyright notices, a license
+          notice giving the public permission to use the Modified
+          Version under the terms of this License, in the form shown in
+          the Addendum below.
+
+       G. Preserve in that license notice the full lists of Invariant
+          Sections and required Cover Texts given in the Document's
+          license notice.
+
+       H. Include an unaltered copy of this License.
+
+       I. Preserve the section Entitled "History", Preserve its Title,
+          and add to it an item stating at least the title, year, new
+          authors, and publisher of the Modified Version as given on
+          the Title Page.  If there is no section Entitled "History" in
+          the Document, create one stating the title, year, authors,
+          and publisher of the Document as given on its Title Page,
+          then add an item describing the Modified Version as stated in
+          the previous sentence.
+
+       J. Preserve the network location, if any, given in the Document
+          for public access to a Transparent copy of the Document, and
+          likewise the network locations given in the Document for
+          previous versions it was based on.  These may be placed in
+          the "History" section.  You may omit a network location for a
+          work that was published at least four years before the
+          Document itself, or if the original publisher of the version
+          it refers to gives permission.
+
+       K. For any section Entitled "Acknowledgements" or "Dedications",
+          Preserve the Title of the section, and preserve in the
+          section all the substance and tone of each of the contributor
+          acknowledgements and/or dedications given therein.
+
+       L. Preserve all the Invariant Sections of the Document,
+          unaltered in their text and in their titles.  Section numbers
+          or the equivalent are not considered part of the section
+          titles.
+
+       M. Delete any section Entitled "Endorsements".  Such a section
+          may not be included in the Modified Version.
+
+       N. Do not retitle any existing section to be Entitled
+          "Endorsements" or to conflict in title with any Invariant
+          Section.
+
+       O. Preserve any Warranty Disclaimers.
+
+     If the Modified Version includes new front-matter sections or
+     appendices that qualify as Secondary Sections and contain no
+     material copied from the Document, you may at your option
+     designate some or all of these sections as invariant.  To do this,
+     add their titles to the list of Invariant Sections in the Modified
+     Version's license notice.  These titles must be distinct from any
+     other section titles.
+
+     You may add a section Entitled "Endorsements", provided it contains
+     nothing but endorsements of your Modified Version by various
+     parties--for example, statements of peer review or that the text
+     has been approved by an organization as the authoritative
+     definition of a standard.
+
+     You may add a passage of up to five words as a Front-Cover Text,
+     and a passage of up to 25 words as a Back-Cover Text, to the end
+     of the list of Cover Texts in the Modified Version.  Only one
+     passage of Front-Cover Text and one of Back-Cover Text may be
+     added by (or through arrangements made by) any one entity.  If the
+     Document already includes a cover text for the same cover,
+     previously added by you or by arrangement made by the same entity
+     you are acting on behalf of, you may not add another; but you may
+     replace the old one, on explicit permission from the previous
+     publisher that added the old one.
+
+     The author(s) and publisher(s) of the Document do not by this
+     License give permission to use their names for publicity for or to
+     assert or imply endorsement of any Modified Version.
+
+  5. COMBINING DOCUMENTS
+
+     You may combine the Document with other documents released under
+     this License, under the terms defined in section 4 above for
+     modified versions, provided that you include in the combination
+     all of the Invariant Sections of all of the original documents,
+     unmodified, and list them all as Invariant Sections of your
+     combined work in its license notice, and that you preserve all
+     their Warranty Disclaimers.
+
+     The combined work need only contain one copy of this License, and
+     multiple identical Invariant Sections may be replaced with a single
+     copy.  If there are multiple Invariant Sections with the same name
+     but different contents, make the title of each such section unique
+     by adding at the end of it, in parentheses, the name of the
+     original author or publisher of that section if known, or else a
+     unique number.  Make the same adjustment to the section titles in
+     the list of Invariant Sections in the license notice of the
+     combined work.
+
+     In the combination, you must combine any sections Entitled
+     "History" in the various original documents, forming one section
+     Entitled "History"; likewise combine any sections Entitled
+     "Acknowledgements", and any sections Entitled "Dedications".  You
+     must delete all sections Entitled "Endorsements."
+
+  6. COLLECTIONS OF DOCUMENTS
+
+     You may make a collection consisting of the Document and other
+     documents released under this License, and replace the individual
+     copies of this License in the various documents with a single copy
+     that is included in the collection, provided that you follow the
+     rules of this License for verbatim copying of each of the
+     documents in all other respects.
+
+     You may extract a single document from such a collection, and
+     distribute it individually under this License, provided you insert
+     a copy of this License into the extracted document, and follow
+     this License in all other respects regarding verbatim copying of
+     that document.
+
+  7. AGGREGATION WITH INDEPENDENT WORKS
+
+     A compilation of the Document or its derivatives with other
+     separate and independent documents or works, in or on a volume of
+     a storage or distribution medium, is called an "aggregate" if the
+     copyright resulting from the compilation is not used to limit the
+     legal rights of the compilation's users beyond what the individual
+     works permit.  When the Document is included in an aggregate, this
+     License does not apply to the other works in the aggregate which
+     are not themselves derivative works of the Document.
+
+     If the Cover Text requirement of section 3 is applicable to these
+     copies of the Document, then if the Document is less than one half
+     of the entire aggregate, the Document's Cover Texts may be placed
+     on covers that bracket the Document within the aggregate, or the
+     electronic equivalent of covers if the Document is in electronic
+     form.  Otherwise they must appear on printed covers that bracket
+     the whole aggregate.
+
+  8. TRANSLATION
+
+     Translation is considered a kind of modification, so you may
+     distribute translations of the Document under the terms of section
+     4.  Replacing Invariant Sections with translations requires special
+     permission from their copyright holders, but you may include
+     translations of some or all Invariant Sections in addition to the
+     original versions of these Invariant Sections.  You may include a
+     translation of this License, and all the license notices in the
+     Document, and any Warranty Disclaimers, provided that you also
+     include the original English version of this License and the
+     original versions of those notices and disclaimers.  In case of a
+     disagreement between the translation and the original version of
+     this License or a notice or disclaimer, the original version will
+     prevail.
+
+     If a section in the Document is Entitled "Acknowledgements",
+     "Dedications", or "History", the requirement (section 4) to
+     Preserve its Title (section 1) will typically require changing the
+     actual title.
+
+  9. TERMINATION
+
+     You may not copy, modify, sublicense, or distribute the Document
+     except as expressly provided under this License.  Any attempt
+     otherwise to copy, modify, sublicense, or distribute it is void,
+     and will automatically terminate your rights under this License.
+
+     However, if you cease all violation of this License, then your
+     license from a particular copyright holder is reinstated (a)
+     provisionally, unless and until the copyright holder explicitly
+     and finally terminates your license, and (b) permanently, if the
+     copyright holder fails to notify you of the violation by some
+     reasonable means prior to 60 days after the cessation.
+
+     Moreover, your license from a particular copyright holder is
+     reinstated permanently if the copyright holder notifies you of the
+     violation by some reasonable means, this is the first time you have
+     received notice of violation of this License (for any work) from
+     that copyright holder, and you cure the violation prior to 30 days
+     after your receipt of the notice.
+
+     Termination of your rights under this section does not terminate
+     the licenses of parties who have received copies or rights from
+     you under this License.  If your rights have been terminated and
+     not permanently reinstated, receipt of a copy of some or all of
+     the same material does not give you any rights to use it.
+
+ 10. FUTURE REVISIONS OF THIS LICENSE
+
+     The Free Software Foundation may publish new, revised versions of
+     the GNU Free Documentation License from time to time.  Such new
+     versions will be similar in spirit to the present version, but may
+     differ in detail to address new problems or concerns.  See
+     `http://www.gnu.org/copyleft/'.
+
+     Each version of the License is given a distinguishing version
+     number.  If the Document specifies that a particular numbered
+     version of this License "or any later version" applies to it, you
+     have the option of following the terms and conditions either of
+     that specified version or of any later version that has been
+     published (not as a draft) by the Free Software Foundation.  If
+     the Document does not specify a version number of this License,
+     you may choose any version ever published (not as a draft) by the
+     Free Software Foundation.  If the Document specifies that a proxy
+     can decide which future versions of this License can be used, that
+     proxy's public statement of acceptance of a version permanently
+     authorizes you to choose that version for the Document.
+
+ 11. RELICENSING
+
+     "Massive Multiauthor Collaboration Site" (or "MMC Site") means any
+     World Wide Web server that publishes copyrightable works and also
+     provides prominent facilities for anybody to edit those works.  A
+     public wiki that anybody can edit is an example of such a server.
+     A "Massive Multiauthor Collaboration" (or "MMC") contained in the
+     site means any set of copyrightable works thus published on the MMC
+     site.
+
+     "CC-BY-SA" means the Creative Commons Attribution-Share Alike 3.0
+     license published by Creative Commons Corporation, a not-for-profit
+     corporation with a principal place of business in San Francisco,
+     California, as well as future copyleft versions of that license
+     published by that same organization.
+
+     "Incorporate" means to publish or republish a Document, in whole or
+     in part, as part of another Document.
+
+     An MMC is "eligible for relicensing" if it is licensed under this
+     License, and if all works that were first published under this
+     License somewhere other than this MMC, and subsequently
+     incorporated in whole or in part into the MMC, (1) had no cover
+     texts or invariant sections, and (2) were thus incorporated prior
+     to November 1, 2008.
+
+     The operator of an MMC Site may republish an MMC contained in the
+     site under CC-BY-SA on the same site at any time before August 1,
+     2009, provided the MMC is eligible for relicensing.
+
+
+ADDENDUM: How to use this License for your documents
+====================================================
+
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and license
+notices just after the title page:
+
+       Copyright (C)  YEAR  YOUR NAME.
+       Permission is granted to copy, distribute and/or modify this document
+       under the terms of the GNU Free Documentation License, Version 1.3
+       or any later version published by the Free Software Foundation;
+       with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
+       Texts.  A copy of the license is included in the section entitled ``GNU
+       Free Documentation License''.
+
+   If you have Invariant Sections, Front-Cover Texts and Back-Cover
+Texts, replace the "with...Texts." line with this:
+
+         with the Invariant Sections being LIST THEIR TITLES, with
+         the Front-Cover Texts being LIST, and with the Back-Cover Texts
+         being LIST.
+
+   If you have Invariant Sections without Cover Texts, or some other
+combination of the three, merge those two alternatives to suit the
+situation.
+
+   If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
+free software license, such as the GNU General Public License, to
+permit their use in free software.
+
+
+File: gcj.info,  Node: Invoking gcj,  Next: Compatibility,  Prev: GNU Free Documentation License,  Up: Top
+
+1 Invoking gcj
+**************
+
+As `gcj' is just another front end to `gcc', it supports many of the
+same options as gcc.  *Note Option Summary: (gcc)Option Summary.  This
+manual only documents the options specific to `gcj'.
+
+* Menu:
+
+* Input and output files::
+* Input Options::               How gcj finds files
+* Encodings::                   Options controlling source file encoding
+* Warnings::                    Options controlling warnings specific to gcj
+* Linking::                     Options for making an executable
+* Code Generation::             Options controlling the output of gcj
+* Configure-time Options::      Options you won't use
+
+
+File: gcj.info,  Node: Input and output files,  Next: Input Options,  Up: Invoking gcj
+
+1.1 Input and output files
+==========================
+
+A `gcj' command is like a `gcc' command, in that it consists of a
+number of options and file names.  The following kinds of input file
+names are supported:
+
+`FILE.java'
+     Java source files.
+
+`FILE.class'
+     Java bytecode files.
+
+`FILE.zip'
+`FILE.jar'
+     An archive containing one or more `.class' files, all of which are
+     compiled.  The archive may be compressed.  Files in an archive
+     which don't end with `.class' are treated as resource files; they
+     are compiled into the resulting object file as `core:' URLs.
+
+`@FILE'
+     A file containing a whitespace-separated list of input file names.
+     (Currently, these must all be `.java' source files, but that may
+     change.)  Each named file is compiled, just as if it had been on
+     the command line.
+
+`LIBRARY.a'
+`LIBRARY.so'
+`-lLIBNAME'
+     Libraries to use when linking.  See the `gcc' manual.
+
+   You can specify more than one input file on the `gcj' command line,
+in which case they will all be compiled.  If you specify a `-o FILENAME'
+option, all the input files will be compiled together, producing a
+single output file, named FILENAME.  This is allowed even when using
+`-S' or `-c', but not when using `-C' or `--resource'.  (This is an
+extension beyond the what plain `gcc' allows.)  (If more than one input
+file is specified, all must currently be `.java' files, though we hope
+to fix this.)
+
+
+File: gcj.info,  Node: Input Options,  Next: Encodings,  Prev: Input and output files,  Up: Invoking gcj
+
+1.2 Input Options
+=================
+
+`gcj' has options to control where it looks to find files it needs.
+For instance, `gcj' might need to load a class that is referenced by
+the file it has been asked to compile.  Like other compilers for the
+Java language, `gcj' has a notion of a "class path".  There are several
+options and environment variables which can be used to manipulate the
+class path.  When `gcj' looks for a given class, it searches the class
+path looking for matching `.class' or `.java' file.  `gcj' comes with a
+built-in class path which points at the installed `libgcj.jar', a file
+which contains all the standard classes.
+
+   In the text below, a directory or path component can refer either to
+an actual directory on the filesystem, or to a `.zip' or `.jar' file,
+which `gcj' will search as if it is a directory.
+
+`-IDIR'
+     All directories specified by `-I' are kept in order and prepended
+     to the class path constructed from all the other options.  Unless
+     compatibility with tools like `javac' is important, we recommend
+     always using `-I' instead of the other options for manipulating the
+     class path.
+
+`--classpath=PATH'
+     This sets the class path to PATH, a colon-separated list of paths
+     (on Windows-based systems, a semicolon-separate list of paths).
+     This does not override the builtin ("boot") search path.
+
+`--CLASSPATH=PATH'
+     Deprecated synonym for `--classpath'.
+
+`--bootclasspath=PATH'
+     Where to find the standard builtin classes, such as
+     `java.lang.String'.
+
+`--extdirs=PATH'
+     For each directory in the PATH, place the contents of that
+     directory at the end of the class path.
+
+`CLASSPATH'
+     This is an environment variable which holds a list of paths.
+
+   The final class path is constructed like so:
+
+   * First come all directories specified via `-I'.
+
+   * If `--classpath' is specified, its value is appended.  Otherwise,
+     if the `CLASSPATH' environment variable is specified, then its
+     value is appended.  Otherwise, the current directory (`"."') is
+     appended.
+
+   * If `--bootclasspath' was specified, append its value.  Otherwise,
+     append the built-in system directory, `libgcj.jar'.
+
+   * Finally, if `--extdirs' was specified, append the contents of the
+     specified directories at the end of the class path.  Otherwise,
+     append the contents of the built-in extdirs at
+     `$(prefix)/share/java/ext'.
+
+   The classfile built by `gcj' for the class `java.lang.Object' (and
+placed in `libgcj.jar') contains a special zero length attribute
+`gnu.gcj.gcj-compiled'. The compiler looks for this attribute when
+loading `java.lang.Object' and will report an error if it isn't found,
+unless it compiles to bytecode (the option
+`-fforce-classes-archive-check' can be used to override this behavior
+in this particular case.)
+
+`-fforce-classes-archive-check'
+     This forces the compiler to always check for the special zero
+     length attribute `gnu.gcj.gcj-compiled' in `java.lang.Object' and
+     issue an error if it isn't found.
+
+`-fsource=VERSION'
+     This option is used to choose the source version accepted by
+     `gcj'.  The default is `1.5'.
+
+
+File: gcj.info,  Node: Encodings,  Next: Warnings,  Prev: Input Options,  Up: Invoking gcj
+
+1.3 Encodings
+=============
+
+The Java programming language uses Unicode throughout.  In an effort to
+integrate well with other locales, `gcj' allows `.java' files to be
+written using almost any encoding.  `gcj' knows how to convert these
+encodings into its internal encoding at compile time.
+
+   You can use the `--encoding=NAME' option to specify an encoding (of
+a particular character set) to use for source files.  If this is not
+specified, the default encoding comes from your current locale.  If
+your host system has insufficient locale support, then `gcj' assumes
+the default encoding to be the `UTF-8' encoding of Unicode.
+
+   To implement `--encoding', `gcj' simply uses the host platform's
+`iconv' conversion routine.  This means that in practice `gcj' is
+limited by the capabilities of the host platform.
+
+   The names allowed for the argument `--encoding' vary from platform
+to platform (since they are not standardized anywhere).  However, `gcj'
+implements the encoding named `UTF-8' internally, so if you choose to
+use this for your source files you can be assured that it will work on
+every host.
+
+
+File: gcj.info,  Node: Warnings,  Next: Linking,  Prev: Encodings,  Up: Invoking gcj
+
+1.4 Warnings
+============
+
+`gcj' implements several warnings.  As with other generic `gcc'
+warnings, if an option of the form `-Wfoo' enables a warning, then
+`-Wno-foo' will disable it.  Here we've chosen to document the form of
+the warning which will have an effect - the default being the opposite
+of what is listed.
+
+`-Wredundant-modifiers'
+     With this flag, `gcj' will warn about redundant modifiers.  For
+     instance, it will warn if an interface method is declared `public'.
+
+`-Wextraneous-semicolon'
+     This causes `gcj' to warn about empty statements.  Empty statements
+     have been deprecated.
+
+`-Wno-out-of-date'
+     This option will cause `gcj' not to warn when a source file is
+     newer than its matching class file.  By default `gcj' will warn
+     about this.
+
+`-Wno-deprecated'
+     Warn if a deprecated class, method, or field is referred to.
+
+`-Wunused'
+     This is the same as `gcc''s `-Wunused'.
+
+`-Wall'
+     This is the same as `-Wredundant-modifiers -Wextraneous-semicolon
+     -Wunused'.
+
+
+File: gcj.info,  Node: Linking,  Next: Code Generation,  Prev: Warnings,  Up: Invoking gcj
+
+1.5 Linking
+===========
+
+To turn a Java application into an executable program, you need to link
+it with the needed libraries, just as for C or C++.  The linker by
+default looks for a global function named `main'.  Since Java does not
+have global functions, and a collection of Java classes may have more
+than one class with a `main' method, you need to let the linker know
+which of those `main' methods it should invoke when starting the
+application.  You can do that in any of these ways:
+
+   * Specify the class containing the desired `main' method when you
+     link the application, using the `--main' flag, described below.
+
+   * Link the Java package(s) into a shared library (dll) rather than an
+     executable.  Then invoke the application using the `gij' program,
+     making sure that `gij' can find the libraries it needs.
+
+   * Link the Java packages(s) with the flag `-lgij', which links in
+     the `main' routine from the `gij' command.  This allows you to
+     select the class whose `main' method you want to run when you run
+     the application.  You can also use other `gij' flags, such as `-D'
+     flags to set properties.  Using the `-lgij' library (rather than
+     the `gij' program of the previous mechanism) has some advantages:
+     it is compatible with static linking, and does not require
+     configuring or installing libraries.
+
+   These `gij' options relate to linking an executable:
+
+`--main=CLASSNAME'
+     This option is used when linking to specify the name of the class
+     whose `main' method should be invoked when the resulting
+     executable is run.
+
+`-DNAME[=VALUE]'
+     This option can only be used with `--main'.  It defines a system
+     property named NAME with value VALUE.  If VALUE is not specified
+     then it defaults to the empty string.  These system properties are
+     initialized at the program's startup and can be retrieved at
+     runtime using the `java.lang.System.getProperty' method.
+
+`-lgij'
+     Create an application whose command-line processing is that of the
+     `gij' command.
+
+     This option is an alternative to using `--main'; you cannot use
+     both.
+
+`-static-libgcj'
+     This option causes linking to be done against a static version of
+     the libgcj runtime library.  This option is only available if
+     corresponding linker support exists.
+
+     *Caution:* Static linking of libgcj may cause essential parts of
+     libgcj to be omitted.  Some parts of libgcj use reflection to load
+     classes at runtime.  Since the linker does not see these
+     references at link time, it can omit the referred to classes.  The
+     result is usually (but not always) a `ClassNotFoundException'
+     being thrown at runtime. Caution must be used when using this
+     option.  For more details see:
+     `http://gcc.gnu.org/wiki/Statically%20linking%20libgcj'
+
+
+File: gcj.info,  Node: Code Generation,  Next: Configure-time Options,  Prev: Linking,  Up: Invoking gcj
+
+1.6 Code Generation
+===================
+
+In addition to the many `gcc' options controlling code generation,
+`gcj' has several options specific to itself.
+
+`-C'
+     This option is used to tell `gcj' to generate bytecode (`.class'
+     files) rather than object code.
+
+`--resource RESOURCE-NAME'
+     This option is used to tell `gcj' to compile the contents of a
+     given file to object code so it may be accessed at runtime with
+     the core protocol handler as `core:/RESOURCE-NAME'.  Note that
+     RESOURCE-NAME is the name of the resource as found at runtime; for
+     instance, it could be used in a call to `ResourceBundle.getBundle'.
+     The actual file name to be compiled this way must be specified
+     separately.
+
+`-ftarget=VERSION'
+     This can be used with `-C' to choose the version of bytecode
+     emitted by `gcj'.  The default is `1.5'.  When not generating
+     bytecode, this option has no effect.
+
+`-d DIRECTORY'
+     When used with `-C', this causes all generated `.class' files to
+     be put in the appropriate subdirectory of DIRECTORY.  By default
+     they will be put in subdirectories of the current working
+     directory.
+
+`-fno-bounds-check'
+     By default, `gcj' generates code which checks the bounds of all
+     array indexing operations.  With this option, these checks are
+     omitted, which can improve performance for code that uses arrays
+     extensively.  Note that this can result in unpredictable behavior
+     if the code in question actually does violate array bounds
+     constraints.  It is safe to use this option if you are sure that
+     your code will never throw an `ArrayIndexOutOfBoundsException'.
+
+`-fno-store-check'
+     Don't generate array store checks.  When storing objects into
+     arrays, a runtime check is normally generated in order to ensure
+     that the object is assignment compatible with the component type
+     of the array (which may not be known at compile-time).  With this
+     option, these checks are omitted.  This can improve performance
+     for code which stores objects into arrays frequently.  It is safe
+     to use this option if you are sure your code will never throw an
+     `ArrayStoreException'.
+
+`-fjni'
+     With `gcj' there are two options for writing native methods: CNI
+     and JNI.  By default `gcj' assumes you are using CNI.  If you are
+     compiling a class with native methods, and these methods are
+     implemented using JNI, then you must use `-fjni'.  This option
+     causes `gcj' to generate stubs which will invoke the underlying JNI
+     methods.
+
+`-fno-assert'
+     Don't recognize the `assert' keyword.  This is for compatibility
+     with older versions of the language specification.
+
+`-fno-optimize-static-class-initialization'
+     When the optimization level is greater or equal to `-O2', `gcj'
+     will try to optimize the way calls into the runtime are made to
+     initialize static classes upon their first use (this optimization
+     isn't carried out if `-C' was specified.) When compiling to native
+     code, `-fno-optimize-static-class-initialization' will turn this
+     optimization off, regardless of the optimization level in use.
+
+`--disable-assertions[=CLASS-OR-PACKAGE]'
+     Don't include code for checking assertions in the compiled code.
+     If `=CLASS-OR-PACKAGE' is missing disables assertion code
+     generation for all classes, unless overridden by a more specific
+     `--enable-assertions' flag.  If CLASS-OR-PACKAGE is a class name,
+     only disables generating assertion checks within the named class
+     or its inner classes.  If CLASS-OR-PACKAGE is a package name,
+     disables generating assertion checks within the named package or a
+     subpackage.
+
+     By default, assertions are enabled when generating class files or
+     when not optimizing, and disabled when generating optimized
+     binaries.
+
+`--enable-assertions[=CLASS-OR-PACKAGE]'
+     Generates code to check assertions.  The option is perhaps
+     misnamed, as you still need to turn on assertion checking at
+     run-time, and we don't support any easy way to do that.  So this
+     flag isn't very useful yet, except to partially override
+     `--disable-assertions'.
+
+`-findirect-dispatch'
+     `gcj' has a special binary compatibility ABI, which is enabled by
+     the `-findirect-dispatch' option.  In this mode, the code
+     generated by `gcj' honors the binary compatibility guarantees in
+     the Java Language Specification, and the resulting object files do
+     not need to be directly linked against their dependencies.
+     Instead, all dependencies are looked up at runtime.  This allows
+     free mixing of interpreted and compiled code.
+
+     Note that, at present, `-findirect-dispatch' can only be used when
+     compiling `.class' files.  It will not work when compiling from
+     source.  CNI also does not yet work with the binary compatibility
+     ABI.  These restrictions will be lifted in some future release.
+
+     However, if you compile CNI code with the standard ABI, you can
+     call it from code built with the binary compatibility ABI.
+
+`-fbootstrap-classes'
+     This option can be use to tell `libgcj' that the compiled classes
+     should be loaded by the bootstrap loader, not the system class
+     loader.  By default, if you compile a class and link it into an
+     executable, it will be treated as if it was loaded using the
+     system class loader.  This is convenient, as it means that things
+     like `Class.forName()' will search `CLASSPATH' to find the desired
+     class.
+
+`-freduced-reflection'
+     This option causes the code generated by `gcj' to contain a
+     reduced amount of the class meta-data used to support runtime
+     reflection. The cost of this savings is the loss of the ability to
+     use certain reflection capabilities of the standard Java runtime
+     environment. When set all meta-data except for that which is
+     needed to obtain correct runtime semantics is eliminated.
+
+     For code that does not use reflection (i.e. serialization, RMI,
+     CORBA or call methods in the `java.lang.reflect' package),
+     `-freduced-reflection' will result in proper operation with a
+     savings in executable code size.
+
+     JNI (`-fjni') and the binary compatibility ABI
+     (`-findirect-dispatch') do not work properly without full
+     reflection meta-data.  Because of this, it is an error to use
+     these options with `-freduced-reflection'.
+
+     *Caution:* If there is no reflection meta-data, code that uses a
+     `SecurityManager' may not work properly.  Also calling
+     `Class.forName()' may fail if the calling method has no reflection
+     meta-data.
+
+
+
+File: gcj.info,  Node: Configure-time Options,  Prev: Code Generation,  Up: Invoking gcj
+
+1.7 Configure-time Options
+==========================
+
+Some `gcj' code generations options affect the resulting ABI, and so
+can only be meaningfully given when `libgcj', the runtime package, is
+configured.  `libgcj' puts the appropriate options from this group into
+a `spec' file which is read by `gcj'.  These options are listed here
+for completeness; if you are using `libgcj' then you won't want to
+touch these options.
+
+`-fuse-boehm-gc'
+     This enables the use of the Boehm GC bitmap marking code.  In
+     particular this causes `gcj' to put an object marking descriptor
+     into each vtable.
+
+`-fhash-synchronization'
+     By default, synchronization data (the data used for `synchronize',
+     `wait', and `notify') is pointed to by a word in each object.
+     With this option `gcj' assumes that this information is stored in a
+     hash table and not in the object itself.
+
+`-fuse-divide-subroutine'
+     On some systems, a library routine is called to perform integer
+     division.  This is required to get exception handling correct when
+     dividing by zero.
+
+`-fcheck-references'
+     On some systems it's necessary to insert inline checks whenever
+     accessing an object via a reference.  On other systems you won't
+     need this because null pointer accesses are caught automatically
+     by the processor.
+
+`-fuse-atomic-builtins'
+     On some systems, gcc can generate code for built-in atomic
+     operations.  Use this option to force gcj to use these builtins
+     when compiling Java code.  Where this capability is present it
+     should be automatically detected, so you won't usually need to use
+     this option.
+
+
+
+File: gcj.info,  Node: Compatibility,  Next: Invoking jcf-dump,  Prev: Invoking gcj,  Up: Top
+
+2 Compatibility with the Java Platform
+**************************************
+
+As we believe it is important that the Java platform not be fragmented,
+`gcj' and `libgcj' try to conform to the relevant Java specifications.
+However, limited manpower and incomplete and unclear documentation work
+against us.  So, there are caveats to using `gcj'.
+
+* Menu:
+
+* Limitations::
+* Extensions::
+
+
+File: gcj.info,  Node: Limitations,  Next: Extensions,  Up: Compatibility
+
+2.1 Standard features not yet supported
+=======================================
+
+This list of compatibility issues is by no means complete.
+
+   * `gcj' implements the JDK 1.2 language.  It supports inner classes
+     and the new 1.4 `assert' keyword.  It does not yet support the
+     Java 2 `strictfp' keyword (it recognizes the keyword but ignores
+     it).
+
+   * `libgcj' is largely compatible with the JDK 1.2 libraries.
+     However, `libgcj' is missing many packages, most notably
+     `java.awt'.  There are also individual missing classes and methods.
+     We currently do not have a list showing differences between
+     `libgcj' and the Java 2 platform.
+
+   * Sometimes the `libgcj' implementation of a method or class differs
+     from the JDK implementation.  This is not always a bug.  Still, if
+     it affects you, it probably makes sense to report it so that we
+     can discuss the appropriate response.
+
+   * `gcj' does not currently allow for piecemeal replacement of
+     components within `libgcj'. Unfortunately, programmers often want
+     to use newer versions of certain packages, such as those provided
+     by the Apache Software Foundation's Jakarta project.  This has
+     forced us to place the `org.w3c.dom' and `org.xml.sax' packages
+     into their own libraries, separate from `libgcj'.  If you intend to
+     use these classes, you must link them explicitly with
+     `-l-org-w3c-dom' and `-l-org-xml-sax'.  Future versions of `gcj'
+     may not have this restriction.
+
+
+File: gcj.info,  Node: Extensions,  Prev: Limitations,  Up: Compatibility
+
+2.2 Extra features unique to gcj
+================================
+
+The main feature of `gcj' is that it can compile programs written in
+the Java programming language to native code.  Most extensions that
+have been added are to facilitate this functionality.
+
+   * `gcj' makes it easy and efficient to mix code written in Java and
+     C++.  *Note About CNI::, for more info on how to use this in your
+     programs.
+
+   * When you compile your classes into a shared library using
+     `-findirect-dispatch' then add them to the system-wide classmap.db
+     file using `gcj-dbtool', they will be automatically loaded by the
+     `libgcj' system classloader.  This is the new, preferred
+     classname-to-library resolution mechanism.  *Note Invoking
+     gcj-dbtool::, for more information on using the classmap database.
+
+   * The old classname-to-library lookup mechanism is still supported
+     through the `gnu.gcj.runtime.VMClassLoader.library_control'
+     property, but it is deprecated and will likely be removed in some
+     future release.  When trying to load a class `gnu.pkg.SomeClass'
+     the system classloader will first try to load the shared library
+     `lib-gnu-pkg-SomeClass.so', if that fails to load the class then
+     it will try to load `lib-gnu-pkg.so' and finally when the class is
+     still not loaded it will try to load `lib-gnu.so'.  Note that all
+     `.'s will be transformed into `-'s and that searching for inner
+     classes starts with their outermost outer class.  If the class
+     cannot be found this way the system classloader tries to use the
+     `libgcj' bytecode interpreter to load the class from the standard
+     classpath.  This process can be controlled to some degree via the
+     `gnu.gcj.runtime.VMClassLoader.library_control' property; *Note
+     libgcj Runtime Properties::.
+
+   * `libgcj' includes a special `gcjlib' URL type.  A URL of this form
+     is like a `jar' URL, and looks like
+     `gcjlib:/path/to/shared/library.so!/path/to/resource'.  An access
+     to one of these URLs causes the shared library to be `dlopen()'d,
+     and then the resource is looked for in that library.  These URLs
+     are most useful when used in conjunction with
+     `java.net.URLClassLoader'.  Note that, due to implementation
+     limitations, currently any such URL can be accessed by only one
+     class loader, and libraries are never unloaded.  This means some
+     care must be exercised to make sure that a `gcjlib' URL is not
+     accessed by more than one class loader at once.  In a future
+     release this limitation will be lifted, and such libraries will be
+     mapped privately.
+
+   * A program compiled by `gcj' will examine the `GCJ_PROPERTIES'
+     environment variable and change its behavior in some ways.  In
+     particular `GCJ_PROPERTIES' holds a list of assignments to global
+     properties, such as would be set with the `-D' option to `java'.
+     For instance, `java.compiler=gcj' is a valid (but currently
+     meaningless) setting.  
+
+
+
+File: gcj.info,  Node: Invoking jcf-dump,  Next: Invoking gij,  Prev: Compatibility,  Up: Top
+
+3 Invoking jcf-dump
+*******************
+
+This is a class file examiner, similar to `javap'.  It will print
+information about a number of classes, which are specified by class name
+or file name.
+
+`-c'
+     Disassemble method bodies.  By default method bodies are not
+     printed.
+
+`--print-constants'
+     Print the constant pool.  When printing a reference to a constant
+     also print its index in the constant pool.
+
+`--javap'
+     Generate output in `javap' format.  The implementation of this
+     feature is very incomplete.
+
+`--classpath=PATH'
+`--CLASSPATH=PATH'
+`-IDIRECTORY'
+`-o FILE'
+     These options as the same as the corresponding `gcj' options.
+
+`--help'
+     Print help, then exit.
+
+`--version'
+     Print version number, then exit.
+
+`-v, --verbose'
+     Print extra information while running.  Implies
+     `--print-constants'.
+
+
+File: gcj.info,  Node: Invoking gij,  Next: Invoking gcj-dbtool,  Prev: Invoking jcf-dump,  Up: Top
+
+4 Invoking gij
+**************
+
+`gij' is a Java bytecode interpreter included with `libgcj'.  `gij' is
+not available on every platform; porting it requires a small amount of
+assembly programming which has not been done for all the targets
+supported by `gcj'.
+
+   The primary argument to `gij' is the name of a class or, with
+`-jar', a jar file.  Options before this argument are interpreted by
+`gij'; remaining options are passed to the interpreted program.
+
+   If a class name is specified and this class does not have a `main'
+method with the appropriate signature (a `static void' method with a
+`String[]' as its sole argument), then `gij' will print an error and
+exit.
+
+   If a jar file is specified then `gij' will use information in it to
+determine which class' `main' method will be invoked.
+
+   `gij' will invoke the `main' method with all the remaining
+command-line options.
+
+   Note that `gij' is not limited to interpreting code.  Because
+`libgcj' includes a class loader which can dynamically load shared
+objects, it is possible to give `gij' the name of a class which has
+been compiled and put into a shared library on the class path.
+
+`-cp PATH'
+`-classpath PATH'
+     Set the initial class path.  The class path is used for finding
+     class and resource files.  If specified, this option overrides the
+     `CLASSPATH' environment variable.  Note that this option is
+     ignored if `-jar' is used.
+
+`-DNAME[=VALUE]'
+     This defines a system property named NAME with value VALUE.  If
+     VALUE is not specified then it defaults to the empty string.
+     These system properties are initialized at the program's startup
+     and can be retrieved at runtime using the
+     `java.lang.System.getProperty' method.
+
+`-ms=NUMBER'
+     Equivalent to `-Xms'.
+
+`-mx=NUMBER'
+     Equivalent to `-Xmx'.
+
+`-noverify'
+     Do not verify compliance of bytecode with the VM specification. In
+     addition, this option disables type verification which is
+     otherwise performed on BC-ABI compiled code.
+
+`-X'
+`-XARGUMENT'
+     Supplying `-X' by itself will cause `gij' to list all the
+     supported `-X' options.  Currently these options are supported:
+
+    `-XmsSIZE'
+          Set the initial heap size.
+
+    `-XmxSIZE'
+          Set the maximum heap size.
+
+    `-XssSIZE'
+          Set the thread stack size.
+
+     Unrecognized `-X' options are ignored, for compatibility with
+     other runtimes.
+
+`-jar'
+     This indicates that the name passed to `gij' should be interpreted
+     as the name of a jar file, not a class.
+
+`--help'
+`-?'
+     Print help, then exit.
+
+`--showversion'
+     Print version number and continue.
+
+`--fullversion'
+     Print detailed version information, then exit.
+
+`--version'
+     Print version number, then exit.
+
+`-verbose'
+`-verbose:class'
+     Each time a class is initialized, print a short message on
+     standard error.
+
+   `gij' also recognizes and ignores the following options, for
+compatibility with existing application launch scripts: `-client',
+`-server', `-hotspot', `-jrockit', `-agentlib', `-agentpath', `-debug',
+`-d32', `-d64', `-javaagent', `-noclassgc', `-verify', and
+`-verifyremote'.
+
+
+File: gcj.info,  Node: Invoking gcj-dbtool,  Next: Invoking jv-convert,  Prev: Invoking gij,  Up: Top
+
+5 Invoking gcj-dbtool.
+**********************
+
+`gcj-dbtool' is a tool for creating and manipulating class file mapping
+databases.  `libgcj' can use these databases to find a shared library
+corresponding to the bytecode representation of a class.  This
+functionality is useful for ahead-of-time compilation of a program that
+has no knowledge of `gcj'.
+
+   `gcj-dbtool' works best if all the jar files added to it are
+compiled using `-findirect-dispatch'.
+
+   Note that `gcj-dbtool' is currently available as "preview
+technology".  We believe it is a reasonable way to allow
+application-transparent ahead-of-time compilation, but this is an
+unexplored area.  We welcome your comments.
+
+`-n DBFILE [SIZE]'
+     This creates a new database.  Currently, databases cannot be
+     resized; you can choose a larger initial size if desired.  The
+     default size is 32,749.
+
+`-a DBFILE JARFILE LIB'
+`-f DBFILE JARFILE LIB'
+     This adds a jar file to the database.  For each class file in the
+     jar, a cryptographic signature of the bytecode representation of
+     the class is recorded in the database.  At runtime, a class is
+     looked up by its signature and the compiled form of the class is
+     looked for in the corresponding shared library.  The `-a' option
+     will verify that LIB exists before adding it to the database; `-f'
+     skips this check.
+
+`[`-'][`-0'] -m DBFILE DBFILE,[DBFILE]'
+     Merge a number of databases.  The output database overwrites any
+     existing database.  To add databases into an existing database,
+     include the destination in the list of sources.
+
+     If `-' or `-0' are used, the list of files to read is taken from
+     standard input instead of the command line.  For `-0', Input
+     filenames are terminated by a null character instead of by
+     whitespace.  Useful when arguments might contain white space.  The
+     GNU find -print0 option produces input suitable for this mode.
+
+`-t DBFILE'
+     Test a database.
+
+`-l DBFILE'
+     List the contents of a database.
+
+`-p'
+     Print the name of the default database.  If there is no default
+     database, this prints a blank line.  If LIBDIR is specified, use
+     it instead of the default library directory component of the
+     database name.
+
+`--help'
+     Print a help message, then exit.
+
+`--version'
+`-v'
+     Print version information, then exit.
+
+
+
+File: gcj.info,  Node: Invoking jv-convert,  Next: Invoking grmic,  Prev: Invoking gcj-dbtool,  Up: Top
+
+6 Invoking jv-convert
+*********************
+
+`jv-convert' [`OPTION'] ... [INPUTFILE [OUTPUTFILE]]
+
+   `jv-convert' is a utility included with `libgcj' which converts a
+file from one encoding to another.  It is similar to the Unix `iconv'
+utility.
+
+   The encodings supported by `jv-convert' are platform-dependent.
+Currently there is no way to get a list of all supported encodings.
+
+`--encoding NAME'
+`--from NAME'
+     Use NAME as the input encoding.  The default is the current
+     locale's encoding.
+
+`--to NAME'
+     Use NAME as the output encoding.  The default is the `JavaSrc'
+     encoding; this is ASCII with `\u' escapes for non-ASCII characters.
+
+`-i FILE'
+     Read from FILE.  The default is to read from standard input.
+
+`-o FILE'
+     Write to FILE.  The default is to write to standard output.
+
+`--reverse'
+     Swap the input and output encodings.
+
+`--help'
+     Print a help message, then exit.
+
+`--version'
+     Print version information, then exit.
+
+
+File: gcj.info,  Node: Invoking grmic,  Next: Invoking gc-analyze,  Prev: Invoking jv-convert,  Up: Top
+
+7 Invoking grmic
+****************
+
+`grmic' [`OPTION'] ... CLASS ...
+
+   `grmic' is a utility included with `libgcj' which generates stubs
+for remote objects.
+
+   Note that this program isn't yet fully compatible with the JDK
+`grmic'.  Some options, such as `-classpath', are recognized but
+currently ignored.  We have left these options undocumented for now.
+
+   Long options can also be given with a GNU-style leading `--'.  For
+instance, `--help' is accepted.
+
+`-keep'
+`-keepgenerated'
+     By default, `grmic' deletes intermediate files.  Either of these
+     options causes it not to delete such files.
+
+`-v1.1'
+     Cause `grmic' to create stubs and skeletons for the 1.1 protocol
+     version.
+
+`-vcompat'
+     Cause `grmic' to create stubs and skeletons compatible with both
+     the 1.1 and 1.2 protocol versions.  This is the default.
+
+`-v1.2'
+     Cause `grmic' to create stubs and skeletons for the 1.2 protocol
+     version.
+
+`-nocompile'
+     Don't compile the generated files.
+
+`-verbose'
+     Print information about what `grmic' is doing.
+
+`-d DIRECTORY'
+     Put output files in DIRECTORY.  By default the files are put in
+     the current working directory.
+
+`-help'
+     Print a help message, then exit.
+
+`-version'
+     Print version information, then exit.
+
+
+File: gcj.info,  Node: Invoking gc-analyze,  Next: Invoking aot-compile,  Prev: Invoking grmic,  Up: Top
+
+8 Invoking gc-analyze
+*********************
+
+`gc-analyze' [`OPTION'] ... [FILE]
+
+   `gc-analyze' prints an analysis of a GC memory dump to standard out.
+
+   The memory dumps may be created by calling
+`gnu.gcj.util.GCInfo.enumerate(String namePrefix)' from java code.  A
+memory dump will be created on an out of memory condition if
+`gnu.gcj.util.GCInfo.setOOMDump(String namePrefix)' is called before
+the out of memory occurs.
+
+   Running this program will create two files: `TestDump001' and
+`TestDump001.bytes'.
+
+     import gnu.gcj.util.*;
+     import java.util.*;
+
+     public class GCDumpTest
+     {
+         static public void main(String args[])
+         {
+             ArrayList<String> l = new ArrayList<String>(1000);
+
+             for (int i = 1; i < 1500; i++) {
+                 l.add("This is string #" + i);
+             }
+             GCInfo.enumerate("TestDump");
+         }
+     }
+
+   The memory dump may then be displayed by running:
+
+     gc-analyze -v TestDump001
+
+`--verbose'
+`-v'
+     Verbose output.
+
+`-p TOOL-PREFIX'
+     Prefix added to the names of the `nm' and `readelf' commands.
+
+`-d DIRECTORY'
+     Directory that contains the executable and shared libraries used
+     when the dump was generated.
+
+`--help'
+     Print a help message, then exit.
+
+`--version'
+     Print version information, then exit.
+
+
+File: gcj.info,  Node: Invoking aot-compile,  Next: Invoking rebuild-gcj-db,  Prev: Invoking gc-analyze,  Up: Top
+
+9 Invoking aot-compile
+**********************
+
+`aot-compile' is a script that searches a directory for Java bytecode
+(as class files, or in jars) and uses `gcj' to compile it to native
+code and generate the databases from it.
+
+`-M, --make=PATH'
+     Specify the path to the `make' executable to use.
+
+`-C, --gcj=PATH'
+     Specify the path to the `gcj' executable to use.
+
+`-D, --dbtool=PATH'
+     Specify the path to the `gcj-dbtool' executable to use.
+
+`-m, --makeflags=FLAGS'
+     Specify flags to pass to `make' during the build.
+
+`-c, --gcjflags=FLAGS'
+     Specify flags to pass to `gcj' during compilation, in addition to
+     '-fPIC -findirect-dispatch -fjni'.
+
+`-l, --ldflags=FLAGS'
+     Specify flags to pass to `gcj' during linking, in addition to
+     '-Wl,-Bsymbolic'.
+
+`-e, --exclude=PATH'
+     Do not compile PATH.
+
+
+
+File: gcj.info,  Node: Invoking rebuild-gcj-db,  Next: About CNI,  Prev: Invoking aot-compile,  Up: Top
+
+10 Invoking rebuild-gcj-db
+**************************
+
+`rebuild-gcj-db' is a script that merges the per-solib databases made by
+`aot-compile' into one system-wide database so `gij' can find the
+solibs.
+
+
+File: gcj.info,  Node: About CNI,  Next: System properties,  Prev: Invoking rebuild-gcj-db,  Up: Top
+
+11 About CNI
+************
+
+This documents CNI, the Compiled Native Interface, which is is a
+convenient way to write Java native methods using C++.  This is a more
+efficient, more convenient, but less portable alternative to the
+standard JNI (Java Native Interface).
+
+* Menu:
+
+* Basic concepts::              Introduction to using CNI.
+* Packages::                    How packages are mapped to C++.
+* Primitive types::             Handling primitive Java types in C++.
+* Reference types::             Handling Java reference types in C++.
+* Interfaces::                  How Java interfaces map to C++.
+* Objects and Classes::         C++ and Java classes.
+* Class Initialization::        How objects are initialized.
+* Object allocation::           How to create Java objects in C++.
+* Memory allocation::           How to allocate and free memory.
+* Arrays::                      Dealing with Java arrays in C++.
+* Methods::                     Java methods in C++.
+* Strings::                     Information about Java Strings.
+* Mixing with C++::             How CNI can interoperate with C++.
+* Exception Handling::          How exceptions are handled.
+* Synchronization::             Synchronizing between Java and C++.
+* Invocation::                  Starting the Java runtime from C++.
+* Reflection::                  Using reflection from C++.
+
+
+File: gcj.info,  Node: Basic concepts,  Next: Packages,  Up: About CNI
+
+11.1 Basic concepts
+===================
+
+In terms of languages features, Java is mostly a subset of C++.  Java
+has a few important extensions, plus a powerful standard class library,
+but on the whole that does not change the basic similarity.  Java is a
+hybrid object-oriented language, with a few native types, in addition
+to class types.  It is class-based, where a class may have static as
+well as per-object fields, and static as well as instance methods.
+Non-static methods may be virtual, and may be overloaded.  Overloading
+is resolved at compile time by matching the actual argument types
+against the parameter types.  Virtual methods are implemented using
+indirect calls through a dispatch table (virtual function table).
+Objects are allocated on the heap, and initialized using a constructor
+method.  Classes are organized in a package hierarchy.
+
+   All of the listed attributes are also true of C++, though C++ has
+extra features (for example in C++ objects may be allocated not just on
+the heap, but also statically or in a local stack frame).  Because
+`gcj' uses the same compiler technology as G++ (the GNU C++ compiler),
+it is possible to make the intersection of the two languages use the
+same ABI (object representation and calling conventions).  The key idea
+in CNI is that Java objects are C++ objects, and all Java classes are
+C++ classes (but not the other way around).  So the most important task
+in integrating Java and C++ is to remove gratuitous incompatibilities.
+
+   You write CNI code as a regular C++ source file.  (You do have to use
+a Java/CNI-aware C++ compiler, specifically a recent version of G++.)
+
+A CNI C++ source file must have:
+
+     #include <gcj/cni.h>
+
+and then must include one header file for each Java class it uses, e.g.:
+
+     #include <java/lang/Character.h>
+     #include <java/util/Date.h>
+     #include <java/lang/IndexOutOfBoundsException.h>
+
+These header files are automatically generated by `gcjh'.
+
+   CNI provides some functions and macros to make using Java objects and
+primitive types from C++ easier.  In general, these CNI functions and
+macros start with the `Jv' prefix, for example the function
+`JvNewObjectArray'.  This convention is used to avoid conflicts with
+other libraries.  Internal functions in CNI start with the prefix
+`_Jv_'.  You should not call these; if you find a need to, let us know
+and we will try to come up with an alternate solution.
+
+11.1.1 Limitations
+------------------
+
+Whilst a Java class is just a C++ class that doesn't mean that you are
+freed from the shackles of Java, a CNI C++ class must adhere to the
+rules of the Java programming language.
+
+   For example: it is not possible to declare a method in a CNI class
+that will take a C string (`char*') as an argument, or to declare a
+member variable of some non-Java datatype.
+
+
+File: gcj.info,  Node: Packages,  Next: Primitive types,  Prev: Basic concepts,  Up: About CNI
+
+11.2 Packages
+=============
+
+The only global names in Java are class names, and packages.  A
+"package" can contain zero or more classes, and also zero or more
+sub-packages.  Every class belongs to either an unnamed package or a
+package that has a hierarchical and globally unique name.
+
+   A Java package is mapped to a C++ "namespace".  The Java class
+`java.lang.String' is in the package `java.lang', which is a
+sub-package of `java'.  The C++ equivalent is the class
+`java::lang::String', which is in the namespace `java::lang' which is
+in the namespace `java'.
+
+Here is how you could express this:
+
+     (// Declare the class(es), possibly in a header file:
+     namespace java {
+       namespace lang {
+         class Object;
+         class String;
+         ...
+       }
+     }
+
+     class java::lang::String : public java::lang::Object
+     {
+       ...
+     };
+
+The `gcjh' tool automatically generates the necessary namespace
+declarations.
+
+11.2.1 Leaving out package names
+--------------------------------
+
+Always using the fully-qualified name of a java class can be tiresomely
+verbose.  Using the full qualified name also ties the code to a single
+package making code changes necessary should the class move from one
+package to another.  The Java `package' declaration specifies that the
+following class declarations are in the named package, without having
+to explicitly name the full package qualifiers.  The `package'
+declaration can be followed by zero or more `import' declarations, which
+allows either a single class or all the classes in a package to be
+named by a simple identifier.  C++ provides something similar with the
+`using' declaration and directive.
+
+In Java:
+
+     import PACKAGE-NAME.CLASS-NAME;
+
+allows the program text to refer to CLASS-NAME as a shorthand for the
+fully qualified name: `PACKAGE-NAME.CLASS-NAME'.
+
+To achieve the same effect C++, you have to do this:
+
+     using PACKAGE-NAME::CLASS-NAME;
+
+Java can also cause imports on demand, like this:
+
+     import PACKAGE-NAME.*;
+
+Doing this allows any class from the package PACKAGE-NAME to be
+referred to only by its class-name within the program text.
+
+The same effect can be achieved in C++ like this:
+
+     using namespace PACKAGE-NAME;
+
+
+File: gcj.info,  Node: Primitive types,  Next: Reference types,  Prev: Packages,  Up: About CNI
+
+11.3 Primitive types
+====================
+
+Java provides 8 "primitives" types which represent integers, floats,
+characters and booleans (and also the void type).  C++ has its own very
+similar concrete types.  Such types in C++ however are not always
+implemented in the same way (an int might be 16, 32 or 64 bits for
+example) so CNI provides a special C++ type for each primitive Java
+type:
+
+*Java type*    *C/C++ typename*   *Description*
+`char'         `jchar'            16 bit Unicode character
+`boolean'      `jboolean'         logical (true or false) values
+`byte'         `jbyte'            8-bit signed integer
+`short'        `jshort'           16 bit signed integer
+`int'          `jint'             32 bit signed integer
+`long'         `jlong'            64 bit signed integer
+`float'        `jfloat'           32 bit IEEE floating point number
+`double'       `jdouble'          64 bit IEEE floating point number
+`void'         `void'             no value
+
+   When referring to a Java type You should always use these C++
+typenames (e.g.: `jint') to avoid disappointment.
+
+11.3.1 Reference types associated with primitive types
+------------------------------------------------------
+
+In Java each primitive type has an associated reference type, e.g.:
+`boolean' has an associated `java.lang.Boolean.TYPE' class.  In order
+to make working with such classes easier GCJ provides the macro
+`JvPrimClass':
+
+ -- macro: JvPrimClass type
+     Return a pointer to the `Class' object corresponding to the type
+     supplied.
+
+          JvPrimClass(void) => java.lang.Void.TYPE
+
+
+
+File: gcj.info,  Node: Reference types,  Next: Interfaces,  Prev: Primitive types,  Up: About CNI
+
+11.4 Reference types
+====================
+
+A Java reference type is treated as a class in C++.  Classes and
+interfaces are handled this way.  A Java reference is translated to a
+C++ pointer, so for instance a Java `java.lang.String' becomes, in C++,
+`java::lang::String *'.
+
+   CNI provides a few built-in typedefs for the most common classes:
+*Java type*            *C++ typename*     *Description*
+`java.lang.Object'     `jobject'          Object type
+`java.lang.String'     `jstring'          String type
+`java.lang.Class'      `jclass'           Class type
+   
+   Every Java class or interface has a corresponding `Class' instance.
+These can be accessed in CNI via the static `class$' field of a class.
+The `class$' field is of type `Class' (and not `Class *'), so you will
+typically take the address of it.  
+
+   Here is how you can refer to the class of `String', which in Java
+would be written `String.class':
+
+     using namespace java::lang;
+     doSomething (&String::class$);
+
+
+File: gcj.info,  Node: Interfaces,  Next: Objects and Classes,  Prev: Reference types,  Up: About CNI
+
+11.5 Interfaces
+===============
+
+A Java class can "implement" zero or more "interfaces", in addition to
+inheriting from a single base class.
+
+   CNI allows CNI code to implement methods of interfaces.  You can
+also call methods through interface references, with some limitations.
+
+   CNI doesn't understand interface inheritance at all yet.  So, you
+can only call an interface method when the declared type of the field
+being called matches the interface which declares that method.  The
+workaround is to cast the interface reference to the right
+superinterface.
+
+   For example if you have:
+
+     interface A
+     {
+       void a();
+     }
+
+     interface B extends A
+     {
+       void b();
+     }
+
+   and declare a variable of type `B' in C++, you can't call `a()'
+unless you cast it to an `A' first.
+
+
+File: gcj.info,  Node: Objects and Classes,  Next: Class Initialization,  Prev: Interfaces,  Up: About CNI
+
+11.6 Objects and Classes
+========================
+
+11.6.1 Classes
+--------------
+
+All Java classes are derived from `java.lang.Object'.  C++ does not
+have a unique root class, but we use the C++ class `java::lang::Object'
+as the C++ version of the `java.lang.Object' Java class.  All other
+Java classes are mapped into corresponding C++ classes derived from
+`java::lang::Object'.
+
+   Interface inheritance (the `implements' keyword) is currently not
+reflected in the C++ mapping.
+
+11.6.2 Object fields
+--------------------
+
+Each object contains an object header, followed by the instance fields
+of the class, in order.  The object header consists of a single pointer
+to a dispatch or virtual function table.  (There may be extra fields
+_in front of_ the object, for example for memory management, but this
+is invisible to the application, and the reference to the object points
+to the dispatch table pointer.)
+
+   The fields are laid out in the same order, alignment, and size as in
+C++.  Specifically, 8-bit and 16-bit native types (`byte', `short',
+`char', and `boolean') are _not_ widened to 32 bits.  Note that the
+Java VM does extend 8-bit and 16-bit types to 32 bits when on the VM
+stack or temporary registers.
+
+   If you include the `gcjh'-generated header for a class, you can
+access fields of Java classes in the _natural_ way.  For example, given
+the following Java class:
+
+     public class Int
+     {
+       public int i;
+       public Int (int i) { this.i = i; }
+       public static Int zero = new Int(0);
+     }
+
+   you can write:
+
+     #include <gcj/cni.h>;
+     #include <Int>;
+
+     Int*
+     mult (Int *p, jint k)
+     {
+       if (k == 0)
+         return Int::zero;  // Static member access.
+       return new Int(p->i * k);
+     }
+
+11.6.3 Access specifiers
+------------------------
+
+CNI does not strictly enforce the Java access specifiers, because Java
+permissions cannot be directly mapped into C++ permission.  Private
+Java fields and methods are mapped to private C++ fields and methods,
+but other fields and methods are mapped to public fields and methods.
+
+
+File: gcj.info,  Node: Class Initialization,  Next: Object allocation,  Prev: Objects and Classes,  Up: About CNI
+
+11.7 Class Initialization
+=========================
+
+Java requires that each class be automatically initialized at the time
+of the first active use.  Initializing a class involves initializing
+the static fields, running code in class initializer methods, and
+initializing base classes.  There may also be some implementation
+specific actions, such as allocating `String' objects corresponding to
+string literals in the code.
+
+   The GCJ compiler inserts calls to `JvInitClass' at appropriate
+places to ensure that a class is initialized when required.  The C++
+compiler does not insert these calls automatically--it is the
+programmer's responsibility to make sure classes are initialized.
+However, this is fairly painless because of the conventions assumed by
+the Java system.
+
+   First, `libgcj' will make sure a class is initialized before an
+instance of that object is created.  This is one of the
+responsibilities of the `new' operation.  This is taken care of both in
+Java code, and in C++ code.  When G++ sees a `new' of a Java class, it
+will call a routine in `libgcj' to allocate the object, and that
+routine will take care of initializing the class.  Note however that
+this does not happen for Java arrays; you must allocate those using the
+appropriate CNI function.  It follows that you can access an instance
+field, or call an instance (non-static) method and be safe in the
+knowledge that the class and all of its base classes have been
+initialized.
+
+   Invoking a static method is also safe.  This is because the Java
+compiler adds code to the start of a static method to make sure the
+class is initialized.  However, the C++ compiler does not add this
+extra code.  Hence, if you write a native static method using CNI, you
+are responsible for calling `JvInitClass' before doing anything else in
+the method (unless you are sure it is safe to leave it out).
+
+   Accessing a static field also requires the class of the field to be
+initialized.  The Java compiler will generate code to call
+`JvInitClass' before getting or setting the field.  However, the C++
+compiler will not generate this extra code, so it is your
+responsibility to make sure the class is initialized before you access
+a static field from C++.
+
+
+File: gcj.info,  Node: Object allocation,  Next: Memory allocation,  Prev: Class Initialization,  Up: About CNI
+
+11.8 Object allocation
+======================
+
+New Java objects are allocated using a "class instance creation
+expression", e.g.:
+
+     new TYPE ( ... )
+
+   The same syntax is used in C++.  The main difference is that C++
+objects have to be explicitly deleted; in Java they are automatically
+deleted by the garbage collector.  Using CNI, you can allocate a new
+Java object using standard C++ syntax and the C++ compiler will allocate
+memory from the garbage collector.  If you have overloaded
+constructors, the compiler will choose the correct one using standard
+C++ overload resolution rules.
+
+For example:
+
+     java::util::Hashtable *ht = new java::util::Hashtable(120);
+
+
+File: gcj.info,  Node: Memory allocation,  Next: Arrays,  Prev: Object allocation,  Up: About CNI
+
+11.9 Memory allocation
+======================
+
+When allocating memory in CNI methods it is best to handle
+out-of-memory conditions by throwing a Java exception.  These functions
+are provided for that purpose:
+
+ -- Function: void* JvMalloc (jsize SIZE)
+     Calls malloc.  Throws `java.lang.OutOfMemoryError' if allocation
+     fails.
+
+ -- Function: void* JvRealloc (void* PTR, jsize SIZE)
+     Calls realloc.  Throws `java.lang.OutOfMemoryError' if
+     reallocation fails.
+
+ -- Function: void JvFree (void* PTR)
+     Calls free.
+
+
+File: gcj.info,  Node: Arrays,  Next: Methods,  Prev: Memory allocation,  Up: About CNI
+
+11.10 Arrays
+============
+
+While in many ways Java is similar to C and C++, it is quite different
+in its treatment of arrays.  C arrays are based on the idea of pointer
+arithmetic, which would be incompatible with Java's security
+requirements.  Java arrays are true objects (array types inherit from
+`java.lang.Object').  An array-valued variable is one that contains a
+reference (pointer) to an array object.
+
+   Referencing a Java array in C++ code is done using the `JArray'
+template, which as defined as follows:
+
+     class __JArray : public java::lang::Object
+     {
+     public:
+       int length;
+     };
+
+     template<class T>
+     class JArray : public __JArray
+     {
+       T data[0];
+     public:
+       T& operator[](jint i) { return data[i]; }
+     };
+
+   There are a number of `typedef's which correspond to `typedef's from
+the JNI.  Each is the type of an array holding objects of the relevant
+type:
+
+     typedef __JArray *jarray;
+     typedef JArray<jobject> *jobjectArray;
+     typedef JArray<jboolean> *jbooleanArray;
+     typedef JArray<jbyte> *jbyteArray;
+     typedef JArray<jchar> *jcharArray;
+     typedef JArray<jshort> *jshortArray;
+     typedef JArray<jint> *jintArray;
+     typedef JArray<jlong> *jlongArray;
+     typedef JArray<jfloat> *jfloatArray;
+     typedef JArray<jdouble> *jdoubleArray;
+
+ -- Method on template<class T>: T* elements (JArray<T> ARRAY)
+     This template function can be used to get a pointer to the
+     elements of the `array'.  For instance, you can fetch a pointer to
+     the integers that make up an `int[]' like so:
+
+          extern jintArray foo;
+          jint *intp = elements (foo);
+
+     The name of this function may change in the future.
+
+ -- Function: jobjectArray JvNewObjectArray (jsize LENGTH, jclass
+          KLASS, jobject INIT)
+     This creates a new array whose elements have reference type.
+     `klass' is the type of elements of the array and `init' is the
+     initial value put into every slot in the array.
+
+     using namespace java::lang;
+     JArray<String *> *array
+       = (JArray<String *> *) JvNewObjectArray(length, &String::class$, NULL);
+
+11.10.1 Creating arrays
+-----------------------
+
+For each primitive type there is a function which can be used to create
+a new array of that type.  The name of the function is of the form:
+
+     JvNewTYPEArray
+
+For example:
+
+     JvNewBooleanArray
+
+can be used to create an array of Java primitive boolean types.
+
+The following function definition is the template for all such
+functions:
+
+ -- Function: jbooleanArray JvNewBooleanArray (jint LENGTH)
+     Creates an array LENGTH indices long.
+
+ -- Function: jsize JvGetArrayLength (jarray ARRAY)
+     Returns the length of the ARRAY.
+
+
+File: gcj.info,  Node: Methods,  Next: Strings,  Prev: Arrays,  Up: About CNI
+
+11.11 Methods
+=============
+
+Java methods are mapped directly into C++ methods.  The header files
+generated by `gcjh' include the appropriate method definitions.
+Basically, the generated methods have the same names and
+_corresponding_ types as the Java methods, and are called in the
+natural manner.
+
+11.11.1 Overloading
+-------------------
+
+Both Java and C++ provide method overloading, where multiple methods in
+a class have the same name, and the correct one is chosen (at compile
+time) depending on the argument types.  The rules for choosing the
+correct method are (as expected) more complicated in C++ than in Java,
+but given a set of overloaded methods generated by `gcjh' the C++
+compiler will choose the expected one.
+
+   Common assemblers and linkers are not aware of C++ overloading, so
+the standard implementation strategy is to encode the parameter types
+of a method into its assembly-level name.  This encoding is called
+"mangling", and the encoded name is the "mangled name".  The same
+mechanism is used to implement Java overloading.  For C++/Java
+interoperability, it is important that both the Java and C++ compilers
+use the _same_ encoding scheme.
+
+11.11.2 Static methods
+----------------------
+
+Static Java methods are invoked in CNI using the standard C++ syntax,
+using the `::' operator rather than the `.' operator.
+
+For example:
+
+     jint i = java::lang::Math::round((jfloat) 2.3);
+
+C++ method definition syntax is used to define a static native method.
+For example:
+
+     #include <java/lang/Integer>
+     java::lang::Integer*
+     java::lang::Integer::getInteger(jstring str)
+     {
+       ...
+     }
+
+11.11.3 Object Constructors
+---------------------------
+
+Constructors are called implicitly as part of object allocation using
+the `new' operator.
+
+For example:
+
+     java::lang::Integer *x = new java::lang::Integer(234);
+
+   Java does not allow a constructor to be a native method.  This
+limitation can be coded round however because a constructor can _call_
+a native method.
+
+11.11.4 Instance methods
+------------------------
+
+Calling a Java instance method from a C++ CNI method is done using the
+standard C++ syntax, e.g.:
+
+     // First create the Java object.
+     java::lang::Integer *x = new java::lang::Integer(234);
+     // Now call a method.
+     jint prim_value = x->intValue();
+     if (x->longValue == 0)
+       ...
+
+Defining a Java native instance method is also done the natural way:
+
+     #include <java/lang/Integer.h>
+
+     jdouble
+     java::lang:Integer::doubleValue()
+     {
+       return (jdouble) value;
+     }
+
+11.11.5 Interface methods
+-------------------------
+
+In Java you can call a method using an interface reference.  This is
+supported, but not completely.  *Note Interfaces::.
+
+
+File: gcj.info,  Node: Strings,  Next: Mixing with C++,  Prev: Methods,  Up: About CNI
+
+11.12 Strings
+=============
+
+CNI provides a number of utility functions for working with Java Java
+`String' objects.  The names and interfaces are analogous to those of
+JNI.
+
+ -- Function: jstring JvNewString (const jchar* CHARS, jsize LEN)
+     Returns a Java `String' object with characters from the array of
+     Unicode characters CHARS up to the index LEN in that array.
+
+ -- Function: jstring JvNewStringLatin1 (const char* BYTES, jsize LEN)
+     Returns a Java `String' made up of LEN bytes from BYTES.
+
+ -- Function: jstring JvNewStringLatin1 (const char* BYTES)
+     As above but the length of the `String' is `strlen(BYTES)'.
+
+ -- Function: jstring JvNewStringUTF (const char* BYTES)
+     Returns a `String' which is made up of the UTF encoded characters
+     present in the C string BYTES.
+
+ -- Function: jchar* JvGetStringChars (jstring STR)
+     Returns a pointer to an array of characters making up the `String'
+     STR.
+
+ -- Function: int JvGetStringUTFLength (jstring STR)
+     Returns the number of bytes required to encode the contents of the
+     `String' STR in UTF-8.
+
+ -- Function: jsize JvGetStringUTFRegion (jstring STR, jsize START,
+          jsize LEN, char* BUF)
+     Puts the UTF-8 encoding of a region of the `String' STR into the
+     buffer `buf'.  The region to fetch is marked by START and LEN.
+
+     Note that BUF is a buffer, not a C string.  It is _not_ null
+     terminated.
+
+
+File: gcj.info,  Node: Mixing with C++,  Next: Exception Handling,  Prev: Strings,  Up: About CNI
+
+11.13 Interoperating with C/C++
+===============================
+
+Because CNI is designed to represent Java classes and methods it cannot
+be mixed readily with C/C++ types.
+
+   One important restriction is that Java classes cannot have non-Java
+type instance or static variables and cannot have methods which take
+non-Java types as arguments or return non-Java types.
+
+None of the following is possible with CNI:
+
+
+     class ::MyClass : public java::lang::Object
+     {
+        char* variable;  // char* is not a valid Java type.
+     }
+
+
+     uint
+     ::SomeClass::someMethod (char *arg)
+     {
+       .
+       .
+       .
+     }   // `uint' is not a valid Java type, neither is `char*'
+
+Of course, it is ok to use C/C++ types within the scope of a method:
+
+     jint
+     ::SomeClass::otherMethod (jstring str)
+     {
+        char *arg = ...
+        .
+        .
+        .
+     }
+
+11.13.1 RawData
+---------------
+
+The above restriction can be problematic, so CNI includes the
+`gnu.gcj.RawData' class.  The `RawData' class is a "non-scanned
+reference" type.  In other words variables declared of type `RawData'
+can contain any data and are not checked by the compiler or memory
+manager in any way.
+
+   This means that you can put C/C++ data structures (including classes)
+in your CNI classes, as long as you use the appropriate cast.
+
+Here are some examples:
+
+
+     class ::MyClass : public java::lang::Object
+     {
+        gnu.gcj.RawData string;
+
+        MyClass ();
+        gnu.gcj.RawData getText ();
+        void printText ();
+     }
+
+     ::MyClass::MyClass ()
+     {
+        char* text = ...
+        string = text;
+     }
+
+     gnu.gcj.RawData
+     ::MyClass::getText ()
+     {
+        return string;
+     }
+
+     void
+     ::MyClass::printText ()
+     {
+       printf("%s\n", (char*) string);
+     }
+
+11.13.2 RawDataManaged
+----------------------
+
+`gnu.gcj.RawDataManaged' is another type used to indicate special data
+used by native code. Unlike the `RawData' type, fields declared as
+`RawDataManaged' will be "marked" by the memory manager and considered
+for garbage collection.
+
+   Native data which is allocated using CNI's `JvAllocBytes()' function
+and stored in a `RawDataManaged' will be automatically freed when the
+Java object it is associated with becomes unreachable.
+
+11.13.3 Native memory allocation
+--------------------------------
+
+ -- Function: void* JvAllocBytes (jsize SIZE)
+     Allocates SIZE bytes from the heap.  The memory returned is zeroed.
+     This memory is not scanned for pointers by the garbage collector,
+     but will be freed if no references to it are discovered.
+
+     This function can be useful if you need to associate some native
+     data with a Java object. Using a CNI's special `RawDataManaged'
+     type, native data allocated with `JvAllocBytes' will be
+     automatically freed when the Java object itself becomes
+     unreachable.
+
+11.13.4 Posix signals
+---------------------
+
+On Posix based systems the `libgcj' library uses several signals
+internally.  CNI code should not attempt to use the same signals as
+doing so may cause `libgcj' and/or the CNI code to fail.
+
+   SIGSEGV is used on many systems to generate `NullPointerExceptions'.
+SIGCHLD is used internally by `Runtime.exec()'.  Several other signals
+(that vary from platform to platform) can be used by the memory manager
+and by `Thread.interrupt()'.
+
+
+File: gcj.info,  Node: Exception Handling,  Next: Synchronization,  Prev: Mixing with C++,  Up: About CNI
+
+11.14 Exception Handling
+========================
+
+While C++ and Java share a common exception handling framework, things
+are not yet perfectly integrated.  The main issue is that the run-time
+type information facilities of the two languages are not integrated.
+
+   Still, things work fairly well.  You can throw a Java exception from
+C++ using the ordinary `throw' construct, and this exception can be
+caught by Java code.  Similarly, you can catch an exception thrown from
+Java using the C++ `catch' construct.
+
+Here is an example:
+
+     if (i >= count)
+        throw new java::lang::IndexOutOfBoundsException();
+
+   Normally, G++ will automatically detect when you are writing C++
+code that uses Java exceptions, and handle them appropriately.
+However, if C++ code only needs to execute destructors when Java
+exceptions are thrown through it, GCC will guess incorrectly.  Sample
+problematic code:
+
+     struct S { ~S(); };
+
+     extern void bar();    // Is implemented in Java and may throw exceptions.
+
+     void foo()
+     {
+       S s;
+       bar();
+     }
+
+   The usual effect of an incorrect guess is a link failure,
+complaining of a missing routine called `__gxx_personality_v0'.
+
+   You can inform the compiler that Java exceptions are to be used in a
+translation unit, irrespective of what it might think, by writing
+`#pragma GCC java_exceptions' at the head of the file.  This `#pragma'
+must appear before any functions that throw or catch exceptions, or run
+destructors when exceptions are thrown through them.
+
+
+File: gcj.info,  Node: Synchronization,  Next: Invocation,  Prev: Exception Handling,  Up: About CNI
+
+11.15 Synchronization
+=====================
+
+Each Java object has an implicit monitor.  The Java VM uses the
+instruction `monitorenter' to acquire and lock a monitor, and
+`monitorexit' to release it.
+
+   The corresponding CNI macros are `JvMonitorEnter' and
+`JvMonitorExit' (JNI has similar  methods `MonitorEnter' and
+`MonitorExit').
+
+   The Java source language does not provide direct access to these
+primitives.  Instead, there is a `synchronized' statement that does an
+implicit `monitorenter' before entry to the block, and does a
+`monitorexit' on exit from the block.  Note that the lock has to be
+released even when the block is abnormally terminated by an exception,
+which means there is an implicit `try finally' surrounding
+synchronization locks.
+
+   From C++, it makes sense to use a destructor to release a lock.  CNI
+defines the following utility class:
+
+     class JvSynchronize() {
+       jobject obj;
+       JvSynchronize(jobject o) { obj = o; JvMonitorEnter(o); }
+       ~JvSynchronize() { JvMonitorExit(obj); }
+     };
+
+   So this Java code:
+
+     synchronized (OBJ)
+     {
+        CODE
+     }
+
+might become this C++ code:
+
+     {
+        JvSynchronize dummy (OBJ);
+        CODE;
+     }
+
+   Java also has methods with the `synchronized' attribute.  This is
+equivalent to wrapping the entire method body in a `synchronized'
+statement.  (Alternatively, an implementation could require the caller
+to do the synchronization.  This is not practical for a compiler,
+because each virtual method call would have to test at run-time if
+synchronization is needed.)  Since in `gcj' the `synchronized'
+attribute is handled by the method implementation, it is up to the
+programmer of a synchronized native method to handle the synchronization
+(in the C++ implementation of the method).  In other words, you need to
+manually add `JvSynchronize' in a `native synchronized' method.
+
+
+File: gcj.info,  Node: Invocation,  Next: Reflection,  Prev: Synchronization,  Up: About CNI
+
+11.16 Invocation
+================
+
+CNI permits C++ applications to make calls into Java classes, in
+addition to allowing Java code to call into C++. Several functions,
+known as the "invocation API", are provided to support this.
+
+ -- Function: jint JvCreateJavaVM (JvVMInitArgs* VM_ARGS)
+     Initializes the Java runtime. This function performs essential
+     initialization of the threads interface, garbage collector,
+     exception handling and other key aspects of the runtime. It must
+     be called once by an application with a non-Java `main()'
+     function, before any other Java or CNI calls are made.  It is
+     safe, but not recommended, to call `JvCreateJavaVM()' more than
+     once provided it is only called from a single thread.  The VMARGS
+     parameter can be used to specify initialization parameters for the
+     Java runtime. It may be `NULL'.
+
+     JvVMInitArgs represents a list of virtual machine initialization
+     arguments. `JvCreateJavaVM()' ignores the version field.
+
+          typedef struct JvVMOption
+          {
+            // a VM initialization option
+            char* optionString;
+            // extra information associated with this option
+            void* extraInfo;
+          } JvVMOption;
+
+          typedef struct JvVMInitArgs
+          {
+            // for compatibility with JavaVMInitArgs
+            jint version;
+
+            // number of VM initialization options
+            jint nOptions;
+
+            // an array of VM initialization options
+            JvVMOption* options;
+
+            // true if the option parser should ignore unrecognized options
+            jboolean ignoreUnrecognized;
+          } JvVMInitArgs;
+
+     `JvCreateJavaVM()' returns `0' upon success, or `-1' if the
+     runtime is already initialized.
+
+     _Note:_ In GCJ 3.1, the `vm_args' parameter is ignored. It is
+     recognized and used as of release 4.0.
+
+ -- Function: java::lang::Thread* JvAttachCurrentThread (jstring NAME,
+          java::lang::ThreadGroup* GROUP)
+     Registers an existing thread with the Java runtime.  This must be
+     called once from each thread, before that thread makes any other
+     Java or CNI calls. It must be called after `JvCreateJavaVM'.  NAME
+     specifies a name for the thread. It may be `NULL', in which case a
+     name will be generated.  GROUP is the ThreadGroup in which this
+     thread will be a member. If it is `NULL', the thread will be a
+     member of the main thread group.  The return value is the Java
+     `Thread' object that represents the thread.  It is safe to call
+     `JvAttachCurrentThread()' more than once from the same thread. If
+     the thread is already attached, the call is ignored and the current
+     thread object is returned.
+
+ -- Function: jint JvDetachCurrentThread ()
+     Unregisters a thread from the Java runtime. This should be called
+     by threads that were attached using `JvAttachCurrentThread()',
+     after they have finished making calls to Java code. This ensures
+     that any resources associated with the thread become eligible for
+     garbage collection.  This function returns `0' upon success, or
+     `-1' if the current thread is not attached.
+
+11.16.1 Handling uncaught exceptions
+------------------------------------
+
+If an exception is thrown from Java code called using the invocation
+API, and no handler for the exception can be found, the runtime will
+abort the application. In order to make the application more robust, it
+is recommended that code which uses the invocation API be wrapped by a
+top-level try/catch block that catches all Java exceptions.
+
+11.16.2 Example
+---------------
+
+The following code demonstrates the use of the invocation API. In this
+example, the C++ application initializes the Java runtime and attaches
+itself. The `java.lang.System' class is initialized in order to access
+its `out' field, and a Java string is printed. Finally, the thread is
+detached from the runtime once it has finished making Java calls.
+Everything is wrapped with a try/catch block to provide a default
+handler for any uncaught exceptions.
+
+   The example can be compiled with `c++ -c test.cc; gcj test.o'.
+
+     // test.cc
+     #include <gcj/cni.h>
+     #include <java/lang/System.h>
+     #include <java/io/PrintStream.h>
+     #include <java/lang/Throwable.h>
+
+     int main(int argc, char *argv[])
+     {
+       using namespace java::lang;
+
+       try
+       {
+         JvCreateJavaVM(NULL);
+         JvAttachCurrentThread(NULL, NULL);
+
+         String *message = JvNewStringLatin1("Hello from C++");
+         JvInitClass(&System::class$);
+         System::out->println(message);
+
+         JvDetachCurrentThread();
+       }
+       catch (Throwable *t)
+       {
+         System::err->println(JvNewStringLatin1("Unhandled Java exception:"));
+         t->printStackTrace();
+       }
+     }
+
+
+File: gcj.info,  Node: Reflection,  Prev: Invocation,  Up: About CNI
+
+11.17 Reflection
+================
+
+Reflection is possible with CNI code, it functions similarly to how it
+functions with JNI.
+
+   The types `jfieldID' and `jmethodID' are as in JNI.
+
+The functions:
+
+   * `JvFromReflectedField',
+
+   * `JvFromReflectedMethod',
+
+   * `JvToReflectedField'
+
+   * `JvToFromReflectedMethod'
+
+will be added shortly, as will other functions corresponding to JNI.
+
+
+File: gcj.info,  Node: System properties,  Next: Resources,  Prev: About CNI,  Up: Top
+
+12 System properties
+********************
+
+The runtime behavior of the `libgcj' library can be modified by setting
+certain system properties.  These properties can be compiled into the
+program using the `-DNAME[=VALUE]' option to `gcj' or by setting them
+explicitly in the program by calling the
+`java.lang.System.setProperty()' method.  Some system properties are
+only used for informational purposes (like giving a version number or a
+user name).  A program can inspect the current value of a property by
+calling the `java.lang.System.getProperty()' method.
+
+* Menu:
+
+* Standard Properties::         Standard properties supported by `libgcj'
+* GNU Classpath Properties::    Properties found in Classpath based libraries
+* libgcj Runtime Properties::   Properties specific to `libgcj'
+
+
+File: gcj.info,  Node: Standard Properties,  Next: GNU Classpath Properties,  Up: System properties
+
+12.1 Standard Properties
+========================
+
+The following properties are normally found in all implementations of
+the core libraries for the Java language.
+
+`java.version'
+     The `libgcj' version number.
+
+`java.vendor'
+     Set to `The Free Software Foundation, Inc.'
+
+`java.vendor.url'
+     Set to `http://gcc.gnu.org/java/'.
+
+`java.home'
+     The directory where `gcj' was installed.  Taken from the `--prefix'
+     option given to `configure'.
+
+`java.class.version'
+     The class format version number supported by the libgcj byte code
+     interpreter.  (Currently `46.0')
+
+`java.vm.specification.version'
+     The Virtual Machine Specification version implemented by `libgcj'.
+     (Currently `1.0')
+
+`java.vm.specification.vendor'
+     The name of the Virtual Machine specification designer.
+
+`java.vm.specification.name'
+     The name of the Virtual Machine specification (Set to `Java
+     Virtual Machine Specification').
+
+`java.vm.version'
+     The `gcj' version number.
+
+`java.vm.vendor'
+     Set to `The Free Software Foundation, Inc.'
+
+`java.vm.name'
+     Set to `GNU libgcj'.
+
+`java.specification.version'
+     The Runtime Environment specification version implemented by
+     `libgcj'.  (Currently set to `1.3')
+
+`java.specification.vendor'
+     The Runtime Environment specification designer.
+
+`java.specification.name'
+     The name of the Runtime Environment specification (Set to `Java
+     Platform API Specification').
+
+`java.class.path'
+     The paths (jar files, zip files and directories) used for finding
+     class files.
+
+`java.library.path'
+     Directory path used for finding native libraries.
+
+`java.io.tmpdir'
+     The directory used to put temporary files in.
+
+`java.compiler'
+     Name of the Just In Time compiler to use by the byte code
+     interpreter.  Currently not used in `libgcj'.
+
+`java.ext.dirs'
+     Directories containing jar files with extra libraries.  Will be
+     used when resolving classes.
+
+`java.protocol.handler.pkgs'
+     A `|' separated list of package names that is used to find classes
+     that implement handlers for `java.net.URL'.
+
+`java.rmi.server.codebase'
+     A list of URLs that is used by the `java.rmi.server.RMIClassLoader'
+     to load classes from.
+
+`jdbc.drivers'
+     A list of class names that will be loaded by the
+     `java.sql.DriverManager' when it starts up.
+
+`file.separator'
+     The separator used in when directories are included in a filename
+     (normally `/' or `\' ).
+
+`file.encoding'
+     The default character encoding used when converting platform
+     native files to Unicode (usually set to `8859_1').
+
+`path.separator'
+     The standard separator used when a string contains multiple paths
+     (normally `:' or `;'), the string is usually not a valid character
+     to use in normal directory names.)
+
+`line.separator'
+     The default line separator used on the platform (normally `\n',
+     `\r' or a combination of those two characters).
+
+`policy.provider'
+     The class name used for the default policy provider returned by
+     `java.security.Policy.getPolicy'.
+
+`user.name'
+     The name of the user running the program.  Can be the full name,
+     the login name or empty if unknown.
+
+`user.home'
+     The default directory to put user specific files in.
+
+`user.dir'
+     The current working directory from which the program was started.
+
+`user.language'
+     The default language as used by the `java.util.Locale' class.
+
+`user.region'
+     The default region as used by the `java.util.Local' class.
+
+`user.variant'
+     The default variant of the language and region local used.
+
+`user.timezone'
+     The default timezone as used by the `java.util.TimeZone' class.
+
+`os.name'
+     The operating system/kernel name that the program runs on.
+
+`os.arch'
+     The hardware that we are running on.
+
+`os.version'
+     The version number of the operating system/kernel.
+
+`awt.appletWarning'
+     The string to display when an untrusted applet is displayed.
+     Returned by `java.awt.Window.getWarningString()' when the window is
+     "insecure".
+
+`awt.toolkit'
+     The class name used for initializing the default
+     `java.awt.Toolkit'.  Defaults to `gnu.awt.gtk.GtkToolkit'.
+
+`http.proxyHost'
+     Name of proxy host for http connections.
+
+`http.proxyPort'
+     Port number to use when a proxy host is in use.
+
+
+
+File: gcj.info,  Node: GNU Classpath Properties,  Next: libgcj Runtime Properties,  Prev: Standard Properties,  Up: System properties
+
+12.2 GNU Classpath Properties
+=============================
+
+`libgcj' is based on the GNU Classpath (Essential Libraries for Java) a
+GNU project to create free core class libraries for use with virtual
+machines and compilers for the Java language.  The following properties
+are common to libraries based on GNU Classpath.
+
+`gcj.dumpobject'
+     Enables printing serialization debugging by the
+     `java.io.ObjectInput' and `java.io.ObjectOutput' classes when set
+     to something else then the empty string.  Only used when running a
+     debug build of the library.
+
+`gnu.classpath.vm.shortname'
+     This is a succinct name of the virtual machine.  For `libgcj',
+     this will always be `libgcj'.
+
+`gnu.classpath.home.url'
+     A base URL used for finding system property files (e.g.,
+     `classpath.security').  By default this is a `file:' URL pointing
+     to the `lib' directory under `java.home'.
+
+
+
+File: gcj.info,  Node: libgcj Runtime Properties,  Prev: GNU Classpath Properties,  Up: System properties
+
+12.3 libgcj Runtime Properties
+==============================
+
+The following properties are specific to the `libgcj' runtime and will
+normally not be found in other core libraries for the java language.
+
+`java.fullversion'
+     The combination of `java.vm.name' and `java.vm.version'.
+
+`java.vm.info'
+     Same as `java.fullversion'.
+
+`impl.prefix'
+     Used by the `java.net.DatagramSocket' class when set to something
+     else then the empty string.  When set all newly created
+     `DatagramSocket's will try to load a class
+     `java.net.[impl.prefix]DatagramSocketImpl' instead of the normal
+     `java.net.PlainDatagramSocketImpl'.
+
+`gnu.gcj.progname'
+     The class or binary name that was used to invoke the program. This
+     will be the name of the "main" class in the case where the `gij'
+     front end is used, or the program binary name in the case where an
+     application is compiled to a native binary.
+
+`gnu.gcj.user.realname'
+     The real name of the user, as taken from the password file.  This
+     may not always hold only the user's name (as some sites put extra
+     information in this field).  Also, this property is not available
+     on all platforms.
+
+`gnu.gcj.runtime.NameFinder.use_addr2line'
+     Whether an external process, `addr2line', should be used to
+     determine line number information when tracing the stack. Setting
+     this to `false' may suppress line numbers when printing stack
+     traces and when using the java.util.logging infrastructure.
+     However, performance may improve significantly for applications
+     that print stack traces or make logging calls frequently.
+
+`gnu.gcj.runtime.NameFinder.show_raw'
+     Whether the address of a stack frame should be printed when the
+     line number is unavailable. Setting this to `true' will cause the
+     name of the object and the offset within that object to be printed
+     when no line number is available.  This allows for off-line
+     decoding of stack traces if necessary debug information is
+     available.  The default is `false', no raw addresses are printed.
+
+`gnu.gcj.runtime.NameFinder.remove_unknown'
+     Whether stack frames for non-java code should be included in a
+     stack trace.  The default value is `true', stack frames for
+     non-java code are suppressed.  Setting this to `false' will cause
+     any non-java stack frames to be printed in addition to frames for
+     the java code.
+
+`gnu.gcj.runtime.VMClassLoader.library_control'
+     This controls how shared libraries are automatically loaded by the
+     built-in class loader.  If this property is set to `full', a full
+     search is done for each requested class.  If this property is set
+     to `cache', then any failed lookups are cached and not tried again.
+     If this property is set to `never' (the default), then lookups are
+     never done.  For more information, *Note Extensions::.
+
+`gnu.gcj.runtime.endorsed.dirs'
+     This is like the standard `java.endorsed.dirs', property, but
+     specifies some extra directories which are searched after the
+     standard endorsed directories.  This is primarily useful for
+     telling `libgcj' about additional libraries which are ordinarily
+     incorporated into the JDK, and which should be loaded by the
+     bootstrap class loader, but which are not yet part of `libgcj'
+     itself for some reason.
+
+`gnu.gcj.jit.compiler'
+     This is the full path to `gcj' executable which should be used to
+     compile classes just-in-time when `ClassLoader.defineClass' is
+     called.  If not set, `gcj' will not be invoked by the runtime;
+     this can also be controlled via `Compiler.disable'.
+
+`gnu.gcj.jit.options'
+     This is a space-separated string of options which should be passed
+     to `gcj' when in JIT mode.  If not set, a sensible default is
+     chosen.
+
+`gnu.gcj.jit.cachedir'
+     This is the directory where cached shared library files are
+     stored.  If not set, JIT compilation is disabled.  This should
+     never be set to a directory that is writable by any other user.
+
+`gnu.gcj.precompiled.db.path'
+     This is a sequence of file names, each referring to a file created
+     by `gcj-dbtool'.  These files will be used by `libgcj' to find
+     shared libraries corresponding to classes that are loaded from
+     bytecode.  `libgcj' often has a built-in default database; it can
+     be queried using `gcj-dbtool -p'.
+
+
+
+File: gcj.info,  Node: Resources,  Next: Index,  Prev: System properties,  Up: Top
+
+13 Resources
+************
+
+While writing `gcj' and `libgcj' we have, of course, relied heavily on
+documentation from Sun Microsystems.  In particular we have used The
+Java Language Specification (both first and second editions), the Java
+Class Libraries (volumes one and two), and the Java Virtual Machine
+Specification.  In addition we've used the online documentation at
+`http://java.sun.com/'.
+
+   The current `gcj' home page is `http://gcc.gnu.org/java/'.
+
+   For more information on gcc, see `http://gcc.gnu.org/'.
+
+   Some `libgcj' testing is done using the Mauve test suite.  This is a
+free software Java class library test suite which is being written
+because the JCK is not free.  See `http://sources.redhat.com/mauve/'
+for more information.
+
+
+File: gcj.info,  Node: Index,  Prev: Resources,  Up: Top
+
+Index
+*****
+
+
+* Menu:
+
+* class path:                            Input Options.        (line  6)
+* class$:                                Reference types.      (line 20)
+* elements on template<class T>:         Arrays.               (line 46)
+* FDL, GNU Free Documentation License:   GNU Free Documentation License.
+                                                               (line  6)
+* GCJ_PROPERTIES:                        Extensions.           (line 56)
+* jclass:                                Reference types.      (line 16)
+* jobject:                               Reference types.      (line 16)
+* jstring:                               Reference types.      (line 16)
+* JvAllocBytes:                          Mixing with C++.      (line 99)
+* JvAttachCurrentThread:                 Invocation.           (line 55)
+* JvCreateJavaVM:                        Invocation.           (line 11)
+* JvDetachCurrentThread:                 Invocation.           (line 68)
+* JvFree:                                Memory allocation.    (line 19)
+* JvGetArrayLength:                      Arrays.               (line 86)
+* JvGetStringChars:                      Strings.              (line 25)
+* JvGetStringUTFLength:                  Strings.              (line 29)
+* JvGetStringUTFRegion:                  Strings.              (line 34)
+* JvMalloc:                              Memory allocation.    (line 11)
+* JvNewBooleanArray:                     Arrays.               (line 83)
+* JvNewObjectArray:                      Arrays.               (line 57)
+* JvNewString:                           Strings.              (line 11)
+* JvNewStringLatin1:                     Strings.              (line 15)
+* JvNewStringUTF:                        Strings.              (line 21)
+* JvPrimClass:                           Primitive types.      (line 36)
+* JvRealloc:                             Memory allocation.    (line 15)
+
+
+
+Tag Table:
+Node: Top2810
+Node: Copying4229
+Node: GNU Free Documentation License41779
+Node: Invoking gcj66922
+Node: Input and output files67685
+Node: Input Options69211
+Node: Encodings72485
+Node: Warnings73691
+Node: Linking74804
+Node: Code Generation77743
+Node: Configure-time Options84523
+Node: Compatibility86263
+Node: Limitations86747
+Node: Extensions88329
+Node: Invoking jcf-dump91423
+Node: Invoking gij92368
+Node: Invoking gcj-dbtool95619
+Node: Invoking jv-convert98085
+Node: Invoking grmic99164
+Node: Invoking gc-analyze100550
+Node: Invoking aot-compile101991
+Node: Invoking rebuild-gcj-db102940
+Node: About CNI103250
+Node: Basic concepts104709
+Node: Packages107605
+Node: Primitive types109933
+Node: Reference types111611
+Node: Interfaces112700
+Node: Objects and Classes113611
+Node: Class Initialization115806
+Node: Object allocation118148
+Node: Memory allocation118938
+Node: Arrays119570
+Node: Methods122380
+Node: Strings125201
+Node: Mixing with C++126705
+Node: Exception Handling130176
+Node: Synchronization131810
+Node: Invocation133800
+Node: Reflection138736
+Node: System properties139197
+Node: Standard Properties140074
+Node: GNU Classpath Properties144506
+Node: libgcj Runtime Properties145553
+Node: Resources150055
+Node: Index150893
+
+End Tag Table
diff --git a/gcc/doc/gcov.1 b/gcc/doc/gcov.1
new file mode 100644
index 000000000..efecfb74e
--- /dev/null
+++ b/gcc/doc/gcov.1
@@ -0,0 +1,635 @@
+.\" Automatically generated by Pod::Man 2.25 (Pod::Simple 3.16)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  \*(C+ will
+.\" give a nicer C++.  Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available.  \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GCOV 1"
+.TH GCOV 1 "2013-04-12" "gcc-4.6.4" "GNU"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+gcov \- coverage testing tool
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+gcov [\fB\-v\fR|\fB\-\-version\fR] [\fB\-h\fR|\fB\-\-help\fR]
+     [\fB\-a\fR|\fB\-\-all\-blocks\fR]
+     [\fB\-b\fR|\fB\-\-branch\-probabilities\fR]
+     [\fB\-c\fR|\fB\-\-branch\-counts\fR]
+     [\fB\-n\fR|\fB\-\-no\-output\fR]
+     [\fB\-l\fR|\fB\-\-long\-file\-names\fR]
+     [\fB\-p\fR|\fB\-\-preserve\-paths\fR]
+     [\fB\-f\fR|\fB\-\-function\-summaries\fR]
+     [\fB\-o\fR|\fB\-\-object\-directory\fR \fIdirectory|file\fR] \fIsourcefiles\fR
+     [\fB\-u\fR|\fB\-\-unconditional\-branches\fR]
+     [\fB\-d\fR|\fB\-\-display\-progress\fR]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBgcov\fR is a test coverage program.  Use it in concert with \s-1GCC\s0
+to analyze your programs to help create more efficient, faster running
+code and to discover untested parts of your program.  You can use
+\&\fBgcov\fR as a profiling tool to help discover where your
+optimization efforts will best affect your code.  You can also use
+\&\fBgcov\fR along with the other profiling tool, \fBgprof\fR, to
+assess which parts of your code use the greatest amount of computing
+time.
+.PP
+Profiling tools help you analyze your code's performance.  Using a
+profiler such as \fBgcov\fR or \fBgprof\fR, you can find out some
+basic performance statistics, such as:
+.IP "\(bu" 4
+how often each line of code executes
+.IP "\(bu" 4
+what lines of code are actually executed
+.IP "\(bu" 4
+how much computing time each section of code uses
+.PP
+Once you know these things about how your code works when compiled, you
+can look at each module to see which modules should be optimized.
+\&\fBgcov\fR helps you determine where to work on optimization.
+.PP
+Software developers also use coverage testing in concert with
+testsuites, to make sure software is actually good enough for a release.
+Testsuites can verify that a program works as expected; a coverage
+program tests to see how much of the program is exercised by the
+testsuite.  Developers can then determine what kinds of test cases need
+to be added to the testsuites to create both better testing and a better
+final product.
+.PP
+You should compile your code without optimization if you plan to use
+\&\fBgcov\fR because the optimization, by combining some lines of code
+into one function, may not give you as much information as you need to
+look for `hot spots' where the code is using a great deal of computer
+time.  Likewise, because \fBgcov\fR accumulates statistics by line (at
+the lowest resolution), it works best with a programming style that
+places only one statement on each line.  If you use complicated macros
+that expand to loops or to other control structures, the statistics are
+less helpful\-\-\-they only report on the line where the macro call
+appears.  If your complex macros behave like functions, you can replace
+them with inline functions to solve this problem.
+.PP
+\&\fBgcov\fR creates a logfile called \fI\fIsourcefile\fI.gcov\fR which
+indicates how many times each line of a source file \fI\fIsourcefile\fI.c\fR
+has executed.  You can use these logfiles along with \fBgprof\fR to aid
+in fine-tuning the performance of your programs.  \fBgprof\fR gives
+timing information you can use along with the information you get from
+\&\fBgcov\fR.
+.PP
+\&\fBgcov\fR works only on code compiled with \s-1GCC\s0.  It is not
+compatible with any other profiling or test coverage mechanism.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-h\fR" 4
+.IX Item "-h"
+.PD 0
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD
+Display help about using \fBgcov\fR (on the standard output), and
+exit without doing any further processing.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Display the \fBgcov\fR version number (on the standard output),
+and exit without doing any further processing.
+.IP "\fB\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.IP "\fB\-\-all\-blocks\fR" 4
+.IX Item "--all-blocks"
+.PD
+Write individual execution counts for every basic block.  Normally gcov
+outputs execution counts only for the main blocks of a line.  With this
+option you can determine if blocks within a single line are not being
+executed.
+.IP "\fB\-b\fR" 4
+.IX Item "-b"
+.PD 0
+.IP "\fB\-\-branch\-probabilities\fR" 4
+.IX Item "--branch-probabilities"
+.PD
+Write branch frequencies to the output file, and write branch summary
+info to the standard output.  This option allows you to see how often
+each branch in your program was taken.  Unconditional branches will not
+be shown, unless the \fB\-u\fR option is given.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+.PD 0
+.IP "\fB\-\-branch\-counts\fR" 4
+.IX Item "--branch-counts"
+.PD
+Write branch frequencies as the number of branches taken, rather than
+the percentage of branches taken.
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+.PD 0
+.IP "\fB\-\-no\-output\fR" 4
+.IX Item "--no-output"
+.PD
+Do not create the \fBgcov\fR output file.
+.IP "\fB\-l\fR" 4
+.IX Item "-l"
+.PD 0
+.IP "\fB\-\-long\-file\-names\fR" 4
+.IX Item "--long-file-names"
+.PD
+Create long file names for included source files.  For example, if the
+header file \fIx.h\fR contains code, and was included in the file
+\&\fIa.c\fR, then running \fBgcov\fR on the file \fIa.c\fR will produce
+an output file called \fIa.c##x.h.gcov\fR instead of \fIx.h.gcov\fR.
+This can be useful if \fIx.h\fR is included in multiple source
+files.  If you use the \fB\-p\fR option, both the including and
+included file names will be complete path names.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+.PD 0
+.IP "\fB\-\-preserve\-paths\fR" 4
+.IX Item "--preserve-paths"
+.PD
+Preserve complete path information in the names of generated
+\&\fI.gcov\fR files.  Without this option, just the filename component is
+used.  With this option, all directories are used, with \fB/\fR characters
+translated to \fB#\fR characters, \fI.\fR directory components
+removed and \fI..\fR
+components renamed to \fB^\fR.  This is useful if sourcefiles are in several
+different directories.  It also affects the \fB\-l\fR option.
+.IP "\fB\-f\fR" 4
+.IX Item "-f"
+.PD 0
+.IP "\fB\-\-function\-summaries\fR" 4
+.IX Item "--function-summaries"
+.PD
+Output summaries for each function in addition to the file level summary.
+.IP "\fB\-o\fR \fIdirectory|file\fR" 4
+.IX Item "-o directory|file"
+.PD 0
+.IP "\fB\-\-object\-directory\fR \fIdirectory\fR" 4
+.IX Item "--object-directory directory"
+.IP "\fB\-\-object\-file\fR \fIfile\fR" 4
+.IX Item "--object-file file"
+.PD
+Specify either the directory containing the gcov data files, or the
+object path name.  The \fI.gcno\fR, and
+\&\fI.gcda\fR data files are searched for using this option.  If a directory
+is specified, the data files are in that directory and named after the
+source file name, without its extension.  If a file is specified here,
+the data files are named after that file, without its extension.  If this
+option is not supplied, it defaults to the current directory.
+.IP "\fB\-u\fR" 4
+.IX Item "-u"
+.PD 0
+.IP "\fB\-\-unconditional\-branches\fR" 4
+.IX Item "--unconditional-branches"
+.PD
+When branch probabilities are given, include those of unconditional branches.
+Unconditional branches are normally not interesting.
+.IP "\fB\-d\fR" 4
+.IX Item "-d"
+.PD 0
+.IP "\fB\-\-display\-progress\fR" 4
+.IX Item "--display-progress"
+.PD
+Display the progress on the standard output.
+.PP
+\&\fBgcov\fR should be run with the current directory the same as that
+when you invoked the compiler.  Otherwise it will not be able to locate
+the source files.  \fBgcov\fR produces files called
+\&\fI\fImangledname\fI.gcov\fR in the current directory.  These contain
+the coverage information of the source file they correspond to.
+One \fI.gcov\fR file is produced for each source file containing code,
+which was compiled to produce the data files.  The \fImangledname\fR part
+of the output file name is usually simply the source file name, but can
+be something more complicated if the \fB\-l\fR or \fB\-p\fR options are
+given.  Refer to those options for details.
+.PP
+The \fI.gcov\fR files contain the \fB:\fR separated fields along with
+program source code.  The format is
+.PP
+.Vb 1
+\&        <execution_count>:<line_number>:<source line text>
+.Ve
+.PP
+Additional block information may succeed each line, when requested by
+command line option.  The \fIexecution_count\fR is \fB\-\fR for lines
+containing no code and \fB#####\fR for lines which were never executed.
+Some lines of information at the start have \fIline_number\fR of zero.
+.PP
+The preamble lines are of the form
+.PP
+.Vb 1
+\&        \-:0:<tag>:<value>
+.Ve
+.PP
+The ordering and number of these preamble lines will be augmented as
+\&\fBgcov\fR development progresses \-\-\- do not rely on them remaining
+unchanged.  Use \fItag\fR to locate a particular preamble line.
+.PP
+The additional block information is of the form
+.PP
+.Vb 1
+\&        <tag> <information>
+.Ve
+.PP
+The \fIinformation\fR is human readable, but designed to be simple
+enough for machine parsing too.
+.PP
+When printing percentages, 0% and 100% are only printed when the values
+are \fIexactly\fR 0% and 100% respectively.  Other values which would
+conventionally be rounded to 0% or 100% are instead printed as the
+nearest non-boundary value.
+.PP
+When using \fBgcov\fR, you must first compile your program with two
+special \s-1GCC\s0 options: \fB\-fprofile\-arcs \-ftest\-coverage\fR.
+This tells the compiler to generate additional information needed by
+gcov (basically a flow graph of the program) and also includes
+additional code in the object files for generating the extra profiling
+information needed by gcov.  These additional files are placed in the
+directory where the object file is located.
+.PP
+Running the program will cause profile output to be generated.  For each
+source file compiled with \fB\-fprofile\-arcs\fR, an accompanying
+\&\fI.gcda\fR file will be placed in the object file directory.
+.PP
+Running \fBgcov\fR with your program's source file names as arguments
+will now produce a listing of the code along with frequency of execution
+for each line.  For example, if your program is called \fItmp.c\fR, this
+is what you see when you use the basic \fBgcov\fR facility:
+.PP
+.Vb 5
+\&        $ gcc \-fprofile\-arcs \-ftest\-coverage tmp.c
+\&        $ a.out
+\&        $ gcov tmp.c
+\&        90.00% of 10 source lines executed in file tmp.c
+\&        Creating tmp.c.gcov.
+.Ve
+.PP
+The file \fItmp.c.gcov\fR contains output from \fBgcov\fR.
+Here is a sample:
+.PP
+.Vb 10
+\&                \-:    0:Source:tmp.c
+\&                \-:    0:Graph:tmp.gcno
+\&                \-:    0:Data:tmp.gcda
+\&                \-:    0:Runs:1
+\&                \-:    0:Programs:1
+\&                \-:    1:#include <stdio.h>
+\&                \-:    2:
+\&                \-:    3:int main (void)
+\&                1:    4:{
+\&                1:    5:  int i, total;
+\&                \-:    6:
+\&                1:    7:  total = 0;
+\&                \-:    8:
+\&               11:    9:  for (i = 0; i < 10; i++)
+\&               10:   10:    total += i;
+\&                \-:   11:
+\&                1:   12:  if (total != 45)
+\&            #####:   13:    printf ("Failure\en");
+\&                \-:   14:  else
+\&                1:   15:    printf ("Success\en");
+\&                1:   16:  return 0;
+\&                \-:   17:}
+.Ve
+.PP
+When you use the \fB\-a\fR option, you will get individual block
+counts, and the output looks like this:
+.PP
+.Vb 10
+\&                \-:    0:Source:tmp.c
+\&                \-:    0:Graph:tmp.gcno
+\&                \-:    0:Data:tmp.gcda
+\&                \-:    0:Runs:1
+\&                \-:    0:Programs:1
+\&                \-:    1:#include <stdio.h>
+\&                \-:    2:
+\&                \-:    3:int main (void)
+\&                1:    4:{
+\&                1:    4\-block  0
+\&                1:    5:  int i, total;
+\&                \-:    6:
+\&                1:    7:  total = 0;
+\&                \-:    8:
+\&               11:    9:  for (i = 0; i < 10; i++)
+\&               11:    9\-block  0
+\&               10:   10:    total += i;
+\&               10:   10\-block  0
+\&                \-:   11:
+\&                1:   12:  if (total != 45)
+\&                1:   12\-block  0
+\&            #####:   13:    printf ("Failure\en");
+\&            $$$$$:   13\-block  0
+\&                \-:   14:  else
+\&                1:   15:    printf ("Success\en");
+\&                1:   15\-block  0
+\&                1:   16:  return 0;
+\&                1:   16\-block  0
+\&                \-:   17:}
+.Ve
+.PP
+In this mode, each basic block is only shown on one line \*(-- the last
+line of the block.  A multi-line block will only contribute to the
+execution count of that last line, and other lines will not be shown
+to contain code, unless previous blocks end on those lines.
+The total execution count of a line is shown and subsequent lines show
+the execution counts for individual blocks that end on that line.  After each
+block, the branch and call counts of the block will be shown, if the
+\&\fB\-b\fR option is given.
+.PP
+Because of the way \s-1GCC\s0 instruments calls, a call count can be shown
+after a line with no individual blocks.
+As you can see, line 13 contains a basic block that was not executed.
+.PP
+When you use the \fB\-b\fR option, your output looks like this:
+.PP
+.Vb 6
+\&        $ gcov \-b tmp.c
+\&        90.00% of 10 source lines executed in file tmp.c
+\&        80.00% of 5 branches executed in file tmp.c
+\&        80.00% of 5 branches taken at least once in file tmp.c
+\&        50.00% of 2 calls executed in file tmp.c
+\&        Creating tmp.c.gcov.
+.Ve
+.PP
+Here is a sample of a resulting \fItmp.c.gcov\fR file:
+.PP
+.Vb 10
+\&                \-:    0:Source:tmp.c
+\&                \-:    0:Graph:tmp.gcno
+\&                \-:    0:Data:tmp.gcda
+\&                \-:    0:Runs:1
+\&                \-:    0:Programs:1
+\&                \-:    1:#include <stdio.h>
+\&                \-:    2:
+\&                \-:    3:int main (void)
+\&        function main called 1 returned 1 blocks executed 75%
+\&                1:    4:{
+\&                1:    5:  int i, total;
+\&                \-:    6:
+\&                1:    7:  total = 0;
+\&                \-:    8:
+\&               11:    9:  for (i = 0; i < 10; i++)
+\&        branch  0 taken 91% (fallthrough)
+\&        branch  1 taken 9%
+\&               10:   10:    total += i;
+\&                \-:   11:
+\&                1:   12:  if (total != 45)
+\&        branch  0 taken 0% (fallthrough)
+\&        branch  1 taken 100%
+\&            #####:   13:    printf ("Failure\en");
+\&        call    0 never executed
+\&                \-:   14:  else
+\&                1:   15:    printf ("Success\en");
+\&        call    0 called 1 returned 100%
+\&                1:   16:  return 0;
+\&                \-:   17:}
+.Ve
+.PP
+For each function, a line is printed showing how many times the function
+is called, how many times it returns and what percentage of the
+function's blocks were executed.
+.PP
+For each basic block, a line is printed after the last line of the basic
+block describing the branch or call that ends the basic block.  There can
+be multiple branches and calls listed for a single source line if there
+are multiple basic blocks that end on that line.  In this case, the
+branches and calls are each given a number.  There is no simple way to map
+these branches and calls back to source constructs.  In general, though,
+the lowest numbered branch or call will correspond to the leftmost construct
+on the source line.
+.PP
+For a branch, if it was executed at least once, then a percentage
+indicating the number of times the branch was taken divided by the
+number of times the branch was executed will be printed.  Otherwise, the
+message \*(L"never executed\*(R" is printed.
+.PP
+For a call, if it was executed at least once, then a percentage
+indicating the number of times the call returned divided by the number
+of times the call was executed will be printed.  This will usually be
+100%, but may be less for functions that call \f(CW\*(C`exit\*(C'\fR or \f(CW\*(C`longjmp\*(C'\fR,
+and thus may not return every time they are called.
+.PP
+The execution counts are cumulative.  If the example program were
+executed again without removing the \fI.gcda\fR file, the count for the
+number of times each line in the source was executed would be added to
+the results of the previous run(s).  This is potentially useful in
+several ways.  For example, it could be used to accumulate data over a
+number of program runs as part of a test verification suite, or to
+provide more accurate long-term information over a large number of
+program runs.
+.PP
+The data in the \fI.gcda\fR files is saved immediately before the program
+exits.  For each source file compiled with \fB\-fprofile\-arcs\fR, the
+profiling code first attempts to read in an existing \fI.gcda\fR file; if
+the file doesn't match the executable (differing number of basic block
+counts) it will ignore the contents of the file.  It then adds in the
+new execution counts and finally writes the data to the file.
+.SS "Using \fBgcov\fP with \s-1GCC\s0 Optimization"
+.IX Subsection "Using gcov with GCC Optimization"
+If you plan to use \fBgcov\fR to help optimize your code, you must
+first compile your program with two special \s-1GCC\s0 options:
+\&\fB\-fprofile\-arcs \-ftest\-coverage\fR.  Aside from that, you can use any
+other \s-1GCC\s0 options; but if you want to prove that every single line
+in your program was executed, you should not compile with optimization
+at the same time.  On some machines the optimizer can eliminate some
+simple code lines by combining them with other lines.  For example, code
+like this:
+.PP
+.Vb 4
+\&        if (a != b)
+\&          c = 1;
+\&        else
+\&          c = 0;
+.Ve
+.PP
+can be compiled into one instruction on some machines.  In this case,
+there is no way for \fBgcov\fR to calculate separate execution counts
+for each line because there isn't separate code for each line.  Hence
+the \fBgcov\fR output looks like this if you compiled the program with
+optimization:
+.PP
+.Vb 4
+\&              100:   12:if (a != b)
+\&              100:   13:  c = 1;
+\&              100:   14:else
+\&              100:   15:  c = 0;
+.Ve
+.PP
+The output shows that this block of code, combined by optimization,
+executed 100 times.  In one sense this result is correct, because there
+was only one instruction representing all four of these lines.  However,
+the output does not indicate how many times the result was 0 and how
+many times the result was 1.
+.PP
+Inlineable functions can create unexpected line counts.  Line counts are
+shown for the source code of the inlineable function, but what is shown
+depends on where the function is inlined, or if it is not inlined at all.
+.PP
+If the function is not inlined, the compiler must emit an out of line
+copy of the function, in any object file that needs it.  If
+\&\fIfileA.o\fR and \fIfileB.o\fR both contain out of line bodies of a
+particular inlineable function, they will also both contain coverage
+counts for that function.  When \fIfileA.o\fR and \fIfileB.o\fR are
+linked together, the linker will, on many systems, select one of those
+out of line bodies for all calls to that function, and remove or ignore
+the other.  Unfortunately, it will not remove the coverage counters for
+the unused function body.  Hence when instrumented, all but one use of
+that function will show zero counts.
+.PP
+If the function is inlined in several places, the block structure in
+each location might not be the same.  For instance, a condition might
+now be calculable at compile time in some instances.  Because the
+coverage of all the uses of the inline function will be shown for the
+same source lines, the line counts themselves might seem inconsistent.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7), \fIgcc\fR\|(1) and the Info entry for \fIgcc\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1996, 1997, 1999, 2000, 2001, 2002, 2003, 2004,
+2005, 2008, 2010  Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
+Free Software\*(R", the Front-Cover texts being (a) (see below), and with
+the Back-Cover Texts being (b) (see below).  A copy of the license is
+included in the \fIgfdl\fR\|(7) man page.
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\&     A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\&     You have freedom to copy and modify this GNU Manual, like GNU
+\&     software.  Copies published by the Free Software Foundation raise
+\&     funds for GNU development.
+.Ve
diff --git a/gcc/doc/gcov.texi b/gcc/doc/gcov.texi
new file mode 100644
index 000000000..4c71e1950
--- /dev/null
+++ b/gcc/doc/gcov.texi
@@ -0,0 +1,578 @@
+@c Copyright (C) 1996, 1997, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+@c 2008, 2010 Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@ignore
+@c man begin COPYRIGHT
+Copyright @copyright{} 1996, 1997, 1999, 2000, 2001, 2002, 2003, 2004,
+2005, 2008, 2010  Free Software Foundation, Inc.
+
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being ``GNU General Public License'' and ``Funding
+Free Software'', the Front-Cover texts being (a) (see below), and with
+the Back-Cover Texts being (b) (see below).  A copy of the license is
+included in the gfdl(7) man page.
+
+(a) The FSF's Front-Cover Text is:
+
+     A GNU Manual
+
+(b) The FSF's Back-Cover Text is:
+
+     You have freedom to copy and modify this GNU Manual, like GNU
+     software.  Copies published by the Free Software Foundation raise
+     funds for GNU development.
+@c man end
+@c Set file name and title for the man page.
+@setfilename gcov
+@settitle coverage testing tool
+@end ignore
+
+@node Gcov
+@chapter @command{gcov}---a Test Coverage Program
+
+@command{gcov} is a tool you can use in conjunction with GCC to
+test code coverage in your programs.
+
+@menu
+* Gcov Intro::                  Introduction to gcov.
+* Invoking Gcov::               How to use gcov.
+* Gcov and Optimization::       Using gcov with GCC optimization.
+* Gcov Data Files::             The files used by gcov.
+* Cross-profiling::             Data file relocation.
+@end menu
+
+@node Gcov Intro
+@section Introduction to @command{gcov}
+@c man begin DESCRIPTION
+
+@command{gcov} is a test coverage program.  Use it in concert with GCC
+to analyze your programs to help create more efficient, faster running
+code and to discover untested parts of your program.  You can use
+@command{gcov} as a profiling tool to help discover where your
+optimization efforts will best affect your code.  You can also use
+@command{gcov} along with the other profiling tool, @command{gprof}, to
+assess which parts of your code use the greatest amount of computing
+time.
+
+Profiling tools help you analyze your code's performance.  Using a
+profiler such as @command{gcov} or @command{gprof}, you can find out some
+basic performance statistics, such as:
+
+@itemize @bullet
+@item
+how often each line of code executes
+
+@item
+what lines of code are actually executed
+
+@item
+how much computing time each section of code uses
+@end itemize
+
+Once you know these things about how your code works when compiled, you
+can look at each module to see which modules should be optimized.
+@command{gcov} helps you determine where to work on optimization.
+
+Software developers also use coverage testing in concert with
+testsuites, to make sure software is actually good enough for a release.
+Testsuites can verify that a program works as expected; a coverage
+program tests to see how much of the program is exercised by the
+testsuite.  Developers can then determine what kinds of test cases need
+to be added to the testsuites to create both better testing and a better
+final product.
+
+You should compile your code without optimization if you plan to use
+@command{gcov} because the optimization, by combining some lines of code
+into one function, may not give you as much information as you need to
+look for `hot spots' where the code is using a great deal of computer
+time.  Likewise, because @command{gcov} accumulates statistics by line (at
+the lowest resolution), it works best with a programming style that
+places only one statement on each line.  If you use complicated macros
+that expand to loops or to other control structures, the statistics are
+less helpful---they only report on the line where the macro call
+appears.  If your complex macros behave like functions, you can replace
+them with inline functions to solve this problem.
+
+@command{gcov} creates a logfile called @file{@var{sourcefile}.gcov} which
+indicates how many times each line of a source file @file{@var{sourcefile}.c}
+has executed.  You can use these logfiles along with @command{gprof} to aid
+in fine-tuning the performance of your programs.  @command{gprof} gives
+timing information you can use along with the information you get from
+@command{gcov}.
+
+@command{gcov} works only on code compiled with GCC@.  It is not
+compatible with any other profiling or test coverage mechanism.
+
+@c man end
+
+@node Invoking Gcov
+@section Invoking @command{gcov}
+
+@smallexample
+gcov @r{[}@var{options}@r{]} @var{sourcefiles}
+@end smallexample
+
+@command{gcov} accepts the following options:
+
+@ignore
+@c man begin SYNOPSIS
+gcov [@option{-v}|@option{--version}] [@option{-h}|@option{--help}]
+     [@option{-a}|@option{--all-blocks}]
+     [@option{-b}|@option{--branch-probabilities}]
+     [@option{-c}|@option{--branch-counts}]
+     [@option{-n}|@option{--no-output}]
+     [@option{-l}|@option{--long-file-names}]
+     [@option{-p}|@option{--preserve-paths}]
+     [@option{-f}|@option{--function-summaries}]
+     [@option{-o}|@option{--object-directory} @var{directory|file}] @var{sourcefiles}
+     [@option{-u}|@option{--unconditional-branches}]
+     [@option{-d}|@option{--display-progress}]
+@c man end
+@c man begin SEEALSO
+gpl(7), gfdl(7), fsf-funding(7), gcc(1) and the Info entry for @file{gcc}.
+@c man end
+@end ignore
+
+@c man begin OPTIONS
+@table @gcctabopt
+@item -h
+@itemx --help
+Display help about using @command{gcov} (on the standard output), and
+exit without doing any further processing.
+
+@item -v
+@itemx --version
+Display the @command{gcov} version number (on the standard output),
+and exit without doing any further processing.
+
+@item -a
+@itemx --all-blocks
+Write individual execution counts for every basic block.  Normally gcov
+outputs execution counts only for the main blocks of a line.  With this
+option you can determine if blocks within a single line are not being
+executed.
+
+@item -b
+@itemx --branch-probabilities
+Write branch frequencies to the output file, and write branch summary
+info to the standard output.  This option allows you to see how often
+each branch in your program was taken.  Unconditional branches will not
+be shown, unless the @option{-u} option is given.
+
+@item -c
+@itemx --branch-counts
+Write branch frequencies as the number of branches taken, rather than
+the percentage of branches taken.
+
+@item -n
+@itemx --no-output
+Do not create the @command{gcov} output file.
+
+@item -l
+@itemx --long-file-names
+Create long file names for included source files.  For example, if the
+header file @file{x.h} contains code, and was included in the file
+@file{a.c}, then running @command{gcov} on the file @file{a.c} will produce
+an output file called @file{a.c##x.h.gcov} instead of @file{x.h.gcov}.
+This can be useful if @file{x.h} is included in multiple source
+files.  If you use the @samp{-p} option, both the including and
+included file names will be complete path names.
+
+@item -p
+@itemx --preserve-paths
+Preserve complete path information in the names of generated
+@file{.gcov} files.  Without this option, just the filename component is
+used.  With this option, all directories are used, with @samp{/} characters
+translated to @samp{#} characters, @file{.} directory components
+removed and @file{..}
+components renamed to @samp{^}.  This is useful if sourcefiles are in several
+different directories.  It also affects the @samp{-l} option.
+
+@item -f
+@itemx --function-summaries
+Output summaries for each function in addition to the file level summary.
+
+@item -o @var{directory|file}
+@itemx --object-directory @var{directory}
+@itemx --object-file @var{file}
+Specify either the directory containing the gcov data files, or the
+object path name.  The @file{.gcno}, and
+@file{.gcda} data files are searched for using this option.  If a directory
+is specified, the data files are in that directory and named after the
+source file name, without its extension.  If a file is specified here,
+the data files are named after that file, without its extension.  If this
+option is not supplied, it defaults to the current directory.
+
+@item -u
+@itemx --unconditional-branches
+When branch probabilities are given, include those of unconditional branches.
+Unconditional branches are normally not interesting.
+
+@item -d
+@itemx --display-progress
+Display the progress on the standard output.
+
+@end table
+
+@command{gcov} should be run with the current directory the same as that
+when you invoked the compiler.  Otherwise it will not be able to locate
+the source files.  @command{gcov} produces files called
+@file{@var{mangledname}.gcov} in the current directory.  These contain
+the coverage information of the source file they correspond to.
+One @file{.gcov} file is produced for each source file containing code,
+which was compiled to produce the data files.  The @var{mangledname} part
+of the output file name is usually simply the source file name, but can
+be something more complicated if the @samp{-l} or @samp{-p} options are
+given.  Refer to those options for details.
+
+The @file{.gcov} files contain the @samp{:} separated fields along with
+program source code.  The format is
+
+@smallexample
+@var{execution_count}:@var{line_number}:@var{source line text}
+@end smallexample
+
+Additional block information may succeed each line, when requested by
+command line option.  The @var{execution_count} is @samp{-} for lines
+containing no code and @samp{#####} for lines which were never executed.
+Some lines of information at the start have @var{line_number} of zero.
+
+The preamble lines are of the form
+
+@smallexample
+-:0:@var{tag}:@var{value}
+@end smallexample
+
+The ordering and number of these preamble lines will be augmented as
+@command{gcov} development progresses --- do not rely on them remaining
+unchanged.  Use @var{tag} to locate a particular preamble line.
+
+The additional block information is of the form
+
+@smallexample
+@var{tag} @var{information}
+@end smallexample
+
+The @var{information} is human readable, but designed to be simple
+enough for machine parsing too.
+
+When printing percentages, 0% and 100% are only printed when the values
+are @emph{exactly} 0% and 100% respectively.  Other values which would
+conventionally be rounded to 0% or 100% are instead printed as the
+nearest non-boundary value.
+
+When using @command{gcov}, you must first compile your program with two
+special GCC options: @samp{-fprofile-arcs -ftest-coverage}.
+This tells the compiler to generate additional information needed by
+gcov (basically a flow graph of the program) and also includes
+additional code in the object files for generating the extra profiling
+information needed by gcov.  These additional files are placed in the
+directory where the object file is located.
+
+Running the program will cause profile output to be generated.  For each
+source file compiled with @option{-fprofile-arcs}, an accompanying
+@file{.gcda} file will be placed in the object file directory.
+
+Running @command{gcov} with your program's source file names as arguments
+will now produce a listing of the code along with frequency of execution
+for each line.  For example, if your program is called @file{tmp.c}, this
+is what you see when you use the basic @command{gcov} facility:
+
+@smallexample
+$ gcc -fprofile-arcs -ftest-coverage tmp.c
+$ a.out
+$ gcov tmp.c
+90.00% of 10 source lines executed in file tmp.c
+Creating tmp.c.gcov.
+@end smallexample
+
+The file @file{tmp.c.gcov} contains output from @command{gcov}.
+Here is a sample:
+
+@smallexample
+        -:    0:Source:tmp.c
+        -:    0:Graph:tmp.gcno
+        -:    0:Data:tmp.gcda
+        -:    0:Runs:1
+        -:    0:Programs:1
+        -:    1:#include <stdio.h>
+        -:    2:
+        -:    3:int main (void)
+        1:    4:@{
+        1:    5:  int i, total;
+        -:    6:
+        1:    7:  total = 0;
+        -:    8:
+       11:    9:  for (i = 0; i < 10; i++)
+       10:   10:    total += i;
+        -:   11:
+        1:   12:  if (total != 45)
+    #####:   13:    printf ("Failure\n");
+        -:   14:  else
+        1:   15:    printf ("Success\n");
+        1:   16:  return 0;
+        -:   17:@}
+@end smallexample
+
+When you use the @option{-a} option, you will get individual block
+counts, and the output looks like this:
+
+@smallexample
+        -:    0:Source:tmp.c
+        -:    0:Graph:tmp.gcno
+        -:    0:Data:tmp.gcda
+        -:    0:Runs:1
+        -:    0:Programs:1
+        -:    1:#include <stdio.h>
+        -:    2:
+        -:    3:int main (void)
+        1:    4:@{
+        1:    4-block  0
+        1:    5:  int i, total;
+        -:    6:
+        1:    7:  total = 0;
+        -:    8:
+       11:    9:  for (i = 0; i < 10; i++)
+       11:    9-block  0
+       10:   10:    total += i;
+       10:   10-block  0
+        -:   11:
+        1:   12:  if (total != 45)
+        1:   12-block  0
+    #####:   13:    printf ("Failure\n");
+    $$$$$:   13-block  0
+        -:   14:  else
+        1:   15:    printf ("Success\n");
+        1:   15-block  0
+        1:   16:  return 0;
+        1:   16-block  0
+        -:   17:@}
+@end smallexample
+
+In this mode, each basic block is only shown on one line -- the last
+line of the block.  A multi-line block will only contribute to the
+execution count of that last line, and other lines will not be shown
+to contain code, unless previous blocks end on those lines.
+The total execution count of a line is shown and subsequent lines show
+the execution counts for individual blocks that end on that line.  After each
+block, the branch and call counts of the block will be shown, if the
+@option{-b} option is given.
+
+Because of the way GCC instruments calls, a call count can be shown
+after a line with no individual blocks.
+As you can see, line 13 contains a basic block that was not executed.
+
+@need 450
+When you use the @option{-b} option, your output looks like this:
+
+@smallexample
+$ gcov -b tmp.c
+90.00% of 10 source lines executed in file tmp.c
+80.00% of 5 branches executed in file tmp.c
+80.00% of 5 branches taken at least once in file tmp.c
+50.00% of 2 calls executed in file tmp.c
+Creating tmp.c.gcov.
+@end smallexample
+
+Here is a sample of a resulting @file{tmp.c.gcov} file:
+
+@smallexample
+        -:    0:Source:tmp.c
+        -:    0:Graph:tmp.gcno
+        -:    0:Data:tmp.gcda
+        -:    0:Runs:1
+        -:    0:Programs:1
+        -:    1:#include <stdio.h>
+        -:    2:
+        -:    3:int main (void)
+function main called 1 returned 1 blocks executed 75%
+        1:    4:@{
+        1:    5:  int i, total;
+        -:    6:
+        1:    7:  total = 0;
+        -:    8:
+       11:    9:  for (i = 0; i < 10; i++)
+branch  0 taken 91% (fallthrough)
+branch  1 taken 9%
+       10:   10:    total += i;
+        -:   11:
+        1:   12:  if (total != 45)
+branch  0 taken 0% (fallthrough)
+branch  1 taken 100%
+    #####:   13:    printf ("Failure\n");
+call    0 never executed
+        -:   14:  else
+        1:   15:    printf ("Success\n");
+call    0 called 1 returned 100%
+        1:   16:  return 0;
+        -:   17:@}
+@end smallexample
+
+For each function, a line is printed showing how many times the function
+is called, how many times it returns and what percentage of the
+function's blocks were executed.
+
+For each basic block, a line is printed after the last line of the basic
+block describing the branch or call that ends the basic block.  There can
+be multiple branches and calls listed for a single source line if there
+are multiple basic blocks that end on that line.  In this case, the
+branches and calls are each given a number.  There is no simple way to map
+these branches and calls back to source constructs.  In general, though,
+the lowest numbered branch or call will correspond to the leftmost construct
+on the source line.
+
+For a branch, if it was executed at least once, then a percentage
+indicating the number of times the branch was taken divided by the
+number of times the branch was executed will be printed.  Otherwise, the
+message ``never executed'' is printed.
+
+For a call, if it was executed at least once, then a percentage
+indicating the number of times the call returned divided by the number
+of times the call was executed will be printed.  This will usually be
+100%, but may be less for functions that call @code{exit} or @code{longjmp},
+and thus may not return every time they are called.
+
+The execution counts are cumulative.  If the example program were
+executed again without removing the @file{.gcda} file, the count for the
+number of times each line in the source was executed would be added to
+the results of the previous run(s).  This is potentially useful in
+several ways.  For example, it could be used to accumulate data over a
+number of program runs as part of a test verification suite, or to
+provide more accurate long-term information over a large number of
+program runs.
+
+The data in the @file{.gcda} files is saved immediately before the program
+exits.  For each source file compiled with @option{-fprofile-arcs}, the
+profiling code first attempts to read in an existing @file{.gcda} file; if
+the file doesn't match the executable (differing number of basic block
+counts) it will ignore the contents of the file.  It then adds in the
+new execution counts and finally writes the data to the file.
+
+@node Gcov and Optimization
+@section Using @command{gcov} with GCC Optimization
+
+If you plan to use @command{gcov} to help optimize your code, you must
+first compile your program with two special GCC options:
+@samp{-fprofile-arcs -ftest-coverage}.  Aside from that, you can use any
+other GCC options; but if you want to prove that every single line
+in your program was executed, you should not compile with optimization
+at the same time.  On some machines the optimizer can eliminate some
+simple code lines by combining them with other lines.  For example, code
+like this:
+
+@smallexample
+if (a != b)
+  c = 1;
+else
+  c = 0;
+@end smallexample
+
+@noindent
+can be compiled into one instruction on some machines.  In this case,
+there is no way for @command{gcov} to calculate separate execution counts
+for each line because there isn't separate code for each line.  Hence
+the @command{gcov} output looks like this if you compiled the program with
+optimization:
+
+@smallexample
+      100:   12:if (a != b)
+      100:   13:  c = 1;
+      100:   14:else
+      100:   15:  c = 0;
+@end smallexample
+
+The output shows that this block of code, combined by optimization,
+executed 100 times.  In one sense this result is correct, because there
+was only one instruction representing all four of these lines.  However,
+the output does not indicate how many times the result was 0 and how
+many times the result was 1.
+
+Inlineable functions can create unexpected line counts.  Line counts are
+shown for the source code of the inlineable function, but what is shown
+depends on where the function is inlined, or if it is not inlined at all.
+
+If the function is not inlined, the compiler must emit an out of line
+copy of the function, in any object file that needs it.  If
+@file{fileA.o} and @file{fileB.o} both contain out of line bodies of a
+particular inlineable function, they will also both contain coverage
+counts for that function.  When @file{fileA.o} and @file{fileB.o} are
+linked together, the linker will, on many systems, select one of those
+out of line bodies for all calls to that function, and remove or ignore
+the other.  Unfortunately, it will not remove the coverage counters for
+the unused function body.  Hence when instrumented, all but one use of
+that function will show zero counts.
+
+If the function is inlined in several places, the block structure in
+each location might not be the same.  For instance, a condition might
+now be calculable at compile time in some instances.  Because the
+coverage of all the uses of the inline function will be shown for the
+same source lines, the line counts themselves might seem inconsistent.
+
+@c man end
+
+@node Gcov Data Files
+@section Brief description of @command{gcov} data files
+
+@command{gcov} uses two files for profiling.  The names of these files
+are derived from the original @emph{object} file by substituting the
+file suffix with either @file{.gcno}, or @file{.gcda}.  All of these files
+are placed in the same directory as the object file, and contain data
+stored in a platform-independent format.
+
+The @file{.gcno} file is generated when the source file is compiled with
+the GCC @option{-ftest-coverage} option.  It contains information to
+reconstruct the basic block graphs and assign source line numbers to
+blocks.
+
+The @file{.gcda} file is generated when a program containing object files
+built with the GCC @option{-fprofile-arcs} option is executed.  A
+separate @file{.gcda} file is created for each object file compiled with
+this option.  It contains arc transition counts, and some summary
+information.
+
+The full details of the file format is specified in @file{gcov-io.h},
+and functions provided in that header file should be used to access the
+coverage files.
+
+@node Cross-profiling
+@section Data file relocation to support cross-profiling
+
+Running the program will cause profile output to be generated.  For each 
+source file compiled with @option{-fprofile-arcs}, an accompanying @file{.gcda} 
+file will be placed in the object file directory. That implicitly requires 
+running the program on the same system as it was built or having the same 
+absolute directory structure on the target system. The program will try
+to create the needed directory structure, if it is not already present.
+
+To support cross-profiling, a program compiled with @option{-fprofile-arcs}
+can relocate the data files based on two environment variables: 
+
+@itemize @bullet
+@item
+GCOV_PREFIX contains the prefix to add to the absolute paths 
+in the object file. Prefix can be absolute, or relative.  The
+default is no prefix.
+
+@item
+GCOV_PREFIX_STRIP indicates the how many initial directory names to strip off
+the hardwired absolute paths. Default value is 0.
+
+@emph{Note:} If GCOV_PREFIX_STRIP is set without GCOV_PREFIX is undefined,
+ then a relative path is made out of the hardwired absolute paths.
+@end itemize
+
+For example, if the object file @file{/user/build/foo.o} was built with
+@option{-fprofile-arcs}, the final executable will try to create the data file
+@file{/user/build/foo.gcda} when running on the target system.  This will
+fail if the corresponding directory does not exist and it is unable to create
+it.  This can be overcome by, for example, setting the environment as
+@samp{GCOV_PREFIX=/target/run} and @samp{GCOV_PREFIX_STRIP=1}.  Such a
+setting will name the data file @file{/target/run/build/foo.gcda}.
+
+You must move the data files to the expected directory tree in order to
+use them for profile directed optimizations (@option{--use-profile}), or to
+use the @command{gcov} tool.
diff --git a/gcc/doc/generic.texi b/gcc/doc/generic.texi
new file mode 100644
index 000000000..79af22ff3
--- /dev/null
+++ b/gcc/doc/generic.texi
@@ -0,0 +1,3345 @@
+@c Copyright (c) 2004, 2005, 2007, 2008, 2010 Free Software Foundation, Inc.
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@c ---------------------------------------------------------------------
+@c GENERIC
+@c ---------------------------------------------------------------------
+
+@node GENERIC
+@chapter GENERIC
+@cindex GENERIC
+
+The purpose of GENERIC is simply to provide a
+language-independent way of representing an entire function in
+trees.  To this end, it was necessary to add a few new tree codes
+to the back end, but most everything was already there.  If you
+can express it with the codes in @code{gcc/tree.def}, it's
+GENERIC@.
+
+Early on, there was a great deal of debate about how to think
+about statements in a tree IL@.  In GENERIC, a statement is
+defined as any expression whose value, if any, is ignored.  A
+statement will always have @code{TREE_SIDE_EFFECTS} set (or it
+will be discarded), but a non-statement expression may also have
+side effects.  A @code{CALL_EXPR}, for instance.
+
+It would be possible for some local optimizations to work on the
+GENERIC form of a function; indeed, the adapted tree inliner
+works fine on GENERIC, but the current compiler performs inlining
+after lowering to GIMPLE (a restricted form described in the next
+section). Indeed, currently the frontends perform this lowering
+before handing off to @code{tree_rest_of_compilation}, but this
+seems inelegant.
+
+@menu
+* Deficiencies::                Topics net yet covered in this document.
+* Tree overview::               All about @code{tree}s.
+* Types::                       Fundamental and aggregate types.
+* Declarations::                Type declarations and variables.
+* Attributes::                  Declaration and type attributes.
+* Expressions: Expression trees.            Operating on data.
+* Statements::                  Control flow and related trees.
+* Functions::           	Function bodies, linkage, and other aspects.
+* Language-dependent trees::    Topics and trees specific to language front ends.
+* C and C++ Trees::     	Trees specific to C and C++.
+* Java Trees:: 	                Trees specific to Java.
+@end menu
+
+@c ---------------------------------------------------------------------
+@c Deficiencies
+@c ---------------------------------------------------------------------
+
+@node Deficiencies
+@section Deficiencies
+
+There are many places in which this document is incomplet and incorrekt.
+It is, as of yet, only @emph{preliminary} documentation.
+
+@c ---------------------------------------------------------------------
+@c Overview
+@c ---------------------------------------------------------------------
+
+@node Tree overview
+@section Overview
+@cindex tree
+@findex TREE_CODE
+
+The central data structure used by the internal representation is the
+@code{tree}.  These nodes, while all of the C type @code{tree}, are of
+many varieties.  A @code{tree} is a pointer type, but the object to
+which it points may be of a variety of types.  From this point forward,
+we will refer to trees in ordinary type, rather than in @code{this
+font}, except when talking about the actual C type @code{tree}.
+
+You can tell what kind of node a particular tree is by using the
+@code{TREE_CODE} macro.  Many, many macros take trees as input and
+return trees as output.  However, most macros require a certain kind of
+tree node as input.  In other words, there is a type-system for trees,
+but it is not reflected in the C type-system.
+
+For safety, it is useful to configure GCC with @option{--enable-checking}.
+Although this results in a significant performance penalty (since all
+tree types are checked at run-time), and is therefore inappropriate in a
+release version, it is extremely helpful during the development process.
+
+Many macros behave as predicates.  Many, although not all, of these
+predicates end in @samp{_P}.  Do not rely on the result type of these
+macros being of any particular type.  You may, however, rely on the fact
+that the type can be compared to @code{0}, so that statements like
+@smallexample
+if (TEST_P (t) && !TEST_P (y))
+  x = 1;
+@end smallexample
+@noindent
+and
+@smallexample
+int i = (TEST_P (t) != 0);
+@end smallexample
+@noindent
+are legal.  Macros that return @code{int} values now may be changed to
+return @code{tree} values, or other pointers in the future.  Even those
+that continue to return @code{int} may return multiple nonzero codes
+where previously they returned only zero and one.  Therefore, you should
+not write code like
+@smallexample
+if (TEST_P (t) == 1)
+@end smallexample
+@noindent
+as this code is not guaranteed to work correctly in the future.
+
+You should not take the address of values returned by the macros or
+functions described here.  In particular, no guarantee is given that the
+values are lvalues.
+
+In general, the names of macros are all in uppercase, while the names of
+functions are entirely in lowercase.  There are rare exceptions to this
+rule.  You should assume that any macro or function whose name is made
+up entirely of uppercase letters may evaluate its arguments more than
+once.  You may assume that a macro or function whose name is made up
+entirely of lowercase letters will evaluate its arguments only once.
+
+The @code{error_mark_node} is a special tree.  Its tree code is
+@code{ERROR_MARK}, but since there is only ever one node with that code,
+the usual practice is to compare the tree against
+@code{error_mark_node}.  (This test is just a test for pointer
+equality.)  If an error has occurred during front-end processing the
+flag @code{errorcount} will be set.  If the front end has encountered
+code it cannot handle, it will issue a message to the user and set
+@code{sorrycount}.  When these flags are set, any macro or function
+which normally returns a tree of a particular kind may instead return
+the @code{error_mark_node}.  Thus, if you intend to do any processing of
+erroneous code, you must be prepared to deal with the
+@code{error_mark_node}.
+
+Occasionally, a particular tree slot (like an operand to an expression,
+or a particular field in a declaration) will be referred to as
+``reserved for the back end''.  These slots are used to store RTL when
+the tree is converted to RTL for use by the GCC back end.  However, if
+that process is not taking place (e.g., if the front end is being hooked
+up to an intelligent editor), then those slots may be used by the
+back end presently in use.
+
+If you encounter situations that do not match this documentation, such
+as tree nodes of types not mentioned here, or macros documented to
+return entities of a particular kind that instead return entities of
+some different kind, you have found a bug, either in the front end or in
+the documentation.  Please report these bugs as you would any other
+bug.
+
+@menu
+* Macros and Functions::Macros and functions that can be used with all trees.
+* Identifiers::         The names of things.
+* Containers::          Lists and vectors.
+@end menu
+
+@c ---------------------------------------------------------------------
+@c Trees
+@c ---------------------------------------------------------------------
+
+@node Macros and Functions
+@subsection Trees
+@cindex tree
+@findex TREE_CHAIN
+@findex TREE_TYPE
+
+All GENERIC trees have two fields in common.  First, @code{TREE_CHAIN}
+is a pointer that can be used as a singly-linked list to other trees.
+The other is @code{TREE_TYPE}.  Many trees store the type of an
+expression or declaration in this field.
+
+These are some other functions for handling trees:
+
+@ftable @code
+
+@item tree_size
+Return the number of bytes a tree takes.
+
+@item build0
+@itemx build1
+@itemx build2
+@itemx build3
+@itemx build4
+@itemx build5
+@itemx build6
+
+These functions build a tree and supply values to put in each
+parameter.  The basic signature is @samp{@w{code, type, [operands]}}.
+@code{code} is the @code{TREE_CODE}, and @code{type} is a tree
+representing the @code{TREE_TYPE}.  These are followed by the
+operands, each of which is also a tree.
+
+@end ftable
+
+
+@c ---------------------------------------------------------------------
+@c Identifiers
+@c ---------------------------------------------------------------------
+
+@node Identifiers
+@subsection Identifiers
+@cindex identifier
+@cindex name
+@tindex IDENTIFIER_NODE
+
+An @code{IDENTIFIER_NODE} represents a slightly more general concept
+that the standard C or C++ concept of identifier.  In particular, an
+@code{IDENTIFIER_NODE} may contain a @samp{$}, or other extraordinary
+characters.
+
+There are never two distinct @code{IDENTIFIER_NODE}s representing the
+same identifier.  Therefore, you may use pointer equality to compare
+@code{IDENTIFIER_NODE}s, rather than using a routine like
+@code{strcmp}.  Use @code{get_identifier} to obtain the unique
+@code{IDENTIFIER_NODE} for a supplied string.
+
+You can use the following macros to access identifiers:
+@ftable @code
+@item IDENTIFIER_POINTER
+The string represented by the identifier, represented as a
+@code{char*}.  This string is always @code{NUL}-terminated, and contains
+no embedded @code{NUL} characters.
+
+@item IDENTIFIER_LENGTH
+The length of the string returned by @code{IDENTIFIER_POINTER}, not
+including the trailing @code{NUL}.  This value of
+@code{IDENTIFIER_LENGTH (x)} is always the same as @code{strlen
+(IDENTIFIER_POINTER (x))}.
+
+@item IDENTIFIER_OPNAME_P
+This predicate holds if the identifier represents the name of an
+overloaded operator.  In this case, you should not depend on the
+contents of either the @code{IDENTIFIER_POINTER} or the
+@code{IDENTIFIER_LENGTH}.
+
+@item IDENTIFIER_TYPENAME_P
+This predicate holds if the identifier represents the name of a
+user-defined conversion operator.  In this case, the @code{TREE_TYPE} of
+the @code{IDENTIFIER_NODE} holds the type to which the conversion
+operator converts.
+
+@end ftable
+
+@c ---------------------------------------------------------------------
+@c Containers
+@c ---------------------------------------------------------------------
+
+@node Containers
+@subsection Containers
+@cindex container
+@cindex list
+@cindex vector
+@tindex TREE_LIST
+@tindex TREE_VEC
+@findex TREE_PURPOSE
+@findex TREE_VALUE
+@findex TREE_VEC_LENGTH
+@findex TREE_VEC_ELT
+
+Two common container data structures can be represented directly with
+tree nodes.  A @code{TREE_LIST} is a singly linked list containing two
+trees per node.  These are the @code{TREE_PURPOSE} and @code{TREE_VALUE}
+of each node.  (Often, the @code{TREE_PURPOSE} contains some kind of
+tag, or additional information, while the @code{TREE_VALUE} contains the
+majority of the payload.  In other cases, the @code{TREE_PURPOSE} is
+simply @code{NULL_TREE}, while in still others both the
+@code{TREE_PURPOSE} and @code{TREE_VALUE} are of equal stature.)  Given
+one @code{TREE_LIST} node, the next node is found by following the
+@code{TREE_CHAIN}.  If the @code{TREE_CHAIN} is @code{NULL_TREE}, then
+you have reached the end of the list.
+
+A @code{TREE_VEC} is a simple vector.  The @code{TREE_VEC_LENGTH} is an
+integer (not a tree) giving the number of nodes in the vector.  The
+nodes themselves are accessed using the @code{TREE_VEC_ELT} macro, which
+takes two arguments.  The first is the @code{TREE_VEC} in question; the
+second is an integer indicating which element in the vector is desired.
+The elements are indexed from zero.
+
+@c ---------------------------------------------------------------------
+@c Types
+@c ---------------------------------------------------------------------
+
+@node Types
+@section Types
+@cindex type
+@cindex pointer
+@cindex reference
+@cindex fundamental type
+@cindex array
+@tindex VOID_TYPE
+@tindex INTEGER_TYPE
+@tindex TYPE_MIN_VALUE
+@tindex TYPE_MAX_VALUE
+@tindex REAL_TYPE
+@tindex FIXED_POINT_TYPE
+@tindex COMPLEX_TYPE
+@tindex ENUMERAL_TYPE
+@tindex BOOLEAN_TYPE
+@tindex POINTER_TYPE
+@tindex REFERENCE_TYPE
+@tindex FUNCTION_TYPE
+@tindex METHOD_TYPE
+@tindex ARRAY_TYPE
+@tindex RECORD_TYPE
+@tindex UNION_TYPE
+@tindex UNKNOWN_TYPE
+@tindex OFFSET_TYPE
+@findex TYPE_UNQUALIFIED
+@findex TYPE_QUAL_CONST
+@findex TYPE_QUAL_VOLATILE
+@findex TYPE_QUAL_RESTRICT
+@findex TYPE_MAIN_VARIANT
+@cindex qualified type
+@findex TYPE_SIZE
+@findex TYPE_ALIGN
+@findex TYPE_PRECISION
+@findex TYPE_ARG_TYPES
+@findex TYPE_METHOD_BASETYPE
+@findex TYPE_OFFSET_BASETYPE
+@findex TREE_TYPE
+@findex TYPE_CONTEXT
+@findex TYPE_NAME
+@findex TYPENAME_TYPE_FULLNAME
+@findex TYPE_FIELDS
+@findex TYPE_CANONICAL
+@findex TYPE_STRUCTURAL_EQUALITY_P
+@findex SET_TYPE_STRUCTURAL_EQUALITY
+
+All types have corresponding tree nodes.  However, you should not assume
+that there is exactly one tree node corresponding to each type.  There
+are often multiple nodes corresponding to the same type.
+
+For the most part, different kinds of types have different tree codes.
+(For example, pointer types use a @code{POINTER_TYPE} code while arrays
+use an @code{ARRAY_TYPE} code.)  However, pointers to member functions
+use the @code{RECORD_TYPE} code.  Therefore, when writing a
+@code{switch} statement that depends on the code associated with a
+particular type, you should take care to handle pointers to member
+functions under the @code{RECORD_TYPE} case label.
+
+The following functions and macros deal with cv-qualification of types:
+@ftable @code
+@item TYPE_MAIN_VARIANT
+This macro returns the unqualified version of a type.  It may be applied
+to an unqualified type, but it is not always the identity function in
+that case.
+@end ftable
+
+A few other macros and functions are usable with all types:
+@ftable @code
+@item TYPE_SIZE
+The number of bits required to represent the type, represented as an
+@code{INTEGER_CST}.  For an incomplete type, @code{TYPE_SIZE} will be
+@code{NULL_TREE}.
+
+@item TYPE_ALIGN
+The alignment of the type, in bits, represented as an @code{int}.
+
+@item TYPE_NAME
+This macro returns a declaration (in the form of a @code{TYPE_DECL}) for
+the type.  (Note this macro does @emph{not} return an
+@code{IDENTIFIER_NODE}, as you might expect, given its name!)  You can
+look at the @code{DECL_NAME} of the @code{TYPE_DECL} to obtain the
+actual name of the type.  The @code{TYPE_NAME} will be @code{NULL_TREE}
+for a type that is not a built-in type, the result of a typedef, or a
+named class type.
+
+@item TYPE_CANONICAL
+This macro returns the ``canonical'' type for the given type
+node. Canonical types are used to improve performance in the C++ and
+Objective-C++ front ends by allowing efficient comparison between two
+type nodes in @code{same_type_p}: if the @code{TYPE_CANONICAL} values
+of the types are equal, the types are equivalent; otherwise, the types
+are not equivalent. The notion of equivalence for canonical types is
+the same as the notion of type equivalence in the language itself. For
+instance,
+
+When @code{TYPE_CANONICAL} is @code{NULL_TREE}, there is no canonical
+type for the given type node. In this case, comparison between this
+type and any other type requires the compiler to perform a deep,
+``structural'' comparison to see if the two type nodes have the same
+form and properties.
+
+The canonical type for a node is always the most fundamental type in
+the equivalence class of types. For instance, @code{int} is its own
+canonical type. A typedef @code{I} of @code{int} will have @code{int}
+as its canonical type. Similarly, @code{I*}@ and a typedef @code{IP}@
+(defined to @code{I*}) will has @code{int*} as their canonical
+type. When building a new type node, be sure to set
+@code{TYPE_CANONICAL} to the appropriate canonical type. If the new
+type is a compound type (built from other types), and any of those
+other types require structural equality, use
+@code{SET_TYPE_STRUCTURAL_EQUALITY} to ensure that the new type also
+requires structural equality. Finally, if for some reason you cannot
+guarantee that @code{TYPE_CANONICAL} will point to the canonical type,
+use @code{SET_TYPE_STRUCTURAL_EQUALITY} to make sure that the new
+type--and any type constructed based on it--requires structural
+equality. If you suspect that the canonical type system is
+miscomparing types, pass @code{--param verify-canonical-types=1} to
+the compiler or configure with @code{--enable-checking} to force the
+compiler to verify its canonical-type comparisons against the
+structural comparisons; the compiler will then print any warnings if
+the canonical types miscompare.
+
+@item TYPE_STRUCTURAL_EQUALITY_P
+This predicate holds when the node requires structural equality
+checks, e.g., when @code{TYPE_CANONICAL} is @code{NULL_TREE}.
+
+@item SET_TYPE_STRUCTURAL_EQUALITY
+This macro states that the type node it is given requires structural
+equality checks, e.g., it sets @code{TYPE_CANONICAL} to
+@code{NULL_TREE}.
+
+@item same_type_p
+This predicate takes two types as input, and holds if they are the same
+type.  For example, if one type is a @code{typedef} for the other, or
+both are @code{typedef}s for the same type.  This predicate also holds if
+the two trees given as input are simply copies of one another; i.e.,
+there is no difference between them at the source level, but, for
+whatever reason, a duplicate has been made in the representation.  You
+should never use @code{==} (pointer equality) to compare types; always
+use @code{same_type_p} instead.
+@end ftable
+
+Detailed below are the various kinds of types, and the macros that can
+be used to access them.  Although other kinds of types are used
+elsewhere in G++, the types described here are the only ones that you
+will encounter while examining the intermediate representation.
+
+@table @code
+@item VOID_TYPE
+Used to represent the @code{void} type.
+
+@item INTEGER_TYPE
+Used to represent the various integral types, including @code{char},
+@code{short}, @code{int}, @code{long}, and @code{long long}.  This code
+is not used for enumeration types, nor for the @code{bool} type.
+The @code{TYPE_PRECISION} is the number of bits used in
+the representation, represented as an @code{unsigned int}.  (Note that
+in the general case this is not the same value as @code{TYPE_SIZE};
+suppose that there were a 24-bit integer type, but that alignment
+requirements for the ABI required 32-bit alignment.  Then,
+@code{TYPE_SIZE} would be an @code{INTEGER_CST} for 32, while
+@code{TYPE_PRECISION} would be 24.)  The integer type is unsigned if
+@code{TYPE_UNSIGNED} holds; otherwise, it is signed.
+
+The @code{TYPE_MIN_VALUE} is an @code{INTEGER_CST} for the smallest
+integer that may be represented by this type.  Similarly, the
+@code{TYPE_MAX_VALUE} is an @code{INTEGER_CST} for the largest integer
+that may be represented by this type.
+
+@item REAL_TYPE
+Used to represent the @code{float}, @code{double}, and @code{long
+double} types.  The number of bits in the floating-point representation
+is given by @code{TYPE_PRECISION}, as in the @code{INTEGER_TYPE} case.
+
+@item FIXED_POINT_TYPE
+Used to represent the @code{short _Fract}, @code{_Fract}, @code{long
+_Fract}, @code{long long _Fract}, @code{short _Accum}, @code{_Accum},
+@code{long _Accum}, and @code{long long _Accum} types.  The number of bits
+in the fixed-point representation is given by @code{TYPE_PRECISION},
+as in the @code{INTEGER_TYPE} case.  There may be padding bits, fractional
+bits and integral bits.  The number of fractional bits is given by
+@code{TYPE_FBIT}, and the number of integral bits is given by @code{TYPE_IBIT}.
+The fixed-point type is unsigned if @code{TYPE_UNSIGNED} holds; otherwise,
+it is signed.
+The fixed-point type is saturating if @code{TYPE_SATURATING} holds; otherwise,
+it is not saturating.
+
+@item COMPLEX_TYPE
+Used to represent GCC built-in @code{__complex__} data types.  The
+@code{TREE_TYPE} is the type of the real and imaginary parts.
+
+@item ENUMERAL_TYPE
+Used to represent an enumeration type.  The @code{TYPE_PRECISION} gives
+(as an @code{int}), the number of bits used to represent the type.  If
+there are no negative enumeration constants, @code{TYPE_UNSIGNED} will
+hold.  The minimum and maximum enumeration constants may be obtained
+with @code{TYPE_MIN_VALUE} and @code{TYPE_MAX_VALUE}, respectively; each
+of these macros returns an @code{INTEGER_CST}.
+
+The actual enumeration constants themselves may be obtained by looking
+at the @code{TYPE_VALUES}.  This macro will return a @code{TREE_LIST},
+containing the constants.  The @code{TREE_PURPOSE} of each node will be
+an @code{IDENTIFIER_NODE} giving the name of the constant; the
+@code{TREE_VALUE} will be an @code{INTEGER_CST} giving the value
+assigned to that constant.  These constants will appear in the order in
+which they were declared.  The @code{TREE_TYPE} of each of these
+constants will be the type of enumeration type itself.
+
+@item BOOLEAN_TYPE
+Used to represent the @code{bool} type.
+
+@item POINTER_TYPE
+Used to represent pointer types, and pointer to data member types.  The
+@code{TREE_TYPE} gives the type to which this type points.
+
+@item REFERENCE_TYPE
+Used to represent reference types.  The @code{TREE_TYPE} gives the type
+to which this type refers.
+
+@item FUNCTION_TYPE
+Used to represent the type of non-member functions and of static member
+functions.  The @code{TREE_TYPE} gives the return type of the function.
+The @code{TYPE_ARG_TYPES} are a @code{TREE_LIST} of the argument types.
+The @code{TREE_VALUE} of each node in this list is the type of the
+corresponding argument; the @code{TREE_PURPOSE} is an expression for the
+default argument value, if any.  If the last node in the list is
+@code{void_list_node} (a @code{TREE_LIST} node whose @code{TREE_VALUE}
+is the @code{void_type_node}), then functions of this type do not take
+variable arguments.  Otherwise, they do take a variable number of
+arguments.
+
+Note that in C (but not in C++) a function declared like @code{void f()}
+is an unprototyped function taking a variable number of arguments; the
+@code{TYPE_ARG_TYPES} of such a function will be @code{NULL}.
+
+@item METHOD_TYPE
+Used to represent the type of a non-static member function.  Like a
+@code{FUNCTION_TYPE}, the return type is given by the @code{TREE_TYPE}.
+The type of @code{*this}, i.e., the class of which functions of this
+type are a member, is given by the @code{TYPE_METHOD_BASETYPE}.  The
+@code{TYPE_ARG_TYPES} is the parameter list, as for a
+@code{FUNCTION_TYPE}, and includes the @code{this} argument.
+
+@item ARRAY_TYPE
+Used to represent array types.  The @code{TREE_TYPE} gives the type of
+the elements in the array.  If the array-bound is present in the type,
+the @code{TYPE_DOMAIN} is an @code{INTEGER_TYPE} whose
+@code{TYPE_MIN_VALUE} and @code{TYPE_MAX_VALUE} will be the lower and
+upper bounds of the array, respectively.  The @code{TYPE_MIN_VALUE} will
+always be an @code{INTEGER_CST} for zero, while the
+@code{TYPE_MAX_VALUE} will be one less than the number of elements in
+the array, i.e., the highest value which may be used to index an element
+in the array.
+
+@item RECORD_TYPE
+Used to represent @code{struct} and @code{class} types, as well as
+pointers to member functions and similar constructs in other languages.
+@code{TYPE_FIELDS} contains the items contained in this type, each of
+which can be a @code{FIELD_DECL}, @code{VAR_DECL}, @code{CONST_DECL}, or
+@code{TYPE_DECL}.  You may not make any assumptions about the ordering
+of the fields in the type or whether one or more of them overlap.
+
+@item UNION_TYPE
+Used to represent @code{union} types.  Similar to @code{RECORD_TYPE}
+except that all @code{FIELD_DECL} nodes in @code{TYPE_FIELD} start at
+bit position zero.
+
+@item QUAL_UNION_TYPE
+Used to represent part of a variant record in Ada.  Similar to
+@code{UNION_TYPE} except that each @code{FIELD_DECL} has a
+@code{DECL_QUALIFIER} field, which contains a boolean expression that
+indicates whether the field is present in the object.  The type will only
+have one field, so each field's @code{DECL_QUALIFIER} is only evaluated
+if none of the expressions in the previous fields in @code{TYPE_FIELDS}
+are nonzero.  Normally these expressions will reference a field in the
+outer object using a @code{PLACEHOLDER_EXPR}.
+
+@item LANG_TYPE
+This node is used to represent a language-specific type.  The front
+end must handle it.
+
+@item OFFSET_TYPE
+This node is used to represent a pointer-to-data member.  For a data
+member @code{X::m} the @code{TYPE_OFFSET_BASETYPE} is @code{X} and the
+@code{TREE_TYPE} is the type of @code{m}.
+
+@end table
+
+There are variables whose values represent some of the basic types.
+These include:
+@table @code
+@item void_type_node
+A node for @code{void}.
+
+@item integer_type_node
+A node for @code{int}.
+
+@item unsigned_type_node.
+A node for @code{unsigned int}.
+
+@item char_type_node.
+A node for @code{char}.
+@end table
+@noindent
+It may sometimes be useful to compare one of these variables with a type
+in hand, using @code{same_type_p}.
+
+@c ---------------------------------------------------------------------
+@c Declarations
+@c ---------------------------------------------------------------------
+
+@node Declarations
+@section Declarations
+@cindex declaration
+@cindex variable
+@cindex type declaration
+@tindex LABEL_DECL
+@tindex CONST_DECL
+@tindex TYPE_DECL
+@tindex VAR_DECL
+@tindex PARM_DECL
+@tindex DEBUG_EXPR_DECL
+@tindex FIELD_DECL
+@tindex NAMESPACE_DECL
+@tindex RESULT_DECL
+@tindex TEMPLATE_DECL
+@tindex THUNK_DECL
+@findex THUNK_DELTA
+@findex DECL_INITIAL
+@findex DECL_SIZE
+@findex DECL_ALIGN
+@findex DECL_EXTERNAL
+
+This section covers the various kinds of declarations that appear in the
+internal representation, except for declarations of functions
+(represented by @code{FUNCTION_DECL} nodes), which are described in
+@ref{Functions}.
+
+@menu
+* Working with declarations::  Macros and functions that work on
+declarations.
+* Internal structure:: How declaration nodes are represented. 
+@end menu
+
+@node Working with declarations
+@subsection Working with declarations
+
+Some macros can be used with any kind of declaration.  These include:
+@ftable @code
+@item DECL_NAME
+This macro returns an @code{IDENTIFIER_NODE} giving the name of the
+entity.
+
+@item TREE_TYPE
+This macro returns the type of the entity declared.
+
+@item EXPR_FILENAME
+This macro returns the name of the file in which the entity was
+declared, as a @code{char*}.  For an entity declared implicitly by the
+compiler (like @code{__builtin_memcpy}), this will be the string
+@code{"<internal>"}.
+
+@item EXPR_LINENO
+This macro returns the line number at which the entity was declared, as
+an @code{int}.
+
+@item DECL_ARTIFICIAL
+This predicate holds if the declaration was implicitly generated by the
+compiler.  For example, this predicate will hold of an implicitly
+declared member function, or of the @code{TYPE_DECL} implicitly
+generated for a class type.  Recall that in C++ code like:
+@smallexample
+struct S @{@};
+@end smallexample
+@noindent
+is roughly equivalent to C code like:
+@smallexample
+struct S @{@};
+typedef struct S S;
+@end smallexample
+The implicitly generated @code{typedef} declaration is represented by a
+@code{TYPE_DECL} for which @code{DECL_ARTIFICIAL} holds.
+
+@end ftable
+
+The various kinds of declarations include:
+@table @code
+@item LABEL_DECL
+These nodes are used to represent labels in function bodies.  For more
+information, see @ref{Functions}.  These nodes only appear in block
+scopes.
+
+@item CONST_DECL
+These nodes are used to represent enumeration constants.  The value of
+the constant is given by @code{DECL_INITIAL} which will be an
+@code{INTEGER_CST} with the same type as the @code{TREE_TYPE} of the
+@code{CONST_DECL}, i.e., an @code{ENUMERAL_TYPE}.
+
+@item RESULT_DECL
+These nodes represent the value returned by a function.  When a value is
+assigned to a @code{RESULT_DECL}, that indicates that the value should
+be returned, via bitwise copy, by the function.  You can use
+@code{DECL_SIZE} and @code{DECL_ALIGN} on a @code{RESULT_DECL}, just as
+with a @code{VAR_DECL}.
+
+@item TYPE_DECL
+These nodes represent @code{typedef} declarations.  The @code{TREE_TYPE}
+is the type declared to have the name given by @code{DECL_NAME}.  In
+some cases, there is no associated name.
+
+@item VAR_DECL
+These nodes represent variables with namespace or block scope, as well
+as static data members.  The @code{DECL_SIZE} and @code{DECL_ALIGN} are
+analogous to @code{TYPE_SIZE} and @code{TYPE_ALIGN}.  For a declaration,
+you should always use the @code{DECL_SIZE} and @code{DECL_ALIGN} rather
+than the @code{TYPE_SIZE} and @code{TYPE_ALIGN} given by the
+@code{TREE_TYPE}, since special attributes may have been applied to the
+variable to give it a particular size and alignment.  You may use the
+predicates @code{DECL_THIS_STATIC} or @code{DECL_THIS_EXTERN} to test
+whether the storage class specifiers @code{static} or @code{extern} were
+used to declare a variable.
+
+If this variable is initialized (but does not require a constructor),
+the @code{DECL_INITIAL} will be an expression for the initializer.  The
+initializer should be evaluated, and a bitwise copy into the variable
+performed.  If the @code{DECL_INITIAL} is the @code{error_mark_node},
+there is an initializer, but it is given by an explicit statement later
+in the code; no bitwise copy is required.
+
+GCC provides an extension that allows either automatic variables, or
+global variables, to be placed in particular registers.  This extension
+is being used for a particular @code{VAR_DECL} if @code{DECL_REGISTER}
+holds for the @code{VAR_DECL}, and if @code{DECL_ASSEMBLER_NAME} is not
+equal to @code{DECL_NAME}.  In that case, @code{DECL_ASSEMBLER_NAME} is
+the name of the register into which the variable will be placed.
+
+@item PARM_DECL
+Used to represent a parameter to a function.  Treat these nodes
+similarly to @code{VAR_DECL} nodes.  These nodes only appear in the
+@code{DECL_ARGUMENTS} for a @code{FUNCTION_DECL}.
+
+The @code{DECL_ARG_TYPE} for a @code{PARM_DECL} is the type that will
+actually be used when a value is passed to this function.  It may be a
+wider type than the @code{TREE_TYPE} of the parameter; for example, the
+ordinary type might be @code{short} while the @code{DECL_ARG_TYPE} is
+@code{int}.
+
+@item DEBUG_EXPR_DECL
+Used to represent an anonymous debug-information temporary created to
+hold an expression as it is optimized away, so that its value can be
+referenced in debug bind statements.
+
+@item FIELD_DECL
+These nodes represent non-static data members.  The @code{DECL_SIZE} and
+@code{DECL_ALIGN} behave as for @code{VAR_DECL} nodes.  
+The position of the field within the parent record is specified by a 
+combination of three attributes.  @code{DECL_FIELD_OFFSET} is the position,
+counting in bytes, of the @code{DECL_OFFSET_ALIGN}-bit sized word containing
+the bit of the field closest to the beginning of the structure.  
+@code{DECL_FIELD_BIT_OFFSET} is the bit offset of the first bit of the field
+within this word; this may be nonzero even for fields that are not bit-fields,
+since @code{DECL_OFFSET_ALIGN} may be greater than the natural alignment
+of the field's type.
+
+If @code{DECL_C_BIT_FIELD} holds, this field is a bit-field.  In a bit-field,
+@code{DECL_BIT_FIELD_TYPE} also contains the type that was originally
+specified for it, while DECL_TYPE may be a modified type with lesser precision,
+according to the size of the bit field.
+
+@item NAMESPACE_DECL
+Namespaces provide a name hierarchy for other declarations.  They
+appear in the @code{DECL_CONTEXT} of other @code{_DECL} nodes.
+
+@end table
+
+@node Internal structure
+@subsection Internal structure
+
+@code{DECL} nodes are represented internally as a hierarchy of
+structures.
+
+@menu
+* Current structure hierarchy::  The current DECL node structure
+hierarchy.
+* Adding new DECL node types:: How to add a new DECL node to a
+frontend.
+@end menu
+
+@node Current structure hierarchy
+@subsubsection Current structure hierarchy
+
+@table @code
+
+@item struct tree_decl_minimal
+This is the minimal structure to inherit from in order for common
+@code{DECL} macros to work.  The fields it contains are a unique ID,
+source location, context, and name.
+
+@item struct tree_decl_common
+This structure inherits from @code{struct tree_decl_minimal}.  It
+contains fields that most @code{DECL} nodes need, such as a field to
+store alignment, machine mode, size, and attributes.
+
+@item struct tree_field_decl
+This structure inherits from @code{struct tree_decl_common}.  It is
+used to represent @code{FIELD_DECL}.
+
+@item struct tree_label_decl
+This structure inherits from @code{struct tree_decl_common}.  It is
+used to represent @code{LABEL_DECL}.
+
+@item struct tree_translation_unit_decl
+This structure inherits from @code{struct tree_decl_common}.  It is
+used to represent @code{TRANSLATION_UNIT_DECL}.
+
+@item struct tree_decl_with_rtl
+This structure inherits from @code{struct tree_decl_common}.  It
+contains a field to store the low-level RTL associated with a
+@code{DECL} node.
+
+@item struct tree_result_decl
+This structure inherits from @code{struct tree_decl_with_rtl}.  It is
+used to represent @code{RESULT_DECL}.
+
+@item struct tree_const_decl
+This structure inherits from @code{struct tree_decl_with_rtl}.  It is
+used to represent @code{CONST_DECL}.
+
+@item struct tree_parm_decl
+This structure inherits from @code{struct tree_decl_with_rtl}.  It is
+used to represent @code{PARM_DECL}.  
+
+@item struct tree_decl_with_vis
+This structure inherits from @code{struct tree_decl_with_rtl}.  It
+contains fields necessary to store visibility information, as well as
+a section name and assembler name.
+
+@item struct tree_var_decl
+This structure inherits from @code{struct tree_decl_with_vis}.  It is
+used to represent @code{VAR_DECL}.  
+
+@item struct tree_function_decl
+This structure inherits from @code{struct tree_decl_with_vis}.  It is
+used to represent @code{FUNCTION_DECL}.  
+
+@end table
+@node Adding new DECL node types
+@subsubsection Adding new DECL node types
+
+Adding a new @code{DECL} tree consists of the following steps
+
+@table @asis
+
+@item Add a new tree code for the @code{DECL} node
+For language specific @code{DECL} nodes, there is a @file{.def} file
+in each frontend directory where the tree code should be added.
+For @code{DECL} nodes that are part of the middle-end, the code should
+be added to @file{tree.def}.
+
+@item Create a new structure type for the @code{DECL} node
+These structures should inherit from one of the existing structures in
+the language hierarchy by using that structure as the first member.
+
+@smallexample
+struct tree_foo_decl
+@{
+   struct tree_decl_with_vis common;
+@}
+@end smallexample
+
+Would create a structure name @code{tree_foo_decl} that inherits from
+@code{struct tree_decl_with_vis}.
+
+For language specific @code{DECL} nodes, this new structure type
+should go in the appropriate @file{.h} file.
+For @code{DECL} nodes that are part of the middle-end, the structure
+type should go in @file{tree.h}.
+
+@item Add a member to the tree structure enumerator for the node
+For garbage collection and dynamic checking purposes, each @code{DECL}
+node structure type is required to have a unique enumerator value
+specified with it.
+For language specific @code{DECL} nodes, this new enumerator value
+should go in the appropriate @file{.def} file.
+For @code{DECL} nodes that are part of the middle-end, the enumerator
+values are specified in @file{treestruct.def}.
+
+@item Update @code{union tree_node}
+In order to make your new structure type usable, it must be added to
+@code{union tree_node}.
+For language specific @code{DECL} nodes, a new entry should be added
+to the appropriate @file{.h} file of the form
+@smallexample
+  struct tree_foo_decl GTY ((tag ("TS_VAR_DECL"))) foo_decl;
+@end smallexample
+For @code{DECL} nodes that are part of the middle-end, the additional
+member goes directly into @code{union tree_node} in @file{tree.h}.
+
+@item Update dynamic checking info
+In order to be able to check whether accessing a named portion of
+@code{union tree_node} is legal, and whether a certain @code{DECL} node
+contains one of the enumerated @code{DECL} node structures in the
+hierarchy, a simple lookup table is used.
+This lookup table needs to be kept up to date with the tree structure
+hierarchy, or else checking and containment macros will fail
+inappropriately.
+
+For language specific @code{DECL} nodes, their is an @code{init_ts}
+function in an appropriate @file{.c} file, which initializes the lookup
+table.
+Code setting up the table for new @code{DECL} nodes should be added
+there.
+For each @code{DECL} tree code and enumerator value representing a
+member of the inheritance  hierarchy, the table should contain 1 if
+that tree code inherits (directly or indirectly) from that member.
+Thus, a @code{FOO_DECL} node derived from @code{struct decl_with_rtl},
+and enumerator value @code{TS_FOO_DECL}, would be set up as follows
+@smallexample
+tree_contains_struct[FOO_DECL][TS_FOO_DECL] = 1;
+tree_contains_struct[FOO_DECL][TS_DECL_WRTL] = 1;
+tree_contains_struct[FOO_DECL][TS_DECL_COMMON] = 1;
+tree_contains_struct[FOO_DECL][TS_DECL_MINIMAL] = 1;
+@end smallexample
+
+For @code{DECL} nodes that are part of the middle-end, the setup code
+goes into @file{tree.c}.
+
+@item Add macros to access any new fields and flags
+
+Each added field or flag should have a macro that is used to access
+it, that performs appropriate checking to ensure only the right type of
+@code{DECL} nodes access the field.
+
+These macros generally take the following form
+@smallexample
+#define FOO_DECL_FIELDNAME(NODE) FOO_DECL_CHECK(NODE)->foo_decl.fieldname
+@end smallexample
+However, if the structure is simply a base class for further
+structures, something like the following should be used
+@smallexample
+#define BASE_STRUCT_CHECK(T) CONTAINS_STRUCT_CHECK(T, TS_BASE_STRUCT)
+#define BASE_STRUCT_FIELDNAME(NODE) \
+   (BASE_STRUCT_CHECK(NODE)->base_struct.fieldname
+@end smallexample
+
+@end table
+
+
+@c ---------------------------------------------------------------------
+@c Attributes
+@c ---------------------------------------------------------------------
+@node Attributes
+@section Attributes in trees
+@cindex attributes
+
+Attributes, as specified using the @code{__attribute__} keyword, are
+represented internally as a @code{TREE_LIST}.  The @code{TREE_PURPOSE}
+is the name of the attribute, as an @code{IDENTIFIER_NODE}.  The
+@code{TREE_VALUE} is a @code{TREE_LIST} of the arguments of the
+attribute, if any, or @code{NULL_TREE} if there are no arguments; the
+arguments are stored as the @code{TREE_VALUE} of successive entries in
+the list, and may be identifiers or expressions.  The @code{TREE_CHAIN}
+of the attribute is the next attribute in a list of attributes applying
+to the same declaration or type, or @code{NULL_TREE} if there are no
+further attributes in the list.
+
+Attributes may be attached to declarations and to types; these
+attributes may be accessed with the following macros.  All attributes
+are stored in this way, and many also cause other changes to the
+declaration or type or to other internal compiler data structures.
+
+@deftypefn {Tree Macro} tree DECL_ATTRIBUTES (tree @var{decl})
+This macro returns the attributes on the declaration @var{decl}.
+@end deftypefn
+
+@deftypefn {Tree Macro} tree TYPE_ATTRIBUTES (tree @var{type})
+This macro returns the attributes on the type @var{type}.
+@end deftypefn
+
+
+@c ---------------------------------------------------------------------
+@c Expressions
+@c ---------------------------------------------------------------------
+
+@node Expression trees
+@section Expressions
+@cindex expression
+@findex TREE_TYPE
+@findex TREE_OPERAND
+
+The internal representation for expressions is for the most part quite
+straightforward.  However, there are a few facts that one must bear in
+mind.  In particular, the expression ``tree'' is actually a directed
+acyclic graph.  (For example there may be many references to the integer
+constant zero throughout the source program; many of these will be
+represented by the same expression node.)  You should not rely on
+certain kinds of node being shared, nor should you rely on certain kinds of
+nodes being unshared.
+
+The following macros can be used with all expression nodes:
+
+@ftable @code
+@item TREE_TYPE
+Returns the type of the expression.  This value may not be precisely the
+same type that would be given the expression in the original program.
+@end ftable
+
+In what follows, some nodes that one might expect to always have type
+@code{bool} are documented to have either integral or boolean type.  At
+some point in the future, the C front end may also make use of this same
+intermediate representation, and at this point these nodes will
+certainly have integral type.  The previous sentence is not meant to
+imply that the C++ front end does not or will not give these nodes
+integral type.
+
+Below, we list the various kinds of expression nodes.  Except where
+noted otherwise, the operands to an expression are accessed using the
+@code{TREE_OPERAND} macro.  For example, to access the first operand to
+a binary plus expression @code{expr}, use:
+
+@smallexample
+TREE_OPERAND (expr, 0)
+@end smallexample
+@noindent
+
+As this example indicates, the operands are zero-indexed.
+
+
+@menu
+* Constants: Constant expressions.
+* Storage References::
+* Unary and Binary Expressions::
+* Vectors::
+@end menu
+
+@node Constant expressions
+@subsection Constant expressions
+@tindex INTEGER_CST
+@findex TREE_INT_CST_HIGH
+@findex TREE_INT_CST_LOW
+@findex tree_int_cst_lt
+@findex tree_int_cst_equal
+@tindex REAL_CST
+@tindex FIXED_CST
+@tindex COMPLEX_CST
+@tindex VECTOR_CST
+@tindex STRING_CST
+@findex TREE_STRING_LENGTH
+@findex TREE_STRING_POINTER
+
+The table below begins with constants, moves on to unary expressions,
+then proceeds to binary expressions, and concludes with various other
+kinds of expressions:
+
+@table @code
+@item INTEGER_CST
+These nodes represent integer constants.  Note that the type of these
+constants is obtained with @code{TREE_TYPE}; they are not always of type
+@code{int}.  In particular, @code{char} constants are represented with
+@code{INTEGER_CST} nodes.  The value of the integer constant @code{e} is
+given by
+@smallexample
+((TREE_INT_CST_HIGH (e) << HOST_BITS_PER_WIDE_INT)
++ TREE_INST_CST_LOW (e))
+@end smallexample
+@noindent
+HOST_BITS_PER_WIDE_INT is at least thirty-two on all platforms.  Both
+@code{TREE_INT_CST_HIGH} and @code{TREE_INT_CST_LOW} return a
+@code{HOST_WIDE_INT}.  The value of an @code{INTEGER_CST} is interpreted
+as a signed or unsigned quantity depending on the type of the constant.
+In general, the expression given above will overflow, so it should not
+be used to calculate the value of the constant.
+
+The variable @code{integer_zero_node} is an integer constant with value
+zero.  Similarly, @code{integer_one_node} is an integer constant with
+value one.  The @code{size_zero_node} and @code{size_one_node} variables
+are analogous, but have type @code{size_t} rather than @code{int}.
+
+The function @code{tree_int_cst_lt} is a predicate which holds if its
+first argument is less than its second.  Both constants are assumed to
+have the same signedness (i.e., either both should be signed or both
+should be unsigned.)  The full width of the constant is used when doing
+the comparison; the usual rules about promotions and conversions are
+ignored.  Similarly, @code{tree_int_cst_equal} holds if the two
+constants are equal.  The @code{tree_int_cst_sgn} function returns the
+sign of a constant.  The value is @code{1}, @code{0}, or @code{-1}
+according on whether the constant is greater than, equal to, or less
+than zero.  Again, the signedness of the constant's type is taken into
+account; an unsigned constant is never less than zero, no matter what
+its bit-pattern.
+
+@item REAL_CST
+
+FIXME: Talk about how to obtain representations of this constant, do
+comparisons, and so forth.
+
+@item FIXED_CST
+
+These nodes represent fixed-point constants.  The type of these constants
+is obtained with @code{TREE_TYPE}.  @code{TREE_FIXED_CST_PTR} points to
+a @code{struct fixed_value};  @code{TREE_FIXED_CST} returns the structure
+itself.  @code{struct fixed_value} contains @code{data} with the size of two
+@code{HOST_BITS_PER_WIDE_INT} and @code{mode} as the associated fixed-point
+machine mode for @code{data}.
+
+@item COMPLEX_CST
+These nodes are used to represent complex number constants, that is a
+@code{__complex__} whose parts are constant nodes.  The
+@code{TREE_REALPART} and @code{TREE_IMAGPART} return the real and the
+imaginary parts respectively.
+
+@item VECTOR_CST
+These nodes are used to represent vector constants, whose parts are
+constant nodes.  Each individual constant node is either an integer or a
+double constant node.  The first operand is a @code{TREE_LIST} of the
+constant nodes and is accessed through @code{TREE_VECTOR_CST_ELTS}.
+
+@item STRING_CST
+These nodes represent string-constants.  The @code{TREE_STRING_LENGTH}
+returns the length of the string, as an @code{int}.  The
+@code{TREE_STRING_POINTER} is a @code{char*} containing the string
+itself.  The string may not be @code{NUL}-terminated, and it may contain
+embedded @code{NUL} characters.  Therefore, the
+@code{TREE_STRING_LENGTH} includes the trailing @code{NUL} if it is
+present.
+
+For wide string constants, the @code{TREE_STRING_LENGTH} is the number
+of bytes in the string, and the @code{TREE_STRING_POINTER}
+points to an array of the bytes of the string, as represented on the
+target system (that is, as integers in the target endianness).  Wide and
+non-wide string constants are distinguished only by the @code{TREE_TYPE}
+of the @code{STRING_CST}.
+
+FIXME: The formats of string constants are not well-defined when the
+target system bytes are not the same width as host system bytes.
+
+@end table
+
+@node Storage References
+@subsection References to storage
+@tindex ADDR_EXPR
+@tindex INDIRECT_REF
+@tindex MEM_REF
+@tindex ARRAY_REF
+@tindex ARRAY_RANGE_REF
+@tindex TARGET_MEM_REF
+@tindex COMPONENT_REF
+
+@table @code
+@item ARRAY_REF
+These nodes represent array accesses.  The first operand is the array;
+the second is the index.  To calculate the address of the memory
+accessed, you must scale the index by the size of the type of the array
+elements.  The type of these expressions must be the type of a component of
+the array.  The third and fourth operands are used after gimplification
+to represent the lower bound and component size but should not be used
+directly; call @code{array_ref_low_bound} and @code{array_ref_element_size}
+instead.
+
+@item ARRAY_RANGE_REF
+These nodes represent access to a range (or ``slice'') of an array.  The
+operands are the same as that for @code{ARRAY_REF} and have the same
+meanings.  The type of these expressions must be an array whose component
+type is the same as that of the first operand.  The range of that array
+type determines the amount of data these expressions access.
+
+@item TARGET_MEM_REF
+These nodes represent memory accesses whose address directly map to
+an addressing mode of the target architecture.  The first argument
+is @code{TMR_SYMBOL} and must be a @code{VAR_DECL} of an object with
+a fixed address.  The second argument is @code{TMR_BASE} and the
+third one is @code{TMR_INDEX}.  The fourth argument is
+@code{TMR_STEP} and must be an @code{INTEGER_CST}.  The fifth
+argument is @code{TMR_OFFSET} and must be an @code{INTEGER_CST}.
+Any of the arguments may be NULL if the appropriate component
+does not appear in the address.  Address of the @code{TARGET_MEM_REF}
+is determined in the following way.
+
+@smallexample
+&TMR_SYMBOL + TMR_BASE + TMR_INDEX * TMR_STEP + TMR_OFFSET
+@end smallexample
+
+The sixth argument is the reference to the original memory access, which
+is preserved for the purposes of the RTL alias analysis.  The seventh
+argument is a tag representing the results of tree level alias analysis.
+
+@item ADDR_EXPR
+These nodes are used to represent the address of an object.  (These
+expressions will always have pointer or reference type.)  The operand may
+be another expression, or it may be a declaration.
+
+As an extension, GCC allows users to take the address of a label.  In
+this case, the operand of the @code{ADDR_EXPR} will be a
+@code{LABEL_DECL}.  The type of such an expression is @code{void*}.
+
+If the object addressed is not an lvalue, a temporary is created, and
+the address of the temporary is used.
+
+@item INDIRECT_REF
+These nodes are used to represent the object pointed to by a pointer.
+The operand is the pointer being dereferenced; it will always have
+pointer or reference type.
+
+@item MEM_REF
+These nodes are used to represent the object pointed to by a pointer
+offset by a constant.
+The first operand is the pointer being dereferenced; it will always have
+pointer or reference type.  The second operand is a pointer constant.
+Its type is specifying the type to be used for type-based alias analysis.
+
+@item COMPONENT_REF
+These nodes represent non-static data member accesses.  The first
+operand is the object (rather than a pointer to it); the second operand
+is the @code{FIELD_DECL} for the data member.  The third operand represents
+the byte offset of the field, but should not be used directly; call
+@code{component_ref_field_offset} instead.
+
+
+@end table
+
+@node Unary and Binary Expressions
+@subsection Unary and Binary Expressions
+@tindex NEGATE_EXPR
+@tindex ABS_EXPR
+@tindex BIT_NOT_EXPR
+@tindex TRUTH_NOT_EXPR
+@tindex PREDECREMENT_EXPR
+@tindex PREINCREMENT_EXPR
+@tindex POSTDECREMENT_EXPR
+@tindex POSTINCREMENT_EXPR
+@tindex FIX_TRUNC_EXPR
+@tindex FLOAT_EXPR
+@tindex COMPLEX_EXPR
+@tindex CONJ_EXPR
+@tindex REALPART_EXPR
+@tindex IMAGPART_EXPR
+@tindex NON_LVALUE_EXPR
+@tindex NOP_EXPR
+@tindex CONVERT_EXPR
+@tindex FIXED_CONVERT_EXPR
+@tindex THROW_EXPR
+@tindex LSHIFT_EXPR
+@tindex RSHIFT_EXPR
+@tindex BIT_IOR_EXPR
+@tindex BIT_XOR_EXPR
+@tindex BIT_AND_EXPR
+@tindex TRUTH_ANDIF_EXPR
+@tindex TRUTH_ORIF_EXPR
+@tindex TRUTH_AND_EXPR
+@tindex TRUTH_OR_EXPR
+@tindex TRUTH_XOR_EXPR
+@tindex POINTER_PLUS_EXPR
+@tindex PLUS_EXPR
+@tindex MINUS_EXPR
+@tindex MULT_EXPR
+@tindex RDIV_EXPR
+@tindex TRUNC_DIV_EXPR
+@tindex FLOOR_DIV_EXPR
+@tindex CEIL_DIV_EXPR
+@tindex ROUND_DIV_EXPR
+@tindex TRUNC_MOD_EXPR
+@tindex FLOOR_MOD_EXPR
+@tindex CEIL_MOD_EXPR
+@tindex ROUND_MOD_EXPR
+@tindex EXACT_DIV_EXPR
+@tindex LT_EXPR
+@tindex LE_EXPR
+@tindex GT_EXPR
+@tindex GE_EXPR
+@tindex EQ_EXPR
+@tindex NE_EXPR
+@tindex ORDERED_EXPR
+@tindex UNORDERED_EXPR
+@tindex UNLT_EXPR
+@tindex UNLE_EXPR
+@tindex UNGT_EXPR
+@tindex UNGE_EXPR
+@tindex UNEQ_EXPR
+@tindex LTGT_EXPR
+@tindex MODIFY_EXPR
+@tindex INIT_EXPR
+@tindex COMPOUND_EXPR
+@tindex COND_EXPR
+@tindex CALL_EXPR
+@tindex STMT_EXPR
+@tindex BIND_EXPR
+@tindex LOOP_EXPR
+@tindex EXIT_EXPR
+@tindex CLEANUP_POINT_EXPR
+@tindex CONSTRUCTOR
+@tindex COMPOUND_LITERAL_EXPR
+@tindex SAVE_EXPR
+@tindex TARGET_EXPR
+@tindex VA_ARG_EXPR
+
+@table @code
+@item NEGATE_EXPR
+These nodes represent unary negation of the single operand, for both
+integer and floating-point types.  The type of negation can be
+determined by looking at the type of the expression.
+
+The behavior of this operation on signed arithmetic overflow is
+controlled by the @code{flag_wrapv} and @code{flag_trapv} variables.
+
+@item ABS_EXPR
+These nodes represent the absolute value of the single operand, for
+both integer and floating-point types.  This is typically used to
+implement the @code{abs}, @code{labs} and @code{llabs} builtins for
+integer types, and the @code{fabs}, @code{fabsf} and @code{fabsl}
+builtins for floating point types.  The type of abs operation can
+be determined by looking at the type of the expression.
+
+This node is not used for complex types.  To represent the modulus
+or complex abs of a complex value, use the @code{BUILT_IN_CABS},
+@code{BUILT_IN_CABSF} or @code{BUILT_IN_CABSL} builtins, as used
+to implement the C99 @code{cabs}, @code{cabsf} and @code{cabsl}
+built-in functions.
+
+@item BIT_NOT_EXPR
+These nodes represent bitwise complement, and will always have integral
+type.  The only operand is the value to be complemented.
+
+@item TRUTH_NOT_EXPR
+These nodes represent logical negation, and will always have integral
+(or boolean) type.  The operand is the value being negated.  The type
+of the operand and that of the result are always of @code{BOOLEAN_TYPE}
+or @code{INTEGER_TYPE}.
+
+@item PREDECREMENT_EXPR
+@itemx PREINCREMENT_EXPR
+@itemx POSTDECREMENT_EXPR
+@itemx POSTINCREMENT_EXPR
+These nodes represent increment and decrement expressions.  The value of
+the single operand is computed, and the operand incremented or
+decremented.  In the case of @code{PREDECREMENT_EXPR} and
+@code{PREINCREMENT_EXPR}, the value of the expression is the value
+resulting after the increment or decrement; in the case of
+@code{POSTDECREMENT_EXPR} and @code{POSTINCREMENT_EXPR} is the value
+before the increment or decrement occurs.  The type of the operand, like
+that of the result, will be either integral, boolean, or floating-point.
+
+@item FIX_TRUNC_EXPR
+These nodes represent conversion of a floating-point value to an
+integer.  The single operand will have a floating-point type, while
+the complete expression will have an integral (or boolean) type.  The
+operand is rounded towards zero.
+
+@item FLOAT_EXPR
+These nodes represent conversion of an integral (or boolean) value to a
+floating-point value.  The single operand will have integral type, while
+the complete expression will have a floating-point type.
+
+FIXME: How is the operand supposed to be rounded?  Is this dependent on
+@option{-mieee}?
+
+@item COMPLEX_EXPR
+These nodes are used to represent complex numbers constructed from two
+expressions of the same (integer or real) type.  The first operand is the
+real part and the second operand is the imaginary part.
+
+@item CONJ_EXPR
+These nodes represent the conjugate of their operand.
+
+@item REALPART_EXPR
+@itemx IMAGPART_EXPR
+These nodes represent respectively the real and the imaginary parts
+of complex numbers (their sole argument).
+
+@item NON_LVALUE_EXPR
+These nodes indicate that their one and only operand is not an lvalue.
+A back end can treat these identically to the single operand.
+
+@item NOP_EXPR
+These nodes are used to represent conversions that do not require any
+code-generation.  For example, conversion of a @code{char*} to an
+@code{int*} does not require any code be generated; such a conversion is
+represented by a @code{NOP_EXPR}.  The single operand is the expression
+to be converted.  The conversion from a pointer to a reference is also
+represented with a @code{NOP_EXPR}.
+
+@item CONVERT_EXPR
+These nodes are similar to @code{NOP_EXPR}s, but are used in those
+situations where code may need to be generated.  For example, if an
+@code{int*} is converted to an @code{int} code may need to be generated
+on some platforms.  These nodes are never used for C++-specific
+conversions, like conversions between pointers to different classes in
+an inheritance hierarchy.  Any adjustments that need to be made in such
+cases are always indicated explicitly.  Similarly, a user-defined
+conversion is never represented by a @code{CONVERT_EXPR}; instead, the
+function calls are made explicit.
+
+@item FIXED_CONVERT_EXPR
+These nodes are used to represent conversions that involve fixed-point
+values.  For example, from a fixed-point value to another fixed-point value,
+from an integer to a fixed-point value, from a fixed-point value to an
+integer, from a floating-point value to a fixed-point value, or from
+a fixed-point value to a floating-point value.
+
+@item LSHIFT_EXPR
+@itemx RSHIFT_EXPR
+These nodes represent left and right shifts, respectively.  The first
+operand is the value to shift; it will always be of integral type.  The
+second operand is an expression for the number of bits by which to
+shift.  Right shift should be treated as arithmetic, i.e., the
+high-order bits should be zero-filled when the expression has unsigned
+type and filled with the sign bit when the expression has signed type.
+Note that the result is undefined if the second operand is larger
+than or equal to the first operand's type size.
+
+
+@item BIT_IOR_EXPR
+@itemx BIT_XOR_EXPR
+@itemx BIT_AND_EXPR
+These nodes represent bitwise inclusive or, bitwise exclusive or, and
+bitwise and, respectively.  Both operands will always have integral
+type.
+
+@item TRUTH_ANDIF_EXPR
+@itemx TRUTH_ORIF_EXPR
+These nodes represent logical ``and'' and logical ``or'', respectively.
+These operators are not strict; i.e., the second operand is evaluated
+only if the value of the expression is not determined by evaluation of
+the first operand.  The type of the operands and that of the result are
+always of @code{BOOLEAN_TYPE} or @code{INTEGER_TYPE}.
+
+@item TRUTH_AND_EXPR
+@itemx TRUTH_OR_EXPR
+@itemx TRUTH_XOR_EXPR
+These nodes represent logical and, logical or, and logical exclusive or.
+They are strict; both arguments are always evaluated.  There are no
+corresponding operators in C or C++, but the front end will sometimes
+generate these expressions anyhow, if it can tell that strictness does
+not matter.  The type of the operands and that of the result are
+always of @code{BOOLEAN_TYPE} or @code{INTEGER_TYPE}.
+
+@item POINTER_PLUS_EXPR
+This node represents pointer arithmetic.  The first operand is always
+a pointer/reference type.  The second operand is always an unsigned
+integer type compatible with sizetype.  This is the only binary
+arithmetic operand that can operate on pointer types.
+
+@item PLUS_EXPR
+@itemx MINUS_EXPR
+@itemx MULT_EXPR
+These nodes represent various binary arithmetic operations.
+Respectively, these operations are addition, subtraction (of the second
+operand from the first) and multiplication.  Their operands may have
+either integral or floating type, but there will never be case in which
+one operand is of floating type and the other is of integral type.
+
+The behavior of these operations on signed arithmetic overflow is
+controlled by the @code{flag_wrapv} and @code{flag_trapv} variables.
+
+@item RDIV_EXPR
+This node represents a floating point division operation.
+
+@item TRUNC_DIV_EXPR
+@itemx FLOOR_DIV_EXPR
+@itemx CEIL_DIV_EXPR
+@itemx ROUND_DIV_EXPR
+These nodes represent integer division operations that return an integer
+result.  @code{TRUNC_DIV_EXPR} rounds towards zero, @code{FLOOR_DIV_EXPR}
+rounds towards negative infinity, @code{CEIL_DIV_EXPR} rounds towards
+positive infinity and @code{ROUND_DIV_EXPR} rounds to the closest integer.
+Integer division in C and C++ is truncating, i.e.@: @code{TRUNC_DIV_EXPR}.
+
+The behavior of these operations on signed arithmetic overflow, when
+dividing the minimum signed integer by minus one, is controlled by the
+@code{flag_wrapv} and @code{flag_trapv} variables.
+
+@item TRUNC_MOD_EXPR
+@itemx FLOOR_MOD_EXPR
+@itemx CEIL_MOD_EXPR
+@itemx ROUND_MOD_EXPR
+These nodes represent the integer remainder or modulus operation.
+The integer modulus of two operands @code{a} and @code{b} is
+defined as @code{a - (a/b)*b} where the division calculated using
+the corresponding division operator.  Hence for @code{TRUNC_MOD_EXPR}
+this definition assumes division using truncation towards zero, i.e.@:
+@code{TRUNC_DIV_EXPR}.  Integer remainder in C and C++ uses truncating
+division, i.e.@: @code{TRUNC_MOD_EXPR}.
+
+@item EXACT_DIV_EXPR
+The @code{EXACT_DIV_EXPR} code is used to represent integer divisions where
+the numerator is known to be an exact multiple of the denominator.  This
+allows the backend to choose between the faster of @code{TRUNC_DIV_EXPR},
+@code{CEIL_DIV_EXPR} and @code{FLOOR_DIV_EXPR} for the current target.
+
+@item LT_EXPR
+@itemx LE_EXPR
+@itemx GT_EXPR
+@itemx GE_EXPR
+@itemx EQ_EXPR
+@itemx NE_EXPR
+These nodes represent the less than, less than or equal to, greater
+than, greater than or equal to, equal, and not equal comparison
+operators.  The first and second operand with either be both of integral
+type or both of floating type.  The result type of these expressions
+will always be of integral or boolean type.  These operations return
+the result type's zero value for false, and the result type's one value
+for true.
+
+For floating point comparisons, if we honor IEEE NaNs and either operand
+is NaN, then @code{NE_EXPR} always returns true and the remaining operators
+always return false.  On some targets, comparisons against an IEEE NaN,
+other than equality and inequality, may generate a floating point exception.
+
+@item ORDERED_EXPR
+@itemx UNORDERED_EXPR
+These nodes represent non-trapping ordered and unordered comparison
+operators.  These operations take two floating point operands and
+determine whether they are ordered or unordered relative to each other.
+If either operand is an IEEE NaN, their comparison is defined to be
+unordered, otherwise the comparison is defined to be ordered.  The
+result type of these expressions will always be of integral or boolean
+type.  These operations return the result type's zero value for false,
+and the result type's one value for true.
+
+@item UNLT_EXPR
+@itemx UNLE_EXPR
+@itemx UNGT_EXPR
+@itemx UNGE_EXPR
+@itemx UNEQ_EXPR
+@itemx LTGT_EXPR
+These nodes represent the unordered comparison operators.
+These operations take two floating point operands and determine whether
+the operands are unordered or are less than, less than or equal to,
+greater than, greater than or equal to, or equal respectively.  For
+example, @code{UNLT_EXPR} returns true if either operand is an IEEE
+NaN or the first operand is less than the second.  With the possible
+exception of @code{LTGT_EXPR}, all of these operations are guaranteed
+not to generate a floating point exception.  The result
+type of these expressions will always be of integral or boolean type.
+These operations return the result type's zero value for false,
+and the result type's one value for true.
+
+@item MODIFY_EXPR
+These nodes represent assignment.  The left-hand side is the first
+operand; the right-hand side is the second operand.  The left-hand side
+will be a @code{VAR_DECL}, @code{INDIRECT_REF}, @code{COMPONENT_REF}, or
+other lvalue.
+
+These nodes are used to represent not only assignment with @samp{=} but
+also compound assignments (like @samp{+=}), by reduction to @samp{=}
+assignment.  In other words, the representation for @samp{i += 3} looks
+just like that for @samp{i = i + 3}.
+
+@item INIT_EXPR
+These nodes are just like @code{MODIFY_EXPR}, but are used only when a
+variable is initialized, rather than assigned to subsequently.  This
+means that we can assume that the target of the initialization is not
+used in computing its own value; any reference to the lhs in computing
+the rhs is undefined.
+
+@item COMPOUND_EXPR
+These nodes represent comma-expressions.  The first operand is an
+expression whose value is computed and thrown away prior to the
+evaluation of the second operand.  The value of the entire expression is
+the value of the second operand.
+
+@item COND_EXPR
+These nodes represent @code{?:} expressions.  The first operand
+is of boolean or integral type.  If it evaluates to a nonzero value,
+the second operand should be evaluated, and returned as the value of the
+expression.  Otherwise, the third operand is evaluated, and returned as
+the value of the expression.
+
+The second operand must have the same type as the entire expression,
+unless it unconditionally throws an exception or calls a noreturn
+function, in which case it should have void type.  The same constraints
+apply to the third operand.  This allows array bounds checks to be
+represented conveniently as @code{(i >= 0 && i < 10) ? i : abort()}.
+
+As a GNU extension, the C language front-ends allow the second
+operand of the @code{?:} operator may be omitted in the source.
+For example, @code{x ? : 3} is equivalent to @code{x ? x : 3},
+assuming that @code{x} is an expression without side-effects.
+In the tree representation, however, the second operand is always
+present, possibly protected by @code{SAVE_EXPR} if the first
+argument does cause side-effects.
+
+@item CALL_EXPR
+These nodes are used to represent calls to functions, including
+non-static member functions.  @code{CALL_EXPR}s are implemented as
+expression nodes with a variable number of operands.  Rather than using
+@code{TREE_OPERAND} to extract them, it is preferable to use the
+specialized accessor macros and functions that operate specifically on
+@code{CALL_EXPR} nodes.
+
+@code{CALL_EXPR_FN} returns a pointer to the
+function to call; it is always an expression whose type is a
+@code{POINTER_TYPE}.
+
+The number of arguments to the call is returned by @code{call_expr_nargs},
+while the arguments themselves can be accessed with the @code{CALL_EXPR_ARG} 
+macro.  The arguments are zero-indexed and numbered left-to-right.  
+You can iterate over the arguments using @code{FOR_EACH_CALL_EXPR_ARG}, as in:
+
+@smallexample
+tree call, arg;
+call_expr_arg_iterator iter;
+FOR_EACH_CALL_EXPR_ARG (arg, iter, call)
+  /* arg is bound to successive arguments of call.  */
+  @dots{};
+@end smallexample
+
+For non-static
+member functions, there will be an operand corresponding to the
+@code{this} pointer.  There will always be expressions corresponding to
+all of the arguments, even if the function is declared with default
+arguments and some arguments are not explicitly provided at the call
+sites.
+
+@code{CALL_EXPR}s also have a @code{CALL_EXPR_STATIC_CHAIN} operand that
+is used to implement nested functions.  This operand is otherwise null.
+
+@item CLEANUP_POINT_EXPR
+These nodes represent full-expressions.  The single operand is an
+expression to evaluate.  Any destructor calls engendered by the creation
+of temporaries during the evaluation of that expression should be
+performed immediately after the expression is evaluated.
+
+@item CONSTRUCTOR
+These nodes represent the brace-enclosed initializers for a structure or
+array.  The first operand is reserved for use by the back end.  The
+second operand is a @code{TREE_LIST}.  If the @code{TREE_TYPE} of the
+@code{CONSTRUCTOR} is a @code{RECORD_TYPE} or @code{UNION_TYPE}, then
+the @code{TREE_PURPOSE} of each node in the @code{TREE_LIST} will be a
+@code{FIELD_DECL} and the @code{TREE_VALUE} of each node will be the
+expression used to initialize that field.
+
+If the @code{TREE_TYPE} of the @code{CONSTRUCTOR} is an
+@code{ARRAY_TYPE}, then the @code{TREE_PURPOSE} of each element in the
+@code{TREE_LIST} will be an @code{INTEGER_CST} or a @code{RANGE_EXPR} of
+two @code{INTEGER_CST}s.  A single @code{INTEGER_CST} indicates which
+element of the array (indexed from zero) is being assigned to.  A
+@code{RANGE_EXPR} indicates an inclusive range of elements to
+initialize.  In both cases the @code{TREE_VALUE} is the corresponding
+initializer.  It is re-evaluated for each element of a
+@code{RANGE_EXPR}.  If the @code{TREE_PURPOSE} is @code{NULL_TREE}, then
+the initializer is for the next available array element.
+
+In the front end, you should not depend on the fields appearing in any
+particular order.  However, in the middle end, fields must appear in
+declaration order.  You should not assume that all fields will be
+represented.  Unrepresented fields will be set to zero.
+
+@item COMPOUND_LITERAL_EXPR
+@findex COMPOUND_LITERAL_EXPR_DECL_EXPR
+@findex COMPOUND_LITERAL_EXPR_DECL
+These nodes represent ISO C99 compound literals.  The
+@code{COMPOUND_LITERAL_EXPR_DECL_EXPR} is a @code{DECL_EXPR}
+containing an anonymous @code{VAR_DECL} for
+the unnamed object represented by the compound literal; the
+@code{DECL_INITIAL} of that @code{VAR_DECL} is a @code{CONSTRUCTOR}
+representing the brace-enclosed list of initializers in the compound
+literal.  That anonymous @code{VAR_DECL} can also be accessed directly
+by the @code{COMPOUND_LITERAL_EXPR_DECL} macro.
+
+@item SAVE_EXPR
+
+A @code{SAVE_EXPR} represents an expression (possibly involving
+side-effects) that is used more than once.  The side-effects should
+occur only the first time the expression is evaluated.  Subsequent uses
+should just reuse the computed value.  The first operand to the
+@code{SAVE_EXPR} is the expression to evaluate.  The side-effects should
+be executed where the @code{SAVE_EXPR} is first encountered in a
+depth-first preorder traversal of the expression tree.
+
+@item TARGET_EXPR
+A @code{TARGET_EXPR} represents a temporary object.  The first operand
+is a @code{VAR_DECL} for the temporary variable.  The second operand is
+the initializer for the temporary.  The initializer is evaluated and,
+if non-void, copied (bitwise) into the temporary.  If the initializer
+is void, that means that it will perform the initialization itself.
+
+Often, a @code{TARGET_EXPR} occurs on the right-hand side of an
+assignment, or as the second operand to a comma-expression which is
+itself the right-hand side of an assignment, etc.  In this case, we say
+that the @code{TARGET_EXPR} is ``normal''; otherwise, we say it is
+``orphaned''.  For a normal @code{TARGET_EXPR} the temporary variable
+should be treated as an alias for the left-hand side of the assignment,
+rather than as a new temporary variable.
+
+The third operand to the @code{TARGET_EXPR}, if present, is a
+cleanup-expression (i.e., destructor call) for the temporary.  If this
+expression is orphaned, then this expression must be executed when the
+statement containing this expression is complete.  These cleanups must
+always be executed in the order opposite to that in which they were
+encountered.  Note that if a temporary is created on one branch of a
+conditional operator (i.e., in the second or third operand to a
+@code{COND_EXPR}), the cleanup must be run only if that branch is
+actually executed.
+
+@item VA_ARG_EXPR
+This node is used to implement support for the C/C++ variable argument-list
+mechanism.  It represents expressions like @code{va_arg (ap, type)}.
+Its @code{TREE_TYPE} yields the tree representation for @code{type} and
+its sole argument yields the representation for @code{ap}.
+
+@end table
+
+@node Vectors
+@subsection Vectors
+@tindex VEC_LSHIFT_EXPR
+@tindex VEC_RSHIFT_EXPR
+@tindex VEC_WIDEN_MULT_HI_EXPR
+@tindex VEC_WIDEN_MULT_LO_EXPR
+@tindex VEC_UNPACK_HI_EXPR
+@tindex VEC_UNPACK_LO_EXPR
+@tindex VEC_UNPACK_FLOAT_HI_EXPR
+@tindex VEC_UNPACK_FLOAT_LO_EXPR
+@tindex VEC_PACK_TRUNC_EXPR
+@tindex VEC_PACK_SAT_EXPR
+@tindex VEC_PACK_FIX_TRUNC_EXPR
+@tindex VEC_EXTRACT_EVEN_EXPR 
+@tindex VEC_EXTRACT_ODD_EXPR
+@tindex VEC_INTERLEAVE_HIGH_EXPR
+@tindex VEC_INTERLEAVE_LOW_EXPR
+
+@table @code
+@item VEC_LSHIFT_EXPR
+@itemx VEC_RSHIFT_EXPR
+These nodes represent whole vector left and right shifts, respectively.  
+The first operand is the vector to shift; it will always be of vector type.  
+The second operand is an expression for the number of bits by which to
+shift.  Note that the result is undefined if the second operand is larger
+than or equal to the first operand's type size.
+
+@item VEC_WIDEN_MULT_HI_EXPR
+@itemx VEC_WIDEN_MULT_LO_EXPR
+These nodes represent widening vector multiplication of the high and low
+parts of the two input vectors, respectively.  Their operands are vectors 
+that contain the same number of elements (@code{N}) of the same integral type.  
+The result is a vector that contains half as many elements, of an integral type 
+whose size is twice as wide.  In the case of @code{VEC_WIDEN_MULT_HI_EXPR} the
+high @code{N/2} elements of the two vector are multiplied to produce the
+vector of @code{N/2} products. In the case of @code{VEC_WIDEN_MULT_LO_EXPR} the
+low @code{N/2} elements of the two vector are multiplied to produce the
+vector of @code{N/2} products.
+
+@item VEC_UNPACK_HI_EXPR
+@itemx VEC_UNPACK_LO_EXPR
+These nodes represent unpacking of the high and low parts of the input vector,
+respectively.  The single operand is a vector that contains @code{N} elements 
+of the same integral or floating point type.  The result is a vector
+that contains half as many elements, of an integral or floating point type
+whose size is twice as wide.  In the case of @code{VEC_UNPACK_HI_EXPR} the
+high @code{N/2} elements of the vector are extracted and widened (promoted).
+In the case of @code{VEC_UNPACK_LO_EXPR} the low @code{N/2} elements of the
+vector are extracted and widened (promoted).
+
+@item VEC_UNPACK_FLOAT_HI_EXPR
+@itemx VEC_UNPACK_FLOAT_LO_EXPR
+These nodes represent unpacking of the high and low parts of the input vector,
+where the values are converted from fixed point to floating point.  The
+single operand is a vector that contains @code{N} elements of the same
+integral type.  The result is a vector that contains half as many elements
+of a floating point type whose size is twice as wide.  In the case of
+@code{VEC_UNPACK_HI_EXPR} the high @code{N/2} elements of the vector are
+extracted, converted and widened.  In the case of @code{VEC_UNPACK_LO_EXPR}
+the low @code{N/2} elements of the vector are extracted, converted and widened.
+
+@item VEC_PACK_TRUNC_EXPR
+This node represents packing of truncated elements of the two input vectors
+into the output vector.  Input operands are vectors that contain the same
+number of elements of the same integral or floating point type.  The result
+is a vector that contains twice as many elements of an integral or floating
+point type whose size is half as wide. The elements of the two vectors are
+demoted and merged (concatenated) to form the output vector.
+
+@item VEC_PACK_SAT_EXPR
+This node represents packing of elements of the two input vectors into the
+output vector using saturation.  Input operands are vectors that contain
+the same number of elements of the same integral type.  The result is a
+vector that contains twice as many elements of an integral type whose size
+is half as wide.  The elements of the two vectors are demoted and merged
+(concatenated) to form the output vector.
+
+@item VEC_PACK_FIX_TRUNC_EXPR
+This node represents packing of elements of the two input vectors into the
+output vector, where the values are converted from floating point
+to fixed point.  Input operands are vectors that contain the same number
+of elements of a floating point type.  The result is a vector that contains
+twice as many elements of an integral type whose size is half as wide.  The
+elements of the two vectors are merged (concatenated) to form the output
+vector.
+
+@item VEC_EXTRACT_EVEN_EXPR
+@itemx VEC_EXTRACT_ODD_EXPR
+These nodes represent extracting of the even/odd elements of the two input 
+vectors, respectively. Their operands and result are vectors that contain the 
+same number of elements of the same type.
+
+@item VEC_INTERLEAVE_HIGH_EXPR
+@itemx VEC_INTERLEAVE_LOW_EXPR
+These nodes represent merging and interleaving of the high/low elements of the
+two input vectors, respectively. The operands and the result are vectors that 
+contain the same number of elements (@code{N}) of the same type.
+In the case of @code{VEC_INTERLEAVE_HIGH_EXPR}, the high @code{N/2} elements of 
+the first input vector are interleaved with the high @code{N/2} elements of the
+second input vector. In the case of @code{VEC_INTERLEAVE_LOW_EXPR}, the low
+@code{N/2} elements of the first input vector are interleaved with the low 
+@code{N/2} elements of the second input vector.
+
+@end table
+
+
+@c ---------------------------------------------------------------------
+@c Statements
+@c ---------------------------------------------------------------------
+
+@node Statements
+@section Statements
+@cindex Statements
+
+Most statements in GIMPLE are assignment statements, represented by
+@code{GIMPLE_ASSIGN}.  No other C expressions can appear at statement level;
+a reference to a volatile object is converted into a
+@code{GIMPLE_ASSIGN}.
+
+There are also several varieties of complex statements.
+
+@menu
+* Basic Statements::
+* Blocks::
+* Statement Sequences::
+* Empty Statements::
+* Jumps::
+* Cleanups::
+* OpenMP::
+@end menu
+
+@node Basic Statements
+@subsection Basic Statements
+@cindex Basic Statements
+
+@table @code
+@item ASM_EXPR
+
+Used to represent an inline assembly statement.  For an inline assembly
+statement like:
+@smallexample
+asm ("mov x, y");
+@end smallexample
+The @code{ASM_STRING} macro will return a @code{STRING_CST} node for
+@code{"mov x, y"}.  If the original statement made use of the
+extended-assembly syntax, then @code{ASM_OUTPUTS},
+@code{ASM_INPUTS}, and @code{ASM_CLOBBERS} will be the outputs, inputs,
+and clobbers for the statement, represented as @code{STRING_CST} nodes.
+The extended-assembly syntax looks like:
+@smallexample
+asm ("fsinx %1,%0" : "=f" (result) : "f" (angle));
+@end smallexample
+The first string is the @code{ASM_STRING}, containing the instruction
+template.  The next two strings are the output and inputs, respectively;
+this statement has no clobbers.  As this example indicates, ``plain''
+assembly statements are merely a special case of extended assembly
+statements; they have no cv-qualifiers, outputs, inputs, or clobbers.
+All of the strings will be @code{NUL}-terminated, and will contain no
+embedded @code{NUL}-characters.
+
+If the assembly statement is declared @code{volatile}, or if the
+statement was not an extended assembly statement, and is therefore
+implicitly volatile, then the predicate @code{ASM_VOLATILE_P} will hold
+of the @code{ASM_EXPR}.
+
+@item DECL_EXPR
+
+Used to represent a local declaration.  The @code{DECL_EXPR_DECL} macro
+can be used to obtain the entity declared.  This declaration may be a
+@code{LABEL_DECL}, indicating that the label declared is a local label.
+(As an extension, GCC allows the declaration of labels with scope.)  In
+C, this declaration may be a @code{FUNCTION_DECL}, indicating the
+use of the GCC nested function extension.  For more information,
+@pxref{Functions}.
+
+@item LABEL_EXPR
+
+Used to represent a label.  The @code{LABEL_DECL} declared by this
+statement can be obtained with the @code{LABEL_EXPR_LABEL} macro.  The
+@code{IDENTIFIER_NODE} giving the name of the label can be obtained from
+the @code{LABEL_DECL} with @code{DECL_NAME}.
+
+@item GOTO_EXPR
+
+Used to represent a @code{goto} statement.  The @code{GOTO_DESTINATION} will
+usually be a @code{LABEL_DECL}.  However, if the ``computed goto'' extension
+has been used, the @code{GOTO_DESTINATION} will be an arbitrary expression
+indicating the destination.  This expression will always have pointer type.
+
+@item RETURN_EXPR
+
+Used to represent a @code{return} statement.  Operand 0 represents the
+value to return.  It should either be the @code{RESULT_DECL} for the
+containing function, or a @code{MODIFY_EXPR} or @code{INIT_EXPR}
+setting the function's @code{RESULT_DECL}.  It will be
+@code{NULL_TREE} if the statement was just
+@smallexample
+return;
+@end smallexample
+
+@item LOOP_EXPR
+These nodes represent ``infinite'' loops.  The @code{LOOP_EXPR_BODY}
+represents the body of the loop.  It should be executed forever, unless
+an @code{EXIT_EXPR} is encountered.
+
+@item EXIT_EXPR
+These nodes represent conditional exits from the nearest enclosing
+@code{LOOP_EXPR}.  The single operand is the condition; if it is
+nonzero, then the loop should be exited.  An @code{EXIT_EXPR} will only
+appear within a @code{LOOP_EXPR}.
+
+@item SWITCH_STMT
+
+Used to represent a @code{switch} statement.  The @code{SWITCH_STMT_COND}
+is the expression on which the switch is occurring.  See the documentation
+for an @code{IF_STMT} for more information on the representation used
+for the condition.  The @code{SWITCH_STMT_BODY} is the body of the switch
+statement.   The @code{SWITCH_STMT_TYPE} is the original type of switch
+expression as given in the source, before any compiler conversions.
+
+@item CASE_LABEL_EXPR
+
+Use to represent a @code{case} label, range of @code{case} labels, or a
+@code{default} label.  If @code{CASE_LOW} is @code{NULL_TREE}, then this is a
+@code{default} label.  Otherwise, if @code{CASE_HIGH} is @code{NULL_TREE}, then
+this is an ordinary @code{case} label.  In this case, @code{CASE_LOW} is
+an expression giving the value of the label.  Both @code{CASE_LOW} and
+@code{CASE_HIGH} are @code{INTEGER_CST} nodes.  These values will have
+the same type as the condition expression in the switch statement.
+
+Otherwise, if both @code{CASE_LOW} and @code{CASE_HIGH} are defined, the
+statement is a range of case labels.  Such statements originate with the
+extension that allows users to write things of the form:
+@smallexample
+case 2 ... 5:
+@end smallexample
+The first value will be @code{CASE_LOW}, while the second will be
+@code{CASE_HIGH}.
+
+@end table
+
+
+@node Blocks
+@subsection Blocks
+@cindex Blocks
+
+Block scopes and the variables they declare in GENERIC are
+expressed using the @code{BIND_EXPR} code, which in previous
+versions of GCC was primarily used for the C statement-expression
+extension.
+
+Variables in a block are collected into @code{BIND_EXPR_VARS} in
+declaration order through their @code{TREE_CHAIN} field.  Any runtime
+initialization is moved out of @code{DECL_INITIAL} and into a
+statement in the controlled block.  When gimplifying from C or C++,
+this initialization replaces the @code{DECL_STMT}.  These variables
+will never require cleanups.  The scope of these variables is just the
+body
+
+Variable-length arrays (VLAs) complicate this process, as their
+size often refers to variables initialized earlier in the block.
+To handle this, we currently split the block at that point, and
+move the VLA into a new, inner @code{BIND_EXPR}.  This strategy
+may change in the future.
+
+A C++ program will usually contain more @code{BIND_EXPR}s than
+there are syntactic blocks in the source code, since several C++
+constructs have implicit scopes associated with them.  On the
+other hand, although the C++ front end uses pseudo-scopes to
+handle cleanups for objects with destructors, these don't
+translate into the GIMPLE form; multiple declarations at the same
+level use the same @code{BIND_EXPR}.
+
+@node Statement Sequences
+@subsection Statement Sequences
+@cindex Statement Sequences
+
+Multiple statements at the same nesting level are collected into
+a @code{STATEMENT_LIST}.  Statement lists are modified and
+traversed using the interface in @samp{tree-iterator.h}.
+
+@node Empty Statements
+@subsection Empty Statements
+@cindex Empty Statements
+
+Whenever possible, statements with no effect are discarded.  But
+if they are nested within another construct which cannot be
+discarded for some reason, they are instead replaced with an
+empty statement, generated by @code{build_empty_stmt}.
+Initially, all empty statements were shared, after the pattern of
+the Java front end, but this caused a lot of trouble in practice.
+
+An empty statement is represented as @code{(void)0}.
+
+@node Jumps
+@subsection Jumps
+@cindex Jumps
+
+Other jumps are expressed by either @code{GOTO_EXPR} or
+@code{RETURN_EXPR}.
+
+The operand of a @code{GOTO_EXPR} must be either a label or a
+variable containing the address to jump to.
+
+The operand of a @code{RETURN_EXPR} is either @code{NULL_TREE},
+@code{RESULT_DECL}, or a @code{MODIFY_EXPR} which sets the return
+value.  It would be nice to move the @code{MODIFY_EXPR} into a
+separate statement, but the special return semantics in
+@code{expand_return} make that difficult.  It may still happen in
+the future, perhaps by moving most of that logic into
+@code{expand_assignment}.
+
+@node Cleanups
+@subsection Cleanups
+@cindex Cleanups
+
+Destructors for local C++ objects and similar dynamic cleanups are
+represented in GIMPLE by a @code{TRY_FINALLY_EXPR}.
+@code{TRY_FINALLY_EXPR} has two operands, both of which are a sequence
+of statements to execute.  The first sequence is executed.  When it
+completes the second sequence is executed.
+
+The first sequence may complete in the following ways:
+
+@enumerate
+
+@item Execute the last statement in the sequence and fall off the
+end.
+
+@item Execute a goto statement (@code{GOTO_EXPR}) to an ordinary
+label outside the sequence.
+
+@item Execute a return statement (@code{RETURN_EXPR}).
+
+@item Throw an exception.  This is currently not explicitly represented in
+GIMPLE.
+
+@end enumerate
+
+The second sequence is not executed if the first sequence completes by
+calling @code{setjmp} or @code{exit} or any other function that does
+not return.  The second sequence is also not executed if the first
+sequence completes via a non-local goto or a computed goto (in general
+the compiler does not know whether such a goto statement exits the
+first sequence or not, so we assume that it doesn't).
+
+After the second sequence is executed, if it completes normally by
+falling off the end, execution continues wherever the first sequence
+would have continued, by falling off the end, or doing a goto, etc.
+
+@code{TRY_FINALLY_EXPR} complicates the flow graph, since the cleanup
+needs to appear on every edge out of the controlled block; this
+reduces the freedom to move code across these edges.  Therefore, the
+EH lowering pass which runs before most of the optimization passes
+eliminates these expressions by explicitly adding the cleanup to each
+edge.  Rethrowing the exception is represented using @code{RESX_EXPR}.
+
+@node OpenMP
+@subsection OpenMP
+@tindex OMP_PARALLEL
+@tindex OMP_FOR
+@tindex OMP_SECTIONS
+@tindex OMP_SINGLE
+@tindex OMP_SECTION
+@tindex OMP_MASTER
+@tindex OMP_ORDERED
+@tindex OMP_CRITICAL
+@tindex OMP_RETURN
+@tindex OMP_CONTINUE
+@tindex OMP_ATOMIC
+@tindex OMP_CLAUSE
+
+All the statements starting with @code{OMP_} represent directives and
+clauses used by the OpenMP API @w{@uref{http://www.openmp.org/}}.
+
+@table @code
+@item OMP_PARALLEL
+
+Represents @code{#pragma omp parallel [clause1 @dots{} clauseN]}. It
+has four operands:
+
+Operand @code{OMP_PARALLEL_BODY} is valid while in GENERIC and
+High GIMPLE forms.  It contains the body of code to be executed
+by all the threads.  During GIMPLE lowering, this operand becomes
+@code{NULL} and the body is emitted linearly after
+@code{OMP_PARALLEL}.
+
+Operand @code{OMP_PARALLEL_CLAUSES} is the list of clauses
+associated with the directive.
+
+Operand @code{OMP_PARALLEL_FN} is created by
+@code{pass_lower_omp}, it contains the @code{FUNCTION_DECL}
+for the function that will contain the body of the parallel
+region.
+
+Operand @code{OMP_PARALLEL_DATA_ARG} is also created by
+@code{pass_lower_omp}. If there are shared variables to be
+communicated to the children threads, this operand will contain
+the @code{VAR_DECL} that contains all the shared values and
+variables.
+
+@item OMP_FOR
+
+Represents @code{#pragma omp for [clause1 @dots{} clauseN]}.  It
+has 5 operands:
+
+Operand @code{OMP_FOR_BODY} contains the loop body.
+
+Operand @code{OMP_FOR_CLAUSES} is the list of clauses
+associated with the directive.
+
+Operand @code{OMP_FOR_INIT} is the loop initialization code of
+the form @code{VAR = N1}.
+
+Operand @code{OMP_FOR_COND} is the loop conditional expression
+of the form @code{VAR @{<,>,<=,>=@} N2}.
+
+Operand @code{OMP_FOR_INCR} is the loop index increment of the
+form @code{VAR @{+=,-=@} INCR}.
+
+Operand @code{OMP_FOR_PRE_BODY} contains side-effect code from
+operands @code{OMP_FOR_INIT}, @code{OMP_FOR_COND} and
+@code{OMP_FOR_INC}.  These side-effects are part of the
+@code{OMP_FOR} block but must be evaluated before the start of
+loop body.
+
+The loop index variable @code{VAR} must be a signed integer variable,
+which is implicitly private to each thread.  Bounds
+@code{N1} and @code{N2} and the increment expression
+@code{INCR} are required to be loop invariant integer
+expressions that are evaluated without any synchronization. The
+evaluation order, frequency of evaluation and side-effects are
+unspecified by the standard.
+
+@item OMP_SECTIONS
+
+Represents @code{#pragma omp sections [clause1 @dots{} clauseN]}.
+
+Operand @code{OMP_SECTIONS_BODY} contains the sections body,
+which in turn contains a set of @code{OMP_SECTION} nodes for
+each of the concurrent sections delimited by @code{#pragma omp
+section}.
+
+Operand @code{OMP_SECTIONS_CLAUSES} is the list of clauses
+associated with the directive.
+
+@item OMP_SECTION
+
+Section delimiter for @code{OMP_SECTIONS}.
+
+@item OMP_SINGLE
+
+Represents @code{#pragma omp single}.
+
+Operand @code{OMP_SINGLE_BODY} contains the body of code to be
+executed by a single thread.
+
+Operand @code{OMP_SINGLE_CLAUSES} is the list of clauses
+associated with the directive.
+
+@item OMP_MASTER
+
+Represents @code{#pragma omp master}.
+
+Operand @code{OMP_MASTER_BODY} contains the body of code to be
+executed by the master thread.
+
+@item OMP_ORDERED
+
+Represents @code{#pragma omp ordered}.
+
+Operand @code{OMP_ORDERED_BODY} contains the body of code to be
+executed in the sequential order dictated by the loop index
+variable.
+
+@item OMP_CRITICAL
+
+Represents @code{#pragma omp critical [name]}.
+
+Operand @code{OMP_CRITICAL_BODY} is the critical section.
+
+Operand @code{OMP_CRITICAL_NAME} is an optional identifier to
+label the critical section.
+
+@item OMP_RETURN
+
+This does not represent any OpenMP directive, it is an artificial
+marker to indicate the end of the body of an OpenMP@. It is used
+by the flow graph (@code{tree-cfg.c}) and OpenMP region
+building code (@code{omp-low.c}).
+
+@item OMP_CONTINUE
+
+Similarly, this instruction does not represent an OpenMP
+directive, it is used by @code{OMP_FOR} and
+@code{OMP_SECTIONS} to mark the place where the code needs to
+loop to the next iteration (in the case of @code{OMP_FOR}) or
+the next section (in the case of @code{OMP_SECTIONS}).
+
+In some cases, @code{OMP_CONTINUE} is placed right before
+@code{OMP_RETURN}.  But if there are cleanups that need to
+occur right after the looping body, it will be emitted between
+@code{OMP_CONTINUE} and @code{OMP_RETURN}.
+
+@item OMP_ATOMIC
+
+Represents @code{#pragma omp atomic}.
+
+Operand 0 is the address at which the atomic operation is to be
+performed.
+
+Operand 1 is the expression to evaluate.  The gimplifier tries
+three alternative code generation strategies.  Whenever possible,
+an atomic update built-in is used.  If that fails, a
+compare-and-swap loop is attempted.  If that also fails, a
+regular critical section around the expression is used.
+
+@item OMP_CLAUSE
+
+Represents clauses associated with one of the @code{OMP_} directives.
+Clauses are represented by separate sub-codes defined in
+@file{tree.h}.  Clauses codes can be one of:
+@code{OMP_CLAUSE_PRIVATE}, @code{OMP_CLAUSE_SHARED},
+@code{OMP_CLAUSE_FIRSTPRIVATE},
+@code{OMP_CLAUSE_LASTPRIVATE}, @code{OMP_CLAUSE_COPYIN},
+@code{OMP_CLAUSE_COPYPRIVATE}, @code{OMP_CLAUSE_IF},
+@code{OMP_CLAUSE_NUM_THREADS}, @code{OMP_CLAUSE_SCHEDULE},
+@code{OMP_CLAUSE_NOWAIT}, @code{OMP_CLAUSE_ORDERED},
+@code{OMP_CLAUSE_DEFAULT}, and @code{OMP_CLAUSE_REDUCTION}.  Each code
+represents the corresponding OpenMP clause.
+
+Clauses associated with the same directive are chained together
+via @code{OMP_CLAUSE_CHAIN}. Those clauses that accept a list
+of variables are restricted to exactly one, accessed with
+@code{OMP_CLAUSE_VAR}.  Therefore, multiple variables under the
+same clause @code{C} need to be represented as multiple @code{C} clauses
+chained together.  This facilitates adding new clauses during
+compilation.
+
+@end table
+
+@c ---------------------------------------------------------------------
+@c Functions
+@c ---------------------------------------------------------------------
+
+@node Functions
+@section Functions
+@cindex function
+@tindex FUNCTION_DECL
+
+A function is represented by a @code{FUNCTION_DECL} node.  It stores
+the basic pieces of the function such as body, parameters, and return
+type as well as information on the surrounding context, visibility,
+and linkage.
+
+@menu
+* Function Basics::     Function names, body, and parameters.
+* Function Properties:: Context, linkage, etc.
+@end menu
+
+@c ---------------------------------------------------------------------
+@c Function Basics
+@c ---------------------------------------------------------------------
+
+@node Function Basics
+@subsection Function Basics
+@findex DECL_NAME
+@findex DECL_ASSEMBLER_NAME
+@findex TREE_PUBLIC
+@findex DECL_ARTIFICIAL
+@findex DECL_FUNCTION_SPECIFIC_TARGET
+@findex DECL_FUNCTION_SPECIFIC_OPTIMIZATION
+
+A function has four core parts: the name, the parameters, the result,
+and the body.  The following macros and functions access these parts
+of a @code{FUNCTION_DECL} as well as other basic features:
+@ftable @code
+@item DECL_NAME
+This macro returns the unqualified name of the function, as an
+@code{IDENTIFIER_NODE}.  For an instantiation of a function template,
+the @code{DECL_NAME} is the unqualified name of the template, not
+something like @code{f<int>}.  The value of @code{DECL_NAME} is
+undefined when used on a constructor, destructor, overloaded operator,
+or type-conversion operator, or any function that is implicitly
+generated by the compiler.  See below for macros that can be used to
+distinguish these cases.
+
+@item DECL_ASSEMBLER_NAME
+This macro returns the mangled name of the function, also an
+@code{IDENTIFIER_NODE}.  This name does not contain leading underscores
+on systems that prefix all identifiers with underscores.  The mangled
+name is computed in the same way on all platforms; if special processing
+is required to deal with the object file format used on a particular
+platform, it is the responsibility of the back end to perform those
+modifications.  (Of course, the back end should not modify
+@code{DECL_ASSEMBLER_NAME} itself.)
+
+Using @code{DECL_ASSEMBLER_NAME} will cause additional memory to be
+allocated (for the mangled name of the entity) so it should be used
+only when emitting assembly code.  It should not be used within the
+optimizers to determine whether or not two declarations are the same,
+even though some of the existing optimizers do use it in that way.
+These uses will be removed over time.
+
+@item DECL_ARGUMENTS
+This macro returns the @code{PARM_DECL} for the first argument to the
+function.  Subsequent @code{PARM_DECL} nodes can be obtained by
+following the @code{TREE_CHAIN} links.
+
+@item DECL_RESULT
+This macro returns the @code{RESULT_DECL} for the function.
+
+@item DECL_SAVED_TREE
+This macro returns the complete body of the function.
+
+@item TREE_TYPE
+This macro returns the @code{FUNCTION_TYPE} or @code{METHOD_TYPE} for
+the function.
+
+@item DECL_INITIAL
+A function that has a definition in the current translation unit will
+have a non-@code{NULL} @code{DECL_INITIAL}.  However, back ends should not make
+use of the particular value given by @code{DECL_INITIAL}.
+
+It should contain a tree of @code{BLOCK} nodes that mirrors the scopes
+that variables are bound in the function.  Each block contains a list
+of decls declared in a basic block, a pointer to a chain of blocks at
+the next lower scope level, then a pointer to the next block at the
+same level and a backpointer to the parent @code{BLOCK} or
+@code{FUNCTION_DECL}.  So given a function as follows:
+
+@smallexample
+void foo()
+@{
+  int a;
+  @{
+    int b;
+  @}
+  int c;
+@}
+@end smallexample
+
+you would get the following:
+
+@smallexample
+tree foo = FUNCTION_DECL;
+tree decl_a = VAR_DECL;
+tree decl_b = VAR_DECL;
+tree decl_c = VAR_DECL;
+tree block_a = BLOCK;
+tree block_b = BLOCK;
+tree block_c = BLOCK;
+BLOCK_VARS(block_a) = decl_a;
+BLOCK_SUBBLOCKS(block_a) = block_b;
+BLOCK_CHAIN(block_a) = block_c;
+BLOCK_SUPERCONTEXT(block_a) = foo;
+BLOCK_VARS(block_b) = decl_b;
+BLOCK_SUPERCONTEXT(block_b) = block_a;
+BLOCK_VARS(block_c) = decl_c;
+BLOCK_SUPERCONTEXT(block_c) = foo;
+DECL_INITIAL(foo) = block_a;
+@end smallexample
+
+@end ftable
+
+@c ---------------------------------------------------------------------
+@c Function Properties
+@c ---------------------------------------------------------------------
+
+@node Function Properties
+@subsection Function Properties
+@cindex function properties
+@cindex statements
+
+To determine the scope of a function, you can use the
+@code{DECL_CONTEXT} macro.  This macro will return the class
+(either a @code{RECORD_TYPE} or a @code{UNION_TYPE}) or namespace (a
+@code{NAMESPACE_DECL}) of which the function is a member.  For a virtual
+function, this macro returns the class in which the function was
+actually defined, not the base class in which the virtual declaration
+occurred.
+
+In C, the @code{DECL_CONTEXT} for a function maybe another function.
+This representation indicates that the GNU nested function extension
+is in use.  For details on the semantics of nested functions, see the
+GCC Manual.  The nested function can refer to local variables in its
+containing function.  Such references are not explicitly marked in the
+tree structure; back ends must look at the @code{DECL_CONTEXT} for the
+referenced @code{VAR_DECL}.  If the @code{DECL_CONTEXT} for the
+referenced @code{VAR_DECL} is not the same as the function currently
+being processed, and neither @code{DECL_EXTERNAL} nor
+@code{TREE_STATIC} hold, then the reference is to a local variable in
+a containing function, and the back end must take appropriate action.
+
+@ftable @code
+@item DECL_EXTERNAL
+This predicate holds if the function is undefined.
+
+@item TREE_PUBLIC
+This predicate holds if the function has external linkage.
+
+@item TREE_STATIC
+This predicate holds if the function has been defined.
+
+@item TREE_THIS_VOLATILE
+This predicate holds if the function does not return normally.
+
+@item TREE_READONLY
+This predicate holds if the function can only read its arguments.
+
+@item DECL_PURE_P
+This predicate holds if the function can only read its arguments, but
+may also read global memory.
+
+@item DECL_VIRTUAL_P
+This predicate holds if the function is virtual.
+
+@item DECL_ARTIFICIAL
+This macro holds if the function was implicitly generated by the
+compiler, rather than explicitly declared.  In addition to implicitly
+generated class member functions, this macro holds for the special
+functions created to implement static initialization and destruction, to
+compute run-time type information, and so forth.
+
+@item DECL_FUNCTION_SPECIFIC_TARGET
+This macro returns a tree node that holds the target options that are
+to be used to compile this particular function or @code{NULL_TREE} if
+the function is to be compiled with the target options specified on
+the command line.
+
+@item DECL_FUNCTION_SPECIFIC_OPTIMIZATION
+This macro returns a tree node that holds the optimization options
+that are to be used to compile this particular function or
+@code{NULL_TREE} if the function is to be compiled with the
+optimization options specified on the command line.
+
+@end ftable
+
+@c ---------------------------------------------------------------------
+@c Language-dependent trees
+@c ---------------------------------------------------------------------
+
+@node Language-dependent trees
+@section Language-dependent trees
+@cindex language-dependent trees
+
+Front ends may wish to keep some state associated with various GENERIC
+trees while parsing.  To support this, trees provide a set of flags
+that may be used by the front end.  They are accessed using
+@code{TREE_LANG_FLAG_n} where @samp{n} is currently 0 through 6.
+
+If necessary, a front end can use some language-dependent tree
+codes in its GENERIC representation, so long as it provides a
+hook for converting them to GIMPLE and doesn't expect them to
+work with any (hypothetical) optimizers that run before the
+conversion to GIMPLE@. The intermediate representation used while
+parsing C and C++ looks very little like GENERIC, but the C and
+C++ gimplifier hooks are perfectly happy to take it as input and
+spit out GIMPLE@.
+
+
+
+@node C and C++ Trees
+@section C and C++ Trees
+
+This section documents the internal representation used by GCC to
+represent C and C++ source programs.  When presented with a C or C++
+source program, GCC parses the program, performs semantic analysis
+(including the generation of error messages), and then produces the
+internal representation described here.  This representation contains a
+complete representation for the entire translation unit provided as
+input to the front end.  This representation is then typically processed
+by a code-generator in order to produce machine code, but could also be
+used in the creation of source browsers, intelligent editors, automatic
+documentation generators, interpreters, and any other programs needing
+the ability to process C or C++ code.
+
+This section explains the internal representation.  In particular, it
+documents the internal representation for C and C++ source
+constructs, and the macros, functions, and variables that can be used to
+access these constructs.  The C++ representation is largely a superset
+of the representation used in the C front end.  There is only one
+construct used in C that does not appear in the C++ front end and that
+is the GNU ``nested function'' extension.  Many of the macros documented
+here do not apply in C because the corresponding language constructs do
+not appear in C@.
+
+The C and C++ front ends generate a mix of GENERIC trees and ones
+specific to C and C++.  These language-specific trees are higher-level
+constructs than the ones in GENERIC to make the parser's job easier.
+This section describes those trees that aren't part of GENERIC as well
+as aspects of GENERIC trees that are treated in a language-specific
+manner.
+
+If you are developing a ``back end'', be it is a code-generator or some
+other tool, that uses this representation, you may occasionally find
+that you need to ask questions not easily answered by the functions and
+macros available here.  If that situation occurs, it is quite likely
+that GCC already supports the functionality you desire, but that the
+interface is simply not documented here.  In that case, you should ask
+the GCC maintainers (via mail to @email{gcc@@gcc.gnu.org}) about
+documenting the functionality you require.  Similarly, if you find
+yourself writing functions that do not deal directly with your back end,
+but instead might be useful to other people using the GCC front end, you
+should submit your patches for inclusion in GCC@.
+
+@menu
+* Types for C++::               Fundamental and aggregate types.
+* Namespaces::                  Namespaces.
+* Classes::                     Classes.
+* Functions for C++::           Overloading and accessors for C++.
+* Statements for C++::          Statements specific to C and C++.
+* C++ Expressions::    From @code{typeid} to @code{throw}.
+@end menu
+
+@node Types for C++
+@subsection Types for C++
+@tindex UNKNOWN_TYPE
+@tindex TYPENAME_TYPE
+@tindex TYPEOF_TYPE
+@findex CP_TYPE_QUALS
+@findex TYPE_UNQUALIFIED
+@findex TYPE_QUAL_CONST
+@findex TYPE_QUAL_VOLATILE
+@findex TYPE_QUAL_RESTRICT
+@findex TYPE_MAIN_VARIANT
+@cindex qualified type
+@findex TYPE_SIZE
+@findex TYPE_ALIGN
+@findex TYPE_PRECISION
+@findex TYPE_ARG_TYPES
+@findex TYPE_METHOD_BASETYPE
+@findex TYPE_PTRMEM_P
+@findex TYPE_OFFSET_BASETYPE
+@findex TREE_TYPE
+@findex TYPE_CONTEXT
+@findex TYPE_NAME
+@findex TYPENAME_TYPE_FULLNAME
+@findex TYPE_FIELDS
+@findex TYPE_PTROBV_P
+
+In C++, an array type is not qualified; rather the type of the array
+elements is qualified.  This situation is reflected in the intermediate
+representation.  The macros described here will always examine the
+qualification of the underlying element type when applied to an array
+type.  (If the element type is itself an array, then the recursion
+continues until a non-array type is found, and the qualification of this
+type is examined.)  So, for example, @code{CP_TYPE_CONST_P} will hold of
+the type @code{const int ()[7]}, denoting an array of seven @code{int}s.
+
+The following functions and macros deal with cv-qualification of types:
+@ftable @code
+@item CP_TYPE_QUALS
+This macro returns the set of type qualifiers applied to this type.
+This value is @code{TYPE_UNQUALIFIED} if no qualifiers have been
+applied.  The @code{TYPE_QUAL_CONST} bit is set if the type is
+@code{const}-qualified.  The @code{TYPE_QUAL_VOLATILE} bit is set if the
+type is @code{volatile}-qualified.  The @code{TYPE_QUAL_RESTRICT} bit is
+set if the type is @code{restrict}-qualified.
+
+@item CP_TYPE_CONST_P
+This macro holds if the type is @code{const}-qualified.
+
+@item CP_TYPE_VOLATILE_P
+This macro holds if the type is @code{volatile}-qualified.
+
+@item CP_TYPE_RESTRICT_P
+This macro holds if the type is @code{restrict}-qualified.
+
+@item CP_TYPE_CONST_NON_VOLATILE_P
+This predicate holds for a type that is @code{const}-qualified, but
+@emph{not} @code{volatile}-qualified; other cv-qualifiers are ignored as
+well: only the @code{const}-ness is tested.
+
+@end ftable
+
+A few other macros and functions are usable with all types:
+@ftable @code
+@item TYPE_SIZE
+The number of bits required to represent the type, represented as an
+@code{INTEGER_CST}.  For an incomplete type, @code{TYPE_SIZE} will be
+@code{NULL_TREE}.
+
+@item TYPE_ALIGN
+The alignment of the type, in bits, represented as an @code{int}.
+
+@item TYPE_NAME
+This macro returns a declaration (in the form of a @code{TYPE_DECL}) for
+the type.  (Note this macro does @emph{not} return an
+@code{IDENTIFIER_NODE}, as you might expect, given its name!)  You can
+look at the @code{DECL_NAME} of the @code{TYPE_DECL} to obtain the
+actual name of the type.  The @code{TYPE_NAME} will be @code{NULL_TREE}
+for a type that is not a built-in type, the result of a typedef, or a
+named class type.
+
+@item CP_INTEGRAL_TYPE
+This predicate holds if the type is an integral type.  Notice that in
+C++, enumerations are @emph{not} integral types.
+
+@item ARITHMETIC_TYPE_P
+This predicate holds if the type is an integral type (in the C++ sense)
+or a floating point type.
+
+@item CLASS_TYPE_P
+This predicate holds for a class-type.
+
+@item TYPE_BUILT_IN
+This predicate holds for a built-in type.
+
+@item TYPE_PTRMEM_P
+This predicate holds if the type is a pointer to data member.
+
+@item TYPE_PTR_P
+This predicate holds if the type is a pointer type, and the pointee is
+not a data member.
+
+@item TYPE_PTRFN_P
+This predicate holds for a pointer to function type.
+
+@item TYPE_PTROB_P
+This predicate holds for a pointer to object type.  Note however that it
+does not hold for the generic pointer to object type @code{void *}.  You
+may use @code{TYPE_PTROBV_P} to test for a pointer to object type as
+well as @code{void *}.
+
+@end ftable
+
+The table below describes types specific to C and C++ as well as
+language-dependent info about GENERIC types.
+
+@table @code
+
+@item POINTER_TYPE
+Used to represent pointer types, and pointer to data member types.  If
+@code{TREE_TYPE} 
+is a pointer to data member type, then @code{TYPE_PTRMEM_P} will hold.
+For a pointer to data member type of the form @samp{T X::*},
+@code{TYPE_PTRMEM_CLASS_TYPE} will be the type @code{X}, while
+@code{TYPE_PTRMEM_POINTED_TO_TYPE} will be the type @code{T}.
+
+@item RECORD_TYPE
+Used to represent @code{struct} and @code{class} types in C and C++.  If
+@code{TYPE_PTRMEMFUNC_P} holds, then this type is a pointer-to-member
+type.  In that case, the @code{TYPE_PTRMEMFUNC_FN_TYPE} is a
+@code{POINTER_TYPE} pointing to a @code{METHOD_TYPE}.  The
+@code{METHOD_TYPE} is the type of a function pointed to by the
+pointer-to-member function.  If @code{TYPE_PTRMEMFUNC_P} does not hold,
+this type is a class type.  For more information, @pxref{Classes}.
+
+@item UNKNOWN_TYPE
+This node is used to represent a type the knowledge of which is
+insufficient for a sound processing.
+
+@item TYPENAME_TYPE
+Used to represent a construct of the form @code{typename T::A}.  The
+@code{TYPE_CONTEXT} is @code{T}; the @code{TYPE_NAME} is an
+@code{IDENTIFIER_NODE} for @code{A}.  If the type is specified via a
+template-id, then @code{TYPENAME_TYPE_FULLNAME} yields a
+@code{TEMPLATE_ID_EXPR}.  The @code{TREE_TYPE} is non-@code{NULL} if the
+node is implicitly generated in support for the implicit typename
+extension; in which case the @code{TREE_TYPE} is a type node for the
+base-class.
+
+@item TYPEOF_TYPE
+Used to represent the @code{__typeof__} extension.  The
+@code{TYPE_FIELDS} is the expression the type of which is being
+represented.
+
+@end table
+
+
+@c ---------------------------------------------------------------------
+@c Namespaces
+@c ---------------------------------------------------------------------
+
+@node Namespaces
+@subsection Namespaces
+@cindex namespace, scope
+@tindex NAMESPACE_DECL
+
+The root of the entire intermediate representation is the variable
+@code{global_namespace}.  This is the namespace specified with @code{::}
+in C++ source code.  All other namespaces, types, variables, functions,
+and so forth can be found starting with this namespace.
+
+However, except for the fact that it is distinguished as the root of the
+representation, the global namespace is no different from any other
+namespace.  Thus, in what follows, we describe namespaces generally,
+rather than the global namespace in particular.
+
+A namespace is represented by a @code{NAMESPACE_DECL} node.
+
+The following macros and functions can be used on a @code{NAMESPACE_DECL}:
+
+@ftable @code
+@item DECL_NAME
+This macro is used to obtain the @code{IDENTIFIER_NODE} corresponding to
+the unqualified name of the name of the namespace (@pxref{Identifiers}).
+The name of the global namespace is @samp{::}, even though in C++ the
+global namespace is unnamed.  However, you should use comparison with
+@code{global_namespace}, rather than @code{DECL_NAME} to determine
+whether or not a namespace is the global one.  An unnamed namespace
+will have a @code{DECL_NAME} equal to @code{anonymous_namespace_name}.
+Within a single translation unit, all unnamed namespaces will have the
+same name.
+
+@item DECL_CONTEXT
+This macro returns the enclosing namespace.  The @code{DECL_CONTEXT} for
+the @code{global_namespace} is @code{NULL_TREE}.
+
+@item DECL_NAMESPACE_ALIAS
+If this declaration is for a namespace alias, then
+@code{DECL_NAMESPACE_ALIAS} is the namespace for which this one is an
+alias.
+
+Do not attempt to use @code{cp_namespace_decls} for a namespace which is
+an alias.  Instead, follow @code{DECL_NAMESPACE_ALIAS} links until you
+reach an ordinary, non-alias, namespace, and call
+@code{cp_namespace_decls} there.
+
+@item DECL_NAMESPACE_STD_P
+This predicate holds if the namespace is the special @code{::std}
+namespace.
+
+@item cp_namespace_decls
+This function will return the declarations contained in the namespace,
+including types, overloaded functions, other namespaces, and so forth.
+If there are no declarations, this function will return
+@code{NULL_TREE}.  The declarations are connected through their
+@code{TREE_CHAIN} fields.
+
+Although most entries on this list will be declarations,
+@code{TREE_LIST} nodes may also appear.  In this case, the
+@code{TREE_VALUE} will be an @code{OVERLOAD}.  The value of the
+@code{TREE_PURPOSE} is unspecified; back ends should ignore this value.
+As with the other kinds of declarations returned by
+@code{cp_namespace_decls}, the @code{TREE_CHAIN} will point to the next
+declaration in this list.
+
+For more information on the kinds of declarations that can occur on this
+list, @xref{Declarations}.  Some declarations will not appear on this
+list.  In particular, no @code{FIELD_DECL}, @code{LABEL_DECL}, or
+@code{PARM_DECL} nodes will appear here.
+
+This function cannot be used with namespaces that have
+@code{DECL_NAMESPACE_ALIAS} set.
+
+@end ftable
+
+@c ---------------------------------------------------------------------
+@c Classes
+@c ---------------------------------------------------------------------
+
+@node Classes
+@subsection Classes
+@cindex class, scope
+@tindex RECORD_TYPE
+@tindex UNION_TYPE
+@findex CLASSTYPE_DECLARED_CLASS
+@findex TYPE_BINFO
+@findex BINFO_TYPE
+@findex TYPE_FIELDS
+@findex TYPE_VFIELD
+@findex TYPE_METHODS
+
+Besides namespaces, the other high-level scoping construct in C++ is the
+class.  (Throughout this manual the term @dfn{class} is used to mean the
+types referred to in the ANSI/ISO C++ Standard as classes; these include
+types defined with the @code{class}, @code{struct}, and @code{union}
+keywords.)
+
+A class type is represented by either a @code{RECORD_TYPE} or a
+@code{UNION_TYPE}.  A class declared with the @code{union} tag is
+represented by a @code{UNION_TYPE}, while classes declared with either
+the @code{struct} or the @code{class} tag are represented by
+@code{RECORD_TYPE}s.  You can use the @code{CLASSTYPE_DECLARED_CLASS}
+macro to discern whether or not a particular type is a @code{class} as
+opposed to a @code{struct}.  This macro will be true only for classes
+declared with the @code{class} tag.
+
+Almost all non-function members are available on the @code{TYPE_FIELDS}
+list.  Given one member, the next can be found by following the
+@code{TREE_CHAIN}.  You should not depend in any way on the order in
+which fields appear on this list.  All nodes on this list will be
+@samp{DECL} nodes.  A @code{FIELD_DECL} is used to represent a non-static
+data member, a @code{VAR_DECL} is used to represent a static data
+member, and a @code{TYPE_DECL} is used to represent a type.  Note that
+the @code{CONST_DECL} for an enumeration constant will appear on this
+list, if the enumeration type was declared in the class.  (Of course,
+the @code{TYPE_DECL} for the enumeration type will appear here as well.)
+There are no entries for base classes on this list.  In particular,
+there is no @code{FIELD_DECL} for the ``base-class portion'' of an
+object.
+
+The @code{TYPE_VFIELD} is a compiler-generated field used to point to
+virtual function tables.  It may or may not appear on the
+@code{TYPE_FIELDS} list.  However, back ends should handle the
+@code{TYPE_VFIELD} just like all the entries on the @code{TYPE_FIELDS}
+list.
+
+The function members are available on the @code{TYPE_METHODS} list.
+Again, subsequent members are found by following the @code{TREE_CHAIN}
+field.  If a function is overloaded, each of the overloaded functions
+appears; no @code{OVERLOAD} nodes appear on the @code{TYPE_METHODS}
+list.  Implicitly declared functions (including default constructors,
+copy constructors, assignment operators, and destructors) will appear on
+this list as well.
+
+Every class has an associated @dfn{binfo}, which can be obtained with
+@code{TYPE_BINFO}.  Binfos are used to represent base-classes.  The
+binfo given by @code{TYPE_BINFO} is the degenerate case, whereby every
+class is considered to be its own base-class.  The base binfos for a
+particular binfo are held in a vector, whose length is obtained with
+@code{BINFO_N_BASE_BINFOS}.  The base binfos themselves are obtained
+with @code{BINFO_BASE_BINFO} and @code{BINFO_BASE_ITERATE}.  To add a
+new binfo, use @code{BINFO_BASE_APPEND}.  The vector of base binfos can
+be obtained with @code{BINFO_BASE_BINFOS}, but normally you do not need
+to use that.  The class type associated with a binfo is given by
+@code{BINFO_TYPE}.  It is not always the case that @code{BINFO_TYPE
+(TYPE_BINFO (x))}, because of typedefs and qualified types.  Neither is
+it the case that @code{TYPE_BINFO (BINFO_TYPE (y))} is the same binfo as
+@code{y}.  The reason is that if @code{y} is a binfo representing a
+base-class @code{B} of a derived class @code{D}, then @code{BINFO_TYPE
+(y)} will be @code{B}, and @code{TYPE_BINFO (BINFO_TYPE (y))} will be
+@code{B} as its own base-class, rather than as a base-class of @code{D}.
+
+The access to a base type can be found with @code{BINFO_BASE_ACCESS}.
+This will produce @code{access_public_node}, @code{access_private_node}
+or @code{access_protected_node}.  If bases are always public,
+@code{BINFO_BASE_ACCESSES} may be @code{NULL}.
+
+@code{BINFO_VIRTUAL_P} is used to specify whether the binfo is inherited
+virtually or not.  The other flags, @code{BINFO_MARKED_P} and
+@code{BINFO_FLAG_1} to @code{BINFO_FLAG_6} can be used for language
+specific use.
+
+The following macros can be used on a tree node representing a class-type.
+
+@ftable @code
+@item LOCAL_CLASS_P
+This predicate holds if the class is local class @emph{i.e.}@: declared
+inside a function body.
+
+@item TYPE_POLYMORPHIC_P
+This predicate holds if the class has at least one virtual function
+(declared or inherited).
+
+@item TYPE_HAS_DEFAULT_CONSTRUCTOR
+This predicate holds whenever its argument represents a class-type with
+default constructor.
+
+@item CLASSTYPE_HAS_MUTABLE
+@itemx TYPE_HAS_MUTABLE_P
+These predicates hold for a class-type having a mutable data member.
+
+@item CLASSTYPE_NON_POD_P
+This predicate holds only for class-types that are not PODs.
+
+@item TYPE_HAS_NEW_OPERATOR
+This predicate holds for a class-type that defines
+@code{operator new}.
+
+@item TYPE_HAS_ARRAY_NEW_OPERATOR
+This predicate holds for a class-type for which
+@code{operator new[]} is defined.
+
+@item TYPE_OVERLOADS_CALL_EXPR
+This predicate holds for class-type for which the function call
+@code{operator()} is overloaded.
+
+@item TYPE_OVERLOADS_ARRAY_REF
+This predicate holds for a class-type that overloads
+@code{operator[]}
+
+@item TYPE_OVERLOADS_ARROW
+This predicate holds for a class-type for which @code{operator->} is
+overloaded.
+
+@end ftable
+
+@node Functions for C++
+@subsection Functions for C++
+@cindex function
+@tindex FUNCTION_DECL
+@tindex OVERLOAD
+@findex OVL_CURRENT
+@findex OVL_NEXT
+
+A function is represented by a @code{FUNCTION_DECL} node.  A set of
+overloaded functions is sometimes represented by an @code{OVERLOAD} node.
+
+An @code{OVERLOAD} node is not a declaration, so none of the
+@samp{DECL_} macros should be used on an @code{OVERLOAD}.  An
+@code{OVERLOAD} node is similar to a @code{TREE_LIST}.  Use
+@code{OVL_CURRENT} to get the function associated with an
+@code{OVERLOAD} node; use @code{OVL_NEXT} to get the next
+@code{OVERLOAD} node in the list of overloaded functions.  The macros
+@code{OVL_CURRENT} and @code{OVL_NEXT} are actually polymorphic; you can
+use them to work with @code{FUNCTION_DECL} nodes as well as with
+overloads.  In the case of a @code{FUNCTION_DECL}, @code{OVL_CURRENT}
+will always return the function itself, and @code{OVL_NEXT} will always
+be @code{NULL_TREE}.
+
+To determine the scope of a function, you can use the
+@code{DECL_CONTEXT} macro.  This macro will return the class
+(either a @code{RECORD_TYPE} or a @code{UNION_TYPE}) or namespace (a
+@code{NAMESPACE_DECL}) of which the function is a member.  For a virtual
+function, this macro returns the class in which the function was
+actually defined, not the base class in which the virtual declaration
+occurred.
+
+If a friend function is defined in a class scope, the
+@code{DECL_FRIEND_CONTEXT} macro can be used to determine the class in
+which it was defined.  For example, in
+@smallexample
+class C @{ friend void f() @{@} @};
+@end smallexample
+@noindent
+the @code{DECL_CONTEXT} for @code{f} will be the
+@code{global_namespace}, but the @code{DECL_FRIEND_CONTEXT} will be the
+@code{RECORD_TYPE} for @code{C}.
+
+
+The following macros and functions can be used on a @code{FUNCTION_DECL}:
+@ftable @code
+@item DECL_MAIN_P
+This predicate holds for a function that is the program entry point
+@code{::code}.
+
+@item DECL_LOCAL_FUNCTION_P
+This predicate holds if the function was declared at block scope, even
+though it has a global scope.
+
+@item DECL_ANTICIPATED
+This predicate holds if the function is a built-in function but its
+prototype is not yet explicitly declared.
+
+@item DECL_EXTERN_C_FUNCTION_P
+This predicate holds if the function is declared as an
+`@code{extern "C"}' function.
+
+@item DECL_LINKONCE_P
+This macro holds if multiple copies of this function may be emitted in
+various translation units.  It is the responsibility of the linker to
+merge the various copies.  Template instantiations are the most common
+example of functions for which @code{DECL_LINKONCE_P} holds; G++
+instantiates needed templates in all translation units which require them,
+and then relies on the linker to remove duplicate instantiations.
+
+FIXME: This macro is not yet implemented.
+
+@item DECL_FUNCTION_MEMBER_P
+This macro holds if the function is a member of a class, rather than a
+member of a namespace.
+
+@item DECL_STATIC_FUNCTION_P
+This predicate holds if the function a static member function.
+
+@item DECL_NONSTATIC_MEMBER_FUNCTION_P
+This macro holds for a non-static member function.
+
+@item DECL_CONST_MEMFUNC_P
+This predicate holds for a @code{const}-member function.
+
+@item DECL_VOLATILE_MEMFUNC_P
+This predicate holds for a @code{volatile}-member function.
+
+@item DECL_CONSTRUCTOR_P
+This macro holds if the function is a constructor.
+
+@item DECL_NONCONVERTING_P
+This predicate holds if the constructor is a non-converting constructor.
+
+@item DECL_COMPLETE_CONSTRUCTOR_P
+This predicate holds for a function which is a constructor for an object
+of a complete type.
+
+@item DECL_BASE_CONSTRUCTOR_P
+This predicate holds for a function which is a constructor for a base
+class sub-object.
+
+@item DECL_COPY_CONSTRUCTOR_P
+This predicate holds for a function which is a copy-constructor.
+
+@item DECL_DESTRUCTOR_P
+This macro holds if the function is a destructor.
+
+@item DECL_COMPLETE_DESTRUCTOR_P
+This predicate holds if the function is the destructor for an object a
+complete type.
+
+@item DECL_OVERLOADED_OPERATOR_P
+This macro holds if the function is an overloaded operator.
+
+@item DECL_CONV_FN_P
+This macro holds if the function is a type-conversion operator.
+
+@item DECL_GLOBAL_CTOR_P
+This predicate holds if the function is a file-scope initialization
+function.
+
+@item DECL_GLOBAL_DTOR_P
+This predicate holds if the function is a file-scope finalization
+function.
+
+@item DECL_THUNK_P
+This predicate holds if the function is a thunk.
+
+These functions represent stub code that adjusts the @code{this} pointer
+and then jumps to another function.  When the jumped-to function
+returns, control is transferred directly to the caller, without
+returning to the thunk.  The first parameter to the thunk is always the
+@code{this} pointer; the thunk should add @code{THUNK_DELTA} to this
+value.  (The @code{THUNK_DELTA} is an @code{int}, not an
+@code{INTEGER_CST}.)
+
+Then, if @code{THUNK_VCALL_OFFSET} (an @code{INTEGER_CST}) is nonzero
+the adjusted @code{this} pointer must be adjusted again.  The complete
+calculation is given by the following pseudo-code:
+
+@smallexample
+this += THUNK_DELTA
+if (THUNK_VCALL_OFFSET)
+  this += (*((ptrdiff_t **) this))[THUNK_VCALL_OFFSET]
+@end smallexample
+
+Finally, the thunk should jump to the location given
+by @code{DECL_INITIAL}; this will always be an expression for the
+address of a function.
+
+@item DECL_NON_THUNK_FUNCTION_P
+This predicate holds if the function is @emph{not} a thunk function.
+
+@item GLOBAL_INIT_PRIORITY
+If either @code{DECL_GLOBAL_CTOR_P} or @code{DECL_GLOBAL_DTOR_P} holds,
+then this gives the initialization priority for the function.  The
+linker will arrange that all functions for which
+@code{DECL_GLOBAL_CTOR_P} holds are run in increasing order of priority
+before @code{main} is called.  When the program exits, all functions for
+which @code{DECL_GLOBAL_DTOR_P} holds are run in the reverse order.
+
+@item TYPE_RAISES_EXCEPTIONS
+This macro returns the list of exceptions that a (member-)function can
+raise.  The returned list, if non @code{NULL}, is comprised of nodes
+whose @code{TREE_VALUE} represents a type.
+
+@item TYPE_NOTHROW_P
+This predicate holds when the exception-specification of its arguments
+is of the form `@code{()}'.
+
+@item DECL_ARRAY_DELETE_OPERATOR_P
+This predicate holds if the function an overloaded
+@code{operator delete[]}.
+
+@end ftable
+
+@c ---------------------------------------------------------------------
+@c Function Bodies
+@c ---------------------------------------------------------------------
+
+@node Statements for C++
+@subsection Statements for C++
+@cindex statements
+@tindex BREAK_STMT
+@tindex CLEANUP_STMT
+@findex CLEANUP_DECL
+@findex CLEANUP_EXPR
+@tindex CONTINUE_STMT
+@tindex DECL_STMT
+@findex DECL_STMT_DECL
+@tindex DO_STMT
+@findex DO_BODY
+@findex DO_COND
+@tindex EMPTY_CLASS_EXPR
+@tindex EXPR_STMT
+@findex EXPR_STMT_EXPR
+@tindex FOR_STMT
+@findex FOR_INIT_STMT
+@findex FOR_COND
+@findex FOR_EXPR
+@findex FOR_BODY
+@tindex HANDLER
+@tindex IF_STMT
+@findex IF_COND
+@findex THEN_CLAUSE
+@findex ELSE_CLAUSE
+@tindex RETURN_STMT
+@findex RETURN_EXPR
+@tindex SUBOBJECT
+@findex SUBOBJECT_CLEANUP
+@tindex SWITCH_STMT
+@findex SWITCH_COND
+@findex SWITCH_BODY
+@tindex TRY_BLOCK
+@findex TRY_STMTS
+@findex TRY_HANDLERS
+@findex HANDLER_PARMS
+@findex HANDLER_BODY
+@findex USING_STMT
+@tindex WHILE_STMT
+@findex WHILE_BODY
+@findex WHILE_COND
+
+A function that has a definition in the current translation unit will
+have a non-@code{NULL} @code{DECL_INITIAL}.  However, back ends should not make
+use of the particular value given by @code{DECL_INITIAL}.
+
+The @code{DECL_SAVED_TREE} macro will give the complete body of the
+function.
+
+@subsubsection Statements
+
+There are tree nodes corresponding to all of the source-level
+statement constructs, used within the C and C++ frontends.  These are
+enumerated here, together with a list of the various macros that can
+be used to obtain information about them.  There are a few macros that
+can be used with all statements:
+
+@ftable @code
+@item STMT_IS_FULL_EXPR_P
+In C++, statements normally constitute ``full expressions''; temporaries
+created during a statement are destroyed when the statement is complete.
+However, G++ sometimes represents expressions by statements; these
+statements will not have @code{STMT_IS_FULL_EXPR_P} set.  Temporaries
+created during such statements should be destroyed when the innermost
+enclosing statement with @code{STMT_IS_FULL_EXPR_P} set is exited.
+
+@end ftable
+
+Here is the list of the various statement nodes, and the macros used to
+access them.  This documentation describes the use of these nodes in
+non-template functions (including instantiations of template functions).
+In template functions, the same nodes are used, but sometimes in
+slightly different ways.
+
+Many of the statements have substatements.  For example, a @code{while}
+loop will have a body, which is itself a statement.  If the substatement
+is @code{NULL_TREE}, it is considered equivalent to a statement
+consisting of a single @code{;}, i.e., an expression statement in which
+the expression has been omitted.  A substatement may in fact be a list
+of statements, connected via their @code{TREE_CHAIN}s.  So, you should
+always process the statement tree by looping over substatements, like
+this:
+@smallexample
+void process_stmt (stmt)
+     tree stmt;
+@{
+  while (stmt)
+    @{
+      switch (TREE_CODE (stmt))
+        @{
+        case IF_STMT:
+          process_stmt (THEN_CLAUSE (stmt));
+          /* @r{More processing here.}  */
+          break;
+
+        @dots{}
+        @}
+
+      stmt = TREE_CHAIN (stmt);
+    @}
+@}
+@end smallexample
+In other words, while the @code{then} clause of an @code{if} statement
+in C++ can be only one statement (although that one statement may be a
+compound statement), the intermediate representation will sometimes use
+several statements chained together.
+
+@table @code
+@item BREAK_STMT
+
+Used to represent a @code{break} statement.  There are no additional
+fields.
+
+@item CLEANUP_STMT
+
+Used to represent an action that should take place upon exit from the
+enclosing scope.  Typically, these actions are calls to destructors for
+local objects, but back ends cannot rely on this fact.  If these nodes
+are in fact representing such destructors, @code{CLEANUP_DECL} will be
+the @code{VAR_DECL} destroyed.  Otherwise, @code{CLEANUP_DECL} will be
+@code{NULL_TREE}.  In any case, the @code{CLEANUP_EXPR} is the
+expression to execute.  The cleanups executed on exit from a scope
+should be run in the reverse order of the order in which the associated
+@code{CLEANUP_STMT}s were encountered.
+
+@item CONTINUE_STMT
+
+Used to represent a @code{continue} statement.  There are no additional
+fields.
+
+@item CTOR_STMT
+
+Used to mark the beginning (if @code{CTOR_BEGIN_P} holds) or end (if
+@code{CTOR_END_P} holds of the main body of a constructor.  See also
+@code{SUBOBJECT} for more information on how to use these nodes.
+
+@item DO_STMT
+
+Used to represent a @code{do} loop.  The body of the loop is given by
+@code{DO_BODY} while the termination condition for the loop is given by
+@code{DO_COND}.  The condition for a @code{do}-statement is always an
+expression.
+
+@item EMPTY_CLASS_EXPR
+
+Used to represent a temporary object of a class with no data whose
+address is never taken.  (All such objects are interchangeable.)  The
+@code{TREE_TYPE} represents the type of the object.
+
+@item EXPR_STMT
+
+Used to represent an expression statement.  Use @code{EXPR_STMT_EXPR} to
+obtain the expression.
+
+@item FOR_STMT
+
+Used to represent a @code{for} statement.  The @code{FOR_INIT_STMT} is
+the initialization statement for the loop.  The @code{FOR_COND} is the
+termination condition.  The @code{FOR_EXPR} is the expression executed
+right before the @code{FOR_COND} on each loop iteration; often, this
+expression increments a counter.  The body of the loop is given by
+@code{FOR_BODY}.  Note that @code{FOR_INIT_STMT} and @code{FOR_BODY}
+return statements, while @code{FOR_COND} and @code{FOR_EXPR} return
+expressions.
+
+@item HANDLER
+
+Used to represent a C++ @code{catch} block.  The @code{HANDLER_TYPE}
+is the type of exception that will be caught by this handler; it is
+equal (by pointer equality) to @code{NULL} if this handler is for all
+types.  @code{HANDLER_PARMS} is the @code{DECL_STMT} for the catch
+parameter, and @code{HANDLER_BODY} is the code for the block itself.
+
+@item IF_STMT
+
+Used to represent an @code{if} statement.  The @code{IF_COND} is the
+expression.
+
+If the condition is a @code{TREE_LIST}, then the @code{TREE_PURPOSE} is
+a statement (usually a @code{DECL_STMT}).  Each time the condition is
+evaluated, the statement should be executed.  Then, the
+@code{TREE_VALUE} should be used as the conditional expression itself.
+This representation is used to handle C++ code like this:
+
+C++ distinguishes between this and @code{COND_EXPR} for handling templates.
+
+@smallexample
+if (int i = 7) @dots{}
+@end smallexample
+
+where there is a new local variable (or variables) declared within the
+condition.
+
+The @code{THEN_CLAUSE} represents the statement given by the @code{then}
+condition, while the @code{ELSE_CLAUSE} represents the statement given
+by the @code{else} condition.
+
+@item SUBOBJECT
+
+In a constructor, these nodes are used to mark the point at which a
+subobject of @code{this} is fully constructed.  If, after this point, an
+exception is thrown before a @code{CTOR_STMT} with @code{CTOR_END_P} set
+is encountered, the @code{SUBOBJECT_CLEANUP} must be executed.  The
+cleanups must be executed in the reverse order in which they appear.
+
+@item SWITCH_STMT
+
+Used to represent a @code{switch} statement.  The @code{SWITCH_STMT_COND}
+is the expression on which the switch is occurring.  See the documentation
+for an @code{IF_STMT} for more information on the representation used
+for the condition.  The @code{SWITCH_STMT_BODY} is the body of the switch
+statement.   The @code{SWITCH_STMT_TYPE} is the original type of switch
+expression as given in the source, before any compiler conversions.
+
+@item TRY_BLOCK
+Used to represent a @code{try} block.  The body of the try block is
+given by @code{TRY_STMTS}.  Each of the catch blocks is a @code{HANDLER}
+node.  The first handler is given by @code{TRY_HANDLERS}.  Subsequent
+handlers are obtained by following the @code{TREE_CHAIN} link from one
+handler to the next.  The body of the handler is given by
+@code{HANDLER_BODY}.
+
+If @code{CLEANUP_P} holds of the @code{TRY_BLOCK}, then the
+@code{TRY_HANDLERS} will not be a @code{HANDLER} node.  Instead, it will
+be an expression that should be executed if an exception is thrown in
+the try block.  It must rethrow the exception after executing that code.
+And, if an exception is thrown while the expression is executing,
+@code{terminate} must be called.
+
+@item USING_STMT
+Used to represent a @code{using} directive.  The namespace is given by
+@code{USING_STMT_NAMESPACE}, which will be a NAMESPACE_DECL@.  This node
+is needed inside template functions, to implement using directives
+during instantiation.
+
+@item WHILE_STMT
+
+Used to represent a @code{while} loop.  The @code{WHILE_COND} is the
+termination condition for the loop.  See the documentation for an
+@code{IF_STMT} for more information on the representation used for the
+condition.
+
+The @code{WHILE_BODY} is the body of the loop.
+
+@end table
+
+@node C++ Expressions
+@subsection C++ Expressions
+
+This section describes expressions specific to the C and C++ front
+ends.
+
+@table @code
+@item TYPEID_EXPR
+
+Used to represent a @code{typeid} expression.
+
+@item NEW_EXPR
+@itemx VEC_NEW_EXPR
+
+Used to represent a call to @code{new} and @code{new[]} respectively.
+
+@item DELETE_EXPR
+@itemx VEC_DELETE_EXPR
+
+Used to represent a call to @code{delete} and @code{delete[]} respectively.
+
+@item MEMBER_REF
+
+Represents a reference to a member of a class.
+
+@item THROW_EXPR
+
+Represents an instance of @code{throw} in the program.  Operand 0,
+which is the expression to throw, may be @code{NULL_TREE}.
+
+
+@item AGGR_INIT_EXPR
+An @code{AGGR_INIT_EXPR} represents the initialization as the return
+value of a function call, or as the result of a constructor.  An
+@code{AGGR_INIT_EXPR} will only appear as a full-expression, or as the
+second operand of a @code{TARGET_EXPR}.  @code{AGGR_INIT_EXPR}s have
+a representation similar to that of @code{CALL_EXPR}s.  You can use
+the @code{AGGR_INIT_EXPR_FN} and @code{AGGR_INIT_EXPR_ARG} macros to access
+the function to call and the arguments to pass.
+
+If @code{AGGR_INIT_VIA_CTOR_P} holds of the @code{AGGR_INIT_EXPR}, then
+the initialization is via a constructor call.  The address of the
+@code{AGGR_INIT_EXPR_SLOT} operand, which is always a @code{VAR_DECL},
+is taken, and this value replaces the first argument in the argument
+list.
+
+In either case, the expression is void.
+
+
+@end table
+
+
+@node Java Trees
+@section Java Trees
diff --git a/gcc/doc/gfdl.7 b/gcc/doc/gfdl.7
new file mode 100644
index 000000000..f2e51a976
--- /dev/null
+++ b/gcc/doc/gfdl.7
@@ -0,0 +1,637 @@
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+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GFDL 7"
+.TH GFDL 7 "2013-04-12" "gcc-4.6.4" "GNU"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+gfdl \- GNU Free Documentation License
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+.SS "\s-1GNU\s0 Free Documentation License"
+.IX Subsection "GNU Free Documentation License"
+.SS "Version 1.3, 3 November 2008"
+.IX Subsection "Version 1.3, 3 November 2008"
+.Vb 2
+\&        Copyright (c) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
+\&        E<lt>B<http://fsf.org/>E<gt>
+\&        
+\&        Everyone is permitted to copy and distribute verbatim copies
+\&        of this license document, but changing it is not allowed.
+.Ve
+.IP "0." 4
+.IX Item "0."
+\&\s-1PREAMBLE\s0
+.Sp
+The purpose of this License is to make a manual, textbook, or other
+functional and useful document \fIfree\fR in the sense of freedom: to
+assure everyone the effective freedom to copy and redistribute it,
+with or without modifying it, either commercially or noncommercially.
+Secondarily, this License preserves for the author and publisher a way
+to get credit for their work, while not being considered responsible
+for modifications made by others.
+.Sp
+This License is a kind of \*(L"copyleft\*(R", which means that derivative
+works of the document must themselves be free in the same sense.  It
+complements the \s-1GNU\s0 General Public License, which is a copyleft
+license designed for free software.
+.Sp
+We have designed this License in order to use it for manuals for free
+software, because free software needs free documentation: a free
+program should come with manuals providing the same freedoms that the
+software does.  But this License is not limited to software manuals;
+it can be used for any textual work, regardless of subject matter or
+whether it is published as a printed book.  We recommend this License
+principally for works whose purpose is instruction or reference.
+.IP "1." 4
+.IX Item "1."
+\&\s-1APPLICABILITY\s0 \s-1AND\s0 \s-1DEFINITIONS\s0
+.Sp
+This License applies to any manual or other work, in any medium, that
+contains a notice placed by the copyright holder saying it can be
+distributed under the terms of this License.  Such a notice grants a
+world-wide, royalty-free license, unlimited in duration, to use that
+work under the conditions stated herein.  The \*(L"Document\*(R", below,
+refers to any such manual or work.  Any member of the public is a
+licensee, and is addressed as \*(L"you\*(R".  You accept the license if you
+copy, modify or distribute the work in a way requiring permission
+under copyright law.
+.Sp
+A \*(L"Modified Version\*(R" of the Document means any work containing the
+Document or a portion of it, either copied verbatim, or with
+modifications and/or translated into another language.
+.Sp
+A \*(L"Secondary Section\*(R" is a named appendix or a front-matter section
+of the Document that deals exclusively with the relationship of the
+publishers or authors of the Document to the Document's overall
+subject (or to related matters) and contains nothing that could fall
+directly within that overall subject.  (Thus, if the Document is in
+part a textbook of mathematics, a Secondary Section may not explain
+any mathematics.)  The relationship could be a matter of historical
+connection with the subject or with related matters, or of legal,
+commercial, philosophical, ethical or political position regarding
+them.
+.Sp
+The \*(L"Invariant Sections\*(R" are certain Secondary Sections whose titles
+are designated, as being those of Invariant Sections, in the notice
+that says that the Document is released under this License.  If a
+section does not fit the above definition of Secondary then it is not
+allowed to be designated as Invariant.  The Document may contain zero
+Invariant Sections.  If the Document does not identify any Invariant
+Sections then there are none.
+.Sp
+The \*(L"Cover Texts\*(R" are certain short passages of text that are listed,
+as Front-Cover Texts or Back-Cover Texts, in the notice that says that
+the Document is released under this License.  A Front-Cover Text may
+be at most 5 words, and a Back-Cover Text may be at most 25 words.
+.Sp
+A \*(L"Transparent\*(R" copy of the Document means a machine-readable copy,
+represented in a format whose specification is available to the
+general public, that is suitable for revising the document
+straightforwardly with generic text editors or (for images composed of
+pixels) generic paint programs or (for drawings) some widely available
+drawing editor, and that is suitable for input to text formatters or
+for automatic translation to a variety of formats suitable for input
+to text formatters.  A copy made in an otherwise Transparent file
+format whose markup, or absence of markup, has been arranged to thwart
+or discourage subsequent modification by readers is not Transparent.
+An image format is not Transparent if used for any substantial amount
+of text.  A copy that is not \*(L"Transparent\*(R" is called \*(L"Opaque\*(R".
+.Sp
+Examples of suitable formats for Transparent copies include plain
+\&\s-1ASCII\s0 without markup, Texinfo input format, LaTeX input
+format, \s-1SGML\s0 or \s-1XML\s0 using a publicly available
+\&\s-1DTD\s0, and standard-conforming simple \s-1HTML\s0,
+PostScript or \s-1PDF\s0 designed for human modification.  Examples
+of transparent image formats include \s-1PNG\s0, \s-1XCF\s0 and
+\&\s-1JPG\s0.  Opaque formats include proprietary formats that can be
+read and edited only by proprietary word processors, \s-1SGML\s0 or
+\&\s-1XML\s0 for which the \s-1DTD\s0 and/or processing tools are
+not generally available, and the machine-generated \s-1HTML\s0,
+PostScript or \s-1PDF\s0 produced by some word processors for
+output purposes only.
+.Sp
+The \*(L"Title Page\*(R" means, for a printed book, the title page itself,
+plus such following pages as are needed to hold, legibly, the material
+this License requires to appear in the title page.  For works in
+formats which do not have any title page as such, \*(L"Title Page\*(R" means
+the text near the most prominent appearance of the work's title,
+preceding the beginning of the body of the text.
+.Sp
+The \*(L"publisher\*(R" means any person or entity that distributes copies
+of the Document to the public.
+.Sp
+A section \*(L"Entitled \s-1XYZ\s0\*(R" means a named subunit of the Document whose
+title either is precisely \s-1XYZ\s0 or contains \s-1XYZ\s0 in parentheses following
+text that translates \s-1XYZ\s0 in another language.  (Here \s-1XYZ\s0 stands for a
+specific section name mentioned below, such as \*(L"Acknowledgements\*(R",
+\&\*(L"Dedications\*(R", \*(L"Endorsements\*(R", or \*(L"History\*(R".)  To \*(L"Preserve the Title\*(R"
+of such a section when you modify the Document means that it remains a
+section \*(L"Entitled \s-1XYZ\s0\*(R" according to this definition.
+.Sp
+The Document may include Warranty Disclaimers next to the notice which
+states that this License applies to the Document.  These Warranty
+Disclaimers are considered to be included by reference in this
+License, but only as regards disclaiming warranties: any other
+implication that these Warranty Disclaimers may have is void and has
+no effect on the meaning of this License.
+.IP "2." 4
+.IX Item "2."
+\&\s-1VERBATIM\s0 \s-1COPYING\s0
+.Sp
+You may copy and distribute the Document in any medium, either
+commercially or noncommercially, provided that this License, the
+copyright notices, and the license notice saying this License applies
+to the Document are reproduced in all copies, and that you add no other
+conditions whatsoever to those of this License.  You may not use
+technical measures to obstruct or control the reading or further
+copying of the copies you make or distribute.  However, you may accept
+compensation in exchange for copies.  If you distribute a large enough
+number of copies you must also follow the conditions in section 3.
+.Sp
+You may also lend copies, under the same conditions stated above, and
+you may publicly display copies.
+.IP "3." 4
+.IX Item "3."
+\&\s-1COPYING\s0 \s-1IN\s0 \s-1QUANTITY\s0
+.Sp
+If you publish printed copies (or copies in media that commonly have
+printed covers) of the Document, numbering more than 100, and the
+Document's license notice requires Cover Texts, you must enclose the
+copies in covers that carry, clearly and legibly, all these Cover
+Texts: Front-Cover Texts on the front cover, and Back-Cover Texts on
+the back cover.  Both covers must also clearly and legibly identify
+you as the publisher of these copies.  The front cover must present
+the full title with all words of the title equally prominent and
+visible.  You may add other material on the covers in addition.
+Copying with changes limited to the covers, as long as they preserve
+the title of the Document and satisfy these conditions, can be treated
+as verbatim copying in other respects.
+.Sp
+If the required texts for either cover are too voluminous to fit
+legibly, you should put the first ones listed (as many as fit
+reasonably) on the actual cover, and continue the rest onto adjacent
+pages.
+.Sp
+If you publish or distribute Opaque copies of the Document numbering
+more than 100, you must either include a machine-readable Transparent
+copy along with each Opaque copy, or state in or with each Opaque copy
+a computer-network location from which the general network-using
+public has access to download using public-standard network protocols
+a complete Transparent copy of the Document, free of added material.
+If you use the latter option, you must take reasonably prudent steps,
+when you begin distribution of Opaque copies in quantity, to ensure
+that this Transparent copy will remain thus accessible at the stated
+location until at least one year after the last time you distribute an
+Opaque copy (directly or through your agents or retailers) of that
+edition to the public.
+.Sp
+It is requested, but not required, that you contact the authors of the
+Document well before redistributing any large number of copies, to give
+them a chance to provide you with an updated version of the Document.
+.IP "4." 4
+.IX Item "4."
+\&\s-1MODIFICATIONS\s0
+.Sp
+You may copy and distribute a Modified Version of the Document under
+the conditions of sections 2 and 3 above, provided that you release
+the Modified Version under precisely this License, with the Modified
+Version filling the role of the Document, thus licensing distribution
+and modification of the Modified Version to whoever possesses a copy
+of it.  In addition, you must do these things in the Modified Version:
+.RS 4
+.IP "A." 4
+.IX Item "A."
+Use in the Title Page (and on the covers, if any) a title distinct
+from that of the Document, and from those of previous versions
+(which should, if there were any, be listed in the History section
+of the Document).  You may use the same title as a previous version
+if the original publisher of that version gives permission.
+.IP "B." 4
+.IX Item "B."
+List on the Title Page, as authors, one or more persons or entities
+responsible for authorship of the modifications in the Modified
+Version, together with at least five of the principal authors of the
+Document (all of its principal authors, if it has fewer than five),
+unless they release you from this requirement.
+.IP "C." 4
+.IX Item "C."
+State on the Title page the name of the publisher of the
+Modified Version, as the publisher.
+.IP "D." 4
+.IX Item "D."
+Preserve all the copyright notices of the Document.
+.IP "E." 4
+.IX Item "E."
+Add an appropriate copyright notice for your modifications
+adjacent to the other copyright notices.
+.IP "F." 4
+.IX Item "F."
+Include, immediately after the copyright notices, a license notice
+giving the public permission to use the Modified Version under the
+terms of this License, in the form shown in the Addendum below.
+.IP "G." 4
+.IX Item "G."
+Preserve in that license notice the full lists of Invariant Sections
+and required Cover Texts given in the Document's license notice.
+.IP "H." 4
+.IX Item "H."
+Include an unaltered copy of this License.
+.IP "I." 4
+.IX Item "I."
+Preserve the section Entitled \*(L"History\*(R", Preserve its Title, and add
+to it an item stating at least the title, year, new authors, and
+publisher of the Modified Version as given on the Title Page.  If
+there is no section Entitled \*(L"History\*(R" in the Document, create one
+stating the title, year, authors, and publisher of the Document as
+given on its Title Page, then add an item describing the Modified
+Version as stated in the previous sentence.
+.IP "J." 4
+.IX Item "J."
+Preserve the network location, if any, given in the Document for
+public access to a Transparent copy of the Document, and likewise
+the network locations given in the Document for previous versions
+it was based on.  These may be placed in the \*(L"History\*(R" section.
+You may omit a network location for a work that was published at
+least four years before the Document itself, or if the original
+publisher of the version it refers to gives permission.
+.IP "K." 4
+.IX Item "K."
+For any section Entitled \*(L"Acknowledgements\*(R" or \*(L"Dedications\*(R", Preserve
+the Title of the section, and preserve in the section all the
+substance and tone of each of the contributor acknowledgements and/or
+dedications given therein.
+.IP "L." 4
+.IX Item "L."
+Preserve all the Invariant Sections of the Document,
+unaltered in their text and in their titles.  Section numbers
+or the equivalent are not considered part of the section titles.
+.IP "M." 4
+.IX Item "M."
+Delete any section Entitled \*(L"Endorsements\*(R".  Such a section
+may not be included in the Modified Version.
+.IP "N." 4
+.IX Item "N."
+Do not retitle any existing section to be Entitled \*(L"Endorsements\*(R" or
+to conflict in title with any Invariant Section.
+.IP "O." 4
+.IX Item "O."
+Preserve any Warranty Disclaimers.
+.RE
+.RS 4
+.Sp
+If the Modified Version includes new front-matter sections or
+appendices that qualify as Secondary Sections and contain no material
+copied from the Document, you may at your option designate some or all
+of these sections as invariant.  To do this, add their titles to the
+list of Invariant Sections in the Modified Version's license notice.
+These titles must be distinct from any other section titles.
+.Sp
+You may add a section Entitled \*(L"Endorsements\*(R", provided it contains
+nothing but endorsements of your Modified Version by various
+parties\-\-\-for example, statements of peer review or that the text has
+been approved by an organization as the authoritative definition of a
+standard.
+.Sp
+You may add a passage of up to five words as a Front-Cover Text, and a
+passage of up to 25 words as a Back-Cover Text, to the end of the list
+of Cover Texts in the Modified Version.  Only one passage of
+Front-Cover Text and one of Back-Cover Text may be added by (or
+through arrangements made by) any one entity.  If the Document already
+includes a cover text for the same cover, previously added by you or
+by arrangement made by the same entity you are acting on behalf of,
+you may not add another; but you may replace the old one, on explicit
+permission from the previous publisher that added the old one.
+.Sp
+The author(s) and publisher(s) of the Document do not by this License
+give permission to use their names for publicity for or to assert or
+imply endorsement of any Modified Version.
+.RE
+.IP "5." 4
+.IX Item "5."
+\&\s-1COMBINING\s0 \s-1DOCUMENTS\s0
+.Sp
+You may combine the Document with other documents released under this
+License, under the terms defined in section 4 above for modified
+versions, provided that you include in the combination all of the
+Invariant Sections of all of the original documents, unmodified, and
+list them all as Invariant Sections of your combined work in its
+license notice, and that you preserve all their Warranty Disclaimers.
+.Sp
+The combined work need only contain one copy of this License, and
+multiple identical Invariant Sections may be replaced with a single
+copy.  If there are multiple Invariant Sections with the same name but
+different contents, make the title of each such section unique by
+adding at the end of it, in parentheses, the name of the original
+author or publisher of that section if known, or else a unique number.
+Make the same adjustment to the section titles in the list of
+Invariant Sections in the license notice of the combined work.
+.Sp
+In the combination, you must combine any sections Entitled \*(L"History\*(R"
+in the various original documents, forming one section Entitled
+\&\*(L"History\*(R"; likewise combine any sections Entitled \*(L"Acknowledgements\*(R",
+and any sections Entitled \*(L"Dedications\*(R".  You must delete all
+sections Entitled \*(L"Endorsements.\*(R"
+.IP "6." 4
+.IX Item "6."
+\&\s-1COLLECTIONS\s0 \s-1OF\s0 \s-1DOCUMENTS\s0
+.Sp
+You may make a collection consisting of the Document and other documents
+released under this License, and replace the individual copies of this
+License in the various documents with a single copy that is included in
+the collection, provided that you follow the rules of this License for
+verbatim copying of each of the documents in all other respects.
+.Sp
+You may extract a single document from such a collection, and distribute
+it individually under this License, provided you insert a copy of this
+License into the extracted document, and follow this License in all
+other respects regarding verbatim copying of that document.
+.IP "7." 4
+.IX Item "7."
+\&\s-1AGGREGATION\s0 \s-1WITH\s0 \s-1INDEPENDENT\s0 \s-1WORKS\s0
+.Sp
+A compilation of the Document or its derivatives with other separate
+and independent documents or works, in or on a volume of a storage or
+distribution medium, is called an \*(L"aggregate\*(R" if the copyright
+resulting from the compilation is not used to limit the legal rights
+of the compilation's users beyond what the individual works permit.
+When the Document is included in an aggregate, this License does not
+apply to the other works in the aggregate which are not themselves
+derivative works of the Document.
+.Sp
+If the Cover Text requirement of section 3 is applicable to these
+copies of the Document, then if the Document is less than one half of
+the entire aggregate, the Document's Cover Texts may be placed on
+covers that bracket the Document within the aggregate, or the
+electronic equivalent of covers if the Document is in electronic form.
+Otherwise they must appear on printed covers that bracket the whole
+aggregate.
+.IP "8." 4
+.IX Item "8."
+\&\s-1TRANSLATION\s0
+.Sp
+Translation is considered a kind of modification, so you may
+distribute translations of the Document under the terms of section 4.
+Replacing Invariant Sections with translations requires special
+permission from their copyright holders, but you may include
+translations of some or all Invariant Sections in addition to the
+original versions of these Invariant Sections.  You may include a
+translation of this License, and all the license notices in the
+Document, and any Warranty Disclaimers, provided that you also include
+the original English version of this License and the original versions
+of those notices and disclaimers.  In case of a disagreement between
+the translation and the original version of this License or a notice
+or disclaimer, the original version will prevail.
+.Sp
+If a section in the Document is Entitled \*(L"Acknowledgements\*(R",
+\&\*(L"Dedications\*(R", or \*(L"History\*(R", the requirement (section 4) to Preserve
+its Title (section 1) will typically require changing the actual
+title.
+.IP "9." 4
+.IX Item "9."
+\&\s-1TERMINATION\s0
+.Sp
+You may not copy, modify, sublicense, or distribute the Document
+except as expressly provided under this License.  Any attempt
+otherwise to copy, modify, sublicense, or distribute it is void, and
+will automatically terminate your rights under this License.
+.Sp
+However, if you cease all violation of this License, then your license
+from a particular copyright holder is reinstated (a) provisionally,
+unless and until the copyright holder explicitly and finally
+terminates your license, and (b) permanently, if the copyright holder
+fails to notify you of the violation by some reasonable means prior to
+60 days after the cessation.
+.Sp
+Moreover, your license from a particular copyright holder is
+reinstated permanently if the copyright holder notifies you of the
+violation by some reasonable means, this is the first time you have
+received notice of violation of this License (for any work) from that
+copyright holder, and you cure the violation prior to 30 days after
+your receipt of the notice.
+.Sp
+Termination of your rights under this section does not terminate the
+licenses of parties who have received copies or rights from you under
+this License.  If your rights have been terminated and not permanently
+reinstated, receipt of a copy of some or all of the same material does
+not give you any rights to use it.
+.IP "10." 4
+.IX Item "10."
+\&\s-1FUTURE\s0 \s-1REVISIONS\s0 \s-1OF\s0 \s-1THIS\s0 \s-1LICENSE\s0
+.Sp
+The Free Software Foundation may publish new, revised versions
+of the \s-1GNU\s0 Free Documentation License from time to time.  Such new
+versions will be similar in spirit to the present version, but may
+differ in detail to address new problems or concerns.  See
+<\fBhttp://www.gnu.org/copyleft/\fR>.
+.Sp
+Each version of the License is given a distinguishing version number.
+If the Document specifies that a particular numbered version of this
+License \*(L"or any later version\*(R" applies to it, you have the option of
+following the terms and conditions either of that specified version or
+of any later version that has been published (not as a draft) by the
+Free Software Foundation.  If the Document does not specify a version
+number of this License, you may choose any version ever published (not
+as a draft) by the Free Software Foundation.  If the Document
+specifies that a proxy can decide which future versions of this
+License can be used, that proxy's public statement of acceptance of a
+version permanently authorizes you to choose that version for the
+Document.
+.IP "11." 4
+.IX Item "11."
+\&\s-1RELICENSING\s0
+.Sp
+\&\*(L"Massive Multiauthor Collaboration Site\*(R" (or \*(L"\s-1MMC\s0 Site\*(R") means any
+World Wide Web server that publishes copyrightable works and also
+provides prominent facilities for anybody to edit those works.  A
+public wiki that anybody can edit is an example of such a server.  A
+\&\*(L"Massive Multiauthor Collaboration\*(R" (or \*(L"\s-1MMC\s0\*(R") contained in the
+site means any set of copyrightable works thus published on the \s-1MMC\s0
+site.
+.Sp
+\&\*(L"CC-BY-SA\*(R" means the Creative Commons Attribution-Share Alike 3.0
+license published by Creative Commons Corporation, a not-for-profit
+corporation with a principal place of business in San Francisco,
+California, as well as future copyleft versions of that license
+published by that same organization.
+.Sp
+\&\*(L"Incorporate\*(R" means to publish or republish a Document, in whole or
+in part, as part of another Document.
+.Sp
+An \s-1MMC\s0 is \*(L"eligible for relicensing\*(R" if it is licensed under this
+License, and if all works that were first published under this License
+somewhere other than this \s-1MMC\s0, and subsequently incorporated in whole
+or in part into the \s-1MMC\s0, (1) had no cover texts or invariant sections,
+and (2) were thus incorporated prior to November 1, 2008.
+.Sp
+The operator of an \s-1MMC\s0 Site may republish an \s-1MMC\s0 contained in the site
+under CC-BY-SA on the same site at any time before August 1, 2009,
+provided the \s-1MMC\s0 is eligible for relicensing.
+.SS "\s-1ADDENDUM:\s0 How to use this License for your documents"
+.IX Subsection "ADDENDUM: How to use this License for your documents"
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and
+license notices just after the title page:
+.PP
+.Vb 7
+\&          Copyright (C)  <year>  <your name>.
+\&          Permission is granted to copy, distribute and/or modify this document
+\&          under the terms of the GNU Free Documentation License, Version 1.3
+\&          or any later version published by the Free Software Foundation;
+\&          with no Invariant Sections, no Front\-Cover Texts, and no Back\-Cover
+\&          Texts.  A copy of the license is included in the section entitled "GNU
+\&          Free Documentation License".
+.Ve
+.PP
+If you have Invariant Sections, Front-Cover Texts and Back-Cover Texts,
+replace the \*(L"with...Texts.\*(R" line with this:
+.PP
+.Vb 3
+\&            with the Invariant Sections being <list their titles>, with
+\&            the Front\-Cover Texts being <list>, and with the Back\-Cover Texts
+\&            being <list>.
+.Ve
+.PP
+If you have Invariant Sections without Cover Texts, or some other
+combination of the three, merge those two alternatives to suit the
+situation.
+.PP
+If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
+free software license, such as the \s-1GNU\s0 General Public License,
+to permit their use in free software.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgpl\fR\|(7), \fIfsf\-funding\fR\|(7).
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
+<\fBhttp://fsf.org/\fR>
+.PP
+Everyone is permitted to copy and distribute verbatim copies
+of this license document, but changing it is not allowed.
diff --git a/gcc/doc/gfortran.1 b/gcc/doc/gfortran.1
new file mode 100644
index 000000000..419dbb134
--- /dev/null
+++ b/gcc/doc/gfortran.1
@@ -0,0 +1,1279 @@
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+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
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+.\}
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+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
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+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GFORTRAN 1"
+.TH GFORTRAN 1 "2013-04-12" "gcc-4.6.4" "GNU"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+gfortran \- GNU Fortran compiler
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+gfortran [\fB\-c\fR|\fB\-S\fR|\fB\-E\fR]
+         [\fB\-g\fR] [\fB\-pg\fR] [\fB\-O\fR\fIlevel\fR]
+         [\fB\-W\fR\fIwarn\fR...] [\fB\-pedantic\fR]
+         [\fB\-I\fR\fIdir\fR...] [\fB\-L\fR\fIdir\fR...]
+         [\fB\-D\fR\fImacro\fR[=\fIdefn\fR]...] [\fB\-U\fR\fImacro\fR]
+         [\fB\-f\fR\fIoption\fR...]
+         [\fB\-m\fR\fImachine-option\fR...]
+         [\fB\-o\fR \fIoutfile\fR] \fIinfile\fR...
+.PP
+Only the most useful options are listed here; see below for the
+remainder.
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+The \fBgfortran\fR command supports all the options supported by the
+\&\fBgcc\fR command.  Only options specific to \s-1GNU\s0 Fortran are documented here.
+.PP
+All \s-1GCC\s0 and \s-1GNU\s0 Fortran options
+are accepted both by \fBgfortran\fR and by \fBgcc\fR
+(as well as any other drivers built at the same time,
+such as \fBg++\fR),
+since adding \s-1GNU\s0 Fortran to the \s-1GCC\s0 distribution
+enables acceptance of \s-1GNU\s0 Fortran options
+by all of the relevant drivers.
+.PP
+In some cases, options have positive and negative forms;
+the negative form of \fB\-ffoo\fR would be \fB\-fno\-foo\fR.
+This manual documents only one of these two forms, whichever
+one is not the default.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+Here is a summary of all the options specific to \s-1GNU\s0 Fortran, grouped
+by type.  Explanations are in the following sections.
+.IP "\fIFortran Language Options\fR" 4
+.IX Item "Fortran Language Options"
+\&\fB\-fall\-intrinsics  \-ffree\-form  \-fno\-fixed\-form 
+\&\-fdollar\-ok  \-fimplicit\-none  \-fmax\-identifier\-length 
+\&\-std=\fR\fIstd\fR \fB\-fd\-lines\-as\-code  \-fd\-lines\-as\-comments 
+\&\-ffixed\-line\-length\-\fR\fIn\fR  \fB\-ffixed\-line\-length\-none 
+\&\-ffree\-line\-length\-\fR\fIn\fR  \fB\-ffree\-line\-length\-none 
+\&\-fdefault\-double\-8  \-fdefault\-integer\-8  \-fdefault\-real\-8 
+\&\-fcray\-pointer  \-fopenmp  \-fno\-range\-check \-fbackslash \-fmodule\-private\fR
+.IP "\fIPreprocessing Options\fR" 4
+.IX Item "Preprocessing Options"
+\&\fB\-cpp \-dD \-dI \-dM \-dN \-dU \-fworking\-directory 
+\&\-imultilib\fR \fIdir\fR \fB\-iprefix\fR \fIfile\fR \fB\-isysroot\fR \fIdir\fR 
+\&\fB\-iquote \-isystem\fR \fIdir\fR \fB\-nocpp \-nostdinc \-undef 
+\&\-A\fR\fIquestion\fR\fB=\fR\fIanswer\fR \fB\-A\-\fR\fIquestion\fR[\fB=\fR\fIanswer\fR] 
+\&\fB\-C \-CC \-D\fR\fImacro\fR[\fB=\fR\fIdefn\fR] \fB\-U\fR\fImacro\fR \fB\-H \-P\fR
+.IP "\fIError and Warning Options\fR" 4
+.IX Item "Error and Warning Options"
+\&\fB\-fmax\-errors=\fR\fIn\fR 
+\&\fB\-fsyntax\-only  \-pedantic  \-pedantic\-errors 
+\&\-Wall  \-Waliasing  \-Wampersand  \-Warray\-bounds \-Wcharacter\-truncation 
+\&\-Wconversion \-Wimplicit\-interface  \-Wimplicit\-procedure  \-Wline\-truncation 
+\&\-Wintrinsics\-std  \-Wsurprising  \-Wno\-tabs  \-Wunderflow  \-Wunused\-parameter 
+\&\-Wintrinsic\-shadow  \-Wno\-align\-commons\fR
+.IP "\fIDebugging Options\fR" 4
+.IX Item "Debugging Options"
+\&\fB\-fdump\-fortran\-original  \-fdump\-fortran\-optimized 
+\&\-ffpe\-trap=\fR\fIlist\fR  \fB\-fdump\-core \-fbacktrace \-fdump\-parse\-tree\fR
+.IP "\fIDirectory Options\fR" 4
+.IX Item "Directory Options"
+\&\fB\-I\fR\fIdir\fR  \fB\-J\fR\fIdir\fR \fB\-fintrinsic\-modules\-path\fR \fIdir\fR
+.IP "\fILink Options\fR" 4
+.IX Item "Link Options"
+\&\fB\-static\-libgfortran\fR
+.IP "\fIRuntime Options\fR" 4
+.IX Item "Runtime Options"
+\&\fB\-fconvert=\fR\fIconversion\fR  \fB\-fno\-range\-check
+\&\-frecord\-marker=\fR\fIlength\fR   \fB\-fmax\-subrecord\-length=\fR\fIlength\fR
+\&\fB\-fsign\-zero\fR
+.IP "\fICode Generation Options\fR" 4
+.IX Item "Code Generation Options"
+\&\fB\-fno\-automatic  \-ff2c  \-fno\-underscoring 
+\&\-fno\-whole\-file \-fsecond\-underscore 
+\&\-fbounds\-check \-fcheck\-array\-temporaries  \-fmax\-array\-constructor =\fR\fIn\fR 
+\&\fB\-fcheck=\fR\fI<all|array\-temps|bounds|do|mem|pointer|recursion>\fR 
+\&\fB\-fcoarray=\fR\fI<none|single>\fR \fB\-fmax\-stack\-var\-size=\fR\fIn\fR 
+\&\fB\-fpack\-derived  \-frepack\-arrays  \-fshort\-enums  \-fexternal\-blas 
+\&\-fblas\-matmul\-limit=\fR\fIn\fR \fB\-frecursive \-finit\-local\-zero 
+\&\-finit\-integer=\fR\fIn\fR \fB\-finit\-real=\fR\fI<zero|inf|\-inf|nan|snan>\fR 
+\&\fB\-finit\-logical=\fR\fI<true|false>\fR \fB\-finit\-character=\fR\fIn\fR 
+\&\fB\-fno\-align\-commons \-fno\-protect\-parens \-frealloc\-lhs\fR
+.SS "Options controlling Fortran dialect"
+.IX Subsection "Options controlling Fortran dialect"
+The following options control the details of the Fortran dialect
+accepted by the compiler:
+.IP "\fB\-ffree\-form\fR" 4
+.IX Item "-ffree-form"
+.PD 0
+.IP "\fB\-ffixed\-form\fR" 4
+.IX Item "-ffixed-form"
+.PD
+Specify the layout used by the source file.  The free form layout
+was introduced in Fortran 90.  Fixed form was traditionally used in
+older Fortran programs.  When neither option is specified, the source
+form is determined by the file extension.
+.IP "\fB\-fall\-intrinsics\fR" 4
+.IX Item "-fall-intrinsics"
+This option causes all intrinsic procedures (including the GNU-specific
+extensions) to be accepted.  This can be useful with \fB\-std=f95\fR to
+force standard-compliance but get access to the full range of intrinsics
+available with \fBgfortran\fR.  As a consequence, \fB\-Wintrinsics\-std\fR
+will be ignored and no user-defined procedure with the same name as any
+intrinsic will be called except when it is explicitly declared \f(CW\*(C`EXTERNAL\*(C'\fR.
+.IP "\fB\-fd\-lines\-as\-code\fR" 4
+.IX Item "-fd-lines-as-code"
+.PD 0
+.IP "\fB\-fd\-lines\-as\-comments\fR" 4
+.IX Item "-fd-lines-as-comments"
+.PD
+Enable special treatment for lines beginning with \f(CW\*(C`d\*(C'\fR or \f(CW\*(C`D\*(C'\fR
+in fixed form sources.  If the \fB\-fd\-lines\-as\-code\fR option is
+given they are treated as if the first column contained a blank.  If the
+\&\fB\-fd\-lines\-as\-comments\fR option is given, they are treated as
+comment lines.
+.IP "\fB\-fdefault\-double\-8\fR" 4
+.IX Item "-fdefault-double-8"
+Set the \f(CW\*(C`DOUBLE PRECISION\*(C'\fR type to an 8 byte wide type.  If
+\&\fB\-fdefault\-real\-8\fR is given, \f(CW\*(C`DOUBLE PRECISION\*(C'\fR would
+instead be promoted to 16 bytes if possible, and \fB\-fdefault\-double\-8\fR
+can be used to prevent this.  The kind of real constants like \f(CW\*(C`1.d0\*(C'\fR will
+not be changed by \fB\-fdefault\-real\-8\fR though, so also
+\&\fB\-fdefault\-double\-8\fR does not affect it.
+.IP "\fB\-fdefault\-integer\-8\fR" 4
+.IX Item "-fdefault-integer-8"
+Set the default integer and logical types to an 8 byte wide type.
+Do nothing if this is already the default.  This option also affects
+the kind of integer constants like \f(CW42\fR.
+.IP "\fB\-fdefault\-real\-8\fR" 4
+.IX Item "-fdefault-real-8"
+Set the default real type to an 8 byte wide type.
+Do nothing if this is already the default.  This option also affects
+the kind of non-double real constants like \f(CW1.0\fR, and does promote
+the default width of \f(CW\*(C`DOUBLE PRECISION\*(C'\fR to 16 bytes if possible, unless
+\&\f(CW\*(C`\-fdefault\-double\-8\*(C'\fR is given, too.
+.IP "\fB\-fdollar\-ok\fR" 4
+.IX Item "-fdollar-ok"
+Allow \fB$\fR as a valid non-first character in a symbol name. Symbols 
+that start with \fB$\fR are rejected since it is unclear which rules to
+apply to implicit typing as different vendors implement different rules.
+Using \fB$\fR in \f(CW\*(C`IMPLICIT\*(C'\fR statements is also rejected.
+.IP "\fB\-fbackslash\fR" 4
+.IX Item "-fbackslash"
+Change the interpretation of backslashes in string literals from a single
+backslash character to \*(L"C\-style\*(R" escape characters. The following
+combinations are expanded \f(CW\*(C`\ea\*(C'\fR, \f(CW\*(C`\eb\*(C'\fR, \f(CW\*(C`\ef\*(C'\fR, \f(CW\*(C`\en\*(C'\fR,
+\&\f(CW\*(C`\er\*(C'\fR, \f(CW\*(C`\et\*(C'\fR, \f(CW\*(C`\ev\*(C'\fR, \f(CW\*(C`\e\e\*(C'\fR, and \f(CW\*(C`\e0\*(C'\fR to the \s-1ASCII\s0
+characters alert, backspace, form feed, newline, carriage return,
+horizontal tab, vertical tab, backslash, and \s-1NUL\s0, respectively.
+Additionally, \f(CW\*(C`\ex\*(C'\fR\fInn\fR, \f(CW\*(C`\eu\*(C'\fR\fInnnn\fR and
+\&\f(CW\*(C`\eU\*(C'\fR\fInnnnnnnn\fR (where each \fIn\fR is a hexadecimal digit) are
+translated into the Unicode characters corresponding to the specified code
+points. All other combinations of a character preceded by \e are
+unexpanded.
+.IP "\fB\-fmodule\-private\fR" 4
+.IX Item "-fmodule-private"
+Set the default accessibility of module entities to \f(CW\*(C`PRIVATE\*(C'\fR.
+Use-associated entities will not be accessible unless they are explicitly
+declared as \f(CW\*(C`PUBLIC\*(C'\fR.
+.IP "\fB\-ffixed\-line\-length\-\fR\fIn\fR" 4
+.IX Item "-ffixed-line-length-n"
+Set column after which characters are ignored in typical fixed-form
+lines in the source file, and through which spaces are assumed (as
+if padded to that length) after the ends of short fixed-form lines.
+.Sp
+Popular values for \fIn\fR include 72 (the
+standard and the default), 80 (card image), and 132 (corresponding
+to \*(L"extended-source\*(R" options in some popular compilers).
+\&\fIn\fR may also be \fBnone\fR, meaning that the entire line is meaningful
+and that continued character constants never have implicit spaces appended
+to them to fill out the line.
+\&\fB\-ffixed\-line\-length\-0\fR means the same thing as
+\&\fB\-ffixed\-line\-length\-none\fR.
+.IP "\fB\-ffree\-line\-length\-\fR\fIn\fR" 4
+.IX Item "-ffree-line-length-n"
+Set column after which characters are ignored in typical free-form
+lines in the source file. The default value is 132.
+\&\fIn\fR may be \fBnone\fR, meaning that the entire line is meaningful.
+\&\fB\-ffree\-line\-length\-0\fR means the same thing as
+\&\fB\-ffree\-line\-length\-none\fR.
+.IP "\fB\-fmax\-identifier\-length=\fR\fIn\fR" 4
+.IX Item "-fmax-identifier-length=n"
+Specify the maximum allowed identifier length. Typical values are
+31 (Fortran 95) and 63 (Fortran 2003 and Fortran 2008).
+.IP "\fB\-fimplicit\-none\fR" 4
+.IX Item "-fimplicit-none"
+Specify that no implicit typing is allowed, unless overridden by explicit
+\&\f(CW\*(C`IMPLICIT\*(C'\fR statements.  This is the equivalent of adding
+\&\f(CW\*(C`implicit none\*(C'\fR to the start of every procedure.
+.IP "\fB\-fcray\-pointer\fR" 4
+.IX Item "-fcray-pointer"
+Enable the Cray pointer extension, which provides C\-like pointer
+functionality.
+.IP "\fB\-fopenmp\fR" 4
+.IX Item "-fopenmp"
+Enable the OpenMP extensions.  This includes OpenMP \f(CW\*(C`!$omp\*(C'\fR directives
+in free form
+and \f(CW\*(C`c$omp\*(C'\fR, \f(CW*$omp\fR and \f(CW\*(C`!$omp\*(C'\fR directives in fixed form,
+\&\f(CW\*(C`!$\*(C'\fR conditional compilation sentinels in free form
+and \f(CW\*(C`c$\*(C'\fR, \f(CW\*(C`*$\*(C'\fR and \f(CW\*(C`!$\*(C'\fR sentinels in fixed form, 
+and when linking arranges for the OpenMP runtime library to be linked
+in.  The option \fB\-fopenmp\fR implies \fB\-frecursive\fR.
+.IP "\fB\-fno\-range\-check\fR" 4
+.IX Item "-fno-range-check"
+Disable range checking on results of simplification of constant
+expressions during compilation.  For example, \s-1GNU\s0 Fortran will give
+an error at compile time when simplifying \f(CW\*(C`a = 1. / 0\*(C'\fR.
+With this option, no error will be given and \f(CW\*(C`a\*(C'\fR will be assigned
+the value \f(CW\*(C`+Infinity\*(C'\fR.  If an expression evaluates to a value
+outside of the relevant range of [\f(CW\*(C`\-HUGE()\*(C'\fR:\f(CW\*(C`HUGE()\*(C'\fR],
+then the expression will be replaced by \f(CW\*(C`\-Inf\*(C'\fR or \f(CW\*(C`+Inf\*(C'\fR
+as appropriate.
+Similarly, \f(CW\*(C`DATA i/Z\*(AqFFFFFFFF\*(Aq/\*(C'\fR will result in an integer overflow
+on most systems, but with \fB\-fno\-range\-check\fR the value will
+\&\*(L"wrap around\*(R" and \f(CW\*(C`i\*(C'\fR will be initialized to \-1 instead.
+.IP "\fB\-std=\fR\fIstd\fR" 4
+.IX Item "-std=std"
+Specify the standard to which the program is expected to conform, which
+may be one of \fBf95\fR, \fBf2003\fR, \fBf2008\fR, \fBgnu\fR, or
+\&\fBlegacy\fR.  The default value for \fIstd\fR is \fBgnu\fR, which
+specifies a superset of the Fortran 95 standard that includes all of the
+extensions supported by \s-1GNU\s0 Fortran, although warnings will be given for
+obsolete extensions not recommended for use in new code.  The
+\&\fBlegacy\fR value is equivalent but without the warnings for obsolete
+extensions, and may be useful for old non-standard programs.  The
+\&\fBf95\fR, \fBf2003\fR and \fBf2008\fR values specify strict
+conformance to the Fortran 95, Fortran 2003 and Fortran 2008 standards,
+respectively; errors are given for all extensions beyond the relevant
+language standard, and warnings are given for the Fortran 77 features
+that are permitted but obsolescent in later standards.
+.SS "Enable and customize preprocessing"
+.IX Subsection "Enable and customize preprocessing"
+Preprocessor related options. See section 
+\&\fBPreprocessing and conditional compilation\fR for more detailed
+information on preprocessing in \fBgfortran\fR.
+.IP "\fB\-cpp\fR" 4
+.IX Item "-cpp"
+.PD 0
+.IP "\fB\-nocpp\fR" 4
+.IX Item "-nocpp"
+.PD
+Enable preprocessing. The preprocessor is automatically invoked if
+the file extension is \fI.fpp\fR, \fI.FPP\fR,  \fI.F\fR, \fI.FOR\fR,
+\&\fI.FTN\fR, \fI.F90\fR, \fI.F95\fR, \fI.F03\fR or \fI.F08\fR. Use
+this option to manually enable preprocessing of any kind of Fortran file.
+.Sp
+To disable preprocessing of files with any of the above listed extensions,
+use the negative form: \fB\-nocpp\fR.
+.Sp
+The preprocessor is run in traditional mode. Any restrictions of the
+file-format, especially the limits on line length, apply for
+preprocessed output as well, so it might be advisable to use the
+\&\fB\-ffree\-line\-length\-none\fR or \fB\-ffixed\-line\-length\-none\fR
+options.
+.IP "\fB\-dM\fR" 4
+.IX Item "-dM"
+Instead of the normal output, generate a list of \f(CW\*(Aq#define\*(Aq\fR
+directives for all the macros defined during the execution of the
+preprocessor, including predefined macros. This gives you a way
+of finding out what is predefined in your version of the preprocessor.
+Assuming you have no file \fIfoo.f90\fR, the command
+.Sp
+.Vb 1
+\&          touch foo.f90; gfortran \-cpp \-E \-dM foo.f90
+.Ve
+.Sp
+will show all the predefined macros.
+.IP "\fB\-dD\fR" 4
+.IX Item "-dD"
+Like \fB\-dM\fR except in two respects: it does not include the
+predefined macros, and it outputs both the \f(CW\*(C`#define\*(C'\fR directives
+and the result of preprocessing. Both kinds of output go to the
+standard output file.
+.IP "\fB\-dN\fR" 4
+.IX Item "-dN"
+Like \fB\-dD\fR, but emit only the macro names, not their expansions.
+.IP "\fB\-dU\fR" 4
+.IX Item "-dU"
+Like \fBdD\fR except that only macros that are expanded, or whose
+definedness is tested in preprocessor directives, are output; the 
+output is delayed until the use or test of the macro; and \f(CW\*(Aq#undef\*(Aq\fR
+directives are also output for macros tested but undefined at the time.
+.IP "\fB\-dI\fR" 4
+.IX Item "-dI"
+Output \f(CW\*(Aq#include\*(Aq\fR directives in addition to the result
+of preprocessing.
+.IP "\fB\-fworking\-directory\fR" 4
+.IX Item "-fworking-directory"
+Enable generation of linemarkers in the preprocessor output that will
+let the compiler know the current working directory at the time of
+preprocessing. When this option is enabled, the preprocessor will emit,
+after the initial linemarker, a second linemarker with the current
+working directory followed by two slashes. \s-1GCC\s0 will use this directory,
+when it's present in the preprocessed input, as the directory emitted
+as the current working directory in some debugging information formats.
+This option is implicitly enabled if debugging information is enabled,
+but this can be inhibited with the negated form
+\&\fB\-fno\-working\-directory\fR. If the \fB\-P\fR flag is present
+in the command line, this option has no effect, since no \f(CW\*(C`#line\*(C'\fR
+directives are emitted whatsoever.
+.IP "\fB\-idirafter\fR \fIdir\fR" 4
+.IX Item "-idirafter dir"
+Search \fIdir\fR for include files, but do it after all directories
+specified with \fB\-I\fR and the standard system directories have
+been exhausted. \fIdir\fR is treated as a system include directory.
+If dir begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced by
+the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-imultilib\fR \fIdir\fR" 4
+.IX Item "-imultilib dir"
+Use \fIdir\fR as a subdirectory of the directory containing target-specific
+\&\*(C+ headers.
+.IP "\fB\-iprefix\fR \fIprefix\fR" 4
+.IX Item "-iprefix prefix"
+Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR
+options. If the \fIprefix\fR represents a directory, you should include
+the final \f(CW\*(Aq/\*(Aq\fR.
+.IP "\fB\-isysroot\fR \fIdir\fR" 4
+.IX Item "-isysroot dir"
+This option is like the \fB\-\-sysroot\fR option, but applies only to
+header files. See the \fB\-\-sysroot\fR option for more information.
+.IP "\fB\-iquote\fR \fIdir\fR" 4
+.IX Item "-iquote dir"
+Search \fIdir\fR only for header files requested with \f(CW\*(C`#include "file"\*(C'\fR;
+they are not searched for \f(CW\*(C`#include <file>\*(C'\fR, before all directories
+specified by \fB\-I\fR and before the standard system directories. If
+\&\fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced by the
+sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-isystem\fR \fIdir\fR" 4
+.IX Item "-isystem dir"
+Search \fIdir\fR for header files, after all directories specified by
+\&\fB\-I\fR but before the standard system directories. Mark it as a
+system directory, so that it gets the same special treatment as is
+applied to the standard system directories. If \fIdir\fR begins with
+\&\f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced by the sysroot prefix;
+see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-nostdinc\fR" 4
+.IX Item "-nostdinc"
+Do not search the standard system directories for header files. Only
+the directories you have specified with \fB\-I\fR options (and the
+directory of the current file, if appropriate) are searched.
+.IP "\fB\-undef\fR" 4
+.IX Item "-undef"
+Do not predefine any system-specific or GCC-specific macros.
+The standard predefined macros remain defined.
+.IP "\fB\-A\fR\fIpredicate\fR\fB=\fR\fIanswer\fR" 4
+.IX Item "-Apredicate=answer"
+Make an assertion with the predicate \fIpredicate\fR and answer \fIanswer\fR.
+This form is preferred to the older form \-A predicate(answer), which is still
+supported, because it does not use shell special characters.
+.IP "\fB\-A\-\fR\fIpredicate\fR\fB=\fR\fIanswer\fR" 4
+.IX Item "-A-predicate=answer"
+Cancel an assertion with the predicate \fIpredicate\fR and answer \fIanswer\fR.
+.IP "\fB\-C\fR" 4
+.IX Item "-C"
+Do not discard comments. All comments are passed through to the output
+file, except for comments in processed directives, which are deleted
+along with the directive.
+.Sp
+You should be prepared for side effects when using \fB\-C\fR; it causes
+the preprocessor to treat comments as tokens in their own right. For example,
+comments appearing at the start of what would be a directive line have the
+effect of turning that line into an ordinary source line, since the first
+token on the line is no longer a \f(CW\*(Aq#\*(Aq\fR.
+.Sp
+Warning: this currently handles C\-Style comments only. The preprocessor
+does not yet recognize Fortran-style comments.
+.IP "\fB\-CC\fR" 4
+.IX Item "-CC"
+Do not discard comments, including during macro expansion. This is like
+\&\fB\-C\fR, except that comments contained within macros are also passed
+through to the output file where the macro is expanded.
+.Sp
+In addition to the side-effects of the \fB\-C\fR option, the \fB\-CC\fR
+option causes all \*(C+\-style comments inside a macro to be converted to C\-style
+comments. This is to prevent later use of that macro from inadvertently
+commenting out the remainder of the source line. The \fB\-CC\fR option
+is generally used to support lint comments.
+.Sp
+Warning: this currently handles C\- and \*(C+\-Style comments only. The
+preprocessor does not yet recognize Fortran-style comments.
+.IP "\fB\-D\fR\fIname\fR" 4
+.IX Item "-Dname"
+Predefine name as a macro, with definition \f(CW1\fR.
+.IP "\fB\-D\fR\fIname\fR\fB=\fR\fIdefinition\fR" 4
+.IX Item "-Dname=definition"
+The contents of \fIdefinition\fR are tokenized and processed as if they
+appeared during translation phase three in a \f(CW\*(Aq#define\*(Aq\fR directive.
+In particular, the definition will be truncated by embedded newline
+characters.
+.Sp
+If you are invoking the preprocessor from a shell or shell-like program
+you may need to use the shell's quoting syntax to protect characters such
+as spaces that have a meaning in the shell syntax.
+.Sp
+If you wish to define a function-like macro on the command line, write
+its argument list with surrounding parentheses before the equals sign
+(if any). Parentheses are meaningful to most shells, so you will need
+to quote the option. With sh and csh, \f(CW\*(C`\-D\*(Aqname(args...)=definition\*(Aq\*(C'\fR
+works.
+.Sp
+\&\fB\-D\fR and \fB\-U\fR options are processed in the order they are
+given on the command line. All \-imacros file and \-include file options
+are processed after all \-D and \-U options.
+.IP "\fB\-H\fR" 4
+.IX Item "-H"
+Print the name of each header file used, in addition to other normal
+activities. Each name is indented to show how deep in the \f(CW\*(Aq#include\*(Aq\fR
+stack it is.
+.IP "\fB\-P\fR" 4
+.IX Item "-P"
+Inhibit generation of linemarkers in the output from the preprocessor.
+This might be useful when running the preprocessor on something that
+is not C code, and will be sent to a program which might be confused
+by the linemarkers.
+.IP "\fB\-U\fR\fIname\fR" 4
+.IX Item "-Uname"
+Cancel any previous definition of \fIname\fR, either built in or provided
+with a \fB\-D\fR option.
+.SS "Options to request or suppress errors and warnings"
+.IX Subsection "Options to request or suppress errors and warnings"
+Errors are diagnostic messages that report that the \s-1GNU\s0 Fortran compiler
+cannot compile the relevant piece of source code.  The compiler will
+continue to process the program in an attempt to report further errors
+to aid in debugging, but will not produce any compiled output.
+.PP
+Warnings are diagnostic messages that report constructions which
+are not inherently erroneous but which are risky or suggest there is
+likely to be a bug in the program.  Unless \fB\-Werror\fR is specified,
+they do not prevent compilation of the program.
+.PP
+You can request many specific warnings with options beginning \fB\-W\fR,
+for example \fB\-Wimplicit\fR to request warnings on implicit
+declarations.  Each of these specific warning options also has a
+negative form beginning \fB\-Wno\-\fR to turn off warnings;
+for example, \fB\-Wno\-implicit\fR.  This manual lists only one of the
+two forms, whichever is not the default.
+.PP
+These options control the amount and kinds of errors and warnings produced
+by \s-1GNU\s0 Fortran:
+.IP "\fB\-fmax\-errors=\fR\fIn\fR" 4
+.IX Item "-fmax-errors=n"
+Limits the maximum number of error messages to \fIn\fR, at which point
+\&\s-1GNU\s0 Fortran bails out rather than attempting to continue processing the
+source code.  If \fIn\fR is 0, there is no limit on the number of error
+messages produced.
+.IP "\fB\-fsyntax\-only\fR" 4
+.IX Item "-fsyntax-only"
+Check the code for syntax errors, but don't actually compile it.  This
+will generate module files for each module present in the code, but no
+other output file.
+.IP "\fB\-pedantic\fR" 4
+.IX Item "-pedantic"
+Issue warnings for uses of extensions to Fortran 95.
+\&\fB\-pedantic\fR also applies to C\-language constructs where they
+occur in \s-1GNU\s0 Fortran source files, such as use of \fB\ee\fR in a
+character constant within a directive like \f(CW\*(C`#include\*(C'\fR.
+.Sp
+Valid Fortran 95 programs should compile properly with or without
+this option.
+However, without this option, certain \s-1GNU\s0 extensions and traditional
+Fortran features are supported as well.
+With this option, many of them are rejected.
+.Sp
+Some users try to use \fB\-pedantic\fR to check programs for conformance.
+They soon find that it does not do quite what they want\-\-\-it finds some
+nonstandard practices, but not all.
+However, improvements to \s-1GNU\s0 Fortran in this area are welcome.
+.Sp
+This should be used in conjunction with \fB\-std=f95\fR,
+\&\fB\-std=f2003\fR or \fB\-std=f2008\fR.
+.IP "\fB\-pedantic\-errors\fR" 4
+.IX Item "-pedantic-errors"
+Like \fB\-pedantic\fR, except that errors are produced rather than
+warnings.
+.IP "\fB\-Wall\fR" 4
+.IX Item "-Wall"
+Enables commonly used warning options pertaining to usage that
+we recommend avoiding and that we believe are easy to avoid.
+This currently includes \fB\-Waliasing\fR, \fB\-Wampersand\fR, 
+\&\fB\-Wconversion\fR, \fB\-Wsurprising\fR, \fB\-Wintrinsics\-std\fR,
+\&\fB\-Wno\-tabs\fR, \fB\-Wintrinsic\-shadow\fR, \fB\-Wline\-truncation\fR,
+\&\fB\-Wreal\-q\-constant\fR and \fB\-Wunused\fR.
+.IP "\fB\-Waliasing\fR" 4
+.IX Item "-Waliasing"
+Warn about possible aliasing of dummy arguments. Specifically, it warns
+if the same actual argument is associated with a dummy argument with
+\&\f(CW\*(C`INTENT(IN)\*(C'\fR and a dummy argument with \f(CW\*(C`INTENT(OUT)\*(C'\fR in a call
+with an explicit interface.
+.Sp
+The following example will trigger the warning.
+.Sp
+.Vb 7
+\&          interface
+\&            subroutine bar(a,b)
+\&              integer, intent(in) :: a
+\&              integer, intent(out) :: b
+\&            end subroutine
+\&          end interface
+\&          integer :: a
+\&        
+\&          call bar(a,a)
+.Ve
+.IP "\fB\-Wampersand\fR" 4
+.IX Item "-Wampersand"
+Warn about missing ampersand in continued character constants. The warning is
+given with \fB\-Wampersand\fR, \fB\-pedantic\fR, \fB\-std=f95\fR,
+\&\fB\-std=f2003\fR and \fB\-std=f2008\fR. Note: With no ampersand
+given in a continued character constant, \s-1GNU\s0 Fortran assumes continuation
+at the first non-comment, non-whitespace character after the ampersand
+that initiated the continuation.
+.IP "\fB\-Warray\-temporaries\fR" 4
+.IX Item "-Warray-temporaries"
+Warn about array temporaries generated by the compiler.  The information
+generated by this warning is sometimes useful in optimization, in order to
+avoid such temporaries.
+.IP "\fB\-Wcharacter\-truncation\fR" 4
+.IX Item "-Wcharacter-truncation"
+Warn when a character assignment will truncate the assigned string.
+.IP "\fB\-Wline\-truncation\fR" 4
+.IX Item "-Wline-truncation"
+Warn when a source code line will be truncated.
+.IP "\fB\-Wconversion\fR" 4
+.IX Item "-Wconversion"
+Warn about implicit conversions that are likely to change the value of 
+the expression after conversion. Implied by \fB\-Wall\fR.
+.IP "\fB\-Wconversion\-extra\fR" 4
+.IX Item "-Wconversion-extra"
+Warn about implicit conversions between different types and kinds.
+.IP "\fB\-Wimplicit\-interface\fR" 4
+.IX Item "-Wimplicit-interface"
+Warn if a procedure is called without an explicit interface.
+Note this only checks that an explicit interface is present.  It does not
+check that the declared interfaces are consistent across program units.
+.IP "\fB\-Wimplicit\-procedure\fR" 4
+.IX Item "-Wimplicit-procedure"
+Warn if a procedure is called that has neither an explicit interface
+nor has been declared as \f(CW\*(C`EXTERNAL\*(C'\fR.
+.IP "\fB\-Wintrinsics\-std\fR" 4
+.IX Item "-Wintrinsics-std"
+Warn if \fBgfortran\fR finds a procedure named like an intrinsic not
+available in the currently selected standard (with \fB\-std\fR) and treats
+it as \f(CW\*(C`EXTERNAL\*(C'\fR procedure because of this.  \fB\-fall\-intrinsics\fR can
+be used to never trigger this behavior and always link to the intrinsic
+regardless of the selected standard.
+.IP "\fB\-Wreal\-q\-constant\fR" 4
+.IX Item "-Wreal-q-constant"
+Produce a warning if a real-literal-constant contains a \f(CW\*(C`q\*(C'\fR
+exponent-letter.
+.IP "\fB\-Wsurprising\fR" 4
+.IX Item "-Wsurprising"
+Produce a warning when \*(L"suspicious\*(R" code constructs are encountered.
+While technically legal these usually indicate that an error has been made.
+.Sp
+This currently produces a warning under the following circumstances:
+.RS 4
+.IP "\(bu" 4
+An \s-1INTEGER\s0 \s-1SELECT\s0 construct has a \s-1CASE\s0 that can never be matched as its
+lower value is greater than its upper value.
+.IP "\(bu" 4
+A \s-1LOGICAL\s0 \s-1SELECT\s0 construct has three \s-1CASE\s0 statements.
+.IP "\(bu" 4
+A \s-1TRANSFER\s0 specifies a source that is shorter than the destination.
+.IP "\(bu" 4
+The type of a function result is declared more than once with the same type.  If
+\&\fB\-pedantic\fR or standard-conforming mode is enabled, this is an error.
+.IP "\(bu" 4
+A \f(CW\*(C`CHARACTER\*(C'\fR variable is declared with negative length.
+.RE
+.RS 4
+.RE
+.IP "\fB\-Wtabs\fR" 4
+.IX Item "-Wtabs"
+By default, tabs are accepted as whitespace, but tabs are not members
+of the Fortran Character Set.  For continuation lines, a tab followed
+by a digit between 1 and 9 is supported.  \fB\-Wno\-tabs\fR will cause
+a warning to be issued if a tab is encountered. Note, \fB\-Wno\-tabs\fR
+is active for \fB\-pedantic\fR, \fB\-std=f95\fR, \fB\-std=f2003\fR,
+\&\fB\-std=f2008\fR and \fB\-Wall\fR.
+.IP "\fB\-Wunderflow\fR" 4
+.IX Item "-Wunderflow"
+Produce a warning when numerical constant expressions are
+encountered, which yield an \s-1UNDERFLOW\s0 during compilation.
+.IP "\fB\-Wintrinsic\-shadow\fR" 4
+.IX Item "-Wintrinsic-shadow"
+Warn if a user-defined procedure or module procedure has the same name as an
+intrinsic; in this case, an explicit interface or \f(CW\*(C`EXTERNAL\*(C'\fR or
+\&\f(CW\*(C`INTRINSIC\*(C'\fR declaration might be needed to get calls later resolved to
+the desired intrinsic/procedure.
+.IP "\fB\-Wunused\-dummy\-argument\fR" 4
+.IX Item "-Wunused-dummy-argument"
+Warn about unused dummy arguments. This option is implied by \fB\-Wall\fR.
+.IP "\fB\-Wunused\-parameter\fR" 4
+.IX Item "-Wunused-parameter"
+Contrary to \fBgcc\fR's meaning of \fB\-Wunused\-parameter\fR,
+\&\fBgfortran\fR's implementation of this option does not warn
+about unused dummy arguments (see \fB\-Wunused\-dummy\-argument\fR),
+but about unused \f(CW\*(C`PARAMETER\*(C'\fR values. \fB\-Wunused\-parameter\fR
+is not included in \fB\-Wall\fR but is implied by \fB\-Wall \-Wextra\fR.
+.IP "\fB\-Walign\-commons\fR" 4
+.IX Item "-Walign-commons"
+By default, \fBgfortran\fR warns about any occasion of variables being
+padded for proper alignment inside a \f(CW\*(C`COMMON\*(C'\fR block. This warning can be turned
+off via \fB\-Wno\-align\-commons\fR. See also \fB\-falign\-commons\fR.
+.IP "\fB\-Werror\fR" 4
+.IX Item "-Werror"
+Turns all warnings into errors.
+.PP
+Some of these have no effect when compiling programs written in Fortran.
+.SS "Options for debugging your program or \s-1GNU\s0 Fortran"
+.IX Subsection "Options for debugging your program or GNU Fortran"
+\&\s-1GNU\s0 Fortran has various special options that are used for debugging
+either your program or the \s-1GNU\s0 Fortran compiler.
+.IP "\fB\-fdump\-fortran\-original\fR" 4
+.IX Item "-fdump-fortran-original"
+Output the internal parse tree after translating the source program
+into internal representation.  Only really useful for debugging the
+\&\s-1GNU\s0 Fortran compiler itself.
+.IP "\fB\-fdump\-optimized\-tree\fR" 4
+.IX Item "-fdump-optimized-tree"
+Output the parse tree after front-end optimization.  Only really
+useful for debugging the \s-1GNU\s0 Fortran compiler itself.
+.Sp
+Output the internal parse tree after translating the source program
+into internal representation.  Only really useful for debugging the
+\&\s-1GNU\s0 Fortran compiler itself.  This option is deprecated; use
+\&\f(CW\*(C`\-fdump\-fortran\-original\*(C'\fR instead.
+.IP "\fB\-ffpe\-trap=\fR\fIlist\fR" 4
+.IX Item "-ffpe-trap=list"
+Specify a list of \s-1IEEE\s0 exceptions when a Floating Point Exception
+(\s-1FPE\s0) should be raised.  On most systems, this will result in a \s-1SIGFPE\s0
+signal being sent and the program being interrupted, producing a core
+file useful for debugging.  \fIlist\fR is a (possibly empty) comma-separated
+list of the following \s-1IEEE\s0 exceptions: \fBinvalid\fR (invalid floating
+point operation, such as \f(CW\*(C`SQRT(\-1.0)\*(C'\fR), \fBzero\fR (division by
+zero), \fBoverflow\fR (overflow in a floating point operation),
+\&\fBunderflow\fR (underflow in a floating point operation),
+\&\fBprecision\fR (loss of precision during operation) and \fBdenormal\fR
+(operation produced a denormal value).
+.Sp
+Some of the routines in the Fortran runtime library, like
+\&\fB\s-1CPU_TIME\s0\fR, are likely to trigger floating point exceptions when
+\&\f(CW\*(C`ffpe\-trap=precision\*(C'\fR is used. For this reason, the use of 
+\&\f(CW\*(C`ffpe\-trap=precision\*(C'\fR is not recommended.
+.IP "\fB\-fbacktrace\fR" 4
+.IX Item "-fbacktrace"
+Specify that, when a runtime error is encountered or a deadly signal is
+emitted (segmentation fault, illegal instruction, bus error or
+floating-point exception), the Fortran runtime
+library should output a backtrace of the error.  This option
+only has influence for compilation of the Fortran main program.
+.IP "\fB\-fdump\-core\fR" 4
+.IX Item "-fdump-core"
+Request that a core-dump file is written to disk when a runtime error
+is encountered on systems that support core dumps. This option is
+only effective for the compilation of the Fortran main program.
+.SS "Options for directory search"
+.IX Subsection "Options for directory search"
+These options affect how \s-1GNU\s0 Fortran searches
+for files specified by the \f(CW\*(C`INCLUDE\*(C'\fR directive and where it searches
+for previously compiled modules.
+.PP
+It also affects the search paths used by \fBcpp\fR when used to preprocess
+Fortran source.
+.IP "\fB\-I\fR\fIdir\fR" 4
+.IX Item "-Idir"
+These affect interpretation of the \f(CW\*(C`INCLUDE\*(C'\fR directive
+(as well as of the \f(CW\*(C`#include\*(C'\fR directive of the \fBcpp\fR
+preprocessor).
+.Sp
+Also note that the general behavior of \fB\-I\fR and
+\&\f(CW\*(C`INCLUDE\*(C'\fR is pretty much the same as of \fB\-I\fR with
+\&\f(CW\*(C`#include\*(C'\fR in the \fBcpp\fR preprocessor, with regard to
+looking for \fIheader.gcc\fR files and other such things.
+.Sp
+This path is also used to search for \fI.mod\fR files when previously
+compiled modules are required by a \f(CW\*(C`USE\*(C'\fR statement.
+.IP "\fB\-J\fR\fIdir\fR" 4
+.IX Item "-Jdir"
+This option specifies where to put \fI.mod\fR files for compiled modules.
+It is also added to the list of directories to searched by an \f(CW\*(C`USE\*(C'\fR
+statement.
+.Sp
+The default is the current directory.
+.IP "\fB\-fintrinsic\-modules\-path\fR \fIdir\fR" 4
+.IX Item "-fintrinsic-modules-path dir"
+This option specifies the location of pre-compiled intrinsic modules, if
+they are not in the default location expected by the compiler.
+.SS "Influencing the linking step"
+.IX Subsection "Influencing the linking step"
+These options come into play when the compiler links object files into an 
+executable output file. They are meaningless if the compiler is not doing 
+a link step.
+.IP "\fB\-static\-libgfortran\fR" 4
+.IX Item "-static-libgfortran"
+On systems that provide \fIlibgfortran\fR as a shared and a static
+library, this option forces the use of the static version. If no
+shared version of \fIlibgfortran\fR was built when the compiler was
+configured, this option has no effect.
+.SS "Influencing runtime behavior"
+.IX Subsection "Influencing runtime behavior"
+These options affect the runtime behavior of programs compiled with \s-1GNU\s0 Fortran.
+.IP "\fB\-fconvert=\fR\fIconversion\fR" 4
+.IX Item "-fconvert=conversion"
+Specify the representation of data for unformatted files.  Valid
+values for conversion are: \fBnative\fR, the default; \fBswap\fR,
+swap between big\- and little-endian; \fBbig-endian\fR, use big-endian
+representation for unformatted files; \fBlittle-endian\fR, use little-endian
+representation for unformatted files.
+.Sp
+\&\fIThis option has an effect only when used in the main program.
+The \f(CI\*(C`CONVERT\*(C'\fI specifier and the \s-1GFORTRAN_CONVERT_UNIT\s0 environment
+variable override the default specified by \f(BI\-fconvert\fI.\fR
+.IP "\fB\-fno\-range\-check\fR" 4
+.IX Item "-fno-range-check"
+Disable range checking of input values during integer \f(CW\*(C`READ\*(C'\fR operations.
+For example, \s-1GNU\s0 Fortran will give an error if an input value is
+outside of the relevant range of [\f(CW\*(C`\-HUGE()\*(C'\fR:\f(CW\*(C`HUGE()\*(C'\fR]. In other words,
+with \f(CW\*(C`INTEGER (kind=4) :: i\*(C'\fR , attempting to read \-2147483648 will
+give an error unless \fB\-fno\-range\-check\fR is given.
+.IP "\fB\-frecord\-marker=\fR\fIlength\fR" 4
+.IX Item "-frecord-marker=length"
+Specify the length of record markers for unformatted files.
+Valid values for \fIlength\fR are 4 and 8.  Default is 4.
+\&\fIThis is different from previous versions of\fR \fBgfortran\fR,
+which specified a default record marker length of 8 on most
+systems.  If you want to read or write files compatible
+with earlier versions of \fBgfortran\fR, use \fB\-frecord\-marker=8\fR.
+.IP "\fB\-fmax\-subrecord\-length=\fR\fIlength\fR" 4
+.IX Item "-fmax-subrecord-length=length"
+Specify the maximum length for a subrecord.  The maximum permitted
+value for length is 2147483639, which is also the default.  Only
+really useful for use by the gfortran testsuite.
+.IP "\fB\-fsign\-zero\fR" 4
+.IX Item "-fsign-zero"
+When enabled, floating point numbers of value zero with the sign bit set
+are written as negative number in formatted output and treated as
+negative in the \f(CW\*(C`SIGN\*(C'\fR intrinsic.  \f(CW\*(C`fno\-sign\-zero\*(C'\fR does not
+print the negative sign of zero values and regards zero as positive
+number in the \f(CW\*(C`SIGN\*(C'\fR intrinsic for compatibility with F77.
+Default behavior is to show the negative sign.
+.SS "Options for code generation conventions"
+.IX Subsection "Options for code generation conventions"
+These machine-independent options control the interface conventions
+used in code generation.
+.PP
+Most of them have both positive and negative forms; the negative form
+of \fB\-ffoo\fR would be \fB\-fno\-foo\fR.  In the table below, only
+one of the forms is listed\-\-\-the one which is not the default.  You
+can figure out the other form by either removing \fBno\-\fR or adding
+it.
+.IP "\fB\-fno\-automatic\fR" 4
+.IX Item "-fno-automatic"
+Treat each program unit (except those marked as \s-1RECURSIVE\s0) as if the
+\&\f(CW\*(C`SAVE\*(C'\fR statement were specified for every local variable and array
+referenced in it. Does not affect common blocks. (Some Fortran compilers
+provide this option under the name \fB\-static\fR or \fB\-save\fR.)
+The default, which is \fB\-fautomatic\fR, uses the stack for local
+variables smaller than the value given by \fB\-fmax\-stack\-var\-size\fR.
+Use the option \fB\-frecursive\fR to use no static memory.
+.IP "\fB\-ff2c\fR" 4
+.IX Item "-ff2c"
+Generate code designed to be compatible with code generated
+by \fBg77\fR and \fBf2c\fR.
+.Sp
+The calling conventions used by \fBg77\fR (originally implemented
+in \fBf2c\fR) require functions that return type
+default \f(CW\*(C`REAL\*(C'\fR to actually return the C type \f(CW\*(C`double\*(C'\fR, and
+functions that return type \f(CW\*(C`COMPLEX\*(C'\fR to return the values via an
+extra argument in the calling sequence that points to where to
+store the return value.  Under the default \s-1GNU\s0 calling conventions, such
+functions simply return their results as they would in \s-1GNU\s0
+C\-\-\-default \f(CW\*(C`REAL\*(C'\fR functions return the C type \f(CW\*(C`float\*(C'\fR, and
+\&\f(CW\*(C`COMPLEX\*(C'\fR functions return the \s-1GNU\s0 C type \f(CW\*(C`complex\*(C'\fR.
+Additionally, this option implies the \fB\-fsecond\-underscore\fR
+option, unless \fB\-fno\-second\-underscore\fR is explicitly requested.
+.Sp
+This does not affect the generation of code that interfaces with
+the \fBlibgfortran\fR library.
+.Sp
+\&\fICaution:\fR It is not a good idea to mix Fortran code compiled with
+\&\fB\-ff2c\fR with code compiled with the default \fB\-fno\-f2c\fR
+calling conventions as, calling \f(CW\*(C`COMPLEX\*(C'\fR or default \f(CW\*(C`REAL\*(C'\fR
+functions between program parts which were compiled with different
+calling conventions will break at execution time.
+.Sp
+\&\fICaution:\fR This will break code which passes intrinsic functions
+of type default \f(CW\*(C`REAL\*(C'\fR or \f(CW\*(C`COMPLEX\*(C'\fR as actual arguments, as
+the library implementations use the \fB\-fno\-f2c\fR calling conventions.
+.IP "\fB\-fno\-underscoring\fR" 4
+.IX Item "-fno-underscoring"
+Do not transform names of entities specified in the Fortran
+source file by appending underscores to them.
+.Sp
+With \fB\-funderscoring\fR in effect, \s-1GNU\s0 Fortran appends one
+underscore to external names with no underscores.  This is done to ensure
+compatibility with code produced by many \s-1UNIX\s0 Fortran compilers.
+.Sp
+\&\fICaution\fR: The default behavior of \s-1GNU\s0 Fortran is
+incompatible with \fBf2c\fR and \fBg77\fR, please use the
+\&\fB\-ff2c\fR option if you want object files compiled with
+\&\s-1GNU\s0 Fortran to be compatible with object code created with these
+tools.
+.Sp
+Use of \fB\-fno\-underscoring\fR is not recommended unless you are
+experimenting with issues such as integration of \s-1GNU\s0 Fortran into
+existing system environments (vis\-a\*`\-vis existing libraries, tools,
+and so on).
+.Sp
+For example, with \fB\-funderscoring\fR, and assuming other defaults like
+\&\fB\-fcase\-lower\fR and that \f(CW\*(C`j()\*(C'\fR and \f(CW\*(C`max_count()\*(C'\fR are
+external functions while \f(CW\*(C`my_var\*(C'\fR and \f(CW\*(C`lvar\*(C'\fR are local variables,
+a statement like
+.Sp
+.Vb 1
+\&        I = J() + MAX_COUNT (MY_VAR, LVAR)
+.Ve
+.Sp
+is implemented as something akin to:
+.Sp
+.Vb 1
+\&        i = j_() + max_count_\|_(&my_var_\|_, &lvar);
+.Ve
+.Sp
+With \fB\-fno\-underscoring\fR, the same statement is implemented as:
+.Sp
+.Vb 1
+\&        i = j() + max_count(&my_var, &lvar);
+.Ve
+.Sp
+Use of \fB\-fno\-underscoring\fR allows direct specification of
+user-defined names while debugging and when interfacing \s-1GNU\s0 Fortran
+code with other languages.
+.Sp
+Note that just because the names match does \fInot\fR mean that the
+interface implemented by \s-1GNU\s0 Fortran for an external name matches the
+interface implemented by some other language for that same name.
+That is, getting code produced by \s-1GNU\s0 Fortran to link to code produced
+by some other compiler using this or any other method can be only a
+small part of the overall solution\-\-\-getting the code generated by
+both compilers to agree on issues other than naming can require
+significant effort, and, unlike naming disagreements, linkers normally
+cannot detect disagreements in these other areas.
+.Sp
+Also, note that with \fB\-fno\-underscoring\fR, the lack of appended
+underscores introduces the very real possibility that a user-defined
+external name will conflict with a name in a system library, which
+could make finding unresolved-reference bugs quite difficult in some
+cases\-\-\-they might occur at program run time, and show up only as
+buggy behavior at run time.
+.Sp
+In future versions of \s-1GNU\s0 Fortran we hope to improve naming and linking
+issues so that debugging always involves using the names as they appear
+in the source, even if the names as seen by the linker are mangled to
+prevent accidental linking between procedures with incompatible
+interfaces.
+.IP "\fB\-fno\-whole\-file\fR" 4
+.IX Item "-fno-whole-file"
+This flag causes the compiler to resolve and translate each procedure in
+a file separately.
+.Sp
+By default, the whole file is parsed and placed in a single front-end tree.
+During resolution, in addition to all the usual checks and fixups, references
+to external procedures that are in the same file effect resolution of
+that procedure, if not already done, and a check of the interfaces.  The
+dependences are resolved by changing the order in which the file is
+translated into the backend tree.  Thus, a procedure that is referenced
+is translated before the reference and the duplication of backend tree
+declarations eliminated.
+.Sp
+The \fB\-fno\-whole\-file\fR option is deprecated and may lead to wrong code.
+.IP "\fB\-fsecond\-underscore\fR" 4
+.IX Item "-fsecond-underscore"
+By default, \s-1GNU\s0 Fortran appends an underscore to external
+names.  If this option is used \s-1GNU\s0 Fortran appends two
+underscores to names with underscores and one underscore to external names
+with no underscores.  \s-1GNU\s0 Fortran also appends two underscores to
+internal names with underscores to avoid naming collisions with external
+names.
+.Sp
+This option has no effect if \fB\-fno\-underscoring\fR is
+in effect.  It is implied by the \fB\-ff2c\fR option.
+.Sp
+Otherwise, with this option, an external name such as \f(CW\*(C`MAX_COUNT\*(C'\fR
+is implemented as a reference to the link-time external symbol
+\&\f(CW\*(C`max_count_\|_\*(C'\fR, instead of \f(CW\*(C`max_count_\*(C'\fR.  This is required
+for compatibility with \fBg77\fR and \fBf2c\fR, and is implied
+by use of the \fB\-ff2c\fR option.
+.IP "\fB\-fcoarray=\fR\fI<keyword>\fR" 4
+.IX Item "-fcoarray=<keyword>"
+.RS 4
+.PD 0
+.IP "\fBnone\fR" 4
+.IX Item "none"
+.PD
+Disable coarray support; using coarray declarations and image-control
+statements will produce a compile-time error. (Default)
+.IP "\fBsingle\fR" 4
+.IX Item "single"
+Single-image mode, i.e. \f(CW\*(C`num_images()\*(C'\fR is always one.
+.RE
+.RS 4
+.RE
+.IP "\fB\-fcheck=\fR\fI<keyword>\fR" 4
+.IX Item "-fcheck=<keyword>"
+Enable the generation of run-time checks; the argument shall be
+a comma-delimited list of the following keywords.
+.RS 4
+.IP "\fBall\fR" 4
+.IX Item "all"
+Enable all run-time test of \fB\-fcheck\fR.
+.IP "\fBarray-temps\fR" 4
+.IX Item "array-temps"
+Warns at run time when for passing an actual argument a temporary array
+had to be generated. The information generated by this warning is
+sometimes useful in optimization, in order to avoid such temporaries.
+.Sp
+Note: The warning is only printed once per location.
+.IP "\fBbounds\fR" 4
+.IX Item "bounds"
+Enable generation of run-time checks for array subscripts
+and against the declared minimum and maximum values.  It also
+checks array indices for assumed and deferred
+shape arrays against the actual allocated bounds and ensures that all string
+lengths are equal for character array constructors without an explicit
+typespec.
+.Sp
+Some checks require that \fB\-fcheck=bounds\fR is set for
+the compilation of the main program.
+.Sp
+Note: In the future this may also include other forms of checking, e.g.,
+checking substring references.
+.IP "\fBdo\fR" 4
+.IX Item "do"
+Enable generation of run-time checks for invalid modification of loop
+iteration variables.
+.IP "\fBmem\fR" 4
+.IX Item "mem"
+Enable generation of run-time checks for memory allocation.
+Note: This option does not affect explicit allocations using the
+\&\f(CW\*(C`ALLOCATE\*(C'\fR statement, which will be always checked.
+.IP "\fBpointer\fR" 4
+.IX Item "pointer"
+Enable generation of run-time checks for pointers and allocatables.
+.IP "\fBrecursion\fR" 4
+.IX Item "recursion"
+Enable generation of run-time checks for recursively called subroutines and
+functions which are not marked as recursive. See also \fB\-frecursive\fR.
+Note: This check does not work for OpenMP programs and is disabled if used
+together with \fB\-frecursive\fR and \fB\-fopenmp\fR.
+.RE
+.RS 4
+.RE
+.IP "\fB\-fbounds\-check\fR" 4
+.IX Item "-fbounds-check"
+Deprecated alias for \fB\-fcheck=bounds\fR.
+.IP "\fB\-fcheck\-array\-temporaries\fR" 4
+.IX Item "-fcheck-array-temporaries"
+Deprecated alias for \fB\-fcheck=array\-temps\fR.
+.IP "\fB\-fmax\-array\-constructor=\fR\fIn\fR" 4
+.IX Item "-fmax-array-constructor=n"
+This option can be used to increase the upper limit permitted in 
+array constructors.  The code below requires this option to expand
+the array at compile time.
+.Sp
+.Vb 7
+\&        program test
+\&        implicit none
+\&        integer j
+\&        integer, parameter :: n = 100000
+\&        integer, parameter :: i(n) = (/ (2*j, j = 1, n) /)
+\&        print \*(Aq(10(I0,1X))\*(Aq, i
+\&        end program test
+.Ve
+.Sp
+\&\fICaution:  This option can lead to long compile times and excessively
+large object files.\fR
+.Sp
+The default value for \fIn\fR is 65535.
+.IP "\fB\-fmax\-stack\-var\-size=\fR\fIn\fR" 4
+.IX Item "-fmax-stack-var-size=n"
+This option specifies the size in bytes of the largest array that will be put
+on the stack; if the size is exceeded static memory is used (except in
+procedures marked as \s-1RECURSIVE\s0). Use the option \fB\-frecursive\fR to
+allow for recursive procedures which do not have a \s-1RECURSIVE\s0 attribute or
+for parallel programs. Use \fB\-fno\-automatic\fR to never use the stack.
+.Sp
+This option currently only affects local arrays declared with constant
+bounds, and may not apply to all character variables.
+Future versions of \s-1GNU\s0 Fortran may improve this behavior.
+.Sp
+The default value for \fIn\fR is 32768.
+.IP "\fB\-fpack\-derived\fR" 4
+.IX Item "-fpack-derived"
+This option tells \s-1GNU\s0 Fortran to pack derived type members as closely as
+possible.  Code compiled with this option is likely to be incompatible
+with code compiled without this option, and may execute slower.
+.IP "\fB\-frepack\-arrays\fR" 4
+.IX Item "-frepack-arrays"
+In some circumstances \s-1GNU\s0 Fortran may pass assumed shape array
+sections via a descriptor describing a noncontiguous area of memory.
+This option adds code to the function prologue to repack the data into
+a contiguous block at runtime.
+.Sp
+This should result in faster accesses to the array.  However it can introduce
+significant overhead to the function call, especially  when the passed data
+is noncontiguous.
+.IP "\fB\-fshort\-enums\fR" 4
+.IX Item "-fshort-enums"
+This option is provided for interoperability with C code that was
+compiled with the \fB\-fshort\-enums\fR option.  It will make
+\&\s-1GNU\s0 Fortran choose the smallest \f(CW\*(C`INTEGER\*(C'\fR kind a given
+enumerator set will fit in, and give all its enumerators this kind.
+.IP "\fB\-fexternal\-blas\fR" 4
+.IX Item "-fexternal-blas"
+This option will make \fBgfortran\fR generate calls to \s-1BLAS\s0 functions
+for some matrix operations like \f(CW\*(C`MATMUL\*(C'\fR, instead of using our own
+algorithms, if the size of the matrices involved is larger than a given
+limit (see \fB\-fblas\-matmul\-limit\fR).  This may be profitable if an
+optimized vendor \s-1BLAS\s0 library is available.  The \s-1BLAS\s0 library will have
+to be specified at link time.
+.IP "\fB\-fblas\-matmul\-limit=\fR\fIn\fR" 4
+.IX Item "-fblas-matmul-limit=n"
+Only significant when \fB\-fexternal\-blas\fR is in effect.
+Matrix multiplication of matrices with size larger than (or equal to) \fIn\fR
+will be performed by calls to \s-1BLAS\s0 functions, while others will be
+handled by \fBgfortran\fR internal algorithms. If the matrices
+involved are not square, the size comparison is performed using the
+geometric mean of the dimensions of the argument and result matrices.
+.Sp
+The default value for \fIn\fR is 30.
+.IP "\fB\-frecursive\fR" 4
+.IX Item "-frecursive"
+Allow indirect recursion by forcing all local arrays to be allocated
+on the stack. This flag cannot be used together with
+\&\fB\-fmax\-stack\-var\-size=\fR or \fB\-fno\-automatic\fR.
+.IP "\fB\-finit\-local\-zero\fR" 4
+.IX Item "-finit-local-zero"
+.PD 0
+.IP "\fB\-finit\-integer=\fR\fIn\fR" 4
+.IX Item "-finit-integer=n"
+.IP "\fB\-finit\-real=\fR\fI<zero|inf|\-inf|nan|snan>\fR" 4
+.IX Item "-finit-real=<zero|inf|-inf|nan|snan>"
+.IP "\fB\-finit\-logical=\fR\fI<true|false>\fR" 4
+.IX Item "-finit-logical=<true|false>"
+.IP "\fB\-finit\-character=\fR\fIn\fR" 4
+.IX Item "-finit-character=n"
+.PD
+The \fB\-finit\-local\-zero\fR option instructs the compiler to
+initialize local \f(CW\*(C`INTEGER\*(C'\fR, \f(CW\*(C`REAL\*(C'\fR, and \f(CW\*(C`COMPLEX\*(C'\fR
+variables to zero, \f(CW\*(C`LOGICAL\*(C'\fR variables to false, and
+\&\f(CW\*(C`CHARACTER\*(C'\fR variables to a string of null bytes.  Finer-grained
+initialization options are provided by the
+\&\fB\-finit\-integer=\fR\fIn\fR,
+\&\fB\-finit\-real=\fR\fI<zero|inf|\-inf|nan|snan>\fR (which also initializes
+the real and imaginary parts of local \f(CW\*(C`COMPLEX\*(C'\fR variables),
+\&\fB\-finit\-logical=\fR\fI<true|false>\fR, and
+\&\fB\-finit\-character=\fR\fIn\fR (where \fIn\fR is an \s-1ASCII\s0 character
+value) options.  These options do not initialize
+.RS 4
+.IP "\(bu" 4
+allocatable arrays
+.IP "\(bu" 4
+components of derived type variables
+.IP "\(bu" 4
+variables that appear in an \f(CW\*(C`EQUIVALENCE\*(C'\fR statement.
+.RE
+.RS 4
+.Sp
+(These limitations may be removed in future releases).
+.Sp
+Note that the \fB\-finit\-real=nan\fR option initializes \f(CW\*(C`REAL\*(C'\fR
+and \f(CW\*(C`COMPLEX\*(C'\fR variables with a quiet NaN. For a signalling NaN
+use \fB\-finit\-real=snan\fR; note, however, that compile-time
+optimizations may convert them into quiet NaN and that trapping
+needs to be enabled (e.g. via \fB\-ffpe\-trap\fR).
+.RE
+.IP "\fB\-falign\-commons\fR" 4
+.IX Item "-falign-commons"
+By default, \fBgfortran\fR enforces proper alignment of all variables in a
+\&\f(CW\*(C`COMMON\*(C'\fR block by padding them as needed. On certain platforms this is mandatory,
+on others it increases performance. If a \f(CW\*(C`COMMON\*(C'\fR block is not declared with
+consistent data types everywhere, this padding can cause trouble, and
+\&\fB\-fno\-align\-commons\fR can be used to disable automatic alignment. The
+same form of this option should be used for all files that share a \f(CW\*(C`COMMON\*(C'\fR block.
+To avoid potential alignment issues in \f(CW\*(C`COMMON\*(C'\fR blocks, it is recommended to order
+objects from largest to smallest.
+.IP "\fB\-fno\-protect\-parens\fR" 4
+.IX Item "-fno-protect-parens"
+By default the parentheses in expression are honored for all optimization
+levels such that the compiler does not do any re-association. Using
+\&\fB\-fno\-protect\-parens\fR allows the compiler to reorder \f(CW\*(C`REAL\*(C'\fR and
+\&\f(CW\*(C`COMPLEX\*(C'\fR expressions to produce faster code. Note that for the re-association
+optimization \fB\-fno\-signed\-zeros\fR and \fB\-fno\-trapping\-math\fR
+need to be in effect.
+.IP "\fB\-frealloc\-lhs\fR" 4
+.IX Item "-frealloc-lhs"
+An allocatable left-hand side of an intrinsic assignment is automatically
+(re)allocated if it is either unallocated or has a different shape. The
+option is enabled by default except when \fB\-std=f95\fR is given.
+.SH "ENVIRONMENT"
+.IX Header "ENVIRONMENT"
+The \fBgfortran\fR compiler currently does not make use of any environment
+variables to control its operation above and beyond those
+that affect the operation of \fBgcc\fR.
+.SH "BUGS"
+.IX Header "BUGS"
+For instructions on reporting bugs, see
+<\fBhttp://gcc.gnu.org/bugs.html\fR>.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
+\&\fIcpp\fR\|(1), \fIgcov\fR\|(1), \fIgcc\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), \fIgdb\fR\|(1), \fIadb\fR\|(1), \fIdbx\fR\|(1), \fIsdb\fR\|(1)
+and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIgfortran\fR, \fIas\fR,
+\&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
+.SH "AUTHOR"
+.IX Header "AUTHOR"
+See the Info entry for \fBgfortran\fR for contributors to \s-1GCC\s0 and
+\&\s-1GNU\s0 Fortran.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
+Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being \*(L"Funding Free Software\*(R", the Front-Cover
+Texts being (a) (see below), and with the Back-Cover Texts being (b)
+(see below).  A copy of the license is included in the \fIgfdl\fR\|(7) man page.
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\&     A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\&     You have freedom to copy and modify this GNU Manual, like GNU
+\&     software.  Copies published by the Free Software Foundation raise
+\&     funds for GNU development.
+.Ve
diff --git a/gcc/doc/gij.1 b/gcc/doc/gij.1
new file mode 100644
index 000000000..8de2bf40b
--- /dev/null
+++ b/gcc/doc/gij.1
@@ -0,0 +1,286 @@
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+..
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+.    ds -- \|\(em\|
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+.    ds R" ''
+'br\}
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+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
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+.    de IX
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+..
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+.    rr F
+.\}
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+.    de IX
+..
+.\}
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+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
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+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
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+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
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+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GIJ 1"
+.TH GIJ 1 "2013-04-12" "gcc-4.6.4" "GNU"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+gij \- GNU interpreter for Java bytecode
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+gij [\fB\s-1OPTION\s0\fR] ... \fI\s-1JARFILE\s0\fR [\fI\s-1ARGS\s0\fR...]
+.PP
+gij [\fB\-jar\fR] [\fB\s-1OPTION\s0\fR] ... \fI\s-1CLASS\s0\fR [\fI\s-1ARGS\s0\fR...]
+  [\fB\-cp\fR \fIpath\fR] [\fB\-classpath\fR \fIpath\fR]
+  [\fB\-D\fR\fIname\fR[=\fIvalue\fR]...]
+  [\fB\-ms=\fR\fInumber\fR] [\fB\-mx=\fR\fInumber\fR]
+  [\fB\-X\fR\fIargument\fR] [\fB\-verbose\fR] [\fB\-verbose:class\fR]
+  [\fB\-\-showversion\fR] [\fB\-\-version\fR] [\fB\-\-help\fR][\fB\-?\fR]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\f(CW\*(C`gij\*(C'\fR is a Java bytecode interpreter included with \f(CW\*(C`libgcj\*(C'\fR.
+\&\f(CW\*(C`gij\*(C'\fR is not available on every platform; porting it requires a
+small amount of assembly programming which has not been done for all the
+targets supported by \fBgcj\fR.
+.PP
+The primary argument to \f(CW\*(C`gij\*(C'\fR is the name of a class or, with
+\&\f(CW\*(C`\-jar\*(C'\fR, a jar file.  Options before this argument are interpreted
+by \f(CW\*(C`gij\*(C'\fR; remaining options are passed to the interpreted program.
+.PP
+If a class name is specified and this class does not have a \f(CW\*(C`main\*(C'\fR
+method with the appropriate signature (a \f(CW\*(C`static void\*(C'\fR method with
+a \f(CW\*(C`String[]\*(C'\fR as its sole argument), then \f(CW\*(C`gij\*(C'\fR will print an
+error and exit.
+.PP
+If a jar file is specified then \f(CW\*(C`gij\*(C'\fR will use information in it to
+determine which class' \f(CW\*(C`main\*(C'\fR method will be invoked.
+.PP
+\&\f(CW\*(C`gij\*(C'\fR will invoke the \f(CW\*(C`main\*(C'\fR method with all the remaining
+command-line options.
+.PP
+Note that \f(CW\*(C`gij\*(C'\fR is not limited to interpreting code.  Because
+\&\f(CW\*(C`libgcj\*(C'\fR includes a class loader which can dynamically load shared
+objects, it is possible to give \f(CW\*(C`gij\*(C'\fR the name of a class which has
+been compiled and put into a shared library on the class path.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-cp\fR \fIpath\fR" 4
+.IX Item "-cp path"
+.PD 0
+.IP "\fB\-classpath\fR \fIpath\fR" 4
+.IX Item "-classpath path"
+.PD
+Set the initial class path.  The class path is used for finding
+class and resource files.  If specified, this option overrides the
+\&\f(CW\*(C`CLASSPATH\*(C'\fR environment variable.  Note that this option is
+ignored if \f(CW\*(C`\-jar\*(C'\fR is used.
+.IP "\fB\-D\fR\fIname\fR\fB[=\fR\fIvalue\fR\fB]\fR" 4
+.IX Item "-Dname[=value]"
+This defines a system property named \fIname\fR with value \fIvalue\fR.
+If \fIvalue\fR is not specified then it defaults to the empty string.
+These system properties are initialized at the program's startup and can
+be retrieved at runtime using the \f(CW\*(C`java.lang.System.getProperty\*(C'\fR
+method.
+.IP "\fB\-ms=\fR\fInumber\fR" 4
+.IX Item "-ms=number"
+Equivalent to \f(CW\*(C`\-Xms\*(C'\fR.
+.IP "\fB\-mx=\fR\fInumber\fR" 4
+.IX Item "-mx=number"
+Equivalent to \f(CW\*(C`\-Xmx\*(C'\fR.
+.IP "\fB\-noverify\fR" 4
+.IX Item "-noverify"
+Do not verify compliance of bytecode with the \s-1VM\s0 specification. In addition,
+this option disables type verification which is otherwise performed on BC-ABI
+compiled code.
+.IP "\fB\-X\fR" 4
+.IX Item "-X"
+.PD 0
+.IP "\fB\-X\fR\fIargument\fR" 4
+.IX Item "-Xargument"
+.PD
+Supplying \f(CW\*(C`\-X\*(C'\fR by itself will cause \f(CW\*(C`gij\*(C'\fR to list all the
+supported \f(CW\*(C`\-X\*(C'\fR options.  Currently these options are supported:
+.RS 4
+.IP "\fB\-Xms\fR\fIsize\fR" 4
+.IX Item "-Xmssize"
+Set the initial heap size.
+.IP "\fB\-Xmx\fR\fIsize\fR" 4
+.IX Item "-Xmxsize"
+Set the maximum heap size.
+.IP "\fB\-Xss\fR\fIsize\fR" 4
+.IX Item "-Xsssize"
+Set the thread stack size.
+.RE
+.RS 4
+.Sp
+Unrecognized \f(CW\*(C`\-X\*(C'\fR options are ignored, for compatibility with
+other runtimes.
+.RE
+.IP "\fB\-jar\fR" 4
+.IX Item "-jar"
+This indicates that the name passed to \f(CW\*(C`gij\*(C'\fR should be interpreted
+as the name of a jar file, not a class.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD 0
+.IP "\fB\-?\fR" 4
+.IX Item "-?"
+.PD
+Print help, then exit.
+.IP "\fB\-\-showversion\fR" 4
+.IX Item "--showversion"
+Print version number and continue.
+.IP "\fB\-\-fullversion\fR" 4
+.IX Item "--fullversion"
+Print detailed version information, then exit.
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+Print version number, then exit.
+.IP "\fB\-verbose\fR" 4
+.IX Item "-verbose"
+.PD 0
+.IP "\fB\-verbose:class\fR" 4
+.IX Item "-verbose:class"
+.PD
+Each time a class is initialized, print a short message on standard error.
+.PP
+\&\f(CW\*(C`gij\*(C'\fR also recognizes and ignores the following options, for
+compatibility with existing application launch scripts:
+\&\f(CW\*(C`\-client\*(C'\fR, \f(CW\*(C`\-server\*(C'\fR, \f(CW\*(C`\-hotspot\*(C'\fR, \f(CW\*(C`\-jrockit\*(C'\fR,
+\&\f(CW\*(C`\-agentlib\*(C'\fR, \f(CW\*(C`\-agentpath\*(C'\fR, \f(CW\*(C`\-debug\*(C'\fR, \f(CW\*(C`\-d32\*(C'\fR,
+\&\f(CW\*(C`\-d64\*(C'\fR, \f(CW\*(C`\-javaagent\*(C'\fR, \f(CW\*(C`\-noclassgc\*(C'\fR, \f(CW\*(C`\-verify\*(C'\fR,
+and \f(CW\*(C`\-verifyremote\*(C'\fR.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgcc\fR\|(1), \fIgcj\fR\|(1), \fIgcjh\fR\|(1), \fIjcf\-dump\fR\|(1), \fIgfdl\fR\|(7),
+and the Info entries for \fIgcj\fR and \fIgcc\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, the Front-Cover Texts being (a) (see below), and
+with the Back-Cover Texts being (b) (see below).
+A copy of the license is included in the
+man page \fIgfdl\fR\|(7).
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\&     A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\&     You have freedom to copy and modify this GNU Manual, like GNU
+\&     software.  Copies published by the Free Software Foundation raise
+\&     funds for GNU development.
+.Ve
diff --git a/gcc/doc/gimple.texi b/gcc/doc/gimple.texi
new file mode 100644
index 000000000..2cb81c81f
--- /dev/null
+++ b/gcc/doc/gimple.texi
@@ -0,0 +1,2574 @@
+@c Copyright (c) 2008, 2009, 2010 Free Software Foundation, Inc.
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node GIMPLE
+@chapter GIMPLE
+@cindex GIMPLE
+
+GIMPLE is a three-address representation derived from GENERIC by
+breaking down GENERIC expressions into tuples of no more than 3
+operands (with some exceptions like function calls).  GIMPLE was
+heavily influenced by the SIMPLE IL used by the McCAT compiler
+project at McGill University, though we have made some different
+choices.  For one thing, SIMPLE doesn't support @code{goto}.
+
+Temporaries are introduced to hold intermediate values needed to
+compute complex expressions. Additionally, all the control
+structures used in GENERIC are lowered into conditional jumps,
+lexical scopes are removed and exception regions are converted
+into an on the side exception region tree.
+
+The compiler pass which converts GENERIC into GIMPLE is referred to as
+the @samp{gimplifier}.  The gimplifier works recursively, generating
+GIMPLE tuples out of the original GENERIC expressions.
+
+One of the early implementation strategies used for the GIMPLE
+representation was to use the same internal data structures used
+by front ends to represent parse trees. This simplified
+implementation because we could leverage existing functionality
+and interfaces. However, GIMPLE is a much more restrictive
+representation than abstract syntax trees (AST), therefore it
+does not require the full structural complexity provided by the
+main tree data structure.
+
+The GENERIC representation of a function is stored in the
+@code{DECL_SAVED_TREE} field of the associated @code{FUNCTION_DECL}
+tree node.  It is converted to GIMPLE by a call to
+@code{gimplify_function_tree}.
+
+If a front end wants to include language-specific tree codes in the tree
+representation which it provides to the back end, it must provide a
+definition of @code{LANG_HOOKS_GIMPLIFY_EXPR} which knows how to
+convert the front end trees to GIMPLE@.  Usually such a hook will involve
+much of the same code for expanding front end trees to RTL@.  This function
+can return fully lowered GIMPLE, or it can return GENERIC trees and let the
+main gimplifier lower them the rest of the way; this is often simpler.
+GIMPLE that is not fully lowered is known as ``High GIMPLE'' and
+consists of the IL before the pass @code{pass_lower_cf}.  High GIMPLE
+contains some container statements like lexical scopes
+(represented by @code{GIMPLE_BIND}) and nested expressions (e.g.,
+@code{GIMPLE_TRY}), while ``Low GIMPLE'' exposes all of the
+implicit jumps for control and exception expressions directly in
+the IL and EH region trees.
+
+The C and C++ front ends currently convert directly from front end
+trees to GIMPLE, and hand that off to the back end rather than first
+converting to GENERIC@.  Their gimplifier hooks know about all the
+@code{_STMT} nodes and how to convert them to GENERIC forms.  There
+was some work done on a genericization pass which would run first, but
+the existence of @code{STMT_EXPR} meant that in order to convert all
+of the C statements into GENERIC equivalents would involve walking the
+entire tree anyway, so it was simpler to lower all the way.  This
+might change in the future if someone writes an optimization pass
+which would work better with higher-level trees, but currently the
+optimizers all expect GIMPLE@.
+
+You can request to dump a C-like representation of the GIMPLE form
+with the flag @option{-fdump-tree-gimple}.
+
+@menu
+* Tuple representation::
+* GIMPLE instruction set::
+* GIMPLE Exception Handling::
+* Temporaries::
+* Operands::
+* Manipulating GIMPLE statements::
+* Tuple specific accessors::
+* GIMPLE sequences::
+* Sequence iterators::
+* Adding a new GIMPLE statement code::
+* Statement and operand traversals::
+@end menu
+
+@node Tuple representation
+@section Tuple representation
+@cindex tuples
+
+GIMPLE instructions are tuples of variable size divided in two
+groups: a header describing the instruction and its locations,
+and a variable length body with all the operands. Tuples are
+organized into a hierarchy with 3 main classes of tuples.
+
+@subsection @code{gimple_statement_base} (gsbase)
+@cindex gimple_statement_base
+
+This is the root of the hierarchy, it holds basic information
+needed by most GIMPLE statements. There are some fields that
+may not be relevant to every GIMPLE statement, but those were
+moved into the base structure to take advantage of holes left by
+other fields (thus making the structure more compact).  The
+structure takes 4 words (32 bytes) on 64 bit hosts:
+
+@multitable {@code{references_memory_p}} {Size (bits)}
+@item Field				@tab Size (bits)
+@item @code{code}			@tab 8
+@item @code{subcode}			@tab 16
+@item @code{no_warning}			@tab 1
+@item @code{visited}			@tab 1
+@item @code{nontemporal_move}		@tab 1
+@item @code{plf}			@tab 2
+@item @code{modified}			@tab 1
+@item @code{has_volatile_ops}		@tab 1
+@item @code{references_memory_p}	@tab 1
+@item @code{uid}			@tab 32
+@item @code{location}			@tab 32
+@item @code{num_ops}			@tab 32
+@item @code{bb}				@tab 64
+@item @code{block}			@tab 63
+@item Total size			@tab 32 bytes	
+@end multitable
+
+@itemize @bullet
+@item @code{code}
+Main identifier for a GIMPLE instruction. 
+
+@item @code{subcode}
+Used to distinguish different variants of the same basic
+instruction or provide flags applicable to a given code. The
+@code{subcode} flags field has different uses depending on the code of
+the instruction, but mostly it distinguishes instructions of the
+same family. The most prominent use of this field is in
+assignments, where subcode indicates the operation done on the
+RHS of the assignment. For example, a = b + c is encoded as
+@code{GIMPLE_ASSIGN <PLUS_EXPR, a, b, c>}.
+
+@item @code{no_warning}
+Bitflag to indicate whether a warning has already been issued on
+this statement.
+
+@item @code{visited}
+General purpose ``visited'' marker. Set and cleared by each pass
+when needed.
+
+@item @code{nontemporal_move}
+Bitflag used in assignments that represent non-temporal moves.
+Although this bitflag is only used in assignments, it was moved
+into the base to take advantage of the bit holes left by the
+previous fields.
+
+@item @code{plf}
+Pass Local Flags. This 2-bit mask can be used as general purpose
+markers by any pass. Passes are responsible for clearing and
+setting these two flags accordingly.
+
+@item @code{modified}
+Bitflag to indicate whether the statement has been modified.
+Used mainly by the operand scanner to determine when to re-scan a
+statement for operands.
+
+@item @code{has_volatile_ops}
+Bitflag to indicate whether this statement contains operands that
+have been marked volatile.
+
+@item @code{references_memory_p}
+Bitflag to indicate whether this statement contains memory
+references (i.e., its operands are either global variables, or
+pointer dereferences or anything that must reside in memory).
+
+@item @code{uid}
+This is an unsigned integer used by passes that want to assign
+IDs to every statement. These IDs must be assigned and used by
+each pass.
+
+@item @code{location}
+This is a @code{location_t} identifier to specify source code
+location for this statement. It is inherited from the front
+end.
+
+@item @code{num_ops}
+Number of operands that this statement has. This specifies the
+size of the operand vector embedded in the tuple. Only used in
+some tuples, but it is declared in the base tuple to take
+advantage of the 32-bit hole left by the previous fields.
+
+@item @code{bb}
+Basic block holding the instruction.
+ 
+@item @code{block}
+Lexical block holding this statement.  Also used for debug
+information generation.
+@end itemize
+
+@subsection @code{gimple_statement_with_ops}
+@cindex gimple_statement_with_ops
+
+This tuple is actually split in two:
+@code{gimple_statement_with_ops_base} and
+@code{gimple_statement_with_ops}. This is needed to accommodate the
+way the operand vector is allocated. The operand vector is
+defined to be an array of 1 element. So, to allocate a dynamic
+number of operands, the memory allocator (@code{gimple_alloc}) simply
+allocates enough memory to hold the structure itself plus @code{N
+- 1} operands which run ``off the end'' of the structure. For
+example, to allocate space for a tuple with 3 operands,
+@code{gimple_alloc} reserves @code{sizeof (struct
+gimple_statement_with_ops) + 2 * sizeof (tree)} bytes.
+
+On the other hand, several fields in this tuple need to be shared
+with the @code{gimple_statement_with_memory_ops} tuple. So, these
+common fields are placed in @code{gimple_statement_with_ops_base} which
+is then inherited from the other two tuples.
+
+
+@multitable {@code{def_ops}}	{48 + 8 * @code{num_ops} bytes}
+@item	@code{gsbase}		@tab 256	
+@item	@code{def_ops}		@tab 64	
+@item	@code{use_ops}		@tab 64	
+@item	@code{op}		@tab @code{num_ops} * 64	
+@item	Total size		@tab 48 + 8 * @code{num_ops} bytes
+@end multitable
+
+@itemize @bullet
+@item @code{gsbase}
+Inherited from @code{struct gimple_statement_base}.
+
+@item @code{def_ops}
+Array of pointers into the operand array indicating all the slots that
+contain a variable written-to by the statement. This array is
+also used for immediate use chaining. Note that it would be
+possible to not rely on this array, but the changes required to
+implement this are pretty invasive.
+
+@item @code{use_ops}
+Similar to @code{def_ops} but for variables read by the statement.
+
+@item @code{op}
+Array of trees with @code{num_ops} slots.
+@end itemize
+
+@subsection @code{gimple_statement_with_memory_ops}
+
+This tuple is essentially identical to @code{gimple_statement_with_ops},
+except that it contains 4 additional fields to hold vectors
+related memory stores and loads.  Similar to the previous case,
+the structure is split in two to accommodate for the operand
+vector (@code{gimple_statement_with_memory_ops_base} and
+@code{gimple_statement_with_memory_ops}).
+
+
+@multitable {@code{vdef_ops}}	{80 + 8 * @code{num_ops} bytes}
+@item Field			@tab Size (bits)
+@item @code{gsbase}		@tab 256
+@item @code{def_ops}		@tab 64
+@item @code{use_ops}		@tab 64
+@item @code{vdef_ops}		@tab 64
+@item @code{vuse_ops}		@tab 64
+@item @code{stores}		@tab 64	
+@item @code{loads}		@tab 64	
+@item @code{op}			@tab @code{num_ops} * 64	
+@item Total size		@tab 80 + 8 * @code{num_ops} bytes
+@end multitable
+
+@itemize @bullet
+@item @code{vdef_ops}
+Similar to @code{def_ops} but for @code{VDEF} operators. There is
+one entry per memory symbol written by this statement. This is
+used to maintain the memory SSA use-def and def-def chains.
+
+@item @code{vuse_ops}
+Similar to @code{use_ops} but for @code{VUSE} operators. There is
+one entry per memory symbol loaded by this statement. This is
+used to maintain the memory SSA use-def chains.
+
+@item @code{stores}
+Bitset with all the UIDs for the symbols written-to by the
+statement.  This is different than @code{vdef_ops} in that all the
+affected symbols are mentioned in this set.  If memory
+partitioning is enabled, the @code{vdef_ops} vector will refer to memory
+partitions. Furthermore, no SSA information is stored in this
+set.
+
+@item @code{loads}
+Similar to @code{stores}, but for memory loads. (Note that there
+is some amount of redundancy here, it should be possible to
+reduce memory utilization further by removing these sets).
+@end itemize
+
+All the other tuples are defined in terms of these three basic
+ones. Each tuple will add some fields. The main gimple type
+is defined to be the union of all these structures (@code{GTY} markers
+elided for clarity):
+
+@smallexample
+union gimple_statement_d
+@{
+  struct gimple_statement_base gsbase;
+  struct gimple_statement_with_ops gsops;
+  struct gimple_statement_with_memory_ops gsmem;
+  struct gimple_statement_omp omp;
+  struct gimple_statement_bind gimple_bind;
+  struct gimple_statement_catch gimple_catch;
+  struct gimple_statement_eh_filter gimple_eh_filter;
+  struct gimple_statement_phi gimple_phi;
+  struct gimple_statement_resx gimple_resx;
+  struct gimple_statement_try gimple_try;
+  struct gimple_statement_wce gimple_wce;
+  struct gimple_statement_asm gimple_asm;
+  struct gimple_statement_omp_critical gimple_omp_critical;
+  struct gimple_statement_omp_for gimple_omp_for;
+  struct gimple_statement_omp_parallel gimple_omp_parallel;
+  struct gimple_statement_omp_task gimple_omp_task;
+  struct gimple_statement_omp_sections gimple_omp_sections;
+  struct gimple_statement_omp_single gimple_omp_single;
+  struct gimple_statement_omp_continue gimple_omp_continue;
+  struct gimple_statement_omp_atomic_load gimple_omp_atomic_load;
+  struct gimple_statement_omp_atomic_store gimple_omp_atomic_store;
+@};
+@end smallexample
+
+ 
+@node GIMPLE instruction set
+@section GIMPLE instruction set
+@cindex GIMPLE instruction set
+
+The following table briefly describes the GIMPLE instruction set.
+
+@multitable {@code{GIMPLE_OMP_SECTIONS_SWITCH}} {High GIMPLE} {Low GIMPLE}
+@item Instruction			@tab High GIMPLE	@tab Low GIMPLE
+@item @code{GIMPLE_ASM}			@tab x			@tab x
+@item @code{GIMPLE_ASSIGN}		@tab x			@tab x
+@item @code{GIMPLE_BIND}		@tab x			@tab
+@item @code{GIMPLE_CALL}		@tab x			@tab x
+@item @code{GIMPLE_CATCH}		@tab x			@tab
+@item @code{GIMPLE_COND}		@tab x			@tab x
+@item @code{GIMPLE_DEBUG}		@tab x			@tab x
+@item @code{GIMPLE_EH_FILTER}		@tab x			@tab
+@item @code{GIMPLE_GOTO}		@tab x			@tab x
+@item @code{GIMPLE_LABEL}		@tab x			@tab x
+@item @code{GIMPLE_NOP}			@tab x			@tab x
+@item @code{GIMPLE_OMP_ATOMIC_LOAD}	@tab x			@tab x
+@item @code{GIMPLE_OMP_ATOMIC_STORE}	@tab x			@tab x
+@item @code{GIMPLE_OMP_CONTINUE}	@tab x			@tab x
+@item @code{GIMPLE_OMP_CRITICAL}	@tab x			@tab x
+@item @code{GIMPLE_OMP_FOR}		@tab x			@tab x
+@item @code{GIMPLE_OMP_MASTER}		@tab x			@tab x
+@item @code{GIMPLE_OMP_ORDERED}		@tab x			@tab x
+@item @code{GIMPLE_OMP_PARALLEL}	@tab x			@tab x
+@item @code{GIMPLE_OMP_RETURN}		@tab x			@tab x
+@item @code{GIMPLE_OMP_SECTION}		@tab x			@tab x
+@item @code{GIMPLE_OMP_SECTIONS}	@tab x			@tab x
+@item @code{GIMPLE_OMP_SECTIONS_SWITCH}	@tab x			@tab x
+@item @code{GIMPLE_OMP_SINGLE}		@tab x			@tab x
+@item @code{GIMPLE_PHI}			@tab 			@tab x
+@item @code{GIMPLE_RESX}		@tab			@tab x
+@item @code{GIMPLE_RETURN}		@tab x			@tab x
+@item @code{GIMPLE_SWITCH}		@tab x			@tab x
+@item @code{GIMPLE_TRY}			@tab x			@tab
+@end multitable
+
+@node GIMPLE Exception Handling
+@section Exception Handling
+@cindex GIMPLE Exception Handling
+
+Other exception handling constructs are represented using
+@code{GIMPLE_TRY_CATCH}.  @code{GIMPLE_TRY_CATCH} has two operands.  The
+first operand is a sequence of statements to execute.  If executing
+these statements does not throw an exception, then the second operand
+is ignored.  Otherwise, if an exception is thrown, then the second
+operand of the @code{GIMPLE_TRY_CATCH} is checked.  The second
+operand may have the following forms:
+
+@enumerate
+
+@item A sequence of statements to execute.  When an exception occurs,
+these statements are executed, and then the exception is rethrown.
+
+@item A sequence of @code{GIMPLE_CATCH} statements.  Each
+@code{GIMPLE_CATCH} has a list of applicable exception types and
+handler code.  If the thrown exception matches one of the caught
+types, the associated handler code is executed.  If the handler
+code falls off the bottom, execution continues after the original
+@code{GIMPLE_TRY_CATCH}.
+
+@item A @code{GIMPLE_EH_FILTER} statement.  This has a list of
+permitted exception types, and code to handle a match failure.  If the
+thrown exception does not match one of the allowed types, the
+associated match failure code is executed.  If the thrown exception
+does match, it continues unwinding the stack looking for the next
+handler.
+
+@end enumerate
+
+Currently throwing an exception is not directly represented in
+GIMPLE, since it is implemented by calling a function.  At some
+point in the future we will want to add some way to express that
+the call will throw an exception of a known type.
+
+Just before running the optimizers, the compiler lowers the
+high-level EH constructs above into a set of @samp{goto}s, magic
+labels, and EH regions.  Continuing to unwind at the end of a
+cleanup is represented with a @code{GIMPLE_RESX}.
+
+
+@node Temporaries
+@section Temporaries
+@cindex Temporaries
+
+When gimplification encounters a subexpression that is too
+complex, it creates a new temporary variable to hold the value of
+the subexpression, and adds a new statement to initialize it
+before the current statement. These special temporaries are known
+as @samp{expression temporaries}, and are allocated using
+@code{get_formal_tmp_var}.  The compiler tries to always evaluate
+identical expressions into the same temporary, to simplify
+elimination of redundant calculations.
+
+We can only use expression temporaries when we know that it will
+not be reevaluated before its value is used, and that it will not
+be otherwise modified@footnote{These restrictions are derived
+from those in Morgan 4.8.}. Other temporaries can be allocated
+using @code{get_initialized_tmp_var} or @code{create_tmp_var}.
+
+Currently, an expression like @code{a = b + 5} is not reduced any
+further.  We tried converting it to something like
+@smallexample
+T1 = b + 5;
+a = T1;
+@end smallexample
+but this bloated the representation for minimal benefit.  However, a
+variable which must live in memory cannot appear in an expression; its
+value is explicitly loaded into a temporary first.  Similarly, storing
+the value of an expression to a memory variable goes through a
+temporary.
+
+@node Operands
+@section Operands
+@cindex Operands
+
+In general, expressions in GIMPLE consist of an operation and the
+appropriate number of simple operands; these operands must either be a
+GIMPLE rvalue (@code{is_gimple_val}), i.e.@: a constant or a register
+variable.  More complex operands are factored out into temporaries, so
+that
+@smallexample
+a = b + c + d
+@end smallexample
+becomes
+@smallexample
+T1 = b + c;
+a = T1 + d;
+@end smallexample
+
+The same rule holds for arguments to a @code{GIMPLE_CALL}.
+
+The target of an assignment is usually a variable, but can also be a
+@code{MEM_REF} or a compound lvalue as described below.
+
+@menu
+* Compound Expressions::
+* Compound Lvalues::
+* Conditional Expressions::
+* Logical Operators::
+@end menu
+
+@node Compound Expressions
+@subsection Compound Expressions
+@cindex Compound Expressions
+
+The left-hand side of a C comma expression is simply moved into a separate
+statement.
+
+@node Compound Lvalues
+@subsection Compound Lvalues
+@cindex Compound Lvalues
+
+Currently compound lvalues involving array and structure field references
+are not broken down; an expression like @code{a.b[2] = 42} is not reduced
+any further (though complex array subscripts are).  This restriction is a
+workaround for limitations in later optimizers; if we were to convert this
+to
+
+@smallexample
+T1 = &a.b;
+T1[2] = 42;
+@end smallexample
+
+alias analysis would not remember that the reference to @code{T1[2]} came
+by way of @code{a.b}, so it would think that the assignment could alias
+another member of @code{a}; this broke @code{struct-alias-1.c}.  Future
+optimizer improvements may make this limitation unnecessary.
+
+@node Conditional Expressions
+@subsection Conditional Expressions
+@cindex Conditional Expressions
+
+A C @code{?:} expression is converted into an @code{if} statement with
+each branch assigning to the same temporary.  So,
+
+@smallexample
+a = b ? c : d;
+@end smallexample
+becomes
+@smallexample
+if (b == 1)
+  T1 = c;
+else
+  T1 = d;
+a = T1;
+@end smallexample
+
+The GIMPLE level if-conversion pass re-introduces @code{?:}
+expression, if appropriate. It is used to vectorize loops with
+conditions using vector conditional operations.
+
+Note that in GIMPLE, @code{if} statements are represented using
+@code{GIMPLE_COND}, as described below.
+
+@node Logical Operators
+@subsection Logical Operators
+@cindex Logical Operators
+
+Except when they appear in the condition operand of a
+@code{GIMPLE_COND}, logical `and' and `or' operators are simplified
+as follows: @code{a = b && c} becomes
+
+@smallexample
+T1 = (bool)b;
+if (T1 == true)
+  T1 = (bool)c;
+a = T1;
+@end smallexample
+
+Note that @code{T1} in this example cannot be an expression temporary,
+because it has two different assignments.
+
+@subsection Manipulating operands
+
+All gimple operands are of type @code{tree}.  But only certain
+types of trees are allowed to be used as operand tuples.  Basic
+validation is controlled by the function
+@code{get_gimple_rhs_class}, which given a tree code, returns an
+@code{enum} with the following values of type @code{enum
+gimple_rhs_class}
+
+@itemize @bullet
+@item @code{GIMPLE_INVALID_RHS}
+The tree cannot be used as a GIMPLE operand.
+
+@item @code{GIMPLE_TERNARY_RHS}
+The tree is a valid GIMPLE ternary operation.
+
+@item @code{GIMPLE_BINARY_RHS}
+The tree is a valid GIMPLE binary operation.
+
+@item @code{GIMPLE_UNARY_RHS}
+The tree is a valid GIMPLE unary operation.
+
+@item @code{GIMPLE_SINGLE_RHS}
+The tree is a single object, that cannot be split into simpler
+operands (for instance, @code{SSA_NAME}, @code{VAR_DECL}, @code{COMPONENT_REF}, etc).
+
+This operand class also acts as an escape hatch for tree nodes
+that may be flattened out into the operand vector, but would need
+more than two slots on the RHS.  For instance, a @code{COND_EXPR}
+expression of the form @code{(a op b) ? x : y} could be flattened
+out on the operand vector using 4 slots, but it would also
+require additional processing to distinguish @code{c = a op b}
+from @code{c = a op b ? x : y}.  Something similar occurs with
+@code{ASSERT_EXPR}.   In time, these special case tree
+expressions should be flattened into the operand vector.
+@end itemize
+
+For tree nodes in the categories @code{GIMPLE_TERNARY_RHS},
+@code{GIMPLE_BINARY_RHS} and @code{GIMPLE_UNARY_RHS}, they cannot be
+stored inside tuples directly.  They first need to be flattened and
+separated into individual components.  For instance, given the GENERIC
+expression
+
+@smallexample
+a = b + c
+@end smallexample
+
+its tree representation is:
+
+@smallexample
+MODIFY_EXPR <VAR_DECL  <a>, PLUS_EXPR <VAR_DECL <b>, VAR_DECL <c>>>
+@end smallexample
+
+In this case, the GIMPLE form for this statement is logically
+identical to its GENERIC form but in GIMPLE, the @code{PLUS_EXPR}
+on the RHS of the assignment is not represented as a tree,
+instead the two operands are taken out of the @code{PLUS_EXPR} sub-tree
+and flattened into the GIMPLE tuple as follows:
+
+@smallexample
+GIMPLE_ASSIGN <PLUS_EXPR, VAR_DECL <a>, VAR_DECL <b>, VAR_DECL <c>>
+@end smallexample
+
+@subsection Operand vector allocation
+
+The operand vector is stored at the bottom of the three tuple
+structures that accept operands. This means, that depending on
+the code of a given statement, its operand vector will be at
+different offsets from the base of the structure.  To access
+tuple operands use the following accessors
+
+@deftypefn {GIMPLE function} unsigned gimple_num_ops (gimple g)
+Returns the number of operands in statement G.
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_op (gimple g, unsigned i)
+Returns operand @code{I} from statement @code{G}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} {tree *} gimple_ops (gimple g)
+Returns a pointer into the operand vector for statement @code{G}.  This
+is computed using an internal table called @code{gimple_ops_offset_}[].
+This table is indexed by the gimple code of @code{G}.
+
+When the compiler is built, this table is filled-in using the
+sizes of the structures used by each statement code defined in
+gimple.def.  Since the operand vector is at the bottom of the
+structure, for a gimple code @code{C} the offset is computed as sizeof
+(struct-of @code{C}) - sizeof (tree).
+
+This mechanism adds one memory indirection to every access when
+using @code{gimple_op}(), if this becomes a bottleneck, a pass can
+choose to memoize the result from @code{gimple_ops}() and use that to
+access the operands.
+@end deftypefn
+
+@subsection Operand validation
+
+When adding a new operand to a gimple statement, the operand will
+be validated according to what each tuple accepts in its operand
+vector.  These predicates are called by the
+@code{gimple_@var{name}_set_...()}.  Each tuple will use one of the
+following predicates (Note, this list is not exhaustive):
+
+@deftypefn {GIMPLE function} bool is_gimple_val (tree t)
+Returns true if t is a "GIMPLE value", which are all the
+non-addressable stack variables (variables for which
+@code{is_gimple_reg} returns true) and constants (expressions for which
+@code{is_gimple_min_invariant} returns true).
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool is_gimple_addressable (tree t)
+Returns true if t is a symbol or memory reference whose address
+can be taken.
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool is_gimple_asm_val (tree t)
+Similar to @code{is_gimple_val} but it also accepts hard registers.
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool is_gimple_call_addr (tree t)
+Return true if t is a valid expression to use as the function
+called by a @code{GIMPLE_CALL}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool is_gimple_mem_ref_addr (tree t)
+Return true if t is a valid expression to use as first operand
+of a @code{MEM_REF} expression.
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool is_gimple_constant (tree t)
+Return true if t is a valid gimple constant.
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool is_gimple_min_invariant (tree t)
+Return true if t is a valid minimal invariant.  This is different
+from constants, in that the specific value of t may not be known
+at compile time, but it is known that it doesn't change (e.g.,
+the address of a function local variable).
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool is_gimple_ip_invariant (tree t)
+Return true if t is an interprocedural invariant.  This means that t
+is a valid invariant in all functions (e.g. it can be an address of a
+global variable but not of a local one).
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool is_gimple_ip_invariant_address (tree t)
+Return true if t is an @code{ADDR_EXPR} that does not change once the
+program is running (and which is valid in all functions).
+@end deftypefn
+
+
+@subsection Statement validation
+
+@deftypefn {GIMPLE function} bool is_gimple_assign (gimple g)
+Return true if the code of g is @code{GIMPLE_ASSIGN}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} bool is_gimple_call (gimple g)
+Return true if the code of g is @code{GIMPLE_CALL}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} bool is_gimple_debug (gimple g)
+Return true if the code of g is @code{GIMPLE_DEBUG}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool gimple_assign_cast_p (gimple g)
+Return true if g is a @code{GIMPLE_ASSIGN} that performs a type cast
+operation.
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool gimple_debug_bind_p (gimple g)
+Return true if g is a @code{GIMPLE_DEBUG} that binds the value of an
+expression to a variable.
+@end deftypefn
+
+@node Manipulating GIMPLE statements
+@section Manipulating GIMPLE statements
+@cindex Manipulating GIMPLE statements
+
+This section documents all the functions available to handle each
+of the GIMPLE instructions.
+
+@subsection Common accessors 
+The following are common accessors for gimple statements.
+
+@deftypefn {GIMPLE function} {enum gimple_code} gimple_code (gimple g)
+Return the code for statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} basic_block gimple_bb (gimple g)
+Return the basic block to which statement @code{G} belongs to.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} tree gimple_block (gimple g)
+Return the lexical scope block holding statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} tree gimple_expr_type (gimple stmt)
+Return the type of the main expression computed by @code{STMT}. Return
+@code{void_type_node} if @code{STMT} computes nothing. This will only return
+something meaningful for @code{GIMPLE_ASSIGN}, @code{GIMPLE_COND} and
+@code{GIMPLE_CALL}.  For all other tuple codes, it will return
+@code{void_type_node}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} {enum tree_code} gimple_expr_code (gimple stmt)
+Return the tree code for the expression computed by @code{STMT}.  This
+is only meaningful for @code{GIMPLE_CALL}, @code{GIMPLE_ASSIGN} and
+@code{GIMPLE_COND}.  If @code{STMT} is @code{GIMPLE_CALL}, it will return @code{CALL_EXPR}.
+For @code{GIMPLE_COND}, it returns the code of the comparison predicate.
+For @code{GIMPLE_ASSIGN} it returns the code of the operation performed
+by the @code{RHS} of the assignment.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_set_block (gimple g, tree block)
+Set the lexical scope block of @code{G} to @code{BLOCK}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} location_t gimple_locus (gimple g)
+Return locus information for statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} void gimple_set_locus (gimple g, location_t locus)
+Set locus information for statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} bool gimple_locus_empty_p (gimple g)
+Return true if @code{G} does not have locus information.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} bool gimple_no_warning_p (gimple stmt)
+Return true if no warnings should be emitted for statement @code{STMT}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} void gimple_set_visited (gimple stmt, bool visited_p)
+Set the visited status on statement @code{STMT} to @code{VISITED_P}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} bool gimple_visited_p (gimple stmt)
+Return the visited status on statement @code{STMT}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} void gimple_set_plf (gimple stmt, enum plf_mask plf, bool val_p)
+Set pass local flag @code{PLF} on statement @code{STMT} to @code{VAL_P}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} {unsigned int} gimple_plf (gimple stmt, enum plf_mask plf)
+Return the value of pass local flag @code{PLF} on statement @code{STMT}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} bool gimple_has_ops (gimple g)
+Return true if statement @code{G} has register or memory operands.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} bool gimple_has_mem_ops (gimple g)
+Return true if statement @code{G} has memory operands.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} unsigned gimple_num_ops (gimple g)
+Return the number of operands for statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} {tree *} gimple_ops (gimple g)
+Return the array of operands for statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} tree gimple_op (gimple g, unsigned i)
+Return operand @code{I} for statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} {tree *} gimple_op_ptr (gimple g, unsigned i)
+Return a pointer to operand @code{I} for statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} void gimple_set_op (gimple g, unsigned i, tree op)
+Set operand @code{I} of statement @code{G} to @code{OP}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} bitmap gimple_addresses_taken (gimple stmt)
+Return the set of symbols that have had their address taken by
+@code{STMT}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} {struct def_optype_d *} gimple_def_ops (gimple g)
+Return the set of @code{DEF} operands for statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} void gimple_set_def_ops (gimple g, struct def_optype_d *def)
+Set @code{DEF} to be the set of @code{DEF} operands for statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} {struct use_optype_d *} gimple_use_ops (gimple g)
+Return the set of @code{USE} operands for statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} void gimple_set_use_ops (gimple g, struct use_optype_d *use)
+Set @code{USE} to be the set of @code{USE} operands for statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} {struct voptype_d *} gimple_vuse_ops (gimple g)
+Return the set of @code{VUSE} operands for statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} void gimple_set_vuse_ops (gimple g, struct voptype_d *ops)
+Set @code{OPS} to be the set of @code{VUSE} operands for statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} {struct voptype_d *} gimple_vdef_ops (gimple g)
+Return the set of @code{VDEF} operands for statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} void gimple_set_vdef_ops (gimple g, struct voptype_d *ops)
+Set @code{OPS} to be the set of @code{VDEF} operands for statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} bitmap gimple_loaded_syms (gimple g)
+Return the set of symbols loaded by statement @code{G}.  Each element of
+the set is the @code{DECL_UID} of the corresponding symbol.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} bitmap gimple_stored_syms (gimple g)
+Return the set of symbols stored by statement @code{G}.  Each element of
+the set is the @code{DECL_UID} of the corresponding symbol.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} bool gimple_modified_p (gimple g)
+Return true if statement @code{G} has operands and the modified field
+has been set.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} bool gimple_has_volatile_ops (gimple stmt)
+Return true if statement @code{STMT} contains volatile operands.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} void gimple_set_has_volatile_ops (gimple stmt, bool volatilep)
+Return true if statement @code{STMT} contains volatile operands.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} void update_stmt (gimple s)
+Mark statement @code{S} as modified, and update it.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} void update_stmt_if_modified (gimple s)
+Update statement @code{S} if it has been marked modified.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} gimple gimple_copy (gimple stmt)
+Return a deep copy of statement @code{STMT}.
+@end deftypefn
+
+@node Tuple specific accessors
+@section Tuple specific accessors
+@cindex Tuple specific accessors
+
+@menu
+* @code{GIMPLE_ASM}::
+* @code{GIMPLE_ASSIGN}::
+* @code{GIMPLE_BIND}::
+* @code{GIMPLE_CALL}::
+* @code{GIMPLE_CATCH}::
+* @code{GIMPLE_COND}::
+* @code{GIMPLE_DEBUG}::
+* @code{GIMPLE_EH_FILTER}::
+* @code{GIMPLE_LABEL}::
+* @code{GIMPLE_NOP}::
+* @code{GIMPLE_OMP_ATOMIC_LOAD}::
+* @code{GIMPLE_OMP_ATOMIC_STORE}::
+* @code{GIMPLE_OMP_CONTINUE}::
+* @code{GIMPLE_OMP_CRITICAL}::
+* @code{GIMPLE_OMP_FOR}::
+* @code{GIMPLE_OMP_MASTER}::
+* @code{GIMPLE_OMP_ORDERED}::
+* @code{GIMPLE_OMP_PARALLEL}::
+* @code{GIMPLE_OMP_RETURN}::
+* @code{GIMPLE_OMP_SECTION}::
+* @code{GIMPLE_OMP_SECTIONS}::
+* @code{GIMPLE_OMP_SINGLE}::
+* @code{GIMPLE_PHI}::
+* @code{GIMPLE_RESX}::
+* @code{GIMPLE_RETURN}::
+* @code{GIMPLE_SWITCH}::
+* @code{GIMPLE_TRY}::
+* @code{GIMPLE_WITH_CLEANUP_EXPR}::
+@end menu
+
+
+@node @code{GIMPLE_ASM}
+@subsection @code{GIMPLE_ASM}
+@cindex @code{GIMPLE_ASM}
+
+@deftypefn {GIMPLE function} gimple gimple_build_asm (const char *string, ninputs, noutputs, nclobbers, ...)
+Build a @code{GIMPLE_ASM} statement.  This statement is used for
+building in-line assembly constructs.  @code{STRING} is the assembly
+code.  @code{NINPUT} is the number of register inputs.  @code{NOUTPUT} is the
+number of register outputs.  @code{NCLOBBERS} is the number of clobbered
+registers.  The rest of the arguments trees for each input,
+output, and clobbered registers.
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple gimple_build_asm_vec (const char *, VEC(tree,gc) *, VEC(tree,gc) *, VEC(tree,gc) *)
+Identical to gimple_build_asm, but the arguments are passed in
+VECs.
+@end deftypefn
+
+@deftypefn {GIMPLE function} unsigned gimple_asm_ninputs (gimple g)
+Return the number of input operands for @code{GIMPLE_ASM} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} unsigned gimple_asm_noutputs (gimple g)
+Return the number of output operands for @code{GIMPLE_ASM} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} unsigned gimple_asm_nclobbers (gimple g)
+Return the number of clobber operands for @code{GIMPLE_ASM} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_asm_input_op (gimple g, unsigned index)
+Return input operand @code{INDEX} of @code{GIMPLE_ASM} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_asm_set_input_op (gimple g, unsigned index, tree in_op)
+Set @code{IN_OP} to be input operand @code{INDEX} in @code{GIMPLE_ASM} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_asm_output_op (gimple g, unsigned index)
+Return output operand @code{INDEX} of @code{GIMPLE_ASM} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_asm_set_output_op (gimple g, @
+unsigned index, tree out_op)
+Set @code{OUT_OP} to be output operand @code{INDEX} in @code{GIMPLE_ASM} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_asm_clobber_op (gimple g, unsigned index)
+Return clobber operand @code{INDEX} of @code{GIMPLE_ASM} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_asm_set_clobber_op (gimple g, unsigned index, tree clobber_op)
+Set @code{CLOBBER_OP} to be clobber operand @code{INDEX} in @code{GIMPLE_ASM} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} {const char *} gimple_asm_string (gimple g)
+Return the string representing the assembly instruction in
+@code{GIMPLE_ASM} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool gimple_asm_volatile_p (gimple g)
+Return true if @code{G} is an asm statement marked volatile. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_asm_set_volatile (gimple g)
+Mark asm statement @code{G} as volatile. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_asm_clear_volatile (gimple g)
+Remove volatile marker from asm statement @code{G}. 
+@end deftypefn
+
+@node @code{GIMPLE_ASSIGN}
+@subsection @code{GIMPLE_ASSIGN}
+@cindex @code{GIMPLE_ASSIGN}
+
+@deftypefn {GIMPLE function} gimple gimple_build_assign (tree lhs, tree rhs)
+Build a @code{GIMPLE_ASSIGN} statement.  The left-hand side is an lvalue
+passed in lhs.  The right-hand side can be either a unary or
+binary tree expression.  The expression tree rhs will be
+flattened and its operands assigned to the corresponding operand
+slots in the new statement.  This function is useful when you
+already have a tree expression that you want to convert into a
+tuple.  However, try to avoid building expression trees for the
+sole purpose of calling this function.  If you already have the
+operands in separate trees, it is better to use
+@code{gimple_build_assign_with_ops}.
+@end deftypefn
+
+
+@deftypefn {GIMPLE function} gimple gimplify_assign (tree dst, tree src, gimple_seq *seq_p)
+Build a new @code{GIMPLE_ASSIGN} tuple and append it to the end of
+@code{*SEQ_P}.
+@end deftypefn
+
+@code{DST}/@code{SRC} are the destination and source respectively.  You can
+pass ungimplified trees in @code{DST} or @code{SRC}, in which
+case they will be converted to a gimple operand if necessary.
+
+This function returns the newly created @code{GIMPLE_ASSIGN} tuple.
+
+@deftypefn {GIMPLE function} gimple gimple_build_assign_with_ops @
+(enum tree_code subcode, tree lhs, tree op1, tree op2)
+This function is similar to @code{gimple_build_assign}, but is used to
+build a @code{GIMPLE_ASSIGN} statement when the operands of the
+right-hand side of the assignment are already split into
+different operands.
+
+The left-hand side is an lvalue passed in lhs.  Subcode is the
+@code{tree_code} for the right-hand side of the assignment.  Op1 and op2
+are the operands.  If op2 is null, subcode must be a @code{tree_code}
+for a unary expression.
+@end deftypefn
+
+@deftypefn {GIMPLE function} {enum tree_code} gimple_assign_rhs_code (gimple g)
+Return the code of the expression computed on the @code{RHS} of
+assignment statement @code{G}.
+@end deftypefn
+ 
+
+@deftypefn {GIMPLE function} {enum gimple_rhs_class} gimple_assign_rhs_class (gimple g)
+Return the gimple rhs class of the code for the expression
+computed on the rhs of assignment statement @code{G}.  This will never
+return @code{GIMPLE_INVALID_RHS}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_assign_lhs (gimple g)
+Return the @code{LHS} of assignment statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} {tree *} gimple_assign_lhs_ptr (gimple g)
+Return a pointer to the @code{LHS} of assignment statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} tree gimple_assign_rhs1 (gimple g)
+Return the first operand on the @code{RHS} of assignment statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} {tree *} gimple_assign_rhs1_ptr (gimple g)
+Return the address of the first operand on the @code{RHS} of assignment
+statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} tree gimple_assign_rhs2 (gimple g)
+Return the second operand on the @code{RHS} of assignment statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} {tree *} gimple_assign_rhs2_ptr (gimple g)
+Return the address of the second operand on the @code{RHS} of assignment
+statement @code{G}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_assign_rhs3 (gimple g)
+Return the third operand on the @code{RHS} of assignment statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} {tree *} gimple_assign_rhs3_ptr (gimple g)
+Return the address of the third operand on the @code{RHS} of assignment
+statement @code{G}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_assign_set_lhs (gimple g, tree lhs)
+Set @code{LHS} to be the @code{LHS} operand of assignment statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} void gimple_assign_set_rhs1 (gimple g, tree rhs)
+Set @code{RHS} to be the first operand on the @code{RHS} of assignment
+statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} void gimple_assign_set_rhs2 (gimple g, tree rhs)
+Set @code{RHS} to be the second operand on the @code{RHS} of assignment
+statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} void gimple_assign_set_rhs3 (gimple g, tree rhs)
+Set @code{RHS} to be the third operand on the @code{RHS} of assignment
+statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} bool gimple_assign_cast_p (gimple s)
+Return true if @code{S} is a type-cast assignment.
+@end deftypefn
+
+
+@node @code{GIMPLE_BIND}
+@subsection @code{GIMPLE_BIND}
+@cindex @code{GIMPLE_BIND}
+
+@deftypefn {GIMPLE function} gimple gimple_build_bind (tree vars, gimple_seq body)
+Build a @code{GIMPLE_BIND} statement with a list of variables in @code{VARS}
+and a body of statements in sequence @code{BODY}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_bind_vars (gimple g)
+Return the variables declared in the @code{GIMPLE_BIND} statement @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_bind_set_vars (gimple g, tree vars)
+Set @code{VARS} to be the set of variables declared in the @code{GIMPLE_BIND}
+statement @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_bind_append_vars (gimple g, tree vars)
+Append @code{VARS} to the set of variables declared in the @code{GIMPLE_BIND}
+statement @code{G}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple_seq gimple_bind_body (gimple g)
+Return the GIMPLE sequence contained in the @code{GIMPLE_BIND} statement
+@code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_bind_set_body (gimple g, gimple_seq seq)
+Set @code{SEQ} to be sequence contained in the @code{GIMPLE_BIND} statement @code{G}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_bind_add_stmt (gimple gs, gimple stmt)
+Append a statement to the end of a @code{GIMPLE_BIND}'s body. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_bind_add_seq (gimple gs, gimple_seq seq)
+Append a sequence of statements to the end of a @code{GIMPLE_BIND}'s
+body.
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_bind_block (gimple g)
+Return the @code{TREE_BLOCK} node associated with @code{GIMPLE_BIND} statement
+@code{G}. This is analogous to the @code{BIND_EXPR_BLOCK} field in trees. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_bind_set_block (gimple g, tree block)
+Set @code{BLOCK} to be the @code{TREE_BLOCK} node associated with @code{GIMPLE_BIND}
+statement @code{G}. 
+@end deftypefn
+
+
+@node @code{GIMPLE_CALL}
+@subsection @code{GIMPLE_CALL}
+@cindex @code{GIMPLE_CALL}
+
+@deftypefn {GIMPLE function} gimple gimple_build_call (tree fn, unsigned nargs, ...)
+Build a @code{GIMPLE_CALL} statement to function @code{FN}.  The argument @code{FN}
+must be either a @code{FUNCTION_DECL} or a gimple call address as
+determined by @code{is_gimple_call_addr}.  @code{NARGS} are the number of
+arguments.  The rest of the arguments follow the argument @code{NARGS},
+and must be trees that are valid as rvalues in gimple (i.e., each
+operand is validated with @code{is_gimple_operand}).
+@end deftypefn
+
+
+@deftypefn {GIMPLE function} gimple gimple_build_call_from_tree (tree call_expr)
+Build a @code{GIMPLE_CALL} from a @code{CALL_EXPR} node.  The arguments and the
+function are taken from the expression directly.  This routine
+assumes that @code{call_expr} is already in GIMPLE form.  That is, its
+operands are GIMPLE values and the function call needs no further
+simplification.  All the call flags in @code{call_expr} are copied over
+to the new @code{GIMPLE_CALL}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple gimple_build_call_vec (tree fn, @code{VEC}(tree, heap) *args)
+Identical to @code{gimple_build_call} but the arguments are stored in a
+@code{VEC}().
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_call_lhs (gimple g)
+Return the @code{LHS} of call statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} {tree *} gimple_call_lhs_ptr (gimple g)
+Return a pointer to the @code{LHS} of call statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} void gimple_call_set_lhs (gimple g, tree lhs)
+Set @code{LHS} to be the @code{LHS} operand of call statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} tree gimple_call_fn (gimple g)
+Return the tree node representing the function called by call
+statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} void gimple_call_set_fn (gimple g, tree fn)
+Set @code{FN} to be the function called by call statement @code{G}.  This has
+to be a gimple value specifying the address of the called
+function.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} tree gimple_call_fndecl (gimple g)
+If a given @code{GIMPLE_CALL}'s callee is a @code{FUNCTION_DECL}, return it.
+Otherwise return @code{NULL}.  This function is analogous to
+@code{get_callee_fndecl} in @code{GENERIC}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} tree gimple_call_set_fndecl (gimple g, tree fndecl)
+Set the called function to @code{FNDECL}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_call_return_type (gimple g)
+Return the type returned by call statement @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} tree gimple_call_chain (gimple g)
+Return the static chain for call statement @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_call_set_chain (gimple g, tree chain)
+Set @code{CHAIN} to be the static chain for call statement @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} unsigned gimple_call_num_args (gimple g)
+Return the number of arguments used by call statement @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_call_arg (gimple g, unsigned index)
+Return the argument at position @code{INDEX} for call statement @code{G}.  The
+first argument is 0.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} {tree *} gimple_call_arg_ptr (gimple g, unsigned index)
+Return a pointer to the argument at position @code{INDEX} for call
+statement @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_call_set_arg (gimple g, unsigned index, tree arg)
+Set @code{ARG} to be the argument at position @code{INDEX} for call statement
+@code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_call_set_tail (gimple s)
+Mark call statement @code{S} as being a tail call (i.e., a call just
+before the exit of a function). These calls are candidate for
+tail call optimization. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool gimple_call_tail_p (gimple s)
+Return true if @code{GIMPLE_CALL} @code{S} is marked as a tail call. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_call_mark_uninlinable (gimple s)
+Mark @code{GIMPLE_CALL} @code{S} as being uninlinable. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool gimple_call_cannot_inline_p (gimple s)
+Return true if @code{GIMPLE_CALL} @code{S} cannot be inlined. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool gimple_call_noreturn_p (gimple s)
+Return true if @code{S} is a noreturn call. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple gimple_call_copy_skip_args (gimple stmt, bitmap args_to_skip)
+Build a @code{GIMPLE_CALL} identical to @code{STMT} but skipping the arguments
+in the positions marked by the set @code{ARGS_TO_SKIP}.
+@end deftypefn
+
+
+@node @code{GIMPLE_CATCH}
+@subsection @code{GIMPLE_CATCH}
+@cindex @code{GIMPLE_CATCH}
+
+@deftypefn {GIMPLE function} gimple gimple_build_catch (tree types, gimple_seq handler)
+Build a @code{GIMPLE_CATCH} statement.  @code{TYPES} are the tree types this
+catch handles.  @code{HANDLER} is a sequence of statements with the code
+for the handler.
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_catch_types (gimple g)
+Return the types handled by @code{GIMPLE_CATCH} statement @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} {tree *} gimple_catch_types_ptr (gimple g)
+Return a pointer to the types handled by @code{GIMPLE_CATCH} statement
+@code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple_seq gimple_catch_handler (gimple g)
+Return the GIMPLE sequence representing the body of the handler
+of @code{GIMPLE_CATCH} statement @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_catch_set_types (gimple g, tree t)
+Set @code{T} to be the set of types handled by @code{GIMPLE_CATCH} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_catch_set_handler (gimple g, gimple_seq handler)
+Set @code{HANDLER} to be the body of @code{GIMPLE_CATCH} @code{G}. 
+@end deftypefn
+
+
+@node @code{GIMPLE_COND}
+@subsection @code{GIMPLE_COND}
+@cindex @code{GIMPLE_COND}
+
+@deftypefn {GIMPLE function} gimple gimple_build_cond (enum tree_code pred_code, tree lhs, tree rhs, tree t_label, tree f_label)
+Build a @code{GIMPLE_COND} statement.  @code{A} @code{GIMPLE_COND} statement compares
+@code{LHS} and @code{RHS} and if the condition in @code{PRED_CODE} is true, jump to
+the label in @code{t_label}, otherwise jump to the label in @code{f_label}.
+@code{PRED_CODE} are relational operator tree codes like @code{EQ_EXPR},
+@code{LT_EXPR}, @code{LE_EXPR}, @code{NE_EXPR}, etc.
+@end deftypefn
+
+
+@deftypefn {GIMPLE function} gimple gimple_build_cond_from_tree (tree cond, tree t_label, tree f_label)
+Build a @code{GIMPLE_COND} statement from the conditional expression
+tree @code{COND}.  @code{T_LABEL} and @code{F_LABEL} are as in @code{gimple_build_cond}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} {enum tree_code} gimple_cond_code (gimple g)
+Return the code of the predicate computed by conditional
+statement @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_cond_set_code (gimple g, enum tree_code code)
+Set @code{CODE} to be the predicate code for the conditional statement
+@code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_cond_lhs (gimple g)
+Return the @code{LHS} of the predicate computed by conditional statement
+@code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_cond_set_lhs (gimple g, tree lhs)
+Set @code{LHS} to be the @code{LHS} operand of the predicate computed by
+conditional statement @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_cond_rhs (gimple g)
+Return the @code{RHS} operand of the predicate computed by conditional
+@code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_cond_set_rhs (gimple g, tree rhs)
+Set @code{RHS} to be the @code{RHS} operand of the predicate computed by
+conditional statement @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_cond_true_label (gimple g)
+Return the label used by conditional statement @code{G} when its
+predicate evaluates to true. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_cond_set_true_label (gimple g, tree label)
+Set @code{LABEL} to be the label used by conditional statement @code{G} when
+its predicate evaluates to true. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_cond_set_false_label (gimple g, tree label)
+Set @code{LABEL} to be the label used by conditional statement @code{G} when
+its predicate evaluates to false. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_cond_false_label (gimple g)
+Return the label used by conditional statement @code{G} when its
+predicate evaluates to false. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_cond_make_false (gimple g)
+Set the conditional @code{COND_STMT} to be of the form 'if (1 == 0)'. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_cond_make_true (gimple g)
+Set the conditional @code{COND_STMT} to be of the form 'if (1 == 1)'. 
+@end deftypefn
+
+@node @code{GIMPLE_DEBUG}
+@subsection @code{GIMPLE_DEBUG}
+@cindex @code{GIMPLE_DEBUG}
+@cindex @code{GIMPLE_DEBUG_BIND}
+
+@deftypefn {GIMPLE function} gimple gimple_build_debug_bind (tree var, tree value, gimple stmt)
+Build a @code{GIMPLE_DEBUG} statement with @code{GIMPLE_DEBUG_BIND} of
+@code{subcode}.  The effect of this statement is to tell debug
+information generation machinery that the value of user variable
+@code{var} is given by @code{value} at that point, and to remain with
+that value until @code{var} runs out of scope, a
+dynamically-subsequent debug bind statement overrides the binding, or
+conflicting values reach a control flow merge point.  Even if
+components of the @code{value} expression change afterwards, the
+variable is supposed to retain the same value, though not necessarily
+the same location.
+
+It is expected that @code{var} be most often a tree for automatic user
+variables (@code{VAR_DECL} or @code{PARM_DECL}) that satisfy the
+requirements for gimple registers, but it may also be a tree for a
+scalarized component of a user variable (@code{ARRAY_REF},
+@code{COMPONENT_REF}), or a debug temporary (@code{DEBUG_EXPR_DECL}).
+
+As for @code{value}, it can be an arbitrary tree expression, but it is
+recommended that it be in a suitable form for a gimple assignment
+@code{RHS}.  It is not expected that user variables that could appear
+as @code{var} ever appear in @code{value}, because in the latter we'd
+have their @code{SSA_NAME}s instead, but even if they were not in SSA
+form, user variables appearing in @code{value} are to be regarded as
+part of the executable code space, whereas those in @code{var} are to
+be regarded as part of the source code space.  There is no way to
+refer to the value bound to a user variable within a @code{value}
+expression.
+
+If @code{value} is @code{GIMPLE_DEBUG_BIND_NOVALUE}, debug information
+generation machinery is informed that the variable @code{var} is
+unbound, i.e., that its value is indeterminate, which sometimes means
+it is really unavailable, and other times that the compiler could not
+keep track of it.
+
+Block and location information for the newly-created stmt are
+taken from @code{stmt}, if given.
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_debug_bind_get_var (gimple stmt)
+Return the user variable @var{var} that is bound at @code{stmt}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_debug_bind_get_value (gimple stmt)
+Return the value expression that is bound to a user variable at
+@code{stmt}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} {tree *} gimple_debug_bind_get_value_ptr (gimple stmt)
+Return a pointer to the value expression that is bound to a user
+variable at @code{stmt}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_debug_bind_set_var (gimple stmt, tree var)
+Modify the user variable bound at @code{stmt} to @var{var}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_debug_bind_set_value (gimple stmt, tree var)
+Modify the value bound to the user variable bound at @code{stmt} to
+@var{value}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_debug_bind_reset_value (gimple stmt)
+Modify the value bound to the user variable bound at @code{stmt} so
+that the variable becomes unbound.
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool gimple_debug_bind_has_value_p (gimple stmt)
+Return @code{TRUE} if @code{stmt} binds a user variable to a value,
+and @code{FALSE} if it unbinds the variable.
+@end deftypefn
+
+@node @code{GIMPLE_EH_FILTER}
+@subsection @code{GIMPLE_EH_FILTER}
+@cindex @code{GIMPLE_EH_FILTER}
+
+@deftypefn {GIMPLE function} gimple gimple_build_eh_filter (tree types, gimple_seq failure)
+Build a @code{GIMPLE_EH_FILTER} statement.  @code{TYPES} are the filter's
+types.  @code{FAILURE} is a sequence with the filter's failure action.
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_eh_filter_types (gimple g)
+Return the types handled by @code{GIMPLE_EH_FILTER} statement @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} {tree *} gimple_eh_filter_types_ptr (gimple g)
+Return a pointer to the types handled by @code{GIMPLE_EH_FILTER}
+statement @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple_seq gimple_eh_filter_failure (gimple g)
+Return the sequence of statement to execute when @code{GIMPLE_EH_FILTER}
+statement fails. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_eh_filter_set_types (gimple g, tree types)
+Set @code{TYPES} to be the set of types handled by @code{GIMPLE_EH_FILTER} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_eh_filter_set_failure (gimple g, gimple_seq failure)
+Set @code{FAILURE} to be the sequence of statements to execute on
+failure for @code{GIMPLE_EH_FILTER} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool gimple_eh_filter_must_not_throw (gimple g)
+Return the @code{EH_FILTER_MUST_NOT_THROW} flag. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_eh_filter_set_must_not_throw (gimple g, bool mntp)
+Set the @code{EH_FILTER_MUST_NOT_THROW} flag. 
+@end deftypefn
+
+
+@node @code{GIMPLE_LABEL}
+@subsection @code{GIMPLE_LABEL}
+@cindex @code{GIMPLE_LABEL}
+
+@deftypefn {GIMPLE function} gimple gimple_build_label (tree label)
+Build a @code{GIMPLE_LABEL} statement with corresponding to the tree
+label, @code{LABEL}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_label_label (gimple g)
+Return the @code{LABEL_DECL} node used by @code{GIMPLE_LABEL} statement @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_label_set_label (gimple g, tree label)
+Set @code{LABEL} to be the @code{LABEL_DECL} node used by @code{GIMPLE_LABEL}
+statement @code{G}. 
+@end deftypefn
+
+
+@deftypefn {GIMPLE function} gimple gimple_build_goto (tree dest)
+Build a @code{GIMPLE_GOTO} statement to label @code{DEST}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_goto_dest (gimple g)
+Return the destination of the unconditional jump @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_goto_set_dest (gimple g, tree dest)
+Set @code{DEST} to be the destination of the unconditional jump @code{G}.
+@end deftypefn
+
+
+@node @code{GIMPLE_NOP}
+@subsection @code{GIMPLE_NOP}
+@cindex @code{GIMPLE_NOP}
+
+@deftypefn {GIMPLE function} gimple gimple_build_nop (void)
+Build a @code{GIMPLE_NOP} statement.
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool gimple_nop_p (gimple g)
+Returns @code{TRUE} if statement @code{G} is a @code{GIMPLE_NOP}. 
+@end deftypefn
+
+@node @code{GIMPLE_OMP_ATOMIC_LOAD}
+@subsection @code{GIMPLE_OMP_ATOMIC_LOAD}
+@cindex @code{GIMPLE_OMP_ATOMIC_LOAD}
+
+@deftypefn {GIMPLE function} gimple gimple_build_omp_atomic_load (tree lhs, tree rhs)
+Build a @code{GIMPLE_OMP_ATOMIC_LOAD} statement.  @code{LHS} is the left-hand
+side of the assignment.  @code{RHS} is the right-hand side of the
+assignment.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_omp_atomic_load_set_lhs (gimple g, tree lhs)
+Set the @code{LHS} of an atomic load. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_omp_atomic_load_lhs (gimple g)
+Get the @code{LHS} of an atomic load. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_omp_atomic_load_set_rhs (gimple g, tree rhs)
+Set the @code{RHS} of an atomic set. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_omp_atomic_load_rhs (gimple g)
+Get the @code{RHS} of an atomic set. 
+@end deftypefn
+
+
+@node @code{GIMPLE_OMP_ATOMIC_STORE}
+@subsection @code{GIMPLE_OMP_ATOMIC_STORE}
+@cindex @code{GIMPLE_OMP_ATOMIC_STORE}
+
+@deftypefn {GIMPLE function} gimple gimple_build_omp_atomic_store (tree val)
+Build a @code{GIMPLE_OMP_ATOMIC_STORE} statement. @code{VAL} is the value to be
+stored.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_omp_atomic_store_set_val (gimple g, tree val)
+Set the value being stored in an atomic store. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_omp_atomic_store_val (gimple g)
+Return the value being stored in an atomic store. 
+@end deftypefn
+
+@node @code{GIMPLE_OMP_CONTINUE}
+@subsection @code{GIMPLE_OMP_CONTINUE}
+@cindex @code{GIMPLE_OMP_CONTINUE}
+
+@deftypefn {GIMPLE function} gimple gimple_build_omp_continue (tree control_def, tree control_use)
+Build a @code{GIMPLE_OMP_CONTINUE} statement.  @code{CONTROL_DEF} is the
+definition of the control variable.  @code{CONTROL_USE} is the use of
+the control variable.
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_omp_continue_control_def (gimple s)
+Return the definition of the control variable on a
+@code{GIMPLE_OMP_CONTINUE} in @code{S}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} tree gimple_omp_continue_control_def_ptr (gimple s)
+Same as above, but return the pointer.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} tree gimple_omp_continue_set_control_def (gimple s)
+Set the control variable definition for a @code{GIMPLE_OMP_CONTINUE}
+statement in @code{S}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} tree gimple_omp_continue_control_use (gimple s)
+Return the use of the control variable on a @code{GIMPLE_OMP_CONTINUE}
+in @code{S}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} tree gimple_omp_continue_control_use_ptr (gimple s)
+Same as above, but return the pointer.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} tree gimple_omp_continue_set_control_use (gimple s)
+Set the control variable use for a @code{GIMPLE_OMP_CONTINUE} statement
+in @code{S}.
+@end deftypefn
+
+
+@node @code{GIMPLE_OMP_CRITICAL}
+@subsection @code{GIMPLE_OMP_CRITICAL}
+@cindex @code{GIMPLE_OMP_CRITICAL}
+
+@deftypefn {GIMPLE function} gimple gimple_build_omp_critical (gimple_seq body, tree name)
+Build a @code{GIMPLE_OMP_CRITICAL} statement. @code{BODY} is the sequence of
+statements for which only one thread can execute.  @code{NAME} is an
+optional identifier for this critical block.
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_omp_critical_name (gimple g)
+Return the name associated with @code{OMP_CRITICAL} statement @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} {tree *} gimple_omp_critical_name_ptr (gimple g)
+Return a pointer to the name associated with @code{OMP} critical
+statement @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_omp_critical_set_name (gimple g, tree name)
+Set @code{NAME} to be the name associated with @code{OMP} critical statement @code{G}. 
+@end deftypefn
+
+@node @code{GIMPLE_OMP_FOR}
+@subsection @code{GIMPLE_OMP_FOR}
+@cindex @code{GIMPLE_OMP_FOR}
+
+@deftypefn {GIMPLE function} gimple gimple_build_omp_for (gimple_seq body, @
+tree clauses, tree index, tree initial, tree final, tree incr, @
+gimple_seq pre_body, enum tree_code omp_for_cond)
+Build a @code{GIMPLE_OMP_FOR} statement. @code{BODY} is sequence of statements
+inside the for loop.  @code{CLAUSES}, are any of the @code{OMP} loop
+construct's clauses: private, firstprivate,  lastprivate,
+reductions, ordered, schedule, and nowait.  @code{PRE_BODY} is the
+sequence of statements that are loop invariant.  @code{INDEX} is the
+index variable.  @code{INITIAL} is the initial value of @code{INDEX}.  @code{FINAL} is
+final value of @code{INDEX}.  OMP_FOR_COND is the predicate used to
+compare @code{INDEX} and @code{FINAL}.  @code{INCR} is the increment expression.
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_omp_for_clauses (gimple g)
+Return the clauses associated with @code{OMP_FOR} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} {tree *} gimple_omp_for_clauses_ptr (gimple g)
+Return a pointer to the @code{OMP_FOR} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_omp_for_set_clauses (gimple g, tree clauses)
+Set @code{CLAUSES} to be the list of clauses associated with @code{OMP_FOR} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_omp_for_index (gimple g)
+Return the index variable for @code{OMP_FOR} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} {tree *} gimple_omp_for_index_ptr (gimple g)
+Return a pointer to the index variable for @code{OMP_FOR} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_omp_for_set_index (gimple g, tree index)
+Set @code{INDEX} to be the index variable for @code{OMP_FOR} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_omp_for_initial (gimple g)
+Return the initial value for @code{OMP_FOR} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} {tree *} gimple_omp_for_initial_ptr (gimple g)
+Return a pointer to the initial value for @code{OMP_FOR} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_omp_for_set_initial (gimple g, tree initial)
+Set @code{INITIAL} to be the initial value for @code{OMP_FOR} @code{G}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_omp_for_final (gimple g)
+Return the final value for @code{OMP_FOR} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} {tree *} gimple_omp_for_final_ptr (gimple g)
+turn a pointer to the final value for @code{OMP_FOR} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_omp_for_set_final (gimple g, tree final)
+Set @code{FINAL} to be the final value for @code{OMP_FOR} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_omp_for_incr (gimple g)
+Return the increment value for @code{OMP_FOR} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} {tree *} gimple_omp_for_incr_ptr (gimple g)
+Return a pointer to the increment value for @code{OMP_FOR} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_omp_for_set_incr (gimple g, tree incr)
+Set @code{INCR} to be the increment value for @code{OMP_FOR} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple_seq gimple_omp_for_pre_body (gimple g)
+Return the sequence of statements to execute before the @code{OMP_FOR}
+statement @code{G} starts. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_omp_for_set_pre_body (gimple g, gimple_seq pre_body)
+Set @code{PRE_BODY} to be the sequence of statements to execute before
+the @code{OMP_FOR} statement @code{G} starts.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} void gimple_omp_for_set_cond (gimple g, enum tree_code cond)
+Set @code{COND} to be the condition code for @code{OMP_FOR} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} {enum tree_code} gimple_omp_for_cond (gimple g)
+Return the condition code associated with @code{OMP_FOR} @code{G}. 
+@end deftypefn
+
+
+@node @code{GIMPLE_OMP_MASTER}
+@subsection @code{GIMPLE_OMP_MASTER}
+@cindex @code{GIMPLE_OMP_MASTER}
+
+@deftypefn {GIMPLE function} gimple gimple_build_omp_master (gimple_seq body)
+Build a @code{GIMPLE_OMP_MASTER} statement. @code{BODY} is the sequence of
+statements to be executed by just the master.
+@end deftypefn
+
+
+@node @code{GIMPLE_OMP_ORDERED}
+@subsection @code{GIMPLE_OMP_ORDERED}
+@cindex @code{GIMPLE_OMP_ORDERED}
+
+@deftypefn {GIMPLE function} gimple gimple_build_omp_ordered (gimple_seq body)
+Build a @code{GIMPLE_OMP_ORDERED} statement.
+@end deftypefn
+
+@code{BODY} is the sequence of statements inside a loop that will
+executed in sequence.
+
+
+@node @code{GIMPLE_OMP_PARALLEL}
+@subsection @code{GIMPLE_OMP_PARALLEL}
+@cindex @code{GIMPLE_OMP_PARALLEL}
+
+@deftypefn {GIMPLE function} gimple gimple_build_omp_parallel (gimple_seq @
+body, tree clauses, tree child_fn, tree data_arg)
+Build a @code{GIMPLE_OMP_PARALLEL} statement.
+@end deftypefn
+
+@code{BODY} is sequence of statements which are executed in parallel.
+@code{CLAUSES}, are the @code{OMP} parallel construct's clauses.  @code{CHILD_FN} is
+the function created for the parallel threads to execute.
+@code{DATA_ARG} are the shared data argument(s).
+
+@deftypefn {GIMPLE function} bool gimple_omp_parallel_combined_p (gimple g)
+Return true if @code{OMP} parallel statement @code{G} has the
+@code{GF_OMP_PARALLEL_COMBINED} flag set.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} void gimple_omp_parallel_set_combined_p (gimple g)
+Set the @code{GF_OMP_PARALLEL_COMBINED} field in @code{OMP} parallel statement
+@code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} gimple_seq gimple_omp_body (gimple g)
+Return the body for the @code{OMP} statement @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_omp_set_body (gimple g, gimple_seq body)
+Set @code{BODY} to be the body for the @code{OMP} statement @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_omp_parallel_clauses (gimple g)
+Return the clauses associated with @code{OMP_PARALLEL} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} {tree *} gimple_omp_parallel_clauses_ptr (gimple g)
+Return a pointer to the clauses associated with @code{OMP_PARALLEL} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_omp_parallel_set_clauses (gimple g, tree clauses)
+Set @code{CLAUSES} to be the list of clauses associated with
+@code{OMP_PARALLEL} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_omp_parallel_child_fn (gimple g)
+Return the child function used to hold the body of @code{OMP_PARALLEL}
+@code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} {tree *} gimple_omp_parallel_child_fn_ptr (gimple g)
+Return a pointer to the child function used to hold the body of
+@code{OMP_PARALLEL} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_omp_parallel_set_child_fn (gimple g, tree child_fn)
+Set @code{CHILD_FN} to be the child function for @code{OMP_PARALLEL} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_omp_parallel_data_arg (gimple g)
+Return the artificial argument used to send variables and values
+from the parent to the children threads in @code{OMP_PARALLEL} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} {tree *} gimple_omp_parallel_data_arg_ptr (gimple g)
+Return a pointer to the data argument for @code{OMP_PARALLEL} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_omp_parallel_set_data_arg (gimple g, tree data_arg)
+Set @code{DATA_ARG} to be the data argument for @code{OMP_PARALLEL} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool is_gimple_omp (gimple stmt)
+Returns true when the gimple statement @code{STMT} is any of the OpenMP
+types. 
+@end deftypefn
+
+
+@node @code{GIMPLE_OMP_RETURN}
+@subsection @code{GIMPLE_OMP_RETURN}
+@cindex @code{GIMPLE_OMP_RETURN}
+
+@deftypefn {GIMPLE function} gimple gimple_build_omp_return (bool wait_p)
+Build a @code{GIMPLE_OMP_RETURN} statement. @code{WAIT_P} is true if this is a
+non-waiting return.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_omp_return_set_nowait (gimple s)
+Set the nowait flag on @code{GIMPLE_OMP_RETURN} statement @code{S}.
+@end deftypefn
+ 
+
+@deftypefn {GIMPLE function} bool gimple_omp_return_nowait_p (gimple g)
+Return true if @code{OMP} return statement @code{G} has the
+@code{GF_OMP_RETURN_NOWAIT} flag set.
+@end deftypefn
+
+@node @code{GIMPLE_OMP_SECTION}
+@subsection @code{GIMPLE_OMP_SECTION}
+@cindex @code{GIMPLE_OMP_SECTION}
+
+@deftypefn {GIMPLE function} gimple gimple_build_omp_section (gimple_seq body)
+Build a @code{GIMPLE_OMP_SECTION} statement for a sections statement.
+@end deftypefn
+
+@code{BODY} is the sequence of statements in the section.
+
+@deftypefn {GIMPLE function} bool gimple_omp_section_last_p (gimple g)
+Return true if @code{OMP} section statement @code{G} has the
+@code{GF_OMP_SECTION_LAST} flag set.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} void gimple_omp_section_set_last (gimple g)
+Set the @code{GF_OMP_SECTION_LAST} flag on @code{G}.
+@end deftypefn
+
+@node @code{GIMPLE_OMP_SECTIONS}
+@subsection @code{GIMPLE_OMP_SECTIONS}
+@cindex @code{GIMPLE_OMP_SECTIONS}
+
+@deftypefn {GIMPLE function} gimple gimple_build_omp_sections (gimple_seq body, tree clauses)
+Build a @code{GIMPLE_OMP_SECTIONS} statement. @code{BODY} is a sequence of
+section statements.  @code{CLAUSES} are any of the @code{OMP} sections
+construct's clauses: private, firstprivate, lastprivate,
+reduction, and nowait.
+@end deftypefn
+
+
+@deftypefn {GIMPLE function} gimple gimple_build_omp_sections_switch (void)
+Build a @code{GIMPLE_OMP_SECTIONS_SWITCH} statement.
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_omp_sections_control (gimple g)
+Return the control variable associated with the
+@code{GIMPLE_OMP_SECTIONS} in @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} {tree *} gimple_omp_sections_control_ptr (gimple g)
+Return a pointer to the clauses associated with the
+@code{GIMPLE_OMP_SECTIONS} in @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} void gimple_omp_sections_set_control (gimple g, tree control)
+Set @code{CONTROL} to be the set of clauses associated with the
+@code{GIMPLE_OMP_SECTIONS} in @code{G}.
+@end deftypefn
+ 
+@deftypefn {GIMPLE function} tree gimple_omp_sections_clauses (gimple g)
+Return the clauses associated with @code{OMP_SECTIONS} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} {tree *} gimple_omp_sections_clauses_ptr (gimple g)
+Return a pointer to the clauses associated with @code{OMP_SECTIONS} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_omp_sections_set_clauses (gimple g, tree clauses)
+Set @code{CLAUSES} to be the set of clauses associated with @code{OMP_SECTIONS}
+@code{G}. 
+@end deftypefn
+
+
+@node @code{GIMPLE_OMP_SINGLE}
+@subsection @code{GIMPLE_OMP_SINGLE}
+@cindex @code{GIMPLE_OMP_SINGLE}
+
+@deftypefn {GIMPLE function} gimple gimple_build_omp_single (gimple_seq body, tree clauses)
+Build a @code{GIMPLE_OMP_SINGLE} statement. @code{BODY} is the sequence of
+statements that will be executed once.  @code{CLAUSES} are any of the
+@code{OMP} single construct's clauses: private, firstprivate,
+copyprivate, nowait.
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_omp_single_clauses (gimple g)
+Return the clauses associated with @code{OMP_SINGLE} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} {tree *} gimple_omp_single_clauses_ptr (gimple g)
+Return a pointer to the clauses associated with @code{OMP_SINGLE} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_omp_single_set_clauses (gimple g, tree clauses)
+Set @code{CLAUSES} to be the clauses associated with @code{OMP_SINGLE} @code{G}. 
+@end deftypefn
+
+
+@node @code{GIMPLE_PHI}
+@subsection @code{GIMPLE_PHI}
+@cindex @code{GIMPLE_PHI}
+
+@deftypefn {GIMPLE function} gimple make_phi_node (tree var, int len)
+Build a @code{PHI} node with len argument slots for variable var.
+@end deftypefn
+
+@deftypefn {GIMPLE function} unsigned gimple_phi_capacity (gimple g)
+Return the maximum number of arguments supported by @code{GIMPLE_PHI} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} unsigned gimple_phi_num_args (gimple g)
+Return the number of arguments in @code{GIMPLE_PHI} @code{G}. This must always
+be exactly the number of incoming edges for the basic block
+holding @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_phi_result (gimple g)
+Return the @code{SSA} name created by @code{GIMPLE_PHI} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} {tree *} gimple_phi_result_ptr (gimple g)
+Return a pointer to the @code{SSA} name created by @code{GIMPLE_PHI} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_phi_set_result (gimple g, tree result)
+Set @code{RESULT} to be the @code{SSA} name created by @code{GIMPLE_PHI} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} {struct phi_arg_d *} gimple_phi_arg (gimple g, index)
+Return the @code{PHI} argument corresponding to incoming edge @code{INDEX} for
+@code{GIMPLE_PHI} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_phi_set_arg (gimple g, index, struct phi_arg_d * phiarg)
+Set @code{PHIARG} to be the argument corresponding to incoming edge
+@code{INDEX} for @code{GIMPLE_PHI} @code{G}. 
+@end deftypefn
+
+@node @code{GIMPLE_RESX}
+@subsection @code{GIMPLE_RESX}
+@cindex @code{GIMPLE_RESX}
+
+@deftypefn {GIMPLE function} gimple gimple_build_resx (int region)
+Build a @code{GIMPLE_RESX} statement which is a statement.  This
+statement is a placeholder for _Unwind_Resume before we know if a
+function call or a branch is needed.  @code{REGION} is the exception
+region from which control is flowing.
+@end deftypefn
+
+@deftypefn {GIMPLE function} int gimple_resx_region (gimple g)
+Return the region number for @code{GIMPLE_RESX} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_resx_set_region (gimple g, int region)
+Set @code{REGION} to be the region number for @code{GIMPLE_RESX} @code{G}. 
+@end deftypefn
+
+@node @code{GIMPLE_RETURN}
+@subsection @code{GIMPLE_RETURN}
+@cindex @code{GIMPLE_RETURN}
+
+@deftypefn {GIMPLE function} gimple gimple_build_return (tree retval)
+Build a @code{GIMPLE_RETURN} statement whose return value is retval.
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_return_retval (gimple g)
+Return the return value for @code{GIMPLE_RETURN} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_return_set_retval (gimple g, tree retval)
+Set @code{RETVAL} to be the return value for @code{GIMPLE_RETURN} @code{G}. 
+@end deftypefn
+
+@node @code{GIMPLE_SWITCH}
+@subsection @code{GIMPLE_SWITCH}
+@cindex @code{GIMPLE_SWITCH}
+
+@deftypefn {GIMPLE function} gimple gimple_build_switch (unsigned nlabels, @
+tree index, tree default_label, ...)
+Build a @code{GIMPLE_SWITCH} statement.  @code{NLABELS} are the number of
+labels excluding the default label.  The default label is passed
+in @code{DEFAULT_LABEL}.  The rest of the arguments are trees
+representing the labels.  Each label is a tree of code
+@code{CASE_LABEL_EXPR}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple gimple_build_switch_vec (tree index, tree @
+default_label, @code{VEC}(tree,heap) *args)
+This function is an alternate way of building @code{GIMPLE_SWITCH}
+statements.  @code{INDEX} and @code{DEFAULT_LABEL} are as in
+gimple_build_switch.  @code{ARGS} is a vector of @code{CASE_LABEL_EXPR} trees
+that contain the labels.
+@end deftypefn
+
+@deftypefn {GIMPLE function} unsigned gimple_switch_num_labels (gimple g)
+Return the number of labels associated with the switch statement
+@code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_switch_set_num_labels (gimple g, @
+unsigned nlabels)
+Set @code{NLABELS} to be the number of labels for the switch statement
+@code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_switch_index (gimple g)
+Return the index variable used by the switch statement @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_switch_set_index (gimple g, tree index)
+Set @code{INDEX} to be the index variable for switch statement @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_switch_label (gimple g, unsigned index)
+Return the label numbered @code{INDEX}. The default label is 0, followed
+by any labels in a switch statement. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_switch_set_label (gimple g, unsigned @
+index, tree label)
+Set the label number @code{INDEX} to @code{LABEL}. 0 is always the default
+label. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} tree gimple_switch_default_label (gimple g)
+Return the default label for a switch statement. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_switch_set_default_label (gimple g, @
+tree label)
+Set the default label for a switch statement. 
+@end deftypefn
+
+
+@node @code{GIMPLE_TRY}
+@subsection @code{GIMPLE_TRY}
+@cindex @code{GIMPLE_TRY}
+
+@deftypefn {GIMPLE function} gimple gimple_build_try (gimple_seq eval, @
+gimple_seq cleanup, unsigned int kind)
+Build a @code{GIMPLE_TRY} statement.  @code{EVAL} is a sequence with the
+expression to evaluate.  @code{CLEANUP} is a sequence of statements to
+run at clean-up time.  @code{KIND} is the enumeration value
+@code{GIMPLE_TRY_CATCH} if this statement denotes a try/catch construct
+or @code{GIMPLE_TRY_FINALLY} if this statement denotes a try/finally
+construct.
+@end deftypefn
+
+@deftypefn {GIMPLE function} {enum gimple_try_flags} gimple_try_kind (gimple g)
+Return the kind of try block represented by @code{GIMPLE_TRY} @code{G}. This is
+either @code{GIMPLE_TRY_CATCH} or @code{GIMPLE_TRY_FINALLY}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool gimple_try_catch_is_cleanup (gimple g)
+Return the @code{GIMPLE_TRY_CATCH_IS_CLEANUP} flag. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple_seq gimple_try_eval (gimple g)
+Return the sequence of statements used as the body for @code{GIMPLE_TRY}
+@code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple_seq gimple_try_cleanup (gimple g)
+Return the sequence of statements used as the cleanup body for
+@code{GIMPLE_TRY} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_try_set_catch_is_cleanup (gimple g, @
+bool catch_is_cleanup)
+Set the @code{GIMPLE_TRY_CATCH_IS_CLEANUP} flag. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_try_set_eval (gimple g, gimple_seq eval)
+Set @code{EVAL} to be the sequence of statements to use as the body for
+@code{GIMPLE_TRY} @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_try_set_cleanup (gimple g, gimple_seq cleanup)
+Set @code{CLEANUP} to be the sequence of statements to use as the
+cleanup body for @code{GIMPLE_TRY} @code{G}. 
+@end deftypefn
+
+@node @code{GIMPLE_WITH_CLEANUP_EXPR}
+@subsection @code{GIMPLE_WITH_CLEANUP_EXPR}
+@cindex @code{GIMPLE_WITH_CLEANUP_EXPR}
+
+@deftypefn {GIMPLE function} gimple gimple_build_wce (gimple_seq cleanup)
+Build a @code{GIMPLE_WITH_CLEANUP_EXPR} statement.  @code{CLEANUP} is the
+clean-up expression.
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple_seq gimple_wce_cleanup (gimple g)
+Return the cleanup sequence for cleanup statement @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_wce_set_cleanup (gimple g, gimple_seq cleanup)
+Set @code{CLEANUP} to be the cleanup sequence for @code{G}. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool gimple_wce_cleanup_eh_only (gimple g)
+Return the @code{CLEANUP_EH_ONLY} flag for a @code{WCE} tuple. 
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_wce_set_cleanup_eh_only (gimple g, bool eh_only_p)
+Set the @code{CLEANUP_EH_ONLY} flag for a @code{WCE} tuple. 
+@end deftypefn
+
+
+@node GIMPLE sequences 
+@section GIMPLE sequences 
+@cindex GIMPLE sequences 
+
+GIMPLE sequences are the tuple equivalent of @code{STATEMENT_LIST}'s
+used in @code{GENERIC}.  They are used to chain statements together, and
+when used in conjunction with sequence iterators, provide a
+framework for iterating through statements.
+
+GIMPLE sequences are of type struct @code{gimple_sequence}, but are more
+commonly passed by reference to functions dealing with sequences.
+The type for a sequence pointer is @code{gimple_seq} which is the same
+as struct @code{gimple_sequence} *.  When declaring a local sequence,
+you can define a local variable of type struct @code{gimple_sequence}.
+When declaring a sequence allocated on the garbage collected
+heap, use the function @code{gimple_seq_alloc} documented below.
+
+There are convenience functions for iterating through sequences
+in the section entitled Sequence Iterators.
+
+Below is a list of functions to manipulate and query sequences.
+
+@deftypefn {GIMPLE function} void gimple_seq_add_stmt (gimple_seq *seq, gimple g)
+Link a gimple statement to the end of the sequence *@code{SEQ} if @code{G} is
+not @code{NULL}.  If *@code{SEQ} is @code{NULL}, allocate a sequence before linking.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_seq_add_seq (gimple_seq *dest, gimple_seq src)
+Append sequence @code{SRC} to the end of sequence *@code{DEST} if @code{SRC} is not
+@code{NULL}.  If *@code{DEST} is @code{NULL}, allocate a new sequence before
+appending.
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple_seq gimple_seq_deep_copy (gimple_seq src)
+Perform a deep copy of sequence @code{SRC} and return the result.
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple_seq gimple_seq_reverse (gimple_seq seq)
+Reverse the order of the statements in the sequence @code{SEQ}.  Return
+@code{SEQ}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple gimple_seq_first (gimple_seq s)
+Return the first statement in sequence @code{S}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple gimple_seq_last (gimple_seq s)
+Return the last statement in sequence @code{S}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_seq_set_last (gimple_seq s, gimple last)
+Set the last statement in sequence @code{S} to the statement in @code{LAST}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_seq_set_first (gimple_seq s, gimple first)
+Set the first statement in sequence @code{S} to the statement in @code{FIRST}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_seq_init (gimple_seq s)
+Initialize sequence @code{S} to an empty sequence.
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple_seq gimple_seq_alloc (void)
+Allocate a new sequence in the garbage collected store and return
+it.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_seq_copy (gimple_seq dest, gimple_seq src)
+Copy the sequence @code{SRC} into the sequence @code{DEST}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool gimple_seq_empty_p (gimple_seq s)
+Return true if the sequence @code{S} is empty.
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple_seq bb_seq (basic_block bb)
+Returns the sequence of statements in @code{BB}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void set_bb_seq (basic_block bb, gimple_seq seq)
+Sets the sequence of statements in @code{BB} to @code{SEQ}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool gimple_seq_singleton_p (gimple_seq seq)
+Determine whether @code{SEQ} contains exactly one statement.
+@end deftypefn
+
+@node Sequence iterators 
+@section Sequence iterators 
+@cindex Sequence iterators 
+
+Sequence iterators are convenience constructs for iterating
+through statements in a sequence.  Given a sequence @code{SEQ}, here is
+a typical use of gimple sequence iterators:
+
+@smallexample
+gimple_stmt_iterator gsi;
+
+for (gsi = gsi_start (seq); !gsi_end_p (gsi); gsi_next (&gsi))
+  @{
+    gimple g = gsi_stmt (gsi);
+    /* Do something with gimple statement @code{G}.  */
+  @}
+@end smallexample
+
+Backward iterations are possible:
+
+@smallexample
+        for (gsi = gsi_last (seq); !gsi_end_p (gsi); gsi_prev (&gsi))
+@end smallexample
+
+Forward and backward iterations on basic blocks are possible with
+@code{gsi_start_bb} and @code{gsi_last_bb}.
+
+In the documentation below we sometimes refer to enum
+@code{gsi_iterator_update}.  The valid options for this enumeration are:
+
+@itemize @bullet
+@item @code{GSI_NEW_STMT}
+Only valid when a single statement is added.  Move the iterator to it.
+
+@item @code{GSI_SAME_STMT}
+Leave the iterator at the same statement.
+
+@item @code{GSI_CONTINUE_LINKING}
+Move iterator to whatever position is suitable for linking other
+statements in the same direction.
+@end itemize
+
+Below is a list of the functions used to manipulate and use
+statement iterators.
+
+@deftypefn {GIMPLE function} gimple_stmt_iterator gsi_start (gimple_seq seq)
+Return a new iterator pointing to the sequence @code{SEQ}'s first
+statement.  If @code{SEQ} is empty, the iterator's basic block is @code{NULL}.
+Use @code{gsi_start_bb} instead when the iterator needs to always have
+the correct basic block set.
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple_stmt_iterator gsi_start_bb (basic_block bb)
+Return a new iterator pointing to the first statement in basic
+block @code{BB}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple_stmt_iterator gsi_last (gimple_seq seq)
+Return a new iterator initially pointing to the last statement of
+sequence @code{SEQ}.  If @code{SEQ} is empty, the iterator's basic block is
+@code{NULL}.  Use @code{gsi_last_bb} instead when the iterator needs to always
+have the correct basic block set.
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple_stmt_iterator gsi_last_bb (basic_block bb)
+Return a new iterator pointing to the last statement in basic
+block @code{BB}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool gsi_end_p (gimple_stmt_iterator i)
+Return @code{TRUE} if at the end of @code{I}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} bool gsi_one_before_end_p (gimple_stmt_iterator i)
+Return @code{TRUE} if we're one statement before the end of @code{I}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gsi_next (gimple_stmt_iterator *i)
+Advance the iterator to the next gimple statement.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gsi_prev (gimple_stmt_iterator *i)
+Advance the iterator to the previous gimple statement.
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple gsi_stmt (gimple_stmt_iterator i)
+Return the current stmt.
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple_stmt_iterator gsi_after_labels (basic_block bb)
+Return a block statement iterator that points to the first
+non-label statement in block @code{BB}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} {gimple *} gsi_stmt_ptr (gimple_stmt_iterator *i)
+Return a pointer to the current stmt.
+@end deftypefn
+
+@deftypefn {GIMPLE function} basic_block gsi_bb (gimple_stmt_iterator i)
+Return the basic block associated with this iterator.
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple_seq gsi_seq (gimple_stmt_iterator i)
+Return the sequence associated with this iterator.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gsi_remove (gimple_stmt_iterator *i, bool remove_eh_info)
+Remove the current stmt from the sequence.  The iterator is
+updated to point to the next statement.  When @code{REMOVE_EH_INFO} is
+true we remove the statement pointed to by iterator @code{I} from the @code{EH}
+tables.  Otherwise we do not modify the @code{EH} tables.  Generally,
+@code{REMOVE_EH_INFO} should be true when the statement is going to be
+removed from the @code{IL} and not reinserted elsewhere.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gsi_link_seq_before (gimple_stmt_iterator *i, gimple_seq seq, enum gsi_iterator_update mode)
+Links the sequence of statements @code{SEQ} before the statement pointed
+by iterator @code{I}.  @code{MODE} indicates what to do with the iterator
+after insertion (see @code{enum gsi_iterator_update} above).
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gsi_link_before (gimple_stmt_iterator *i, gimple g, enum gsi_iterator_update mode)
+Links statement @code{G} before the statement pointed-to by iterator @code{I}.
+Updates iterator @code{I} according to @code{MODE}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gsi_link_seq_after (gimple_stmt_iterator *i, @
+gimple_seq seq, enum gsi_iterator_update mode)
+Links sequence @code{SEQ} after the statement pointed-to by iterator @code{I}.
+@code{MODE} is as in @code{gsi_insert_after}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gsi_link_after (gimple_stmt_iterator *i, @
+gimple g, enum gsi_iterator_update mode)
+Links statement @code{G} after the statement pointed-to by iterator @code{I}.
+@code{MODE} is as in @code{gsi_insert_after}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple_seq gsi_split_seq_after (gimple_stmt_iterator i)
+Move all statements in the sequence after @code{I} to a new sequence.
+Return this new sequence.
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple_seq gsi_split_seq_before (gimple_stmt_iterator *i)
+Move all statements in the sequence before @code{I} to a new sequence.
+Return this new sequence.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gsi_replace (gimple_stmt_iterator *i, @
+gimple stmt, bool update_eh_info)
+Replace the statement pointed-to by @code{I} to @code{STMT}.  If @code{UPDATE_EH_INFO}
+is true, the exception handling information of the original
+statement is moved to the new statement.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gsi_insert_before (gimple_stmt_iterator *i, @
+gimple stmt, enum gsi_iterator_update mode)
+Insert statement @code{STMT} before the statement pointed-to by iterator
+@code{I}, update @code{STMT}'s basic block and scan it for new operands.  @code{MODE}
+specifies how to update iterator @code{I} after insertion (see enum
+@code{gsi_iterator_update}).
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gsi_insert_seq_before (gimple_stmt_iterator *i, @
+gimple_seq seq, enum gsi_iterator_update mode)
+Like @code{gsi_insert_before}, but for all the statements in @code{SEQ}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gsi_insert_after (gimple_stmt_iterator *i, @
+gimple stmt, enum gsi_iterator_update mode)
+Insert statement @code{STMT} after the statement pointed-to by iterator
+@code{I}, update @code{STMT}'s basic block and scan it for new operands.  @code{MODE}
+specifies how to update iterator @code{I} after insertion (see enum
+@code{gsi_iterator_update}).
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gsi_insert_seq_after (gimple_stmt_iterator *i, @
+gimple_seq seq, enum gsi_iterator_update mode)
+Like @code{gsi_insert_after}, but for all the statements in @code{SEQ}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} gimple_stmt_iterator gsi_for_stmt (gimple stmt)
+Finds iterator for @code{STMT}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gsi_move_after (gimple_stmt_iterator *from, @
+gimple_stmt_iterator *to)
+Move the statement at @code{FROM} so it comes right after the statement
+at @code{TO}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gsi_move_before (gimple_stmt_iterator *from, @
+gimple_stmt_iterator *to)
+Move the statement at @code{FROM} so it comes right before the statement
+at @code{TO}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gsi_move_to_bb_end (gimple_stmt_iterator *from, @
+basic_block bb)
+Move the statement at @code{FROM} to the end of basic block @code{BB}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gsi_insert_on_edge (edge e, gimple stmt)
+Add @code{STMT} to the pending list of edge @code{E}.  No actual insertion is
+made until a call to @code{gsi_commit_edge_inserts}() is made.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gsi_insert_seq_on_edge (edge e, gimple_seq seq)
+Add the sequence of statements in @code{SEQ} to the pending list of edge
+@code{E}.  No actual insertion is made until a call to
+@code{gsi_commit_edge_inserts}() is made.
+@end deftypefn
+
+@deftypefn {GIMPLE function} basic_block gsi_insert_on_edge_immediate (edge e, gimple stmt)
+Similar to @code{gsi_insert_on_edge}+@code{gsi_commit_edge_inserts}.  If a new
+block has to be created, it is returned.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gsi_commit_one_edge_insert (edge e, basic_block *new_bb)
+Commit insertions pending at edge @code{E}.  If a new block is created,
+set @code{NEW_BB} to this block, otherwise set it to @code{NULL}.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gsi_commit_edge_inserts (void)
+This routine will commit all pending edge insertions, creating
+any new basic blocks which are necessary.
+@end deftypefn
+
+
+@node Adding a new GIMPLE statement code
+@section Adding a new GIMPLE statement code
+@cindex Adding a new GIMPLE statement code
+
+The first step in adding a new GIMPLE statement code, is
+modifying the file @code{gimple.def}, which contains all the GIMPLE
+codes.  Then you must add a corresponding structure, and an entry
+in @code{union gimple_statement_d}, both of which are located in
+@code{gimple.h}.  This in turn, will require you to add a corresponding
+@code{GTY} tag in @code{gsstruct.def}, and code to handle this tag in
+@code{gss_for_code} which is located in @code{gimple.c}.
+
+In order for the garbage collector to know the size of the
+structure you created in @code{gimple.h}, you need to add a case to
+handle your new GIMPLE statement in @code{gimple_size} which is located
+in @code{gimple.c}.
+
+You will probably want to create a function to build the new
+gimple statement in @code{gimple.c}.  The function should be called
+@code{gimple_build_@var{new-tuple-name}}, and should return the new tuple
+of type gimple.
+
+If your new statement requires accessors for any members or
+operands it may have, put simple inline accessors in
+@code{gimple.h} and any non-trivial accessors in @code{gimple.c} with a
+corresponding prototype in @code{gimple.h}.
+
+
+@node Statement and operand traversals
+@section Statement and operand traversals
+@cindex Statement and operand traversals
+ 
+There are two functions available for walking statements and
+sequences: @code{walk_gimple_stmt} and @code{walk_gimple_seq},
+accordingly, and a third function for walking the operands in a
+statement: @code{walk_gimple_op}.
+
+@deftypefn {GIMPLE function} tree walk_gimple_stmt (gimple_stmt_iterator *gsi, @
+  walk_stmt_fn callback_stmt, walk_tree_fn callback_op, struct walk_stmt_info *wi)
+This function is used to walk the current statement in @code{GSI},
+optionally using traversal state stored in @code{WI}.  If @code{WI} is @code{NULL}, no
+state is kept during the traversal.
+
+The callback @code{CALLBACK_STMT} is called.  If @code{CALLBACK_STMT} returns
+true, it means that the callback function has handled all the
+operands of the statement and it is not necessary to walk its
+operands.
+
+If @code{CALLBACK_STMT} is @code{NULL} or it returns false, @code{CALLBACK_OP} is
+called on each operand of the statement via @code{walk_gimple_op}.  If
+@code{walk_gimple_op} returns non-@code{NULL} for any operand, the remaining
+operands are not scanned.
+
+The return value is that returned by the last call to
+@code{walk_gimple_op}, or @code{NULL_TREE} if no @code{CALLBACK_OP} is specified.
+@end deftypefn
+
+
+@deftypefn {GIMPLE function} tree walk_gimple_op (gimple stmt, @
+  walk_tree_fn callback_op, struct walk_stmt_info *wi)
+Use this function to walk the operands of statement @code{STMT}.  Every
+operand is walked via @code{walk_tree} with optional state information
+in @code{WI}.
+
+@code{CALLBACK_OP} is called on each operand of @code{STMT} via @code{walk_tree}.
+Additional parameters to @code{walk_tree} must be stored in @code{WI}.  For
+each operand @code{OP}, @code{walk_tree} is called as:
+
+@smallexample
+walk_tree (&@code{OP}, @code{CALLBACK_OP}, @code{WI}, @code{PSET})
+@end smallexample
+
+If @code{CALLBACK_OP} returns non-@code{NULL} for an operand, the remaining
+operands are not scanned.  The return value is that returned by
+the last call to @code{walk_tree}, or @code{NULL_TREE} if no @code{CALLBACK_OP} is
+specified.
+@end deftypefn
+
+
+@deftypefn {GIMPLE function} tree walk_gimple_seq (gimple_seq seq, @
+  walk_stmt_fn callback_stmt, walk_tree_fn callback_op, struct walk_stmt_info *wi)
+This function walks all the statements in the sequence @code{SEQ}
+calling @code{walk_gimple_stmt} on each one.  @code{WI} is as in
+@code{walk_gimple_stmt}.  If @code{walk_gimple_stmt} returns non-@code{NULL}, the walk
+is stopped and the value returned.  Otherwise, all the statements
+are walked and @code{NULL_TREE} returned.
+@end deftypefn
diff --git a/gcc/doc/gnu.texi b/gcc/doc/gnu.texi
new file mode 100644
index 000000000..641fe3072
--- /dev/null
+++ b/gcc/doc/gnu.texi
@@ -0,0 +1,20 @@
+@c Copyright (C) 2001 Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node GNU Project
+@unnumbered The GNU Project and GNU/Linux
+
+The GNU Project was launched in 1984 to develop a complete Unix-like
+operating system which is free software: the GNU system.  (GNU is a
+recursive acronym for ``GNU's Not Unix''; it is pronounced
+``guh-NEW''@.)  Variants of the GNU operating system, which use the
+kernel Linux, are now widely used; though these systems are often
+referred to as ``Linux'', they are more accurately called GNU/Linux
+systems.
+
+For more information, see:
+@smallexample
+@uref{http://www.gnu.org/}
+@uref{http://www.gnu.org/gnu/linux-and-gnu.html}
+@end smallexample
diff --git a/gcc/doc/gpl.7 b/gcc/doc/gpl.7
new file mode 100644
index 000000000..93cbb9931
--- /dev/null
+++ b/gcc/doc/gpl.7
@@ -0,0 +1,841 @@
+.\" Automatically generated by Pod::Man 2.25 (Pod::Simple 3.16)
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+.    \" simple accents for nroff and troff
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+.    ds ' \&
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+.    ds /
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+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
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+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GPL 7"
+.TH GPL 7 "2013-04-12" "gcc-4.6.4" "GNU"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+gpl \- GNU General Public License
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+.SS "\s-1GNU\s0 General Public License"
+.IX Subsection "GNU General Public License"
+.SS "Version 3, 29 June 2007"
+.IX Subsection "Version 3, 29 June 2007"
+.Vb 1
+\&        Copyright (c) 2007 Free Software Foundation, Inc. <http://fsf.org/>
+\&        
+\&        Everyone is permitted to copy and distribute verbatim copies of this
+\&        license document, but changing it is not allowed.
+.Ve
+.SS "Preamble"
+.IX Subsection "Preamble"
+The \s-1GNU\s0 General Public License is a free, copyleft license for
+software and other kinds of works.
+.PP
+The licenses for most software and other practical works are designed
+to take away your freedom to share and change the works.  By contrast,
+the \s-1GNU\s0 General Public License is intended to guarantee your freedom
+to share and change all versions of a program\*(--to make sure it remains
+free software for all its users.  We, the Free Software Foundation,
+use the \s-1GNU\s0 General Public License for most of our software; it
+applies also to any other work released this way by its authors.  You
+can apply it to your programs, too.
+.PP
+When we speak of free software, we are referring to freedom, not
+price.  Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+them if you wish), that you receive source code or can get it if you
+want it, that you can change the software or use pieces of it in new
+free programs, and that you know you can do these things.
+.PP
+To protect your rights, we need to prevent others from denying you
+these rights or asking you to surrender the rights.  Therefore, you
+have certain responsibilities if you distribute copies of the
+software, or if you modify it: responsibilities to respect the freedom
+of others.
+.PP
+For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must pass on to the recipients the same
+freedoms that you received.  You must make sure that they, too,
+receive or can get the source code.  And you must show them these
+terms so they know their rights.
+.PP
+Developers that use the \s-1GNU\s0 \s-1GPL\s0 protect your rights with two steps:
+(1) assert copyright on the software, and (2) offer you this License
+giving you legal permission to copy, distribute and/or modify it.
+.PP
+For the developers' and authors' protection, the \s-1GPL\s0 clearly explains
+that there is no warranty for this free software.  For both users' and
+authors' sake, the \s-1GPL\s0 requires that modified versions be marked as
+changed, so that their problems will not be attributed erroneously to
+authors of previous versions.
+.PP
+Some devices are designed to deny users access to install or run
+modified versions of the software inside them, although the
+manufacturer can do so.  This is fundamentally incompatible with the
+aim of protecting users' freedom to change the software.  The
+systematic pattern of such abuse occurs in the area of products for
+individuals to use, which is precisely where it is most unacceptable.
+Therefore, we have designed this version of the \s-1GPL\s0 to prohibit the
+practice for those products.  If such problems arise substantially in
+other domains, we stand ready to extend this provision to those
+domains in future versions of the \s-1GPL\s0, as needed to protect the
+freedom of users.
+.PP
+Finally, every program is threatened constantly by software patents.
+States should not allow patents to restrict development and use of
+software on general-purpose computers, but in those that do, we wish
+to avoid the special danger that patents applied to a free program
+could make it effectively proprietary.  To prevent this, the \s-1GPL\s0
+assures that patents cannot be used to render the program non-free.
+.PP
+The precise terms and conditions for copying, distribution and
+modification follow.
+.SS "\s-1TERMS\s0 \s-1AND\s0 \s-1CONDITIONS\s0"
+.IX Subsection "TERMS AND CONDITIONS"
+.IP "0. Definitions." 4
+.IX Item "0. Definitions."
+\&\*(L"This License\*(R" refers to version 3 of the \s-1GNU\s0 General Public License.
+.Sp
+\&\*(L"Copyright\*(R" also means copyright-like laws that apply to other kinds
+of works, such as semiconductor masks.
+.Sp
+\&\*(L"The Program\*(R" refers to any copyrightable work licensed under this
+License.  Each licensee is addressed as \*(L"you\*(R".  \*(L"Licensees\*(R" and
+\&\*(L"recipients\*(R" may be individuals or organizations.
+.Sp
+To \*(L"modify\*(R" a work means to copy from or adapt all or part of the work
+in a fashion requiring copyright permission, other than the making of
+an exact copy.  The resulting work is called a \*(L"modified version\*(R" of
+the earlier work or a work \*(L"based on\*(R" the earlier work.
+.Sp
+A \*(L"covered work\*(R" means either the unmodified Program or a work based
+on the Program.
+.Sp
+To \*(L"propagate\*(R" a work means to do anything with it that, without
+permission, would make you directly or secondarily liable for
+infringement under applicable copyright law, except executing it on a
+computer or modifying a private copy.  Propagation includes copying,
+distribution (with or without modification), making available to the
+public, and in some countries other activities as well.
+.Sp
+To \*(L"convey\*(R" a work means any kind of propagation that enables other
+parties to make or receive copies.  Mere interaction with a user
+through a computer network, with no transfer of a copy, is not
+conveying.
+.Sp
+An interactive user interface displays \*(L"Appropriate Legal Notices\*(R" to
+the extent that it includes a convenient and prominently visible
+feature that (1) displays an appropriate copyright notice, and (2)
+tells the user that there is no warranty for the work (except to the
+extent that warranties are provided), that licensees may convey the
+work under this License, and how to view a copy of this License.  If
+the interface presents a list of user commands or options, such as a
+menu, a prominent item in the list meets this criterion.
+.IP "1. Source Code." 4
+.IX Item "1. Source Code."
+The \*(L"source code\*(R" for a work means the preferred form of the work for
+making modifications to it.  \*(L"Object code\*(R" means any non-source form
+of a work.
+.Sp
+A \*(L"Standard Interface\*(R" means an interface that either is an official
+standard defined by a recognized standards body, or, in the case of
+interfaces specified for a particular programming language, one that
+is widely used among developers working in that language.
+.Sp
+The \*(L"System Libraries\*(R" of an executable work include anything, other
+than the work as a whole, that (a) is included in the normal form of
+packaging a Major Component, but which is not part of that Major
+Component, and (b) serves only to enable use of the work with that
+Major Component, or to implement a Standard Interface for which an
+implementation is available to the public in source code form.  A
+\&\*(L"Major Component\*(R", in this context, means a major essential component
+(kernel, window system, and so on) of the specific operating system
+(if any) on which the executable work runs, or a compiler used to
+produce the work, or an object code interpreter used to run it.
+.Sp
+The \*(L"Corresponding Source\*(R" for a work in object code form means all
+the source code needed to generate, install, and (for an executable
+work) run the object code and to modify the work, including scripts to
+control those activities.  However, it does not include the work's
+System Libraries, or general-purpose tools or generally available free
+programs which are used unmodified in performing those activities but
+which are not part of the work.  For example, Corresponding Source
+includes interface definition files associated with source files for
+the work, and the source code for shared libraries and dynamically
+linked subprograms that the work is specifically designed to require,
+such as by intimate data communication or control flow between those
+subprograms and other parts of the work.
+.Sp
+The Corresponding Source need not include anything that users can
+regenerate automatically from other parts of the Corresponding Source.
+.Sp
+The Corresponding Source for a work in source code form is that same
+work.
+.IP "2. Basic Permissions." 4
+.IX Item "2. Basic Permissions."
+All rights granted under this License are granted for the term of
+copyright on the Program, and are irrevocable provided the stated
+conditions are met.  This License explicitly affirms your unlimited
+permission to run the unmodified Program.  The output from running a
+covered work is covered by this License only if the output, given its
+content, constitutes a covered work.  This License acknowledges your
+rights of fair use or other equivalent, as provided by copyright law.
+.Sp
+You may make, run and propagate covered works that you do not convey,
+without conditions so long as your license otherwise remains in force.
+You may convey covered works to others for the sole purpose of having
+them make modifications exclusively for you, or provide you with
+facilities for running those works, provided that you comply with the
+terms of this License in conveying all material for which you do not
+control copyright.  Those thus making or running the covered works for
+you must do so exclusively on your behalf, under your direction and
+control, on terms that prohibit them from making any copies of your
+copyrighted material outside their relationship with you.
+.Sp
+Conveying under any other circumstances is permitted solely under the
+conditions stated below.  Sublicensing is not allowed; section 10
+makes it unnecessary.
+.IP "3. Protecting Users' Legal Rights From Anti-Circumvention Law." 4
+.IX Item "3. Protecting Users' Legal Rights From Anti-Circumvention Law."
+No covered work shall be deemed part of an effective technological
+measure under any applicable law fulfilling obligations under article
+11 of the \s-1WIPO\s0 copyright treaty adopted on 20 December 1996, or
+similar laws prohibiting or restricting circumvention of such
+measures.
+.Sp
+When you convey a covered work, you waive any legal power to forbid
+circumvention of technological measures to the extent such
+circumvention is effected by exercising rights under this License with
+respect to the covered work, and you disclaim any intention to limit
+operation or modification of the work as a means of enforcing, against
+the work's users, your or third parties' legal rights to forbid
+circumvention of technological measures.
+.IP "4. Conveying Verbatim Copies." 4
+.IX Item "4. Conveying Verbatim Copies."
+You may convey verbatim copies of the Program's source code as you
+receive it, in any medium, provided that you conspicuously and
+appropriately publish on each copy an appropriate copyright notice;
+keep intact all notices stating that this License and any
+non-permissive terms added in accord with section 7 apply to the code;
+keep intact all notices of the absence of any warranty; and give all
+recipients a copy of this License along with the Program.
+.Sp
+You may charge any price or no price for each copy that you convey,
+and you may offer support or warranty protection for a fee.
+.IP "5. Conveying Modified Source Versions." 4
+.IX Item "5. Conveying Modified Source Versions."
+You may convey a work based on the Program, or the modifications to
+produce it from the Program, in the form of source code under the
+terms of section 4, provided that you also meet all of these
+conditions:
+.RS 4
+.IP "a." 4
+.IX Item "a."
+The work must carry prominent notices stating that you modified it,
+and giving a relevant date.
+.IP "b." 4
+.IX Item "b."
+The work must carry prominent notices stating that it is released
+under this License and any conditions added under section 7.  This
+requirement modifies the requirement in section 4 to \*(L"keep intact all
+notices\*(R".
+.IP "c." 4
+.IX Item "c."
+You must license the entire work, as a whole, under this License to
+anyone who comes into possession of a copy.  This License will
+therefore apply, along with any applicable section 7 additional terms,
+to the whole of the work, and all its parts, regardless of how they
+are packaged.  This License gives no permission to license the work in
+any other way, but it does not invalidate such permission if you have
+separately received it.
+.IP "d." 4
+.IX Item "d."
+If the work has interactive user interfaces, each must display
+Appropriate Legal Notices; however, if the Program has interactive
+interfaces that do not display Appropriate Legal Notices, your work
+need not make them do so.
+.RE
+.RS 4
+.Sp
+A compilation of a covered work with other separate and independent
+works, which are not by their nature extensions of the covered work,
+and which are not combined with it such as to form a larger program,
+in or on a volume of a storage or distribution medium, is called an
+\&\*(L"aggregate\*(R" if the compilation and its resulting copyright are not
+used to limit the access or legal rights of the compilation's users
+beyond what the individual works permit.  Inclusion of a covered work
+in an aggregate does not cause this License to apply to the other
+parts of the aggregate.
+.RE
+.IP "6. Conveying Non-Source Forms." 4
+.IX Item "6. Conveying Non-Source Forms."
+You may convey a covered work in object code form under the terms of
+sections 4 and 5, provided that you also convey the machine-readable
+Corresponding Source under the terms of this License, in one of these
+ways:
+.RS 4
+.IP "a." 4
+.IX Item "a."
+Convey the object code in, or embodied in, a physical product
+(including a physical distribution medium), accompanied by the
+Corresponding Source fixed on a durable physical medium customarily
+used for software interchange.
+.IP "b." 4
+.IX Item "b."
+Convey the object code in, or embodied in, a physical product
+(including a physical distribution medium), accompanied by a written
+offer, valid for at least three years and valid for as long as you
+offer spare parts or customer support for that product model, to give
+anyone who possesses the object code either (1) a copy of the
+Corresponding Source for all the software in the product that is
+covered by this License, on a durable physical medium customarily used
+for software interchange, for a price no more than your reasonable
+cost of physically performing this conveying of source, or (2) access
+to copy the Corresponding Source from a network server at no charge.
+.IP "c." 4
+.IX Item "c."
+Convey individual copies of the object code with a copy of the written
+offer to provide the Corresponding Source.  This alternative is
+allowed only occasionally and noncommercially, and only if you
+received the object code with such an offer, in accord with subsection
+6b.
+.IP "d." 4
+.IX Item "d."
+Convey the object code by offering access from a designated place
+(gratis or for a charge), and offer equivalent access to the
+Corresponding Source in the same way through the same place at no
+further charge.  You need not require recipients to copy the
+Corresponding Source along with the object code.  If the place to copy
+the object code is a network server, the Corresponding Source may be
+on a different server (operated by you or a third party) that supports
+equivalent copying facilities, provided you maintain clear directions
+next to the object code saying where to find the Corresponding Source.
+Regardless of what server hosts the Corresponding Source, you remain
+obligated to ensure that it is available for as long as needed to
+satisfy these requirements.
+.IP "e." 4
+.IX Item "e."
+Convey the object code using peer-to-peer transmission, provided you
+inform other peers where the object code and Corresponding Source of
+the work are being offered to the general public at no charge under
+subsection 6d.
+.RE
+.RS 4
+.Sp
+A separable portion of the object code, whose source code is excluded
+from the Corresponding Source as a System Library, need not be
+included in conveying the object code work.
+.Sp
+A \*(L"User Product\*(R" is either (1) a \*(L"consumer product\*(R", which means any
+tangible personal property which is normally used for personal,
+family, or household purposes, or (2) anything designed or sold for
+incorporation into a dwelling.  In determining whether a product is a
+consumer product, doubtful cases shall be resolved in favor of
+coverage.  For a particular product received by a particular user,
+\&\*(L"normally used\*(R" refers to a typical or common use of that class of
+product, regardless of the status of the particular user or of the way
+in which the particular user actually uses, or expects or is expected
+to use, the product.  A product is a consumer product regardless of
+whether the product has substantial commercial, industrial or
+non-consumer uses, unless such uses represent the only significant
+mode of use of the product.
+.Sp
+\&\*(L"Installation Information\*(R" for a User Product means any methods,
+procedures, authorization keys, or other information required to
+install and execute modified versions of a covered work in that User
+Product from a modified version of its Corresponding Source.  The
+information must suffice to ensure that the continued functioning of
+the modified object code is in no case prevented or interfered with
+solely because modification has been made.
+.Sp
+If you convey an object code work under this section in, or with, or
+specifically for use in, a User Product, and the conveying occurs as
+part of a transaction in which the right of possession and use of the
+User Product is transferred to the recipient in perpetuity or for a
+fixed term (regardless of how the transaction is characterized), the
+Corresponding Source conveyed under this section must be accompanied
+by the Installation Information.  But this requirement does not apply
+if neither you nor any third party retains the ability to install
+modified object code on the User Product (for example, the work has
+been installed in \s-1ROM\s0).
+.Sp
+The requirement to provide Installation Information does not include a
+requirement to continue to provide support service, warranty, or
+updates for a work that has been modified or installed by the
+recipient, or for the User Product in which it has been modified or
+installed.  Access to a network may be denied when the modification
+itself materially and adversely affects the operation of the network
+or violates the rules and protocols for communication across the
+network.
+.Sp
+Corresponding Source conveyed, and Installation Information provided,
+in accord with this section must be in a format that is publicly
+documented (and with an implementation available to the public in
+source code form), and must require no special password or key for
+unpacking, reading or copying.
+.RE
+.IP "7. Additional Terms." 4
+.IX Item "7. Additional Terms."
+\&\*(L"Additional permissions\*(R" are terms that supplement the terms of this
+License by making exceptions from one or more of its conditions.
+Additional permissions that are applicable to the entire Program shall
+be treated as though they were included in this License, to the extent
+that they are valid under applicable law.  If additional permissions
+apply only to part of the Program, that part may be used separately
+under those permissions, but the entire Program remains governed by
+this License without regard to the additional permissions.
+.Sp
+When you convey a copy of a covered work, you may at your option
+remove any additional permissions from that copy, or from any part of
+it.  (Additional permissions may be written to require their own
+removal in certain cases when you modify the work.)  You may place
+additional permissions on material, added by you to a covered work,
+for which you have or can give appropriate copyright permission.
+.Sp
+Notwithstanding any other provision of this License, for material you
+add to a covered work, you may (if authorized by the copyright holders
+of that material) supplement the terms of this License with terms:
+.RS 4
+.IP "a." 4
+.IX Item "a."
+Disclaiming warranty or limiting liability differently from the terms
+of sections 15 and 16 of this License; or
+.IP "b." 4
+.IX Item "b."
+Requiring preservation of specified reasonable legal notices or author
+attributions in that material or in the Appropriate Legal Notices
+displayed by works containing it; or
+.IP "c." 4
+.IX Item "c."
+Prohibiting misrepresentation of the origin of that material, or
+requiring that modified versions of such material be marked in
+reasonable ways as different from the original version; or
+.IP "d." 4
+.IX Item "d."
+Limiting the use for publicity purposes of names of licensors or
+authors of the material; or
+.IP "e." 4
+.IX Item "e."
+Declining to grant rights under trademark law for use of some trade
+names, trademarks, or service marks; or
+.IP "f." 4
+.IX Item "f."
+Requiring indemnification of licensors and authors of that material by
+anyone who conveys the material (or modified versions of it) with
+contractual assumptions of liability to the recipient, for any
+liability that these contractual assumptions directly impose on those
+licensors and authors.
+.RE
+.RS 4
+.Sp
+All other non-permissive additional terms are considered \*(L"further
+restrictions\*(R" within the meaning of section 10.  If the Program as you
+received it, or any part of it, contains a notice stating that it is
+governed by this License along with a term that is a further
+restriction, you may remove that term.  If a license document contains
+a further restriction but permits relicensing or conveying under this
+License, you may add to a covered work material governed by the terms
+of that license document, provided that the further restriction does
+not survive such relicensing or conveying.
+.Sp
+If you add terms to a covered work in accord with this section, you
+must place, in the relevant source files, a statement of the
+additional terms that apply to those files, or a notice indicating
+where to find the applicable terms.
+.Sp
+Additional terms, permissive or non-permissive, may be stated in the
+form of a separately written license, or stated as exceptions; the
+above requirements apply either way.
+.RE
+.IP "8. Termination." 4
+.IX Item "8. Termination."
+You may not propagate or modify a covered work except as expressly
+provided under this License.  Any attempt otherwise to propagate or
+modify it is void, and will automatically terminate your rights under
+this License (including any patent licenses granted under the third
+paragraph of section 11).
+.Sp
+However, if you cease all violation of this License, then your license
+from a particular copyright holder is reinstated (a) provisionally,
+unless and until the copyright holder explicitly and finally
+terminates your license, and (b) permanently, if the copyright holder
+fails to notify you of the violation by some reasonable means prior to
+60 days after the cessation.
+.Sp
+Moreover, your license from a particular copyright holder is
+reinstated permanently if the copyright holder notifies you of the
+violation by some reasonable means, this is the first time you have
+received notice of violation of this License (for any work) from that
+copyright holder, and you cure the violation prior to 30 days after
+your receipt of the notice.
+.Sp
+Termination of your rights under this section does not terminate the
+licenses of parties who have received copies or rights from you under
+this License.  If your rights have been terminated and not permanently
+reinstated, you do not qualify to receive new licenses for the same
+material under section 10.
+.IP "9. Acceptance Not Required for Having Copies." 4
+.IX Item "9. Acceptance Not Required for Having Copies."
+You are not required to accept this License in order to receive or run
+a copy of the Program.  Ancillary propagation of a covered work
+occurring solely as a consequence of using peer-to-peer transmission
+to receive a copy likewise does not require acceptance.  However,
+nothing other than this License grants you permission to propagate or
+modify any covered work.  These actions infringe copyright if you do
+not accept this License.  Therefore, by modifying or propagating a
+covered work, you indicate your acceptance of this License to do so.
+.IP "10. Automatic Licensing of Downstream Recipients." 4
+.IX Item "10. Automatic Licensing of Downstream Recipients."
+Each time you convey a covered work, the recipient automatically
+receives a license from the original licensors, to run, modify and
+propagate that work, subject to this License.  You are not responsible
+for enforcing compliance by third parties with this License.
+.Sp
+An \*(L"entity transaction\*(R" is a transaction transferring control of an
+organization, or substantially all assets of one, or subdividing an
+organization, or merging organizations.  If propagation of a covered
+work results from an entity transaction, each party to that
+transaction who receives a copy of the work also receives whatever
+licenses to the work the party's predecessor in interest had or could
+give under the previous paragraph, plus a right to possession of the
+Corresponding Source of the work from the predecessor in interest, if
+the predecessor has it or can get it with reasonable efforts.
+.Sp
+You may not impose any further restrictions on the exercise of the
+rights granted or affirmed under this License.  For example, you may
+not impose a license fee, royalty, or other charge for exercise of
+rights granted under this License, and you may not initiate litigation
+(including a cross-claim or counterclaim in a lawsuit) alleging that
+any patent claim is infringed by making, using, selling, offering for
+sale, or importing the Program or any portion of it.
+.IP "11. Patents." 4
+.IX Item "11. Patents."
+A \*(L"contributor\*(R" is a copyright holder who authorizes use under this
+License of the Program or a work on which the Program is based.  The
+work thus licensed is called the contributor's \*(L"contributor version\*(R".
+.Sp
+A contributor's \*(L"essential patent claims\*(R" are all patent claims owned
+or controlled by the contributor, whether already acquired or
+hereafter acquired, that would be infringed by some manner, permitted
+by this License, of making, using, or selling its contributor version,
+but do not include claims that would be infringed only as a
+consequence of further modification of the contributor version.  For
+purposes of this definition, \*(L"control\*(R" includes the right to grant
+patent sublicenses in a manner consistent with the requirements of
+this License.
+.Sp
+Each contributor grants you a non-exclusive, worldwide, royalty-free
+patent license under the contributor's essential patent claims, to
+make, use, sell, offer for sale, import and otherwise run, modify and
+propagate the contents of its contributor version.
+.Sp
+In the following three paragraphs, a \*(L"patent license\*(R" is any express
+agreement or commitment, however denominated, not to enforce a patent
+(such as an express permission to practice a patent or covenant not to
+sue for patent infringement).  To \*(L"grant\*(R" such a patent license to a
+party means to make such an agreement or commitment not to enforce a
+patent against the party.
+.Sp
+If you convey a covered work, knowingly relying on a patent license,
+and the Corresponding Source of the work is not available for anyone
+to copy, free of charge and under the terms of this License, through a
+publicly available network server or other readily accessible means,
+then you must either (1) cause the Corresponding Source to be so
+available, or (2) arrange to deprive yourself of the benefit of the
+patent license for this particular work, or (3) arrange, in a manner
+consistent with the requirements of this License, to extend the patent
+license to downstream recipients.  \*(L"Knowingly relying\*(R" means you have
+actual knowledge that, but for the patent license, your conveying the
+covered work in a country, or your recipient's use of the covered work
+in a country, would infringe one or more identifiable patents in that
+country that you have reason to believe are valid.
+.Sp
+If, pursuant to or in connection with a single transaction or
+arrangement, you convey, or propagate by procuring conveyance of, a
+covered work, and grant a patent license to some of the parties
+receiving the covered work authorizing them to use, propagate, modify
+or convey a specific copy of the covered work, then the patent license
+you grant is automatically extended to all recipients of the covered
+work and works based on it.
+.Sp
+A patent license is \*(L"discriminatory\*(R" if it does not include within the
+scope of its coverage, prohibits the exercise of, or is conditioned on
+the non-exercise of one or more of the rights that are specifically
+granted under this License.  You may not convey a covered work if you
+are a party to an arrangement with a third party that is in the
+business of distributing software, under which you make payment to the
+third party based on the extent of your activity of conveying the
+work, and under which the third party grants, to any of the parties
+who would receive the covered work from you, a discriminatory patent
+license (a) in connection with copies of the covered work conveyed by
+you (or copies made from those copies), or (b) primarily for and in
+connection with specific products or compilations that contain the
+covered work, unless you entered into that arrangement, or that patent
+license was granted, prior to 28 March 2007.
+.Sp
+Nothing in this License shall be construed as excluding or limiting
+any implied license or other defenses to infringement that may
+otherwise be available to you under applicable patent law.
+.IP "12. No Surrender of Others' Freedom." 4
+.IX Item "12. No Surrender of Others' Freedom."
+If conditions are imposed on you (whether by court order, agreement or
+otherwise) that contradict the conditions of this License, they do not
+excuse you from the conditions of this License.  If you cannot convey
+a covered work so as to satisfy simultaneously your obligations under
+this License and any other pertinent obligations, then as a
+consequence you may not convey it at all.  For example, if you agree
+to terms that obligate you to collect a royalty for further conveying
+from those to whom you convey the Program, the only way you could
+satisfy both those terms and this License would be to refrain entirely
+from conveying the Program.
+.IP "13. Use with the \s-1GNU\s0 Affero General Public License." 4
+.IX Item "13. Use with the GNU Affero General Public License."
+Notwithstanding any other provision of this License, you have
+permission to link or combine any covered work with a work licensed
+under version 3 of the \s-1GNU\s0 Affero General Public License into a single
+combined work, and to convey the resulting work.  The terms of this
+License will continue to apply to the part which is the covered work,
+but the special requirements of the \s-1GNU\s0 Affero General Public License,
+section 13, concerning interaction through a network will apply to the
+combination as such.
+.IP "14. Revised Versions of this License." 4
+.IX Item "14. Revised Versions of this License."
+The Free Software Foundation may publish revised and/or new versions
+of the \s-1GNU\s0 General Public License from time to time.  Such new
+versions will be similar in spirit to the present version, but may
+differ in detail to address new problems or concerns.
+.Sp
+Each version is given a distinguishing version number.  If the Program
+specifies that a certain numbered version of the \s-1GNU\s0 General Public
+License \*(L"or any later version\*(R" applies to it, you have the option of
+following the terms and conditions either of that numbered version or
+of any later version published by the Free Software Foundation.  If
+the Program does not specify a version number of the \s-1GNU\s0 General
+Public License, you may choose any version ever published by the Free
+Software Foundation.
+.Sp
+If the Program specifies that a proxy can decide which future versions
+of the \s-1GNU\s0 General Public License can be used, that proxy's public
+statement of acceptance of a version permanently authorizes you to
+choose that version for the Program.
+.Sp
+Later license versions may give you additional or different
+permissions.  However, no additional obligations are imposed on any
+author or copyright holder as a result of your choosing to follow a
+later version.
+.IP "15. Disclaimer of Warranty." 4
+.IX Item "15. Disclaimer of Warranty."
+\&\s-1THERE\s0 \s-1IS\s0 \s-1NO\s0 \s-1WARRANTY\s0 \s-1FOR\s0 \s-1THE\s0 \s-1PROGRAM\s0, \s-1TO\s0 \s-1THE\s0 \s-1EXTENT\s0 \s-1PERMITTED\s0 \s-1BY\s0
+\&\s-1APPLICABLE\s0 \s-1LAW\s0.  \s-1EXCEPT\s0 \s-1WHEN\s0 \s-1OTHERWISE\s0 \s-1STATED\s0 \s-1IN\s0 \s-1WRITING\s0 \s-1THE\s0 \s-1COPYRIGHT\s0
+\&\s-1HOLDERS\s0 \s-1AND/OR\s0 \s-1OTHER\s0 \s-1PARTIES\s0 \s-1PROVIDE\s0 \s-1THE\s0 \s-1PROGRAM\s0 \*(L"\s-1AS\s0 \s-1IS\s0\*(R" \s-1WITHOUT\s0
+\&\s-1WARRANTY\s0 \s-1OF\s0 \s-1ANY\s0 \s-1KIND\s0, \s-1EITHER\s0 \s-1EXPRESSED\s0 \s-1OR\s0 \s-1IMPLIED\s0, \s-1INCLUDING\s0, \s-1BUT\s0 \s-1NOT\s0
+\&\s-1LIMITED\s0 \s-1TO\s0, \s-1THE\s0 \s-1IMPLIED\s0 \s-1WARRANTIES\s0 \s-1OF\s0 \s-1MERCHANTABILITY\s0 \s-1AND\s0 \s-1FITNESS\s0 \s-1FOR\s0
+A \s-1PARTICULAR\s0 \s-1PURPOSE\s0.  \s-1THE\s0 \s-1ENTIRE\s0 \s-1RISK\s0 \s-1AS\s0 \s-1TO\s0 \s-1THE\s0 \s-1QUALITY\s0 \s-1AND\s0
+\&\s-1PERFORMANCE\s0 \s-1OF\s0 \s-1THE\s0 \s-1PROGRAM\s0 \s-1IS\s0 \s-1WITH\s0 \s-1YOU\s0.  \s-1SHOULD\s0 \s-1THE\s0 \s-1PROGRAM\s0 \s-1PROVE\s0
+\&\s-1DEFECTIVE\s0, \s-1YOU\s0 \s-1ASSUME\s0 \s-1THE\s0 \s-1COST\s0 \s-1OF\s0 \s-1ALL\s0 \s-1NECESSARY\s0 \s-1SERVICING\s0, \s-1REPAIR\s0 \s-1OR\s0
+\&\s-1CORRECTION\s0.
+.IP "16. Limitation of Liability." 4
+.IX Item "16. Limitation of Liability."
+\&\s-1IN\s0 \s-1NO\s0 \s-1EVENT\s0 \s-1UNLESS\s0 \s-1REQUIRED\s0 \s-1BY\s0 \s-1APPLICABLE\s0 \s-1LAW\s0 \s-1OR\s0 \s-1AGREED\s0 \s-1TO\s0 \s-1IN\s0 \s-1WRITING\s0
+\&\s-1WILL\s0 \s-1ANY\s0 \s-1COPYRIGHT\s0 \s-1HOLDER\s0, \s-1OR\s0 \s-1ANY\s0 \s-1OTHER\s0 \s-1PARTY\s0 \s-1WHO\s0 \s-1MODIFIES\s0 \s-1AND/OR\s0
+\&\s-1CONVEYS\s0 \s-1THE\s0 \s-1PROGRAM\s0 \s-1AS\s0 \s-1PERMITTED\s0 \s-1ABOVE\s0, \s-1BE\s0 \s-1LIABLE\s0 \s-1TO\s0 \s-1YOU\s0 \s-1FOR\s0 \s-1DAMAGES\s0,
+\&\s-1INCLUDING\s0 \s-1ANY\s0 \s-1GENERAL\s0, \s-1SPECIAL\s0, \s-1INCIDENTAL\s0 \s-1OR\s0 \s-1CONSEQUENTIAL\s0 \s-1DAMAGES\s0
+\&\s-1ARISING\s0 \s-1OUT\s0 \s-1OF\s0 \s-1THE\s0 \s-1USE\s0 \s-1OR\s0 \s-1INABILITY\s0 \s-1TO\s0 \s-1USE\s0 \s-1THE\s0 \s-1PROGRAM\s0 (\s-1INCLUDING\s0 \s-1BUT\s0
+\&\s-1NOT\s0 \s-1LIMITED\s0 \s-1TO\s0 \s-1LOSS\s0 \s-1OF\s0 \s-1DATA\s0 \s-1OR\s0 \s-1DATA\s0 \s-1BEING\s0 \s-1RENDERED\s0 \s-1INACCURATE\s0 \s-1OR\s0
+\&\s-1LOSSES\s0 \s-1SUSTAINED\s0 \s-1BY\s0 \s-1YOU\s0 \s-1OR\s0 \s-1THIRD\s0 \s-1PARTIES\s0 \s-1OR\s0 A \s-1FAILURE\s0 \s-1OF\s0 \s-1THE\s0 \s-1PROGRAM\s0
+\&\s-1TO\s0 \s-1OPERATE\s0 \s-1WITH\s0 \s-1ANY\s0 \s-1OTHER\s0 \s-1PROGRAMS\s0), \s-1EVEN\s0 \s-1IF\s0 \s-1SUCH\s0 \s-1HOLDER\s0 \s-1OR\s0 \s-1OTHER\s0
+\&\s-1PARTY\s0 \s-1HAS\s0 \s-1BEEN\s0 \s-1ADVISED\s0 \s-1OF\s0 \s-1THE\s0 \s-1POSSIBILITY\s0 \s-1OF\s0 \s-1SUCH\s0 \s-1DAMAGES\s0.
+.IP "17. Interpretation of Sections 15 and 16." 4
+.IX Item "17. Interpretation of Sections 15 and 16."
+If the disclaimer of warranty and limitation of liability provided
+above cannot be given local legal effect according to their terms,
+reviewing courts shall apply local law that most closely approximates
+an absolute waiver of all civil liability in connection with the
+Program, unless a warranty or assumption of liability accompanies a
+copy of the Program in return for a fee.
+.SS "\s-1END\s0 \s-1OF\s0 \s-1TERMS\s0 \s-1AND\s0 \s-1CONDITIONS\s0"
+.IX Subsection "END OF TERMS AND CONDITIONS"
+.SS "How to Apply These Terms to Your New Programs"
+.IX Subsection "How to Apply These Terms to Your New Programs"
+If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these
+terms.
+.PP
+To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+state the exclusion of warranty; and each file should have at least
+the \*(L"copyright\*(R" line and a pointer to where the full notice is found.
+.PP
+.Vb 2
+\&        <one line to give the program\*(Aqs name and a brief idea of what it does.>  
+\&        Copyright (C) <year> <name of author>
+\&        
+\&        This program is free software: you can redistribute it and/or modify
+\&        it under the terms of the GNU General Public License as published by
+\&        the Free Software Foundation, either version 3 of the License, or (at
+\&        your option) any later version.
+\&        
+\&        This program is distributed in the hope that it will be useful, but
+\&        WITHOUT ANY WARRANTY; without even the implied warranty of
+\&        MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+\&        General Public License for more details.
+\&        
+\&        You should have received a copy of the GNU General Public License
+\&        along with this program.  If not, see <http://www.gnu.org/licenses/>.
+.Ve
+.PP
+Also add information on how to contact you by electronic and paper mail.
+.PP
+If the program does terminal interaction, make it output a short
+notice like this when it starts in an interactive mode:
+.PP
+.Vb 4
+\&        <program> Copyright (C) <year> <name of author> 
+\&        This program comes with ABSOLUTELY NO WARRANTY; for details type "show w".
+\&        This is free software, and you are welcome to redistribute it
+\&        under certain conditions; type "show c" for details.
+.Ve
+.PP
+The hypothetical commands \fBshow w\fR and \fBshow c\fR should show
+the appropriate parts of the General Public License.  Of course, your
+program's commands might be different; for a \s-1GUI\s0 interface, you would
+use an \*(L"about box\*(R".
+.PP
+You should also get your employer (if you work as a programmer) or school,
+if any, to sign a \*(L"copyright disclaimer\*(R" for the program, if necessary.
+For more information on this, and how to apply and follow the \s-1GNU\s0 \s-1GPL\s0, see
+<\fBhttp://www.gnu.org/licenses/\fR>.
+.PP
+The \s-1GNU\s0 General Public License does not permit incorporating your
+program into proprietary programs.  If your program is a subroutine
+library, you may consider it more useful to permit linking proprietary
+applications with the library.  If this is what you want to do, use
+the \s-1GNU\s0 Lesser General Public License instead of this License.  But
+first, please read <\fBhttp://www.gnu.org/philosophy/why\-not\-lgpl.html\fR>.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7).
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 2007 Free Software Foundation, Inc.
+.PP
+Everyone is permitted to copy and distribute verbatim copies of this
+license document, but changing it is not allowed.
diff --git a/gcc/doc/grmic.1 b/gcc/doc/grmic.1
new file mode 100644
index 000000000..9ef3054ea
--- /dev/null
+++ b/gcc/doc/grmic.1
@@ -0,0 +1,213 @@
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+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GRMIC 1"
+.TH GRMIC 1 "2013-04-12" "gcc-4.6.4" "GNU"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+grmic \- Generate stubs for Remote Method Invocation
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+\&\fBgrmic\fR [\fB\s-1OPTION\s0\fR] ... \fIclass\fR ...
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBgrmic\fR is a utility included with \f(CW\*(C`libgcj\*(C'\fR which generates
+stubs for remote objects.
+.PP
+Note that this program isn't yet fully compatible with the \s-1JDK\s0
+\&\fBgrmic\fR.  Some options, such as \fB\-classpath\fR, are
+recognized but currently ignored.  We have left these options
+undocumented for now.
+.PP
+Long options can also be given with a GNU-style leading \fB\-\-\fR.  For
+instance, \fB\-\-help\fR is accepted.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-keep\fR" 4
+.IX Item "-keep"
+.PD 0
+.IP "\fB\-keepgenerated\fR" 4
+.IX Item "-keepgenerated"
+.PD
+By default, \fBgrmic\fR deletes intermediate files.  Either of these
+options causes it not to delete such files.
+.IP "\fB\-v1.1\fR" 4
+.IX Item "-v1.1"
+Cause \fBgrmic\fR to create stubs and skeletons for the 1.1
+protocol version.
+.IP "\fB\-vcompat\fR" 4
+.IX Item "-vcompat"
+Cause \fBgrmic\fR to create stubs and skeletons compatible with both
+the 1.1 and 1.2 protocol versions.  This is the default.
+.IP "\fB\-v1.2\fR" 4
+.IX Item "-v1.2"
+Cause \fBgrmic\fR to create stubs and skeletons for the 1.2
+protocol version.
+.IP "\fB\-nocompile\fR" 4
+.IX Item "-nocompile"
+Don't compile the generated files.
+.IP "\fB\-verbose\fR" 4
+.IX Item "-verbose"
+Print information about what \fBgrmic\fR is doing.
+.IP "\fB\-d\fR \fIdirectory\fR" 4
+.IX Item "-d directory"
+Put output files in \fIdirectory\fR.  By default the files are put in
+the current working directory.
+.IP "\fB\-help\fR" 4
+.IX Item "-help"
+Print a help message, then exit.
+.IP "\fB\-version\fR" 4
+.IX Item "-version"
+Print version information, then exit.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, the Front-Cover Texts being (a) (see below), and
+with the Back-Cover Texts being (b) (see below).
+A copy of the license is included in the
+man page \fIgfdl\fR\|(7).
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\&     A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\&     You have freedom to copy and modify this GNU Manual, like GNU
+\&     software.  Copies published by the Free Software Foundation raise
+\&     funds for GNU development.
+.Ve
diff --git a/gcc/doc/gty.texi b/gcc/doc/gty.texi
new file mode 100644
index 000000000..95852c36a
--- /dev/null
+++ b/gcc/doc/gty.texi
@@ -0,0 +1,538 @@
+@c Copyright (C) 2002, 2003, 2004, 2007, 2008, 2009, 2010
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Type Information
+@chapter Memory Management and Type Information
+@cindex GGC
+@findex GTY
+
+GCC uses some fairly sophisticated memory management techniques, which
+involve determining information about GCC's data structures from GCC's
+source code and using this information to perform garbage collection and
+implement precompiled headers.
+
+A full C parser would be too complicated for this task, so a limited
+subset of C is interpreted and special markers are used to determine
+what parts of the source to look at.  All @code{struct} and
+@code{union} declarations that define data structures that are
+allocated under control of the garbage collector must be marked.  All
+global variables that hold pointers to garbage-collected memory must
+also be marked.  Finally, all global variables that need to be saved
+and restored by a precompiled header must be marked.  (The precompiled
+header mechanism can only save static variables if they're scalar.
+Complex data structures must be allocated in garbage-collected memory
+to be saved in a precompiled header.)
+
+The full format of a marker is
+@smallexample
+GTY (([@var{option}] [(@var{param})], [@var{option}] [(@var{param})] @dots{}))
+@end smallexample
+@noindent
+but in most cases no options are needed.  The outer double parentheses
+are still necessary, though: @code{GTY(())}.  Markers can appear:
+
+@itemize @bullet
+@item
+In a structure definition, before the open brace;
+@item
+In a global variable declaration, after the keyword @code{static} or
+@code{extern}; and
+@item
+In a structure field definition, before the name of the field.
+@end itemize
+
+Here are some examples of marking simple data structures and globals.
+
+@smallexample
+struct GTY(()) @var{tag}
+@{
+  @var{fields}@dots{}
+@};
+
+typedef struct GTY(()) @var{tag}
+@{
+  @var{fields}@dots{}
+@} *@var{typename};
+
+static GTY(()) struct @var{tag} *@var{list};   /* @r{points to GC memory} */
+static GTY(()) int @var{counter};        /* @r{save counter in a PCH} */
+@end smallexample
+
+The parser understands simple typedefs such as
+@code{typedef struct @var{tag} *@var{name};} and
+@code{typedef int @var{name};}.
+These don't need to be marked.
+
+@menu
+* GTY Options::         What goes inside a @code{GTY(())}.
+* GGC Roots::           Making global variables GGC roots.
+* Files::               How the generated files work.
+* Invoking the garbage collector::   How to invoke the garbage collector.
+* Troubleshooting::     When something does not work as expected.
+@end menu
+
+@node GTY Options
+@section The Inside of a @code{GTY(())}
+
+Sometimes the C code is not enough to fully describe the type
+structure.  Extra information can be provided with @code{GTY} options
+and additional markers.  Some options take a parameter, which may be
+either a string or a type name, depending on the parameter.  If an
+option takes no parameter, it is acceptable either to omit the
+parameter entirely, or to provide an empty string as a parameter.  For
+example, @code{@w{GTY ((skip))}} and @code{@w{GTY ((skip ("")))}} are
+equivalent.
+
+When the parameter is a string, often it is a fragment of C code.  Four
+special escapes may be used in these strings, to refer to pieces of
+the data structure being marked:
+
+@cindex % in GTY option
+@table @code
+@item %h
+The current structure.
+@item %1
+The structure that immediately contains the current structure.
+@item %0
+The outermost structure that contains the current structure.
+@item %a
+A partial expression of the form @code{[i1][i2]@dots{}} that indexes
+the array item currently being marked.
+@end table
+
+For instance, suppose that you have a structure of the form
+@smallexample
+struct A @{
+  @dots{}
+@};
+struct B @{
+  struct A foo[12];
+@};
+@end smallexample
+@noindent
+and @code{b} is a variable of type @code{struct B}.  When marking
+@samp{b.foo[11]}, @code{%h} would expand to @samp{b.foo[11]},
+@code{%0} and @code{%1} would both expand to @samp{b}, and @code{%a}
+would expand to @samp{[11]}.
+
+As in ordinary C, adjacent strings will be concatenated; this is
+helpful when you have a complicated expression.
+@smallexample
+@group
+GTY ((chain_next ("TREE_CODE (&%h.generic) == INTEGER_TYPE"
+                  " ? TYPE_NEXT_VARIANT (&%h.generic)"
+                  " : TREE_CHAIN (&%h.generic)")))
+@end group
+@end smallexample
+
+The available options are:
+
+@table @code
+@findex length
+@item length ("@var{expression}")
+
+There are two places the type machinery will need to be explicitly told
+the length of an array.  The first case is when a structure ends in a
+variable-length array, like this:
+@smallexample
+struct GTY(()) rtvec_def @{
+  int num_elem;         /* @r{number of elements} */
+  rtx GTY ((length ("%h.num_elem"))) elem[1];
+@};
+@end smallexample
+
+In this case, the @code{length} option is used to override the specified
+array length (which should usually be @code{1}).  The parameter of the
+option is a fragment of C code that calculates the length.
+
+The second case is when a structure or a global variable contains a
+pointer to an array, like this:
+@smallexample
+struct gimple_omp_for_iter * GTY((length ("%h.collapse"))) iter;
+@end smallexample
+In this case, @code{iter} has been allocated by writing something like
+@smallexample
+  x->iter = ggc_alloc_cleared_vec_gimple_omp_for_iter (collapse);
+@end smallexample
+and the @code{collapse} provides the length of the field.
+
+This second use of @code{length} also works on global variables, like:
+@verbatim
+static GTY((length("reg_known_value_size"))) rtx *reg_known_value;
+@end verbatim
+
+@findex skip
+@item skip
+
+If @code{skip} is applied to a field, the type machinery will ignore it.
+This is somewhat dangerous; the only safe use is in a union when one
+field really isn't ever used.
+
+@findex desc
+@findex tag
+@findex default
+@item desc ("@var{expression}")
+@itemx tag ("@var{constant}")
+@itemx default
+
+The type machinery needs to be told which field of a @code{union} is
+currently active.  This is done by giving each field a constant
+@code{tag} value, and then specifying a discriminator using @code{desc}.
+The value of the expression given by @code{desc} is compared against
+each @code{tag} value, each of which should be different.  If no
+@code{tag} is matched, the field marked with @code{default} is used if
+there is one, otherwise no field in the union will be marked.
+
+In the @code{desc} option, the ``current structure'' is the union that
+it discriminates.  Use @code{%1} to mean the structure containing it.
+There are no escapes available to the @code{tag} option, since it is a
+constant.
+
+For example,
+@smallexample
+struct GTY(()) tree_binding
+@{
+  struct tree_common common;
+  union tree_binding_u @{
+    tree GTY ((tag ("0"))) scope;
+    struct cp_binding_level * GTY ((tag ("1"))) level;
+  @} GTY ((desc ("BINDING_HAS_LEVEL_P ((tree)&%0)"))) xscope;
+  tree value;
+@};
+@end smallexample
+
+In this example, the value of BINDING_HAS_LEVEL_P when applied to a
+@code{struct tree_binding *} is presumed to be 0 or 1.  If 1, the type
+mechanism will treat the field @code{level} as being present and if 0,
+will treat the field @code{scope} as being present.
+
+@findex param_is
+@findex use_param
+@item param_is (@var{type})
+@itemx use_param
+
+Sometimes it's convenient to define some data structure to work on
+generic pointers (that is, @code{PTR}) and then use it with a specific
+type.  @code{param_is} specifies the real type pointed to, and
+@code{use_param} says where in the generic data structure that type
+should be put.
+
+For instance, to have a @code{htab_t} that points to trees, one would
+write the definition of @code{htab_t} like this:
+@smallexample
+typedef struct GTY(()) @{
+  @dots{}
+  void ** GTY ((use_param, @dots{})) entries;
+  @dots{}
+@} htab_t;
+@end smallexample
+and then declare variables like this:
+@smallexample
+  static htab_t GTY ((param_is (union tree_node))) ict;
+@end smallexample
+
+@findex param@var{n}_is
+@findex use_param@var{n}
+@item param@var{n}_is (@var{type})
+@itemx use_param@var{n}
+
+In more complicated cases, the data structure might need to work on
+several different types, which might not necessarily all be pointers.
+For this, @code{param1_is} through @code{param9_is} may be used to
+specify the real type of a field identified by @code{use_param1} through
+@code{use_param9}.
+
+@findex use_params
+@item use_params
+
+When a structure contains another structure that is parameterized,
+there's no need to do anything special, the inner structure inherits the
+parameters of the outer one.  When a structure contains a pointer to a
+parameterized structure, the type machinery won't automatically detect
+this (it could, it just doesn't yet), so it's necessary to tell it that
+the pointed-to structure should use the same parameters as the outer
+structure.  This is done by marking the pointer with the
+@code{use_params} option.
+
+@findex deletable
+@item deletable
+
+@code{deletable}, when applied to a global variable, indicates that when
+garbage collection runs, there's no need to mark anything pointed to
+by this variable, it can just be set to @code{NULL} instead.  This is used
+to keep a list of free structures around for re-use.
+
+@findex if_marked
+@item if_marked ("@var{expression}")
+
+Suppose you want some kinds of object to be unique, and so you put them
+in a hash table.  If garbage collection marks the hash table, these
+objects will never be freed, even if the last other reference to them
+goes away.  GGC has special handling to deal with this: if you use the
+@code{if_marked} option on a global hash table, GGC will call the
+routine whose name is the parameter to the option on each hash table
+entry.  If the routine returns nonzero, the hash table entry will
+be marked as usual.  If the routine returns zero, the hash table entry
+will be deleted.
+
+The routine @code{ggc_marked_p} can be used to determine if an element
+has been marked already; in fact, the usual case is to use
+@code{if_marked ("ggc_marked_p")}.
+
+@findex mark_hook
+@item mark_hook ("@var{hook-routine-name}")
+
+If provided for a structure or union type, the given
+@var{hook-routine-name} (between double-quotes) is the name of a
+routine called when the garbage collector has just marked the data as
+reachable. This routine should not change the data, or call any ggc
+routine. Its only argument is a pointer to the just marked (const)
+structure or union.
+
+@findex maybe_undef
+@item maybe_undef
+
+When applied to a field, @code{maybe_undef} indicates that it's OK if
+the structure that this fields points to is never defined, so long as
+this field is always @code{NULL}.  This is used to avoid requiring
+backends to define certain optional structures.  It doesn't work with
+language frontends.
+
+@findex nested_ptr
+@item nested_ptr (@var{type}, "@var{to expression}", "@var{from expression}")
+
+The type machinery expects all pointers to point to the start of an
+object.  Sometimes for abstraction purposes it's convenient to have
+a pointer which points inside an object.  So long as it's possible to
+convert the original object to and from the pointer, such pointers
+can still be used.  @var{type} is the type of the original object,
+the @var{to expression} returns the pointer given the original object,
+and the @var{from expression} returns the original object given
+the pointer.  The pointer will be available using the @code{%h}
+escape.
+
+@findex chain_next
+@findex chain_prev
+@findex chain_circular
+@item chain_next ("@var{expression}")
+@itemx chain_prev ("@var{expression}")
+@itemx chain_circular ("@var{expression}")
+
+It's helpful for the type machinery to know if objects are often
+chained together in long lists; this lets it generate code that uses
+less stack space by iterating along the list instead of recursing down
+it.  @code{chain_next} is an expression for the next item in the list,
+@code{chain_prev} is an expression for the previous item.  For singly
+linked lists, use only @code{chain_next}; for doubly linked lists, use
+both.  The machinery requires that taking the next item of the
+previous item gives the original item.  @code{chain_circular} is similar
+to @code{chain_next}, but can be used for circular single linked lists.
+
+@findex reorder
+@item reorder ("@var{function name}")
+
+Some data structures depend on the relative ordering of pointers.  If
+the precompiled header machinery needs to change that ordering, it
+will call the function referenced by the @code{reorder} option, before
+changing the pointers in the object that's pointed to by the field the
+option applies to.  The function must take four arguments, with the
+signature @samp{@w{void *, void *, gt_pointer_operator, void *}}.
+The first parameter is a pointer to the structure that contains the
+object being updated, or the object itself if there is no containing
+structure.  The second parameter is a cookie that should be ignored.
+The third parameter is a routine that, given a pointer, will update it
+to its correct new value.  The fourth parameter is a cookie that must
+be passed to the second parameter.
+
+PCH cannot handle data structures that depend on the absolute values
+of pointers.  @code{reorder} functions can be expensive.  When
+possible, it is better to depend on properties of the data, like an ID
+number or the hash of a string instead.
+
+@findex variable_size
+@item variable_size
+
+The type machinery expects the types to be of constant size.  When this
+is not true, for example, with structs that have array fields or unions,
+the type machinery cannot tell how many bytes need to be allocated at
+each allocation.  The @code{variable_size} is used to mark such types.
+The type machinery then provides allocators that take a parameter
+indicating an exact size of object being allocated.  Note that the size
+must be provided in bytes whereas the @code{length} option works with
+array lengths in number of elements.
+
+For example,
+@smallexample
+struct GTY((variable_size)) sorted_fields_type @{
+  int len;
+  tree GTY((length ("%h.len"))) elts[1];
+@};
+@end smallexample
+
+Then the objects of @code{struct sorted_fields_type} are allocated in GC 
+memory as follows:
+@smallexample
+  field_vec = ggc_alloc_sorted_fields_type (size);
+@end smallexample
+
+If @var{field_vec->elts} stores @var{n} elements, then @var{size}
+could be calculated as follows:
+@smallexample
+  size_t size = sizeof (struct sorted_fields_type) + n * sizeof (tree);
+@end smallexample
+
+@findex special
+@item special ("@var{name}")
+
+The @code{special} option is used to mark types that have to be dealt
+with by special case machinery.  The parameter is the name of the
+special case.  See @file{gengtype.c} for further details.  Avoid
+adding new special cases unless there is no other alternative.
+@end table
+
+@node GGC Roots
+@section Marking Roots for the Garbage Collector
+@cindex roots, marking
+@cindex marking roots
+
+In addition to keeping track of types, the type machinery also locates
+the global variables (@dfn{roots}) that the garbage collector starts
+at.  Roots must be declared using one of the following syntaxes:
+
+@itemize @bullet
+@item
+@code{extern GTY(([@var{options}])) @var{type} @var{name};}
+@item
+@code{static GTY(([@var{options}])) @var{type} @var{name};}
+@end itemize
+@noindent
+The syntax
+@itemize @bullet
+@item
+@code{GTY(([@var{options}])) @var{type} @var{name};}
+@end itemize
+@noindent
+is @emph{not} accepted.  There should be an @code{extern} declaration
+of such a variable in a header somewhere---mark that, not the
+definition.  Or, if the variable is only used in one file, make it
+@code{static}.
+
+@node Files
+@section Source Files Containing Type Information
+@cindex generated files
+@cindex files, generated
+
+Whenever you add @code{GTY} markers to a source file that previously
+had none, or create a new source file containing @code{GTY} markers,
+there are three things you need to do:
+
+@enumerate
+@item
+You need to add the file to the list of source files the type
+machinery scans.  There are four cases:
+
+@enumerate a
+@item
+For a back-end file, this is usually done
+automatically; if not, you should add it to @code{target_gtfiles} in
+the appropriate port's entries in @file{config.gcc}.
+
+@item
+For files shared by all front ends, add the filename to the
+@code{GTFILES} variable in @file{Makefile.in}.
+
+@item
+For files that are part of one front end, add the filename to the
+@code{gtfiles} variable defined in the appropriate
+@file{config-lang.in}.  For C, the file is @file{c-config-lang.in}.
+Headers should appear before non-headers in this list.
+
+@item
+For files that are part of some but not all front ends, add the
+filename to the @code{gtfiles} variable of @emph{all} the front ends
+that use it.
+@end enumerate
+
+@item
+If the file was a header file, you'll need to check that it's included
+in the right place to be visible to the generated files.  For a back-end
+header file, this should be done automatically.  For a front-end header
+file, it needs to be included by the same file that includes
+@file{gtype-@var{lang}.h}.  For other header files, it needs to be
+included in @file{gtype-desc.c}, which is a generated file, so add it to
+@code{ifiles} in @code{open_base_file} in @file{gengtype.c}.
+
+For source files that aren't header files, the machinery will generate a
+header file that should be included in the source file you just changed.
+The file will be called @file{gt-@var{path}.h} where @var{path} is the
+pathname relative to the @file{gcc} directory with slashes replaced by
+@verb{|-|}, so for example the header file to be included in
+@file{cp/parser.c} is called @file{gt-cp-parser.c}.  The
+generated header file should be included after everything else in the
+source file.  Don't forget to mention this file as a dependency in the
+@file{Makefile}!
+
+@end enumerate
+
+For language frontends, there is another file that needs to be included
+somewhere.  It will be called @file{gtype-@var{lang}.h}, where
+@var{lang} is the name of the subdirectory the language is contained in.
+
+Plugins can add additional root tables.  Run the @code{gengtype}
+utility in plugin mode as @code{gengtype -P pluginout.h @var{source-dir}
+@var{file-list} @var{plugin*.c}} with your plugin files
+@var{plugin*.c} using @code{GTY} to generate the @var{pluginout.h} file.
+The GCC build tree is needed to be present in that mode.
+
+
+@node Invoking the garbage collector
+@section How to invoke the garbage collector
+@cindex garbage collector, invocation
+@findex ggc_collect
+
+The GCC garbage collector GGC is only invoked explicitly. In contrast
+with many other garbage collectors, it is not implicitly invoked by
+allocation routines when a lot of memory has been consumed. So the
+only way to have GGC reclaim storage it to call the @code{ggc_collect}
+function explicitly.  This call is an expensive operation, as it may
+have to scan the entire heap.  Beware that local variables (on the GCC
+call stack) are not followed by such an invocation (as many other
+garbage collectors do): you should reference all your data from static
+or external @code{GTY}-ed variables, and it is advised to call
+@code{ggc_collect} with a shallow call stack.  The GGC is an exact mark
+and sweep garbage collector (so it does not scan the call stack for
+pointers).  In practice GCC passes don't often call @code{ggc_collect}
+themselves, because it is called by the pass manager between passes.
+
+At the time of the @code{ggc_collect} call all pointers in the GC-marked
+structures must be valid or @code{NULL}.  In practice this means that
+there should not be uninitialized pointer fields in the structures even
+if your code never reads or writes those fields at a particular
+instance.  One way to ensure this is to use cleared versions of
+allocators unless all the fields are initialized manually immediately
+after allocation.
+
+@node Troubleshooting
+@section Troubleshooting the garbage collector
+@cindex garbage collector, troubleshooting
+
+With the current garbage collector implementation, most issues should
+show up as GCC compilation errors.  Some of the most commonly
+encountered issues are described below.
+
+@itemize @bullet
+@item Gengtype does not produce allocators for a @code{GTY}-marked type.
+Gengtype checks if there is at least one possible path from GC roots to
+at least one instance of each type before outputting allocators.  If
+there is no such path, the @code{GTY} markers will be ignored and no
+allocators will be output.  Solve this by making sure that there exists
+at least one such path.  If creating it is unfeasible or raises a ``code
+smell'', consider if you really must use GC for allocating such type.
+
+@item Link-time errors about undefined @code{gt_ggc_r_foo_bar} and
+similarly-named symbols.  Check if your @file{foo_bar} source file has
+@code{#include "gt-foo_bar.h"} as its very last line.
+
+@end itemize
diff --git a/gcc/doc/headerdirs.texi b/gcc/doc/headerdirs.texi
new file mode 100644
index 000000000..bc7f07f36
--- /dev/null
+++ b/gcc/doc/headerdirs.texi
@@ -0,0 +1,32 @@
+@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Header Dirs
+@chapter Standard Header File Directories
+
+@code{GCC_INCLUDE_DIR} means the same thing for native and cross.  It is
+where GCC stores its private include files, and also where GCC
+stores the fixed include files.  A cross compiled GCC runs
+@code{fixincludes} on the header files in @file{$(tooldir)/include}.
+(If the cross compilation header files need to be fixed, they must be
+installed before GCC is built.  If the cross compilation header files
+are already suitable for GCC, nothing special need be done).
+
+@code{GPLUSPLUS_INCLUDE_DIR} means the same thing for native and cross.  It
+is where @command{g++} looks first for header files.  The C++ library
+installs only target independent header files in that directory.
+
+@code{LOCAL_INCLUDE_DIR} is used only by native compilers.  GCC
+doesn't install anything there.  It is normally
+@file{/usr/local/include}.  This is where local additions to a packaged
+system should place header files.
+
+@code{CROSS_INCLUDE_DIR} is used only by cross compilers.  GCC
+doesn't install anything there.
+
+@code{TOOL_INCLUDE_DIR} is used for both native and cross compilers.  It
+is the place for other packages to install header files that GCC will
+use.  For a cross-compiler, this is the equivalent of
+@file{/usr/include}.  When you build a cross-compiler,
+@code{fixincludes} processes any header files in this directory.
diff --git a/gcc/doc/hostconfig.texi b/gcc/doc/hostconfig.texi
new file mode 100644
index 000000000..b00cc54ab
--- /dev/null
+++ b/gcc/doc/hostconfig.texi
@@ -0,0 +1,231 @@
+@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+@c 2000, 2001, 2002, 2003, 2004, 2005, 2008, 2009
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gccint.texi.
+
+@node Host Config
+@chapter Host Configuration
+@cindex host configuration
+
+Most details about the machine and system on which the compiler is
+actually running are detected by the @command{configure} script.  Some
+things are impossible for @command{configure} to detect; these are
+described in two ways, either by macros defined in a file named
+@file{xm-@var{machine}.h} or by hook functions in the file specified
+by the @var{out_host_hook_obj} variable in @file{config.gcc}.  (The
+intention is that very few hosts will need a header file but nearly
+every fully supported host will need to override some hooks.)
+
+If you need to define only a few macros, and they have simple
+definitions, consider using the @code{xm_defines} variable in your
+@file{config.gcc} entry instead of creating a host configuration
+header.  @xref{System Config}.
+
+@menu
+* Host Common::         Things every host probably needs implemented.
+* Filesystem::          Your host can't have the letter `a' in filenames?
+* Host Misc::           Rare configuration options for hosts.
+@end menu
+
+@node Host Common
+@section Host Common
+@cindex host hooks
+@cindex host functions
+
+Some things are just not portable, even between similar operating systems,
+and are too difficult for autoconf to detect.  They get implemented using
+hook functions in the file specified by the @var{host_hook_obj}
+variable in @file{config.gcc}.
+
+@deftypefn {Host Hook} void HOST_HOOKS_EXTRA_SIGNALS (void)
+This host hook is used to set up handling for extra signals.  The most
+common thing to do in this hook is to detect stack overflow.
+@end deftypefn
+
+@deftypefn {Host Hook} {void *} HOST_HOOKS_GT_PCH_GET_ADDRESS (size_t @
+  @var{size}, int @var{fd})
+This host hook returns the address of some space that is likely to be
+free in some subsequent invocation of the compiler.  We intend to load
+the PCH data at this address such that the data need not be relocated.
+The area should be able to hold @var{size} bytes.  If the host uses
+@code{mmap}, @var{fd} is an open file descriptor that can be used for
+probing.
+@end deftypefn
+
+@deftypefn {Host Hook} int HOST_HOOKS_GT_PCH_USE_ADDRESS (void * @var{address}, @
+  size_t @var{size}, int @var{fd}, size_t @var{offset})
+This host hook is called when a PCH file is about to be loaded.
+We want to load @var{size} bytes from @var{fd} at @var{offset}
+into memory at @var{address}.  The given address will be the result of
+a previous invocation of @code{HOST_HOOKS_GT_PCH_GET_ADDRESS}.
+Return @minus{}1 if we couldn't allocate @var{size} bytes at @var{address}.
+Return 0 if the memory is allocated but the data is not loaded.  Return 1
+if the hook has performed everything.
+
+If the implementation uses reserved address space, free any reserved
+space beyond @var{size}, regardless of the return value.  If no PCH will
+be loaded, this hook may be called with @var{size} zero, in which case
+all reserved address space should be freed.
+
+Do not try to handle values of @var{address} that could not have been
+returned by this executable; just return @minus{}1.  Such values usually
+indicate an out-of-date PCH file (built by some other GCC executable),
+and such a PCH file won't work.
+@end deftypefn
+
+@deftypefn {Host Hook} size_t HOST_HOOKS_GT_PCH_ALLOC_GRANULARITY (void);
+This host hook returns the alignment required for allocating virtual
+memory.  Usually this is the same as getpagesize, but on some hosts the
+alignment for reserving memory differs from the pagesize for committing
+memory.
+@end deftypefn
+
+@node Filesystem
+@section Host Filesystem
+@cindex configuration file
+@cindex @file{xm-@var{machine}.h}
+
+GCC needs to know a number of things about the semantics of the host
+machine's filesystem.  Filesystems with Unix and MS-DOS semantics are
+automatically detected.  For other systems, you can define the
+following macros in @file{xm-@var{machine}.h}.
+
+@ftable @code
+@item HAVE_DOS_BASED_FILE_SYSTEM
+This macro is automatically defined by @file{system.h} if the host
+file system obeys the semantics defined by MS-DOS instead of Unix.
+DOS file systems are case insensitive, file specifications may begin
+with a drive letter, and both forward slash and backslash (@samp{/}
+and @samp{\}) are directory separators.
+
+@item DIR_SEPARATOR
+@itemx DIR_SEPARATOR_2
+If defined, these macros expand to character constants specifying
+separators for directory names within a file specification.
+@file{system.h} will automatically give them appropriate values on
+Unix and MS-DOS file systems.  If your file system is neither of
+these, define one or both appropriately in @file{xm-@var{machine}.h}.
+
+However, operating systems like VMS, where constructing a pathname is
+more complicated than just stringing together directory names
+separated by a special character, should not define either of these
+macros.
+
+@item PATH_SEPARATOR
+If defined, this macro should expand to a character constant
+specifying the separator for elements of search paths.  The default
+value is a colon (@samp{:}).  DOS-based systems usually, but not
+always, use semicolon (@samp{;}).
+
+@item VMS
+Define this macro if the host system is VMS@.
+
+@item HOST_OBJECT_SUFFIX
+Define this macro to be a C string representing the suffix for object
+files on your host machine.  If you do not define this macro, GCC will
+use @samp{.o} as the suffix for object files.
+
+@item HOST_EXECUTABLE_SUFFIX
+Define this macro to be a C string representing the suffix for
+executable files on your host machine.  If you do not define this macro,
+GCC will use the null string as the suffix for executable files.
+
+@item HOST_BIT_BUCKET
+A pathname defined by the host operating system, which can be opened as
+a file and written to, but all the information written is discarded.
+This is commonly known as a @dfn{bit bucket} or @dfn{null device}.  If
+you do not define this macro, GCC will use @samp{/dev/null} as the bit
+bucket.  If the host does not support a bit bucket, define this macro to
+an invalid filename.
+
+@item UPDATE_PATH_HOST_CANONICALIZE (@var{path})
+If defined, a C statement (sans semicolon) that performs host-dependent
+canonicalization when a path used in a compilation driver or
+preprocessor is canonicalized.  @var{path} is a malloc-ed path to be
+canonicalized.  If the C statement does canonicalize @var{path} into a
+different buffer, the old path should be freed and the new buffer should
+have been allocated with malloc.
+
+@item DUMPFILE_FORMAT
+Define this macro to be a C string representing the format to use for
+constructing the index part of debugging dump file names.  The resultant
+string must fit in fifteen bytes.  The full filename will be the
+concatenation of: the prefix of the assembler file name, the string
+resulting from applying this format to an index number, and a string
+unique to each dump file kind, e.g.@: @samp{rtl}.
+
+If you do not define this macro, GCC will use @samp{.%02d.}.  You should
+define this macro if using the default will create an invalid file name.
+
+@item DELETE_IF_ORDINARY
+Define this macro to be a C statement (sans semicolon) that performs
+host-dependent removal of ordinary temp files in the compilation driver.
+
+If you do not define this macro, GCC will use the default version.  You
+should define this macro if the default version does not reliably remove
+the temp file as, for example, on VMS which allows multiple versions
+of a file.
+
+@item HOST_LACKS_INODE_NUMBERS
+Define this macro if the host filesystem does not report meaningful inode
+numbers in struct stat.
+@end ftable
+
+@node Host Misc
+@section Host Misc
+@cindex configuration file
+@cindex @file{xm-@var{machine}.h}
+
+@ftable @code
+@item FATAL_EXIT_CODE
+A C expression for the status code to be returned when the compiler
+exits after serious errors.  The default is the system-provided macro
+@samp{EXIT_FAILURE}, or @samp{1} if the system doesn't define that
+macro.  Define this macro only if these defaults are incorrect.
+
+@item SUCCESS_EXIT_CODE
+A C expression for the status code to be returned when the compiler
+exits without serious errors.  (Warnings are not serious errors.)  The
+default is the system-provided macro @samp{EXIT_SUCCESS}, or @samp{0} if
+the system doesn't define that macro.  Define this macro only if these
+defaults are incorrect.
+
+@item USE_C_ALLOCA
+Define this macro if GCC should use the C implementation of @code{alloca}
+provided by @file{libiberty.a}.  This only affects how some parts of the
+compiler itself allocate memory.  It does not change code generation.
+
+When GCC is built with a compiler other than itself, the C @code{alloca}
+is always used.  This is because most other implementations have serious
+bugs.  You should define this macro only on a system where no
+stack-based @code{alloca} can possibly work.  For instance, if a system
+has a small limit on the size of the stack, GCC's builtin @code{alloca}
+will not work reliably.
+
+@item COLLECT2_HOST_INITIALIZATION
+If defined, a C statement (sans semicolon) that performs host-dependent
+initialization when @code{collect2} is being initialized.
+
+@item GCC_DRIVER_HOST_INITIALIZATION
+If defined, a C statement (sans semicolon) that performs host-dependent
+initialization when a compilation driver is being initialized.
+
+@item HOST_LONG_LONG_FORMAT
+If defined, the string used to indicate an argument of type @code{long
+long} to functions like @code{printf}.  The default value is
+@code{"ll"}. 
+
+@item HOST_LONG_FORMAT
+If defined, the string used to indicate an argument of type @code{long}
+to functions like @code{printf}.  The default value is @code{"l"}. 
+
+@item HOST_PTR_PRINTF
+If defined, the string used to indicate an argument of type @code{void *}
+to functions like @code{printf}.  The default value is @code{"%p"}. 
+@end ftable
+
+In addition, if @command{configure} generates an incorrect definition of
+any of the macros in @file{auto-host.h}, you can override that
+definition in a host configuration header.  If you need to do this,
+first see if it is possible to fix @command{configure}.
diff --git a/gcc/doc/implement-c.texi b/gcc/doc/implement-c.texi
new file mode 100644
index 000000000..4b9afaa69
--- /dev/null
+++ b/gcc/doc/implement-c.texi
@@ -0,0 +1,676 @@
+@c Copyright (C) 2001, 2002, 2003, 2004, 2006, 2008
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node C Implementation
+@chapter C Implementation-defined behavior
+@cindex implementation-defined behavior, C language
+
+A conforming implementation of ISO C is required to document its
+choice of behavior in each of the areas that are designated
+``implementation defined''.  The following lists all such areas,
+along with the section numbers from the ISO/IEC 9899:1990 and ISO/IEC
+9899:1999 standards.  Some areas are only implementation-defined in
+one version of the standard.
+
+Some choices depend on the externally determined ABI for the platform
+(including standard character encodings) which GCC follows; these are
+listed as ``determined by ABI'' below.  @xref{Compatibility, , Binary
+Compatibility}, and @uref{http://gcc.gnu.org/readings.html}.  Some
+choices are documented in the preprocessor manual.
+@xref{Implementation-defined behavior, , Implementation-defined
+behavior, cpp, The C Preprocessor}.  Some choices are made by the
+library and operating system (or other environment when compiling for
+a freestanding environment); refer to their documentation for details.
+
+@menu
+* Translation implementation::
+* Environment implementation::
+* Identifiers implementation::
+* Characters implementation::
+* Integers implementation::
+* Floating point implementation::
+* Arrays and pointers implementation::
+* Hints implementation::
+* Structures unions enumerations and bit-fields implementation::
+* Qualifiers implementation::
+* Declarators implementation::
+* Statements implementation::
+* Preprocessing directives implementation::
+* Library functions implementation::
+* Architecture implementation::
+* Locale-specific behavior implementation::
+@end menu
+
+@node Translation implementation
+@section Translation
+
+@itemize @bullet
+@item
+@cite{How a diagnostic is identified (C90 3.7, C99 3.10, C90 and C99 5.1.1.3).}
+
+Diagnostics consist of all the output sent to stderr by GCC@.
+
+@item
+@cite{Whether each nonempty sequence of white-space characters other than
+new-line is retained or replaced by one space character in translation
+phase 3 (C90 and C99 5.1.1.2).}
+
+@xref{Implementation-defined behavior, , Implementation-defined
+behavior, cpp, The C Preprocessor}.
+
+@end itemize
+
+@node Environment implementation
+@section Environment
+
+The behavior of most of these points are dependent on the implementation
+of the C library, and are not defined by GCC itself.
+
+@itemize @bullet
+@item
+@cite{The mapping between physical source file multibyte characters
+and the source character set in translation phase 1 (C90 and C99 5.1.1.2).}
+
+@xref{Implementation-defined behavior, , Implementation-defined
+behavior, cpp, The C Preprocessor}.
+
+@end itemize
+
+@node Identifiers implementation
+@section Identifiers
+
+@itemize @bullet
+@item
+@cite{Which additional multibyte characters may appear in identifiers
+and their correspondence to universal character names (C99 6.4.2).}
+
+@xref{Implementation-defined behavior, , Implementation-defined
+behavior, cpp, The C Preprocessor}.
+
+@item
+@cite{The number of significant initial characters in an identifier
+(C90 6.1.2, C90 and C99 5.2.4.1, C99 6.4.2).}
+
+For internal names, all characters are significant.  For external names,
+the number of significant characters are defined by the linker; for
+almost all targets, all characters are significant.
+
+@item
+@cite{Whether case distinctions are significant in an identifier with
+external linkage (C90 6.1.2).}
+
+This is a property of the linker.  C99 requires that case distinctions
+are always significant in identifiers with external linkage and
+systems without this property are not supported by GCC@.
+
+@end itemize
+
+@node Characters implementation
+@section Characters
+
+@itemize @bullet
+@item
+@cite{The number of bits in a byte (C90 3.4, C99 3.6).}
+
+Determined by ABI@.
+
+@item
+@cite{The values of the members of the execution character set (C90
+and C99 5.2.1).}
+
+Determined by ABI@.
+
+@item
+@cite{The unique value of the member of the execution character set produced
+for each of the standard alphabetic escape sequences (C90 and C99 5.2.2).}
+
+Determined by ABI@.
+
+@item
+@cite{The value of a @code{char} object into which has been stored any
+character other than a member of the basic execution character set
+(C90 6.1.2.5, C99 6.2.5).}
+
+Determined by ABI@.
+
+@item
+@cite{Which of @code{signed char} or @code{unsigned char} has the same
+range, representation, and behavior as ``plain'' @code{char} (C90
+6.1.2.5, C90 6.2.1.1, C99 6.2.5, C99 6.3.1.1).}
+
+@opindex fsigned-char
+@opindex funsigned-char
+Determined by ABI@.  The options @option{-funsigned-char} and
+@option{-fsigned-char} change the default.  @xref{C Dialect Options, ,
+Options Controlling C Dialect}.
+
+@item
+@cite{The mapping of members of the source character set (in character
+constants and string literals) to members of the execution character
+set (C90 6.1.3.4, C99 6.4.4.4, C90 and C99 5.1.1.2).}
+
+Determined by ABI@.
+
+@item
+@cite{The value of an integer character constant containing more than one
+character or containing a character or escape sequence that does not map
+to a single-byte execution character (C90 6.1.3.4, C99 6.4.4.4).}
+
+@xref{Implementation-defined behavior, , Implementation-defined
+behavior, cpp, The C Preprocessor}.
+
+@item
+@cite{The value of a wide character constant containing more than one
+multibyte character, or containing a multibyte character or escape
+sequence not represented in the extended execution character set (C90
+6.1.3.4, C99 6.4.4.4).}
+
+@xref{Implementation-defined behavior, , Implementation-defined
+behavior, cpp, The C Preprocessor}.
+
+@item
+@cite{The current locale used to convert a wide character constant consisting
+of a single multibyte character that maps to a member of the extended
+execution character set into a corresponding wide character code (C90
+6.1.3.4, C99 6.4.4.4).}
+
+@xref{Implementation-defined behavior, , Implementation-defined
+behavior, cpp, The C Preprocessor}.
+
+@item
+@cite{The current locale used to convert a wide string literal into
+corresponding wide character codes (C90 6.1.4, C99 6.4.5).}
+
+@xref{Implementation-defined behavior, , Implementation-defined
+behavior, cpp, The C Preprocessor}.
+
+@item
+@cite{The value of a string literal containing a multibyte character or escape
+sequence not represented in the execution character set (C90 6.1.4, C99 6.4.5).}
+
+@xref{Implementation-defined behavior, , Implementation-defined
+behavior, cpp, The C Preprocessor}.
+@end itemize
+
+@node Integers implementation
+@section Integers
+
+@itemize @bullet
+@item
+@cite{Any extended integer types that exist in the implementation (C99 6.2.5).}
+
+GCC does not support any extended integer types.
+@c The __mode__ attribute might create types of precisions not
+@c otherwise supported, but the syntax isn't right for use everywhere
+@c the standard type names might be used.  Predefined typedefs should
+@c be used if any extended integer types are to be defined.  The
+@c __int128_t and __uint128_t typedefs are not extended integer types
+@c as they are generally longer than the ABI-specified intmax_t.
+
+@item
+@cite{Whether signed integer types are represented using sign and magnitude,
+two's complement, or one's complement, and whether the extraordinary value
+is a trap representation or an ordinary value (C99 6.2.6.2).}
+
+GCC supports only two's complement integer types, and all bit patterns
+are ordinary values.
+
+@item
+@cite{The rank of any extended integer type relative to another extended
+integer type with the same precision (C99 6.3.1.1).}
+
+GCC does not support any extended integer types.
+@c If it did, there would only be one of each precision and signedness.
+
+@item
+@cite{The result of, or the signal raised by, converting an integer to a
+signed integer type when the value cannot be represented in an object of
+that type (C90 6.2.1.2, C99 6.3.1.3).}
+
+For conversion to a type of width @math{N}, the value is reduced
+modulo @math{2^N} to be within range of the type; no signal is raised.
+
+@item
+@cite{The results of some bitwise operations on signed integers (C90
+6.3, C99 6.5).}
+
+Bitwise operators act on the representation of the value including
+both the sign and value bits, where the sign bit is considered
+immediately above the highest-value value bit.  Signed @samp{>>} acts
+on negative numbers by sign extension.
+
+GCC does not use the latitude given in C99 only to treat certain
+aspects of signed @samp{<<} as undefined, but this is subject to
+change.
+
+@item
+@cite{The sign of the remainder on integer division (C90 6.3.5).}
+
+GCC always follows the C99 requirement that the result of division is
+truncated towards zero.
+
+@end itemize
+
+@node Floating point implementation
+@section Floating point
+
+@itemize @bullet
+@item
+@cite{The accuracy of the floating-point operations and of the library
+functions in @code{<math.h>} and @code{<complex.h>} that return floating-point
+results (C90 and C99 5.2.4.2.2).}
+
+The accuracy is unknown.
+
+@item
+@cite{The rounding behaviors characterized by non-standard values
+of @code{FLT_ROUNDS} @gol
+(C90 and C99 5.2.4.2.2).}
+
+GCC does not use such values.
+
+@item
+@cite{The evaluation methods characterized by non-standard negative
+values of @code{FLT_EVAL_METHOD} (C99 5.2.4.2.2).}
+
+GCC does not use such values.
+
+@item
+@cite{The direction of rounding when an integer is converted to a
+floating-point number that cannot exactly represent the original
+value (C90 6.2.1.3, C99 6.3.1.4).}
+
+C99 Annex F is followed.
+
+@item
+@cite{The direction of rounding when a floating-point number is
+converted to a narrower floating-point number (C90 6.2.1.4, C99
+6.3.1.5).}
+
+C99 Annex F is followed.
+
+@item
+@cite{How the nearest representable value or the larger or smaller
+representable value immediately adjacent to the nearest representable
+value is chosen for certain floating constants (C90 6.1.3.1, C99
+6.4.4.2).}
+
+C99 Annex F is followed.
+
+@item
+@cite{Whether and how floating expressions are contracted when not
+disallowed by the @code{FP_CONTRACT} pragma (C99 6.5).}
+
+Expressions are currently only contracted if
+@option{-funsafe-math-optimizations} or @option{-ffast-math} are used.
+This is subject to change.
+
+@item
+@cite{The default state for the @code{FENV_ACCESS} pragma (C99 7.6.1).}
+
+This pragma is not implemented, but the default is to ``off'' unless
+@option{-frounding-math} is used in which case it is ``on''.
+
+@item
+@cite{Additional floating-point exceptions, rounding modes, environments,
+and classifications, and their macro names (C99 7.6, C99 7.12).}
+
+This is dependent on the implementation of the C library, and is not
+defined by GCC itself.
+
+@item
+@cite{The default state for the @code{FP_CONTRACT} pragma (C99 7.12.2).}
+
+This pragma is not implemented.  Expressions are currently only
+contracted if @option{-funsafe-math-optimizations} or
+@option{-ffast-math} are used.  This is subject to change.
+
+@item
+@cite{Whether the ``inexact'' floating-point exception can be raised
+when the rounded result actually does equal the mathematical result
+in an IEC 60559 conformant implementation (C99 F.9).}
+
+This is dependent on the implementation of the C library, and is not
+defined by GCC itself.
+
+@item
+@cite{Whether the ``underflow'' (and ``inexact'') floating-point
+exception can be raised when a result is tiny but not inexact in an
+IEC 60559 conformant implementation (C99 F.9).}
+
+This is dependent on the implementation of the C library, and is not
+defined by GCC itself.
+
+@end itemize
+
+@node Arrays and pointers implementation
+@section Arrays and pointers
+
+@itemize @bullet
+@item
+@cite{The result of converting a pointer to an integer or
+vice versa (C90 6.3.4, C99 6.3.2.3).}
+
+A cast from pointer to integer discards most-significant bits if the
+pointer representation is larger than the integer type,
+sign-extends@footnote{Future versions of GCC may zero-extend, or use
+a target-defined @code{ptr_extend} pattern.  Do not rely on sign extension.}
+if the pointer representation is smaller than the integer type, otherwise
+the bits are unchanged.
+@c ??? We've always claimed that pointers were unsigned entities.
+@c Shouldn't we therefore be doing zero-extension?  If so, the bug
+@c is in convert_to_integer, where we call type_for_size and request
+@c a signed integral type.  On the other hand, it might be most useful
+@c for the target if we extend according to POINTERS_EXTEND_UNSIGNED.
+
+A cast from integer to pointer discards most-significant bits if the
+pointer representation is smaller than the integer type, extends according
+to the signedness of the integer type if the pointer representation
+is larger than the integer type, otherwise the bits are unchanged.
+
+When casting from pointer to integer and back again, the resulting
+pointer must reference the same object as the original pointer, otherwise
+the behavior is undefined.  That is, one may not use integer arithmetic to
+avoid the undefined behavior of pointer arithmetic as proscribed in
+C99 6.5.6/8.
+
+@item
+@cite{The size of the result of subtracting two pointers to elements
+of the same array (C90 6.3.6, C99 6.5.6).}
+
+The value is as specified in the standard and the type is determined
+by the ABI@.
+
+@end itemize
+
+@node Hints implementation
+@section Hints
+
+@itemize @bullet
+@item
+@cite{The extent to which suggestions made by using the @code{register}
+storage-class specifier are effective (C90 6.5.1, C99 6.7.1).}
+
+The @code{register} specifier affects code generation only in these ways:
+
+@itemize @bullet
+@item
+When used as part of the register variable extension, see
+@ref{Explicit Reg Vars}.
+
+@item
+When @option{-O0} is in use, the compiler allocates distinct stack
+memory for all variables that do not have the @code{register}
+storage-class specifier; if @code{register} is specified, the variable
+may have a shorter lifespan than the code would indicate and may never
+be placed in memory.
+
+@item
+On some rare x86 targets, @code{setjmp} doesn't save the registers in
+all circumstances.  In those cases, GCC doesn't allocate any variables
+in registers unless they are marked @code{register}.
+
+@end itemize
+
+@item
+@cite{The extent to which suggestions made by using the inline function
+specifier are effective (C99 6.7.4).}
+
+GCC will not inline any functions if the @option{-fno-inline} option is
+used or if @option{-O0} is used.  Otherwise, GCC may still be unable to
+inline a function for many reasons; the @option{-Winline} option may be
+used to determine if a function has not been inlined and why not.
+
+@end itemize
+
+@node Structures unions enumerations and bit-fields implementation
+@section Structures, unions, enumerations, and bit-fields
+
+@itemize @bullet
+@item
+@cite{A member of a union object is accessed using a member of a
+different type (C90 6.3.2.3).}
+
+The relevant bytes of the representation of the object are treated as
+an object of the type used for the access.  @xref{Type-punning}.  This
+may be a trap representation.
+
+@item
+@cite{Whether a ``plain'' @code{int} bit-field is treated as a
+@code{signed int} bit-field or as an @code{unsigned int} bit-field
+(C90 6.5.2, C90 6.5.2.1, C99 6.7.2, C99 6.7.2.1).}
+
+@opindex funsigned-bitfields
+By default it is treated as @code{signed int} but this may be changed
+by the @option{-funsigned-bitfields} option.
+
+@item
+@cite{Allowable bit-field types other than @code{_Bool}, @code{signed int},
+and @code{unsigned int} (C99 6.7.2.1).}
+
+No other types are permitted in strictly conforming mode.
+@c Would it be better to restrict the pedwarn for other types to C90
+@c mode and document the other types for C99 mode?
+
+@item
+@cite{Whether a bit-field can straddle a storage-unit boundary (C90
+6.5.2.1, C99 6.7.2.1).}
+
+Determined by ABI@.
+
+@item
+@cite{The order of allocation of bit-fields within a unit (C90
+6.5.2.1, C99 6.7.2.1).}
+
+Determined by ABI@.
+
+@item
+@cite{The alignment of non-bit-field members of structures (C90
+6.5.2.1, C99 6.7.2.1).}
+
+Determined by ABI@.
+
+@item
+@cite{The integer type compatible with each enumerated type (C90
+6.5.2.2, C99 6.7.2.2).}
+
+@opindex fshort-enums
+Normally, the type is @code{unsigned int} if there are no negative
+values in the enumeration, otherwise @code{int}.  If
+@option{-fshort-enums} is specified, then if there are negative values
+it is the first of @code{signed char}, @code{short} and @code{int}
+that can represent all the values, otherwise it is the first of
+@code{unsigned char}, @code{unsigned short} and @code{unsigned int}
+that can represent all the values.
+@c On a few unusual targets with 64-bit int, this doesn't agree with
+@c the code and one of the types accessed via mode attributes (which
+@c are not currently considered extended integer types) may be used.
+@c If these types are made extended integer types, it would still be
+@c the case that -fshort-enums stops the implementation from
+@c conforming to C90 on those targets.
+
+On some targets, @option{-fshort-enums} is the default; this is
+determined by the ABI@.
+
+@end itemize
+
+@node Qualifiers implementation
+@section Qualifiers
+
+@itemize @bullet
+@item
+@cite{What constitutes an access to an object that has volatile-qualified
+type (C90 6.5.3, C99 6.7.3).}
+
+Such an object is normally accessed by pointers and used for accessing
+hardware.  In most expressions, it is intuitively obvious what is a read
+and what is a write.  For example
+
+@smallexample
+volatile int *dst = @var{somevalue};
+volatile int *src = @var{someothervalue};
+*dst = *src;
+@end smallexample
+
+@noindent
+will cause a read of the volatile object pointed to by @var{src} and store the
+value into the volatile object pointed to by @var{dst}.  There is no
+guarantee that these reads and writes are atomic, especially for objects
+larger than @code{int}.
+
+However, if the volatile storage is not being modified, and the value of
+the volatile storage is not used, then the situation is less obvious.
+For example
+
+@smallexample
+volatile int *src = @var{somevalue};
+*src;
+@end smallexample
+
+According to the C standard, such an expression is an rvalue whose type
+is the unqualified version of its original type, i.e. @code{int}.  Whether
+GCC interprets this as a read of the volatile object being pointed to or
+only as a request to evaluate the expression for its side-effects depends
+on this type.
+
+If it is a scalar type, or on most targets an aggregate type whose only
+member object is of a scalar type, or a union type whose member objects
+are of scalar types, the expression is interpreted by GCC as a read of
+the volatile object; in the other cases, the expression is only evaluated
+for its side-effects.
+
+@end itemize
+
+@node Declarators implementation
+@section Declarators
+
+@itemize @bullet
+@item
+@cite{The maximum number of declarators that may modify an arithmetic,
+structure or union type (C90 6.5.4).}
+
+GCC is only limited by available memory.
+
+@end itemize
+
+@node Statements implementation
+@section Statements
+
+@itemize @bullet
+@item
+@cite{The maximum number of @code{case} values in a @code{switch}
+statement (C90 6.6.4.2).}
+
+GCC is only limited by available memory.
+
+@end itemize
+
+@node Preprocessing directives implementation
+@section Preprocessing directives
+
+@xref{Implementation-defined behavior, , Implementation-defined
+behavior, cpp, The C Preprocessor}, for details of these aspects of
+implementation-defined behavior.
+
+@itemize @bullet
+@item
+@cite{How sequences in both forms of header names are mapped to headers
+or external source file names (C90 6.1.7, C99 6.4.7).}
+
+@item
+@cite{Whether the value of a character constant in a constant expression
+that controls conditional inclusion matches the value of the same character
+constant in the execution character set (C90 6.8.1, C99 6.10.1).}
+
+@item
+@cite{Whether the value of a single-character character constant in a
+constant expression that controls conditional inclusion may have a
+negative value (C90 6.8.1, C99 6.10.1).}
+
+@item
+@cite{The places that are searched for an included @samp{<>} delimited
+header, and how the places are specified or the header is
+identified (C90 6.8.2, C99 6.10.2).}
+
+@item
+@cite{How the named source file is searched for in an included @samp{""}
+delimited header (C90 6.8.2, C99 6.10.2).}
+
+@item
+@cite{The method by which preprocessing tokens (possibly resulting from
+macro expansion) in a @code{#include} directive are combined into a header
+name (C90 6.8.2, C99 6.10.2).}
+
+@item
+@cite{The nesting limit for @code{#include} processing (C90 6.8.2, C99
+6.10.2).}
+
+@item
+@cite{Whether the @samp{#} operator inserts a @samp{\} character before
+the @samp{\} character that begins a universal character name in a
+character constant or string literal (C99 6.10.3.2).}
+
+@item
+@cite{The behavior on each recognized non-@code{STDC #pragma}
+directive (C90 6.8.6, C99 6.10.6).}
+
+@xref{Pragmas, , Pragmas, cpp, The C Preprocessor}, for details of
+pragmas accepted by GCC on all targets.  @xref{Pragmas, , Pragmas
+Accepted by GCC}, for details of target-specific pragmas.
+
+@item
+@cite{The definitions for @code{__DATE__} and @code{__TIME__} when
+respectively, the date and time of translation are not available (C90
+6.8.8, C99 6.10.8).}
+
+@end itemize
+
+@node Library functions implementation
+@section Library functions
+
+The behavior of most of these points are dependent on the implementation
+of the C library, and are not defined by GCC itself.
+
+@itemize @bullet
+@item
+@cite{The null pointer constant to which the macro @code{NULL} expands
+(C90 7.1.6, C99 7.17).}
+
+In @code{<stddef.h>}, @code{NULL} expands to @code{((void *)0)}.  GCC
+does not provide the other headers which define @code{NULL} and some
+library implementations may use other definitions in those headers.
+
+@end itemize
+
+@node Architecture implementation
+@section Architecture
+
+@itemize @bullet
+@item
+@cite{The values or expressions assigned to the macros specified in the
+headers @code{<float.h>}, @code{<limits.h>}, and @code{<stdint.h>}
+(C90 and C99 5.2.4.2, C99 7.18.2, C99 7.18.3).}
+
+Determined by ABI@.
+
+@item
+@cite{The number, order, and encoding of bytes in any object
+(when not explicitly specified in this International Standard) (C99 6.2.6.1).}
+
+Determined by ABI@.
+
+@item
+@cite{The value of the result of the @code{sizeof} operator (C90
+6.3.3.4, C99 6.5.3.4).}
+
+Determined by ABI@.
+
+@end itemize
+
+@node Locale-specific behavior implementation
+@section Locale-specific behavior
+
+The behavior of these points are dependent on the implementation
+of the C library, and are not defined by GCC itself.
diff --git a/gcc/doc/implement-cxx.texi b/gcc/doc/implement-cxx.texi
new file mode 100644
index 000000000..ac9a393da
--- /dev/null
+++ b/gcc/doc/implement-cxx.texi
@@ -0,0 +1,61 @@
+@c Copyright (C) 2009, 2010
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node C++ Implementation
+@chapter C++ Implementation-defined behavior
+@cindex implementation-defined behavior, C++ language
+
+A conforming implementation of ISO C++ is required to document its
+choice of behavior in each of the areas that are designated
+``implementation defined''.  The following lists all such areas,
+along with the section numbers from the ISO/IEC 14822:1998 and ISO/IEC
+14822:2003 standards.  Some areas are only implementation-defined in
+one version of the standard.
+
+Some choices depend on the externally determined ABI for the platform
+(including standard character encodings) which GCC follows; these are
+listed as ``determined by ABI'' below.  @xref{Compatibility, , Binary
+Compatibility}, and @uref{http://gcc.gnu.org/readings.html}.  Some
+choices are documented in the preprocessor manual.
+@xref{Implementation-defined behavior, , Implementation-defined
+behavior, cpp, The C Preprocessor}.  Some choices are documented in
+the corresponding document for the C language.  @xref{C
+Implementation}.  Some choices are made by the library and operating
+system (or other environment when compiling for a freestanding
+environment); refer to their documentation for details.
+
+@menu
+* Conditionally-supported behavior::
+* Exception handling::
+@end menu
+
+@node Conditionally-supported behavior
+@section Conditionally-supported behavior
+
+@cite{Each implementation shall include documentation that identifies
+all conditionally-supported constructs that it does not support (C++0x
+1.4).}
+
+@itemize @bullet
+@item
+@cite{Whether an argument of class type with a non-trivial copy
+constructor or destructor can be passed to ... (C++0x 5.2.2).}
+
+Such argument passing is not supported.
+
+@end itemize
+
+@node Exception handling
+@section Exception handling
+
+@itemize @bullet
+@item
+@cite{In the situation where no matching handler is found, it is
+implementation-defined whether or not the stack is unwound before
+std::terminate() is called (C++98 15.5.1).}
+
+The stack is not unwound before std::terminate is called.
+
+@end itemize
diff --git a/gcc/doc/include/fdl.texi b/gcc/doc/include/fdl.texi
new file mode 100644
index 000000000..8f3d7be2e
--- /dev/null
+++ b/gcc/doc/include/fdl.texi
@@ -0,0 +1,540 @@
+@ignore
+@c Set file name and title for man page.
+@setfilename gfdl
+@settitle GNU Free Documentation License
+@c man begin SEEALSO
+gpl(7), fsf-funding(7).
+@c man end
+@c man begin COPYRIGHT
+Copyright @copyright{} 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
+@uref{http://fsf.org/}
+
+Everyone is permitted to copy and distribute verbatim copies
+of this license document, but changing it is not allowed.
+@c This file is intended to be included within another document,
+@c hence no sectioning command or @node.
+@c man end
+@end ignore
+@c Special handling for inclusion in the install manual.
+@ifset gfdlhtml
+@ifnothtml
+@comment node-name,     next,          previous, up
+@node    GNU Free Documentation License, Concept Index, Old, Top
+@end ifnothtml
+@html
+<h1 align="center">Installing GCC: GNU Free Documentation License</h1>
+@end html
+@ifnothtml
+@unnumbered GNU Free Documentation License
+@end ifnothtml
+@end ifset
+@c man begin DESCRIPTION
+@ifclear gfdlhtml
+@node GNU Free Documentation License
+@unnumbered GNU Free Documentation License
+@end ifclear
+
+@cindex FDL, GNU Free Documentation License
+@center Version 1.3, 3 November 2008
+
+@display
+Copyright @copyright{} 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
+@uref{http://fsf.org/}
+
+Everyone is permitted to copy and distribute verbatim copies
+of this license document, but changing it is not allowed.
+@end display
+
+@enumerate 0
+@item
+PREAMBLE
+
+The purpose of this License is to make a manual, textbook, or other
+functional and useful document @dfn{free} in the sense of freedom: to
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+Secondarily, this License preserves for the author and publisher a way
+to get credit for their work, while not being considered responsible
+for modifications made by others.
+
+This License is a kind of ``copyleft'', which means that derivative
+works of the document must themselves be free in the same sense.  It
+complements the GNU General Public License, which is a copyleft
+license designed for free software.
+
+We have designed this License in order to use it for manuals for free
+software, because free software needs free documentation: a free
+program should come with manuals providing the same freedoms that the
+software does.  But this License is not limited to software manuals;
+it can be used for any textual work, regardless of subject matter or
+whether it is published as a printed book.  We recommend this License
+principally for works whose purpose is instruction or reference.
+
+@item
+APPLICABILITY AND DEFINITIONS
+
+This License applies to any manual or other work, in any medium, that
+contains a notice placed by the copyright holder saying it can be
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+A ``Modified Version'' of the Document means any work containing the
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+
+The Document may include Warranty Disclaimers next to the notice which
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+no effect on the meaning of this License.
+
+@item
+VERBATIM COPYING
+
+You may copy and distribute the Document in any medium, either
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+
+You may also lend copies, under the same conditions stated above, and
+you may publicly display copies.
+
+@item
+COPYING IN QUANTITY
+
+If you publish printed copies (or copies in media that commonly have
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+
+If the required texts for either cover are too voluminous to fit
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+
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+
+@item
+MODIFICATIONS
+
+You may copy and distribute a Modified Version of the Document under
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+@enumerate A
+@item
+Use in the Title Page (and on the covers, if any) a title distinct
+from that of the Document, and from those of previous versions
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+
+@item
+List on the Title Page, as authors, one or more persons or entities
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+Document (all of its principal authors, if it has fewer than five),
+unless they release you from this requirement.
+
+@item
+State on the Title page the name of the publisher of the
+Modified Version, as the publisher.
+
+@item
+Preserve all the copyright notices of the Document.
+
+@item
+Add an appropriate copyright notice for your modifications
+adjacent to the other copyright notices.
+
+@item
+Include, immediately after the copyright notices, a license notice
+giving the public permission to use the Modified Version under the
+terms of this License, in the form shown in the Addendum below.
+
+@item
+Preserve in that license notice the full lists of Invariant Sections
+and required Cover Texts given in the Document's license notice.
+
+@item
+Include an unaltered copy of this License.
+
+@item
+Preserve the section Entitled ``History'', Preserve its Title, and add
+to it an item stating at least the title, year, new authors, and
+publisher of the Modified Version as given on the Title Page.  If
+there is no section Entitled ``History'' in the Document, create one
+stating the title, year, authors, and publisher of the Document as
+given on its Title Page, then add an item describing the Modified
+Version as stated in the previous sentence.
+
+@item
+Preserve the network location, if any, given in the Document for
+public access to a Transparent copy of the Document, and likewise
+the network locations given in the Document for previous versions
+it was based on.  These may be placed in the ``History'' section.
+You may omit a network location for a work that was published at
+least four years before the Document itself, or if the original
+publisher of the version it refers to gives permission.
+
+@item
+For any section Entitled ``Acknowledgements'' or ``Dedications'', Preserve
+the Title of the section, and preserve in the section all the
+substance and tone of each of the contributor acknowledgements and/or
+dedications given therein.
+
+@item
+Preserve all the Invariant Sections of the Document,
+unaltered in their text and in their titles.  Section numbers
+or the equivalent are not considered part of the section titles.
+
+@item
+Delete any section Entitled ``Endorsements''.  Such a section
+may not be included in the Modified Version.
+
+@item
+Do not retitle any existing section to be Entitled ``Endorsements'' or
+to conflict in title with any Invariant Section.
+
+@item
+Preserve any Warranty Disclaimers.
+@end enumerate
+
+If the Modified Version includes new front-matter sections or
+appendices that qualify as Secondary Sections and contain no material
+copied from the Document, you may at your option designate some or all
+of these sections as invariant.  To do this, add their titles to the
+list of Invariant Sections in the Modified Version's license notice.
+These titles must be distinct from any other section titles.
+
+You may add a section Entitled ``Endorsements'', provided it contains
+nothing but endorsements of your Modified Version by various
+parties---for example, statements of peer review or that the text has
+been approved by an organization as the authoritative definition of a
+standard.
+
+You may add a passage of up to five words as a Front-Cover Text, and a
+passage of up to 25 words as a Back-Cover Text, to the end of the list
+of Cover Texts in the Modified Version.  Only one passage of
+Front-Cover Text and one of Back-Cover Text may be added by (or
+through arrangements made by) any one entity.  If the Document already
+includes a cover text for the same cover, previously added by you or
+by arrangement made by the same entity you are acting on behalf of,
+you may not add another; but you may replace the old one, on explicit
+permission from the previous publisher that added the old one.
+
+The author(s) and publisher(s) of the Document do not by this License
+give permission to use their names for publicity for or to assert or
+imply endorsement of any Modified Version.
+
+@item
+COMBINING DOCUMENTS
+
+You may combine the Document with other documents released under this
+License, under the terms defined in section 4 above for modified
+versions, provided that you include in the combination all of the
+Invariant Sections of all of the original documents, unmodified, and
+list them all as Invariant Sections of your combined work in its
+license notice, and that you preserve all their Warranty Disclaimers.
+
+The combined work need only contain one copy of this License, and
+multiple identical Invariant Sections may be replaced with a single
+copy.  If there are multiple Invariant Sections with the same name but
+different contents, make the title of each such section unique by
+adding at the end of it, in parentheses, the name of the original
+author or publisher of that section if known, or else a unique number.
+Make the same adjustment to the section titles in the list of
+Invariant Sections in the license notice of the combined work.
+
+In the combination, you must combine any sections Entitled ``History''
+in the various original documents, forming one section Entitled
+``History''; likewise combine any sections Entitled ``Acknowledgements'',
+and any sections Entitled ``Dedications''.  You must delete all
+sections Entitled ``Endorsements.''
+
+@item
+COLLECTIONS OF DOCUMENTS
+
+You may make a collection consisting of the Document and other documents
+released under this License, and replace the individual copies of this
+License in the various documents with a single copy that is included in
+the collection, provided that you follow the rules of this License for
+verbatim copying of each of the documents in all other respects.
+
+You may extract a single document from such a collection, and distribute
+it individually under this License, provided you insert a copy of this
+License into the extracted document, and follow this License in all
+other respects regarding verbatim copying of that document.
+
+@item
+AGGREGATION WITH INDEPENDENT WORKS
+
+A compilation of the Document or its derivatives with other separate
+and independent documents or works, in or on a volume of a storage or
+distribution medium, is called an ``aggregate'' if the copyright
+resulting from the compilation is not used to limit the legal rights
+of the compilation's users beyond what the individual works permit.
+When the Document is included in an aggregate, this License does not
+apply to the other works in the aggregate which are not themselves
+derivative works of the Document.
+
+If the Cover Text requirement of section 3 is applicable to these
+copies of the Document, then if the Document is less than one half of
+the entire aggregate, the Document's Cover Texts may be placed on
+covers that bracket the Document within the aggregate, or the
+electronic equivalent of covers if the Document is in electronic form.
+Otherwise they must appear on printed covers that bracket the whole
+aggregate.
+
+@item
+TRANSLATION
+
+Translation is considered a kind of modification, so you may
+distribute translations of the Document under the terms of section 4.
+Replacing Invariant Sections with translations requires special
+permission from their copyright holders, but you may include
+translations of some or all Invariant Sections in addition to the
+original versions of these Invariant Sections.  You may include a
+translation of this License, and all the license notices in the
+Document, and any Warranty Disclaimers, provided that you also include
+the original English version of this License and the original versions
+of those notices and disclaimers.  In case of a disagreement between
+the translation and the original version of this License or a notice
+or disclaimer, the original version will prevail.
+
+If a section in the Document is Entitled ``Acknowledgements'',
+``Dedications'', or ``History'', the requirement (section 4) to Preserve
+its Title (section 1) will typically require changing the actual
+title.
+
+@item
+TERMINATION
+
+You may not copy, modify, sublicense, or distribute the Document
+except as expressly provided under this License.  Any attempt
+otherwise to copy, modify, sublicense, or distribute it is void, and
+will automatically terminate your rights under this License.
+
+However, if you cease all violation of this License, then your license
+from a particular copyright holder is reinstated (a) provisionally,
+unless and until the copyright holder explicitly and finally
+terminates your license, and (b) permanently, if the copyright holder
+fails to notify you of the violation by some reasonable means prior to
+60 days after the cessation.
+
+Moreover, your license from a particular copyright holder is
+reinstated permanently if the copyright holder notifies you of the
+violation by some reasonable means, this is the first time you have
+received notice of violation of this License (for any work) from that
+copyright holder, and you cure the violation prior to 30 days after
+your receipt of the notice.
+
+Termination of your rights under this section does not terminate the
+licenses of parties who have received copies or rights from you under
+this License.  If your rights have been terminated and not permanently
+reinstated, receipt of a copy of some or all of the same material does
+not give you any rights to use it.
+
+@item
+FUTURE REVISIONS OF THIS LICENSE
+
+The Free Software Foundation may publish new, revised versions
+of the GNU Free Documentation License from time to time.  Such new
+versions will be similar in spirit to the present version, but may
+differ in detail to address new problems or concerns.  See
+@uref{http://www.gnu.org/copyleft/}.
+
+Each version of the License is given a distinguishing version number.
+If the Document specifies that a particular numbered version of this
+License ``or any later version'' applies to it, you have the option of
+following the terms and conditions either of that specified version or
+of any later version that has been published (not as a draft) by the
+Free Software Foundation.  If the Document does not specify a version
+number of this License, you may choose any version ever published (not
+as a draft) by the Free Software Foundation.  If the Document
+specifies that a proxy can decide which future versions of this
+License can be used, that proxy's public statement of acceptance of a
+version permanently authorizes you to choose that version for the
+Document.
+
+@item
+RELICENSING
+
+``Massive Multiauthor Collaboration Site'' (or ``MMC Site'') means any
+World Wide Web server that publishes copyrightable works and also
+provides prominent facilities for anybody to edit those works.  A
+public wiki that anybody can edit is an example of such a server.  A
+``Massive Multiauthor Collaboration'' (or ``MMC'') contained in the
+site means any set of copyrightable works thus published on the MMC
+site.
+
+``CC-BY-SA'' means the Creative Commons Attribution-Share Alike 3.0
+license published by Creative Commons Corporation, a not-for-profit
+corporation with a principal place of business in San Francisco,
+California, as well as future copyleft versions of that license
+published by that same organization.
+
+``Incorporate'' means to publish or republish a Document, in whole or
+in part, as part of another Document.
+
+An MMC is ``eligible for relicensing'' if it is licensed under this
+License, and if all works that were first published under this License
+somewhere other than this MMC, and subsequently incorporated in whole
+or in part into the MMC, (1) had no cover texts or invariant sections,
+and (2) were thus incorporated prior to November 1, 2008.
+
+The operator of an MMC Site may republish an MMC contained in the site
+under CC-BY-SA on the same site at any time before August 1, 2009,
+provided the MMC is eligible for relicensing.
+
+@end enumerate
+
+@page
+@unnumberedsec ADDENDUM: How to use this License for your documents
+
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and
+license notices just after the title page:
+
+@smallexample
+@group
+  Copyright (C)  @var{year}  @var{your name}.
+  Permission is granted to copy, distribute and/or modify this document
+  under the terms of the GNU Free Documentation License, Version 1.3
+  or any later version published by the Free Software Foundation;
+  with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
+  Texts.  A copy of the license is included in the section entitled ``GNU
+  Free Documentation License''.
+@end group
+@end smallexample
+
+If you have Invariant Sections, Front-Cover Texts and Back-Cover Texts,
+replace the ``with...Texts.'' line with this:
+
+@smallexample
+@group
+    with the Invariant Sections being @var{list their titles}, with
+    the Front-Cover Texts being @var{list}, and with the Back-Cover Texts
+    being @var{list}.
+@end group
+@end smallexample
+
+If you have Invariant Sections without Cover Texts, or some other
+combination of the three, merge those two alternatives to suit the
+situation.
+
+If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
+free software license, such as the GNU General Public License,
+to permit their use in free software.
+
+@c Local Variables:
+@c ispell-local-pdict: "ispell-dict"
+@c End:
+
+@c man end
diff --git a/gcc/doc/include/funding.texi b/gcc/doc/include/funding.texi
new file mode 100644
index 000000000..d1583fabc
--- /dev/null
+++ b/gcc/doc/include/funding.texi
@@ -0,0 +1,60 @@
+@ignore
+@c Set file name and title for man page.
+@setfilename fsf-funding
+@settitle Funding Free Software
+@c man begin SEEALSO
+gpl(7), gfdl(7).
+@c man end
+@end ignore
+@node Funding
+@c man begin DESCRIPTION
+@unnumbered Funding Free Software
+
+If you want to have more free software a few years from now, it makes
+sense for you to help encourage people to contribute funds for its
+development.  The most effective approach known is to encourage
+commercial redistributors to donate.
+
+Users of free software systems can boost the pace of development by
+encouraging for-a-fee distributors to donate part of their selling price
+to free software developers---the Free Software Foundation, and others.
+
+The way to convince distributors to do this is to demand it and expect
+it from them.  So when you compare distributors, judge them partly by
+how much they give to free software development.  Show distributors
+they must compete to be the one who gives the most.
+
+To make this approach work, you must insist on numbers that you can
+compare, such as, ``We will donate ten dollars to the Frobnitz project
+for each disk sold.''  Don't be satisfied with a vague promise, such as
+``A portion of the profits are donated,'' since it doesn't give a basis
+for comparison.
+
+Even a precise fraction ``of the profits from this disk'' is not very
+meaningful, since creative accounting and unrelated business decisions
+can greatly alter what fraction of the sales price counts as profit.
+If the price you pay is $50, ten percent of the profit is probably
+less than a dollar; it might be a few cents, or nothing at all.
+
+Some redistributors do development work themselves.  This is useful too;
+but to keep everyone honest, you need to inquire how much they do, and
+what kind.  Some kinds of development make much more long-term
+difference than others.  For example, maintaining a separate version of
+a program contributes very little; maintaining the standard version of a
+program for the whole community contributes much.  Easy new ports
+contribute little, since someone else would surely do them; difficult
+ports such as adding a new CPU to the GNU Compiler Collection contribute more;
+major new features or packages contribute the most.
+
+By establishing the idea that supporting further development is ``the
+proper thing to do'' when distributing free software for a fee, we can
+assure a steady flow of resources into making more free software.
+@c man end
+
+@display
+@c man begin COPYRIGHT
+Copyright @copyright{} 1994 Free Software Foundation, Inc.
+Verbatim copying and redistribution of this section is permitted
+without royalty; alteration is not permitted.
+@c man end
+@end display
diff --git a/gcc/doc/include/gcc-common.texi b/gcc/doc/include/gcc-common.texi
new file mode 100644
index 000000000..f06eb1f59
--- /dev/null
+++ b/gcc/doc/include/gcc-common.texi
@@ -0,0 +1,74 @@
+@c Copyright (C) 2001, 2002, 2003, 2004, 2005,
+@c 2007 Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@c Version number and development mode.
+@c version-GCC is @set to the base GCC version number.
+@c DEVELOPMENT is @set for an in-development version, @clear for a
+@c release version (corresponding to ``experimental''/anything else
+@c in gcc/DEV-PHASE).
+
+@include gcc-vers.texi
+
+@c Common macros to support generating man pages:
+
+@macro gcctabopt{body}
+@code{\body\}
+@end macro
+@macro gccoptlist{body}
+@smallexample
+\body\
+@end smallexample
+@end macro
+@c Makeinfo handles the above macro OK, TeX needs manual line breaks;
+@c they get lost at some point in handling the macro.  But if @macro is
+@c used here rather than @alias, it produces double line breaks.
+@iftex
+@alias gol = *
+@end iftex
+@ifnottex
+@macro gol
+@end macro
+@end ifnottex
+
+@c For FSF printing, define FSFPRINT.  Also update the ISBN and last
+@c printing date for the manual being printed.
+@c @set FSFPRINT
+@ifset FSFPRINT
+@smallbook
+@finalout
+@c Cause even numbered pages to be printed on the left hand side of
+@c the page and odd numbered pages to be printed on the right hand
+@c side of the page.  Using this, you can print on both sides of a
+@c sheet of paper and have the text on the same part of the sheet.
+
+@c The text on right hand pages is pushed towards the right hand
+@c margin and the text on left hand pages is pushed toward the left
+@c hand margin.
+@c (To provide the reverse effect, set bindingoffset to -0.75in.)
+@tex
+\global\bindingoffset=0.75in
+\global\normaloffset =0.75in
+@end tex
+@end ifset
+
+@c Macro to generate a "For the N.N.N version" subtitle on the title
+@c page of TeX documentation.  This macro should be used in the
+@c titlepage environment after the title and any other subtitles have
+@c been placed, and before any authors are placed.
+@macro versionsubtitle
+@ifclear DEVELOPMENT
+@subtitle For @sc{gcc} version @value{version-GCC}
+@end ifclear
+@ifset DEVELOPMENT
+@subtitle For @sc{gcc} version @value{version-GCC} (pre-release)
+@end ifset
+@ifset VERSION_PACKAGE
+@sp 1
+@subtitle @value{VERSION_PACKAGE}
+@end ifset
+@c Even if there are no authors, the second titlepage line should be
+@c forced to the bottom of the page.
+@vskip 0pt plus 1filll
+@end macro
diff --git a/gcc/doc/include/gpl.texi b/gcc/doc/include/gpl.texi
new file mode 100644
index 000000000..bcb553587
--- /dev/null
+++ b/gcc/doc/include/gpl.texi
@@ -0,0 +1,410 @@
+@ignore
+@c Set file name and title for man page.
+@setfilename gpl
+@settitle GNU General Public License
+@c man begin SEEALSO
+gfdl(7), fsf-funding(7).
+@c man end
+@c man begin COPYRIGHT
+Copyright @copyright{} 1989, 1991 Free Software Foundation, Inc.
+51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA
+
+Everyone is permitted to copy and distribute verbatim copies
+of this license document, but changing it is not allowed.
+@c man end
+@end ignore
+@node Copying
+@c man begin DESCRIPTION
+@unnumbered GNU GENERAL PUBLIC LICENSE
+@center Version 2, June 1991
+
+@c This file is intended to be included in another file.
+
+@display
+Copyright @copyright{} 1989, 1991 Free Software Foundation, Inc.
+51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA
+
+Everyone is permitted to copy and distribute verbatim copies
+of this license document, but changing it is not allowed.
+@end display
+
+@unnumberedsec Preamble
+
+  The licenses for most software are designed to take away your
+freedom to share and change it.  By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software---to make sure the software is free for all its users.  This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
+using it.  (Some other Free Software Foundation software is covered by
+the GNU Library General Public License instead.)  You can apply it to
+your programs, too.
+
+  When we speak of free software, we are referring to freedom, not
+price.  Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+this service if you wish), that you receive source code or can get it
+if you want it, that you can change the software or use pieces of it
+in new free programs; and that you know you can do these things.
+
+  To protect your rights, we need to make restrictions that forbid
+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+
+  For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must give the recipients all the rights that
+you have.  You must make sure that they, too, receive or can get the
+source code.  And you must show them these terms so they know their
+rights.
+
+  We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
+distribute and/or modify the software.
+
+  Also, for each author's protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
+software.  If the software is modified by someone else and passed on, we
+want its recipients to know that what they have is not the original, so
+that any problems introduced by others will not reflect on the original
+authors' reputations.
+
+  Finally, any free program is threatened constantly by software
+patents.  We wish to avoid the danger that redistributors of a free
+program will individually obtain patent licenses, in effect making the
+program proprietary.  To prevent this, we have made it clear that any
+patent must be licensed for everyone's free use or not licensed at all.
+
+  The precise terms and conditions for copying, distribution and
+modification follow.
+
+@iftex
+@unnumberedsec TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+@end iftex
+@ifnottex
+@center TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+@end ifnottex
+
+@enumerate 0
+@item
+This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License.  The ``Program'', below,
+refers to any such program or work, and a ``work based on the Program''
+means either the Program or any derivative work under copyright law:
+that is to say, a work containing the Program or a portion of it,
+either verbatim or with modifications and/or translated into another
+language.  (Hereinafter, translation is included without limitation in
+the term ``modification''.)  Each licensee is addressed as ``you''.
+
+Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope.  The act of
+running the Program is not restricted, and the output from the Program
+is covered only if its contents constitute a work based on the
+Program (independent of having been made by running the Program).
+Whether that is true depends on what the Program does.
+
+@item
+You may copy and distribute verbatim copies of the Program's
+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
+copyright notice and disclaimer of warranty; keep intact all the
+notices that refer to this License and to the absence of any warranty;
+and give any other recipients of the Program a copy of this License
+along with the Program.
+
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+
+@item
+You may modify your copy or copies of the Program or any portion
+of it, thus forming a work based on the Program, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+
+@enumerate a
+@item
+You must cause the modified files to carry prominent notices
+stating that you changed the files and the date of any change.
+
+@item
+You must cause any work that you distribute or publish, that in
+whole or in part contains or is derived from the Program or any
+part thereof, to be licensed as a whole at no charge to all third
+parties under the terms of this License.
+
+@item
+If the modified program normally reads commands interactively
+when run, you must cause it, when started running for such
+interactive use in the most ordinary way, to print or display an
+announcement including an appropriate copyright notice and a
+notice that there is no warranty (or else, saying that you provide
+a warranty) and that users may redistribute the program under
+these conditions, and telling the user how to view a copy of this
+License.  (Exception: if the Program itself is interactive but
+does not normally print such an announcement, your work based on
+the Program is not required to print an announcement.)
+@end enumerate
+
+These requirements apply to the modified work as a whole.  If
+identifiable sections of that work are not derived from the Program,
+and can be reasonably considered independent and separate works in
+themselves, then this License, and its terms, do not apply to those
+sections when you distribute them as separate works.  But when you
+distribute the same sections as part of a whole which is a work based
+on the Program, the distribution of the whole must be on the terms of
+this License, whose permissions for other licensees extend to the
+entire whole, and thus to each and every part regardless of who wrote it.
+
+Thus, it is not the intent of this section to claim rights or contest
+your rights to work written entirely by you; rather, the intent is to
+exercise the right to control the distribution of derivative or
+collective works based on the Program.
+
+In addition, mere aggregation of another work not based on the Program
+with the Program (or with a work based on the Program) on a volume of
+a storage or distribution medium does not bring the other work under
+the scope of this License.
+
+@item
+You may copy and distribute the Program (or a work based on it,
+under Section 2) in object code or executable form under the terms of
+Sections 1 and 2 above provided that you also do one of the following:
+
+@enumerate a
+@item
+Accompany it with the complete corresponding machine-readable
+source code, which must be distributed under the terms of Sections
+1 and 2 above on a medium customarily used for software interchange; or,
+
+@item
+Accompany it with a written offer, valid for at least three
+years, to give any third party, for a charge no more than your
+cost of physically performing source distribution, a complete
+machine-readable copy of the corresponding source code, to be
+distributed under the terms of Sections 1 and 2 above on a medium
+customarily used for software interchange; or,
+
+@item
+Accompany it with the information you received as to the offer
+to distribute corresponding source code.  (This alternative is
+allowed only for noncommercial distribution and only if you
+received the program in object code or executable form with such
+an offer, in accord with Subsection b above.)
+@end enumerate
+
+The source code for a work means the preferred form of the work for
+making modifications to it.  For an executable work, complete source
+code means all the source code for all modules it contains, plus any
+associated interface definition files, plus the scripts used to
+control compilation and installation of the executable.  However, as a
+special exception, the source code distributed need not include
+anything that is normally distributed (in either source or binary
+form) with the major components (compiler, kernel, and so on) of the
+operating system on which the executable runs, unless that component
+itself accompanies the executable.
+
+If distribution of executable or object code is made by offering
+access to copy from a designated place, then offering equivalent
+access to copy the source code from the same place counts as
+distribution of the source code, even though third parties are not
+compelled to copy the source along with the object code.
+
+@item
+You may not copy, modify, sublicense, or distribute the Program
+except as expressly provided under this License.  Any attempt
+otherwise to copy, modify, sublicense or distribute the Program is
+void, and will automatically terminate your rights under this License.
+However, parties who have received copies, or rights, from you under
+this License will not have their licenses terminated so long as such
+parties remain in full compliance.
+
+@item
+You are not required to accept this License, since you have not
+signed it.  However, nothing else grants you permission to modify or
+distribute the Program or its derivative works.  These actions are
+prohibited by law if you do not accept this License.  Therefore, by
+modifying or distributing the Program (or any work based on the
+Program), you indicate your acceptance of this License to do so, and
+all its terms and conditions for copying, distributing or modifying
+the Program or works based on it.
+
+@item
+Each time you redistribute the Program (or any work based on the
+Program), the recipient automatically receives a license from the
+original licensor to copy, distribute or modify the Program subject to
+these terms and conditions.  You may not impose any further
+restrictions on the recipients' exercise of the rights granted herein.
+You are not responsible for enforcing compliance by third parties to
+this License.
+
+@item
+If, as a consequence of a court judgment or allegation of patent
+infringement or for any other reason (not limited to patent issues),
+conditions are imposed on you (whether by court order, agreement or
+otherwise) that contradict the conditions of this License, they do not
+excuse you from the conditions of this License.  If you cannot
+distribute so as to satisfy simultaneously your obligations under this
+License and any other pertinent obligations, then as a consequence you
+may not distribute the Program at all.  For example, if a patent
+license would not permit royalty-free redistribution of the Program by
+all those who receive copies directly or indirectly through you, then
+the only way you could satisfy both it and this License would be to
+refrain entirely from distribution of the Program.
+
+If any portion of this section is held invalid or unenforceable under
+any particular circumstance, the balance of the section is intended to
+apply and the section as a whole is intended to apply in other
+circumstances.
+
+It is not the purpose of this section to induce you to infringe any
+patents or other property right claims or to contest validity of any
+such claims; this section has the sole purpose of protecting the
+integrity of the free software distribution system, which is
+implemented by public license practices.  Many people have made
+generous contributions to the wide range of software distributed
+through that system in reliance on consistent application of that
+system; it is up to the author/donor to decide if he or she is willing
+to distribute software through any other system and a licensee cannot
+impose that choice.
+
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+
+@item
+If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
+original copyright holder who places the Program under this License
+may add an explicit geographical distribution limitation excluding
+those countries, so that distribution is permitted only in or among
+countries not thus excluded.  In such case, this License incorporates
+the limitation as if written in the body of this License.
+
+@item
+The Free Software Foundation may publish revised and/or new versions
+of the General Public License from time to time.  Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+
+Each version is given a distinguishing version number.  If the Program
+specifies a version number of this License which applies to it and ``any
+later version'', you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation.  If the Program does not specify a version number of
+this License, you may choose any version ever published by the Free Software
+Foundation.
+
+@item
+If you wish to incorporate parts of the Program into other free
+programs whose distribution conditions are different, write to the author
+to ask for permission.  For software which is copyrighted by the Free
+Software Foundation, write to the Free Software Foundation; we sometimes
+make exceptions for this.  Our decision will be guided by the two goals
+of preserving the free status of all derivatives of our free software and
+of promoting the sharing and reuse of software generally.
+
+@iftex
+@heading NO WARRANTY
+@end iftex
+@ifnottex
+@center NO WARRANTY
+@end ifnottex
+
+@item
+BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+PROVIDE THE PROGRAM ``AS IS'' WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE ENTIRE RISK AS
+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.  SHOULD THE
+PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+REPAIR OR CORRECTION.
+
+@item
+IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
+OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
+TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+@end enumerate
+
+@iftex
+@heading END OF TERMS AND CONDITIONS
+@end iftex
+@ifnottex
+@center END OF TERMS AND CONDITIONS
+@end ifnottex
+
+@page
+@unnumberedsec Appendix: How to Apply These Terms to Your New Programs
+
+  If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+  To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the ``copyright'' line and a pointer to where the full notice is found.
+
+@smallexample
+@var{one line to give the program's name and a brief idea of what it does.}
+Copyright (C) @var{year}  @var{name of author}
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA
+@end smallexample
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+@smallexample
+Gnomovision version 69, Copyright (C) @var{year} @var{name of author}
+Gnomovision comes with ABSOLUTELY NO WARRANTY; for details
+type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+@end smallexample
+
+The hypothetical commands @samp{show w} and @samp{show c} should show
+the appropriate parts of the General Public License.  Of course, the
+commands you use may be called something other than @samp{show w} and
+@samp{show c}; they could even be mouse-clicks or menu items---whatever
+suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a ``copyright disclaimer'' for the program, if
+necessary.  Here is a sample; alter the names:
+
+@example
+Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+`Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+@var{signature of Ty Coon}, 1 April 1989
+Ty Coon, President of Vice
+@end example
+
+This General Public License does not permit incorporating your program into
+proprietary programs.  If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library.  If this is what you want to do, use the GNU Library General
+Public License instead of this License.
+@c man end
diff --git a/gcc/doc/include/gpl_v3.texi b/gcc/doc/include/gpl_v3.texi
new file mode 100644
index 000000000..318067773
--- /dev/null
+++ b/gcc/doc/include/gpl_v3.texi
@@ -0,0 +1,733 @@
+@ignore
+@c Set file name and title for man page.
+@setfilename gpl
+@settitle GNU General Public License
+@c man begin SEEALSO
+gfdl(7), fsf-funding(7).
+@c man end
+@c man begin COPYRIGHT
+Copyright @copyright{} 2007 Free Software Foundation, Inc.
+
+Everyone is permitted to copy and distribute verbatim copies of this
+license document, but changing it is not allowed.
+@c man end
+@end ignore
+@node Copying
+@c man begin DESCRIPTION
+@unnumbered GNU General Public License
+@center Version 3, 29 June 2007
+
+@c This file is intended to be included in another file.
+
+@display
+Copyright @copyright{} 2007 Free Software Foundation, Inc. @url{http://fsf.org/}
+
+Everyone is permitted to copy and distribute verbatim copies of this
+license document, but changing it is not allowed.
+@end display
+
+@heading Preamble
+
+The GNU General Public License is a free, copyleft license for
+software and other kinds of works.
+
+The licenses for most software and other practical works are designed
+to take away your freedom to share and change the works.  By contrast,
+the GNU General Public License is intended to guarantee your freedom
+to share and change all versions of a program--to make sure it remains
+free software for all its users.  We, the Free Software Foundation,
+use the GNU General Public License for most of our software; it
+applies also to any other work released this way by its authors.  You
+can apply it to your programs, too.
+
+When we speak of free software, we are referring to freedom, not
+price.  Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+them if you wish), that you receive source code or can get it if you
+want it, that you can change the software or use pieces of it in new
+free programs, and that you know you can do these things.
+
+To protect your rights, we need to prevent others from denying you
+these rights or asking you to surrender the rights.  Therefore, you
+have certain responsibilities if you distribute copies of the
+software, or if you modify it: responsibilities to respect the freedom
+of others.
+
+For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must pass on to the recipients the same
+freedoms that you received.  You must make sure that they, too,
+receive or can get the source code.  And you must show them these
+terms so they know their rights.
+
+Developers that use the GNU GPL protect your rights with two steps:
+(1) assert copyright on the software, and (2) offer you this License
+giving you legal permission to copy, distribute and/or modify it.
+
+For the developers' and authors' protection, the GPL clearly explains
+that there is no warranty for this free software.  For both users' and
+authors' sake, the GPL requires that modified versions be marked as
+changed, so that their problems will not be attributed erroneously to
+authors of previous versions.
+
+Some devices are designed to deny users access to install or run
+modified versions of the software inside them, although the
+manufacturer can do so.  This is fundamentally incompatible with the
+aim of protecting users' freedom to change the software.  The
+systematic pattern of such abuse occurs in the area of products for
+individuals to use, which is precisely where it is most unacceptable.
+Therefore, we have designed this version of the GPL to prohibit the
+practice for those products.  If such problems arise substantially in
+other domains, we stand ready to extend this provision to those
+domains in future versions of the GPL, as needed to protect the
+freedom of users.
+
+Finally, every program is threatened constantly by software patents.
+States should not allow patents to restrict development and use of
+software on general-purpose computers, but in those that do, we wish
+to avoid the special danger that patents applied to a free program
+could make it effectively proprietary.  To prevent this, the GPL
+assures that patents cannot be used to render the program non-free.
+
+The precise terms and conditions for copying, distribution and
+modification follow.
+
+@heading TERMS AND CONDITIONS
+
+@enumerate 0
+@item Definitions.
+
+``This License'' refers to version 3 of the GNU General Public License.
+
+``Copyright'' also means copyright-like laws that apply to other kinds
+of works, such as semiconductor masks.
+
+``The Program'' refers to any copyrightable work licensed under this
+License.  Each licensee is addressed as ``you''.  ``Licensees'' and
+``recipients'' may be individuals or organizations.
+
+To ``modify'' a work means to copy from or adapt all or part of the work
+in a fashion requiring copyright permission, other than the making of
+an exact copy.  The resulting work is called a ``modified version'' of
+the earlier work or a work ``based on'' the earlier work.
+
+A ``covered work'' means either the unmodified Program or a work based
+on the Program.
+
+To ``propagate'' a work means to do anything with it that, without
+permission, would make you directly or secondarily liable for
+infringement under applicable copyright law, except executing it on a
+computer or modifying a private copy.  Propagation includes copying,
+distribution (with or without modification), making available to the
+public, and in some countries other activities as well.
+
+To ``convey'' a work means any kind of propagation that enables other
+parties to make or receive copies.  Mere interaction with a user
+through a computer network, with no transfer of a copy, is not
+conveying.
+
+An interactive user interface displays ``Appropriate Legal Notices'' to
+the extent that it includes a convenient and prominently visible
+feature that (1) displays an appropriate copyright notice, and (2)
+tells the user that there is no warranty for the work (except to the
+extent that warranties are provided), that licensees may convey the
+work under this License, and how to view a copy of this License.  If
+the interface presents a list of user commands or options, such as a
+menu, a prominent item in the list meets this criterion.
+
+@item Source Code.
+
+The ``source code'' for a work means the preferred form of the work for
+making modifications to it.  ``Object code'' means any non-source form
+of a work.
+
+A ``Standard Interface'' means an interface that either is an official
+standard defined by a recognized standards body, or, in the case of
+interfaces specified for a particular programming language, one that
+is widely used among developers working in that language.
+
+The ``System Libraries'' of an executable work include anything, other
+than the work as a whole, that (a) is included in the normal form of
+packaging a Major Component, but which is not part of that Major
+Component, and (b) serves only to enable use of the work with that
+Major Component, or to implement a Standard Interface for which an
+implementation is available to the public in source code form.  A
+``Major Component'', in this context, means a major essential component
+(kernel, window system, and so on) of the specific operating system
+(if any) on which the executable work runs, or a compiler used to
+produce the work, or an object code interpreter used to run it.
+
+The ``Corresponding Source'' for a work in object code form means all
+the source code needed to generate, install, and (for an executable
+work) run the object code and to modify the work, including scripts to
+control those activities.  However, it does not include the work's
+System Libraries, or general-purpose tools or generally available free
+programs which are used unmodified in performing those activities but
+which are not part of the work.  For example, Corresponding Source
+includes interface definition files associated with source files for
+the work, and the source code for shared libraries and dynamically
+linked subprograms that the work is specifically designed to require,
+such as by intimate data communication or control flow between those
+subprograms and other parts of the work.
+
+The Corresponding Source need not include anything that users can
+regenerate automatically from other parts of the Corresponding Source.
+
+The Corresponding Source for a work in source code form is that same
+work.
+
+@item Basic Permissions.
+
+All rights granted under this License are granted for the term of
+copyright on the Program, and are irrevocable provided the stated
+conditions are met.  This License explicitly affirms your unlimited
+permission to run the unmodified Program.  The output from running a
+covered work is covered by this License only if the output, given its
+content, constitutes a covered work.  This License acknowledges your
+rights of fair use or other equivalent, as provided by copyright law.
+
+You may make, run and propagate covered works that you do not convey,
+without conditions so long as your license otherwise remains in force.
+You may convey covered works to others for the sole purpose of having
+them make modifications exclusively for you, or provide you with
+facilities for running those works, provided that you comply with the
+terms of this License in conveying all material for which you do not
+control copyright.  Those thus making or running the covered works for
+you must do so exclusively on your behalf, under your direction and
+control, on terms that prohibit them from making any copies of your
+copyrighted material outside their relationship with you.
+
+Conveying under any other circumstances is permitted solely under the
+conditions stated below.  Sublicensing is not allowed; section 10
+makes it unnecessary.
+
+@item Protecting Users' Legal Rights From Anti-Circumvention Law.
+
+No covered work shall be deemed part of an effective technological
+measure under any applicable law fulfilling obligations under article
+11 of the WIPO copyright treaty adopted on 20 December 1996, or
+similar laws prohibiting or restricting circumvention of such
+measures.
+
+When you convey a covered work, you waive any legal power to forbid
+circumvention of technological measures to the extent such
+circumvention is effected by exercising rights under this License with
+respect to the covered work, and you disclaim any intention to limit
+operation or modification of the work as a means of enforcing, against
+the work's users, your or third parties' legal rights to forbid
+circumvention of technological measures.
+
+@item Conveying Verbatim Copies.
+
+You may convey verbatim copies of the Program's source code as you
+receive it, in any medium, provided that you conspicuously and
+appropriately publish on each copy an appropriate copyright notice;
+keep intact all notices stating that this License and any
+non-permissive terms added in accord with section 7 apply to the code;
+keep intact all notices of the absence of any warranty; and give all
+recipients a copy of this License along with the Program.
+
+You may charge any price or no price for each copy that you convey,
+and you may offer support or warranty protection for a fee.
+
+@item Conveying Modified Source Versions.
+
+You may convey a work based on the Program, or the modifications to
+produce it from the Program, in the form of source code under the
+terms of section 4, provided that you also meet all of these
+conditions:
+
+@enumerate a
+@item 
+The work must carry prominent notices stating that you modified it,
+and giving a relevant date.
+
+@item
+The work must carry prominent notices stating that it is released
+under this License and any conditions added under section 7.  This
+requirement modifies the requirement in section 4 to ``keep intact all
+notices''.
+
+@item
+You must license the entire work, as a whole, under this License to
+anyone who comes into possession of a copy.  This License will
+therefore apply, along with any applicable section 7 additional terms,
+to the whole of the work, and all its parts, regardless of how they
+are packaged.  This License gives no permission to license the work in
+any other way, but it does not invalidate such permission if you have
+separately received it.
+
+@item
+If the work has interactive user interfaces, each must display
+Appropriate Legal Notices; however, if the Program has interactive
+interfaces that do not display Appropriate Legal Notices, your work
+need not make them do so.
+@end enumerate
+
+A compilation of a covered work with other separate and independent
+works, which are not by their nature extensions of the covered work,
+and which are not combined with it such as to form a larger program,
+in or on a volume of a storage or distribution medium, is called an
+``aggregate'' if the compilation and its resulting copyright are not
+used to limit the access or legal rights of the compilation's users
+beyond what the individual works permit.  Inclusion of a covered work
+in an aggregate does not cause this License to apply to the other
+parts of the aggregate.
+
+@item  Conveying Non-Source Forms.
+
+You may convey a covered work in object code form under the terms of
+sections 4 and 5, provided that you also convey the machine-readable
+Corresponding Source under the terms of this License, in one of these
+ways:
+
+@enumerate a
+@item
+Convey the object code in, or embodied in, a physical product
+(including a physical distribution medium), accompanied by the
+Corresponding Source fixed on a durable physical medium customarily
+used for software interchange.
+
+@item
+Convey the object code in, or embodied in, a physical product
+(including a physical distribution medium), accompanied by a written
+offer, valid for at least three years and valid for as long as you
+offer spare parts or customer support for that product model, to give
+anyone who possesses the object code either (1) a copy of the
+Corresponding Source for all the software in the product that is
+covered by this License, on a durable physical medium customarily used
+for software interchange, for a price no more than your reasonable
+cost of physically performing this conveying of source, or (2) access
+to copy the Corresponding Source from a network server at no charge.
+
+@item
+Convey individual copies of the object code with a copy of the written
+offer to provide the Corresponding Source.  This alternative is
+allowed only occasionally and noncommercially, and only if you
+received the object code with such an offer, in accord with subsection
+6b.
+
+@item
+Convey the object code by offering access from a designated place
+(gratis or for a charge), and offer equivalent access to the
+Corresponding Source in the same way through the same place at no
+further charge.  You need not require recipients to copy the
+Corresponding Source along with the object code.  If the place to copy
+the object code is a network server, the Corresponding Source may be
+on a different server (operated by you or a third party) that supports
+equivalent copying facilities, provided you maintain clear directions
+next to the object code saying where to find the Corresponding Source.
+Regardless of what server hosts the Corresponding Source, you remain
+obligated to ensure that it is available for as long as needed to
+satisfy these requirements.
+
+@item
+Convey the object code using peer-to-peer transmission, provided you
+inform other peers where the object code and Corresponding Source of
+the work are being offered to the general public at no charge under
+subsection 6d.
+
+@end enumerate
+
+A separable portion of the object code, whose source code is excluded
+from the Corresponding Source as a System Library, need not be
+included in conveying the object code work.
+
+A ``User Product'' is either (1) a ``consumer product'', which means any
+tangible personal property which is normally used for personal,
+family, or household purposes, or (2) anything designed or sold for
+incorporation into a dwelling.  In determining whether a product is a
+consumer product, doubtful cases shall be resolved in favor of
+coverage.  For a particular product received by a particular user,
+``normally used'' refers to a typical or common use of that class of
+product, regardless of the status of the particular user or of the way
+in which the particular user actually uses, or expects or is expected
+to use, the product.  A product is a consumer product regardless of
+whether the product has substantial commercial, industrial or
+non-consumer uses, unless such uses represent the only significant
+mode of use of the product.
+
+``Installation Information'' for a User Product means any methods,
+procedures, authorization keys, or other information required to
+install and execute modified versions of a covered work in that User
+Product from a modified version of its Corresponding Source.  The
+information must suffice to ensure that the continued functioning of
+the modified object code is in no case prevented or interfered with
+solely because modification has been made.
+
+If you convey an object code work under this section in, or with, or
+specifically for use in, a User Product, and the conveying occurs as
+part of a transaction in which the right of possession and use of the
+User Product is transferred to the recipient in perpetuity or for a
+fixed term (regardless of how the transaction is characterized), the
+Corresponding Source conveyed under this section must be accompanied
+by the Installation Information.  But this requirement does not apply
+if neither you nor any third party retains the ability to install
+modified object code on the User Product (for example, the work has
+been installed in ROM).
+
+The requirement to provide Installation Information does not include a
+requirement to continue to provide support service, warranty, or
+updates for a work that has been modified or installed by the
+recipient, or for the User Product in which it has been modified or
+installed.  Access to a network may be denied when the modification
+itself materially and adversely affects the operation of the network
+or violates the rules and protocols for communication across the
+network.
+
+Corresponding Source conveyed, and Installation Information provided,
+in accord with this section must be in a format that is publicly
+documented (and with an implementation available to the public in
+source code form), and must require no special password or key for
+unpacking, reading or copying.
+
+@item Additional Terms.
+
+``Additional permissions'' are terms that supplement the terms of this
+License by making exceptions from one or more of its conditions.
+Additional permissions that are applicable to the entire Program shall
+be treated as though they were included in this License, to the extent
+that they are valid under applicable law.  If additional permissions
+apply only to part of the Program, that part may be used separately
+under those permissions, but the entire Program remains governed by
+this License without regard to the additional permissions.
+
+When you convey a copy of a covered work, you may at your option
+remove any additional permissions from that copy, or from any part of
+it.  (Additional permissions may be written to require their own
+removal in certain cases when you modify the work.)  You may place
+additional permissions on material, added by you to a covered work,
+for which you have or can give appropriate copyright permission.
+
+Notwithstanding any other provision of this License, for material you
+add to a covered work, you may (if authorized by the copyright holders
+of that material) supplement the terms of this License with terms:
+
+@enumerate a
+@item
+Disclaiming warranty or limiting liability differently from the terms
+of sections 15 and 16 of this License; or
+
+@item
+Requiring preservation of specified reasonable legal notices or author
+attributions in that material or in the Appropriate Legal Notices
+displayed by works containing it; or
+
+@item
+Prohibiting misrepresentation of the origin of that material, or
+requiring that modified versions of such material be marked in
+reasonable ways as different from the original version; or
+
+@item
+Limiting the use for publicity purposes of names of licensors or
+authors of the material; or
+
+@item
+Declining to grant rights under trademark law for use of some trade
+names, trademarks, or service marks; or
+
+@item
+Requiring indemnification of licensors and authors of that material by
+anyone who conveys the material (or modified versions of it) with
+contractual assumptions of liability to the recipient, for any
+liability that these contractual assumptions directly impose on those
+licensors and authors.
+@end enumerate
+
+All other non-permissive additional terms are considered ``further
+restrictions'' within the meaning of section 10.  If the Program as you
+received it, or any part of it, contains a notice stating that it is
+governed by this License along with a term that is a further
+restriction, you may remove that term.  If a license document contains
+a further restriction but permits relicensing or conveying under this
+License, you may add to a covered work material governed by the terms
+of that license document, provided that the further restriction does
+not survive such relicensing or conveying.
+
+If you add terms to a covered work in accord with this section, you
+must place, in the relevant source files, a statement of the
+additional terms that apply to those files, or a notice indicating
+where to find the applicable terms.
+
+Additional terms, permissive or non-permissive, may be stated in the
+form of a separately written license, or stated as exceptions; the
+above requirements apply either way.
+
+@item Termination.
+
+You may not propagate or modify a covered work except as expressly
+provided under this License.  Any attempt otherwise to propagate or
+modify it is void, and will automatically terminate your rights under
+this License (including any patent licenses granted under the third
+paragraph of section 11).
+
+However, if you cease all violation of this License, then your license
+from a particular copyright holder is reinstated (a) provisionally,
+unless and until the copyright holder explicitly and finally
+terminates your license, and (b) permanently, if the copyright holder
+fails to notify you of the violation by some reasonable means prior to
+60 days after the cessation.
+
+Moreover, your license from a particular copyright holder is
+reinstated permanently if the copyright holder notifies you of the
+violation by some reasonable means, this is the first time you have
+received notice of violation of this License (for any work) from that
+copyright holder, and you cure the violation prior to 30 days after
+your receipt of the notice.
+
+Termination of your rights under this section does not terminate the
+licenses of parties who have received copies or rights from you under
+this License.  If your rights have been terminated and not permanently
+reinstated, you do not qualify to receive new licenses for the same
+material under section 10.
+
+@item Acceptance Not Required for Having Copies.
+
+You are not required to accept this License in order to receive or run
+a copy of the Program.  Ancillary propagation of a covered work
+occurring solely as a consequence of using peer-to-peer transmission
+to receive a copy likewise does not require acceptance.  However,
+nothing other than this License grants you permission to propagate or
+modify any covered work.  These actions infringe copyright if you do
+not accept this License.  Therefore, by modifying or propagating a
+covered work, you indicate your acceptance of this License to do so.
+
+@item Automatic Licensing of Downstream Recipients.
+
+Each time you convey a covered work, the recipient automatically
+receives a license from the original licensors, to run, modify and
+propagate that work, subject to this License.  You are not responsible
+for enforcing compliance by third parties with this License.
+
+An ``entity transaction'' is a transaction transferring control of an
+organization, or substantially all assets of one, or subdividing an
+organization, or merging organizations.  If propagation of a covered
+work results from an entity transaction, each party to that
+transaction who receives a copy of the work also receives whatever
+licenses to the work the party's predecessor in interest had or could
+give under the previous paragraph, plus a right to possession of the
+Corresponding Source of the work from the predecessor in interest, if
+the predecessor has it or can get it with reasonable efforts.
+
+You may not impose any further restrictions on the exercise of the
+rights granted or affirmed under this License.  For example, you may
+not impose a license fee, royalty, or other charge for exercise of
+rights granted under this License, and you may not initiate litigation
+(including a cross-claim or counterclaim in a lawsuit) alleging that
+any patent claim is infringed by making, using, selling, offering for
+sale, or importing the Program or any portion of it.
+
+@item Patents.
+
+A ``contributor'' is a copyright holder who authorizes use under this
+License of the Program or a work on which the Program is based.  The
+work thus licensed is called the contributor's ``contributor version''.
+
+A contributor's ``essential patent claims'' are all patent claims owned
+or controlled by the contributor, whether already acquired or
+hereafter acquired, that would be infringed by some manner, permitted
+by this License, of making, using, or selling its contributor version,
+but do not include claims that would be infringed only as a
+consequence of further modification of the contributor version.  For
+purposes of this definition, ``control'' includes the right to grant
+patent sublicenses in a manner consistent with the requirements of
+this License.
+
+Each contributor grants you a non-exclusive, worldwide, royalty-free
+patent license under the contributor's essential patent claims, to
+make, use, sell, offer for sale, import and otherwise run, modify and
+propagate the contents of its contributor version.
+
+In the following three paragraphs, a ``patent license'' is any express
+agreement or commitment, however denominated, not to enforce a patent
+(such as an express permission to practice a patent or covenant not to
+sue for patent infringement).  To ``grant'' such a patent license to a
+party means to make such an agreement or commitment not to enforce a
+patent against the party.
+
+If you convey a covered work, knowingly relying on a patent license,
+and the Corresponding Source of the work is not available for anyone
+to copy, free of charge and under the terms of this License, through a
+publicly available network server or other readily accessible means,
+then you must either (1) cause the Corresponding Source to be so
+available, or (2) arrange to deprive yourself of the benefit of the
+patent license for this particular work, or (3) arrange, in a manner
+consistent with the requirements of this License, to extend the patent
+license to downstream recipients.  ``Knowingly relying'' means you have
+actual knowledge that, but for the patent license, your conveying the
+covered work in a country, or your recipient's use of the covered work
+in a country, would infringe one or more identifiable patents in that
+country that you have reason to believe are valid.
+
+If, pursuant to or in connection with a single transaction or
+arrangement, you convey, or propagate by procuring conveyance of, a
+covered work, and grant a patent license to some of the parties
+receiving the covered work authorizing them to use, propagate, modify
+or convey a specific copy of the covered work, then the patent license
+you grant is automatically extended to all recipients of the covered
+work and works based on it.
+
+A patent license is ``discriminatory'' if it does not include within the
+scope of its coverage, prohibits the exercise of, or is conditioned on
+the non-exercise of one or more of the rights that are specifically
+granted under this License.  You may not convey a covered work if you
+are a party to an arrangement with a third party that is in the
+business of distributing software, under which you make payment to the
+third party based on the extent of your activity of conveying the
+work, and under which the third party grants, to any of the parties
+who would receive the covered work from you, a discriminatory patent
+license (a) in connection with copies of the covered work conveyed by
+you (or copies made from those copies), or (b) primarily for and in
+connection with specific products or compilations that contain the
+covered work, unless you entered into that arrangement, or that patent
+license was granted, prior to 28 March 2007.
+
+Nothing in this License shall be construed as excluding or limiting
+any implied license or other defenses to infringement that may
+otherwise be available to you under applicable patent law.
+
+@item No Surrender of Others' Freedom.
+
+If conditions are imposed on you (whether by court order, agreement or
+otherwise) that contradict the conditions of this License, they do not
+excuse you from the conditions of this License.  If you cannot convey
+a covered work so as to satisfy simultaneously your obligations under
+this License and any other pertinent obligations, then as a
+consequence you may not convey it at all.  For example, if you agree
+to terms that obligate you to collect a royalty for further conveying
+from those to whom you convey the Program, the only way you could
+satisfy both those terms and this License would be to refrain entirely
+from conveying the Program.
+
+@item Use with the GNU Affero General Public License.
+
+Notwithstanding any other provision of this License, you have
+permission to link or combine any covered work with a work licensed
+under version 3 of the GNU Affero General Public License into a single
+combined work, and to convey the resulting work.  The terms of this
+License will continue to apply to the part which is the covered work,
+but the special requirements of the GNU Affero General Public License,
+section 13, concerning interaction through a network will apply to the
+combination as such.
+
+@item Revised Versions of this License.
+
+The Free Software Foundation may publish revised and/or new versions
+of the GNU General Public License from time to time.  Such new
+versions will be similar in spirit to the present version, but may
+differ in detail to address new problems or concerns.
+
+Each version is given a distinguishing version number.  If the Program
+specifies that a certain numbered version of the GNU General Public
+License ``or any later version'' applies to it, you have the option of
+following the terms and conditions either of that numbered version or
+of any later version published by the Free Software Foundation.  If
+the Program does not specify a version number of the GNU General
+Public License, you may choose any version ever published by the Free
+Software Foundation.
+
+If the Program specifies that a proxy can decide which future versions
+of the GNU General Public License can be used, that proxy's public
+statement of acceptance of a version permanently authorizes you to
+choose that version for the Program.
+
+Later license versions may give you additional or different
+permissions.  However, no additional obligations are imposed on any
+author or copyright holder as a result of your choosing to follow a
+later version.
+
+@item Disclaimer of Warranty.
+
+THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY
+APPLICABLE LAW.  EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT
+HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM ``AS IS'' WITHOUT
+WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT
+LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+A PARTICULAR PURPOSE.  THE ENTIRE RISK AS TO THE QUALITY AND
+PERFORMANCE OF THE PROGRAM IS WITH YOU.  SHOULD THE PROGRAM PROVE
+DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, REPAIR OR
+CORRECTION.
+
+@item Limitation of Liability.
+
+IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR
+CONVEYS THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES
+ARISING OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT
+NOT LIMITED TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR
+LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM
+TO OPERATE WITH ANY OTHER PROGRAMS), EVEN IF SUCH HOLDER OR OTHER
+PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+
+@item Interpretation of Sections 15 and 16.
+
+If the disclaimer of warranty and limitation of liability provided
+above cannot be given local legal effect according to their terms,
+reviewing courts shall apply local law that most closely approximates
+an absolute waiver of all civil liability in connection with the
+Program, unless a warranty or assumption of liability accompanies a
+copy of the Program in return for a fee.
+
+@end enumerate
+
+@heading END OF TERMS AND CONDITIONS
+
+@heading How to Apply These Terms to Your New Programs
+
+If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these
+terms.
+
+To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+state the exclusion of warranty; and each file should have at least
+the ``copyright'' line and a pointer to where the full notice is found.
+
+@smallexample
+@var{one line to give the program's name and a brief idea of what it does.}  
+Copyright (C) @var{year} @var{name of author}
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or (at
+your option) any later version.
+
+This program is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see @url{http://www.gnu.org/licenses/}.
+@end smallexample
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program does terminal interaction, make it output a short
+notice like this when it starts in an interactive mode:
+
+@smallexample
+@var{program} Copyright (C) @var{year} @var{name of author} 
+This program comes with ABSOLUTELY NO WARRANTY; for details type @samp{show w}.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type @samp{show c} for details.
+@end smallexample
+
+The hypothetical commands @samp{show w} and @samp{show c} should show
+the appropriate parts of the General Public License.  Of course, your
+program's commands might be different; for a GUI interface, you would
+use an ``about box''.
+
+You should also get your employer (if you work as a programmer) or school,
+if any, to sign a ``copyright disclaimer'' for the program, if necessary.
+For more information on this, and how to apply and follow the GNU GPL, see
+@url{http://www.gnu.org/licenses/}.
+
+The GNU General Public License does not permit incorporating your
+program into proprietary programs.  If your program is a subroutine
+library, you may consider it more useful to permit linking proprietary
+applications with the library.  If this is what you want to do, use
+the GNU Lesser General Public License instead of this License.  But
+first, please read @url{http://www.gnu.org/philosophy/why-not-lgpl.html}.
+@c man end
diff --git a/gcc/doc/include/texinfo.tex b/gcc/doc/include/texinfo.tex
new file mode 100644
index 000000000..e4f38dd49
--- /dev/null
+++ b/gcc/doc/include/texinfo.tex
@@ -0,0 +1,8978 @@
+% texinfo.tex -- TeX macros to handle Texinfo files.
+%
+% Load plain if necessary, i.e., if running under initex.
+\expandafter\ifx\csname fmtname\endcsname\relax\input plain\fi
+%
+\def\texinfoversion{2008-03-17.10}
+%
+% Copyright (C) 1985, 1986, 1988, 1990, 1991, 1992, 1993, 1994, 1995,
+% 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006,
+% 2007, 2008 Free Software Foundation, Inc.
+%
+% This texinfo.tex file is free software: you can redistribute it and/or
+% modify it under the terms of the GNU General Public License as
+% published by the Free Software Foundation, either version 3 of the
+% License, or (at your option) any later version.
+%
+% This texinfo.tex file is distributed in the hope that it will be
+% useful, but WITHOUT ANY WARRANTY; without even the implied warranty
+% of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+% General Public License for more details.
+%
+% You should have received a copy of the GNU General Public License
+% along with this program.  If not, see <http://www.gnu.org/licenses/>.
+%
+% As a special exception, when this file is read by TeX when processing
+% a Texinfo source document, you may use the result without
+% restriction.  (This has been our intent since Texinfo was invented.)
+%
+% Please try the latest version of texinfo.tex before submitting bug
+% reports; you can get the latest version from:
+%   http://www.gnu.org/software/texinfo/ (the Texinfo home page), or
+%   ftp://tug.org/tex/texinfo.tex
+%     (and all CTAN mirrors, see http://www.ctan.org).
+% The texinfo.tex in any given distribution could well be out
+% of date, so if that's what you're using, please check.
+%
+% Send bug reports to bug-texinfo@gnu.org.  Please include including a
+% complete document in each bug report with which we can reproduce the
+% problem.  Patches are, of course, greatly appreciated.
+%
+% To process a Texinfo manual with TeX, it's most reliable to use the
+% texi2dvi shell script that comes with the distribution.  For a simple
+% manual foo.texi, however, you can get away with this:
+%   tex foo.texi
+%   texindex foo.??
+%   tex foo.texi
+%   tex foo.texi
+%   dvips foo.dvi -o  # or whatever; this makes foo.ps.
+% The extra TeX runs get the cross-reference information correct.
+% Sometimes one run after texindex suffices, and sometimes you need more
+% than two; texi2dvi does it as many times as necessary.
+%
+% It is possible to adapt texinfo.tex for other languages, to some
+% extent.  You can get the existing language-specific files from the
+% full Texinfo distribution.
+%
+% The GNU Texinfo home page is http://www.gnu.org/software/texinfo.
+
+
+\message{Loading texinfo [version \texinfoversion]:}
+
+% If in a .fmt file, print the version number
+% and turn on active characters that we couldn't do earlier because
+% they might have appeared in the input file name.
+\everyjob{\message{[Texinfo version \texinfoversion]}%
+  \catcode`+=\active \catcode`\_=\active}
+
+
+\chardef\other=12
+
+% We never want plain's \outer definition of \+ in Texinfo.
+% For @tex, we can use \tabalign.
+\let\+ = \relax
+
+% Save some plain tex macros whose names we will redefine.
+\let\ptexb=\b
+\let\ptexbullet=\bullet
+\let\ptexc=\c
+\let\ptexcomma=\,
+\let\ptexdot=\.
+\let\ptexdots=\dots
+\let\ptexend=\end
+\let\ptexequiv=\equiv
+\let\ptexexclam=\!
+\let\ptexfootnote=\footnote
+\let\ptexgtr=>
+\let\ptexhat=^
+\let\ptexi=\i
+\let\ptexindent=\indent
+\let\ptexinsert=\insert
+\let\ptexlbrace=\{
+\let\ptexless=<
+\let\ptexnewwrite\newwrite
+\let\ptexnoindent=\noindent
+\let\ptexplus=+
+\let\ptexrbrace=\}
+\let\ptexslash=\/
+\let\ptexstar=\*
+\let\ptext=\t
+\let\ptextop=\top
+
+% If this character appears in an error message or help string, it
+% starts a new line in the output.
+\newlinechar = `^^J
+
+% Use TeX 3.0's \inputlineno to get the line number, for better error
+% messages, but if we're using an old version of TeX, don't do anything.
+%
+\ifx\inputlineno\thisisundefined
+  \let\linenumber = \empty % Pre-3.0.
+\else
+  \def\linenumber{l.\the\inputlineno:\space}
+\fi
+
+% Set up fixed words for English if not already set.
+\ifx\putwordAppendix\undefined  \gdef\putwordAppendix{Appendix}\fi
+\ifx\putwordChapter\undefined   \gdef\putwordChapter{Chapter}\fi
+\ifx\putwordfile\undefined      \gdef\putwordfile{file}\fi
+\ifx\putwordin\undefined        \gdef\putwordin{in}\fi
+\ifx\putwordIndexIsEmpty\undefined     \gdef\putwordIndexIsEmpty{(Index is empty)}\fi
+\ifx\putwordIndexNonexistent\undefined \gdef\putwordIndexNonexistent{(Index is nonexistent)}\fi
+\ifx\putwordInfo\undefined      \gdef\putwordInfo{Info}\fi
+\ifx\putwordInstanceVariableof\undefined \gdef\putwordInstanceVariableof{Instance Variable of}\fi
+\ifx\putwordMethodon\undefined  \gdef\putwordMethodon{Method on}\fi
+\ifx\putwordNoTitle\undefined   \gdef\putwordNoTitle{No Title}\fi
+\ifx\putwordof\undefined        \gdef\putwordof{of}\fi
+\ifx\putwordon\undefined        \gdef\putwordon{on}\fi
+\ifx\putwordpage\undefined      \gdef\putwordpage{page}\fi
+\ifx\putwordsection\undefined   \gdef\putwordsection{section}\fi
+\ifx\putwordSection\undefined   \gdef\putwordSection{Section}\fi
+\ifx\putwordsee\undefined       \gdef\putwordsee{see}\fi
+\ifx\putwordSee\undefined       \gdef\putwordSee{See}\fi
+\ifx\putwordShortTOC\undefined  \gdef\putwordShortTOC{Short Contents}\fi
+\ifx\putwordTOC\undefined       \gdef\putwordTOC{Table of Contents}\fi
+%
+\ifx\putwordMJan\undefined \gdef\putwordMJan{January}\fi
+\ifx\putwordMFeb\undefined \gdef\putwordMFeb{February}\fi
+\ifx\putwordMMar\undefined \gdef\putwordMMar{March}\fi
+\ifx\putwordMApr\undefined \gdef\putwordMApr{April}\fi
+\ifx\putwordMMay\undefined \gdef\putwordMMay{May}\fi
+\ifx\putwordMJun\undefined \gdef\putwordMJun{June}\fi
+\ifx\putwordMJul\undefined \gdef\putwordMJul{July}\fi
+\ifx\putwordMAug\undefined \gdef\putwordMAug{August}\fi
+\ifx\putwordMSep\undefined \gdef\putwordMSep{September}\fi
+\ifx\putwordMOct\undefined \gdef\putwordMOct{October}\fi
+\ifx\putwordMNov\undefined \gdef\putwordMNov{November}\fi
+\ifx\putwordMDec\undefined \gdef\putwordMDec{December}\fi
+%
+\ifx\putwordDefmac\undefined    \gdef\putwordDefmac{Macro}\fi
+\ifx\putwordDefspec\undefined   \gdef\putwordDefspec{Special Form}\fi
+\ifx\putwordDefvar\undefined    \gdef\putwordDefvar{Variable}\fi
+\ifx\putwordDefopt\undefined    \gdef\putwordDefopt{User Option}\fi
+\ifx\putwordDeffunc\undefined   \gdef\putwordDeffunc{Function}\fi
+
+% Since the category of space is not known, we have to be careful.
+\chardef\spacecat = 10
+\def\spaceisspace{\catcode`\ =\spacecat}
+
+% sometimes characters are active, so we need control sequences.
+\chardef\colonChar = `\:
+\chardef\commaChar = `\,
+\chardef\dashChar  = `\-
+\chardef\dotChar   = `\.
+\chardef\exclamChar= `\!
+\chardef\lquoteChar= `\`
+\chardef\questChar = `\?
+\chardef\rquoteChar= `\'
+\chardef\semiChar  = `\;
+\chardef\underChar = `\_
+
+% Ignore a token.
+%
+\def\gobble#1{}
+
+% The following is used inside several \edef's.
+\def\makecsname#1{\expandafter\noexpand\csname#1\endcsname}
+
+% Hyphenation fixes.
+\hyphenation{
+  Flor-i-da Ghost-script Ghost-view Mac-OS Post-Script
+  ap-pen-dix bit-map bit-maps
+  data-base data-bases eshell fall-ing half-way long-est man-u-script
+  man-u-scripts mini-buf-fer mini-buf-fers over-view par-a-digm
+  par-a-digms rath-er rec-tan-gu-lar ro-bot-ics se-vere-ly set-up spa-ces
+  spell-ing spell-ings
+  stand-alone strong-est time-stamp time-stamps which-ever white-space
+  wide-spread wrap-around
+}
+
+% Margin to add to right of even pages, to left of odd pages.
+\newdimen\bindingoffset
+\newdimen\normaloffset
+\newdimen\pagewidth \newdimen\pageheight
+
+% For a final copy, take out the rectangles
+% that mark overfull boxes (in case you have decided
+% that the text looks ok even though it passes the margin).
+%
+\def\finalout{\overfullrule=0pt}
+
+% @| inserts a changebar to the left of the current line.  It should
+% surround any changed text.  This approach does *not* work if the
+% change spans more than two lines of output.  To handle that, we would
+% have adopt a much more difficult approach (putting marks into the main
+% vertical list for the beginning and end of each change).
+%
+\def\|{%
+  % \vadjust can only be used in horizontal mode.
+  \leavevmode
+  %
+  % Append this vertical mode material after the current line in the output.
+  \vadjust{%
+    % We want to insert a rule with the height and depth of the current
+    % leading; that is exactly what \strutbox is supposed to record.
+    \vskip-\baselineskip
+    %
+    % \vadjust-items are inserted at the left edge of the type.  So
+    % the \llap here moves out into the left-hand margin.
+    \llap{%
+      %
+      % For a thicker or thinner bar, change the `1pt'.
+      \vrule height\baselineskip width1pt
+      %
+      % This is the space between the bar and the text.
+      \hskip 12pt
+    }%
+  }%
+}
+
+% Sometimes it is convenient to have everything in the transcript file
+% and nothing on the terminal.  We don't just call \tracingall here,
+% since that produces some useless output on the terminal.  We also make
+% some effort to order the tracing commands to reduce output in the log
+% file; cf. trace.sty in LaTeX.
+%
+\def\gloggingall{\begingroup \globaldefs = 1 \loggingall \endgroup}%
+\def\loggingall{%
+  \tracingstats2
+  \tracingpages1
+  \tracinglostchars2  % 2 gives us more in etex
+  \tracingparagraphs1
+  \tracingoutput1
+  \tracingmacros2
+  \tracingrestores1
+  \showboxbreadth\maxdimen \showboxdepth\maxdimen
+  \ifx\eTeXversion\undefined\else % etex gives us more logging
+    \tracingscantokens1
+    \tracingifs1
+    \tracinggroups1
+    \tracingnesting2
+    \tracingassigns1
+  \fi
+  \tracingcommands3  % 3 gives us more in etex
+  \errorcontextlines16
+}%
+
+% add check for \lastpenalty to plain's definitions.  If the last thing
+% we did was a \nobreak, we don't want to insert more space.
+%
+\def\smallbreak{\ifnum\lastpenalty<10000\par\ifdim\lastskip<\smallskipamount
+  \removelastskip\penalty-50\smallskip\fi\fi}
+\def\medbreak{\ifnum\lastpenalty<10000\par\ifdim\lastskip<\medskipamount
+  \removelastskip\penalty-100\medskip\fi\fi}
+\def\bigbreak{\ifnum\lastpenalty<10000\par\ifdim\lastskip<\bigskipamount
+  \removelastskip\penalty-200\bigskip\fi\fi}
+
+% For @cropmarks command.
+% Do @cropmarks to get crop marks.
+%
+\newif\ifcropmarks
+\let\cropmarks = \cropmarkstrue
+%
+% Dimensions to add cropmarks at corners.
+% Added by P. A. MacKay, 12 Nov. 1986
+%
+\newdimen\outerhsize \newdimen\outervsize % set by the paper size routines
+\newdimen\cornerlong  \cornerlong=1pc
+\newdimen\cornerthick \cornerthick=.3pt
+\newdimen\topandbottommargin \topandbottommargin=.75in
+
+% Output a mark which sets \thischapter, \thissection and \thiscolor.
+% We dump everything together because we only have one kind of mark.
+% This works because we only use \botmark / \topmark, not \firstmark.
+%
+% A mark contains a subexpression of the \ifcase ... \fi construct.
+% \get*marks macros below extract the needed part using \ifcase.
+%
+% Another complication is to let the user choose whether \thischapter
+% (\thissection) refers to the chapter (section) in effect at the top
+% of a page, or that at the bottom of a page.  The solution is
+% described on page 260 of The TeXbook.  It involves outputting two
+% marks for the sectioning macros, one before the section break, and
+% one after.  I won't pretend I can describe this better than DEK...
+\def\domark{%
+  \toks0=\expandafter{\lastchapterdefs}%
+  \toks2=\expandafter{\lastsectiondefs}%
+  \toks4=\expandafter{\prevchapterdefs}%
+  \toks6=\expandafter{\prevsectiondefs}%
+  \toks8=\expandafter{\lastcolordefs}%
+  \mark{%
+                   \the\toks0 \the\toks2
+      \noexpand\or \the\toks4 \the\toks6
+    \noexpand\else \the\toks8
+  }%
+}
+% \topmark doesn't work for the very first chapter (after the title
+% page or the contents), so we use \firstmark there -- this gets us
+% the mark with the chapter defs, unless the user sneaks in, e.g.,
+% @setcolor (or @url, or @link, etc.) between @contents and the very
+% first @chapter.
+\def\gettopheadingmarks{%
+  \ifcase0\topmark\fi
+  \ifx\thischapter\empty \ifcase0\firstmark\fi \fi
+}
+\def\getbottomheadingmarks{\ifcase1\botmark\fi}
+\def\getcolormarks{\ifcase2\topmark\fi}
+
+% Avoid "undefined control sequence" errors.
+\def\lastchapterdefs{}
+\def\lastsectiondefs{}
+\def\prevchapterdefs{}
+\def\prevsectiondefs{}
+\def\lastcolordefs{}
+
+% Main output routine.
+\chardef\PAGE = 255
+\output = {\onepageout{\pagecontents\PAGE}}
+
+\newbox\headlinebox
+\newbox\footlinebox
+
+% \onepageout takes a vbox as an argument.  Note that \pagecontents
+% does insertions, but you have to call it yourself.
+\def\onepageout#1{%
+  \ifcropmarks \hoffset=0pt \else \hoffset=\normaloffset \fi
+  %
+  \ifodd\pageno  \advance\hoffset by \bindingoffset
+  \else \advance\hoffset by -\bindingoffset\fi
+  %
+  % Do this outside of the \shipout so @code etc. will be expanded in
+  % the headline as they should be, not taken literally (outputting ''code).
+  \ifodd\pageno \getoddheadingmarks \else \getevenheadingmarks \fi
+  \setbox\headlinebox = \vbox{\let\hsize=\pagewidth \makeheadline}%
+  \ifodd\pageno \getoddfootingmarks \else \getevenfootingmarks \fi
+  \setbox\footlinebox = \vbox{\let\hsize=\pagewidth \makefootline}%
+  %
+  {%
+    % Have to do this stuff outside the \shipout because we want it to
+    % take effect in \write's, yet the group defined by the \vbox ends
+    % before the \shipout runs.
+    %
+    \indexdummies         % don't expand commands in the output.
+    \normalturnoffactive  % \ in index entries must not stay \, e.g., if
+               % the page break happens to be in the middle of an example.
+               % We don't want .vr (or whatever) entries like this:
+               % \entry{{\tt \indexbackslash }acronym}{32}{\code {\acronym}}
+               % "\acronym" won't work when it's read back in;
+               % it needs to be 
+               % {\code {{\tt \backslashcurfont }acronym}
+    \shipout\vbox{%
+      % Do this early so pdf references go to the beginning of the page.
+      \ifpdfmakepagedest \pdfdest name{\the\pageno} xyz\fi
+      %
+      \ifcropmarks \vbox to \outervsize\bgroup
+        \hsize = \outerhsize
+        \vskip-\topandbottommargin
+        \vtop to0pt{%
+          \line{\ewtop\hfil\ewtop}%
+          \nointerlineskip
+          \line{%
+            \vbox{\moveleft\cornerthick\nstop}%
+            \hfill
+            \vbox{\moveright\cornerthick\nstop}%
+          }%
+          \vss}%
+        \vskip\topandbottommargin
+        \line\bgroup
+          \hfil % center the page within the outer (page) hsize.
+          \ifodd\pageno\hskip\bindingoffset\fi
+          \vbox\bgroup
+      \fi
+      %
+      \unvbox\headlinebox
+      \pagebody{#1}%
+      \ifdim\ht\footlinebox > 0pt
+        % Only leave this space if the footline is nonempty.
+        % (We lessened \vsize for it in \oddfootingyyy.)
+        % The \baselineskip=24pt in plain's \makefootline has no effect.
+        \vskip 24pt
+        \unvbox\footlinebox
+      \fi
+      %
+      \ifcropmarks
+          \egroup % end of \vbox\bgroup
+        \hfil\egroup % end of (centering) \line\bgroup
+        \vskip\topandbottommargin plus1fill minus1fill
+        \boxmaxdepth = \cornerthick
+        \vbox to0pt{\vss
+          \line{%
+            \vbox{\moveleft\cornerthick\nsbot}%
+            \hfill
+            \vbox{\moveright\cornerthick\nsbot}%
+          }%
+          \nointerlineskip
+          \line{\ewbot\hfil\ewbot}%
+        }%
+      \egroup % \vbox from first cropmarks clause
+      \fi
+    }% end of \shipout\vbox
+  }% end of group with \indexdummies
+  \advancepageno
+  \ifnum\outputpenalty>-20000 \else\dosupereject\fi
+}
+
+\newinsert\margin \dimen\margin=\maxdimen
+
+\def\pagebody#1{\vbox to\pageheight{\boxmaxdepth=\maxdepth #1}}
+{\catcode`\@ =11
+\gdef\pagecontents#1{\ifvoid\topins\else\unvbox\topins\fi
+% marginal hacks, juha@viisa.uucp (Juha Takala)
+\ifvoid\margin\else % marginal info is present
+  \rlap{\kern\hsize\vbox to\z@{\kern1pt\box\margin \vss}}\fi
+\dimen@=\dp#1\relax \unvbox#1\relax
+\ifvoid\footins\else\vskip\skip\footins\footnoterule \unvbox\footins\fi
+\ifr@ggedbottom \kern-\dimen@ \vfil \fi}
+}
+
+% Here are the rules for the cropmarks.  Note that they are
+% offset so that the space between them is truly \outerhsize or \outervsize
+% (P. A. MacKay, 12 November, 1986)
+%
+\def\ewtop{\vrule height\cornerthick depth0pt width\cornerlong}
+\def\nstop{\vbox
+  {\hrule height\cornerthick depth\cornerlong width\cornerthick}}
+\def\ewbot{\vrule height0pt depth\cornerthick width\cornerlong}
+\def\nsbot{\vbox
+  {\hrule height\cornerlong depth\cornerthick width\cornerthick}}
+
+% Parse an argument, then pass it to #1.  The argument is the rest of
+% the input line (except we remove a trailing comment).  #1 should be a
+% macro which expects an ordinary undelimited TeX argument.
+%
+\def\parsearg{\parseargusing{}}
+\def\parseargusing#1#2{%
+  \def\argtorun{#2}%
+  \begingroup
+    \obeylines
+    \spaceisspace
+    #1%
+    \parseargline\empty% Insert the \empty token, see \finishparsearg below.
+}
+
+{\obeylines %
+  \gdef\parseargline#1^^M{%
+    \endgroup % End of the group started in \parsearg.
+    \argremovecomment #1\comment\ArgTerm%
+  }%
+}
+
+% First remove any @comment, then any @c comment.
+\def\argremovecomment#1\comment#2\ArgTerm{\argremovec #1\c\ArgTerm}
+\def\argremovec#1\c#2\ArgTerm{\argcheckspaces#1\^^M\ArgTerm}
+
+% Each occurence of `\^^M' or `<space>\^^M' is replaced by a single space.
+%
+% \argremovec might leave us with trailing space, e.g.,
+%    @end itemize  @c foo
+% This space token undergoes the same procedure and is eventually removed
+% by \finishparsearg.
+%
+\def\argcheckspaces#1\^^M{\argcheckspacesX#1\^^M \^^M}
+\def\argcheckspacesX#1 \^^M{\argcheckspacesY#1\^^M}
+\def\argcheckspacesY#1\^^M#2\^^M#3\ArgTerm{%
+  \def\temp{#3}%
+  \ifx\temp\empty
+    % Do not use \next, perhaps the caller of \parsearg uses it; reuse \temp:
+    \let\temp\finishparsearg
+  \else
+    \let\temp\argcheckspaces
+  \fi
+  % Put the space token in:
+  \temp#1 #3\ArgTerm
+}
+
+% If a _delimited_ argument is enclosed in braces, they get stripped; so
+% to get _exactly_ the rest of the line, we had to prevent such situation.
+% We prepended an \empty token at the very beginning and we expand it now,
+% just before passing the control to \argtorun.
+% (Similarily, we have to think about #3 of \argcheckspacesY above: it is
+% either the null string, or it ends with \^^M---thus there is no danger
+% that a pair of braces would be stripped.
+%
+% But first, we have to remove the trailing space token.
+%
+\def\finishparsearg#1 \ArgTerm{\expandafter\argtorun\expandafter{#1}}
+
+% \parseargdef\foo{...}
+%	is roughly equivalent to
+% \def\foo{\parsearg\Xfoo}
+% \def\Xfoo#1{...}
+%
+% Actually, I use \csname\string\foo\endcsname, ie. \\foo, as it is my
+% favourite TeX trick.  --kasal, 16nov03
+
+\def\parseargdef#1{%
+  \expandafter \doparseargdef \csname\string#1\endcsname #1%
+}
+\def\doparseargdef#1#2{%
+  \def#2{\parsearg#1}%
+  \def#1##1%
+}
+
+% Several utility definitions with active space:
+{
+  \obeyspaces
+  \gdef\obeyedspace{ }
+
+  % Make each space character in the input produce a normal interword
+  % space in the output.  Don't allow a line break at this space, as this
+  % is used only in environments like @example, where each line of input
+  % should produce a line of output anyway.
+  %
+  \gdef\sepspaces{\obeyspaces\let =\tie}
+
+  % If an index command is used in an @example environment, any spaces
+  % therein should become regular spaces in the raw index file, not the
+  % expansion of \tie (\leavevmode \penalty \@M \ ).
+  \gdef\unsepspaces{\let =\space}
+}
+
+
+\def\flushcr{\ifx\par\lisppar \def\next##1{}\else \let\next=\relax \fi \next}
+
+% Define the framework for environments in texinfo.tex.  It's used like this:
+%
+%   \envdef\foo{...}
+%   \def\Efoo{...}
+%
+% It's the responsibility of \envdef to insert \begingroup before the
+% actual body; @end closes the group after calling \Efoo.  \envdef also
+% defines \thisenv, so the current environment is known; @end checks
+% whether the environment name matches.  The \checkenv macro can also be
+% used to check whether the current environment is the one expected.
+%
+% Non-false conditionals (@iftex, @ifset) don't fit into this, so they
+% are not treated as enviroments; they don't open a group.  (The
+% implementation of @end takes care not to call \endgroup in this
+% special case.)
+
+
+% At runtime, environments start with this:
+\def\startenvironment#1{\begingroup\def\thisenv{#1}}
+% initialize
+\let\thisenv\empty
+
+% ... but they get defined via ``\envdef\foo{...}'':
+\long\def\envdef#1#2{\def#1{\startenvironment#1#2}}
+\def\envparseargdef#1#2{\parseargdef#1{\startenvironment#1#2}}
+
+% Check whether we're in the right environment:
+\def\checkenv#1{%
+  \def\temp{#1}%
+  \ifx\thisenv\temp
+  \else
+    \badenverr
+  \fi
+}
+
+% Evironment mismatch, #1 expected:
+\def\badenverr{%
+  \errhelp = \EMsimple
+  \errmessage{This command can appear only \inenvironment\temp,
+    not \inenvironment\thisenv}%
+}
+\def\inenvironment#1{%
+  \ifx#1\empty
+    out of any environment%
+  \else
+    in environment \expandafter\string#1%
+  \fi
+}
+
+% @end foo executes the definition of \Efoo.
+% But first, it executes a specialized version of \checkenv
+%
+\parseargdef\end{%
+  \if 1\csname iscond.#1\endcsname
+  \else
+    % The general wording of \badenverr may not be ideal, but... --kasal, 06nov03
+    \expandafter\checkenv\csname#1\endcsname
+    \csname E#1\endcsname
+    \endgroup
+  \fi
+}
+
+\newhelp\EMsimple{Press RETURN to continue.}
+
+
+%% Simple single-character @ commands
+
+% @@ prints an @
+% Kludge this until the fonts are right (grr).
+\def\@{{\tt\char64}}
+
+% This is turned off because it was never documented
+% and you can use @w{...} around a quote to suppress ligatures.
+%% Define @` and @' to be the same as ` and '
+%% but suppressing ligatures.
+%\def\`{{`}}
+%\def\'{{'}}
+
+% Used to generate quoted braces.
+\def\mylbrace {{\tt\char123}}
+\def\myrbrace {{\tt\char125}}
+\let\{=\mylbrace
+\let\}=\myrbrace
+\begingroup
+  % Definitions to produce \{ and \} commands for indices,
+  % and @{ and @} for the aux/toc files.
+  \catcode`\{ = \other \catcode`\} = \other
+  \catcode`\[ = 1 \catcode`\] = 2
+  \catcode`\! = 0 \catcode`\\ = \other
+  !gdef!lbracecmd[\{]%
+  !gdef!rbracecmd[\}]%
+  !gdef!lbraceatcmd[@{]%
+  !gdef!rbraceatcmd[@}]%
+!endgroup
+
+% @comma{} to avoid , parsing problems.
+\let\comma = ,
+
+% Accents: @, @dotaccent @ringaccent @ubaraccent @udotaccent
+% Others are defined by plain TeX: @` @' @" @^ @~ @= @u @v @H.
+\let\, = \c
+\let\dotaccent = \.
+\def\ringaccent#1{{\accent23 #1}}
+\let\tieaccent = \t
+\let\ubaraccent = \b
+\let\udotaccent = \d
+
+% Other special characters: @questiondown @exclamdown @ordf @ordm
+% Plain TeX defines: @AA @AE @O @OE @L (plus lowercase versions) @ss.
+\def\questiondown{?`}
+\def\exclamdown{!`}
+\def\ordf{\leavevmode\raise1ex\hbox{\selectfonts\lllsize \underbar{a}}}
+\def\ordm{\leavevmode\raise1ex\hbox{\selectfonts\lllsize \underbar{o}}}
+
+% Dotless i and dotless j, used for accents.
+\def\imacro{i}
+\def\jmacro{j}
+\def\dotless#1{%
+  \def\temp{#1}%
+  \ifx\temp\imacro \ptexi
+  \else\ifx\temp\jmacro \j
+  \else \errmessage{@dotless can be used only with i or j}%
+  \fi\fi
+}
+
+% The \TeX{} logo, as in plain, but resetting the spacing so that a
+% period following counts as ending a sentence.  (Idea found in latex.)
+%
+\edef\TeX{\TeX \spacefactor=1000 }
+
+% @LaTeX{} logo.  Not quite the same results as the definition in
+% latex.ltx, since we use a different font for the raised A; it's most
+% convenient for us to use an explicitly smaller font, rather than using
+% the \scriptstyle font (since we don't reset \scriptstyle and
+% \scriptscriptstyle).
+%
+\def\LaTeX{%
+  L\kern-.36em
+  {\setbox0=\hbox{T}%
+   \vbox to \ht0{\hbox{\selectfonts\lllsize A}\vss}}%
+  \kern-.15em
+  \TeX
+}
+
+% Be sure we're in horizontal mode when doing a tie, since we make space
+% equivalent to this in @example-like environments. Otherwise, a space
+% at the beginning of a line will start with \penalty -- and
+% since \penalty is valid in vertical mode, we'd end up putting the
+% penalty on the vertical list instead of in the new paragraph.
+{\catcode`@ = 11
+ % Avoid using \@M directly, because that causes trouble
+ % if the definition is written into an index file.
+ \global\let\tiepenalty = \@M
+ \gdef\tie{\leavevmode\penalty\tiepenalty\ }
+}
+
+% @: forces normal size whitespace following.
+\def\:{\spacefactor=1000 }
+
+% @* forces a line break.
+\def\*{\hfil\break\hbox{}\ignorespaces}
+
+% @/ allows a line break.
+\let\/=\allowbreak
+
+% @. is an end-of-sentence period.
+\def\.{.\spacefactor=\endofsentencespacefactor\space}
+
+% @! is an end-of-sentence bang.
+\def\!{!\spacefactor=\endofsentencespacefactor\space}
+
+% @? is an end-of-sentence query.
+\def\?{?\spacefactor=\endofsentencespacefactor\space}
+
+% @frenchspacing on|off  says whether to put extra space after punctuation.
+% 
+\def\onword{on}
+\def\offword{off}
+%
+\parseargdef\frenchspacing{%
+  \def\temp{#1}%
+  \ifx\temp\onword \plainfrenchspacing
+  \else\ifx\temp\offword \plainnonfrenchspacing
+  \else
+    \errhelp = \EMsimple
+    \errmessage{Unknown @frenchspacing option `\temp', must be on/off}%
+  \fi\fi
+}
+
+% @w prevents a word break.  Without the \leavevmode, @w at the
+% beginning of a paragraph, when TeX is still in vertical mode, would
+% produce a whole line of output instead of starting the paragraph.
+\def\w#1{\leavevmode\hbox{#1}}
+
+% @group ... @end group forces ... to be all on one page, by enclosing
+% it in a TeX vbox.  We use \vtop instead of \vbox to construct the box
+% to keep its height that of a normal line.  According to the rules for
+% \topskip (p.114 of the TeXbook), the glue inserted is
+% max (\topskip - \ht (first item), 0).  If that height is large,
+% therefore, no glue is inserted, and the space between the headline and
+% the text is small, which looks bad.
+%
+% Another complication is that the group might be very large.  This can
+% cause the glue on the previous page to be unduly stretched, because it
+% does not have much material.  In this case, it's better to add an
+% explicit \vfill so that the extra space is at the bottom.  The
+% threshold for doing this is if the group is more than \vfilllimit
+% percent of a page (\vfilllimit can be changed inside of @tex).
+%
+\newbox\groupbox
+\def\vfilllimit{0.7}
+%
+\envdef\group{%
+  \ifnum\catcode`\^^M=\active \else
+    \errhelp = \groupinvalidhelp
+    \errmessage{@group invalid in context where filling is enabled}%
+  \fi
+  \startsavinginserts
+  %
+  \setbox\groupbox = \vtop\bgroup
+    % Do @comment since we are called inside an environment such as
+    % @example, where each end-of-line in the input causes an
+    % end-of-line in the output.  We don't want the end-of-line after
+    % the `@group' to put extra space in the output.  Since @group
+    % should appear on a line by itself (according to the Texinfo
+    % manual), we don't worry about eating any user text.
+    \comment
+}
+%
+% The \vtop produces a box with normal height and large depth; thus, TeX puts
+% \baselineskip glue before it, and (when the next line of text is done)
+% \lineskip glue after it.  Thus, space below is not quite equal to space
+% above.  But it's pretty close.
+\def\Egroup{%
+    % To get correct interline space between the last line of the group
+    % and the first line afterwards, we have to propagate \prevdepth.
+    \endgraf % Not \par, as it may have been set to \lisppar.
+    \global\dimen1 = \prevdepth
+  \egroup           % End the \vtop.
+  % \dimen0 is the vertical size of the group's box.
+  \dimen0 = \ht\groupbox  \advance\dimen0 by \dp\groupbox
+  % \dimen2 is how much space is left on the page (more or less).
+  \dimen2 = \pageheight   \advance\dimen2 by -\pagetotal
+  % if the group doesn't fit on the current page, and it's a big big
+  % group, force a page break.
+  \ifdim \dimen0 > \dimen2
+    \ifdim \pagetotal < \vfilllimit\pageheight
+      \page
+    \fi
+  \fi
+  \box\groupbox
+  \prevdepth = \dimen1
+  \checkinserts
+}
+%
+% TeX puts in an \escapechar (i.e., `@') at the beginning of the help
+% message, so this ends up printing `@group can only ...'.
+%
+\newhelp\groupinvalidhelp{%
+group can only be used in environments such as @example,^^J%
+where each line of input produces a line of output.}
+
+% @need space-in-mils
+% forces a page break if there is not space-in-mils remaining.
+
+\newdimen\mil  \mil=0.001in
+
+% Old definition--didn't work.
+%\parseargdef\need{\par %
+%% This method tries to make TeX break the page naturally
+%% if the depth of the box does not fit.
+%{\baselineskip=0pt%
+%\vtop to #1\mil{\vfil}\kern -#1\mil\nobreak
+%\prevdepth=-1000pt
+%}}
+
+\parseargdef\need{%
+  % Ensure vertical mode, so we don't make a big box in the middle of a
+  % paragraph.
+  \par
+  %
+  % If the @need value is less than one line space, it's useless.
+  \dimen0 = #1\mil
+  \dimen2 = \ht\strutbox
+  \advance\dimen2 by \dp\strutbox
+  \ifdim\dimen0 > \dimen2
+    %
+    % Do a \strut just to make the height of this box be normal, so the
+    % normal leading is inserted relative to the preceding line.
+    % And a page break here is fine.
+    \vtop to #1\mil{\strut\vfil}%
+    %
+    % TeX does not even consider page breaks if a penalty added to the
+    % main vertical list is 10000 or more.  But in order to see if the
+    % empty box we just added fits on the page, we must make it consider
+    % page breaks.  On the other hand, we don't want to actually break the
+    % page after the empty box.  So we use a penalty of 9999.
+    %
+    % There is an extremely small chance that TeX will actually break the
+    % page at this \penalty, if there are no other feasible breakpoints in
+    % sight.  (If the user is using lots of big @group commands, which
+    % almost-but-not-quite fill up a page, TeX will have a hard time doing
+    % good page breaking, for example.)  However, I could not construct an
+    % example where a page broke at this \penalty; if it happens in a real
+    % document, then we can reconsider our strategy.
+    \penalty9999
+    %
+    % Back up by the size of the box, whether we did a page break or not.
+    \kern -#1\mil
+    %
+    % Do not allow a page break right after this kern.
+    \nobreak
+  \fi
+}
+
+% @br   forces paragraph break (and is undocumented).
+
+\let\br = \par
+
+% @page forces the start of a new page.
+%
+\def\page{\par\vfill\supereject}
+
+% @exdent text....
+% outputs text on separate line in roman font, starting at standard page margin
+
+% This records the amount of indent in the innermost environment.
+% That's how much \exdent should take out.
+\newskip\exdentamount
+
+% This defn is used inside fill environments such as @defun.
+\parseargdef\exdent{\hfil\break\hbox{\kern -\exdentamount{\rm#1}}\hfil\break}
+
+% This defn is used inside nofill environments such as @example.
+\parseargdef\nofillexdent{{\advance \leftskip by -\exdentamount
+  \leftline{\hskip\leftskip{\rm#1}}}}
+
+% @inmargin{WHICH}{TEXT} puts TEXT in the WHICH margin next to the current
+% paragraph.  For more general purposes, use the \margin insertion
+% class.  WHICH is `l' or `r'.
+%
+\newskip\inmarginspacing \inmarginspacing=1cm
+\def\strutdepth{\dp\strutbox}
+%
+\def\doinmargin#1#2{\strut\vadjust{%
+  \nobreak
+  \kern-\strutdepth
+  \vtop to \strutdepth{%
+    \baselineskip=\strutdepth
+    \vss
+    % if you have multiple lines of stuff to put here, you'll need to
+    % make the vbox yourself of the appropriate size.
+    \ifx#1l%
+      \llap{\ignorespaces #2\hskip\inmarginspacing}%
+    \else
+      \rlap{\hskip\hsize \hskip\inmarginspacing \ignorespaces #2}%
+    \fi
+    \null
+  }%
+}}
+\def\inleftmargin{\doinmargin l}
+\def\inrightmargin{\doinmargin r}
+%
+% @inmargin{TEXT [, RIGHT-TEXT]}
+% (if RIGHT-TEXT is given, use TEXT for left page, RIGHT-TEXT for right;
+% else use TEXT for both).
+%
+\def\inmargin#1{\parseinmargin #1,,\finish}
+\def\parseinmargin#1,#2,#3\finish{% not perfect, but better than nothing.
+  \setbox0 = \hbox{\ignorespaces #2}%
+  \ifdim\wd0 > 0pt
+    \def\lefttext{#1}%  have both texts
+    \def\righttext{#2}%
+  \else
+    \def\lefttext{#1}%  have only one text
+    \def\righttext{#1}%
+  \fi
+  %
+  \ifodd\pageno
+    \def\temp{\inrightmargin\righttext}% odd page -> outside is right margin
+  \else
+    \def\temp{\inleftmargin\lefttext}%
+  \fi
+  \temp
+}
+
+% @include FILE -- \input text of FILE.
+%
+\def\include{\parseargusing\filenamecatcodes\includezzz}
+\def\includezzz#1{%
+  \pushthisfilestack
+  \def\thisfile{#1}%
+  {%
+    \makevalueexpandable  % we want to expand any @value in FILE.  
+    \turnoffactive        % and allow special characters in the expansion
+    \edef\temp{\noexpand\input #1 }%
+    %
+    % This trickery is to read FILE outside of a group, in case it makes
+    % definitions, etc.
+    \expandafter
+  }\temp
+  \popthisfilestack
+}
+\def\filenamecatcodes{%
+  \catcode`\\=\other
+  \catcode`~=\other
+  \catcode`^=\other
+  \catcode`_=\other
+  \catcode`|=\other
+  \catcode`<=\other
+  \catcode`>=\other
+  \catcode`+=\other
+  \catcode`-=\other
+}
+
+\def\pushthisfilestack{%
+  \expandafter\pushthisfilestackX\popthisfilestack\StackTerm
+}
+\def\pushthisfilestackX{%
+  \expandafter\pushthisfilestackY\thisfile\StackTerm
+}
+\def\pushthisfilestackY #1\StackTerm #2\StackTerm {%
+  \gdef\popthisfilestack{\gdef\thisfile{#1}\gdef\popthisfilestack{#2}}%
+}
+
+\def\popthisfilestack{\errthisfilestackempty}
+\def\errthisfilestackempty{\errmessage{Internal error:
+  the stack of filenames is empty.}}
+
+\def\thisfile{}
+
+% @center line
+% outputs that line, centered.
+%
+\parseargdef\center{%
+  \ifhmode
+    \let\next\centerH
+  \else
+    \let\next\centerV
+  \fi
+  \next{\hfil \ignorespaces#1\unskip \hfil}%
+}
+\def\centerH#1{%
+  {%
+    \hfil\break
+    \advance\hsize by -\leftskip
+    \advance\hsize by -\rightskip
+    \line{#1}%
+    \break
+  }%
+}
+\def\centerV#1{\line{\kern\leftskip #1\kern\rightskip}}
+
+% @sp n   outputs n lines of vertical space
+
+\parseargdef\sp{\vskip #1\baselineskip}
+
+% @comment ...line which is ignored...
+% @c is the same as @comment
+% @ignore ... @end ignore  is another way to write a comment
+
+\def\comment{\begingroup \catcode`\^^M=\other%
+\catcode`\@=\other \catcode`\{=\other \catcode`\}=\other%
+\commentxxx}
+{\catcode`\^^M=\other \gdef\commentxxx#1^^M{\endgroup}}
+
+\let\c=\comment
+
+% @paragraphindent NCHARS
+% We'll use ems for NCHARS, close enough.
+% NCHARS can also be the word `asis' or `none'.
+% We cannot feasibly implement @paragraphindent asis, though.
+%
+\def\asisword{asis} % no translation, these are keywords
+\def\noneword{none}
+%
+\parseargdef\paragraphindent{%
+  \def\temp{#1}%
+  \ifx\temp\asisword
+  \else
+    \ifx\temp\noneword
+      \defaultparindent = 0pt
+    \else
+      \defaultparindent = #1em
+    \fi
+  \fi
+  \parindent = \defaultparindent
+}
+
+% @exampleindent NCHARS
+% We'll use ems for NCHARS like @paragraphindent.
+% It seems @exampleindent asis isn't necessary, but
+% I preserve it to make it similar to @paragraphindent.
+\parseargdef\exampleindent{%
+  \def\temp{#1}%
+  \ifx\temp\asisword
+  \else
+    \ifx\temp\noneword
+      \lispnarrowing = 0pt
+    \else
+      \lispnarrowing = #1em
+    \fi
+  \fi
+}
+
+% @firstparagraphindent WORD
+% If WORD is `none', then suppress indentation of the first paragraph
+% after a section heading.  If WORD is `insert', then do indent at such
+% paragraphs.
+%
+% The paragraph indentation is suppressed or not by calling
+% \suppressfirstparagraphindent, which the sectioning commands do.
+% We switch the definition of this back and forth according to WORD.
+% By default, we suppress indentation.
+%
+\def\suppressfirstparagraphindent{\dosuppressfirstparagraphindent}
+\def\insertword{insert}
+%
+\parseargdef\firstparagraphindent{%
+  \def\temp{#1}%
+  \ifx\temp\noneword
+    \let\suppressfirstparagraphindent = \dosuppressfirstparagraphindent
+  \else\ifx\temp\insertword
+    \let\suppressfirstparagraphindent = \relax
+  \else
+    \errhelp = \EMsimple
+    \errmessage{Unknown @firstparagraphindent option `\temp'}%
+  \fi\fi
+}
+
+% Here is how we actually suppress indentation.  Redefine \everypar to
+% \kern backwards by \parindent, and then reset itself to empty.
+%
+% We also make \indent itself not actually do anything until the next
+% paragraph.
+%
+\gdef\dosuppressfirstparagraphindent{%
+  \gdef\indent{%
+    \restorefirstparagraphindent
+    \indent
+  }%
+  \gdef\noindent{%
+    \restorefirstparagraphindent
+    \noindent
+  }%
+  \global\everypar = {%
+    \kern -\parindent
+    \restorefirstparagraphindent
+  }%
+}
+
+\gdef\restorefirstparagraphindent{%
+  \global \let \indent = \ptexindent
+  \global \let \noindent = \ptexnoindent
+  \global \everypar = {}%
+}
+
+
+% @asis just yields its argument.  Used with @table, for example.
+%
+\def\asis#1{#1}
+
+% @math outputs its argument in math mode.
+%
+% One complication: _ usually means subscripts, but it could also mean
+% an actual _ character, as in @math{@var{some_variable} + 1}.  So make
+% _ active, and distinguish by seeing if the current family is \slfam,
+% which is what @var uses.
+{
+  \catcode`\_ = \active
+  \gdef\mathunderscore{%
+    \catcode`\_=\active
+    \def_{\ifnum\fam=\slfam \_\else\sb\fi}%
+  }
+}
+% Another complication: we want \\ (and @\) to output a \ character.
+% FYI, plain.tex uses \\ as a temporary control sequence (why?), but
+% this is not advertised and we don't care.  Texinfo does not
+% otherwise define @\.
+%
+% The \mathchar is class=0=ordinary, family=7=ttfam, position=5C=\.
+\def\mathbackslash{\ifnum\fam=\ttfam \mathchar"075C \else\backslash \fi}
+%
+\def\math{%
+  \tex
+  \mathunderscore
+  \let\\ = \mathbackslash
+  \mathactive
+  $\finishmath
+}
+\def\finishmath#1{#1$\endgroup}  % Close the group opened by \tex.
+
+% Some active characters (such as <) are spaced differently in math.
+% We have to reset their definitions in case the @math was an argument
+% to a command which sets the catcodes (such as @item or @section).
+%
+{
+  \catcode`^ = \active
+  \catcode`< = \active
+  \catcode`> = \active
+  \catcode`+ = \active
+  \gdef\mathactive{%
+    \let^ = \ptexhat
+    \let< = \ptexless
+    \let> = \ptexgtr
+    \let+ = \ptexplus
+  }
+}
+
+% @bullet and @minus need the same treatment as @math, just above.
+\def\bullet{$\ptexbullet$}
+\def\minus{$-$}
+
+% @dots{} outputs an ellipsis using the current font.
+% We do .5em per period so that it has the same spacing in the cm
+% typewriter fonts as three actual period characters; on the other hand,
+% in other typewriter fonts three periods are wider than 1.5em.  So do
+% whichever is larger.
+%
+\def\dots{%
+  \leavevmode
+  \setbox0=\hbox{...}% get width of three periods
+  \ifdim\wd0 > 1.5em
+    \dimen0 = \wd0
+  \else
+    \dimen0 = 1.5em
+  \fi
+  \hbox to \dimen0{%
+    \hskip 0pt plus.25fil
+    .\hskip 0pt plus1fil
+    .\hskip 0pt plus1fil
+    .\hskip 0pt plus.5fil
+  }%
+}
+
+% @enddots{} is an end-of-sentence ellipsis.
+%
+\def\enddots{%
+  \dots
+  \spacefactor=\endofsentencespacefactor
+}
+
+% @comma{} is so commas can be inserted into text without messing up
+% Texinfo's parsing.
+%
+\let\comma = ,
+
+% @refill is a no-op.
+\let\refill=\relax
+
+% If working on a large document in chapters, it is convenient to
+% be able to disable indexing, cross-referencing, and contents, for test runs.
+% This is done with @novalidate (before @setfilename).
+%
+\newif\iflinks \linkstrue % by default we want the aux files.
+\let\novalidate = \linksfalse
+
+% @setfilename is done at the beginning of every texinfo file.
+% So open here the files we need to have open while reading the input.
+% This makes it possible to make a .fmt file for texinfo.
+\def\setfilename{%
+   \fixbackslash  % Turn off hack to swallow `\input texinfo'.
+   \iflinks
+     \tryauxfile
+     % Open the new aux file.  TeX will close it automatically at exit.
+     \immediate\openout\auxfile=\jobname.aux
+   \fi % \openindices needs to do some work in any case.
+   \openindices
+   \let\setfilename=\comment % Ignore extra @setfilename cmds.
+   %
+   % If texinfo.cnf is present on the system, read it.
+   % Useful for site-wide @afourpaper, etc.
+   \openin 1 texinfo.cnf
+   \ifeof 1 \else \input texinfo.cnf \fi
+   \closein 1
+   %
+   \comment % Ignore the actual filename.
+}
+
+% Called from \setfilename.
+%
+\def\openindices{%
+  \newindex{cp}%
+  \newcodeindex{fn}%
+  \newcodeindex{vr}%
+  \newcodeindex{tp}%
+  \newcodeindex{ky}%
+  \newcodeindex{pg}%
+}
+
+% @bye.
+\outer\def\bye{\pagealignmacro\tracingstats=1\ptexend}
+
+
+\message{pdf,}
+% adobe `portable' document format
+\newcount\tempnum
+\newcount\lnkcount
+\newtoks\filename
+\newcount\filenamelength
+\newcount\pgn
+\newtoks\toksA
+\newtoks\toksB
+\newtoks\toksC
+\newtoks\toksD
+\newbox\boxA
+\newcount\countA
+\newif\ifpdf
+\newif\ifpdfmakepagedest
+
+% when pdftex is run in dvi mode, \pdfoutput is defined (so \pdfoutput=1
+% can be set).  So we test for \relax and 0 as well as \undefined,
+% borrowed from ifpdf.sty.
+\ifx\pdfoutput\undefined
+\else
+  \ifx\pdfoutput\relax
+  \else
+    \ifcase\pdfoutput
+    \else
+      \pdftrue
+    \fi
+  \fi
+\fi
+
+% PDF uses PostScript string constants for the names of xref targets,
+% for display in the outlines, and in other places.  Thus, we have to
+% double any backslashes.  Otherwise, a name like "\node" will be
+% interpreted as a newline (\n), followed by o, d, e.  Not good.
+% http://www.ntg.nl/pipermail/ntg-pdftex/2004-July/000654.html
+% (and related messages, the final outcome is that it is up to the TeX
+% user to double the backslashes and otherwise make the string valid, so
+% that's what we do).
+
+% double active backslashes.
+% 
+{\catcode`\@=0 \catcode`\\=\active
+ @gdef@activebackslashdouble{%
+   @catcode`@\=@active
+   @let\=@doublebackslash}
+}
+
+% To handle parens, we must adopt a different approach, since parens are
+% not active characters.  hyperref.dtx (which has the same problem as
+% us) handles it with this amazing macro to replace tokens, with minor
+% changes for Texinfo.  It is included here under the GPL by permission
+% from the author, Heiko Oberdiek.
+% 
+% #1 is the tokens to replace.
+% #2 is the replacement.
+% #3 is the control sequence with the string.
+% 
+\def\HyPsdSubst#1#2#3{%
+  \def\HyPsdReplace##1#1##2\END{%
+    ##1%
+    \ifx\\##2\\%
+    \else
+      #2%
+      \HyReturnAfterFi{%
+        \HyPsdReplace##2\END
+      }%
+    \fi
+  }%
+  \xdef#3{\expandafter\HyPsdReplace#3#1\END}%
+}
+\long\def\HyReturnAfterFi#1\fi{\fi#1}
+
+% #1 is a control sequence in which to do the replacements.
+\def\backslashparens#1{%
+  \xdef#1{#1}% redefine it as its expansion; the definition is simply
+             % \lastnode when called from \setref -> \pdfmkdest.
+  \HyPsdSubst{(}{\realbackslash(}{#1}%
+  \HyPsdSubst{)}{\realbackslash)}{#1}%
+}
+
+\newhelp\nopdfimagehelp{Texinfo supports .png, .jpg, .jpeg, and .pdf images
+with PDF output, and none of those formats could be found.  (.eps cannot
+be supported due to the design of the PDF format; use regular TeX (DVI
+output) for that.)}
+
+\ifpdf
+  %
+  % Color manipulation macros based on pdfcolor.tex.
+  \def\cmykDarkRed{0.28 1 1 0.35}
+  \def\cmykBlack{0 0 0 1}
+  %
+  \def\pdfsetcolor#1{\pdfliteral{#1 k}}
+  % Set color, and create a mark which defines \thiscolor accordingly,
+  % so that \makeheadline knows which color to restore.
+  \def\setcolor#1{%
+    \xdef\lastcolordefs{\gdef\noexpand\thiscolor{#1}}%
+    \domark
+    \pdfsetcolor{#1}%
+  }
+  %
+  \def\maincolor{\cmykBlack}
+  \pdfsetcolor{\maincolor}
+  \edef\thiscolor{\maincolor}
+  \def\lastcolordefs{}
+  %
+  \def\makefootline{%
+    \baselineskip24pt
+    \line{\pdfsetcolor{\maincolor}\the\footline}%
+  }
+  %
+  \def\makeheadline{%
+    \vbox to 0pt{%
+      \vskip-22.5pt
+      \line{%
+        \vbox to8.5pt{}%
+        % Extract \thiscolor definition from the marks.
+        \getcolormarks
+        % Typeset the headline with \maincolor, then restore the color.
+        \pdfsetcolor{\maincolor}\the\headline\pdfsetcolor{\thiscolor}%
+      }%
+      \vss
+    }%
+    \nointerlineskip
+  }
+  %
+  %
+  \pdfcatalog{/PageMode /UseOutlines}
+  %
+  % #1 is image name, #2 width (might be empty/whitespace), #3 height (ditto).
+  \def\dopdfimage#1#2#3{%
+    \def\imagewidth{#2}\setbox0 = \hbox{\ignorespaces #2}%
+    \def\imageheight{#3}\setbox2 = \hbox{\ignorespaces #3}%
+    %
+    % pdftex (and the PDF format) support .png, .jpg, .pdf (among
+    % others).  Let's try in that order.
+    \let\pdfimgext=\empty
+    \begingroup
+      \openin 1 #1.png \ifeof 1
+        \openin 1 #1.jpg \ifeof 1
+          \openin 1 #1.jpeg \ifeof 1
+            \openin 1 #1.JPG \ifeof 1
+              \openin 1 #1.pdf \ifeof 1
+                \errhelp = \nopdfimagehelp
+                \errmessage{Could not find image file #1 for pdf}%
+              \else \gdef\pdfimgext{pdf}%
+              \fi
+            \else \gdef\pdfimgext{JPG}%
+            \fi
+          \else \gdef\pdfimgext{jpeg}%
+          \fi
+        \else \gdef\pdfimgext{jpg}%
+        \fi
+      \else \gdef\pdfimgext{png}%
+      \fi
+      \closein 1
+    \endgroup
+    %
+    % without \immediate, pdftex seg faults when the same image is
+    % included twice.  (Version 3.14159-pre-1.0-unofficial-20010704.)
+    \ifnum\pdftexversion < 14
+      \immediate\pdfimage
+    \else
+      \immediate\pdfximage
+    \fi
+      \ifdim \wd0 >0pt width \imagewidth \fi
+      \ifdim \wd2 >0pt height \imageheight \fi
+      \ifnum\pdftexversion<13
+         #1.\pdfimgext
+       \else
+         {#1.\pdfimgext}%
+       \fi
+    \ifnum\pdftexversion < 14 \else
+      \pdfrefximage \pdflastximage
+    \fi}
+  %
+  \def\pdfmkdest#1{{%
+    % We have to set dummies so commands such as @code, and characters
+    % such as \, aren't expanded when present in a section title.
+    \indexnofonts
+    \turnoffactive
+    \activebackslashdouble
+    \makevalueexpandable
+    \def\pdfdestname{#1}%
+    \backslashparens\pdfdestname
+    \safewhatsit{\pdfdest name{\pdfdestname} xyz}%
+  }}
+  %
+  % used to mark target names; must be expandable.
+  \def\pdfmkpgn#1{#1}
+  %
+  % by default, use a color that is dark enough to print on paper as
+  % nearly black, but still distinguishable for online viewing.
+  \def\urlcolor{\cmykDarkRed}
+  \def\linkcolor{\cmykDarkRed}
+  \def\endlink{\setcolor{\maincolor}\pdfendlink}
+  %
+  % Adding outlines to PDF; macros for calculating structure of outlines
+  % come from Petr Olsak
+  \def\expnumber#1{\expandafter\ifx\csname#1\endcsname\relax 0%
+    \else \csname#1\endcsname \fi}
+  \def\advancenumber#1{\tempnum=\expnumber{#1}\relax
+    \advance\tempnum by 1
+    \expandafter\xdef\csname#1\endcsname{\the\tempnum}}
+  %
+  % #1 is the section text, which is what will be displayed in the
+  % outline by the pdf viewer.  #2 is the pdf expression for the number
+  % of subentries (or empty, for subsubsections).  #3 is the node text,
+  % which might be empty if this toc entry had no corresponding node.
+  % #4 is the page number
+  %
+  \def\dopdfoutline#1#2#3#4{%
+    % Generate a link to the node text if that exists; else, use the
+    % page number.  We could generate a destination for the section
+    % text in the case where a section has no node, but it doesn't
+    % seem worth the trouble, since most documents are normally structured.
+    \def\pdfoutlinedest{#3}%
+    \ifx\pdfoutlinedest\empty
+      \def\pdfoutlinedest{#4}%
+    \else
+      % Doubled backslashes in the name.
+      {\activebackslashdouble \xdef\pdfoutlinedest{#3}%
+       \backslashparens\pdfoutlinedest}%
+    \fi
+    %
+    % Also double the backslashes in the display string.
+    {\activebackslashdouble \xdef\pdfoutlinetext{#1}%
+     \backslashparens\pdfoutlinetext}%
+    %
+    \pdfoutline goto name{\pdfmkpgn{\pdfoutlinedest}}#2{\pdfoutlinetext}%
+  }
+  %
+  \def\pdfmakeoutlines{%
+    \begingroup
+      % Thanh's hack / proper braces in bookmarks
+      \edef\mylbrace{\iftrue \string{\else}\fi}\let\{=\mylbrace
+      \edef\myrbrace{\iffalse{\else\string}\fi}\let\}=\myrbrace
+      %
+      % Read toc silently, to get counts of subentries for \pdfoutline.
+      \def\numchapentry##1##2##3##4{%
+	\def\thischapnum{##2}%
+	\def\thissecnum{0}%
+	\def\thissubsecnum{0}%
+      }%
+      \def\numsecentry##1##2##3##4{%
+	\advancenumber{chap\thischapnum}%
+	\def\thissecnum{##2}%
+	\def\thissubsecnum{0}%
+      }%
+      \def\numsubsecentry##1##2##3##4{%
+	\advancenumber{sec\thissecnum}%
+	\def\thissubsecnum{##2}%
+      }%
+      \def\numsubsubsecentry##1##2##3##4{%
+	\advancenumber{subsec\thissubsecnum}%
+      }%
+      \def\thischapnum{0}%
+      \def\thissecnum{0}%
+      \def\thissubsecnum{0}%
+      %
+      % use \def rather than \let here because we redefine \chapentry et
+      % al. a second time, below.
+      \def\appentry{\numchapentry}%
+      \def\appsecentry{\numsecentry}%
+      \def\appsubsecentry{\numsubsecentry}%
+      \def\appsubsubsecentry{\numsubsubsecentry}%
+      \def\unnchapentry{\numchapentry}%
+      \def\unnsecentry{\numsecentry}%
+      \def\unnsubsecentry{\numsubsecentry}%
+      \def\unnsubsubsecentry{\numsubsubsecentry}%
+      \readdatafile{toc}%
+      %
+      % Read toc second time, this time actually producing the outlines.
+      % The `-' means take the \expnumber as the absolute number of
+      % subentries, which we calculated on our first read of the .toc above.
+      %
+      % We use the node names as the destinations.
+      \def\numchapentry##1##2##3##4{%
+        \dopdfoutline{##1}{count-\expnumber{chap##2}}{##3}{##4}}%
+      \def\numsecentry##1##2##3##4{%
+        \dopdfoutline{##1}{count-\expnumber{sec##2}}{##3}{##4}}%
+      \def\numsubsecentry##1##2##3##4{%
+        \dopdfoutline{##1}{count-\expnumber{subsec##2}}{##3}{##4}}%
+      \def\numsubsubsecentry##1##2##3##4{% count is always zero
+        \dopdfoutline{##1}{}{##3}{##4}}%
+      %
+      % PDF outlines are displayed using system fonts, instead of
+      % document fonts.  Therefore we cannot use special characters,
+      % since the encoding is unknown.  For example, the eogonek from
+      % Latin 2 (0xea) gets translated to a | character.  Info from
+      % Staszek Wawrykiewicz, 19 Jan 2004 04:09:24 +0100.
+      %
+      % xx to do this right, we have to translate 8-bit characters to
+      % their "best" equivalent, based on the @documentencoding.  Right
+      % now, I guess we'll just let the pdf reader have its way.
+      \indexnofonts
+      \setupdatafile
+      \catcode`\\=\active \otherbackslash
+      \input \tocreadfilename
+    \endgroup
+  }
+  %
+  \def\skipspaces#1{\def\PP{#1}\def\D{|}%
+    \ifx\PP\D\let\nextsp\relax
+    \else\let\nextsp\skipspaces
+      \ifx\p\space\else\addtokens{\filename}{\PP}%
+        \advance\filenamelength by 1
+      \fi
+    \fi
+    \nextsp}
+  \def\getfilename#1{\filenamelength=0\expandafter\skipspaces#1|\relax}
+  \ifnum\pdftexversion < 14
+    \let \startlink \pdfannotlink
+  \else
+    \let \startlink \pdfstartlink
+  \fi
+  % make a live url in pdf output.
+  \def\pdfurl#1{%
+    \begingroup
+      % it seems we really need yet another set of dummies; have not
+      % tried to figure out what each command should do in the context
+      % of @url.  for now, just make @/ a no-op, that's the only one
+      % people have actually reported a problem with.
+      % 
+      \normalturnoffactive
+      \def\@{@}%
+      \let\/=\empty
+      \makevalueexpandable
+      \leavevmode\setcolor{\urlcolor}%
+      \startlink attr{/Border [0 0 0]}%
+        user{/Subtype /Link /A << /S /URI /URI (#1) >>}%
+    \endgroup}
+  \def\pdfgettoks#1.{\setbox\boxA=\hbox{\toksA={#1.}\toksB={}\maketoks}}
+  \def\addtokens#1#2{\edef\addtoks{\noexpand#1={\the#1#2}}\addtoks}
+  \def\adn#1{\addtokens{\toksC}{#1}\global\countA=1\let\next=\maketoks}
+  \def\poptoks#1#2|ENDTOKS|{\let\first=#1\toksD={#1}\toksA={#2}}
+  \def\maketoks{%
+    \expandafter\poptoks\the\toksA|ENDTOKS|\relax
+    \ifx\first0\adn0
+    \else\ifx\first1\adn1 \else\ifx\first2\adn2 \else\ifx\first3\adn3
+    \else\ifx\first4\adn4 \else\ifx\first5\adn5 \else\ifx\first6\adn6
+    \else\ifx\first7\adn7 \else\ifx\first8\adn8 \else\ifx\first9\adn9
+    \else
+      \ifnum0=\countA\else\makelink\fi
+      \ifx\first.\let\next=\done\else
+        \let\next=\maketoks
+        \addtokens{\toksB}{\the\toksD}
+        \ifx\first,\addtokens{\toksB}{\space}\fi
+      \fi
+    \fi\fi\fi\fi\fi\fi\fi\fi\fi\fi
+    \next}
+  \def\makelink{\addtokens{\toksB}%
+    {\noexpand\pdflink{\the\toksC}}\toksC={}\global\countA=0}
+  \def\pdflink#1{%
+    \startlink attr{/Border [0 0 0]} goto name{\pdfmkpgn{#1}}
+    \setcolor{\linkcolor}#1\endlink}
+  \def\done{\edef\st{\global\noexpand\toksA={\the\toksB}}\st}
+\else
+  \let\pdfmkdest = \gobble
+  \let\pdfurl = \gobble
+  \let\endlink = \relax
+  \let\setcolor = \gobble
+  \let\pdfsetcolor = \gobble
+  \let\pdfmakeoutlines = \relax
+\fi  % \ifx\pdfoutput
+
+
+\message{fonts,}
+
+% Change the current font style to #1, remembering it in \curfontstyle.
+% For now, we do not accumulate font styles: @b{@i{foo}} prints foo in
+% italics, not bold italics.
+%
+\def\setfontstyle#1{%
+  \def\curfontstyle{#1}% not as a control sequence, because we are \edef'd.
+  \csname ten#1\endcsname  % change the current font
+}
+
+% Select #1 fonts with the current style.
+%
+\def\selectfonts#1{\csname #1fonts\endcsname \csname\curfontstyle\endcsname}
+
+\def\rm{\fam=0 \setfontstyle{rm}}
+\def\it{\fam=\itfam \setfontstyle{it}}
+\def\sl{\fam=\slfam \setfontstyle{sl}}
+\def\bf{\fam=\bffam \setfontstyle{bf}}\def\bfstylename{bf}
+\def\tt{\fam=\ttfam \setfontstyle{tt}}
+
+% Texinfo sort of supports the sans serif font style, which plain TeX does not.
+% So we set up a \sf.
+\newfam\sffam
+\def\sf{\fam=\sffam \setfontstyle{sf}}
+\let\li = \sf % Sometimes we call it \li, not \sf.
+
+% We don't need math for this font style.
+\def\ttsl{\setfontstyle{ttsl}}
+
+
+% Default leading.
+\newdimen\textleading  \textleading = 13.2pt
+
+% Set the baselineskip to #1, and the lineskip and strut size
+% correspondingly.  There is no deep meaning behind these magic numbers
+% used as factors; they just match (closely enough) what Knuth defined.
+%
+\def\lineskipfactor{.08333}
+\def\strutheightpercent{.70833}
+\def\strutdepthpercent {.29167}
+%
+% can get a sort of poor man's double spacing by redefining this.
+\def\baselinefactor{1}
+%
+\def\setleading#1{%
+  \dimen0 = #1\relax
+  \normalbaselineskip = \baselinefactor\dimen0
+  \normallineskip = \lineskipfactor\normalbaselineskip
+  \normalbaselines
+  \setbox\strutbox =\hbox{%
+    \vrule width0pt height\strutheightpercent\baselineskip
+                    depth \strutdepthpercent \baselineskip
+  }%
+}
+
+% PDF CMaps.  See also LaTeX's t1.cmap.
+%
+% do nothing with this by default.
+\expandafter\let\csname cmapOT1\endcsname\gobble
+\expandafter\let\csname cmapOT1IT\endcsname\gobble
+\expandafter\let\csname cmapOT1TT\endcsname\gobble
+
+% if we are producing pdf, and we have \pdffontattr, then define cmaps.
+% (\pdffontattr was introduced many years ago, but people still run
+% older pdftex's; it's easy to conditionalize, so we do.)
+\ifpdf \ifx\pdffontattr\undefined \else
+  \begingroup
+    \catcode`\^^M=\active \def^^M{^^J}% Output line endings as the ^^J char.
+    \catcode`\%=12 \immediate\pdfobj stream {%!PS-Adobe-3.0 Resource-CMap
+%%DocumentNeededResources: ProcSet (CIDInit)
+%%IncludeResource: ProcSet (CIDInit)
+%%BeginResource: CMap (TeX-OT1-0)
+%%Title: (TeX-OT1-0 TeX OT1 0)
+%%Version: 1.000
+%%EndComments
+/CIDInit /ProcSet findresource begin
+12 dict begin
+begincmap
+/CIDSystemInfo
+<< /Registry (TeX)
+/Ordering (OT1)
+/Supplement 0
+>> def
+/CMapName /TeX-OT1-0 def
+/CMapType 2 def
+1 begincodespacerange
+<00> <7F>
+endcodespacerange
+8 beginbfrange
+<00> <01> <0393>
+<09> <0A> <03A8>
+<23> <26> <0023>
+<28> <3B> <0028>
+<3F> <5B> <003F>
+<5D> <5E> <005D>
+<61> <7A> <0061>
+<7B> <7C> <2013>
+endbfrange
+40 beginbfchar
+<02> <0398>
+<03> <039B>
+<04> <039E>
+<05> <03A0>
+<06> <03A3>
+<07> <03D2>
+<08> <03A6>
+<0B> <00660066>
+<0C> <00660069>
+<0D> <0066006C>
+<0E> <006600660069>
+<0F> <00660066006C>
+<10> <0131>
+<11> <0237>
+<12> <0060>
+<13> <00B4>
+<14> <02C7>
+<15> <02D8>
+<16> <00AF>
+<17> <02DA>
+<18> <00B8>
+<19> <00DF>
+<1A> <00E6>
+<1B> <0153>
+<1C> <00F8>
+<1D> <00C6>
+<1E> <0152>
+<1F> <00D8>
+<21> <0021>
+<22> <201D>
+<27> <2019>
+<3C> <00A1>
+<3D> <003D>
+<3E> <00BF>
+<5C> <201C>
+<5F> <02D9>
+<60> <2018>
+<7D> <02DD>
+<7E> <007E>
+<7F> <00A8>
+endbfchar
+endcmap
+CMapName currentdict /CMap defineresource pop
+end
+end
+%%EndResource
+%%EOF
+    }\endgroup
+  \expandafter\edef\csname cmapOT1\endcsname#1{%
+    \pdffontattr#1{/ToUnicode \the\pdflastobj\space 0 R}%
+  }%
+%
+% \cmapOT1IT
+  \begingroup
+    \catcode`\^^M=\active \def^^M{^^J}% Output line endings as the ^^J char.
+    \catcode`\%=12 \immediate\pdfobj stream {%!PS-Adobe-3.0 Resource-CMap
+%%DocumentNeededResources: ProcSet (CIDInit)
+%%IncludeResource: ProcSet (CIDInit)
+%%BeginResource: CMap (TeX-OT1IT-0)
+%%Title: (TeX-OT1IT-0 TeX OT1IT 0)
+%%Version: 1.000
+%%EndComments
+/CIDInit /ProcSet findresource begin
+12 dict begin
+begincmap
+/CIDSystemInfo
+<< /Registry (TeX)
+/Ordering (OT1IT)
+/Supplement 0
+>> def
+/CMapName /TeX-OT1IT-0 def
+/CMapType 2 def
+1 begincodespacerange
+<00> <7F>
+endcodespacerange
+8 beginbfrange
+<00> <01> <0393>
+<09> <0A> <03A8>
+<25> <26> <0025>
+<28> <3B> <0028>
+<3F> <5B> <003F>
+<5D> <5E> <005D>
+<61> <7A> <0061>
+<7B> <7C> <2013>
+endbfrange
+42 beginbfchar
+<02> <0398>
+<03> <039B>
+<04> <039E>
+<05> <03A0>
+<06> <03A3>
+<07> <03D2>
+<08> <03A6>
+<0B> <00660066>
+<0C> <00660069>
+<0D> <0066006C>
+<0E> <006600660069>
+<0F> <00660066006C>
+<10> <0131>
+<11> <0237>
+<12> <0060>
+<13> <00B4>
+<14> <02C7>
+<15> <02D8>
+<16> <00AF>
+<17> <02DA>
+<18> <00B8>
+<19> <00DF>
+<1A> <00E6>
+<1B> <0153>
+<1C> <00F8>
+<1D> <00C6>
+<1E> <0152>
+<1F> <00D8>
+<21> <0021>
+<22> <201D>
+<23> <0023>
+<24> <00A3>
+<27> <2019>
+<3C> <00A1>
+<3D> <003D>
+<3E> <00BF>
+<5C> <201C>
+<5F> <02D9>
+<60> <2018>
+<7D> <02DD>
+<7E> <007E>
+<7F> <00A8>
+endbfchar
+endcmap
+CMapName currentdict /CMap defineresource pop
+end
+end
+%%EndResource
+%%EOF
+    }\endgroup
+  \expandafter\edef\csname cmapOT1IT\endcsname#1{%
+    \pdffontattr#1{/ToUnicode \the\pdflastobj\space 0 R}%
+  }%
+%
+% \cmapOT1TT
+  \begingroup
+    \catcode`\^^M=\active \def^^M{^^J}% Output line endings as the ^^J char.
+    \catcode`\%=12 \immediate\pdfobj stream {%!PS-Adobe-3.0 Resource-CMap
+%%DocumentNeededResources: ProcSet (CIDInit)
+%%IncludeResource: ProcSet (CIDInit)
+%%BeginResource: CMap (TeX-OT1TT-0)
+%%Title: (TeX-OT1TT-0 TeX OT1TT 0)
+%%Version: 1.000
+%%EndComments
+/CIDInit /ProcSet findresource begin
+12 dict begin
+begincmap
+/CIDSystemInfo
+<< /Registry (TeX)
+/Ordering (OT1TT)
+/Supplement 0
+>> def
+/CMapName /TeX-OT1TT-0 def
+/CMapType 2 def
+1 begincodespacerange
+<00> <7F>
+endcodespacerange
+5 beginbfrange
+<00> <01> <0393>
+<09> <0A> <03A8>
+<21> <26> <0021>
+<28> <5F> <0028>
+<61> <7E> <0061>
+endbfrange
+32 beginbfchar
+<02> <0398>
+<03> <039B>
+<04> <039E>
+<05> <03A0>
+<06> <03A3>
+<07> <03D2>
+<08> <03A6>
+<0B> <2191>
+<0C> <2193>
+<0D> <0027>
+<0E> <00A1>
+<0F> <00BF>
+<10> <0131>
+<11> <0237>
+<12> <0060>
+<13> <00B4>
+<14> <02C7>
+<15> <02D8>
+<16> <00AF>
+<17> <02DA>
+<18> <00B8>
+<19> <00DF>
+<1A> <00E6>
+<1B> <0153>
+<1C> <00F8>
+<1D> <00C6>
+<1E> <0152>
+<1F> <00D8>
+<20> <2423>
+<27> <2019>
+<60> <2018>
+<7F> <00A8>
+endbfchar
+endcmap
+CMapName currentdict /CMap defineresource pop
+end
+end
+%%EndResource
+%%EOF
+    }\endgroup
+  \expandafter\edef\csname cmapOT1TT\endcsname#1{%
+    \pdffontattr#1{/ToUnicode \the\pdflastobj\space 0 R}%
+  }%
+\fi\fi
+
+
+% Set the font macro #1 to the font named #2, adding on the
+% specified font prefix (normally `cm').
+% #3 is the font's design size, #4 is a scale factor, #5 is the CMap
+% encoding (currently only OT1, OT1IT and OT1TT are allowed, pass
+% empty to omit).
+\def\setfont#1#2#3#4#5{%
+  \font#1=\fontprefix#2#3 scaled #4
+  \csname cmap#5\endcsname#1%
+}
+% This is what gets called when #5 of \setfont is empty.
+\let\cmap\gobble
+% emacs-page end of cmaps
+
+% Use cm as the default font prefix.
+% To specify the font prefix, you must define \fontprefix
+% before you read in texinfo.tex.
+\ifx\fontprefix\undefined
+\def\fontprefix{cm}
+\fi
+% Support font families that don't use the same naming scheme as CM.
+\def\rmshape{r}
+\def\rmbshape{bx}               %where the normal face is bold
+\def\bfshape{b}
+\def\bxshape{bx}
+\def\ttshape{tt}
+\def\ttbshape{tt}
+\def\ttslshape{sltt}
+\def\itshape{ti}
+\def\itbshape{bxti}
+\def\slshape{sl}
+\def\slbshape{bxsl}
+\def\sfshape{ss}
+\def\sfbshape{ss}
+\def\scshape{csc}
+\def\scbshape{csc}
+
+% Definitions for a main text size of 11pt.  This is the default in
+% Texinfo.
+% 
+\def\definetextfontsizexi{%
+% Text fonts (11.2pt, magstep1).
+\def\textnominalsize{11pt}
+\edef\mainmagstep{\magstephalf}
+\setfont\textrm\rmshape{10}{\mainmagstep}{OT1}
+\setfont\texttt\ttshape{10}{\mainmagstep}{OT1TT}
+\setfont\textbf\bfshape{10}{\mainmagstep}{OT1}
+\setfont\textit\itshape{10}{\mainmagstep}{OT1IT}
+\setfont\textsl\slshape{10}{\mainmagstep}{OT1}
+\setfont\textsf\sfshape{10}{\mainmagstep}{OT1}
+\setfont\textsc\scshape{10}{\mainmagstep}{OT1}
+\setfont\textttsl\ttslshape{10}{\mainmagstep}{OT1TT}
+\font\texti=cmmi10 scaled \mainmagstep
+\font\textsy=cmsy10 scaled \mainmagstep
+\def\textecsize{1095}
+
+% A few fonts for @defun names and args.
+\setfont\defbf\bfshape{10}{\magstep1}{OT1}
+\setfont\deftt\ttshape{10}{\magstep1}{OT1TT}
+\setfont\defttsl\ttslshape{10}{\magstep1}{OT1TT}
+\def\df{\let\tentt=\deftt \let\tenbf = \defbf \let\tenttsl=\defttsl \bf}
+
+% Fonts for indices, footnotes, small examples (9pt).
+\def\smallnominalsize{9pt}
+\setfont\smallrm\rmshape{9}{1000}{OT1}
+\setfont\smalltt\ttshape{9}{1000}{OT1TT}
+\setfont\smallbf\bfshape{10}{900}{OT1}
+\setfont\smallit\itshape{9}{1000}{OT1IT}
+\setfont\smallsl\slshape{9}{1000}{OT1}
+\setfont\smallsf\sfshape{9}{1000}{OT1}
+\setfont\smallsc\scshape{10}{900}{OT1}
+\setfont\smallttsl\ttslshape{10}{900}{OT1TT}
+\font\smalli=cmmi9
+\font\smallsy=cmsy9
+\def\smallecsize{0900}
+
+% Fonts for small examples (8pt).
+\def\smallernominalsize{8pt}
+\setfont\smallerrm\rmshape{8}{1000}{OT1}
+\setfont\smallertt\ttshape{8}{1000}{OT1TT}
+\setfont\smallerbf\bfshape{10}{800}{OT1}
+\setfont\smallerit\itshape{8}{1000}{OT1IT}
+\setfont\smallersl\slshape{8}{1000}{OT1}
+\setfont\smallersf\sfshape{8}{1000}{OT1}
+\setfont\smallersc\scshape{10}{800}{OT1}
+\setfont\smallerttsl\ttslshape{10}{800}{OT1TT}
+\font\smalleri=cmmi8
+\font\smallersy=cmsy8
+\def\smallerecsize{0800}
+
+% Fonts for title page (20.4pt):
+\def\titlenominalsize{20pt}
+\setfont\titlerm\rmbshape{12}{\magstep3}{OT1}
+\setfont\titleit\itbshape{10}{\magstep4}{OT1IT}
+\setfont\titlesl\slbshape{10}{\magstep4}{OT1}
+\setfont\titlett\ttbshape{12}{\magstep3}{OT1TT}
+\setfont\titlettsl\ttslshape{10}{\magstep4}{OT1TT}
+\setfont\titlesf\sfbshape{17}{\magstep1}{OT1}
+\let\titlebf=\titlerm
+\setfont\titlesc\scbshape{10}{\magstep4}{OT1}
+\font\titlei=cmmi12 scaled \magstep3
+\font\titlesy=cmsy10 scaled \magstep4
+\def\authorrm{\secrm}
+\def\authortt{\sectt}
+\def\titleecsize{2074}
+
+% Chapter (and unnumbered) fonts (17.28pt).
+\def\chapnominalsize{17pt}
+\setfont\chaprm\rmbshape{12}{\magstep2}{OT1}
+\setfont\chapit\itbshape{10}{\magstep3}{OT1IT}
+\setfont\chapsl\slbshape{10}{\magstep3}{OT1}
+\setfont\chaptt\ttbshape{12}{\magstep2}{OT1TT}
+\setfont\chapttsl\ttslshape{10}{\magstep3}{OT1TT}
+\setfont\chapsf\sfbshape{17}{1000}{OT1}
+\let\chapbf=\chaprm
+\setfont\chapsc\scbshape{10}{\magstep3}{OT1}
+\font\chapi=cmmi12 scaled \magstep2
+\font\chapsy=cmsy10 scaled \magstep3
+\def\chapecsize{1728}
+
+% Section fonts (14.4pt).
+\def\secnominalsize{14pt}
+\setfont\secrm\rmbshape{12}{\magstep1}{OT1}
+\setfont\secit\itbshape{10}{\magstep2}{OT1IT}
+\setfont\secsl\slbshape{10}{\magstep2}{OT1}
+\setfont\sectt\ttbshape{12}{\magstep1}{OT1TT}
+\setfont\secttsl\ttslshape{10}{\magstep2}{OT1TT}
+\setfont\secsf\sfbshape{12}{\magstep1}{OT1}
+\let\secbf\secrm
+\setfont\secsc\scbshape{10}{\magstep2}{OT1}
+\font\seci=cmmi12 scaled \magstep1
+\font\secsy=cmsy10 scaled \magstep2
+\def\sececsize{1440}
+
+% Subsection fonts (13.15pt).
+\def\ssecnominalsize{13pt}
+\setfont\ssecrm\rmbshape{12}{\magstephalf}{OT1}
+\setfont\ssecit\itbshape{10}{1315}{OT1IT}
+\setfont\ssecsl\slbshape{10}{1315}{OT1}
+\setfont\ssectt\ttbshape{12}{\magstephalf}{OT1TT}
+\setfont\ssecttsl\ttslshape{10}{1315}{OT1TT}
+\setfont\ssecsf\sfbshape{12}{\magstephalf}{OT1}
+\let\ssecbf\ssecrm
+\setfont\ssecsc\scbshape{10}{1315}{OT1}
+\font\sseci=cmmi12 scaled \magstephalf
+\font\ssecsy=cmsy10 scaled 1315
+\def\ssececsize{1200}
+
+% Reduced fonts for @acro in text (10pt).
+\def\reducednominalsize{10pt}
+\setfont\reducedrm\rmshape{10}{1000}{OT1}
+\setfont\reducedtt\ttshape{10}{1000}{OT1TT}
+\setfont\reducedbf\bfshape{10}{1000}{OT1}
+\setfont\reducedit\itshape{10}{1000}{OT1IT}
+\setfont\reducedsl\slshape{10}{1000}{OT1}
+\setfont\reducedsf\sfshape{10}{1000}{OT1}
+\setfont\reducedsc\scshape{10}{1000}{OT1}
+\setfont\reducedttsl\ttslshape{10}{1000}{OT1TT}
+\font\reducedi=cmmi10
+\font\reducedsy=cmsy10
+\def\reducedecsize{1000}
+
+% reset the current fonts
+\textfonts
+\rm
+} % end of 11pt text font size definitions
+
+
+% Definitions to make the main text be 10pt Computer Modern, with
+% section, chapter, etc., sizes following suit.  This is for the GNU
+% Press printing of the Emacs 22 manual.  Maybe other manuals in the
+% future.  Used with @smallbook, which sets the leading to 12pt.
+% 
+\def\definetextfontsizex{%
+% Text fonts (10pt).
+\def\textnominalsize{10pt}
+\edef\mainmagstep{1000}
+\setfont\textrm\rmshape{10}{\mainmagstep}{OT1}
+\setfont\texttt\ttshape{10}{\mainmagstep}{OT1TT}
+\setfont\textbf\bfshape{10}{\mainmagstep}{OT1}
+\setfont\textit\itshape{10}{\mainmagstep}{OT1IT}
+\setfont\textsl\slshape{10}{\mainmagstep}{OT1}
+\setfont\textsf\sfshape{10}{\mainmagstep}{OT1}
+\setfont\textsc\scshape{10}{\mainmagstep}{OT1}
+\setfont\textttsl\ttslshape{10}{\mainmagstep}{OT1TT}
+\font\texti=cmmi10 scaled \mainmagstep
+\font\textsy=cmsy10 scaled \mainmagstep
+\def\textecsize{1000}
+
+% A few fonts for @defun names and args.
+\setfont\defbf\bfshape{10}{\magstephalf}{OT1}
+\setfont\deftt\ttshape{10}{\magstephalf}{OT1TT}
+\setfont\defttsl\ttslshape{10}{\magstephalf}{OT1TT}
+\def\df{\let\tentt=\deftt \let\tenbf = \defbf \let\tenttsl=\defttsl \bf}
+
+% Fonts for indices, footnotes, small examples (9pt).
+\def\smallnominalsize{9pt}
+\setfont\smallrm\rmshape{9}{1000}{OT1}
+\setfont\smalltt\ttshape{9}{1000}{OT1TT}
+\setfont\smallbf\bfshape{10}{900}{OT1}
+\setfont\smallit\itshape{9}{1000}{OT1IT}
+\setfont\smallsl\slshape{9}{1000}{OT1}
+\setfont\smallsf\sfshape{9}{1000}{OT1}
+\setfont\smallsc\scshape{10}{900}{OT1}
+\setfont\smallttsl\ttslshape{10}{900}{OT1TT}
+\font\smalli=cmmi9
+\font\smallsy=cmsy9
+\def\smallecsize{0900}
+
+% Fonts for small examples (8pt).
+\def\smallernominalsize{8pt}
+\setfont\smallerrm\rmshape{8}{1000}{OT1}
+\setfont\smallertt\ttshape{8}{1000}{OT1TT}
+\setfont\smallerbf\bfshape{10}{800}{OT1}
+\setfont\smallerit\itshape{8}{1000}{OT1IT}
+\setfont\smallersl\slshape{8}{1000}{OT1}
+\setfont\smallersf\sfshape{8}{1000}{OT1}
+\setfont\smallersc\scshape{10}{800}{OT1}
+\setfont\smallerttsl\ttslshape{10}{800}{OT1TT}
+\font\smalleri=cmmi8
+\font\smallersy=cmsy8
+\def\smallerecsize{0800}
+
+% Fonts for title page (20.4pt):
+\def\titlenominalsize{20pt}
+\setfont\titlerm\rmbshape{12}{\magstep3}{OT1}
+\setfont\titleit\itbshape{10}{\magstep4}{OT1IT}
+\setfont\titlesl\slbshape{10}{\magstep4}{OT1}
+\setfont\titlett\ttbshape{12}{\magstep3}{OT1TT}
+\setfont\titlettsl\ttslshape{10}{\magstep4}{OT1TT}
+\setfont\titlesf\sfbshape{17}{\magstep1}{OT1}
+\let\titlebf=\titlerm
+\setfont\titlesc\scbshape{10}{\magstep4}{OT1}
+\font\titlei=cmmi12 scaled \magstep3
+\font\titlesy=cmsy10 scaled \magstep4
+\def\authorrm{\secrm}
+\def\authortt{\sectt}
+\def\titleecsize{2074}
+
+% Chapter fonts (14.4pt).
+\def\chapnominalsize{14pt}
+\setfont\chaprm\rmbshape{12}{\magstep1}{OT1}
+\setfont\chapit\itbshape{10}{\magstep2}{OT1IT}
+\setfont\chapsl\slbshape{10}{\magstep2}{OT1}
+\setfont\chaptt\ttbshape{12}{\magstep1}{OT1TT}
+\setfont\chapttsl\ttslshape{10}{\magstep2}{OT1TT}
+\setfont\chapsf\sfbshape{12}{\magstep1}{OT1}
+\let\chapbf\chaprm
+\setfont\chapsc\scbshape{10}{\magstep2}{OT1}
+\font\chapi=cmmi12 scaled \magstep1
+\font\chapsy=cmsy10 scaled \magstep2
+\def\chapecsize{1440}
+
+% Section fonts (12pt).
+\def\secnominalsize{12pt}
+\setfont\secrm\rmbshape{12}{1000}{OT1}
+\setfont\secit\itbshape{10}{\magstep1}{OT1IT}
+\setfont\secsl\slbshape{10}{\magstep1}{OT1}
+\setfont\sectt\ttbshape{12}{1000}{OT1TT}
+\setfont\secttsl\ttslshape{10}{\magstep1}{OT1TT}
+\setfont\secsf\sfbshape{12}{1000}{OT1}
+\let\secbf\secrm
+\setfont\secsc\scbshape{10}{\magstep1}{OT1}
+\font\seci=cmmi12 
+\font\secsy=cmsy10 scaled \magstep1
+\def\sececsize{1200}
+
+% Subsection fonts (10pt).
+\def\ssecnominalsize{10pt}
+\setfont\ssecrm\rmbshape{10}{1000}{OT1}
+\setfont\ssecit\itbshape{10}{1000}{OT1IT}
+\setfont\ssecsl\slbshape{10}{1000}{OT1}
+\setfont\ssectt\ttbshape{10}{1000}{OT1TT}
+\setfont\ssecttsl\ttslshape{10}{1000}{OT1TT}
+\setfont\ssecsf\sfbshape{10}{1000}{OT1}
+\let\ssecbf\ssecrm
+\setfont\ssecsc\scbshape{10}{1000}{OT1}
+\font\sseci=cmmi10
+\font\ssecsy=cmsy10
+\def\ssececsize{1000}
+
+% Reduced fonts for @acro in text (9pt).
+\def\reducednominalsize{9pt}
+\setfont\reducedrm\rmshape{9}{1000}{OT1}
+\setfont\reducedtt\ttshape{9}{1000}{OT1TT}
+\setfont\reducedbf\bfshape{10}{900}{OT1}
+\setfont\reducedit\itshape{9}{1000}{OT1IT}
+\setfont\reducedsl\slshape{9}{1000}{OT1}
+\setfont\reducedsf\sfshape{9}{1000}{OT1}
+\setfont\reducedsc\scshape{10}{900}{OT1}
+\setfont\reducedttsl\ttslshape{10}{900}{OT1TT}
+\font\reducedi=cmmi9
+\font\reducedsy=cmsy9
+\def\reducedecsize{0900}
+
+% reduce space between paragraphs
+\divide\parskip by 2
+
+% reset the current fonts
+\textfonts
+\rm
+} % end of 10pt text font size definitions
+
+
+% We provide the user-level command
+%   @fonttextsize 10
+% (or 11) to redefine the text font size.  pt is assumed.
+% 
+\def\xword{10}
+\def\xiword{11}
+%
+\parseargdef\fonttextsize{%
+  \def\textsizearg{#1}%
+  \wlog{doing @fonttextsize \textsizearg}%
+  %
+  % Set \globaldefs so that documents can use this inside @tex, since
+  % makeinfo 4.8 does not support it, but we need it nonetheless.
+  % 
+ \begingroup \globaldefs=1
+  \ifx\textsizearg\xword \definetextfontsizex
+  \else \ifx\textsizearg\xiword \definetextfontsizexi
+  \else
+    \errhelp=\EMsimple
+    \errmessage{@fonttextsize only supports `10' or `11', not `\textsizearg'}
+  \fi\fi
+ \endgroup
+}
+
+
+% In order for the font changes to affect most math symbols and letters,
+% we have to define the \textfont of the standard families.  Since
+% texinfo doesn't allow for producing subscripts and superscripts except
+% in the main text, we don't bother to reset \scriptfont and
+% \scriptscriptfont (which would also require loading a lot more fonts).
+%
+\def\resetmathfonts{%
+  \textfont0=\tenrm \textfont1=\teni \textfont2=\tensy
+  \textfont\itfam=\tenit \textfont\slfam=\tensl \textfont\bffam=\tenbf
+  \textfont\ttfam=\tentt \textfont\sffam=\tensf
+}
+
+% The font-changing commands redefine the meanings of \tenSTYLE, instead
+% of just \STYLE.  We do this because \STYLE needs to also set the
+% current \fam for math mode.  Our \STYLE (e.g., \rm) commands hardwire
+% \tenSTYLE to set the current font.
+%
+% Each font-changing command also sets the names \lsize (one size lower)
+% and \lllsize (three sizes lower).  These relative commands are used in
+% the LaTeX logo and acronyms.
+%
+% This all needs generalizing, badly.
+%
+\def\textfonts{%
+  \let\tenrm=\textrm \let\tenit=\textit \let\tensl=\textsl
+  \let\tenbf=\textbf \let\tentt=\texttt \let\smallcaps=\textsc
+  \let\tensf=\textsf \let\teni=\texti \let\tensy=\textsy
+  \let\tenttsl=\textttsl
+  \def\curfontsize{text}%
+  \def\lsize{reduced}\def\lllsize{smaller}%
+  \resetmathfonts \setleading{\textleading}}
+\def\titlefonts{%
+  \let\tenrm=\titlerm \let\tenit=\titleit \let\tensl=\titlesl
+  \let\tenbf=\titlebf \let\tentt=\titlett \let\smallcaps=\titlesc
+  \let\tensf=\titlesf \let\teni=\titlei \let\tensy=\titlesy
+  \let\tenttsl=\titlettsl
+  \def\curfontsize{title}%
+  \def\lsize{chap}\def\lllsize{subsec}%
+  \resetmathfonts \setleading{25pt}}
+\def\titlefont#1{{\titlefonts\rm #1}}
+\def\chapfonts{%
+  \let\tenrm=\chaprm \let\tenit=\chapit \let\tensl=\chapsl
+  \let\tenbf=\chapbf \let\tentt=\chaptt \let\smallcaps=\chapsc
+  \let\tensf=\chapsf \let\teni=\chapi \let\tensy=\chapsy
+  \let\tenttsl=\chapttsl
+  \def\curfontsize{chap}%
+  \def\lsize{sec}\def\lllsize{text}%
+  \resetmathfonts \setleading{19pt}}
+\def\secfonts{%
+  \let\tenrm=\secrm \let\tenit=\secit \let\tensl=\secsl
+  \let\tenbf=\secbf \let\tentt=\sectt \let\smallcaps=\secsc
+  \let\tensf=\secsf \let\teni=\seci \let\tensy=\secsy
+  \let\tenttsl=\secttsl
+  \def\curfontsize{sec}%
+  \def\lsize{subsec}\def\lllsize{reduced}%
+  \resetmathfonts \setleading{16pt}}
+\def\subsecfonts{%
+  \let\tenrm=\ssecrm \let\tenit=\ssecit \let\tensl=\ssecsl
+  \let\tenbf=\ssecbf \let\tentt=\ssectt \let\smallcaps=\ssecsc
+  \let\tensf=\ssecsf \let\teni=\sseci \let\tensy=\ssecsy
+  \let\tenttsl=\ssecttsl
+  \def\curfontsize{ssec}%
+  \def\lsize{text}\def\lllsize{small}%
+  \resetmathfonts \setleading{15pt}}
+\let\subsubsecfonts = \subsecfonts
+\def\reducedfonts{%
+  \let\tenrm=\reducedrm \let\tenit=\reducedit \let\tensl=\reducedsl
+  \let\tenbf=\reducedbf \let\tentt=\reducedtt \let\reducedcaps=\reducedsc
+  \let\tensf=\reducedsf \let\teni=\reducedi \let\tensy=\reducedsy
+  \let\tenttsl=\reducedttsl
+  \def\curfontsize{reduced}%
+  \def\lsize{small}\def\lllsize{smaller}%
+  \resetmathfonts \setleading{10.5pt}}
+\def\smallfonts{%
+  \let\tenrm=\smallrm \let\tenit=\smallit \let\tensl=\smallsl
+  \let\tenbf=\smallbf \let\tentt=\smalltt \let\smallcaps=\smallsc
+  \let\tensf=\smallsf \let\teni=\smalli \let\tensy=\smallsy
+  \let\tenttsl=\smallttsl
+  \def\curfontsize{small}%
+  \def\lsize{smaller}\def\lllsize{smaller}%
+  \resetmathfonts \setleading{10.5pt}}
+\def\smallerfonts{%
+  \let\tenrm=\smallerrm \let\tenit=\smallerit \let\tensl=\smallersl
+  \let\tenbf=\smallerbf \let\tentt=\smallertt \let\smallcaps=\smallersc
+  \let\tensf=\smallersf \let\teni=\smalleri \let\tensy=\smallersy
+  \let\tenttsl=\smallerttsl
+  \def\curfontsize{smaller}%
+  \def\lsize{smaller}\def\lllsize{smaller}%
+  \resetmathfonts \setleading{9.5pt}}
+
+% Set the fonts to use with the @small... environments.
+\let\smallexamplefonts = \smallfonts
+
+% About \smallexamplefonts.  If we use \smallfonts (9pt), @smallexample
+% can fit this many characters:
+%   8.5x11=86   smallbook=72  a4=90  a5=69
+% If we use \scriptfonts (8pt), then we can fit this many characters:
+%   8.5x11=90+  smallbook=80  a4=90+  a5=77
+% For me, subjectively, the few extra characters that fit aren't worth
+% the additional smallness of 8pt.  So I'm making the default 9pt.
+%
+% By the way, for comparison, here's what fits with @example (10pt):
+%   8.5x11=71  smallbook=60  a4=75  a5=58
+%
+% I wish the USA used A4 paper.
+% --karl, 24jan03.
+
+
+% Set up the default fonts, so we can use them for creating boxes.
+%
+\definetextfontsizexi
+
+% Define these so they can be easily changed for other fonts.
+\def\angleleft{$\langle$}
+\def\angleright{$\rangle$}
+
+% Count depth in font-changes, for error checks
+\newcount\fontdepth \fontdepth=0
+
+% Fonts for short table of contents.
+\setfont\shortcontrm\rmshape{12}{1000}{OT1}
+\setfont\shortcontbf\bfshape{10}{\magstep1}{OT1}  % no cmb12
+\setfont\shortcontsl\slshape{12}{1000}{OT1}
+\setfont\shortconttt\ttshape{12}{1000}{OT1TT}
+
+%% Add scribe-like font environments, plus @l for inline lisp (usually sans
+%% serif) and @ii for TeX italic
+
+% \smartitalic{ARG} outputs arg in italics, followed by an italic correction
+% unless the following character is such as not to need one.
+\def\smartitalicx{\ifx\next,\else\ifx\next-\else\ifx\next.\else
+                    \ptexslash\fi\fi\fi}
+\def\smartslanted#1{{\ifusingtt\ttsl\sl #1}\futurelet\next\smartitalicx}
+\def\smartitalic#1{{\ifusingtt\ttsl\it #1}\futurelet\next\smartitalicx}
+
+% like \smartslanted except unconditionally uses \ttsl.
+% @var is set to this for defun arguments.
+\def\ttslanted#1{{\ttsl #1}\futurelet\next\smartitalicx}
+
+% like \smartslanted except unconditionally use \sl.  We never want
+% ttsl for book titles, do we?
+\def\cite#1{{\sl #1}\futurelet\next\smartitalicx}
+
+\let\i=\smartitalic
+\let\slanted=\smartslanted
+\let\var=\smartslanted
+\let\dfn=\smartslanted
+\let\emph=\smartitalic
+
+% @b, explicit bold.
+\def\b#1{{\bf #1}}
+\let\strong=\b
+
+% @sansserif, explicit sans.
+\def\sansserif#1{{\sf #1}}
+
+% We can't just use \exhyphenpenalty, because that only has effect at
+% the end of a paragraph.  Restore normal hyphenation at the end of the
+% group within which \nohyphenation is presumably called.
+%
+\def\nohyphenation{\hyphenchar\font = -1  \aftergroup\restorehyphenation}
+\def\restorehyphenation{\hyphenchar\font = `- }
+
+% Set sfcode to normal for the chars that usually have another value.
+% Can't use plain's \frenchspacing because it uses the `\x notation, and
+% sometimes \x has an active definition that messes things up.
+%
+\catcode`@=11
+  \def\plainfrenchspacing{%
+    \sfcode\dotChar  =\@m \sfcode\questChar=\@m \sfcode\exclamChar=\@m
+    \sfcode\colonChar=\@m \sfcode\semiChar =\@m \sfcode\commaChar =\@m
+    \def\endofsentencespacefactor{1000}% for @. and friends
+  }
+  \def\plainnonfrenchspacing{%
+    \sfcode`\.3000\sfcode`\?3000\sfcode`\!3000
+    \sfcode`\:2000\sfcode`\;1500\sfcode`\,1250
+    \def\endofsentencespacefactor{3000}% for @. and friends
+  }
+\catcode`@=\other
+\def\endofsentencespacefactor{3000}% default
+
+\def\t#1{%
+  {\tt \rawbackslash \plainfrenchspacing #1}%
+  \null
+}
+\def\samp#1{`\tclose{#1}'\null}
+\setfont\keyrm\rmshape{8}{1000}{OT1}
+\font\keysy=cmsy9
+\def\key#1{{\keyrm\textfont2=\keysy \leavevmode\hbox{%
+  \raise0.4pt\hbox{\angleleft}\kern-.08em\vtop{%
+    \vbox{\hrule\kern-0.4pt
+     \hbox{\raise0.4pt\hbox{\vphantom{\angleleft}}#1}}%
+    \kern-0.4pt\hrule}%
+  \kern-.06em\raise0.4pt\hbox{\angleright}}}}
+\def\key #1{{\nohyphenation \uppercase{#1}}\null}
+% The old definition, with no lozenge:
+%\def\key #1{{\ttsl \nohyphenation \uppercase{#1}}\null}
+\def\ctrl #1{{\tt \rawbackslash \hat}#1}
+
+% @file, @option are the same as @samp.
+\let\file=\samp
+\let\option=\samp
+
+% @code is a modification of @t,
+% which makes spaces the same size as normal in the surrounding text.
+\def\tclose#1{%
+  {%
+    % Change normal interword space to be same as for the current font.
+    \spaceskip = \fontdimen2\font
+    %
+    % Switch to typewriter.
+    \tt
+    %
+    % But `\ ' produces the large typewriter interword space.
+    \def\ {{\spaceskip = 0pt{} }}%
+    %
+    % Turn off hyphenation.
+    \nohyphenation
+    %
+    \rawbackslash
+    \plainfrenchspacing
+    #1%
+  }%
+  \null
+}
+
+% We *must* turn on hyphenation at `-' and `_' in @code.
+% Otherwise, it is too hard to avoid overfull hboxes
+% in the Emacs manual, the Library manual, etc.
+
+% Unfortunately, TeX uses one parameter (\hyphenchar) to control
+% both hyphenation at - and hyphenation within words.
+% We must therefore turn them both off (\tclose does that)
+% and arrange explicitly to hyphenate at a dash.
+%  -- rms.
+{
+  \catcode`\-=\active \catcode`\_=\active
+  \catcode`\'=\active \catcode`\`=\active
+  %
+  \global\def\code{\begingroup
+    \catcode\rquoteChar=\active \catcode\lquoteChar=\active
+    \let'\codequoteright \let`\codequoteleft
+    %
+    \catcode\dashChar=\active  \catcode\underChar=\active
+    \ifallowcodebreaks
+     \let-\codedash
+     \let_\codeunder
+    \else
+     \let-\realdash
+     \let_\realunder
+    \fi
+    \codex
+  }
+}
+
+\def\realdash{-}
+\def\codedash{-\discretionary{}{}{}}
+\def\codeunder{%
+  % this is all so @math{@code{var_name}+1} can work.  In math mode, _
+  % is "active" (mathcode"8000) and \normalunderscore (or \char95, etc.)
+  % will therefore expand the active definition of _, which is us
+  % (inside @code that is), therefore an endless loop.
+  \ifusingtt{\ifmmode
+               \mathchar"075F % class 0=ordinary, family 7=ttfam, pos 0x5F=_.
+             \else\normalunderscore \fi
+             \discretionary{}{}{}}%
+            {\_}%
+}
+\def\codex #1{\tclose{#1}\endgroup}
+
+% An additional complication: the above will allow breaks after, e.g.,
+% each of the four underscores in __typeof__.  This is undesirable in
+% some manuals, especially if they don't have long identifiers in
+% general.  @allowcodebreaks provides a way to control this.
+% 
+\newif\ifallowcodebreaks  \allowcodebreakstrue
+
+\def\keywordtrue{true}
+\def\keywordfalse{false}
+
+\parseargdef\allowcodebreaks{%
+  \def\txiarg{#1}%
+  \ifx\txiarg\keywordtrue
+    \allowcodebreakstrue
+  \else\ifx\txiarg\keywordfalse
+    \allowcodebreaksfalse
+  \else
+    \errhelp = \EMsimple
+    \errmessage{Unknown @allowcodebreaks option `\txiarg'}%
+  \fi\fi
+}
+
+% @kbd is like @code, except that if the argument is just one @key command,
+% then @kbd has no effect.
+
+% @kbdinputstyle -- arg is `distinct' (@kbd uses slanted tty font always),
+%   `example' (@kbd uses ttsl only inside of @example and friends),
+%   or `code' (@kbd uses normal tty font always).
+\parseargdef\kbdinputstyle{%
+  \def\txiarg{#1}%
+  \ifx\txiarg\worddistinct
+    \gdef\kbdexamplefont{\ttsl}\gdef\kbdfont{\ttsl}%
+  \else\ifx\txiarg\wordexample
+    \gdef\kbdexamplefont{\ttsl}\gdef\kbdfont{\tt}%
+  \else\ifx\txiarg\wordcode
+    \gdef\kbdexamplefont{\tt}\gdef\kbdfont{\tt}%
+  \else
+    \errhelp = \EMsimple
+    \errmessage{Unknown @kbdinputstyle option `\txiarg'}%
+  \fi\fi\fi
+}
+\def\worddistinct{distinct}
+\def\wordexample{example}
+\def\wordcode{code}
+
+% Default is `distinct.'
+\kbdinputstyle distinct
+
+\def\xkey{\key}
+\def\kbdfoo#1#2#3\par{\def\one{#1}\def\three{#3}\def\threex{??}%
+\ifx\one\xkey\ifx\threex\three \key{#2}%
+\else{\tclose{\kbdfont\look}}\fi
+\else{\tclose{\kbdfont\look}}\fi}
+
+% For @indicateurl, @env, @command quotes seem unnecessary, so use \code.
+\let\indicateurl=\code
+\let\env=\code
+\let\command=\code
+
+% @clicksequence{File @click{} Open ...}
+\def\clicksequence#1{\begingroup #1\endgroup}
+
+% @clickstyle @arrow   (by default)
+\parseargdef\clickstyle{\def\click{#1}}
+\def\click{\arrow}
+
+% @uref (abbreviation for `urlref') takes an optional (comma-separated)
+% second argument specifying the text to display and an optional third
+% arg as text to display instead of (rather than in addition to) the url
+% itself.  First (mandatory) arg is the url.  Perhaps eventually put in
+% a hypertex \special here.
+%
+\def\uref#1{\douref #1,,,\finish}
+\def\douref#1,#2,#3,#4\finish{\begingroup
+  \unsepspaces
+  \pdfurl{#1}%
+  \setbox0 = \hbox{\ignorespaces #3}%
+  \ifdim\wd0 > 0pt
+    \unhbox0 % third arg given, show only that
+  \else
+    \setbox0 = \hbox{\ignorespaces #2}%
+    \ifdim\wd0 > 0pt
+      \ifpdf
+        \unhbox0             % PDF: 2nd arg given, show only it
+      \else
+        \unhbox0\ (\code{#1})% DVI: 2nd arg given, show both it and url
+      \fi
+    \else
+      \code{#1}% only url given, so show it
+    \fi
+  \fi
+  \endlink
+\endgroup}
+
+% @url synonym for @uref, since that's how everyone uses it.
+%
+\let\url=\uref
+
+% rms does not like angle brackets --karl, 17may97.
+% So now @email is just like @uref, unless we are pdf.
+%
+%\def\email#1{\angleleft{\tt #1}\angleright}
+\ifpdf
+  \def\email#1{\doemail#1,,\finish}
+  \def\doemail#1,#2,#3\finish{\begingroup
+    \unsepspaces
+    \pdfurl{mailto:#1}%
+    \setbox0 = \hbox{\ignorespaces #2}%
+    \ifdim\wd0>0pt\unhbox0\else\code{#1}\fi
+    \endlink
+  \endgroup}
+\else
+  \let\email=\uref
+\fi
+
+% Check if we are currently using a typewriter font.  Since all the
+% Computer Modern typewriter fonts have zero interword stretch (and
+% shrink), and it is reasonable to expect all typewriter fonts to have
+% this property, we can check that font parameter.
+%
+\def\ifmonospace{\ifdim\fontdimen3\font=0pt }
+
+% Typeset a dimension, e.g., `in' or `pt'.  The only reason for the
+% argument is to make the input look right: @dmn{pt} instead of @dmn{}pt.
+%
+\def\dmn#1{\thinspace #1}
+
+\def\kbd#1{\def\look{#1}\expandafter\kbdfoo\look??\par}
+
+% @l was never documented to mean ``switch to the Lisp font'',
+% and it is not used as such in any manual I can find.  We need it for
+% Polish suppressed-l.  --karl, 22sep96.
+%\def\l#1{{\li #1}\null}
+
+% Explicit font changes: @r, @sc, undocumented @ii.
+\def\r#1{{\rm #1}}              % roman font
+\def\sc#1{{\smallcaps#1}}       % smallcaps font
+\def\ii#1{{\it #1}}             % italic font
+
+% @acronym for "FBI", "NATO", and the like.
+% We print this one point size smaller, since it's intended for
+% all-uppercase.
+% 
+\def\acronym#1{\doacronym #1,,\finish}
+\def\doacronym#1,#2,#3\finish{%
+  {\selectfonts\lsize #1}%
+  \def\temp{#2}%
+  \ifx\temp\empty \else
+    \space ({\unsepspaces \ignorespaces \temp \unskip})%
+  \fi
+}
+
+% @abbr for "Comput. J." and the like.
+% No font change, but don't do end-of-sentence spacing.
+% 
+\def\abbr#1{\doabbr #1,,\finish}
+\def\doabbr#1,#2,#3\finish{%
+  {\plainfrenchspacing #1}%
+  \def\temp{#2}%
+  \ifx\temp\empty \else
+    \space ({\unsepspaces \ignorespaces \temp \unskip})%
+  \fi
+}
+
+% @pounds{} is a sterling sign, which Knuth put in the CM italic font.
+%
+\def\pounds{{\it\$}}
+
+% @euro{} comes from a separate font, depending on the current style.
+% We use the free feym* fonts from the eurosym package by Henrik
+% Theiling, which support regular, slanted, bold and bold slanted (and
+% "outlined" (blackboard board, sort of) versions, which we don't need).
+% It is available from http://www.ctan.org/tex-archive/fonts/eurosym.
+% 
+% Although only regular is the truly official Euro symbol, we ignore
+% that.  The Euro is designed to be slightly taller than the regular
+% font height.
+% 
+% feymr - regular
+% feymo - slanted
+% feybr - bold
+% feybo - bold slanted
+% 
+% There is no good (free) typewriter version, to my knowledge.
+% A feymr10 euro is ~7.3pt wide, while a normal cmtt10 char is ~5.25pt wide.
+% Hmm.
+% 
+% Also doesn't work in math.  Do we need to do math with euro symbols?
+% Hope not.
+% 
+% 
+\def\euro{{\eurofont e}}
+\def\eurofont{%
+  % We set the font at each command, rather than predefining it in
+  % \textfonts and the other font-switching commands, so that
+  % installations which never need the symbol don't have to have the
+  % font installed.
+  % 
+  % There is only one designed size (nominal 10pt), so we always scale
+  % that to the current nominal size.
+  % 
+  % By the way, simply using "at 1em" works for cmr10 and the like, but
+  % does not work for cmbx10 and other extended/shrunken fonts.
+  % 
+  \def\eurosize{\csname\curfontsize nominalsize\endcsname}%
+  %
+  \ifx\curfontstyle\bfstylename 
+    % bold:
+    \font\thiseurofont = \ifusingit{feybo10}{feybr10} at \eurosize
+  \else 
+    % regular:
+    \font\thiseurofont = \ifusingit{feymo10}{feymr10} at \eurosize
+  \fi
+  \thiseurofont
+}
+
+% Hacks for glyphs from the EC fonts similar to \euro.  We don't
+% use \let for the aliases, because sometimes we redefine the original
+% macro, and the alias should reflect the redefinition.
+\def\guillemetleft{{\ecfont \char"13}}
+\def\guillemotleft{\guillemetleft}
+\def\guillemetright{{\ecfont \char"14}}
+\def\guillemotright{\guillemetright}
+\def\guilsinglleft{{\ecfont \char"0E}}
+\def\guilsinglright{{\ecfont \char"0F}}
+\def\quotedblbase{{\ecfont \char"12}}
+\def\quotesinglbase{{\ecfont \char"0D}}
+%
+\def\ecfont{%
+  % We can't distinguish serif/sanserif and italic/slanted, but this
+  % is used for crude hacks anyway (like adding French and German
+  % quotes to documents typeset with CM, where we lose kerning), so
+  % hopefully nobody will notice/care.
+  \edef\ecsize{\csname\curfontsize ecsize\endcsname}%
+  \edef\nominalsize{\csname\curfontsize nominalsize\endcsname}%
+  \ifx\curfontstyle\bfstylename
+    % bold:
+    \font\thisecfont = ecb\ifusingit{i}{x}\ecsize \space at \nominalsize
+  \else
+    % regular:
+    \font\thisecfont = ec\ifusingit{ti}{rm}\ecsize \space at \nominalsize
+  \fi
+  \thisecfont
+}
+
+% @registeredsymbol - R in a circle.  The font for the R should really
+% be smaller yet, but lllsize is the best we can do for now.
+% Adapted from the plain.tex definition of \copyright.
+%
+\def\registeredsymbol{%
+  $^{{\ooalign{\hfil\raise.07ex\hbox{\selectfonts\lllsize R}%
+               \hfil\crcr\Orb}}%
+    }$%
+}
+
+% @textdegree - the normal degrees sign.
+%
+\def\textdegree{$^\circ$}
+
+% Laurent Siebenmann reports \Orb undefined with:
+%  Textures 1.7.7 (preloaded format=plain 93.10.14)  (68K)  16 APR 2004 02:38
+% so we'll define it if necessary.
+% 
+\ifx\Orb\undefined
+\def\Orb{\mathhexbox20D}
+\fi
+
+% Quotes.
+\chardef\quotedblleft="5C
+\chardef\quotedblright=`\"
+\chardef\quoteleft=`\`
+\chardef\quoteright=`\'
+
+
+\message{page headings,}
+
+\newskip\titlepagetopglue \titlepagetopglue = 1.5in
+\newskip\titlepagebottomglue \titlepagebottomglue = 2pc
+
+% First the title page.  Must do @settitle before @titlepage.
+\newif\ifseenauthor
+\newif\iffinishedtitlepage
+
+% Do an implicit @contents or @shortcontents after @end titlepage if the
+% user says @setcontentsaftertitlepage or @setshortcontentsaftertitlepage.
+%
+\newif\ifsetcontentsaftertitlepage
+ \let\setcontentsaftertitlepage = \setcontentsaftertitlepagetrue
+\newif\ifsetshortcontentsaftertitlepage
+ \let\setshortcontentsaftertitlepage = \setshortcontentsaftertitlepagetrue
+
+\parseargdef\shorttitlepage{\begingroup\hbox{}\vskip 1.5in \chaprm \centerline{#1}%
+        \endgroup\page\hbox{}\page}
+
+\envdef\titlepage{%
+  % Open one extra group, as we want to close it in the middle of \Etitlepage.
+  \begingroup
+    \parindent=0pt \textfonts
+    % Leave some space at the very top of the page.
+    \vglue\titlepagetopglue
+    % No rule at page bottom unless we print one at the top with @title.
+    \finishedtitlepagetrue
+    %
+    % Most title ``pages'' are actually two pages long, with space
+    % at the top of the second.  We don't want the ragged left on the second.
+    \let\oldpage = \page
+    \def\page{%
+      \iffinishedtitlepage\else
+	 \finishtitlepage
+      \fi
+      \let\page = \oldpage
+      \page
+      \null
+    }%
+}
+
+\def\Etitlepage{%
+    \iffinishedtitlepage\else
+	\finishtitlepage
+    \fi
+    % It is important to do the page break before ending the group,
+    % because the headline and footline are only empty inside the group.
+    % If we use the new definition of \page, we always get a blank page
+    % after the title page, which we certainly don't want.
+    \oldpage
+  \endgroup
+  %
+  % Need this before the \...aftertitlepage checks so that if they are
+  % in effect the toc pages will come out with page numbers.
+  \HEADINGSon
+  %
+  % If they want short, they certainly want long too.
+  \ifsetshortcontentsaftertitlepage
+    \shortcontents
+    \contents
+    \global\let\shortcontents = \relax
+    \global\let\contents = \relax
+  \fi
+  %
+  \ifsetcontentsaftertitlepage
+    \contents
+    \global\let\contents = \relax
+    \global\let\shortcontents = \relax
+  \fi
+}
+
+\def\finishtitlepage{%
+  \vskip4pt \hrule height 2pt width \hsize
+  \vskip\titlepagebottomglue
+  \finishedtitlepagetrue
+}
+
+%%% Macros to be used within @titlepage:
+
+\let\subtitlerm=\tenrm
+\def\subtitlefont{\subtitlerm \normalbaselineskip = 13pt \normalbaselines}
+
+\def\authorfont{\authorrm \normalbaselineskip = 16pt \normalbaselines
+		\let\tt=\authortt}
+
+\parseargdef\title{%
+  \checkenv\titlepage
+  \leftline{\titlefonts\rm #1}
+  % print a rule at the page bottom also.
+  \finishedtitlepagefalse
+  \vskip4pt \hrule height 4pt width \hsize \vskip4pt
+}
+
+\parseargdef\subtitle{%
+  \checkenv\titlepage
+  {\subtitlefont \rightline{#1}}%
+}
+
+% @author should come last, but may come many times.
+% It can also be used inside @quotation.
+%
+\parseargdef\author{%
+  \def\temp{\quotation}%
+  \ifx\thisenv\temp
+    \def\quotationauthor{#1}% printed in \Equotation.
+  \else
+    \checkenv\titlepage
+    \ifseenauthor\else \vskip 0pt plus 1filll \seenauthortrue \fi
+    {\authorfont \leftline{#1}}%
+  \fi
+}
+
+
+%%% Set up page headings and footings.
+
+\let\thispage=\folio
+
+\newtoks\evenheadline    % headline on even pages
+\newtoks\oddheadline     % headline on odd pages
+\newtoks\evenfootline    % footline on even pages
+\newtoks\oddfootline     % footline on odd pages
+
+% Now make TeX use those variables
+\headline={{\textfonts\rm \ifodd\pageno \the\oddheadline
+                            \else \the\evenheadline \fi}}
+\footline={{\textfonts\rm \ifodd\pageno \the\oddfootline
+                            \else \the\evenfootline \fi}\HEADINGShook}
+\let\HEADINGShook=\relax
+
+% Commands to set those variables.
+% For example, this is what  @headings on  does
+% @evenheading @thistitle|@thispage|@thischapter
+% @oddheading @thischapter|@thispage|@thistitle
+% @evenfooting @thisfile||
+% @oddfooting ||@thisfile
+
+
+\def\evenheading{\parsearg\evenheadingxxx}
+\def\evenheadingxxx #1{\evenheadingyyy #1\|\|\|\|\finish}
+\def\evenheadingyyy #1\|#2\|#3\|#4\finish{%
+\global\evenheadline={\rlap{\centerline{#2}}\line{#1\hfil#3}}}
+
+\def\oddheading{\parsearg\oddheadingxxx}
+\def\oddheadingxxx #1{\oddheadingyyy #1\|\|\|\|\finish}
+\def\oddheadingyyy #1\|#2\|#3\|#4\finish{%
+\global\oddheadline={\rlap{\centerline{#2}}\line{#1\hfil#3}}}
+
+\parseargdef\everyheading{\oddheadingxxx{#1}\evenheadingxxx{#1}}%
+
+\def\evenfooting{\parsearg\evenfootingxxx}
+\def\evenfootingxxx #1{\evenfootingyyy #1\|\|\|\|\finish}
+\def\evenfootingyyy #1\|#2\|#3\|#4\finish{%
+\global\evenfootline={\rlap{\centerline{#2}}\line{#1\hfil#3}}}
+
+\def\oddfooting{\parsearg\oddfootingxxx}
+\def\oddfootingxxx #1{\oddfootingyyy #1\|\|\|\|\finish}
+\def\oddfootingyyy #1\|#2\|#3\|#4\finish{%
+  \global\oddfootline = {\rlap{\centerline{#2}}\line{#1\hfil#3}}%
+  %
+  % Leave some space for the footline.  Hopefully ok to assume
+  % @evenfooting will not be used by itself.
+  \global\advance\pageheight by -12pt
+  \global\advance\vsize by -12pt
+}
+
+\parseargdef\everyfooting{\oddfootingxxx{#1}\evenfootingxxx{#1}}
+
+% @evenheadingmarks top     \thischapter <- chapter at the top of a page
+% @evenheadingmarks bottom  \thischapter <- chapter at the bottom of a page
+%
+% The same set of arguments for:
+%
+% @oddheadingmarks
+% @evenfootingmarks
+% @oddfootingmarks
+% @everyheadingmarks
+% @everyfootingmarks
+
+\def\evenheadingmarks{\headingmarks{even}{heading}}
+\def\oddheadingmarks{\headingmarks{odd}{heading}}
+\def\evenfootingmarks{\headingmarks{even}{footing}}
+\def\oddfootingmarks{\headingmarks{odd}{footing}}
+\def\everyheadingmarks#1 {\headingmarks{even}{heading}{#1}
+                          \headingmarks{odd}{heading}{#1} }
+\def\everyfootingmarks#1 {\headingmarks{even}{footing}{#1}
+                          \headingmarks{odd}{footing}{#1} }
+% #1 = even/odd, #2 = heading/footing, #3 = top/bottom.
+\def\headingmarks#1#2#3 {%
+  \expandafter\let\expandafter\temp \csname get#3headingmarks\endcsname
+  \global\expandafter\let\csname get#1#2marks\endcsname \temp
+}
+
+\everyheadingmarks bottom
+\everyfootingmarks bottom
+
+% @headings double      turns headings on for double-sided printing.
+% @headings single      turns headings on for single-sided printing.
+% @headings off         turns them off.
+% @headings on          same as @headings double, retained for compatibility.
+% @headings after       turns on double-sided headings after this page.
+% @headings doubleafter turns on double-sided headings after this page.
+% @headings singleafter turns on single-sided headings after this page.
+% By default, they are off at the start of a document,
+% and turned `on' after @end titlepage.
+
+\def\headings #1 {\csname HEADINGS#1\endcsname}
+
+\def\HEADINGSoff{%
+\global\evenheadline={\hfil} \global\evenfootline={\hfil}
+\global\oddheadline={\hfil} \global\oddfootline={\hfil}}
+\HEADINGSoff
+% When we turn headings on, set the page number to 1.
+% For double-sided printing, put current file name in lower left corner,
+% chapter name on inside top of right hand pages, document
+% title on inside top of left hand pages, and page numbers on outside top
+% edge of all pages.
+\def\HEADINGSdouble{%
+\global\pageno=1
+\global\evenfootline={\hfil}
+\global\oddfootline={\hfil}
+\global\evenheadline={\line{\folio\hfil\thistitle}}
+\global\oddheadline={\line{\thischapter\hfil\folio}}
+\global\let\contentsalignmacro = \chapoddpage
+}
+\let\contentsalignmacro = \chappager
+
+% For single-sided printing, chapter title goes across top left of page,
+% page number on top right.
+\def\HEADINGSsingle{%
+\global\pageno=1
+\global\evenfootline={\hfil}
+\global\oddfootline={\hfil}
+\global\evenheadline={\line{\thischapter\hfil\folio}}
+\global\oddheadline={\line{\thischapter\hfil\folio}}
+\global\let\contentsalignmacro = \chappager
+}
+\def\HEADINGSon{\HEADINGSdouble}
+
+\def\HEADINGSafter{\let\HEADINGShook=\HEADINGSdoublex}
+\let\HEADINGSdoubleafter=\HEADINGSafter
+\def\HEADINGSdoublex{%
+\global\evenfootline={\hfil}
+\global\oddfootline={\hfil}
+\global\evenheadline={\line{\folio\hfil\thistitle}}
+\global\oddheadline={\line{\thischapter\hfil\folio}}
+\global\let\contentsalignmacro = \chapoddpage
+}
+
+\def\HEADINGSsingleafter{\let\HEADINGShook=\HEADINGSsinglex}
+\def\HEADINGSsinglex{%
+\global\evenfootline={\hfil}
+\global\oddfootline={\hfil}
+\global\evenheadline={\line{\thischapter\hfil\folio}}
+\global\oddheadline={\line{\thischapter\hfil\folio}}
+\global\let\contentsalignmacro = \chappager
+}
+
+% Subroutines used in generating headings
+% This produces Day Month Year style of output.
+% Only define if not already defined, in case a txi-??.tex file has set
+% up a different format (e.g., txi-cs.tex does this).
+\ifx\today\undefined
+\def\today{%
+  \number\day\space
+  \ifcase\month
+  \or\putwordMJan\or\putwordMFeb\or\putwordMMar\or\putwordMApr
+  \or\putwordMMay\or\putwordMJun\or\putwordMJul\or\putwordMAug
+  \or\putwordMSep\or\putwordMOct\or\putwordMNov\or\putwordMDec
+  \fi
+  \space\number\year}
+\fi
+
+% @settitle line...  specifies the title of the document, for headings.
+% It generates no output of its own.
+\def\thistitle{\putwordNoTitle}
+\def\settitle{\parsearg{\gdef\thistitle}}
+
+
+\message{tables,}
+% Tables -- @table, @ftable, @vtable, @item(x).
+
+% default indentation of table text
+\newdimen\tableindent \tableindent=.8in
+% default indentation of @itemize and @enumerate text
+\newdimen\itemindent  \itemindent=.3in
+% margin between end of table item and start of table text.
+\newdimen\itemmargin  \itemmargin=.1in
+
+% used internally for \itemindent minus \itemmargin
+\newdimen\itemmax
+
+% Note @table, @ftable, and @vtable define @item, @itemx, etc., with
+% these defs.
+% They also define \itemindex
+% to index the item name in whatever manner is desired (perhaps none).
+
+\newif\ifitemxneedsnegativevskip
+
+\def\itemxpar{\par\ifitemxneedsnegativevskip\nobreak\vskip-\parskip\nobreak\fi}
+
+\def\internalBitem{\smallbreak \parsearg\itemzzz}
+\def\internalBitemx{\itemxpar \parsearg\itemzzz}
+
+\def\itemzzz #1{\begingroup %
+  \advance\hsize by -\rightskip
+  \advance\hsize by -\tableindent
+  \setbox0=\hbox{\itemindicate{#1}}%
+  \itemindex{#1}%
+  \nobreak % This prevents a break before @itemx.
+  %
+  % If the item text does not fit in the space we have, put it on a line
+  % by itself, and do not allow a page break either before or after that
+  % line.  We do not start a paragraph here because then if the next
+  % command is, e.g., @kindex, the whatsit would get put into the
+  % horizontal list on a line by itself, resulting in extra blank space.
+  \ifdim \wd0>\itemmax
+    %
+    % Make this a paragraph so we get the \parskip glue and wrapping,
+    % but leave it ragged-right.
+    \begingroup
+      \advance\leftskip by-\tableindent
+      \advance\hsize by\tableindent
+      \advance\rightskip by0pt plus1fil
+      \leavevmode\unhbox0\par
+    \endgroup
+    %
+    % We're going to be starting a paragraph, but we don't want the
+    % \parskip glue -- logically it's part of the @item we just started.
+    \nobreak \vskip-\parskip
+    %
+    % Stop a page break at the \parskip glue coming up.  However, if
+    % what follows is an environment such as @example, there will be no
+    % \parskip glue; then the negative vskip we just inserted would
+    % cause the example and the item to crash together.  So we use this
+    % bizarre value of 10001 as a signal to \aboveenvbreak to insert
+    % \parskip glue after all.  Section titles are handled this way also.
+    % 
+    \penalty 10001
+    \endgroup
+    \itemxneedsnegativevskipfalse
+  \else
+    % The item text fits into the space.  Start a paragraph, so that the
+    % following text (if any) will end up on the same line.
+    \noindent
+    % Do this with kerns and \unhbox so that if there is a footnote in
+    % the item text, it can migrate to the main vertical list and
+    % eventually be printed.
+    \nobreak\kern-\tableindent
+    \dimen0 = \itemmax  \advance\dimen0 by \itemmargin \advance\dimen0 by -\wd0
+    \unhbox0
+    \nobreak\kern\dimen0
+    \endgroup
+    \itemxneedsnegativevskiptrue
+  \fi
+}
+
+\def\item{\errmessage{@item while not in a list environment}}
+\def\itemx{\errmessage{@itemx while not in a list environment}}
+
+% @table, @ftable, @vtable.
+\envdef\table{%
+  \let\itemindex\gobble
+  \tablecheck{table}%
+}
+\envdef\ftable{%
+  \def\itemindex ##1{\doind {fn}{\code{##1}}}%
+  \tablecheck{ftable}%
+}
+\envdef\vtable{%
+  \def\itemindex ##1{\doind {vr}{\code{##1}}}%
+  \tablecheck{vtable}%
+}
+\def\tablecheck#1{%
+  \ifnum \the\catcode`\^^M=\active
+    \endgroup
+    \errmessage{This command won't work in this context; perhaps the problem is
+      that we are \inenvironment\thisenv}%
+    \def\next{\doignore{#1}}%
+  \else
+    \let\next\tablex
+  \fi
+  \next
+}
+\def\tablex#1{%
+  \def\itemindicate{#1}%
+  \parsearg\tabley
+}
+\def\tabley#1{%
+  {%
+    \makevalueexpandable
+    \edef\temp{\noexpand\tablez #1\space\space\space}%
+    \expandafter
+  }\temp \endtablez
+}
+\def\tablez #1 #2 #3 #4\endtablez{%
+  \aboveenvbreak
+  \ifnum 0#1>0 \advance \leftskip by #1\mil \fi
+  \ifnum 0#2>0 \tableindent=#2\mil \fi
+  \ifnum 0#3>0 \advance \rightskip by #3\mil \fi
+  \itemmax=\tableindent
+  \advance \itemmax by -\itemmargin
+  \advance \leftskip by \tableindent
+  \exdentamount=\tableindent
+  \parindent = 0pt
+  \parskip = \smallskipamount
+  \ifdim \parskip=0pt \parskip=2pt \fi
+  \let\item = \internalBitem
+  \let\itemx = \internalBitemx
+}
+\def\Etable{\endgraf\afterenvbreak}
+\let\Eftable\Etable
+\let\Evtable\Etable
+\let\Eitemize\Etable
+\let\Eenumerate\Etable
+
+% This is the counter used by @enumerate, which is really @itemize
+
+\newcount \itemno
+
+\envdef\itemize{\parsearg\doitemize}
+
+\def\doitemize#1{%
+  \aboveenvbreak
+  \itemmax=\itemindent
+  \advance\itemmax by -\itemmargin
+  \advance\leftskip by \itemindent
+  \exdentamount=\itemindent
+  \parindent=0pt
+  \parskip=\smallskipamount
+  \ifdim\parskip=0pt \parskip=2pt \fi
+  \def\itemcontents{#1}%
+  % @itemize with no arg is equivalent to @itemize @bullet.
+  \ifx\itemcontents\empty\def\itemcontents{\bullet}\fi
+  \let\item=\itemizeitem
+}
+
+% Definition of @item while inside @itemize and @enumerate.
+%
+\def\itemizeitem{%
+  \advance\itemno by 1  % for enumerations
+  {\let\par=\endgraf \smallbreak}% reasonable place to break
+  {%
+   % If the document has an @itemize directly after a section title, a
+   % \nobreak will be last on the list, and \sectionheading will have
+   % done a \vskip-\parskip.  In that case, we don't want to zero
+   % parskip, or the item text will crash with the heading.  On the
+   % other hand, when there is normal text preceding the item (as there
+   % usually is), we do want to zero parskip, or there would be too much
+   % space.  In that case, we won't have a \nobreak before.  At least
+   % that's the theory.
+   \ifnum\lastpenalty<10000 \parskip=0in \fi
+   \noindent
+   \hbox to 0pt{\hss \itemcontents \kern\itemmargin}%
+   \vadjust{\penalty 1200}}% not good to break after first line of item.
+  \flushcr
+}
+
+% \splitoff TOKENS\endmark defines \first to be the first token in
+% TOKENS, and \rest to be the remainder.
+%
+\def\splitoff#1#2\endmark{\def\first{#1}\def\rest{#2}}%
+
+% Allow an optional argument of an uppercase letter, lowercase letter,
+% or number, to specify the first label in the enumerated list.  No
+% argument is the same as `1'.
+%
+\envparseargdef\enumerate{\enumeratey #1  \endenumeratey}
+\def\enumeratey #1 #2\endenumeratey{%
+  % If we were given no argument, pretend we were given `1'.
+  \def\thearg{#1}%
+  \ifx\thearg\empty \def\thearg{1}\fi
+  %
+  % Detect if the argument is a single token.  If so, it might be a
+  % letter.  Otherwise, the only valid thing it can be is a number.
+  % (We will always have one token, because of the test we just made.
+  % This is a good thing, since \splitoff doesn't work given nothing at
+  % all -- the first parameter is undelimited.)
+  \expandafter\splitoff\thearg\endmark
+  \ifx\rest\empty
+    % Only one token in the argument.  It could still be anything.
+    % A ``lowercase letter'' is one whose \lccode is nonzero.
+    % An ``uppercase letter'' is one whose \lccode is both nonzero, and
+    %   not equal to itself.
+    % Otherwise, we assume it's a number.
+    %
+    % We need the \relax at the end of the \ifnum lines to stop TeX from
+    % continuing to look for a <number>.
+    %
+    \ifnum\lccode\expandafter`\thearg=0\relax
+      \numericenumerate % a number (we hope)
+    \else
+      % It's a letter.
+      \ifnum\lccode\expandafter`\thearg=\expandafter`\thearg\relax
+        \lowercaseenumerate % lowercase letter
+      \else
+        \uppercaseenumerate % uppercase letter
+      \fi
+    \fi
+  \else
+    % Multiple tokens in the argument.  We hope it's a number.
+    \numericenumerate
+  \fi
+}
+
+% An @enumerate whose labels are integers.  The starting integer is
+% given in \thearg.
+%
+\def\numericenumerate{%
+  \itemno = \thearg
+  \startenumeration{\the\itemno}%
+}
+
+% The starting (lowercase) letter is in \thearg.
+\def\lowercaseenumerate{%
+  \itemno = \expandafter`\thearg
+  \startenumeration{%
+    % Be sure we're not beyond the end of the alphabet.
+    \ifnum\itemno=0
+      \errmessage{No more lowercase letters in @enumerate; get a bigger
+                  alphabet}%
+    \fi
+    \char\lccode\itemno
+  }%
+}
+
+% The starting (uppercase) letter is in \thearg.
+\def\uppercaseenumerate{%
+  \itemno = \expandafter`\thearg
+  \startenumeration{%
+    % Be sure we're not beyond the end of the alphabet.
+    \ifnum\itemno=0
+      \errmessage{No more uppercase letters in @enumerate; get a bigger
+                  alphabet}
+    \fi
+    \char\uccode\itemno
+  }%
+}
+
+% Call \doitemize, adding a period to the first argument and supplying the
+% common last two arguments.  Also subtract one from the initial value in
+% \itemno, since @item increments \itemno.
+%
+\def\startenumeration#1{%
+  \advance\itemno by -1
+  \doitemize{#1.}\flushcr
+}
+
+% @alphaenumerate and @capsenumerate are abbreviations for giving an arg
+% to @enumerate.
+%
+\def\alphaenumerate{\enumerate{a}}
+\def\capsenumerate{\enumerate{A}}
+\def\Ealphaenumerate{\Eenumerate}
+\def\Ecapsenumerate{\Eenumerate}
+
+
+% @multitable macros
+% Amy Hendrickson, 8/18/94, 3/6/96
+%
+% @multitable ... @end multitable will make as many columns as desired.
+% Contents of each column will wrap at width given in preamble.  Width
+% can be specified either with sample text given in a template line,
+% or in percent of \hsize, the current width of text on page.
+
+% Table can continue over pages but will only break between lines.
+
+% To make preamble:
+%
+% Either define widths of columns in terms of percent of \hsize:
+%   @multitable @columnfractions .25 .3 .45
+%   @item ...
+%
+%   Numbers following @columnfractions are the percent of the total
+%   current hsize to be used for each column. You may use as many
+%   columns as desired.
+
+
+% Or use a template:
+%   @multitable {Column 1 template} {Column 2 template} {Column 3 template}
+%   @item ...
+%   using the widest term desired in each column.
+
+% Each new table line starts with @item, each subsequent new column
+% starts with @tab. Empty columns may be produced by supplying @tab's
+% with nothing between them for as many times as empty columns are needed,
+% ie, @tab@tab@tab will produce two empty columns.
+
+% @item, @tab do not need to be on their own lines, but it will not hurt
+% if they are.
+
+% Sample multitable:
+
+%   @multitable {Column 1 template} {Column 2 template} {Column 3 template}
+%   @item first col stuff @tab second col stuff @tab third col
+%   @item
+%   first col stuff
+%   @tab
+%   second col stuff
+%   @tab
+%   third col
+%   @item first col stuff @tab second col stuff
+%   @tab Many paragraphs of text may be used in any column.
+%
+%         They will wrap at the width determined by the template.
+%   @item@tab@tab This will be in third column.
+%   @end multitable
+
+% Default dimensions may be reset by user.
+% @multitableparskip is vertical space between paragraphs in table.
+% @multitableparindent is paragraph indent in table.
+% @multitablecolmargin is horizontal space to be left between columns.
+% @multitablelinespace is space to leave between table items, baseline
+%                                                            to baseline.
+%   0pt means it depends on current normal line spacing.
+%
+\newskip\multitableparskip
+\newskip\multitableparindent
+\newdimen\multitablecolspace
+\newskip\multitablelinespace
+\multitableparskip=0pt
+\multitableparindent=6pt
+\multitablecolspace=12pt
+\multitablelinespace=0pt
+
+% Macros used to set up halign preamble:
+%
+\let\endsetuptable\relax
+\def\xendsetuptable{\endsetuptable}
+\let\columnfractions\relax
+\def\xcolumnfractions{\columnfractions}
+\newif\ifsetpercent
+
+% #1 is the @columnfraction, usually a decimal number like .5, but might
+% be just 1.  We just use it, whatever it is.
+%
+\def\pickupwholefraction#1 {%
+  \global\advance\colcount by 1
+  \expandafter\xdef\csname col\the\colcount\endcsname{#1\hsize}%
+  \setuptable
+}
+
+\newcount\colcount
+\def\setuptable#1{%
+  \def\firstarg{#1}%
+  \ifx\firstarg\xendsetuptable
+    \let\go = \relax
+  \else
+    \ifx\firstarg\xcolumnfractions
+      \global\setpercenttrue
+    \else
+      \ifsetpercent
+         \let\go\pickupwholefraction
+      \else
+         \global\advance\colcount by 1
+         \setbox0=\hbox{#1\unskip\space}% Add a normal word space as a
+                   % separator; typically that is always in the input, anyway.
+         \expandafter\xdef\csname col\the\colcount\endcsname{\the\wd0}%
+      \fi
+    \fi
+    \ifx\go\pickupwholefraction
+      % Put the argument back for the \pickupwholefraction call, so
+      % we'll always have a period there to be parsed.
+      \def\go{\pickupwholefraction#1}%
+    \else
+      \let\go = \setuptable
+    \fi%
+  \fi
+  \go
+}
+
+% multitable-only commands.
+%
+% @headitem starts a heading row, which we typeset in bold.
+% Assignments have to be global since we are inside the implicit group
+% of an alignment entry.  Note that \everycr resets \everytab.
+\def\headitem{\checkenv\multitable \crcr \global\everytab={\bf}\the\everytab}%
+%
+% A \tab used to include \hskip1sp.  But then the space in a template
+% line is not enough.  That is bad.  So let's go back to just `&' until
+% we encounter the problem it was intended to solve again.
+%					--karl, nathan@acm.org, 20apr99.
+\def\tab{\checkenv\multitable &\the\everytab}%
+
+% @multitable ... @end multitable definitions:
+%
+\newtoks\everytab  % insert after every tab.
+%
+\envdef\multitable{%
+  \vskip\parskip
+  \startsavinginserts
+  %
+  % @item within a multitable starts a normal row.
+  % We use \def instead of \let so that if one of the multitable entries
+  % contains an @itemize, we don't choke on the \item (seen as \crcr aka
+  % \endtemplate) expanding \doitemize.
+  \def\item{\crcr}%
+  %
+  \tolerance=9500
+  \hbadness=9500
+  \setmultitablespacing
+  \parskip=\multitableparskip
+  \parindent=\multitableparindent
+  \overfullrule=0pt
+  \global\colcount=0
+  %
+  \everycr = {%
+    \noalign{%
+      \global\everytab={}%
+      \global\colcount=0 % Reset the column counter.
+      % Check for saved footnotes, etc.
+      \checkinserts
+      % Keeps underfull box messages off when table breaks over pages.
+      %\filbreak
+	% Maybe so, but it also creates really weird page breaks when the
+	% table breaks over pages. Wouldn't \vfil be better?  Wait until the
+	% problem manifests itself, so it can be fixed for real --karl.
+    }%
+  }%
+  %
+  \parsearg\domultitable
+}
+\def\domultitable#1{%
+  % To parse everything between @multitable and @item:
+  \setuptable#1 \endsetuptable
+  %
+  % This preamble sets up a generic column definition, which will
+  % be used as many times as user calls for columns.
+  % \vtop will set a single line and will also let text wrap and
+  % continue for many paragraphs if desired.
+  \halign\bgroup &%
+    \global\advance\colcount by 1
+    \multistrut
+    \vtop{%
+      % Use the current \colcount to find the correct column width:
+      \hsize=\expandafter\csname col\the\colcount\endcsname
+      %
+      % In order to keep entries from bumping into each other
+      % we will add a \leftskip of \multitablecolspace to all columns after
+      % the first one.
+      %
+      % If a template has been used, we will add \multitablecolspace
+      % to the width of each template entry.
+      %
+      % If the user has set preamble in terms of percent of \hsize we will
+      % use that dimension as the width of the column, and the \leftskip
+      % will keep entries from bumping into each other.  Table will start at
+      % left margin and final column will justify at right margin.
+      %
+      % Make sure we don't inherit \rightskip from the outer environment.
+      \rightskip=0pt
+      \ifnum\colcount=1
+	% The first column will be indented with the surrounding text.
+	\advance\hsize by\leftskip
+      \else
+	\ifsetpercent \else
+	  % If user has not set preamble in terms of percent of \hsize
+	  % we will advance \hsize by \multitablecolspace.
+	  \advance\hsize by \multitablecolspace
+	\fi
+       % In either case we will make \leftskip=\multitablecolspace:
+      \leftskip=\multitablecolspace
+      \fi
+      % Ignoring space at the beginning and end avoids an occasional spurious
+      % blank line, when TeX decides to break the line at the space before the
+      % box from the multistrut, so the strut ends up on a line by itself.
+      % For example:
+      % @multitable @columnfractions .11 .89
+      % @item @code{#}
+      % @tab Legal holiday which is valid in major parts of the whole country.
+      % Is automatically provided with highlighting sequences respectively
+      % marking characters.
+      \noindent\ignorespaces##\unskip\multistrut
+    }\cr
+}
+\def\Emultitable{%
+  \crcr
+  \egroup % end the \halign
+  \global\setpercentfalse
+}
+
+\def\setmultitablespacing{%
+  \def\multistrut{\strut}% just use the standard line spacing
+  %
+  % Compute \multitablelinespace (if not defined by user) for use in
+  % \multitableparskip calculation.  We used define \multistrut based on
+  % this, but (ironically) that caused the spacing to be off.
+  % See bug-texinfo report from Werner Lemberg, 31 Oct 2004 12:52:20 +0100.
+\ifdim\multitablelinespace=0pt
+\setbox0=\vbox{X}\global\multitablelinespace=\the\baselineskip
+\global\advance\multitablelinespace by-\ht0
+\fi
+%% Test to see if parskip is larger than space between lines of
+%% table. If not, do nothing.
+%%        If so, set to same dimension as multitablelinespace.
+\ifdim\multitableparskip>\multitablelinespace
+\global\multitableparskip=\multitablelinespace
+\global\advance\multitableparskip-7pt %% to keep parskip somewhat smaller
+                                      %% than skip between lines in the table.
+\fi%
+\ifdim\multitableparskip=0pt
+\global\multitableparskip=\multitablelinespace
+\global\advance\multitableparskip-7pt %% to keep parskip somewhat smaller
+                                      %% than skip between lines in the table.
+\fi}
+
+
+\message{conditionals,}
+
+% @iftex, @ifnotdocbook, @ifnothtml, @ifnotinfo, @ifnotplaintext,
+% @ifnotxml always succeed.  They currently do nothing; we don't
+% attempt to check whether the conditionals are properly nested.  But we
+% have to remember that they are conditionals, so that @end doesn't
+% attempt to close an environment group.
+%
+\def\makecond#1{%
+  \expandafter\let\csname #1\endcsname = \relax
+  \expandafter\let\csname iscond.#1\endcsname = 1
+}
+\makecond{iftex}
+\makecond{ifnotdocbook}
+\makecond{ifnothtml}
+\makecond{ifnotinfo}
+\makecond{ifnotplaintext}
+\makecond{ifnotxml}
+
+% Ignore @ignore, @ifhtml, @ifinfo, and the like.
+%
+\def\direntry{\doignore{direntry}}
+\def\documentdescription{\doignore{documentdescription}}
+\def\docbook{\doignore{docbook}}
+\def\html{\doignore{html}}
+\def\ifdocbook{\doignore{ifdocbook}}
+\def\ifhtml{\doignore{ifhtml}}
+\def\ifinfo{\doignore{ifinfo}}
+\def\ifnottex{\doignore{ifnottex}}
+\def\ifplaintext{\doignore{ifplaintext}}
+\def\ifxml{\doignore{ifxml}}
+\def\ignore{\doignore{ignore}}
+\def\menu{\doignore{menu}}
+\def\xml{\doignore{xml}}
+
+% Ignore text until a line `@end #1', keeping track of nested conditionals.
+%
+% A count to remember the depth of nesting.
+\newcount\doignorecount
+
+\def\doignore#1{\begingroup
+  % Scan in ``verbatim'' mode:
+  \obeylines
+  \catcode`\@ = \other
+  \catcode`\{ = \other
+  \catcode`\} = \other
+  %
+  % Make sure that spaces turn into tokens that match what \doignoretext wants.
+  \spaceisspace
+  %
+  % Count number of #1's that we've seen.
+  \doignorecount = 0
+  %
+  % Swallow text until we reach the matching `@end #1'.
+  \dodoignore{#1}%
+}
+
+{ \catcode`_=11 % We want to use \_STOP_ which cannot appear in texinfo source.
+  \obeylines %
+  %
+  \gdef\dodoignore#1{%
+    % #1 contains the command name as a string, e.g., `ifinfo'.
+    %
+    % Define a command to find the next `@end #1'.
+    \long\def\doignoretext##1^^M@end #1{%
+      \doignoretextyyy##1^^M@#1\_STOP_}%
+    %
+    % And this command to find another #1 command, at the beginning of a
+    % line.  (Otherwise, we would consider a line `@c @ifset', for
+    % example, to count as an @ifset for nesting.)
+    \long\def\doignoretextyyy##1^^M@#1##2\_STOP_{\doignoreyyy{##2}\_STOP_}%
+    %
+    % And now expand that command.
+    \doignoretext ^^M%
+  }%
+}
+
+\def\doignoreyyy#1{%
+  \def\temp{#1}%
+  \ifx\temp\empty			% Nothing found.
+    \let\next\doignoretextzzz
+  \else					% Found a nested condition, ...
+    \advance\doignorecount by 1
+    \let\next\doignoretextyyy		% ..., look for another.
+    % If we're here, #1 ends with ^^M\ifinfo (for example).
+  \fi
+  \next #1% the token \_STOP_ is present just after this macro.
+}
+
+% We have to swallow the remaining "\_STOP_".
+%
+\def\doignoretextzzz#1{%
+  \ifnum\doignorecount = 0	% We have just found the outermost @end.
+    \let\next\enddoignore
+  \else				% Still inside a nested condition.
+    \advance\doignorecount by -1
+    \let\next\doignoretext      % Look for the next @end.
+  \fi
+  \next
+}
+
+% Finish off ignored text.
+{ \obeylines%
+  % Ignore anything after the last `@end #1'; this matters in verbatim
+  % environments, where otherwise the newline after an ignored conditional
+  % would result in a blank line in the output.
+  \gdef\enddoignore#1^^M{\endgroup\ignorespaces}%
+}
+
+
+% @set VAR sets the variable VAR to an empty value.
+% @set VAR REST-OF-LINE sets VAR to the value REST-OF-LINE.
+%
+% Since we want to separate VAR from REST-OF-LINE (which might be
+% empty), we can't just use \parsearg; we have to insert a space of our
+% own to delimit the rest of the line, and then take it out again if we
+% didn't need it.
+% We rely on the fact that \parsearg sets \catcode`\ =10.
+%
+\parseargdef\set{\setyyy#1 \endsetyyy}
+\def\setyyy#1 #2\endsetyyy{%
+  {%
+    \makevalueexpandable
+    \def\temp{#2}%
+    \edef\next{\gdef\makecsname{SET#1}}%
+    \ifx\temp\empty
+      \next{}%
+    \else
+      \setzzz#2\endsetzzz
+    \fi
+  }%
+}
+% Remove the trailing space \setxxx inserted.
+\def\setzzz#1 \endsetzzz{\next{#1}}
+
+% @clear VAR clears (i.e., unsets) the variable VAR.
+%
+\parseargdef\clear{%
+  {%
+    \makevalueexpandable
+    \global\expandafter\let\csname SET#1\endcsname=\relax
+  }%
+}
+
+% @value{foo} gets the text saved in variable foo.
+\def\value{\begingroup\makevalueexpandable\valuexxx}
+\def\valuexxx#1{\expandablevalue{#1}\endgroup}
+{
+  \catcode`\- = \active \catcode`\_ = \active
+  %
+  \gdef\makevalueexpandable{%
+    \let\value = \expandablevalue
+    % We don't want these characters active, ...
+    \catcode`\-=\other \catcode`\_=\other
+    % ..., but we might end up with active ones in the argument if
+    % we're called from @code, as @code{@value{foo-bar_}}, though.
+    % So \let them to their normal equivalents.
+    \let-\realdash \let_\normalunderscore
+  }
+}
+
+% We have this subroutine so that we can handle at least some @value's
+% properly in indexes (we call \makevalueexpandable in \indexdummies).
+% The command has to be fully expandable (if the variable is set), since
+% the result winds up in the index file.  This means that if the
+% variable's value contains other Texinfo commands, it's almost certain
+% it will fail (although perhaps we could fix that with sufficient work
+% to do a one-level expansion on the result, instead of complete).
+%
+\def\expandablevalue#1{%
+  \expandafter\ifx\csname SET#1\endcsname\relax
+    {[No value for ``#1'']}%
+    \message{Variable `#1', used in @value, is not set.}%
+  \else
+    \csname SET#1\endcsname
+  \fi
+}
+
+% @ifset VAR ... @end ifset reads the `...' iff VAR has been defined
+% with @set.
+%
+% To get special treatment of `@end ifset,' call \makeond and the redefine.
+%
+\makecond{ifset}
+\def\ifset{\parsearg{\doifset{\let\next=\ifsetfail}}}
+\def\doifset#1#2{%
+  {%
+    \makevalueexpandable
+    \let\next=\empty
+    \expandafter\ifx\csname SET#2\endcsname\relax
+      #1% If not set, redefine \next.
+    \fi
+    \expandafter
+  }\next
+}
+\def\ifsetfail{\doignore{ifset}}
+
+% @ifclear VAR ... @end ifclear reads the `...' iff VAR has never been
+% defined with @set, or has been undefined with @clear.
+%
+% The `\else' inside the `\doifset' parameter is a trick to reuse the
+% above code: if the variable is not set, do nothing, if it is set,
+% then redefine \next to \ifclearfail.
+%
+\makecond{ifclear}
+\def\ifclear{\parsearg{\doifset{\else \let\next=\ifclearfail}}}
+\def\ifclearfail{\doignore{ifclear}}
+
+% @dircategory CATEGORY  -- specify a category of the dir file
+% which this file should belong to.  Ignore this in TeX.
+\let\dircategory=\comment
+
+% @defininfoenclose.
+\let\definfoenclose=\comment
+
+
+\message{indexing,}
+% Index generation facilities
+
+% Define \newwrite to be identical to plain tex's \newwrite
+% except not \outer, so it can be used within macros and \if's.
+\edef\newwrite{\makecsname{ptexnewwrite}}
+
+% \newindex {foo} defines an index named foo.
+% It automatically defines \fooindex such that
+% \fooindex ...rest of line... puts an entry in the index foo.
+% It also defines \fooindfile to be the number of the output channel for
+% the file that accumulates this index.  The file's extension is foo.
+% The name of an index should be no more than 2 characters long
+% for the sake of vms.
+%
+\def\newindex#1{%
+  \iflinks
+    \expandafter\newwrite \csname#1indfile\endcsname
+    \openout \csname#1indfile\endcsname \jobname.#1 % Open the file
+  \fi
+  \expandafter\xdef\csname#1index\endcsname{%     % Define @#1index
+    \noexpand\doindex{#1}}
+}
+
+% @defindex foo  ==  \newindex{foo}
+%
+\def\defindex{\parsearg\newindex}
+
+% Define @defcodeindex, like @defindex except put all entries in @code.
+%
+\def\defcodeindex{\parsearg\newcodeindex}
+%
+\def\newcodeindex#1{%
+  \iflinks
+    \expandafter\newwrite \csname#1indfile\endcsname
+    \openout \csname#1indfile\endcsname \jobname.#1
+  \fi
+  \expandafter\xdef\csname#1index\endcsname{%
+    \noexpand\docodeindex{#1}}%
+}
+
+
+% @synindex foo bar    makes index foo feed into index bar.
+% Do this instead of @defindex foo if you don't want it as a separate index.
+%
+% @syncodeindex foo bar   similar, but put all entries made for index foo
+% inside @code.
+%
+\def\synindex#1 #2 {\dosynindex\doindex{#1}{#2}}
+\def\syncodeindex#1 #2 {\dosynindex\docodeindex{#1}{#2}}
+
+% #1 is \doindex or \docodeindex, #2 the index getting redefined (foo),
+% #3 the target index (bar).
+\def\dosynindex#1#2#3{%
+  % Only do \closeout if we haven't already done it, else we'll end up
+  % closing the target index.
+  \expandafter \ifx\csname donesynindex#2\endcsname \undefined
+    % The \closeout helps reduce unnecessary open files; the limit on the
+    % Acorn RISC OS is a mere 16 files.
+    \expandafter\closeout\csname#2indfile\endcsname
+    \expandafter\let\csname\donesynindex#2\endcsname = 1
+  \fi
+  % redefine \fooindfile:
+  \expandafter\let\expandafter\temp\expandafter=\csname#3indfile\endcsname
+  \expandafter\let\csname#2indfile\endcsname=\temp
+  % redefine \fooindex:
+  \expandafter\xdef\csname#2index\endcsname{\noexpand#1{#3}}%
+}
+
+% Define \doindex, the driver for all \fooindex macros.
+% Argument #1 is generated by the calling \fooindex macro,
+%  and it is "foo", the name of the index.
+
+% \doindex just uses \parsearg; it calls \doind for the actual work.
+% This is because \doind is more useful to call from other macros.
+
+% There is also \dosubind {index}{topic}{subtopic}
+% which makes an entry in a two-level index such as the operation index.
+
+\def\doindex#1{\edef\indexname{#1}\parsearg\singleindexer}
+\def\singleindexer #1{\doind{\indexname}{#1}}
+
+% like the previous two, but they put @code around the argument.
+\def\docodeindex#1{\edef\indexname{#1}\parsearg\singlecodeindexer}
+\def\singlecodeindexer #1{\doind{\indexname}{\code{#1}}}
+
+% Take care of Texinfo commands that can appear in an index entry.
+% Since there are some commands we want to expand, and others we don't,
+% we have to laboriously prevent expansion for those that we don't.
+%
+\def\indexdummies{%
+  \escapechar = `\\     % use backslash in output files.
+  \def\@{@}% change to @@ when we switch to @ as escape char in index files.
+  \def\ {\realbackslash\space }%
+  %
+  % Need these in case \tex is in effect and \{ is a \delimiter again.
+  % But can't use \lbracecmd and \rbracecmd because texindex assumes
+  % braces and backslashes are used only as delimiters.
+  \let\{ = \mylbrace
+  \let\} = \myrbrace
+  %
+  % I don't entirely understand this, but when an index entry is
+  % generated from a macro call, the \endinput which \scanmacro inserts
+  % causes processing to be prematurely terminated.  This is,
+  % apparently, because \indexsorttmp is fully expanded, and \endinput
+  % is an expandable command.  The redefinition below makes \endinput
+  % disappear altogether for that purpose -- although logging shows that
+  % processing continues to some further point.  On the other hand, it
+  % seems \endinput does not hurt in the printed index arg, since that
+  % is still getting written without apparent harm.
+  % 
+  % Sample source (mac-idx3.tex, reported by Graham Percival to
+  % help-texinfo, 22may06):
+  % @macro funindex {WORD}
+  % @findex xyz
+  % @end macro
+  % ...
+  % @funindex commtest
+  % 
+  % The above is not enough to reproduce the bug, but it gives the flavor.
+  % 
+  % Sample whatsit resulting:
+  % .@write3{\entry{xyz}{@folio }{@code {xyz@endinput }}}
+  % 
+  % So:
+  \let\endinput = \empty
+  %
+  % Do the redefinitions.
+  \commondummies
+}
+
+% For the aux and toc files, @ is the escape character.  So we want to
+% redefine everything using @ as the escape character (instead of
+% \realbackslash, still used for index files).  When everything uses @,
+% this will be simpler.
+%
+\def\atdummies{%
+  \def\@{@@}%
+  \def\ {@ }%
+  \let\{ = \lbraceatcmd
+  \let\} = \rbraceatcmd
+  %
+  % Do the redefinitions.
+  \commondummies
+  \otherbackslash
+}
+
+% Called from \indexdummies and \atdummies.
+%
+\def\commondummies{%
+  %
+  % \definedummyword defines \#1 as \string\#1\space, thus effectively
+  % preventing its expansion.  This is used only for control% words,
+  % not control letters, because the \space would be incorrect for
+  % control characters, but is needed to separate the control word
+  % from whatever follows.
+  %
+  % For control letters, we have \definedummyletter, which omits the
+  % space.
+  %
+  % These can be used both for control words that take an argument and
+  % those that do not.  If it is followed by {arg} in the input, then
+  % that will dutifully get written to the index (or wherever).
+  %
+  \def\definedummyword  ##1{\def##1{\string##1\space}}%
+  \def\definedummyletter##1{\def##1{\string##1}}%
+  \let\definedummyaccent\definedummyletter
+  %
+  \commondummiesnofonts
+  %
+  \definedummyletter\_%
+  %
+  % Non-English letters.
+  \definedummyword\AA
+  \definedummyword\AE
+  \definedummyword\L
+  \definedummyword\OE
+  \definedummyword\O
+  \definedummyword\aa
+  \definedummyword\ae
+  \definedummyword\l
+  \definedummyword\oe
+  \definedummyword\o
+  \definedummyword\ss
+  \definedummyword\exclamdown
+  \definedummyword\questiondown
+  \definedummyword\ordf
+  \definedummyword\ordm
+  %
+  % Although these internal commands shouldn't show up, sometimes they do.
+  \definedummyword\bf
+  \definedummyword\gtr
+  \definedummyword\hat
+  \definedummyword\less
+  \definedummyword\sf
+  \definedummyword\sl
+  \definedummyword\tclose
+  \definedummyword\tt
+  %
+  \definedummyword\LaTeX
+  \definedummyword\TeX
+  %
+  % Assorted special characters.
+  \definedummyword\bullet
+  \definedummyword\comma
+  \definedummyword\copyright
+  \definedummyword\registeredsymbol
+  \definedummyword\dots
+  \definedummyword\enddots
+  \definedummyword\equiv
+  \definedummyword\error
+  \definedummyword\euro
+  \definedummyword\guillemetleft
+  \definedummyword\guillemetright
+  \definedummyword\guilsinglleft
+  \definedummyword\guilsinglright
+  \definedummyword\expansion
+  \definedummyword\minus
+  \definedummyword\pounds
+  \definedummyword\point
+  \definedummyword\print
+  \definedummyword\quotedblbase
+  \definedummyword\quotedblleft
+  \definedummyword\quotedblright
+  \definedummyword\quoteleft
+  \definedummyword\quoteright
+  \definedummyword\quotesinglbase
+  \definedummyword\result
+  \definedummyword\textdegree
+  %
+  % We want to disable all macros so that they are not expanded by \write.
+  \macrolist
+  %
+  \normalturnoffactive
+  %
+  % Handle some cases of @value -- where it does not contain any
+  % (non-fully-expandable) commands.
+  \makevalueexpandable
+}
+
+% \commondummiesnofonts: common to \commondummies and \indexnofonts.
+%
+\def\commondummiesnofonts{%
+  % Control letters and accents.
+  \definedummyletter\!%
+  \definedummyaccent\"%
+  \definedummyaccent\'%
+  \definedummyletter\*%
+  \definedummyaccent\,%
+  \definedummyletter\.%
+  \definedummyletter\/%
+  \definedummyletter\:%
+  \definedummyaccent\=%
+  \definedummyletter\?%
+  \definedummyaccent\^%
+  \definedummyaccent\`%
+  \definedummyaccent\~%
+  \definedummyword\u
+  \definedummyword\v
+  \definedummyword\H
+  \definedummyword\dotaccent
+  \definedummyword\ringaccent
+  \definedummyword\tieaccent
+  \definedummyword\ubaraccent
+  \definedummyword\udotaccent
+  \definedummyword\dotless
+  %
+  % Texinfo font commands.
+  \definedummyword\b
+  \definedummyword\i
+  \definedummyword\r
+  \definedummyword\sc
+  \definedummyword\t
+  %
+  % Commands that take arguments.
+  \definedummyword\acronym
+  \definedummyword\cite
+  \definedummyword\code
+  \definedummyword\command
+  \definedummyword\dfn
+  \definedummyword\emph
+  \definedummyword\env
+  \definedummyword\file
+  \definedummyword\kbd
+  \definedummyword\key
+  \definedummyword\math
+  \definedummyword\option
+  \definedummyword\pxref
+  \definedummyword\ref
+  \definedummyword\samp
+  \definedummyword\strong
+  \definedummyword\tie
+  \definedummyword\uref
+  \definedummyword\url
+  \definedummyword\var
+  \definedummyword\verb
+  \definedummyword\w
+  \definedummyword\xref
+}
+
+% \indexnofonts is used when outputting the strings to sort the index
+% by, and when constructing control sequence names.  It eliminates all
+% control sequences and just writes whatever the best ASCII sort string
+% would be for a given command (usually its argument).
+%
+\def\indexnofonts{%
+  % Accent commands should become @asis.
+  \def\definedummyaccent##1{\let##1\asis}%
+  % We can just ignore other control letters.
+  \def\definedummyletter##1{\let##1\empty}%
+  % Hopefully, all control words can become @asis.
+  \let\definedummyword\definedummyaccent
+  %
+  \commondummiesnofonts
+  %
+  % Don't no-op \tt, since it isn't a user-level command
+  % and is used in the definitions of the active chars like <, >, |, etc.
+  % Likewise with the other plain tex font commands.
+  %\let\tt=\asis
+  %
+  \def\ { }%
+  \def\@{@}%
+  % how to handle braces?
+  \def\_{\normalunderscore}%
+  %
+  % Non-English letters.
+  \def\AA{AA}%
+  \def\AE{AE}%
+  \def\L{L}%
+  \def\OE{OE}%
+  \def\O{O}%
+  \def\aa{aa}%
+  \def\ae{ae}%
+  \def\l{l}%
+  \def\oe{oe}%
+  \def\o{o}%
+  \def\ss{ss}%
+  \def\exclamdown{!}%
+  \def\questiondown{?}%
+  \def\ordf{a}%
+  \def\ordm{o}%
+  %
+  \def\LaTeX{LaTeX}%
+  \def\TeX{TeX}%
+  %
+  % Assorted special characters.
+  % (The following {} will end up in the sort string, but that's ok.)
+  \def\bullet{bullet}%
+  \def\comma{,}%
+  \def\copyright{copyright}%
+  \def\registeredsymbol{R}%
+  \def\dots{...}%
+  \def\enddots{...}%
+  \def\equiv{==}%
+  \def\error{error}%
+  \def\euro{euro}%
+  \def\guillemetleft{<<}%
+  \def\guillemetright{>>}%
+  \def\guilsinglleft{<}%
+  \def\guilsinglright{>}%
+  \def\expansion{==>}%
+  \def\minus{-}%
+  \def\pounds{pounds}%
+  \def\point{.}%
+  \def\print{-|}%
+  \def\quotedblbase{"}%
+  \def\quotedblleft{"}%
+  \def\quotedblright{"}%
+  \def\quoteleft{`}%
+  \def\quoteright{'}%
+  \def\quotesinglbase{,}%
+  \def\result{=>}%
+  \def\textdegree{degrees}%
+  %
+  % We need to get rid of all macros, leaving only the arguments (if present).
+  % Of course this is not nearly correct, but it is the best we can do for now.
+  % makeinfo does not expand macros in the argument to @deffn, which ends up
+  % writing an index entry, and texindex isn't prepared for an index sort entry
+  % that starts with \.
+  % 
+  % Since macro invocations are followed by braces, we can just redefine them
+  % to take a single TeX argument.  The case of a macro invocation that
+  % goes to end-of-line is not handled.
+  % 
+  \macrolist
+}
+
+\let\indexbackslash=0  %overridden during \printindex.
+\let\SETmarginindex=\relax % put index entries in margin (undocumented)?
+
+% Most index entries go through here, but \dosubind is the general case.
+% #1 is the index name, #2 is the entry text.
+\def\doind#1#2{\dosubind{#1}{#2}{}}
+
+% Workhorse for all \fooindexes.
+% #1 is name of index, #2 is stuff to put there, #3 is subentry --
+% empty if called from \doind, as we usually are (the main exception
+% is with most defuns, which call us directly).
+%
+\def\dosubind#1#2#3{%
+  \iflinks
+  {%
+    % Store the main index entry text (including the third arg).
+    \toks0 = {#2}%
+    % If third arg is present, precede it with a space.
+    \def\thirdarg{#3}%
+    \ifx\thirdarg\empty \else
+      \toks0 = \expandafter{\the\toks0 \space #3}%
+    \fi
+    %
+    \edef\writeto{\csname#1indfile\endcsname}%
+    %
+    \safewhatsit\dosubindwrite
+  }%
+  \fi
+}
+
+% Write the entry in \toks0 to the index file:
+%
+\def\dosubindwrite{%
+  % Put the index entry in the margin if desired.
+  \ifx\SETmarginindex\relax\else
+    \insert\margin{\hbox{\vrule height8pt depth3pt width0pt \the\toks0}}%
+  \fi
+  %
+  % Remember, we are within a group.
+  \indexdummies % Must do this here, since \bf, etc expand at this stage
+  \def\backslashcurfont{\indexbackslash}% \indexbackslash isn't defined now
+      % so it will be output as is; and it will print as backslash.
+  %
+  % Process the index entry with all font commands turned off, to
+  % get the string to sort by.
+  {\indexnofonts
+   \edef\temp{\the\toks0}% need full expansion
+   \xdef\indexsorttmp{\temp}%
+  }%
+  %
+  % Set up the complete index entry, with both the sort key and
+  % the original text, including any font commands.  We write
+  % three arguments to \entry to the .?? file (four in the
+  % subentry case), texindex reduces to two when writing the .??s
+  % sorted result.
+  \edef\temp{%
+    \write\writeto{%
+      \string\entry{\indexsorttmp}{\noexpand\folio}{\the\toks0}}%
+  }%
+  \temp
+}
+
+% Take care of unwanted page breaks/skips around a whatsit:
+%
+% If a skip is the last thing on the list now, preserve it
+% by backing up by \lastskip, doing the \write, then inserting
+% the skip again.  Otherwise, the whatsit generated by the
+% \write or \pdfdest will make \lastskip zero.  The result is that
+% sequences like this:
+% @end defun
+% @tindex whatever
+% @defun ...
+% will have extra space inserted, because the \medbreak in the
+% start of the @defun won't see the skip inserted by the @end of
+% the previous defun.
+%
+% But don't do any of this if we're not in vertical mode.  We
+% don't want to do a \vskip and prematurely end a paragraph.
+%
+% Avoid page breaks due to these extra skips, too.
+%
+% But wait, there is a catch there:
+% We'll have to check whether \lastskip is zero skip.  \ifdim is not
+% sufficient for this purpose, as it ignores stretch and shrink parts
+% of the skip.  The only way seems to be to check the textual
+% representation of the skip.
+%
+% The following is almost like \def\zeroskipmacro{0.0pt} except that
+% the ``p'' and ``t'' characters have catcode \other, not 11 (letter).
+%
+\edef\zeroskipmacro{\expandafter\the\csname z@skip\endcsname}
+%
+\newskip\whatsitskip
+\newcount\whatsitpenalty
+%
+% ..., ready, GO:
+%
+\def\safewhatsit#1{%
+\ifhmode
+  #1%
+\else
+  % \lastskip and \lastpenalty cannot both be nonzero simultaneously.
+  \whatsitskip = \lastskip
+  \edef\lastskipmacro{\the\lastskip}%
+  \whatsitpenalty = \lastpenalty
+  %
+  % If \lastskip is nonzero, that means the last item was a
+  % skip.  And since a skip is discardable, that means this
+  % -\whatsitskip glue we're inserting is preceded by a
+  % non-discardable item, therefore it is not a potential
+  % breakpoint, therefore no \nobreak needed.
+  \ifx\lastskipmacro\zeroskipmacro
+  \else
+    \vskip-\whatsitskip
+  \fi
+  %
+  #1%
+  %
+  \ifx\lastskipmacro\zeroskipmacro
+    % If \lastskip was zero, perhaps the last item was a penalty, and
+    % perhaps it was >=10000, e.g., a \nobreak.  In that case, we want
+    % to re-insert the same penalty (values >10000 are used for various
+    % signals); since we just inserted a non-discardable item, any
+    % following glue (such as a \parskip) would be a breakpoint.  For example:
+    % 
+    %   @deffn deffn-whatever
+    %   @vindex index-whatever
+    %   Description.
+    % would allow a break between the index-whatever whatsit
+    % and the "Description." paragraph.
+    \ifnum\whatsitpenalty>9999 \penalty\whatsitpenalty \fi
+  \else
+    % On the other hand, if we had a nonzero \lastskip,
+    % this make-up glue would be preceded by a non-discardable item
+    % (the whatsit from the \write), so we must insert a \nobreak.
+    \nobreak\vskip\whatsitskip
+  \fi
+\fi
+}
+
+% The index entry written in the file actually looks like
+%  \entry {sortstring}{page}{topic}
+% or
+%  \entry {sortstring}{page}{topic}{subtopic}
+% The texindex program reads in these files and writes files
+% containing these kinds of lines:
+%  \initial {c}
+%     before the first topic whose initial is c
+%  \entry {topic}{pagelist}
+%     for a topic that is used without subtopics
+%  \primary {topic}
+%     for the beginning of a topic that is used with subtopics
+%  \secondary {subtopic}{pagelist}
+%     for each subtopic.
+
+% Define the user-accessible indexing commands
+% @findex, @vindex, @kindex, @cindex.
+
+\def\findex {\fnindex}
+\def\kindex {\kyindex}
+\def\cindex {\cpindex}
+\def\vindex {\vrindex}
+\def\tindex {\tpindex}
+\def\pindex {\pgindex}
+
+\def\cindexsub {\begingroup\obeylines\cindexsub}
+{\obeylines %
+\gdef\cindexsub "#1" #2^^M{\endgroup %
+\dosubind{cp}{#2}{#1}}}
+
+% Define the macros used in formatting output of the sorted index material.
+
+% @printindex causes a particular index (the ??s file) to get printed.
+% It does not print any chapter heading (usually an @unnumbered).
+%
+\parseargdef\printindex{\begingroup
+  \dobreak \chapheadingskip{10000}%
+  %
+  \smallfonts \rm
+  \tolerance = 9500
+  \plainfrenchspacing
+  \everypar = {}% don't want the \kern\-parindent from indentation suppression.
+  %
+  % See if the index file exists and is nonempty.
+  % Change catcode of @ here so that if the index file contains
+  % \initial {@}
+  % as its first line, TeX doesn't complain about mismatched braces
+  % (because it thinks @} is a control sequence).
+  \catcode`\@ = 11
+  \openin 1 \jobname.#1s
+  \ifeof 1
+    % \enddoublecolumns gets confused if there is no text in the index,
+    % and it loses the chapter title and the aux file entries for the
+    % index.  The easiest way to prevent this problem is to make sure
+    % there is some text.
+    \putwordIndexNonexistent
+  \else
+    %
+    % If the index file exists but is empty, then \openin leaves \ifeof
+    % false.  We have to make TeX try to read something from the file, so
+    % it can discover if there is anything in it.
+    \read 1 to \temp
+    \ifeof 1
+      \putwordIndexIsEmpty
+    \else
+      % Index files are almost Texinfo source, but we use \ as the escape
+      % character.  It would be better to use @, but that's too big a change
+      % to make right now.
+      \def\indexbackslash{\backslashcurfont}%
+      \catcode`\\ = 0
+      \escapechar = `\\
+      \begindoublecolumns
+      \input \jobname.#1s
+      \enddoublecolumns
+    \fi
+  \fi
+  \closein 1
+\endgroup}
+
+% These macros are used by the sorted index file itself.
+% Change them to control the appearance of the index.
+
+\def\initial#1{{%
+  % Some minor font changes for the special characters.
+  \let\tentt=\sectt \let\tt=\sectt \let\sf=\sectt
+  %
+  % Remove any glue we may have, we'll be inserting our own.
+  \removelastskip
+  %
+  % We like breaks before the index initials, so insert a bonus.
+  \nobreak
+  \vskip 0pt plus 3\baselineskip
+  \penalty 0
+  \vskip 0pt plus -3\baselineskip
+  %
+  % Typeset the initial.  Making this add up to a whole number of
+  % baselineskips increases the chance of the dots lining up from column
+  % to column.  It still won't often be perfect, because of the stretch
+  % we need before each entry, but it's better.
+  %
+  % No shrink because it confuses \balancecolumns.
+  \vskip 1.67\baselineskip plus .5\baselineskip
+  \leftline{\secbf #1}%
+  % Do our best not to break after the initial.
+  \nobreak
+  \vskip .33\baselineskip plus .1\baselineskip
+}}
+
+% \entry typesets a paragraph consisting of the text (#1), dot leaders, and
+% then page number (#2) flushed to the right margin.  It is used for index
+% and table of contents entries.  The paragraph is indented by \leftskip.
+%
+% A straightforward implementation would start like this:
+%	\def\entry#1#2{...
+% But this frozes the catcodes in the argument, and can cause problems to
+% @code, which sets - active.  This problem was fixed by a kludge---
+% ``-'' was active throughout whole index, but this isn't really right.
+%
+% The right solution is to prevent \entry from swallowing the whole text.
+%                                 --kasal, 21nov03
+\def\entry{%
+  \begingroup
+    %
+    % Start a new paragraph if necessary, so our assignments below can't
+    % affect previous text.
+    \par
+    %
+    % Do not fill out the last line with white space.
+    \parfillskip = 0in
+    %
+    % No extra space above this paragraph.
+    \parskip = 0in
+    %
+    % Do not prefer a separate line ending with a hyphen to fewer lines.
+    \finalhyphendemerits = 0
+    %
+    % \hangindent is only relevant when the entry text and page number
+    % don't both fit on one line.  In that case, bob suggests starting the
+    % dots pretty far over on the line.  Unfortunately, a large
+    % indentation looks wrong when the entry text itself is broken across
+    % lines.  So we use a small indentation and put up with long leaders.
+    %
+    % \hangafter is reset to 1 (which is the value we want) at the start
+    % of each paragraph, so we need not do anything with that.
+    \hangindent = 2em
+    %
+    % When the entry text needs to be broken, just fill out the first line
+    % with blank space.
+    \rightskip = 0pt plus1fil
+    %
+    % A bit of stretch before each entry for the benefit of balancing
+    % columns.
+    \vskip 0pt plus1pt
+    %
+    % Swallow the left brace of the text (first parameter):
+    \afterassignment\doentry
+    \let\temp =
+}
+\def\doentry{%
+    \bgroup % Instead of the swallowed brace.
+      \noindent
+      \aftergroup\finishentry
+      % And now comes the text of the entry.
+}
+\def\finishentry#1{%
+    % #1 is the page number.
+    %
+    % The following is kludged to not output a line of dots in the index if
+    % there are no page numbers.  The next person who breaks this will be
+    % cursed by a Unix daemon.
+    \setbox\boxA = \hbox{#1}%
+    \ifdim\wd\boxA = 0pt
+      \ %
+    \else
+      %
+      % If we must, put the page number on a line of its own, and fill out
+      % this line with blank space.  (The \hfil is overwhelmed with the
+      % fill leaders glue in \indexdotfill if the page number does fit.)
+      \hfil\penalty50
+      \null\nobreak\indexdotfill % Have leaders before the page number.
+      %
+      % The `\ ' here is removed by the implicit \unskip that TeX does as
+      % part of (the primitive) \par.  Without it, a spurious underfull
+      % \hbox ensues.
+      \ifpdf
+	\pdfgettoks#1.%
+	\ \the\toksA
+      \else
+	\ #1%
+      \fi
+    \fi
+    \par
+  \endgroup
+}
+
+% Like plain.tex's \dotfill, except uses up at least 1 em.
+\def\indexdotfill{\cleaders
+  \hbox{$\mathsurround=0pt \mkern1.5mu.\mkern1.5mu$}\hskip 1em plus 1fill}
+
+\def\primary #1{\line{#1\hfil}}
+
+\newskip\secondaryindent \secondaryindent=0.5cm
+\def\secondary#1#2{{%
+  \parfillskip=0in
+  \parskip=0in
+  \hangindent=1in
+  \hangafter=1
+  \noindent\hskip\secondaryindent\hbox{#1}\indexdotfill
+  \ifpdf
+    \pdfgettoks#2.\ \the\toksA % The page number ends the paragraph.
+  \else
+    #2
+  \fi
+  \par
+}}
+
+% Define two-column mode, which we use to typeset indexes.
+% Adapted from the TeXbook, page 416, which is to say,
+% the manmac.tex format used to print the TeXbook itself.
+\catcode`\@=11
+
+\newbox\partialpage
+\newdimen\doublecolumnhsize
+
+\def\begindoublecolumns{\begingroup % ended by \enddoublecolumns
+  % Grab any single-column material above us.
+  \output = {%
+    %
+    % Here is a possibility not foreseen in manmac: if we accumulate a
+    % whole lot of material, we might end up calling this \output
+    % routine twice in a row (see the doublecol-lose test, which is
+    % essentially a couple of indexes with @setchapternewpage off).  In
+    % that case we just ship out what is in \partialpage with the normal
+    % output routine.  Generally, \partialpage will be empty when this
+    % runs and this will be a no-op.  See the indexspread.tex test case.
+    \ifvoid\partialpage \else
+      \onepageout{\pagecontents\partialpage}%
+    \fi
+    %
+    \global\setbox\partialpage = \vbox{%
+      % Unvbox the main output page.
+      \unvbox\PAGE
+      \kern-\topskip \kern\baselineskip
+    }%
+  }%
+  \eject % run that output routine to set \partialpage
+  %
+  % Use the double-column output routine for subsequent pages.
+  \output = {\doublecolumnout}%
+  %
+  % Change the page size parameters.  We could do this once outside this
+  % routine, in each of @smallbook, @afourpaper, and the default 8.5x11
+  % format, but then we repeat the same computation.  Repeating a couple
+  % of assignments once per index is clearly meaningless for the
+  % execution time, so we may as well do it in one place.
+  %
+  % First we halve the line length, less a little for the gutter between
+  % the columns.  We compute the gutter based on the line length, so it
+  % changes automatically with the paper format.  The magic constant
+  % below is chosen so that the gutter has the same value (well, +-<1pt)
+  % as it did when we hard-coded it.
+  %
+  % We put the result in a separate register, \doublecolumhsize, so we
+  % can restore it in \pagesofar, after \hsize itself has (potentially)
+  % been clobbered.
+  %
+  \doublecolumnhsize = \hsize
+    \advance\doublecolumnhsize by -.04154\hsize
+    \divide\doublecolumnhsize by 2
+  \hsize = \doublecolumnhsize
+  %
+  % Double the \vsize as well.  (We don't need a separate register here,
+  % since nobody clobbers \vsize.)
+  \vsize = 2\vsize
+}
+
+% The double-column output routine for all double-column pages except
+% the last.
+%
+\def\doublecolumnout{%
+  \splittopskip=\topskip \splitmaxdepth=\maxdepth
+  % Get the available space for the double columns -- the normal
+  % (undoubled) page height minus any material left over from the
+  % previous page.
+  \dimen@ = \vsize
+  \divide\dimen@ by 2
+  \advance\dimen@ by -\ht\partialpage
+  %
+  % box0 will be the left-hand column, box2 the right.
+  \setbox0=\vsplit255 to\dimen@ \setbox2=\vsplit255 to\dimen@
+  \onepageout\pagesofar
+  \unvbox255
+  \penalty\outputpenalty
+}
+%
+% Re-output the contents of the output page -- any previous material,
+% followed by the two boxes we just split, in box0 and box2.
+\def\pagesofar{%
+  \unvbox\partialpage
+  %
+  \hsize = \doublecolumnhsize
+  \wd0=\hsize \wd2=\hsize
+  \hbox to\pagewidth{\box0\hfil\box2}%
+}
+%
+% All done with double columns.
+\def\enddoublecolumns{%
+  % The following penalty ensures that the page builder is exercised
+  % _before_ we change the output routine.  This is necessary in the
+  % following situation:
+  %
+  % The last section of the index consists only of a single entry.
+  % Before this section, \pagetotal is less than \pagegoal, so no
+  % break occurs before the last section starts.  However, the last
+  % section, consisting of \initial and the single \entry, does not
+  % fit on the page and has to be broken off.  Without the following
+  % penalty the page builder will not be exercised until \eject
+  % below, and by that time we'll already have changed the output
+  % routine to the \balancecolumns version, so the next-to-last
+  % double-column page will be processed with \balancecolumns, which
+  % is wrong:  The two columns will go to the main vertical list, with
+  % the broken-off section in the recent contributions.  As soon as
+  % the output routine finishes, TeX starts reconsidering the page
+  % break.  The two columns and the broken-off section both fit on the
+  % page, because the two columns now take up only half of the page
+  % goal.  When TeX sees \eject from below which follows the final
+  % section, it invokes the new output routine that we've set after
+  % \balancecolumns below; \onepageout will try to fit the two columns
+  % and the final section into the vbox of \pageheight (see
+  % \pagebody), causing an overfull box.
+  %
+  % Note that glue won't work here, because glue does not exercise the
+  % page builder, unlike penalties (see The TeXbook, pp. 280-281).
+  \penalty0
+  %
+  \output = {%
+    % Split the last of the double-column material.  Leave it on the
+    % current page, no automatic page break.
+    \balancecolumns
+    %
+    % If we end up splitting too much material for the current page,
+    % though, there will be another page break right after this \output
+    % invocation ends.  Having called \balancecolumns once, we do not
+    % want to call it again.  Therefore, reset \output to its normal
+    % definition right away.  (We hope \balancecolumns will never be
+    % called on to balance too much material, but if it is, this makes
+    % the output somewhat more palatable.)
+    \global\output = {\onepageout{\pagecontents\PAGE}}%
+  }%
+  \eject
+  \endgroup % started in \begindoublecolumns
+  %
+  % \pagegoal was set to the doubled \vsize above, since we restarted
+  % the current page.  We're now back to normal single-column
+  % typesetting, so reset \pagegoal to the normal \vsize (after the
+  % \endgroup where \vsize got restored).
+  \pagegoal = \vsize
+}
+%
+% Called at the end of the double column material.
+\def\balancecolumns{%
+  \setbox0 = \vbox{\unvbox255}% like \box255 but more efficient, see p.120.
+  \dimen@ = \ht0
+  \advance\dimen@ by \topskip
+  \advance\dimen@ by-\baselineskip
+  \divide\dimen@ by 2 % target to split to
+  %debug\message{final 2-column material height=\the\ht0, target=\the\dimen@.}%
+  \splittopskip = \topskip
+  % Loop until we get a decent breakpoint.
+  {%
+    \vbadness = 10000
+    \loop
+      \global\setbox3 = \copy0
+      \global\setbox1 = \vsplit3 to \dimen@
+    \ifdim\ht3>\dimen@
+      \global\advance\dimen@ by 1pt
+    \repeat
+  }%
+  %debug\message{split to \the\dimen@, column heights: \the\ht1, \the\ht3.}%
+  \setbox0=\vbox to\dimen@{\unvbox1}%
+  \setbox2=\vbox to\dimen@{\unvbox3}%
+  %
+  \pagesofar
+}
+\catcode`\@ = \other
+
+
+\message{sectioning,}
+% Chapters, sections, etc.
+
+% \unnumberedno is an oxymoron, of course.  But we count the unnumbered
+% sections so that we can refer to them unambiguously in the pdf
+% outlines by their "section number".  We avoid collisions with chapter
+% numbers by starting them at 10000.  (If a document ever has 10000
+% chapters, we're in trouble anyway, I'm sure.)
+\newcount\unnumberedno \unnumberedno = 10000
+\newcount\chapno
+\newcount\secno        \secno=0
+\newcount\subsecno     \subsecno=0
+\newcount\subsubsecno  \subsubsecno=0
+
+% This counter is funny since it counts through charcodes of letters A, B, ...
+\newcount\appendixno  \appendixno = `\@
+%
+% \def\appendixletter{\char\the\appendixno}
+% We do the following ugly conditional instead of the above simple
+% construct for the sake of pdftex, which needs the actual
+% letter in the expansion, not just typeset.
+%
+\def\appendixletter{%
+  \ifnum\appendixno=`A A%
+  \else\ifnum\appendixno=`B B%
+  \else\ifnum\appendixno=`C C%
+  \else\ifnum\appendixno=`D D%
+  \else\ifnum\appendixno=`E E%
+  \else\ifnum\appendixno=`F F%
+  \else\ifnum\appendixno=`G G%
+  \else\ifnum\appendixno=`H H%
+  \else\ifnum\appendixno=`I I%
+  \else\ifnum\appendixno=`J J%
+  \else\ifnum\appendixno=`K K%
+  \else\ifnum\appendixno=`L L%
+  \else\ifnum\appendixno=`M M%
+  \else\ifnum\appendixno=`N N%
+  \else\ifnum\appendixno=`O O%
+  \else\ifnum\appendixno=`P P%
+  \else\ifnum\appendixno=`Q Q%
+  \else\ifnum\appendixno=`R R%
+  \else\ifnum\appendixno=`S S%
+  \else\ifnum\appendixno=`T T%
+  \else\ifnum\appendixno=`U U%
+  \else\ifnum\appendixno=`V V%
+  \else\ifnum\appendixno=`W W%
+  \else\ifnum\appendixno=`X X%
+  \else\ifnum\appendixno=`Y Y%
+  \else\ifnum\appendixno=`Z Z%
+  % The \the is necessary, despite appearances, because \appendixletter is
+  % expanded while writing the .toc file.  \char\appendixno is not
+  % expandable, thus it is written literally, thus all appendixes come out
+  % with the same letter (or @) in the toc without it.
+  \else\char\the\appendixno
+  \fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi
+  \fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi}
+
+% Each @chapter defines these (using marks) as the number+name, number
+% and name of the chapter.  Page headings and footings can use
+% these.  @section does likewise.
+\def\thischapter{}
+\def\thischapternum{}
+\def\thischaptername{}
+\def\thissection{}
+\def\thissectionnum{}
+\def\thissectionname{}
+
+\newcount\absseclevel % used to calculate proper heading level
+\newcount\secbase\secbase=0 % @raisesections/@lowersections modify this count
+
+% @raisesections: treat @section as chapter, @subsection as section, etc.
+\def\raisesections{\global\advance\secbase by -1}
+\let\up=\raisesections % original BFox name
+
+% @lowersections: treat @chapter as section, @section as subsection, etc.
+\def\lowersections{\global\advance\secbase by 1}
+\let\down=\lowersections % original BFox name
+
+% we only have subsub.
+\chardef\maxseclevel = 3
+%
+% A numbered section within an unnumbered changes to unnumbered too.
+% To achive this, remember the "biggest" unnum. sec. we are currently in:
+\chardef\unmlevel = \maxseclevel
+%
+% Trace whether the current chapter is an appendix or not:
+% \chapheadtype is "N" or "A", unnumbered chapters are ignored.
+\def\chapheadtype{N}
+
+% Choose a heading macro
+% #1 is heading type
+% #2 is heading level
+% #3 is text for heading
+\def\genhead#1#2#3{%
+  % Compute the abs. sec. level:
+  \absseclevel=#2
+  \advance\absseclevel by \secbase
+  % Make sure \absseclevel doesn't fall outside the range:
+  \ifnum \absseclevel < 0
+    \absseclevel = 0
+  \else
+    \ifnum \absseclevel > 3
+      \absseclevel = 3
+    \fi
+  \fi
+  % The heading type:
+  \def\headtype{#1}%
+  \if \headtype U%
+    \ifnum \absseclevel < \unmlevel
+      \chardef\unmlevel = \absseclevel
+    \fi
+  \else
+    % Check for appendix sections:
+    \ifnum \absseclevel = 0
+      \edef\chapheadtype{\headtype}%
+    \else
+      \if \headtype A\if \chapheadtype N%
+	\errmessage{@appendix... within a non-appendix chapter}%
+      \fi\fi
+    \fi
+    % Check for numbered within unnumbered:
+    \ifnum \absseclevel > \unmlevel
+      \def\headtype{U}%
+    \else
+      \chardef\unmlevel = 3
+    \fi
+  \fi
+  % Now print the heading:
+  \if \headtype U%
+    \ifcase\absseclevel
+	\unnumberedzzz{#3}%
+    \or \unnumberedseczzz{#3}%
+    \or \unnumberedsubseczzz{#3}%
+    \or \unnumberedsubsubseczzz{#3}%
+    \fi
+  \else
+    \if \headtype A%
+      \ifcase\absseclevel
+	  \appendixzzz{#3}%
+      \or \appendixsectionzzz{#3}%
+      \or \appendixsubseczzz{#3}%
+      \or \appendixsubsubseczzz{#3}%
+      \fi
+    \else
+      \ifcase\absseclevel
+	  \chapterzzz{#3}%
+      \or \seczzz{#3}%
+      \or \numberedsubseczzz{#3}%
+      \or \numberedsubsubseczzz{#3}%
+      \fi
+    \fi
+  \fi
+  \suppressfirstparagraphindent
+}
+
+% an interface:
+\def\numhead{\genhead N}
+\def\apphead{\genhead A}
+\def\unnmhead{\genhead U}
+
+% @chapter, @appendix, @unnumbered.  Increment top-level counter, reset
+% all lower-level sectioning counters to zero.
+%
+% Also set \chaplevelprefix, which we prepend to @float sequence numbers
+% (e.g., figures), q.v.  By default (before any chapter), that is empty.
+\let\chaplevelprefix = \empty
+%
+\outer\parseargdef\chapter{\numhead0{#1}} % normally numhead0 calls chapterzzz
+\def\chapterzzz#1{%
+  % section resetting is \global in case the chapter is in a group, such
+  % as an @include file.
+  \global\secno=0 \global\subsecno=0 \global\subsubsecno=0
+    \global\advance\chapno by 1
+  %
+  % Used for \float.
+  \gdef\chaplevelprefix{\the\chapno.}%
+  \resetallfloatnos
+  %
+  \message{\putwordChapter\space \the\chapno}%
+  %
+  % Write the actual heading.
+  \chapmacro{#1}{Ynumbered}{\the\chapno}%
+  %
+  % So @section and the like are numbered underneath this chapter.
+  \global\let\section = \numberedsec
+  \global\let\subsection = \numberedsubsec
+  \global\let\subsubsection = \numberedsubsubsec
+}
+
+\outer\parseargdef\appendix{\apphead0{#1}} % normally apphead0 calls appendixzzz
+\def\appendixzzz#1{%
+  \global\secno=0 \global\subsecno=0 \global\subsubsecno=0
+    \global\advance\appendixno by 1
+  \gdef\chaplevelprefix{\appendixletter.}%
+  \resetallfloatnos
+  %
+  \def\appendixnum{\putwordAppendix\space \appendixletter}%
+  \message{\appendixnum}%
+  %
+  \chapmacro{#1}{Yappendix}{\appendixletter}%
+  %
+  \global\let\section = \appendixsec
+  \global\let\subsection = \appendixsubsec
+  \global\let\subsubsection = \appendixsubsubsec
+}
+
+\outer\parseargdef\unnumbered{\unnmhead0{#1}} % normally unnmhead0 calls unnumberedzzz
+\def\unnumberedzzz#1{%
+  \global\secno=0 \global\subsecno=0 \global\subsubsecno=0
+    \global\advance\unnumberedno by 1
+  %
+  % Since an unnumbered has no number, no prefix for figures.
+  \global\let\chaplevelprefix = \empty
+  \resetallfloatnos
+  %
+  % This used to be simply \message{#1}, but TeX fully expands the
+  % argument to \message.  Therefore, if #1 contained @-commands, TeX
+  % expanded them.  For example, in `@unnumbered The @cite{Book}', TeX
+  % expanded @cite (which turns out to cause errors because \cite is meant
+  % to be executed, not expanded).
+  %
+  % Anyway, we don't want the fully-expanded definition of @cite to appear
+  % as a result of the \message, we just want `@cite' itself.  We use
+  % \the<toks register> to achieve this: TeX expands \the<toks> only once,
+  % simply yielding the contents of <toks register>.  (We also do this for
+  % the toc entries.)
+  \toks0 = {#1}%
+  \message{(\the\toks0)}%
+  %
+  \chapmacro{#1}{Ynothing}{\the\unnumberedno}%
+  %
+  \global\let\section = \unnumberedsec
+  \global\let\subsection = \unnumberedsubsec
+  \global\let\subsubsection = \unnumberedsubsubsec
+}
+
+% @centerchap is like @unnumbered, but the heading is centered.
+\outer\parseargdef\centerchap{%
+  % Well, we could do the following in a group, but that would break
+  % an assumption that \chapmacro is called at the outermost level.
+  % Thus we are safer this way:		--kasal, 24feb04
+  \let\centerparametersmaybe = \centerparameters
+  \unnmhead0{#1}%
+  \let\centerparametersmaybe = \relax
+}
+
+% @top is like @unnumbered.
+\let\top\unnumbered
+
+% Sections.
+\outer\parseargdef\numberedsec{\numhead1{#1}} % normally calls seczzz
+\def\seczzz#1{%
+  \global\subsecno=0 \global\subsubsecno=0  \global\advance\secno by 1
+  \sectionheading{#1}{sec}{Ynumbered}{\the\chapno.\the\secno}%
+}
+
+\outer\parseargdef\appendixsection{\apphead1{#1}} % normally calls appendixsectionzzz
+\def\appendixsectionzzz#1{%
+  \global\subsecno=0 \global\subsubsecno=0  \global\advance\secno by 1
+  \sectionheading{#1}{sec}{Yappendix}{\appendixletter.\the\secno}%
+}
+\let\appendixsec\appendixsection
+
+\outer\parseargdef\unnumberedsec{\unnmhead1{#1}} % normally calls unnumberedseczzz
+\def\unnumberedseczzz#1{%
+  \global\subsecno=0 \global\subsubsecno=0  \global\advance\secno by 1
+  \sectionheading{#1}{sec}{Ynothing}{\the\unnumberedno.\the\secno}%
+}
+
+% Subsections.
+\outer\parseargdef\numberedsubsec{\numhead2{#1}} % normally calls numberedsubseczzz
+\def\numberedsubseczzz#1{%
+  \global\subsubsecno=0  \global\advance\subsecno by 1
+  \sectionheading{#1}{subsec}{Ynumbered}{\the\chapno.\the\secno.\the\subsecno}%
+}
+
+\outer\parseargdef\appendixsubsec{\apphead2{#1}} % normally calls appendixsubseczzz
+\def\appendixsubseczzz#1{%
+  \global\subsubsecno=0  \global\advance\subsecno by 1
+  \sectionheading{#1}{subsec}{Yappendix}%
+                 {\appendixletter.\the\secno.\the\subsecno}%
+}
+
+\outer\parseargdef\unnumberedsubsec{\unnmhead2{#1}} %normally calls unnumberedsubseczzz
+\def\unnumberedsubseczzz#1{%
+  \global\subsubsecno=0  \global\advance\subsecno by 1
+  \sectionheading{#1}{subsec}{Ynothing}%
+                 {\the\unnumberedno.\the\secno.\the\subsecno}%
+}
+
+% Subsubsections.
+\outer\parseargdef\numberedsubsubsec{\numhead3{#1}} % normally numberedsubsubseczzz
+\def\numberedsubsubseczzz#1{%
+  \global\advance\subsubsecno by 1
+  \sectionheading{#1}{subsubsec}{Ynumbered}%
+                 {\the\chapno.\the\secno.\the\subsecno.\the\subsubsecno}%
+}
+
+\outer\parseargdef\appendixsubsubsec{\apphead3{#1}} % normally appendixsubsubseczzz
+\def\appendixsubsubseczzz#1{%
+  \global\advance\subsubsecno by 1
+  \sectionheading{#1}{subsubsec}{Yappendix}%
+                 {\appendixletter.\the\secno.\the\subsecno.\the\subsubsecno}%
+}
+
+\outer\parseargdef\unnumberedsubsubsec{\unnmhead3{#1}} %normally unnumberedsubsubseczzz
+\def\unnumberedsubsubseczzz#1{%
+  \global\advance\subsubsecno by 1
+  \sectionheading{#1}{subsubsec}{Ynothing}%
+                 {\the\unnumberedno.\the\secno.\the\subsecno.\the\subsubsecno}%
+}
+
+% These macros control what the section commands do, according
+% to what kind of chapter we are in (ordinary, appendix, or unnumbered).
+% Define them by default for a numbered chapter.
+\let\section = \numberedsec
+\let\subsection = \numberedsubsec
+\let\subsubsection = \numberedsubsubsec
+
+% Define @majorheading, @heading and @subheading
+
+% NOTE on use of \vbox for chapter headings, section headings, and such:
+%       1) We use \vbox rather than the earlier \line to permit
+%          overlong headings to fold.
+%       2) \hyphenpenalty is set to 10000 because hyphenation in a
+%          heading is obnoxious; this forbids it.
+%       3) Likewise, headings look best if no \parindent is used, and
+%          if justification is not attempted.  Hence \raggedright.
+
+
+\def\majorheading{%
+  {\advance\chapheadingskip by 10pt \chapbreak }%
+  \parsearg\chapheadingzzz
+}
+
+\def\chapheading{\chapbreak \parsearg\chapheadingzzz}
+\def\chapheadingzzz#1{%
+  {\chapfonts \vbox{\hyphenpenalty=10000\tolerance=5000
+                    \parindent=0pt\raggedright
+                    \rm #1\hfill}}%
+  \bigskip \par\penalty 200\relax
+  \suppressfirstparagraphindent
+}
+
+% @heading, @subheading, @subsubheading.
+\parseargdef\heading{\sectionheading{#1}{sec}{Yomitfromtoc}{}
+  \suppressfirstparagraphindent}
+\parseargdef\subheading{\sectionheading{#1}{subsec}{Yomitfromtoc}{}
+  \suppressfirstparagraphindent}
+\parseargdef\subsubheading{\sectionheading{#1}{subsubsec}{Yomitfromtoc}{}
+  \suppressfirstparagraphindent}
+
+% These macros generate a chapter, section, etc. heading only
+% (including whitespace, linebreaking, etc. around it),
+% given all the information in convenient, parsed form.
+
+%%% Args are the skip and penalty (usually negative)
+\def\dobreak#1#2{\par\ifdim\lastskip<#1\removelastskip\penalty#2\vskip#1\fi}
+
+%%% Define plain chapter starts, and page on/off switching for it
+% Parameter controlling skip before chapter headings (if needed)
+
+\newskip\chapheadingskip
+
+\def\chapbreak{\dobreak \chapheadingskip {-4000}}
+\def\chappager{\par\vfill\supereject}
+% Because \domark is called before \chapoddpage, the filler page will
+% get the headings for the next chapter, which is wrong.  But we don't
+% care -- we just disable all headings on the filler page.
+\def\chapoddpage{%
+  \chappager
+  \ifodd\pageno \else
+    \begingroup
+      \evenheadline={\hfil}\evenfootline={\hfil}%
+      \oddheadline={\hfil}\oddfootline={\hfil}%
+      \hbox to 0pt{}%
+      \chappager
+    \endgroup
+  \fi
+}
+
+\def\setchapternewpage #1 {\csname CHAPPAG#1\endcsname}
+
+\def\CHAPPAGoff{%
+\global\let\contentsalignmacro = \chappager
+\global\let\pchapsepmacro=\chapbreak
+\global\let\pagealignmacro=\chappager}
+
+\def\CHAPPAGon{%
+\global\let\contentsalignmacro = \chappager
+\global\let\pchapsepmacro=\chappager
+\global\let\pagealignmacro=\chappager
+\global\def\HEADINGSon{\HEADINGSsingle}}
+
+\def\CHAPPAGodd{%
+\global\let\contentsalignmacro = \chapoddpage
+\global\let\pchapsepmacro=\chapoddpage
+\global\let\pagealignmacro=\chapoddpage
+\global\def\HEADINGSon{\HEADINGSdouble}}
+
+\CHAPPAGon
+
+% Chapter opening.
+%
+% #1 is the text, #2 is the section type (Ynumbered, Ynothing,
+% Yappendix, Yomitfromtoc), #3 the chapter number.
+%
+% To test against our argument.
+\def\Ynothingkeyword{Ynothing}
+\def\Yomitfromtockeyword{Yomitfromtoc}
+\def\Yappendixkeyword{Yappendix}
+%
+\def\chapmacro#1#2#3{%
+  % Insert the first mark before the heading break (see notes for \domark).
+  \let\prevchapterdefs=\lastchapterdefs
+  \let\prevsectiondefs=\lastsectiondefs
+  \gdef\lastsectiondefs{\gdef\thissectionname{}\gdef\thissectionnum{}%
+                        \gdef\thissection{}}%
+  %
+  \def\temptype{#2}%
+  \ifx\temptype\Ynothingkeyword
+    \gdef\lastchapterdefs{\gdef\thischaptername{#1}\gdef\thischapternum{}%
+                          \gdef\thischapter{\thischaptername}}%
+  \else\ifx\temptype\Yomitfromtockeyword
+    \gdef\lastchapterdefs{\gdef\thischaptername{#1}\gdef\thischapternum{}%
+                          \gdef\thischapter{}}%
+  \else\ifx\temptype\Yappendixkeyword
+    \toks0={#1}%
+    \xdef\lastchapterdefs{%
+      \gdef\noexpand\thischaptername{\the\toks0}%
+      \gdef\noexpand\thischapternum{\appendixletter}%
+      \gdef\noexpand\thischapter{\putwordAppendix{} \noexpand\thischapternum:
+                                 \noexpand\thischaptername}%
+    }%
+  \else
+    \toks0={#1}%
+    \xdef\lastchapterdefs{%
+      \gdef\noexpand\thischaptername{\the\toks0}%
+      \gdef\noexpand\thischapternum{\the\chapno}%
+      \gdef\noexpand\thischapter{\putwordChapter{} \noexpand\thischapternum:
+                                 \noexpand\thischaptername}%
+    }%
+  \fi\fi\fi
+  %
+  % Output the mark.  Pass it through \safewhatsit, to take care of
+  % the preceding space.
+  \safewhatsit\domark
+  %
+  % Insert the chapter heading break.
+  \pchapsepmacro
+  %
+  % Now the second mark, after the heading break.  No break points
+  % between here and the heading.
+  \let\prevchapterdefs=\lastchapterdefs
+  \let\prevsectiondefs=\lastsectiondefs
+  \domark
+  %
+  {%
+    \chapfonts \rm
+    %
+    % Have to define \lastsection before calling \donoderef, because the
+    % xref code eventually uses it.  On the other hand, it has to be called
+    % after \pchapsepmacro, or the headline will change too soon.
+    \gdef\lastsection{#1}%
+    %
+    % Only insert the separating space if we have a chapter/appendix
+    % number, and don't print the unnumbered ``number''.
+    \ifx\temptype\Ynothingkeyword
+      \setbox0 = \hbox{}%
+      \def\toctype{unnchap}%
+    \else\ifx\temptype\Yomitfromtockeyword
+      \setbox0 = \hbox{}% contents like unnumbered, but no toc entry
+      \def\toctype{omit}%
+    \else\ifx\temptype\Yappendixkeyword
+      \setbox0 = \hbox{\putwordAppendix{} #3\enspace}%
+      \def\toctype{app}%
+    \else
+      \setbox0 = \hbox{#3\enspace}%
+      \def\toctype{numchap}%
+    \fi\fi\fi
+    %
+    % Write the toc entry for this chapter.  Must come before the
+    % \donoderef, because we include the current node name in the toc
+    % entry, and \donoderef resets it to empty.
+    \writetocentry{\toctype}{#1}{#3}%
+    %
+    % For pdftex, we have to write out the node definition (aka, make
+    % the pdfdest) after any page break, but before the actual text has
+    % been typeset.  If the destination for the pdf outline is after the
+    % text, then jumping from the outline may wind up with the text not
+    % being visible, for instance under high magnification.
+    \donoderef{#2}%
+    %
+    % Typeset the actual heading.
+    \nobreak % Avoid page breaks at the interline glue.
+    \vbox{\hyphenpenalty=10000 \tolerance=5000 \parindent=0pt \raggedright
+          \hangindent=\wd0 \centerparametersmaybe
+          \unhbox0 #1\par}%
+  }%
+  \nobreak\bigskip % no page break after a chapter title
+  \nobreak
+}
+
+% @centerchap -- centered and unnumbered.
+\let\centerparametersmaybe = \relax
+\def\centerparameters{%
+  \advance\rightskip by 3\rightskip
+  \leftskip = \rightskip
+  \parfillskip = 0pt
+}
+
+
+% I don't think this chapter style is supported any more, so I'm not
+% updating it with the new noderef stuff.  We'll see.  --karl, 11aug03.
+%
+\def\setchapterstyle #1 {\csname CHAPF#1\endcsname}
+%
+\def\unnchfopen #1{%
+\chapoddpage {\chapfonts \vbox{\hyphenpenalty=10000\tolerance=5000
+                       \parindent=0pt\raggedright
+                       \rm #1\hfill}}\bigskip \par\nobreak
+}
+\def\chfopen #1#2{\chapoddpage {\chapfonts
+\vbox to 3in{\vfil \hbox to\hsize{\hfil #2} \hbox to\hsize{\hfil #1} \vfil}}%
+\par\penalty 5000 %
+}
+\def\centerchfopen #1{%
+\chapoddpage {\chapfonts \vbox{\hyphenpenalty=10000\tolerance=5000
+                       \parindent=0pt
+                       \hfill {\rm #1}\hfill}}\bigskip \par\nobreak
+}
+\def\CHAPFopen{%
+  \global\let\chapmacro=\chfopen
+  \global\let\centerchapmacro=\centerchfopen}
+
+
+% Section titles.  These macros combine the section number parts and
+% call the generic \sectionheading to do the printing.
+%
+\newskip\secheadingskip
+\def\secheadingbreak{\dobreak \secheadingskip{-1000}}
+
+% Subsection titles.
+\newskip\subsecheadingskip
+\def\subsecheadingbreak{\dobreak \subsecheadingskip{-500}}
+
+% Subsubsection titles.
+\def\subsubsecheadingskip{\subsecheadingskip}
+\def\subsubsecheadingbreak{\subsecheadingbreak}
+
+
+% Print any size, any type, section title.
+%
+% #1 is the text, #2 is the section level (sec/subsec/subsubsec), #3 is
+% the section type for xrefs (Ynumbered, Ynothing, Yappendix), #4 is the
+% section number.
+%
+\def\seckeyword{sec}
+%
+\def\sectionheading#1#2#3#4{%
+  {%
+    % Switch to the right set of fonts.
+    \csname #2fonts\endcsname \rm
+    %
+    \def\sectionlevel{#2}%
+    \def\temptype{#3}%
+    %
+    % Insert first mark before the heading break (see notes for \domark).
+    \let\prevsectiondefs=\lastsectiondefs
+    \ifx\temptype\Ynothingkeyword
+      \ifx\sectionlevel\seckeyword
+        \gdef\lastsectiondefs{\gdef\thissectionname{#1}\gdef\thissectionnum{}%
+                              \gdef\thissection{\thissectionname}}%
+      \fi
+    \else\ifx\temptype\Yomitfromtockeyword
+      % Don't redefine \thissection.
+    \else\ifx\temptype\Yappendixkeyword
+      \ifx\sectionlevel\seckeyword
+        \toks0={#1}%
+        \xdef\lastsectiondefs{%
+          \gdef\noexpand\thissectionname{\the\toks0}%
+          \gdef\noexpand\thissectionnum{#4}%
+          \gdef\noexpand\thissection{\putwordSection{} \noexpand\thissectionnum:
+                                     \noexpand\thissectionname}%
+        }%
+      \fi
+    \else
+      \ifx\sectionlevel\seckeyword
+        \toks0={#1}%
+        \xdef\lastsectiondefs{%
+          \gdef\noexpand\thissectionname{\the\toks0}%
+          \gdef\noexpand\thissectionnum{#4}%
+          \gdef\noexpand\thissection{\putwordSection{} \noexpand\thissectionnum:
+                                     \noexpand\thissectionname}%
+        }%
+      \fi
+    \fi\fi\fi
+    %
+    % Output the mark.  Pass it through \safewhatsit, to take care of
+    % the preceding space.
+    \safewhatsit\domark
+    %
+    % Insert space above the heading.
+    \csname #2headingbreak\endcsname
+    %
+    % Now the second mark, after the heading break.  No break points
+    % between here and the heading.
+    \let\prevsectiondefs=\lastsectiondefs
+    \domark
+    %
+    % Only insert the space after the number if we have a section number.
+    \ifx\temptype\Ynothingkeyword
+      \setbox0 = \hbox{}%
+      \def\toctype{unn}%
+      \gdef\lastsection{#1}%
+    \else\ifx\temptype\Yomitfromtockeyword
+      % for @headings -- no section number, don't include in toc,
+      % and don't redefine \lastsection.
+      \setbox0 = \hbox{}%
+      \def\toctype{omit}%
+      \let\sectionlevel=\empty
+    \else\ifx\temptype\Yappendixkeyword
+      \setbox0 = \hbox{#4\enspace}%
+      \def\toctype{app}%
+      \gdef\lastsection{#1}%
+    \else
+      \setbox0 = \hbox{#4\enspace}%
+      \def\toctype{num}%
+      \gdef\lastsection{#1}%
+    \fi\fi\fi
+    %
+    % Write the toc entry (before \donoderef).  See comments in \chapmacro.
+    \writetocentry{\toctype\sectionlevel}{#1}{#4}%
+    %
+    % Write the node reference (= pdf destination for pdftex).
+    % Again, see comments in \chapmacro.
+    \donoderef{#3}%
+    %
+    % Interline glue will be inserted when the vbox is completed.
+    % That glue will be a valid breakpoint for the page, since it'll be
+    % preceded by a whatsit (usually from the \donoderef, or from the
+    % \writetocentry if there was no node).  We don't want to allow that
+    % break, since then the whatsits could end up on page n while the
+    % section is on page n+1, thus toc/etc. are wrong.  Debian bug 276000.
+    \nobreak
+    %
+    % Output the actual section heading.
+    \vbox{\hyphenpenalty=10000 \tolerance=5000 \parindent=0pt \raggedright
+          \hangindent=\wd0  % zero if no section number
+          \unhbox0 #1}%
+  }%
+  % Add extra space after the heading -- half of whatever came above it.
+  % Don't allow stretch, though.
+  \kern .5 \csname #2headingskip\endcsname
+  %
+  % Do not let the kern be a potential breakpoint, as it would be if it
+  % was followed by glue.
+  \nobreak
+  %
+  % We'll almost certainly start a paragraph next, so don't let that
+  % glue accumulate.  (Not a breakpoint because it's preceded by a
+  % discardable item.)
+  \vskip-\parskip
+  % 
+  % This is purely so the last item on the list is a known \penalty >
+  % 10000.  This is so \startdefun can avoid allowing breakpoints after
+  % section headings.  Otherwise, it would insert a valid breakpoint between:
+  % 
+  %   @section sec-whatever
+  %   @deffn def-whatever
+  \penalty 10001
+}
+
+
+\message{toc,}
+% Table of contents.
+\newwrite\tocfile
+
+% Write an entry to the toc file, opening it if necessary.
+% Called from @chapter, etc.
+%
+% Example usage: \writetocentry{sec}{Section Name}{\the\chapno.\the\secno}
+% We append the current node name (if any) and page number as additional
+% arguments for the \{chap,sec,...}entry macros which will eventually
+% read this.  The node name is used in the pdf outlines as the
+% destination to jump to.
+%
+% We open the .toc file for writing here instead of at @setfilename (or
+% any other fixed time) so that @contents can be anywhere in the document.
+% But if #1 is `omit', then we don't do anything.  This is used for the
+% table of contents chapter openings themselves.
+%
+\newif\iftocfileopened
+\def\omitkeyword{omit}%
+%
+\def\writetocentry#1#2#3{%
+  \edef\writetoctype{#1}%
+  \ifx\writetoctype\omitkeyword \else
+    \iftocfileopened\else
+      \immediate\openout\tocfile = \jobname.toc
+      \global\tocfileopenedtrue
+    \fi
+    %
+    \iflinks
+      {\atdummies
+       \edef\temp{%
+         \write\tocfile{@#1entry{#2}{#3}{\lastnode}{\noexpand\folio}}}%
+       \temp
+      }%
+    \fi
+  \fi
+  %
+  % Tell \shipout to create a pdf destination on each page, if we're
+  % writing pdf.  These are used in the table of contents.  We can't
+  % just write one on every page because the title pages are numbered
+  % 1 and 2 (the page numbers aren't printed), and so are the first
+  % two pages of the document.  Thus, we'd have two destinations named
+  % `1', and two named `2'.
+  \ifpdf \global\pdfmakepagedesttrue \fi
+}
+
+
+% These characters do not print properly in the Computer Modern roman
+% fonts, so we must take special care.  This is more or less redundant
+% with the Texinfo input format setup at the end of this file.
+% 
+\def\activecatcodes{%
+  \catcode`\"=\active
+  \catcode`\$=\active
+  \catcode`\<=\active
+  \catcode`\>=\active
+  \catcode`\\=\active
+  \catcode`\^=\active
+  \catcode`\_=\active
+  \catcode`\|=\active
+  \catcode`\~=\active
+}
+
+
+% Read the toc file, which is essentially Texinfo input.
+\def\readtocfile{%
+  \setupdatafile
+  \activecatcodes
+  \input \tocreadfilename
+}
+
+\newskip\contentsrightmargin \contentsrightmargin=1in
+\newcount\savepageno
+\newcount\lastnegativepageno \lastnegativepageno = -1
+
+% Prepare to read what we've written to \tocfile.
+%
+\def\startcontents#1{%
+  % If @setchapternewpage on, and @headings double, the contents should
+  % start on an odd page, unlike chapters.  Thus, we maintain
+  % \contentsalignmacro in parallel with \pagealignmacro.
+  % From: Torbjorn Granlund <tege@matematik.su.se>
+  \contentsalignmacro
+  \immediate\closeout\tocfile
+  %
+  % Don't need to put `Contents' or `Short Contents' in the headline.
+  % It is abundantly clear what they are.
+  \chapmacro{#1}{Yomitfromtoc}{}%
+  %
+  \savepageno = \pageno
+  \begingroup                  % Set up to handle contents files properly.
+    \raggedbottom              % Worry more about breakpoints than the bottom.
+    \advance\hsize by -\contentsrightmargin % Don't use the full line length.
+    %
+    % Roman numerals for page numbers.
+    \ifnum \pageno>0 \global\pageno = \lastnegativepageno \fi
+}
+
+% redefined for the two-volume lispref.  We always output on
+% \jobname.toc even if this is redefined.
+% 
+\def\tocreadfilename{\jobname.toc}
+
+% Normal (long) toc.
+%
+\def\contents{%
+  \startcontents{\putwordTOC}%
+    \openin 1 \tocreadfilename\space
+    \ifeof 1 \else
+      \readtocfile
+    \fi
+    \vfill \eject
+    \contentsalignmacro % in case @setchapternewpage odd is in effect
+    \ifeof 1 \else
+      \pdfmakeoutlines
+    \fi
+    \closein 1
+  \endgroup
+  \lastnegativepageno = \pageno
+  \global\pageno = \savepageno
+}
+
+% And just the chapters.
+\def\summarycontents{%
+  \startcontents{\putwordShortTOC}%
+    %
+    \let\numchapentry = \shortchapentry
+    \let\appentry = \shortchapentry
+    \let\unnchapentry = \shortunnchapentry
+    % We want a true roman here for the page numbers.
+    \secfonts
+    \let\rm=\shortcontrm \let\bf=\shortcontbf
+    \let\sl=\shortcontsl \let\tt=\shortconttt
+    \rm
+    \hyphenpenalty = 10000
+    \advance\baselineskip by 1pt % Open it up a little.
+    \def\numsecentry##1##2##3##4{}
+    \let\appsecentry = \numsecentry
+    \let\unnsecentry = \numsecentry
+    \let\numsubsecentry = \numsecentry
+    \let\appsubsecentry = \numsecentry
+    \let\unnsubsecentry = \numsecentry
+    \let\numsubsubsecentry = \numsecentry
+    \let\appsubsubsecentry = \numsecentry
+    \let\unnsubsubsecentry = \numsecentry
+    \openin 1 \tocreadfilename\space
+    \ifeof 1 \else
+      \readtocfile
+    \fi
+    \closein 1
+    \vfill \eject
+    \contentsalignmacro % in case @setchapternewpage odd is in effect
+  \endgroup
+  \lastnegativepageno = \pageno
+  \global\pageno = \savepageno
+}
+\let\shortcontents = \summarycontents
+
+% Typeset the label for a chapter or appendix for the short contents.
+% The arg is, e.g., `A' for an appendix, or `3' for a chapter.
+%
+\def\shortchaplabel#1{%
+  % This space should be enough, since a single number is .5em, and the
+  % widest letter (M) is 1em, at least in the Computer Modern fonts.
+  % But use \hss just in case.
+  % (This space doesn't include the extra space that gets added after
+  % the label; that gets put in by \shortchapentry above.)
+  %
+  % We'd like to right-justify chapter numbers, but that looks strange
+  % with appendix letters.  And right-justifying numbers and
+  % left-justifying letters looks strange when there is less than 10
+  % chapters.  Have to read the whole toc once to know how many chapters
+  % there are before deciding ...
+  \hbox to 1em{#1\hss}%
+}
+
+% These macros generate individual entries in the table of contents.
+% The first argument is the chapter or section name.
+% The last argument is the page number.
+% The arguments in between are the chapter number, section number, ...
+
+% Chapters, in the main contents.
+\def\numchapentry#1#2#3#4{\dochapentry{#2\labelspace#1}{#4}}
+%
+% Chapters, in the short toc.
+% See comments in \dochapentry re vbox and related settings.
+\def\shortchapentry#1#2#3#4{%
+  \tocentry{\shortchaplabel{#2}\labelspace #1}{\doshortpageno\bgroup#4\egroup}%
+}
+
+% Appendices, in the main contents.
+% Need the word Appendix, and a fixed-size box.
+%
+\def\appendixbox#1{%
+  % We use M since it's probably the widest letter.
+  \setbox0 = \hbox{\putwordAppendix{} M}%
+  \hbox to \wd0{\putwordAppendix{} #1\hss}}
+%
+\def\appentry#1#2#3#4{\dochapentry{\appendixbox{#2}\labelspace#1}{#4}}
+
+% Unnumbered chapters.
+\def\unnchapentry#1#2#3#4{\dochapentry{#1}{#4}}
+\def\shortunnchapentry#1#2#3#4{\tocentry{#1}{\doshortpageno\bgroup#4\egroup}}
+
+% Sections.
+\def\numsecentry#1#2#3#4{\dosecentry{#2\labelspace#1}{#4}}
+\let\appsecentry=\numsecentry
+\def\unnsecentry#1#2#3#4{\dosecentry{#1}{#4}}
+
+% Subsections.
+\def\numsubsecentry#1#2#3#4{\dosubsecentry{#2\labelspace#1}{#4}}
+\let\appsubsecentry=\numsubsecentry
+\def\unnsubsecentry#1#2#3#4{\dosubsecentry{#1}{#4}}
+
+% And subsubsections.
+\def\numsubsubsecentry#1#2#3#4{\dosubsubsecentry{#2\labelspace#1}{#4}}
+\let\appsubsubsecentry=\numsubsubsecentry
+\def\unnsubsubsecentry#1#2#3#4{\dosubsubsecentry{#1}{#4}}
+
+% This parameter controls the indentation of the various levels.
+% Same as \defaultparindent.
+\newdimen\tocindent \tocindent = 15pt
+
+% Now for the actual typesetting. In all these, #1 is the text and #2 is the
+% page number.
+%
+% If the toc has to be broken over pages, we want it to be at chapters
+% if at all possible; hence the \penalty.
+\def\dochapentry#1#2{%
+   \penalty-300 \vskip1\baselineskip plus.33\baselineskip minus.25\baselineskip
+   \begingroup
+     \chapentryfonts
+     \tocentry{#1}{\dopageno\bgroup#2\egroup}%
+   \endgroup
+   \nobreak\vskip .25\baselineskip plus.1\baselineskip
+}
+
+\def\dosecentry#1#2{\begingroup
+  \secentryfonts \leftskip=\tocindent
+  \tocentry{#1}{\dopageno\bgroup#2\egroup}%
+\endgroup}
+
+\def\dosubsecentry#1#2{\begingroup
+  \subsecentryfonts \leftskip=2\tocindent
+  \tocentry{#1}{\dopageno\bgroup#2\egroup}%
+\endgroup}
+
+\def\dosubsubsecentry#1#2{\begingroup
+  \subsubsecentryfonts \leftskip=3\tocindent
+  \tocentry{#1}{\dopageno\bgroup#2\egroup}%
+\endgroup}
+
+% We use the same \entry macro as for the index entries.
+\let\tocentry = \entry
+
+% Space between chapter (or whatever) number and the title.
+\def\labelspace{\hskip1em \relax}
+
+\def\dopageno#1{{\rm #1}}
+\def\doshortpageno#1{{\rm #1}}
+
+\def\chapentryfonts{\secfonts \rm}
+\def\secentryfonts{\textfonts}
+\def\subsecentryfonts{\textfonts}
+\def\subsubsecentryfonts{\textfonts}
+
+
+\message{environments,}
+% @foo ... @end foo.
+
+% @point{}, @result{}, @expansion{}, @print{}, @equiv{}.
+%
+% Since these characters are used in examples, they should be an even number of
+% \tt widths. Each \tt character is 1en, so two makes it 1em.
+%
+\def\point{$\star$}
+\def\arrow{\leavevmode\raise.05ex\hbox to 1em{\hfil$\rightarrow$\hfil}}
+\def\result{\leavevmode\raise.05ex\hbox to 1em{\hfil$\Rightarrow$\hfil}}
+\def\expansion{\leavevmode\hbox to 1em{\hfil$\mapsto$\hfil}}
+\def\print{\leavevmode\lower.1ex\hbox to 1em{\hfil$\dashv$\hfil}}
+\def\equiv{\leavevmode\hbox to 1em{\hfil$\ptexequiv$\hfil}}
+
+% The @error{} command.
+% Adapted from the TeXbook's \boxit.
+%
+\newbox\errorbox
+%
+{\tentt \global\dimen0 = 3em}% Width of the box.
+\dimen2 = .55pt % Thickness of rules
+% The text. (`r' is open on the right, `e' somewhat less so on the left.)
+\setbox0 = \hbox{\kern-.75pt \reducedsf error\kern-1.5pt}
+%
+\setbox\errorbox=\hbox to \dimen0{\hfil
+   \hsize = \dimen0 \advance\hsize by -5.8pt % Space to left+right.
+   \advance\hsize by -2\dimen2 % Rules.
+   \vbox{%
+      \hrule height\dimen2
+      \hbox{\vrule width\dimen2 \kern3pt          % Space to left of text.
+         \vtop{\kern2.4pt \box0 \kern2.4pt}% Space above/below.
+         \kern3pt\vrule width\dimen2}% Space to right.
+      \hrule height\dimen2}
+    \hfil}
+%
+\def\error{\leavevmode\lower.7ex\copy\errorbox}
+
+% @tex ... @end tex    escapes into raw Tex temporarily.
+% One exception: @ is still an escape character, so that @end tex works.
+% But \@ or @@ will get a plain tex @ character.
+
+\envdef\tex{%
+  \catcode `\\=0 \catcode `\{=1 \catcode `\}=2
+  \catcode `\$=3 \catcode `\&=4 \catcode `\#=6
+  \catcode `\^=7 \catcode `\_=8 \catcode `\~=\active \let~=\tie
+  \catcode `\%=14
+  \catcode `\+=\other
+  \catcode `\"=\other
+  \catcode `\|=\other
+  \catcode `\<=\other
+  \catcode `\>=\other
+  \escapechar=`\\
+  %
+  \let\b=\ptexb
+  \let\bullet=\ptexbullet
+  \let\c=\ptexc
+  \let\,=\ptexcomma
+  \let\.=\ptexdot
+  \let\dots=\ptexdots
+  \let\equiv=\ptexequiv
+  \let\!=\ptexexclam
+  \let\i=\ptexi
+  \let\indent=\ptexindent
+  \let\noindent=\ptexnoindent
+  \let\{=\ptexlbrace
+  \let\+=\tabalign
+  \let\}=\ptexrbrace
+  \let\/=\ptexslash
+  \let\*=\ptexstar
+  \let\t=\ptext
+  \expandafter \let\csname top\endcsname=\ptextop  % outer
+  \let\frenchspacing=\plainfrenchspacing
+  %
+  \def\endldots{\mathinner{\ldots\ldots\ldots\ldots}}%
+  \def\enddots{\relax\ifmmode\endldots\else$\mathsurround=0pt \endldots\,$\fi}%
+  \def\@{@}%
+}
+% There is no need to define \Etex.
+
+% Define @lisp ... @end lisp.
+% @lisp environment forms a group so it can rebind things,
+% including the definition of @end lisp (which normally is erroneous).
+
+% Amount to narrow the margins by for @lisp.
+\newskip\lispnarrowing \lispnarrowing=0.4in
+
+% This is the definition that ^^M gets inside @lisp, @example, and other
+% such environments.  \null is better than a space, since it doesn't
+% have any width.
+\def\lisppar{\null\endgraf}
+
+% This space is always present above and below environments.
+\newskip\envskipamount \envskipamount = 0pt
+
+% Make spacing and below environment symmetrical.  We use \parskip here
+% to help in doing that, since in @example-like environments \parskip
+% is reset to zero; thus the \afterenvbreak inserts no space -- but the
+% start of the next paragraph will insert \parskip.
+%
+\def\aboveenvbreak{{%
+  % =10000 instead of <10000 because of a special case in \itemzzz and
+  % \sectionheading, q.v.
+  \ifnum \lastpenalty=10000 \else
+    \advance\envskipamount by \parskip
+    \endgraf
+    \ifdim\lastskip<\envskipamount
+      \removelastskip
+      % it's not a good place to break if the last penalty was \nobreak
+      % or better ...
+      \ifnum\lastpenalty<10000 \penalty-50 \fi
+      \vskip\envskipamount
+    \fi
+  \fi
+}}
+
+\let\afterenvbreak = \aboveenvbreak
+
+% \nonarrowing is a flag.  If "set", @lisp etc don't narrow margins; it will
+% also clear it, so that its embedded environments do the narrowing again.
+\let\nonarrowing=\relax
+
+% @cartouche ... @end cartouche: draw rectangle w/rounded corners around
+% environment contents.
+\font\circle=lcircle10
+\newdimen\circthick
+\newdimen\cartouter\newdimen\cartinner
+\newskip\normbskip\newskip\normpskip\newskip\normlskip
+\circthick=\fontdimen8\circle
+%
+\def\ctl{{\circle\char'013\hskip -6pt}}% 6pt from pl file: 1/2charwidth
+\def\ctr{{\hskip 6pt\circle\char'010}}
+\def\cbl{{\circle\char'012\hskip -6pt}}
+\def\cbr{{\hskip 6pt\circle\char'011}}
+\def\carttop{\hbox to \cartouter{\hskip\lskip
+        \ctl\leaders\hrule height\circthick\hfil\ctr
+        \hskip\rskip}}
+\def\cartbot{\hbox to \cartouter{\hskip\lskip
+        \cbl\leaders\hrule height\circthick\hfil\cbr
+        \hskip\rskip}}
+%
+\newskip\lskip\newskip\rskip
+
+\envdef\cartouche{%
+  \ifhmode\par\fi  % can't be in the midst of a paragraph.
+  \startsavinginserts
+  \lskip=\leftskip \rskip=\rightskip
+  \leftskip=0pt\rightskip=0pt % we want these *outside*.
+  \cartinner=\hsize \advance\cartinner by-\lskip
+  \advance\cartinner by-\rskip
+  \cartouter=\hsize
+  \advance\cartouter by 18.4pt	% allow for 3pt kerns on either
+				% side, and for 6pt waste from
+				% each corner char, and rule thickness
+  \normbskip=\baselineskip \normpskip=\parskip \normlskip=\lineskip
+  % Flag to tell @lisp, etc., not to narrow margin.
+  \let\nonarrowing = t%
+  \vbox\bgroup
+      \baselineskip=0pt\parskip=0pt\lineskip=0pt
+      \carttop
+      \hbox\bgroup
+	  \hskip\lskip
+	  \vrule\kern3pt
+	  \vbox\bgroup
+	      \kern3pt
+	      \hsize=\cartinner
+	      \baselineskip=\normbskip
+	      \lineskip=\normlskip
+	      \parskip=\normpskip
+	      \vskip -\parskip
+	      \comment % For explanation, see the end of \def\group.
+}
+\def\Ecartouche{%
+              \ifhmode\par\fi
+	      \kern3pt
+	  \egroup
+	  \kern3pt\vrule
+	  \hskip\rskip
+      \egroup
+      \cartbot
+  \egroup
+  \checkinserts
+}
+
+
+% This macro is called at the beginning of all the @example variants,
+% inside a group.
+\def\nonfillstart{%
+  \aboveenvbreak
+  \hfuzz = 12pt % Don't be fussy
+  \sepspaces % Make spaces be word-separators rather than space tokens.
+  \let\par = \lisppar % don't ignore blank lines
+  \obeylines % each line of input is a line of output
+  \parskip = 0pt
+  \parindent = 0pt
+  \emergencystretch = 0pt % don't try to avoid overfull boxes
+  \ifx\nonarrowing\relax
+    \advance \leftskip by \lispnarrowing
+    \exdentamount=\lispnarrowing
+  \else
+    \let\nonarrowing = \relax
+  \fi
+  \let\exdent=\nofillexdent
+}
+
+% If you want all examples etc. small: @set dispenvsize small.
+% If you want even small examples the full size: @set dispenvsize nosmall.
+% This affects the following displayed environments:
+%    @example, @display, @format, @lisp
+%
+\def\smallword{small}
+\def\nosmallword{nosmall}
+\let\SETdispenvsize\relax
+\def\setnormaldispenv{%
+  \ifx\SETdispenvsize\smallword
+    % end paragraph for sake of leading, in case document has no blank
+    % line.  This is redundant with what happens in \aboveenvbreak, but
+    % we need to do it before changing the fonts, and it's inconvenient
+    % to change the fonts afterward.
+    \ifnum \lastpenalty=10000 \else \endgraf \fi
+    \smallexamplefonts \rm
+  \fi
+}
+\def\setsmalldispenv{%
+  \ifx\SETdispenvsize\nosmallword
+  \else
+    \ifnum \lastpenalty=10000 \else \endgraf \fi
+    \smallexamplefonts \rm
+  \fi
+}
+
+% We often define two environments, @foo and @smallfoo.
+% Let's do it by one command:
+\def\makedispenv #1#2{
+  \expandafter\envdef\csname#1\endcsname {\setnormaldispenv #2}
+  \expandafter\envdef\csname small#1\endcsname {\setsmalldispenv #2}
+  \expandafter\let\csname E#1\endcsname \afterenvbreak
+  \expandafter\let\csname Esmall#1\endcsname \afterenvbreak
+}
+
+% Define two synonyms:
+\def\maketwodispenvs #1#2#3{
+  \makedispenv{#1}{#3}
+  \makedispenv{#2}{#3}
+}
+
+% @lisp: indented, narrowed, typewriter font; @example: same as @lisp.
+%
+% @smallexample and @smalllisp: use smaller fonts.
+% Originally contributed by Pavel@xerox.
+%
+\maketwodispenvs {lisp}{example}{%
+  \nonfillstart
+  \tt\quoteexpand
+  \let\kbdfont = \kbdexamplefont % Allow @kbd to do something special.
+  \gobble       % eat return
+}
+% @display/@smalldisplay: same as @lisp except keep current font.
+%
+\makedispenv {display}{%
+  \nonfillstart
+  \gobble
+}
+
+% @format/@smallformat: same as @display except don't narrow margins.
+%
+\makedispenv{format}{%
+  \let\nonarrowing = t%
+  \nonfillstart
+  \gobble
+}
+
+% @flushleft: same as @format, but doesn't obey \SETdispenvsize.
+\envdef\flushleft{%
+  \let\nonarrowing = t%
+  \nonfillstart
+  \gobble
+}
+\let\Eflushleft = \afterenvbreak
+
+% @flushright.
+%
+\envdef\flushright{%
+  \let\nonarrowing = t%
+  \nonfillstart
+  \advance\leftskip by 0pt plus 1fill
+  \gobble
+}
+\let\Eflushright = \afterenvbreak
+
+
+% @quotation does normal linebreaking (hence we can't use \nonfillstart)
+% and narrows the margins.  We keep \parskip nonzero in general, since
+% we're doing normal filling.  So, when using \aboveenvbreak and
+% \afterenvbreak, temporarily make \parskip 0.
+%
+\envdef\quotation{%
+  {\parskip=0pt \aboveenvbreak}% because \aboveenvbreak inserts \parskip
+  \parindent=0pt
+  %
+  % @cartouche defines \nonarrowing to inhibit narrowing at next level down.
+  \ifx\nonarrowing\relax
+    \advance\leftskip by \lispnarrowing
+    \advance\rightskip by \lispnarrowing
+    \exdentamount = \lispnarrowing
+  \else
+    \let\nonarrowing = \relax
+  \fi
+  \parsearg\quotationlabel
+}
+
+% We have retained a nonzero parskip for the environment, since we're
+% doing normal filling.
+%
+\def\Equotation{%
+  \par
+  \ifx\quotationauthor\undefined\else
+    % indent a bit.
+    \leftline{\kern 2\leftskip \sl ---\quotationauthor}%
+  \fi
+  {\parskip=0pt \afterenvbreak}%
+}
+
+% If we're given an argument, typeset it in bold with a colon after.
+\def\quotationlabel#1{%
+  \def\temp{#1}%
+  \ifx\temp\empty \else
+    {\bf #1: }%
+  \fi
+}
+
+
+% LaTeX-like @verbatim...@end verbatim and @verb{<char>...<char>}
+% If we want to allow any <char> as delimiter,
+% we need the curly braces so that makeinfo sees the @verb command, eg:
+% `@verbx...x' would look like the '@verbx' command.  --janneke@gnu.org
+%
+% [Knuth]: Donald Ervin Knuth, 1996.  The TeXbook.
+%
+% [Knuth] p.344; only we need to do the other characters Texinfo sets
+% active too.  Otherwise, they get lost as the first character on a
+% verbatim line.
+\def\dospecials{%
+  \do\ \do\\\do\{\do\}\do\$\do\&%
+  \do\#\do\^\do\^^K\do\_\do\^^A\do\%\do\~%
+  \do\<\do\>\do\|\do\@\do+\do\"%
+}
+%
+% [Knuth] p. 380
+\def\uncatcodespecials{%
+  \def\do##1{\catcode`##1=\other}\dospecials}
+%
+% [Knuth] pp. 380,381,391
+% Disable Spanish ligatures ?` and !` of \tt font
+\begingroup
+  \catcode`\`=\active\gdef`{\relax\lq}
+\endgroup
+%
+% Setup for the @verb command.
+%
+% Eight spaces for a tab
+\begingroup
+  \catcode`\^^I=\active
+  \gdef\tabeightspaces{\catcode`\^^I=\active\def^^I{\ \ \ \ \ \ \ \ }}
+\endgroup
+%
+\def\setupverb{%
+  \tt  % easiest (and conventionally used) font for verbatim
+  \def\par{\leavevmode\endgraf}%
+  \catcode`\`=\active
+  \tabeightspaces
+  % Respect line breaks,
+  % print special symbols as themselves, and
+  % make each space count
+  % must do in this order:
+  \obeylines \uncatcodespecials \sepspaces
+}
+
+% Setup for the @verbatim environment
+%
+% Real tab expansion
+\newdimen\tabw \setbox0=\hbox{\tt\space} \tabw=8\wd0 % tab amount
+%
+\def\starttabbox{\setbox0=\hbox\bgroup}
+
+% Allow an option to not replace quotes with a regular directed right
+% quote/apostrophe (char 0x27), but instead use the undirected quote
+% from cmtt (char 0x0d).  The undirected quote is ugly, so don't make it
+% the default, but it works for pasting with more pdf viewers (at least
+% evince), the lilypond developers report.  xpdf does work with the
+% regular 0x27.  
+% 
+\def\codequoteright{%
+  \expandafter\ifx\csname SETtxicodequoteundirected\endcsname\relax
+    \expandafter\ifx\csname SETcodequoteundirected\endcsname\relax
+      '%
+    \else \char'15 \fi
+  \else \char'15 \fi
+}
+%
+% and a similar option for the left quote char vs. a grave accent.
+% Modern fonts display ASCII 0x60 as a grave accent, so some people like
+% the code environments to do likewise.
+% 
+\def\codequoteleft{%
+  \expandafter\ifx\csname SETtxicodequotebacktick\endcsname\relax
+    \expandafter\ifx\csname SETcodequotebacktick\endcsname\relax
+      `%
+    \else \char'22 \fi
+  \else \char'22 \fi
+}
+%
+\begingroup
+  \catcode`\^^I=\active
+  \gdef\tabexpand{%
+    \catcode`\^^I=\active
+    \def^^I{\leavevmode\egroup
+      \dimen0=\wd0 % the width so far, or since the previous tab
+      \divide\dimen0 by\tabw
+      \multiply\dimen0 by\tabw % compute previous multiple of \tabw
+      \advance\dimen0 by\tabw  % advance to next multiple of \tabw
+      \wd0=\dimen0 \box0 \starttabbox
+    }%
+  }
+  \catcode`\'=\active
+  \gdef\rquoteexpand{\catcode\rquoteChar=\active \def'{\codequoteright}}%
+  %
+  \catcode`\`=\active
+  \gdef\lquoteexpand{\catcode\lquoteChar=\active \def`{\codequoteleft}}%
+  %
+  \gdef\quoteexpand{\rquoteexpand \lquoteexpand}%
+\endgroup
+
+% start the verbatim environment.
+\def\setupverbatim{%
+  \let\nonarrowing = t%
+  \nonfillstart
+  % Easiest (and conventionally used) font for verbatim
+  \tt
+  \def\par{\leavevmode\egroup\box0\endgraf}%
+  \catcode`\`=\active
+  \tabexpand
+  \quoteexpand
+  % Respect line breaks,
+  % print special symbols as themselves, and
+  % make each space count
+  % must do in this order:
+  \obeylines \uncatcodespecials \sepspaces
+  \everypar{\starttabbox}%
+}
+
+% Do the @verb magic: verbatim text is quoted by unique
+% delimiter characters.  Before first delimiter expect a
+% right brace, after last delimiter expect closing brace:
+%
+%    \def\doverb'{'<char>#1<char>'}'{#1}
+%
+% [Knuth] p. 382; only eat outer {}
+\begingroup
+  \catcode`[=1\catcode`]=2\catcode`\{=\other\catcode`\}=\other
+  \gdef\doverb{#1[\def\next##1#1}[##1\endgroup]\next]
+\endgroup
+%
+\def\verb{\begingroup\setupverb\doverb}
+%
+%
+% Do the @verbatim magic: define the macro \doverbatim so that
+% the (first) argument ends when '@end verbatim' is reached, ie:
+%
+%     \def\doverbatim#1@end verbatim{#1}
+%
+% For Texinfo it's a lot easier than for LaTeX,
+% because texinfo's \verbatim doesn't stop at '\end{verbatim}':
+% we need not redefine '\', '{' and '}'.
+%
+% Inspired by LaTeX's verbatim command set [latex.ltx]
+%
+\begingroup
+  \catcode`\ =\active
+  \obeylines %
+  % ignore everything up to the first ^^M, that's the newline at the end
+  % of the @verbatim input line itself.  Otherwise we get an extra blank
+  % line in the output.
+  \xdef\doverbatim#1^^M#2@end verbatim{#2\noexpand\end\gobble verbatim}%
+  % We really want {...\end verbatim} in the body of the macro, but
+  % without the active space; thus we have to use \xdef and \gobble.
+\endgroup
+%
+\envdef\verbatim{%
+    \setupverbatim\doverbatim
+}
+\let\Everbatim = \afterenvbreak
+
+
+% @verbatiminclude FILE - insert text of file in verbatim environment.
+%
+\def\verbatiminclude{\parseargusing\filenamecatcodes\doverbatiminclude}
+%
+\def\doverbatiminclude#1{%
+  {%
+    \makevalueexpandable
+    \setupverbatim
+    \input #1
+    \afterenvbreak
+  }%
+}
+
+% @copying ... @end copying.
+% Save the text away for @insertcopying later.
+%
+% We save the uninterpreted tokens, rather than creating a box.
+% Saving the text in a box would be much easier, but then all the
+% typesetting commands (@smallbook, font changes, etc.) have to be done
+% beforehand -- and a) we want @copying to be done first in the source
+% file; b) letting users define the frontmatter in as flexible order as
+% possible is very desirable.
+%
+\def\copying{\checkenv{}\begingroup\scanargctxt\docopying}
+\def\docopying#1@end copying{\endgroup\def\copyingtext{#1}}
+%
+\def\insertcopying{%
+  \begingroup
+    \parindent = 0pt  % paragraph indentation looks wrong on title page
+    \scanexp\copyingtext
+  \endgroup
+}
+
+
+\message{defuns,}
+% @defun etc.
+
+\newskip\defbodyindent \defbodyindent=.4in
+\newskip\defargsindent \defargsindent=50pt
+\newskip\deflastargmargin \deflastargmargin=18pt
+\newcount\defunpenalty
+
+% Start the processing of @deffn:
+\def\startdefun{%
+  \ifnum\lastpenalty<10000
+    \medbreak
+    \defunpenalty=10003 % Will keep this @deffn together with the
+                        % following @def command, see below.
+  \else
+    % If there are two @def commands in a row, we'll have a \nobreak,
+    % which is there to keep the function description together with its
+    % header.  But if there's nothing but headers, we need to allow a
+    % break somewhere.  Check specifically for penalty 10002, inserted
+    % by \printdefunline, instead of 10000, since the sectioning
+    % commands also insert a nobreak penalty, and we don't want to allow
+    % a break between a section heading and a defun.
+    %
+    % As a minor refinement, we avoid "club" headers by signalling
+    % with penalty of 10003 after the very first @deffn in the
+    % sequence (see above), and penalty of 10002 after any following
+    % @def command.
+    \ifnum\lastpenalty=10002 \penalty2000 \else \defunpenalty=10002 \fi
+    %
+    % Similarly, after a section heading, do not allow a break.
+    % But do insert the glue.
+    \medskip  % preceded by discardable penalty, so not a breakpoint
+  \fi
+  %
+  \parindent=0in
+  \advance\leftskip by \defbodyindent
+  \exdentamount=\defbodyindent
+}
+
+\def\dodefunx#1{%
+  % First, check whether we are in the right environment:
+  \checkenv#1%
+  %
+  % As above, allow line break if we have multiple x headers in a row.
+  % It's not a great place, though.
+  \ifnum\lastpenalty=10002 \penalty3000 \else \defunpenalty=10002 \fi
+  %
+  % And now, it's time to reuse the body of the original defun:
+  \expandafter\gobbledefun#1%
+}
+\def\gobbledefun#1\startdefun{}
+
+% \printdefunline \deffnheader{text}
+%
+\def\printdefunline#1#2{%
+  \begingroup
+    % call \deffnheader:
+    #1#2 \endheader
+    % common ending:
+    \interlinepenalty = 10000
+    \advance\rightskip by 0pt plus 1fil
+    \endgraf
+    \nobreak\vskip -\parskip
+    \penalty\defunpenalty  % signal to \startdefun and \dodefunx
+    % Some of the @defun-type tags do not enable magic parentheses,
+    % rendering the following check redundant.  But we don't optimize.
+    \checkparencounts
+  \endgroup
+}
+
+\def\Edefun{\endgraf\medbreak}
+
+% \makedefun{deffn} creates \deffn, \deffnx and \Edeffn;
+% the only thing remainnig is to define \deffnheader.
+%
+\def\makedefun#1{%
+  \expandafter\let\csname E#1\endcsname = \Edefun
+  \edef\temp{\noexpand\domakedefun
+    \makecsname{#1}\makecsname{#1x}\makecsname{#1header}}%
+  \temp
+}
+
+% \domakedefun \deffn \deffnx \deffnheader
+%
+% Define \deffn and \deffnx, without parameters.
+% \deffnheader has to be defined explicitly.
+%
+\def\domakedefun#1#2#3{%
+  \envdef#1{%
+    \startdefun
+    \parseargusing\activeparens{\printdefunline#3}%
+  }%
+  \def#2{\dodefunx#1}%
+  \def#3%
+}
+
+%%% Untyped functions:
+
+% @deffn category name args
+\makedefun{deffn}{\deffngeneral{}}
+
+% @deffn category class name args
+\makedefun{defop}#1 {\defopon{#1\ \putwordon}}
+
+% \defopon {category on}class name args
+\def\defopon#1#2 {\deffngeneral{\putwordon\ \code{#2}}{#1\ \code{#2}} }
+
+% \deffngeneral {subind}category name args
+%
+\def\deffngeneral#1#2 #3 #4\endheader{%
+  % Remember that \dosubind{fn}{foo}{} is equivalent to \doind{fn}{foo}.
+  \dosubind{fn}{\code{#3}}{#1}%
+  \defname{#2}{}{#3}\magicamp\defunargs{#4\unskip}%
+}
+
+%%% Typed functions:
+
+% @deftypefn category type name args
+\makedefun{deftypefn}{\deftypefngeneral{}}
+
+% @deftypeop category class type name args
+\makedefun{deftypeop}#1 {\deftypeopon{#1\ \putwordon}}
+
+% \deftypeopon {category on}class type name args
+\def\deftypeopon#1#2 {\deftypefngeneral{\putwordon\ \code{#2}}{#1\ \code{#2}} }
+
+% \deftypefngeneral {subind}category type name args
+%
+\def\deftypefngeneral#1#2 #3 #4 #5\endheader{%
+  \dosubind{fn}{\code{#4}}{#1}%
+  \defname{#2}{#3}{#4}\defunargs{#5\unskip}%
+}
+
+%%% Typed variables:
+
+% @deftypevr category type var args
+\makedefun{deftypevr}{\deftypecvgeneral{}}
+
+% @deftypecv category class type var args
+\makedefun{deftypecv}#1 {\deftypecvof{#1\ \putwordof}}
+
+% \deftypecvof {category of}class type var args
+\def\deftypecvof#1#2 {\deftypecvgeneral{\putwordof\ \code{#2}}{#1\ \code{#2}} }
+
+% \deftypecvgeneral {subind}category type var args
+%
+\def\deftypecvgeneral#1#2 #3 #4 #5\endheader{%
+  \dosubind{vr}{\code{#4}}{#1}%
+  \defname{#2}{#3}{#4}\defunargs{#5\unskip}%
+}
+
+%%% Untyped variables:
+
+% @defvr category var args
+\makedefun{defvr}#1 {\deftypevrheader{#1} {} }
+
+% @defcv category class var args
+\makedefun{defcv}#1 {\defcvof{#1\ \putwordof}}
+
+% \defcvof {category of}class var args
+\def\defcvof#1#2 {\deftypecvof{#1}#2 {} }
+
+%%% Type:
+% @deftp category name args
+\makedefun{deftp}#1 #2 #3\endheader{%
+  \doind{tp}{\code{#2}}%
+  \defname{#1}{}{#2}\defunargs{#3\unskip}%
+}
+
+% Remaining @defun-like shortcuts:
+\makedefun{defun}{\deffnheader{\putwordDeffunc} }
+\makedefun{defmac}{\deffnheader{\putwordDefmac} }
+\makedefun{defspec}{\deffnheader{\putwordDefspec} }
+\makedefun{deftypefun}{\deftypefnheader{\putwordDeffunc} }
+\makedefun{defvar}{\defvrheader{\putwordDefvar} }
+\makedefun{defopt}{\defvrheader{\putwordDefopt} }
+\makedefun{deftypevar}{\deftypevrheader{\putwordDefvar} }
+\makedefun{defmethod}{\defopon\putwordMethodon}
+\makedefun{deftypemethod}{\deftypeopon\putwordMethodon}
+\makedefun{defivar}{\defcvof\putwordInstanceVariableof}
+\makedefun{deftypeivar}{\deftypecvof\putwordInstanceVariableof}
+
+% \defname, which formats the name of the @def (not the args).
+% #1 is the category, such as "Function".
+% #2 is the return type, if any.
+% #3 is the function name.
+%
+% We are followed by (but not passed) the arguments, if any.
+%
+\def\defname#1#2#3{%
+  % Get the values of \leftskip and \rightskip as they were outside the @def...
+  \advance\leftskip by -\defbodyindent
+  %
+  % How we'll format the type name.  Putting it in brackets helps
+  % distinguish it from the body text that may end up on the next line
+  % just below it.
+  \def\temp{#1}%
+  \setbox0=\hbox{\kern\deflastargmargin \ifx\temp\empty\else [\rm\temp]\fi}
+  %
+  % Figure out line sizes for the paragraph shape.
+  % The first line needs space for \box0; but if \rightskip is nonzero,
+  % we need only space for the part of \box0 which exceeds it:
+  \dimen0=\hsize  \advance\dimen0 by -\wd0  \advance\dimen0 by \rightskip
+  % The continuations:
+  \dimen2=\hsize  \advance\dimen2 by -\defargsindent
+  % (plain.tex says that \dimen1 should be used only as global.)
+  \parshape 2 0in \dimen0 \defargsindent \dimen2
+  %
+  % Put the type name to the right margin.
+  \noindent
+  \hbox to 0pt{%
+    \hfil\box0 \kern-\hsize
+    % \hsize has to be shortened this way:
+    \kern\leftskip
+    % Intentionally do not respect \rightskip, since we need the space.
+  }%
+  %
+  % Allow all lines to be underfull without complaint:
+  \tolerance=10000 \hbadness=10000
+  \exdentamount=\defbodyindent
+  {%
+    % defun fonts. We use typewriter by default (used to be bold) because:
+    % . we're printing identifiers, they should be in tt in principle.
+    % . in languages with many accents, such as Czech or French, it's
+    %   common to leave accents off identifiers.  The result looks ok in
+    %   tt, but exceedingly strange in rm.
+    % . we don't want -- and --- to be treated as ligatures.
+    % . this still does not fix the ?` and !` ligatures, but so far no
+    %   one has made identifiers using them :).
+    \df \tt
+    \def\temp{#2}% return value type
+    \ifx\temp\empty\else \tclose{\temp} \fi
+    #3% output function name
+  }%
+  {\rm\enskip}% hskip 0.5 em of \tenrm
+  %
+  \boldbrax
+  % arguments will be output next, if any.
+}
+
+% Print arguments in slanted roman (not ttsl), inconsistently with using
+% tt for the name.  This is because literal text is sometimes needed in
+% the argument list (groff manual), and ttsl and tt are not very
+% distinguishable.  Prevent hyphenation at `-' chars.
+%
+\def\defunargs#1{%
+  % use sl by default (not ttsl),
+  % tt for the names.
+  \df \sl \hyphenchar\font=0
+  %
+  % On the other hand, if an argument has two dashes (for instance), we
+  % want a way to get ttsl.  Let's try @var for that.
+  \let\var=\ttslanted
+  #1%
+  \sl\hyphenchar\font=45
+}
+
+% We want ()&[] to print specially on the defun line.
+%
+\def\activeparens{%
+  \catcode`\(=\active \catcode`\)=\active
+  \catcode`\[=\active \catcode`\]=\active
+  \catcode`\&=\active
+}
+
+% Make control sequences which act like normal parenthesis chars.
+\let\lparen = ( \let\rparen = )
+
+% Be sure that we always have a definition for `(', etc.  For example,
+% if the fn name has parens in it, \boldbrax will not be in effect yet,
+% so TeX would otherwise complain about undefined control sequence.
+{
+  \activeparens
+  \global\let(=\lparen \global\let)=\rparen
+  \global\let[=\lbrack \global\let]=\rbrack
+  \global\let& = \&
+
+  \gdef\boldbrax{\let(=\opnr\let)=\clnr\let[=\lbrb\let]=\rbrb}
+  \gdef\magicamp{\let&=\amprm}
+}
+
+\newcount\parencount
+
+% If we encounter &foo, then turn on ()-hacking afterwards
+\newif\ifampseen
+\def\amprm#1 {\ampseentrue{\bf\&#1 }}
+
+\def\parenfont{%
+  \ifampseen
+    % At the first level, print parens in roman,
+    % otherwise use the default font.
+    \ifnum \parencount=1 \rm \fi
+  \else
+    % The \sf parens (in \boldbrax) actually are a little bolder than
+    % the contained text.  This is especially needed for [ and ] .
+    \sf
+  \fi
+}
+\def\infirstlevel#1{%
+  \ifampseen
+    \ifnum\parencount=1
+      #1%
+    \fi
+  \fi
+}
+\def\bfafterword#1 {#1 \bf}
+
+\def\opnr{%
+  \global\advance\parencount by 1
+  {\parenfont(}%
+  \infirstlevel \bfafterword
+}
+\def\clnr{%
+  {\parenfont)}%
+  \infirstlevel \sl
+  \global\advance\parencount by -1
+}
+
+\newcount\brackcount
+\def\lbrb{%
+  \global\advance\brackcount by 1
+  {\bf[}%
+}
+\def\rbrb{%
+  {\bf]}%
+  \global\advance\brackcount by -1
+}
+
+\def\checkparencounts{%
+  \ifnum\parencount=0 \else \badparencount \fi
+  \ifnum\brackcount=0 \else \badbrackcount \fi
+}
+% these should not use \errmessage; the glibc manual, at least, actually
+% has such constructs (when documenting function pointers).
+\def\badparencount{%
+  \message{Warning: unbalanced parentheses in @def...}%
+  \global\parencount=0
+}
+\def\badbrackcount{%
+  \message{Warning: unbalanced square brackets in @def...}%
+  \global\brackcount=0
+}
+
+
+\message{macros,}
+% @macro.
+
+% To do this right we need a feature of e-TeX, \scantokens,
+% which we arrange to emulate with a temporary file in ordinary TeX.
+\ifx\eTeXversion\undefined
+  \newwrite\macscribble
+  \def\scantokens#1{%
+    \toks0={#1}%
+    \immediate\openout\macscribble=\jobname.tmp
+    \immediate\write\macscribble{\the\toks0}%
+    \immediate\closeout\macscribble
+    \input \jobname.tmp
+  }
+\fi
+
+\def\scanmacro#1{%
+  \begingroup
+    \newlinechar`\^^M
+    \let\xeatspaces\eatspaces
+    % Undo catcode changes of \startcontents and \doprintindex
+    % When called from @insertcopying or (short)caption, we need active
+    % backslash to get it printed correctly.  Previously, we had
+    % \catcode`\\=\other instead.  We'll see whether a problem appears
+    % with macro expansion.				--kasal, 19aug04
+    \catcode`\@=0 \catcode`\\=\active \escapechar=`\@
+    % ... and \example
+    \spaceisspace
+    %
+    % Append \endinput to make sure that TeX does not see the ending newline.
+    % I've verified that it is necessary both for e-TeX and for ordinary TeX
+    %							--kasal, 29nov03
+    \scantokens{#1\endinput}%
+  \endgroup
+}
+
+\def\scanexp#1{%
+  \edef\temp{\noexpand\scanmacro{#1}}%
+  \temp
+}
+
+\newcount\paramno   % Count of parameters
+\newtoks\macname    % Macro name
+\newif\ifrecursive  % Is it recursive?
+
+% List of all defined macros in the form
+%    \definedummyword\macro1\definedummyword\macro2...
+% Currently is also contains all @aliases; the list can be split
+% if there is a need.
+\def\macrolist{}
+
+% Add the macro to \macrolist
+\def\addtomacrolist#1{\expandafter \addtomacrolistxxx \csname#1\endcsname}
+\def\addtomacrolistxxx#1{%
+     \toks0 = \expandafter{\macrolist\definedummyword#1}%
+     \xdef\macrolist{\the\toks0}%
+}
+
+% Utility routines.
+% This does \let #1 = #2, with \csnames; that is,
+%   \let \csname#1\endcsname = \csname#2\endcsname
+% (except of course we have to play expansion games).
+% 
+\def\cslet#1#2{%
+  \expandafter\let
+  \csname#1\expandafter\endcsname
+  \csname#2\endcsname
+}
+
+% Trim leading and trailing spaces off a string.
+% Concepts from aro-bend problem 15 (see CTAN).
+{\catcode`\@=11
+\gdef\eatspaces #1{\expandafter\trim@\expandafter{#1 }}
+\gdef\trim@ #1{\trim@@ @#1 @ #1 @ @@}
+\gdef\trim@@ #1@ #2@ #3@@{\trim@@@\empty #2 @}
+\def\unbrace#1{#1}
+\unbrace{\gdef\trim@@@ #1 } #2@{#1}
+}
+
+% Trim a single trailing ^^M off a string.
+{\catcode`\^^M=\other \catcode`\Q=3%
+\gdef\eatcr #1{\eatcra #1Q^^MQ}%
+\gdef\eatcra#1^^MQ{\eatcrb#1Q}%
+\gdef\eatcrb#1Q#2Q{#1}%
+}
+
+% Macro bodies are absorbed as an argument in a context where
+% all characters are catcode 10, 11 or 12, except \ which is active
+% (as in normal texinfo). It is necessary to change the definition of \.
+
+% Non-ASCII encodings make 8-bit characters active, so un-activate
+% them to avoid their expansion.  Must do this non-globally, to
+% confine the change to the current group.
+
+% It's necessary to have hard CRs when the macro is executed. This is
+% done by  making ^^M (\endlinechar) catcode 12 when reading the macro
+% body, and then making it the \newlinechar in \scanmacro.
+
+\def\scanctxt{%
+  \catcode`\"=\other
+  \catcode`\+=\other
+  \catcode`\<=\other
+  \catcode`\>=\other
+  \catcode`\@=\other
+  \catcode`\^=\other
+  \catcode`\_=\other
+  \catcode`\|=\other
+  \catcode`\~=\other
+  \ifx\declaredencoding\ascii \else \setnonasciicharscatcodenonglobal\other \fi
+}
+
+\def\scanargctxt{%
+  \scanctxt
+  \catcode`\\=\other
+  \catcode`\^^M=\other
+}
+
+\def\macrobodyctxt{%
+  \scanctxt
+  \catcode`\{=\other
+  \catcode`\}=\other
+  \catcode`\^^M=\other
+  \usembodybackslash
+}
+
+\def\macroargctxt{%
+  \scanctxt
+  \catcode`\\=\other
+}
+
+% \mbodybackslash is the definition of \ in @macro bodies.
+% It maps \foo\ => \csname macarg.foo\endcsname => #N
+% where N is the macro parameter number.
+% We define \csname macarg.\endcsname to be \realbackslash, so
+% \\ in macro replacement text gets you a backslash.
+
+{\catcode`@=0 @catcode`@\=@active
+ @gdef@usembodybackslash{@let\=@mbodybackslash}
+ @gdef@mbodybackslash#1\{@csname macarg.#1@endcsname}
+}
+\expandafter\def\csname macarg.\endcsname{\realbackslash}
+
+\def\macro{\recursivefalse\parsearg\macroxxx}
+\def\rmacro{\recursivetrue\parsearg\macroxxx}
+
+\def\macroxxx#1{%
+  \getargs{#1}%           now \macname is the macname and \argl the arglist
+  \ifx\argl\empty       % no arguments
+     \paramno=0%
+  \else
+     \expandafter\parsemargdef \argl;%
+  \fi
+  \if1\csname ismacro.\the\macname\endcsname
+     \message{Warning: redefining \the\macname}%
+  \else
+     \expandafter\ifx\csname \the\macname\endcsname \relax
+     \else \errmessage{Macro name \the\macname\space already defined}\fi
+     \global\cslet{macsave.\the\macname}{\the\macname}%
+     \global\expandafter\let\csname ismacro.\the\macname\endcsname=1%
+     \addtomacrolist{\the\macname}%
+  \fi
+  \begingroup \macrobodyctxt
+  \ifrecursive \expandafter\parsermacbody
+  \else \expandafter\parsemacbody
+  \fi}
+
+\parseargdef\unmacro{%
+  \if1\csname ismacro.#1\endcsname
+    \global\cslet{#1}{macsave.#1}%
+    \global\expandafter\let \csname ismacro.#1\endcsname=0%
+    % Remove the macro name from \macrolist:
+    \begingroup
+      \expandafter\let\csname#1\endcsname \relax
+      \let\definedummyword\unmacrodo
+      \xdef\macrolist{\macrolist}%
+    \endgroup
+  \else
+    \errmessage{Macro #1 not defined}%
+  \fi
+}
+
+% Called by \do from \dounmacro on each macro.  The idea is to omit any
+% macro definitions that have been changed to \relax.
+%
+\def\unmacrodo#1{%
+  \ifx #1\relax
+    % remove this
+  \else
+    \noexpand\definedummyword \noexpand#1%
+  \fi
+}
+
+% This makes use of the obscure feature that if the last token of a
+% <parameter list> is #, then the preceding argument is delimited by
+% an opening brace, and that opening brace is not consumed.
+\def\getargs#1{\getargsxxx#1{}}
+\def\getargsxxx#1#{\getmacname #1 \relax\getmacargs}
+\def\getmacname #1 #2\relax{\macname={#1}}
+\def\getmacargs#1{\def\argl{#1}}
+
+% Parse the optional {params} list.  Set up \paramno and \paramlist
+% so \defmacro knows what to do.  Define \macarg.blah for each blah
+% in the params list, to be ##N where N is the position in that list.
+% That gets used by \mbodybackslash (above).
+
+% We need to get `macro parameter char #' into several definitions.
+% The technique used is stolen from LaTeX:  let \hash be something
+% unexpandable, insert that wherever you need a #, and then redefine
+% it to # just before using the token list produced.
+%
+% The same technique is used to protect \eatspaces till just before
+% the macro is used.
+
+\def\parsemargdef#1;{\paramno=0\def\paramlist{}%
+        \let\hash\relax\let\xeatspaces\relax\parsemargdefxxx#1,;,}
+\def\parsemargdefxxx#1,{%
+  \if#1;\let\next=\relax
+  \else \let\next=\parsemargdefxxx
+    \advance\paramno by 1%
+    \expandafter\edef\csname macarg.\eatspaces{#1}\endcsname
+        {\xeatspaces{\hash\the\paramno}}%
+    \edef\paramlist{\paramlist\hash\the\paramno,}%
+  \fi\next}
+
+% These two commands read recursive and nonrecursive macro bodies.
+% (They're different since rec and nonrec macros end differently.)
+
+\long\def\parsemacbody#1@end macro%
+{\xdef\temp{\eatcr{#1}}\endgroup\defmacro}%
+\long\def\parsermacbody#1@end rmacro%
+{\xdef\temp{\eatcr{#1}}\endgroup\defmacro}%
+
+% This defines the macro itself. There are six cases: recursive and
+% nonrecursive macros of zero, one, and many arguments.
+% Much magic with \expandafter here.
+% \xdef is used so that macro definitions will survive the file
+% they're defined in; @include reads the file inside a group.
+\def\defmacro{%
+  \let\hash=##% convert placeholders to macro parameter chars
+  \ifrecursive
+    \ifcase\paramno
+    % 0
+      \expandafter\xdef\csname\the\macname\endcsname{%
+        \noexpand\scanmacro{\temp}}%
+    \or % 1
+      \expandafter\xdef\csname\the\macname\endcsname{%
+         \bgroup\noexpand\macroargctxt
+         \noexpand\braceorline
+         \expandafter\noexpand\csname\the\macname xxx\endcsname}%
+      \expandafter\xdef\csname\the\macname xxx\endcsname##1{%
+         \egroup\noexpand\scanmacro{\temp}}%
+    \else % many
+      \expandafter\xdef\csname\the\macname\endcsname{%
+         \bgroup\noexpand\macroargctxt
+         \noexpand\csname\the\macname xx\endcsname}%
+      \expandafter\xdef\csname\the\macname xx\endcsname##1{%
+          \expandafter\noexpand\csname\the\macname xxx\endcsname ##1,}%
+      \expandafter\expandafter
+      \expandafter\xdef
+      \expandafter\expandafter
+        \csname\the\macname xxx\endcsname
+          \paramlist{\egroup\noexpand\scanmacro{\temp}}%
+    \fi
+  \else
+    \ifcase\paramno
+    % 0
+      \expandafter\xdef\csname\the\macname\endcsname{%
+        \noexpand\norecurse{\the\macname}%
+        \noexpand\scanmacro{\temp}\egroup}%
+    \or % 1
+      \expandafter\xdef\csname\the\macname\endcsname{%
+         \bgroup\noexpand\macroargctxt
+         \noexpand\braceorline
+         \expandafter\noexpand\csname\the\macname xxx\endcsname}%
+      \expandafter\xdef\csname\the\macname xxx\endcsname##1{%
+        \egroup
+        \noexpand\norecurse{\the\macname}%
+        \noexpand\scanmacro{\temp}\egroup}%
+    \else % many
+      \expandafter\xdef\csname\the\macname\endcsname{%
+         \bgroup\noexpand\macroargctxt
+         \expandafter\noexpand\csname\the\macname xx\endcsname}%
+      \expandafter\xdef\csname\the\macname xx\endcsname##1{%
+          \expandafter\noexpand\csname\the\macname xxx\endcsname ##1,}%
+      \expandafter\expandafter
+      \expandafter\xdef
+      \expandafter\expandafter
+      \csname\the\macname xxx\endcsname
+      \paramlist{%
+          \egroup
+          \noexpand\norecurse{\the\macname}%
+          \noexpand\scanmacro{\temp}\egroup}%
+    \fi
+  \fi}
+
+\def\norecurse#1{\bgroup\cslet{#1}{macsave.#1}}
+
+% \braceorline decides whether the next nonwhitespace character is a
+% {.  If so it reads up to the closing }, if not, it reads the whole
+% line.  Whatever was read is then fed to the next control sequence
+% as an argument (by \parsebrace or \parsearg)
+\def\braceorline#1{\let\macnamexxx=#1\futurelet\nchar\braceorlinexxx}
+\def\braceorlinexxx{%
+  \ifx\nchar\bgroup\else
+    \expandafter\parsearg
+  \fi \macnamexxx}
+
+
+% @alias.
+% We need some trickery to remove the optional spaces around the equal
+% sign.  Just make them active and then expand them all to nothing.
+\def\alias{\parseargusing\obeyspaces\aliasxxx}
+\def\aliasxxx #1{\aliasyyy#1\relax}
+\def\aliasyyy #1=#2\relax{%
+  {%
+    \expandafter\let\obeyedspace=\empty
+    \addtomacrolist{#1}%
+    \xdef\next{\global\let\makecsname{#1}=\makecsname{#2}}%
+  }%
+  \next
+}
+
+
+\message{cross references,}
+
+\newwrite\auxfile
+\newif\ifhavexrefs    % True if xref values are known.
+\newif\ifwarnedxrefs  % True if we warned once that they aren't known.
+
+% @inforef is relatively simple.
+\def\inforef #1{\inforefzzz #1,,,,**}
+\def\inforefzzz #1,#2,#3,#4**{\putwordSee{} \putwordInfo{} \putwordfile{} \file{\ignorespaces #3{}},
+  node \samp{\ignorespaces#1{}}}
+
+% @node's only job in TeX is to define \lastnode, which is used in
+% cross-references.  The @node line might or might not have commas, and
+% might or might not have spaces before the first comma, like:
+% @node foo , bar , ...
+% We don't want such trailing spaces in the node name.
+%
+\parseargdef\node{\checkenv{}\donode #1 ,\finishnodeparse}
+%
+% also remove a trailing comma, in case of something like this:
+% @node Help-Cross,  ,  , Cross-refs
+\def\donode#1 ,#2\finishnodeparse{\dodonode #1,\finishnodeparse}
+\def\dodonode#1,#2\finishnodeparse{\gdef\lastnode{#1}}
+
+\let\nwnode=\node
+\let\lastnode=\empty
+
+% Write a cross-reference definition for the current node.  #1 is the
+% type (Ynumbered, Yappendix, Ynothing).
+%
+\def\donoderef#1{%
+  \ifx\lastnode\empty\else
+    \setref{\lastnode}{#1}%
+    \global\let\lastnode=\empty
+  \fi
+}
+
+% @anchor{NAME} -- define xref target at arbitrary point.
+%
+\newcount\savesfregister
+%
+\def\savesf{\relax \ifhmode \savesfregister=\spacefactor \fi}
+\def\restoresf{\relax \ifhmode \spacefactor=\savesfregister \fi}
+\def\anchor#1{\savesf \setref{#1}{Ynothing}\restoresf \ignorespaces}
+
+% \setref{NAME}{SNT} defines a cross-reference point NAME (a node or an
+% anchor), which consists of three parts:
+% 1) NAME-title - the current sectioning name taken from \lastsection,
+%                 or the anchor name.
+% 2) NAME-snt   - section number and type, passed as the SNT arg, or
+%                 empty for anchors.
+% 3) NAME-pg    - the page number.
+%
+% This is called from \donoderef, \anchor, and \dofloat.  In the case of
+% floats, there is an additional part, which is not written here:
+% 4) NAME-lof   - the text as it should appear in a @listoffloats.
+%
+\def\setref#1#2{%
+  \pdfmkdest{#1}%
+  \iflinks
+    {%
+      \atdummies  % preserve commands, but don't expand them
+      \edef\writexrdef##1##2{%
+	\write\auxfile{@xrdef{#1-% #1 of \setref, expanded by the \edef
+	  ##1}{##2}}% these are parameters of \writexrdef
+      }%
+      \toks0 = \expandafter{\lastsection}%
+      \immediate \writexrdef{title}{\the\toks0 }%
+      \immediate \writexrdef{snt}{\csname #2\endcsname}% \Ynumbered etc.
+      \safewhatsit{\writexrdef{pg}{\folio}}% will be written later, during \shipout
+    }%
+  \fi
+}
+
+% @xref, @pxref, and @ref generate cross-references.  For \xrefX, #1 is
+% the node name, #2 the name of the Info cross-reference, #3 the printed
+% node name, #4 the name of the Info file, #5 the name of the printed
+% manual.  All but the node name can be omitted.
+%
+\def\pxref#1{\putwordsee{} \xrefX[#1,,,,,,,]}
+\def\xref#1{\putwordSee{} \xrefX[#1,,,,,,,]}
+\def\ref#1{\xrefX[#1,,,,,,,]}
+\def\xrefX[#1,#2,#3,#4,#5,#6]{\begingroup
+  \unsepspaces
+  \def\printedmanual{\ignorespaces #5}%
+  \def\printedrefname{\ignorespaces #3}%
+  \setbox1=\hbox{\printedmanual\unskip}%
+  \setbox0=\hbox{\printedrefname\unskip}%
+  \ifdim \wd0 = 0pt
+    % No printed node name was explicitly given.
+    \expandafter\ifx\csname SETxref-automatic-section-title\endcsname\relax
+      % Use the node name inside the square brackets.
+      \def\printedrefname{\ignorespaces #1}%
+    \else
+      % Use the actual chapter/section title appear inside
+      % the square brackets.  Use the real section title if we have it.
+      \ifdim \wd1 > 0pt
+        % It is in another manual, so we don't have it.
+        \def\printedrefname{\ignorespaces #1}%
+      \else
+        \ifhavexrefs
+          % We know the real title if we have the xref values.
+          \def\printedrefname{\refx{#1-title}{}}%
+        \else
+          % Otherwise just copy the Info node name.
+          \def\printedrefname{\ignorespaces #1}%
+        \fi%
+      \fi
+    \fi
+  \fi
+  %
+  % Make link in pdf output.
+  \ifpdf
+    {\indexnofonts
+     \turnoffactive
+     % This expands tokens, so do it after making catcode changes, so _
+     % etc. don't get their TeX definitions.
+     \getfilename{#4}%
+     %
+     % See comments at \activebackslashdouble.
+     {\activebackslashdouble \xdef\pdfxrefdest{#1}%
+      \backslashparens\pdfxrefdest}%
+     %
+     \leavevmode
+     \startlink attr{/Border [0 0 0]}%
+     \ifnum\filenamelength>0
+       goto file{\the\filename.pdf} name{\pdfxrefdest}%
+     \else
+       goto name{\pdfmkpgn{\pdfxrefdest}}%
+     \fi
+    }%
+    \setcolor{\linkcolor}%
+  \fi
+  %
+  % Float references are printed completely differently: "Figure 1.2"
+  % instead of "[somenode], p.3".  We distinguish them by the
+  % LABEL-title being set to a magic string.
+  {%
+    % Have to otherify everything special to allow the \csname to
+    % include an _ in the xref name, etc.
+    \indexnofonts
+    \turnoffactive
+    \expandafter\global\expandafter\let\expandafter\Xthisreftitle
+      \csname XR#1-title\endcsname
+  }%
+  \iffloat\Xthisreftitle
+    % If the user specified the print name (third arg) to the ref,
+    % print it instead of our usual "Figure 1.2".
+    \ifdim\wd0 = 0pt
+      \refx{#1-snt}{}%
+    \else
+      \printedrefname
+    \fi
+    %
+    % if the user also gave the printed manual name (fifth arg), append
+    % "in MANUALNAME".
+    \ifdim \wd1 > 0pt
+      \space \putwordin{} \cite{\printedmanual}%
+    \fi
+  \else
+    % node/anchor (non-float) references.
+    %
+    % If we use \unhbox0 and \unhbox1 to print the node names, TeX does not
+    % insert empty discretionaries after hyphens, which means that it will
+    % not find a line break at a hyphen in a node names.  Since some manuals
+    % are best written with fairly long node names, containing hyphens, this
+    % is a loss.  Therefore, we give the text of the node name again, so it
+    % is as if TeX is seeing it for the first time.
+    \ifdim \wd1 > 0pt
+      \putwordSection{} ``\printedrefname'' \putwordin{} \cite{\printedmanual}%
+    \else
+      % _ (for example) has to be the character _ for the purposes of the
+      % control sequence corresponding to the node, but it has to expand
+      % into the usual \leavevmode...\vrule stuff for purposes of
+      % printing. So we \turnoffactive for the \refx-snt, back on for the
+      % printing, back off for the \refx-pg.
+      {\turnoffactive
+       % Only output a following space if the -snt ref is nonempty; for
+       % @unnumbered and @anchor, it won't be.
+       \setbox2 = \hbox{\ignorespaces \refx{#1-snt}{}}%
+       \ifdim \wd2 > 0pt \refx{#1-snt}\space\fi
+      }%
+      % output the `[mynode]' via a macro so it can be overridden.
+      \xrefprintnodename\printedrefname
+      %
+      % But we always want a comma and a space:
+      ,\space
+      %
+      % output the `page 3'.
+      \turnoffactive \putwordpage\tie\refx{#1-pg}{}%
+    \fi
+  \fi
+  \endlink
+\endgroup}
+
+% This macro is called from \xrefX for the `[nodename]' part of xref
+% output.  It's a separate macro only so it can be changed more easily,
+% since square brackets don't work well in some documents.  Particularly
+% one that Bob is working on :).
+%
+\def\xrefprintnodename#1{[#1]}
+
+% Things referred to by \setref.
+%
+\def\Ynothing{}
+\def\Yomitfromtoc{}
+\def\Ynumbered{%
+  \ifnum\secno=0
+    \putwordChapter@tie \the\chapno
+  \else \ifnum\subsecno=0
+    \putwordSection@tie \the\chapno.\the\secno
+  \else \ifnum\subsubsecno=0
+    \putwordSection@tie \the\chapno.\the\secno.\the\subsecno
+  \else
+    \putwordSection@tie \the\chapno.\the\secno.\the\subsecno.\the\subsubsecno
+  \fi\fi\fi
+}
+\def\Yappendix{%
+  \ifnum\secno=0
+     \putwordAppendix@tie @char\the\appendixno{}%
+  \else \ifnum\subsecno=0
+     \putwordSection@tie @char\the\appendixno.\the\secno
+  \else \ifnum\subsubsecno=0
+    \putwordSection@tie @char\the\appendixno.\the\secno.\the\subsecno
+  \else
+    \putwordSection@tie
+      @char\the\appendixno.\the\secno.\the\subsecno.\the\subsubsecno
+  \fi\fi\fi
+}
+
+% Define \refx{NAME}{SUFFIX} to reference a cross-reference string named NAME.
+% If its value is nonempty, SUFFIX is output afterward.
+%
+\def\refx#1#2{%
+  {%
+    \indexnofonts
+    \otherbackslash
+    \expandafter\global\expandafter\let\expandafter\thisrefX
+      \csname XR#1\endcsname
+  }%
+  \ifx\thisrefX\relax
+    % If not defined, say something at least.
+    \angleleft un\-de\-fined\angleright
+    \iflinks
+      \ifhavexrefs
+        \message{\linenumber Undefined cross reference `#1'.}%
+      \else
+        \ifwarnedxrefs\else
+          \global\warnedxrefstrue
+          \message{Cross reference values unknown; you must run TeX again.}%
+        \fi
+      \fi
+    \fi
+  \else
+    % It's defined, so just use it.
+    \thisrefX
+  \fi
+  #2% Output the suffix in any case.
+}
+
+% This is the macro invoked by entries in the aux file.  Usually it's
+% just a \def (we prepend XR to the control sequence name to avoid
+% collisions).  But if this is a float type, we have more work to do.
+%
+\def\xrdef#1#2{%
+  {% The node name might contain 8-bit characters, which in our current
+   % implementation are changed to commands like @'e.  Don't let these
+   % mess up the control sequence name.
+    \indexnofonts
+    \turnoffactive
+    \xdef\safexrefname{#1}%
+  }%
+  %
+  \expandafter\gdef\csname XR\safexrefname\endcsname{#2}% remember this xref
+  %
+  % Was that xref control sequence that we just defined for a float?
+  \expandafter\iffloat\csname XR\safexrefname\endcsname
+    % it was a float, and we have the (safe) float type in \iffloattype.
+    \expandafter\let\expandafter\floatlist
+      \csname floatlist\iffloattype\endcsname
+    %
+    % Is this the first time we've seen this float type?
+    \expandafter\ifx\floatlist\relax
+      \toks0 = {\do}% yes, so just \do
+    \else
+      % had it before, so preserve previous elements in list.
+      \toks0 = \expandafter{\floatlist\do}%
+    \fi
+    %
+    % Remember this xref in the control sequence \floatlistFLOATTYPE,
+    % for later use in \listoffloats.
+    \expandafter\xdef\csname floatlist\iffloattype\endcsname{\the\toks0
+      {\safexrefname}}%
+  \fi
+}
+
+% Read the last existing aux file, if any.  No error if none exists.
+%
+\def\tryauxfile{%
+  \openin 1 \jobname.aux
+  \ifeof 1 \else
+    \readdatafile{aux}%
+    \global\havexrefstrue
+  \fi
+  \closein 1
+}
+
+\def\setupdatafile{%
+  \catcode`\^^@=\other
+  \catcode`\^^A=\other
+  \catcode`\^^B=\other
+  \catcode`\^^C=\other
+  \catcode`\^^D=\other
+  \catcode`\^^E=\other
+  \catcode`\^^F=\other
+  \catcode`\^^G=\other
+  \catcode`\^^H=\other
+  \catcode`\^^K=\other
+  \catcode`\^^L=\other
+  \catcode`\^^N=\other
+  \catcode`\^^P=\other
+  \catcode`\^^Q=\other
+  \catcode`\^^R=\other
+  \catcode`\^^S=\other
+  \catcode`\^^T=\other
+  \catcode`\^^U=\other
+  \catcode`\^^V=\other
+  \catcode`\^^W=\other
+  \catcode`\^^X=\other
+  \catcode`\^^Z=\other
+  \catcode`\^^[=\other
+  \catcode`\^^\=\other
+  \catcode`\^^]=\other
+  \catcode`\^^^=\other
+  \catcode`\^^_=\other
+  % It was suggested to set the catcode of ^ to 7, which would allow ^^e4 etc.
+  % in xref tags, i.e., node names.  But since ^^e4 notation isn't
+  % supported in the main text, it doesn't seem desirable.  Furthermore,
+  % that is not enough: for node names that actually contain a ^
+  % character, we would end up writing a line like this: 'xrdef {'hat
+  % b-title}{'hat b} and \xrdef does a \csname...\endcsname on the first
+  % argument, and \hat is not an expandable control sequence.  It could
+  % all be worked out, but why?  Either we support ^^ or we don't.
+  %
+  % The other change necessary for this was to define \auxhat:
+  % \def\auxhat{\def^{'hat }}% extra space so ok if followed by letter
+  % and then to call \auxhat in \setq.
+  %
+  \catcode`\^=\other
+  %
+  % Special characters.  Should be turned off anyway, but...
+  \catcode`\~=\other
+  \catcode`\[=\other
+  \catcode`\]=\other
+  \catcode`\"=\other
+  \catcode`\_=\other
+  \catcode`\|=\other
+  \catcode`\<=\other
+  \catcode`\>=\other
+  \catcode`\$=\other
+  \catcode`\#=\other
+  \catcode`\&=\other
+  \catcode`\%=\other
+  \catcode`+=\other % avoid \+ for paranoia even though we've turned it off
+  %
+  % This is to support \ in node names and titles, since the \
+  % characters end up in a \csname.  It's easier than
+  % leaving it active and making its active definition an actual \
+  % character.  What I don't understand is why it works in the *value*
+  % of the xrdef.  Seems like it should be a catcode12 \, and that
+  % should not typeset properly.  But it works, so I'm moving on for
+  % now.  --karl, 15jan04.
+  \catcode`\\=\other
+  %
+  % Make the characters 128-255 be printing characters.
+  {%
+    \count1=128
+    \def\loop{%
+      \catcode\count1=\other
+      \advance\count1 by 1
+      \ifnum \count1<256 \loop \fi
+    }%
+  }%
+  %
+  % @ is our escape character in .aux files, and we need braces.
+  \catcode`\{=1
+  \catcode`\}=2
+  \catcode`\@=0
+}
+
+\def\readdatafile#1{%
+\begingroup
+  \setupdatafile
+  \input\jobname.#1
+\endgroup}
+
+
+\message{insertions,}
+% including footnotes.
+
+\newcount \footnoteno
+
+% The trailing space in the following definition for supereject is
+% vital for proper filling; pages come out unaligned when you do a
+% pagealignmacro call if that space before the closing brace is
+% removed. (Generally, numeric constants should always be followed by a
+% space to prevent strange expansion errors.)
+\def\supereject{\par\penalty -20000\footnoteno =0 }
+
+% @footnotestyle is meaningful for info output only.
+\let\footnotestyle=\comment
+
+{\catcode `\@=11
+%
+% Auto-number footnotes.  Otherwise like plain.
+\gdef\footnote{%
+  \let\indent=\ptexindent
+  \let\noindent=\ptexnoindent
+  \global\advance\footnoteno by \@ne
+  \edef\thisfootno{$^{\the\footnoteno}$}%
+  %
+  % In case the footnote comes at the end of a sentence, preserve the
+  % extra spacing after we do the footnote number.
+  \let\@sf\empty
+  \ifhmode\edef\@sf{\spacefactor\the\spacefactor}\ptexslash\fi
+  %
+  % Remove inadvertent blank space before typesetting the footnote number.
+  \unskip
+  \thisfootno\@sf
+  \dofootnote
+}%
+
+% Don't bother with the trickery in plain.tex to not require the
+% footnote text as a parameter.  Our footnotes don't need to be so general.
+%
+% Oh yes, they do; otherwise, @ifset (and anything else that uses
+% \parseargline) fails inside footnotes because the tokens are fixed when
+% the footnote is read.  --karl, 16nov96.
+%
+\gdef\dofootnote{%
+  \insert\footins\bgroup
+  % We want to typeset this text as a normal paragraph, even if the
+  % footnote reference occurs in (for example) a display environment.
+  % So reset some parameters.
+  \hsize=\pagewidth
+  \interlinepenalty\interfootnotelinepenalty
+  \splittopskip\ht\strutbox % top baseline for broken footnotes
+  \splitmaxdepth\dp\strutbox
+  \floatingpenalty\@MM
+  \leftskip\z@skip
+  \rightskip\z@skip
+  \spaceskip\z@skip
+  \xspaceskip\z@skip
+  \parindent\defaultparindent
+  %
+  \smallfonts \rm
+  %
+  % Because we use hanging indentation in footnotes, a @noindent appears
+  % to exdent this text, so make it be a no-op.  makeinfo does not use
+  % hanging indentation so @noindent can still be needed within footnote
+  % text after an @example or the like (not that this is good style).
+  \let\noindent = \relax
+  %
+  % Hang the footnote text off the number.  Use \everypar in case the
+  % footnote extends for more than one paragraph.
+  \everypar = {\hang}%
+  \textindent{\thisfootno}%
+  %
+  % Don't crash into the line above the footnote text.  Since this
+  % expands into a box, it must come within the paragraph, lest it
+  % provide a place where TeX can split the footnote.
+  \footstrut
+  \futurelet\next\fo@t
+}
+}%end \catcode `\@=11
+
+% In case a @footnote appears in a vbox, save the footnote text and create
+% the real \insert just after the vbox finished.  Otherwise, the insertion
+% would be lost.
+% Similarily, if a @footnote appears inside an alignment, save the footnote
+% text to a box and make the \insert when a row of the table is finished.
+% And the same can be done for other insert classes.  --kasal, 16nov03.
+
+% Replace the \insert primitive by a cheating macro.
+% Deeper inside, just make sure that the saved insertions are not spilled
+% out prematurely.
+%
+\def\startsavinginserts{%
+  \ifx \insert\ptexinsert
+    \let\insert\saveinsert
+  \else
+    \let\checkinserts\relax
+  \fi
+}
+
+% This \insert replacement works for both \insert\footins{foo} and
+% \insert\footins\bgroup foo\egroup, but it doesn't work for \insert27{foo}.
+%
+\def\saveinsert#1{%
+  \edef\next{\noexpand\savetobox \makeSAVEname#1}%
+  \afterassignment\next
+  % swallow the left brace
+  \let\temp =
+}
+\def\makeSAVEname#1{\makecsname{SAVE\expandafter\gobble\string#1}}
+\def\savetobox#1{\global\setbox#1 = \vbox\bgroup \unvbox#1}
+
+\def\checksaveins#1{\ifvoid#1\else \placesaveins#1\fi}
+
+\def\placesaveins#1{%
+  \ptexinsert \csname\expandafter\gobblesave\string#1\endcsname
+    {\box#1}%
+}
+
+% eat @SAVE -- beware, all of them have catcode \other:
+{
+  \def\dospecials{\do S\do A\do V\do E} \uncatcodespecials  %  ;-)
+  \gdef\gobblesave @SAVE{}
+}
+
+% initialization:
+\def\newsaveins #1{%
+  \edef\next{\noexpand\newsaveinsX \makeSAVEname#1}%
+  \next
+}
+\def\newsaveinsX #1{%
+  \csname newbox\endcsname #1%
+  \expandafter\def\expandafter\checkinserts\expandafter{\checkinserts
+    \checksaveins #1}%
+}
+
+% initialize:
+\let\checkinserts\empty
+\newsaveins\footins
+\newsaveins\margin
+
+
+% @image.  We use the macros from epsf.tex to support this.
+% If epsf.tex is not installed and @image is used, we complain.
+%
+% Check for and read epsf.tex up front.  If we read it only at @image
+% time, we might be inside a group, and then its definitions would get
+% undone and the next image would fail.
+\openin 1 = epsf.tex
+\ifeof 1 \else
+  % Do not bother showing banner with epsf.tex v2.7k (available in
+  % doc/epsf.tex and on ctan).
+  \def\epsfannounce{\toks0 = }%
+  \input epsf.tex
+\fi
+\closein 1
+%
+% We will only complain once about lack of epsf.tex.
+\newif\ifwarnednoepsf
+\newhelp\noepsfhelp{epsf.tex must be installed for images to
+  work.  It is also included in the Texinfo distribution, or you can get
+  it from ftp://tug.org/tex/epsf.tex.}
+%
+\def\image#1{%
+  \ifx\epsfbox\undefined
+    \ifwarnednoepsf \else
+      \errhelp = \noepsfhelp
+      \errmessage{epsf.tex not found, images will be ignored}%
+      \global\warnednoepsftrue
+    \fi
+  \else
+    \imagexxx #1,,,,,\finish
+  \fi
+}
+%
+% Arguments to @image:
+% #1 is (mandatory) image filename; we tack on .eps extension.
+% #2 is (optional) width, #3 is (optional) height.
+% #4 is (ignored optional) html alt text.
+% #5 is (ignored optional) extension.
+% #6 is just the usual extra ignored arg for parsing this stuff.
+\newif\ifimagevmode
+\def\imagexxx#1,#2,#3,#4,#5,#6\finish{\begingroup
+  \catcode`\^^M = 5     % in case we're inside an example
+  \normalturnoffactive  % allow _ et al. in names
+  % If the image is by itself, center it.
+  \ifvmode
+    \imagevmodetrue
+    \nobreak\bigskip
+    % Usually we'll have text after the image which will insert
+    % \parskip glue, so insert it here too to equalize the space
+    % above and below.
+    \nobreak\vskip\parskip
+    \nobreak
+    \line\bgroup
+  \fi
+  %
+  % Output the image.
+  \ifpdf
+    \dopdfimage{#1}{#2}{#3}%
+  \else
+    % \epsfbox itself resets \epsf?size at each figure.
+    \setbox0 = \hbox{\ignorespaces #2}\ifdim\wd0 > 0pt \epsfxsize=#2\relax \fi
+    \setbox0 = \hbox{\ignorespaces #3}\ifdim\wd0 > 0pt \epsfysize=#3\relax \fi
+    \epsfbox{#1.eps}%
+  \fi
+  %
+  \ifimagevmode \egroup \bigbreak \fi  % space after the image
+\endgroup}
+
+
+% @float FLOATTYPE,LABEL,LOC ... @end float for displayed figures, tables,
+% etc.  We don't actually implement floating yet, we always include the
+% float "here".  But it seemed the best name for the future.
+%
+\envparseargdef\float{\eatcommaspace\eatcommaspace\dofloat#1, , ,\finish}
+
+% There may be a space before second and/or third parameter; delete it.
+\def\eatcommaspace#1, {#1,}
+
+% #1 is the optional FLOATTYPE, the text label for this float, typically
+% "Figure", "Table", "Example", etc.  Can't contain commas.  If omitted,
+% this float will not be numbered and cannot be referred to.
+%
+% #2 is the optional xref label.  Also must be present for the float to
+% be referable.
+%
+% #3 is the optional positioning argument; for now, it is ignored.  It
+% will somehow specify the positions allowed to float to (here, top, bottom).
+%
+% We keep a separate counter for each FLOATTYPE, which we reset at each
+% chapter-level command.
+\let\resetallfloatnos=\empty
+%
+\def\dofloat#1,#2,#3,#4\finish{%
+  \let\thiscaption=\empty
+  \let\thisshortcaption=\empty
+  %
+  % don't lose footnotes inside @float.
+  %
+  % BEWARE: when the floats start float, we have to issue warning whenever an
+  % insert appears inside a float which could possibly float. --kasal, 26may04
+  %
+  \startsavinginserts
+  %
+  % We can't be used inside a paragraph.
+  \par
+  %
+  \vtop\bgroup
+    \def\floattype{#1}%
+    \def\floatlabel{#2}%
+    \def\floatloc{#3}% we do nothing with this yet.
+    %
+    \ifx\floattype\empty
+      \let\safefloattype=\empty
+    \else
+      {%
+        % the floattype might have accents or other special characters,
+        % but we need to use it in a control sequence name.
+        \indexnofonts
+        \turnoffactive
+        \xdef\safefloattype{\floattype}%
+      }%
+    \fi
+    %
+    % If label is given but no type, we handle that as the empty type.
+    \ifx\floatlabel\empty \else
+      % We want each FLOATTYPE to be numbered separately (Figure 1,
+      % Table 1, Figure 2, ...).  (And if no label, no number.)
+      %
+      \expandafter\getfloatno\csname\safefloattype floatno\endcsname
+      \global\advance\floatno by 1
+      %
+      {%
+        % This magic value for \lastsection is output by \setref as the
+        % XREFLABEL-title value.  \xrefX uses it to distinguish float
+        % labels (which have a completely different output format) from
+        % node and anchor labels.  And \xrdef uses it to construct the
+        % lists of floats.
+        %
+        \edef\lastsection{\floatmagic=\safefloattype}%
+        \setref{\floatlabel}{Yfloat}%
+      }%
+    \fi
+    %
+    % start with \parskip glue, I guess.
+    \vskip\parskip
+    %
+    % Don't suppress indentation if a float happens to start a section.
+    \restorefirstparagraphindent
+}
+
+% we have these possibilities:
+% @float Foo,lbl & @caption{Cap}: Foo 1.1: Cap
+% @float Foo,lbl & no caption:    Foo 1.1
+% @float Foo & @caption{Cap}:     Foo: Cap
+% @float Foo & no caption:        Foo
+% @float ,lbl & Caption{Cap}:     1.1: Cap
+% @float ,lbl & no caption:       1.1
+% @float & @caption{Cap}:         Cap
+% @float & no caption:
+%
+\def\Efloat{%
+    \let\floatident = \empty
+    %
+    % In all cases, if we have a float type, it comes first.
+    \ifx\floattype\empty \else \def\floatident{\floattype}\fi
+    %
+    % If we have an xref label, the number comes next.
+    \ifx\floatlabel\empty \else
+      \ifx\floattype\empty \else % if also had float type, need tie first.
+        \appendtomacro\floatident{\tie}%
+      \fi
+      % the number.
+      \appendtomacro\floatident{\chaplevelprefix\the\floatno}%
+    \fi
+    %
+    % Start the printed caption with what we've constructed in
+    % \floatident, but keep it separate; we need \floatident again.
+    \let\captionline = \floatident
+    %
+    \ifx\thiscaption\empty \else
+      \ifx\floatident\empty \else
+	\appendtomacro\captionline{: }% had ident, so need a colon between
+      \fi
+      %
+      % caption text.
+      \appendtomacro\captionline{\scanexp\thiscaption}%
+    \fi
+    %
+    % If we have anything to print, print it, with space before.
+    % Eventually this needs to become an \insert.
+    \ifx\captionline\empty \else
+      \vskip.5\parskip
+      \captionline
+      %
+      % Space below caption.
+      \vskip\parskip
+    \fi
+    %
+    % If have an xref label, write the list of floats info.  Do this
+    % after the caption, to avoid chance of it being a breakpoint.
+    \ifx\floatlabel\empty \else
+      % Write the text that goes in the lof to the aux file as
+      % \floatlabel-lof.  Besides \floatident, we include the short
+      % caption if specified, else the full caption if specified, else nothing.
+      {%
+        \atdummies
+        %
+        % since we read the caption text in the macro world, where ^^M
+        % is turned into a normal character, we have to scan it back, so
+        % we don't write the literal three characters "^^M" into the aux file.
+	\scanexp{%
+	  \xdef\noexpand\gtemp{%
+	    \ifx\thisshortcaption\empty
+	      \thiscaption
+	    \else
+	      \thisshortcaption
+	    \fi
+	  }%
+	}%
+        \immediate\write\auxfile{@xrdef{\floatlabel-lof}{\floatident
+	  \ifx\gtemp\empty \else : \gtemp \fi}}%
+      }%
+    \fi
+  \egroup  % end of \vtop
+  %
+  % place the captured inserts
+  %
+  % BEWARE: when the floats start floating, we have to issue warning
+  % whenever an insert appears inside a float which could possibly
+  % float. --kasal, 26may04
+  %
+  \checkinserts
+}
+
+% Append the tokens #2 to the definition of macro #1, not expanding either.
+%
+\def\appendtomacro#1#2{%
+  \expandafter\def\expandafter#1\expandafter{#1#2}%
+}
+
+% @caption, @shortcaption
+%
+\def\caption{\docaption\thiscaption}
+\def\shortcaption{\docaption\thisshortcaption}
+\def\docaption{\checkenv\float \bgroup\scanargctxt\defcaption}
+\def\defcaption#1#2{\egroup \def#1{#2}}
+
+% The parameter is the control sequence identifying the counter we are
+% going to use.  Create it if it doesn't exist and assign it to \floatno.
+\def\getfloatno#1{%
+  \ifx#1\relax
+      % Haven't seen this figure type before.
+      \csname newcount\endcsname #1%
+      %
+      % Remember to reset this floatno at the next chap.
+      \expandafter\gdef\expandafter\resetallfloatnos
+        \expandafter{\resetallfloatnos #1=0 }%
+  \fi
+  \let\floatno#1%
+}
+
+% \setref calls this to get the XREFLABEL-snt value.  We want an @xref
+% to the FLOATLABEL to expand to "Figure 3.1".  We call \setref when we
+% first read the @float command.
+%
+\def\Yfloat{\floattype@tie \chaplevelprefix\the\floatno}%
+
+% Magic string used for the XREFLABEL-title value, so \xrefX can
+% distinguish floats from other xref types.
+\def\floatmagic{!!float!!}
+
+% #1 is the control sequence we are passed; we expand into a conditional
+% which is true if #1 represents a float ref.  That is, the magic
+% \lastsection value which we \setref above.
+%
+\def\iffloat#1{\expandafter\doiffloat#1==\finish}
+%
+% #1 is (maybe) the \floatmagic string.  If so, #2 will be the
+% (safe) float type for this float.  We set \iffloattype to #2.
+%
+\def\doiffloat#1=#2=#3\finish{%
+  \def\temp{#1}%
+  \def\iffloattype{#2}%
+  \ifx\temp\floatmagic
+}
+
+% @listoffloats FLOATTYPE - print a list of floats like a table of contents.
+%
+\parseargdef\listoffloats{%
+  \def\floattype{#1}% floattype
+  {%
+    % the floattype might have accents or other special characters,
+    % but we need to use it in a control sequence name.
+    \indexnofonts
+    \turnoffactive
+    \xdef\safefloattype{\floattype}%
+  }%
+  %
+  % \xrdef saves the floats as a \do-list in \floatlistSAFEFLOATTYPE.
+  \expandafter\ifx\csname floatlist\safefloattype\endcsname \relax
+    \ifhavexrefs
+      % if the user said @listoffloats foo but never @float foo.
+      \message{\linenumber No `\safefloattype' floats to list.}%
+    \fi
+  \else
+    \begingroup
+      \leftskip=\tocindent  % indent these entries like a toc
+      \let\do=\listoffloatsdo
+      \csname floatlist\safefloattype\endcsname
+    \endgroup
+  \fi
+}
+
+% This is called on each entry in a list of floats.  We're passed the
+% xref label, in the form LABEL-title, which is how we save it in the
+% aux file.  We strip off the -title and look up \XRLABEL-lof, which
+% has the text we're supposed to typeset here.
+%
+% Figures without xref labels will not be included in the list (since
+% they won't appear in the aux file).
+%
+\def\listoffloatsdo#1{\listoffloatsdoentry#1\finish}
+\def\listoffloatsdoentry#1-title\finish{{%
+  % Can't fully expand XR#1-lof because it can contain anything.  Just
+  % pass the control sequence.  On the other hand, XR#1-pg is just the
+  % page number, and we want to fully expand that so we can get a link
+  % in pdf output.
+  \toksA = \expandafter{\csname XR#1-lof\endcsname}%
+  %
+  % use the same \entry macro we use to generate the TOC and index.
+  \edef\writeentry{\noexpand\entry{\the\toksA}{\csname XR#1-pg\endcsname}}%
+  \writeentry
+}}
+
+
+\message{localization,}
+
+% @documentlanguage is usually given very early, just after
+% @setfilename.  If done too late, it may not override everything
+% properly.  Single argument is the language (de) or locale (de_DE)
+% abbreviation.  It would be nice if we could set up a hyphenation file.
+%
+{
+  \catcode`\_ = \active
+  \globaldefs=1
+\parseargdef\documentlanguage{\begingroup
+  \let_=\normalunderscore  % normal _ character for filenames
+  \tex % read txi-??.tex file in plain TeX.
+    % Read the file by the name they passed if it exists.
+    \openin 1 txi-#1.tex
+    \ifeof 1
+      \documentlanguagetrywithoutunderscore{#1_\finish}%
+    \else
+      \input txi-#1.tex
+    \fi
+    \closein 1
+  \endgroup
+\endgroup}
+}
+%
+% If they passed de_DE, and txi-de_DE.tex doesn't exist,
+% try txi-de.tex.
+% 
+\def\documentlanguagetrywithoutunderscore#1_#2\finish{%
+  \openin 1 txi-#1.tex
+  \ifeof 1
+    \errhelp = \nolanghelp
+    \errmessage{Cannot read language file txi-#1.tex}%
+  \else
+    \input txi-#1.tex
+  \fi
+  \closein 1
+}
+%
+\newhelp\nolanghelp{The given language definition file cannot be found or
+is empty.  Maybe you need to install it?  In the current directory
+should work if nowhere else does.}
+
+% Set the catcode of characters 128 through 255 to the specified number.
+%
+\def\setnonasciicharscatcode#1{%
+   \count255=128
+   \loop\ifnum\count255<256
+      \global\catcode\count255=#1\relax
+      \advance\count255 by 1
+   \repeat
+}
+
+\def\setnonasciicharscatcodenonglobal#1{%
+   \count255=128
+   \loop\ifnum\count255<256
+      \catcode\count255=#1\relax
+      \advance\count255 by 1
+   \repeat
+}
+
+% @documentencoding sets the definition of non-ASCII characters
+% according to the specified encoding.
+%
+\parseargdef\documentencoding{%
+  % Encoding being declared for the document.
+  \def\declaredencoding{\csname #1.enc\endcsname}%
+  %
+  % Supported encodings: names converted to tokens in order to be able
+  % to compare them with \ifx.
+  \def\ascii{\csname US-ASCII.enc\endcsname}%
+  \def\latnine{\csname ISO-8859-15.enc\endcsname}%
+  \def\latone{\csname ISO-8859-1.enc\endcsname}%
+  \def\lattwo{\csname ISO-8859-2.enc\endcsname}%
+  \def\utfeight{\csname UTF-8.enc\endcsname}%
+  %
+  \ifx \declaredencoding \ascii
+     \asciichardefs
+  %
+  \else \ifx \declaredencoding \lattwo
+     \setnonasciicharscatcode\active
+     \lattwochardefs
+  %
+  \else \ifx \declaredencoding \latone 
+     \setnonasciicharscatcode\active
+     \latonechardefs
+  %
+  \else \ifx \declaredencoding \latnine
+     \setnonasciicharscatcode\active
+     \latninechardefs
+  %
+  \else \ifx \declaredencoding \utfeight
+     \setnonasciicharscatcode\active
+     \utfeightchardefs
+  %
+  \else 
+    \message{Unknown document encoding #1, ignoring.}%
+  %
+  \fi % utfeight
+  \fi % latnine
+  \fi % latone
+  \fi % lattwo
+  \fi % ascii
+}
+
+% A message to be logged when using a character that isn't available
+% the default font encoding (OT1).
+% 
+\def\missingcharmsg#1{\message{Character missing in OT1 encoding: #1.}}
+
+% Take account of \c (plain) vs. \, (Texinfo) difference.
+\def\cedilla#1{\ifx\c\ptexc\c{#1}\else\,{#1}\fi}
+
+% First, make active non-ASCII characters in order for them to be
+% correctly categorized when TeX reads the replacement text of
+% macros containing the character definitions.
+\setnonasciicharscatcode\active
+%
+% Latin1 (ISO-8859-1) character definitions.
+\def\latonechardefs{%
+  \gdef^^a0{~} 
+  \gdef^^a1{\exclamdown}
+  \gdef^^a2{\missingcharmsg{CENT SIGN}} 
+  \gdef^^a3{{\pounds}}
+  \gdef^^a4{\missingcharmsg{CURRENCY SIGN}}
+  \gdef^^a5{\missingcharmsg{YEN SIGN}}
+  \gdef^^a6{\missingcharmsg{BROKEN BAR}} 
+  \gdef^^a7{\S}
+  \gdef^^a8{\"{}} 
+  \gdef^^a9{\copyright} 
+  \gdef^^aa{\ordf}
+  \gdef^^ab{\missingcharmsg{LEFT-POINTING DOUBLE ANGLE QUOTATION MARK}} 
+  \gdef^^ac{$\lnot$}
+  \gdef^^ad{\-} 
+  \gdef^^ae{\registeredsymbol} 
+  \gdef^^af{\={}}
+  %
+  \gdef^^b0{\textdegree}
+  \gdef^^b1{$\pm$}
+  \gdef^^b2{$^2$}
+  \gdef^^b3{$^3$}
+  \gdef^^b4{\'{}}
+  \gdef^^b5{$\mu$}
+  \gdef^^b6{\P}
+  %
+  \gdef^^b7{$^.$}
+  \gdef^^b8{\cedilla\ }
+  \gdef^^b9{$^1$}
+  \gdef^^ba{\ordm}
+  %
+  \gdef^^bb{\missingcharmsg{RIGHT-POINTING DOUBLE ANGLE QUOTATION MARK}}
+  \gdef^^bc{$1\over4$}
+  \gdef^^bd{$1\over2$}
+  \gdef^^be{$3\over4$}
+  \gdef^^bf{\questiondown}
+  %
+  \gdef^^c0{\`A}
+  \gdef^^c1{\'A}
+  \gdef^^c2{\^A}
+  \gdef^^c3{\~A}
+  \gdef^^c4{\"A}
+  \gdef^^c5{\ringaccent A} 
+  \gdef^^c6{\AE}
+  \gdef^^c7{\cedilla C}
+  \gdef^^c8{\`E}
+  \gdef^^c9{\'E}
+  \gdef^^ca{\^E}
+  \gdef^^cb{\"E}
+  \gdef^^cc{\`I}
+  \gdef^^cd{\'I}
+  \gdef^^ce{\^I}
+  \gdef^^cf{\"I}
+  %
+  \gdef^^d0{\missingcharmsg{LATIN CAPITAL LETTER ETH}}
+  \gdef^^d1{\~N}
+  \gdef^^d2{\`O}
+  \gdef^^d3{\'O}
+  \gdef^^d4{\^O}
+  \gdef^^d5{\~O}
+  \gdef^^d6{\"O}
+  \gdef^^d7{$\times$}
+  \gdef^^d8{\O}
+  \gdef^^d9{\`U}
+  \gdef^^da{\'U}
+  \gdef^^db{\^U}
+  \gdef^^dc{\"U}
+  \gdef^^dd{\'Y}
+  \gdef^^de{\missingcharmsg{LATIN CAPITAL LETTER THORN}}
+  \gdef^^df{\ss}
+  %
+  \gdef^^e0{\`a}
+  \gdef^^e1{\'a}
+  \gdef^^e2{\^a}
+  \gdef^^e3{\~a}
+  \gdef^^e4{\"a}
+  \gdef^^e5{\ringaccent a}
+  \gdef^^e6{\ae}
+  \gdef^^e7{\cedilla c}
+  \gdef^^e8{\`e}
+  \gdef^^e9{\'e}
+  \gdef^^ea{\^e}
+  \gdef^^eb{\"e}
+  \gdef^^ec{\`{\dotless i}}
+  \gdef^^ed{\'{\dotless i}}
+  \gdef^^ee{\^{\dotless i}}
+  \gdef^^ef{\"{\dotless i}}
+  %
+  \gdef^^f0{\missingcharmsg{LATIN SMALL LETTER ETH}}
+  \gdef^^f1{\~n}
+  \gdef^^f2{\`o}
+  \gdef^^f3{\'o}
+  \gdef^^f4{\^o}
+  \gdef^^f5{\~o}
+  \gdef^^f6{\"o}
+  \gdef^^f7{$\div$}
+  \gdef^^f8{\o}
+  \gdef^^f9{\`u}
+  \gdef^^fa{\'u}
+  \gdef^^fb{\^u}
+  \gdef^^fc{\"u}
+  \gdef^^fd{\'y}
+  \gdef^^fe{\missingcharmsg{LATIN SMALL LETTER THORN}}
+  \gdef^^ff{\"y}
+}
+
+% Latin9 (ISO-8859-15) encoding character definitions.
+\def\latninechardefs{%
+  % Encoding is almost identical to Latin1.
+  \latonechardefs
+  %
+  \gdef^^a4{\euro}
+  \gdef^^a6{\v S}
+  \gdef^^a8{\v s}
+  \gdef^^b4{\v Z}
+  \gdef^^b8{\v z}
+  \gdef^^bc{\OE}
+  \gdef^^bd{\oe}
+  \gdef^^be{\"Y}
+}
+
+% Latin2 (ISO-8859-2) character definitions.
+\def\lattwochardefs{%
+  \gdef^^a0{~}
+  \gdef^^a1{\missingcharmsg{LATIN CAPITAL LETTER A WITH OGONEK}}
+  \gdef^^a2{\u{}}
+  \gdef^^a3{\L}
+  \gdef^^a4{\missingcharmsg{CURRENCY SIGN}}
+  \gdef^^a5{\v L}
+  \gdef^^a6{\'S}
+  \gdef^^a7{\S}
+  \gdef^^a8{\"{}}
+  \gdef^^a9{\v S}
+  \gdef^^aa{\cedilla S}
+  \gdef^^ab{\v T}
+  \gdef^^ac{\'Z}
+  \gdef^^ad{\-}
+  \gdef^^ae{\v Z}
+  \gdef^^af{\dotaccent Z}
+  %
+  \gdef^^b0{\textdegree}
+  \gdef^^b1{\missingcharmsg{LATIN SMALL LETTER A WITH OGONEK}}
+  \gdef^^b2{\missingcharmsg{OGONEK}}
+  \gdef^^b3{\l}
+  \gdef^^b4{\'{}}
+  \gdef^^b5{\v l}
+  \gdef^^b6{\'s}
+  \gdef^^b7{\v{}}
+  \gdef^^b8{\cedilla\ }
+  \gdef^^b9{\v s}
+  \gdef^^ba{\cedilla s}
+  \gdef^^bb{\v t}
+  \gdef^^bc{\'z}
+  \gdef^^bd{\H{}}
+  \gdef^^be{\v z}
+  \gdef^^bf{\dotaccent z}
+  %
+  \gdef^^c0{\'R}
+  \gdef^^c1{\'A}
+  \gdef^^c2{\^A}
+  \gdef^^c3{\u A}
+  \gdef^^c4{\"A}
+  \gdef^^c5{\'L}
+  \gdef^^c6{\'C}
+  \gdef^^c7{\cedilla C}
+  \gdef^^c8{\v C}
+  \gdef^^c9{\'E}
+  \gdef^^ca{\missingcharmsg{LATIN CAPITAL LETTER E WITH OGONEK}}
+  \gdef^^cb{\"E}
+  \gdef^^cc{\v E}
+  \gdef^^cd{\'I}
+  \gdef^^ce{\^I}
+  \gdef^^cf{\v D}
+  %
+  \gdef^^d0{\missingcharmsg{LATIN CAPITAL LETTER D WITH STROKE}}
+  \gdef^^d1{\'N}
+  \gdef^^d2{\v N}
+  \gdef^^d3{\'O}
+  \gdef^^d4{\^O}
+  \gdef^^d5{\H O}
+  \gdef^^d6{\"O}
+  \gdef^^d7{$\times$}
+  \gdef^^d8{\v R}
+  \gdef^^d9{\ringaccent U} 
+  \gdef^^da{\'U}
+  \gdef^^db{\H U}
+  \gdef^^dc{\"U}
+  \gdef^^dd{\'Y}
+  \gdef^^de{\cedilla T}
+  \gdef^^df{\ss}
+  %
+  \gdef^^e0{\'r}
+  \gdef^^e1{\'a}
+  \gdef^^e2{\^a}
+  \gdef^^e3{\u a}
+  \gdef^^e4{\"a}
+  \gdef^^e5{\'l}
+  \gdef^^e6{\'c}
+  \gdef^^e7{\cedilla c}
+  \gdef^^e8{\v c}
+  \gdef^^e9{\'e}
+  \gdef^^ea{\missingcharmsg{LATIN SMALL LETTER E WITH OGONEK}}
+  \gdef^^eb{\"e}
+  \gdef^^ec{\v e}
+  \gdef^^ed{\'\i}
+  \gdef^^ee{\^\i}
+  \gdef^^ef{\v d}
+  %
+  \gdef^^f0{\missingcharmsg{LATIN SMALL LETTER D WITH STROKE}}
+  \gdef^^f1{\'n}
+  \gdef^^f2{\v n}
+  \gdef^^f3{\'o}
+  \gdef^^f4{\^o}
+  \gdef^^f5{\H o}
+  \gdef^^f6{\"o}
+  \gdef^^f7{$\div$}
+  \gdef^^f8{\v r}
+  \gdef^^f9{\ringaccent u}
+  \gdef^^fa{\'u}
+  \gdef^^fb{\H u}
+  \gdef^^fc{\"u}
+  \gdef^^fd{\'y}
+  \gdef^^fe{\cedilla t}
+  \gdef^^ff{\dotaccent{}}
+}
+
+% UTF-8 character definitions.
+% 
+% This code to support UTF-8 is based on LaTeX's utf8.def, with some
+% changes for Texinfo conventions.  It is included here under the GPL by
+% permission from Frank Mittelbach and the LaTeX team.
+% 
+\newcount\countUTFx
+\newcount\countUTFy
+\newcount\countUTFz
+
+\gdef\UTFviiiTwoOctets#1#2{\expandafter
+   \UTFviiiDefined\csname u8:#1\string #2\endcsname}
+%
+\gdef\UTFviiiThreeOctets#1#2#3{\expandafter
+   \UTFviiiDefined\csname u8:#1\string #2\string #3\endcsname}
+%
+\gdef\UTFviiiFourOctets#1#2#3#4{\expandafter
+   \UTFviiiDefined\csname u8:#1\string #2\string #3\string #4\endcsname}
+
+\gdef\UTFviiiDefined#1{%
+  \ifx #1\relax
+    \message{\linenumber Unicode char \string #1 not defined for Texinfo}%
+  \else
+    \expandafter #1%
+  \fi
+}
+
+\begingroup
+  \catcode`\~13
+  \catcode`\"12
+
+  \def\UTFviiiLoop{%
+    \global\catcode\countUTFx\active
+    \uccode`\~\countUTFx
+    \uppercase\expandafter{\UTFviiiTmp}%
+    \advance\countUTFx by 1
+    \ifnum\countUTFx < \countUTFy
+      \expandafter\UTFviiiLoop
+    \fi}
+
+  \countUTFx = "C2
+  \countUTFy = "E0
+  \def\UTFviiiTmp{%
+    \xdef~{\noexpand\UTFviiiTwoOctets\string~}}
+  \UTFviiiLoop
+
+  \countUTFx = "E0
+  \countUTFy = "F0
+  \def\UTFviiiTmp{%
+    \xdef~{\noexpand\UTFviiiThreeOctets\string~}}
+  \UTFviiiLoop
+
+  \countUTFx = "F0
+  \countUTFy = "F4
+  \def\UTFviiiTmp{%
+    \xdef~{\noexpand\UTFviiiFourOctets\string~}}
+  \UTFviiiLoop
+\endgroup
+
+\begingroup
+  \catcode`\"=12
+  \catcode`\<=12
+  \catcode`\.=12
+  \catcode`\,=12
+  \catcode`\;=12
+  \catcode`\!=12
+  \catcode`\~=13
+
+  \gdef\DeclareUnicodeCharacter#1#2{%
+    \countUTFz = "#1\relax
+    \wlog{\space\space defining Unicode char U+#1 (decimal \the\countUTFz)}%
+    \begingroup
+      \parseXMLCharref
+      \def\UTFviiiTwoOctets##1##2{%
+        \csname u8:##1\string ##2\endcsname}%
+      \def\UTFviiiThreeOctets##1##2##3{%
+        \csname u8:##1\string ##2\string ##3\endcsname}%
+      \def\UTFviiiFourOctets##1##2##3##4{%
+        \csname u8:##1\string ##2\string ##3\string ##4\endcsname}%
+      \expandafter\expandafter\expandafter\expandafter
+       \expandafter\expandafter\expandafter
+       \gdef\UTFviiiTmp{#2}%
+    \endgroup}
+
+  \gdef\parseXMLCharref{%
+    \ifnum\countUTFz < "A0\relax
+      \errhelp = \EMsimple
+      \errmessage{Cannot define Unicode char value < 00A0}%
+    \else\ifnum\countUTFz < "800\relax
+      \parseUTFviiiA,%
+      \parseUTFviiiB C\UTFviiiTwoOctets.,%
+    \else\ifnum\countUTFz < "10000\relax
+      \parseUTFviiiA;%
+      \parseUTFviiiA,%
+      \parseUTFviiiB E\UTFviiiThreeOctets.{,;}%
+    \else
+      \parseUTFviiiA;%
+      \parseUTFviiiA,%
+      \parseUTFviiiA!%
+      \parseUTFviiiB F\UTFviiiFourOctets.{!,;}%
+    \fi\fi\fi
+  }
+
+  \gdef\parseUTFviiiA#1{%
+    \countUTFx = \countUTFz
+    \divide\countUTFz by 64
+    \countUTFy = \countUTFz
+    \multiply\countUTFz by 64
+    \advance\countUTFx by -\countUTFz
+    \advance\countUTFx by 128
+    \uccode `#1\countUTFx
+    \countUTFz = \countUTFy}
+
+  \gdef\parseUTFviiiB#1#2#3#4{%
+    \advance\countUTFz by "#10\relax
+    \uccode `#3\countUTFz
+    \uppercase{\gdef\UTFviiiTmp{#2#3#4}}}
+\endgroup
+
+\def\utfeightchardefs{%
+  \DeclareUnicodeCharacter{00A0}{\tie}
+  \DeclareUnicodeCharacter{00A1}{\exclamdown}
+  \DeclareUnicodeCharacter{00A3}{\pounds}
+  \DeclareUnicodeCharacter{00A8}{\"{ }}
+  \DeclareUnicodeCharacter{00A9}{\copyright}
+  \DeclareUnicodeCharacter{00AA}{\ordf}
+  \DeclareUnicodeCharacter{00AB}{\guillemetleft}
+  \DeclareUnicodeCharacter{00AD}{\-}
+  \DeclareUnicodeCharacter{00AE}{\registeredsymbol}
+  \DeclareUnicodeCharacter{00AF}{\={ }}
+
+  \DeclareUnicodeCharacter{00B0}{\ringaccent{ }}
+  \DeclareUnicodeCharacter{00B4}{\'{ }}
+  \DeclareUnicodeCharacter{00B8}{\cedilla{ }}
+  \DeclareUnicodeCharacter{00BA}{\ordm}
+  \DeclareUnicodeCharacter{00BB}{\guillemetright}
+  \DeclareUnicodeCharacter{00BF}{\questiondown}
+
+  \DeclareUnicodeCharacter{00C0}{\`A}
+  \DeclareUnicodeCharacter{00C1}{\'A}
+  \DeclareUnicodeCharacter{00C2}{\^A}
+  \DeclareUnicodeCharacter{00C3}{\~A}
+  \DeclareUnicodeCharacter{00C4}{\"A}
+  \DeclareUnicodeCharacter{00C5}{\AA}
+  \DeclareUnicodeCharacter{00C6}{\AE}
+  \DeclareUnicodeCharacter{00C7}{\cedilla{C}}
+  \DeclareUnicodeCharacter{00C8}{\`E}
+  \DeclareUnicodeCharacter{00C9}{\'E}
+  \DeclareUnicodeCharacter{00CA}{\^E}
+  \DeclareUnicodeCharacter{00CB}{\"E}
+  \DeclareUnicodeCharacter{00CC}{\`I}
+  \DeclareUnicodeCharacter{00CD}{\'I}
+  \DeclareUnicodeCharacter{00CE}{\^I}
+  \DeclareUnicodeCharacter{00CF}{\"I}
+
+  \DeclareUnicodeCharacter{00D1}{\~N}
+  \DeclareUnicodeCharacter{00D2}{\`O}
+  \DeclareUnicodeCharacter{00D3}{\'O}
+  \DeclareUnicodeCharacter{00D4}{\^O}
+  \DeclareUnicodeCharacter{00D5}{\~O}
+  \DeclareUnicodeCharacter{00D6}{\"O}
+  \DeclareUnicodeCharacter{00D8}{\O}
+  \DeclareUnicodeCharacter{00D9}{\`U}
+  \DeclareUnicodeCharacter{00DA}{\'U}
+  \DeclareUnicodeCharacter{00DB}{\^U}
+  \DeclareUnicodeCharacter{00DC}{\"U}
+  \DeclareUnicodeCharacter{00DD}{\'Y}
+  \DeclareUnicodeCharacter{00DF}{\ss}
+
+  \DeclareUnicodeCharacter{00E0}{\`a}
+  \DeclareUnicodeCharacter{00E1}{\'a}
+  \DeclareUnicodeCharacter{00E2}{\^a}
+  \DeclareUnicodeCharacter{00E3}{\~a}
+  \DeclareUnicodeCharacter{00E4}{\"a}
+  \DeclareUnicodeCharacter{00E5}{\aa}
+  \DeclareUnicodeCharacter{00E6}{\ae}
+  \DeclareUnicodeCharacter{00E7}{\cedilla{c}}
+  \DeclareUnicodeCharacter{00E8}{\`e}
+  \DeclareUnicodeCharacter{00E9}{\'e}
+  \DeclareUnicodeCharacter{00EA}{\^e}
+  \DeclareUnicodeCharacter{00EB}{\"e}
+  \DeclareUnicodeCharacter{00EC}{\`{\dotless{i}}}
+  \DeclareUnicodeCharacter{00ED}{\'{\dotless{i}}}
+  \DeclareUnicodeCharacter{00EE}{\^{\dotless{i}}}
+  \DeclareUnicodeCharacter{00EF}{\"{\dotless{i}}}
+
+  \DeclareUnicodeCharacter{00F1}{\~n}
+  \DeclareUnicodeCharacter{00F2}{\`o}
+  \DeclareUnicodeCharacter{00F3}{\'o}
+  \DeclareUnicodeCharacter{00F4}{\^o}
+  \DeclareUnicodeCharacter{00F5}{\~o}
+  \DeclareUnicodeCharacter{00F6}{\"o}
+  \DeclareUnicodeCharacter{00F8}{\o}
+  \DeclareUnicodeCharacter{00F9}{\`u}
+  \DeclareUnicodeCharacter{00FA}{\'u}
+  \DeclareUnicodeCharacter{00FB}{\^u}
+  \DeclareUnicodeCharacter{00FC}{\"u}
+  \DeclareUnicodeCharacter{00FD}{\'y}
+  \DeclareUnicodeCharacter{00FF}{\"y}
+
+  \DeclareUnicodeCharacter{0100}{\=A}
+  \DeclareUnicodeCharacter{0101}{\=a}
+  \DeclareUnicodeCharacter{0102}{\u{A}}
+  \DeclareUnicodeCharacter{0103}{\u{a}}
+  \DeclareUnicodeCharacter{0106}{\'C}
+  \DeclareUnicodeCharacter{0107}{\'c}
+  \DeclareUnicodeCharacter{0108}{\^C}
+  \DeclareUnicodeCharacter{0109}{\^c}
+  \DeclareUnicodeCharacter{010A}{\dotaccent{C}}
+  \DeclareUnicodeCharacter{010B}{\dotaccent{c}}
+  \DeclareUnicodeCharacter{010C}{\v{C}}
+  \DeclareUnicodeCharacter{010D}{\v{c}}
+  \DeclareUnicodeCharacter{010E}{\v{D}}
+
+  \DeclareUnicodeCharacter{0112}{\=E}
+  \DeclareUnicodeCharacter{0113}{\=e}
+  \DeclareUnicodeCharacter{0114}{\u{E}}
+  \DeclareUnicodeCharacter{0115}{\u{e}}
+  \DeclareUnicodeCharacter{0116}{\dotaccent{E}}
+  \DeclareUnicodeCharacter{0117}{\dotaccent{e}}
+  \DeclareUnicodeCharacter{011A}{\v{E}}
+  \DeclareUnicodeCharacter{011B}{\v{e}}
+  \DeclareUnicodeCharacter{011C}{\^G}
+  \DeclareUnicodeCharacter{011D}{\^g}
+  \DeclareUnicodeCharacter{011E}{\u{G}}
+  \DeclareUnicodeCharacter{011F}{\u{g}}
+
+  \DeclareUnicodeCharacter{0120}{\dotaccent{G}}
+  \DeclareUnicodeCharacter{0121}{\dotaccent{g}}
+  \DeclareUnicodeCharacter{0124}{\^H}
+  \DeclareUnicodeCharacter{0125}{\^h}
+  \DeclareUnicodeCharacter{0128}{\~I}
+  \DeclareUnicodeCharacter{0129}{\~{\dotless{i}}}
+  \DeclareUnicodeCharacter{012A}{\=I}
+  \DeclareUnicodeCharacter{012B}{\={\dotless{i}}}
+  \DeclareUnicodeCharacter{012C}{\u{I}}
+  \DeclareUnicodeCharacter{012D}{\u{\dotless{i}}}
+
+  \DeclareUnicodeCharacter{0130}{\dotaccent{I}}
+  \DeclareUnicodeCharacter{0131}{\dotless{i}}
+  \DeclareUnicodeCharacter{0132}{IJ}
+  \DeclareUnicodeCharacter{0133}{ij}
+  \DeclareUnicodeCharacter{0134}{\^J}
+  \DeclareUnicodeCharacter{0135}{\^{\dotless{j}}}
+  \DeclareUnicodeCharacter{0139}{\'L}
+  \DeclareUnicodeCharacter{013A}{\'l}
+
+  \DeclareUnicodeCharacter{0141}{\L}
+  \DeclareUnicodeCharacter{0142}{\l}
+  \DeclareUnicodeCharacter{0143}{\'N}
+  \DeclareUnicodeCharacter{0144}{\'n}
+  \DeclareUnicodeCharacter{0147}{\v{N}}
+  \DeclareUnicodeCharacter{0148}{\v{n}}
+  \DeclareUnicodeCharacter{014C}{\=O}
+  \DeclareUnicodeCharacter{014D}{\=o}
+  \DeclareUnicodeCharacter{014E}{\u{O}}
+  \DeclareUnicodeCharacter{014F}{\u{o}}
+
+  \DeclareUnicodeCharacter{0150}{\H{O}}
+  \DeclareUnicodeCharacter{0151}{\H{o}}
+  \DeclareUnicodeCharacter{0152}{\OE}
+  \DeclareUnicodeCharacter{0153}{\oe}
+  \DeclareUnicodeCharacter{0154}{\'R}
+  \DeclareUnicodeCharacter{0155}{\'r}
+  \DeclareUnicodeCharacter{0158}{\v{R}}
+  \DeclareUnicodeCharacter{0159}{\v{r}}
+  \DeclareUnicodeCharacter{015A}{\'S}
+  \DeclareUnicodeCharacter{015B}{\'s}
+  \DeclareUnicodeCharacter{015C}{\^S}
+  \DeclareUnicodeCharacter{015D}{\^s}
+  \DeclareUnicodeCharacter{015E}{\cedilla{S}}
+  \DeclareUnicodeCharacter{015F}{\cedilla{s}}
+
+  \DeclareUnicodeCharacter{0160}{\v{S}}
+  \DeclareUnicodeCharacter{0161}{\v{s}}
+  \DeclareUnicodeCharacter{0162}{\cedilla{t}}
+  \DeclareUnicodeCharacter{0163}{\cedilla{T}}
+  \DeclareUnicodeCharacter{0164}{\v{T}}
+
+  \DeclareUnicodeCharacter{0168}{\~U}
+  \DeclareUnicodeCharacter{0169}{\~u}
+  \DeclareUnicodeCharacter{016A}{\=U}
+  \DeclareUnicodeCharacter{016B}{\=u}
+  \DeclareUnicodeCharacter{016C}{\u{U}}
+  \DeclareUnicodeCharacter{016D}{\u{u}}
+  \DeclareUnicodeCharacter{016E}{\ringaccent{U}}
+  \DeclareUnicodeCharacter{016F}{\ringaccent{u}}
+
+  \DeclareUnicodeCharacter{0170}{\H{U}}
+  \DeclareUnicodeCharacter{0171}{\H{u}}
+  \DeclareUnicodeCharacter{0174}{\^W}
+  \DeclareUnicodeCharacter{0175}{\^w}
+  \DeclareUnicodeCharacter{0176}{\^Y}
+  \DeclareUnicodeCharacter{0177}{\^y}
+  \DeclareUnicodeCharacter{0178}{\"Y}
+  \DeclareUnicodeCharacter{0179}{\'Z}
+  \DeclareUnicodeCharacter{017A}{\'z}
+  \DeclareUnicodeCharacter{017B}{\dotaccent{Z}}
+  \DeclareUnicodeCharacter{017C}{\dotaccent{z}}
+  \DeclareUnicodeCharacter{017D}{\v{Z}}
+  \DeclareUnicodeCharacter{017E}{\v{z}}
+
+  \DeclareUnicodeCharacter{01C4}{D\v{Z}}
+  \DeclareUnicodeCharacter{01C5}{D\v{z}}
+  \DeclareUnicodeCharacter{01C6}{d\v{z}}
+  \DeclareUnicodeCharacter{01C7}{LJ}
+  \DeclareUnicodeCharacter{01C8}{Lj}
+  \DeclareUnicodeCharacter{01C9}{lj}
+  \DeclareUnicodeCharacter{01CA}{NJ}
+  \DeclareUnicodeCharacter{01CB}{Nj}
+  \DeclareUnicodeCharacter{01CC}{nj}
+  \DeclareUnicodeCharacter{01CD}{\v{A}}
+  \DeclareUnicodeCharacter{01CE}{\v{a}}
+  \DeclareUnicodeCharacter{01CF}{\v{I}}
+
+  \DeclareUnicodeCharacter{01D0}{\v{\dotless{i}}}
+  \DeclareUnicodeCharacter{01D1}{\v{O}}
+  \DeclareUnicodeCharacter{01D2}{\v{o}}
+  \DeclareUnicodeCharacter{01D3}{\v{U}}
+  \DeclareUnicodeCharacter{01D4}{\v{u}}
+
+  \DeclareUnicodeCharacter{01E2}{\={\AE}}
+  \DeclareUnicodeCharacter{01E3}{\={\ae}}
+  \DeclareUnicodeCharacter{01E6}{\v{G}}
+  \DeclareUnicodeCharacter{01E7}{\v{g}}
+  \DeclareUnicodeCharacter{01E8}{\v{K}}
+  \DeclareUnicodeCharacter{01E9}{\v{k}}
+
+  \DeclareUnicodeCharacter{01F0}{\v{\dotless{j}}}
+  \DeclareUnicodeCharacter{01F1}{DZ}
+  \DeclareUnicodeCharacter{01F2}{Dz}
+  \DeclareUnicodeCharacter{01F3}{dz}
+  \DeclareUnicodeCharacter{01F4}{\'G}
+  \DeclareUnicodeCharacter{01F5}{\'g}
+  \DeclareUnicodeCharacter{01F8}{\`N}
+  \DeclareUnicodeCharacter{01F9}{\`n}
+  \DeclareUnicodeCharacter{01FC}{\'{\AE}}
+  \DeclareUnicodeCharacter{01FD}{\'{\ae}}
+  \DeclareUnicodeCharacter{01FE}{\'{\O}}
+  \DeclareUnicodeCharacter{01FF}{\'{\o}}
+
+  \DeclareUnicodeCharacter{021E}{\v{H}}
+  \DeclareUnicodeCharacter{021F}{\v{h}}
+
+  \DeclareUnicodeCharacter{0226}{\dotaccent{A}}
+  \DeclareUnicodeCharacter{0227}{\dotaccent{a}}
+  \DeclareUnicodeCharacter{0228}{\cedilla{E}}
+  \DeclareUnicodeCharacter{0229}{\cedilla{e}}
+  \DeclareUnicodeCharacter{022E}{\dotaccent{O}}
+  \DeclareUnicodeCharacter{022F}{\dotaccent{o}}
+
+  \DeclareUnicodeCharacter{0232}{\=Y}
+  \DeclareUnicodeCharacter{0233}{\=y}
+  \DeclareUnicodeCharacter{0237}{\dotless{j}}
+
+  \DeclareUnicodeCharacter{1E02}{\dotaccent{B}}
+  \DeclareUnicodeCharacter{1E03}{\dotaccent{b}}
+  \DeclareUnicodeCharacter{1E04}{\udotaccent{B}}
+  \DeclareUnicodeCharacter{1E05}{\udotaccent{b}}
+  \DeclareUnicodeCharacter{1E06}{\ubaraccent{B}}
+  \DeclareUnicodeCharacter{1E07}{\ubaraccent{b}}
+  \DeclareUnicodeCharacter{1E0A}{\dotaccent{D}}
+  \DeclareUnicodeCharacter{1E0B}{\dotaccent{d}}
+  \DeclareUnicodeCharacter{1E0C}{\udotaccent{D}}
+  \DeclareUnicodeCharacter{1E0D}{\udotaccent{d}}
+  \DeclareUnicodeCharacter{1E0E}{\ubaraccent{D}}
+  \DeclareUnicodeCharacter{1E0F}{\ubaraccent{d}}
+
+  \DeclareUnicodeCharacter{1E1E}{\dotaccent{F}}
+  \DeclareUnicodeCharacter{1E1F}{\dotaccent{f}}
+
+  \DeclareUnicodeCharacter{1E20}{\=G}
+  \DeclareUnicodeCharacter{1E21}{\=g}
+  \DeclareUnicodeCharacter{1E22}{\dotaccent{H}}
+  \DeclareUnicodeCharacter{1E23}{\dotaccent{h}}
+  \DeclareUnicodeCharacter{1E24}{\udotaccent{H}}
+  \DeclareUnicodeCharacter{1E25}{\udotaccent{h}}
+  \DeclareUnicodeCharacter{1E26}{\"H}
+  \DeclareUnicodeCharacter{1E27}{\"h}
+
+  \DeclareUnicodeCharacter{1E30}{\'K}
+  \DeclareUnicodeCharacter{1E31}{\'k}
+  \DeclareUnicodeCharacter{1E32}{\udotaccent{K}}
+  \DeclareUnicodeCharacter{1E33}{\udotaccent{k}}
+  \DeclareUnicodeCharacter{1E34}{\ubaraccent{K}}
+  \DeclareUnicodeCharacter{1E35}{\ubaraccent{k}}
+  \DeclareUnicodeCharacter{1E36}{\udotaccent{L}}
+  \DeclareUnicodeCharacter{1E37}{\udotaccent{l}}
+  \DeclareUnicodeCharacter{1E3A}{\ubaraccent{L}}
+  \DeclareUnicodeCharacter{1E3B}{\ubaraccent{l}}
+  \DeclareUnicodeCharacter{1E3E}{\'M}
+  \DeclareUnicodeCharacter{1E3F}{\'m}
+
+  \DeclareUnicodeCharacter{1E40}{\dotaccent{M}}
+  \DeclareUnicodeCharacter{1E41}{\dotaccent{m}}
+  \DeclareUnicodeCharacter{1E42}{\udotaccent{M}}
+  \DeclareUnicodeCharacter{1E43}{\udotaccent{m}}
+  \DeclareUnicodeCharacter{1E44}{\dotaccent{N}}
+  \DeclareUnicodeCharacter{1E45}{\dotaccent{n}}
+  \DeclareUnicodeCharacter{1E46}{\udotaccent{N}}
+  \DeclareUnicodeCharacter{1E47}{\udotaccent{n}}
+  \DeclareUnicodeCharacter{1E48}{\ubaraccent{N}}
+  \DeclareUnicodeCharacter{1E49}{\ubaraccent{n}}
+
+  \DeclareUnicodeCharacter{1E54}{\'P}
+  \DeclareUnicodeCharacter{1E55}{\'p}
+  \DeclareUnicodeCharacter{1E56}{\dotaccent{P}}
+  \DeclareUnicodeCharacter{1E57}{\dotaccent{p}}
+  \DeclareUnicodeCharacter{1E58}{\dotaccent{R}}
+  \DeclareUnicodeCharacter{1E59}{\dotaccent{r}}
+  \DeclareUnicodeCharacter{1E5A}{\udotaccent{R}}
+  \DeclareUnicodeCharacter{1E5B}{\udotaccent{r}}
+  \DeclareUnicodeCharacter{1E5E}{\ubaraccent{R}}
+  \DeclareUnicodeCharacter{1E5F}{\ubaraccent{r}}
+
+  \DeclareUnicodeCharacter{1E60}{\dotaccent{S}}
+  \DeclareUnicodeCharacter{1E61}{\dotaccent{s}}
+  \DeclareUnicodeCharacter{1E62}{\udotaccent{S}}
+  \DeclareUnicodeCharacter{1E63}{\udotaccent{s}}
+  \DeclareUnicodeCharacter{1E6A}{\dotaccent{T}}
+  \DeclareUnicodeCharacter{1E6B}{\dotaccent{t}}
+  \DeclareUnicodeCharacter{1E6C}{\udotaccent{T}}
+  \DeclareUnicodeCharacter{1E6D}{\udotaccent{t}}
+  \DeclareUnicodeCharacter{1E6E}{\ubaraccent{T}}
+  \DeclareUnicodeCharacter{1E6F}{\ubaraccent{t}}
+
+  \DeclareUnicodeCharacter{1E7C}{\~V}
+  \DeclareUnicodeCharacter{1E7D}{\~v}
+  \DeclareUnicodeCharacter{1E7E}{\udotaccent{V}}
+  \DeclareUnicodeCharacter{1E7F}{\udotaccent{v}}
+
+  \DeclareUnicodeCharacter{1E80}{\`W}
+  \DeclareUnicodeCharacter{1E81}{\`w}
+  \DeclareUnicodeCharacter{1E82}{\'W}
+  \DeclareUnicodeCharacter{1E83}{\'w}
+  \DeclareUnicodeCharacter{1E84}{\"W}
+  \DeclareUnicodeCharacter{1E85}{\"w}
+  \DeclareUnicodeCharacter{1E86}{\dotaccent{W}}
+  \DeclareUnicodeCharacter{1E87}{\dotaccent{w}}
+  \DeclareUnicodeCharacter{1E88}{\udotaccent{W}}
+  \DeclareUnicodeCharacter{1E89}{\udotaccent{w}}
+  \DeclareUnicodeCharacter{1E8A}{\dotaccent{X}}
+  \DeclareUnicodeCharacter{1E8B}{\dotaccent{x}}
+  \DeclareUnicodeCharacter{1E8C}{\"X}
+  \DeclareUnicodeCharacter{1E8D}{\"x}
+  \DeclareUnicodeCharacter{1E8E}{\dotaccent{Y}}
+  \DeclareUnicodeCharacter{1E8F}{\dotaccent{y}}
+
+  \DeclareUnicodeCharacter{1E90}{\^Z}
+  \DeclareUnicodeCharacter{1E91}{\^z}
+  \DeclareUnicodeCharacter{1E92}{\udotaccent{Z}}
+  \DeclareUnicodeCharacter{1E93}{\udotaccent{z}}
+  \DeclareUnicodeCharacter{1E94}{\ubaraccent{Z}}
+  \DeclareUnicodeCharacter{1E95}{\ubaraccent{z}}
+  \DeclareUnicodeCharacter{1E96}{\ubaraccent{h}}
+  \DeclareUnicodeCharacter{1E97}{\"t}
+  \DeclareUnicodeCharacter{1E98}{\ringaccent{w}}
+  \DeclareUnicodeCharacter{1E99}{\ringaccent{y}}
+
+  \DeclareUnicodeCharacter{1EA0}{\udotaccent{A}}
+  \DeclareUnicodeCharacter{1EA1}{\udotaccent{a}}
+
+  \DeclareUnicodeCharacter{1EB8}{\udotaccent{E}}
+  \DeclareUnicodeCharacter{1EB9}{\udotaccent{e}}
+  \DeclareUnicodeCharacter{1EBC}{\~E}
+  \DeclareUnicodeCharacter{1EBD}{\~e}
+
+  \DeclareUnicodeCharacter{1ECA}{\udotaccent{I}}
+  \DeclareUnicodeCharacter{1ECB}{\udotaccent{i}}
+  \DeclareUnicodeCharacter{1ECC}{\udotaccent{O}}
+  \DeclareUnicodeCharacter{1ECD}{\udotaccent{o}}
+
+  \DeclareUnicodeCharacter{1EE4}{\udotaccent{U}}
+  \DeclareUnicodeCharacter{1EE5}{\udotaccent{u}}
+
+  \DeclareUnicodeCharacter{1EF2}{\`Y}
+  \DeclareUnicodeCharacter{1EF3}{\`y}
+  \DeclareUnicodeCharacter{1EF4}{\udotaccent{Y}}
+
+  \DeclareUnicodeCharacter{1EF8}{\~Y}
+  \DeclareUnicodeCharacter{1EF9}{\~y}
+
+  \DeclareUnicodeCharacter{2013}{--}
+  \DeclareUnicodeCharacter{2014}{---}
+  \DeclareUnicodeCharacter{2018}{\quoteleft}
+  \DeclareUnicodeCharacter{2019}{\quoteright}
+  \DeclareUnicodeCharacter{201A}{\quotesinglbase}
+  \DeclareUnicodeCharacter{201C}{\quotedblleft}
+  \DeclareUnicodeCharacter{201D}{\quotedblright}
+  \DeclareUnicodeCharacter{201E}{\quotedblbase}
+  \DeclareUnicodeCharacter{2022}{\bullet}
+  \DeclareUnicodeCharacter{2026}{\dots}
+  \DeclareUnicodeCharacter{2039}{\guilsinglleft}
+  \DeclareUnicodeCharacter{203A}{\guilsinglright}
+  \DeclareUnicodeCharacter{20AC}{\euro}
+
+  \DeclareUnicodeCharacter{2192}{\expansion}
+  \DeclareUnicodeCharacter{21D2}{\result}
+
+  \DeclareUnicodeCharacter{2212}{\minus}
+  \DeclareUnicodeCharacter{2217}{\point}
+  \DeclareUnicodeCharacter{2261}{\equiv}
+}% end of \utfeightchardefs
+
+
+% US-ASCII character definitions.
+\def\asciichardefs{% nothing need be done
+   \relax
+}
+
+% Make non-ASCII characters printable again for compatibility with
+% existing Texinfo documents that may use them, even without declaring a
+% document encoding.
+%
+\setnonasciicharscatcode \other
+
+
+\message{formatting,}
+
+\newdimen\defaultparindent \defaultparindent = 15pt
+
+\chapheadingskip = 15pt plus 4pt minus 2pt
+\secheadingskip = 12pt plus 3pt minus 2pt
+\subsecheadingskip = 9pt plus 2pt minus 2pt
+
+% Prevent underfull vbox error messages.
+\vbadness = 10000
+
+% Don't be so finicky about underfull hboxes, either.
+\hbadness = 2000
+
+% Following George Bush, get rid of widows and orphans.
+\widowpenalty=10000
+\clubpenalty=10000
+
+% Use TeX 3.0's \emergencystretch to help line breaking, but if we're
+% using an old version of TeX, don't do anything.  We want the amount of
+% stretch added to depend on the line length, hence the dependence on
+% \hsize.  We call this whenever the paper size is set.
+%
+\def\setemergencystretch{%
+  \ifx\emergencystretch\thisisundefined
+    % Allow us to assign to \emergencystretch anyway.
+    \def\emergencystretch{\dimen0}%
+  \else
+    \emergencystretch = .15\hsize
+  \fi
+}
+
+% Parameters in order: 1) textheight; 2) textwidth;
+% 3) voffset; 4) hoffset; 5) binding offset; 6) topskip;
+% 7) physical page height; 8) physical page width.
+%
+% We also call \setleading{\textleading}, so the caller should define
+% \textleading.  The caller should also set \parskip.
+%
+\def\internalpagesizes#1#2#3#4#5#6#7#8{%
+  \voffset = #3\relax
+  \topskip = #6\relax
+  \splittopskip = \topskip
+  %
+  \vsize = #1\relax
+  \advance\vsize by \topskip
+  \outervsize = \vsize
+  \advance\outervsize by 2\topandbottommargin
+  \pageheight = \vsize
+  %
+  \hsize = #2\relax
+  \outerhsize = \hsize
+  \advance\outerhsize by 0.5in
+  \pagewidth = \hsize
+  %
+  \normaloffset = #4\relax
+  \bindingoffset = #5\relax
+  %
+  \ifpdf
+    \pdfpageheight #7\relax
+    \pdfpagewidth #8\relax
+    % if we don't reset these, they will remain at "1 true in" of
+    % whatever layout pdftex was dumped with.
+    \pdfhorigin = 1 true in
+    \pdfvorigin = 1 true in
+  \fi
+  %
+  \setleading{\textleading}
+  %
+  \parindent = \defaultparindent
+  \setemergencystretch
+}
+
+% @letterpaper (the default).
+\def\letterpaper{{\globaldefs = 1
+  \parskip = 3pt plus 2pt minus 1pt
+  \textleading = 13.2pt
+  %
+  % If page is nothing but text, make it come out even.
+  \internalpagesizes{607.2pt}{6in}% that's 46 lines
+                    {\voffset}{.25in}%
+                    {\bindingoffset}{36pt}%
+                    {11in}{8.5in}%
+}}
+
+% Use @smallbook to reset parameters for 7x9.25 trim size.
+\def\smallbook{{\globaldefs = 1
+  \parskip = 2pt plus 1pt
+  \textleading = 12pt
+  %
+  \internalpagesizes{7.5in}{5in}%
+                    {-.2in}{0in}%
+                    {\bindingoffset}{16pt}%
+                    {9.25in}{7in}%
+  %
+  \lispnarrowing = 0.3in
+  \tolerance = 700
+  \hfuzz = 1pt
+  \contentsrightmargin = 0pt
+  \defbodyindent = .5cm
+}}
+
+% Use @smallerbook to reset parameters for 6x9 trim size.
+% (Just testing, parameters still in flux.)
+\def\smallerbook{{\globaldefs = 1
+  \parskip = 1.5pt plus 1pt
+  \textleading = 12pt
+  %
+  \internalpagesizes{7.4in}{4.8in}%
+                    {-.2in}{-.4in}%
+                    {0pt}{14pt}%
+                    {9in}{6in}%
+  %
+  \lispnarrowing = 0.25in
+  \tolerance = 700
+  \hfuzz = 1pt
+  \contentsrightmargin = 0pt
+  \defbodyindent = .4cm
+}}
+
+% Use @afourpaper to print on European A4 paper.
+\def\afourpaper{{\globaldefs = 1
+  \parskip = 3pt plus 2pt minus 1pt
+  \textleading = 13.2pt
+  %
+  % Double-side printing via postscript on Laserjet 4050
+  % prints double-sided nicely when \bindingoffset=10mm and \hoffset=-6mm.
+  % To change the settings for a different printer or situation, adjust
+  % \normaloffset until the front-side and back-side texts align.  Then
+  % do the same for \bindingoffset.  You can set these for testing in
+  % your texinfo source file like this:
+  % @tex
+  % \global\normaloffset = -6mm
+  % \global\bindingoffset = 10mm
+  % @end tex
+  \internalpagesizes{673.2pt}{160mm}% that's 51 lines
+                    {\voffset}{\hoffset}%
+                    {\bindingoffset}{44pt}%
+                    {297mm}{210mm}%
+  %
+  \tolerance = 700
+  \hfuzz = 1pt
+  \contentsrightmargin = 0pt
+  \defbodyindent = 5mm
+}}
+
+% Use @afivepaper to print on European A5 paper.
+% From romildo@urano.iceb.ufop.br, 2 July 2000.
+% He also recommends making @example and @lisp be small.
+\def\afivepaper{{\globaldefs = 1
+  \parskip = 2pt plus 1pt minus 0.1pt
+  \textleading = 12.5pt
+  %
+  \internalpagesizes{160mm}{120mm}%
+                    {\voffset}{\hoffset}%
+                    {\bindingoffset}{8pt}%
+                    {210mm}{148mm}%
+  %
+  \lispnarrowing = 0.2in
+  \tolerance = 800
+  \hfuzz = 1.2pt
+  \contentsrightmargin = 0pt
+  \defbodyindent = 2mm
+  \tableindent = 12mm
+}}
+
+% A specific text layout, 24x15cm overall, intended for A4 paper.
+\def\afourlatex{{\globaldefs = 1
+  \afourpaper
+  \internalpagesizes{237mm}{150mm}%
+                    {\voffset}{4.6mm}%
+                    {\bindingoffset}{7mm}%
+                    {297mm}{210mm}%
+  %
+  % Must explicitly reset to 0 because we call \afourpaper.
+  \globaldefs = 0
+}}
+
+% Use @afourwide to print on A4 paper in landscape format.
+\def\afourwide{{\globaldefs = 1
+  \afourpaper
+  \internalpagesizes{241mm}{165mm}%
+                    {\voffset}{-2.95mm}%
+                    {\bindingoffset}{7mm}%
+                    {297mm}{210mm}%
+  \globaldefs = 0
+}}
+
+% @pagesizes TEXTHEIGHT[,TEXTWIDTH]
+% Perhaps we should allow setting the margins, \topskip, \parskip,
+% and/or leading, also. Or perhaps we should compute them somehow.
+%
+\parseargdef\pagesizes{\pagesizesyyy #1,,\finish}
+\def\pagesizesyyy#1,#2,#3\finish{{%
+  \setbox0 = \hbox{\ignorespaces #2}\ifdim\wd0 > 0pt \hsize=#2\relax \fi
+  \globaldefs = 1
+  %
+  \parskip = 3pt plus 2pt minus 1pt
+  \setleading{\textleading}%
+  %
+  \dimen0 = #1\relax
+  \advance\dimen0 by \voffset
+  %
+  \dimen2 = \hsize
+  \advance\dimen2 by \normaloffset
+  %
+  \internalpagesizes{#1}{\hsize}%
+                    {\voffset}{\normaloffset}%
+                    {\bindingoffset}{44pt}%
+                    {\dimen0}{\dimen2}%
+}}
+
+% Set default to letter.
+%
+\letterpaper
+
+
+\message{and turning on texinfo input format.}
+
+% Define macros to output various characters with catcode for normal text.
+\catcode`\"=\other
+\catcode`\~=\other
+\catcode`\^=\other
+\catcode`\_=\other
+\catcode`\|=\other
+\catcode`\<=\other
+\catcode`\>=\other
+\catcode`\+=\other
+\catcode`\$=\other
+\def\normaldoublequote{"}
+\def\normaltilde{~}
+\def\normalcaret{^}
+\def\normalunderscore{_}
+\def\normalverticalbar{|}
+\def\normalless{<}
+\def\normalgreater{>}
+\def\normalplus{+}
+\def\normaldollar{$}%$ font-lock fix
+
+% This macro is used to make a character print one way in \tt
+% (where it can probably be output as-is), and another way in other fonts,
+% where something hairier probably needs to be done.
+%
+% #1 is what to print if we are indeed using \tt; #2 is what to print
+% otherwise.  Since all the Computer Modern typewriter fonts have zero
+% interword stretch (and shrink), and it is reasonable to expect all
+% typewriter fonts to have this, we can check that font parameter.
+%
+\def\ifusingtt#1#2{\ifdim \fontdimen3\font=0pt #1\else #2\fi}
+
+% Same as above, but check for italic font.  Actually this also catches
+% non-italic slanted fonts since it is impossible to distinguish them from
+% italic fonts.  But since this is only used by $ and it uses \sl anyway
+% this is not a problem.
+\def\ifusingit#1#2{\ifdim \fontdimen1\font>0pt #1\else #2\fi}
+
+% Turn off all special characters except @
+% (and those which the user can use as if they were ordinary).
+% Most of these we simply print from the \tt font, but for some, we can
+% use math or other variants that look better in normal text.
+
+\catcode`\"=\active
+\def\activedoublequote{{\tt\char34}}
+\let"=\activedoublequote
+\catcode`\~=\active
+\def~{{\tt\char126}}
+\chardef\hat=`\^
+\catcode`\^=\active
+\def^{{\tt \hat}}
+
+\catcode`\_=\active
+\def_{\ifusingtt\normalunderscore\_}
+\let\realunder=_
+% Subroutine for the previous macro.
+\def\_{\leavevmode \kern.07em \vbox{\hrule width.3em height.1ex}\kern .07em }
+
+\catcode`\|=\active
+\def|{{\tt\char124}}
+\chardef \less=`\<
+\catcode`\<=\active
+\def<{{\tt \less}}
+\chardef \gtr=`\>
+\catcode`\>=\active
+\def>{{\tt \gtr}}
+\catcode`\+=\active
+\def+{{\tt \char 43}}
+\catcode`\$=\active
+\def${\ifusingit{{\sl\$}}\normaldollar}%$ font-lock fix
+
+% If a .fmt file is being used, characters that might appear in a file
+% name cannot be active until we have parsed the command line.
+% So turn them off again, and have \everyjob (or @setfilename) turn them on.
+% \otherifyactive is called near the end of this file.
+\def\otherifyactive{\catcode`+=\other \catcode`\_=\other}
+
+% Used sometimes to turn off (effectively) the active characters even after
+% parsing them.
+\def\turnoffactive{%
+  \normalturnoffactive
+  \otherbackslash
+}
+
+\catcode`\@=0
+
+% \backslashcurfont outputs one backslash character in current font,
+% as in \char`\\.
+\global\chardef\backslashcurfont=`\\
+\global\let\rawbackslashxx=\backslashcurfont  % let existing .??s files work
+
+% \realbackslash is an actual character `\' with catcode other, and
+% \doublebackslash is two of them (for the pdf outlines).
+{\catcode`\\=\other @gdef@realbackslash{\} @gdef@doublebackslash{\\}}
+
+% In texinfo, backslash is an active character; it prints the backslash
+% in fixed width font.
+\catcode`\\=\active
+@def@normalbackslash{{@tt@backslashcurfont}}
+% On startup, @fixbackslash assigns:
+%  @let \ = @normalbackslash
+
+% \rawbackslash defines an active \ to do \backslashcurfont.
+% \otherbackslash defines an active \ to be a literal `\' character with
+% catcode other.
+@gdef@rawbackslash{@let\=@backslashcurfont}
+@gdef@otherbackslash{@let\=@realbackslash}
+
+% Same as @turnoffactive except outputs \ as {\tt\char`\\} instead of
+% the literal character `\'.
+% 
+@def@normalturnoffactive{%
+  @let\=@normalbackslash
+  @let"=@normaldoublequote
+  @let~=@normaltilde
+  @let^=@normalcaret
+  @let_=@normalunderscore
+  @let|=@normalverticalbar
+  @let<=@normalless
+  @let>=@normalgreater
+  @let+=@normalplus
+  @let$=@normaldollar %$ font-lock fix
+  @unsepspaces
+}
+
+% Make _ and + \other characters, temporarily.
+% This is canceled by @fixbackslash.
+@otherifyactive
+
+% If a .fmt file is being used, we don't want the `\input texinfo' to show up.
+% That is what \eatinput is for; after that, the `\' should revert to printing
+% a backslash.
+%
+@gdef@eatinput input texinfo{@fixbackslash}
+@global@let\ = @eatinput
+
+% On the other hand, perhaps the file did not have a `\input texinfo'. Then
+% the first `\' in the file would cause an error. This macro tries to fix
+% that, assuming it is called before the first `\' could plausibly occur.
+% Also turn back on active characters that might appear in the input
+% file name, in case not using a pre-dumped format.
+%
+@gdef@fixbackslash{%
+  @ifx\@eatinput @let\ = @normalbackslash @fi
+  @catcode`+=@active
+  @catcode`@_=@active
+}
+
+% Say @foo, not \foo, in error messages.
+@escapechar = `@@
+
+% These look ok in all fonts, so just make them not special.
+@catcode`@& = @other
+@catcode`@# = @other
+@catcode`@% = @other
+
+
+@c Local variables:
+@c eval: (add-hook 'write-file-hooks 'time-stamp)
+@c page-delimiter: "^\\\\message"
+@c time-stamp-start: "def\\\\texinfoversion{"
+@c time-stamp-format: "%:y-%02m-%02d.%02H"
+@c time-stamp-end: "}"
+@c End:
+
+@c vim:sw=2:
+
+@ignore
+   arch-tag: e1b36e32-c96e-4135-a41a-0b2efa2ea115
+@end ignore
diff --git a/gcc/doc/install-old.texi b/gcc/doc/install-old.texi
new file mode 100644
index 000000000..0a4afbe45
--- /dev/null
+++ b/gcc/doc/install-old.texi
@@ -0,0 +1,194 @@
+@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file install.texi.
+
+@ifnothtml
+@comment node-name,     next,          previous, up
+@node    Old, GNU Free Documentation License, Specific, Top
+@end ifnothtml
+@html
+<h1 align="center">Old installation documentation</h1>
+@end html
+@ifnothtml
+@chapter Old installation documentation
+@end ifnothtml
+
+Note most of this information is out of date and superseded by the
+previous chapters of this manual.  It is provided for historical
+reference only, because of a lack of volunteers to merge it into the
+main manual.
+
+@ifnothtml
+@menu
+* Configurations::    Configurations Supported by GCC.
+@end menu
+@end ifnothtml
+
+Here is the procedure for installing GCC on a GNU or Unix system.
+
+@enumerate
+@item
+If you have chosen a configuration for GCC which requires other GNU
+tools (such as GAS or the GNU linker) instead of the standard system
+tools, install the required tools in the build directory under the names
+@file{as}, @file{ld} or whatever is appropriate.
+
+Alternatively, you can do subsequent compilation using a value of the
+@code{PATH} environment variable such that the necessary GNU tools come
+before the standard system tools.
+
+@item
+Specify the host, build and target machine configurations.  You do this
+when you run the @file{configure} script.
+
+The @dfn{build} machine is the system which you are using, the
+@dfn{host} machine is the system where you want to run the resulting
+compiler (normally the build machine), and the @dfn{target} machine is
+the system for which you want the compiler to generate code.
+
+If you are building a compiler to produce code for the machine it runs
+on (a native compiler), you normally do not need to specify any operands
+to @file{configure}; it will try to guess the type of machine you are on
+and use that as the build, host and target machines.  So you don't need
+to specify a configuration when building a native compiler unless
+@file{configure} cannot figure out what your configuration is or guesses
+wrong.
+
+In those cases, specify the build machine's @dfn{configuration name}
+with the @option{--host} option; the host and target will default to be
+the same as the host machine.
+
+Here is an example:
+
+@smallexample
+./configure --host=sparc-sun-sunos4.1
+@end smallexample
+
+A configuration name may be canonical or it may be more or less
+abbreviated.
+
+A canonical configuration name has three parts, separated by dashes.
+It looks like this: @samp{@var{cpu}-@var{company}-@var{system}}.
+(The three parts may themselves contain dashes; @file{configure}
+can figure out which dashes serve which purpose.)  For example,
+@samp{m68k-sun-sunos4.1} specifies a Sun 3.
+
+You can also replace parts of the configuration by nicknames or aliases.
+For example, @samp{sun3} stands for @samp{m68k-sun}, so
+@samp{sun3-sunos4.1} is another way to specify a Sun 3.
+
+You can specify a version number after any of the system types, and some
+of the CPU types.  In most cases, the version is irrelevant, and will be
+ignored.  So you might as well specify the version if you know it.
+
+See @ref{Configurations}, for a list of supported configuration names and
+notes on many of the configurations.  You should check the notes in that
+section before proceeding any further with the installation of GCC@.
+
+@end enumerate
+
+@ifnothtml
+@node Configurations, , , Old
+@section Configurations Supported by GCC
+@end ifnothtml
+@html
+<h2>@anchor{Configurations}Configurations Supported by GCC</h2>
+@end html
+@cindex configurations supported by GCC
+
+Here are the possible CPU types:
+
+@quotation
+@c gmicro, fx80, spur and tahoe omitted since they don't work.
+1750a, a29k, alpha, arm, avr, c@var{n}, clipper, dsp16xx, elxsi, fr30, h8300,
+hppa1.0, hppa1.1, i370, i386, i486, i586, i686, i786, i860, i960, ip2k, m32r,
+m68000, m68k, m6811, m6812, m88k, mcore, mips, mipsel, mips64, mips64el,
+mn10200, mn10300, ns32k, pdp11, powerpc, powerpcle, romp, rs6000, sh, sparc,
+sparclite, sparc64, v850, vax, we32k.
+@end quotation
+
+Here are the recognized company names.  As you can see, customary
+abbreviations are used rather than the longer official names.
+
+@c What should be done about merlin, tek*, dolphin?
+@quotation
+acorn, alliant, altos, apollo, apple, att, bull,
+cbm, convergent, convex, crds, dec, dg, dolphin,
+elxsi, encore, harris, hitachi, hp, ibm, intergraph, isi,
+mips, motorola, ncr, next, ns, omron, plexus,
+sequent, sgi, sony, sun, tti, unicom, wrs.
+@end quotation
+
+The company name is meaningful only to disambiguate when the rest of
+the information supplied is insufficient.  You can omit it, writing
+just @samp{@var{cpu}-@var{system}}, if it is not needed.  For example,
+@samp{vax-ultrix4.2} is equivalent to @samp{vax-dec-ultrix4.2}.
+
+Here is a list of system types:
+
+@quotation
+386bsd, aix, acis, amigaos, aos, aout, aux, bosx, bsd, clix, coff, ctix, cxux,
+dgux, dynix, ebmon, ecoff, elf, esix, freebsd, hms, genix, gnu, linux,
+linux-gnu, hiux, hpux, iris, irix, isc, luna, lynxos, mach, minix, msdos, mvs,
+netbsd, newsos, nindy, ns, osf, osfrose, ptx, riscix, riscos, rtu, sco, sim,
+solaris, sunos, sym, sysv, udi, ultrix, unicos, uniplus, unos, vms, vsta,
+vxworks, winnt, xenix.
+@end quotation
+
+@noindent
+You can omit the system type; then @file{configure} guesses the
+operating system from the CPU and company.
+
+You can add a version number to the system type; this may or may not
+make a difference.  For example, you can write @samp{bsd4.3} or
+@samp{bsd4.4} to distinguish versions of BSD@.  In practice, the version
+number is most needed for @samp{sysv3} and @samp{sysv4}, which are often
+treated differently.
+
+@samp{linux-gnu} is the canonical name for the GNU/Linux target; however
+GCC will also accept @samp{linux}.  The version of the kernel in use is
+not relevant on these systems.  A suffix such as @samp{libc1} or @samp{aout}
+distinguishes major versions of the C library; all of the suffixed versions
+are obsolete.
+
+If you specify an impossible combination such as @samp{i860-dg-vms},
+then you may get an error message from @file{configure}, or it may
+ignore part of the information and do the best it can with the rest.
+@file{configure} always prints the canonical name for the alternative
+that it used.  GCC does not support all possible alternatives.
+
+Often a particular model of machine has a name.  Many machine names are
+recognized as aliases for CPU/company combinations.  Thus, the machine
+name @samp{sun3}, mentioned above, is an alias for @samp{m68k-sun}.
+Sometimes we accept a company name as a machine name, when the name is
+popularly used for a particular machine.  Here is a table of the known
+machine names:
+
+@quotation
+3300, 3b1, 3b@var{n}, 7300, altos3068, altos,
+apollo68, att-7300, balance,
+convex-c@var{n}, crds, decstation-3100,
+decstation, delta, encore,
+fx2800, gmicro, hp7@var{nn}, hp8@var{nn},
+hp9k2@var{nn}, hp9k3@var{nn}, hp9k7@var{nn},
+hp9k8@var{nn}, iris4d, iris, isi68,
+m3230, magnum, merlin, miniframe,
+mmax, news-3600, news800, news, next,
+pbd, pc532, pmax, powerpc, powerpcle, ps2, risc-news,
+rtpc, sun2, sun386i, sun386, sun3,
+sun4, symmetry, tower-32, tower.
+@end quotation
+
+@noindent
+Remember that a machine name specifies both the cpu type and the company
+name.
+If you want to install your own homemade configuration files, you can
+use @samp{local} as the company name to access them.  If you use
+configuration @samp{@var{cpu}-local}, the configuration name
+without the cpu prefix
+is used to form the configuration file names.
+
+Thus, if you specify @samp{m68k-local}, configuration uses
+files @file{m68k.md}, @file{local.h}, @file{m68k.c},
+@file{xm-local.h}, @file{t-local}, and @file{x-local}, all in the
+directory @file{config/m68k}.
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
new file mode 100644
index 000000000..75c202e90
--- /dev/null
+++ b/gcc/doc/install.texi
@@ -0,0 +1,4675 @@
+\input texinfo.tex    @c -*-texinfo-*-
+@c @ifnothtml
+@c %**start of header
+@setfilename gccinstall.info
+@settitle Installing GCC
+@setchapternewpage odd
+@c %**end of header
+@c @end ifnothtml
+
+@include gcc-common.texi
+
+@c Specify title for specific html page
+@ifset indexhtml
+@settitle Installing GCC
+@end ifset
+@ifset specifichtml
+@settitle Host/Target specific installation notes for GCC
+@end ifset
+@ifset prerequisiteshtml
+@settitle Prerequisites for GCC
+@end ifset
+@ifset downloadhtml
+@settitle Downloading GCC
+@end ifset
+@ifset configurehtml
+@settitle Installing GCC: Configuration
+@end ifset
+@ifset buildhtml
+@settitle Installing GCC: Building
+@end ifset
+@ifset testhtml
+@settitle Installing GCC: Testing
+@end ifset
+@ifset finalinstallhtml
+@settitle Installing GCC: Final installation
+@end ifset
+@ifset binarieshtml
+@settitle Installing GCC: Binaries
+@end ifset
+@ifset oldhtml
+@settitle Installing GCC: Old documentation
+@end ifset
+@ifset gfdlhtml
+@settitle Installing GCC: GNU Free Documentation License
+@end ifset
+
+@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+@c 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 
+@c 2010 Free Software Foundation, Inc.
+@c *** Converted to texinfo by Dean Wakerley, dean@wakerley.com
+
+@c IMPORTANT: whenever you modify this file, run `install.texi2html' to
+@c test the generation of HTML documents for the gcc.gnu.org web pages.
+@c
+@c Do not use @footnote{} in this file as it breaks install.texi2html!
+
+@c Include everything if we're not making html
+@ifnothtml
+@set indexhtml
+@set specifichtml
+@set prerequisiteshtml
+@set downloadhtml
+@set configurehtml
+@set buildhtml
+@set testhtml
+@set finalinstallhtml
+@set binarieshtml
+@set oldhtml
+@set gfdlhtml
+@end ifnothtml
+
+@c Part 2 Summary Description and Copyright
+@copying
+Copyright @copyright{} 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
+1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
+2010 Free Software Foundation, Inc.
+@sp 1
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, the Front-Cover texts being (a) (see below), and
+with the Back-Cover Texts being (b) (see below).  A copy of the
+license is included in the section entitled ``@uref{./gfdl.html,,GNU
+Free Documentation License}''.
+
+(a) The FSF's Front-Cover Text is:
+
+     A GNU Manual
+
+(b) The FSF's Back-Cover Text is:
+
+     You have freedom to copy and modify this GNU Manual, like GNU
+     software.  Copies published by the Free Software Foundation raise
+     funds for GNU development.
+@end copying
+@ifinfo
+@insertcopying
+@end ifinfo
+@dircategory Software development
+@direntry
+* gccinstall: (gccinstall).    Installing the GNU Compiler Collection.
+@end direntry
+
+@c Part 3 Titlepage and Copyright
+@titlepage
+@title Installing GCC
+@versionsubtitle
+
+@c The following two commands start the copyright page.
+@page
+@vskip 0pt plus 1filll
+@insertcopying
+@end titlepage
+
+@c Part 4 Top node, Master Menu, and/or Table of Contents
+@ifinfo
+@node    Top, , , (dir)
+@comment node-name, next,          Previous, up
+
+@menu
+* Installing GCC::  This document describes the generic installation
+                    procedure for GCC as well as detailing some target
+                    specific installation instructions.
+
+* Specific::        Host/target specific installation notes for GCC.
+* Binaries::        Where to get pre-compiled binaries.
+
+* Old::             Old installation documentation.
+
+* GNU Free Documentation License:: How you can copy and share this manual.
+* Concept Index::   This index has two entries.
+@end menu
+@end ifinfo
+
+@iftex
+@contents
+@end iftex
+
+@c Part 5 The Body of the Document
+@c ***Installing GCC**********************************************************
+@ifnothtml
+@comment node-name,     next,          previous, up
+@node    Installing GCC, Binaries, , Top
+@end ifnothtml
+@ifset indexhtml
+@ifnothtml
+@chapter Installing GCC
+@end ifnothtml
+
+The latest version of this document is always available at
+@uref{http://gcc.gnu.org/install/,,http://gcc.gnu.org/install/}.
+
+This document describes the generic installation procedure for GCC as well
+as detailing some target specific installation instructions.
+
+GCC includes several components that previously were separate distributions
+with their own installation instructions.  This document supersedes all
+package specific installation instructions.
+
+@emph{Before} starting the build/install procedure please check the
+@ifnothtml
+@ref{Specific, host/target specific installation notes}.
+@end ifnothtml
+@ifhtml
+@uref{specific.html,,host/target specific installation notes}.
+@end ifhtml
+We recommend you browse the entire generic installation instructions before
+you proceed.
+
+Lists of successful builds for released versions of GCC are
+available at @uref{http://gcc.gnu.org/buildstat.html}.
+These lists are updated as new information becomes available.
+
+The installation procedure itself is broken into five steps.
+
+@ifinfo
+@menu
+* Prerequisites::
+* Downloading the source::
+* Configuration::
+* Building::
+* Testing:: (optional)
+* Final install::
+@end menu
+@end ifinfo
+@ifhtml
+@enumerate
+@item
+@uref{prerequisites.html,,Prerequisites}
+@item
+@uref{download.html,,Downloading the source}
+@item
+@uref{configure.html,,Configuration}
+@item
+@uref{build.html,,Building}
+@item
+@uref{test.html,,Testing} (optional)
+@item
+@uref{finalinstall.html,,Final install}
+@end enumerate
+@end ifhtml
+
+Please note that GCC does not support @samp{make uninstall} and probably
+won't do so in the near future as this would open a can of worms.  Instead,
+we suggest that you install GCC into a directory of its own and simply
+remove that directory when you do not need that specific version of GCC
+any longer, and, if shared libraries are installed there as well, no
+more binaries exist that use them.
+
+@ifhtml
+There are also some @uref{old.html,,old installation instructions},
+which are mostly obsolete but still contain some information which has
+not yet been merged into the main part of this manual.
+@end ifhtml
+
+@html
+<hr />
+<p>
+@end html
+@ifhtml
+@uref{./index.html,,Return to the GCC Installation page}
+
+@insertcopying
+@end ifhtml
+@end ifset
+
+@c ***Prerequisites**************************************************
+@ifnothtml
+@comment node-name,     next,          previous, up
+@node    Prerequisites, Downloading the source, , Installing GCC
+@end ifnothtml
+@ifset prerequisiteshtml
+@ifnothtml
+@chapter Prerequisites
+@end ifnothtml
+@cindex Prerequisites
+
+GCC requires that various tools and packages be available for use in the
+build procedure.  Modifying GCC sources requires additional tools
+described below.
+
+@heading Tools/packages necessary for building GCC
+@table @asis
+@item ISO C90 compiler
+Necessary to bootstrap GCC, although versions of GCC prior
+to 3.4 also allow bootstrapping with a traditional (K&R) C compiler.
+
+To build all languages in a cross-compiler or other configuration where
+3-stage bootstrap is not performed, you need to start with an existing
+GCC binary (version 2.95 or later) because source code for language
+frontends other than C might use GCC extensions.
+
+@item GNAT
+
+In order to build the Ada compiler (GNAT) you must already have GNAT
+installed because portions of the Ada frontend are written in Ada (with
+GNAT extensions.)  Refer to the Ada installation instructions for more
+specific information.
+
+@item A ``working'' POSIX compatible shell, or GNU bash
+
+Necessary when running @command{configure} because some
+@command{/bin/sh} shells have bugs and may crash when configuring the
+target libraries.  In other cases, @command{/bin/sh} or @command{ksh}
+have disastrous corner-case performance problems.  This
+can cause target @command{configure} runs to literally take days to
+complete in some cases.
+
+So on some platforms @command{/bin/ksh} is sufficient, on others it
+isn't.  See the host/target specific instructions for your platform, or
+use @command{bash} to be sure.  Then set @env{CONFIG_SHELL} in your
+environment to your ``good'' shell prior to running
+@command{configure}/@command{make}.
+
+@command{zsh} is not a fully compliant POSIX shell and will not
+work when configuring GCC@.
+
+@item A POSIX or SVR4 awk
+
+Necessary for creating some of the generated source files for GCC@.
+If in doubt, use a recent GNU awk version, as some of the older ones
+are broken.  GNU awk version 3.1.5 is known to work.
+
+@item GNU binutils
+
+Necessary in some circumstances, optional in others.  See the
+host/target specific instructions for your platform for the exact
+requirements.
+
+@item gzip version 1.2.4 (or later) or
+@itemx bzip2 version 1.0.2 (or later)
+
+Necessary to uncompress GCC @command{tar} files when source code is
+obtained via FTP mirror sites.
+
+@item GNU make version 3.80 (or later)
+
+You must have GNU make installed to build GCC@.
+
+@item GNU tar version 1.14 (or later)
+
+Necessary (only on some platforms) to untar the source code.  Many
+systems' @command{tar} programs will also work, only try GNU
+@command{tar} if you have problems.
+
+@item Perl version 5.6.1 (or later)
+
+Necessary when targetting Darwin, building @samp{libstdc++},
+and not using @option{--disable-symvers}.
+Necessary when targetting Solaris 2 with Sun @command{ld} and not using
+@option{--disable-symvers}.  A helper
+script needs @samp{Glob.pm}, which is missing from @command{perl} 5.005
+included in Solaris@tie{}8.  The bundled @command{perl} in Solaris@tie{}9 and up
+works.
+
+Necessary when regenerating @file{Makefile} dependencies in libiberty.
+Necessary when regenerating @file{libiberty/functions.texi}.
+Necessary when generating manpages from Texinfo manuals.
+Used by various scripts to generate some files included in SVN (mainly
+Unicode-related and rarely changing) from source tables.
+
+@item @command{jar}, or InfoZIP (@command{zip} and @command{unzip})
+
+Necessary to build libgcj, the GCJ runtime.
+
+@end table
+
+Several support libraries are necessary to build GCC, some are required,
+others optional.  While any sufficiently new version of required tools
+usually work, library requirements are generally stricter.  Newer
+versions may work in some cases, but it's safer to use the exact
+versions documented.  We appreciate bug reports about problems with
+newer versions, though.
+
+@table @asis
+@item GNU Multiple Precision Library (GMP) version 4.3.2 (or later)
+
+Necessary to build GCC@.  If you do not have it installed in your
+library search path, you will have to configure with the
+@option{--with-gmp} configure option.  See also @option{--with-gmp-lib}
+and @option{--with-gmp-include}.  Alternatively, if a GMP source
+distribution is found in a subdirectory of your GCC sources named
+@file{gmp}, it will be built together with GCC@.
+
+@item MPFR Library version 2.4.2 (or later)
+
+Necessary to build GCC@.  It can be downloaded from
+@uref{http://www.mpfr.org/}.  The @option{--with-mpfr} configure
+option should be used if your MPFR Library is not installed in your
+default library search path.  See also @option{--with-mpfr-lib} and
+@option{--with-mpfr-include}.  Alternatively, if a MPFR source
+distribution is found in a subdirectory of your GCC sources named
+@file{mpfr}, it will be built together with GCC@.
+
+@item MPC Library version 0.8.1 (or later)
+
+Necessary to build GCC@.  It can be downloaded from
+@uref{http://www.multiprecision.org/}.  The @option{--with-mpc}
+configure option should be used if your MPC Library is not installed
+in your default library search path.  See also @option{--with-mpc-lib}
+and @option{--with-mpc-include}.  Alternatively, if an MPC source
+distribution is found in a subdirectory of your GCC sources named
+@file{mpc}, it will be built together with GCC@.
+
+@item Parma Polyhedra Library (PPL) version 0.11
+
+Necessary to build GCC with the Graphite loop optimizations.
+It can be downloaded from @uref{http://www.cs.unipr.it/ppl/Download/}.
+
+The @option{--with-ppl} configure option should be used if PPL is not
+installed in your default library search path.
+
+@item CLooG-PPL version 0.15 or CLooG 0.16
+
+Necessary to build GCC with the Graphite loop optimizations.  There
+are two versions available.  CLooG-PPL 0.15 as well as CLooG 0.16.
+The former is the default right now.  It can be downloaded from
+@uref{ftp://gcc.gnu.org/pub/gcc/infrastructure/} as
+@file{cloog-ppl-0.15.tar.gz}.
+
+CLooG 0.16 support is still in testing stage, but will be the
+default in future GCC releases.  It is also available at
+@uref{ftp://gcc.gnu.org/pub/gcc/infrastructure/} as
+@file{cloog-0.16.1.tar.gz}.  To use it add the additional configure
+option @option{--enable-cloog-backend=isl}.  Even if CLooG 0.16
+does not use PPL, PPL is still required for Graphite.
+
+In both cases @option{--with-cloog} configure option should be used
+if CLooG is not installed in your default library search path.
+
+@end table
+
+@heading Tools/packages necessary for modifying GCC
+@table @asis
+@item autoconf version 2.64
+@itemx GNU m4 version 1.4.6 (or later)
+
+Necessary when modifying @file{configure.ac}, @file{aclocal.m4}, etc.@:
+to regenerate @file{configure} and @file{config.in} files.
+
+@item automake version 1.11.1
+
+Necessary when modifying a @file{Makefile.am} file to regenerate its
+associated @file{Makefile.in}.
+
+Much of GCC does not use automake, so directly edit the @file{Makefile.in}
+file.  Specifically this applies to the @file{gcc}, @file{intl},
+@file{libcpp}, @file{libiberty}, @file{libobjc} directories as well
+as any of their subdirectories.
+
+For directories that use automake, GCC requires the latest release in
+the 1.11 series, which is currently 1.11.1.  When regenerating a directory
+to a newer version, please update all the directories using an older 1.11
+to the latest released version.
+
+@item gettext version 0.14.5 (or later)
+
+Needed to regenerate @file{gcc.pot}.
+
+@item gperf version 2.7.2 (or later)
+
+Necessary when modifying @command{gperf} input files, e.g.@:
+@file{gcc/cp/cfns.gperf} to regenerate its associated header file, e.g.@:
+@file{gcc/cp/cfns.h}.
+
+@item DejaGnu 1.4.4
+@itemx Expect
+@itemx Tcl
+
+Necessary to run the GCC testsuite; see the section on testing for details.
+
+@item autogen version 5.5.4 (or later) and
+@itemx guile version 1.4.1 (or later)
+
+Necessary to regenerate @file{fixinc/fixincl.x} from
+@file{fixinc/inclhack.def} and @file{fixinc/*.tpl}.
+
+Necessary to run @samp{make check} for @file{fixinc}.
+
+Necessary to regenerate the top level @file{Makefile.in} file from
+@file{Makefile.tpl} and @file{Makefile.def}.
+
+@item Flex version 2.5.4 (or later)
+
+Necessary when modifying @file{*.l} files.
+
+Necessary to build GCC during development because the generated output
+files are not included in the SVN repository.  They are included in
+releases.
+
+@item Texinfo version 4.7 (or later)
+
+Necessary for running @command{makeinfo} when modifying @file{*.texi}
+files to test your changes.
+
+Necessary for running @command{make dvi} or @command{make pdf} to
+create printable documentation in DVI or PDF format.  Texinfo version
+4.8 or later is required for @command{make pdf}.
+
+Necessary to build GCC documentation during development because the
+generated output files are not included in the SVN repository.  They are
+included in releases.
+
+@item @TeX{} (any working version)
+
+Necessary for running @command{texi2dvi} and @command{texi2pdf}, which 
+are used when running @command{make dvi} or @command{make pdf} to create
+DVI or PDF files, respectively.
+
+@item SVN (any version)
+@itemx SSH (any version)
+
+Necessary to access the SVN repository.  Public releases and weekly
+snapshots of the development sources are also available via FTP@.
+
+@item GNU diffutils version 2.7 (or later)
+
+Useful when submitting patches for the GCC source code.
+
+@item patch version 2.5.4 (or later)
+
+Necessary when applying patches, created with @command{diff}, to one's
+own sources.
+
+@item ecj1
+@itemx gjavah
+
+If you wish to modify @file{.java} files in libjava, you will need to
+configure with @option{--enable-java-maintainer-mode}, and you will need
+to have executables named @command{ecj1} and @command{gjavah} in your path.
+The @command{ecj1} executable should run the Eclipse Java compiler via
+the GCC-specific entry point.  You can download a suitable jar from
+@uref{ftp://sourceware.org/pub/java/}, or by running the script
+@command{contrib/download_ecj}.
+
+@item antlr.jar version 2.7.1 (or later)
+@itemx antlr binary
+
+If you wish to build the @command{gjdoc} binary in libjava, you will
+need to have an @file{antlr.jar} library available. The library is
+searched in system locations but can be configured with
+@option{--with-antlr-jar=} instead.  When configuring with
+@option{--enable-java-maintainer-mode}, you will need to have one of
+the executables named @command{cantlr}, @command{runantlr} or
+@command{antlr} in your path.
+
+@end table
+
+@html
+<hr />
+<p>
+@end html
+@ifhtml
+@uref{./index.html,,Return to the GCC Installation page}
+@end ifhtml
+@end ifset
+
+@c ***Downloading the source**************************************************
+@ifnothtml
+@comment node-name,     next,          previous, up
+@node    Downloading the source, Configuration, Prerequisites, Installing GCC
+@end ifnothtml
+@ifset downloadhtml
+@ifnothtml
+@chapter Downloading GCC
+@end ifnothtml
+@cindex Downloading GCC
+@cindex Downloading the Source
+
+GCC is distributed via @uref{http://gcc.gnu.org/svn.html,,SVN} and FTP
+tarballs compressed with @command{gzip} or
+@command{bzip2}.  It is possible to download a full distribution or specific
+components.
+
+Please refer to the @uref{http://gcc.gnu.org/releases.html,,releases web page}
+for information on how to obtain GCC@.
+
+The full distribution includes the C, C++, Objective-C, Fortran, Java,
+and Ada (in the case of GCC 3.1 and later) compilers.  The full
+distribution also includes runtime libraries for C++, Objective-C,
+Fortran, and Java.  In GCC 3.0 and later versions, the GNU compiler
+testsuites are also included in the full distribution.
+
+If you choose to download specific components, you must download the core
+GCC distribution plus any language specific distributions you wish to
+use.  The core distribution includes the C language front end as well as the
+shared components.  Each language has a tarball which includes the language
+front end as well as the language runtime (when appropriate).
+
+Unpack the core distribution as well as any language specific
+distributions in the same directory.
+
+If you also intend to build binutils (either to upgrade an existing
+installation or for use in place of the corresponding tools of your
+OS), unpack the binutils distribution either in the same directory or
+a separate one.  In the latter case, add symbolic links to any
+components of the binutils you intend to build alongside the compiler
+(@file{bfd}, @file{binutils}, @file{gas}, @file{gprof}, @file{ld},
+@file{opcodes}, @dots{}) to the directory containing the GCC sources.
+
+Likewise the GMP, MPFR and MPC libraries can be automatically built
+together with GCC.  Unpack the GMP, MPFR and/or MPC source
+distributions in the directory containing the GCC sources and rename
+their directories to @file{gmp}, @file{mpfr} and @file{mpc},
+respectively (or use symbolic links with the same name).
+
+@html
+<hr />
+<p>
+@end html
+@ifhtml
+@uref{./index.html,,Return to the GCC Installation page}
+@end ifhtml
+@end ifset
+
+@c ***Configuration***********************************************************
+@ifnothtml
+@comment node-name,     next,          previous, up
+@node    Configuration, Building, Downloading the source, Installing GCC
+@end ifnothtml
+@ifset configurehtml
+@ifnothtml
+@chapter Installing GCC: Configuration
+@end ifnothtml
+@cindex Configuration
+@cindex Installing GCC: Configuration
+
+Like most GNU software, GCC must be configured before it can be built.
+This document describes the recommended configuration procedure
+for both native and cross targets.
+
+We use @var{srcdir} to refer to the toplevel source directory for
+GCC; we use @var{objdir} to refer to the toplevel build/object directory.
+
+If you obtained the sources via SVN, @var{srcdir} must refer to the top
+@file{gcc} directory, the one where the @file{MAINTAINERS} file can be
+found, and not its @file{gcc} subdirectory, otherwise the build will fail.
+
+If either @var{srcdir} or @var{objdir} is located on an automounted NFS
+file system, the shell's built-in @command{pwd} command will return
+temporary pathnames.  Using these can lead to various sorts of build
+problems.  To avoid this issue, set the @env{PWDCMD} environment
+variable to an automounter-aware @command{pwd} command, e.g.,
+@command{pawd} or @samp{amq -w}, during the configuration and build
+phases.
+
+First, we @strong{highly} recommend that GCC be built into a
+separate directory from the sources which does @strong{not} reside
+within the source tree.  This is how we generally build GCC; building
+where @var{srcdir} == @var{objdir} should still work, but doesn't
+get extensive testing; building where @var{objdir} is a subdirectory
+of @var{srcdir} is unsupported.
+
+If you have previously built GCC in the same directory for a
+different target machine, do @samp{make distclean} to delete all files
+that might be invalid.  One of the files this deletes is @file{Makefile};
+if @samp{make distclean} complains that @file{Makefile} does not exist
+or issues a message like ``don't know how to make distclean'' it probably
+means that the directory is already suitably clean.  However, with the
+recommended method of building in a separate @var{objdir}, you should
+simply use a different @var{objdir} for each target.
+
+Second, when configuring a native system, either @command{cc} or
+@command{gcc} must be in your path or you must set @env{CC} in
+your environment before running configure.  Otherwise the configuration
+scripts may fail.
+
+@ignore
+Note that the bootstrap compiler and the resulting GCC must be link
+compatible, else the bootstrap will fail with linker errors about
+incompatible object file formats.  Several multilibed targets are
+affected by this requirement, see
+@ifnothtml
+@ref{Specific, host/target specific installation notes}.
+@end ifnothtml
+@ifhtml
+@uref{specific.html,,host/target specific installation notes}.
+@end ifhtml
+@end ignore
+
+To configure GCC:
+
+@smallexample
+% mkdir @var{objdir}
+% cd @var{objdir}
+% @var{srcdir}/configure [@var{options}] [@var{target}]
+@end smallexample
+
+@heading Distributor options
+
+If you will be distributing binary versions of GCC, with modifications
+to the source code, you should use the options described in this
+section to make clear that your version contains modifications.
+
+@table @code
+@item --with-pkgversion=@var{version}
+Specify a string that identifies your package.  You may wish
+to include a build number or build date.  This version string will be
+included in the output of @command{gcc --version}.  This suffix does
+not replace the default version string, only the @samp{GCC} part.
+
+The default value is @samp{GCC}.
+
+@item --with-bugurl=@var{url}
+Specify the URL that users should visit if they wish to report a bug.
+You are of course welcome to forward bugs reported to you to the FSF,
+if you determine that they are not bugs in your modifications.
+
+The default value refers to the FSF's GCC bug tracker.
+
+@end table
+
+@heading Target specification
+@itemize @bullet
+@item
+GCC has code to correctly determine the correct value for @var{target}
+for nearly all native systems.  Therefore, we highly recommend you do
+not provide a configure target when configuring a native compiler.
+
+@item
+@var{target} must be specified as @option{--target=@var{target}}
+when configuring a cross compiler; examples of valid targets would be
+m68k-elf, sh-elf, etc.
+
+@item
+Specifying just @var{target} instead of @option{--target=@var{target}}
+implies that the host defaults to @var{target}.
+@end itemize
+
+
+@heading Options specification
+
+Use @var{options} to override several configure time options for
+GCC@.  A list of supported @var{options} follows; @samp{configure
+--help} may list other options, but those not listed below may not
+work and should not normally be used.
+
+Note that each @option{--enable} option has a corresponding
+@option{--disable} option and that each @option{--with} option has a
+corresponding @option{--without} option.
+
+@table @code
+@item --prefix=@var{dirname}
+Specify the toplevel installation
+directory.  This is the recommended way to install the tools into a directory
+other than the default.  The toplevel installation directory defaults to
+@file{/usr/local}.
+
+We @strong{highly} recommend against @var{dirname} being the same or a
+subdirectory of @var{objdir} or vice versa.  If specifying a directory
+beneath a user's home directory tree, some shells will not expand
+@var{dirname} correctly if it contains the @samp{~} metacharacter; use
+@env{$HOME} instead.
+
+The following standard @command{autoconf} options are supported.  Normally you
+should not need to use these options.
+@table @code
+@item --exec-prefix=@var{dirname}
+Specify the toplevel installation directory for architecture-dependent
+files.  The default is @file{@var{prefix}}.
+
+@item --bindir=@var{dirname}
+Specify the installation directory for the executables called by users
+(such as @command{gcc} and @command{g++}).  The default is
+@file{@var{exec-prefix}/bin}.
+
+@item --libdir=@var{dirname}
+Specify the installation directory for object code libraries and
+internal data files of GCC@.  The default is @file{@var{exec-prefix}/lib}.
+
+@item --libexecdir=@var{dirname}
+Specify the installation directory for internal executables of GCC@.
+The default is @file{@var{exec-prefix}/libexec}.
+
+@item --with-slibdir=@var{dirname}
+Specify the installation directory for the shared libgcc library.  The
+default is @file{@var{libdir}}.
+
+@item --datarootdir=@var{dirname}
+Specify the root of the directory tree for read-only architecture-independent
+data files referenced by GCC@.  The default is @file{@var{prefix}/share}.
+
+@item --infodir=@var{dirname}
+Specify the installation directory for documentation in info format.
+The default is @file{@var{datarootdir}/info}.
+
+@item --datadir=@var{dirname}
+Specify the installation directory for some architecture-independent
+data files referenced by GCC@.  The default is @file{@var{datarootdir}}.
+
+@item --docdir=@var{dirname}
+Specify the installation directory for documentation files (other
+than Info) for GCC@.  The default is @file{@var{datarootdir}/doc}.
+
+@item --htmldir=@var{dirname}
+Specify the installation directory for HTML documentation files.
+The default is @file{@var{docdir}}.
+
+@item --pdfdir=@var{dirname}
+Specify the installation directory for PDF documentation files.
+The default is @file{@var{docdir}}.
+
+@item --mandir=@var{dirname}
+Specify the installation directory for manual pages.  The default is
+@file{@var{datarootdir}/man}.  (Note that the manual pages are only extracts
+from the full GCC manuals, which are provided in Texinfo format.  The manpages
+are derived by an automatic conversion process from parts of the full
+manual.)
+
+@item --with-gxx-include-dir=@var{dirname}
+Specify
+the installation directory for G++ header files.  The default depends
+on other configuration options, and differs between cross and native
+configurations.
+
+@end table
+
+@item --program-prefix=@var{prefix}
+GCC supports some transformations of the names of its programs when
+installing them.  This option prepends @var{prefix} to the names of
+programs to install in @var{bindir} (see above).  For example, specifying
+@option{--program-prefix=foo-} would result in @samp{gcc}
+being installed as @file{/usr/local/bin/foo-gcc}.
+
+@item --program-suffix=@var{suffix}
+Appends @var{suffix} to the names of programs to install in @var{bindir}
+(see above).  For example, specifying @option{--program-suffix=-3.1}
+would result in @samp{gcc} being installed as
+@file{/usr/local/bin/gcc-3.1}.
+
+@item --program-transform-name=@var{pattern}
+Applies the @samp{sed} script @var{pattern} to be applied to the names
+of programs to install in @var{bindir} (see above).  @var{pattern} has to
+consist of one or more basic @samp{sed} editing commands, separated by
+semicolons.  For example, if you want the @samp{gcc} program name to be
+transformed to the installed program @file{/usr/local/bin/myowngcc} and
+the @samp{g++} program name to be transformed to
+@file{/usr/local/bin/gspecial++} without changing other program names,
+you could use the pattern
+@option{--program-transform-name='s/^gcc$/myowngcc/; s/^g++$/gspecial++/'}
+to achieve this effect.
+
+All three options can be combined and used together, resulting in more
+complex conversion patterns.  As a basic rule, @var{prefix} (and
+@var{suffix}) are prepended (appended) before further transformations
+can happen with a special transformation script @var{pattern}.
+
+As currently implemented, this option only takes effect for native
+builds; cross compiler binaries' names are not transformed even when a
+transformation is explicitly asked for by one of these options.
+
+For native builds, some of the installed programs are also installed
+with the target alias in front of their name, as in
+@samp{i686-pc-linux-gnu-gcc}.  All of the above transformations happen
+before the target alias is prepended to the name---so, specifying
+@option{--program-prefix=foo-} and @option{program-suffix=-3.1}, the
+resulting binary would be installed as
+@file{/usr/local/bin/i686-pc-linux-gnu-foo-gcc-3.1}.
+
+As a last shortcoming, none of the installed Ada programs are
+transformed yet, which will be fixed in some time.
+
+@item --with-local-prefix=@var{dirname}
+Specify the
+installation directory for local include files.  The default is
+@file{/usr/local}.  Specify this option if you want the compiler to
+search directory @file{@var{dirname}/include} for locally installed
+header files @emph{instead} of @file{/usr/local/include}.
+
+You should specify @option{--with-local-prefix} @strong{only} if your
+site has a different convention (not @file{/usr/local}) for where to put
+site-specific files.
+
+The default value for @option{--with-local-prefix} is @file{/usr/local}
+regardless of the value of @option{--prefix}.  Specifying
+@option{--prefix} has no effect on which directory GCC searches for
+local header files.  This may seem counterintuitive, but actually it is
+logical.
+
+The purpose of @option{--prefix} is to specify where to @emph{install
+GCC}.  The local header files in @file{/usr/local/include}---if you put
+any in that directory---are not part of GCC@.  They are part of other
+programs---perhaps many others.  (GCC installs its own header files in
+another directory which is based on the @option{--prefix} value.)
+
+Both the local-prefix include directory and the GCC-prefix include
+directory are part of GCC's ``system include'' directories.  Although these
+two directories are not fixed, they need to be searched in the proper
+order for the correct processing of the include_next directive.  The
+local-prefix include directory is searched before the GCC-prefix
+include directory.  Another characteristic of system include directories
+is that pedantic warnings are turned off for headers in these directories.
+
+Some autoconf macros add @option{-I @var{directory}} options to the
+compiler command line, to ensure that directories containing installed
+packages' headers are searched.  When @var{directory} is one of GCC's
+system include directories, GCC will ignore the option so that system
+directories continue to be processed in the correct order.  This
+may result in a search order different from what was specified but the
+directory will still be searched.
+
+GCC automatically searches for ordinary libraries using
+@env{GCC_EXEC_PREFIX}.  Thus, when the same installation prefix is
+used for both GCC and packages, GCC will automatically search for
+both headers and libraries.  This provides a configuration that is
+easy to use.  GCC behaves in a manner similar to that when it is
+installed as a system compiler in @file{/usr}.
+
+Sites that need to install multiple versions of GCC may not want to
+use the above simple configuration.  It is possible to use the
+@option{--program-prefix}, @option{--program-suffix} and
+@option{--program-transform-name} options to install multiple versions
+into a single directory, but it may be simpler to use different prefixes
+and the @option{--with-local-prefix} option to specify the location of the
+site-specific files for each version.  It will then be necessary for
+users to specify explicitly the location of local site libraries
+(e.g., with @env{LIBRARY_PATH}).
+
+The same value can be used for both @option{--with-local-prefix} and
+@option{--prefix} provided it is not @file{/usr}.  This can be used
+to avoid the default search of @file{/usr/local/include}.
+
+@strong{Do not} specify @file{/usr} as the @option{--with-local-prefix}!
+The directory you use for @option{--with-local-prefix} @strong{must not}
+contain any of the system's standard header files.  If it did contain
+them, certain programs would be miscompiled (including GNU Emacs, on
+certain targets), because this would override and nullify the header
+file corrections made by the @command{fixincludes} script.
+
+Indications are that people who use this option use it based on mistaken
+ideas of what it is for.  People use it as if it specified where to
+install part of GCC@.  Perhaps they make this assumption because
+installing GCC creates the directory.
+
+@item --enable-shared[=@var{package}[,@dots{}]]
+Build shared versions of libraries, if shared libraries are supported on
+the target platform.  Unlike GCC 2.95.x and earlier, shared libraries
+are enabled by default on all platforms that support shared libraries.
+
+If a list of packages is given as an argument, build shared libraries
+only for the listed packages.  For other packages, only static libraries
+will be built.  Package names currently recognized in the GCC tree are
+@samp{libgcc} (also known as @samp{gcc}), @samp{libstdc++} (not
+@samp{libstdc++-v3}), @samp{libffi}, @samp{zlib}, @samp{boehm-gc},
+@samp{ada}, @samp{libada}, @samp{libjava}, @samp{libgo}, and @samp{libobjc}.
+Note @samp{libiberty} does not support shared libraries at all.
+
+Use @option{--disable-shared} to build only static libraries.  Note that
+@option{--disable-shared} does not accept a list of package names as
+argument, only @option{--enable-shared} does.
+
+@item @anchor{with-gnu-as}--with-gnu-as
+Specify that the compiler should assume that the
+assembler it finds is the GNU assembler.  However, this does not modify
+the rules to find an assembler and will result in confusion if the
+assembler found is not actually the GNU assembler.  (Confusion may also
+result if the compiler finds the GNU assembler but has not been
+configured with @option{--with-gnu-as}.)  If you have more than one
+assembler installed on your system, you may want to use this option in
+connection with @option{--with-as=@var{pathname}} or
+@option{--with-build-time-tools=@var{pathname}}.
+
+The following systems are the only ones where it makes a difference
+whether you use the GNU assembler.  On any other system,
+@option{--with-gnu-as} has no effect.
+
+@itemize @bullet
+@item @samp{hppa1.0-@var{any}-@var{any}}
+@item @samp{hppa1.1-@var{any}-@var{any}}
+@item @samp{sparc-sun-solaris2.@var{any}}
+@item @samp{sparc64-@var{any}-solaris2.@var{any}}
+@end itemize
+
+@item @anchor{with-as}--with-as=@var{pathname}
+Specify that the compiler should use the assembler pointed to by
+@var{pathname}, rather than the one found by the standard rules to find
+an assembler, which are:
+@itemize @bullet
+@item
+Unless GCC is being built with a cross compiler, check the
+@file{@var{libexec}/gcc/@var{target}/@var{version}} directory.
+@var{libexec} defaults to @file{@var{exec-prefix}/libexec};
+@var{exec-prefix} defaults to @var{prefix}, which
+defaults to @file{/usr/local} unless overridden by the
+@option{--prefix=@var{pathname}} switch described above.  @var{target}
+is the target system triple, such as @samp{sparc-sun-solaris2.7}, and
+@var{version} denotes the GCC version, such as 3.0.
+
+@item
+If the target system is the same that you are building on, check
+operating system specific directories (e.g.@: @file{/usr/ccs/bin} on
+Sun Solaris 2).
+
+@item
+Check in the @env{PATH} for a tool whose name is prefixed by the
+target system triple.
+
+@item
+Check in the @env{PATH} for a tool whose name is not prefixed by the
+target system triple, if the host and target system triple are
+the same (in other words, we use a host tool if it can be used for
+the target as well).
+@end itemize
+
+You may want to use @option{--with-as} if no assembler
+is installed in the directories listed above, or if you have multiple
+assemblers installed and want to choose one that is not found by the
+above rules.
+
+@item @anchor{with-gnu-ld}--with-gnu-ld
+Same as @uref{#with-gnu-as,,@option{--with-gnu-as}}
+but for the linker.
+
+@item --with-ld=@var{pathname}
+Same as @uref{#with-as,,@option{--with-as}}
+but for the linker.
+
+@item --with-stabs
+Specify that stabs debugging
+information should be used instead of whatever format the host normally
+uses.  Normally GCC uses the same debug format as the host system.
+
+On MIPS based systems and on Alphas, you must specify whether you want
+GCC to create the normal ECOFF debugging format, or to use BSD-style
+stabs passed through the ECOFF symbol table.  The normal ECOFF debug
+format cannot fully handle languages other than C@.  BSD stabs format can
+handle other languages, but it only works with the GNU debugger GDB@.
+
+Normally, GCC uses the ECOFF debugging format by default; if you
+prefer BSD stabs, specify @option{--with-stabs} when you configure GCC@.
+
+No matter which default you choose when you configure GCC, the user
+can use the @option{-gcoff} and @option{-gstabs+} options to specify explicitly
+the debug format for a particular compilation.
+
+@option{--with-stabs} is meaningful on the ISC system on the 386, also, if
+@option{--with-gas} is used.  It selects use of stabs debugging
+information embedded in COFF output.  This kind of debugging information
+supports C++ well; ordinary COFF debugging information does not.
+
+@option{--with-stabs} is also meaningful on 386 systems running SVR4.  It
+selects use of stabs debugging information embedded in ELF output.  The
+C++ compiler currently (2.6.0) does not support the DWARF debugging
+information normally used on 386 SVR4 platforms; stabs provide a
+workable alternative.  This requires gas and gdb, as the normal SVR4
+tools can not generate or interpret stabs.
+
+@item --enable-multiarch
+Specify whether to enable or disable multiarch support.  The default is
+to check for glibc start files in a multiarch location, and enable it
+if the files are found.  The auto detection is enabled for native builds,
+and for cross builds configured with @option{--with-sysroot}.
+More documentation about multiarch can be found at
+@uref{http://wiki.debian.org/Multiarch}.
+
+@item --disable-multilib
+Specify that multiple target
+libraries to support different target variants, calling
+conventions, etc.@: should not be built.  The default is to build a
+predefined set of them.
+
+Some targets provide finer-grained control over which multilibs are built
+(e.g., @option{--disable-softfloat}):
+@table @code
+@item arc-*-elf*
+biendian.
+
+@item arm-*-*
+fpu, 26bit, underscore, interwork, biendian, nofmult.
+
+@item m68*-*-*
+softfloat, m68881, m68000, m68020.
+
+@item mips*-*-*
+single-float, biendian, softfloat.
+
+@item powerpc*-*-*, rs6000*-*-*
+aix64, pthread, softfloat, powercpu, powerpccpu, powerpcos, biendian,
+sysv, aix.
+
+@end table
+
+@item --with-multilib-list=@var{list}
+@itemx --without-multilib-list
+Specify what multilibs to build.
+Currently only implemented for sh*-*-*.
+
+@var{list} is a comma separated list of CPU names.  These must be of the
+form @code{sh*} or @code{m*} (in which case they match the compiler option
+for that processor).  The list should not contain any endian options -
+these are handled by @option{--with-endian}.
+
+If @var{list} is empty, then there will be no multilibs for extra
+processors.  The multilib for the secondary endian remains enabled.
+
+As a special case, if an entry in the list starts with a @code{!}
+(exclamation point), then it is added to the list of excluded multilibs.
+Entries of this sort should be compatible with @samp{MULTILIB_EXCLUDES}
+(once the leading @code{!} has been stripped).
+
+If @option{--with-multilib-list} is not given, then a default set of
+multilibs is selected based on the value of @option{--target}.  This is
+usually the complete set of libraries, but some targets imply a more
+specialized subset.
+
+Example 1: to configure a compiler for SH4A only, but supporting both
+endians, with little endian being the default:
+@smallexample
+--with-cpu=sh4a --with-endian=little,big --with-multilib-list=
+@end smallexample
+
+Example 2: to configure a compiler for both SH4A and SH4AL-DSP, but with
+only little endian SH4AL:
+@smallexample
+--with-cpu=sh4a --with-endian=little,big \
+--with-multilib-list=sh4al,!mb/m4al
+@end smallexample
+
+@item --with-endian=@var{endians}
+Specify what endians to use.
+Currently only implemented for sh*-*-*.
+
+@var{endians} may be one of the following:
+@table @code
+@item big
+Use big endian exclusively.
+@item little
+Use little endian exclusively.
+@item big,little
+Use big endian by default.  Provide a multilib for little endian.
+@item little,big
+Use little endian by default.  Provide a multilib for big endian.
+@end table
+
+@item --enable-threads
+Specify that the target
+supports threads.  This affects the Objective-C compiler and runtime
+library, and exception handling for other languages like C++ and Java.
+On some systems, this is the default.
+
+In general, the best (and, in many cases, the only known) threading
+model available will be configured for use.  Beware that on some
+systems, GCC has not been taught what threading models are generally
+available for the system.  In this case, @option{--enable-threads} is an
+alias for @option{--enable-threads=single}.
+
+@item --disable-threads
+Specify that threading support should be disabled for the system.
+This is an alias for @option{--enable-threads=single}.
+
+@item --enable-threads=@var{lib}
+Specify that
+@var{lib} is the thread support library.  This affects the Objective-C
+compiler and runtime library, and exception handling for other languages
+like C++ and Java.  The possibilities for @var{lib} are:
+
+@table @code
+@item aix
+AIX thread support.
+@item dce
+DCE thread support.
+@item gnat
+Ada tasking support.  For non-Ada programs, this setting is equivalent
+to @samp{single}.  When used in conjunction with the Ada run time, it
+causes GCC to use the same thread primitives as Ada uses.  This option
+is necessary when using both Ada and the back end exception handling,
+which is the default for most Ada targets.
+@item mach
+Generic MACH thread support, known to work on NeXTSTEP@.  (Please note
+that the file needed to support this configuration, @file{gthr-mach.h}, is
+missing and thus this setting will cause a known bootstrap failure.)
+@item no
+This is an alias for @samp{single}.
+@item posix
+Generic POSIX/Unix98 thread support.
+@item posix95
+Generic POSIX/Unix95 thread support.
+@item rtems
+RTEMS thread support.
+@item single
+Disable thread support, should work for all platforms.
+@item solaris
+Sun Solaris 2/Unix International thread support.  Only use this if you
+really need to use this legacy API instead of the default, @samp{posix}.
+@item vxworks
+VxWorks thread support.
+@item win32
+Microsoft Win32 API thread support.
+@item nks
+Novell Kernel Services thread support.
+@end table
+
+@item --enable-tls
+Specify that the target supports TLS (Thread Local Storage).  Usually
+configure can correctly determine if TLS is supported.  In cases where
+it guesses incorrectly, TLS can be explicitly enabled or disabled with
+@option{--enable-tls} or @option{--disable-tls}.  This can happen if
+the assembler supports TLS but the C library does not, or if the
+assumptions made by the configure test are incorrect.
+
+@item --disable-tls
+Specify that the target does not support TLS.
+This is an alias for @option{--enable-tls=no}.
+
+@item --with-cpu=@var{cpu}
+@itemx --with-cpu-32=@var{cpu}
+@itemx --with-cpu-64=@var{cpu}
+Specify which cpu variant the compiler should generate code for by default.
+@var{cpu} will be used as the default value of the @option{-mcpu=} switch.
+This option is only supported on some targets, including ARM, i386, M68k,
+PowerPC, and SPARC@.  The @option{--with-cpu-32} and
+@option{--with-cpu-64} options specify separate default CPUs for
+32-bit and 64-bit modes; these options are only supported for i386,
+x86-64 and PowerPC.
+
+@item --with-schedule=@var{cpu}
+@itemx --with-arch=@var{cpu}
+@itemx --with-arch-32=@var{cpu}
+@itemx --with-arch-64=@var{cpu}
+@itemx --with-tune=@var{cpu}
+@itemx --with-tune-32=@var{cpu}
+@itemx --with-tune-64=@var{cpu}
+@itemx --with-abi=@var{abi}
+@itemx --with-fpu=@var{type}
+@itemx --with-float=@var{type}
+These configure options provide default values for the @option{-mschedule=},
+@option{-march=}, @option{-mtune=}, @option{-mabi=}, and @option{-mfpu=}
+options and for @option{-mhard-float} or @option{-msoft-float}.  As with
+@option{--with-cpu}, which switches will be accepted and acceptable values
+of the arguments depend on the target.
+
+@item --with-mode=@var{mode}
+Specify if the compiler should default to @option{-marm} or @option{-mthumb}.
+This option is only supported on ARM targets.
+
+@item --with-fpmath=@var{isa}
+This options sets @option{-mfpmath=sse} by default and specifies the default
+ISA for floating-point arithmetics.  You can select either @samp{sse} which
+enables @option{-msse2} or @samp{avx} which enables @option{-mavx} by default.
+This option is only supported on i386 and x86-64 targets.
+
+@item --with-divide=@var{type}
+Specify how the compiler should generate code for checking for
+division by zero.  This option is only supported on the MIPS target.
+The possibilities for @var{type} are:
+@table @code
+@item traps
+Division by zero checks use conditional traps (this is the default on
+systems that support conditional traps).
+@item breaks
+Division by zero checks use the break instruction.
+@end table
+
+@c If you make --with-llsc the default for additional targets,
+@c update the --with-llsc description in the MIPS section below.
+
+@item --with-llsc
+On MIPS targets, make @option{-mllsc} the default when no
+@option{-mno-llsc} option is passed.  This is the default for
+Linux-based targets, as the kernel will emulate them if the ISA does
+not provide them.
+
+@item --without-llsc
+On MIPS targets, make @option{-mno-llsc} the default when no
+@option{-mllsc} option is passed.
+
+@item --with-synci
+On MIPS targets, make @option{-msynci} the default when no
+@option{-mno-synci} option is passed.
+
+@item --without-synci 
+On MIPS targets, make @option{-mno-synci} the default when no
+@option{-msynci} option is passed.  This is the default.
+
+@item --with-mips-plt
+On MIPS targets, make use of copy relocations and PLTs.
+These features are extensions to the traditional
+SVR4-based MIPS ABIs and require support from GNU binutils
+and the runtime C library.
+
+@item --enable-__cxa_atexit
+Define if you want to use __cxa_atexit, rather than atexit, to
+register C++ destructors for local statics and global objects.
+This is essential for fully standards-compliant handling of
+destructors, but requires __cxa_atexit in libc.  This option is currently
+only available on systems with GNU libc.  When enabled, this will cause
+@option{-fuse-cxa-atexit} to be passed by default.
+
+@item --enable-indirect-function
+Define if you want to enable the @code{ifunc} attribute.  This option is
+currently only available on systems with GNU libc on certain targets.
+
+@item --enable-target-optspace
+Specify that target
+libraries should be optimized for code space instead of code speed.
+This is the default for the m32r platform.
+
+@item --with-cpp-install-dir=@var{dirname}
+Specify that the user visible @command{cpp} program should be installed
+in @file{@var{prefix}/@var{dirname}/cpp}, in addition to @var{bindir}.
+
+@item --enable-comdat
+Enable COMDAT group support.  This is primarily used to override the
+automatically detected value.
+
+@item --enable-initfini-array
+Force the use of sections @code{.init_array} and @code{.fini_array}
+(instead of @code{.init} and @code{.fini}) for constructors and
+destructors.  Option @option{--disable-initfini-array} has the
+opposite effect.  If neither option is specified, the configure script
+will try to guess whether the @code{.init_array} and
+@code{.fini_array} sections are supported and, if they are, use them.
+
+@item --enable-build-with-cxx
+Build GCC using a C++ compiler rather than a C compiler.  This is an
+experimental option which may become the default in a later release.
+
+@item --enable-maintainer-mode
+The build rules that regenerate the Autoconf and Automake output files as
+well as the GCC master message catalog @file{gcc.pot} are normally
+disabled.  This is because it can only be rebuilt if the complete source
+tree is present.  If you have changed the sources and want to rebuild the
+catalog, configuring with @option{--enable-maintainer-mode} will enable
+this.  Note that you need a recent version of the @code{gettext} tools
+to do so.
+
+@item --disable-bootstrap
+For a native build, the default configuration is to perform
+a 3-stage bootstrap of the compiler when @samp{make} is invoked,
+testing that GCC can compile itself correctly.  If you want to disable
+this process, you can configure with @option{--disable-bootstrap}.
+
+@item --enable-bootstrap
+In special cases, you may want to perform a 3-stage build
+even if the target and host triplets are different.
+This is possible when the host can run code compiled for
+the target (e.g.@: host is i686-linux, target is i486-linux).
+Starting from GCC 4.2, to do this you have to configure explicitly
+with @option{--enable-bootstrap}.
+
+@item --enable-generated-files-in-srcdir
+Neither the .c and .h files that are generated from Bison and flex nor the
+info manuals and man pages that are built from the .texi files are present
+in the SVN development tree.  When building GCC from that development tree,
+or from one of our snapshots, those generated files are placed in your
+build directory, which allows for the source to be in a readonly
+directory.
+
+If you configure with @option{--enable-generated-files-in-srcdir} then those
+generated files will go into the source directory.  This is mainly intended
+for generating release or prerelease tarballs of the GCC sources, since it
+is not a requirement that the users of source releases to have flex, Bison,
+or makeinfo.
+
+@item --enable-version-specific-runtime-libs
+Specify
+that runtime libraries should be installed in the compiler specific
+subdirectory (@file{@var{libdir}/gcc}) rather than the usual places.  In
+addition, @samp{libstdc++}'s include files will be installed into
+@file{@var{libdir}} unless you overruled it by using
+@option{--with-gxx-include-dir=@var{dirname}}.  Using this option is
+particularly useful if you intend to use several versions of GCC in
+parallel.  This is currently supported by @samp{libgfortran},
+@samp{libjava}, @samp{libmudflap}, @samp{libstdc++}, and @samp{libobjc}.
+
+@item --enable-languages=@var{lang1},@var{lang2},@dots{}
+Specify that only a particular subset of compilers and
+their runtime libraries should be built.  For a list of valid values for
+@var{langN} you can issue the following command in the
+@file{gcc} directory of your GCC source tree:@*
+@smallexample
+grep language= */config-lang.in
+@end smallexample
+Currently, you can use any of the following:
+@code{all}, @code{ada}, @code{c}, @code{c++}, @code{fortran},
+@code{go}, @code{java}, @code{objc}, @code{obj-c++}.
+Building the Ada compiler has special requirements, see below.
+If you do not pass this flag, or specify the option @code{all}, then all
+default languages available in the @file{gcc} sub-tree will be configured.
+Ada, Go and Objective-C++ are not default languages; the rest are.
+
+@item --enable-stage1-languages=@var{lang1},@var{lang2},@dots{}
+Specify that a particular subset of compilers and their runtime
+libraries should be built with the system C compiler during stage 1 of
+the bootstrap process, rather than only in later stages with the
+bootstrapped C compiler.  The list of valid values is the same as for
+@option{--enable-languages}, and the option @code{all} will select all
+of the languages enabled by @option{--enable-languages}.  This option is
+primarily useful for GCC development; for instance, when a development
+version of the compiler cannot bootstrap due to compiler bugs, or when
+one is debugging front ends other than the C front end.  When this
+option is used, one can then build the target libraries for the
+specified languages with the stage-1 compiler by using @command{make
+stage1-bubble all-target}, or run the testsuite on the stage-1 compiler
+for the specified languages using @command{make stage1-start check-gcc}.
+
+@item --disable-libada
+Specify that the run-time libraries and tools used by GNAT should not
+be built.  This can be useful for debugging, or for compatibility with
+previous Ada build procedures, when it was required to explicitly
+do a @samp{make -C gcc gnatlib_and_tools}.
+
+@item --disable-libssp
+Specify that the run-time libraries for stack smashing protection
+should not be built.
+
+@item --disable-libquadmath
+Specify that the GCC quad-precision math library should not be built.
+On some systems, the library is required to be linkable when building
+the Fortran front end, unless @option{--disable-libquadmath-support}
+is used.
+
+@item --disable-libquadmath-support
+Specify that the Fortran front end and @code{libgfortran} do not add
+support for @code{libquadmath} on systems supporting it.
+
+@item --disable-libgomp
+Specify that the run-time libraries used by GOMP should not be built.
+
+@item --with-dwarf2
+Specify that the compiler should
+use DWARF 2 debugging information as the default.
+
+@item --enable-targets=all
+@itemx --enable-targets=@var{target_list}
+Some GCC targets, e.g.@: powerpc64-linux, build bi-arch compilers.
+These are compilers that are able to generate either 64-bit or 32-bit
+code.  Typically, the corresponding 32-bit target, e.g.@:
+powerpc-linux for powerpc64-linux, only generates 32-bit code.  This
+option enables the 32-bit target to be a bi-arch compiler, which is
+useful when you want a bi-arch compiler that defaults to 32-bit, and
+you are building a bi-arch or multi-arch binutils in a combined tree.
+On mips-linux, this will build a tri-arch compiler (ABI o32/n32/64),
+defaulted to o32.
+Currently, this option only affects sparc-linux, powerpc-linux, x86-linux
+and mips-linux.
+
+@item --enable-secureplt
+This option enables @option{-msecure-plt} by default for powerpc-linux.
+@ifnothtml
+@xref{RS/6000 and PowerPC Options,, RS/6000 and PowerPC Options, gcc,
+Using the GNU Compiler Collection (GCC)},
+@end ifnothtml
+@ifhtml
+See ``RS/6000 and PowerPC Options'' in the main manual
+@end ifhtml
+
+@item --enable-cld
+This option enables @option{-mcld} by default for 32-bit x86 targets.
+@ifnothtml
+@xref{i386 and x86-64 Options,, i386 and x86-64 Options, gcc,
+Using the GNU Compiler Collection (GCC)},
+@end ifnothtml
+@ifhtml
+See ``i386 and x86-64 Options'' in the main manual
+@end ifhtml
+
+@item --enable-win32-registry
+@itemx --enable-win32-registry=@var{key}
+@itemx --disable-win32-registry
+The @option{--enable-win32-registry} option enables Microsoft Windows-hosted GCC
+to look up installations paths in the registry using the following key:
+
+@smallexample
+@code{HKEY_LOCAL_MACHINE\SOFTWARE\Free Software Foundation\@var{key}}
+@end smallexample
+
+@var{key} defaults to GCC version number, and can be overridden by the
+@option{--enable-win32-registry=@var{key}} option.  Vendors and distributors
+who use custom installers are encouraged to provide a different key,
+perhaps one comprised of vendor name and GCC version number, to
+avoid conflict with existing installations.  This feature is enabled
+by default, and can be disabled by @option{--disable-win32-registry}
+option.  This option has no effect on the other hosts.
+
+@item --nfp
+Specify that the machine does not have a floating point unit.  This
+option only applies to @samp{m68k-sun-sunos@var{n}}.  On any other
+system, @option{--nfp} has no effect.
+
+@item --enable-werror
+@itemx --disable-werror
+@itemx --enable-werror=yes
+@itemx --enable-werror=no
+When you specify this option, it controls whether certain files in the
+compiler are built with @option{-Werror} in bootstrap stage2 and later.
+If you don't specify it, @option{-Werror} is turned on for the main
+development trunk.  However it defaults to off for release branches and
+final releases.  The specific files which get @option{-Werror} are
+controlled by the Makefiles.
+
+@item --enable-checking
+@itemx --enable-checking=@var{list}
+When you specify this option, the compiler is built to perform internal
+consistency checks of the requested complexity.  This does not change the
+generated code, but adds error checking within the compiler.  This will
+slow down the compiler and may only work properly if you are building
+the compiler with GCC@.  This is @samp{yes} by default when building
+from SVN or snapshots, but @samp{release} for releases.  The default
+for building the stage1 compiler is @samp{yes}.  More control
+over the checks may be had by specifying @var{list}.  The categories of
+checks available are @samp{yes} (most common checks
+@samp{assert,misc,tree,gc,rtlflag,runtime}), @samp{no} (no checks at
+all), @samp{all} (all but @samp{valgrind}), @samp{release} (cheapest
+checks @samp{assert,runtime}) or @samp{none} (same as @samp{no}).
+Individual checks can be enabled with these flags @samp{assert},
+@samp{df}, @samp{fold}, @samp{gc}, @samp{gcac} @samp{misc}, @samp{rtl},
+@samp{rtlflag}, @samp{runtime}, @samp{tree}, and @samp{valgrind}.
+
+The @samp{valgrind} check requires the external @command{valgrind}
+simulator, available from @uref{http://valgrind.org/}.  The
+@samp{df}, @samp{rtl}, @samp{gcac} and @samp{valgrind} checks are very expensive.
+To disable all checking, @samp{--disable-checking} or
+@samp{--enable-checking=none} must be explicitly requested.  Disabling
+assertions will make the compiler and runtime slightly faster but
+increase the risk of undetected internal errors causing wrong code to be
+generated.
+
+@item --disable-stage1-checking
+@itemx --enable-stage1-checking
+@itemx --enable-stage1-checking=@var{list}
+If no @option{--enable-checking} option is specified the stage1
+compiler will be built with @samp{yes} checking enabled, otherwise
+the stage1 checking flags are the same as specified by
+@option{--enable-checking}.  To build the stage1 compiler with
+different checking options use @option{--enable-stage1-checking}.
+The list of checking options is the same as for @option{--enable-checking}.
+If your system is too slow or too small to bootstrap a released compiler
+with checking for stage1 enabled, you can use @samp{--disable-stage1-checking}
+to disable checking for the stage1 compiler.
+
+@item --enable-coverage
+@itemx --enable-coverage=@var{level}
+With this option, the compiler is built to collect self coverage
+information, every time it is run.  This is for internal development
+purposes, and only works when the compiler is being built with gcc.  The
+@var{level} argument controls whether the compiler is built optimized or
+not, values are @samp{opt} and @samp{noopt}.  For coverage analysis you
+want to disable optimization, for performance analysis you want to
+enable optimization.  When coverage is enabled, the default level is
+without optimization.
+
+@item --enable-gather-detailed-mem-stats
+When this option is specified more detailed information on memory
+allocation is gathered.  This information is printed when using
+@option{-fmem-report}.
+
+@item --with-gc
+@itemx --with-gc=@var{choice}
+With this option you can specify the garbage collector implementation
+used during the compilation process.  @var{choice} can be one of
+@samp{page} and @samp{zone}, where @samp{page} is the default.
+
+@item --enable-nls
+@itemx --disable-nls
+The @option{--enable-nls} option enables Native Language Support (NLS),
+which lets GCC output diagnostics in languages other than American
+English.  Native Language Support is enabled by default if not doing a
+canadian cross build.  The @option{--disable-nls} option disables NLS@.
+
+@item --with-included-gettext
+If NLS is enabled, the @option{--with-included-gettext} option causes the build
+procedure to prefer its copy of GNU @command{gettext}.
+
+@item --with-catgets
+If NLS is enabled, and if the host lacks @code{gettext} but has the
+inferior @code{catgets} interface, the GCC build procedure normally
+ignores @code{catgets} and instead uses GCC's copy of the GNU
+@code{gettext} library.  The @option{--with-catgets} option causes the
+build procedure to use the host's @code{catgets} in this situation.
+
+@item --with-libiconv-prefix=@var{dir}
+Search for libiconv header files in @file{@var{dir}/include} and
+libiconv library files in @file{@var{dir}/lib}.
+
+@item --enable-obsolete
+Enable configuration for an obsoleted system.  If you attempt to
+configure GCC for a system (build, host, or target) which has been
+obsoleted, and you do not specify this flag, configure will halt with an
+error message.
+
+All support for systems which have been obsoleted in one release of GCC
+is removed entirely in the next major release, unless someone steps
+forward to maintain the port.
+
+@item --enable-decimal-float
+@itemx --enable-decimal-float=yes
+@itemx --enable-decimal-float=no
+@itemx --enable-decimal-float=bid
+@itemx --enable-decimal-float=dpd
+@itemx --disable-decimal-float
+Enable (or disable) support for the C decimal floating point extension
+that is in the IEEE 754-2008 standard.  This is enabled by default only
+on PowerPC, i386, and x86_64 GNU/Linux systems.  Other systems may also
+support it, but require the user to specifically enable it.  You can
+optionally control which decimal floating point format is used (either
+@samp{bid} or @samp{dpd}).  The @samp{bid} (binary integer decimal)
+format is default on i386 and x86_64 systems, and the @samp{dpd}
+(densely packed decimal) format is default on PowerPC systems.
+
+@item --enable-fixed-point
+@itemx --disable-fixed-point
+Enable (or disable) support for C fixed-point arithmetic.
+This option is enabled by default for some targets (such as MIPS) which
+have hardware-support for fixed-point operations.  On other targets, you
+may enable this option manually.
+
+@item --with-long-double-128
+Specify if @code{long double} type should be 128-bit by default on selected
+GNU/Linux architectures.  If using @code{--without-long-double-128},
+@code{long double} will be by default 64-bit, the same as @code{double} type.
+When neither of these configure options are used, the default will be
+128-bit @code{long double} when built against GNU C Library 2.4 and later,
+64-bit @code{long double} otherwise.
+
+@item --with-gmp=@var{pathname}
+@itemx --with-gmp-include=@var{pathname}
+@itemx --with-gmp-lib=@var{pathname}
+@itemx --with-mpfr=@var{pathname}
+@itemx --with-mpfr-include=@var{pathname}
+@itemx --with-mpfr-lib=@var{pathname}
+@itemx --with-mpc=@var{pathname}
+@itemx --with-mpc-include=@var{pathname}
+@itemx --with-mpc-lib=@var{pathname}
+If you do not have GMP (the GNU Multiple Precision library), the MPFR
+library and/or the MPC library installed in a standard location and
+you want to build GCC, you can explicitly specify the directory where
+they are installed (@samp{--with-gmp=@var{gmpinstalldir}},
+@samp{--with-mpfr=@/@var{mpfrinstalldir}},
+@samp{--with-mpc=@/@var{mpcinstalldir}}).  The
+@option{--with-gmp=@/@var{gmpinstalldir}} option is shorthand for
+@option{--with-gmp-lib=@/@var{gmpinstalldir}/lib} and
+@option{--with-gmp-include=@/@var{gmpinstalldir}/include}.  Likewise the
+@option{--with-mpfr=@/@var{mpfrinstalldir}} option is shorthand for
+@option{--with-mpfr-lib=@/@var{mpfrinstalldir}/lib} and
+@option{--with-mpfr-include=@/@var{mpfrinstalldir}/include}, also the
+@option{--with-mpc=@/@var{mpcinstalldir}} option is shorthand for
+@option{--with-mpc-lib=@/@var{mpcinstalldir}/lib} and
+@option{--with-mpc-include=@/@var{mpcinstalldir}/include}.  If these
+shorthand assumptions are not correct, you can use the explicit
+include and lib options directly.  You might also need to ensure the
+shared libraries can be found by the dynamic linker when building and
+using GCC, for example by setting the runtime shared library path
+variable (@env{LD_LIBRARY_PATH} on GNU/Linux and Solaris systems).
+
+These flags are applicable to the host platform only.  When building
+a cross compiler, they will not be used to configure target libraries.
+
+@item --with-ppl=@var{pathname}
+@itemx --with-ppl-include=@var{pathname}
+@itemx --with-ppl-lib=@var{pathname}
+@itemx --with-cloog=@var{pathname}
+@itemx --with-cloog-include=@var{pathname}
+@itemx --with-cloog-lib=@var{pathname}
+If you do not have PPL (the Parma Polyhedra Library) and the CLooG
+libraries installed in a standard location and you want to build GCC,
+you can explicitly specify the directory where they are installed
+(@samp{--with-ppl=@/@var{pplinstalldir}},
+@samp{--with-cloog=@/@var{clooginstalldir}}). The
+@option{--with-ppl=@/@var{pplinstalldir}} option is shorthand for
+@option{--with-ppl-lib=@/@var{pplinstalldir}/lib} and
+@option{--with-ppl-include=@/@var{pplinstalldir}/include}.  Likewise the
+@option{--with-cloog=@/@var{clooginstalldir}} option is shorthand for
+@option{--with-cloog-lib=@/@var{clooginstalldir}/lib} and
+@option{--with-cloog-include=@/@var{clooginstalldir}/include}.  If these
+shorthand assumptions are not correct, you can use the explicit
+include and lib options directly.
+
+These flags are applicable to the host platform only.  When building
+a cross compiler, they will not be used to configure target libraries.
+
+@item --with-host-libstdcxx=@var{linker-args}
+If you are linking with a static copy of PPL, you can use this option
+to specify how the linker should find the standard C++ library used
+internally by PPL.  Typical values of @var{linker-args} might be
+@samp{-lstdc++} or @samp{-Wl,-Bstatic,-lstdc++,-Bdynamic -lm}.  If you are
+linking with a shared copy of PPL, you probably do not need this
+option; shared library dependencies will cause the linker to search
+for the standard C++ library automatically.
+
+@item --with-stage1-ldflags=@var{flags}
+This option may be used to set linker flags to be used when linking
+stage 1 of GCC.  These are also used when linking GCC if configured with
+@option{--disable-bootstrap}.  By default no special flags are used.
+
+@item --with-stage1-libs=@var{libs}
+This option may be used to set libraries to be used when linking stage 1
+of GCC.  These are also used when linking GCC if configured with
+@option{--disable-bootstrap}.  The default is the argument to
+@option{--with-host-libstdcxx}, if specified.
+
+@item --with-boot-ldflags=@var{flags}
+This option may be used to set linker flags to be used when linking
+stage 2 and later when bootstrapping GCC.  If neither --with-boot-libs
+nor --with-host-libstdcxx is set to a value, then the default is
+@samp{-static-libstdc++ -static-libgcc}.
+
+@item --with-boot-libs=@var{libs}
+This option may be used to set libraries to be used when linking stage 2
+and later when bootstrapping GCC.  The default is the argument to
+@option{--with-host-libstdcxx}, if specified.
+
+@item --with-debug-prefix-map=@var{map}
+Convert source directory names using @option{-fdebug-prefix-map} when
+building runtime libraries.  @samp{@var{map}} is a space-separated
+list of maps of the form @samp{@var{old}=@var{new}}.
+
+@item --enable-linker-build-id
+Tells GCC to pass @option{--build-id} option to the linker for all final
+links (links performed without the @option{-r} or @option{--relocatable}
+option), if the linker supports it.  If you specify
+@option{--enable-linker-build-id}, but your linker does not
+support @option{--build-id} option, a warning is issued and the
+@option{--enable-linker-build-id} option is ignored.  The default is off.
+
+@item --enable-gnu-unique-object
+@itemx --disable-gnu-unique-object
+Tells GCC to use the gnu_unique_object relocation for C++ template
+static data members and inline function local statics.  Enabled by
+default for a native toolchain with an assembler that accepts it and
+GLIBC 2.11 or above, otherwise disabled.
+
+@item --enable-lto
+@itemx --disable-lto
+Enable support for link-time optimization (LTO).  This is enabled by
+default, and may be disabled using @option{--disable-lto}.
+
+@item --with-plugin-ld=@var{pathname}
+Enable an alternate linker to be used at link-time optimization (LTO)
+link time when @option{-fuse-linker-plugin} is enabled.
+This linker should have plugin support such as gold starting with
+version 2.20 or GNU ld starting with version 2.21.
+See @option{-fuse-linker-plugin} for details.
+@end table
+
+@subheading Cross-Compiler-Specific Options
+The following options only apply to building cross compilers.
+
+@table @code
+@item --with-sysroot
+@itemx --with-sysroot=@var{dir}
+Tells GCC to consider @var{dir} as the root of a tree that contains
+(a subset of) the root filesystem of the target operating system.
+Target system headers, libraries and run-time object files will be
+searched in there.  More specifically, this acts as if
+@option{--sysroot=@var{dir}} was added to the default options of the built
+compiler.  The specified directory is not copied into the
+install tree, unlike the options @option{--with-headers} and
+@option{--with-libs} that this option obsoletes.  The default value,
+in case @option{--with-sysroot} is not given an argument, is
+@option{$@{gcc_tooldir@}/sys-root}.  If the specified directory is a
+subdirectory of @option{$@{exec_prefix@}}, then it will be found relative to
+the GCC binaries if the installation tree is moved.
+
+This option affects the system root for the compiler used to build
+target libraries (which runs on the build system) and the compiler newly
+installed with @code{make install}; it does not affect the compiler which is
+used to build GCC itself.
+
+@item --with-build-sysroot
+@itemx --with-build-sysroot=@var{dir}
+Tells GCC to consider @var{dir} as the system root (see
+@option{--with-sysroot}) while building target libraries, instead of
+the directory specified with @option{--with-sysroot}.  This option is
+only useful when you are already using @option{--with-sysroot}.  You
+can use @option{--with-build-sysroot} when you are configuring with
+@option{--prefix} set to a directory that is different from the one in
+which you are installing GCC and your target libraries.  
+
+This option affects the system root for the compiler used to build
+target libraries (which runs on the build system); it does not affect
+the compiler which is used to build GCC itself.
+
+@item --with-headers
+@itemx --with-headers=@var{dir}
+Deprecated in favor of @option{--with-sysroot}.
+Specifies that target headers are available when building a cross compiler.
+The @var{dir} argument specifies a directory which has the target include
+files.  These include files will be copied into the @file{gcc} install
+directory.  @emph{This option with the @var{dir} argument is required} when
+building a cross compiler, if @file{@var{prefix}/@var{target}/sys-include}
+doesn't pre-exist.  If @file{@var{prefix}/@var{target}/sys-include} does
+pre-exist, the @var{dir} argument may be omitted.  @command{fixincludes}
+will be run on these files to make them compatible with GCC@.
+
+@item --without-headers
+Tells GCC not use any target headers from a libc when building a cross
+compiler.  When crossing to GNU/Linux, you need the headers so GCC
+can build the exception handling for libgcc.
+
+@item --with-libs
+@itemx --with-libs="@var{dir1} @var{dir2} @dots{} @var{dirN}"
+Deprecated in favor of @option{--with-sysroot}.
+Specifies a list of directories which contain the target runtime
+libraries.  These libraries will be copied into the @file{gcc} install
+directory.  If the directory list is omitted, this option has no
+effect.
+
+@item --with-newlib
+Specifies that @samp{newlib} is
+being used as the target C library.  This causes @code{__eprintf} to be
+omitted from @file{libgcc.a} on the assumption that it will be provided by
+@samp{newlib}.
+
+@item --with-build-time-tools=@var{dir}
+Specifies where to find the set of target tools (assembler, linker, etc.)
+that will be used while building GCC itself.  This option can be useful
+if the directory layouts are different between the system you are building
+GCC on, and the system where you will deploy it.
+
+For example, on an @samp{ia64-hp-hpux} system, you may have the GNU
+assembler and linker in @file{/usr/bin}, and the native tools in a
+different path, and build a toolchain that expects to find the
+native tools in @file{/usr/bin}.
+
+When you use this option, you should ensure that @var{dir} includes
+@command{ar}, @command{as}, @command{ld}, @command{nm},
+@command{ranlib} and @command{strip} if necessary, and possibly
+@command{objdump}.  Otherwise, GCC may use an inconsistent set of
+tools.
+@end table
+
+@subheading Java-Specific Options
+
+The following option applies to the build of the Java front end.
+
+@table @code
+@item --disable-libgcj
+Specify that the run-time libraries
+used by GCJ should not be built.  This is useful in case you intend
+to use GCJ with some other run-time, or you're going to install it
+separately, or it just happens not to build on your particular
+machine.  In general, if the Java front end is enabled, the GCJ
+libraries will be enabled too, unless they're known to not work on
+the target platform.  If GCJ is enabled but @samp{libgcj} isn't built, you
+may need to port it; in this case, before modifying the top-level
+@file{configure.in} so that @samp{libgcj} is enabled by default on this platform,
+you may use @option{--enable-libgcj} to override the default.
+
+@end table
+
+The following options apply to building @samp{libgcj}.
+
+@subsubheading General Options
+
+@table @code
+@item --enable-java-maintainer-mode
+By default the @samp{libjava} build will not attempt to compile the
+@file{.java} source files to @file{.class}.  Instead, it will use the
+@file{.class} files from the source tree.  If you use this option you
+must have executables named @command{ecj1} and @command{gjavah} in your path
+for use by the build.  You must use this option if you intend to
+modify any @file{.java} files in @file{libjava}.
+
+@item --with-java-home=@var{dirname}
+This @samp{libjava} option overrides the default value of the
+@samp{java.home} system property.  It is also used to set
+@samp{sun.boot.class.path} to @file{@var{dirname}/lib/rt.jar}.  By
+default @samp{java.home} is set to @file{@var{prefix}} and
+@samp{sun.boot.class.path} to
+@file{@var{datadir}/java/libgcj-@var{version}.jar}.
+
+@item --with-ecj-jar=@var{filename}
+This option can be used to specify the location of an external jar
+file containing the Eclipse Java compiler.  A specially modified
+version of this compiler is used by @command{gcj} to parse
+@file{.java} source files.  If this option is given, the
+@samp{libjava} build will create and install an @file{ecj1} executable
+which uses this jar file at runtime.
+
+If this option is not given, but an @file{ecj.jar} file is found in
+the topmost source tree at configure time, then the @samp{libgcj}
+build will create and install @file{ecj1}, and will also install the
+discovered @file{ecj.jar} into a suitable place in the install tree.
+
+If @file{ecj1} is not installed, then the user will have to supply one
+on his path in order for @command{gcj} to properly parse @file{.java}
+source files.  A suitable jar is available from
+@uref{ftp://sourceware.org/pub/java/}.
+
+@item --disable-getenv-properties
+Don't set system properties from @env{GCJ_PROPERTIES}.
+
+@item --enable-hash-synchronization
+Use a global hash table for monitor locks.  Ordinarily,
+@samp{libgcj}'s @samp{configure} script automatically makes
+the correct choice for this option for your platform.  Only use
+this if you know you need the library to be configured differently.
+
+@item --enable-interpreter
+Enable the Java interpreter.  The interpreter is automatically
+enabled by default on all platforms that support it.  This option
+is really only useful if you want to disable the interpreter
+(using @option{--disable-interpreter}).
+
+@item --disable-java-net
+Disable java.net.  This disables the native part of java.net only,
+using non-functional stubs for native method implementations.
+
+@item --disable-jvmpi
+Disable JVMPI support.
+
+@item --disable-libgcj-bc
+Disable BC ABI compilation of certain parts of libgcj.  By default,
+some portions of libgcj are compiled with @option{-findirect-dispatch}
+and @option{-fno-indirect-classes}, allowing them to be overridden at
+run-time.
+
+If @option{--disable-libgcj-bc} is specified, libgcj is built without
+these options.  This allows the compile-time linker to resolve
+dependencies when statically linking to libgcj.  However it makes it
+impossible to override the affected portions of libgcj at run-time.
+
+@item --enable-reduced-reflection
+Build most of libgcj with @option{-freduced-reflection}.  This reduces
+the size of libgcj at the expense of not being able to do accurate
+reflection on the classes it contains.  This option is safe if you
+know that code using libgcj will never use reflection on the standard
+runtime classes in libgcj (including using serialization, RMI or CORBA).
+
+@item --with-ecos
+Enable runtime eCos target support.
+
+@item --without-libffi
+Don't use @samp{libffi}.  This will disable the interpreter and JNI
+support as well, as these require @samp{libffi} to work.
+
+@item --enable-libgcj-debug
+Enable runtime debugging code.
+
+@item --enable-libgcj-multifile
+If specified, causes all @file{.java} source files to be
+compiled into @file{.class} files in one invocation of
+@samp{gcj}.  This can speed up build time, but is more
+resource-intensive.  If this option is unspecified or
+disabled, @samp{gcj} is invoked once for each @file{.java}
+file to compile into a @file{.class} file.
+
+@item --with-libiconv-prefix=DIR
+Search for libiconv in @file{DIR/include} and @file{DIR/lib}.
+
+@item --enable-sjlj-exceptions
+Force use of the @code{setjmp}/@code{longjmp}-based scheme for exceptions.
+@samp{configure} ordinarily picks the correct value based on the platform.
+Only use this option if you are sure you need a different setting.
+
+@item --with-system-zlib
+Use installed @samp{zlib} rather than that included with GCC@.
+
+@item --with-win32-nlsapi=ansi, unicows or unicode
+Indicates how MinGW @samp{libgcj} translates between UNICODE
+characters and the Win32 API@.
+
+@item --enable-java-home
+If enabled, this creates a JPackage compatible SDK environment during install.
+Note that if --enable-java-home is used, --with-arch-directory=ARCH must also
+be specified.
+
+@item --with-arch-directory=ARCH
+Specifies the name to use for the @file{jre/lib/ARCH} directory in the SDK 
+environment created when --enable-java-home is passed. Typical names for this 
+directory include i386, amd64, ia64, etc.
+
+@item --with-os-directory=DIR
+Specifies the OS directory for the SDK include directory. This is set to auto
+detect, and is typically 'linux'.
+
+@item --with-origin-name=NAME
+Specifies the JPackage origin name. This defaults to the 'gcj' in
+java-1.5.0-gcj.
+
+@item --with-arch-suffix=SUFFIX
+Specifies the suffix for the sdk directory. Defaults to the empty string. 
+Examples include '.x86_64' in 'java-1.5.0-gcj-1.5.0.0.x86_64'.
+
+@item --with-jvm-root-dir=DIR
+Specifies where to install the SDK. Default is $(prefix)/lib/jvm.
+
+@item --with-jvm-jar-dir=DIR
+Specifies where to install jars. Default is $(prefix)/lib/jvm-exports.
+
+@item --with-python-dir=DIR
+Specifies where to install the Python modules used for aot-compile. DIR should
+not include the prefix used in installation. For example, if the Python modules
+are to be installed in /usr/lib/python2.5/site-packages, then 
+--with-python-dir=/lib/python2.5/site-packages should be passed. If this is
+not specified, then the Python modules are installed in $(prefix)/share/python.
+
+@item --enable-aot-compile-rpm
+Adds aot-compile-rpm to the list of installed scripts.
+
+@item --enable-browser-plugin
+Build the gcjwebplugin web browser plugin.
+
+@table @code
+@item ansi
+Use the single-byte @code{char} and the Win32 A functions natively,
+translating to and from UNICODE when using these functions.  If
+unspecified, this is the default.
+
+@item unicows
+Use the @code{WCHAR} and Win32 W functions natively.  Adds
+@code{-lunicows} to @file{libgcj.spec} to link with @samp{libunicows}.
+@file{unicows.dll} needs to be deployed on Microsoft Windows 9X machines
+running built executables.  @file{libunicows.a}, an open-source
+import library around Microsoft's @code{unicows.dll}, is obtained from
+@uref{http://libunicows.sourceforge.net/}, which also gives details
+on getting @file{unicows.dll} from Microsoft.
+
+@item unicode
+Use the @code{WCHAR} and Win32 W functions natively.  Does @emph{not}
+add @code{-lunicows} to @file{libgcj.spec}.  The built executables will
+only run on Microsoft Windows NT and above.
+@end table
+@end table
+
+@subsubheading AWT-Specific Options
+
+@table @code
+@item --with-x
+Use the X Window System.
+
+@item --enable-java-awt=PEER(S)
+Specifies the AWT peer library or libraries to build alongside
+@samp{libgcj}.  If this option is unspecified or disabled, AWT
+will be non-functional.  Current valid values are @option{gtk} and
+@option{xlib}.  Multiple libraries should be separated by a
+comma (i.e.@: @option{--enable-java-awt=gtk,xlib}).
+
+@item --enable-gtk-cairo
+Build the cairo Graphics2D implementation on GTK@.
+
+@item --enable-java-gc=TYPE
+Choose garbage collector.  Defaults to @option{boehm} if unspecified.
+
+@item --disable-gtktest
+Do not try to compile and run a test GTK+ program.
+
+@item --disable-glibtest
+Do not try to compile and run a test GLIB program.
+
+@item --with-libart-prefix=PFX
+Prefix where libart is installed (optional).
+
+@item --with-libart-exec-prefix=PFX
+Exec prefix where libart is installed (optional).
+
+@item --disable-libarttest
+Do not try to compile and run a test libart program.
+
+@end table
+
+@subsubheading Overriding @command{configure} test results
+
+Sometimes, it might be necessary to override the result of some
+@command{configure} test, for example in order to ease porting to a new
+system or work around a bug in a test.  The toplevel @command{configure}
+script provides three variables for this:
+
+@table @code
+
+@item build_configargs
+@cindex @code{build_configargs}
+The contents of this variable is passed to all build @command{configure}
+scripts.
+
+@item host_configargs
+@cindex @code{host_configargs}
+The contents of this variable is passed to all host @command{configure}
+scripts.
+
+@item target_configargs
+@cindex @code{target_configargs}
+The contents of this variable is passed to all target @command{configure}
+scripts.
+
+@end table
+
+In order to avoid shell and @command{make} quoting issues for complex
+overrides, you can pass a setting for @env{CONFIG_SITE} and set
+variables in the site file.
+
+@html
+<hr />
+<p>
+@end html
+@ifhtml
+@uref{./index.html,,Return to the GCC Installation page}
+@end ifhtml
+@end ifset
+
+@c ***Building****************************************************************
+@ifnothtml
+@comment node-name,     next,          previous, up
+@node    Building, Testing, Configuration, Installing GCC
+@end ifnothtml
+@ifset buildhtml
+@ifnothtml
+@chapter Building
+@end ifnothtml
+@cindex Installing GCC: Building
+
+Now that GCC is configured, you are ready to build the compiler and
+runtime libraries.
+
+Some commands executed when making the compiler may fail (return a
+nonzero status) and be ignored by @command{make}.  These failures, which
+are often due to files that were not found, are expected, and can safely
+be ignored.
+
+It is normal to have compiler warnings when compiling certain files.
+Unless you are a GCC developer, you can generally ignore these warnings
+unless they cause compilation to fail.  Developers should attempt to fix
+any warnings encountered, however they can temporarily continue past
+warnings-as-errors by specifying the configure flag
+@option{--disable-werror}.
+
+On certain old systems, defining certain environment variables such as
+@env{CC} can interfere with the functioning of @command{make}.
+
+If you encounter seemingly strange errors when trying to build the
+compiler in a directory other than the source directory, it could be
+because you have previously configured the compiler in the source
+directory.  Make sure you have done all the necessary preparations.
+
+If you build GCC on a BSD system using a directory stored in an old System
+V file system, problems may occur in running @command{fixincludes} if the
+System V file system doesn't support symbolic links.  These problems
+result in a failure to fix the declaration of @code{size_t} in
+@file{sys/types.h}.  If you find that @code{size_t} is a signed type and
+that type mismatches occur, this could be the cause.
+
+The solution is not to use such a directory for building GCC@.
+
+Similarly, when building from SVN or snapshots, or if you modify
+@file{*.l} files, you need the Flex lexical analyzer generator
+installed.  If you do not modify @file{*.l} files, releases contain
+the Flex-generated files and you do not need Flex installed to build
+them.  There is still one Flex-based lexical analyzer (part of the
+build machinery, not of GCC itself) that is used even if you only
+build the C front end.
+
+When building from SVN or snapshots, or if you modify Texinfo
+documentation, you need version 4.7 or later of Texinfo installed if you
+want Info documentation to be regenerated.  Releases contain Info
+documentation pre-built for the unmodified documentation in the release.
+
+@section Building a native compiler
+
+For a native build, the default configuration is to perform
+a 3-stage bootstrap of the compiler when @samp{make} is invoked.
+This will build the entire GCC system and ensure that it compiles
+itself correctly.  It can be disabled with the @option{--disable-bootstrap}
+parameter to @samp{configure}, but bootstrapping is suggested because
+the compiler will be tested more completely and could also have
+better performance.
+
+The bootstrapping process will complete the following steps:
+
+@itemize @bullet
+@item
+Build tools necessary to build the compiler.
+
+@item
+Perform a 3-stage bootstrap of the compiler.  This includes building
+three times the target tools for use by the compiler such as binutils
+(bfd, binutils, gas, gprof, ld, and opcodes) if they have been
+individually linked or moved into the top level GCC source tree before
+configuring.
+
+@item
+Perform a comparison test of the stage2 and stage3 compilers.
+
+@item
+Build runtime libraries using the stage3 compiler from the previous step.
+
+@end itemize
+
+If you are short on disk space you might consider @samp{make
+bootstrap-lean} instead.  The sequence of compilation is the
+same described above, but object files from the stage1 and
+stage2 of the 3-stage bootstrap of the compiler are deleted as
+soon as they are no longer needed.
+
+If you wish to use non-default GCC flags when compiling the stage2
+and stage3 compilers, set @code{BOOT_CFLAGS} on the command line when
+doing @samp{make}.  For example, if you want to save additional space
+during the bootstrap and in the final installation as well, you can
+build the compiler binaries without debugging information as in the
+following example.  This will save roughly 40% of disk space both for
+the bootstrap and the final installation.  (Libraries will still contain
+debugging information.)
+
+@smallexample
+make BOOT_CFLAGS='-O' bootstrap
+@end smallexample
+
+You can place non-default optimization flags into @code{BOOT_CFLAGS}; they
+are less well tested here than the default of @samp{-g -O2}, but should
+still work.  In a few cases, you may find that you need to specify special
+flags such as @option{-msoft-float} here to complete the bootstrap; or,
+if the native compiler miscompiles the stage1 compiler, you may need
+to work around this, by choosing @code{BOOT_CFLAGS} to avoid the parts
+of the stage1 compiler that were miscompiled, or by using @samp{make
+bootstrap4} to increase the number of stages of bootstrap.
+
+@code{BOOT_CFLAGS} does not apply to bootstrapped target libraries.
+Since these are always compiled with the compiler currently being
+bootstrapped, you can use @code{CFLAGS_FOR_TARGET} to modify their
+compilation flags, as for non-bootstrapped target libraries.
+Again, if the native compiler miscompiles the stage1 compiler, you may
+need to work around this by avoiding non-working parts of the stage1
+compiler.  Use @code{STAGE1_TFLAGS} to this end.
+
+If you used the flag @option{--enable-languages=@dots{}} to restrict
+the compilers to be built, only those you've actually enabled will be
+built.  This will of course only build those runtime libraries, for
+which the particular compiler has been built.  Please note,
+that re-defining @env{LANGUAGES} when calling @samp{make}
+@strong{does not} work anymore!
+
+If the comparison of stage2 and stage3 fails, this normally indicates
+that the stage2 compiler has compiled GCC incorrectly, and is therefore
+a potentially serious bug which you should investigate and report.  (On
+a few systems, meaningful comparison of object files is impossible; they
+always appear ``different''.  If you encounter this problem, you will
+need to disable comparison in the @file{Makefile}.)
+
+If you do not want to bootstrap your compiler, you can configure with
+@option{--disable-bootstrap}.  In particular cases, you may want to
+bootstrap your compiler even if the target system is not the same as
+the one you are building on: for example, you could build a
+@code{powerpc-unknown-linux-gnu} toolchain on a
+@code{powerpc64-unknown-linux-gnu} host.  In this case, pass
+@option{--enable-bootstrap} to the configure script.
+
+@code{BUILD_CONFIG} can be used to bring in additional customization
+to the build.  It can be set to a whitespace-separated list of names.
+For each such @code{NAME}, top-level @file{config/@code{NAME}.mk} will
+be included by the top-level @file{Makefile}, bringing in any settings
+it contains.  The default @code{BUILD_CONFIG} can be set using the
+configure option @option{--with-build-config=@code{NAME}...}.  Some
+examples of supported build configurations are:
+
+@table @asis
+@item @samp{bootstrap-O1}
+Removes any @option{-O}-started option from @code{BOOT_CFLAGS}, and adds
+@option{-O1} to it.  @samp{BUILD_CONFIG=bootstrap-O1} is equivalent to
+@samp{BOOT_CFLAGS='-g -O1'}.
+
+@item @samp{bootstrap-O3}
+Analogous to @code{bootstrap-O1}.
+
+@item @samp{bootstrap-lto}
+Enables Link-Time Optimization for host tools during bootstrapping.
+@samp{BUILD_CONFIG=bootstrap-lto} is equivalent to adding
+@option{-flto} to @samp{BOOT_CFLAGS}.
+
+@item @samp{bootstrap-debug}
+Verifies that the compiler generates the same executable code, whether
+or not it is asked to emit debug information.  To this end, this
+option builds stage2 host programs without debug information, and uses
+@file{contrib/compare-debug} to compare them with the stripped stage3
+object files.  If @code{BOOT_CFLAGS} is overridden so as to not enable
+debug information, stage2 will have it, and stage3 won't.  This option
+is enabled by default when GCC bootstrapping is enabled, if
+@code{strip} can turn object files compiled with and without debug
+info into identical object files.  In addition to better test
+coverage, this option makes default bootstraps faster and leaner.
+
+@item @samp{bootstrap-debug-big}
+Rather than comparing stripped object files, as in
+@code{bootstrap-debug}, this option saves internal compiler dumps
+during stage2 and stage3 and compares them as well, which helps catch
+additional potential problems, but at a great cost in terms of disk
+space.  It can be specified in addition to @samp{bootstrap-debug}.
+
+@item @samp{bootstrap-debug-lean}
+This option saves disk space compared with @code{bootstrap-debug-big},
+but at the expense of some recompilation.  Instead of saving the dumps
+of stage2 and stage3 until the final compare, it uses
+@option{-fcompare-debug} to generate, compare and remove the dumps
+during stage3, repeating the compilation that already took place in
+stage2, whose dumps were not saved.
+
+@item @samp{bootstrap-debug-lib}
+This option tests executable code invariance over debug information
+generation on target libraries, just like @code{bootstrap-debug-lean}
+tests it on host programs.  It builds stage3 libraries with
+@option{-fcompare-debug}, and it can be used along with any of the
+@code{bootstrap-debug} options above.
+
+There aren't @code{-lean} or @code{-big} counterparts to this option
+because most libraries are only build in stage3, so bootstrap compares
+would not get significant coverage.  Moreover, the few libraries built
+in stage2 are used in stage3 host programs, so we wouldn't want to
+compile stage2 libraries with different options for comparison purposes.
+
+@item @samp{bootstrap-debug-ckovw}
+Arranges for error messages to be issued if the compiler built on any
+stage is run without the option @option{-fcompare-debug}.  This is
+useful to verify the full @option{-fcompare-debug} testing coverage.  It
+must be used along with @code{bootstrap-debug-lean} and
+@code{bootstrap-debug-lib}.
+
+@item @samp{bootstrap-time}
+Arranges for the run time of each program started by the GCC driver,
+built in any stage, to be logged to @file{time.log}, in the top level of
+the build tree.
+
+@end table
+
+@section Building a cross compiler
+
+When building a cross compiler, it is not generally possible to do a
+3-stage bootstrap of the compiler.  This makes for an interesting problem
+as parts of GCC can only be built with GCC@.
+
+To build a cross compiler, we recommend first building and installing a
+native compiler.  You can then use the native GCC compiler to build the
+cross compiler.  The installed native compiler needs to be GCC version
+2.95 or later.
+
+If the cross compiler is to be built with support for the Java
+programming language and the ability to compile .java source files is
+desired, the installed native compiler used to build the cross
+compiler needs to be the same GCC version as the cross compiler.  In
+addition the cross compiler needs to be configured with
+@option{--with-ecj-jar=@dots{}}.
+
+Assuming you have already installed a native copy of GCC and configured
+your cross compiler, issue the command @command{make}, which performs the
+following steps:
+
+@itemize @bullet
+@item
+Build host tools necessary to build the compiler.
+
+@item
+Build target tools for use by the compiler such as binutils (bfd,
+binutils, gas, gprof, ld, and opcodes)
+if they have been individually linked or moved into the top level GCC source
+tree before configuring.
+
+@item
+Build the compiler (single stage only).
+
+@item
+Build runtime libraries using the compiler from the previous step.
+@end itemize
+
+Note that if an error occurs in any step the make process will exit.
+
+If you are not building GNU binutils in the same source tree as GCC,
+you will need a cross-assembler and cross-linker installed before
+configuring GCC@.  Put them in the directory
+@file{@var{prefix}/@var{target}/bin}.  Here is a table of the tools
+you should put in this directory:
+
+@table @file
+@item as
+This should be the cross-assembler.
+
+@item ld
+This should be the cross-linker.
+
+@item ar
+This should be the cross-archiver: a program which can manipulate
+archive files (linker libraries) in the target machine's format.
+
+@item ranlib
+This should be a program to construct a symbol table in an archive file.
+@end table
+
+The installation of GCC will find these programs in that directory,
+and copy or link them to the proper place to for the cross-compiler to
+find them when run later.
+
+The easiest way to provide these files is to build the Binutils package.
+Configure it with the same @option{--host} and @option{--target}
+options that you use for configuring GCC, then build and install
+them.  They install their executables automatically into the proper
+directory.  Alas, they do not support all the targets that GCC
+supports.
+
+If you are not building a C library in the same source tree as GCC,
+you should also provide the target libraries and headers before
+configuring GCC, specifying the directories with
+@option{--with-sysroot} or @option{--with-headers} and
+@option{--with-libs}.  Many targets also require ``start files'' such
+as @file{crt0.o} and
+@file{crtn.o} which are linked into each executable.  There may be several
+alternatives for @file{crt0.o}, for use with profiling or other
+compilation options.  Check your target's definition of
+@code{STARTFILE_SPEC} to find out what start files it uses.
+
+@section Building in parallel
+
+GNU Make 3.80 and above, which is necessary to build GCC, support
+building in parallel.  To activate this, you can use @samp{make -j 2}
+instead of @samp{make}.  You can also specify a bigger number, and 
+in most cases using a value greater than the number of processors in
+your machine will result in fewer and shorter I/O latency hits, thus
+improving overall throughput; this is especially true for slow drives
+and network filesystems.
+
+@section Building the Ada compiler
+
+In order to build GNAT, the Ada compiler, you need a working GNAT
+compiler (GCC version 4.0 or later).
+This includes GNAT tools such as @command{gnatmake} and
+@command{gnatlink}, since the Ada front end is written in Ada and
+uses some GNAT-specific extensions.
+
+In order to build a cross compiler, it is suggested to install
+the new compiler as native first, and then use it to build the cross
+compiler.
+
+@command{configure} does not test whether the GNAT installation works
+and has a sufficiently recent version; if too old a GNAT version is
+installed, the build will fail unless @option{--enable-languages} is
+used to disable building the Ada front end.
+
+@env{ADA_INCLUDE_PATH} and @env{ADA_OBJECT_PATH} environment variables
+must not be set when building the Ada compiler, the Ada tools, or the
+Ada runtime libraries. You can check that your build environment is clean
+by verifying that @samp{gnatls -v} lists only one explicit path in each
+section.
+
+@section Building with profile feedback
+
+It is possible to use profile feedback to optimize the compiler itself.  This
+should result in a faster compiler binary.  Experiments done on x86 using gcc
+3.3 showed approximately 7 percent speedup on compiling C programs.  To
+bootstrap the compiler with profile feedback, use @code{make profiledbootstrap}.
+
+When @samp{make profiledbootstrap} is run, it will first build a @code{stage1}
+compiler.  This compiler is used to build a @code{stageprofile} compiler
+instrumented to collect execution counts of instruction and branch
+probabilities.  Then runtime libraries are compiled with profile collected.
+Finally a @code{stagefeedback} compiler is built using the information collected.
+
+Unlike standard bootstrap, several additional restrictions apply.  The
+compiler used to build @code{stage1} needs to support a 64-bit integral type.
+It is recommended to only use GCC for this.  Also parallel make is currently
+not supported since collisions in profile collecting may occur.
+
+@html
+<hr />
+<p>
+@end html
+@ifhtml
+@uref{./index.html,,Return to the GCC Installation page}
+@end ifhtml
+@end ifset
+
+@c ***Testing*****************************************************************
+@ifnothtml
+@comment node-name,     next,          previous, up
+@node    Testing, Final install, Building, Installing GCC
+@end ifnothtml
+@ifset testhtml
+@ifnothtml
+@chapter Installing GCC: Testing
+@end ifnothtml
+@cindex Testing
+@cindex Installing GCC: Testing
+@cindex Testsuite
+
+Before you install GCC, we encourage you to run the testsuites and to
+compare your results with results from a similar configuration that have
+been submitted to the
+@uref{http://gcc.gnu.org/ml/gcc-testresults/,,gcc-testresults mailing list}.
+Some of these archived results are linked from the build status lists
+at @uref{http://gcc.gnu.org/buildstat.html}, although not everyone who
+reports a successful build runs the testsuites and submits the results.
+This step is optional and may require you to download additional software,
+but it can give you confidence in your new GCC installation or point out
+problems before you install and start using your new GCC@.
+
+First, you must have @uref{download.html,,downloaded the testsuites}.
+These are part of the full distribution, but if you downloaded the
+``core'' compiler plus any front ends, you must download the testsuites
+separately.
+
+Second, you must have the testing tools installed.  This includes
+@uref{http://www.gnu.org/software/dejagnu/,,DejaGnu}, Tcl, and Expect;
+the DejaGnu site has links to these.
+
+If the directories where @command{runtest} and @command{expect} were
+installed are not in the @env{PATH}, you may need to set the following
+environment variables appropriately, as in the following example (which
+assumes that DejaGnu has been installed under @file{/usr/local}):
+
+@smallexample
+TCL_LIBRARY = /usr/local/share/tcl8.0
+DEJAGNULIBS = /usr/local/share/dejagnu
+@end smallexample
+
+(On systems such as Cygwin, these paths are required to be actual
+paths, not mounts or links; presumably this is due to some lack of
+portability in the DejaGnu code.)
+
+
+Finally, you can run the testsuite (which may take a long time):
+@smallexample
+cd @var{objdir}; make -k check
+@end smallexample
+
+This will test various components of GCC, such as compiler
+front ends and runtime libraries.  While running the testsuite, DejaGnu
+might emit some harmless messages resembling
+@samp{WARNING: Couldn't find the global config file.} or
+@samp{WARNING: Couldn't find tool init file} that can be ignored.
+
+If you are testing a cross-compiler, you may want to run the testsuite
+on a simulator as described at @uref{http://gcc.gnu.org/simtest-howto.html}.
+
+@section How can you run the testsuite on selected tests?
+
+In order to run sets of tests selectively, there are targets
+@samp{make check-gcc} and @samp{make check-g++}
+in the @file{gcc} subdirectory of the object directory.  You can also
+just run @samp{make check} in a subdirectory of the object directory.
+
+
+A more selective way to just run all @command{gcc} execute tests in the
+testsuite is to use
+
+@smallexample
+make check-gcc RUNTESTFLAGS="execute.exp @var{other-options}"
+@end smallexample
+
+Likewise, in order to run only the @command{g++} ``old-deja'' tests in
+the testsuite with filenames matching @samp{9805*}, you would use
+
+@smallexample
+make check-g++ RUNTESTFLAGS="old-deja.exp=9805* @var{other-options}"
+@end smallexample
+
+The @file{*.exp} files are located in the testsuite directories of the GCC
+source, the most important ones being @file{compile.exp},
+@file{execute.exp}, @file{dg.exp} and @file{old-deja.exp}.
+To get a list of the possible @file{*.exp} files, pipe the
+output of @samp{make check} into a file and look at the
+@samp{Running @dots{}  .exp} lines.
+
+@section Passing options and running multiple testsuites
+
+You can pass multiple options to the testsuite using the
+@samp{--target_board} option of DejaGNU, either passed as part of
+@samp{RUNTESTFLAGS}, or directly to @command{runtest} if you prefer to
+work outside the makefiles.  For example,
+
+@smallexample
+make check-g++ RUNTESTFLAGS="--target_board=unix/-O3/-fmerge-constants"
+@end smallexample
+
+will run the standard @command{g++} testsuites (``unix'' is the target name
+for a standard native testsuite situation), passing
+@samp{-O3 -fmerge-constants} to the compiler on every test, i.e.,
+slashes separate options.
+
+You can run the testsuites multiple times using combinations of options
+with a syntax similar to the brace expansion of popular shells:
+
+@smallexample
+@dots{}"--target_board=arm-sim\@{-mhard-float,-msoft-float\@}\@{-O1,-O2,-O3,\@}"
+@end smallexample
+
+(Note the empty option caused by the trailing comma in the final group.)
+The following will run each testsuite eight times using the @samp{arm-sim}
+target, as if you had specified all possible combinations yourself:
+
+@smallexample
+--target_board=arm-sim/-mhard-float/-O1
+--target_board=arm-sim/-mhard-float/-O2
+--target_board=arm-sim/-mhard-float/-O3
+--target_board=arm-sim/-mhard-float
+--target_board=arm-sim/-msoft-float/-O1
+--target_board=arm-sim/-msoft-float/-O2
+--target_board=arm-sim/-msoft-float/-O3
+--target_board=arm-sim/-msoft-float
+@end smallexample
+
+They can be combined as many times as you wish, in arbitrary ways.  This
+list:
+
+@smallexample
+@dots{}"--target_board=unix/-Wextra\@{-O3,-fno-strength\@}\@{-fomit-frame,\@}"
+@end smallexample
+
+will generate four combinations, all involving @samp{-Wextra}.
+
+The disadvantage to this method is that the testsuites are run in serial,
+which is a waste on multiprocessor systems.  For users with GNU Make and
+a shell which performs brace expansion, you can run the testsuites in
+parallel by having the shell perform the combinations and @command{make}
+do the parallel runs.  Instead of using @samp{--target_board}, use a
+special makefile target:
+
+@smallexample
+make -j@var{N} check-@var{testsuite}//@var{test-target}/@var{option1}/@var{option2}/@dots{}
+@end smallexample
+
+For example,
+
+@smallexample
+make -j3 check-gcc//sh-hms-sim/@{-m1,-m2,-m3,-m3e,-m4@}/@{,-nofpu@}
+@end smallexample
+
+will run three concurrent ``make-gcc'' testsuites, eventually testing all
+ten combinations as described above.  Note that this is currently only
+supported in the @file{gcc} subdirectory.  (To see how this works, try
+typing @command{echo} before the example given here.)
+
+
+@section Additional testing for Java Class Libraries
+
+The Java runtime tests can be executed via @samp{make check}
+in the @file{@var{target}/libjava/testsuite} directory in
+the build tree.
+
+The @uref{http://sourceware.org/mauve/,,Mauve Project} provides
+a suite of tests for the Java Class Libraries.  This suite can be run
+as part of libgcj testing by placing the Mauve tree within the libjava
+testsuite at @file{libjava/testsuite/libjava.mauve/mauve}, or by
+specifying the location of that tree when invoking @samp{make}, as in
+@samp{make MAUVEDIR=~/mauve check}.
+
+@section How to interpret test results
+
+The result of running the testsuite are various @file{*.sum} and @file{*.log}
+files in the testsuite subdirectories.  The @file{*.log} files contain a
+detailed log of the compiler invocations and the corresponding
+results, the @file{*.sum} files summarize the results.  These summaries
+contain status codes for all tests:
+
+@itemize @bullet
+@item
+PASS: the test passed as expected
+@item
+XPASS: the test unexpectedly passed
+@item
+FAIL: the test unexpectedly failed
+@item
+XFAIL: the test failed as expected
+@item
+UNSUPPORTED: the test is not supported on this platform
+@item
+ERROR: the testsuite detected an error
+@item
+WARNING: the testsuite detected a possible problem
+@end itemize
+
+It is normal for some tests to report unexpected failures.  At the
+current time the testing harness does not allow fine grained control
+over whether or not a test is expected to fail.  This problem should
+be fixed in future releases.
+
+
+@section Submitting test results
+
+If you want to report the results to the GCC project, use the
+@file{contrib/test_summary} shell script.  Start it in the @var{objdir} with
+
+@smallexample
+@var{srcdir}/contrib/test_summary -p your_commentary.txt \
+    -m gcc-testresults@@gcc.gnu.org |sh
+@end smallexample
+
+This script uses the @command{Mail} program to send the results, so
+make sure it is in your @env{PATH}.  The file @file{your_commentary.txt} is
+prepended to the testsuite summary and should contain any special
+remarks you have on your results or your build environment.  Please
+do not edit the testsuite result block or the subject line, as these
+messages may be automatically processed.
+
+@html
+<hr />
+<p>
+@end html
+@ifhtml
+@uref{./index.html,,Return to the GCC Installation page}
+@end ifhtml
+@end ifset
+
+@c ***Final install***********************************************************
+@ifnothtml
+@comment node-name,     next,          previous, up
+@node    Final install, , Testing, Installing GCC
+@end ifnothtml
+@ifset finalinstallhtml
+@ifnothtml
+@chapter Installing GCC: Final installation
+@end ifnothtml
+
+Now that GCC has been built (and optionally tested), you can install it with
+@smallexample
+cd @var{objdir} && make install
+@end smallexample
+
+We strongly recommend to install into a target directory where there is
+no previous version of GCC present.  Also, the GNAT runtime should not
+be stripped, as this would break certain features of the debugger that
+depend on this debugging information (catching Ada exceptions for
+instance).
+
+That step completes the installation of GCC; user level binaries can
+be found in @file{@var{prefix}/bin} where @var{prefix} is the value
+you specified with the @option{--prefix} to configure (or
+@file{/usr/local} by default).  (If you specified @option{--bindir},
+that directory will be used instead; otherwise, if you specified
+@option{--exec-prefix}, @file{@var{exec-prefix}/bin} will be used.)
+Headers for the C++ and Java libraries are installed in
+@file{@var{prefix}/include}; libraries in @file{@var{libdir}}
+(normally @file{@var{prefix}/lib}); internal parts of the compiler in
+@file{@var{libdir}/gcc} and @file{@var{libexecdir}/gcc}; documentation
+in info format in @file{@var{infodir}} (normally
+@file{@var{prefix}/info}).
+
+When installing cross-compilers, GCC's executables
+are not only installed into @file{@var{bindir}}, that
+is, @file{@var{exec-prefix}/bin}, but additionally into
+@file{@var{exec-prefix}/@var{target-alias}/bin}, if that directory
+exists.  Typically, such @dfn{tooldirs} hold target-specific
+binutils, including assembler and linker.
+
+Installation into a temporary staging area or into a @command{chroot}
+jail can be achieved with the command
+
+@smallexample
+make DESTDIR=@var{path-to-rootdir} install
+@end smallexample
+
+@noindent
+where @var{path-to-rootdir} is the absolute path of
+a directory relative to which all installation paths will be
+interpreted.  Note that the directory specified by @code{DESTDIR}
+need not exist yet; it will be created if necessary.
+
+There is a subtle point with tooldirs and @code{DESTDIR}:
+If you relocate a cross-compiler installation with
+e.g.@: @samp{DESTDIR=@var{rootdir}}, then the directory
+@file{@var{rootdir}/@var{exec-prefix}/@var{target-alias}/bin} will
+be filled with duplicated GCC executables only if it already exists,
+it will not be created otherwise.  This is regarded as a feature,
+not as a bug, because it gives slightly more control to the packagers
+using the @code{DESTDIR} feature.
+
+You can install stripped programs and libraries with
+
+@smallexample
+make install-strip
+@end smallexample
+
+If you are bootstrapping a released version of GCC then please
+quickly review the build status page for your release, available from
+@uref{http://gcc.gnu.org/buildstat.html}.
+If your system is not listed for the version of GCC that you built,
+send a note to
+@email{gcc@@gcc.gnu.org} indicating
+that you successfully built and installed GCC@.
+Include the following information:
+
+@itemize @bullet
+@item
+Output from running @file{@var{srcdir}/config.guess}.  Do not send
+that file itself, just the one-line output from running it.
+
+@item
+The output of @samp{gcc -v} for your newly installed @command{gcc}.
+This tells us which version of GCC you built and the options you passed to
+configure.
+
+@item
+Whether you enabled all languages or a subset of them.  If you used a
+full distribution then this information is part of the configure
+options in the output of @samp{gcc -v}, but if you downloaded the
+``core'' compiler plus additional front ends then it isn't apparent
+which ones you built unless you tell us about it.
+
+@item
+If the build was for GNU/Linux, also include:
+@itemize @bullet
+@item
+The distribution name and version (e.g., Red Hat 7.1 or Debian 2.2.3);
+this information should be available from @file{/etc/issue}.
+
+@item
+The version of the Linux kernel, available from @samp{uname --version}
+or @samp{uname -a}.
+
+@item
+The version of glibc you used; for RPM-based systems like Red Hat,
+Mandrake, and SuSE type @samp{rpm -q glibc} to get the glibc version,
+and on systems like Debian and Progeny use @samp{dpkg -l libc6}.
+@end itemize
+For other systems, you can include similar information if you think it is
+relevant.
+
+@item
+Any other information that you think would be useful to people building
+GCC on the same configuration.  The new entry in the build status list
+will include a link to the archived copy of your message.
+@end itemize
+
+We'd also like to know if the
+@ifnothtml
+@ref{Specific, host/target specific installation notes}
+@end ifnothtml
+@ifhtml
+@uref{specific.html,,host/target specific installation notes}
+@end ifhtml
+didn't include your host/target information or if that information is
+incomplete or out of date.  Send a note to
+@email{gcc@@gcc.gnu.org} detailing how the information should be changed.
+
+If you find a bug, please report it following the
+@uref{../bugs/,,bug reporting guidelines}.
+
+If you want to print the GCC manuals, do @samp{cd @var{objdir}; make
+dvi}.  You will need to have @command{texi2dvi} (version at least 4.7)
+and @TeX{} installed.  This creates a number of @file{.dvi} files in
+subdirectories of @file{@var{objdir}}; these may be converted for
+printing with programs such as @command{dvips}.  Alternately, by using
+@samp{make pdf} in place of @samp{make dvi}, you can create documentation
+in the form of @file{.pdf} files; this requires @command{texi2pdf}, which
+is included with Texinfo version 4.8 and later.  You can also
+@uref{http://shop.fsf.org/,,buy printed manuals from the
+Free Software Foundation}, though such manuals may not be for the most
+recent version of GCC@.
+
+If you would like to generate online HTML documentation, do @samp{cd
+@var{objdir}; make html} and HTML will be generated for the gcc manuals in
+@file{@var{objdir}/gcc/HTML}.
+
+@html
+<hr />
+<p>
+@end html
+@ifhtml
+@uref{./index.html,,Return to the GCC Installation page}
+@end ifhtml
+@end ifset
+
+@c ***Binaries****************************************************************
+@ifnothtml
+@comment node-name,     next,          previous, up
+@node    Binaries, Specific, Installing GCC, Top
+@end ifnothtml
+@ifset binarieshtml
+@ifnothtml
+@chapter Installing GCC: Binaries
+@end ifnothtml
+@cindex Binaries
+@cindex Installing GCC: Binaries
+
+We are often asked about pre-compiled versions of GCC@.  While we cannot
+provide these for all platforms, below you'll find links to binaries for
+various platforms where creating them by yourself is not easy due to various
+reasons.
+
+Please note that we did not create these binaries, nor do we
+support them.  If you have any problems installing them, please
+contact their makers.
+
+@itemize
+@item
+AIX:
+@itemize
+@item
+@uref{http://www.bullfreeware.com,,Bull's Freeware and Shareware Archive for AIX};
+
+@item
+@uref{http://pware.hvcc.edu,,Hudson Valley Community College Open Source Software for IBM System p};
+
+@item
+@uref{http://www.perzl.org/aix/,,AIX 5L and 6 Open Source Packages}.
+@end itemize
+
+@item
+DOS---@uref{http://www.delorie.com/djgpp/,,DJGPP}.
+
+@item
+Renesas H8/300[HS]---@uref{http://h8300-hms.sourceforge.net/,,GNU
+Development Tools for the Renesas H8/300[HS] Series}.
+
+@item
+HP-UX:
+@itemize
+@item
+@uref{http://hpux.connect.org.uk/,,HP-UX Porting Center};
+
+@item
+@uref{ftp://sunsite.informatik.rwth-aachen.de/pub/packages/gcc_hpux/,,Binaries for HP-UX 11.00 at Aachen University of Technology}.
+@end itemize
+
+@item
+@uref{http://www.sco.com/skunkware/devtools/index.html#gcc,,SCO
+OpenServer/Unixware}.
+
+@item
+Solaris 2 (SPARC, Intel):
+@itemize
+@item
+@uref{http://www.sunfreeware.com/,,Sunfreeware}
+
+@item
+@uref{http://www.blastwave.org/,,Blastwave}
+
+@item
+@uref{http://www.opencsw.org/,,OpenCSW}
+
+@item
+@uref{http://jupiterrise.com/tgcware/,,TGCware}
+@end itemize
+
+@item
+SGI IRIX:
+@itemize
+@item
+@uref{http://nekochan.net/,,Nekoware}
+
+@item
+@uref{http://jupiterrise.com/tgcware/,,TGCware}
+@end itemize
+
+@item
+Microsoft Windows:
+@itemize
+@item
+The @uref{http://sourceware.org/cygwin/,,Cygwin} project;
+@item
+The @uref{http://www.mingw.org/,,MinGW} project.
+@end itemize
+
+@item
+@uref{ftp://ftp.thewrittenword.com/packages/by-name/,,The
+Written Word} offers binaries for
+AIX 4.3.3, 5.1 and 5.2,
+IRIX 6.5,
+Tru64 UNIX 4.0D and 5.1,
+GNU/Linux (i386),
+HP-UX 10.20, 11.00, and 11.11, and
+Solaris/SPARC 2.5.1, 2.6, 7, 8, 9 and 10.
+
+@item
+@uref{http://www.openpkg.org/,,OpenPKG} offers binaries for quite a
+number of platforms.
+
+@item
+The @uref{http://gcc.gnu.org/wiki/GFortranBinaries,,GFortran Wiki} has
+links to GNU Fortran binaries for several platforms.
+@end itemize
+
+@html
+<hr />
+<p>
+@end html
+@ifhtml
+@uref{./index.html,,Return to the GCC Installation page}
+@end ifhtml
+@end ifset
+
+@c ***Specific****************************************************************
+@ifnothtml
+@comment node-name,     next,          previous, up
+@node    Specific, Old, Binaries, Top
+@end ifnothtml
+@ifset specifichtml
+@ifnothtml
+@chapter Host/target specific installation notes for GCC
+@end ifnothtml
+@cindex Specific
+@cindex Specific installation notes
+@cindex Target specific installation
+@cindex Host specific installation
+@cindex Target specific installation notes
+
+Please read this document carefully @emph{before} installing the
+GNU Compiler Collection on your machine.
+
+Note that this list of install notes is @emph{not} a list of supported
+hosts or targets.  Not all supported hosts and targets are listed
+here, only the ones that require host-specific or target-specific
+information are.
+
+@ifhtml
+@itemize
+@item
+@uref{#alpha-x-x,,alpha*-*-*}
+@item
+@uref{#alpha-dec-osf51,,alpha*-dec-osf5.1}
+@item
+@uref{#arc-x-elf,,arc-*-elf}
+@item
+@uref{#arm-x-elf,,arm-*-elf}
+@item
+@uref{#avr,,avr}
+@item
+@uref{#bfin,,Blackfin}
+@item
+@uref{#dos,,DOS}
+@item
+@uref{#x-x-freebsd,,*-*-freebsd*}
+@item
+@uref{#h8300-hms,,h8300-hms}
+@item
+@uref{#hppa-hp-hpux,,hppa*-hp-hpux*}
+@item
+@uref{#hppa-hp-hpux10,,hppa*-hp-hpux10}
+@item
+@uref{#hppa-hp-hpux11,,hppa*-hp-hpux11}
+@item
+@uref{#x-x-linux-gnu,,*-*-linux-gnu}
+@item
+@uref{#ix86-x-linux,,i?86-*-linux*}
+@item
+@uref{#ix86-x-solaris289,,i?86-*-solaris2.[89]}
+@item
+@uref{#ix86-x-solaris210,,i?86-*-solaris2.10}
+@item
+@uref{#ia64-x-linux,,ia64-*-linux}
+@item
+@uref{#ia64-x-hpux,,ia64-*-hpux*}
+@item
+@uref{#x-ibm-aix,,*-ibm-aix*}
+@item
+@uref{#iq2000-x-elf,,iq2000-*-elf}
+@item
+@uref{#lm32-x-elf,,lm32-*-elf}
+@item
+@uref{#lm32-x-uclinux,,lm32-*-uclinux}
+@item
+@uref{#m32c-x-elf,,m32c-*-elf}
+@item
+@uref{#m32r-x-elf,,m32r-*-elf}
+@item
+@uref{#m6811-elf,,m6811-elf}
+@item
+@uref{#m6812-elf,,m6812-elf}
+@item
+@uref{#m68k-x-x,,m68k-*-*}
+@item
+@uref{#m68k-uclinux,,m68k-uclinux}
+@item
+@uref{#mep-x-elf,,mep-*-elf}
+@item
+@uref{#microblaze-x-elf,,microblaze-*-elf}
+@item
+@uref{#mips-x-x,,mips-*-*}
+@item
+@uref{#mips-sgi-irix5,,mips-sgi-irix5}
+@item
+@uref{#mips-sgi-irix6,,mips-sgi-irix6}
+@item
+@uref{#powerpc-x-x,,powerpc*-*-*}
+@item
+@uref{#powerpc-x-darwin,,powerpc-*-darwin*}
+@item
+@uref{#powerpc-x-elf,,powerpc-*-elf}
+@item
+@uref{#powerpc-x-linux-gnu,,powerpc*-*-linux-gnu*}
+@item
+@uref{#powerpc-x-netbsd,,powerpc-*-netbsd*}
+@item
+@uref{#powerpc-x-eabisim,,powerpc-*-eabisim}
+@item
+@uref{#powerpc-x-eabi,,powerpc-*-eabi}
+@item
+@uref{#powerpcle-x-elf,,powerpcle-*-elf}
+@item
+@uref{#powerpcle-x-eabisim,,powerpcle-*-eabisim}
+@item
+@uref{#powerpcle-x-eabi,,powerpcle-*-eabi}
+@item
+@uref{#s390-x-linux,,s390-*-linux*}
+@item
+@uref{#s390x-x-linux,,s390x-*-linux*}
+@item
+@uref{#s390x-ibm-tpf,,s390x-ibm-tpf*}
+@item
+@uref{#x-x-solaris2,,*-*-solaris2*}
+@item
+@uref{#sparc-x-x,,sparc*-*-*}
+@item
+@uref{#sparc-sun-solaris2,,sparc-sun-solaris2*}
+@item
+@uref{#sparc-sun-solaris210,,sparc-sun-solaris2.10}
+@item
+@uref{#sparc-x-linux,,sparc-*-linux*}
+@item
+@uref{#sparc64-x-solaris2,,sparc64-*-solaris2*}
+@item
+@uref{#sparcv9-x-solaris2,,sparcv9-*-solaris2*}
+@item
+@uref{#x-x-vxworks,,*-*-vxworks*}
+@item
+@uref{#x86-64-x-x,,x86_64-*-*, amd64-*-*}
+@item
+@uref{#xtensa-x-elf,,xtensa*-*-elf}
+@item
+@uref{#xtensa-x-linux,,xtensa*-*-linux*}
+@item
+@uref{#windows,,Microsoft Windows}
+@item
+@uref{#x-x-cygwin,,*-*-cygwin}
+@item
+@uref{#x-x-interix,,*-*-interix}
+@item
+@uref{#x-x-mingw32,,*-*-mingw32}
+@item
+@uref{#os2,,OS/2}
+@item
+@uref{#older,,Older systems}
+@end itemize
+
+@itemize
+@item
+@uref{#elf,,all ELF targets} (SVR4, Solaris 2, etc.)
+@end itemize
+@end ifhtml
+
+
+@html
+<!-- -------- host/target specific issues start here ---------------- -->
+<hr />
+@end html
+@heading @anchor{alpha-x-x}alpha*-*-*
+
+This section contains general configuration information for all
+alpha-based platforms using ELF (in particular, ignore this section for
+DEC OSF/1, Digital UNIX and Tru64 UNIX)@.  In addition to reading this
+section, please read all other sections that match your target.
+
+We require binutils 2.11.2 or newer.
+Previous binutils releases had a number of problems with DWARF 2
+debugging information, not the least of which is incorrect linking of
+shared libraries.
+
+@html
+<hr />
+@end html
+@heading @anchor{alpha-dec-osf51}alpha*-dec-osf5.1
+Systems using processors that implement the DEC Alpha architecture and
+are running the DEC/Compaq/HP Unix (DEC OSF/1, Digital UNIX, or Compaq/HP
+Tru64 UNIX) operating system, for example the DEC Alpha AXP systems.
+
+As of GCC 3.2, versions before @code{alpha*-dec-osf4} are no longer
+supported.  (These are the versions which identify themselves as DEC
+OSF/1.)  As of GCC 4.6, support for Tru64 UNIX V4.0 and V5.0 has been
+removed.
+
+On Tru64 UNIX, virtual memory exhausted bootstrap failures
+may be fixed by reconfiguring Kernel Virtual Memory and Swap parameters
+per the @command{/usr/sbin/sys_check} Tuning Suggestions,
+or applying the patch in
+@uref{http://gcc.gnu.org/ml/gcc/2002-08/msg00822.html}.  Depending on
+the OS version used, you need a data segment size between 512 MB and
+1 GB, so simply use @command{ulimit -Sd unlimited}.
+
+As of GNU binutils 2.21, neither GNU @command{as} nor GNU @command{ld}
+are supported on Tru64 UNIX, so you must not configure GCC with
+@option{--with-gnu-as} or @option{--with-gnu-ld}.
+
+GCC writes a @samp{.verstamp} directive to the assembler output file
+unless it is built as a cross-compiler.  It gets the version to use from
+the system header file @file{/usr/include/stamp.h}.  If you install a
+new version of Tru64 UNIX, you should rebuild GCC to pick up the new version
+stamp.
+
+GCC now supports both the native (ECOFF) debugging format used by DBX
+and GDB and an encapsulated STABS format for use only with GDB@.  See the
+discussion of the @option{--with-stabs} option of @file{configure} above
+for more information on these formats and how to select them.
+@c FIXME: does this work at all?  If so, perhaps make default.
+
+There is a bug in DEC's assembler that produces incorrect line numbers
+for ECOFF format when the @samp{.align} directive is used.  To work
+around this problem, GCC will not emit such alignment directives
+while writing ECOFF format debugging information even if optimization is
+being performed.  Unfortunately, this has the very undesirable
+side-effect that code addresses when @option{-O} is specified are
+different depending on whether or not @option{-g} is also specified.
+
+To avoid this behavior, specify @option{-gstabs+} and use GDB instead of
+DBX@.  DEC is now aware of this problem with the assembler and hopes to
+provide a fix shortly.
+
+@c FIXME: still applicable?
+
+@html
+<hr />
+@end html
+@heading @anchor{arc-x-elf}arc-*-elf
+Argonaut ARC processor.
+This configuration is intended for embedded systems.
+
+@html
+<hr />
+@end html
+@heading @anchor{arm-x-elf}arm-*-elf
+ARM-family processors.  Subtargets that use the ELF object format
+require GNU binutils 2.13 or newer.  Such subtargets include:
+@code{arm-*-freebsd}, @code{arm-*-netbsdelf}, @code{arm-*-*linux}
+and @code{arm-*-rtems}.
+
+@html
+<hr />
+@end html
+@heading @anchor{avr}avr
+
+ATMEL AVR-family micro controllers.  These are used in embedded
+applications.  There are no standard Unix configurations.
+@ifnothtml
+@xref{AVR Options,, AVR Options, gcc, Using the GNU Compiler
+Collection (GCC)},
+@end ifnothtml
+@ifhtml
+See ``AVR Options'' in the main manual
+@end ifhtml
+for the list of supported MCU types.
+
+Use @samp{configure --target=avr --enable-languages="c"} to configure GCC@.
+
+Further installation notes and other useful information about AVR tools
+can also be obtained from:
+
+@itemize @bullet
+@item
+@uref{http://www.nongnu.org/avr/,,http://www.nongnu.org/avr/}
+@item
+@uref{http://www.amelek.gda.pl/avr/,,http://www.amelek.gda.pl/avr/}
+@end itemize
+
+We @emph{strongly} recommend using binutils 2.13 or newer.
+
+The following error:
+@smallexample
+Error: register required
+@end smallexample
+
+indicates that you should upgrade to a newer version of the binutils.
+
+@html
+<hr />
+@end html
+@heading @anchor{bfin}Blackfin
+
+The Blackfin processor, an Analog Devices DSP.
+@ifnothtml
+@xref{Blackfin Options,, Blackfin Options, gcc, Using the GNU Compiler
+Collection (GCC)},
+@end ifnothtml
+@ifhtml
+See ``Blackfin Options'' in the main manual
+@end ifhtml
+
+More information, and a version of binutils with support for this processor,
+is available at @uref{http://blackfin.uclinux.org}
+
+@html
+<hr />
+@end html
+@heading @anchor{cris}CRIS
+
+CRIS is the CPU architecture in Axis Communications ETRAX system-on-a-chip
+series.  These are used in embedded applications.
+
+@ifnothtml
+@xref{CRIS Options,, CRIS Options, gcc, Using the GNU Compiler
+Collection (GCC)},
+@end ifnothtml
+@ifhtml
+See ``CRIS Options'' in the main manual
+@end ifhtml
+for a list of CRIS-specific options.
+
+There are a few different CRIS targets:
+@table @code
+@item cris-axis-elf
+Mainly for monolithic embedded systems.  Includes a multilib for the
+@samp{v10} core used in @samp{ETRAX 100 LX}.
+@item cris-axis-linux-gnu
+A GNU/Linux port for the CRIS architecture, currently targeting
+@samp{ETRAX 100 LX} by default.
+@end table
+
+For @code{cris-axis-elf} you need binutils 2.11
+or newer.  For @code{cris-axis-linux-gnu} you need binutils 2.12 or newer.
+
+Pre-packaged tools can be obtained from
+@uref{ftp://ftp.axis.com/@/pub/@/axis/@/tools/@/cris/@/compiler-kit/}.  More
+information about this platform is available at
+@uref{http://developer.axis.com/}.
+
+@html
+<hr />
+@end html
+@heading @anchor{crx}CRX
+
+The CRX CompactRISC architecture is a low-power 32-bit architecture with
+fast context switching and architectural extensibility features.
+
+@ifnothtml
+@xref{CRX Options,, CRX Options, gcc, Using and Porting the GNU Compiler
+Collection (GCC)},
+@end ifnothtml
+
+@ifhtml
+See ``CRX Options'' in the main manual for a list of CRX-specific options.
+@end ifhtml
+
+Use @samp{configure --target=crx-elf --enable-languages=c,c++} to configure
+GCC@ for building a CRX cross-compiler. The option @samp{--target=crx-elf}
+is also used to build the @samp{newlib} C library for CRX.
+
+It is also possible to build libstdc++-v3 for the CRX architecture. This
+needs to be done in a separate step with the following configure settings:
+
+@smallexample
+gcc/libstdc++-v3/configure --host=crx-elf --with-newlib \
+    --enable-sjlj-exceptions --enable-cxx-flags='-fexceptions -frtti'
+@end smallexample
+
+@html
+<hr />
+@end html
+@heading @anchor{dos}DOS
+
+Please have a look at the @uref{binaries.html,,binaries page}.
+
+You cannot install GCC by itself on MSDOS; it will not compile under
+any MSDOS compiler except itself.  You need to get the complete
+compilation package DJGPP, which includes binaries as well as sources,
+and includes all the necessary compilation tools and libraries.
+
+@html
+<hr />
+@end html
+@heading @anchor{x-x-freebsd}*-*-freebsd*
+
+Support for FreeBSD 1 was discontinued in GCC 3.2.  Support for
+FreeBSD 2 (and any mutant a.out variants of FreeBSD 3) was
+discontinued in GCC 4.0.
+
+In order to better utilize FreeBSD base system functionality and match
+the configuration of the system compiler, GCC 4.5 and above as well as
+GCC 4.4 past 2010-06-20 leverage SSP support in libc (which is present
+on FreeBSD 7 or later) and the use of @code{__cxa_atexit} by default
+(on FreeBSD 6 or later).  The use of @code{dl_iterate_phdr} inside
+@file{libgcc_s.so.1} and boehm-gc (on FreeBSD 7 or later) is enabled
+by GCC 4.5 and above.
+
+We support FreeBSD using the ELF file format with DWARF 2 debugging
+for all CPU architectures.  You may use @option{-gstabs} instead of
+@option{-g}, if you really want the old debugging format.  There are
+no known issues with mixing object files and libraries with different
+debugging formats.  Otherwise, this release of GCC should now match
+more of the configuration used in the stock FreeBSD configuration of
+GCC@.  In particular, @option{--enable-threads} is now configured by
+default.  However, as a general user, do not attempt to replace the
+system compiler with this release.  Known to bootstrap and check with
+good results on FreeBSD 7.2-STABLE@.  In the past, known to bootstrap
+and check with good results on FreeBSD 3.0, 3.4, 4.0, 4.2, 4.3, 4.4,
+4.5, 4.8, 4.9 and 5-CURRENT@.
+
+The version of binutils installed in @file{/usr/bin} probably works
+with this release of GCC@.  Bootstrapping against the latest GNU
+binutils and/or the version found in @file{/usr/ports/devel/binutils} has
+been known to enable additional features and improve overall testsuite
+results.  However, it is currently known that boehm-gc (which itself
+is required for java) may not configure properly on FreeBSD prior to
+the FreeBSD 7.0 release with GNU binutils after 2.16.1.
+
+@html
+<hr />
+@end html
+@heading @anchor{h8300-hms}h8300-hms
+Renesas H8/300 series of processors.
+
+Please have a look at the @uref{binaries.html,,binaries page}.
+
+The calling convention and structure layout has changed in release 2.6.
+All code must be recompiled.  The calling convention now passes the
+first three arguments in function calls in registers.  Structures are no
+longer a multiple of 2 bytes.
+
+@html
+<hr />
+@end html
+@heading @anchor{hppa-hp-hpux}hppa*-hp-hpux*
+Support for HP-UX version 9 and older was discontinued in GCC 3.4.
+
+We require using gas/binutils on all hppa platforms.  Version 2.19 or
+later is recommended.
+
+It may be helpful to configure GCC with the
+@uref{./configure.html#with-gnu-as,,@option{--with-gnu-as}} and
+@option{--with-as=@dots{}} options to ensure that GCC can find GAS@.
+
+The HP assembler should not be used with GCC.  It is rarely tested and may
+not work.  It shouldn't be used with any languages other than C due to its
+many limitations.
+
+Specifically, @option{-g} does not work (HP-UX uses a peculiar debugging
+format which GCC does not know about).  It also inserts timestamps
+into each object file it creates, causing the 3-stage comparison test to
+fail during a bootstrap.  You should be able to continue by saying
+@samp{make all-host all-target} after getting the failure from @samp{make}.
+
+Various GCC features are not supported.  For example, it does not support weak
+symbols or alias definitions.  As a result, explicit template instantiations
+are required when using C++.  This makes it difficult if not impossible to
+build many C++ applications.
+
+There are two default scheduling models for instructions.  These are
+PROCESSOR_7100LC and PROCESSOR_8000.  They are selected from the pa-risc
+architecture specified for the target machine when configuring.
+PROCESSOR_8000 is the default.  PROCESSOR_7100LC is selected when
+the target is a @samp{hppa1*} machine.
+
+The PROCESSOR_8000 model is not well suited to older processors.  Thus,
+it is important to completely specify the machine architecture when
+configuring if you want a model other than PROCESSOR_8000.  The macro
+TARGET_SCHED_DEFAULT can be defined in BOOT_CFLAGS if a different
+default scheduling model is desired.
+
+As of GCC 4.0, GCC uses the UNIX 95 namespace for HP-UX 10.10
+through 11.00, and the UNIX 98 namespace for HP-UX 11.11 and later.
+This namespace change might cause problems when bootstrapping with
+an earlier version of GCC or the HP compiler as essentially the same
+namespace is required for an entire build.  This problem can be avoided
+in a number of ways.  With HP cc, @env{UNIX_STD} can be set to @samp{95}
+or @samp{98}.  Another way is to add an appropriate set of predefines
+to @env{CC}.  The description for the @option{munix=} option contains
+a list of the predefines used with each standard.
+
+More specific information to @samp{hppa*-hp-hpux*} targets follows.
+
+@html
+<hr />
+@end html
+@heading @anchor{hppa-hp-hpux10}hppa*-hp-hpux10
+
+For hpux10.20, we @emph{highly} recommend you pick up the latest sed patch
+@code{PHCO_19798} from HP@.
+
+The C++ ABI has changed incompatibly in GCC 4.0.  COMDAT subspaces are
+used for one-only code and data.  This resolves many of the previous
+problems in using C++ on this target.  However, the ABI is not compatible
+with the one implemented under HP-UX 11 using secondary definitions.
+
+@html
+<hr />
+@end html
+@heading @anchor{hppa-hp-hpux11}hppa*-hp-hpux11
+
+GCC 3.0 and up support HP-UX 11.  GCC 2.95.x is not supported and cannot
+be used to compile GCC 3.0 and up.
+
+The libffi and libjava libraries haven't been ported to 64-bit HP-UX@
+and don't build.
+
+Refer to @uref{binaries.html,,binaries} for information about obtaining
+precompiled GCC binaries for HP-UX@.  Precompiled binaries must be obtained
+to build the Ada language as it can't be bootstrapped using C@.  Ada is
+only available for the 32-bit PA-RISC runtime.
+
+Starting with GCC 3.4 an ISO C compiler is required to bootstrap.  The
+bundled compiler supports only traditional C; you will need either HP's
+unbundled compiler, or a binary distribution of GCC@.
+
+It is possible to build GCC 3.3 starting with the bundled HP compiler,
+but the process requires several steps.  GCC 3.3 can then be used to
+build later versions.  The fastjar program contains ISO C code and
+can't be built with the HP bundled compiler.  This problem can be
+avoided by not building the Java language.  For example, use the
+@option{--enable-languages="c,c++,f77,objc"} option in your configure
+command.
+
+There are several possible approaches to building the distribution.
+Binutils can be built first using the HP tools.  Then, the GCC
+distribution can be built.  The second approach is to build GCC
+first using the HP tools, then build binutils, then rebuild GCC@.
+There have been problems with various binary distributions, so it
+is best not to start from a binary distribution.
+
+On 64-bit capable systems, there are two distinct targets.  Different
+installation prefixes must be used if both are to be installed on
+the same system.  The @samp{hppa[1-2]*-hp-hpux11*} target generates code
+for the 32-bit PA-RISC runtime architecture and uses the HP linker.
+The @samp{hppa64-hp-hpux11*} target generates 64-bit code for the
+PA-RISC 2.0 architecture.
+
+The script config.guess now selects the target type based on the compiler
+detected during configuration.  You must define @env{PATH} or @env{CC} so
+that configure finds an appropriate compiler for the initial bootstrap.
+When @env{CC} is used, the definition should contain the options that are
+needed whenever @env{CC} is used.
+
+Specifically, options that determine the runtime architecture must be
+in @env{CC} to correctly select the target for the build.  It is also
+convenient to place many other compiler options in @env{CC}.  For example,
+@env{CC="cc -Ac +DA2.0W -Wp,-H16376 -D_CLASSIC_TYPES -D_HPUX_SOURCE"}
+can be used to bootstrap the GCC 3.3 branch with the HP compiler in
+64-bit K&R/bundled mode.  The @option{+DA2.0W} option will result in
+the automatic selection of the @samp{hppa64-hp-hpux11*} target.  The
+macro definition table of cpp needs to be increased for a successful
+build with the HP compiler.  _CLASSIC_TYPES and _HPUX_SOURCE need to
+be defined when building with the bundled compiler, or when using the
+@option{-Ac} option.  These defines aren't necessary with @option{-Ae}.
+
+It is best to explicitly configure the @samp{hppa64-hp-hpux11*} target
+with the @option{--with-ld=@dots{}} option.  This overrides the standard
+search for ld.  The two linkers supported on this target require different
+commands.  The default linker is determined during configuration.  As a
+result, it's not possible to switch linkers in the middle of a GCC build.
+This has been reported to sometimes occur in unified builds of binutils
+and GCC@.
+
+A recent linker patch must be installed for the correct operation of
+GCC 3.3 and later.  @code{PHSS_26559} and @code{PHSS_24304} are the
+oldest linker patches that are known to work.  They are for HP-UX
+11.00 and 11.11, respectively.  @code{PHSS_24303}, the companion to
+@code{PHSS_24304}, might be usable but it hasn't been tested.  These
+patches have been superseded.  Consult the HP patch database to obtain
+the currently recommended linker patch for your system.
+
+The patches are necessary for the support of weak symbols on the
+32-bit port, and for the running of initializers and finalizers.  Weak
+symbols are implemented using SOM secondary definition symbols.  Prior
+to HP-UX 11, there are bugs in the linker support for secondary symbols.
+The patches correct a problem of linker core dumps creating shared
+libraries containing secondary symbols, as well as various other
+linking issues involving secondary symbols.
+
+GCC 3.3 uses the ELF DT_INIT_ARRAY and DT_FINI_ARRAY capabilities to
+run initializers and finalizers on the 64-bit port.  The 32-bit port
+uses the linker @option{+init} and @option{+fini} options for the same
+purpose.  The patches correct various problems with the +init/+fini
+options, including program core dumps.  Binutils 2.14 corrects a
+problem on the 64-bit port resulting from HP's non-standard use of
+the .init and .fini sections for array initializers and finalizers.
+
+Although the HP and GNU linkers are both supported for the
+@samp{hppa64-hp-hpux11*} target, it is strongly recommended that the
+HP linker be used for link editing on this target.
+
+At this time, the GNU linker does not support the creation of long
+branch stubs.  As a result, it can't successfully link binaries
+containing branch offsets larger than 8 megabytes.  In addition,
+there are problems linking shared libraries, linking executables
+with @option{-static}, and with dwarf2 unwind and exception support.
+It also doesn't provide stubs for internal calls to global functions
+in shared libraries, so these calls can't be overloaded.
+
+The HP dynamic loader does not support GNU symbol versioning, so symbol
+versioning is not supported.  It may be necessary to disable symbol
+versioning with @option{--disable-symvers} when using GNU ld.
+
+POSIX threads are the default.  The optional DCE thread library is not
+supported, so @option{--enable-threads=dce} does not work.
+
+@html
+<hr />
+@end html
+@heading @anchor{x-x-linux-gnu}*-*-linux-gnu
+
+Versions of libstdc++-v3 starting with 3.2.1 require bug fixes present
+in glibc 2.2.5 and later.  More information is available in the
+libstdc++-v3 documentation.
+
+@html
+<hr />
+@end html
+@heading @anchor{ix86-x-linux}i?86-*-linux*
+
+As of GCC 3.3, binutils 2.13.1 or later is required for this platform.
+See @uref{http://gcc.gnu.org/PR10877,,bug 10877} for more information.
+
+If you receive Signal 11 errors when building on GNU/Linux, then it is
+possible you have a hardware problem.  Further information on this can be
+found on @uref{http://www.bitwizard.nl/sig11/,,www.bitwizard.nl}.
+
+@html
+<hr />
+@end html
+@heading @anchor{ix86-x-solaris289}i?86-*-solaris2.[89]
+The Sun assembler in Solaris 8 and 9 has several bugs and limitations.
+While GCC works around them, several features are missing, so it is
+@c FIXME: which ones?
+recommended to use the GNU assembler instead.  There is no bundled
+version, but the current version, from GNU binutils 2.21, is known to
+work.
+
+Solaris@tie{}2/x86 doesn't support the execution of SSE/SSE2 instructions
+before Solaris@tie{}9 4/04, even if the CPU supports them.  Programs will
+receive @code{SIGILL} if they try.  The fix is available both in
+Solaris@tie{}9 Update@tie{}6 and kernel patch 112234-12 or newer.  There is no
+corresponding patch for Solaris 8.  To avoid this problem,
+@option{-march} defaults to @samp{pentiumpro} on Solaris 8 and 9.  If
+you have the patch installed, you can configure GCC with an appropriate
+@option{--with-arch} option, but need GNU @command{as} for SSE2 support.
+
+@html
+<hr />
+@end html
+@heading @anchor{ix86-x-solaris210}i?86-*-solaris2.10
+Use this for Solaris 10 or later on x86 and x86-64 systems.  This
+configuration is supported by GCC 4.0 and later versions only.  Unlike
+@samp{sparcv9-sun-solaris2*}, there is no corresponding 64-bit
+configuration like @samp{amd64-*-solaris2*} or @samp{x86_64-*-solaris2*}.
+@c FIXME: will there ever be?
+
+It is recommended that you configure GCC to use the GNU assembler, in
+@file{/usr/sfw/bin/gas}.  The versions included in Solaris 10, from GNU
+binutils 2.15, and Solaris 11, from GNU binutils 2.19, work fine,
+although the current version, from GNU binutils
+2.21, is known to work, too.  Recent versions of the Sun assembler in
+@file{/usr/ccs/bin/as} work almost as well, though.
+@c FIXME: as patch requirements?
+
+For linking, the Sun linker, is preferred.  If you want to use the GNU
+linker instead, which is available in @file{/usr/sfw/bin/gld}, note that
+due to a packaging bug the version in Solaris 10, from GNU binutils
+2.15, cannot be used, while the version in Solaris 11, from GNU binutils
+2.19, works, as does the latest version, from GNU binutils 2.21.
+
+To use GNU @command{as}, configure with the options
+@option{--with-gnu-as --with-as=@//usr/@/sfw/@/bin/@/gas}.  It may be necessary
+to configure with @option{--without-gnu-ld --with-ld=@//usr/@/ccs/@/bin/@/ld} to
+guarantee use of Sun @command{ld}.
+@c FIXME: why --without-gnu-ld --with-ld?
+
+@html
+<hr />
+@end html
+@heading @anchor{ia64-x-linux}ia64-*-linux
+IA-64 processor (also known as IPF, or Itanium Processor Family)
+running GNU/Linux.
+
+If you are using the installed system libunwind library with
+@option{--with-system-libunwind}, then you must use libunwind 0.98 or
+later.
+
+None of the following versions of GCC has an ABI that is compatible
+with any of the other versions in this list, with the exception that
+Red Hat 2.96 and Trillian 000171 are compatible with each other:
+3.1, 3.0.2, 3.0.1, 3.0, Red Hat 2.96, and Trillian 000717.
+This primarily affects C++ programs and programs that create shared libraries.
+GCC 3.1 or later is recommended for compiling linux, the kernel.
+As of version 3.1 GCC is believed to be fully ABI compliant, and hence no
+more major ABI changes are expected.
+
+@html
+<hr />
+@end html
+@heading @anchor{ia64-x-hpux}ia64-*-hpux*
+Building GCC on this target requires the GNU Assembler.  The bundled HP
+assembler will not work.  To prevent GCC from using the wrong assembler,
+the option @option{--with-gnu-as} may be necessary.
+
+The GCC libunwind library has not been ported to HPUX@.  This means that for
+GCC versions 3.2.3 and earlier, @option{--enable-libunwind-exceptions}
+is required to build GCC@.  For GCC 3.3 and later, this is the default.
+For gcc 3.4.3 and later, @option{--enable-libunwind-exceptions} is
+removed and the system libunwind library will always be used.
+
+@html
+<hr />
+<!-- rs6000-ibm-aix*, powerpc-ibm-aix* -->
+@end html
+@heading @anchor{x-ibm-aix}*-ibm-aix*
+Support for AIX version 3 and older was discontinued in GCC 3.4.
+Support for AIX version 4.2 and older was discontinued in GCC 4.5.
+
+``out of memory'' bootstrap failures may indicate a problem with
+process resource limits (ulimit).  Hard limits are configured in the
+@file{/etc/security/limits} system configuration file.
+
+GCC can bootstrap with recent versions of IBM XLC, but bootstrapping
+with an earlier release of GCC is recommended.  Bootstrapping with XLC
+requires a larger data segment, which can be enabled through the
+@var{LDR_CNTRL} environment variable, e.g.,
+
+@smallexample
+% LDR_CNTRL=MAXDATA=0x50000000
+% export LDR_CNTRL
+@end smallexample
+
+One can start with a pre-compiled version of GCC to build from
+sources.  One may delete GCC's ``fixed'' header files when starting
+with a version of GCC built for an earlier release of AIX.
+
+To speed up the configuration phases of bootstrapping and installing GCC,
+one may use GNU Bash instead of AIX @command{/bin/sh}, e.g.,
+
+@smallexample
+% CONFIG_SHELL=/opt/freeware/bin/bash
+% export CONFIG_SHELL
+@end smallexample
+
+and then proceed as described in @uref{build.html,,the build
+instructions}, where we strongly recommend specifying an absolute path
+to invoke @var{srcdir}/configure.
+
+Because GCC on AIX is built as a 32-bit executable by default,
+(although it can generate 64-bit programs) the GMP and MPFR libraries
+required by gfortran must be 32-bit libraries.  Building GMP and MPFR
+as static archive libraries works better than shared libraries.
+
+Errors involving @code{alloca} when building GCC generally are due
+to an incorrect definition of @code{CC} in the Makefile or mixing files
+compiled with the native C compiler and GCC@.  During the stage1 phase of
+the build, the native AIX compiler @strong{must} be invoked as @command{cc}
+(not @command{xlc}).  Once @command{configure} has been informed of
+@command{xlc}, one needs to use @samp{make distclean} to remove the
+configure cache files and ensure that @env{CC} environment variable
+does not provide a definition that will confuse @command{configure}.
+If this error occurs during stage2 or later, then the problem most likely
+is the version of Make (see above).
+
+The native @command{as} and @command{ld} are recommended for bootstrapping
+on AIX@.  The GNU Assembler, GNU Linker, and GNU Binutils version 2.20
+is required to bootstrap on AIX 5@.  The native AIX tools do
+interoperate with GCC@.
+
+Building @file{libstdc++.a} requires a fix for an AIX Assembler bug
+APAR IY26685 (AIX 4.3) or APAR IY25528 (AIX 5.1).  It also requires a
+fix for another AIX Assembler bug and a co-dependent AIX Archiver fix
+referenced as APAR IY53606 (AIX 5.2) or as APAR IY54774 (AIX 5.1)
+
+@samp{libstdc++} in GCC 3.4 increments the major version number of the
+shared object and GCC installation places the @file{libstdc++.a}
+shared library in a common location which will overwrite the and GCC
+3.3 version of the shared library.  Applications either need to be
+re-linked against the new shared library or the GCC 3.1 and GCC 3.3
+versions of the @samp{libstdc++} shared object needs to be available
+to the AIX runtime loader.  The GCC 3.1 @samp{libstdc++.so.4}, if
+present, and GCC 3.3 @samp{libstdc++.so.5} shared objects can be
+installed for runtime dynamic loading using the following steps to set
+the @samp{F_LOADONLY} flag in the shared object for @emph{each}
+multilib @file{libstdc++.a} installed:
+
+Extract the shared objects from the currently installed
+@file{libstdc++.a} archive:
+@smallexample
+% ar -x libstdc++.a libstdc++.so.4 libstdc++.so.5
+@end smallexample
+
+Enable the @samp{F_LOADONLY} flag so that the shared object will be
+available for runtime dynamic loading, but not linking:
+@smallexample
+% strip -e libstdc++.so.4 libstdc++.so.5
+@end smallexample
+
+Archive the runtime-only shared object in the GCC 3.4
+@file{libstdc++.a} archive:
+@smallexample
+% ar -q libstdc++.a libstdc++.so.4 libstdc++.so.5
+@end smallexample
+
+Linking executables and shared libraries may produce warnings of
+duplicate symbols.  The assembly files generated by GCC for AIX always
+have included multiple symbol definitions for certain global variable
+and function declarations in the original program.  The warnings should
+not prevent the linker from producing a correct library or runnable
+executable.
+
+AIX 4.3 utilizes a ``large format'' archive to support both 32-bit and
+64-bit object modules.  The routines provided in AIX 4.3.0 and AIX 4.3.1
+to parse archive libraries did not handle the new format correctly.
+These routines are used by GCC and result in error messages during
+linking such as ``not a COFF file''.  The version of the routines shipped
+with AIX 4.3.1 should work for a 32-bit environment.  The @option{-g}
+option of the archive command may be used to create archives of 32-bit
+objects using the original ``small format''.  A correct version of the
+routines is shipped with AIX 4.3.2 and above.
+
+Some versions of the AIX binder (linker) can fail with a relocation
+overflow severe error when the @option{-bbigtoc} option is used to link
+GCC-produced object files into an executable that overflows the TOC@.  A fix
+for APAR IX75823 (OVERFLOW DURING LINK WHEN USING GCC AND -BBIGTOC) is
+available from IBM Customer Support and from its
+@uref{http://techsupport.services.ibm.com/,,techsupport.services.ibm.com}
+website as PTF U455193.
+
+The AIX 4.3.2.1 linker (bos.rte.bind_cmds Level 4.3.2.1) will dump core
+with a segmentation fault when invoked by any version of GCC@.  A fix for
+APAR IX87327 is available from IBM Customer Support and from its
+@uref{http://techsupport.services.ibm.com/,,techsupport.services.ibm.com}
+website as PTF U461879.  This fix is incorporated in AIX 4.3.3 and above.
+
+The initial assembler shipped with AIX 4.3.0 generates incorrect object
+files.  A fix for APAR IX74254 (64BIT DISASSEMBLED OUTPUT FROM COMPILER FAILS
+TO ASSEMBLE/BIND) is available from IBM Customer Support and from its
+@uref{http://techsupport.services.ibm.com/,,techsupport.services.ibm.com}
+website as PTF U453956.  This fix is incorporated in AIX 4.3.1 and above.
+
+AIX provides National Language Support (NLS)@.  Compilers and assemblers
+use NLS to support locale-specific representations of various data
+formats including floating-point numbers (e.g., @samp{.}  vs @samp{,} for
+separating decimal fractions).  There have been problems reported where
+GCC does not produce the same floating-point formats that the assembler
+expects.  If one encounters this problem, set the @env{LANG}
+environment variable to @samp{C} or @samp{En_US}.
+
+A default can be specified with the @option{-mcpu=@var{cpu_type}}
+switch and using the configure option @option{--with-cpu-@var{cpu_type}}.
+
+@html
+<hr />
+@end html
+@heading @anchor{iq2000-x-elf}iq2000-*-elf
+Vitesse IQ2000 processors.  These are used in embedded
+applications.  There are no standard Unix configurations.
+
+@html
+<hr />
+@end html
+@heading @anchor{lm32-x-elf}lm32-*-elf
+Lattice Mico32 processor.
+This configuration is intended for embedded systems.
+
+@html
+<hr />
+@end html
+@heading @anchor{lm32-x-uclinux}lm32-*-uclinux
+Lattice Mico32 processor.
+This configuration is intended for embedded systems running uClinux.
+
+@html
+<hr />
+@end html
+@heading @anchor{m32c-x-elf}m32c-*-elf
+Renesas M32C processor.
+This configuration is intended for embedded systems.
+
+@html
+<hr />
+@end html
+@heading @anchor{m32r-x-elf}m32r-*-elf
+Renesas M32R processor.
+This configuration is intended for embedded systems.
+
+@html
+<hr />
+@end html
+@heading @anchor{m6811-elf}m6811-elf
+Motorola 68HC11 family micro controllers.  These are used in embedded
+applications.  There are no standard Unix configurations.
+
+@html
+<hr />
+@end html
+@heading @anchor{m6812-elf}m6812-elf
+Motorola 68HC12 family micro controllers.  These are used in embedded
+applications.  There are no standard Unix configurations.
+
+@html
+<hr />
+@end html
+@heading @anchor{m68k-x-x}m68k-*-*
+By default,
+@samp{m68k-*-elf*}, @samp{m68k-*-rtems},  @samp{m68k-*-uclinux} and
+@samp{m68k-*-linux}
+build libraries for both M680x0 and ColdFire processors.  If you only
+need the M680x0 libraries, you can omit the ColdFire ones by passing
+@option{--with-arch=m68k} to @command{configure}.  Alternatively, you
+can omit the M680x0 libraries by passing @option{--with-arch=cf} to
+@command{configure}.  These targets default to 5206 or 5475 code as
+appropriate for the target system when
+configured with @option{--with-arch=cf} and 68020 code otherwise.
+
+The @samp{m68k-*-netbsd} and
+@samp{m68k-*-openbsd} targets also support the @option{--with-arch}
+option.  They will generate ColdFire CFV4e code when configured with
+@option{--with-arch=cf} and 68020 code otherwise.
+
+You can override the default processors listed above by configuring
+with @option{--with-cpu=@var{target}}.  This @var{target} can either
+be a @option{-mcpu} argument or one of the following values:
+@samp{m68000}, @samp{m68010}, @samp{m68020}, @samp{m68030},
+@samp{m68040}, @samp{m68060}, @samp{m68020-40} and @samp{m68020-60}.
+
+@html
+<hr />
+@end html
+@heading @anchor{m68k-x-uclinux}m68k-*-uclinux
+GCC 4.3 changed the uClinux configuration so that it uses the
+@samp{m68k-linux-gnu} ABI rather than the @samp{m68k-elf} ABI.
+It also added improved support for C++ and flat shared libraries,
+both of which were ABI changes.  However, you can still use the
+original ABI by configuring for @samp{m68k-uclinuxoldabi} or
+@samp{m68k-@var{vendor}-uclinuxoldabi}.
+
+
+@html
+<hr />
+@end html
+@heading @anchor{mep-x-elf}mep-*-elf
+Toshiba Media embedded Processor.
+This configuration is intended for embedded systems.
+
+@html
+<hr />
+@end html
+@heading @anchor{microblaze-x-elf}microblaze-*-elf
+Xilinx MicroBlaze processor.
+This configuration is intended for embedded systems.
+
+@html
+<hr />
+@end html
+@heading @anchor{mips-x-x}mips-*-*
+If on a MIPS system you get an error message saying ``does not have gp
+sections for all it's [sic] sectons [sic]'', don't worry about it.  This
+happens whenever you use GAS with the MIPS linker, but there is not
+really anything wrong, and it is okay to use the output file.  You can
+stop such warnings by installing the GNU linker.
+
+It would be nice to extend GAS to produce the gp tables, but they are
+optional, and there should not be a warning about their absence.
+
+The libstdc++ atomic locking routines for MIPS targets requires MIPS II
+and later.  A patch went in just after the GCC 3.3 release to
+make @samp{mips*-*-*} use the generic implementation instead.  You can also
+configure for @samp{mipsel-elf} as a workaround.  The
+@samp{mips*-*-linux*} target continues to use the MIPS II routines.  More
+work on this is expected in future releases.
+
+@c If you make --with-llsc the default for another target, please also
+@c update the description of the --with-llsc option.
+
+The built-in @code{__sync_*} functions are available on MIPS II and
+later systems and others that support the @samp{ll}, @samp{sc} and
+@samp{sync} instructions.  This can be overridden by passing
+@option{--with-llsc} or @option{--without-llsc} when configuring GCC.
+Since the Linux kernel emulates these instructions if they are
+missing, the default for @samp{mips*-*-linux*} targets is
+@option{--with-llsc}.  The @option{--with-llsc} and
+@option{--without-llsc} configure options may be overridden at compile
+time by passing the @option{-mllsc} or @option{-mno-llsc} options to
+the compiler.
+
+MIPS systems check for division by zero (unless
+@option{-mno-check-zero-division} is passed to the compiler) by
+generating either a conditional trap or a break instruction.  Using
+trap results in smaller code, but is only supported on MIPS II and
+later.  Also, some versions of the Linux kernel have a bug that
+prevents trap from generating the proper signal (@code{SIGFPE}).  To enable
+the use of break, use the @option{--with-divide=breaks}
+@command{configure} option when configuring GCC@.  The default is to
+use traps on systems that support them.
+
+Cross-compilers for the MIPS as target using the MIPS assembler
+currently do not work, because the auxiliary programs
+@file{mips-tdump.c} and @file{mips-tfile.c} can't be compiled on
+anything but a MIPS@.  It does work to cross compile for a MIPS
+if you use the GNU assembler and linker.
+
+The assembler from GNU binutils 2.17 and earlier has a bug in the way
+it sorts relocations for REL targets (o32, o64, EABI).  This can cause
+bad code to be generated for simple C++ programs.  Also the linker
+from GNU binutils versions prior to 2.17 has a bug which causes the
+runtime linker stubs in very large programs, like @file{libgcj.so}, to
+be incorrectly generated.  GNU Binutils 2.18 and later (and snapshots
+made after Nov. 9, 2006) should be free from both of these problems.
+
+@html
+<hr />
+@end html
+@heading @anchor{mips-sgi-irix5}mips-sgi-irix5
+
+Support for IRIX 5 has been removed in GCC 4.6.
+
+@html
+<hr />
+@end html
+@heading @anchor{mips-sgi-irix6}mips-sgi-irix6
+
+Support for IRIX 6 releases before 6.5 has been removed in GCC 4.6, as
+well as support for
+the O32 ABI.  It is @emph{strongly} recommended to upgrade to at least
+IRIX 6.5.18.  This release introduced full ISO C99 support, though for
+the N32 and N64 ABIs only.
+
+To build and use GCC on IRIX 6.5, you need the IRIX Development Foundation
+(IDF) and IRIX Development Libraries (IDL).  They are included with the
+IRIX 6.5 media.
+
+If you are using SGI's MIPSpro @command{cc} as your bootstrap compiler, you must
+ensure that the N32 ABI is in use.  To test this, compile a simple C
+file with @command{cc} and then run @command{file} on the
+resulting object file.  The output should look like:
+
+@smallexample
+test.o: ELF N32 MSB @dots{}
+@end smallexample
+
+@noindent
+If you see:
+
+@smallexample
+test.o: ELF 32-bit MSB @dots{}
+@end smallexample
+
+@noindent
+or
+
+@smallexample
+test.o: ELF 64-bit MSB @dots{}
+@end smallexample
+
+@noindent
+then your version of @command{cc} uses the O32 or N64 ABI by default.  You
+should set the environment variable @env{CC} to @samp{cc -n32}
+before configuring GCC@.
+
+If you want the resulting @command{gcc} to run on old 32-bit systems
+with the MIPS R4400 CPU, you need to ensure that only code for the @samp{mips3}
+instruction set architecture (ISA) is generated.  While GCC 3.x does
+this correctly, both GCC 2.95 and SGI's MIPSpro @command{cc} may change
+the ISA depending on the machine where GCC is built.  Using one of them
+as the bootstrap compiler may result in @samp{mips4} code, which won't run at
+all on @samp{mips3}-only systems.  For the test program above, you should see:
+
+@smallexample
+test.o: ELF N32 MSB mips-3 @dots{}
+@end smallexample
+
+@noindent
+If you get:
+
+@smallexample
+test.o: ELF N32 MSB mips-4 @dots{}
+@end smallexample
+
+@noindent
+instead, you should set the environment variable @env{CC} to @samp{cc
+-n32 -mips3} or @samp{gcc -mips3} respectively before configuring GCC@.
+
+MIPSpro C 7.4 may cause bootstrap failures, due to a bug when inlining
+@code{memcmp}.  Either add @code{-U__INLINE_INTRINSICS} to the @env{CC}
+environment variable as a workaround or upgrade to MIPSpro C 7.4.1m.
+
+GCC on IRIX 6.5 is usually built to support the N32 and N64 ABIs.  If
+you build GCC on a system that doesn't have the N64 libraries installed
+or cannot run 64-bit binaries,
+you need to configure with @option{--disable-multilib} so GCC doesn't
+try to use them.
+Look for @file{/usr/lib64/libc.so.1} to see if you
+have the 64-bit libraries installed.
+
+GCC must be configured with GNU @command{as}.  The latest version, from GNU
+binutils 2.21, is known to work.  On the other hand, bootstrap fails
+with GNU @command{ld} at least since GNU binutils 2.17.
+
+The @option{--enable-libgcj}
+option is disabled by default: IRIX 6 uses a very low default limit
+(20480) for the command line length.  Although @command{libtool} contains a
+workaround for this problem, at least the N64 @samp{libgcj} is known not
+to build despite this, running into an internal error of the native
+@command{ld}.  A sure fix is to increase this limit (@samp{ncargs}) to
+its maximum of 262144 bytes.  If you have root access, you can use the
+@command{systune} command to do this.
+@c FIXME: does this work with current libtool?
+
+@code{wchar_t} support in @samp{libstdc++} is not available for old
+IRIX 6.5.x releases, @math{x < 19}.  The problem cannot be autodetected
+and in order to build GCC for such targets you need to configure with
+@option{--disable-wchar_t}.
+
+@html
+<hr />
+@end html
+@heading @anchor{moxie-x-elf}moxie-*-elf
+The moxie processor.  See @uref{http://moxielogic.org/} for more
+information about this processor.
+
+@html
+<hr />
+@end html
+@heading @anchor{powerpc-x-x}powerpc-*-*
+
+You can specify a default version for the @option{-mcpu=@var{cpu_type}}
+switch by using the configure option @option{--with-cpu-@var{cpu_type}}.
+
+You will need
+@uref{ftp://ftp.kernel.org/pub/linux/devel/binutils,,binutils 2.15}
+or newer for a working GCC@.
+
+@html
+<hr />
+@end html
+@heading @anchor{powerpc-x-darwin}powerpc-*-darwin*
+PowerPC running Darwin (Mac OS X kernel).
+
+Pre-installed versions of Mac OS X may not include any developer tools,
+meaning that you will not be able to build GCC from source.  Tool
+binaries are available at
+@uref{http://opensource.apple.com/}.
+
+This version of GCC requires at least cctools-590.36.  The
+cctools-590.36 package referenced from
+@uref{http://gcc.gnu.org/ml/gcc/2006-03/msg00507.html} will not work
+on systems older than 10.3.9 (aka darwin7.9.0).
+
+@html
+<hr />
+@end html
+@heading @anchor{powerpc-x-elf}powerpc-*-elf
+PowerPC system in big endian mode, running System V.4.
+
+@html
+<hr />
+@end html
+@heading @anchor{powerpc-x-linux-gnu}powerpc*-*-linux-gnu*
+
+PowerPC system in big endian mode running Linux.
+
+@html
+<hr />
+@end html
+@heading @anchor{powerpc-x-netbsd}powerpc-*-netbsd*
+PowerPC system in big endian mode running NetBSD@.
+
+@html
+<hr />
+@end html
+@heading @anchor{powerpc-x-eabisim}powerpc-*-eabisim
+Embedded PowerPC system in big endian mode for use in running under the
+PSIM simulator.
+
+@html
+<hr />
+@end html
+@heading @anchor{powerpc-x-eabi}powerpc-*-eabi
+Embedded PowerPC system in big endian mode.
+
+@html
+<hr />
+@end html
+@heading @anchor{powerpcle-x-elf}powerpcle-*-elf
+PowerPC system in little endian mode, running System V.4.
+
+@html
+<hr />
+@end html
+@heading @anchor{powerpcle-x-eabisim}powerpcle-*-eabisim
+Embedded PowerPC system in little endian mode for use in running under
+the PSIM simulator.
+
+@html
+<hr />
+@end html
+@heading @anchor{powerpcle-x-eabi}powerpcle-*-eabi
+Embedded PowerPC system in little endian mode.
+
+@html
+<hr />
+@end html
+@heading @anchor{rx-x-elf}rx-*-elf
+The Renesas RX processor.  See
+@uref{http://eu.renesas.com/fmwk.jsp?cnt=rx600_series_landing.jsp&fp=/products/mpumcu/rx_family/rx600_series}
+for more information about this processor.
+
+@html
+<hr />
+@end html
+@heading @anchor{s390-x-linux}s390-*-linux*
+S/390 system running GNU/Linux for S/390@.
+
+@html
+<hr />
+@end html
+@heading @anchor{s390x-x-linux}s390x-*-linux*
+zSeries system (64-bit) running GNU/Linux for zSeries@.
+
+@html
+<hr />
+@end html
+@heading @anchor{s390x-ibm-tpf}s390x-ibm-tpf*
+zSeries system (64-bit) running TPF@.  This platform is
+supported as cross-compilation target only.
+
+@html
+<hr />
+@end html
+@c Please use Solaris 2 to refer to all release of Solaris, starting
+@c with 2.0 until 2.6, 7, 8, etc.  Solaris 1 was a marketing name for
+@c SunOS 4 releases which we don't use to avoid confusion.  Solaris
+@c alone is too unspecific and must be avoided.
+@heading @anchor{x-x-solaris2}*-*-solaris2*
+
+Support for Solaris 7 has been removed in GCC 4.6.
+
+Sun does not ship a C compiler with Solaris 2, though you can download
+the Sun Studio compilers for free.  Alternatively,
+you can install a pre-built GCC to bootstrap and install GCC.  See the
+@uref{binaries.html,,binaries page} for details.
+
+The Solaris 2 @command{/bin/sh} will often fail to configure
+@samp{libstdc++-v3}, @samp{boehm-gc} or @samp{libjava}.  We therefore
+recommend using the following initial sequence of commands
+
+@smallexample
+% CONFIG_SHELL=/bin/ksh
+% export CONFIG_SHELL
+@end smallexample
+
+@noindent
+and proceed as described in @uref{configure.html,,the configure instructions}.
+In addition we strongly recommend specifying an absolute path to invoke
+@command{@var{srcdir}/configure}.
+
+Solaris 2 comes with a number of optional OS packages.  Some of these
+are needed to use GCC fully, namely @code{SUNWarc},
+@code{SUNWbtool}, @code{SUNWesu}, @code{SUNWhea}, @code{SUNWlibm},
+@code{SUNWsprot}, and @code{SUNWtoo}.  If you did not install all
+optional packages when installing Solaris 2, you will need to verify that
+the packages that GCC needs are installed.
+
+To check whether an optional package is installed, use
+the @command{pkginfo} command.  To add an optional package, use the
+@command{pkgadd} command.  For further details, see the Solaris 2
+documentation.
+
+Trying to use the linker and other tools in
+@file{/usr/ucb} to install GCC has been observed to cause trouble.
+For example, the linker may hang indefinitely.  The fix is to remove
+@file{/usr/ucb} from your @env{PATH}.
+
+The build process works more smoothly with the legacy Sun tools so, if you
+have @file{/usr/xpg4/bin} in your @env{PATH}, we recommend that you place
+@file{/usr/bin} before @file{/usr/xpg4/bin} for the duration of the build.
+
+We recommend the use of the Sun assembler or the GNU assembler, in
+conjunction with the Sun linker.  The GNU @command{as}
+versions included in Solaris 10, from GNU binutils 2.15, and Solaris 11,
+from GNU binutils 2.19, are known to work.  They can be found in
+@file{/usr/sfw/bin/gas}.  Current versions of GNU binutils (2.21)
+are known to work as well.  Note that your mileage may vary
+if you use a combination of the GNU tools and the Sun tools: while the
+combination GNU @command{as} + Sun @command{ld} should reasonably work,
+the reverse combination Sun @command{as} + GNU @command{ld} is known to
+cause memory corruption at runtime in some cases for C++ programs.
+@c FIXME: still?
+GNU @command{ld} usually works as well, although the version included in
+Solaris 10 cannot be used due to several bugs.  Again, the current
+version (2.21) is known to work, but generally lacks platform specific
+features, so better stay with Sun @command{ld}.
+
+To enable symbol versioning in @samp{libstdc++} with Sun @command{ld},
+you need to have any version of GNU @command{c++filt}, which is part of
+GNU binutils.  @samp{libstdc++} symbol versioning will be disabled if no
+appropriate version is found.  Sun @command{c++filt} from the Sun Studio
+compilers does @emph{not} work.
+
+Sun bug 4296832 turns up when compiling X11 headers with GCC 2.95 or
+newer: @command{g++} will complain that types are missing.  These headers
+assume that omitting the type means @code{int}; this assumption worked for
+C90 but is wrong for C++, and is now wrong for C99 also.
+
+@command{g++} accepts such (invalid) constructs with the option
+@option{-fpermissive}; it will assume that any missing type is @code{int}
+(as defined by C90).
+
+There are patches for Solaris 8 (108652-24 or newer for SPARC,
+108653-22 for Intel) that fix this bug.
+
+Sun bug 4927647 sometimes causes random spurious testsuite failures
+related to missing diagnostic output.  This bug doesn't affect GCC
+itself, rather it is a kernel bug triggered by the @command{expect}
+program which is used only by the GCC testsuite driver.  When the bug
+causes the @command{expect} program to miss anticipated output, extra
+testsuite failures appear.
+
+There are patches for Solaris 8 (117350-12 or newer for SPARC,
+117351-12 or newer for Intel) and Solaris 9 (117171-11 or newer for
+SPARC, 117172-11 or newer for Intel) that address this problem.
+
+Solaris@tie{}8 provides an alternate implementation of the thread libraries,
+@samp{libpthread} and @samp{libthread}.  They are required for TLS
+support and have been made the default in Solaris@tie{}9, so they are always
+used on Solaris@tie{}8.
+
+Thread-local storage (TLS) is supported in Solaris@tie{}8 and 9, but requires
+some patches.  The @samp{libthread} patches provide the
+@code{__tls_get_addr} (SPARC, 64-bit x86) resp.@ @code{___tls_get_addr}
+(32-bit x86) functions.  On Solaris@tie{}8, you need 108993-26 or newer on
+SPARC, 108994-26 or newer on Intel.  On Solaris@tie{}9, the necessary support
+on SPARC is present since FCS, while 114432-05 or newer is required on
+Intel.  Additionally, on Solaris@tie{}8, patch 109147-14 or newer on SPARC or
+109148-22 or newer on Intel are required for the Sun @command{ld} and
+runtime linker (@command{ld.so.1}) support.  Again, Solaris@tie{}9/SPARC
+works since FCS, while 113986-02 is required on Intel.  The linker
+patches must be installed even if GNU @command{ld} is used. Sun
+@command{as} in Solaris@tie{}8 and 9 doesn't support the necessary
+relocations, so GNU @command{as} must be used.  The @command{configure}
+script checks for those prerequisites and automatically enables TLS
+support if they are met.  Although those minimal patch versions should
+work, it is recommended to use the latest patch versions which include
+additional bug fixes.
+
+@html
+<hr />
+@end html
+@heading @anchor{sparc-x-x}sparc*-*-*
+
+This section contains general configuration information for all
+SPARC-based platforms.  In addition to reading this section, please
+read all other sections that match your target.
+
+Newer versions of the GNU Multiple Precision Library (GMP), the MPFR
+library and the MPC library are known to be miscompiled by earlier
+versions of GCC on these platforms.  We therefore recommend the use
+of the exact versions of these libraries listed as minimal versions
+in @uref{prerequisites.html,,the prerequisites}.
+
+@html
+<hr />
+@end html
+@heading @anchor{sparc-sun-solaris2}sparc-sun-solaris2*
+
+When GCC is configured to use GNU binutils 2.14 or later, the binaries
+produced are smaller than the ones produced using Sun's native tools;
+this difference is quite significant for binaries containing debugging
+information.
+
+Starting with Solaris 7, the operating system is capable of executing
+64-bit SPARC V9 binaries.  GCC 3.1 and later properly supports
+this; the @option{-m64} option enables 64-bit code generation.
+However, if all you want is code tuned for the UltraSPARC CPU, you
+should try the @option{-mtune=ultrasparc} option instead, which produces
+code that, unlike full 64-bit code, can still run on non-UltraSPARC
+machines.
+
+When configuring on a Solaris 7 or later system that is running a kernel
+that supports only 32-bit binaries, one must configure with
+@option{--disable-multilib}, since we will not be able to build the
+64-bit target libraries.
+
+GCC 3.3 and GCC 3.4 trigger code generation bugs in earlier versions of
+the GNU compiler (especially GCC 3.0.x versions), which lead to the
+miscompilation of the stage1 compiler and the subsequent failure of the
+bootstrap process.  A workaround is to use GCC 3.2.3 as an intermediary
+stage, i.e.@: to bootstrap that compiler with the base compiler and then
+use it to bootstrap the final compiler.
+
+GCC 3.4 triggers a code generation bug in versions 5.4 (Sun ONE Studio 7)
+and 5.5 (Sun ONE Studio 8) of the Sun compiler, which causes a bootstrap
+failure in form of a miscompilation of the stage1 compiler by the Sun
+compiler.  This is Sun bug 4974440.  This is fixed with patch 112760-07.
+
+GCC 3.4 changed the default debugging format from Stabs to DWARF-2 for
+32-bit code on Solaris 7 and later.  If you use the Sun assembler, this
+change apparently runs afoul of Sun bug 4910101 (which is referenced as
+an x86-only problem by Sun, probably because they do not use DWARF-2).
+A symptom of the problem is that you cannot compile C++ programs like
+@command{groff} 1.19.1 without getting messages similar to the following:
+
+@smallexample
+ld: warning: relocation error: R_SPARC_UA32: @dots{}
+  external symbolic relocation against non-allocatable section
+  .debug_info cannot be processed at runtime: relocation ignored.
+@end smallexample
+
+@noindent
+To work around this problem, compile with @option{-gstabs+} instead of
+plain @option{-g}.
+
+When configuring the GNU Multiple Precision Library (GMP), the MPFR
+library or the MPC library on a Solaris 7 or later system, the canonical
+target triplet must be specified as the @command{build} parameter on the
+configure line.  This target triplet can be obtained by invoking @command{./config.guess} in the toplevel source directory of GCC (and
+not that of GMP or MPFR or MPC).  For example on a Solaris 9 system:
+
+@smallexample
+% ./configure --build=sparc-sun-solaris2.9 --prefix=xxx
+@end smallexample
+
+@html
+<hr />
+@end html
+@heading @anchor{sparc-sun-solaris210}sparc-sun-solaris2.10
+
+There is a bug in older versions of the Sun assembler which breaks
+thread-local storage (TLS).  A typical error message is
+
+@smallexample
+ld: fatal: relocation error: R_SPARC_TLS_LE_HIX22: file /var/tmp//ccamPA1v.o:
+  symbol <unknown>: bad symbol type SECT: symbol type must be TLS
+@end smallexample
+
+@noindent
+This bug is fixed in Sun patch 118683-03 or later.
+
+@html
+<hr />
+@end html
+@heading @anchor{sparc-x-linux}sparc-*-linux*
+
+GCC versions 3.0 and higher require binutils 2.11.2 and glibc 2.2.4
+or newer on this platform.  All earlier binutils and glibc
+releases mishandled unaligned relocations on @code{sparc-*-*} targets.
+
+
+@html
+<hr />
+@end html
+@heading @anchor{sparc64-x-solaris2}sparc64-*-solaris2*
+
+When configuring the GNU Multiple Precision Library (GMP), the MPFR
+library or the MPC library, the canonical target triplet must be specified
+as the @command{build} parameter on the configure line.  For example
+on a Solaris 9 system:
+
+@smallexample
+% ./configure --build=sparc64-sun-solaris2.9 --prefix=xxx
+@end smallexample
+
+The following compiler flags must be specified in the configure
+step in order to bootstrap this target with the Sun compiler:
+
+@smallexample
+% CC="cc -xarch=v9 -xildoff" @var{srcdir}/configure [@var{options}] [@var{target}]
+@end smallexample
+
+@noindent
+@option{-xarch=v9} specifies the SPARC-V9 architecture to the Sun toolchain
+and @option{-xildoff} turns off the incremental linker.
+
+@html
+<hr />
+@end html
+@heading @anchor{sparcv9-x-solaris2}sparcv9-*-solaris2*
+
+This is a synonym for @samp{sparc64-*-solaris2*}.
+
+@html
+<hr />
+@end html
+@heading @anchor{x-x-vxworks}*-*-vxworks*
+Support for VxWorks is in flux.  At present GCC supports @emph{only} the
+very recent VxWorks 5.5 (aka Tornado 2.2) release, and only on PowerPC@.
+We welcome patches for other architectures supported by VxWorks 5.5.
+Support for VxWorks AE would also be welcome; we believe this is merely
+a matter of writing an appropriate ``configlette'' (see below).  We are
+not interested in supporting older, a.out or COFF-based, versions of
+VxWorks in GCC 3.
+
+VxWorks comes with an older version of GCC installed in
+@file{@var{$WIND_BASE}/host}; we recommend you do not overwrite it.
+Choose an installation @var{prefix} entirely outside @var{$WIND_BASE}.
+Before running @command{configure}, create the directories @file{@var{prefix}}
+and @file{@var{prefix}/bin}.  Link or copy the appropriate assembler,
+linker, etc.@: into @file{@var{prefix}/bin}, and set your @var{PATH} to
+include that directory while running both @command{configure} and
+@command{make}.
+
+You must give @command{configure} the
+@option{--with-headers=@var{$WIND_BASE}/target/h} switch so that it can
+find the VxWorks system headers.  Since VxWorks is a cross compilation
+target only, you must also specify @option{--target=@var{target}}.
+@command{configure} will attempt to create the directory
+@file{@var{prefix}/@var{target}/sys-include} and copy files into it;
+make sure the user running @command{configure} has sufficient privilege
+to do so.
+
+GCC's exception handling runtime requires a special ``configlette''
+module, @file{contrib/gthr_supp_vxw_5x.c}.  Follow the instructions in
+that file to add the module to your kernel build.  (Future versions of
+VxWorks will incorporate this module.)
+
+@html
+<hr />
+@end html
+@heading @anchor{x86-64-x-x}x86_64-*-*, amd64-*-*
+
+GCC supports the x86-64 architecture implemented by the AMD64 processor
+(amd64-*-* is an alias for x86_64-*-*) on GNU/Linux, FreeBSD and NetBSD@.
+On GNU/Linux the default is a bi-arch compiler which is able to generate
+both 64-bit x86-64 and 32-bit x86 code (via the @option{-m32} switch).
+
+@html
+<hr />
+@end html
+@heading @anchor{xtensa-x-elf}xtensa*-*-elf
+
+This target is intended for embedded Xtensa systems using the
+@samp{newlib} C library.  It uses ELF but does not support shared
+objects.  Designed-defined instructions specified via the
+Tensilica Instruction Extension (TIE) language are only supported
+through inline assembly.
+
+The Xtensa configuration information must be specified prior to
+building GCC@.  The @file{include/xtensa-config.h} header
+file contains the configuration information.  If you created your
+own Xtensa configuration with the Xtensa Processor Generator, the
+downloaded files include a customized copy of this header file,
+which you can use to replace the default header file.
+
+@html
+<hr />
+@end html
+@heading @anchor{xtensa-x-linux}xtensa*-*-linux*
+
+This target is for Xtensa systems running GNU/Linux.  It supports ELF
+shared objects and the GNU C library (glibc).  It also generates
+position-independent code (PIC) regardless of whether the
+@option{-fpic} or @option{-fPIC} options are used.  In other
+respects, this target is the same as the
+@uref{#xtensa*-*-elf,,@samp{xtensa*-*-elf}} target.
+
+@html
+<hr />
+@end html
+@heading @anchor{windows}Microsoft Windows
+
+@subheading Intel 16-bit versions
+The 16-bit versions of Microsoft Windows, such as Windows 3.1, are not 
+supported.
+
+However, the 32-bit port has limited support for Microsoft 
+Windows 3.11 in the Win32s environment, as a target only.  See below.
+
+@subheading Intel 32-bit versions
+
+The 32-bit versions of Windows, including Windows 95, Windows NT, Windows 
+XP, and Windows Vista, are supported by several different target 
+platforms.  These targets differ in which Windows subsystem they target 
+and which C libraries are used.
+
+@itemize
+@item Cygwin @uref{#x-x-cygwin,,*-*-cygwin}: Cygwin provides a user-space 
+Linux API emulation layer in the Win32 subsystem.
+@item Interix @uref{#x-x-interix,,*-*-interix}: The Interix subsystem 
+provides native support for POSIX.
+@item MinGW @uref{#x-x-mingw32,,*-*-mingw32}: MinGW is a native GCC port for 
+the Win32 subsystem that provides a subset of POSIX.
+@item MKS i386-pc-mks: NuTCracker from MKS.  See 
+@uref{http://www.mkssoftware.com/} for more information.
+@end itemize
+
+@subheading Intel 64-bit versions
+
+GCC contains support for x86-64 using the mingw-w64
+runtime library, available from @uref{http://mingw-w64.sourceforge.net/}.
+This library should be used with the target triple x86_64-pc-mingw32.
+
+Presently Windows for Itanium is not supported.
+
+@subheading Windows CE
+
+Windows CE is supported as a target only on ARM (arm-wince-pe), Hitachi 
+SuperH (sh-wince-pe), and MIPS (mips-wince-pe).
+
+@subheading Other Windows Platforms
+
+GCC no longer supports Windows NT on the Alpha or PowerPC.
+
+GCC no longer supports the Windows POSIX subsystem.  However, it does 
+support the Interix subsystem.  See above.
+
+Old target names including *-*-winnt and *-*-windowsnt are no longer used.
+
+PW32 (i386-pc-pw32) support was never completed, and the project seems to 
+be inactive.  See @uref{http://pw32.sourceforge.net/} for more information.
+
+UWIN support has been removed due to a lack of maintenance.
+
+@html
+<hr />
+@end html
+@heading @anchor{x-x-cygwin}*-*-cygwin
+
+Ports of GCC are included with the
+@uref{http://www.cygwin.com/,,Cygwin environment}.
+
+GCC will build under Cygwin without modification; it does not build
+with Microsoft's C++ compiler and there are no plans to make it do so.
+
+The Cygwin native compiler can be configured to target any 32-bit x86
+cpu architecture desired; the default is i686-pc-cygwin.  It should be
+used with as up-to-date a version of binutils as possible; use either
+the latest official GNU binutils release in the Cygwin distribution,
+or version 2.20 or above if building your own.
+
+@html
+<hr />
+@end html
+@heading @anchor{x-x-interix}*-*-interix
+
+The Interix target is used by OpenNT, Interix, Services For UNIX (SFU), 
+and Subsystem for UNIX-based Applications (SUA).  Applications compiled 
+with this target run in the Interix subsystem, which is separate from 
+the Win32 subsystem.  This target was last known to work in GCC 3.3.
+
+@html
+<hr />
+@end html
+@heading @anchor{x-x-mingw32}*-*-mingw32
+
+GCC will build with and support only MinGW runtime 3.12 and later.
+Earlier versions of headers are incompatible with the new default semantics
+of @code{extern inline} in @code{-std=c99} and @code{-std=gnu99} modes.
+
+@html
+<hr />
+@end html
+@heading @anchor{older}Older systems
+
+GCC contains support files for many older (1980s and early
+1990s) Unix variants.  For the most part, support for these systems
+has not been deliberately removed, but it has not been maintained for
+several years and may suffer from bitrot.
+
+Starting with GCC 3.1, each release has a list of ``obsoleted'' systems.
+Support for these systems is still present in that release, but
+@command{configure} will fail unless the @option{--enable-obsolete}
+option is given.  Unless a maintainer steps forward, support for these
+systems will be removed from the next release of GCC@.
+
+Support for old systems as hosts for GCC can cause problems if the
+workarounds for compiler, library and operating system bugs affect the
+cleanliness or maintainability of the rest of GCC@.  In some cases, to
+bring GCC up on such a system, if still possible with current GCC, may
+require first installing an old version of GCC which did work on that
+system, and using it to compile a more recent GCC, to avoid bugs in the
+vendor compiler.  Old releases of GCC 1 and GCC 2 are available in the
+@file{old-releases} directory on the @uref{../mirrors.html,,GCC mirror
+sites}.  Header bugs may generally be avoided using
+@command{fixincludes}, but bugs or deficiencies in libraries and the
+operating system may still cause problems.
+
+Support for older systems as targets for cross-compilation is less
+problematic than support for them as hosts for GCC; if an enthusiast
+wishes to make such a target work again (including resurrecting any of
+the targets that never worked with GCC 2, starting from the last
+version before they were removed), patches
+@uref{../contribute.html,,following the usual requirements} would be
+likely to be accepted, since they should not affect the support for more
+modern targets.
+
+For some systems, old versions of GNU binutils may also be useful,
+and are available from @file{pub/binutils/old-releases} on
+@uref{http://sourceware.org/mirrors.html,,sourceware.org mirror sites}.
+
+Some of the information on specific systems above relates to
+such older systems, but much of the information
+about GCC on such systems (which may no longer be applicable to
+current GCC) is to be found in the GCC texinfo manual.
+
+@html
+<hr />
+@end html
+@heading @anchor{elf}all ELF targets (SVR4, Solaris 2, etc.)
+
+C++ support is significantly better on ELF targets if you use the
+@uref{./configure.html#with-gnu-ld,,GNU linker}; duplicate copies of
+inlines, vtables and template instantiations will be discarded
+automatically.
+
+
+@html
+<hr />
+<p>
+@end html
+@ifhtml
+@uref{./index.html,,Return to the GCC Installation page}
+@end ifhtml
+@end ifset
+
+@c ***Old documentation******************************************************
+@ifset oldhtml
+@include install-old.texi
+@html
+<hr />
+<p>
+@end html
+@ifhtml
+@uref{./index.html,,Return to the GCC Installation page}
+@end ifhtml
+@end ifset
+
+@c ***GFDL********************************************************************
+@ifset gfdlhtml
+@include fdl.texi
+@html
+<hr />
+<p>
+@end html
+@ifhtml
+@uref{./index.html,,Return to the GCC Installation page}
+@end ifhtml
+@end ifset
+
+@c ***************************************************************************
+@c Part 6 The End of the Document
+@ifinfo
+@comment node-name,     next,          previous, up
+@node    Concept Index, , GNU Free Documentation License, Top
+@end ifinfo
+
+@ifinfo
+@unnumbered Concept Index
+
+@printindex cp
+
+@contents
+@end ifinfo
+@bye
diff --git a/gcc/doc/install.texi2html b/gcc/doc/install.texi2html
new file mode 100755
index 000000000..b46f4657b
--- /dev/null
+++ b/gcc/doc/install.texi2html
@@ -0,0 +1,58 @@
+#!/bin/sh
+#
+# Convert the GCC install documentation from texinfo format to HTML.
+#
+# $SOURCEDIR and $DESTDIR, resp., refer to the directory containing
+# the texinfo source and the directory to put the HTML version in.
+#
+# Copyright (C) 2001, 2003, 2006, 2008, 2009 Free Software Foundation, Inc.
+# Originally by Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at>, June 2001.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it under
+# the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 3, or (at your option) any later
+# version.
+#
+# GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+# WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+# for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+set -e
+
+SOURCEDIR=${SOURCEDIR-.}
+DESTDIR=${DESTDIR-HTML}
+
+MAKEINFO=${MAKEINFO-makeinfo}
+
+if [ ! -d $DESTDIR ]; then
+    mkdir -p $DESTDIR
+fi
+
+# Generate gcc-vers.texi.
+(
+   echo "@set version-GCC $(cat $SOURCEDIR/../BASE-VER)"
+   if [ "$(cat $SOURCEDIR/../DEV-PHASE)" = "experimental" ]; then
+      echo "@set DEVELOPMENT"
+   else
+      echo "@clear DEVELOPMENT"
+   fi
+   echo "@set srcdir $SOURCEDIR/.."
+) > $DESTDIR/gcc-vers.texi
+
+for x in index.html specific.html prerequisites.html download.html configure.html \
+         build.html test.html finalinstall.html binaries.html old.html \
+         gfdl.html
+do
+    define=`echo $x | sed -e 's/\.//g'`
+    echo "define = $define"
+    $MAKEINFO --no-number-sections -I $SOURCEDIR -I $SOURCEDIR/include -I $DESTDIR $SOURCEDIR/install.texi --html --no-split -D$define -o$DESTDIR/$x
+done
+
+rm $DESTDIR/gcc-vers.texi
diff --git a/gcc/doc/interface.texi b/gcc/doc/interface.texi
new file mode 100644
index 000000000..f6fdc329e
--- /dev/null
+++ b/gcc/doc/interface.texi
@@ -0,0 +1,71 @@
+@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+@c 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Interface
+@chapter Interfacing to GCC Output
+@cindex interfacing to GCC output
+@cindex run-time conventions
+@cindex function call conventions
+@cindex conventions, run-time
+
+GCC is normally configured to use the same function calling convention
+normally in use on the target system.  This is done with the
+machine-description macros described (@pxref{Target Macros}).
+
+@cindex unions, returning
+@cindex structures, returning
+@cindex returning structures and unions
+However, returning of structure and union values is done differently on
+some target machines.  As a result, functions compiled with PCC
+returning such types cannot be called from code compiled with GCC,
+and vice versa.  This does not cause trouble often because few Unix
+library routines return structures or unions.
+
+GCC code returns structures and unions that are 1, 2, 4 or 8 bytes
+long in the same registers used for @code{int} or @code{double} return
+values.  (GCC typically allocates variables of such types in
+registers also.)  Structures and unions of other sizes are returned by
+storing them into an address passed by the caller (usually in a
+register).  The target hook @code{TARGET_STRUCT_VALUE_RTX}
+tells GCC where to pass this address.
+
+By contrast, PCC on most target machines returns structures and unions
+of any size by copying the data into an area of static storage, and then
+returning the address of that storage as if it were a pointer value.
+The caller must copy the data from that memory area to the place where
+the value is wanted.  This is slower than the method used by GCC, and
+fails to be reentrant.
+
+On some target machines, such as RISC machines and the 80386, the
+standard system convention is to pass to the subroutine the address of
+where to return the value.  On these machines, GCC has been
+configured to be compatible with the standard compiler, when this method
+is used.  It may not be compatible for structures of 1, 2, 4 or 8 bytes.
+
+@cindex argument passing
+@cindex passing arguments
+GCC uses the system's standard convention for passing arguments.  On
+some machines, the first few arguments are passed in registers; in
+others, all are passed on the stack.  It would be possible to use
+registers for argument passing on any machine, and this would probably
+result in a significant speedup.  But the result would be complete
+incompatibility with code that follows the standard convention.  So this
+change is practical only if you are switching to GCC as the sole C
+compiler for the system.  We may implement register argument passing on
+certain machines once we have a complete GNU system so that we can
+compile the libraries with GCC@.
+
+On some machines (particularly the SPARC), certain types of arguments
+are passed ``by invisible reference''.  This means that the value is
+stored in memory, and the address of the memory location is passed to
+the subroutine.
+
+@cindex @code{longjmp} and automatic variables
+If you use @code{longjmp}, beware of automatic variables.  ISO C says that
+automatic variables that are not declared @code{volatile} have undefined
+values after a @code{longjmp}.  And this is all GCC promises to do,
+because it is very difficult to restore register variables correctly, and
+one of GCC's features is that it can put variables in registers without
+your asking it to.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
new file mode 100644
index 000000000..acd457064
--- /dev/null
+++ b/gcc/doc/invoke.texi
@@ -0,0 +1,18730 @@
+@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+@c 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@ignore
+@c man begin INCLUDE
+@include gcc-vers.texi
+@c man end
+
+@c man begin COPYRIGHT
+Copyright @copyright{} 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+Free Software Foundation, Inc.
+
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being ``GNU General Public License'' and ``Funding
+Free Software'', the Front-Cover texts being (a) (see below), and with
+the Back-Cover Texts being (b) (see below).  A copy of the license is
+included in the gfdl(7) man page.
+
+(a) The FSF's Front-Cover Text is:
+
+     A GNU Manual
+
+(b) The FSF's Back-Cover Text is:
+
+     You have freedom to copy and modify this GNU Manual, like GNU
+     software.  Copies published by the Free Software Foundation raise
+     funds for GNU development.
+@c man end
+@c Set file name and title for the man page.
+@setfilename gcc
+@settitle GNU project C and C++ compiler
+@c man begin SYNOPSIS
+gcc [@option{-c}|@option{-S}|@option{-E}] [@option{-std=}@var{standard}]
+    [@option{-g}] [@option{-pg}] [@option{-O}@var{level}]
+    [@option{-W}@var{warn}@dots{}] [@option{-pedantic}]
+    [@option{-I}@var{dir}@dots{}] [@option{-L}@var{dir}@dots{}]
+    [@option{-D}@var{macro}[=@var{defn}]@dots{}] [@option{-U}@var{macro}]
+    [@option{-f}@var{option}@dots{}] [@option{-m}@var{machine-option}@dots{}]
+    [@option{-o} @var{outfile}] [@@@var{file}] @var{infile}@dots{}
+
+Only the most useful options are listed here; see below for the
+remainder.  @samp{g++} accepts mostly the same options as @samp{gcc}.
+@c man end
+@c man begin SEEALSO
+gpl(7), gfdl(7), fsf-funding(7),
+cpp(1), gcov(1), as(1), ld(1), gdb(1), adb(1), dbx(1), sdb(1)
+and the Info entries for @file{gcc}, @file{cpp}, @file{as},
+@file{ld}, @file{binutils} and @file{gdb}.
+@c man end
+@c man begin BUGS
+For instructions on reporting bugs, see
+@w{@value{BUGURL}}.
+@c man end
+@c man begin AUTHOR
+See the Info entry for @command{gcc}, or
+@w{@uref{http://gcc.gnu.org/onlinedocs/gcc/Contributors.html}},
+for contributors to GCC@.
+@c man end
+@end ignore
+
+@node Invoking GCC
+@chapter GCC Command Options
+@cindex GCC command options
+@cindex command options
+@cindex options, GCC command
+
+@c man begin DESCRIPTION
+When you invoke GCC, it normally does preprocessing, compilation,
+assembly and linking.  The ``overall options'' allow you to stop this
+process at an intermediate stage.  For example, the @option{-c} option
+says not to run the linker.  Then the output consists of object files
+output by the assembler.
+
+Other options are passed on to one stage of processing.  Some options
+control the preprocessor and others the compiler itself.  Yet other
+options control the assembler and linker; most of these are not
+documented here, since you rarely need to use any of them.
+
+@cindex C compilation options
+Most of the command line options that you can use with GCC are useful
+for C programs; when an option is only useful with another language
+(usually C++), the explanation says so explicitly.  If the description
+for a particular option does not mention a source language, you can use
+that option with all supported languages.
+
+@cindex C++ compilation options
+@xref{Invoking G++,,Compiling C++ Programs}, for a summary of special
+options for compiling C++ programs.
+
+@cindex grouping options
+@cindex options, grouping
+The @command{gcc} program accepts options and file names as operands.  Many
+options have multi-letter names; therefore multiple single-letter options
+may @emph{not} be grouped: @option{-dv} is very different from @w{@samp{-d
+-v}}.
+
+@cindex order of options
+@cindex options, order
+You can mix options and other arguments.  For the most part, the order
+you use doesn't matter.  Order does matter when you use several
+options of the same kind; for example, if you specify @option{-L} more
+than once, the directories are searched in the order specified.  Also,
+the placement of the @option{-l} option is significant.
+
+Many options have long names starting with @samp{-f} or with
+@samp{-W}---for example,
+@option{-fmove-loop-invariants}, @option{-Wformat} and so on.  Most of
+these have both positive and negative forms; the negative form of
+@option{-ffoo} would be @option{-fno-foo}.  This manual documents
+only one of these two forms, whichever one is not the default.
+
+@c man end
+
+@xref{Option Index}, for an index to GCC's options.
+
+@menu
+* Option Summary::      Brief list of all options, without explanations.
+* Overall Options::     Controlling the kind of output:
+                        an executable, object files, assembler files,
+                        or preprocessed source.
+* Invoking G++::        Compiling C++ programs.
+* C Dialect Options::   Controlling the variant of C language compiled.
+* C++ Dialect Options:: Variations on C++.
+* Objective-C and Objective-C++ Dialect Options:: Variations on Objective-C
+                        and Objective-C++.
+* Language Independent Options:: Controlling how diagnostics should be
+                        formatted.
+* Warning Options::     How picky should the compiler be?
+* Debugging Options::   Symbol tables, measurements, and debugging dumps.
+* Optimize Options::    How much optimization?
+* Preprocessor Options:: Controlling header files and macro definitions.
+                         Also, getting dependency information for Make.
+* Assembler Options::   Passing options to the assembler.
+* Link Options::        Specifying libraries and so on.
+* Directory Options::   Where to find header files and libraries.
+                        Where to find the compiler executable files.
+* Spec Files::          How to pass switches to sub-processes.
+* Target Options::      Running a cross-compiler, or an old version of GCC.
+* Submodel Options::    Specifying minor hardware or convention variations,
+                        such as 68010 vs 68020.
+* Code Gen Options::    Specifying conventions for function calls, data layout
+                        and register usage.
+* Environment Variables:: Env vars that affect GCC.
+* Precompiled Headers:: Compiling a header once, and using it many times.
+@end menu
+
+@c man begin OPTIONS
+
+@node Option Summary
+@section Option Summary
+
+Here is a summary of all the options, grouped by type.  Explanations are
+in the following sections.
+
+@table @emph
+@item Overall Options
+@xref{Overall Options,,Options Controlling the Kind of Output}.
+@gccoptlist{-c  -S  -E  -o @var{file}  -no-canonical-prefixes  @gol
+-pipe  -pass-exit-codes  @gol
+-x @var{language}  -v  -###  --help@r{[}=@var{class}@r{[},@dots{}@r{]]}  --target-help  @gol
+--version -wrapper @@@var{file} -fplugin=@var{file} -fplugin-arg-@var{name}=@var{arg}  @gol
+-fdump-ada-spec@r{[}-slim@r{]} -fdump-go-spec=@var{file}}
+
+@item C Language Options
+@xref{C Dialect Options,,Options Controlling C Dialect}.
+@gccoptlist{-ansi  -std=@var{standard}  -fgnu89-inline @gol
+-aux-info @var{filename} @gol
+-fno-asm  -fno-builtin  -fno-builtin-@var{function} @gol
+-fhosted  -ffreestanding -fopenmp -fms-extensions -fplan9-extensions @gol
+-trigraphs  -no-integrated-cpp  -traditional  -traditional-cpp @gol
+-fallow-single-precision  -fcond-mismatch -flax-vector-conversions @gol
+-fsigned-bitfields  -fsigned-char @gol
+-funsigned-bitfields  -funsigned-char}
+
+@item C++ Language Options
+@xref{C++ Dialect Options,,Options Controlling C++ Dialect}.
+@gccoptlist{-fabi-version=@var{n}  -fno-access-control  -fcheck-new @gol
+-fconserve-space  -fconstexpr-depth=@var{n}  -ffriend-injection @gol
+-fno-elide-constructors @gol
+-fno-enforce-eh-specs @gol
+-ffor-scope  -fno-for-scope  -fno-gnu-keywords @gol
+-fno-implicit-templates @gol
+-fno-implicit-inline-templates @gol
+-fno-implement-inlines  -fms-extensions @gol
+-fno-nonansi-builtins  -fnothrow-opt  -fno-operator-names @gol
+-fno-optional-diags  -fpermissive @gol
+-fno-pretty-templates @gol
+-frepo  -fno-rtti  -fstats  -ftemplate-depth=@var{n} @gol
+-fno-threadsafe-statics -fuse-cxa-atexit  -fno-weak  -nostdinc++ @gol
+-fno-default-inline  -fvisibility-inlines-hidden @gol
+-fvisibility-ms-compat @gol
+-Wabi  -Wconversion-null  -Wctor-dtor-privacy @gol
+-Wnoexcept -Wnon-virtual-dtor  -Wreorder @gol
+-Weffc++  -Wstrict-null-sentinel @gol
+-Wno-non-template-friend  -Wold-style-cast @gol
+-Woverloaded-virtual  -Wno-pmf-conversions @gol
+-Wsign-promo}
+
+@item Objective-C and Objective-C++ Language Options
+@xref{Objective-C and Objective-C++ Dialect Options,,Options Controlling
+Objective-C and Objective-C++ Dialects}.
+@gccoptlist{-fconstant-string-class=@var{class-name} @gol
+-fgnu-runtime  -fnext-runtime @gol
+-fno-nil-receivers @gol
+-fobjc-abi-version=@var{n} @gol
+-fobjc-call-cxx-cdtors @gol
+-fobjc-direct-dispatch @gol
+-fobjc-exceptions @gol
+-fobjc-gc @gol
+-fobjc-nilcheck @gol
+-fobjc-std=objc1 @gol
+-freplace-objc-classes @gol
+-fzero-link @gol
+-gen-decls @gol
+-Wassign-intercept @gol
+-Wno-protocol  -Wselector @gol
+-Wstrict-selector-match @gol
+-Wundeclared-selector}
+
+@item Language Independent Options
+@xref{Language Independent Options,,Options to Control Diagnostic Messages Formatting}.
+@gccoptlist{-fmessage-length=@var{n}  @gol
+-fdiagnostics-show-location=@r{[}once@r{|}every-line@r{]}  @gol
+-fno-diagnostics-show-option}
+
+@item Warning Options
+@xref{Warning Options,,Options to Request or Suppress Warnings}.
+@gccoptlist{-fsyntax-only  -fmax-errors=@var{n}  -pedantic @gol
+-pedantic-errors @gol
+-w  -Wextra  -Wall  -Waddress  -Waggregate-return  -Warray-bounds @gol
+-Wno-attributes -Wno-builtin-macro-redefined @gol
+-Wc++-compat -Wc++0x-compat -Wcast-align  -Wcast-qual  @gol
+-Wchar-subscripts -Wclobbered  -Wcomment @gol
+-Wconversion  -Wcoverage-mismatch  -Wno-cpp  -Wno-deprecated  @gol
+-Wno-deprecated-declarations -Wdisabled-optimization  @gol
+-Wno-div-by-zero -Wdouble-promotion -Wempty-body  -Wenum-compare @gol
+-Wno-endif-labels -Werror  -Werror=* @gol
+-Wfatal-errors  -Wfloat-equal  -Wformat  -Wformat=2 @gol
+-Wno-format-contains-nul -Wno-format-extra-args -Wformat-nonliteral @gol
+-Wformat-security  -Wformat-y2k @gol
+-Wframe-larger-than=@var{len} -Wjump-misses-init -Wignored-qualifiers @gol
+-Wimplicit  -Wimplicit-function-declaration  -Wimplicit-int @gol
+-Winit-self  -Winline @gol
+-Wno-int-to-pointer-cast -Wno-invalid-offsetof @gol
+-Winvalid-pch -Wlarger-than=@var{len}  -Wunsafe-loop-optimizations @gol
+-Wlogical-op -Wlong-long @gol
+-Wmain  -Wmissing-braces  -Wmissing-field-initializers @gol
+-Wmissing-format-attribute  -Wmissing-include-dirs @gol
+-Wno-mudflap @gol
+-Wno-multichar  -Wnonnull  -Wno-overflow @gol
+-Woverlength-strings  -Wpacked  -Wpacked-bitfield-compat  -Wpadded @gol
+-Wparentheses  -Wpedantic-ms-format -Wno-pedantic-ms-format @gol
+-Wpointer-arith  -Wno-pointer-to-int-cast @gol
+-Wredundant-decls @gol
+-Wreturn-type  -Wsequence-point  -Wshadow @gol
+-Wsign-compare  -Wsign-conversion  -Wstack-protector @gol
+-Wstrict-aliasing -Wstrict-aliasing=n @gol
+-Wstrict-overflow -Wstrict-overflow=@var{n} @gol
+-Wsuggest-attribute=@r{[}pure@r{|}const@r{|}noreturn@r{]} @gol
+-Wswitch  -Wswitch-default  -Wswitch-enum -Wsync-nand @gol
+-Wsystem-headers  -Wtrampolines  -Wtrigraphs  -Wtype-limits  -Wundef @gol
+-Wuninitialized  -Wunknown-pragmas  -Wno-pragmas @gol
+-Wunsuffixed-float-constants  -Wunused  -Wunused-function @gol
+-Wunused-label  -Wunused-parameter -Wno-unused-result -Wunused-value @gol
+-Wunused-variable -Wunused-but-set-parameter -Wunused-but-set-variable @gol
+-Wvariadic-macros -Wvla -Wvolatile-register-var  -Wwrite-strings}
+
+@item C and Objective-C-only Warning Options
+@gccoptlist{-Wbad-function-cast  -Wmissing-declarations @gol
+-Wmissing-parameter-type  -Wmissing-prototypes  -Wnested-externs @gol
+-Wold-style-declaration  -Wold-style-definition @gol
+-Wstrict-prototypes  -Wtraditional  -Wtraditional-conversion @gol
+-Wdeclaration-after-statement -Wpointer-sign}
+
+@item Debugging Options
+@xref{Debugging Options,,Options for Debugging Your Program or GCC}.
+@gccoptlist{-d@var{letters}  -dumpspecs  -dumpmachine  -dumpversion @gol
+-fdbg-cnt-list -fdbg-cnt=@var{counter-value-list} @gol
+-fdump-noaddr -fdump-unnumbered -fdump-unnumbered-links @gol
+-fdump-translation-unit@r{[}-@var{n}@r{]} @gol
+-fdump-class-hierarchy@r{[}-@var{n}@r{]} @gol
+-fdump-ipa-all -fdump-ipa-cgraph -fdump-ipa-inline @gol
+-fdump-statistics @gol
+-fdump-tree-all @gol
+-fdump-tree-original@r{[}-@var{n}@r{]}  @gol
+-fdump-tree-optimized@r{[}-@var{n}@r{]} @gol
+-fdump-tree-cfg -fdump-tree-vcg -fdump-tree-alias @gol
+-fdump-tree-ch @gol
+-fdump-tree-ssa@r{[}-@var{n}@r{]} -fdump-tree-pre@r{[}-@var{n}@r{]} @gol
+-fdump-tree-ccp@r{[}-@var{n}@r{]} -fdump-tree-dce@r{[}-@var{n}@r{]} @gol
+-fdump-tree-gimple@r{[}-raw@r{]} -fdump-tree-mudflap@r{[}-@var{n}@r{]} @gol
+-fdump-tree-dom@r{[}-@var{n}@r{]} @gol
+-fdump-tree-dse@r{[}-@var{n}@r{]} @gol
+-fdump-tree-phiprop@r{[}-@var{n}@r{]} @gol
+-fdump-tree-phiopt@r{[}-@var{n}@r{]} @gol
+-fdump-tree-forwprop@r{[}-@var{n}@r{]} @gol
+-fdump-tree-copyrename@r{[}-@var{n}@r{]} @gol
+-fdump-tree-nrv -fdump-tree-vect @gol
+-fdump-tree-sink @gol
+-fdump-tree-sra@r{[}-@var{n}@r{]} @gol
+-fdump-tree-forwprop@r{[}-@var{n}@r{]} @gol
+-fdump-tree-fre@r{[}-@var{n}@r{]} @gol
+-fdump-tree-vrp@r{[}-@var{n}@r{]} @gol
+-ftree-vectorizer-verbose=@var{n} @gol
+-fdump-tree-storeccp@r{[}-@var{n}@r{]} @gol
+-fdump-final-insns=@var{file} @gol
+-fcompare-debug@r{[}=@var{opts}@r{]}  -fcompare-debug-second @gol
+-feliminate-dwarf2-dups -feliminate-unused-debug-types @gol
+-feliminate-unused-debug-symbols -femit-class-debug-always @gol
+-fenable-icf-debug @gol
+-fmem-report -fpre-ipa-mem-report -fpost-ipa-mem-report -fprofile-arcs @gol
+-frandom-seed=@var{string} -fsched-verbose=@var{n} @gol
+-fsel-sched-verbose -fsel-sched-dump-cfg -fsel-sched-pipelining-verbose @gol
+-fstack-usage  -ftest-coverage  -ftime-report -fvar-tracking @gol
+-fvar-tracking-assignments  -fvar-tracking-assignments-toggle @gol
+-g  -g@var{level}  -gtoggle  -gcoff  -gdwarf-@var{version} @gol
+-ggdb  -gstabs  -gstabs+  -gstrict-dwarf  -gno-strict-dwarf @gol
+-gvms  -gxcoff  -gxcoff+ @gol
+-fno-merge-debug-strings -fno-dwarf2-cfi-asm @gol
+-fdebug-prefix-map=@var{old}=@var{new} @gol
+-femit-struct-debug-baseonly -femit-struct-debug-reduced @gol
+-femit-struct-debug-detailed@r{[}=@var{spec-list}@r{]} @gol
+-p  -pg  -print-file-name=@var{library}  -print-libgcc-file-name @gol
+-print-multi-directory  -print-multi-lib  -print-multi-os-directory @gol
+-print-prog-name=@var{program}  -print-search-dirs  -Q @gol
+-print-sysroot -print-sysroot-headers-suffix @gol
+-save-temps -save-temps=cwd -save-temps=obj -time@r{[}=@var{file}@r{]}}
+
+@item Optimization Options
+@xref{Optimize Options,,Options that Control Optimization}.
+@gccoptlist{-falign-functions[=@var{n}] -falign-jumps[=@var{n}] @gol
+-falign-labels[=@var{n}] -falign-loops[=@var{n}] -fassociative-math @gol
+-fauto-inc-dec -fbranch-probabilities -fbranch-target-load-optimize @gol
+-fbranch-target-load-optimize2 -fbtr-bb-exclusive -fcaller-saves @gol
+-fcheck-data-deps -fcombine-stack-adjustments -fconserve-stack @gol
+-fcompare-elim -fcprop-registers -fcrossjumping @gol
+-fcse-follow-jumps -fcse-skip-blocks -fcx-fortran-rules @gol
+-fcx-limited-range @gol
+-fdata-sections -fdce -fdce -fdelayed-branch @gol
+-fdelete-null-pointer-checks -fdse -fdevirtualize -fdse @gol
+-fearly-inlining -fipa-sra -fexpensive-optimizations -ffast-math @gol
+-ffinite-math-only -ffloat-store -fexcess-precision=@var{style} @gol
+-fforward-propagate -ffp-contract=@var{style} -ffunction-sections @gol
+-fgcse -fgcse-after-reload -fgcse-las -fgcse-lm -fgraphite-identity @gol
+-fgcse-sm -fif-conversion -fif-conversion2 -findirect-inlining @gol
+-finline-functions -finline-functions-called-once -finline-limit=@var{n} @gol
+-finline-small-functions -fipa-cp -fipa-cp-clone -fipa-matrix-reorg @gol
+-fipa-pta -fipa-profile -fipa-pure-const -fipa-reference @gol
+-fipa-struct-reorg -fira-algorithm=@var{algorithm} @gol
+-fira-region=@var{region} @gol
+-fira-loop-pressure -fno-ira-share-save-slots @gol
+-fno-ira-share-spill-slots -fira-verbose=@var{n} @gol
+-fivopts -fkeep-inline-functions -fkeep-static-consts @gol
+-floop-block -floop-flatten -floop-interchange -floop-strip-mine @gol
+-floop-parallelize-all -flto -flto-compression-level
+-flto-partition=@var{alg} -flto-report -fmerge-all-constants @gol
+-fmerge-constants -fmodulo-sched -fmodulo-sched-allow-regmoves @gol
+-fmove-loop-invariants fmudflap -fmudflapir -fmudflapth -fno-branch-count-reg @gol
+-fno-default-inline @gol
+-fno-defer-pop -fno-function-cse -fno-guess-branch-probability @gol
+-fno-inline -fno-math-errno -fno-peephole -fno-peephole2 @gol
+-fno-sched-interblock -fno-sched-spec -fno-signed-zeros @gol
+-fno-toplevel-reorder -fno-trapping-math -fno-zero-initialized-in-bss @gol
+-fomit-frame-pointer -foptimize-register-move -foptimize-sibling-calls @gol
+-fpartial-inlining -fpeel-loops -fpredictive-commoning @gol
+-fprefetch-loop-arrays @gol
+-fprofile-correction -fprofile-dir=@var{path} -fprofile-generate @gol
+-fprofile-generate=@var{path} @gol
+-fprofile-use -fprofile-use=@var{path} -fprofile-values @gol
+-freciprocal-math -fregmove -frename-registers -freorder-blocks @gol
+-freorder-blocks-and-partition -freorder-functions @gol
+-frerun-cse-after-loop -freschedule-modulo-scheduled-loops @gol
+-frounding-math -fsched2-use-superblocks -fsched-pressure @gol
+-fsched-spec-load -fsched-spec-load-dangerous @gol
+-fsched-stalled-insns-dep[=@var{n}] -fsched-stalled-insns[=@var{n}] @gol
+-fsched-group-heuristic -fsched-critical-path-heuristic @gol
+-fsched-spec-insn-heuristic -fsched-rank-heuristic @gol
+-fsched-last-insn-heuristic -fsched-dep-count-heuristic @gol
+-fschedule-insns -fschedule-insns2 -fsection-anchors @gol
+-fselective-scheduling -fselective-scheduling2 @gol
+-fsel-sched-pipelining -fsel-sched-pipelining-outer-loops @gol
+-fsignaling-nans -fsingle-precision-constant -fsplit-ivs-in-unroller @gol
+-fsplit-wide-types -fstack-protector -fstack-protector-all @gol
+-fstrict-aliasing -fstrict-overflow -fthread-jumps -ftracer @gol
+-ftree-bit-ccp @gol
+-ftree-builtin-call-dce -ftree-ccp -ftree-ch -ftree-copy-prop @gol
+-ftree-copyrename -ftree-dce -ftree-dominator-opts -ftree-dse @gol
+-ftree-forwprop -ftree-fre -ftree-loop-if-convert @gol
+-ftree-loop-if-convert-stores -ftree-loop-im @gol
+-ftree-phiprop -ftree-loop-distribution -ftree-loop-distribute-patterns @gol
+-ftree-loop-ivcanon -ftree-loop-linear -ftree-loop-optimize @gol
+-ftree-parallelize-loops=@var{n} -ftree-pre -ftree-pta -ftree-reassoc @gol
+-ftree-sink -ftree-sra -ftree-switch-conversion @gol
+-ftree-ter -ftree-vect-loop-version -ftree-vectorize -ftree-vrp @gol
+-funit-at-a-time -funroll-all-loops -funroll-loops @gol
+-funsafe-loop-optimizations -funsafe-math-optimizations -funswitch-loops @gol
+-fvariable-expansion-in-unroller -fvect-cost-model -fvpt -fweb @gol
+-fwhole-program -fwpa -fuse-linker-plugin @gol
+--param @var{name}=@var{value}
+-O  -O0  -O1  -O2  -O3  -Os -Ofast}
+
+@item Preprocessor Options
+@xref{Preprocessor Options,,Options Controlling the Preprocessor}.
+@gccoptlist{-A@var{question}=@var{answer} @gol
+-A-@var{question}@r{[}=@var{answer}@r{]} @gol
+-C  -dD  -dI  -dM  -dN @gol
+-D@var{macro}@r{[}=@var{defn}@r{]}  -E  -H @gol
+-idirafter @var{dir} @gol
+-include @var{file}  -imacros @var{file} @gol
+-iprefix @var{file}  -iwithprefix @var{dir} @gol
+-iwithprefixbefore @var{dir}  -isystem @var{dir} @gol
+-imultilib @var{dir} -isysroot @var{dir} @gol
+-M  -MM  -MF  -MG  -MP  -MQ  -MT  -nostdinc  @gol
+-P  -fworking-directory  -remap @gol
+-trigraphs  -undef  -U@var{macro}  -Wp,@var{option} @gol
+-Xpreprocessor @var{option}}
+
+@item Assembler Option
+@xref{Assembler Options,,Passing Options to the Assembler}.
+@gccoptlist{-Wa,@var{option}  -Xassembler @var{option}}
+
+@item Linker Options
+@xref{Link Options,,Options for Linking}.
+@gccoptlist{@var{object-file-name}  -l@var{library} @gol
+-nostartfiles  -nodefaultlibs  -nostdlib -pie -rdynamic @gol
+-s  -static  -static-libgcc  -static-libstdc++ -shared  @gol
+-shared-libgcc  -symbolic @gol
+-T @var{script}  -Wl,@var{option}  -Xlinker @var{option} @gol
+-u @var{symbol}}
+
+@item Directory Options
+@xref{Directory Options,,Options for Directory Search}.
+@gccoptlist{-B@var{prefix} -I@var{dir} -iplugindir=@var{dir}}
+-iquote@var{dir} -L@var{dir} -specs=@var{file} -I-
+--sysroot=@var{dir}
+
+@item Machine Dependent Options
+@xref{Submodel Options,,Hardware Models and Configurations}.
+@c This list is ordered alphanumerically by subsection name.
+@c Try and put the significant identifier (CPU or system) first,
+@c so users have a clue at guessing where the ones they want will be.
+
+@emph{ARC Options}
+@gccoptlist{-EB  -EL @gol
+-mmangle-cpu  -mcpu=@var{cpu}  -mtext=@var{text-section} @gol
+-mdata=@var{data-section}  -mrodata=@var{readonly-data-section}}
+
+@emph{ARM Options}
+@gccoptlist{-mapcs-frame  -mno-apcs-frame @gol
+-mabi=@var{name} @gol
+-mapcs-stack-check  -mno-apcs-stack-check @gol
+-mapcs-float  -mno-apcs-float @gol
+-mapcs-reentrant  -mno-apcs-reentrant @gol
+-msched-prolog  -mno-sched-prolog @gol
+-mlittle-endian  -mbig-endian  -mwords-little-endian @gol
+-mfloat-abi=@var{name}  -msoft-float  -mhard-float  -mfpe @gol
+-mfp16-format=@var{name}
+-mthumb-interwork  -mno-thumb-interwork @gol
+-mcpu=@var{name}  -march=@var{name}  -mfpu=@var{name}  @gol
+-mstructure-size-boundary=@var{n} @gol
+-mabort-on-noreturn @gol
+-mlong-calls  -mno-long-calls @gol
+-msingle-pic-base  -mno-single-pic-base @gol
+-mpic-register=@var{reg} @gol
+-mnop-fun-dllimport @gol
+-mcirrus-fix-invalid-insns -mno-cirrus-fix-invalid-insns @gol
+-mpoke-function-name @gol
+-mthumb  -marm @gol
+-mtpcs-frame  -mtpcs-leaf-frame @gol
+-mcaller-super-interworking  -mcallee-super-interworking @gol
+-mtp=@var{name} @gol
+-mword-relocations @gol
+-mfix-cortex-m3-ldrd}
+
+@emph{AVR Options}
+@gccoptlist{-mmcu=@var{mcu}  -mno-interrupts @gol
+-mcall-prologues  -mtiny-stack  -mint8}
+
+@emph{Blackfin Options}
+@gccoptlist{-mcpu=@var{cpu}@r{[}-@var{sirevision}@r{]} @gol
+-msim -momit-leaf-frame-pointer  -mno-omit-leaf-frame-pointer @gol
+-mspecld-anomaly  -mno-specld-anomaly  -mcsync-anomaly  -mno-csync-anomaly @gol
+-mlow-64k -mno-low64k  -mstack-check-l1  -mid-shared-library @gol
+-mno-id-shared-library  -mshared-library-id=@var{n} @gol
+-mleaf-id-shared-library  -mno-leaf-id-shared-library @gol
+-msep-data  -mno-sep-data  -mlong-calls  -mno-long-calls @gol
+-mfast-fp -minline-plt -mmulticore  -mcorea  -mcoreb  -msdram @gol
+-micplb}
+
+@emph{CRIS Options}
+@gccoptlist{-mcpu=@var{cpu}  -march=@var{cpu}  -mtune=@var{cpu} @gol
+-mmax-stack-frame=@var{n}  -melinux-stacksize=@var{n} @gol
+-metrax4  -metrax100  -mpdebug  -mcc-init  -mno-side-effects @gol
+-mstack-align  -mdata-align  -mconst-align @gol
+-m32-bit  -m16-bit  -m8-bit  -mno-prologue-epilogue  -mno-gotplt @gol
+-melf  -maout  -melinux  -mlinux  -sim  -sim2 @gol
+-mmul-bug-workaround  -mno-mul-bug-workaround}
+
+@emph{CRX Options}
+@gccoptlist{-mmac -mpush-args}
+
+@emph{Darwin Options}
+@gccoptlist{-all_load  -allowable_client  -arch  -arch_errors_fatal @gol
+-arch_only  -bind_at_load  -bundle  -bundle_loader @gol
+-client_name  -compatibility_version  -current_version @gol
+-dead_strip @gol
+-dependency-file  -dylib_file  -dylinker_install_name @gol
+-dynamic  -dynamiclib  -exported_symbols_list @gol
+-filelist  -flat_namespace  -force_cpusubtype_ALL @gol
+-force_flat_namespace  -headerpad_max_install_names @gol
+-iframework @gol
+-image_base  -init  -install_name  -keep_private_externs @gol
+-multi_module  -multiply_defined  -multiply_defined_unused @gol
+-noall_load   -no_dead_strip_inits_and_terms @gol
+-nofixprebinding -nomultidefs  -noprebind  -noseglinkedit @gol
+-pagezero_size  -prebind  -prebind_all_twolevel_modules @gol
+-private_bundle  -read_only_relocs  -sectalign @gol
+-sectobjectsymbols  -whyload  -seg1addr @gol
+-sectcreate  -sectobjectsymbols  -sectorder @gol
+-segaddr -segs_read_only_addr -segs_read_write_addr @gol
+-seg_addr_table  -seg_addr_table_filename  -seglinkedit @gol
+-segprot  -segs_read_only_addr  -segs_read_write_addr @gol
+-single_module  -static  -sub_library  -sub_umbrella @gol
+-twolevel_namespace  -umbrella  -undefined @gol
+-unexported_symbols_list  -weak_reference_mismatches @gol
+-whatsloaded -F -gused -gfull -mmacosx-version-min=@var{version} @gol
+-mkernel -mone-byte-bool}
+
+@emph{DEC Alpha Options}
+@gccoptlist{-mno-fp-regs  -msoft-float  -malpha-as  -mgas @gol
+-mieee  -mieee-with-inexact  -mieee-conformant @gol
+-mfp-trap-mode=@var{mode}  -mfp-rounding-mode=@var{mode} @gol
+-mtrap-precision=@var{mode}  -mbuild-constants @gol
+-mcpu=@var{cpu-type}  -mtune=@var{cpu-type} @gol
+-mbwx  -mmax  -mfix  -mcix @gol
+-mfloat-vax  -mfloat-ieee @gol
+-mexplicit-relocs  -msmall-data  -mlarge-data @gol
+-msmall-text  -mlarge-text @gol
+-mmemory-latency=@var{time}}
+
+@emph{DEC Alpha/VMS Options}
+@gccoptlist{-mvms-return-codes -mdebug-main=@var{prefix} -mmalloc64}
+
+@emph{FR30 Options}
+@gccoptlist{-msmall-model -mno-lsim}
+
+@emph{FRV Options}
+@gccoptlist{-mgpr-32  -mgpr-64  -mfpr-32  -mfpr-64 @gol
+-mhard-float  -msoft-float @gol
+-malloc-cc  -mfixed-cc  -mdword  -mno-dword @gol
+-mdouble  -mno-double @gol
+-mmedia  -mno-media  -mmuladd  -mno-muladd @gol
+-mfdpic  -minline-plt -mgprel-ro  -multilib-library-pic @gol
+-mlinked-fp  -mlong-calls  -malign-labels @gol
+-mlibrary-pic  -macc-4  -macc-8 @gol
+-mpack  -mno-pack  -mno-eflags  -mcond-move  -mno-cond-move @gol
+-moptimize-membar -mno-optimize-membar @gol
+-mscc  -mno-scc  -mcond-exec  -mno-cond-exec @gol
+-mvliw-branch  -mno-vliw-branch @gol
+-mmulti-cond-exec  -mno-multi-cond-exec  -mnested-cond-exec @gol
+-mno-nested-cond-exec  -mtomcat-stats @gol
+-mTLS -mtls @gol
+-mcpu=@var{cpu}}
+
+@emph{GNU/Linux Options}
+@gccoptlist{-mglibc -muclibc -mbionic -mandroid @gol
+-tno-android-cc -tno-android-ld}
+
+@emph{H8/300 Options}
+@gccoptlist{-mrelax  -mh  -ms  -mn  -mint32  -malign-300}
+
+@emph{HPPA Options}
+@gccoptlist{-march=@var{architecture-type} @gol
+-mbig-switch  -mdisable-fpregs  -mdisable-indexing @gol
+-mfast-indirect-calls  -mgas  -mgnu-ld   -mhp-ld @gol
+-mfixed-range=@var{register-range} @gol
+-mjump-in-delay -mlinker-opt -mlong-calls @gol
+-mlong-load-store  -mno-big-switch  -mno-disable-fpregs @gol
+-mno-disable-indexing  -mno-fast-indirect-calls  -mno-gas @gol
+-mno-jump-in-delay  -mno-long-load-store @gol
+-mno-portable-runtime  -mno-soft-float @gol
+-mno-space-regs  -msoft-float  -mpa-risc-1-0 @gol
+-mpa-risc-1-1  -mpa-risc-2-0  -mportable-runtime @gol
+-mschedule=@var{cpu-type}  -mspace-regs  -msio  -mwsio @gol
+-munix=@var{unix-std}  -nolibdld  -static  -threads}
+
+@emph{i386 and x86-64 Options}
+@gccoptlist{-mtune=@var{cpu-type}  -march=@var{cpu-type} @gol
+-mfpmath=@var{unit} @gol
+-masm=@var{dialect}  -mno-fancy-math-387 @gol
+-mno-fp-ret-in-387  -msoft-float @gol
+-mno-wide-multiply  -mrtd  -malign-double @gol
+-mpreferred-stack-boundary=@var{num}
+-mincoming-stack-boundary=@var{num} @gol
+-mcld -mcx16 -msahf -mmovbe -mcrc32 -mrecip @gol
+-mvzeroupper -mprefer-avx128 @gol
+-mmmx  -msse  -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 -mavx @gol
+-maes -mpclmul -mfsgsbase -mrdrnd -mf16c -mfused-madd @gol
+-msse4a -m3dnow -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop -mlwp @gol
+-mthreads  -mno-align-stringops  -minline-all-stringops @gol
+-minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol
+-mpush-args  -maccumulate-outgoing-args  -m128bit-long-double @gol
+-m96bit-long-double  -mregparm=@var{num}  -msseregparm @gol
+-mveclibabi=@var{type} -mvect8-ret-in-mem @gol
+-mpc32 -mpc64 -mpc80 -mstackrealign @gol
+-momit-leaf-frame-pointer  -mno-red-zone -mno-tls-direct-seg-refs @gol
+-mcmodel=@var{code-model} -mabi=@var{name} @gol
+-m32  -m64 -mlarge-data-threshold=@var{num} @gol
+-msse2avx -mfentry -m8bit-idiv @gol
+-mavx256-split-unaligned-load -mavx256-split-unaligned-store}
+
+@emph{i386 and x86-64 Windows Options}
+@gccoptlist{-mconsole -mcygwin -mno-cygwin -mdll
+-mnop-fun-dllimport -mthread @gol
+-municode -mwin32 -mwindows -fno-set-stack-executable}
+
+@emph{IA-64 Options}
+@gccoptlist{-mbig-endian  -mlittle-endian  -mgnu-as  -mgnu-ld  -mno-pic @gol
+-mvolatile-asm-stop  -mregister-names  -msdata -mno-sdata @gol
+-mconstant-gp  -mauto-pic  -mfused-madd @gol
+-minline-float-divide-min-latency @gol
+-minline-float-divide-max-throughput @gol
+-mno-inline-float-divide @gol
+-minline-int-divide-min-latency @gol
+-minline-int-divide-max-throughput  @gol
+-mno-inline-int-divide @gol
+-minline-sqrt-min-latency -minline-sqrt-max-throughput @gol
+-mno-inline-sqrt @gol
+-mdwarf2-asm -mearly-stop-bits @gol
+-mfixed-range=@var{register-range} -mtls-size=@var{tls-size} @gol
+-mtune=@var{cpu-type} -milp32 -mlp64 @gol
+-msched-br-data-spec -msched-ar-data-spec -msched-control-spec @gol
+-msched-br-in-data-spec -msched-ar-in-data-spec -msched-in-control-spec @gol
+-msched-spec-ldc -msched-spec-control-ldc @gol
+-msched-prefer-non-data-spec-insns -msched-prefer-non-control-spec-insns @gol
+-msched-stop-bits-after-every-cycle -msched-count-spec-in-critical-path @gol
+-msel-sched-dont-check-control-spec -msched-fp-mem-deps-zero-cost @gol
+-msched-max-memory-insns-hard-limit -msched-max-memory-insns=@var{max-insns}}
+
+@emph{IA-64/VMS Options}
+@gccoptlist{-mvms-return-codes -mdebug-main=@var{prefix} -mmalloc64}
+
+@emph{LM32 Options}
+@gccoptlist{-mbarrel-shift-enabled -mdivide-enabled -mmultiply-enabled @gol
+-msign-extend-enabled -muser-enabled}
+
+@emph{M32R/D Options}
+@gccoptlist{-m32r2 -m32rx -m32r @gol
+-mdebug @gol
+-malign-loops -mno-align-loops @gol
+-missue-rate=@var{number} @gol
+-mbranch-cost=@var{number} @gol
+-mmodel=@var{code-size-model-type} @gol
+-msdata=@var{sdata-type} @gol
+-mno-flush-func -mflush-func=@var{name} @gol
+-mno-flush-trap -mflush-trap=@var{number} @gol
+-G @var{num}}
+
+@emph{M32C Options}
+@gccoptlist{-mcpu=@var{cpu} -msim -memregs=@var{number}}
+
+@emph{M680x0 Options}
+@gccoptlist{-march=@var{arch}  -mcpu=@var{cpu}  -mtune=@var{tune}
+-m68000  -m68020  -m68020-40  -m68020-60  -m68030  -m68040 @gol
+-m68060  -mcpu32  -m5200  -m5206e  -m528x  -m5307  -m5407 @gol
+-mcfv4e  -mbitfield  -mno-bitfield  -mc68000  -mc68020 @gol
+-mnobitfield  -mrtd  -mno-rtd  -mdiv  -mno-div  -mshort @gol
+-mno-short  -mhard-float  -m68881  -msoft-float  -mpcrel @gol
+-malign-int  -mstrict-align  -msep-data  -mno-sep-data @gol
+-mshared-library-id=n  -mid-shared-library  -mno-id-shared-library @gol
+-mxgot -mno-xgot}
+
+@emph{M68hc1x Options}
+@gccoptlist{-m6811  -m6812  -m68hc11  -m68hc12   -m68hcs12 @gol
+-mauto-incdec  -minmax  -mlong-calls  -mshort @gol
+-msoft-reg-count=@var{count}}
+
+@emph{MCore Options}
+@gccoptlist{-mhardlit  -mno-hardlit  -mdiv  -mno-div  -mrelax-immediates @gol
+-mno-relax-immediates  -mwide-bitfields  -mno-wide-bitfields @gol
+-m4byte-functions  -mno-4byte-functions  -mcallgraph-data @gol
+-mno-callgraph-data  -mslow-bytes  -mno-slow-bytes  -mno-lsim @gol
+-mlittle-endian  -mbig-endian  -m210  -m340  -mstack-increment}
+
+@emph{MeP Options}
+@gccoptlist{-mabsdiff -mall-opts -maverage -mbased=@var{n} -mbitops @gol
+-mc=@var{n} -mclip -mconfig=@var{name} -mcop -mcop32 -mcop64 -mivc2 @gol
+-mdc -mdiv -meb -mel -mio-volatile -ml -mleadz -mm -mminmax @gol
+-mmult -mno-opts -mrepeat -ms -msatur -msdram -msim -msimnovec -mtf @gol
+-mtiny=@var{n}}
+
+@emph{MicroBlaze Options}
+@gccoptlist{-msoft-float -mhard-float -msmall-divides -mcpu=@var{cpu} @gol
+-mmemcpy -mxl-soft-mul -mxl-soft-div -mxl-barrel-shift @gol
+-mxl-pattern-compare -mxl-stack-check -mxl-gp-opt -mno-clearbss @gol
+-mxl-multiply-high -mxl-float-convert -mxl-float-sqrt @gol
+-mxl-mode-@var{app-model}}
+
+@emph{MIPS Options}
+@gccoptlist{-EL  -EB  -march=@var{arch}  -mtune=@var{arch} @gol
+-mips1  -mips2  -mips3  -mips4  -mips32  -mips32r2 @gol
+-mips64  -mips64r2 @gol
+-mips16  -mno-mips16  -mflip-mips16 @gol
+-minterlink-mips16  -mno-interlink-mips16 @gol
+-mabi=@var{abi}  -mabicalls  -mno-abicalls @gol
+-mshared  -mno-shared  -mplt  -mno-plt  -mxgot  -mno-xgot @gol
+-mgp32  -mgp64  -mfp32  -mfp64  -mhard-float  -msoft-float @gol
+-msingle-float  -mdouble-float  -mdsp  -mno-dsp  -mdspr2  -mno-dspr2 @gol
+-mfpu=@var{fpu-type} @gol
+-msmartmips  -mno-smartmips @gol
+-mpaired-single  -mno-paired-single  -mdmx  -mno-mdmx @gol
+-mips3d  -mno-mips3d  -mmt  -mno-mt  -mllsc  -mno-llsc @gol
+-mlong64  -mlong32  -msym32  -mno-sym32 @gol
+-G@var{num}  -mlocal-sdata  -mno-local-sdata @gol
+-mextern-sdata  -mno-extern-sdata  -mgpopt  -mno-gopt @gol
+-membedded-data  -mno-embedded-data @gol
+-muninit-const-in-rodata  -mno-uninit-const-in-rodata @gol
+-mcode-readable=@var{setting} @gol
+-msplit-addresses  -mno-split-addresses @gol
+-mexplicit-relocs  -mno-explicit-relocs @gol
+-mcheck-zero-division  -mno-check-zero-division @gol
+-mdivide-traps  -mdivide-breaks @gol
+-mmemcpy  -mno-memcpy  -mlong-calls  -mno-long-calls @gol
+-mmad  -mno-mad  -mfused-madd  -mno-fused-madd  -nocpp @gol
+-mfix-r4000  -mno-fix-r4000  -mfix-r4400  -mno-fix-r4400 @gol
+-mfix-r10000 -mno-fix-r10000  -mfix-vr4120  -mno-fix-vr4120 @gol
+-mfix-vr4130  -mno-fix-vr4130  -mfix-sb1  -mno-fix-sb1 @gol
+-mflush-func=@var{func}  -mno-flush-func @gol
+-mbranch-cost=@var{num}  -mbranch-likely  -mno-branch-likely @gol
+-mfp-exceptions -mno-fp-exceptions @gol
+-mvr4130-align -mno-vr4130-align -msynci -mno-synci @gol
+-mrelax-pic-calls -mno-relax-pic-calls -mmcount-ra-address}
+
+@emph{MMIX Options}
+@gccoptlist{-mlibfuncs  -mno-libfuncs  -mepsilon  -mno-epsilon  -mabi=gnu @gol
+-mabi=mmixware  -mzero-extend  -mknuthdiv  -mtoplevel-symbols @gol
+-melf  -mbranch-predict  -mno-branch-predict  -mbase-addresses @gol
+-mno-base-addresses  -msingle-exit  -mno-single-exit}
+
+@emph{MN10300 Options}
+@gccoptlist{-mmult-bug  -mno-mult-bug @gol
+-mno-am33 -mam33 -mam33-2 -mam34 @gol
+-mtune=@var{cpu-type} @gol
+-mreturn-pointer-on-d0 @gol
+-mno-crt0  -mrelax -mliw}
+
+@emph{PDP-11 Options}
+@gccoptlist{-mfpu  -msoft-float  -mac0  -mno-ac0  -m40  -m45  -m10 @gol
+-mbcopy  -mbcopy-builtin  -mint32  -mno-int16 @gol
+-mint16  -mno-int32  -mfloat32  -mno-float64 @gol
+-mfloat64  -mno-float32  -mabshi  -mno-abshi @gol
+-mbranch-expensive  -mbranch-cheap @gol
+-munix-asm  -mdec-asm}
+
+@emph{picoChip Options}
+@gccoptlist{-mae=@var{ae_type} -mvliw-lookahead=@var{N} @gol
+-msymbol-as-address -mno-inefficient-warnings}
+
+@emph{PowerPC Options}
+See RS/6000 and PowerPC Options.
+
+@emph{RS/6000 and PowerPC Options}
+@gccoptlist{-mcpu=@var{cpu-type} @gol
+-mtune=@var{cpu-type} @gol
+-mcmodel=@var{code-model} @gol
+-mpower  -mno-power  -mpower2  -mno-power2 @gol
+-mpowerpc  -mpowerpc64  -mno-powerpc @gol
+-maltivec  -mno-altivec @gol
+-mpowerpc-gpopt  -mno-powerpc-gpopt @gol
+-mpowerpc-gfxopt  -mno-powerpc-gfxopt @gol
+-mmfcrf  -mno-mfcrf  -mpopcntb  -mno-popcntb -mpopcntd -mno-popcntd @gol
+-mfprnd  -mno-fprnd @gol
+-mcmpb -mno-cmpb -mmfpgpr -mno-mfpgpr -mhard-dfp -mno-hard-dfp @gol
+-mnew-mnemonics  -mold-mnemonics @gol
+-mfull-toc   -mminimal-toc  -mno-fp-in-toc  -mno-sum-in-toc @gol
+-m64  -m32  -mxl-compat  -mno-xl-compat  -mpe @gol
+-malign-power  -malign-natural @gol
+-msoft-float  -mhard-float  -mmultiple  -mno-multiple @gol
+-msingle-float -mdouble-float -msimple-fpu @gol
+-mstring  -mno-string  -mupdate  -mno-update @gol
+-mavoid-indexed-addresses  -mno-avoid-indexed-addresses @gol
+-mfused-madd  -mno-fused-madd  -mbit-align  -mno-bit-align @gol
+-mstrict-align  -mno-strict-align  -mrelocatable @gol
+-mno-relocatable  -mrelocatable-lib  -mno-relocatable-lib @gol
+-mtoc  -mno-toc  -mlittle  -mlittle-endian  -mbig  -mbig-endian @gol
+-mdynamic-no-pic  -maltivec -mswdiv  -msingle-pic-base @gol
+-mprioritize-restricted-insns=@var{priority} @gol
+-msched-costly-dep=@var{dependence_type} @gol
+-minsert-sched-nops=@var{scheme} @gol
+-mcall-sysv  -mcall-netbsd @gol
+-maix-struct-return  -msvr4-struct-return @gol
+-mabi=@var{abi-type} -msecure-plt -mbss-plt @gol
+-mblock-move-inline-limit=@var{num} @gol
+-misel -mno-isel @gol
+-misel=yes  -misel=no @gol
+-mspe -mno-spe @gol
+-mspe=yes  -mspe=no @gol
+-mpaired @gol
+-mgen-cell-microcode -mwarn-cell-microcode @gol
+-mvrsave -mno-vrsave @gol
+-mmulhw -mno-mulhw @gol
+-mdlmzb -mno-dlmzb @gol
+-mfloat-gprs=yes  -mfloat-gprs=no -mfloat-gprs=single -mfloat-gprs=double @gol
+-mprototype  -mno-prototype @gol
+-msim  -mmvme  -mads  -myellowknife  -memb  -msdata @gol
+-msdata=@var{opt}  -mvxworks  -G @var{num}  -pthread @gol
+-mrecip -mrecip=@var{opt} -mno-recip -mrecip-precision
+-mno-recip-precision @gol
+-mveclibabi=@var{type} -mfriz -mno-friz}
+
+@emph{RX Options}
+@gccoptlist{-m64bit-doubles  -m32bit-doubles  -fpu  -nofpu@gol
+-mcpu=@gol
+-mbig-endian-data -mlittle-endian-data @gol
+-msmall-data @gol
+-msim  -mno-sim@gol
+-mas100-syntax -mno-as100-syntax@gol
+-mrelax@gol
+-mmax-constant-size=@gol
+-mint-register=@gol
+-msave-acc-in-interrupts}
+
+@emph{S/390 and zSeries Options}
+@gccoptlist{-mtune=@var{cpu-type}  -march=@var{cpu-type} @gol
+-mhard-float  -msoft-float  -mhard-dfp -mno-hard-dfp @gol
+-mlong-double-64 -mlong-double-128 @gol
+-mbackchain  -mno-backchain -mpacked-stack  -mno-packed-stack @gol
+-msmall-exec  -mno-small-exec  -mmvcle -mno-mvcle @gol
+-m64  -m31  -mdebug  -mno-debug  -mesa  -mzarch @gol
+-mtpf-trace -mno-tpf-trace  -mfused-madd  -mno-fused-madd @gol
+-mwarn-framesize  -mwarn-dynamicstack  -mstack-size -mstack-guard}
+
+@emph{Score Options}
+@gccoptlist{-meb -mel @gol
+-mnhwloop @gol
+-muls @gol
+-mmac @gol
+-mscore5 -mscore5u -mscore7 -mscore7d}
+
+@emph{SH Options}
+@gccoptlist{-m1  -m2  -m2e @gol
+-m2a-nofpu -m2a-single-only -m2a-single -m2a @gol
+-m3  -m3e @gol
+-m4-nofpu  -m4-single-only  -m4-single  -m4 @gol
+-m4a-nofpu -m4a-single-only -m4a-single -m4a -m4al @gol
+-m5-64media  -m5-64media-nofpu @gol
+-m5-32media  -m5-32media-nofpu @gol
+-m5-compact  -m5-compact-nofpu @gol
+-mb  -ml  -mdalign  -mrelax @gol
+-mbigtable -mfmovd -mhitachi -mrenesas -mno-renesas -mnomacsave @gol
+-mieee -mno-ieee -mbitops  -misize  -minline-ic_invalidate -mpadstruct @gol
+-mspace -mprefergot  -musermode -multcost=@var{number} -mdiv=@var{strategy} @gol
+-mdivsi3_libfunc=@var{name} -mfixed-range=@var{register-range} @gol
+-madjust-unroll -mindexed-addressing -mgettrcost=@var{number} -mpt-fixed @gol
+-maccumulate-outgoing-args -minvalid-symbols}
+
+@emph{Solaris 2 Options}
+@gccoptlist{-mimpure-text  -mno-impure-text @gol
+-threads -pthreads -pthread}
+
+@emph{SPARC Options}
+@gccoptlist{-mcpu=@var{cpu-type} @gol
+-mtune=@var{cpu-type} @gol
+-mcmodel=@var{code-model} @gol
+-m32  -m64  -mapp-regs  -mno-app-regs @gol
+-mfaster-structs  -mno-faster-structs @gol
+-mfpu  -mno-fpu  -mhard-float  -msoft-float @gol
+-mhard-quad-float  -msoft-quad-float @gol
+-mlittle-endian @gol
+-mstack-bias  -mno-stack-bias @gol
+-munaligned-doubles  -mno-unaligned-doubles @gol
+-mv8plus  -mno-v8plus  -mvis  -mno-vis @gol
+-mfix-at697f}
+
+@emph{SPU Options}
+@gccoptlist{-mwarn-reloc -merror-reloc @gol
+-msafe-dma -munsafe-dma @gol
+-mbranch-hints @gol
+-msmall-mem -mlarge-mem -mstdmain @gol
+-mfixed-range=@var{register-range} @gol
+-mea32 -mea64 @gol
+-maddress-space-conversion -mno-address-space-conversion @gol
+-mcache-size=@var{cache-size} @gol
+-matomic-updates -mno-atomic-updates}
+
+@emph{System V Options}
+@gccoptlist{-Qy  -Qn  -YP,@var{paths}  -Ym,@var{dir}}
+
+@emph{V850 Options}
+@gccoptlist{-mlong-calls  -mno-long-calls  -mep  -mno-ep @gol
+-mprolog-function  -mno-prolog-function  -mspace @gol
+-mtda=@var{n}  -msda=@var{n}  -mzda=@var{n} @gol
+-mapp-regs  -mno-app-regs @gol
+-mdisable-callt  -mno-disable-callt @gol
+-mv850e2v3 @gol
+-mv850e2 @gol
+-mv850e1 -mv850es @gol
+-mv850e @gol
+-mv850  -mbig-switch}
+
+@emph{VAX Options}
+@gccoptlist{-mg  -mgnu  -munix}
+
+@emph{VxWorks Options}
+@gccoptlist{-mrtp  -non-static  -Bstatic  -Bdynamic @gol
+-Xbind-lazy  -Xbind-now}
+
+@emph{x86-64 Options}
+See i386 and x86-64 Options.
+
+@emph{Xstormy16 Options}
+@gccoptlist{-msim}
+
+@emph{Xtensa Options}
+@gccoptlist{-mconst16 -mno-const16 @gol
+-mfused-madd  -mno-fused-madd @gol
+-mforce-no-pic @gol
+-mserialize-volatile  -mno-serialize-volatile @gol
+-mtext-section-literals  -mno-text-section-literals @gol
+-mtarget-align  -mno-target-align @gol
+-mlongcalls  -mno-longcalls}
+
+@emph{zSeries Options}
+See S/390 and zSeries Options.
+
+@item Code Generation Options
+@xref{Code Gen Options,,Options for Code Generation Conventions}.
+@gccoptlist{-fcall-saved-@var{reg}  -fcall-used-@var{reg} @gol
+-ffixed-@var{reg}  -fexceptions @gol
+-fnon-call-exceptions  -funwind-tables @gol
+-fasynchronous-unwind-tables @gol
+-finhibit-size-directive  -finstrument-functions @gol
+-finstrument-functions-exclude-function-list=@var{sym},@var{sym},@dots{} @gol
+-finstrument-functions-exclude-file-list=@var{file},@var{file},@dots{} @gol
+-fno-common  -fno-ident @gol
+-fpcc-struct-return  -fpic  -fPIC -fpie -fPIE @gol
+-fno-jump-tables @gol
+-frecord-gcc-switches @gol
+-freg-struct-return  -fshort-enums @gol
+-fshort-double  -fshort-wchar @gol
+-fverbose-asm  -fpack-struct[=@var{n}]  -fstack-check @gol
+-fstack-limit-register=@var{reg}  -fstack-limit-symbol=@var{sym} @gol
+-fno-stack-limit -fsplit-stack @gol
+-fleading-underscore  -ftls-model=@var{model} @gol
+-ftrapv  -fwrapv  -fbounds-check @gol
+-fvisibility -fstrict-volatile-bitfields}
+@end table
+
+@menu
+* Overall Options::     Controlling the kind of output:
+                        an executable, object files, assembler files,
+                        or preprocessed source.
+* C Dialect Options::   Controlling the variant of C language compiled.
+* C++ Dialect Options:: Variations on C++.
+* Objective-C and Objective-C++ Dialect Options:: Variations on Objective-C
+                        and Objective-C++.
+* Language Independent Options:: Controlling how diagnostics should be
+                        formatted.
+* Warning Options::     How picky should the compiler be?
+* Debugging Options::   Symbol tables, measurements, and debugging dumps.
+* Optimize Options::    How much optimization?
+* Preprocessor Options:: Controlling header files and macro definitions.
+                         Also, getting dependency information for Make.
+* Assembler Options::   Passing options to the assembler.
+* Link Options::        Specifying libraries and so on.
+* Directory Options::   Where to find header files and libraries.
+                        Where to find the compiler executable files.
+* Spec Files::          How to pass switches to sub-processes.
+* Target Options::      Running a cross-compiler, or an old version of GCC.
+@end menu
+
+@node Overall Options
+@section Options Controlling the Kind of Output
+
+Compilation can involve up to four stages: preprocessing, compilation
+proper, assembly and linking, always in that order.  GCC is capable of
+preprocessing and compiling several files either into several
+assembler input files, or into one assembler input file; then each
+assembler input file produces an object file, and linking combines all
+the object files (those newly compiled, and those specified as input)
+into an executable file.
+
+@cindex file name suffix
+For any given input file, the file name suffix determines what kind of
+compilation is done:
+
+@table @gcctabopt
+@item @var{file}.c
+C source code which must be preprocessed.
+
+@item @var{file}.i
+C source code which should not be preprocessed.
+
+@item @var{file}.ii
+C++ source code which should not be preprocessed.
+
+@item @var{file}.m
+Objective-C source code.  Note that you must link with the @file{libobjc}
+library to make an Objective-C program work.
+
+@item @var{file}.mi
+Objective-C source code which should not be preprocessed.
+
+@item @var{file}.mm
+@itemx @var{file}.M
+Objective-C++ source code.  Note that you must link with the @file{libobjc}
+library to make an Objective-C++ program work.  Note that @samp{.M} refers
+to a literal capital M@.
+
+@item @var{file}.mii
+Objective-C++ source code which should not be preprocessed.
+
+@item @var{file}.h
+C, C++, Objective-C or Objective-C++ header file to be turned into a
+precompiled header (default), or C, C++ header file to be turned into an
+Ada spec (via the @option{-fdump-ada-spec} switch).
+
+@item @var{file}.cc
+@itemx @var{file}.cp
+@itemx @var{file}.cxx
+@itemx @var{file}.cpp
+@itemx @var{file}.CPP
+@itemx @var{file}.c++
+@itemx @var{file}.C
+C++ source code which must be preprocessed.  Note that in @samp{.cxx},
+the last two letters must both be literally @samp{x}.  Likewise,
+@samp{.C} refers to a literal capital C@.
+
+@item @var{file}.mm
+@itemx @var{file}.M
+Objective-C++ source code which must be preprocessed.
+
+@item @var{file}.mii
+Objective-C++ source code which should not be preprocessed.
+
+@item @var{file}.hh
+@itemx @var{file}.H
+@itemx @var{file}.hp
+@itemx @var{file}.hxx
+@itemx @var{file}.hpp
+@itemx @var{file}.HPP
+@itemx @var{file}.h++
+@itemx @var{file}.tcc
+C++ header file to be turned into a precompiled header or Ada spec.
+
+@item @var{file}.f
+@itemx @var{file}.for
+@itemx @var{file}.ftn
+Fixed form Fortran source code which should not be preprocessed.
+
+@item @var{file}.F
+@itemx @var{file}.FOR
+@itemx @var{file}.fpp
+@itemx @var{file}.FPP
+@itemx @var{file}.FTN
+Fixed form Fortran source code which must be preprocessed (with the traditional
+preprocessor).
+
+@item @var{file}.f90
+@itemx @var{file}.f95
+@itemx @var{file}.f03
+@itemx @var{file}.f08
+Free form Fortran source code which should not be preprocessed.
+
+@item @var{file}.F90
+@itemx @var{file}.F95
+@itemx @var{file}.F03
+@itemx @var{file}.F08
+Free form Fortran source code which must be preprocessed (with the
+traditional preprocessor).
+
+@item @var{file}.go
+Go source code.
+
+@c FIXME: Descriptions of Java file types.
+@c @var{file}.java
+@c @var{file}.class
+@c @var{file}.zip
+@c @var{file}.jar
+
+@item @var{file}.ads
+Ada source code file which contains a library unit declaration (a
+declaration of a package, subprogram, or generic, or a generic
+instantiation), or a library unit renaming declaration (a package,
+generic, or subprogram renaming declaration).  Such files are also
+called @dfn{specs}.
+
+@item @var{file}.adb
+Ada source code file containing a library unit body (a subprogram or
+package body).  Such files are also called @dfn{bodies}.
+
+@c GCC also knows about some suffixes for languages not yet included:
+@c Pascal:
+@c @var{file}.p
+@c @var{file}.pas
+@c Ratfor:
+@c @var{file}.r
+
+@item @var{file}.s
+Assembler code.
+
+@item @var{file}.S
+@itemx @var{file}.sx
+Assembler code which must be preprocessed.
+
+@item @var{other}
+An object file to be fed straight into linking.
+Any file name with no recognized suffix is treated this way.
+@end table
+
+@opindex x
+You can specify the input language explicitly with the @option{-x} option:
+
+@table @gcctabopt
+@item -x @var{language}
+Specify explicitly the @var{language} for the following input files
+(rather than letting the compiler choose a default based on the file
+name suffix).  This option applies to all following input files until
+the next @option{-x} option.  Possible values for @var{language} are:
+@smallexample
+c  c-header  cpp-output
+c++  c++-header  c++-cpp-output
+objective-c  objective-c-header  objective-c-cpp-output
+objective-c++ objective-c++-header objective-c++-cpp-output
+assembler  assembler-with-cpp
+ada
+f77  f77-cpp-input f95  f95-cpp-input
+go
+java
+@end smallexample
+
+@item -x none
+Turn off any specification of a language, so that subsequent files are
+handled according to their file name suffixes (as they are if @option{-x}
+has not been used at all).
+
+@item -pass-exit-codes
+@opindex pass-exit-codes
+Normally the @command{gcc} program will exit with the code of 1 if any
+phase of the compiler returns a non-success return code.  If you specify
+@option{-pass-exit-codes}, the @command{gcc} program will instead return with
+numerically highest error produced by any phase that returned an error
+indication.  The C, C++, and Fortran frontends return 4, if an internal
+compiler error is encountered.
+@end table
+
+If you only want some of the stages of compilation, you can use
+@option{-x} (or filename suffixes) to tell @command{gcc} where to start, and
+one of the options @option{-c}, @option{-S}, or @option{-E} to say where
+@command{gcc} is to stop.  Note that some combinations (for example,
+@samp{-x cpp-output -E}) instruct @command{gcc} to do nothing at all.
+
+@table @gcctabopt
+@item -c
+@opindex c
+Compile or assemble the source files, but do not link.  The linking
+stage simply is not done.  The ultimate output is in the form of an
+object file for each source file.
+
+By default, the object file name for a source file is made by replacing
+the suffix @samp{.c}, @samp{.i}, @samp{.s}, etc., with @samp{.o}.
+
+Unrecognized input files, not requiring compilation or assembly, are
+ignored.
+
+@item -S
+@opindex S
+Stop after the stage of compilation proper; do not assemble.  The output
+is in the form of an assembler code file for each non-assembler input
+file specified.
+
+By default, the assembler file name for a source file is made by
+replacing the suffix @samp{.c}, @samp{.i}, etc., with @samp{.s}.
+
+Input files that don't require compilation are ignored.
+
+@item -E
+@opindex E
+Stop after the preprocessing stage; do not run the compiler proper.  The
+output is in the form of preprocessed source code, which is sent to the
+standard output.
+
+Input files which don't require preprocessing are ignored.
+
+@cindex output file option
+@item -o @var{file}
+@opindex o
+Place output in file @var{file}.  This applies regardless to whatever
+sort of output is being produced, whether it be an executable file,
+an object file, an assembler file or preprocessed C code.
+
+If @option{-o} is not specified, the default is to put an executable
+file in @file{a.out}, the object file for
+@file{@var{source}.@var{suffix}} in @file{@var{source}.o}, its
+assembler file in @file{@var{source}.s}, a precompiled header file in
+@file{@var{source}.@var{suffix}.gch}, and all preprocessed C source on
+standard output.
+
+@item -v
+@opindex v
+Print (on standard error output) the commands executed to run the stages
+of compilation.  Also print the version number of the compiler driver
+program and of the preprocessor and the compiler proper.
+
+@item -###
+@opindex ###
+Like @option{-v} except the commands are not executed and arguments
+are quoted unless they contain only alphanumeric characters or @code{./-_}.
+This is useful for shell scripts to capture the driver-generated command lines.
+
+@item -pipe
+@opindex pipe
+Use pipes rather than temporary files for communication between the
+various stages of compilation.  This fails to work on some systems where
+the assembler is unable to read from a pipe; but the GNU assembler has
+no trouble.
+
+@item --help
+@opindex help
+Print (on the standard output) a description of the command line options
+understood by @command{gcc}.  If the @option{-v} option is also specified
+then @option{--help} will also be passed on to the various processes
+invoked by @command{gcc}, so that they can display the command line options
+they accept.  If the @option{-Wextra} option has also been specified
+(prior to the @option{--help} option), then command line options which
+have no documentation associated with them will also be displayed.
+
+@item --target-help
+@opindex target-help
+Print (on the standard output) a description of target-specific command
+line options for each tool.  For some targets extra target-specific
+information may also be printed.
+
+@item --help=@{@var{class}@r{|[}^@r{]}@var{qualifier}@}@r{[},@dots{}@r{]}
+Print (on the standard output) a description of the command line
+options understood by the compiler that fit into all specified classes
+and qualifiers.  These are the supported classes:
+
+@table @asis
+@item @samp{optimizers}
+This will display all of the optimization options supported by the
+compiler.
+
+@item @samp{warnings}
+This will display all of the options controlling warning messages
+produced by the compiler.
+
+@item @samp{target}
+This will display target-specific options.  Unlike the
+@option{--target-help} option however, target-specific options of the
+linker and assembler will not be displayed.  This is because those
+tools do not currently support the extended @option{--help=} syntax.
+
+@item @samp{params}
+This will display the values recognized by the @option{--param}
+option.
+
+@item @var{language}
+This will display the options supported for @var{language}, where
+@var{language} is the name of one of the languages supported in this
+version of GCC.
+
+@item @samp{common}
+This will display the options that are common to all languages.
+@end table
+
+These are the supported qualifiers:
+
+@table @asis
+@item @samp{undocumented}
+Display only those options which are undocumented.
+
+@item @samp{joined}
+Display options which take an argument that appears after an equal
+sign in the same continuous piece of text, such as:
+@samp{--help=target}.
+
+@item @samp{separate}
+Display options which take an argument that appears as a separate word
+following the original option, such as: @samp{-o output-file}.
+@end table
+
+Thus for example to display all the undocumented target-specific
+switches supported by the compiler the following can be used:
+
+@smallexample
+--help=target,undocumented
+@end smallexample
+
+The sense of a qualifier can be inverted by prefixing it with the
+@samp{^} character, so for example to display all binary warning
+options (i.e., ones that are either on or off and that do not take an
+argument), which have a description the following can be used:
+
+@smallexample
+--help=warnings,^joined,^undocumented
+@end smallexample
+
+The argument to @option{--help=} should not consist solely of inverted
+qualifiers.
+
+Combining several classes is possible, although this usually
+restricts the output by so much that there is nothing to display.  One
+case where it does work however is when one of the classes is
+@var{target}.  So for example to display all the target-specific
+optimization options the following can be used:
+
+@smallexample
+--help=target,optimizers
+@end smallexample
+
+The @option{--help=} option can be repeated on the command line.  Each
+successive use will display its requested class of options, skipping
+those that have already been displayed.
+
+If the @option{-Q} option appears on the command line before the
+@option{--help=} option, then the descriptive text displayed by
+@option{--help=} is changed.  Instead of describing the displayed
+options, an indication is given as to whether the option is enabled,
+disabled or set to a specific value (assuming that the compiler
+knows this at the point where the @option{--help=} option is used).
+
+Here is a truncated example from the ARM port of @command{gcc}:
+
+@smallexample
+  % gcc -Q -mabi=2 --help=target -c
+  The following options are target specific:
+  -mabi=                                2
+  -mabort-on-noreturn                   [disabled]
+  -mapcs                                [disabled]
+@end smallexample
+
+The output is sensitive to the effects of previous command line
+options, so for example it is possible to find out which optimizations
+are enabled at @option{-O2} by using:
+
+@smallexample
+-Q -O2 --help=optimizers
+@end smallexample
+
+Alternatively you can discover which binary optimizations are enabled
+by @option{-O3} by using:
+
+@smallexample
+gcc -c -Q -O3 --help=optimizers > /tmp/O3-opts
+gcc -c -Q -O2 --help=optimizers > /tmp/O2-opts
+diff /tmp/O2-opts /tmp/O3-opts | grep enabled
+@end smallexample
+
+@item -no-canonical-prefixes
+@opindex no-canonical-prefixes
+Do not expand any symbolic links, resolve references to @samp{/../}
+or @samp{/./}, or make the path absolute when generating a relative
+prefix.
+
+@item --version
+@opindex version
+Display the version number and copyrights of the invoked GCC@.
+
+@item -wrapper
+@opindex wrapper
+Invoke all subcommands under a wrapper program.  The name of the
+wrapper program and its parameters are passed as a comma separated
+list.
+
+@smallexample
+gcc -c t.c -wrapper gdb,--args
+@end smallexample
+
+This will invoke all subprograms of @command{gcc} under
+@samp{gdb --args}, thus the invocation of @command{cc1} will be
+@samp{gdb --args cc1 @dots{}}.
+
+@item -fplugin=@var{name}.so
+Load the plugin code in file @var{name}.so, assumed to be a
+shared object to be dlopen'd by the compiler.  The base name of
+the shared object file is used to identify the plugin for the
+purposes of argument parsing (See
+@option{-fplugin-arg-@var{name}-@var{key}=@var{value}} below).
+Each plugin should define the callback functions specified in the
+Plugins API.
+
+@item -fplugin-arg-@var{name}-@var{key}=@var{value}
+Define an argument called @var{key} with a value of @var{value}
+for the plugin called @var{name}.
+
+@item -fdump-ada-spec@r{[}-slim@r{]}
+For C and C++ source and include files, generate corresponding Ada
+specs. @xref{Generating Ada Bindings for C and C++ headers,,, gnat_ugn,
+GNAT User's Guide}, which provides detailed documentation on this feature.
+
+@item -fdump-go-spec=@var{file}
+For input files in any language, generate corresponding Go
+declarations in @var{file}.  This generates Go @code{const},
+@code{type}, @code{var}, and @code{func} declarations which may be a
+useful way to start writing a Go interface to code written in some
+other language.
+
+@include @value{srcdir}/../libiberty/at-file.texi
+@end table
+
+@node Invoking G++
+@section Compiling C++ Programs
+
+@cindex suffixes for C++ source
+@cindex C++ source file suffixes
+C++ source files conventionally use one of the suffixes @samp{.C},
+@samp{.cc}, @samp{.cpp}, @samp{.CPP}, @samp{.c++}, @samp{.cp}, or
+@samp{.cxx}; C++ header files often use @samp{.hh}, @samp{.hpp},
+@samp{.H}, or (for shared template code) @samp{.tcc}; and
+preprocessed C++ files use the suffix @samp{.ii}.  GCC recognizes
+files with these names and compiles them as C++ programs even if you
+call the compiler the same way as for compiling C programs (usually
+with the name @command{gcc}).
+
+@findex g++
+@findex c++
+However, the use of @command{gcc} does not add the C++ library.
+@command{g++} is a program that calls GCC and treats @samp{.c},
+@samp{.h} and @samp{.i} files as C++ source files instead of C source
+files unless @option{-x} is used, and automatically specifies linking
+against the C++ library.  This program is also useful when
+precompiling a C header file with a @samp{.h} extension for use in C++
+compilations.  On many systems, @command{g++} is also installed with
+the name @command{c++}.
+
+@cindex invoking @command{g++}
+When you compile C++ programs, you may specify many of the same
+command-line options that you use for compiling programs in any
+language; or command-line options meaningful for C and related
+languages; or options that are meaningful only for C++ programs.
+@xref{C Dialect Options,,Options Controlling C Dialect}, for
+explanations of options for languages related to C@.
+@xref{C++ Dialect Options,,Options Controlling C++ Dialect}, for
+explanations of options that are meaningful only for C++ programs.
+
+@node C Dialect Options
+@section Options Controlling C Dialect
+@cindex dialect options
+@cindex language dialect options
+@cindex options, dialect
+
+The following options control the dialect of C (or languages derived
+from C, such as C++, Objective-C and Objective-C++) that the compiler
+accepts:
+
+@table @gcctabopt
+@cindex ANSI support
+@cindex ISO support
+@item -ansi
+@opindex ansi
+In C mode, this is equivalent to @samp{-std=c90}. In C++ mode, it is
+equivalent to @samp{-std=c++98}.
+
+This turns off certain features of GCC that are incompatible with ISO
+C90 (when compiling C code), or of standard C++ (when compiling C++ code),
+such as the @code{asm} and @code{typeof} keywords, and
+predefined macros such as @code{unix} and @code{vax} that identify the
+type of system you are using.  It also enables the undesirable and
+rarely used ISO trigraph feature.  For the C compiler,
+it disables recognition of C++ style @samp{//} comments as well as
+the @code{inline} keyword.
+
+The alternate keywords @code{__asm__}, @code{__extension__},
+@code{__inline__} and @code{__typeof__} continue to work despite
+@option{-ansi}.  You would not want to use them in an ISO C program, of
+course, but it is useful to put them in header files that might be included
+in compilations done with @option{-ansi}.  Alternate predefined macros
+such as @code{__unix__} and @code{__vax__} are also available, with or
+without @option{-ansi}.
+
+The @option{-ansi} option does not cause non-ISO programs to be
+rejected gratuitously.  For that, @option{-pedantic} is required in
+addition to @option{-ansi}.  @xref{Warning Options}.
+
+The macro @code{__STRICT_ANSI__} is predefined when the @option{-ansi}
+option is used.  Some header files may notice this macro and refrain
+from declaring certain functions or defining certain macros that the
+ISO standard doesn't call for; this is to avoid interfering with any
+programs that might use these names for other things.
+
+Functions that would normally be built in but do not have semantics
+defined by ISO C (such as @code{alloca} and @code{ffs}) are not built-in
+functions when @option{-ansi} is used.  @xref{Other Builtins,,Other
+built-in functions provided by GCC}, for details of the functions
+affected.
+
+@item -std=
+@opindex std
+Determine the language standard. @xref{Standards,,Language Standards
+Supported by GCC}, for details of these standard versions.  This option
+is currently only supported when compiling C or C++.
+
+The compiler can accept several base standards, such as @samp{c90} or
+@samp{c++98}, and GNU dialects of those standards, such as
+@samp{gnu90} or @samp{gnu++98}.  By specifying a base standard, the
+compiler will accept all programs following that standard and those
+using GNU extensions that do not contradict it.  For example,
+@samp{-std=c90} turns off certain features of GCC that are
+incompatible with ISO C90, such as the @code{asm} and @code{typeof}
+keywords, but not other GNU extensions that do not have a meaning in
+ISO C90, such as omitting the middle term of a @code{?:}
+expression. On the other hand, by specifying a GNU dialect of a
+standard, all features the compiler support are enabled, even when
+those features change the meaning of the base standard and some
+strict-conforming programs may be rejected.  The particular standard
+is used by @option{-pedantic} to identify which features are GNU
+extensions given that version of the standard. For example
+@samp{-std=gnu90 -pedantic} would warn about C++ style @samp{//}
+comments, while @samp{-std=gnu99 -pedantic} would not.
+
+A value for this option must be provided; possible values are
+
+@table @samp
+@item c90
+@itemx c89
+@itemx iso9899:1990
+Support all ISO C90 programs (certain GNU extensions that conflict
+with ISO C90 are disabled). Same as @option{-ansi} for C code.
+
+@item iso9899:199409
+ISO C90 as modified in amendment 1.
+
+@item c99
+@itemx c9x
+@itemx iso9899:1999
+@itemx iso9899:199x
+ISO C99.  Note that this standard is not yet fully supported; see
+@w{@uref{http://gcc.gnu.org/gcc-4.6/c99status.html}} for more information.  The
+names @samp{c9x} and @samp{iso9899:199x} are deprecated.
+
+@item c1x
+ISO C1X, the draft of the next revision of the ISO C standard.
+Support is limited and experimental and features enabled by this
+option may be changed or removed if changed in or removed from the
+standard draft.
+
+@item gnu90
+@itemx gnu89
+GNU dialect of ISO C90 (including some C99 features). This
+is the default for C code.
+
+@item gnu99
+@itemx gnu9x
+GNU dialect of ISO C99.  When ISO C99 is fully implemented in GCC,
+this will become the default.  The name @samp{gnu9x} is deprecated.
+
+@item gnu1x
+GNU dialect of ISO C1X.  Support is limited and experimental and
+features enabled by this option may be changed or removed if changed
+in or removed from the standard draft.
+
+@item c++98
+The 1998 ISO C++ standard plus amendments. Same as @option{-ansi} for
+C++ code.
+
+@item gnu++98
+GNU dialect of @option{-std=c++98}.  This is the default for
+C++ code.
+
+@item c++0x
+The working draft of the upcoming ISO C++0x standard. This option
+enables experimental features that are likely to be included in
+C++0x. The working draft is constantly changing, and any feature that is
+enabled by this flag may be removed from future versions of GCC if it is
+not part of the C++0x standard.
+
+@item gnu++0x
+GNU dialect of @option{-std=c++0x}. This option enables
+experimental features that may be removed in future versions of GCC.
+@end table
+
+@item -fgnu89-inline
+@opindex fgnu89-inline
+The option @option{-fgnu89-inline} tells GCC to use the traditional
+GNU semantics for @code{inline} functions when in C99 mode.
+@xref{Inline,,An Inline Function is As Fast As a Macro}.  This option
+is accepted and ignored by GCC versions 4.1.3 up to but not including
+4.3.  In GCC versions 4.3 and later it changes the behavior of GCC in
+C99 mode.  Using this option is roughly equivalent to adding the
+@code{gnu_inline} function attribute to all inline functions
+(@pxref{Function Attributes}).
+
+The option @option{-fno-gnu89-inline} explicitly tells GCC to use the
+C99 semantics for @code{inline} when in C99 or gnu99 mode (i.e., it
+specifies the default behavior).  This option was first supported in
+GCC 4.3.  This option is not supported in @option{-std=c90} or
+@option{-std=gnu90} mode.
+
+The preprocessor macros @code{__GNUC_GNU_INLINE__} and
+@code{__GNUC_STDC_INLINE__} may be used to check which semantics are
+in effect for @code{inline} functions.  @xref{Common Predefined
+Macros,,,cpp,The C Preprocessor}.
+
+@item -aux-info @var{filename}
+@opindex aux-info
+Output to the given filename prototyped declarations for all functions
+declared and/or defined in a translation unit, including those in header
+files.  This option is silently ignored in any language other than C@.
+
+Besides declarations, the file indicates, in comments, the origin of
+each declaration (source file and line), whether the declaration was
+implicit, prototyped or unprototyped (@samp{I}, @samp{N} for new or
+@samp{O} for old, respectively, in the first character after the line
+number and the colon), and whether it came from a declaration or a
+definition (@samp{C} or @samp{F}, respectively, in the following
+character).  In the case of function definitions, a K&R-style list of
+arguments followed by their declarations is also provided, inside
+comments, after the declaration.
+
+@item -fno-asm
+@opindex fno-asm
+Do not recognize @code{asm}, @code{inline} or @code{typeof} as a
+keyword, so that code can use these words as identifiers.  You can use
+the keywords @code{__asm__}, @code{__inline__} and @code{__typeof__}
+instead.  @option{-ansi} implies @option{-fno-asm}.
+
+In C++, this switch only affects the @code{typeof} keyword, since
+@code{asm} and @code{inline} are standard keywords.  You may want to
+use the @option{-fno-gnu-keywords} flag instead, which has the same
+effect.  In C99 mode (@option{-std=c99} or @option{-std=gnu99}), this
+switch only affects the @code{asm} and @code{typeof} keywords, since
+@code{inline} is a standard keyword in ISO C99.
+
+@item -fno-builtin
+@itemx -fno-builtin-@var{function}
+@opindex fno-builtin
+@cindex built-in functions
+Don't recognize built-in functions that do not begin with
+@samp{__builtin_} as prefix.  @xref{Other Builtins,,Other built-in
+functions provided by GCC}, for details of the functions affected,
+including those which are not built-in functions when @option{-ansi} or
+@option{-std} options for strict ISO C conformance are used because they
+do not have an ISO standard meaning.
+
+GCC normally generates special code to handle certain built-in functions
+more efficiently; for instance, calls to @code{alloca} may become single
+instructions that adjust the stack directly, and calls to @code{memcpy}
+may become inline copy loops.  The resulting code is often both smaller
+and faster, but since the function calls no longer appear as such, you
+cannot set a breakpoint on those calls, nor can you change the behavior
+of the functions by linking with a different library.  In addition,
+when a function is recognized as a built-in function, GCC may use
+information about that function to warn about problems with calls to
+that function, or to generate more efficient code, even if the
+resulting code still contains calls to that function.  For example,
+warnings are given with @option{-Wformat} for bad calls to
+@code{printf}, when @code{printf} is built in, and @code{strlen} is
+known not to modify global memory.
+
+With the @option{-fno-builtin-@var{function}} option
+only the built-in function @var{function} is
+disabled.  @var{function} must not begin with @samp{__builtin_}.  If a
+function is named that is not built-in in this version of GCC, this
+option is ignored.  There is no corresponding
+@option{-fbuiltin-@var{function}} option; if you wish to enable
+built-in functions selectively when using @option{-fno-builtin} or
+@option{-ffreestanding}, you may define macros such as:
+
+@smallexample
+#define abs(n)          __builtin_abs ((n))
+#define strcpy(d, s)    __builtin_strcpy ((d), (s))
+@end smallexample
+
+@item -fhosted
+@opindex fhosted
+@cindex hosted environment
+
+Assert that compilation takes place in a hosted environment.  This implies
+@option{-fbuiltin}.  A hosted environment is one in which the
+entire standard library is available, and in which @code{main} has a return
+type of @code{int}.  Examples are nearly everything except a kernel.
+This is equivalent to @option{-fno-freestanding}.
+
+@item -ffreestanding
+@opindex ffreestanding
+@cindex hosted environment
+
+Assert that compilation takes place in a freestanding environment.  This
+implies @option{-fno-builtin}.  A freestanding environment
+is one in which the standard library may not exist, and program startup may
+not necessarily be at @code{main}.  The most obvious example is an OS kernel.
+This is equivalent to @option{-fno-hosted}.
+
+@xref{Standards,,Language Standards Supported by GCC}, for details of
+freestanding and hosted environments.
+
+@item -fopenmp
+@opindex fopenmp
+@cindex OpenMP parallel
+Enable handling of OpenMP directives @code{#pragma omp} in C/C++ and
+@code{!$omp} in Fortran.  When @option{-fopenmp} is specified, the
+compiler generates parallel code according to the OpenMP Application
+Program Interface v3.0 @w{@uref{http://www.openmp.org/}}.  This option
+implies @option{-pthread}, and thus is only supported on targets that
+have support for @option{-pthread}.
+
+@item -fms-extensions
+@opindex fms-extensions
+Accept some non-standard constructs used in Microsoft header files.
+
+In C++ code, this allows member names in structures to be similar
+to previous types declarations.
+
+@smallexample
+typedef int UOW;
+struct ABC @{
+  UOW UOW;
+@};
+@end smallexample
+
+Some cases of unnamed fields in structures and unions are only
+accepted with this option.  @xref{Unnamed Fields,,Unnamed struct/union
+fields within structs/unions}, for details.
+
+@item -fplan9-extensions
+Accept some non-standard constructs used in Plan 9 code.
+
+This enables @option{-fms-extensions}, permits passing pointers to
+structures with anonymous fields to functions which expect pointers to
+elements of the type of the field, and permits referring to anonymous
+fields declared using a typedef.  @xref{Unnamed Fields,,Unnamed
+struct/union fields within structs/unions}, for details.  This is only
+supported for C, not C++.
+
+@item -trigraphs
+@opindex trigraphs
+Support ISO C trigraphs.  The @option{-ansi} option (and @option{-std}
+options for strict ISO C conformance) implies @option{-trigraphs}.
+
+@item -no-integrated-cpp
+@opindex no-integrated-cpp
+Performs a compilation in two passes: preprocessing and compiling.  This
+option allows a user supplied "cc1", "cc1plus", or "cc1obj" via the
+@option{-B} option.  The user supplied compilation step can then add in
+an additional preprocessing step after normal preprocessing but before
+compiling.  The default is to use the integrated cpp (internal cpp)
+
+The semantics of this option will change if "cc1", "cc1plus", and
+"cc1obj" are merged.
+
+@cindex traditional C language
+@cindex C language, traditional
+@item -traditional
+@itemx -traditional-cpp
+@opindex traditional-cpp
+@opindex traditional
+Formerly, these options caused GCC to attempt to emulate a pre-standard
+C compiler.  They are now only supported with the @option{-E} switch.
+The preprocessor continues to support a pre-standard mode.  See the GNU
+CPP manual for details.
+
+@item -fcond-mismatch
+@opindex fcond-mismatch
+Allow conditional expressions with mismatched types in the second and
+third arguments.  The value of such an expression is void.  This option
+is not supported for C++.
+
+@item -flax-vector-conversions
+@opindex flax-vector-conversions
+Allow implicit conversions between vectors with differing numbers of
+elements and/or incompatible element types.  This option should not be
+used for new code.
+
+@item -funsigned-char
+@opindex funsigned-char
+Let the type @code{char} be unsigned, like @code{unsigned char}.
+
+Each kind of machine has a default for what @code{char} should
+be.  It is either like @code{unsigned char} by default or like
+@code{signed char} by default.
+
+Ideally, a portable program should always use @code{signed char} or
+@code{unsigned char} when it depends on the signedness of an object.
+But many programs have been written to use plain @code{char} and
+expect it to be signed, or expect it to be unsigned, depending on the
+machines they were written for.  This option, and its inverse, let you
+make such a program work with the opposite default.
+
+The type @code{char} is always a distinct type from each of
+@code{signed char} or @code{unsigned char}, even though its behavior
+is always just like one of those two.
+
+@item -fsigned-char
+@opindex fsigned-char
+Let the type @code{char} be signed, like @code{signed char}.
+
+Note that this is equivalent to @option{-fno-unsigned-char}, which is
+the negative form of @option{-funsigned-char}.  Likewise, the option
+@option{-fno-signed-char} is equivalent to @option{-funsigned-char}.
+
+@item -fsigned-bitfields
+@itemx -funsigned-bitfields
+@itemx -fno-signed-bitfields
+@itemx -fno-unsigned-bitfields
+@opindex fsigned-bitfields
+@opindex funsigned-bitfields
+@opindex fno-signed-bitfields
+@opindex fno-unsigned-bitfields
+These options control whether a bit-field is signed or unsigned, when the
+declaration does not use either @code{signed} or @code{unsigned}.  By
+default, such a bit-field is signed, because this is consistent: the
+basic integer types such as @code{int} are signed types.
+@end table
+
+@node C++ Dialect Options
+@section Options Controlling C++ Dialect
+
+@cindex compiler options, C++
+@cindex C++ options, command line
+@cindex options, C++
+This section describes the command-line options that are only meaningful
+for C++ programs; but you can also use most of the GNU compiler options
+regardless of what language your program is in.  For example, you
+might compile a file @code{firstClass.C} like this:
+
+@smallexample
+g++ -g -frepo -O -c firstClass.C
+@end smallexample
+
+@noindent
+In this example, only @option{-frepo} is an option meant
+only for C++ programs; you can use the other options with any
+language supported by GCC@.
+
+Here is a list of options that are @emph{only} for compiling C++ programs:
+
+@table @gcctabopt
+
+@item -fabi-version=@var{n}
+@opindex fabi-version
+Use version @var{n} of the C++ ABI@.  Version 2 is the version of the
+C++ ABI that first appeared in G++ 3.4.  Version 1 is the version of
+the C++ ABI that first appeared in G++ 3.2.  Version 0 will always be
+the version that conforms most closely to the C++ ABI specification.
+Therefore, the ABI obtained using version 0 will change as ABI bugs
+are fixed.
+
+The default is version 2.
+
+Version 3 corrects an error in mangling a constant address as a
+template argument.
+
+Version 4 implements a standard mangling for vector types.
+
+Version 5 corrects the mangling of attribute const/volatile on
+function pointer types, decltype of a plain decl, and use of a
+function parameter in the declaration of another parameter.
+
+See also @option{-Wabi}.
+
+@item -fno-access-control
+@opindex fno-access-control
+Turn off all access checking.  This switch is mainly useful for working
+around bugs in the access control code.
+
+@item -fcheck-new
+@opindex fcheck-new
+Check that the pointer returned by @code{operator new} is non-null
+before attempting to modify the storage allocated.  This check is
+normally unnecessary because the C++ standard specifies that
+@code{operator new} will only return @code{0} if it is declared
+@samp{throw()}, in which case the compiler will always check the
+return value even without this option.  In all other cases, when
+@code{operator new} has a non-empty exception specification, memory
+exhaustion is signalled by throwing @code{std::bad_alloc}.  See also
+@samp{new (nothrow)}.
+
+@item -fconserve-space
+@opindex fconserve-space
+Put uninitialized or runtime-initialized global variables into the
+common segment, as C does.  This saves space in the executable at the
+cost of not diagnosing duplicate definitions.  If you compile with this
+flag and your program mysteriously crashes after @code{main()} has
+completed, you may have an object that is being destroyed twice because
+two definitions were merged.
+
+This option is no longer useful on most targets, now that support has
+been added for putting variables into BSS without making them common.
+
+@item -fconstexpr-depth=@var{n}
+@opindex fconstexpr-depth
+Set the maximum nested evaluation depth for C++0x constexpr functions
+to @var{n}.  A limit is needed to detect endless recursion during
+constant expression evaluation.  The minimum specified by the standard
+is 512.
+
+@item -fno-deduce-init-list
+@opindex fno-deduce-init-list
+Disable deduction of a template type parameter as
+std::initializer_list from a brace-enclosed initializer list, i.e.
+
+@smallexample
+template <class T> auto forward(T t) -> decltype (realfn (t))
+@{
+  return realfn (t);
+@}
+
+void f()
+@{
+  forward(@{1,2@}); // call forward<std::initializer_list<int>>
+@}
+@end smallexample
+
+This option is present because this deduction is an extension to the
+current specification in the C++0x working draft, and there was
+some concern about potential overload resolution problems.
+
+@item -ffriend-injection
+@opindex ffriend-injection
+Inject friend functions into the enclosing namespace, so that they are
+visible outside the scope of the class in which they are declared.
+Friend functions were documented to work this way in the old Annotated
+C++ Reference Manual, and versions of G++ before 4.1 always worked
+that way.  However, in ISO C++ a friend function which is not declared
+in an enclosing scope can only be found using argument dependent
+lookup.  This option causes friends to be injected as they were in
+earlier releases.
+
+This option is for compatibility, and may be removed in a future
+release of G++.
+
+@item -fno-elide-constructors
+@opindex fno-elide-constructors
+The C++ standard allows an implementation to omit creating a temporary
+which is only used to initialize another object of the same type.
+Specifying this option disables that optimization, and forces G++ to
+call the copy constructor in all cases.
+
+@item -fno-enforce-eh-specs
+@opindex fno-enforce-eh-specs
+Don't generate code to check for violation of exception specifications
+at runtime.  This option violates the C++ standard, but may be useful
+for reducing code size in production builds, much like defining
+@samp{NDEBUG}.  This does not give user code permission to throw
+exceptions in violation of the exception specifications; the compiler
+will still optimize based on the specifications, so throwing an
+unexpected exception will result in undefined behavior.
+
+@item -ffor-scope
+@itemx -fno-for-scope
+@opindex ffor-scope
+@opindex fno-for-scope
+If @option{-ffor-scope} is specified, the scope of variables declared in
+a @i{for-init-statement} is limited to the @samp{for} loop itself,
+as specified by the C++ standard.
+If @option{-fno-for-scope} is specified, the scope of variables declared in
+a @i{for-init-statement} extends to the end of the enclosing scope,
+as was the case in old versions of G++, and other (traditional)
+implementations of C++.
+
+The default if neither flag is given to follow the standard,
+but to allow and give a warning for old-style code that would
+otherwise be invalid, or have different behavior.
+
+@item -fno-gnu-keywords
+@opindex fno-gnu-keywords
+Do not recognize @code{typeof} as a keyword, so that code can use this
+word as an identifier.  You can use the keyword @code{__typeof__} instead.
+@option{-ansi} implies @option{-fno-gnu-keywords}.
+
+@item -fno-implicit-templates
+@opindex fno-implicit-templates
+Never emit code for non-inline templates which are instantiated
+implicitly (i.e.@: by use); only emit code for explicit instantiations.
+@xref{Template Instantiation}, for more information.
+
+@item -fno-implicit-inline-templates
+@opindex fno-implicit-inline-templates
+Don't emit code for implicit instantiations of inline templates, either.
+The default is to handle inlines differently so that compiles with and
+without optimization will need the same set of explicit instantiations.
+
+@item -fno-implement-inlines
+@opindex fno-implement-inlines
+To save space, do not emit out-of-line copies of inline functions
+controlled by @samp{#pragma implementation}.  This will cause linker
+errors if these functions are not inlined everywhere they are called.
+
+@item -fms-extensions
+@opindex fms-extensions
+Disable pedantic warnings about constructs used in MFC, such as implicit
+int and getting a pointer to member function via non-standard syntax.
+
+@item -fno-nonansi-builtins
+@opindex fno-nonansi-builtins
+Disable built-in declarations of functions that are not mandated by
+ANSI/ISO C@.  These include @code{ffs}, @code{alloca}, @code{_exit},
+@code{index}, @code{bzero}, @code{conjf}, and other related functions.
+
+@item -fnothrow-opt
+@opindex fnothrow-opt
+Treat a @code{throw()} exception specification as though it were a
+@code{noexcept} specification to reduce or eliminate the text size
+overhead relative to a function with no exception specification.  If
+the function has local variables of types with non-trivial
+destructors, the exception specification will actually make the
+function smaller because the EH cleanups for those variables can be
+optimized away.  The semantic effect is that an exception thrown out of
+a function with such an exception specification will result in a call
+to @code{terminate} rather than @code{unexpected}.
+
+@item -fno-operator-names
+@opindex fno-operator-names
+Do not treat the operator name keywords @code{and}, @code{bitand},
+@code{bitor}, @code{compl}, @code{not}, @code{or} and @code{xor} as
+synonyms as keywords.
+
+@item -fno-optional-diags
+@opindex fno-optional-diags
+Disable diagnostics that the standard says a compiler does not need to
+issue.  Currently, the only such diagnostic issued by G++ is the one for
+a name having multiple meanings within a class.
+
+@item -fpermissive
+@opindex fpermissive
+Downgrade some diagnostics about nonconformant code from errors to
+warnings.  Thus, using @option{-fpermissive} will allow some
+nonconforming code to compile.
+
+@item -fno-pretty-templates
+@opindex fno-pretty-templates
+When an error message refers to a specialization of a function
+template, the compiler will normally print the signature of the
+template followed by the template arguments and any typedefs or
+typenames in the signature (e.g. @code{void f(T) [with T = int]}
+rather than @code{void f(int)}) so that it's clear which template is
+involved.  When an error message refers to a specialization of a class
+template, the compiler will omit any template arguments which match
+the default template arguments for that template.  If either of these
+behaviors make it harder to understand the error message rather than
+easier, using @option{-fno-pretty-templates} will disable them.
+
+@item -frepo
+@opindex frepo
+Enable automatic template instantiation at link time.  This option also
+implies @option{-fno-implicit-templates}.  @xref{Template
+Instantiation}, for more information.
+
+@item -fno-rtti
+@opindex fno-rtti
+Disable generation of information about every class with virtual
+functions for use by the C++ runtime type identification features
+(@samp{dynamic_cast} and @samp{typeid}).  If you don't use those parts
+of the language, you can save some space by using this flag.  Note that
+exception handling uses the same information, but it will generate it as
+needed. The @samp{dynamic_cast} operator can still be used for casts that
+do not require runtime type information, i.e.@: casts to @code{void *} or to
+unambiguous base classes.
+
+@item -fstats
+@opindex fstats
+Emit statistics about front-end processing at the end of the compilation.
+This information is generally only useful to the G++ development team.
+
+@item -fstrict-enums
+@opindex fstrict-enums
+Allow the compiler to optimize using the assumption that a value of
+enumeration type can only be one of the values of the enumeration (as
+defined in the C++ standard; basically, a value which can be
+represented in the minimum number of bits needed to represent all the
+enumerators).  This assumption may not be valid if the program uses a
+cast to convert an arbitrary integer value to the enumeration type.
+
+@item -ftemplate-depth=@var{n}
+@opindex ftemplate-depth
+Set the maximum instantiation depth for template classes to @var{n}.
+A limit on the template instantiation depth is needed to detect
+endless recursions during template class instantiation.  ANSI/ISO C++
+conforming programs must not rely on a maximum depth greater than 17
+(changed to 1024 in C++0x).
+
+@item -fno-threadsafe-statics
+@opindex fno-threadsafe-statics
+Do not emit the extra code to use the routines specified in the C++
+ABI for thread-safe initialization of local statics.  You can use this
+option to reduce code size slightly in code that doesn't need to be
+thread-safe.
+
+@item -fuse-cxa-atexit
+@opindex fuse-cxa-atexit
+Register destructors for objects with static storage duration with the
+@code{__cxa_atexit} function rather than the @code{atexit} function.
+This option is required for fully standards-compliant handling of static
+destructors, but will only work if your C library supports
+@code{__cxa_atexit}.
+
+@item -fno-use-cxa-get-exception-ptr
+@opindex fno-use-cxa-get-exception-ptr
+Don't use the @code{__cxa_get_exception_ptr} runtime routine.  This
+will cause @code{std::uncaught_exception} to be incorrect, but is necessary
+if the runtime routine is not available.
+
+@item -fvisibility-inlines-hidden
+@opindex fvisibility-inlines-hidden
+This switch declares that the user does not attempt to compare
+pointers to inline methods where the addresses of the two functions
+were taken in different shared objects.
+
+The effect of this is that GCC may, effectively, mark inline methods with
+@code{__attribute__ ((visibility ("hidden")))} so that they do not
+appear in the export table of a DSO and do not require a PLT indirection
+when used within the DSO@.  Enabling this option can have a dramatic effect
+on load and link times of a DSO as it massively reduces the size of the
+dynamic export table when the library makes heavy use of templates.
+
+The behavior of this switch is not quite the same as marking the
+methods as hidden directly, because it does not affect static variables
+local to the function or cause the compiler to deduce that
+the function is defined in only one shared object.
+
+You may mark a method as having a visibility explicitly to negate the
+effect of the switch for that method.  For example, if you do want to
+compare pointers to a particular inline method, you might mark it as
+having default visibility.  Marking the enclosing class with explicit
+visibility will have no effect.
+
+Explicitly instantiated inline methods are unaffected by this option
+as their linkage might otherwise cross a shared library boundary.
+@xref{Template Instantiation}.
+
+@item -fvisibility-ms-compat
+@opindex fvisibility-ms-compat
+This flag attempts to use visibility settings to make GCC's C++
+linkage model compatible with that of Microsoft Visual Studio.
+
+The flag makes these changes to GCC's linkage model:
+
+@enumerate
+@item
+It sets the default visibility to @code{hidden}, like
+@option{-fvisibility=hidden}.
+
+@item
+Types, but not their members, are not hidden by default.
+
+@item
+The One Definition Rule is relaxed for types without explicit
+visibility specifications which are defined in more than one different
+shared object: those declarations are permitted if they would have
+been permitted when this option was not used.
+@end enumerate
+
+In new code it is better to use @option{-fvisibility=hidden} and
+export those classes which are intended to be externally visible.
+Unfortunately it is possible for code to rely, perhaps accidentally,
+on the Visual Studio behavior.
+
+Among the consequences of these changes are that static data members
+of the same type with the same name but defined in different shared
+objects will be different, so changing one will not change the other;
+and that pointers to function members defined in different shared
+objects may not compare equal.  When this flag is given, it is a
+violation of the ODR to define types with the same name differently.
+
+@item -fno-weak
+@opindex fno-weak
+Do not use weak symbol support, even if it is provided by the linker.
+By default, G++ will use weak symbols if they are available.  This
+option exists only for testing, and should not be used by end-users;
+it will result in inferior code and has no benefits.  This option may
+be removed in a future release of G++.
+
+@item -nostdinc++
+@opindex nostdinc++
+Do not search for header files in the standard directories specific to
+C++, but do still search the other standard directories.  (This option
+is used when building the C++ library.)
+@end table
+
+In addition, these optimization, warning, and code generation options
+have meanings only for C++ programs:
+
+@table @gcctabopt
+@item -fno-default-inline
+@opindex fno-default-inline
+Do not assume @samp{inline} for functions defined inside a class scope.
+@xref{Optimize Options,,Options That Control Optimization}.  Note that these
+functions will have linkage like inline functions; they just won't be
+inlined by default.
+
+@item -Wabi @r{(C, Objective-C, C++ and Objective-C++ only)}
+@opindex Wabi
+@opindex Wno-abi
+Warn when G++ generates code that is probably not compatible with the
+vendor-neutral C++ ABI@.  Although an effort has been made to warn about
+all such cases, there are probably some cases that are not warned about,
+even though G++ is generating incompatible code.  There may also be
+cases where warnings are emitted even though the code that is generated
+will be compatible.
+
+You should rewrite your code to avoid these warnings if you are
+concerned about the fact that code generated by G++ may not be binary
+compatible with code generated by other compilers.
+
+The known incompatibilities in @option{-fabi-version=2} (the default) include:
+
+@itemize @bullet
+
+@item
+A template with a non-type template parameter of reference type is
+mangled incorrectly:
+@smallexample
+extern int N;
+template <int &> struct S @{@};
+void n (S<N>) @{2@}
+@end smallexample
+
+This is fixed in @option{-fabi-version=3}.
+
+@item
+SIMD vector types declared using @code{__attribute ((vector_size))} are
+mangled in a non-standard way that does not allow for overloading of
+functions taking vectors of different sizes.
+
+The mangling is changed in @option{-fabi-version=4}.
+@end itemize
+
+The known incompatibilities in @option{-fabi-version=1} include:
+
+@itemize @bullet
+
+@item
+Incorrect handling of tail-padding for bit-fields.  G++ may attempt to
+pack data into the same byte as a base class.  For example:
+
+@smallexample
+struct A @{ virtual void f(); int f1 : 1; @};
+struct B : public A @{ int f2 : 1; @};
+@end smallexample
+
+@noindent
+In this case, G++ will place @code{B::f2} into the same byte
+as@code{A::f1}; other compilers will not.  You can avoid this problem
+by explicitly padding @code{A} so that its size is a multiple of the
+byte size on your platform; that will cause G++ and other compilers to
+layout @code{B} identically.
+
+@item
+Incorrect handling of tail-padding for virtual bases.  G++ does not use
+tail padding when laying out virtual bases.  For example:
+
+@smallexample
+struct A @{ virtual void f(); char c1; @};
+struct B @{ B(); char c2; @};
+struct C : public A, public virtual B @{@};
+@end smallexample
+
+@noindent
+In this case, G++ will not place @code{B} into the tail-padding for
+@code{A}; other compilers will.  You can avoid this problem by
+explicitly padding @code{A} so that its size is a multiple of its
+alignment (ignoring virtual base classes); that will cause G++ and other
+compilers to layout @code{C} identically.
+
+@item
+Incorrect handling of bit-fields with declared widths greater than that
+of their underlying types, when the bit-fields appear in a union.  For
+example:
+
+@smallexample
+union U @{ int i : 4096; @};
+@end smallexample
+
+@noindent
+Assuming that an @code{int} does not have 4096 bits, G++ will make the
+union too small by the number of bits in an @code{int}.
+
+@item
+Empty classes can be placed at incorrect offsets.  For example:
+
+@smallexample
+struct A @{@};
+
+struct B @{
+  A a;
+  virtual void f ();
+@};
+
+struct C : public B, public A @{@};
+@end smallexample
+
+@noindent
+G++ will place the @code{A} base class of @code{C} at a nonzero offset;
+it should be placed at offset zero.  G++ mistakenly believes that the
+@code{A} data member of @code{B} is already at offset zero.
+
+@item
+Names of template functions whose types involve @code{typename} or
+template template parameters can be mangled incorrectly.
+
+@smallexample
+template <typename Q>
+void f(typename Q::X) @{@}
+
+template <template <typename> class Q>
+void f(typename Q<int>::X) @{@}
+@end smallexample
+
+@noindent
+Instantiations of these templates may be mangled incorrectly.
+
+@end itemize
+
+It also warns psABI related changes.  The known psABI changes at this
+point include:
+
+@itemize @bullet
+
+@item
+For SYSV/x86-64, when passing union with long double, it is changed to
+pass in memory as specified in psABI.  For example:
+
+@smallexample
+union U @{
+  long double ld;
+  int i;
+@};
+@end smallexample
+
+@noindent
+@code{union U} will always be passed in memory.
+
+@end itemize
+
+@item -Wctor-dtor-privacy @r{(C++ and Objective-C++ only)}
+@opindex Wctor-dtor-privacy
+@opindex Wno-ctor-dtor-privacy
+Warn when a class seems unusable because all the constructors or
+destructors in that class are private, and it has neither friends nor
+public static member functions.
+
+@item -Wnoexcept @r{(C++ and Objective-C++ only)}
+@opindex Wnoexcept
+@opindex Wno-noexcept
+Warn when a noexcept-expression evaluates to false because of a call
+to a function that does not have a non-throwing exception
+specification (i.e. @samp{throw()} or @samp{noexcept}) but is known by
+the compiler to never throw an exception.
+
+@item -Wnon-virtual-dtor @r{(C++ and Objective-C++ only)}
+@opindex Wnon-virtual-dtor
+@opindex Wno-non-virtual-dtor
+Warn when a class has virtual functions and accessible non-virtual
+destructor, in which case it would be possible but unsafe to delete
+an instance of a derived class through a pointer to the base class.
+This warning is also enabled if -Weffc++ is specified.
+
+@item -Wreorder @r{(C++ and Objective-C++ only)}
+@opindex Wreorder
+@opindex Wno-reorder
+@cindex reordering, warning
+@cindex warning for reordering of member initializers
+Warn when the order of member initializers given in the code does not
+match the order in which they must be executed.  For instance:
+
+@smallexample
+struct A @{
+  int i;
+  int j;
+  A(): j (0), i (1) @{ @}
+@};
+@end smallexample
+
+The compiler will rearrange the member initializers for @samp{i}
+and @samp{j} to match the declaration order of the members, emitting
+a warning to that effect.  This warning is enabled by @option{-Wall}.
+@end table
+
+The following @option{-W@dots{}} options are not affected by @option{-Wall}.
+
+@table @gcctabopt
+@item -Weffc++ @r{(C++ and Objective-C++ only)}
+@opindex Weffc++
+@opindex Wno-effc++
+Warn about violations of the following style guidelines from Scott Meyers'
+@cite{Effective C++} book:
+
+@itemize @bullet
+@item
+Item 11:  Define a copy constructor and an assignment operator for classes
+with dynamically allocated memory.
+
+@item
+Item 12:  Prefer initialization to assignment in constructors.
+
+@item
+Item 14:  Make destructors virtual in base classes.
+
+@item
+Item 15:  Have @code{operator=} return a reference to @code{*this}.
+
+@item
+Item 23:  Don't try to return a reference when you must return an object.
+
+@end itemize
+
+Also warn about violations of the following style guidelines from
+Scott Meyers' @cite{More Effective C++} book:
+
+@itemize @bullet
+@item
+Item 6:  Distinguish between prefix and postfix forms of increment and
+decrement operators.
+
+@item
+Item 7:  Never overload @code{&&}, @code{||}, or @code{,}.
+
+@end itemize
+
+When selecting this option, be aware that the standard library
+headers do not obey all of these guidelines; use @samp{grep -v}
+to filter out those warnings.
+
+@item -Wstrict-null-sentinel @r{(C++ and Objective-C++ only)}
+@opindex Wstrict-null-sentinel
+@opindex Wno-strict-null-sentinel
+Warn also about the use of an uncasted @code{NULL} as sentinel.  When
+compiling only with GCC this is a valid sentinel, as @code{NULL} is defined
+to @code{__null}.  Although it is a null pointer constant not a null pointer,
+it is guaranteed to be of the same size as a pointer.  But this use is
+not portable across different compilers.
+
+@item -Wno-non-template-friend @r{(C++ and Objective-C++ only)}
+@opindex Wno-non-template-friend
+@opindex Wnon-template-friend
+Disable warnings when non-templatized friend functions are declared
+within a template.  Since the advent of explicit template specification
+support in G++, if the name of the friend is an unqualified-id (i.e.,
+@samp{friend foo(int)}), the C++ language specification demands that the
+friend declare or define an ordinary, nontemplate function.  (Section
+14.5.3).  Before G++ implemented explicit specification, unqualified-ids
+could be interpreted as a particular specialization of a templatized
+function.  Because this non-conforming behavior is no longer the default
+behavior for G++, @option{-Wnon-template-friend} allows the compiler to
+check existing code for potential trouble spots and is on by default.
+This new compiler behavior can be turned off with
+@option{-Wno-non-template-friend} which keeps the conformant compiler code
+but disables the helpful warning.
+
+@item -Wold-style-cast @r{(C++ and Objective-C++ only)}
+@opindex Wold-style-cast
+@opindex Wno-old-style-cast
+Warn if an old-style (C-style) cast to a non-void type is used within
+a C++ program.  The new-style casts (@samp{dynamic_cast},
+@samp{static_cast}, @samp{reinterpret_cast}, and @samp{const_cast}) are
+less vulnerable to unintended effects and much easier to search for.
+
+@item -Woverloaded-virtual @r{(C++ and Objective-C++ only)}
+@opindex Woverloaded-virtual
+@opindex Wno-overloaded-virtual
+@cindex overloaded virtual function, warning
+@cindex warning for overloaded virtual function
+Warn when a function declaration hides virtual functions from a
+base class.  For example, in:
+
+@smallexample
+struct A @{
+  virtual void f();
+@};
+
+struct B: public A @{
+  void f(int);
+@};
+@end smallexample
+
+the @code{A} class version of @code{f} is hidden in @code{B}, and code
+like:
+
+@smallexample
+B* b;
+b->f();
+@end smallexample
+
+will fail to compile.
+
+@item -Wno-pmf-conversions @r{(C++ and Objective-C++ only)}
+@opindex Wno-pmf-conversions
+@opindex Wpmf-conversions
+Disable the diagnostic for converting a bound pointer to member function
+to a plain pointer.
+
+@item -Wsign-promo @r{(C++ and Objective-C++ only)}
+@opindex Wsign-promo
+@opindex Wno-sign-promo
+Warn when overload resolution chooses a promotion from unsigned or
+enumerated type to a signed type, over a conversion to an unsigned type of
+the same size.  Previous versions of G++ would try to preserve
+unsignedness, but the standard mandates the current behavior.
+
+@smallexample
+struct A @{
+  operator int ();
+  A& operator = (int);
+@};
+
+main ()
+@{
+  A a,b;
+  a = b;
+@}
+@end smallexample
+
+In this example, G++ will synthesize a default @samp{A& operator =
+(const A&);}, while cfront will use the user-defined @samp{operator =}.
+@end table
+
+@node Objective-C and Objective-C++ Dialect Options
+@section Options Controlling Objective-C and Objective-C++ Dialects
+
+@cindex compiler options, Objective-C and Objective-C++
+@cindex Objective-C and Objective-C++ options, command line
+@cindex options, Objective-C and Objective-C++
+(NOTE: This manual does not describe the Objective-C and Objective-C++
+languages themselves.  @xref{Standards,,Language Standards
+Supported by GCC}, for references.)
+
+This section describes the command-line options that are only meaningful
+for Objective-C and Objective-C++ programs, but you can also use most of
+the language-independent GNU compiler options.
+For example, you might compile a file @code{some_class.m} like this:
+
+@smallexample
+gcc -g -fgnu-runtime -O -c some_class.m
+@end smallexample
+
+@noindent
+In this example, @option{-fgnu-runtime} is an option meant only for
+Objective-C and Objective-C++ programs; you can use the other options with
+any language supported by GCC@.
+
+Note that since Objective-C is an extension of the C language, Objective-C
+compilations may also use options specific to the C front-end (e.g.,
+@option{-Wtraditional}).  Similarly, Objective-C++ compilations may use
+C++-specific options (e.g., @option{-Wabi}).
+
+Here is a list of options that are @emph{only} for compiling Objective-C
+and Objective-C++ programs:
+
+@table @gcctabopt
+@item -fconstant-string-class=@var{class-name}
+@opindex fconstant-string-class
+Use @var{class-name} as the name of the class to instantiate for each
+literal string specified with the syntax @code{@@"@dots{}"}.  The default
+class name is @code{NXConstantString} if the GNU runtime is being used, and
+@code{NSConstantString} if the NeXT runtime is being used (see below).  The
+@option{-fconstant-cfstrings} option, if also present, will override the
+@option{-fconstant-string-class} setting and cause @code{@@"@dots{}"} literals
+to be laid out as constant CoreFoundation strings.
+
+@item -fgnu-runtime
+@opindex fgnu-runtime
+Generate object code compatible with the standard GNU Objective-C
+runtime.  This is the default for most types of systems.
+
+@item -fnext-runtime
+@opindex fnext-runtime
+Generate output compatible with the NeXT runtime.  This is the default
+for NeXT-based systems, including Darwin and Mac OS X@.  The macro
+@code{__NEXT_RUNTIME__} is predefined if (and only if) this option is
+used.
+
+@item -fno-nil-receivers
+@opindex fno-nil-receivers
+Assume that all Objective-C message dispatches (@code{[receiver
+message:arg]}) in this translation unit ensure that the receiver is
+not @code{nil}.  This allows for more efficient entry points in the
+runtime to be used.  This option is only available in conjunction with
+the NeXT runtime and ABI version 0 or 1.
+
+@item -fobjc-abi-version=@var{n}
+@opindex fobjc-abi-version
+Use version @var{n} of the Objective-C ABI for the selected runtime.
+This option is currently supported only for the NeXT runtime.  In that
+case, Version 0 is the traditional (32-bit) ABI without support for
+properties and other Objective-C 2.0 additions.  Version 1 is the
+traditional (32-bit) ABI with support for properties and other
+Objective-C 2.0 additions.  Version 2 is the modern (64-bit) ABI.  If
+nothing is specified, the default is Version 0 on 32-bit target
+machines, and Version 2 on 64-bit target machines.
+
+@item -fobjc-call-cxx-cdtors
+@opindex fobjc-call-cxx-cdtors
+For each Objective-C class, check if any of its instance variables is a
+C++ object with a non-trivial default constructor.  If so, synthesize a
+special @code{- (id) .cxx_construct} instance method that will run
+non-trivial default constructors on any such instance variables, in order,
+and then return @code{self}.  Similarly, check if any instance variable
+is a C++ object with a non-trivial destructor, and if so, synthesize a
+special @code{- (void) .cxx_destruct} method that will run
+all such default destructors, in reverse order.
+
+The @code{- (id) .cxx_construct} and @code{- (void) .cxx_destruct}
+methods thusly generated will only operate on instance variables
+declared in the current Objective-C class, and not those inherited
+from superclasses.  It is the responsibility of the Objective-C
+runtime to invoke all such methods in an object's inheritance
+hierarchy.  The @code{- (id) .cxx_construct} methods will be invoked
+by the runtime immediately after a new object instance is allocated;
+the @code{- (void) .cxx_destruct} methods will be invoked immediately
+before the runtime deallocates an object instance.
+
+As of this writing, only the NeXT runtime on Mac OS X 10.4 and later has
+support for invoking the @code{- (id) .cxx_construct} and
+@code{- (void) .cxx_destruct} methods.
+
+@item -fobjc-direct-dispatch
+@opindex fobjc-direct-dispatch
+Allow fast jumps to the message dispatcher.  On Darwin this is
+accomplished via the comm page.
+
+@item -fobjc-exceptions
+@opindex fobjc-exceptions
+Enable syntactic support for structured exception handling in
+Objective-C, similar to what is offered by C++ and Java.  This option
+is required to use the Objective-C keywords @code{@@try},
+@code{@@throw}, @code{@@catch}, @code{@@finally} and
+@code{@@synchronized}.  This option is available with both the GNU
+runtime and the NeXT runtime (but not available in conjunction with
+the NeXT runtime on Mac OS X 10.2 and earlier).
+
+@item -fobjc-gc
+@opindex fobjc-gc
+Enable garbage collection (GC) in Objective-C and Objective-C++
+programs.  This option is only available with the NeXT runtime; the
+GNU runtime has a different garbage collection implementation that
+does not require special compiler flags.
+
+@item -fobjc-nilcheck
+@opindex fobjc-nilcheck
+For the NeXT runtime with version 2 of the ABI, check for a nil
+receiver in method invocations before doing the actual method call.
+This is the default and can be disabled using
+@option{-fno-objc-nilcheck}.  Class methods and super calls are never
+checked for nil in this way no matter what this flag is set to.
+Currently this flag does nothing when the GNU runtime, or an older
+version of the NeXT runtime ABI, is used.
+
+@item -fobjc-std=objc1
+@opindex fobjc-std
+Conform to the language syntax of Objective-C 1.0, the language
+recognized by GCC 4.0.  This only affects the Objective-C additions to
+the C/C++ language; it does not affect conformance to C/C++ standards,
+which is controlled by the separate C/C++ dialect option flags.  When
+this option is used with the Objective-C or Objective-C++ compiler,
+any Objective-C syntax that is not recognized by GCC 4.0 is rejected.
+This is useful if you need to make sure that your Objective-C code can
+be compiled with older versions of GCC.
+
+@item -freplace-objc-classes
+@opindex freplace-objc-classes
+Emit a special marker instructing @command{ld(1)} not to statically link in
+the resulting object file, and allow @command{dyld(1)} to load it in at
+run time instead.  This is used in conjunction with the Fix-and-Continue
+debugging mode, where the object file in question may be recompiled and
+dynamically reloaded in the course of program execution, without the need
+to restart the program itself.  Currently, Fix-and-Continue functionality
+is only available in conjunction with the NeXT runtime on Mac OS X 10.3
+and later.
+
+@item -fzero-link
+@opindex fzero-link
+When compiling for the NeXT runtime, the compiler ordinarily replaces calls
+to @code{objc_getClass("@dots{}")} (when the name of the class is known at
+compile time) with static class references that get initialized at load time,
+which improves run-time performance.  Specifying the @option{-fzero-link} flag
+suppresses this behavior and causes calls to @code{objc_getClass("@dots{}")}
+to be retained.  This is useful in Zero-Link debugging mode, since it allows
+for individual class implementations to be modified during program execution.
+The GNU runtime currently always retains calls to @code{objc_get_class("@dots{}")}
+regardless of command line options.
+
+@item -gen-decls
+@opindex gen-decls
+Dump interface declarations for all classes seen in the source file to a
+file named @file{@var{sourcename}.decl}.
+
+@item -Wassign-intercept @r{(Objective-C and Objective-C++ only)}
+@opindex Wassign-intercept
+@opindex Wno-assign-intercept
+Warn whenever an Objective-C assignment is being intercepted by the
+garbage collector.
+
+@item -Wno-protocol @r{(Objective-C and Objective-C++ only)}
+@opindex Wno-protocol
+@opindex Wprotocol
+If a class is declared to implement a protocol, a warning is issued for
+every method in the protocol that is not implemented by the class.  The
+default behavior is to issue a warning for every method not explicitly
+implemented in the class, even if a method implementation is inherited
+from the superclass.  If you use the @option{-Wno-protocol} option, then
+methods inherited from the superclass are considered to be implemented,
+and no warning is issued for them.
+
+@item -Wselector @r{(Objective-C and Objective-C++ only)}
+@opindex Wselector
+@opindex Wno-selector
+Warn if multiple methods of different types for the same selector are
+found during compilation.  The check is performed on the list of methods
+in the final stage of compilation.  Additionally, a check is performed
+for each selector appearing in a @code{@@selector(@dots{})}
+expression, and a corresponding method for that selector has been found
+during compilation.  Because these checks scan the method table only at
+the end of compilation, these warnings are not produced if the final
+stage of compilation is not reached, for example because an error is
+found during compilation, or because the @option{-fsyntax-only} option is
+being used.
+
+@item -Wstrict-selector-match @r{(Objective-C and Objective-C++ only)}
+@opindex Wstrict-selector-match
+@opindex Wno-strict-selector-match
+Warn if multiple methods with differing argument and/or return types are
+found for a given selector when attempting to send a message using this
+selector to a receiver of type @code{id} or @code{Class}.  When this flag
+is off (which is the default behavior), the compiler will omit such warnings
+if any differences found are confined to types which share the same size
+and alignment.
+
+@item -Wundeclared-selector @r{(Objective-C and Objective-C++ only)}
+@opindex Wundeclared-selector
+@opindex Wno-undeclared-selector
+Warn if a @code{@@selector(@dots{})} expression referring to an
+undeclared selector is found.  A selector is considered undeclared if no
+method with that name has been declared before the
+@code{@@selector(@dots{})} expression, either explicitly in an
+@code{@@interface} or @code{@@protocol} declaration, or implicitly in
+an @code{@@implementation} section.  This option always performs its
+checks as soon as a @code{@@selector(@dots{})} expression is found,
+while @option{-Wselector} only performs its checks in the final stage of
+compilation.  This also enforces the coding style convention
+that methods and selectors must be declared before being used.
+
+@item -print-objc-runtime-info
+@opindex print-objc-runtime-info
+Generate C header describing the largest structure that is passed by
+value, if any.
+
+@end table
+
+@node Language Independent Options
+@section Options to Control Diagnostic Messages Formatting
+@cindex options to control diagnostics formatting
+@cindex diagnostic messages
+@cindex message formatting
+
+Traditionally, diagnostic messages have been formatted irrespective of
+the output device's aspect (e.g.@: its width, @dots{}).  The options described
+below can be used to control the diagnostic messages formatting
+algorithm, e.g.@: how many characters per line, how often source location
+information should be reported.  Right now, only the C++ front end can
+honor these options.  However it is expected, in the near future, that
+the remaining front ends would be able to digest them correctly.
+
+@table @gcctabopt
+@item -fmessage-length=@var{n}
+@opindex fmessage-length
+Try to format error messages so that they fit on lines of about @var{n}
+characters.  The default is 72 characters for @command{g++} and 0 for the rest of
+the front ends supported by GCC@.  If @var{n} is zero, then no
+line-wrapping will be done; each error message will appear on a single
+line.
+
+@opindex fdiagnostics-show-location
+@item -fdiagnostics-show-location=once
+Only meaningful in line-wrapping mode.  Instructs the diagnostic messages
+reporter to emit @emph{once} source location information; that is, in
+case the message is too long to fit on a single physical line and has to
+be wrapped, the source location won't be emitted (as prefix) again,
+over and over, in subsequent continuation lines.  This is the default
+behavior.
+
+@item -fdiagnostics-show-location=every-line
+Only meaningful in line-wrapping mode.  Instructs the diagnostic
+messages reporter to emit the same source location information (as
+prefix) for physical lines that result from the process of breaking
+a message which is too long to fit on a single line.
+
+@item -fno-diagnostics-show-option
+@opindex fno-diagnostics-show-option
+@opindex fdiagnostics-show-option
+By default, each diagnostic emitted includes text which indicates the
+command line option that directly controls the diagnostic (if such an
+option is known to the diagnostic machinery).  Specifying the
+@option{-fno-diagnostics-show-option} flag suppresses that behavior.
+
+@item -Wcoverage-mismatch
+@opindex Wcoverage-mismatch
+Warn if feedback profiles do not match when using the
+@option{-fprofile-use} option.
+If a source file was changed between @option{-fprofile-gen} and
+@option{-fprofile-use}, the files with the profile feedback can fail
+to match the source file and GCC can not use the profile feedback
+information.  By default, this warning is enabled and is treated as an
+error.  @option{-Wno-coverage-mismatch} can be used to disable the
+warning or @option{-Wno-error=coverage-mismatch} can be used to
+disable the error.  Disable the error for this warning can result in
+poorly optimized code, so disabling the error is useful only in the
+case of very minor changes such as bug fixes to an existing code-base.
+Completely disabling the warning is not recommended.
+
+@end table
+
+@node Warning Options
+@section Options to Request or Suppress Warnings
+@cindex options to control warnings
+@cindex warning messages
+@cindex messages, warning
+@cindex suppressing warnings
+
+Warnings are diagnostic messages that report constructions which
+are not inherently erroneous but which are risky or suggest there
+may have been an error.
+
+The following language-independent options do not enable specific
+warnings but control the kinds of diagnostics produced by GCC.
+
+@table @gcctabopt
+@cindex syntax checking
+@item -fsyntax-only
+@opindex fsyntax-only
+Check the code for syntax errors, but don't do anything beyond that.
+
+@item -fmax-errors=@var{n}
+@opindex fmax-errors
+Limits the maximum number of error messages to @var{n}, at which point
+GCC bails out rather than attempting to continue processing the source
+code.  If @var{n} is 0 (the default), there is no limit on the number
+of error messages produced.  If @option{-Wfatal-errors} is also
+specified, then @option{-Wfatal-errors} takes precedence over this
+option.
+
+@item -w
+@opindex w
+Inhibit all warning messages.
+
+@item -Werror
+@opindex Werror
+@opindex Wno-error
+Make all warnings into errors.
+
+@item -Werror=
+@opindex Werror=
+@opindex Wno-error=
+Make the specified warning into an error.  The specifier for a warning
+is appended, for example @option{-Werror=switch} turns the warnings
+controlled by @option{-Wswitch} into errors.  This switch takes a
+negative form, to be used to negate @option{-Werror} for specific
+warnings, for example @option{-Wno-error=switch} makes
+@option{-Wswitch} warnings not be errors, even when @option{-Werror}
+is in effect.
+
+The warning message for each controllable warning includes the
+option which controls the warning.  That option can then be used with
+@option{-Werror=} and @option{-Wno-error=} as described above.
+(Printing of the option in the warning message can be disabled using the
+@option{-fno-diagnostics-show-option} flag.)
+
+Note that specifying @option{-Werror=}@var{foo} automatically implies
+@option{-W}@var{foo}.  However, @option{-Wno-error=}@var{foo} does not
+imply anything.
+
+@item -Wfatal-errors
+@opindex Wfatal-errors
+@opindex Wno-fatal-errors
+This option causes the compiler to abort compilation on the first error
+occurred rather than trying to keep going and printing further error
+messages.
+
+@end table
+
+You can request many specific warnings with options beginning
+@samp{-W}, for example @option{-Wimplicit} to request warnings on
+implicit declarations.  Each of these specific warning options also
+has a negative form beginning @samp{-Wno-} to turn off warnings; for
+example, @option{-Wno-implicit}.  This manual lists only one of the
+two forms, whichever is not the default.  For further,
+language-specific options also refer to @ref{C++ Dialect Options} and
+@ref{Objective-C and Objective-C++ Dialect Options}.
+
+When an unrecognized warning option is requested (e.g.,
+@option{-Wunknown-warning}), GCC will emit a diagnostic stating
+that the option is not recognized.  However, if the @option{-Wno-} form
+is used, the behavior is slightly different: No diagnostic will be
+produced for @option{-Wno-unknown-warning} unless other diagnostics
+are being produced.  This allows the use of new @option{-Wno-} options
+with old compilers, but if something goes wrong, the compiler will
+warn that an unrecognized option was used.
+
+@table @gcctabopt
+@item -pedantic
+@opindex pedantic
+Issue all the warnings demanded by strict ISO C and ISO C++;
+reject all programs that use forbidden extensions, and some other
+programs that do not follow ISO C and ISO C++.  For ISO C, follows the
+version of the ISO C standard specified by any @option{-std} option used.
+
+Valid ISO C and ISO C++ programs should compile properly with or without
+this option (though a rare few will require @option{-ansi} or a
+@option{-std} option specifying the required version of ISO C)@.  However,
+without this option, certain GNU extensions and traditional C and C++
+features are supported as well.  With this option, they are rejected.
+
+@option{-pedantic} does not cause warning messages for use of the
+alternate keywords whose names begin and end with @samp{__}.  Pedantic
+warnings are also disabled in the expression that follows
+@code{__extension__}.  However, only system header files should use
+these escape routes; application programs should avoid them.
+@xref{Alternate Keywords}.
+
+Some users try to use @option{-pedantic} to check programs for strict ISO
+C conformance.  They soon find that it does not do quite what they want:
+it finds some non-ISO practices, but not all---only those for which
+ISO C @emph{requires} a diagnostic, and some others for which
+diagnostics have been added.
+
+A feature to report any failure to conform to ISO C might be useful in
+some instances, but would require considerable additional work and would
+be quite different from @option{-pedantic}.  We don't have plans to
+support such a feature in the near future.
+
+Where the standard specified with @option{-std} represents a GNU
+extended dialect of C, such as @samp{gnu90} or @samp{gnu99}, there is a
+corresponding @dfn{base standard}, the version of ISO C on which the GNU
+extended dialect is based.  Warnings from @option{-pedantic} are given
+where they are required by the base standard.  (It would not make sense
+for such warnings to be given only for features not in the specified GNU
+C dialect, since by definition the GNU dialects of C include all
+features the compiler supports with the given option, and there would be
+nothing to warn about.)
+
+@item -pedantic-errors
+@opindex pedantic-errors
+Like @option{-pedantic}, except that errors are produced rather than
+warnings.
+
+@item -Wall
+@opindex Wall
+@opindex Wno-all
+This enables all the warnings about constructions that some users
+consider questionable, and that are easy to avoid (or modify to
+prevent the warning), even in conjunction with macros.  This also
+enables some language-specific warnings described in @ref{C++ Dialect
+Options} and @ref{Objective-C and Objective-C++ Dialect Options}.
+
+@option{-Wall} turns on the following warning flags:
+
+@gccoptlist{-Waddress   @gol
+-Warray-bounds @r{(only with} @option{-O2}@r{)}  @gol
+-Wc++0x-compat  @gol
+-Wchar-subscripts  @gol
+-Wenum-compare @r{(in C/Objc; this is on by default in C++)} @gol
+-Wimplicit-int @r{(C and Objective-C only)} @gol
+-Wimplicit-function-declaration @r{(C and Objective-C only)} @gol
+-Wcomment  @gol
+-Wformat   @gol
+-Wmain @r{(only for C/ObjC and unless} @option{-ffreestanding}@r{)}  @gol
+-Wmissing-braces  @gol
+-Wnonnull  @gol
+-Wparentheses  @gol
+-Wpointer-sign  @gol
+-Wreorder   @gol
+-Wreturn-type  @gol
+-Wsequence-point  @gol
+-Wsign-compare @r{(only in C++)}  @gol
+-Wstrict-aliasing  @gol
+-Wstrict-overflow=1  @gol
+-Wswitch  @gol
+-Wtrigraphs  @gol
+-Wuninitialized  @gol
+-Wunknown-pragmas  @gol
+-Wunused-function  @gol
+-Wunused-label     @gol
+-Wunused-value     @gol
+-Wunused-variable  @gol
+-Wvolatile-register-var @gol
+}
+
+Note that some warning flags are not implied by @option{-Wall}.  Some of
+them warn about constructions that users generally do not consider
+questionable, but which occasionally you might wish to check for;
+others warn about constructions that are necessary or hard to avoid in
+some cases, and there is no simple way to modify the code to suppress
+the warning. Some of them are enabled by @option{-Wextra} but many of
+them must be enabled individually.
+
+@item -Wextra
+@opindex W
+@opindex Wextra
+@opindex Wno-extra
+This enables some extra warning flags that are not enabled by
+@option{-Wall}. (This option used to be called @option{-W}.  The older
+name is still supported, but the newer name is more descriptive.)
+
+@gccoptlist{-Wclobbered  @gol
+-Wempty-body  @gol
+-Wignored-qualifiers @gol
+-Wmissing-field-initializers  @gol
+-Wmissing-parameter-type @r{(C only)}  @gol
+-Wold-style-declaration @r{(C only)}  @gol
+-Woverride-init  @gol
+-Wsign-compare  @gol
+-Wtype-limits  @gol
+-Wuninitialized  @gol
+-Wunused-parameter @r{(only with} @option{-Wunused} @r{or} @option{-Wall}@r{)} @gol
+-Wunused-but-set-parameter @r{(only with} @option{-Wunused} @r{or} @option{-Wall}@r{)}  @gol
+}
+
+The option @option{-Wextra} also prints warning messages for the
+following cases:
+
+@itemize @bullet
+
+@item
+A pointer is compared against integer zero with @samp{<}, @samp{<=},
+@samp{>}, or @samp{>=}.
+
+@item
+(C++ only) An enumerator and a non-enumerator both appear in a
+conditional expression.
+
+@item
+(C++ only) Ambiguous virtual bases.
+
+@item
+(C++ only) Subscripting an array which has been declared @samp{register}.
+
+@item
+(C++ only) Taking the address of a variable which has been declared
+@samp{register}.
+
+@item
+(C++ only) A base class is not initialized in a derived class' copy
+constructor.
+
+@end itemize
+
+@item -Wchar-subscripts
+@opindex Wchar-subscripts
+@opindex Wno-char-subscripts
+Warn if an array subscript has type @code{char}.  This is a common cause
+of error, as programmers often forget that this type is signed on some
+machines.
+This warning is enabled by @option{-Wall}.
+
+@item -Wcomment
+@opindex Wcomment
+@opindex Wno-comment
+Warn whenever a comment-start sequence @samp{/*} appears in a @samp{/*}
+comment, or whenever a Backslash-Newline appears in a @samp{//} comment.
+This warning is enabled by @option{-Wall}.
+
+@item -Wno-cpp
+@r{(C, Objective-C, C++, Objective-C++ and Fortran only)}
+
+Suppress warning messages emitted by @code{#warning} directives.
+
+@item -Wdouble-promotion @r{(C, C++, Objective-C and Objective-C++ only)}
+@opindex Wdouble-promotion
+@opindex Wno-double-promotion
+Give a warning when a value of type @code{float} is implicitly
+promoted to @code{double}.  CPUs with a 32-bit ``single-precision''
+floating-point unit implement @code{float} in hardware, but emulate
+@code{double} in software.  On such a machine, doing computations
+using @code{double} values is much more expensive because of the
+overhead required for software emulation.  
+
+It is easy to accidentally do computations with @code{double} because
+floating-point literals are implicitly of type @code{double}.  For
+example, in:
+@smallexample
+@group
+float area(float radius)
+@{
+   return 3.14159 * radius * radius;        
+@}
+@end group
+@end smallexample
+the compiler will perform the entire computation with @code{double}
+because the floating-point literal is a @code{double}.
+
+@item -Wformat
+@opindex Wformat
+@opindex Wno-format
+@opindex ffreestanding
+@opindex fno-builtin
+Check calls to @code{printf} and @code{scanf}, etc., to make sure that
+the arguments supplied have types appropriate to the format string
+specified, and that the conversions specified in the format string make
+sense.  This includes standard functions, and others specified by format
+attributes (@pxref{Function Attributes}), in the @code{printf},
+@code{scanf}, @code{strftime} and @code{strfmon} (an X/Open extension,
+not in the C standard) families (or other target-specific families).
+Which functions are checked without format attributes having been
+specified depends on the standard version selected, and such checks of
+functions without the attribute specified are disabled by
+@option{-ffreestanding} or @option{-fno-builtin}.
+
+The formats are checked against the format features supported by GNU
+libc version 2.2.  These include all ISO C90 and C99 features, as well
+as features from the Single Unix Specification and some BSD and GNU
+extensions.  Other library implementations may not support all these
+features; GCC does not support warning about features that go beyond a
+particular library's limitations.  However, if @option{-pedantic} is used
+with @option{-Wformat}, warnings will be given about format features not
+in the selected standard version (but not for @code{strfmon} formats,
+since those are not in any version of the C standard).  @xref{C Dialect
+Options,,Options Controlling C Dialect}.
+
+Since @option{-Wformat} also checks for null format arguments for
+several functions, @option{-Wformat} also implies @option{-Wnonnull}.
+
+@option{-Wformat} is included in @option{-Wall}.  For more control over some
+aspects of format checking, the options @option{-Wformat-y2k},
+@option{-Wno-format-extra-args}, @option{-Wno-format-zero-length},
+@option{-Wformat-nonliteral}, @option{-Wformat-security}, and
+@option{-Wformat=2} are available, but are not included in @option{-Wall}.
+
+@item -Wformat-y2k
+@opindex Wformat-y2k
+@opindex Wno-format-y2k
+If @option{-Wformat} is specified, also warn about @code{strftime}
+formats which may yield only a two-digit year.
+
+@item -Wno-format-contains-nul
+@opindex Wno-format-contains-nul
+@opindex Wformat-contains-nul
+If @option{-Wformat} is specified, do not warn about format strings that
+contain NUL bytes.
+
+@item -Wno-format-extra-args
+@opindex Wno-format-extra-args
+@opindex Wformat-extra-args
+If @option{-Wformat} is specified, do not warn about excess arguments to a
+@code{printf} or @code{scanf} format function.  The C standard specifies
+that such arguments are ignored.
+
+Where the unused arguments lie between used arguments that are
+specified with @samp{$} operand number specifications, normally
+warnings are still given, since the implementation could not know what
+type to pass to @code{va_arg} to skip the unused arguments.  However,
+in the case of @code{scanf} formats, this option will suppress the
+warning if the unused arguments are all pointers, since the Single
+Unix Specification says that such unused arguments are allowed.
+
+@item -Wno-format-zero-length @r{(C and Objective-C only)}
+@opindex Wno-format-zero-length
+@opindex Wformat-zero-length
+If @option{-Wformat} is specified, do not warn about zero-length formats.
+The C standard specifies that zero-length formats are allowed.
+
+@item -Wformat-nonliteral
+@opindex Wformat-nonliteral
+@opindex Wno-format-nonliteral
+If @option{-Wformat} is specified, also warn if the format string is not a
+string literal and so cannot be checked, unless the format function
+takes its format arguments as a @code{va_list}.
+
+@item -Wformat-security
+@opindex Wformat-security
+@opindex Wno-format-security
+If @option{-Wformat} is specified, also warn about uses of format
+functions that represent possible security problems.  At present, this
+warns about calls to @code{printf} and @code{scanf} functions where the
+format string is not a string literal and there are no format arguments,
+as in @code{printf (foo);}.  This may be a security hole if the format
+string came from untrusted input and contains @samp{%n}.  (This is
+currently a subset of what @option{-Wformat-nonliteral} warns about, but
+in future warnings may be added to @option{-Wformat-security} that are not
+included in @option{-Wformat-nonliteral}.)
+
+@item -Wformat=2
+@opindex Wformat=2
+@opindex Wno-format=2
+Enable @option{-Wformat} plus format checks not included in
+@option{-Wformat}.  Currently equivalent to @samp{-Wformat
+-Wformat-nonliteral -Wformat-security -Wformat-y2k}.
+
+@item -Wnonnull @r{(C and Objective-C only)}
+@opindex Wnonnull
+@opindex Wno-nonnull
+Warn about passing a null pointer for arguments marked as
+requiring a non-null value by the @code{nonnull} function attribute.
+
+@option{-Wnonnull} is included in @option{-Wall} and @option{-Wformat}.  It
+can be disabled with the @option{-Wno-nonnull} option.
+
+@item -Winit-self @r{(C, C++, Objective-C and Objective-C++ only)}
+@opindex Winit-self
+@opindex Wno-init-self
+Warn about uninitialized variables which are initialized with themselves.
+Note this option can only be used with the @option{-Wuninitialized} option.
+
+For example, GCC will warn about @code{i} being uninitialized in the
+following snippet only when @option{-Winit-self} has been specified:
+@smallexample
+@group
+int f()
+@{
+  int i = i;
+  return i;
+@}
+@end group
+@end smallexample
+
+@item -Wimplicit-int @r{(C and Objective-C only)}
+@opindex Wimplicit-int
+@opindex Wno-implicit-int
+Warn when a declaration does not specify a type.
+This warning is enabled by @option{-Wall}.
+
+@item -Wimplicit-function-declaration @r{(C and Objective-C only)}
+@opindex Wimplicit-function-declaration
+@opindex Wno-implicit-function-declaration
+Give a warning whenever a function is used before being declared. In
+C99 mode (@option{-std=c99} or @option{-std=gnu99}), this warning is
+enabled by default and it is made into an error by
+@option{-pedantic-errors}. This warning is also enabled by
+@option{-Wall}.
+
+@item -Wimplicit @r{(C and Objective-C only)}
+@opindex Wimplicit
+@opindex Wno-implicit
+Same as @option{-Wimplicit-int} and @option{-Wimplicit-function-declaration}.
+This warning is enabled by @option{-Wall}.
+
+@item -Wignored-qualifiers @r{(C and C++ only)}
+@opindex Wignored-qualifiers
+@opindex Wno-ignored-qualifiers
+Warn if the return type of a function has a type qualifier
+such as @code{const}.  For ISO C such a type qualifier has no effect,
+since the value returned by a function is not an lvalue.
+For C++, the warning is only emitted for scalar types or @code{void}.
+ISO C prohibits qualified @code{void} return types on function
+definitions, so such return types always receive a warning
+even without this option.
+
+This warning is also enabled by @option{-Wextra}.
+
+@item -Wmain
+@opindex Wmain
+@opindex Wno-main
+Warn if the type of @samp{main} is suspicious.  @samp{main} should be
+a function with external linkage, returning int, taking either zero
+arguments, two, or three arguments of appropriate types.  This warning
+is enabled by default in C++ and is enabled by either @option{-Wall}
+or @option{-pedantic}.
+
+@item -Wmissing-braces
+@opindex Wmissing-braces
+@opindex Wno-missing-braces
+Warn if an aggregate or union initializer is not fully bracketed.  In
+the following example, the initializer for @samp{a} is not fully
+bracketed, but that for @samp{b} is fully bracketed.
+
+@smallexample
+int a[2][2] = @{ 0, 1, 2, 3 @};
+int b[2][2] = @{ @{ 0, 1 @}, @{ 2, 3 @} @};
+@end smallexample
+
+This warning is enabled by @option{-Wall}.
+
+@item -Wmissing-include-dirs @r{(C, C++, Objective-C and Objective-C++ only)}
+@opindex Wmissing-include-dirs
+@opindex Wno-missing-include-dirs
+Warn if a user-supplied include directory does not exist.
+
+@item -Wparentheses
+@opindex Wparentheses
+@opindex Wno-parentheses
+Warn if parentheses are omitted in certain contexts, such
+as when there is an assignment in a context where a truth value
+is expected, or when operators are nested whose precedence people
+often get confused about.
+
+Also warn if a comparison like @samp{x<=y<=z} appears; this is
+equivalent to @samp{(x<=y ? 1 : 0) <= z}, which is a different
+interpretation from that of ordinary mathematical notation.
+
+Also warn about constructions where there may be confusion to which
+@code{if} statement an @code{else} branch belongs.  Here is an example of
+such a case:
+
+@smallexample
+@group
+@{
+  if (a)
+    if (b)
+      foo ();
+  else
+    bar ();
+@}
+@end group
+@end smallexample
+
+In C/C++, every @code{else} branch belongs to the innermost possible
+@code{if} statement, which in this example is @code{if (b)}.  This is
+often not what the programmer expected, as illustrated in the above
+example by indentation the programmer chose.  When there is the
+potential for this confusion, GCC will issue a warning when this flag
+is specified.  To eliminate the warning, add explicit braces around
+the innermost @code{if} statement so there is no way the @code{else}
+could belong to the enclosing @code{if}.  The resulting code would
+look like this:
+
+@smallexample
+@group
+@{
+  if (a)
+    @{
+      if (b)
+        foo ();
+      else
+        bar ();
+    @}
+@}
+@end group
+@end smallexample
+
+Also warn for dangerous uses of the 
+?: with omitted middle operand GNU extension. When the condition
+in the ?: operator is a boolean expression the omitted value will
+be always 1. Often the user expects it to be a value computed
+inside the conditional expression instead. 
+
+This warning is enabled by @option{-Wall}.
+
+@item -Wsequence-point
+@opindex Wsequence-point
+@opindex Wno-sequence-point
+Warn about code that may have undefined semantics because of violations
+of sequence point rules in the C and C++ standards.
+
+The C and C++ standards defines the order in which expressions in a C/C++
+program are evaluated in terms of @dfn{sequence points}, which represent
+a partial ordering between the execution of parts of the program: those
+executed before the sequence point, and those executed after it.  These
+occur after the evaluation of a full expression (one which is not part
+of a larger expression), after the evaluation of the first operand of a
+@code{&&}, @code{||}, @code{? :} or @code{,} (comma) operator, before a
+function is called (but after the evaluation of its arguments and the
+expression denoting the called function), and in certain other places.
+Other than as expressed by the sequence point rules, the order of
+evaluation of subexpressions of an expression is not specified.  All
+these rules describe only a partial order rather than a total order,
+since, for example, if two functions are called within one expression
+with no sequence point between them, the order in which the functions
+are called is not specified.  However, the standards committee have
+ruled that function calls do not overlap.
+
+It is not specified when between sequence points modifications to the
+values of objects take effect.  Programs whose behavior depends on this
+have undefined behavior; the C and C++ standards specify that ``Between
+the previous and next sequence point an object shall have its stored
+value modified at most once by the evaluation of an expression.
+Furthermore, the prior value shall be read only to determine the value
+to be stored.''.  If a program breaks these rules, the results on any
+particular implementation are entirely unpredictable.
+
+Examples of code with undefined behavior are @code{a = a++;}, @code{a[n]
+= b[n++]} and @code{a[i++] = i;}.  Some more complicated cases are not
+diagnosed by this option, and it may give an occasional false positive
+result, but in general it has been found fairly effective at detecting
+this sort of problem in programs.
+
+The standard is worded confusingly, therefore there is some debate
+over the precise meaning of the sequence point rules in subtle cases.
+Links to discussions of the problem, including proposed formal
+definitions, may be found on the GCC readings page, at
+@uref{http://gcc.gnu.org/@/readings.html}.
+
+This warning is enabled by @option{-Wall} for C and C++.
+
+@item -Wreturn-type
+@opindex Wreturn-type
+@opindex Wno-return-type
+Warn whenever a function is defined with a return-type that defaults
+to @code{int}.  Also warn about any @code{return} statement with no
+return-value in a function whose return-type is not @code{void}
+(falling off the end of the function body is considered returning
+without a value), and about a @code{return} statement with an
+expression in a function whose return-type is @code{void}.
+
+For C++, a function without return type always produces a diagnostic
+message, even when @option{-Wno-return-type} is specified.  The only
+exceptions are @samp{main} and functions defined in system headers.
+
+This warning is enabled by @option{-Wall}.
+
+@item -Wswitch
+@opindex Wswitch
+@opindex Wno-switch
+Warn whenever a @code{switch} statement has an index of enumerated type
+and lacks a @code{case} for one or more of the named codes of that
+enumeration.  (The presence of a @code{default} label prevents this
+warning.)  @code{case} labels outside the enumeration range also
+provoke warnings when this option is used (even if there is a
+@code{default} label).
+This warning is enabled by @option{-Wall}.
+
+@item -Wswitch-default
+@opindex Wswitch-default
+@opindex Wno-switch-default
+Warn whenever a @code{switch} statement does not have a @code{default}
+case.
+
+@item -Wswitch-enum
+@opindex Wswitch-enum
+@opindex Wno-switch-enum
+Warn whenever a @code{switch} statement has an index of enumerated type
+and lacks a @code{case} for one or more of the named codes of that
+enumeration.  @code{case} labels outside the enumeration range also
+provoke warnings when this option is used.  The only difference
+between @option{-Wswitch} and this option is that this option gives a
+warning about an omitted enumeration code even if there is a
+@code{default} label.
+
+@item -Wsync-nand @r{(C and C++ only)}
+@opindex Wsync-nand
+@opindex Wno-sync-nand
+Warn when @code{__sync_fetch_and_nand} and @code{__sync_nand_and_fetch}
+built-in functions are used.  These functions changed semantics in GCC 4.4.
+
+@item -Wtrigraphs
+@opindex Wtrigraphs
+@opindex Wno-trigraphs
+Warn if any trigraphs are encountered that might change the meaning of
+the program (trigraphs within comments are not warned about).
+This warning is enabled by @option{-Wall}.
+
+@item -Wunused-but-set-parameter
+@opindex Wunused-but-set-parameter
+@opindex Wno-unused-but-set-parameter
+Warn whenever a function parameter is assigned to, but otherwise unused
+(aside from its declaration).
+
+To suppress this warning use the @samp{unused} attribute
+(@pxref{Variable Attributes}).
+
+This warning is also enabled by @option{-Wunused} together with
+@option{-Wextra}.
+
+@item -Wunused-but-set-variable
+@opindex Wunused-but-set-variable
+@opindex Wno-unused-but-set-variable
+Warn whenever a local variable is assigned to, but otherwise unused
+(aside from its declaration).
+This warning is enabled by @option{-Wall}.
+
+To suppress this warning use the @samp{unused} attribute
+(@pxref{Variable Attributes}).
+
+This warning is also enabled by @option{-Wunused}, which is enabled
+by @option{-Wall}.
+
+@item -Wunused-function
+@opindex Wunused-function
+@opindex Wno-unused-function
+Warn whenever a static function is declared but not defined or a
+non-inline static function is unused.
+This warning is enabled by @option{-Wall}.
+
+@item -Wunused-label
+@opindex Wunused-label
+@opindex Wno-unused-label
+Warn whenever a label is declared but not used.
+This warning is enabled by @option{-Wall}.
+
+To suppress this warning use the @samp{unused} attribute
+(@pxref{Variable Attributes}).
+
+@item -Wunused-parameter
+@opindex Wunused-parameter
+@opindex Wno-unused-parameter
+Warn whenever a function parameter is unused aside from its declaration.
+
+To suppress this warning use the @samp{unused} attribute
+(@pxref{Variable Attributes}).
+
+@item -Wno-unused-result
+@opindex Wunused-result
+@opindex Wno-unused-result
+Do not warn if a caller of a function marked with attribute
+@code{warn_unused_result} (@pxref{Variable Attributes}) does not use
+its return value. The default is @option{-Wunused-result}.
+
+@item -Wunused-variable
+@opindex Wunused-variable
+@opindex Wno-unused-variable
+Warn whenever a local variable or non-constant static variable is unused
+aside from its declaration.
+This warning is enabled by @option{-Wall}.
+
+To suppress this warning use the @samp{unused} attribute
+(@pxref{Variable Attributes}).
+
+@item -Wunused-value
+@opindex Wunused-value
+@opindex Wno-unused-value
+Warn whenever a statement computes a result that is explicitly not
+used. To suppress this warning cast the unused expression to
+@samp{void}. This includes an expression-statement or the left-hand
+side of a comma expression that contains no side effects. For example,
+an expression such as @samp{x[i,j]} will cause a warning, while
+@samp{x[(void)i,j]} will not.
+
+This warning is enabled by @option{-Wall}.
+
+@item -Wunused
+@opindex Wunused
+@opindex Wno-unused
+All the above @option{-Wunused} options combined.
+
+In order to get a warning about an unused function parameter, you must
+either specify @samp{-Wextra -Wunused} (note that @samp{-Wall} implies
+@samp{-Wunused}), or separately specify @option{-Wunused-parameter}.
+
+@item -Wuninitialized
+@opindex Wuninitialized
+@opindex Wno-uninitialized
+Warn if an automatic variable is used without first being initialized
+or if a variable may be clobbered by a @code{setjmp} call. In C++,
+warn if a non-static reference or non-static @samp{const} member
+appears in a class without constructors.
+
+If you want to warn about code which uses the uninitialized value of the
+variable in its own initializer, use the @option{-Winit-self} option.
+
+These warnings occur for individual uninitialized or clobbered
+elements of structure, union or array variables as well as for
+variables which are uninitialized or clobbered as a whole.  They do
+not occur for variables or elements declared @code{volatile}.  Because
+these warnings depend on optimization, the exact variables or elements
+for which there are warnings will depend on the precise optimization
+options and version of GCC used.
+
+Note that there may be no warning about a variable that is used only
+to compute a value that itself is never used, because such
+computations may be deleted by data flow analysis before the warnings
+are printed.
+
+These warnings are made optional because GCC is not smart
+enough to see all the reasons why the code might be correct
+despite appearing to have an error.  Here is one example of how
+this can happen:
+
+@smallexample
+@group
+@{
+  int x;
+  switch (y)
+    @{
+    case 1: x = 1;
+      break;
+    case 2: x = 4;
+      break;
+    case 3: x = 5;
+    @}
+  foo (x);
+@}
+@end group
+@end smallexample
+
+@noindent
+If the value of @code{y} is always 1, 2 or 3, then @code{x} is
+always initialized, but GCC doesn't know this.  Here is
+another common case:
+
+@smallexample
+@{
+  int save_y;
+  if (change_y) save_y = y, y = new_y;
+  @dots{}
+  if (change_y) y = save_y;
+@}
+@end smallexample
+
+@noindent
+This has no bug because @code{save_y} is used only if it is set.
+
+@cindex @code{longjmp} warnings
+This option also warns when a non-volatile automatic variable might be
+changed by a call to @code{longjmp}.  These warnings as well are possible
+only in optimizing compilation.
+
+The compiler sees only the calls to @code{setjmp}.  It cannot know
+where @code{longjmp} will be called; in fact, a signal handler could
+call it at any point in the code.  As a result, you may get a warning
+even when there is in fact no problem because @code{longjmp} cannot
+in fact be called at the place which would cause a problem.
+
+Some spurious warnings can be avoided if you declare all the functions
+you use that never return as @code{noreturn}.  @xref{Function
+Attributes}.
+
+This warning is enabled by @option{-Wall} or @option{-Wextra}.
+
+@item -Wunknown-pragmas
+@opindex Wunknown-pragmas
+@opindex Wno-unknown-pragmas
+@cindex warning for unknown pragmas
+@cindex unknown pragmas, warning
+@cindex pragmas, warning of unknown
+Warn when a #pragma directive is encountered which is not understood by
+GCC@.  If this command line option is used, warnings will even be issued
+for unknown pragmas in system header files.  This is not the case if
+the warnings were only enabled by the @option{-Wall} command line option.
+
+@item -Wno-pragmas
+@opindex Wno-pragmas
+@opindex Wpragmas
+Do not warn about misuses of pragmas, such as incorrect parameters,
+invalid syntax, or conflicts between pragmas.  See also
+@samp{-Wunknown-pragmas}.
+
+@item -Wstrict-aliasing
+@opindex Wstrict-aliasing
+@opindex Wno-strict-aliasing
+This option is only active when @option{-fstrict-aliasing} is active.
+It warns about code which might break the strict aliasing rules that the
+compiler is using for optimization.  The warning does not catch all
+cases, but does attempt to catch the more common pitfalls.  It is
+included in @option{-Wall}.
+It is equivalent to @option{-Wstrict-aliasing=3}
+
+@item -Wstrict-aliasing=n
+@opindex Wstrict-aliasing=n
+@opindex Wno-strict-aliasing=n
+This option is only active when @option{-fstrict-aliasing} is active.
+It warns about code which might break the strict aliasing rules that the
+compiler is using for optimization.
+Higher levels correspond to higher accuracy (fewer false positives).
+Higher levels also correspond to more effort, similar to the way -O works.
+@option{-Wstrict-aliasing} is equivalent to @option{-Wstrict-aliasing=n},
+with n=3.
+
+Level 1: Most aggressive, quick, least accurate.
+Possibly useful when higher levels
+do not warn but -fstrict-aliasing still breaks the code, as it has very few
+false negatives.  However, it has many false positives.
+Warns for all pointer conversions between possibly incompatible types,
+even if never dereferenced.  Runs in the frontend only.
+
+Level 2: Aggressive, quick, not too precise.
+May still have many false positives (not as many as level 1 though),
+and few false negatives (but possibly more than level 1).
+Unlike level 1, it only warns when an address is taken.  Warns about
+incomplete types.  Runs in the frontend only.
+
+Level 3 (default for @option{-Wstrict-aliasing}):
+Should have very few false positives and few false
+negatives.  Slightly slower than levels 1 or 2 when optimization is enabled.
+Takes care of the common pun+dereference pattern in the frontend:
+@code{*(int*)&some_float}.
+If optimization is enabled, it also runs in the backend, where it deals
+with multiple statement cases using flow-sensitive points-to information.
+Only warns when the converted pointer is dereferenced.
+Does not warn about incomplete types.
+
+@item -Wstrict-overflow
+@itemx -Wstrict-overflow=@var{n}
+@opindex Wstrict-overflow
+@opindex Wno-strict-overflow
+This option is only active when @option{-fstrict-overflow} is active.
+It warns about cases where the compiler optimizes based on the
+assumption that signed overflow does not occur.  Note that it does not
+warn about all cases where the code might overflow: it only warns
+about cases where the compiler implements some optimization.  Thus
+this warning depends on the optimization level.
+
+An optimization which assumes that signed overflow does not occur is
+perfectly safe if the values of the variables involved are such that
+overflow never does, in fact, occur.  Therefore this warning can
+easily give a false positive: a warning about code which is not
+actually a problem.  To help focus on important issues, several
+warning levels are defined.  No warnings are issued for the use of
+undefined signed overflow when estimating how many iterations a loop
+will require, in particular when determining whether a loop will be
+executed at all.
+
+@table @gcctabopt
+@item -Wstrict-overflow=1
+Warn about cases which are both questionable and easy to avoid.  For
+example: @code{x + 1 > x}; with @option{-fstrict-overflow}, the
+compiler will simplify this to @code{1}.  This level of
+@option{-Wstrict-overflow} is enabled by @option{-Wall}; higher levels
+are not, and must be explicitly requested.
+
+@item -Wstrict-overflow=2
+Also warn about other cases where a comparison is simplified to a
+constant.  For example: @code{abs (x) >= 0}.  This can only be
+simplified when @option{-fstrict-overflow} is in effect, because
+@code{abs (INT_MIN)} overflows to @code{INT_MIN}, which is less than
+zero.  @option{-Wstrict-overflow} (with no level) is the same as
+@option{-Wstrict-overflow=2}.
+
+@item -Wstrict-overflow=3
+Also warn about other cases where a comparison is simplified.  For
+example: @code{x + 1 > 1} will be simplified to @code{x > 0}.
+
+@item -Wstrict-overflow=4
+Also warn about other simplifications not covered by the above cases.
+For example: @code{(x * 10) / 5} will be simplified to @code{x * 2}.
+
+@item -Wstrict-overflow=5
+Also warn about cases where the compiler reduces the magnitude of a
+constant involved in a comparison.  For example: @code{x + 2 > y} will
+be simplified to @code{x + 1 >= y}.  This is reported only at the
+highest warning level because this simplification applies to many
+comparisons, so this warning level will give a very large number of
+false positives.
+@end table
+
+@item -Wsuggest-attribute=@r{[}pure@r{|}const@r{|}noreturn@r{]}
+@opindex Wsuggest-attribute=
+@opindex Wno-suggest-attribute=
+Warn for cases where adding an attribute may be beneficial. The
+attributes currently supported are listed below.
+
+@table @gcctabopt
+@item -Wsuggest-attribute=pure
+@itemx -Wsuggest-attribute=const
+@itemx -Wsuggest-attribute=noreturn
+@opindex Wsuggest-attribute=pure
+@opindex Wno-suggest-attribute=pure
+@opindex Wsuggest-attribute=const
+@opindex Wno-suggest-attribute=const
+@opindex Wsuggest-attribute=noreturn
+@opindex Wno-suggest-attribute=noreturn
+
+Warn about functions which might be candidates for attributes
+@code{pure}, @code{const} or @code{noreturn}.  The compiler only warns for
+functions visible in other compilation units or (in the case of @code{pure} and
+@code{const}) if it cannot prove that the function returns normally. A function
+returns normally if it doesn't contain an infinite loop nor returns abnormally
+by throwing, calling @code{abort()} or trapping.  This analysis requires option
+@option{-fipa-pure-const}, which is enabled by default at @option{-O} and
+higher.  Higher optimization levels improve the accuracy of the analysis.
+@end table
+
+@item -Warray-bounds
+@opindex Wno-array-bounds
+@opindex Warray-bounds
+This option is only active when @option{-ftree-vrp} is active
+(default for @option{-O2} and above). It warns about subscripts to arrays
+that are always out of bounds. This warning is enabled by @option{-Wall}.
+
+@item -Wno-div-by-zero
+@opindex Wno-div-by-zero
+@opindex Wdiv-by-zero
+Do not warn about compile-time integer division by zero.  Floating point
+division by zero is not warned about, as it can be a legitimate way of
+obtaining infinities and NaNs.
+
+@item -Wsystem-headers
+@opindex Wsystem-headers
+@opindex Wno-system-headers
+@cindex warnings from system headers
+@cindex system headers, warnings from
+Print warning messages for constructs found in system header files.
+Warnings from system headers are normally suppressed, on the assumption
+that they usually do not indicate real problems and would only make the
+compiler output harder to read.  Using this command line option tells
+GCC to emit warnings from system headers as if they occurred in user
+code.  However, note that using @option{-Wall} in conjunction with this
+option will @emph{not} warn about unknown pragmas in system
+headers---for that, @option{-Wunknown-pragmas} must also be used.
+
+@item -Wtrampolines
+@opindex Wtrampolines
+@opindex Wno-trampolines
+ Warn about trampolines generated for pointers to nested functions.
+ 
+ A trampoline is a small piece of data or code that is created at run
+ time on the stack when the address of a nested function is taken, and
+ is used to call the nested function indirectly.  For some targets, it
+ is made up of data only and thus requires no special treatment.  But,
+ for most targets, it is made up of code and thus requires the stack
+ to be made executable in order for the program to work properly.
+
+@item -Wfloat-equal
+@opindex Wfloat-equal
+@opindex Wno-float-equal
+Warn if floating point values are used in equality comparisons.
+
+The idea behind this is that sometimes it is convenient (for the
+programmer) to consider floating-point values as approximations to
+infinitely precise real numbers.  If you are doing this, then you need
+to compute (by analyzing the code, or in some other way) the maximum or
+likely maximum error that the computation introduces, and allow for it
+when performing comparisons (and when producing output, but that's a
+different problem).  In particular, instead of testing for equality, you
+would check to see whether the two values have ranges that overlap; and
+this is done with the relational operators, so equality comparisons are
+probably mistaken.
+
+@item -Wtraditional @r{(C and Objective-C only)}
+@opindex Wtraditional
+@opindex Wno-traditional
+Warn about certain constructs that behave differently in traditional and
+ISO C@.  Also warn about ISO C constructs that have no traditional C
+equivalent, and/or problematic constructs which should be avoided.
+
+@itemize @bullet
+@item
+Macro parameters that appear within string literals in the macro body.
+In traditional C macro replacement takes place within string literals,
+but does not in ISO C@.
+
+@item
+In traditional C, some preprocessor directives did not exist.
+Traditional preprocessors would only consider a line to be a directive
+if the @samp{#} appeared in column 1 on the line.  Therefore
+@option{-Wtraditional} warns about directives that traditional C
+understands but would ignore because the @samp{#} does not appear as the
+first character on the line.  It also suggests you hide directives like
+@samp{#pragma} not understood by traditional C by indenting them.  Some
+traditional implementations would not recognize @samp{#elif}, so it
+suggests avoiding it altogether.
+
+@item
+A function-like macro that appears without arguments.
+
+@item
+The unary plus operator.
+
+@item
+The @samp{U} integer constant suffix, or the @samp{F} or @samp{L} floating point
+constant suffixes.  (Traditional C does support the @samp{L} suffix on integer
+constants.)  Note, these suffixes appear in macros defined in the system
+headers of most modern systems, e.g.@: the @samp{_MIN}/@samp{_MAX} macros in @code{<limits.h>}.
+Use of these macros in user code might normally lead to spurious
+warnings, however GCC's integrated preprocessor has enough context to
+avoid warning in these cases.
+
+@item
+A function declared external in one block and then used after the end of
+the block.
+
+@item
+A @code{switch} statement has an operand of type @code{long}.
+
+@item
+A non-@code{static} function declaration follows a @code{static} one.
+This construct is not accepted by some traditional C compilers.
+
+@item
+The ISO type of an integer constant has a different width or
+signedness from its traditional type.  This warning is only issued if
+the base of the constant is ten.  I.e.@: hexadecimal or octal values, which
+typically represent bit patterns, are not warned about.
+
+@item
+Usage of ISO string concatenation is detected.
+
+@item
+Initialization of automatic aggregates.
+
+@item
+Identifier conflicts with labels.  Traditional C lacks a separate
+namespace for labels.
+
+@item
+Initialization of unions.  If the initializer is zero, the warning is
+omitted.  This is done under the assumption that the zero initializer in
+user code appears conditioned on e.g.@: @code{__STDC__} to avoid missing
+initializer warnings and relies on default initialization to zero in the
+traditional C case.
+
+@item
+Conversions by prototypes between fixed/floating point values and vice
+versa.  The absence of these prototypes when compiling with traditional
+C would cause serious problems.  This is a subset of the possible
+conversion warnings, for the full set use @option{-Wtraditional-conversion}.
+
+@item
+Use of ISO C style function definitions.  This warning intentionally is
+@emph{not} issued for prototype declarations or variadic functions
+because these ISO C features will appear in your code when using
+libiberty's traditional C compatibility macros, @code{PARAMS} and
+@code{VPARAMS}.  This warning is also bypassed for nested functions
+because that feature is already a GCC extension and thus not relevant to
+traditional C compatibility.
+@end itemize
+
+@item -Wtraditional-conversion @r{(C and Objective-C only)}
+@opindex Wtraditional-conversion
+@opindex Wno-traditional-conversion
+Warn if a prototype causes a type conversion that is different from what
+would happen to the same argument in the absence of a prototype.  This
+includes conversions of fixed point to floating and vice versa, and
+conversions changing the width or signedness of a fixed point argument
+except when the same as the default promotion.
+
+@item -Wdeclaration-after-statement @r{(C and Objective-C only)}
+@opindex Wdeclaration-after-statement
+@opindex Wno-declaration-after-statement
+Warn when a declaration is found after a statement in a block.  This
+construct, known from C++, was introduced with ISO C99 and is by default
+allowed in GCC@.  It is not supported by ISO C90 and was not supported by
+GCC versions before GCC 3.0.  @xref{Mixed Declarations}.
+
+@item -Wundef
+@opindex Wundef
+@opindex Wno-undef
+Warn if an undefined identifier is evaluated in an @samp{#if} directive.
+
+@item -Wno-endif-labels
+@opindex Wno-endif-labels
+@opindex Wendif-labels
+Do not warn whenever an @samp{#else} or an @samp{#endif} are followed by text.
+
+@item -Wshadow
+@opindex Wshadow
+@opindex Wno-shadow
+Warn whenever a local variable or type declaration shadows another variable,
+parameter, type, or class member (in C++), or whenever a built-in function
+is shadowed. Note that in C++, the compiler will not warn if a local variable
+shadows a struct/class/enum, but will warn if it shadows an explicit typedef.
+
+@item -Wlarger-than=@var{len}
+@opindex Wlarger-than=@var{len}
+@opindex Wlarger-than-@var{len}
+Warn whenever an object of larger than @var{len} bytes is defined.
+
+@item -Wframe-larger-than=@var{len}
+@opindex Wframe-larger-than
+Warn if the size of a function frame is larger than @var{len} bytes.
+The computation done to determine the stack frame size is approximate
+and not conservative.
+The actual requirements may be somewhat greater than @var{len}
+even if you do not get a warning.  In addition, any space allocated
+via @code{alloca}, variable-length arrays, or related constructs
+is not included by the compiler when determining
+whether or not to issue a warning.
+
+@item -Wunsafe-loop-optimizations
+@opindex Wunsafe-loop-optimizations
+@opindex Wno-unsafe-loop-optimizations
+Warn if the loop cannot be optimized because the compiler could not
+assume anything on the bounds of the loop indices.  With
+@option{-funsafe-loop-optimizations} warn if the compiler made
+such assumptions.
+
+@item -Wno-pedantic-ms-format @r{(MinGW targets only)}
+@opindex Wno-pedantic-ms-format
+@opindex Wpedantic-ms-format
+Disables the warnings about non-ISO @code{printf} / @code{scanf} format
+width specifiers @code{I32}, @code{I64}, and @code{I} used on Windows targets
+depending on the MS runtime, when you are using the options @option{-Wformat}
+and @option{-pedantic} without gnu-extensions.
+
+@item -Wpointer-arith
+@opindex Wpointer-arith
+@opindex Wno-pointer-arith
+Warn about anything that depends on the ``size of'' a function type or
+of @code{void}.  GNU C assigns these types a size of 1, for
+convenience in calculations with @code{void *} pointers and pointers
+to functions.  In C++, warn also when an arithmetic operation involves
+@code{NULL}.  This warning is also enabled by @option{-pedantic}.
+
+@item -Wtype-limits
+@opindex Wtype-limits
+@opindex Wno-type-limits
+Warn if a comparison is always true or always false due to the limited
+range of the data type, but do not warn for constant expressions.  For
+example, warn if an unsigned variable is compared against zero with
+@samp{<} or @samp{>=}.  This warning is also enabled by
+@option{-Wextra}.
+
+@item -Wbad-function-cast @r{(C and Objective-C only)}
+@opindex Wbad-function-cast
+@opindex Wno-bad-function-cast
+Warn whenever a function call is cast to a non-matching type.
+For example, warn if @code{int malloc()} is cast to @code{anything *}.
+
+@item -Wc++-compat @r{(C and Objective-C only)}
+Warn about ISO C constructs that are outside of the common subset of
+ISO C and ISO C++, e.g.@: request for implicit conversion from
+@code{void *} to a pointer to non-@code{void} type.
+
+@item -Wc++0x-compat @r{(C++ and Objective-C++ only)}
+Warn about C++ constructs whose meaning differs between ISO C++ 1998 and
+ISO C++ 200x, e.g., identifiers in ISO C++ 1998 that will become keywords
+in ISO C++ 200x.  This warning is enabled by @option{-Wall}.
+
+@item -Wcast-qual
+@opindex Wcast-qual
+@opindex Wno-cast-qual
+Warn whenever a pointer is cast so as to remove a type qualifier from
+the target type.  For example, warn if a @code{const char *} is cast
+to an ordinary @code{char *}.
+
+Also warn when making a cast which introduces a type qualifier in an
+unsafe way.  For example, casting @code{char **} to @code{const char **}
+is unsafe, as in this example:
+
+@smallexample
+  /* p is char ** value.  */
+  const char **q = (const char **) p;
+  /* Assignment of readonly string to const char * is OK.  */
+  *q = "string";
+  /* Now char** pointer points to read-only memory.  */
+  **p = 'b';
+@end smallexample
+
+@item -Wcast-align
+@opindex Wcast-align
+@opindex Wno-cast-align
+Warn whenever a pointer is cast such that the required alignment of the
+target is increased.  For example, warn if a @code{char *} is cast to
+an @code{int *} on machines where integers can only be accessed at
+two- or four-byte boundaries.
+
+@item -Wwrite-strings
+@opindex Wwrite-strings
+@opindex Wno-write-strings
+When compiling C, give string constants the type @code{const
+char[@var{length}]} so that copying the address of one into a
+non-@code{const} @code{char *} pointer will get a warning.  These
+warnings will help you find at compile time code that can try to write
+into a string constant, but only if you have been very careful about
+using @code{const} in declarations and prototypes.  Otherwise, it will
+just be a nuisance. This is why we did not make @option{-Wall} request
+these warnings.
+
+When compiling C++, warn about the deprecated conversion from string
+literals to @code{char *}.  This warning is enabled by default for C++
+programs.
+
+@item -Wclobbered
+@opindex Wclobbered
+@opindex Wno-clobbered
+Warn for variables that might be changed by @samp{longjmp} or
+@samp{vfork}.  This warning is also enabled by @option{-Wextra}.
+
+@item -Wconversion
+@opindex Wconversion
+@opindex Wno-conversion
+Warn for implicit conversions that may alter a value. This includes
+conversions between real and integer, like @code{abs (x)} when
+@code{x} is @code{double}; conversions between signed and unsigned,
+like @code{unsigned ui = -1}; and conversions to smaller types, like
+@code{sqrtf (M_PI)}. Do not warn for explicit casts like @code{abs
+((int) x)} and @code{ui = (unsigned) -1}, or if the value is not
+changed by the conversion like in @code{abs (2.0)}.  Warnings about
+conversions between signed and unsigned integers can be disabled by
+using @option{-Wno-sign-conversion}.
+
+For C++, also warn for confusing overload resolution for user-defined
+conversions; and conversions that will never use a type conversion
+operator: conversions to @code{void}, the same type, a base class or a
+reference to them. Warnings about conversions between signed and
+unsigned integers are disabled by default in C++ unless
+@option{-Wsign-conversion} is explicitly enabled.
+
+@item -Wno-conversion-null @r{(C++ and Objective-C++ only)}
+@opindex Wconversion-null
+@opindex Wno-conversion-null
+Do not warn for conversions between @code{NULL} and non-pointer
+types. @option{-Wconversion-null} is enabled by default.
+
+@item -Wempty-body
+@opindex Wempty-body
+@opindex Wno-empty-body
+Warn if an empty body occurs in an @samp{if}, @samp{else} or @samp{do
+while} statement.  This warning is also enabled by @option{-Wextra}.
+
+@item -Wenum-compare
+@opindex Wenum-compare
+@opindex Wno-enum-compare
+Warn about a comparison between values of different enum types. In C++
+this warning is enabled by default.  In C this warning is enabled by
+@option{-Wall}.
+
+@item -Wjump-misses-init @r{(C, Objective-C only)}
+@opindex Wjump-misses-init
+@opindex Wno-jump-misses-init
+Warn if a @code{goto} statement or a @code{switch} statement jumps
+forward across the initialization of a variable, or jumps backward to a
+label after the variable has been initialized.  This only warns about
+variables which are initialized when they are declared.  This warning is
+only supported for C and Objective C; in C++ this sort of branch is an
+error in any case.
+
+@option{-Wjump-misses-init} is included in @option{-Wc++-compat}.  It
+can be disabled with the @option{-Wno-jump-misses-init} option.
+
+@item -Wsign-compare
+@opindex Wsign-compare
+@opindex Wno-sign-compare
+@cindex warning for comparison of signed and unsigned values
+@cindex comparison of signed and unsigned values, warning
+@cindex signed and unsigned values, comparison warning
+Warn when a comparison between signed and unsigned values could produce
+an incorrect result when the signed value is converted to unsigned.
+This warning is also enabled by @option{-Wextra}; to get the other warnings
+of @option{-Wextra} without this warning, use @samp{-Wextra -Wno-sign-compare}.
+
+@item -Wsign-conversion
+@opindex Wsign-conversion
+@opindex Wno-sign-conversion
+Warn for implicit conversions that may change the sign of an integer
+value, like assigning a signed integer expression to an unsigned
+integer variable. An explicit cast silences the warning. In C, this
+option is enabled also by @option{-Wconversion}.
+
+@item -Waddress
+@opindex Waddress
+@opindex Wno-address
+Warn about suspicious uses of memory addresses. These include using
+the address of a function in a conditional expression, such as
+@code{void func(void); if (func)}, and comparisons against the memory
+address of a string literal, such as @code{if (x == "abc")}.  Such
+uses typically indicate a programmer error: the address of a function
+always evaluates to true, so their use in a conditional usually
+indicate that the programmer forgot the parentheses in a function
+call; and comparisons against string literals result in unspecified
+behavior and are not portable in C, so they usually indicate that the
+programmer intended to use @code{strcmp}.  This warning is enabled by
+@option{-Wall}.
+
+@item -Wlogical-op
+@opindex Wlogical-op
+@opindex Wno-logical-op
+Warn about suspicious uses of logical operators in expressions.
+This includes using logical operators in contexts where a
+bit-wise operator is likely to be expected.
+
+@item -Waggregate-return
+@opindex Waggregate-return
+@opindex Wno-aggregate-return
+Warn if any functions that return structures or unions are defined or
+called.  (In languages where you can return an array, this also elicits
+a warning.)
+
+@item -Wno-attributes
+@opindex Wno-attributes
+@opindex Wattributes
+Do not warn if an unexpected @code{__attribute__} is used, such as
+unrecognized attributes, function attributes applied to variables,
+etc.  This will not stop errors for incorrect use of supported
+attributes.
+
+@item -Wno-builtin-macro-redefined
+@opindex Wno-builtin-macro-redefined
+@opindex Wbuiltin-macro-redefined
+Do not warn if certain built-in macros are redefined.  This suppresses
+warnings for redefinition of @code{__TIMESTAMP__}, @code{__TIME__},
+@code{__DATE__}, @code{__FILE__}, and @code{__BASE_FILE__}.
+
+@item -Wstrict-prototypes @r{(C and Objective-C only)}
+@opindex Wstrict-prototypes
+@opindex Wno-strict-prototypes
+Warn if a function is declared or defined without specifying the
+argument types.  (An old-style function definition is permitted without
+a warning if preceded by a declaration which specifies the argument
+types.)
+
+@item -Wold-style-declaration @r{(C and Objective-C only)}
+@opindex Wold-style-declaration
+@opindex Wno-old-style-declaration
+Warn for obsolescent usages, according to the C Standard, in a
+declaration. For example, warn if storage-class specifiers like
+@code{static} are not the first things in a declaration.  This warning
+is also enabled by @option{-Wextra}.
+
+@item -Wold-style-definition @r{(C and Objective-C only)}
+@opindex Wold-style-definition
+@opindex Wno-old-style-definition
+Warn if an old-style function definition is used.  A warning is given
+even if there is a previous prototype.
+
+@item -Wmissing-parameter-type @r{(C and Objective-C only)}
+@opindex Wmissing-parameter-type
+@opindex Wno-missing-parameter-type
+A function parameter is declared without a type specifier in K&R-style
+functions:
+
+@smallexample
+void foo(bar) @{ @}
+@end smallexample
+
+This warning is also enabled by @option{-Wextra}.
+
+@item -Wmissing-prototypes @r{(C and Objective-C only)}
+@opindex Wmissing-prototypes
+@opindex Wno-missing-prototypes
+Warn if a global function is defined without a previous prototype
+declaration.  This warning is issued even if the definition itself
+provides a prototype.  The aim is to detect global functions that fail
+to be declared in header files.
+
+@item -Wmissing-declarations
+@opindex Wmissing-declarations
+@opindex Wno-missing-declarations
+Warn if a global function is defined without a previous declaration.
+Do so even if the definition itself provides a prototype.
+Use this option to detect global functions that are not declared in
+header files.  In C++, no warnings are issued for function templates,
+or for inline functions, or for functions in anonymous namespaces.
+
+@item -Wmissing-field-initializers
+@opindex Wmissing-field-initializers
+@opindex Wno-missing-field-initializers
+@opindex W
+@opindex Wextra
+@opindex Wno-extra
+Warn if a structure's initializer has some fields missing.  For
+example, the following code would cause such a warning, because
+@code{x.h} is implicitly zero:
+
+@smallexample
+struct s @{ int f, g, h; @};
+struct s x = @{ 3, 4 @};
+@end smallexample
+
+This option does not warn about designated initializers, so the following
+modification would not trigger a warning:
+
+@smallexample
+struct s @{ int f, g, h; @};
+struct s x = @{ .f = 3, .g = 4 @};
+@end smallexample
+
+This warning is included in @option{-Wextra}.  To get other @option{-Wextra}
+warnings without this one, use @samp{-Wextra -Wno-missing-field-initializers}.
+
+@item -Wmissing-format-attribute
+@opindex Wmissing-format-attribute
+@opindex Wno-missing-format-attribute
+@opindex Wformat
+@opindex Wno-format
+Warn about function pointers which might be candidates for @code{format}
+attributes.  Note these are only possible candidates, not absolute ones.
+GCC will guess that function pointers with @code{format} attributes that
+are used in assignment, initialization, parameter passing or return
+statements should have a corresponding @code{format} attribute in the
+resulting type.  I.e.@: the left-hand side of the assignment or
+initialization, the type of the parameter variable, or the return type
+of the containing function respectively should also have a @code{format}
+attribute to avoid the warning.
+
+GCC will also warn about function definitions which might be
+candidates for @code{format} attributes.  Again, these are only
+possible candidates.  GCC will guess that @code{format} attributes
+might be appropriate for any function that calls a function like
+@code{vprintf} or @code{vscanf}, but this might not always be the
+case, and some functions for which @code{format} attributes are
+appropriate may not be detected.
+
+@item -Wno-multichar
+@opindex Wno-multichar
+@opindex Wmultichar
+Do not warn if a multicharacter constant (@samp{'FOOF'}) is used.
+Usually they indicate a typo in the user's code, as they have
+implementation-defined values, and should not be used in portable code.
+
+@item -Wnormalized=<none|id|nfc|nfkc>
+@opindex Wnormalized=
+@cindex NFC
+@cindex NFKC
+@cindex character set, input normalization
+In ISO C and ISO C++, two identifiers are different if they are
+different sequences of characters.  However, sometimes when characters
+outside the basic ASCII character set are used, you can have two
+different character sequences that look the same.  To avoid confusion,
+the ISO 10646 standard sets out some @dfn{normalization rules} which
+when applied ensure that two sequences that look the same are turned into
+the same sequence.  GCC can warn you if you are using identifiers which
+have not been normalized; this option controls that warning.
+
+There are four levels of warning that GCC supports.  The default is
+@option{-Wnormalized=nfc}, which warns about any identifier which is
+not in the ISO 10646 ``C'' normalized form, @dfn{NFC}.  NFC is the
+recommended form for most uses.
+
+Unfortunately, there are some characters which ISO C and ISO C++ allow
+in identifiers that when turned into NFC aren't allowable as
+identifiers.  That is, there's no way to use these symbols in portable
+ISO C or C++ and have all your identifiers in NFC@.
+@option{-Wnormalized=id} suppresses the warning for these characters.
+It is hoped that future versions of the standards involved will correct
+this, which is why this option is not the default.
+
+You can switch the warning off for all characters by writing
+@option{-Wnormalized=none}.  You would only want to do this if you
+were using some other normalization scheme (like ``D''), because
+otherwise you can easily create bugs that are literally impossible to see.
+
+Some characters in ISO 10646 have distinct meanings but look identical
+in some fonts or display methodologies, especially once formatting has
+been applied.  For instance @code{\u207F}, ``SUPERSCRIPT LATIN SMALL
+LETTER N'', will display just like a regular @code{n} which has been
+placed in a superscript.  ISO 10646 defines the @dfn{NFKC}
+normalization scheme to convert all these into a standard form as
+well, and GCC will warn if your code is not in NFKC if you use
+@option{-Wnormalized=nfkc}.  This warning is comparable to warning
+about every identifier that contains the letter O because it might be
+confused with the digit 0, and so is not the default, but may be
+useful as a local coding convention if the programming environment is
+unable to be fixed to display these characters distinctly.
+
+@item -Wno-deprecated
+@opindex Wno-deprecated
+@opindex Wdeprecated
+Do not warn about usage of deprecated features.  @xref{Deprecated Features}.
+
+@item -Wno-deprecated-declarations
+@opindex Wno-deprecated-declarations
+@opindex Wdeprecated-declarations
+Do not warn about uses of functions (@pxref{Function Attributes}),
+variables (@pxref{Variable Attributes}), and types (@pxref{Type
+Attributes}) marked as deprecated by using the @code{deprecated}
+attribute.
+
+@item -Wno-overflow
+@opindex Wno-overflow
+@opindex Woverflow
+Do not warn about compile-time overflow in constant expressions.
+
+@item -Woverride-init @r{(C and Objective-C only)}
+@opindex Woverride-init
+@opindex Wno-override-init
+@opindex W
+@opindex Wextra
+@opindex Wno-extra
+Warn if an initialized field without side effects is overridden when
+using designated initializers (@pxref{Designated Inits, , Designated
+Initializers}).
+
+This warning is included in @option{-Wextra}.  To get other
+@option{-Wextra} warnings without this one, use @samp{-Wextra
+-Wno-override-init}.
+
+@item -Wpacked
+@opindex Wpacked
+@opindex Wno-packed
+Warn if a structure is given the packed attribute, but the packed
+attribute has no effect on the layout or size of the structure.
+Such structures may be mis-aligned for little benefit.  For
+instance, in this code, the variable @code{f.x} in @code{struct bar}
+will be misaligned even though @code{struct bar} does not itself
+have the packed attribute:
+
+@smallexample
+@group
+struct foo @{
+  int x;
+  char a, b, c, d;
+@} __attribute__((packed));
+struct bar @{
+  char z;
+  struct foo f;
+@};
+@end group
+@end smallexample
+
+@item -Wpacked-bitfield-compat
+@opindex Wpacked-bitfield-compat
+@opindex Wno-packed-bitfield-compat
+The 4.1, 4.2 and 4.3 series of GCC ignore the @code{packed} attribute
+on bit-fields of type @code{char}.  This has been fixed in GCC 4.4 but
+the change can lead to differences in the structure layout.  GCC
+informs you when the offset of such a field has changed in GCC 4.4.
+For example there is no longer a 4-bit padding between field @code{a}
+and @code{b} in this structure:
+
+@smallexample
+struct foo
+@{
+  char a:4;
+  char b:8;
+@} __attribute__ ((packed));
+@end smallexample
+
+This warning is enabled by default.  Use
+@option{-Wno-packed-bitfield-compat} to disable this warning.
+
+@item -Wpadded
+@opindex Wpadded
+@opindex Wno-padded
+Warn if padding is included in a structure, either to align an element
+of the structure or to align the whole structure.  Sometimes when this
+happens it is possible to rearrange the fields of the structure to
+reduce the padding and so make the structure smaller.
+
+@item -Wredundant-decls
+@opindex Wredundant-decls
+@opindex Wno-redundant-decls
+Warn if anything is declared more than once in the same scope, even in
+cases where multiple declaration is valid and changes nothing.
+
+@item -Wnested-externs @r{(C and Objective-C only)}
+@opindex Wnested-externs
+@opindex Wno-nested-externs
+Warn if an @code{extern} declaration is encountered within a function.
+
+@item -Winline
+@opindex Winline
+@opindex Wno-inline
+Warn if a function can not be inlined and it was declared as inline.
+Even with this option, the compiler will not warn about failures to
+inline functions declared in system headers.
+
+The compiler uses a variety of heuristics to determine whether or not
+to inline a function.  For example, the compiler takes into account
+the size of the function being inlined and the amount of inlining
+that has already been done in the current function.  Therefore,
+seemingly insignificant changes in the source program can cause the
+warnings produced by @option{-Winline} to appear or disappear.
+
+@item -Wno-invalid-offsetof @r{(C++ and Objective-C++ only)}
+@opindex Wno-invalid-offsetof
+@opindex Winvalid-offsetof
+Suppress warnings from applying the @samp{offsetof} macro to a non-POD
+type.  According to the 1998 ISO C++ standard, applying @samp{offsetof}
+to a non-POD type is undefined.  In existing C++ implementations,
+however, @samp{offsetof} typically gives meaningful results even when
+applied to certain kinds of non-POD types. (Such as a simple
+@samp{struct} that fails to be a POD type only by virtue of having a
+constructor.)  This flag is for users who are aware that they are
+writing nonportable code and who have deliberately chosen to ignore the
+warning about it.
+
+The restrictions on @samp{offsetof} may be relaxed in a future version
+of the C++ standard.
+
+@item -Wno-int-to-pointer-cast
+@opindex Wno-int-to-pointer-cast
+@opindex Wint-to-pointer-cast
+Suppress warnings from casts to pointer type of an integer of a
+different size. In C++, casting to a pointer type of smaller size is
+an error. @option{Wint-to-pointer-cast} is enabled by default.
+
+
+@item -Wno-pointer-to-int-cast @r{(C and Objective-C only)}
+@opindex Wno-pointer-to-int-cast
+@opindex Wpointer-to-int-cast
+Suppress warnings from casts from a pointer to an integer type of a
+different size.
+
+@item -Winvalid-pch
+@opindex Winvalid-pch
+@opindex Wno-invalid-pch
+Warn if a precompiled header (@pxref{Precompiled Headers}) is found in
+the search path but can't be used.
+
+@item -Wlong-long
+@opindex Wlong-long
+@opindex Wno-long-long
+Warn if @samp{long long} type is used.  This is enabled by either
+@option{-pedantic} or @option{-Wtraditional} in ISO C90 and C++98
+modes.  To inhibit the warning messages, use @option{-Wno-long-long}.
+
+@item -Wvariadic-macros
+@opindex Wvariadic-macros
+@opindex Wno-variadic-macros
+Warn if variadic macros are used in pedantic ISO C90 mode, or the GNU
+alternate syntax when in pedantic ISO C99 mode.  This is default.
+To inhibit the warning messages, use @option{-Wno-variadic-macros}.
+
+@item -Wvla
+@opindex Wvla
+@opindex Wno-vla
+Warn if variable length array is used in the code.
+@option{-Wno-vla} will prevent the @option{-pedantic} warning of
+the variable length array.
+
+@item -Wvolatile-register-var
+@opindex Wvolatile-register-var
+@opindex Wno-volatile-register-var
+Warn if a register variable is declared volatile.  The volatile
+modifier does not inhibit all optimizations that may eliminate reads
+and/or writes to register variables.  This warning is enabled by
+@option{-Wall}.
+
+@item -Wdisabled-optimization
+@opindex Wdisabled-optimization
+@opindex Wno-disabled-optimization
+Warn if a requested optimization pass is disabled.  This warning does
+not generally indicate that there is anything wrong with your code; it
+merely indicates that GCC's optimizers were unable to handle the code
+effectively.  Often, the problem is that your code is too big or too
+complex; GCC will refuse to optimize programs when the optimization
+itself is likely to take inordinate amounts of time.
+
+@item -Wpointer-sign @r{(C and Objective-C only)}
+@opindex Wpointer-sign
+@opindex Wno-pointer-sign
+Warn for pointer argument passing or assignment with different signedness.
+This option is only supported for C and Objective-C@.  It is implied by
+@option{-Wall} and by @option{-pedantic}, which can be disabled with
+@option{-Wno-pointer-sign}.
+
+@item -Wstack-protector
+@opindex Wstack-protector
+@opindex Wno-stack-protector
+This option is only active when @option{-fstack-protector} is active.  It
+warns about functions that will not be protected against stack smashing.
+
+@item -Wno-mudflap
+@opindex Wno-mudflap
+Suppress warnings about constructs that cannot be instrumented by
+@option{-fmudflap}.
+
+@item -Woverlength-strings
+@opindex Woverlength-strings
+@opindex Wno-overlength-strings
+Warn about string constants which are longer than the ``minimum
+maximum'' length specified in the C standard.  Modern compilers
+generally allow string constants which are much longer than the
+standard's minimum limit, but very portable programs should avoid
+using longer strings.
+
+The limit applies @emph{after} string constant concatenation, and does
+not count the trailing NUL@.  In C90, the limit was 509 characters; in
+C99, it was raised to 4095.  C++98 does not specify a normative
+minimum maximum, so we do not diagnose overlength strings in C++@.
+
+This option is implied by @option{-pedantic}, and can be disabled with
+@option{-Wno-overlength-strings}.
+
+@item -Wunsuffixed-float-constants @r{(C and Objective-C only)}
+@opindex Wunsuffixed-float-constants
+
+GCC will issue a warning for any floating constant that does not have
+a suffix.  When used together with @option{-Wsystem-headers} it will
+warn about such constants in system header files.  This can be useful
+when preparing code to use with the @code{FLOAT_CONST_DECIMAL64} pragma
+from the decimal floating-point extension to C99.
+@end table
+
+@node Debugging Options
+@section Options for Debugging Your Program or GCC
+@cindex options, debugging
+@cindex debugging information options
+
+GCC has various special options that are used for debugging
+either your program or GCC:
+
+@table @gcctabopt
+@item -g
+@opindex g
+Produce debugging information in the operating system's native format
+(stabs, COFF, XCOFF, or DWARF 2)@.  GDB can work with this debugging
+information.
+
+On most systems that use stabs format, @option{-g} enables use of extra
+debugging information that only GDB can use; this extra information
+makes debugging work better in GDB but will probably make other debuggers
+crash or
+refuse to read the program.  If you want to control for certain whether
+to generate the extra information, use @option{-gstabs+}, @option{-gstabs},
+@option{-gxcoff+}, @option{-gxcoff}, or @option{-gvms} (see below).
+
+GCC allows you to use @option{-g} with
+@option{-O}.  The shortcuts taken by optimized code may occasionally
+produce surprising results: some variables you declared may not exist
+at all; flow of control may briefly move where you did not expect it;
+some statements may not be executed because they compute constant
+results or their values were already at hand; some statements may
+execute in different places because they were moved out of loops.
+
+Nevertheless it proves possible to debug optimized output.  This makes
+it reasonable to use the optimizer for programs that might have bugs.
+
+The following options are useful when GCC is generated with the
+capability for more than one debugging format.
+
+@item -ggdb
+@opindex ggdb
+Produce debugging information for use by GDB@.  This means to use the
+most expressive format available (DWARF 2, stabs, or the native format
+if neither of those are supported), including GDB extensions if at all
+possible.
+
+@item -gstabs
+@opindex gstabs
+Produce debugging information in stabs format (if that is supported),
+without GDB extensions.  This is the format used by DBX on most BSD
+systems.  On MIPS, Alpha and System V Release 4 systems this option
+produces stabs debugging output which is not understood by DBX or SDB@.
+On System V Release 4 systems this option requires the GNU assembler.
+
+@item -feliminate-unused-debug-symbols
+@opindex feliminate-unused-debug-symbols
+Produce debugging information in stabs format (if that is supported),
+for only symbols that are actually used.
+
+@item -femit-class-debug-always
+Instead of emitting debugging information for a C++ class in only one
+object file, emit it in all object files using the class.  This option
+should be used only with debuggers that are unable to handle the way GCC
+normally emits debugging information for classes because using this
+option will increase the size of debugging information by as much as a
+factor of two.
+
+@item -gstabs+
+@opindex gstabs+
+Produce debugging information in stabs format (if that is supported),
+using GNU extensions understood only by the GNU debugger (GDB)@.  The
+use of these extensions is likely to make other debuggers crash or
+refuse to read the program.
+
+@item -gcoff
+@opindex gcoff
+Produce debugging information in COFF format (if that is supported).
+This is the format used by SDB on most System V systems prior to
+System V Release 4.
+
+@item -gxcoff
+@opindex gxcoff
+Produce debugging information in XCOFF format (if that is supported).
+This is the format used by the DBX debugger on IBM RS/6000 systems.
+
+@item -gxcoff+
+@opindex gxcoff+
+Produce debugging information in XCOFF format (if that is supported),
+using GNU extensions understood only by the GNU debugger (GDB)@.  The
+use of these extensions is likely to make other debuggers crash or
+refuse to read the program, and may cause assemblers other than the GNU
+assembler (GAS) to fail with an error.
+
+@item -gdwarf-@var{version}
+@opindex gdwarf-@var{version}
+Produce debugging information in DWARF format (if that is
+supported).  This is the format used by DBX on IRIX 6.  The value
+of @var{version} may be either 2, 3 or 4; the default version is 2.
+
+Note that with DWARF version 2 some ports require, and will always
+use, some non-conflicting DWARF 3 extensions in the unwind tables.
+
+Version 4 may require GDB 7.0 and @option{-fvar-tracking-assignments}
+for maximum benefit.
+
+@item -gstrict-dwarf
+@opindex gstrict-dwarf
+Disallow using extensions of later DWARF standard version than selected
+with @option{-gdwarf-@var{version}}.  On most targets using non-conflicting
+DWARF extensions from later standard versions is allowed.
+
+@item -gno-strict-dwarf
+@opindex gno-strict-dwarf
+Allow using extensions of later DWARF standard version than selected with
+@option{-gdwarf-@var{version}}.
+
+@item -gvms
+@opindex gvms
+Produce debugging information in VMS debug format (if that is
+supported).  This is the format used by DEBUG on VMS systems.
+
+@item -g@var{level}
+@itemx -ggdb@var{level}
+@itemx -gstabs@var{level}
+@itemx -gcoff@var{level}
+@itemx -gxcoff@var{level}
+@itemx -gvms@var{level}
+Request debugging information and also use @var{level} to specify how
+much information.  The default level is 2.
+
+Level 0 produces no debug information at all.  Thus, @option{-g0} negates
+@option{-g}.
+
+Level 1 produces minimal information, enough for making backtraces in
+parts of the program that you don't plan to debug.  This includes
+descriptions of functions and external variables, but no information
+about local variables and no line numbers.
+
+Level 3 includes extra information, such as all the macro definitions
+present in the program.  Some debuggers support macro expansion when
+you use @option{-g3}.
+
+@option{-gdwarf-2} does not accept a concatenated debug level, because
+GCC used to support an option @option{-gdwarf} that meant to generate
+debug information in version 1 of the DWARF format (which is very
+different from version 2), and it would have been too confusing.  That
+debug format is long obsolete, but the option cannot be changed now.
+Instead use an additional @option{-g@var{level}} option to change the
+debug level for DWARF.
+
+@item -gtoggle
+@opindex gtoggle
+Turn off generation of debug info, if leaving out this option would have
+generated it, or turn it on at level 2 otherwise.  The position of this
+argument in the command line does not matter, it takes effect after all
+other options are processed, and it does so only once, no matter how
+many times it is given.  This is mainly intended to be used with
+@option{-fcompare-debug}.
+
+@item -fdump-final-insns@r{[}=@var{file}@r{]}
+@opindex fdump-final-insns
+Dump the final internal representation (RTL) to @var{file}.  If the
+optional argument is omitted (or if @var{file} is @code{.}), the name
+of the dump file will be determined by appending @code{.gkd} to the
+compilation output file name.
+
+@item -fcompare-debug@r{[}=@var{opts}@r{]}
+@opindex fcompare-debug
+@opindex fno-compare-debug
+If no error occurs during compilation, run the compiler a second time,
+adding @var{opts} and @option{-fcompare-debug-second} to the arguments
+passed to the second compilation.  Dump the final internal
+representation in both compilations, and print an error if they differ.
+
+If the equal sign is omitted, the default @option{-gtoggle} is used.
+
+The environment variable @env{GCC_COMPARE_DEBUG}, if defined, non-empty
+and nonzero, implicitly enables @option{-fcompare-debug}.  If
+@env{GCC_COMPARE_DEBUG} is defined to a string starting with a dash,
+then it is used for @var{opts}, otherwise the default @option{-gtoggle}
+is used.
+
+@option{-fcompare-debug=}, with the equal sign but without @var{opts},
+is equivalent to @option{-fno-compare-debug}, which disables the dumping
+of the final representation and the second compilation, preventing even
+@env{GCC_COMPARE_DEBUG} from taking effect.
+
+To verify full coverage during @option{-fcompare-debug} testing, set
+@env{GCC_COMPARE_DEBUG} to say @samp{-fcompare-debug-not-overridden},
+which GCC will reject as an invalid option in any actual compilation
+(rather than preprocessing, assembly or linking).  To get just a
+warning, setting @env{GCC_COMPARE_DEBUG} to @samp{-w%n-fcompare-debug
+not overridden} will do.
+
+@item -fcompare-debug-second
+@opindex fcompare-debug-second
+This option is implicitly passed to the compiler for the second
+compilation requested by @option{-fcompare-debug}, along with options to
+silence warnings, and omitting other options that would cause
+side-effect compiler outputs to files or to the standard output.  Dump
+files and preserved temporary files are renamed so as to contain the
+@code{.gk} additional extension during the second compilation, to avoid
+overwriting those generated by the first.
+
+When this option is passed to the compiler driver, it causes the
+@emph{first} compilation to be skipped, which makes it useful for little
+other than debugging the compiler proper.
+
+@item -feliminate-dwarf2-dups
+@opindex feliminate-dwarf2-dups
+Compress DWARF2 debugging information by eliminating duplicated
+information about each symbol.  This option only makes sense when
+generating DWARF2 debugging information with @option{-gdwarf-2}.
+
+@item -femit-struct-debug-baseonly
+Emit debug information for struct-like types
+only when the base name of the compilation source file
+matches the base name of file in which the struct was defined.
+
+This option substantially reduces the size of debugging information,
+but at significant potential loss in type information to the debugger.
+See @option{-femit-struct-debug-reduced} for a less aggressive option.
+See @option{-femit-struct-debug-detailed} for more detailed control.
+
+This option works only with DWARF 2.
+
+@item -femit-struct-debug-reduced
+Emit debug information for struct-like types
+only when the base name of the compilation source file
+matches the base name of file in which the type was defined,
+unless the struct is a template or defined in a system header.
+
+This option significantly reduces the size of debugging information,
+with some potential loss in type information to the debugger.
+See @option{-femit-struct-debug-baseonly} for a more aggressive option.
+See @option{-femit-struct-debug-detailed} for more detailed control.
+
+This option works only with DWARF 2.
+
+@item -femit-struct-debug-detailed@r{[}=@var{spec-list}@r{]}
+Specify the struct-like types
+for which the compiler will generate debug information.
+The intent is to reduce duplicate struct debug information
+between different object files within the same program.
+
+This option is a detailed version of
+@option{-femit-struct-debug-reduced} and @option{-femit-struct-debug-baseonly},
+which will serve for most needs.
+
+A specification has the syntax@*
+[@samp{dir:}|@samp{ind:}][@samp{ord:}|@samp{gen:}](@samp{any}|@samp{sys}|@samp{base}|@samp{none})
+
+The optional first word limits the specification to
+structs that are used directly (@samp{dir:}) or used indirectly (@samp{ind:}).
+A struct type is used directly when it is the type of a variable, member.
+Indirect uses arise through pointers to structs.
+That is, when use of an incomplete struct would be legal, the use is indirect.
+An example is
+@samp{struct one direct; struct two * indirect;}.
+
+The optional second word limits the specification to
+ordinary structs (@samp{ord:}) or generic structs (@samp{gen:}).
+Generic structs are a bit complicated to explain.
+For C++, these are non-explicit specializations of template classes,
+or non-template classes within the above.
+Other programming languages have generics,
+but @samp{-femit-struct-debug-detailed} does not yet implement them.
+
+The third word specifies the source files for those
+structs for which the compiler will emit debug information.
+The values @samp{none} and @samp{any} have the normal meaning.
+The value @samp{base} means that
+the base of name of the file in which the type declaration appears
+must match the base of the name of the main compilation file.
+In practice, this means that
+types declared in @file{foo.c} and @file{foo.h} will have debug information,
+but types declared in other header will not.
+The value @samp{sys} means those types satisfying @samp{base}
+or declared in system or compiler headers.
+
+You may need to experiment to determine the best settings for your application.
+
+The default is @samp{-femit-struct-debug-detailed=all}.
+
+This option works only with DWARF 2.
+
+@item -fenable-icf-debug
+@opindex fenable-icf-debug
+Generate additional debug information to support identical code folding (ICF).
+This option only works with DWARF version 2 or higher.
+
+@item -fno-merge-debug-strings
+@opindex fmerge-debug-strings
+@opindex fno-merge-debug-strings
+Direct the linker to not merge together strings in the debugging
+information which are identical in different object files.  Merging is
+not supported by all assemblers or linkers.  Merging decreases the size
+of the debug information in the output file at the cost of increasing
+link processing time.  Merging is enabled by default.
+
+@item -fdebug-prefix-map=@var{old}=@var{new}
+@opindex fdebug-prefix-map
+When compiling files in directory @file{@var{old}}, record debugging
+information describing them as in @file{@var{new}} instead.
+
+@item -fno-dwarf2-cfi-asm
+@opindex fdwarf2-cfi-asm
+@opindex fno-dwarf2-cfi-asm
+Emit DWARF 2 unwind info as compiler generated @code{.eh_frame} section
+instead of using GAS @code{.cfi_*} directives.
+
+@cindex @command{prof}
+@item -p
+@opindex p
+Generate extra code to write profile information suitable for the
+analysis program @command{prof}.  You must use this option when compiling
+the source files you want data about, and you must also use it when
+linking.
+
+@cindex @command{gprof}
+@item -pg
+@opindex pg
+Generate extra code to write profile information suitable for the
+analysis program @command{gprof}.  You must use this option when compiling
+the source files you want data about, and you must also use it when
+linking.
+
+@item -Q
+@opindex Q
+Makes the compiler print out each function name as it is compiled, and
+print some statistics about each pass when it finishes.
+
+@item -ftime-report
+@opindex ftime-report
+Makes the compiler print some statistics about the time consumed by each
+pass when it finishes.
+
+@item -fmem-report
+@opindex fmem-report
+Makes the compiler print some statistics about permanent memory
+allocation when it finishes.
+
+@item -fpre-ipa-mem-report
+@opindex fpre-ipa-mem-report
+@item -fpost-ipa-mem-report
+@opindex fpost-ipa-mem-report
+Makes the compiler print some statistics about permanent memory
+allocation before or after interprocedural optimization.
+
+@item -fstack-usage
+@opindex fstack-usage
+Makes the compiler output stack usage information for the program, on a
+per-function basis.  The filename for the dump is made by appending
+@file{.su} to the @var{auxname}.  @var{auxname} is generated from the name of
+the output file, if explicitly specified and it is not an executable,
+otherwise it is the basename of the source file.  An entry is made up
+of three fields:
+
+@itemize
+@item
+The name of the function.
+@item
+A number of bytes.
+@item
+One or more qualifiers: @code{static}, @code{dynamic}, @code{bounded}.
+@end itemize
+
+The qualifier @code{static} means that the function manipulates the stack
+statically: a fixed number of bytes are allocated for the frame on function
+entry and released on function exit; no stack adjustments are otherwise made
+in the function.  The second field is this fixed number of bytes.
+
+The qualifier @code{dynamic} means that the function manipulates the stack
+dynamically: in addition to the static allocation described above, stack
+adjustments are made in the body of the function, for example to push/pop
+arguments around function calls.  If the qualifier @code{bounded} is also
+present, the amount of these adjustments is bounded at compile-time and
+the second field is an upper bound of the total amount of stack used by
+the function.  If it is not present, the amount of these adjustments is
+not bounded at compile-time and the second field only represents the
+bounded part.
+
+@item -fprofile-arcs
+@opindex fprofile-arcs
+Add code so that program flow @dfn{arcs} are instrumented.  During
+execution the program records how many times each branch and call is
+executed and how many times it is taken or returns.  When the compiled
+program exits it saves this data to a file called
+@file{@var{auxname}.gcda} for each source file.  The data may be used for
+profile-directed optimizations (@option{-fbranch-probabilities}), or for
+test coverage analysis (@option{-ftest-coverage}).  Each object file's
+@var{auxname} is generated from the name of the output file, if
+explicitly specified and it is not the final executable, otherwise it is
+the basename of the source file.  In both cases any suffix is removed
+(e.g.@: @file{foo.gcda} for input file @file{dir/foo.c}, or
+@file{dir/foo.gcda} for output file specified as @option{-o dir/foo.o}).
+@xref{Cross-profiling}.
+
+@cindex @command{gcov}
+@item --coverage
+@opindex coverage
+
+This option is used to compile and link code instrumented for coverage
+analysis.  The option is a synonym for @option{-fprofile-arcs}
+@option{-ftest-coverage} (when compiling) and @option{-lgcov} (when
+linking).  See the documentation for those options for more details.
+
+@itemize
+
+@item
+Compile the source files with @option{-fprofile-arcs} plus optimization
+and code generation options.  For test coverage analysis, use the
+additional @option{-ftest-coverage} option.  You do not need to profile
+every source file in a program.
+
+@item
+Link your object files with @option{-lgcov} or @option{-fprofile-arcs}
+(the latter implies the former).
+
+@item
+Run the program on a representative workload to generate the arc profile
+information.  This may be repeated any number of times.  You can run
+concurrent instances of your program, and provided that the file system
+supports locking, the data files will be correctly updated.  Also
+@code{fork} calls are detected and correctly handled (double counting
+will not happen).
+
+@item
+For profile-directed optimizations, compile the source files again with
+the same optimization and code generation options plus
+@option{-fbranch-probabilities} (@pxref{Optimize Options,,Options that
+Control Optimization}).
+
+@item
+For test coverage analysis, use @command{gcov} to produce human readable
+information from the @file{.gcno} and @file{.gcda} files.  Refer to the
+@command{gcov} documentation for further information.
+
+@end itemize
+
+With @option{-fprofile-arcs}, for each function of your program GCC
+creates a program flow graph, then finds a spanning tree for the graph.
+Only arcs that are not on the spanning tree have to be instrumented: the
+compiler adds code to count the number of times that these arcs are
+executed.  When an arc is the only exit or only entrance to a block, the
+instrumentation code can be added to the block; otherwise, a new basic
+block must be created to hold the instrumentation code.
+
+@need 2000
+@item -ftest-coverage
+@opindex ftest-coverage
+Produce a notes file that the @command{gcov} code-coverage utility
+(@pxref{Gcov,, @command{gcov}---a Test Coverage Program}) can use to
+show program coverage.  Each source file's note file is called
+@file{@var{auxname}.gcno}.  Refer to the @option{-fprofile-arcs} option
+above for a description of @var{auxname} and instructions on how to
+generate test coverage data.  Coverage data will match the source files
+more closely, if you do not optimize.
+
+@item -fdbg-cnt-list
+@opindex fdbg-cnt-list
+Print the name and the counter upper bound for all debug counters.
+
+@item -fdbg-cnt=@var{counter-value-list}
+@opindex fdbg-cnt
+Set the internal debug counter upper bound.  @var{counter-value-list}
+is a comma-separated list of @var{name}:@var{value} pairs
+which sets the upper bound of each debug counter @var{name} to @var{value}.
+All debug counters have the initial upper bound of @var{UINT_MAX},
+thus dbg_cnt() returns true always unless the upper bound is set by this option.
+e.g. With -fdbg-cnt=dce:10,tail_call:0
+dbg_cnt(dce) will return true only for first 10 invocations
+and dbg_cnt(tail_call) will return false always.
+
+@item -d@var{letters}
+@itemx -fdump-rtl-@var{pass}
+@opindex d
+Says to make debugging dumps during compilation at times specified by
+@var{letters}.  This is used for debugging the RTL-based passes of the
+compiler.  The file names for most of the dumps are made by appending
+a pass number and a word to the @var{dumpname}, and the files are
+created in the directory of the output file.  Note that the pass
+number is computed statically as passes get registered into the pass
+manager.  Thus the numbering is not related to the dynamic order of
+execution of passes.  In particular, a pass installed by a plugin
+could have a number over 200 even if it executed quite early.
+@var{dumpname} is generated from the name of the output file, if
+explicitly specified and it is not an executable, otherwise it is the
+basename of the source file. These switches may have different effects
+when @option{-E} is used for preprocessing.
+
+Debug dumps can be enabled with a @option{-fdump-rtl} switch or some
+@option{-d} option @var{letters}.  Here are the possible
+letters for use in @var{pass} and @var{letters}, and their meanings:
+
+@table @gcctabopt
+
+@item -fdump-rtl-alignments
+@opindex fdump-rtl-alignments
+Dump after branch alignments have been computed.
+
+@item -fdump-rtl-asmcons
+@opindex fdump-rtl-asmcons
+Dump after fixing rtl statements that have unsatisfied in/out constraints.
+
+@item -fdump-rtl-auto_inc_dec
+@opindex fdump-rtl-auto_inc_dec
+Dump after auto-inc-dec discovery.  This pass is only run on
+architectures that have auto inc or auto dec instructions.
+
+@item -fdump-rtl-barriers
+@opindex fdump-rtl-barriers
+Dump after cleaning up the barrier instructions.
+
+@item -fdump-rtl-bbpart
+@opindex fdump-rtl-bbpart
+Dump after partitioning hot and cold basic blocks.
+
+@item -fdump-rtl-bbro
+@opindex fdump-rtl-bbro
+Dump after block reordering.
+
+@item -fdump-rtl-btl1
+@itemx -fdump-rtl-btl2
+@opindex fdump-rtl-btl2
+@opindex fdump-rtl-btl2
+@option{-fdump-rtl-btl1} and @option{-fdump-rtl-btl2} enable dumping
+after the two branch
+target load optimization passes.
+
+@item -fdump-rtl-bypass
+@opindex fdump-rtl-bypass
+Dump after jump bypassing and control flow optimizations.
+
+@item -fdump-rtl-combine
+@opindex fdump-rtl-combine
+Dump after the RTL instruction combination pass.
+
+@item -fdump-rtl-compgotos
+@opindex fdump-rtl-compgotos
+Dump after duplicating the computed gotos.
+
+@item -fdump-rtl-ce1
+@itemx -fdump-rtl-ce2
+@itemx -fdump-rtl-ce3
+@opindex fdump-rtl-ce1
+@opindex fdump-rtl-ce2
+@opindex fdump-rtl-ce3
+@option{-fdump-rtl-ce1}, @option{-fdump-rtl-ce2}, and
+@option{-fdump-rtl-ce3} enable dumping after the three
+if conversion passes.
+
+@item -fdump-rtl-cprop_hardreg
+@opindex fdump-rtl-cprop_hardreg
+Dump after hard register copy propagation.
+
+@item -fdump-rtl-csa
+@opindex fdump-rtl-csa
+Dump after combining stack adjustments.
+
+@item -fdump-rtl-cse1
+@itemx -fdump-rtl-cse2
+@opindex fdump-rtl-cse1
+@opindex fdump-rtl-cse2
+@option{-fdump-rtl-cse1} and @option{-fdump-rtl-cse2} enable dumping after
+the two common sub-expression elimination passes.
+
+@item -fdump-rtl-dce
+@opindex fdump-rtl-dce
+Dump after the standalone dead code elimination passes.
+
+@item -fdump-rtl-dbr
+@opindex fdump-rtl-dbr
+Dump after delayed branch scheduling.
+
+@item -fdump-rtl-dce1
+@itemx -fdump-rtl-dce2
+@opindex fdump-rtl-dce1
+@opindex fdump-rtl-dce2
+@option{-fdump-rtl-dce1} and @option{-fdump-rtl-dce2} enable dumping after
+the two dead store elimination passes.
+
+@item -fdump-rtl-eh
+@opindex fdump-rtl-eh
+Dump after finalization of EH handling code.
+
+@item -fdump-rtl-eh_ranges
+@opindex fdump-rtl-eh_ranges
+Dump after conversion of EH handling range regions.
+
+@item -fdump-rtl-expand
+@opindex fdump-rtl-expand
+Dump after RTL generation.
+
+@item -fdump-rtl-fwprop1
+@itemx -fdump-rtl-fwprop2
+@opindex fdump-rtl-fwprop1
+@opindex fdump-rtl-fwprop2
+@option{-fdump-rtl-fwprop1} and @option{-fdump-rtl-fwprop2} enable
+dumping after the two forward propagation passes.
+
+@item -fdump-rtl-gcse1
+@itemx -fdump-rtl-gcse2
+@opindex fdump-rtl-gcse1
+@opindex fdump-rtl-gcse2
+@option{-fdump-rtl-gcse1} and @option{-fdump-rtl-gcse2} enable dumping
+after global common subexpression elimination.
+
+@item -fdump-rtl-init-regs
+@opindex fdump-rtl-init-regs
+Dump after the initialization of the registers.
+
+@item -fdump-rtl-initvals
+@opindex fdump-rtl-initvals
+Dump after the computation of the initial value sets.
+
+@item -fdump-rtl-into_cfglayout
+@opindex fdump-rtl-into_cfglayout
+Dump after converting to cfglayout mode.
+
+@item -fdump-rtl-ira
+@opindex fdump-rtl-ira
+Dump after iterated register allocation.
+
+@item -fdump-rtl-jump
+@opindex fdump-rtl-jump
+Dump after the second jump optimization.
+
+@item -fdump-rtl-loop2
+@opindex fdump-rtl-loop2
+@option{-fdump-rtl-loop2} enables dumping after the rtl
+loop optimization passes.
+
+@item -fdump-rtl-mach
+@opindex fdump-rtl-mach
+Dump after performing the machine dependent reorganization pass, if that
+pass exists.
+
+@item -fdump-rtl-mode_sw
+@opindex fdump-rtl-mode_sw
+Dump after removing redundant mode switches.
+
+@item -fdump-rtl-rnreg
+@opindex fdump-rtl-rnreg
+Dump after register renumbering.
+
+@item -fdump-rtl-outof_cfglayout
+@opindex fdump-rtl-outof_cfglayout
+Dump after converting from cfglayout mode.
+
+@item -fdump-rtl-peephole2
+@opindex fdump-rtl-peephole2
+Dump after the peephole pass.
+
+@item -fdump-rtl-postreload
+@opindex fdump-rtl-postreload
+Dump after post-reload optimizations.
+
+@item -fdump-rtl-pro_and_epilogue
+@opindex fdump-rtl-pro_and_epilogue
+Dump after generating the function pro and epilogues.
+
+@item -fdump-rtl-regmove
+@opindex fdump-rtl-regmove
+Dump after the register move pass.
+
+@item -fdump-rtl-sched1
+@itemx -fdump-rtl-sched2
+@opindex fdump-rtl-sched1
+@opindex fdump-rtl-sched2
+@option{-fdump-rtl-sched1} and @option{-fdump-rtl-sched2} enable dumping
+after the basic block scheduling passes.
+
+@item -fdump-rtl-see
+@opindex fdump-rtl-see
+Dump after sign extension elimination.
+
+@item -fdump-rtl-seqabstr
+@opindex fdump-rtl-seqabstr
+Dump after common sequence discovery.
+
+@item -fdump-rtl-shorten
+@opindex fdump-rtl-shorten
+Dump after shortening branches.
+
+@item -fdump-rtl-sibling
+@opindex fdump-rtl-sibling
+Dump after sibling call optimizations.
+
+@item -fdump-rtl-split1
+@itemx -fdump-rtl-split2
+@itemx -fdump-rtl-split3
+@itemx -fdump-rtl-split4
+@itemx -fdump-rtl-split5
+@opindex fdump-rtl-split1
+@opindex fdump-rtl-split2
+@opindex fdump-rtl-split3
+@opindex fdump-rtl-split4
+@opindex fdump-rtl-split5
+@option{-fdump-rtl-split1}, @option{-fdump-rtl-split2},
+@option{-fdump-rtl-split3}, @option{-fdump-rtl-split4} and
+@option{-fdump-rtl-split5} enable dumping after five rounds of
+instruction splitting.
+
+@item -fdump-rtl-sms
+@opindex fdump-rtl-sms
+Dump after modulo scheduling.  This pass is only run on some
+architectures.
+
+@item -fdump-rtl-stack
+@opindex fdump-rtl-stack
+Dump after conversion from GCC's "flat register file" registers to the
+x87's stack-like registers.  This pass is only run on x86 variants.
+
+@item -fdump-rtl-subreg1
+@itemx -fdump-rtl-subreg2
+@opindex fdump-rtl-subreg1
+@opindex fdump-rtl-subreg2
+@option{-fdump-rtl-subreg1} and @option{-fdump-rtl-subreg2} enable dumping after
+the two subreg expansion passes.
+
+@item -fdump-rtl-unshare
+@opindex fdump-rtl-unshare
+Dump after all rtl has been unshared.
+
+@item -fdump-rtl-vartrack
+@opindex fdump-rtl-vartrack
+Dump after variable tracking.
+
+@item -fdump-rtl-vregs
+@opindex fdump-rtl-vregs
+Dump after converting virtual registers to hard registers.
+
+@item -fdump-rtl-web
+@opindex fdump-rtl-web
+Dump after live range splitting.
+
+@item -fdump-rtl-regclass
+@itemx -fdump-rtl-subregs_of_mode_init
+@itemx -fdump-rtl-subregs_of_mode_finish
+@itemx -fdump-rtl-dfinit
+@itemx -fdump-rtl-dfinish
+@opindex fdump-rtl-regclass
+@opindex fdump-rtl-subregs_of_mode_init
+@opindex fdump-rtl-subregs_of_mode_finish
+@opindex fdump-rtl-dfinit
+@opindex fdump-rtl-dfinish
+These dumps are defined but always produce empty files.
+
+@item -da
+@itemx -fdump-rtl-all
+@opindex da
+@opindex fdump-rtl-all
+Produce all the dumps listed above.
+
+@item -dA
+@opindex dA
+Annotate the assembler output with miscellaneous debugging information.
+
+@item -dD
+@opindex dD
+Dump all macro definitions, at the end of preprocessing, in addition to
+normal output.
+
+@item -dH
+@opindex dH
+Produce a core dump whenever an error occurs.
+
+@item -dp
+@opindex dp
+Annotate the assembler output with a comment indicating which
+pattern and alternative was used.  The length of each instruction is
+also printed.
+
+@item -dP
+@opindex dP
+Dump the RTL in the assembler output as a comment before each instruction.
+Also turns on @option{-dp} annotation.
+
+@item -dv
+@opindex dv
+For each of the other indicated dump files (@option{-fdump-rtl-@var{pass}}),
+dump a representation of the control flow graph suitable for viewing with VCG
+to @file{@var{file}.@var{pass}.vcg}.
+
+@item -dx
+@opindex dx
+Just generate RTL for a function instead of compiling it.  Usually used
+with @option{-fdump-rtl-expand}.
+@end table
+
+@item -fdump-noaddr
+@opindex fdump-noaddr
+When doing debugging dumps, suppress address output.  This makes it more
+feasible to use diff on debugging dumps for compiler invocations with
+different compiler binaries and/or different
+text / bss / data / heap / stack / dso start locations.
+
+@item -fdump-unnumbered
+@opindex fdump-unnumbered
+When doing debugging dumps, suppress instruction numbers and address output.
+This makes it more feasible to use diff on debugging dumps for compiler
+invocations with different options, in particular with and without
+@option{-g}.
+
+@item -fdump-unnumbered-links
+@opindex fdump-unnumbered-links
+When doing debugging dumps (see @option{-d} option above), suppress
+instruction numbers for the links to the previous and next instructions
+in a sequence.
+
+@item -fdump-translation-unit @r{(C++ only)}
+@itemx -fdump-translation-unit-@var{options} @r{(C++ only)}
+@opindex fdump-translation-unit
+Dump a representation of the tree structure for the entire translation
+unit to a file.  The file name is made by appending @file{.tu} to the
+source file name, and the file is created in the same directory as the
+output file.  If the @samp{-@var{options}} form is used, @var{options}
+controls the details of the dump as described for the
+@option{-fdump-tree} options.
+
+@item -fdump-class-hierarchy @r{(C++ only)}
+@itemx -fdump-class-hierarchy-@var{options} @r{(C++ only)}
+@opindex fdump-class-hierarchy
+Dump a representation of each class's hierarchy and virtual function
+table layout to a file.  The file name is made by appending
+@file{.class} to the source file name, and the file is created in the
+same directory as the output file.  If the @samp{-@var{options}} form
+is used, @var{options} controls the details of the dump as described
+for the @option{-fdump-tree} options.
+
+@item -fdump-ipa-@var{switch}
+@opindex fdump-ipa
+Control the dumping at various stages of inter-procedural analysis
+language tree to a file.  The file name is generated by appending a
+switch specific suffix to the source file name, and the file is created
+in the same directory as the output file.  The following dumps are
+possible:
+
+@table @samp
+@item all
+Enables all inter-procedural analysis dumps.
+
+@item cgraph
+Dumps information about call-graph optimization, unused function removal,
+and inlining decisions.
+
+@item inline
+Dump after function inlining.
+
+@end table
+
+@item -fdump-statistics-@var{option}
+@opindex fdump-statistics
+Enable and control dumping of pass statistics in a separate file.  The
+file name is generated by appending a suffix ending in
+@samp{.statistics} to the source file name, and the file is created in
+the same directory as the output file.  If the @samp{-@var{option}}
+form is used, @samp{-stats} will cause counters to be summed over the
+whole compilation unit while @samp{-details} will dump every event as
+the passes generate them.  The default with no option is to sum
+counters for each function compiled.
+
+@item -fdump-tree-@var{switch}
+@itemx -fdump-tree-@var{switch}-@var{options}
+@opindex fdump-tree
+Control the dumping at various stages of processing the intermediate
+language tree to a file.  The file name is generated by appending a
+switch specific suffix to the source file name, and the file is
+created in the same directory as the output file.  If the
+@samp{-@var{options}} form is used, @var{options} is a list of
+@samp{-} separated options that control the details of the dump.  Not
+all options are applicable to all dumps, those which are not
+meaningful will be ignored.  The following options are available
+
+@table @samp
+@item address
+Print the address of each node.  Usually this is not meaningful as it
+changes according to the environment and source file.  Its primary use
+is for tying up a dump file with a debug environment.
+@item asmname
+If @code{DECL_ASSEMBLER_NAME} has been set for a given decl, use that
+in the dump instead of @code{DECL_NAME}.  Its primary use is ease of
+use working backward from mangled names in the assembly file.
+@item slim
+Inhibit dumping of members of a scope or body of a function merely
+because that scope has been reached.  Only dump such items when they
+are directly reachable by some other path.  When dumping pretty-printed
+trees, this option inhibits dumping the bodies of control structures.
+@item raw
+Print a raw representation of the tree.  By default, trees are
+pretty-printed into a C-like representation.
+@item details
+Enable more detailed dumps (not honored by every dump option).
+@item stats
+Enable dumping various statistics about the pass (not honored by every dump
+option).
+@item blocks
+Enable showing basic block boundaries (disabled in raw dumps).
+@item vops
+Enable showing virtual operands for every statement.
+@item lineno
+Enable showing line numbers for statements.
+@item uid
+Enable showing the unique ID (@code{DECL_UID}) for each variable.
+@item verbose
+Enable showing the tree dump for each statement.
+@item eh
+Enable showing the EH region number holding each statement.
+@item all
+Turn on all options, except @option{raw}, @option{slim}, @option{verbose}
+and @option{lineno}.
+@end table
+
+The following tree dumps are possible:
+@table @samp
+
+@item original
+@opindex fdump-tree-original
+Dump before any tree based optimization, to @file{@var{file}.original}.
+
+@item optimized
+@opindex fdump-tree-optimized
+Dump after all tree based optimization, to @file{@var{file}.optimized}.
+
+@item gimple
+@opindex fdump-tree-gimple
+Dump each function before and after the gimplification pass to a file.  The
+file name is made by appending @file{.gimple} to the source file name.
+
+@item cfg
+@opindex fdump-tree-cfg
+Dump the control flow graph of each function to a file.  The file name is
+made by appending @file{.cfg} to the source file name.
+
+@item vcg
+@opindex fdump-tree-vcg
+Dump the control flow graph of each function to a file in VCG format.  The
+file name is made by appending @file{.vcg} to the source file name.  Note
+that if the file contains more than one function, the generated file cannot
+be used directly by VCG@.  You will need to cut and paste each function's
+graph into its own separate file first.
+
+@item ch
+@opindex fdump-tree-ch
+Dump each function after copying loop headers.  The file name is made by
+appending @file{.ch} to the source file name.
+
+@item ssa
+@opindex fdump-tree-ssa
+Dump SSA related information to a file.  The file name is made by appending
+@file{.ssa} to the source file name.
+
+@item alias
+@opindex fdump-tree-alias
+Dump aliasing information for each function.  The file name is made by
+appending @file{.alias} to the source file name.
+
+@item ccp
+@opindex fdump-tree-ccp
+Dump each function after CCP@.  The file name is made by appending
+@file{.ccp} to the source file name.
+
+@item storeccp
+@opindex fdump-tree-storeccp
+Dump each function after STORE-CCP@.  The file name is made by appending
+@file{.storeccp} to the source file name.
+
+@item pre
+@opindex fdump-tree-pre
+Dump trees after partial redundancy elimination.  The file name is made
+by appending @file{.pre} to the source file name.
+
+@item fre
+@opindex fdump-tree-fre
+Dump trees after full redundancy elimination.  The file name is made
+by appending @file{.fre} to the source file name.
+
+@item copyprop
+@opindex fdump-tree-copyprop
+Dump trees after copy propagation.  The file name is made
+by appending @file{.copyprop} to the source file name.
+
+@item store_copyprop
+@opindex fdump-tree-store_copyprop
+Dump trees after store copy-propagation.  The file name is made
+by appending @file{.store_copyprop} to the source file name.
+
+@item dce
+@opindex fdump-tree-dce
+Dump each function after dead code elimination.  The file name is made by
+appending @file{.dce} to the source file name.
+
+@item mudflap
+@opindex fdump-tree-mudflap
+Dump each function after adding mudflap instrumentation.  The file name is
+made by appending @file{.mudflap} to the source file name.
+
+@item sra
+@opindex fdump-tree-sra
+Dump each function after performing scalar replacement of aggregates.  The
+file name is made by appending @file{.sra} to the source file name.
+
+@item sink
+@opindex fdump-tree-sink
+Dump each function after performing code sinking.  The file name is made
+by appending @file{.sink} to the source file name.
+
+@item dom
+@opindex fdump-tree-dom
+Dump each function after applying dominator tree optimizations.  The file
+name is made by appending @file{.dom} to the source file name.
+
+@item dse
+@opindex fdump-tree-dse
+Dump each function after applying dead store elimination.  The file
+name is made by appending @file{.dse} to the source file name.
+
+@item phiopt
+@opindex fdump-tree-phiopt
+Dump each function after optimizing PHI nodes into straightline code.  The file
+name is made by appending @file{.phiopt} to the source file name.
+
+@item forwprop
+@opindex fdump-tree-forwprop
+Dump each function after forward propagating single use variables.  The file
+name is made by appending @file{.forwprop} to the source file name.
+
+@item copyrename
+@opindex fdump-tree-copyrename
+Dump each function after applying the copy rename optimization.  The file
+name is made by appending @file{.copyrename} to the source file name.
+
+@item nrv
+@opindex fdump-tree-nrv
+Dump each function after applying the named return value optimization on
+generic trees.  The file name is made by appending @file{.nrv} to the source
+file name.
+
+@item vect
+@opindex fdump-tree-vect
+Dump each function after applying vectorization of loops.  The file name is
+made by appending @file{.vect} to the source file name.
+
+@item slp
+@opindex fdump-tree-slp
+Dump each function after applying vectorization of basic blocks.  The file name
+is made by appending @file{.slp} to the source file name.
+
+@item vrp
+@opindex fdump-tree-vrp
+Dump each function after Value Range Propagation (VRP).  The file name
+is made by appending @file{.vrp} to the source file name.
+
+@item all
+@opindex fdump-tree-all
+Enable all the available tree dumps with the flags provided in this option.
+@end table
+
+@item -ftree-vectorizer-verbose=@var{n}
+@opindex ftree-vectorizer-verbose
+This option controls the amount of debugging output the vectorizer prints.
+This information is written to standard error, unless
+@option{-fdump-tree-all} or @option{-fdump-tree-vect} is specified,
+in which case it is output to the usual dump listing file, @file{.vect}.
+For @var{n}=0 no diagnostic information is reported.
+If @var{n}=1 the vectorizer reports each loop that got vectorized,
+and the total number of loops that got vectorized.
+If @var{n}=2 the vectorizer also reports non-vectorized loops that passed
+the first analysis phase (vect_analyze_loop_form) - i.e.@: countable,
+inner-most, single-bb, single-entry/exit loops.  This is the same verbosity
+level that @option{-fdump-tree-vect-stats} uses.
+Higher verbosity levels mean either more information dumped for each
+reported loop, or same amount of information reported for more loops:
+if @var{n}=3, vectorizer cost model information is reported.
+If @var{n}=4, alignment related information is added to the reports.
+If @var{n}=5, data-references related information (e.g.@: memory dependences,
+memory access-patterns) is added to the reports.
+If @var{n}=6, the vectorizer reports also non-vectorized inner-most loops
+that did not pass the first analysis phase (i.e., may not be countable, or
+may have complicated control-flow).
+If @var{n}=7, the vectorizer reports also non-vectorized nested loops.
+If @var{n}=8, SLP related information is added to the reports.
+For @var{n}=9, all the information the vectorizer generates during its
+analysis and transformation is reported.  This is the same verbosity level
+that @option{-fdump-tree-vect-details} uses.
+
+@item -frandom-seed=@var{string}
+@opindex frandom-seed
+This option provides a seed that GCC uses when it would otherwise use
+random numbers.  It is used to generate certain symbol names
+that have to be different in every compiled file.  It is also used to
+place unique stamps in coverage data files and the object files that
+produce them.  You can use the @option{-frandom-seed} option to produce
+reproducibly identical object files.
+
+The @var{string} should be different for every file you compile.
+
+@item -fsched-verbose=@var{n}
+@opindex fsched-verbose
+On targets that use instruction scheduling, this option controls the
+amount of debugging output the scheduler prints.  This information is
+written to standard error, unless @option{-fdump-rtl-sched1} or
+@option{-fdump-rtl-sched2} is specified, in which case it is output
+to the usual dump listing file, @file{.sched1} or @file{.sched2}
+respectively.  However for @var{n} greater than nine, the output is
+always printed to standard error.
+
+For @var{n} greater than zero, @option{-fsched-verbose} outputs the
+same information as @option{-fdump-rtl-sched1} and @option{-fdump-rtl-sched2}.
+For @var{n} greater than one, it also output basic block probabilities,
+detailed ready list information and unit/insn info.  For @var{n} greater
+than two, it includes RTL at abort point, control-flow and regions info.
+And for @var{n} over four, @option{-fsched-verbose} also includes
+dependence info.
+
+@item -save-temps
+@itemx -save-temps=cwd
+@opindex save-temps
+Store the usual ``temporary'' intermediate files permanently; place them
+in the current directory and name them based on the source file.  Thus,
+compiling @file{foo.c} with @samp{-c -save-temps} would produce files
+@file{foo.i} and @file{foo.s}, as well as @file{foo.o}.  This creates a
+preprocessed @file{foo.i} output file even though the compiler now
+normally uses an integrated preprocessor.
+
+When used in combination with the @option{-x} command line option,
+@option{-save-temps} is sensible enough to avoid over writing an
+input source file with the same extension as an intermediate file.
+The corresponding intermediate file may be obtained by renaming the
+source file before using @option{-save-temps}.
+
+If you invoke GCC in parallel, compiling several different source
+files that share a common base name in different subdirectories or the
+same source file compiled for multiple output destinations, it is
+likely that the different parallel compilers will interfere with each
+other, and overwrite the temporary files.  For instance:
+
+@smallexample
+gcc -save-temps -o outdir1/foo.o indir1/foo.c&
+gcc -save-temps -o outdir2/foo.o indir2/foo.c&
+@end smallexample
+
+may result in @file{foo.i} and @file{foo.o} being written to
+simultaneously by both compilers.
+
+@item -save-temps=obj
+@opindex save-temps=obj
+Store the usual ``temporary'' intermediate files permanently.  If the
+@option{-o} option is used, the temporary files are based on the
+object file.  If the @option{-o} option is not used, the
+@option{-save-temps=obj} switch behaves like @option{-save-temps}.
+
+For example:
+
+@smallexample
+gcc -save-temps=obj -c foo.c
+gcc -save-temps=obj -c bar.c -o dir/xbar.o
+gcc -save-temps=obj foobar.c -o dir2/yfoobar
+@end smallexample
+
+would create @file{foo.i}, @file{foo.s}, @file{dir/xbar.i},
+@file{dir/xbar.s}, @file{dir2/yfoobar.i}, @file{dir2/yfoobar.s}, and
+@file{dir2/yfoobar.o}.
+
+@item -time@r{[}=@var{file}@r{]}
+@opindex time
+Report the CPU time taken by each subprocess in the compilation
+sequence.  For C source files, this is the compiler proper and assembler
+(plus the linker if linking is done).
+
+Without the specification of an output file, the output looks like this:
+
+@smallexample
+# cc1 0.12 0.01
+# as 0.00 0.01
+@end smallexample
+
+The first number on each line is the ``user time'', that is time spent
+executing the program itself.  The second number is ``system time'',
+time spent executing operating system routines on behalf of the program.
+Both numbers are in seconds.
+
+With the specification of an output file, the output is appended to the
+named file, and it looks like this:
+
+@smallexample
+0.12 0.01 cc1 @var{options}
+0.00 0.01 as @var{options}
+@end smallexample
+
+The ``user time'' and the ``system time'' are moved before the program
+name, and the options passed to the program are displayed, so that one
+can later tell what file was being compiled, and with which options.
+
+@item -fvar-tracking
+@opindex fvar-tracking
+Run variable tracking pass.  It computes where variables are stored at each
+position in code.  Better debugging information is then generated
+(if the debugging information format supports this information).
+
+It is enabled by default when compiling with optimization (@option{-Os},
+@option{-O}, @option{-O2}, @dots{}), debugging information (@option{-g}) and
+the debug info format supports it.
+
+@item -fvar-tracking-assignments
+@opindex fvar-tracking-assignments
+@opindex fno-var-tracking-assignments
+Annotate assignments to user variables early in the compilation and
+attempt to carry the annotations over throughout the compilation all the
+way to the end, in an attempt to improve debug information while
+optimizing.  Use of @option{-gdwarf-4} is recommended along with it.
+
+It can be enabled even if var-tracking is disabled, in which case
+annotations will be created and maintained, but discarded at the end.
+
+@item -fvar-tracking-assignments-toggle
+@opindex fvar-tracking-assignments-toggle
+@opindex fno-var-tracking-assignments-toggle
+Toggle @option{-fvar-tracking-assignments}, in the same way that
+@option{-gtoggle} toggles @option{-g}.
+
+@item -print-file-name=@var{library}
+@opindex print-file-name
+Print the full absolute name of the library file @var{library} that
+would be used when linking---and don't do anything else.  With this
+option, GCC does not compile or link anything; it just prints the
+file name.
+
+@item -print-multi-directory
+@opindex print-multi-directory
+Print the directory name corresponding to the multilib selected by any
+other switches present in the command line.  This directory is supposed
+to exist in @env{GCC_EXEC_PREFIX}.
+
+@item -print-multi-lib
+@opindex print-multi-lib
+Print the mapping from multilib directory names to compiler switches
+that enable them.  The directory name is separated from the switches by
+@samp{;}, and each switch starts with an @samp{@@} instead of the
+@samp{-}, without spaces between multiple switches.  This is supposed to
+ease shell-processing.
+
+@item -print-multi-os-directory
+@opindex print-multi-os-directory
+Print the path to OS libraries for the selected
+multilib, relative to some @file{lib} subdirectory.  If OS libraries are
+present in the @file{lib} subdirectory and no multilibs are used, this is
+usually just @file{.}, if OS libraries are present in @file{lib@var{suffix}}
+sibling directories this prints e.g.@: @file{../lib64}, @file{../lib} or
+@file{../lib32}, or if OS libraries are present in @file{lib/@var{subdir}}
+subdirectories it prints e.g.@: @file{amd64}, @file{sparcv9} or @file{ev6}.
+
+@item -print-multiarch
+@opindex print-multiarch
+Print the path to OS libraries for the selected multiarch,
+relative to some @file{lib} subdirectory.
+
+@item -print-prog-name=@var{program}
+@opindex print-prog-name
+Like @option{-print-file-name}, but searches for a program such as @samp{cpp}.
+
+@item -print-libgcc-file-name
+@opindex print-libgcc-file-name
+Same as @option{-print-file-name=libgcc.a}.
+
+This is useful when you use @option{-nostdlib} or @option{-nodefaultlibs}
+but you do want to link with @file{libgcc.a}.  You can do
+
+@smallexample
+gcc -nostdlib @var{files}@dots{} `gcc -print-libgcc-file-name`
+@end smallexample
+
+@item -print-search-dirs
+@opindex print-search-dirs
+Print the name of the configured installation directory and a list of
+program and library directories @command{gcc} will search---and don't do anything else.
+
+This is useful when @command{gcc} prints the error message
+@samp{installation problem, cannot exec cpp0: No such file or directory}.
+To resolve this you either need to put @file{cpp0} and the other compiler
+components where @command{gcc} expects to find them, or you can set the environment
+variable @env{GCC_EXEC_PREFIX} to the directory where you installed them.
+Don't forget the trailing @samp{/}.
+@xref{Environment Variables}.
+
+@item -print-sysroot
+@opindex print-sysroot
+Print the target sysroot directory that will be used during
+compilation.  This is the target sysroot specified either at configure
+time or using the @option{--sysroot} option, possibly with an extra
+suffix that depends on compilation options.  If no target sysroot is
+specified, the option prints nothing.
+
+@item -print-sysroot-headers-suffix
+@opindex print-sysroot-headers-suffix
+Print the suffix added to the target sysroot when searching for
+headers, or give an error if the compiler is not configured with such
+a suffix---and don't do anything else.
+
+@item -dumpmachine
+@opindex dumpmachine
+Print the compiler's target machine (for example,
+@samp{i686-pc-linux-gnu})---and don't do anything else.
+
+@item -dumpversion
+@opindex dumpversion
+Print the compiler version (for example, @samp{3.0})---and don't do
+anything else.
+
+@item -dumpspecs
+@opindex dumpspecs
+Print the compiler's built-in specs---and don't do anything else.  (This
+is used when GCC itself is being built.)  @xref{Spec Files}.
+
+@item -feliminate-unused-debug-types
+@opindex feliminate-unused-debug-types
+Normally, when producing DWARF2 output, GCC will emit debugging
+information for all types declared in a compilation
+unit, regardless of whether or not they are actually used
+in that compilation unit.  Sometimes this is useful, such as
+if, in the debugger, you want to cast a value to a type that is
+not actually used in your program (but is declared).  More often,
+however, this results in a significant amount of wasted space.
+With this option, GCC will avoid producing debug symbol output
+for types that are nowhere used in the source file being compiled.
+@end table
+
+@node Optimize Options
+@section Options That Control Optimization
+@cindex optimize options
+@cindex options, optimization
+
+These options control various sorts of optimizations.
+
+Without any optimization option, the compiler's goal is to reduce the
+cost of compilation and to make debugging produce the expected
+results.  Statements are independent: if you stop the program with a
+breakpoint between statements, you can then assign a new value to any
+variable or change the program counter to any other statement in the
+function and get exactly the results you would expect from the source
+code.
+
+Turning on optimization flags makes the compiler attempt to improve
+the performance and/or code size at the expense of compilation time
+and possibly the ability to debug the program.
+
+The compiler performs optimization based on the knowledge it has of the
+program.  Compiling multiple files at once to a single output file mode allows
+the compiler to use information gained from all of the files when compiling
+each of them.
+
+Not all optimizations are controlled directly by a flag.  Only
+optimizations that have a flag are listed in this section.
+
+Most optimizations are only enabled if an @option{-O} level is set on
+the command line.  Otherwise they are disabled, even if individual             
+optimization flags are specified.
+
+Depending on the target and how GCC was configured, a slightly different
+set of optimizations may be enabled at each @option{-O} level than
+those listed here.  You can invoke GCC with @samp{-Q --help=optimizers}
+to find out the exact set of optimizations that are enabled at each level.
+@xref{Overall Options}, for examples.
+
+@table @gcctabopt
+@item -O
+@itemx -O1
+@opindex O
+@opindex O1
+Optimize.  Optimizing compilation takes somewhat more time, and a lot
+more memory for a large function.
+
+With @option{-O}, the compiler tries to reduce code size and execution
+time, without performing any optimizations that take a great deal of
+compilation time.
+
+@option{-O} turns on the following optimization flags:
+@gccoptlist{
+-fauto-inc-dec @gol
+-fcompare-elim @gol
+-fcprop-registers @gol
+-fdce @gol
+-fdefer-pop @gol
+-fdelayed-branch @gol
+-fdse @gol
+-fguess-branch-probability @gol
+-fif-conversion2 @gol
+-fif-conversion @gol
+-fipa-pure-const @gol
+-fipa-profile @gol
+-fipa-reference @gol
+-fmerge-constants
+-fsplit-wide-types @gol
+-ftree-bit-ccp @gol
+-ftree-builtin-call-dce @gol
+-ftree-ccp @gol
+-ftree-ch @gol
+-ftree-copyrename @gol
+-ftree-dce @gol
+-ftree-dominator-opts @gol
+-ftree-dse @gol
+-ftree-forwprop @gol
+-ftree-fre @gol
+-ftree-phiprop @gol
+-ftree-sra @gol
+-ftree-pta @gol
+-ftree-ter @gol
+-funit-at-a-time}
+
+@option{-O} also turns on @option{-fomit-frame-pointer} on machines
+where doing so does not interfere with debugging.
+
+@item -O2
+@opindex O2
+Optimize even more.  GCC performs nearly all supported optimizations
+that do not involve a space-speed tradeoff.
+As compared to @option{-O}, this option increases both compilation time
+and the performance of the generated code.
+
+@option{-O2} turns on all optimization flags specified by @option{-O}.  It
+also turns on the following optimization flags:
+@gccoptlist{-fthread-jumps @gol
+-falign-functions  -falign-jumps @gol
+-falign-loops  -falign-labels @gol
+-fcaller-saves @gol
+-fcrossjumping @gol
+-fcse-follow-jumps  -fcse-skip-blocks @gol
+-fdelete-null-pointer-checks @gol
+-fdevirtualize @gol
+-fexpensive-optimizations @gol
+-fgcse  -fgcse-lm  @gol
+-finline-small-functions @gol
+-findirect-inlining @gol
+-fipa-sra @gol
+-foptimize-sibling-calls @gol
+-fpartial-inlining @gol
+-fpeephole2 @gol
+-fregmove @gol
+-freorder-blocks  -freorder-functions @gol
+-frerun-cse-after-loop  @gol
+-fsched-interblock  -fsched-spec @gol
+-fschedule-insns  -fschedule-insns2 @gol
+-fstrict-aliasing -fstrict-overflow @gol
+-ftree-switch-conversion @gol
+-ftree-pre @gol
+-ftree-vrp}
+
+Please note the warning under @option{-fgcse} about
+invoking @option{-O2} on programs that use computed gotos.
+
+@item -O3
+@opindex O3
+Optimize yet more.  @option{-O3} turns on all optimizations specified
+by @option{-O2} and also turns on the @option{-finline-functions},
+@option{-funswitch-loops}, @option{-fpredictive-commoning},
+@option{-fgcse-after-reload}, @option{-ftree-vectorize} and
+@option{-fipa-cp-clone} options.
+
+@item -O0
+@opindex O0
+Reduce compilation time and make debugging produce the expected
+results.  This is the default.
+
+@item -Os
+@opindex Os
+Optimize for size.  @option{-Os} enables all @option{-O2} optimizations that
+do not typically increase code size.  It also performs further
+optimizations designed to reduce code size.
+
+@option{-Os} disables the following optimization flags:
+@gccoptlist{-falign-functions  -falign-jumps  -falign-loops @gol
+-falign-labels  -freorder-blocks  -freorder-blocks-and-partition @gol
+-fprefetch-loop-arrays  -ftree-vect-loop-version}
+
+@item -Ofast
+@opindex Ofast
+Disregard strict standards compliance.  @option{-Ofast} enables all
+@option{-O3} optimizations.  It also enables optimizations that are not
+valid for all standard compliant programs.
+It turns on @option{-ffast-math}.
+
+If you use multiple @option{-O} options, with or without level numbers,
+the last such option is the one that is effective.
+@end table
+
+Options of the form @option{-f@var{flag}} specify machine-independent
+flags.  Most flags have both positive and negative forms; the negative
+form of @option{-ffoo} would be @option{-fno-foo}.  In the table
+below, only one of the forms is listed---the one you typically will
+use.  You can figure out the other form by either removing @samp{no-}
+or adding it.
+
+The following options control specific optimizations.  They are either
+activated by @option{-O} options or are related to ones that are.  You
+can use the following flags in the rare cases when ``fine-tuning'' of
+optimizations to be performed is desired.
+
+@table @gcctabopt
+@item -fno-default-inline
+@opindex fno-default-inline
+Do not make member functions inline by default merely because they are
+defined inside the class scope (C++ only).  Otherwise, when you specify
+@w{@option{-O}}, member functions defined inside class scope are compiled
+inline by default; i.e., you don't need to add @samp{inline} in front of
+the member function name.
+
+@item -fno-defer-pop
+@opindex fno-defer-pop
+Always pop the arguments to each function call as soon as that function
+returns.  For machines which must pop arguments after a function call,
+the compiler normally lets arguments accumulate on the stack for several
+function calls and pops them all at once.
+
+Disabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -fforward-propagate
+@opindex fforward-propagate
+Perform a forward propagation pass on RTL@.  The pass tries to combine two
+instructions and checks if the result can be simplified.  If loop unrolling
+is active, two passes are performed and the second is scheduled after
+loop unrolling.
+
+This option is enabled by default at optimization levels @option{-O},
+@option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -ffp-contract=@var{style}
+@opindex ffp-contract
+@option{-ffp-contract=off} disables floating-point expression contraction.
+@option{-ffp-contract=fast} enables floating-point expression contraction
+such as forming of fused multiply-add operations if the target has
+native support for them.
+@option{-ffp-contract=on} enables floating-point expression contraction
+if allowed by the language standard.  This is currently not implemented
+and treated equal to @option{-ffp-contract=off}.
+
+The default is @option{-ffp-contract=fast}.
+
+@item -fomit-frame-pointer
+@opindex fomit-frame-pointer
+Don't keep the frame pointer in a register for functions that
+don't need one.  This avoids the instructions to save, set up and
+restore frame pointers; it also makes an extra register available
+in many functions.  @strong{It also makes debugging impossible on
+some machines.}
+
+On some machines, such as the VAX, this flag has no effect, because
+the standard calling sequence automatically handles the frame pointer
+and nothing is saved by pretending it doesn't exist.  The
+machine-description macro @code{FRAME_POINTER_REQUIRED} controls
+whether a target machine supports this flag.  @xref{Registers,,Register
+Usage, gccint, GNU Compiler Collection (GCC) Internals}.
+
+Starting with GCC version 4.6, the default setting (when not optimizing for
+size) for 32-bit Linux x86 and 32-bit Darwin x86 targets has been changed to
+@option{-fomit-frame-pointer}.  The default can be reverted to
+@option{-fno-omit-frame-pointer} by configuring GCC with the
+@option{--enable-frame-pointer} configure option.
+
+Enabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -foptimize-sibling-calls
+@opindex foptimize-sibling-calls
+Optimize sibling and tail recursive calls.
+
+Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -fno-inline
+@opindex fno-inline
+Don't pay attention to the @code{inline} keyword.  Normally this option
+is used to keep the compiler from expanding any functions inline.
+Note that if you are not optimizing, no functions can be expanded inline.
+
+@item -finline-small-functions
+@opindex finline-small-functions
+Integrate functions into their callers when their body is smaller than expected
+function call code (so overall size of program gets smaller).  The compiler
+heuristically decides which functions are simple enough to be worth integrating
+in this way.
+
+Enabled at level @option{-O2}.
+
+@item -findirect-inlining
+@opindex findirect-inlining
+Inline also indirect calls that are discovered to be known at compile
+time thanks to previous inlining.  This option has any effect only
+when inlining itself is turned on by the @option{-finline-functions}
+or @option{-finline-small-functions} options.
+
+Enabled at level @option{-O2}.
+
+@item -finline-functions
+@opindex finline-functions
+Integrate all simple functions into their callers.  The compiler
+heuristically decides which functions are simple enough to be worth
+integrating in this way.
+
+If all calls to a given function are integrated, and the function is
+declared @code{static}, then the function is normally not output as
+assembler code in its own right.
+
+Enabled at level @option{-O3}.
+
+@item -finline-functions-called-once
+@opindex finline-functions-called-once
+Consider all @code{static} functions called once for inlining into their
+caller even if they are not marked @code{inline}.  If a call to a given
+function is integrated, then the function is not output as assembler code
+in its own right.
+
+Enabled at levels @option{-O1}, @option{-O2}, @option{-O3} and @option{-Os}.
+
+@item -fearly-inlining
+@opindex fearly-inlining
+Inline functions marked by @code{always_inline} and functions whose body seems
+smaller than the function call overhead early before doing
+@option{-fprofile-generate} instrumentation and real inlining pass.  Doing so
+makes profiling significantly cheaper and usually inlining faster on programs
+having large chains of nested wrapper functions.
+
+Enabled by default.
+
+@item -fipa-sra
+@opindex fipa-sra
+Perform interprocedural scalar replacement of aggregates, removal of
+unused parameters and replacement of parameters passed by reference
+by parameters passed by value.
+
+Enabled at levels @option{-O2}, @option{-O3} and @option{-Os}.
+
+@item -finline-limit=@var{n}
+@opindex finline-limit
+By default, GCC limits the size of functions that can be inlined.  This flag
+allows coarse control of this limit.  @var{n} is the size of functions that
+can be inlined in number of pseudo instructions.
+
+Inlining is actually controlled by a number of parameters, which may be
+specified individually by using @option{--param @var{name}=@var{value}}.
+The @option{-finline-limit=@var{n}} option sets some of these parameters
+as follows:
+
+@table @gcctabopt
+@item max-inline-insns-single
+is set to @var{n}/2.
+@item max-inline-insns-auto
+is set to @var{n}/2.
+@end table
+
+See below for a documentation of the individual
+parameters controlling inlining and for the defaults of these parameters.
+
+@emph{Note:} there may be no value to @option{-finline-limit} that results
+in default behavior.
+
+@emph{Note:} pseudo instruction represents, in this particular context, an
+abstract measurement of function's size.  In no way does it represent a count
+of assembly instructions and as such its exact meaning might change from one
+release to an another.
+
+@item -fno-keep-inline-dllexport
+@opindex -fno-keep-inline-dllexport
+This is a more fine-grained version of @option{-fkeep-inline-functions},
+which applies only to functions that are declared using the @code{dllexport}
+attribute or declspec (@xref{Function Attributes,,Declaring Attributes of
+Functions}.)
+
+@item -fkeep-inline-functions
+@opindex fkeep-inline-functions
+In C, emit @code{static} functions that are declared @code{inline}
+into the object file, even if the function has been inlined into all
+of its callers.  This switch does not affect functions using the
+@code{extern inline} extension in GNU C90@.  In C++, emit any and all
+inline functions into the object file.
+
+@item -fkeep-static-consts
+@opindex fkeep-static-consts
+Emit variables declared @code{static const} when optimization isn't turned
+on, even if the variables aren't referenced.
+
+GCC enables this option by default.  If you want to force the compiler to
+check if the variable was referenced, regardless of whether or not
+optimization is turned on, use the @option{-fno-keep-static-consts} option.
+
+@item -fmerge-constants
+@opindex fmerge-constants
+Attempt to merge identical constants (string constants and floating point
+constants) across compilation units.
+
+This option is the default for optimized compilation if the assembler and
+linker support it.  Use @option{-fno-merge-constants} to inhibit this
+behavior.
+
+Enabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -fmerge-all-constants
+@opindex fmerge-all-constants
+Attempt to merge identical constants and identical variables.
+
+This option implies @option{-fmerge-constants}.  In addition to
+@option{-fmerge-constants} this considers e.g.@: even constant initialized
+arrays or initialized constant variables with integral or floating point
+types.  Languages like C or C++ require each variable, including multiple
+instances of the same variable in recursive calls, to have distinct locations,
+so using this option will result in non-conforming
+behavior.
+
+@item -fmodulo-sched
+@opindex fmodulo-sched
+Perform swing modulo scheduling immediately before the first scheduling
+pass.  This pass looks at innermost loops and reorders their
+instructions by overlapping different iterations.
+
+@item -fmodulo-sched-allow-regmoves
+@opindex fmodulo-sched-allow-regmoves
+Perform more aggressive SMS based modulo scheduling with register moves
+allowed.  By setting this flag certain anti-dependences edges will be
+deleted which will trigger the generation of reg-moves based on the
+life-range analysis.  This option is effective only with
+@option{-fmodulo-sched} enabled.
+
+@item -fno-branch-count-reg
+@opindex fno-branch-count-reg
+Do not use ``decrement and branch'' instructions on a count register,
+but instead generate a sequence of instructions that decrement a
+register, compare it against zero, then branch based upon the result.
+This option is only meaningful on architectures that support such
+instructions, which include x86, PowerPC, IA-64 and S/390.
+
+The default is @option{-fbranch-count-reg}.
+
+@item -fno-function-cse
+@opindex fno-function-cse
+Do not put function addresses in registers; make each instruction that
+calls a constant function contain the function's address explicitly.
+
+This option results in less efficient code, but some strange hacks
+that alter the assembler output may be confused by the optimizations
+performed when this option is not used.
+
+The default is @option{-ffunction-cse}
+
+@item -fno-zero-initialized-in-bss
+@opindex fno-zero-initialized-in-bss
+If the target supports a BSS section, GCC by default puts variables that
+are initialized to zero into BSS@.  This can save space in the resulting
+code.
+
+This option turns off this behavior because some programs explicitly
+rely on variables going to the data section.  E.g., so that the
+resulting executable can find the beginning of that section and/or make
+assumptions based on that.
+
+The default is @option{-fzero-initialized-in-bss}.
+
+@item -fmudflap -fmudflapth -fmudflapir
+@opindex fmudflap
+@opindex fmudflapth
+@opindex fmudflapir
+@cindex bounds checking
+@cindex mudflap
+For front-ends that support it (C and C++), instrument all risky
+pointer/array dereferencing operations, some standard library
+string/heap functions, and some other associated constructs with
+range/validity tests.  Modules so instrumented should be immune to
+buffer overflows, invalid heap use, and some other classes of C/C++
+programming errors.  The instrumentation relies on a separate runtime
+library (@file{libmudflap}), which will be linked into a program if
+@option{-fmudflap} is given at link time.  Run-time behavior of the
+instrumented program is controlled by the @env{MUDFLAP_OPTIONS}
+environment variable.  See @code{env MUDFLAP_OPTIONS=-help a.out}
+for its options.
+
+Use @option{-fmudflapth} instead of @option{-fmudflap} to compile and to
+link if your program is multi-threaded.  Use @option{-fmudflapir}, in
+addition to @option{-fmudflap} or @option{-fmudflapth}, if
+instrumentation should ignore pointer reads.  This produces less
+instrumentation (and therefore faster execution) and still provides
+some protection against outright memory corrupting writes, but allows
+erroneously read data to propagate within a program.
+
+@item -fthread-jumps
+@opindex fthread-jumps
+Perform optimizations where we check to see if a jump branches to a
+location where another comparison subsumed by the first is found.  If
+so, the first branch is redirected to either the destination of the
+second branch or a point immediately following it, depending on whether
+the condition is known to be true or false.
+
+Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -fsplit-wide-types
+@opindex fsplit-wide-types
+When using a type that occupies multiple registers, such as @code{long
+long} on a 32-bit system, split the registers apart and allocate them
+independently.  This normally generates better code for those types,
+but may make debugging more difficult.
+
+Enabled at levels @option{-O}, @option{-O2}, @option{-O3},
+@option{-Os}.
+
+@item -fcse-follow-jumps
+@opindex fcse-follow-jumps
+In common subexpression elimination (CSE), scan through jump instructions
+when the target of the jump is not reached by any other path.  For
+example, when CSE encounters an @code{if} statement with an
+@code{else} clause, CSE will follow the jump when the condition
+tested is false.
+
+Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -fcse-skip-blocks
+@opindex fcse-skip-blocks
+This is similar to @option{-fcse-follow-jumps}, but causes CSE to
+follow jumps which conditionally skip over blocks.  When CSE
+encounters a simple @code{if} statement with no else clause,
+@option{-fcse-skip-blocks} causes CSE to follow the jump around the
+body of the @code{if}.
+
+Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -frerun-cse-after-loop
+@opindex frerun-cse-after-loop
+Re-run common subexpression elimination after loop optimizations has been
+performed.
+
+Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -fgcse
+@opindex fgcse
+Perform a global common subexpression elimination pass.
+This pass also performs global constant and copy propagation.
+
+@emph{Note:} When compiling a program using computed gotos, a GCC
+extension, you may get better runtime performance if you disable
+the global common subexpression elimination pass by adding
+@option{-fno-gcse} to the command line.
+
+Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -fgcse-lm
+@opindex fgcse-lm
+When @option{-fgcse-lm} is enabled, global common subexpression elimination will
+attempt to move loads which are only killed by stores into themselves.  This
+allows a loop containing a load/store sequence to be changed to a load outside
+the loop, and a copy/store within the loop.
+
+Enabled by default when gcse is enabled.
+
+@item -fgcse-sm
+@opindex fgcse-sm
+When @option{-fgcse-sm} is enabled, a store motion pass is run after
+global common subexpression elimination.  This pass will attempt to move
+stores out of loops.  When used in conjunction with @option{-fgcse-lm},
+loops containing a load/store sequence can be changed to a load before
+the loop and a store after the loop.
+
+Not enabled at any optimization level.
+
+@item -fgcse-las
+@opindex fgcse-las
+When @option{-fgcse-las} is enabled, the global common subexpression
+elimination pass eliminates redundant loads that come after stores to the
+same memory location (both partial and full redundancies).
+
+Not enabled at any optimization level.
+
+@item -fgcse-after-reload
+@opindex fgcse-after-reload
+When @option{-fgcse-after-reload} is enabled, a redundant load elimination
+pass is performed after reload.  The purpose of this pass is to cleanup
+redundant spilling.
+
+@item -funsafe-loop-optimizations
+@opindex funsafe-loop-optimizations
+If given, the loop optimizer will assume that loop indices do not
+overflow, and that the loops with nontrivial exit condition are not
+infinite.  This enables a wider range of loop optimizations even if
+the loop optimizer itself cannot prove that these assumptions are valid.
+Using @option{-Wunsafe-loop-optimizations}, the compiler will warn you
+if it finds this kind of loop.
+
+@item -fcrossjumping
+@opindex fcrossjumping
+Perform cross-jumping transformation.  This transformation unifies equivalent code and save code size.  The
+resulting code may or may not perform better than without cross-jumping.
+
+Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -fauto-inc-dec
+@opindex fauto-inc-dec
+Combine increments or decrements of addresses with memory accesses.
+This pass is always skipped on architectures that do not have
+instructions to support this.  Enabled by default at @option{-O} and
+higher on architectures that support this.
+
+@item -fdce
+@opindex fdce
+Perform dead code elimination (DCE) on RTL@.
+Enabled by default at @option{-O} and higher.
+
+@item -fdse
+@opindex fdse
+Perform dead store elimination (DSE) on RTL@.
+Enabled by default at @option{-O} and higher.
+
+@item -fif-conversion
+@opindex fif-conversion
+Attempt to transform conditional jumps into branch-less equivalents.  This
+include use of conditional moves, min, max, set flags and abs instructions, and
+some tricks doable by standard arithmetics.  The use of conditional execution
+on chips where it is available is controlled by @code{if-conversion2}.
+
+Enabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -fif-conversion2
+@opindex fif-conversion2
+Use conditional execution (where available) to transform conditional jumps into
+branch-less equivalents.
+
+Enabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -fdelete-null-pointer-checks
+@opindex fdelete-null-pointer-checks
+Assume that programs cannot safely dereference null pointers, and that
+no code or data element resides there.  This enables simple constant
+folding optimizations at all optimization levels.  In addition, other
+optimization passes in GCC use this flag to control global dataflow
+analyses that eliminate useless checks for null pointers; these assume
+that if a pointer is checked after it has already been dereferenced,
+it cannot be null.
+
+Note however that in some environments this assumption is not true.
+Use @option{-fno-delete-null-pointer-checks} to disable this optimization
+for programs which depend on that behavior.
+
+Some targets, especially embedded ones, disable this option at all levels.
+Otherwise it is enabled at all levels: @option{-O0}, @option{-O1},
+@option{-O2}, @option{-O3}, @option{-Os}.  Passes that use the information
+are enabled independently at different optimization levels.
+
+@item -fdevirtualize
+@opindex fdevirtualize
+Attempt to convert calls to virtual functions to direct calls.  This
+is done both within a procedure and interprocedurally as part of
+indirect inlining (@code{-findirect-inlining}) and interprocedural constant
+propagation (@option{-fipa-cp}).
+Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -fexpensive-optimizations
+@opindex fexpensive-optimizations
+Perform a number of minor optimizations that are relatively expensive.
+
+Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -foptimize-register-move
+@itemx -fregmove
+@opindex foptimize-register-move
+@opindex fregmove
+Attempt to reassign register numbers in move instructions and as
+operands of other simple instructions in order to maximize the amount of
+register tying.  This is especially helpful on machines with two-operand
+instructions.
+
+Note @option{-fregmove} and @option{-foptimize-register-move} are the same
+optimization.
+
+Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -fira-algorithm=@var{algorithm}
+Use specified coloring algorithm for the integrated register
+allocator.  The @var{algorithm} argument should be @code{priority} or
+@code{CB}.  The first algorithm specifies Chow's priority coloring,
+the second one specifies Chaitin-Briggs coloring.  The second
+algorithm can be unimplemented for some architectures.  If it is
+implemented, it is the default because Chaitin-Briggs coloring as a
+rule generates a better code.
+
+@item -fira-region=@var{region}
+Use specified regions for the integrated register allocator.  The
+@var{region} argument should be one of @code{all}, @code{mixed}, or
+@code{one}.  The first value means using all loops as register
+allocation regions, the second value which is the default means using
+all loops except for loops with small register pressure as the
+regions, and third one means using all function as a single region.
+The first value can give best result for machines with small size and
+irregular register set, the third one results in faster and generates
+decent code and the smallest size code, and the default value usually
+give the best results in most cases and for most architectures.
+
+@item -fira-loop-pressure
+@opindex fira-loop-pressure
+Use IRA to evaluate register pressure in loops for decision to move
+loop invariants.  Usage of this option usually results in generation
+of faster and smaller code on machines with big register files (>= 32
+registers) but it can slow compiler down.
+
+This option is enabled at level @option{-O3} for some targets.
+
+@item -fno-ira-share-save-slots
+@opindex fno-ira-share-save-slots
+Switch off sharing stack slots used for saving call used hard
+registers living through a call.  Each hard register will get a
+separate stack slot and as a result function stack frame will be
+bigger.
+
+@item -fno-ira-share-spill-slots
+@opindex fno-ira-share-spill-slots
+Switch off sharing stack slots allocated for pseudo-registers.  Each
+pseudo-register which did not get a hard register will get a separate
+stack slot and as a result function stack frame will be bigger.
+
+@item -fira-verbose=@var{n}
+@opindex fira-verbose
+Set up how verbose dump file for the integrated register allocator
+will be.  Default value is 5.  If the value is greater or equal to 10,
+the dump file will be stderr as if the value were @var{n} minus 10.
+
+@item -fdelayed-branch
+@opindex fdelayed-branch
+If supported for the target machine, attempt to reorder instructions
+to exploit instruction slots available after delayed branch
+instructions.
+
+Enabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -fschedule-insns
+@opindex fschedule-insns
+If supported for the target machine, attempt to reorder instructions to
+eliminate execution stalls due to required data being unavailable.  This
+helps machines that have slow floating point or memory load instructions
+by allowing other instructions to be issued until the result of the load
+or floating point instruction is required.
+
+Enabled at levels @option{-O2}, @option{-O3}.
+
+@item -fschedule-insns2
+@opindex fschedule-insns2
+Similar to @option{-fschedule-insns}, but requests an additional pass of
+instruction scheduling after register allocation has been done.  This is
+especially useful on machines with a relatively small number of
+registers and where memory load instructions take more than one cycle.
+
+Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -fno-sched-interblock
+@opindex fno-sched-interblock
+Don't schedule instructions across basic blocks.  This is normally
+enabled by default when scheduling before register allocation, i.e.@:
+with @option{-fschedule-insns} or at @option{-O2} or higher.
+
+@item -fno-sched-spec
+@opindex fno-sched-spec
+Don't allow speculative motion of non-load instructions.  This is normally
+enabled by default when scheduling before register allocation, i.e.@:
+with @option{-fschedule-insns} or at @option{-O2} or higher.
+
+@item -fsched-pressure
+@opindex fsched-pressure
+Enable register pressure sensitive insn scheduling before the register
+allocation.  This only makes sense when scheduling before register
+allocation is enabled, i.e.@: with @option{-fschedule-insns} or at
+@option{-O2} or higher.  Usage of this option can improve the
+generated code and decrease its size by preventing register pressure
+increase above the number of available hard registers and as a
+consequence register spills in the register allocation.
+
+@item -fsched-spec-load
+@opindex fsched-spec-load
+Allow speculative motion of some load instructions.  This only makes
+sense when scheduling before register allocation, i.e.@: with
+@option{-fschedule-insns} or at @option{-O2} or higher.
+
+@item -fsched-spec-load-dangerous
+@opindex fsched-spec-load-dangerous
+Allow speculative motion of more load instructions.  This only makes
+sense when scheduling before register allocation, i.e.@: with
+@option{-fschedule-insns} or at @option{-O2} or higher.
+
+@item -fsched-stalled-insns
+@itemx -fsched-stalled-insns=@var{n}
+@opindex fsched-stalled-insns
+Define how many insns (if any) can be moved prematurely from the queue
+of stalled insns into the ready list, during the second scheduling pass.
+@option{-fno-sched-stalled-insns} means that no insns will be moved
+prematurely, @option{-fsched-stalled-insns=0} means there is no limit
+on how many queued insns can be moved prematurely.
+@option{-fsched-stalled-insns} without a value is equivalent to
+@option{-fsched-stalled-insns=1}.
+
+@item -fsched-stalled-insns-dep
+@itemx -fsched-stalled-insns-dep=@var{n}
+@opindex fsched-stalled-insns-dep
+Define how many insn groups (cycles) will be examined for a dependency
+on a stalled insn that is candidate for premature removal from the queue
+of stalled insns.  This has an effect only during the second scheduling pass,
+and only if @option{-fsched-stalled-insns} is used.
+@option{-fno-sched-stalled-insns-dep} is equivalent to
+@option{-fsched-stalled-insns-dep=0}.
+@option{-fsched-stalled-insns-dep} without a value is equivalent to
+@option{-fsched-stalled-insns-dep=1}.
+
+@item -fsched2-use-superblocks
+@opindex fsched2-use-superblocks
+When scheduling after register allocation, do use superblock scheduling
+algorithm.  Superblock scheduling allows motion across basic block boundaries
+resulting on faster schedules.  This option is experimental, as not all machine
+descriptions used by GCC model the CPU closely enough to avoid unreliable
+results from the algorithm.
+
+This only makes sense when scheduling after register allocation, i.e.@: with
+@option{-fschedule-insns2} or at @option{-O2} or higher.
+
+@item -fsched-group-heuristic
+@opindex fsched-group-heuristic
+Enable the group heuristic in the scheduler.  This heuristic favors 
+the instruction that belongs to a schedule group.  This is enabled 
+by default when scheduling is enabled, i.e.@: with @option{-fschedule-insns} 
+or @option{-fschedule-insns2} or at @option{-O2} or higher.
+
+@item -fsched-critical-path-heuristic
+@opindex fsched-critical-path-heuristic
+Enable the critical-path heuristic in the scheduler.  This heuristic favors 
+instructions on the critical path.  This is enabled by default when 
+scheduling is enabled, i.e.@: with @option{-fschedule-insns} 
+or @option{-fschedule-insns2} or at @option{-O2} or higher.
+
+@item -fsched-spec-insn-heuristic
+@opindex fsched-spec-insn-heuristic
+Enable the speculative instruction heuristic in the scheduler.  This 
+heuristic favors speculative instructions with greater dependency weakness.  
+This is enabled by default when scheduling is enabled, i.e.@: 
+with @option{-fschedule-insns} or @option{-fschedule-insns2} 
+or at @option{-O2} or higher.
+
+@item -fsched-rank-heuristic
+@opindex fsched-rank-heuristic
+Enable the rank heuristic in the scheduler.  This heuristic favors 
+the instruction belonging to a basic block with greater size or frequency.  
+This is enabled by default when scheduling is enabled, i.e.@: 
+with @option{-fschedule-insns} or @option{-fschedule-insns2} or 
+at @option{-O2} or higher.
+
+@item -fsched-last-insn-heuristic
+@opindex fsched-last-insn-heuristic
+Enable the last-instruction heuristic in the scheduler.  This heuristic 
+favors the instruction that is less dependent on the last instruction
+scheduled.  This is enabled by default when scheduling is enabled, 
+i.e.@: with @option{-fschedule-insns} or @option{-fschedule-insns2} or 
+at @option{-O2} or higher.
+
+@item -fsched-dep-count-heuristic
+@opindex fsched-dep-count-heuristic
+Enable the dependent-count heuristic in the scheduler.  This heuristic 
+favors the instruction that has more instructions depending on it.  
+This is enabled by default when scheduling is enabled, i.e.@: 
+with @option{-fschedule-insns} or @option{-fschedule-insns2} or 
+at @option{-O2} or higher.
+
+@item -freschedule-modulo-scheduled-loops
+@opindex freschedule-modulo-scheduled-loops
+The modulo scheduling comes before the traditional scheduling, if a loop
+was modulo scheduled we may want to prevent the later scheduling passes
+from changing its schedule, we use this option to control that.
+
+@item -fselective-scheduling
+@opindex fselective-scheduling
+Schedule instructions using selective scheduling algorithm.  Selective
+scheduling runs instead of the first scheduler pass.
+
+@item -fselective-scheduling2
+@opindex fselective-scheduling2
+Schedule instructions using selective scheduling algorithm.  Selective
+scheduling runs instead of the second scheduler pass.
+
+@item -fsel-sched-pipelining
+@opindex fsel-sched-pipelining
+Enable software pipelining of innermost loops during selective scheduling.
+This option has no effect until one of @option{-fselective-scheduling} or
+@option{-fselective-scheduling2} is turned on.
+
+@item -fsel-sched-pipelining-outer-loops
+@opindex fsel-sched-pipelining-outer-loops
+When pipelining loops during selective scheduling, also pipeline outer loops.
+This option has no effect until @option{-fsel-sched-pipelining} is turned on.
+
+@item -fcaller-saves
+@opindex fcaller-saves
+Enable values to be allocated in registers that will be clobbered by
+function calls, by emitting extra instructions to save and restore the
+registers around such calls.  Such allocation is done only when it
+seems to result in better code than would otherwise be produced.
+
+This option is always enabled by default on certain machines, usually
+those which have no call-preserved registers to use instead.
+
+Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -fcombine-stack-adjustments
+@opindex fcombine-stack-adjustments
+Tracks stack adjustments (pushes and pops) and stack memory references
+and then tries to find ways to combine them.
+
+Enabled by default at @option{-O1} and higher.
+
+@item -fconserve-stack
+@opindex fconserve-stack
+Attempt to minimize stack usage.  The compiler will attempt to use less
+stack space, even if that makes the program slower.  This option
+implies setting the @option{large-stack-frame} parameter to 100
+and the @option{large-stack-frame-growth} parameter to 400.
+
+@item -ftree-reassoc
+@opindex ftree-reassoc
+Perform reassociation on trees.  This flag is enabled by default
+at @option{-O} and higher.
+
+@item -ftree-pre
+@opindex ftree-pre
+Perform partial redundancy elimination (PRE) on trees.  This flag is
+enabled by default at @option{-O2} and @option{-O3}.
+
+@item -ftree-forwprop
+@opindex ftree-forwprop
+Perform forward propagation on trees.  This flag is enabled by default
+at @option{-O} and higher.
+
+@item -ftree-fre
+@opindex ftree-fre
+Perform full redundancy elimination (FRE) on trees.  The difference
+between FRE and PRE is that FRE only considers expressions
+that are computed on all paths leading to the redundant computation.
+This analysis is faster than PRE, though it exposes fewer redundancies.
+This flag is enabled by default at @option{-O} and higher.
+
+@item -ftree-phiprop
+@opindex ftree-phiprop
+Perform hoisting of loads from conditional pointers on trees.  This
+pass is enabled by default at @option{-O} and higher.
+
+@item -ftree-copy-prop
+@opindex ftree-copy-prop
+Perform copy propagation on trees.  This pass eliminates unnecessary
+copy operations.  This flag is enabled by default at @option{-O} and
+higher.
+
+@item -fipa-pure-const
+@opindex fipa-pure-const
+Discover which functions are pure or constant.
+Enabled by default at @option{-O} and higher.
+
+@item -fipa-reference
+@opindex fipa-reference
+Discover which static variables do not escape cannot escape the
+compilation unit.
+Enabled by default at @option{-O} and higher.
+
+@item -fipa-struct-reorg
+@opindex fipa-struct-reorg
+Perform structure reorganization optimization, that change C-like structures
+layout in order to better utilize spatial locality.  This transformation is
+affective for programs containing arrays of structures.  Available in two
+compilation modes: profile-based (enabled with @option{-fprofile-generate})
+or static (which uses built-in heuristics).  It works only in whole program
+mode, so it requires @option{-fwhole-program} to be
+enabled.  Structures considered @samp{cold} by this transformation are not
+affected (see @option{--param struct-reorg-cold-struct-ratio=@var{value}}).
+
+With this flag, the program debug info reflects a new structure layout.
+
+@item -fipa-pta
+@opindex fipa-pta
+Perform interprocedural pointer analysis and interprocedural modification
+and reference analysis.  This option can cause excessive memory and
+compile-time usage on large compilation units.  It is not enabled by
+default at any optimization level.
+
+@item -fipa-profile
+@opindex fipa-profile
+Perform interprocedural profile propagation.  The functions called only from
+cold functions are marked as cold. Also functions executed once (such as
+@code{cold}, @code{noreturn}, static constructors or destructors) are identified. Cold
+functions and loop less parts of functions executed once are then optimized for
+size.
+Enabled by default at @option{-O} and higher.
+
+@item -fipa-cp
+@opindex fipa-cp
+Perform interprocedural constant propagation.
+This optimization analyzes the program to determine when values passed
+to functions are constants and then optimizes accordingly.
+This optimization can substantially increase performance
+if the application has constants passed to functions.
+This flag is enabled by default at @option{-O2}, @option{-Os} and @option{-O3}.
+
+@item -fipa-cp-clone
+@opindex fipa-cp-clone
+Perform function cloning to make interprocedural constant propagation stronger.
+When enabled, interprocedural constant propagation will perform function cloning
+when externally visible function can be called with constant arguments.
+Because this optimization can create multiple copies of functions,
+it may significantly increase code size
+(see @option{--param ipcp-unit-growth=@var{value}}).
+This flag is enabled by default at @option{-O3}.
+
+@item -fipa-matrix-reorg
+@opindex fipa-matrix-reorg
+Perform matrix flattening and transposing.
+Matrix flattening tries to replace an @math{m}-dimensional matrix
+with its equivalent @math{n}-dimensional matrix, where @math{n < m}.
+This reduces the level of indirection needed for accessing the elements
+of the matrix. The second optimization is matrix transposing that
+attempts to change the order of the matrix's dimensions in order to
+improve cache locality.
+Both optimizations need the @option{-fwhole-program} flag.
+Transposing is enabled only if profiling information is available.
+
+@item -ftree-sink
+@opindex ftree-sink
+Perform forward store motion  on trees.  This flag is
+enabled by default at @option{-O} and higher.
+
+@item -ftree-bit-ccp
+@opindex ftree-bit-ccp
+Perform sparse conditional bit constant propagation on trees and propagate
+pointer alignment information.
+This pass only operates on local scalar variables and is enabled by default
+at @option{-O} and higher.  It requires that @option{-ftree-ccp} is enabled.
+
+@item -ftree-ccp
+@opindex ftree-ccp
+Perform sparse conditional constant propagation (CCP) on trees.  This
+pass only operates on local scalar variables and is enabled by default
+at @option{-O} and higher.
+
+@item -ftree-switch-conversion
+Perform conversion of simple initializations in a switch to
+initializations from a scalar array.  This flag is enabled by default
+at @option{-O2} and higher.
+
+@item -ftree-dce
+@opindex ftree-dce
+Perform dead code elimination (DCE) on trees.  This flag is enabled by
+default at @option{-O} and higher.
+
+@item -ftree-builtin-call-dce
+@opindex ftree-builtin-call-dce
+Perform conditional dead code elimination (DCE) for calls to builtin functions
+that may set @code{errno} but are otherwise side-effect free.  This flag is
+enabled by default at @option{-O2} and higher if @option{-Os} is not also
+specified.
+
+@item -ftree-dominator-opts
+@opindex ftree-dominator-opts
+Perform a variety of simple scalar cleanups (constant/copy
+propagation, redundancy elimination, range propagation and expression
+simplification) based on a dominator tree traversal.  This also
+performs jump threading (to reduce jumps to jumps). This flag is
+enabled by default at @option{-O} and higher.
+
+@item -ftree-dse
+@opindex ftree-dse
+Perform dead store elimination (DSE) on trees.  A dead store is a store into
+a memory location which will later be overwritten by another store without
+any intervening loads.  In this case the earlier store can be deleted.  This
+flag is enabled by default at @option{-O} and higher.
+
+@item -ftree-ch
+@opindex ftree-ch
+Perform loop header copying on trees.  This is beneficial since it increases
+effectiveness of code motion optimizations.  It also saves one jump.  This flag
+is enabled by default at @option{-O} and higher.  It is not enabled
+for @option{-Os}, since it usually increases code size.
+
+@item -ftree-loop-optimize
+@opindex ftree-loop-optimize
+Perform loop optimizations on trees.  This flag is enabled by default
+at @option{-O} and higher.
+
+@item -ftree-loop-linear
+@opindex ftree-loop-linear
+Perform loop interchange transformations on tree.  Same as
+@option{-floop-interchange}.  To use this code transformation, GCC has
+to be configured with @option{--with-ppl} and @option{--with-cloog} to
+enable the Graphite loop transformation infrastructure.
+
+@item -floop-interchange
+@opindex floop-interchange
+Perform loop interchange transformations on loops.  Interchanging two
+nested loops switches the inner and outer loops.  For example, given a
+loop like:
+@smallexample
+DO J = 1, M
+  DO I = 1, N
+    A(J, I) = A(J, I) * C
+  ENDDO
+ENDDO
+@end smallexample
+loop interchange will transform the loop as if the user had written:
+@smallexample
+DO I = 1, N
+  DO J = 1, M
+    A(J, I) = A(J, I) * C
+  ENDDO
+ENDDO
+@end smallexample
+which can be beneficial when @code{N} is larger than the caches,
+because in Fortran, the elements of an array are stored in memory
+contiguously by column, and the original loop iterates over rows,
+potentially creating at each access a cache miss.  This optimization
+applies to all the languages supported by GCC and is not limited to
+Fortran.  To use this code transformation, GCC has to be configured
+with @option{--with-ppl} and @option{--with-cloog} to enable the
+Graphite loop transformation infrastructure.
+
+@item -floop-strip-mine
+@opindex floop-strip-mine
+Perform loop strip mining transformations on loops.  Strip mining
+splits a loop into two nested loops.  The outer loop has strides
+equal to the strip size and the inner loop has strides of the
+original loop within a strip.  The strip length can be changed
+using the @option{loop-block-tile-size} parameter.  For example,
+given a loop like:
+@smallexample
+DO I = 1, N
+  A(I) = A(I) + C
+ENDDO
+@end smallexample
+loop strip mining will transform the loop as if the user had written:
+@smallexample
+DO II = 1, N, 51
+  DO I = II, min (II + 50, N)
+    A(I) = A(I) + C
+  ENDDO
+ENDDO
+@end smallexample
+This optimization applies to all the languages supported by GCC and is
+not limited to Fortran.  To use this code transformation, GCC has to
+be configured with @option{--with-ppl} and @option{--with-cloog} to
+enable the Graphite loop transformation infrastructure.
+
+@item -floop-block
+@opindex floop-block
+Perform loop blocking transformations on loops.  Blocking strip mines
+each loop in the loop nest such that the memory accesses of the
+element loops fit inside caches.  The strip length can be changed
+using the @option{loop-block-tile-size} parameter.  For example, given
+a loop like:
+@smallexample
+DO I = 1, N
+  DO J = 1, M
+    A(J, I) = B(I) + C(J)
+  ENDDO
+ENDDO
+@end smallexample
+loop blocking will transform the loop as if the user had written:
+@smallexample
+DO II = 1, N, 51
+  DO JJ = 1, M, 51
+    DO I = II, min (II + 50, N)
+      DO J = JJ, min (JJ + 50, M)
+        A(J, I) = B(I) + C(J)
+      ENDDO
+    ENDDO
+  ENDDO
+ENDDO
+@end smallexample
+which can be beneficial when @code{M} is larger than the caches,
+because the innermost loop will iterate over a smaller amount of data
+that can be kept in the caches.  This optimization applies to all the
+languages supported by GCC and is not limited to Fortran.  To use this
+code transformation, GCC has to be configured with @option{--with-ppl}
+and @option{--with-cloog} to enable the Graphite loop transformation
+infrastructure.
+
+@item -fgraphite-identity
+@opindex fgraphite-identity
+Enable the identity transformation for graphite.  For every SCoP we generate
+the polyhedral representation and transform it back to gimple.  Using
+@option{-fgraphite-identity} we can check the costs or benefits of the
+GIMPLE -> GRAPHITE -> GIMPLE transformation.  Some minimal optimizations
+are also performed by the code generator CLooG, like index splitting and
+dead code elimination in loops.
+
+@item -floop-flatten
+@opindex floop-flatten
+Removes the loop nesting structure: transforms the loop nest into a
+single loop.  This transformation can be useful to vectorize all the
+levels of the loop nest.
+
+@item -floop-parallelize-all
+@opindex floop-parallelize-all
+Use the Graphite data dependence analysis to identify loops that can
+be parallelized.  Parallelize all the loops that can be analyzed to
+not contain loop carried dependences without checking that it is
+profitable to parallelize the loops.
+
+@item -fcheck-data-deps
+@opindex fcheck-data-deps
+Compare the results of several data dependence analyzers.  This option
+is used for debugging the data dependence analyzers.
+
+@item -ftree-loop-if-convert
+Attempt to transform conditional jumps in the innermost loops to
+branch-less equivalents.  The intent is to remove control-flow from
+the innermost loops in order to improve the ability of the
+vectorization pass to handle these loops.  This is enabled by default
+if vectorization is enabled.
+
+@item -ftree-loop-if-convert-stores
+Attempt to also if-convert conditional jumps containing memory writes.
+This transformation can be unsafe for multi-threaded programs as it
+transforms conditional memory writes into unconditional memory writes.
+For example,
+@smallexample
+for (i = 0; i < N; i++)
+  if (cond)
+    A[i] = expr;
+@end smallexample
+would be transformed to
+@smallexample
+for (i = 0; i < N; i++)
+  A[i] = cond ? expr : A[i];
+@end smallexample
+potentially producing data races.
+
+@item -ftree-loop-distribution
+Perform loop distribution.  This flag can improve cache performance on
+big loop bodies and allow further loop optimizations, like
+parallelization or vectorization, to take place.  For example, the loop
+@smallexample
+DO I = 1, N
+  A(I) = B(I) + C
+  D(I) = E(I) * F
+ENDDO
+@end smallexample
+is transformed to
+@smallexample
+DO I = 1, N
+   A(I) = B(I) + C
+ENDDO
+DO I = 1, N
+   D(I) = E(I) * F
+ENDDO
+@end smallexample
+
+@item -ftree-loop-distribute-patterns
+Perform loop distribution of patterns that can be code generated with
+calls to a library.  This flag is enabled by default at @option{-O3}.
+
+This pass distributes the initialization loops and generates a call to
+memset zero.  For example, the loop
+@smallexample
+DO I = 1, N
+  A(I) = 0
+  B(I) = A(I) + I
+ENDDO
+@end smallexample
+is transformed to
+@smallexample
+DO I = 1, N
+   A(I) = 0
+ENDDO
+DO I = 1, N
+   B(I) = A(I) + I
+ENDDO
+@end smallexample
+and the initialization loop is transformed into a call to memset zero.
+
+@item -ftree-loop-im
+@opindex ftree-loop-im
+Perform loop invariant motion on trees.  This pass moves only invariants that
+would be hard to handle at RTL level (function calls, operations that expand to
+nontrivial sequences of insns).  With @option{-funswitch-loops} it also moves
+operands of conditions that are invariant out of the loop, so that we can use
+just trivial invariantness analysis in loop unswitching.  The pass also includes
+store motion.
+
+@item -ftree-loop-ivcanon
+@opindex ftree-loop-ivcanon
+Create a canonical counter for number of iterations in the loop for that
+determining number of iterations requires complicated analysis.  Later
+optimizations then may determine the number easily.  Useful especially
+in connection with unrolling.
+
+@item -fivopts
+@opindex fivopts
+Perform induction variable optimizations (strength reduction, induction
+variable merging and induction variable elimination) on trees.
+
+@item -ftree-parallelize-loops=n
+@opindex ftree-parallelize-loops
+Parallelize loops, i.e., split their iteration space to run in n threads.
+This is only possible for loops whose iterations are independent
+and can be arbitrarily reordered.  The optimization is only
+profitable on multiprocessor machines, for loops that are CPU-intensive,
+rather than constrained e.g.@: by memory bandwidth.  This option
+implies @option{-pthread}, and thus is only supported on targets
+that have support for @option{-pthread}.
+
+@item -ftree-pta
+@opindex ftree-pta
+Perform function-local points-to analysis on trees.  This flag is
+enabled by default at @option{-O} and higher.
+
+@item -ftree-sra
+@opindex ftree-sra
+Perform scalar replacement of aggregates.  This pass replaces structure
+references with scalars to prevent committing structures to memory too
+early.  This flag is enabled by default at @option{-O} and higher.
+
+@item -ftree-copyrename
+@opindex ftree-copyrename
+Perform copy renaming on trees.  This pass attempts to rename compiler
+temporaries to other variables at copy locations, usually resulting in
+variable names which more closely resemble the original variables.  This flag
+is enabled by default at @option{-O} and higher.
+
+@item -ftree-ter
+@opindex ftree-ter
+Perform temporary expression replacement during the SSA->normal phase.  Single
+use/single def temporaries are replaced at their use location with their
+defining expression.  This results in non-GIMPLE code, but gives the expanders
+much more complex trees to work on resulting in better RTL generation.  This is
+enabled by default at @option{-O} and higher.
+
+@item -ftree-vectorize
+@opindex ftree-vectorize
+Perform loop vectorization on trees. This flag is enabled by default at
+@option{-O3}.
+
+@item -ftree-slp-vectorize
+@opindex ftree-slp-vectorize
+Perform basic block vectorization on trees. This flag is enabled by default at
+@option{-O3} and when @option{-ftree-vectorize} is enabled.
+
+@item -ftree-vect-loop-version
+@opindex ftree-vect-loop-version
+Perform loop versioning when doing loop vectorization on trees.  When a loop
+appears to be vectorizable except that data alignment or data dependence cannot
+be determined at compile time then vectorized and non-vectorized versions of
+the loop are generated along with runtime checks for alignment or dependence
+to control which version is executed.  This option is enabled by default
+except at level @option{-Os} where it is disabled.
+
+@item -fvect-cost-model
+@opindex fvect-cost-model
+Enable cost model for vectorization.
+
+@item -ftree-vrp
+@opindex ftree-vrp
+Perform Value Range Propagation on trees.  This is similar to the
+constant propagation pass, but instead of values, ranges of values are
+propagated.  This allows the optimizers to remove unnecessary range
+checks like array bound checks and null pointer checks.  This is
+enabled by default at @option{-O2} and higher.  Null pointer check
+elimination is only done if @option{-fdelete-null-pointer-checks} is
+enabled.
+
+@item -ftracer
+@opindex ftracer
+Perform tail duplication to enlarge superblock size.  This transformation
+simplifies the control flow of the function allowing other optimizations to do
+better job.
+
+@item -funroll-loops
+@opindex funroll-loops
+Unroll loops whose number of iterations can be determined at compile
+time or upon entry to the loop.  @option{-funroll-loops} implies
+@option{-frerun-cse-after-loop}.  This option makes code larger,
+and may or may not make it run faster.
+
+@item -funroll-all-loops
+@opindex funroll-all-loops
+Unroll all loops, even if their number of iterations is uncertain when
+the loop is entered.  This usually makes programs run more slowly.
+@option{-funroll-all-loops} implies the same options as
+@option{-funroll-loops},
+
+@item -fsplit-ivs-in-unroller
+@opindex fsplit-ivs-in-unroller
+Enables expressing of values of induction variables in later iterations
+of the unrolled loop using the value in the first iteration.  This breaks
+long dependency chains, thus improving efficiency of the scheduling passes.
+
+Combination of @option{-fweb} and CSE is often sufficient to obtain the
+same effect.  However in cases the loop body is more complicated than
+a single basic block, this is not reliable.  It also does not work at all
+on some of the architectures due to restrictions in the CSE pass.
+
+This optimization is enabled by default.
+
+@item -fvariable-expansion-in-unroller
+@opindex fvariable-expansion-in-unroller
+With this option, the compiler will create multiple copies of some
+local variables when unrolling a loop which can result in superior code.
+
+@item -fpartial-inlining
+@opindex fpartial-inlining
+Inline parts of functions.  This option has any effect only
+when inlining itself is turned on by the @option{-finline-functions}
+or @option{-finline-small-functions} options.
+
+Enabled at level @option{-O2}.
+
+@item -fpredictive-commoning
+@opindex fpredictive-commoning
+Perform predictive commoning optimization, i.e., reusing computations
+(especially memory loads and stores) performed in previous
+iterations of loops.
+
+This option is enabled at level @option{-O3}.
+
+@item -fprefetch-loop-arrays
+@opindex fprefetch-loop-arrays
+If supported by the target machine, generate instructions to prefetch
+memory to improve the performance of loops that access large arrays.
+
+This option may generate better or worse code; results are highly
+dependent on the structure of loops within the source code.
+
+Disabled at level @option{-Os}.
+
+@item -fno-peephole
+@itemx -fno-peephole2
+@opindex fno-peephole
+@opindex fno-peephole2
+Disable any machine-specific peephole optimizations.  The difference
+between @option{-fno-peephole} and @option{-fno-peephole2} is in how they
+are implemented in the compiler; some targets use one, some use the
+other, a few use both.
+
+@option{-fpeephole} is enabled by default.
+@option{-fpeephole2} enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -fno-guess-branch-probability
+@opindex fno-guess-branch-probability
+Do not guess branch probabilities using heuristics.
+
+GCC will use heuristics to guess branch probabilities if they are
+not provided by profiling feedback (@option{-fprofile-arcs}).  These
+heuristics are based on the control flow graph.  If some branch probabilities
+are specified by @samp{__builtin_expect}, then the heuristics will be
+used to guess branch probabilities for the rest of the control flow graph,
+taking the @samp{__builtin_expect} info into account.  The interactions
+between the heuristics and @samp{__builtin_expect} can be complex, and in
+some cases, it may be useful to disable the heuristics so that the effects
+of @samp{__builtin_expect} are easier to understand.
+
+The default is @option{-fguess-branch-probability} at levels
+@option{-O}, @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -freorder-blocks
+@opindex freorder-blocks
+Reorder basic blocks in the compiled function in order to reduce number of
+taken branches and improve code locality.
+
+Enabled at levels @option{-O2}, @option{-O3}.
+
+@item -freorder-blocks-and-partition
+@opindex freorder-blocks-and-partition
+In addition to reordering basic blocks in the compiled function, in order
+to reduce number of taken branches, partitions hot and cold basic blocks
+into separate sections of the assembly and .o files, to improve
+paging and cache locality performance.
+
+This optimization is automatically turned off in the presence of
+exception handling, for linkonce sections, for functions with a user-defined
+section attribute and on any architecture that does not support named
+sections.
+
+@item -freorder-functions
+@opindex freorder-functions
+Reorder functions in the object file in order to
+improve code locality.  This is implemented by using special
+subsections @code{.text.hot} for most frequently executed functions and
+@code{.text.unlikely} for unlikely executed functions.  Reordering is done by
+the linker so object file format must support named sections and linker must
+place them in a reasonable way.
+
+Also profile feedback must be available in to make this option effective.  See
+@option{-fprofile-arcs} for details.
+
+Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -fstrict-aliasing
+@opindex fstrict-aliasing
+Allow the compiler to assume the strictest aliasing rules applicable to
+the language being compiled.  For C (and C++), this activates
+optimizations based on the type of expressions.  In particular, an
+object of one type is assumed never to reside at the same address as an
+object of a different type, unless the types are almost the same.  For
+example, an @code{unsigned int} can alias an @code{int}, but not a
+@code{void*} or a @code{double}.  A character type may alias any other
+type.
+
+@anchor{Type-punning}Pay special attention to code like this:
+@smallexample
+union a_union @{
+  int i;
+  double d;
+@};
+
+int f() @{
+  union a_union t;
+  t.d = 3.0;
+  return t.i;
+@}
+@end smallexample
+The practice of reading from a different union member than the one most
+recently written to (called ``type-punning'') is common.  Even with
+@option{-fstrict-aliasing}, type-punning is allowed, provided the memory
+is accessed through the union type.  So, the code above will work as
+expected.  @xref{Structures unions enumerations and bit-fields
+implementation}.  However, this code might not:
+@smallexample
+int f() @{
+  union a_union t;
+  int* ip;
+  t.d = 3.0;
+  ip = &t.i;
+  return *ip;
+@}
+@end smallexample
+
+Similarly, access by taking the address, casting the resulting pointer
+and dereferencing the result has undefined behavior, even if the cast
+uses a union type, e.g.:
+@smallexample
+int f() @{
+  double d = 3.0;
+  return ((union a_union *) &d)->i;
+@}
+@end smallexample
+
+The @option{-fstrict-aliasing} option is enabled at levels
+@option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -fstrict-overflow
+@opindex fstrict-overflow
+Allow the compiler to assume strict signed overflow rules, depending
+on the language being compiled.  For C (and C++) this means that
+overflow when doing arithmetic with signed numbers is undefined, which
+means that the compiler may assume that it will not happen.  This
+permits various optimizations.  For example, the compiler will assume
+that an expression like @code{i + 10 > i} will always be true for
+signed @code{i}.  This assumption is only valid if signed overflow is
+undefined, as the expression is false if @code{i + 10} overflows when
+using twos complement arithmetic.  When this option is in effect any
+attempt to determine whether an operation on signed numbers will
+overflow must be written carefully to not actually involve overflow.
+
+This option also allows the compiler to assume strict pointer
+semantics: given a pointer to an object, if adding an offset to that
+pointer does not produce a pointer to the same object, the addition is
+undefined.  This permits the compiler to conclude that @code{p + u >
+p} is always true for a pointer @code{p} and unsigned integer
+@code{u}.  This assumption is only valid because pointer wraparound is
+undefined, as the expression is false if @code{p + u} overflows using
+twos complement arithmetic.
+
+See also the @option{-fwrapv} option.  Using @option{-fwrapv} means
+that integer signed overflow is fully defined: it wraps.  When
+@option{-fwrapv} is used, there is no difference between
+@option{-fstrict-overflow} and @option{-fno-strict-overflow} for
+integers.  With @option{-fwrapv} certain types of overflow are
+permitted.  For example, if the compiler gets an overflow when doing
+arithmetic on constants, the overflowed value can still be used with
+@option{-fwrapv}, but not otherwise.
+
+The @option{-fstrict-overflow} option is enabled at levels
+@option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -falign-functions
+@itemx -falign-functions=@var{n}
+@opindex falign-functions
+Align the start of functions to the next power-of-two greater than
+@var{n}, skipping up to @var{n} bytes.  For instance,
+@option{-falign-functions=32} aligns functions to the next 32-byte
+boundary, but @option{-falign-functions=24} would align to the next
+32-byte boundary only if this can be done by skipping 23 bytes or less.
+
+@option{-fno-align-functions} and @option{-falign-functions=1} are
+equivalent and mean that functions will not be aligned.
+
+Some assemblers only support this flag when @var{n} is a power of two;
+in that case, it is rounded up.
+
+If @var{n} is not specified or is zero, use a machine-dependent default.
+
+Enabled at levels @option{-O2}, @option{-O3}.
+
+@item -falign-labels
+@itemx -falign-labels=@var{n}
+@opindex falign-labels
+Align all branch targets to a power-of-two boundary, skipping up to
+@var{n} bytes like @option{-falign-functions}.  This option can easily
+make code slower, because it must insert dummy operations for when the
+branch target is reached in the usual flow of the code.
+
+@option{-fno-align-labels} and @option{-falign-labels=1} are
+equivalent and mean that labels will not be aligned.
+
+If @option{-falign-loops} or @option{-falign-jumps} are applicable and
+are greater than this value, then their values are used instead.
+
+If @var{n} is not specified or is zero, use a machine-dependent default
+which is very likely to be @samp{1}, meaning no alignment.
+
+Enabled at levels @option{-O2}, @option{-O3}.
+
+@item -falign-loops
+@itemx -falign-loops=@var{n}
+@opindex falign-loops
+Align loops to a power-of-two boundary, skipping up to @var{n} bytes
+like @option{-falign-functions}.  The hope is that the loop will be
+executed many times, which will make up for any execution of the dummy
+operations.
+
+@option{-fno-align-loops} and @option{-falign-loops=1} are
+equivalent and mean that loops will not be aligned.
+
+If @var{n} is not specified or is zero, use a machine-dependent default.
+
+Enabled at levels @option{-O2}, @option{-O3}.
+
+@item -falign-jumps
+@itemx -falign-jumps=@var{n}
+@opindex falign-jumps
+Align branch targets to a power-of-two boundary, for branch targets
+where the targets can only be reached by jumping, skipping up to @var{n}
+bytes like @option{-falign-functions}.  In this case, no dummy operations
+need be executed.
+
+@option{-fno-align-jumps} and @option{-falign-jumps=1} are
+equivalent and mean that loops will not be aligned.
+
+If @var{n} is not specified or is zero, use a machine-dependent default.
+
+Enabled at levels @option{-O2}, @option{-O3}.
+
+@item -funit-at-a-time
+@opindex funit-at-a-time
+This option is left for compatibility reasons. @option{-funit-at-a-time}
+has no effect, while @option{-fno-unit-at-a-time} implies
+@option{-fno-toplevel-reorder} and @option{-fno-section-anchors}.
+
+Enabled by default.
+
+@item -fno-toplevel-reorder
+@opindex fno-toplevel-reorder
+Do not reorder top-level functions, variables, and @code{asm}
+statements.  Output them in the same order that they appear in the
+input file.  When this option is used, unreferenced static variables
+will not be removed.  This option is intended to support existing code
+which relies on a particular ordering.  For new code, it is better to
+use attributes.
+
+Enabled at level @option{-O0}.  When disabled explicitly, it also imply
+@option{-fno-section-anchors} that is otherwise enabled at @option{-O0} on some
+targets.
+
+@item -fweb
+@opindex fweb
+Constructs webs as commonly used for register allocation purposes and assign
+each web individual pseudo register.  This allows the register allocation pass
+to operate on pseudos directly, but also strengthens several other optimization
+passes, such as CSE, loop optimizer and trivial dead code remover.  It can,
+however, make debugging impossible, since variables will no longer stay in a
+``home register''.
+
+Enabled by default with @option{-funroll-loops}.
+
+@item -fwhole-program
+@opindex fwhole-program
+Assume that the current compilation unit represents the whole program being
+compiled.  All public functions and variables with the exception of @code{main}
+and those merged by attribute @code{externally_visible} become static functions
+and in effect are optimized more aggressively by interprocedural optimizers. If @command{gold} is used as the linker plugin, @code{externally_visible} attributes are automatically added to functions (not variable yet due to a current @command{gold} issue) that are accessed outside of LTO objects according to resolution file produced by @command{gold}.  For other linkers that cannot generate resolution file, explicit @code{externally_visible} attributes are still necessary.
+While this option is equivalent to proper use of the @code{static} keyword for
+programs consisting of a single file, in combination with option
+@option{-flto} this flag can be used to
+compile many smaller scale programs since the functions and variables become
+local for the whole combined compilation unit, not for the single source file
+itself.
+
+This option implies @option{-fwhole-file} for Fortran programs.
+
+@item -flto[=@var{n}]
+@opindex flto
+This option runs the standard link-time optimizer.  When invoked
+with source code, it generates GIMPLE (one of GCC's internal
+representations) and writes it to special ELF sections in the object
+file.  When the object files are linked together, all the function
+bodies are read from these ELF sections and instantiated as if they
+had been part of the same translation unit.
+
+To use the link-time optimizer, @option{-flto} needs to be specified at
+compile time and during the final link.  For example:
+
+@smallexample
+gcc -c -O2 -flto foo.c
+gcc -c -O2 -flto bar.c
+gcc -o myprog -flto -O2 foo.o bar.o
+@end smallexample
+
+The first two invocations to GCC save a bytecode representation
+of GIMPLE into special ELF sections inside @file{foo.o} and
+@file{bar.o}.  The final invocation reads the GIMPLE bytecode from
+@file{foo.o} and @file{bar.o}, merges the two files into a single
+internal image, and compiles the result as usual.  Since both
+@file{foo.o} and @file{bar.o} are merged into a single image, this
+causes all the interprocedural analyses and optimizations in GCC to
+work across the two files as if they were a single one.  This means,
+for example, that the inliner is able to inline functions in
+@file{bar.o} into functions in @file{foo.o} and vice-versa.
+
+Another (simpler) way to enable link-time optimization is:
+
+@smallexample
+gcc -o myprog -flto -O2 foo.c bar.c
+@end smallexample
+
+The above generates bytecode for @file{foo.c} and @file{bar.c},
+merges them together into a single GIMPLE representation and optimizes
+them as usual to produce @file{myprog}.
+
+The only important thing to keep in mind is that to enable link-time
+optimizations the @option{-flto} flag needs to be passed to both the
+compile and the link commands.
+
+To make whole program optimization effective, it is necessary to make
+certain whole program assumptions.  The compiler needs to know
+what functions and variables can be accessed by libraries and runtime
+outside of the link-time optimized unit.  When supported by the linker,
+the linker plugin (see @option{-fuse-linker-plugin}) passes information
+to the compiler about used and externally visible symbols.  When
+the linker plugin is not available, @option{-fwhole-program} should be
+used to allow the compiler to make these assumptions, which leads
+to more aggressive optimization decisions.
+
+Note that when a file is compiled with @option{-flto}, the generated
+object file is larger than a regular object file because it 
+contains GIMPLE bytecodes and the usual final code.  This means that
+object files with LTO information can be linked as normal object
+files; if @option{-flto} is not passed to the linker, no
+interprocedural optimizations are applied.
+
+Additionally, the optimization flags used to compile individual files
+are not necessarily related to those used at link time.  For instance,
+
+@smallexample
+gcc -c -O0 -flto foo.c
+gcc -c -O0 -flto bar.c
+gcc -o myprog -flto -O3 foo.o bar.o
+@end smallexample
+
+This produces individual object files with unoptimized assembler
+code, but the resulting binary @file{myprog} is optimized at
+@option{-O3}.  If, instead, the final binary is generated without
+@option{-flto}, then @file{myprog} is not optimized.
+
+When producing the final binary with @option{-flto}, GCC only
+applies link-time optimizations to those files that contain bytecode.
+Therefore, you can mix and match object files and libraries with
+GIMPLE bytecodes and final object code.  GCC automatically selects
+which files to optimize in LTO mode and which files to link without
+further processing.
+
+There are some code generation flags that GCC preserves when
+generating bytecodes, as they need to be used during the final link
+stage.  Currently, the following options are saved into the GIMPLE
+bytecode files: @option{-fPIC}, @option{-fcommon} and all the
+@option{-m} target flags.
+
+At link time, these options are read in and reapplied.  Note that the
+current implementation makes no attempt to recognize conflicting
+values for these options.  If different files have conflicting option
+values (e.g., one file is compiled with @option{-fPIC} and another
+isn't), the compiler simply uses the last value read from the
+bytecode files.  It is recommended, then, that you compile all the files
+participating in the same link with the same options.
+
+If LTO encounters objects with C linkage declared with incompatible
+types in separate translation units to be linked together (undefined
+behavior according to ISO C99 6.2.7), a non-fatal diagnostic may be
+issued.  The behavior is still undefined at runtime.
+
+Another feature of LTO is that it is possible to apply interprocedural
+optimizations on files written in different languages.  This requires
+support in the language front end.  Currently, the C, C++ and
+Fortran front ends are capable of emitting GIMPLE bytecodes, so
+something like this should work:
+
+@smallexample
+gcc -c -flto foo.c
+g++ -c -flto bar.cc
+gfortran -c -flto baz.f90
+g++ -o myprog -flto -O3 foo.o bar.o baz.o -lgfortran
+@end smallexample
+
+Notice that the final link is done with @command{g++} to get the C++
+runtime libraries and @option{-lgfortran} is added to get the Fortran
+runtime libraries.  In general, when mixing languages in LTO mode, you
+should use the same link command options as when mixing languages in a
+regular (non-LTO) compilation; all you need to add is @option{-flto} to
+all the compile and link commands.
+
+If object files containing GIMPLE bytecode are stored in a library archive, say
+@file{libfoo.a}, it is possible to extract and use them in an LTO link if you
+are using a linker with plugin support.  To enable this feature, use
+the flag @option{-fuse-linker-plugin} at link time:
+
+@smallexample
+gcc -o myprog -O2 -flto -fuse-linker-plugin a.o b.o -lfoo
+@end smallexample
+
+With the linker plugin enabled, the linker extracts the needed
+GIMPLE files from @file{libfoo.a} and passes them on to the running GCC
+to make them part of the aggregated GIMPLE image to be optimized.
+
+If you are not using a linker with plugin support and/or do not
+enable the linker plugin, then the objects inside @file{libfoo.a}
+are extracted and linked as usual, but they do not participate
+in the LTO optimization process.
+
+Link-time optimizations do not require the presence of the whole program to
+operate.  If the program does not require any symbols to be exported, it is
+possible to combine @option{-flto} and @option{-fwhole-program} to allow
+the interprocedural optimizers to use more aggressive assumptions which may
+lead to improved optimization opportunities. 
+Use of @option{-fwhole-program} is not needed when linker plugin is
+active (see @option{-fuse-linker-plugin}).
+
+The current implementation of LTO makes no
+attempt to generate bytecode that is portable between different
+types of hosts.  The bytecode files are versioned and there is a
+strict version check, so bytecode files generated in one version of
+GCC will not work with an older/newer version of GCC.
+
+Link-time optimization does not work well with generation of debugging
+information.  Combining @option{-flto} with
+@option{-g} is currently experimental and expected to produce wrong
+results.
+
+If you specify the optional @var{n}, the optimization and code
+generation done at link time is executed in parallel using @var{n}
+parallel jobs by utilizing an installed @command{make} program.  The
+environment variable @env{MAKE} may be used to override the program
+used.  The default value for @var{n} is 1.
+
+You can also specify @option{-flto=jobserver} to use GNU make's 
+job server mode to determine the number of parallel jobs. This 
+is useful when the Makefile calling GCC is already executing in parallel.
+You must prepend a @samp{+} to the command recipe in the parent Makefile
+for this to work.  This option likely only works if @env{MAKE} is
+GNU make.
+
+This option is disabled by default.
+
+@item -flto-partition=@var{alg}
+@opindex flto-partition
+Specify the partitioning algorithm used by the link-time optimizer.
+The value is either @code{1to1} to specify a partitioning mirroring
+the original source files or @code{balanced} to specify partitioning
+into equally sized chunks (whenever possible).  Specifying @code{none}
+as an algorithm disables partitioning and streaming completely. The
+default value is @code{balanced}.
+
+@item -flto-compression-level=@var{n}
+This option specifies the level of compression used for intermediate
+language written to LTO object files, and is only meaningful in
+conjunction with LTO mode (@option{-flto}).  Valid
+values are 0 (no compression) to 9 (maximum compression).  Values
+outside this range are clamped to either 0 or 9.  If the option is not
+given, a default balanced compression setting is used.
+
+@item -flto-report
+Prints a report with internal details on the workings of the link-time
+optimizer.  The contents of this report vary from version to version.
+It is meant to be useful to GCC developers when processing object
+files in LTO mode (via @option{-flto}).
+
+Disabled by default.
+
+@item -fuse-linker-plugin
+Enables the use of a linker plugin during link-time optimization.  This
+option relies on the linker plugin support in linker that is available in gold
+or in GNU ld 2.21 or newer.
+
+This option enables the extraction of object files with GIMPLE bytecode out
+of library archives. This improves the quality of optimization by exposing
+more code to the link-time optimizer.  This information specifies what
+symbols can be accessed externally (by non-LTO object or during dynamic
+linking).  Resulting code quality improvements on binaries (and shared
+libraries that use hidden visibility) are similar to @code{-fwhole-program}.
+See @option{-flto} for a description of the effect of this flag and how to
+use it.
+
+This option is enabled by default when LTO support in GCC is enabled
+and GCC was configured for use with
+a linker supporting plugins (GNU ld 2.21 or newer or gold).
+
+@item -fcompare-elim
+@opindex fcompare-elim
+After register allocation and post-register allocation instruction splitting,
+identify arithmetic instructions that compute processor flags similar to a
+comparison operation based on that arithmetic.  If possible, eliminate the
+explicit comparison operation.
+
+This pass only applies to certain targets that cannot explicitly represent
+the comparison operation before register allocation is complete.
+
+Enabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -fcprop-registers
+@opindex fcprop-registers
+After register allocation and post-register allocation instruction splitting,
+we perform a copy-propagation pass to try to reduce scheduling dependencies
+and occasionally eliminate the copy.
+
+Enabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -fprofile-correction
+@opindex fprofile-correction
+Profiles collected using an instrumented binary for multi-threaded programs may
+be inconsistent due to missed counter updates. When this option is specified,
+GCC will use heuristics to correct or smooth out such inconsistencies. By
+default, GCC will emit an error message when an inconsistent profile is detected.
+
+@item -fprofile-dir=@var{path}
+@opindex fprofile-dir
+
+Set the directory to search for the profile data files in to @var{path}.
+This option affects only the profile data generated by
+@option{-fprofile-generate}, @option{-ftest-coverage}, @option{-fprofile-arcs}
+and used by @option{-fprofile-use} and @option{-fbranch-probabilities}
+and its related options.
+By default, GCC will use the current directory as @var{path}, thus the
+profile data file will appear in the same directory as the object file.
+
+@item -fprofile-generate
+@itemx -fprofile-generate=@var{path}
+@opindex fprofile-generate
+
+Enable options usually used for instrumenting application to produce
+profile useful for later recompilation with profile feedback based
+optimization.  You must use @option{-fprofile-generate} both when
+compiling and when linking your program.
+
+The following options are enabled: @code{-fprofile-arcs}, @code{-fprofile-values}, @code{-fvpt}.
+
+If @var{path} is specified, GCC will look at the @var{path} to find
+the profile feedback data files. See @option{-fprofile-dir}.
+
+@item -fprofile-use
+@itemx -fprofile-use=@var{path}
+@opindex fprofile-use
+Enable profile feedback directed optimizations, and optimizations
+generally profitable only with profile feedback available.
+
+The following options are enabled: @code{-fbranch-probabilities}, @code{-fvpt},
+@code{-funroll-loops}, @code{-fpeel-loops}, @code{-ftracer}
+
+By default, GCC emits an error message if the feedback profiles do not
+match the source code.  This error can be turned into a warning by using
+@option{-Wcoverage-mismatch}.  Note this may result in poorly optimized
+code.
+
+If @var{path} is specified, GCC will look at the @var{path} to find
+the profile feedback data files. See @option{-fprofile-dir}.
+@end table
+
+The following options control compiler behavior regarding floating
+point arithmetic.  These options trade off between speed and
+correctness.  All must be specifically enabled.
+
+@table @gcctabopt
+@item -ffloat-store
+@opindex ffloat-store
+Do not store floating point variables in registers, and inhibit other
+options that might change whether a floating point value is taken from a
+register or memory.
+
+@cindex floating point precision
+This option prevents undesirable excess precision on machines such as
+the 68000 where the floating registers (of the 68881) keep more
+precision than a @code{double} is supposed to have.  Similarly for the
+x86 architecture.  For most programs, the excess precision does only
+good, but a few programs rely on the precise definition of IEEE floating
+point.  Use @option{-ffloat-store} for such programs, after modifying
+them to store all pertinent intermediate computations into variables.
+
+@item -fexcess-precision=@var{style}
+@opindex fexcess-precision
+This option allows further control over excess precision on machines
+where floating-point registers have more precision than the IEEE
+@code{float} and @code{double} types and the processor does not
+support operations rounding to those types.  By default,
+@option{-fexcess-precision=fast} is in effect; this means that
+operations are carried out in the precision of the registers and that
+it is unpredictable when rounding to the types specified in the source
+code takes place.  When compiling C, if
+@option{-fexcess-precision=standard} is specified then excess
+precision will follow the rules specified in ISO C99; in particular,
+both casts and assignments cause values to be rounded to their
+semantic types (whereas @option{-ffloat-store} only affects
+assignments).  This option is enabled by default for C if a strict
+conformance option such as @option{-std=c99} is used.
+
+@opindex mfpmath
+@option{-fexcess-precision=standard} is not implemented for languages
+other than C, and has no effect if
+@option{-funsafe-math-optimizations} or @option{-ffast-math} is
+specified.  On the x86, it also has no effect if @option{-mfpmath=sse}
+or @option{-mfpmath=sse+387} is specified; in the former case, IEEE
+semantics apply without excess precision, and in the latter, rounding
+is unpredictable.
+
+@item -ffast-math
+@opindex ffast-math
+Sets @option{-fno-math-errno}, @option{-funsafe-math-optimizations},
+@option{-ffinite-math-only}, @option{-fno-rounding-math},
+@option{-fno-signaling-nans} and @option{-fcx-limited-range}.
+
+This option causes the preprocessor macro @code{__FAST_MATH__} to be defined.
+
+This option is not turned on by any @option{-O} option besides
+@option{-Ofast} since it can result in incorrect output for programs
+which depend on an exact implementation of IEEE or ISO rules/specifications
+for math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+
+@item -fno-math-errno
+@opindex fno-math-errno
+Do not set ERRNO after calling math functions that are executed
+with a single instruction, e.g., sqrt.  A program that relies on
+IEEE exceptions for math error handling may want to use this flag
+for speed while maintaining IEEE arithmetic compatibility.
+
+This option is not turned on by any @option{-O} option since
+it can result in incorrect output for programs which depend on
+an exact implementation of IEEE or ISO rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+
+The default is @option{-fmath-errno}.
+
+On Darwin systems, the math library never sets @code{errno}.  There is
+therefore no reason for the compiler to consider the possibility that
+it might, and @option{-fno-math-errno} is the default.
+
+@item -funsafe-math-optimizations
+@opindex funsafe-math-optimizations
+
+Allow optimizations for floating-point arithmetic that (a) assume
+that arguments and results are valid and (b) may violate IEEE or
+ANSI standards.  When used at link-time, it may include libraries
+or startup files that change the default FPU control word or other
+similar optimizations.
+
+This option is not turned on by any @option{-O} option since
+it can result in incorrect output for programs which depend on
+an exact implementation of IEEE or ISO rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+Enables @option{-fno-signed-zeros}, @option{-fno-trapping-math},
+@option{-fassociative-math} and @option{-freciprocal-math}.
+
+The default is @option{-fno-unsafe-math-optimizations}.
+
+@item -fassociative-math
+@opindex fassociative-math
+
+Allow re-association of operands in series of floating-point operations.
+This violates the ISO C and C++ language standard by possibly changing
+computation result.  NOTE: re-ordering may change the sign of zero as
+well as ignore NaNs and inhibit or create underflow or overflow (and
+thus cannot be used on a code which relies on rounding behavior like
+@code{(x + 2**52) - 2**52)}.  May also reorder floating-point comparisons
+and thus may not be used when ordered comparisons are required.
+This option requires that both @option{-fno-signed-zeros} and
+@option{-fno-trapping-math} be in effect.  Moreover, it doesn't make
+much sense with @option{-frounding-math}. For Fortran the option
+is automatically enabled when both @option{-fno-signed-zeros} and
+@option{-fno-trapping-math} are in effect.
+
+The default is @option{-fno-associative-math}.
+
+@item -freciprocal-math
+@opindex freciprocal-math
+
+Allow the reciprocal of a value to be used instead of dividing by
+the value if this enables optimizations.  For example @code{x / y}
+can be replaced with @code{x * (1/y)} which is useful if @code{(1/y)}
+is subject to common subexpression elimination.  Note that this loses
+precision and increases the number of flops operating on the value.
+
+The default is @option{-fno-reciprocal-math}.
+
+@item -ffinite-math-only
+@opindex ffinite-math-only
+Allow optimizations for floating-point arithmetic that assume
+that arguments and results are not NaNs or +-Infs.
+
+This option is not turned on by any @option{-O} option since
+it can result in incorrect output for programs which depend on
+an exact implementation of IEEE or ISO rules/specifications for
+math functions. It may, however, yield faster code for programs
+that do not require the guarantees of these specifications.
+
+The default is @option{-fno-finite-math-only}.
+
+@item -fno-signed-zeros
+@opindex fno-signed-zeros
+Allow optimizations for floating point arithmetic that ignore the
+signedness of zero.  IEEE arithmetic specifies the behavior of
+distinct +0.0 and @minus{}0.0 values, which then prohibits simplification
+of expressions such as x+0.0 or 0.0*x (even with @option{-ffinite-math-only}).
+This option implies that the sign of a zero result isn't significant.
+
+The default is @option{-fsigned-zeros}.
+
+@item -fno-trapping-math
+@opindex fno-trapping-math
+Compile code assuming that floating-point operations cannot generate
+user-visible traps.  These traps include division by zero, overflow,
+underflow, inexact result and invalid operation.  This option requires
+that @option{-fno-signaling-nans} be in effect.  Setting this option may
+allow faster code if one relies on ``non-stop'' IEEE arithmetic, for example.
+
+This option should never be turned on by any @option{-O} option since
+it can result in incorrect output for programs which depend on
+an exact implementation of IEEE or ISO rules/specifications for
+math functions.
+
+The default is @option{-ftrapping-math}.
+
+@item -frounding-math
+@opindex frounding-math
+Disable transformations and optimizations that assume default floating
+point rounding behavior.  This is round-to-zero for all floating point
+to integer conversions, and round-to-nearest for all other arithmetic
+truncations.  This option should be specified for programs that change
+the FP rounding mode dynamically, or that may be executed with a
+non-default rounding mode.  This option disables constant folding of
+floating point expressions at compile-time (which may be affected by
+rounding mode) and arithmetic transformations that are unsafe in the
+presence of sign-dependent rounding modes.
+
+The default is @option{-fno-rounding-math}.
+
+This option is experimental and does not currently guarantee to
+disable all GCC optimizations that are affected by rounding mode.
+Future versions of GCC may provide finer control of this setting
+using C99's @code{FENV_ACCESS} pragma.  This command line option
+will be used to specify the default state for @code{FENV_ACCESS}.
+
+@item -fsignaling-nans
+@opindex fsignaling-nans
+Compile code assuming that IEEE signaling NaNs may generate user-visible
+traps during floating-point operations.  Setting this option disables
+optimizations that may change the number of exceptions visible with
+signaling NaNs.  This option implies @option{-ftrapping-math}.
+
+This option causes the preprocessor macro @code{__SUPPORT_SNAN__} to
+be defined.
+
+The default is @option{-fno-signaling-nans}.
+
+This option is experimental and does not currently guarantee to
+disable all GCC optimizations that affect signaling NaN behavior.
+
+@item -fsingle-precision-constant
+@opindex fsingle-precision-constant
+Treat floating point constant as single precision constant instead of
+implicitly converting it to double precision constant.
+
+@item -fcx-limited-range
+@opindex fcx-limited-range
+When enabled, this option states that a range reduction step is not
+needed when performing complex division.  Also, there is no checking
+whether the result of a complex multiplication or division is @code{NaN
++ I*NaN}, with an attempt to rescue the situation in that case.  The
+default is @option{-fno-cx-limited-range}, but is enabled by
+@option{-ffast-math}.
+
+This option controls the default setting of the ISO C99
+@code{CX_LIMITED_RANGE} pragma.  Nevertheless, the option applies to
+all languages.
+
+@item -fcx-fortran-rules
+@opindex fcx-fortran-rules
+Complex multiplication and division follow Fortran rules.  Range
+reduction is done as part of complex division, but there is no checking
+whether the result of a complex multiplication or division is @code{NaN
++ I*NaN}, with an attempt to rescue the situation in that case.
+
+The default is @option{-fno-cx-fortran-rules}.
+
+@end table
+
+The following options control optimizations that may improve
+performance, but are not enabled by any @option{-O} options.  This
+section includes experimental options that may produce broken code.
+
+@table @gcctabopt
+@item -fbranch-probabilities
+@opindex fbranch-probabilities
+After running a program compiled with @option{-fprofile-arcs}
+(@pxref{Debugging Options,, Options for Debugging Your Program or
+@command{gcc}}), you can compile it a second time using
+@option{-fbranch-probabilities}, to improve optimizations based on
+the number of times each branch was taken.  When the program
+compiled with @option{-fprofile-arcs} exits it saves arc execution
+counts to a file called @file{@var{sourcename}.gcda} for each source
+file.  The information in this data file is very dependent on the
+structure of the generated code, so you must use the same source code
+and the same optimization options for both compilations.
+
+With @option{-fbranch-probabilities}, GCC puts a
+@samp{REG_BR_PROB} note on each @samp{JUMP_INSN} and @samp{CALL_INSN}.
+These can be used to improve optimization.  Currently, they are only
+used in one place: in @file{reorg.c}, instead of guessing which path a
+branch is most likely to take, the @samp{REG_BR_PROB} values are used to
+exactly determine which path is taken more often.
+
+@item -fprofile-values
+@opindex fprofile-values
+If combined with @option{-fprofile-arcs}, it adds code so that some
+data about values of expressions in the program is gathered.
+
+With @option{-fbranch-probabilities}, it reads back the data gathered
+from profiling values of expressions for usage in optimizations.
+
+Enabled with @option{-fprofile-generate} and @option{-fprofile-use}.
+
+@item -fvpt
+@opindex fvpt
+If combined with @option{-fprofile-arcs}, it instructs the compiler to add
+a code to gather information about values of expressions.
+
+With @option{-fbranch-probabilities}, it reads back the data gathered
+and actually performs the optimizations based on them.
+Currently the optimizations include specialization of division operation
+using the knowledge about the value of the denominator.
+
+@item -frename-registers
+@opindex frename-registers
+Attempt to avoid false dependencies in scheduled code by making use
+of registers left over after register allocation.  This optimization
+will most benefit processors with lots of registers.  Depending on the
+debug information format adopted by the target, however, it can
+make debugging impossible, since variables will no longer stay in
+a ``home register''.
+
+Enabled by default with @option{-funroll-loops} and @option{-fpeel-loops}.
+
+@item -ftracer
+@opindex ftracer
+Perform tail duplication to enlarge superblock size.  This transformation
+simplifies the control flow of the function allowing other optimizations to do
+better job.
+
+Enabled with @option{-fprofile-use}.
+
+@item -funroll-loops
+@opindex funroll-loops
+Unroll loops whose number of iterations can be determined at compile time or
+upon entry to the loop.  @option{-funroll-loops} implies
+@option{-frerun-cse-after-loop}, @option{-fweb} and @option{-frename-registers}.
+It also turns on complete loop peeling (i.e.@: complete removal of loops with
+small constant number of iterations).  This option makes code larger, and may
+or may not make it run faster.
+
+Enabled with @option{-fprofile-use}.
+
+@item -funroll-all-loops
+@opindex funroll-all-loops
+Unroll all loops, even if their number of iterations is uncertain when
+the loop is entered.  This usually makes programs run more slowly.
+@option{-funroll-all-loops} implies the same options as
+@option{-funroll-loops}.
+
+@item -fpeel-loops
+@opindex fpeel-loops
+Peels the loops for that there is enough information that they do not
+roll much (from profile feedback).  It also turns on complete loop peeling
+(i.e.@: complete removal of loops with small constant number of iterations).
+
+Enabled with @option{-fprofile-use}.
+
+@item -fmove-loop-invariants
+@opindex fmove-loop-invariants
+Enables the loop invariant motion pass in the RTL loop optimizer.  Enabled
+at level @option{-O1}
+
+@item -funswitch-loops
+@opindex funswitch-loops
+Move branches with loop invariant conditions out of the loop, with duplicates
+of the loop on both branches (modified according to result of the condition).
+
+@item -ffunction-sections
+@itemx -fdata-sections
+@opindex ffunction-sections
+@opindex fdata-sections
+Place each function or data item into its own section in the output
+file if the target supports arbitrary sections.  The name of the
+function or the name of the data item determines the section's name
+in the output file.
+
+Use these options on systems where the linker can perform optimizations
+to improve locality of reference in the instruction space.  Most systems
+using the ELF object format and SPARC processors running Solaris 2 have
+linkers with such optimizations.  AIX may have these optimizations in
+the future.
+
+Only use these options when there are significant benefits from doing
+so.  When you specify these options, the assembler and linker will
+create larger object and executable files and will also be slower.
+You will not be able to use @code{gprof} on all systems if you
+specify this option and you may have problems with debugging if
+you specify both this option and @option{-g}.
+
+@item -fbranch-target-load-optimize
+@opindex fbranch-target-load-optimize
+Perform branch target register load optimization before prologue / epilogue
+threading.
+The use of target registers can typically be exposed only during reload,
+thus hoisting loads out of loops and doing inter-block scheduling needs
+a separate optimization pass.
+
+@item -fbranch-target-load-optimize2
+@opindex fbranch-target-load-optimize2
+Perform branch target register load optimization after prologue / epilogue
+threading.
+
+@item -fbtr-bb-exclusive
+@opindex fbtr-bb-exclusive
+When performing branch target register load optimization, don't reuse
+branch target registers in within any basic block.
+
+@item -fstack-protector
+@opindex fstack-protector
+Emit extra code to check for buffer overflows, such as stack smashing
+attacks.  This is done by adding a guard variable to functions with
+vulnerable objects.  This includes functions that call alloca, and
+functions with buffers larger than 8 bytes.  The guards are initialized
+when a function is entered and then checked when the function exits.
+If a guard check fails, an error message is printed and the program exits.
+
+@item -fstack-protector-all
+@opindex fstack-protector-all
+Like @option{-fstack-protector} except that all functions are protected.
+
+@item -fsection-anchors
+@opindex fsection-anchors
+Try to reduce the number of symbolic address calculations by using
+shared ``anchor'' symbols to address nearby objects.  This transformation
+can help to reduce the number of GOT entries and GOT accesses on some
+targets.
+
+For example, the implementation of the following function @code{foo}:
+
+@smallexample
+static int a, b, c;
+int foo (void) @{ return a + b + c; @}
+@end smallexample
+
+would usually calculate the addresses of all three variables, but if you
+compile it with @option{-fsection-anchors}, it will access the variables
+from a common anchor point instead.  The effect is similar to the
+following pseudocode (which isn't valid C):
+
+@smallexample
+int foo (void)
+@{
+  register int *xr = &x;
+  return xr[&a - &x] + xr[&b - &x] + xr[&c - &x];
+@}
+@end smallexample
+
+Not all targets support this option.
+
+@item --param @var{name}=@var{value}
+@opindex param
+In some places, GCC uses various constants to control the amount of
+optimization that is done.  For example, GCC will not inline functions
+that contain more that a certain number of instructions.  You can
+control some of these constants on the command-line using the
+@option{--param} option.
+
+The names of specific parameters, and the meaning of the values, are
+tied to the internals of the compiler, and are subject to change
+without notice in future releases.
+
+In each case, the @var{value} is an integer.  The allowable choices for
+@var{name} are given in the following table:
+
+@table @gcctabopt
+@item struct-reorg-cold-struct-ratio
+The threshold ratio (as a percentage) between a structure frequency
+and the frequency of the hottest structure in the program.  This parameter
+is used by struct-reorg optimization enabled by @option{-fipa-struct-reorg}.
+We say that if the ratio of a structure frequency, calculated by profiling,
+to the hottest structure frequency in the program is less than this
+parameter, then structure reorganization is not applied to this structure.
+The default is 10.
+
+@item predictable-branch-outcome
+When branch is predicted to be taken with probability lower than this threshold
+(in percent), then it is considered well predictable. The default is 10.
+
+@item max-crossjump-edges
+The maximum number of incoming edges to consider for crossjumping.
+The algorithm used by @option{-fcrossjumping} is @math{O(N^2)} in
+the number of edges incoming to each block.  Increasing values mean
+more aggressive optimization, making the compile time increase with
+probably small improvement in executable size.
+
+@item min-crossjump-insns
+The minimum number of instructions which must be matched at the end
+of two blocks before crossjumping will be performed on them.  This
+value is ignored in the case where all instructions in the block being
+crossjumped from are matched.  The default value is 5.
+
+@item max-grow-copy-bb-insns
+The maximum code size expansion factor when copying basic blocks
+instead of jumping.  The expansion is relative to a jump instruction.
+The default value is 8.
+
+@item max-goto-duplication-insns
+The maximum number of instructions to duplicate to a block that jumps
+to a computed goto.  To avoid @math{O(N^2)} behavior in a number of
+passes, GCC factors computed gotos early in the compilation process,
+and unfactors them as late as possible.  Only computed jumps at the
+end of a basic blocks with no more than max-goto-duplication-insns are
+unfactored.  The default value is 8.
+
+@item max-delay-slot-insn-search
+The maximum number of instructions to consider when looking for an
+instruction to fill a delay slot.  If more than this arbitrary number of
+instructions is searched, the time savings from filling the delay slot
+will be minimal so stop searching.  Increasing values mean more
+aggressive optimization, making the compile time increase with probably
+small improvement in executable run time.
+
+@item max-delay-slot-live-search
+When trying to fill delay slots, the maximum number of instructions to
+consider when searching for a block with valid live register
+information.  Increasing this arbitrarily chosen value means more
+aggressive optimization, increasing the compile time.  This parameter
+should be removed when the delay slot code is rewritten to maintain the
+control-flow graph.
+
+@item max-gcse-memory
+The approximate maximum amount of memory that will be allocated in
+order to perform the global common subexpression elimination
+optimization.  If more memory than specified is required, the
+optimization will not be done.
+
+@item max-gcse-insertion-ratio
+If the ratio of expression insertions to deletions is larger than this value
+for any expression, then RTL PRE will insert or remove the expression and thus
+leave partially redundant computations in the instruction stream.  The default value is 20.
+
+@item max-pending-list-length
+The maximum number of pending dependencies scheduling will allow
+before flushing the current state and starting over.  Large functions
+with few branches or calls can create excessively large lists which
+needlessly consume memory and resources.
+
+@item max-inline-insns-single
+Several parameters control the tree inliner used in gcc.
+This number sets the maximum number of instructions (counted in GCC's
+internal representation) in a single function that the tree inliner
+will consider for inlining.  This only affects functions declared
+inline and methods implemented in a class declaration (C++).
+The default value is 400.
+
+@item max-inline-insns-auto
+When you use @option{-finline-functions} (included in @option{-O3}),
+a lot of functions that would otherwise not be considered for inlining
+by the compiler will be investigated.  To those functions, a different
+(more restrictive) limit compared to functions declared inline can
+be applied.
+The default value is 40.
+
+@item large-function-insns
+The limit specifying really large functions.  For functions larger than this
+limit after inlining, inlining is constrained by
+@option{--param large-function-growth}.  This parameter is useful primarily
+to avoid extreme compilation time caused by non-linear algorithms used by the
+backend.
+The default value is 2700.
+
+@item large-function-growth
+Specifies maximal growth of large function caused by inlining in percents.
+The default value is 100 which limits large function growth to 2.0 times
+the original size.
+
+@item large-unit-insns
+The limit specifying large translation unit.  Growth caused by inlining of
+units larger than this limit is limited by @option{--param inline-unit-growth}.
+For small units this might be too tight (consider unit consisting of function A
+that is inline and B that just calls A three time.  If B is small relative to
+A, the growth of unit is 300\% and yet such inlining is very sane.  For very
+large units consisting of small inlineable functions however the overall unit
+growth limit is needed to avoid exponential explosion of code size.  Thus for
+smaller units, the size is increased to @option{--param large-unit-insns}
+before applying @option{--param inline-unit-growth}.  The default is 10000
+
+@item inline-unit-growth
+Specifies maximal overall growth of the compilation unit caused by inlining.
+The default value is 30 which limits unit growth to 1.3 times the original
+size.
+
+@item ipcp-unit-growth
+Specifies maximal overall growth of the compilation unit caused by
+interprocedural constant propagation.  The default value is 10 which limits
+unit growth to 1.1 times the original size.
+
+@item large-stack-frame
+The limit specifying large stack frames.  While inlining the algorithm is trying
+to not grow past this limit too much.  Default value is 256 bytes.
+
+@item large-stack-frame-growth
+Specifies maximal growth of large stack frames caused by inlining in percents.
+The default value is 1000 which limits large stack frame growth to 11 times
+the original size.
+
+@item max-inline-insns-recursive
+@itemx max-inline-insns-recursive-auto
+Specifies maximum number of instructions out-of-line copy of self recursive inline
+function can grow into by performing recursive inlining.
+
+For functions declared inline @option{--param max-inline-insns-recursive} is
+taken into account.  For function not declared inline, recursive inlining
+happens only when @option{-finline-functions} (included in @option{-O3}) is
+enabled and @option{--param max-inline-insns-recursive-auto} is used.  The
+default value is 450.
+
+@item max-inline-recursive-depth
+@itemx max-inline-recursive-depth-auto
+Specifies maximum recursion depth used by the recursive inlining.
+
+For functions declared inline @option{--param max-inline-recursive-depth} is
+taken into account.  For function not declared inline, recursive inlining
+happens only when @option{-finline-functions} (included in @option{-O3}) is
+enabled and @option{--param max-inline-recursive-depth-auto} is used.  The
+default value is 8.
+
+@item min-inline-recursive-probability
+Recursive inlining is profitable only for function having deep recursion
+in average and can hurt for function having little recursion depth by
+increasing the prologue size or complexity of function body to other
+optimizers.
+
+When profile feedback is available (see @option{-fprofile-generate}) the actual
+recursion depth can be guessed from probability that function will recurse via
+given call expression.  This parameter limits inlining only to call expression
+whose probability exceeds given threshold (in percents).  The default value is
+10.
+
+@item early-inlining-insns
+Specify growth that early inliner can make.  In effect it increases amount of
+inlining for code having large abstraction penalty.  The default value is 10.
+
+@item max-early-inliner-iterations
+@itemx max-early-inliner-iterations
+Limit of iterations of early inliner.  This basically bounds number of nested
+indirect calls early inliner can resolve.  Deeper chains are still handled by
+late inlining.
+
+@item comdat-sharing-probability
+@itemx comdat-sharing-probability
+Probability (in percent) that C++ inline function with comdat visibility
+will be shared across multiple compilation units.  The default value is 20.
+
+@item min-vect-loop-bound
+The minimum number of iterations under which a loop will not get vectorized
+when @option{-ftree-vectorize} is used.  The number of iterations after
+vectorization needs to be greater than the value specified by this option
+to allow vectorization.  The default value is 0.
+
+@item gcse-cost-distance-ratio
+Scaling factor in calculation of maximum distance an expression
+can be moved by GCSE optimizations.  This is currently supported only in the
+code hoisting pass.  The bigger the ratio, the more aggressive code hoisting
+will be with simple expressions, i.e., the expressions which have cost
+less than @option{gcse-unrestricted-cost}.  Specifying 0 will disable
+hoisting of simple expressions.  The default value is 10.
+
+@item gcse-unrestricted-cost
+Cost, roughly measured as the cost of a single typical machine
+instruction, at which GCSE optimizations will not constrain
+the distance an expression can travel.  This is currently
+supported only in the code hoisting pass.  The lesser the cost,
+the more aggressive code hoisting will be.  Specifying 0 will
+allow all expressions to travel unrestricted distances.
+The default value is 3.
+
+@item max-hoist-depth
+The depth of search in the dominator tree for expressions to hoist.
+This is used to avoid quadratic behavior in hoisting algorithm.
+The value of 0 will avoid limiting the search, but may slow down compilation
+of huge functions.  The default value is 30.
+
+@item max-unrolled-insns
+The maximum number of instructions that a loop should have if that loop
+is unrolled, and if the loop is unrolled, it determines how many times
+the loop code is unrolled.
+
+@item max-average-unrolled-insns
+The maximum number of instructions biased by probabilities of their execution
+that a loop should have if that loop is unrolled, and if the loop is unrolled,
+it determines how many times the loop code is unrolled.
+
+@item max-unroll-times
+The maximum number of unrollings of a single loop.
+
+@item max-peeled-insns
+The maximum number of instructions that a loop should have if that loop
+is peeled, and if the loop is peeled, it determines how many times
+the loop code is peeled.
+
+@item max-peel-times
+The maximum number of peelings of a single loop.
+
+@item max-completely-peeled-insns
+The maximum number of insns of a completely peeled loop.
+
+@item max-completely-peel-times
+The maximum number of iterations of a loop to be suitable for complete peeling.
+
+@item max-completely-peel-loop-nest-depth
+The maximum depth of a loop nest suitable for complete peeling.
+
+@item max-unswitch-insns
+The maximum number of insns of an unswitched loop.
+
+@item max-unswitch-level
+The maximum number of branches unswitched in a single loop.
+
+@item lim-expensive
+The minimum cost of an expensive expression in the loop invariant motion.
+
+@item iv-consider-all-candidates-bound
+Bound on number of candidates for induction variables below that
+all candidates are considered for each use in induction variable
+optimizations.  Only the most relevant candidates are considered
+if there are more candidates, to avoid quadratic time complexity.
+
+@item iv-max-considered-uses
+The induction variable optimizations give up on loops that contain more
+induction variable uses.
+
+@item iv-always-prune-cand-set-bound
+If number of candidates in the set is smaller than this value,
+we always try to remove unnecessary ivs from the set during its
+optimization when a new iv is added to the set.
+
+@item scev-max-expr-size
+Bound on size of expressions used in the scalar evolutions analyzer.
+Large expressions slow the analyzer.
+
+@item scev-max-expr-complexity
+Bound on the complexity of the expressions in the scalar evolutions analyzer.
+Complex expressions slow the analyzer.
+
+@item omega-max-vars
+The maximum number of variables in an Omega constraint system.
+The default value is 128.
+
+@item omega-max-geqs
+The maximum number of inequalities in an Omega constraint system.
+The default value is 256.
+
+@item omega-max-eqs
+The maximum number of equalities in an Omega constraint system.
+The default value is 128.
+
+@item omega-max-wild-cards
+The maximum number of wildcard variables that the Omega solver will
+be able to insert.  The default value is 18.
+
+@item omega-hash-table-size
+The size of the hash table in the Omega solver.  The default value is
+550.
+
+@item omega-max-keys
+The maximal number of keys used by the Omega solver.  The default
+value is 500.
+
+@item omega-eliminate-redundant-constraints
+When set to 1, use expensive methods to eliminate all redundant
+constraints.  The default value is 0.
+
+@item vect-max-version-for-alignment-checks
+The maximum number of runtime checks that can be performed when
+doing loop versioning for alignment in the vectorizer.  See option
+ftree-vect-loop-version for more information.
+
+@item vect-max-version-for-alias-checks
+The maximum number of runtime checks that can be performed when
+doing loop versioning for alias in the vectorizer.  See option
+ftree-vect-loop-version for more information.
+
+@item max-iterations-to-track
+
+The maximum number of iterations of a loop the brute force algorithm
+for analysis of # of iterations of the loop tries to evaluate.
+
+@item hot-bb-count-fraction
+Select fraction of the maximal count of repetitions of basic block in program
+given basic block needs to have to be considered hot.
+
+@item hot-bb-frequency-fraction
+Select fraction of the entry block frequency of executions of basic block in
+function given basic block needs to have to be considered hot
+
+@item max-predicted-iterations
+The maximum number of loop iterations we predict statically.  This is useful
+in cases where function contain single loop with known bound and other loop
+with unknown.  We predict the known number of iterations correctly, while
+the unknown number of iterations average to roughly 10.  This means that the
+loop without bounds would appear artificially cold relative to the other one.
+
+@item align-threshold
+
+Select fraction of the maximal frequency of executions of basic block in
+function given basic block will get aligned.
+
+@item align-loop-iterations
+
+A loop expected to iterate at lest the selected number of iterations will get
+aligned.
+
+@item tracer-dynamic-coverage
+@itemx tracer-dynamic-coverage-feedback
+
+This value is used to limit superblock formation once the given percentage of
+executed instructions is covered.  This limits unnecessary code size
+expansion.
+
+The @option{tracer-dynamic-coverage-feedback} is used only when profile
+feedback is available.  The real profiles (as opposed to statically estimated
+ones) are much less balanced allowing the threshold to be larger value.
+
+@item tracer-max-code-growth
+Stop tail duplication once code growth has reached given percentage.  This is
+rather hokey argument, as most of the duplicates will be eliminated later in
+cross jumping, so it may be set to much higher values than is the desired code
+growth.
+
+@item tracer-min-branch-ratio
+
+Stop reverse growth when the reverse probability of best edge is less than this
+threshold (in percent).
+
+@item tracer-min-branch-ratio
+@itemx tracer-min-branch-ratio-feedback
+
+Stop forward growth if the best edge do have probability lower than this
+threshold.
+
+Similarly to @option{tracer-dynamic-coverage} two values are present, one for
+compilation for profile feedback and one for compilation without.  The value
+for compilation with profile feedback needs to be more conservative (higher) in
+order to make tracer effective.
+
+@item max-cse-path-length
+
+Maximum number of basic blocks on path that cse considers.  The default is 10.
+
+@item max-cse-insns
+The maximum instructions CSE process before flushing. The default is 1000.
+
+@item ggc-min-expand
+
+GCC uses a garbage collector to manage its own memory allocation.  This
+parameter specifies the minimum percentage by which the garbage
+collector's heap should be allowed to expand between collections.
+Tuning this may improve compilation speed; it has no effect on code
+generation.
+
+The default is 30% + 70% * (RAM/1GB) with an upper bound of 100% when
+RAM >= 1GB@.  If @code{getrlimit} is available, the notion of "RAM" is
+the smallest of actual RAM and @code{RLIMIT_DATA} or @code{RLIMIT_AS}.  If
+GCC is not able to calculate RAM on a particular platform, the lower
+bound of 30% is used.  Setting this parameter and
+@option{ggc-min-heapsize} to zero causes a full collection to occur at
+every opportunity.  This is extremely slow, but can be useful for
+debugging.
+
+@item ggc-min-heapsize
+
+Minimum size of the garbage collector's heap before it begins bothering
+to collect garbage.  The first collection occurs after the heap expands
+by @option{ggc-min-expand}% beyond @option{ggc-min-heapsize}.  Again,
+tuning this may improve compilation speed, and has no effect on code
+generation.
+
+The default is the smaller of RAM/8, RLIMIT_RSS, or a limit which
+tries to ensure that RLIMIT_DATA or RLIMIT_AS are not exceeded, but
+with a lower bound of 4096 (four megabytes) and an upper bound of
+131072 (128 megabytes).  If GCC is not able to calculate RAM on a
+particular platform, the lower bound is used.  Setting this parameter
+very large effectively disables garbage collection.  Setting this
+parameter and @option{ggc-min-expand} to zero causes a full collection
+to occur at every opportunity.
+
+@item max-reload-search-insns
+The maximum number of instruction reload should look backward for equivalent
+register.  Increasing values mean more aggressive optimization, making the
+compile time increase with probably slightly better performance.  The default
+value is 100.
+
+@item max-cselib-memory-locations
+The maximum number of memory locations cselib should take into account.
+Increasing values mean more aggressive optimization, making the compile time
+increase with probably slightly better performance.  The default value is 500.
+
+@item reorder-blocks-duplicate
+@itemx reorder-blocks-duplicate-feedback
+
+Used by basic block reordering pass to decide whether to use unconditional
+branch or duplicate the code on its destination.  Code is duplicated when its
+estimated size is smaller than this value multiplied by the estimated size of
+unconditional jump in the hot spots of the program.
+
+The @option{reorder-block-duplicate-feedback} is used only when profile
+feedback is available and may be set to higher values than
+@option{reorder-block-duplicate} since information about the hot spots is more
+accurate.
+
+@item max-sched-ready-insns
+The maximum number of instructions ready to be issued the scheduler should
+consider at any given time during the first scheduling pass.  Increasing
+values mean more thorough searches, making the compilation time increase
+with probably little benefit.  The default value is 100.
+
+@item max-sched-region-blocks
+The maximum number of blocks in a region to be considered for
+interblock scheduling.  The default value is 10.
+
+@item max-pipeline-region-blocks
+The maximum number of blocks in a region to be considered for
+pipelining in the selective scheduler.  The default value is 15.
+
+@item max-sched-region-insns
+The maximum number of insns in a region to be considered for
+interblock scheduling.  The default value is 100.
+
+@item max-pipeline-region-insns
+The maximum number of insns in a region to be considered for
+pipelining in the selective scheduler.  The default value is 200.
+
+@item min-spec-prob
+The minimum probability (in percents) of reaching a source block
+for interblock speculative scheduling.  The default value is 40.
+
+@item max-sched-extend-regions-iters
+The maximum number of iterations through CFG to extend regions.
+0 - disable region extension,
+N - do at most N iterations.
+The default value is 0.
+
+@item max-sched-insn-conflict-delay
+The maximum conflict delay for an insn to be considered for speculative motion.
+The default value is 3.
+
+@item sched-spec-prob-cutoff
+The minimal probability of speculation success (in percents), so that
+speculative insn will be scheduled.
+The default value is 40.
+
+@item sched-mem-true-dep-cost
+Minimal distance (in CPU cycles) between store and load targeting same
+memory locations.  The default value is 1.
+
+@item selsched-max-lookahead
+The maximum size of the lookahead window of selective scheduling.  It is a
+depth of search for available instructions.
+The default value is 50.
+
+@item selsched-max-sched-times
+The maximum number of times that an instruction will be scheduled during
+selective scheduling.  This is the limit on the number of iterations
+through which the instruction may be pipelined.  The default value is 2.
+
+@item selsched-max-insns-to-rename
+The maximum number of best instructions in the ready list that are considered
+for renaming in the selective scheduler.  The default value is 2.
+
+@item max-last-value-rtl
+The maximum size measured as number of RTLs that can be recorded in an expression
+in combiner for a pseudo register as last known value of that register.  The default
+is 10000.
+
+@item integer-share-limit
+Small integer constants can use a shared data structure, reducing the
+compiler's memory usage and increasing its speed.  This sets the maximum
+value of a shared integer constant.  The default value is 256.
+
+@item min-virtual-mappings
+Specifies the minimum number of virtual mappings in the incremental
+SSA updater that should be registered to trigger the virtual mappings
+heuristic defined by virtual-mappings-ratio.  The default value is
+100.
+
+@item virtual-mappings-ratio
+If the number of virtual mappings is virtual-mappings-ratio bigger
+than the number of virtual symbols to be updated, then the incremental
+SSA updater switches to a full update for those symbols.  The default
+ratio is 3.
+
+@item ssp-buffer-size
+The minimum size of buffers (i.e.@: arrays) that will receive stack smashing
+protection when @option{-fstack-protection} is used.
+
+@item max-jump-thread-duplication-stmts
+Maximum number of statements allowed in a block that needs to be
+duplicated when threading jumps.
+
+@item max-fields-for-field-sensitive
+Maximum number of fields in a structure we will treat in
+a field sensitive manner during pointer analysis.  The default is zero
+for -O0, and -O1 and 100 for -Os, -O2, and -O3.
+
+@item prefetch-latency
+Estimate on average number of instructions that are executed before
+prefetch finishes.  The distance we prefetch ahead is proportional
+to this constant.  Increasing this number may also lead to less
+streams being prefetched (see @option{simultaneous-prefetches}).
+
+@item simultaneous-prefetches
+Maximum number of prefetches that can run at the same time.
+
+@item l1-cache-line-size
+The size of cache line in L1 cache, in bytes.
+
+@item l1-cache-size
+The size of L1 cache, in kilobytes.
+
+@item l2-cache-size
+The size of L2 cache, in kilobytes.
+
+@item min-insn-to-prefetch-ratio
+The minimum ratio between the number of instructions and the
+number of prefetches to enable prefetching in a loop.
+
+@item prefetch-min-insn-to-mem-ratio
+The minimum ratio between the number of instructions and the
+number of memory references to enable prefetching in a loop.
+
+@item use-canonical-types
+Whether the compiler should use the ``canonical'' type system.  By
+default, this should always be 1, which uses a more efficient internal
+mechanism for comparing types in C++ and Objective-C++.  However, if
+bugs in the canonical type system are causing compilation failures,
+set this value to 0 to disable canonical types.
+
+@item switch-conversion-max-branch-ratio
+Switch initialization conversion will refuse to create arrays that are
+bigger than @option{switch-conversion-max-branch-ratio} times the number of
+branches in the switch.
+
+@item max-partial-antic-length
+Maximum length of the partial antic set computed during the tree
+partial redundancy elimination optimization (@option{-ftree-pre}) when
+optimizing at @option{-O3} and above.  For some sorts of source code
+the enhanced partial redundancy elimination optimization can run away,
+consuming all of the memory available on the host machine.  This
+parameter sets a limit on the length of the sets that are computed,
+which prevents the runaway behavior.  Setting a value of 0 for
+this parameter will allow an unlimited set length.
+
+@item sccvn-max-scc-size
+Maximum size of a strongly connected component (SCC) during SCCVN
+processing.  If this limit is hit, SCCVN processing for the whole
+function will not be done and optimizations depending on it will
+be disabled.  The default maximum SCC size is 10000.
+
+@item ira-max-loops-num
+IRA uses a regional register allocation by default.  If a function
+contains loops more than number given by the parameter, only at most
+given number of the most frequently executed loops will form regions
+for the regional register allocation.  The default value of the
+parameter is 100.
+
+@item ira-max-conflict-table-size
+Although IRA uses a sophisticated algorithm of compression conflict
+table, the table can be still big for huge functions.  If the conflict
+table for a function could be more than size in MB given by the
+parameter, the conflict table is not built and faster, simpler, and
+lower quality register allocation algorithm will be used.  The
+algorithm do not use pseudo-register conflicts.  The default value of
+the parameter is 2000.
+
+@item ira-loop-reserved-regs
+IRA can be used to evaluate more accurate register pressure in loops
+for decision to move loop invariants (see @option{-O3}).  The number
+of available registers reserved for some other purposes is described
+by this parameter.  The default value of the parameter is 2 which is
+minimal number of registers needed for execution of typical
+instruction.  This value is the best found from numerous experiments.
+
+@item loop-invariant-max-bbs-in-loop
+Loop invariant motion can be very expensive, both in compile time and
+in amount of needed compile time memory, with very large loops.  Loops
+with more basic blocks than this parameter won't have loop invariant
+motion optimization performed on them.  The default value of the
+parameter is 1000 for -O1 and 10000 for -O2 and above.
+
+@item max-vartrack-size
+Sets a maximum number of hash table slots to use during variable
+tracking dataflow analysis of any function.  If this limit is exceeded
+with variable tracking at assignments enabled, analysis for that
+function is retried without it, after removing all debug insns from
+the function.  If the limit is exceeded even without debug insns, var
+tracking analysis is completely disabled for the function.  Setting
+the parameter to zero makes it unlimited.
+
+@item min-nondebug-insn-uid
+Use uids starting at this parameter for nondebug insns.  The range below
+the parameter is reserved exclusively for debug insns created by
+@option{-fvar-tracking-assignments}, but debug insns may get
+(non-overlapping) uids above it if the reserved range is exhausted.
+
+@item ipa-sra-ptr-growth-factor
+IPA-SRA will replace a pointer to an aggregate with one or more new
+parameters only when their cumulative size is less or equal to
+@option{ipa-sra-ptr-growth-factor} times the size of the original
+pointer parameter.
+
+@item graphite-max-nb-scop-params
+To avoid exponential effects in the Graphite loop transforms, the
+number of parameters in a Static Control Part (SCoP) is bounded.  The
+default value is 10 parameters.  A variable whose value is unknown at
+compile time and defined outside a SCoP is a parameter of the SCoP.
+
+@item graphite-max-bbs-per-function
+To avoid exponential effects in the detection of SCoPs, the size of
+the functions analyzed by Graphite is bounded.  The default value is
+100 basic blocks.
+
+@item loop-block-tile-size
+Loop blocking or strip mining transforms, enabled with
+@option{-floop-block} or @option{-floop-strip-mine}, strip mine each
+loop in the loop nest by a given number of iterations.  The strip
+length can be changed using the @option{loop-block-tile-size}
+parameter.  The default value is 51 iterations.
+
+@item devirt-type-list-size
+IPA-CP attempts to track all possible types passed to a function's
+parameter in order to perform devirtualization.
+@option{devirt-type-list-size} is the maximum number of types it
+stores per a single formal parameter of a function.
+
+@item lto-partitions
+Specify desired number of partitions produced during WHOPR compilation.
+The number of partitions should exceed the number of CPUs used for compilation.
+The default value is 32.
+
+@item lto-minpartition
+Size of minimal partition for WHOPR (in estimated instructions).
+This prevents expenses of splitting very small programs into too many
+partitions.
+
+@item cxx-max-namespaces-for-diagnostic-help
+The maximum number of namespaces to consult for suggestions when C++
+name lookup fails for an identifier.  The default is 1000.
+
+@end table
+@end table
+
+@node Preprocessor Options
+@section Options Controlling the Preprocessor
+@cindex preprocessor options
+@cindex options, preprocessor
+
+These options control the C preprocessor, which is run on each C source
+file before actual compilation.
+
+If you use the @option{-E} option, nothing is done except preprocessing.
+Some of these options make sense only together with @option{-E} because
+they cause the preprocessor output to be unsuitable for actual
+compilation.
+
+@table @gcctabopt
+@item -Wp,@var{option}
+@opindex Wp
+You can use @option{-Wp,@var{option}} to bypass the compiler driver
+and pass @var{option} directly through to the preprocessor.  If
+@var{option} contains commas, it is split into multiple options at the
+commas.  However, many options are modified, translated or interpreted
+by the compiler driver before being passed to the preprocessor, and
+@option{-Wp} forcibly bypasses this phase.  The preprocessor's direct
+interface is undocumented and subject to change, so whenever possible
+you should avoid using @option{-Wp} and let the driver handle the
+options instead.
+
+@item -Xpreprocessor @var{option}
+@opindex Xpreprocessor
+Pass @var{option} as an option to the preprocessor.  You can use this to
+supply system-specific preprocessor options which GCC does not know how to
+recognize.
+
+If you want to pass an option that takes an argument, you must use
+@option{-Xpreprocessor} twice, once for the option and once for the argument.
+@end table
+
+@include cppopts.texi
+
+@node Assembler Options
+@section Passing Options to the Assembler
+
+@c prevent bad page break with this line
+You can pass options to the assembler.
+
+@table @gcctabopt
+@item -Wa,@var{option}
+@opindex Wa
+Pass @var{option} as an option to the assembler.  If @var{option}
+contains commas, it is split into multiple options at the commas.
+
+@item -Xassembler @var{option}
+@opindex Xassembler
+Pass @var{option} as an option to the assembler.  You can use this to
+supply system-specific assembler options which GCC does not know how to
+recognize.
+
+If you want to pass an option that takes an argument, you must use
+@option{-Xassembler} twice, once for the option and once for the argument.
+
+@end table
+
+@node Link Options
+@section Options for Linking
+@cindex link options
+@cindex options, linking
+
+These options come into play when the compiler links object files into
+an executable output file.  They are meaningless if the compiler is
+not doing a link step.
+
+@table @gcctabopt
+@cindex file names
+@item @var{object-file-name}
+A file name that does not end in a special recognized suffix is
+considered to name an object file or library.  (Object files are
+distinguished from libraries by the linker according to the file
+contents.)  If linking is done, these object files are used as input
+to the linker.
+
+@item -c
+@itemx -S
+@itemx -E
+@opindex c
+@opindex S
+@opindex E
+If any of these options is used, then the linker is not run, and
+object file names should not be used as arguments.  @xref{Overall
+Options}.
+
+@cindex Libraries
+@item -l@var{library}
+@itemx -l @var{library}
+@opindex l
+Search the library named @var{library} when linking.  (The second
+alternative with the library as a separate argument is only for
+POSIX compliance and is not recommended.)
+
+It makes a difference where in the command you write this option; the
+linker searches and processes libraries and object files in the order they
+are specified.  Thus, @samp{foo.o -lz bar.o} searches library @samp{z}
+after file @file{foo.o} but before @file{bar.o}.  If @file{bar.o} refers
+to functions in @samp{z}, those functions may not be loaded.
+
+The linker searches a standard list of directories for the library,
+which is actually a file named @file{lib@var{library}.a}.  The linker
+then uses this file as if it had been specified precisely by name.
+
+The directories searched include several standard system directories
+plus any that you specify with @option{-L}.
+
+Normally the files found this way are library files---archive files
+whose members are object files.  The linker handles an archive file by
+scanning through it for members which define symbols that have so far
+been referenced but not defined.  But if the file that is found is an
+ordinary object file, it is linked in the usual fashion.  The only
+difference between using an @option{-l} option and specifying a file name
+is that @option{-l} surrounds @var{library} with @samp{lib} and @samp{.a}
+and searches several directories.
+
+@item -lobjc
+@opindex lobjc
+You need this special case of the @option{-l} option in order to
+link an Objective-C or Objective-C++ program.
+
+@item -nostartfiles
+@opindex nostartfiles
+Do not use the standard system startup files when linking.
+The standard system libraries are used normally, unless @option{-nostdlib}
+or @option{-nodefaultlibs} is used.
+
+@item -nodefaultlibs
+@opindex nodefaultlibs
+Do not use the standard system libraries when linking.
+Only the libraries you specify will be passed to the linker, options
+specifying linkage of the system libraries, such as @code{-static-libgcc}
+or @code{-shared-libgcc}, will be ignored.
+The standard startup files are used normally, unless @option{-nostartfiles}
+is used.  The compiler may generate calls to @code{memcmp},
+@code{memset}, @code{memcpy} and @code{memmove}.
+These entries are usually resolved by entries in
+libc.  These entry points should be supplied through some other
+mechanism when this option is specified.
+
+@item -nostdlib
+@opindex nostdlib
+Do not use the standard system startup files or libraries when linking.
+No startup files and only the libraries you specify will be passed to
+the linker, options specifying linkage of the system libraries, such as
+@code{-static-libgcc} or @code{-shared-libgcc}, will be ignored.
+The compiler may generate calls to @code{memcmp}, @code{memset},
+@code{memcpy} and @code{memmove}.
+These entries are usually resolved by entries in
+libc.  These entry points should be supplied through some other
+mechanism when this option is specified.
+
+@cindex @option{-lgcc}, use with @option{-nostdlib}
+@cindex @option{-nostdlib} and unresolved references
+@cindex unresolved references and @option{-nostdlib}
+@cindex @option{-lgcc}, use with @option{-nodefaultlibs}
+@cindex @option{-nodefaultlibs} and unresolved references
+@cindex unresolved references and @option{-nodefaultlibs}
+One of the standard libraries bypassed by @option{-nostdlib} and
+@option{-nodefaultlibs} is @file{libgcc.a}, a library of internal subroutines
+that GCC uses to overcome shortcomings of particular machines, or special
+needs for some languages.
+(@xref{Interface,,Interfacing to GCC Output,gccint,GNU Compiler
+Collection (GCC) Internals},
+for more discussion of @file{libgcc.a}.)
+In most cases, you need @file{libgcc.a} even when you want to avoid
+other standard libraries.  In other words, when you specify @option{-nostdlib}
+or @option{-nodefaultlibs} you should usually specify @option{-lgcc} as well.
+This ensures that you have no unresolved references to internal GCC
+library subroutines.  (For example, @samp{__main}, used to ensure C++
+constructors will be called; @pxref{Collect2,,@code{collect2}, gccint,
+GNU Compiler Collection (GCC) Internals}.)
+
+@item -pie
+@opindex pie
+Produce a position independent executable on targets which support it.
+For predictable results, you must also specify the same set of options
+that were used to generate code (@option{-fpie}, @option{-fPIE},
+or model suboptions) when you specify this option.
+
+@item -rdynamic
+@opindex rdynamic
+Pass the flag @option{-export-dynamic} to the ELF linker, on targets
+that support it. This instructs the linker to add all symbols, not
+only used ones, to the dynamic symbol table. This option is needed
+for some uses of @code{dlopen} or to allow obtaining backtraces
+from within a program.
+
+@item -s
+@opindex s
+Remove all symbol table and relocation information from the executable.
+
+@item -static
+@opindex static
+On systems that support dynamic linking, this prevents linking with the shared
+libraries.  On other systems, this option has no effect.
+
+@item -shared
+@opindex shared
+Produce a shared object which can then be linked with other objects to
+form an executable.  Not all systems support this option.  For predictable
+results, you must also specify the same set of options that were used to
+generate code (@option{-fpic}, @option{-fPIC}, or model suboptions)
+when you specify this option.@footnote{On some systems, @samp{gcc -shared}
+needs to build supplementary stub code for constructors to work.  On
+multi-libbed systems, @samp{gcc -shared} must select the correct support
+libraries to link against.  Failing to supply the correct flags may lead
+to subtle defects.  Supplying them in cases where they are not necessary
+is innocuous.}
+
+@item -shared-libgcc
+@itemx -static-libgcc
+@opindex shared-libgcc
+@opindex static-libgcc
+On systems that provide @file{libgcc} as a shared library, these options
+force the use of either the shared or static version respectively.
+If no shared version of @file{libgcc} was built when the compiler was
+configured, these options have no effect.
+
+There are several situations in which an application should use the
+shared @file{libgcc} instead of the static version.  The most common
+of these is when the application wishes to throw and catch exceptions
+across different shared libraries.  In that case, each of the libraries
+as well as the application itself should use the shared @file{libgcc}.
+
+Therefore, the G++ and GCJ drivers automatically add
+@option{-shared-libgcc} whenever you build a shared library or a main
+executable, because C++ and Java programs typically use exceptions, so
+this is the right thing to do.
+
+If, instead, you use the GCC driver to create shared libraries, you may
+find that they will not always be linked with the shared @file{libgcc}.
+If GCC finds, at its configuration time, that you have a non-GNU linker
+or a GNU linker that does not support option @option{--eh-frame-hdr},
+it will link the shared version of @file{libgcc} into shared libraries
+by default.  Otherwise, it will take advantage of the linker and optimize
+away the linking with the shared version of @file{libgcc}, linking with
+the static version of libgcc by default.  This allows exceptions to
+propagate through such shared libraries, without incurring relocation
+costs at library load time.
+
+However, if a library or main executable is supposed to throw or catch
+exceptions, you must link it using the G++ or GCJ driver, as appropriate
+for the languages used in the program, or using the option
+@option{-shared-libgcc}, such that it is linked with the shared
+@file{libgcc}.
+
+@item -static-libstdc++
+When the @command{g++} program is used to link a C++ program, it will
+normally automatically link against @option{libstdc++}.  If
+@file{libstdc++} is available as a shared library, and the
+@option{-static} option is not used, then this will link against the
+shared version of @file{libstdc++}.  That is normally fine.  However, it
+is sometimes useful to freeze the version of @file{libstdc++} used by
+the program without going all the way to a fully static link.  The
+@option{-static-libstdc++} option directs the @command{g++} driver to
+link @file{libstdc++} statically, without necessarily linking other
+libraries statically.
+
+@item -symbolic
+@opindex symbolic
+Bind references to global symbols when building a shared object.  Warn
+about any unresolved references (unless overridden by the link editor
+option @samp{-Xlinker -z -Xlinker defs}).  Only a few systems support
+this option.
+
+@item -T @var{script}
+@opindex T
+@cindex linker script
+Use @var{script} as the linker script.  This option is supported by most
+systems using the GNU linker.  On some targets, such as bare-board
+targets without an operating system, the @option{-T} option may be required
+when linking to avoid references to undefined symbols.
+
+@item -Xlinker @var{option}
+@opindex Xlinker
+Pass @var{option} as an option to the linker.  You can use this to
+supply system-specific linker options which GCC does not know how to
+recognize.
+
+If you want to pass an option that takes a separate argument, you must use
+@option{-Xlinker} twice, once for the option and once for the argument.
+For example, to pass @option{-assert definitions}, you must write
+@samp{-Xlinker -assert -Xlinker definitions}.  It does not work to write
+@option{-Xlinker "-assert definitions"}, because this passes the entire
+string as a single argument, which is not what the linker expects.
+
+When using the GNU linker, it is usually more convenient to pass
+arguments to linker options using the @option{@var{option}=@var{value}}
+syntax than as separate arguments.  For example, you can specify
+@samp{-Xlinker -Map=output.map} rather than
+@samp{-Xlinker -Map -Xlinker output.map}.  Other linkers may not support
+this syntax for command-line options.
+
+@item -Wl,@var{option}
+@opindex Wl
+Pass @var{option} as an option to the linker.  If @var{option} contains
+commas, it is split into multiple options at the commas.  You can use this
+syntax to pass an argument to the option.
+For example, @samp{-Wl,-Map,output.map} passes @samp{-Map output.map} to the
+linker.  When using the GNU linker, you can also get the same effect with
+@samp{-Wl,-Map=output.map}.
+
+@item -u @var{symbol}
+@opindex u
+Pretend the symbol @var{symbol} is undefined, to force linking of
+library modules to define it.  You can use @option{-u} multiple times with
+different symbols to force loading of additional library modules.
+@end table
+
+@node Directory Options
+@section Options for Directory Search
+@cindex directory options
+@cindex options, directory search
+@cindex search path
+
+These options specify directories to search for header files, for
+libraries and for parts of the compiler:
+
+@table @gcctabopt
+@item -I@var{dir}
+@opindex I
+Add the directory @var{dir} to the head of the list of directories to be
+searched for header files.  This can be used to override a system header
+file, substituting your own version, since these directories are
+searched before the system header file directories.  However, you should
+not use this option to add directories that contain vendor-supplied
+system header files (use @option{-isystem} for that).  If you use more than
+one @option{-I} option, the directories are scanned in left-to-right
+order; the standard system directories come after.
+
+If a standard system include directory, or a directory specified with
+@option{-isystem}, is also specified with @option{-I}, the @option{-I}
+option will be ignored.  The directory will still be searched but as a
+system directory at its normal position in the system include chain.
+This is to ensure that GCC's procedure to fix buggy system headers and
+the ordering for the include_next directive are not inadvertently changed.
+If you really need to change the search order for system directories,
+use the @option{-nostdinc} and/or @option{-isystem} options.
+
+@item -iplugindir=@var{dir}
+Set the directory to search for plugins which are passed
+by @option{-fplugin=@var{name}} instead of
+@option{-fplugin=@var{path}/@var{name}.so}.  This option is not meant
+to be used by the user, but only passed by the driver.
+
+@item -iquote@var{dir}
+@opindex iquote
+Add the directory @var{dir} to the head of the list of directories to
+be searched for header files only for the case of @samp{#include
+"@var{file}"}; they are not searched for @samp{#include <@var{file}>},
+otherwise just like @option{-I}.
+
+@item -L@var{dir}
+@opindex L
+Add directory @var{dir} to the list of directories to be searched
+for @option{-l}.
+
+@item -B@var{prefix}
+@opindex B
+This option specifies where to find the executables, libraries,
+include files, and data files of the compiler itself.
+
+The compiler driver program runs one or more of the subprograms
+@file{cpp}, @file{cc1}, @file{as} and @file{ld}.  It tries
+@var{prefix} as a prefix for each program it tries to run, both with and
+without @samp{@var{machine}/@var{version}/} (@pxref{Target Options}).
+
+For each subprogram to be run, the compiler driver first tries the
+@option{-B} prefix, if any.  If that name is not found, or if @option{-B}
+was not specified, the driver tries two standard prefixes, which are
+@file{/usr/lib/gcc/} and @file{/usr/local/lib/gcc/}.  If neither of
+those results in a file name that is found, the unmodified program
+name is searched for using the directories specified in your
+@env{PATH} environment variable.
+
+The compiler will check to see if the path provided by the @option{-B}
+refers to a directory, and if necessary it will add a directory
+separator character at the end of the path.
+
+@option{-B} prefixes that effectively specify directory names also apply
+to libraries in the linker, because the compiler translates these
+options into @option{-L} options for the linker.  They also apply to
+includes files in the preprocessor, because the compiler translates these
+options into @option{-isystem} options for the preprocessor.  In this case,
+the compiler appends @samp{include} to the prefix.
+
+The run-time support file @file{libgcc.a} can also be searched for using
+the @option{-B} prefix, if needed.  If it is not found there, the two
+standard prefixes above are tried, and that is all.  The file is left
+out of the link if it is not found by those means.
+
+Another way to specify a prefix much like the @option{-B} prefix is to use
+the environment variable @env{GCC_EXEC_PREFIX}.  @xref{Environment
+Variables}.
+
+As a special kludge, if the path provided by @option{-B} is
+@file{[dir/]stage@var{N}/}, where @var{N} is a number in the range 0 to
+9, then it will be replaced by @file{[dir/]include}.  This is to help
+with boot-strapping the compiler.
+
+@item -specs=@var{file}
+@opindex specs
+Process @var{file} after the compiler reads in the standard @file{specs}
+file, in order to override the defaults that the @file{gcc} driver
+program uses when determining what switches to pass to @file{cc1},
+@file{cc1plus}, @file{as}, @file{ld}, etc.  More than one
+@option{-specs=@var{file}} can be specified on the command line, and they
+are processed in order, from left to right.
+
+@item --sysroot=@var{dir}
+@opindex sysroot
+Use @var{dir} as the logical root directory for headers and libraries.
+For example, if the compiler would normally search for headers in
+@file{/usr/include} and libraries in @file{/usr/lib}, it will instead
+search @file{@var{dir}/usr/include} and @file{@var{dir}/usr/lib}.
+
+If you use both this option and the @option{-isysroot} option, then
+the @option{--sysroot} option will apply to libraries, but the
+@option{-isysroot} option will apply to header files.
+
+The GNU linker (beginning with version 2.16) has the necessary support
+for this option.  If your linker does not support this option, the
+header file aspect of @option{--sysroot} will still work, but the
+library aspect will not.
+
+@item -I-
+@opindex I-
+This option has been deprecated.  Please use @option{-iquote} instead for
+@option{-I} directories before the @option{-I-} and remove the @option{-I-}.
+Any directories you specify with @option{-I} options before the @option{-I-}
+option are searched only for the case of @samp{#include "@var{file}"};
+they are not searched for @samp{#include <@var{file}>}.
+
+If additional directories are specified with @option{-I} options after
+the @option{-I-}, these directories are searched for all @samp{#include}
+directives.  (Ordinarily @emph{all} @option{-I} directories are used
+this way.)
+
+In addition, the @option{-I-} option inhibits the use of the current
+directory (where the current input file came from) as the first search
+directory for @samp{#include "@var{file}"}.  There is no way to
+override this effect of @option{-I-}.  With @option{-I.} you can specify
+searching the directory which was current when the compiler was
+invoked.  That is not exactly the same as what the preprocessor does
+by default, but it is often satisfactory.
+
+@option{-I-} does not inhibit the use of the standard system directories
+for header files.  Thus, @option{-I-} and @option{-nostdinc} are
+independent.
+@end table
+
+@c man end
+
+@node Spec Files
+@section Specifying subprocesses and the switches to pass to them
+@cindex Spec Files
+
+@command{gcc} is a driver program.  It performs its job by invoking a
+sequence of other programs to do the work of compiling, assembling and
+linking.  GCC interprets its command-line parameters and uses these to
+deduce which programs it should invoke, and which command-line options
+it ought to place on their command lines.  This behavior is controlled
+by @dfn{spec strings}.  In most cases there is one spec string for each
+program that GCC can invoke, but a few programs have multiple spec
+strings to control their behavior.  The spec strings built into GCC can
+be overridden by using the @option{-specs=} command-line switch to specify
+a spec file.
+
+@dfn{Spec files} are plaintext files that are used to construct spec
+strings.  They consist of a sequence of directives separated by blank
+lines.  The type of directive is determined by the first non-whitespace
+character on the line and it can be one of the following:
+
+@table @code
+@item %@var{command}
+Issues a @var{command} to the spec file processor.  The commands that can
+appear here are:
+
+@table @code
+@item %include <@var{file}>
+@cindex @code{%include}
+Search for @var{file} and insert its text at the current point in the
+specs file.
+
+@item %include_noerr <@var{file}>
+@cindex @code{%include_noerr}
+Just like @samp{%include}, but do not generate an error message if the include
+file cannot be found.
+
+@item %rename @var{old_name} @var{new_name}
+@cindex @code{%rename}
+Rename the spec string @var{old_name} to @var{new_name}.
+
+@end table
+
+@item *[@var{spec_name}]:
+This tells the compiler to create, override or delete the named spec
+string.  All lines after this directive up to the next directive or
+blank line are considered to be the text for the spec string.  If this
+results in an empty string then the spec will be deleted.  (Or, if the
+spec did not exist, then nothing will happened.)  Otherwise, if the spec
+does not currently exist a new spec will be created.  If the spec does
+exist then its contents will be overridden by the text of this
+directive, unless the first character of that text is the @samp{+}
+character, in which case the text will be appended to the spec.
+
+@item [@var{suffix}]:
+Creates a new @samp{[@var{suffix}] spec} pair.  All lines after this directive
+and up to the next directive or blank line are considered to make up the
+spec string for the indicated suffix.  When the compiler encounters an
+input file with the named suffix, it will processes the spec string in
+order to work out how to compile that file.  For example:
+
+@smallexample
+.ZZ:
+z-compile -input %i
+@end smallexample
+
+This says that any input file whose name ends in @samp{.ZZ} should be
+passed to the program @samp{z-compile}, which should be invoked with the
+command-line switch @option{-input} and with the result of performing the
+@samp{%i} substitution.  (See below.)
+
+As an alternative to providing a spec string, the text that follows a
+suffix directive can be one of the following:
+
+@table @code
+@item @@@var{language}
+This says that the suffix is an alias for a known @var{language}.  This is
+similar to using the @option{-x} command-line switch to GCC to specify a
+language explicitly.  For example:
+
+@smallexample
+.ZZ:
+@@c++
+@end smallexample
+
+Says that .ZZ files are, in fact, C++ source files.
+
+@item #@var{name}
+This causes an error messages saying:
+
+@smallexample
+@var{name} compiler not installed on this system.
+@end smallexample
+@end table
+
+GCC already has an extensive list of suffixes built into it.
+This directive will add an entry to the end of the list of suffixes, but
+since the list is searched from the end backwards, it is effectively
+possible to override earlier entries using this technique.
+
+@end table
+
+GCC has the following spec strings built into it.  Spec files can
+override these strings or create their own.  Note that individual
+targets can also add their own spec strings to this list.
+
+@smallexample
+asm          Options to pass to the assembler
+asm_final    Options to pass to the assembler post-processor
+cpp          Options to pass to the C preprocessor
+cc1          Options to pass to the C compiler
+cc1plus      Options to pass to the C++ compiler
+endfile      Object files to include at the end of the link
+link         Options to pass to the linker
+lib          Libraries to include on the command line to the linker
+libgcc       Decides which GCC support library to pass to the linker
+linker       Sets the name of the linker
+predefines   Defines to be passed to the C preprocessor
+signed_char  Defines to pass to CPP to say whether @code{char} is signed
+             by default
+startfile    Object files to include at the start of the link
+@end smallexample
+
+Here is a small example of a spec file:
+
+@smallexample
+%rename lib                 old_lib
+
+*lib:
+--start-group -lgcc -lc -leval1 --end-group %(old_lib)
+@end smallexample
+
+This example renames the spec called @samp{lib} to @samp{old_lib} and
+then overrides the previous definition of @samp{lib} with a new one.
+The new definition adds in some extra command-line options before
+including the text of the old definition.
+
+@dfn{Spec strings} are a list of command-line options to be passed to their
+corresponding program.  In addition, the spec strings can contain
+@samp{%}-prefixed sequences to substitute variable text or to
+conditionally insert text into the command line.  Using these constructs
+it is possible to generate quite complex command lines.
+
+Here is a table of all defined @samp{%}-sequences for spec
+strings.  Note that spaces are not generated automatically around the
+results of expanding these sequences.  Therefore you can concatenate them
+together or combine them with constant text in a single argument.
+
+@table @code
+@item %%
+Substitute one @samp{%} into the program name or argument.
+
+@item %i
+Substitute the name of the input file being processed.
+
+@item %b
+Substitute the basename of the input file being processed.
+This is the substring up to (and not including) the last period
+and not including the directory.
+
+@item %B
+This is the same as @samp{%b}, but include the file suffix (text after
+the last period).
+
+@item %d
+Marks the argument containing or following the @samp{%d} as a
+temporary file name, so that that file will be deleted if GCC exits
+successfully.  Unlike @samp{%g}, this contributes no text to the
+argument.
+
+@item %g@var{suffix}
+Substitute a file name that has suffix @var{suffix} and is chosen
+once per compilation, and mark the argument in the same way as
+@samp{%d}.  To reduce exposure to denial-of-service attacks, the file
+name is now chosen in a way that is hard to predict even when previously
+chosen file names are known.  For example, @samp{%g.s @dots{} %g.o @dots{} %g.s}
+might turn into @samp{ccUVUUAU.s ccXYAXZ12.o ccUVUUAU.s}.  @var{suffix} matches
+the regexp @samp{[.A-Za-z]*} or the special string @samp{%O}, which is
+treated exactly as if @samp{%O} had been preprocessed.  Previously, @samp{%g}
+was simply substituted with a file name chosen once per compilation,
+without regard to any appended suffix (which was therefore treated
+just like ordinary text), making such attacks more likely to succeed.
+
+@item %u@var{suffix}
+Like @samp{%g}, but generates a new temporary file name even if
+@samp{%u@var{suffix}} was already seen.
+
+@item %U@var{suffix}
+Substitutes the last file name generated with @samp{%u@var{suffix}}, generating a
+new one if there is no such last file name.  In the absence of any
+@samp{%u@var{suffix}}, this is just like @samp{%g@var{suffix}}, except they don't share
+the same suffix @emph{space}, so @samp{%g.s @dots{} %U.s @dots{} %g.s @dots{} %U.s}
+would involve the generation of two distinct file names, one
+for each @samp{%g.s} and another for each @samp{%U.s}.  Previously, @samp{%U} was
+simply substituted with a file name chosen for the previous @samp{%u},
+without regard to any appended suffix.
+
+@item %j@var{suffix}
+Substitutes the name of the @code{HOST_BIT_BUCKET}, if any, and if it is
+writable, and if save-temps is off; otherwise, substitute the name
+of a temporary file, just like @samp{%u}.  This temporary file is not
+meant for communication between processes, but rather as a junk
+disposal mechanism.
+
+@item %|@var{suffix}
+@itemx %m@var{suffix}
+Like @samp{%g}, except if @option{-pipe} is in effect.  In that case
+@samp{%|} substitutes a single dash and @samp{%m} substitutes nothing at
+all.  These are the two most common ways to instruct a program that it
+should read from standard input or write to standard output.  If you
+need something more elaborate you can use an @samp{%@{pipe:@code{X}@}}
+construct: see for example @file{f/lang-specs.h}.
+
+@item %.@var{SUFFIX}
+Substitutes @var{.SUFFIX} for the suffixes of a matched switch's args
+when it is subsequently output with @samp{%*}.  @var{SUFFIX} is
+terminated by the next space or %.
+
+@item %w
+Marks the argument containing or following the @samp{%w} as the
+designated output file of this compilation.  This puts the argument
+into the sequence of arguments that @samp{%o} will substitute later.
+
+@item %o
+Substitutes the names of all the output files, with spaces
+automatically placed around them.  You should write spaces
+around the @samp{%o} as well or the results are undefined.
+@samp{%o} is for use in the specs for running the linker.
+Input files whose names have no recognized suffix are not compiled
+at all, but they are included among the output files, so they will
+be linked.
+
+@item %O
+Substitutes the suffix for object files.  Note that this is
+handled specially when it immediately follows @samp{%g, %u, or %U},
+because of the need for those to form complete file names.  The
+handling is such that @samp{%O} is treated exactly as if it had already
+been substituted, except that @samp{%g, %u, and %U} do not currently
+support additional @var{suffix} characters following @samp{%O} as they would
+following, for example, @samp{.o}.
+
+@item %p
+Substitutes the standard macro predefinitions for the
+current target machine.  Use this when running @code{cpp}.
+
+@item %P
+Like @samp{%p}, but puts @samp{__} before and after the name of each
+predefined macro, except for macros that start with @samp{__} or with
+@samp{_@var{L}}, where @var{L} is an uppercase letter.  This is for ISO
+C@.
+
+@item %I
+Substitute any of @option{-iprefix} (made from @env{GCC_EXEC_PREFIX}),
+@option{-isysroot} (made from @env{TARGET_SYSTEM_ROOT}),
+@option{-isystem} (made from @env{COMPILER_PATH} and @option{-B} options)
+and @option{-imultilib} as necessary.
+
+@item %s
+Current argument is the name of a library or startup file of some sort.
+Search for that file in a standard list of directories and substitute
+the full name found.  The current working directory is included in the
+list of directories scanned.
+
+@item %T
+Current argument is the name of a linker script.  Search for that file
+in the current list of directories to scan for libraries. If the file
+is located insert a @option{--script} option into the command line
+followed by the full path name found.  If the file is not found then
+generate an error message.  Note: the current working directory is not
+searched.
+
+@item %e@var{str}
+Print @var{str} as an error message.  @var{str} is terminated by a newline.
+Use this when inconsistent options are detected.
+
+@item %(@var{name})
+Substitute the contents of spec string @var{name} at this point.
+
+@item %[@var{name}]
+Like @samp{%(@dots{})} but put @samp{__} around @option{-D} arguments.
+
+@item %x@{@var{option}@}
+Accumulate an option for @samp{%X}.
+
+@item %X
+Output the accumulated linker options specified by @option{-Wl} or a @samp{%x}
+spec string.
+
+@item %Y
+Output the accumulated assembler options specified by @option{-Wa}.
+
+@item %Z
+Output the accumulated preprocessor options specified by @option{-Wp}.
+
+@item %a
+Process the @code{asm} spec.  This is used to compute the
+switches to be passed to the assembler.
+
+@item %A
+Process the @code{asm_final} spec.  This is a spec string for
+passing switches to an assembler post-processor, if such a program is
+needed.
+
+@item %l
+Process the @code{link} spec.  This is the spec for computing the
+command line passed to the linker.  Typically it will make use of the
+@samp{%L %G %S %D and %E} sequences.
+
+@item %D
+Dump out a @option{-L} option for each directory that GCC believes might
+contain startup files.  If the target supports multilibs then the
+current multilib directory will be prepended to each of these paths.
+
+@item %L
+Process the @code{lib} spec.  This is a spec string for deciding which
+libraries should be included on the command line to the linker.
+
+@item %G
+Process the @code{libgcc} spec.  This is a spec string for deciding
+which GCC support library should be included on the command line to the linker.
+
+@item %S
+Process the @code{startfile} spec.  This is a spec for deciding which
+object files should be the first ones passed to the linker.  Typically
+this might be a file named @file{crt0.o}.
+
+@item %E
+Process the @code{endfile} spec.  This is a spec string that specifies
+the last object files that will be passed to the linker.
+
+@item %C
+Process the @code{cpp} spec.  This is used to construct the arguments
+to be passed to the C preprocessor.
+
+@item %1
+Process the @code{cc1} spec.  This is used to construct the options to be
+passed to the actual C compiler (@samp{cc1}).
+
+@item %2
+Process the @code{cc1plus} spec.  This is used to construct the options to be
+passed to the actual C++ compiler (@samp{cc1plus}).
+
+@item %*
+Substitute the variable part of a matched option.  See below.
+Note that each comma in the substituted string is replaced by
+a single space.
+
+@item %<@code{S}
+Remove all occurrences of @code{-S} from the command line.  Note---this
+command is position dependent.  @samp{%} commands in the spec string
+before this one will see @code{-S}, @samp{%} commands in the spec string
+after this one will not.
+
+@item %:@var{function}(@var{args})
+Call the named function @var{function}, passing it @var{args}.
+@var{args} is first processed as a nested spec string, then split
+into an argument vector in the usual fashion.  The function returns
+a string which is processed as if it had appeared literally as part
+of the current spec.
+
+The following built-in spec functions are provided:
+
+@table @code
+@item @code{getenv}
+The @code{getenv} spec function takes two arguments: an environment
+variable name and a string.  If the environment variable is not
+defined, a fatal error is issued.  Otherwise, the return value is the
+value of the environment variable concatenated with the string.  For
+example, if @env{TOPDIR} is defined as @file{/path/to/top}, then:
+
+@smallexample
+%:getenv(TOPDIR /include)
+@end smallexample
+
+expands to @file{/path/to/top/include}.
+
+@item @code{if-exists}
+The @code{if-exists} spec function takes one argument, an absolute
+pathname to a file.  If the file exists, @code{if-exists} returns the
+pathname.  Here is a small example of its usage:
+
+@smallexample
+*startfile:
+crt0%O%s %:if-exists(crti%O%s) crtbegin%O%s
+@end smallexample
+
+@item @code{if-exists-else}
+The @code{if-exists-else} spec function is similar to the @code{if-exists}
+spec function, except that it takes two arguments.  The first argument is
+an absolute pathname to a file.  If the file exists, @code{if-exists-else}
+returns the pathname.  If it does not exist, it returns the second argument.
+This way, @code{if-exists-else} can be used to select one file or another,
+based on the existence of the first.  Here is a small example of its usage:
+
+@smallexample
+*startfile:
+crt0%O%s %:if-exists(crti%O%s) \
+%:if-exists-else(crtbeginT%O%s crtbegin%O%s)
+@end smallexample
+
+@item @code{replace-outfile}
+The @code{replace-outfile} spec function takes two arguments.  It looks for the
+first argument in the outfiles array and replaces it with the second argument.  Here
+is a small example of its usage:
+
+@smallexample
+%@{fgnu-runtime:%:replace-outfile(-lobjc -lobjc-gnu)@}
+@end smallexample
+
+@item @code{remove-outfile}
+The @code{remove-outfile} spec function takes one argument.  It looks for the
+first argument in the outfiles array and removes it.  Here is a small example
+its usage:
+
+@smallexample
+%:remove-outfile(-lm)
+@end smallexample
+
+@item @code{pass-through-libs}
+The @code{pass-through-libs} spec function takes any number of arguments.  It
+finds any @option{-l} options and any non-options ending in ".a" (which it
+assumes are the names of linker input library archive files) and returns a
+result containing all the found arguments each prepended by
+@option{-plugin-opt=-pass-through=} and joined by spaces.  This list is
+intended to be passed to the LTO linker plugin.
+
+@smallexample
+%:pass-through-libs(%G %L %G)
+@end smallexample
+
+@item @code{print-asm-header}
+The @code{print-asm-header} function takes no arguments and simply
+prints a banner like:
+
+@smallexample
+Assembler options
+=================
+
+Use "-Wa,OPTION" to pass "OPTION" to the assembler.
+@end smallexample
+
+It is used to separate compiler options from assembler options
+in the @option{--target-help} output.
+@end table
+
+@item %@{@code{S}@}
+Substitutes the @code{-S} switch, if that switch was given to GCC@.
+If that switch was not specified, this substitutes nothing.  Note that
+the leading dash is omitted when specifying this option, and it is
+automatically inserted if the substitution is performed.  Thus the spec
+string @samp{%@{foo@}} would match the command-line option @option{-foo}
+and would output the command line option @option{-foo}.
+
+@item %W@{@code{S}@}
+Like %@{@code{S}@} but mark last argument supplied within as a file to be
+deleted on failure.
+
+@item %@{@code{S}*@}
+Substitutes all the switches specified to GCC whose names start
+with @code{-S}, but which also take an argument.  This is used for
+switches like @option{-o}, @option{-D}, @option{-I}, etc.
+GCC considers @option{-o foo} as being
+one switch whose names starts with @samp{o}.  %@{o*@} would substitute this
+text, including the space.  Thus two arguments would be generated.
+
+@item %@{@code{S}*&@code{T}*@}
+Like %@{@code{S}*@}, but preserve order of @code{S} and @code{T} options
+(the order of @code{S} and @code{T} in the spec is not significant).
+There can be any number of ampersand-separated variables; for each the
+wild card is optional.  Useful for CPP as @samp{%@{D*&U*&A*@}}.
+
+@item %@{@code{S}:@code{X}@}
+Substitutes @code{X}, if the @samp{-S} switch was given to GCC@.
+
+@item %@{!@code{S}:@code{X}@}
+Substitutes @code{X}, if the @samp{-S} switch was @emph{not} given to GCC@.
+
+@item %@{@code{S}*:@code{X}@}
+Substitutes @code{X} if one or more switches whose names start with
+@code{-S} are specified to GCC@.  Normally @code{X} is substituted only
+once, no matter how many such switches appeared.  However, if @code{%*}
+appears somewhere in @code{X}, then @code{X} will be substituted once
+for each matching switch, with the @code{%*} replaced by the part of
+that switch that matched the @code{*}.
+
+@item %@{.@code{S}:@code{X}@}
+Substitutes @code{X}, if processing a file with suffix @code{S}.
+
+@item %@{!.@code{S}:@code{X}@}
+Substitutes @code{X}, if @emph{not} processing a file with suffix @code{S}.
+
+@item %@{,@code{S}:@code{X}@}
+Substitutes @code{X}, if processing a file for language @code{S}.
+
+@item %@{!,@code{S}:@code{X}@}
+Substitutes @code{X}, if not processing a file for language @code{S}.
+
+@item %@{@code{S}|@code{P}:@code{X}@}
+Substitutes @code{X} if either @code{-S} or @code{-P} was given to
+GCC@.  This may be combined with @samp{!}, @samp{.}, @samp{,}, and
+@code{*} sequences as well, although they have a stronger binding than
+the @samp{|}.  If @code{%*} appears in @code{X}, all of the
+alternatives must be starred, and only the first matching alternative
+is substituted.
+
+For example, a spec string like this:
+
+@smallexample
+%@{.c:-foo@} %@{!.c:-bar@} %@{.c|d:-baz@} %@{!.c|d:-boggle@}
+@end smallexample
+
+will output the following command-line options from the following input
+command-line options:
+
+@smallexample
+fred.c        -foo -baz
+jim.d         -bar -boggle
+-d fred.c     -foo -baz -boggle
+-d jim.d      -bar -baz -boggle
+@end smallexample
+
+@item %@{S:X; T:Y; :D@}
+
+If @code{S} was given to GCC, substitutes @code{X}; else if @code{T} was
+given to GCC, substitutes @code{Y}; else substitutes @code{D}.  There can
+be as many clauses as you need.  This may be combined with @code{.},
+@code{,}, @code{!}, @code{|}, and @code{*} as needed.
+
+
+@end table
+
+The conditional text @code{X} in a %@{@code{S}:@code{X}@} or similar
+construct may contain other nested @samp{%} constructs or spaces, or
+even newlines.  They are processed as usual, as described above.
+Trailing white space in @code{X} is ignored.  White space may also
+appear anywhere on the left side of the colon in these constructs,
+except between @code{.} or @code{*} and the corresponding word.
+
+The @option{-O}, @option{-f}, @option{-m}, and @option{-W} switches are
+handled specifically in these constructs.  If another value of
+@option{-O} or the negated form of a @option{-f}, @option{-m}, or
+@option{-W} switch is found later in the command line, the earlier
+switch value is ignored, except with @{@code{S}*@} where @code{S} is
+just one letter, which passes all matching options.
+
+The character @samp{|} at the beginning of the predicate text is used to
+indicate that a command should be piped to the following command, but
+only if @option{-pipe} is specified.
+
+It is built into GCC which switches take arguments and which do not.
+(You might think it would be useful to generalize this to allow each
+compiler's spec to say which switches take arguments.  But this cannot
+be done in a consistent fashion.  GCC cannot even decide which input
+files have been specified without knowing which switches take arguments,
+and it must know which input files to compile in order to tell which
+compilers to run).
+
+GCC also knows implicitly that arguments starting in @option{-l} are to be
+treated as compiler output files, and passed to the linker in their
+proper position among the other output files.
+
+@c man begin OPTIONS
+
+@node Target Options
+@section Specifying Target Machine and Compiler Version
+@cindex target options
+@cindex cross compiling
+@cindex specifying machine version
+@cindex specifying compiler version and target machine
+@cindex compiler version, specifying
+@cindex target machine, specifying
+
+The usual way to run GCC is to run the executable called @command{gcc}, or
+@command{@var{machine}-gcc} when cross-compiling, or
+@command{@var{machine}-gcc-@var{version}} to run a version other than the
+one that was installed last.
+
+@node Submodel Options
+@section Hardware Models and Configurations
+@cindex submodel options
+@cindex specifying hardware config
+@cindex hardware models and configurations, specifying
+@cindex machine dependent options
+
+Each target machine types can have its own
+special options, starting with @samp{-m}, to choose among various
+hardware models or configurations---for example, 68010 vs 68020,
+floating coprocessor or none.  A single installed version of the
+compiler can compile for any model or configuration, according to the
+options specified.
+
+Some configurations of the compiler also support additional special
+options, usually for compatibility with other compilers on the same
+platform.
+
+@c This list is ordered alphanumerically by subsection name.
+@c It should be the same order and spelling as these options are listed
+@c in Machine Dependent Options
+
+@menu
+* ARC Options::
+* ARM Options::
+* AVR Options::
+* Blackfin Options::
+* CRIS Options::
+* CRX Options::
+* Darwin Options::
+* DEC Alpha Options::
+* DEC Alpha/VMS Options::
+* FR30 Options::
+* FRV Options::
+* GNU/Linux Options::
+* H8/300 Options::
+* HPPA Options::
+* i386 and x86-64 Options::
+* i386 and x86-64 Windows Options::
+* IA-64 Options::
+* IA-64/VMS Options::
+* LM32 Options::
+* M32C Options::
+* M32R/D Options::
+* M680x0 Options::
+* M68hc1x Options::
+* MCore Options::
+* MeP Options::
+* MicroBlaze Options::
+* MIPS Options::
+* MMIX Options::
+* MN10300 Options::
+* PDP-11 Options::
+* picoChip Options::
+* PowerPC Options::
+* RS/6000 and PowerPC Options::
+* RX Options::
+* S/390 and zSeries Options::
+* Score Options::
+* SH Options::
+* Solaris 2 Options::
+* SPARC Options::
+* SPU Options::
+* System V Options::
+* V850 Options::
+* VAX Options::
+* VxWorks Options::
+* x86-64 Options::
+* Xstormy16 Options::
+* Xtensa Options::
+* zSeries Options::
+@end menu
+
+@node ARC Options
+@subsection ARC Options
+@cindex ARC Options
+
+These options are defined for ARC implementations:
+
+@table @gcctabopt
+@item -EL
+@opindex EL
+Compile code for little endian mode.  This is the default.
+
+@item -EB
+@opindex EB
+Compile code for big endian mode.
+
+@item -mmangle-cpu
+@opindex mmangle-cpu
+Prepend the name of the CPU to all public symbol names.
+In multiple-processor systems, there are many ARC variants with different
+instruction and register set characteristics.  This flag prevents code
+compiled for one CPU to be linked with code compiled for another.
+No facility exists for handling variants that are ``almost identical''.
+This is an all or nothing option.
+
+@item -mcpu=@var{cpu}
+@opindex mcpu
+Compile code for ARC variant @var{cpu}.
+Which variants are supported depend on the configuration.
+All variants support @option{-mcpu=base}, this is the default.
+
+@item -mtext=@var{text-section}
+@itemx -mdata=@var{data-section}
+@itemx -mrodata=@var{readonly-data-section}
+@opindex mtext
+@opindex mdata
+@opindex mrodata
+Put functions, data, and readonly data in @var{text-section},
+@var{data-section}, and @var{readonly-data-section} respectively
+by default.  This can be overridden with the @code{section} attribute.
+@xref{Variable Attributes}.
+
+@end table
+
+@node ARM Options
+@subsection ARM Options
+@cindex ARM options
+
+These @samp{-m} options are defined for Advanced RISC Machines (ARM)
+architectures:
+
+@table @gcctabopt
+@item -mabi=@var{name}
+@opindex mabi
+Generate code for the specified ABI@.  Permissible values are: @samp{apcs-gnu},
+@samp{atpcs}, @samp{aapcs}, @samp{aapcs-linux} and @samp{iwmmxt}.
+
+@item -mapcs-frame
+@opindex mapcs-frame
+Generate a stack frame that is compliant with the ARM Procedure Call
+Standard for all functions, even if this is not strictly necessary for
+correct execution of the code.  Specifying @option{-fomit-frame-pointer}
+with this option will cause the stack frames not to be generated for
+leaf functions.  The default is @option{-mno-apcs-frame}.
+
+@item -mapcs
+@opindex mapcs
+This is a synonym for @option{-mapcs-frame}.
+
+@ignore
+@c not currently implemented
+@item -mapcs-stack-check
+@opindex mapcs-stack-check
+Generate code to check the amount of stack space available upon entry to
+every function (that actually uses some stack space).  If there is
+insufficient space available then either the function
+@samp{__rt_stkovf_split_small} or @samp{__rt_stkovf_split_big} will be
+called, depending upon the amount of stack space required.  The run time
+system is required to provide these functions.  The default is
+@option{-mno-apcs-stack-check}, since this produces smaller code.
+
+@c not currently implemented
+@item -mapcs-float
+@opindex mapcs-float
+Pass floating point arguments using the float point registers.  This is
+one of the variants of the APCS@.  This option is recommended if the
+target hardware has a floating point unit or if a lot of floating point
+arithmetic is going to be performed by the code.  The default is
+@option{-mno-apcs-float}, since integer only code is slightly increased in
+size if @option{-mapcs-float} is used.
+
+@c not currently implemented
+@item -mapcs-reentrant
+@opindex mapcs-reentrant
+Generate reentrant, position independent code.  The default is
+@option{-mno-apcs-reentrant}.
+@end ignore
+
+@item -mthumb-interwork
+@opindex mthumb-interwork
+Generate code which supports calling between the ARM and Thumb
+instruction sets.  Without this option the two instruction sets cannot
+be reliably used inside one program.  The default is
+@option{-mno-thumb-interwork}, since slightly larger code is generated
+when @option{-mthumb-interwork} is specified.
+
+@item -mno-sched-prolog
+@opindex mno-sched-prolog
+Prevent the reordering of instructions in the function prolog, or the
+merging of those instruction with the instructions in the function's
+body.  This means that all functions will start with a recognizable set
+of instructions (or in fact one of a choice from a small set of
+different function prologues), and this information can be used to
+locate the start if functions inside an executable piece of code.  The
+default is @option{-msched-prolog}.
+
+@item -mfloat-abi=@var{name}
+@opindex mfloat-abi
+Specifies which floating-point ABI to use.  Permissible values
+are: @samp{soft}, @samp{softfp} and @samp{hard}.
+
+Specifying @samp{soft} causes GCC to generate output containing
+library calls for floating-point operations.
+@samp{softfp} allows the generation of code using hardware floating-point
+instructions, but still uses the soft-float calling conventions.
+@samp{hard} allows generation of floating-point instructions
+and uses FPU-specific calling conventions.
+
+The default depends on the specific target configuration.  Note that
+the hard-float and soft-float ABIs are not link-compatible; you must
+compile your entire program with the same ABI, and link with a
+compatible set of libraries.
+
+@item -mhard-float
+@opindex mhard-float
+Equivalent to @option{-mfloat-abi=hard}.
+
+@item -msoft-float
+@opindex msoft-float
+Equivalent to @option{-mfloat-abi=soft}.
+
+@item -mlittle-endian
+@opindex mlittle-endian
+Generate code for a processor running in little-endian mode.  This is
+the default for all standard configurations.
+
+@item -mbig-endian
+@opindex mbig-endian
+Generate code for a processor running in big-endian mode; the default is
+to compile code for a little-endian processor.
+
+@item -mwords-little-endian
+@opindex mwords-little-endian
+This option only applies when generating code for big-endian processors.
+Generate code for a little-endian word order but a big-endian byte
+order.  That is, a byte order of the form @samp{32107654}.  Note: this
+option should only be used if you require compatibility with code for
+big-endian ARM processors generated by versions of the compiler prior to
+2.8.
+
+@item -mcpu=@var{name}
+@opindex mcpu
+This specifies the name of the target ARM processor.  GCC uses this name
+to determine what kind of instructions it can emit when generating
+assembly code.  Permissible names are: @samp{arm2}, @samp{arm250},
+@samp{arm3}, @samp{arm6}, @samp{arm60}, @samp{arm600}, @samp{arm610},
+@samp{arm620}, @samp{arm7}, @samp{arm7m}, @samp{arm7d}, @samp{arm7dm},
+@samp{arm7di}, @samp{arm7dmi}, @samp{arm70}, @samp{arm700},
+@samp{arm700i}, @samp{arm710}, @samp{arm710c}, @samp{arm7100},
+@samp{arm720},
+@samp{arm7500}, @samp{arm7500fe}, @samp{arm7tdmi}, @samp{arm7tdmi-s},
+@samp{arm710t}, @samp{arm720t}, @samp{arm740t},
+@samp{strongarm}, @samp{strongarm110}, @samp{strongarm1100},
+@samp{strongarm1110},
+@samp{arm8}, @samp{arm810}, @samp{arm9}, @samp{arm9e}, @samp{arm920},
+@samp{arm920t}, @samp{arm922t}, @samp{arm946e-s}, @samp{arm966e-s},
+@samp{arm968e-s}, @samp{arm926ej-s}, @samp{arm940t}, @samp{arm9tdmi},
+@samp{arm10tdmi}, @samp{arm1020t}, @samp{arm1026ej-s},
+@samp{arm10e}, @samp{arm1020e}, @samp{arm1022e},
+@samp{arm1136j-s}, @samp{arm1136jf-s}, @samp{mpcore}, @samp{mpcorenovfp},
+@samp{arm1156t2-s}, @samp{arm1156t2f-s}, @samp{arm1176jz-s}, @samp{arm1176jzf-s},
+@samp{cortex-a5}, @samp{cortex-a8}, @samp{cortex-a9}, @samp{cortex-a15},
+@samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-m4}, @samp{cortex-m3},
+@samp{cortex-m1},
+@samp{cortex-m0},
+@samp{xscale}, @samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}.
+
+@item -mtune=@var{name}
+@opindex mtune
+This option is very similar to the @option{-mcpu=} option, except that
+instead of specifying the actual target processor type, and hence
+restricting which instructions can be used, it specifies that GCC should
+tune the performance of the code as if the target were of the type
+specified in this option, but still choosing the instructions that it
+will generate based on the CPU specified by a @option{-mcpu=} option.
+For some ARM implementations better performance can be obtained by using
+this option.
+
+@item -march=@var{name}
+@opindex march
+This specifies the name of the target ARM architecture.  GCC uses this
+name to determine what kind of instructions it can emit when generating
+assembly code.  This option can be used in conjunction with or instead
+of the @option{-mcpu=} option.  Permissible names are: @samp{armv2},
+@samp{armv2a}, @samp{armv3}, @samp{armv3m}, @samp{armv4}, @samp{armv4t},
+@samp{armv5}, @samp{armv5t}, @samp{armv5e}, @samp{armv5te},
+@samp{armv6}, @samp{armv6j},
+@samp{armv6t2}, @samp{armv6z}, @samp{armv6zk}, @samp{armv6-m},
+@samp{armv7}, @samp{armv7-a}, @samp{armv7-r}, @samp{armv7-m},
+@samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}.
+
+@item -mfpu=@var{name}
+@itemx -mfpe=@var{number}
+@itemx -mfp=@var{number}
+@opindex mfpu
+@opindex mfpe
+@opindex mfp
+This specifies what floating point hardware (or hardware emulation) is
+available on the target.  Permissible names are: @samp{fpa}, @samp{fpe2},
+@samp{fpe3}, @samp{maverick}, @samp{vfp}, @samp{vfpv3}, @samp{vfpv3-fp16},
+@samp{vfpv3-d16}, @samp{vfpv3-d16-fp16}, @samp{vfpv3xd}, @samp{vfpv3xd-fp16},
+@samp{neon}, @samp{neon-fp16}, @samp{vfpv4}, @samp{vfpv4-d16},
+@samp{fpv4-sp-d16} and @samp{neon-vfpv4}.
+@option{-mfp} and @option{-mfpe} are synonyms for
+@option{-mfpu}=@samp{fpe}@var{number}, for compatibility with older versions
+of GCC@.
+
+If @option{-msoft-float} is specified this specifies the format of
+floating point values.
+
+If the selected floating-point hardware includes the NEON extension
+(e.g. @option{-mfpu}=@samp{neon}), note that floating-point
+operations will not be used by GCC's auto-vectorization pass unless
+@option{-funsafe-math-optimizations} is also specified.  This is
+because NEON hardware does not fully implement the IEEE 754 standard for
+floating-point arithmetic (in particular denormal values are treated as
+zero), so the use of NEON instructions may lead to a loss of precision.
+
+@item -mfp16-format=@var{name}
+@opindex mfp16-format
+Specify the format of the @code{__fp16} half-precision floating-point type.
+Permissible names are @samp{none}, @samp{ieee}, and @samp{alternative};
+the default is @samp{none}, in which case the @code{__fp16} type is not
+defined.  @xref{Half-Precision}, for more information.
+
+@item -mstructure-size-boundary=@var{n}
+@opindex mstructure-size-boundary
+The size of all structures and unions will be rounded up to a multiple
+of the number of bits set by this option.  Permissible values are 8, 32
+and 64.  The default value varies for different toolchains.  For the COFF
+targeted toolchain the default value is 8.  A value of 64 is only allowed
+if the underlying ABI supports it.
+
+Specifying the larger number can produce faster, more efficient code, but
+can also increase the size of the program.  Different values are potentially
+incompatible.  Code compiled with one value cannot necessarily expect to
+work with code or libraries compiled with another value, if they exchange
+information using structures or unions.
+
+@item -mabort-on-noreturn
+@opindex mabort-on-noreturn
+Generate a call to the function @code{abort} at the end of a
+@code{noreturn} function.  It will be executed if the function tries to
+return.
+
+@item -mlong-calls
+@itemx -mno-long-calls
+@opindex mlong-calls
+@opindex mno-long-calls
+Tells the compiler to perform function calls by first loading the
+address of the function into a register and then performing a subroutine
+call on this register.  This switch is needed if the target function
+will lie outside of the 64 megabyte addressing range of the offset based
+version of subroutine call instruction.
+
+Even if this switch is enabled, not all function calls will be turned
+into long calls.  The heuristic is that static functions, functions
+which have the @samp{short-call} attribute, functions that are inside
+the scope of a @samp{#pragma no_long_calls} directive and functions whose
+definitions have already been compiled within the current compilation
+unit, will not be turned into long calls.  The exception to this rule is
+that weak function definitions, functions with the @samp{long-call}
+attribute or the @samp{section} attribute, and functions that are within
+the scope of a @samp{#pragma long_calls} directive, will always be
+turned into long calls.
+
+This feature is not enabled by default.  Specifying
+@option{-mno-long-calls} will restore the default behavior, as will
+placing the function calls within the scope of a @samp{#pragma
+long_calls_off} directive.  Note these switches have no effect on how
+the compiler generates code to handle function calls via function
+pointers.
+
+@item -msingle-pic-base
+@opindex msingle-pic-base
+Treat the register used for PIC addressing as read-only, rather than
+loading it in the prologue for each function.  The run-time system is
+responsible for initializing this register with an appropriate value
+before execution begins.
+
+@item -mpic-register=@var{reg}
+@opindex mpic-register
+Specify the register to be used for PIC addressing.  The default is R10
+unless stack-checking is enabled, when R9 is used.
+
+@item -mcirrus-fix-invalid-insns
+@opindex mcirrus-fix-invalid-insns
+@opindex mno-cirrus-fix-invalid-insns
+Insert NOPs into the instruction stream to in order to work around
+problems with invalid Maverick instruction combinations.  This option
+is only valid if the @option{-mcpu=ep9312} option has been used to
+enable generation of instructions for the Cirrus Maverick floating
+point co-processor.  This option is not enabled by default, since the
+problem is only present in older Maverick implementations.  The default
+can be re-enabled by use of the @option{-mno-cirrus-fix-invalid-insns}
+switch.
+
+@item -mpoke-function-name
+@opindex mpoke-function-name
+Write the name of each function into the text section, directly
+preceding the function prologue.  The generated code is similar to this:
+
+@smallexample
+     t0
+         .ascii "arm_poke_function_name", 0
+         .align
+     t1
+         .word 0xff000000 + (t1 - t0)
+     arm_poke_function_name
+         mov     ip, sp
+         stmfd   sp!, @{fp, ip, lr, pc@}
+         sub     fp, ip, #4
+@end smallexample
+
+When performing a stack backtrace, code can inspect the value of
+@code{pc} stored at @code{fp + 0}.  If the trace function then looks at
+location @code{pc - 12} and the top 8 bits are set, then we know that
+there is a function name embedded immediately preceding this location
+and has length @code{((pc[-3]) & 0xff000000)}.
+
+@item -mthumb
+@opindex mthumb
+Generate code for the Thumb instruction set.  The default is to
+use the 32-bit ARM instruction set.
+This option automatically enables either 16-bit Thumb-1 or
+mixed 16/32-bit Thumb-2 instructions based on the @option{-mcpu=@var{name}}
+and @option{-march=@var{name}} options.  This option is not passed to the
+assembler. If you want to force assembler files to be interpreted as Thumb code,
+either add a @samp{.thumb} directive to the source or pass the @option{-mthumb}
+option directly to the assembler by prefixing it with @option{-Wa}.
+
+@item -mtpcs-frame
+@opindex mtpcs-frame
+Generate a stack frame that is compliant with the Thumb Procedure Call
+Standard for all non-leaf functions.  (A leaf function is one that does
+not call any other functions.)  The default is @option{-mno-tpcs-frame}.
+
+@item -mtpcs-leaf-frame
+@opindex mtpcs-leaf-frame
+Generate a stack frame that is compliant with the Thumb Procedure Call
+Standard for all leaf functions.  (A leaf function is one that does
+not call any other functions.)  The default is @option{-mno-apcs-leaf-frame}.
+
+@item -mcallee-super-interworking
+@opindex mcallee-super-interworking
+Gives all externally visible functions in the file being compiled an ARM
+instruction set header which switches to Thumb mode before executing the
+rest of the function.  This allows these functions to be called from
+non-interworking code.  This option is not valid in AAPCS configurations
+because interworking is enabled by default.
+
+@item -mcaller-super-interworking
+@opindex mcaller-super-interworking
+Allows calls via function pointers (including virtual functions) to
+execute correctly regardless of whether the target code has been
+compiled for interworking or not.  There is a small overhead in the cost
+of executing a function pointer if this option is enabled.  This option
+is not valid in AAPCS configurations because interworking is enabled
+by default.
+
+@item -mtp=@var{name}
+@opindex mtp
+Specify the access model for the thread local storage pointer.  The valid
+models are @option{soft}, which generates calls to @code{__aeabi_read_tp},
+@option{cp15}, which fetches the thread pointer from @code{cp15} directly
+(supported in the arm6k architecture), and @option{auto}, which uses the
+best available method for the selected processor.  The default setting is
+@option{auto}.
+
+@item -mword-relocations
+@opindex mword-relocations
+Only generate absolute relocations on word sized values (i.e. R_ARM_ABS32).
+This is enabled by default on targets (uClinux, SymbianOS) where the runtime
+loader imposes this restriction, and when @option{-fpic} or @option{-fPIC}
+is specified.
+
+@item -mfix-cortex-m3-ldrd
+@opindex mfix-cortex-m3-ldrd
+Some Cortex-M3 cores can cause data corruption when @code{ldrd} instructions
+with overlapping destination and base registers are used.  This option avoids
+generating these instructions.  This option is enabled by default when
+@option{-mcpu=cortex-m3} is specified.
+
+@end table
+
+@node AVR Options
+@subsection AVR Options
+@cindex AVR Options
+
+These options are defined for AVR implementations:
+
+@table @gcctabopt
+@item -mmcu=@var{mcu}
+@opindex mmcu
+Specify ATMEL AVR instruction set or MCU type.
+
+Instruction set avr1 is for the minimal AVR core, not supported by the C
+compiler, only for assembler programs (MCU types: at90s1200, attiny10,
+attiny11, attiny12, attiny15, attiny28).
+
+Instruction set avr2 (default) is for the classic AVR core with up to
+8K program memory space (MCU types: at90s2313, at90s2323, attiny22,
+at90s2333, at90s2343, at90s4414, at90s4433, at90s4434, at90s8515,
+at90c8534, at90s8535).
+
+Instruction set avr3 is for the classic AVR core with up to 128K program
+memory space (MCU types: atmega103, atmega603, at43usb320, at76c711).
+
+Instruction set avr4 is for the enhanced AVR core with up to 8K program
+memory space (MCU types: atmega8, atmega83, atmega85).
+
+Instruction set avr5 is for the enhanced AVR core with up to 128K program
+memory space (MCU types: atmega16, atmega161, atmega163, atmega32, atmega323,
+atmega64, atmega128, at43usb355, at94k).
+
+@item -mno-interrupts
+@opindex mno-interrupts
+Generated code is not compatible with hardware interrupts.
+Code size will be smaller.
+
+@item -mcall-prologues
+@opindex mcall-prologues
+Functions prologues/epilogues expanded as call to appropriate
+subroutines.  Code size will be smaller.
+
+@item -mtiny-stack
+@opindex mtiny-stack
+Change only the low 8 bits of the stack pointer.
+
+@item -mint8
+@opindex mint8
+Assume int to be 8 bit integer.  This affects the sizes of all types: A
+char will be 1 byte, an int will be 1 byte, a long will be 2 bytes
+and long long will be 4 bytes.  Please note that this option does not
+comply to the C standards, but it will provide you with smaller code
+size.
+@end table
+
+@subsubsection @code{EIND} and Devices with more than 128k Bytes of Flash
+
+Pointers in the implementation are 16 bits wide.
+The address of a function or label is represented as word address so
+that indirect jumps and calls can address any code address in the
+range of 64k words.
+
+In order to faciliate indirect jump on devices with more than 128k
+bytes of program memory space, there is a special function register called
+@code{EIND} that serves as most significant part of the target address
+when @code{EICALL} or @code{EIJMP} instructions are used.
+
+Indirect jumps and calls on these devices are handled as follows and
+are subject to some limitations:
+
+@itemize @bullet
+
+@item
+The compiler never sets @code{EIND}.
+
+@item
+The startup code from libgcc never sets @code{EIND}.
+Notice that startup code is a blend of code from libgcc and avr-libc.
+For the impact of avr-libc on @code{EIND}, see the
+@w{@uref{http://nongnu.org/avr-libc/user-manual,avr-libc user manual}}.
+
+@item
+The compiler uses @code{EIND} implicitely in @code{EICALL}/@code{EIJMP}
+instructions or might read @code{EIND} directly.
+
+@item
+The compiler assumes that @code{EIND} never changes during the startup
+code or run of the application. In particular, @code{EIND} is not
+saved/restored in function or interrupt service routine
+prologue/epilogue.
+
+@item
+It is legitimate for user-specific startup code to set up @code{EIND}
+early, for example by means of initialization code located in
+section @code{.init3}, and thus prior to general startup code that
+initializes RAM and calls constructors.
+
+@item
+For indirect calls to functions and computed goto, the linker will
+generate @emph{stubs}. Stubs are jump pads sometimes also called
+@emph{trampolines}. Thus, the indirect call/jump will jump to such a stub.
+The stub contains a direct jump to the desired address.
+
+@item
+Stubs will be generated automatically by the linker if
+the following two conditions are met:
+@itemize @minus
+
+@item The address of a label is taken by means of the @code{gs} modifier
+(short for @emph{generate stubs}) like so:
+@example
+LDI r24, lo8(gs(@var{func}))
+LDI r25, hi8(gs(@var{func}))
+@end example
+@item The final location of that label is in a code segment
+@emph{outside} the segment where the stubs are located.
+@end itemize
+
+@item
+The compiler will emit such @code{gs} modifiers for code labels in the
+following situations:
+@itemize @minus
+@item Taking address of a function or code label.
+@item Computed goto.
+@item If prologue-save function is used, see @option{-mcall-prologues}
+command line option.
+@item Switch/case dispatch tables. If you do not want such dispatch
+tables you can specify the @option{-fno-jump-tables} command line option.
+@item C and C++ constructors/destructors called during startup/shutdown.
+@item If the tools hit a @code{gs()} modifier explained above.
+@end itemize
+
+@item
+The default linker script is arranged for code with @code{EIND = 0}.
+If code is supposed to work for a setup with @code{EIND != 0}, a custom
+linker script has to be used in order to place the sections whose
+name start with @code{.trampolines} into the segment where @code{EIND}
+points to.
+
+@item
+Jumping to non-symbolic addresses like so is @emph{not} supported:
+
+@example
+int main (void)
+@{
+    /* Call function at word address 0x2 */
+    return ((int(*)(void)) 0x2)();
+@}
+@end example
+
+Instead, a stub has to be set up:
+
+@example
+int main (void)
+@{
+    extern int func_4 (void);
+
+    /* Call function at byte address 0x4 */
+    return func_4();
+@}
+@end example
+
+and the application be linked with @code{-Wl,--defsym,func_4=0x4}.
+Alternatively, @code{func_4} can be defined in the linker script.
+@end itemize
+
+@node Blackfin Options
+@subsection Blackfin Options
+@cindex Blackfin Options
+
+@table @gcctabopt
+@item -mcpu=@var{cpu}@r{[}-@var{sirevision}@r{]}
+@opindex mcpu=
+Specifies the name of the target Blackfin processor.  Currently, @var{cpu}
+can be one of @samp{bf512}, @samp{bf514}, @samp{bf516}, @samp{bf518},
+@samp{bf522}, @samp{bf523}, @samp{bf524}, @samp{bf525}, @samp{bf526},
+@samp{bf527}, @samp{bf531}, @samp{bf532}, @samp{bf533},
+@samp{bf534}, @samp{bf536}, @samp{bf537}, @samp{bf538}, @samp{bf539},
+@samp{bf542}, @samp{bf544}, @samp{bf547}, @samp{bf548}, @samp{bf549},
+@samp{bf542m}, @samp{bf544m}, @samp{bf547m}, @samp{bf548m}, @samp{bf549m},
+@samp{bf561}.
+The optional @var{sirevision} specifies the silicon revision of the target
+Blackfin processor.  Any workarounds available for the targeted silicon revision
+will be enabled.  If @var{sirevision} is @samp{none}, no workarounds are enabled.
+If @var{sirevision} is @samp{any}, all workarounds for the targeted processor
+will be enabled.  The @code{__SILICON_REVISION__} macro is defined to two
+hexadecimal digits representing the major and minor numbers in the silicon
+revision.  If @var{sirevision} is @samp{none}, the @code{__SILICON_REVISION__}
+is not defined.  If @var{sirevision} is @samp{any}, the
+@code{__SILICON_REVISION__} is defined to be @code{0xffff}.
+If this optional @var{sirevision} is not used, GCC assumes the latest known
+silicon revision of the targeted Blackfin processor.
+
+Support for @samp{bf561} is incomplete.  For @samp{bf561},
+Only the processor macro is defined.
+Without this option, @samp{bf532} is used as the processor by default.
+The corresponding predefined processor macros for @var{cpu} is to
+be defined.  And for @samp{bfin-elf} toolchain, this causes the hardware BSP
+provided by libgloss to be linked in if @option{-msim} is not given.
+
+@item -msim
+@opindex msim
+Specifies that the program will be run on the simulator.  This causes
+the simulator BSP provided by libgloss to be linked in.  This option
+has effect only for @samp{bfin-elf} toolchain.
+Certain other options, such as @option{-mid-shared-library} and
+@option{-mfdpic}, imply @option{-msim}.
+
+@item -momit-leaf-frame-pointer
+@opindex momit-leaf-frame-pointer
+Don't keep the frame pointer in a register for leaf functions.  This
+avoids the instructions to save, set up and restore frame pointers and
+makes an extra register available in leaf functions.  The option
+@option{-fomit-frame-pointer} removes the frame pointer for all functions
+which might make debugging harder.
+
+@item -mspecld-anomaly
+@opindex mspecld-anomaly
+When enabled, the compiler will ensure that the generated code does not
+contain speculative loads after jump instructions. If this option is used,
+@code{__WORKAROUND_SPECULATIVE_LOADS} is defined.
+
+@item -mno-specld-anomaly
+@opindex mno-specld-anomaly
+Don't generate extra code to prevent speculative loads from occurring.
+
+@item -mcsync-anomaly
+@opindex mcsync-anomaly
+When enabled, the compiler will ensure that the generated code does not
+contain CSYNC or SSYNC instructions too soon after conditional branches.
+If this option is used, @code{__WORKAROUND_SPECULATIVE_SYNCS} is defined.
+
+@item -mno-csync-anomaly
+@opindex mno-csync-anomaly
+Don't generate extra code to prevent CSYNC or SSYNC instructions from
+occurring too soon after a conditional branch.
+
+@item -mlow-64k
+@opindex mlow-64k
+When enabled, the compiler is free to take advantage of the knowledge that
+the entire program fits into the low 64k of memory.
+
+@item -mno-low-64k
+@opindex mno-low-64k
+Assume that the program is arbitrarily large.  This is the default.
+
+@item -mstack-check-l1
+@opindex mstack-check-l1
+Do stack checking using information placed into L1 scratchpad memory by the
+uClinux kernel.
+
+@item -mid-shared-library
+@opindex mid-shared-library
+Generate code that supports shared libraries via the library ID method.
+This allows for execute in place and shared libraries in an environment
+without virtual memory management.  This option implies @option{-fPIC}.
+With a @samp{bfin-elf} target, this option implies @option{-msim}.
+
+@item -mno-id-shared-library
+@opindex mno-id-shared-library
+Generate code that doesn't assume ID based shared libraries are being used.
+This is the default.
+
+@item -mleaf-id-shared-library
+@opindex mleaf-id-shared-library
+Generate code that supports shared libraries via the library ID method,
+but assumes that this library or executable won't link against any other
+ID shared libraries.  That allows the compiler to use faster code for jumps
+and calls.
+
+@item -mno-leaf-id-shared-library
+@opindex mno-leaf-id-shared-library
+Do not assume that the code being compiled won't link against any ID shared
+libraries.  Slower code will be generated for jump and call insns.
+
+@item -mshared-library-id=n
+@opindex mshared-library-id
+Specified the identification number of the ID based shared library being
+compiled.  Specifying a value of 0 will generate more compact code, specifying
+other values will force the allocation of that number to the current
+library but is no more space or time efficient than omitting this option.
+
+@item -msep-data
+@opindex msep-data
+Generate code that allows the data segment to be located in a different
+area of memory from the text segment.  This allows for execute in place in
+an environment without virtual memory management by eliminating relocations
+against the text section.
+
+@item -mno-sep-data
+@opindex mno-sep-data
+Generate code that assumes that the data segment follows the text segment.
+This is the default.
+
+@item -mlong-calls
+@itemx -mno-long-calls
+@opindex mlong-calls
+@opindex mno-long-calls
+Tells the compiler to perform function calls by first loading the
+address of the function into a register and then performing a subroutine
+call on this register.  This switch is needed if the target function
+will lie outside of the 24 bit addressing range of the offset based
+version of subroutine call instruction.
+
+This feature is not enabled by default.  Specifying
+@option{-mno-long-calls} will restore the default behavior.  Note these
+switches have no effect on how the compiler generates code to handle
+function calls via function pointers.
+
+@item -mfast-fp
+@opindex mfast-fp
+Link with the fast floating-point library. This library relaxes some of
+the IEEE floating-point standard's rules for checking inputs against
+Not-a-Number (NAN), in the interest of performance.
+
+@item -minline-plt
+@opindex minline-plt
+Enable inlining of PLT entries in function calls to functions that are
+not known to bind locally.  It has no effect without @option{-mfdpic}.
+
+@item -mmulticore
+@opindex mmulticore
+Build standalone application for multicore Blackfin processor. Proper
+start files and link scripts will be used to support multicore.
+This option defines @code{__BFIN_MULTICORE}. It can only be used with
+@option{-mcpu=bf561@r{[}-@var{sirevision}@r{]}}. It can be used with
+@option{-mcorea} or @option{-mcoreb}. If it's used without
+@option{-mcorea} or @option{-mcoreb}, single application/dual core
+programming model is used. In this model, the main function of Core B
+should be named as coreb_main. If it's used with @option{-mcorea} or
+@option{-mcoreb}, one application per core programming model is used.
+If this option is not used, single core application programming
+model is used.
+
+@item -mcorea
+@opindex mcorea
+Build standalone application for Core A of BF561 when using
+one application per core programming model. Proper start files
+and link scripts will be used to support Core A. This option
+defines @code{__BFIN_COREA}. It must be used with @option{-mmulticore}.
+
+@item -mcoreb
+@opindex mcoreb
+Build standalone application for Core B of BF561 when using
+one application per core programming model. Proper start files
+and link scripts will be used to support Core B. This option
+defines @code{__BFIN_COREB}. When this option is used, coreb_main
+should be used instead of main. It must be used with
+@option{-mmulticore}.
+
+@item -msdram
+@opindex msdram
+Build standalone application for SDRAM. Proper start files and
+link scripts will be used to put the application into SDRAM.
+Loader should initialize SDRAM before loading the application
+into SDRAM. This option defines @code{__BFIN_SDRAM}.
+
+@item -micplb
+@opindex micplb
+Assume that ICPLBs are enabled at runtime.  This has an effect on certain
+anomaly workarounds.  For Linux targets, the default is to assume ICPLBs
+are enabled; for standalone applications the default is off.
+@end table
+
+@node CRIS Options
+@subsection CRIS Options
+@cindex CRIS Options
+
+These options are defined specifically for the CRIS ports.
+
+@table @gcctabopt
+@item -march=@var{architecture-type}
+@itemx -mcpu=@var{architecture-type}
+@opindex march
+@opindex mcpu
+Generate code for the specified architecture.  The choices for
+@var{architecture-type} are @samp{v3}, @samp{v8} and @samp{v10} for
+respectively ETRAX@w{ }4, ETRAX@w{ }100, and ETRAX@w{ }100@w{ }LX@.
+Default is @samp{v0} except for cris-axis-linux-gnu, where the default is
+@samp{v10}.
+
+@item -mtune=@var{architecture-type}
+@opindex mtune
+Tune to @var{architecture-type} everything applicable about the generated
+code, except for the ABI and the set of available instructions.  The
+choices for @var{architecture-type} are the same as for
+@option{-march=@var{architecture-type}}.
+
+@item -mmax-stack-frame=@var{n}
+@opindex mmax-stack-frame
+Warn when the stack frame of a function exceeds @var{n} bytes.
+
+@item -metrax4
+@itemx -metrax100
+@opindex metrax4
+@opindex metrax100
+The options @option{-metrax4} and @option{-metrax100} are synonyms for
+@option{-march=v3} and @option{-march=v8} respectively.
+
+@item -mmul-bug-workaround
+@itemx -mno-mul-bug-workaround
+@opindex mmul-bug-workaround
+@opindex mno-mul-bug-workaround
+Work around a bug in the @code{muls} and @code{mulu} instructions for CPU
+models where it applies.  This option is active by default.
+
+@item -mpdebug
+@opindex mpdebug
+Enable CRIS-specific verbose debug-related information in the assembly
+code.  This option also has the effect to turn off the @samp{#NO_APP}
+formatted-code indicator to the assembler at the beginning of the
+assembly file.
+
+@item -mcc-init
+@opindex mcc-init
+Do not use condition-code results from previous instruction; always emit
+compare and test instructions before use of condition codes.
+
+@item -mno-side-effects
+@opindex mno-side-effects
+Do not emit instructions with side-effects in addressing modes other than
+post-increment.
+
+@item -mstack-align
+@itemx -mno-stack-align
+@itemx -mdata-align
+@itemx -mno-data-align
+@itemx -mconst-align
+@itemx -mno-const-align
+@opindex mstack-align
+@opindex mno-stack-align
+@opindex mdata-align
+@opindex mno-data-align
+@opindex mconst-align
+@opindex mno-const-align
+These options (no-options) arranges (eliminate arrangements) for the
+stack-frame, individual data and constants to be aligned for the maximum
+single data access size for the chosen CPU model.  The default is to
+arrange for 32-bit alignment.  ABI details such as structure layout are
+not affected by these options.
+
+@item -m32-bit
+@itemx -m16-bit
+@itemx -m8-bit
+@opindex m32-bit
+@opindex m16-bit
+@opindex m8-bit
+Similar to the stack- data- and const-align options above, these options
+arrange for stack-frame, writable data and constants to all be 32-bit,
+16-bit or 8-bit aligned.  The default is 32-bit alignment.
+
+@item -mno-prologue-epilogue
+@itemx -mprologue-epilogue
+@opindex mno-prologue-epilogue
+@opindex mprologue-epilogue
+With @option{-mno-prologue-epilogue}, the normal function prologue and
+epilogue that sets up the stack-frame are omitted and no return
+instructions or return sequences are generated in the code.  Use this
+option only together with visual inspection of the compiled code: no
+warnings or errors are generated when call-saved registers must be saved,
+or storage for local variable needs to be allocated.
+
+@item -mno-gotplt
+@itemx -mgotplt
+@opindex mno-gotplt
+@opindex mgotplt
+With @option{-fpic} and @option{-fPIC}, don't generate (do generate)
+instruction sequences that load addresses for functions from the PLT part
+of the GOT rather than (traditional on other architectures) calls to the
+PLT@.  The default is @option{-mgotplt}.
+
+@item -melf
+@opindex melf
+Legacy no-op option only recognized with the cris-axis-elf and
+cris-axis-linux-gnu targets.
+
+@item -mlinux
+@opindex mlinux
+Legacy no-op option only recognized with the cris-axis-linux-gnu target.
+
+@item -sim
+@opindex sim
+This option, recognized for the cris-axis-elf arranges
+to link with input-output functions from a simulator library.  Code,
+initialized data and zero-initialized data are allocated consecutively.
+
+@item -sim2
+@opindex sim2
+Like @option{-sim}, but pass linker options to locate initialized data at
+0x40000000 and zero-initialized data at 0x80000000.
+@end table
+
+@node CRX Options
+@subsection CRX Options
+@cindex CRX Options
+
+These options are defined specifically for the CRX ports.
+
+@table @gcctabopt
+
+@item -mmac
+@opindex mmac
+Enable the use of multiply-accumulate instructions. Disabled by default.
+
+@item -mpush-args
+@opindex mpush-args
+Push instructions will be used to pass outgoing arguments when functions
+are called. Enabled by default.
+@end table
+
+@node Darwin Options
+@subsection Darwin Options
+@cindex Darwin options
+
+These options are defined for all architectures running the Darwin operating
+system.
+
+FSF GCC on Darwin does not create ``fat'' object files; it will create
+an object file for the single architecture that it was built to
+target.  Apple's GCC on Darwin does create ``fat'' files if multiple
+@option{-arch} options are used; it does so by running the compiler or
+linker multiple times and joining the results together with
+@file{lipo}.
+
+The subtype of the file created (like @samp{ppc7400} or @samp{ppc970} or
+@samp{i686}) is determined by the flags that specify the ISA
+that GCC is targetting, like @option{-mcpu} or @option{-march}.  The
+@option{-force_cpusubtype_ALL} option can be used to override this.
+
+The Darwin tools vary in their behavior when presented with an ISA
+mismatch.  The assembler, @file{as}, will only permit instructions to
+be used that are valid for the subtype of the file it is generating,
+so you cannot put 64-bit instructions in a @samp{ppc750} object file.
+The linker for shared libraries, @file{/usr/bin/libtool}, will fail
+and print an error if asked to create a shared library with a less
+restrictive subtype than its input files (for instance, trying to put
+a @samp{ppc970} object file in a @samp{ppc7400} library).  The linker
+for executables, @file{ld}, will quietly give the executable the most
+restrictive subtype of any of its input files.
+
+@table @gcctabopt
+@item -F@var{dir}
+@opindex F
+Add the framework directory @var{dir} to the head of the list of
+directories to be searched for header files.  These directories are
+interleaved with those specified by @option{-I} options and are
+scanned in a left-to-right order.
+
+A framework directory is a directory with frameworks in it.  A
+framework is a directory with a @samp{"Headers"} and/or
+@samp{"PrivateHeaders"} directory contained directly in it that ends
+in @samp{".framework"}.  The name of a framework is the name of this
+directory excluding the @samp{".framework"}.  Headers associated with
+the framework are found in one of those two directories, with
+@samp{"Headers"} being searched first.  A subframework is a framework
+directory that is in a framework's @samp{"Frameworks"} directory.
+Includes of subframework headers can only appear in a header of a
+framework that contains the subframework, or in a sibling subframework
+header.  Two subframeworks are siblings if they occur in the same
+framework.  A subframework should not have the same name as a
+framework, a warning will be issued if this is violated.  Currently a
+subframework cannot have subframeworks, in the future, the mechanism
+may be extended to support this.  The standard frameworks can be found
+in @samp{"/System/Library/Frameworks"} and
+@samp{"/Library/Frameworks"}.  An example include looks like
+@code{#include <Framework/header.h>}, where @samp{Framework} denotes
+the name of the framework and header.h is found in the
+@samp{"PrivateHeaders"} or @samp{"Headers"} directory.
+
+@item -iframework@var{dir}
+@opindex iframework
+Like @option{-F} except the directory is a treated as a system
+directory.  The main difference between this @option{-iframework} and
+@option{-F} is that with @option{-iframework} the compiler does not
+warn about constructs contained within header files found via
+@var{dir}.  This option is valid only for the C family of languages.
+
+@item -gused
+@opindex gused
+Emit debugging information for symbols that are used.  For STABS
+debugging format, this enables @option{-feliminate-unused-debug-symbols}.
+This is by default ON@.
+
+@item -gfull
+@opindex gfull
+Emit debugging information for all symbols and types.
+
+@item -mmacosx-version-min=@var{version}
+The earliest version of MacOS X that this executable will run on
+is @var{version}.  Typical values of @var{version} include @code{10.1},
+@code{10.2}, and @code{10.3.9}.
+
+If the compiler was built to use the system's headers by default,
+then the default for this option is the system version on which the
+compiler is running, otherwise the default is to make choices which
+are compatible with as many systems and code bases as possible.
+
+@item -mkernel
+@opindex mkernel
+Enable kernel development mode.  The @option{-mkernel} option sets
+@option{-static}, @option{-fno-common}, @option{-fno-cxa-atexit},
+@option{-fno-exceptions}, @option{-fno-non-call-exceptions},
+@option{-fapple-kext}, @option{-fno-weak} and @option{-fno-rtti} where
+applicable.  This mode also sets @option{-mno-altivec},
+@option{-msoft-float}, @option{-fno-builtin} and
+@option{-mlong-branch} for PowerPC targets.
+
+@item -mone-byte-bool
+@opindex mone-byte-bool
+Override the defaults for @samp{bool} so that @samp{sizeof(bool)==1}.
+By default @samp{sizeof(bool)} is @samp{4} when compiling for
+Darwin/PowerPC and @samp{1} when compiling for Darwin/x86, so this
+option has no effect on x86.
+
+@strong{Warning:} The @option{-mone-byte-bool} switch causes GCC
+to generate code that is not binary compatible with code generated
+without that switch.  Using this switch may require recompiling all
+other modules in a program, including system libraries.  Use this
+switch to conform to a non-default data model.
+
+@item -mfix-and-continue
+@itemx -ffix-and-continue
+@itemx -findirect-data
+@opindex mfix-and-continue
+@opindex ffix-and-continue
+@opindex findirect-data
+Generate code suitable for fast turn around development.  Needed to
+enable gdb to dynamically load @code{.o} files into already running
+programs.  @option{-findirect-data} and @option{-ffix-and-continue}
+are provided for backwards compatibility.
+
+@item -all_load
+@opindex all_load
+Loads all members of static archive libraries.
+See man ld(1) for more information.
+
+@item -arch_errors_fatal
+@opindex arch_errors_fatal
+Cause the errors having to do with files that have the wrong architecture
+to be fatal.
+
+@item -bind_at_load
+@opindex bind_at_load
+Causes the output file to be marked such that the dynamic linker will
+bind all undefined references when the file is loaded or launched.
+
+@item -bundle
+@opindex bundle
+Produce a Mach-o bundle format file.
+See man ld(1) for more information.
+
+@item -bundle_loader @var{executable}
+@opindex bundle_loader
+This option specifies the @var{executable} that will be loading the build
+output file being linked.  See man ld(1) for more information.
+
+@item -dynamiclib
+@opindex dynamiclib
+When passed this option, GCC will produce a dynamic library instead of
+an executable when linking, using the Darwin @file{libtool} command.
+
+@item -force_cpusubtype_ALL
+@opindex force_cpusubtype_ALL
+This causes GCC's output file to have the @var{ALL} subtype, instead of
+one controlled by the @option{-mcpu} or @option{-march} option.
+
+@item -allowable_client  @var{client_name}
+@itemx -client_name
+@itemx -compatibility_version
+@itemx -current_version
+@itemx -dead_strip
+@itemx -dependency-file
+@itemx -dylib_file
+@itemx -dylinker_install_name
+@itemx -dynamic
+@itemx -exported_symbols_list
+@itemx -filelist
+@need 800
+@itemx -flat_namespace
+@itemx -force_flat_namespace
+@itemx -headerpad_max_install_names
+@itemx -image_base
+@itemx -init
+@itemx -install_name
+@itemx -keep_private_externs
+@itemx -multi_module
+@itemx -multiply_defined
+@itemx -multiply_defined_unused
+@need 800
+@itemx -noall_load
+@itemx -no_dead_strip_inits_and_terms
+@itemx -nofixprebinding
+@itemx -nomultidefs
+@itemx -noprebind
+@itemx -noseglinkedit
+@itemx -pagezero_size
+@itemx -prebind
+@itemx -prebind_all_twolevel_modules
+@itemx -private_bundle
+@need 800
+@itemx -read_only_relocs
+@itemx -sectalign
+@itemx -sectobjectsymbols
+@itemx -whyload
+@itemx -seg1addr
+@itemx -sectcreate
+@itemx -sectobjectsymbols
+@itemx -sectorder
+@itemx -segaddr
+@itemx -segs_read_only_addr
+@need 800
+@itemx -segs_read_write_addr
+@itemx -seg_addr_table
+@itemx -seg_addr_table_filename
+@itemx -seglinkedit
+@itemx -segprot
+@itemx -segs_read_only_addr
+@itemx -segs_read_write_addr
+@itemx -single_module
+@itemx -static
+@itemx -sub_library
+@need 800
+@itemx -sub_umbrella
+@itemx -twolevel_namespace
+@itemx -umbrella
+@itemx -undefined
+@itemx -unexported_symbols_list
+@itemx -weak_reference_mismatches
+@itemx -whatsloaded
+@opindex allowable_client
+@opindex client_name
+@opindex compatibility_version
+@opindex current_version
+@opindex dead_strip
+@opindex dependency-file
+@opindex dylib_file
+@opindex dylinker_install_name
+@opindex dynamic
+@opindex exported_symbols_list
+@opindex filelist
+@opindex flat_namespace
+@opindex force_flat_namespace
+@opindex headerpad_max_install_names
+@opindex image_base
+@opindex init
+@opindex install_name
+@opindex keep_private_externs
+@opindex multi_module
+@opindex multiply_defined
+@opindex multiply_defined_unused
+@opindex noall_load
+@opindex no_dead_strip_inits_and_terms
+@opindex nofixprebinding
+@opindex nomultidefs
+@opindex noprebind
+@opindex noseglinkedit
+@opindex pagezero_size
+@opindex prebind
+@opindex prebind_all_twolevel_modules
+@opindex private_bundle
+@opindex read_only_relocs
+@opindex sectalign
+@opindex sectobjectsymbols
+@opindex whyload
+@opindex seg1addr
+@opindex sectcreate
+@opindex sectobjectsymbols
+@opindex sectorder
+@opindex segaddr
+@opindex segs_read_only_addr
+@opindex segs_read_write_addr
+@opindex seg_addr_table
+@opindex seg_addr_table_filename
+@opindex seglinkedit
+@opindex segprot
+@opindex segs_read_only_addr
+@opindex segs_read_write_addr
+@opindex single_module
+@opindex static
+@opindex sub_library
+@opindex sub_umbrella
+@opindex twolevel_namespace
+@opindex umbrella
+@opindex undefined
+@opindex unexported_symbols_list
+@opindex weak_reference_mismatches
+@opindex whatsloaded
+These options are passed to the Darwin linker.  The Darwin linker man page
+describes them in detail.
+@end table
+
+@node DEC Alpha Options
+@subsection DEC Alpha Options
+
+These @samp{-m} options are defined for the DEC Alpha implementations:
+
+@table @gcctabopt
+@item -mno-soft-float
+@itemx -msoft-float
+@opindex mno-soft-float
+@opindex msoft-float
+Use (do not use) the hardware floating-point instructions for
+floating-point operations.  When @option{-msoft-float} is specified,
+functions in @file{libgcc.a} will be used to perform floating-point
+operations.  Unless they are replaced by routines that emulate the
+floating-point operations, or compiled in such a way as to call such
+emulations routines, these routines will issue floating-point
+operations.   If you are compiling for an Alpha without floating-point
+operations, you must ensure that the library is built so as not to call
+them.
+
+Note that Alpha implementations without floating-point operations are
+required to have floating-point registers.
+
+@item -mfp-reg
+@itemx -mno-fp-regs
+@opindex mfp-reg
+@opindex mno-fp-regs
+Generate code that uses (does not use) the floating-point register set.
+@option{-mno-fp-regs} implies @option{-msoft-float}.  If the floating-point
+register set is not used, floating point operands are passed in integer
+registers as if they were integers and floating-point results are passed
+in @code{$0} instead of @code{$f0}.  This is a non-standard calling sequence,
+so any function with a floating-point argument or return value called by code
+compiled with @option{-mno-fp-regs} must also be compiled with that
+option.
+
+A typical use of this option is building a kernel that does not use,
+and hence need not save and restore, any floating-point registers.
+
+@item -mieee
+@opindex mieee
+The Alpha architecture implements floating-point hardware optimized for
+maximum performance.  It is mostly compliant with the IEEE floating
+point standard.  However, for full compliance, software assistance is
+required.  This option generates code fully IEEE compliant code
+@emph{except} that the @var{inexact-flag} is not maintained (see below).
+If this option is turned on, the preprocessor macro @code{_IEEE_FP} is
+defined during compilation.  The resulting code is less efficient but is
+able to correctly support denormalized numbers and exceptional IEEE
+values such as not-a-number and plus/minus infinity.  Other Alpha
+compilers call this option @option{-ieee_with_no_inexact}.
+
+@item -mieee-with-inexact
+@opindex mieee-with-inexact
+This is like @option{-mieee} except the generated code also maintains
+the IEEE @var{inexact-flag}.  Turning on this option causes the
+generated code to implement fully-compliant IEEE math.  In addition to
+@code{_IEEE_FP}, @code{_IEEE_FP_EXACT} is defined as a preprocessor
+macro.  On some Alpha implementations the resulting code may execute
+significantly slower than the code generated by default.  Since there is
+very little code that depends on the @var{inexact-flag}, you should
+normally not specify this option.  Other Alpha compilers call this
+option @option{-ieee_with_inexact}.
+
+@item -mfp-trap-mode=@var{trap-mode}
+@opindex mfp-trap-mode
+This option controls what floating-point related traps are enabled.
+Other Alpha compilers call this option @option{-fptm @var{trap-mode}}.
+The trap mode can be set to one of four values:
+
+@table @samp
+@item n
+This is the default (normal) setting.  The only traps that are enabled
+are the ones that cannot be disabled in software (e.g., division by zero
+trap).
+
+@item u
+In addition to the traps enabled by @samp{n}, underflow traps are enabled
+as well.
+
+@item su
+Like @samp{u}, but the instructions are marked to be safe for software
+completion (see Alpha architecture manual for details).
+
+@item sui
+Like @samp{su}, but inexact traps are enabled as well.
+@end table
+
+@item -mfp-rounding-mode=@var{rounding-mode}
+@opindex mfp-rounding-mode
+Selects the IEEE rounding mode.  Other Alpha compilers call this option
+@option{-fprm @var{rounding-mode}}.  The @var{rounding-mode} can be one
+of:
+
+@table @samp
+@item n
+Normal IEEE rounding mode.  Floating point numbers are rounded towards
+the nearest machine number or towards the even machine number in case
+of a tie.
+
+@item m
+Round towards minus infinity.
+
+@item c
+Chopped rounding mode.  Floating point numbers are rounded towards zero.
+
+@item d
+Dynamic rounding mode.  A field in the floating point control register
+(@var{fpcr}, see Alpha architecture reference manual) controls the
+rounding mode in effect.  The C library initializes this register for
+rounding towards plus infinity.  Thus, unless your program modifies the
+@var{fpcr}, @samp{d} corresponds to round towards plus infinity.
+@end table
+
+@item -mtrap-precision=@var{trap-precision}
+@opindex mtrap-precision
+In the Alpha architecture, floating point traps are imprecise.  This
+means without software assistance it is impossible to recover from a
+floating trap and program execution normally needs to be terminated.
+GCC can generate code that can assist operating system trap handlers
+in determining the exact location that caused a floating point trap.
+Depending on the requirements of an application, different levels of
+precisions can be selected:
+
+@table @samp
+@item p
+Program precision.  This option is the default and means a trap handler
+can only identify which program caused a floating point exception.
+
+@item f
+Function precision.  The trap handler can determine the function that
+caused a floating point exception.
+
+@item i
+Instruction precision.  The trap handler can determine the exact
+instruction that caused a floating point exception.
+@end table
+
+Other Alpha compilers provide the equivalent options called
+@option{-scope_safe} and @option{-resumption_safe}.
+
+@item -mieee-conformant
+@opindex mieee-conformant
+This option marks the generated code as IEEE conformant.  You must not
+use this option unless you also specify @option{-mtrap-precision=i} and either
+@option{-mfp-trap-mode=su} or @option{-mfp-trap-mode=sui}.  Its only effect
+is to emit the line @samp{.eflag 48} in the function prologue of the
+generated assembly file.  Under DEC Unix, this has the effect that
+IEEE-conformant math library routines will be linked in.
+
+@item -mbuild-constants
+@opindex mbuild-constants
+Normally GCC examines a 32- or 64-bit integer constant to
+see if it can construct it from smaller constants in two or three
+instructions.  If it cannot, it will output the constant as a literal and
+generate code to load it from the data segment at runtime.
+
+Use this option to require GCC to construct @emph{all} integer constants
+using code, even if it takes more instructions (the maximum is six).
+
+You would typically use this option to build a shared library dynamic
+loader.  Itself a shared library, it must relocate itself in memory
+before it can find the variables and constants in its own data segment.
+
+@item -malpha-as
+@itemx -mgas
+@opindex malpha-as
+@opindex mgas
+Select whether to generate code to be assembled by the vendor-supplied
+assembler (@option{-malpha-as}) or by the GNU assembler @option{-mgas}.
+
+@item -mbwx
+@itemx -mno-bwx
+@itemx -mcix
+@itemx -mno-cix
+@itemx -mfix
+@itemx -mno-fix
+@itemx -mmax
+@itemx -mno-max
+@opindex mbwx
+@opindex mno-bwx
+@opindex mcix
+@opindex mno-cix
+@opindex mfix
+@opindex mno-fix
+@opindex mmax
+@opindex mno-max
+Indicate whether GCC should generate code to use the optional BWX,
+CIX, FIX and MAX instruction sets.  The default is to use the instruction
+sets supported by the CPU type specified via @option{-mcpu=} option or that
+of the CPU on which GCC was built if none was specified.
+
+@item -mfloat-vax
+@itemx -mfloat-ieee
+@opindex mfloat-vax
+@opindex mfloat-ieee
+Generate code that uses (does not use) VAX F and G floating point
+arithmetic instead of IEEE single and double precision.
+
+@item -mexplicit-relocs
+@itemx -mno-explicit-relocs
+@opindex mexplicit-relocs
+@opindex mno-explicit-relocs
+Older Alpha assemblers provided no way to generate symbol relocations
+except via assembler macros.  Use of these macros does not allow
+optimal instruction scheduling.  GNU binutils as of version 2.12
+supports a new syntax that allows the compiler to explicitly mark
+which relocations should apply to which instructions.  This option
+is mostly useful for debugging, as GCC detects the capabilities of
+the assembler when it is built and sets the default accordingly.
+
+@item -msmall-data
+@itemx -mlarge-data
+@opindex msmall-data
+@opindex mlarge-data
+When @option{-mexplicit-relocs} is in effect, static data is
+accessed via @dfn{gp-relative} relocations.  When @option{-msmall-data}
+is used, objects 8 bytes long or smaller are placed in a @dfn{small data area}
+(the @code{.sdata} and @code{.sbss} sections) and are accessed via
+16-bit relocations off of the @code{$gp} register.  This limits the
+size of the small data area to 64KB, but allows the variables to be
+directly accessed via a single instruction.
+
+The default is @option{-mlarge-data}.  With this option the data area
+is limited to just below 2GB@.  Programs that require more than 2GB of
+data must use @code{malloc} or @code{mmap} to allocate the data in the
+heap instead of in the program's data segment.
+
+When generating code for shared libraries, @option{-fpic} implies
+@option{-msmall-data} and @option{-fPIC} implies @option{-mlarge-data}.
+
+@item -msmall-text
+@itemx -mlarge-text
+@opindex msmall-text
+@opindex mlarge-text
+When @option{-msmall-text} is used, the compiler assumes that the
+code of the entire program (or shared library) fits in 4MB, and is
+thus reachable with a branch instruction.  When @option{-msmall-data}
+is used, the compiler can assume that all local symbols share the
+same @code{$gp} value, and thus reduce the number of instructions
+required for a function call from 4 to 1.
+
+The default is @option{-mlarge-text}.
+
+@item -mcpu=@var{cpu_type}
+@opindex mcpu
+Set the instruction set and instruction scheduling parameters for
+machine type @var{cpu_type}.  You can specify either the @samp{EV}
+style name or the corresponding chip number.  GCC supports scheduling
+parameters for the EV4, EV5 and EV6 family of processors and will
+choose the default values for the instruction set from the processor
+you specify.  If you do not specify a processor type, GCC will default
+to the processor on which the compiler was built.
+
+Supported values for @var{cpu_type} are
+
+@table @samp
+@item ev4
+@itemx ev45
+@itemx 21064
+Schedules as an EV4 and has no instruction set extensions.
+
+@item ev5
+@itemx 21164
+Schedules as an EV5 and has no instruction set extensions.
+
+@item ev56
+@itemx 21164a
+Schedules as an EV5 and supports the BWX extension.
+
+@item pca56
+@itemx 21164pc
+@itemx 21164PC
+Schedules as an EV5 and supports the BWX and MAX extensions.
+
+@item ev6
+@itemx 21264
+Schedules as an EV6 and supports the BWX, FIX, and MAX extensions.
+
+@item ev67
+@itemx 21264a
+Schedules as an EV6 and supports the BWX, CIX, FIX, and MAX extensions.
+@end table
+
+Native Linux/GNU toolchains also support the value @samp{native},
+which selects the best architecture option for the host processor.
+@option{-mcpu=native} has no effect if GCC does not recognize
+the processor.
+
+@item -mtune=@var{cpu_type}
+@opindex mtune
+Set only the instruction scheduling parameters for machine type
+@var{cpu_type}.  The instruction set is not changed.
+
+Native Linux/GNU toolchains also support the value @samp{native},
+which selects the best architecture option for the host processor.
+@option{-mtune=native} has no effect if GCC does not recognize
+the processor.
+
+@item -mmemory-latency=@var{time}
+@opindex mmemory-latency
+Sets the latency the scheduler should assume for typical memory
+references as seen by the application.  This number is highly
+dependent on the memory access patterns used by the application
+and the size of the external cache on the machine.
+
+Valid options for @var{time} are
+
+@table @samp
+@item @var{number}
+A decimal number representing clock cycles.
+
+@item L1
+@itemx L2
+@itemx L3
+@itemx main
+The compiler contains estimates of the number of clock cycles for
+``typical'' EV4 & EV5 hardware for the Level 1, 2 & 3 caches
+(also called Dcache, Scache, and Bcache), as well as to main memory.
+Note that L3 is only valid for EV5.
+
+@end table
+@end table
+
+@node DEC Alpha/VMS Options
+@subsection DEC Alpha/VMS Options
+
+These @samp{-m} options are defined for the DEC Alpha/VMS implementations:
+
+@table @gcctabopt
+@item -mvms-return-codes
+@opindex mvms-return-codes
+Return VMS condition codes from main.  The default is to return POSIX
+style condition (e.g.@: error) codes.
+
+@item -mdebug-main=@var{prefix}
+@opindex mdebug-main=@var{prefix}
+Flag the first routine whose name starts with @var{prefix} as the main
+routine for the debugger.
+
+@item -mmalloc64
+@opindex mmalloc64
+Default to 64bit memory allocation routines.
+@end table
+
+@node FR30 Options
+@subsection FR30 Options
+@cindex FR30 Options
+
+These options are defined specifically for the FR30 port.
+
+@table @gcctabopt
+
+@item -msmall-model
+@opindex msmall-model
+Use the small address space model.  This can produce smaller code, but
+it does assume that all symbolic values and addresses will fit into a
+20-bit range.
+
+@item -mno-lsim
+@opindex mno-lsim
+Assume that run-time support has been provided and so there is no need
+to include the simulator library (@file{libsim.a}) on the linker
+command line.
+
+@end table
+
+@node FRV Options
+@subsection FRV Options
+@cindex FRV Options
+
+@table @gcctabopt
+@item -mgpr-32
+@opindex mgpr-32
+
+Only use the first 32 general purpose registers.
+
+@item -mgpr-64
+@opindex mgpr-64
+
+Use all 64 general purpose registers.
+
+@item -mfpr-32
+@opindex mfpr-32
+
+Use only the first 32 floating point registers.
+
+@item -mfpr-64
+@opindex mfpr-64
+
+Use all 64 floating point registers
+
+@item -mhard-float
+@opindex mhard-float
+
+Use hardware instructions for floating point operations.
+
+@item -msoft-float
+@opindex msoft-float
+
+Use library routines for floating point operations.
+
+@item -malloc-cc
+@opindex malloc-cc
+
+Dynamically allocate condition code registers.
+
+@item -mfixed-cc
+@opindex mfixed-cc
+
+Do not try to dynamically allocate condition code registers, only
+use @code{icc0} and @code{fcc0}.
+
+@item -mdword
+@opindex mdword
+
+Change ABI to use double word insns.
+
+@item -mno-dword
+@opindex mno-dword
+
+Do not use double word instructions.
+
+@item -mdouble
+@opindex mdouble
+
+Use floating point double instructions.
+
+@item -mno-double
+@opindex mno-double
+
+Do not use floating point double instructions.
+
+@item -mmedia
+@opindex mmedia
+
+Use media instructions.
+
+@item -mno-media
+@opindex mno-media
+
+Do not use media instructions.
+
+@item -mmuladd
+@opindex mmuladd
+
+Use multiply and add/subtract instructions.
+
+@item -mno-muladd
+@opindex mno-muladd
+
+Do not use multiply and add/subtract instructions.
+
+@item -mfdpic
+@opindex mfdpic
+
+Select the FDPIC ABI, that uses function descriptors to represent
+pointers to functions.  Without any PIC/PIE-related options, it
+implies @option{-fPIE}.  With @option{-fpic} or @option{-fpie}, it
+assumes GOT entries and small data are within a 12-bit range from the
+GOT base address; with @option{-fPIC} or @option{-fPIE}, GOT offsets
+are computed with 32 bits.
+With a @samp{bfin-elf} target, this option implies @option{-msim}.
+
+@item -minline-plt
+@opindex minline-plt
+
+Enable inlining of PLT entries in function calls to functions that are
+not known to bind locally.  It has no effect without @option{-mfdpic}.
+It's enabled by default if optimizing for speed and compiling for
+shared libraries (i.e., @option{-fPIC} or @option{-fpic}), or when an
+optimization option such as @option{-O3} or above is present in the
+command line.
+
+@item -mTLS
+@opindex mTLS
+
+Assume a large TLS segment when generating thread-local code.
+
+@item -mtls
+@opindex mtls
+
+Do not assume a large TLS segment when generating thread-local code.
+
+@item -mgprel-ro
+@opindex mgprel-ro
+
+Enable the use of @code{GPREL} relocations in the FDPIC ABI for data
+that is known to be in read-only sections.  It's enabled by default,
+except for @option{-fpic} or @option{-fpie}: even though it may help
+make the global offset table smaller, it trades 1 instruction for 4.
+With @option{-fPIC} or @option{-fPIE}, it trades 3 instructions for 4,
+one of which may be shared by multiple symbols, and it avoids the need
+for a GOT entry for the referenced symbol, so it's more likely to be a
+win.  If it is not, @option{-mno-gprel-ro} can be used to disable it.
+
+@item -multilib-library-pic
+@opindex multilib-library-pic
+
+Link with the (library, not FD) pic libraries.  It's implied by
+@option{-mlibrary-pic}, as well as by @option{-fPIC} and
+@option{-fpic} without @option{-mfdpic}.  You should never have to use
+it explicitly.
+
+@item -mlinked-fp
+@opindex mlinked-fp
+
+Follow the EABI requirement of always creating a frame pointer whenever
+a stack frame is allocated.  This option is enabled by default and can
+be disabled with @option{-mno-linked-fp}.
+
+@item -mlong-calls
+@opindex mlong-calls
+
+Use indirect addressing to call functions outside the current
+compilation unit.  This allows the functions to be placed anywhere
+within the 32-bit address space.
+
+@item -malign-labels
+@opindex malign-labels
+
+Try to align labels to an 8-byte boundary by inserting nops into the
+previous packet.  This option only has an effect when VLIW packing
+is enabled.  It doesn't create new packets; it merely adds nops to
+existing ones.
+
+@item -mlibrary-pic
+@opindex mlibrary-pic
+
+Generate position-independent EABI code.
+
+@item -macc-4
+@opindex macc-4
+
+Use only the first four media accumulator registers.
+
+@item -macc-8
+@opindex macc-8
+
+Use all eight media accumulator registers.
+
+@item -mpack
+@opindex mpack
+
+Pack VLIW instructions.
+
+@item -mno-pack
+@opindex mno-pack
+
+Do not pack VLIW instructions.
+
+@item -mno-eflags
+@opindex mno-eflags
+
+Do not mark ABI switches in e_flags.
+
+@item -mcond-move
+@opindex mcond-move
+
+Enable the use of conditional-move instructions (default).
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -mno-cond-move
+@opindex mno-cond-move
+
+Disable the use of conditional-move instructions.
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -mscc
+@opindex mscc
+
+Enable the use of conditional set instructions (default).
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -mno-scc
+@opindex mno-scc
+
+Disable the use of conditional set instructions.
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -mcond-exec
+@opindex mcond-exec
+
+Enable the use of conditional execution (default).
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -mno-cond-exec
+@opindex mno-cond-exec
+
+Disable the use of conditional execution.
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -mvliw-branch
+@opindex mvliw-branch
+
+Run a pass to pack branches into VLIW instructions (default).
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -mno-vliw-branch
+@opindex mno-vliw-branch
+
+Do not run a pass to pack branches into VLIW instructions.
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -mmulti-cond-exec
+@opindex mmulti-cond-exec
+
+Enable optimization of @code{&&} and @code{||} in conditional execution
+(default).
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -mno-multi-cond-exec
+@opindex mno-multi-cond-exec
+
+Disable optimization of @code{&&} and @code{||} in conditional execution.
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -mnested-cond-exec
+@opindex mnested-cond-exec
+
+Enable nested conditional execution optimizations (default).
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -mno-nested-cond-exec
+@opindex mno-nested-cond-exec
+
+Disable nested conditional execution optimizations.
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -moptimize-membar
+@opindex moptimize-membar
+
+This switch removes redundant @code{membar} instructions from the
+compiler generated code.  It is enabled by default.
+
+@item -mno-optimize-membar
+@opindex mno-optimize-membar
+
+This switch disables the automatic removal of redundant @code{membar}
+instructions from the generated code.
+
+@item -mtomcat-stats
+@opindex mtomcat-stats
+
+Cause gas to print out tomcat statistics.
+
+@item -mcpu=@var{cpu}
+@opindex mcpu
+
+Select the processor type for which to generate code.  Possible values are
+@samp{frv}, @samp{fr550}, @samp{tomcat}, @samp{fr500}, @samp{fr450},
+@samp{fr405}, @samp{fr400}, @samp{fr300} and @samp{simple}.
+
+@end table
+
+@node GNU/Linux Options
+@subsection GNU/Linux Options
+
+These @samp{-m} options are defined for GNU/Linux targets:
+
+@table @gcctabopt
+@item -mglibc
+@opindex mglibc
+Use the GNU C library.  This is the default except
+on @samp{*-*-linux-*uclibc*} and @samp{*-*-linux-*android*} targets.
+
+@item -muclibc
+@opindex muclibc
+Use uClibc C library.  This is the default on
+@samp{*-*-linux-*uclibc*} targets.
+
+@item -mbionic
+@opindex mbionic
+Use Bionic C library.  This is the default on
+@samp{*-*-linux-*android*} targets.
+
+@item -mandroid
+@opindex mandroid
+Compile code compatible with Android platform.  This is the default on
+@samp{*-*-linux-*android*} targets.
+
+When compiling, this option enables @option{-mbionic}, @option{-fPIC},
+@option{-fno-exceptions} and @option{-fno-rtti} by default.  When linking,
+this option makes the GCC driver pass Android-specific options to the linker.
+Finally, this option causes the preprocessor macro @code{__ANDROID__}
+to be defined.
+
+@item -tno-android-cc
+@opindex tno-android-cc
+Disable compilation effects of @option{-mandroid}, i.e., do not enable
+@option{-mbionic}, @option{-fPIC}, @option{-fno-exceptions} and
+@option{-fno-rtti} by default.
+
+@item -tno-android-ld
+@opindex tno-android-ld
+Disable linking effects of @option{-mandroid}, i.e., pass standard Linux
+linking options to the linker.
+
+@end table
+
+@node H8/300 Options
+@subsection H8/300 Options
+
+These @samp{-m} options are defined for the H8/300 implementations:
+
+@table @gcctabopt
+@item -mrelax
+@opindex mrelax
+Shorten some address references at link time, when possible; uses the
+linker option @option{-relax}.  @xref{H8/300,, @code{ld} and the H8/300,
+ld, Using ld}, for a fuller description.
+
+@item -mh
+@opindex mh
+Generate code for the H8/300H@.
+
+@item -ms
+@opindex ms
+Generate code for the H8S@.
+
+@item -mn
+@opindex mn
+Generate code for the H8S and H8/300H in the normal mode.  This switch
+must be used either with @option{-mh} or @option{-ms}.
+
+@item -ms2600
+@opindex ms2600
+Generate code for the H8S/2600.  This switch must be used with @option{-ms}.
+
+@item -mint32
+@opindex mint32
+Make @code{int} data 32 bits by default.
+
+@item -malign-300
+@opindex malign-300
+On the H8/300H and H8S, use the same alignment rules as for the H8/300.
+The default for the H8/300H and H8S is to align longs and floats on 4
+byte boundaries.
+@option{-malign-300} causes them to be aligned on 2 byte boundaries.
+This option has no effect on the H8/300.
+@end table
+
+@node HPPA Options
+@subsection HPPA Options
+@cindex HPPA Options
+
+These @samp{-m} options are defined for the HPPA family of computers:
+
+@table @gcctabopt
+@item -march=@var{architecture-type}
+@opindex march
+Generate code for the specified architecture.  The choices for
+@var{architecture-type} are @samp{1.0} for PA 1.0, @samp{1.1} for PA
+1.1, and @samp{2.0} for PA 2.0 processors.  Refer to
+@file{/usr/lib/sched.models} on an HP-UX system to determine the proper
+architecture option for your machine.  Code compiled for lower numbered
+architectures will run on higher numbered architectures, but not the
+other way around.
+
+@item -mpa-risc-1-0
+@itemx -mpa-risc-1-1
+@itemx -mpa-risc-2-0
+@opindex mpa-risc-1-0
+@opindex mpa-risc-1-1
+@opindex mpa-risc-2-0
+Synonyms for @option{-march=1.0}, @option{-march=1.1}, and @option{-march=2.0} respectively.
+
+@item -mbig-switch
+@opindex mbig-switch
+Generate code suitable for big switch tables.  Use this option only if
+the assembler/linker complain about out of range branches within a switch
+table.
+
+@item -mjump-in-delay
+@opindex mjump-in-delay
+Fill delay slots of function calls with unconditional jump instructions
+by modifying the return pointer for the function call to be the target
+of the conditional jump.
+
+@item -mdisable-fpregs
+@opindex mdisable-fpregs
+Prevent floating point registers from being used in any manner.  This is
+necessary for compiling kernels which perform lazy context switching of
+floating point registers.  If you use this option and attempt to perform
+floating point operations, the compiler will abort.
+
+@item -mdisable-indexing
+@opindex mdisable-indexing
+Prevent the compiler from using indexing address modes.  This avoids some
+rather obscure problems when compiling MIG generated code under MACH@.
+
+@item -mno-space-regs
+@opindex mno-space-regs
+Generate code that assumes the target has no space registers.  This allows
+GCC to generate faster indirect calls and use unscaled index address modes.
+
+Such code is suitable for level 0 PA systems and kernels.
+
+@item -mfast-indirect-calls
+@opindex mfast-indirect-calls
+Generate code that assumes calls never cross space boundaries.  This
+allows GCC to emit code which performs faster indirect calls.
+
+This option will not work in the presence of shared libraries or nested
+functions.
+
+@item -mfixed-range=@var{register-range}
+@opindex mfixed-range
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use.  This is
+useful when compiling kernel code.  A register range is specified as
+two registers separated by a dash.  Multiple register ranges can be
+specified separated by a comma.
+
+@item -mlong-load-store
+@opindex mlong-load-store
+Generate 3-instruction load and store sequences as sometimes required by
+the HP-UX 10 linker.  This is equivalent to the @samp{+k} option to
+the HP compilers.
+
+@item -mportable-runtime
+@opindex mportable-runtime
+Use the portable calling conventions proposed by HP for ELF systems.
+
+@item -mgas
+@opindex mgas
+Enable the use of assembler directives only GAS understands.
+
+@item -mschedule=@var{cpu-type}
+@opindex mschedule
+Schedule code according to the constraints for the machine type
+@var{cpu-type}.  The choices for @var{cpu-type} are @samp{700}
+@samp{7100}, @samp{7100LC}, @samp{7200}, @samp{7300} and @samp{8000}.  Refer
+to @file{/usr/lib/sched.models} on an HP-UX system to determine the
+proper scheduling option for your machine.  The default scheduling is
+@samp{8000}.
+
+@item -mlinker-opt
+@opindex mlinker-opt
+Enable the optimization pass in the HP-UX linker.  Note this makes symbolic
+debugging impossible.  It also triggers a bug in the HP-UX 8 and HP-UX 9
+linkers in which they give bogus error messages when linking some programs.
+
+@item -msoft-float
+@opindex msoft-float
+Generate output containing library calls for floating point.
+@strong{Warning:} the requisite libraries are not available for all HPPA
+targets.  Normally the facilities of the machine's usual C compiler are
+used, but this cannot be done directly in cross-compilation.  You must make
+your own arrangements to provide suitable library functions for
+cross-compilation.
+
+@option{-msoft-float} changes the calling convention in the output file;
+therefore, it is only useful if you compile @emph{all} of a program with
+this option.  In particular, you need to compile @file{libgcc.a}, the
+library that comes with GCC, with @option{-msoft-float} in order for
+this to work.
+
+@item -msio
+@opindex msio
+Generate the predefine, @code{_SIO}, for server IO@.  The default is
+@option{-mwsio}.  This generates the predefines, @code{__hp9000s700},
+@code{__hp9000s700__} and @code{_WSIO}, for workstation IO@.  These
+options are available under HP-UX and HI-UX@.
+
+@item -mgnu-ld
+@opindex mgnu-ld
+Use GNU ld specific options.  This passes @option{-shared} to ld when
+building a shared library.  It is the default when GCC is configured,
+explicitly or implicitly, with the GNU linker.  This option does not
+have any affect on which ld is called, it only changes what parameters
+are passed to that ld.  The ld that is called is determined by the
+@option{--with-ld} configure option, GCC's program search path, and
+finally by the user's @env{PATH}.  The linker used by GCC can be printed
+using @samp{which `gcc -print-prog-name=ld`}.  This option is only available
+on the 64 bit HP-UX GCC, i.e.@: configured with @samp{hppa*64*-*-hpux*}.
+
+@item -mhp-ld
+@opindex mhp-ld
+Use HP ld specific options.  This passes @option{-b} to ld when building
+a shared library and passes @option{+Accept TypeMismatch} to ld on all
+links.  It is the default when GCC is configured, explicitly or
+implicitly, with the HP linker.  This option does not have any affect on
+which ld is called, it only changes what parameters are passed to that
+ld.  The ld that is called is determined by the @option{--with-ld}
+configure option, GCC's program search path, and finally by the user's
+@env{PATH}.  The linker used by GCC can be printed using @samp{which
+`gcc -print-prog-name=ld`}.  This option is only available on the 64 bit
+HP-UX GCC, i.e.@: configured with @samp{hppa*64*-*-hpux*}.
+
+@item -mlong-calls
+@opindex mno-long-calls
+Generate code that uses long call sequences.  This ensures that a call
+is always able to reach linker generated stubs.  The default is to generate
+long calls only when the distance from the call site to the beginning
+of the function or translation unit, as the case may be, exceeds a
+predefined limit set by the branch type being used.  The limits for
+normal calls are 7,600,000 and 240,000 bytes, respectively for the
+PA 2.0 and PA 1.X architectures.  Sibcalls are always limited at
+240,000 bytes.
+
+Distances are measured from the beginning of functions when using the
+@option{-ffunction-sections} option, or when using the @option{-mgas}
+and @option{-mno-portable-runtime} options together under HP-UX with
+the SOM linker.
+
+It is normally not desirable to use this option as it will degrade
+performance.  However, it may be useful in large applications,
+particularly when partial linking is used to build the application.
+
+The types of long calls used depends on the capabilities of the
+assembler and linker, and the type of code being generated.  The
+impact on systems that support long absolute calls, and long pic
+symbol-difference or pc-relative calls should be relatively small.
+However, an indirect call is used on 32-bit ELF systems in pic code
+and it is quite long.
+
+@item -munix=@var{unix-std}
+@opindex march
+Generate compiler predefines and select a startfile for the specified
+UNIX standard.  The choices for @var{unix-std} are @samp{93}, @samp{95}
+and @samp{98}.  @samp{93} is supported on all HP-UX versions.  @samp{95}
+is available on HP-UX 10.10 and later.  @samp{98} is available on HP-UX
+11.11 and later.  The default values are @samp{93} for HP-UX 10.00,
+@samp{95} for HP-UX 10.10 though to 11.00, and @samp{98} for HP-UX 11.11
+and later.
+
+@option{-munix=93} provides the same predefines as GCC 3.3 and 3.4.
+@option{-munix=95} provides additional predefines for @code{XOPEN_UNIX}
+and @code{_XOPEN_SOURCE_EXTENDED}, and the startfile @file{unix95.o}.
+@option{-munix=98} provides additional predefines for @code{_XOPEN_UNIX},
+@code{_XOPEN_SOURCE_EXTENDED}, @code{_INCLUDE__STDC_A1_SOURCE} and
+@code{_INCLUDE_XOPEN_SOURCE_500}, and the startfile @file{unix98.o}.
+
+It is @emph{important} to note that this option changes the interfaces
+for various library routines.  It also affects the operational behavior
+of the C library.  Thus, @emph{extreme} care is needed in using this
+option.
+
+Library code that is intended to operate with more than one UNIX
+standard must test, set and restore the variable @var{__xpg4_extended_mask}
+as appropriate.  Most GNU software doesn't provide this capability.
+
+@item -nolibdld
+@opindex nolibdld
+Suppress the generation of link options to search libdld.sl when the
+@option{-static} option is specified on HP-UX 10 and later.
+
+@item -static
+@opindex static
+The HP-UX implementation of setlocale in libc has a dependency on
+libdld.sl.  There isn't an archive version of libdld.sl.  Thus,
+when the @option{-static} option is specified, special link options
+are needed to resolve this dependency.
+
+On HP-UX 10 and later, the GCC driver adds the necessary options to
+link with libdld.sl when the @option{-static} option is specified.
+This causes the resulting binary to be dynamic.  On the 64-bit port,
+the linkers generate dynamic binaries by default in any case.  The
+@option{-nolibdld} option can be used to prevent the GCC driver from
+adding these link options.
+
+@item -threads
+@opindex threads
+Add support for multithreading with the @dfn{dce thread} library
+under HP-UX@.  This option sets flags for both the preprocessor and
+linker.
+@end table
+
+@node i386 and x86-64 Options
+@subsection Intel 386 and AMD x86-64 Options
+@cindex i386 Options
+@cindex x86-64 Options
+@cindex Intel 386 Options
+@cindex AMD x86-64 Options
+
+These @samp{-m} options are defined for the i386 and x86-64 family of
+computers:
+
+@table @gcctabopt
+@item -mtune=@var{cpu-type}
+@opindex mtune
+Tune to @var{cpu-type} everything applicable about the generated code, except
+for the ABI and the set of available instructions.  The choices for
+@var{cpu-type} are:
+@table @emph
+@item generic
+Produce code optimized for the most common IA32/@/AMD64/@/EM64T processors.
+If you know the CPU on which your code will run, then you should use
+the corresponding @option{-mtune} option instead of
+@option{-mtune=generic}.  But, if you do not know exactly what CPU users
+of your application will have, then you should use this option.
+
+As new processors are deployed in the marketplace, the behavior of this
+option will change.  Therefore, if you upgrade to a newer version of
+GCC, the code generated option will change to reflect the processors
+that were most common when that version of GCC was released.
+
+There is no @option{-march=generic} option because @option{-march}
+indicates the instruction set the compiler can use, and there is no
+generic instruction set applicable to all processors.  In contrast,
+@option{-mtune} indicates the processor (or, in this case, collection of
+processors) for which the code is optimized.
+@item native
+This selects the CPU to tune for at compilation time by determining
+the processor type of the compiling machine.  Using @option{-mtune=native}
+will produce code optimized for the local machine under the constraints
+of the selected instruction set.  Using @option{-march=native} will
+enable all instruction subsets supported by the local machine (hence
+the result might not run on different machines).
+@item i386
+Original Intel's i386 CPU@.
+@item i486
+Intel's i486 CPU@.  (No scheduling is implemented for this chip.)
+@item i586, pentium
+Intel Pentium CPU with no MMX support.
+@item pentium-mmx
+Intel PentiumMMX CPU based on Pentium core with MMX instruction set support.
+@item pentiumpro
+Intel PentiumPro CPU@.
+@item i686
+Same as @code{generic}, but when used as @code{march} option, PentiumPro
+instruction set will be used, so the code will run on all i686 family chips.
+@item pentium2
+Intel Pentium2 CPU based on PentiumPro core with MMX instruction set support.
+@item pentium3, pentium3m
+Intel Pentium3 CPU based on PentiumPro core with MMX and SSE instruction set
+support.
+@item pentium-m
+Low power version of Intel Pentium3 CPU with MMX, SSE and SSE2 instruction set
+support.  Used by Centrino notebooks.
+@item pentium4, pentium4m
+Intel Pentium4 CPU with MMX, SSE and SSE2 instruction set support.
+@item prescott
+Improved version of Intel Pentium4 CPU with MMX, SSE, SSE2 and SSE3 instruction
+set support.
+@item nocona
+Improved version of Intel Pentium4 CPU with 64-bit extensions, MMX, SSE,
+SSE2 and SSE3 instruction set support.
+@item core2
+Intel Core2 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and SSSE3
+instruction set support.
+@item corei7
+Intel Core i7 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1
+and SSE4.2 instruction set support.
+@item corei7-avx
+Intel Core i7 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3,
+SSE4.1, SSE4.2, AVX, AES and PCLMUL instruction set support.
+@item core-avx-i
+Intel Core CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3,
+SSE4.1, SSE4.2, AVX, AES, PCLMUL, FSGSBASE, RDRND and F16C instruction
+set support.
+@item atom
+Intel Atom CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and SSSE3
+instruction set support.
+@item k6
+AMD K6 CPU with MMX instruction set support.
+@item k6-2, k6-3
+Improved versions of AMD K6 CPU with MMX and 3DNow!@: instruction set support.
+@item athlon, athlon-tbird
+AMD Athlon CPU with MMX, 3dNOW!, enhanced 3DNow!@: and SSE prefetch instructions
+support.
+@item athlon-4, athlon-xp, athlon-mp
+Improved AMD Athlon CPU with MMX, 3DNow!, enhanced 3DNow!@: and full SSE
+instruction set support.
+@item k8, opteron, athlon64, athlon-fx
+AMD K8 core based CPUs with x86-64 instruction set support.  (This supersets
+MMX, SSE, SSE2, 3DNow!, enhanced 3DNow!@: and 64-bit instruction set extensions.)
+@item k8-sse3, opteron-sse3, athlon64-sse3
+Improved versions of k8, opteron and athlon64 with SSE3 instruction set support.
+@item amdfam10, barcelona
+AMD Family 10h core based CPUs with x86-64 instruction set support.  (This
+supersets MMX, SSE, SSE2, SSE3, SSE4A, 3DNow!, enhanced 3DNow!, ABM and 64-bit
+instruction set extensions.)
+@item winchip-c6
+IDT Winchip C6 CPU, dealt in same way as i486 with additional MMX instruction
+set support.
+@item winchip2
+IDT Winchip2 CPU, dealt in same way as i486 with additional MMX and 3DNow!@:
+instruction set support.
+@item c3
+Via C3 CPU with MMX and 3DNow!@: instruction set support.  (No scheduling is
+implemented for this chip.)
+@item c3-2
+Via C3-2 CPU with MMX and SSE instruction set support.  (No scheduling is
+implemented for this chip.)
+@item geode
+Embedded AMD CPU with MMX and 3DNow!@: instruction set support.
+@end table
+
+While picking a specific @var{cpu-type} will schedule things appropriately
+for that particular chip, the compiler will not generate any code that
+does not run on the i386 without the @option{-march=@var{cpu-type}} option
+being used.
+
+@item -march=@var{cpu-type}
+@opindex march
+Generate instructions for the machine type @var{cpu-type}.  The choices
+for @var{cpu-type} are the same as for @option{-mtune}.  Moreover,
+specifying @option{-march=@var{cpu-type}} implies @option{-mtune=@var{cpu-type}}.
+
+@item -mcpu=@var{cpu-type}
+@opindex mcpu
+A deprecated synonym for @option{-mtune}.
+
+@item -mfpmath=@var{unit}
+@opindex mfpmath
+Generate floating point arithmetics for selected unit @var{unit}.  The choices
+for @var{unit} are:
+
+@table @samp
+@item 387
+Use the standard 387 floating point coprocessor present majority of chips and
+emulated otherwise.  Code compiled with this option will run almost everywhere.
+The temporary results are computed in 80bit precision instead of precision
+specified by the type resulting in slightly different results compared to most
+of other chips.  See @option{-ffloat-store} for more detailed description.
+
+This is the default choice for i386 compiler.
+
+@item sse
+Use scalar floating point instructions present in the SSE instruction set.
+This instruction set is supported by Pentium3 and newer chips, in the AMD line
+by Athlon-4, Athlon-xp and Athlon-mp chips.  The earlier version of SSE
+instruction set supports only single precision arithmetics, thus the double and
+extended precision arithmetics is still done using 387.  Later version, present
+only in Pentium4 and the future AMD x86-64 chips supports double precision
+arithmetics too.
+
+For the i386 compiler, you need to use @option{-march=@var{cpu-type}}, @option{-msse}
+or @option{-msse2} switches to enable SSE extensions and make this option
+effective.  For the x86-64 compiler, these extensions are enabled by default.
+
+The resulting code should be considerably faster in the majority of cases and avoid
+the numerical instability problems of 387 code, but may break some existing
+code that expects temporaries to be 80bit.
+
+This is the default choice for the x86-64 compiler.
+
+@item sse,387
+@itemx sse+387
+@itemx both
+Attempt to utilize both instruction sets at once.  This effectively double the
+amount of available registers and on chips with separate execution units for
+387 and SSE the execution resources too.  Use this option with care, as it is
+still experimental, because the GCC register allocator does not model separate
+functional units well resulting in instable performance.
+@end table
+
+@item -masm=@var{dialect}
+@opindex masm=@var{dialect}
+Output asm instructions using selected @var{dialect}.  Supported
+choices are @samp{intel} or @samp{att} (the default one).  Darwin does
+not support @samp{intel}.
+
+@item -mieee-fp
+@itemx -mno-ieee-fp
+@opindex mieee-fp
+@opindex mno-ieee-fp
+Control whether or not the compiler uses IEEE floating point
+comparisons.  These handle correctly the case where the result of a
+comparison is unordered.
+
+@item -msoft-float
+@opindex msoft-float
+Generate output containing library calls for floating point.
+@strong{Warning:} the requisite libraries are not part of GCC@.
+Normally the facilities of the machine's usual C compiler are used, but
+this can't be done directly in cross-compilation.  You must make your
+own arrangements to provide suitable library functions for
+cross-compilation.
+
+On machines where a function returns floating point results in the 80387
+register stack, some floating point opcodes may be emitted even if
+@option{-msoft-float} is used.
+
+@item -mno-fp-ret-in-387
+@opindex mno-fp-ret-in-387
+Do not use the FPU registers for return values of functions.
+
+The usual calling convention has functions return values of types
+@code{float} and @code{double} in an FPU register, even if there
+is no FPU@.  The idea is that the operating system should emulate
+an FPU@.
+
+The option @option{-mno-fp-ret-in-387} causes such values to be returned
+in ordinary CPU registers instead.
+
+@item -mno-fancy-math-387
+@opindex mno-fancy-math-387
+Some 387 emulators do not support the @code{sin}, @code{cos} and
+@code{sqrt} instructions for the 387.  Specify this option to avoid
+generating those instructions.  This option is the default on FreeBSD,
+OpenBSD and NetBSD@.  This option is overridden when @option{-march}
+indicates that the target CPU will always have an FPU and so the
+instruction will not need emulation.  As of revision 2.6.1, these
+instructions are not generated unless you also use the
+@option{-funsafe-math-optimizations} switch.
+
+@item -malign-double
+@itemx -mno-align-double
+@opindex malign-double
+@opindex mno-align-double
+Control whether GCC aligns @code{double}, @code{long double}, and
+@code{long long} variables on a two word boundary or a one word
+boundary.  Aligning @code{double} variables on a two word boundary will
+produce code that runs somewhat faster on a @samp{Pentium} at the
+expense of more memory.
+
+On x86-64, @option{-malign-double} is enabled by default.
+
+@strong{Warning:} if you use the @option{-malign-double} switch,
+structures containing the above types will be aligned differently than
+the published application binary interface specifications for the 386
+and will not be binary compatible with structures in code compiled
+without that switch.
+
+@item -m96bit-long-double
+@itemx -m128bit-long-double
+@opindex m96bit-long-double
+@opindex m128bit-long-double
+These switches control the size of @code{long double} type.  The i386
+application binary interface specifies the size to be 96 bits,
+so @option{-m96bit-long-double} is the default in 32 bit mode.
+
+Modern architectures (Pentium and newer) would prefer @code{long double}
+to be aligned to an 8 or 16 byte boundary.  In arrays or structures
+conforming to the ABI, this would not be possible.  So specifying a
+@option{-m128bit-long-double} will align @code{long double}
+to a 16 byte boundary by padding the @code{long double} with an additional
+32 bit zero.
+
+In the x86-64 compiler, @option{-m128bit-long-double} is the default choice as
+its ABI specifies that @code{long double} is to be aligned on 16 byte boundary.
+
+Notice that neither of these options enable any extra precision over the x87
+standard of 80 bits for a @code{long double}.
+
+@strong{Warning:} if you override the default value for your target ABI, the
+structures and arrays containing @code{long double} variables will change
+their size as well as function calling convention for function taking
+@code{long double} will be modified.  Hence they will not be binary
+compatible with arrays or structures in code compiled without that switch.
+
+@item -mlarge-data-threshold=@var{number}
+@opindex mlarge-data-threshold=@var{number}
+When @option{-mcmodel=medium} is specified, the data greater than
+@var{threshold} are placed in large data section.  This value must be the
+same across all object linked into the binary and defaults to 65535.
+
+@item -mrtd
+@opindex mrtd
+Use a different function-calling convention, in which functions that
+take a fixed number of arguments return with the @code{ret} @var{num}
+instruction, which pops their arguments while returning.  This saves one
+instruction in the caller since there is no need to pop the arguments
+there.
+
+You can specify that an individual function is called with this calling
+sequence with the function attribute @samp{stdcall}.  You can also
+override the @option{-mrtd} option by using the function attribute
+@samp{cdecl}.  @xref{Function Attributes}.
+
+@strong{Warning:} this calling convention is incompatible with the one
+normally used on Unix, so you cannot use it if you need to call
+libraries compiled with the Unix compiler.
+
+Also, you must provide function prototypes for all functions that
+take variable numbers of arguments (including @code{printf});
+otherwise incorrect code will be generated for calls to those
+functions.
+
+In addition, seriously incorrect code will result if you call a
+function with too many arguments.  (Normally, extra arguments are
+harmlessly ignored.)
+
+@item -mregparm=@var{num}
+@opindex mregparm
+Control how many registers are used to pass integer arguments.  By
+default, no registers are used to pass arguments, and at most 3
+registers can be used.  You can control this behavior for a specific
+function by using the function attribute @samp{regparm}.
+@xref{Function Attributes}.
+
+@strong{Warning:} if you use this switch, and
+@var{num} is nonzero, then you must build all modules with the same
+value, including any libraries.  This includes the system libraries and
+startup modules.
+
+@item -msseregparm
+@opindex msseregparm
+Use SSE register passing conventions for float and double arguments
+and return values.  You can control this behavior for a specific
+function by using the function attribute @samp{sseregparm}.
+@xref{Function Attributes}.
+
+@strong{Warning:} if you use this switch then you must build all
+modules with the same value, including any libraries.  This includes
+the system libraries and startup modules.
+
+@item -mvect8-ret-in-mem
+@opindex mvect8-ret-in-mem
+Return 8-byte vectors in memory instead of MMX registers.  This is the
+default on Solaris@tie{}8 and 9 and VxWorks to match the ABI of the Sun
+Studio compilers until version 12.  Later compiler versions (starting
+with Studio 12 Update@tie{}1) follow the ABI used by other x86 targets, which
+is the default on Solaris@tie{}10 and later.  @emph{Only} use this option if
+you need to remain compatible with existing code produced by those
+previous compiler versions or older versions of GCC.
+
+@item -mpc32
+@itemx -mpc64
+@itemx -mpc80
+@opindex mpc32
+@opindex mpc64
+@opindex mpc80
+
+Set 80387 floating-point precision to 32, 64 or 80 bits.  When @option{-mpc32}
+is specified, the significands of results of floating-point operations are
+rounded to 24 bits (single precision); @option{-mpc64} rounds the
+significands of results of floating-point operations to 53 bits (double
+precision) and @option{-mpc80} rounds the significands of results of
+floating-point operations to 64 bits (extended double precision), which is
+the default.  When this option is used, floating-point operations in higher
+precisions are not available to the programmer without setting the FPU
+control word explicitly.
+
+Setting the rounding of floating-point operations to less than the default
+80 bits can speed some programs by 2% or more.  Note that some mathematical
+libraries assume that extended precision (80 bit) floating-point operations
+are enabled by default; routines in such libraries could suffer significant
+loss of accuracy, typically through so-called "catastrophic cancellation",
+when this option is used to set the precision to less than extended precision.
+
+@item -mstackrealign
+@opindex mstackrealign
+Realign the stack at entry.  On the Intel x86, the @option{-mstackrealign}
+option will generate an alternate prologue and epilogue that realigns the
+runtime stack if necessary.  This supports mixing legacy codes that keep
+a 4-byte aligned stack with modern codes that keep a 16-byte stack for
+SSE compatibility.  See also the attribute @code{force_align_arg_pointer},
+applicable to individual functions.
+
+@item -mpreferred-stack-boundary=@var{num}
+@opindex mpreferred-stack-boundary
+Attempt to keep the stack boundary aligned to a 2 raised to @var{num}
+byte boundary.  If @option{-mpreferred-stack-boundary} is not specified,
+the default is 4 (16 bytes or 128 bits).
+
+@item -mincoming-stack-boundary=@var{num}
+@opindex mincoming-stack-boundary
+Assume the incoming stack is aligned to a 2 raised to @var{num} byte
+boundary.  If @option{-mincoming-stack-boundary} is not specified,
+the one specified by @option{-mpreferred-stack-boundary} will be used.
+
+On Pentium and PentiumPro, @code{double} and @code{long double} values
+should be aligned to an 8 byte boundary (see @option{-malign-double}) or
+suffer significant run time performance penalties.  On Pentium III, the
+Streaming SIMD Extension (SSE) data type @code{__m128} may not work
+properly if it is not 16 byte aligned.
+
+To ensure proper alignment of this values on the stack, the stack boundary
+must be as aligned as that required by any value stored on the stack.
+Further, every function must be generated such that it keeps the stack
+aligned.  Thus calling a function compiled with a higher preferred
+stack boundary from a function compiled with a lower preferred stack
+boundary will most likely misalign the stack.  It is recommended that
+libraries that use callbacks always use the default setting.
+
+This extra alignment does consume extra stack space, and generally
+increases code size.  Code that is sensitive to stack space usage, such
+as embedded systems and operating system kernels, may want to reduce the
+preferred alignment to @option{-mpreferred-stack-boundary=2}.
+
+@item -mmmx
+@itemx -mno-mmx
+@itemx -msse
+@itemx -mno-sse
+@itemx -msse2
+@itemx -mno-sse2
+@itemx -msse3
+@itemx -mno-sse3
+@itemx -mssse3
+@itemx -mno-ssse3
+@itemx -msse4.1
+@need 800
+@itemx -mno-sse4.1
+@itemx -msse4.2
+@itemx -mno-sse4.2
+@itemx -msse4
+@itemx -mno-sse4
+@itemx -mavx
+@itemx -mno-avx
+@itemx -maes
+@itemx -mno-aes
+@itemx -mpclmul
+@need 800
+@itemx -mno-pclmul
+@itemx -mfsgsbase
+@itemx -mno-fsgsbase
+@itemx -mrdrnd
+@itemx -mno-rdrnd
+@itemx -mf16c
+@itemx -mno-f16c
+@itemx -msse4a
+@itemx -mno-sse4a
+@itemx -mfma4
+@need 800
+@itemx -mno-fma4
+@itemx -mxop
+@itemx -mno-xop
+@itemx -mlwp
+@itemx -mno-lwp
+@itemx -m3dnow
+@itemx -mno-3dnow
+@itemx -mpopcnt
+@itemx -mno-popcnt
+@itemx -mabm
+@itemx -mno-abm
+@itemx -mbmi
+@itemx -mno-bmi
+@itemx -mtbm
+@itemx -mno-tbm
+@opindex mmmx
+@opindex mno-mmx
+@opindex msse
+@opindex mno-sse
+@opindex m3dnow
+@opindex mno-3dnow
+These switches enable or disable the use of instructions in the MMX,
+SSE, SSE2, SSE3, SSSE3, SSE4.1, AVX, AES, PCLMUL, FSGSBASE, RDRND,
+F16C, SSE4A, FMA4, XOP, LWP, ABM, BMI, or 3DNow!@: extended instruction sets.
+These extensions are also available as built-in functions: see
+@ref{X86 Built-in Functions}, for details of the functions enabled and
+disabled by these switches.
+
+To have SSE/SSE2 instructions generated automatically from floating-point
+code (as opposed to 387 instructions), see @option{-mfpmath=sse}.
+
+GCC depresses SSEx instructions when @option{-mavx} is used. Instead, it
+generates new AVX instructions or AVX equivalence for all SSEx instructions
+when needed.
+
+These options will enable GCC to use these extended instructions in
+generated code, even without @option{-mfpmath=sse}.  Applications which
+perform runtime CPU detection must compile separate files for each
+supported architecture, using the appropriate flags.  In particular,
+the file containing the CPU detection code should be compiled without
+these options.
+
+@item -mfused-madd
+@itemx -mno-fused-madd
+@opindex mfused-madd
+@opindex mno-fused-madd
+Do (don't) generate code that uses the fused multiply/add or multiply/subtract
+instructions.  The default is to use these instructions.
+
+@item -mcld
+@opindex mcld
+This option instructs GCC to emit a @code{cld} instruction in the prologue
+of functions that use string instructions.  String instructions depend on
+the DF flag to select between autoincrement or autodecrement mode.  While the
+ABI specifies the DF flag to be cleared on function entry, some operating
+systems violate this specification by not clearing the DF flag in their
+exception dispatchers.  The exception handler can be invoked with the DF flag
+set which leads to wrong direction mode, when string instructions are used.
+This option can be enabled by default on 32-bit x86 targets by configuring
+GCC with the @option{--enable-cld} configure option.  Generation of @code{cld}
+instructions can be suppressed with the @option{-mno-cld} compiler option
+in this case.
+
+@item -mvzeroupper
+@opindex mvzeroupper
+This option instructs GCC to emit a @code{vzeroupper} instruction
+before a transfer of control flow out of the function to minimize
+AVX to SSE transition penalty as well as remove unnecessary zeroupper 
+intrinsics.
+
+@item -mprefer-avx128
+@opindex mprefer-avx128
+This option instructs GCC to use 128-bit AVX instructions instead of
+256-bit AVX instructions in the auto-vectorizer.
+
+@item -mcx16
+@opindex mcx16
+This option will enable GCC to use CMPXCHG16B instruction in generated code.
+CMPXCHG16B allows for atomic operations on 128-bit double quadword (or oword)
+data types.  This is useful for high resolution counters that could be updated
+by multiple processors (or cores).  This instruction is generated as part of
+atomic built-in functions: see @ref{Atomic Builtins} for details.
+
+@item -msahf
+@opindex msahf
+This option will enable GCC to use SAHF instruction in generated 64-bit code.
+Early Intel CPUs with Intel 64 lacked LAHF and SAHF instructions supported
+by AMD64 until introduction of Pentium 4 G1 step in December 2005.  LAHF and
+SAHF are load and store instructions, respectively, for certain status flags.
+In 64-bit mode, SAHF instruction is used to optimize @code{fmod}, @code{drem}
+or @code{remainder} built-in functions: see @ref{Other Builtins} for details.
+
+@item -mmovbe
+@opindex mmovbe
+This option will enable GCC to use movbe instruction to implement
+@code{__builtin_bswap32} and @code{__builtin_bswap64}.
+
+@item -mcrc32
+@opindex mcrc32
+This option will enable built-in functions, @code{__builtin_ia32_crc32qi},
+@code{__builtin_ia32_crc32hi}. @code{__builtin_ia32_crc32si} and
+@code{__builtin_ia32_crc32di} to generate the crc32 machine instruction.
+
+@item -mrecip
+@opindex mrecip
+This option will enable GCC to use RCPSS and RSQRTSS instructions (and their
+vectorized variants RCPPS and RSQRTPS) with an additional Newton-Raphson step
+to increase precision instead of DIVSS and SQRTSS (and their vectorized
+variants) for single precision floating point arguments.  These instructions
+are generated only when @option{-funsafe-math-optimizations} is enabled
+together with @option{-finite-math-only} and @option{-fno-trapping-math}.
+Note that while the throughput of the sequence is higher than the throughput
+of the non-reciprocal instruction, the precision of the sequence can be
+decreased by up to 2 ulp (i.e. the inverse of 1.0 equals 0.99999994).
+
+Note that GCC implements 1.0f/sqrtf(x) in terms of RSQRTSS (or RSQRTPS)
+already with @option{-ffast-math} (or the above option combination), and
+doesn't need @option{-mrecip}.
+
+@item -mveclibabi=@var{type}
+@opindex mveclibabi
+Specifies the ABI type to use for vectorizing intrinsics using an
+external library.  Supported types are @code{svml} for the Intel short
+vector math library and @code{acml} for the AMD math core library style
+of interfacing.  GCC will currently emit calls to @code{vmldExp2},
+@code{vmldLn2}, @code{vmldLog102}, @code{vmldLog102}, @code{vmldPow2},
+@code{vmldTanh2}, @code{vmldTan2}, @code{vmldAtan2}, @code{vmldAtanh2},
+@code{vmldCbrt2}, @code{vmldSinh2}, @code{vmldSin2}, @code{vmldAsinh2},
+@code{vmldAsin2}, @code{vmldCosh2}, @code{vmldCos2}, @code{vmldAcosh2},
+@code{vmldAcos2}, @code{vmlsExp4}, @code{vmlsLn4}, @code{vmlsLog104},
+@code{vmlsLog104}, @code{vmlsPow4}, @code{vmlsTanh4}, @code{vmlsTan4},
+@code{vmlsAtan4}, @code{vmlsAtanh4}, @code{vmlsCbrt4}, @code{vmlsSinh4},
+@code{vmlsSin4}, @code{vmlsAsinh4}, @code{vmlsAsin4}, @code{vmlsCosh4},
+@code{vmlsCos4}, @code{vmlsAcosh4} and @code{vmlsAcos4} for corresponding
+function type when @option{-mveclibabi=svml} is used and @code{__vrd2_sin},
+@code{__vrd2_cos}, @code{__vrd2_exp}, @code{__vrd2_log}, @code{__vrd2_log2},
+@code{__vrd2_log10}, @code{__vrs4_sinf}, @code{__vrs4_cosf},
+@code{__vrs4_expf}, @code{__vrs4_logf}, @code{__vrs4_log2f},
+@code{__vrs4_log10f} and @code{__vrs4_powf} for corresponding function type
+when @option{-mveclibabi=acml} is used. Both @option{-ftree-vectorize} and
+@option{-funsafe-math-optimizations} have to be enabled. A SVML or ACML ABI
+compatible library will have to be specified at link time.
+
+@item -mabi=@var{name}
+@opindex mabi
+Generate code for the specified calling convention.  Permissible values
+are: @samp{sysv} for the ABI used on GNU/Linux and other systems and
+@samp{ms} for the Microsoft ABI.  The default is to use the Microsoft
+ABI when targeting Windows.  On all other systems, the default is the
+SYSV ABI.  You can control this behavior for a specific function by
+using the function attribute @samp{ms_abi}/@samp{sysv_abi}.
+@xref{Function Attributes}.
+
+@item -mpush-args
+@itemx -mno-push-args
+@opindex mpush-args
+@opindex mno-push-args
+Use PUSH operations to store outgoing parameters.  This method is shorter
+and usually equally fast as method using SUB/MOV operations and is enabled
+by default.  In some cases disabling it may improve performance because of
+improved scheduling and reduced dependencies.
+
+@item -maccumulate-outgoing-args
+@opindex maccumulate-outgoing-args
+If enabled, the maximum amount of space required for outgoing arguments will be
+computed in the function prologue.  This is faster on most modern CPUs
+because of reduced dependencies, improved scheduling and reduced stack usage
+when preferred stack boundary is not equal to 2.  The drawback is a notable
+increase in code size.  This switch implies @option{-mno-push-args}.
+
+@item -mthreads
+@opindex mthreads
+Support thread-safe exception handling on @samp{Mingw32}.  Code that relies
+on thread-safe exception handling must compile and link all code with the
+@option{-mthreads} option.  When compiling, @option{-mthreads} defines
+@option{-D_MT}; when linking, it links in a special thread helper library
+@option{-lmingwthrd} which cleans up per thread exception handling data.
+
+@item -mno-align-stringops
+@opindex mno-align-stringops
+Do not align destination of inlined string operations.  This switch reduces
+code size and improves performance in case the destination is already aligned,
+but GCC doesn't know about it.
+
+@item -minline-all-stringops
+@opindex minline-all-stringops
+By default GCC inlines string operations only when destination is known to be
+aligned at least to 4 byte boundary.  This enables more inlining, increase code
+size, but may improve performance of code that depends on fast memcpy, strlen
+and memset for short lengths.
+
+@item -minline-stringops-dynamically
+@opindex minline-stringops-dynamically
+For string operation of unknown size, inline runtime checks so for small
+blocks inline code is used, while for large blocks library call is used.
+
+@item -mstringop-strategy=@var{alg}
+@opindex mstringop-strategy=@var{alg}
+Overwrite internal decision heuristic about particular algorithm to inline
+string operation with.  The allowed values are @code{rep_byte},
+@code{rep_4byte}, @code{rep_8byte} for expanding using i386 @code{rep} prefix
+of specified size, @code{byte_loop}, @code{loop}, @code{unrolled_loop} for
+expanding inline loop, @code{libcall} for always expanding library call.
+
+@item -momit-leaf-frame-pointer
+@opindex momit-leaf-frame-pointer
+Don't keep the frame pointer in a register for leaf functions.  This
+avoids the instructions to save, set up and restore frame pointers and
+makes an extra register available in leaf functions.  The option
+@option{-fomit-frame-pointer} removes the frame pointer for all functions
+which might make debugging harder.
+
+@item -mtls-direct-seg-refs
+@itemx -mno-tls-direct-seg-refs
+@opindex mtls-direct-seg-refs
+Controls whether TLS variables may be accessed with offsets from the
+TLS segment register (@code{%gs} for 32-bit, @code{%fs} for 64-bit),
+or whether the thread base pointer must be added.  Whether or not this
+is legal depends on the operating system, and whether it maps the
+segment to cover the entire TLS area.
+
+For systems that use GNU libc, the default is on.
+
+@item -msse2avx
+@itemx -mno-sse2avx
+@opindex msse2avx
+Specify that the assembler should encode SSE instructions with VEX
+prefix.  The option @option{-mavx} turns this on by default.
+
+@item -mfentry
+@itemx -mno-fentry
+@opindex mfentry
+If profiling is active @option{-pg} put the profiling
+counter call before prologue.
+Note: On x86 architectures the attribute @code{ms_hook_prologue}
+isn't possible at the moment for @option{-mfentry} and @option{-pg}.
+
+@item -m8bit-idiv
+@itemx -mno-8bit-idiv
+@opindex 8bit-idiv
+On some processors, like Intel Atom, 8bit unsigned integer divide is
+much faster than 32bit/64bit integer divide.  This option will generate a
+runt-time check.  If both dividend and divisor are within range of 0
+to 255, 8bit unsigned integer divide will be used instead of
+32bit/64bit integer divide.
+
+@item -mavx256-split-unaligned-load
+@item -mavx256-split-unaligned-store
+@opindex avx256-split-unaligned-load
+@opindex avx256-split-unaligned-store
+Split 32-byte AVX unaligned load and store.
+
+@end table
+
+These @samp{-m} switches are supported in addition to the above
+on AMD x86-64 processors in 64-bit environments.
+
+@table @gcctabopt
+@item -m32
+@itemx -m64
+@opindex m32
+@opindex m64
+Generate code for a 32-bit or 64-bit environment.
+The 32-bit environment sets int, long and pointer to 32 bits and
+generates code that runs on any i386 system.
+The 64-bit environment sets int to 32 bits and long and pointer
+to 64 bits and generates code for AMD's x86-64 architecture. For
+darwin only the -m64 option turns off the @option{-fno-pic} and
+@option{-mdynamic-no-pic} options.
+
+@item -mno-red-zone
+@opindex mno-red-zone
+Do not use a so called red zone for x86-64 code.  The red zone is mandated
+by the x86-64 ABI, it is a 128-byte area beyond the location of the
+stack pointer that will not be modified by signal or interrupt handlers
+and therefore can be used for temporary data without adjusting the stack
+pointer.  The flag @option{-mno-red-zone} disables this red zone.
+
+@item -mcmodel=small
+@opindex mcmodel=small
+Generate code for the small code model: the program and its symbols must
+be linked in the lower 2 GB of the address space.  Pointers are 64 bits.
+Programs can be statically or dynamically linked.  This is the default
+code model.
+
+@item -mcmodel=kernel
+@opindex mcmodel=kernel
+Generate code for the kernel code model.  The kernel runs in the
+negative 2 GB of the address space.
+This model has to be used for Linux kernel code.
+
+@item -mcmodel=medium
+@opindex mcmodel=medium
+Generate code for the medium model: The program is linked in the lower 2
+GB of the address space.  Small symbols are also placed there.  Symbols
+with sizes larger than @option{-mlarge-data-threshold} are put into
+large data or bss sections and can be located above 2GB.  Programs can
+be statically or dynamically linked.
+
+@item -mcmodel=large
+@opindex mcmodel=large
+Generate code for the large model: This model makes no assumptions
+about addresses and sizes of sections.
+@end table
+
+@node i386 and x86-64 Windows Options
+@subsection i386 and x86-64 Windows Options
+@cindex i386 and x86-64 Windows Options
+
+These additional options are available for Windows targets:
+
+@table @gcctabopt
+@item -mconsole
+@opindex mconsole
+This option is available for Cygwin and MinGW targets.  It
+specifies that a console application is to be generated, by
+instructing the linker to set the PE header subsystem type
+required for console applications.
+This is the default behavior for Cygwin and MinGW targets.
+
+@item -mdll
+@opindex mdll
+This option is available for Cygwin and MinGW targets.  It
+specifies that a DLL - a dynamic link library - is to be
+generated, enabling the selection of the required runtime
+startup object and entry point.
+
+@item -mnop-fun-dllimport
+@opindex mnop-fun-dllimport
+This option is available for Cygwin and MinGW targets.  It
+specifies that the dllimport attribute should be ignored.
+
+@item -mthread
+@opindex mthread
+This option is available for MinGW targets. It specifies
+that MinGW-specific thread support is to be used.
+
+@item -municode
+@opindex municode
+This option is available for mingw-w64 targets.  It specifies
+that the UNICODE macro is getting pre-defined and that the
+unicode capable runtime startup code is chosen.
+
+@item -mwin32
+@opindex mwin32
+This option is available for Cygwin and MinGW targets.  It
+specifies that the typical Windows pre-defined macros are to
+be set in the pre-processor, but does not influence the choice
+of runtime library/startup code.
+
+@item -mwindows
+@opindex mwindows
+This option is available for Cygwin and MinGW targets.  It
+specifies that a GUI application is to be generated by
+instructing the linker to set the PE header subsystem type
+appropriately.
+
+@item -fno-set-stack-executable
+@opindex fno-set-stack-executable
+This option is available for MinGW targets. It specifies that
+the executable flag for stack used by nested functions isn't
+set. This is necessary for binaries running in kernel mode of
+Windows, as there the user32 API, which is used to set executable
+privileges, isn't available.
+
+@item -mpe-aligned-commons
+@opindex mpe-aligned-commons
+This option is available for Cygwin and MinGW targets.  It
+specifies that the GNU extension to the PE file format that
+permits the correct alignment of COMMON variables should be
+used when generating code.  It will be enabled by default if
+GCC detects that the target assembler found during configuration
+supports the feature.
+@end table
+
+See also under @ref{i386 and x86-64 Options} for standard options.
+
+@node IA-64 Options
+@subsection IA-64 Options
+@cindex IA-64 Options
+
+These are the @samp{-m} options defined for the Intel IA-64 architecture.
+
+@table @gcctabopt
+@item -mbig-endian
+@opindex mbig-endian
+Generate code for a big endian target.  This is the default for HP-UX@.
+
+@item -mlittle-endian
+@opindex mlittle-endian
+Generate code for a little endian target.  This is the default for AIX5
+and GNU/Linux.
+
+@item -mgnu-as
+@itemx -mno-gnu-as
+@opindex mgnu-as
+@opindex mno-gnu-as
+Generate (or don't) code for the GNU assembler.  This is the default.
+@c Also, this is the default if the configure option @option{--with-gnu-as}
+@c is used.
+
+@item -mgnu-ld
+@itemx -mno-gnu-ld
+@opindex mgnu-ld
+@opindex mno-gnu-ld
+Generate (or don't) code for the GNU linker.  This is the default.
+@c Also, this is the default if the configure option @option{--with-gnu-ld}
+@c is used.
+
+@item -mno-pic
+@opindex mno-pic
+Generate code that does not use a global pointer register.  The result
+is not position independent code, and violates the IA-64 ABI@.
+
+@item -mvolatile-asm-stop
+@itemx -mno-volatile-asm-stop
+@opindex mvolatile-asm-stop
+@opindex mno-volatile-asm-stop
+Generate (or don't) a stop bit immediately before and after volatile asm
+statements.
+
+@item -mregister-names
+@itemx -mno-register-names
+@opindex mregister-names
+@opindex mno-register-names
+Generate (or don't) @samp{in}, @samp{loc}, and @samp{out} register names for
+the stacked registers.  This may make assembler output more readable.
+
+@item -mno-sdata
+@itemx -msdata
+@opindex mno-sdata
+@opindex msdata
+Disable (or enable) optimizations that use the small data section.  This may
+be useful for working around optimizer bugs.
+
+@item -mconstant-gp
+@opindex mconstant-gp
+Generate code that uses a single constant global pointer value.  This is
+useful when compiling kernel code.
+
+@item -mauto-pic
+@opindex mauto-pic
+Generate code that is self-relocatable.  This implies @option{-mconstant-gp}.
+This is useful when compiling firmware code.
+
+@item -minline-float-divide-min-latency
+@opindex minline-float-divide-min-latency
+Generate code for inline divides of floating point values
+using the minimum latency algorithm.
+
+@item -minline-float-divide-max-throughput
+@opindex minline-float-divide-max-throughput
+Generate code for inline divides of floating point values
+using the maximum throughput algorithm.
+
+@item -mno-inline-float-divide
+@opindex mno-inline-float-divide
+Do not generate inline code for divides of floating point values.
+
+@item -minline-int-divide-min-latency
+@opindex minline-int-divide-min-latency
+Generate code for inline divides of integer values
+using the minimum latency algorithm.
+
+@item -minline-int-divide-max-throughput
+@opindex minline-int-divide-max-throughput
+Generate code for inline divides of integer values
+using the maximum throughput algorithm.
+
+@item -mno-inline-int-divide
+@opindex mno-inline-int-divide
+Do not generate inline code for divides of integer values.
+
+@item -minline-sqrt-min-latency
+@opindex minline-sqrt-min-latency
+Generate code for inline square roots
+using the minimum latency algorithm.
+
+@item -minline-sqrt-max-throughput
+@opindex minline-sqrt-max-throughput
+Generate code for inline square roots
+using the maximum throughput algorithm.
+
+@item -mno-inline-sqrt
+@opindex mno-inline-sqrt
+Do not generate inline code for sqrt.
+
+@item -mfused-madd
+@itemx -mno-fused-madd
+@opindex mfused-madd
+@opindex mno-fused-madd
+Do (don't) generate code that uses the fused multiply/add or multiply/subtract
+instructions.  The default is to use these instructions.
+
+@item -mno-dwarf2-asm
+@itemx -mdwarf2-asm
+@opindex mno-dwarf2-asm
+@opindex mdwarf2-asm
+Don't (or do) generate assembler code for the DWARF2 line number debugging
+info.  This may be useful when not using the GNU assembler.
+
+@item -mearly-stop-bits
+@itemx -mno-early-stop-bits
+@opindex mearly-stop-bits
+@opindex mno-early-stop-bits
+Allow stop bits to be placed earlier than immediately preceding the
+instruction that triggered the stop bit.  This can improve instruction
+scheduling, but does not always do so.
+
+@item -mfixed-range=@var{register-range}
+@opindex mfixed-range
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use.  This is
+useful when compiling kernel code.  A register range is specified as
+two registers separated by a dash.  Multiple register ranges can be
+specified separated by a comma.
+
+@item -mtls-size=@var{tls-size}
+@opindex mtls-size
+Specify bit size of immediate TLS offsets.  Valid values are 14, 22, and
+64.
+
+@item -mtune=@var{cpu-type}
+@opindex mtune
+Tune the instruction scheduling for a particular CPU, Valid values are
+itanium, itanium1, merced, itanium2, and mckinley.
+
+@item -milp32
+@itemx -mlp64
+@opindex milp32
+@opindex mlp64
+Generate code for a 32-bit or 64-bit environment.
+The 32-bit environment sets int, long and pointer to 32 bits.
+The 64-bit environment sets int to 32 bits and long and pointer
+to 64 bits.  These are HP-UX specific flags.
+
+@item -mno-sched-br-data-spec
+@itemx -msched-br-data-spec
+@opindex mno-sched-br-data-spec
+@opindex msched-br-data-spec
+(Dis/En)able data speculative scheduling before reload.
+This will result in generation of the ld.a instructions and
+the corresponding check instructions (ld.c / chk.a).
+The default is 'disable'.
+
+@item -msched-ar-data-spec
+@itemx -mno-sched-ar-data-spec
+@opindex msched-ar-data-spec
+@opindex mno-sched-ar-data-spec
+(En/Dis)able data speculative scheduling after reload.
+This will result in generation of the ld.a instructions and
+the corresponding check instructions (ld.c / chk.a).
+The default is 'enable'.
+
+@item -mno-sched-control-spec
+@itemx -msched-control-spec
+@opindex mno-sched-control-spec
+@opindex msched-control-spec
+(Dis/En)able control speculative scheduling.  This feature is
+available only during region scheduling (i.e.@: before reload).
+This will result in generation of the ld.s instructions and
+the corresponding check instructions chk.s .
+The default is 'disable'.
+
+@item -msched-br-in-data-spec
+@itemx -mno-sched-br-in-data-spec
+@opindex msched-br-in-data-spec
+@opindex mno-sched-br-in-data-spec
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the data speculative loads before reload.
+This is effective only with @option{-msched-br-data-spec} enabled.
+The default is 'enable'.
+
+@item -msched-ar-in-data-spec
+@itemx -mno-sched-ar-in-data-spec
+@opindex msched-ar-in-data-spec
+@opindex mno-sched-ar-in-data-spec
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the data speculative loads after reload.
+This is effective only with @option{-msched-ar-data-spec} enabled.
+The default is 'enable'.
+
+@item -msched-in-control-spec
+@itemx -mno-sched-in-control-spec
+@opindex msched-in-control-spec
+@opindex mno-sched-in-control-spec
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the control speculative loads.
+This is effective only with @option{-msched-control-spec} enabled.
+The default is 'enable'.
+
+@item -mno-sched-prefer-non-data-spec-insns
+@itemx -msched-prefer-non-data-spec-insns
+@opindex mno-sched-prefer-non-data-spec-insns
+@opindex msched-prefer-non-data-spec-insns
+If enabled, data speculative instructions will be chosen for schedule
+only if there are no other choices at the moment.  This will make
+the use of the data speculation much more conservative.
+The default is 'disable'.
+
+@item -mno-sched-prefer-non-control-spec-insns
+@itemx -msched-prefer-non-control-spec-insns
+@opindex mno-sched-prefer-non-control-spec-insns
+@opindex msched-prefer-non-control-spec-insns
+If enabled, control speculative instructions will be chosen for schedule
+only if there are no other choices at the moment.  This will make
+the use of the control speculation much more conservative.
+The default is 'disable'.
+
+@item -mno-sched-count-spec-in-critical-path
+@itemx -msched-count-spec-in-critical-path
+@opindex mno-sched-count-spec-in-critical-path
+@opindex msched-count-spec-in-critical-path
+If enabled, speculative dependencies will be considered during
+computation of the instructions priorities.  This will make the use of the
+speculation a bit more conservative.
+The default is 'disable'.
+
+@item -msched-spec-ldc
+@opindex msched-spec-ldc
+Use a simple data speculation check.  This option is on by default.
+
+@item -msched-control-spec-ldc
+@opindex msched-spec-ldc
+Use a simple check for control speculation.  This option is on by default.
+
+@item -msched-stop-bits-after-every-cycle
+@opindex msched-stop-bits-after-every-cycle
+Place a stop bit after every cycle when scheduling.  This option is on
+by default.
+
+@item -msched-fp-mem-deps-zero-cost
+@opindex msched-fp-mem-deps-zero-cost
+Assume that floating-point stores and loads are not likely to cause a conflict
+when placed into the same instruction group.  This option is disabled by
+default.
+
+@item -msel-sched-dont-check-control-spec
+@opindex msel-sched-dont-check-control-spec
+Generate checks for control speculation in selective scheduling.
+This flag is disabled by default.
+
+@item -msched-max-memory-insns=@var{max-insns}
+@opindex msched-max-memory-insns
+Limit on the number of memory insns per instruction group, giving lower
+priority to subsequent memory insns attempting to schedule in the same
+instruction group. Frequently useful to prevent cache bank conflicts.
+The default value is 1.
+
+@item -msched-max-memory-insns-hard-limit
+@opindex msched-max-memory-insns-hard-limit
+Disallow more than `msched-max-memory-insns' in instruction group.
+Otherwise, limit is `soft' meaning that we would prefer non-memory operations
+when limit is reached but may still schedule memory operations.
+
+@end table
+
+@node IA-64/VMS Options
+@subsection IA-64/VMS Options
+
+These @samp{-m} options are defined for the IA-64/VMS implementations:
+
+@table @gcctabopt
+@item -mvms-return-codes
+@opindex mvms-return-codes
+Return VMS condition codes from main. The default is to return POSIX
+style condition (e.g.@ error) codes.
+
+@item -mdebug-main=@var{prefix}
+@opindex mdebug-main=@var{prefix}
+Flag the first routine whose name starts with @var{prefix} as the main
+routine for the debugger.
+
+@item -mmalloc64
+@opindex mmalloc64
+Default to 64bit memory allocation routines.
+@end table
+
+@node LM32 Options
+@subsection LM32 Options
+@cindex LM32 options
+
+These @option{-m} options are defined for the Lattice Mico32 architecture:
+
+@table @gcctabopt
+@item -mbarrel-shift-enabled
+@opindex mbarrel-shift-enabled
+Enable barrel-shift instructions.
+
+@item -mdivide-enabled
+@opindex mdivide-enabled
+Enable divide and modulus instructions.
+
+@item -mmultiply-enabled
+@opindex multiply-enabled
+Enable multiply instructions.
+
+@item -msign-extend-enabled
+@opindex msign-extend-enabled
+Enable sign extend instructions.
+
+@item -muser-enabled
+@opindex muser-enabled
+Enable user-defined instructions.
+
+@end table
+
+@node M32C Options
+@subsection M32C Options
+@cindex M32C options
+
+@table @gcctabopt
+@item -mcpu=@var{name}
+@opindex mcpu=
+Select the CPU for which code is generated.  @var{name} may be one of
+@samp{r8c} for the R8C/Tiny series, @samp{m16c} for the M16C (up to
+/60) series, @samp{m32cm} for the M16C/80 series, or @samp{m32c} for
+the M32C/80 series.
+
+@item -msim
+@opindex msim
+Specifies that the program will be run on the simulator.  This causes
+an alternate runtime library to be linked in which supports, for
+example, file I/O@.  You must not use this option when generating
+programs that will run on real hardware; you must provide your own
+runtime library for whatever I/O functions are needed.
+
+@item -memregs=@var{number}
+@opindex memregs=
+Specifies the number of memory-based pseudo-registers GCC will use
+during code generation.  These pseudo-registers will be used like real
+registers, so there is a tradeoff between GCC's ability to fit the
+code into available registers, and the performance penalty of using
+memory instead of registers.  Note that all modules in a program must
+be compiled with the same value for this option.  Because of that, you
+must not use this option with the default runtime libraries gcc
+builds.
+
+@end table
+
+@node M32R/D Options
+@subsection M32R/D Options
+@cindex M32R/D options
+
+These @option{-m} options are defined for Renesas M32R/D architectures:
+
+@table @gcctabopt
+@item -m32r2
+@opindex m32r2
+Generate code for the M32R/2@.
+
+@item -m32rx
+@opindex m32rx
+Generate code for the M32R/X@.
+
+@item -m32r
+@opindex m32r
+Generate code for the M32R@.  This is the default.
+
+@item -mmodel=small
+@opindex mmodel=small
+Assume all objects live in the lower 16MB of memory (so that their addresses
+can be loaded with the @code{ld24} instruction), and assume all subroutines
+are reachable with the @code{bl} instruction.
+This is the default.
+
+The addressability of a particular object can be set with the
+@code{model} attribute.
+
+@item -mmodel=medium
+@opindex mmodel=medium
+Assume objects may be anywhere in the 32-bit address space (the compiler
+will generate @code{seth/add3} instructions to load their addresses), and
+assume all subroutines are reachable with the @code{bl} instruction.
+
+@item -mmodel=large
+@opindex mmodel=large
+Assume objects may be anywhere in the 32-bit address space (the compiler
+will generate @code{seth/add3} instructions to load their addresses), and
+assume subroutines may not be reachable with the @code{bl} instruction
+(the compiler will generate the much slower @code{seth/add3/jl}
+instruction sequence).
+
+@item -msdata=none
+@opindex msdata=none
+Disable use of the small data area.  Variables will be put into
+one of @samp{.data}, @samp{bss}, or @samp{.rodata} (unless the
+@code{section} attribute has been specified).
+This is the default.
+
+The small data area consists of sections @samp{.sdata} and @samp{.sbss}.
+Objects may be explicitly put in the small data area with the
+@code{section} attribute using one of these sections.
+
+@item -msdata=sdata
+@opindex msdata=sdata
+Put small global and static data in the small data area, but do not
+generate special code to reference them.
+
+@item -msdata=use
+@opindex msdata=use
+Put small global and static data in the small data area, and generate
+special instructions to reference them.
+
+@item -G @var{num}
+@opindex G
+@cindex smaller data references
+Put global and static objects less than or equal to @var{num} bytes
+into the small data or bss sections instead of the normal data or bss
+sections.  The default value of @var{num} is 8.
+The @option{-msdata} option must be set to one of @samp{sdata} or @samp{use}
+for this option to have any effect.
+
+All modules should be compiled with the same @option{-G @var{num}} value.
+Compiling with different values of @var{num} may or may not work; if it
+doesn't the linker will give an error message---incorrect code will not be
+generated.
+
+@item -mdebug
+@opindex mdebug
+Makes the M32R specific code in the compiler display some statistics
+that might help in debugging programs.
+
+@item -malign-loops
+@opindex malign-loops
+Align all loops to a 32-byte boundary.
+
+@item -mno-align-loops
+@opindex mno-align-loops
+Do not enforce a 32-byte alignment for loops.  This is the default.
+
+@item -missue-rate=@var{number}
+@opindex missue-rate=@var{number}
+Issue @var{number} instructions per cycle.  @var{number} can only be 1
+or 2.
+
+@item -mbranch-cost=@var{number}
+@opindex mbranch-cost=@var{number}
+@var{number} can only be 1 or 2.  If it is 1 then branches will be
+preferred over conditional code, if it is 2, then the opposite will
+apply.
+
+@item -mflush-trap=@var{number}
+@opindex mflush-trap=@var{number}
+Specifies the trap number to use to flush the cache.  The default is
+12.  Valid numbers are between 0 and 15 inclusive.
+
+@item -mno-flush-trap
+@opindex mno-flush-trap
+Specifies that the cache cannot be flushed by using a trap.
+
+@item -mflush-func=@var{name}
+@opindex mflush-func=@var{name}
+Specifies the name of the operating system function to call to flush
+the cache.  The default is @emph{_flush_cache}, but a function call
+will only be used if a trap is not available.
+
+@item -mno-flush-func
+@opindex mno-flush-func
+Indicates that there is no OS function for flushing the cache.
+
+@end table
+
+@node M680x0 Options
+@subsection M680x0 Options
+@cindex M680x0 options
+
+These are the @samp{-m} options defined for M680x0 and ColdFire processors.
+The default settings depend on which architecture was selected when
+the compiler was configured; the defaults for the most common choices
+are given below.
+
+@table @gcctabopt
+@item -march=@var{arch}
+@opindex march
+Generate code for a specific M680x0 or ColdFire instruction set
+architecture.  Permissible values of @var{arch} for M680x0
+architectures are: @samp{68000}, @samp{68010}, @samp{68020},
+@samp{68030}, @samp{68040}, @samp{68060} and @samp{cpu32}.  ColdFire
+architectures are selected according to Freescale's ISA classification
+and the permissible values are: @samp{isaa}, @samp{isaaplus},
+@samp{isab} and @samp{isac}.
+
+gcc defines a macro @samp{__mcf@var{arch}__} whenever it is generating
+code for a ColdFire target.  The @var{arch} in this macro is one of the
+@option{-march} arguments given above.
+
+When used together, @option{-march} and @option{-mtune} select code
+that runs on a family of similar processors but that is optimized
+for a particular microarchitecture.
+
+@item -mcpu=@var{cpu}
+@opindex mcpu
+Generate code for a specific M680x0 or ColdFire processor.
+The M680x0 @var{cpu}s are: @samp{68000}, @samp{68010}, @samp{68020},
+@samp{68030}, @samp{68040}, @samp{68060}, @samp{68302}, @samp{68332}
+and @samp{cpu32}.  The ColdFire @var{cpu}s are given by the table
+below, which also classifies the CPUs into families:
+
+@multitable @columnfractions 0.20 0.80
+@item @strong{Family} @tab @strong{@samp{-mcpu} arguments}
+@item @samp{51} @tab @samp{51} @samp{51ac} @samp{51cn} @samp{51em} @samp{51qe}
+@item @samp{5206} @tab @samp{5202} @samp{5204} @samp{5206}
+@item @samp{5206e} @tab @samp{5206e}
+@item @samp{5208} @tab @samp{5207} @samp{5208}
+@item @samp{5211a} @tab @samp{5210a} @samp{5211a}
+@item @samp{5213} @tab @samp{5211} @samp{5212} @samp{5213}
+@item @samp{5216} @tab @samp{5214} @samp{5216}
+@item @samp{52235} @tab @samp{52230} @samp{52231} @samp{52232} @samp{52233} @samp{52234} @samp{52235}
+@item @samp{5225} @tab @samp{5224} @samp{5225}
+@item @samp{52259} @tab @samp{52252} @samp{52254} @samp{52255} @samp{52256} @samp{52258} @samp{52259}
+@item @samp{5235} @tab @samp{5232} @samp{5233} @samp{5234} @samp{5235} @samp{523x}
+@item @samp{5249} @tab @samp{5249}
+@item @samp{5250} @tab @samp{5250}
+@item @samp{5271} @tab @samp{5270} @samp{5271}
+@item @samp{5272} @tab @samp{5272}
+@item @samp{5275} @tab @samp{5274} @samp{5275}
+@item @samp{5282} @tab @samp{5280} @samp{5281} @samp{5282} @samp{528x}
+@item @samp{53017} @tab @samp{53011} @samp{53012} @samp{53013} @samp{53014} @samp{53015} @samp{53016} @samp{53017}
+@item @samp{5307} @tab @samp{5307}
+@item @samp{5329} @tab @samp{5327} @samp{5328} @samp{5329} @samp{532x}
+@item @samp{5373} @tab @samp{5372} @samp{5373} @samp{537x}
+@item @samp{5407} @tab @samp{5407}
+@item @samp{5475} @tab @samp{5470} @samp{5471} @samp{5472} @samp{5473} @samp{5474} @samp{5475} @samp{547x} @samp{5480} @samp{5481} @samp{5482} @samp{5483} @samp{5484} @samp{5485}
+@end multitable
+
+@option{-mcpu=@var{cpu}} overrides @option{-march=@var{arch}} if
+@var{arch} is compatible with @var{cpu}.  Other combinations of
+@option{-mcpu} and @option{-march} are rejected.
+
+gcc defines the macro @samp{__mcf_cpu_@var{cpu}} when ColdFire target
+@var{cpu} is selected.  It also defines @samp{__mcf_family_@var{family}},
+where the value of @var{family} is given by the table above.
+
+@item -mtune=@var{tune}
+@opindex mtune
+Tune the code for a particular microarchitecture, within the
+constraints set by @option{-march} and @option{-mcpu}.
+The M680x0 microarchitectures are: @samp{68000}, @samp{68010},
+@samp{68020}, @samp{68030}, @samp{68040}, @samp{68060}
+and @samp{cpu32}.  The ColdFire microarchitectures
+are: @samp{cfv1}, @samp{cfv2}, @samp{cfv3}, @samp{cfv4} and @samp{cfv4e}.
+
+You can also use @option{-mtune=68020-40} for code that needs
+to run relatively well on 68020, 68030 and 68040 targets.
+@option{-mtune=68020-60} is similar but includes 68060 targets
+as well.  These two options select the same tuning decisions as
+@option{-m68020-40} and @option{-m68020-60} respectively.
+
+gcc defines the macros @samp{__mc@var{arch}} and @samp{__mc@var{arch}__}
+when tuning for 680x0 architecture @var{arch}.  It also defines
+@samp{mc@var{arch}} unless either @option{-ansi} or a non-GNU @option{-std}
+option is used.  If gcc is tuning for a range of architectures,
+as selected by @option{-mtune=68020-40} or @option{-mtune=68020-60},
+it defines the macros for every architecture in the range.
+
+gcc also defines the macro @samp{__m@var{uarch}__} when tuning for
+ColdFire microarchitecture @var{uarch}, where @var{uarch} is one
+of the arguments given above.
+
+@item -m68000
+@itemx -mc68000
+@opindex m68000
+@opindex mc68000
+Generate output for a 68000.  This is the default
+when the compiler is configured for 68000-based systems.
+It is equivalent to @option{-march=68000}.
+
+Use this option for microcontrollers with a 68000 or EC000 core,
+including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356.
+
+@item -m68010
+@opindex m68010
+Generate output for a 68010.  This is the default
+when the compiler is configured for 68010-based systems.
+It is equivalent to @option{-march=68010}.
+
+@item -m68020
+@itemx -mc68020
+@opindex m68020
+@opindex mc68020
+Generate output for a 68020.  This is the default
+when the compiler is configured for 68020-based systems.
+It is equivalent to @option{-march=68020}.
+
+@item -m68030
+@opindex m68030
+Generate output for a 68030.  This is the default when the compiler is
+configured for 68030-based systems.  It is equivalent to
+@option{-march=68030}.
+
+@item -m68040
+@opindex m68040
+Generate output for a 68040.  This is the default when the compiler is
+configured for 68040-based systems.  It is equivalent to
+@option{-march=68040}.
+
+This option inhibits the use of 68881/68882 instructions that have to be
+emulated by software on the 68040.  Use this option if your 68040 does not
+have code to emulate those instructions.
+
+@item -m68060
+@opindex m68060
+Generate output for a 68060.  This is the default when the compiler is
+configured for 68060-based systems.  It is equivalent to
+@option{-march=68060}.
+
+This option inhibits the use of 68020 and 68881/68882 instructions that
+have to be emulated by software on the 68060.  Use this option if your 68060
+does not have code to emulate those instructions.
+
+@item -mcpu32
+@opindex mcpu32
+Generate output for a CPU32.  This is the default
+when the compiler is configured for CPU32-based systems.
+It is equivalent to @option{-march=cpu32}.
+
+Use this option for microcontrollers with a
+CPU32 or CPU32+ core, including the 68330, 68331, 68332, 68333, 68334,
+68336, 68340, 68341, 68349 and 68360.
+
+@item -m5200
+@opindex m5200
+Generate output for a 520X ColdFire CPU@.  This is the default
+when the compiler is configured for 520X-based systems.
+It is equivalent to @option{-mcpu=5206}, and is now deprecated
+in favor of that option.
+
+Use this option for microcontroller with a 5200 core, including
+the MCF5202, MCF5203, MCF5204 and MCF5206.
+
+@item -m5206e
+@opindex m5206e
+Generate output for a 5206e ColdFire CPU@.  The option is now
+deprecated in favor of the equivalent @option{-mcpu=5206e}.
+
+@item -m528x
+@opindex m528x
+Generate output for a member of the ColdFire 528X family.
+The option is now deprecated in favor of the equivalent
+@option{-mcpu=528x}.
+
+@item -m5307
+@opindex m5307
+Generate output for a ColdFire 5307 CPU@.  The option is now deprecated
+in favor of the equivalent @option{-mcpu=5307}.
+
+@item -m5407
+@opindex m5407
+Generate output for a ColdFire 5407 CPU@.  The option is now deprecated
+in favor of the equivalent @option{-mcpu=5407}.
+
+@item -mcfv4e
+@opindex mcfv4e
+Generate output for a ColdFire V4e family CPU (e.g.@: 547x/548x).
+This includes use of hardware floating point instructions.
+The option is equivalent to @option{-mcpu=547x}, and is now
+deprecated in favor of that option.
+
+@item -m68020-40
+@opindex m68020-40
+Generate output for a 68040, without using any of the new instructions.
+This results in code which can run relatively efficiently on either a
+68020/68881 or a 68030 or a 68040.  The generated code does use the
+68881 instructions that are emulated on the 68040.
+
+The option is equivalent to @option{-march=68020} @option{-mtune=68020-40}.
+
+@item -m68020-60
+@opindex m68020-60
+Generate output for a 68060, without using any of the new instructions.
+This results in code which can run relatively efficiently on either a
+68020/68881 or a 68030 or a 68040.  The generated code does use the
+68881 instructions that are emulated on the 68060.
+
+The option is equivalent to @option{-march=68020} @option{-mtune=68020-60}.
+
+@item -mhard-float
+@itemx -m68881
+@opindex mhard-float
+@opindex m68881
+Generate floating-point instructions.  This is the default for 68020
+and above, and for ColdFire devices that have an FPU@.  It defines the
+macro @samp{__HAVE_68881__} on M680x0 targets and @samp{__mcffpu__}
+on ColdFire targets.
+
+@item -msoft-float
+@opindex msoft-float
+Do not generate floating-point instructions; use library calls instead.
+This is the default for 68000, 68010, and 68832 targets.  It is also
+the default for ColdFire devices that have no FPU.
+
+@item -mdiv
+@itemx -mno-div
+@opindex mdiv
+@opindex mno-div
+Generate (do not generate) ColdFire hardware divide and remainder
+instructions.  If @option{-march} is used without @option{-mcpu},
+the default is ``on'' for ColdFire architectures and ``off'' for M680x0
+architectures.  Otherwise, the default is taken from the target CPU
+(either the default CPU, or the one specified by @option{-mcpu}).  For
+example, the default is ``off'' for @option{-mcpu=5206} and ``on'' for
+@option{-mcpu=5206e}.
+
+gcc defines the macro @samp{__mcfhwdiv__} when this option is enabled.
+
+@item -mshort
+@opindex mshort
+Consider type @code{int} to be 16 bits wide, like @code{short int}.
+Additionally, parameters passed on the stack are also aligned to a
+16-bit boundary even on targets whose API mandates promotion to 32-bit.
+
+@item -mno-short
+@opindex mno-short
+Do not consider type @code{int} to be 16 bits wide.  This is the default.
+
+@item -mnobitfield
+@itemx -mno-bitfield
+@opindex mnobitfield
+@opindex mno-bitfield
+Do not use the bit-field instructions.  The @option{-m68000}, @option{-mcpu32}
+and @option{-m5200} options imply @w{@option{-mnobitfield}}.
+
+@item -mbitfield
+@opindex mbitfield
+Do use the bit-field instructions.  The @option{-m68020} option implies
+@option{-mbitfield}.  This is the default if you use a configuration
+designed for a 68020.
+
+@item -mrtd
+@opindex mrtd
+Use a different function-calling convention, in which functions
+that take a fixed number of arguments return with the @code{rtd}
+instruction, which pops their arguments while returning.  This
+saves one instruction in the caller since there is no need to pop
+the arguments there.
+
+This calling convention is incompatible with the one normally
+used on Unix, so you cannot use it if you need to call libraries
+compiled with the Unix compiler.
+
+Also, you must provide function prototypes for all functions that
+take variable numbers of arguments (including @code{printf});
+otherwise incorrect code will be generated for calls to those
+functions.
+
+In addition, seriously incorrect code will result if you call a
+function with too many arguments.  (Normally, extra arguments are
+harmlessly ignored.)
+
+The @code{rtd} instruction is supported by the 68010, 68020, 68030,
+68040, 68060 and CPU32 processors, but not by the 68000 or 5200.
+
+@item -mno-rtd
+@opindex mno-rtd
+Do not use the calling conventions selected by @option{-mrtd}.
+This is the default.
+
+@item -malign-int
+@itemx -mno-align-int
+@opindex malign-int
+@opindex mno-align-int
+Control whether GCC aligns @code{int}, @code{long}, @code{long long},
+@code{float}, @code{double}, and @code{long double} variables on a 32-bit
+boundary (@option{-malign-int}) or a 16-bit boundary (@option{-mno-align-int}).
+Aligning variables on 32-bit boundaries produces code that runs somewhat
+faster on processors with 32-bit busses at the expense of more memory.
+
+@strong{Warning:} if you use the @option{-malign-int} switch, GCC will
+align structures containing the above types  differently than
+most published application binary interface specifications for the m68k.
+
+@item -mpcrel
+@opindex mpcrel
+Use the pc-relative addressing mode of the 68000 directly, instead of
+using a global offset table.  At present, this option implies @option{-fpic},
+allowing at most a 16-bit offset for pc-relative addressing.  @option{-fPIC} is
+not presently supported with @option{-mpcrel}, though this could be supported for
+68020 and higher processors.
+
+@item -mno-strict-align
+@itemx -mstrict-align
+@opindex mno-strict-align
+@opindex mstrict-align
+Do not (do) assume that unaligned memory references will be handled by
+the system.
+
+@item -msep-data
+Generate code that allows the data segment to be located in a different
+area of memory from the text segment.  This allows for execute in place in
+an environment without virtual memory management.  This option implies
+@option{-fPIC}.
+
+@item -mno-sep-data
+Generate code that assumes that the data segment follows the text segment.
+This is the default.
+
+@item -mid-shared-library
+Generate code that supports shared libraries via the library ID method.
+This allows for execute in place and shared libraries in an environment
+without virtual memory management.  This option implies @option{-fPIC}.
+
+@item -mno-id-shared-library
+Generate code that doesn't assume ID based shared libraries are being used.
+This is the default.
+
+@item -mshared-library-id=n
+Specified the identification number of the ID based shared library being
+compiled.  Specifying a value of 0 will generate more compact code, specifying
+other values will force the allocation of that number to the current
+library but is no more space or time efficient than omitting this option.
+
+@item -mxgot
+@itemx -mno-xgot
+@opindex mxgot
+@opindex mno-xgot
+When generating position-independent code for ColdFire, generate code
+that works if the GOT has more than 8192 entries.  This code is
+larger and slower than code generated without this option.  On M680x0
+processors, this option is not needed; @option{-fPIC} suffices.
+
+GCC normally uses a single instruction to load values from the GOT@.
+While this is relatively efficient, it only works if the GOT
+is smaller than about 64k.  Anything larger causes the linker
+to report an error such as:
+
+@cindex relocation truncated to fit (ColdFire)
+@smallexample
+relocation truncated to fit: R_68K_GOT16O foobar
+@end smallexample
+
+If this happens, you should recompile your code with @option{-mxgot}.
+It should then work with very large GOTs.  However, code generated with
+@option{-mxgot} is less efficient, since it takes 4 instructions to fetch
+the value of a global symbol.
+
+Note that some linkers, including newer versions of the GNU linker,
+can create multiple GOTs and sort GOT entries.  If you have such a linker,
+you should only need to use @option{-mxgot} when compiling a single
+object file that accesses more than 8192 GOT entries.  Very few do.
+
+These options have no effect unless GCC is generating
+position-independent code.
+
+@end table
+
+@node M68hc1x Options
+@subsection M68hc1x Options
+@cindex M68hc1x options
+
+These are the @samp{-m} options defined for the 68hc11 and 68hc12
+microcontrollers.  The default values for these options depends on
+which style of microcontroller was selected when the compiler was configured;
+the defaults for the most common choices are given below.
+
+@table @gcctabopt
+@item -m6811
+@itemx -m68hc11
+@opindex m6811
+@opindex m68hc11
+Generate output for a 68HC11.  This is the default
+when the compiler is configured for 68HC11-based systems.
+
+@item -m6812
+@itemx -m68hc12
+@opindex m6812
+@opindex m68hc12
+Generate output for a 68HC12.  This is the default
+when the compiler is configured for 68HC12-based systems.
+
+@item -m68S12
+@itemx -m68hcs12
+@opindex m68S12
+@opindex m68hcs12
+Generate output for a 68HCS12.
+
+@item -mauto-incdec
+@opindex mauto-incdec
+Enable the use of 68HC12 pre and post auto-increment and auto-decrement
+addressing modes.
+
+@item -minmax
+@itemx -mnominmax
+@opindex minmax
+@opindex mnominmax
+Enable the use of 68HC12 min and max instructions.
+
+@item -mlong-calls
+@itemx -mno-long-calls
+@opindex mlong-calls
+@opindex mno-long-calls
+Treat all calls as being far away (near).  If calls are assumed to be
+far away, the compiler will use the @code{call} instruction to
+call a function and the @code{rtc} instruction for returning.
+
+@item -mshort
+@opindex mshort
+Consider type @code{int} to be 16 bits wide, like @code{short int}.
+
+@item -msoft-reg-count=@var{count}
+@opindex msoft-reg-count
+Specify the number of pseudo-soft registers which are used for the
+code generation.  The maximum number is 32.  Using more pseudo-soft
+register may or may not result in better code depending on the program.
+The default is 4 for 68HC11 and 2 for 68HC12.
+
+@end table
+
+@node MCore Options
+@subsection MCore Options
+@cindex MCore options
+
+These are the @samp{-m} options defined for the Motorola M*Core
+processors.
+
+@table @gcctabopt
+
+@item -mhardlit
+@itemx -mno-hardlit
+@opindex mhardlit
+@opindex mno-hardlit
+Inline constants into the code stream if it can be done in two
+instructions or less.
+
+@item -mdiv
+@itemx -mno-div
+@opindex mdiv
+@opindex mno-div
+Use the divide instruction.  (Enabled by default).
+
+@item -mrelax-immediate
+@itemx -mno-relax-immediate
+@opindex mrelax-immediate
+@opindex mno-relax-immediate
+Allow arbitrary sized immediates in bit operations.
+
+@item -mwide-bitfields
+@itemx -mno-wide-bitfields
+@opindex mwide-bitfields
+@opindex mno-wide-bitfields
+Always treat bit-fields as int-sized.
+
+@item -m4byte-functions
+@itemx -mno-4byte-functions
+@opindex m4byte-functions
+@opindex mno-4byte-functions
+Force all functions to be aligned to a four byte boundary.
+
+@item -mcallgraph-data
+@itemx -mno-callgraph-data
+@opindex mcallgraph-data
+@opindex mno-callgraph-data
+Emit callgraph information.
+
+@item -mslow-bytes
+@itemx -mno-slow-bytes
+@opindex mslow-bytes
+@opindex mno-slow-bytes
+Prefer word access when reading byte quantities.
+
+@item -mlittle-endian
+@itemx -mbig-endian
+@opindex mlittle-endian
+@opindex mbig-endian
+Generate code for a little endian target.
+
+@item -m210
+@itemx -m340
+@opindex m210
+@opindex m340
+Generate code for the 210 processor.
+
+@item -mno-lsim
+@opindex mno-lsim
+Assume that run-time support has been provided and so omit the
+simulator library (@file{libsim.a)} from the linker command line.
+
+@item -mstack-increment=@var{size}
+@opindex mstack-increment
+Set the maximum amount for a single stack increment operation.  Large
+values can increase the speed of programs which contain functions
+that need a large amount of stack space, but they can also trigger a
+segmentation fault if the stack is extended too much.  The default
+value is 0x1000.
+
+@end table
+
+@node MeP Options
+@subsection MeP Options
+@cindex MeP options
+
+@table @gcctabopt
+
+@item -mabsdiff
+@opindex mabsdiff
+Enables the @code{abs} instruction, which is the absolute difference
+between two registers.
+
+@item -mall-opts
+@opindex mall-opts
+Enables all the optional instructions - average, multiply, divide, bit
+operations, leading zero, absolute difference, min/max, clip, and
+saturation.
+
+
+@item -maverage
+@opindex maverage
+Enables the @code{ave} instruction, which computes the average of two
+registers.
+
+@item -mbased=@var{n}
+@opindex mbased=
+Variables of size @var{n} bytes or smaller will be placed in the
+@code{.based} section by default.  Based variables use the @code{$tp}
+register as a base register, and there is a 128 byte limit to the
+@code{.based} section.
+
+@item -mbitops
+@opindex mbitops
+Enables the bit operation instructions - bit test (@code{btstm}), set
+(@code{bsetm}), clear (@code{bclrm}), invert (@code{bnotm}), and
+test-and-set (@code{tas}).
+
+@item -mc=@var{name}
+@opindex mc=
+Selects which section constant data will be placed in.  @var{name} may
+be @code{tiny}, @code{near}, or @code{far}.
+
+@item -mclip
+@opindex mclip
+Enables the @code{clip} instruction.  Note that @code{-mclip} is not
+useful unless you also provide @code{-mminmax}.
+
+@item -mconfig=@var{name}
+@opindex mconfig=
+Selects one of the build-in core configurations.  Each MeP chip has
+one or more modules in it; each module has a core CPU and a variety of
+coprocessors, optional instructions, and peripherals.  The
+@code{MeP-Integrator} tool, not part of GCC, provides these
+configurations through this option; using this option is the same as
+using all the corresponding command line options.  The default
+configuration is @code{default}.
+
+@item -mcop
+@opindex mcop
+Enables the coprocessor instructions.  By default, this is a 32-bit
+coprocessor.  Note that the coprocessor is normally enabled via the
+@code{-mconfig=} option.
+
+@item -mcop32
+@opindex mcop32
+Enables the 32-bit coprocessor's instructions.
+
+@item -mcop64
+@opindex mcop64
+Enables the 64-bit coprocessor's instructions.
+
+@item -mivc2
+@opindex mivc2
+Enables IVC2 scheduling.  IVC2 is a 64-bit VLIW coprocessor.
+
+@item -mdc
+@opindex mdc
+Causes constant variables to be placed in the @code{.near} section.
+
+@item -mdiv
+@opindex mdiv
+Enables the @code{div} and @code{divu} instructions.
+
+@item -meb
+@opindex meb
+Generate big-endian code.
+
+@item -mel
+@opindex mel
+Generate little-endian code.
+
+@item -mio-volatile
+@opindex mio-volatile
+Tells the compiler that any variable marked with the @code{io}
+attribute is to be considered volatile.
+
+@item -ml
+@opindex ml
+Causes variables to be assigned to the @code{.far} section by default.
+
+@item -mleadz
+@opindex mleadz
+Enables the @code{leadz} (leading zero) instruction.
+
+@item -mm
+@opindex mm
+Causes variables to be assigned to the @code{.near} section by default.
+
+@item -mminmax
+@opindex mminmax
+Enables the @code{min} and @code{max} instructions.
+
+@item -mmult
+@opindex mmult
+Enables the multiplication and multiply-accumulate instructions.
+
+@item -mno-opts
+@opindex mno-opts
+Disables all the optional instructions enabled by @code{-mall-opts}.
+
+@item -mrepeat
+@opindex mrepeat
+Enables the @code{repeat} and @code{erepeat} instructions, used for
+low-overhead looping.
+
+@item -ms
+@opindex ms
+Causes all variables to default to the @code{.tiny} section.  Note
+that there is a 65536 byte limit to this section.  Accesses to these
+variables use the @code{%gp} base register.
+
+@item -msatur
+@opindex msatur
+Enables the saturation instructions.  Note that the compiler does not
+currently generate these itself, but this option is included for
+compatibility with other tools, like @code{as}.
+
+@item -msdram
+@opindex msdram
+Link the SDRAM-based runtime instead of the default ROM-based runtime.
+
+@item -msim
+@opindex msim
+Link the simulator runtime libraries.
+
+@item -msimnovec
+@opindex msimnovec
+Link the simulator runtime libraries, excluding built-in support
+for reset and exception vectors and tables.
+
+@item -mtf
+@opindex mtf
+Causes all functions to default to the @code{.far} section.  Without
+this option, functions default to the @code{.near} section.
+
+@item -mtiny=@var{n}
+@opindex mtiny=
+Variables that are @var{n} bytes or smaller will be allocated to the
+@code{.tiny} section.  These variables use the @code{$gp} base
+register.  The default for this option is 4, but note that there's a
+65536 byte limit to the @code{.tiny} section.
+
+@end table
+
+@node MicroBlaze Options
+@subsection MicroBlaze Options
+@cindex MicroBlaze Options
+
+@table @gcctabopt
+
+@item -msoft-float
+@opindex msoft-float
+Use software emulation for floating point (default).
+
+@item -mhard-float
+@opindex mhard-float
+Use hardware floating point instructions.
+
+@item -mmemcpy
+@opindex mmemcpy
+Do not optimize block moves, use @code{memcpy}.
+
+@item -mno-clearbss
+@opindex mno-clearbss
+This option is deprecated.  Use @option{-fno-zero-initialized-in-bss} instead.
+
+@item -mcpu=@var{cpu-type}
+@opindex mcpu=
+Use features of and schedule code for given CPU.
+Supported values are in the format @samp{v@var{X}.@var{YY}.@var{Z}}, 
+where @var{X} is a major version, @var{YY} is the minor version, and 
+@var{Z} is compatibility code.  Example values are @samp{v3.00.a},
+@samp{v4.00.b}, @samp{v5.00.a}, @samp{v5.00.b}, @samp{v5.00.b}, @samp{v6.00.a}. 
+
+@item -mxl-soft-mul
+@opindex mxl-soft-mul
+Use software multiply emulation (default).
+
+@item -mxl-soft-div
+@opindex mxl-soft-div
+Use software emulation for divides (default).
+
+@item -mxl-barrel-shift
+@opindex mxl-barrel-shift
+Use the hardware barrel shifter.
+
+@item -mxl-pattern-compare
+@opindex mxl-pattern-compare
+Use pattern compare instructions.
+
+@item -msmall-divides
+@opindex msmall-divides
+Use table lookup optimization for small signed integer divisions.
+
+@item -mxl-stack-check
+@opindex mxl-stack-check
+This option is deprecated.  Use -fstack-check instead.
+
+@item -mxl-gp-opt
+@opindex mxl-gp-opt
+Use GP relative sdata/sbss sections.
+
+@item -mxl-multiply-high
+@opindex mxl-multiply-high
+Use multiply high instructions for high part of 32x32 multiply.
+
+@item -mxl-float-convert
+@opindex mxl-float-convert
+Use hardware floating point conversion instructions.
+
+@item -mxl-float-sqrt
+@opindex mxl-float-sqrt
+Use hardware floating point square root instruction.
+
+@item -mxl-mode-@var{app-model}
+Select application model @var{app-model}.  Valid models are 
+@table @samp
+@item executable
+normal executable (default), uses startup code @file{crt0.o}.
+
+@item xmdstub
+for use with Xilinx Microprocessor Debugger (XMD) based 
+software intrusive debug agent called xmdstub. This uses startup file 
+@file{crt1.o} and sets the start address of the program to be 0x800.
+
+@item bootstrap
+for applications that are loaded using a bootloader.
+This model uses startup file @file{crt2.o} which does not contain a processor 
+reset vector handler. This is suitable for transferring control on a 
+processor reset to the bootloader rather than the application.
+
+@item novectors
+for applications that do not require any of the 
+MicroBlaze vectors. This option may be useful for applications running
+within a monitoring application. This model uses @file{crt3.o} as a startup file.
+@end table
+
+Option @option{-xl-mode-@var{app-model}} is a deprecated alias for 
+@option{-mxl-mode-@var{app-model}}.
+
+@end table
+
+@node MIPS Options
+@subsection MIPS Options
+@cindex MIPS options
+
+@table @gcctabopt
+
+@item -EB
+@opindex EB
+Generate big-endian code.
+
+@item -EL
+@opindex EL
+Generate little-endian code.  This is the default for @samp{mips*el-*-*}
+configurations.
+
+@item -march=@var{arch}
+@opindex march
+Generate code that will run on @var{arch}, which can be the name of a
+generic MIPS ISA, or the name of a particular processor.
+The ISA names are:
+@samp{mips1}, @samp{mips2}, @samp{mips3}, @samp{mips4},
+@samp{mips32}, @samp{mips32r2}, @samp{mips64} and @samp{mips64r2}.
+The processor names are:
+@samp{4kc}, @samp{4km}, @samp{4kp}, @samp{4ksc},
+@samp{4kec}, @samp{4kem}, @samp{4kep}, @samp{4ksd},
+@samp{5kc}, @samp{5kf},
+@samp{20kc},
+@samp{24kc}, @samp{24kf2_1}, @samp{24kf1_1},
+@samp{24kec}, @samp{24kef2_1}, @samp{24kef1_1},
+@samp{34kc}, @samp{34kf2_1}, @samp{34kf1_1},
+@samp{74kc}, @samp{74kf2_1}, @samp{74kf1_1}, @samp{74kf3_2},
+@samp{1004kc}, @samp{1004kf2_1}, @samp{1004kf1_1},
+@samp{loongson2e}, @samp{loongson2f}, @samp{loongson3a},
+@samp{m4k},
+@samp{octeon},
+@samp{orion},
+@samp{r2000}, @samp{r3000}, @samp{r3900}, @samp{r4000}, @samp{r4400},
+@samp{r4600}, @samp{r4650}, @samp{r6000}, @samp{r8000},
+@samp{rm7000}, @samp{rm9000},
+@samp{r10000}, @samp{r12000}, @samp{r14000}, @samp{r16000},
+@samp{sb1},
+@samp{sr71000},
+@samp{vr4100}, @samp{vr4111}, @samp{vr4120}, @samp{vr4130}, @samp{vr4300},
+@samp{vr5000}, @samp{vr5400}, @samp{vr5500}
+and @samp{xlr}.
+The special value @samp{from-abi} selects the
+most compatible architecture for the selected ABI (that is,
+@samp{mips1} for 32-bit ABIs and @samp{mips3} for 64-bit ABIs)@.
+
+Native Linux/GNU toolchains also support the value @samp{native},
+which selects the best architecture option for the host processor.
+@option{-march=native} has no effect if GCC does not recognize
+the processor.
+
+In processor names, a final @samp{000} can be abbreviated as @samp{k}
+(for example, @samp{-march=r2k}).  Prefixes are optional, and
+@samp{vr} may be written @samp{r}.
+
+Names of the form @samp{@var{n}f2_1} refer to processors with
+FPUs clocked at half the rate of the core, names of the form
+@samp{@var{n}f1_1} refer to processors with FPUs clocked at the same
+rate as the core, and names of the form @samp{@var{n}f3_2} refer to
+processors with FPUs clocked a ratio of 3:2 with respect to the core.
+For compatibility reasons, @samp{@var{n}f} is accepted as a synonym
+for @samp{@var{n}f2_1} while @samp{@var{n}x} and @samp{@var{b}fx} are
+accepted as synonyms for @samp{@var{n}f1_1}.
+
+GCC defines two macros based on the value of this option.  The first
+is @samp{_MIPS_ARCH}, which gives the name of target architecture, as
+a string.  The second has the form @samp{_MIPS_ARCH_@var{foo}},
+where @var{foo} is the capitalized value of @samp{_MIPS_ARCH}@.
+For example, @samp{-march=r2000} will set @samp{_MIPS_ARCH}
+to @samp{"r2000"} and define the macro @samp{_MIPS_ARCH_R2000}.
+
+Note that the @samp{_MIPS_ARCH} macro uses the processor names given
+above.  In other words, it will have the full prefix and will not
+abbreviate @samp{000} as @samp{k}.  In the case of @samp{from-abi},
+the macro names the resolved architecture (either @samp{"mips1"} or
+@samp{"mips3"}).  It names the default architecture when no
+@option{-march} option is given.
+
+@item -mtune=@var{arch}
+@opindex mtune
+Optimize for @var{arch}.  Among other things, this option controls
+the way instructions are scheduled, and the perceived cost of arithmetic
+operations.  The list of @var{arch} values is the same as for
+@option{-march}.
+
+When this option is not used, GCC will optimize for the processor
+specified by @option{-march}.  By using @option{-march} and
+@option{-mtune} together, it is possible to generate code that will
+run on a family of processors, but optimize the code for one
+particular member of that family.
+
+@samp{-mtune} defines the macros @samp{_MIPS_TUNE} and
+@samp{_MIPS_TUNE_@var{foo}}, which work in the same way as the
+@samp{-march} ones described above.
+
+@item -mips1
+@opindex mips1
+Equivalent to @samp{-march=mips1}.
+
+@item -mips2
+@opindex mips2
+Equivalent to @samp{-march=mips2}.
+
+@item -mips3
+@opindex mips3
+Equivalent to @samp{-march=mips3}.
+
+@item -mips4
+@opindex mips4
+Equivalent to @samp{-march=mips4}.
+
+@item -mips32
+@opindex mips32
+Equivalent to @samp{-march=mips32}.
+
+@item -mips32r2
+@opindex mips32r2
+Equivalent to @samp{-march=mips32r2}.
+
+@item -mips64
+@opindex mips64
+Equivalent to @samp{-march=mips64}.
+
+@item -mips64r2
+@opindex mips64r2
+Equivalent to @samp{-march=mips64r2}.
+
+@item -mips16
+@itemx -mno-mips16
+@opindex mips16
+@opindex mno-mips16
+Generate (do not generate) MIPS16 code.  If GCC is targetting a
+MIPS32 or MIPS64 architecture, it will make use of the MIPS16e ASE@.
+
+MIPS16 code generation can also be controlled on a per-function basis
+by means of @code{mips16} and @code{nomips16} attributes.
+@xref{Function Attributes}, for more information.
+
+@item -mflip-mips16
+@opindex mflip-mips16
+Generate MIPS16 code on alternating functions.  This option is provided
+for regression testing of mixed MIPS16/non-MIPS16 code generation, and is
+not intended for ordinary use in compiling user code.
+
+@item -minterlink-mips16
+@itemx -mno-interlink-mips16
+@opindex minterlink-mips16
+@opindex mno-interlink-mips16
+Require (do not require) that non-MIPS16 code be link-compatible with
+MIPS16 code.
+
+For example, non-MIPS16 code cannot jump directly to MIPS16 code;
+it must either use a call or an indirect jump.  @option{-minterlink-mips16}
+therefore disables direct jumps unless GCC knows that the target of the
+jump is not MIPS16.
+
+@item -mabi=32
+@itemx -mabi=o64
+@itemx -mabi=n32
+@itemx -mabi=64
+@itemx -mabi=eabi
+@opindex mabi=32
+@opindex mabi=o64
+@opindex mabi=n32
+@opindex mabi=64
+@opindex mabi=eabi
+Generate code for the given ABI@.
+
+Note that the EABI has a 32-bit and a 64-bit variant.  GCC normally
+generates 64-bit code when you select a 64-bit architecture, but you
+can use @option{-mgp32} to get 32-bit code instead.
+
+For information about the O64 ABI, see
+@uref{http://gcc.gnu.org/@/projects/@/mipso64-abi.html}.
+
+GCC supports a variant of the o32 ABI in which floating-point registers
+are 64 rather than 32 bits wide.  You can select this combination with
+@option{-mabi=32} @option{-mfp64}.  This ABI relies on the @samp{mthc1}
+and @samp{mfhc1} instructions and is therefore only supported for
+MIPS32R2 processors.
+
+The register assignments for arguments and return values remain the
+same, but each scalar value is passed in a single 64-bit register
+rather than a pair of 32-bit registers.  For example, scalar
+floating-point values are returned in @samp{$f0} only, not a
+@samp{$f0}/@samp{$f1} pair.  The set of call-saved registers also
+remains the same, but all 64 bits are saved.
+
+@item -mabicalls
+@itemx -mno-abicalls
+@opindex mabicalls
+@opindex mno-abicalls
+Generate (do not generate) code that is suitable for SVR4-style
+dynamic objects.  @option{-mabicalls} is the default for SVR4-based
+systems.
+
+@item -mshared
+@itemx -mno-shared
+Generate (do not generate) code that is fully position-independent,
+and that can therefore be linked into shared libraries.  This option
+only affects @option{-mabicalls}.
+
+All @option{-mabicalls} code has traditionally been position-independent,
+regardless of options like @option{-fPIC} and @option{-fpic}.  However,
+as an extension, the GNU toolchain allows executables to use absolute
+accesses for locally-binding symbols.  It can also use shorter GP
+initialization sequences and generate direct calls to locally-defined
+functions.  This mode is selected by @option{-mno-shared}.
+
+@option{-mno-shared} depends on binutils 2.16 or higher and generates
+objects that can only be linked by the GNU linker.  However, the option
+does not affect the ABI of the final executable; it only affects the ABI
+of relocatable objects.  Using @option{-mno-shared} will generally make
+executables both smaller and quicker.
+
+@option{-mshared} is the default.
+
+@item -mplt
+@itemx -mno-plt
+@opindex mplt
+@opindex mno-plt
+Assume (do not assume) that the static and dynamic linkers
+support PLTs and copy relocations.  This option only affects
+@samp{-mno-shared -mabicalls}.  For the n64 ABI, this option
+has no effect without @samp{-msym32}.
+
+You can make @option{-mplt} the default by configuring
+GCC with @option{--with-mips-plt}.  The default is
+@option{-mno-plt} otherwise.
+
+@item -mxgot
+@itemx -mno-xgot
+@opindex mxgot
+@opindex mno-xgot
+Lift (do not lift) the usual restrictions on the size of the global
+offset table.
+
+GCC normally uses a single instruction to load values from the GOT@.
+While this is relatively efficient, it will only work if the GOT
+is smaller than about 64k.  Anything larger will cause the linker
+to report an error such as:
+
+@cindex relocation truncated to fit (MIPS)
+@smallexample
+relocation truncated to fit: R_MIPS_GOT16 foobar
+@end smallexample
+
+If this happens, you should recompile your code with @option{-mxgot}.
+It should then work with very large GOTs, although it will also be
+less efficient, since it will take three instructions to fetch the
+value of a global symbol.
+
+Note that some linkers can create multiple GOTs.  If you have such a
+linker, you should only need to use @option{-mxgot} when a single object
+file accesses more than 64k's worth of GOT entries.  Very few do.
+
+These options have no effect unless GCC is generating position
+independent code.
+
+@item -mgp32
+@opindex mgp32
+Assume that general-purpose registers are 32 bits wide.
+
+@item -mgp64
+@opindex mgp64
+Assume that general-purpose registers are 64 bits wide.
+
+@item -mfp32
+@opindex mfp32
+Assume that floating-point registers are 32 bits wide.
+
+@item -mfp64
+@opindex mfp64
+Assume that floating-point registers are 64 bits wide.
+
+@item -mhard-float
+@opindex mhard-float
+Use floating-point coprocessor instructions.
+
+@item -msoft-float
+@opindex msoft-float
+Do not use floating-point coprocessor instructions.  Implement
+floating-point calculations using library calls instead.
+
+@item -msingle-float
+@opindex msingle-float
+Assume that the floating-point coprocessor only supports single-precision
+operations.
+
+@item -mdouble-float
+@opindex mdouble-float
+Assume that the floating-point coprocessor supports double-precision
+operations.  This is the default.
+
+@item -mllsc
+@itemx -mno-llsc
+@opindex mllsc
+@opindex mno-llsc
+Use (do not use) @samp{ll}, @samp{sc}, and @samp{sync} instructions to
+implement atomic memory built-in functions.  When neither option is
+specified, GCC will use the instructions if the target architecture
+supports them.
+
+@option{-mllsc} is useful if the runtime environment can emulate the
+instructions and @option{-mno-llsc} can be useful when compiling for
+nonstandard ISAs.  You can make either option the default by
+configuring GCC with @option{--with-llsc} and @option{--without-llsc}
+respectively.  @option{--with-llsc} is the default for some
+configurations; see the installation documentation for details.
+
+@item -mdsp
+@itemx -mno-dsp
+@opindex mdsp
+@opindex mno-dsp
+Use (do not use) revision 1 of the MIPS DSP ASE@.
+@xref{MIPS DSP Built-in Functions}.  This option defines the
+preprocessor macro @samp{__mips_dsp}.  It also defines
+@samp{__mips_dsp_rev} to 1.
+
+@item -mdspr2
+@itemx -mno-dspr2
+@opindex mdspr2
+@opindex mno-dspr2
+Use (do not use) revision 2 of the MIPS DSP ASE@.
+@xref{MIPS DSP Built-in Functions}.  This option defines the
+preprocessor macros @samp{__mips_dsp} and @samp{__mips_dspr2}.
+It also defines @samp{__mips_dsp_rev} to 2.
+
+@item -msmartmips
+@itemx -mno-smartmips
+@opindex msmartmips
+@opindex mno-smartmips
+Use (do not use) the MIPS SmartMIPS ASE.
+
+@item -mpaired-single
+@itemx -mno-paired-single
+@opindex mpaired-single
+@opindex mno-paired-single
+Use (do not use) paired-single floating-point instructions.
+@xref{MIPS Paired-Single Support}.  This option requires
+hardware floating-point support to be enabled.
+
+@item -mdmx
+@itemx -mno-mdmx
+@opindex mdmx
+@opindex mno-mdmx
+Use (do not use) MIPS Digital Media Extension instructions.
+This option can only be used when generating 64-bit code and requires
+hardware floating-point support to be enabled.
+
+@item -mips3d
+@itemx -mno-mips3d
+@opindex mips3d
+@opindex mno-mips3d
+Use (do not use) the MIPS-3D ASE@.  @xref{MIPS-3D Built-in Functions}.
+The option @option{-mips3d} implies @option{-mpaired-single}.
+
+@item -mmt
+@itemx -mno-mt
+@opindex mmt
+@opindex mno-mt
+Use (do not use) MT Multithreading instructions.
+
+@item -mlong64
+@opindex mlong64
+Force @code{long} types to be 64 bits wide.  See @option{-mlong32} for
+an explanation of the default and the way that the pointer size is
+determined.
+
+@item -mlong32
+@opindex mlong32
+Force @code{long}, @code{int}, and pointer types to be 32 bits wide.
+
+The default size of @code{int}s, @code{long}s and pointers depends on
+the ABI@.  All the supported ABIs use 32-bit @code{int}s.  The n64 ABI
+uses 64-bit @code{long}s, as does the 64-bit EABI; the others use
+32-bit @code{long}s.  Pointers are the same size as @code{long}s,
+or the same size as integer registers, whichever is smaller.
+
+@item -msym32
+@itemx -mno-sym32
+@opindex msym32
+@opindex mno-sym32
+Assume (do not assume) that all symbols have 32-bit values, regardless
+of the selected ABI@.  This option is useful in combination with
+@option{-mabi=64} and @option{-mno-abicalls} because it allows GCC
+to generate shorter and faster references to symbolic addresses.
+
+@item -G @var{num}
+@opindex G
+Put definitions of externally-visible data in a small data section
+if that data is no bigger than @var{num} bytes.  GCC can then access
+the data more efficiently; see @option{-mgpopt} for details.
+
+The default @option{-G} option depends on the configuration.
+
+@item -mlocal-sdata
+@itemx -mno-local-sdata
+@opindex mlocal-sdata
+@opindex mno-local-sdata
+Extend (do not extend) the @option{-G} behavior to local data too,
+such as to static variables in C@.  @option{-mlocal-sdata} is the
+default for all configurations.
+
+If the linker complains that an application is using too much small data,
+you might want to try rebuilding the less performance-critical parts with
+@option{-mno-local-sdata}.  You might also want to build large
+libraries with @option{-mno-local-sdata}, so that the libraries leave
+more room for the main program.
+
+@item -mextern-sdata
+@itemx -mno-extern-sdata
+@opindex mextern-sdata
+@opindex mno-extern-sdata
+Assume (do not assume) that externally-defined data will be in
+a small data section if that data is within the @option{-G} limit.
+@option{-mextern-sdata} is the default for all configurations.
+
+If you compile a module @var{Mod} with @option{-mextern-sdata} @option{-G
+@var{num}} @option{-mgpopt}, and @var{Mod} references a variable @var{Var}
+that is no bigger than @var{num} bytes, you must make sure that @var{Var}
+is placed in a small data section.  If @var{Var} is defined by another
+module, you must either compile that module with a high-enough
+@option{-G} setting or attach a @code{section} attribute to @var{Var}'s
+definition.  If @var{Var} is common, you must link the application
+with a high-enough @option{-G} setting.
+
+The easiest way of satisfying these restrictions is to compile
+and link every module with the same @option{-G} option.  However,
+you may wish to build a library that supports several different
+small data limits.  You can do this by compiling the library with
+the highest supported @option{-G} setting and additionally using
+@option{-mno-extern-sdata} to stop the library from making assumptions
+about externally-defined data.
+
+@item -mgpopt
+@itemx -mno-gpopt
+@opindex mgpopt
+@opindex mno-gpopt
+Use (do not use) GP-relative accesses for symbols that are known to be
+in a small data section; see @option{-G}, @option{-mlocal-sdata} and
+@option{-mextern-sdata}.  @option{-mgpopt} is the default for all
+configurations.
+
+@option{-mno-gpopt} is useful for cases where the @code{$gp} register
+might not hold the value of @code{_gp}.  For example, if the code is
+part of a library that might be used in a boot monitor, programs that
+call boot monitor routines will pass an unknown value in @code{$gp}.
+(In such situations, the boot monitor itself would usually be compiled
+with @option{-G0}.)
+
+@option{-mno-gpopt} implies @option{-mno-local-sdata} and
+@option{-mno-extern-sdata}.
+
+@item -membedded-data
+@itemx -mno-embedded-data
+@opindex membedded-data
+@opindex mno-embedded-data
+Allocate variables to the read-only data section first if possible, then
+next in the small data section if possible, otherwise in data.  This gives
+slightly slower code than the default, but reduces the amount of RAM required
+when executing, and thus may be preferred for some embedded systems.
+
+@item -muninit-const-in-rodata
+@itemx -mno-uninit-const-in-rodata
+@opindex muninit-const-in-rodata
+@opindex mno-uninit-const-in-rodata
+Put uninitialized @code{const} variables in the read-only data section.
+This option is only meaningful in conjunction with @option{-membedded-data}.
+
+@item -mcode-readable=@var{setting}
+@opindex mcode-readable
+Specify whether GCC may generate code that reads from executable sections.
+There are three possible settings:
+
+@table @gcctabopt
+@item -mcode-readable=yes
+Instructions may freely access executable sections.  This is the
+default setting.
+
+@item -mcode-readable=pcrel
+MIPS16 PC-relative load instructions can access executable sections,
+but other instructions must not do so.  This option is useful on 4KSc
+and 4KSd processors when the code TLBs have the Read Inhibit bit set.
+It is also useful on processors that can be configured to have a dual
+instruction/data SRAM interface and that, like the M4K, automatically
+redirect PC-relative loads to the instruction RAM.
+
+@item -mcode-readable=no
+Instructions must not access executable sections.  This option can be
+useful on targets that are configured to have a dual instruction/data
+SRAM interface but that (unlike the M4K) do not automatically redirect
+PC-relative loads to the instruction RAM.
+@end table
+
+@item -msplit-addresses
+@itemx -mno-split-addresses
+@opindex msplit-addresses
+@opindex mno-split-addresses
+Enable (disable) use of the @code{%hi()} and @code{%lo()} assembler
+relocation operators.  This option has been superseded by
+@option{-mexplicit-relocs} but is retained for backwards compatibility.
+
+@item -mexplicit-relocs
+@itemx -mno-explicit-relocs
+@opindex mexplicit-relocs
+@opindex mno-explicit-relocs
+Use (do not use) assembler relocation operators when dealing with symbolic
+addresses.  The alternative, selected by @option{-mno-explicit-relocs},
+is to use assembler macros instead.
+
+@option{-mexplicit-relocs} is the default if GCC was configured
+to use an assembler that supports relocation operators.
+
+@item -mcheck-zero-division
+@itemx -mno-check-zero-division
+@opindex mcheck-zero-division
+@opindex mno-check-zero-division
+Trap (do not trap) on integer division by zero.
+
+The default is @option{-mcheck-zero-division}.
+
+@item -mdivide-traps
+@itemx -mdivide-breaks
+@opindex mdivide-traps
+@opindex mdivide-breaks
+MIPS systems check for division by zero by generating either a
+conditional trap or a break instruction.  Using traps results in
+smaller code, but is only supported on MIPS II and later.  Also, some
+versions of the Linux kernel have a bug that prevents trap from
+generating the proper signal (@code{SIGFPE}).  Use @option{-mdivide-traps} to
+allow conditional traps on architectures that support them and
+@option{-mdivide-breaks} to force the use of breaks.
+
+The default is usually @option{-mdivide-traps}, but this can be
+overridden at configure time using @option{--with-divide=breaks}.
+Divide-by-zero checks can be completely disabled using
+@option{-mno-check-zero-division}.
+
+@item -mmemcpy
+@itemx -mno-memcpy
+@opindex mmemcpy
+@opindex mno-memcpy
+Force (do not force) the use of @code{memcpy()} for non-trivial block
+moves.  The default is @option{-mno-memcpy}, which allows GCC to inline
+most constant-sized copies.
+
+@item -mlong-calls
+@itemx -mno-long-calls
+@opindex mlong-calls
+@opindex mno-long-calls
+Disable (do not disable) use of the @code{jal} instruction.  Calling
+functions using @code{jal} is more efficient but requires the caller
+and callee to be in the same 256 megabyte segment.
+
+This option has no effect on abicalls code.  The default is
+@option{-mno-long-calls}.
+
+@item -mmad
+@itemx -mno-mad
+@opindex mmad
+@opindex mno-mad
+Enable (disable) use of the @code{mad}, @code{madu} and @code{mul}
+instructions, as provided by the R4650 ISA@.
+
+@item -mfused-madd
+@itemx -mno-fused-madd
+@opindex mfused-madd
+@opindex mno-fused-madd
+Enable (disable) use of the floating point multiply-accumulate
+instructions, when they are available.  The default is
+@option{-mfused-madd}.
+
+When multiply-accumulate instructions are used, the intermediate
+product is calculated to infinite precision and is not subject to
+the FCSR Flush to Zero bit.  This may be undesirable in some
+circumstances.
+
+@item -nocpp
+@opindex nocpp
+Tell the MIPS assembler to not run its preprocessor over user
+assembler files (with a @samp{.s} suffix) when assembling them.
+
+@item -mfix-r4000
+@itemx -mno-fix-r4000
+@opindex mfix-r4000
+@opindex mno-fix-r4000
+Work around certain R4000 CPU errata:
+@itemize @minus
+@item
+A double-word or a variable shift may give an incorrect result if executed
+immediately after starting an integer division.
+@item
+A double-word or a variable shift may give an incorrect result if executed
+while an integer multiplication is in progress.
+@item
+An integer division may give an incorrect result if started in a delay slot
+of a taken branch or a jump.
+@end itemize
+
+@item -mfix-r4400
+@itemx -mno-fix-r4400
+@opindex mfix-r4400
+@opindex mno-fix-r4400
+Work around certain R4400 CPU errata:
+@itemize @minus
+@item
+A double-word or a variable shift may give an incorrect result if executed
+immediately after starting an integer division.
+@end itemize
+
+@item -mfix-r10000
+@itemx -mno-fix-r10000
+@opindex mfix-r10000
+@opindex mno-fix-r10000
+Work around certain R10000 errata:
+@itemize @minus
+@item
+@code{ll}/@code{sc} sequences may not behave atomically on revisions
+prior to 3.0.  They may deadlock on revisions 2.6 and earlier.
+@end itemize
+
+This option can only be used if the target architecture supports
+branch-likely instructions.  @option{-mfix-r10000} is the default when
+@option{-march=r10000} is used; @option{-mno-fix-r10000} is the default
+otherwise.
+
+@item -mfix-vr4120
+@itemx -mno-fix-vr4120
+@opindex mfix-vr4120
+Work around certain VR4120 errata:
+@itemize @minus
+@item
+@code{dmultu} does not always produce the correct result.
+@item
+@code{div} and @code{ddiv} do not always produce the correct result if one
+of the operands is negative.
+@end itemize
+The workarounds for the division errata rely on special functions in
+@file{libgcc.a}.  At present, these functions are only provided by
+the @code{mips64vr*-elf} configurations.
+
+Other VR4120 errata require a nop to be inserted between certain pairs of
+instructions.  These errata are handled by the assembler, not by GCC itself.
+
+@item -mfix-vr4130
+@opindex mfix-vr4130
+Work around the VR4130 @code{mflo}/@code{mfhi} errata.  The
+workarounds are implemented by the assembler rather than by GCC,
+although GCC will avoid using @code{mflo} and @code{mfhi} if the
+VR4130 @code{macc}, @code{macchi}, @code{dmacc} and @code{dmacchi}
+instructions are available instead.
+
+@item -mfix-sb1
+@itemx -mno-fix-sb1
+@opindex mfix-sb1
+Work around certain SB-1 CPU core errata.
+(This flag currently works around the SB-1 revision 2
+``F1'' and ``F2'' floating point errata.)
+
+@item -mr10k-cache-barrier=@var{setting}
+@opindex mr10k-cache-barrier
+Specify whether GCC should insert cache barriers to avoid the
+side-effects of speculation on R10K processors.
+
+In common with many processors, the R10K tries to predict the outcome
+of a conditional branch and speculatively executes instructions from
+the ``taken'' branch.  It later aborts these instructions if the
+predicted outcome was wrong.  However, on the R10K, even aborted
+instructions can have side effects.
+
+This problem only affects kernel stores and, depending on the system,
+kernel loads.  As an example, a speculatively-executed store may load
+the target memory into cache and mark the cache line as dirty, even if
+the store itself is later aborted.  If a DMA operation writes to the
+same area of memory before the ``dirty'' line is flushed, the cached
+data will overwrite the DMA-ed data.  See the R10K processor manual
+for a full description, including other potential problems.
+
+One workaround is to insert cache barrier instructions before every memory
+access that might be speculatively executed and that might have side
+effects even if aborted.  @option{-mr10k-cache-barrier=@var{setting}}
+controls GCC's implementation of this workaround.  It assumes that
+aborted accesses to any byte in the following regions will not have
+side effects:
+
+@enumerate
+@item
+the memory occupied by the current function's stack frame;
+
+@item
+the memory occupied by an incoming stack argument;
+
+@item
+the memory occupied by an object with a link-time-constant address.
+@end enumerate
+
+It is the kernel's responsibility to ensure that speculative
+accesses to these regions are indeed safe.
+
+If the input program contains a function declaration such as:
+
+@smallexample
+void foo (void);
+@end smallexample
+
+then the implementation of @code{foo} must allow @code{j foo} and
+@code{jal foo} to be executed speculatively.  GCC honors this
+restriction for functions it compiles itself.  It expects non-GCC
+functions (such as hand-written assembly code) to do the same.
+
+The option has three forms:
+
+@table @gcctabopt
+@item -mr10k-cache-barrier=load-store
+Insert a cache barrier before a load or store that might be
+speculatively executed and that might have side effects even
+if aborted.
+
+@item -mr10k-cache-barrier=store
+Insert a cache barrier before a store that might be speculatively
+executed and that might have side effects even if aborted.
+
+@item -mr10k-cache-barrier=none
+Disable the insertion of cache barriers.  This is the default setting.
+@end table
+
+@item -mflush-func=@var{func}
+@itemx -mno-flush-func
+@opindex mflush-func
+Specifies the function to call to flush the I and D caches, or to not
+call any such function.  If called, the function must take the same
+arguments as the common @code{_flush_func()}, that is, the address of the
+memory range for which the cache is being flushed, the size of the
+memory range, and the number 3 (to flush both caches).  The default
+depends on the target GCC was configured for, but commonly is either
+@samp{_flush_func} or @samp{__cpu_flush}.
+
+@item mbranch-cost=@var{num}
+@opindex mbranch-cost
+Set the cost of branches to roughly @var{num} ``simple'' instructions.
+This cost is only a heuristic and is not guaranteed to produce
+consistent results across releases.  A zero cost redundantly selects
+the default, which is based on the @option{-mtune} setting.
+
+@item -mbranch-likely
+@itemx -mno-branch-likely
+@opindex mbranch-likely
+@opindex mno-branch-likely
+Enable or disable use of Branch Likely instructions, regardless of the
+default for the selected architecture.  By default, Branch Likely
+instructions may be generated if they are supported by the selected
+architecture.  An exception is for the MIPS32 and MIPS64 architectures
+and processors which implement those architectures; for those, Branch
+Likely instructions will not be generated by default because the MIPS32
+and MIPS64 architectures specifically deprecate their use.
+
+@item -mfp-exceptions
+@itemx -mno-fp-exceptions
+@opindex mfp-exceptions
+Specifies whether FP exceptions are enabled.  This affects how we schedule
+FP instructions for some processors.  The default is that FP exceptions are
+enabled.
+
+For instance, on the SB-1, if FP exceptions are disabled, and we are emitting
+64-bit code, then we can use both FP pipes.  Otherwise, we can only use one
+FP pipe.
+
+@item -mvr4130-align
+@itemx -mno-vr4130-align
+@opindex mvr4130-align
+The VR4130 pipeline is two-way superscalar, but can only issue two
+instructions together if the first one is 8-byte aligned.  When this
+option is enabled, GCC will align pairs of instructions that it
+thinks should execute in parallel.
+
+This option only has an effect when optimizing for the VR4130.
+It normally makes code faster, but at the expense of making it bigger.
+It is enabled by default at optimization level @option{-O3}.
+
+@item -msynci
+@itemx -mno-synci
+@opindex msynci
+Enable (disable) generation of @code{synci} instructions on
+architectures that support it.  The @code{synci} instructions (if
+enabled) will be generated when @code{__builtin___clear_cache()} is
+compiled.
+
+This option defaults to @code{-mno-synci}, but the default can be
+overridden by configuring with @code{--with-synci}.
+
+When compiling code for single processor systems, it is generally safe
+to use @code{synci}.  However, on many multi-core (SMP) systems, it
+will not invalidate the instruction caches on all cores and may lead
+to undefined behavior.
+
+@item -mrelax-pic-calls
+@itemx -mno-relax-pic-calls
+@opindex mrelax-pic-calls
+Try to turn PIC calls that are normally dispatched via register
+@code{$25} into direct calls.  This is only possible if the linker can
+resolve the destination at link-time and if the destination is within
+range for a direct call.
+
+@option{-mrelax-pic-calls} is the default if GCC was configured to use
+an assembler and a linker that supports the @code{.reloc} assembly
+directive and @code{-mexplicit-relocs} is in effect.  With
+@code{-mno-explicit-relocs}, this optimization can be performed by the
+assembler and the linker alone without help from the compiler.
+
+@item -mmcount-ra-address
+@itemx -mno-mcount-ra-address
+@opindex mmcount-ra-address
+@opindex mno-mcount-ra-address
+Emit (do not emit) code that allows @code{_mcount} to modify the
+calling function's return address.  When enabled, this option extends
+the usual @code{_mcount} interface with a new @var{ra-address}
+parameter, which has type @code{intptr_t *} and is passed in register
+@code{$12}.  @code{_mcount} can then modify the return address by
+doing both of the following:
+@itemize
+@item
+Returning the new address in register @code{$31}.
+@item
+Storing the new address in @code{*@var{ra-address}},
+if @var{ra-address} is nonnull.
+@end itemize
+
+The default is @option{-mno-mcount-ra-address}.
+
+@end table
+
+@node MMIX Options
+@subsection MMIX Options
+@cindex MMIX Options
+
+These options are defined for the MMIX:
+
+@table @gcctabopt
+@item -mlibfuncs
+@itemx -mno-libfuncs
+@opindex mlibfuncs
+@opindex mno-libfuncs
+Specify that intrinsic library functions are being compiled, passing all
+values in registers, no matter the size.
+
+@item -mepsilon
+@itemx -mno-epsilon
+@opindex mepsilon
+@opindex mno-epsilon
+Generate floating-point comparison instructions that compare with respect
+to the @code{rE} epsilon register.
+
+@item -mabi=mmixware
+@itemx -mabi=gnu
+@opindex mabi=mmixware
+@opindex mabi=gnu
+Generate code that passes function parameters and return values that (in
+the called function) are seen as registers @code{$0} and up, as opposed to
+the GNU ABI which uses global registers @code{$231} and up.
+
+@item -mzero-extend
+@itemx -mno-zero-extend
+@opindex mzero-extend
+@opindex mno-zero-extend
+When reading data from memory in sizes shorter than 64 bits, use (do not
+use) zero-extending load instructions by default, rather than
+sign-extending ones.
+
+@item -mknuthdiv
+@itemx -mno-knuthdiv
+@opindex mknuthdiv
+@opindex mno-knuthdiv
+Make the result of a division yielding a remainder have the same sign as
+the divisor.  With the default, @option{-mno-knuthdiv}, the sign of the
+remainder follows the sign of the dividend.  Both methods are
+arithmetically valid, the latter being almost exclusively used.
+
+@item -mtoplevel-symbols
+@itemx -mno-toplevel-symbols
+@opindex mtoplevel-symbols
+@opindex mno-toplevel-symbols
+Prepend (do not prepend) a @samp{:} to all global symbols, so the assembly
+code can be used with the @code{PREFIX} assembly directive.
+
+@item -melf
+@opindex melf
+Generate an executable in the ELF format, rather than the default
+@samp{mmo} format used by the @command{mmix} simulator.
+
+@item -mbranch-predict
+@itemx -mno-branch-predict
+@opindex mbranch-predict
+@opindex mno-branch-predict
+Use (do not use) the probable-branch instructions, when static branch
+prediction indicates a probable branch.
+
+@item -mbase-addresses
+@itemx -mno-base-addresses
+@opindex mbase-addresses
+@opindex mno-base-addresses
+Generate (do not generate) code that uses @emph{base addresses}.  Using a
+base address automatically generates a request (handled by the assembler
+and the linker) for a constant to be set up in a global register.  The
+register is used for one or more base address requests within the range 0
+to 255 from the value held in the register.  The generally leads to short
+and fast code, but the number of different data items that can be
+addressed is limited.  This means that a program that uses lots of static
+data may require @option{-mno-base-addresses}.
+
+@item -msingle-exit
+@itemx -mno-single-exit
+@opindex msingle-exit
+@opindex mno-single-exit
+Force (do not force) generated code to have a single exit point in each
+function.
+@end table
+
+@node MN10300 Options
+@subsection MN10300 Options
+@cindex MN10300 options
+
+These @option{-m} options are defined for Matsushita MN10300 architectures:
+
+@table @gcctabopt
+@item -mmult-bug
+@opindex mmult-bug
+Generate code to avoid bugs in the multiply instructions for the MN10300
+processors.  This is the default.
+
+@item -mno-mult-bug
+@opindex mno-mult-bug
+Do not generate code to avoid bugs in the multiply instructions for the
+MN10300 processors.
+
+@item -mam33
+@opindex mam33
+Generate code which uses features specific to the AM33 processor.
+
+@item -mno-am33
+@opindex mno-am33
+Do not generate code which uses features specific to the AM33 processor.  This
+is the default.
+
+@item -mam33-2
+@opindex mam33-2
+Generate code which uses features specific to the AM33/2.0 processor.
+
+@item -mam34
+@opindex mam34
+Generate code which uses features specific to the AM34 processor.
+
+@item -mtune=@var{cpu-type}
+@opindex mtune
+Use the timing characteristics of the indicated CPU type when
+scheduling instructions.  This does not change the targeted processor
+type.  The CPU type must be one of @samp{mn10300}, @samp{am33},
+@samp{am33-2} or @samp{am34}.
+
+@item -mreturn-pointer-on-d0
+@opindex mreturn-pointer-on-d0
+When generating a function which returns a pointer, return the pointer
+in both @code{a0} and @code{d0}.  Otherwise, the pointer is returned
+only in a0, and attempts to call such functions without a prototype
+would result in errors.  Note that this option is on by default; use
+@option{-mno-return-pointer-on-d0} to disable it.
+
+@item -mno-crt0
+@opindex mno-crt0
+Do not link in the C run-time initialization object file.
+
+@item -mrelax
+@opindex mrelax
+Indicate to the linker that it should perform a relaxation optimization pass
+to shorten branches, calls and absolute memory addresses.  This option only
+has an effect when used on the command line for the final link step.
+
+This option makes symbolic debugging impossible.
+
+@item -mliw
+@opindex mliw
+Allow the compiler to generate @emph{Long Instruction Word}
+instructions if the target is the @samp{AM33} or later.  This is the
+default.  This option defines the preprocessor macro @samp{__LIW__}.
+
+@item -mnoliw
+@opindex mnoliw
+Do not allow the compiler to generate @emph{Long Instruction Word}
+instructions.  This option defines the preprocessor macro
+@samp{__NO_LIW__}.
+
+@end table
+
+@node PDP-11 Options
+@subsection PDP-11 Options
+@cindex PDP-11 Options
+
+These options are defined for the PDP-11:
+
+@table @gcctabopt
+@item -mfpu
+@opindex mfpu
+Use hardware FPP floating point.  This is the default.  (FIS floating
+point on the PDP-11/40 is not supported.)
+
+@item -msoft-float
+@opindex msoft-float
+Do not use hardware floating point.
+
+@item -mac0
+@opindex mac0
+Return floating-point results in ac0 (fr0 in Unix assembler syntax).
+
+@item -mno-ac0
+@opindex mno-ac0
+Return floating-point results in memory.  This is the default.
+
+@item -m40
+@opindex m40
+Generate code for a PDP-11/40.
+
+@item -m45
+@opindex m45
+Generate code for a PDP-11/45.  This is the default.
+
+@item -m10
+@opindex m10
+Generate code for a PDP-11/10.
+
+@item -mbcopy-builtin
+@opindex mbcopy-builtin
+Use inline @code{movmemhi} patterns for copying memory.  This is the
+default.
+
+@item -mbcopy
+@opindex mbcopy
+Do not use inline @code{movmemhi} patterns for copying memory.
+
+@item -mint16
+@itemx -mno-int32
+@opindex mint16
+@opindex mno-int32
+Use 16-bit @code{int}.  This is the default.
+
+@item -mint32
+@itemx -mno-int16
+@opindex mint32
+@opindex mno-int16
+Use 32-bit @code{int}.
+
+@item -mfloat64
+@itemx -mno-float32
+@opindex mfloat64
+@opindex mno-float32
+Use 64-bit @code{float}.  This is the default.
+
+@item -mfloat32
+@itemx -mno-float64
+@opindex mfloat32
+@opindex mno-float64
+Use 32-bit @code{float}.
+
+@item -mabshi
+@opindex mabshi
+Use @code{abshi2} pattern.  This is the default.
+
+@item -mno-abshi
+@opindex mno-abshi
+Do not use @code{abshi2} pattern.
+
+@item -mbranch-expensive
+@opindex mbranch-expensive
+Pretend that branches are expensive.  This is for experimenting with
+code generation only.
+
+@item -mbranch-cheap
+@opindex mbranch-cheap
+Do not pretend that branches are expensive.  This is the default.
+
+@item -munix-asm
+@opindex munix-asm
+Use Unix assembler syntax.  This is the default when configured for
+@samp{pdp11-*-bsd}.
+
+@item -mdec-asm
+@opindex mdec-asm
+Use DEC assembler syntax.  This is the default when configured for any
+PDP-11 target other than @samp{pdp11-*-bsd}.
+@end table
+
+@node picoChip Options
+@subsection picoChip Options
+@cindex picoChip options
+
+These @samp{-m} options are defined for picoChip implementations:
+
+@table @gcctabopt
+
+@item -mae=@var{ae_type}
+@opindex mcpu
+Set the instruction set, register set, and instruction scheduling
+parameters for array element type @var{ae_type}.  Supported values
+for @var{ae_type} are @samp{ANY}, @samp{MUL}, and @samp{MAC}.
+
+@option{-mae=ANY} selects a completely generic AE type.  Code
+generated with this option will run on any of the other AE types.  The
+code will not be as efficient as it would be if compiled for a specific
+AE type, and some types of operation (e.g., multiplication) will not
+work properly on all types of AE.
+
+@option{-mae=MUL} selects a MUL AE type.  This is the most useful AE type
+for compiled code, and is the default.
+
+@option{-mae=MAC} selects a DSP-style MAC AE.  Code compiled with this
+option may suffer from poor performance of byte (char) manipulation,
+since the DSP AE does not provide hardware support for byte load/stores.
+
+@item -msymbol-as-address
+Enable the compiler to directly use a symbol name as an address in a
+load/store instruction, without first loading it into a
+register.  Typically, the use of this option will generate larger
+programs, which run faster than when the option isn't used.  However, the
+results vary from program to program, so it is left as a user option,
+rather than being permanently enabled.
+
+@item -mno-inefficient-warnings
+Disables warnings about the generation of inefficient code.  These
+warnings can be generated, for example, when compiling code which
+performs byte-level memory operations on the MAC AE type.  The MAC AE has
+no hardware support for byte-level memory operations, so all byte
+load/stores must be synthesized from word load/store operations.  This is
+inefficient and a warning will be generated indicating to the programmer
+that they should rewrite the code to avoid byte operations, or to target
+an AE type which has the necessary hardware support.  This option enables
+the warning to be turned off.
+
+@end table
+
+@node PowerPC Options
+@subsection PowerPC Options
+@cindex PowerPC options
+
+These are listed under @xref{RS/6000 and PowerPC Options}.
+
+@node RS/6000 and PowerPC Options
+@subsection IBM RS/6000 and PowerPC Options
+@cindex RS/6000 and PowerPC Options
+@cindex IBM RS/6000 and PowerPC Options
+
+These @samp{-m} options are defined for the IBM RS/6000 and PowerPC:
+@table @gcctabopt
+@item -mpower
+@itemx -mno-power
+@itemx -mpower2
+@itemx -mno-power2
+@itemx -mpowerpc
+@itemx -mno-powerpc
+@itemx -mpowerpc-gpopt
+@itemx -mno-powerpc-gpopt
+@itemx -mpowerpc-gfxopt
+@itemx -mno-powerpc-gfxopt
+@need 800
+@itemx -mpowerpc64
+@itemx -mno-powerpc64
+@itemx -mmfcrf
+@itemx -mno-mfcrf
+@itemx -mpopcntb
+@itemx -mno-popcntb
+@itemx -mpopcntd
+@itemx -mno-popcntd
+@itemx -mfprnd
+@itemx -mno-fprnd
+@need 800
+@itemx -mcmpb
+@itemx -mno-cmpb
+@itemx -mmfpgpr
+@itemx -mno-mfpgpr
+@itemx -mhard-dfp
+@itemx -mno-hard-dfp
+@opindex mpower
+@opindex mno-power
+@opindex mpower2
+@opindex mno-power2
+@opindex mpowerpc
+@opindex mno-powerpc
+@opindex mpowerpc-gpopt
+@opindex mno-powerpc-gpopt
+@opindex mpowerpc-gfxopt
+@opindex mno-powerpc-gfxopt
+@opindex mpowerpc64
+@opindex mno-powerpc64
+@opindex mmfcrf
+@opindex mno-mfcrf
+@opindex mpopcntb
+@opindex mno-popcntb
+@opindex mpopcntd
+@opindex mno-popcntd
+@opindex mfprnd
+@opindex mno-fprnd
+@opindex mcmpb
+@opindex mno-cmpb
+@opindex mmfpgpr
+@opindex mno-mfpgpr
+@opindex mhard-dfp
+@opindex mno-hard-dfp
+GCC supports two related instruction set architectures for the
+RS/6000 and PowerPC@.  The @dfn{POWER} instruction set are those
+instructions supported by the @samp{rios} chip set used in the original
+RS/6000 systems and the @dfn{PowerPC} instruction set is the
+architecture of the Freescale MPC5xx, MPC6xx, MPC8xx microprocessors, and
+the IBM 4xx, 6xx, and follow-on microprocessors.
+
+Neither architecture is a subset of the other.  However there is a
+large common subset of instructions supported by both.  An MQ
+register is included in processors supporting the POWER architecture.
+
+You use these options to specify which instructions are available on the
+processor you are using.  The default value of these options is
+determined when configuring GCC@.  Specifying the
+@option{-mcpu=@var{cpu_type}} overrides the specification of these
+options.  We recommend you use the @option{-mcpu=@var{cpu_type}} option
+rather than the options listed above.
+
+The @option{-mpower} option allows GCC to generate instructions that
+are found only in the POWER architecture and to use the MQ register.
+Specifying @option{-mpower2} implies @option{-power} and also allows GCC
+to generate instructions that are present in the POWER2 architecture but
+not the original POWER architecture.
+
+The @option{-mpowerpc} option allows GCC to generate instructions that
+are found only in the 32-bit subset of the PowerPC architecture.
+Specifying @option{-mpowerpc-gpopt} implies @option{-mpowerpc} and also allows
+GCC to use the optional PowerPC architecture instructions in the
+General Purpose group, including floating-point square root.  Specifying
+@option{-mpowerpc-gfxopt} implies @option{-mpowerpc} and also allows GCC to
+use the optional PowerPC architecture instructions in the Graphics
+group, including floating-point select.
+
+The @option{-mmfcrf} option allows GCC to generate the move from
+condition register field instruction implemented on the POWER4
+processor and other processors that support the PowerPC V2.01
+architecture.
+The @option{-mpopcntb} option allows GCC to generate the popcount and
+double precision FP reciprocal estimate instruction implemented on the
+POWER5 processor and other processors that support the PowerPC V2.02
+architecture.
+The @option{-mpopcntd} option allows GCC to generate the popcount
+instruction implemented on the POWER7 processor and other processors
+that support the PowerPC V2.06 architecture.
+The @option{-mfprnd} option allows GCC to generate the FP round to
+integer instructions implemented on the POWER5+ processor and other
+processors that support the PowerPC V2.03 architecture.
+The @option{-mcmpb} option allows GCC to generate the compare bytes
+instruction implemented on the POWER6 processor and other processors
+that support the PowerPC V2.05 architecture.
+The @option{-mmfpgpr} option allows GCC to generate the FP move to/from
+general purpose register instructions implemented on the POWER6X
+processor and other processors that support the extended PowerPC V2.05
+architecture.
+The @option{-mhard-dfp} option allows GCC to generate the decimal floating
+point instructions implemented on some POWER processors.
+
+The @option{-mpowerpc64} option allows GCC to generate the additional
+64-bit instructions that are found in the full PowerPC64 architecture
+and to treat GPRs as 64-bit, doubleword quantities.  GCC defaults to
+@option{-mno-powerpc64}.
+
+If you specify both @option{-mno-power} and @option{-mno-powerpc}, GCC
+will use only the instructions in the common subset of both
+architectures plus some special AIX common-mode calls, and will not use
+the MQ register.  Specifying both @option{-mpower} and @option{-mpowerpc}
+permits GCC to use any instruction from either architecture and to
+allow use of the MQ register; specify this for the Motorola MPC601.
+
+@item -mnew-mnemonics
+@itemx -mold-mnemonics
+@opindex mnew-mnemonics
+@opindex mold-mnemonics
+Select which mnemonics to use in the generated assembler code.  With
+@option{-mnew-mnemonics}, GCC uses the assembler mnemonics defined for
+the PowerPC architecture.  With @option{-mold-mnemonics} it uses the
+assembler mnemonics defined for the POWER architecture.  Instructions
+defined in only one architecture have only one mnemonic; GCC uses that
+mnemonic irrespective of which of these options is specified.
+
+GCC defaults to the mnemonics appropriate for the architecture in
+use.  Specifying @option{-mcpu=@var{cpu_type}} sometimes overrides the
+value of these option.  Unless you are building a cross-compiler, you
+should normally not specify either @option{-mnew-mnemonics} or
+@option{-mold-mnemonics}, but should instead accept the default.
+
+@item -mcpu=@var{cpu_type}
+@opindex mcpu
+Set architecture type, register usage, choice of mnemonics, and
+instruction scheduling parameters for machine type @var{cpu_type}.
+Supported values for @var{cpu_type} are @samp{401}, @samp{403},
+@samp{405}, @samp{405fp}, @samp{440}, @samp{440fp}, @samp{464}, @samp{464fp},
+@samp{476}, @samp{476fp}, @samp{505}, @samp{601}, @samp{602}, @samp{603},
+@samp{603e}, @samp{604}, @samp{604e}, @samp{620}, @samp{630}, @samp{740},
+@samp{7400}, @samp{7450}, @samp{750}, @samp{801}, @samp{821}, @samp{823},
+@samp{860}, @samp{970}, @samp{8540}, @samp{a2}, @samp{e300c2},
+@samp{e300c3}, @samp{e500mc}, @samp{e500mc64}, @samp{ec603e}, @samp{G3},
+@samp{G4}, @samp{G5}, @samp{titan}, @samp{power}, @samp{power2}, @samp{power3},
+@samp{power4}, @samp{power5}, @samp{power5+}, @samp{power6}, @samp{power6x},
+@samp{power7}, @samp{common}, @samp{powerpc}, @samp{powerpc64}, @samp{rios},
+@samp{rios1}, @samp{rios2}, @samp{rsc}, and @samp{rs64}.
+
+@option{-mcpu=common} selects a completely generic processor.  Code
+generated under this option will run on any POWER or PowerPC processor.
+GCC will use only the instructions in the common subset of both
+architectures, and will not use the MQ register.  GCC assumes a generic
+processor model for scheduling purposes.
+
+@option{-mcpu=power}, @option{-mcpu=power2}, @option{-mcpu=powerpc}, and
+@option{-mcpu=powerpc64} specify generic POWER, POWER2, pure 32-bit
+PowerPC (i.e., not MPC601), and 64-bit PowerPC architecture machine
+types, with an appropriate, generic processor model assumed for
+scheduling purposes.
+
+The other options specify a specific processor.  Code generated under
+those options will run best on that processor, and may not run at all on
+others.
+
+The @option{-mcpu} options automatically enable or disable the
+following options:
+
+@gccoptlist{-maltivec  -mfprnd  -mhard-float  -mmfcrf  -mmultiple @gol
+-mnew-mnemonics  -mpopcntb -mpopcntd  -mpower  -mpower2  -mpowerpc64 @gol
+-mpowerpc-gpopt  -mpowerpc-gfxopt  -msingle-float -mdouble-float @gol
+-msimple-fpu -mstring  -mmulhw  -mdlmzb  -mmfpgpr -mvsx}
+
+The particular options set for any particular CPU will vary between
+compiler versions, depending on what setting seems to produce optimal
+code for that CPU; it doesn't necessarily reflect the actual hardware's
+capabilities.  If you wish to set an individual option to a particular
+value, you may specify it after the @option{-mcpu} option, like
+@samp{-mcpu=970 -mno-altivec}.
+
+On AIX, the @option{-maltivec} and @option{-mpowerpc64} options are
+not enabled or disabled by the @option{-mcpu} option at present because
+AIX does not have full support for these options.  You may still
+enable or disable them individually if you're sure it'll work in your
+environment.
+
+@item -mtune=@var{cpu_type}
+@opindex mtune
+Set the instruction scheduling parameters for machine type
+@var{cpu_type}, but do not set the architecture type, register usage, or
+choice of mnemonics, as @option{-mcpu=@var{cpu_type}} would.  The same
+values for @var{cpu_type} are used for @option{-mtune} as for
+@option{-mcpu}.  If both are specified, the code generated will use the
+architecture, registers, and mnemonics set by @option{-mcpu}, but the
+scheduling parameters set by @option{-mtune}.
+
+@item -mcmodel=small
+@opindex mcmodel=small
+Generate PowerPC64 code for the small model: The TOC is limited to
+64k.
+
+@item -mcmodel=medium
+@opindex mcmodel=medium
+Generate PowerPC64 code for the medium model: The TOC and other static
+data may be up to a total of 4G in size.
+
+@item -mcmodel=large
+@opindex mcmodel=large
+Generate PowerPC64 code for the large model: The TOC may be up to 4G
+in size.  Other data and code is only limited by the 64-bit address
+space.
+
+@item -maltivec
+@itemx -mno-altivec
+@opindex maltivec
+@opindex mno-altivec
+Generate code that uses (does not use) AltiVec instructions, and also
+enable the use of built-in functions that allow more direct access to
+the AltiVec instruction set.  You may also need to set
+@option{-mabi=altivec} to adjust the current ABI with AltiVec ABI
+enhancements.
+
+@item -mvrsave
+@itemx -mno-vrsave
+@opindex mvrsave
+@opindex mno-vrsave
+Generate VRSAVE instructions when generating AltiVec code.
+
+@item -mgen-cell-microcode
+@opindex mgen-cell-microcode
+Generate Cell microcode instructions
+
+@item -mwarn-cell-microcode
+@opindex mwarn-cell-microcode
+Warning when a Cell microcode instruction is going to emitted.  An example
+of a Cell microcode instruction is a variable shift.
+
+@item -msecure-plt
+@opindex msecure-plt
+Generate code that allows ld and ld.so to build executables and shared
+libraries with non-exec .plt and .got sections.  This is a PowerPC
+32-bit SYSV ABI option.
+
+@item -mbss-plt
+@opindex mbss-plt
+Generate code that uses a BSS .plt section that ld.so fills in, and
+requires .plt and .got sections that are both writable and executable.
+This is a PowerPC 32-bit SYSV ABI option.
+
+@item -misel
+@itemx -mno-isel
+@opindex misel
+@opindex mno-isel
+This switch enables or disables the generation of ISEL instructions.
+
+@item -misel=@var{yes/no}
+This switch has been deprecated.  Use @option{-misel} and
+@option{-mno-isel} instead.
+
+@item -mspe
+@itemx -mno-spe
+@opindex mspe
+@opindex mno-spe
+This switch enables or disables the generation of SPE simd
+instructions.
+
+@item -mpaired
+@itemx -mno-paired
+@opindex mpaired
+@opindex mno-paired
+This switch enables or disables the generation of PAIRED simd
+instructions.
+
+@item -mspe=@var{yes/no}
+This option has been deprecated.  Use @option{-mspe} and
+@option{-mno-spe} instead.
+
+@item -mvsx
+@itemx -mno-vsx
+@opindex mvsx
+@opindex mno-vsx
+Generate code that uses (does not use) vector/scalar (VSX)
+instructions, and also enable the use of built-in functions that allow
+more direct access to the VSX instruction set.
+
+@item -mfloat-gprs=@var{yes/single/double/no}
+@itemx -mfloat-gprs
+@opindex mfloat-gprs
+This switch enables or disables the generation of floating point
+operations on the general purpose registers for architectures that
+support it.
+
+The argument @var{yes} or @var{single} enables the use of
+single-precision floating point operations.
+
+The argument @var{double} enables the use of single and
+double-precision floating point operations.
+
+The argument @var{no} disables floating point operations on the
+general purpose registers.
+
+This option is currently only available on the MPC854x.
+
+@item -m32
+@itemx -m64
+@opindex m32
+@opindex m64
+Generate code for 32-bit or 64-bit environments of Darwin and SVR4
+targets (including GNU/Linux).  The 32-bit environment sets int, long
+and pointer to 32 bits and generates code that runs on any PowerPC
+variant.  The 64-bit environment sets int to 32 bits and long and
+pointer to 64 bits, and generates code for PowerPC64, as for
+@option{-mpowerpc64}.
+
+@item -mfull-toc
+@itemx -mno-fp-in-toc
+@itemx -mno-sum-in-toc
+@itemx -mminimal-toc
+@opindex mfull-toc
+@opindex mno-fp-in-toc
+@opindex mno-sum-in-toc
+@opindex mminimal-toc
+Modify generation of the TOC (Table Of Contents), which is created for
+every executable file.  The @option{-mfull-toc} option is selected by
+default.  In that case, GCC will allocate at least one TOC entry for
+each unique non-automatic variable reference in your program.  GCC
+will also place floating-point constants in the TOC@.  However, only
+16,384 entries are available in the TOC@.
+
+If you receive a linker error message that saying you have overflowed
+the available TOC space, you can reduce the amount of TOC space used
+with the @option{-mno-fp-in-toc} and @option{-mno-sum-in-toc} options.
+@option{-mno-fp-in-toc} prevents GCC from putting floating-point
+constants in the TOC and @option{-mno-sum-in-toc} forces GCC to
+generate code to calculate the sum of an address and a constant at
+run-time instead of putting that sum into the TOC@.  You may specify one
+or both of these options.  Each causes GCC to produce very slightly
+slower and larger code at the expense of conserving TOC space.
+
+If you still run out of space in the TOC even when you specify both of
+these options, specify @option{-mminimal-toc} instead.  This option causes
+GCC to make only one TOC entry for every file.  When you specify this
+option, GCC will produce code that is slower and larger but which
+uses extremely little TOC space.  You may wish to use this option
+only on files that contain less frequently executed code.
+
+@item -maix64
+@itemx -maix32
+@opindex maix64
+@opindex maix32
+Enable 64-bit AIX ABI and calling convention: 64-bit pointers, 64-bit
+@code{long} type, and the infrastructure needed to support them.
+Specifying @option{-maix64} implies @option{-mpowerpc64} and
+@option{-mpowerpc}, while @option{-maix32} disables the 64-bit ABI and
+implies @option{-mno-powerpc64}.  GCC defaults to @option{-maix32}.
+
+@item -mxl-compat
+@itemx -mno-xl-compat
+@opindex mxl-compat
+@opindex mno-xl-compat
+Produce code that conforms more closely to IBM XL compiler semantics
+when using AIX-compatible ABI@.  Pass floating-point arguments to
+prototyped functions beyond the register save area (RSA) on the stack
+in addition to argument FPRs.  Do not assume that most significant
+double in 128-bit long double value is properly rounded when comparing
+values and converting to double.  Use XL symbol names for long double
+support routines.
+
+The AIX calling convention was extended but not initially documented to
+handle an obscure K&R C case of calling a function that takes the
+address of its arguments with fewer arguments than declared.  IBM XL
+compilers access floating point arguments which do not fit in the
+RSA from the stack when a subroutine is compiled without
+optimization.  Because always storing floating-point arguments on the
+stack is inefficient and rarely needed, this option is not enabled by
+default and only is necessary when calling subroutines compiled by IBM
+XL compilers without optimization.
+
+@item -mpe
+@opindex mpe
+Support @dfn{IBM RS/6000 SP} @dfn{Parallel Environment} (PE)@.  Link an
+application written to use message passing with special startup code to
+enable the application to run.  The system must have PE installed in the
+standard location (@file{/usr/lpp/ppe.poe/}), or the @file{specs} file
+must be overridden with the @option{-specs=} option to specify the
+appropriate directory location.  The Parallel Environment does not
+support threads, so the @option{-mpe} option and the @option{-pthread}
+option are incompatible.
+
+@item -malign-natural
+@itemx -malign-power
+@opindex malign-natural
+@opindex malign-power
+On AIX, 32-bit Darwin, and 64-bit PowerPC GNU/Linux, the option
+@option{-malign-natural} overrides the ABI-defined alignment of larger
+types, such as floating-point doubles, on their natural size-based boundary.
+The option @option{-malign-power} instructs GCC to follow the ABI-specified
+alignment rules.  GCC defaults to the standard alignment defined in the ABI@.
+
+On 64-bit Darwin, natural alignment is the default, and @option{-malign-power}
+is not supported.
+
+@item -msoft-float
+@itemx -mhard-float
+@opindex msoft-float
+@opindex mhard-float
+Generate code that does not use (uses) the floating-point register set.
+Software floating point emulation is provided if you use the
+@option{-msoft-float} option, and pass the option to GCC when linking.
+
+@item -msingle-float
+@itemx -mdouble-float
+@opindex msingle-float
+@opindex mdouble-float
+Generate code for single or double-precision floating point operations.
+@option{-mdouble-float} implies @option{-msingle-float}.
+
+@item -msimple-fpu
+@opindex msimple-fpu
+Do not generate sqrt and div instructions for hardware floating point unit.
+
+@item -mfpu
+@opindex mfpu
+Specify type of floating point unit.  Valid values are @var{sp_lite}
+(equivalent to -msingle-float -msimple-fpu), @var{dp_lite} (equivalent
+to -mdouble-float -msimple-fpu), @var{sp_full} (equivalent to -msingle-float),
+and @var{dp_full} (equivalent to -mdouble-float).
+
+@item -mxilinx-fpu
+@opindex mxilinx-fpu
+Perform optimizations for floating point unit on Xilinx PPC 405/440.
+
+@item -mmultiple
+@itemx -mno-multiple
+@opindex mmultiple
+@opindex mno-multiple
+Generate code that uses (does not use) the load multiple word
+instructions and the store multiple word instructions.  These
+instructions are generated by default on POWER systems, and not
+generated on PowerPC systems.  Do not use @option{-mmultiple} on little
+endian PowerPC systems, since those instructions do not work when the
+processor is in little endian mode.  The exceptions are PPC740 and
+PPC750 which permit the instructions usage in little endian mode.
+
+@item -mstring
+@itemx -mno-string
+@opindex mstring
+@opindex mno-string
+Generate code that uses (does not use) the load string instructions
+and the store string word instructions to save multiple registers and
+do small block moves.  These instructions are generated by default on
+POWER systems, and not generated on PowerPC systems.  Do not use
+@option{-mstring} on little endian PowerPC systems, since those
+instructions do not work when the processor is in little endian mode.
+The exceptions are PPC740 and PPC750 which permit the instructions
+usage in little endian mode.
+
+@item -mupdate
+@itemx -mno-update
+@opindex mupdate
+@opindex mno-update
+Generate code that uses (does not use) the load or store instructions
+that update the base register to the address of the calculated memory
+location.  These instructions are generated by default.  If you use
+@option{-mno-update}, there is a small window between the time that the
+stack pointer is updated and the address of the previous frame is
+stored, which means code that walks the stack frame across interrupts or
+signals may get corrupted data.
+
+@item -mavoid-indexed-addresses
+@itemx -mno-avoid-indexed-addresses
+@opindex mavoid-indexed-addresses
+@opindex mno-avoid-indexed-addresses
+Generate code that tries to avoid (not avoid) the use of indexed load
+or store instructions. These instructions can incur a performance
+penalty on Power6 processors in certain situations, such as when
+stepping through large arrays that cross a 16M boundary.  This option
+is enabled by default when targetting Power6 and disabled otherwise.
+
+@item -mfused-madd
+@itemx -mno-fused-madd
+@opindex mfused-madd
+@opindex mno-fused-madd
+Generate code that uses (does not use) the floating point multiply and
+accumulate instructions.  These instructions are generated by default
+if hardware floating point is used.  The machine dependent
+@option{-mfused-madd} option is now mapped to the machine independent
+@option{-ffp-contract=fast} option, and @option{-mno-fused-madd} is
+mapped to @option{-ffp-contract=off}.
+
+@item -mmulhw
+@itemx -mno-mulhw
+@opindex mmulhw
+@opindex mno-mulhw
+Generate code that uses (does not use) the half-word multiply and
+multiply-accumulate instructions on the IBM 405, 440, 464 and 476 processors.
+These instructions are generated by default when targetting those
+processors.
+
+@item -mdlmzb
+@itemx -mno-dlmzb
+@opindex mdlmzb
+@opindex mno-dlmzb
+Generate code that uses (does not use) the string-search @samp{dlmzb}
+instruction on the IBM 405, 440, 464 and 476 processors.  This instruction is
+generated by default when targetting those processors.
+
+@item -mno-bit-align
+@itemx -mbit-align
+@opindex mno-bit-align
+@opindex mbit-align
+On System V.4 and embedded PowerPC systems do not (do) force structures
+and unions that contain bit-fields to be aligned to the base type of the
+bit-field.
+
+For example, by default a structure containing nothing but 8
+@code{unsigned} bit-fields of length 1 would be aligned to a 4 byte
+boundary and have a size of 4 bytes.  By using @option{-mno-bit-align},
+the structure would be aligned to a 1 byte boundary and be one byte in
+size.
+
+@item -mno-strict-align
+@itemx -mstrict-align
+@opindex mno-strict-align
+@opindex mstrict-align
+On System V.4 and embedded PowerPC systems do not (do) assume that
+unaligned memory references will be handled by the system.
+
+@item -mrelocatable
+@itemx -mno-relocatable
+@opindex mrelocatable
+@opindex mno-relocatable
+Generate code that allows (does not allow) a static executable to be
+relocated to a different address at runtime.  A simple embedded
+PowerPC system loader should relocate the entire contents of
+@code{.got2} and 4-byte locations listed in the @code{.fixup} section,
+a table of 32-bit addresses generated by this option.  For this to
+work, all objects linked together must be compiled with
+@option{-mrelocatable} or @option{-mrelocatable-lib}.
+@option{-mrelocatable} code aligns the stack to an 8 byte boundary.
+
+@item -mrelocatable-lib
+@itemx -mno-relocatable-lib
+@opindex mrelocatable-lib
+@opindex mno-relocatable-lib
+Like @option{-mrelocatable}, @option{-mrelocatable-lib} generates a
+@code{.fixup} section to allow static executables to be relocated at
+runtime, but @option{-mrelocatable-lib} does not use the smaller stack
+alignment of @option{-mrelocatable}.  Objects compiled with
+@option{-mrelocatable-lib} may be linked with objects compiled with
+any combination of the @option{-mrelocatable} options.
+
+@item -mno-toc
+@itemx -mtoc
+@opindex mno-toc
+@opindex mtoc
+On System V.4 and embedded PowerPC systems do not (do) assume that
+register 2 contains a pointer to a global area pointing to the addresses
+used in the program.
+
+@item -mlittle
+@itemx -mlittle-endian
+@opindex mlittle
+@opindex mlittle-endian
+On System V.4 and embedded PowerPC systems compile code for the
+processor in little endian mode.  The @option{-mlittle-endian} option is
+the same as @option{-mlittle}.
+
+@item -mbig
+@itemx -mbig-endian
+@opindex mbig
+@opindex mbig-endian
+On System V.4 and embedded PowerPC systems compile code for the
+processor in big endian mode.  The @option{-mbig-endian} option is
+the same as @option{-mbig}.
+
+@item -mdynamic-no-pic
+@opindex mdynamic-no-pic
+On Darwin and Mac OS X systems, compile code so that it is not
+relocatable, but that its external references are relocatable.  The
+resulting code is suitable for applications, but not shared
+libraries.
+
+@item -msingle-pic-base
+@opindex msingle-pic-base
+Treat the register used for PIC addressing as read-only, rather than
+loading it in the prologue for each function.  The run-time system is
+responsible for initializing this register with an appropriate value
+before execution begins.
+
+@item -mprioritize-restricted-insns=@var{priority}
+@opindex mprioritize-restricted-insns
+This option controls the priority that is assigned to
+dispatch-slot restricted instructions during the second scheduling
+pass.  The argument @var{priority} takes the value @var{0/1/2} to assign
+@var{no/highest/second-highest} priority to dispatch slot restricted
+instructions.
+
+@item -msched-costly-dep=@var{dependence_type}
+@opindex msched-costly-dep
+This option controls which dependences are considered costly
+by the target during instruction scheduling.  The argument
+@var{dependence_type} takes one of the following values:
+@var{no}: no dependence is costly,
+@var{all}: all dependences are costly,
+@var{true_store_to_load}: a true dependence from store to load is costly,
+@var{store_to_load}: any dependence from store to load is costly,
+@var{number}: any dependence which latency >= @var{number} is costly.
+
+@item -minsert-sched-nops=@var{scheme}
+@opindex minsert-sched-nops
+This option controls which nop insertion scheme will be used during
+the second scheduling pass.  The argument @var{scheme} takes one of the
+following values:
+@var{no}: Don't insert nops.
+@var{pad}: Pad with nops any dispatch group which has vacant issue slots,
+according to the scheduler's grouping.
+@var{regroup_exact}: Insert nops to force costly dependent insns into
+separate groups.  Insert exactly as many nops as needed to force an insn
+to a new group, according to the estimated processor grouping.
+@var{number}: Insert nops to force costly dependent insns into
+separate groups.  Insert @var{number} nops to force an insn to a new group.
+
+@item -mcall-sysv
+@opindex mcall-sysv
+On System V.4 and embedded PowerPC systems compile code using calling
+conventions that adheres to the March 1995 draft of the System V
+Application Binary Interface, PowerPC processor supplement.  This is the
+default unless you configured GCC using @samp{powerpc-*-eabiaix}.
+
+@item -mcall-sysv-eabi
+@itemx -mcall-eabi
+@opindex mcall-sysv-eabi
+@opindex mcall-eabi
+Specify both @option{-mcall-sysv} and @option{-meabi} options.
+
+@item -mcall-sysv-noeabi
+@opindex mcall-sysv-noeabi
+Specify both @option{-mcall-sysv} and @option{-mno-eabi} options.
+
+@item -mcall-aixdesc
+@opindex m
+On System V.4 and embedded PowerPC systems compile code for the AIX
+operating system.
+
+@item -mcall-linux
+@opindex mcall-linux
+On System V.4 and embedded PowerPC systems compile code for the
+Linux-based GNU system.
+
+@item -mcall-gnu
+@opindex mcall-gnu
+On System V.4 and embedded PowerPC systems compile code for the
+Hurd-based GNU system.
+
+@item -mcall-freebsd
+@opindex mcall-freebsd
+On System V.4 and embedded PowerPC systems compile code for the
+FreeBSD operating system.
+
+@item -mcall-netbsd
+@opindex mcall-netbsd
+On System V.4 and embedded PowerPC systems compile code for the
+NetBSD operating system.
+
+@item -mcall-openbsd
+@opindex mcall-netbsd
+On System V.4 and embedded PowerPC systems compile code for the
+OpenBSD operating system.
+
+@item -maix-struct-return
+@opindex maix-struct-return
+Return all structures in memory (as specified by the AIX ABI)@.
+
+@item -msvr4-struct-return
+@opindex msvr4-struct-return
+Return structures smaller than 8 bytes in registers (as specified by the
+SVR4 ABI)@.
+
+@item -mabi=@var{abi-type}
+@opindex mabi
+Extend the current ABI with a particular extension, or remove such extension.
+Valid values are @var{altivec}, @var{no-altivec}, @var{spe},
+@var{no-spe}, @var{ibmlongdouble}, @var{ieeelongdouble}@.
+
+@item -mabi=spe
+@opindex mabi=spe
+Extend the current ABI with SPE ABI extensions.  This does not change
+the default ABI, instead it adds the SPE ABI extensions to the current
+ABI@.
+
+@item -mabi=no-spe
+@opindex mabi=no-spe
+Disable Booke SPE ABI extensions for the current ABI@.
+
+@item -mabi=ibmlongdouble
+@opindex mabi=ibmlongdouble
+Change the current ABI to use IBM extended precision long double.
+This is a PowerPC 32-bit SYSV ABI option.
+
+@item -mabi=ieeelongdouble
+@opindex mabi=ieeelongdouble
+Change the current ABI to use IEEE extended precision long double.
+This is a PowerPC 32-bit Linux ABI option.
+
+@item -mprototype
+@itemx -mno-prototype
+@opindex mprototype
+@opindex mno-prototype
+On System V.4 and embedded PowerPC systems assume that all calls to
+variable argument functions are properly prototyped.  Otherwise, the
+compiler must insert an instruction before every non prototyped call to
+set or clear bit 6 of the condition code register (@var{CR}) to
+indicate whether floating point values were passed in the floating point
+registers in case the function takes a variable arguments.  With
+@option{-mprototype}, only calls to prototyped variable argument functions
+will set or clear the bit.
+
+@item -msim
+@opindex msim
+On embedded PowerPC systems, assume that the startup module is called
+@file{sim-crt0.o} and that the standard C libraries are @file{libsim.a} and
+@file{libc.a}.  This is the default for @samp{powerpc-*-eabisim}
+configurations.
+
+@item -mmvme
+@opindex mmvme
+On embedded PowerPC systems, assume that the startup module is called
+@file{crt0.o} and the standard C libraries are @file{libmvme.a} and
+@file{libc.a}.
+
+@item -mads
+@opindex mads
+On embedded PowerPC systems, assume that the startup module is called
+@file{crt0.o} and the standard C libraries are @file{libads.a} and
+@file{libc.a}.
+
+@item -myellowknife
+@opindex myellowknife
+On embedded PowerPC systems, assume that the startup module is called
+@file{crt0.o} and the standard C libraries are @file{libyk.a} and
+@file{libc.a}.
+
+@item -mvxworks
+@opindex mvxworks
+On System V.4 and embedded PowerPC systems, specify that you are
+compiling for a VxWorks system.
+
+@item -memb
+@opindex memb
+On embedded PowerPC systems, set the @var{PPC_EMB} bit in the ELF flags
+header to indicate that @samp{eabi} extended relocations are used.
+
+@item -meabi
+@itemx -mno-eabi
+@opindex meabi
+@opindex mno-eabi
+On System V.4 and embedded PowerPC systems do (do not) adhere to the
+Embedded Applications Binary Interface (eabi) which is a set of
+modifications to the System V.4 specifications.  Selecting @option{-meabi}
+means that the stack is aligned to an 8 byte boundary, a function
+@code{__eabi} is called to from @code{main} to set up the eabi
+environment, and the @option{-msdata} option can use both @code{r2} and
+@code{r13} to point to two separate small data areas.  Selecting
+@option{-mno-eabi} means that the stack is aligned to a 16 byte boundary,
+do not call an initialization function from @code{main}, and the
+@option{-msdata} option will only use @code{r13} to point to a single
+small data area.  The @option{-meabi} option is on by default if you
+configured GCC using one of the @samp{powerpc*-*-eabi*} options.
+
+@item -msdata=eabi
+@opindex msdata=eabi
+On System V.4 and embedded PowerPC systems, put small initialized
+@code{const} global and static data in the @samp{.sdata2} section, which
+is pointed to by register @code{r2}.  Put small initialized
+non-@code{const} global and static data in the @samp{.sdata} section,
+which is pointed to by register @code{r13}.  Put small uninitialized
+global and static data in the @samp{.sbss} section, which is adjacent to
+the @samp{.sdata} section.  The @option{-msdata=eabi} option is
+incompatible with the @option{-mrelocatable} option.  The
+@option{-msdata=eabi} option also sets the @option{-memb} option.
+
+@item -msdata=sysv
+@opindex msdata=sysv
+On System V.4 and embedded PowerPC systems, put small global and static
+data in the @samp{.sdata} section, which is pointed to by register
+@code{r13}.  Put small uninitialized global and static data in the
+@samp{.sbss} section, which is adjacent to the @samp{.sdata} section.
+The @option{-msdata=sysv} option is incompatible with the
+@option{-mrelocatable} option.
+
+@item -msdata=default
+@itemx -msdata
+@opindex msdata=default
+@opindex msdata
+On System V.4 and embedded PowerPC systems, if @option{-meabi} is used,
+compile code the same as @option{-msdata=eabi}, otherwise compile code the
+same as @option{-msdata=sysv}.
+
+@item -msdata=data
+@opindex msdata=data
+On System V.4 and embedded PowerPC systems, put small global
+data in the @samp{.sdata} section.  Put small uninitialized global
+data in the @samp{.sbss} section.  Do not use register @code{r13}
+to address small data however.  This is the default behavior unless
+other @option{-msdata} options are used.
+
+@item -msdata=none
+@itemx -mno-sdata
+@opindex msdata=none
+@opindex mno-sdata
+On embedded PowerPC systems, put all initialized global and static data
+in the @samp{.data} section, and all uninitialized data in the
+@samp{.bss} section.
+
+@item -mblock-move-inline-limit=@var{num}
+@opindex mblock-move-inline-limit
+Inline all block moves (such as calls to @code{memcpy} or structure
+copies) less than or equal to @var{num} bytes.  The minimum value for
+@var{num} is 32 bytes on 32-bit targets and 64 bytes on 64-bit
+targets.  The default value is target-specific.
+
+@item -G @var{num}
+@opindex G
+@cindex smaller data references (PowerPC)
+@cindex .sdata/.sdata2 references (PowerPC)
+On embedded PowerPC systems, put global and static items less than or
+equal to @var{num} bytes into the small data or bss sections instead of
+the normal data or bss section.  By default, @var{num} is 8.  The
+@option{-G @var{num}} switch is also passed to the linker.
+All modules should be compiled with the same @option{-G @var{num}} value.
+
+@item -mregnames
+@itemx -mno-regnames
+@opindex mregnames
+@opindex mno-regnames
+On System V.4 and embedded PowerPC systems do (do not) emit register
+names in the assembly language output using symbolic forms.
+
+@item -mlongcall
+@itemx -mno-longcall
+@opindex mlongcall
+@opindex mno-longcall
+By default assume that all calls are far away so that a longer more
+expensive calling sequence is required.  This is required for calls
+further than 32 megabytes (33,554,432 bytes) from the current location.
+A short call will be generated if the compiler knows
+the call cannot be that far away.  This setting can be overridden by
+the @code{shortcall} function attribute, or by @code{#pragma
+longcall(0)}.
+
+Some linkers are capable of detecting out-of-range calls and generating
+glue code on the fly.  On these systems, long calls are unnecessary and
+generate slower code.  As of this writing, the AIX linker can do this,
+as can the GNU linker for PowerPC/64.  It is planned to add this feature
+to the GNU linker for 32-bit PowerPC systems as well.
+
+On Darwin/PPC systems, @code{#pragma longcall} will generate ``jbsr
+callee, L42'', plus a ``branch island'' (glue code).  The two target
+addresses represent the callee and the ``branch island''.  The
+Darwin/PPC linker will prefer the first address and generate a ``bl
+callee'' if the PPC ``bl'' instruction will reach the callee directly;
+otherwise, the linker will generate ``bl L42'' to call the ``branch
+island''.  The ``branch island'' is appended to the body of the
+calling function; it computes the full 32-bit address of the callee
+and jumps to it.
+
+On Mach-O (Darwin) systems, this option directs the compiler emit to
+the glue for every direct call, and the Darwin linker decides whether
+to use or discard it.
+
+In the future, we may cause GCC to ignore all longcall specifications
+when the linker is known to generate glue.
+
+@item -mtls-markers
+@itemx -mno-tls-markers
+@opindex mtls-markers
+@opindex mno-tls-markers
+Mark (do not mark) calls to @code{__tls_get_addr} with a relocation
+specifying the function argument.  The relocation allows ld to
+reliably associate function call with argument setup instructions for
+TLS optimization, which in turn allows gcc to better schedule the
+sequence.
+
+@item -pthread
+@opindex pthread
+Adds support for multithreading with the @dfn{pthreads} library.
+This option sets flags for both the preprocessor and linker.
+
+@item -mrecip
+@itemx -mno-recip
+@opindex mrecip
+This option will enable GCC to use the reciprocal estimate and
+reciprocal square root estimate instructions with additional
+Newton-Raphson steps to increase precision instead of doing a divide or
+square root and divide for floating point arguments.  You should use
+the @option{-ffast-math} option when using @option{-mrecip} (or at
+least @option{-funsafe-math-optimizations},
+@option{-finite-math-only}, @option{-freciprocal-math} and
+@option{-fno-trapping-math}).  Note that while the throughput of the
+sequence is generally higher than the throughput of the non-reciprocal
+instruction, the precision of the sequence can be decreased by up to 2
+ulp (i.e. the inverse of 1.0 equals 0.99999994) for reciprocal square
+roots.
+
+@item -mrecip=@var{opt}
+@opindex mrecip=opt
+This option allows to control which reciprocal estimate instructions
+may be used.  @var{opt} is a comma separated list of options, that may
+be preceded by a @code{!} to invert the option:
+@code{all}: enable all estimate instructions,
+@code{default}: enable the default instructions, equivalent to @option{-mrecip},
+@code{none}: disable all estimate instructions, equivalent to @option{-mno-recip};
+@code{div}: enable the reciprocal approximation instructions for both single and double precision;
+@code{divf}: enable the single precision reciprocal approximation instructions;
+@code{divd}: enable the double precision reciprocal approximation instructions;
+@code{rsqrt}: enable the reciprocal square root approximation instructions for both single and double precision;
+@code{rsqrtf}: enable the single precision reciprocal square root approximation instructions;
+@code{rsqrtd}: enable the double precision reciprocal square root approximation instructions;
+
+So for example, @option{-mrecip=all,!rsqrtd} would enable the
+all of the reciprocal estimate instructions, except for the
+@code{FRSQRTE}, @code{XSRSQRTEDP}, and @code{XVRSQRTEDP} instructions
+which handle the double precision reciprocal square root calculations.
+
+@item -mrecip-precision
+@itemx -mno-recip-precision
+@opindex mrecip-precision
+Assume (do not assume) that the reciprocal estimate instructions
+provide higher precision estimates than is mandated by the powerpc
+ABI.  Selecting @option{-mcpu=power6} or @option{-mcpu=power7}
+automatically selects @option{-mrecip-precision}.  The double
+precision square root estimate instructions are not generated by
+default on low precision machines, since they do not provide an
+estimate that converges after three steps.
+
+@item -mveclibabi=@var{type}
+@opindex mveclibabi
+Specifies the ABI type to use for vectorizing intrinsics using an
+external library.  The only type supported at present is @code{mass},
+which specifies to use IBM's Mathematical Acceleration Subsystem
+(MASS) libraries for vectorizing intrinsics using external libraries.
+GCC will currently emit calls to @code{acosd2}, @code{acosf4},
+@code{acoshd2}, @code{acoshf4}, @code{asind2}, @code{asinf4},
+@code{asinhd2}, @code{asinhf4}, @code{atan2d2}, @code{atan2f4},
+@code{atand2}, @code{atanf4}, @code{atanhd2}, @code{atanhf4},
+@code{cbrtd2}, @code{cbrtf4}, @code{cosd2}, @code{cosf4},
+@code{coshd2}, @code{coshf4}, @code{erfcd2}, @code{erfcf4},
+@code{erfd2}, @code{erff4}, @code{exp2d2}, @code{exp2f4},
+@code{expd2}, @code{expf4}, @code{expm1d2}, @code{expm1f4},
+@code{hypotd2}, @code{hypotf4}, @code{lgammad2}, @code{lgammaf4},
+@code{log10d2}, @code{log10f4}, @code{log1pd2}, @code{log1pf4},
+@code{log2d2}, @code{log2f4}, @code{logd2}, @code{logf4},
+@code{powd2}, @code{powf4}, @code{sind2}, @code{sinf4}, @code{sinhd2},
+@code{sinhf4}, @code{sqrtd2}, @code{sqrtf4}, @code{tand2},
+@code{tanf4}, @code{tanhd2}, and @code{tanhf4} when generating code
+for power7.  Both @option{-ftree-vectorize} and
+@option{-funsafe-math-optimizations} have to be enabled.  The MASS
+libraries will have to be specified at link time.
+
+@item -mfriz
+@itemx -mno-friz
+@opindex mfriz
+Generate (do not generate) the @code{friz} instruction when the
+@option{-funsafe-math-optimizations} option is used to optimize
+rounding a floating point value to 64-bit integer and back to floating
+point.  The @code{friz} instruction does not return the same value if
+the floating point number is too large to fit in an integer.
+@end table
+
+@node RX Options
+@subsection RX Options
+@cindex RX Options
+
+These command line options are defined for RX targets:
+
+@table @gcctabopt
+@item -m64bit-doubles
+@itemx -m32bit-doubles
+@opindex m64bit-doubles
+@opindex m32bit-doubles
+Make the @code{double} data type be 64-bits (@option{-m64bit-doubles})
+or 32-bits (@option{-m32bit-doubles}) in size.  The default is
+@option{-m32bit-doubles}.  @emph{Note} RX floating point hardware only
+works on 32-bit values, which is why the default is
+@option{-m32bit-doubles}.
+
+@item -fpu
+@itemx -nofpu
+@opindex fpu
+@opindex nofpu
+Enables (@option{-fpu}) or disables (@option{-nofpu}) the use of RX
+floating point hardware.  The default is enabled for the @var{RX600}
+series and disabled for the @var{RX200} series.
+
+Floating point instructions will only be generated for 32-bit floating
+point values however, so if the @option{-m64bit-doubles} option is in
+use then the FPU hardware will not be used for doubles.
+
+@emph{Note} If the @option{-fpu} option is enabled then
+@option{-funsafe-math-optimizations} is also enabled automatically.
+This is because the RX FPU instructions are themselves unsafe.
+
+@item -mcpu=@var{name}
+@opindex -mcpu
+Selects the type of RX CPU to be targeted.  Currently three types are
+supported, the generic @var{RX600} and @var{RX200} series hardware and
+the specific @var{RX610} CPU.  The default is @var{RX600}.
+
+The only difference between @var{RX600} and @var{RX610} is that the
+@var{RX610} does not support the @code{MVTIPL} instruction.
+
+The @var{RX200} series does not have a hardware floating point unit
+and so @option{-nofpu} is enabled by default when this type is
+selected.
+
+@item -mbig-endian-data
+@itemx -mlittle-endian-data
+@opindex mbig-endian-data
+@opindex mlittle-endian-data
+Store data (but not code) in the big-endian format.  The default is
+@option{-mlittle-endian-data}, i.e.@: to store data in the little endian
+format.
+
+@item -msmall-data-limit=@var{N}
+@opindex msmall-data-limit
+Specifies the maximum size in bytes of global and static variables
+which can be placed into the small data area.  Using the small data
+area can lead to smaller and faster code, but the size of area is
+limited and it is up to the programmer to ensure that the area does
+not overflow.  Also when the small data area is used one of the RX's
+registers (@code{r13}) is reserved for use pointing to this area, so
+it is no longer available for use by the compiler.  This could result
+in slower and/or larger code if variables which once could have been
+held in @code{r13} are now pushed onto the stack.
+
+Note, common variables (variables which have not been initialised) and
+constants are not placed into the small data area as they are assigned
+to other sections in the output executable.
+
+The default value is zero, which disables this feature.  Note, this
+feature is not enabled by default with higher optimization levels
+(@option{-O2} etc) because of the potentially detrimental effects of
+reserving register @code{r13}.  It is up to the programmer to
+experiment and discover whether this feature is of benefit to their
+program.
+
+@item -msim
+@itemx -mno-sim
+@opindex msim
+@opindex mno-sim
+Use the simulator runtime.  The default is to use the libgloss board
+specific runtime.
+
+@item -mas100-syntax
+@itemx -mno-as100-syntax
+@opindex mas100-syntax
+@opindex mno-as100-syntax
+When generating assembler output use a syntax that is compatible with
+Renesas's AS100 assembler.  This syntax can also be handled by the GAS
+assembler but it has some restrictions so generating it is not the
+default option.
+
+@item -mmax-constant-size=@var{N}
+@opindex mmax-constant-size
+Specifies the maximum size, in bytes, of a constant that can be used as
+an operand in a RX instruction.  Although the RX instruction set does
+allow constants of up to 4 bytes in length to be used in instructions,
+a longer value equates to a longer instruction.  Thus in some
+circumstances it can be beneficial to restrict the size of constants
+that are used in instructions.  Constants that are too big are instead
+placed into a constant pool and referenced via register indirection.
+
+The value @var{N} can be between 0 and 4.  A value of 0 (the default)
+or 4 means that constants of any size are allowed.
+
+@item -mrelax
+@opindex mrelax
+Enable linker relaxation.  Linker relaxation is a process whereby the
+linker will attempt to reduce the size of a program by finding shorter
+versions of various instructions.  Disabled by default.
+
+@item -mint-register=@var{N}
+@opindex mint-register
+Specify the number of registers to reserve for fast interrupt handler
+functions.  The value @var{N} can be between 0 and 4.  A value of 1
+means that register @code{r13} will be reserved for the exclusive use
+of fast interrupt handlers.  A value of 2 reserves @code{r13} and
+@code{r12}.  A value of 3 reserves @code{r13}, @code{r12} and
+@code{r11}, and a value of 4 reserves @code{r13} through @code{r10}.
+A value of 0, the default, does not reserve any registers.
+
+@item -msave-acc-in-interrupts
+@opindex msave-acc-in-interrupts
+Specifies that interrupt handler functions should preserve the
+accumulator register.  This is only necessary if normal code might use
+the accumulator register, for example because it performs 64-bit
+multiplications.  The default is to ignore the accumulator as this
+makes the interrupt handlers faster.
+
+@end table
+
+@emph{Note:} The generic GCC command line @option{-ffixed-@var{reg}}
+has special significance to the RX port when used with the
+@code{interrupt} function attribute.  This attribute indicates a
+function intended to process fast interrupts.  GCC will will ensure
+that it only uses the registers @code{r10}, @code{r11}, @code{r12}
+and/or @code{r13} and only provided that the normal use of the
+corresponding registers have been restricted via the
+@option{-ffixed-@var{reg}} or @option{-mint-register} command line
+options.
+
+@node S/390 and zSeries Options
+@subsection S/390 and zSeries Options
+@cindex S/390 and zSeries Options
+
+These are the @samp{-m} options defined for the S/390 and zSeries architecture.
+
+@table @gcctabopt
+@item -mhard-float
+@itemx -msoft-float
+@opindex mhard-float
+@opindex msoft-float
+Use (do not use) the hardware floating-point instructions and registers
+for floating-point operations.  When @option{-msoft-float} is specified,
+functions in @file{libgcc.a} will be used to perform floating-point
+operations.  When @option{-mhard-float} is specified, the compiler
+generates IEEE floating-point instructions.  This is the default.
+
+@item -mhard-dfp
+@itemx -mno-hard-dfp
+@opindex mhard-dfp
+@opindex mno-hard-dfp
+Use (do not use) the hardware decimal-floating-point instructions for
+decimal-floating-point operations.  When @option{-mno-hard-dfp} is
+specified, functions in @file{libgcc.a} will be used to perform
+decimal-floating-point operations.  When @option{-mhard-dfp} is
+specified, the compiler generates decimal-floating-point hardware
+instructions.  This is the default for @option{-march=z9-ec} or higher.
+
+@item -mlong-double-64
+@itemx -mlong-double-128
+@opindex mlong-double-64
+@opindex mlong-double-128
+These switches control the size of @code{long double} type. A size
+of 64bit makes the @code{long double} type equivalent to the @code{double}
+type. This is the default.
+
+@item -mbackchain
+@itemx -mno-backchain
+@opindex mbackchain
+@opindex mno-backchain
+Store (do not store) the address of the caller's frame as backchain pointer
+into the callee's stack frame.
+A backchain may be needed to allow debugging using tools that do not understand
+DWARF-2 call frame information.
+When @option{-mno-packed-stack} is in effect, the backchain pointer is stored
+at the bottom of the stack frame; when @option{-mpacked-stack} is in effect,
+the backchain is placed into the topmost word of the 96/160 byte register
+save area.
+
+In general, code compiled with @option{-mbackchain} is call-compatible with
+code compiled with @option{-mmo-backchain}; however, use of the backchain
+for debugging purposes usually requires that the whole binary is built with
+@option{-mbackchain}.  Note that the combination of @option{-mbackchain},
+@option{-mpacked-stack} and @option{-mhard-float} is not supported.  In order
+to build a linux kernel use @option{-msoft-float}.
+
+The default is to not maintain the backchain.
+
+@item -mpacked-stack
+@itemx -mno-packed-stack
+@opindex mpacked-stack
+@opindex mno-packed-stack
+Use (do not use) the packed stack layout.  When @option{-mno-packed-stack} is
+specified, the compiler uses the all fields of the 96/160 byte register save
+area only for their default purpose; unused fields still take up stack space.
+When @option{-mpacked-stack} is specified, register save slots are densely
+packed at the top of the register save area; unused space is reused for other
+purposes, allowing for more efficient use of the available stack space.
+However, when @option{-mbackchain} is also in effect, the topmost word of
+the save area is always used to store the backchain, and the return address
+register is always saved two words below the backchain.
+
+As long as the stack frame backchain is not used, code generated with
+@option{-mpacked-stack} is call-compatible with code generated with
+@option{-mno-packed-stack}.  Note that some non-FSF releases of GCC 2.95 for
+S/390 or zSeries generated code that uses the stack frame backchain at run
+time, not just for debugging purposes.  Such code is not call-compatible
+with code compiled with @option{-mpacked-stack}.  Also, note that the
+combination of @option{-mbackchain},
+@option{-mpacked-stack} and @option{-mhard-float} is not supported.  In order
+to build a linux kernel use @option{-msoft-float}.
+
+The default is to not use the packed stack layout.
+
+@item -msmall-exec
+@itemx -mno-small-exec
+@opindex msmall-exec
+@opindex mno-small-exec
+Generate (or do not generate) code using the @code{bras} instruction
+to do subroutine calls.
+This only works reliably if the total executable size does not
+exceed 64k.  The default is to use the @code{basr} instruction instead,
+which does not have this limitation.
+
+@item -m64
+@itemx -m31
+@opindex m64
+@opindex m31
+When @option{-m31} is specified, generate code compliant to the
+GNU/Linux for S/390 ABI@.  When @option{-m64} is specified, generate
+code compliant to the GNU/Linux for zSeries ABI@.  This allows GCC in
+particular to generate 64-bit instructions.  For the @samp{s390}
+targets, the default is @option{-m31}, while the @samp{s390x}
+targets default to @option{-m64}.
+
+@item -mzarch
+@itemx -mesa
+@opindex mzarch
+@opindex mesa
+When @option{-mzarch} is specified, generate code using the
+instructions available on z/Architecture.
+When @option{-mesa} is specified, generate code using the
+instructions available on ESA/390.  Note that @option{-mesa} is
+not possible with @option{-m64}.
+When generating code compliant to the GNU/Linux for S/390 ABI,
+the default is @option{-mesa}.  When generating code compliant
+to the GNU/Linux for zSeries ABI, the default is @option{-mzarch}.
+
+@item -mmvcle
+@itemx -mno-mvcle
+@opindex mmvcle
+@opindex mno-mvcle
+Generate (or do not generate) code using the @code{mvcle} instruction
+to perform block moves.  When @option{-mno-mvcle} is specified,
+use a @code{mvc} loop instead.  This is the default unless optimizing for
+size.
+
+@item -mdebug
+@itemx -mno-debug
+@opindex mdebug
+@opindex mno-debug
+Print (or do not print) additional debug information when compiling.
+The default is to not print debug information.
+
+@item -march=@var{cpu-type}
+@opindex march
+Generate code that will run on @var{cpu-type}, which is the name of a system
+representing a certain processor type.  Possible values for
+@var{cpu-type} are @samp{g5}, @samp{g6}, @samp{z900}, @samp{z990},
+@samp{z9-109}, @samp{z9-ec} and @samp{z10}.
+When generating code using the instructions available on z/Architecture,
+the default is @option{-march=z900}.  Otherwise, the default is
+@option{-march=g5}.
+
+@item -mtune=@var{cpu-type}
+@opindex mtune
+Tune to @var{cpu-type} everything applicable about the generated code,
+except for the ABI and the set of available instructions.
+The list of @var{cpu-type} values is the same as for @option{-march}.
+The default is the value used for @option{-march}.
+
+@item -mtpf-trace
+@itemx -mno-tpf-trace
+@opindex mtpf-trace
+@opindex mno-tpf-trace
+Generate code that adds (does not add) in TPF OS specific branches to trace
+routines in the operating system.  This option is off by default, even
+when compiling for the TPF OS@.
+
+@item -mfused-madd
+@itemx -mno-fused-madd
+@opindex mfused-madd
+@opindex mno-fused-madd
+Generate code that uses (does not use) the floating point multiply and
+accumulate instructions.  These instructions are generated by default if
+hardware floating point is used.
+
+@item -mwarn-framesize=@var{framesize}
+@opindex mwarn-framesize
+Emit a warning if the current function exceeds the given frame size.  Because
+this is a compile time check it doesn't need to be a real problem when the program
+runs.  It is intended to identify functions which most probably cause
+a stack overflow.  It is useful to be used in an environment with limited stack
+size e.g.@: the linux kernel.
+
+@item -mwarn-dynamicstack
+@opindex mwarn-dynamicstack
+Emit a warning if the function calls alloca or uses dynamically
+sized arrays.  This is generally a bad idea with a limited stack size.
+
+@item -mstack-guard=@var{stack-guard}
+@itemx -mstack-size=@var{stack-size}
+@opindex mstack-guard
+@opindex mstack-size
+If these options are provided the s390 back end emits additional instructions in
+the function prologue which trigger a trap if the stack size is @var{stack-guard}
+bytes above the @var{stack-size} (remember that the stack on s390 grows downward).
+If the @var{stack-guard} option is omitted the smallest power of 2 larger than
+the frame size of the compiled function is chosen.
+These options are intended to be used to help debugging stack overflow problems.
+The additionally emitted code causes only little overhead and hence can also be
+used in production like systems without greater performance degradation.  The given
+values have to be exact powers of 2 and @var{stack-size} has to be greater than
+@var{stack-guard} without exceeding 64k.
+In order to be efficient the extra code makes the assumption that the stack starts
+at an address aligned to the value given by @var{stack-size}.
+The @var{stack-guard} option can only be used in conjunction with @var{stack-size}.
+@end table
+
+@node Score Options
+@subsection Score Options
+@cindex Score Options
+
+These options are defined for Score implementations:
+
+@table @gcctabopt
+@item -meb
+@opindex meb
+Compile code for big endian mode.  This is the default.
+
+@item -mel
+@opindex mel
+Compile code for little endian mode.
+
+@item -mnhwloop
+@opindex mnhwloop
+Disable generate bcnz instruction.
+
+@item -muls
+@opindex muls
+Enable generate unaligned load and store instruction.
+
+@item -mmac
+@opindex mmac
+Enable the use of multiply-accumulate instructions. Disabled by default.
+
+@item -mscore5
+@opindex mscore5
+Specify the SCORE5 as the target architecture.
+
+@item -mscore5u
+@opindex mscore5u
+Specify the SCORE5U of the target architecture.
+
+@item -mscore7
+@opindex mscore7
+Specify the SCORE7 as the target architecture. This is the default.
+
+@item -mscore7d
+@opindex mscore7d
+Specify the SCORE7D as the target architecture.
+@end table
+
+@node SH Options
+@subsection SH Options
+
+These @samp{-m} options are defined for the SH implementations:
+
+@table @gcctabopt
+@item -m1
+@opindex m1
+Generate code for the SH1.
+
+@item -m2
+@opindex m2
+Generate code for the SH2.
+
+@item -m2e
+Generate code for the SH2e.
+
+@item -m2a-nofpu
+@opindex m2a-nofpu
+Generate code for the SH2a without FPU, or for a SH2a-FPU in such a way
+that the floating-point unit is not used.
+
+@item -m2a-single-only
+@opindex m2a-single-only
+Generate code for the SH2a-FPU, in such a way that no double-precision
+floating point operations are used.
+
+@item -m2a-single
+@opindex m2a-single
+Generate code for the SH2a-FPU assuming the floating-point unit is in
+single-precision mode by default.
+
+@item -m2a
+@opindex m2a
+Generate code for the SH2a-FPU assuming the floating-point unit is in
+double-precision mode by default.
+
+@item -m3
+@opindex m3
+Generate code for the SH3.
+
+@item -m3e
+@opindex m3e
+Generate code for the SH3e.
+
+@item -m4-nofpu
+@opindex m4-nofpu
+Generate code for the SH4 without a floating-point unit.
+
+@item -m4-single-only
+@opindex m4-single-only
+Generate code for the SH4 with a floating-point unit that only
+supports single-precision arithmetic.
+
+@item -m4-single
+@opindex m4-single
+Generate code for the SH4 assuming the floating-point unit is in
+single-precision mode by default.
+
+@item -m4
+@opindex m4
+Generate code for the SH4.
+
+@item -m4a-nofpu
+@opindex m4a-nofpu
+Generate code for the SH4al-dsp, or for a SH4a in such a way that the
+floating-point unit is not used.
+
+@item -m4a-single-only
+@opindex m4a-single-only
+Generate code for the SH4a, in such a way that no double-precision
+floating point operations are used.
+
+@item -m4a-single
+@opindex m4a-single
+Generate code for the SH4a assuming the floating-point unit is in
+single-precision mode by default.
+
+@item -m4a
+@opindex m4a
+Generate code for the SH4a.
+
+@item -m4al
+@opindex m4al
+Same as @option{-m4a-nofpu}, except that it implicitly passes
+@option{-dsp} to the assembler.  GCC doesn't generate any DSP
+instructions at the moment.
+
+@item -mb
+@opindex mb
+Compile code for the processor in big endian mode.
+
+@item -ml
+@opindex ml
+Compile code for the processor in little endian mode.
+
+@item -mdalign
+@opindex mdalign
+Align doubles at 64-bit boundaries.  Note that this changes the calling
+conventions, and thus some functions from the standard C library will
+not work unless you recompile it first with @option{-mdalign}.
+
+@item -mrelax
+@opindex mrelax
+Shorten some address references at link time, when possible; uses the
+linker option @option{-relax}.
+
+@item -mbigtable
+@opindex mbigtable
+Use 32-bit offsets in @code{switch} tables.  The default is to use
+16-bit offsets.
+
+@item -mbitops
+@opindex mbitops
+Enable the use of bit manipulation instructions on SH2A.
+
+@item -mfmovd
+@opindex mfmovd
+Enable the use of the instruction @code{fmovd}.  Check @option{-mdalign} for
+alignment constraints.
+
+@item -mhitachi
+@opindex mhitachi
+Comply with the calling conventions defined by Renesas.
+
+@item -mrenesas
+@opindex mhitachi
+Comply with the calling conventions defined by Renesas.
+
+@item -mno-renesas
+@opindex mhitachi
+Comply with the calling conventions defined for GCC before the Renesas
+conventions were available.  This option is the default for all
+targets of the SH toolchain except for @samp{sh-symbianelf}.
+
+@item -mnomacsave
+@opindex mnomacsave
+Mark the @code{MAC} register as call-clobbered, even if
+@option{-mhitachi} is given.
+
+@item -mieee
+@item -mno-ieee
+@opindex mieee
+@opindex mnoieee
+Control the IEEE compliance of floating-point comparisons, which affects the
+handling of cases where the result of a comparison is unordered.  By default
+@option{-mieee} is implicitly enabled.  If @option{-ffinite-math-only} is
+enabled @option{-mno-ieee} is implicitly set, which results in faster
+floating-point greater-equal and less-equal comparisons.  The implcit settings
+can be overridden by specifying either @option{-mieee} or @option{-mno-ieee}.
+
+@item -minline-ic_invalidate
+@opindex minline-ic_invalidate
+Inline code to invalidate instruction cache entries after setting up
+nested function trampolines.
+This option has no effect if -musermode is in effect and the selected
+code generation option (e.g. -m4) does not allow the use of the icbi
+instruction.
+If the selected code generation option does not allow the use of the icbi
+instruction, and -musermode is not in effect, the inlined code will
+manipulate the instruction cache address array directly with an associative
+write.  This not only requires privileged mode, but it will also
+fail if the cache line had been mapped via the TLB and has become unmapped.
+
+@item -misize
+@opindex misize
+Dump instruction size and location in the assembly code.
+
+@item -mpadstruct
+@opindex mpadstruct
+This option is deprecated.  It pads structures to multiple of 4 bytes,
+which is incompatible with the SH ABI@.
+
+@item -mspace
+@opindex mspace
+Optimize for space instead of speed.  Implied by @option{-Os}.
+
+@item -mprefergot
+@opindex mprefergot
+When generating position-independent code, emit function calls using
+the Global Offset Table instead of the Procedure Linkage Table.
+
+@item -musermode
+@opindex musermode
+Don't generate privileged mode only code; implies -mno-inline-ic_invalidate
+if the inlined code would not work in user mode.
+This is the default when the target is @code{sh-*-linux*}.
+
+@item -multcost=@var{number}
+@opindex multcost=@var{number}
+Set the cost to assume for a multiply insn.
+
+@item -mdiv=@var{strategy}
+@opindex mdiv=@var{strategy}
+Set the division strategy to use for SHmedia code.  @var{strategy} must be
+one of: call, call2, fp, inv, inv:minlat, inv20u, inv20l, inv:call,
+inv:call2, inv:fp .
+"fp" performs the operation in floating point.  This has a very high latency,
+but needs only a few instructions, so it might be a good choice if
+your code has enough easily exploitable ILP to allow the compiler to
+schedule the floating point instructions together with other instructions.
+Division by zero causes a floating point exception.
+"inv" uses integer operations to calculate the inverse of the divisor,
+and then multiplies the dividend with the inverse.  This strategy allows
+cse and hoisting of the inverse calculation.  Division by zero calculates
+an unspecified result, but does not trap.
+"inv:minlat" is a variant of "inv" where if no cse / hoisting opportunities
+have been found, or if the entire operation has been hoisted to the same
+place, the last stages of the inverse calculation are intertwined with the
+final multiply to reduce the overall latency, at the expense of using a few
+more instructions, and thus offering fewer scheduling opportunities with
+other code.
+"call" calls a library function that usually implements the inv:minlat
+strategy.
+This gives high code density for m5-*media-nofpu compilations.
+"call2" uses a different entry point of the same library function, where it
+assumes that a pointer to a lookup table has already been set up, which
+exposes the pointer load to cse / code hoisting optimizations.
+"inv:call", "inv:call2" and "inv:fp" all use the "inv" algorithm for initial
+code generation, but if the code stays unoptimized, revert to the "call",
+"call2", or "fp" strategies, respectively.  Note that the
+potentially-trapping side effect of division by zero is carried by a
+separate instruction, so it is possible that all the integer instructions
+are hoisted out, but the marker for the side effect stays where it is.
+A recombination to fp operations or a call is not possible in that case.
+"inv20u" and "inv20l" are variants of the "inv:minlat" strategy.  In the case
+that the inverse calculation was nor separated from the multiply, they speed
+up division where the dividend fits into 20 bits (plus sign where applicable),
+by inserting a test to skip a number of operations in this case; this test
+slows down the case of larger dividends.  inv20u assumes the case of a such
+a small dividend to be unlikely, and inv20l assumes it to be likely.
+
+@item -maccumulate-outgoing-args
+@opindex maccumulate-outgoing-args
+Reserve space once for outgoing arguments in the function prologue rather 
+than around each call.  Generally beneficial for performance and size.  Also
+needed for unwinding to avoid changing the stack frame around conditional code.
+
+@item -mdivsi3_libfunc=@var{name}
+@opindex mdivsi3_libfunc=@var{name}
+Set the name of the library function used for 32 bit signed division to
+@var{name}.  This only affect the name used in the call and inv:call
+division strategies, and the compiler will still expect the same
+sets of input/output/clobbered registers as if this option was not present.
+
+@item -mfixed-range=@var{register-range}
+@opindex mfixed-range
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use.  This is
+useful when compiling kernel code.  A register range is specified as
+two registers separated by a dash.  Multiple register ranges can be
+specified separated by a comma.
+
+@item -madjust-unroll
+@opindex madjust-unroll
+Throttle unrolling to avoid thrashing target registers.
+This option only has an effect if the gcc code base supports the
+TARGET_ADJUST_UNROLL_MAX target hook.
+
+@item -mindexed-addressing
+@opindex mindexed-addressing
+Enable the use of the indexed addressing mode for SHmedia32/SHcompact.
+This is only safe if the hardware and/or OS implement 32 bit wrap-around
+semantics for the indexed addressing mode.  The architecture allows the
+implementation of processors with 64 bit MMU, which the OS could use to
+get 32 bit addressing, but since no current hardware implementation supports
+this or any other way to make the indexed addressing mode safe to use in
+the 32 bit ABI, the default is -mno-indexed-addressing.
+
+@item -mgettrcost=@var{number}
+@opindex mgettrcost=@var{number}
+Set the cost assumed for the gettr instruction to @var{number}.
+The default is 2 if @option{-mpt-fixed} is in effect, 100 otherwise.
+
+@item -mpt-fixed
+@opindex mpt-fixed
+Assume pt* instructions won't trap.  This will generally generate better
+scheduled code, but is unsafe on current hardware.  The current architecture
+definition says that ptabs and ptrel trap when the target anded with 3 is 3.
+This has the unintentional effect of making it unsafe to schedule ptabs /
+ptrel before a branch, or hoist it out of a loop.  For example,
+__do_global_ctors, a part of libgcc that runs constructors at program
+startup, calls functions in a list which is delimited by @minus{}1.  With the
+-mpt-fixed option, the ptabs will be done before testing against @minus{}1.
+That means that all the constructors will be run a bit quicker, but when
+the loop comes to the end of the list, the program crashes because ptabs
+loads @minus{}1 into a target register.  Since this option is unsafe for any
+hardware implementing the current architecture specification, the default
+is -mno-pt-fixed.  Unless the user specifies a specific cost with
+@option{-mgettrcost}, -mno-pt-fixed also implies @option{-mgettrcost=100};
+this deters register allocation using target registers for storing
+ordinary integers.
+
+@item -minvalid-symbols
+@opindex minvalid-symbols
+Assume symbols might be invalid.  Ordinary function symbols generated by
+the compiler will always be valid to load with movi/shori/ptabs or
+movi/shori/ptrel, but with assembler and/or linker tricks it is possible
+to generate symbols that will cause ptabs / ptrel to trap.
+This option is only meaningful when @option{-mno-pt-fixed} is in effect.
+It will then prevent cross-basic-block cse, hoisting and most scheduling
+of symbol loads.  The default is @option{-mno-invalid-symbols}.
+@end table
+
+@node Solaris 2 Options
+@subsection Solaris 2 Options
+@cindex Solaris 2 options
+
+These @samp{-m} options are supported on Solaris 2:
+
+@table @gcctabopt
+@item -mimpure-text
+@opindex mimpure-text
+@option{-mimpure-text}, used in addition to @option{-shared}, tells
+the compiler to not pass @option{-z text} to the linker when linking a
+shared object.  Using this option, you can link position-dependent
+code into a shared object.
+
+@option{-mimpure-text} suppresses the ``relocations remain against
+allocatable but non-writable sections'' linker error message.
+However, the necessary relocations will trigger copy-on-write, and the
+shared object is not actually shared across processes.  Instead of
+using @option{-mimpure-text}, you should compile all source code with
+@option{-fpic} or @option{-fPIC}.
+
+@end table
+
+These switches are supported in addition to the above on Solaris 2:
+
+@table @gcctabopt
+@item -threads
+@opindex threads
+Add support for multithreading using the Solaris threads library.  This
+option sets flags for both the preprocessor and linker.  This option does
+not affect the thread safety of object code produced by the compiler or
+that of libraries supplied with it.
+
+@item -pthreads
+@opindex pthreads
+Add support for multithreading using the POSIX threads library.  This
+option sets flags for both the preprocessor and linker.  This option does
+not affect the thread safety of object code produced  by the compiler or
+that of libraries supplied with it.
+
+@item -pthread
+@opindex pthread
+This is a synonym for @option{-pthreads}.
+@end table
+
+@node SPARC Options
+@subsection SPARC Options
+@cindex SPARC options
+
+These @samp{-m} options are supported on the SPARC:
+
+@table @gcctabopt
+@item -mno-app-regs
+@itemx -mapp-regs
+@opindex mno-app-regs
+@opindex mapp-regs
+Specify @option{-mapp-regs} to generate output using the global registers
+2 through 4, which the SPARC SVR4 ABI reserves for applications.  This
+is the default.
+
+To be fully SVR4 ABI compliant at the cost of some performance loss,
+specify @option{-mno-app-regs}.  You should compile libraries and system
+software with this option.
+
+@item -mfpu
+@itemx -mhard-float
+@opindex mfpu
+@opindex mhard-float
+Generate output containing floating point instructions.  This is the
+default.
+
+@item -mno-fpu
+@itemx -msoft-float
+@opindex mno-fpu
+@opindex msoft-float
+Generate output containing library calls for floating point.
+@strong{Warning:} the requisite libraries are not available for all SPARC
+targets.  Normally the facilities of the machine's usual C compiler are
+used, but this cannot be done directly in cross-compilation.  You must make
+your own arrangements to provide suitable library functions for
+cross-compilation.  The embedded targets @samp{sparc-*-aout} and
+@samp{sparclite-*-*} do provide software floating point support.
+
+@option{-msoft-float} changes the calling convention in the output file;
+therefore, it is only useful if you compile @emph{all} of a program with
+this option.  In particular, you need to compile @file{libgcc.a}, the
+library that comes with GCC, with @option{-msoft-float} in order for
+this to work.
+
+@item -mhard-quad-float
+@opindex mhard-quad-float
+Generate output containing quad-word (long double) floating point
+instructions.
+
+@item -msoft-quad-float
+@opindex msoft-quad-float
+Generate output containing library calls for quad-word (long double)
+floating point instructions.  The functions called are those specified
+in the SPARC ABI@.  This is the default.
+
+As of this writing, there are no SPARC implementations that have hardware
+support for the quad-word floating point instructions.  They all invoke
+a trap handler for one of these instructions, and then the trap handler
+emulates the effect of the instruction.  Because of the trap handler overhead,
+this is much slower than calling the ABI library routines.  Thus the
+@option{-msoft-quad-float} option is the default.
+
+@item -mno-unaligned-doubles
+@itemx -munaligned-doubles
+@opindex mno-unaligned-doubles
+@opindex munaligned-doubles
+Assume that doubles have 8 byte alignment.  This is the default.
+
+With @option{-munaligned-doubles}, GCC assumes that doubles have 8 byte
+alignment only if they are contained in another type, or if they have an
+absolute address.  Otherwise, it assumes they have 4 byte alignment.
+Specifying this option avoids some rare compatibility problems with code
+generated by other compilers.  It is not the default because it results
+in a performance loss, especially for floating point code.
+
+@item -mno-faster-structs
+@itemx -mfaster-structs
+@opindex mno-faster-structs
+@opindex mfaster-structs
+With @option{-mfaster-structs}, the compiler assumes that structures
+should have 8 byte alignment.  This enables the use of pairs of
+@code{ldd} and @code{std} instructions for copies in structure
+assignment, in place of twice as many @code{ld} and @code{st} pairs.
+However, the use of this changed alignment directly violates the SPARC
+ABI@.  Thus, it's intended only for use on targets where the developer
+acknowledges that their resulting code will not be directly in line with
+the rules of the ABI@.
+
+@item -mcpu=@var{cpu_type}
+@opindex mcpu
+Set the instruction set, register set, and instruction scheduling parameters
+for machine type @var{cpu_type}.  Supported values for @var{cpu_type} are
+@samp{v7}, @samp{cypress}, @samp{v8}, @samp{supersparc}, @samp{hypersparc},
+@samp{leon}, @samp{sparclite}, @samp{f930}, @samp{f934}, @samp{sparclite86x},
+@samp{sparclet}, @samp{tsc701}, @samp{v9}, @samp{ultrasparc},
+@samp{ultrasparc3}, @samp{niagara} and @samp{niagara2}.
+
+Default instruction scheduling parameters are used for values that select
+an architecture and not an implementation.  These are @samp{v7}, @samp{v8},
+@samp{sparclite}, @samp{sparclet}, @samp{v9}.
+
+Here is a list of each supported architecture and their supported
+implementations.
+
+@smallexample
+    v7:             cypress
+    v8:             supersparc, hypersparc, leon
+    sparclite:      f930, f934, sparclite86x
+    sparclet:       tsc701
+    v9:             ultrasparc, ultrasparc3, niagara, niagara2
+@end smallexample
+
+By default (unless configured otherwise), GCC generates code for the V7
+variant of the SPARC architecture.  With @option{-mcpu=cypress}, the compiler
+additionally optimizes it for the Cypress CY7C602 chip, as used in the
+SPARCStation/SPARCServer 3xx series.  This is also appropriate for the older
+SPARCStation 1, 2, IPX etc.
+
+With @option{-mcpu=v8}, GCC generates code for the V8 variant of the SPARC
+architecture.  The only difference from V7 code is that the compiler emits
+the integer multiply and integer divide instructions which exist in SPARC-V8
+but not in SPARC-V7.  With @option{-mcpu=supersparc}, the compiler additionally
+optimizes it for the SuperSPARC chip, as used in the SPARCStation 10, 1000 and
+2000 series.
+
+With @option{-mcpu=sparclite}, GCC generates code for the SPARClite variant of
+the SPARC architecture.  This adds the integer multiply, integer divide step
+and scan (@code{ffs}) instructions which exist in SPARClite but not in SPARC-V7.
+With @option{-mcpu=f930}, the compiler additionally optimizes it for the
+Fujitsu MB86930 chip, which is the original SPARClite, with no FPU@.  With
+@option{-mcpu=f934}, the compiler additionally optimizes it for the Fujitsu
+MB86934 chip, which is the more recent SPARClite with FPU@.
+
+With @option{-mcpu=sparclet}, GCC generates code for the SPARClet variant of
+the SPARC architecture.  This adds the integer multiply, multiply/accumulate,
+integer divide step and scan (@code{ffs}) instructions which exist in SPARClet
+but not in SPARC-V7.  With @option{-mcpu=tsc701}, the compiler additionally
+optimizes it for the TEMIC SPARClet chip.
+
+With @option{-mcpu=v9}, GCC generates code for the V9 variant of the SPARC
+architecture.  This adds 64-bit integer and floating-point move instructions,
+3 additional floating-point condition code registers and conditional move
+instructions.  With @option{-mcpu=ultrasparc}, the compiler additionally
+optimizes it for the Sun UltraSPARC I/II/IIi chips.  With
+@option{-mcpu=ultrasparc3}, the compiler additionally optimizes it for the
+Sun UltraSPARC III/III+/IIIi/IIIi+/IV/IV+ chips.  With
+@option{-mcpu=niagara}, the compiler additionally optimizes it for
+Sun UltraSPARC T1 chips.  With @option{-mcpu=niagara2}, the compiler
+additionally optimizes it for Sun UltraSPARC T2 chips.
+
+@item -mtune=@var{cpu_type}
+@opindex mtune
+Set the instruction scheduling parameters for machine type
+@var{cpu_type}, but do not set the instruction set or register set that the
+option @option{-mcpu=@var{cpu_type}} would.
+
+The same values for @option{-mcpu=@var{cpu_type}} can be used for
+@option{-mtune=@var{cpu_type}}, but the only useful values are those
+that select a particular CPU implementation.  Those are @samp{cypress},
+@samp{supersparc}, @samp{hypersparc}, @samp{leon}, @samp{f930}, @samp{f934},
+@samp{sparclite86x}, @samp{tsc701}, @samp{ultrasparc}, @samp{ultrasparc3},
+@samp{niagara}, and @samp{niagara2}.
+
+@item -mv8plus
+@itemx -mno-v8plus
+@opindex mv8plus
+@opindex mno-v8plus
+With @option{-mv8plus}, GCC generates code for the SPARC-V8+ ABI@.  The
+difference from the V8 ABI is that the global and out registers are
+considered 64-bit wide.  This is enabled by default on Solaris in 32-bit
+mode for all SPARC-V9 processors.
+
+@item -mvis
+@itemx -mno-vis
+@opindex mvis
+@opindex mno-vis
+With @option{-mvis}, GCC generates code that takes advantage of the UltraSPARC
+Visual Instruction Set extensions.  The default is @option{-mno-vis}.
+
+@item -mfix-at697f
+@opindex mfix-at697f
+Enable the documented workaround for the single erratum of the Atmel AT697F
+processor (which corresponds to erratum #13 of the AT697E processor).
+@end table
+
+These @samp{-m} options are supported in addition to the above
+on SPARC-V9 processors in 64-bit environments:
+
+@table @gcctabopt
+@item -mlittle-endian
+@opindex mlittle-endian
+Generate code for a processor running in little-endian mode.  It is only
+available for a few configurations and most notably not on Solaris and Linux.
+
+@item -m32
+@itemx -m64
+@opindex m32
+@opindex m64
+Generate code for a 32-bit or 64-bit environment.
+The 32-bit environment sets int, long and pointer to 32 bits.
+The 64-bit environment sets int to 32 bits and long and pointer
+to 64 bits.
+
+@item -mcmodel=medlow
+@opindex mcmodel=medlow
+Generate code for the Medium/Low code model: 64-bit addresses, programs
+must be linked in the low 32 bits of memory.  Programs can be statically
+or dynamically linked.
+
+@item -mcmodel=medmid
+@opindex mcmodel=medmid
+Generate code for the Medium/Middle code model: 64-bit addresses, programs
+must be linked in the low 44 bits of memory, the text and data segments must
+be less than 2GB in size and the data segment must be located within 2GB of
+the text segment.
+
+@item -mcmodel=medany
+@opindex mcmodel=medany
+Generate code for the Medium/Anywhere code model: 64-bit addresses, programs
+may be linked anywhere in memory, the text and data segments must be less
+than 2GB in size and the data segment must be located within 2GB of the
+text segment.
+
+@item -mcmodel=embmedany
+@opindex mcmodel=embmedany
+Generate code for the Medium/Anywhere code model for embedded systems:
+64-bit addresses, the text and data segments must be less than 2GB in
+size, both starting anywhere in memory (determined at link time).  The
+global register %g4 points to the base of the data segment.  Programs
+are statically linked and PIC is not supported.
+
+@item -mstack-bias
+@itemx -mno-stack-bias
+@opindex mstack-bias
+@opindex mno-stack-bias
+With @option{-mstack-bias}, GCC assumes that the stack pointer, and
+frame pointer if present, are offset by @minus{}2047 which must be added back
+when making stack frame references.  This is the default in 64-bit mode.
+Otherwise, assume no such offset is present.
+@end table
+
+@node SPU Options
+@subsection SPU Options
+@cindex SPU options
+
+These @samp{-m} options are supported on the SPU:
+
+@table @gcctabopt
+@item -mwarn-reloc
+@itemx -merror-reloc
+@opindex mwarn-reloc
+@opindex merror-reloc
+
+The loader for SPU does not handle dynamic relocations.  By default, GCC
+will give an error when it generates code that requires a dynamic
+relocation.  @option{-mno-error-reloc} disables the error,
+@option{-mwarn-reloc} will generate a warning instead.
+
+@item -msafe-dma
+@itemx -munsafe-dma
+@opindex msafe-dma
+@opindex munsafe-dma
+
+Instructions which initiate or test completion of DMA must not be
+reordered with respect to loads and stores of the memory which is being
+accessed.  Users typically address this problem using the volatile
+keyword, but that can lead to inefficient code in places where the
+memory is known to not change.  Rather than mark the memory as volatile
+we treat the DMA instructions as potentially effecting all memory.  With
+@option{-munsafe-dma} users must use the volatile keyword to protect
+memory accesses.
+
+@item -mbranch-hints
+@opindex mbranch-hints
+
+By default, GCC will generate a branch hint instruction to avoid
+pipeline stalls for always taken or probably taken branches.  A hint
+will not be generated closer than 8 instructions away from its branch.
+There is little reason to disable them, except for debugging purposes,
+or to make an object a little bit smaller.
+
+@item -msmall-mem
+@itemx -mlarge-mem
+@opindex msmall-mem
+@opindex mlarge-mem
+
+By default, GCC generates code assuming that addresses are never larger
+than 18 bits.  With @option{-mlarge-mem} code is generated that assumes
+a full 32 bit address.
+
+@item -mstdmain
+@opindex mstdmain
+
+By default, GCC links against startup code that assumes the SPU-style
+main function interface (which has an unconventional parameter list).
+With @option{-mstdmain}, GCC will link your program against startup
+code that assumes a C99-style interface to @code{main}, including a
+local copy of @code{argv} strings.
+
+@item -mfixed-range=@var{register-range}
+@opindex mfixed-range
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use.  This is
+useful when compiling kernel code.  A register range is specified as
+two registers separated by a dash.  Multiple register ranges can be
+specified separated by a comma.
+
+@item -mea32
+@itemx -mea64
+@opindex mea32
+@opindex mea64
+Compile code assuming that pointers to the PPU address space accessed
+via the @code{__ea} named address space qualifier are either 32 or 64
+bits wide.  The default is 32 bits.  As this is an ABI changing option,
+all object code in an executable must be compiled with the same setting.
+
+@item -maddress-space-conversion
+@itemx -mno-address-space-conversion
+@opindex maddress-space-conversion
+@opindex mno-address-space-conversion
+Allow/disallow treating the @code{__ea} address space as superset
+of the generic address space.  This enables explicit type casts
+between @code{__ea} and generic pointer as well as implicit
+conversions of generic pointers to @code{__ea} pointers.  The
+default is to allow address space pointer conversions.
+
+@item -mcache-size=@var{cache-size}
+@opindex mcache-size
+This option controls the version of libgcc that the compiler links to an
+executable and selects a software-managed cache for accessing variables
+in the @code{__ea} address space with a particular cache size.  Possible
+options for @var{cache-size} are @samp{8}, @samp{16}, @samp{32}, @samp{64}
+and @samp{128}.  The default cache size is 64KB.
+
+@item -matomic-updates
+@itemx -mno-atomic-updates
+@opindex matomic-updates
+@opindex mno-atomic-updates
+This option controls the version of libgcc that the compiler links to an
+executable and selects whether atomic updates to the software-managed
+cache of PPU-side variables are used.  If you use atomic updates, changes
+to a PPU variable from SPU code using the @code{__ea} named address space
+qualifier will not interfere with changes to other PPU variables residing
+in the same cache line from PPU code.  If you do not use atomic updates,
+such interference may occur; however, writing back cache lines will be
+more efficient.  The default behavior is to use atomic updates.
+
+@item -mdual-nops
+@itemx -mdual-nops=@var{n}
+@opindex mdual-nops
+By default, GCC will insert nops to increase dual issue when it expects
+it to increase performance.  @var{n} can be a value from 0 to 10.  A
+smaller @var{n} will insert fewer nops.  10 is the default, 0 is the
+same as @option{-mno-dual-nops}.  Disabled with @option{-Os}.
+
+@item -mhint-max-nops=@var{n}
+@opindex mhint-max-nops
+Maximum number of nops to insert for a branch hint.  A branch hint must
+be at least 8 instructions away from the branch it is effecting.  GCC
+will insert up to @var{n} nops to enforce this, otherwise it will not
+generate the branch hint.
+
+@item -mhint-max-distance=@var{n}
+@opindex mhint-max-distance
+The encoding of the branch hint instruction limits the hint to be within
+256 instructions of the branch it is effecting.  By default, GCC makes
+sure it is within 125.
+
+@item -msafe-hints
+@opindex msafe-hints
+Work around a hardware bug which causes the SPU to stall indefinitely.
+By default, GCC will insert the @code{hbrp} instruction to make sure
+this stall won't happen.
+
+@end table
+
+@node System V Options
+@subsection Options for System V
+
+These additional options are available on System V Release 4 for
+compatibility with other compilers on those systems:
+
+@table @gcctabopt
+@item -G
+@opindex G
+Create a shared object.
+It is recommended that @option{-symbolic} or @option{-shared} be used instead.
+
+@item -Qy
+@opindex Qy
+Identify the versions of each tool used by the compiler, in a
+@code{.ident} assembler directive in the output.
+
+@item -Qn
+@opindex Qn
+Refrain from adding @code{.ident} directives to the output file (this is
+the default).
+
+@item -YP,@var{dirs}
+@opindex YP
+Search the directories @var{dirs}, and no others, for libraries
+specified with @option{-l}.
+
+@item -Ym,@var{dir}
+@opindex Ym
+Look in the directory @var{dir} to find the M4 preprocessor.
+The assembler uses this option.
+@c This is supposed to go with a -Yd for predefined M4 macro files, but
+@c the generic assembler that comes with Solaris takes just -Ym.
+@end table
+
+@node V850 Options
+@subsection V850 Options
+@cindex V850 Options
+
+These @samp{-m} options are defined for V850 implementations:
+
+@table @gcctabopt
+@item -mlong-calls
+@itemx -mno-long-calls
+@opindex mlong-calls
+@opindex mno-long-calls
+Treat all calls as being far away (near).  If calls are assumed to be
+far away, the compiler will always load the functions address up into a
+register, and call indirect through the pointer.
+
+@item -mno-ep
+@itemx -mep
+@opindex mno-ep
+@opindex mep
+Do not optimize (do optimize) basic blocks that use the same index
+pointer 4 or more times to copy pointer into the @code{ep} register, and
+use the shorter @code{sld} and @code{sst} instructions.  The @option{-mep}
+option is on by default if you optimize.
+
+@item -mno-prolog-function
+@itemx -mprolog-function
+@opindex mno-prolog-function
+@opindex mprolog-function
+Do not use (do use) external functions to save and restore registers
+at the prologue and epilogue of a function.  The external functions
+are slower, but use less code space if more than one function saves
+the same number of registers.  The @option{-mprolog-function} option
+is on by default if you optimize.
+
+@item -mspace
+@opindex mspace
+Try to make the code as small as possible.  At present, this just turns
+on the @option{-mep} and @option{-mprolog-function} options.
+
+@item -mtda=@var{n}
+@opindex mtda
+Put static or global variables whose size is @var{n} bytes or less into
+the tiny data area that register @code{ep} points to.  The tiny data
+area can hold up to 256 bytes in total (128 bytes for byte references).
+
+@item -msda=@var{n}
+@opindex msda
+Put static or global variables whose size is @var{n} bytes or less into
+the small data area that register @code{gp} points to.  The small data
+area can hold up to 64 kilobytes.
+
+@item -mzda=@var{n}
+@opindex mzda
+Put static or global variables whose size is @var{n} bytes or less into
+the first 32 kilobytes of memory.
+
+@item -mv850
+@opindex mv850
+Specify that the target processor is the V850.
+
+@item -mbig-switch
+@opindex mbig-switch
+Generate code suitable for big switch tables.  Use this option only if
+the assembler/linker complain about out of range branches within a switch
+table.
+
+@item -mapp-regs
+@opindex mapp-regs
+This option will cause r2 and r5 to be used in the code generated by
+the compiler.  This setting is the default.
+
+@item -mno-app-regs
+@opindex mno-app-regs
+This option will cause r2 and r5 to be treated as fixed registers.
+
+@item -mv850e2v3
+@opindex mv850e2v3
+Specify that the target processor is the V850E2V3.  The preprocessor
+constants @samp{__v850e2v3__} will be defined if
+this option is used.
+
+@item -mv850e2
+@opindex mv850e2
+Specify that the target processor is the V850E2.  The preprocessor
+constants @samp{__v850e2__} will be defined if
+
+@item -mv850e1
+@opindex mv850e1
+Specify that the target processor is the V850E1.  The preprocessor
+constants @samp{__v850e1__} and @samp{__v850e__} will be defined if
+
+@item -mv850es
+@opindex mv850es
+Specify that the target processor is the V850ES.  This is an alias for
+the @option{-mv850e1} option.
+
+@item -mv850e
+@opindex mv850e
+Specify that the target processor is the V850E@.  The preprocessor
+constant @samp{__v850e__} will be defined if this option is used.
+
+If neither @option{-mv850} nor @option{-mv850e} nor @option{-mv850e1}
+nor @option{-mv850e2} nor @option{-mv850e2v3}
+are defined then a default target processor will be chosen and the
+relevant @samp{__v850*__} preprocessor constant will be defined.
+
+The preprocessor constants @samp{__v850} and @samp{__v851__} are always
+defined, regardless of which processor variant is the target.
+
+@item -mdisable-callt
+@opindex mdisable-callt
+This option will suppress generation of the CALLT instruction for the
+v850e, v850e1, v850e2 and v850e2v3 flavors of the v850 architecture.  The default is
+@option{-mno-disable-callt} which allows the CALLT instruction to be used.
+
+@end table
+
+@node VAX Options
+@subsection VAX Options
+@cindex VAX options
+
+These @samp{-m} options are defined for the VAX:
+
+@table @gcctabopt
+@item -munix
+@opindex munix
+Do not output certain jump instructions (@code{aobleq} and so on)
+that the Unix assembler for the VAX cannot handle across long
+ranges.
+
+@item -mgnu
+@opindex mgnu
+Do output those jump instructions, on the assumption that you
+will assemble with the GNU assembler.
+
+@item -mg
+@opindex mg
+Output code for g-format floating point numbers instead of d-format.
+@end table
+
+@node VxWorks Options
+@subsection VxWorks Options
+@cindex VxWorks Options
+
+The options in this section are defined for all VxWorks targets.
+Options specific to the target hardware are listed with the other
+options for that target.
+
+@table @gcctabopt
+@item -mrtp
+@opindex mrtp
+GCC can generate code for both VxWorks kernels and real time processes
+(RTPs).  This option switches from the former to the latter.  It also
+defines the preprocessor macro @code{__RTP__}.
+
+@item -non-static
+@opindex non-static
+Link an RTP executable against shared libraries rather than static
+libraries.  The options @option{-static} and @option{-shared} can
+also be used for RTPs (@pxref{Link Options}); @option{-static}
+is the default.
+
+@item -Bstatic
+@itemx -Bdynamic
+@opindex Bstatic
+@opindex Bdynamic
+These options are passed down to the linker.  They are defined for
+compatibility with Diab.
+
+@item -Xbind-lazy
+@opindex Xbind-lazy
+Enable lazy binding of function calls.  This option is equivalent to
+@option{-Wl,-z,now} and is defined for compatibility with Diab.
+
+@item -Xbind-now
+@opindex Xbind-now
+Disable lazy binding of function calls.  This option is the default and
+is defined for compatibility with Diab.
+@end table
+
+@node x86-64 Options
+@subsection x86-64 Options
+@cindex x86-64 options
+
+These are listed under @xref{i386 and x86-64 Options}.
+
+@node Xstormy16 Options
+@subsection Xstormy16 Options
+@cindex Xstormy16 Options
+
+These options are defined for Xstormy16:
+
+@table @gcctabopt
+@item -msim
+@opindex msim
+Choose startup files and linker script suitable for the simulator.
+@end table
+
+@node Xtensa Options
+@subsection Xtensa Options
+@cindex Xtensa Options
+
+These options are supported for Xtensa targets:
+
+@table @gcctabopt
+@item -mconst16
+@itemx -mno-const16
+@opindex mconst16
+@opindex mno-const16
+Enable or disable use of @code{CONST16} instructions for loading
+constant values.  The @code{CONST16} instruction is currently not a
+standard option from Tensilica.  When enabled, @code{CONST16}
+instructions are always used in place of the standard @code{L32R}
+instructions.  The use of @code{CONST16} is enabled by default only if
+the @code{L32R} instruction is not available.
+
+@item -mfused-madd
+@itemx -mno-fused-madd
+@opindex mfused-madd
+@opindex mno-fused-madd
+Enable or disable use of fused multiply/add and multiply/subtract
+instructions in the floating-point option.  This has no effect if the
+floating-point option is not also enabled.  Disabling fused multiply/add
+and multiply/subtract instructions forces the compiler to use separate
+instructions for the multiply and add/subtract operations.  This may be
+desirable in some cases where strict IEEE 754-compliant results are
+required: the fused multiply add/subtract instructions do not round the
+intermediate result, thereby producing results with @emph{more} bits of
+precision than specified by the IEEE standard.  Disabling fused multiply
+add/subtract instructions also ensures that the program output is not
+sensitive to the compiler's ability to combine multiply and add/subtract
+operations.
+
+@item -mserialize-volatile
+@itemx -mno-serialize-volatile
+@opindex mserialize-volatile
+@opindex mno-serialize-volatile
+When this option is enabled, GCC inserts @code{MEMW} instructions before
+@code{volatile} memory references to guarantee sequential consistency.
+The default is @option{-mserialize-volatile}.  Use
+@option{-mno-serialize-volatile} to omit the @code{MEMW} instructions.
+
+@item -mforce-no-pic
+@opindex mforce-no-pic
+For targets, like GNU/Linux, where all user-mode Xtensa code must be
+position-independent code (PIC), this option disables PIC for compiling
+kernel code.
+
+@item -mtext-section-literals
+@itemx -mno-text-section-literals
+@opindex mtext-section-literals
+@opindex mno-text-section-literals
+Control the treatment of literal pools.  The default is
+@option{-mno-text-section-literals}, which places literals in a separate
+section in the output file.  This allows the literal pool to be placed
+in a data RAM/ROM, and it also allows the linker to combine literal
+pools from separate object files to remove redundant literals and
+improve code size.  With @option{-mtext-section-literals}, the literals
+are interspersed in the text section in order to keep them as close as
+possible to their references.  This may be necessary for large assembly
+files.
+
+@item -mtarget-align
+@itemx -mno-target-align
+@opindex mtarget-align
+@opindex mno-target-align
+When this option is enabled, GCC instructs the assembler to
+automatically align instructions to reduce branch penalties at the
+expense of some code density.  The assembler attempts to widen density
+instructions to align branch targets and the instructions following call
+instructions.  If there are not enough preceding safe density
+instructions to align a target, no widening will be performed.  The
+default is @option{-mtarget-align}.  These options do not affect the
+treatment of auto-aligned instructions like @code{LOOP}, which the
+assembler will always align, either by widening density instructions or
+by inserting no-op instructions.
+
+@item -mlongcalls
+@itemx -mno-longcalls
+@opindex mlongcalls
+@opindex mno-longcalls
+When this option is enabled, GCC instructs the assembler to translate
+direct calls to indirect calls unless it can determine that the target
+of a direct call is in the range allowed by the call instruction.  This
+translation typically occurs for calls to functions in other source
+files.  Specifically, the assembler translates a direct @code{CALL}
+instruction into an @code{L32R} followed by a @code{CALLX} instruction.
+The default is @option{-mno-longcalls}.  This option should be used in
+programs where the call target can potentially be out of range.  This
+option is implemented in the assembler, not the compiler, so the
+assembly code generated by GCC will still show direct call
+instructions---look at the disassembled object code to see the actual
+instructions.  Note that the assembler will use an indirect call for
+every cross-file call, not just those that really will be out of range.
+@end table
+
+@node zSeries Options
+@subsection zSeries Options
+@cindex zSeries options
+
+These are listed under @xref{S/390 and zSeries Options}.
+
+@node Code Gen Options
+@section Options for Code Generation Conventions
+@cindex code generation conventions
+@cindex options, code generation
+@cindex run-time options
+
+These machine-independent options control the interface conventions
+used in code generation.
+
+Most of them have both positive and negative forms; the negative form
+of @option{-ffoo} would be @option{-fno-foo}.  In the table below, only
+one of the forms is listed---the one which is not the default.  You
+can figure out the other form by either removing @samp{no-} or adding
+it.
+
+@table @gcctabopt
+@item -fbounds-check
+@opindex fbounds-check
+For front-ends that support it, generate additional code to check that
+indices used to access arrays are within the declared range.  This is
+currently only supported by the Java and Fortran front-ends, where
+this option defaults to true and false respectively.
+
+@item -ftrapv
+@opindex ftrapv
+This option generates traps for signed overflow on addition, subtraction,
+multiplication operations.
+
+@item -fwrapv
+@opindex fwrapv
+This option instructs the compiler to assume that signed arithmetic
+overflow of addition, subtraction and multiplication wraps around
+using twos-complement representation.  This flag enables some optimizations
+and disables others.  This option is enabled by default for the Java
+front-end, as required by the Java language specification.
+
+@item -fexceptions
+@opindex fexceptions
+Enable exception handling.  Generates extra code needed to propagate
+exceptions.  For some targets, this implies GCC will generate frame
+unwind information for all functions, which can produce significant data
+size overhead, although it does not affect execution.  If you do not
+specify this option, GCC will enable it by default for languages like
+C++ which normally require exception handling, and disable it for
+languages like C that do not normally require it.  However, you may need
+to enable this option when compiling C code that needs to interoperate
+properly with exception handlers written in C++.  You may also wish to
+disable this option if you are compiling older C++ programs that don't
+use exception handling.
+
+@item -fnon-call-exceptions
+@opindex fnon-call-exceptions
+Generate code that allows trapping instructions to throw exceptions.
+Note that this requires platform-specific runtime support that does
+not exist everywhere.  Moreover, it only allows @emph{trapping}
+instructions to throw exceptions, i.e.@: memory references or floating
+point instructions.  It does not allow exceptions to be thrown from
+arbitrary signal handlers such as @code{SIGALRM}.
+
+@item -funwind-tables
+@opindex funwind-tables
+Similar to @option{-fexceptions}, except that it will just generate any needed
+static data, but will not affect the generated code in any other way.
+You will normally not enable this option; instead, a language processor
+that needs this handling would enable it on your behalf.
+
+@item -fasynchronous-unwind-tables
+@opindex fasynchronous-unwind-tables
+Generate unwind table in dwarf2 format, if supported by target machine.  The
+table is exact at each instruction boundary, so it can be used for stack
+unwinding from asynchronous events (such as debugger or garbage collector).
+
+@item -fpcc-struct-return
+@opindex fpcc-struct-return
+Return ``short'' @code{struct} and @code{union} values in memory like
+longer ones, rather than in registers.  This convention is less
+efficient, but it has the advantage of allowing intercallability between
+GCC-compiled files and files compiled with other compilers, particularly
+the Portable C Compiler (pcc).
+
+The precise convention for returning structures in memory depends
+on the target configuration macros.
+
+Short structures and unions are those whose size and alignment match
+that of some integer type.
+
+@strong{Warning:} code compiled with the @option{-fpcc-struct-return}
+switch is not binary compatible with code compiled with the
+@option{-freg-struct-return} switch.
+Use it to conform to a non-default application binary interface.
+
+@item -freg-struct-return
+@opindex freg-struct-return
+Return @code{struct} and @code{union} values in registers when possible.
+This is more efficient for small structures than
+@option{-fpcc-struct-return}.
+
+If you specify neither @option{-fpcc-struct-return} nor
+@option{-freg-struct-return}, GCC defaults to whichever convention is
+standard for the target.  If there is no standard convention, GCC
+defaults to @option{-fpcc-struct-return}, except on targets where GCC is
+the principal compiler.  In those cases, we can choose the standard, and
+we chose the more efficient register return alternative.
+
+@strong{Warning:} code compiled with the @option{-freg-struct-return}
+switch is not binary compatible with code compiled with the
+@option{-fpcc-struct-return} switch.
+Use it to conform to a non-default application binary interface.
+
+@item -fshort-enums
+@opindex fshort-enums
+Allocate to an @code{enum} type only as many bytes as it needs for the
+declared range of possible values.  Specifically, the @code{enum} type
+will be equivalent to the smallest integer type which has enough room.
+
+@strong{Warning:} the @option{-fshort-enums} switch causes GCC to generate
+code that is not binary compatible with code generated without that switch.
+Use it to conform to a non-default application binary interface.
+
+@item -fshort-double
+@opindex fshort-double
+Use the same size for @code{double} as for @code{float}.
+
+@strong{Warning:} the @option{-fshort-double} switch causes GCC to generate
+code that is not binary compatible with code generated without that switch.
+Use it to conform to a non-default application binary interface.
+
+@item -fshort-wchar
+@opindex fshort-wchar
+Override the underlying type for @samp{wchar_t} to be @samp{short
+unsigned int} instead of the default for the target.  This option is
+useful for building programs to run under WINE@.
+
+@strong{Warning:} the @option{-fshort-wchar} switch causes GCC to generate
+code that is not binary compatible with code generated without that switch.
+Use it to conform to a non-default application binary interface.
+
+@item -fno-common
+@opindex fno-common
+In C code, controls the placement of uninitialized global variables.
+Unix C compilers have traditionally permitted multiple definitions of
+such variables in different compilation units by placing the variables
+in a common block.
+This is the behavior specified by @option{-fcommon}, and is the default
+for GCC on most targets.
+On the other hand, this behavior is not required by ISO C, and on some
+targets may carry a speed or code size penalty on variable references.
+The @option{-fno-common} option specifies that the compiler should place
+uninitialized global variables in the data section of the object file,
+rather than generating them as common blocks.
+This has the effect that if the same variable is declared
+(without @code{extern}) in two different compilations,
+you will get a multiple-definition error when you link them.
+In this case, you must compile with @option{-fcommon} instead.
+Compiling with @option{-fno-common} is useful on targets for which
+it provides better performance, or if you wish to verify that the
+program will work on other systems which always treat uninitialized
+variable declarations this way.
+
+@item -fno-ident
+@opindex fno-ident
+Ignore the @samp{#ident} directive.
+
+@item -finhibit-size-directive
+@opindex finhibit-size-directive
+Don't output a @code{.size} assembler directive, or anything else that
+would cause trouble if the function is split in the middle, and the
+two halves are placed at locations far apart in memory.  This option is
+used when compiling @file{crtstuff.c}; you should not need to use it
+for anything else.
+
+@item -fverbose-asm
+@opindex fverbose-asm
+Put extra commentary information in the generated assembly code to
+make it more readable.  This option is generally only of use to those
+who actually need to read the generated assembly code (perhaps while
+debugging the compiler itself).
+
+@option{-fno-verbose-asm}, the default, causes the
+extra information to be omitted and is useful when comparing two assembler
+files.
+
+@item -frecord-gcc-switches
+@opindex frecord-gcc-switches
+This switch causes the command line that was used to invoke the
+compiler to be recorded into the object file that is being created.
+This switch is only implemented on some targets and the exact format
+of the recording is target and binary file format dependent, but it
+usually takes the form of a section containing ASCII text.  This
+switch is related to the @option{-fverbose-asm} switch, but that
+switch only records information in the assembler output file as
+comments, so it never reaches the object file.
+
+@item -fpic
+@opindex fpic
+@cindex global offset table
+@cindex PIC
+Generate position-independent code (PIC) suitable for use in a shared
+library, if supported for the target machine.  Such code accesses all
+constant addresses through a global offset table (GOT)@.  The dynamic
+loader resolves the GOT entries when the program starts (the dynamic
+loader is not part of GCC; it is part of the operating system).  If
+the GOT size for the linked executable exceeds a machine-specific
+maximum size, you get an error message from the linker indicating that
+@option{-fpic} does not work; in that case, recompile with @option{-fPIC}
+instead.  (These maximums are 8k on the SPARC and 32k
+on the m68k and RS/6000.  The 386 has no such limit.)
+
+Position-independent code requires special support, and therefore works
+only on certain machines.  For the 386, GCC supports PIC for System V
+but not for the Sun 386i.  Code generated for the IBM RS/6000 is always
+position-independent.
+
+When this flag is set, the macros @code{__pic__} and @code{__PIC__}
+are defined to 1.
+
+@item -fPIC
+@opindex fPIC
+If supported for the target machine, emit position-independent code,
+suitable for dynamic linking and avoiding any limit on the size of the
+global offset table.  This option makes a difference on the m68k,
+PowerPC and SPARC@.
+
+Position-independent code requires special support, and therefore works
+only on certain machines.
+
+When this flag is set, the macros @code{__pic__} and @code{__PIC__}
+are defined to 2.
+
+@item -fpie
+@itemx -fPIE
+@opindex fpie
+@opindex fPIE
+These options are similar to @option{-fpic} and @option{-fPIC}, but
+generated position independent code can be only linked into executables.
+Usually these options are used when @option{-pie} GCC option will be
+used during linking.
+
+@option{-fpie} and @option{-fPIE} both define the macros
+@code{__pie__} and @code{__PIE__}.  The macros have the value 1
+for @option{-fpie} and 2 for @option{-fPIE}.
+
+@item -fno-jump-tables
+@opindex fno-jump-tables
+Do not use jump tables for switch statements even where it would be
+more efficient than other code generation strategies.  This option is
+of use in conjunction with @option{-fpic} or @option{-fPIC} for
+building code which forms part of a dynamic linker and cannot
+reference the address of a jump table.  On some targets, jump tables
+do not require a GOT and this option is not needed.
+
+@item -ffixed-@var{reg}
+@opindex ffixed
+Treat the register named @var{reg} as a fixed register; generated code
+should never refer to it (except perhaps as a stack pointer, frame
+pointer or in some other fixed role).
+
+@var{reg} must be the name of a register.  The register names accepted
+are machine-specific and are defined in the @code{REGISTER_NAMES}
+macro in the machine description macro file.
+
+This flag does not have a negative form, because it specifies a
+three-way choice.
+
+@item -fcall-used-@var{reg}
+@opindex fcall-used
+Treat the register named @var{reg} as an allocable register that is
+clobbered by function calls.  It may be allocated for temporaries or
+variables that do not live across a call.  Functions compiled this way
+will not save and restore the register @var{reg}.
+
+It is an error to used this flag with the frame pointer or stack pointer.
+Use of this flag for other registers that have fixed pervasive roles in
+the machine's execution model will produce disastrous results.
+
+This flag does not have a negative form, because it specifies a
+three-way choice.
+
+@item -fcall-saved-@var{reg}
+@opindex fcall-saved
+Treat the register named @var{reg} as an allocable register saved by
+functions.  It may be allocated even for temporaries or variables that
+live across a call.  Functions compiled this way will save and restore
+the register @var{reg} if they use it.
+
+It is an error to used this flag with the frame pointer or stack pointer.
+Use of this flag for other registers that have fixed pervasive roles in
+the machine's execution model will produce disastrous results.
+
+A different sort of disaster will result from the use of this flag for
+a register in which function values may be returned.
+
+This flag does not have a negative form, because it specifies a
+three-way choice.
+
+@item -fpack-struct[=@var{n}]
+@opindex fpack-struct
+Without a value specified, pack all structure members together without
+holes.  When a value is specified (which must be a small power of two), pack
+structure members according to this value, representing the maximum
+alignment (that is, objects with default alignment requirements larger than
+this will be output potentially unaligned at the next fitting location.
+
+@strong{Warning:} the @option{-fpack-struct} switch causes GCC to generate
+code that is not binary compatible with code generated without that switch.
+Additionally, it makes the code suboptimal.
+Use it to conform to a non-default application binary interface.
+
+@item -finstrument-functions
+@opindex finstrument-functions
+Generate instrumentation calls for entry and exit to functions.  Just
+after function entry and just before function exit, the following
+profiling functions will be called with the address of the current
+function and its call site.  (On some platforms,
+@code{__builtin_return_address} does not work beyond the current
+function, so the call site information may not be available to the
+profiling functions otherwise.)
+
+@smallexample
+void __cyg_profile_func_enter (void *this_fn,
+                               void *call_site);
+void __cyg_profile_func_exit  (void *this_fn,
+                               void *call_site);
+@end smallexample
+
+The first argument is the address of the start of the current function,
+which may be looked up exactly in the symbol table.
+
+This instrumentation is also done for functions expanded inline in other
+functions.  The profiling calls will indicate where, conceptually, the
+inline function is entered and exited.  This means that addressable
+versions of such functions must be available.  If all your uses of a
+function are expanded inline, this may mean an additional expansion of
+code size.  If you use @samp{extern inline} in your C code, an
+addressable version of such functions must be provided.  (This is
+normally the case anyways, but if you get lucky and the optimizer always
+expands the functions inline, you might have gotten away without
+providing static copies.)
+
+A function may be given the attribute @code{no_instrument_function}, in
+which case this instrumentation will not be done.  This can be used, for
+example, for the profiling functions listed above, high-priority
+interrupt routines, and any functions from which the profiling functions
+cannot safely be called (perhaps signal handlers, if the profiling
+routines generate output or allocate memory).
+
+@item -finstrument-functions-exclude-file-list=@var{file},@var{file},@dots{}
+@opindex finstrument-functions-exclude-file-list
+
+Set the list of functions that are excluded from instrumentation (see
+the description of @code{-finstrument-functions}).  If the file that
+contains a function definition matches with one of @var{file}, then
+that function is not instrumented.  The match is done on substrings:
+if the @var{file} parameter is a substring of the file name, it is
+considered to be a match.
+
+For example:
+
+@smallexample
+-finstrument-functions-exclude-file-list=/bits/stl,include/sys
+@end smallexample
+
+@noindent
+will exclude any inline function defined in files whose pathnames
+contain @code{/bits/stl} or @code{include/sys}.
+
+If, for some reason, you want to include letter @code{','} in one of
+@var{sym}, write @code{'\,'}. For example,
+@code{-finstrument-functions-exclude-file-list='\,\,tmp'}
+(note the single quote surrounding the option).
+
+@item -finstrument-functions-exclude-function-list=@var{sym},@var{sym},@dots{}
+@opindex finstrument-functions-exclude-function-list
+
+This is similar to @code{-finstrument-functions-exclude-file-list},
+but this option sets the list of function names to be excluded from
+instrumentation.  The function name to be matched is its user-visible
+name, such as @code{vector<int> blah(const vector<int> &)}, not the
+internal mangled name (e.g., @code{_Z4blahRSt6vectorIiSaIiEE}).  The
+match is done on substrings: if the @var{sym} parameter is a substring
+of the function name, it is considered to be a match.  For C99 and C++
+extended identifiers, the function name must be given in UTF-8, not
+using universal character names.
+
+@item -fstack-check
+@opindex fstack-check
+Generate code to verify that you do not go beyond the boundary of the
+stack.  You should specify this flag if you are running in an
+environment with multiple threads, but only rarely need to specify it in
+a single-threaded environment since stack overflow is automatically
+detected on nearly all systems if there is only one stack.
+
+Note that this switch does not actually cause checking to be done; the
+operating system or the language runtime must do that.  The switch causes
+generation of code to ensure that they see the stack being extended.
+
+You can additionally specify a string parameter: @code{no} means no
+checking, @code{generic} means force the use of old-style checking,
+@code{specific} means use the best checking method and is equivalent
+to bare @option{-fstack-check}.
+
+Old-style checking is a generic mechanism that requires no specific
+target support in the compiler but comes with the following drawbacks:
+
+@enumerate
+@item
+Modified allocation strategy for large objects: they will always be
+allocated dynamically if their size exceeds a fixed threshold.
+
+@item
+Fixed limit on the size of the static frame of functions: when it is
+topped by a particular function, stack checking is not reliable and
+a warning is issued by the compiler.
+
+@item
+Inefficiency: because of both the modified allocation strategy and the
+generic implementation, the performances of the code are hampered.
+@end enumerate
+
+Note that old-style stack checking is also the fallback method for
+@code{specific} if no target support has been added in the compiler.
+
+@item -fstack-limit-register=@var{reg}
+@itemx -fstack-limit-symbol=@var{sym}
+@itemx -fno-stack-limit
+@opindex fstack-limit-register
+@opindex fstack-limit-symbol
+@opindex fno-stack-limit
+Generate code to ensure that the stack does not grow beyond a certain value,
+either the value of a register or the address of a symbol.  If the stack
+would grow beyond the value, a signal is raised.  For most targets,
+the signal is raised before the stack overruns the boundary, so
+it is possible to catch the signal without taking special precautions.
+
+For instance, if the stack starts at absolute address @samp{0x80000000}
+and grows downwards, you can use the flags
+@option{-fstack-limit-symbol=__stack_limit} and
+@option{-Wl,--defsym,__stack_limit=0x7ffe0000} to enforce a stack limit
+of 128KB@.  Note that this may only work with the GNU linker.
+
+@item -fsplit-stack
+@opindex fsplit-stack
+Generate code to automatically split the stack before it overflows.
+The resulting program has a discontiguous stack which can only
+overflow if the program is unable to allocate any more memory.  This
+is most useful when running threaded programs, as it is no longer
+necessary to calculate a good stack size to use for each thread.  This
+is currently only implemented for the i386 and x86_64 backends running
+GNU/Linux.
+
+When code compiled with @option{-fsplit-stack} calls code compiled
+without @option{-fsplit-stack}, there may not be much stack space
+available for the latter code to run.  If compiling all code,
+including library code, with @option{-fsplit-stack} is not an option,
+then the linker can fix up these calls so that the code compiled
+without @option{-fsplit-stack} always has a large stack.  Support for
+this is implemented in the gold linker in GNU binutils release 2.21
+and later.
+
+@item -fleading-underscore
+@opindex fleading-underscore
+This option and its counterpart, @option{-fno-leading-underscore}, forcibly
+change the way C symbols are represented in the object file.  One use
+is to help link with legacy assembly code.
+
+@strong{Warning:} the @option{-fleading-underscore} switch causes GCC to
+generate code that is not binary compatible with code generated without that
+switch.  Use it to conform to a non-default application binary interface.
+Not all targets provide complete support for this switch.
+
+@item -ftls-model=@var{model}
+@opindex ftls-model
+Alter the thread-local storage model to be used (@pxref{Thread-Local}).
+The @var{model} argument should be one of @code{global-dynamic},
+@code{local-dynamic}, @code{initial-exec} or @code{local-exec}.
+
+The default without @option{-fpic} is @code{initial-exec}; with
+@option{-fpic} the default is @code{global-dynamic}.
+
+@item -fvisibility=@var{default|internal|hidden|protected}
+@opindex fvisibility
+Set the default ELF image symbol visibility to the specified option---all
+symbols will be marked with this unless overridden within the code.
+Using this feature can very substantially improve linking and
+load times of shared object libraries, produce more optimized
+code, provide near-perfect API export and prevent symbol clashes.
+It is @strong{strongly} recommended that you use this in any shared objects
+you distribute.
+
+Despite the nomenclature, @code{default} always means public; i.e.,
+available to be linked against from outside the shared object.
+@code{protected} and @code{internal} are pretty useless in real-world
+usage so the only other commonly used option will be @code{hidden}.
+The default if @option{-fvisibility} isn't specified is
+@code{default}, i.e., make every
+symbol public---this causes the same behavior as previous versions of
+GCC@.
+
+A good explanation of the benefits offered by ensuring ELF
+symbols have the correct visibility is given by ``How To Write
+Shared Libraries'' by Ulrich Drepper (which can be found at
+@w{@uref{http://people.redhat.com/~drepper/}})---however a superior
+solution made possible by this option to marking things hidden when
+the default is public is to make the default hidden and mark things
+public.  This is the norm with DLL's on Windows and with @option{-fvisibility=hidden}
+and @code{__attribute__ ((visibility("default")))} instead of
+@code{__declspec(dllexport)} you get almost identical semantics with
+identical syntax.  This is a great boon to those working with
+cross-platform projects.
+
+For those adding visibility support to existing code, you may find
+@samp{#pragma GCC visibility} of use.  This works by you enclosing
+the declarations you wish to set visibility for with (for example)
+@samp{#pragma GCC visibility push(hidden)} and
+@samp{#pragma GCC visibility pop}.
+Bear in mind that symbol visibility should be viewed @strong{as
+part of the API interface contract} and thus all new code should
+always specify visibility when it is not the default; i.e., declarations
+only for use within the local DSO should @strong{always} be marked explicitly
+as hidden as so to avoid PLT indirection overheads---making this
+abundantly clear also aids readability and self-documentation of the code.
+Note that due to ISO C++ specification requirements, operator new and
+operator delete must always be of default visibility.
+
+Be aware that headers from outside your project, in particular system
+headers and headers from any other library you use, may not be
+expecting to be compiled with visibility other than the default.  You
+may need to explicitly say @samp{#pragma GCC visibility push(default)}
+before including any such headers.
+
+@samp{extern} declarations are not affected by @samp{-fvisibility}, so
+a lot of code can be recompiled with @samp{-fvisibility=hidden} with
+no modifications.  However, this means that calls to @samp{extern}
+functions with no explicit visibility will use the PLT, so it is more
+effective to use @samp{__attribute ((visibility))} and/or
+@samp{#pragma GCC visibility} to tell the compiler which @samp{extern}
+declarations should be treated as hidden.
+
+Note that @samp{-fvisibility} does affect C++ vague linkage
+entities. This means that, for instance, an exception class that will
+be thrown between DSOs must be explicitly marked with default
+visibility so that the @samp{type_info} nodes will be unified between
+the DSOs.
+
+An overview of these techniques, their benefits and how to use them
+is at @uref{http://gcc.gnu.org/@/wiki/@/Visibility}.
+
+@item -fstrict-volatile-bitfields
+@opindex fstrict-volatile-bitfields
+This option should be used if accesses to volatile bitfields (or other
+structure fields, although the compiler usually honors those types
+anyway) should use a single access of the width of the
+field's type, aligned to a natural alignment if possible.  For
+example, targets with memory-mapped peripheral registers might require
+all such accesses to be 16 bits wide; with this flag the user could
+declare all peripheral bitfields as ``unsigned short'' (assuming short
+is 16 bits on these targets) to force GCC to use 16 bit accesses
+instead of, perhaps, a more efficient 32 bit access.
+
+If this option is disabled, the compiler will use the most efficient
+instruction.  In the previous example, that might be a 32-bit load
+instruction, even though that will access bytes that do not contain
+any portion of the bitfield, or memory-mapped registers unrelated to
+the one being updated.
+
+If the target requires strict alignment, and honoring the field
+type would require violating this alignment, a warning is issued.
+If the field has @code{packed} attribute, the access is done without
+honoring the field type.  If the field doesn't have @code{packed}
+attribute, the access is done honoring the field type.  In both cases,
+GCC assumes that the user knows something about the target hardware
+that it is unaware of.
+
+The default value of this option is determined by the application binary
+interface for the target processor.
+
+@end table
+
+@c man end
+
+@node Environment Variables
+@section Environment Variables Affecting GCC
+@cindex environment variables
+
+@c man begin ENVIRONMENT
+This section describes several environment variables that affect how GCC
+operates.  Some of them work by specifying directories or prefixes to use
+when searching for various kinds of files.  Some are used to specify other
+aspects of the compilation environment.
+
+Note that you can also specify places to search using options such as
+@option{-B}, @option{-I} and @option{-L} (@pxref{Directory Options}).  These
+take precedence over places specified using environment variables, which
+in turn take precedence over those specified by the configuration of GCC@.
+@xref{Driver,, Controlling the Compilation Driver @file{gcc}, gccint,
+GNU Compiler Collection (GCC) Internals}.
+
+@table @env
+@item LANG
+@itemx LC_CTYPE
+@c @itemx LC_COLLATE
+@itemx LC_MESSAGES
+@c @itemx LC_MONETARY
+@c @itemx LC_NUMERIC
+@c @itemx LC_TIME
+@itemx LC_ALL
+@findex LANG
+@findex LC_CTYPE
+@c @findex LC_COLLATE
+@findex LC_MESSAGES
+@c @findex LC_MONETARY
+@c @findex LC_NUMERIC
+@c @findex LC_TIME
+@findex LC_ALL
+@cindex locale
+These environment variables control the way that GCC uses
+localization information that allow GCC to work with different
+national conventions.  GCC inspects the locale categories
+@env{LC_CTYPE} and @env{LC_MESSAGES} if it has been configured to do
+so.  These locale categories can be set to any value supported by your
+installation.  A typical value is @samp{en_GB.UTF-8} for English in the United
+Kingdom encoded in UTF-8.
+
+The @env{LC_CTYPE} environment variable specifies character
+classification.  GCC uses it to determine the character boundaries in
+a string; this is needed for some multibyte encodings that contain quote
+and escape characters that would otherwise be interpreted as a string
+end or escape.
+
+The @env{LC_MESSAGES} environment variable specifies the language to
+use in diagnostic messages.
+
+If the @env{LC_ALL} environment variable is set, it overrides the value
+of @env{LC_CTYPE} and @env{LC_MESSAGES}; otherwise, @env{LC_CTYPE}
+and @env{LC_MESSAGES} default to the value of the @env{LANG}
+environment variable.  If none of these variables are set, GCC
+defaults to traditional C English behavior.
+
+@item TMPDIR
+@findex TMPDIR
+If @env{TMPDIR} is set, it specifies the directory to use for temporary
+files.  GCC uses temporary files to hold the output of one stage of
+compilation which is to be used as input to the next stage: for example,
+the output of the preprocessor, which is the input to the compiler
+proper.
+
+@item GCC_EXEC_PREFIX
+@findex GCC_EXEC_PREFIX
+If @env{GCC_EXEC_PREFIX} is set, it specifies a prefix to use in the
+names of the subprograms executed by the compiler.  No slash is added
+when this prefix is combined with the name of a subprogram, but you can
+specify a prefix that ends with a slash if you wish.
+
+If @env{GCC_EXEC_PREFIX} is not set, GCC will attempt to figure out
+an appropriate prefix to use based on the pathname it was invoked with.
+
+If GCC cannot find the subprogram using the specified prefix, it
+tries looking in the usual places for the subprogram.
+
+The default value of @env{GCC_EXEC_PREFIX} is
+@file{@var{prefix}/lib/gcc/} where @var{prefix} is the prefix to
+the installed compiler. In many cases @var{prefix} is the value
+of @code{prefix} when you ran the @file{configure} script.
+
+Other prefixes specified with @option{-B} take precedence over this prefix.
+
+This prefix is also used for finding files such as @file{crt0.o} that are
+used for linking.
+
+In addition, the prefix is used in an unusual way in finding the
+directories to search for header files.  For each of the standard
+directories whose name normally begins with @samp{/usr/local/lib/gcc}
+(more precisely, with the value of @env{GCC_INCLUDE_DIR}), GCC tries
+replacing that beginning with the specified prefix to produce an
+alternate directory name.  Thus, with @option{-Bfoo/}, GCC will search
+@file{foo/bar} where it would normally search @file{/usr/local/lib/bar}.
+These alternate directories are searched first; the standard directories
+come next. If a standard directory begins with the configured
+@var{prefix} then the value of @var{prefix} is replaced by
+@env{GCC_EXEC_PREFIX} when looking for header files.
+
+@item COMPILER_PATH
+@findex COMPILER_PATH
+The value of @env{COMPILER_PATH} is a colon-separated list of
+directories, much like @env{PATH}.  GCC tries the directories thus
+specified when searching for subprograms, if it can't find the
+subprograms using @env{GCC_EXEC_PREFIX}.
+
+@item LIBRARY_PATH
+@findex LIBRARY_PATH
+The value of @env{LIBRARY_PATH} is a colon-separated list of
+directories, much like @env{PATH}.  When configured as a native compiler,
+GCC tries the directories thus specified when searching for special
+linker files, if it can't find them using @env{GCC_EXEC_PREFIX}.  Linking
+using GCC also uses these directories when searching for ordinary
+libraries for the @option{-l} option (but directories specified with
+@option{-L} come first).
+
+@item LANG
+@findex LANG
+@cindex locale definition
+This variable is used to pass locale information to the compiler.  One way in
+which this information is used is to determine the character set to be used
+when character literals, string literals and comments are parsed in C and C++.
+When the compiler is configured to allow multibyte characters,
+the following values for @env{LANG} are recognized:
+
+@table @samp
+@item C-JIS
+Recognize JIS characters.
+@item C-SJIS
+Recognize SJIS characters.
+@item C-EUCJP
+Recognize EUCJP characters.
+@end table
+
+If @env{LANG} is not defined, or if it has some other value, then the
+compiler will use mblen and mbtowc as defined by the default locale to
+recognize and translate multibyte characters.
+@end table
+
+@noindent
+Some additional environments variables affect the behavior of the
+preprocessor.
+
+@include cppenv.texi
+
+@c man end
+
+@node Precompiled Headers
+@section Using Precompiled Headers
+@cindex precompiled headers
+@cindex speed of compilation
+
+Often large projects have many header files that are included in every
+source file.  The time the compiler takes to process these header files
+over and over again can account for nearly all of the time required to
+build the project.  To make builds faster, GCC allows users to
+`precompile' a header file; then, if builds can use the precompiled
+header file they will be much faster.
+
+To create a precompiled header file, simply compile it as you would any
+other file, if necessary using the @option{-x} option to make the driver
+treat it as a C or C++ header file.  You will probably want to use a
+tool like @command{make} to keep the precompiled header up-to-date when
+the headers it contains change.
+
+A precompiled header file will be searched for when @code{#include} is
+seen in the compilation.  As it searches for the included file
+(@pxref{Search Path,,Search Path,cpp,The C Preprocessor}) the
+compiler looks for a precompiled header in each directory just before it
+looks for the include file in that directory.  The name searched for is
+the name specified in the @code{#include} with @samp{.gch} appended.  If
+the precompiled header file can't be used, it is ignored.
+
+For instance, if you have @code{#include "all.h"}, and you have
+@file{all.h.gch} in the same directory as @file{all.h}, then the
+precompiled header file will be used if possible, and the original
+header will be used otherwise.
+
+Alternatively, you might decide to put the precompiled header file in a
+directory and use @option{-I} to ensure that directory is searched
+before (or instead of) the directory containing the original header.
+Then, if you want to check that the precompiled header file is always
+used, you can put a file of the same name as the original header in this
+directory containing an @code{#error} command.
+
+This also works with @option{-include}.  So yet another way to use
+precompiled headers, good for projects not designed with precompiled
+header files in mind, is to simply take most of the header files used by
+a project, include them from another header file, precompile that header
+file, and @option{-include} the precompiled header.  If the header files
+have guards against multiple inclusion, they will be skipped because
+they've already been included (in the precompiled header).
+
+If you need to precompile the same header file for different
+languages, targets, or compiler options, you can instead make a
+@emph{directory} named like @file{all.h.gch}, and put each precompiled
+header in the directory, perhaps using @option{-o}.  It doesn't matter
+what you call the files in the directory, every precompiled header in
+the directory will be considered.  The first precompiled header
+encountered in the directory that is valid for this compilation will
+be used; they're searched in no particular order.
+
+There are many other possibilities, limited only by your imagination,
+good sense, and the constraints of your build system.
+
+A precompiled header file can be used only when these conditions apply:
+
+@itemize
+@item
+Only one precompiled header can be used in a particular compilation.
+
+@item
+A precompiled header can't be used once the first C token is seen.  You
+can have preprocessor directives before a precompiled header; you can
+even include a precompiled header from inside another header, so long as
+there are no C tokens before the @code{#include}.
+
+@item
+The precompiled header file must be produced for the same language as
+the current compilation.  You can't use a C precompiled header for a C++
+compilation.
+
+@item
+The precompiled header file must have been produced by the same compiler
+binary as the current compilation is using.
+
+@item
+Any macros defined before the precompiled header is included must
+either be defined in the same way as when the precompiled header was
+generated, or must not affect the precompiled header, which usually
+means that they don't appear in the precompiled header at all.
+
+The @option{-D} option is one way to define a macro before a
+precompiled header is included; using a @code{#define} can also do it.
+There are also some options that define macros implicitly, like
+@option{-O} and @option{-Wdeprecated}; the same rule applies to macros
+defined this way.
+
+@item If debugging information is output when using the precompiled
+header, using @option{-g} or similar, the same kind of debugging information
+must have been output when building the precompiled header.  However,
+a precompiled header built using @option{-g} can be used in a compilation
+when no debugging information is being output.
+
+@item The same @option{-m} options must generally be used when building
+and using the precompiled header.  @xref{Submodel Options},
+for any cases where this rule is relaxed.
+
+@item Each of the following options must be the same when building and using
+the precompiled header:
+
+@gccoptlist{-fexceptions}
+
+@item
+Some other command-line options starting with @option{-f},
+@option{-p}, or @option{-O} must be defined in the same way as when
+the precompiled header was generated.  At present, it's not clear
+which options are safe to change and which are not; the safest choice
+is to use exactly the same options when generating and using the
+precompiled header.  The following are known to be safe:
+
+@gccoptlist{-fmessage-length=  -fpreprocessed  -fsched-interblock @gol
+-fsched-spec  -fsched-spec-load  -fsched-spec-load-dangerous @gol
+-fsched-verbose=@var{number}  -fschedule-insns  -fvisibility= @gol
+-pedantic-errors}
+
+@end itemize
+
+For all of these except the last, the compiler will automatically
+ignore the precompiled header if the conditions aren't met.  If you
+find an option combination that doesn't work and doesn't cause the
+precompiled header to be ignored, please consider filing a bug report,
+see @ref{Bugs}.
+
+If you do use differing options when generating and using the
+precompiled header, the actual behavior will be a mixture of the
+behavior for the options.  For instance, if you use @option{-g} to
+generate the precompiled header but not when using it, you may or may
+not get debugging information for routines in the precompiled header.
diff --git a/gcc/doc/jcf-dump.1 b/gcc/doc/jcf-dump.1
new file mode 100644
index 000000000..ac8715c8b
--- /dev/null
+++ b/gcc/doc/jcf-dump.1
@@ -0,0 +1,208 @@
+.\" Automatically generated by Pod::Man 2.25 (Pod::Simple 3.16)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  \*(C+ will
+.\" give a nicer C++.  Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available.  \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "JCF-DUMP 1"
+.TH JCF-DUMP 1 "2013-04-12" "gcc-4.6.4" "GNU"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+jcf\-dump \- print information about Java class files
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+jcf-dump [\fB\-c\fR] [\fB\-\-javap\fR]
+    [\fB\-\-classpath\fR=\fIpath\fR] [\fB\-\-CLASSPATH\fR=\fIpath\fR]
+    [\fB\-I\fR\fIdir\fR...] [\fB\-o\fR \fIfile\fR]
+    [\fB\-\-version\fR] [\fB\-\-help\fR] [\fB\-v\fR] [\fB\-\-verbose\fR]
+    \fIclassname\fR...
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+This is a class file examiner, similar to \f(CW\*(C`javap\*(C'\fR.  It will print
+information about a number of classes, which are specified by class name
+or file name.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+Disassemble method bodies.  By default method bodies are not printed.
+.IP "\fB\-\-print\-constants\fR" 4
+.IX Item "--print-constants"
+Print the constant pool.  When printing a reference to a constant
+also print its index in the constant pool.
+.IP "\fB\-\-javap\fR" 4
+.IX Item "--javap"
+Generate output in \f(CW\*(C`javap\*(C'\fR format.  The implementation of this
+feature is very incomplete.
+.IP "\fB\-\-classpath=\fR\fIpath\fR" 4
+.IX Item "--classpath=path"
+.PD 0
+.IP "\fB\-\-CLASSPATH=\fR\fIpath\fR" 4
+.IX Item "--CLASSPATH=path"
+.IP "\fB\-I\fR\fIdirectory\fR" 4
+.IX Item "-Idirectory"
+.IP "\fB\-o\fR \fIfile\fR" 4
+.IX Item "-o file"
+.PD
+These options as the same as the corresponding \fBgcj\fR options.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Print help, then exit.
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+Print version number, then exit.
+.IP "\fB\-v, \-\-verbose\fR" 4
+.IX Item "-v, --verbose"
+Print extra information while running.
+Implies \f(CW\*(C`\-\-print\-constants\*(C'\fR.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgcc\fR\|(1), \fIgcj\fR\|(1), \fIgcjh\fR\|(1), \fIgij\fR\|(1), \fIjcf\-dump\fR\|(1), \fIgfdl\fR\|(7),
+and the Info entries for \fIgcj\fR and \fIgcc\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, the Front-Cover Texts being (a) (see below), and
+with the Back-Cover Texts being (b) (see below).
+A copy of the license is included in the
+man page \fIgfdl\fR\|(7).
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\&     A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\&     You have freedom to copy and modify this GNU Manual, like GNU
+\&     software.  Copies published by the Free Software Foundation raise
+\&     funds for GNU development.
+.Ve
diff --git a/gcc/doc/jv-convert.1 b/gcc/doc/jv-convert.1
new file mode 100644
index 000000000..44b225ae4
--- /dev/null
+++ b/gcc/doc/jv-convert.1
@@ -0,0 +1,201 @@
+.\" Automatically generated by Pod::Man 2.25 (Pod::Simple 3.16)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  \*(C+ will
+.\" give a nicer C++.  Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available.  \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "JV-CONVERT 1"
+.TH JV-CONVERT 1 "2013-04-12" "gcc-4.6.4" "GNU"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+jv\-convert \- Convert file from one encoding to another
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+\&\fBjv-convert\fR [\fB\s-1OPTION\s0\fR] ... [\fI\s-1INPUTFILE\s0\fR [\fI\s-1OUTPUTFILE\s0\fR]]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBjv-convert\fR is a utility included with \f(CW\*(C`libgcj\*(C'\fR which
+converts a file from one encoding to another.  It is similar to the Unix
+\&\fBiconv\fR utility.
+.PP
+The encodings supported by \fBjv-convert\fR are platform-dependent.
+Currently there is no way to get a list of all supported encodings.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-\-encoding\fR \fIname\fR" 4
+.IX Item "--encoding name"
+.PD 0
+.IP "\fB\-\-from\fR \fIname\fR" 4
+.IX Item "--from name"
+.PD
+Use \fIname\fR as the input encoding.  The default is the current
+locale's encoding.
+.IP "\fB\-\-to\fR \fIname\fR" 4
+.IX Item "--to name"
+Use \fIname\fR as the output encoding.  The default is the
+\&\f(CW\*(C`JavaSrc\*(C'\fR encoding; this is \s-1ASCII\s0 with \fB\eu\fR escapes for
+non-ASCII characters.
+.IP "\fB\-i\fR \fIfile\fR" 4
+.IX Item "-i file"
+Read from \fIfile\fR.  The default is to read from standard input.
+.IP "\fB\-o\fR \fIfile\fR" 4
+.IX Item "-o file"
+Write to \fIfile\fR.  The default is to write to standard output.
+.IP "\fB\-\-reverse\fR" 4
+.IX Item "--reverse"
+Swap the input and output encodings.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Print a help message, then exit.
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+Print version information, then exit.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, the Front-Cover Texts being (a) (see below), and
+with the Back-Cover Texts being (b) (see below).
+A copy of the license is included in the
+man page \fIgfdl\fR\|(7).
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\&     A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\&     You have freedom to copy and modify this GNU Manual, like GNU
+\&     software.  Copies published by the Free Software Foundation raise
+\&     funds for GNU development.
+.Ve
diff --git a/gcc/doc/languages.texi b/gcc/doc/languages.texi
new file mode 100644
index 000000000..df45c1778
--- /dev/null
+++ b/gcc/doc/languages.texi
@@ -0,0 +1,36 @@
+@c Copyright (C) 2002, 2010 Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Languages
+@chapter Language Front Ends in GCC
+
+The interface to front ends for languages in GCC, and in particular
+the @code{tree} structure (@pxref{GENERIC}), was initially designed for
+C, and many aspects of it are still somewhat biased towards C and
+C-like languages.  It is, however, reasonably well suited to other
+procedural languages, and front ends for many such languages have been
+written for GCC@.
+
+Writing a compiler as a front end for GCC, rather than compiling
+directly to assembler or generating C code which is then compiled by
+GCC, has several advantages:
+
+@itemize @bullet
+@item GCC front ends benefit from the support for many different
+target machines already present in GCC@.
+@item GCC front ends benefit from all the optimizations in GCC@.  Some
+of these, such as alias analysis, may work better when GCC is
+compiling directly from source code then when it is compiling from
+generated C code.
+@item Better debugging information is generated when compiling
+directly from source code than when going via intermediate generated C
+code.
+@end itemize
+
+Because of the advantages of writing a compiler as a GCC front end,
+GCC front ends have also been created for languages very different
+from those for which GCC was designed, such as the declarative
+logic/functional language Mercury.  For these reasons, it may also be
+useful to implement compilers created for specialized purposes (for
+example, as part of a research project) as GCC front ends.
diff --git a/gcc/doc/libgcc.texi b/gcc/doc/libgcc.texi
new file mode 100644
index 000000000..aeba89f6f
--- /dev/null
+++ b/gcc/doc/libgcc.texi
@@ -0,0 +1,2305 @@
+@c Copyright (C) 2003, 2004, 2005, 2006, 2007, 2010
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+@c Contributed by Aldy Hernandez <aldy@quesejoda.com>
+
+@node Libgcc
+@chapter The GCC low-level runtime library
+
+GCC provides a low-level runtime library, @file{libgcc.a} or
+@file{libgcc_s.so.1} on some platforms.  GCC generates calls to
+routines in this library automatically, whenever it needs to perform
+some operation that is too complicated to emit inline code for.
+
+Most of the routines in @code{libgcc} handle arithmetic operations
+that the target processor cannot perform directly.  This includes
+integer multiply and divide on some machines, and all floating-point
+and fixed-point operations on other machines.  @code{libgcc} also includes
+routines for exception handling, and a handful of miscellaneous operations.
+
+Some of these routines can be defined in mostly machine-independent C@.
+Others must be hand-written in assembly language for each processor
+that needs them.
+
+GCC will also generate calls to C library routines, such as
+@code{memcpy} and @code{memset}, in some cases.  The set of routines
+that GCC may possibly use is documented in @ref{Other
+Builtins,,,gcc, Using the GNU Compiler Collection (GCC)}.
+
+These routines take arguments and return values of a specific machine
+mode, not a specific C type.  @xref{Machine Modes}, for an explanation
+of this concept.  For illustrative purposes, in this chapter the
+floating point type @code{float} is assumed to correspond to @code{SFmode};
+@code{double} to @code{DFmode}; and @code{@w{long double}} to both
+@code{TFmode} and @code{XFmode}.  Similarly, the integer types @code{int}
+and @code{@w{unsigned int}} correspond to @code{SImode}; @code{long} and
+@code{@w{unsigned long}} to @code{DImode}; and @code{@w{long long}} and
+@code{@w{unsigned long long}} to @code{TImode}.
+
+@menu
+* Integer library routines::
+* Soft float library routines::
+* Decimal float library routines::
+* Fixed-point fractional library routines::
+* Exception handling routines::
+* Miscellaneous routines::
+@end menu
+
+@node Integer library routines
+@section Routines for integer arithmetic
+
+The integer arithmetic routines are used on platforms that don't provide
+hardware support for arithmetic operations on some modes.
+
+@subsection Arithmetic functions
+
+@deftypefn {Runtime Function} int __ashlsi3 (int @var{a}, int @var{b})
+@deftypefnx {Runtime Function} long __ashldi3 (long @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {long long} __ashlti3 (long long @var{a}, int @var{b})
+These functions return the result of shifting @var{a} left by @var{b} bits.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __ashrsi3 (int @var{a}, int @var{b})
+@deftypefnx {Runtime Function} long __ashrdi3 (long @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {long long} __ashrti3 (long long @var{a}, int @var{b})
+These functions return the result of arithmetically shifting @var{a} right
+by @var{b} bits.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __divsi3 (int @var{a}, int @var{b})
+@deftypefnx {Runtime Function} long __divdi3 (long @var{a}, long @var{b})
+@deftypefnx {Runtime Function} {long long} __divti3 (long long @var{a}, long long @var{b})
+These functions return the quotient of the signed division of @var{a} and
+@var{b}.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __lshrsi3 (int @var{a}, int @var{b})
+@deftypefnx {Runtime Function} long __lshrdi3 (long @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {long long} __lshrti3 (long long @var{a}, int @var{b})
+These functions return the result of logically shifting @var{a} right by
+@var{b} bits.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __modsi3 (int @var{a}, int @var{b})
+@deftypefnx {Runtime Function} long __moddi3 (long @var{a}, long @var{b})
+@deftypefnx {Runtime Function} {long long} __modti3 (long long @var{a}, long long @var{b})
+These functions return the remainder of the signed division of @var{a}
+and @var{b}.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __mulsi3 (int @var{a}, int @var{b})
+@deftypefnx {Runtime Function} long __muldi3 (long @var{a}, long @var{b})
+@deftypefnx {Runtime Function} {long long} __multi3 (long long @var{a}, long long @var{b})
+These functions return the product of @var{a} and @var{b}.
+@end deftypefn
+
+@deftypefn {Runtime Function} long __negdi2 (long @var{a})
+@deftypefnx {Runtime Function} {long long} __negti2 (long long @var{a})
+These functions return the negation of @var{a}.
+@end deftypefn
+
+@deftypefn {Runtime Function} {unsigned int} __udivsi3 (unsigned int @var{a}, unsigned int @var{b})
+@deftypefnx {Runtime Function} {unsigned long} __udivdi3 (unsigned long @var{a}, unsigned long @var{b})
+@deftypefnx {Runtime Function} {unsigned long long} __udivti3 (unsigned long long @var{a}, unsigned long long @var{b})
+These functions return the quotient of the unsigned division of @var{a}
+and @var{b}.
+@end deftypefn
+
+@deftypefn {Runtime Function} {unsigned long} __udivmoddi3 (unsigned long @var{a}, unsigned long @var{b}, unsigned long *@var{c})
+@deftypefnx {Runtime Function} {unsigned long long} __udivti3 (unsigned long long @var{a}, unsigned long long @var{b}, unsigned long long *@var{c})
+These functions calculate both the quotient and remainder of the unsigned
+division of @var{a} and @var{b}.  The return value is the quotient, and
+the remainder is placed in variable pointed to by @var{c}.
+@end deftypefn
+
+@deftypefn {Runtime Function} {unsigned int} __umodsi3 (unsigned int @var{a}, unsigned int @var{b})
+@deftypefnx {Runtime Function} {unsigned long} __umoddi3 (unsigned long @var{a}, unsigned long @var{b})
+@deftypefnx {Runtime Function} {unsigned long long} __umodti3 (unsigned long long @var{a}, unsigned long long @var{b})
+These functions return the remainder of the unsigned division of @var{a}
+and @var{b}.
+@end deftypefn
+
+@subsection Comparison functions
+
+The following functions implement integral comparisons.  These functions
+implement a low-level compare, upon which the higher level comparison
+operators (such as less than and greater than or equal to) can be
+constructed.  The returned values lie in the range zero to two, to allow
+the high-level operators to be implemented by testing the returned
+result using either signed or unsigned comparison.
+
+@deftypefn {Runtime Function} int __cmpdi2 (long @var{a}, long @var{b})
+@deftypefnx {Runtime Function} int __cmpti2 (long long @var{a}, long long @var{b})
+These functions perform a signed comparison of @var{a} and @var{b}.  If
+@var{a} is less than @var{b}, they return 0; if @var{a} is greater than
+@var{b}, they return 2; and if @var{a} and @var{b} are equal they return 1.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __ucmpdi2 (unsigned long @var{a}, unsigned long @var{b})
+@deftypefnx {Runtime Function} int __ucmpti2 (unsigned long long @var{a}, unsigned long long @var{b})
+These functions perform an unsigned comparison of @var{a} and @var{b}.
+If @var{a} is less than @var{b}, they return 0; if @var{a} is greater than
+@var{b}, they return 2; and if @var{a} and @var{b} are equal they return 1.
+@end deftypefn
+
+@subsection Trapping arithmetic functions
+
+The following functions implement trapping arithmetic.  These functions
+call the libc function @code{abort} upon signed arithmetic overflow.
+
+@deftypefn {Runtime Function} int __absvsi2 (int @var{a})
+@deftypefnx {Runtime Function} long __absvdi2 (long @var{a})
+These functions return the absolute value of @var{a}.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __addvsi3 (int @var{a}, int @var{b})
+@deftypefnx {Runtime Function} long __addvdi3 (long @var{a}, long @var{b})
+These functions return the sum of @var{a} and @var{b}; that is
+@code{@var{a} + @var{b}}.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __mulvsi3 (int @var{a}, int @var{b})
+@deftypefnx {Runtime Function} long __mulvdi3 (long @var{a}, long @var{b})
+The functions return the product of @var{a} and @var{b}; that is
+@code{@var{a} * @var{b}}.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __negvsi2 (int @var{a})
+@deftypefnx {Runtime Function} long __negvdi2 (long @var{a})
+These functions return the negation of @var{a}; that is @code{-@var{a}}.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __subvsi3 (int @var{a}, int @var{b})
+@deftypefnx {Runtime Function} long __subvdi3 (long @var{a}, long @var{b})
+These functions return the difference between @var{b} and @var{a};
+that is @code{@var{a} - @var{b}}.
+@end deftypefn
+
+@subsection Bit operations
+
+@deftypefn {Runtime Function} int __clzsi2 (int @var{a})
+@deftypefnx {Runtime Function} int __clzdi2 (long @var{a})
+@deftypefnx {Runtime Function} int __clzti2 (long long @var{a})
+These functions return the number of leading 0-bits in @var{a}, starting
+at the most significant bit position.  If @var{a} is zero, the result is
+undefined.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __ctzsi2 (int @var{a})
+@deftypefnx {Runtime Function} int __ctzdi2 (long @var{a})
+@deftypefnx {Runtime Function} int __ctzti2 (long long @var{a})
+These functions return the number of trailing 0-bits in @var{a}, starting
+at the least significant bit position.  If @var{a} is zero, the result is
+undefined.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __ffsdi2 (long @var{a})
+@deftypefnx {Runtime Function} int __ffsti2 (long long @var{a})
+These functions return the index of the least significant 1-bit in @var{a},
+or the value zero if @var{a} is zero.  The least significant bit is index
+one.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __paritysi2 (int @var{a})
+@deftypefnx {Runtime Function} int __paritydi2 (long @var{a})
+@deftypefnx {Runtime Function} int __parityti2 (long long @var{a})
+These functions return the value zero if the number of bits set in
+@var{a} is even, and the value one otherwise.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __popcountsi2 (int @var{a})
+@deftypefnx {Runtime Function} int __popcountdi2 (long @var{a})
+@deftypefnx {Runtime Function} int __popcountti2 (long long @var{a})
+These functions return the number of bits set in @var{a}.
+@end deftypefn
+
+@deftypefn {Runtime Function} int32_t __bswapsi2 (int32_t @var{a})
+@deftypefnx {Runtime Function} int64_t __bswapdi2 (int64_t @var{a})
+These functions return the @var{a} byteswapped.
+@end deftypefn
+
+@node Soft float library routines
+@section Routines for floating point emulation
+@cindex soft float library
+@cindex arithmetic library
+@cindex math library
+@opindex msoft-float
+
+The software floating point library is used on machines which do not
+have hardware support for floating point.  It is also used whenever
+@option{-msoft-float} is used to disable generation of floating point
+instructions.  (Not all targets support this switch.)
+
+For compatibility with other compilers, the floating point emulation
+routines can be renamed with the @code{DECLARE_LIBRARY_RENAMES} macro
+(@pxref{Library Calls}).  In this section, the default names are used.
+
+Presently the library does not support @code{XFmode}, which is used
+for @code{long double} on some architectures.
+
+@subsection Arithmetic functions
+
+@deftypefn {Runtime Function} float __addsf3 (float @var{a}, float @var{b})
+@deftypefnx {Runtime Function} double __adddf3 (double @var{a}, double @var{b})
+@deftypefnx {Runtime Function} {long double} __addtf3 (long double @var{a}, long double @var{b})
+@deftypefnx {Runtime Function} {long double} __addxf3 (long double @var{a}, long double @var{b})
+These functions return the sum of @var{a} and @var{b}.
+@end deftypefn
+
+@deftypefn {Runtime Function} float __subsf3 (float @var{a}, float @var{b})
+@deftypefnx {Runtime Function} double __subdf3 (double @var{a}, double @var{b})
+@deftypefnx {Runtime Function} {long double} __subtf3 (long double @var{a}, long double @var{b})
+@deftypefnx {Runtime Function} {long double} __subxf3 (long double @var{a}, long double @var{b})
+These functions return the difference between @var{b} and @var{a};
+that is, @w{@math{@var{a} - @var{b}}}.
+@end deftypefn
+
+@deftypefn {Runtime Function} float __mulsf3 (float @var{a}, float @var{b})
+@deftypefnx {Runtime Function} double __muldf3 (double @var{a}, double @var{b})
+@deftypefnx {Runtime Function} {long double} __multf3 (long double @var{a}, long double @var{b})
+@deftypefnx {Runtime Function} {long double} __mulxf3 (long double @var{a}, long double @var{b})
+These functions return the product of @var{a} and @var{b}.
+@end deftypefn
+
+@deftypefn {Runtime Function} float __divsf3 (float @var{a}, float @var{b})
+@deftypefnx {Runtime Function} double __divdf3 (double @var{a}, double @var{b})
+@deftypefnx {Runtime Function} {long double} __divtf3 (long double @var{a}, long double @var{b})
+@deftypefnx {Runtime Function} {long double} __divxf3 (long double @var{a}, long double @var{b})
+These functions return the quotient of @var{a} and @var{b}; that is,
+@w{@math{@var{a} / @var{b}}}.
+@end deftypefn
+
+@deftypefn {Runtime Function} float __negsf2 (float @var{a})
+@deftypefnx {Runtime Function} double __negdf2 (double @var{a})
+@deftypefnx {Runtime Function} {long double} __negtf2 (long double @var{a})
+@deftypefnx {Runtime Function} {long double} __negxf2 (long double @var{a})
+These functions return the negation of @var{a}.  They simply flip the
+sign bit, so they can produce negative zero and negative NaN@.
+@end deftypefn
+
+@subsection Conversion functions
+
+@deftypefn {Runtime Function} double __extendsfdf2 (float @var{a})
+@deftypefnx {Runtime Function} {long double} __extendsftf2 (float @var{a})
+@deftypefnx {Runtime Function} {long double} __extendsfxf2 (float @var{a})
+@deftypefnx {Runtime Function} {long double} __extenddftf2 (double @var{a})
+@deftypefnx {Runtime Function} {long double} __extenddfxf2 (double @var{a})
+These functions extend @var{a} to the wider mode of their return
+type.
+@end deftypefn
+
+@deftypefn {Runtime Function} double __truncxfdf2 (long double @var{a})
+@deftypefnx {Runtime Function} double __trunctfdf2 (long double @var{a})
+@deftypefnx {Runtime Function} float __truncxfsf2 (long double @var{a})
+@deftypefnx {Runtime Function} float __trunctfsf2 (long double @var{a})
+@deftypefnx {Runtime Function} float __truncdfsf2 (double @var{a})
+These functions truncate @var{a} to the narrower mode of their return
+type, rounding toward zero.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __fixsfsi (float @var{a})
+@deftypefnx {Runtime Function} int __fixdfsi (double @var{a})
+@deftypefnx {Runtime Function} int __fixtfsi (long double @var{a})
+@deftypefnx {Runtime Function} int __fixxfsi (long double @var{a})
+These functions convert @var{a} to a signed integer, rounding toward zero.
+@end deftypefn
+
+@deftypefn {Runtime Function} long __fixsfdi (float @var{a})
+@deftypefnx {Runtime Function} long __fixdfdi (double @var{a})
+@deftypefnx {Runtime Function} long __fixtfdi (long double @var{a})
+@deftypefnx {Runtime Function} long __fixxfdi (long double @var{a})
+These functions convert @var{a} to a signed long, rounding toward zero.
+@end deftypefn
+
+@deftypefn {Runtime Function} {long long} __fixsfti (float @var{a})
+@deftypefnx {Runtime Function} {long long} __fixdfti (double @var{a})
+@deftypefnx {Runtime Function} {long long} __fixtfti (long double @var{a})
+@deftypefnx {Runtime Function} {long long} __fixxfti (long double @var{a})
+These functions convert @var{a} to a signed long long, rounding toward zero.
+@end deftypefn
+
+@deftypefn {Runtime Function} {unsigned int} __fixunssfsi (float @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __fixunsdfsi (double @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __fixunstfsi (long double @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __fixunsxfsi (long double @var{a})
+These functions convert @var{a} to an unsigned integer, rounding
+toward zero.  Negative values all become zero.
+@end deftypefn
+
+@deftypefn {Runtime Function} {unsigned long} __fixunssfdi (float @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __fixunsdfdi (double @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __fixunstfdi (long double @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __fixunsxfdi (long double @var{a})
+These functions convert @var{a} to an unsigned long, rounding
+toward zero.  Negative values all become zero.
+@end deftypefn
+
+@deftypefn {Runtime Function} {unsigned long long} __fixunssfti (float @var{a})
+@deftypefnx {Runtime Function} {unsigned long long} __fixunsdfti (double @var{a})
+@deftypefnx {Runtime Function} {unsigned long long} __fixunstfti (long double @var{a})
+@deftypefnx {Runtime Function} {unsigned long long} __fixunsxfti (long double @var{a})
+These functions convert @var{a} to an unsigned long long, rounding
+toward zero.  Negative values all become zero.
+@end deftypefn
+
+@deftypefn {Runtime Function} float __floatsisf (int @var{i})
+@deftypefnx {Runtime Function} double __floatsidf (int @var{i})
+@deftypefnx {Runtime Function} {long double} __floatsitf (int @var{i})
+@deftypefnx {Runtime Function} {long double} __floatsixf (int @var{i})
+These functions convert @var{i}, a signed integer, to floating point.
+@end deftypefn
+
+@deftypefn {Runtime Function} float __floatdisf (long @var{i})
+@deftypefnx {Runtime Function} double __floatdidf (long @var{i})
+@deftypefnx {Runtime Function} {long double} __floatditf (long @var{i})
+@deftypefnx {Runtime Function} {long double} __floatdixf (long @var{i})
+These functions convert @var{i}, a signed long, to floating point.
+@end deftypefn
+
+@deftypefn {Runtime Function} float __floattisf (long long @var{i})
+@deftypefnx {Runtime Function} double __floattidf (long long @var{i})
+@deftypefnx {Runtime Function} {long double} __floattitf (long long @var{i})
+@deftypefnx {Runtime Function} {long double} __floattixf (long long @var{i})
+These functions convert @var{i}, a signed long long, to floating point.
+@end deftypefn
+
+@deftypefn {Runtime Function} float __floatunsisf (unsigned int @var{i})
+@deftypefnx {Runtime Function} double __floatunsidf (unsigned int @var{i})
+@deftypefnx {Runtime Function} {long double} __floatunsitf (unsigned int @var{i})
+@deftypefnx {Runtime Function} {long double} __floatunsixf (unsigned int @var{i})
+These functions convert @var{i}, an unsigned integer, to floating point.
+@end deftypefn
+
+@deftypefn {Runtime Function} float __floatundisf (unsigned long @var{i})
+@deftypefnx {Runtime Function} double __floatundidf (unsigned long @var{i})
+@deftypefnx {Runtime Function} {long double} __floatunditf (unsigned long @var{i})
+@deftypefnx {Runtime Function} {long double} __floatundixf (unsigned long @var{i})
+These functions convert @var{i}, an unsigned long, to floating point.
+@end deftypefn
+
+@deftypefn {Runtime Function} float __floatuntisf (unsigned long long @var{i})
+@deftypefnx {Runtime Function} double __floatuntidf (unsigned long long @var{i})
+@deftypefnx {Runtime Function} {long double} __floatuntitf (unsigned long long @var{i})
+@deftypefnx {Runtime Function} {long double} __floatuntixf (unsigned long long @var{i})
+These functions convert @var{i}, an unsigned long long, to floating point.
+@end deftypefn
+
+@subsection Comparison functions
+
+There are two sets of basic comparison functions.
+
+@deftypefn {Runtime Function} int __cmpsf2 (float @var{a}, float @var{b})
+@deftypefnx {Runtime Function} int __cmpdf2 (double @var{a}, double @var{b})
+@deftypefnx {Runtime Function} int __cmptf2 (long double @var{a}, long double @var{b})
+These functions calculate @math{a <=> b}.  That is, if @var{a} is less
+than @var{b}, they return @minus{}1; if @var{a} is greater than @var{b}, they
+return 1; and if @var{a} and @var{b} are equal they return 0.  If
+either argument is NaN they return 1, but you should not rely on this;
+if NaN is a possibility, use one of the higher-level comparison
+functions.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __unordsf2 (float @var{a}, float @var{b})
+@deftypefnx {Runtime Function} int __unorddf2 (double @var{a}, double @var{b})
+@deftypefnx {Runtime Function} int __unordtf2 (long double @var{a}, long double @var{b})
+These functions return a nonzero value if either argument is NaN, otherwise 0.
+@end deftypefn
+
+There is also a complete group of higher level functions which
+correspond directly to comparison operators.  They implement the ISO C
+semantics for floating-point comparisons, taking NaN into account.
+Pay careful attention to the return values defined for each set.
+Under the hood, all of these routines are implemented as
+
+@smallexample
+  if (__unord@var{X}f2 (a, b))
+    return @var{E};
+  return __cmp@var{X}f2 (a, b);
+@end smallexample
+
+@noindent
+where @var{E} is a constant chosen to give the proper behavior for
+NaN@.  Thus, the meaning of the return value is different for each set.
+Do not rely on this implementation; only the semantics documented
+below are guaranteed.
+
+@deftypefn {Runtime Function} int __eqsf2 (float @var{a}, float @var{b})
+@deftypefnx {Runtime Function} int __eqdf2 (double @var{a}, double @var{b})
+@deftypefnx {Runtime Function} int __eqtf2 (long double @var{a}, long double @var{b})
+These functions return zero if neither argument is NaN, and @var{a} and
+@var{b} are equal.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __nesf2 (float @var{a}, float @var{b})
+@deftypefnx {Runtime Function} int __nedf2 (double @var{a}, double @var{b})
+@deftypefnx {Runtime Function} int __netf2 (long double @var{a}, long double @var{b})
+These functions return a nonzero value if either argument is NaN, or
+if @var{a} and @var{b} are unequal.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __gesf2 (float @var{a}, float @var{b})
+@deftypefnx {Runtime Function} int __gedf2 (double @var{a}, double @var{b})
+@deftypefnx {Runtime Function} int __getf2 (long double @var{a}, long double @var{b})
+These functions return a value greater than or equal to zero if
+neither argument is NaN, and @var{a} is greater than or equal to
+@var{b}.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __ltsf2 (float @var{a}, float @var{b})
+@deftypefnx {Runtime Function} int __ltdf2 (double @var{a}, double @var{b})
+@deftypefnx {Runtime Function} int __lttf2 (long double @var{a}, long double @var{b})
+These functions return a value less than zero if neither argument is
+NaN, and @var{a} is strictly less than @var{b}.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __lesf2 (float @var{a}, float @var{b})
+@deftypefnx {Runtime Function} int __ledf2 (double @var{a}, double @var{b})
+@deftypefnx {Runtime Function} int __letf2 (long double @var{a}, long double @var{b})
+These functions return a value less than or equal to zero if neither
+argument is NaN, and @var{a} is less than or equal to @var{b}.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __gtsf2 (float @var{a}, float @var{b})
+@deftypefnx {Runtime Function} int __gtdf2 (double @var{a}, double @var{b})
+@deftypefnx {Runtime Function} int __gttf2 (long double @var{a}, long double @var{b})
+These functions return a value greater than zero if neither argument
+is NaN, and @var{a} is strictly greater than @var{b}.
+@end deftypefn
+
+@subsection Other floating-point functions
+
+@deftypefn {Runtime Function} float __powisf2 (float @var{a}, int @var{b})
+@deftypefnx {Runtime Function} double __powidf2 (double @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {long double} __powitf2 (long double @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {long double} __powixf2 (long double @var{a}, int @var{b})
+These functions convert raise @var{a} to the power @var{b}.
+@end deftypefn
+
+@deftypefn {Runtime Function} {complex float} __mulsc3 (float @var{a}, float @var{b}, float @var{c}, float @var{d})
+@deftypefnx {Runtime Function} {complex double} __muldc3 (double @var{a}, double @var{b}, double @var{c}, double @var{d})
+@deftypefnx {Runtime Function} {complex long double} __multc3 (long double @var{a}, long double @var{b}, long double @var{c}, long double @var{d})
+@deftypefnx {Runtime Function} {complex long double} __mulxc3 (long double @var{a}, long double @var{b}, long double @var{c}, long double @var{d})
+These functions return the product of @math{@var{a} + i@var{b}} and
+@math{@var{c} + i@var{d}}, following the rules of C99 Annex G@.
+@end deftypefn
+
+@deftypefn {Runtime Function} {complex float} __divsc3 (float @var{a}, float @var{b}, float @var{c}, float @var{d})
+@deftypefnx {Runtime Function} {complex double} __divdc3 (double @var{a}, double @var{b}, double @var{c}, double @var{d})
+@deftypefnx {Runtime Function} {complex long double} __divtc3 (long double @var{a}, long double @var{b}, long double @var{c}, long double @var{d})
+@deftypefnx {Runtime Function} {complex long double} __divxc3 (long double @var{a}, long double @var{b}, long double @var{c}, long double @var{d})
+These functions return the quotient of @math{@var{a} + i@var{b}} and
+@math{@var{c} + i@var{d}} (i.e., @math{(@var{a} + i@var{b}) / (@var{c}
++ i@var{d})}), following the rules of C99 Annex G@.
+@end deftypefn
+
+@node Decimal float library routines
+@section Routines for decimal floating point emulation
+@cindex decimal float library
+@cindex IEEE 754-2008
+
+The software decimal floating point library implements IEEE 754-2008
+decimal floating point arithmetic and is only activated on selected
+targets.
+
+The software decimal floating point library supports either DPD 
+(Densely Packed Decimal) or BID (Binary Integer Decimal) encoding 
+as selected at configure time.
+
+
+@subsection Arithmetic functions
+
+@deftypefn {Runtime Function} _Decimal32 __dpd_addsd3 (_Decimal32 @var{a}, _Decimal32 @var{b})
+@deftypefnx {Runtime Function} _Decimal32 __bid_addsd3 (_Decimal32 @var{a}, _Decimal32 @var{b})
+@deftypefnx {Runtime Function} _Decimal64 __dpd_adddd3 (_Decimal64 @var{a}, _Decimal64 @var{b})
+@deftypefnx {Runtime Function} _Decimal64 __bid_adddd3 (_Decimal64 @var{a}, _Decimal64 @var{b})
+@deftypefnx {Runtime Function} _Decimal128 __dpd_addtd3 (_Decimal128 @var{a}, _Decimal128 @var{b})
+@deftypefnx {Runtime Function} _Decimal128 __bid_addtd3 (_Decimal128 @var{a}, _Decimal128 @var{b})
+These functions return the sum of @var{a} and @var{b}.
+@end deftypefn
+
+@deftypefn {Runtime Function} _Decimal32 __dpd_subsd3 (_Decimal32 @var{a}, _Decimal32 @var{b})
+@deftypefnx {Runtime Function} _Decimal32 __bid_subsd3 (_Decimal32 @var{a}, _Decimal32 @var{b})
+@deftypefnx {Runtime Function} _Decimal64 __dpd_subdd3 (_Decimal64 @var{a}, _Decimal64 @var{b})
+@deftypefnx {Runtime Function} _Decimal64 __bid_subdd3 (_Decimal64 @var{a}, _Decimal64 @var{b})
+@deftypefnx {Runtime Function} _Decimal128 __dpd_subtd3 (_Decimal128 @var{a}, _Decimal128 @var{b})
+@deftypefnx {Runtime Function} _Decimal128 __bid_subtd3 (_Decimal128 @var{a}, _Decimal128 @var{b})
+These functions return the difference between @var{b} and @var{a};
+that is, @w{@math{@var{a} - @var{b}}}.
+@end deftypefn
+
+@deftypefn {Runtime Function} _Decimal32 __dpd_mulsd3 (_Decimal32 @var{a}, _Decimal32 @var{b})
+@deftypefnx {Runtime Function} _Decimal32 __bid_mulsd3 (_Decimal32 @var{a}, _Decimal32 @var{b})
+@deftypefnx {Runtime Function} _Decimal64 __dpd_muldd3 (_Decimal64 @var{a}, _Decimal64 @var{b})
+@deftypefnx {Runtime Function} _Decimal64 __bid_muldd3 (_Decimal64 @var{a}, _Decimal64 @var{b})
+@deftypefnx {Runtime Function} _Decimal128 __dpd_multd3 (_Decimal128 @var{a}, _Decimal128 @var{b})
+@deftypefnx {Runtime Function} _Decimal128 __bid_multd3 (_Decimal128 @var{a}, _Decimal128 @var{b})
+These functions return the product of @var{a} and @var{b}.
+@end deftypefn
+
+@deftypefn {Runtime Function} _Decimal32 __dpd_divsd3 (_Decimal32 @var{a}, _Decimal32 @var{b})
+@deftypefnx {Runtime Function} _Decimal32 __bid_divsd3 (_Decimal32 @var{a}, _Decimal32 @var{b})
+@deftypefnx {Runtime Function} _Decimal64 __dpd_divdd3 (_Decimal64 @var{a}, _Decimal64 @var{b})
+@deftypefnx {Runtime Function} _Decimal64 __bid_divdd3 (_Decimal64 @var{a}, _Decimal64 @var{b})
+@deftypefnx {Runtime Function} _Decimal128 __dpd_divtd3 (_Decimal128 @var{a}, _Decimal128 @var{b})
+@deftypefnx {Runtime Function} _Decimal128 __bid_divtd3 (_Decimal128 @var{a}, _Decimal128 @var{b})
+These functions return the quotient of @var{a} and @var{b}; that is,
+@w{@math{@var{a} / @var{b}}}.
+@end deftypefn
+
+@deftypefn {Runtime Function} _Decimal32 __dpd_negsd2 (_Decimal32 @var{a})
+@deftypefnx {Runtime Function} _Decimal32 __bid_negsd2 (_Decimal32 @var{a})
+@deftypefnx {Runtime Function} _Decimal64 __dpd_negdd2 (_Decimal64 @var{a})
+@deftypefnx {Runtime Function} _Decimal64 __bid_negdd2 (_Decimal64 @var{a})
+@deftypefnx {Runtime Function} _Decimal128 __dpd_negtd2 (_Decimal128 @var{a})
+@deftypefnx {Runtime Function} _Decimal128 __bid_negtd2 (_Decimal128 @var{a})
+These functions return the negation of @var{a}.  They simply flip the
+sign bit, so they can produce negative zero and negative NaN@.
+@end deftypefn
+
+@subsection Conversion functions
+
+@deftypefn {Runtime Function} _Decimal64 __dpd_extendsddd2 (_Decimal32 @var{a})
+@deftypefnx {Runtime Function} _Decimal64 __bid_extendsddd2 (_Decimal32 @var{a})
+@deftypefnx {Runtime Function} _Decimal128 __dpd_extendsdtd2 (_Decimal32 @var{a})
+@deftypefnx {Runtime Function} _Decimal128 __bid_extendsdtd2 (_Decimal32 @var{a})
+@deftypefnx {Runtime Function} _Decimal128 __dpd_extendddtd2 (_Decimal64 @var{a})
+@deftypefnx {Runtime Function} _Decimal128 __bid_extendddtd2 (_Decimal64 @var{a})
+@deftypefnx {Runtime Function} _Decimal32 __dpd_truncddsd2 (_Decimal64 @var{a})
+@deftypefnx {Runtime Function} _Decimal32 __bid_truncddsd2 (_Decimal64 @var{a})
+@deftypefnx {Runtime Function} _Decimal32 __dpd_trunctdsd2 (_Decimal128 @var{a})
+@deftypefnx {Runtime Function} _Decimal32 __bid_trunctdsd2 (_Decimal128 @var{a})
+@deftypefnx {Runtime Function} _Decimal64 __dpd_trunctddd2 (_Decimal128 @var{a})
+@deftypefnx {Runtime Function} _Decimal64 __bid_trunctddd2 (_Decimal128 @var{a})
+These functions convert the value @var{a} from one decimal floating type
+to another.
+@end deftypefn
+
+@deftypefn {Runtime Function} _Decimal64 __dpd_extendsfdd (float @var{a})
+@deftypefnx {Runtime Function} _Decimal64 __bid_extendsfdd (float @var{a})
+@deftypefnx {Runtime Function} _Decimal128 __dpd_extendsftd (float @var{a})
+@deftypefnx {Runtime Function} _Decimal128 __bid_extendsftd (float @var{a})
+@deftypefnx {Runtime Function} _Decimal128 __dpd_extenddftd (double @var{a})
+@deftypefnx {Runtime Function} _Decimal128 __bid_extenddftd (double @var{a})
+@deftypefnx {Runtime Function} _Decimal128 __dpd_extendxftd ({long double} @var{a})
+@deftypefnx {Runtime Function} _Decimal128 __bid_extendxftd ({long double} @var{a})
+@deftypefnx {Runtime Function} _Decimal32 __dpd_truncdfsd (double @var{a})
+@deftypefnx {Runtime Function} _Decimal32 __bid_truncdfsd (double @var{a})
+@deftypefnx {Runtime Function} _Decimal32 __dpd_truncxfsd ({long double} @var{a})
+@deftypefnx {Runtime Function} _Decimal32 __bid_truncxfsd ({long double} @var{a})
+@deftypefnx {Runtime Function} _Decimal32 __dpd_trunctfsd ({long double} @var{a})
+@deftypefnx {Runtime Function} _Decimal32 __bid_trunctfsd ({long double} @var{a})
+@deftypefnx {Runtime Function} _Decimal64 __dpd_truncxfdd ({long double} @var{a})
+@deftypefnx {Runtime Function} _Decimal64 __bid_truncxfdd ({long double} @var{a})
+@deftypefnx {Runtime Function} _Decimal64 __dpd_trunctfdd ({long double} @var{a})
+@deftypefnx {Runtime Function} _Decimal64 __bid_trunctfdd ({long double} @var{a})
+These functions convert the value of @var{a} from a binary floating type
+to a decimal floating type of a different size.
+@end deftypefn
+
+@deftypefn {Runtime Function} float __dpd_truncddsf (_Decimal64 @var{a})
+@deftypefnx {Runtime Function} float __bid_truncddsf (_Decimal64 @var{a})
+@deftypefnx {Runtime Function} float __dpd_trunctdsf (_Decimal128 @var{a})
+@deftypefnx {Runtime Function} float __bid_trunctdsf (_Decimal128 @var{a})
+@deftypefnx {Runtime Function} double __dpd_extendsddf (_Decimal32 @var{a})
+@deftypefnx {Runtime Function} double __bid_extendsddf (_Decimal32 @var{a})
+@deftypefnx {Runtime Function} double __dpd_trunctddf (_Decimal128 @var{a})
+@deftypefnx {Runtime Function} double __bid_trunctddf (_Decimal128 @var{a})
+@deftypefnx {Runtime Function} {long double} __dpd_extendsdxf (_Decimal32 @var{a})
+@deftypefnx {Runtime Function} {long double} __bid_extendsdxf (_Decimal32 @var{a})
+@deftypefnx {Runtime Function} {long double} __dpd_extendddxf (_Decimal64 @var{a})
+@deftypefnx {Runtime Function} {long double} __bid_extendddxf (_Decimal64 @var{a})
+@deftypefnx {Runtime Function} {long double} __dpd_trunctdxf (_Decimal128 @var{a})
+@deftypefnx {Runtime Function} {long double} __bid_trunctdxf (_Decimal128 @var{a})
+@deftypefnx {Runtime Function} {long double} __dpd_extendsdtf (_Decimal32 @var{a})
+@deftypefnx {Runtime Function} {long double} __bid_extendsdtf (_Decimal32 @var{a})
+@deftypefnx {Runtime Function} {long double} __dpd_extendddtf (_Decimal64 @var{a})
+@deftypefnx {Runtime Function} {long double} __bid_extendddtf (_Decimal64 @var{a})
+These functions convert the value of @var{a} from a decimal floating type
+to a binary floating type of a different size.
+@end deftypefn
+
+@deftypefn {Runtime Function} _Decimal32 __dpd_extendsfsd (float @var{a})
+@deftypefnx {Runtime Function} _Decimal32 __bid_extendsfsd (float @var{a})
+@deftypefnx {Runtime Function} _Decimal64 __dpd_extenddfdd (double @var{a})
+@deftypefnx {Runtime Function} _Decimal64 __bid_extenddfdd (double @var{a})
+@deftypefnx {Runtime Function} _Decimal128 __dpd_extendtftd ({long double} @var{a})
+@deftypefnx {Runtime Function} _Decimal128 __bid_extendtftd ({long double} @var{a})
+@deftypefnx {Runtime Function} float __dpd_truncsdsf (_Decimal32 @var{a})
+@deftypefnx {Runtime Function} float __bid_truncsdsf (_Decimal32 @var{a})
+@deftypefnx {Runtime Function} double __dpd_truncdddf (_Decimal64 @var{a})
+@deftypefnx {Runtime Function} double __bid_truncdddf (_Decimal64 @var{a})
+@deftypefnx {Runtime Function} {long double} __dpd_trunctdtf (_Decimal128 @var{a})
+@deftypefnx {Runtime Function} {long double} __bid_trunctdtf (_Decimal128 @var{a})
+These functions convert the value of @var{a} between decimal and
+binary floating types of the same size.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __dpd_fixsdsi (_Decimal32 @var{a})
+@deftypefnx {Runtime Function} int __bid_fixsdsi (_Decimal32 @var{a})
+@deftypefnx {Runtime Function} int __dpd_fixddsi (_Decimal64 @var{a})
+@deftypefnx {Runtime Function} int __bid_fixddsi (_Decimal64 @var{a})
+@deftypefnx {Runtime Function} int __dpd_fixtdsi (_Decimal128 @var{a})
+@deftypefnx {Runtime Function} int __bid_fixtdsi (_Decimal128 @var{a})
+These functions convert @var{a} to a signed integer.
+@end deftypefn
+
+@deftypefn {Runtime Function} long __dpd_fixsddi (_Decimal32 @var{a})
+@deftypefnx {Runtime Function} long __bid_fixsddi (_Decimal32 @var{a})
+@deftypefnx {Runtime Function} long __dpd_fixdddi (_Decimal64 @var{a})
+@deftypefnx {Runtime Function} long __bid_fixdddi (_Decimal64 @var{a})
+@deftypefnx {Runtime Function} long __dpd_fixtddi (_Decimal128 @var{a})
+@deftypefnx {Runtime Function} long __bid_fixtddi (_Decimal128 @var{a})
+These functions convert @var{a} to a signed long.
+@end deftypefn
+
+@deftypefn {Runtime Function} {unsigned int} __dpd_fixunssdsi (_Decimal32 @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __bid_fixunssdsi (_Decimal32 @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __dpd_fixunsddsi (_Decimal64 @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __bid_fixunsddsi (_Decimal64 @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __dpd_fixunstdsi (_Decimal128 @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __bid_fixunstdsi (_Decimal128 @var{a})
+These functions convert @var{a} to an unsigned integer.  Negative values all become zero.
+@end deftypefn
+
+@deftypefn {Runtime Function} {unsigned long} __dpd_fixunssddi (_Decimal32 @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __bid_fixunssddi (_Decimal32 @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __dpd_fixunsdddi (_Decimal64 @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __bid_fixunsdddi (_Decimal64 @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __dpd_fixunstddi (_Decimal128 @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __bid_fixunstddi (_Decimal128 @var{a})
+These functions convert @var{a} to an unsigned long.  Negative values
+all become zero.
+@end deftypefn
+
+@deftypefn {Runtime Function} _Decimal32 __dpd_floatsisd (int @var{i})
+@deftypefnx {Runtime Function} _Decimal32 __bid_floatsisd (int @var{i})
+@deftypefnx {Runtime Function} _Decimal64 __dpd_floatsidd (int @var{i})
+@deftypefnx {Runtime Function} _Decimal64 __bid_floatsidd (int @var{i})
+@deftypefnx {Runtime Function} _Decimal128 __dpd_floatsitd (int @var{i})
+@deftypefnx {Runtime Function} _Decimal128 __bid_floatsitd (int @var{i})
+These functions convert @var{i}, a signed integer, to decimal floating point.
+@end deftypefn
+
+@deftypefn {Runtime Function} _Decimal32 __dpd_floatdisd (long @var{i})
+@deftypefnx {Runtime Function} _Decimal32 __bid_floatdisd (long @var{i})
+@deftypefnx {Runtime Function} _Decimal64 __dpd_floatdidd (long @var{i})
+@deftypefnx {Runtime Function} _Decimal64 __bid_floatdidd (long @var{i})
+@deftypefnx {Runtime Function} _Decimal128 __dpd_floatditd (long @var{i})
+@deftypefnx {Runtime Function} _Decimal128 __bid_floatditd (long @var{i})
+These functions convert @var{i}, a signed long, to decimal floating point.
+@end deftypefn
+
+@deftypefn {Runtime Function} _Decimal32 __dpd_floatunssisd (unsigned int @var{i})
+@deftypefnx {Runtime Function} _Decimal32 __bid_floatunssisd (unsigned int @var{i})
+@deftypefnx {Runtime Function} _Decimal64 __dpd_floatunssidd (unsigned int @var{i})
+@deftypefnx {Runtime Function} _Decimal64 __bid_floatunssidd (unsigned int @var{i})
+@deftypefnx {Runtime Function} _Decimal128 __dpd_floatunssitd (unsigned int @var{i})
+@deftypefnx {Runtime Function} _Decimal128 __bid_floatunssitd (unsigned int @var{i})
+These functions convert @var{i}, an unsigned integer, to decimal floating point.
+@end deftypefn
+
+@deftypefn {Runtime Function} _Decimal32 __dpd_floatunsdisd (unsigned long @var{i})
+@deftypefnx {Runtime Function} _Decimal32 __bid_floatunsdisd (unsigned long @var{i})
+@deftypefnx {Runtime Function} _Decimal64 __dpd_floatunsdidd (unsigned long @var{i})
+@deftypefnx {Runtime Function} _Decimal64 __bid_floatunsdidd (unsigned long @var{i})
+@deftypefnx {Runtime Function} _Decimal128 __dpd_floatunsditd (unsigned long @var{i})
+@deftypefnx {Runtime Function} _Decimal128 __bid_floatunsditd (unsigned long @var{i})
+These functions convert @var{i}, an unsigned long, to decimal floating point.
+@end deftypefn
+
+@subsection Comparison functions
+
+@deftypefn {Runtime Function} int __dpd_unordsd2 (_Decimal32 @var{a}, _Decimal32 @var{b})
+@deftypefnx {Runtime Function} int __bid_unordsd2 (_Decimal32 @var{a}, _Decimal32 @var{b})
+@deftypefnx {Runtime Function} int __dpd_unorddd2 (_Decimal64 @var{a}, _Decimal64 @var{b})
+@deftypefnx {Runtime Function} int __bid_unorddd2 (_Decimal64 @var{a}, _Decimal64 @var{b})
+@deftypefnx {Runtime Function} int __dpd_unordtd2 (_Decimal128 @var{a}, _Decimal128 @var{b})
+@deftypefnx {Runtime Function} int __bid_unordtd2 (_Decimal128 @var{a}, _Decimal128 @var{b})
+These functions return a nonzero value if either argument is NaN, otherwise 0.
+@end deftypefn
+
+There is also a complete group of higher level functions which
+correspond directly to comparison operators.  They implement the ISO C
+semantics for floating-point comparisons, taking NaN into account.
+Pay careful attention to the return values defined for each set.
+Under the hood, all of these routines are implemented as
+
+@smallexample
+  if (__bid_unord@var{X}d2 (a, b))
+    return @var{E};
+  return __bid_cmp@var{X}d2 (a, b);
+@end smallexample
+
+@noindent
+where @var{E} is a constant chosen to give the proper behavior for
+NaN@.  Thus, the meaning of the return value is different for each set.
+Do not rely on this implementation; only the semantics documented
+below are guaranteed.
+
+@deftypefn {Runtime Function} int __dpd_eqsd2 (_Decimal32 @var{a}, _Decimal32 @var{b})
+@deftypefnx {Runtime Function} int __bid_eqsd2 (_Decimal32 @var{a}, _Decimal32 @var{b})
+@deftypefnx {Runtime Function} int __dpd_eqdd2 (_Decimal64 @var{a}, _Decimal64 @var{b})
+@deftypefnx {Runtime Function} int __bid_eqdd2 (_Decimal64 @var{a}, _Decimal64 @var{b})
+@deftypefnx {Runtime Function} int __dpd_eqtd2 (_Decimal128 @var{a}, _Decimal128 @var{b})
+@deftypefnx {Runtime Function} int __bid_eqtd2 (_Decimal128 @var{a}, _Decimal128 @var{b})
+These functions return zero if neither argument is NaN, and @var{a} and
+@var{b} are equal.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __dpd_nesd2 (_Decimal32 @var{a}, _Decimal32 @var{b})
+@deftypefnx {Runtime Function} int __bid_nesd2 (_Decimal32 @var{a}, _Decimal32 @var{b})
+@deftypefnx {Runtime Function} int __dpd_nedd2 (_Decimal64 @var{a}, _Decimal64 @var{b})
+@deftypefnx {Runtime Function} int __bid_nedd2 (_Decimal64 @var{a}, _Decimal64 @var{b})
+@deftypefnx {Runtime Function} int __dpd_netd2 (_Decimal128 @var{a}, _Decimal128 @var{b})
+@deftypefnx {Runtime Function} int __bid_netd2 (_Decimal128 @var{a}, _Decimal128 @var{b})
+These functions return a nonzero value if either argument is NaN, or
+if @var{a} and @var{b} are unequal.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __dpd_gesd2 (_Decimal32 @var{a}, _Decimal32 @var{b})
+@deftypefnx {Runtime Function} int __bid_gesd2 (_Decimal32 @var{a}, _Decimal32 @var{b})
+@deftypefnx {Runtime Function} int __dpd_gedd2 (_Decimal64 @var{a}, _Decimal64 @var{b})
+@deftypefnx {Runtime Function} int __bid_gedd2 (_Decimal64 @var{a}, _Decimal64 @var{b})
+@deftypefnx {Runtime Function} int __dpd_getd2 (_Decimal128 @var{a}, _Decimal128 @var{b})
+@deftypefnx {Runtime Function} int __bid_getd2 (_Decimal128 @var{a}, _Decimal128 @var{b})
+These functions return a value greater than or equal to zero if
+neither argument is NaN, and @var{a} is greater than or equal to
+@var{b}.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __dpd_ltsd2 (_Decimal32 @var{a}, _Decimal32 @var{b})
+@deftypefnx {Runtime Function} int __bid_ltsd2 (_Decimal32 @var{a}, _Decimal32 @var{b})
+@deftypefnx {Runtime Function} int __dpd_ltdd2 (_Decimal64 @var{a}, _Decimal64 @var{b})
+@deftypefnx {Runtime Function} int __bid_ltdd2 (_Decimal64 @var{a}, _Decimal64 @var{b})
+@deftypefnx {Runtime Function} int __dpd_lttd2 (_Decimal128 @var{a}, _Decimal128 @var{b})
+@deftypefnx {Runtime Function} int __bid_lttd2 (_Decimal128 @var{a}, _Decimal128 @var{b})
+These functions return a value less than zero if neither argument is
+NaN, and @var{a} is strictly less than @var{b}.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __dpd_lesd2 (_Decimal32 @var{a}, _Decimal32 @var{b})
+@deftypefnx {Runtime Function} int __bid_lesd2 (_Decimal32 @var{a}, _Decimal32 @var{b})
+@deftypefnx {Runtime Function} int __dpd_ledd2 (_Decimal64 @var{a}, _Decimal64 @var{b})
+@deftypefnx {Runtime Function} int __bid_ledd2 (_Decimal64 @var{a}, _Decimal64 @var{b})
+@deftypefnx {Runtime Function} int __dpd_letd2 (_Decimal128 @var{a}, _Decimal128 @var{b})
+@deftypefnx {Runtime Function} int __bid_letd2 (_Decimal128 @var{a}, _Decimal128 @var{b})
+These functions return a value less than or equal to zero if neither
+argument is NaN, and @var{a} is less than or equal to @var{b}.
+@end deftypefn
+
+@deftypefn {Runtime Function} int __dpd_gtsd2 (_Decimal32 @var{a}, _Decimal32 @var{b})
+@deftypefnx {Runtime Function} int __bid_gtsd2 (_Decimal32 @var{a}, _Decimal32 @var{b})
+@deftypefnx {Runtime Function} int __dpd_gtdd2 (_Decimal64 @var{a}, _Decimal64 @var{b})
+@deftypefnx {Runtime Function} int __bid_gtdd2 (_Decimal64 @var{a}, _Decimal64 @var{b})
+@deftypefnx {Runtime Function} int __dpd_gttd2 (_Decimal128 @var{a}, _Decimal128 @var{b})
+@deftypefnx {Runtime Function} int __bid_gttd2 (_Decimal128 @var{a}, _Decimal128 @var{b})
+These functions return a value greater than zero if neither argument
+is NaN, and @var{a} is strictly greater than @var{b}.
+@end deftypefn
+
+@node Fixed-point fractional library routines
+@section Routines for fixed-point fractional emulation
+@cindex fixed-point fractional library
+@cindex fractional types
+@cindex Embedded C
+
+The software fixed-point library implements fixed-point fractional
+arithmetic, and is only activated on selected targets.
+
+For ease of comprehension @code{fract} is an alias for the
+@code{_Fract} type, @code{accum} an alias for @code{_Accum}, and
+@code{sat} an alias for @code{_Sat}.
+
+For illustrative purposes, in this section the fixed-point fractional type
+@code{@w{short fract}} is assumed to correspond to machine mode @code{QQmode};
+@code{@w{unsigned short fract}} to @code{UQQmode};
+@code{fract} to @code{HQmode};
+@code{@w{unsigned fract}} to @code{UHQmode};
+@code{@w{long fract}} to @code{SQmode};
+@code{@w{unsigned long fract}} to @code{USQmode};
+@code{@w{long long fract}} to @code{DQmode};
+and @code{@w{unsigned long long fract}} to @code{UDQmode}.
+Similarly the fixed-point accumulator type
+@code{@w{short accum}} corresponds to @code{HAmode};
+@code{@w{unsigned short accum}} to @code{UHAmode};
+@code{accum} to @code{SAmode};
+@code{@w{unsigned accum}} to @code{USAmode};
+@code{@w{long accum}} to @code{DAmode};
+@code{@w{unsigned long accum}} to @code{UDAmode};
+@code{@w{long long accum}} to @code{TAmode};
+and @code{@w{unsigned long long accum}} to @code{UTAmode}.
+
+@subsection Arithmetic functions
+
+@deftypefn {Runtime Function} {short fract} __addqq3 (short fract @var{a}, short fract @var{b})
+@deftypefnx {Runtime Function} {fract} __addhq3 (fract @var{a}, fract @var{b})
+@deftypefnx {Runtime Function} {long fract} __addsq3 (long fract @var{a}, long fract @var{b})
+@deftypefnx {Runtime Function} {long long fract} __adddq3 (long long fract @var{a}, long long fract @var{b})
+@deftypefnx {Runtime Function} {unsigned short fract} __adduqq3 (unsigned short fract @var{a}, unsigned short fract @var{b})
+@deftypefnx {Runtime Function} {unsigned fract} __adduhq3 (unsigned fract @var{a}, unsigned fract @var{b})
+@deftypefnx {Runtime Function} {unsigned long fract} __addusq3 (unsigned long fract @var{a}, unsigned long fract @var{b})
+@deftypefnx {Runtime Function} {unsigned long long fract} __addudq3 (unsigned long long fract @var{a}, unsigned long long fract @var{b})
+@deftypefnx {Runtime Function} {short accum} __addha3 (short accum @var{a}, short accum @var{b})
+@deftypefnx {Runtime Function} {accum} __addsa3 (accum @var{a}, accum @var{b})
+@deftypefnx {Runtime Function} {long accum} __addda3 (long accum @var{a}, long accum @var{b})
+@deftypefnx {Runtime Function} {long long accum} __addta3 (long long accum @var{a}, long long accum @var{b})
+@deftypefnx {Runtime Function} {unsigned short accum} __adduha3 (unsigned short accum @var{a}, unsigned short accum @var{b})
+@deftypefnx {Runtime Function} {unsigned accum} __addusa3 (unsigned accum @var{a}, unsigned accum @var{b})
+@deftypefnx {Runtime Function} {unsigned long accum} __adduda3 (unsigned long accum @var{a}, unsigned long accum @var{b})
+@deftypefnx {Runtime Function} {unsigned long long accum} __adduta3 (unsigned long long accum @var{a}, unsigned long long accum @var{b})
+These functions return the sum of @var{a} and @var{b}.
+@end deftypefn
+
+@deftypefn {Runtime Function} {short fract} __ssaddqq3 (short fract @var{a}, short fract @var{b})
+@deftypefnx {Runtime Function} {fract} __ssaddhq3 (fract @var{a}, fract @var{b})
+@deftypefnx {Runtime Function} {long fract} __ssaddsq3 (long fract @var{a}, long fract @var{b})
+@deftypefnx {Runtime Function} {long long fract} __ssadddq3 (long long fract @var{a}, long long fract @var{b})
+@deftypefnx {Runtime Function} {short accum} __ssaddha3 (short accum @var{a}, short accum @var{b})
+@deftypefnx {Runtime Function} {accum} __ssaddsa3 (accum @var{a}, accum @var{b})
+@deftypefnx {Runtime Function} {long accum} __ssaddda3 (long accum @var{a}, long accum @var{b})
+@deftypefnx {Runtime Function} {long long accum} __ssaddta3 (long long accum @var{a}, long long accum @var{b})
+These functions return the sum of @var{a} and @var{b} with signed saturation.
+@end deftypefn
+
+@deftypefn {Runtime Function} {unsigned short fract} __usadduqq3 (unsigned short fract @var{a}, unsigned short fract @var{b})
+@deftypefnx {Runtime Function} {unsigned fract} __usadduhq3 (unsigned fract @var{a}, unsigned fract @var{b})
+@deftypefnx {Runtime Function} {unsigned long fract} __usaddusq3 (unsigned long fract @var{a}, unsigned long fract @var{b})
+@deftypefnx {Runtime Function} {unsigned long long fract} __usaddudq3 (unsigned long long fract @var{a}, unsigned long long fract @var{b})
+@deftypefnx {Runtime Function} {unsigned short accum} __usadduha3 (unsigned short accum @var{a}, unsigned short accum @var{b})
+@deftypefnx {Runtime Function} {unsigned accum} __usaddusa3 (unsigned accum @var{a}, unsigned accum @var{b})
+@deftypefnx {Runtime Function} {unsigned long accum} __usadduda3 (unsigned long accum @var{a}, unsigned long accum @var{b})
+@deftypefnx {Runtime Function} {unsigned long long accum} __usadduta3 (unsigned long long accum @var{a}, unsigned long long accum @var{b})
+These functions return the sum of @var{a} and @var{b} with unsigned saturation.
+@end deftypefn
+
+@deftypefn {Runtime Function} {short fract} __subqq3 (short fract @var{a}, short fract @var{b})
+@deftypefnx {Runtime Function} {fract} __subhq3 (fract @var{a}, fract @var{b})
+@deftypefnx {Runtime Function} {long fract} __subsq3 (long fract @var{a}, long fract @var{b})
+@deftypefnx {Runtime Function} {long long fract} __subdq3 (long long fract @var{a}, long long fract @var{b})
+@deftypefnx {Runtime Function} {unsigned short fract} __subuqq3 (unsigned short fract @var{a}, unsigned short fract @var{b})
+@deftypefnx {Runtime Function} {unsigned fract} __subuhq3 (unsigned fract @var{a}, unsigned fract @var{b})
+@deftypefnx {Runtime Function} {unsigned long fract} __subusq3 (unsigned long fract @var{a}, unsigned long fract @var{b})
+@deftypefnx {Runtime Function} {unsigned long long fract} __subudq3 (unsigned long long fract @var{a}, unsigned long long fract @var{b})
+@deftypefnx {Runtime Function} {short accum} __subha3 (short accum @var{a}, short accum @var{b})
+@deftypefnx {Runtime Function} {accum} __subsa3 (accum @var{a}, accum @var{b})
+@deftypefnx {Runtime Function} {long accum} __subda3 (long accum @var{a}, long accum @var{b})
+@deftypefnx {Runtime Function} {long long accum} __subta3 (long long accum @var{a}, long long accum @var{b})
+@deftypefnx {Runtime Function} {unsigned short accum} __subuha3 (unsigned short accum @var{a}, unsigned short accum @var{b})
+@deftypefnx {Runtime Function} {unsigned accum} __subusa3 (unsigned accum @var{a}, unsigned accum @var{b})
+@deftypefnx {Runtime Function} {unsigned long accum} __subuda3 (unsigned long accum @var{a}, unsigned long accum @var{b})
+@deftypefnx {Runtime Function} {unsigned long long accum} __subuta3 (unsigned long long accum @var{a}, unsigned long long accum @var{b})
+These functions return the difference of @var{a} and @var{b};
+that is, @code{@var{a} - @var{b}}.
+@end deftypefn
+
+@deftypefn {Runtime Function} {short fract} __sssubqq3 (short fract @var{a}, short fract @var{b})
+@deftypefnx {Runtime Function} {fract} __sssubhq3 (fract @var{a}, fract @var{b})
+@deftypefnx {Runtime Function} {long fract} __sssubsq3 (long fract @var{a}, long fract @var{b})
+@deftypefnx {Runtime Function} {long long fract} __sssubdq3 (long long fract @var{a}, long long fract @var{b})
+@deftypefnx {Runtime Function} {short accum} __sssubha3 (short accum @var{a}, short accum @var{b})
+@deftypefnx {Runtime Function} {accum} __sssubsa3 (accum @var{a}, accum @var{b})
+@deftypefnx {Runtime Function} {long accum} __sssubda3 (long accum @var{a}, long accum @var{b})
+@deftypefnx {Runtime Function} {long long accum} __sssubta3 (long long accum @var{a}, long long accum @var{b})
+These functions return the difference of @var{a} and @var{b} with signed
+saturation;  that is, @code{@var{a} - @var{b}}.
+@end deftypefn
+
+@deftypefn {Runtime Function} {unsigned short fract} __ussubuqq3 (unsigned short fract @var{a}, unsigned short fract @var{b})
+@deftypefnx {Runtime Function} {unsigned fract} __ussubuhq3 (unsigned fract @var{a}, unsigned fract @var{b})
+@deftypefnx {Runtime Function} {unsigned long fract} __ussubusq3 (unsigned long fract @var{a}, unsigned long fract @var{b})
+@deftypefnx {Runtime Function} {unsigned long long fract} __ussubudq3 (unsigned long long fract @var{a}, unsigned long long fract @var{b})
+@deftypefnx {Runtime Function} {unsigned short accum} __ussubuha3 (unsigned short accum @var{a}, unsigned short accum @var{b})
+@deftypefnx {Runtime Function} {unsigned accum} __ussubusa3 (unsigned accum @var{a}, unsigned accum @var{b})
+@deftypefnx {Runtime Function} {unsigned long accum} __ussubuda3 (unsigned long accum @var{a}, unsigned long accum @var{b})
+@deftypefnx {Runtime Function} {unsigned long long accum} __ussubuta3 (unsigned long long accum @var{a}, unsigned long long accum @var{b})
+These functions return the difference of @var{a} and @var{b} with unsigned
+saturation;  that is, @code{@var{a} - @var{b}}.
+@end deftypefn
+
+@deftypefn {Runtime Function} {short fract} __mulqq3 (short fract @var{a}, short fract @var{b})
+@deftypefnx {Runtime Function} {fract} __mulhq3 (fract @var{a}, fract @var{b})
+@deftypefnx {Runtime Function} {long fract} __mulsq3 (long fract @var{a}, long fract @var{b})
+@deftypefnx {Runtime Function} {long long fract} __muldq3 (long long fract @var{a}, long long fract @var{b})
+@deftypefnx {Runtime Function} {unsigned short fract} __muluqq3 (unsigned short fract @var{a}, unsigned short fract @var{b})
+@deftypefnx {Runtime Function} {unsigned fract} __muluhq3 (unsigned fract @var{a}, unsigned fract @var{b})
+@deftypefnx {Runtime Function} {unsigned long fract} __mulusq3 (unsigned long fract @var{a}, unsigned long fract @var{b})
+@deftypefnx {Runtime Function} {unsigned long long fract} __muludq3 (unsigned long long fract @var{a}, unsigned long long fract @var{b})
+@deftypefnx {Runtime Function} {short accum} __mulha3 (short accum @var{a}, short accum @var{b})
+@deftypefnx {Runtime Function} {accum} __mulsa3 (accum @var{a}, accum @var{b})
+@deftypefnx {Runtime Function} {long accum} __mulda3 (long accum @var{a}, long accum @var{b})
+@deftypefnx {Runtime Function} {long long accum} __multa3 (long long accum @var{a}, long long accum @var{b})
+@deftypefnx {Runtime Function} {unsigned short accum} __muluha3 (unsigned short accum @var{a}, unsigned short accum @var{b})
+@deftypefnx {Runtime Function} {unsigned accum} __mulusa3 (unsigned accum @var{a}, unsigned accum @var{b})
+@deftypefnx {Runtime Function} {unsigned long accum} __muluda3 (unsigned long accum @var{a}, unsigned long accum @var{b})
+@deftypefnx {Runtime Function} {unsigned long long accum} __muluta3 (unsigned long long accum @var{a}, unsigned long long accum @var{b})
+These functions return the product of @var{a} and @var{b}.
+@end deftypefn
+
+@deftypefn {Runtime Function} {short fract} __ssmulqq3 (short fract @var{a}, short fract @var{b})
+@deftypefnx {Runtime Function} {fract} __ssmulhq3 (fract @var{a}, fract @var{b})
+@deftypefnx {Runtime Function} {long fract} __ssmulsq3 (long fract @var{a}, long fract @var{b})
+@deftypefnx {Runtime Function} {long long fract} __ssmuldq3 (long long fract @var{a}, long long fract @var{b})
+@deftypefnx {Runtime Function} {short accum} __ssmulha3 (short accum @var{a}, short accum @var{b})
+@deftypefnx {Runtime Function} {accum} __ssmulsa3 (accum @var{a}, accum @var{b})
+@deftypefnx {Runtime Function} {long accum} __ssmulda3 (long accum @var{a}, long accum @var{b})
+@deftypefnx {Runtime Function} {long long accum} __ssmulta3 (long long accum @var{a}, long long accum @var{b})
+These functions return the product of @var{a} and @var{b} with signed
+saturation.
+@end deftypefn
+
+@deftypefn {Runtime Function} {unsigned short fract} __usmuluqq3 (unsigned short fract @var{a}, unsigned short fract @var{b})
+@deftypefnx {Runtime Function} {unsigned fract} __usmuluhq3 (unsigned fract @var{a}, unsigned fract @var{b})
+@deftypefnx {Runtime Function} {unsigned long fract} __usmulusq3 (unsigned long fract @var{a}, unsigned long fract @var{b})
+@deftypefnx {Runtime Function} {unsigned long long fract} __usmuludq3 (unsigned long long fract @var{a}, unsigned long long fract @var{b})
+@deftypefnx {Runtime Function} {unsigned short accum} __usmuluha3 (unsigned short accum @var{a}, unsigned short accum @var{b})
+@deftypefnx {Runtime Function} {unsigned accum} __usmulusa3 (unsigned accum @var{a}, unsigned accum @var{b})
+@deftypefnx {Runtime Function} {unsigned long accum} __usmuluda3 (unsigned long accum @var{a}, unsigned long accum @var{b})
+@deftypefnx {Runtime Function} {unsigned long long accum} __usmuluta3 (unsigned long long accum @var{a}, unsigned long long accum @var{b})
+These functions return the product of @var{a} and @var{b} with unsigned
+saturation.
+@end deftypefn
+
+@deftypefn {Runtime Function} {short fract} __divqq3 (short fract @var{a}, short fract @var{b})
+@deftypefnx {Runtime Function} {fract} __divhq3 (fract @var{a}, fract @var{b})
+@deftypefnx {Runtime Function} {long fract} __divsq3 (long fract @var{a}, long fract @var{b})
+@deftypefnx {Runtime Function} {long long fract} __divdq3 (long long fract @var{a}, long long fract @var{b})
+@deftypefnx {Runtime Function} {short accum} __divha3 (short accum @var{a}, short accum @var{b})
+@deftypefnx {Runtime Function} {accum} __divsa3 (accum @var{a}, accum @var{b})
+@deftypefnx {Runtime Function} {long accum} __divda3 (long accum @var{a}, long accum @var{b})
+@deftypefnx {Runtime Function} {long long accum} __divta3 (long long accum @var{a}, long long accum @var{b})
+These functions return the quotient of the signed division of @var{a}
+and @var{b}.
+@end deftypefn
+
+@deftypefn {Runtime Function} {unsigned short fract} __udivuqq3 (unsigned short fract @var{a}, unsigned short fract @var{b})
+@deftypefnx {Runtime Function} {unsigned fract} __udivuhq3 (unsigned fract @var{a}, unsigned fract @var{b})
+@deftypefnx {Runtime Function} {unsigned long fract} __udivusq3 (unsigned long fract @var{a}, unsigned long fract @var{b})
+@deftypefnx {Runtime Function} {unsigned long long fract} __udivudq3 (unsigned long long fract @var{a}, unsigned long long fract @var{b})
+@deftypefnx {Runtime Function} {unsigned short accum} __udivuha3 (unsigned short accum @var{a}, unsigned short accum @var{b})
+@deftypefnx {Runtime Function} {unsigned accum} __udivusa3 (unsigned accum @var{a}, unsigned accum @var{b})
+@deftypefnx {Runtime Function} {unsigned long accum} __udivuda3 (unsigned long accum @var{a}, unsigned long accum @var{b})
+@deftypefnx {Runtime Function} {unsigned long long accum} __udivuta3 (unsigned long long accum @var{a}, unsigned long long accum @var{b})
+These functions return the quotient of the unsigned division of @var{a}
+and @var{b}.
+@end deftypefn
+
+@deftypefn {Runtime Function} {short fract} __ssdivqq3 (short fract @var{a}, short fract @var{b})
+@deftypefnx {Runtime Function} {fract} __ssdivhq3 (fract @var{a}, fract @var{b})
+@deftypefnx {Runtime Function} {long fract} __ssdivsq3 (long fract @var{a}, long fract @var{b})
+@deftypefnx {Runtime Function} {long long fract} __ssdivdq3 (long long fract @var{a}, long long fract @var{b})
+@deftypefnx {Runtime Function} {short accum} __ssdivha3 (short accum @var{a}, short accum @var{b})
+@deftypefnx {Runtime Function} {accum} __ssdivsa3 (accum @var{a}, accum @var{b})
+@deftypefnx {Runtime Function} {long accum} __ssdivda3 (long accum @var{a}, long accum @var{b})
+@deftypefnx {Runtime Function} {long long accum} __ssdivta3 (long long accum @var{a}, long long accum @var{b})
+These functions return the quotient of the signed division of @var{a}
+and @var{b} with signed saturation.
+@end deftypefn
+
+@deftypefn {Runtime Function} {unsigned short fract} __usdivuqq3 (unsigned short fract @var{a}, unsigned short fract @var{b})
+@deftypefnx {Runtime Function} {unsigned fract} __usdivuhq3 (unsigned fract @var{a}, unsigned fract @var{b})
+@deftypefnx {Runtime Function} {unsigned long fract} __usdivusq3 (unsigned long fract @var{a}, unsigned long fract @var{b})
+@deftypefnx {Runtime Function} {unsigned long long fract} __usdivudq3 (unsigned long long fract @var{a}, unsigned long long fract @var{b})
+@deftypefnx {Runtime Function} {unsigned short accum} __usdivuha3 (unsigned short accum @var{a}, unsigned short accum @var{b})
+@deftypefnx {Runtime Function} {unsigned accum} __usdivusa3 (unsigned accum @var{a}, unsigned accum @var{b})
+@deftypefnx {Runtime Function} {unsigned long accum} __usdivuda3 (unsigned long accum @var{a}, unsigned long accum @var{b})
+@deftypefnx {Runtime Function} {unsigned long long accum} __usdivuta3 (unsigned long long accum @var{a}, unsigned long long accum @var{b})
+These functions return the quotient of the unsigned division of @var{a}
+and @var{b} with unsigned saturation.
+@end deftypefn
+
+@deftypefn {Runtime Function} {short fract} __negqq2 (short fract @var{a})
+@deftypefnx {Runtime Function} {fract} __neghq2 (fract @var{a})
+@deftypefnx {Runtime Function} {long fract} __negsq2 (long fract @var{a})
+@deftypefnx {Runtime Function} {long long fract} __negdq2 (long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __neguqq2 (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __neguhq2 (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __negusq2 (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __negudq2 (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {short accum} __negha2 (short accum @var{a})
+@deftypefnx {Runtime Function} {accum} __negsa2 (accum @var{a})
+@deftypefnx {Runtime Function} {long accum} __negda2 (long accum @var{a})
+@deftypefnx {Runtime Function} {long long accum} __negta2 (long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __neguha2 (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __negusa2 (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __neguda2 (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __neguta2 (unsigned long long accum @var{a})
+These functions return the negation of @var{a}.
+@end deftypefn
+
+@deftypefn {Runtime Function} {short fract} __ssnegqq2 (short fract @var{a})
+@deftypefnx {Runtime Function} {fract} __ssneghq2 (fract @var{a})
+@deftypefnx {Runtime Function} {long fract} __ssnegsq2 (long fract @var{a})
+@deftypefnx {Runtime Function} {long long fract} __ssnegdq2 (long long fract @var{a})
+@deftypefnx {Runtime Function} {short accum} __ssnegha2 (short accum @var{a})
+@deftypefnx {Runtime Function} {accum} __ssnegsa2 (accum @var{a})
+@deftypefnx {Runtime Function} {long accum} __ssnegda2 (long accum @var{a})
+@deftypefnx {Runtime Function} {long long accum} __ssnegta2 (long long accum @var{a})
+These functions return the negation of @var{a} with signed saturation.
+@end deftypefn
+
+@deftypefn {Runtime Function} {unsigned short fract} __usneguqq2 (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __usneguhq2 (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __usnegusq2 (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __usnegudq2 (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __usneguha2 (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __usnegusa2 (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __usneguda2 (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __usneguta2 (unsigned long long accum @var{a})
+These functions return the negation of @var{a} with unsigned saturation.
+@end deftypefn
+
+@deftypefn {Runtime Function} {short fract} __ashlqq3 (short fract @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {fract} __ashlhq3 (fract @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {long fract} __ashlsq3 (long fract @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {long long fract} __ashldq3 (long long fract @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {unsigned short fract} __ashluqq3 (unsigned short fract @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {unsigned fract} __ashluhq3 (unsigned fract @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {unsigned long fract} __ashlusq3 (unsigned long fract @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {unsigned long long fract} __ashludq3 (unsigned long long fract @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {short accum} __ashlha3 (short accum @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {accum} __ashlsa3 (accum @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {long accum} __ashlda3 (long accum @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {long long accum} __ashlta3 (long long accum @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {unsigned short accum} __ashluha3 (unsigned short accum @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {unsigned accum} __ashlusa3 (unsigned accum @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {unsigned long accum} __ashluda3 (unsigned long accum @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {unsigned long long accum} __ashluta3 (unsigned long long accum @var{a}, int @var{b})
+These functions return the result of shifting @var{a} left by @var{b} bits.
+@end deftypefn
+
+@deftypefn {Runtime Function} {short fract} __ashrqq3 (short fract @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {fract} __ashrhq3 (fract @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {long fract} __ashrsq3 (long fract @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {long long fract} __ashrdq3 (long long fract @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {short accum} __ashrha3 (short accum @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {accum} __ashrsa3 (accum @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {long accum} __ashrda3 (long accum @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {long long accum} __ashrta3 (long long accum @var{a}, int @var{b})
+These functions return the result of arithmetically shifting @var{a} right
+by @var{b} bits.
+@end deftypefn
+
+@deftypefn {Runtime Function} {unsigned short fract} __lshruqq3 (unsigned short fract @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {unsigned fract} __lshruhq3 (unsigned fract @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {unsigned long fract} __lshrusq3 (unsigned long fract @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {unsigned long long fract} __lshrudq3 (unsigned long long fract @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {unsigned short accum} __lshruha3 (unsigned short accum @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {unsigned accum} __lshrusa3 (unsigned accum @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {unsigned long accum} __lshruda3 (unsigned long accum @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {unsigned long long accum} __lshruta3 (unsigned long long accum @var{a}, int @var{b})
+These functions return the result of logically shifting @var{a} right
+by @var{b} bits.
+@end deftypefn
+
+@deftypefn {Runtime Function} {fract} __ssashlhq3 (fract @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {long fract} __ssashlsq3 (long fract @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {long long fract} __ssashldq3 (long long fract @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {short accum} __ssashlha3 (short accum @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {accum} __ssashlsa3 (accum @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {long accum} __ssashlda3 (long accum @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {long long accum} __ssashlta3 (long long accum @var{a}, int @var{b})
+These functions return the result of shifting @var{a} left by @var{b} bits
+with signed saturation.
+@end deftypefn
+
+@deftypefn {Runtime Function} {unsigned short fract} __usashluqq3 (unsigned short fract @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {unsigned fract} __usashluhq3 (unsigned fract @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {unsigned long fract} __usashlusq3 (unsigned long fract @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {unsigned long long fract} __usashludq3 (unsigned long long fract @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {unsigned short accum} __usashluha3 (unsigned short accum @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {unsigned accum} __usashlusa3 (unsigned accum @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {unsigned long accum} __usashluda3 (unsigned long accum @var{a}, int @var{b})
+@deftypefnx {Runtime Function} {unsigned long long accum} __usashluta3 (unsigned long long accum @var{a}, int @var{b})
+These functions return the result of shifting @var{a} left by @var{b} bits
+with unsigned saturation.
+@end deftypefn
+
+@subsection Comparison functions
+
+The following functions implement fixed-point comparisons.  These functions
+implement a low-level compare, upon which the higher level comparison
+operators (such as less than and greater than or equal to) can be
+constructed.  The returned values lie in the range zero to two, to allow
+the high-level operators to be implemented by testing the returned
+result using either signed or unsigned comparison.
+
+@deftypefn {Runtime Function} {int} __cmpqq2 (short fract @var{a}, short fract @var{b})
+@deftypefnx {Runtime Function} {int} __cmphq2 (fract @var{a}, fract @var{b})
+@deftypefnx {Runtime Function} {int} __cmpsq2 (long fract @var{a}, long fract @var{b})
+@deftypefnx {Runtime Function} {int} __cmpdq2 (long long fract @var{a}, long long fract @var{b})
+@deftypefnx {Runtime Function} {int} __cmpuqq2 (unsigned short fract @var{a}, unsigned short fract @var{b})
+@deftypefnx {Runtime Function} {int} __cmpuhq2 (unsigned fract @var{a}, unsigned fract @var{b})
+@deftypefnx {Runtime Function} {int} __cmpusq2 (unsigned long fract @var{a}, unsigned long fract @var{b})
+@deftypefnx {Runtime Function} {int} __cmpudq2 (unsigned long long fract @var{a}, unsigned long long fract @var{b})
+@deftypefnx {Runtime Function} {int} __cmpha2 (short accum @var{a}, short accum @var{b})
+@deftypefnx {Runtime Function} {int} __cmpsa2 (accum @var{a}, accum @var{b})
+@deftypefnx {Runtime Function} {int} __cmpda2 (long accum @var{a}, long accum @var{b})
+@deftypefnx {Runtime Function} {int} __cmpta2 (long long accum @var{a}, long long accum @var{b})
+@deftypefnx {Runtime Function} {int} __cmpuha2 (unsigned short accum @var{a}, unsigned short accum @var{b})
+@deftypefnx {Runtime Function} {int} __cmpusa2 (unsigned accum @var{a}, unsigned accum @var{b})
+@deftypefnx {Runtime Function} {int} __cmpuda2 (unsigned long accum @var{a}, unsigned long accum @var{b})
+@deftypefnx {Runtime Function} {int} __cmputa2 (unsigned long long accum @var{a}, unsigned long long accum @var{b})
+These functions perform a signed or unsigned comparison of @var{a} and
+@var{b} (depending on the selected machine mode).  If @var{a} is less
+than @var{b}, they return 0; if @var{a} is greater than @var{b}, they
+return 2; and if @var{a} and @var{b} are equal they return 1.
+@end deftypefn
+
+@subsection Conversion functions
+
+@deftypefn {Runtime Function} {fract} __fractqqhq2 (short fract @var{a})
+@deftypefnx {Runtime Function} {long fract} __fractqqsq2 (short fract @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fractqqdq2 (short fract @var{a})
+@deftypefnx {Runtime Function} {short accum} __fractqqha (short fract @var{a})
+@deftypefnx {Runtime Function} {accum} __fractqqsa (short fract @var{a})
+@deftypefnx {Runtime Function} {long accum} __fractqqda (short fract @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fractqqta (short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fractqquqq (short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fractqquhq (short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fractqqusq (short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fractqqudq (short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fractqquha (short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fractqqusa (short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fractqquda (short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fractqquta (short fract @var{a})
+@deftypefnx {Runtime Function} {signed char} __fractqqqi (short fract @var{a})
+@deftypefnx {Runtime Function} {short} __fractqqhi (short fract @var{a})
+@deftypefnx {Runtime Function} {int} __fractqqsi (short fract @var{a})
+@deftypefnx {Runtime Function} {long} __fractqqdi (short fract @var{a})
+@deftypefnx {Runtime Function} {long long} __fractqqti (short fract @var{a})
+@deftypefnx {Runtime Function} {float} __fractqqsf (short fract @var{a})
+@deftypefnx {Runtime Function} {double} __fractqqdf (short fract @var{a})
+@deftypefnx {Runtime Function} {short fract} __fracthqqq2 (fract @var{a})
+@deftypefnx {Runtime Function} {long fract} __fracthqsq2 (fract @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fracthqdq2 (fract @var{a})
+@deftypefnx {Runtime Function} {short accum} __fracthqha (fract @var{a})
+@deftypefnx {Runtime Function} {accum} __fracthqsa (fract @var{a})
+@deftypefnx {Runtime Function} {long accum} __fracthqda (fract @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fracthqta (fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fracthquqq (fract @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fracthquhq (fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fracthqusq (fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fracthqudq (fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fracthquha (fract @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fracthqusa (fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fracthquda (fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fracthquta (fract @var{a})
+@deftypefnx {Runtime Function} {signed char} __fracthqqi (fract @var{a})
+@deftypefnx {Runtime Function} {short} __fracthqhi (fract @var{a})
+@deftypefnx {Runtime Function} {int} __fracthqsi (fract @var{a})
+@deftypefnx {Runtime Function} {long} __fracthqdi (fract @var{a})
+@deftypefnx {Runtime Function} {long long} __fracthqti (fract @var{a})
+@deftypefnx {Runtime Function} {float} __fracthqsf (fract @var{a})
+@deftypefnx {Runtime Function} {double} __fracthqdf (fract @var{a})
+@deftypefnx {Runtime Function} {short fract} __fractsqqq2 (long fract @var{a})
+@deftypefnx {Runtime Function} {fract} __fractsqhq2 (long fract @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fractsqdq2 (long fract @var{a})
+@deftypefnx {Runtime Function} {short accum} __fractsqha (long fract @var{a})
+@deftypefnx {Runtime Function} {accum} __fractsqsa (long fract @var{a})
+@deftypefnx {Runtime Function} {long accum} __fractsqda (long fract @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fractsqta (long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fractsquqq (long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fractsquhq (long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fractsqusq (long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fractsqudq (long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fractsquha (long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fractsqusa (long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fractsquda (long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fractsquta (long fract @var{a})
+@deftypefnx {Runtime Function} {signed char} __fractsqqi (long fract @var{a})
+@deftypefnx {Runtime Function} {short} __fractsqhi (long fract @var{a})
+@deftypefnx {Runtime Function} {int} __fractsqsi (long fract @var{a})
+@deftypefnx {Runtime Function} {long} __fractsqdi (long fract @var{a})
+@deftypefnx {Runtime Function} {long long} __fractsqti (long fract @var{a})
+@deftypefnx {Runtime Function} {float} __fractsqsf (long fract @var{a})
+@deftypefnx {Runtime Function} {double} __fractsqdf (long fract @var{a})
+@deftypefnx {Runtime Function} {short fract} __fractdqqq2 (long long fract @var{a})
+@deftypefnx {Runtime Function} {fract} __fractdqhq2 (long long fract @var{a})
+@deftypefnx {Runtime Function} {long fract} __fractdqsq2 (long long fract @var{a})
+@deftypefnx {Runtime Function} {short accum} __fractdqha (long long fract @var{a})
+@deftypefnx {Runtime Function} {accum} __fractdqsa (long long fract @var{a})
+@deftypefnx {Runtime Function} {long accum} __fractdqda (long long fract @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fractdqta (long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fractdquqq (long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fractdquhq (long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fractdqusq (long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fractdqudq (long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fractdquha (long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fractdqusa (long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fractdquda (long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fractdquta (long long fract @var{a})
+@deftypefnx {Runtime Function} {signed char} __fractdqqi (long long fract @var{a})
+@deftypefnx {Runtime Function} {short} __fractdqhi (long long fract @var{a})
+@deftypefnx {Runtime Function} {int} __fractdqsi (long long fract @var{a})
+@deftypefnx {Runtime Function} {long} __fractdqdi (long long fract @var{a})
+@deftypefnx {Runtime Function} {long long} __fractdqti (long long fract @var{a})
+@deftypefnx {Runtime Function} {float} __fractdqsf (long long fract @var{a})
+@deftypefnx {Runtime Function} {double} __fractdqdf (long long fract @var{a})
+@deftypefnx {Runtime Function} {short fract} __fracthaqq (short accum @var{a})
+@deftypefnx {Runtime Function} {fract} __fracthahq (short accum @var{a})
+@deftypefnx {Runtime Function} {long fract} __fracthasq (short accum @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fracthadq (short accum @var{a})
+@deftypefnx {Runtime Function} {accum} __fracthasa2 (short accum @var{a})
+@deftypefnx {Runtime Function} {long accum} __fracthada2 (short accum @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fracthata2 (short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fracthauqq (short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fracthauhq (short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fracthausq (short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fracthaudq (short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fracthauha (short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fracthausa (short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fracthauda (short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fracthauta (short accum @var{a})
+@deftypefnx {Runtime Function} {signed char} __fracthaqi (short accum @var{a})
+@deftypefnx {Runtime Function} {short} __fracthahi (short accum @var{a})
+@deftypefnx {Runtime Function} {int} __fracthasi (short accum @var{a})
+@deftypefnx {Runtime Function} {long} __fracthadi (short accum @var{a})
+@deftypefnx {Runtime Function} {long long} __fracthati (short accum @var{a})
+@deftypefnx {Runtime Function} {float} __fracthasf (short accum @var{a})
+@deftypefnx {Runtime Function} {double} __fracthadf (short accum @var{a})
+@deftypefnx {Runtime Function} {short fract} __fractsaqq (accum @var{a})
+@deftypefnx {Runtime Function} {fract} __fractsahq (accum @var{a})
+@deftypefnx {Runtime Function} {long fract} __fractsasq (accum @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fractsadq (accum @var{a})
+@deftypefnx {Runtime Function} {short accum} __fractsaha2 (accum @var{a})
+@deftypefnx {Runtime Function} {long accum} __fractsada2 (accum @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fractsata2 (accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fractsauqq (accum @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fractsauhq (accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fractsausq (accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fractsaudq (accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fractsauha (accum @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fractsausa (accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fractsauda (accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fractsauta (accum @var{a})
+@deftypefnx {Runtime Function} {signed char} __fractsaqi (accum @var{a})
+@deftypefnx {Runtime Function} {short} __fractsahi (accum @var{a})
+@deftypefnx {Runtime Function} {int} __fractsasi (accum @var{a})
+@deftypefnx {Runtime Function} {long} __fractsadi (accum @var{a})
+@deftypefnx {Runtime Function} {long long} __fractsati (accum @var{a})
+@deftypefnx {Runtime Function} {float} __fractsasf (accum @var{a})
+@deftypefnx {Runtime Function} {double} __fractsadf (accum @var{a})
+@deftypefnx {Runtime Function} {short fract} __fractdaqq (long accum @var{a})
+@deftypefnx {Runtime Function} {fract} __fractdahq (long accum @var{a})
+@deftypefnx {Runtime Function} {long fract} __fractdasq (long accum @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fractdadq (long accum @var{a})
+@deftypefnx {Runtime Function} {short accum} __fractdaha2 (long accum @var{a})
+@deftypefnx {Runtime Function} {accum} __fractdasa2 (long accum @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fractdata2 (long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fractdauqq (long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fractdauhq (long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fractdausq (long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fractdaudq (long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fractdauha (long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fractdausa (long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fractdauda (long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fractdauta (long accum @var{a})
+@deftypefnx {Runtime Function} {signed char} __fractdaqi (long accum @var{a})
+@deftypefnx {Runtime Function} {short} __fractdahi (long accum @var{a})
+@deftypefnx {Runtime Function} {int} __fractdasi (long accum @var{a})
+@deftypefnx {Runtime Function} {long} __fractdadi (long accum @var{a})
+@deftypefnx {Runtime Function} {long long} __fractdati (long accum @var{a})
+@deftypefnx {Runtime Function} {float} __fractdasf (long accum @var{a})
+@deftypefnx {Runtime Function} {double} __fractdadf (long accum @var{a})
+@deftypefnx {Runtime Function} {short fract} __fracttaqq (long long accum @var{a})
+@deftypefnx {Runtime Function} {fract} __fracttahq (long long accum @var{a})
+@deftypefnx {Runtime Function} {long fract} __fracttasq (long long accum @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fracttadq (long long accum @var{a})
+@deftypefnx {Runtime Function} {short accum} __fracttaha2 (long long accum @var{a})
+@deftypefnx {Runtime Function} {accum} __fracttasa2 (long long accum @var{a})
+@deftypefnx {Runtime Function} {long accum} __fracttada2 (long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fracttauqq (long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fracttauhq (long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fracttausq (long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fracttaudq (long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fracttauha (long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fracttausa (long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fracttauda (long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fracttauta (long long accum @var{a})
+@deftypefnx {Runtime Function} {signed char} __fracttaqi (long long accum @var{a})
+@deftypefnx {Runtime Function} {short} __fracttahi (long long accum @var{a})
+@deftypefnx {Runtime Function} {int} __fracttasi (long long accum @var{a})
+@deftypefnx {Runtime Function} {long} __fracttadi (long long accum @var{a})
+@deftypefnx {Runtime Function} {long long} __fracttati (long long accum @var{a})
+@deftypefnx {Runtime Function} {float} __fracttasf (long long accum @var{a})
+@deftypefnx {Runtime Function} {double} __fracttadf (long long accum @var{a})
+@deftypefnx {Runtime Function} {short fract} __fractuqqqq (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {fract} __fractuqqhq (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {long fract} __fractuqqsq (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fractuqqdq (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {short accum} __fractuqqha (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {accum} __fractuqqsa (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {long accum} __fractuqqda (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fractuqqta (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fractuqquhq2 (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fractuqqusq2 (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fractuqqudq2 (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fractuqquha (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fractuqqusa (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fractuqquda (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fractuqquta (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {signed char} __fractuqqqi (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {short} __fractuqqhi (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {int} __fractuqqsi (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {long} __fractuqqdi (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {long long} __fractuqqti (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {float} __fractuqqsf (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {double} __fractuqqdf (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {short fract} __fractuhqqq (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {fract} __fractuhqhq (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {long fract} __fractuhqsq (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fractuhqdq (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {short accum} __fractuhqha (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {accum} __fractuhqsa (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {long accum} __fractuhqda (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fractuhqta (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fractuhquqq2 (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fractuhqusq2 (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fractuhqudq2 (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fractuhquha (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fractuhqusa (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fractuhquda (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fractuhquta (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {signed char} __fractuhqqi (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {short} __fractuhqhi (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {int} __fractuhqsi (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {long} __fractuhqdi (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {long long} __fractuhqti (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {float} __fractuhqsf (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {double} __fractuhqdf (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {short fract} __fractusqqq (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {fract} __fractusqhq (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {long fract} __fractusqsq (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fractusqdq (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {short accum} __fractusqha (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {accum} __fractusqsa (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {long accum} __fractusqda (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fractusqta (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fractusquqq2 (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fractusquhq2 (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fractusqudq2 (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fractusquha (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fractusqusa (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fractusquda (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fractusquta (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {signed char} __fractusqqi (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {short} __fractusqhi (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {int} __fractusqsi (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {long} __fractusqdi (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {long long} __fractusqti (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {float} __fractusqsf (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {double} __fractusqdf (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {short fract} __fractudqqq (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {fract} __fractudqhq (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {long fract} __fractudqsq (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fractudqdq (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {short accum} __fractudqha (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {accum} __fractudqsa (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {long accum} __fractudqda (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fractudqta (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fractudquqq2 (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fractudquhq2 (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fractudqusq2 (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fractudquha (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fractudqusa (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fractudquda (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fractudquta (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {signed char} __fractudqqi (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {short} __fractudqhi (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {int} __fractudqsi (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {long} __fractudqdi (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {long long} __fractudqti (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {float} __fractudqsf (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {double} __fractudqdf (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {short fract} __fractuhaqq (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {fract} __fractuhahq (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {long fract} __fractuhasq (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fractuhadq (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {short accum} __fractuhaha (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {accum} __fractuhasa (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {long accum} __fractuhada (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fractuhata (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fractuhauqq (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fractuhauhq (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fractuhausq (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fractuhaudq (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fractuhausa2 (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fractuhauda2 (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fractuhauta2 (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {signed char} __fractuhaqi (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {short} __fractuhahi (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {int} __fractuhasi (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {long} __fractuhadi (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {long long} __fractuhati (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {float} __fractuhasf (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {double} __fractuhadf (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {short fract} __fractusaqq (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {fract} __fractusahq (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {long fract} __fractusasq (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fractusadq (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {short accum} __fractusaha (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {accum} __fractusasa (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {long accum} __fractusada (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fractusata (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fractusauqq (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fractusauhq (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fractusausq (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fractusaudq (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fractusauha2 (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fractusauda2 (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fractusauta2 (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {signed char} __fractusaqi (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {short} __fractusahi (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {int} __fractusasi (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {long} __fractusadi (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {long long} __fractusati (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {float} __fractusasf (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {double} __fractusadf (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {short fract} __fractudaqq (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {fract} __fractudahq (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {long fract} __fractudasq (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fractudadq (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {short accum} __fractudaha (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {accum} __fractudasa (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {long accum} __fractudada (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fractudata (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fractudauqq (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fractudauhq (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fractudausq (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fractudaudq (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fractudauha2 (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fractudausa2 (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fractudauta2 (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {signed char} __fractudaqi (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {short} __fractudahi (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {int} __fractudasi (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {long} __fractudadi (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {long long} __fractudati (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {float} __fractudasf (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {double} __fractudadf (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {short fract} __fractutaqq (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {fract} __fractutahq (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {long fract} __fractutasq (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fractutadq (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {short accum} __fractutaha (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {accum} __fractutasa (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {long accum} __fractutada (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fractutata (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fractutauqq (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fractutauhq (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fractutausq (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fractutaudq (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fractutauha2 (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fractutausa2 (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fractutauda2 (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {signed char} __fractutaqi (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {short} __fractutahi (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {int} __fractutasi (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {long} __fractutadi (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {long long} __fractutati (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {float} __fractutasf (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {double} __fractutadf (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {short fract} __fractqiqq (signed char @var{a})
+@deftypefnx {Runtime Function} {fract} __fractqihq (signed char @var{a})
+@deftypefnx {Runtime Function} {long fract} __fractqisq (signed char @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fractqidq (signed char @var{a})
+@deftypefnx {Runtime Function} {short accum} __fractqiha (signed char @var{a})
+@deftypefnx {Runtime Function} {accum} __fractqisa (signed char @var{a})
+@deftypefnx {Runtime Function} {long accum} __fractqida (signed char @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fractqita (signed char @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fractqiuqq (signed char @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fractqiuhq (signed char @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fractqiusq (signed char @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fractqiudq (signed char @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fractqiuha (signed char @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fractqiusa (signed char @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fractqiuda (signed char @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fractqiuta (signed char @var{a})
+@deftypefnx {Runtime Function} {short fract} __fracthiqq (short @var{a})
+@deftypefnx {Runtime Function} {fract} __fracthihq (short @var{a})
+@deftypefnx {Runtime Function} {long fract} __fracthisq (short @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fracthidq (short @var{a})
+@deftypefnx {Runtime Function} {short accum} __fracthiha (short @var{a})
+@deftypefnx {Runtime Function} {accum} __fracthisa (short @var{a})
+@deftypefnx {Runtime Function} {long accum} __fracthida (short @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fracthita (short @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fracthiuqq (short @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fracthiuhq (short @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fracthiusq (short @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fracthiudq (short @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fracthiuha (short @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fracthiusa (short @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fracthiuda (short @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fracthiuta (short @var{a})
+@deftypefnx {Runtime Function} {short fract} __fractsiqq (int @var{a})
+@deftypefnx {Runtime Function} {fract} __fractsihq (int @var{a})
+@deftypefnx {Runtime Function} {long fract} __fractsisq (int @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fractsidq (int @var{a})
+@deftypefnx {Runtime Function} {short accum} __fractsiha (int @var{a})
+@deftypefnx {Runtime Function} {accum} __fractsisa (int @var{a})
+@deftypefnx {Runtime Function} {long accum} __fractsida (int @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fractsita (int @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fractsiuqq (int @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fractsiuhq (int @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fractsiusq (int @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fractsiudq (int @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fractsiuha (int @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fractsiusa (int @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fractsiuda (int @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fractsiuta (int @var{a})
+@deftypefnx {Runtime Function} {short fract} __fractdiqq (long @var{a})
+@deftypefnx {Runtime Function} {fract} __fractdihq (long @var{a})
+@deftypefnx {Runtime Function} {long fract} __fractdisq (long @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fractdidq (long @var{a})
+@deftypefnx {Runtime Function} {short accum} __fractdiha (long @var{a})
+@deftypefnx {Runtime Function} {accum} __fractdisa (long @var{a})
+@deftypefnx {Runtime Function} {long accum} __fractdida (long @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fractdita (long @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fractdiuqq (long @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fractdiuhq (long @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fractdiusq (long @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fractdiudq (long @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fractdiuha (long @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fractdiusa (long @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fractdiuda (long @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fractdiuta (long @var{a})
+@deftypefnx {Runtime Function} {short fract} __fracttiqq (long long @var{a})
+@deftypefnx {Runtime Function} {fract} __fracttihq (long long @var{a})
+@deftypefnx {Runtime Function} {long fract} __fracttisq (long long @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fracttidq (long long @var{a})
+@deftypefnx {Runtime Function} {short accum} __fracttiha (long long @var{a})
+@deftypefnx {Runtime Function} {accum} __fracttisa (long long @var{a})
+@deftypefnx {Runtime Function} {long accum} __fracttida (long long @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fracttita (long long @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fracttiuqq (long long @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fracttiuhq (long long @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fracttiusq (long long @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fracttiudq (long long @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fracttiuha (long long @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fracttiusa (long long @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fracttiuda (long long @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fracttiuta (long long @var{a})
+@deftypefnx {Runtime Function} {short fract} __fractsfqq (float @var{a})
+@deftypefnx {Runtime Function} {fract} __fractsfhq (float @var{a})
+@deftypefnx {Runtime Function} {long fract} __fractsfsq (float @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fractsfdq (float @var{a})
+@deftypefnx {Runtime Function} {short accum} __fractsfha (float @var{a})
+@deftypefnx {Runtime Function} {accum} __fractsfsa (float @var{a})
+@deftypefnx {Runtime Function} {long accum} __fractsfda (float @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fractsfta (float @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fractsfuqq (float @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fractsfuhq (float @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fractsfusq (float @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fractsfudq (float @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fractsfuha (float @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fractsfusa (float @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fractsfuda (float @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fractsfuta (float @var{a})
+@deftypefnx {Runtime Function} {short fract} __fractdfqq (double @var{a})
+@deftypefnx {Runtime Function} {fract} __fractdfhq (double @var{a})
+@deftypefnx {Runtime Function} {long fract} __fractdfsq (double @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fractdfdq (double @var{a})
+@deftypefnx {Runtime Function} {short accum} __fractdfha (double @var{a})
+@deftypefnx {Runtime Function} {accum} __fractdfsa (double @var{a})
+@deftypefnx {Runtime Function} {long accum} __fractdfda (double @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fractdfta (double @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fractdfuqq (double @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fractdfuhq (double @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fractdfusq (double @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fractdfudq (double @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fractdfuha (double @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fractdfusa (double @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fractdfuda (double @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fractdfuta (double @var{a})
+These functions convert from fractional and signed non-fractionals to
+fractionals and signed non-fractionals, without saturation.
+@end deftypefn
+
+@deftypefn {Runtime Function} {fract} __satfractqqhq2 (short fract @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfractqqsq2 (short fract @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfractqqdq2 (short fract @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfractqqha (short fract @var{a})
+@deftypefnx {Runtime Function} {accum} __satfractqqsa (short fract @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfractqqda (short fract @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfractqqta (short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfractqquqq (short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfractqquhq (short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfractqqusq (short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfractqqudq (short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfractqquha (short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfractqqusa (short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfractqquda (short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfractqquta (short fract @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfracthqqq2 (fract @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfracthqsq2 (fract @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfracthqdq2 (fract @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfracthqha (fract @var{a})
+@deftypefnx {Runtime Function} {accum} __satfracthqsa (fract @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfracthqda (fract @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfracthqta (fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfracthquqq (fract @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfracthquhq (fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfracthqusq (fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfracthqudq (fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfracthquha (fract @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfracthqusa (fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfracthquda (fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfracthquta (fract @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfractsqqq2 (long fract @var{a})
+@deftypefnx {Runtime Function} {fract} __satfractsqhq2 (long fract @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfractsqdq2 (long fract @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfractsqha (long fract @var{a})
+@deftypefnx {Runtime Function} {accum} __satfractsqsa (long fract @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfractsqda (long fract @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfractsqta (long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfractsquqq (long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfractsquhq (long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfractsqusq (long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfractsqudq (long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfractsquha (long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfractsqusa (long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfractsquda (long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfractsquta (long fract @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfractdqqq2 (long long fract @var{a})
+@deftypefnx {Runtime Function} {fract} __satfractdqhq2 (long long fract @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfractdqsq2 (long long fract @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfractdqha (long long fract @var{a})
+@deftypefnx {Runtime Function} {accum} __satfractdqsa (long long fract @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfractdqda (long long fract @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfractdqta (long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfractdquqq (long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfractdquhq (long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfractdqusq (long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfractdqudq (long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfractdquha (long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfractdqusa (long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfractdquda (long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfractdquta (long long fract @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfracthaqq (short accum @var{a})
+@deftypefnx {Runtime Function} {fract} __satfracthahq (short accum @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfracthasq (short accum @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfracthadq (short accum @var{a})
+@deftypefnx {Runtime Function} {accum} __satfracthasa2 (short accum @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfracthada2 (short accum @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfracthata2 (short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfracthauqq (short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfracthauhq (short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfracthausq (short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfracthaudq (short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfracthauha (short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfracthausa (short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfracthauda (short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfracthauta (short accum @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfractsaqq (accum @var{a})
+@deftypefnx {Runtime Function} {fract} __satfractsahq (accum @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfractsasq (accum @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfractsadq (accum @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfractsaha2 (accum @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfractsada2 (accum @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfractsata2 (accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfractsauqq (accum @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfractsauhq (accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfractsausq (accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfractsaudq (accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfractsauha (accum @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfractsausa (accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfractsauda (accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfractsauta (accum @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfractdaqq (long accum @var{a})
+@deftypefnx {Runtime Function} {fract} __satfractdahq (long accum @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfractdasq (long accum @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfractdadq (long accum @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfractdaha2 (long accum @var{a})
+@deftypefnx {Runtime Function} {accum} __satfractdasa2 (long accum @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfractdata2 (long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfractdauqq (long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfractdauhq (long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfractdausq (long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfractdaudq (long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfractdauha (long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfractdausa (long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfractdauda (long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfractdauta (long accum @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfracttaqq (long long accum @var{a})
+@deftypefnx {Runtime Function} {fract} __satfracttahq (long long accum @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfracttasq (long long accum @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfracttadq (long long accum @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfracttaha2 (long long accum @var{a})
+@deftypefnx {Runtime Function} {accum} __satfracttasa2 (long long accum @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfracttada2 (long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfracttauqq (long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfracttauhq (long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfracttausq (long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfracttaudq (long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfracttauha (long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfracttausa (long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfracttauda (long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfracttauta (long long accum @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfractuqqqq (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {fract} __satfractuqqhq (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfractuqqsq (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfractuqqdq (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfractuqqha (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {accum} __satfractuqqsa (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfractuqqda (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfractuqqta (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfractuqquhq2 (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfractuqqusq2 (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfractuqqudq2 (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfractuqquha (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfractuqqusa (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfractuqquda (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfractuqquta (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfractuhqqq (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {fract} __satfractuhqhq (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfractuhqsq (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfractuhqdq (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfractuhqha (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {accum} __satfractuhqsa (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfractuhqda (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfractuhqta (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfractuhquqq2 (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfractuhqusq2 (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfractuhqudq2 (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfractuhquha (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfractuhqusa (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfractuhquda (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfractuhquta (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfractusqqq (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {fract} __satfractusqhq (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfractusqsq (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfractusqdq (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfractusqha (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {accum} __satfractusqsa (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfractusqda (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfractusqta (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfractusquqq2 (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfractusquhq2 (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfractusqudq2 (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfractusquha (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfractusqusa (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfractusquda (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfractusquta (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfractudqqq (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {fract} __satfractudqhq (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfractudqsq (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfractudqdq (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfractudqha (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {accum} __satfractudqsa (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfractudqda (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfractudqta (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfractudquqq2 (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfractudquhq2 (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfractudqusq2 (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfractudquha (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfractudqusa (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfractudquda (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfractudquta (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfractuhaqq (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {fract} __satfractuhahq (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfractuhasq (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfractuhadq (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfractuhaha (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {accum} __satfractuhasa (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfractuhada (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfractuhata (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfractuhauqq (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfractuhauhq (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfractuhausq (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfractuhaudq (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfractuhausa2 (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfractuhauda2 (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfractuhauta2 (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfractusaqq (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {fract} __satfractusahq (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfractusasq (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfractusadq (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfractusaha (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {accum} __satfractusasa (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfractusada (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfractusata (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfractusauqq (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfractusauhq (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfractusausq (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfractusaudq (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfractusauha2 (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfractusauda2 (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfractusauta2 (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfractudaqq (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {fract} __satfractudahq (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfractudasq (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfractudadq (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfractudaha (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {accum} __satfractudasa (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfractudada (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfractudata (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfractudauqq (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfractudauhq (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfractudausq (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfractudaudq (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfractudauha2 (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfractudausa2 (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfractudauta2 (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfractutaqq (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {fract} __satfractutahq (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfractutasq (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfractutadq (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfractutaha (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {accum} __satfractutasa (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfractutada (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfractutata (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfractutauqq (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfractutauhq (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfractutausq (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfractutaudq (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfractutauha2 (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfractutausa2 (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfractutauda2 (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfractqiqq (signed char @var{a})
+@deftypefnx {Runtime Function} {fract} __satfractqihq (signed char @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfractqisq (signed char @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfractqidq (signed char @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfractqiha (signed char @var{a})
+@deftypefnx {Runtime Function} {accum} __satfractqisa (signed char @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfractqida (signed char @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfractqita (signed char @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfractqiuqq (signed char @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfractqiuhq (signed char @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfractqiusq (signed char @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfractqiudq (signed char @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfractqiuha (signed char @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfractqiusa (signed char @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfractqiuda (signed char @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfractqiuta (signed char @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfracthiqq (short @var{a})
+@deftypefnx {Runtime Function} {fract} __satfracthihq (short @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfracthisq (short @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfracthidq (short @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfracthiha (short @var{a})
+@deftypefnx {Runtime Function} {accum} __satfracthisa (short @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfracthida (short @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfracthita (short @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfracthiuqq (short @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfracthiuhq (short @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfracthiusq (short @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfracthiudq (short @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfracthiuha (short @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfracthiusa (short @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfracthiuda (short @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfracthiuta (short @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfractsiqq (int @var{a})
+@deftypefnx {Runtime Function} {fract} __satfractsihq (int @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfractsisq (int @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfractsidq (int @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfractsiha (int @var{a})
+@deftypefnx {Runtime Function} {accum} __satfractsisa (int @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfractsida (int @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfractsita (int @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfractsiuqq (int @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfractsiuhq (int @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfractsiusq (int @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfractsiudq (int @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfractsiuha (int @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfractsiusa (int @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfractsiuda (int @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfractsiuta (int @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfractdiqq (long @var{a})
+@deftypefnx {Runtime Function} {fract} __satfractdihq (long @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfractdisq (long @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfractdidq (long @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfractdiha (long @var{a})
+@deftypefnx {Runtime Function} {accum} __satfractdisa (long @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfractdida (long @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfractdita (long @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfractdiuqq (long @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfractdiuhq (long @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfractdiusq (long @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfractdiudq (long @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfractdiuha (long @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfractdiusa (long @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfractdiuda (long @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfractdiuta (long @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfracttiqq (long long @var{a})
+@deftypefnx {Runtime Function} {fract} __satfracttihq (long long @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfracttisq (long long @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfracttidq (long long @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfracttiha (long long @var{a})
+@deftypefnx {Runtime Function} {accum} __satfracttisa (long long @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfracttida (long long @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfracttita (long long @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfracttiuqq (long long @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfracttiuhq (long long @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfracttiusq (long long @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfracttiudq (long long @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfracttiuha (long long @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfracttiusa (long long @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfracttiuda (long long @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfracttiuta (long long @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfractsfqq (float @var{a})
+@deftypefnx {Runtime Function} {fract} __satfractsfhq (float @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfractsfsq (float @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfractsfdq (float @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfractsfha (float @var{a})
+@deftypefnx {Runtime Function} {accum} __satfractsfsa (float @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfractsfda (float @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfractsfta (float @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfractsfuqq (float @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfractsfuhq (float @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfractsfusq (float @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfractsfudq (float @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfractsfuha (float @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfractsfusa (float @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfractsfuda (float @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfractsfuta (float @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfractdfqq (double @var{a})
+@deftypefnx {Runtime Function} {fract} __satfractdfhq (double @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfractdfsq (double @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfractdfdq (double @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfractdfha (double @var{a})
+@deftypefnx {Runtime Function} {accum} __satfractdfsa (double @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfractdfda (double @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfractdfta (double @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfractdfuqq (double @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfractdfuhq (double @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfractdfusq (double @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfractdfudq (double @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfractdfuha (double @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfractdfusa (double @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfractdfuda (double @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfractdfuta (double @var{a})
+The functions convert from fractional and signed non-fractionals to
+fractionals, with saturation.
+@end deftypefn
+
+@deftypefn {Runtime Function} {unsigned char} __fractunsqqqi (short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short} __fractunsqqhi (short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __fractunsqqsi (short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __fractunsqqdi (short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long} __fractunsqqti (short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned char} __fractunshqqi (fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short} __fractunshqhi (fract @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __fractunshqsi (fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __fractunshqdi (fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long} __fractunshqti (fract @var{a})
+@deftypefnx {Runtime Function} {unsigned char} __fractunssqqi (long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short} __fractunssqhi (long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __fractunssqsi (long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __fractunssqdi (long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long} __fractunssqti (long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned char} __fractunsdqqi (long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short} __fractunsdqhi (long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __fractunsdqsi (long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __fractunsdqdi (long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long} __fractunsdqti (long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned char} __fractunshaqi (short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short} __fractunshahi (short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __fractunshasi (short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __fractunshadi (short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long} __fractunshati (short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned char} __fractunssaqi (accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short} __fractunssahi (accum @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __fractunssasi (accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __fractunssadi (accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long} __fractunssati (accum @var{a})
+@deftypefnx {Runtime Function} {unsigned char} __fractunsdaqi (long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short} __fractunsdahi (long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __fractunsdasi (long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __fractunsdadi (long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long} __fractunsdati (long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned char} __fractunstaqi (long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short} __fractunstahi (long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __fractunstasi (long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __fractunstadi (long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long} __fractunstati (long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned char} __fractunsuqqqi (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short} __fractunsuqqhi (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __fractunsuqqsi (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __fractunsuqqdi (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long} __fractunsuqqti (unsigned short fract @var{a})
+@deftypefnx {Runtime Function} {unsigned char} __fractunsuhqqi (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short} __fractunsuhqhi (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __fractunsuhqsi (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __fractunsuhqdi (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long} __fractunsuhqti (unsigned fract @var{a})
+@deftypefnx {Runtime Function} {unsigned char} __fractunsusqqi (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short} __fractunsusqhi (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __fractunsusqsi (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __fractunsusqdi (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long} __fractunsusqti (unsigned long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned char} __fractunsudqqi (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned short} __fractunsudqhi (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __fractunsudqsi (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __fractunsudqdi (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned long long} __fractunsudqti (unsigned long long fract @var{a})
+@deftypefnx {Runtime Function} {unsigned char} __fractunsuhaqi (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short} __fractunsuhahi (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __fractunsuhasi (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __fractunsuhadi (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long} __fractunsuhati (unsigned short accum @var{a})
+@deftypefnx {Runtime Function} {unsigned char} __fractunsusaqi (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short} __fractunsusahi (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __fractunsusasi (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __fractunsusadi (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long} __fractunsusati (unsigned accum @var{a})
+@deftypefnx {Runtime Function} {unsigned char} __fractunsudaqi (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short} __fractunsudahi (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __fractunsudasi (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __fractunsudadi (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long} __fractunsudati (unsigned long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned char} __fractunsutaqi (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned short} __fractunsutahi (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned int} __fractunsutasi (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long} __fractunsutadi (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {unsigned long long} __fractunsutati (unsigned long long accum @var{a})
+@deftypefnx {Runtime Function} {short fract} __fractunsqiqq (unsigned char @var{a})
+@deftypefnx {Runtime Function} {fract} __fractunsqihq (unsigned char @var{a})
+@deftypefnx {Runtime Function} {long fract} __fractunsqisq (unsigned char @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fractunsqidq (unsigned char @var{a})
+@deftypefnx {Runtime Function} {short accum} __fractunsqiha (unsigned char @var{a})
+@deftypefnx {Runtime Function} {accum} __fractunsqisa (unsigned char @var{a})
+@deftypefnx {Runtime Function} {long accum} __fractunsqida (unsigned char @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fractunsqita (unsigned char @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fractunsqiuqq (unsigned char @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fractunsqiuhq (unsigned char @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fractunsqiusq (unsigned char @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fractunsqiudq (unsigned char @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fractunsqiuha (unsigned char @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fractunsqiusa (unsigned char @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fractunsqiuda (unsigned char @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fractunsqiuta (unsigned char @var{a})
+@deftypefnx {Runtime Function} {short fract} __fractunshiqq (unsigned short @var{a})
+@deftypefnx {Runtime Function} {fract} __fractunshihq (unsigned short @var{a})
+@deftypefnx {Runtime Function} {long fract} __fractunshisq (unsigned short @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fractunshidq (unsigned short @var{a})
+@deftypefnx {Runtime Function} {short accum} __fractunshiha (unsigned short @var{a})
+@deftypefnx {Runtime Function} {accum} __fractunshisa (unsigned short @var{a})
+@deftypefnx {Runtime Function} {long accum} __fractunshida (unsigned short @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fractunshita (unsigned short @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fractunshiuqq (unsigned short @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fractunshiuhq (unsigned short @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fractunshiusq (unsigned short @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fractunshiudq (unsigned short @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fractunshiuha (unsigned short @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fractunshiusa (unsigned short @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fractunshiuda (unsigned short @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fractunshiuta (unsigned short @var{a})
+@deftypefnx {Runtime Function} {short fract} __fractunssiqq (unsigned int @var{a})
+@deftypefnx {Runtime Function} {fract} __fractunssihq (unsigned int @var{a})
+@deftypefnx {Runtime Function} {long fract} __fractunssisq (unsigned int @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fractunssidq (unsigned int @var{a})
+@deftypefnx {Runtime Function} {short accum} __fractunssiha (unsigned int @var{a})
+@deftypefnx {Runtime Function} {accum} __fractunssisa (unsigned int @var{a})
+@deftypefnx {Runtime Function} {long accum} __fractunssida (unsigned int @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fractunssita (unsigned int @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fractunssiuqq (unsigned int @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fractunssiuhq (unsigned int @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fractunssiusq (unsigned int @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fractunssiudq (unsigned int @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fractunssiuha (unsigned int @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fractunssiusa (unsigned int @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fractunssiuda (unsigned int @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fractunssiuta (unsigned int @var{a})
+@deftypefnx {Runtime Function} {short fract} __fractunsdiqq (unsigned long @var{a})
+@deftypefnx {Runtime Function} {fract} __fractunsdihq (unsigned long @var{a})
+@deftypefnx {Runtime Function} {long fract} __fractunsdisq (unsigned long @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fractunsdidq (unsigned long @var{a})
+@deftypefnx {Runtime Function} {short accum} __fractunsdiha (unsigned long @var{a})
+@deftypefnx {Runtime Function} {accum} __fractunsdisa (unsigned long @var{a})
+@deftypefnx {Runtime Function} {long accum} __fractunsdida (unsigned long @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fractunsdita (unsigned long @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fractunsdiuqq (unsigned long @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fractunsdiuhq (unsigned long @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fractunsdiusq (unsigned long @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fractunsdiudq (unsigned long @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fractunsdiuha (unsigned long @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fractunsdiusa (unsigned long @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fractunsdiuda (unsigned long @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fractunsdiuta (unsigned long @var{a})
+@deftypefnx {Runtime Function} {short fract} __fractunstiqq (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {fract} __fractunstihq (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {long fract} __fractunstisq (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {long long fract} __fractunstidq (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {short accum} __fractunstiha (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {accum} __fractunstisa (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {long accum} __fractunstida (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {long long accum} __fractunstita (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __fractunstiuqq (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __fractunstiuhq (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __fractunstiusq (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __fractunstiudq (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __fractunstiuha (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __fractunstiusa (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __fractunstiuda (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __fractunstiuta (unsigned long long @var{a})
+These functions convert from fractionals to unsigned non-fractionals;
+and from unsigned non-fractionals to fractionals, without saturation.
+@end deftypefn
+
+@deftypefn {Runtime Function} {short fract} __satfractunsqiqq (unsigned char @var{a})
+@deftypefnx {Runtime Function} {fract} __satfractunsqihq (unsigned char @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfractunsqisq (unsigned char @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfractunsqidq (unsigned char @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfractunsqiha (unsigned char @var{a})
+@deftypefnx {Runtime Function} {accum} __satfractunsqisa (unsigned char @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfractunsqida (unsigned char @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfractunsqita (unsigned char @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfractunsqiuqq (unsigned char @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfractunsqiuhq (unsigned char @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfractunsqiusq (unsigned char @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfractunsqiudq (unsigned char @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfractunsqiuha (unsigned char @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfractunsqiusa (unsigned char @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfractunsqiuda (unsigned char @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfractunsqiuta (unsigned char @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfractunshiqq (unsigned short @var{a})
+@deftypefnx {Runtime Function} {fract} __satfractunshihq (unsigned short @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfractunshisq (unsigned short @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfractunshidq (unsigned short @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfractunshiha (unsigned short @var{a})
+@deftypefnx {Runtime Function} {accum} __satfractunshisa (unsigned short @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfractunshida (unsigned short @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfractunshita (unsigned short @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfractunshiuqq (unsigned short @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfractunshiuhq (unsigned short @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfractunshiusq (unsigned short @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfractunshiudq (unsigned short @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfractunshiuha (unsigned short @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfractunshiusa (unsigned short @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfractunshiuda (unsigned short @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfractunshiuta (unsigned short @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfractunssiqq (unsigned int @var{a})
+@deftypefnx {Runtime Function} {fract} __satfractunssihq (unsigned int @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfractunssisq (unsigned int @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfractunssidq (unsigned int @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfractunssiha (unsigned int @var{a})
+@deftypefnx {Runtime Function} {accum} __satfractunssisa (unsigned int @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfractunssida (unsigned int @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfractunssita (unsigned int @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfractunssiuqq (unsigned int @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfractunssiuhq (unsigned int @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfractunssiusq (unsigned int @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfractunssiudq (unsigned int @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfractunssiuha (unsigned int @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfractunssiusa (unsigned int @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfractunssiuda (unsigned int @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfractunssiuta (unsigned int @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfractunsdiqq (unsigned long @var{a})
+@deftypefnx {Runtime Function} {fract} __satfractunsdihq (unsigned long @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfractunsdisq (unsigned long @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfractunsdidq (unsigned long @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfractunsdiha (unsigned long @var{a})
+@deftypefnx {Runtime Function} {accum} __satfractunsdisa (unsigned long @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfractunsdida (unsigned long @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfractunsdita (unsigned long @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfractunsdiuqq (unsigned long @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfractunsdiuhq (unsigned long @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfractunsdiusq (unsigned long @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfractunsdiudq (unsigned long @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfractunsdiuha (unsigned long @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfractunsdiusa (unsigned long @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfractunsdiuda (unsigned long @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfractunsdiuta (unsigned long @var{a})
+@deftypefnx {Runtime Function} {short fract} __satfractunstiqq (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {fract} __satfractunstihq (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {long fract} __satfractunstisq (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {long long fract} __satfractunstidq (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {short accum} __satfractunstiha (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {accum} __satfractunstisa (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {long accum} __satfractunstida (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {long long accum} __satfractunstita (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {unsigned short fract} __satfractunstiuqq (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {unsigned fract} __satfractunstiuhq (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {unsigned long fract} __satfractunstiusq (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {unsigned long long fract} __satfractunstiudq (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {unsigned short accum} __satfractunstiuha (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {unsigned accum} __satfractunstiusa (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {unsigned long accum} __satfractunstiuda (unsigned long long @var{a})
+@deftypefnx {Runtime Function} {unsigned long long accum} __satfractunstiuta (unsigned long long @var{a})
+These functions convert from unsigned non-fractionals to fractionals,
+with saturation.
+@end deftypefn
+
+@node Exception handling routines
+@section Language-independent routines for exception handling
+
+document me!
+
+@smallexample
+  _Unwind_DeleteException
+  _Unwind_Find_FDE
+  _Unwind_ForcedUnwind
+  _Unwind_GetGR
+  _Unwind_GetIP
+  _Unwind_GetLanguageSpecificData
+  _Unwind_GetRegionStart
+  _Unwind_GetTextRelBase
+  _Unwind_GetDataRelBase
+  _Unwind_RaiseException
+  _Unwind_Resume
+  _Unwind_SetGR
+  _Unwind_SetIP
+  _Unwind_FindEnclosingFunction
+  _Unwind_SjLj_Register
+  _Unwind_SjLj_Unregister
+  _Unwind_SjLj_RaiseException
+  _Unwind_SjLj_ForcedUnwind
+  _Unwind_SjLj_Resume
+  __deregister_frame
+  __deregister_frame_info
+  __deregister_frame_info_bases
+  __register_frame
+  __register_frame_info
+  __register_frame_info_bases
+  __register_frame_info_table
+  __register_frame_info_table_bases
+  __register_frame_table
+@end smallexample
+
+@node Miscellaneous routines
+@section Miscellaneous runtime library routines
+
+@subsection Cache control functions
+@deftypefn {Runtime Function} void __clear_cache (char *@var{beg}, char *@var{end})
+This function clears the instruction cache between @var{beg} and @var{end}.
+@end deftypefn
+
+@subsection Split stack functions and variables
+@deftypefn {Runtime Function} {void *} __splitstack_find (void *@var{segment_arg}, @
+void *@var{sp}, size_t @var{len}, void **@var{next_segment}, @
+void **@var{next_sp}, void **@var{initial_sp})
+When using @option{-fsplit-stack}, this call may be used to iterate
+over the stack segments.  It may be called like this:
+@smallexample
+  void *next_segment = NULL;
+  void *next_sp = NULL;
+  void *initial_sp = NULL;
+  void *stack;
+  size_t stack_size;
+  while ((stack = __splitstack_find (next_segment, next_sp,
+                                     &stack_size, &next_segment,
+                                     &next_sp, &initial_sp))
+         != NULL)
+    @{
+      /* Stack segment starts at stack and is
+         stack_size bytes long.  */
+    @}
+@end smallexample
+
+There is no way to iterate over the stack segments of a different
+thread.  However, what is permitted is for one thread to call this
+with the @var{segment_arg} and @var{sp} arguments NULL, to pass
+@var{next_segment}, @var{next_sp}, and @var{initial_sp} to a different
+thread, and then to suspend one way or another.  A different thread
+may run the subsequent @code{__splitstack_find} iterations.  Of
+course, this will only work if the first thread is suspended while the
+second thread is calling @code{__splitstack_find}.  If not, the second
+thread could be looking at the stack while it is changing, and
+anything could happen.
+@end deftypefn
+
+@defvar __morestack_segments
+@defvarx __morestack_current_segment
+@defvarx __morestack_initial_sp
+Internal variables used by the @option{-fsplit-stack} implementation.
+@end defvar
diff --git a/gcc/doc/loop.texi b/gcc/doc/loop.texi
new file mode 100644
index 000000000..356c00d02
--- /dev/null
+++ b/gcc/doc/loop.texi
@@ -0,0 +1,655 @@
+@c Copyright (c) 2006, 2007, 2008 Free Software Foundation, Inc.
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@c ---------------------------------------------------------------------
+@c Loop Representation
+@c ---------------------------------------------------------------------
+
+@node Loop Analysis and Representation
+@chapter Analysis and Representation of Loops
+
+GCC provides extensive infrastructure for work with natural loops, i.e.,
+strongly connected components of CFG with only one entry block.  This
+chapter describes representation of loops in GCC, both on GIMPLE and in
+RTL, as well as the interfaces to loop-related analyses (induction
+variable analysis and number of iterations analysis).
+
+@menu
+* Loop representation::         Representation and analysis of loops.
+* Loop querying::               Getting information about loops.
+* Loop manipulation::           Loop manipulation functions.
+* LCSSA::                       Loop-closed SSA form.
+* Scalar evolutions::           Induction variables on GIMPLE.
+* loop-iv::                     Induction variables on RTL.
+* Number of iterations::        Number of iterations analysis.
+* Dependency analysis::         Data dependency analysis.
+* Lambda::                      Linear loop transformations framework.
+* Omega::                       A solver for linear programming problems.
+@end menu
+
+@node Loop representation
+@section Loop representation
+@cindex Loop representation
+@cindex Loop analysis
+
+This chapter describes the representation of loops in GCC, and functions
+that can be used to build, modify and analyze this representation.  Most
+of the interfaces and data structures are declared in @file{cfgloop.h}.
+At the moment, loop structures are analyzed and this information is
+updated only by the optimization passes that deal with loops, but some
+efforts are being made to make it available throughout most of the
+optimization passes.
+
+In general, a natural loop has one entry block (header) and possibly
+several back edges (latches) leading to the header from the inside of
+the loop.  Loops with several latches may appear if several loops share
+a single header, or if there is a branching in the middle of the loop.
+The representation of loops in GCC however allows only loops with a
+single latch.  During loop analysis, headers of such loops are split and
+forwarder blocks are created in order to disambiguate their structures.
+Heuristic based on profile information and structure of the induction
+variables in the loops is used to determine whether the latches
+correspond to sub-loops or to control flow in a single loop.  This means
+that the analysis sometimes changes the CFG, and if you run it in the
+middle of an optimization pass, you must be able to deal with the new
+blocks.  You may avoid CFG changes by passing
+@code{LOOPS_MAY_HAVE_MULTIPLE_LATCHES} flag to the loop discovery,
+note however that most other loop manipulation functions will not work
+correctly for loops with multiple latch edges (the functions that only
+query membership of blocks to loops and subloop relationships, or
+enumerate and test loop exits, can be expected to work).
+
+Body of the loop is the set of blocks that are dominated by its header,
+and reachable from its latch against the direction of edges in CFG@.  The
+loops are organized in a containment hierarchy (tree) such that all the
+loops immediately contained inside loop L are the children of L in the
+tree.  This tree is represented by the @code{struct loops} structure.
+The root of this tree is a fake loop that contains all blocks in the
+function.  Each of the loops is represented in a @code{struct loop}
+structure.  Each loop is assigned an index (@code{num} field of the
+@code{struct loop} structure), and the pointer to the loop is stored in
+the corresponding field of the @code{larray} vector in the loops
+structure.  The indices do not have to be continuous, there may be
+empty (@code{NULL}) entries in the @code{larray} created by deleting
+loops.  Also, there is no guarantee on the relative order of a loop
+and its subloops in the numbering.  The index of a loop never changes.
+
+The entries of the @code{larray} field should not be accessed directly.
+The function @code{get_loop} returns the loop description for a loop with
+the given index.  @code{number_of_loops} function returns number of
+loops in the function.  To traverse all loops, use @code{FOR_EACH_LOOP}
+macro.  The @code{flags} argument of the macro is used to determine
+the direction of traversal and the set of loops visited.  Each loop is
+guaranteed to be visited exactly once, regardless of the changes to the
+loop tree, and the loops may be removed during the traversal.  The newly
+created loops are never traversed, if they need to be visited, this
+must be done separately after their creation.  The @code{FOR_EACH_LOOP}
+macro allocates temporary variables.  If the @code{FOR_EACH_LOOP} loop
+were ended using break or goto, they would not be released;
+@code{FOR_EACH_LOOP_BREAK} macro must be used instead.
+
+Each basic block contains the reference to the innermost loop it belongs
+to (@code{loop_father}).  For this reason, it is only possible to have
+one @code{struct loops} structure initialized at the same time for each
+CFG@.  The global variable @code{current_loops} contains the
+@code{struct loops} structure.  Many of the loop manipulation functions
+assume that dominance information is up-to-date.
+
+The loops are analyzed through @code{loop_optimizer_init} function.  The
+argument of this function is a set of flags represented in an integer
+bitmask.  These flags specify what other properties of the loop
+structures should be calculated/enforced and preserved later:
+
+@itemize
+@item @code{LOOPS_MAY_HAVE_MULTIPLE_LATCHES}: If this flag is set, no
+changes to CFG will be performed in the loop analysis, in particular,
+loops with multiple latch edges will not be disambiguated.  If a loop
+has multiple latches, its latch block is set to NULL@.  Most of
+the loop manipulation functions will not work for loops in this shape.
+No other flags that require CFG changes can be passed to
+loop_optimizer_init.
+@item @code{LOOPS_HAVE_PREHEADERS}: Forwarder blocks are created in such
+a way that each loop has only one entry edge, and additionally, the
+source block of this entry edge has only one successor.  This creates a
+natural place where the code can be moved out of the loop, and ensures
+that the entry edge of the loop leads from its immediate super-loop.
+@item @code{LOOPS_HAVE_SIMPLE_LATCHES}: Forwarder blocks are created to
+force the latch block of each loop to have only one successor.  This
+ensures that the latch of the loop does not belong to any of its
+sub-loops, and makes manipulation with the loops significantly easier.
+Most of the loop manipulation functions assume that the loops are in
+this shape.  Note that with this flag, the ``normal'' loop without any
+control flow inside and with one exit consists of two basic blocks.
+@item @code{LOOPS_HAVE_MARKED_IRREDUCIBLE_REGIONS}: Basic blocks and
+edges in the strongly connected components that are not natural loops
+(have more than one entry block) are marked with
+@code{BB_IRREDUCIBLE_LOOP} and @code{EDGE_IRREDUCIBLE_LOOP} flags.  The
+flag is not set for blocks and edges that belong to natural loops that
+are in such an irreducible region (but it is set for the entry and exit
+edges of such a loop, if they lead to/from this region).
+@item @code{LOOPS_HAVE_RECORDED_EXITS}: The lists of exits are recorded
+and updated for each loop.  This makes some functions (e.g.,
+@code{get_loop_exit_edges}) more efficient.  Some functions (e.g.,
+@code{single_exit}) can be used only if the lists of exits are
+recorded.
+@end itemize
+
+These properties may also be computed/enforced later, using functions
+@code{create_preheaders}, @code{force_single_succ_latches},
+@code{mark_irreducible_loops} and @code{record_loop_exits}.
+
+The memory occupied by the loops structures should be freed with
+@code{loop_optimizer_finalize} function.
+
+The CFG manipulation functions in general do not update loop structures.
+Specialized versions that additionally do so are provided for the most
+common tasks.  On GIMPLE, @code{cleanup_tree_cfg_loop} function can be
+used to cleanup CFG while updating the loops structures if
+@code{current_loops} is set.
+
+@node Loop querying
+@section Loop querying
+@cindex Loop querying
+
+The functions to query the information about loops are declared in
+@file{cfgloop.h}.  Some of the information can be taken directly from
+the structures.  @code{loop_father} field of each basic block contains
+the innermost loop to that the block belongs.  The most useful fields of
+loop structure (that are kept up-to-date at all times) are:
+
+@itemize
+@item @code{header}, @code{latch}: Header and latch basic blocks of the
+loop.
+@item @code{num_nodes}: Number of basic blocks in the loop (including
+the basic blocks of the sub-loops).
+@item @code{depth}: The depth of the loop in the loops tree, i.e., the
+number of super-loops of the loop.
+@item @code{outer}, @code{inner}, @code{next}: The super-loop, the first
+sub-loop, and the sibling of the loop in the loops tree.
+@end itemize
+
+There are other fields in the loop structures, many of them used only by
+some of the passes, or not updated during CFG changes; in general, they
+should not be accessed directly.
+
+The most important functions to query loop structures are:
+
+@itemize
+@item @code{flow_loops_dump}: Dumps the information about loops to a
+file.
+@item @code{verify_loop_structure}: Checks consistency of the loop
+structures.
+@item @code{loop_latch_edge}: Returns the latch edge of a loop.
+@item @code{loop_preheader_edge}: If loops have preheaders, returns
+the preheader edge of a loop.
+@item @code{flow_loop_nested_p}: Tests whether loop is a sub-loop of
+another loop.
+@item @code{flow_bb_inside_loop_p}: Tests whether a basic block belongs
+to a loop (including its sub-loops).
+@item @code{find_common_loop}: Finds the common super-loop of two loops.
+@item @code{superloop_at_depth}: Returns the super-loop of a loop with
+the given depth.
+@item @code{tree_num_loop_insns}, @code{num_loop_insns}: Estimates the
+number of insns in the loop, on GIMPLE and on RTL.
+@item @code{loop_exit_edge_p}: Tests whether edge is an exit from a
+loop.
+@item @code{mark_loop_exit_edges}: Marks all exit edges of all loops
+with @code{EDGE_LOOP_EXIT} flag.
+@item @code{get_loop_body}, @code{get_loop_body_in_dom_order},
+@code{get_loop_body_in_bfs_order}: Enumerates the basic blocks in the
+loop in depth-first search order in reversed CFG, ordered by dominance
+relation, and breath-first search order, respectively.
+@item @code{single_exit}: Returns the single exit edge of the loop, or
+@code{NULL} if the loop has more than one exit.  You can only use this
+function if LOOPS_HAVE_MARKED_SINGLE_EXITS property is used.
+@item @code{get_loop_exit_edges}: Enumerates the exit edges of a loop.
+@item @code{just_once_each_iteration_p}: Returns true if the basic block
+is executed exactly once during each iteration of a loop (that is, it
+does not belong to a sub-loop, and it dominates the latch of the loop).
+@end itemize
+
+@node Loop manipulation
+@section Loop manipulation
+@cindex Loop manipulation
+
+The loops tree can be manipulated using the following functions:
+
+@itemize
+@item @code{flow_loop_tree_node_add}: Adds a node to the tree.
+@item @code{flow_loop_tree_node_remove}: Removes a node from the tree.
+@item @code{add_bb_to_loop}: Adds a basic block to a loop.
+@item @code{remove_bb_from_loops}: Removes a basic block from loops.
+@end itemize
+
+Most low-level CFG functions update loops automatically.  The following
+functions handle some more complicated cases of CFG manipulations:
+
+@itemize
+@item @code{remove_path}: Removes an edge and all blocks it dominates.
+@item @code{split_loop_exit_edge}: Splits exit edge of the loop,
+ensuring that PHI node arguments remain in the loop (this ensures that
+loop-closed SSA form is preserved).  Only useful on GIMPLE.
+@end itemize
+
+Finally, there are some higher-level loop transformations implemented.
+While some of them are written so that they should work on non-innermost
+loops, they are mostly untested in that case, and at the moment, they
+are only reliable for the innermost loops:
+
+@itemize
+@item @code{create_iv}: Creates a new induction variable.  Only works on
+GIMPLE@.  @code{standard_iv_increment_position} can be used to find a
+suitable place for the iv increment.
+@item @code{duplicate_loop_to_header_edge},
+@code{tree_duplicate_loop_to_header_edge}: These functions (on RTL and
+on GIMPLE) duplicate the body of the loop prescribed number of times on
+one of the edges entering loop header, thus performing either loop
+unrolling or loop peeling.  @code{can_duplicate_loop_p}
+(@code{can_unroll_loop_p} on GIMPLE) must be true for the duplicated
+loop.
+@item @code{loop_version}, @code{tree_ssa_loop_version}: These function
+create a copy of a loop, and a branch before them that selects one of
+them depending on the prescribed condition.  This is useful for
+optimizations that need to verify some assumptions in runtime (one of
+the copies of the loop is usually left unchanged, while the other one is
+transformed in some way).
+@item @code{tree_unroll_loop}: Unrolls the loop, including peeling the
+extra iterations to make the number of iterations divisible by unroll
+factor, updating the exit condition, and removing the exits that now
+cannot be taken.  Works only on GIMPLE.
+@end itemize
+
+@node LCSSA
+@section Loop-closed SSA form
+@cindex LCSSA
+@cindex Loop-closed SSA form
+
+Throughout the loop optimizations on tree level, one extra condition is
+enforced on the SSA form:  No SSA name is used outside of the loop in
+that it is defined.  The SSA form satisfying this condition is called
+``loop-closed SSA form'' -- LCSSA@.  To enforce LCSSA, PHI nodes must be
+created at the exits of the loops for the SSA names that are used
+outside of them.  Only the real operands (not virtual SSA names) are
+held in LCSSA, in order to save memory.
+
+There are various benefits of LCSSA:
+
+@itemize
+@item Many optimizations (value range analysis, final value
+replacement) are interested in the values that are defined in the loop
+and used outside of it, i.e., exactly those for that we create new PHI
+nodes.
+@item In induction variable analysis, it is not necessary to specify the
+loop in that the analysis should be performed -- the scalar evolution
+analysis always returns the results with respect to the loop in that the
+SSA name is defined.
+@item It makes updating of SSA form during loop transformations simpler.
+Without LCSSA, operations like loop unrolling may force creation of PHI
+nodes arbitrarily far from the loop, while in LCSSA, the SSA form can be
+updated locally.  However, since we only keep real operands in LCSSA, we
+cannot use this advantage (we could have local updating of real
+operands, but it is not much more efficient than to use generic SSA form
+updating for it as well; the amount of changes to SSA is the same).
+@end itemize
+
+However, it also means LCSSA must be updated.  This is usually
+straightforward, unless you create a new value in loop and use it
+outside, or unless you manipulate loop exit edges (functions are
+provided to make these manipulations simple).
+@code{rewrite_into_loop_closed_ssa} is used to rewrite SSA form to
+LCSSA, and @code{verify_loop_closed_ssa} to check that the invariant of
+LCSSA is preserved.
+
+@node Scalar evolutions
+@section Scalar evolutions
+@cindex Scalar evolutions
+@cindex IV analysis on GIMPLE
+
+Scalar evolutions (SCEV) are used to represent results of induction
+variable analysis on GIMPLE@.  They enable us to represent variables with
+complicated behavior in a simple and consistent way (we only use it to
+express values of polynomial induction variables, but it is possible to
+extend it).  The interfaces to SCEV analysis are declared in
+@file{tree-scalar-evolution.h}.  To use scalar evolutions analysis,
+@code{scev_initialize} must be used.  To stop using SCEV,
+@code{scev_finalize} should be used.  SCEV analysis caches results in
+order to save time and memory.  This cache however is made invalid by
+most of the loop transformations, including removal of code.  If such a
+transformation is performed, @code{scev_reset} must be called to clean
+the caches.
+
+Given an SSA name, its behavior in loops can be analyzed using the
+@code{analyze_scalar_evolution} function.  The returned SCEV however
+does not have to be fully analyzed and it may contain references to
+other SSA names defined in the loop.  To resolve these (potentially
+recursive) references, @code{instantiate_parameters} or
+@code{resolve_mixers} functions must be used.
+@code{instantiate_parameters} is useful when you use the results of SCEV
+only for some analysis, and when you work with whole nest of loops at
+once.  It will try replacing all SSA names by their SCEV in all loops,
+including the super-loops of the current loop, thus providing a complete
+information about the behavior of the variable in the loop nest.
+@code{resolve_mixers} is useful if you work with only one loop at a
+time, and if you possibly need to create code based on the value of the
+induction variable.  It will only resolve the SSA names defined in the
+current loop, leaving the SSA names defined outside unchanged, even if
+their evolution in the outer loops is known.
+
+The SCEV is a normal tree expression, except for the fact that it may
+contain several special tree nodes.  One of them is
+@code{SCEV_NOT_KNOWN}, used for SSA names whose value cannot be
+expressed.  The other one is @code{POLYNOMIAL_CHREC}.  Polynomial chrec
+has three arguments -- base, step and loop (both base and step may
+contain further polynomial chrecs).  Type of the expression and of base
+and step must be the same.  A variable has evolution
+@code{POLYNOMIAL_CHREC(base, step, loop)} if it is (in the specified
+loop) equivalent to @code{x_1} in the following example
+
+@smallexample
+while (@dots{})
+  @{
+    x_1 = phi (base, x_2);
+    x_2 = x_1 + step;
+  @}
+@end smallexample
+
+Note that this includes the language restrictions on the operations.
+For example, if we compile C code and @code{x} has signed type, then the
+overflow in addition would cause undefined behavior, and we may assume
+that this does not happen.  Hence, the value with this SCEV cannot
+overflow (which restricts the number of iterations of such a loop).
+
+In many cases, one wants to restrict the attention just to affine
+induction variables.  In this case, the extra expressive power of SCEV
+is not useful, and may complicate the optimizations.  In this case,
+@code{simple_iv} function may be used to analyze a value -- the result
+is a loop-invariant base and step.
+
+@node loop-iv
+@section IV analysis on RTL
+@cindex IV analysis on RTL
+
+The induction variable on RTL is simple and only allows analysis of
+affine induction variables, and only in one loop at once.  The interface
+is declared in @file{cfgloop.h}.  Before analyzing induction variables
+in a loop L, @code{iv_analysis_loop_init} function must be called on L.
+After the analysis (possibly calling @code{iv_analysis_loop_init} for
+several loops) is finished, @code{iv_analysis_done} should be called.
+The following functions can be used to access the results of the
+analysis:
+
+@itemize
+@item @code{iv_analyze}: Analyzes a single register used in the given
+insn.  If no use of the register in this insn is found, the following
+insns are scanned, so that this function can be called on the insn
+returned by get_condition.
+@item @code{iv_analyze_result}: Analyzes result of the assignment in the
+given insn.
+@item @code{iv_analyze_expr}: Analyzes a more complicated expression.
+All its operands are analyzed by @code{iv_analyze}, and hence they must
+be used in the specified insn or one of the following insns.
+@end itemize
+
+The description of the induction variable is provided in @code{struct
+rtx_iv}.  In order to handle subregs, the representation is a bit
+complicated; if the value of the @code{extend} field is not
+@code{UNKNOWN}, the value of the induction variable in the i-th
+iteration is
+
+@smallexample
+delta + mult * extend_@{extend_mode@} (subreg_@{mode@} (base + i * step)),
+@end smallexample
+
+with the following exception:  if @code{first_special} is true, then the
+value in the first iteration (when @code{i} is zero) is @code{delta +
+mult * base}.  However, if @code{extend} is equal to @code{UNKNOWN},
+then @code{first_special} must be false, @code{delta} 0, @code{mult} 1
+and the value in the i-th iteration is
+
+@smallexample
+subreg_@{mode@} (base + i * step)
+@end smallexample
+
+The function @code{get_iv_value} can be used to perform these
+calculations.
+
+@node Number of iterations
+@section Number of iterations analysis
+@cindex Number of iterations analysis
+
+Both on GIMPLE and on RTL, there are functions available to determine
+the number of iterations of a loop, with a similar interface.  The
+number of iterations of a loop in GCC is defined as the number of
+executions of the loop latch.  In many cases, it is not possible to
+determine the number of iterations unconditionally -- the determined
+number is correct only if some assumptions are satisfied.  The analysis
+tries to verify these conditions using the information contained in the
+program; if it fails, the conditions are returned together with the
+result.  The following information and conditions are provided by the
+analysis:
+
+@itemize
+@item @code{assumptions}: If this condition is false, the rest of
+the information is invalid.
+@item @code{noloop_assumptions} on RTL, @code{may_be_zero} on GIMPLE: If
+this condition is true, the loop exits in the first iteration.
+@item @code{infinite}: If this condition is true, the loop is infinite.
+This condition is only available on RTL@.  On GIMPLE, conditions for
+finiteness of the loop are included in @code{assumptions}.
+@item @code{niter_expr} on RTL, @code{niter} on GIMPLE: The expression
+that gives number of iterations.  The number of iterations is defined as
+the number of executions of the loop latch.
+@end itemize
+
+Both on GIMPLE and on RTL, it necessary for the induction variable
+analysis framework to be initialized (SCEV on GIMPLE, loop-iv on RTL).
+On GIMPLE, the results are stored to @code{struct tree_niter_desc}
+structure.  Number of iterations before the loop is exited through a
+given exit can be determined using @code{number_of_iterations_exit}
+function.  On RTL, the results are returned in @code{struct niter_desc}
+structure.  The corresponding function is named
+@code{check_simple_exit}.  There are also functions that pass through
+all the exits of a loop and try to find one with easy to determine
+number of iterations -- @code{find_loop_niter} on GIMPLE and
+@code{find_simple_exit} on RTL@.  Finally, there are functions that
+provide the same information, but additionally cache it, so that
+repeated calls to number of iterations are not so costly --
+@code{number_of_latch_executions} on GIMPLE and @code{get_simple_loop_desc}
+on RTL.
+
+Note that some of these functions may behave slightly differently than
+others -- some of them return only the expression for the number of
+iterations, and fail if there are some assumptions.  The function
+@code{number_of_latch_executions} works only for single-exit loops.
+The function @code{number_of_cond_exit_executions} can be used to
+determine number of executions of the exit condition of a single-exit
+loop (i.e., the @code{number_of_latch_executions} increased by one).
+
+@node Dependency analysis
+@section Data Dependency Analysis
+@cindex Data Dependency Analysis
+
+The code for the data dependence analysis can be found in
+@file{tree-data-ref.c} and its interface and data structures are
+described in @file{tree-data-ref.h}.  The function that computes the
+data dependences for all the array and pointer references for a given
+loop is @code{compute_data_dependences_for_loop}.  This function is
+currently used by the linear loop transform and the vectorization
+passes.  Before calling this function, one has to allocate two vectors:
+a first vector will contain the set of data references that are
+contained in the analyzed loop body, and the second vector will contain
+the dependence relations between the data references.  Thus if the
+vector of data references is of size @code{n}, the vector containing the
+dependence relations will contain @code{n*n} elements.  However if the
+analyzed loop contains side effects, such as calls that potentially can
+interfere with the data references in the current analyzed loop, the
+analysis stops while scanning the loop body for data references, and
+inserts a single @code{chrec_dont_know} in the dependence relation
+array.
+
+The data references are discovered in a particular order during the
+scanning of the loop body: the loop body is analyzed in execution order,
+and the data references of each statement are pushed at the end of the
+data reference array.  Two data references syntactically occur in the
+program in the same order as in the array of data references.  This
+syntactic order is important in some classical data dependence tests,
+and mapping this order to the elements of this array avoids costly
+queries to the loop body representation.
+
+Three types of data references are currently handled: ARRAY_REF, 
+INDIRECT_REF and COMPONENT_REF@. The data structure for the data reference 
+is @code{data_reference}, where @code{data_reference_p} is a name of a 
+pointer to the data reference structure. The structure contains the 
+following elements:
+
+@itemize
+@item @code{base_object_info}: Provides information about the base object 
+of the data reference and its access functions. These access functions 
+represent the evolution of the data reference in the loop relative to 
+its base, in keeping with the classical meaning of the data reference 
+access function for the support of arrays. For example, for a reference 
+@code{a.b[i][j]}, the base object is @code{a.b} and the access functions, 
+one for each array subscript, are: 
+@code{@{i_init, + i_step@}_1, @{j_init, +, j_step@}_2}.
+
+@item @code{first_location_in_loop}: Provides information about the first 
+location accessed by the data reference in the loop and about the access 
+function used to represent evolution relative to this location. This data 
+is used to support pointers, and is not used for arrays (for which we 
+have base objects). Pointer accesses are represented as a one-dimensional
+access that starts from the first location accessed in the loop. For 
+example:
+
+@smallexample
+      for1 i
+         for2 j
+          *((int *)p + i + j) = a[i][j];
+@end smallexample
+
+The access function of the pointer access is @code{@{0, + 4B@}_for2} 
+relative to @code{p + i}. The access functions of the array are 
+@code{@{i_init, + i_step@}_for1} and @code{@{j_init, +, j_step@}_for2} 
+relative to @code{a}.
+
+Usually, the object the pointer refers to is either unknown, or we can't 
+prove that the access is confined to the boundaries of a certain object. 
+
+Two data references can be compared only if at least one of these two 
+representations has all its fields filled for both data references. 
+
+The current strategy for data dependence tests is as follows: 
+If both @code{a} and @code{b} are represented as arrays, compare 
+@code{a.base_object} and @code{b.base_object};
+if they are equal, apply dependence tests (use access functions based on 
+base_objects).
+Else if both @code{a} and @code{b} are represented as pointers, compare 
+@code{a.first_location} and @code{b.first_location}; 
+if they are equal, apply dependence tests (use access functions based on 
+first location).
+However, if @code{a} and @code{b} are represented differently, only try 
+to prove that the bases are definitely different.
+
+@item Aliasing information.
+@item Alignment information.
+@end itemize
+
+The structure describing the relation between two data references is
+@code{data_dependence_relation} and the shorter name for a pointer to
+such a structure is @code{ddr_p}.  This structure contains:
+
+@itemize
+@item a pointer to each data reference,
+@item a tree node @code{are_dependent} that is set to @code{chrec_known}
+if the analysis has proved that there is no dependence between these two
+data references, @code{chrec_dont_know} if the analysis was not able to
+determine any useful result and potentially there could exist a
+dependence between these data references, and @code{are_dependent} is
+set to @code{NULL_TREE} if there exist a dependence relation between the
+data references, and the description of this dependence relation is
+given in the @code{subscripts}, @code{dir_vects}, and @code{dist_vects}
+arrays,
+@item a boolean that determines whether the dependence relation can be
+represented by a classical distance vector, 
+@item an array @code{subscripts} that contains a description of each
+subscript of the data references.  Given two array accesses a
+subscript is the tuple composed of the access functions for a given
+dimension.  For example, given @code{A[f1][f2][f3]} and
+@code{B[g1][g2][g3]}, there are three subscripts: @code{(f1, g1), (f2,
+g2), (f3, g3)}.
+@item two arrays @code{dir_vects} and @code{dist_vects} that contain
+classical representations of the data dependences under the form of
+direction and distance dependence vectors,
+@item an array of loops @code{loop_nest} that contains the loops to
+which the distance and direction vectors refer to.
+@end itemize
+
+Several functions for pretty printing the information extracted by the
+data dependence analysis are available: @code{dump_ddrs} prints with a
+maximum verbosity the details of a data dependence relations array,
+@code{dump_dist_dir_vectors} prints only the classical distance and
+direction vectors for a data dependence relations array, and
+@code{dump_data_references} prints the details of the data references
+contained in a data reference array.
+
+@node Lambda
+@section Linear loop transformations framework
+@cindex Linear loop transformations framework
+
+Lambda is a framework that allows transformations of loops using
+non-singular matrix based transformations of the iteration space and
+loop bounds. This allows compositions of skewing, scaling, interchange,
+and reversal transformations.  These transformations are often used to
+improve cache behavior or remove inner loop dependencies to allow
+parallelization and vectorization to take place.
+
+To perform these transformations, Lambda requires that the loopnest be
+converted into an internal form that can be matrix transformed easily.
+To do this conversion, the function
+@code{gcc_loopnest_to_lambda_loopnest} is provided.  If the loop cannot
+be transformed using lambda, this function will return NULL.
+
+Once a @code{lambda_loopnest} is obtained from the conversion function,
+it can be transformed by using @code{lambda_loopnest_transform}, which
+takes a transformation matrix to apply.  Note that it is up to the
+caller to verify that the transformation matrix is legal to apply to the
+loop (dependence respecting, etc).  Lambda simply applies whatever
+matrix it is told to provide.  It can be extended to make legal matrices
+out of any non-singular matrix, but this is not currently implemented.
+Legality of a matrix for a given loopnest can be verified using
+@code{lambda_transform_legal_p}.
+
+Given a transformed loopnest, conversion back into gcc IR is done by
+@code{lambda_loopnest_to_gcc_loopnest}.  This function will modify the
+loops so that they match the transformed loopnest.
+
+
+@node Omega
+@section Omega a solver for linear programming problems
+@cindex Omega a solver for linear programming problems
+
+The data dependence analysis contains several solvers triggered
+sequentially from the less complex ones to the more sophisticated.
+For ensuring the consistency of the results of these solvers, a data
+dependence check pass has been implemented based on two different
+solvers.  The second method that has been integrated to GCC is based
+on the Omega dependence solver, written in the 1990's by William Pugh
+and David Wonnacott.  Data dependence tests can be formulated using a
+subset of the Presburger arithmetics that can be translated to linear
+constraint systems.  These linear constraint systems can then be
+solved using the Omega solver.
+
+The Omega solver is using Fourier-Motzkin's algorithm for variable
+elimination: a linear constraint system containing @code{n} variables
+is reduced to a linear constraint system with @code{n-1} variables.
+The Omega solver can also be used for solving other problems that can
+be expressed under the form of a system of linear equalities and
+inequalities.  The Omega solver is known to have an exponential worst
+case, also known under the name of ``omega nightmare'' in the
+literature, but in practice, the omega test is known to be efficient
+for the common data dependence tests.
+
+The interface used by the Omega solver for describing the linear
+programming problems is described in @file{omega.h}, and the solver is
+@code{omega_solve_problem}.  
diff --git a/gcc/doc/lto.texi b/gcc/doc/lto.texi
new file mode 100644
index 000000000..73fd83156
--- /dev/null
+++ b/gcc/doc/lto.texi
@@ -0,0 +1,568 @@
+@c Copyright (c) 2010 Free Software Foundation, Inc.
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+@c Contributed by Jan Hubicka <jh@suse.cz> and
+@c Diego Novillo <dnovillo@google.com>
+
+@node LTO
+@chapter Link Time Optimization
+@cindex lto
+@cindex whopr
+@cindex wpa
+@cindex ltrans
+
+@section Design Overview
+
+Link time optimization is implemented as a GCC front end for a
+bytecode representation of GIMPLE that is emitted in special sections
+of @code{.o} files.  Currently, LTO support is enabled in most
+ELF-based systems, as well as darwin, cygwin and mingw systems.
+
+Since GIMPLE bytecode is saved alongside final object code, object
+files generated with LTO support are larger than regular object files.
+This ``fat'' object format makes it easy to integrate LTO into
+existing build systems, as one can, for instance, produce archives of
+the files.  Additionally, one might be able to ship one set of fat
+objects which could be used both for development and the production of
+optimized builds.  A, perhaps surprising, side effect of this feature
+is that any mistake in the toolchain that leads to LTO information not
+being used (e.g.@: an older @code{libtool} calling @code{ld} directly).
+This is both an advantage, as the system is more robust, and a
+disadvantage, as the user is not informed that the optimization has
+been disabled.
+
+The current implementation only produces ``fat'' objects, effectively
+doubling compilation time and increasing file sizes up to 5x the
+original size.  This hides the problem that some tools, such as
+@code{ar} and @code{nm}, need to understand symbol tables of LTO
+sections.  These tools were extended to use the plugin infrastructure,
+and with these problems solved, GCC will also support ``slim'' objects
+consisting of the intermediate code alone.
+
+At the highest level, LTO splits the compiler in two.  The first half
+(the ``writer'') produces a streaming representation of all the
+internal data structures needed to optimize and generate code.  This
+includes declarations, types, the callgraph and the GIMPLE representation
+of function bodies.
+
+When @option{-flto} is given during compilation of a source file, the
+pass manager executes all the passes in @code{all_lto_gen_passes}.
+Currently, this phase is composed of two IPA passes:
+
+@itemize @bullet
+@item @code{pass_ipa_lto_gimple_out}
+This pass executes the function @code{lto_output} in
+@file{lto-streamer-out.c}, which traverses the call graph encoding
+every reachable declaration, type and function.  This generates a
+memory representation of all the file sections described below.
+
+@item @code{pass_ipa_lto_finish_out}
+This pass executes the function @code{produce_asm_for_decls} in
+@file{lto-streamer-out.c}, which takes the memory image built in the
+previous pass and encodes it in the corresponding ELF file sections.
+@end itemize
+
+The second half of LTO support is the ``reader''.  This is implemented
+as the GCC front end @file{lto1} in @file{lto/lto.c}.  When
+@file{collect2} detects a link set of @code{.o}/@code{.a} files with
+LTO information and the @option{-flto} is enabled, it invokes
+@file{lto1} which reads the set of files and aggregates them into a
+single translation unit for optimization.  The main entry point for
+the reader is @file{lto/lto.c}:@code{lto_main}.
+
+@subsection LTO modes of operation
+
+One of the main goals of the GCC link-time infrastructure was to allow
+effective compilation of large programs.  For this reason GCC implements two
+link-time compilation modes.
+
+@enumerate
+@item	@emph{LTO mode}, in which the whole program is read into the
+compiler at link-time and optimized in a similar way as if it
+were a single source-level compilation unit.
+
+@item	@emph{WHOPR or partitioned mode}, designed to utilize multiple
+CPUs and/or a distributed compilation environment to quickly link
+large applications.  WHOPR stands for WHOle Program optimizeR (not to
+be confused with the semantics of @option{-fwhole-program}).  It
+partitions the aggregated callgraph from many different @code{.o}
+files and distributes the compilation of the sub-graphs to different
+CPUs.
+
+Note that distributed compilation is not implemented yet, but since
+the parallelism is facilitated via generating a @code{Makefile}, it
+would be easy to implement.
+@end enumerate
+
+WHOPR splits LTO into three main stages:
+@enumerate
+@item Local generation (LGEN)
+This stage executes in parallel.  Every file in the program is compiled
+into the intermediate language and packaged together with the local
+call-graph and summary information.  This stage is the same for both
+the LTO and WHOPR compilation mode.
+
+@item Whole Program Analysis (WPA)
+WPA is performed sequentially.  The global call-graph is generated, and
+a global analysis procedure makes transformation decisions.  The global
+call-graph is partitioned to facilitate parallel optimization during
+phase 3.  The results of the WPA stage are stored into new object files
+which contain the partitions of program expressed in the intermediate
+language and the optimization decisions.
+
+@item Local transformations (LTRANS)
+This stage executes in parallel.  All the decisions made during phase 2
+are implemented locally in each partitioned object file, and the final
+object code is generated.  Optimizations which cannot be decided
+efficiently during the phase 2 may be performed on the local
+call-graph partitions.
+@end enumerate
+
+WHOPR can be seen as an extension of the usual LTO mode of
+compilation.  In LTO, WPA and LTRANS are executed within a single
+execution of the compiler, after the whole program has been read into
+memory.
+
+When compiling in WHOPR mode, the callgraph is partitioned during
+the WPA stage.  The whole program is split into a given number of
+partitions of roughly the same size.  The compiler tries to
+minimize the number of references which cross partition boundaries.
+The main advantage of WHOPR is to allow the parallel execution of
+LTRANS stages, which are the most time-consuming part of the
+compilation process.  Additionally, it avoids the need to load the
+whole program into memory.
+
+
+@section LTO file sections
+
+LTO information is stored in several ELF sections inside object files.
+Data structures and enum codes for sections are defined in
+@file{lto-streamer.h}.
+
+These sections are emitted from @file{lto-streamer-out.c} and mapped
+in all at once from @file{lto/lto.c}:@code{lto_file_read}.  The
+individual functions dealing with the reading/writing of each section
+are described below.
+
+@itemize @bullet
+@item Command line options (@code{.gnu.lto_.opts})
+
+This section contains the command line options used to generate the
+object files.  This is used at link time to determine the optimization
+level and other settings when they are not explicitly specified at the
+linker command line.
+
+Currently, GCC does not support combining LTO object files compiled
+with different set of the command line options into a single binary.
+At link time, the options given on the command line and the options
+saved on all the files in a link-time set are applied globally.  No
+attempt is made at validating the combination of flags (other than the
+usual validation done by option processing).  This is implemented in
+@file{lto/lto.c}:@code{lto_read_all_file_options}.
+
+
+@item Symbol table (@code{.gnu.lto_.symtab})
+
+This table replaces the ELF symbol table for functions and variables
+represented in the LTO IL.  Symbols used and exported by the optimized
+assembly code of ``fat'' objects might not match the ones used and
+exported by the intermediate code.  This table is necessary because
+the intermediate code is less optimized and thus requires a separate
+symbol table.
+
+Additionally, the binary code in the ``fat'' object will lack a call
+to a function, since the call was optimized out at compilation time
+after the intermediate language was streamed out.  In some special
+cases, the same optimization may not happen during link-time
+optimization.  This would lead to an undefined symbol if only one
+symbol table was used.
+
+The symbol table is emitted in
+@file{lto-streamer-out.c}:@code{produce_symtab}.
+
+
+@item Global declarations and types (@code{.gnu.lto_.decls})
+
+This section contains an intermediate language dump of all
+declarations and types required to represent the callgraph, static
+variables and top-level debug info.
+
+The contents of this section are emitted in
+@file{lto-streamer-out.c}:@code{produce_asm_for_decls}.  Types and
+symbols are emitted in a topological order that preserves the sharing
+of pointers when the file is read back in
+(@file{lto.c}:@code{read_cgraph_and_symbols}).
+
+
+@item The callgraph (@code{.gnu.lto_.cgraph})
+
+This section contains the basic data structure used by the GCC
+inter-procedural optimization infrastructure.  This section stores an
+annotated multi-graph which represents the functions and call sites as
+well as the variables, aliases and top-level @code{asm} statements.
+
+This section is emitted in
+@file{lto-streamer-out.c}:@code{output_cgraph} and read in
+@file{lto-cgraph.c}:@code{input_cgraph}.
+
+
+@item IPA references (@code{.gnu.lto_.refs})
+
+This section contains references between function and static
+variables.  It is emitted by @file{lto-cgraph.c}:@code{output_refs}
+and read by @file{lto-cgraph.c}:@code{input_refs}.
+
+
+@item Function bodies (@code{.gnu.lto_.function_body.<name>})
+
+This section contains function bodies in the intermediate language
+representation.  Every function body is in a separate section to allow
+copying of the section independently to different object files or
+reading the function on demand.
+
+Functions are emitted in
+@file{lto-streamer-out.c}:@code{output_function} and read in
+@file{lto-streamer-in.c}:@code{input_function}.
+
+
+@item Static variable initializers (@code{.gnu.lto_.vars})
+
+This section contains all the symbols in the global variable pool.  It
+is emitted by @file{lto-cgraph.c}:@code{output_varpool} and read in
+@file{lto-cgraph.c}:@code{input_cgraph}.
+
+@item Summaries and optimization summaries used by IPA passes
+(@code{.gnu.lto_.<xxx>}, where @code{<xxx>} is one of @code{jmpfuncs},
+@code{pureconst} or @code{reference})
+
+These sections are used by IPA passes that need to emit summary
+information during LTO generation to be read and aggregated at
+link time.  Each pass is responsible for implementing two pass manager
+hooks: one for writing the summary and another for reading it in.  The
+format of these sections is entirely up to each individual pass.  The
+only requirement is that the writer and reader hooks agree on the
+format.
+@end itemize
+
+
+@section Using summary information in IPA passes
+
+Programs are represented internally as a @emph{callgraph} (a
+multi-graph where nodes are functions and edges are call sites)
+and a @emph{varpool} (a list of static and external variables in
+the program).
+
+The inter-procedural optimization is organized as a sequence of
+individual passes, which operate on the callgraph and the
+varpool.  To make the implementation of WHOPR possible, every
+inter-procedural optimization pass is split into several stages
+that are executed at different times during WHOPR compilation:
+
+@itemize @bullet
+@item LGEN time
+@enumerate
+@item @emph{Generate summary} (@code{generate_summary} in
+@code{struct ipa_opt_pass_d}).  This stage analyzes every function
+body and variable initializer is examined and stores relevant
+information into a pass-specific data structure.
+
+@item @emph{Write summary} (@code{write_summary} in
+@code{struct ipa_opt_pass_d}).  This stage writes all the
+pass-specific information generated by @code{generate_summary}.
+Summaries go into their own @code{LTO_section_*} sections that
+have to be declared in @file{lto-streamer.h}:@code{enum
+lto_section_type}.  A new section is created by calling
+@code{create_output_block} and data can be written using the
+@code{lto_output_*} routines.
+@end enumerate
+
+@item WPA time
+@enumerate
+@item @emph{Read summary} (@code{read_summary} in
+@code{struct ipa_opt_pass_d}).  This stage reads all the
+pass-specific information in exactly the same order that it was
+written by @code{write_summary}.
+
+@item @emph{Execute} (@code{execute} in @code{struct
+opt_pass}).  This performs inter-procedural propagation.  This
+must be done without actual access to the individual function
+bodies or variable initializers.  Typically, this results in a
+transitive closure operation over the summary information of all
+the nodes in the callgraph.
+
+@item @emph{Write optimization summary}
+(@code{write_optimization_summary} in @code{struct
+ipa_opt_pass_d}).  This writes the result of the inter-procedural
+propagation into the object file.  This can use the same data
+structures and helper routines used in @code{write_summary}.
+@end enumerate
+
+@item LTRANS time
+@enumerate
+@item @emph{Read optimization summary}
+(@code{read_optimization_summary} in @code{struct
+ipa_opt_pass_d}).  The counterpart to
+@code{write_optimization_summary}.  This reads the interprocedural
+optimization decisions in exactly the same format emitted by
+@code{write_optimization_summary}.
+
+@item @emph{Transform} (@code{function_transform} and
+@code{variable_transform} in @code{struct ipa_opt_pass_d}).
+The actual function bodies and variable initializers are updated
+based on the information passed down from the @emph{Execute} stage.
+@end enumerate
+@end itemize
+
+The implementation of the inter-procedural passes are shared
+between LTO, WHOPR and classic non-LTO compilation.
+
+@itemize
+@item During the traditional file-by-file mode every pass executes its
+own @emph{Generate summary}, @emph{Execute}, and @emph{Transform}
+stages within the single execution context of the compiler.
+
+@item In LTO compilation mode, every pass uses @emph{Generate
+summary} and @emph{Write summary} stages at compilation time,
+while the @emph{Read summary}, @emph{Execute}, and
+@emph{Transform} stages are executed at link time.
+
+@item In WHOPR mode all stages are used.
+@end itemize
+
+To simplify development, the GCC pass manager differentiates
+between normal inter-procedural passes and small inter-procedural
+passes.  A @emph{small inter-procedural pass}
+(@code{SIMPLE_IPA_PASS}) is a pass that does
+everything at once and thus it can not be executed during WPA in
+WHOPR mode.  It defines only the @emph{Execute} stage and during
+this stage it accesses and modifies the function bodies.  Such
+passes are useful for optimization at LGEN or LTRANS time and are
+used, for example, to implement early optimization before writing
+object files.  The simple inter-procedural passes can also be used
+for easier prototyping and development of a new inter-procedural
+pass.
+
+
+@subsection Virtual clones
+
+One of the main challenges of introducing the WHOPR compilation
+mode was addressing the interactions between optimization passes.
+In LTO compilation mode, the passes are executed in a sequence,
+each of which consists of analysis (or @emph{Generate summary}),
+propagation (or @emph{Execute}) and @emph{Transform} stages.
+Once the work of one pass is finished, the next pass sees the
+updated program representation and can execute.  This makes the
+individual passes dependent on each other.
+
+In WHOPR mode all passes first execute their @emph{Generate
+summary} stage.  Then summary writing marks the end of the LGEN
+stage.  At WPA time,
+the summaries are read back into memory and all passes run the
+@emph{Execute} stage.  Optimization summaries are streamed and
+sent to LTRANS, where all the passes execute the @emph{Transform}
+stage.
+
+Most optimization passes split naturally into analysis,
+propagation and transformation stages.  But some do not.  The
+main problem arises when one pass performs changes and the
+following pass gets confused by seeing different callgraphs
+between the @emph{Transform} stage and the @emph{Generate summary}
+or @emph{Execute} stage.  This means that the passes are required
+to communicate their decisions with each other.
+
+To facilitate this communication, the GCC callgraph
+infrastructure implements @emph{virtual clones}, a method of
+representing the changes performed by the optimization passes in
+the callgraph without needing to update function bodies.
+
+A @emph{virtual clone} in the callgraph is a function that has no
+associated body, just a description of how to create its body based
+on a different function (which itself may be a virtual clone).
+
+The description of function modifications includes adjustments to
+the function's signature (which allows, for example, removing or
+adding function arguments), substitutions to perform on the
+function body, and, for inlined functions, a pointer to the
+function that it will be inlined into.
+
+It is also possible to redirect any edge of the callgraph from a
+function to its virtual clone.  This implies updating of the call
+site to adjust for the new function signature.
+
+Most of the transformations performed by inter-procedural
+optimizations can be represented via virtual clones.  For
+instance, a constant propagation pass can produce a virtual clone
+of the function which replaces one of its arguments by a
+constant.  The inliner can represent its decisions by producing a
+clone of a function whose body will be later integrated into
+a given function.
+
+Using @emph{virtual clones}, the program can be easily updated
+during the @emph{Execute} stage, solving most of pass interactions
+problems that would otherwise occur during @emph{Transform}.
+
+Virtual clones are later materialized in the LTRANS stage and
+turned into real functions.  Passes executed after the virtual
+clone were introduced also perform their @emph{Transform} stage
+on new functions, so for a pass there is no significant
+difference between operating on a real function or a virtual
+clone introduced before its @emph{Execute} stage.
+
+Optimization passes then work on virtual clones introduced before
+their @emph{Execute} stage as if they were real functions.  The
+only difference is that clones are not visible during the
+@emph{Generate Summary} stage.
+
+To keep function summaries updated, the callgraph interface
+allows an optimizer to register a callback that is called every
+time a new clone is introduced as well as when the actual
+function or variable is generated or when a function or variable
+is removed.  These hooks are registered in the @emph{Generate
+summary} stage and allow the pass to keep its information intact
+until the @emph{Execute} stage.  The same hooks can also be
+registered during the @emph{Execute} stage to keep the
+optimization summaries updated for the @emph{Transform} stage.
+
+@subsection IPA references
+
+GCC represents IPA references in the callgraph.  For a function
+or variable @code{A}, the @emph{IPA reference} is a list of all
+locations where the address of @code{A} is taken and, when
+@code{A} is a variable, a list of all direct stores and reads
+to/from @code{A}.  References represent an oriented multi-graph on
+the union of nodes of the callgraph and the varpool.  See
+@file{ipa-reference.c}:@code{ipa_reference_write_optimization_summary}
+and
+@file{ipa-reference.c}:@code{ipa_reference_read_optimization_summary}
+for details.
+
+@subsection Jump functions
+Suppose that an optimization pass sees a function @code{A} and it
+knows the values of (some of) its arguments.  The @emph{jump
+function} describes the value of a parameter of a given function
+call in function @code{A} based on this knowledge.
+
+Jump functions are used by several optimizations, such as the
+inter-procedural constant propagation pass and the
+devirtualization pass.  The inliner also uses jump functions to
+perform inlining of callbacks.
+
+@section Whole program assumptions, linker plugin and symbol visibilities
+
+Link-time optimization gives relatively minor benefits when used
+alone.  The problem is that propagation of inter-procedural
+information does not work well across functions and variables
+that are called or referenced by other compilation units (such as
+from a dynamically linked library).  We say that such functions
+are variables are @emph{externally visible}.
+
+To make the situation even more difficult, many applications
+organize themselves as a set of shared libraries, and the default
+ELF visibility rules allow one to overwrite any externally
+visible symbol with a different symbol at runtime.  This
+basically disables any optimizations across such functions and
+variables, because the compiler cannot be sure that the function
+body it is seeing is the same function body that will be used at
+runtime.  Any function or variable not declared @code{static} in
+the sources degrades the quality of inter-procedural
+optimization.
+
+To avoid this problem the compiler must assume that it sees the
+whole program when doing link-time optimization.  Strictly
+speaking, the whole program is rarely visible even at link-time.
+Standard system libraries are usually linked dynamically or not
+provided with the link-time information.  In GCC, the whole
+program option (@option{-fwhole-program}) asserts that every
+function and variable defined in the current compilation
+unit is static, except for function @code{main} (note: at
+link time, the current unit is the union of all objects compiled
+with LTO).  Since some functions and variables need to
+be referenced externally, for example by another DSO or from an
+assembler file, GCC also provides the function and variable
+attribute @code{externally_visible} which can be used to disable
+the effect of @option{-fwhole-program} on a specific symbol.
+
+The whole program mode assumptions are slightly more complex in
+C++, where inline functions in headers are put into @emph{COMDAT}
+sections.  COMDAT function and variables can be defined by
+multiple object files and their bodies are unified at link-time
+and dynamic link-time.  COMDAT functions are changed to local only
+when their address is not taken and thus un-sharing them with a
+library is not harmful.  COMDAT variables always remain externally
+visible, however for readonly variables it is assumed that their
+initializers cannot be overwritten by a different value.
+
+GCC provides the function and variable attribute
+@code{visibility} that can be used to specify the visibility of
+externally visible symbols (or alternatively an
+@option{-fdefault-visibility} command line option).  ELF defines
+the @code{default}, @code{protected}, @code{hidden} and
+@code{internal} visibilities.
+
+The most commonly used is visibility is @code{hidden}.  It
+specifies that the symbol cannot be referenced from outside of
+the current shared library.  Unfortunately, this information
+cannot be used directly by the link-time optimization in the
+compiler since the whole shared library also might contain
+non-LTO objects and those are not visible to the compiler.
+
+GCC solves this problem using linker plugins.  A @emph{linker
+plugin} is an interface to the linker that allows an external
+program to claim the ownership of a given object file.  The linker
+then performs the linking procedure by querying the plugin about
+the symbol table of the claimed objects and once the linking
+decisions are complete, the plugin is allowed to provide the
+final object file before the actual linking is made.  The linker
+plugin obtains the symbol resolution information which specifies
+which symbols provided by the claimed objects are bound from the
+rest of a binary being linked.
+
+Currently, the linker plugin  works only in combination
+with the Gold linker, but a GNU ld implementation is under
+development.
+
+GCC is designed to be independent of the rest of the toolchain
+and aims to support linkers without plugin support.  For this
+reason it does not use the linker plugin by default.  Instead,
+the object files are examined by @command{collect2} before being
+passed to the linker and objects found to have LTO sections are
+passed to @command{lto1} first.  This mode does not work for
+library archives.  The decision on what object files from the
+archive are needed depends on the actual linking and thus GCC
+would have to implement the linker itself.  The resolution
+information is missing too and thus GCC needs to make an educated
+guess based on @option{-fwhole-program}.  Without the linker
+plugin GCC also assumes that symbols are declared @code{hidden}
+and not referred by non-LTO code by default.
+
+@section Internal flags controlling @code{lto1}
+
+The following flags are passed into @command{lto1} and are not
+meant to be used directly from the command line.
+
+@itemize
+@item -fwpa
+@opindex fwpa
+This option runs the serial part of the link-time optimizer
+performing the inter-procedural propagation (WPA mode).  The
+compiler reads in summary information from all inputs and
+performs an analysis based on summary information only.  It
+generates object files for subsequent runs of the link-time
+optimizer where individual object files are optimized using both
+summary information from the WPA mode and the actual function
+bodies.  It then drives the LTRANS phase.
+
+@item -fltrans
+@opindex fltrans
+This option runs the link-time optimizer in the
+local-transformation (LTRANS) mode, which reads in output from a
+previous run of the LTO in WPA mode.  In the LTRANS mode, LTO
+optimizes an object and produces the final assembly.
+
+@item -fltrans-output-list=@var{file}
+@opindex fltrans-output-list
+This option specifies a file to which the names of LTRANS output
+files are written.  This option is only meaningful in conjunction
+with @option{-fwpa}.
+@end itemize
diff --git a/gcc/doc/makefile.texi b/gcc/doc/makefile.texi
new file mode 100644
index 000000000..8e76fea57
--- /dev/null
+++ b/gcc/doc/makefile.texi
@@ -0,0 +1,193 @@
+@c Copyright (C) 2001, 2002, 2003, 2004, 2006, 2008, 2010
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Makefile
+@subsection Makefile Targets
+@cindex makefile targets
+@cindex targets, makefile
+
+These targets are available from the @samp{gcc} directory:
+
+@table @code
+@item all
+This is the default target.  Depending on what your build/host/target
+configuration is, it coordinates all the things that need to be built.
+
+@item doc
+Produce info-formatted documentation and man pages.  Essentially it
+calls @samp{make man} and @samp{make info}.
+
+@item dvi
+Produce DVI-formatted documentation.
+
+@item pdf
+Produce PDF-formatted documentation.
+
+@item html
+Produce HTML-formatted documentation.
+
+@item man
+Generate man pages.
+
+@item info
+Generate info-formatted pages.
+
+@item mostlyclean
+Delete the files made while building the compiler.
+
+@item clean
+That, and all the other files built by @samp{make all}.
+
+@item distclean
+That, and all the files created by @command{configure}.
+
+@item maintainer-clean
+Distclean plus any file that can be generated from other files.  Note
+that additional tools may be required beyond what is normally needed to
+build GCC.
+
+@item srcextra
+Generates files in the source directory that are not version-controlled but
+should go into a release tarball.
+
+@item srcinfo
+@itemx srcman
+Copies the info-formatted and manpage documentation into the source
+directory usually for the purpose of generating a release tarball.
+
+@item install
+Installs GCC.
+
+@item uninstall
+Deletes installed files, though this is not supported.
+
+@item check
+Run the testsuite.  This creates a @file{testsuite} subdirectory that
+has various @file{.sum} and @file{.log} files containing the results of
+the testing.  You can run subsets with, for example, @samp{make check-gcc}.
+You can specify specific tests by setting @env{RUNTESTFLAGS} to be the name
+of the @file{.exp} file, optionally followed by (for some tests) an equals
+and a file wildcard, like:
+
+@smallexample
+make check-gcc RUNTESTFLAGS="execute.exp=19980413-*"
+@end smallexample
+
+Note that running the testsuite may require additional tools be
+installed, such as Tcl or DejaGnu.
+@end table
+
+The toplevel tree from which you start GCC compilation is not
+the GCC directory, but rather a complex Makefile that coordinates
+the various steps of the build, including bootstrapping the compiler
+and using the new compiler to build target libraries.
+
+When GCC is configured for a native configuration, the default action
+for @command{make} is to do a full three-stage bootstrap.  This means
+that GCC is built three times---once with the native compiler, once with
+the native-built compiler it just built, and once with the compiler it
+built the second time.  In theory, the last two should produce the same
+results, which @samp{make compare} can check.  Each stage is configured
+separately and compiled into a separate directory, to minimize problems
+due to ABI incompatibilities between the native compiler and GCC.
+
+If you do a change, rebuilding will also start from the first stage
+and ``bubble'' up the change through the three stages.  Each stage
+is taken from its build directory (if it had been built previously),
+rebuilt, and copied to its subdirectory.  This will allow you to, for
+example, continue a bootstrap after fixing a bug which causes the
+stage2 build to crash.  It does not provide as good coverage of the
+compiler as bootstrapping from scratch, but it ensures that the new
+code is syntactically correct (e.g., that you did not use GCC extensions
+by mistake), and avoids spurious bootstrap comparison
+failures@footnote{Except if the compiler was buggy and miscompiled
+some of the files that were not modified.  In this case, it's best
+to use @command{make restrap}.}.
+
+Other targets available from the top level include:
+
+@table @code
+@item bootstrap-lean
+Like @code{bootstrap}, except that the various stages are removed once
+they're no longer needed.  This saves disk space.
+
+@item bootstrap2
+@itemx bootstrap2-lean
+Performs only the first two stages of bootstrap.  Unlike a three-stage
+bootstrap, this does not perform a comparison to test that the compiler
+is running properly.  Note that the disk space required by a ``lean''
+bootstrap is approximately independent of the number of stages.
+
+@item stage@var{N}-bubble (@var{N} = 1@dots{}4, profile, feedback)
+Rebuild all the stages up to @var{N}, with the appropriate flags,
+``bubbling'' the changes as described above.
+
+@item all-stage@var{N} (@var{N} = 1@dots{}4, profile, feedback)
+Assuming that stage @var{N} has already been built, rebuild it with the
+appropriate flags.  This is rarely needed.
+
+@item cleanstrap
+Remove everything (@samp{make clean}) and rebuilds (@samp{make bootstrap}).
+
+@item compare
+Compares the results of stages 2 and 3.  This ensures that the compiler
+is running properly, since it should produce the same object files
+regardless of how it itself was compiled.
+
+@item profiledbootstrap
+Builds a compiler with profiling feedback information.  In this case,
+the second and third stages are named @samp{profile} and @samp{feedback},
+respectively.  For more information, see
+@ref{Building,,Building with profile feedback,gccinstall,Installing GCC}.
+
+@item restrap
+Restart a bootstrap, so that everything that was not built with
+the system compiler is rebuilt.
+
+@item stage@var{N}-start (@var{N} = 1@dots{}4, profile, feedback)
+For each package that is bootstrapped, rename directories so that,
+for example, @file{gcc} points to the stage@var{N} GCC, compiled
+with the stage@var{N-1} GCC@footnote{Customarily, the system compiler
+is also termed the @file{stage0} GCC.}.
+
+You will invoke this target if you need to test or debug the
+stage@var{N} GCC@.  If you only need to execute GCC (but you need
+not run @samp{make} either to rebuild it or to run test suites),
+you should be able to work directly in the @file{stage@var{N}-gcc}
+directory.  This makes it easier to debug multiple stages in
+parallel.
+
+@item stage
+For each package that is bootstrapped, relocate its build directory
+to indicate its stage.  For example, if the @file{gcc} directory
+points to the stage2 GCC, after invoking this target it will be
+renamed to @file{stage2-gcc}.
+
+@end table
+
+If you wish to use non-default GCC flags when compiling the stage2 and
+stage3 compilers, set @code{BOOT_CFLAGS} on the command line when doing
+@samp{make}.
+
+Usually, the first stage only builds the languages that the compiler
+is written in: typically, C and maybe Ada.  If you are debugging a
+miscompilation of a different stage2 front-end (for example, of the
+Fortran front-end), you may want to have front-ends for other languages
+in the first stage as well.  To do so, set @code{STAGE1_LANGUAGES}
+on the command line when doing @samp{make}.
+
+For example, in the aforementioned scenario of debugging a Fortran
+front-end miscompilation caused by the stage1 compiler, you may need a
+command like
+
+@example
+make stage2-bubble STAGE1_LANGUAGES=c,fortran
+@end example
+
+Alternatively, you can use per-language targets to build and test
+languages that are not enabled by default in stage1.  For example,
+@command{make f951} will build a Fortran compiler even in the stage1
+build directory.
+
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
new file mode 100644
index 000000000..b659015a0
--- /dev/null
+++ b/gcc/doc/md.texi
@@ -0,0 +1,8486 @@
+@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1996, 1998, 1999, 2000, 2001,
+@c 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@ifset INTERNALS
+@node Machine Desc
+@chapter Machine Descriptions
+@cindex machine descriptions
+
+A machine description has two parts: a file of instruction patterns
+(@file{.md} file) and a C header file of macro definitions.
+
+The @file{.md} file for a target machine contains a pattern for each
+instruction that the target machine supports (or at least each instruction
+that is worth telling the compiler about).  It may also contain comments.
+A semicolon causes the rest of the line to be a comment, unless the semicolon
+is inside a quoted string.
+
+See the next chapter for information on the C header file.
+
+@menu
+* Overview::            How the machine description is used.
+* Patterns::            How to write instruction patterns.
+* Example::             An explained example of a @code{define_insn} pattern.
+* RTL Template::        The RTL template defines what insns match a pattern.
+* Output Template::     The output template says how to make assembler code
+                        from such an insn.
+* Output Statement::    For more generality, write C code to output
+                        the assembler code.
+* Predicates::          Controlling what kinds of operands can be used
+                        for an insn.
+* Constraints::         Fine-tuning operand selection.
+* Standard Names::      Names mark patterns to use for code generation.
+* Pattern Ordering::    When the order of patterns makes a difference.
+* Dependent Patterns::  Having one pattern may make you need another.
+* Jump Patterns::       Special considerations for patterns for jump insns.
+* Looping Patterns::    How to define patterns for special looping insns.
+* Insn Canonicalizations::Canonicalization of Instructions
+* Expander Definitions::Generating a sequence of several RTL insns
+                        for a standard operation.
+* Insn Splitting::      Splitting Instructions into Multiple Instructions.
+* Including Patterns::  Including Patterns in Machine Descriptions.
+* Peephole Definitions::Defining machine-specific peephole optimizations.
+* Insn Attributes::     Specifying the value of attributes for generated insns.
+* Conditional Execution::Generating @code{define_insn} patterns for
+                         predication.
+* Constant Definitions::Defining symbolic constants that can be used in the
+                        md file.
+* Iterators::           Using iterators to generate patterns from a template.
+@end menu
+
+@node Overview
+@section Overview of How the Machine Description is Used
+
+There are three main conversions that happen in the compiler:
+
+@enumerate
+
+@item
+The front end reads the source code and builds a parse tree.
+
+@item
+The parse tree is used to generate an RTL insn list based on named
+instruction patterns.
+
+@item
+The insn list is matched against the RTL templates to produce assembler
+code.
+
+@end enumerate
+
+For the generate pass, only the names of the insns matter, from either a
+named @code{define_insn} or a @code{define_expand}.  The compiler will
+choose the pattern with the right name and apply the operands according
+to the documentation later in this chapter, without regard for the RTL
+template or operand constraints.  Note that the names the compiler looks
+for are hard-coded in the compiler---it will ignore unnamed patterns and
+patterns with names it doesn't know about, but if you don't provide a
+named pattern it needs, it will abort.
+
+If a @code{define_insn} is used, the template given is inserted into the
+insn list.  If a @code{define_expand} is used, one of three things
+happens, based on the condition logic.  The condition logic may manually
+create new insns for the insn list, say via @code{emit_insn()}, and
+invoke @code{DONE}.  For certain named patterns, it may invoke @code{FAIL} to tell the
+compiler to use an alternate way of performing that task.  If it invokes
+neither @code{DONE} nor @code{FAIL}, the template given in the pattern
+is inserted, as if the @code{define_expand} were a @code{define_insn}.
+
+Once the insn list is generated, various optimization passes convert,
+replace, and rearrange the insns in the insn list.  This is where the
+@code{define_split} and @code{define_peephole} patterns get used, for
+example.
+
+Finally, the insn list's RTL is matched up with the RTL templates in the
+@code{define_insn} patterns, and those patterns are used to emit the
+final assembly code.  For this purpose, each named @code{define_insn}
+acts like it's unnamed, since the names are ignored.
+
+@node Patterns
+@section Everything about Instruction Patterns
+@cindex patterns
+@cindex instruction patterns
+
+@findex define_insn
+Each instruction pattern contains an incomplete RTL expression, with pieces
+to be filled in later, operand constraints that restrict how the pieces can
+be filled in, and an output pattern or C code to generate the assembler
+output, all wrapped up in a @code{define_insn} expression.
+
+A @code{define_insn} is an RTL expression containing four or five operands:
+
+@enumerate
+@item
+An optional name.  The presence of a name indicate that this instruction
+pattern can perform a certain standard job for the RTL-generation
+pass of the compiler.  This pass knows certain names and will use
+the instruction patterns with those names, if the names are defined
+in the machine description.
+
+The absence of a name is indicated by writing an empty string
+where the name should go.  Nameless instruction patterns are never
+used for generating RTL code, but they may permit several simpler insns
+to be combined later on.
+
+Names that are not thus known and used in RTL-generation have no
+effect; they are equivalent to no name at all.
+
+For the purpose of debugging the compiler, you may also specify a
+name beginning with the @samp{*} character.  Such a name is used only
+for identifying the instruction in RTL dumps; it is entirely equivalent
+to having a nameless pattern for all other purposes.
+
+@item
+The @dfn{RTL template} (@pxref{RTL Template}) is a vector of incomplete
+RTL expressions which show what the instruction should look like.  It is
+incomplete because it may contain @code{match_operand},
+@code{match_operator}, and @code{match_dup} expressions that stand for
+operands of the instruction.
+
+If the vector has only one element, that element is the template for the
+instruction pattern.  If the vector has multiple elements, then the
+instruction pattern is a @code{parallel} expression containing the
+elements described.
+
+@item
+@cindex pattern conditions
+@cindex conditions, in patterns
+A condition.  This is a string which contains a C expression that is
+the final test to decide whether an insn body matches this pattern.
+
+@cindex named patterns and conditions
+For a named pattern, the condition (if present) may not depend on
+the data in the insn being matched, but only the target-machine-type
+flags.  The compiler needs to test these conditions during
+initialization in order to learn exactly which named instructions are
+available in a particular run.
+
+@findex operands
+For nameless patterns, the condition is applied only when matching an
+individual insn, and only after the insn has matched the pattern's
+recognition template.  The insn's operands may be found in the vector
+@code{operands}.  For an insn where the condition has once matched, it
+can't be used to control register allocation, for example by excluding
+certain hard registers or hard register combinations.
+
+@item
+The @dfn{output template}: a string that says how to output matching
+insns as assembler code.  @samp{%} in this string specifies where
+to substitute the value of an operand.  @xref{Output Template}.
+
+When simple substitution isn't general enough, you can specify a piece
+of C code to compute the output.  @xref{Output Statement}.
+
+@item
+Optionally, a vector containing the values of attributes for insns matching
+this pattern.  @xref{Insn Attributes}.
+@end enumerate
+
+@node Example
+@section Example of @code{define_insn}
+@cindex @code{define_insn} example
+
+Here is an actual example of an instruction pattern, for the 68000/68020.
+
+@smallexample
+(define_insn "tstsi"
+  [(set (cc0)
+        (match_operand:SI 0 "general_operand" "rm"))]
+  ""
+  "*
+@{
+  if (TARGET_68020 || ! ADDRESS_REG_P (operands[0]))
+    return \"tstl %0\";
+  return \"cmpl #0,%0\";
+@}")
+@end smallexample
+
+@noindent
+This can also be written using braced strings:
+
+@smallexample
+(define_insn "tstsi"
+  [(set (cc0)
+        (match_operand:SI 0 "general_operand" "rm"))]
+  ""
+@{
+  if (TARGET_68020 || ! ADDRESS_REG_P (operands[0]))
+    return "tstl %0";
+  return "cmpl #0,%0";
+@})
+@end smallexample
+
+This is an instruction that sets the condition codes based on the value of
+a general operand.  It has no condition, so any insn whose RTL description
+has the form shown may be handled according to this pattern.  The name
+@samp{tstsi} means ``test a @code{SImode} value'' and tells the RTL generation
+pass that, when it is necessary to test such a value, an insn to do so
+can be constructed using this pattern.
+
+The output control string is a piece of C code which chooses which
+output template to return based on the kind of operand and the specific
+type of CPU for which code is being generated.
+
+@samp{"rm"} is an operand constraint.  Its meaning is explained below.
+
+@node RTL Template
+@section RTL Template
+@cindex RTL insn template
+@cindex generating insns
+@cindex insns, generating
+@cindex recognizing insns
+@cindex insns, recognizing
+
+The RTL template is used to define which insns match the particular pattern
+and how to find their operands.  For named patterns, the RTL template also
+says how to construct an insn from specified operands.
+
+Construction involves substituting specified operands into a copy of the
+template.  Matching involves determining the values that serve as the
+operands in the insn being matched.  Both of these activities are
+controlled by special expression types that direct matching and
+substitution of the operands.
+
+@table @code
+@findex match_operand
+@item (match_operand:@var{m} @var{n} @var{predicate} @var{constraint})
+This expression is a placeholder for operand number @var{n} of
+the insn.  When constructing an insn, operand number @var{n}
+will be substituted at this point.  When matching an insn, whatever
+appears at this position in the insn will be taken as operand
+number @var{n}; but it must satisfy @var{predicate} or this instruction
+pattern will not match at all.
+
+Operand numbers must be chosen consecutively counting from zero in
+each instruction pattern.  There may be only one @code{match_operand}
+expression in the pattern for each operand number.  Usually operands
+are numbered in the order of appearance in @code{match_operand}
+expressions.  In the case of a @code{define_expand}, any operand numbers
+used only in @code{match_dup} expressions have higher values than all
+other operand numbers.
+
+@var{predicate} is a string that is the name of a function that
+accepts two arguments, an expression and a machine mode.
+@xref{Predicates}.  During matching, the function will be called with
+the putative operand as the expression and @var{m} as the mode
+argument (if @var{m} is not specified, @code{VOIDmode} will be used,
+which normally causes @var{predicate} to accept any mode).  If it
+returns zero, this instruction pattern fails to match.
+@var{predicate} may be an empty string; then it means no test is to be
+done on the operand, so anything which occurs in this position is
+valid.
+
+Most of the time, @var{predicate} will reject modes other than @var{m}---but
+not always.  For example, the predicate @code{address_operand} uses
+@var{m} as the mode of memory ref that the address should be valid for.
+Many predicates accept @code{const_int} nodes even though their mode is
+@code{VOIDmode}.
+
+@var{constraint} controls reloading and the choice of the best register
+class to use for a value, as explained later (@pxref{Constraints}).
+If the constraint would be an empty string, it can be omitted.
+
+People are often unclear on the difference between the constraint and the
+predicate.  The predicate helps decide whether a given insn matches the
+pattern.  The constraint plays no role in this decision; instead, it
+controls various decisions in the case of an insn which does match.
+
+@findex match_scratch
+@item (match_scratch:@var{m} @var{n} @var{constraint})
+This expression is also a placeholder for operand number @var{n}
+and indicates that operand must be a @code{scratch} or @code{reg}
+expression.
+
+When matching patterns, this is equivalent to
+
+@smallexample
+(match_operand:@var{m} @var{n} "scratch_operand" @var{pred})
+@end smallexample
+
+but, when generating RTL, it produces a (@code{scratch}:@var{m})
+expression.
+
+If the last few expressions in a @code{parallel} are @code{clobber}
+expressions whose operands are either a hard register or
+@code{match_scratch}, the combiner can add or delete them when
+necessary.  @xref{Side Effects}.
+
+@findex match_dup
+@item (match_dup @var{n})
+This expression is also a placeholder for operand number @var{n}.
+It is used when the operand needs to appear more than once in the
+insn.
+
+In construction, @code{match_dup} acts just like @code{match_operand}:
+the operand is substituted into the insn being constructed.  But in
+matching, @code{match_dup} behaves differently.  It assumes that operand
+number @var{n} has already been determined by a @code{match_operand}
+appearing earlier in the recognition template, and it matches only an
+identical-looking expression.
+
+Note that @code{match_dup} should not be used to tell the compiler that
+a particular register is being used for two operands (example:
+@code{add} that adds one register to another; the second register is
+both an input operand and the output operand).  Use a matching
+constraint (@pxref{Simple Constraints}) for those.  @code{match_dup} is for the cases where one
+operand is used in two places in the template, such as an instruction
+that computes both a quotient and a remainder, where the opcode takes
+two input operands but the RTL template has to refer to each of those
+twice; once for the quotient pattern and once for the remainder pattern.
+
+@findex match_operator
+@item (match_operator:@var{m} @var{n} @var{predicate} [@var{operands}@dots{}])
+This pattern is a kind of placeholder for a variable RTL expression
+code.
+
+When constructing an insn, it stands for an RTL expression whose
+expression code is taken from that of operand @var{n}, and whose
+operands are constructed from the patterns @var{operands}.
+
+When matching an expression, it matches an expression if the function
+@var{predicate} returns nonzero on that expression @emph{and} the
+patterns @var{operands} match the operands of the expression.
+
+Suppose that the function @code{commutative_operator} is defined as
+follows, to match any expression whose operator is one of the
+commutative arithmetic operators of RTL and whose mode is @var{mode}:
+
+@smallexample
+int
+commutative_integer_operator (x, mode)
+     rtx x;
+     enum machine_mode mode;
+@{
+  enum rtx_code code = GET_CODE (x);
+  if (GET_MODE (x) != mode)
+    return 0;
+  return (GET_RTX_CLASS (code) == RTX_COMM_ARITH
+          || code == EQ || code == NE);
+@}
+@end smallexample
+
+Then the following pattern will match any RTL expression consisting
+of a commutative operator applied to two general operands:
+
+@smallexample
+(match_operator:SI 3 "commutative_operator"
+  [(match_operand:SI 1 "general_operand" "g")
+   (match_operand:SI 2 "general_operand" "g")])
+@end smallexample
+
+Here the vector @code{[@var{operands}@dots{}]} contains two patterns
+because the expressions to be matched all contain two operands.
+
+When this pattern does match, the two operands of the commutative
+operator are recorded as operands 1 and 2 of the insn.  (This is done
+by the two instances of @code{match_operand}.)  Operand 3 of the insn
+will be the entire commutative expression: use @code{GET_CODE
+(operands[3])} to see which commutative operator was used.
+
+The machine mode @var{m} of @code{match_operator} works like that of
+@code{match_operand}: it is passed as the second argument to the
+predicate function, and that function is solely responsible for
+deciding whether the expression to be matched ``has'' that mode.
+
+When constructing an insn, argument 3 of the gen-function will specify
+the operation (i.e.@: the expression code) for the expression to be
+made.  It should be an RTL expression, whose expression code is copied
+into a new expression whose operands are arguments 1 and 2 of the
+gen-function.  The subexpressions of argument 3 are not used;
+only its expression code matters.
+
+When @code{match_operator} is used in a pattern for matching an insn,
+it usually best if the operand number of the @code{match_operator}
+is higher than that of the actual operands of the insn.  This improves
+register allocation because the register allocator often looks at
+operands 1 and 2 of insns to see if it can do register tying.
+
+There is no way to specify constraints in @code{match_operator}.  The
+operand of the insn which corresponds to the @code{match_operator}
+never has any constraints because it is never reloaded as a whole.
+However, if parts of its @var{operands} are matched by
+@code{match_operand} patterns, those parts may have constraints of
+their own.
+
+@findex match_op_dup
+@item (match_op_dup:@var{m} @var{n}[@var{operands}@dots{}])
+Like @code{match_dup}, except that it applies to operators instead of
+operands.  When constructing an insn, operand number @var{n} will be
+substituted at this point.  But in matching, @code{match_op_dup} behaves
+differently.  It assumes that operand number @var{n} has already been
+determined by a @code{match_operator} appearing earlier in the
+recognition template, and it matches only an identical-looking
+expression.
+
+@findex match_parallel
+@item (match_parallel @var{n} @var{predicate} [@var{subpat}@dots{}])
+This pattern is a placeholder for an insn that consists of a
+@code{parallel} expression with a variable number of elements.  This
+expression should only appear at the top level of an insn pattern.
+
+When constructing an insn, operand number @var{n} will be substituted at
+this point.  When matching an insn, it matches if the body of the insn
+is a @code{parallel} expression with at least as many elements as the
+vector of @var{subpat} expressions in the @code{match_parallel}, if each
+@var{subpat} matches the corresponding element of the @code{parallel},
+@emph{and} the function @var{predicate} returns nonzero on the
+@code{parallel} that is the body of the insn.  It is the responsibility
+of the predicate to validate elements of the @code{parallel} beyond
+those listed in the @code{match_parallel}.
+
+A typical use of @code{match_parallel} is to match load and store
+multiple expressions, which can contain a variable number of elements
+in a @code{parallel}.  For example,
+
+@smallexample
+(define_insn ""
+  [(match_parallel 0 "load_multiple_operation"
+     [(set (match_operand:SI 1 "gpc_reg_operand" "=r")
+           (match_operand:SI 2 "memory_operand" "m"))
+      (use (reg:SI 179))
+      (clobber (reg:SI 179))])]
+  ""
+  "loadm 0,0,%1,%2")
+@end smallexample
+
+This example comes from @file{a29k.md}.  The function
+@code{load_multiple_operation} is defined in @file{a29k.c} and checks
+that subsequent elements in the @code{parallel} are the same as the
+@code{set} in the pattern, except that they are referencing subsequent
+registers and memory locations.
+
+An insn that matches this pattern might look like:
+
+@smallexample
+(parallel
+ [(set (reg:SI 20) (mem:SI (reg:SI 100)))
+  (use (reg:SI 179))
+  (clobber (reg:SI 179))
+  (set (reg:SI 21)
+       (mem:SI (plus:SI (reg:SI 100)
+                        (const_int 4))))
+  (set (reg:SI 22)
+       (mem:SI (plus:SI (reg:SI 100)
+                        (const_int 8))))])
+@end smallexample
+
+@findex match_par_dup
+@item (match_par_dup @var{n} [@var{subpat}@dots{}])
+Like @code{match_op_dup}, but for @code{match_parallel} instead of
+@code{match_operator}.
+
+@end table
+
+@node Output Template
+@section Output Templates and Operand Substitution
+@cindex output templates
+@cindex operand substitution
+
+@cindex @samp{%} in template
+@cindex percent sign
+The @dfn{output template} is a string which specifies how to output the
+assembler code for an instruction pattern.  Most of the template is a
+fixed string which is output literally.  The character @samp{%} is used
+to specify where to substitute an operand; it can also be used to
+identify places where different variants of the assembler require
+different syntax.
+
+In the simplest case, a @samp{%} followed by a digit @var{n} says to output
+operand @var{n} at that point in the string.
+
+@samp{%} followed by a letter and a digit says to output an operand in an
+alternate fashion.  Four letters have standard, built-in meanings described
+below.  The machine description macro @code{PRINT_OPERAND} can define
+additional letters with nonstandard meanings.
+
+@samp{%c@var{digit}} can be used to substitute an operand that is a
+constant value without the syntax that normally indicates an immediate
+operand.
+
+@samp{%n@var{digit}} is like @samp{%c@var{digit}} except that the value of
+the constant is negated before printing.
+
+@samp{%a@var{digit}} can be used to substitute an operand as if it were a
+memory reference, with the actual operand treated as the address.  This may
+be useful when outputting a ``load address'' instruction, because often the
+assembler syntax for such an instruction requires you to write the operand
+as if it were a memory reference.
+
+@samp{%l@var{digit}} is used to substitute a @code{label_ref} into a jump
+instruction.
+
+@samp{%=} outputs a number which is unique to each instruction in the
+entire compilation.  This is useful for making local labels to be
+referred to more than once in a single template that generates multiple
+assembler instructions.
+
+@samp{%} followed by a punctuation character specifies a substitution that
+does not use an operand.  Only one case is standard: @samp{%%} outputs a
+@samp{%} into the assembler code.  Other nonstandard cases can be
+defined in the @code{PRINT_OPERAND} macro.  You must also define
+which punctuation characters are valid with the
+@code{PRINT_OPERAND_PUNCT_VALID_P} macro.
+
+@cindex \
+@cindex backslash
+The template may generate multiple assembler instructions.  Write the text
+for the instructions, with @samp{\;} between them.
+
+@cindex matching operands
+When the RTL contains two operands which are required by constraint to match
+each other, the output template must refer only to the lower-numbered operand.
+Matching operands are not always identical, and the rest of the compiler
+arranges to put the proper RTL expression for printing into the lower-numbered
+operand.
+
+One use of nonstandard letters or punctuation following @samp{%} is to
+distinguish between different assembler languages for the same machine; for
+example, Motorola syntax versus MIT syntax for the 68000.  Motorola syntax
+requires periods in most opcode names, while MIT syntax does not.  For
+example, the opcode @samp{movel} in MIT syntax is @samp{move.l} in Motorola
+syntax.  The same file of patterns is used for both kinds of output syntax,
+but the character sequence @samp{%.} is used in each place where Motorola
+syntax wants a period.  The @code{PRINT_OPERAND} macro for Motorola syntax
+defines the sequence to output a period; the macro for MIT syntax defines
+it to do nothing.
+
+@cindex @code{#} in template
+As a special case, a template consisting of the single character @code{#}
+instructs the compiler to first split the insn, and then output the
+resulting instructions separately.  This helps eliminate redundancy in the
+output templates.   If you have a @code{define_insn} that needs to emit
+multiple assembler instructions, and there is a matching @code{define_split}
+already defined, then you can simply use @code{#} as the output template
+instead of writing an output template that emits the multiple assembler
+instructions.
+
+If the macro @code{ASSEMBLER_DIALECT} is defined, you can use construct
+of the form @samp{@{option0|option1|option2@}} in the templates.  These
+describe multiple variants of assembler language syntax.
+@xref{Instruction Output}.
+
+@node Output Statement
+@section C Statements for Assembler Output
+@cindex output statements
+@cindex C statements for assembler output
+@cindex generating assembler output
+
+Often a single fixed template string cannot produce correct and efficient
+assembler code for all the cases that are recognized by a single
+instruction pattern.  For example, the opcodes may depend on the kinds of
+operands; or some unfortunate combinations of operands may require extra
+machine instructions.
+
+If the output control string starts with a @samp{@@}, then it is actually
+a series of templates, each on a separate line.  (Blank lines and
+leading spaces and tabs are ignored.)  The templates correspond to the
+pattern's constraint alternatives (@pxref{Multi-Alternative}).  For example,
+if a target machine has a two-address add instruction @samp{addr} to add
+into a register and another @samp{addm} to add a register to memory, you
+might write this pattern:
+
+@smallexample
+(define_insn "addsi3"
+  [(set (match_operand:SI 0 "general_operand" "=r,m")
+        (plus:SI (match_operand:SI 1 "general_operand" "0,0")
+                 (match_operand:SI 2 "general_operand" "g,r")))]
+  ""
+  "@@
+   addr %2,%0
+   addm %2,%0")
+@end smallexample
+
+@cindex @code{*} in template
+@cindex asterisk in template
+If the output control string starts with a @samp{*}, then it is not an
+output template but rather a piece of C program that should compute a
+template.  It should execute a @code{return} statement to return the
+template-string you want.  Most such templates use C string literals, which
+require doublequote characters to delimit them.  To include these
+doublequote characters in the string, prefix each one with @samp{\}.
+
+If the output control string is written as a brace block instead of a
+double-quoted string, it is automatically assumed to be C code.  In that
+case, it is not necessary to put in a leading asterisk, or to escape the
+doublequotes surrounding C string literals.
+
+The operands may be found in the array @code{operands}, whose C data type
+is @code{rtx []}.
+
+It is very common to select different ways of generating assembler code
+based on whether an immediate operand is within a certain range.  Be
+careful when doing this, because the result of @code{INTVAL} is an
+integer on the host machine.  If the host machine has more bits in an
+@code{int} than the target machine has in the mode in which the constant
+will be used, then some of the bits you get from @code{INTVAL} will be
+superfluous.  For proper results, you must carefully disregard the
+values of those bits.
+
+@findex output_asm_insn
+It is possible to output an assembler instruction and then go on to output
+or compute more of them, using the subroutine @code{output_asm_insn}.  This
+receives two arguments: a template-string and a vector of operands.  The
+vector may be @code{operands}, or it may be another array of @code{rtx}
+that you declare locally and initialize yourself.
+
+@findex which_alternative
+When an insn pattern has multiple alternatives in its constraints, often
+the appearance of the assembler code is determined mostly by which alternative
+was matched.  When this is so, the C code can test the variable
+@code{which_alternative}, which is the ordinal number of the alternative
+that was actually satisfied (0 for the first, 1 for the second alternative,
+etc.).
+
+For example, suppose there are two opcodes for storing zero, @samp{clrreg}
+for registers and @samp{clrmem} for memory locations.  Here is how
+a pattern could use @code{which_alternative} to choose between them:
+
+@smallexample
+(define_insn ""
+  [(set (match_operand:SI 0 "general_operand" "=r,m")
+        (const_int 0))]
+  ""
+  @{
+  return (which_alternative == 0
+          ? "clrreg %0" : "clrmem %0");
+  @})
+@end smallexample
+
+The example above, where the assembler code to generate was
+@emph{solely} determined by the alternative, could also have been specified
+as follows, having the output control string start with a @samp{@@}:
+
+@smallexample
+@group
+(define_insn ""
+  [(set (match_operand:SI 0 "general_operand" "=r,m")
+        (const_int 0))]
+  ""
+  "@@
+   clrreg %0
+   clrmem %0")
+@end group
+@end smallexample
+
+@node Predicates
+@section Predicates
+@cindex predicates
+@cindex operand predicates
+@cindex operator predicates
+
+A predicate determines whether a @code{match_operand} or
+@code{match_operator} expression matches, and therefore whether the
+surrounding instruction pattern will be used for that combination of
+operands.  GCC has a number of machine-independent predicates, and you
+can define machine-specific predicates as needed.  By convention,
+predicates used with @code{match_operand} have names that end in
+@samp{_operand}, and those used with @code{match_operator} have names
+that end in @samp{_operator}.
+
+All predicates are Boolean functions (in the mathematical sense) of
+two arguments: the RTL expression that is being considered at that
+position in the instruction pattern, and the machine mode that the
+@code{match_operand} or @code{match_operator} specifies.  In this
+section, the first argument is called @var{op} and the second argument
+@var{mode}.  Predicates can be called from C as ordinary two-argument
+functions; this can be useful in output templates or other
+machine-specific code.
+
+Operand predicates can allow operands that are not actually acceptable
+to the hardware, as long as the constraints give reload the ability to
+fix them up (@pxref{Constraints}).  However, GCC will usually generate
+better code if the predicates specify the requirements of the machine
+instructions as closely as possible.  Reload cannot fix up operands
+that must be constants (``immediate operands''); you must use a
+predicate that allows only constants, or else enforce the requirement
+in the extra condition.
+
+@cindex predicates and machine modes
+@cindex normal predicates
+@cindex special predicates
+Most predicates handle their @var{mode} argument in a uniform manner.
+If @var{mode} is @code{VOIDmode} (unspecified), then @var{op} can have
+any mode.  If @var{mode} is anything else, then @var{op} must have the
+same mode, unless @var{op} is a @code{CONST_INT} or integer
+@code{CONST_DOUBLE}.  These RTL expressions always have
+@code{VOIDmode}, so it would be counterproductive to check that their
+mode matches.  Instead, predicates that accept @code{CONST_INT} and/or
+integer @code{CONST_DOUBLE} check that the value stored in the
+constant will fit in the requested mode.
+
+Predicates with this behavior are called @dfn{normal}.
+@command{genrecog} can optimize the instruction recognizer based on
+knowledge of how normal predicates treat modes.  It can also diagnose
+certain kinds of common errors in the use of normal predicates; for
+instance, it is almost always an error to use a normal predicate
+without specifying a mode.
+
+Predicates that do something different with their @var{mode} argument
+are called @dfn{special}.  The generic predicates
+@code{address_operand} and @code{pmode_register_operand} are special
+predicates.  @command{genrecog} does not do any optimizations or
+diagnosis when special predicates are used.
+
+@menu
+* Machine-Independent Predicates::  Predicates available to all back ends.
+* Defining Predicates::             How to write machine-specific predicate
+                                    functions.
+@end menu
+
+@node Machine-Independent Predicates
+@subsection Machine-Independent Predicates
+@cindex machine-independent predicates
+@cindex generic predicates
+
+These are the generic predicates available to all back ends.  They are
+defined in @file{recog.c}.  The first category of predicates allow
+only constant, or @dfn{immediate}, operands.
+
+@defun immediate_operand
+This predicate allows any sort of constant that fits in @var{mode}.
+It is an appropriate choice for instructions that take operands that
+must be constant.
+@end defun
+
+@defun const_int_operand
+This predicate allows any @code{CONST_INT} expression that fits in
+@var{mode}.  It is an appropriate choice for an immediate operand that
+does not allow a symbol or label.
+@end defun
+
+@defun const_double_operand
+This predicate accepts any @code{CONST_DOUBLE} expression that has
+exactly @var{mode}.  If @var{mode} is @code{VOIDmode}, it will also
+accept @code{CONST_INT}.  It is intended for immediate floating point
+constants.
+@end defun
+
+@noindent
+The second category of predicates allow only some kind of machine
+register.
+
+@defun register_operand
+This predicate allows any @code{REG} or @code{SUBREG} expression that
+is valid for @var{mode}.  It is often suitable for arithmetic
+instruction operands on a RISC machine.
+@end defun
+
+@defun pmode_register_operand
+This is a slight variant on @code{register_operand} which works around
+a limitation in the machine-description reader.
+
+@smallexample
+(match_operand @var{n} "pmode_register_operand" @var{constraint})
+@end smallexample
+
+@noindent
+means exactly what
+
+@smallexample
+(match_operand:P @var{n} "register_operand" @var{constraint})
+@end smallexample
+
+@noindent
+would mean, if the machine-description reader accepted @samp{:P}
+mode suffixes.  Unfortunately, it cannot, because @code{Pmode} is an
+alias for some other mode, and might vary with machine-specific
+options.  @xref{Misc}.
+@end defun
+
+@defun scratch_operand
+This predicate allows hard registers and @code{SCRATCH} expressions,
+but not pseudo-registers.  It is used internally by @code{match_scratch};
+it should not be used directly.
+@end defun
+
+@noindent
+The third category of predicates allow only some kind of memory reference.
+
+@defun memory_operand
+This predicate allows any valid reference to a quantity of mode
+@var{mode} in memory, as determined by the weak form of
+@code{GO_IF_LEGITIMATE_ADDRESS} (@pxref{Addressing Modes}).
+@end defun
+
+@defun address_operand
+This predicate is a little unusual; it allows any operand that is a
+valid expression for the @emph{address} of a quantity of mode
+@var{mode}, again determined by the weak form of
+@code{GO_IF_LEGITIMATE_ADDRESS}.  To first order, if
+@samp{@w{(mem:@var{mode} (@var{exp}))}} is acceptable to
+@code{memory_operand}, then @var{exp} is acceptable to
+@code{address_operand}.  Note that @var{exp} does not necessarily have
+the mode @var{mode}.
+@end defun
+
+@defun indirect_operand
+This is a stricter form of @code{memory_operand} which allows only
+memory references with a @code{general_operand} as the address
+expression.  New uses of this predicate are discouraged, because
+@code{general_operand} is very permissive, so it's hard to tell what
+an @code{indirect_operand} does or does not allow.  If a target has
+different requirements for memory operands for different instructions,
+it is better to define target-specific predicates which enforce the
+hardware's requirements explicitly.
+@end defun
+
+@defun push_operand
+This predicate allows a memory reference suitable for pushing a value
+onto the stack.  This will be a @code{MEM} which refers to
+@code{stack_pointer_rtx}, with a side-effect in its address expression
+(@pxref{Incdec}); which one is determined by the
+@code{STACK_PUSH_CODE} macro (@pxref{Frame Layout}).
+@end defun
+
+@defun pop_operand
+This predicate allows a memory reference suitable for popping a value
+off the stack.  Again, this will be a @code{MEM} referring to
+@code{stack_pointer_rtx}, with a side-effect in its address
+expression.  However, this time @code{STACK_POP_CODE} is expected.
+@end defun
+
+@noindent
+The fourth category of predicates allow some combination of the above
+operands.
+
+@defun nonmemory_operand
+This predicate allows any immediate or register operand valid for @var{mode}.
+@end defun
+
+@defun nonimmediate_operand
+This predicate allows any register or memory operand valid for @var{mode}.
+@end defun
+
+@defun general_operand
+This predicate allows any immediate, register, or memory operand
+valid for @var{mode}.
+@end defun
+
+@noindent
+Finally, there are two generic operator predicates.
+
+@defun comparison_operator
+This predicate matches any expression which performs an arithmetic
+comparison in @var{mode}; that is, @code{COMPARISON_P} is true for the
+expression code.
+@end defun
+
+@defun ordered_comparison_operator
+This predicate matches any expression which performs an arithmetic
+comparison in @var{mode} and whose expression code is valid for integer
+modes; that is, the expression code will be one of @code{eq}, @code{ne},
+@code{lt}, @code{ltu}, @code{le}, @code{leu}, @code{gt}, @code{gtu},
+@code{ge}, @code{geu}.
+@end defun
+
+@node Defining Predicates
+@subsection Defining Machine-Specific Predicates
+@cindex defining predicates
+@findex define_predicate
+@findex define_special_predicate
+
+Many machines have requirements for their operands that cannot be
+expressed precisely using the generic predicates.  You can define
+additional predicates using @code{define_predicate} and
+@code{define_special_predicate} expressions.  These expressions have
+three operands:
+
+@itemize @bullet
+@item
+The name of the predicate, as it will be referred to in
+@code{match_operand} or @code{match_operator} expressions.
+
+@item
+An RTL expression which evaluates to true if the predicate allows the
+operand @var{op}, false if it does not.  This expression can only use
+the following RTL codes:
+
+@table @code
+@item MATCH_OPERAND
+When written inside a predicate expression, a @code{MATCH_OPERAND}
+expression evaluates to true if the predicate it names would allow
+@var{op}.  The operand number and constraint are ignored.  Due to
+limitations in @command{genrecog}, you can only refer to generic
+predicates and predicates that have already been defined.
+
+@item MATCH_CODE
+This expression evaluates to true if @var{op} or a specified
+subexpression of @var{op} has one of a given list of RTX codes.
+
+The first operand of this expression is a string constant containing a
+comma-separated list of RTX code names (in lower case).  These are the
+codes for which the @code{MATCH_CODE} will be true.
+
+The second operand is a string constant which indicates what
+subexpression of @var{op} to examine.  If it is absent or the empty
+string, @var{op} itself is examined.  Otherwise, the string constant
+must be a sequence of digits and/or lowercase letters.  Each character
+indicates a subexpression to extract from the current expression; for
+the first character this is @var{op}, for the second and subsequent
+characters it is the result of the previous character.  A digit
+@var{n} extracts @samp{@w{XEXP (@var{e}, @var{n})}}; a letter @var{l}
+extracts @samp{@w{XVECEXP (@var{e}, 0, @var{n})}} where @var{n} is the
+alphabetic ordinal of @var{l} (0 for `a', 1 for 'b', and so on).  The
+@code{MATCH_CODE} then examines the RTX code of the subexpression
+extracted by the complete string.  It is not possible to extract
+components of an @code{rtvec} that is not at position 0 within its RTX
+object.
+
+@item MATCH_TEST
+This expression has one operand, a string constant containing a C
+expression.  The predicate's arguments, @var{op} and @var{mode}, are
+available with those names in the C expression.  The @code{MATCH_TEST}
+evaluates to true if the C expression evaluates to a nonzero value.
+@code{MATCH_TEST} expressions must not have side effects.
+
+@item  AND
+@itemx IOR
+@itemx NOT
+@itemx IF_THEN_ELSE
+The basic @samp{MATCH_} expressions can be combined using these
+logical operators, which have the semantics of the C operators
+@samp{&&}, @samp{||}, @samp{!}, and @samp{@w{? :}} respectively.  As
+in Common Lisp, you may give an @code{AND} or @code{IOR} expression an
+arbitrary number of arguments; this has exactly the same effect as
+writing a chain of two-argument @code{AND} or @code{IOR} expressions.
+@end table
+
+@item
+An optional block of C code, which should execute
+@samp{@w{return true}} if the predicate is found to match and
+@samp{@w{return false}} if it does not.  It must not have any side
+effects.  The predicate arguments, @var{op} and @var{mode}, are
+available with those names.
+
+If a code block is present in a predicate definition, then the RTL
+expression must evaluate to true @emph{and} the code block must
+execute @samp{@w{return true}} for the predicate to allow the operand.
+The RTL expression is evaluated first; do not re-check anything in the
+code block that was checked in the RTL expression.
+@end itemize
+
+The program @command{genrecog} scans @code{define_predicate} and
+@code{define_special_predicate} expressions to determine which RTX
+codes are possibly allowed.  You should always make this explicit in
+the RTL predicate expression, using @code{MATCH_OPERAND} and
+@code{MATCH_CODE}.
+
+Here is an example of a simple predicate definition, from the IA64
+machine description:
+
+@smallexample
+@group
+;; @r{True if @var{op} is a @code{SYMBOL_REF} which refers to the sdata section.}
+(define_predicate "small_addr_symbolic_operand"
+  (and (match_code "symbol_ref")
+       (match_test "SYMBOL_REF_SMALL_ADDR_P (op)")))
+@end group
+@end smallexample
+
+@noindent
+And here is another, showing the use of the C block.
+
+@smallexample
+@group
+;; @r{True if @var{op} is a register operand that is (or could be) a GR reg.}
+(define_predicate "gr_register_operand"
+  (match_operand 0 "register_operand")
+@{
+  unsigned int regno;
+  if (GET_CODE (op) == SUBREG)
+    op = SUBREG_REG (op);
+
+  regno = REGNO (op);
+  return (regno >= FIRST_PSEUDO_REGISTER || GENERAL_REGNO_P (regno));
+@})
+@end group
+@end smallexample
+
+Predicates written with @code{define_predicate} automatically include
+a test that @var{mode} is @code{VOIDmode}, or @var{op} has the same
+mode as @var{mode}, or @var{op} is a @code{CONST_INT} or
+@code{CONST_DOUBLE}.  They do @emph{not} check specifically for
+integer @code{CONST_DOUBLE}, nor do they test that the value of either
+kind of constant fits in the requested mode.  This is because
+target-specific predicates that take constants usually have to do more
+stringent value checks anyway.  If you need the exact same treatment
+of @code{CONST_INT} or @code{CONST_DOUBLE} that the generic predicates
+provide, use a @code{MATCH_OPERAND} subexpression to call
+@code{const_int_operand}, @code{const_double_operand}, or
+@code{immediate_operand}.
+
+Predicates written with @code{define_special_predicate} do not get any
+automatic mode checks, and are treated as having special mode handling
+by @command{genrecog}.
+
+The program @command{genpreds} is responsible for generating code to
+test predicates.  It also writes a header file containing function
+declarations for all machine-specific predicates.  It is not necessary
+to declare these predicates in @file{@var{cpu}-protos.h}.
+@end ifset
+
+@c Most of this node appears by itself (in a different place) even
+@c when the INTERNALS flag is clear.  Passages that require the internals
+@c manual's context are conditionalized to appear only in the internals manual.
+@ifset INTERNALS
+@node Constraints
+@section Operand Constraints
+@cindex operand constraints
+@cindex constraints
+
+Each @code{match_operand} in an instruction pattern can specify
+constraints for the operands allowed.  The constraints allow you to
+fine-tune matching within the set of operands allowed by the
+predicate.
+
+@end ifset
+@ifclear INTERNALS
+@node Constraints
+@section Constraints for @code{asm} Operands
+@cindex operand constraints, @code{asm}
+@cindex constraints, @code{asm}
+@cindex @code{asm} constraints
+
+Here are specific details on what constraint letters you can use with
+@code{asm} operands.
+@end ifclear
+Constraints can say whether
+an operand may be in a register, and which kinds of register; whether the
+operand can be a memory reference, and which kinds of address; whether the
+operand may be an immediate constant, and which possible values it may
+have.  Constraints can also require two operands to match.
+Side-effects aren't allowed in operands of inline @code{asm}, unless
+@samp{<} or @samp{>} constraints are used, because there is no guarantee
+that the side-effects will happen exactly once in an instruction that can update
+the addressing register.
+
+@ifset INTERNALS
+@menu
+* Simple Constraints::  Basic use of constraints.
+* Multi-Alternative::   When an insn has two alternative constraint-patterns.
+* Class Preferences::   Constraints guide which hard register to put things in.
+* Modifiers::           More precise control over effects of constraints.
+* Disable Insn Alternatives:: Disable insn alternatives using the @code{enabled} attribute.
+* Machine Constraints:: Existing constraints for some particular machines.
+* Define Constraints::  How to define machine-specific constraints.
+* C Constraint Interface:: How to test constraints from C code.
+@end menu
+@end ifset
+
+@ifclear INTERNALS
+@menu
+* Simple Constraints::  Basic use of constraints.
+* Multi-Alternative::   When an insn has two alternative constraint-patterns.
+* Modifiers::           More precise control over effects of constraints.
+* Machine Constraints:: Special constraints for some particular machines.
+@end menu
+@end ifclear
+
+@node Simple Constraints
+@subsection Simple Constraints
+@cindex simple constraints
+
+The simplest kind of constraint is a string full of letters, each of
+which describes one kind of operand that is permitted.  Here are
+the letters that are allowed:
+
+@table @asis
+@item whitespace
+Whitespace characters are ignored and can be inserted at any position
+except the first.  This enables each alternative for different operands to
+be visually aligned in the machine description even if they have different
+number of constraints and modifiers.
+
+@cindex @samp{m} in constraint
+@cindex memory references in constraints
+@item @samp{m}
+A memory operand is allowed, with any kind of address that the machine
+supports in general.
+Note that the letter used for the general memory constraint can be
+re-defined by a back end using the @code{TARGET_MEM_CONSTRAINT} macro.
+
+@cindex offsettable address
+@cindex @samp{o} in constraint
+@item @samp{o}
+A memory operand is allowed, but only if the address is
+@dfn{offsettable}.  This means that adding a small integer (actually,
+the width in bytes of the operand, as determined by its machine mode)
+may be added to the address and the result is also a valid memory
+address.
+
+@cindex autoincrement/decrement addressing
+For example, an address which is constant is offsettable; so is an
+address that is the sum of a register and a constant (as long as a
+slightly larger constant is also within the range of address-offsets
+supported by the machine); but an autoincrement or autodecrement
+address is not offsettable.  More complicated indirect/indexed
+addresses may or may not be offsettable depending on the other
+addressing modes that the machine supports.
+
+Note that in an output operand which can be matched by another
+operand, the constraint letter @samp{o} is valid only when accompanied
+by both @samp{<} (if the target machine has predecrement addressing)
+and @samp{>} (if the target machine has preincrement addressing).
+
+@cindex @samp{V} in constraint
+@item @samp{V}
+A memory operand that is not offsettable.  In other words, anything that
+would fit the @samp{m} constraint but not the @samp{o} constraint.
+
+@cindex @samp{<} in constraint
+@item @samp{<}
+A memory operand with autodecrement addressing (either predecrement or
+postdecrement) is allowed.  In inline @code{asm} this constraint is only
+allowed if the operand is used exactly once in an instruction that can
+handle the side-effects.  Not using an operand with @samp{<} in constraint
+string in the inline @code{asm} pattern at all or using it in multiple
+instructions isn't valid, because the side-effects wouldn't be performed
+or would be performed more than once.  Furthermore, on some targets
+the operand with @samp{<} in constraint string must be accompanied by
+special instruction suffixes like @code{%U0} instruction suffix on PowerPC
+or @code{%P0} on IA-64.
+
+@cindex @samp{>} in constraint
+@item @samp{>}
+A memory operand with autoincrement addressing (either preincrement or
+postincrement) is allowed.  In inline @code{asm} the same restrictions
+as for @samp{<} apply.
+
+@cindex @samp{r} in constraint
+@cindex registers in constraints
+@item @samp{r}
+A register operand is allowed provided that it is in a general
+register.
+
+@cindex constants in constraints
+@cindex @samp{i} in constraint
+@item @samp{i}
+An immediate integer operand (one with constant value) is allowed.
+This includes symbolic constants whose values will be known only at
+assembly time or later.
+
+@cindex @samp{n} in constraint
+@item @samp{n}
+An immediate integer operand with a known numeric value is allowed.
+Many systems cannot support assembly-time constants for operands less
+than a word wide.  Constraints for these operands should use @samp{n}
+rather than @samp{i}.
+
+@cindex @samp{I} in constraint
+@item @samp{I}, @samp{J}, @samp{K}, @dots{} @samp{P}
+Other letters in the range @samp{I} through @samp{P} may be defined in
+a machine-dependent fashion to permit immediate integer operands with
+explicit integer values in specified ranges.  For example, on the
+68000, @samp{I} is defined to stand for the range of values 1 to 8.
+This is the range permitted as a shift count in the shift
+instructions.
+
+@cindex @samp{E} in constraint
+@item @samp{E}
+An immediate floating operand (expression code @code{const_double}) is
+allowed, but only if the target floating point format is the same as
+that of the host machine (on which the compiler is running).
+
+@cindex @samp{F} in constraint
+@item @samp{F}
+An immediate floating operand (expression code @code{const_double} or
+@code{const_vector}) is allowed.
+
+@cindex @samp{G} in constraint
+@cindex @samp{H} in constraint
+@item @samp{G}, @samp{H}
+@samp{G} and @samp{H} may be defined in a machine-dependent fashion to
+permit immediate floating operands in particular ranges of values.
+
+@cindex @samp{s} in constraint
+@item @samp{s}
+An immediate integer operand whose value is not an explicit integer is
+allowed.
+
+This might appear strange; if an insn allows a constant operand with a
+value not known at compile time, it certainly must allow any known
+value.  So why use @samp{s} instead of @samp{i}?  Sometimes it allows
+better code to be generated.
+
+For example, on the 68000 in a fullword instruction it is possible to
+use an immediate operand; but if the immediate value is between @minus{}128
+and 127, better code results from loading the value into a register and
+using the register.  This is because the load into the register can be
+done with a @samp{moveq} instruction.  We arrange for this to happen
+by defining the letter @samp{K} to mean ``any integer outside the
+range @minus{}128 to 127'', and then specifying @samp{Ks} in the operand
+constraints.
+
+@cindex @samp{g} in constraint
+@item @samp{g}
+Any register, memory or immediate integer operand is allowed, except for
+registers that are not general registers.
+
+@cindex @samp{X} in constraint
+@item @samp{X}
+@ifset INTERNALS
+Any operand whatsoever is allowed, even if it does not satisfy
+@code{general_operand}.  This is normally used in the constraint of
+a @code{match_scratch} when certain alternatives will not actually
+require a scratch register.
+@end ifset
+@ifclear INTERNALS
+Any operand whatsoever is allowed.
+@end ifclear
+
+@cindex @samp{0} in constraint
+@cindex digits in constraint
+@item @samp{0}, @samp{1}, @samp{2}, @dots{} @samp{9}
+An operand that matches the specified operand number is allowed.  If a
+digit is used together with letters within the same alternative, the
+digit should come last.
+
+This number is allowed to be more than a single digit.  If multiple
+digits are encountered consecutively, they are interpreted as a single
+decimal integer.  There is scant chance for ambiguity, since to-date
+it has never been desirable that @samp{10} be interpreted as matching
+either operand 1 @emph{or} operand 0.  Should this be desired, one
+can use multiple alternatives instead.
+
+@cindex matching constraint
+@cindex constraint, matching
+This is called a @dfn{matching constraint} and what it really means is
+that the assembler has only a single operand that fills two roles
+@ifset INTERNALS
+considered separate in the RTL insn.  For example, an add insn has two
+input operands and one output operand in the RTL, but on most CISC
+@end ifset
+@ifclear INTERNALS
+which @code{asm} distinguishes.  For example, an add instruction uses
+two input operands and an output operand, but on most CISC
+@end ifclear
+machines an add instruction really has only two operands, one of them an
+input-output operand:
+
+@smallexample
+addl #35,r12
+@end smallexample
+
+Matching constraints are used in these circumstances.
+More precisely, the two operands that match must include one input-only
+operand and one output-only operand.  Moreover, the digit must be a
+smaller number than the number of the operand that uses it in the
+constraint.
+
+@ifset INTERNALS
+For operands to match in a particular case usually means that they
+are identical-looking RTL expressions.  But in a few special cases
+specific kinds of dissimilarity are allowed.  For example, @code{*x}
+as an input operand will match @code{*x++} as an output operand.
+For proper results in such cases, the output template should always
+use the output-operand's number when printing the operand.
+@end ifset
+
+@cindex load address instruction
+@cindex push address instruction
+@cindex address constraints
+@cindex @samp{p} in constraint
+@item @samp{p}
+An operand that is a valid memory address is allowed.  This is
+for ``load address'' and ``push address'' instructions.
+
+@findex address_operand
+@samp{p} in the constraint must be accompanied by @code{address_operand}
+as the predicate in the @code{match_operand}.  This predicate interprets
+the mode specified in the @code{match_operand} as the mode of the memory
+reference for which the address would be valid.
+
+@cindex other register constraints
+@cindex extensible constraints
+@item @var{other-letters}
+Other letters can be defined in machine-dependent fashion to stand for
+particular classes of registers or other arbitrary operand types.
+@samp{d}, @samp{a} and @samp{f} are defined on the 68000/68020 to stand
+for data, address and floating point registers.
+@end table
+
+@ifset INTERNALS
+In order to have valid assembler code, each operand must satisfy
+its constraint.  But a failure to do so does not prevent the pattern
+from applying to an insn.  Instead, it directs the compiler to modify
+the code so that the constraint will be satisfied.  Usually this is
+done by copying an operand into a register.
+
+Contrast, therefore, the two instruction patterns that follow:
+
+@smallexample
+(define_insn ""
+  [(set (match_operand:SI 0 "general_operand" "=r")
+        (plus:SI (match_dup 0)
+                 (match_operand:SI 1 "general_operand" "r")))]
+  ""
+  "@dots{}")
+@end smallexample
+
+@noindent
+which has two operands, one of which must appear in two places, and
+
+@smallexample
+(define_insn ""
+  [(set (match_operand:SI 0 "general_operand" "=r")
+        (plus:SI (match_operand:SI 1 "general_operand" "0")
+                 (match_operand:SI 2 "general_operand" "r")))]
+  ""
+  "@dots{}")
+@end smallexample
+
+@noindent
+which has three operands, two of which are required by a constraint to be
+identical.  If we are considering an insn of the form
+
+@smallexample
+(insn @var{n} @var{prev} @var{next}
+  (set (reg:SI 3)
+       (plus:SI (reg:SI 6) (reg:SI 109)))
+  @dots{})
+@end smallexample
+
+@noindent
+the first pattern would not apply at all, because this insn does not
+contain two identical subexpressions in the right place.  The pattern would
+say, ``That does not look like an add instruction; try other patterns''.
+The second pattern would say, ``Yes, that's an add instruction, but there
+is something wrong with it''.  It would direct the reload pass of the
+compiler to generate additional insns to make the constraint true.  The
+results might look like this:
+
+@smallexample
+(insn @var{n2} @var{prev} @var{n}
+  (set (reg:SI 3) (reg:SI 6))
+  @dots{})
+
+(insn @var{n} @var{n2} @var{next}
+  (set (reg:SI 3)
+       (plus:SI (reg:SI 3) (reg:SI 109)))
+  @dots{})
+@end smallexample
+
+It is up to you to make sure that each operand, in each pattern, has
+constraints that can handle any RTL expression that could be present for
+that operand.  (When multiple alternatives are in use, each pattern must,
+for each possible combination of operand expressions, have at least one
+alternative which can handle that combination of operands.)  The
+constraints don't need to @emph{allow} any possible operand---when this is
+the case, they do not constrain---but they must at least point the way to
+reloading any possible operand so that it will fit.
+
+@itemize @bullet
+@item
+If the constraint accepts whatever operands the predicate permits,
+there is no problem: reloading is never necessary for this operand.
+
+For example, an operand whose constraints permit everything except
+registers is safe provided its predicate rejects registers.
+
+An operand whose predicate accepts only constant values is safe
+provided its constraints include the letter @samp{i}.  If any possible
+constant value is accepted, then nothing less than @samp{i} will do;
+if the predicate is more selective, then the constraints may also be
+more selective.
+
+@item
+Any operand expression can be reloaded by copying it into a register.
+So if an operand's constraints allow some kind of register, it is
+certain to be safe.  It need not permit all classes of registers; the
+compiler knows how to copy a register into another register of the
+proper class in order to make an instruction valid.
+
+@cindex nonoffsettable memory reference
+@cindex memory reference, nonoffsettable
+@item
+A nonoffsettable memory reference can be reloaded by copying the
+address into a register.  So if the constraint uses the letter
+@samp{o}, all memory references are taken care of.
+
+@item
+A constant operand can be reloaded by allocating space in memory to
+hold it as preinitialized data.  Then the memory reference can be used
+in place of the constant.  So if the constraint uses the letters
+@samp{o} or @samp{m}, constant operands are not a problem.
+
+@item
+If the constraint permits a constant and a pseudo register used in an insn
+was not allocated to a hard register and is equivalent to a constant,
+the register will be replaced with the constant.  If the predicate does
+not permit a constant and the insn is re-recognized for some reason, the
+compiler will crash.  Thus the predicate must always recognize any
+objects allowed by the constraint.
+@end itemize
+
+If the operand's predicate can recognize registers, but the constraint does
+not permit them, it can make the compiler crash.  When this operand happens
+to be a register, the reload pass will be stymied, because it does not know
+how to copy a register temporarily into memory.
+
+If the predicate accepts a unary operator, the constraint applies to the
+operand.  For example, the MIPS processor at ISA level 3 supports an
+instruction which adds two registers in @code{SImode} to produce a
+@code{DImode} result, but only if the registers are correctly sign
+extended.  This predicate for the input operands accepts a
+@code{sign_extend} of an @code{SImode} register.  Write the constraint
+to indicate the type of register that is required for the operand of the
+@code{sign_extend}.
+@end ifset
+
+@node Multi-Alternative
+@subsection Multiple Alternative Constraints
+@cindex multiple alternative constraints
+
+Sometimes a single instruction has multiple alternative sets of possible
+operands.  For example, on the 68000, a logical-or instruction can combine
+register or an immediate value into memory, or it can combine any kind of
+operand into a register; but it cannot combine one memory location into
+another.
+
+These constraints are represented as multiple alternatives.  An alternative
+can be described by a series of letters for each operand.  The overall
+constraint for an operand is made from the letters for this operand
+from the first alternative, a comma, the letters for this operand from
+the second alternative, a comma, and so on until the last alternative.
+@ifset INTERNALS
+Here is how it is done for fullword logical-or on the 68000:
+
+@smallexample
+(define_insn "iorsi3"
+  [(set (match_operand:SI 0 "general_operand" "=m,d")
+        (ior:SI (match_operand:SI 1 "general_operand" "%0,0")
+                (match_operand:SI 2 "general_operand" "dKs,dmKs")))]
+  @dots{})
+@end smallexample
+
+The first alternative has @samp{m} (memory) for operand 0, @samp{0} for
+operand 1 (meaning it must match operand 0), and @samp{dKs} for operand
+2.  The second alternative has @samp{d} (data register) for operand 0,
+@samp{0} for operand 1, and @samp{dmKs} for operand 2.  The @samp{=} and
+@samp{%} in the constraints apply to all the alternatives; their
+meaning is explained in the next section (@pxref{Class Preferences}).
+@end ifset
+
+@c FIXME Is this ? and ! stuff of use in asm()?  If not, hide unless INTERNAL
+If all the operands fit any one alternative, the instruction is valid.
+Otherwise, for each alternative, the compiler counts how many instructions
+must be added to copy the operands so that that alternative applies.
+The alternative requiring the least copying is chosen.  If two alternatives
+need the same amount of copying, the one that comes first is chosen.
+These choices can be altered with the @samp{?} and @samp{!} characters:
+
+@table @code
+@cindex @samp{?} in constraint
+@cindex question mark
+@item ?
+Disparage slightly the alternative that the @samp{?} appears in,
+as a choice when no alternative applies exactly.  The compiler regards
+this alternative as one unit more costly for each @samp{?} that appears
+in it.
+
+@cindex @samp{!} in constraint
+@cindex exclamation point
+@item !
+Disparage severely the alternative that the @samp{!} appears in.
+This alternative can still be used if it fits without reloading,
+but if reloading is needed, some other alternative will be used.
+@end table
+
+@ifset INTERNALS
+When an insn pattern has multiple alternatives in its constraints, often
+the appearance of the assembler code is determined mostly by which
+alternative was matched.  When this is so, the C code for writing the
+assembler code can use the variable @code{which_alternative}, which is
+the ordinal number of the alternative that was actually satisfied (0 for
+the first, 1 for the second alternative, etc.).  @xref{Output Statement}.
+@end ifset
+
+@ifset INTERNALS
+@node Class Preferences
+@subsection Register Class Preferences
+@cindex class preference constraints
+@cindex register class preference constraints
+
+@cindex voting between constraint alternatives
+The operand constraints have another function: they enable the compiler
+to decide which kind of hardware register a pseudo register is best
+allocated to.  The compiler examines the constraints that apply to the
+insns that use the pseudo register, looking for the machine-dependent
+letters such as @samp{d} and @samp{a} that specify classes of registers.
+The pseudo register is put in whichever class gets the most ``votes''.
+The constraint letters @samp{g} and @samp{r} also vote: they vote in
+favor of a general register.  The machine description says which registers
+are considered general.
+
+Of course, on some machines all registers are equivalent, and no register
+classes are defined.  Then none of this complexity is relevant.
+@end ifset
+
+@node Modifiers
+@subsection Constraint Modifier Characters
+@cindex modifiers in constraints
+@cindex constraint modifier characters
+
+@c prevent bad page break with this line
+Here are constraint modifier characters.
+
+@table @samp
+@cindex @samp{=} in constraint
+@item =
+Means that this operand is write-only for this instruction: the previous
+value is discarded and replaced by output data.
+
+@cindex @samp{+} in constraint
+@item +
+Means that this operand is both read and written by the instruction.
+
+When the compiler fixes up the operands to satisfy the constraints,
+it needs to know which operands are inputs to the instruction and
+which are outputs from it.  @samp{=} identifies an output; @samp{+}
+identifies an operand that is both input and output; all other operands
+are assumed to be input only.
+
+If you specify @samp{=} or @samp{+} in a constraint, you put it in the
+first character of the constraint string.
+
+@cindex @samp{&} in constraint
+@cindex earlyclobber operand
+@item &
+Means (in a particular alternative) that this operand is an
+@dfn{earlyclobber} operand, which is modified before the instruction is
+finished using the input operands.  Therefore, this operand may not lie
+in a register that is used as an input operand or as part of any memory
+address.
+
+@samp{&} applies only to the alternative in which it is written.  In
+constraints with multiple alternatives, sometimes one alternative
+requires @samp{&} while others do not.  See, for example, the
+@samp{movdf} insn of the 68000.
+
+An input operand can be tied to an earlyclobber operand if its only
+use as an input occurs before the early result is written.  Adding
+alternatives of this form often allows GCC to produce better code
+when only some of the inputs can be affected by the earlyclobber.
+See, for example, the @samp{mulsi3} insn of the ARM@.
+
+@samp{&} does not obviate the need to write @samp{=}.
+
+@cindex @samp{%} in constraint
+@item %
+Declares the instruction to be commutative for this operand and the
+following operand.  This means that the compiler may interchange the
+two operands if that is the cheapest way to make all operands fit the
+constraints.
+@ifset INTERNALS
+This is often used in patterns for addition instructions
+that really have only two operands: the result must go in one of the
+arguments.  Here for example, is how the 68000 halfword-add
+instruction is defined:
+
+@smallexample
+(define_insn "addhi3"
+  [(set (match_operand:HI 0 "general_operand" "=m,r")
+     (plus:HI (match_operand:HI 1 "general_operand" "%0,0")
+              (match_operand:HI 2 "general_operand" "di,g")))]
+  @dots{})
+@end smallexample
+@end ifset
+GCC can only handle one commutative pair in an asm; if you use more,
+the compiler may fail.  Note that you need not use the modifier if
+the two alternatives are strictly identical; this would only waste
+time in the reload pass.  The modifier is not operational after
+register allocation, so the result of @code{define_peephole2}
+and @code{define_split}s performed after reload cannot rely on
+@samp{%} to make the intended insn match.
+
+@cindex @samp{#} in constraint
+@item #
+Says that all following characters, up to the next comma, are to be
+ignored as a constraint.  They are significant only for choosing
+register preferences.
+
+@cindex @samp{*} in constraint
+@item *
+Says that the following character should be ignored when choosing
+register preferences.  @samp{*} has no effect on the meaning of the
+constraint as a constraint, and no effect on reloading.
+
+@ifset INTERNALS
+Here is an example: the 68000 has an instruction to sign-extend a
+halfword in a data register, and can also sign-extend a value by
+copying it into an address register.  While either kind of register is
+acceptable, the constraints on an address-register destination are
+less strict, so it is best if register allocation makes an address
+register its goal.  Therefore, @samp{*} is used so that the @samp{d}
+constraint letter (for data register) is ignored when computing
+register preferences.
+
+@smallexample
+(define_insn "extendhisi2"
+  [(set (match_operand:SI 0 "general_operand" "=*d,a")
+        (sign_extend:SI
+         (match_operand:HI 1 "general_operand" "0,g")))]
+  @dots{})
+@end smallexample
+@end ifset
+@end table
+
+@node Machine Constraints
+@subsection Constraints for Particular Machines
+@cindex machine specific constraints
+@cindex constraints, machine specific
+
+Whenever possible, you should use the general-purpose constraint letters
+in @code{asm} arguments, since they will convey meaning more readily to
+people reading your code.  Failing that, use the constraint letters
+that usually have very similar meanings across architectures.  The most
+commonly used constraints are @samp{m} and @samp{r} (for memory and
+general-purpose registers respectively; @pxref{Simple Constraints}), and
+@samp{I}, usually the letter indicating the most common
+immediate-constant format.
+
+Each architecture defines additional constraints.  These constraints
+are used by the compiler itself for instruction generation, as well as
+for @code{asm} statements; therefore, some of the constraints are not
+particularly useful for @code{asm}.  Here is a summary of some of the
+machine-dependent constraints available on some particular machines;
+it includes both constraints that are useful for @code{asm} and
+constraints that aren't.  The compiler source file mentioned in the
+table heading for each architecture is the definitive reference for
+the meanings of that architecture's constraints.
+
+@table @emph
+@item ARM family---@file{config/arm/arm.h}
+@table @code
+@item f
+Floating-point register
+
+@item w
+VFP floating-point register
+
+@item F
+One of the floating-point constants 0.0, 0.5, 1.0, 2.0, 3.0, 4.0, 5.0
+or 10.0
+
+@item G
+Floating-point constant that would satisfy the constraint @samp{F} if it
+were negated
+
+@item I
+Integer that is valid as an immediate operand in a data processing
+instruction.  That is, an integer in the range 0 to 255 rotated by a
+multiple of 2
+
+@item J
+Integer in the range @minus{}4095 to 4095
+
+@item K
+Integer that satisfies constraint @samp{I} when inverted (ones complement)
+
+@item L
+Integer that satisfies constraint @samp{I} when negated (twos complement)
+
+@item M
+Integer in the range 0 to 32
+
+@item Q
+A memory reference where the exact address is in a single register
+(`@samp{m}' is preferable for @code{asm} statements)
+
+@item R
+An item in the constant pool
+
+@item S
+A symbol in the text segment of the current file
+
+@item Uv
+A memory reference suitable for VFP load/store insns (reg+constant offset)
+
+@item Uy
+A memory reference suitable for iWMMXt load/store instructions.
+
+@item Uq
+A memory reference suitable for the ARMv4 ldrsb instruction.
+@end table
+
+@item AVR family---@file{config/avr/constraints.md}
+@table @code
+@item l
+Registers from r0 to r15
+
+@item a
+Registers from r16 to r23
+
+@item d
+Registers from r16 to r31
+
+@item w
+Registers from r24 to r31.  These registers can be used in @samp{adiw} command
+
+@item e
+Pointer register (r26--r31)
+
+@item b
+Base pointer register (r28--r31)
+
+@item q
+Stack pointer register (SPH:SPL)
+
+@item t
+Temporary register r0
+
+@item x
+Register pair X (r27:r26)
+
+@item y
+Register pair Y (r29:r28)
+
+@item z
+Register pair Z (r31:r30)
+
+@item I
+Constant greater than @minus{}1, less than 64
+
+@item J
+Constant greater than @minus{}64, less than 1
+
+@item K
+Constant integer 2
+
+@item L
+Constant integer 0
+
+@item M
+Constant that fits in 8 bits
+
+@item N
+Constant integer @minus{}1
+
+@item O
+Constant integer 8, 16, or 24
+
+@item P
+Constant integer 1
+
+@item G
+A floating point constant 0.0
+
+@item R
+Integer constant in the range @minus{}6 @dots{} 5.
+
+@item Q
+A memory address based on Y or Z pointer with displacement.
+@end table
+
+@item CRX Architecture---@file{config/crx/crx.h}
+@table @code
+
+@item b
+Registers from r0 to r14 (registers without stack pointer)
+
+@item l
+Register r16 (64-bit accumulator lo register)
+
+@item h
+Register r17 (64-bit accumulator hi register)
+
+@item k
+Register pair r16-r17. (64-bit accumulator lo-hi pair)
+
+@item I
+Constant that fits in 3 bits
+
+@item J
+Constant that fits in 4 bits
+
+@item K
+Constant that fits in 5 bits
+
+@item L
+Constant that is one of @minus{}1, 4, @minus{}4, 7, 8, 12, 16, 20, 32, 48
+
+@item G
+Floating point constant that is legal for store immediate
+@end table
+
+@item Hewlett-Packard PA-RISC---@file{config/pa/pa.h}
+@table @code
+@item a
+General register 1
+
+@item f
+Floating point register
+
+@item q
+Shift amount register
+
+@item x
+Floating point register (deprecated)
+
+@item y
+Upper floating point register (32-bit), floating point register (64-bit)
+
+@item Z
+Any register
+
+@item I
+Signed 11-bit integer constant
+
+@item J
+Signed 14-bit integer constant
+
+@item K
+Integer constant that can be deposited with a @code{zdepi} instruction
+
+@item L
+Signed 5-bit integer constant
+
+@item M
+Integer constant 0
+
+@item N
+Integer constant that can be loaded with a @code{ldil} instruction
+
+@item O
+Integer constant whose value plus one is a power of 2
+
+@item P
+Integer constant that can be used for @code{and} operations in @code{depi}
+and @code{extru} instructions
+
+@item S
+Integer constant 31
+
+@item U
+Integer constant 63
+
+@item G
+Floating-point constant 0.0
+
+@item A
+A @code{lo_sum} data-linkage-table memory operand
+
+@item Q
+A memory operand that can be used as the destination operand of an
+integer store instruction
+
+@item R
+A scaled or unscaled indexed memory operand
+
+@item T
+A memory operand for floating-point loads and stores
+
+@item W
+A register indirect memory operand
+@end table
+
+@item picoChip family---@file{picochip.h}
+@table @code
+@item k
+Stack register.
+
+@item f
+Pointer register.  A register which can be used to access memory without
+supplying an offset.  Any other register can be used to access memory,
+but will need a constant offset.  In the case of the offset being zero,
+it is more efficient to use a pointer register, since this reduces code
+size.
+
+@item t
+A twin register.  A register which may be paired with an adjacent
+register to create a 32-bit register.
+
+@item a
+Any absolute memory address (e.g., symbolic constant, symbolic
+constant + offset).
+
+@item I
+4-bit signed integer.
+
+@item J
+4-bit unsigned integer.
+
+@item K
+8-bit signed integer.
+
+@item M
+Any constant whose absolute value is no greater than 4-bits.
+
+@item N
+10-bit signed integer
+
+@item O
+16-bit signed integer.
+
+@end table
+
+@item PowerPC and IBM RS6000---@file{config/rs6000/rs6000.h}
+@table @code
+@item b
+Address base register
+
+@item d
+Floating point register (containing 64-bit value)
+
+@item f
+Floating point register (containing 32-bit value)
+
+@item v
+Altivec vector register
+
+@item wd
+VSX vector register to hold vector double data
+
+@item wf
+VSX vector register to hold vector float data
+
+@item ws
+VSX vector register to hold scalar float data
+
+@item wa
+Any VSX register
+
+@item h
+@samp{MQ}, @samp{CTR}, or @samp{LINK} register
+
+@item q
+@samp{MQ} register
+
+@item c
+@samp{CTR} register
+
+@item l
+@samp{LINK} register
+
+@item x
+@samp{CR} register (condition register) number 0
+
+@item y
+@samp{CR} register (condition register)
+
+@item z
+@samp{XER[CA]} carry bit (part of the XER register)
+
+@item I
+Signed 16-bit constant
+
+@item J
+Unsigned 16-bit constant shifted left 16 bits (use @samp{L} instead for
+@code{SImode} constants)
+
+@item K
+Unsigned 16-bit constant
+
+@item L
+Signed 16-bit constant shifted left 16 bits
+
+@item M
+Constant larger than 31
+
+@item N
+Exact power of 2
+
+@item O
+Zero
+
+@item P
+Constant whose negation is a signed 16-bit constant
+
+@item G
+Floating point constant that can be loaded into a register with one
+instruction per word
+
+@item H
+Integer/Floating point constant that can be loaded into a register using
+three instructions
+
+@item m
+Memory operand.  
+Normally, @code{m} does not allow addresses that update the base register.
+If @samp{<} or @samp{>} constraint is also used, they are allowed and
+therefore on PowerPC targets in that case it is only safe
+to use @samp{m<>} in an @code{asm} statement if that @code{asm} statement
+accesses the operand exactly once.  The @code{asm} statement must also
+use @samp{%U@var{<opno>}} as a placeholder for the ``update'' flag in the
+corresponding load or store instruction.  For example:
+
+@smallexample
+asm ("st%U0 %1,%0" : "=m<>" (mem) : "r" (val));
+@end smallexample
+
+is correct but:
+
+@smallexample
+asm ("st %1,%0" : "=m<>" (mem) : "r" (val));
+@end smallexample
+
+is not.
+
+@item es
+A ``stable'' memory operand; that is, one which does not include any
+automodification of the base register.  This used to be useful when
+@samp{m} allowed automodification of the base register, but as those are now only
+allowed when @samp{<} or @samp{>} is used, @samp{es} is basically the same
+as @samp{m} without @samp{<} and @samp{>}.
+
+@item Q
+Memory operand that is an offset from a register (it is usually better
+to use @samp{m} or @samp{es} in @code{asm} statements)
+
+@item Z
+Memory operand that is an indexed or indirect from a register (it is
+usually better to use @samp{m} or @samp{es} in @code{asm} statements)
+
+@item R
+AIX TOC entry
+
+@item a
+Address operand that is an indexed or indirect from a register (@samp{p} is
+preferable for @code{asm} statements)
+
+@item S
+Constant suitable as a 64-bit mask operand
+
+@item T
+Constant suitable as a 32-bit mask operand
+
+@item U
+System V Release 4 small data area reference
+
+@item t
+AND masks that can be performed by two rldic@{l, r@} instructions
+
+@item W
+Vector constant that does not require memory
+
+@item j
+Vector constant that is all zeros.
+
+@end table
+
+@item Intel 386---@file{config/i386/constraints.md}
+@table @code
+@item R
+Legacy register---the eight integer registers available on all
+i386 processors (@code{a}, @code{b}, @code{c}, @code{d},
+@code{si}, @code{di}, @code{bp}, @code{sp}).
+
+@item q
+Any register accessible as @code{@var{r}l}.  In 32-bit mode, @code{a},
+@code{b}, @code{c}, and @code{d}; in 64-bit mode, any integer register.
+
+@item Q
+Any register accessible as @code{@var{r}h}: @code{a}, @code{b},
+@code{c}, and @code{d}.
+
+@ifset INTERNALS
+@item l
+Any register that can be used as the index in a base+index memory
+access: that is, any general register except the stack pointer.
+@end ifset
+
+@item a
+The @code{a} register.
+
+@item b
+The @code{b} register.
+
+@item c
+The @code{c} register.
+
+@item d
+The @code{d} register.
+
+@item S
+The @code{si} register.
+
+@item D
+The @code{di} register.
+
+@item A
+The @code{a} and @code{d} registers.  This class is used for instructions
+that return double word results in the @code{ax:dx} register pair.  Single
+word values will be allocated either in @code{ax} or @code{dx}.
+For example on i386 the following implements @code{rdtsc}:
+
+@smallexample
+unsigned long long rdtsc (void)
+@{
+  unsigned long long tick;
+  __asm__ __volatile__("rdtsc":"=A"(tick));
+  return tick;
+@}
+@end smallexample
+
+This is not correct on x86_64 as it would allocate tick in either @code{ax}
+or @code{dx}.  You have to use the following variant instead:
+
+@smallexample
+unsigned long long rdtsc (void)
+@{
+  unsigned int tickl, tickh;
+  __asm__ __volatile__("rdtsc":"=a"(tickl),"=d"(tickh));
+  return ((unsigned long long)tickh << 32)|tickl;
+@}
+@end smallexample
+
+
+@item f
+Any 80387 floating-point (stack) register.
+
+@item t
+Top of 80387 floating-point stack (@code{%st(0)}).
+
+@item u
+Second from top of 80387 floating-point stack (@code{%st(1)}).
+
+@item y
+Any MMX register.
+
+@item x
+Any SSE register.
+
+@item Yz
+First SSE register (@code{%xmm0}).
+
+@ifset INTERNALS
+@item Y2
+Any SSE register, when SSE2 is enabled.
+
+@item Yi
+Any SSE register, when SSE2 and inter-unit moves are enabled.
+
+@item Ym
+Any MMX register, when inter-unit moves are enabled.
+@end ifset
+
+@item I
+Integer constant in the range 0 @dots{} 31, for 32-bit shifts.
+
+@item J
+Integer constant in the range 0 @dots{} 63, for 64-bit shifts.
+
+@item K
+Signed 8-bit integer constant.
+
+@item L
+@code{0xFF} or @code{0xFFFF}, for andsi as a zero-extending move.
+
+@item M
+0, 1, 2, or 3 (shifts for the @code{lea} instruction).
+
+@item N
+Unsigned 8-bit integer constant (for @code{in} and @code{out} 
+instructions).
+
+@ifset INTERNALS
+@item O
+Integer constant in the range 0 @dots{} 127, for 128-bit shifts.
+@end ifset
+
+@item G
+Standard 80387 floating point constant.
+
+@item C
+Standard SSE floating point constant.
+
+@item e
+32-bit signed integer constant, or a symbolic reference known
+to fit that range (for immediate operands in sign-extending x86-64
+instructions).
+
+@item Z
+32-bit unsigned integer constant, or a symbolic reference known
+to fit that range (for immediate operands in zero-extending x86-64
+instructions).
+
+@end table
+
+@item Intel IA-64---@file{config/ia64/ia64.h}
+@table @code
+@item a
+General register @code{r0} to @code{r3} for @code{addl} instruction
+
+@item b
+Branch register
+
+@item c
+Predicate register (@samp{c} as in ``conditional'')
+
+@item d
+Application register residing in M-unit
+
+@item e
+Application register residing in I-unit
+
+@item f
+Floating-point register
+
+@item m
+Memory operand.  If used together with @samp{<} or @samp{>},
+the operand can have postincrement and postdecrement which
+require printing with @samp{%Pn} on IA-64.
+
+@item G
+Floating-point constant 0.0 or 1.0
+
+@item I
+14-bit signed integer constant
+
+@item J
+22-bit signed integer constant
+
+@item K
+8-bit signed integer constant for logical instructions
+
+@item L
+8-bit adjusted signed integer constant for compare pseudo-ops
+
+@item M
+6-bit unsigned integer constant for shift counts
+
+@item N
+9-bit signed integer constant for load and store postincrements
+
+@item O
+The constant zero
+
+@item P
+0 or @minus{}1 for @code{dep} instruction
+
+@item Q
+Non-volatile memory for floating-point loads and stores
+
+@item R
+Integer constant in the range 1 to 4 for @code{shladd} instruction
+
+@item S
+Memory operand except postincrement and postdecrement.  This is
+now roughly the same as @samp{m} when not used together with @samp{<}
+or @samp{>}.
+@end table
+
+@item FRV---@file{config/frv/frv.h}
+@table @code
+@item a
+Register in the class @code{ACC_REGS} (@code{acc0} to @code{acc7}).
+
+@item b
+Register in the class @code{EVEN_ACC_REGS} (@code{acc0} to @code{acc7}).
+
+@item c
+Register in the class @code{CC_REGS} (@code{fcc0} to @code{fcc3} and
+@code{icc0} to @code{icc3}).
+
+@item d
+Register in the class @code{GPR_REGS} (@code{gr0} to @code{gr63}).
+
+@item e
+Register in the class @code{EVEN_REGS} (@code{gr0} to @code{gr63}).
+Odd registers are excluded not in the class but through the use of a machine
+mode larger than 4 bytes.
+
+@item f
+Register in the class @code{FPR_REGS} (@code{fr0} to @code{fr63}).
+
+@item h
+Register in the class @code{FEVEN_REGS} (@code{fr0} to @code{fr63}).
+Odd registers are excluded not in the class but through the use of a machine
+mode larger than 4 bytes.
+
+@item l
+Register in the class @code{LR_REG} (the @code{lr} register).
+
+@item q
+Register in the class @code{QUAD_REGS} (@code{gr2} to @code{gr63}).
+Register numbers not divisible by 4 are excluded not in the class but through
+the use of a machine mode larger than 8 bytes.
+
+@item t
+Register in the class @code{ICC_REGS} (@code{icc0} to @code{icc3}).
+
+@item u
+Register in the class @code{FCC_REGS} (@code{fcc0} to @code{fcc3}).
+
+@item v
+Register in the class @code{ICR_REGS} (@code{cc4} to @code{cc7}).
+
+@item w
+Register in the class @code{FCR_REGS} (@code{cc0} to @code{cc3}).
+
+@item x
+Register in the class @code{QUAD_FPR_REGS} (@code{fr0} to @code{fr63}).
+Register numbers not divisible by 4 are excluded not in the class but through
+the use of a machine mode larger than 8 bytes.
+
+@item z
+Register in the class @code{SPR_REGS} (@code{lcr} and @code{lr}).
+
+@item A
+Register in the class @code{QUAD_ACC_REGS} (@code{acc0} to @code{acc7}).
+
+@item B
+Register in the class @code{ACCG_REGS} (@code{accg0} to @code{accg7}).
+
+@item C
+Register in the class @code{CR_REGS} (@code{cc0} to @code{cc7}).
+
+@item G
+Floating point constant zero
+
+@item I
+6-bit signed integer constant
+
+@item J
+10-bit signed integer constant
+
+@item L
+16-bit signed integer constant
+
+@item M
+16-bit unsigned integer constant
+
+@item N
+12-bit signed integer constant that is negative---i.e.@: in the
+range of @minus{}2048 to @minus{}1
+
+@item O
+Constant zero
+
+@item P
+12-bit signed integer constant that is greater than zero---i.e.@: in the
+range of 1 to 2047.
+
+@end table
+
+@item Blackfin family---@file{config/bfin/constraints.md}
+@table @code
+@item a
+P register
+
+@item d
+D register
+
+@item z
+A call clobbered P register.
+
+@item q@var{n}
+A single register.  If @var{n} is in the range 0 to 7, the corresponding D
+register.  If it is @code{A}, then the register P0.
+
+@item D
+Even-numbered D register
+
+@item W
+Odd-numbered D register
+
+@item e
+Accumulator register.
+
+@item A
+Even-numbered accumulator register.
+
+@item B
+Odd-numbered accumulator register.
+
+@item b
+I register
+
+@item v
+B register
+
+@item f
+M register
+
+@item c
+Registers used for circular buffering, i.e. I, B, or L registers.
+
+@item C
+The CC register.
+
+@item t
+LT0 or LT1.
+
+@item k
+LC0 or LC1.
+
+@item u
+LB0 or LB1.
+
+@item x
+Any D, P, B, M, I or L register.
+
+@item y
+Additional registers typically used only in prologues and epilogues: RETS,
+RETN, RETI, RETX, RETE, ASTAT, SEQSTAT and USP.
+
+@item w
+Any register except accumulators or CC.
+
+@item Ksh
+Signed 16 bit integer (in the range @minus{}32768 to 32767)
+
+@item Kuh
+Unsigned 16 bit integer (in the range 0 to 65535)
+
+@item Ks7
+Signed 7 bit integer (in the range @minus{}64 to 63)
+
+@item Ku7
+Unsigned 7 bit integer (in the range 0 to 127)
+
+@item Ku5
+Unsigned 5 bit integer (in the range 0 to 31)
+
+@item Ks4
+Signed 4 bit integer (in the range @minus{}8 to 7)
+
+@item Ks3
+Signed 3 bit integer (in the range @minus{}3 to 4)
+
+@item Ku3
+Unsigned 3 bit integer (in the range 0 to 7)
+
+@item P@var{n}
+Constant @var{n}, where @var{n} is a single-digit constant in the range 0 to 4.
+
+@item PA
+An integer equal to one of the MACFLAG_XXX constants that is suitable for
+use with either accumulator.
+
+@item PB
+An integer equal to one of the MACFLAG_XXX constants that is suitable for
+use only with accumulator A1.
+
+@item M1
+Constant 255.
+
+@item M2
+Constant 65535.
+
+@item J
+An integer constant with exactly a single bit set.
+
+@item L
+An integer constant with all bits set except exactly one.
+
+@item H
+
+@item Q
+Any SYMBOL_REF.
+@end table
+
+@item M32C---@file{config/m32c/m32c.c}
+@table @code
+@item Rsp
+@itemx Rfb
+@itemx Rsb
+@samp{$sp}, @samp{$fb}, @samp{$sb}.
+
+@item Rcr
+Any control register, when they're 16 bits wide (nothing if control
+registers are 24 bits wide)
+
+@item Rcl
+Any control register, when they're 24 bits wide.
+
+@item R0w
+@itemx R1w
+@itemx R2w
+@itemx R3w
+$r0, $r1, $r2, $r3.
+
+@item R02
+$r0 or $r2, or $r2r0 for 32 bit values.
+
+@item R13
+$r1 or $r3, or $r3r1 for 32 bit values.
+
+@item Rdi
+A register that can hold a 64 bit value.
+
+@item Rhl
+$r0 or $r1 (registers with addressable high/low bytes)
+
+@item R23
+$r2 or $r3
+
+@item Raa
+Address registers
+
+@item Raw
+Address registers when they're 16 bits wide.
+
+@item Ral
+Address registers when they're 24 bits wide.
+
+@item Rqi
+Registers that can hold QI values.
+
+@item Rad
+Registers that can be used with displacements ($a0, $a1, $sb).
+
+@item Rsi
+Registers that can hold 32 bit values.
+
+@item Rhi
+Registers that can hold 16 bit values.
+
+@item Rhc
+Registers chat can hold 16 bit values, including all control
+registers.
+
+@item Rra
+$r0 through R1, plus $a0 and $a1.
+
+@item Rfl
+The flags register.
+
+@item Rmm
+The memory-based pseudo-registers $mem0 through $mem15.
+
+@item Rpi
+Registers that can hold pointers (16 bit registers for r8c, m16c; 24
+bit registers for m32cm, m32c).
+
+@item Rpa
+Matches multiple registers in a PARALLEL to form a larger register.
+Used to match function return values.
+
+@item Is3
+@minus{}8 @dots{} 7
+
+@item IS1
+@minus{}128 @dots{} 127
+
+@item IS2
+@minus{}32768 @dots{} 32767
+
+@item IU2
+0 @dots{} 65535
+
+@item In4
+@minus{}8 @dots{} @minus{}1 or 1 @dots{} 8
+
+@item In5
+@minus{}16 @dots{} @minus{}1 or 1 @dots{} 16
+
+@item In6
+@minus{}32 @dots{} @minus{}1 or 1 @dots{} 32
+
+@item IM2
+@minus{}65536 @dots{} @minus{}1
+
+@item Ilb
+An 8 bit value with exactly one bit set.
+
+@item Ilw
+A 16 bit value with exactly one bit set.
+
+@item Sd
+The common src/dest memory addressing modes.
+
+@item Sa
+Memory addressed using $a0 or $a1.
+
+@item Si
+Memory addressed with immediate addresses.
+
+@item Ss
+Memory addressed using the stack pointer ($sp).
+
+@item Sf
+Memory addressed using the frame base register ($fb).
+
+@item Ss
+Memory addressed using the small base register ($sb).
+
+@item S1
+$r1h
+@end table
+
+@item MeP---@file{config/mep/constraints.md}
+@table @code
+
+@item a
+The $sp register.
+
+@item b
+The $tp register.
+
+@item c
+Any control register.
+
+@item d
+Either the $hi or the $lo register.
+
+@item em
+Coprocessor registers that can be directly loaded ($c0-$c15).
+
+@item ex
+Coprocessor registers that can be moved to each other.
+
+@item er
+Coprocessor registers that can be moved to core registers.
+
+@item h
+The $hi register.
+
+@item j
+The $rpc register.
+
+@item l
+The $lo register.
+
+@item t
+Registers which can be used in $tp-relative addressing.
+
+@item v
+The $gp register.
+
+@item x
+The coprocessor registers.
+
+@item y
+The coprocessor control registers.
+
+@item z
+The $0 register.
+
+@item A
+User-defined register set A.
+
+@item B
+User-defined register set B.
+
+@item C
+User-defined register set C.
+
+@item D
+User-defined register set D.
+
+@item I
+Offsets for $gp-rel addressing.
+
+@item J
+Constants that can be used directly with boolean insns.
+
+@item K
+Constants that can be moved directly to registers.
+
+@item L
+Small constants that can be added to registers.
+
+@item M
+Long shift counts.
+
+@item N
+Small constants that can be compared to registers.
+
+@item O
+Constants that can be loaded into the top half of registers.
+
+@item S
+Signed 8-bit immediates.
+
+@item T
+Symbols encoded for $tp-rel or $gp-rel addressing.
+
+@item U
+Non-constant addresses for loading/saving coprocessor registers.
+
+@item W
+The top half of a symbol's value.
+
+@item Y
+A register indirect address without offset.
+
+@item Z
+Symbolic references to the control bus.
+
+@end table
+
+@item MicroBlaze---@file{config/microblaze/constraints.md}
+@table @code
+@item d
+A general register (@code{r0} to @code{r31}).
+
+@item z
+A status register (@code{rmsr}, @code{$fcc1} to @code{$fcc7}).
+
+@end table
+
+@item MIPS---@file{config/mips/constraints.md}
+@table @code
+@item d
+An address register.  This is equivalent to @code{r} unless
+generating MIPS16 code.
+
+@item f
+A floating-point register (if available).
+
+@item h
+Formerly the @code{hi} register.  This constraint is no longer supported.
+
+@item l
+The @code{lo} register.  Use this register to store values that are
+no bigger than a word.
+
+@item x
+The concatenated @code{hi} and @code{lo} registers.  Use this register
+to store doubleword values.
+
+@item c
+A register suitable for use in an indirect jump.  This will always be
+@code{$25} for @option{-mabicalls}.
+
+@item v
+Register @code{$3}.  Do not use this constraint in new code;
+it is retained only for compatibility with glibc.
+
+@item y
+Equivalent to @code{r}; retained for backwards compatibility.
+
+@item z
+A floating-point condition code register.
+
+@item I
+A signed 16-bit constant (for arithmetic instructions).
+
+@item J
+Integer zero.
+
+@item K
+An unsigned 16-bit constant (for logic instructions).
+
+@item L
+A signed 32-bit constant in which the lower 16 bits are zero.
+Such constants can be loaded using @code{lui}.
+
+@item M
+A constant that cannot be loaded using @code{lui}, @code{addiu}
+or @code{ori}.
+
+@item N
+A constant in the range @minus{}65535 to @minus{}1 (inclusive).
+
+@item O
+A signed 15-bit constant.
+
+@item P
+A constant in the range 1 to 65535 (inclusive).
+
+@item G
+Floating-point zero.
+
+@item R
+An address that can be used in a non-macro load or store.
+@end table
+
+@item Motorola 680x0---@file{config/m68k/constraints.md}
+@table @code
+@item a
+Address register
+
+@item d
+Data register
+
+@item f
+68881 floating-point register, if available
+
+@item I
+Integer in the range 1 to 8
+
+@item J
+16-bit signed number
+
+@item K
+Signed number whose magnitude is greater than 0x80
+
+@item L
+Integer in the range @minus{}8 to @minus{}1
+
+@item M
+Signed number whose magnitude is greater than 0x100
+
+@item N
+Range 24 to 31, rotatert:SI 8 to 1 expressed as rotate
+
+@item O
+16 (for rotate using swap)
+
+@item P
+Range 8 to 15, rotatert:HI 8 to 1 expressed as rotate
+
+@item R
+Numbers that mov3q can handle
+
+@item G
+Floating point constant that is not a 68881 constant
+
+@item S
+Operands that satisfy 'm' when -mpcrel is in effect
+
+@item T
+Operands that satisfy 's' when -mpcrel is not in effect
+
+@item Q
+Address register indirect addressing mode
+
+@item U
+Register offset addressing
+
+@item W
+const_call_operand
+
+@item Cs
+symbol_ref or const
+
+@item Ci
+const_int
+
+@item C0
+const_int 0
+
+@item Cj
+Range of signed numbers that don't fit in 16 bits
+
+@item Cmvq
+Integers valid for mvq
+
+@item Capsw
+Integers valid for a moveq followed by a swap
+
+@item Cmvz
+Integers valid for mvz
+
+@item Cmvs
+Integers valid for mvs
+
+@item Ap
+push_operand
+
+@item Ac
+Non-register operands allowed in clr
+
+@end table
+
+@item Motorola 68HC11 & 68HC12 families---@file{config/m68hc11/m68hc11.h}
+@table @code
+@item a
+Register `a'
+
+@item b
+Register `b'
+
+@item d
+Register `d'
+
+@item q
+An 8-bit register
+
+@item t
+Temporary soft register _.tmp
+
+@item u
+A soft register _.d1 to _.d31
+
+@item w
+Stack pointer register
+
+@item x
+Register `x'
+
+@item y
+Register `y'
+
+@item z
+Pseudo register `z' (replaced by `x' or `y' at the end)
+
+@item A
+An address register: x, y or z
+
+@item B
+An address register: x or y
+
+@item D
+Register pair (x:d) to form a 32-bit value
+
+@item L
+Constants in the range @minus{}65536 to 65535
+
+@item M
+Constants whose 16-bit low part is zero
+
+@item N
+Constant integer 1 or @minus{}1
+
+@item O
+Constant integer 16
+
+@item P
+Constants in the range @minus{}8 to 2
+
+@end table
+
+@item Moxie---@file{config/moxie/constraints.md}
+@table @code
+@item A
+An absolute address
+
+@item B
+An offset address
+
+@item W
+A register indirect memory operand
+
+@item I
+A constant in the range of 0 to 255.
+
+@item N
+A constant in the range of 0 to @minus{}255.
+
+@end table
+
+@item PDP-11---@file{config/pdp11/constraints.md}
+@table @code
+@item a
+Floating point registers AC0 through AC3.  These can be loaded from/to
+memory with a single instruction.
+
+@item d
+Odd numbered general registers (R1, R3, R5).  These are used for
+16-bit multiply operations.
+
+@item f
+Any of the floating point registers (AC0 through AC5).
+
+@item G
+Floating point constant 0.
+
+@item I
+An integer constant that fits in 16 bits.
+
+@item J
+An integer constant whose low order 16 bits are zero.
+
+@item K
+An integer constant that does not meet the constraints for codes
+@samp{I} or @samp{J}.
+
+@item L
+The integer constant 1.
+
+@item M
+The integer constant @minus{}1.
+
+@item N
+The integer constant 0.
+
+@item O
+Integer constants @minus{}4 through @minus{}1 and 1 through 4; shifts by these
+amounts are handled as multiple single-bit shifts rather than a single
+variable-length shift.
+
+@item Q
+A memory reference which requires an additional word (address or
+offset) after the opcode.
+
+@item R
+A memory reference that is encoded within the opcode.
+
+@end table
+
+@item RX---@file{config/rx/constraints.md}
+@table @code
+@item Q
+An address which does not involve register indirect addressing or
+pre/post increment/decrement addressing.
+
+@item Symbol
+A symbol reference.
+
+@item Int08
+A constant in the range @minus{}256 to 255, inclusive.
+
+@item Sint08
+A constant in the range @minus{}128 to 127, inclusive.
+
+@item Sint16
+A constant in the range @minus{}32768 to 32767, inclusive.
+
+@item Sint24
+A constant in the range @minus{}8388608 to 8388607, inclusive.
+
+@item Uint04
+A constant in the range 0 to 15, inclusive.
+
+@end table
+
+@need 1000
+@item SPARC---@file{config/sparc/sparc.h}
+@table @code
+@item f
+Floating-point register on the SPARC-V8 architecture and
+lower floating-point register on the SPARC-V9 architecture.
+
+@item e
+Floating-point register.  It is equivalent to @samp{f} on the
+SPARC-V8 architecture and contains both lower and upper
+floating-point registers on the SPARC-V9 architecture.
+
+@item c
+Floating-point condition code register.
+
+@item d
+Lower floating-point register.  It is only valid on the SPARC-V9
+architecture when the Visual Instruction Set is available.
+
+@item b
+Floating-point register.  It is only valid on the SPARC-V9 architecture
+when the Visual Instruction Set is available.
+
+@item h
+64-bit global or out register for the SPARC-V8+ architecture.
+
+@item D
+A vector constant
+
+@item I
+Signed 13-bit constant
+
+@item J
+Zero
+
+@item K
+32-bit constant with the low 12 bits clear (a constant that can be
+loaded with the @code{sethi} instruction)
+
+@item L
+A constant in the range supported by @code{movcc} instructions
+
+@item M
+A constant in the range supported by @code{movrcc} instructions
+
+@item N
+Same as @samp{K}, except that it verifies that bits that are not in the
+lower 32-bit range are all zero.  Must be used instead of @samp{K} for
+modes wider than @code{SImode}
+
+@item O
+The constant 4096
+
+@item G
+Floating-point zero
+
+@item H
+Signed 13-bit constant, sign-extended to 32 or 64 bits
+
+@item Q
+Floating-point constant whose integral representation can
+be moved into an integer register using a single sethi
+instruction
+
+@item R
+Floating-point constant whose integral representation can
+be moved into an integer register using a single mov
+instruction
+
+@item S
+Floating-point constant whose integral representation can
+be moved into an integer register using a high/lo_sum
+instruction sequence
+
+@item T
+Memory address aligned to an 8-byte boundary
+
+@item U
+Even register
+
+@item W
+Memory address for @samp{e} constraint registers
+
+@item Y
+Vector zero
+
+@end table
+
+@item SPU---@file{config/spu/spu.h}
+@table @code
+@item a
+An immediate which can be loaded with the il/ila/ilh/ilhu instructions.  const_int is treated as a 64 bit value.  
+
+@item c
+An immediate for and/xor/or instructions.  const_int is treated as a 64 bit value.  
+
+@item d
+An immediate for the @code{iohl} instruction.  const_int is treated as a 64 bit value.  
+
+@item f
+An immediate which can be loaded with @code{fsmbi}.  
+
+@item A
+An immediate which can be loaded with the il/ila/ilh/ilhu instructions.  const_int is treated as a 32 bit value.  
+
+@item B
+An immediate for most arithmetic instructions.  const_int is treated as a 32 bit value.  
+
+@item C
+An immediate for and/xor/or instructions.  const_int is treated as a 32 bit value.  
+
+@item D
+An immediate for the @code{iohl} instruction.  const_int is treated as a 32 bit value.  
+
+@item I
+A constant in the range [@minus{}64, 63] for shift/rotate instructions.  
+
+@item J
+An unsigned 7-bit constant for conversion/nop/channel instructions.  
+
+@item K
+A signed 10-bit constant for most arithmetic instructions.  
+
+@item M
+A signed 16 bit immediate for @code{stop}.  
+
+@item N
+An unsigned 16-bit constant for @code{iohl} and @code{fsmbi}.  
+
+@item O
+An unsigned 7-bit constant whose 3 least significant bits are 0.  
+
+@item P
+An unsigned 3-bit constant for 16-byte rotates and shifts 
+
+@item R
+Call operand, reg, for indirect calls 
+
+@item S
+Call operand, symbol, for relative calls.  
+
+@item T
+Call operand, const_int, for absolute calls.  
+
+@item U
+An immediate which can be loaded with the il/ila/ilh/ilhu instructions.  const_int is sign extended to 128 bit.  
+
+@item W
+An immediate for shift and rotate instructions.  const_int is treated as a 32 bit value.  
+
+@item Y
+An immediate for and/xor/or instructions.  const_int is sign extended as a 128 bit.  
+
+@item Z
+An immediate for the @code{iohl} instruction.  const_int is sign extended to 128 bit.  
+
+@end table
+
+@item S/390 and zSeries---@file{config/s390/s390.h}
+@table @code
+@item a
+Address register (general purpose register except r0)
+
+@item c
+Condition code register
+
+@item d
+Data register (arbitrary general purpose register)
+
+@item f
+Floating-point register
+
+@item I
+Unsigned 8-bit constant (0--255)
+
+@item J
+Unsigned 12-bit constant (0--4095)
+
+@item K
+Signed 16-bit constant (@minus{}32768--32767)
+
+@item L
+Value appropriate as displacement.
+@table @code
+@item (0..4095)
+for short displacement
+@item (@minus{}524288..524287)
+for long displacement
+@end table
+
+@item M
+Constant integer with a value of 0x7fffffff.
+
+@item N
+Multiple letter constraint followed by 4 parameter letters.
+@table @code
+@item 0..9:
+number of the part counting from most to least significant
+@item H,Q:
+mode of the part
+@item D,S,H:
+mode of the containing operand
+@item 0,F:
+value of the other parts (F---all bits set)
+@end table
+The constraint matches if the specified part of a constant
+has a value different from its other parts.
+
+@item Q
+Memory reference without index register and with short displacement.
+
+@item R
+Memory reference with index register and short displacement.
+
+@item S
+Memory reference without index register but with long displacement.
+
+@item T
+Memory reference with index register and long displacement.
+
+@item U
+Pointer with short displacement.
+
+@item W
+Pointer with long displacement.
+
+@item Y
+Shift count operand.
+
+@end table
+
+@item Score family---@file{config/score/score.h}
+@table @code
+@item d
+Registers from r0 to r32.
+
+@item e
+Registers from r0 to r16.
+
+@item t
+r8---r11 or r22---r27 registers.
+
+@item h
+hi register.
+
+@item l
+lo register.
+
+@item x
+hi + lo register.
+
+@item q
+cnt register.
+
+@item y
+lcb register.
+
+@item z
+scb register.
+
+@item a
+cnt + lcb + scb register.
+
+@item c
+cr0---cr15 register.
+
+@item b
+cp1 registers.
+
+@item f
+cp2 registers.
+
+@item i
+cp3 registers.
+
+@item j
+cp1 + cp2 + cp3 registers.
+
+@item I
+High 16-bit constant (32-bit constant with 16 LSBs zero).
+
+@item J
+Unsigned 5 bit integer (in the range 0 to 31).
+
+@item K
+Unsigned 16 bit integer (in the range 0 to 65535).
+
+@item L
+Signed 16 bit integer (in the range @minus{}32768 to 32767).
+
+@item M
+Unsigned 14 bit integer (in the range 0 to 16383).
+
+@item N
+Signed 14 bit integer (in the range @minus{}8192 to 8191).
+
+@item Z
+Any SYMBOL_REF.
+@end table
+
+@item Xstormy16---@file{config/stormy16/stormy16.h}
+@table @code
+@item a
+Register r0.
+
+@item b
+Register r1.
+
+@item c
+Register r2.
+
+@item d
+Register r8.
+
+@item e
+Registers r0 through r7.
+
+@item t
+Registers r0 and r1.
+
+@item y
+The carry register.
+
+@item z
+Registers r8 and r9.
+
+@item I
+A constant between 0 and 3 inclusive.
+
+@item J
+A constant that has exactly one bit set.
+
+@item K
+A constant that has exactly one bit clear.
+
+@item L
+A constant between 0 and 255 inclusive.
+
+@item M
+A constant between @minus{}255 and 0 inclusive.
+
+@item N
+A constant between @minus{}3 and 0 inclusive.
+
+@item O
+A constant between 1 and 4 inclusive.
+
+@item P
+A constant between @minus{}4 and @minus{}1 inclusive.
+
+@item Q
+A memory reference that is a stack push.
+
+@item R
+A memory reference that is a stack pop.
+
+@item S
+A memory reference that refers to a constant address of known value.
+
+@item T
+The register indicated by Rx (not implemented yet).
+
+@item U
+A constant that is not between 2 and 15 inclusive.
+
+@item Z
+The constant 0.
+
+@end table
+
+@item Xtensa---@file{config/xtensa/constraints.md}
+@table @code
+@item a
+General-purpose 32-bit register
+
+@item b
+One-bit boolean register
+
+@item A
+MAC16 40-bit accumulator register
+
+@item I
+Signed 12-bit integer constant, for use in MOVI instructions
+
+@item J
+Signed 8-bit integer constant, for use in ADDI instructions
+
+@item K
+Integer constant valid for BccI instructions
+
+@item L
+Unsigned constant valid for BccUI instructions
+
+@end table
+
+@end table
+
+@ifset INTERNALS
+@node Disable Insn Alternatives
+@subsection Disable insn alternatives using the @code{enabled} attribute
+@cindex enabled
+
+The @code{enabled} insn attribute may be used to disable certain insn
+alternatives for machine-specific reasons.  This is useful when adding
+new instructions to an existing pattern which are only available for
+certain cpu architecture levels as specified with the @code{-march=}
+option.
+
+If an insn alternative is disabled, then it will never be used.  The
+compiler treats the constraints for the disabled alternative as
+unsatisfiable.
+
+In order to make use of the @code{enabled} attribute a back end has to add
+in the machine description files:
+
+@enumerate
+@item
+A definition of the @code{enabled} insn attribute.  The attribute is
+defined as usual using the @code{define_attr} command.  This
+definition should be based on other insn attributes and/or target flags.
+The @code{enabled} attribute is a numeric attribute and should evaluate to
+@code{(const_int 1)} for an enabled alternative and to
+@code{(const_int 0)} otherwise.
+@item
+A definition of another insn attribute used to describe for what
+reason an insn alternative might be available or
+not.  E.g. @code{cpu_facility} as in the example below.
+@item
+An assignment for the second attribute to each insn definition
+combining instructions which are not all available under the same
+circumstances.  (Note: It obviously only makes sense for definitions
+with more than one alternative.  Otherwise the insn pattern should be
+disabled or enabled using the insn condition.)
+@end enumerate
+
+E.g. the following two patterns could easily be merged using the @code{enabled}
+attribute:
+
+@smallexample
+
+(define_insn "*movdi_old"
+  [(set (match_operand:DI 0 "register_operand" "=d")
+        (match_operand:DI 1 "register_operand" " d"))]
+  "!TARGET_NEW"
+  "lgr %0,%1")
+
+(define_insn "*movdi_new"
+  [(set (match_operand:DI 0 "register_operand" "=d,f,d")
+        (match_operand:DI 1 "register_operand" " d,d,f"))]
+  "TARGET_NEW"
+  "@@
+   lgr  %0,%1
+   ldgr %0,%1
+   lgdr %0,%1")
+
+@end smallexample
+
+to:
+
+@smallexample
+
+(define_insn "*movdi_combined"
+  [(set (match_operand:DI 0 "register_operand" "=d,f,d")
+        (match_operand:DI 1 "register_operand" " d,d,f"))]
+  ""
+  "@@
+   lgr  %0,%1
+   ldgr %0,%1
+   lgdr %0,%1"
+  [(set_attr "cpu_facility" "*,new,new")])
+
+@end smallexample
+
+with the @code{enabled} attribute defined like this:
+
+@smallexample
+
+(define_attr "cpu_facility" "standard,new" (const_string "standard"))
+
+(define_attr "enabled" ""
+  (cond [(eq_attr "cpu_facility" "standard") (const_int 1)
+         (and (eq_attr "cpu_facility" "new")
+              (ne (symbol_ref "TARGET_NEW") (const_int 0)))
+         (const_int 1)]
+        (const_int 0)))
+
+@end smallexample
+
+@end ifset
+
+@ifset INTERNALS
+@node Define Constraints
+@subsection Defining Machine-Specific Constraints
+@cindex defining constraints
+@cindex constraints, defining
+
+Machine-specific constraints fall into two categories: register and
+non-register constraints.  Within the latter category, constraints
+which allow subsets of all possible memory or address operands should
+be specially marked, to give @code{reload} more information.
+
+Machine-specific constraints can be given names of arbitrary length,
+but they must be entirely composed of letters, digits, underscores
+(@samp{_}), and angle brackets (@samp{< >}).  Like C identifiers, they
+must begin with a letter or underscore. 
+
+In order to avoid ambiguity in operand constraint strings, no
+constraint can have a name that begins with any other constraint's
+name.  For example, if @code{x} is defined as a constraint name,
+@code{xy} may not be, and vice versa.  As a consequence of this rule,
+no constraint may begin with one of the generic constraint letters:
+@samp{E F V X g i m n o p r s}.
+
+Register constraints correspond directly to register classes.
+@xref{Register Classes}.  There is thus not much flexibility in their
+definitions.
+
+@deffn {MD Expression} define_register_constraint name regclass docstring
+All three arguments are string constants.
+@var{name} is the name of the constraint, as it will appear in
+@code{match_operand} expressions.  If @var{name} is a multi-letter
+constraint its length shall be the same for all constraints starting
+with the same letter.  @var{regclass} can be either the
+name of the corresponding register class (@pxref{Register Classes}),
+or a C expression which evaluates to the appropriate register class.
+If it is an expression, it must have no side effects, and it cannot
+look at the operand.  The usual use of expressions is to map some
+register constraints to @code{NO_REGS} when the register class
+is not available on a given subarchitecture.
+
+@var{docstring} is a sentence documenting the meaning of the
+constraint.  Docstrings are explained further below.
+@end deffn
+
+Non-register constraints are more like predicates: the constraint
+definition gives a Boolean expression which indicates whether the
+constraint matches.
+
+@deffn {MD Expression} define_constraint name docstring exp
+The @var{name} and @var{docstring} arguments are the same as for
+@code{define_register_constraint}, but note that the docstring comes
+immediately after the name for these expressions.  @var{exp} is an RTL
+expression, obeying the same rules as the RTL expressions in predicate
+definitions.  @xref{Defining Predicates}, for details.  If it
+evaluates true, the constraint matches; if it evaluates false, it
+doesn't. Constraint expressions should indicate which RTL codes they
+might match, just like predicate expressions.
+
+@code{match_test} C expressions have access to the
+following variables:
+
+@table @var
+@item op
+The RTL object defining the operand.
+@item mode
+The machine mode of @var{op}.
+@item ival
+@samp{INTVAL (@var{op})}, if @var{op} is a @code{const_int}.
+@item hval
+@samp{CONST_DOUBLE_HIGH (@var{op})}, if @var{op} is an integer
+@code{const_double}.
+@item lval
+@samp{CONST_DOUBLE_LOW (@var{op})}, if @var{op} is an integer
+@code{const_double}.
+@item rval
+@samp{CONST_DOUBLE_REAL_VALUE (@var{op})}, if @var{op} is a floating-point
+@code{const_double}.
+@end table
+
+The @var{*val} variables should only be used once another piece of the
+expression has verified that @var{op} is the appropriate kind of RTL
+object.
+@end deffn
+
+Most non-register constraints should be defined with
+@code{define_constraint}.  The remaining two definition expressions
+are only appropriate for constraints that should be handled specially
+by @code{reload} if they fail to match.
+
+@deffn {MD Expression} define_memory_constraint name docstring exp
+Use this expression for constraints that match a subset of all memory
+operands: that is, @code{reload} can make them match by converting the
+operand to the form @samp{@w{(mem (reg @var{X}))}}, where @var{X} is a
+base register (from the register class specified by
+@code{BASE_REG_CLASS}, @pxref{Register Classes}).
+
+For example, on the S/390, some instructions do not accept arbitrary
+memory references, but only those that do not make use of an index
+register.  The constraint letter @samp{Q} is defined to represent a
+memory address of this type.  If @samp{Q} is defined with
+@code{define_memory_constraint}, a @samp{Q} constraint can handle any
+memory operand, because @code{reload} knows it can simply copy the
+memory address into a base register if required.  This is analogous to
+the way an @samp{o} constraint can handle any memory operand.
+
+The syntax and semantics are otherwise identical to
+@code{define_constraint}.
+@end deffn
+
+@deffn {MD Expression} define_address_constraint name docstring exp
+Use this expression for constraints that match a subset of all address
+operands: that is, @code{reload} can make the constraint match by
+converting the operand to the form @samp{@w{(reg @var{X})}}, again
+with @var{X} a base register.
+
+Constraints defined with @code{define_address_constraint} can only be
+used with the @code{address_operand} predicate, or machine-specific
+predicates that work the same way.  They are treated analogously to
+the generic @samp{p} constraint.
+
+The syntax and semantics are otherwise identical to
+@code{define_constraint}.
+@end deffn
+
+For historical reasons, names beginning with the letters @samp{G H}
+are reserved for constraints that match only @code{const_double}s, and
+names beginning with the letters @samp{I J K L M N O P} are reserved
+for constraints that match only @code{const_int}s.  This may change in
+the future.  For the time being, constraints with these names must be
+written in a stylized form, so that @code{genpreds} can tell you did
+it correctly:
+
+@smallexample
+@group
+(define_constraint "[@var{GHIJKLMNOP}]@dots{}"
+  "@var{doc}@dots{}"
+  (and (match_code "const_int")  ; @r{@code{const_double} for G/H}
+       @var{condition}@dots{}))            ; @r{usually a @code{match_test}}
+@end group
+@end smallexample
+@c the semicolons line up in the formatted manual
+
+It is fine to use names beginning with other letters for constraints
+that match @code{const_double}s or @code{const_int}s.
+
+Each docstring in a constraint definition should be one or more complete
+sentences, marked up in Texinfo format.  @emph{They are currently unused.}
+In the future they will be copied into the GCC manual, in @ref{Machine
+Constraints}, replacing the hand-maintained tables currently found in
+that section.  Also, in the future the compiler may use this to give
+more helpful diagnostics when poor choice of @code{asm} constraints
+causes a reload failure.
+
+If you put the pseudo-Texinfo directive @samp{@@internal} at the
+beginning of a docstring, then (in the future) it will appear only in
+the internals manual's version of the machine-specific constraint tables.
+Use this for constraints that should not appear in @code{asm} statements.
+
+@node C Constraint Interface
+@subsection Testing constraints from C
+@cindex testing constraints
+@cindex constraints, testing
+
+It is occasionally useful to test a constraint from C code rather than
+implicitly via the constraint string in a @code{match_operand}.  The
+generated file @file{tm_p.h} declares a few interfaces for working
+with machine-specific constraints.  None of these interfaces work with
+the generic constraints described in @ref{Simple Constraints}.  This
+may change in the future.
+
+@strong{Warning:} @file{tm_p.h} may declare other functions that
+operate on constraints, besides the ones documented here.  Do not use
+those functions from machine-dependent code.  They exist to implement
+the old constraint interface that machine-independent components of
+the compiler still expect.  They will change or disappear in the
+future.
+
+Some valid constraint names are not valid C identifiers, so there is a
+mangling scheme for referring to them from C@.  Constraint names that
+do not contain angle brackets or underscores are left unchanged.
+Underscores are doubled, each @samp{<} is replaced with @samp{_l}, and
+each @samp{>} with @samp{_g}.  Here are some examples:
+
+@c the @c's prevent double blank lines in the printed manual.
+@example
+@multitable {Original} {Mangled}
+@item @strong{Original} @tab @strong{Mangled}  @c
+@item @code{x}     @tab @code{x}       @c
+@item @code{P42x}  @tab @code{P42x}    @c
+@item @code{P4_x}  @tab @code{P4__x}   @c
+@item @code{P4>x}  @tab @code{P4_gx}   @c
+@item @code{P4>>}  @tab @code{P4_g_g}  @c
+@item @code{P4_g>} @tab @code{P4__g_g} @c
+@end multitable
+@end example
+
+Throughout this section, the variable @var{c} is either a constraint
+in the abstract sense, or a constant from @code{enum constraint_num};
+the variable @var{m} is a mangled constraint name (usually as part of
+a larger identifier).
+
+@deftp Enum constraint_num
+For each machine-specific constraint, there is a corresponding
+enumeration constant: @samp{CONSTRAINT_} plus the mangled name of the
+constraint.  Functions that take an @code{enum constraint_num} as an
+argument expect one of these constants.
+
+Machine-independent constraints do not have associated constants.
+This may change in the future.
+@end deftp
+
+@deftypefun {inline bool} satisfies_constraint_@var{m} (rtx @var{exp})
+For each machine-specific, non-register constraint @var{m}, there is
+one of these functions; it returns @code{true} if @var{exp} satisfies the
+constraint.  These functions are only visible if @file{rtl.h} was included
+before @file{tm_p.h}.
+@end deftypefun
+
+@deftypefun bool constraint_satisfied_p (rtx @var{exp}, enum constraint_num @var{c})
+Like the @code{satisfies_constraint_@var{m}} functions, but the
+constraint to test is given as an argument, @var{c}.  If @var{c}
+specifies a register constraint, this function will always return
+@code{false}.
+@end deftypefun
+
+@deftypefun {enum reg_class} regclass_for_constraint (enum constraint_num @var{c})
+Returns the register class associated with @var{c}.  If @var{c} is not
+a register constraint, or those registers are not available for the
+currently selected subtarget, returns @code{NO_REGS}.
+@end deftypefun
+
+Here is an example use of @code{satisfies_constraint_@var{m}}.  In
+peephole optimizations (@pxref{Peephole Definitions}), operand
+constraint strings are ignored, so if there are relevant constraints,
+they must be tested in the C condition.  In the example, the
+optimization is applied if operand 2 does @emph{not} satisfy the
+@samp{K} constraint.  (This is a simplified version of a peephole
+definition from the i386 machine description.)
+
+@smallexample
+(define_peephole2
+  [(match_scratch:SI 3 "r")
+   (set (match_operand:SI 0 "register_operand" "")
+        (mult:SI (match_operand:SI 1 "memory_operand" "")
+                 (match_operand:SI 2 "immediate_operand" "")))]
+
+  "!satisfies_constraint_K (operands[2])"
+
+  [(set (match_dup 3) (match_dup 1))
+   (set (match_dup 0) (mult:SI (match_dup 3) (match_dup 2)))]
+
+  "")
+@end smallexample
+
+@node Standard Names
+@section Standard Pattern Names For Generation
+@cindex standard pattern names
+@cindex pattern names
+@cindex names, pattern
+
+Here is a table of the instruction names that are meaningful in the RTL
+generation pass of the compiler.  Giving one of these names to an
+instruction pattern tells the RTL generation pass that it can use the
+pattern to accomplish a certain task.
+
+@table @asis
+@cindex @code{mov@var{m}} instruction pattern
+@item @samp{mov@var{m}}
+Here @var{m} stands for a two-letter machine mode name, in lowercase.
+This instruction pattern moves data with that machine mode from operand
+1 to operand 0.  For example, @samp{movsi} moves full-word data.
+
+If operand 0 is a @code{subreg} with mode @var{m} of a register whose
+own mode is wider than @var{m}, the effect of this instruction is
+to store the specified value in the part of the register that corresponds
+to mode @var{m}.  Bits outside of @var{m}, but which are within the
+same target word as the @code{subreg} are undefined.  Bits which are
+outside the target word are left unchanged.
+
+This class of patterns is special in several ways.  First of all, each
+of these names up to and including full word size @emph{must} be defined,
+because there is no other way to copy a datum from one place to another.
+If there are patterns accepting operands in larger modes,
+@samp{mov@var{m}} must be defined for integer modes of those sizes.
+
+Second, these patterns are not used solely in the RTL generation pass.
+Even the reload pass can generate move insns to copy values from stack
+slots into temporary registers.  When it does so, one of the operands is
+a hard register and the other is an operand that can need to be reloaded
+into a register.
+
+@findex force_reg
+Therefore, when given such a pair of operands, the pattern must generate
+RTL which needs no reloading and needs no temporary registers---no
+registers other than the operands.  For example, if you support the
+pattern with a @code{define_expand}, then in such a case the
+@code{define_expand} mustn't call @code{force_reg} or any other such
+function which might generate new pseudo registers.
+
+This requirement exists even for subword modes on a RISC machine where
+fetching those modes from memory normally requires several insns and
+some temporary registers.
+
+@findex change_address
+During reload a memory reference with an invalid address may be passed
+as an operand.  Such an address will be replaced with a valid address
+later in the reload pass.  In this case, nothing may be done with the
+address except to use it as it stands.  If it is copied, it will not be
+replaced with a valid address.  No attempt should be made to make such
+an address into a valid address and no routine (such as
+@code{change_address}) that will do so may be called.  Note that
+@code{general_operand} will fail when applied to such an address.
+
+@findex reload_in_progress
+The global variable @code{reload_in_progress} (which must be explicitly
+declared if required) can be used to determine whether such special
+handling is required.
+
+The variety of operands that have reloads depends on the rest of the
+machine description, but typically on a RISC machine these can only be
+pseudo registers that did not get hard registers, while on other
+machines explicit memory references will get optional reloads.
+
+If a scratch register is required to move an object to or from memory,
+it can be allocated using @code{gen_reg_rtx} prior to life analysis.
+
+If there are cases which need scratch registers during or after reload,
+you must provide an appropriate secondary_reload target hook.
+
+@findex can_create_pseudo_p
+The macro @code{can_create_pseudo_p} can be used to determine if it
+is unsafe to create new pseudo registers.  If this variable is nonzero, then
+it is unsafe to call @code{gen_reg_rtx} to allocate a new pseudo.
+
+The constraints on a @samp{mov@var{m}} must permit moving any hard
+register to any other hard register provided that
+@code{HARD_REGNO_MODE_OK} permits mode @var{m} in both registers and
+@code{TARGET_REGISTER_MOVE_COST} applied to their classes returns a value
+of 2.
+
+It is obligatory to support floating point @samp{mov@var{m}}
+instructions into and out of any registers that can hold fixed point
+values, because unions and structures (which have modes @code{SImode} or
+@code{DImode}) can be in those registers and they may have floating
+point members.
+
+There may also be a need to support fixed point @samp{mov@var{m}}
+instructions in and out of floating point registers.  Unfortunately, I
+have forgotten why this was so, and I don't know whether it is still
+true.  If @code{HARD_REGNO_MODE_OK} rejects fixed point values in
+floating point registers, then the constraints of the fixed point
+@samp{mov@var{m}} instructions must be designed to avoid ever trying to
+reload into a floating point register.
+
+@cindex @code{reload_in} instruction pattern
+@cindex @code{reload_out} instruction pattern
+@item @samp{reload_in@var{m}}
+@itemx @samp{reload_out@var{m}}
+These named patterns have been obsoleted by the target hook
+@code{secondary_reload}.
+
+Like @samp{mov@var{m}}, but used when a scratch register is required to
+move between operand 0 and operand 1.  Operand 2 describes the scratch
+register.  See the discussion of the @code{SECONDARY_RELOAD_CLASS}
+macro in @pxref{Register Classes}.
+
+There are special restrictions on the form of the @code{match_operand}s
+used in these patterns.  First, only the predicate for the reload
+operand is examined, i.e., @code{reload_in} examines operand 1, but not
+the predicates for operand 0 or 2.  Second, there may be only one
+alternative in the constraints.  Third, only a single register class
+letter may be used for the constraint; subsequent constraint letters
+are ignored.  As a special exception, an empty constraint string
+matches the @code{ALL_REGS} register class.  This may relieve ports
+of the burden of defining an @code{ALL_REGS} constraint letter just
+for these patterns.
+
+@cindex @code{movstrict@var{m}} instruction pattern
+@item @samp{movstrict@var{m}}
+Like @samp{mov@var{m}} except that if operand 0 is a @code{subreg}
+with mode @var{m} of a register whose natural mode is wider,
+the @samp{movstrict@var{m}} instruction is guaranteed not to alter
+any of the register except the part which belongs to mode @var{m}.
+
+@cindex @code{movmisalign@var{m}} instruction pattern
+@item @samp{movmisalign@var{m}}
+This variant of a move pattern is designed to load or store a value
+from a memory address that is not naturally aligned for its mode.
+For a store, the memory will be in operand 0; for a load, the memory
+will be in operand 1.  The other operand is guaranteed not to be a
+memory, so that it's easy to tell whether this is a load or store.
+
+This pattern is used by the autovectorizer, and when expanding a
+@code{MISALIGNED_INDIRECT_REF} expression.
+
+@cindex @code{load_multiple} instruction pattern
+@item @samp{load_multiple}
+Load several consecutive memory locations into consecutive registers.
+Operand 0 is the first of the consecutive registers, operand 1
+is the first memory location, and operand 2 is a constant: the
+number of consecutive registers.
+
+Define this only if the target machine really has such an instruction;
+do not define this if the most efficient way of loading consecutive
+registers from memory is to do them one at a time.
+
+On some machines, there are restrictions as to which consecutive
+registers can be stored into memory, such as particular starting or
+ending register numbers or only a range of valid counts.  For those
+machines, use a @code{define_expand} (@pxref{Expander Definitions})
+and make the pattern fail if the restrictions are not met.
+
+Write the generated insn as a @code{parallel} with elements being a
+@code{set} of one register from the appropriate memory location (you may
+also need @code{use} or @code{clobber} elements).  Use a
+@code{match_parallel} (@pxref{RTL Template}) to recognize the insn.  See
+@file{rs6000.md} for examples of the use of this insn pattern.
+
+@cindex @samp{store_multiple} instruction pattern
+@item @samp{store_multiple}
+Similar to @samp{load_multiple}, but store several consecutive registers
+into consecutive memory locations.  Operand 0 is the first of the
+consecutive memory locations, operand 1 is the first register, and
+operand 2 is a constant: the number of consecutive registers.
+
+@cindex @code{vec_set@var{m}} instruction pattern
+@item @samp{vec_set@var{m}}
+Set given field in the vector value.  Operand 0 is the vector to modify,
+operand 1 is new value of field and operand 2 specify the field index.
+
+@cindex @code{vec_extract@var{m}} instruction pattern
+@item @samp{vec_extract@var{m}}
+Extract given field from the vector value.  Operand 1 is the vector, operand 2
+specify field index and operand 0 place to store value into.
+
+@cindex @code{vec_extract_even@var{m}} instruction pattern
+@item @samp{vec_extract_even@var{m}}
+Extract even elements from the input vectors (operand 1 and operand 2). 
+The even elements of operand 2 are concatenated to the even elements of operand
+1 in their original order. The result is stored in operand 0. 
+The output and input vectors should have the same modes. 
+
+@cindex @code{vec_extract_odd@var{m}} instruction pattern
+@item @samp{vec_extract_odd@var{m}}
+Extract odd elements from the input vectors (operand 1 and operand 2). 
+The odd elements of operand 2 are concatenated to the odd elements of operand 
+1 in their original order. The result is stored in operand 0.
+The output and input vectors should have the same modes.
+
+@cindex @code{vec_interleave_high@var{m}} instruction pattern
+@item @samp{vec_interleave_high@var{m}}
+Merge high elements of the two input vectors into the output vector. The output
+and input vectors should have the same modes (@code{N} elements). The high
+@code{N/2} elements of the first input vector are interleaved with the high
+@code{N/2} elements of the second input vector.
+
+@cindex @code{vec_interleave_low@var{m}} instruction pattern
+@item @samp{vec_interleave_low@var{m}}
+Merge low elements of the two input vectors into the output vector. The output
+and input vectors should have the same modes (@code{N} elements). The low
+@code{N/2} elements of the first input vector are interleaved with the low 
+@code{N/2} elements of the second input vector.
+
+@cindex @code{vec_init@var{m}} instruction pattern
+@item @samp{vec_init@var{m}}
+Initialize the vector to given values.  Operand 0 is the vector to initialize
+and operand 1 is parallel containing values for individual fields.
+
+@cindex @code{push@var{m}1} instruction pattern
+@item @samp{push@var{m}1}
+Output a push instruction.  Operand 0 is value to push.  Used only when
+@code{PUSH_ROUNDING} is defined.  For historical reason, this pattern may be
+missing and in such case an @code{mov} expander is used instead, with a
+@code{MEM} expression forming the push operation.  The @code{mov} expander
+method is deprecated.
+
+@cindex @code{add@var{m}3} instruction pattern
+@item @samp{add@var{m}3}
+Add operand 2 and operand 1, storing the result in operand 0.  All operands
+must have mode @var{m}.  This can be used even on two-address machines, by
+means of constraints requiring operands 1 and 0 to be the same location.
+
+@cindex @code{ssadd@var{m}3} instruction pattern
+@cindex @code{usadd@var{m}3} instruction pattern
+@cindex @code{sub@var{m}3} instruction pattern
+@cindex @code{sssub@var{m}3} instruction pattern
+@cindex @code{ussub@var{m}3} instruction pattern
+@cindex @code{mul@var{m}3} instruction pattern
+@cindex @code{ssmul@var{m}3} instruction pattern
+@cindex @code{usmul@var{m}3} instruction pattern
+@cindex @code{div@var{m}3} instruction pattern
+@cindex @code{ssdiv@var{m}3} instruction pattern
+@cindex @code{udiv@var{m}3} instruction pattern
+@cindex @code{usdiv@var{m}3} instruction pattern
+@cindex @code{mod@var{m}3} instruction pattern
+@cindex @code{umod@var{m}3} instruction pattern
+@cindex @code{umin@var{m}3} instruction pattern
+@cindex @code{umax@var{m}3} instruction pattern
+@cindex @code{and@var{m}3} instruction pattern
+@cindex @code{ior@var{m}3} instruction pattern
+@cindex @code{xor@var{m}3} instruction pattern
+@item @samp{ssadd@var{m}3}, @samp{usadd@var{m}3}
+@item @samp{sub@var{m}3}, @samp{sssub@var{m}3}, @samp{ussub@var{m}3}
+@item @samp{mul@var{m}3}, @samp{ssmul@var{m}3}, @samp{usmul@var{m}3}
+@itemx @samp{div@var{m}3}, @samp{ssdiv@var{m}3}
+@itemx @samp{udiv@var{m}3}, @samp{usdiv@var{m}3}
+@itemx @samp{mod@var{m}3}, @samp{umod@var{m}3}
+@itemx @samp{umin@var{m}3}, @samp{umax@var{m}3}
+@itemx @samp{and@var{m}3}, @samp{ior@var{m}3}, @samp{xor@var{m}3}
+Similar, for other arithmetic operations.
+
+@cindex @code{fma@var{m}4} instruction pattern
+@item @samp{fma@var{m}4}
+Multiply operand 2 and operand 1, then add operand 3, storing the
+result in operand 0.  All operands must have mode @var{m}.  This
+pattern is used to implement the @code{fma}, @code{fmaf}, and
+@code{fmal} builtin functions from the ISO C99 standard.  The
+@code{fma} operation may produce different results than doing the
+multiply followed by the add if the machine does not perform a
+rounding step between the operations.
+
+@cindex @code{fms@var{m}4} instruction pattern
+@item @samp{fms@var{m}4}
+Like @code{fma@var{m}4}, except operand 3 subtracted from the
+product instead of added to the product.  This is represented
+in the rtl as
+
+@smallexample
+(fma:@var{m} @var{op1} @var{op2} (neg:@var{m} @var{op3}))
+@end smallexample
+
+@cindex @code{fnma@var{m}4} instruction pattern
+@item @samp{fnma@var{m}4}
+Like @code{fma@var{m}4} except that the intermediate product
+is negated before being added to operand 3.  This is represented
+in the rtl as
+
+@smallexample
+(fma:@var{m} (neg:@var{m} @var{op1}) @var{op2} @var{op3})
+@end smallexample
+
+@cindex @code{fnms@var{m}4} instruction pattern
+@item @samp{fnms@var{m}4}
+Like @code{fms@var{m}4} except that the intermediate product
+is negated before subtracting operand 3.  This is represented
+in the rtl as
+
+@smallexample
+(fma:@var{m} (neg:@var{m} @var{op1}) @var{op2} (neg:@var{m} @var{op3}))
+@end smallexample
+
+@cindex @code{min@var{m}3} instruction pattern
+@cindex @code{max@var{m}3} instruction pattern
+@item @samp{smin@var{m}3}, @samp{smax@var{m}3}
+Signed minimum and maximum operations.  When used with floating point,
+if both operands are zeros, or if either operand is @code{NaN}, then
+it is unspecified which of the two operands is returned as the result.
+
+@cindex @code{reduc_smin_@var{m}} instruction pattern
+@cindex @code{reduc_smax_@var{m}} instruction pattern
+@item @samp{reduc_smin_@var{m}}, @samp{reduc_smax_@var{m}}
+Find the signed minimum/maximum of the elements of a vector. The vector is
+operand 1, and the scalar result is stored in the least significant bits of
+operand 0 (also a vector). The output and input vector should have the same
+modes.
+
+@cindex @code{reduc_umin_@var{m}} instruction pattern
+@cindex @code{reduc_umax_@var{m}} instruction pattern
+@item @samp{reduc_umin_@var{m}}, @samp{reduc_umax_@var{m}}
+Find the unsigned minimum/maximum of the elements of a vector. The vector is
+operand 1, and the scalar result is stored in the least significant bits of
+operand 0 (also a vector). The output and input vector should have the same
+modes.
+
+@cindex @code{reduc_splus_@var{m}} instruction pattern
+@item @samp{reduc_splus_@var{m}}
+Compute the sum of the signed elements of a vector. The vector is operand 1,
+and the scalar result is stored in the least significant bits of operand 0
+(also a vector). The output and input vector should have the same modes.
+
+@cindex @code{reduc_uplus_@var{m}} instruction pattern
+@item @samp{reduc_uplus_@var{m}}
+Compute the sum of the unsigned elements of a vector. The vector is operand 1,
+and the scalar result is stored in the least significant bits of operand 0
+(also a vector). The output and input vector should have the same modes.
+
+@cindex @code{sdot_prod@var{m}} instruction pattern
+@item @samp{sdot_prod@var{m}}
+@cindex @code{udot_prod@var{m}} instruction pattern
+@item @samp{udot_prod@var{m}}
+Compute the sum of the products of two signed/unsigned elements. 
+Operand 1 and operand 2 are of the same mode. Their product, which is of a 
+wider mode, is computed and added to operand 3. Operand 3 is of a mode equal or 
+wider than the mode of the product. The result is placed in operand 0, which
+is of the same mode as operand 3. 
+
+@cindex @code{ssum_widen@var{m3}} instruction pattern
+@item @samp{ssum_widen@var{m3}}
+@cindex @code{usum_widen@var{m3}} instruction pattern
+@item @samp{usum_widen@var{m3}}
+Operands 0 and 2 are of the same mode, which is wider than the mode of 
+operand 1. Add operand 1 to operand 2 and place the widened result in
+operand 0. (This is used express accumulation of elements into an accumulator
+of a wider mode.)
+
+@cindex @code{vec_shl_@var{m}} instruction pattern
+@cindex @code{vec_shr_@var{m}} instruction pattern
+@item @samp{vec_shl_@var{m}}, @samp{vec_shr_@var{m}}
+Whole vector left/right shift in bits.
+Operand 1 is a vector to be shifted.
+Operand 2 is an integer shift amount in bits.
+Operand 0 is where the resulting shifted vector is stored.
+The output and input vectors should have the same modes.
+
+@cindex @code{vec_pack_trunc_@var{m}} instruction pattern
+@item @samp{vec_pack_trunc_@var{m}}
+Narrow (demote) and merge the elements of two vectors. Operands 1 and 2
+are vectors of the same mode having N integral or floating point elements
+of size S@.  Operand 0 is the resulting vector in which 2*N elements of
+size N/2 are concatenated after narrowing them down using truncation.
+
+@cindex @code{vec_pack_ssat_@var{m}} instruction pattern
+@cindex @code{vec_pack_usat_@var{m}} instruction pattern
+@item @samp{vec_pack_ssat_@var{m}}, @samp{vec_pack_usat_@var{m}}
+Narrow (demote) and merge the elements of two vectors.  Operands 1 and 2
+are vectors of the same mode having N integral elements of size S.
+Operand 0 is the resulting vector in which the elements of the two input
+vectors are concatenated after narrowing them down using signed/unsigned
+saturating arithmetic.
+
+@cindex @code{vec_pack_sfix_trunc_@var{m}} instruction pattern
+@cindex @code{vec_pack_ufix_trunc_@var{m}} instruction pattern
+@item @samp{vec_pack_sfix_trunc_@var{m}}, @samp{vec_pack_ufix_trunc_@var{m}}
+Narrow, convert to signed/unsigned integral type and merge the elements
+of two vectors.  Operands 1 and 2 are vectors of the same mode having N
+floating point elements of size S@.  Operand 0 is the resulting vector
+in which 2*N elements of size N/2 are concatenated.
+
+@cindex @code{vec_unpacks_hi_@var{m}} instruction pattern
+@cindex @code{vec_unpacks_lo_@var{m}} instruction pattern
+@item @samp{vec_unpacks_hi_@var{m}}, @samp{vec_unpacks_lo_@var{m}}
+Extract and widen (promote) the high/low part of a vector of signed
+integral or floating point elements.  The input vector (operand 1) has N
+elements of size S@.  Widen (promote) the high/low elements of the vector
+using signed or floating point extension and place the resulting N/2
+values of size 2*S in the output vector (operand 0).
+
+@cindex @code{vec_unpacku_hi_@var{m}} instruction pattern
+@cindex @code{vec_unpacku_lo_@var{m}} instruction pattern
+@item @samp{vec_unpacku_hi_@var{m}}, @samp{vec_unpacku_lo_@var{m}}
+Extract and widen (promote) the high/low part of a vector of unsigned
+integral elements.  The input vector (operand 1) has N elements of size S.
+Widen (promote) the high/low elements of the vector using zero extension and
+place the resulting N/2 values of size 2*S in the output vector (operand 0).
+
+@cindex @code{vec_unpacks_float_hi_@var{m}} instruction pattern
+@cindex @code{vec_unpacks_float_lo_@var{m}} instruction pattern
+@cindex @code{vec_unpacku_float_hi_@var{m}} instruction pattern
+@cindex @code{vec_unpacku_float_lo_@var{m}} instruction pattern
+@item @samp{vec_unpacks_float_hi_@var{m}}, @samp{vec_unpacks_float_lo_@var{m}}
+@itemx @samp{vec_unpacku_float_hi_@var{m}}, @samp{vec_unpacku_float_lo_@var{m}}
+Extract, convert to floating point type and widen the high/low part of a
+vector of signed/unsigned integral elements.  The input vector (operand 1)
+has N elements of size S@.  Convert the high/low elements of the vector using
+floating point conversion and place the resulting N/2 values of size 2*S in
+the output vector (operand 0).
+
+@cindex @code{vec_widen_umult_hi_@var{m}} instruction pattern
+@cindex @code{vec_widen_umult_lo__@var{m}} instruction pattern
+@cindex @code{vec_widen_smult_hi_@var{m}} instruction pattern
+@cindex @code{vec_widen_smult_lo_@var{m}} instruction pattern
+@item @samp{vec_widen_umult_hi_@var{m}}, @samp{vec_widen_umult_lo_@var{m}}
+@itemx @samp{vec_widen_smult_hi_@var{m}}, @samp{vec_widen_smult_lo_@var{m}}
+Signed/Unsigned widening multiplication.  The two inputs (operands 1 and 2)
+are vectors with N signed/unsigned elements of size S@.  Multiply the high/low
+elements of the two vectors, and put the N/2 products of size 2*S in the
+output vector (operand 0).
+
+@cindex @code{mulhisi3} instruction pattern
+@item @samp{mulhisi3}
+Multiply operands 1 and 2, which have mode @code{HImode}, and store
+a @code{SImode} product in operand 0.
+
+@cindex @code{mulqihi3} instruction pattern
+@cindex @code{mulsidi3} instruction pattern
+@item @samp{mulqihi3}, @samp{mulsidi3}
+Similar widening-multiplication instructions of other widths.
+
+@cindex @code{umulqihi3} instruction pattern
+@cindex @code{umulhisi3} instruction pattern
+@cindex @code{umulsidi3} instruction pattern
+@item @samp{umulqihi3}, @samp{umulhisi3}, @samp{umulsidi3}
+Similar widening-multiplication instructions that do unsigned
+multiplication.
+
+@cindex @code{usmulqihi3} instruction pattern
+@cindex @code{usmulhisi3} instruction pattern
+@cindex @code{usmulsidi3} instruction pattern
+@item @samp{usmulqihi3}, @samp{usmulhisi3}, @samp{usmulsidi3}
+Similar widening-multiplication instructions that interpret the first
+operand as unsigned and the second operand as signed, then do a signed
+multiplication.
+
+@cindex @code{smul@var{m}3_highpart} instruction pattern
+@item @samp{smul@var{m}3_highpart}
+Perform a signed multiplication of operands 1 and 2, which have mode
+@var{m}, and store the most significant half of the product in operand 0.
+The least significant half of the product is discarded.
+
+@cindex @code{umul@var{m}3_highpart} instruction pattern
+@item @samp{umul@var{m}3_highpart}
+Similar, but the multiplication is unsigned.
+
+@cindex @code{madd@var{m}@var{n}4} instruction pattern
+@item @samp{madd@var{m}@var{n}4}
+Multiply operands 1 and 2, sign-extend them to mode @var{n}, add
+operand 3, and store the result in operand 0.  Operands 1 and 2
+have mode @var{m} and operands 0 and 3 have mode @var{n}.
+Both modes must be integer or fixed-point modes and @var{n} must be twice
+the size of @var{m}.
+
+In other words, @code{madd@var{m}@var{n}4} is like
+@code{mul@var{m}@var{n}3} except that it also adds operand 3.
+
+These instructions are not allowed to @code{FAIL}.
+
+@cindex @code{umadd@var{m}@var{n}4} instruction pattern
+@item @samp{umadd@var{m}@var{n}4}
+Like @code{madd@var{m}@var{n}4}, but zero-extend the multiplication
+operands instead of sign-extending them.
+
+@cindex @code{ssmadd@var{m}@var{n}4} instruction pattern
+@item @samp{ssmadd@var{m}@var{n}4}
+Like @code{madd@var{m}@var{n}4}, but all involved operations must be
+signed-saturating.
+
+@cindex @code{usmadd@var{m}@var{n}4} instruction pattern
+@item @samp{usmadd@var{m}@var{n}4}
+Like @code{umadd@var{m}@var{n}4}, but all involved operations must be
+unsigned-saturating.
+
+@cindex @code{msub@var{m}@var{n}4} instruction pattern
+@item @samp{msub@var{m}@var{n}4}
+Multiply operands 1 and 2, sign-extend them to mode @var{n}, subtract the
+result from operand 3, and store the result in operand 0.  Operands 1 and 2
+have mode @var{m} and operands 0 and 3 have mode @var{n}.
+Both modes must be integer or fixed-point modes and @var{n} must be twice
+the size of @var{m}.
+
+In other words, @code{msub@var{m}@var{n}4} is like
+@code{mul@var{m}@var{n}3} except that it also subtracts the result
+from operand 3.
+
+These instructions are not allowed to @code{FAIL}.
+
+@cindex @code{umsub@var{m}@var{n}4} instruction pattern
+@item @samp{umsub@var{m}@var{n}4}
+Like @code{msub@var{m}@var{n}4}, but zero-extend the multiplication
+operands instead of sign-extending them.
+
+@cindex @code{ssmsub@var{m}@var{n}4} instruction pattern
+@item @samp{ssmsub@var{m}@var{n}4}
+Like @code{msub@var{m}@var{n}4}, but all involved operations must be
+signed-saturating.
+
+@cindex @code{usmsub@var{m}@var{n}4} instruction pattern
+@item @samp{usmsub@var{m}@var{n}4}
+Like @code{umsub@var{m}@var{n}4}, but all involved operations must be
+unsigned-saturating.
+
+@cindex @code{divmod@var{m}4} instruction pattern
+@item @samp{divmod@var{m}4}
+Signed division that produces both a quotient and a remainder.
+Operand 1 is divided by operand 2 to produce a quotient stored
+in operand 0 and a remainder stored in operand 3.
+
+For machines with an instruction that produces both a quotient and a
+remainder, provide a pattern for @samp{divmod@var{m}4} but do not
+provide patterns for @samp{div@var{m}3} and @samp{mod@var{m}3}.  This
+allows optimization in the relatively common case when both the quotient
+and remainder are computed.
+
+If an instruction that just produces a quotient or just a remainder
+exists and is more efficient than the instruction that produces both,
+write the output routine of @samp{divmod@var{m}4} to call
+@code{find_reg_note} and look for a @code{REG_UNUSED} note on the
+quotient or remainder and generate the appropriate instruction.
+
+@cindex @code{udivmod@var{m}4} instruction pattern
+@item @samp{udivmod@var{m}4}
+Similar, but does unsigned division.
+
+@anchor{shift patterns}
+@cindex @code{ashl@var{m}3} instruction pattern
+@cindex @code{ssashl@var{m}3} instruction pattern
+@cindex @code{usashl@var{m}3} instruction pattern
+@item @samp{ashl@var{m}3}, @samp{ssashl@var{m}3}, @samp{usashl@var{m}3}
+Arithmetic-shift operand 1 left by a number of bits specified by operand
+2, and store the result in operand 0.  Here @var{m} is the mode of
+operand 0 and operand 1; operand 2's mode is specified by the
+instruction pattern, and the compiler will convert the operand to that
+mode before generating the instruction.  The meaning of out-of-range shift
+counts can optionally be specified by @code{TARGET_SHIFT_TRUNCATION_MASK}.
+@xref{TARGET_SHIFT_TRUNCATION_MASK}.  Operand 2 is always a scalar type.
+
+@cindex @code{ashr@var{m}3} instruction pattern
+@cindex @code{lshr@var{m}3} instruction pattern
+@cindex @code{rotl@var{m}3} instruction pattern
+@cindex @code{rotr@var{m}3} instruction pattern
+@item @samp{ashr@var{m}3}, @samp{lshr@var{m}3}, @samp{rotl@var{m}3}, @samp{rotr@var{m}3}
+Other shift and rotate instructions, analogous to the
+@code{ashl@var{m}3} instructions.  Operand 2 is always a scalar type.
+
+@cindex @code{vashl@var{m}3} instruction pattern
+@cindex @code{vashr@var{m}3} instruction pattern
+@cindex @code{vlshr@var{m}3} instruction pattern
+@cindex @code{vrotl@var{m}3} instruction pattern
+@cindex @code{vrotr@var{m}3} instruction pattern
+@item @samp{vashl@var{m}3}, @samp{vashr@var{m}3}, @samp{vlshr@var{m}3}, @samp{vrotl@var{m}3}, @samp{vrotr@var{m}3}
+Vector shift and rotate instructions that take vectors as operand 2
+instead of a scalar type.
+
+@cindex @code{neg@var{m}2} instruction pattern
+@cindex @code{ssneg@var{m}2} instruction pattern
+@cindex @code{usneg@var{m}2} instruction pattern
+@item @samp{neg@var{m}2}, @samp{ssneg@var{m}2}, @samp{usneg@var{m}2}
+Negate operand 1 and store the result in operand 0.
+
+@cindex @code{abs@var{m}2} instruction pattern
+@item @samp{abs@var{m}2}
+Store the absolute value of operand 1 into operand 0.
+
+@cindex @code{sqrt@var{m}2} instruction pattern
+@item @samp{sqrt@var{m}2}
+Store the square root of operand 1 into operand 0.
+
+The @code{sqrt} built-in function of C always uses the mode which
+corresponds to the C data type @code{double} and the @code{sqrtf}
+built-in function uses the mode which corresponds to the C data
+type @code{float}.
+
+@cindex @code{fmod@var{m}3} instruction pattern
+@item @samp{fmod@var{m}3}
+Store the remainder of dividing operand 1 by operand 2 into
+operand 0, rounded towards zero to an integer.
+
+The @code{fmod} built-in function of C always uses the mode which
+corresponds to the C data type @code{double} and the @code{fmodf}
+built-in function uses the mode which corresponds to the C data
+type @code{float}.
+
+@cindex @code{remainder@var{m}3} instruction pattern
+@item @samp{remainder@var{m}3}
+Store the remainder of dividing operand 1 by operand 2 into
+operand 0, rounded to the nearest integer.
+
+The @code{remainder} built-in function of C always uses the mode
+which corresponds to the C data type @code{double} and the
+@code{remainderf} built-in function uses the mode which corresponds
+to the C data type @code{float}.
+
+@cindex @code{cos@var{m}2} instruction pattern
+@item @samp{cos@var{m}2}
+Store the cosine of operand 1 into operand 0.
+
+The @code{cos} built-in function of C always uses the mode which
+corresponds to the C data type @code{double} and the @code{cosf}
+built-in function uses the mode which corresponds to the C data
+type @code{float}.
+
+@cindex @code{sin@var{m}2} instruction pattern
+@item @samp{sin@var{m}2}
+Store the sine of operand 1 into operand 0.
+
+The @code{sin} built-in function of C always uses the mode which
+corresponds to the C data type @code{double} and the @code{sinf}
+built-in function uses the mode which corresponds to the C data
+type @code{float}.
+
+@cindex @code{exp@var{m}2} instruction pattern
+@item @samp{exp@var{m}2}
+Store the exponential of operand 1 into operand 0.
+
+The @code{exp} built-in function of C always uses the mode which
+corresponds to the C data type @code{double} and the @code{expf}
+built-in function uses the mode which corresponds to the C data
+type @code{float}.
+
+@cindex @code{log@var{m}2} instruction pattern
+@item @samp{log@var{m}2}
+Store the natural logarithm of operand 1 into operand 0.
+
+The @code{log} built-in function of C always uses the mode which
+corresponds to the C data type @code{double} and the @code{logf}
+built-in function uses the mode which corresponds to the C data
+type @code{float}.
+
+@cindex @code{pow@var{m}3} instruction pattern
+@item @samp{pow@var{m}3}
+Store the value of operand 1 raised to the exponent operand 2
+into operand 0.
+
+The @code{pow} built-in function of C always uses the mode which
+corresponds to the C data type @code{double} and the @code{powf}
+built-in function uses the mode which corresponds to the C data
+type @code{float}.
+
+@cindex @code{atan2@var{m}3} instruction pattern
+@item @samp{atan2@var{m}3}
+Store the arc tangent (inverse tangent) of operand 1 divided by
+operand 2 into operand 0, using the signs of both arguments to
+determine the quadrant of the result.
+
+The @code{atan2} built-in function of C always uses the mode which
+corresponds to the C data type @code{double} and the @code{atan2f}
+built-in function uses the mode which corresponds to the C data
+type @code{float}.
+
+@cindex @code{floor@var{m}2} instruction pattern
+@item @samp{floor@var{m}2}
+Store the largest integral value not greater than argument.
+
+The @code{floor} built-in function of C always uses the mode which
+corresponds to the C data type @code{double} and the @code{floorf}
+built-in function uses the mode which corresponds to the C data
+type @code{float}.
+
+@cindex @code{btrunc@var{m}2} instruction pattern
+@item @samp{btrunc@var{m}2}
+Store the argument rounded to integer towards zero.
+
+The @code{trunc} built-in function of C always uses the mode which
+corresponds to the C data type @code{double} and the @code{truncf}
+built-in function uses the mode which corresponds to the C data
+type @code{float}.
+
+@cindex @code{round@var{m}2} instruction pattern
+@item @samp{round@var{m}2}
+Store the argument rounded to integer away from zero.
+
+The @code{round} built-in function of C always uses the mode which
+corresponds to the C data type @code{double} and the @code{roundf}
+built-in function uses the mode which corresponds to the C data
+type @code{float}.
+
+@cindex @code{ceil@var{m}2} instruction pattern
+@item @samp{ceil@var{m}2}
+Store the argument rounded to integer away from zero.
+
+The @code{ceil} built-in function of C always uses the mode which
+corresponds to the C data type @code{double} and the @code{ceilf}
+built-in function uses the mode which corresponds to the C data
+type @code{float}.
+
+@cindex @code{nearbyint@var{m}2} instruction pattern
+@item @samp{nearbyint@var{m}2}
+Store the argument rounded according to the default rounding mode
+
+The @code{nearbyint} built-in function of C always uses the mode which
+corresponds to the C data type @code{double} and the @code{nearbyintf}
+built-in function uses the mode which corresponds to the C data
+type @code{float}.
+
+@cindex @code{rint@var{m}2} instruction pattern
+@item @samp{rint@var{m}2}
+Store the argument rounded according to the default rounding mode and
+raise the inexact exception when the result differs in value from
+the argument
+
+The @code{rint} built-in function of C always uses the mode which
+corresponds to the C data type @code{double} and the @code{rintf}
+built-in function uses the mode which corresponds to the C data
+type @code{float}.
+
+@cindex @code{lrint@var{m}@var{n}2}
+@item @samp{lrint@var{m}@var{n}2}
+Convert operand 1 (valid for floating point mode @var{m}) to fixed
+point mode @var{n} as a signed number according to the current
+rounding mode and store in operand 0 (which has mode @var{n}).
+
+@cindex @code{lround@var{m}@var{n}2}
+@item @samp{lround@var{m}@var{n}2}
+Convert operand 1 (valid for floating point mode @var{m}) to fixed
+point mode @var{n} as a signed number rounding to nearest and away
+from zero and store in operand 0 (which has mode @var{n}).
+
+@cindex @code{lfloor@var{m}@var{n}2}
+@item @samp{lfloor@var{m}@var{n}2}
+Convert operand 1 (valid for floating point mode @var{m}) to fixed
+point mode @var{n} as a signed number rounding down and store in
+operand 0 (which has mode @var{n}).
+
+@cindex @code{lceil@var{m}@var{n}2}
+@item @samp{lceil@var{m}@var{n}2}
+Convert operand 1 (valid for floating point mode @var{m}) to fixed
+point mode @var{n} as a signed number rounding up and store in
+operand 0 (which has mode @var{n}).
+
+@cindex @code{copysign@var{m}3} instruction pattern
+@item @samp{copysign@var{m}3}
+Store a value with the magnitude of operand 1 and the sign of operand
+2 into operand 0.
+
+The @code{copysign} built-in function of C always uses the mode which
+corresponds to the C data type @code{double} and the @code{copysignf}
+built-in function uses the mode which corresponds to the C data
+type @code{float}.
+
+@cindex @code{ffs@var{m}2} instruction pattern
+@item @samp{ffs@var{m}2}
+Store into operand 0 one plus the index of the least significant 1-bit
+of operand 1.  If operand 1 is zero, store zero.  @var{m} is the mode
+of operand 0; operand 1's mode is specified by the instruction
+pattern, and the compiler will convert the operand to that mode before
+generating the instruction.
+
+The @code{ffs} built-in function of C always uses the mode which
+corresponds to the C data type @code{int}.
+
+@cindex @code{clz@var{m}2} instruction pattern
+@item @samp{clz@var{m}2}
+Store into operand 0 the number of leading 0-bits in @var{x}, starting
+at the most significant bit position.  If @var{x} is 0, the
+@code{CLZ_DEFINED_VALUE_AT_ZERO} (@pxref{Misc}) macro defines if
+the result is undefined or has a useful value.
+@var{m} is the mode of operand 0; operand 1's mode is
+specified by the instruction pattern, and the compiler will convert the
+operand to that mode before generating the instruction.
+
+@cindex @code{ctz@var{m}2} instruction pattern
+@item @samp{ctz@var{m}2}
+Store into operand 0 the number of trailing 0-bits in @var{x}, starting
+at the least significant bit position.  If @var{x} is 0, the
+@code{CTZ_DEFINED_VALUE_AT_ZERO} (@pxref{Misc}) macro defines if
+the result is undefined or has a useful value.
+@var{m} is the mode of operand 0; operand 1's mode is
+specified by the instruction pattern, and the compiler will convert the
+operand to that mode before generating the instruction.
+
+@cindex @code{popcount@var{m}2} instruction pattern
+@item @samp{popcount@var{m}2}
+Store into operand 0 the number of 1-bits in @var{x}.  @var{m} is the
+mode of operand 0; operand 1's mode is specified by the instruction
+pattern, and the compiler will convert the operand to that mode before
+generating the instruction.
+
+@cindex @code{parity@var{m}2} instruction pattern
+@item @samp{parity@var{m}2}
+Store into operand 0 the parity of @var{x}, i.e.@: the number of 1-bits
+in @var{x} modulo 2.  @var{m} is the mode of operand 0; operand 1's mode
+is specified by the instruction pattern, and the compiler will convert
+the operand to that mode before generating the instruction.
+
+@cindex @code{one_cmpl@var{m}2} instruction pattern
+@item @samp{one_cmpl@var{m}2}
+Store the bitwise-complement of operand 1 into operand 0.
+
+@cindex @code{movmem@var{m}} instruction pattern
+@item @samp{movmem@var{m}}
+Block move instruction.  The destination and source blocks of memory
+are the first two operands, and both are @code{mem:BLK}s with an
+address in mode @code{Pmode}.
+
+The number of bytes to move is the third operand, in mode @var{m}.
+Usually, you specify @code{word_mode} for @var{m}.  However, if you can
+generate better code knowing the range of valid lengths is smaller than
+those representable in a full word, you should provide a pattern with a
+mode corresponding to the range of values you can handle efficiently
+(e.g., @code{QImode} for values in the range 0--127; note we avoid numbers
+that appear negative) and also a pattern with @code{word_mode}.
+
+The fourth operand is the known shared alignment of the source and
+destination, in the form of a @code{const_int} rtx.  Thus, if the
+compiler knows that both source and destination are word-aligned,
+it may provide the value 4 for this operand.
+
+Optional operands 5 and 6 specify expected alignment and size of block
+respectively.  The expected alignment differs from alignment in operand 4
+in a way that the blocks are not required to be aligned according to it in
+all cases. This expected alignment is also in bytes, just like operand 4.
+Expected size, when unknown, is set to @code{(const_int -1)}.
+
+Descriptions of multiple @code{movmem@var{m}} patterns can only be
+beneficial if the patterns for smaller modes have fewer restrictions
+on their first, second and fourth operands.  Note that the mode @var{m}
+in @code{movmem@var{m}} does not impose any restriction on the mode of
+individually moved data units in the block.
+
+These patterns need not give special consideration to the possibility
+that the source and destination strings might overlap.
+
+@cindex @code{movstr} instruction pattern
+@item @samp{movstr}
+String copy instruction, with @code{stpcpy} semantics.  Operand 0 is
+an output operand in mode @code{Pmode}.  The addresses of the
+destination and source strings are operands 1 and 2, and both are
+@code{mem:BLK}s with addresses in mode @code{Pmode}.  The execution of
+the expansion of this pattern should store in operand 0 the address in
+which the @code{NUL} terminator was stored in the destination string.
+
+@cindex @code{setmem@var{m}} instruction pattern
+@item @samp{setmem@var{m}}
+Block set instruction.  The destination string is the first operand,
+given as a @code{mem:BLK} whose address is in mode @code{Pmode}.  The
+number of bytes to set is the second operand, in mode @var{m}.  The value to
+initialize the memory with is the third operand. Targets that only support the
+clearing of memory should reject any value that is not the constant 0.  See
+@samp{movmem@var{m}} for a discussion of the choice of mode.
+
+The fourth operand is the known alignment of the destination, in the form
+of a @code{const_int} rtx.  Thus, if the compiler knows that the
+destination is word-aligned, it may provide the value 4 for this
+operand.
+
+Optional operands 5 and 6 specify expected alignment and size of block
+respectively.  The expected alignment differs from alignment in operand 4
+in a way that the blocks are not required to be aligned according to it in
+all cases. This expected alignment is also in bytes, just like operand 4.
+Expected size, when unknown, is set to @code{(const_int -1)}.
+
+The use for multiple @code{setmem@var{m}} is as for @code{movmem@var{m}}.
+
+@cindex @code{cmpstrn@var{m}} instruction pattern
+@item @samp{cmpstrn@var{m}}
+String compare instruction, with five operands.  Operand 0 is the output;
+it has mode @var{m}.  The remaining four operands are like the operands
+of @samp{movmem@var{m}}.  The two memory blocks specified are compared
+byte by byte in lexicographic order starting at the beginning of each
+string.  The instruction is not allowed to prefetch more than one byte
+at a time since either string may end in the first byte and reading past
+that may access an invalid page or segment and cause a fault.  The
+comparison terminates early if the fetched bytes are different or if
+they are equal to zero.  The effect of the instruction is to store a
+value in operand 0 whose sign indicates the result of the comparison.
+
+@cindex @code{cmpstr@var{m}} instruction pattern
+@item @samp{cmpstr@var{m}}
+String compare instruction, without known maximum length.  Operand 0 is the
+output; it has mode @var{m}.  The second and third operand are the blocks of
+memory to be compared; both are @code{mem:BLK} with an address in mode
+@code{Pmode}.
+
+The fourth operand is the known shared alignment of the source and
+destination, in the form of a @code{const_int} rtx.  Thus, if the
+compiler knows that both source and destination are word-aligned,
+it may provide the value 4 for this operand.
+
+The two memory blocks specified are compared byte by byte in lexicographic
+order starting at the beginning of each string.  The instruction is not allowed
+to prefetch more than one byte at a time since either string may end in the
+first byte and reading past that may access an invalid page or segment and
+cause a fault.  The comparison will terminate when the fetched bytes
+are different or if they are equal to zero.  The effect of the
+instruction is to store a value in operand 0 whose sign indicates the
+result of the comparison.
+
+@cindex @code{cmpmem@var{m}} instruction pattern
+@item @samp{cmpmem@var{m}}
+Block compare instruction, with five operands like the operands
+of @samp{cmpstr@var{m}}.  The two memory blocks specified are compared
+byte by byte in lexicographic order starting at the beginning of each
+block.  Unlike @samp{cmpstr@var{m}} the instruction can prefetch
+any bytes in the two memory blocks.  Also unlike @samp{cmpstr@var{m}}
+the comparison will not stop if both bytes are zero.  The effect of
+the instruction is to store a value in operand 0 whose sign indicates
+the result of the comparison.
+
+@cindex @code{strlen@var{m}} instruction pattern
+@item @samp{strlen@var{m}}
+Compute the length of a string, with three operands.
+Operand 0 is the result (of mode @var{m}), operand 1 is
+a @code{mem} referring to the first character of the string,
+operand 2 is the character to search for (normally zero),
+and operand 3 is a constant describing the known alignment
+of the beginning of the string.
+
+@cindex @code{float@var{m}@var{n}2} instruction pattern
+@item @samp{float@var{m}@var{n}2}
+Convert signed integer operand 1 (valid for fixed point mode @var{m}) to
+floating point mode @var{n} and store in operand 0 (which has mode
+@var{n}).
+
+@cindex @code{floatuns@var{m}@var{n}2} instruction pattern
+@item @samp{floatuns@var{m}@var{n}2}
+Convert unsigned integer operand 1 (valid for fixed point mode @var{m})
+to floating point mode @var{n} and store in operand 0 (which has mode
+@var{n}).
+
+@cindex @code{fix@var{m}@var{n}2} instruction pattern
+@item @samp{fix@var{m}@var{n}2}
+Convert operand 1 (valid for floating point mode @var{m}) to fixed
+point mode @var{n} as a signed number and store in operand 0 (which
+has mode @var{n}).  This instruction's result is defined only when
+the value of operand 1 is an integer.
+
+If the machine description defines this pattern, it also needs to
+define the @code{ftrunc} pattern.
+
+@cindex @code{fixuns@var{m}@var{n}2} instruction pattern
+@item @samp{fixuns@var{m}@var{n}2}
+Convert operand 1 (valid for floating point mode @var{m}) to fixed
+point mode @var{n} as an unsigned number and store in operand 0 (which
+has mode @var{n}).  This instruction's result is defined only when the
+value of operand 1 is an integer.
+
+@cindex @code{ftrunc@var{m}2} instruction pattern
+@item @samp{ftrunc@var{m}2}
+Convert operand 1 (valid for floating point mode @var{m}) to an
+integer value, still represented in floating point mode @var{m}, and
+store it in operand 0 (valid for floating point mode @var{m}).
+
+@cindex @code{fix_trunc@var{m}@var{n}2} instruction pattern
+@item @samp{fix_trunc@var{m}@var{n}2}
+Like @samp{fix@var{m}@var{n}2} but works for any floating point value
+of mode @var{m} by converting the value to an integer.
+
+@cindex @code{fixuns_trunc@var{m}@var{n}2} instruction pattern
+@item @samp{fixuns_trunc@var{m}@var{n}2}
+Like @samp{fixuns@var{m}@var{n}2} but works for any floating point
+value of mode @var{m} by converting the value to an integer.
+
+@cindex @code{trunc@var{m}@var{n}2} instruction pattern
+@item @samp{trunc@var{m}@var{n}2}
+Truncate operand 1 (valid for mode @var{m}) to mode @var{n} and
+store in operand 0 (which has mode @var{n}).  Both modes must be fixed
+point or both floating point.
+
+@cindex @code{extend@var{m}@var{n}2} instruction pattern
+@item @samp{extend@var{m}@var{n}2}
+Sign-extend operand 1 (valid for mode @var{m}) to mode @var{n} and
+store in operand 0 (which has mode @var{n}).  Both modes must be fixed
+point or both floating point.
+
+@cindex @code{zero_extend@var{m}@var{n}2} instruction pattern
+@item @samp{zero_extend@var{m}@var{n}2}
+Zero-extend operand 1 (valid for mode @var{m}) to mode @var{n} and
+store in operand 0 (which has mode @var{n}).  Both modes must be fixed
+point.
+
+@cindex @code{fract@var{m}@var{n}2} instruction pattern
+@item @samp{fract@var{m}@var{n}2}
+Convert operand 1 of mode @var{m} to mode @var{n} and store in
+operand 0 (which has mode @var{n}).  Mode @var{m} and mode @var{n}
+could be fixed-point to fixed-point, signed integer to fixed-point,
+fixed-point to signed integer, floating-point to fixed-point,
+or fixed-point to floating-point.
+When overflows or underflows happen, the results are undefined.
+
+@cindex @code{satfract@var{m}@var{n}2} instruction pattern
+@item @samp{satfract@var{m}@var{n}2}
+Convert operand 1 of mode @var{m} to mode @var{n} and store in
+operand 0 (which has mode @var{n}).  Mode @var{m} and mode @var{n}
+could be fixed-point to fixed-point, signed integer to fixed-point,
+or floating-point to fixed-point.
+When overflows or underflows happen, the instruction saturates the
+results to the maximum or the minimum.
+
+@cindex @code{fractuns@var{m}@var{n}2} instruction pattern
+@item @samp{fractuns@var{m}@var{n}2}
+Convert operand 1 of mode @var{m} to mode @var{n} and store in
+operand 0 (which has mode @var{n}).  Mode @var{m} and mode @var{n}
+could be unsigned integer to fixed-point, or
+fixed-point to unsigned integer.
+When overflows or underflows happen, the results are undefined.
+
+@cindex @code{satfractuns@var{m}@var{n}2} instruction pattern
+@item @samp{satfractuns@var{m}@var{n}2}
+Convert unsigned integer operand 1 of mode @var{m} to fixed-point mode
+@var{n} and store in operand 0 (which has mode @var{n}).
+When overflows or underflows happen, the instruction saturates the
+results to the maximum or the minimum.
+
+@cindex @code{extv} instruction pattern
+@item @samp{extv}
+Extract a bit-field from operand 1 (a register or memory operand), where
+operand 2 specifies the width in bits and operand 3 the starting bit,
+and store it in operand 0.  Operand 0 must have mode @code{word_mode}.
+Operand 1 may have mode @code{byte_mode} or @code{word_mode}; often
+@code{word_mode} is allowed only for registers.  Operands 2 and 3 must
+be valid for @code{word_mode}.
+
+The RTL generation pass generates this instruction only with constants
+for operands 2 and 3 and the constant is never zero for operand 2.
+
+The bit-field value is sign-extended to a full word integer
+before it is stored in operand 0.
+
+@cindex @code{extzv} instruction pattern
+@item @samp{extzv}
+Like @samp{extv} except that the bit-field value is zero-extended.
+
+@cindex @code{insv} instruction pattern
+@item @samp{insv}
+Store operand 3 (which must be valid for @code{word_mode}) into a
+bit-field in operand 0, where operand 1 specifies the width in bits and
+operand 2 the starting bit.  Operand 0 may have mode @code{byte_mode} or
+@code{word_mode}; often @code{word_mode} is allowed only for registers.
+Operands 1 and 2 must be valid for @code{word_mode}.
+
+The RTL generation pass generates this instruction only with constants
+for operands 1 and 2 and the constant is never zero for operand 1.
+
+@cindex @code{mov@var{mode}cc} instruction pattern
+@item @samp{mov@var{mode}cc}
+Conditionally move operand 2 or operand 3 into operand 0 according to the
+comparison in operand 1.  If the comparison is true, operand 2 is moved
+into operand 0, otherwise operand 3 is moved.
+
+The mode of the operands being compared need not be the same as the operands
+being moved.  Some machines, sparc64 for example, have instructions that
+conditionally move an integer value based on the floating point condition
+codes and vice versa.
+
+If the machine does not have conditional move instructions, do not
+define these patterns.
+
+@cindex @code{add@var{mode}cc} instruction pattern
+@item @samp{add@var{mode}cc}
+Similar to @samp{mov@var{mode}cc} but for conditional addition.  Conditionally
+move operand 2 or (operands 2 + operand 3) into operand 0 according to the
+comparison in operand 1.  If the comparison is true, operand 2 is moved into
+operand 0, otherwise (operand 2 + operand 3) is moved.
+
+@cindex @code{cstore@var{mode}4} instruction pattern
+@item @samp{cstore@var{mode}4}
+Store zero or nonzero in operand 0 according to whether a comparison
+is true.  Operand 1 is a comparison operator.  Operand 2 and operand 3
+are the first and second operand of the comparison, respectively.
+You specify the mode that operand 0 must have when you write the
+@code{match_operand} expression.  The compiler automatically sees which
+mode you have used and supplies an operand of that mode.
+
+The value stored for a true condition must have 1 as its low bit, or
+else must be negative.  Otherwise the instruction is not suitable and
+you should omit it from the machine description.  You describe to the
+compiler exactly which value is stored by defining the macro
+@code{STORE_FLAG_VALUE} (@pxref{Misc}).  If a description cannot be
+found that can be used for all the possible comparison operators, you
+should pick one and use a @code{define_expand} to map all results
+onto the one you chose.
+
+These operations may @code{FAIL}, but should do so only in relatively
+uncommon cases; if they would @code{FAIL} for common cases involving
+integer comparisons, it is best to restrict the predicates to not
+allow these operands.  Likewise if a given comparison operator will
+always fail, independent of the operands (for floating-point modes, the
+@code{ordered_comparison_operator} predicate is often useful in this case).
+
+If this pattern is omitted, the compiler will generate a conditional
+branch---for example, it may copy a constant one to the target and branching
+around an assignment of zero to the target---or a libcall.  If the predicate
+for operand 1 only rejects some operators, it will also try reordering the
+operands and/or inverting the result value (e.g.@: by an exclusive OR).
+These possibilities could be cheaper or equivalent to the instructions
+used for the @samp{cstore@var{mode}4} pattern followed by those required
+to convert a positive result from @code{STORE_FLAG_VALUE} to 1; in this
+case, you can and should make operand 1's predicate reject some operators
+in the @samp{cstore@var{mode}4} pattern, or remove the pattern altogether
+from the machine description.
+
+@cindex @code{cbranch@var{mode}4} instruction pattern
+@item @samp{cbranch@var{mode}4}
+Conditional branch instruction combined with a compare instruction.
+Operand 0 is a comparison operator.  Operand 1 and operand 2 are the
+first and second operands of the comparison, respectively.  Operand 3
+is a @code{label_ref} that refers to the label to jump to.
+
+@cindex @code{jump} instruction pattern
+@item @samp{jump}
+A jump inside a function; an unconditional branch.  Operand 0 is the
+@code{label_ref} of the label to jump to.  This pattern name is mandatory
+on all machines.
+
+@cindex @code{call} instruction pattern
+@item @samp{call}
+Subroutine call instruction returning no value.  Operand 0 is the
+function to call; operand 1 is the number of bytes of arguments pushed
+as a @code{const_int}; operand 2 is the number of registers used as
+operands.
+
+On most machines, operand 2 is not actually stored into the RTL
+pattern.  It is supplied for the sake of some RISC machines which need
+to put this information into the assembler code; they can put it in
+the RTL instead of operand 1.
+
+Operand 0 should be a @code{mem} RTX whose address is the address of the
+function.  Note, however, that this address can be a @code{symbol_ref}
+expression even if it would not be a legitimate memory address on the
+target machine.  If it is also not a valid argument for a call
+instruction, the pattern for this operation should be a
+@code{define_expand} (@pxref{Expander Definitions}) that places the
+address into a register and uses that register in the call instruction.
+
+@cindex @code{call_value} instruction pattern
+@item @samp{call_value}
+Subroutine call instruction returning a value.  Operand 0 is the hard
+register in which the value is returned.  There are three more
+operands, the same as the three operands of the @samp{call}
+instruction (but with numbers increased by one).
+
+Subroutines that return @code{BLKmode} objects use the @samp{call}
+insn.
+
+@cindex @code{call_pop} instruction pattern
+@cindex @code{call_value_pop} instruction pattern
+@item @samp{call_pop}, @samp{call_value_pop}
+Similar to @samp{call} and @samp{call_value}, except used if defined and
+if @code{RETURN_POPS_ARGS} is nonzero.  They should emit a @code{parallel}
+that contains both the function call and a @code{set} to indicate the
+adjustment made to the frame pointer.
+
+For machines where @code{RETURN_POPS_ARGS} can be nonzero, the use of these
+patterns increases the number of functions for which the frame pointer
+can be eliminated, if desired.
+
+@cindex @code{untyped_call} instruction pattern
+@item @samp{untyped_call}
+Subroutine call instruction returning a value of any type.  Operand 0 is
+the function to call; operand 1 is a memory location where the result of
+calling the function is to be stored; operand 2 is a @code{parallel}
+expression where each element is a @code{set} expression that indicates
+the saving of a function return value into the result block.
+
+This instruction pattern should be defined to support
+@code{__builtin_apply} on machines where special instructions are needed
+to call a subroutine with arbitrary arguments or to save the value
+returned.  This instruction pattern is required on machines that have
+multiple registers that can hold a return value
+(i.e.@: @code{FUNCTION_VALUE_REGNO_P} is true for more than one register).
+
+@cindex @code{return} instruction pattern
+@item @samp{return}
+Subroutine return instruction.  This instruction pattern name should be
+defined only if a single instruction can do all the work of returning
+from a function.
+
+Like the @samp{mov@var{m}} patterns, this pattern is also used after the
+RTL generation phase.  In this case it is to support machines where
+multiple instructions are usually needed to return from a function, but
+some class of functions only requires one instruction to implement a
+return.  Normally, the applicable functions are those which do not need
+to save any registers or allocate stack space.
+
+@findex reload_completed
+@findex leaf_function_p
+For such machines, the condition specified in this pattern should only
+be true when @code{reload_completed} is nonzero and the function's
+epilogue would only be a single instruction.  For machines with register
+windows, the routine @code{leaf_function_p} may be used to determine if
+a register window push is required.
+
+Machines that have conditional return instructions should define patterns
+such as
+
+@smallexample
+(define_insn ""
+  [(set (pc)
+        (if_then_else (match_operator
+                         0 "comparison_operator"
+                         [(cc0) (const_int 0)])
+                      (return)
+                      (pc)))]
+  "@var{condition}"
+  "@dots{}")
+@end smallexample
+
+where @var{condition} would normally be the same condition specified on the
+named @samp{return} pattern.
+
+@cindex @code{untyped_return} instruction pattern
+@item @samp{untyped_return}
+Untyped subroutine return instruction.  This instruction pattern should
+be defined to support @code{__builtin_return} on machines where special
+instructions are needed to return a value of any type.
+
+Operand 0 is a memory location where the result of calling a function
+with @code{__builtin_apply} is stored; operand 1 is a @code{parallel}
+expression where each element is a @code{set} expression that indicates
+the restoring of a function return value from the result block.
+
+@cindex @code{nop} instruction pattern
+@item @samp{nop}
+No-op instruction.  This instruction pattern name should always be defined
+to output a no-op in assembler code.  @code{(const_int 0)} will do as an
+RTL pattern.
+
+@cindex @code{indirect_jump} instruction pattern
+@item @samp{indirect_jump}
+An instruction to jump to an address which is operand zero.
+This pattern name is mandatory on all machines.
+
+@cindex @code{casesi} instruction pattern
+@item @samp{casesi}
+Instruction to jump through a dispatch table, including bounds checking.
+This instruction takes five operands:
+
+@enumerate
+@item
+The index to dispatch on, which has mode @code{SImode}.
+
+@item
+The lower bound for indices in the table, an integer constant.
+
+@item
+The total range of indices in the table---the largest index
+minus the smallest one (both inclusive).
+
+@item
+A label that precedes the table itself.
+
+@item
+A label to jump to if the index has a value outside the bounds.
+@end enumerate
+
+The table is an @code{addr_vec} or @code{addr_diff_vec} inside of a
+@code{jump_insn}.  The number of elements in the table is one plus the
+difference between the upper bound and the lower bound.
+
+@cindex @code{tablejump} instruction pattern
+@item @samp{tablejump}
+Instruction to jump to a variable address.  This is a low-level
+capability which can be used to implement a dispatch table when there
+is no @samp{casesi} pattern.
+
+This pattern requires two operands: the address or offset, and a label
+which should immediately precede the jump table.  If the macro
+@code{CASE_VECTOR_PC_RELATIVE} evaluates to a nonzero value then the first
+operand is an offset which counts from the address of the table; otherwise,
+it is an absolute address to jump to.  In either case, the first operand has
+mode @code{Pmode}.
+
+The @samp{tablejump} insn is always the last insn before the jump
+table it uses.  Its assembler code normally has no need to use the
+second operand, but you should incorporate it in the RTL pattern so
+that the jump optimizer will not delete the table as unreachable code.
+
+
+@cindex @code{decrement_and_branch_until_zero} instruction pattern
+@item @samp{decrement_and_branch_until_zero}
+Conditional branch instruction that decrements a register and
+jumps if the register is nonzero.  Operand 0 is the register to
+decrement and test; operand 1 is the label to jump to if the
+register is nonzero.  @xref{Looping Patterns}.
+
+This optional instruction pattern is only used by the combiner,
+typically for loops reversed by the loop optimizer when strength
+reduction is enabled.
+
+@cindex @code{doloop_end} instruction pattern
+@item @samp{doloop_end}
+Conditional branch instruction that decrements a register and jumps if
+the register is nonzero.  This instruction takes five operands: Operand
+0 is the register to decrement and test; operand 1 is the number of loop
+iterations as a @code{const_int} or @code{const0_rtx} if this cannot be
+determined until run-time; operand 2 is the actual or estimated maximum
+number of iterations as a @code{const_int}; operand 3 is the number of
+enclosed loops as a @code{const_int} (an innermost loop has a value of
+1); operand 4 is the label to jump to if the register is nonzero.
+@xref{Looping Patterns}.
+
+This optional instruction pattern should be defined for machines with
+low-overhead looping instructions as the loop optimizer will try to
+modify suitable loops to utilize it.  If nested low-overhead looping is
+not supported, use a @code{define_expand} (@pxref{Expander Definitions})
+and make the pattern fail if operand 3 is not @code{const1_rtx}.
+Similarly, if the actual or estimated maximum number of iterations is
+too large for this instruction, make it fail.
+
+@cindex @code{doloop_begin} instruction pattern
+@item @samp{doloop_begin}
+Companion instruction to @code{doloop_end} required for machines that
+need to perform some initialization, such as loading special registers
+used by a low-overhead looping instruction.  If initialization insns do
+not always need to be emitted, use a @code{define_expand}
+(@pxref{Expander Definitions}) and make it fail.
+
+
+@cindex @code{canonicalize_funcptr_for_compare} instruction pattern
+@item @samp{canonicalize_funcptr_for_compare}
+Canonicalize the function pointer in operand 1 and store the result
+into operand 0.
+
+Operand 0 is always a @code{reg} and has mode @code{Pmode}; operand 1
+may be a @code{reg}, @code{mem}, @code{symbol_ref}, @code{const_int}, etc
+and also has mode @code{Pmode}.
+
+Canonicalization of a function pointer usually involves computing
+the address of the function which would be called if the function
+pointer were used in an indirect call.
+
+Only define this pattern if function pointers on the target machine
+can have different values but still call the same function when
+used in an indirect call.
+
+@cindex @code{save_stack_block} instruction pattern
+@cindex @code{save_stack_function} instruction pattern
+@cindex @code{save_stack_nonlocal} instruction pattern
+@cindex @code{restore_stack_block} instruction pattern
+@cindex @code{restore_stack_function} instruction pattern
+@cindex @code{restore_stack_nonlocal} instruction pattern
+@item @samp{save_stack_block}
+@itemx @samp{save_stack_function}
+@itemx @samp{save_stack_nonlocal}
+@itemx @samp{restore_stack_block}
+@itemx @samp{restore_stack_function}
+@itemx @samp{restore_stack_nonlocal}
+Most machines save and restore the stack pointer by copying it to or
+from an object of mode @code{Pmode}.  Do not define these patterns on
+such machines.
+
+Some machines require special handling for stack pointer saves and
+restores.  On those machines, define the patterns corresponding to the
+non-standard cases by using a @code{define_expand} (@pxref{Expander
+Definitions}) that produces the required insns.  The three types of
+saves and restores are:
+
+@enumerate
+@item
+@samp{save_stack_block} saves the stack pointer at the start of a block
+that allocates a variable-sized object, and @samp{restore_stack_block}
+restores the stack pointer when the block is exited.
+
+@item
+@samp{save_stack_function} and @samp{restore_stack_function} do a
+similar job for the outermost block of a function and are used when the
+function allocates variable-sized objects or calls @code{alloca}.  Only
+the epilogue uses the restored stack pointer, allowing a simpler save or
+restore sequence on some machines.
+
+@item
+@samp{save_stack_nonlocal} is used in functions that contain labels
+branched to by nested functions.  It saves the stack pointer in such a
+way that the inner function can use @samp{restore_stack_nonlocal} to
+restore the stack pointer.  The compiler generates code to restore the
+frame and argument pointer registers, but some machines require saving
+and restoring additional data such as register window information or
+stack backchains.  Place insns in these patterns to save and restore any
+such required data.
+@end enumerate
+
+When saving the stack pointer, operand 0 is the save area and operand 1
+is the stack pointer.  The mode used to allocate the save area defaults
+to @code{Pmode} but you can override that choice by defining the
+@code{STACK_SAVEAREA_MODE} macro (@pxref{Storage Layout}).  You must
+specify an integral mode, or @code{VOIDmode} if no save area is needed
+for a particular type of save (either because no save is needed or
+because a machine-specific save area can be used).  Operand 0 is the
+stack pointer and operand 1 is the save area for restore operations.  If
+@samp{save_stack_block} is defined, operand 0 must not be
+@code{VOIDmode} since these saves can be arbitrarily nested.
+
+A save area is a @code{mem} that is at a constant offset from
+@code{virtual_stack_vars_rtx} when the stack pointer is saved for use by
+nonlocal gotos and a @code{reg} in the other two cases.
+
+@cindex @code{allocate_stack} instruction pattern
+@item @samp{allocate_stack}
+Subtract (or add if @code{STACK_GROWS_DOWNWARD} is undefined) operand 1 from
+the stack pointer to create space for dynamically allocated data.
+
+Store the resultant pointer to this space into operand 0.  If you
+are allocating space from the main stack, do this by emitting a
+move insn to copy @code{virtual_stack_dynamic_rtx} to operand 0.
+If you are allocating the space elsewhere, generate code to copy the
+location of the space to operand 0.  In the latter case, you must
+ensure this space gets freed when the corresponding space on the main
+stack is free.
+
+Do not define this pattern if all that must be done is the subtraction.
+Some machines require other operations such as stack probes or
+maintaining the back chain.  Define this pattern to emit those
+operations in addition to updating the stack pointer.
+
+@cindex @code{check_stack} instruction pattern
+@item @samp{check_stack}
+If stack checking (@pxref{Stack Checking}) cannot be done on your system by
+probing the stack, define this pattern to perform the needed check and signal
+an error if the stack has overflowed.  The single operand is the address in
+the stack farthest from the current stack pointer that you need to validate.
+Normally, on platforms where this pattern is needed, you would obtain the
+stack limit from a global or thread-specific variable or register.
+
+@cindex @code{probe_stack} instruction pattern
+@item @samp{probe_stack}
+If stack checking (@pxref{Stack Checking}) can be done on your system by
+probing the stack but doing it with a ``store zero'' instruction is not valid
+or optimal, define this pattern to do the probing differently and signal an
+error if the stack has overflowed.  The single operand is the memory reference
+in the stack that needs to be probed.
+
+@cindex @code{nonlocal_goto} instruction pattern
+@item @samp{nonlocal_goto}
+Emit code to generate a non-local goto, e.g., a jump from one function
+to a label in an outer function.  This pattern has four arguments,
+each representing a value to be used in the jump.  The first
+argument is to be loaded into the frame pointer, the second is
+the address to branch to (code to dispatch to the actual label),
+the third is the address of a location where the stack is saved,
+and the last is the address of the label, to be placed in the
+location for the incoming static chain.
+
+On most machines you need not define this pattern, since GCC will
+already generate the correct code, which is to load the frame pointer
+and static chain, restore the stack (using the
+@samp{restore_stack_nonlocal} pattern, if defined), and jump indirectly
+to the dispatcher.  You need only define this pattern if this code will
+not work on your machine.
+
+@cindex @code{nonlocal_goto_receiver} instruction pattern
+@item @samp{nonlocal_goto_receiver}
+This pattern, if defined, contains code needed at the target of a
+nonlocal goto after the code already generated by GCC@.  You will not
+normally need to define this pattern.  A typical reason why you might
+need this pattern is if some value, such as a pointer to a global table,
+must be restored when the frame pointer is restored.  Note that a nonlocal
+goto only occurs within a unit-of-translation, so a global table pointer
+that is shared by all functions of a given module need not be restored.
+There are no arguments.
+
+@cindex @code{exception_receiver} instruction pattern
+@item @samp{exception_receiver}
+This pattern, if defined, contains code needed at the site of an
+exception handler that isn't needed at the site of a nonlocal goto.  You
+will not normally need to define this pattern.  A typical reason why you
+might need this pattern is if some value, such as a pointer to a global
+table, must be restored after control flow is branched to the handler of
+an exception.  There are no arguments.
+
+@cindex @code{builtin_setjmp_setup} instruction pattern
+@item @samp{builtin_setjmp_setup}
+This pattern, if defined, contains additional code needed to initialize
+the @code{jmp_buf}.  You will not normally need to define this pattern.
+A typical reason why you might need this pattern is if some value, such
+as a pointer to a global table, must be restored.  Though it is
+preferred that the pointer value be recalculated if possible (given the
+address of a label for instance).  The single argument is a pointer to
+the @code{jmp_buf}.  Note that the buffer is five words long and that
+the first three are normally used by the generic mechanism.
+
+@cindex @code{builtin_setjmp_receiver} instruction pattern
+@item @samp{builtin_setjmp_receiver}
+This pattern, if defined, contains code needed at the site of a
+built-in setjmp that isn't needed at the site of a nonlocal goto.  You
+will not normally need to define this pattern.  A typical reason why you
+might need this pattern is if some value, such as a pointer to a global
+table, must be restored.  It takes one argument, which is the label
+to which builtin_longjmp transfered control; this pattern may be emitted
+at a small offset from that label.
+
+@cindex @code{builtin_longjmp} instruction pattern
+@item @samp{builtin_longjmp}
+This pattern, if defined, performs the entire action of the longjmp.
+You will not normally need to define this pattern unless you also define
+@code{builtin_setjmp_setup}.  The single argument is a pointer to the
+@code{jmp_buf}.
+
+@cindex @code{eh_return} instruction pattern
+@item @samp{eh_return}
+This pattern, if defined, affects the way @code{__builtin_eh_return},
+and thence the call frame exception handling library routines, are
+built.  It is intended to handle non-trivial actions needed along
+the abnormal return path.
+
+The address of the exception handler to which the function should return
+is passed as operand to this pattern.  It will normally need to copied by
+the pattern to some special register or memory location.
+If the pattern needs to determine the location of the target call
+frame in order to do so, it may use @code{EH_RETURN_STACKADJ_RTX},
+if defined; it will have already been assigned.
+
+If this pattern is not defined, the default action will be to simply
+copy the return address to @code{EH_RETURN_HANDLER_RTX}.  Either
+that macro or this pattern needs to be defined if call frame exception
+handling is to be used.
+
+@cindex @code{prologue} instruction pattern
+@anchor{prologue instruction pattern}
+@item @samp{prologue}
+This pattern, if defined, emits RTL for entry to a function.  The function
+entry is responsible for setting up the stack frame, initializing the frame
+pointer register, saving callee saved registers, etc.
+
+Using a prologue pattern is generally preferred over defining
+@code{TARGET_ASM_FUNCTION_PROLOGUE} to emit assembly code for the prologue.
+
+The @code{prologue} pattern is particularly useful for targets which perform
+instruction scheduling.
+
+@cindex @code{epilogue} instruction pattern
+@anchor{epilogue instruction pattern}
+@item @samp{epilogue}
+This pattern emits RTL for exit from a function.  The function
+exit is responsible for deallocating the stack frame, restoring callee saved
+registers and emitting the return instruction.
+
+Using an epilogue pattern is generally preferred over defining
+@code{TARGET_ASM_FUNCTION_EPILOGUE} to emit assembly code for the epilogue.
+
+The @code{epilogue} pattern is particularly useful for targets which perform
+instruction scheduling or which have delay slots for their return instruction.
+
+@cindex @code{sibcall_epilogue} instruction pattern
+@item @samp{sibcall_epilogue}
+This pattern, if defined, emits RTL for exit from a function without the final
+branch back to the calling function.  This pattern will be emitted before any
+sibling call (aka tail call) sites.
+
+The @code{sibcall_epilogue} pattern must not clobber any arguments used for
+parameter passing or any stack slots for arguments passed to the current
+function.
+
+@cindex @code{trap} instruction pattern
+@item @samp{trap}
+This pattern, if defined, signals an error, typically by causing some
+kind of signal to be raised.  Among other places, it is used by the Java
+front end to signal `invalid array index' exceptions.
+
+@cindex @code{ctrap@var{MM}4} instruction pattern
+@item @samp{ctrap@var{MM}4}
+Conditional trap instruction.  Operand 0 is a piece of RTL which
+performs a comparison, and operands 1 and 2 are the arms of the
+comparison.  Operand 3 is the trap code, an integer.
+
+A typical @code{ctrap} pattern looks like
+
+@smallexample
+(define_insn "ctrapsi4"
+  [(trap_if (match_operator 0 "trap_operator"
+             [(match_operand 1 "register_operand")
+              (match_operand 2 "immediate_operand")])
+            (match_operand 3 "const_int_operand" "i"))]
+  ""
+  "@dots{}")
+@end smallexample
+
+@cindex @code{prefetch} instruction pattern
+@item @samp{prefetch}
+
+This pattern, if defined, emits code for a non-faulting data prefetch
+instruction.  Operand 0 is the address of the memory to prefetch.  Operand 1
+is a constant 1 if the prefetch is preparing for a write to the memory
+address, or a constant 0 otherwise.  Operand 2 is the expected degree of
+temporal locality of the data and is a value between 0 and 3, inclusive; 0
+means that the data has no temporal locality, so it need not be left in the
+cache after the access; 3 means that the data has a high degree of temporal
+locality and should be left in all levels of cache possible;  1 and 2 mean,
+respectively, a low or moderate degree of temporal locality.
+
+Targets that do not support write prefetches or locality hints can ignore
+the values of operands 1 and 2.
+
+@cindex @code{blockage} instruction pattern
+@item @samp{blockage}
+
+This pattern defines a pseudo insn that prevents the instruction
+scheduler from moving instructions across the boundary defined by the
+blockage insn.  Normally an UNSPEC_VOLATILE pattern.
+
+@cindex @code{memory_barrier} instruction pattern
+@item @samp{memory_barrier}
+
+If the target memory model is not fully synchronous, then this pattern
+should be defined to an instruction that orders both loads and stores
+before the instruction with respect to loads and stores after the instruction.
+This pattern has no operands.
+
+@cindex @code{sync_compare_and_swap@var{mode}} instruction pattern
+@item @samp{sync_compare_and_swap@var{mode}}
+
+This pattern, if defined, emits code for an atomic compare-and-swap
+operation.  Operand 1 is the memory on which the atomic operation is
+performed.  Operand 2 is the ``old'' value to be compared against the
+current contents of the memory location.  Operand 3 is the ``new'' value
+to store in the memory if the compare succeeds.  Operand 0 is the result
+of the operation; it should contain the contents of the memory
+before the operation.  If the compare succeeds, this should obviously be
+a copy of operand 2.
+
+This pattern must show that both operand 0 and operand 1 are modified.
+
+This pattern must issue any memory barrier instructions such that all
+memory operations before the atomic operation occur before the atomic
+operation and all memory operations after the atomic operation occur
+after the atomic operation.
+
+For targets where the success or failure of the compare-and-swap
+operation is available via the status flags, it is possible to
+avoid a separate compare operation and issue the subsequent
+branch or store-flag operation immediately after the compare-and-swap.
+To this end, GCC will look for a @code{MODE_CC} set in the
+output of @code{sync_compare_and_swap@var{mode}}; if the machine
+description includes such a set, the target should also define special
+@code{cbranchcc4} and/or @code{cstorecc4} instructions.  GCC will then
+be able to take the destination of the @code{MODE_CC} set and pass it
+to the @code{cbranchcc4} or @code{cstorecc4} pattern as the first
+operand of the comparison (the second will be @code{(const_int 0)}).
+
+@cindex @code{sync_add@var{mode}} instruction pattern
+@cindex @code{sync_sub@var{mode}} instruction pattern
+@cindex @code{sync_ior@var{mode}} instruction pattern
+@cindex @code{sync_and@var{mode}} instruction pattern
+@cindex @code{sync_xor@var{mode}} instruction pattern
+@cindex @code{sync_nand@var{mode}} instruction pattern
+@item @samp{sync_add@var{mode}}, @samp{sync_sub@var{mode}}
+@itemx @samp{sync_ior@var{mode}}, @samp{sync_and@var{mode}}
+@itemx @samp{sync_xor@var{mode}}, @samp{sync_nand@var{mode}}
+
+These patterns emit code for an atomic operation on memory.
+Operand 0 is the memory on which the atomic operation is performed.
+Operand 1 is the second operand to the binary operator.
+
+This pattern must issue any memory barrier instructions such that all
+memory operations before the atomic operation occur before the atomic
+operation and all memory operations after the atomic operation occur
+after the atomic operation.
+
+If these patterns are not defined, the operation will be constructed
+from a compare-and-swap operation, if defined.
+
+@cindex @code{sync_old_add@var{mode}} instruction pattern
+@cindex @code{sync_old_sub@var{mode}} instruction pattern
+@cindex @code{sync_old_ior@var{mode}} instruction pattern
+@cindex @code{sync_old_and@var{mode}} instruction pattern
+@cindex @code{sync_old_xor@var{mode}} instruction pattern
+@cindex @code{sync_old_nand@var{mode}} instruction pattern
+@item @samp{sync_old_add@var{mode}}, @samp{sync_old_sub@var{mode}}
+@itemx @samp{sync_old_ior@var{mode}}, @samp{sync_old_and@var{mode}}
+@itemx @samp{sync_old_xor@var{mode}}, @samp{sync_old_nand@var{mode}}
+
+These patterns are emit code for an atomic operation on memory,
+and return the value that the memory contained before the operation.
+Operand 0 is the result value, operand 1 is the memory on which the
+atomic operation is performed, and operand 2 is the second operand
+to the binary operator.
+
+This pattern must issue any memory barrier instructions such that all
+memory operations before the atomic operation occur before the atomic
+operation and all memory operations after the atomic operation occur
+after the atomic operation.
+
+If these patterns are not defined, the operation will be constructed
+from a compare-and-swap operation, if defined.
+
+@cindex @code{sync_new_add@var{mode}} instruction pattern
+@cindex @code{sync_new_sub@var{mode}} instruction pattern
+@cindex @code{sync_new_ior@var{mode}} instruction pattern
+@cindex @code{sync_new_and@var{mode}} instruction pattern
+@cindex @code{sync_new_xor@var{mode}} instruction pattern
+@cindex @code{sync_new_nand@var{mode}} instruction pattern
+@item @samp{sync_new_add@var{mode}}, @samp{sync_new_sub@var{mode}}
+@itemx @samp{sync_new_ior@var{mode}}, @samp{sync_new_and@var{mode}}
+@itemx @samp{sync_new_xor@var{mode}}, @samp{sync_new_nand@var{mode}}
+
+These patterns are like their @code{sync_old_@var{op}} counterparts,
+except that they return the value that exists in the memory location
+after the operation, rather than before the operation.
+
+@cindex @code{sync_lock_test_and_set@var{mode}} instruction pattern
+@item @samp{sync_lock_test_and_set@var{mode}}
+
+This pattern takes two forms, based on the capabilities of the target.
+In either case, operand 0 is the result of the operand, operand 1 is
+the memory on which the atomic operation is performed, and operand 2
+is the value to set in the lock.
+
+In the ideal case, this operation is an atomic exchange operation, in
+which the previous value in memory operand is copied into the result
+operand, and the value operand is stored in the memory operand.
+
+For less capable targets, any value operand that is not the constant 1
+should be rejected with @code{FAIL}.  In this case the target may use
+an atomic test-and-set bit operation.  The result operand should contain
+1 if the bit was previously set and 0 if the bit was previously clear.
+The true contents of the memory operand are implementation defined.
+
+This pattern must issue any memory barrier instructions such that the
+pattern as a whole acts as an acquire barrier, that is all memory
+operations after the pattern do not occur until the lock is acquired.
+
+If this pattern is not defined, the operation will be constructed from
+a compare-and-swap operation, if defined.
+
+@cindex @code{sync_lock_release@var{mode}} instruction pattern
+@item @samp{sync_lock_release@var{mode}}
+
+This pattern, if defined, releases a lock set by
+@code{sync_lock_test_and_set@var{mode}}.  Operand 0 is the memory
+that contains the lock; operand 1 is the value to store in the lock.
+
+If the target doesn't implement full semantics for
+@code{sync_lock_test_and_set@var{mode}}, any value operand which is not
+the constant 0 should be rejected with @code{FAIL}, and the true contents
+of the memory operand are implementation defined.
+
+This pattern must issue any memory barrier instructions such that the
+pattern as a whole acts as a release barrier, that is the lock is
+released only after all previous memory operations have completed.
+
+If this pattern is not defined, then a @code{memory_barrier} pattern
+will be emitted, followed by a store of the value to the memory operand.
+
+@cindex @code{stack_protect_set} instruction pattern
+@item @samp{stack_protect_set}
+
+This pattern, if defined, moves a @code{ptr_mode} value from the memory
+in operand 1 to the memory in operand 0 without leaving the value in
+a register afterward.  This is to avoid leaking the value some place
+that an attacker might use to rewrite the stack guard slot after
+having clobbered it.
+
+If this pattern is not defined, then a plain move pattern is generated.
+
+@cindex @code{stack_protect_test} instruction pattern
+@item @samp{stack_protect_test}
+
+This pattern, if defined, compares a @code{ptr_mode} value from the
+memory in operand 1 with the memory in operand 0 without leaving the
+value in a register afterward and branches to operand 2 if the values
+weren't equal.
+
+If this pattern is not defined, then a plain compare pattern and
+conditional branch pattern is used.
+
+@cindex @code{clear_cache} instruction pattern
+@item @samp{clear_cache}
+
+This pattern, if defined, flushes the instruction cache for a region of
+memory.  The region is bounded to by the Pmode pointers in operand 0
+inclusive and operand 1 exclusive.
+
+If this pattern is not defined, a call to the library function
+@code{__clear_cache} is used.
+
+@end table
+
+@end ifset
+@c Each of the following nodes are wrapped in separate
+@c "@ifset INTERNALS" to work around memory limits for the default
+@c configuration in older tetex distributions.  Known to not work:
+@c tetex-1.0.7, known to work: tetex-2.0.2.
+@ifset INTERNALS
+@node Pattern Ordering
+@section When the Order of Patterns Matters
+@cindex Pattern Ordering
+@cindex Ordering of Patterns
+
+Sometimes an insn can match more than one instruction pattern.  Then the
+pattern that appears first in the machine description is the one used.
+Therefore, more specific patterns (patterns that will match fewer things)
+and faster instructions (those that will produce better code when they
+do match) should usually go first in the description.
+
+In some cases the effect of ordering the patterns can be used to hide
+a pattern when it is not valid.  For example, the 68000 has an
+instruction for converting a fullword to floating point and another
+for converting a byte to floating point.  An instruction converting
+an integer to floating point could match either one.  We put the
+pattern to convert the fullword first to make sure that one will
+be used rather than the other.  (Otherwise a large integer might
+be generated as a single-byte immediate quantity, which would not work.)
+Instead of using this pattern ordering it would be possible to make the
+pattern for convert-a-byte smart enough to deal properly with any
+constant value.
+
+@end ifset
+@ifset INTERNALS
+@node Dependent Patterns
+@section Interdependence of Patterns
+@cindex Dependent Patterns
+@cindex Interdependence of Patterns
+
+In some cases machines support instructions identical except for the
+machine mode of one or more operands.  For example, there may be
+``sign-extend halfword'' and ``sign-extend byte'' instructions whose
+patterns are
+
+@smallexample
+(set (match_operand:SI 0 @dots{})
+     (extend:SI (match_operand:HI 1 @dots{})))
+
+(set (match_operand:SI 0 @dots{})
+     (extend:SI (match_operand:QI 1 @dots{})))
+@end smallexample
+
+@noindent
+Constant integers do not specify a machine mode, so an instruction to
+extend a constant value could match either pattern.  The pattern it
+actually will match is the one that appears first in the file.  For correct
+results, this must be the one for the widest possible mode (@code{HImode},
+here).  If the pattern matches the @code{QImode} instruction, the results
+will be incorrect if the constant value does not actually fit that mode.
+
+Such instructions to extend constants are rarely generated because they are
+optimized away, but they do occasionally happen in nonoptimized
+compilations.
+
+If a constraint in a pattern allows a constant, the reload pass may
+replace a register with a constant permitted by the constraint in some
+cases.  Similarly for memory references.  Because of this substitution,
+you should not provide separate patterns for increment and decrement
+instructions.  Instead, they should be generated from the same pattern
+that supports register-register add insns by examining the operands and
+generating the appropriate machine instruction.
+
+@end ifset
+@ifset INTERNALS
+@node Jump Patterns
+@section Defining Jump Instruction Patterns
+@cindex jump instruction patterns
+@cindex defining jump instruction patterns
+
+GCC does not assume anything about how the machine realizes jumps.
+The machine description should define a single pattern, usually
+a @code{define_expand}, which expands to all the required insns.
+
+Usually, this would be a comparison insn to set the condition code
+and a separate branch insn testing the condition code and branching
+or not according to its value.  For many machines, however,
+separating compares and branches is limiting, which is why the
+more flexible approach with one @code{define_expand} is used in GCC.
+The machine description becomes clearer for architectures that
+have compare-and-branch instructions but no condition code.  It also
+works better when different sets of comparison operators are supported
+by different kinds of conditional branches (e.g. integer vs. floating-point),
+or by conditional branches with respect to conditional stores.
+
+Two separate insns are always used if the machine description represents
+a condition code register using the legacy RTL expression @code{(cc0)},
+and on most machines that use a separate condition code register
+(@pxref{Condition Code}).  For machines that use @code{(cc0)}, in
+fact, the set and use of the condition code must be separate and
+adjacent@footnote{@code{note} insns can separate them, though.}, thus
+allowing flags in @code{cc_status} to be used (@pxref{Condition Code}) and
+so that the comparison and branch insns could be located from each other
+by using the functions @code{prev_cc0_setter} and @code{next_cc0_user}.
+
+Even in this case having a single entry point for conditional branches
+is advantageous, because it handles equally well the case where a single
+comparison instruction records the results of both signed and unsigned
+comparison of the given operands (with the branch insns coming in distinct
+signed and unsigned flavors) as in the x86 or SPARC, and the case where
+there are distinct signed and unsigned compare instructions and only
+one set of conditional branch instructions as in the PowerPC.
+
+@end ifset
+@ifset INTERNALS
+@node Looping Patterns
+@section Defining Looping Instruction Patterns
+@cindex looping instruction patterns
+@cindex defining looping instruction patterns
+
+Some machines have special jump instructions that can be utilized to
+make loops more efficient.  A common example is the 68000 @samp{dbra}
+instruction which performs a decrement of a register and a branch if the
+result was greater than zero.  Other machines, in particular digital
+signal processors (DSPs), have special block repeat instructions to
+provide low-overhead loop support.  For example, the TI TMS320C3x/C4x
+DSPs have a block repeat instruction that loads special registers to
+mark the top and end of a loop and to count the number of loop
+iterations.  This avoids the need for fetching and executing a
+@samp{dbra}-like instruction and avoids pipeline stalls associated with
+the jump.
+
+GCC has three special named patterns to support low overhead looping.
+They are @samp{decrement_and_branch_until_zero}, @samp{doloop_begin},
+and @samp{doloop_end}.  The first pattern,
+@samp{decrement_and_branch_until_zero}, is not emitted during RTL
+generation but may be emitted during the instruction combination phase.
+This requires the assistance of the loop optimizer, using information
+collected during strength reduction, to reverse a loop to count down to
+zero.  Some targets also require the loop optimizer to add a
+@code{REG_NONNEG} note to indicate that the iteration count is always
+positive.  This is needed if the target performs a signed loop
+termination test.  For example, the 68000 uses a pattern similar to the
+following for its @code{dbra} instruction:
+
+@smallexample
+@group
+(define_insn "decrement_and_branch_until_zero"
+  [(set (pc)
+        (if_then_else
+          (ge (plus:SI (match_operand:SI 0 "general_operand" "+d*am")
+                       (const_int -1))
+              (const_int 0))
+          (label_ref (match_operand 1 "" ""))
+          (pc)))
+   (set (match_dup 0)
+        (plus:SI (match_dup 0)
+                 (const_int -1)))]
+  "find_reg_note (insn, REG_NONNEG, 0)"
+  "@dots{}")
+@end group
+@end smallexample
+
+Note that since the insn is both a jump insn and has an output, it must
+deal with its own reloads, hence the `m' constraints.  Also note that
+since this insn is generated by the instruction combination phase
+combining two sequential insns together into an implicit parallel insn,
+the iteration counter needs to be biased by the same amount as the
+decrement operation, in this case @minus{}1.  Note that the following similar
+pattern will not be matched by the combiner.
+
+@smallexample
+@group
+(define_insn "decrement_and_branch_until_zero"
+  [(set (pc)
+        (if_then_else
+          (ge (match_operand:SI 0 "general_operand" "+d*am")
+              (const_int 1))
+          (label_ref (match_operand 1 "" ""))
+          (pc)))
+   (set (match_dup 0)
+        (plus:SI (match_dup 0)
+                 (const_int -1)))]
+  "find_reg_note (insn, REG_NONNEG, 0)"
+  "@dots{}")
+@end group
+@end smallexample
+
+The other two special looping patterns, @samp{doloop_begin} and
+@samp{doloop_end}, are emitted by the loop optimizer for certain
+well-behaved loops with a finite number of loop iterations using
+information collected during strength reduction.
+
+The @samp{doloop_end} pattern describes the actual looping instruction
+(or the implicit looping operation) and the @samp{doloop_begin} pattern
+is an optional companion pattern that can be used for initialization
+needed for some low-overhead looping instructions.
+
+Note that some machines require the actual looping instruction to be
+emitted at the top of the loop (e.g., the TMS320C3x/C4x DSPs).  Emitting
+the true RTL for a looping instruction at the top of the loop can cause
+problems with flow analysis.  So instead, a dummy @code{doloop} insn is
+emitted at the end of the loop.  The machine dependent reorg pass checks
+for the presence of this @code{doloop} insn and then searches back to
+the top of the loop, where it inserts the true looping insn (provided
+there are no instructions in the loop which would cause problems).  Any
+additional labels can be emitted at this point.  In addition, if the
+desired special iteration counter register was not allocated, this
+machine dependent reorg pass could emit a traditional compare and jump
+instruction pair.
+
+The essential difference between the
+@samp{decrement_and_branch_until_zero} and the @samp{doloop_end}
+patterns is that the loop optimizer allocates an additional pseudo
+register for the latter as an iteration counter.  This pseudo register
+cannot be used within the loop (i.e., general induction variables cannot
+be derived from it), however, in many cases the loop induction variable
+may become redundant and removed by the flow pass.
+
+
+@end ifset
+@ifset INTERNALS
+@node Insn Canonicalizations
+@section Canonicalization of Instructions
+@cindex canonicalization of instructions
+@cindex insn canonicalization
+
+There are often cases where multiple RTL expressions could represent an
+operation performed by a single machine instruction.  This situation is
+most commonly encountered with logical, branch, and multiply-accumulate
+instructions.  In such cases, the compiler attempts to convert these
+multiple RTL expressions into a single canonical form to reduce the
+number of insn patterns required.
+
+In addition to algebraic simplifications, following canonicalizations
+are performed:
+
+@itemize @bullet
+@item
+For commutative and comparison operators, a constant is always made the
+second operand.  If a machine only supports a constant as the second
+operand, only patterns that match a constant in the second operand need
+be supplied.
+
+@item
+For associative operators, a sequence of operators will always chain
+to the left; for instance, only the left operand of an integer @code{plus}
+can itself be a @code{plus}.  @code{and}, @code{ior}, @code{xor},
+@code{plus}, @code{mult}, @code{smin}, @code{smax}, @code{umin}, and
+@code{umax} are associative when applied to integers, and sometimes to
+floating-point.
+
+@item
+@cindex @code{neg}, canonicalization of
+@cindex @code{not}, canonicalization of
+@cindex @code{mult}, canonicalization of
+@cindex @code{plus}, canonicalization of
+@cindex @code{minus}, canonicalization of
+For these operators, if only one operand is a @code{neg}, @code{not},
+@code{mult}, @code{plus}, or @code{minus} expression, it will be the
+first operand.
+
+@item
+In combinations of @code{neg}, @code{mult}, @code{plus}, and
+@code{minus}, the @code{neg} operations (if any) will be moved inside
+the operations as far as possible.  For instance,
+@code{(neg (mult A B))} is canonicalized as @code{(mult (neg A) B)}, but
+@code{(plus (mult (neg B) C) A)} is canonicalized as
+@code{(minus A (mult B C))}.
+
+@cindex @code{compare}, canonicalization of
+@item
+For the @code{compare} operator, a constant is always the second operand
+if the first argument is a condition code register or @code{(cc0)}.
+
+@item
+An operand of @code{neg}, @code{not}, @code{mult}, @code{plus}, or
+@code{minus} is made the first operand under the same conditions as
+above.
+
+@item
+@code{(ltu (plus @var{a} @var{b}) @var{b})} is converted to
+@code{(ltu (plus @var{a} @var{b}) @var{a})}. Likewise with @code{geu} instead
+of @code{ltu}.
+
+@item
+@code{(minus @var{x} (const_int @var{n}))} is converted to
+@code{(plus @var{x} (const_int @var{-n}))}.
+
+@item
+Within address computations (i.e., inside @code{mem}), a left shift is
+converted into the appropriate multiplication by a power of two.
+
+@cindex @code{ior}, canonicalization of
+@cindex @code{and}, canonicalization of
+@cindex De Morgan's law
+@item
+De Morgan's Law is used to move bitwise negation inside a bitwise
+logical-and or logical-or operation.  If this results in only one
+operand being a @code{not} expression, it will be the first one.
+
+A machine that has an instruction that performs a bitwise logical-and of one
+operand with the bitwise negation of the other should specify the pattern
+for that instruction as
+
+@smallexample
+(define_insn ""
+  [(set (match_operand:@var{m} 0 @dots{})
+        (and:@var{m} (not:@var{m} (match_operand:@var{m} 1 @dots{}))
+                     (match_operand:@var{m} 2 @dots{})))]
+  "@dots{}"
+  "@dots{}")
+@end smallexample
+
+@noindent
+Similarly, a pattern for a ``NAND'' instruction should be written
+
+@smallexample
+(define_insn ""
+  [(set (match_operand:@var{m} 0 @dots{})
+        (ior:@var{m} (not:@var{m} (match_operand:@var{m} 1 @dots{}))
+                     (not:@var{m} (match_operand:@var{m} 2 @dots{}))))]
+  "@dots{}"
+  "@dots{}")
+@end smallexample
+
+In both cases, it is not necessary to include patterns for the many
+logically equivalent RTL expressions.
+
+@cindex @code{xor}, canonicalization of
+@item
+The only possible RTL expressions involving both bitwise exclusive-or
+and bitwise negation are @code{(xor:@var{m} @var{x} @var{y})}
+and @code{(not:@var{m} (xor:@var{m} @var{x} @var{y}))}.
+
+@item
+The sum of three items, one of which is a constant, will only appear in
+the form
+
+@smallexample
+(plus:@var{m} (plus:@var{m} @var{x} @var{y}) @var{constant})
+@end smallexample
+
+@cindex @code{zero_extract}, canonicalization of
+@cindex @code{sign_extract}, canonicalization of
+@item
+Equality comparisons of a group of bits (usually a single bit) with zero
+will be written using @code{zero_extract} rather than the equivalent
+@code{and} or @code{sign_extract} operations.
+
+@end itemize
+
+Further canonicalization rules are defined in the function
+@code{commutative_operand_precedence} in @file{gcc/rtlanal.c}.
+
+@end ifset
+@ifset INTERNALS
+@node Expander Definitions
+@section Defining RTL Sequences for Code Generation
+@cindex expander definitions
+@cindex code generation RTL sequences
+@cindex defining RTL sequences for code generation
+
+On some target machines, some standard pattern names for RTL generation
+cannot be handled with single insn, but a sequence of RTL insns can
+represent them.  For these target machines, you can write a
+@code{define_expand} to specify how to generate the sequence of RTL@.
+
+@findex define_expand
+A @code{define_expand} is an RTL expression that looks almost like a
+@code{define_insn}; but, unlike the latter, a @code{define_expand} is used
+only for RTL generation and it can produce more than one RTL insn.
+
+A @code{define_expand} RTX has four operands:
+
+@itemize @bullet
+@item
+The name.  Each @code{define_expand} must have a name, since the only
+use for it is to refer to it by name.
+
+@item
+The RTL template.  This is a vector of RTL expressions representing
+a sequence of separate instructions.  Unlike @code{define_insn}, there
+is no implicit surrounding @code{PARALLEL}.
+
+@item
+The condition, a string containing a C expression.  This expression is
+used to express how the availability of this pattern depends on
+subclasses of target machine, selected by command-line options when GCC
+is run.  This is just like the condition of a @code{define_insn} that
+has a standard name.  Therefore, the condition (if present) may not
+depend on the data in the insn being matched, but only the
+target-machine-type flags.  The compiler needs to test these conditions
+during initialization in order to learn exactly which named instructions
+are available in a particular run.
+
+@item
+The preparation statements, a string containing zero or more C
+statements which are to be executed before RTL code is generated from
+the RTL template.
+
+Usually these statements prepare temporary registers for use as
+internal operands in the RTL template, but they can also generate RTL
+insns directly by calling routines such as @code{emit_insn}, etc.
+Any such insns precede the ones that come from the RTL template.
+@end itemize
+
+Every RTL insn emitted by a @code{define_expand} must match some
+@code{define_insn} in the machine description.  Otherwise, the compiler
+will crash when trying to generate code for the insn or trying to optimize
+it.
+
+The RTL template, in addition to controlling generation of RTL insns,
+also describes the operands that need to be specified when this pattern
+is used.  In particular, it gives a predicate for each operand.
+
+A true operand, which needs to be specified in order to generate RTL from
+the pattern, should be described with a @code{match_operand} in its first
+occurrence in the RTL template.  This enters information on the operand's
+predicate into the tables that record such things.  GCC uses the
+information to preload the operand into a register if that is required for
+valid RTL code.  If the operand is referred to more than once, subsequent
+references should use @code{match_dup}.
+
+The RTL template may also refer to internal ``operands'' which are
+temporary registers or labels used only within the sequence made by the
+@code{define_expand}.  Internal operands are substituted into the RTL
+template with @code{match_dup}, never with @code{match_operand}.  The
+values of the internal operands are not passed in as arguments by the
+compiler when it requests use of this pattern.  Instead, they are computed
+within the pattern, in the preparation statements.  These statements
+compute the values and store them into the appropriate elements of
+@code{operands} so that @code{match_dup} can find them.
+
+There are two special macros defined for use in the preparation statements:
+@code{DONE} and @code{FAIL}.  Use them with a following semicolon,
+as a statement.
+
+@table @code
+
+@findex DONE
+@item DONE
+Use the @code{DONE} macro to end RTL generation for the pattern.  The
+only RTL insns resulting from the pattern on this occasion will be
+those already emitted by explicit calls to @code{emit_insn} within the
+preparation statements; the RTL template will not be generated.
+
+@findex FAIL
+@item FAIL
+Make the pattern fail on this occasion.  When a pattern fails, it means
+that the pattern was not truly available.  The calling routines in the
+compiler will try other strategies for code generation using other patterns.
+
+Failure is currently supported only for binary (addition, multiplication,
+shifting, etc.) and bit-field (@code{extv}, @code{extzv}, and @code{insv})
+operations.
+@end table
+
+If the preparation falls through (invokes neither @code{DONE} nor
+@code{FAIL}), then the @code{define_expand} acts like a
+@code{define_insn} in that the RTL template is used to generate the
+insn.
+
+The RTL template is not used for matching, only for generating the
+initial insn list.  If the preparation statement always invokes
+@code{DONE} or @code{FAIL}, the RTL template may be reduced to a simple
+list of operands, such as this example:
+
+@smallexample
+@group
+(define_expand "addsi3"
+  [(match_operand:SI 0 "register_operand" "")
+   (match_operand:SI 1 "register_operand" "")
+   (match_operand:SI 2 "register_operand" "")]
+@end group
+@group
+  ""
+  "
+@{
+  handle_add (operands[0], operands[1], operands[2]);
+  DONE;
+@}")
+@end group
+@end smallexample
+
+Here is an example, the definition of left-shift for the SPUR chip:
+
+@smallexample
+@group
+(define_expand "ashlsi3"
+  [(set (match_operand:SI 0 "register_operand" "")
+        (ashift:SI
+@end group
+@group
+          (match_operand:SI 1 "register_operand" "")
+          (match_operand:SI 2 "nonmemory_operand" "")))]
+  ""
+  "
+@end group
+@end smallexample
+
+@smallexample
+@group
+@{
+  if (GET_CODE (operands[2]) != CONST_INT
+      || (unsigned) INTVAL (operands[2]) > 3)
+    FAIL;
+@}")
+@end group
+@end smallexample
+
+@noindent
+This example uses @code{define_expand} so that it can generate an RTL insn
+for shifting when the shift-count is in the supported range of 0 to 3 but
+fail in other cases where machine insns aren't available.  When it fails,
+the compiler tries another strategy using different patterns (such as, a
+library call).
+
+If the compiler were able to handle nontrivial condition-strings in
+patterns with names, then it would be possible to use a
+@code{define_insn} in that case.  Here is another case (zero-extension
+on the 68000) which makes more use of the power of @code{define_expand}:
+
+@smallexample
+(define_expand "zero_extendhisi2"
+  [(set (match_operand:SI 0 "general_operand" "")
+        (const_int 0))
+   (set (strict_low_part
+          (subreg:HI
+            (match_dup 0)
+            0))
+        (match_operand:HI 1 "general_operand" ""))]
+  ""
+  "operands[1] = make_safe_from (operands[1], operands[0]);")
+@end smallexample
+
+@noindent
+@findex make_safe_from
+Here two RTL insns are generated, one to clear the entire output operand
+and the other to copy the input operand into its low half.  This sequence
+is incorrect if the input operand refers to [the old value of] the output
+operand, so the preparation statement makes sure this isn't so.  The
+function @code{make_safe_from} copies the @code{operands[1]} into a
+temporary register if it refers to @code{operands[0]}.  It does this
+by emitting another RTL insn.
+
+Finally, a third example shows the use of an internal operand.
+Zero-extension on the SPUR chip is done by @code{and}-ing the result
+against a halfword mask.  But this mask cannot be represented by a
+@code{const_int} because the constant value is too large to be legitimate
+on this machine.  So it must be copied into a register with
+@code{force_reg} and then the register used in the @code{and}.
+
+@smallexample
+(define_expand "zero_extendhisi2"
+  [(set (match_operand:SI 0 "register_operand" "")
+        (and:SI (subreg:SI
+                  (match_operand:HI 1 "register_operand" "")
+                  0)
+                (match_dup 2)))]
+  ""
+  "operands[2]
+     = force_reg (SImode, GEN_INT (65535)); ")
+@end smallexample
+
+@emph{Note:} If the @code{define_expand} is used to serve a
+standard binary or unary arithmetic operation or a bit-field operation,
+then the last insn it generates must not be a @code{code_label},
+@code{barrier} or @code{note}.  It must be an @code{insn},
+@code{jump_insn} or @code{call_insn}.  If you don't need a real insn
+at the end, emit an insn to copy the result of the operation into
+itself.  Such an insn will generate no code, but it can avoid problems
+in the compiler.
+
+@end ifset
+@ifset INTERNALS
+@node Insn Splitting
+@section Defining How to Split Instructions
+@cindex insn splitting
+@cindex instruction splitting
+@cindex splitting instructions
+
+There are two cases where you should specify how to split a pattern
+into multiple insns.  On machines that have instructions requiring
+delay slots (@pxref{Delay Slots}) or that have instructions whose
+output is not available for multiple cycles (@pxref{Processor pipeline
+description}), the compiler phases that optimize these cases need to
+be able to move insns into one-instruction delay slots.  However, some
+insns may generate more than one machine instruction.  These insns
+cannot be placed into a delay slot.
+
+Often you can rewrite the single insn as a list of individual insns,
+each corresponding to one machine instruction.  The disadvantage of
+doing so is that it will cause the compilation to be slower and require
+more space.  If the resulting insns are too complex, it may also
+suppress some optimizations.  The compiler splits the insn if there is a
+reason to believe that it might improve instruction or delay slot
+scheduling.
+
+The insn combiner phase also splits putative insns.  If three insns are
+merged into one insn with a complex expression that cannot be matched by
+some @code{define_insn} pattern, the combiner phase attempts to split
+the complex pattern into two insns that are recognized.  Usually it can
+break the complex pattern into two patterns by splitting out some
+subexpression.  However, in some other cases, such as performing an
+addition of a large constant in two insns on a RISC machine, the way to
+split the addition into two insns is machine-dependent.
+
+@findex define_split
+The @code{define_split} definition tells the compiler how to split a
+complex insn into several simpler insns.  It looks like this:
+
+@smallexample
+(define_split
+  [@var{insn-pattern}]
+  "@var{condition}"
+  [@var{new-insn-pattern-1}
+   @var{new-insn-pattern-2}
+   @dots{}]
+  "@var{preparation-statements}")
+@end smallexample
+
+@var{insn-pattern} is a pattern that needs to be split and
+@var{condition} is the final condition to be tested, as in a
+@code{define_insn}.  When an insn matching @var{insn-pattern} and
+satisfying @var{condition} is found, it is replaced in the insn list
+with the insns given by @var{new-insn-pattern-1},
+@var{new-insn-pattern-2}, etc.
+
+The @var{preparation-statements} are similar to those statements that
+are specified for @code{define_expand} (@pxref{Expander Definitions})
+and are executed before the new RTL is generated to prepare for the
+generated code or emit some insns whose pattern is not fixed.  Unlike
+those in @code{define_expand}, however, these statements must not
+generate any new pseudo-registers.  Once reload has completed, they also
+must not allocate any space in the stack frame.
+
+Patterns are matched against @var{insn-pattern} in two different
+circumstances.  If an insn needs to be split for delay slot scheduling
+or insn scheduling, the insn is already known to be valid, which means
+that it must have been matched by some @code{define_insn} and, if
+@code{reload_completed} is nonzero, is known to satisfy the constraints
+of that @code{define_insn}.  In that case, the new insn patterns must
+also be insns that are matched by some @code{define_insn} and, if
+@code{reload_completed} is nonzero, must also satisfy the constraints
+of those definitions.
+
+As an example of this usage of @code{define_split}, consider the following
+example from @file{a29k.md}, which splits a @code{sign_extend} from
+@code{HImode} to @code{SImode} into a pair of shift insns:
+
+@smallexample
+(define_split
+  [(set (match_operand:SI 0 "gen_reg_operand" "")
+        (sign_extend:SI (match_operand:HI 1 "gen_reg_operand" "")))]
+  ""
+  [(set (match_dup 0)
+        (ashift:SI (match_dup 1)
+                   (const_int 16)))
+   (set (match_dup 0)
+        (ashiftrt:SI (match_dup 0)
+                     (const_int 16)))]
+  "
+@{ operands[1] = gen_lowpart (SImode, operands[1]); @}")
+@end smallexample
+
+When the combiner phase tries to split an insn pattern, it is always the
+case that the pattern is @emph{not} matched by any @code{define_insn}.
+The combiner pass first tries to split a single @code{set} expression
+and then the same @code{set} expression inside a @code{parallel}, but
+followed by a @code{clobber} of a pseudo-reg to use as a scratch
+register.  In these cases, the combiner expects exactly two new insn
+patterns to be generated.  It will verify that these patterns match some
+@code{define_insn} definitions, so you need not do this test in the
+@code{define_split} (of course, there is no point in writing a
+@code{define_split} that will never produce insns that match).
+
+Here is an example of this use of @code{define_split}, taken from
+@file{rs6000.md}:
+
+@smallexample
+(define_split
+  [(set (match_operand:SI 0 "gen_reg_operand" "")
+        (plus:SI (match_operand:SI 1 "gen_reg_operand" "")
+                 (match_operand:SI 2 "non_add_cint_operand" "")))]
+  ""
+  [(set (match_dup 0) (plus:SI (match_dup 1) (match_dup 3)))
+   (set (match_dup 0) (plus:SI (match_dup 0) (match_dup 4)))]
+"
+@{
+  int low = INTVAL (operands[2]) & 0xffff;
+  int high = (unsigned) INTVAL (operands[2]) >> 16;
+
+  if (low & 0x8000)
+    high++, low |= 0xffff0000;
+
+  operands[3] = GEN_INT (high << 16);
+  operands[4] = GEN_INT (low);
+@}")
+@end smallexample
+
+Here the predicate @code{non_add_cint_operand} matches any
+@code{const_int} that is @emph{not} a valid operand of a single add
+insn.  The add with the smaller displacement is written so that it
+can be substituted into the address of a subsequent operation.
+
+An example that uses a scratch register, from the same file, generates
+an equality comparison of a register and a large constant:
+
+@smallexample
+(define_split
+  [(set (match_operand:CC 0 "cc_reg_operand" "")
+        (compare:CC (match_operand:SI 1 "gen_reg_operand" "")
+                    (match_operand:SI 2 "non_short_cint_operand" "")))
+   (clobber (match_operand:SI 3 "gen_reg_operand" ""))]
+  "find_single_use (operands[0], insn, 0)
+   && (GET_CODE (*find_single_use (operands[0], insn, 0)) == EQ
+       || GET_CODE (*find_single_use (operands[0], insn, 0)) == NE)"
+  [(set (match_dup 3) (xor:SI (match_dup 1) (match_dup 4)))
+   (set (match_dup 0) (compare:CC (match_dup 3) (match_dup 5)))]
+  "
+@{
+  /* @r{Get the constant we are comparing against, C, and see what it
+     looks like sign-extended to 16 bits.  Then see what constant
+     could be XOR'ed with C to get the sign-extended value.}  */
+
+  int c = INTVAL (operands[2]);
+  int sextc = (c << 16) >> 16;
+  int xorv = c ^ sextc;
+
+  operands[4] = GEN_INT (xorv);
+  operands[5] = GEN_INT (sextc);
+@}")
+@end smallexample
+
+To avoid confusion, don't write a single @code{define_split} that
+accepts some insns that match some @code{define_insn} as well as some
+insns that don't.  Instead, write two separate @code{define_split}
+definitions, one for the insns that are valid and one for the insns that
+are not valid.
+
+The splitter is allowed to split jump instructions into sequence of
+jumps or create new jumps in while splitting non-jump instructions.  As
+the central flowgraph and branch prediction information needs to be updated,
+several restriction apply.
+
+Splitting of jump instruction into sequence that over by another jump
+instruction is always valid, as compiler expect identical behavior of new
+jump.  When new sequence contains multiple jump instructions or new labels,
+more assistance is needed.  Splitter is required to create only unconditional
+jumps, or simple conditional jump instructions.  Additionally it must attach a
+@code{REG_BR_PROB} note to each conditional jump.  A global variable
+@code{split_branch_probability} holds the probability of the original branch in case
+it was a simple conditional jump, @minus{}1 otherwise.  To simplify
+recomputing of edge frequencies, the new sequence is required to have only
+forward jumps to the newly created labels.
+
+@findex define_insn_and_split
+For the common case where the pattern of a define_split exactly matches the
+pattern of a define_insn, use @code{define_insn_and_split}.  It looks like
+this:
+
+@smallexample
+(define_insn_and_split
+  [@var{insn-pattern}]
+  "@var{condition}"
+  "@var{output-template}"
+  "@var{split-condition}"
+  [@var{new-insn-pattern-1}
+   @var{new-insn-pattern-2}
+   @dots{}]
+  "@var{preparation-statements}"
+  [@var{insn-attributes}])
+
+@end smallexample
+
+@var{insn-pattern}, @var{condition}, @var{output-template}, and
+@var{insn-attributes} are used as in @code{define_insn}.  The
+@var{new-insn-pattern} vector and the @var{preparation-statements} are used as
+in a @code{define_split}.  The @var{split-condition} is also used as in
+@code{define_split}, with the additional behavior that if the condition starts
+with @samp{&&}, the condition used for the split will be the constructed as a
+logical ``and'' of the split condition with the insn condition.  For example,
+from i386.md:
+
+@smallexample
+(define_insn_and_split "zero_extendhisi2_and"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+     (zero_extend:SI (match_operand:HI 1 "register_operand" "0")))
+   (clobber (reg:CC 17))]
+  "TARGET_ZERO_EXTEND_WITH_AND && !optimize_size"
+  "#"
+  "&& reload_completed"
+  [(parallel [(set (match_dup 0)
+                   (and:SI (match_dup 0) (const_int 65535)))
+              (clobber (reg:CC 17))])]
+  ""
+  [(set_attr "type" "alu1")])
+
+@end smallexample
+
+In this case, the actual split condition will be
+@samp{TARGET_ZERO_EXTEND_WITH_AND && !optimize_size && reload_completed}.
+
+The @code{define_insn_and_split} construction provides exactly the same
+functionality as two separate @code{define_insn} and @code{define_split}
+patterns.  It exists for compactness, and as a maintenance tool to prevent
+having to ensure the two patterns' templates match.
+
+@end ifset
+@ifset INTERNALS
+@node Including Patterns
+@section Including Patterns in Machine Descriptions.
+@cindex insn includes
+
+@findex include
+The @code{include} pattern tells the compiler tools where to
+look for patterns that are in files other than in the file
+@file{.md}.  This is used only at build time and there is no preprocessing allowed.
+
+It looks like:
+
+@smallexample
+
+(include
+  @var{pathname})
+@end smallexample
+
+For example:
+
+@smallexample
+
+(include "filestuff")
+
+@end smallexample
+
+Where @var{pathname} is a string that specifies the location of the file,
+specifies the include file to be in @file{gcc/config/target/filestuff}.  The
+directory @file{gcc/config/target} is regarded as the default directory.
+
+
+Machine descriptions may be split up into smaller more manageable subsections
+and placed into subdirectories.
+
+By specifying:
+
+@smallexample
+
+(include "BOGUS/filestuff")
+
+@end smallexample
+
+the include file is specified to be in @file{gcc/config/@var{target}/BOGUS/filestuff}.
+
+Specifying an absolute path for the include file such as;
+@smallexample
+
+(include "/u2/BOGUS/filestuff")
+
+@end smallexample
+is permitted but is not encouraged.
+
+@subsection RTL Generation Tool Options for Directory Search
+@cindex directory options .md
+@cindex options, directory search
+@cindex search options
+
+The @option{-I@var{dir}} option specifies directories to search for machine descriptions.
+For example:
+
+@smallexample
+
+genrecog -I/p1/abc/proc1 -I/p2/abcd/pro2 target.md
+
+@end smallexample
+
+
+Add the directory @var{dir} to the head of the list of directories to be
+searched for header files.  This can be used to override a system machine definition
+file, substituting your own version, since these directories are
+searched before the default machine description file directories.  If you use more than
+one @option{-I} option, the directories are scanned in left-to-right
+order; the standard default directory come after.
+
+
+@end ifset
+@ifset INTERNALS
+@node Peephole Definitions
+@section Machine-Specific Peephole Optimizers
+@cindex peephole optimizer definitions
+@cindex defining peephole optimizers
+
+In addition to instruction patterns the @file{md} file may contain
+definitions of machine-specific peephole optimizations.
+
+The combiner does not notice certain peephole optimizations when the data
+flow in the program does not suggest that it should try them.  For example,
+sometimes two consecutive insns related in purpose can be combined even
+though the second one does not appear to use a register computed in the
+first one.  A machine-specific peephole optimizer can detect such
+opportunities.
+
+There are two forms of peephole definitions that may be used.  The
+original @code{define_peephole} is run at assembly output time to
+match insns and substitute assembly text.  Use of @code{define_peephole}
+is deprecated.
+
+A newer @code{define_peephole2} matches insns and substitutes new
+insns.  The @code{peephole2} pass is run after register allocation
+but before scheduling, which may result in much better code for
+targets that do scheduling.
+
+@menu
+* define_peephole::     RTL to Text Peephole Optimizers
+* define_peephole2::    RTL to RTL Peephole Optimizers
+@end menu
+
+@end ifset
+@ifset INTERNALS
+@node define_peephole
+@subsection RTL to Text Peephole Optimizers
+@findex define_peephole
+
+@need 1000
+A definition looks like this:
+
+@smallexample
+(define_peephole
+  [@var{insn-pattern-1}
+   @var{insn-pattern-2}
+   @dots{}]
+  "@var{condition}"
+  "@var{template}"
+  "@var{optional-insn-attributes}")
+@end smallexample
+
+@noindent
+The last string operand may be omitted if you are not using any
+machine-specific information in this machine description.  If present,
+it must obey the same rules as in a @code{define_insn}.
+
+In this skeleton, @var{insn-pattern-1} and so on are patterns to match
+consecutive insns.  The optimization applies to a sequence of insns when
+@var{insn-pattern-1} matches the first one, @var{insn-pattern-2} matches
+the next, and so on.
+
+Each of the insns matched by a peephole must also match a
+@code{define_insn}.  Peepholes are checked only at the last stage just
+before code generation, and only optionally.  Therefore, any insn which
+would match a peephole but no @code{define_insn} will cause a crash in code
+generation in an unoptimized compilation, or at various optimization
+stages.
+
+The operands of the insns are matched with @code{match_operands},
+@code{match_operator}, and @code{match_dup}, as usual.  What is not
+usual is that the operand numbers apply to all the insn patterns in the
+definition.  So, you can check for identical operands in two insns by
+using @code{match_operand} in one insn and @code{match_dup} in the
+other.
+
+The operand constraints used in @code{match_operand} patterns do not have
+any direct effect on the applicability of the peephole, but they will
+be validated afterward, so make sure your constraints are general enough
+to apply whenever the peephole matches.  If the peephole matches
+but the constraints are not satisfied, the compiler will crash.
+
+It is safe to omit constraints in all the operands of the peephole; or
+you can write constraints which serve as a double-check on the criteria
+previously tested.
+
+Once a sequence of insns matches the patterns, the @var{condition} is
+checked.  This is a C expression which makes the final decision whether to
+perform the optimization (we do so if the expression is nonzero).  If
+@var{condition} is omitted (in other words, the string is empty) then the
+optimization is applied to every sequence of insns that matches the
+patterns.
+
+The defined peephole optimizations are applied after register allocation
+is complete.  Therefore, the peephole definition can check which
+operands have ended up in which kinds of registers, just by looking at
+the operands.
+
+@findex prev_active_insn
+The way to refer to the operands in @var{condition} is to write
+@code{operands[@var{i}]} for operand number @var{i} (as matched by
+@code{(match_operand @var{i} @dots{})}).  Use the variable @code{insn}
+to refer to the last of the insns being matched; use
+@code{prev_active_insn} to find the preceding insns.
+
+@findex dead_or_set_p
+When optimizing computations with intermediate results, you can use
+@var{condition} to match only when the intermediate results are not used
+elsewhere.  Use the C expression @code{dead_or_set_p (@var{insn},
+@var{op})}, where @var{insn} is the insn in which you expect the value
+to be used for the last time (from the value of @code{insn}, together
+with use of @code{prev_nonnote_insn}), and @var{op} is the intermediate
+value (from @code{operands[@var{i}]}).
+
+Applying the optimization means replacing the sequence of insns with one
+new insn.  The @var{template} controls ultimate output of assembler code
+for this combined insn.  It works exactly like the template of a
+@code{define_insn}.  Operand numbers in this template are the same ones
+used in matching the original sequence of insns.
+
+The result of a defined peephole optimizer does not need to match any of
+the insn patterns in the machine description; it does not even have an
+opportunity to match them.  The peephole optimizer definition itself serves
+as the insn pattern to control how the insn is output.
+
+Defined peephole optimizers are run as assembler code is being output,
+so the insns they produce are never combined or rearranged in any way.
+
+Here is an example, taken from the 68000 machine description:
+
+@smallexample
+(define_peephole
+  [(set (reg:SI 15) (plus:SI (reg:SI 15) (const_int 4)))
+   (set (match_operand:DF 0 "register_operand" "=f")
+        (match_operand:DF 1 "register_operand" "ad"))]
+  "FP_REG_P (operands[0]) && ! FP_REG_P (operands[1])"
+@{
+  rtx xoperands[2];
+  xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
+#ifdef MOTOROLA
+  output_asm_insn ("move.l %1,(sp)", xoperands);
+  output_asm_insn ("move.l %1,-(sp)", operands);
+  return "fmove.d (sp)+,%0";
+#else
+  output_asm_insn ("movel %1,sp@@", xoperands);
+  output_asm_insn ("movel %1,sp@@-", operands);
+  return "fmoved sp@@+,%0";
+#endif
+@})
+@end smallexample
+
+@need 1000
+The effect of this optimization is to change
+
+@smallexample
+@group
+jbsr _foobar
+addql #4,sp
+movel d1,sp@@-
+movel d0,sp@@-
+fmoved sp@@+,fp0
+@end group
+@end smallexample
+
+@noindent
+into
+
+@smallexample
+@group
+jbsr _foobar
+movel d1,sp@@
+movel d0,sp@@-
+fmoved sp@@+,fp0
+@end group
+@end smallexample
+
+@ignore
+@findex CC_REVERSED
+If a peephole matches a sequence including one or more jump insns, you must
+take account of the flags such as @code{CC_REVERSED} which specify that the
+condition codes are represented in an unusual manner.  The compiler
+automatically alters any ordinary conditional jumps which occur in such
+situations, but the compiler cannot alter jumps which have been replaced by
+peephole optimizations.  So it is up to you to alter the assembler code
+that the peephole produces.  Supply C code to write the assembler output,
+and in this C code check the condition code status flags and change the
+assembler code as appropriate.
+@end ignore
+
+@var{insn-pattern-1} and so on look @emph{almost} like the second
+operand of @code{define_insn}.  There is one important difference: the
+second operand of @code{define_insn} consists of one or more RTX's
+enclosed in square brackets.  Usually, there is only one: then the same
+action can be written as an element of a @code{define_peephole}.  But
+when there are multiple actions in a @code{define_insn}, they are
+implicitly enclosed in a @code{parallel}.  Then you must explicitly
+write the @code{parallel}, and the square brackets within it, in the
+@code{define_peephole}.  Thus, if an insn pattern looks like this,
+
+@smallexample
+(define_insn "divmodsi4"
+  [(set (match_operand:SI 0 "general_operand" "=d")
+        (div:SI (match_operand:SI 1 "general_operand" "0")
+                (match_operand:SI 2 "general_operand" "dmsK")))
+   (set (match_operand:SI 3 "general_operand" "=d")
+        (mod:SI (match_dup 1) (match_dup 2)))]
+  "TARGET_68020"
+  "divsl%.l %2,%3:%0")
+@end smallexample
+
+@noindent
+then the way to mention this insn in a peephole is as follows:
+
+@smallexample
+(define_peephole
+  [@dots{}
+   (parallel
+    [(set (match_operand:SI 0 "general_operand" "=d")
+          (div:SI (match_operand:SI 1 "general_operand" "0")
+                  (match_operand:SI 2 "general_operand" "dmsK")))
+     (set (match_operand:SI 3 "general_operand" "=d")
+          (mod:SI (match_dup 1) (match_dup 2)))])
+   @dots{}]
+  @dots{})
+@end smallexample
+
+@end ifset
+@ifset INTERNALS
+@node define_peephole2
+@subsection RTL to RTL Peephole Optimizers
+@findex define_peephole2
+
+The @code{define_peephole2} definition tells the compiler how to
+substitute one sequence of instructions for another sequence,
+what additional scratch registers may be needed and what their
+lifetimes must be.
+
+@smallexample
+(define_peephole2
+  [@var{insn-pattern-1}
+   @var{insn-pattern-2}
+   @dots{}]
+  "@var{condition}"
+  [@var{new-insn-pattern-1}
+   @var{new-insn-pattern-2}
+   @dots{}]
+  "@var{preparation-statements}")
+@end smallexample
+
+The definition is almost identical to @code{define_split}
+(@pxref{Insn Splitting}) except that the pattern to match is not a
+single instruction, but a sequence of instructions.
+
+It is possible to request additional scratch registers for use in the
+output template.  If appropriate registers are not free, the pattern
+will simply not match.
+
+@findex match_scratch
+@findex match_dup
+Scratch registers are requested with a @code{match_scratch} pattern at
+the top level of the input pattern.  The allocated register (initially) will
+be dead at the point requested within the original sequence.  If the scratch
+is used at more than a single point, a @code{match_dup} pattern at the
+top level of the input pattern marks the last position in the input sequence
+at which the register must be available.
+
+Here is an example from the IA-32 machine description:
+
+@smallexample
+(define_peephole2
+  [(match_scratch:SI 2 "r")
+   (parallel [(set (match_operand:SI 0 "register_operand" "")
+                   (match_operator:SI 3 "arith_or_logical_operator"
+                     [(match_dup 0)
+                      (match_operand:SI 1 "memory_operand" "")]))
+              (clobber (reg:CC 17))])]
+  "! optimize_size && ! TARGET_READ_MODIFY"
+  [(set (match_dup 2) (match_dup 1))
+   (parallel [(set (match_dup 0)
+                   (match_op_dup 3 [(match_dup 0) (match_dup 2)]))
+              (clobber (reg:CC 17))])]
+  "")
+@end smallexample
+
+@noindent
+This pattern tries to split a load from its use in the hopes that we'll be
+able to schedule around the memory load latency.  It allocates a single
+@code{SImode} register of class @code{GENERAL_REGS} (@code{"r"}) that needs
+to be live only at the point just before the arithmetic.
+
+A real example requiring extended scratch lifetimes is harder to come by,
+so here's a silly made-up example:
+
+@smallexample
+(define_peephole2
+  [(match_scratch:SI 4 "r")
+   (set (match_operand:SI 0 "" "") (match_operand:SI 1 "" ""))
+   (set (match_operand:SI 2 "" "") (match_dup 1))
+   (match_dup 4)
+   (set (match_operand:SI 3 "" "") (match_dup 1))]
+  "/* @r{determine 1 does not overlap 0 and 2} */"
+  [(set (match_dup 4) (match_dup 1))
+   (set (match_dup 0) (match_dup 4))
+   (set (match_dup 2) (match_dup 4))]
+   (set (match_dup 3) (match_dup 4))]
+  "")
+@end smallexample
+
+@noindent
+If we had not added the @code{(match_dup 4)} in the middle of the input
+sequence, it might have been the case that the register we chose at the
+beginning of the sequence is killed by the first or second @code{set}.
+
+@end ifset
+@ifset INTERNALS
+@node Insn Attributes
+@section Instruction Attributes
+@cindex insn attributes
+@cindex instruction attributes
+
+In addition to describing the instruction supported by the target machine,
+the @file{md} file also defines a group of @dfn{attributes} and a set of
+values for each.  Every generated insn is assigned a value for each attribute.
+One possible attribute would be the effect that the insn has on the machine's
+condition code.  This attribute can then be used by @code{NOTICE_UPDATE_CC}
+to track the condition codes.
+
+@menu
+* Defining Attributes:: Specifying attributes and their values.
+* Expressions::         Valid expressions for attribute values.
+* Tagging Insns::       Assigning attribute values to insns.
+* Attr Example::        An example of assigning attributes.
+* Insn Lengths::        Computing the length of insns.
+* Constant Attributes:: Defining attributes that are constant.
+* Delay Slots::         Defining delay slots required for a machine.
+* Processor pipeline description:: Specifying information for insn scheduling.
+@end menu
+
+@end ifset
+@ifset INTERNALS
+@node Defining Attributes
+@subsection Defining Attributes and their Values
+@cindex defining attributes and their values
+@cindex attributes, defining
+
+@findex define_attr
+The @code{define_attr} expression is used to define each attribute required
+by the target machine.  It looks like:
+
+@smallexample
+(define_attr @var{name} @var{list-of-values} @var{default})
+@end smallexample
+
+@var{name} is a string specifying the name of the attribute being defined.
+
+@var{list-of-values} is either a string that specifies a comma-separated
+list of values that can be assigned to the attribute, or a null string to
+indicate that the attribute takes numeric values.
+
+@var{default} is an attribute expression that gives the value of this
+attribute for insns that match patterns whose definition does not include
+an explicit value for this attribute.  @xref{Attr Example}, for more
+information on the handling of defaults.  @xref{Constant Attributes},
+for information on attributes that do not depend on any particular insn.
+
+@findex insn-attr.h
+For each defined attribute, a number of definitions are written to the
+@file{insn-attr.h} file.  For cases where an explicit set of values is
+specified for an attribute, the following are defined:
+
+@itemize @bullet
+@item
+A @samp{#define} is written for the symbol @samp{HAVE_ATTR_@var{name}}.
+
+@item
+An enumerated class is defined for @samp{attr_@var{name}} with
+elements of the form @samp{@var{upper-name}_@var{upper-value}} where
+the attribute name and value are first converted to uppercase.
+
+@item
+A function @samp{get_attr_@var{name}} is defined that is passed an insn and
+returns the attribute value for that insn.
+@end itemize
+
+For example, if the following is present in the @file{md} file:
+
+@smallexample
+(define_attr "type" "branch,fp,load,store,arith" @dots{})
+@end smallexample
+
+@noindent
+the following lines will be written to the file @file{insn-attr.h}.
+
+@smallexample
+#define HAVE_ATTR_type
+enum attr_type @{TYPE_BRANCH, TYPE_FP, TYPE_LOAD,
+                 TYPE_STORE, TYPE_ARITH@};
+extern enum attr_type get_attr_type ();
+@end smallexample
+
+If the attribute takes numeric values, no @code{enum} type will be
+defined and the function to obtain the attribute's value will return
+@code{int}.
+
+There are attributes which are tied to a specific meaning.  These
+attributes are not free to use for other purposes:
+
+@table @code
+@item length
+The @code{length} attribute is used to calculate the length of emitted
+code chunks.  This is especially important when verifying branch
+distances. @xref{Insn Lengths}.
+
+@item enabled
+The @code{enabled} attribute can be defined to prevent certain
+alternatives of an insn definition from being used during code
+generation. @xref{Disable Insn Alternatives}.
+@end table
+
+@findex define_enum_attr
+@anchor{define_enum_attr}
+Another way of defining an attribute is to use:
+
+@smallexample
+(define_enum_attr "@var{attr}" "@var{enum}" @var{default})
+@end smallexample
+
+This works in just the same way as @code{define_attr}, except that
+the list of values is taken from a separate enumeration called
+@var{enum} (@pxref{define_enum}).  This form allows you to use
+the same list of values for several attributes without having to
+repeat the list each time.  For example:
+
+@smallexample
+(define_enum "processor" [
+  model_a
+  model_b
+  @dots{}
+])
+(define_enum_attr "arch" "processor"
+  (const (symbol_ref "target_arch")))
+(define_enum_attr "tune" "processor"
+  (const (symbol_ref "target_tune")))
+@end smallexample
+
+defines the same attributes as:
+
+@smallexample
+(define_attr "arch" "model_a,model_b,@dots{}"
+  (const (symbol_ref "target_arch")))
+(define_attr "tune" "model_a,model_b,@dots{}"
+  (const (symbol_ref "target_tune")))
+@end smallexample
+
+but without duplicating the processor list.  The second example defines two
+separate C enums (@code{attr_arch} and @code{attr_tune}) whereas the first
+defines a single C enum (@code{processor}).
+@end ifset
+@ifset INTERNALS
+@node Expressions
+@subsection Attribute Expressions
+@cindex attribute expressions
+
+RTL expressions used to define attributes use the codes described above
+plus a few specific to attribute definitions, to be discussed below.
+Attribute value expressions must have one of the following forms:
+
+@table @code
+@cindex @code{const_int} and attributes
+@item (const_int @var{i})
+The integer @var{i} specifies the value of a numeric attribute.  @var{i}
+must be non-negative.
+
+The value of a numeric attribute can be specified either with a
+@code{const_int}, or as an integer represented as a string in
+@code{const_string}, @code{eq_attr} (see below), @code{attr},
+@code{symbol_ref}, simple arithmetic expressions, and @code{set_attr}
+overrides on specific instructions (@pxref{Tagging Insns}).
+
+@cindex @code{const_string} and attributes
+@item (const_string @var{value})
+The string @var{value} specifies a constant attribute value.
+If @var{value} is specified as @samp{"*"}, it means that the default value of
+the attribute is to be used for the insn containing this expression.
+@samp{"*"} obviously cannot be used in the @var{default} expression
+of a @code{define_attr}.
+
+If the attribute whose value is being specified is numeric, @var{value}
+must be a string containing a non-negative integer (normally
+@code{const_int} would be used in this case).  Otherwise, it must
+contain one of the valid values for the attribute.
+
+@cindex @code{if_then_else} and attributes
+@item (if_then_else @var{test} @var{true-value} @var{false-value})
+@var{test} specifies an attribute test, whose format is defined below.
+The value of this expression is @var{true-value} if @var{test} is true,
+otherwise it is @var{false-value}.
+
+@cindex @code{cond} and attributes
+@item (cond [@var{test1} @var{value1} @dots{}] @var{default})
+The first operand of this expression is a vector containing an even
+number of expressions and consisting of pairs of @var{test} and @var{value}
+expressions.  The value of the @code{cond} expression is that of the
+@var{value} corresponding to the first true @var{test} expression.  If
+none of the @var{test} expressions are true, the value of the @code{cond}
+expression is that of the @var{default} expression.
+@end table
+
+@var{test} expressions can have one of the following forms:
+
+@table @code
+@cindex @code{const_int} and attribute tests
+@item (const_int @var{i})
+This test is true if @var{i} is nonzero and false otherwise.
+
+@cindex @code{not} and attributes
+@cindex @code{ior} and attributes
+@cindex @code{and} and attributes
+@item (not @var{test})
+@itemx (ior @var{test1} @var{test2})
+@itemx (and @var{test1} @var{test2})
+These tests are true if the indicated logical function is true.
+
+@cindex @code{match_operand} and attributes
+@item (match_operand:@var{m} @var{n} @var{pred} @var{constraints})
+This test is true if operand @var{n} of the insn whose attribute value
+is being determined has mode @var{m} (this part of the test is ignored
+if @var{m} is @code{VOIDmode}) and the function specified by the string
+@var{pred} returns a nonzero value when passed operand @var{n} and mode
+@var{m} (this part of the test is ignored if @var{pred} is the null
+string).
+
+The @var{constraints} operand is ignored and should be the null string.
+
+@cindex @code{le} and attributes
+@cindex @code{leu} and attributes
+@cindex @code{lt} and attributes
+@cindex @code{gt} and attributes
+@cindex @code{gtu} and attributes
+@cindex @code{ge} and attributes
+@cindex @code{geu} and attributes
+@cindex @code{ne} and attributes
+@cindex @code{eq} and attributes
+@cindex @code{plus} and attributes
+@cindex @code{minus} and attributes
+@cindex @code{mult} and attributes
+@cindex @code{div} and attributes
+@cindex @code{mod} and attributes
+@cindex @code{abs} and attributes
+@cindex @code{neg} and attributes
+@cindex @code{ashift} and attributes
+@cindex @code{lshiftrt} and attributes
+@cindex @code{ashiftrt} and attributes
+@item (le @var{arith1} @var{arith2})
+@itemx (leu @var{arith1} @var{arith2})
+@itemx (lt @var{arith1} @var{arith2})
+@itemx (ltu @var{arith1} @var{arith2})
+@itemx (gt @var{arith1} @var{arith2})
+@itemx (gtu @var{arith1} @var{arith2})
+@itemx (ge @var{arith1} @var{arith2})
+@itemx (geu @var{arith1} @var{arith2})
+@itemx (ne @var{arith1} @var{arith2})
+@itemx (eq @var{arith1} @var{arith2})
+These tests are true if the indicated comparison of the two arithmetic
+expressions is true.  Arithmetic expressions are formed with
+@code{plus}, @code{minus}, @code{mult}, @code{div}, @code{mod},
+@code{abs}, @code{neg}, @code{and}, @code{ior}, @code{xor}, @code{not},
+@code{ashift}, @code{lshiftrt}, and @code{ashiftrt} expressions.
+
+@findex get_attr
+@code{const_int} and @code{symbol_ref} are always valid terms (@pxref{Insn
+Lengths},for additional forms).  @code{symbol_ref} is a string
+denoting a C expression that yields an @code{int} when evaluated by the
+@samp{get_attr_@dots{}} routine.  It should normally be a global
+variable.
+
+@findex eq_attr
+@item (eq_attr @var{name} @var{value})
+@var{name} is a string specifying the name of an attribute.
+
+@var{value} is a string that is either a valid value for attribute
+@var{name}, a comma-separated list of values, or @samp{!} followed by a
+value or list.  If @var{value} does not begin with a @samp{!}, this
+test is true if the value of the @var{name} attribute of the current
+insn is in the list specified by @var{value}.  If @var{value} begins
+with a @samp{!}, this test is true if the attribute's value is
+@emph{not} in the specified list.
+
+For example,
+
+@smallexample
+(eq_attr "type" "load,store")
+@end smallexample
+
+@noindent
+is equivalent to
+
+@smallexample
+(ior (eq_attr "type" "load") (eq_attr "type" "store"))
+@end smallexample
+
+If @var{name} specifies an attribute of @samp{alternative}, it refers to the
+value of the compiler variable @code{which_alternative}
+(@pxref{Output Statement}) and the values must be small integers.  For
+example,
+
+@smallexample
+(eq_attr "alternative" "2,3")
+@end smallexample
+
+@noindent
+is equivalent to
+
+@smallexample
+(ior (eq (symbol_ref "which_alternative") (const_int 2))
+     (eq (symbol_ref "which_alternative") (const_int 3)))
+@end smallexample
+
+Note that, for most attributes, an @code{eq_attr} test is simplified in cases
+where the value of the attribute being tested is known for all insns matching
+a particular pattern.  This is by far the most common case.
+
+@findex attr_flag
+@item (attr_flag @var{name})
+The value of an @code{attr_flag} expression is true if the flag
+specified by @var{name} is true for the @code{insn} currently being
+scheduled.
+
+@var{name} is a string specifying one of a fixed set of flags to test.
+Test the flags @code{forward} and @code{backward} to determine the
+direction of a conditional branch.  Test the flags @code{very_likely},
+@code{likely}, @code{very_unlikely}, and @code{unlikely} to determine
+if a conditional branch is expected to be taken.
+
+If the @code{very_likely} flag is true, then the @code{likely} flag is also
+true.  Likewise for the @code{very_unlikely} and @code{unlikely} flags.
+
+This example describes a conditional branch delay slot which
+can be nullified for forward branches that are taken (annul-true) or
+for backward branches which are not taken (annul-false).
+
+@smallexample
+(define_delay (eq_attr "type" "cbranch")
+  [(eq_attr "in_branch_delay" "true")
+   (and (eq_attr "in_branch_delay" "true")
+        (attr_flag "forward"))
+   (and (eq_attr "in_branch_delay" "true")
+        (attr_flag "backward"))])
+@end smallexample
+
+The @code{forward} and @code{backward} flags are false if the current
+@code{insn} being scheduled is not a conditional branch.
+
+The @code{very_likely} and @code{likely} flags are true if the
+@code{insn} being scheduled is not a conditional branch.
+The @code{very_unlikely} and @code{unlikely} flags are false if the
+@code{insn} being scheduled is not a conditional branch.
+
+@code{attr_flag} is only used during delay slot scheduling and has no
+meaning to other passes of the compiler.
+
+@findex attr
+@item (attr @var{name})
+The value of another attribute is returned.  This is most useful
+for numeric attributes, as @code{eq_attr} and @code{attr_flag}
+produce more efficient code for non-numeric attributes.
+@end table
+
+@end ifset
+@ifset INTERNALS
+@node Tagging Insns
+@subsection Assigning Attribute Values to Insns
+@cindex tagging insns
+@cindex assigning attribute values to insns
+
+The value assigned to an attribute of an insn is primarily determined by
+which pattern is matched by that insn (or which @code{define_peephole}
+generated it).  Every @code{define_insn} and @code{define_peephole} can
+have an optional last argument to specify the values of attributes for
+matching insns.  The value of any attribute not specified in a particular
+insn is set to the default value for that attribute, as specified in its
+@code{define_attr}.  Extensive use of default values for attributes
+permits the specification of the values for only one or two attributes
+in the definition of most insn patterns, as seen in the example in the
+next section.
+
+The optional last argument of @code{define_insn} and
+@code{define_peephole} is a vector of expressions, each of which defines
+the value for a single attribute.  The most general way of assigning an
+attribute's value is to use a @code{set} expression whose first operand is an
+@code{attr} expression giving the name of the attribute being set.  The
+second operand of the @code{set} is an attribute expression
+(@pxref{Expressions}) giving the value of the attribute.
+
+When the attribute value depends on the @samp{alternative} attribute
+(i.e., which is the applicable alternative in the constraint of the
+insn), the @code{set_attr_alternative} expression can be used.  It
+allows the specification of a vector of attribute expressions, one for
+each alternative.
+
+@findex set_attr
+When the generality of arbitrary attribute expressions is not required,
+the simpler @code{set_attr} expression can be used, which allows
+specifying a string giving either a single attribute value or a list
+of attribute values, one for each alternative.
+
+The form of each of the above specifications is shown below.  In each case,
+@var{name} is a string specifying the attribute to be set.
+
+@table @code
+@item (set_attr @var{name} @var{value-string})
+@var{value-string} is either a string giving the desired attribute value,
+or a string containing a comma-separated list giving the values for
+succeeding alternatives.  The number of elements must match the number
+of alternatives in the constraint of the insn pattern.
+
+Note that it may be useful to specify @samp{*} for some alternative, in
+which case the attribute will assume its default value for insns matching
+that alternative.
+
+@findex set_attr_alternative
+@item (set_attr_alternative @var{name} [@var{value1} @var{value2} @dots{}])
+Depending on the alternative of the insn, the value will be one of the
+specified values.  This is a shorthand for using a @code{cond} with
+tests on the @samp{alternative} attribute.
+
+@findex attr
+@item (set (attr @var{name}) @var{value})
+The first operand of this @code{set} must be the special RTL expression
+@code{attr}, whose sole operand is a string giving the name of the
+attribute being set.  @var{value} is the value of the attribute.
+@end table
+
+The following shows three different ways of representing the same
+attribute value specification:
+
+@smallexample
+(set_attr "type" "load,store,arith")
+
+(set_attr_alternative "type"
+                      [(const_string "load") (const_string "store")
+                       (const_string "arith")])
+
+(set (attr "type")
+     (cond [(eq_attr "alternative" "1") (const_string "load")
+            (eq_attr "alternative" "2") (const_string "store")]
+           (const_string "arith")))
+@end smallexample
+
+@need 1000
+@findex define_asm_attributes
+The @code{define_asm_attributes} expression provides a mechanism to
+specify the attributes assigned to insns produced from an @code{asm}
+statement.  It has the form:
+
+@smallexample
+(define_asm_attributes [@var{attr-sets}])
+@end smallexample
+
+@noindent
+where @var{attr-sets} is specified the same as for both the
+@code{define_insn} and the @code{define_peephole} expressions.
+
+These values will typically be the ``worst case'' attribute values.  For
+example, they might indicate that the condition code will be clobbered.
+
+A specification for a @code{length} attribute is handled specially.  The
+way to compute the length of an @code{asm} insn is to multiply the
+length specified in the expression @code{define_asm_attributes} by the
+number of machine instructions specified in the @code{asm} statement,
+determined by counting the number of semicolons and newlines in the
+string.  Therefore, the value of the @code{length} attribute specified
+in a @code{define_asm_attributes} should be the maximum possible length
+of a single machine instruction.
+
+@end ifset
+@ifset INTERNALS
+@node Attr Example
+@subsection Example of Attribute Specifications
+@cindex attribute specifications example
+@cindex attribute specifications
+
+The judicious use of defaulting is important in the efficient use of
+insn attributes.  Typically, insns are divided into @dfn{types} and an
+attribute, customarily called @code{type}, is used to represent this
+value.  This attribute is normally used only to define the default value
+for other attributes.  An example will clarify this usage.
+
+Assume we have a RISC machine with a condition code and in which only
+full-word operations are performed in registers.  Let us assume that we
+can divide all insns into loads, stores, (integer) arithmetic
+operations, floating point operations, and branches.
+
+Here we will concern ourselves with determining the effect of an insn on
+the condition code and will limit ourselves to the following possible
+effects:  The condition code can be set unpredictably (clobbered), not
+be changed, be set to agree with the results of the operation, or only
+changed if the item previously set into the condition code has been
+modified.
+
+Here is part of a sample @file{md} file for such a machine:
+
+@smallexample
+(define_attr "type" "load,store,arith,fp,branch" (const_string "arith"))
+
+(define_attr "cc" "clobber,unchanged,set,change0"
+             (cond [(eq_attr "type" "load")
+                        (const_string "change0")
+                    (eq_attr "type" "store,branch")
+                        (const_string "unchanged")
+                    (eq_attr "type" "arith")
+                        (if_then_else (match_operand:SI 0 "" "")
+                                      (const_string "set")
+                                      (const_string "clobber"))]
+                   (const_string "clobber")))
+
+(define_insn ""
+  [(set (match_operand:SI 0 "general_operand" "=r,r,m")
+        (match_operand:SI 1 "general_operand" "r,m,r"))]
+  ""
+  "@@
+   move %0,%1
+   load %0,%1
+   store %0,%1"
+  [(set_attr "type" "arith,load,store")])
+@end smallexample
+
+Note that we assume in the above example that arithmetic operations
+performed on quantities smaller than a machine word clobber the condition
+code since they will set the condition code to a value corresponding to the
+full-word result.
+
+@end ifset
+@ifset INTERNALS
+@node Insn Lengths
+@subsection Computing the Length of an Insn
+@cindex insn lengths, computing
+@cindex computing the length of an insn
+
+For many machines, multiple types of branch instructions are provided, each
+for different length branch displacements.  In most cases, the assembler
+will choose the correct instruction to use.  However, when the assembler
+cannot do so, GCC can when a special attribute, the @code{length}
+attribute, is defined.  This attribute must be defined to have numeric
+values by specifying a null string in its @code{define_attr}.
+
+In the case of the @code{length} attribute, two additional forms of
+arithmetic terms are allowed in test expressions:
+
+@table @code
+@cindex @code{match_dup} and attributes
+@item (match_dup @var{n})
+This refers to the address of operand @var{n} of the current insn, which
+must be a @code{label_ref}.
+
+@cindex @code{pc} and attributes
+@item (pc)
+This refers to the address of the @emph{current} insn.  It might have
+been more consistent with other usage to make this the address of the
+@emph{next} insn but this would be confusing because the length of the
+current insn is to be computed.
+@end table
+
+@cindex @code{addr_vec}, length of
+@cindex @code{addr_diff_vec}, length of
+For normal insns, the length will be determined by value of the
+@code{length} attribute.  In the case of @code{addr_vec} and
+@code{addr_diff_vec} insn patterns, the length is computed as
+the number of vectors multiplied by the size of each vector.
+
+Lengths are measured in addressable storage units (bytes).
+
+The following macros can be used to refine the length computation:
+
+@table @code
+@findex ADJUST_INSN_LENGTH
+@item ADJUST_INSN_LENGTH (@var{insn}, @var{length})
+If defined, modifies the length assigned to instruction @var{insn} as a
+function of the context in which it is used.  @var{length} is an lvalue
+that contains the initially computed length of the insn and should be
+updated with the correct length of the insn.
+
+This macro will normally not be required.  A case in which it is
+required is the ROMP@.  On this machine, the size of an @code{addr_vec}
+insn must be increased by two to compensate for the fact that alignment
+may be required.
+@end table
+
+@findex get_attr_length
+The routine that returns @code{get_attr_length} (the value of the
+@code{length} attribute) can be used by the output routine to
+determine the form of the branch instruction to be written, as the
+example below illustrates.
+
+As an example of the specification of variable-length branches, consider
+the IBM 360.  If we adopt the convention that a register will be set to
+the starting address of a function, we can jump to labels within 4k of
+the start using a four-byte instruction.  Otherwise, we need a six-byte
+sequence to load the address from memory and then branch to it.
+
+On such a machine, a pattern for a branch instruction might be specified
+as follows:
+
+@smallexample
+(define_insn "jump"
+  [(set (pc)
+        (label_ref (match_operand 0 "" "")))]
+  ""
+@{
+   return (get_attr_length (insn) == 4
+           ? "b %l0" : "l r15,=a(%l0); br r15");
+@}
+  [(set (attr "length")
+        (if_then_else (lt (match_dup 0) (const_int 4096))
+                      (const_int 4)
+                      (const_int 6)))])
+@end smallexample
+
+@end ifset
+@ifset INTERNALS
+@node Constant Attributes
+@subsection Constant Attributes
+@cindex constant attributes
+
+A special form of @code{define_attr}, where the expression for the
+default value is a @code{const} expression, indicates an attribute that
+is constant for a given run of the compiler.  Constant attributes may be
+used to specify which variety of processor is used.  For example,
+
+@smallexample
+(define_attr "cpu" "m88100,m88110,m88000"
+ (const
+  (cond [(symbol_ref "TARGET_88100") (const_string "m88100")
+         (symbol_ref "TARGET_88110") (const_string "m88110")]
+        (const_string "m88000"))))
+
+(define_attr "memory" "fast,slow"
+ (const
+  (if_then_else (symbol_ref "TARGET_FAST_MEM")
+                (const_string "fast")
+                (const_string "slow"))))
+@end smallexample
+
+The routine generated for constant attributes has no parameters as it
+does not depend on any particular insn.  RTL expressions used to define
+the value of a constant attribute may use the @code{symbol_ref} form,
+but may not use either the @code{match_operand} form or @code{eq_attr}
+forms involving insn attributes.
+
+@end ifset
+@ifset INTERNALS
+@node Delay Slots
+@subsection Delay Slot Scheduling
+@cindex delay slots, defining
+
+The insn attribute mechanism can be used to specify the requirements for
+delay slots, if any, on a target machine.  An instruction is said to
+require a @dfn{delay slot} if some instructions that are physically
+after the instruction are executed as if they were located before it.
+Classic examples are branch and call instructions, which often execute
+the following instruction before the branch or call is performed.
+
+On some machines, conditional branch instructions can optionally
+@dfn{annul} instructions in the delay slot.  This means that the
+instruction will not be executed for certain branch outcomes.  Both
+instructions that annul if the branch is true and instructions that
+annul if the branch is false are supported.
+
+Delay slot scheduling differs from instruction scheduling in that
+determining whether an instruction needs a delay slot is dependent only
+on the type of instruction being generated, not on data flow between the
+instructions.  See the next section for a discussion of data-dependent
+instruction scheduling.
+
+@findex define_delay
+The requirement of an insn needing one or more delay slots is indicated
+via the @code{define_delay} expression.  It has the following form:
+
+@smallexample
+(define_delay @var{test}
+              [@var{delay-1} @var{annul-true-1} @var{annul-false-1}
+               @var{delay-2} @var{annul-true-2} @var{annul-false-2}
+               @dots{}])
+@end smallexample
+
+@var{test} is an attribute test that indicates whether this
+@code{define_delay} applies to a particular insn.  If so, the number of
+required delay slots is determined by the length of the vector specified
+as the second argument.  An insn placed in delay slot @var{n} must
+satisfy attribute test @var{delay-n}.  @var{annul-true-n} is an
+attribute test that specifies which insns may be annulled if the branch
+is true.  Similarly, @var{annul-false-n} specifies which insns in the
+delay slot may be annulled if the branch is false.  If annulling is not
+supported for that delay slot, @code{(nil)} should be coded.
+
+For example, in the common case where branch and call insns require
+a single delay slot, which may contain any insn other than a branch or
+call, the following would be placed in the @file{md} file:
+
+@smallexample
+(define_delay (eq_attr "type" "branch,call")
+              [(eq_attr "type" "!branch,call") (nil) (nil)])
+@end smallexample
+
+Multiple @code{define_delay} expressions may be specified.  In this
+case, each such expression specifies different delay slot requirements
+and there must be no insn for which tests in two @code{define_delay}
+expressions are both true.
+
+For example, if we have a machine that requires one delay slot for branches
+but two for calls,  no delay slot can contain a branch or call insn,
+and any valid insn in the delay slot for the branch can be annulled if the
+branch is true, we might represent this as follows:
+
+@smallexample
+(define_delay (eq_attr "type" "branch")
+   [(eq_attr "type" "!branch,call")
+    (eq_attr "type" "!branch,call")
+    (nil)])
+
+(define_delay (eq_attr "type" "call")
+              [(eq_attr "type" "!branch,call") (nil) (nil)
+               (eq_attr "type" "!branch,call") (nil) (nil)])
+@end smallexample
+@c the above is *still* too long.  --mew 4feb93
+
+@end ifset
+@ifset INTERNALS
+@node Processor pipeline description
+@subsection Specifying processor pipeline description
+@cindex processor pipeline description
+@cindex processor functional units
+@cindex instruction latency time
+@cindex interlock delays
+@cindex data dependence delays
+@cindex reservation delays
+@cindex pipeline hazard recognizer
+@cindex automaton based pipeline description
+@cindex regular expressions
+@cindex deterministic finite state automaton
+@cindex automaton based scheduler
+@cindex RISC
+@cindex VLIW
+
+To achieve better performance, most modern processors
+(super-pipelined, superscalar @acronym{RISC}, and @acronym{VLIW}
+processors) have many @dfn{functional units} on which several
+instructions can be executed simultaneously.  An instruction starts
+execution if its issue conditions are satisfied.  If not, the
+instruction is stalled until its conditions are satisfied.  Such
+@dfn{interlock (pipeline) delay} causes interruption of the fetching
+of successor instructions (or demands nop instructions, e.g.@: for some
+MIPS processors).
+
+There are two major kinds of interlock delays in modern processors.
+The first one is a data dependence delay determining @dfn{instruction
+latency time}.  The instruction execution is not started until all
+source data have been evaluated by prior instructions (there are more
+complex cases when the instruction execution starts even when the data
+are not available but will be ready in given time after the
+instruction execution start).  Taking the data dependence delays into
+account is simple.  The data dependence (true, output, and
+anti-dependence) delay between two instructions is given by a
+constant.  In most cases this approach is adequate.  The second kind
+of interlock delays is a reservation delay.  The reservation delay
+means that two instructions under execution will be in need of shared
+processors resources, i.e.@: buses, internal registers, and/or
+functional units, which are reserved for some time.  Taking this kind
+of delay into account is complex especially for modern @acronym{RISC}
+processors.
+
+The task of exploiting more processor parallelism is solved by an
+instruction scheduler.  For a better solution to this problem, the
+instruction scheduler has to have an adequate description of the
+processor parallelism (or @dfn{pipeline description}).  GCC
+machine descriptions describe processor parallelism and functional
+unit reservations for groups of instructions with the aid of
+@dfn{regular expressions}.
+
+The GCC instruction scheduler uses a @dfn{pipeline hazard recognizer} to
+figure out the possibility of the instruction issue by the processor
+on a given simulated processor cycle.  The pipeline hazard recognizer is
+automatically generated from the processor pipeline description.  The
+pipeline hazard recognizer generated from the machine description
+is based on a deterministic finite state automaton (@acronym{DFA}):
+the instruction issue is possible if there is a transition from one
+automaton state to another one.  This algorithm is very fast, and
+furthermore, its speed is not dependent on processor
+complexity@footnote{However, the size of the automaton depends on
+processor complexity.  To limit this effect, machine descriptions
+can split orthogonal parts of the machine description among several
+automata: but then, since each of these must be stepped independently,
+this does cause a small decrease in the algorithm's performance.}.
+
+@cindex automaton based pipeline description
+The rest of this section describes the directives that constitute
+an automaton-based processor pipeline description.  The order of
+these constructions within the machine description file is not
+important.
+
+@findex define_automaton
+@cindex pipeline hazard recognizer
+The following optional construction describes names of automata
+generated and used for the pipeline hazards recognition.  Sometimes
+the generated finite state automaton used by the pipeline hazard
+recognizer is large.  If we use more than one automaton and bind functional
+units to the automata, the total size of the automata is usually
+less than the size of the single automaton.  If there is no one such
+construction, only one finite state automaton is generated.
+
+@smallexample
+(define_automaton @var{automata-names})
+@end smallexample
+
+@var{automata-names} is a string giving names of the automata.  The
+names are separated by commas.  All the automata should have unique names.
+The automaton name is used in the constructions @code{define_cpu_unit} and
+@code{define_query_cpu_unit}.
+
+@findex define_cpu_unit
+@cindex processor functional units
+Each processor functional unit used in the description of instruction
+reservations should be described by the following construction.
+
+@smallexample
+(define_cpu_unit @var{unit-names} [@var{automaton-name}])
+@end smallexample
+
+@var{unit-names} is a string giving the names of the functional units
+separated by commas.  Don't use name @samp{nothing}, it is reserved
+for other goals.
+
+@var{automaton-name} is a string giving the name of the automaton with
+which the unit is bound.  The automaton should be described in
+construction @code{define_automaton}.  You should give
+@dfn{automaton-name}, if there is a defined automaton.
+
+The assignment of units to automata are constrained by the uses of the
+units in insn reservations.  The most important constraint is: if a
+unit reservation is present on a particular cycle of an alternative
+for an insn reservation, then some unit from the same automaton must
+be present on the same cycle for the other alternatives of the insn
+reservation.  The rest of the constraints are mentioned in the
+description of the subsequent constructions.
+
+@findex define_query_cpu_unit
+@cindex querying function unit reservations
+The following construction describes CPU functional units analogously
+to @code{define_cpu_unit}.  The reservation of such units can be
+queried for an automaton state.  The instruction scheduler never
+queries reservation of functional units for given automaton state.  So
+as a rule, you don't need this construction.  This construction could
+be used for future code generation goals (e.g.@: to generate
+@acronym{VLIW} insn templates).
+
+@smallexample
+(define_query_cpu_unit @var{unit-names} [@var{automaton-name}])
+@end smallexample
+
+@var{unit-names} is a string giving names of the functional units
+separated by commas.
+
+@var{automaton-name} is a string giving the name of the automaton with
+which the unit is bound.
+
+@findex define_insn_reservation
+@cindex instruction latency time
+@cindex regular expressions
+@cindex data bypass
+The following construction is the major one to describe pipeline
+characteristics of an instruction.
+
+@smallexample
+(define_insn_reservation @var{insn-name} @var{default_latency}
+                         @var{condition} @var{regexp})
+@end smallexample
+
+@var{default_latency} is a number giving latency time of the
+instruction.  There is an important difference between the old
+description and the automaton based pipeline description.  The latency
+time is used for all dependencies when we use the old description.  In
+the automaton based pipeline description, the given latency time is only
+used for true dependencies.  The cost of anti-dependencies is always
+zero and the cost of output dependencies is the difference between
+latency times of the producing and consuming insns (if the difference
+is negative, the cost is considered to be zero).  You can always
+change the default costs for any description by using the target hook
+@code{TARGET_SCHED_ADJUST_COST} (@pxref{Scheduling}).
+
+@var{insn-name} is a string giving the internal name of the insn.  The
+internal names are used in constructions @code{define_bypass} and in
+the automaton description file generated for debugging.  The internal
+name has nothing in common with the names in @code{define_insn}.  It is a
+good practice to use insn classes described in the processor manual.
+
+@var{condition} defines what RTL insns are described by this
+construction.  You should remember that you will be in trouble if
+@var{condition} for two or more different
+@code{define_insn_reservation} constructions is TRUE for an insn.  In
+this case what reservation will be used for the insn is not defined.
+Such cases are not checked during generation of the pipeline hazards
+recognizer because in general recognizing that two conditions may have
+the same value is quite difficult (especially if the conditions
+contain @code{symbol_ref}).  It is also not checked during the
+pipeline hazard recognizer work because it would slow down the
+recognizer considerably.
+
+@var{regexp} is a string describing the reservation of the cpu's functional
+units by the instruction.  The reservations are described by a regular
+expression according to the following syntax:
+
+@smallexample
+       regexp = regexp "," oneof
+              | oneof
+
+       oneof = oneof "|" allof
+             | allof
+
+       allof = allof "+" repeat
+             | repeat
+
+       repeat = element "*" number
+              | element
+
+       element = cpu_function_unit_name
+               | reservation_name
+               | result_name
+               | "nothing"
+               | "(" regexp ")"
+@end smallexample
+
+@itemize @bullet
+@item
+@samp{,} is used for describing the start of the next cycle in
+the reservation.
+
+@item
+@samp{|} is used for describing a reservation described by the first
+regular expression @strong{or} a reservation described by the second
+regular expression @strong{or} etc.
+
+@item
+@samp{+} is used for describing a reservation described by the first
+regular expression @strong{and} a reservation described by the
+second regular expression @strong{and} etc.
+
+@item
+@samp{*} is used for convenience and simply means a sequence in which
+the regular expression are repeated @var{number} times with cycle
+advancing (see @samp{,}).
+
+@item
+@samp{cpu_function_unit_name} denotes reservation of the named
+functional unit.
+
+@item
+@samp{reservation_name} --- see description of construction
+@samp{define_reservation}.
+
+@item
+@samp{nothing} denotes no unit reservations.
+@end itemize
+
+@findex define_reservation
+Sometimes unit reservations for different insns contain common parts.
+In such case, you can simplify the pipeline description by describing
+the common part by the following construction
+
+@smallexample
+(define_reservation @var{reservation-name} @var{regexp})
+@end smallexample
+
+@var{reservation-name} is a string giving name of @var{regexp}.
+Functional unit names and reservation names are in the same name
+space.  So the reservation names should be different from the
+functional unit names and can not be the reserved name @samp{nothing}.
+
+@findex define_bypass
+@cindex instruction latency time
+@cindex data bypass
+The following construction is used to describe exceptions in the
+latency time for given instruction pair.  This is so called bypasses.
+
+@smallexample
+(define_bypass @var{number} @var{out_insn_names} @var{in_insn_names}
+               [@var{guard}])
+@end smallexample
+
+@var{number} defines when the result generated by the instructions
+given in string @var{out_insn_names} will be ready for the
+instructions given in string @var{in_insn_names}.  The instructions in
+the string are separated by commas.
+
+@var{guard} is an optional string giving the name of a C function which
+defines an additional guard for the bypass.  The function will get the
+two insns as parameters.  If the function returns zero the bypass will
+be ignored for this case.  The additional guard is necessary to
+recognize complicated bypasses, e.g.@: when the consumer is only an address
+of insn @samp{store} (not a stored value).
+
+If there are more one bypass with the same output and input insns, the
+chosen bypass is the first bypass with a guard in description whose
+guard function returns nonzero.  If there is no such bypass, then
+bypass without the guard function is chosen.
+
+@findex exclusion_set
+@findex presence_set
+@findex final_presence_set
+@findex absence_set
+@findex final_absence_set
+@cindex VLIW
+@cindex RISC
+The following five constructions are usually used to describe
+@acronym{VLIW} processors, or more precisely, to describe a placement
+of small instructions into @acronym{VLIW} instruction slots.  They
+can be used for @acronym{RISC} processors, too.
+
+@smallexample
+(exclusion_set @var{unit-names} @var{unit-names})
+(presence_set @var{unit-names} @var{patterns})
+(final_presence_set @var{unit-names} @var{patterns})
+(absence_set @var{unit-names} @var{patterns})
+(final_absence_set @var{unit-names} @var{patterns})
+@end smallexample
+
+@var{unit-names} is a string giving names of functional units
+separated by commas.
+
+@var{patterns} is a string giving patterns of functional units
+separated by comma.  Currently pattern is one unit or units
+separated by white-spaces.
+
+The first construction (@samp{exclusion_set}) means that each
+functional unit in the first string can not be reserved simultaneously
+with a unit whose name is in the second string and vice versa.  For
+example, the construction is useful for describing processors
+(e.g.@: some SPARC processors) with a fully pipelined floating point
+functional unit which can execute simultaneously only single floating
+point insns or only double floating point insns.
+
+The second construction (@samp{presence_set}) means that each
+functional unit in the first string can not be reserved unless at
+least one of pattern of units whose names are in the second string is
+reserved.  This is an asymmetric relation.  For example, it is useful
+for description that @acronym{VLIW} @samp{slot1} is reserved after
+@samp{slot0} reservation.  We could describe it by the following
+construction
+
+@smallexample
+(presence_set "slot1" "slot0")
+@end smallexample
+
+Or @samp{slot1} is reserved only after @samp{slot0} and unit @samp{b0}
+reservation.  In this case we could write
+
+@smallexample
+(presence_set "slot1" "slot0 b0")
+@end smallexample
+
+The third construction (@samp{final_presence_set}) is analogous to
+@samp{presence_set}.  The difference between them is when checking is
+done.  When an instruction is issued in given automaton state
+reflecting all current and planned unit reservations, the automaton
+state is changed.  The first state is a source state, the second one
+is a result state.  Checking for @samp{presence_set} is done on the
+source state reservation, checking for @samp{final_presence_set} is
+done on the result reservation.  This construction is useful to
+describe a reservation which is actually two subsequent reservations.
+For example, if we use
+
+@smallexample
+(presence_set "slot1" "slot0")
+@end smallexample
+
+the following insn will be never issued (because @samp{slot1} requires
+@samp{slot0} which is absent in the source state).
+
+@smallexample
+(define_reservation "insn_and_nop" "slot0 + slot1")
+@end smallexample
+
+but it can be issued if we use analogous @samp{final_presence_set}.
+
+The forth construction (@samp{absence_set}) means that each functional
+unit in the first string can be reserved only if each pattern of units
+whose names are in the second string is not reserved.  This is an
+asymmetric relation (actually @samp{exclusion_set} is analogous to
+this one but it is symmetric).  For example it might be useful in a 
+@acronym{VLIW} description to say that @samp{slot0} cannot be reserved
+after either @samp{slot1} or @samp{slot2} have been reserved.  This
+can be described as:
+
+@smallexample
+(absence_set "slot0" "slot1, slot2")
+@end smallexample
+
+Or @samp{slot2} can not be reserved if @samp{slot0} and unit @samp{b0}
+are reserved or @samp{slot1} and unit @samp{b1} are reserved.  In
+this case we could write
+
+@smallexample
+(absence_set "slot2" "slot0 b0, slot1 b1")
+@end smallexample
+
+All functional units mentioned in a set should belong to the same
+automaton.
+
+The last construction (@samp{final_absence_set}) is analogous to
+@samp{absence_set} but checking is done on the result (state)
+reservation.  See comments for @samp{final_presence_set}.
+
+@findex automata_option
+@cindex deterministic finite state automaton
+@cindex nondeterministic finite state automaton
+@cindex finite state automaton minimization
+You can control the generator of the pipeline hazard recognizer with
+the following construction.
+
+@smallexample
+(automata_option @var{options})
+@end smallexample
+
+@var{options} is a string giving options which affect the generated
+code.  Currently there are the following options:
+
+@itemize @bullet
+@item
+@dfn{no-minimization} makes no minimization of the automaton.  This is
+only worth to do when we are debugging the description and need to
+look more accurately at reservations of states.
+
+@item
+@dfn{time} means printing time statistics about the generation of
+automata.
+
+@item
+@dfn{stats} means printing statistics about the generated automata
+such as the number of DFA states, NDFA states and arcs.
+
+@item
+@dfn{v} means a generation of the file describing the result automata.
+The file has suffix @samp{.dfa} and can be used for the description
+verification and debugging.
+
+@item
+@dfn{w} means a generation of warning instead of error for
+non-critical errors.
+
+@item
+@dfn{ndfa} makes nondeterministic finite state automata.  This affects
+the treatment of operator @samp{|} in the regular expressions.  The
+usual treatment of the operator is to try the first alternative and,
+if the reservation is not possible, the second alternative.  The
+nondeterministic treatment means trying all alternatives, some of them
+may be rejected by reservations in the subsequent insns.
+
+@item
+@dfn{progress} means output of a progress bar showing how many states
+were generated so far for automaton being processed.  This is useful
+during debugging a @acronym{DFA} description.  If you see too many
+generated states, you could interrupt the generator of the pipeline
+hazard recognizer and try to figure out a reason for generation of the
+huge automaton.
+@end itemize
+
+As an example, consider a superscalar @acronym{RISC} machine which can
+issue three insns (two integer insns and one floating point insn) on
+the cycle but can finish only two insns.  To describe this, we define
+the following functional units.
+
+@smallexample
+(define_cpu_unit "i0_pipeline, i1_pipeline, f_pipeline")
+(define_cpu_unit "port0, port1")
+@end smallexample
+
+All simple integer insns can be executed in any integer pipeline and
+their result is ready in two cycles.  The simple integer insns are
+issued into the first pipeline unless it is reserved, otherwise they
+are issued into the second pipeline.  Integer division and
+multiplication insns can be executed only in the second integer
+pipeline and their results are ready correspondingly in 8 and 4
+cycles.  The integer division is not pipelined, i.e.@: the subsequent
+integer division insn can not be issued until the current division
+insn finished.  Floating point insns are fully pipelined and their
+results are ready in 3 cycles.  Where the result of a floating point
+insn is used by an integer insn, an additional delay of one cycle is
+incurred.  To describe all of this we could specify
+
+@smallexample
+(define_cpu_unit "div")
+
+(define_insn_reservation "simple" 2 (eq_attr "type" "int")
+                         "(i0_pipeline | i1_pipeline), (port0 | port1)")
+
+(define_insn_reservation "mult" 4 (eq_attr "type" "mult")
+                         "i1_pipeline, nothing*2, (port0 | port1)")
+
+(define_insn_reservation "div" 8 (eq_attr "type" "div")
+                         "i1_pipeline, div*7, div + (port0 | port1)")
+
+(define_insn_reservation "float" 3 (eq_attr "type" "float")
+                         "f_pipeline, nothing, (port0 | port1))
+
+(define_bypass 4 "float" "simple,mult,div")
+@end smallexample
+
+To simplify the description we could describe the following reservation
+
+@smallexample
+(define_reservation "finish" "port0|port1")
+@end smallexample
+
+and use it in all @code{define_insn_reservation} as in the following
+construction
+
+@smallexample
+(define_insn_reservation "simple" 2 (eq_attr "type" "int")
+                         "(i0_pipeline | i1_pipeline), finish")
+@end smallexample
+
+
+@end ifset
+@ifset INTERNALS
+@node Conditional Execution
+@section Conditional Execution
+@cindex conditional execution
+@cindex predication
+
+A number of architectures provide for some form of conditional
+execution, or predication.  The hallmark of this feature is the
+ability to nullify most of the instructions in the instruction set.
+When the instruction set is large and not entirely symmetric, it
+can be quite tedious to describe these forms directly in the
+@file{.md} file.  An alternative is the @code{define_cond_exec} template.
+
+@findex define_cond_exec
+@smallexample
+(define_cond_exec
+  [@var{predicate-pattern}]
+  "@var{condition}"
+  "@var{output-template}")
+@end smallexample
+
+@var{predicate-pattern} is the condition that must be true for the
+insn to be executed at runtime and should match a relational operator.
+One can use @code{match_operator} to match several relational operators
+at once.  Any @code{match_operand} operands must have no more than one
+alternative.
+
+@var{condition} is a C expression that must be true for the generated
+pattern to match.
+
+@findex current_insn_predicate
+@var{output-template} is a string similar to the @code{define_insn}
+output template (@pxref{Output Template}), except that the @samp{*}
+and @samp{@@} special cases do not apply.  This is only useful if the
+assembly text for the predicate is a simple prefix to the main insn.
+In order to handle the general case, there is a global variable
+@code{current_insn_predicate} that will contain the entire predicate
+if the current insn is predicated, and will otherwise be @code{NULL}.
+
+When @code{define_cond_exec} is used, an implicit reference to
+the @code{predicable} instruction attribute is made.
+@xref{Insn Attributes}.  This attribute must be boolean (i.e.@: have
+exactly two elements in its @var{list-of-values}).  Further, it must
+not be used with complex expressions.  That is, the default and all
+uses in the insns must be a simple constant, not dependent on the
+alternative or anything else.
+
+For each @code{define_insn} for which the @code{predicable}
+attribute is true, a new @code{define_insn} pattern will be
+generated that matches a predicated version of the instruction.
+For example,
+
+@smallexample
+(define_insn "addsi"
+  [(set (match_operand:SI 0 "register_operand" "r")
+        (plus:SI (match_operand:SI 1 "register_operand" "r")
+                 (match_operand:SI 2 "register_operand" "r")))]
+  "@var{test1}"
+  "add %2,%1,%0")
+
+(define_cond_exec
+  [(ne (match_operand:CC 0 "register_operand" "c")
+       (const_int 0))]
+  "@var{test2}"
+  "(%0)")
+@end smallexample
+
+@noindent
+generates a new pattern
+
+@smallexample
+(define_insn ""
+  [(cond_exec
+     (ne (match_operand:CC 3 "register_operand" "c") (const_int 0))
+     (set (match_operand:SI 0 "register_operand" "r")
+          (plus:SI (match_operand:SI 1 "register_operand" "r")
+                   (match_operand:SI 2 "register_operand" "r"))))]
+  "(@var{test2}) && (@var{test1})"
+  "(%3) add %2,%1,%0")
+@end smallexample
+
+@end ifset
+@ifset INTERNALS
+@node Constant Definitions
+@section Constant Definitions
+@cindex constant definitions
+@findex define_constants
+
+Using literal constants inside instruction patterns reduces legibility and
+can be a maintenance problem.
+
+To overcome this problem, you may use the @code{define_constants}
+expression.  It contains a vector of name-value pairs.  From that
+point on, wherever any of the names appears in the MD file, it is as
+if the corresponding value had been written instead.  You may use
+@code{define_constants} multiple times; each appearance adds more
+constants to the table.  It is an error to redefine a constant with
+a different value.
+
+To come back to the a29k load multiple example, instead of
+
+@smallexample
+(define_insn ""
+  [(match_parallel 0 "load_multiple_operation"
+     [(set (match_operand:SI 1 "gpc_reg_operand" "=r")
+           (match_operand:SI 2 "memory_operand" "m"))
+      (use (reg:SI 179))
+      (clobber (reg:SI 179))])]
+  ""
+  "loadm 0,0,%1,%2")
+@end smallexample
+
+You could write:
+
+@smallexample
+(define_constants [
+    (R_BP 177)
+    (R_FC 178)
+    (R_CR 179)
+    (R_Q  180)
+])
+
+(define_insn ""
+  [(match_parallel 0 "load_multiple_operation"
+     [(set (match_operand:SI 1 "gpc_reg_operand" "=r")
+           (match_operand:SI 2 "memory_operand" "m"))
+      (use (reg:SI R_CR))
+      (clobber (reg:SI R_CR))])]
+  ""
+  "loadm 0,0,%1,%2")
+@end smallexample
+
+The constants that are defined with a define_constant are also output
+in the insn-codes.h header file as #defines.
+
+@cindex enumerations
+@findex define_c_enum
+You can also use the machine description file to define enumerations.
+Like the constants defined by @code{define_constant}, these enumerations
+are visible to both the machine description file and the main C code.
+
+The syntax is as follows:
+
+@smallexample
+(define_c_enum "@var{name}" [
+  @var{value0}
+  @var{value1}
+  @dots{}
+  @var{valuen}
+])
+@end smallexample
+
+This definition causes the equivalent of the following C code to appear
+in @file{insn-constants.h}:
+
+@smallexample
+enum @var{name} @{
+  @var{value0} = 0,
+  @var{value1} = 1,
+  @dots{}
+  @var{valuen} = @var{n}
+@};
+#define NUM_@var{cname}_VALUES (@var{n} + 1)
+@end smallexample
+
+where @var{cname} is the capitalized form of @var{name}.
+It also makes each @var{valuei} available in the machine description
+file, just as if it had been declared with:
+
+@smallexample
+(define_constants [(@var{valuei} @var{i})])
+@end smallexample
+
+Each @var{valuei} is usually an upper-case identifier and usually
+begins with @var{cname}.
+
+You can split the enumeration definition into as many statements as
+you like.  The above example is directly equivalent to:
+
+@smallexample
+(define_c_enum "@var{name}" [@var{value0}])
+(define_c_enum "@var{name}" [@var{value1}])
+@dots{}
+(define_c_enum "@var{name}" [@var{valuen}])
+@end smallexample
+
+Splitting the enumeration helps to improve the modularity of each
+individual @code{.md} file.  For example, if a port defines its
+synchronization instructions in a separate @file{sync.md} file,
+it is convenient to define all synchronization-specific enumeration
+values in @file{sync.md} rather than in the main @file{.md} file.
+
+Some enumeration names have special significance to GCC:
+
+@table @code
+@item unspecv
+@findex unspec_volatile
+If an enumeration called @code{unspecv} is defined, GCC will use it
+when printing out @code{unspec_volatile} expressions.  For example:
+
+@smallexample
+(define_c_enum "unspecv" [
+  UNSPECV_BLOCKAGE
+])
+@end smallexample
+
+causes GCC to print @samp{(unspec_volatile @dots{} 0)} as:
+
+@smallexample
+(unspec_volatile ... UNSPECV_BLOCKAGE)
+@end smallexample
+
+@item unspec
+@findex unspec
+If an enumeration called @code{unspec} is defined, GCC will use
+it when printing out @code{unspec} expressions.  GCC will also use
+it when printing out @code{unspec_volatile} expressions unless an
+@code{unspecv} enumeration is also defined.  You can therefore
+decide whether to keep separate enumerations for volatile and
+non-volatile expressions or whether to use the same enumeration
+for both.
+@end table
+
+@findex define_enum
+@anchor{define_enum}
+Another way of defining an enumeration is to use @code{define_enum}:
+
+@smallexample
+(define_enum "@var{name}" [
+  @var{value0}
+  @var{value1}
+  @dots{}
+  @var{valuen}
+])
+@end smallexample
+
+This directive implies:
+
+@smallexample
+(define_c_enum "@var{name}" [
+  @var{cname}_@var{cvalue0}
+  @var{cname}_@var{cvalue1}
+  @dots{}
+  @var{cname}_@var{cvaluen}
+])
+@end smallexample
+
+@findex define_enum_attr
+where @var{cvaluei} is the capitalized form of @var{valuei}.
+However, unlike @code{define_c_enum}, the enumerations defined
+by @code{define_enum} can be used in attribute specifications
+(@pxref{define_enum_attr}).
+@end ifset
+@ifset INTERNALS
+@node Iterators
+@section Iterators
+@cindex iterators in @file{.md} files
+
+Ports often need to define similar patterns for more than one machine
+mode or for more than one rtx code.  GCC provides some simple iterator
+facilities to make this process easier.
+
+@menu
+* Mode Iterators::         Generating variations of patterns for different modes.
+* Code Iterators::         Doing the same for codes.
+@end menu
+
+@node Mode Iterators
+@subsection Mode Iterators
+@cindex mode iterators in @file{.md} files
+
+Ports often need to define similar patterns for two or more different modes.
+For example:
+
+@itemize @bullet
+@item
+If a processor has hardware support for both single and double
+floating-point arithmetic, the @code{SFmode} patterns tend to be
+very similar to the @code{DFmode} ones.
+
+@item
+If a port uses @code{SImode} pointers in one configuration and
+@code{DImode} pointers in another, it will usually have very similar
+@code{SImode} and @code{DImode} patterns for manipulating pointers.
+@end itemize
+
+Mode iterators allow several patterns to be instantiated from one
+@file{.md} file template.  They can be used with any type of
+rtx-based construct, such as a @code{define_insn},
+@code{define_split}, or @code{define_peephole2}.
+
+@menu
+* Defining Mode Iterators:: Defining a new mode iterator.
+* Substitutions::           Combining mode iterators with substitutions
+* Examples::                Examples
+@end menu
+
+@node Defining Mode Iterators
+@subsubsection Defining Mode Iterators
+@findex define_mode_iterator
+
+The syntax for defining a mode iterator is:
+
+@smallexample
+(define_mode_iterator @var{name} [(@var{mode1} "@var{cond1}") @dots{} (@var{moden} "@var{condn}")])
+@end smallexample
+
+This allows subsequent @file{.md} file constructs to use the mode suffix
+@code{:@var{name}}.  Every construct that does so will be expanded
+@var{n} times, once with every use of @code{:@var{name}} replaced by
+@code{:@var{mode1}}, once with every use replaced by @code{:@var{mode2}},
+and so on.  In the expansion for a particular @var{modei}, every
+C condition will also require that @var{condi} be true.
+
+For example:
+
+@smallexample
+(define_mode_iterator P [(SI "Pmode == SImode") (DI "Pmode == DImode")])
+@end smallexample
+
+defines a new mode suffix @code{:P}.  Every construct that uses
+@code{:P} will be expanded twice, once with every @code{:P} replaced
+by @code{:SI} and once with every @code{:P} replaced by @code{:DI}.
+The @code{:SI} version will only apply if @code{Pmode == SImode} and
+the @code{:DI} version will only apply if @code{Pmode == DImode}.
+
+As with other @file{.md} conditions, an empty string is treated
+as ``always true''.  @code{(@var{mode} "")} can also be abbreviated
+to @code{@var{mode}}.  For example:
+
+@smallexample
+(define_mode_iterator GPR [SI (DI "TARGET_64BIT")])
+@end smallexample
+
+means that the @code{:DI} expansion only applies if @code{TARGET_64BIT}
+but that the @code{:SI} expansion has no such constraint.
+
+Iterators are applied in the order they are defined.  This can be
+significant if two iterators are used in a construct that requires
+substitutions.  @xref{Substitutions}.
+
+@node Substitutions
+@subsubsection Substitution in Mode Iterators
+@findex define_mode_attr
+
+If an @file{.md} file construct uses mode iterators, each version of the
+construct will often need slightly different strings or modes.  For
+example:
+
+@itemize @bullet
+@item
+When a @code{define_expand} defines several @code{add@var{m}3} patterns
+(@pxref{Standard Names}), each expander will need to use the
+appropriate mode name for @var{m}.
+
+@item
+When a @code{define_insn} defines several instruction patterns,
+each instruction will often use a different assembler mnemonic.
+
+@item
+When a @code{define_insn} requires operands with different modes,
+using an iterator for one of the operand modes usually requires a specific
+mode for the other operand(s).
+@end itemize
+
+GCC supports such variations through a system of ``mode attributes''.
+There are two standard attributes: @code{mode}, which is the name of
+the mode in lower case, and @code{MODE}, which is the same thing in
+upper case.  You can define other attributes using:
+
+@smallexample
+(define_mode_attr @var{name} [(@var{mode1} "@var{value1}") @dots{} (@var{moden} "@var{valuen}")])
+@end smallexample
+
+where @var{name} is the name of the attribute and @var{valuei}
+is the value associated with @var{modei}.
+
+When GCC replaces some @var{:iterator} with @var{:mode}, it will scan
+each string and mode in the pattern for sequences of the form
+@code{<@var{iterator}:@var{attr}>}, where @var{attr} is the name of a
+mode attribute.  If the attribute is defined for @var{mode}, the whole
+@code{<@dots{}>} sequence will be replaced by the appropriate attribute
+value.
+
+For example, suppose an @file{.md} file has:
+
+@smallexample
+(define_mode_iterator P [(SI "Pmode == SImode") (DI "Pmode == DImode")])
+(define_mode_attr load [(SI "lw") (DI "ld")])
+@end smallexample
+
+If one of the patterns that uses @code{:P} contains the string
+@code{"<P:load>\t%0,%1"}, the @code{SI} version of that pattern
+will use @code{"lw\t%0,%1"} and the @code{DI} version will use
+@code{"ld\t%0,%1"}.
+
+Here is an example of using an attribute for a mode:
+
+@smallexample
+(define_mode_iterator LONG [SI DI])
+(define_mode_attr SHORT [(SI "HI") (DI "SI")])
+(define_insn @dots{}
+  (sign_extend:LONG (match_operand:<LONG:SHORT> @dots{})) @dots{})
+@end smallexample
+
+The @code{@var{iterator}:} prefix may be omitted, in which case the
+substitution will be attempted for every iterator expansion.
+
+@node Examples
+@subsubsection Mode Iterator Examples
+
+Here is an example from the MIPS port.  It defines the following
+modes and attributes (among others):
+
+@smallexample
+(define_mode_iterator GPR [SI (DI "TARGET_64BIT")])
+(define_mode_attr d [(SI "") (DI "d")])
+@end smallexample
+
+and uses the following template to define both @code{subsi3}
+and @code{subdi3}:
+
+@smallexample
+(define_insn "sub<mode>3"
+  [(set (match_operand:GPR 0 "register_operand" "=d")
+        (minus:GPR (match_operand:GPR 1 "register_operand" "d")
+                   (match_operand:GPR 2 "register_operand" "d")))]
+  ""
+  "<d>subu\t%0,%1,%2"
+  [(set_attr "type" "arith")
+   (set_attr "mode" "<MODE>")])
+@end smallexample
+
+This is exactly equivalent to:
+
+@smallexample
+(define_insn "subsi3"
+  [(set (match_operand:SI 0 "register_operand" "=d")
+        (minus:SI (match_operand:SI 1 "register_operand" "d")
+                  (match_operand:SI 2 "register_operand" "d")))]
+  ""
+  "subu\t%0,%1,%2"
+  [(set_attr "type" "arith")
+   (set_attr "mode" "SI")])
+
+(define_insn "subdi3"
+  [(set (match_operand:DI 0 "register_operand" "=d")
+        (minus:DI (match_operand:DI 1 "register_operand" "d")
+                  (match_operand:DI 2 "register_operand" "d")))]
+  ""
+  "dsubu\t%0,%1,%2"
+  [(set_attr "type" "arith")
+   (set_attr "mode" "DI")])
+@end smallexample
+
+@node Code Iterators
+@subsection Code Iterators
+@cindex code iterators in @file{.md} files
+@findex define_code_iterator
+@findex define_code_attr
+
+Code iterators operate in a similar way to mode iterators.  @xref{Mode Iterators}.
+
+The construct:
+
+@smallexample
+(define_code_iterator @var{name} [(@var{code1} "@var{cond1}") @dots{} (@var{coden} "@var{condn}")])
+@end smallexample
+
+defines a pseudo rtx code @var{name} that can be instantiated as
+@var{codei} if condition @var{condi} is true.  Each @var{codei}
+must have the same rtx format.  @xref{RTL Classes}.
+
+As with mode iterators, each pattern that uses @var{name} will be
+expanded @var{n} times, once with all uses of @var{name} replaced by
+@var{code1}, once with all uses replaced by @var{code2}, and so on.
+@xref{Defining Mode Iterators}.
+
+It is possible to define attributes for codes as well as for modes.
+There are two standard code attributes: @code{code}, the name of the
+code in lower case, and @code{CODE}, the name of the code in upper case.
+Other attributes are defined using:
+
+@smallexample
+(define_code_attr @var{name} [(@var{code1} "@var{value1}") @dots{} (@var{coden} "@var{valuen}")])
+@end smallexample
+
+Here's an example of code iterators in action, taken from the MIPS port:
+
+@smallexample
+(define_code_iterator any_cond [unordered ordered unlt unge uneq ltgt unle ungt
+                                eq ne gt ge lt le gtu geu ltu leu])
+
+(define_expand "b<code>"
+  [(set (pc)
+        (if_then_else (any_cond:CC (cc0)
+                                   (const_int 0))
+                      (label_ref (match_operand 0 ""))
+                      (pc)))]
+  ""
+@{
+  gen_conditional_branch (operands, <CODE>);
+  DONE;
+@})
+@end smallexample
+
+This is equivalent to:
+
+@smallexample
+(define_expand "bunordered"
+  [(set (pc)
+        (if_then_else (unordered:CC (cc0)
+                                    (const_int 0))
+                      (label_ref (match_operand 0 ""))
+                      (pc)))]
+  ""
+@{
+  gen_conditional_branch (operands, UNORDERED);
+  DONE;
+@})
+
+(define_expand "bordered"
+  [(set (pc)
+        (if_then_else (ordered:CC (cc0)
+                                  (const_int 0))
+                      (label_ref (match_operand 0 ""))
+                      (pc)))]
+  ""
+@{
+  gen_conditional_branch (operands, ORDERED);
+  DONE;
+@})
+
+@dots{}
+@end smallexample
+
+@end ifset
diff --git a/gcc/doc/objc.texi b/gcc/doc/objc.texi
new file mode 100644
index 000000000..5d750386a
--- /dev/null
+++ b/gcc/doc/objc.texi
@@ -0,0 +1,1227 @@
+@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+@c 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2010
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Objective-C
+@comment  node-name,  next,  previous,  up
+
+@chapter GNU Objective-C features
+
+This document is meant to describe some of the GNU Objective-C
+features.  It is not intended to teach you Objective-C.  There are
+several resources on the Internet that present the language.
+
+@menu
+* GNU Objective-C runtime API::
+* Executing code before main::
+* Type encoding::
+* Garbage Collection::
+* Constant string objects::
+* compatibility_alias::
+* Exceptions::
+* Synchronization::
+* Fast enumeration::
+* Messaging with the GNU Objective-C runtime::
+@end menu
+
+@c =========================================================================
+@node GNU Objective-C runtime API
+@section GNU Objective-C runtime API
+
+This section is specific for the GNU Objective-C runtime.  If you are
+using a different runtime, you can skip it.
+
+The GNU Objective-C runtime provides an API that allows you to
+interact with the Objective-C runtime system, querying the live
+runtime structures and even manipulating them.  This allows you for
+example to inspect and navigate classes, methods and protocols; to
+define new classes or new methods, and even to modify existing classes
+or protocols.
+
+If you are using a ``Foundation'' library such as GNUstep-Base, this
+library will provide you with a rich set of functionality to do most
+of the inspection tasks, and you probably will only need direct access
+to the GNU Objective-C runtime API to define new classes or methods.
+
+@menu
+* Modern GNU Objective-C runtime API::
+* Traditional GNU Objective-C runtime API::
+@end menu
+
+@c =========================================================================
+@node Modern GNU Objective-C runtime API
+@subsection Modern GNU Objective-C runtime API
+
+The GNU Objective-C runtime provides an API which is similar to the
+one provided by the ``Objective-C 2.0'' Apple/NeXT Objective-C
+runtime.  The API is documented in the public header files of the GNU
+Objective-C runtime:
+
+@itemize @bullet
+
+@item
+@file{objc/objc.h}: this is the basic Objective-C header file,
+defining the basic Objective-C types such as @code{id}, @code{Class}
+and @code{BOOL}.  You have to include this header to do almost
+anything with Objective-C.
+
+@item
+@file{objc/runtime.h}: this header declares most of the public runtime
+API functions allowing you to inspect and manipulate the Objective-C
+runtime data structures.  These functions are fairly standardized
+across Objective-C runtimes and are almost identical to the Apple/NeXT
+Objective-C runtime ones.  It does not declare functions in some
+specialized areas (constructing and forwarding message invocations,
+threading) which are in the other headers below.  You have to include
+@file{objc/objc.h} and @file{objc/runtime.h} to use any of the
+functions, such as @code{class_getName()}, declared in
+@file{objc/runtime.h}.
+
+@item
+@file{objc/message.h}: this header declares public functions used to
+construct, deconstruct and forward message invocations.  Because
+messaging is done in quite a different way on different runtimes,
+functions in this header are specific to the GNU Objective-C runtime
+implementation.
+
+@item
+@file{objc/objc-exception.h}: this header declares some public
+functions related to Objective-C exceptions.  For example functions in
+this header allow you to throw an Objective-C exception from plain
+C/C++ code.
+
+@item
+@file{objc/objc-sync.h}: this header declares some public functions
+related to the Objective-C @code{@@synchronized()} syntax, allowing
+you to emulate an Objective-C @code{@@synchronized()} block in plain
+C/C++ code.
+
+@item
+@file{objc/thr.h}: this header declares a public runtime API threading
+layer that is only provided by the GNU Objective-C runtime.  It
+declares functions such as @code{objc_mutex_lock()}, which provide a
+platform-independent set of threading functions.
+
+@end itemize
+
+The header files contain detailed documentation for each function in
+the GNU Objective-C runtime API.
+
+@c =========================================================================
+@node Traditional GNU Objective-C runtime API
+@subsection Traditional GNU Objective-C runtime API
+
+The GNU Objective-C runtime used to provide a different API, which we
+call the ``traditional'' GNU Objective-C runtime API.  Functions
+belonging to this API are easy to recognize because they use a
+different naming convention, such as @code{class_get_super_class()}
+(traditional API) instead of @code{class_getSuperclass()} (modern
+API).  Software using this API includes the file
+@file{objc/objc-api.h} where it is declared.
+
+The traditional API is deprecated but it is still supported in this
+release of the runtime; you can access it as usual by including
+@file{objc/objc-api.h}.
+
+If you are using the traditional API you are urged to upgrade your
+software to use the modern API because the traditional API requires
+access to private runtime internals to do anything serious with it;
+for this reason, there is no guarantee that future releases of the GNU
+Objective-C runtime library will be able to provide a fully compatible
+@file{objc/objc-api.h} as the private runtime internals change.  It is
+expected that the next release will hide a number of runtime internals
+making the traditional API nominally supported but fairly useless
+beyond very simple use cases.
+
+Finally, you can not include both @file{objc/objc-api.h} and
+@file{objc/runtime.h} at the same time.  The traditional and modern
+APIs unfortunately have some conflicting declarations (such as the one
+for @code{Method}) and can not be used at the same time.
+
+@c =========================================================================
+@node Executing code before main
+@section @code{+load}: Executing code before main
+
+This section is specific for the GNU Objective-C runtime.  If you are
+using a different runtime, you can skip it.
+
+The GNU Objective-C runtime provides a way that allows you to execute
+code before the execution of the program enters the @code{main}
+function.  The code is executed on a per-class and a per-category basis,
+through a special class method @code{+load}.
+
+This facility is very useful if you want to initialize global variables
+which can be accessed by the program directly, without sending a message
+to the class first.  The usual way to initialize global variables, in the
+@code{+initialize} method, might not be useful because
+@code{+initialize} is only called when the first message is sent to a
+class object, which in some cases could be too late.
+
+Suppose for example you have a @code{FileStream} class that declares
+@code{Stdin}, @code{Stdout} and @code{Stderr} as global variables, like
+below:
+
+@smallexample
+
+FileStream *Stdin = nil;
+FileStream *Stdout = nil;
+FileStream *Stderr = nil;
+
+@@implementation FileStream
+
++ (void)initialize
+@{
+    Stdin = [[FileStream new] initWithFd:0];
+    Stdout = [[FileStream new] initWithFd:1];
+    Stderr = [[FileStream new] initWithFd:2];
+@}
+
+/* @r{Other methods here} */
+@@end
+
+@end smallexample
+
+In this example, the initialization of @code{Stdin}, @code{Stdout} and
+@code{Stderr} in @code{+initialize} occurs too late.  The programmer can
+send a message to one of these objects before the variables are actually
+initialized, thus sending messages to the @code{nil} object.  The
+@code{+initialize} method which actually initializes the global
+variables is not invoked until the first message is sent to the class
+object.  The solution would require these variables to be initialized
+just before entering @code{main}.
+
+The correct solution of the above problem is to use the @code{+load}
+method instead of @code{+initialize}:
+
+@smallexample
+
+@@implementation FileStream
+
++ (void)load
+@{
+    Stdin = [[FileStream new] initWithFd:0];
+    Stdout = [[FileStream new] initWithFd:1];
+    Stderr = [[FileStream new] initWithFd:2];
+@}
+
+/* @r{Other methods here} */
+@@end
+
+@end smallexample
+
+The @code{+load} is a method that is not overridden by categories.  If a
+class and a category of it both implement @code{+load}, both methods are
+invoked.  This allows some additional initializations to be performed in
+a category.
+
+This mechanism is not intended to be a replacement for @code{+initialize}.
+You should be aware of its limitations when you decide to use it
+instead of @code{+initialize}.
+
+@menu
+* What you can and what you cannot do in +load::
+@end menu
+
+
+@node What you can and what you cannot do in +load
+@subsection What you can and what you cannot do in @code{+load}
+
+@code{+load} is to be used only as a last resort.  Because it is
+executed very early, most of the Objective-C runtime machinery will
+not be ready when @code{+load} is executed; hence @code{+load} works
+best for executing C code that is independent on the Objective-C
+runtime.
+
+The @code{+load} implementation in the GNU runtime guarantees you the
+following things:
+
+@itemize @bullet
+
+@item
+you can write whatever C code you like;
+
+@item
+you can allocate and send messages to objects whose class is implemented
+in the same file;
+
+@item
+the @code{+load} implementation of all super classes of a class are
+executed before the @code{+load} of that class is executed;
+
+@item
+the @code{+load} implementation of a class is executed before the
+@code{+load} implementation of any category.
+
+@end itemize
+
+In particular, the following things, even if they can work in a
+particular case, are not guaranteed:
+
+@itemize @bullet
+
+@item
+allocation of or sending messages to arbitrary objects;
+
+@item
+allocation of or sending messages to objects whose classes have a
+category implemented in the same file;
+
+@item
+sending messages to Objective-C constant strings (@code{@@"this is a
+constant string"});
+
+@end itemize
+
+You should make no assumptions about receiving @code{+load} in sibling
+classes when you write @code{+load} of a class.  The order in which
+sibling classes receive @code{+load} is not guaranteed.
+
+The order in which @code{+load} and @code{+initialize} are called could
+be problematic if this matters.  If you don't allocate objects inside
+@code{+load}, it is guaranteed that @code{+load} is called before
+@code{+initialize}.  If you create an object inside @code{+load} the
+@code{+initialize} method of object's class is invoked even if
+@code{+load} was not invoked.  Note if you explicitly call @code{+load}
+on a class, @code{+initialize} will be called first.  To avoid possible
+problems try to implement only one of these methods.
+
+The @code{+load} method is also invoked when a bundle is dynamically
+loaded into your running program.  This happens automatically without any
+intervening operation from you.  When you write bundles and you need to
+write @code{+load} you can safely create and send messages to objects whose
+classes already exist in the running program.  The same restrictions as
+above apply to classes defined in bundle.
+
+
+
+@node Type encoding
+@section Type encoding
+
+This is an advanced section.  Type encodings are used extensively by
+the compiler and by the runtime, but you generally do not need to know
+about them to use Objective-C.
+
+The Objective-C compiler generates type encodings for all the types.
+These type encodings are used at runtime to find out information about
+selectors and methods and about objects and classes.
+
+The types are encoded in the following way:
+
+@c @sp 1
+
+@multitable @columnfractions .25 .75
+@item @code{_Bool}
+@tab @code{B}
+@item @code{char}
+@tab @code{c}
+@item @code{unsigned char}
+@tab @code{C}
+@item @code{short}
+@tab @code{s}
+@item @code{unsigned short}
+@tab @code{S}
+@item @code{int}
+@tab @code{i}
+@item @code{unsigned int}
+@tab @code{I}
+@item @code{long}
+@tab @code{l}
+@item @code{unsigned long}
+@tab @code{L}
+@item @code{long long}
+@tab @code{q}
+@item @code{unsigned long long}
+@tab @code{Q}
+@item @code{float}
+@tab @code{f}
+@item @code{double}
+@tab @code{d}
+@item @code{long double}
+@tab @code{D}
+@item @code{void}
+@tab @code{v}
+@item @code{id}
+@tab @code{@@}
+@item @code{Class}
+@tab @code{#}
+@item @code{SEL}
+@tab @code{:}
+@item @code{char*}
+@tab @code{*}
+@item @code{enum}
+@tab an @code{enum} is encoded exactly as the integer type that the compiler uses for it, which depends on the enumeration
+values.  Often the compiler users @code{unsigned int}, which is then encoded as @code{I}.
+@item unknown type
+@tab @code{?}
+@item Complex types
+@tab @code{j} followed by the inner type.  For example @code{_Complex double} is encoded as "jd".
+@item bit-fields
+@tab @code{b} followed by the starting position of the bit-field, the type of the bit-field and the size of the bit-field (the bit-fields encoding was changed from the NeXT's compiler encoding, see below)
+@end multitable
+
+@c @sp 1
+
+The encoding of bit-fields has changed to allow bit-fields to be
+properly handled by the runtime functions that compute sizes and
+alignments of types that contain bit-fields.  The previous encoding
+contained only the size of the bit-field.  Using only this information
+it is not possible to reliably compute the size occupied by the
+bit-field.  This is very important in the presence of the Boehm's
+garbage collector because the objects are allocated using the typed
+memory facility available in this collector.  The typed memory
+allocation requires information about where the pointers are located
+inside the object.
+
+The position in the bit-field is the position, counting in bits, of the
+bit closest to the beginning of the structure.
+
+The non-atomic types are encoded as follows:
+
+@c @sp 1
+
+@multitable @columnfractions .2 .8
+@item pointers
+@tab @samp{^} followed by the pointed type.
+@item arrays
+@tab @samp{[} followed by the number of elements in the array followed by the type of the elements followed by @samp{]}
+@item structures
+@tab @samp{@{} followed by the name of the structure (or @samp{?} if the structure is unnamed), the @samp{=} sign, the type of the members and by @samp{@}}
+@item unions
+@tab @samp{(} followed by the name of the structure (or @samp{?} if the union is unnamed), the @samp{=} sign, the type of the members followed by @samp{)}
+@item vectors
+@tab @samp{![} followed by the vector_size (the number of bytes composing the vector) followed by a comma, followed by the alignment (in bytes) of the vector, followed by the type of the elements followed by @samp{]}
+@end multitable
+
+Here are some types and their encodings, as they are generated by the
+compiler on an i386 machine:
+
+@sp 1
+
+@multitable @columnfractions .25 .75
+@item Objective-C type
+@tab Compiler encoding
+@item
+@smallexample
+int a[10];
+@end smallexample
+@tab @code{[10i]}
+@item
+@smallexample
+struct @{
+  int i;
+  float f[3];
+  int a:3;
+  int b:2;
+  char c;
+@}
+@end smallexample
+@tab @code{@{?=i[3f]b128i3b131i2c@}}
+@item
+@smallexample
+int a __attribute__ ((vector_size (16)));
+@end smallexample
+@tab @code{![16,16i]} (alignment would depend on the machine)
+@end multitable
+
+@sp 1
+
+In addition to the types the compiler also encodes the type
+specifiers.  The table below describes the encoding of the current
+Objective-C type specifiers:
+
+@sp 1
+
+@multitable @columnfractions .25 .75
+@item Specifier
+@tab Encoding
+@item @code{const}
+@tab @code{r}
+@item @code{in}
+@tab @code{n}
+@item @code{inout}
+@tab @code{N}
+@item @code{out}
+@tab @code{o}
+@item @code{bycopy}
+@tab @code{O}
+@item @code{byref}
+@tab @code{R}
+@item @code{oneway}
+@tab @code{V}
+@end multitable
+
+@sp 1
+
+The type specifiers are encoded just before the type.  Unlike types
+however, the type specifiers are only encoded when they appear in method
+argument types.
+
+Note how @code{const} interacts with pointers:
+
+@sp 1
+
+@multitable @columnfractions .25 .75
+@item Objective-C type
+@tab Compiler encoding
+@item
+@smallexample
+const int
+@end smallexample
+@tab @code{ri}
+@item
+@smallexample
+const int*
+@end smallexample
+@tab @code{^ri}
+@item
+@smallexample
+int *const
+@end smallexample
+@tab @code{r^i}
+@end multitable
+
+@sp 1
+
+@code{const int*} is a pointer to a @code{const int}, and so is
+encoded as @code{^ri}.  @code{int* const}, instead, is a @code{const}
+pointer to an @code{int}, and so is encoded as @code{r^i}.
+
+Finally, there is a complication when encoding @code{const char *}
+versus @code{char * const}.  Because @code{char *} is encoded as
+@code{*} and not as @code{^c}, there is no way to express the fact
+that @code{r} applies to the pointer or to the pointee.
+
+Hence, it is assumed as a convention that @code{r*} means @code{const
+char *} (since it is what is most often meant), and there is no way to
+encode @code{char *const}.  @code{char *const} would simply be encoded
+as @code{*}, and the @code{const} is lost.
+
+@menu
+* Legacy type encoding::
+* @@encode::
+* Method signatures::
+@end menu
+
+@node Legacy type encoding
+@subsection Legacy type encoding
+
+Unfortunately, historically GCC used to have a number of bugs in its
+encoding code.  The NeXT runtime expects GCC to emit type encodings in
+this historical format (compatible with GCC-3.3), so when using the
+NeXT runtime, GCC will introduce on purpose a number of incorrect
+encodings:
+
+@itemize @bullet
+
+@item
+the read-only qualifier of the pointee gets emitted before the '^'.
+The read-only qualifier of the pointer itself gets ignored, unless it
+is a typedef.  Also, the 'r' is only emitted for the outermost type.
+
+@item
+32-bit longs are encoded as 'l' or 'L', but not always.  For typedefs,
+the compiler uses 'i' or 'I' instead if encoding a struct field or a
+pointer.
+
+@item
+@code{enum}s are always encoded as 'i' (int) even if they are actually
+unsigned or long.
+
+@end itemize
+
+In addition to that, the NeXT runtime uses a different encoding for
+bitfields.  It encodes them as @code{b} followed by the size, without
+a bit offset or the underlying field type.
+
+@node @@encode
+@subsection @@encode
+
+GNU Objective-C supports the @code{@@encode} syntax that allows you to
+create a type encoding from a C/Objective-C type.  For example,
+@code{@@encode(int)} is compiled by the compiler into @code{"i"}.
+
+@code{@@encode} does not support type qualifiers other than
+@code{const}.  For example, @code{@@encode(const char*)} is valid and
+is compiled into @code{"r*"}, while @code{@@encode(bycopy char *)} is
+invalid and will cause a compilation error.
+
+@node Method signatures
+@subsection Method signatures
+
+This section documents the encoding of method types, which is rarely
+needed to use Objective-C.  You should skip it at a first reading; the
+runtime provides functions that will work on methods and can walk
+through the list of parameters and interpret them for you.  These
+functions are part of the public ``API'' and are the preferred way to
+interact with method signatures from user code.
+
+But if you need to debug a problem with method signatures and need to
+know how they are implemented (i.e., the ``ABI''), read on.
+
+Methods have their ``signature'' encoded and made available to the
+runtime.  The ``signature'' encodes all the information required to
+dynamically build invocations of the method at runtime: return type
+and arguments.
+
+The ``signature'' is a null-terminated string, composed of the following:
+
+@itemize @bullet
+
+@item
+The return type, including type qualifiers.  For example, a method
+returning @code{int} would have @code{i} here.
+
+@item
+The total size (in bytes) required to pass all the parameters.  This
+includes the two hidden parameters (the object @code{self} and the
+method selector @code{_cmd}).
+
+@item
+Each argument, with the type encoding, followed by the offset (in
+bytes) of the argument in the list of parameters.
+
+@end itemize
+
+For example, a method with no arguments and returning @code{int} would
+have the signature @code{i8@@0:4} if the size of a pointer is 4.  The
+signature is interpreted as follows: the @code{i} is the return type
+(an @code{int}), the @code{8} is the total size of the parameters in
+bytes (two pointers each of size 4), the @code{@@0} is the first
+parameter (an object at byte offset @code{0}) and @code{:4} is the
+second parameter (a @code{SEL} at byte offset @code{4}).
+
+You can easily find more examples by running the ``strings'' program
+on an Objective-C object file compiled by GCC.  You'll see a lot of
+strings that look very much like @code{i8@@0:4}.  They are signatures
+of Objective-C methods.
+
+
+@node Garbage Collection
+@section Garbage Collection
+
+This section is specific for the GNU Objective-C runtime.  If you are
+using a different runtime, you can skip it.
+
+Support for garbage collection with the GNU runtime has been added by
+using a powerful conservative garbage collector, known as the
+Boehm-Demers-Weiser conservative garbage collector.
+
+To enable the support for it you have to configure the compiler using
+an additional argument, @w{@option{--enable-objc-gc}}.  This will
+build the boehm-gc library, and build an additional runtime library
+which has several enhancements to support the garbage collector.  The
+new library has a new name, @file{libobjc_gc.a} to not conflict with
+the non-garbage-collected library.
+
+When the garbage collector is used, the objects are allocated using the
+so-called typed memory allocation mechanism available in the
+Boehm-Demers-Weiser collector.  This mode requires precise information on
+where pointers are located inside objects.  This information is computed
+once per class, immediately after the class has been initialized.
+
+There is a new runtime function @code{class_ivar_set_gcinvisible()}
+which can be used to declare a so-called @dfn{weak pointer}
+reference.  Such a pointer is basically hidden for the garbage collector;
+this can be useful in certain situations, especially when you want to
+keep track of the allocated objects, yet allow them to be
+collected.  This kind of pointers can only be members of objects, you
+cannot declare a global pointer as a weak reference.  Every type which is
+a pointer type can be declared a weak pointer, including @code{id},
+@code{Class} and @code{SEL}.
+
+Here is an example of how to use this feature.  Suppose you want to
+implement a class whose instances hold a weak pointer reference; the
+following class does this:
+
+@smallexample
+
+@@interface WeakPointer : Object
+@{
+    const void* weakPointer;
+@}
+
+- initWithPointer:(const void*)p;
+- (const void*)weakPointer;
+@@end
+
+
+@@implementation WeakPointer
+
++ (void)initialize
+@{
+  class_ivar_set_gcinvisible (self, "weakPointer", YES);
+@}
+
+- initWithPointer:(const void*)p
+@{
+  weakPointer = p;
+  return self;
+@}
+
+- (const void*)weakPointer
+@{
+  return weakPointer;
+@}
+
+@@end
+
+@end smallexample
+
+Weak pointers are supported through a new type character specifier
+represented by the @samp{!} character.  The
+@code{class_ivar_set_gcinvisible()} function adds or removes this
+specifier to the string type description of the instance variable named
+as argument.
+
+@c =========================================================================
+@node Constant string objects
+@section Constant string objects
+
+GNU Objective-C provides constant string objects that are generated
+directly by the compiler.  You declare a constant string object by
+prefixing a C constant string with the character @samp{@@}:
+
+@smallexample
+  id myString = @@"this is a constant string object";
+@end smallexample
+
+The constant string objects are by default instances of the
+@code{NXConstantString} class which is provided by the GNU Objective-C
+runtime.  To get the definition of this class you must include the
+@file{objc/NXConstStr.h} header file.
+
+User defined libraries may want to implement their own constant string
+class.  To be able to support them, the GNU Objective-C compiler provides
+a new command line options @option{-fconstant-string-class=@var{class-name}}.
+The provided class should adhere to a strict structure, the same
+as @code{NXConstantString}'s structure:
+
+@smallexample
+
+@@interface MyConstantStringClass
+@{
+  Class isa;
+  char *c_string;
+  unsigned int len;
+@}
+@@end
+
+@end smallexample
+
+@code{NXConstantString} inherits from @code{Object}; user class
+libraries may choose to inherit the customized constant string class
+from a different class than @code{Object}.  There is no requirement in
+the methods the constant string class has to implement, but the final
+ivar layout of the class must be the compatible with the given
+structure.
+
+When the compiler creates the statically allocated constant string
+object, the @code{c_string} field will be filled by the compiler with
+the string; the @code{length} field will be filled by the compiler with
+the string length; the @code{isa} pointer will be filled with
+@code{NULL} by the compiler, and it will later be fixed up automatically
+at runtime by the GNU Objective-C runtime library to point to the class
+which was set by the @option{-fconstant-string-class} option when the
+object file is loaded (if you wonder how it works behind the scenes, the
+name of the class to use, and the list of static objects to fixup, are
+stored by the compiler in the object file in a place where the GNU
+runtime library will find them at runtime).
+
+As a result, when a file is compiled with the
+@option{-fconstant-string-class} option, all the constant string objects
+will be instances of the class specified as argument to this option.  It
+is possible to have multiple compilation units referring to different
+constant string classes, neither the compiler nor the linker impose any
+restrictions in doing this.
+
+@c =========================================================================
+@node compatibility_alias
+@section compatibility_alias
+
+The keyword @code{@@compatibility_alias} allows you to define a class name
+as equivalent to another class name.  For example:
+
+@smallexample
+@@compatibility_alias WOApplication GSWApplication;
+@end smallexample
+
+tells the compiler that each time it encounters @code{WOApplication} as
+a class name, it should replace it with @code{GSWApplication} (that is,
+@code{WOApplication} is just an alias for @code{GSWApplication}).
+
+There are some constraints on how this can be used---
+
+@itemize @bullet
+
+@item @code{WOApplication} (the alias) must not be an existing class;
+
+@item @code{GSWApplication} (the real class) must be an existing class.
+
+@end itemize
+
+@c =========================================================================
+@node Exceptions
+@section Exceptions
+
+GNU Objective-C provides exception support built into the language, as
+in the following example:
+
+@smallexample
+  @@try @{
+    @dots{}
+       @@throw expr;
+    @dots{}
+  @}
+  @@catch (AnObjCClass *exc) @{
+    @dots{}
+      @@throw expr;
+    @dots{}
+      @@throw;
+    @dots{}
+  @}
+  @@catch (AnotherClass *exc) @{
+    @dots{}
+  @}
+  @@catch (id allOthers) @{
+    @dots{}
+  @}
+  @@finally @{
+    @dots{}
+      @@throw expr;
+    @dots{}
+  @}
+@end smallexample
+
+The @code{@@throw} statement may appear anywhere in an Objective-C or
+Objective-C++ program; when used inside of a @code{@@catch} block, the
+@code{@@throw} may appear without an argument (as shown above), in
+which case the object caught by the @code{@@catch} will be rethrown.
+
+Note that only (pointers to) Objective-C objects may be thrown and
+caught using this scheme.  When an object is thrown, it will be caught
+by the nearest @code{@@catch} clause capable of handling objects of
+that type, analogously to how @code{catch} blocks work in C++ and
+Java.  A @code{@@catch(id @dots{})} clause (as shown above) may also
+be provided to catch any and all Objective-C exceptions not caught by
+previous @code{@@catch} clauses (if any).
+
+The @code{@@finally} clause, if present, will be executed upon exit
+from the immediately preceding @code{@@try @dots{} @@catch} section.
+This will happen regardless of whether any exceptions are thrown,
+caught or rethrown inside the @code{@@try @dots{} @@catch} section,
+analogously to the behavior of the @code{finally} clause in Java.
+
+There are several caveats to using the new exception mechanism:
+
+@itemize @bullet
+@item
+The @option{-fobjc-exceptions} command line option must be used when
+compiling Objective-C files that use exceptions.
+
+@item
+With the GNU runtime, exceptions are always implemented as ``native''
+exceptions and it is recommended that the @option{-fexceptions} and
+@option{-shared-libgcc} options are used when linking.
+
+@item
+With the NeXT runtime, although currently designed to be binary
+compatible with @code{NS_HANDLER}-style idioms provided by the
+@code{NSException} class, the new exceptions can only be used on Mac
+OS X 10.3 (Panther) and later systems, due to additional functionality
+needed in the NeXT Objective-C runtime.
+
+@item
+As mentioned above, the new exceptions do not support handling
+types other than Objective-C objects.   Furthermore, when used from
+Objective-C++, the Objective-C exception model does not interoperate with C++
+exceptions at this time.  This means you cannot @code{@@throw} an exception
+from Objective-C and @code{catch} it in C++, or vice versa
+(i.e., @code{throw @dots{} @@catch}).
+@end itemize
+
+@c =========================================================================
+@node Synchronization
+@section Synchronization
+
+GNU Objective-C provides support for synchronized blocks:
+
+@smallexample
+  @@synchronized (ObjCClass *guard) @{
+    @dots{}
+  @}
+@end smallexample
+
+Upon entering the @code{@@synchronized} block, a thread of execution
+shall first check whether a lock has been placed on the corresponding
+@code{guard} object by another thread.  If it has, the current thread
+shall wait until the other thread relinquishes its lock.  Once
+@code{guard} becomes available, the current thread will place its own
+lock on it, execute the code contained in the @code{@@synchronized}
+block, and finally relinquish the lock (thereby making @code{guard}
+available to other threads).
+
+Unlike Java, Objective-C does not allow for entire methods to be
+marked @code{@@synchronized}.  Note that throwing exceptions out of
+@code{@@synchronized} blocks is allowed, and will cause the guarding
+object to be unlocked properly.
+
+Because of the interactions between synchronization and exception
+handling, you can only use @code{@@synchronized} when compiling with
+exceptions enabled, that is with the command line option
+@option{-fobjc-exceptions}.
+
+
+@c =========================================================================
+@node Fast enumeration
+@section Fast enumeration
+
+@menu
+* Using fast enumeration::
+* c99-like fast enumeration syntax::
+* Fast enumeration details::
+* Fast enumeration protocol::
+@end menu
+
+@c ================================
+@node Using fast enumeration
+@subsection Using fast enumeration
+
+GNU Objective-C provides support for the fast enumeration syntax:
+
+@smallexample
+  id array = @dots{};
+  id object;
+
+  for (object in array)
+  @{
+    /* Do something with 'object' */
+  @}
+@end smallexample
+
+@code{array} needs to be an Objective-C object (usually a collection
+object, for example an array, a dictionary or a set) which implements
+the ``Fast Enumeration Protocol'' (see below).  If you are using a
+Foundation library such as GNUstep Base or Apple Cocoa Foundation, all
+collection objects in the library implement this protocol and can be
+used in this way.
+
+The code above would iterate over all objects in @code{array}.  For
+each of them, it assigns it to @code{object}, then executes the
+@code{Do something with 'object'} statements.
+
+Here is a fully worked-out example using a Foundation library (which
+provides the implementation of @code{NSArray}, @code{NSString} and
+@code{NSLog}):
+
+@smallexample
+  NSArray *array = [NSArray arrayWithObjects: @@"1", @@"2", @@"3", nil];
+  NSString *object;
+
+  for (object in array)
+    NSLog (@@"Iterating over %@@", object);
+@end smallexample
+
+
+@c ================================
+@node c99-like fast enumeration syntax
+@subsection c99-like fast enumeration syntax
+
+A c99-like declaration syntax is also allowed:
+
+@smallexample
+  id array = @dots{};
+
+  for (id object in array)
+  @{
+    /* Do something with 'object'  */
+  @}
+@end smallexample
+
+this is completely equivalent to:
+
+@smallexample
+  id array = @dots{};
+
+  @{
+    id object;
+    for (object in array)
+    @{
+      /* Do something with 'object'  */
+    @}
+  @}
+@end smallexample
+
+but can save some typing.
+
+Note that the option @option{-std=c99} is not required to allow this
+syntax in Objective-C.
+
+@c ================================
+@node Fast enumeration details
+@subsection Fast enumeration details
+
+Here is a more technical description with the gory details.  Consider the code
+
+@smallexample
+  for (@var{object expression} in @var{collection expression})
+  @{
+    @var{statements}
+  @}
+@end smallexample
+
+here is what happens when you run it:
+
+@itemize @bullet
+@item
+@code{@var{collection expression}} is evaluated exactly once and the
+result is used as the collection object to iterate over.  This means
+it is safe to write code such as @code{for (object in [NSDictionary
+keyEnumerator]) @dots{}}.
+
+@item
+the iteration is implemented by the compiler by repeatedly getting
+batches of objects from the collection object using the fast
+enumeration protocol (see below), then iterating over all objects in
+the batch.  This is faster than a normal enumeration where objects are
+retrieved one by one (hence the name ``fast enumeration'').
+
+@item
+if there are no objects in the collection, then
+@code{@var{object expression}} is set to @code{nil} and the loop
+immediately terminates.
+
+@item
+if there are objects in the collection, then for each object in the
+collection (in the order they are returned) @code{@var{object expression}}
+is set to the object, then @code{@var{statements}} are executed.
+
+@item
+@code{@var{statements}} can contain @code{break} and @code{continue}
+commands, which will abort the iteration or skip to the next loop
+iteration as expected.
+
+@item
+when the iteration ends because there are no more objects to iterate
+over, @code{@var{object expression}} is set to @code{nil}.  This allows
+you to determine whether the iteration finished because a @code{break}
+command was used (in which case @code{@var{object expression}} will remain
+set to the last object that was iterated over) or because it iterated
+over all the objects (in which case @code{@var{object expression}} will be
+set to @code{nil}).
+
+@item
+@code{@var{statements}} must not make any changes to the collection
+object; if they do, it is a hard error and the fast enumeration
+terminates by invoking @code{objc_enumerationMutation}, a runtime
+function that normally aborts the program but which can be customized
+by Foundation libraries via @code{objc_set_mutation_handler} to do
+something different, such as raising an exception.
+
+@end itemize
+
+@c ================================
+@node Fast enumeration protocol
+@subsection Fast enumeration protocol
+
+If you want your own collection object to be usable with fast
+enumeration, you need to have it implement the method
+
+@smallexample
+- (unsigned long) countByEnumeratingWithState: (NSFastEnumerationState *)state 
+                                      objects: (id *)objects
+                                        count: (unsigned long)len;
+@end smallexample
+
+where @code{NSFastEnumerationState} must be defined in your code as follows:
+
+@smallexample
+typedef struct
+@{
+  unsigned long state;
+  id            *itemsPtr;
+  unsigned long *mutationsPtr;
+  unsigned long extra[5];
+@} NSFastEnumerationState;
+@end smallexample
+
+If no @code{NSFastEnumerationState} is defined in your code, the
+compiler will automatically replace @code{NSFastEnumerationState *}
+with @code{struct __objcFastEnumerationState *}, where that type is
+silently defined by the compiler in an identical way.  This can be
+confusing and we recommend that you define
+@code{NSFastEnumerationState} (as shown above) instead.
+
+The method is called repeatedly during a fast enumeration to retrieve
+batches of objects.  Each invocation of the method should retrieve the
+next batch of objects.
+
+The return value of the method is the number of objects in the current
+batch; this should not exceed @code{len}, which is the maximum size of
+a batch as requested by the caller.  The batch itself is returned in
+the @code{itemsPtr} field of the @code{NSFastEnumerationState} struct.
+
+To help with returning the objects, the @code{objects} array is a C
+array preallocated by the caller (on the stack) of size @code{len}.
+In many cases you can put the objects you want to return in that
+@code{objects} array, then do @code{itemsPtr = objects}.  But you
+don't have to; if your collection already has the objects to return in
+some form of C array, it could return them from there instead.
+
+The @code{state} and @code{extra} fields of the
+@code{NSFastEnumerationState} structure allows your collection object
+to keep track of the state of the enumeration.  In a simple array
+implementation, @code{state} may keep track of the index of the last
+object that was returned, and @code{extra} may be unused.
+
+The @code{mutationsPtr} field of the @code{NSFastEnumerationState} is
+used to keep track of mutations.  It should point to a number; before
+working on each object, the fast enumeration loop will check that this
+number has not changed.  If it has, a mutation has happened and the
+fast enumeration will abort.  So, @code{mutationsPtr} could be set to
+point to some sort of version number of your collection, which is
+increased by one every time there is a change (for example when an
+object is added or removed).  Or, if you are content with less strict
+mutation checks, it could point to the number of objects in your
+collection or some other value that can be checked to perform an
+approximate check that the collection has not been mutated.
+
+Finally, note how we declared the @code{len} argument and the return
+value to be of type @code{unsigned long}.  They could also be declared
+to be of type @code{unsigned int} and everything would still work.
+
+@c =========================================================================
+@node Messaging with the GNU Objective-C runtime
+@section Messaging with the GNU Objective-C runtime
+
+This section is specific for the GNU Objective-C runtime.  If you are
+using a different runtime, you can skip it.
+
+The implementation of messaging in the GNU Objective-C runtime is
+designed to be portable, and so is based on standard C.
+
+Sending a message in the GNU Objective-C runtime is composed of two
+separate steps.  First, there is a call to the lookup function,
+@code{objc_msg_lookup ()} (or, in the case of messages to super,
+@code{objc_msg_lookup_super ()}).  This runtime function takes as
+argument the receiver and the selector of the method to be called; it
+returns the @code{IMP}, that is a pointer to the function implementing
+the method.  The second step of method invocation consists of casting
+this pointer function to the appropriate function pointer type, and
+calling the function pointed to it with the right arguments.
+
+For example, when the compiler encounters a method invocation such as
+@code{[object init]}, it compiles it into a call to
+@code{objc_msg_lookup (object, @@selector(init))} followed by a cast
+of the returned value to the appropriate function pointer type, and
+then it calls it.
+
+@menu
+* Dynamically registering methods::
+* Forwarding hook::
+@end menu
+
+@c =========================================================================
+@node Dynamically registering methods
+@subsection Dynamically registering methods
+
+If @code{objc_msg_lookup()} does not find a suitable method
+implementation, because the receiver does not implement the required
+method, it tries to see if the class can dynamically register the
+method.
+
+To do so, the runtime checks if the class of the receiver implements
+the method
+
+@smallexample
++ (BOOL) resolveInstanceMethod: (SEL)selector;
+@end smallexample
+
+in the case of an instance method, or 
+
+@smallexample
++ (BOOL) resolveClassMethod: (SEL)selector;
+@end smallexample
+
+in the case of a class method.  If the class implements it, the
+runtime invokes it, passing as argument the selector of the original
+method, and if it returns @code{YES}, the runtime tries the lookup
+again, which could now succeed if a matching method was added
+dynamically by @code{+resolveInstanceMethod:} or
+@code{+resolveClassMethod:}.
+
+This allows classes to dynamically register methods (by adding them to
+the class using @code{class_addMethod}) when they are first called.
+To do so, a class should implement @code{+resolveInstanceMethod:} (or,
+depending on the case, @code{+resolveClassMethod:}) and have it
+recognize the selectors of methods that can be registered dynamically
+at runtime, register them, and return @code{YES}.  It should return
+@code{NO} for methods that it does not dynamically registered at
+runtime.
+
+If @code{+resolveInstanceMethod:} (or @code{+resolveClassMethod:}) is
+not implemented or returns @code{NO}, the runtime then tries the
+forwarding hook.
+
+Support for @code{+resolveInstanceMethod:} and
+@code{resolveClassMethod:} was added to the GNU Objective-C runtime in
+GCC version 4.6.
+
+@c =========================================================================
+@node Forwarding hook
+@subsection Forwarding hook
+
+The GNU Objective-C runtime provides a hook, called
+@code{__objc_msg_forward2}, which is called by
+@code{objc_msg_lookup()} when it can't find a method implementation in
+the runtime tables and after calling @code{+resolveInstanceMethod:}
+and @code{+resolveClassMethod:} has been attempted and did not succeed
+in dynamically registering the method.
+
+To configure the hook, you set the global variable
+@code{__objc_msg_foward2} to a function with the same argument and
+return types of @code{objc_msg_lookup()}.  When
+@code{objc_msg_lookup()} can not find a method implementation, it
+invokes the hook function you provided to get a method implementation
+to return.  So, in practice @code{__objc_msg_forward2} allows you to
+extend @code{objc_msg_lookup()} by adding some custom code that is
+called to do a further lookup when no standard method implementation
+can be found using the normal lookup.
+
+This hook is generally reserved for ``Foundation'' libraries such as
+GNUstep Base, which use it to implement their high-level method
+forwarding API, typically based around the @code{forwardInvocation:}
+method.  So, unless you are implementing your own ``Foundation''
+library, you should not set this hook.
+
+In a typical forwarding implementation, the @code{__objc_msg_forward2}
+hook function determines the argument and return type of the method
+that is being looked up, and then creates a function that takes these
+arguments and has that return type, and returns it to the caller.
+Creating this function is non-trivial and is typically performed using
+a dedicated library such as @code{libffi}.
+
+The forwarding method implementation thus created is returned by
+@code{objc_msg_lookup()} and is executed as if it was a normal method
+implementation.  When the forwarding method implementation is called,
+it is usually expected to pack all arguments into some sort of object
+(typically, an @code{NSInvocation} in a ``Foundation'' library), and
+hand it over to the programmer (@code{forwardInvocation:}) who is then
+allowed to manipulate the method invocation using a high-level API
+provided by the ``Foundation'' library.  For example, the programmer
+may want to examine the method invocation arguments and name and
+potentially change them before forwarding the method invocation to one
+or more local objects (@code{performInvocation:}) or even to remote
+objects (by using Distributed Objects or some other mechanism).  When
+all this completes, the return value is passed back and must be
+returned correctly to the original caller.
+
+Note that the GNU Objective-C runtime currently provides no support
+for method forwarding or method invocations other than the
+@code{__objc_msg_forward2} hook.
+
+If the forwarding hook does not exist or returns @code{NULL}, the
+runtime currently attempts forwarding using an older, deprecated API,
+and if that fails, it aborts the program.  In future versions of the
+GNU Objective-C runtime, the runtime will immediately abort.
diff --git a/gcc/doc/options.texi b/gcc/doc/options.texi
new file mode 100644
index 000000000..e39d79e1c
--- /dev/null
+++ b/gcc/doc/options.texi
@@ -0,0 +1,452 @@
+@c Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Options
+@chapter Option specification files
+@cindex option specification files
+@cindex @samp{optc-gen.awk}
+
+Most GCC command-line options are described by special option
+definition files, the names of which conventionally end in
+@code{.opt}.  This chapter describes the format of these files.
+
+@menu
+* Option file format::   The general layout of the files
+* Option properties::    Supported option properties
+@end menu
+
+@node Option file format
+@section Option file format
+
+Option files are a simple list of records in which each field occupies
+its own line and in which the records themselves are separated by
+blank lines.  Comments may appear on their own line anywhere within
+the file and are preceded by semicolons.  Whitespace is allowed before
+the semicolon.
+
+The files can contain the following types of record:
+
+@itemize @bullet
+@item
+A language definition record.  These records have two fields: the
+string @samp{Language} and the name of the language.  Once a language
+has been declared in this way, it can be used as an option property.
+@xref{Option properties}.
+
+@item
+A target specific save record to save additional information. These
+records have two fields: the string @samp{TargetSave}, and a
+declaration type to go in the @code{cl_target_option} structure.
+
+@item
+A variable record to define a variable used to store option
+information.  These records have two fields: the string
+@samp{Variable}, and a declaration of the type and name of the
+variable, optionally with an initializer (but without any trailing
+@samp{;}).  These records may be used for variables used for many
+options where declaring the initializer in a single option definition
+record, or duplicating it in many records, would be inappropriate, or
+for variables set in option handlers rather than referenced by
+@code{Var} properties.
+
+@item
+A variable record to define a variable used to store option
+information.  These records have two fields: the string
+@samp{TargetVariable}, and a declaration of the type and name of the
+variable, optionally with an initializer (but without any trailing
+@samp{;}).  @samp{TargetVariable} is a combination of @samp{Variable}
+and @samp{TargetSave} records in that the variable is defined in the
+@code{gcc_options} structure, but these variables are also stored in
+the @code{cl_target_option} structure.  The variables are saved in the
+target save code and restored in the target restore code.
+
+@item
+A variable record to record any additional files that the
+@file{options.h} file should include.  This is useful to provide
+enumeration or structure definitions needed for target variables.
+These records have two fields: the string @samp{HeaderInclude} and the
+name of the include file.
+
+@item
+A variable record to record any additional files that the
+@file{options.c} file should include.  This is useful to provide
+inline functions needed for target variables and/or @code{#ifdef}
+sequences to properly set up the initialization.  These records have
+two fields: the string @samp{SourceInclude} and the name of the
+include file.
+
+@item
+An enumeration record to define a set of strings that may be used as
+arguments to an option or options.  These records have three fields:
+the string @samp{Enum}, a space-separated list of properties and help
+text used to describe the set of strings in @option{--help} output.
+Properties use the same format as option properties; the following are
+valid:
+@table @code
+@item Name(@var{name})
+This property is required; @var{name} must be a name (suitable for use
+in C identifiers) used to identify the set of strings in @code{Enum}
+option properties.
+
+@item Type(@var{type})
+This property is required; @var{type} is the C type for variables set
+by options using this enumeration together with @code{Var}.
+
+@item UnknownError(@var{message})
+The message @var{message} will be used as an error message if the
+argument is invalid; for enumerations without @code{UnknownError}, a
+generic error message is used.  @var{message} should contain a single
+@samp{%qs} format, which will be used to format the invalid argument.
+@end table
+
+@item
+An enumeration value record to define one of the strings in a set
+given in an @samp{Enum} record.  These records have two fields: the
+string @samp{EnumValue} and a space-separated list of properties.
+Properties use the same format as option properties; the following are
+valid:
+@table @code
+@item Enum(@var{name})
+This property is required; @var{name} says which @samp{Enum} record
+this @samp{EnumValue} record corresponds to.
+
+@item String(@var{string})
+This property is required; @var{string} is the string option argument
+being described by this record.
+
+@item Value(@var{value})
+This property is required; it says what value (representable as
+@code{int}) should be used for the given string.
+
+@item Canonical
+This property is optional.  If present, it says the present string is
+the canonical one among all those with the given value.  Other strings
+yielding that value will be mapped to this one so specs do not need to
+handle them.
+
+@item DriverOnly
+This property is optional.  If present, the present string will only
+be accepted by the driver.  This is used for cases such as
+@option{-march=native} that are processed by the driver so that
+@samp{gcc -v} shows how the options chosen depended on the system on
+which the compiler was run.
+@end table
+
+@item
+An option definition record.  These records have the following fields:
+@enumerate
+@item
+the name of the option, with the leading ``-'' removed
+@item
+a space-separated list of option properties (@pxref{Option properties})
+@item
+the help text to use for @option{--help} (omitted if the second field
+contains the @code{Undocumented} property).
+@end enumerate
+
+By default, all options beginning with ``f'', ``W'' or ``m'' are
+implicitly assumed to take a ``no-'' form.  This form should not be
+listed separately.  If an option beginning with one of these letters
+does not have a ``no-'' form, you can use the @code{RejectNegative}
+property to reject it.
+
+The help text is automatically line-wrapped before being displayed.
+Normally the name of the option is printed on the left-hand side of
+the output and the help text is printed on the right.  However, if the
+help text contains a tab character, the text to the left of the tab is
+used instead of the option's name and the text to the right of the
+tab forms the help text.  This allows you to elaborate on what type
+of argument the option takes.
+
+@item
+A target mask record.  These records have one field of the form
+@samp{Mask(@var{x})}.  The options-processing script will automatically
+allocate a bit in @code{target_flags} (@pxref{Run-time Target}) for
+each mask name @var{x} and set the macro @code{MASK_@var{x}} to the
+appropriate bitmask.  It will also declare a @code{TARGET_@var{x}}
+macro that has the value 1 when bit @code{MASK_@var{x}} is set and
+0 otherwise.
+
+They are primarily intended to declare target masks that are not
+associated with user options, either because these masks represent
+internal switches or because the options are not available on all
+configurations and yet the masks always need to be defined.
+@end itemize
+
+@node Option properties
+@section Option properties
+
+The second field of an option record can specify any of the following
+properties.  When an option takes an argument, it is enclosed in parentheses
+following the option property name.  The parser that handles option files
+is quite simplistic, and will be tricked by any nested parentheses within
+the argument text itself; in this case, the entire option argument can
+be wrapped in curly braces within the parentheses to demarcate it, e.g.:
+
+@smallexample
+Condition(@{defined (USE_CYGWIN_LIBSTDCXX_WRAPPERS)@})
+@end smallexample
+
+@table @code
+@item Common
+The option is available for all languages and targets.
+
+@item Target
+The option is available for all languages but is target-specific.
+
+@item Driver
+The option is handled by the compiler driver using code not shared
+with the compilers proper (@file{cc1} etc.).
+
+@item @var{language}
+The option is available when compiling for the given language.
+
+It is possible to specify several different languages for the same
+option.  Each @var{language} must have been declared by an earlier
+@code{Language} record.  @xref{Option file format}.
+
+@item RejectDriver
+The option is only handled by the compilers proper (@file{cc1} etc.)@:
+and should not be accepted by the driver.
+
+@item RejectNegative
+The option does not have a ``no-'' form.  All options beginning with
+``f'', ``W'' or ``m'' are assumed to have a ``no-'' form unless this
+property is used.
+
+@item Negative(@var{othername})
+The option will turn off another option @var{othername}, which is
+the option name with the leading ``-'' removed.  This chain action will
+propagate through the @code{Negative} property of the option to be
+turned off.
+
+@item Joined
+@itemx Separate
+The option takes a mandatory argument.  @code{Joined} indicates
+that the option and argument can be included in the same @code{argv}
+entry (as with @code{-mflush-func=@var{name}}, for example).
+@code{Separate} indicates that the option and argument can be
+separate @code{argv} entries (as with @code{-o}).  An option is
+allowed to have both of these properties.
+
+@item JoinedOrMissing
+The option takes an optional argument.  If the argument is given,
+it will be part of the same @code{argv} entry as the option itself.
+
+This property cannot be used alongside @code{Joined} or @code{Separate}.
+
+@item MissingArgError(@var{message})
+For an option marked @code{Joined} or @code{Separate}, the message
+@var{message} will be used as an error message if the mandatory
+argument is missing; for options without @code{MissingArgError}, a
+generic error message is used.  @var{message} should contain a single
+@samp{%qs} format, which will be used to format the name of the option
+passed.
+
+@item Args(@var{n})
+For an option marked @code{Separate}, indicate that it takes @var{n}
+arguments.  The default is 1.
+
+@item UInteger
+The option's argument is a non-negative integer.  The option parser
+will check and convert the argument before passing it to the relevant
+option handler.  @code{UInteger} should also be used on options like
+@code{-falign-loops} where both @code{-falign-loops} and
+@code{-falign-loops}=@var{n} are supported to make sure the saved
+options are given a full integer.
+
+@item NoDriverArg
+For an option marked @code{Separate}, the option only takes an
+argument in the compiler proper, not in the driver.  This is for
+compatibility with existing options that are used both directly and
+via @option{-Wp,}; new options should not have this property.
+
+@item Var(@var{var})
+The state of this option should be stored in variable @var{var}
+(actually a macro for @code{global_options.x_@var{var}}).
+The way that the state is stored depends on the type of option:
+
+@itemize @bullet
+@item
+If the option uses the @code{Mask} or @code{InverseMask} properties,
+@var{var} is the integer variable that contains the mask.
+
+@item
+If the option is a normal on/off switch, @var{var} is an integer
+variable that is nonzero when the option is enabled.  The options
+parser will set the variable to 1 when the positive form of the
+option is used and 0 when the ``no-'' form is used.
+
+@item
+If the option takes an argument and has the @code{UInteger} property,
+@var{var} is an integer variable that stores the value of the argument.
+
+@item
+If the option takes an argument and has the @code{Enum} property,
+@var{var} is a variable (type given in the @code{Type} property of the
+@samp{Enum} record whose @code{Name} property has the same argument as
+the @code{Enum} property of this option) that stores the value of the
+argument.
+
+@item
+If the option has the @code{Defer} property, @var{var} is a pointer to
+a @code{VEC(cl_deferred_option,heap)} that stores the option for later
+processing.  (@var{var} is declared with type @code{void *} and needs
+to be cast to @code{VEC(cl_deferred_option,heap)} before use.)
+
+@item
+Otherwise, if the option takes an argument, @var{var} is a pointer to
+the argument string.  The pointer will be null if the argument is optional
+and wasn't given.
+@end itemize
+
+The option-processing script will usually zero-initialize @var{var}.
+You can modify this behavior using @code{Init}.
+
+@item Var(@var{var}, @var{set})
+The option controls an integer variable @var{var} and is active when
+@var{var} equals @var{set}.  The option parser will set @var{var} to
+@var{set} when the positive form of the option is used and @code{!@var{set}}
+when the ``no-'' form is used.
+
+@var{var} is declared in the same way as for the single-argument form
+described above.
+
+@item Init(@var{value})
+The variable specified by the @code{Var} property should be statically
+initialized to @var{value}.  If more than one option using the same
+variable specifies @code{Init}, all must specify the same initializer.
+
+@item Mask(@var{name})
+The option is associated with a bit in the @code{target_flags}
+variable (@pxref{Run-time Target}) and is active when that bit is set.
+You may also specify @code{Var} to select a variable other than
+@code{target_flags}.
+
+The options-processing script will automatically allocate a unique bit
+for the option.  If the option is attached to @samp{target_flags},
+the script will set the macro @code{MASK_@var{name}} to the appropriate
+bitmask.  It will also declare a @code{TARGET_@var{name}} macro that has
+the value 1 when the option is active and 0 otherwise.  If you use @code{Var}
+to attach the option to a different variable, the associated macros are
+called @code{OPTION_MASK_@var{name}} and @code{OPTION_@var{name}} respectively.
+
+You can disable automatic bit allocation using @code{MaskExists}.
+
+@item InverseMask(@var{othername})
+@itemx InverseMask(@var{othername}, @var{thisname})
+The option is the inverse of another option that has the
+@code{Mask(@var{othername})} property.  If @var{thisname} is given,
+the options-processing script will declare a @code{TARGET_@var{thisname}}
+macro that is 1 when the option is active and 0 otherwise.
+
+@item MaskExists
+The mask specified by the @code{Mask} property already exists.
+No @code{MASK} or @code{TARGET} definitions should be added to
+@file{options.h} in response to this option record.
+
+The main purpose of this property is to support synonymous options.
+The first option should use @samp{Mask(@var{name})} and the others
+should use @samp{Mask(@var{name}) MaskExists}.
+
+@item Enum(@var{name})
+The option's argument is a string from the set of strings associated
+with the corresponding @samp{Enum} record.  The string is checked and
+converted to the integer specified in the corresponding
+@samp{EnumValue} record before being passed to option handlers.
+
+@item Defer
+The option should be stored in a vector, specified with @code{Var},
+for later processing.
+
+@item Alias(@var{opt})
+@itemx Alias(@var{opt}, @var{arg})
+@itemx Alias(@var{opt}, @var{posarg}, @var{negarg})
+The option is an alias for @option{-@var{opt}}.  In the first form,
+any argument passed to the alias is considered to be passed to
+@option{-@var{opt}}, and @option{-@var{opt}} is considered to be
+negated if the alias is used in negated form.  In the second form, the
+alias may not be negated or have an argument, and @var{posarg} is
+considered to be passed as an argument to @option{-@var{opt}}.  In the
+third form, the alias may not have an argument, if the alias is used
+in the positive form then @var{posarg} is considered to be passed to
+@option{-@var{opt}}, and if the alias is used in the negative form
+then @var{negarg} is considered to be passed to @option{-@var{opt}}.
+
+Aliases should not specify @code{Var} or @code{Mask} or
+@code{UInteger}.  Aliases should normally specify the same languages
+as the target of the alias; the flags on the target will be used to
+determine any diagnostic for use of an option for the wrong language,
+while those on the alias will be used to identify what command-line
+text is the option and what text is any argument to that option.
+
+When an @code{Alias} definition is used for an option, driver specs do
+not need to handle it and no @samp{OPT_} enumeration value is defined
+for it; only the canonical form of the option will be seen in those
+places.
+
+@item Ignore
+This option is ignored apart from printing any warning specified using
+@code{Warn}.  The option will not be seen by specs and no @samp{OPT_}
+enumeration value is defined for it.
+
+@item SeparateAlias
+For an option marked with @code{Joined}, @code{Separate} and
+@code{Alias}, the option only acts as an alias when passed a separate
+argument; with a joined argument it acts as a normal option, with an
+@samp{OPT_} enumeration value.  This is for compatibility with the
+Java @option{-d} option and should not be used for new options.
+
+@item Warn(@var{message})
+If this option is used, output the warning @var{message}.
+@var{message} is a format string, either taking a single operand with
+a @samp{%qs} format which is the option name, or not taking any
+operands, which is passed to the @samp{warning} function.  If an alias
+is marked @code{Warn}, the target of the alias must not also be marked
+@code{Warn}.
+
+@item Report
+The state of the option should be printed by @option{-fverbose-asm}.
+
+@item Warning
+This is a warning option and should be shown as such in
+@option{--help} output.  This flag does not currently affect anything
+other than @option{--help}.
+
+@item Optimization
+This is an optimization option.  It should be shown as such in
+@option{--help} output, and any associated variable named using
+@code{Var} should be saved and restored when the optimization level is
+changed with @code{optimize} attributes.
+
+@item Undocumented
+The option is deliberately missing documentation and should not
+be included in the @option{--help} output.
+
+@item Condition(@var{cond})
+The option should only be accepted if preprocessor condition
+@var{cond} is true.  Note that any C declarations associated with the
+option will be present even if @var{cond} is false; @var{cond} simply
+controls whether the option is accepted and whether it is printed in
+the @option{--help} output.
+
+@item Save
+Build the @code{cl_target_option} structure to hold a copy of the
+option, add the functions @code{cl_target_option_save} and
+@code{cl_target_option_restore} to save and restore the options.
+
+@item SetByCombined
+The option may also be set by a combined option such as
+@option{-ffast-math}.  This causes the @code{gcc_options} struct to
+have a field @code{frontend_set_@var{name}}, where @code{@var{name}}
+is the name of the field holding the value of this option (without the
+leading @code{x_}).  This gives the front end a way to indicate that
+the value has been set explicitly and should not be changed by the
+combined option.  For example, some front ends use this to prevent
+@option{-ffast-math} and @option{-fno-fast-math} from changing the
+value of @option{-fmath-errno} for languages that do not use
+@code{errno}.
+
+@end table
diff --git a/gcc/doc/passes.texi b/gcc/doc/passes.texi
new file mode 100644
index 000000000..e5ee8c3b1
--- /dev/null
+++ b/gcc/doc/passes.texi
@@ -0,0 +1,940 @@
+@c markers: BUG TODO
+
+@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+@c 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Passes
+@chapter Passes and Files of the Compiler
+@cindex passes and files of the compiler
+@cindex files and passes of the compiler
+@cindex compiler passes and files
+
+This chapter is dedicated to giving an overview of the optimization and
+code generation passes of the compiler.  In the process, it describes
+some of the language front end interface, though this description is no
+where near complete.
+
+@menu
+* Parsing pass::         The language front end turns text into bits.
+* Gimplification pass::  The bits are turned into something we can optimize.
+* Pass manager::         Sequencing the optimization passes.
+* Tree SSA passes::      Optimizations on a high-level representation.
+* RTL passes::           Optimizations on a low-level representation.
+@end menu
+
+@node Parsing pass
+@section Parsing pass
+@cindex GENERIC
+@findex lang_hooks.parse_file
+The language front end is invoked only once, via
+@code{lang_hooks.parse_file}, to parse the entire input.  The language
+front end may use any intermediate language representation deemed
+appropriate.  The C front end uses GENERIC trees (@pxref{GENERIC}), plus
+a double handful of language specific tree codes defined in
+@file{c-common.def}.  The Fortran front end uses a completely different
+private representation.
+
+@cindex GIMPLE
+@cindex gimplification
+@cindex gimplifier
+@cindex language-independent intermediate representation
+@cindex intermediate representation lowering
+@cindex lowering, language-dependent intermediate representation
+At some point the front end must translate the representation used in the
+front end to a representation understood by the language-independent
+portions of the compiler.  Current practice takes one of two forms.
+The C front end manually invokes the gimplifier (@pxref{GIMPLE}) on each function,
+and uses the gimplifier callbacks to convert the language-specific tree
+nodes directly to GIMPLE before passing the function off to be compiled.
+The Fortran front end converts from a private representation to GENERIC,
+which is later lowered to GIMPLE when the function is compiled.  Which
+route to choose probably depends on how well GENERIC (plus extensions)
+can be made to match up with the source language and necessary parsing
+data structures.
+
+BUG: Gimplification must occur before nested function lowering,
+and nested function lowering must be done by the front end before
+passing the data off to cgraph.
+
+TODO: Cgraph should control nested function lowering.  It would
+only be invoked when it is certain that the outer-most function
+is used.
+
+TODO: Cgraph needs a gimplify_function callback.  It should be
+invoked when (1) it is certain that the function is used, (2)
+warning flags specified by the user require some amount of
+compilation in order to honor, (3) the language indicates that
+semantic analysis is not complete until gimplification occurs.
+Hum@dots{} this sounds overly complicated.  Perhaps we should just
+have the front end gimplify always; in most cases it's only one
+function call.
+
+The front end needs to pass all function definitions and top level
+declarations off to the middle-end so that they can be compiled and
+emitted to the object file.  For a simple procedural language, it is
+usually most convenient to do this as each top level declaration or
+definition is seen.  There is also a distinction to be made between
+generating functional code and generating complete debug information.
+The only thing that is absolutely required for functional code is that
+function and data @emph{definitions} be passed to the middle-end.  For
+complete debug information, function, data and type declarations
+should all be passed as well.
+
+@findex rest_of_decl_compilation
+@findex rest_of_type_compilation
+@findex cgraph_finalize_function
+In any case, the front end needs each complete top-level function or
+data declaration, and each data definition should be passed to
+@code{rest_of_decl_compilation}.  Each complete type definition should
+be passed to @code{rest_of_type_compilation}.  Each function definition
+should be passed to @code{cgraph_finalize_function}.
+
+TODO: I know rest_of_compilation currently has all sorts of
+RTL generation semantics.  I plan to move all code generation
+bits (both Tree and RTL) to compile_function.  Should we hide
+cgraph from the front ends and move back to rest_of_compilation
+as the official interface?  Possibly we should rename all three
+interfaces such that the names match in some meaningful way and
+that is more descriptive than "rest_of".
+
+The middle-end will, at its option, emit the function and data
+definitions immediately or queue them for later processing.
+
+@node Gimplification pass
+@section Gimplification pass
+
+@cindex gimplification
+@cindex GIMPLE
+@dfn{Gimplification} is a whimsical term for the process of converting
+the intermediate representation of a function into the GIMPLE language
+(@pxref{GIMPLE}).  The term stuck, and so words like ``gimplification'',
+``gimplify'', ``gimplifier'' and the like are sprinkled throughout this
+section of code.
+
+While a front end may certainly choose to generate GIMPLE directly if
+it chooses, this can be a moderately complex process unless the
+intermediate language used by the front end is already fairly simple.
+Usually it is easier to generate GENERIC trees plus extensions
+and let the language-independent gimplifier do most of the work.
+
+@findex gimplify_function_tree
+@findex gimplify_expr
+@findex lang_hooks.gimplify_expr
+The main entry point to this pass is @code{gimplify_function_tree}
+located in @file{gimplify.c}.  From here we process the entire
+function gimplifying each statement in turn.  The main workhorse
+for this pass is @code{gimplify_expr}.  Approximately everything
+passes through here at least once, and it is from here that we
+invoke the @code{lang_hooks.gimplify_expr} callback.
+
+The callback should examine the expression in question and return
+@code{GS_UNHANDLED} if the expression is not a language specific
+construct that requires attention.  Otherwise it should alter the
+expression in some way to such that forward progress is made toward
+producing valid GIMPLE@.  If the callback is certain that the
+transformation is complete and the expression is valid GIMPLE, it
+should return @code{GS_ALL_DONE}.  Otherwise it should return
+@code{GS_OK}, which will cause the expression to be processed again.
+If the callback encounters an error during the transformation (because
+the front end is relying on the gimplification process to finish
+semantic checks), it should return @code{GS_ERROR}.
+
+@node Pass manager
+@section Pass manager
+
+The pass manager is located in @file{passes.c}, @file{tree-optimize.c}
+and @file{tree-pass.h}.
+Its job is to run all of the individual passes in the correct order,
+and take care of standard bookkeeping that applies to every pass.
+
+The theory of operation is that each pass defines a structure that
+represents everything we need to know about that pass---when it
+should be run, how it should be run, what intermediate language
+form or on-the-side data structures it needs.  We register the pass
+to be run in some particular order, and the pass manager arranges
+for everything to happen in the correct order.
+
+The actuality doesn't completely live up to the theory at present.
+Command-line switches and @code{timevar_id_t} enumerations must still
+be defined elsewhere.  The pass manager validates constraints but does
+not attempt to (re-)generate data structures or lower intermediate
+language form based on the requirements of the next pass.  Nevertheless,
+what is present is useful, and a far sight better than nothing at all.
+
+Each pass should have a unique name.
+Each pass may have its own dump file (for GCC debugging purposes).
+Passes with a name starting with a star do not dump anything.
+Sometimes passes are supposed to share a dump file / option name.
+To still give these unique names, you can use a prefix that is delimited
+by a space from the part that is used for the dump file / option name.
+E.g. When the pass name is "ud dce", the name used for dump file/options
+is "dce".
+
+TODO: describe the global variables set up by the pass manager,
+and a brief description of how a new pass should use it.
+I need to look at what info RTL passes use first@enddots{}
+
+@node Tree SSA passes
+@section Tree SSA passes
+
+The following briefly describes the Tree optimization passes that are
+run after gimplification and what source files they are located in.
+
+@itemize @bullet
+@item Remove useless statements
+
+This pass is an extremely simple sweep across the gimple code in which
+we identify obviously dead code and remove it.  Here we do things like
+simplify @code{if} statements with constant conditions, remove
+exception handling constructs surrounding code that obviously cannot
+throw, remove lexical bindings that contain no variables, and other
+assorted simplistic cleanups.  The idea is to get rid of the obvious
+stuff quickly rather than wait until later when it's more work to get
+rid of it.  This pass is located in @file{tree-cfg.c} and described by
+@code{pass_remove_useless_stmts}.
+
+@item Mudflap declaration registration
+
+If mudflap (@pxref{Optimize Options,,-fmudflap -fmudflapth
+-fmudflapir,gcc,Using the GNU Compiler Collection (GCC)}) is
+enabled, we generate code to register some variable declarations with
+the mudflap runtime.  Specifically, the runtime tracks the lifetimes of
+those variable declarations that have their addresses taken, or whose
+bounds are unknown at compile time (@code{extern}).  This pass generates
+new exception handling constructs (@code{try}/@code{finally}), and so
+must run before those are lowered.  In addition, the pass enqueues
+declarations of static variables whose lifetimes extend to the entire
+program.  The pass is located in @file{tree-mudflap.c} and is described
+by @code{pass_mudflap_1}.
+
+@item OpenMP lowering
+
+If OpenMP generation (@option{-fopenmp}) is enabled, this pass lowers
+OpenMP constructs into GIMPLE.
+
+Lowering of OpenMP constructs involves creating replacement
+expressions for local variables that have been mapped using data
+sharing clauses, exposing the control flow of most synchronization
+directives and adding region markers to facilitate the creation of the
+control flow graph.  The pass is located in @file{omp-low.c} and is
+described by @code{pass_lower_omp}.
+
+@item OpenMP expansion
+
+If OpenMP generation (@option{-fopenmp}) is enabled, this pass expands
+parallel regions into their own functions to be invoked by the thread
+library.  The pass is located in @file{omp-low.c} and is described by
+@code{pass_expand_omp}.
+
+@item Lower control flow
+
+This pass flattens @code{if} statements (@code{COND_EXPR})
+and moves lexical bindings (@code{BIND_EXPR}) out of line.  After
+this pass, all @code{if} statements will have exactly two @code{goto}
+statements in its @code{then} and @code{else} arms.  Lexical binding
+information for each statement will be found in @code{TREE_BLOCK} rather
+than being inferred from its position under a @code{BIND_EXPR}.  This
+pass is found in @file{gimple-low.c} and is described by
+@code{pass_lower_cf}.
+
+@item Lower exception handling control flow
+
+This pass decomposes high-level exception handling constructs
+(@code{TRY_FINALLY_EXPR} and @code{TRY_CATCH_EXPR}) into a form
+that explicitly represents the control flow involved.  After this
+pass, @code{lookup_stmt_eh_region} will return a non-negative
+number for any statement that may have EH control flow semantics;
+examine @code{tree_can_throw_internal} or @code{tree_can_throw_external}
+for exact semantics.  Exact control flow may be extracted from
+@code{foreach_reachable_handler}.  The EH region nesting tree is defined
+in @file{except.h} and built in @file{except.c}.  The lowering pass
+itself is in @file{tree-eh.c} and is described by @code{pass_lower_eh}.
+
+@item Build the control flow graph
+
+This pass decomposes a function into basic blocks and creates all of
+the edges that connect them.  It is located in @file{tree-cfg.c} and
+is described by @code{pass_build_cfg}.
+
+@item Find all referenced variables
+
+This pass walks the entire function and collects an array of all
+variables referenced in the function, @code{referenced_vars}.  The
+index at which a variable is found in the array is used as a UID
+for the variable within this function.  This data is needed by the
+SSA rewriting routines.  The pass is located in @file{tree-dfa.c}
+and is described by @code{pass_referenced_vars}.
+
+@item Enter static single assignment form
+
+This pass rewrites the function such that it is in SSA form.  After
+this pass, all @code{is_gimple_reg} variables will be referenced by
+@code{SSA_NAME}, and all occurrences of other variables will be
+annotated with @code{VDEFS} and @code{VUSES}; PHI nodes will have
+been inserted as necessary for each basic block.  This pass is
+located in @file{tree-ssa.c} and is described by @code{pass_build_ssa}.
+
+@item Warn for uninitialized variables
+
+This pass scans the function for uses of @code{SSA_NAME}s that
+are fed by default definition.  For non-parameter variables, such
+uses are uninitialized.  The pass is run twice, before and after
+optimization (if turned on).  In the first pass we only warn for uses that are
+positively uninitialized; in the second pass we warn for uses that
+are possibly uninitialized.  The pass is located in @file{tree-ssa.c}
+and is defined by @code{pass_early_warn_uninitialized} and
+@code{pass_late_warn_uninitialized}.
+
+@item Dead code elimination
+
+This pass scans the function for statements without side effects whose
+result is unused.  It does not do memory life analysis, so any value
+that is stored in memory is considered used.  The pass is run multiple
+times throughout the optimization process.  It is located in
+@file{tree-ssa-dce.c} and is described by @code{pass_dce}.
+
+@item Dominator optimizations
+
+This pass performs trivial dominator-based copy and constant propagation,
+expression simplification, and jump threading.  It is run multiple times
+throughout the optimization process.  It is located in @file{tree-ssa-dom.c}
+and is described by @code{pass_dominator}.
+
+@item Forward propagation of single-use variables
+
+This pass attempts to remove redundant computation by substituting
+variables that are used once into the expression that uses them and
+seeing if the result can be simplified.  It is located in
+@file{tree-ssa-forwprop.c} and is described by @code{pass_forwprop}.
+
+@item Copy Renaming
+
+This pass attempts to change the name of compiler temporaries involved in
+copy operations such that SSA->normal can coalesce the copy away.  When compiler
+temporaries are copies of user variables, it also renames the compiler
+temporary to the user variable resulting in better use of user symbols.  It is
+located in @file{tree-ssa-copyrename.c} and is described by
+@code{pass_copyrename}.
+
+@item PHI node optimizations
+
+This pass recognizes forms of PHI inputs that can be represented as
+conditional expressions and rewrites them into straight line code.
+It is located in @file{tree-ssa-phiopt.c} and is described by
+@code{pass_phiopt}.
+
+@item May-alias optimization
+
+This pass performs a flow sensitive SSA-based points-to analysis.
+The resulting may-alias, must-alias, and escape analysis information
+is used to promote variables from in-memory addressable objects to
+non-aliased variables that can be renamed into SSA form.  We also
+update the @code{VDEF}/@code{VUSE} memory tags for non-renameable
+aggregates so that we get fewer false kills.  The pass is located
+in @file{tree-ssa-alias.c} and is described by @code{pass_may_alias}.
+
+Interprocedural points-to information is located in
+@file{tree-ssa-structalias.c} and described by @code{pass_ipa_pta}.
+
+@item Profiling
+
+This pass rewrites the function in order to collect runtime block
+and value profiling data.  Such data may be fed back into the compiler
+on a subsequent run so as to allow optimization based on expected
+execution frequencies.  The pass is located in @file{predict.c} and
+is described by @code{pass_profile}.
+
+@item Lower complex arithmetic
+
+This pass rewrites complex arithmetic operations into their component
+scalar arithmetic operations.  The pass is located in @file{tree-complex.c}
+and is described by @code{pass_lower_complex}.
+
+@item Scalar replacement of aggregates
+
+This pass rewrites suitable non-aliased local aggregate variables into
+a set of scalar variables.  The resulting scalar variables are
+rewritten into SSA form, which allows subsequent optimization passes
+to do a significantly better job with them.  The pass is located in
+@file{tree-sra.c} and is described by @code{pass_sra}.
+
+@item Dead store elimination
+
+This pass eliminates stores to memory that are subsequently overwritten
+by another store, without any intervening loads.  The pass is located
+in @file{tree-ssa-dse.c} and is described by @code{pass_dse}.
+
+@item Tail recursion elimination
+
+This pass transforms tail recursion into a loop.  It is located in
+@file{tree-tailcall.c} and is described by @code{pass_tail_recursion}.
+
+@item Forward store motion
+
+This pass sinks stores and assignments down the flowgraph closer to their
+use point.  The pass is located in @file{tree-ssa-sink.c} and is
+described by @code{pass_sink_code}.
+
+@item Partial redundancy elimination
+
+This pass eliminates partially redundant computations, as well as
+performing load motion.  The pass is located in @file{tree-ssa-pre.c}
+and is described by @code{pass_pre}.
+
+Just before partial redundancy elimination, if
+@option{-funsafe-math-optimizations} is on, GCC tries to convert
+divisions to multiplications by the reciprocal.  The pass is located
+in @file{tree-ssa-math-opts.c} and is described by
+@code{pass_cse_reciprocal}.
+
+@item Full redundancy elimination
+
+This is a simpler form of PRE that only eliminates redundancies that
+occur an all paths.  It is located in @file{tree-ssa-pre.c} and
+described by @code{pass_fre}.
+
+@item Loop optimization
+
+The main driver of the pass is placed in @file{tree-ssa-loop.c}
+and described by @code{pass_loop}.
+
+The optimizations performed by this pass are:
+
+Loop invariant motion.  This pass moves only invariants that
+would be hard to handle on RTL level (function calls, operations that expand to
+nontrivial sequences of insns).  With @option{-funswitch-loops} it also moves
+operands of conditions that are invariant out of the loop, so that we can use
+just trivial invariantness analysis in loop unswitching.  The pass also includes
+store motion.  The pass is implemented in @file{tree-ssa-loop-im.c}.
+
+Canonical induction variable creation.  This pass creates a simple counter
+for number of iterations of the loop and replaces the exit condition of the
+loop using it, in case when a complicated analysis is necessary to determine
+the number of iterations.  Later optimizations then may determine the number
+easily.  The pass is implemented in @file{tree-ssa-loop-ivcanon.c}.
+
+Induction variable optimizations.  This pass performs standard induction
+variable optimizations, including strength reduction, induction variable
+merging and induction variable elimination.  The pass is implemented in
+@file{tree-ssa-loop-ivopts.c}.
+
+Loop unswitching.  This pass moves the conditional jumps that are invariant
+out of the loops.  To achieve this, a duplicate of the loop is created for
+each possible outcome of conditional jump(s).  The pass is implemented in
+@file{tree-ssa-loop-unswitch.c}.  This pass should eventually replace the
+RTL level loop unswitching in @file{loop-unswitch.c}, but currently
+the RTL level pass is not completely redundant yet due to deficiencies
+in tree level alias analysis.
+
+The optimizations also use various utility functions contained in
+@file{tree-ssa-loop-manip.c}, @file{cfgloop.c}, @file{cfgloopanal.c} and
+@file{cfgloopmanip.c}.
+
+Vectorization.  This pass transforms loops to operate on vector types
+instead of scalar types.  Data parallelism across loop iterations is exploited
+to group data elements from consecutive iterations into a vector and operate 
+on them in parallel.  Depending on available target support the loop is 
+conceptually unrolled by a factor @code{VF} (vectorization factor), which is
+the number of elements operated upon in parallel in each iteration, and the 
+@code{VF} copies of each scalar operation are fused to form a vector operation.
+Additional loop transformations such as peeling and versioning may take place
+to align the number of iterations, and to align the memory accesses in the 
+loop.
+The pass is implemented in @file{tree-vectorizer.c} (the main driver),
+@file{tree-vect-loop.c} and @file{tree-vect-loop-manip.c} (loop specific parts 
+and general loop utilities), @file{tree-vect-slp} (loop-aware SLP 
+functionality), @file{tree-vect-stmts.c} and @file{tree-vect-data-refs.c}.
+Analysis of data references is in @file{tree-data-ref.c}.
+
+SLP Vectorization.  This pass performs vectorization of straight-line code. The
+pass is implemented in @file{tree-vectorizer.c} (the main driver),
+@file{tree-vect-slp.c}, @file{tree-vect-stmts.c} and 
+@file{tree-vect-data-refs.c}.
+
+Autoparallelization.  This pass splits the loop iteration space to run
+into several threads.  The pass is implemented in @file{tree-parloops.c}.
+
+Graphite is a loop transformation framework based on the polyhedral
+model.  Graphite stands for Gimple Represented as Polyhedra.  The
+internals of this infrastructure are documented in
+@w{@uref{http://gcc.gnu.org/wiki/Graphite}}.  The passes working on
+this representation are implemented in the various @file{graphite-*}
+files.
+
+@item Tree level if-conversion for vectorizer
+
+This pass applies if-conversion to simple loops to help vectorizer.
+We identify if convertible loops, if-convert statements and merge
+basic blocks in one big block.  The idea is to present loop in such
+form so that vectorizer can have one to one mapping between statements
+and available vector operations.  This pass is located in 
+@file{tree-if-conv.c} and is described by @code{pass_if_conversion}.
+
+@item Conditional constant propagation
+
+This pass relaxes a lattice of values in order to identify those
+that must be constant even in the presence of conditional branches.
+The pass is located in @file{tree-ssa-ccp.c} and is described
+by @code{pass_ccp}.
+
+A related pass that works on memory loads and stores, and not just
+register values, is located in @file{tree-ssa-ccp.c} and described by
+@code{pass_store_ccp}.
+
+@item Conditional copy propagation
+
+This is similar to constant propagation but the lattice of values is
+the ``copy-of'' relation.  It eliminates redundant copies from the
+code.  The pass is located in @file{tree-ssa-copy.c} and described by
+@code{pass_copy_prop}.
+
+A related pass that works on memory copies, and not just register
+copies, is located in @file{tree-ssa-copy.c} and described by
+@code{pass_store_copy_prop}.
+
+@item Value range propagation
+
+This transformation is similar to constant propagation but
+instead of propagating single constant values, it propagates
+known value ranges.  The implementation is based on Patterson's
+range propagation algorithm (Accurate Static Branch Prediction by
+Value Range Propagation, J. R. C. Patterson, PLDI '95).  In
+contrast to Patterson's algorithm, this implementation does not
+propagate branch probabilities nor it uses more than a single
+range per SSA name. This means that the current implementation
+cannot be used for branch prediction (though adapting it would
+not be difficult).  The pass is located in @file{tree-vrp.c} and is
+described by @code{pass_vrp}.
+
+@item Folding built-in functions
+
+This pass simplifies built-in functions, as applicable, with constant
+arguments or with inferable string lengths.  It is located in
+@file{tree-ssa-ccp.c} and is described by @code{pass_fold_builtins}.
+
+@item Split critical edges
+
+This pass identifies critical edges and inserts empty basic blocks
+such that the edge is no longer critical.  The pass is located in
+@file{tree-cfg.c} and is described by @code{pass_split_crit_edges}.
+
+@item Control dependence dead code elimination
+
+This pass is a stronger form of dead code elimination that can
+eliminate unnecessary control flow statements.   It is located
+in @file{tree-ssa-dce.c} and is described by @code{pass_cd_dce}.
+
+@item Tail call elimination
+
+This pass identifies function calls that may be rewritten into
+jumps.  No code transformation is actually applied here, but the
+data and control flow problem is solved.  The code transformation
+requires target support, and so is delayed until RTL@.  In the
+meantime @code{CALL_EXPR_TAILCALL} is set indicating the possibility.
+The pass is located in @file{tree-tailcall.c} and is described by
+@code{pass_tail_calls}.  The RTL transformation is handled by
+@code{fixup_tail_calls} in @file{calls.c}.
+
+@item Warn for function return without value
+
+For non-void functions, this pass locates return statements that do
+not specify a value and issues a warning.  Such a statement may have
+been injected by falling off the end of the function.  This pass is
+run last so that we have as much time as possible to prove that the
+statement is not reachable.  It is located in @file{tree-cfg.c} and
+is described by @code{pass_warn_function_return}.
+
+@item Mudflap statement annotation
+
+If mudflap is enabled, we rewrite some memory accesses with code to
+validate that the memory access is correct.  In particular, expressions
+involving pointer dereferences (@code{INDIRECT_REF}, @code{ARRAY_REF},
+etc.) are replaced by code that checks the selected address range
+against the mudflap runtime's database of valid regions.  This check
+includes an inline lookup into a direct-mapped cache, based on
+shift/mask operations of the pointer value, with a fallback function
+call into the runtime.  The pass is located in @file{tree-mudflap.c} and
+is described by @code{pass_mudflap_2}.
+
+@item Leave static single assignment form
+
+This pass rewrites the function such that it is in normal form.  At
+the same time, we eliminate as many single-use temporaries as possible,
+so the intermediate language is no longer GIMPLE, but GENERIC@.  The
+pass is located in @file{tree-outof-ssa.c} and is described by
+@code{pass_del_ssa}.
+
+@item Merge PHI nodes that feed into one another
+
+This is part of the CFG cleanup passes.  It attempts to join PHI nodes
+from a forwarder CFG block into another block with PHI nodes.  The
+pass is located in @file{tree-cfgcleanup.c} and is described by
+@code{pass_merge_phi}.
+
+@item Return value optimization
+
+If a function always returns the same local variable, and that local
+variable is an aggregate type, then the variable is replaced with the
+return value for the function (i.e., the function's DECL_RESULT).  This
+is equivalent to the C++ named return value optimization applied to
+GIMPLE@.  The pass is located in @file{tree-nrv.c} and is described by
+@code{pass_nrv}.
+
+@item Return slot optimization
+
+If a function returns a memory object and is called as @code{var =
+foo()}, this pass tries to change the call so that the address of
+@code{var} is sent to the caller to avoid an extra memory copy.  This
+pass is located in @code{tree-nrv.c} and is described by
+@code{pass_return_slot}.
+
+@item Optimize calls to @code{__builtin_object_size}
+
+This is a propagation pass similar to CCP that tries to remove calls
+to @code{__builtin_object_size} when the size of the object can be
+computed at compile-time.  This pass is located in
+@file{tree-object-size.c} and is described by
+@code{pass_object_sizes}.
+
+@item Loop invariant motion
+
+This pass removes expensive loop-invariant computations out of loops.
+The pass is located in @file{tree-ssa-loop.c} and described by
+@code{pass_lim}.
+
+@item Loop nest optimizations
+
+This is a family of loop transformations that works on loop nests.  It
+includes loop interchange, scaling, skewing and reversal and they are
+all geared to the optimization of data locality in array traversals
+and the removal of dependencies that hamper optimizations such as loop
+parallelization and vectorization.  The pass is located in
+@file{tree-loop-linear.c} and described by
+@code{pass_linear_transform}.
+
+@item Removal of empty loops
+
+This pass removes loops with no code in them.  The pass is located in
+@file{tree-ssa-loop-ivcanon.c} and described by
+@code{pass_empty_loop}.
+
+@item Unrolling of small loops
+
+This pass completely unrolls loops with few iterations.  The pass
+is located in @file{tree-ssa-loop-ivcanon.c} and described by
+@code{pass_complete_unroll}.
+
+@item Predictive commoning
+
+This pass makes the code reuse the computations from the previous
+iterations of the loops, especially loads and stores to memory.
+It does so by storing the values of these computations to a bank
+of temporary variables that are rotated at the end of loop.  To avoid
+the need for this rotation, the loop is then unrolled and the copies
+of the loop body are rewritten to use the appropriate version of
+the temporary variable.  This pass is located in @file{tree-predcom.c}
+and described by @code{pass_predcom}.
+
+@item Array prefetching
+
+This pass issues prefetch instructions for array references inside
+loops.  The pass is located in @file{tree-ssa-loop-prefetch.c} and
+described by @code{pass_loop_prefetch}.
+
+@item Reassociation
+
+This pass rewrites arithmetic expressions to enable optimizations that
+operate on them, like redundancy elimination and vectorization.  The
+pass is located in @file{tree-ssa-reassoc.c} and described by
+@code{pass_reassoc}.
+
+@item Optimization of @code{stdarg} functions
+
+This pass tries to avoid the saving of register arguments into the
+stack on entry to @code{stdarg} functions.  If the function doesn't
+use any @code{va_start} macros, no registers need to be saved.  If
+@code{va_start} macros are used, the @code{va_list} variables don't
+escape the function, it is only necessary to save registers that will
+be used in @code{va_arg} macros.  For instance, if @code{va_arg} is
+only used with integral types in the function, floating point
+registers don't need to be saved.  This pass is located in
+@code{tree-stdarg.c} and described by @code{pass_stdarg}.
+
+@end itemize
+
+@node RTL passes
+@section RTL passes
+
+The following briefly describes the RTL generation and optimization
+passes that are run after the Tree optimization passes.
+
+@itemize @bullet
+@item RTL generation
+
+@c Avoiding overfull is tricky here.
+The source files for RTL generation include
+@file{stmt.c},
+@file{calls.c},
+@file{expr.c},
+@file{explow.c},
+@file{expmed.c},
+@file{function.c},
+@file{optabs.c}
+and @file{emit-rtl.c}.
+Also, the file
+@file{insn-emit.c}, generated from the machine description by the
+program @code{genemit}, is used in this pass.  The header file
+@file{expr.h} is used for communication within this pass.
+
+@findex genflags
+@findex gencodes
+The header files @file{insn-flags.h} and @file{insn-codes.h},
+generated from the machine description by the programs @code{genflags}
+and @code{gencodes}, tell this pass which standard names are available
+for use and which patterns correspond to them.
+
+@item Generation of exception landing pads
+
+This pass generates the glue that handles communication between the
+exception handling library routines and the exception handlers within
+the function.  Entry points in the function that are invoked by the
+exception handling library are called @dfn{landing pads}.  The code
+for this pass is located in @file{except.c}.
+
+@item Control flow graph cleanup
+
+This pass removes unreachable code, simplifies jumps to next, jumps to
+jump, jumps across jumps, etc.  The pass is run multiple times.
+For historical reasons, it is occasionally referred to as the ``jump
+optimization pass''.  The bulk of the code for this pass is in
+@file{cfgcleanup.c}, and there are support routines in @file{cfgrtl.c}
+and @file{jump.c}.
+
+@item Forward propagation of single-def values
+
+This pass attempts to remove redundant computation by substituting
+variables that come from a single definition, and
+seeing if the result can be simplified.  It performs copy propagation
+and addressing mode selection.  The pass is run twice, with values
+being propagated into loops only on the second run.  The code is
+located in @file{fwprop.c}.
+
+@item Common subexpression elimination
+
+This pass removes redundant computation within basic blocks, and
+optimizes addressing modes based on cost.  The pass is run twice.
+The code for this pass is located in @file{cse.c}.
+
+@item Global common subexpression elimination
+
+This pass performs two
+different types of GCSE  depending on whether you are optimizing for
+size or not (LCM based GCSE tends to increase code size for a gain in
+speed, while Morel-Renvoise based GCSE does not).
+When optimizing for size, GCSE is done using Morel-Renvoise Partial
+Redundancy Elimination, with the exception that it does not try to move
+invariants out of loops---that is left to  the loop optimization pass.
+If MR PRE GCSE is done, code hoisting (aka unification) is also done, as
+well as load motion.
+If you are optimizing for speed, LCM (lazy code motion) based GCSE is
+done.  LCM is based on the work of Knoop, Ruthing, and Steffen.  LCM
+based GCSE also does loop invariant code motion.  We also perform load
+and store motion when optimizing for speed.
+Regardless of which type of GCSE is used, the GCSE pass also performs
+global constant and  copy propagation.
+The source file for this pass is @file{gcse.c}, and the LCM routines
+are in @file{lcm.c}.
+
+@item Loop optimization
+
+This pass performs several loop related optimizations.
+The source files @file{cfgloopanal.c} and @file{cfgloopmanip.c} contain
+generic loop analysis and manipulation code.  Initialization and finalization
+of loop structures is handled by @file{loop-init.c}.
+A loop invariant motion pass is implemented in @file{loop-invariant.c}.
+Basic block level optimizations---unrolling, peeling and unswitching loops---
+are implemented in @file{loop-unswitch.c} and @file{loop-unroll.c}.
+Replacing of the exit condition of loops by special machine-dependent
+instructions is handled by @file{loop-doloop.c}.
+
+@item Jump bypassing
+
+This pass is an aggressive form of GCSE that transforms the control
+flow graph of a function by propagating constants into conditional
+branch instructions.  The source file for this pass is @file{gcse.c}.
+
+@item If conversion
+
+This pass attempts to replace conditional branches and surrounding
+assignments with arithmetic, boolean value producing comparison
+instructions, and conditional move instructions.  In the very last
+invocation after reload, it will generate predicated instructions
+when supported by the target.  The code is located in @file{ifcvt.c}.
+
+@item Web construction
+
+This pass splits independent uses of each pseudo-register.  This can
+improve effect of the other transformation, such as CSE or register
+allocation.  The code for this pass is located in @file{web.c}.
+
+@item Instruction combination
+
+This pass attempts to combine groups of two or three instructions that
+are related by data flow into single instructions.  It combines the
+RTL expressions for the instructions by substitution, simplifies the
+result using algebra, and then attempts to match the result against
+the machine description.  The code is located in @file{combine.c}.
+
+@item Register movement
+
+This pass looks for cases where matching constraints would force an
+instruction to need a reload, and this reload would be a
+register-to-register move.  It then attempts to change the registers
+used by the instruction to avoid the move instruction.  The code is
+located in @file{regmove.c}.
+
+@item Mode switching optimization
+
+This pass looks for instructions that require the processor to be in a
+specific ``mode'' and minimizes the number of mode changes required to
+satisfy all users.  What these modes are, and what they apply to are
+completely target-specific.  The code for this pass is located in
+@file{mode-switching.c}.
+
+@cindex modulo scheduling
+@cindex sms, swing, software pipelining
+@item Modulo scheduling
+
+This pass looks at innermost loops and reorders their instructions
+by overlapping different iterations.  Modulo scheduling is performed
+immediately before instruction scheduling.  The code for this pass is
+located in @file{modulo-sched.c}.
+
+@item Instruction scheduling
+
+This pass looks for instructions whose output will not be available by
+the time that it is used in subsequent instructions.  Memory loads and
+floating point instructions often have this behavior on RISC machines.
+It re-orders instructions within a basic block to try to separate the
+definition and use of items that otherwise would cause pipeline
+stalls.  This pass is performed twice, before and after register
+allocation.  The code for this pass is located in @file{haifa-sched.c},
+@file{sched-deps.c}, @file{sched-ebb.c}, @file{sched-rgn.c} and
+@file{sched-vis.c}.
+
+@item Register allocation
+
+These passes make sure that all occurrences of pseudo registers are
+eliminated, either by allocating them to a hard register, replacing
+them by an equivalent expression (e.g.@: a constant) or by placing
+them on the stack.  This is done in several subpasses:
+
+@itemize @bullet
+@item
+Register move optimizations.  This pass makes some simple RTL code
+transformations which improve the subsequent register allocation.  The
+source file is @file{regmove.c}.
+
+@item
+The integrated register allocator (@acronym{IRA}).  It is called
+integrated because coalescing, register live range splitting, and hard
+register preferencing are done on-the-fly during coloring.  It also
+has better integration with the reload pass.  Pseudo-registers spilled
+by the allocator or the reload have still a chance to get
+hard-registers if the reload evicts some pseudo-registers from
+hard-registers.  The allocator helps to choose better pseudos for
+spilling based on their live ranges and to coalesce stack slots
+allocated for the spilled pseudo-registers.  IRA is a regional
+register allocator which is transformed into Chaitin-Briggs allocator
+if there is one region.  By default, IRA chooses regions using
+register pressure but the user can force it to use one region or
+regions corresponding to all loops.
+
+Source files of the allocator are @file{ira.c}, @file{ira-build.c},
+@file{ira-costs.c}, @file{ira-conflicts.c}, @file{ira-color.c},
+@file{ira-emit.c}, @file{ira-lives}, plus header files @file{ira.h}
+and @file{ira-int.h} used for the communication between the allocator
+and the rest of the compiler and between the IRA files.
+
+@cindex reloading
+@item
+Reloading.  This pass renumbers pseudo registers with the hardware
+registers numbers they were allocated.  Pseudo registers that did not
+get hard registers are replaced with stack slots.  Then it finds
+instructions that are invalid because a value has failed to end up in
+a register, or has ended up in a register of the wrong kind.  It fixes
+up these instructions by reloading the problematical values
+temporarily into registers.  Additional instructions are generated to
+do the copying.
+
+The reload pass also optionally eliminates the frame pointer and inserts
+instructions to save and restore call-clobbered registers around calls.
+
+Source files are @file{reload.c} and @file{reload1.c}, plus the header
+@file{reload.h} used for communication between them.
+@end itemize
+
+@item Basic block reordering
+
+This pass implements profile guided code positioning.  If profile
+information is not available, various types of static analysis are
+performed to make the predictions normally coming from the profile
+feedback (IE execution frequency, branch probability, etc).  It is
+implemented in the file @file{bb-reorder.c}, and the various
+prediction routines are in @file{predict.c}.
+
+@item Variable tracking
+
+This pass computes where the variables are stored at each
+position in code and generates notes describing the variable locations
+to RTL code.  The location lists are then generated according to these
+notes to debug information if the debugging information format supports
+location lists.  The code is located in @file{var-tracking.c}.
+
+@item Delayed branch scheduling
+
+This optional pass attempts to find instructions that can go into the
+delay slots of other instructions, usually jumps and calls.  The code
+for this pass is located in @file{reorg.c}.
+
+@item Branch shortening
+
+On many RISC machines, branch instructions have a limited range.
+Thus, longer sequences of instructions must be used for long branches.
+In this pass, the compiler figures out what how far each instruction
+will be from each other instruction, and therefore whether the usual
+instructions, or the longer sequences, must be used for each branch.
+The code for this pass is located in @file{final.c}.
+
+@item Register-to-stack conversion
+
+Conversion from usage of some hard registers to usage of a register
+stack may be done at this point.  Currently, this is supported only
+for the floating-point registers of the Intel 80387 coprocessor.  The
+code for this pass is located in @file{reg-stack.c}.
+
+@item Final
+
+This pass outputs the assembler code for the function.  The source files
+are @file{final.c} plus @file{insn-output.c}; the latter is generated
+automatically from the machine description by the tool @file{genoutput}.
+The header file @file{conditions.h} is used for communication between
+these files.  If mudflap is enabled, the queue of deferred declarations
+and any addressed constants (e.g., string literals) is processed by
+@code{mudflap_finish_file} into a synthetic constructor function
+containing calls into the mudflap runtime.
+
+@item Debugging information output
+
+This is run after final because it must output the stack slot offsets
+for pseudo registers that did not get hard registers.  Source files
+are @file{dbxout.c} for DBX symbol table format, @file{sdbout.c} for
+SDB symbol table format, @file{dwarfout.c} for DWARF symbol table
+format, files @file{dwarf2out.c} and @file{dwarf2asm.c} for DWARF2
+symbol table format, and @file{vmsdbgout.c} for VMS debug symbol table
+format.
+
+@end itemize
diff --git a/gcc/doc/plugins.texi b/gcc/doc/plugins.texi
new file mode 100644
index 000000000..767cee880
--- /dev/null
+++ b/gcc/doc/plugins.texi
@@ -0,0 +1,440 @@
+@c Copyright (c) 2009, 2010 Free Software Foundation, Inc.
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Plugins
+@chapter Plugins
+@cindex Plugins
+
+@section Loading Plugins
+
+Plugins are supported on platforms that support @option{-ldl
+-rdynamic}.  They are loaded by the compiler using @code{dlopen}
+and invoked at pre-determined locations in the compilation
+process.
+
+Plugins are loaded with 
+
+@option{-fplugin=/path/to/@var{name}.so} @option{-fplugin-arg-@var{name}-@var{key1}[=@var{value1}]}
+
+The plugin arguments are parsed by GCC and passed to respective
+plugins as key-value pairs. Multiple plugins can be invoked by
+specifying multiple @option{-fplugin} arguments.
+
+A plugin can be simply given by its short name (no dots or
+slashes). When simply passing @option{-fplugin=@var{name}}, the plugin is
+loaded from the @file{plugin} directory, so @option{-fplugin=@var{name}} is
+the same as @option{-fplugin=`gcc -print-file-name=plugin`/@var{name}.so},
+using backquote shell syntax to query the @file{plugin} directory.
+
+@section Plugin API
+
+Plugins are activated by the compiler at specific events as defined in
+@file{gcc-plugin.h}.  For each event of interest, the plugin should
+call @code{register_callback} specifying the name of the event and
+address of the callback function that will handle that event.
+
+The header @file{gcc-plugin.h} must be the first gcc header to be included.
+
+@subsection Plugin license check
+
+Every plugin should define the global symbol @code{plugin_is_GPL_compatible}
+to assert that it has been licensed under a GPL-compatible license.
+If this symbol does not exist, the compiler will emit a fatal error
+and exit with the error message:
+
+@smallexample
+fatal error: plugin @var{name} is not licensed under a GPL-compatible license
+@var{name}: undefined symbol: plugin_is_GPL_compatible
+compilation terminated
+@end smallexample
+
+The declared type of the symbol should be int, to match a forward declaration
+in @file{gcc-plugin.h} that suppresses C++ mangling.  It does not need to be in
+any allocated section, though.  The compiler merely asserts that
+the symbol exists in the global scope.  Something like this is enough:
+
+@smallexample
+int plugin_is_GPL_compatible;
+@end smallexample
+
+@subsection Plugin initialization
+
+Every plugin should export a function called @code{plugin_init} that
+is called right after the plugin is loaded. This function is
+responsible for registering all the callbacks required by the plugin
+and do any other required initialization.
+
+This function is called from @code{compile_file} right before invoking
+the parser.  The arguments to @code{plugin_init} are:
+
+@itemize @bullet
+@item @code{plugin_info}: Plugin invocation information.
+@item @code{version}: GCC version.
+@end itemize
+
+The @code{plugin_info} struct is defined as follows:
+
+@smallexample
+struct plugin_name_args
+@{
+  char *base_name;              /* Short name of the plugin
+                                   (filename without .so suffix). */
+  const char *full_name;        /* Path to the plugin as specified with
+                                   -fplugin=. */
+  int argc;                     /* Number of arguments specified with
+                                   -fplugin-arg-.... */
+  struct plugin_argument *argv; /* Array of ARGC key-value pairs. */
+  const char *version;          /* Version string provided by plugin. */
+  const char *help;             /* Help string provided by plugin. */
+@}
+@end smallexample
+
+If initialization fails, @code{plugin_init} must return a non-zero
+value.  Otherwise, it should return 0.
+
+The version of the GCC compiler loading the plugin is described by the
+following structure:
+
+@smallexample
+struct plugin_gcc_version
+@{
+  const char *basever;
+  const char *datestamp;
+  const char *devphase;
+  const char *revision;
+  const char *configuration_arguments;
+@};
+@end smallexample
+
+The function @code{plugin_default_version_check} takes two pointers to
+such structure and compare them field by field. It can be used by the
+plugin's @code{plugin_init} function.
+
+The version of GCC used to compile the plugin can be found in the symbol
+@code{gcc_version} defined in the header @file{plugin-version.h}. The
+recommended version check to perform looks like
+
+@smallexample
+#include "plugin-version.h"
+...
+
+int
+plugin_init (struct plugin_name_args *plugin_info,
+             struct plugin_gcc_version *version)
+@{
+  if (!plugin_default_version_check (version, &gcc_version))
+    return 1;
+
+@}
+@end smallexample
+
+but you can also check the individual fields if you want a less strict check.
+
+@subsection Plugin callbacks
+
+Callback functions have the following prototype:
+
+@smallexample
+/* The prototype for a plugin callback function.
+     gcc_data  - event-specific data provided by GCC
+     user_data - plugin-specific data provided by the plug-in.  */
+typedef void (*plugin_callback_func)(void *gcc_data, void *user_data);
+@end smallexample
+
+Callbacks can be invoked at the following pre-determined events:
+
+
+@smallexample
+enum plugin_event
+@{
+  PLUGIN_PASS_MANAGER_SETUP,    /* To hook into pass manager.  */
+  PLUGIN_FINISH_TYPE,           /* After finishing parsing a type.  */
+  PLUGIN_FINISH_UNIT,           /* Useful for summary processing.  */
+  PLUGIN_PRE_GENERICIZE,        /* Allows to see low level AST in C and C++ frontends.  */
+  PLUGIN_FINISH,                /* Called before GCC exits.  */
+  PLUGIN_INFO,                  /* Information about the plugin. */
+  PLUGIN_GGC_START,             /* Called at start of GCC Garbage Collection. */
+  PLUGIN_GGC_MARKING,           /* Extend the GGC marking. */
+  PLUGIN_GGC_END,               /* Called at end of GGC. */
+  PLUGIN_REGISTER_GGC_ROOTS,    /* Register an extra GGC root table. */
+  PLUGIN_REGISTER_GGC_CACHES,   /* Register an extra GGC cache table. */
+  PLUGIN_ATTRIBUTES,            /* Called during attribute registration */
+  PLUGIN_START_UNIT,            /* Called before processing a translation unit.  */
+  PLUGIN_PRAGMAS,               /* Called during pragma registration. */
+  /* Called before first pass from all_passes.  */
+  PLUGIN_ALL_PASSES_START,
+  /* Called after last pass from all_passes.  */
+  PLUGIN_ALL_PASSES_END,
+  /* Called before first ipa pass.  */
+  PLUGIN_ALL_IPA_PASSES_START,
+  /* Called after last ipa pass.  */
+  PLUGIN_ALL_IPA_PASSES_END,
+  /* Allows to override pass gate decision for current_pass.  */
+  PLUGIN_OVERRIDE_GATE,
+  /* Called before executing a pass.  */
+  PLUGIN_PASS_EXECUTION,
+  /* Called before executing subpasses of a GIMPLE_PASS in
+     execute_ipa_pass_list.  */
+  PLUGIN_EARLY_GIMPLE_PASSES_START,
+  /* Called after executing subpasses of a GIMPLE_PASS in
+     execute_ipa_pass_list.  */
+  PLUGIN_EARLY_GIMPLE_PASSES_END,
+  /* Called when a pass is first instantiated.  */
+  PLUGIN_NEW_PASS,
+
+  PLUGIN_EVENT_FIRST_DYNAMIC    /* Dummy event used for indexing callback
+                                   array.  */
+@};
+@end smallexample
+
+In addition, plugins can also look up the enumerator of a named event,
+and / or generate new events dynamically, by calling the function
+@code{get_named_event_id}.
+
+To register a callback, the plugin calls @code{register_callback} with
+the arguments:
+
+@itemize
+@item @code{char *name}: Plugin name.
+@item @code{int event}: The event code.
+@item @code{plugin_callback_func callback}: The function that handles @code{event}.
+@item @code{void *user_data}: Pointer to plugin-specific data.
+@end itemize
+
+For the PLUGIN_PASS_MANAGER_SETUP, PLUGIN_INFO, PLUGIN_REGISTER_GGC_ROOTS
+and PLUGIN_REGISTER_GGC_CACHES pseudo-events the @code{callback} should be
+null, and the @code{user_data} is specific.
+
+When the PLUGIN_PRAGMAS event is triggered (with a null
+pointer as data from GCC), plugins may register their own pragmas
+using functions like @code{c_register_pragma} or
+@code{c_register_pragma_with_expansion}.
+
+@section Interacting with the pass manager
+
+There needs to be a way to add/reorder/remove passes dynamically. This
+is useful for both analysis plugins (plugging in after a certain pass
+such as CFG or an IPA pass) and optimization plugins.
+
+Basic support for inserting new passes or replacing existing passes is
+provided. A plugin registers a new pass with GCC by calling
+@code{register_callback} with the @code{PLUGIN_PASS_MANAGER_SETUP}
+event and a pointer to a @code{struct register_pass_info} object defined as follows
+
+@smallexample
+enum pass_positioning_ops
+@{
+  PASS_POS_INSERT_AFTER,  // Insert after the reference pass.
+  PASS_POS_INSERT_BEFORE, // Insert before the reference pass.
+  PASS_POS_REPLACE        // Replace the reference pass.
+@};
+
+struct register_pass_info
+@{
+  struct opt_pass *pass;            /* New pass provided by the plugin.  */
+  const char *reference_pass_name;  /* Name of the reference pass for hooking
+                                       up the new pass.  */
+  int ref_pass_instance_number;     /* Insert the pass at the specified
+                                       instance number of the reference pass.  */
+                                    /* Do it for every instance if it is 0.  */
+  enum pass_positioning_ops pos_op; /* how to insert the new pass.  */
+@};
+
+
+/* Sample plugin code that registers a new pass.  */
+int
+plugin_init (struct plugin_name_args *plugin_info,
+             struct plugin_gcc_version *version)
+@{
+  struct register_pass_info pass_info;
+
+  ...
+
+  /* Code to fill in the pass_info object with new pass information.  */
+
+  ...
+
+  /* Register the new pass.  */
+  register_callback (plugin_info->base_name, PLUGIN_PASS_MANAGER_SETUP, NULL, &pass_info);
+
+  ...
+@}
+@end smallexample
+
+
+@section Interacting with the GCC Garbage Collector 
+
+Some plugins may want to be informed when GGC (the GCC Garbage
+Collector) is running. They can register callbacks for the
+@code{PLUGIN_GGC_START} and @code{PLUGIN_GGC_END} events (for which
+the callback is called with a null @code{gcc_data}) to be notified of
+the start or end of the GCC garbage collection.
+
+Some plugins may need to have GGC mark additional data. This can be
+done by registering a callback (called with a null @code{gcc_data})
+for the @code{PLUGIN_GGC_MARKING} event. Such callbacks can call the
+@code{ggc_set_mark} routine, preferably thru the @code{ggc_mark} macro
+(and conversely, these routines should usually not be used in plugins
+outside of the @code{PLUGIN_GGC_MARKING} event).  
+
+Some plugins may need to add extra GGC root tables, e.g. to handle their own
+@code{GTY}-ed data. This can be done with the @code{PLUGIN_REGISTER_GGC_ROOTS}
+pseudo-event with a null callback and the extra root table (of type @code{struct
+ggc_root_tab*}) as @code{user_data}.  Plugins that want to use the
+@code{if_marked} hash table option can add the extra GGC cache tables generated
+by @code{gengtype} using the @code{PLUGIN_REGISTER_GGC_CACHES} pseudo-event with
+a null callback and the extra cache table (of type @code{struct ggc_cache_tab*})
+as @code{user_data}.  Running the @code{gengtype -p @var{source-dir}
+@var{file-list} @var{plugin*.c} ...} utility generates these extra root tables.
+
+You should understand the details of memory management inside GCC
+before using @code{PLUGIN_GGC_MARKING}, @code{PLUGIN_REGISTER_GGC_ROOTS}
+or @code{PLUGIN_REGISTER_GGC_CACHES}.
+
+
+@section Giving information about a plugin
+
+A plugin should give some information to the user about itself. This
+uses the following structure:
+
+@smallexample
+struct plugin_info
+@{
+  const char *version;
+  const char *help;
+@};
+@end smallexample
+
+Such a structure is passed as the @code{user_data} by the plugin's
+init routine using @code{register_callback} with the
+@code{PLUGIN_INFO} pseudo-event and a null callback.
+
+@section Registering custom attributes or pragmas
+
+For analysis (or other) purposes it is useful to be able to add custom
+attributes or pragmas.
+
+The @code{PLUGIN_ATTRIBUTES} callback is called during attribute
+registration. Use the @code{register_attribute} function to register
+custom attributes.
+
+@smallexample
+/* Attribute handler callback */
+static tree
+handle_user_attribute (tree *node, tree name, tree args,
+                       int flags, bool *no_add_attrs)
+@{
+  return NULL_TREE;
+@}
+
+/* Attribute definition */
+static struct attribute_spec user_attr =
+  @{ "user", 1, 1, false,  false, false, handle_user_attribute @};
+
+/* Plugin callback called during attribute registration.
+Registered with register_callback (plugin_name, PLUGIN_ATTRIBUTES, register_attributes, NULL)
+*/
+static void 
+register_attributes (void *event_data, void *data)
+@{
+  warning (0, G_("Callback to register attributes"));
+  register_attribute (&user_attr);
+@}
+
+@end smallexample
+
+
+The @code{PLUGIN_PRAGMAS} callback is called during pragmas
+registration. Use the @code{c_register_pragma} or
+@code{c_register_pragma_with_expansion} functions to register custom
+pragmas.
+
+@smallexample
+/* Plugin callback called during pragmas registration. Registered with
+     register_callback (plugin_name, PLUGIN_PRAGMAS,
+                        register_my_pragma, NULL);
+*/
+static void 
+register_my_pragma (void *event_data, void *data) 
+@{
+  warning (0, G_("Callback to register pragmas"));
+  c_register_pragma ("GCCPLUGIN", "sayhello", handle_pragma_sayhello);
+@}
+@end smallexample
+
+It is suggested to pass @code{"GCCPLUGIN"} (or a short name identifying
+your plugin) as the ``space'' argument of your pragma. 
+
+
+@section Recording information about pass execution
+
+The event PLUGIN_PASS_EXECUTION passes the pointer to the executed pass
+(the same as current_pass) as @code{gcc_data} to the callback.  You can also
+inspect cfun to find out about which function this pass is executed for.
+Note that this event will only be invoked if the gate check (if
+applicable, modified by PLUGIN_OVERRIDE_GATE) succeeds.
+You can use other hooks, like @code{PLUGIN_ALL_PASSES_START},
+@code{PLUGIN_ALL_PASSES_END}, @code{PLUGIN_ALL_IPA_PASSES_START},
+@code{PLUGIN_ALL_IPA_PASSES_END}, @code{PLUGIN_EARLY_GIMPLE_PASSES_START},
+and/or @code{PLUGIN_EARLY_GIMPLE_PASSES_END} to manipulate global state
+in your plugin(s) in order to get context for the pass execution.
+
+
+@section Controlling which passes are being run
+
+After the original gate function for a pass is called, its result
+- the gate status - is stored as an integer.
+Then the event @code{PLUGIN_OVERRIDE_GATE} is invoked, with a pointer
+to the gate status in the @code{gcc_data} parameter to the callback function.
+A nonzero value of the gate status means that the pass is to be executed.
+You can both read and write the gate status via the passed pointer.
+
+
+@section Keeping track of available passes
+
+When your plugin is loaded, you can inspect the various
+pass lists to determine what passes are available.  However, other
+plugins might add new passes.  Also, future changes to GCC might cause
+generic passes to be added after plugin loading.
+When a pass is first added to one of the pass lists, the event
+@code{PLUGIN_NEW_PASS} is invoked, with the callback parameter
+@code{gcc_data} pointing to the new pass.
+
+
+@section Building GCC plugins
+
+If plugins are enabled, GCC installs the headers needed to build a
+plugin (somewhere in the installation tree, e.g. under
+@file{/usr/local}).  In particular a @file{plugin/include} directory
+is installed, containing all the header files needed to build plugins.
+
+On most systems, you can query this @code{plugin} directory by
+invoking @command{gcc -print-file-name=plugin} (replace if needed
+@command{gcc} with the appropriate program path).
+
+Inside plugins, this @code{plugin} directory name can be queried by
+calling @code{default_plugin_dir_name ()}.
+
+The following GNU Makefile excerpt shows how to build a simple plugin:
+
+@smallexample
+GCC=gcc
+PLUGIN_SOURCE_FILES= plugin1.c plugin2.c
+PLUGIN_OBJECT_FILES= $(patsubst %.c,%.o,$(PLUGIN_SOURCE_FILES))
+GCCPLUGINS_DIR:= $(shell $(GCC) -print-file-name=plugin)
+CFLAGS+= -I$(GCCPLUGINS_DIR)/include -fPIC -O2
+
+plugin.so: $(PLUGIN_OBJECT_FILES)
+   $(GCC) -shared $^ -o $@@
+@end smallexample
+
+A single source file plugin may be built with @code{gcc -I`gcc
+-print-file-name=plugin`/include -fPIC -shared -O2 plugin.c -o
+plugin.so}, using backquote shell syntax to query the @file{plugin}
+directory.
+
+Plugins needing to use @command{gengtype} require a GCC build
+directory for the same version of GCC that they will be linked
+against.
diff --git a/gcc/doc/portability.texi b/gcc/doc/portability.texi
new file mode 100644
index 000000000..c5f8048fa
--- /dev/null
+++ b/gcc/doc/portability.texi
@@ -0,0 +1,40 @@
+@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+@c 1999, 2000, 2001, 2002, 2004 Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Portability
+@chapter GCC and Portability
+@cindex portability
+@cindex GCC and portability
+
+GCC itself aims to be portable to any machine where @code{int} is at least
+a 32-bit type.  It aims to target machines with a flat (non-segmented) byte
+addressed data address space (the code address space can be separate).
+Target ABIs may have 8, 16, 32 or 64-bit @code{int} type.  @code{char}
+can be wider than 8 bits.
+
+GCC gets most of the information about the target machine from a machine
+description which gives an algebraic formula for each of the machine's
+instructions.  This is a very clean way to describe the target.  But when
+the compiler needs information that is difficult to express in this
+fashion, ad-hoc parameters have been defined for machine descriptions.
+The purpose of portability is to reduce the total work needed on the
+compiler; it was not of interest for its own sake.
+
+@cindex endianness
+@cindex autoincrement addressing, availability
+@findex abort
+GCC does not contain machine dependent code, but it does contain code
+that depends on machine parameters such as endianness (whether the most
+significant byte has the highest or lowest address of the bytes in a word)
+and the availability of autoincrement addressing.  In the RTL-generation
+pass, it is often necessary to have multiple strategies for generating code
+for a particular kind of syntax tree, strategies that are usable for different
+combinations of parameters.  Often, not all possible cases have been
+addressed, but only the common ones or only the ones that have been
+encountered.  As a result, a new target may require additional
+strategies.  You will know
+if this happens because the compiler will call @code{abort}.  Fortunately,
+the new strategies can be added in a machine-independent fashion, and will
+affect only the target machines that need them.
diff --git a/gcc/doc/rebuild-gcj-db.1 b/gcc/doc/rebuild-gcj-db.1
new file mode 100644
index 000000000..57e9798ba
--- /dev/null
+++ b/gcc/doc/rebuild-gcj-db.1
@@ -0,0 +1,172 @@
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+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "REBUILD-GCJ-DB 1"
+.TH REBUILD-GCJ-DB 1 "2013-04-12" "gcc-4.6.4" "GNU"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+rebuild\-gcj\-db \- Merge the per\-solib databases made by aot\-compile into one system\-wide database.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+rebuild-gcj-db
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\f(CW\*(C`rebuild\-gcj\-db\*(C'\fR is a script that merges the per-solib databases made by
+\&\f(CW\*(C`aot\-compile\*(C'\fR into one system-wide database so \f(CW\*(C`gij\*(C'\fR can find the 
+solibs.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgcc\fR\|(1), \fIgcj\fR\|(1), \fIgcjh\fR\|(1), \fIjcf\-dump\fR\|(1), \fIgfdl\fR\|(7),
+and the Info entries for \fIgcj\fR and \fIgcc\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, the Front-Cover Texts being (a) (see below), and
+with the Back-Cover Texts being (b) (see below).
+A copy of the license is included in the
+man page \fIgfdl\fR\|(7).
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\&     A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\&     You have freedom to copy and modify this GNU Manual, like GNU
+\&     software.  Copies published by the Free Software Foundation raise
+\&     funds for GNU development.
+.Ve
diff --git a/gcc/doc/rtl.texi b/gcc/doc/rtl.texi
new file mode 100644
index 000000000..de45a22c2
--- /dev/null
+++ b/gcc/doc/rtl.texi
@@ -0,0 +1,4148 @@
+@c Copyright (C) 1988, 1989, 1992, 1994, 1997, 1998, 1999, 2000, 2001, 2002,
+@c 2003, 2004, 2005, 2006, 2007, 2008, 2010
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node RTL
+@chapter RTL Representation
+@cindex RTL representation
+@cindex representation of RTL
+@cindex Register Transfer Language (RTL)
+
+The last part of the compiler work is done on a low-level intermediate
+representation called Register Transfer Language.  In this language, the
+instructions to be output are described, pretty much one by one, in an
+algebraic form that describes what the instruction does.
+
+RTL is inspired by Lisp lists.  It has both an internal form, made up of
+structures that point at other structures, and a textual form that is used
+in the machine description and in printed debugging dumps.  The textual
+form uses nested parentheses to indicate the pointers in the internal form.
+
+@menu
+* RTL Objects::       Expressions vs vectors vs strings vs integers.
+* RTL Classes::       Categories of RTL expression objects, and their structure.
+* Accessors::         Macros to access expression operands or vector elts.
+* Special Accessors:: Macros to access specific annotations on RTL.
+* Flags::             Other flags in an RTL expression.
+* Machine Modes::     Describing the size and format of a datum.
+* Constants::         Expressions with constant values.
+* Regs and Memory::   Expressions representing register contents or memory.
+* Arithmetic::        Expressions representing arithmetic on other expressions.
+* Comparisons::       Expressions representing comparison of expressions.
+* Bit-Fields::        Expressions representing bit-fields in memory or reg.
+* Vector Operations:: Expressions involving vector datatypes.
+* Conversions::       Extending, truncating, floating or fixing.
+* RTL Declarations::  Declaring volatility, constancy, etc.
+* Side Effects::      Expressions for storing in registers, etc.
+* Incdec::            Embedded side-effects for autoincrement addressing.
+* Assembler::         Representing @code{asm} with operands.
+* Debug Information:: Expressions representing debugging information.
+* Insns::             Expression types for entire insns.
+* Calls::             RTL representation of function call insns.
+* Sharing::           Some expressions are unique; others *must* be copied.
+* Reading RTL::       Reading textual RTL from a file.
+@end menu
+
+@node RTL Objects
+@section RTL Object Types
+@cindex RTL object types
+
+@cindex RTL integers
+@cindex RTL strings
+@cindex RTL vectors
+@cindex RTL expression
+@cindex RTX (See RTL)
+RTL uses five kinds of objects: expressions, integers, wide integers,
+strings and vectors.  Expressions are the most important ones.  An RTL
+expression (``RTX'', for short) is a C structure, but it is usually
+referred to with a pointer; a type that is given the typedef name
+@code{rtx}.
+
+An integer is simply an @code{int}; their written form uses decimal
+digits.  A wide integer is an integral object whose type is
+@code{HOST_WIDE_INT}; their written form uses decimal digits.
+
+A string is a sequence of characters.  In core it is represented as a
+@code{char *} in usual C fashion, and it is written in C syntax as well.
+However, strings in RTL may never be null.  If you write an empty string in
+a machine description, it is represented in core as a null pointer rather
+than as a pointer to a null character.  In certain contexts, these null
+pointers instead of strings are valid.  Within RTL code, strings are most
+commonly found inside @code{symbol_ref} expressions, but they appear in
+other contexts in the RTL expressions that make up machine descriptions.
+
+In a machine description, strings are normally written with double
+quotes, as you would in C@.  However, strings in machine descriptions may
+extend over many lines, which is invalid C, and adjacent string
+constants are not concatenated as they are in C@.  Any string constant
+may be surrounded with a single set of parentheses.  Sometimes this
+makes the machine description easier to read.
+
+There is also a special syntax for strings, which can be useful when C
+code is embedded in a machine description.  Wherever a string can
+appear, it is also valid to write a C-style brace block.  The entire
+brace block, including the outermost pair of braces, is considered to be
+the string constant.  Double quote characters inside the braces are not
+special.  Therefore, if you write string constants in the C code, you
+need not escape each quote character with a backslash.
+
+A vector contains an arbitrary number of pointers to expressions.  The
+number of elements in the vector is explicitly present in the vector.
+The written form of a vector consists of square brackets
+(@samp{[@dots{}]}) surrounding the elements, in sequence and with
+whitespace separating them.  Vectors of length zero are not created;
+null pointers are used instead.
+
+@cindex expression codes
+@cindex codes, RTL expression
+@findex GET_CODE
+@findex PUT_CODE
+Expressions are classified by @dfn{expression codes} (also called RTX
+codes).  The expression code is a name defined in @file{rtl.def}, which is
+also (in uppercase) a C enumeration constant.  The possible expression
+codes and their meanings are machine-independent.  The code of an RTX can
+be extracted with the macro @code{GET_CODE (@var{x})} and altered with
+@code{PUT_CODE (@var{x}, @var{newcode})}.
+
+The expression code determines how many operands the expression contains,
+and what kinds of objects they are.  In RTL, unlike Lisp, you cannot tell
+by looking at an operand what kind of object it is.  Instead, you must know
+from its context---from the expression code of the containing expression.
+For example, in an expression of code @code{subreg}, the first operand is
+to be regarded as an expression and the second operand as an integer.  In
+an expression of code @code{plus}, there are two operands, both of which
+are to be regarded as expressions.  In a @code{symbol_ref} expression,
+there is one operand, which is to be regarded as a string.
+
+Expressions are written as parentheses containing the name of the
+expression type, its flags and machine mode if any, and then the operands
+of the expression (separated by spaces).
+
+Expression code names in the @samp{md} file are written in lowercase,
+but when they appear in C code they are written in uppercase.  In this
+manual, they are shown as follows: @code{const_int}.
+
+@cindex (nil)
+@cindex nil
+In a few contexts a null pointer is valid where an expression is normally
+wanted.  The written form of this is @code{(nil)}.
+
+@node RTL Classes
+@section RTL Classes and Formats
+@cindex RTL classes
+@cindex classes of RTX codes
+@cindex RTX codes, classes of
+@findex GET_RTX_CLASS
+
+The various expression codes are divided into several @dfn{classes},
+which are represented by single characters.  You can determine the class
+of an RTX code with the macro @code{GET_RTX_CLASS (@var{code})}.
+Currently, @file{rtl.def} defines these classes:
+
+@table @code
+@item RTX_OBJ
+An RTX code that represents an actual object, such as a register
+(@code{REG}) or a memory location (@code{MEM}, @code{SYMBOL_REF}).
+@code{LO_SUM}) is also included; instead, @code{SUBREG} and
+@code{STRICT_LOW_PART} are not in this class, but in class @code{x}.
+
+@item RTX_CONST_OBJ
+An RTX code that represents a constant object.  @code{HIGH} is also
+included in this class.
+
+@item RTX_COMPARE
+An RTX code for a non-symmetric comparison, such as @code{GEU} or
+@code{LT}.
+
+@item RTX_COMM_COMPARE
+An RTX code for a symmetric (commutative) comparison, such as @code{EQ}
+or @code{ORDERED}.
+
+@item RTX_UNARY
+An RTX code for a unary arithmetic operation, such as @code{NEG},
+@code{NOT}, or @code{ABS}.  This category also includes value extension
+(sign or zero) and conversions between integer and floating point.
+
+@item RTX_COMM_ARITH
+An RTX code for a commutative binary operation, such as @code{PLUS} or
+@code{AND}.  @code{NE} and @code{EQ} are comparisons, so they have class
+@code{<}.
+
+@item RTX_BIN_ARITH
+An RTX code for a non-commutative binary operation, such as @code{MINUS},
+@code{DIV}, or @code{ASHIFTRT}.
+
+@item RTX_BITFIELD_OPS
+An RTX code for a bit-field operation.  Currently only
+@code{ZERO_EXTRACT} and @code{SIGN_EXTRACT}.  These have three inputs
+and are lvalues (so they can be used for insertion as well).
+@xref{Bit-Fields}.
+
+@item RTX_TERNARY
+An RTX code for other three input operations.  Currently only
+@code{IF_THEN_ELSE},  @code{VEC_MERGE}, @code{SIGN_EXTRACT},
+@code{ZERO_EXTRACT}, and @code{FMA}.
+
+@item RTX_INSN
+An RTX code for an entire instruction:  @code{INSN}, @code{JUMP_INSN}, and
+@code{CALL_INSN}.  @xref{Insns}.
+
+@item RTX_MATCH
+An RTX code for something that matches in insns, such as
+@code{MATCH_DUP}.  These only occur in machine descriptions.
+
+@item RTX_AUTOINC
+An RTX code for an auto-increment addressing mode, such as
+@code{POST_INC}.
+
+@item RTX_EXTRA
+All other RTX codes.  This category includes the remaining codes used
+only in machine descriptions (@code{DEFINE_*}, etc.).  It also includes
+all the codes describing side effects (@code{SET}, @code{USE},
+@code{CLOBBER}, etc.) and the non-insns that may appear on an insn
+chain, such as @code{NOTE}, @code{BARRIER}, and @code{CODE_LABEL}.
+@code{SUBREG} is also part of this class.
+@end table
+
+@cindex RTL format
+For each expression code, @file{rtl.def} specifies the number of
+contained objects and their kinds using a sequence of characters
+called the @dfn{format} of the expression code.  For example,
+the format of @code{subreg} is @samp{ei}.
+
+@cindex RTL format characters
+These are the most commonly used format characters:
+
+@table @code
+@item e
+An expression (actually a pointer to an expression).
+
+@item i
+An integer.
+
+@item w
+A wide integer.
+
+@item s
+A string.
+
+@item E
+A vector of expressions.
+@end table
+
+A few other format characters are used occasionally:
+
+@table @code
+@item u
+@samp{u} is equivalent to @samp{e} except that it is printed differently
+in debugging dumps.  It is used for pointers to insns.
+
+@item n
+@samp{n} is equivalent to @samp{i} except that it is printed differently
+in debugging dumps.  It is used for the line number or code number of a
+@code{note} insn.
+
+@item S
+@samp{S} indicates a string which is optional.  In the RTL objects in
+core, @samp{S} is equivalent to @samp{s}, but when the object is read,
+from an @samp{md} file, the string value of this operand may be omitted.
+An omitted string is taken to be the null string.
+
+@item V
+@samp{V} indicates a vector which is optional.  In the RTL objects in
+core, @samp{V} is equivalent to @samp{E}, but when the object is read
+from an @samp{md} file, the vector value of this operand may be omitted.
+An omitted vector is effectively the same as a vector of no elements.
+
+@item B
+@samp{B} indicates a pointer to basic block structure.
+
+@item 0
+@samp{0} means a slot whose contents do not fit any normal category.
+@samp{0} slots are not printed at all in dumps, and are often used in
+special ways by small parts of the compiler.
+@end table
+
+There are macros to get the number of operands and the format
+of an expression code:
+
+@table @code
+@findex GET_RTX_LENGTH
+@item GET_RTX_LENGTH (@var{code})
+Number of operands of an RTX of code @var{code}.
+
+@findex GET_RTX_FORMAT
+@item GET_RTX_FORMAT (@var{code})
+The format of an RTX of code @var{code}, as a C string.
+@end table
+
+Some classes of RTX codes always have the same format.  For example, it
+is safe to assume that all comparison operations have format @code{ee}.
+
+@table @code
+@item 1
+All codes of this class have format @code{e}.
+
+@item <
+@itemx c
+@itemx 2
+All codes of these classes have format @code{ee}.
+
+@item b
+@itemx 3
+All codes of these classes have format @code{eee}.
+
+@item i
+All codes of this class have formats that begin with @code{iuueiee}.
+@xref{Insns}.  Note that not all RTL objects linked onto an insn chain
+are of class @code{i}.
+
+@item o
+@itemx m
+@itemx x
+You can make no assumptions about the format of these codes.
+@end table
+
+@node Accessors
+@section Access to Operands
+@cindex accessors
+@cindex access to operands
+@cindex operand access
+
+@findex XEXP
+@findex XINT
+@findex XWINT
+@findex XSTR
+Operands of expressions are accessed using the macros @code{XEXP},
+@code{XINT}, @code{XWINT} and @code{XSTR}.  Each of these macros takes
+two arguments: an expression-pointer (RTX) and an operand number
+(counting from zero).  Thus,
+
+@smallexample
+XEXP (@var{x}, 2)
+@end smallexample
+
+@noindent
+accesses operand 2 of expression @var{x}, as an expression.
+
+@smallexample
+XINT (@var{x}, 2)
+@end smallexample
+
+@noindent
+accesses the same operand as an integer.  @code{XSTR}, used in the same
+fashion, would access it as a string.
+
+Any operand can be accessed as an integer, as an expression or as a string.
+You must choose the correct method of access for the kind of value actually
+stored in the operand.  You would do this based on the expression code of
+the containing expression.  That is also how you would know how many
+operands there are.
+
+For example, if @var{x} is a @code{subreg} expression, you know that it has
+two operands which can be correctly accessed as @code{XEXP (@var{x}, 0)}
+and @code{XINT (@var{x}, 1)}.  If you did @code{XINT (@var{x}, 0)}, you
+would get the address of the expression operand but cast as an integer;
+that might occasionally be useful, but it would be cleaner to write
+@code{(int) XEXP (@var{x}, 0)}.  @code{XEXP (@var{x}, 1)} would also
+compile without error, and would return the second, integer operand cast as
+an expression pointer, which would probably result in a crash when
+accessed.  Nothing stops you from writing @code{XEXP (@var{x}, 28)} either,
+but this will access memory past the end of the expression with
+unpredictable results.
+
+Access to operands which are vectors is more complicated.  You can use the
+macro @code{XVEC} to get the vector-pointer itself, or the macros
+@code{XVECEXP} and @code{XVECLEN} to access the elements and length of a
+vector.
+
+@table @code
+@findex XVEC
+@item XVEC (@var{exp}, @var{idx})
+Access the vector-pointer which is operand number @var{idx} in @var{exp}.
+
+@findex XVECLEN
+@item XVECLEN (@var{exp}, @var{idx})
+Access the length (number of elements) in the vector which is
+in operand number @var{idx} in @var{exp}.  This value is an @code{int}.
+
+@findex XVECEXP
+@item XVECEXP (@var{exp}, @var{idx}, @var{eltnum})
+Access element number @var{eltnum} in the vector which is
+in operand number @var{idx} in @var{exp}.  This value is an RTX@.
+
+It is up to you to make sure that @var{eltnum} is not negative
+and is less than @code{XVECLEN (@var{exp}, @var{idx})}.
+@end table
+
+All the macros defined in this section expand into lvalues and therefore
+can be used to assign the operands, lengths and vector elements as well as
+to access them.
+
+@node Special Accessors
+@section Access to Special Operands
+@cindex access to special operands
+
+Some RTL nodes have special annotations associated with them.
+
+@table @code
+@item MEM
+@table @code
+@findex MEM_ALIAS_SET
+@item MEM_ALIAS_SET (@var{x})
+If 0, @var{x} is not in any alias set, and may alias anything.  Otherwise,
+@var{x} can only alias @code{MEM}s in a conflicting alias set.  This value
+is set in a language-dependent manner in the front-end, and should not be
+altered in the back-end.  In some front-ends, these numbers may correspond
+in some way to types, or other language-level entities, but they need not,
+and the back-end makes no such assumptions.
+These set numbers are tested with @code{alias_sets_conflict_p}.
+
+@findex MEM_EXPR
+@item MEM_EXPR (@var{x})
+If this register is known to hold the value of some user-level
+declaration, this is that tree node.  It may also be a
+@code{COMPONENT_REF}, in which case this is some field reference,
+and @code{TREE_OPERAND (@var{x}, 0)} contains the declaration,
+or another @code{COMPONENT_REF}, or null if there is no compile-time
+object associated with the reference.
+
+@findex MEM_OFFSET
+@item MEM_OFFSET (@var{x})
+The offset from the start of @code{MEM_EXPR} as a @code{CONST_INT} rtx.
+
+@findex MEM_SIZE
+@item MEM_SIZE (@var{x})
+The size in bytes of the memory reference as a @code{CONST_INT} rtx.
+This is mostly relevant for @code{BLKmode} references as otherwise
+the size is implied by the mode.
+
+@findex MEM_ALIGN
+@item MEM_ALIGN (@var{x})
+The known alignment in bits of the memory reference.
+
+@findex MEM_ADDR_SPACE
+@item MEM_ADDR_SPACE (@var{x})
+The address space of the memory reference.  This will commonly be zero
+for the generic address space.
+@end table
+
+@item REG
+@table @code
+@findex ORIGINAL_REGNO
+@item ORIGINAL_REGNO (@var{x})
+This field holds the number the register ``originally'' had; for a
+pseudo register turned into a hard reg this will hold the old pseudo
+register number.
+
+@findex REG_EXPR
+@item REG_EXPR (@var{x})
+If this register is known to hold the value of some user-level
+declaration, this is that tree node.
+
+@findex REG_OFFSET
+@item REG_OFFSET (@var{x})
+If this register is known to hold the value of some user-level
+declaration, this is the offset into that logical storage.
+@end table
+
+@item SYMBOL_REF
+@table @code
+@findex SYMBOL_REF_DECL
+@item SYMBOL_REF_DECL (@var{x})
+If the @code{symbol_ref} @var{x} was created for a @code{VAR_DECL} or
+a @code{FUNCTION_DECL}, that tree is recorded here.  If this value is
+null, then @var{x} was created by back end code generation routines,
+and there is no associated front end symbol table entry.
+
+@code{SYMBOL_REF_DECL} may also point to a tree of class @code{'c'},
+that is, some sort of constant.  In this case, the @code{symbol_ref}
+is an entry in the per-file constant pool; again, there is no associated
+front end symbol table entry.
+
+@findex SYMBOL_REF_CONSTANT
+@item SYMBOL_REF_CONSTANT (@var{x})
+If @samp{CONSTANT_POOL_ADDRESS_P (@var{x})} is true, this is the constant
+pool entry for @var{x}.  It is null otherwise.
+
+@findex SYMBOL_REF_DATA
+@item SYMBOL_REF_DATA (@var{x})
+A field of opaque type used to store @code{SYMBOL_REF_DECL} or
+@code{SYMBOL_REF_CONSTANT}.
+
+@findex SYMBOL_REF_FLAGS
+@item SYMBOL_REF_FLAGS (@var{x})
+In a @code{symbol_ref}, this is used to communicate various predicates
+about the symbol.  Some of these are common enough to be computed by
+common code, some are specific to the target.  The common bits are:
+
+@table @code
+@findex SYMBOL_REF_FUNCTION_P
+@findex SYMBOL_FLAG_FUNCTION
+@item SYMBOL_FLAG_FUNCTION
+Set if the symbol refers to a function.
+
+@findex SYMBOL_REF_LOCAL_P
+@findex SYMBOL_FLAG_LOCAL
+@item SYMBOL_FLAG_LOCAL
+Set if the symbol is local to this ``module''.
+See @code{TARGET_BINDS_LOCAL_P}.
+
+@findex SYMBOL_REF_EXTERNAL_P
+@findex SYMBOL_FLAG_EXTERNAL
+@item SYMBOL_FLAG_EXTERNAL
+Set if this symbol is not defined in this translation unit.
+Note that this is not the inverse of @code{SYMBOL_FLAG_LOCAL}.
+
+@findex SYMBOL_REF_SMALL_P
+@findex SYMBOL_FLAG_SMALL
+@item SYMBOL_FLAG_SMALL
+Set if the symbol is located in the small data section.
+See @code{TARGET_IN_SMALL_DATA_P}.
+
+@findex SYMBOL_FLAG_TLS_SHIFT
+@findex SYMBOL_REF_TLS_MODEL
+@item SYMBOL_REF_TLS_MODEL (@var{x})
+This is a multi-bit field accessor that returns the @code{tls_model}
+to be used for a thread-local storage symbol.  It returns zero for
+non-thread-local symbols.
+
+@findex SYMBOL_REF_HAS_BLOCK_INFO_P
+@findex SYMBOL_FLAG_HAS_BLOCK_INFO
+@item SYMBOL_FLAG_HAS_BLOCK_INFO
+Set if the symbol has @code{SYMBOL_REF_BLOCK} and
+@code{SYMBOL_REF_BLOCK_OFFSET} fields.
+
+@findex SYMBOL_REF_ANCHOR_P
+@findex SYMBOL_FLAG_ANCHOR
+@cindex @option{-fsection-anchors}
+@item SYMBOL_FLAG_ANCHOR
+Set if the symbol is used as a section anchor.  ``Section anchors''
+are symbols that have a known position within an @code{object_block}
+and that can be used to access nearby members of that block.
+They are used to implement @option{-fsection-anchors}.
+
+If this flag is set, then @code{SYMBOL_FLAG_HAS_BLOCK_INFO} will be too.
+@end table
+
+Bits beginning with @code{SYMBOL_FLAG_MACH_DEP} are available for
+the target's use.
+@end table
+
+@findex SYMBOL_REF_BLOCK
+@item SYMBOL_REF_BLOCK (@var{x})
+If @samp{SYMBOL_REF_HAS_BLOCK_INFO_P (@var{x})}, this is the
+@samp{object_block} structure to which the symbol belongs,
+or @code{NULL} if it has not been assigned a block.
+
+@findex SYMBOL_REF_BLOCK_OFFSET
+@item SYMBOL_REF_BLOCK_OFFSET (@var{x})
+If @samp{SYMBOL_REF_HAS_BLOCK_INFO_P (@var{x})}, this is the offset of @var{x}
+from the first object in @samp{SYMBOL_REF_BLOCK (@var{x})}.  The value is
+negative if @var{x} has not yet been assigned to a block, or it has not
+been given an offset within that block.
+@end table
+
+@node Flags
+@section Flags in an RTL Expression
+@cindex flags in RTL expression
+
+RTL expressions contain several flags (one-bit bit-fields)
+that are used in certain types of expression.  Most often they
+are accessed with the following macros, which expand into lvalues.
+
+@table @code
+@findex CONSTANT_POOL_ADDRESS_P
+@cindex @code{symbol_ref} and @samp{/u}
+@cindex @code{unchanging}, in @code{symbol_ref}
+@item CONSTANT_POOL_ADDRESS_P (@var{x})
+Nonzero in a @code{symbol_ref} if it refers to part of the current
+function's constant pool.  For most targets these addresses are in a
+@code{.rodata} section entirely separate from the function, but for
+some targets the addresses are close to the beginning of the function.
+In either case GCC assumes these addresses can be addressed directly,
+perhaps with the help of base registers.
+Stored in the @code{unchanging} field and printed as @samp{/u}.
+
+@findex RTL_CONST_CALL_P
+@cindex @code{call_insn} and @samp{/u}
+@cindex @code{unchanging}, in @code{call_insn}
+@item RTL_CONST_CALL_P (@var{x})
+In a @code{call_insn} indicates that the insn represents a call to a
+const function.  Stored in the @code{unchanging} field and printed as
+@samp{/u}.
+
+@findex RTL_PURE_CALL_P
+@cindex @code{call_insn} and @samp{/i}
+@cindex @code{return_val}, in @code{call_insn}
+@item RTL_PURE_CALL_P (@var{x})
+In a @code{call_insn} indicates that the insn represents a call to a
+pure function.  Stored in the @code{return_val} field and printed as
+@samp{/i}.
+
+@findex RTL_CONST_OR_PURE_CALL_P
+@cindex @code{call_insn} and @samp{/u} or @samp{/i}
+@item RTL_CONST_OR_PURE_CALL_P (@var{x})
+In a @code{call_insn}, true if @code{RTL_CONST_CALL_P} or
+@code{RTL_PURE_CALL_P} is true.
+
+@findex RTL_LOOPING_CONST_OR_PURE_CALL_P
+@cindex @code{call_insn} and @samp{/c}
+@cindex @code{call}, in @code{call_insn}
+@item RTL_LOOPING_CONST_OR_PURE_CALL_P (@var{x})
+In a @code{call_insn} indicates that the insn represents a possibly
+infinite looping call to a const or pure function.  Stored in the
+@code{call} field and printed as @samp{/c}.  Only true if one of
+@code{RTL_CONST_CALL_P} or @code{RTL_PURE_CALL_P} is true.
+
+@findex INSN_ANNULLED_BRANCH_P
+@cindex @code{jump_insn} and @samp{/u}
+@cindex @code{call_insn} and @samp{/u}
+@cindex @code{insn} and @samp{/u}
+@cindex @code{unchanging}, in @code{jump_insn}, @code{call_insn} and @code{insn}
+@item INSN_ANNULLED_BRANCH_P (@var{x})
+In a @code{jump_insn}, @code{call_insn}, or @code{insn} indicates
+that the branch is an annulling one.  See the discussion under
+@code{sequence} below.  Stored in the @code{unchanging} field and
+printed as @samp{/u}.
+
+@findex INSN_DELETED_P
+@cindex @code{insn} and @samp{/v}
+@cindex @code{call_insn} and @samp{/v}
+@cindex @code{jump_insn} and @samp{/v}
+@cindex @code{code_label} and @samp{/v}
+@cindex @code{barrier} and @samp{/v}
+@cindex @code{note} and @samp{/v}
+@cindex @code{volatil}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{code_label}, @code{barrier}, and @code{note}
+@item INSN_DELETED_P (@var{x})
+In an @code{insn}, @code{call_insn}, @code{jump_insn}, @code{code_label},
+@code{barrier}, or @code{note},
+nonzero if the insn has been deleted.  Stored in the
+@code{volatil} field and printed as @samp{/v}.
+
+@findex INSN_FROM_TARGET_P
+@cindex @code{insn} and @samp{/s}
+@cindex @code{jump_insn} and @samp{/s}
+@cindex @code{call_insn} and @samp{/s}
+@cindex @code{in_struct}, in @code{insn} and @code{jump_insn} and @code{call_insn}
+@item INSN_FROM_TARGET_P (@var{x})
+In an @code{insn} or @code{jump_insn} or @code{call_insn} in a delay
+slot of a branch, indicates that the insn
+is from the target of the branch.  If the branch insn has
+@code{INSN_ANNULLED_BRANCH_P} set, this insn will only be executed if
+the branch is taken.  For annulled branches with
+@code{INSN_FROM_TARGET_P} clear, the insn will be executed only if the
+branch is not taken.  When @code{INSN_ANNULLED_BRANCH_P} is not set,
+this insn will always be executed.  Stored in the @code{in_struct}
+field and printed as @samp{/s}.
+
+@findex LABEL_PRESERVE_P
+@cindex @code{code_label} and @samp{/i}
+@cindex @code{note} and @samp{/i}
+@cindex @code{in_struct}, in @code{code_label} and @code{note}
+@item LABEL_PRESERVE_P (@var{x})
+In a @code{code_label} or @code{note}, indicates that the label is referenced by
+code or data not visible to the RTL of a given function.
+Labels referenced by a non-local goto will have this bit set.  Stored
+in the @code{in_struct} field and printed as @samp{/s}.
+
+@findex LABEL_REF_NONLOCAL_P
+@cindex @code{label_ref} and @samp{/v}
+@cindex @code{reg_label} and @samp{/v}
+@cindex @code{volatil}, in @code{label_ref} and @code{reg_label}
+@item LABEL_REF_NONLOCAL_P (@var{x})
+In @code{label_ref} and @code{reg_label} expressions, nonzero if this is
+a reference to a non-local label.
+Stored in the @code{volatil} field and printed as @samp{/v}.
+
+@findex MEM_IN_STRUCT_P
+@cindex @code{mem} and @samp{/s}
+@cindex @code{in_struct}, in @code{mem}
+@item MEM_IN_STRUCT_P (@var{x})
+In @code{mem} expressions, nonzero for reference to an entire structure,
+union or array, or to a component of one.  Zero for references to a
+scalar variable or through a pointer to a scalar.  If both this flag and
+@code{MEM_SCALAR_P} are clear, then we don't know whether this @code{mem}
+is in a structure or not.  Both flags should never be simultaneously set.
+Stored in the @code{in_struct} field and printed as @samp{/s}.
+
+@findex MEM_KEEP_ALIAS_SET_P
+@cindex @code{mem} and @samp{/j}
+@cindex @code{jump}, in @code{mem}
+@item MEM_KEEP_ALIAS_SET_P (@var{x})
+In @code{mem} expressions, 1 if we should keep the alias set for this
+mem unchanged when we access a component.  Set to 1, for example, when we
+are already in a non-addressable component of an aggregate.
+Stored in the @code{jump} field and printed as @samp{/j}.
+
+@findex MEM_SCALAR_P
+@cindex @code{mem} and @samp{/i}
+@cindex @code{return_val}, in @code{mem}
+@item MEM_SCALAR_P (@var{x})
+In @code{mem} expressions, nonzero for reference to a scalar known not
+to be a member of a structure, union, or array.  Zero for such
+references and for indirections through pointers, even pointers pointing
+to scalar types.  If both this flag and @code{MEM_IN_STRUCT_P} are clear,
+then we don't know whether this @code{mem} is in a structure or not.
+Both flags should never be simultaneously set.
+Stored in the @code{return_val} field and printed as @samp{/i}.
+
+@findex MEM_VOLATILE_P
+@cindex @code{mem} and @samp{/v}
+@cindex @code{asm_input} and @samp{/v}
+@cindex @code{asm_operands} and @samp{/v}
+@cindex @code{volatil}, in @code{mem}, @code{asm_operands}, and @code{asm_input}
+@item MEM_VOLATILE_P (@var{x})
+In @code{mem}, @code{asm_operands}, and @code{asm_input} expressions,
+nonzero for volatile memory references.
+Stored in the @code{volatil} field and printed as @samp{/v}.
+
+@findex MEM_NOTRAP_P
+@cindex @code{mem} and @samp{/c}
+@cindex @code{call}, in @code{mem}
+@item MEM_NOTRAP_P (@var{x})
+In @code{mem}, nonzero for memory references that will not trap.
+Stored in the @code{call} field and printed as @samp{/c}.
+
+@findex MEM_POINTER
+@cindex @code{mem} and @samp{/f}
+@cindex @code{frame_related}, in @code{mem}
+@item MEM_POINTER (@var{x})
+Nonzero in a @code{mem} if the memory reference holds a pointer.
+Stored in the @code{frame_related} field and printed as @samp{/f}.
+
+@findex REG_FUNCTION_VALUE_P
+@cindex @code{reg} and @samp{/i}
+@cindex @code{return_val}, in @code{reg}
+@item REG_FUNCTION_VALUE_P (@var{x})
+Nonzero in a @code{reg} if it is the place in which this function's
+value is going to be returned.  (This happens only in a hard
+register.)  Stored in the @code{return_val} field and printed as
+@samp{/i}.
+
+@findex REG_POINTER
+@cindex @code{reg} and @samp{/f}
+@cindex @code{frame_related}, in @code{reg}
+@item REG_POINTER (@var{x})
+Nonzero in a @code{reg} if the register holds a pointer.  Stored in the
+@code{frame_related} field and printed as @samp{/f}.
+
+@findex REG_USERVAR_P
+@cindex @code{reg} and @samp{/v}
+@cindex @code{volatil}, in @code{reg}
+@item REG_USERVAR_P (@var{x})
+In a @code{reg}, nonzero if it corresponds to a variable present in
+the user's source code.  Zero for temporaries generated internally by
+the compiler.  Stored in the @code{volatil} field and printed as
+@samp{/v}.
+
+The same hard register may be used also for collecting the values of
+functions called by this one, but @code{REG_FUNCTION_VALUE_P} is zero
+in this kind of use.
+
+@findex RTX_FRAME_RELATED_P
+@cindex @code{insn} and @samp{/f}
+@cindex @code{call_insn} and @samp{/f}
+@cindex @code{jump_insn} and @samp{/f}
+@cindex @code{barrier} and @samp{/f}
+@cindex @code{set} and @samp{/f}
+@cindex @code{frame_related}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{barrier}, and @code{set}
+@item RTX_FRAME_RELATED_P (@var{x})
+Nonzero in an @code{insn}, @code{call_insn}, @code{jump_insn},
+@code{barrier}, or @code{set} which is part of a function prologue
+and sets the stack pointer, sets the frame pointer, or saves a register.
+This flag should also be set on an instruction that sets up a temporary
+register to use in place of the frame pointer.
+Stored in the @code{frame_related} field and printed as @samp{/f}.
+
+In particular, on RISC targets where there are limits on the sizes of
+immediate constants, it is sometimes impossible to reach the register
+save area directly from the stack pointer.  In that case, a temporary
+register is used that is near enough to the register save area, and the
+Canonical Frame Address, i.e., DWARF2's logical frame pointer, register
+must (temporarily) be changed to be this temporary register.  So, the
+instruction that sets this temporary register must be marked as
+@code{RTX_FRAME_RELATED_P}.
+
+If the marked instruction is overly complex (defined in terms of what
+@code{dwarf2out_frame_debug_expr} can handle), you will also have to
+create a @code{REG_FRAME_RELATED_EXPR} note and attach it to the
+instruction.  This note should contain a simple expression of the
+computation performed by this instruction, i.e., one that
+@code{dwarf2out_frame_debug_expr} can handle.
+
+This flag is required for exception handling support on targets with RTL
+prologues.
+
+@findex MEM_READONLY_P
+@cindex @code{mem} and @samp{/u}
+@cindex @code{unchanging}, in @code{mem}
+@item MEM_READONLY_P (@var{x})
+Nonzero in a @code{mem}, if the memory is statically allocated and read-only.
+
+Read-only in this context means never modified during the lifetime of the
+program, not necessarily in ROM or in write-disabled pages.  A common
+example of the later is a shared library's global offset table.  This
+table is initialized by the runtime loader, so the memory is technically
+writable, but after control is transfered from the runtime loader to the
+application, this memory will never be subsequently modified.
+
+Stored in the @code{unchanging} field and printed as @samp{/u}.
+
+@findex SCHED_GROUP_P
+@cindex @code{insn} and @samp{/s}
+@cindex @code{call_insn} and @samp{/s}
+@cindex @code{jump_insn} and @samp{/s}
+@cindex @code{in_struct}, in @code{insn}, @code{jump_insn} and @code{call_insn}
+@item SCHED_GROUP_P (@var{x})
+During instruction scheduling, in an @code{insn}, @code{call_insn} or
+@code{jump_insn}, indicates that the
+previous insn must be scheduled together with this insn.  This is used to
+ensure that certain groups of instructions will not be split up by the
+instruction scheduling pass, for example, @code{use} insns before
+a @code{call_insn} may not be separated from the @code{call_insn}.
+Stored in the @code{in_struct} field and printed as @samp{/s}.
+
+@findex SET_IS_RETURN_P
+@cindex @code{insn} and @samp{/j}
+@cindex @code{jump}, in @code{insn}
+@item SET_IS_RETURN_P (@var{x})
+For a @code{set}, nonzero if it is for a return.
+Stored in the @code{jump} field and printed as @samp{/j}.
+
+@findex SIBLING_CALL_P
+@cindex @code{call_insn} and @samp{/j}
+@cindex @code{jump}, in @code{call_insn}
+@item SIBLING_CALL_P (@var{x})
+For a @code{call_insn}, nonzero if the insn is a sibling call.
+Stored in the @code{jump} field and printed as @samp{/j}.
+
+@findex STRING_POOL_ADDRESS_P
+@cindex @code{symbol_ref} and @samp{/f}
+@cindex @code{frame_related}, in @code{symbol_ref}
+@item STRING_POOL_ADDRESS_P (@var{x})
+For a @code{symbol_ref} expression, nonzero if it addresses this function's
+string constant pool.
+Stored in the @code{frame_related} field and printed as @samp{/f}.
+
+@findex SUBREG_PROMOTED_UNSIGNED_P
+@cindex @code{subreg} and @samp{/u} and @samp{/v}
+@cindex @code{unchanging}, in @code{subreg}
+@cindex @code{volatil}, in @code{subreg}
+@item SUBREG_PROMOTED_UNSIGNED_P (@var{x})
+Returns a value greater then zero for a @code{subreg} that has
+@code{SUBREG_PROMOTED_VAR_P} nonzero if the object being referenced is kept
+zero-extended, zero if it is kept sign-extended, and less then zero if it is
+extended some other way via the @code{ptr_extend} instruction.
+Stored in the @code{unchanging}
+field and @code{volatil} field, printed as @samp{/u} and @samp{/v}.
+This macro may only be used to get the value it may not be used to change
+the value.  Use @code{SUBREG_PROMOTED_UNSIGNED_SET} to change the value.
+
+@findex SUBREG_PROMOTED_UNSIGNED_SET
+@cindex @code{subreg} and @samp{/u}
+@cindex @code{unchanging}, in @code{subreg}
+@cindex @code{volatil}, in @code{subreg}
+@item SUBREG_PROMOTED_UNSIGNED_SET (@var{x})
+Set the @code{unchanging} and @code{volatil} fields in a @code{subreg}
+to reflect zero, sign, or other extension.  If @code{volatil} is
+zero, then @code{unchanging} as nonzero means zero extension and as
+zero means sign extension.  If @code{volatil} is nonzero then some
+other type of extension was done via the @code{ptr_extend} instruction.
+
+@findex SUBREG_PROMOTED_VAR_P
+@cindex @code{subreg} and @samp{/s}
+@cindex @code{in_struct}, in @code{subreg}
+@item SUBREG_PROMOTED_VAR_P (@var{x})
+Nonzero in a @code{subreg} if it was made when accessing an object that
+was promoted to a wider mode in accord with the @code{PROMOTED_MODE} machine
+description macro (@pxref{Storage Layout}).  In this case, the mode of
+the @code{subreg} is the declared mode of the object and the mode of
+@code{SUBREG_REG} is the mode of the register that holds the object.
+Promoted variables are always either sign- or zero-extended to the wider
+mode on every assignment.  Stored in the @code{in_struct} field and
+printed as @samp{/s}.
+
+@findex SYMBOL_REF_USED
+@cindex @code{used}, in @code{symbol_ref}
+@item SYMBOL_REF_USED (@var{x})
+In a @code{symbol_ref}, indicates that @var{x} has been used.  This is
+normally only used to ensure that @var{x} is only declared external
+once.  Stored in the @code{used} field.
+
+@findex SYMBOL_REF_WEAK
+@cindex @code{symbol_ref} and @samp{/i}
+@cindex @code{return_val}, in @code{symbol_ref}
+@item SYMBOL_REF_WEAK (@var{x})
+In a @code{symbol_ref}, indicates that @var{x} has been declared weak.
+Stored in the @code{return_val} field and printed as @samp{/i}.
+
+@findex SYMBOL_REF_FLAG
+@cindex @code{symbol_ref} and @samp{/v}
+@cindex @code{volatil}, in @code{symbol_ref}
+@item SYMBOL_REF_FLAG (@var{x})
+In a @code{symbol_ref}, this is used as a flag for machine-specific purposes.
+Stored in the @code{volatil} field and printed as @samp{/v}.
+
+Most uses of @code{SYMBOL_REF_FLAG} are historic and may be subsumed
+by @code{SYMBOL_REF_FLAGS}.  Certainly use of @code{SYMBOL_REF_FLAGS}
+is mandatory if the target requires more than one bit of storage.
+
+@findex PREFETCH_SCHEDULE_BARRIER_P
+@cindex @code{prefetch} and @samp{/v}
+@cindex @code{volatile}, in @code{prefetch}
+@item PREFETCH_SCHEDULE_BARRIER_P (@var{x})
+In a @code{prefetch}, indicates that the prefetch is a scheduling barrier.
+No other INSNs will be moved over it.
+Stored in the @code{volatil} field and printed as @samp{/v}.
+@end table
+
+These are the fields to which the above macros refer:
+
+@table @code
+@findex call
+@cindex @samp{/c} in RTL dump
+@item call
+In a @code{mem}, 1 means that the memory reference will not trap.
+
+In a @code{call}, 1 means that this pure or const call may possibly
+infinite loop.
+
+In an RTL dump, this flag is represented as @samp{/c}.
+
+@findex frame_related
+@cindex @samp{/f} in RTL dump
+@item frame_related
+In an @code{insn} or @code{set} expression, 1 means that it is part of
+a function prologue and sets the stack pointer, sets the frame pointer,
+saves a register, or sets up a temporary register to use in place of the
+frame pointer.
+
+In @code{reg} expressions, 1 means that the register holds a pointer.
+
+In @code{mem} expressions, 1 means that the memory reference holds a pointer.
+
+In @code{symbol_ref} expressions, 1 means that the reference addresses
+this function's string constant pool.
+
+In an RTL dump, this flag is represented as @samp{/f}.
+
+@findex in_struct
+@cindex @samp{/s} in RTL dump
+@item in_struct
+In @code{mem} expressions, it is 1 if the memory datum referred to is
+all or part of a structure or array; 0 if it is (or might be) a scalar
+variable.  A reference through a C pointer has 0 because the pointer
+might point to a scalar variable.  This information allows the compiler
+to determine something about possible cases of aliasing.
+
+In @code{reg} expressions, it is 1 if the register has its entire life
+contained within the test expression of some loop.
+
+In @code{subreg} expressions, 1 means that the @code{subreg} is accessing
+an object that has had its mode promoted from a wider mode.
+
+In @code{label_ref} expressions, 1 means that the referenced label is
+outside the innermost loop containing the insn in which the @code{label_ref}
+was found.
+
+In @code{code_label} expressions, it is 1 if the label may never be deleted.
+This is used for labels which are the target of non-local gotos.  Such a
+label that would have been deleted is replaced with a @code{note} of type
+@code{NOTE_INSN_DELETED_LABEL}.
+
+In an @code{insn} during dead-code elimination, 1 means that the insn is
+dead code.
+
+In an @code{insn} or @code{jump_insn} during reorg for an insn in the
+delay slot of a branch,
+1 means that this insn is from the target of the branch.
+
+In an @code{insn} during instruction scheduling, 1 means that this insn
+must be scheduled as part of a group together with the previous insn.
+
+In an RTL dump, this flag is represented as @samp{/s}.
+
+@findex return_val
+@cindex @samp{/i} in RTL dump
+@item return_val
+In @code{reg} expressions, 1 means the register contains
+the value to be returned by the current function.  On
+machines that pass parameters in registers, the same register number
+may be used for parameters as well, but this flag is not set on such
+uses.
+
+In @code{mem} expressions, 1 means the memory reference is to a scalar
+known not to be a member of a structure, union, or array.
+
+In @code{symbol_ref} expressions, 1 means the referenced symbol is weak.
+
+In @code{call} expressions, 1 means the call is pure.
+
+In an RTL dump, this flag is represented as @samp{/i}.
+
+@findex jump
+@cindex @samp{/j} in RTL dump
+@item jump
+In a @code{mem} expression, 1 means we should keep the alias set for this
+mem unchanged when we access a component.
+
+In a @code{set}, 1 means it is for a return.
+
+In a @code{call_insn}, 1 means it is a sibling call.
+
+In an RTL dump, this flag is represented as @samp{/j}.
+
+@findex unchanging
+@cindex @samp{/u} in RTL dump
+@item unchanging
+In @code{reg} and @code{mem} expressions, 1 means
+that the value of the expression never changes.
+
+In @code{subreg} expressions, it is 1 if the @code{subreg} references an
+unsigned object whose mode has been promoted to a wider mode.
+
+In an @code{insn} or @code{jump_insn} in the delay slot of a branch
+instruction, 1 means an annulling branch should be used.
+
+In a @code{symbol_ref} expression, 1 means that this symbol addresses
+something in the per-function constant pool.
+
+In a @code{call_insn} 1 means that this instruction is a call to a const
+function.
+
+In an RTL dump, this flag is represented as @samp{/u}.
+
+@findex used
+@item used
+This flag is used directly (without an access macro) at the end of RTL
+generation for a function, to count the number of times an expression
+appears in insns.  Expressions that appear more than once are copied,
+according to the rules for shared structure (@pxref{Sharing}).
+
+For a @code{reg}, it is used directly (without an access macro) by the
+leaf register renumbering code to ensure that each register is only
+renumbered once.
+
+In a @code{symbol_ref}, it indicates that an external declaration for
+the symbol has already been written.
+
+@findex volatil
+@cindex @samp{/v} in RTL dump
+@item volatil
+@cindex volatile memory references
+In a @code{mem}, @code{asm_operands}, or @code{asm_input}
+expression, it is 1 if the memory
+reference is volatile.  Volatile memory references may not be deleted,
+reordered or combined.
+
+In a @code{symbol_ref} expression, it is used for machine-specific
+purposes.
+
+In a @code{reg} expression, it is 1 if the value is a user-level variable.
+0 indicates an internal compiler temporary.
+
+In an @code{insn}, 1 means the insn has been deleted.
+
+In @code{label_ref} and @code{reg_label} expressions, 1 means a reference
+to a non-local label.
+
+In @code{prefetch} expressions, 1 means that the containing insn is a
+scheduling barrier.
+
+In an RTL dump, this flag is represented as @samp{/v}.
+@end table
+
+@node Machine Modes
+@section Machine Modes
+@cindex machine modes
+
+@findex enum machine_mode
+A machine mode describes a size of data object and the representation used
+for it.  In the C code, machine modes are represented by an enumeration
+type, @code{enum machine_mode}, defined in @file{machmode.def}.  Each RTL
+expression has room for a machine mode and so do certain kinds of tree
+expressions (declarations and types, to be precise).
+
+In debugging dumps and machine descriptions, the machine mode of an RTL
+expression is written after the expression code with a colon to separate
+them.  The letters @samp{mode} which appear at the end of each machine mode
+name are omitted.  For example, @code{(reg:SI 38)} is a @code{reg}
+expression with machine mode @code{SImode}.  If the mode is
+@code{VOIDmode}, it is not written at all.
+
+Here is a table of machine modes.  The term ``byte'' below refers to an
+object of @code{BITS_PER_UNIT} bits (@pxref{Storage Layout}).
+
+@table @code
+@findex BImode
+@item BImode
+``Bit'' mode represents a single bit, for predicate registers.
+
+@findex QImode
+@item QImode
+``Quarter-Integer'' mode represents a single byte treated as an integer.
+
+@findex HImode
+@item HImode
+``Half-Integer'' mode represents a two-byte integer.
+
+@findex PSImode
+@item PSImode
+``Partial Single Integer'' mode represents an integer which occupies
+four bytes but which doesn't really use all four.  On some machines,
+this is the right mode to use for pointers.
+
+@findex SImode
+@item SImode
+``Single Integer'' mode represents a four-byte integer.
+
+@findex PDImode
+@item PDImode
+``Partial Double Integer'' mode represents an integer which occupies
+eight bytes but which doesn't really use all eight.  On some machines,
+this is the right mode to use for certain pointers.
+
+@findex DImode
+@item DImode
+``Double Integer'' mode represents an eight-byte integer.
+
+@findex TImode
+@item TImode
+``Tetra Integer'' (?) mode represents a sixteen-byte integer.
+
+@findex OImode
+@item OImode
+``Octa Integer'' (?) mode represents a thirty-two-byte integer.
+
+@findex QFmode
+@item QFmode
+``Quarter-Floating'' mode represents a quarter-precision (single byte)
+floating point number.
+
+@findex HFmode
+@item HFmode
+``Half-Floating'' mode represents a half-precision (two byte) floating
+point number.
+
+@findex TQFmode
+@item TQFmode
+``Three-Quarter-Floating'' (?) mode represents a three-quarter-precision
+(three byte) floating point number.
+
+@findex SFmode
+@item SFmode
+``Single Floating'' mode represents a four byte floating point number.
+In the common case, of a processor with IEEE arithmetic and 8-bit bytes,
+this is a single-precision IEEE floating point number; it can also be
+used for double-precision (on processors with 16-bit bytes) and
+single-precision VAX and IBM types.
+
+@findex DFmode
+@item DFmode
+``Double Floating'' mode represents an eight byte floating point number.
+In the common case, of a processor with IEEE arithmetic and 8-bit bytes,
+this is a double-precision IEEE floating point number.
+
+@findex XFmode
+@item XFmode
+``Extended Floating'' mode represents an IEEE extended floating point
+number.  This mode only has 80 meaningful bits (ten bytes).  Some
+processors require such numbers to be padded to twelve bytes, others
+to sixteen; this mode is used for either.
+
+@findex SDmode
+@item SDmode
+``Single Decimal Floating'' mode represents a four byte decimal
+floating point number (as distinct from conventional binary floating
+point).
+
+@findex DDmode
+@item DDmode
+``Double Decimal Floating'' mode represents an eight byte decimal
+floating point number.
+
+@findex TDmode
+@item TDmode
+``Tetra Decimal Floating'' mode represents a sixteen byte decimal
+floating point number all 128 of whose bits are meaningful.
+
+@findex TFmode
+@item TFmode
+``Tetra Floating'' mode represents a sixteen byte floating point number
+all 128 of whose bits are meaningful.  One common use is the
+IEEE quad-precision format.
+
+@findex QQmode
+@item QQmode
+``Quarter-Fractional'' mode represents a single byte treated as a signed
+fractional number.  The default format is ``s.7''.
+
+@findex HQmode
+@item HQmode
+``Half-Fractional'' mode represents a two-byte signed fractional number.
+The default format is ``s.15''.
+
+@findex SQmode
+@item SQmode
+``Single Fractional'' mode represents a four-byte signed fractional number.
+The default format is ``s.31''.
+
+@findex DQmode
+@item DQmode
+``Double Fractional'' mode represents an eight-byte signed fractional number.
+The default format is ``s.63''.
+
+@findex TQmode
+@item TQmode
+``Tetra Fractional'' mode represents a sixteen-byte signed fractional number.
+The default format is ``s.127''.
+
+@findex UQQmode
+@item UQQmode
+``Unsigned Quarter-Fractional'' mode represents a single byte treated as an
+unsigned fractional number.  The default format is ``.8''.
+
+@findex UHQmode
+@item UHQmode
+``Unsigned Half-Fractional'' mode represents a two-byte unsigned fractional
+number.  The default format is ``.16''.
+
+@findex USQmode
+@item USQmode
+``Unsigned Single Fractional'' mode represents a four-byte unsigned fractional
+number.  The default format is ``.32''.
+
+@findex UDQmode
+@item UDQmode
+``Unsigned Double Fractional'' mode represents an eight-byte unsigned
+fractional number.  The default format is ``.64''.
+
+@findex UTQmode
+@item UTQmode
+``Unsigned Tetra Fractional'' mode represents a sixteen-byte unsigned
+fractional number.  The default format is ``.128''.
+
+@findex HAmode
+@item HAmode
+``Half-Accumulator'' mode represents a two-byte signed accumulator.
+The default format is ``s8.7''.
+
+@findex SAmode
+@item SAmode
+``Single Accumulator'' mode represents a four-byte signed accumulator.
+The default format is ``s16.15''.
+
+@findex DAmode
+@item DAmode
+``Double Accumulator'' mode represents an eight-byte signed accumulator.
+The default format is ``s32.31''.
+
+@findex TAmode
+@item TAmode
+``Tetra Accumulator'' mode represents a sixteen-byte signed accumulator.
+The default format is ``s64.63''.
+
+@findex UHAmode
+@item UHAmode
+``Unsigned Half-Accumulator'' mode represents a two-byte unsigned accumulator.
+The default format is ``8.8''.
+
+@findex USAmode
+@item USAmode
+``Unsigned Single Accumulator'' mode represents a four-byte unsigned
+accumulator.  The default format is ``16.16''.
+
+@findex UDAmode
+@item UDAmode
+``Unsigned Double Accumulator'' mode represents an eight-byte unsigned
+accumulator.  The default format is ``32.32''.
+
+@findex UTAmode
+@item UTAmode
+``Unsigned Tetra Accumulator'' mode represents a sixteen-byte unsigned
+accumulator.  The default format is ``64.64''.
+
+@findex CCmode
+@item CCmode
+``Condition Code'' mode represents the value of a condition code, which
+is a machine-specific set of bits used to represent the result of a
+comparison operation.  Other machine-specific modes may also be used for
+the condition code.  These modes are not used on machines that use
+@code{cc0} (@pxref{Condition Code}).
+
+@findex BLKmode
+@item BLKmode
+``Block'' mode represents values that are aggregates to which none of
+the other modes apply.  In RTL, only memory references can have this mode,
+and only if they appear in string-move or vector instructions.  On machines
+which have no such instructions, @code{BLKmode} will not appear in RTL@.
+
+@findex VOIDmode
+@item VOIDmode
+Void mode means the absence of a mode or an unspecified mode.
+For example, RTL expressions of code @code{const_int} have mode
+@code{VOIDmode} because they can be taken to have whatever mode the context
+requires.  In debugging dumps of RTL, @code{VOIDmode} is expressed by
+the absence of any mode.
+
+@findex QCmode
+@findex HCmode
+@findex SCmode
+@findex DCmode
+@findex XCmode
+@findex TCmode
+@item QCmode, HCmode, SCmode, DCmode, XCmode, TCmode
+These modes stand for a complex number represented as a pair of floating
+point values.  The floating point values are in @code{QFmode},
+@code{HFmode}, @code{SFmode}, @code{DFmode}, @code{XFmode}, and
+@code{TFmode}, respectively.
+
+@findex CQImode
+@findex CHImode
+@findex CSImode
+@findex CDImode
+@findex CTImode
+@findex COImode
+@item CQImode, CHImode, CSImode, CDImode, CTImode, COImode
+These modes stand for a complex number represented as a pair of integer
+values.  The integer values are in @code{QImode}, @code{HImode},
+@code{SImode}, @code{DImode}, @code{TImode}, and @code{OImode},
+respectively.
+@end table
+
+The machine description defines @code{Pmode} as a C macro which expands
+into the machine mode used for addresses.  Normally this is the mode
+whose size is @code{BITS_PER_WORD}, @code{SImode} on 32-bit machines.
+
+The only modes which a machine description @i{must} support are
+@code{QImode}, and the modes corresponding to @code{BITS_PER_WORD},
+@code{FLOAT_TYPE_SIZE} and @code{DOUBLE_TYPE_SIZE}.
+The compiler will attempt to use @code{DImode} for 8-byte structures and
+unions, but this can be prevented by overriding the definition of
+@code{MAX_FIXED_MODE_SIZE}.  Alternatively, you can have the compiler
+use @code{TImode} for 16-byte structures and unions.  Likewise, you can
+arrange for the C type @code{short int} to avoid using @code{HImode}.
+
+@cindex mode classes
+Very few explicit references to machine modes remain in the compiler and
+these few references will soon be removed.  Instead, the machine modes
+are divided into mode classes.  These are represented by the enumeration
+type @code{enum mode_class} defined in @file{machmode.h}.  The possible
+mode classes are:
+
+@table @code
+@findex MODE_INT
+@item MODE_INT
+Integer modes.  By default these are @code{BImode}, @code{QImode},
+@code{HImode}, @code{SImode}, @code{DImode}, @code{TImode}, and
+@code{OImode}.
+
+@findex MODE_PARTIAL_INT
+@item MODE_PARTIAL_INT
+The ``partial integer'' modes, @code{PQImode}, @code{PHImode},
+@code{PSImode} and @code{PDImode}.
+
+@findex MODE_FLOAT
+@item MODE_FLOAT
+Floating point modes.  By default these are @code{QFmode},
+@code{HFmode}, @code{TQFmode}, @code{SFmode}, @code{DFmode},
+@code{XFmode} and @code{TFmode}.
+
+@findex MODE_DECIMAL_FLOAT
+@item MODE_DECIMAL_FLOAT
+Decimal floating point modes.  By default these are @code{SDmode},
+@code{DDmode} and @code{TDmode}.
+
+@findex MODE_FRACT
+@item MODE_FRACT
+Signed fractional modes.  By default these are @code{QQmode}, @code{HQmode},
+@code{SQmode}, @code{DQmode} and @code{TQmode}.
+
+@findex MODE_UFRACT
+@item MODE_UFRACT
+Unsigned fractional modes.  By default these are @code{UQQmode}, @code{UHQmode},
+@code{USQmode}, @code{UDQmode} and @code{UTQmode}.
+
+@findex MODE_ACCUM
+@item MODE_ACCUM
+Signed accumulator modes.  By default these are @code{HAmode},
+@code{SAmode}, @code{DAmode} and @code{TAmode}.
+
+@findex MODE_UACCUM
+@item MODE_UACCUM
+Unsigned accumulator modes.  By default these are @code{UHAmode},
+@code{USAmode}, @code{UDAmode} and @code{UTAmode}.
+
+@findex MODE_COMPLEX_INT
+@item MODE_COMPLEX_INT
+Complex integer modes.  (These are not currently implemented).
+
+@findex MODE_COMPLEX_FLOAT
+@item MODE_COMPLEX_FLOAT
+Complex floating point modes.  By default these are @code{QCmode},
+@code{HCmode}, @code{SCmode}, @code{DCmode}, @code{XCmode}, and
+@code{TCmode}.
+
+@findex MODE_FUNCTION
+@item MODE_FUNCTION
+Algol or Pascal function variables including a static chain.
+(These are not currently implemented).
+
+@findex MODE_CC
+@item MODE_CC
+Modes representing condition code values.  These are @code{CCmode} plus
+any @code{CC_MODE} modes listed in the @file{@var{machine}-modes.def}.  
+@xref{Jump Patterns},
+also see @ref{Condition Code}.
+
+@findex MODE_RANDOM
+@item MODE_RANDOM
+This is a catchall mode class for modes which don't fit into the above
+classes.  Currently @code{VOIDmode} and @code{BLKmode} are in
+@code{MODE_RANDOM}.
+@end table
+
+Here are some C macros that relate to machine modes:
+
+@table @code
+@findex GET_MODE
+@item GET_MODE (@var{x})
+Returns the machine mode of the RTX @var{x}.
+
+@findex PUT_MODE
+@item PUT_MODE (@var{x}, @var{newmode})
+Alters the machine mode of the RTX @var{x} to be @var{newmode}.
+
+@findex NUM_MACHINE_MODES
+@item NUM_MACHINE_MODES
+Stands for the number of machine modes available on the target
+machine.  This is one greater than the largest numeric value of any
+machine mode.
+
+@findex GET_MODE_NAME
+@item GET_MODE_NAME (@var{m})
+Returns the name of mode @var{m} as a string.
+
+@findex GET_MODE_CLASS
+@item GET_MODE_CLASS (@var{m})
+Returns the mode class of mode @var{m}.
+
+@findex GET_MODE_WIDER_MODE
+@item GET_MODE_WIDER_MODE (@var{m})
+Returns the next wider natural mode.  For example, the expression
+@code{GET_MODE_WIDER_MODE (QImode)} returns @code{HImode}.
+
+@findex GET_MODE_SIZE
+@item GET_MODE_SIZE (@var{m})
+Returns the size in bytes of a datum of mode @var{m}.
+
+@findex GET_MODE_BITSIZE
+@item GET_MODE_BITSIZE (@var{m})
+Returns the size in bits of a datum of mode @var{m}.
+
+@findex GET_MODE_IBIT
+@item GET_MODE_IBIT (@var{m})
+Returns the number of integral bits of a datum of fixed-point mode @var{m}.
+
+@findex GET_MODE_FBIT
+@item GET_MODE_FBIT (@var{m})
+Returns the number of fractional bits of a datum of fixed-point mode @var{m}.
+
+@findex GET_MODE_MASK
+@item GET_MODE_MASK (@var{m})
+Returns a bitmask containing 1 for all bits in a word that fit within
+mode @var{m}.  This macro can only be used for modes whose bitsize is
+less than or equal to @code{HOST_BITS_PER_INT}.
+
+@findex GET_MODE_ALIGNMENT
+@item GET_MODE_ALIGNMENT (@var{m})
+Return the required alignment, in bits, for an object of mode @var{m}.
+
+@findex GET_MODE_UNIT_SIZE
+@item GET_MODE_UNIT_SIZE (@var{m})
+Returns the size in bytes of the subunits of a datum of mode @var{m}.
+This is the same as @code{GET_MODE_SIZE} except in the case of complex
+modes.  For them, the unit size is the size of the real or imaginary
+part.
+
+@findex GET_MODE_NUNITS
+@item GET_MODE_NUNITS (@var{m})
+Returns the number of units contained in a mode, i.e.,
+@code{GET_MODE_SIZE} divided by @code{GET_MODE_UNIT_SIZE}.
+
+@findex GET_CLASS_NARROWEST_MODE
+@item GET_CLASS_NARROWEST_MODE (@var{c})
+Returns the narrowest mode in mode class @var{c}.
+@end table
+
+@findex byte_mode
+@findex word_mode
+The global variables @code{byte_mode} and @code{word_mode} contain modes
+whose classes are @code{MODE_INT} and whose bitsizes are either
+@code{BITS_PER_UNIT} or @code{BITS_PER_WORD}, respectively.  On 32-bit
+machines, these are @code{QImode} and @code{SImode}, respectively.
+
+@node Constants
+@section Constant Expression Types
+@cindex RTL constants
+@cindex RTL constant expression types
+
+The simplest RTL expressions are those that represent constant values.
+
+@table @code
+@findex const_int
+@item (const_int @var{i})
+This type of expression represents the integer value @var{i}.  @var{i}
+is customarily accessed with the macro @code{INTVAL} as in
+@code{INTVAL (@var{exp})}, which is equivalent to @code{XWINT (@var{exp}, 0)}.
+
+Constants generated for modes with fewer bits than @code{HOST_WIDE_INT}
+must be sign extended to full width (e.g., with @code{gen_int_mode}).
+
+@findex const0_rtx
+@findex const1_rtx
+@findex const2_rtx
+@findex constm1_rtx
+There is only one expression object for the integer value zero; it is
+the value of the variable @code{const0_rtx}.  Likewise, the only
+expression for integer value one is found in @code{const1_rtx}, the only
+expression for integer value two is found in @code{const2_rtx}, and the
+only expression for integer value negative one is found in
+@code{constm1_rtx}.  Any attempt to create an expression of code
+@code{const_int} and value zero, one, two or negative one will return
+@code{const0_rtx}, @code{const1_rtx}, @code{const2_rtx} or
+@code{constm1_rtx} as appropriate.
+
+@findex const_true_rtx
+Similarly, there is only one object for the integer whose value is
+@code{STORE_FLAG_VALUE}.  It is found in @code{const_true_rtx}.  If
+@code{STORE_FLAG_VALUE} is one, @code{const_true_rtx} and
+@code{const1_rtx} will point to the same object.  If
+@code{STORE_FLAG_VALUE} is @minus{}1, @code{const_true_rtx} and
+@code{constm1_rtx} will point to the same object.
+
+@findex const_double
+@item (const_double:@var{m} @var{i0} @var{i1} @dots{})
+Represents either a floating-point constant of mode @var{m} or an
+integer constant too large to fit into @code{HOST_BITS_PER_WIDE_INT}
+bits but small enough to fit within twice that number of bits (GCC
+does not provide a mechanism to represent even larger constants).  In
+the latter case, @var{m} will be @code{VOIDmode}.
+
+@findex CONST_DOUBLE_LOW
+If @var{m} is @code{VOIDmode}, the bits of the value are stored in
+@var{i0} and @var{i1}.  @var{i0} is customarily accessed with the macro
+@code{CONST_DOUBLE_LOW} and @var{i1} with @code{CONST_DOUBLE_HIGH}.
+
+If the constant is floating point (regardless of its precision), then
+the number of integers used to store the value depends on the size of
+@code{REAL_VALUE_TYPE} (@pxref{Floating Point}).  The integers
+represent a floating point number, but not precisely in the target
+machine's or host machine's floating point format.  To convert them to
+the precise bit pattern used by the target machine, use the macro
+@code{REAL_VALUE_TO_TARGET_DOUBLE} and friends (@pxref{Data Output}).
+
+@findex const_fixed
+@item (const_fixed:@var{m} @dots{})
+Represents a fixed-point constant of mode @var{m}.
+The operand is a data structure of type @code{struct fixed_value} and
+is accessed with the macro @code{CONST_FIXED_VALUE}.  The high part of
+data is accessed with @code{CONST_FIXED_VALUE_HIGH}; the low part is
+accessed with @code{CONST_FIXED_VALUE_LOW}.
+
+@findex const_vector
+@item (const_vector:@var{m} [@var{x0} @var{x1} @dots{}])
+Represents a vector constant.  The square brackets stand for the vector
+containing the constant elements.  @var{x0}, @var{x1} and so on are
+the @code{const_int}, @code{const_double} or @code{const_fixed} elements.
+
+The number of units in a @code{const_vector} is obtained with the macro
+@code{CONST_VECTOR_NUNITS} as in @code{CONST_VECTOR_NUNITS (@var{v})}.
+
+Individual elements in a vector constant are accessed with the macro
+@code{CONST_VECTOR_ELT} as in @code{CONST_VECTOR_ELT (@var{v}, @var{n})}
+where @var{v} is the vector constant and @var{n} is the element
+desired.
+
+@findex const_string
+@item (const_string @var{str})
+Represents a constant string with value @var{str}.  Currently this is
+used only for insn attributes (@pxref{Insn Attributes}) since constant
+strings in C are placed in memory.
+
+@findex symbol_ref
+@item (symbol_ref:@var{mode} @var{symbol})
+Represents the value of an assembler label for data.  @var{symbol} is
+a string that describes the name of the assembler label.  If it starts
+with a @samp{*}, the label is the rest of @var{symbol} not including
+the @samp{*}.  Otherwise, the label is @var{symbol}, usually prefixed
+with @samp{_}.
+
+The @code{symbol_ref} contains a mode, which is usually @code{Pmode}.
+Usually that is the only mode for which a symbol is directly valid.
+
+@findex label_ref
+@item (label_ref:@var{mode} @var{label})
+Represents the value of an assembler label for code.  It contains one
+operand, an expression, which must be a @code{code_label} or a @code{note}
+of type @code{NOTE_INSN_DELETED_LABEL} that appears in the instruction
+sequence to identify the place where the label should go.
+
+The reason for using a distinct expression type for code label
+references is so that jump optimization can distinguish them.
+
+The @code{label_ref} contains a mode, which is usually @code{Pmode}.
+Usually that is the only mode for which a label is directly valid.
+
+@findex const
+@item (const:@var{m} @var{exp})
+Represents a constant that is the result of an assembly-time
+arithmetic computation.  The operand, @var{exp}, is an expression that
+contains only constants (@code{const_int}, @code{symbol_ref} and
+@code{label_ref} expressions) combined with @code{plus} and
+@code{minus}.  However, not all combinations are valid, since the
+assembler cannot do arbitrary arithmetic on relocatable symbols.
+
+@var{m} should be @code{Pmode}.
+
+@findex high
+@item (high:@var{m} @var{exp})
+Represents the high-order bits of @var{exp}, usually a
+@code{symbol_ref}.  The number of bits is machine-dependent and is
+normally the number of bits specified in an instruction that initializes
+the high order bits of a register.  It is used with @code{lo_sum} to
+represent the typical two-instruction sequence used in RISC machines to
+reference a global memory location.
+
+@var{m} should be @code{Pmode}.
+@end table
+
+@findex CONST0_RTX
+@findex CONST1_RTX
+@findex CONST2_RTX
+The macro @code{CONST0_RTX (@var{mode})} refers to an expression with
+value 0 in mode @var{mode}.  If mode @var{mode} is of mode class
+@code{MODE_INT}, it returns @code{const0_rtx}.  If mode @var{mode} is of
+mode class @code{MODE_FLOAT}, it returns a @code{CONST_DOUBLE}
+expression in mode @var{mode}.  Otherwise, it returns a
+@code{CONST_VECTOR} expression in mode @var{mode}.  Similarly, the macro
+@code{CONST1_RTX (@var{mode})} refers to an expression with value 1 in
+mode @var{mode} and similarly for @code{CONST2_RTX}.  The
+@code{CONST1_RTX} and @code{CONST2_RTX} macros are undefined
+for vector modes.
+
+@node Regs and Memory
+@section Registers and Memory
+@cindex RTL register expressions
+@cindex RTL memory expressions
+
+Here are the RTL expression types for describing access to machine
+registers and to main memory.
+
+@table @code
+@findex reg
+@cindex hard registers
+@cindex pseudo registers
+@item (reg:@var{m} @var{n})
+For small values of the integer @var{n} (those that are less than
+@code{FIRST_PSEUDO_REGISTER}), this stands for a reference to machine
+register number @var{n}: a @dfn{hard register}.  For larger values of
+@var{n}, it stands for a temporary value or @dfn{pseudo register}.
+The compiler's strategy is to generate code assuming an unlimited
+number of such pseudo registers, and later convert them into hard
+registers or into memory references.
+
+@var{m} is the machine mode of the reference.  It is necessary because
+machines can generally refer to each register in more than one mode.
+For example, a register may contain a full word but there may be
+instructions to refer to it as a half word or as a single byte, as
+well as instructions to refer to it as a floating point number of
+various precisions.
+
+Even for a register that the machine can access in only one mode,
+the mode must always be specified.
+
+The symbol @code{FIRST_PSEUDO_REGISTER} is defined by the machine
+description, since the number of hard registers on the machine is an
+invariant characteristic of the machine.  Note, however, that not
+all of the machine registers must be general registers.  All the
+machine registers that can be used for storage of data are given
+hard register numbers, even those that can be used only in certain
+instructions or can hold only certain types of data.
+
+A hard register may be accessed in various modes throughout one
+function, but each pseudo register is given a natural mode
+and is accessed only in that mode.  When it is necessary to describe
+an access to a pseudo register using a nonnatural mode, a @code{subreg}
+expression is used.
+
+A @code{reg} expression with a machine mode that specifies more than
+one word of data may actually stand for several consecutive registers.
+If in addition the register number specifies a hardware register, then
+it actually represents several consecutive hardware registers starting
+with the specified one.
+
+Each pseudo register number used in a function's RTL code is
+represented by a unique @code{reg} expression.
+
+@findex FIRST_VIRTUAL_REGISTER
+@findex LAST_VIRTUAL_REGISTER
+Some pseudo register numbers, those within the range of
+@code{FIRST_VIRTUAL_REGISTER} to @code{LAST_VIRTUAL_REGISTER} only
+appear during the RTL generation phase and are eliminated before the
+optimization phases.  These represent locations in the stack frame that
+cannot be determined until RTL generation for the function has been
+completed.  The following virtual register numbers are defined:
+
+@table @code
+@findex VIRTUAL_INCOMING_ARGS_REGNUM
+@item VIRTUAL_INCOMING_ARGS_REGNUM
+This points to the first word of the incoming arguments passed on the
+stack.  Normally these arguments are placed there by the caller, but the
+callee may have pushed some arguments that were previously passed in
+registers.
+
+@cindex @code{FIRST_PARM_OFFSET} and virtual registers
+@cindex @code{ARG_POINTER_REGNUM} and virtual registers
+When RTL generation is complete, this virtual register is replaced
+by the sum of the register given by @code{ARG_POINTER_REGNUM} and the
+value of @code{FIRST_PARM_OFFSET}.
+
+@findex VIRTUAL_STACK_VARS_REGNUM
+@cindex @code{FRAME_GROWS_DOWNWARD} and virtual registers
+@item VIRTUAL_STACK_VARS_REGNUM
+If @code{FRAME_GROWS_DOWNWARD} is defined to a nonzero value, this points
+to immediately above the first variable on the stack.  Otherwise, it points
+to the first variable on the stack.
+
+@cindex @code{STARTING_FRAME_OFFSET} and virtual registers
+@cindex @code{FRAME_POINTER_REGNUM} and virtual registers
+@code{VIRTUAL_STACK_VARS_REGNUM} is replaced with the sum of the
+register given by @code{FRAME_POINTER_REGNUM} and the value
+@code{STARTING_FRAME_OFFSET}.
+
+@findex VIRTUAL_STACK_DYNAMIC_REGNUM
+@item VIRTUAL_STACK_DYNAMIC_REGNUM
+This points to the location of dynamically allocated memory on the stack
+immediately after the stack pointer has been adjusted by the amount of
+memory desired.
+
+@cindex @code{STACK_DYNAMIC_OFFSET} and virtual registers
+@cindex @code{STACK_POINTER_REGNUM} and virtual registers
+This virtual register is replaced by the sum of the register given by
+@code{STACK_POINTER_REGNUM} and the value @code{STACK_DYNAMIC_OFFSET}.
+
+@findex VIRTUAL_OUTGOING_ARGS_REGNUM
+@item VIRTUAL_OUTGOING_ARGS_REGNUM
+This points to the location in the stack at which outgoing arguments
+should be written when the stack is pre-pushed (arguments pushed using
+push insns should always use @code{STACK_POINTER_REGNUM}).
+
+@cindex @code{STACK_POINTER_OFFSET} and virtual registers
+This virtual register is replaced by the sum of the register given by
+@code{STACK_POINTER_REGNUM} and the value @code{STACK_POINTER_OFFSET}.
+@end table
+
+@findex subreg
+@item (subreg:@var{m1} @var{reg:m2} @var{bytenum})
+
+@code{subreg} expressions are used to refer to a register in a machine
+mode other than its natural one, or to refer to one register of
+a multi-part @code{reg} that actually refers to several registers.
+
+Each pseudo register has a natural mode.  If it is necessary to
+operate on it in a different mode, the register must be
+enclosed in a @code{subreg}.  
+
+There are currently three supported types for the first operand of a
+@code{subreg}:
+@itemize
+@item pseudo registers
+This is the most common case.  Most @code{subreg}s have pseudo
+@code{reg}s as their first operand.
+
+@item mem
+@code{subreg}s of @code{mem} were common in earlier versions of GCC and
+are still supported.  During the reload pass these are replaced by plain
+@code{mem}s.  On machines that do not do instruction scheduling, use of
+@code{subreg}s of @code{mem} are still used, but this is no longer
+recommended.  Such @code{subreg}s are considered to be
+@code{register_operand}s rather than @code{memory_operand}s before and
+during reload.  Because of this, the scheduling passes cannot properly
+schedule instructions with @code{subreg}s of @code{mem}, so for machines
+that do scheduling, @code{subreg}s of @code{mem} should never be used.
+To support this, the combine and recog passes have explicit code to
+inhibit the creation of @code{subreg}s of @code{mem} when
+@code{INSN_SCHEDULING} is defined.
+
+The use of @code{subreg}s of @code{mem} after the reload pass is an area
+that is not well understood and should be avoided.  There is still some
+code in the compiler to support this, but this code has possibly rotted.
+This use of @code{subreg}s is discouraged and will most likely not be
+supported in the future.
+
+@item hard registers
+It is seldom necessary to wrap hard registers in @code{subreg}s; such
+registers would normally reduce to a single @code{reg} rtx.  This use of
+@code{subreg}s is discouraged and may not be supported in the future.
+
+@end itemize
+
+@code{subreg}s of @code{subreg}s are not supported.  Using
+@code{simplify_gen_subreg} is the recommended way to avoid this problem.
+
+@code{subreg}s come in two distinct flavors, each having its own
+usage and rules:
+
+@table @asis
+@item Paradoxical subregs
+When @var{m1} is strictly wider than @var{m2}, the @code{subreg}
+expression is called @dfn{paradoxical}.  The canonical test for this
+class of @code{subreg} is:
+
+@smallexample
+GET_MODE_SIZE (@var{m1}) > GET_MODE_SIZE (@var{m2})
+@end smallexample
+
+Paradoxical @code{subreg}s can be used as both lvalues and rvalues.
+When used as an lvalue, the low-order bits of the source value
+are stored in @var{reg} and the high-order bits are discarded.
+When used as an rvalue, the low-order bits of the @code{subreg} are
+taken from @var{reg} while the high-order bits may or may not be
+defined.  
+
+The high-order bits of rvalues are in the following circumstances:
+
+@itemize
+@item @code{subreg}s of @code{mem}
+When @var{m2} is smaller than a word, the macro @code{LOAD_EXTEND_OP},
+can control how the high-order bits are defined.
+
+@item @code{subreg} of @code{reg}s
+The upper bits are defined when @code{SUBREG_PROMOTED_VAR_P} is true.
+@code{SUBREG_PROMOTED_UNSIGNED_P} describes what the upper bits hold.
+Such subregs usually represent local variables, register variables
+and parameter pseudo variables that have been promoted to a wider mode.
+
+@end itemize
+
+@var{bytenum} is always zero for a paradoxical @code{subreg}, even on
+big-endian targets.
+
+For example, the paradoxical @code{subreg}:
+
+@smallexample
+(set (subreg:SI (reg:HI @var{x}) 0) @var{y})
+@end smallexample
+
+stores the lower 2 bytes of @var{y} in @var{x} and discards the upper
+2 bytes.  A subsequent:
+
+@smallexample
+(set @var{z} (subreg:SI (reg:HI @var{x}) 0))
+@end smallexample
+
+would set the lower two bytes of @var{z} to @var{y} and set the upper
+two bytes to an unknown value assuming @code{SUBREG_PROMOTED_VAR_P} is
+false.
+
+@item Normal subregs 
+When @var{m1} is at least as narrow as @var{m2} the @code{subreg}
+expression is called @dfn{normal}.
+
+Normal @code{subreg}s restrict consideration to certain bits of
+@var{reg}.  There are two cases.  If @var{m1} is smaller than a word,
+the @code{subreg} refers to the least-significant part (or
+@dfn{lowpart}) of one word of @var{reg}.  If @var{m1} is word-sized or
+greater, the @code{subreg} refers to one or more complete words.
+
+When used as an lvalue, @code{subreg} is a word-based accessor.
+Storing to a @code{subreg} modifies all the words of @var{reg} that
+overlap the @code{subreg}, but it leaves the other words of @var{reg}
+alone.
+
+When storing to a normal @code{subreg} that is smaller than a word,
+the other bits of the referenced word are usually left in an undefined
+state.  This laxity makes it easier to generate efficient code for
+such instructions.  To represent an instruction that preserves all the
+bits outside of those in the @code{subreg}, use @code{strict_low_part}
+or @code{zero_extract} around the @code{subreg}.
+
+@var{bytenum} must identify the offset of the first byte of the
+@code{subreg} from the start of @var{reg}, assuming that @var{reg} is
+laid out in memory order.  The memory order of bytes is defined by
+two target macros, @code{WORDS_BIG_ENDIAN} and @code{BYTES_BIG_ENDIAN}:
+
+@itemize
+@item
+@cindex @code{WORDS_BIG_ENDIAN}, effect on @code{subreg}
+@code{WORDS_BIG_ENDIAN}, if set to 1, says that byte number zero is
+part of the most significant word; otherwise, it is part of the least
+significant word.
+
+@item
+@cindex @code{BYTES_BIG_ENDIAN}, effect on @code{subreg}
+@code{BYTES_BIG_ENDIAN}, if set to 1, says that byte number zero is
+the most significant byte within a word; otherwise, it is the least
+significant byte within a word.
+@end itemize
+
+@cindex @code{FLOAT_WORDS_BIG_ENDIAN}, (lack of) effect on @code{subreg}
+On a few targets, @code{FLOAT_WORDS_BIG_ENDIAN} disagrees with
+@code{WORDS_BIG_ENDIAN}.  However, most parts of the compiler treat
+floating point values as if they had the same endianness as integer
+values.  This works because they handle them solely as a collection of
+integer values, with no particular numerical value.  Only real.c and
+the runtime libraries care about @code{FLOAT_WORDS_BIG_ENDIAN}.
+
+Thus, 
+
+@smallexample
+(subreg:HI (reg:SI @var{x}) 2)
+@end smallexample
+
+on a @code{BYTES_BIG_ENDIAN}, @samp{UNITS_PER_WORD == 4} target is the same as
+
+@smallexample
+(subreg:HI (reg:SI @var{x}) 0)
+@end smallexample
+
+on a little-endian, @samp{UNITS_PER_WORD == 4} target.  Both
+@code{subreg}s access the lower two bytes of register @var{x}.
+
+@end table
+
+A @code{MODE_PARTIAL_INT} mode behaves as if it were as wide as the
+corresponding @code{MODE_INT} mode, except that it has an unknown
+number of undefined bits.  For example:
+
+@smallexample
+(subreg:PSI (reg:SI 0) 0)
+@end smallexample
+
+accesses the whole of @samp{(reg:SI 0)}, but the exact relationship
+between the @code{PSImode} value and the @code{SImode} value is not
+defined.  If we assume @samp{UNITS_PER_WORD <= 4}, then the following
+two @code{subreg}s:
+
+@smallexample
+(subreg:PSI (reg:DI 0) 0)
+(subreg:PSI (reg:DI 0) 4)
+@end smallexample
+
+represent independent 4-byte accesses to the two halves of
+@samp{(reg:DI 0)}.  Both @code{subreg}s have an unknown number
+of undefined bits.
+
+If @samp{UNITS_PER_WORD <= 2} then these two @code{subreg}s:
+
+@smallexample
+(subreg:HI (reg:PSI 0) 0)
+(subreg:HI (reg:PSI 0) 2)
+@end smallexample
+
+represent independent 2-byte accesses that together span the whole
+of @samp{(reg:PSI 0)}.  Storing to the first @code{subreg} does not
+affect the value of the second, and vice versa.  @samp{(reg:PSI 0)}
+has an unknown number of undefined bits, so the assignment:
+
+@smallexample
+(set (subreg:HI (reg:PSI 0) 0) (reg:HI 4))
+@end smallexample
+
+does not guarantee that @samp{(subreg:HI (reg:PSI 0) 0)} has the
+value @samp{(reg:HI 4)}.
+
+@cindex @code{CANNOT_CHANGE_MODE_CLASS} and subreg semantics
+The rules above apply to both pseudo @var{reg}s and hard @var{reg}s.
+If the semantics are not correct for particular combinations of
+@var{m1}, @var{m2} and hard @var{reg}, the target-specific code
+must ensure that those combinations are never used.  For example:
+
+@smallexample
+CANNOT_CHANGE_MODE_CLASS (@var{m2}, @var{m1}, @var{class})
+@end smallexample
+
+must be true for every class @var{class} that includes @var{reg}.
+
+@findex SUBREG_REG
+@findex SUBREG_BYTE
+The first operand of a @code{subreg} expression is customarily accessed
+with the @code{SUBREG_REG} macro and the second operand is customarily
+accessed with the @code{SUBREG_BYTE} macro.
+
+It has been several years since a platform in which
+@code{BYTES_BIG_ENDIAN} not equal to @code{WORDS_BIG_ENDIAN} has
+been tested.  Anyone wishing to support such a platform in the future
+may be confronted with code rot.
+
+@findex scratch
+@cindex scratch operands
+@item (scratch:@var{m})
+This represents a scratch register that will be required for the
+execution of a single instruction and not used subsequently.  It is
+converted into a @code{reg} by either the local register allocator or
+the reload pass.
+
+@code{scratch} is usually present inside a @code{clobber} operation
+(@pxref{Side Effects}).
+
+@findex cc0
+@cindex condition code register
+@item (cc0)
+This refers to the machine's condition code register.  It has no
+operands and may not have a machine mode.  There are two ways to use it:
+
+@itemize @bullet
+@item
+To stand for a complete set of condition code flags.  This is best on
+most machines, where each comparison sets the entire series of flags.
+
+With this technique, @code{(cc0)} may be validly used in only two
+contexts: as the destination of an assignment (in test and compare
+instructions) and in comparison operators comparing against zero
+(@code{const_int} with value zero; that is to say, @code{const0_rtx}).
+
+@item
+To stand for a single flag that is the result of a single condition.
+This is useful on machines that have only a single flag bit, and in
+which comparison instructions must specify the condition to test.
+
+With this technique, @code{(cc0)} may be validly used in only two
+contexts: as the destination of an assignment (in test and compare
+instructions) where the source is a comparison operator, and as the
+first operand of @code{if_then_else} (in a conditional branch).
+@end itemize
+
+@findex cc0_rtx
+There is only one expression object of code @code{cc0}; it is the
+value of the variable @code{cc0_rtx}.  Any attempt to create an
+expression of code @code{cc0} will return @code{cc0_rtx}.
+
+Instructions can set the condition code implicitly.  On many machines,
+nearly all instructions set the condition code based on the value that
+they compute or store.  It is not necessary to record these actions
+explicitly in the RTL because the machine description includes a
+prescription for recognizing the instructions that do so (by means of
+the macro @code{NOTICE_UPDATE_CC}).  @xref{Condition Code}.  Only
+instructions whose sole purpose is to set the condition code, and
+instructions that use the condition code, need mention @code{(cc0)}.
+
+On some machines, the condition code register is given a register number
+and a @code{reg} is used instead of @code{(cc0)}.  This is usually the
+preferable approach if only a small subset of instructions modify the
+condition code.  Other machines store condition codes in general
+registers; in such cases a pseudo register should be used.
+
+Some machines, such as the SPARC and RS/6000, have two sets of
+arithmetic instructions, one that sets and one that does not set the
+condition code.  This is best handled by normally generating the
+instruction that does not set the condition code, and making a pattern
+that both performs the arithmetic and sets the condition code register
+(which would not be @code{(cc0)} in this case).  For examples, search
+for @samp{addcc} and @samp{andcc} in @file{sparc.md}.
+
+@findex pc
+@item (pc)
+@cindex program counter
+This represents the machine's program counter.  It has no operands and
+may not have a machine mode.  @code{(pc)} may be validly used only in
+certain specific contexts in jump instructions.
+
+@findex pc_rtx
+There is only one expression object of code @code{pc}; it is the value
+of the variable @code{pc_rtx}.  Any attempt to create an expression of
+code @code{pc} will return @code{pc_rtx}.
+
+All instructions that do not jump alter the program counter implicitly
+by incrementing it, but there is no need to mention this in the RTL@.
+
+@findex mem
+@item (mem:@var{m} @var{addr} @var{alias})
+This RTX represents a reference to main memory at an address
+represented by the expression @var{addr}.  @var{m} specifies how large
+a unit of memory is accessed.  @var{alias} specifies an alias set for the
+reference.  In general two items are in different alias sets if they cannot
+reference the same memory address.
+
+The construct @code{(mem:BLK (scratch))} is considered to alias all
+other memories.  Thus it may be used as a memory barrier in epilogue
+stack deallocation patterns.
+
+@findex concat
+@item (concat@var{m} @var{rtx} @var{rtx})
+This RTX represents the concatenation of two other RTXs.  This is used
+for complex values.  It should only appear in the RTL attached to
+declarations and during RTL generation.  It should not appear in the
+ordinary insn chain.
+
+@findex concatn
+@item (concatn@var{m} [@var{rtx} @dots{}])
+This RTX represents the concatenation of all the @var{rtx} to make a
+single value.  Like @code{concat}, this should only appear in
+declarations, and not in the insn chain.
+@end table
+
+@node Arithmetic
+@section RTL Expressions for Arithmetic
+@cindex arithmetic, in RTL
+@cindex math, in RTL
+@cindex RTL expressions for arithmetic
+
+Unless otherwise specified, all the operands of arithmetic expressions
+must be valid for mode @var{m}.  An operand is valid for mode @var{m}
+if it has mode @var{m}, or if it is a @code{const_int} or
+@code{const_double} and @var{m} is a mode of class @code{MODE_INT}.
+
+For commutative binary operations, constants should be placed in the
+second operand.
+
+@table @code
+@findex plus
+@findex ss_plus
+@findex us_plus
+@cindex RTL sum
+@cindex RTL addition
+@cindex RTL addition with signed saturation
+@cindex RTL addition with unsigned saturation
+@item (plus:@var{m} @var{x} @var{y})
+@itemx (ss_plus:@var{m} @var{x} @var{y})
+@itemx (us_plus:@var{m} @var{x} @var{y})
+
+These three expressions all represent the sum of the values
+represented by @var{x} and @var{y} carried out in machine mode
+@var{m}.  They differ in their behavior on overflow of integer modes.
+@code{plus} wraps round modulo the width of @var{m}; @code{ss_plus}
+saturates at the maximum signed value representable in @var{m};
+@code{us_plus} saturates at the maximum unsigned value.
+
+@c ??? What happens on overflow of floating point modes?
+
+@findex lo_sum
+@item (lo_sum:@var{m} @var{x} @var{y})
+
+This expression represents the sum of @var{x} and the low-order bits
+of @var{y}.  It is used with @code{high} (@pxref{Constants}) to
+represent the typical two-instruction sequence used in RISC machines
+to reference a global memory location.
+
+The number of low order bits is machine-dependent but is
+normally the number of bits in a @code{Pmode} item minus the number of
+bits set by @code{high}.
+
+@var{m} should be @code{Pmode}.
+
+@findex minus
+@findex ss_minus
+@findex us_minus
+@cindex RTL difference
+@cindex RTL subtraction
+@cindex RTL subtraction with signed saturation
+@cindex RTL subtraction with unsigned saturation
+@item (minus:@var{m} @var{x} @var{y})
+@itemx (ss_minus:@var{m} @var{x} @var{y})
+@itemx (us_minus:@var{m} @var{x} @var{y})
+
+These three expressions represent the result of subtracting @var{y}
+from @var{x}, carried out in mode @var{M}.  Behavior on overflow is
+the same as for the three variants of @code{plus} (see above).
+
+@findex compare
+@cindex RTL comparison
+@item (compare:@var{m} @var{x} @var{y})
+Represents the result of subtracting @var{y} from @var{x} for purposes
+of comparison.  The result is computed without overflow, as if with
+infinite precision.
+
+Of course, machines can't really subtract with infinite precision.
+However, they can pretend to do so when only the sign of the result will
+be used, which is the case when the result is stored in the condition
+code.  And that is the @emph{only} way this kind of expression may
+validly be used: as a value to be stored in the condition codes, either
+@code{(cc0)} or a register.  @xref{Comparisons}.
+
+The mode @var{m} is not related to the modes of @var{x} and @var{y}, but
+instead is the mode of the condition code value.  If @code{(cc0)} is
+used, it is @code{VOIDmode}.  Otherwise it is some mode in class
+@code{MODE_CC}, often @code{CCmode}.  @xref{Condition Code}.  If @var{m}
+is @code{VOIDmode} or @code{CCmode}, the operation returns sufficient
+information (in an unspecified format) so that any comparison operator
+can be applied to the result of the @code{COMPARE} operation.  For other
+modes in class @code{MODE_CC}, the operation only returns a subset of
+this information.
+
+Normally, @var{x} and @var{y} must have the same mode.  Otherwise,
+@code{compare} is valid only if the mode of @var{x} is in class
+@code{MODE_INT} and @var{y} is a @code{const_int} or
+@code{const_double} with mode @code{VOIDmode}.  The mode of @var{x}
+determines what mode the comparison is to be done in; thus it must not
+be @code{VOIDmode}.
+
+If one of the operands is a constant, it should be placed in the
+second operand and the comparison code adjusted as appropriate.
+
+A @code{compare} specifying two @code{VOIDmode} constants is not valid
+since there is no way to know in what mode the comparison is to be
+performed; the comparison must either be folded during the compilation
+or the first operand must be loaded into a register while its mode is
+still known.
+
+@findex neg
+@findex ss_neg
+@findex us_neg
+@cindex negation
+@cindex negation with signed saturation
+@cindex negation with unsigned saturation
+@item (neg:@var{m} @var{x})
+@itemx (ss_neg:@var{m} @var{x})
+@itemx (us_neg:@var{m} @var{x})
+These two expressions represent the negation (subtraction from zero) of
+the value represented by @var{x}, carried out in mode @var{m}.  They
+differ in the behavior on overflow of integer modes.  In the case of
+@code{neg}, the negation of the operand may be a number not representable
+in mode @var{m}, in which case it is truncated to @var{m}.  @code{ss_neg}
+and @code{us_neg} ensure that an out-of-bounds result saturates to the
+maximum or minimum signed or unsigned value.
+
+@findex mult
+@findex ss_mult
+@findex us_mult
+@cindex multiplication
+@cindex product
+@cindex multiplication with signed saturation
+@cindex multiplication with unsigned saturation
+@item (mult:@var{m} @var{x} @var{y})
+@itemx (ss_mult:@var{m} @var{x} @var{y})
+@itemx (us_mult:@var{m} @var{x} @var{y})
+Represents the signed product of the values represented by @var{x} and
+@var{y} carried out in machine mode @var{m}.
+@code{ss_mult} and @code{us_mult} ensure that an out-of-bounds result
+saturates to the maximum or minimum signed or unsigned value.
+
+Some machines support a multiplication that generates a product wider
+than the operands.  Write the pattern for this as
+
+@smallexample
+(mult:@var{m} (sign_extend:@var{m} @var{x}) (sign_extend:@var{m} @var{y}))
+@end smallexample
+
+where @var{m} is wider than the modes of @var{x} and @var{y}, which need
+not be the same.
+
+For unsigned widening multiplication, use the same idiom, but with
+@code{zero_extend} instead of @code{sign_extend}.
+
+@findex fma
+@item (fma:@var{m} @var{x} @var{y} @var{z})
+Represents the @code{fma}, @code{fmaf}, and @code{fmal} builtin
+functions that do a combined multiply of @var{x} and @var{y} and then
+adding to@var{z} without doing an intermediate rounding step.
+
+@findex div
+@findex ss_div
+@cindex division
+@cindex signed division
+@cindex signed division with signed saturation
+@cindex quotient
+@item (div:@var{m} @var{x} @var{y})
+@itemx (ss_div:@var{m} @var{x} @var{y})
+Represents the quotient in signed division of @var{x} by @var{y},
+carried out in machine mode @var{m}.  If @var{m} is a floating point
+mode, it represents the exact quotient; otherwise, the integerized
+quotient.
+@code{ss_div} ensures that an out-of-bounds result saturates to the maximum
+or minimum signed value.
+
+Some machines have division instructions in which the operands and
+quotient widths are not all the same; you should represent
+such instructions using @code{truncate} and @code{sign_extend} as in,
+
+@smallexample
+(truncate:@var{m1} (div:@var{m2} @var{x} (sign_extend:@var{m2} @var{y})))
+@end smallexample
+
+@findex udiv
+@cindex unsigned division
+@cindex unsigned division with unsigned saturation
+@cindex division
+@item (udiv:@var{m} @var{x} @var{y})
+@itemx (us_div:@var{m} @var{x} @var{y})
+Like @code{div} but represents unsigned division.
+@code{us_div} ensures that an out-of-bounds result saturates to the maximum
+or minimum unsigned value.
+
+@findex mod
+@findex umod
+@cindex remainder
+@cindex division
+@item (mod:@var{m} @var{x} @var{y})
+@itemx (umod:@var{m} @var{x} @var{y})
+Like @code{div} and @code{udiv} but represent the remainder instead of
+the quotient.
+
+@findex smin
+@findex smax
+@cindex signed minimum
+@cindex signed maximum
+@item (smin:@var{m} @var{x} @var{y})
+@itemx (smax:@var{m} @var{x} @var{y})
+Represents the smaller (for @code{smin}) or larger (for @code{smax}) of
+@var{x} and @var{y}, interpreted as signed values in mode @var{m}.
+When used with floating point, if both operands are zeros, or if either
+operand is @code{NaN}, then it is unspecified which of the two operands
+is returned as the result.
+
+@findex umin
+@findex umax
+@cindex unsigned minimum and maximum
+@item (umin:@var{m} @var{x} @var{y})
+@itemx (umax:@var{m} @var{x} @var{y})
+Like @code{smin} and @code{smax}, but the values are interpreted as unsigned
+integers.
+
+@findex not
+@cindex complement, bitwise
+@cindex bitwise complement
+@item (not:@var{m} @var{x})
+Represents the bitwise complement of the value represented by @var{x},
+carried out in mode @var{m}, which must be a fixed-point machine mode.
+
+@findex and
+@cindex logical-and, bitwise
+@cindex bitwise logical-and
+@item (and:@var{m} @var{x} @var{y})
+Represents the bitwise logical-and of the values represented by
+@var{x} and @var{y}, carried out in machine mode @var{m}, which must be
+a fixed-point machine mode.
+
+@findex ior
+@cindex inclusive-or, bitwise
+@cindex bitwise inclusive-or
+@item (ior:@var{m} @var{x} @var{y})
+Represents the bitwise inclusive-or of the values represented by @var{x}
+and @var{y}, carried out in machine mode @var{m}, which must be a
+fixed-point mode.
+
+@findex xor
+@cindex exclusive-or, bitwise
+@cindex bitwise exclusive-or
+@item (xor:@var{m} @var{x} @var{y})
+Represents the bitwise exclusive-or of the values represented by @var{x}
+and @var{y}, carried out in machine mode @var{m}, which must be a
+fixed-point mode.
+
+@findex ashift
+@findex ss_ashift
+@findex us_ashift
+@cindex left shift
+@cindex shift
+@cindex arithmetic shift
+@cindex arithmetic shift with signed saturation
+@cindex arithmetic shift with unsigned saturation
+@item (ashift:@var{m} @var{x} @var{c})
+@itemx (ss_ashift:@var{m} @var{x} @var{c})
+@itemx (us_ashift:@var{m} @var{x} @var{c})
+These three expressions represent the result of arithmetically shifting @var{x}
+left by @var{c} places.  They differ in their behavior on overflow of integer
+modes.  An @code{ashift} operation is a plain shift with no special behavior
+in case of a change in the sign bit; @code{ss_ashift} and @code{us_ashift}
+saturates to the minimum or maximum representable value if any of the bits
+shifted out differs from the final sign bit.
+
+@var{x} have mode @var{m}, a fixed-point machine mode.  @var{c}
+be a fixed-point mode or be a constant with mode @code{VOIDmode}; which
+mode is determined by the mode called for in the machine description
+entry for the left-shift instruction.  For example, on the VAX, the mode
+of @var{c} is @code{QImode} regardless of @var{m}.
+
+@findex lshiftrt
+@cindex right shift
+@findex ashiftrt
+@item (lshiftrt:@var{m} @var{x} @var{c})
+@itemx (ashiftrt:@var{m} @var{x} @var{c})
+Like @code{ashift} but for right shift.  Unlike the case for left shift,
+these two operations are distinct.
+
+@findex rotate
+@cindex rotate
+@cindex left rotate
+@findex rotatert
+@cindex right rotate
+@item (rotate:@var{m} @var{x} @var{c})
+@itemx (rotatert:@var{m} @var{x} @var{c})
+Similar but represent left and right rotate.  If @var{c} is a constant,
+use @code{rotate}.
+
+@findex abs
+@findex ss_abs
+@cindex absolute value
+@item (abs:@var{m} @var{x})
+@item (ss_abs:@var{m} @var{x})
+Represents the absolute value of @var{x}, computed in mode @var{m}.
+@code{ss_abs} ensures that an out-of-bounds result saturates to the
+maximum signed value.
+
+
+@findex sqrt
+@cindex square root
+@item (sqrt:@var{m} @var{x})
+Represents the square root of @var{x}, computed in mode @var{m}.
+Most often @var{m} will be a floating point mode.
+
+@findex ffs
+@item (ffs:@var{m} @var{x})
+Represents one plus the index of the least significant 1-bit in
+@var{x}, represented as an integer of mode @var{m}.  (The value is
+zero if @var{x} is zero.)  The mode of @var{x} need not be @var{m};
+depending on the target machine, various mode combinations may be
+valid.
+
+@findex clz
+@item (clz:@var{m} @var{x})
+Represents the number of leading 0-bits in @var{x}, represented as an
+integer of mode @var{m}, starting at the most significant bit position.
+If @var{x} is zero, the value is determined by
+@code{CLZ_DEFINED_VALUE_AT_ZERO} (@pxref{Misc}).  Note that this is one of
+the few expressions that is not invariant under widening.  The mode of
+@var{x} will usually be an integer mode.
+
+@findex ctz
+@item (ctz:@var{m} @var{x})
+Represents the number of trailing 0-bits in @var{x}, represented as an
+integer of mode @var{m}, starting at the least significant bit position.
+If @var{x} is zero, the value is determined by
+@code{CTZ_DEFINED_VALUE_AT_ZERO} (@pxref{Misc}).  Except for this case,
+@code{ctz(x)} is equivalent to @code{ffs(@var{x}) - 1}.  The mode of
+@var{x} will usually be an integer mode.
+
+@findex popcount
+@item (popcount:@var{m} @var{x})
+Represents the number of 1-bits in @var{x}, represented as an integer of
+mode @var{m}.  The mode of @var{x} will usually be an integer mode.
+
+@findex parity
+@item (parity:@var{m} @var{x})
+Represents the number of 1-bits modulo 2 in @var{x}, represented as an
+integer of mode @var{m}.  The mode of @var{x} will usually be an integer
+mode.
+
+@findex bswap
+@item (bswap:@var{m} @var{x})
+Represents the value @var{x} with the order of bytes reversed, carried out
+in mode @var{m}, which must be a fixed-point machine mode.
+@end table
+
+@node Comparisons
+@section Comparison Operations
+@cindex RTL comparison operations
+
+Comparison operators test a relation on two operands and are considered
+to represent a machine-dependent nonzero value described by, but not
+necessarily equal to, @code{STORE_FLAG_VALUE} (@pxref{Misc})
+if the relation holds, or zero if it does not, for comparison operators
+whose results have a `MODE_INT' mode,
+@code{FLOAT_STORE_FLAG_VALUE} (@pxref{Misc}) if the relation holds, or
+zero if it does not, for comparison operators that return floating-point
+values, and a vector of either @code{VECTOR_STORE_FLAG_VALUE} (@pxref{Misc})
+if the relation holds, or of zeros if it does not, for comparison operators
+that return vector results.
+The mode of the comparison operation is independent of the mode
+of the data being compared.  If the comparison operation is being tested
+(e.g., the first operand of an @code{if_then_else}), the mode must be
+@code{VOIDmode}.
+
+@cindex condition codes
+There are two ways that comparison operations may be used.  The
+comparison operators may be used to compare the condition codes
+@code{(cc0)} against zero, as in @code{(eq (cc0) (const_int 0))}.  Such
+a construct actually refers to the result of the preceding instruction
+in which the condition codes were set.  The instruction setting the
+condition code must be adjacent to the instruction using the condition
+code; only @code{note} insns may separate them.
+
+Alternatively, a comparison operation may directly compare two data
+objects.  The mode of the comparison is determined by the operands; they
+must both be valid for a common machine mode.  A comparison with both
+operands constant would be invalid as the machine mode could not be
+deduced from it, but such a comparison should never exist in RTL due to
+constant folding.
+
+In the example above, if @code{(cc0)} were last set to
+@code{(compare @var{x} @var{y})}, the comparison operation is
+identical to @code{(eq @var{x} @var{y})}.  Usually only one style
+of comparisons is supported on a particular machine, but the combine
+pass will try to merge the operations to produce the @code{eq} shown
+in case it exists in the context of the particular insn involved.
+
+Inequality comparisons come in two flavors, signed and unsigned.  Thus,
+there are distinct expression codes @code{gt} and @code{gtu} for signed and
+unsigned greater-than.  These can produce different results for the same
+pair of integer values: for example, 1 is signed greater-than @minus{}1 but not
+unsigned greater-than, because @minus{}1 when regarded as unsigned is actually
+@code{0xffffffff} which is greater than 1.
+
+The signed comparisons are also used for floating point values.  Floating
+point comparisons are distinguished by the machine modes of the operands.
+
+@table @code
+@findex eq
+@cindex equal
+@item (eq:@var{m} @var{x} @var{y})
+@code{STORE_FLAG_VALUE} if the values represented by @var{x} and @var{y}
+are equal, otherwise 0.
+
+@findex ne
+@cindex not equal
+@item (ne:@var{m} @var{x} @var{y})
+@code{STORE_FLAG_VALUE} if the values represented by @var{x} and @var{y}
+are not equal, otherwise 0.
+
+@findex gt
+@cindex greater than
+@item (gt:@var{m} @var{x} @var{y})
+@code{STORE_FLAG_VALUE} if the @var{x} is greater than @var{y}.  If they
+are fixed-point, the comparison is done in a signed sense.
+
+@findex gtu
+@cindex greater than
+@cindex unsigned greater than
+@item (gtu:@var{m} @var{x} @var{y})
+Like @code{gt} but does unsigned comparison, on fixed-point numbers only.
+
+@findex lt
+@cindex less than
+@findex ltu
+@cindex unsigned less than
+@item (lt:@var{m} @var{x} @var{y})
+@itemx (ltu:@var{m} @var{x} @var{y})
+Like @code{gt} and @code{gtu} but test for ``less than''.
+
+@findex ge
+@cindex greater than
+@findex geu
+@cindex unsigned greater than
+@item (ge:@var{m} @var{x} @var{y})
+@itemx (geu:@var{m} @var{x} @var{y})
+Like @code{gt} and @code{gtu} but test for ``greater than or equal''.
+
+@findex le
+@cindex less than or equal
+@findex leu
+@cindex unsigned less than
+@item (le:@var{m} @var{x} @var{y})
+@itemx (leu:@var{m} @var{x} @var{y})
+Like @code{gt} and @code{gtu} but test for ``less than or equal''.
+
+@findex if_then_else
+@item (if_then_else @var{cond} @var{then} @var{else})
+This is not a comparison operation but is listed here because it is
+always used in conjunction with a comparison operation.  To be
+precise, @var{cond} is a comparison expression.  This expression
+represents a choice, according to @var{cond}, between the value
+represented by @var{then} and the one represented by @var{else}.
+
+On most machines, @code{if_then_else} expressions are valid only
+to express conditional jumps.
+
+@findex cond
+@item (cond [@var{test1} @var{value1} @var{test2} @var{value2} @dots{}] @var{default})
+Similar to @code{if_then_else}, but more general.  Each of @var{test1},
+@var{test2}, @dots{} is performed in turn.  The result of this expression is
+the @var{value} corresponding to the first nonzero test, or @var{default} if
+none of the tests are nonzero expressions.
+
+This is currently not valid for instruction patterns and is supported only
+for insn attributes.  @xref{Insn Attributes}.
+@end table
+
+@node Bit-Fields
+@section Bit-Fields
+@cindex bit-fields
+
+Special expression codes exist to represent bit-field instructions.
+
+@table @code
+@findex sign_extract
+@cindex @code{BITS_BIG_ENDIAN}, effect on @code{sign_extract}
+@item (sign_extract:@var{m} @var{loc} @var{size} @var{pos})
+This represents a reference to a sign-extended bit-field contained or
+starting in @var{loc} (a memory or register reference).  The bit-field
+is @var{size} bits wide and starts at bit @var{pos}.  The compilation
+option @code{BITS_BIG_ENDIAN} says which end of the memory unit
+@var{pos} counts from.
+
+If @var{loc} is in memory, its mode must be a single-byte integer mode.
+If @var{loc} is in a register, the mode to use is specified by the
+operand of the @code{insv} or @code{extv} pattern
+(@pxref{Standard Names}) and is usually a full-word integer mode,
+which is the default if none is specified.
+
+The mode of @var{pos} is machine-specific and is also specified
+in the @code{insv} or @code{extv} pattern.
+
+The mode @var{m} is the same as the mode that would be used for
+@var{loc} if it were a register.
+
+A @code{sign_extract} can not appear as an lvalue, or part thereof,
+in RTL.
+
+@findex zero_extract
+@item (zero_extract:@var{m} @var{loc} @var{size} @var{pos})
+Like @code{sign_extract} but refers to an unsigned or zero-extended
+bit-field.  The same sequence of bits are extracted, but they
+are filled to an entire word with zeros instead of by sign-extension.
+
+Unlike @code{sign_extract}, this type of expressions can be lvalues
+in RTL; they may appear on the left side of an assignment, indicating
+insertion of a value into the specified bit-field.
+@end table
+
+@node Vector Operations
+@section Vector Operations
+@cindex vector operations
+
+All normal RTL expressions can be used with vector modes; they are
+interpreted as operating on each part of the vector independently.
+Additionally, there are a few new expressions to describe specific vector
+operations.
+
+@table @code
+@findex vec_merge
+@item (vec_merge:@var{m} @var{vec1} @var{vec2} @var{items})
+This describes a merge operation between two vectors.  The result is a vector
+of mode @var{m}; its elements are selected from either @var{vec1} or
+@var{vec2}.  Which elements are selected is described by @var{items}, which
+is a bit mask represented by a @code{const_int}; a zero bit indicates the
+corresponding element in the result vector is taken from @var{vec2} while
+a set bit indicates it is taken from @var{vec1}.
+
+@findex vec_select
+@item (vec_select:@var{m} @var{vec1} @var{selection})
+This describes an operation that selects parts of a vector.  @var{vec1} is
+the source vector, and @var{selection} is a @code{parallel} that contains a
+@code{const_int} for each of the subparts of the result vector, giving the
+number of the source subpart that should be stored into it.  
+The result mode @var{m} is either the submode for a single element of
+@var{vec1} (if only one subpart is selected), or another vector mode 
+with that element submode (if multiple subparts are selected).
+
+@findex vec_concat
+@item (vec_concat:@var{m} @var{vec1} @var{vec2})
+Describes a vector concat operation.  The result is a concatenation of the
+vectors @var{vec1} and @var{vec2}; its length is the sum of the lengths of
+the two inputs.
+
+@findex vec_duplicate
+@item (vec_duplicate:@var{m} @var{vec})
+This operation converts a small vector into a larger one by duplicating the
+input values.  The output vector mode must have the same submodes as the
+input vector mode, and the number of output parts must be an integer multiple
+of the number of input parts.
+
+@end table
+
+@node Conversions
+@section Conversions
+@cindex conversions
+@cindex machine mode conversions
+
+All conversions between machine modes must be represented by
+explicit conversion operations.  For example, an expression
+which is the sum of a byte and a full word cannot be written as
+@code{(plus:SI (reg:QI 34) (reg:SI 80))} because the @code{plus}
+operation requires two operands of the same machine mode.
+Therefore, the byte-sized operand is enclosed in a conversion
+operation, as in
+
+@smallexample
+(plus:SI (sign_extend:SI (reg:QI 34)) (reg:SI 80))
+@end smallexample
+
+The conversion operation is not a mere placeholder, because there
+may be more than one way of converting from a given starting mode
+to the desired final mode.  The conversion operation code says how
+to do it.
+
+For all conversion operations, @var{x} must not be @code{VOIDmode}
+because the mode in which to do the conversion would not be known.
+The conversion must either be done at compile-time or @var{x}
+must be placed into a register.
+
+@table @code
+@findex sign_extend
+@item (sign_extend:@var{m} @var{x})
+Represents the result of sign-extending the value @var{x}
+to machine mode @var{m}.  @var{m} must be a fixed-point mode
+and @var{x} a fixed-point value of a mode narrower than @var{m}.
+
+@findex zero_extend
+@item (zero_extend:@var{m} @var{x})
+Represents the result of zero-extending the value @var{x}
+to machine mode @var{m}.  @var{m} must be a fixed-point mode
+and @var{x} a fixed-point value of a mode narrower than @var{m}.
+
+@findex float_extend
+@item (float_extend:@var{m} @var{x})
+Represents the result of extending the value @var{x}
+to machine mode @var{m}.  @var{m} must be a floating point mode
+and @var{x} a floating point value of a mode narrower than @var{m}.
+
+@findex truncate
+@item (truncate:@var{m} @var{x})
+Represents the result of truncating the value @var{x}
+to machine mode @var{m}.  @var{m} must be a fixed-point mode
+and @var{x} a fixed-point value of a mode wider than @var{m}.
+
+@findex ss_truncate
+@item (ss_truncate:@var{m} @var{x})
+Represents the result of truncating the value @var{x}
+to machine mode @var{m}, using signed saturation in the case of
+overflow.  Both @var{m} and the mode of @var{x} must be fixed-point
+modes.
+
+@findex us_truncate
+@item (us_truncate:@var{m} @var{x})
+Represents the result of truncating the value @var{x}
+to machine mode @var{m}, using unsigned saturation in the case of
+overflow.  Both @var{m} and the mode of @var{x} must be fixed-point
+modes.
+
+@findex float_truncate
+@item (float_truncate:@var{m} @var{x})
+Represents the result of truncating the value @var{x}
+to machine mode @var{m}.  @var{m} must be a floating point mode
+and @var{x} a floating point value of a mode wider than @var{m}.
+
+@findex float
+@item (float:@var{m} @var{x})
+Represents the result of converting fixed point value @var{x},
+regarded as signed, to floating point mode @var{m}.
+
+@findex unsigned_float
+@item (unsigned_float:@var{m} @var{x})
+Represents the result of converting fixed point value @var{x},
+regarded as unsigned, to floating point mode @var{m}.
+
+@findex fix
+@item (fix:@var{m} @var{x})
+When @var{m} is a floating-point mode, represents the result of
+converting floating point value @var{x} (valid for mode @var{m}) to an
+integer, still represented in floating point mode @var{m}, by rounding
+towards zero.
+
+When @var{m} is a fixed-point mode, represents the result of
+converting floating point value @var{x} to mode @var{m}, regarded as
+signed.  How rounding is done is not specified, so this operation may
+be used validly in compiling C code only for integer-valued operands.
+
+@findex unsigned_fix
+@item (unsigned_fix:@var{m} @var{x})
+Represents the result of converting floating point value @var{x} to
+fixed point mode @var{m}, regarded as unsigned.  How rounding is done
+is not specified.
+
+@findex fract_convert
+@item (fract_convert:@var{m} @var{x})
+Represents the result of converting fixed-point value @var{x} to
+fixed-point mode @var{m}, signed integer value @var{x} to
+fixed-point mode @var{m}, floating-point value @var{x} to
+fixed-point mode @var{m}, fixed-point value @var{x} to integer mode @var{m}
+regarded as signed, or fixed-point value @var{x} to floating-point mode @var{m}.
+When overflows or underflows happen, the results are undefined.
+
+@findex sat_fract
+@item (sat_fract:@var{m} @var{x})
+Represents the result of converting fixed-point value @var{x} to
+fixed-point mode @var{m}, signed integer value @var{x} to
+fixed-point mode @var{m}, or floating-point value @var{x} to
+fixed-point mode @var{m}.
+When overflows or underflows happen, the results are saturated to the
+maximum or the minimum.
+
+@findex unsigned_fract_convert
+@item (unsigned_fract_convert:@var{m} @var{x})
+Represents the result of converting fixed-point value @var{x} to
+integer mode @var{m} regarded as unsigned, or unsigned integer value @var{x} to
+fixed-point mode @var{m}.
+When overflows or underflows happen, the results are undefined.
+
+@findex unsigned_sat_fract
+@item (unsigned_sat_fract:@var{m} @var{x})
+Represents the result of converting unsigned integer value @var{x} to
+fixed-point mode @var{m}.
+When overflows or underflows happen, the results are saturated to the
+maximum or the minimum.
+@end table
+
+@node RTL Declarations
+@section Declarations
+@cindex RTL declarations
+@cindex declarations, RTL
+
+Declaration expression codes do not represent arithmetic operations
+but rather state assertions about their operands.
+
+@table @code
+@findex strict_low_part
+@cindex @code{subreg}, in @code{strict_low_part}
+@item (strict_low_part (subreg:@var{m} (reg:@var{n} @var{r}) 0))
+This expression code is used in only one context: as the destination operand of a
+@code{set} expression.  In addition, the operand of this expression
+must be a non-paradoxical @code{subreg} expression.
+
+The presence of @code{strict_low_part} says that the part of the
+register which is meaningful in mode @var{n}, but is not part of
+mode @var{m}, is not to be altered.  Normally, an assignment to such
+a subreg is allowed to have undefined effects on the rest of the
+register when @var{m} is less than a word.
+@end table
+
+@node Side Effects
+@section Side Effect Expressions
+@cindex RTL side effect expressions
+
+The expression codes described so far represent values, not actions.
+But machine instructions never produce values; they are meaningful
+only for their side effects on the state of the machine.  Special
+expression codes are used to represent side effects.
+
+The body of an instruction is always one of these side effect codes;
+the codes described above, which represent values, appear only as
+the operands of these.
+
+@table @code
+@findex set
+@item (set @var{lval} @var{x})
+Represents the action of storing the value of @var{x} into the place
+represented by @var{lval}.  @var{lval} must be an expression
+representing a place that can be stored in: @code{reg} (or @code{subreg},
+@code{strict_low_part} or @code{zero_extract}), @code{mem}, @code{pc},
+@code{parallel}, or @code{cc0}.
+
+If @var{lval} is a @code{reg}, @code{subreg} or @code{mem}, it has a
+machine mode; then @var{x} must be valid for that mode.
+
+If @var{lval} is a @code{reg} whose machine mode is less than the full
+width of the register, then it means that the part of the register
+specified by the machine mode is given the specified value and the
+rest of the register receives an undefined value.  Likewise, if
+@var{lval} is a @code{subreg} whose machine mode is narrower than
+the mode of the register, the rest of the register can be changed in
+an undefined way.
+
+If @var{lval} is a @code{strict_low_part} of a subreg, then the part
+of the register specified by the machine mode of the @code{subreg} is
+given the value @var{x} and the rest of the register is not changed.
+
+If @var{lval} is a @code{zero_extract}, then the referenced part of
+the bit-field (a memory or register reference) specified by the
+@code{zero_extract} is given the value @var{x} and the rest of the
+bit-field is not changed.  Note that @code{sign_extract} can not
+appear in @var{lval}.
+
+If @var{lval} is @code{(cc0)}, it has no machine mode, and @var{x} may
+be either a @code{compare} expression or a value that may have any mode.
+The latter case represents a ``test'' instruction.  The expression
+@code{(set (cc0) (reg:@var{m} @var{n}))} is equivalent to
+@code{(set (cc0) (compare (reg:@var{m} @var{n}) (const_int 0)))}.
+Use the former expression to save space during the compilation.
+
+If @var{lval} is a @code{parallel}, it is used to represent the case of
+a function returning a structure in multiple registers.  Each element
+of the @code{parallel} is an @code{expr_list} whose first operand is a
+@code{reg} and whose second operand is a @code{const_int} representing the
+offset (in bytes) into the structure at which the data in that register
+corresponds.  The first element may be null to indicate that the structure
+is also passed partly in memory.
+
+@cindex jump instructions and @code{set}
+@cindex @code{if_then_else} usage
+If @var{lval} is @code{(pc)}, we have a jump instruction, and the
+possibilities for @var{x} are very limited.  It may be a
+@code{label_ref} expression (unconditional jump).  It may be an
+@code{if_then_else} (conditional jump), in which case either the
+second or the third operand must be @code{(pc)} (for the case which
+does not jump) and the other of the two must be a @code{label_ref}
+(for the case which does jump).  @var{x} may also be a @code{mem} or
+@code{(plus:SI (pc) @var{y})}, where @var{y} may be a @code{reg} or a
+@code{mem}; these unusual patterns are used to represent jumps through
+branch tables.
+
+If @var{lval} is neither @code{(cc0)} nor @code{(pc)}, the mode of
+@var{lval} must not be @code{VOIDmode} and the mode of @var{x} must be
+valid for the mode of @var{lval}.
+
+@findex SET_DEST
+@findex SET_SRC
+@var{lval} is customarily accessed with the @code{SET_DEST} macro and
+@var{x} with the @code{SET_SRC} macro.
+
+@findex return
+@item (return)
+As the sole expression in a pattern, represents a return from the
+current function, on machines where this can be done with one
+instruction, such as VAXen.  On machines where a multi-instruction
+``epilogue'' must be executed in order to return from the function,
+returning is done by jumping to a label which precedes the epilogue, and
+the @code{return} expression code is never used.
+
+Inside an @code{if_then_else} expression, represents the value to be
+placed in @code{pc} to return to the caller.
+
+Note that an insn pattern of @code{(return)} is logically equivalent to
+@code{(set (pc) (return))}, but the latter form is never used.
+
+@findex call
+@item (call @var{function} @var{nargs})
+Represents a function call.  @var{function} is a @code{mem} expression
+whose address is the address of the function to be called.
+@var{nargs} is an expression which can be used for two purposes: on
+some machines it represents the number of bytes of stack argument; on
+others, it represents the number of argument registers.
+
+Each machine has a standard machine mode which @var{function} must
+have.  The machine description defines macro @code{FUNCTION_MODE} to
+expand into the requisite mode name.  The purpose of this mode is to
+specify what kind of addressing is allowed, on machines where the
+allowed kinds of addressing depend on the machine mode being
+addressed.
+
+@findex clobber
+@item (clobber @var{x})
+Represents the storing or possible storing of an unpredictable,
+undescribed value into @var{x}, which must be a @code{reg},
+@code{scratch}, @code{parallel} or @code{mem} expression.
+
+One place this is used is in string instructions that store standard
+values into particular hard registers.  It may not be worth the
+trouble to describe the values that are stored, but it is essential to
+inform the compiler that the registers will be altered, lest it
+attempt to keep data in them across the string instruction.
+
+If @var{x} is @code{(mem:BLK (const_int 0))} or
+@code{(mem:BLK (scratch))}, it means that all memory
+locations must be presumed clobbered.  If @var{x} is a @code{parallel},
+it has the same meaning as a @code{parallel} in a @code{set} expression.
+
+Note that the machine description classifies certain hard registers as
+``call-clobbered''.  All function call instructions are assumed by
+default to clobber these registers, so there is no need to use
+@code{clobber} expressions to indicate this fact.  Also, each function
+call is assumed to have the potential to alter any memory location,
+unless the function is declared @code{const}.
+
+If the last group of expressions in a @code{parallel} are each a
+@code{clobber} expression whose arguments are @code{reg} or
+@code{match_scratch} (@pxref{RTL Template}) expressions, the combiner
+phase can add the appropriate @code{clobber} expressions to an insn it
+has constructed when doing so will cause a pattern to be matched.
+
+This feature can be used, for example, on a machine that whose multiply
+and add instructions don't use an MQ register but which has an
+add-accumulate instruction that does clobber the MQ register.  Similarly,
+a combined instruction might require a temporary register while the
+constituent instructions might not.
+
+When a @code{clobber} expression for a register appears inside a
+@code{parallel} with other side effects, the register allocator
+guarantees that the register is unoccupied both before and after that
+insn if it is a hard register clobber.  For pseudo-register clobber,
+the register allocator and the reload pass do not assign the same hard
+register to the clobber and the input operands if there is an insn
+alternative containing the @samp{&} constraint (@pxref{Modifiers}) for
+the clobber and the hard register is in register classes of the
+clobber in the alternative.  You can clobber either a specific hard
+register, a pseudo register, or a @code{scratch} expression; in the
+latter two cases, GCC will allocate a hard register that is available
+there for use as a temporary.
+
+For instructions that require a temporary register, you should use
+@code{scratch} instead of a pseudo-register because this will allow the
+combiner phase to add the @code{clobber} when required.  You do this by
+coding (@code{clobber} (@code{match_scratch} @dots{})).  If you do
+clobber a pseudo register, use one which appears nowhere else---generate
+a new one each time.  Otherwise, you may confuse CSE@.
+
+There is one other known use for clobbering a pseudo register in a
+@code{parallel}: when one of the input operands of the insn is also
+clobbered by the insn.  In this case, using the same pseudo register in
+the clobber and elsewhere in the insn produces the expected results.
+
+@findex use
+@item (use @var{x})
+Represents the use of the value of @var{x}.  It indicates that the
+value in @var{x} at this point in the program is needed, even though
+it may not be apparent why this is so.  Therefore, the compiler will
+not attempt to delete previous instructions whose only effect is to
+store a value in @var{x}.  @var{x} must be a @code{reg} expression.
+
+In some situations, it may be tempting to add a @code{use} of a
+register in a @code{parallel} to describe a situation where the value
+of a special register will modify the behavior of the instruction.
+A hypothetical example might be a pattern for an addition that can
+either wrap around or use saturating addition depending on the value
+of a special control register:
+
+@smallexample
+(parallel [(set (reg:SI 2) (unspec:SI [(reg:SI 3)
+                                       (reg:SI 4)] 0))
+           (use (reg:SI 1))])
+@end smallexample
+
+@noindent
+
+This will not work, several of the optimizers only look at expressions
+locally; it is very likely that if you have multiple insns with
+identical inputs to the @code{unspec}, they will be optimized away even
+if register 1 changes in between.
+
+This means that @code{use} can @emph{only} be used to describe
+that the register is live.  You should think twice before adding
+@code{use} statements, more often you will want to use @code{unspec}
+instead.  The @code{use} RTX is most commonly useful to describe that
+a fixed register is implicitly used in an insn.  It is also safe to use
+in patterns where the compiler knows for other reasons that the result
+of the whole pattern is variable, such as @samp{movmem@var{m}} or
+@samp{call} patterns.
+
+During the reload phase, an insn that has a @code{use} as pattern
+can carry a reg_equal note.  These @code{use} insns will be deleted
+before the reload phase exits.
+
+During the delayed branch scheduling phase, @var{x} may be an insn.
+This indicates that @var{x} previously was located at this place in the
+code and its data dependencies need to be taken into account.  These
+@code{use} insns will be deleted before the delayed branch scheduling
+phase exits.
+
+@findex parallel
+@item (parallel [@var{x0} @var{x1} @dots{}])
+Represents several side effects performed in parallel.  The square
+brackets stand for a vector; the operand of @code{parallel} is a
+vector of expressions.  @var{x0}, @var{x1} and so on are individual
+side effect expressions---expressions of code @code{set}, @code{call},
+@code{return}, @code{clobber} or @code{use}.
+
+``In parallel'' means that first all the values used in the individual
+side-effects are computed, and second all the actual side-effects are
+performed.  For example,
+
+@smallexample
+(parallel [(set (reg:SI 1) (mem:SI (reg:SI 1)))
+           (set (mem:SI (reg:SI 1)) (reg:SI 1))])
+@end smallexample
+
+@noindent
+says unambiguously that the values of hard register 1 and the memory
+location addressed by it are interchanged.  In both places where
+@code{(reg:SI 1)} appears as a memory address it refers to the value
+in register 1 @emph{before} the execution of the insn.
+
+It follows that it is @emph{incorrect} to use @code{parallel} and
+expect the result of one @code{set} to be available for the next one.
+For example, people sometimes attempt to represent a jump-if-zero
+instruction this way:
+
+@smallexample
+(parallel [(set (cc0) (reg:SI 34))
+           (set (pc) (if_then_else
+                        (eq (cc0) (const_int 0))
+                        (label_ref @dots{})
+                        (pc)))])
+@end smallexample
+
+@noindent
+But this is incorrect, because it says that the jump condition depends
+on the condition code value @emph{before} this instruction, not on the
+new value that is set by this instruction.
+
+@cindex peephole optimization, RTL representation
+Peephole optimization, which takes place together with final assembly
+code output, can produce insns whose patterns consist of a @code{parallel}
+whose elements are the operands needed to output the resulting
+assembler code---often @code{reg}, @code{mem} or constant expressions.
+This would not be well-formed RTL at any other stage in compilation,
+but it is ok then because no further optimization remains to be done.
+However, the definition of the macro @code{NOTICE_UPDATE_CC}, if
+any, must deal with such insns if you define any peephole optimizations.
+
+@findex cond_exec
+@item (cond_exec [@var{cond} @var{expr}])
+Represents a conditionally executed expression.  The @var{expr} is
+executed only if the @var{cond} is nonzero.  The @var{cond} expression
+must not have side-effects, but the @var{expr} may very well have
+side-effects.
+
+@findex sequence
+@item (sequence [@var{insns} @dots{}])
+Represents a sequence of insns.  Each of the @var{insns} that appears
+in the vector is suitable for appearing in the chain of insns, so it
+must be an @code{insn}, @code{jump_insn}, @code{call_insn},
+@code{code_label}, @code{barrier} or @code{note}.
+
+A @code{sequence} RTX is never placed in an actual insn during RTL
+generation.  It represents the sequence of insns that result from a
+@code{define_expand} @emph{before} those insns are passed to
+@code{emit_insn} to insert them in the chain of insns.  When actually
+inserted, the individual sub-insns are separated out and the
+@code{sequence} is forgotten.
+
+After delay-slot scheduling is completed, an insn and all the insns that
+reside in its delay slots are grouped together into a @code{sequence}.
+The insn requiring the delay slot is the first insn in the vector;
+subsequent insns are to be placed in the delay slot.
+
+@code{INSN_ANNULLED_BRANCH_P} is set on an insn in a delay slot to
+indicate that a branch insn should be used that will conditionally annul
+the effect of the insns in the delay slots.  In such a case,
+@code{INSN_FROM_TARGET_P} indicates that the insn is from the target of
+the branch and should be executed only if the branch is taken; otherwise
+the insn should be executed only if the branch is not taken.
+@xref{Delay Slots}.
+@end table
+
+These expression codes appear in place of a side effect, as the body of
+an insn, though strictly speaking they do not always describe side
+effects as such:
+
+@table @code
+@findex asm_input
+@item (asm_input @var{s})
+Represents literal assembler code as described by the string @var{s}.
+
+@findex unspec
+@findex unspec_volatile
+@item (unspec [@var{operands} @dots{}] @var{index})
+@itemx (unspec_volatile [@var{operands} @dots{}] @var{index})
+Represents a machine-specific operation on @var{operands}.  @var{index}
+selects between multiple machine-specific operations.
+@code{unspec_volatile} is used for volatile operations and operations
+that may trap; @code{unspec} is used for other operations.
+
+These codes may appear inside a @code{pattern} of an
+insn, inside a @code{parallel}, or inside an expression.
+
+@findex addr_vec
+@item (addr_vec:@var{m} [@var{lr0} @var{lr1} @dots{}])
+Represents a table of jump addresses.  The vector elements @var{lr0},
+etc., are @code{label_ref} expressions.  The mode @var{m} specifies
+how much space is given to each address; normally @var{m} would be
+@code{Pmode}.
+
+@findex addr_diff_vec
+@item (addr_diff_vec:@var{m} @var{base} [@var{lr0} @var{lr1} @dots{}] @var{min} @var{max} @var{flags})
+Represents a table of jump addresses expressed as offsets from
+@var{base}.  The vector elements @var{lr0}, etc., are @code{label_ref}
+expressions and so is @var{base}.  The mode @var{m} specifies how much
+space is given to each address-difference.  @var{min} and @var{max}
+are set up by branch shortening and hold a label with a minimum and a
+maximum address, respectively.  @var{flags} indicates the relative
+position of @var{base}, @var{min} and @var{max} to the containing insn
+and of @var{min} and @var{max} to @var{base}.  See rtl.def for details.
+
+@findex prefetch
+@item (prefetch:@var{m} @var{addr} @var{rw} @var{locality})
+Represents prefetch of memory at address @var{addr}.
+Operand @var{rw} is 1 if the prefetch is for data to be written, 0 otherwise;
+targets that do not support write prefetches should treat this as a normal
+prefetch.
+Operand @var{locality} specifies the amount of temporal locality; 0 if there
+is none or 1, 2, or 3 for increasing levels of temporal locality;
+targets that do not support locality hints should ignore this.
+
+This insn is used to minimize cache-miss latency by moving data into a
+cache before it is accessed.  It should use only non-faulting data prefetch
+instructions.
+@end table
+
+@node Incdec
+@section Embedded Side-Effects on Addresses
+@cindex RTL preincrement
+@cindex RTL postincrement
+@cindex RTL predecrement
+@cindex RTL postdecrement
+
+Six special side-effect expression codes appear as memory addresses.
+
+@table @code
+@findex pre_dec
+@item (pre_dec:@var{m} @var{x})
+Represents the side effect of decrementing @var{x} by a standard
+amount and represents also the value that @var{x} has after being
+decremented.  @var{x} must be a @code{reg} or @code{mem}, but most
+machines allow only a @code{reg}.  @var{m} must be the machine mode
+for pointers on the machine in use.  The amount @var{x} is decremented
+by is the length in bytes of the machine mode of the containing memory
+reference of which this expression serves as the address.  Here is an
+example of its use:
+
+@smallexample
+(mem:DF (pre_dec:SI (reg:SI 39)))
+@end smallexample
+
+@noindent
+This says to decrement pseudo register 39 by the length of a @code{DFmode}
+value and use the result to address a @code{DFmode} value.
+
+@findex pre_inc
+@item (pre_inc:@var{m} @var{x})
+Similar, but specifies incrementing @var{x} instead of decrementing it.
+
+@findex post_dec
+@item (post_dec:@var{m} @var{x})
+Represents the same side effect as @code{pre_dec} but a different
+value.  The value represented here is the value @var{x} has @i{before}
+being decremented.
+
+@findex post_inc
+@item (post_inc:@var{m} @var{x})
+Similar, but specifies incrementing @var{x} instead of decrementing it.
+
+@findex post_modify
+@item (post_modify:@var{m} @var{x} @var{y})
+
+Represents the side effect of setting @var{x} to @var{y} and
+represents @var{x} before @var{x} is modified.  @var{x} must be a
+@code{reg} or @code{mem}, but most machines allow only a @code{reg}.
+@var{m} must be the machine mode for pointers on the machine in use.
+
+The expression @var{y} must be one of three forms:
+@code{(plus:@var{m} @var{x} @var{z})},
+@code{(minus:@var{m} @var{x} @var{z})}, or
+@code{(plus:@var{m} @var{x} @var{i})},
+where @var{z} is an index register and @var{i} is a constant.
+
+Here is an example of its use:
+
+@smallexample
+(mem:SF (post_modify:SI (reg:SI 42) (plus (reg:SI 42)
+                                          (reg:SI 48))))
+@end smallexample
+
+This says to modify pseudo register 42 by adding the contents of pseudo
+register 48 to it, after the use of what ever 42 points to.
+
+@findex pre_modify
+@item (pre_modify:@var{m} @var{x} @var{expr})
+Similar except side effects happen before the use.
+@end table
+
+These embedded side effect expressions must be used with care.  Instruction
+patterns may not use them.  Until the @samp{flow} pass of the compiler,
+they may occur only to represent pushes onto the stack.  The @samp{flow}
+pass finds cases where registers are incremented or decremented in one
+instruction and used as an address shortly before or after; these cases are
+then transformed to use pre- or post-increment or -decrement.
+
+If a register used as the operand of these expressions is used in
+another address in an insn, the original value of the register is used.
+Uses of the register outside of an address are not permitted within the
+same insn as a use in an embedded side effect expression because such
+insns behave differently on different machines and hence must be treated
+as ambiguous and disallowed.
+
+An instruction that can be represented with an embedded side effect
+could also be represented using @code{parallel} containing an additional
+@code{set} to describe how the address register is altered.  This is not
+done because machines that allow these operations at all typically
+allow them wherever a memory address is called for.  Describing them as
+additional parallel stores would require doubling the number of entries
+in the machine description.
+
+@node Assembler
+@section Assembler Instructions as Expressions
+@cindex assembler instructions in RTL
+
+@cindex @code{asm_operands}, usage
+The RTX code @code{asm_operands} represents a value produced by a
+user-specified assembler instruction.  It is used to represent
+an @code{asm} statement with arguments.  An @code{asm} statement with
+a single output operand, like this:
+
+@smallexample
+asm ("foo %1,%2,%0" : "=a" (outputvar) : "g" (x + y), "di" (*z));
+@end smallexample
+
+@noindent
+is represented using a single @code{asm_operands} RTX which represents
+the value that is stored in @code{outputvar}:
+
+@smallexample
+(set @var{rtx-for-outputvar}
+     (asm_operands "foo %1,%2,%0" "a" 0
+                   [@var{rtx-for-addition-result} @var{rtx-for-*z}]
+                   [(asm_input:@var{m1} "g")
+                    (asm_input:@var{m2} "di")]))
+@end smallexample
+
+@noindent
+Here the operands of the @code{asm_operands} RTX are the assembler
+template string, the output-operand's constraint, the index-number of the
+output operand among the output operands specified, a vector of input
+operand RTX's, and a vector of input-operand modes and constraints.  The
+mode @var{m1} is the mode of the sum @code{x+y}; @var{m2} is that of
+@code{*z}.
+
+When an @code{asm} statement has multiple output values, its insn has
+several such @code{set} RTX's inside of a @code{parallel}.  Each @code{set}
+contains an @code{asm_operands}; all of these share the same assembler
+template and vectors, but each contains the constraint for the respective
+output operand.  They are also distinguished by the output-operand index
+number, which is 0, 1, @dots{} for successive output operands.
+
+@node Debug Information
+@section Variable Location Debug Information in RTL
+@cindex Variable Location Debug Information in RTL
+
+Variable tracking relies on @code{MEM_EXPR} and @code{REG_EXPR}
+annotations to determine what user variables memory and register
+references refer to.
+
+Variable tracking at assignments uses these notes only when they refer
+to variables that live at fixed locations (e.g., addressable
+variables, global non-automatic variables).  For variables whose
+location may vary, it relies on the following types of notes.
+
+@table @code
+@findex var_location
+@item (var_location:@var{mode} @var{var} @var{exp} @var{stat})
+Binds variable @code{var}, a tree, to value @var{exp}, an RTL
+expression.  It appears only in @code{NOTE_INSN_VAR_LOCATION} and
+@code{DEBUG_INSN}s, with slightly different meanings.  @var{mode}, if
+present, represents the mode of @var{exp}, which is useful if it is a
+modeless expression.  @var{stat} is only meaningful in notes,
+indicating whether the variable is known to be initialized or
+uninitialized.
+
+@findex debug_expr
+@item (debug_expr:@var{mode} @var{decl})
+Stands for the value bound to the @code{DEBUG_EXPR_DECL} @var{decl},
+that points back to it, within value expressions in
+@code{VAR_LOCATION} nodes.
+
+@end table
+
+@node Insns
+@section Insns
+@cindex insns
+
+The RTL representation of the code for a function is a doubly-linked
+chain of objects called @dfn{insns}.  Insns are expressions with
+special codes that are used for no other purpose.  Some insns are
+actual instructions; others represent dispatch tables for @code{switch}
+statements; others represent labels to jump to or various sorts of
+declarative information.
+
+In addition to its own specific data, each insn must have a unique
+id-number that distinguishes it from all other insns in the current
+function (after delayed branch scheduling, copies of an insn with the
+same id-number may be present in multiple places in a function, but
+these copies will always be identical and will only appear inside a
+@code{sequence}), and chain pointers to the preceding and following
+insns.  These three fields occupy the same position in every insn,
+independent of the expression code of the insn.  They could be accessed
+with @code{XEXP} and @code{XINT}, but instead three special macros are
+always used:
+
+@table @code
+@findex INSN_UID
+@item INSN_UID (@var{i})
+Accesses the unique id of insn @var{i}.
+
+@findex PREV_INSN
+@item PREV_INSN (@var{i})
+Accesses the chain pointer to the insn preceding @var{i}.
+If @var{i} is the first insn, this is a null pointer.
+
+@findex NEXT_INSN
+@item NEXT_INSN (@var{i})
+Accesses the chain pointer to the insn following @var{i}.
+If @var{i} is the last insn, this is a null pointer.
+@end table
+
+@findex get_insns
+@findex get_last_insn
+The first insn in the chain is obtained by calling @code{get_insns}; the
+last insn is the result of calling @code{get_last_insn}.  Within the
+chain delimited by these insns, the @code{NEXT_INSN} and
+@code{PREV_INSN} pointers must always correspond: if @var{insn} is not
+the first insn,
+
+@smallexample
+NEXT_INSN (PREV_INSN (@var{insn})) == @var{insn}
+@end smallexample
+
+@noindent
+is always true and if @var{insn} is not the last insn,
+
+@smallexample
+PREV_INSN (NEXT_INSN (@var{insn})) == @var{insn}
+@end smallexample
+
+@noindent
+is always true.
+
+After delay slot scheduling, some of the insns in the chain might be
+@code{sequence} expressions, which contain a vector of insns.  The value
+of @code{NEXT_INSN} in all but the last of these insns is the next insn
+in the vector; the value of @code{NEXT_INSN} of the last insn in the vector
+is the same as the value of @code{NEXT_INSN} for the @code{sequence} in
+which it is contained.  Similar rules apply for @code{PREV_INSN}.
+
+This means that the above invariants are not necessarily true for insns
+inside @code{sequence} expressions.  Specifically, if @var{insn} is the
+first insn in a @code{sequence}, @code{NEXT_INSN (PREV_INSN (@var{insn}))}
+is the insn containing the @code{sequence} expression, as is the value
+of @code{PREV_INSN (NEXT_INSN (@var{insn}))} if @var{insn} is the last
+insn in the @code{sequence} expression.  You can use these expressions
+to find the containing @code{sequence} expression.
+
+Every insn has one of the following expression codes:
+
+@table @code
+@findex insn
+@item insn
+The expression code @code{insn} is used for instructions that do not jump
+and do not do function calls.  @code{sequence} expressions are always
+contained in insns with code @code{insn} even if one of those insns
+should jump or do function calls.
+
+Insns with code @code{insn} have four additional fields beyond the three
+mandatory ones listed above.  These four are described in a table below.
+
+@findex jump_insn
+@item jump_insn
+The expression code @code{jump_insn} is used for instructions that may
+jump (or, more generally, may contain @code{label_ref} expressions to
+which @code{pc} can be set in that instruction).  If there is an
+instruction to return from the current function, it is recorded as a
+@code{jump_insn}.
+
+@findex JUMP_LABEL
+@code{jump_insn} insns have the same extra fields as @code{insn} insns,
+accessed in the same way and in addition contain a field
+@code{JUMP_LABEL} which is defined once jump optimization has completed.
+
+For simple conditional and unconditional jumps, this field contains
+the @code{code_label} to which this insn will (possibly conditionally)
+branch.  In a more complex jump, @code{JUMP_LABEL} records one of the
+labels that the insn refers to; other jump target labels are recorded
+as @code{REG_LABEL_TARGET} notes.  The exception is @code{addr_vec}
+and @code{addr_diff_vec}, where @code{JUMP_LABEL} is @code{NULL_RTX}
+and the only way to find the labels is to scan the entire body of the
+insn.
+
+Return insns count as jumps, but since they do not refer to any
+labels, their @code{JUMP_LABEL} is @code{NULL_RTX}.
+
+@findex call_insn
+@item call_insn
+The expression code @code{call_insn} is used for instructions that may do
+function calls.  It is important to distinguish these instructions because
+they imply that certain registers and memory locations may be altered
+unpredictably.
+
+@findex CALL_INSN_FUNCTION_USAGE
+@code{call_insn} insns have the same extra fields as @code{insn} insns,
+accessed in the same way and in addition contain a field
+@code{CALL_INSN_FUNCTION_USAGE}, which contains a list (chain of
+@code{expr_list} expressions) containing @code{use} and @code{clobber}
+expressions that denote hard registers and @code{MEM}s used or
+clobbered by the called function.
+
+A @code{MEM} generally points to a stack slots in which arguments passed
+to the libcall by reference (@pxref{Register Arguments,
+TARGET_PASS_BY_REFERENCE}) are stored.  If the argument is
+caller-copied (@pxref{Register Arguments, TARGET_CALLEE_COPIES}),
+the stack slot will be mentioned in @code{CLOBBER} and @code{USE}
+entries; if it's callee-copied, only a @code{USE} will appear, and the
+@code{MEM} may point to addresses that are not stack slots.
+
+@code{CLOBBER}ed registers in this list augment registers specified in
+@code{CALL_USED_REGISTERS} (@pxref{Register Basics}).
+
+@findex code_label
+@findex CODE_LABEL_NUMBER
+@item code_label
+A @code{code_label} insn represents a label that a jump insn can jump
+to.  It contains two special fields of data in addition to the three
+standard ones.  @code{CODE_LABEL_NUMBER} is used to hold the @dfn{label
+number}, a number that identifies this label uniquely among all the
+labels in the compilation (not just in the current function).
+Ultimately, the label is represented in the assembler output as an
+assembler label, usually of the form @samp{L@var{n}} where @var{n} is
+the label number.
+
+When a @code{code_label} appears in an RTL expression, it normally
+appears within a @code{label_ref} which represents the address of
+the label, as a number.
+
+Besides as a @code{code_label}, a label can also be represented as a
+@code{note} of type @code{NOTE_INSN_DELETED_LABEL}.
+
+@findex LABEL_NUSES
+The field @code{LABEL_NUSES} is only defined once the jump optimization
+phase is completed.  It contains the number of times this label is
+referenced in the current function.
+
+@findex LABEL_KIND
+@findex SET_LABEL_KIND
+@findex LABEL_ALT_ENTRY_P
+@cindex alternate entry points
+The field @code{LABEL_KIND} differentiates four different types of
+labels: @code{LABEL_NORMAL}, @code{LABEL_STATIC_ENTRY},
+@code{LABEL_GLOBAL_ENTRY}, and @code{LABEL_WEAK_ENTRY}.  The only labels
+that do not have type @code{LABEL_NORMAL} are @dfn{alternate entry
+points} to the current function.  These may be static (visible only in
+the containing translation unit), global (exposed to all translation
+units), or weak (global, but can be overridden by another symbol with the
+same name).
+
+Much of the compiler treats all four kinds of label identically.  Some
+of it needs to know whether or not a label is an alternate entry point;
+for this purpose, the macro @code{LABEL_ALT_ENTRY_P} is provided.  It is
+equivalent to testing whether @samp{LABEL_KIND (label) == LABEL_NORMAL}.
+The only place that cares about the distinction between static, global,
+and weak alternate entry points, besides the front-end code that creates
+them, is the function @code{output_alternate_entry_point}, in
+@file{final.c}.
+
+To set the kind of a label, use the @code{SET_LABEL_KIND} macro.
+
+@findex barrier
+@item barrier
+Barriers are placed in the instruction stream when control cannot flow
+past them.  They are placed after unconditional jump instructions to
+indicate that the jumps are unconditional and after calls to
+@code{volatile} functions, which do not return (e.g., @code{exit}).
+They contain no information beyond the three standard fields.
+
+@findex note
+@findex NOTE_LINE_NUMBER
+@findex NOTE_SOURCE_FILE
+@item note
+@code{note} insns are used to represent additional debugging and
+declarative information.  They contain two nonstandard fields, an
+integer which is accessed with the macro @code{NOTE_LINE_NUMBER} and a
+string accessed with @code{NOTE_SOURCE_FILE}.
+
+If @code{NOTE_LINE_NUMBER} is positive, the note represents the
+position of a source line and @code{NOTE_SOURCE_FILE} is the source file name
+that the line came from.  These notes control generation of line
+number data in the assembler output.
+
+Otherwise, @code{NOTE_LINE_NUMBER} is not really a line number but a
+code with one of the following values (and @code{NOTE_SOURCE_FILE}
+must contain a null pointer):
+
+@table @code
+@findex NOTE_INSN_DELETED
+@item NOTE_INSN_DELETED
+Such a note is completely ignorable.  Some passes of the compiler
+delete insns by altering them into notes of this kind.
+
+@findex NOTE_INSN_DELETED_LABEL
+@item NOTE_INSN_DELETED_LABEL
+This marks what used to be a @code{code_label}, but was not used for other
+purposes than taking its address and was transformed to mark that no
+code jumps to it.
+
+@findex NOTE_INSN_BLOCK_BEG
+@findex NOTE_INSN_BLOCK_END
+@item NOTE_INSN_BLOCK_BEG
+@itemx NOTE_INSN_BLOCK_END
+These types of notes indicate the position of the beginning and end
+of a level of scoping of variable names.  They control the output
+of debugging information.
+
+@findex NOTE_INSN_EH_REGION_BEG
+@findex NOTE_INSN_EH_REGION_END
+@item NOTE_INSN_EH_REGION_BEG
+@itemx NOTE_INSN_EH_REGION_END
+These types of notes indicate the position of the beginning and end of a
+level of scoping for exception handling.  @code{NOTE_BLOCK_NUMBER}
+identifies which @code{CODE_LABEL} or @code{note} of type
+@code{NOTE_INSN_DELETED_LABEL} is associated with the given region.
+
+@findex NOTE_INSN_LOOP_BEG
+@findex NOTE_INSN_LOOP_END
+@item NOTE_INSN_LOOP_BEG
+@itemx NOTE_INSN_LOOP_END
+These types of notes indicate the position of the beginning and end
+of a @code{while} or @code{for} loop.  They enable the loop optimizer
+to find loops quickly.
+
+@findex NOTE_INSN_LOOP_CONT
+@item NOTE_INSN_LOOP_CONT
+Appears at the place in a loop that @code{continue} statements jump to.
+
+@findex NOTE_INSN_LOOP_VTOP
+@item NOTE_INSN_LOOP_VTOP
+This note indicates the place in a loop where the exit test begins for
+those loops in which the exit test has been duplicated.  This position
+becomes another virtual start of the loop when considering loop
+invariants.
+
+@findex NOTE_INSN_FUNCTION_BEG
+@item NOTE_INSN_FUNCTION_BEG
+Appears at the start of the function body, after the function
+prologue.
+
+@findex NOTE_INSN_VAR_LOCATION
+@findex NOTE_VAR_LOCATION
+@item NOTE_INSN_VAR_LOCATION
+This note is used to generate variable location debugging information.
+It indicates that the user variable in its @code{VAR_LOCATION} operand
+is at the location given in the RTL expression, or holds a value that
+can be computed by evaluating the RTL expression from that static
+point in the program up to the next such note for the same user
+variable.
+
+@end table
+
+These codes are printed symbolically when they appear in debugging dumps.
+
+@findex debug_insn
+@findex INSN_VAR_LOCATION
+@item debug_insn
+The expression code @code{debug_insn} is used for pseudo-instructions
+that hold debugging information for variable tracking at assignments
+(see @option{-fvar-tracking-assignments} option).  They are the RTL
+representation of @code{GIMPLE_DEBUG} statements
+(@ref{@code{GIMPLE_DEBUG}}), with a @code{VAR_LOCATION} operand that
+binds a user variable tree to an RTL representation of the
+@code{value} in the corresponding statement.  A @code{DEBUG_EXPR} in
+it stands for the value bound to the corresponding
+@code{DEBUG_EXPR_DECL}.
+
+Throughout optimization passes, binding information is kept in
+pseudo-instruction form, so that, unlike notes, it gets the same
+treatment and adjustments that regular instructions would.  It is the
+variable tracking pass that turns these pseudo-instructions into var
+location notes, analyzing control flow, value equivalences and changes
+to registers and memory referenced in value expressions, propagating
+the values of debug temporaries and determining expressions that can
+be used to compute the value of each user variable at as many points
+(ranges, actually) in the program as possible.
+
+Unlike @code{NOTE_INSN_VAR_LOCATION}, the value expression in an
+@code{INSN_VAR_LOCATION} denotes a value at that specific point in the
+program, rather than an expression that can be evaluated at any later
+point before an overriding @code{VAR_LOCATION} is encountered.  E.g.,
+if a user variable is bound to a @code{REG} and then a subsequent insn
+modifies the @code{REG}, the note location would keep mapping the user
+variable to the register across the insn, whereas the insn location
+would keep the variable bound to the value, so that the variable
+tracking pass would emit another location note for the variable at the
+point in which the register is modified.
+
+@end table
+
+@cindex @code{TImode}, in @code{insn}
+@cindex @code{HImode}, in @code{insn}
+@cindex @code{QImode}, in @code{insn}
+The machine mode of an insn is normally @code{VOIDmode}, but some
+phases use the mode for various purposes.
+
+The common subexpression elimination pass sets the mode of an insn to
+@code{QImode} when it is the first insn in a block that has already
+been processed.
+
+The second Haifa scheduling pass, for targets that can multiple issue,
+sets the mode of an insn to @code{TImode} when it is believed that the
+instruction begins an issue group.  That is, when the instruction
+cannot issue simultaneously with the previous.  This may be relied on
+by later passes, in particular machine-dependent reorg.
+
+Here is a table of the extra fields of @code{insn}, @code{jump_insn}
+and @code{call_insn} insns:
+
+@table @code
+@findex PATTERN
+@item PATTERN (@var{i})
+An expression for the side effect performed by this insn.  This must be
+one of the following codes: @code{set}, @code{call}, @code{use},
+@code{clobber}, @code{return}, @code{asm_input}, @code{asm_output},
+@code{addr_vec}, @code{addr_diff_vec}, @code{trap_if}, @code{unspec},
+@code{unspec_volatile}, @code{parallel}, @code{cond_exec}, or @code{sequence}.  If it is a @code{parallel},
+each element of the @code{parallel} must be one these codes, except that
+@code{parallel} expressions cannot be nested and @code{addr_vec} and
+@code{addr_diff_vec} are not permitted inside a @code{parallel} expression.
+
+@findex INSN_CODE
+@item INSN_CODE (@var{i})
+An integer that says which pattern in the machine description matches
+this insn, or @minus{}1 if the matching has not yet been attempted.
+
+Such matching is never attempted and this field remains @minus{}1 on an insn
+whose pattern consists of a single @code{use}, @code{clobber},
+@code{asm_input}, @code{addr_vec} or @code{addr_diff_vec} expression.
+
+@findex asm_noperands
+Matching is also never attempted on insns that result from an @code{asm}
+statement.  These contain at least one @code{asm_operands} expression.
+The function @code{asm_noperands} returns a non-negative value for
+such insns.
+
+In the debugging output, this field is printed as a number followed by
+a symbolic representation that locates the pattern in the @file{md}
+file as some small positive or negative offset from a named pattern.
+
+@findex LOG_LINKS
+@item LOG_LINKS (@var{i})
+A list (chain of @code{insn_list} expressions) giving information about
+dependencies between instructions within a basic block.  Neither a jump
+nor a label may come between the related insns.  These are only used by
+the schedulers and by combine.  This is a deprecated data structure.
+Def-use and use-def chains are now preferred. 
+
+@findex REG_NOTES
+@item REG_NOTES (@var{i})
+A list (chain of @code{expr_list} and @code{insn_list} expressions)
+giving miscellaneous information about the insn.  It is often
+information pertaining to the registers used in this insn.
+@end table
+
+The @code{LOG_LINKS} field of an insn is a chain of @code{insn_list}
+expressions.  Each of these has two operands: the first is an insn,
+and the second is another @code{insn_list} expression (the next one in
+the chain).  The last @code{insn_list} in the chain has a null pointer
+as second operand.  The significant thing about the chain is which
+insns appear in it (as first operands of @code{insn_list}
+expressions).  Their order is not significant.
+
+This list is originally set up by the flow analysis pass; it is a null
+pointer until then.  Flow only adds links for those data dependencies
+which can be used for instruction combination.  For each insn, the flow
+analysis pass adds a link to insns which store into registers values
+that are used for the first time in this insn.
+
+The @code{REG_NOTES} field of an insn is a chain similar to the
+@code{LOG_LINKS} field but it includes @code{expr_list} expressions in
+addition to @code{insn_list} expressions.  There are several kinds of
+register notes, which are distinguished by the machine mode, which in a
+register note is really understood as being an @code{enum reg_note}.
+The first operand @var{op} of the note is data whose meaning depends on
+the kind of note.
+
+@findex REG_NOTE_KIND
+@findex PUT_REG_NOTE_KIND
+The macro @code{REG_NOTE_KIND (@var{x})} returns the kind of
+register note.  Its counterpart, the macro @code{PUT_REG_NOTE_KIND
+(@var{x}, @var{newkind})} sets the register note type of @var{x} to be
+@var{newkind}.
+
+Register notes are of three classes: They may say something about an
+input to an insn, they may say something about an output of an insn, or
+they may create a linkage between two insns.  There are also a set
+of values that are only used in @code{LOG_LINKS}.
+
+These register notes annotate inputs to an insn:
+
+@table @code
+@findex REG_DEAD
+@item REG_DEAD
+The value in @var{op} dies in this insn; that is to say, altering the
+value immediately after this insn would not affect the future behavior
+of the program.
+
+It does not follow that the register @var{op} has no useful value after
+this insn since @var{op} is not necessarily modified by this insn.
+Rather, no subsequent instruction uses the contents of @var{op}.
+
+@findex REG_UNUSED
+@item REG_UNUSED
+The register @var{op} being set by this insn will not be used in a
+subsequent insn.  This differs from a @code{REG_DEAD} note, which
+indicates that the value in an input will not be used subsequently.
+These two notes are independent; both may be present for the same
+register.
+
+@findex REG_INC
+@item REG_INC
+The register @var{op} is incremented (or decremented; at this level
+there is no distinction) by an embedded side effect inside this insn.
+This means it appears in a @code{post_inc}, @code{pre_inc},
+@code{post_dec} or @code{pre_dec} expression.
+
+@findex REG_NONNEG
+@item REG_NONNEG
+The register @var{op} is known to have a nonnegative value when this
+insn is reached.  This is used so that decrement and branch until zero
+instructions, such as the m68k dbra, can be matched.
+
+The @code{REG_NONNEG} note is added to insns only if the machine
+description has a @samp{decrement_and_branch_until_zero} pattern.
+
+@findex REG_LABEL_OPERAND
+@item REG_LABEL_OPERAND
+This insn uses @var{op}, a @code{code_label} or a @code{note} of type
+@code{NOTE_INSN_DELETED_LABEL}, but is not a @code{jump_insn}, or it
+is a @code{jump_insn} that refers to the operand as an ordinary
+operand.  The label may still eventually be a jump target, but if so
+in an indirect jump in a subsequent insn.  The presence of this note
+allows jump optimization to be aware that @var{op} is, in fact, being
+used, and flow optimization to build an accurate flow graph.
+
+@findex REG_LABEL_TARGET
+@item REG_LABEL_TARGET
+This insn is a @code{jump_insn} but not an @code{addr_vec} or
+@code{addr_diff_vec}.  It uses @var{op}, a @code{code_label} as a
+direct or indirect jump target.  Its purpose is similar to that of
+@code{REG_LABEL_OPERAND}.  This note is only present if the insn has
+multiple targets; the last label in the insn (in the highest numbered
+insn-field) goes into the @code{JUMP_LABEL} field and does not have a
+@code{REG_LABEL_TARGET} note.  @xref{Insns, JUMP_LABEL}.
+
+@findex REG_CROSSING_JUMP
+@item REG_CROSSING_JUMP
+This insn is a branching instruction (either an unconditional jump or
+an indirect jump) which crosses between hot and cold sections, which
+could potentially be very far apart in the executable.  The presence
+of this note indicates to other optimizations that this branching
+instruction should not be ``collapsed'' into a simpler branching
+construct.  It is used when the optimization to partition basic blocks
+into hot and cold sections is turned on.
+
+@findex REG_SETJMP
+@item REG_SETJMP 
+Appears attached to each @code{CALL_INSN} to @code{setjmp} or a 
+related function.
+@end table
+
+The following notes describe attributes of outputs of an insn:
+
+@table @code
+@findex REG_EQUIV
+@findex REG_EQUAL
+@item REG_EQUIV
+@itemx REG_EQUAL
+This note is only valid on an insn that sets only one register and
+indicates that that register will be equal to @var{op} at run time; the
+scope of this equivalence differs between the two types of notes.  The
+value which the insn explicitly copies into the register may look
+different from @var{op}, but they will be equal at run time.  If the
+output of the single @code{set} is a @code{strict_low_part} expression,
+the note refers to the register that is contained in @code{SUBREG_REG}
+of the @code{subreg} expression.
+
+For @code{REG_EQUIV}, the register is equivalent to @var{op} throughout
+the entire function, and could validly be replaced in all its
+occurrences by @var{op}.  (``Validly'' here refers to the data flow of
+the program; simple replacement may make some insns invalid.)  For
+example, when a constant is loaded into a register that is never
+assigned any other value, this kind of note is used.
+
+When a parameter is copied into a pseudo-register at entry to a function,
+a note of this kind records that the register is equivalent to the stack
+slot where the parameter was passed.  Although in this case the register
+may be set by other insns, it is still valid to replace the register
+by the stack slot throughout the function.
+
+A @code{REG_EQUIV} note is also used on an instruction which copies a
+register parameter into a pseudo-register at entry to a function, if
+there is a stack slot where that parameter could be stored.  Although
+other insns may set the pseudo-register, it is valid for the compiler to
+replace the pseudo-register by stack slot throughout the function,
+provided the compiler ensures that the stack slot is properly
+initialized by making the replacement in the initial copy instruction as
+well.  This is used on machines for which the calling convention
+allocates stack space for register parameters.  See
+@code{REG_PARM_STACK_SPACE} in @ref{Stack Arguments}.
+
+In the case of @code{REG_EQUAL}, the register that is set by this insn
+will be equal to @var{op} at run time at the end of this insn but not
+necessarily elsewhere in the function.  In this case, @var{op}
+is typically an arithmetic expression.  For example, when a sequence of
+insns such as a library call is used to perform an arithmetic operation,
+this kind of note is attached to the insn that produces or copies the
+final value.
+
+These two notes are used in different ways by the compiler passes.
+@code{REG_EQUAL} is used by passes prior to register allocation (such as
+common subexpression elimination and loop optimization) to tell them how
+to think of that value.  @code{REG_EQUIV} notes are used by register
+allocation to indicate that there is an available substitute expression
+(either a constant or a @code{mem} expression for the location of a
+parameter on the stack) that may be used in place of a register if
+insufficient registers are available.
+
+Except for stack homes for parameters, which are indicated by a
+@code{REG_EQUIV} note and are not useful to the early optimization
+passes and pseudo registers that are equivalent to a memory location
+throughout their entire life, which is not detected until later in
+the compilation, all equivalences are initially indicated by an attached
+@code{REG_EQUAL} note.  In the early stages of register allocation, a
+@code{REG_EQUAL} note is changed into a @code{REG_EQUIV} note if
+@var{op} is a constant and the insn represents the only set of its
+destination register.
+
+Thus, compiler passes prior to register allocation need only check for
+@code{REG_EQUAL} notes and passes subsequent to register allocation
+need only check for @code{REG_EQUIV} notes.
+@end table
+
+These notes describe linkages between insns.  They occur in pairs: one
+insn has one of a pair of notes that points to a second insn, which has
+the inverse note pointing back to the first insn.
+
+@table @code
+@findex REG_CC_SETTER
+@findex REG_CC_USER
+@item REG_CC_SETTER
+@itemx REG_CC_USER
+On machines that use @code{cc0}, the insns which set and use @code{cc0}
+set and use @code{cc0} are adjacent.  However, when branch delay slot
+filling is done, this may no longer be true.  In this case a
+@code{REG_CC_USER} note will be placed on the insn setting @code{cc0} to
+point to the insn using @code{cc0} and a @code{REG_CC_SETTER} note will
+be placed on the insn using @code{cc0} to point to the insn setting
+@code{cc0}.
+@end table
+
+These values are only used in the @code{LOG_LINKS} field, and indicate
+the type of dependency that each link represents.  Links which indicate
+a data dependence (a read after write dependence) do not use any code,
+they simply have mode @code{VOIDmode}, and are printed without any
+descriptive text.
+
+@table @code
+@findex REG_DEP_TRUE
+@item REG_DEP_TRUE
+This indicates a true dependence (a read after write dependence).
+
+@findex REG_DEP_OUTPUT
+@item REG_DEP_OUTPUT
+This indicates an output dependence (a write after write dependence).
+
+@findex REG_DEP_ANTI
+@item REG_DEP_ANTI
+This indicates an anti dependence (a write after read dependence).
+
+@end table
+
+These notes describe information gathered from gcov profile data.  They
+are stored in the @code{REG_NOTES} field of an insn as an
+@code{expr_list}.
+
+@table @code
+@findex REG_BR_PROB
+@item REG_BR_PROB
+This is used to specify the ratio of branches to non-branches of a
+branch insn according to the profile data.  The value is stored as a
+value between 0 and REG_BR_PROB_BASE; larger values indicate a higher
+probability that the branch will be taken.
+
+@findex REG_BR_PRED
+@item REG_BR_PRED
+These notes are found in JUMP insns after delayed branch scheduling
+has taken place.  They indicate both the direction and the likelihood
+of the JUMP@.  The format is a bitmask of ATTR_FLAG_* values.
+
+@findex REG_FRAME_RELATED_EXPR
+@item REG_FRAME_RELATED_EXPR
+This is used on an RTX_FRAME_RELATED_P insn wherein the attached expression
+is used in place of the actual insn pattern.  This is done in cases where
+the pattern is either complex or misleading.
+@end table
+
+For convenience, the machine mode in an @code{insn_list} or
+@code{expr_list} is printed using these symbolic codes in debugging dumps.
+
+@findex insn_list
+@findex expr_list
+The only difference between the expression codes @code{insn_list} and
+@code{expr_list} is that the first operand of an @code{insn_list} is
+assumed to be an insn and is printed in debugging dumps as the insn's
+unique id; the first operand of an @code{expr_list} is printed in the
+ordinary way as an expression.
+
+@node Calls
+@section RTL Representation of Function-Call Insns
+@cindex calling functions in RTL
+@cindex RTL function-call insns
+@cindex function-call insns
+
+Insns that call subroutines have the RTL expression code @code{call_insn}.
+These insns must satisfy special rules, and their bodies must use a special
+RTL expression code, @code{call}.
+
+@cindex @code{call} usage
+A @code{call} expression has two operands, as follows:
+
+@smallexample
+(call (mem:@var{fm} @var{addr}) @var{nbytes})
+@end smallexample
+
+@noindent
+Here @var{nbytes} is an operand that represents the number of bytes of
+argument data being passed to the subroutine, @var{fm} is a machine mode
+(which must equal as the definition of the @code{FUNCTION_MODE} macro in
+the machine description) and @var{addr} represents the address of the
+subroutine.
+
+For a subroutine that returns no value, the @code{call} expression as
+shown above is the entire body of the insn, except that the insn might
+also contain @code{use} or @code{clobber} expressions.
+
+@cindex @code{BLKmode}, and function return values
+For a subroutine that returns a value whose mode is not @code{BLKmode},
+the value is returned in a hard register.  If this register's number is
+@var{r}, then the body of the call insn looks like this:
+
+@smallexample
+(set (reg:@var{m} @var{r})
+     (call (mem:@var{fm} @var{addr}) @var{nbytes}))
+@end smallexample
+
+@noindent
+This RTL expression makes it clear (to the optimizer passes) that the
+appropriate register receives a useful value in this insn.
+
+When a subroutine returns a @code{BLKmode} value, it is handled by
+passing to the subroutine the address of a place to store the value.
+So the call insn itself does not ``return'' any value, and it has the
+same RTL form as a call that returns nothing.
+
+On some machines, the call instruction itself clobbers some register,
+for example to contain the return address.  @code{call_insn} insns
+on these machines should have a body which is a @code{parallel}
+that contains both the @code{call} expression and @code{clobber}
+expressions that indicate which registers are destroyed.  Similarly,
+if the call instruction requires some register other than the stack
+pointer that is not explicitly mentioned in its RTL, a @code{use}
+subexpression should mention that register.
+
+Functions that are called are assumed to modify all registers listed in
+the configuration macro @code{CALL_USED_REGISTERS} (@pxref{Register
+Basics}) and, with the exception of @code{const} functions and library
+calls, to modify all of memory.
+
+Insns containing just @code{use} expressions directly precede the
+@code{call_insn} insn to indicate which registers contain inputs to the
+function.  Similarly, if registers other than those in
+@code{CALL_USED_REGISTERS} are clobbered by the called function, insns
+containing a single @code{clobber} follow immediately after the call to
+indicate which registers.
+
+@node Sharing
+@section Structure Sharing Assumptions
+@cindex sharing of RTL components
+@cindex RTL structure sharing assumptions
+
+The compiler assumes that certain kinds of RTL expressions are unique;
+there do not exist two distinct objects representing the same value.
+In other cases, it makes an opposite assumption: that no RTL expression
+object of a certain kind appears in more than one place in the
+containing structure.
+
+These assumptions refer to a single function; except for the RTL
+objects that describe global variables and external functions,
+and a few standard objects such as small integer constants,
+no RTL objects are common to two functions.
+
+@itemize @bullet
+@cindex @code{reg}, RTL sharing
+@item
+Each pseudo-register has only a single @code{reg} object to represent it,
+and therefore only a single machine mode.
+
+@cindex symbolic label
+@cindex @code{symbol_ref}, RTL sharing
+@item
+For any symbolic label, there is only one @code{symbol_ref} object
+referring to it.
+
+@cindex @code{const_int}, RTL sharing
+@item
+All @code{const_int} expressions with equal values are shared.
+
+@cindex @code{pc}, RTL sharing
+@item
+There is only one @code{pc} expression.
+
+@cindex @code{cc0}, RTL sharing
+@item
+There is only one @code{cc0} expression.
+
+@cindex @code{const_double}, RTL sharing
+@item
+There is only one @code{const_double} expression with value 0 for
+each floating point mode.  Likewise for values 1 and 2.
+
+@cindex @code{const_vector}, RTL sharing
+@item
+There is only one @code{const_vector} expression with value 0 for
+each vector mode, be it an integer or a double constant vector.
+
+@cindex @code{label_ref}, RTL sharing
+@cindex @code{scratch}, RTL sharing
+@item
+No @code{label_ref} or @code{scratch} appears in more than one place in
+the RTL structure; in other words, it is safe to do a tree-walk of all
+the insns in the function and assume that each time a @code{label_ref}
+or @code{scratch} is seen it is distinct from all others that are seen.
+
+@cindex @code{mem}, RTL sharing
+@item
+Only one @code{mem} object is normally created for each static
+variable or stack slot, so these objects are frequently shared in all
+the places they appear.  However, separate but equal objects for these
+variables are occasionally made.
+
+@cindex @code{asm_operands}, RTL sharing
+@item
+When a single @code{asm} statement has multiple output operands, a
+distinct @code{asm_operands} expression is made for each output operand.
+However, these all share the vector which contains the sequence of input
+operands.  This sharing is used later on to test whether two
+@code{asm_operands} expressions come from the same statement, so all
+optimizations must carefully preserve the sharing if they copy the
+vector at all.
+
+@item
+No RTL object appears in more than one place in the RTL structure
+except as described above.  Many passes of the compiler rely on this
+by assuming that they can modify RTL objects in place without unwanted
+side-effects on other insns.
+
+@findex unshare_all_rtl
+@item
+During initial RTL generation, shared structure is freely introduced.
+After all the RTL for a function has been generated, all shared
+structure is copied by @code{unshare_all_rtl} in @file{emit-rtl.c},
+after which the above rules are guaranteed to be followed.
+
+@findex copy_rtx_if_shared
+@item
+During the combiner pass, shared structure within an insn can exist
+temporarily.  However, the shared structure is copied before the
+combiner is finished with the insn.  This is done by calling
+@code{copy_rtx_if_shared}, which is a subroutine of
+@code{unshare_all_rtl}.
+@end itemize
+
+@node Reading RTL
+@section Reading RTL
+
+To read an RTL object from a file, call @code{read_rtx}.  It takes one
+argument, a stdio stream, and returns a single RTL object.  This routine
+is defined in @file{read-rtl.c}.  It is not available in the compiler
+itself, only the various programs that generate the compiler back end
+from the machine description.
+
+People frequently have the idea of using RTL stored as text in a file as
+an interface between a language front end and the bulk of GCC@.  This
+idea is not feasible.
+
+GCC was designed to use RTL internally only.  Correct RTL for a given
+program is very dependent on the particular target machine.  And the RTL
+does not contain all the information about the program.
+
+The proper way to interface GCC to a new language front end is with
+the ``tree'' data structure, described in the files @file{tree.h} and
+@file{tree.def}.  The documentation for this structure (@pxref{GENERIC})
+is incomplete.
diff --git a/gcc/doc/service.texi b/gcc/doc/service.texi
new file mode 100644
index 000000000..045676088
--- /dev/null
+++ b/gcc/doc/service.texi
@@ -0,0 +1,28 @@
+@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+@c 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Service
+@chapter How To Get Help with GCC
+
+If you need help installing, using or changing GCC, there are two
+ways to find it:
+
+@itemize @bullet
+@item
+Send a message to a suitable network mailing list.  First try
+@email{gcc-help@@gcc.gnu.org} (for help installing or using GCC), and if
+that brings no response, try @email{gcc@@gcc.gnu.org}.  For help
+changing GCC, ask @email{gcc@@gcc.gnu.org}.  If you think you have found
+a bug in GCC, please report it following the instructions at
+@pxref{Bug Reporting}.
+
+@item
+Look in the service directory for someone who might help you for a fee.
+The service directory is found at
+@uref{http://www.fsf.org/resources/service}.
+@end itemize
+
+For further information, see
+@uref{http://gcc.gnu.org/faq.html#support}.
diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
new file mode 100644
index 000000000..f4a2807a1
--- /dev/null
+++ b/gcc/doc/sourcebuild.texi
@@ -0,0 +1,2582 @@
+@c Copyright (C) 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010, 2011
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Source Tree
+@chapter Source Tree Structure and Build System
+
+This chapter describes the structure of the GCC source tree, and how
+GCC is built.  The user documentation for building and installing GCC
+is in a separate manual (@uref{http://gcc.gnu.org/install/}), with
+which it is presumed that you are familiar.
+
+@menu
+* Configure Terms:: Configuration terminology and history.
+* Top Level::       The top level source directory.
+* gcc Directory::   The @file{gcc} subdirectory.
+@end menu
+
+@include configterms.texi
+
+@node Top Level
+@section Top Level Source Directory
+
+The top level source directory in a GCC distribution contains several
+files and directories that are shared with other software
+distributions such as that of GNU Binutils.  It also contains several
+subdirectories that contain parts of GCC and its runtime libraries:
+
+@table @file
+@item boehm-gc
+The Boehm conservative garbage collector, used as part of the Java
+runtime library.
+
+@item config
+Autoconf macros and Makefile fragments used throughout the tree.
+
+@item contrib
+Contributed scripts that may be found useful in conjunction with GCC@.
+One of these, @file{contrib/texi2pod.pl}, is used to generate man
+pages from Texinfo manuals as part of the GCC build process.
+
+@item fixincludes
+The support for fixing system headers to work with GCC@.  See
+@file{fixincludes/README} for more information.  The headers fixed by
+this mechanism are installed in @file{@var{libsubdir}/include-fixed}.
+Along with those headers, @file{README-fixinc} is also installed, as
+@file{@var{libsubdir}/include-fixed/README}.
+
+@item gcc
+The main sources of GCC itself (except for runtime libraries),
+including optimizers, support for different target architectures,
+language front ends, and testsuites.  @xref{gcc Directory, , The
+@file{gcc} Subdirectory}, for details.
+
+@item gnattools
+Support tools for GNAT.
+
+@item include
+Headers for the @code{libiberty} library.
+
+@item intl
+GNU @code{libintl}, from GNU @code{gettext}, for systems which do not
+include it in @code{libc}.
+
+@item libada
+The Ada runtime library.
+
+@item libcpp
+The C preprocessor library.
+
+@item libdecnumber
+The Decimal Float support library.
+
+@item libffi
+The @code{libffi} library, used as part of the Java runtime library.
+
+@item libgcc
+The GCC runtime library.
+
+@item libgfortran
+The Fortran runtime library.
+
+@item libgo
+The Go runtime library.  The bulk of this library is mirrored from the
+@uref{http://code.google.com/@/p/@/go/, master Go repository}.
+
+@item libgomp
+The GNU OpenMP runtime library.
+
+@item libiberty
+The @code{libiberty} library, used for portability and for some
+generally useful data structures and algorithms.  @xref{Top, ,
+Introduction, libiberty, @sc{gnu} libiberty}, for more information
+about this library.
+
+@item libjava
+The Java runtime library.
+
+@item libmudflap
+The @code{libmudflap} library, used for instrumenting pointer and array
+dereferencing operations.
+
+@item libobjc
+The Objective-C and Objective-C++ runtime library.
+
+@item libssp
+The Stack protector runtime library.
+
+@item libstdc++-v3
+The C++ runtime library.
+
+@item lto-plugin
+Plugin used by @command{gold} if link-time optimizations are enabled.
+
+@item maintainer-scripts
+Scripts used by the @code{gccadmin} account on @code{gcc.gnu.org}.
+
+@item zlib
+The @code{zlib} compression library, used by the Java front end, as
+part of the Java runtime library, and for compressing and uncompressing
+GCC's intermediate language in LTO object files.
+@end table
+
+The build system in the top level directory, including how recursion
+into subdirectories works and how building runtime libraries for
+multilibs is handled, is documented in a separate manual, included
+with GNU Binutils.  @xref{Top, , GNU configure and build system,
+configure, The GNU configure and build system}, for details.
+
+@node gcc Directory
+@section The @file{gcc} Subdirectory
+
+The @file{gcc} directory contains many files that are part of the C
+sources of GCC, other files used as part of the configuration and
+build process, and subdirectories including documentation and a
+testsuite.  The files that are sources of GCC are documented in a
+separate chapter.  @xref{Passes, , Passes and Files of the Compiler}.
+
+@menu
+* Subdirectories:: Subdirectories of @file{gcc}.
+* Configuration::  The configuration process, and the files it uses.
+* Build::          The build system in the @file{gcc} directory.
+* Makefile::       Targets in @file{gcc/Makefile}.
+* Library Files::  Library source files and headers under @file{gcc/}.
+* Headers::        Headers installed by GCC.
+* Documentation::  Building documentation in GCC.
+* Front End::      Anatomy of a language front end.
+* Back End::       Anatomy of a target back end.
+@end menu
+
+@node Subdirectories
+@subsection Subdirectories of @file{gcc}
+
+The @file{gcc} directory contains the following subdirectories:
+
+@table @file
+@item @var{language}
+Subdirectories for various languages.  Directories containing a file
+@file{config-lang.in} are language subdirectories.  The contents of
+the subdirectories @file{cp} (for C++), @file{lto} (for LTO),
+@file{objc} (for Objective-C) and @file{objcp} (for Objective-C++) are
+documented in this manual (@pxref{Passes, , Passes and Files of the
+Compiler}); those for other languages are not.  @xref{Front End, ,
+Anatomy of a Language Front End}, for details of the files in these
+directories.
+
+@item config
+Configuration files for supported architectures and operating
+systems.  @xref{Back End, , Anatomy of a Target Back End}, for
+details of the files in this directory.
+
+@item doc
+Texinfo documentation for GCC, together with automatically generated
+man pages and support for converting the installation manual to
+HTML@.  @xref{Documentation}.
+
+@item ginclude
+System headers installed by GCC, mainly those required by the C
+standard of freestanding implementations.  @xref{Headers, , Headers
+Installed by GCC}, for details of when these and other headers are
+installed.
+
+@item po
+Message catalogs with translations of messages produced by GCC into
+various languages, @file{@var{language}.po}.  This directory also
+contains @file{gcc.pot}, the template for these message catalogues,
+@file{exgettext}, a wrapper around @command{gettext} to extract the
+messages from the GCC sources and create @file{gcc.pot}, which is run
+by @samp{make gcc.pot}, and @file{EXCLUDES}, a list of files from
+which messages should not be extracted.
+
+@item testsuite
+The GCC testsuites (except for those for runtime libraries).
+@xref{Testsuites}.
+@end table
+
+@node Configuration
+@subsection Configuration in the @file{gcc} Directory
+
+The @file{gcc} directory is configured with an Autoconf-generated
+script @file{configure}.  The @file{configure} script is generated
+from @file{configure.ac} and @file{aclocal.m4}.  From the files
+@file{configure.ac} and @file{acconfig.h}, Autoheader generates the
+file @file{config.in}.  The file @file{cstamp-h.in} is used as a
+timestamp.
+
+@menu
+* Config Fragments::     Scripts used by @file{configure}.
+* System Config::        The @file{config.build}, @file{config.host}, and
+                         @file{config.gcc} files.
+* Configuration Files::  Files created by running @file{configure}.
+@end menu
+
+@node Config Fragments
+@subsubsection Scripts Used by @file{configure}
+
+@file{configure} uses some other scripts to help in its work:
+
+@itemize @bullet
+@item The standard GNU @file{config.sub} and @file{config.guess}
+files, kept in the top level directory, are used.
+
+@item The file @file{config.gcc} is used to handle configuration
+specific to the particular target machine.  The file
+@file{config.build} is used to handle configuration specific to the
+particular build machine.  The file @file{config.host} is used to handle
+configuration specific to the particular host machine.  (In general,
+these should only be used for features that cannot reasonably be tested in
+Autoconf feature tests.)
+@xref{System Config, , The @file{config.build}; @file{config.host};
+and @file{config.gcc} Files}, for details of the contents of these files.
+
+@item Each language subdirectory has a file
+@file{@var{language}/config-lang.in} that is used for
+front-end-specific configuration.  @xref{Front End Config, , The Front
+End @file{config-lang.in} File}, for details of this file.
+
+@item A helper script @file{configure.frag} is used as part of
+creating the output of @file{configure}.
+@end itemize
+
+@node System Config
+@subsubsection The @file{config.build}; @file{config.host}; and @file{config.gcc} Files
+
+The @file{config.build} file contains specific rules for particular systems
+which GCC is built on.  This should be used as rarely as possible, as the
+behavior of the build system can always be detected by autoconf.
+
+The @file{config.host} file contains specific rules for particular systems
+which GCC will run on.  This is rarely needed.
+
+The @file{config.gcc} file contains specific rules for particular systems
+which GCC will generate code for.  This is usually needed.
+
+Each file has a list of the shell variables it sets, with descriptions, at the
+top of the file.
+
+FIXME: document the contents of these files, and what variables should
+be set to control build, host and target configuration.
+
+@include configfiles.texi
+
+@node Build
+@subsection Build System in the @file{gcc} Directory
+
+FIXME: describe the build system, including what is built in what
+stages.  Also list the various source files that are used in the build
+process but aren't source files of GCC itself and so aren't documented
+below (@pxref{Passes}).
+
+@include makefile.texi
+
+@node Library Files
+@subsection Library Source Files and Headers under the @file{gcc} Directory
+
+FIXME: list here, with explanation, all the C source files and headers
+under the @file{gcc} directory that aren't built into the GCC
+executable but rather are part of runtime libraries and object files,
+such as @file{crtstuff.c} and @file{unwind-dw2.c}.  @xref{Headers, ,
+Headers Installed by GCC}, for more information about the
+@file{ginclude} directory.
+
+@node Headers
+@subsection Headers Installed by GCC
+
+In general, GCC expects the system C library to provide most of the
+headers to be used with it.  However, GCC will fix those headers if
+necessary to make them work with GCC, and will install some headers
+required of freestanding implementations.  These headers are installed
+in @file{@var{libsubdir}/include}.  Headers for non-C runtime
+libraries are also installed by GCC; these are not documented here.
+(FIXME: document them somewhere.)
+
+Several of the headers GCC installs are in the @file{ginclude}
+directory.  These headers, @file{iso646.h},
+@file{stdarg.h}, @file{stdbool.h}, and @file{stddef.h},
+are installed in @file{@var{libsubdir}/include},
+unless the target Makefile fragment (@pxref{Target Fragment})
+overrides this by setting @code{USER_H}.
+
+In addition to these headers and those generated by fixing system
+headers to work with GCC, some other headers may also be installed in
+@file{@var{libsubdir}/include}.  @file{config.gcc} may set
+@code{extra_headers}; this specifies additional headers under
+@file{config} to be installed on some systems.
+
+GCC installs its own version of @code{<float.h>}, from @file{ginclude/float.h}.
+This is done to cope with command-line options that change the
+representation of floating point numbers.
+
+GCC also installs its own version of @code{<limits.h>}; this is generated
+from @file{glimits.h}, together with @file{limitx.h} and
+@file{limity.h} if the system also has its own version of
+@code{<limits.h>}.  (GCC provides its own header because it is
+required of ISO C freestanding implementations, but needs to include
+the system header from its own header as well because other standards
+such as POSIX specify additional values to be defined in
+@code{<limits.h>}.)  The system's @code{<limits.h>} header is used via
+@file{@var{libsubdir}/include/syslimits.h}, which is copied from
+@file{gsyslimits.h} if it does not need fixing to work with GCC; if it
+needs fixing, @file{syslimits.h} is the fixed copy.
+
+GCC can also install @code{<tgmath.h>}.  It will do this when
+@file{config.gcc} sets @code{use_gcc_tgmath} to @code{yes}.
+
+@node Documentation
+@subsection Building Documentation
+
+The main GCC documentation is in the form of manuals in Texinfo
+format.  These are installed in Info format; DVI versions may be
+generated by @samp{make dvi}, PDF versions by @samp{make pdf}, and
+HTML versions by @samp{make html}.  In addition, some man pages are
+generated from the Texinfo manuals, there are some other text files
+with miscellaneous documentation, and runtime libraries have their own
+documentation outside the @file{gcc} directory.  FIXME: document the
+documentation for runtime libraries somewhere.
+
+@menu
+* Texinfo Manuals::      GCC manuals in Texinfo format.
+* Man Page Generation::  Generating man pages from Texinfo manuals.
+* Miscellaneous Docs::   Miscellaneous text files with documentation.
+@end menu
+
+@node Texinfo Manuals
+@subsubsection Texinfo Manuals
+
+The manuals for GCC as a whole, and the C and C++ front ends, are in
+files @file{doc/*.texi}.  Other front ends have their own manuals in
+files @file{@var{language}/*.texi}.  Common files
+@file{doc/include/*.texi} are provided which may be included in
+multiple manuals; the following files are in @file{doc/include}:
+
+@table @file
+@item fdl.texi
+The GNU Free Documentation License.
+@item funding.texi
+The section ``Funding Free Software''.
+@item gcc-common.texi
+Common definitions for manuals.
+@item gpl.texi
+@itemx gpl_v3.texi
+The GNU General Public License.
+@item texinfo.tex
+A copy of @file{texinfo.tex} known to work with the GCC manuals.
+@end table
+
+DVI-formatted manuals are generated by @samp{make dvi}, which uses
+@command{texi2dvi} (via the Makefile macro @code{$(TEXI2DVI)}).  
+PDF-formatted manuals are generated by @samp{make pdf}, which uses
+@command{texi2pdf} (via the Makefile macro @code{$(TEXI2PDF)}).  HTML
+formatted manuals are generated by @samp{make html}.  Info
+manuals are generated by @samp{make info} (which is run as part of
+a bootstrap); this generates the manuals in the source directory,
+using @command{makeinfo} via the Makefile macro @code{$(MAKEINFO)},
+and they are included in release distributions.
+
+Manuals are also provided on the GCC web site, in both HTML and
+PostScript forms.  This is done via the script
+@file{maintainer-scripts/update_web_docs_svn}.  Each manual to be
+provided online must be listed in the definition of @code{MANUALS} in
+that file; a file @file{@var{name}.texi} must only appear once in the
+source tree, and the output manual must have the same name as the
+source file.  (However, other Texinfo files, included in manuals but
+not themselves the root files of manuals, may have names that appear
+more than once in the source tree.)  The manual file
+@file{@var{name}.texi} should only include other files in its own
+directory or in @file{doc/include}.  HTML manuals will be generated by
+@samp{makeinfo --html}, PostScript manuals by @command{texi2dvi}
+and @command{dvips}, and PDF manuals by @command{texi2pdf}.
+All Texinfo files that are parts of manuals must
+be version-controlled, even if they are generated files, for the
+generation of online manuals to work.
+
+The installation manual, @file{doc/install.texi}, is also provided on
+the GCC web site.  The HTML version is generated by the script
+@file{doc/install.texi2html}.
+
+@node Man Page Generation
+@subsubsection Man Page Generation
+
+Because of user demand, in addition to full Texinfo manuals, man pages
+are provided which contain extracts from those manuals.  These man
+pages are generated from the Texinfo manuals using
+@file{contrib/texi2pod.pl} and @command{pod2man}.  (The man page for
+@command{g++}, @file{cp/g++.1}, just contains a @samp{.so} reference
+to @file{gcc.1}, but all the other man pages are generated from
+Texinfo manuals.)
+
+Because many systems may not have the necessary tools installed to
+generate the man pages, they are only generated if the
+@file{configure} script detects that recent enough tools are
+installed, and the Makefiles allow generating man pages to fail
+without aborting the build.  Man pages are also included in release
+distributions.  They are generated in the source directory.
+
+Magic comments in Texinfo files starting @samp{@@c man} control what
+parts of a Texinfo file go into a man page.  Only a subset of Texinfo
+is supported by @file{texi2pod.pl}, and it may be necessary to add
+support for more Texinfo features to this script when generating new
+man pages.  To improve the man page output, some special Texinfo
+macros are provided in @file{doc/include/gcc-common.texi} which
+@file{texi2pod.pl} understands:
+
+@table @code
+@item @@gcctabopt
+Use in the form @samp{@@table @@gcctabopt} for tables of options,
+where for printed output the effect of @samp{@@code} is better than
+that of @samp{@@option} but for man page output a different effect is
+wanted.
+@item @@gccoptlist
+Use for summary lists of options in manuals.
+@item @@gol
+Use at the end of each line inside @samp{@@gccoptlist}.  This is
+necessary to avoid problems with differences in how the
+@samp{@@gccoptlist} macro is handled by different Texinfo formatters.
+@end table
+
+FIXME: describe the @file{texi2pod.pl} input language and magic
+comments in more detail.
+
+@node Miscellaneous Docs
+@subsubsection Miscellaneous Documentation
+
+In addition to the formal documentation that is installed by GCC,
+there are several other text files in the @file{gcc} subdirectory
+with miscellaneous documentation:
+
+@table @file
+@item ABOUT-GCC-NLS
+Notes on GCC's Native Language Support.  FIXME: this should be part of
+this manual rather than a separate file.
+@item ABOUT-NLS
+Notes on the Free Translation Project.
+@item COPYING
+@itemx COPYING3
+The GNU General Public License, Versions 2 and 3.
+@item COPYING.LIB
+@itemx COPYING3.LIB
+The GNU Lesser General Public License, Versions 2.1 and 3.
+@item *ChangeLog*
+@itemx */ChangeLog*
+Change log files for various parts of GCC@.
+@item LANGUAGES
+Details of a few changes to the GCC front-end interface.  FIXME: the
+information in this file should be part of general documentation of
+the front-end interface in this manual.
+@item ONEWS
+Information about new features in old versions of GCC@.  (For recent
+versions, the information is on the GCC web site.)
+@item README.Portability
+Information about portability issues when writing code in GCC@.  FIXME:
+why isn't this part of this manual or of the GCC Coding Conventions?
+@end table
+
+FIXME: document such files in subdirectories, at least @file{config},
+@file{cp}, @file{objc}, @file{testsuite}.
+
+@node Front End
+@subsection Anatomy of a Language Front End
+
+A front end for a language in GCC has the following parts:
+
+@itemize @bullet
+@item
+A directory @file{@var{language}} under @file{gcc} containing source
+files for that front end.  @xref{Front End Directory, , The Front End
+@file{@var{language}} Directory}, for details.
+@item
+A mention of the language in the list of supported languages in
+@file{gcc/doc/install.texi}.
+@item
+A mention of the name under which the language's runtime library is
+recognized by @option{--enable-shared=@var{package}} in the
+documentation of that option in @file{gcc/doc/install.texi}.
+@item
+A mention of any special prerequisites for building the front end in
+the documentation of prerequisites in @file{gcc/doc/install.texi}.
+@item
+Details of contributors to that front end in
+@file{gcc/doc/contrib.texi}.  If the details are in that front end's
+own manual then there should be a link to that manual's list in
+@file{contrib.texi}.
+@item
+Information about support for that language in
+@file{gcc/doc/frontends.texi}.
+@item
+Information about standards for that language, and the front end's
+support for them, in @file{gcc/doc/standards.texi}.  This may be a
+link to such information in the front end's own manual.
+@item
+Details of source file suffixes for that language and @option{-x
+@var{lang}} options supported, in @file{gcc/doc/invoke.texi}.
+@item
+Entries in @code{default_compilers} in @file{gcc.c} for source file
+suffixes for that language.
+@item
+Preferably testsuites, which may be under @file{gcc/testsuite} or
+runtime library directories.  FIXME: document somewhere how to write
+testsuite harnesses.
+@item
+Probably a runtime library for the language, outside the @file{gcc}
+directory.  FIXME: document this further.
+@item
+Details of the directories of any runtime libraries in
+@file{gcc/doc/sourcebuild.texi}.
+@item
+Check targets in @file{Makefile.def} for the top-level @file{Makefile}
+to check just the compiler or the compiler and runtime library for the
+language.
+@end itemize
+
+If the front end is added to the official GCC source repository, the
+following are also necessary:
+
+@itemize @bullet
+@item
+At least one Bugzilla component for bugs in that front end and runtime
+libraries.  This category needs to be added to the Bugzilla database.
+@item
+Normally, one or more maintainers of that front end listed in
+@file{MAINTAINERS}.
+@item
+Mentions on the GCC web site in @file{index.html} and
+@file{frontends.html}, with any relevant links on
+@file{readings.html}.  (Front ends that are not an official part of
+GCC may also be listed on @file{frontends.html}, with relevant links.)
+@item
+A news item on @file{index.html}, and possibly an announcement on the
+@email{gcc-announce@@gcc.gnu.org} mailing list.
+@item
+The front end's manuals should be mentioned in
+@file{maintainer-scripts/update_web_docs_svn} (@pxref{Texinfo Manuals})
+and the online manuals should be linked to from
+@file{onlinedocs/index.html}.
+@item
+Any old releases or CVS repositories of the front end, before its
+inclusion in GCC, should be made available on the GCC FTP site
+@uref{ftp://gcc.gnu.org/pub/gcc/old-releases/}.
+@item
+The release and snapshot script @file{maintainer-scripts/gcc_release}
+should be updated to generate appropriate tarballs for this front end.
+@item
+If this front end includes its own version files that include the
+current date, @file{maintainer-scripts/update_version} should be
+updated accordingly.
+@end itemize
+
+@menu
+* Front End Directory::  The front end @file{@var{language}} directory.
+* Front End Config::     The front end @file{config-lang.in} file.
+* Front End Makefile::   The front end @file{Make-lang.in} file.
+@end menu
+
+@node Front End Directory
+@subsubsection The Front End @file{@var{language}} Directory
+
+A front end @file{@var{language}} directory contains the source files
+of that front end (but not of any runtime libraries, which should be
+outside the @file{gcc} directory).  This includes documentation, and
+possibly some subsidiary programs built alongside the front end.
+Certain files are special and other parts of the compiler depend on
+their names:
+
+@table @file
+@item config-lang.in
+This file is required in all language subdirectories.  @xref{Front End
+Config, , The Front End @file{config-lang.in} File}, for details of
+its contents
+@item Make-lang.in
+This file is required in all language subdirectories.  @xref{Front End
+Makefile, , The Front End @file{Make-lang.in} File}, for details of its
+contents.
+@item lang.opt
+This file registers the set of switches that the front end accepts on
+the command line, and their @option{--help} text.  @xref{Options}.
+@item lang-specs.h
+This file provides entries for @code{default_compilers} in
+@file{gcc.c} which override the default of giving an error that a
+compiler for that language is not installed.
+@item @var{language}-tree.def
+This file, which need not exist, defines any language-specific tree
+codes.
+@end table
+
+@node Front End Config
+@subsubsection The Front End @file{config-lang.in} File
+
+Each language subdirectory contains a @file{config-lang.in} file.  In
+addition the main directory contains @file{c-config-lang.in}, which
+contains limited information for the C language.  This file is a shell
+script that may define some variables describing the language:
+
+@table @code
+@item language
+This definition must be present, and gives the name of the language
+for some purposes such as arguments to @option{--enable-languages}.
+@item lang_requires
+If defined, this variable lists (space-separated) language front ends
+other than C that this front end requires to be enabled (with the
+names given being their @code{language} settings).  For example, the
+Java front end depends on the C++ front end, so sets
+@samp{lang_requires=c++}.
+@item subdir_requires
+If defined, this variable lists (space-separated) front end directories
+other than C that this front end requires to be present.  For example,
+the Objective-C++ front end uses source files from the C++ and
+Objective-C front ends, so sets @samp{subdir_requires="cp objc"}.
+@item target_libs
+If defined, this variable lists (space-separated) targets in the top
+level @file{Makefile} to build the runtime libraries for this
+language, such as @code{target-libobjc}.
+@item lang_dirs
+If defined, this variable lists (space-separated) top level
+directories (parallel to @file{gcc}), apart from the runtime libraries,
+that should not be configured if this front end is not built.
+@item build_by_default
+If defined to @samp{no}, this language front end is not built unless
+enabled in a @option{--enable-languages} argument.  Otherwise, front
+ends are built by default, subject to any special logic in
+@file{configure.ac} (as is present to disable the Ada front end if the
+Ada compiler is not already installed).
+@item boot_language
+If defined to @samp{yes}, this front end is built in stage1 of the
+bootstrap.  This is only relevant to front ends written in their own
+languages.
+@item compilers
+If defined, a space-separated list of compiler executables that will
+be run by the driver.  The names here will each end
+with @samp{\$(exeext)}.
+@item outputs
+If defined, a space-separated list of files that should be generated
+by @file{configure} substituting values in them.  This mechanism can
+be used to create a file @file{@var{language}/Makefile} from
+@file{@var{language}/Makefile.in}, but this is deprecated, building
+everything from the single @file{gcc/Makefile} is preferred.
+@item gtfiles
+If defined, a space-separated list of files that should be scanned by
+@file{gengtype.c} to generate the garbage collection tables and routines for
+this language.  This excludes the files that are common to all front
+ends.  @xref{Type Information}.
+
+@end table
+
+@node Front End Makefile
+@subsubsection The Front End @file{Make-lang.in} File
+
+Each language subdirectory contains a @file{Make-lang.in} file.  It contains
+targets @code{@var{lang}.@var{hook}} (where @code{@var{lang}} is the
+setting of @code{language} in @file{config-lang.in}) for the following
+values of @code{@var{hook}}, and any other Makefile rules required to
+build those targets (which may if necessary use other Makefiles
+specified in @code{outputs} in @file{config-lang.in}, although this is
+deprecated).  It also adds any testsuite targets that can use the
+standard rule in @file{gcc/Makefile.in} to the variable
+@code{lang_checks}.
+
+@table @code
+@itemx all.cross
+@itemx start.encap
+@itemx rest.encap
+FIXME: exactly what goes in each of these targets?
+@item tags
+Build an @command{etags} @file{TAGS} file in the language subdirectory
+in the source tree.
+@item info
+Build info documentation for the front end, in the build directory.
+This target is only called by @samp{make bootstrap} if a suitable
+version of @command{makeinfo} is available, so does not need to check
+for this, and should fail if an error occurs.
+@item dvi
+Build DVI documentation for the front end, in the build directory.
+This should be done using @code{$(TEXI2DVI)}, with appropriate
+@option{-I} arguments pointing to directories of included files.
+@item pdf
+Build PDF documentation for the front end, in the build directory.
+This should be done using @code{$(TEXI2PDF)}, with appropriate
+@option{-I} arguments pointing to directories of included files.
+@item html
+Build HTML documentation for the front end, in the build directory.
+@item man
+Build generated man pages for the front end from Texinfo manuals
+(@pxref{Man Page Generation}), in the build directory.  This target
+is only called if the necessary tools are available, but should ignore
+errors so as not to stop the build if errors occur; man pages are
+optional and the tools involved may be installed in a broken way.
+@item install-common
+Install everything that is part of the front end, apart from the
+compiler executables listed in @code{compilers} in
+@file{config-lang.in}.
+@item install-info
+Install info documentation for the front end, if it is present in the
+source directory.  This target should have dependencies on info files
+that should be installed.
+@item install-man
+Install man pages for the front end.  This target should ignore
+errors.
+@item install-plugin
+Install headers needed for plugins.
+@item srcextra
+Copies its dependencies into the source directory.  This generally should
+be used for generated files such as Bison output files which are not
+version-controlled, but should be included in any release tarballs.  This
+target will be executed during a bootstrap if
+@samp{--enable-generated-files-in-srcdir} was specified as a
+@file{configure} option.
+@item srcinfo
+@itemx srcman
+Copies its dependencies into the source directory.  These targets will be
+executed during a bootstrap if @samp{--enable-generated-files-in-srcdir}
+was specified as a @file{configure} option.
+@item uninstall
+Uninstall files installed by installing the compiler.  This is
+currently documented not to be supported, so the hook need not do
+anything.
+@item mostlyclean
+@itemx clean
+@itemx distclean
+@itemx maintainer-clean
+The language parts of the standard GNU
+@samp{*clean} targets.  @xref{Standard Targets, , Standard Targets for
+Users, standards, GNU Coding Standards}, for details of the standard
+targets.  For GCC, @code{maintainer-clean} should delete
+all generated files in the source directory that are not version-controlled,
+but should not delete anything that is.
+@end table
+
+@file{Make-lang.in} must also define a variable @code{@var{lang}_OBJS}
+to a list of host object files that are used by that language.
+
+@node Back End
+@subsection Anatomy of a Target Back End
+
+A back end for a target architecture in GCC has the following parts:
+
+@itemize @bullet
+@item
+A directory @file{@var{machine}} under @file{gcc/config}, containing a
+machine description @file{@var{machine}.md} file (@pxref{Machine Desc,
+, Machine Descriptions}), header files @file{@var{machine}.h} and
+@file{@var{machine}-protos.h} and a source file @file{@var{machine}.c}
+(@pxref{Target Macros, , Target Description Macros and Functions}),
+possibly a target Makefile fragment @file{t-@var{machine}}
+(@pxref{Target Fragment, , The Target Makefile Fragment}), and maybe
+some other files.  The names of these files may be changed from the
+defaults given by explicit specifications in @file{config.gcc}.
+@item
+If necessary, a file @file{@var{machine}-modes.def} in the
+@file{@var{machine}} directory, containing additional machine modes to
+represent condition codes.  @xref{Condition Code}, for further details.
+@item
+An optional @file{@var{machine}.opt} file in the @file{@var{machine}}
+directory, containing a list of target-specific options.  You can also
+add other option files using the @code{extra_options} variable in
+@file{config.gcc}.  @xref{Options}.
+@item
+Entries in @file{config.gcc} (@pxref{System Config, , The
+@file{config.gcc} File}) for the systems with this target
+architecture.
+@item
+Documentation in @file{gcc/doc/invoke.texi} for any command-line
+options supported by this target (@pxref{Run-time Target, , Run-time
+Target Specification}).  This means both entries in the summary table
+of options and details of the individual options.
+@item
+Documentation in @file{gcc/doc/extend.texi} for any target-specific
+attributes supported (@pxref{Target Attributes, , Defining
+target-specific uses of @code{__attribute__}}), including where the
+same attribute is already supported on some targets, which are
+enumerated in the manual.
+@item
+Documentation in @file{gcc/doc/extend.texi} for any target-specific
+pragmas supported.
+@item
+Documentation in @file{gcc/doc/extend.texi} of any target-specific
+built-in functions supported.
+@item
+Documentation in @file{gcc/doc/extend.texi} of any target-specific
+format checking styles supported.
+@item
+Documentation in @file{gcc/doc/md.texi} of any target-specific
+constraint letters (@pxref{Machine Constraints, , Constraints for
+Particular Machines}).
+@item
+A note in @file{gcc/doc/contrib.texi} under the person or people who
+contributed the target support.
+@item
+Entries in @file{gcc/doc/install.texi} for all target triplets
+supported with this target architecture, giving details of any special
+notes about installation for this target, or saying that there are no
+special notes if there are none.
+@item
+Possibly other support outside the @file{gcc} directory for runtime
+libraries.  FIXME: reference docs for this.  The @code{libstdc++} porting
+manual needs to be installed as info for this to work, or to be a
+chapter of this manual.
+@end itemize
+
+If the back end is added to the official GCC source repository, the
+following are also necessary:
+
+@itemize @bullet
+@item
+An entry for the target architecture in @file{readings.html} on the
+GCC web site, with any relevant links.
+@item
+Details of the properties of the back end and target architecture in
+@file{backends.html} on the GCC web site.
+@item
+A news item about the contribution of support for that target
+architecture, in @file{index.html} on the GCC web site.
+@item
+Normally, one or more maintainers of that target listed in
+@file{MAINTAINERS}.  Some existing architectures may be unmaintained,
+but it would be unusual to add support for a target that does not have
+a maintainer when support is added.
+@end itemize
+
+@node Testsuites
+@chapter Testsuites
+
+GCC contains several testsuites to help maintain compiler quality.
+Most of the runtime libraries and language front ends in GCC have
+testsuites.  Currently only the C language testsuites are documented
+here; FIXME: document the others.
+
+@menu
+* Test Idioms::     Idioms used in testsuite code.
+* Test Directives:: Directives used within DejaGnu tests.
+* Ada Tests::       The Ada language testsuites.
+* C Tests::         The C language testsuites.
+* libgcj Tests::    The Java library testsuites.
+* LTO Testing::     Support for testing link-time optimizations.
+* gcov Testing::    Support for testing gcov.
+* profopt Testing:: Support for testing profile-directed optimizations.
+* compat Testing::  Support for testing binary compatibility.
+* Torture Tests::   Support for torture testing using multiple options.
+@end menu
+
+@node Test Idioms
+@section Idioms Used in Testsuite Code
+
+In general, C testcases have a trailing @file{-@var{n}.c}, starting
+with @file{-1.c}, in case other testcases with similar names are added
+later.  If the test is a test of some well-defined feature, it should
+have a name referring to that feature such as
+@file{@var{feature}-1.c}.  If it does not test a well-defined feature
+but just happens to exercise a bug somewhere in the compiler, and a
+bug report has been filed for this bug in the GCC bug database,
+@file{pr@var{bug-number}-1.c} is the appropriate form of name.
+Otherwise (for miscellaneous bugs not filed in the GCC bug database),
+and previously more generally, test cases are named after the date on
+which they were added.  This allows people to tell at a glance whether
+a test failure is because of a recently found bug that has not yet
+been fixed, or whether it may be a regression, but does not give any
+other information about the bug or where discussion of it may be
+found.  Some other language testsuites follow similar conventions.
+
+In the @file{gcc.dg} testsuite, it is often necessary to test that an
+error is indeed a hard error and not just a warning---for example,
+where it is a constraint violation in the C standard, which must
+become an error with @option{-pedantic-errors}.  The following idiom,
+where the first line shown is line @var{line} of the file and the line
+that generates the error, is used for this:
+
+@smallexample
+/* @{ dg-bogus "warning" "warning in place of error" @} */
+/* @{ dg-error "@var{regexp}" "@var{message}" @{ target *-*-* @} @var{line} @} */
+@end smallexample
+
+It may be necessary to check that an expression is an integer constant
+expression and has a certain value.  To check that @code{@var{E}} has
+value @code{@var{V}}, an idiom similar to the following is used:
+
+@smallexample
+char x[((E) == (V) ? 1 : -1)];
+@end smallexample
+
+In @file{gcc.dg} tests, @code{__typeof__} is sometimes used to make
+assertions about the types of expressions.  See, for example,
+@file{gcc.dg/c99-condexpr-1.c}.  The more subtle uses depend on the
+exact rules for the types of conditional expressions in the C
+standard; see, for example, @file{gcc.dg/c99-intconst-1.c}.
+
+It is useful to be able to test that optimizations are being made
+properly.  This cannot be done in all cases, but it can be done where
+the optimization will lead to code being optimized away (for example,
+where flow analysis or alias analysis should show that certain code
+cannot be called) or to functions not being called because they have
+been expanded as built-in functions.  Such tests go in
+@file{gcc.c-torture/execute}.  Where code should be optimized away, a
+call to a nonexistent function such as @code{link_failure ()} may be
+inserted; a definition
+
+@smallexample
+#ifndef __OPTIMIZE__
+void
+link_failure (void)
+@{
+  abort ();
+@}
+#endif
+@end smallexample
+
+@noindent
+will also be needed so that linking still succeeds when the test is
+run without optimization.  When all calls to a built-in function
+should have been optimized and no calls to the non-built-in version of
+the function should remain, that function may be defined as
+@code{static} to call @code{abort ()} (although redeclaring a function
+as static may not work on all targets).
+
+All testcases must be portable.  Target-specific testcases must have
+appropriate code to avoid causing failures on unsupported systems;
+unfortunately, the mechanisms for this differ by directory.
+
+FIXME: discuss non-C testsuites here.
+
+@node Test Directives
+@section Directives used within DejaGnu tests
+
+@menu
+* Directives::  Syntax and descriptions of test directives.
+* Selectors:: Selecting targets to which a test applies.
+* Effective-Target Keywords:: Keywords describing target attributes.
+* Add Options:: Features for @code{dg-add-options}
+* Require Support:: Variants of @code{dg-require-@var{support}}
+* Final Actions:: Commands for use in @code{dg-final}
+@end menu
+
+@node Directives
+@subsection Syntax and Descriptions of test directives
+
+Test directives appear within comments in a test source file and begin
+with @code{dg-}.  Some of these are defined within DejaGnu and others
+are local to the GCC testsuite.
+
+The order in which test directives appear in a test can be important:
+directives local to GCC sometimes override information used by the
+DejaGnu directives, which know nothing about the GCC directives, so the
+DejaGnu directives must precede GCC directives.
+
+Several test directives include selectors (@pxref{Selectors, , })
+which are usually preceded by the keyword @code{target} or @code{xfail}.
+
+@subsubsection Specify how to build the test
+
+@table @code
+@item @{ dg-do @var{do-what-keyword} [@{ target/xfail @var{selector} @}] @}
+@var{do-what-keyword} specifies how the test is compiled and whether
+it is executed.  It is one of:
+
+@table @code
+@item preprocess
+Compile with @option{-E} to run only the preprocessor.
+@item compile
+Compile with @option{-S} to produce an assembly code file.
+@item assemble
+Compile with @option{-c} to produce a relocatable object file.
+@item link
+Compile, assemble, and link to produce an executable file.
+@item run
+Produce and run an executable file, which is expected to return
+an exit code of 0.
+@end table
+
+The default is @code{compile}.  That can be overridden for a set of
+tests by redefining @code{dg-do-what-default} within the @code{.exp}
+file for those tests.
+
+If the directive includes the optional @samp{@{ target @var{selector} @}}
+then the test is skipped unless the target system matches the
+@var{selector}.
+
+If @var{do-what-keyword} is @code{run} and the directive includes
+the optional @samp{@{ xfail @var{selector} @}} and the selector is met
+then the test is expected to fail.  The @code{xfail} clause is ignored
+for other values of @var{do-what-keyword}; those tests can use
+directive @code{dg-xfail-if}.
+@end table
+
+@subsubsection Specify additional compiler options
+
+@table @code
+@item @{ dg-options @var{options} [@{ target @var{selector} @}] @}
+This DejaGnu directive provides a list of compiler options, to be used
+if the target system matches @var{selector}, that replace the default
+options used for this set of tests.
+
+@item @{ dg-add-options @var{feature} @dots{} @}
+Add any compiler options that are needed to access certain features.
+This directive does nothing on targets that enable the features by
+default, or that don't provide them at all.  It must come after
+all @code{dg-options} directives.
+For supported values of @var{feature} see @ref{Add Options, ,}.
+@end table
+
+@subsubsection Modify the test timeout value
+
+The normal timeout limit, in seconds, is found by searching the
+following in order:
+
+@itemize @bullet
+@item the value defined by an earlier @code{dg-timeout} directive in
+the test
+
+@item variable @var{tool_timeout} defined by the set of tests
+
+@item @var{gcc},@var{timeout} set in the target board
+
+@item 300
+@end itemize
+
+@table @code
+@item @{ dg-timeout @var{n} [@{target @var{selector} @}] @}
+Set the time limit for the compilation and for the execution of the test
+to the specified number of seconds.
+
+@item @{ dg-timeout-factor @var{x} [@{ target @var{selector} @}] @}
+Multiply the normal time limit for compilation and execution of the test
+by the specified floating-point factor.
+@end table
+
+@subsubsection Skip a test for some targets
+
+@table @code
+@item @{ dg-skip-if @var{comment} @{ @var{selector} @} [@{ @var{include-opts} @} [@{ @var{exclude-opts} @}]] @}
+Arguments @var{include-opts} and @var{exclude-opts} are lists in which
+each element is a string of zero or more GCC options.
+Skip the test if all of the following conditions are met:
+@itemize @bullet
+@item the test system is included in @var{selector}
+
+@item for at least one of the option strings in @var{include-opts},
+every option from that string is in the set of options with which
+the test would be compiled; use @samp{"*"} for an @var{include-opts} list
+that matches any options; that is the default if @var{include-opts} is
+not specified
+
+@item for each of the option strings in @var{exclude-opts}, at least one
+option from that string is not in the set of options with which the test
+would be compiled; use @samp{""} for an empty @var{exclude-opts} list;
+that is the default if @var{exclude-opts} is not specified
+@end itemize
+
+For example, to skip a test if option @code{-Os} is present:
+
+@smallexample
+/* @{ dg-skip-if "" @{ *-*-* @}  @{ "-Os" @} @{ "" @} @} */
+@end smallexample
+
+To skip a test if both options @code{-O2} and @code{-g} are present:
+
+@smallexample
+/* @{ dg-skip-if "" @{ *-*-* @}  @{ "-O2 -g" @} @{ "" @} @} */
+@end smallexample
+
+To skip a test if either @code{-O2} or @code{-O3} is present:
+
+@smallexample
+/* @{ dg-skip-if "" @{ *-*-* @}  @{ "-O2" "-O3" @} @{ "" @} @} */
+@end smallexample
+
+To skip a test unless option @code{-Os} is present:
+
+@smallexample
+/* @{ dg-skip-if "" @{ *-*-* @}  @{ "*" @} @{ "-Os" @} @} */
+@end smallexample
+
+To skip a test if either @code{-O2} or @code{-O3} is used with @code{-g}
+but not if @code{-fpic} is also present:
+
+@smallexample
+/* @{ dg-skip-if "" @{ *-*-* @}  @{ "-O2 -g" "-O3 -g" @} @{ "-fpic" @} @} */
+@end smallexample
+
+@item @{ dg-require-effective-target @var{keyword} [@{ @var{selector} @}] @}
+Skip the test if the test target, including current multilib flags,
+is not covered by the effective-target keyword.
+If the directive includes the optional @samp{@{ @var{selector} @}}
+then the effective-target test is only performed if the target system
+matches the @var{selector}.
+This directive must appear after any @code{dg-do} directive in the test
+and before any @code{dg-additional-sources} directive.
+@xref{Effective-Target Keywords, , }.
+
+@item @{ dg-require-@var{support} args @}
+Skip the test if the target does not provide the required support.
+These directives must appear after any @code{dg-do} directive in the test
+and before any @code{dg-additional-sources} directive.
+They require at least one argument, which can be an empty string if the
+specific procedure does not examine the argument.
+@xref{Require Support, , }, for a complete list of these directives.
+@end table
+
+@subsubsection Expect a test to fail for some targets
+
+@table @code
+@item  @{ dg-xfail-if @var{comment} @{ @var{selector} @} [@{ @var{include-opts} @} [@{ @var{exclude-opts} @}]] @}
+Expect the test to fail if the conditions (which are the same as for
+@code{dg-skip-if}) are met.  This does not affect the execute step.
+
+@item  @{ dg-xfail-run-if @var{comment} @{ @var{selector} @} [@{ @var{include-opts} @} [@{ @var{exclude-opts} @}]] @}
+Expect the execute step of a test to fail if the conditions (which are
+the same as for @code{dg-skip-if}) are met.
+@end table
+
+@subsubsection Expect the test executable to fail
+
+@table @code
+@item  @{ dg-shouldfail @var{comment} [@{ @var{selector} @} [@{ @var{include-opts} @} [@{ @var{exclude-opts} @}]]] @}
+Expect the test executable to return a nonzero exit status if the
+conditions (which are the same as for @code{dg-skip-if}) are met.
+@end table
+
+@subsubsection Verify compiler messages
+
+@table @code
+@item @{ dg-error @var{regexp} [@var{comment} [@{ target/xfail @var{selector} @} [@var{line}] @}]] @}
+This DejaGnu directive appears on a source line that is expected to get
+an error message, or else specifies the source line associated with the
+message.  If there is no message for that line or if the text of that
+message is not matched by @var{regexp} then the check fails and
+@var{comment} is included in the @code{FAIL} message.  The check does
+not look for the string @samp{error} unless it is part of @var{regexp}.
+
+@item @{ dg-warning @var{regexp} [@var{comment} [@{ target/xfail @var{selector} @} [@var{line}] @}]] @}
+This DejaGnu directive appears on a source line that is expected to get
+a warning message, or else specifies the source line associated with the
+message.  If there is no message for that line or if the text of that
+message is not matched by @var{regexp} then the check fails and
+@var{comment} is included in the @code{FAIL} message.  The check does
+not look for the string @samp{warning} unless it is part of @var{regexp}.
+
+@item @{ dg-message @var{regexp} [@var{comment} [@{ target/xfail @var{selector} @} [@var{line}] @}]] @}
+The line is expected to get a message other than an error or warning.
+If there is no message for that line or if the text of that message is
+not matched by @var{regexp} then the check fails and @var{comment} is
+included in the @code{FAIL} message.
+
+@item @{ dg-bogus @var{regexp} [@var{comment} [@{ target/xfail @var{selector} @} [@var{line}] @}]] @}
+This DejaGnu directive appears on a source line that should not get a
+message matching @var{regexp}, or else specifies the source line
+associated with the bogus message.  It is usually used with @samp{xfail}
+to indicate that the message is a known problem for a particular set of
+targets.
+
+@item @{ dg-excess-errors @var{comment} [@{ target/xfail @var{selector} @}] @}
+This DejaGnu directive indicates that the test is expected to fail due
+to compiler messages that are not handled by @samp{dg-error},
+@samp{dg-warning} or @samp{dg-bogus}.  For this directive @samp{xfail}
+has the same effect as @samp{target}.
+
+@item @{ dg-prune-output @var{regexp} @}
+Prune messages matching @var{regexp} from the test output.
+@end table
+
+@subsubsection Verify output of the test executable
+
+@table @code
+@item @{ dg-output @var{regexp} [@{ target/xfail @var{selector} @}] @}
+This DejaGnu directive compares @var{regexp} to the combined output
+that the test executable writes to @file{stdout} and @file{stderr}.
+@end table
+
+@subsubsection Specify additional files for a test
+
+@table @code
+@item @{ dg-additional-files "@var{filelist}" @}
+Specify additional files, other than source files, that must be copied
+to the system where the compiler runs.
+
+@item @{ dg-additional-sources "@var{filelist}" @}
+Specify additional source files to appear in the compile line
+following the main test file.
+@end table
+
+@subsubsection Add checks at the end of a test
+
+@table @code
+@item @{ dg-final @{ @var{local-directive} @} @}
+This DejaGnu directive is placed within a comment anywhere in the
+source file and is processed after the test has been compiled and run.
+Multiple @samp{dg-final} commands are processed in the order in which
+they appear in the source file.  @xref{Final Actions, , }, for a list
+of directives that can be used within @code{dg-final}.
+@end table
+
+@node Selectors
+@subsection Selecting targets to which a test applies
+
+Several test directives include @var{selector}s to limit the targets
+for which a test is run or to declare that a test is expected to fail
+on particular targets.
+
+A selector is:
+@itemize @bullet
+@item one or more target triplets, possibly including wildcard characters
+@item a single effective-target keyword (@pxref{Effective-Target Keywords})
+@item a logical expression
+@end itemize
+
+Depending on the
+context, the selector specifies whether a test is skipped and reported
+as unsupported or is expected to fail.  Use @samp{*-*-*} to match any
+target.
+
+A selector expression appears within curly braces and uses a single
+logical operator: one of @samp{!}, @samp{&&}, or @samp{||}.  An
+operand is another selector expression, an effective-target keyword,
+a single target triplet, or a list of target triplets within quotes or
+curly braces.  For example:
+
+@smallexample
+@{ target @{ ! "hppa*-*-* ia64*-*-*" @} @}
+@{ target @{ powerpc*-*-* && lp64 @} @}
+@{ xfail @{ lp64 || vect_no_align @} @}
+@end smallexample
+
+@node Effective-Target Keywords
+@subsection Keywords describing target attributes
+
+Effective-target keywords identify sets of targets that support
+particular functionality.  They are used to limit tests to be run only
+for particular targets, or to specify that particular sets of targets
+are expected to fail some tests.
+
+Effective-target keywords are defined in @file{lib/target-supports.exp} in
+the GCC testsuite, with the exception of those that are documented as
+being local to a particular test directory.
+
+The @samp{effective target} takes into account all of the compiler options
+with which the test will be compiled, including the multilib options.
+By convention, keywords ending in @code{_nocache} can also include options
+specified for the particular test in an earlier @code{dg-options} or
+@code{dg-add-options} directive.
+
+@subsubsection Data type sizes
+
+@table @code
+@item ilp32
+Target has 32-bit @code{int}, @code{long}, and pointers.
+
+@item lp64
+Target has 32-bit @code{int}, 64-bit @code{long} and pointers.
+
+@item llp64
+Target has 32-bit @code{int} and @code{long}, 64-bit @code{long long}
+and pointers.
+
+@item double64
+Target has 64-bit @code{double}.
+
+@item double64plus
+Target has @code{double} that is 64 bits or longer.
+
+@item int32plus
+Target has @code{int} that is at 32 bits or longer.
+
+@item int16
+Target has @code{int} that is 16 bits or shorter.
+
+@item large_double
+Target supports @code{double} that is longer than @code{float}.
+
+@item large_long_double
+Target supports @code{long double} that is longer than @code{double}.
+
+@item ptr32plus
+Target has pointers that are 32 bits or longer.
+
+@item size32plus
+Target supports array and structure sizes that are 32 bits or longer.
+
+@item 4byte_wchar_t
+Target has @code{wchar_t} that is at least 4 bytes.
+@end table
+
+@subsubsection Fortran-specific attributes
+
+@table @code
+@item fortran_integer_16
+Target supports Fortran @code{integer} that is 16 bytes or longer.
+
+@item fortran_large_int
+Target supports Fortran @code{integer} kinds larger than @code{integer(8)}.
+
+@item fortran_large_real
+Target supports Fortran @code{real} kinds larger than @code{real(8)}.
+@end table
+
+@subsubsection Vector-specific attributes
+
+@table @code
+@item vect_condition
+Target supports vector conditional operations.
+
+@item vect_double
+Target supports hardware vectors of @code{double}.
+
+@item vect_float
+Target supports hardware vectors of @code{float}.
+
+@item vect_int
+Target supports hardware vectors of @code{int}.
+
+@item vect_long
+Target supports hardware vectors of @code{long}.
+
+@item vect_long_long
+Target supports hardware vectors of @code{long long}.
+
+@item vect_aligned_arrays
+Target aligns arrays to vector alignment boundary.
+
+@item vect_hw_misalign
+Target supports a vector misalign access.
+
+@item vect_no_align
+Target does not support a vector alignment mechanism.
+
+@item vect_no_int_max
+Target does not support a vector max instruction on @code{int}.
+
+@item vect_no_int_add
+Target does not support a vector add instruction on @code{int}.
+
+@item vect_no_bitwise
+Target does not support vector bitwise instructions.
+
+@item vect_char_mult
+Target supports @code{vector char} multiplication.
+
+@item vect_short_mult
+Target supports @code{vector short} multiplication.
+
+@item vect_int_mult
+Target supports @code{vector int} multiplication.
+
+@item vect_extract_even_odd
+Target supports vector even/odd element extraction.
+
+@item vect_extract_even_odd_wide
+Target supports vector even/odd element extraction of vectors with elements
+@code{SImode} or larger.
+
+@item vect_interleave
+Target supports vector interleaving.
+
+@item vect_strided
+Target supports vector interleaving and extract even/odd.
+
+@item vect_strided_wide
+Target supports vector interleaving and extract even/odd for wide
+element types.
+
+@item vect_perm
+Target supports vector permutation.
+
+@item vect_shift
+Target supports a hardware vector shift operation.
+
+@item vect_widen_sum_hi_to_si
+Target supports a vector widening summation of @code{short} operands
+into @code{int} results, or can promote (unpack) from @code{short}
+to @code{int}.
+
+@item vect_widen_sum_qi_to_hi
+Target supports a vector widening summation of @code{char} operands
+into @code{short} results, or can promote (unpack) from @code{char}
+to @code{short}.
+
+@item vect_widen_sum_qi_to_si
+Target supports a vector widening summation of @code{char} operands
+into @code{int} results.
+
+@item vect_widen_mult_qi_to_hi
+Target supports a vector widening multiplication of @code{char} operands
+into @code{short} results, or can promote (unpack) from @code{char} to
+@code{short} and perform non-widening multiplication of @code{short}.
+
+@item vect_widen_mult_hi_to_si
+Target supports a vector widening multiplication of @code{short} operands
+into @code{int} results, or can promote (unpack) from @code{short} to
+@code{int} and perform non-widening multiplication of @code{int}.
+
+@item vect_sdot_qi
+Target supports a vector dot-product of @code{signed char}.
+
+@item vect_udot_qi
+Target supports a vector dot-product of @code{unsigned char}.
+
+@item vect_sdot_hi
+Target supports a vector dot-product of @code{signed short}.
+
+@item vect_udot_hi
+Target supports a vector dot-product of @code{unsigned short}.
+
+@item vect_pack_trunc
+Target supports a vector demotion (packing) of @code{short} to @code{char}
+and from @code{int} to @code{short} using modulo arithmetic.
+
+@item vect_unpack
+Target supports a vector promotion (unpacking) of @code{char} to @code{short}
+and from @code{char} to @code{int}.
+
+@item vect_intfloat_cvt
+Target supports conversion from @code{signed int} to @code{float}.
+
+@item vect_uintfloat_cvt
+Target supports conversion from @code{unsigned int} to @code{float}.
+
+@item vect_floatint_cvt
+Target supports conversion from @code{float} to @code{signed int}.
+
+@item vect_floatuint_cvt
+Target supports conversion from @code{float} to @code{unsigned int}.
+@end table
+
+@subsubsection Thread Local Storage attributes
+
+@table @code
+@item tls
+Target supports thread-local storage.
+
+@item tls_native
+Target supports native (rather than emulated) thread-local storage.
+
+@item tls_runtime
+Test system supports executing TLS executables.
+@end table
+
+@subsubsection Decimal floating point attributes
+
+@table @code
+@item dfp
+Targets supports compiling decimal floating point extension to C.
+
+@item dfp_nocache
+Including the options used to compile this particular test, the
+target supports compiling decimal floating point extension to C.
+
+@item dfprt
+Test system can execute decimal floating point tests.
+
+@item dfprt_nocache
+Including the options used to compile this particular test, the
+test system can execute decimal floating point tests.
+
+@item hard_dfp
+Target generates decimal floating point instructions with current options.
+@end table
+
+@subsubsection ARM-specific attributes
+
+@table @code
+@item arm32
+ARM target generates 32-bit code.
+
+@item arm_eabi
+ARM target adheres to the ABI for the ARM Architecture.
+
+@item arm_hard_vfp_ok
+ARM target supports @code{-mfpu=vfp -mfloat-abi=hard}.
+Some multilibs may be incompatible with these options.
+
+@item arm_iwmmxt_ok
+ARM target supports @code{-mcpu=iwmmxt}.
+Some multilibs may be incompatible with this option.
+
+@item arm_neon
+ARM target supports generating NEON instructions.
+
+@item arm_neon_hw
+Test system supports executing NEON instructions.
+
+@item arm_neon_ok
+@anchor{arm_neon_ok}
+ARM Target supports @code{-mfpu=neon -mfloat-abi=softfp} or compatible
+options.  Some multilibs may be incompatible with these options.
+
+@item arm_neon_fp16_ok
+@anchor{arm_neon_fp16_ok}
+ARM Target supports @code{-mfpu=neon-fp16 -mfloat-abi=softfp} or compatible
+options.  Some multilibs may be incompatible with these options.
+
+@item arm_thumb1_ok
+ARM target generates Thumb-1 code for @code{-mthumb}.
+
+@item arm_thumb2_ok
+ARM target generates Thumb-2 code for @code{-mthumb}.
+
+@item arm_vfp_ok
+ARM target supports @code{-mfpu=vfp -mfloat-abi=softfp}.
+Some multilibs may be incompatible with these options.
+@end table
+
+@subsubsection MIPS-specific attributes
+
+@table @code
+@item mips64
+MIPS target supports 64-bit instructions.
+
+@item nomips16
+MIPS target does not produce MIPS16 code.
+
+@item mips16_attribute
+MIPS target can generate MIPS16 code.
+
+@item mips_loongson
+MIPS target is a Loongson-2E or -2F target using an ABI that supports
+the Loongson vector modes.
+
+@item mips_newabi_large_long_double
+MIPS target supports @code{long double} larger than @code{double}
+when using the new ABI.
+
+@item mpaired_single
+MIPS target supports @code{-mpaired-single}.
+@end table
+
+@subsubsection PowerPC-specific attributes
+
+@table @code
+@item powerpc64
+Test system supports executing 64-bit instructions.
+
+@item powerpc_altivec
+PowerPC target supports AltiVec.
+
+@item powerpc_altivec_ok
+PowerPC target supports @code{-maltivec}.
+
+@item powerpc_fprs
+PowerPC target supports floating-point registers.
+
+@item powerpc_hard_double
+PowerPC target supports hardware double-precision floating-point.
+
+@item powerpc_ppu_ok
+PowerPC target supports @code{-mcpu=cell}.
+
+@item powerpc_spe
+PowerPC target supports PowerPC SPE.
+
+@item powerpc_spe_nocache
+Including the options used to compile this particular test, the
+PowerPC target supports PowerPC SPE.
+
+@item powerpc_spu
+PowerPC target supports PowerPC SPU.
+
+@item spu_auto_overlay
+SPU target has toolchain that supports automatic overlay generation.
+
+@item powerpc_vsx_ok
+PowerPC target supports @code{-mvsx}.
+
+@item powerpc_405_nocache
+Including the options used to compile this particular test, the
+PowerPC target supports PowerPC 405.
+
+@item vmx_hw
+PowerPC target supports executing AltiVec instructions.
+@end table
+
+@subsubsection Other hardware attributes
+
+@table @code
+@item avx
+Target supports compiling @code{avx} instructions.
+
+@item avx_runtime
+Target supports the execution of @code{avx} instructions.
+
+@item cell_hw
+Test system can execute AltiVec and Cell PPU instructions.
+
+@item coldfire_fpu
+Target uses a ColdFire FPU.
+
+@item hard_float
+Target supports FPU instructions.
+
+@item sse
+Target supports compiling @code{sse} instructions.
+
+@item sse_runtime
+Target supports the execution of @code{sse} instructions.
+
+@item sse2
+Target supports compiling @code{sse2} instructions.
+
+@item sse2_runtime
+Target supports the execution of @code{sse2} instructions.
+
+@item sync_char_short
+Target supports atomic operations on @code{char} and @code{short}.
+
+@item sync_int_long
+Target supports atomic operations on @code{int} and @code{long}.
+
+@item ultrasparc_hw
+Test environment appears to run executables on a simulator that
+accepts only @code{EM_SPARC} executables and chokes on @code{EM_SPARC32PLUS}
+or @code{EM_SPARCV9} executables.
+
+@item vect_cmdline_needed
+Target requires a command line argument to enable a SIMD instruction set.
+@end table
+
+@subsubsection Environment attributes
+
+@table @code
+@item c
+The language for the compiler under test is C.
+
+@item c++
+The language for the compiler under test is C++.
+
+@item c99_runtime
+Target provides a full C99 runtime.
+
+@item correct_iso_cpp_string_wchar_protos
+Target @code{string.h} and @code{wchar.h} headers provide C++ required
+overloads for @code{strchr} etc. functions.
+
+@item dummy_wcsftime
+Target uses a dummy @code{wcsftime} function that always returns zero.
+
+@item fd_truncate
+Target can truncate a file from a file descriptor, as used by
+@file{libgfortran/io/unix.c:fd_truncate}; i.e. @code{ftruncate} or
+@code{chsize}.
+
+@item freestanding
+Target is @samp{freestanding} as defined in section 4 of the C99 standard.
+Effectively, it is a target which supports no extra headers or libraries
+other than what is considered essential.
+
+@item init_priority
+Target supports constructors with initialization priority arguments.
+
+@item inttypes_types
+Target has the basic signed and unsigned types in @code{inttypes.h}.
+This is for tests that GCC's notions of these types agree with those
+in the header, as some systems have only @code{inttypes.h}.
+
+@item lax_strtofp
+Target might have errors of a few ULP in string to floating-point
+conversion functions and overflow is not always detected correctly by
+those functions.
+
+@item newlib
+Target supports Newlib.
+
+@item pow10
+Target provides @code{pow10} function.
+
+@item pthread
+Target can compile using @code{pthread.h} with no errors or warnings.
+
+@item pthread_h
+Target has @code{pthread.h}.
+
+@item run_expensive_tests
+Expensive testcases (usually those that consume excessive amounts of CPU
+time) should be run on this target.  This can be enabled by setting the
+@env{GCC_TEST_RUN_EXPENSIVE} environment variable to a non-empty string.
+
+@item simulator
+Test system runs executables on a simulator (i.e. slowly) rather than
+hardware (i.e. fast).
+
+@item stdint_types
+Target has the basic signed and unsigned C types in @code{stdint.h}.
+This will be obsolete when GCC ensures a working @code{stdint.h} for
+all targets.
+
+@item trampolines
+Target supports trampolines.
+
+@item uclibc
+Target supports uClibc.
+
+@item unwrapped
+Target does not use a status wrapper.
+
+@item vxworks_kernel
+Target is a VxWorks kernel.
+
+@item vxworks_rtp
+Target is a VxWorks RTP.
+
+@item wchar
+Target supports wide characters.
+@end table
+
+@subsubsection Other attributes
+
+@table @code
+@item automatic_stack_alignment
+Target supports automatic stack alignment.
+
+@item cxa_atexit
+Target uses @code{__cxa_atexit}.
+
+@item default_packed
+Target has packed layout of structure members by default.
+
+@item fgraphite
+Target supports Graphite optimizations.
+
+@item fixed_point
+Target supports fixed-point extension to C.
+
+@item fopenmp
+Target supports OpenMP via @option{-fopenmp}.
+
+@item fpic
+Target supports @option{-fpic} and @option{-fPIC}.
+
+@item freorder
+Target supports @option{-freorder-blocks-and-partition}.
+
+@item fstack_protector
+Target supports @option{-fstack-protector}.
+
+@item gas
+Target uses GNU @command{as}.
+
+@item gc_sections
+Target supports @option{--gc-sections}.
+
+@item keeps_null_pointer_checks
+Target keeps null pointer checks, either due to the use of
+@option{-fno-delete-null-pointer-checks} or hardwired into the target.
+
+@item lto
+Compiler has been configured to support link-time optimization (LTO).
+
+@item named_sections
+Target supports named sections.
+
+@item natural_alignment_32
+Target uses natural alignment (aligned to type size) for types of
+32 bits or less.
+
+@item target_natural_alignment_64
+Target uses natural alignment (aligned to type size) for types of
+64 bits or less.
+
+@item nonpic
+Target does not generate PIC by default.
+
+@item pcc_bitfield_type_matters
+Target defines @code{PCC_BITFIELD_TYPE_MATTERS}.
+
+@item pe_aligned_commons
+Target supports @option{-mpe-aligned-commons}.
+
+@item section_anchors
+Target supports section anchors.
+
+@item short_enums
+Target defaults to short enums.
+
+@item static
+Target supports @option{-static}.
+
+@item static_libgfortran
+Target supports statically linking @samp{libgfortran}.
+
+@item string_merging
+Target supports merging string constants at link time.
+
+@item ucn
+Target supports compiling and assembling UCN.
+
+@item ucn_nocache
+Including the options used to compile this particular test, the
+target supports compiling and assembling UCN.
+
+@item unaligned_stack
+Target does not guarantee that its @code{STACK_BOUNDARY} is greater than
+or equal to the required vector alignment.
+
+@item vector_alignment_reachable
+Vector alignment is reachable for types of 32 bits or less.
+
+@item vector_alignment_reachable_for_64bit
+Vector alignment is reachable for types of 64 bits or less.
+
+@item wchar_t_char16_t_compatible
+Target supports @code{wchar_t} that is compatible with @code{char16_t}.
+
+@item wchar_t_char32_t_compatible
+Target supports @code{wchar_t} that is compatible with @code{char32_t}.
+@end table
+
+@subsubsection Local to tests in @code{gcc.target/i386}
+
+@table @code
+@item 3dnow
+Target supports compiling @code{3dnow} instructions.
+
+@item aes
+Target supports compiling @code{aes} instructions.
+
+@item fma4
+Target supports compiling @code{fma4} instructions.
+
+@item ms_hook_prologue
+Target supports attribute @code{ms_hook_prologue}.
+
+@item pclmul
+Target supports compiling @code{pclmul} instructions.
+
+@item sse3
+Target supports compiling @code{sse3} instructions.
+
+@item sse4
+Target supports compiling @code{sse4} instructions.
+
+@item sse4a
+Target supports compiling @code{sse4a} instructions.
+
+@item ssse3
+Target supports compiling @code{ssse3} instructions.
+
+@item vaes
+Target supports compiling @code{vaes} instructions.
+
+@item vpclmul
+Target supports compiling @code{vpclmul} instructions.
+
+@item xop
+Target supports compiling @code{xop} instructions.
+@end table
+
+@subsubsection Local to tests in @code{gcc.target/spu/ea}
+
+@table @code
+@item ealib
+Target @code{__ea} library functions are available.
+@end table
+
+@subsubsection Local to tests in @code{gcc.test-framework}
+
+@table @code
+@item no
+Always returns 0.
+
+@item yes
+Always returns 1.
+@end table
+
+@node Add Options
+@subsection Features for @code{dg-add-options}
+
+The supported values of @var{feature} for directive @code{dg-add-options}
+are:
+
+@table @code
+@item arm_neon
+NEON support.  Only ARM targets support this feature, and only then
+in certain modes; see the @ref{arm_neon_ok,,arm_neon_ok effective target
+keyword}.
+
+@item arm_neon_fp16
+NEON and half-precision floating point support.  Only ARM targets
+support this feature, and only then in certain modes; see
+the @ref{arm_neon_ok,,arm_neon_fp16_ok effective target keyword}.
+
+@item bind_pic_locally
+Add the target-specific flags needed to enable functions to bind
+locally when using pic/PIC passes in the testsuite.
+
+@item c99_runtime
+Add the target-specific flags needed to access the C99 runtime.
+
+@item ieee
+Add the target-specific flags needed to enable full IEEE
+compliance mode.
+
+@item mips16_attribute
+@code{mips16} function attributes.
+Only MIPS targets support this feature, and only then in certain modes.
+
+@item tls
+Add the target-specific flags needed to use thread-local storage.
+@end table
+
+@node Require Support
+@subsection Variants of @code{dg-require-@var{support}}
+
+A few of the @code{dg-require} directives take arguments.
+
+@table @code
+@item dg-require-iconv @var{codeset}
+Skip the test if the target does not support iconv.  @var{codeset} is
+the codeset to convert to.
+
+@item dg-require-profiling @var{profopt}
+Skip the test if the target does not support profiling with option
+@var{profopt}.
+
+@item dg-require-visibility @var{vis}
+Skip the test if the target does not support the @code{visibility} attribute.
+If @var{vis} is @code{""}, support for @code{visibility("hidden")} is
+checked, for @code{visibility("@var{vis}")} otherwise.
+@end table
+
+The original @code{dg-require} directives were defined before there
+was support for effective-target keywords.  The directives that do not
+take arguments could be replaced with effective-target keywords.
+
+@table @code
+@item dg-require-alias ""
+Skip the test if the target does not support the @samp{alias} attribute.
+
+@item dg-require-ascii-locale ""
+Skip the test if the host does not support an ASCII locale.
+
+@item dg-require-compat-dfp ""
+Skip this test unless both compilers in a @file{compat} testsuite
+support decimal floating point.
+
+@item dg-require-cxa-atexit ""
+Skip the test if the target does not support @code{__cxa_atexit}.
+This is equivalent to @code{dg-require-effective-target cxa_atexit}.
+
+@item dg-require-dll ""
+Skip the test if the target does not support DLL attributes.
+
+@item dg-require-fork ""
+Skip the test if the target does not support @code{fork}.
+
+@item dg-require-gc-sections ""
+Skip the test if the target's linker does not support the
+@code{--gc-sections} flags.
+This is equivalent to @code{dg-require-effective-target gc-sections}.
+
+@item dg-require-host-local ""
+Skip the test if the host is remote, rather than the same as the build
+system.  Some tests are incompatible with DejaGnu's handling of remote
+hosts, which involves copying the source file to the host and compiling
+it with a relative path and "@code{-o a.out}".
+
+@item dg-require-mkfifo ""
+Skip the test if the target does not support @code{mkfifo}.
+
+@item dg-require-named-sections ""
+Skip the test is the target does not support named sections.
+This is equivalent to @code{dg-require-effective-target named_sections}.
+
+@item dg-require-weak ""
+Skip the test if the target does not support weak symbols.
+
+@item dg-require-weak-override ""
+Skip the test if the target does not support overriding weak symbols.
+@end table
+
+@node Final Actions
+@subsection Commands for use in @code{dg-final}
+
+The GCC testsuite defines the following directives to be used within
+@code{dg-final}.
+
+@subsubsection Scan a particular file
+
+@table @code
+@item scan-file @var{filename} @var{regexp} [@{ target/xfail @var{selector} @}]
+Passes if @var{regexp} matches text in @var{filename}.
+@item scan-file-not @var{filename} @var{regexp} [@{ target/xfail @var{selector} @}]
+Passes if @var{regexp} does not match text in @var{filename}.
+@item scan-module @var{module} @var{regexp} [@{ target/xfail @var{selector} @}]
+Passes if @var{regexp} matches in Fortran module @var{module}.
+@end table
+
+@subsubsection Scan the assembly output
+
+@table @code
+@item scan-assembler @var{regex} [@{ target/xfail @var{selector} @}]
+Passes if @var{regex} matches text in the test's assembler output.
+
+@item scan-assembler-not @var{regex} [@{ target/xfail @var{selector} @}]
+Passes if @var{regex} does not match text in the test's assembler output.
+
+@item scan-assembler-times @var{regex} @var{num} [@{ target/xfail @var{selector} @}]
+Passes if @var{regex} is matched exactly @var{num} times in the test's
+assembler output.
+
+@item scan-assembler-dem @var{regex} [@{ target/xfail @var{selector} @}]
+Passes if @var{regex} matches text in the test's demangled assembler output.
+
+@item scan-assembler-dem-not @var{regex} [@{ target/xfail @var{selector} @}]
+Passes if @var{regex} does not match text in the test's demangled assembler
+output.
+
+@item scan-hidden @var{symbol} [@{ target/xfail @var{selector} @}]
+Passes if @var{symbol} is defined as a hidden symbol in the test's
+assembly output.
+
+@item scan-not-hidden @var{symbol} [@{ target/xfail @var{selector} @}]
+Passes if @var{symbol} is not defined as a hidden symbol in the test's
+assembly output.
+@end table
+
+@subsubsection Scan optimization dump files
+
+These commands are available for @var{kind} of @code{tree}, @code{rtl},
+and @code{ipa}.
+
+@table @code
+@item scan-@var{kind}-dump @var{regex} @var{suffix} [@{ target/xfail @var{selector} @}]
+Passes if @var{regex} matches text in the dump file with suffix @var{suffix}.
+
+@item scan-@var{kind}-dump-not @var{regex} @var{suffix} [@{ target/xfail @var{selector} @}]
+Passes if @var{regex} does not match text in the dump file with suffix
+@var{suffix}.
+
+@item scan-@var{kind}-dump-times @var{regex} @var{num} @var{suffix} [@{ target/xfail @var{selector} @}]
+Passes if @var{regex} is found exactly @var{num} times in the dump file
+with suffix @var{suffix}.
+
+@item scan-@var{kind}-dump-dem @var{regex} @var{suffix} [@{ target/xfail @var{selector} @}]
+Passes if @var{regex} matches demangled text in the dump file with
+suffix @var{suffix}.
+
+@item scan-@var{kind}-dump-dem-not @var{regex} @var{suffix} [@{ target/xfail @var{selector} @}]
+Passes if @var{regex} does not match demangled text in the dump file with
+suffix @var{suffix}.
+@end table
+
+@subsubsection Verify that an output files exists or not
+
+@table @code
+@item output-exists [@{ target/xfail @var{selector} @}]
+Passes if compiler output file exists.
+
+@item output-exists-not [@{ target/xfail @var{selector} @}]
+Passes if compiler output file does not exist.
+@end table
+
+@subsubsection Check for LTO tests
+
+@table @code
+@item scan-symbol @var{regexp} [@{ target/xfail @var{selector} @}]
+Passes if the pattern is present in the final executable.
+@end table
+
+@subsubsection Checks for @command{gcov} tests
+
+@table @code
+@item run-gcov @var{sourcefile}
+Check line counts in @command{gcov} tests.
+
+@item run-gcov [branches] [calls] @{ @var{opts} @var{sourcefile} @}
+Check branch and/or call counts, in addition to line counts, in
+@command{gcov} tests.
+@end table
+
+@subsubsection Clean up generated test files
+
+@table @code
+@item cleanup-coverage-files
+Removes coverage data files generated for this test.
+
+@item cleanup-ipa-dump @var{suffix}
+Removes IPA dump files generated for this test.
+
+@item cleanup-modules
+Removes Fortran module files generated for this test.
+
+@item cleanup-profile-file
+Removes profiling files generated for this test.
+
+@item cleanup-repo-files
+Removes files generated for this test for @option{-frepo}.
+
+@item cleanup-rtl-dump @var{suffix}
+Removes RTL dump files generated for this test.
+
+@item cleanup-saved-temps
+Removes files for the current test which were kept for @option{-save-temps}.
+
+@item cleanup-tree-dump @var{suffix}
+Removes tree dump files matching @var{suffix} which were generated for
+this test.
+@end table
+
+@node Ada Tests
+@section Ada Language Testsuites
+
+The Ada testsuite includes executable tests from the ACATS 2.5
+testsuite, publicly available at
+@uref{http://www.adaic.org/compilers/acats/2.5}.
+
+These tests are integrated in the GCC testsuite in the
+@file{ada/acats} directory, and
+enabled automatically when running @code{make check}, assuming
+the Ada language has been enabled when configuring GCC@.
+
+You can also run the Ada testsuite independently, using
+@code{make check-ada}, or run a subset of the tests by specifying which
+chapter to run, e.g.:
+
+@smallexample
+$ make check-ada CHAPTERS="c3 c9"
+@end smallexample
+
+The tests are organized by directory, each directory corresponding to
+a chapter of the Ada Reference Manual.  So for example, @file{c9} corresponds
+to chapter 9, which deals with tasking features of the language.
+
+There is also an extra chapter called @file{gcc} containing a template for
+creating new executable tests, although this is deprecated in favor of
+the @file{gnat.dg} testsuite.
+
+The tests are run using two @command{sh} scripts: @file{run_acats} and
+@file{run_all.sh}.  To run the tests using a simulator or a cross
+target, see the small
+customization section at the top of @file{run_all.sh}.
+
+These tests are run using the build tree: they can be run without doing
+a @code{make install}.
+
+@node C Tests
+@section C Language Testsuites
+
+GCC contains the following C language testsuites, in the
+@file{gcc/testsuite} directory:
+
+@table @file
+@item gcc.dg
+This contains tests of particular features of the C compiler, using the
+more modern @samp{dg} harness.  Correctness tests for various compiler
+features should go here if possible.
+
+Magic comments determine whether the file
+is preprocessed, compiled, linked or run.  In these tests, error and warning
+message texts are compared against expected texts or regular expressions
+given in comments.  These tests are run with the options @samp{-ansi -pedantic}
+unless other options are given in the test.  Except as noted below they
+are not run with multiple optimization options.
+@item gcc.dg/compat
+This subdirectory contains tests for binary compatibility using
+@file{lib/compat.exp}, which in turn uses the language-independent support
+(@pxref{compat Testing, , Support for testing binary compatibility}).
+@item gcc.dg/cpp
+This subdirectory contains tests of the preprocessor.
+@item gcc.dg/debug
+This subdirectory contains tests for debug formats.  Tests in this
+subdirectory are run for each debug format that the compiler supports.
+@item gcc.dg/format
+This subdirectory contains tests of the @option{-Wformat} format
+checking.  Tests in this directory are run with and without
+@option{-DWIDE}.
+@item gcc.dg/noncompile
+This subdirectory contains tests of code that should not compile and
+does not need any special compilation options.  They are run with
+multiple optimization options, since sometimes invalid code crashes
+the compiler with optimization.
+@item gcc.dg/special
+FIXME: describe this.
+
+@item gcc.c-torture
+This contains particular code fragments which have historically broken easily.
+These tests are run with multiple optimization options, so tests for features
+which only break at some optimization levels belong here.  This also contains
+tests to check that certain optimizations occur.  It might be worthwhile to
+separate the correctness tests cleanly from the code quality tests, but
+it hasn't been done yet.
+
+@item gcc.c-torture/compat
+FIXME: describe this.
+
+This directory should probably not be used for new tests.
+@item gcc.c-torture/compile
+This testsuite contains test cases that should compile, but do not
+need to link or run.  These test cases are compiled with several
+different combinations of optimization options.  All warnings are
+disabled for these test cases, so this directory is not suitable if
+you wish to test for the presence or absence of compiler warnings.
+While special options can be set, and tests disabled on specific
+platforms, by the use of @file{.x} files, mostly these test cases
+should not contain platform dependencies.  FIXME: discuss how defines
+such as @code{NO_LABEL_VALUES} and @code{STACK_SIZE} are used.
+@item gcc.c-torture/execute
+This testsuite contains test cases that should compile, link and run;
+otherwise the same comments as for @file{gcc.c-torture/compile} apply.
+@item gcc.c-torture/execute/ieee
+This contains tests which are specific to IEEE floating point.
+@item gcc.c-torture/unsorted
+FIXME: describe this.
+
+This directory should probably not be used for new tests.
+@item gcc.misc-tests
+This directory contains C tests that require special handling.  Some
+of these tests have individual expect files, and others share
+special-purpose expect files:
+
+@table @file
+@item @code{bprob*.c}
+Test @option{-fbranch-probabilities} using
+@file{gcc.misc-tests/bprob.exp}, which
+in turn uses the generic, language-independent framework
+(@pxref{profopt Testing, , Support for testing profile-directed
+optimizations}).
+
+@item @code{gcov*.c}
+Test @command{gcov} output using @file{gcov.exp}, which in turn uses the
+language-independent support (@pxref{gcov Testing, , Support for testing gcov}).
+
+@item @code{i386-pf-*.c}
+Test i386-specific support for data prefetch using @file{i386-prefetch.exp}.
+@end table
+
+@item gcc.test-framework
+@table @file
+@item @code{dg-*.c}
+Test the testsuite itself using @file{gcc.test-framework/test-framework.exp}.
+@end table
+
+@end table
+
+FIXME: merge in @file{testsuite/README.gcc} and discuss the format of
+test cases and magic comments more.
+
+@node libgcj Tests
+@section The Java library testsuites.
+
+Runtime tests are executed via @samp{make check} in the
+@file{@var{target}/libjava/testsuite} directory in the build
+tree.  Additional runtime tests can be checked into this testsuite.
+
+Regression testing of the core packages in libgcj is also covered by the
+Mauve testsuite.  The @uref{http://sourceware.org/mauve/,,Mauve Project}
+develops tests for the Java Class Libraries.  These tests are run as part
+of libgcj testing by placing the Mauve tree within the libjava testsuite
+sources at @file{libjava/testsuite/libjava.mauve/mauve}, or by specifying
+the location of that tree when invoking @samp{make}, as in
+@samp{make MAUVEDIR=~/mauve check}.
+
+To detect regressions, a mechanism in @file{mauve.exp} compares the
+failures for a test run against the list of expected failures in
+@file{libjava/testsuite/libjava.mauve/xfails} from the source hierarchy.
+Update this file when adding new failing tests to Mauve, or when fixing
+bugs in libgcj that had caused Mauve test failures.
+
+We encourage developers to contribute test cases to Mauve.
+
+@node LTO Testing
+@section Support for testing link-time optimizations
+
+Tests for link-time optimizations usually require multiple source files
+that are compiled separately, perhaps with different sets of options.
+There are several special-purpose test directives used for these tests.
+
+@table @code
+@item @{ dg-lto-do @var{do-what-keyword} @}
+@var{do-what-keyword} specifies how the test is compiled and whether
+it is executed.  It is one of:
+
+@table @code
+@item assemble
+Compile with @option{-c} to produce a relocatable object file.
+@item link
+Compile, assemble, and link to produce an executable file.
+@item run
+Produce and run an executable file, which is expected to return
+an exit code of 0.
+@end table
+
+The default is @code{assemble}.  That can be overridden for a set of
+tests by redefining @code{dg-do-what-default} within the @code{.exp}
+file for those tests.
+
+Unlike @code{dg-do}, @code{dg-lto-do} does not support an optional
+@samp{target} or @samp{xfail} list.  Use @code{dg-skip-if},
+@code{dg-xfail-if}, or @code{dg-xfail-run-if}.
+
+@item @{ dg-lto-options @{ @{ @var{options} @} [@{ @var{options} @}] @} [@{ target @var{selector} @}]@}
+This directive provides a list of one or more sets of compiler options
+to override @var{LTO_OPTIONS}.  Each test will be compiled and run with
+each of these sets of options.
+
+@item @{ dg-extra-ld-options @var{options} [@{ target @var{selector} @}]@}
+This directive adds @var{options} to the linker options used.
+
+@item @{ dg-suppress-ld-options @var{options} [@{ target @var{selector} @}]@}
+This directive removes @var{options} from the set of linker options used.
+@end table
+
+@node gcov Testing
+@section Support for testing @command{gcov}
+
+Language-independent support for testing @command{gcov}, and for checking
+that branch profiling produces expected values, is provided by the
+expect file @file{lib/gcov.exp}.  @command{gcov} tests also rely on procedures
+in @file{lib/gcc-dg.exp} to compile and run the test program.  A typical
+@command{gcov} test contains the following DejaGnu commands within comments:
+
+@smallexample
+@{ dg-options "-fprofile-arcs -ftest-coverage" @}
+@{ dg-do run @{ target native @} @}
+@{ dg-final @{ run-gcov sourcefile @} @}
+@end smallexample
+
+Checks of @command{gcov} output can include line counts, branch percentages,
+and call return percentages.  All of these checks are requested via
+commands that appear in comments in the test's source file.
+Commands to check line counts are processed by default.
+Commands to check branch percentages and call return percentages are
+processed if the @command{run-gcov} command has arguments @code{branches}
+or @code{calls}, respectively.  For example, the following specifies
+checking both, as well as passing @option{-b} to @command{gcov}:
+
+@smallexample
+@{ dg-final @{ run-gcov branches calls @{ -b sourcefile @} @} @}
+@end smallexample
+
+A line count command appears within a comment on the source line
+that is expected to get the specified count and has the form
+@code{count(@var{cnt})}.  A test should only check line counts for
+lines that will get the same count for any architecture.
+
+Commands to check branch percentages (@code{branch}) and call
+return percentages (@code{returns}) are very similar to each other.
+A beginning command appears on or before the first of a range of
+lines that will report the percentage, and the ending command
+follows that range of lines.  The beginning command can include a
+list of percentages, all of which are expected to be found within
+the range.  A range is terminated by the next command of the same
+kind.  A command @code{branch(end)} or @code{returns(end)} marks
+the end of a range without starting a new one.  For example:
+
+@smallexample
+if (i > 10 && j > i && j < 20)  /* @r{branch(27 50 75)} */
+                                /* @r{branch(end)} */
+  foo (i, j);
+@end smallexample
+
+For a call return percentage, the value specified is the
+percentage of calls reported to return.  For a branch percentage,
+the value is either the expected percentage or 100 minus that
+value, since the direction of a branch can differ depending on the
+target or the optimization level.
+
+Not all branches and calls need to be checked.  A test should not
+check for branches that might be optimized away or replaced with
+predicated instructions.  Don't check for calls inserted by the
+compiler or ones that might be inlined or optimized away.
+
+A single test can check for combinations of line counts, branch
+percentages, and call return percentages.  The command to check a
+line count must appear on the line that will report that count, but
+commands to check branch percentages and call return percentages can
+bracket the lines that report them.
+
+@node profopt Testing
+@section Support for testing profile-directed optimizations
+
+The file @file{profopt.exp} provides language-independent support for
+checking correct execution of a test built with profile-directed
+optimization.  This testing requires that a test program be built and
+executed twice.  The first time it is compiled to generate profile
+data, and the second time it is compiled to use the data that was
+generated during the first execution.  The second execution is to
+verify that the test produces the expected results.
+
+To check that the optimization actually generated better code, a
+test can be built and run a third time with normal optimizations to
+verify that the performance is better with the profile-directed
+optimizations.  @file{profopt.exp} has the beginnings of this kind
+of support.
+
+@file{profopt.exp} provides generic support for profile-directed
+optimizations.  Each set of tests that uses it provides information
+about a specific optimization:
+
+@table @code
+@item tool
+tool being tested, e.g., @command{gcc}
+
+@item profile_option
+options used to generate profile data
+
+@item feedback_option
+options used to optimize using that profile data
+
+@item prof_ext
+suffix of profile data files
+
+@item PROFOPT_OPTIONS
+list of options with which to run each test, similar to the lists for
+torture tests
+
+@item @{ dg-final-generate @{ @var{local-directive} @} @}
+This directive is similar to @code{dg-final}, but the
+@var{local-directive} is run after the generation of profile data.
+
+@item @{ dg-final-use @{ @var{local-directive} @} @}
+The @var{local-directive} is run after the profile data have been
+used.
+@end table
+
+@node compat Testing
+@section Support for testing binary compatibility
+
+The file @file{compat.exp} provides language-independent support for
+binary compatibility testing.  It supports testing interoperability of
+two compilers that follow the same ABI, or of multiple sets of
+compiler options that should not affect binary compatibility.  It is
+intended to be used for testsuites that complement ABI testsuites.
+
+A test supported by this framework has three parts, each in a
+separate source file: a main program and two pieces that interact
+with each other to split up the functionality being tested.
+
+@table @file
+@item @var{testname}_main.@var{suffix}
+Contains the main program, which calls a function in file
+@file{@var{testname}_x.@var{suffix}}.
+
+@item @var{testname}_x.@var{suffix}
+Contains at least one call to a function in
+@file{@var{testname}_y.@var{suffix}}.
+
+@item @var{testname}_y.@var{suffix}
+Shares data with, or gets arguments from,
+@file{@var{testname}_x.@var{suffix}}.
+@end table
+
+Within each test, the main program and one functional piece are
+compiled by the GCC under test.  The other piece can be compiled by
+an alternate compiler.  If no alternate compiler is specified,
+then all three source files are all compiled by the GCC under test.
+You can specify pairs of sets of compiler options.  The first element
+of such a pair specifies options used with the GCC under test, and the
+second element of the pair specifies options used with the alternate
+compiler.  Each test is compiled with each pair of options.
+
+@file{compat.exp} defines default pairs of compiler options.
+These can be overridden by defining the environment variable
+@env{COMPAT_OPTIONS} as:
+
+@smallexample
+COMPAT_OPTIONS="[list [list @{@var{tst1}@} @{@var{alt1}@}]
+  @dots{}[list @{@var{tstn}@} @{@var{altn}@}]]"
+@end smallexample
+
+where @var{tsti} and @var{alti} are lists of options, with @var{tsti}
+used by the compiler under test and @var{alti} used by the alternate
+compiler.  For example, with
+@code{[list [list @{-g -O0@} @{-O3@}] [list @{-fpic@} @{-fPIC -O2@}]]},
+the test is first built with @option{-g -O0} by the compiler under
+test and with @option{-O3} by the alternate compiler.  The test is
+built a second time using @option{-fpic} by the compiler under test
+and @option{-fPIC -O2} by the alternate compiler.
+
+An alternate compiler is specified by defining an environment
+variable to be the full pathname of an installed compiler; for C
+define @env{ALT_CC_UNDER_TEST}, and for C++ define
+@env{ALT_CXX_UNDER_TEST}.  These will be written to the
+@file{site.exp} file used by DejaGnu.  The default is to build each
+test with the compiler under test using the first of each pair of
+compiler options from @env{COMPAT_OPTIONS}.  When
+@env{ALT_CC_UNDER_TEST} or
+@env{ALT_CXX_UNDER_TEST} is @code{same}, each test is built using
+the compiler under test but with combinations of the options from
+@env{COMPAT_OPTIONS}.
+
+To run only the C++ compatibility suite using the compiler under test
+and another version of GCC using specific compiler options, do the
+following from @file{@var{objdir}/gcc}:
+
+@smallexample
+rm site.exp
+make -k \
+  ALT_CXX_UNDER_TEST=$@{alt_prefix@}/bin/g++ \
+  COMPAT_OPTIONS="@var{lists as shown above}" \
+  check-c++ \
+  RUNTESTFLAGS="compat.exp"
+@end smallexample
+
+A test that fails when the source files are compiled with different
+compilers, but passes when the files are compiled with the same
+compiler, demonstrates incompatibility of the generated code or
+runtime support.  A test that fails for the alternate compiler but
+passes for the compiler under test probably tests for a bug that was
+fixed in the compiler under test but is present in the alternate
+compiler.
+
+The binary compatibility tests support a small number of test framework
+commands that appear within comments in a test file.
+
+@table @code
+@item dg-require-*
+These commands can be used in @file{@var{testname}_main.@var{suffix}}
+to skip the test if specific support is not available on the target.
+
+@item dg-options
+The specified options are used for compiling this particular source
+file, appended to the options from @env{COMPAT_OPTIONS}.  When this
+command appears in @file{@var{testname}_main.@var{suffix}} the options
+are also used to link the test program.
+
+@item dg-xfail-if
+This command can be used in a secondary source file to specify that
+compilation is expected to fail for particular options on particular
+targets.
+@end table
+
+@node Torture Tests
+@section Support for torture testing using multiple options
+
+Throughout the compiler testsuite there are several directories whose
+tests are run multiple times, each with a different set of options.
+These are known as torture tests.
+@file{lib/torture-options.exp} defines procedures to
+set up these lists:
+
+@table @code
+@item torture-init
+Initialize use of torture lists.
+@item set-torture-options
+Set lists of torture options to use for tests with and without loops.
+Optionally combine a set of torture options with a set of other
+options, as is done with Objective-C runtime options.
+@item torture-finish
+Finalize use of torture lists.
+@end table
+
+The @file{.exp} file for a set of tests that use torture options must
+include calls to these three procedures if:
+
+@itemize @bullet
+@item It calls @code{gcc-dg-runtest} and overrides @var{DG_TORTURE_OPTIONS}.
+
+@item It calls @var{$@{tool@}}@code{-torture} or
+@var{$@{tool@}}@code{-torture-execute}, where @var{tool} is @code{c},
+@code{fortran}, or @code{objc}.
+
+@item It calls @code{dg-pch}.
+@end itemize
+
+It is not necessary for a @file{.exp} file that calls @code{gcc-dg-runtest}
+to call the torture procedures if the tests should use the list in
+@var{DG_TORTURE_OPTIONS} defined in @file{gcc-dg.exp}.
+
+Most uses of torture options can override the default lists by defining
+@var{TORTURE_OPTIONS} or add to the default list by defining
+@var{ADDITIONAL_TORTURE_OPTIONS}.  Define these in a @file{.dejagnurc}
+file or add them to the @file{site.exp} file; for example
+
+@smallexample
+set ADDITIONAL_TORTURE_OPTIONS  [list \
+  @{ -O2 -ftree-loop-linear @} \
+  @{ -O2 -fpeel-loops @} ]
+@end smallexample
diff --git a/gcc/doc/standards.texi b/gcc/doc/standards.texi
new file mode 100644
index 000000000..d9a93db90
--- /dev/null
+++ b/gcc/doc/standards.texi
@@ -0,0 +1,294 @@
+@c Copyright (C) 2000, 2001, 2002, 2004, 2006, 2007, 2008, 2010, 2011
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Standards
+@chapter Language Standards Supported by GCC
+
+For each language compiled by GCC for which there is a standard, GCC
+attempts to follow one or more versions of that standard, possibly
+with some exceptions, and possibly with some extensions.
+
+@section C language
+@cindex C standard
+@cindex C standards
+@cindex ANSI C standard
+@cindex ANSI C
+@cindex ANSI C89
+@cindex C89
+@cindex ANSI X3.159-1989
+@cindex X3.159-1989
+@cindex ISO C standard
+@cindex ISO C
+@cindex ISO C90
+@cindex ISO/IEC 9899
+@cindex ISO 9899
+@cindex C90
+@cindex ISO C94
+@cindex C94
+@cindex ISO C95
+@cindex C95
+@cindex ISO C99
+@cindex C99
+@cindex ISO C9X
+@cindex C9X
+@cindex ISO C1X
+@cindex C1X
+@cindex Technical Corrigenda
+@cindex TC1
+@cindex Technical Corrigendum 1
+@cindex TC2
+@cindex Technical Corrigendum 2
+@cindex TC3
+@cindex Technical Corrigendum 3
+@cindex AMD1
+@cindex freestanding implementation
+@cindex freestanding environment
+@cindex hosted implementation
+@cindex hosted environment
+@findex __STDC_HOSTED__
+
+GCC supports three versions of the C standard, although support for
+the most recent version is not yet complete.
+
+@opindex std
+@opindex ansi
+@opindex pedantic
+@opindex pedantic-errors
+The original ANSI C standard (X3.159-1989) was ratified in 1989 and
+published in 1990.  This standard was ratified as an ISO standard
+(ISO/IEC 9899:1990) later in 1990.  There were no technical
+differences between these publications, although the sections of the
+ANSI standard were renumbered and became clauses in the ISO standard.
+This standard, in both its forms, is commonly known as @dfn{C89}, or
+occasionally as @dfn{C90}, from the dates of ratification.  The ANSI
+standard, but not the ISO standard, also came with a Rationale
+document.  To select this standard in GCC, use one of the options
+@option{-ansi}, @option{-std=c90} or @option{-std=iso9899:1990}; to obtain
+all the diagnostics required by the standard, you should also specify
+@option{-pedantic} (or @option{-pedantic-errors} if you want them to be
+errors rather than warnings).  @xref{C Dialect Options,,Options
+Controlling C Dialect}.
+
+Errors in the 1990 ISO C standard were corrected in two Technical
+Corrigenda published in 1994 and 1996.  GCC does not support the
+uncorrected version.
+
+An amendment to the 1990 standard was published in 1995.  This
+amendment added digraphs and @code{__STDC_VERSION__} to the language,
+but otherwise concerned the library.  This amendment is commonly known
+as @dfn{AMD1}; the amended standard is sometimes known as @dfn{C94} or
+@dfn{C95}.  To select this standard in GCC, use the option
+@option{-std=iso9899:199409} (with, as for other standard versions,
+@option{-pedantic} to receive all required diagnostics).
+
+A new edition of the ISO C standard was published in 1999 as ISO/IEC
+9899:1999, and is commonly known as @dfn{C99}.  GCC has incomplete
+support for this standard version; see
+@uref{http://gcc.gnu.org/gcc-4.6/c99status.html} for details.  To select this
+standard, use @option{-std=c99} or @option{-std=iso9899:1999}.  (While in
+development, drafts of this standard version were referred to as
+@dfn{C9X}.)
+
+Errors in the 1999 ISO C standard were corrected in three Technical
+Corrigenda published in 2001, 2004 and 2007.  GCC does not support the
+uncorrected version.
+
+A fourth version of the C standard, known as @dfn{C1X}, is under
+development; GCC has limited preliminary support for parts of this
+standard, enabled with @option{-std=c1x}.
+
+By default, GCC provides some extensions to the C language that on
+rare occasions conflict with the C standard.  @xref{C
+Extensions,,Extensions to the C Language Family}.  Use of the
+@option{-std} options listed above will disable these extensions where
+they conflict with the C standard version selected.  You may also
+select an extended version of the C language explicitly with
+@option{-std=gnu90} (for C90 with GNU extensions), @option{-std=gnu99}
+(for C99 with GNU extensions) or @option{-std=gnu1x} (for C1X with GNU
+extensions).  The default, if no C language dialect
+options are given, is @option{-std=gnu90}; this will change to
+@option{-std=gnu99} in some future release when the C99 support is
+complete.  Some features that are part of the C99 standard are
+accepted as extensions in C90 mode.
+
+The ISO C standard defines (in clause 4) two classes of conforming
+implementation.  A @dfn{conforming hosted implementation} supports the
+whole standard including all the library facilities; a @dfn{conforming
+freestanding implementation} is only required to provide certain
+library facilities: those in @code{<float.h>}, @code{<limits.h>},
+@code{<stdarg.h>}, and @code{<stddef.h>}; since AMD1, also those in
+@code{<iso646.h>}; and in C99, also those in @code{<stdbool.h>} and
+@code{<stdint.h>}.  In addition, complex types, added in C99, are not
+required for freestanding implementations.  The standard also defines
+two environments for programs, a @dfn{freestanding environment},
+required of all implementations and which may not have library
+facilities beyond those required of freestanding implementations,
+where the handling of program startup and termination are
+implementation-defined, and a @dfn{hosted environment}, which is not
+required, in which all the library facilities are provided and startup
+is through a function @code{int main (void)} or @code{int main (int,
+char *[])}.  An OS kernel would be a freestanding environment; a
+program using the facilities of an operating system would normally be
+in a hosted implementation.
+
+@opindex ffreestanding
+GCC aims towards being usable as a conforming freestanding
+implementation, or as the compiler for a conforming hosted
+implementation.  By default, it will act as the compiler for a hosted
+implementation, defining @code{__STDC_HOSTED__} as @code{1} and
+presuming that when the names of ISO C functions are used, they have
+the semantics defined in the standard.  To make it act as a conforming
+freestanding implementation for a freestanding environment, use the
+option @option{-ffreestanding}; it will then define
+@code{__STDC_HOSTED__} to @code{0} and not make assumptions about the
+meanings of function names from the standard library, with exceptions
+noted below.  To build an OS kernel, you may well still need to make
+your own arrangements for linking and startup.
+@xref{C Dialect Options,,Options Controlling C Dialect}.
+
+GCC does not provide the library facilities required only of hosted
+implementations, nor yet all the facilities required by C99 of
+freestanding implementations; to use the facilities of a hosted
+environment, you will need to find them elsewhere (for example, in the
+GNU C library).  @xref{Standard Libraries,,Standard Libraries}.
+
+Most of the compiler support routines used by GCC are present in
+@file{libgcc}, but there are a few exceptions.  GCC requires the
+freestanding environment provide @code{memcpy}, @code{memmove},
+@code{memset} and @code{memcmp}.
+Finally, if @code{__builtin_trap} is used, and the target does
+not implement the @code{trap} pattern, then GCC will emit a call
+to @code{abort}.
+
+For references to Technical Corrigenda, Rationale documents and
+information concerning the history of C that is available online, see
+@uref{http://gcc.gnu.org/readings.html}
+
+@section C++ language
+
+GCC supports the ISO C++ standard (1998) and contains experimental
+support for the upcoming ISO C++ standard (200x).
+
+The original ISO C++ standard was published as the ISO standard (ISO/IEC
+14882:1998) and amended by a Technical Corrigenda published in 2003
+(ISO/IEC 14882:2003). These standards are referred to as C++98 and
+C++03, respectively. GCC implements the majority of C++98 (@code{export}
+is a notable exception) and most of the changes in C++03.  To select
+this standard in GCC, use one of the options @option{-ansi} or
+@option{-std=c++98}; to obtain all the diagnostics required by the
+standard, you should also specify @option{-pedantic} (or
+@option{-pedantic-errors} if you want them to be errors rather than
+warnings).
+
+The ISO C++ committee is working on a new ISO C++ standard, dubbed
+C++0x, that is intended to be published by 2009. C++0x contains several
+changes to the C++ language, some of which have been implemented in an
+experimental C++0x mode in GCC@. The C++0x mode in GCC tracks the draft
+working paper for the C++0x standard; the latest working paper is
+available on the ISO C++ committee's web site at
+@uref{http://www.open-std.org/@/jtc1/@/sc22/@/wg21/}. For information
+regarding the C++0x features available in the experimental C++0x mode,
+see @uref{http://gcc.gnu.org/projects/@/cxx0x.html}. To select this
+standard in GCC, use the option @option{-std=c++0x}; to obtain all the
+diagnostics required by the standard, you should also specify
+@option{-pedantic} (or @option{-pedantic-errors} if you want them to be
+errors rather than warnings).
+
+By default, GCC provides some extensions to the C++ language; @xref{C++
+Dialect Options,Options Controlling C++ Dialect}.  Use of the
+@option{-std} option listed above will disable these extensions.  You
+may also select an extended version of the C++ language explicitly with
+@option{-std=gnu++98} (for C++98 with GNU extensions) or
+@option{-std=gnu++0x} (for C++0x with GNU extensions).  The default, if
+no C++ language dialect options are given, is @option{-std=gnu++98}.
+
+@section Objective-C and Objective-C++ languages
+@cindex Objective-C
+@cindex Objective-C++
+
+GCC supports ``traditional'' Objective-C (also known as ``Objective-C
+1.0'') and contains support for the Objective-C exception and
+synchronization syntax.  It has also support for a number of
+``Objective-C 2.0'' language extensions, including properties, fast
+enumeration (only for Objective-C), method attributes and the
+@@optional and @@required keywords in protocols.  GCC supports
+Objective-C++ and features available in Objective-C are also available
+in Objective-C++@.
+
+GCC by default uses the GNU Objective-C runtime library, which is part
+of GCC and is not the same as the Apple/NeXT Objective-C runtime
+library used on Apple systems.  There are a number of differences
+documented in this manual.  The options @option{-fgnu-runtime} and
+@option{-fnext-runtime} allow you to switch between producing output
+that works with the GNU Objective-C runtime library and output that
+works with the Apple/NeXT Objective-C runtime library.
+
+There is no formal written standard for Objective-C or Objective-C++@.
+The authoritative manual on traditional Objective-C (1.0) is
+``Object-Oriented Programming and the Objective-C Language'',
+available at a number of web sites:
+@itemize
+@item
+@uref{http://www.gnustep.org/@/resources/@/documentation/@/ObjectivCBook.pdf}
+is the original NeXTstep document;
+@item
+@uref{http://objc.toodarkpark.net}
+is the same document in another format;
+@item
+@uref{http://developer.apple.com/@/mac/@/library/@/documentation/@/Cocoa/@/Conceptual/@/ObjectiveC/}
+has an updated version but make sure you search for ``Object Oriented Programming and the Objective-C Programming Language 1.0'',
+not documentation on the newer ``Objective-C 2.0'' language
+@end itemize
+
+The Objective-C exception and synchronization syntax (that is, the
+keywords @@try, @@throw, @@catch, @@finally and @@synchronized) is
+supported by GCC and is enabled with the option
+@option{-fobjc-exceptions}.  The syntax is briefly documented in this
+manual and in the Objective-C 2.0 manuals from Apple.
+
+The Objective-C 2.0 language extensions and features are automatically
+enabled; they include properties (via the @@property, @@synthesize and
+@@dynamic keywords), fast enumeration (not available in
+Objective-C++), attributes for methods (such as deprecated, noreturn,
+sentinel, format), the unused attribute for method arguments, the
+@@package keyword for instance variables and the @@optional and
+@@required keywords in protocols.  You can disable all these
+Objective-C 2.0 language extensions with the option
+@option{-fobjc-std=objc1}, which causes the compiler to recognize the
+same Objective-C language syntax recognized by GCC 4.0, and to produce
+an error if one of the new features is used.
+
+GCC has currently no support for non-fragile instance variables.
+
+The authoritative manual on Objective-C 2.0 is available from Apple:
+@itemize
+@item
+@uref{http://developer.apple.com/@/mac/@/library/@/documentation/@/Cocoa/@/Conceptual/@/ObjectiveC/}
+@end itemize
+
+For more information concerning the history of Objective-C that is
+available online, see @uref{http://gcc.gnu.org/readings.html}
+
+@section Go language
+
+The Go language continues to evolve as of this writing; see the
+@uref{http://golang.org/@/doc/@/go_spec.html, current language
+specifications}.  At present there are no specific versions of Go, and
+there is no way to describe the language supported by GCC in terms of
+a specific version.  In general GCC tracks the evolving specification
+closely, and any given release will support the language as of the
+date that the release was frozen.
+
+@section References for other languages
+
+@xref{Top, GNAT Reference Manual, About This Guide, gnat_rm,
+GNAT Reference Manual}, for information on standard
+conformance and compatibility of the Ada compiler.
+
+@xref{Standards,,Standards, gfortran, The GNU Fortran Compiler}, for details
+of standards supported by GNU Fortran.
+
+@xref{Compatibility,,Compatibility with the Java Platform, gcj, GNU gcj},
+for details of compatibility between @command{gcj} and the Java Platform.
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
new file mode 100644
index 000000000..aacd8a6cc
--- /dev/null
+++ b/gcc/doc/tm.texi
@@ -0,0 +1,11301 @@
+@c Copyright (C) 1988,1989,1992,1993,1994,1995,1996,1997,1998,1999,2000,2001,
+@c 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Target Macros
+@chapter Target Description Macros and Functions
+@cindex machine description macros
+@cindex target description macros
+@cindex macros, target description
+@cindex @file{tm.h} macros
+
+In addition to the file @file{@var{machine}.md}, a machine description
+includes a C header file conventionally given the name
+@file{@var{machine}.h} and a C source file named @file{@var{machine}.c}.
+The header file defines numerous macros that convey the information
+about the target machine that does not fit into the scheme of the
+@file{.md} file.  The file @file{tm.h} should be a link to
+@file{@var{machine}.h}.  The header file @file{config.h} includes
+@file{tm.h} and most compiler source files include @file{config.h}.  The
+source file defines a variable @code{targetm}, which is a structure
+containing pointers to functions and data relating to the target
+machine.  @file{@var{machine}.c} should also contain their definitions,
+if they are not defined elsewhere in GCC, and other functions called
+through the macros defined in the @file{.h} file.
+
+@menu
+* Target Structure::    The @code{targetm} variable.
+* Driver::              Controlling how the driver runs the compilation passes.
+* Run-time Target::     Defining @samp{-m} options like @option{-m68000} and @option{-m68020}.
+* Per-Function Data::   Defining data structures for per-function information.
+* Storage Layout::      Defining sizes and alignments of data.
+* Type Layout::         Defining sizes and properties of basic user data types.
+* Registers::           Naming and describing the hardware registers.
+* Register Classes::    Defining the classes of hardware registers.
+* Old Constraints::     The old way to define machine-specific constraints.
+* Stack and Calling::   Defining which way the stack grows and by how much.
+* Varargs::             Defining the varargs macros.
+* Trampolines::         Code set up at run time to enter a nested function.
+* Library Calls::       Controlling how library routines are implicitly called.
+* Addressing Modes::    Defining addressing modes valid for memory operands.
+* Anchored Addresses::  Defining how @option{-fsection-anchors} should work.
+* Condition Code::      Defining how insns update the condition code.
+* Costs::               Defining relative costs of different operations.
+* Scheduling::          Adjusting the behavior of the instruction scheduler.
+* Sections::            Dividing storage into text, data, and other sections.
+* PIC::                 Macros for position independent code.
+* Assembler Format::    Defining how to write insns and pseudo-ops to output.
+* Debugging Info::      Defining the format of debugging output.
+* Floating Point::      Handling floating point for cross-compilers.
+* Mode Switching::      Insertion of mode-switching instructions.
+* Target Attributes::   Defining target-specific uses of @code{__attribute__}.
+* Emulated TLS::        Emulated TLS support.
+* MIPS Coprocessors::   MIPS coprocessor support and how to customize it.
+* PCH Target::          Validity checking for precompiled headers.
+* C++ ABI::             Controlling C++ ABI changes.
+* Named Address Spaces:: Adding support for named address spaces
+* Misc::                Everything else.
+@end menu
+
+@node Target Structure
+@section The Global @code{targetm} Variable
+@cindex target hooks
+@cindex target functions
+
+@deftypevar {struct gcc_target} targetm
+The target @file{.c} file must define the global @code{targetm} variable
+which contains pointers to functions and data relating to the target
+machine.  The variable is declared in @file{target.h};
+@file{target-def.h} defines the macro @code{TARGET_INITIALIZER} which is
+used to initialize the variable, and macros for the default initializers
+for elements of the structure.  The @file{.c} file should override those
+macros for which the default definition is inappropriate.  For example:
+@smallexample
+#include "target.h"
+#include "target-def.h"
+
+/* @r{Initialize the GCC target structure.}  */
+
+#undef TARGET_COMP_TYPE_ATTRIBUTES
+#define TARGET_COMP_TYPE_ATTRIBUTES @var{machine}_comp_type_attributes
+
+struct gcc_target targetm = TARGET_INITIALIZER;
+@end smallexample
+@end deftypevar
+
+Where a macro should be defined in the @file{.c} file in this manner to
+form part of the @code{targetm} structure, it is documented below as a
+``Target Hook'' with a prototype.  Many macros will change in future
+from being defined in the @file{.h} file to being part of the
+@code{targetm} structure.
+
+@node Driver
+@section Controlling the Compilation Driver, @file{gcc}
+@cindex driver
+@cindex controlling the compilation driver
+
+@c prevent bad page break with this line
+You can control the compilation driver.
+
+@defmac DRIVER_SELF_SPECS
+A list of specs for the driver itself.  It should be a suitable
+initializer for an array of strings, with no surrounding braces.
+
+The driver applies these specs to its own command line between loading
+default @file{specs} files (but not command-line specified ones) and
+choosing the multilib directory or running any subcommands.  It
+applies them in the order given, so each spec can depend on the
+options added by earlier ones.  It is also possible to remove options
+using @samp{%<@var{option}} in the usual way.
+
+This macro can be useful when a port has several interdependent target
+options.  It provides a way of standardizing the command line so
+that the other specs are easier to write.
+
+Do not define this macro if it does not need to do anything.
+@end defmac
+
+@defmac OPTION_DEFAULT_SPECS
+A list of specs used to support configure-time default options (i.e.@:
+@option{--with} options) in the driver.  It should be a suitable initializer
+for an array of structures, each containing two strings, without the
+outermost pair of surrounding braces.
+
+The first item in the pair is the name of the default.  This must match
+the code in @file{config.gcc} for the target.  The second item is a spec
+to apply if a default with this name was specified.  The string
+@samp{%(VALUE)} in the spec will be replaced by the value of the default
+everywhere it occurs.
+
+The driver will apply these specs to its own command line between loading
+default @file{specs} files and processing @code{DRIVER_SELF_SPECS}, using
+the same mechanism as @code{DRIVER_SELF_SPECS}.
+
+Do not define this macro if it does not need to do anything.
+@end defmac
+
+@defmac CPP_SPEC
+A C string constant that tells the GCC driver program options to
+pass to CPP@.  It can also specify how to translate options you
+give to GCC into options for GCC to pass to the CPP@.
+
+Do not define this macro if it does not need to do anything.
+@end defmac
+
+@defmac CPLUSPLUS_CPP_SPEC
+This macro is just like @code{CPP_SPEC}, but is used for C++, rather
+than C@.  If you do not define this macro, then the value of
+@code{CPP_SPEC} (if any) will be used instead.
+@end defmac
+
+@defmac CC1_SPEC
+A C string constant that tells the GCC driver program options to
+pass to @code{cc1}, @code{cc1plus}, @code{f771}, and the other language
+front ends.
+It can also specify how to translate options you give to GCC into options
+for GCC to pass to front ends.
+
+Do not define this macro if it does not need to do anything.
+@end defmac
+
+@defmac CC1PLUS_SPEC
+A C string constant that tells the GCC driver program options to
+pass to @code{cc1plus}.  It can also specify how to translate options you
+give to GCC into options for GCC to pass to the @code{cc1plus}.
+
+Do not define this macro if it does not need to do anything.
+Note that everything defined in CC1_SPEC is already passed to
+@code{cc1plus} so there is no need to duplicate the contents of
+CC1_SPEC in CC1PLUS_SPEC@.
+@end defmac
+
+@defmac ASM_SPEC
+A C string constant that tells the GCC driver program options to
+pass to the assembler.  It can also specify how to translate options
+you give to GCC into options for GCC to pass to the assembler.
+See the file @file{sun3.h} for an example of this.
+
+Do not define this macro if it does not need to do anything.
+@end defmac
+
+@defmac ASM_FINAL_SPEC
+A C string constant that tells the GCC driver program how to
+run any programs which cleanup after the normal assembler.
+Normally, this is not needed.  See the file @file{mips.h} for
+an example of this.
+
+Do not define this macro if it does not need to do anything.
+@end defmac
+
+@defmac AS_NEEDS_DASH_FOR_PIPED_INPUT
+Define this macro, with no value, if the driver should give the assembler
+an argument consisting of a single dash, @option{-}, to instruct it to
+read from its standard input (which will be a pipe connected to the
+output of the compiler proper).  This argument is given after any
+@option{-o} option specifying the name of the output file.
+
+If you do not define this macro, the assembler is assumed to read its
+standard input if given no non-option arguments.  If your assembler
+cannot read standard input at all, use a @samp{%@{pipe:%e@}} construct;
+see @file{mips.h} for instance.
+@end defmac
+
+@defmac LINK_SPEC
+A C string constant that tells the GCC driver program options to
+pass to the linker.  It can also specify how to translate options you
+give to GCC into options for GCC to pass to the linker.
+
+Do not define this macro if it does not need to do anything.
+@end defmac
+
+@defmac LIB_SPEC
+Another C string constant used much like @code{LINK_SPEC}.  The difference
+between the two is that @code{LIB_SPEC} is used at the end of the
+command given to the linker.
+
+If this macro is not defined, a default is provided that
+loads the standard C library from the usual place.  See @file{gcc.c}.
+@end defmac
+
+@defmac LIBGCC_SPEC
+Another C string constant that tells the GCC driver program
+how and when to place a reference to @file{libgcc.a} into the
+linker command line.  This constant is placed both before and after
+the value of @code{LIB_SPEC}.
+
+If this macro is not defined, the GCC driver provides a default that
+passes the string @option{-lgcc} to the linker.
+@end defmac
+
+@defmac REAL_LIBGCC_SPEC
+By default, if @code{ENABLE_SHARED_LIBGCC} is defined, the
+@code{LIBGCC_SPEC} is not directly used by the driver program but is
+instead modified to refer to different versions of @file{libgcc.a}
+depending on the values of the command line flags @option{-static},
+@option{-shared}, @option{-static-libgcc}, and @option{-shared-libgcc}.  On
+targets where these modifications are inappropriate, define
+@code{REAL_LIBGCC_SPEC} instead.  @code{REAL_LIBGCC_SPEC} tells the
+driver how to place a reference to @file{libgcc} on the link command
+line, but, unlike @code{LIBGCC_SPEC}, it is used unmodified.
+@end defmac
+
+@defmac USE_LD_AS_NEEDED
+A macro that controls the modifications to @code{LIBGCC_SPEC}
+mentioned in @code{REAL_LIBGCC_SPEC}.  If nonzero, a spec will be
+generated that uses --as-needed and the shared libgcc in place of the
+static exception handler library, when linking without any of
+@code{-static}, @code{-static-libgcc}, or @code{-shared-libgcc}.
+@end defmac
+
+@defmac LINK_EH_SPEC
+If defined, this C string constant is added to @code{LINK_SPEC}.
+When @code{USE_LD_AS_NEEDED} is zero or undefined, it also affects
+the modifications to @code{LIBGCC_SPEC} mentioned in
+@code{REAL_LIBGCC_SPEC}.
+@end defmac
+
+@defmac STARTFILE_SPEC
+Another C string constant used much like @code{LINK_SPEC}.  The
+difference between the two is that @code{STARTFILE_SPEC} is used at
+the very beginning of the command given to the linker.
+
+If this macro is not defined, a default is provided that loads the
+standard C startup file from the usual place.  See @file{gcc.c}.
+@end defmac
+
+@defmac ENDFILE_SPEC
+Another C string constant used much like @code{LINK_SPEC}.  The
+difference between the two is that @code{ENDFILE_SPEC} is used at
+the very end of the command given to the linker.
+
+Do not define this macro if it does not need to do anything.
+@end defmac
+
+@defmac THREAD_MODEL_SPEC
+GCC @code{-v} will print the thread model GCC was configured to use.
+However, this doesn't work on platforms that are multilibbed on thread
+models, such as AIX 4.3.  On such platforms, define
+@code{THREAD_MODEL_SPEC} such that it evaluates to a string without
+blanks that names one of the recognized thread models.  @code{%*}, the
+default value of this macro, will expand to the value of
+@code{thread_file} set in @file{config.gcc}.
+@end defmac
+
+@defmac SYSROOT_SUFFIX_SPEC
+Define this macro to add a suffix to the target sysroot when GCC is
+configured with a sysroot.  This will cause GCC to search for usr/lib,
+et al, within sysroot+suffix.
+@end defmac
+
+@defmac SYSROOT_HEADERS_SUFFIX_SPEC
+Define this macro to add a headers_suffix to the target sysroot when
+GCC is configured with a sysroot.  This will cause GCC to pass the
+updated sysroot+headers_suffix to CPP, causing it to search for
+usr/include, et al, within sysroot+headers_suffix.
+@end defmac
+
+@defmac EXTRA_SPECS
+Define this macro to provide additional specifications to put in the
+@file{specs} file that can be used in various specifications like
+@code{CC1_SPEC}.
+
+The definition should be an initializer for an array of structures,
+containing a string constant, that defines the specification name, and a
+string constant that provides the specification.
+
+Do not define this macro if it does not need to do anything.
+
+@code{EXTRA_SPECS} is useful when an architecture contains several
+related targets, which have various @code{@dots{}_SPECS} which are similar
+to each other, and the maintainer would like one central place to keep
+these definitions.
+
+For example, the PowerPC System V.4 targets use @code{EXTRA_SPECS} to
+define either @code{_CALL_SYSV} when the System V calling sequence is
+used or @code{_CALL_AIX} when the older AIX-based calling sequence is
+used.
+
+The @file{config/rs6000/rs6000.h} target file defines:
+
+@smallexample
+#define EXTRA_SPECS \
+  @{ "cpp_sysv_default", CPP_SYSV_DEFAULT @},
+
+#define CPP_SYS_DEFAULT ""
+@end smallexample
+
+The @file{config/rs6000/sysv.h} target file defines:
+@smallexample
+#undef CPP_SPEC
+#define CPP_SPEC \
+"%@{posix: -D_POSIX_SOURCE @} \
+%@{mcall-sysv: -D_CALL_SYSV @} \
+%@{!mcall-sysv: %(cpp_sysv_default) @} \
+%@{msoft-float: -D_SOFT_FLOAT@} %@{mcpu=403: -D_SOFT_FLOAT@}"
+
+#undef CPP_SYSV_DEFAULT
+#define CPP_SYSV_DEFAULT "-D_CALL_SYSV"
+@end smallexample
+
+while the @file{config/rs6000/eabiaix.h} target file defines
+@code{CPP_SYSV_DEFAULT} as:
+
+@smallexample
+#undef CPP_SYSV_DEFAULT
+#define CPP_SYSV_DEFAULT "-D_CALL_AIX"
+@end smallexample
+@end defmac
+
+@defmac LINK_LIBGCC_SPECIAL_1
+Define this macro if the driver program should find the library
+@file{libgcc.a}.  If you do not define this macro, the driver program will pass
+the argument @option{-lgcc} to tell the linker to do the search.
+@end defmac
+
+@defmac LINK_GCC_C_SEQUENCE_SPEC
+The sequence in which libgcc and libc are specified to the linker.
+By default this is @code{%G %L %G}.
+@end defmac
+
+@defmac LINK_COMMAND_SPEC
+A C string constant giving the complete command line need to execute the
+linker.  When you do this, you will need to update your port each time a
+change is made to the link command line within @file{gcc.c}.  Therefore,
+define this macro only if you need to completely redefine the command
+line for invoking the linker and there is no other way to accomplish
+the effect you need.  Overriding this macro may be avoidable by overriding
+@code{LINK_GCC_C_SEQUENCE_SPEC} instead.
+@end defmac
+
+@defmac LINK_ELIMINATE_DUPLICATE_LDIRECTORIES
+A nonzero value causes @command{collect2} to remove duplicate @option{-L@var{directory}} search
+directories from linking commands.  Do not give it a nonzero value if
+removing duplicate search directories changes the linker's semantics.
+@end defmac
+
+@defmac MULTILIB_DEFAULTS
+Define this macro as a C expression for the initializer of an array of
+string to tell the driver program which options are defaults for this
+target and thus do not need to be handled specially when using
+@code{MULTILIB_OPTIONS}.
+
+Do not define this macro if @code{MULTILIB_OPTIONS} is not defined in
+the target makefile fragment or if none of the options listed in
+@code{MULTILIB_OPTIONS} are set by default.
+@xref{Target Fragment}.
+@end defmac
+
+@defmac RELATIVE_PREFIX_NOT_LINKDIR
+Define this macro to tell @command{gcc} that it should only translate
+a @option{-B} prefix into a @option{-L} linker option if the prefix
+indicates an absolute file name.
+@end defmac
+
+@defmac MD_EXEC_PREFIX
+If defined, this macro is an additional prefix to try after
+@code{STANDARD_EXEC_PREFIX}.  @code{MD_EXEC_PREFIX} is not searched
+when the compiler is built as a cross
+compiler.  If you define @code{MD_EXEC_PREFIX}, then be sure to add it
+to the list of directories used to find the assembler in @file{configure.in}.
+@end defmac
+
+@defmac STANDARD_STARTFILE_PREFIX
+Define this macro as a C string constant if you wish to override the
+standard choice of @code{libdir} as the default prefix to
+try when searching for startup files such as @file{crt0.o}.
+@code{STANDARD_STARTFILE_PREFIX} is not searched when the compiler
+is built as a cross compiler.
+@end defmac
+
+@defmac STANDARD_STARTFILE_PREFIX_1
+Define this macro as a C string constant if you wish to override the
+standard choice of @code{/lib} as a prefix to try after the default prefix
+when searching for startup files such as @file{crt0.o}.
+@code{STANDARD_STARTFILE_PREFIX_1} is not searched when the compiler
+is built as a cross compiler.
+@end defmac
+
+@defmac STANDARD_STARTFILE_PREFIX_2
+Define this macro as a C string constant if you wish to override the
+standard choice of @code{/lib} as yet another prefix to try after the
+default prefix when searching for startup files such as @file{crt0.o}.
+@code{STANDARD_STARTFILE_PREFIX_2} is not searched when the compiler
+is built as a cross compiler.
+@end defmac
+
+@defmac MD_STARTFILE_PREFIX
+If defined, this macro supplies an additional prefix to try after the
+standard prefixes.  @code{MD_EXEC_PREFIX} is not searched when the
+compiler is built as a cross compiler.
+@end defmac
+
+@defmac MD_STARTFILE_PREFIX_1
+If defined, this macro supplies yet another prefix to try after the
+standard prefixes.  It is not searched when the compiler is built as a
+cross compiler.
+@end defmac
+
+@defmac INIT_ENVIRONMENT
+Define this macro as a C string constant if you wish to set environment
+variables for programs called by the driver, such as the assembler and
+loader.  The driver passes the value of this macro to @code{putenv} to
+initialize the necessary environment variables.
+@end defmac
+
+@defmac LOCAL_INCLUDE_DIR
+Define this macro as a C string constant if you wish to override the
+standard choice of @file{/usr/local/include} as the default prefix to
+try when searching for local header files.  @code{LOCAL_INCLUDE_DIR}
+comes before @code{SYSTEM_INCLUDE_DIR} in the search order.
+
+Cross compilers do not search either @file{/usr/local/include} or its
+replacement.
+@end defmac
+
+@defmac SYSTEM_INCLUDE_DIR
+Define this macro as a C string constant if you wish to specify a
+system-specific directory to search for header files before the standard
+directory.  @code{SYSTEM_INCLUDE_DIR} comes before
+@code{STANDARD_INCLUDE_DIR} in the search order.
+
+Cross compilers do not use this macro and do not search the directory
+specified.
+@end defmac
+
+@defmac STANDARD_INCLUDE_DIR
+Define this macro as a C string constant if you wish to override the
+standard choice of @file{/usr/include} as the default prefix to
+try when searching for header files.
+
+Cross compilers ignore this macro and do not search either
+@file{/usr/include} or its replacement.
+@end defmac
+
+@defmac STANDARD_INCLUDE_COMPONENT
+The ``component'' corresponding to @code{STANDARD_INCLUDE_DIR}.
+See @code{INCLUDE_DEFAULTS}, below, for the description of components.
+If you do not define this macro, no component is used.
+@end defmac
+
+@defmac INCLUDE_DEFAULTS
+Define this macro if you wish to override the entire default search path
+for include files.  For a native compiler, the default search path
+usually consists of @code{GCC_INCLUDE_DIR}, @code{LOCAL_INCLUDE_DIR},
+@code{SYSTEM_INCLUDE_DIR}, @code{GPLUSPLUS_INCLUDE_DIR}, and
+@code{STANDARD_INCLUDE_DIR}.  In addition, @code{GPLUSPLUS_INCLUDE_DIR}
+and @code{GCC_INCLUDE_DIR} are defined automatically by @file{Makefile},
+and specify private search areas for GCC@.  The directory
+@code{GPLUSPLUS_INCLUDE_DIR} is used only for C++ programs.
+
+The definition should be an initializer for an array of structures.
+Each array element should have four elements: the directory name (a
+string constant), the component name (also a string constant), a flag
+for C++-only directories,
+and a flag showing that the includes in the directory don't need to be
+wrapped in @code{extern @samp{C}} when compiling C++.  Mark the end of
+the array with a null element.
+
+The component name denotes what GNU package the include file is part of,
+if any, in all uppercase letters.  For example, it might be @samp{GCC}
+or @samp{BINUTILS}.  If the package is part of a vendor-supplied
+operating system, code the component name as @samp{0}.
+
+For example, here is the definition used for VAX/VMS:
+
+@smallexample
+#define INCLUDE_DEFAULTS \
+@{                                       \
+  @{ "GNU_GXX_INCLUDE:", "G++", 1, 1@},   \
+  @{ "GNU_CC_INCLUDE:", "GCC", 0, 0@},    \
+  @{ "SYS$SYSROOT:[SYSLIB.]", 0, 0, 0@},  \
+  @{ ".", 0, 0, 0@},                      \
+  @{ 0, 0, 0, 0@}                         \
+@}
+@end smallexample
+@end defmac
+
+Here is the order of prefixes tried for exec files:
+
+@enumerate
+@item
+Any prefixes specified by the user with @option{-B}.
+
+@item
+The environment variable @code{GCC_EXEC_PREFIX} or, if @code{GCC_EXEC_PREFIX}
+is not set and the compiler has not been installed in the configure-time 
+@var{prefix}, the location in which the compiler has actually been installed.
+
+@item
+The directories specified by the environment variable @code{COMPILER_PATH}.
+
+@item
+The macro @code{STANDARD_EXEC_PREFIX}, if the compiler has been installed
+in the configured-time @var{prefix}. 
+
+@item
+The location @file{/usr/libexec/gcc/}, but only if this is a native compiler. 
+
+@item
+The location @file{/usr/lib/gcc/}, but only if this is a native compiler. 
+
+@item
+The macro @code{MD_EXEC_PREFIX}, if defined, but only if this is a native 
+compiler.
+@end enumerate
+
+Here is the order of prefixes tried for startfiles:
+
+@enumerate
+@item
+Any prefixes specified by the user with @option{-B}.
+
+@item
+The environment variable @code{GCC_EXEC_PREFIX} or its automatically determined
+value based on the installed toolchain location.
+
+@item
+The directories specified by the environment variable @code{LIBRARY_PATH}
+(or port-specific name; native only, cross compilers do not use this).
+
+@item
+The macro @code{STANDARD_EXEC_PREFIX}, but only if the toolchain is installed
+in the configured @var{prefix} or this is a native compiler. 
+
+@item
+The location @file{/usr/lib/gcc/}, but only if this is a native compiler.
+
+@item
+The macro @code{MD_EXEC_PREFIX}, if defined, but only if this is a native 
+compiler.
+
+@item
+The macro @code{MD_STARTFILE_PREFIX}, if defined, but only if this is a 
+native compiler, or we have a target system root.
+
+@item
+The macro @code{MD_STARTFILE_PREFIX_1}, if defined, but only if this is a 
+native compiler, or we have a target system root.
+
+@item
+The macro @code{STANDARD_STARTFILE_PREFIX}, with any sysroot modifications.
+If this path is relative it will be prefixed by @code{GCC_EXEC_PREFIX} and
+the machine suffix or @code{STANDARD_EXEC_PREFIX} and the machine suffix.
+
+@item
+The macro @code{STANDARD_STARTFILE_PREFIX_1}, but only if this is a native
+compiler, or we have a target system root. The default for this macro is
+@file{/lib/}.
+
+@item
+The macro @code{STANDARD_STARTFILE_PREFIX_2}, but only if this is a native
+compiler, or we have a target system root. The default for this macro is
+@file{/usr/lib/}.
+@end enumerate
+
+@node Run-time Target
+@section Run-time Target Specification
+@cindex run-time target specification
+@cindex predefined macros
+@cindex target specifications
+
+@c prevent bad page break with this line
+Here are run-time target specifications.
+
+@defmac TARGET_CPU_CPP_BUILTINS ()
+This function-like macro expands to a block of code that defines
+built-in preprocessor macros and assertions for the target CPU, using
+the functions @code{builtin_define}, @code{builtin_define_std} and
+@code{builtin_assert}.  When the front end
+calls this macro it provides a trailing semicolon, and since it has
+finished command line option processing your code can use those
+results freely.
+
+@code{builtin_assert} takes a string in the form you pass to the
+command-line option @option{-A}, such as @code{cpu=mips}, and creates
+the assertion.  @code{builtin_define} takes a string in the form
+accepted by option @option{-D} and unconditionally defines the macro.
+
+@code{builtin_define_std} takes a string representing the name of an
+object-like macro.  If it doesn't lie in the user's namespace,
+@code{builtin_define_std} defines it unconditionally.  Otherwise, it
+defines a version with two leading underscores, and another version
+with two leading and trailing underscores, and defines the original
+only if an ISO standard was not requested on the command line.  For
+example, passing @code{unix} defines @code{__unix}, @code{__unix__}
+and possibly @code{unix}; passing @code{_mips} defines @code{__mips},
+@code{__mips__} and possibly @code{_mips}, and passing @code{_ABI64}
+defines only @code{_ABI64}.
+
+You can also test for the C dialect being compiled.  The variable
+@code{c_language} is set to one of @code{clk_c}, @code{clk_cplusplus}
+or @code{clk_objective_c}.  Note that if we are preprocessing
+assembler, this variable will be @code{clk_c} but the function-like
+macro @code{preprocessing_asm_p()} will return true, so you might want
+to check for that first.  If you need to check for strict ANSI, the
+variable @code{flag_iso} can be used.  The function-like macro
+@code{preprocessing_trad_p()} can be used to check for traditional
+preprocessing.
+@end defmac
+
+@defmac TARGET_OS_CPP_BUILTINS ()
+Similarly to @code{TARGET_CPU_CPP_BUILTINS} but this macro is optional
+and is used for the target operating system instead.
+@end defmac
+
+@defmac TARGET_OBJFMT_CPP_BUILTINS ()
+Similarly to @code{TARGET_CPU_CPP_BUILTINS} but this macro is optional
+and is used for the target object format.  @file{elfos.h} uses this
+macro to define @code{__ELF__}, so you probably do not need to define
+it yourself.
+@end defmac
+
+@deftypevar {extern int} target_flags
+This variable is declared in @file{options.h}, which is included before
+any target-specific headers.
+@end deftypevar
+
+@deftypevr {Target Hook} int TARGET_DEFAULT_TARGET_FLAGS
+This variable specifies the initial value of @code{target_flags}.
+Its default setting is 0.
+@end deftypevr
+
+@cindex optional hardware or system features
+@cindex features, optional, in system conventions
+
+@deftypefn {Target Hook} bool TARGET_HANDLE_OPTION (size_t @var{code}, const char *@var{arg}, int @var{value})
+This hook is called whenever the user specifies one of the
+target-specific options described by the @file{.opt} definition files
+(@pxref{Options}).  It has the opportunity to do some option-specific
+processing and should return true if the option is valid.  The default
+definition does nothing but return true.
+
+@var{code} specifies the @code{OPT_@var{name}} enumeration value
+associated with the selected option; @var{name} is just a rendering of
+the option name in which non-alphanumeric characters are replaced by
+underscores.  @var{arg} specifies the string argument and is null if
+no argument was given.  If the option is flagged as a @code{UInteger}
+(@pxref{Option properties}), @var{value} is the numeric value of the
+argument.  Otherwise @var{value} is 1 if the positive form of the
+option was used and 0 if the ``no-'' form was.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_HANDLE_C_OPTION (size_t @var{code}, const char *@var{arg}, int @var{value})
+This target hook is called whenever the user specifies one of the
+target-specific C language family options described by the @file{.opt}
+definition files(@pxref{Options}).  It has the opportunity to do some
+option-specific processing and should return true if the option is
+valid.  The arguments are like for @code{TARGET_HANDLE_OPTION}.  The
+default definition does nothing but return false.
+
+In general, you should use @code{TARGET_HANDLE_OPTION} to handle
+options.  However, if processing an option requires routines that are
+only available in the C (and related language) front ends, then you
+should use @code{TARGET_HANDLE_C_OPTION} instead.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_OBJC_CONSTRUCT_STRING_OBJECT (tree @var{string})
+Targets may provide a string object type that can be used within and between C, C++ and their respective Objective-C dialects. A string object might, for example, embed encoding and length information. These objects are considered opaque to the compiler and handled as references. An ideal implementation makes the composition of the string object match that of the Objective-C @code{NSString} (@code{NXString} for GNUStep), allowing efficient interworking between C-only and Objective-C code. If a target implements string objects then this hook should return a reference to such an object constructed from the normal `C' string representation provided in @var{string}. At present, the hook is used by Objective-C only, to obtain a common-format string object when the target provides one.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_STRING_OBJECT_REF_TYPE_P (const_tree @var{stringref})
+If a target implements string objects then this hook should return @code{true} if @var{stringref} is a valid reference to such an object.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_CHECK_STRING_OBJECT_FORMAT_ARG (tree @var{format_arg}, tree @var{args_list})
+If a target implements string objects then this hook should should  provide a facility to check the function arguments in @var{args_list}  against the format specifiers in @var{format_arg} where the type of  @var{format_arg} is one recognized as a valid string reference type.
+@end deftypefn
+
+@defmac TARGET_VERSION
+This macro is a C statement to print on @code{stderr} a string
+describing the particular machine description choice.  Every machine
+description should define @code{TARGET_VERSION}.  For example:
+
+@smallexample
+#ifdef MOTOROLA
+#define TARGET_VERSION \
+  fprintf (stderr, " (68k, Motorola syntax)");
+#else
+#define TARGET_VERSION \
+  fprintf (stderr, " (68k, MIT syntax)");
+#endif
+@end smallexample
+@end defmac
+
+@deftypefn {Target Hook} void TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE (void)
+This target function is similar to the hook @code{TARGET_OPTION_OVERRIDE}
+but is called when the optimize level is changed via an attribute or
+pragma or when it is reset at the end of the code affected by the
+attribute or pragma.  It is not called at the beginning of compilation
+when @code{TARGET_OPTION_OVERRIDE} is called so if you want to perform these
+actions then, you should have @code{TARGET_OPTION_OVERRIDE} call
+@code{TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE}.
+@end deftypefn
+
+@defmac C_COMMON_OVERRIDE_OPTIONS
+This is similar to the @code{TARGET_OPTION_OVERRIDE} hook
+but is only used in the C
+language frontends (C, Objective-C, C++, Objective-C++) and so can be
+used to alter option flag variables which only exist in those
+frontends.
+@end defmac
+
+@deftypevr {Target Hook} {const struct default_options *} TARGET_OPTION_OPTIMIZATION_TABLE
+Some machines may desire to change what optimizations are performed for
+various optimization levels.   This variable, if defined, describes
+options to enable at particular sets of optimization levels.  These
+options are processed once
+just after the optimization level is determined and before the remainder
+of the command options have been parsed, so may be overridden by other
+options passed explicitly.
+
+This processing is run once at program startup and when the optimization
+options are changed via @code{#pragma GCC optimize} or by using the
+@code{optimize} attribute.
+@end deftypevr
+
+@deftypefn {Target Hook} void TARGET_OPTION_INIT_STRUCT (struct gcc_options *@var{opts})
+Set target-dependent initial values of fields in @var{opts}.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_OPTION_DEFAULT_PARAMS (void)
+Set target-dependent default values for @option{--param} settings, using calls to @code{set_default_param_value}.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_HELP (void)
+This hook is called in response to the user invoking
+@option{--target-help} on the command line.  It gives the target a
+chance to display extra information on the target specific command
+line options found in its @file{.opt} file.
+@end deftypefn
+
+@defmac SWITCHABLE_TARGET
+Some targets need to switch between substantially different subtargets
+during compilation.  For example, the MIPS target has one subtarget for
+the traditional MIPS architecture and another for MIPS16.  Source code
+can switch between these two subarchitectures using the @code{mips16}
+and @code{nomips16} attributes.
+
+Such subtargets can differ in things like the set of available
+registers, the set of available instructions, the costs of various
+operations, and so on.  GCC caches a lot of this type of information
+in global variables, and recomputing them for each subtarget takes a
+significant amount of time.  The compiler therefore provides a facility
+for maintaining several versions of the global variables and quickly
+switching between them; see @file{target-globals.h} for details.
+
+Define this macro to 1 if your target needs this facility.  The default
+is 0.
+@end defmac
+
+@node Per-Function Data
+@section Defining data structures for per-function information.
+@cindex per-function data
+@cindex data structures
+
+If the target needs to store information on a per-function basis, GCC
+provides a macro and a couple of variables to allow this.  Note, just
+using statics to store the information is a bad idea, since GCC supports
+nested functions, so you can be halfway through encoding one function
+when another one comes along.
+
+GCC defines a data structure called @code{struct function} which
+contains all of the data specific to an individual function.  This
+structure contains a field called @code{machine} whose type is
+@code{struct machine_function *}, which can be used by targets to point
+to their own specific data.
+
+If a target needs per-function specific data it should define the type
+@code{struct machine_function} and also the macro @code{INIT_EXPANDERS}.
+This macro should be used to initialize the function pointer
+@code{init_machine_status}.  This pointer is explained below.
+
+One typical use of per-function, target specific data is to create an
+RTX to hold the register containing the function's return address.  This
+RTX can then be used to implement the @code{__builtin_return_address}
+function, for level 0.
+
+Note---earlier implementations of GCC used a single data area to hold
+all of the per-function information.  Thus when processing of a nested
+function began the old per-function data had to be pushed onto a
+stack, and when the processing was finished, it had to be popped off the
+stack.  GCC used to provide function pointers called
+@code{save_machine_status} and @code{restore_machine_status} to handle
+the saving and restoring of the target specific information.  Since the
+single data area approach is no longer used, these pointers are no
+longer supported.
+
+@defmac INIT_EXPANDERS
+Macro called to initialize any target specific information.  This macro
+is called once per function, before generation of any RTL has begun.
+The intention of this macro is to allow the initialization of the
+function pointer @code{init_machine_status}.
+@end defmac
+
+@deftypevar {void (*)(struct function *)} init_machine_status
+If this function pointer is non-@code{NULL} it will be called once per
+function, before function compilation starts, in order to allow the
+target to perform any target specific initialization of the
+@code{struct function} structure.  It is intended that this would be
+used to initialize the @code{machine} of that structure.
+
+@code{struct machine_function} structures are expected to be freed by GC@.
+Generally, any memory that they reference must be allocated by using
+GC allocation, including the structure itself.
+@end deftypevar
+
+@node Storage Layout
+@section Storage Layout
+@cindex storage layout
+
+Note that the definitions of the macros in this table which are sizes or
+alignments measured in bits do not need to be constant.  They can be C
+expressions that refer to static variables, such as the @code{target_flags}.
+@xref{Run-time Target}.
+
+@defmac BITS_BIG_ENDIAN
+Define this macro to have the value 1 if the most significant bit in a
+byte has the lowest number; otherwise define it to have the value zero.
+This means that bit-field instructions count from the most significant
+bit.  If the machine has no bit-field instructions, then this must still
+be defined, but it doesn't matter which value it is defined to.  This
+macro need not be a constant.
+
+This macro does not affect the way structure fields are packed into
+bytes or words; that is controlled by @code{BYTES_BIG_ENDIAN}.
+@end defmac
+
+@defmac BYTES_BIG_ENDIAN
+Define this macro to have the value 1 if the most significant byte in a
+word has the lowest number.  This macro need not be a constant.
+@end defmac
+
+@defmac WORDS_BIG_ENDIAN
+Define this macro to have the value 1 if, in a multiword object, the
+most significant word has the lowest number.  This applies to both
+memory locations and registers; GCC fundamentally assumes that the
+order of words in memory is the same as the order in registers.  This
+macro need not be a constant.
+@end defmac
+
+@defmac FLOAT_WORDS_BIG_ENDIAN
+Define this macro to have the value 1 if @code{DFmode}, @code{XFmode} or
+@code{TFmode} floating point numbers are stored in memory with the word
+containing the sign bit at the lowest address; otherwise define it to
+have the value 0.  This macro need not be a constant.
+
+You need not define this macro if the ordering is the same as for
+multi-word integers.
+@end defmac
+
+@defmac BITS_PER_UNIT
+Define this macro to be the number of bits in an addressable storage
+unit (byte).  If you do not define this macro the default is 8.
+@end defmac
+
+@defmac BITS_PER_WORD
+Number of bits in a word.  If you do not define this macro, the default
+is @code{BITS_PER_UNIT * UNITS_PER_WORD}.
+@end defmac
+
+@defmac MAX_BITS_PER_WORD
+Maximum number of bits in a word.  If this is undefined, the default is
+@code{BITS_PER_WORD}.  Otherwise, it is the constant value that is the
+largest value that @code{BITS_PER_WORD} can have at run-time.
+@end defmac
+
+@defmac UNITS_PER_WORD
+Number of storage units in a word; normally the size of a general-purpose
+register, a power of two from 1 or 8.
+@end defmac
+
+@defmac MIN_UNITS_PER_WORD
+Minimum number of units in a word.  If this is undefined, the default is
+@code{UNITS_PER_WORD}.  Otherwise, it is the constant value that is the
+smallest value that @code{UNITS_PER_WORD} can have at run-time.
+@end defmac
+
+@defmac POINTER_SIZE
+Width of a pointer, in bits.  You must specify a value no wider than the
+width of @code{Pmode}.  If it is not equal to the width of @code{Pmode},
+you must define @code{POINTERS_EXTEND_UNSIGNED}.  If you do not specify
+a value the default is @code{BITS_PER_WORD}.
+@end defmac
+
+@defmac POINTERS_EXTEND_UNSIGNED
+A C expression that determines how pointers should be extended from
+@code{ptr_mode} to either @code{Pmode} or @code{word_mode}.  It is
+greater than zero if pointers should be zero-extended, zero if they
+should be sign-extended, and negative if some other sort of conversion
+is needed.  In the last case, the extension is done by the target's
+@code{ptr_extend} instruction.
+
+You need not define this macro if the @code{ptr_mode}, @code{Pmode}
+and @code{word_mode} are all the same width.
+@end defmac
+
+@defmac PROMOTE_MODE (@var{m}, @var{unsignedp}, @var{type})
+A macro to update @var{m} and @var{unsignedp} when an object whose type
+is @var{type} and which has the specified mode and signedness is to be
+stored in a register.  This macro is only called when @var{type} is a
+scalar type.
+
+On most RISC machines, which only have operations that operate on a full
+register, define this macro to set @var{m} to @code{word_mode} if
+@var{m} is an integer mode narrower than @code{BITS_PER_WORD}.  In most
+cases, only integer modes should be widened because wider-precision
+floating-point operations are usually more expensive than their narrower
+counterparts.
+
+For most machines, the macro definition does not change @var{unsignedp}.
+However, some machines, have instructions that preferentially handle
+either signed or unsigned quantities of certain modes.  For example, on
+the DEC Alpha, 32-bit loads from memory and 32-bit add instructions
+sign-extend the result to 64 bits.  On such machines, set
+@var{unsignedp} according to which kind of extension is more efficient.
+
+Do not define this macro if it would never modify @var{m}.
+@end defmac
+
+@deftypefn {Target Hook} {enum machine_mode} TARGET_PROMOTE_FUNCTION_MODE (const_tree @var{type}, enum machine_mode @var{mode}, int *@var{punsignedp}, const_tree @var{funtype}, int @var{for_return})
+Like @code{PROMOTE_MODE}, but it is applied to outgoing function arguments or
+function return values.  The target hook should return the new mode
+and possibly change @code{*@var{punsignedp}} if the promotion should
+change signedness.  This function is called only for scalar @emph{or
+pointer} types.
+
+@var{for_return} allows to distinguish the promotion of arguments and
+return values.  If it is @code{1}, a return value is being promoted and
+@code{TARGET_FUNCTION_VALUE} must perform the same promotions done here.
+If it is @code{2}, the returned mode should be that of the register in
+which an incoming parameter is copied, or the outgoing result is computed;
+then the hook should return the same mode as @code{promote_mode}, though
+the signedness may be different.
+
+The default is to not promote arguments and return values.  You can
+also define the hook to @code{default_promote_function_mode_always_promote}
+if you would like to apply the same rules given by @code{PROMOTE_MODE}.
+@end deftypefn
+
+@defmac PARM_BOUNDARY
+Normal alignment required for function parameters on the stack, in
+bits.  All stack parameters receive at least this much alignment
+regardless of data type.  On most machines, this is the same as the
+size of an integer.
+@end defmac
+
+@defmac STACK_BOUNDARY
+Define this macro to the minimum alignment enforced by hardware for the
+stack pointer on this machine.  The definition is a C expression for the
+desired alignment (measured in bits).  This value is used as a default
+if @code{PREFERRED_STACK_BOUNDARY} is not defined.  On most machines,
+this should be the same as @code{PARM_BOUNDARY}.
+@end defmac
+
+@defmac PREFERRED_STACK_BOUNDARY
+Define this macro if you wish to preserve a certain alignment for the
+stack pointer, greater than what the hardware enforces.  The definition
+is a C expression for the desired alignment (measured in bits).  This
+macro must evaluate to a value equal to or larger than
+@code{STACK_BOUNDARY}.
+@end defmac
+
+@defmac INCOMING_STACK_BOUNDARY
+Define this macro if the incoming stack boundary may be different
+from @code{PREFERRED_STACK_BOUNDARY}.  This macro must evaluate
+to a value equal to or larger than @code{STACK_BOUNDARY}.
+@end defmac
+
+@defmac FUNCTION_BOUNDARY
+Alignment required for a function entry point, in bits.
+@end defmac
+
+@defmac BIGGEST_ALIGNMENT
+Biggest alignment that any data type can require on this machine, in
+bits.  Note that this is not the biggest alignment that is supported,
+just the biggest alignment that, when violated, may cause a fault.
+@end defmac
+
+@defmac MALLOC_ABI_ALIGNMENT
+Alignment, in bits, a C conformant malloc implementation has to
+provide.  If not defined, the default value is @code{BITS_PER_WORD}.
+@end defmac
+
+@defmac ATTRIBUTE_ALIGNED_VALUE
+Alignment used by the @code{__attribute__ ((aligned))} construct.  If
+not defined, the default value is @code{BIGGEST_ALIGNMENT}.
+@end defmac
+
+@defmac MINIMUM_ATOMIC_ALIGNMENT
+If defined, the smallest alignment, in bits, that can be given to an
+object that can be referenced in one operation, without disturbing any
+nearby object.  Normally, this is @code{BITS_PER_UNIT}, but may be larger
+on machines that don't have byte or half-word store operations.
+@end defmac
+
+@defmac BIGGEST_FIELD_ALIGNMENT
+Biggest alignment that any structure or union field can require on this
+machine, in bits.  If defined, this overrides @code{BIGGEST_ALIGNMENT} for
+structure and union fields only, unless the field alignment has been set
+by the @code{__attribute__ ((aligned (@var{n})))} construct.
+@end defmac
+
+@defmac ADJUST_FIELD_ALIGN (@var{field}, @var{computed})
+An expression for the alignment of a structure field @var{field} if the
+alignment computed in the usual way (including applying of
+@code{BIGGEST_ALIGNMENT} and @code{BIGGEST_FIELD_ALIGNMENT} to the
+alignment) is @var{computed}.  It overrides alignment only if the
+field alignment has not been set by the
+@code{__attribute__ ((aligned (@var{n})))} construct.
+@end defmac
+
+@defmac MAX_STACK_ALIGNMENT
+Biggest stack alignment guaranteed by the backend.  Use this macro
+to specify the maximum alignment of a variable on stack.
+
+If not defined, the default value is @code{STACK_BOUNDARY}.
+
+@c FIXME: The default should be @code{PREFERRED_STACK_BOUNDARY}.
+@c But the fix for PR 32893 indicates that we can only guarantee
+@c maximum stack alignment on stack up to @code{STACK_BOUNDARY}, not
+@c @code{PREFERRED_STACK_BOUNDARY}, if stack alignment isn't supported.
+@end defmac
+
+@defmac MAX_OFILE_ALIGNMENT
+Biggest alignment supported by the object file format of this machine.
+Use this macro to limit the alignment which can be specified using the
+@code{__attribute__ ((aligned (@var{n})))} construct.  If not defined,
+the default value is @code{BIGGEST_ALIGNMENT}.
+
+On systems that use ELF, the default (in @file{config/elfos.h}) is
+the largest supported 32-bit ELF section alignment representable on
+a 32-bit host e.g. @samp{(((unsigned HOST_WIDEST_INT) 1 << 28) * 8)}.
+On 32-bit ELF the largest supported section alignment in bits is
+@samp{(0x80000000 * 8)}, but this is not representable on 32-bit hosts.
+@end defmac
+
+@defmac DATA_ALIGNMENT (@var{type}, @var{basic-align})
+If defined, a C expression to compute the alignment for a variable in
+the static store.  @var{type} is the data type, and @var{basic-align} is
+the alignment that the object would ordinarily have.  The value of this
+macro is used instead of that alignment to align the object.
+
+If this macro is not defined, then @var{basic-align} is used.
+
+@findex strcpy
+One use of this macro is to increase alignment of medium-size data to
+make it all fit in fewer cache lines.  Another is to cause character
+arrays to be word-aligned so that @code{strcpy} calls that copy
+constants to character arrays can be done inline.
+@end defmac
+
+@defmac CONSTANT_ALIGNMENT (@var{constant}, @var{basic-align})
+If defined, a C expression to compute the alignment given to a constant
+that is being placed in memory.  @var{constant} is the constant and
+@var{basic-align} is the alignment that the object would ordinarily
+have.  The value of this macro is used instead of that alignment to
+align the object.
+
+If this macro is not defined, then @var{basic-align} is used.
+
+The typical use of this macro is to increase alignment for string
+constants to be word aligned so that @code{strcpy} calls that copy
+constants can be done inline.
+@end defmac
+
+@defmac LOCAL_ALIGNMENT (@var{type}, @var{basic-align})
+If defined, a C expression to compute the alignment for a variable in
+the local store.  @var{type} is the data type, and @var{basic-align} is
+the alignment that the object would ordinarily have.  The value of this
+macro is used instead of that alignment to align the object.
+
+If this macro is not defined, then @var{basic-align} is used.
+
+One use of this macro is to increase alignment of medium-size data to
+make it all fit in fewer cache lines.
+
+If the value of this macro has a type, it should be an unsigned type.
+@end defmac
+
+@deftypefn {Target Hook} HOST_WIDE_INT TARGET_VECTOR_ALIGNMENT (const_tree @var{type})
+This hook can be used to define the alignment for a vector of type
+@var{type}, in order to comply with a platform ABI.  The default is to
+require natural alignment for vector types.  The alignment returned by
+this hook must be a power-of-two multiple of the default alignment of
+the vector element type.
+@end deftypefn
+
+@defmac STACK_SLOT_ALIGNMENT (@var{type}, @var{mode}, @var{basic-align})
+If defined, a C expression to compute the alignment for stack slot.
+@var{type} is the data type, @var{mode} is the widest mode available,
+and @var{basic-align} is the alignment that the slot would ordinarily
+have.  The value of this macro is used instead of that alignment to
+align the slot.
+
+If this macro is not defined, then @var{basic-align} is used when
+@var{type} is @code{NULL}.  Otherwise, @code{LOCAL_ALIGNMENT} will
+be used.
+
+This macro is to set alignment of stack slot to the maximum alignment
+of all possible modes which the slot may have.
+
+If the value of this macro has a type, it should be an unsigned type.
+@end defmac
+
+@defmac LOCAL_DECL_ALIGNMENT (@var{decl})
+If defined, a C expression to compute the alignment for a local
+variable @var{decl}.
+
+If this macro is not defined, then
+@code{LOCAL_ALIGNMENT (TREE_TYPE (@var{decl}), DECL_ALIGN (@var{decl}))}
+is used.
+
+One use of this macro is to increase alignment of medium-size data to
+make it all fit in fewer cache lines.
+
+If the value of this macro has a type, it should be an unsigned type.
+@end defmac
+
+@defmac MINIMUM_ALIGNMENT (@var{exp}, @var{mode}, @var{align})
+If defined, a C expression to compute the minimum required alignment
+for dynamic stack realignment purposes for @var{exp} (a type or decl),
+@var{mode}, assuming normal alignment @var{align}.
+
+If this macro is not defined, then @var{align} will be used.
+@end defmac
+
+@defmac EMPTY_FIELD_BOUNDARY
+Alignment in bits to be given to a structure bit-field that follows an
+empty field such as @code{int : 0;}.
+
+If @code{PCC_BITFIELD_TYPE_MATTERS} is true, it overrides this macro.
+@end defmac
+
+@defmac STRUCTURE_SIZE_BOUNDARY
+Number of bits which any structure or union's size must be a multiple of.
+Each structure or union's size is rounded up to a multiple of this.
+
+If you do not define this macro, the default is the same as
+@code{BITS_PER_UNIT}.
+@end defmac
+
+@defmac STRICT_ALIGNMENT
+Define this macro to be the value 1 if instructions will fail to work
+if given data not on the nominal alignment.  If instructions will merely
+go slower in that case, define this macro as 0.
+@end defmac
+
+@defmac PCC_BITFIELD_TYPE_MATTERS
+Define this if you wish to imitate the way many other C compilers handle
+alignment of bit-fields and the structures that contain them.
+
+The behavior is that the type written for a named bit-field (@code{int},
+@code{short}, or other integer type) imposes an alignment for the entire
+structure, as if the structure really did contain an ordinary field of
+that type.  In addition, the bit-field is placed within the structure so
+that it would fit within such a field, not crossing a boundary for it.
+
+Thus, on most machines, a named bit-field whose type is written as
+@code{int} would not cross a four-byte boundary, and would force
+four-byte alignment for the whole structure.  (The alignment used may
+not be four bytes; it is controlled by the other alignment parameters.)
+
+An unnamed bit-field will not affect the alignment of the containing
+structure.
+
+If the macro is defined, its definition should be a C expression;
+a nonzero value for the expression enables this behavior.
+
+Note that if this macro is not defined, or its value is zero, some
+bit-fields may cross more than one alignment boundary.  The compiler can
+support such references if there are @samp{insv}, @samp{extv}, and
+@samp{extzv} insns that can directly reference memory.
+
+The other known way of making bit-fields work is to define
+@code{STRUCTURE_SIZE_BOUNDARY} as large as @code{BIGGEST_ALIGNMENT}.
+Then every structure can be accessed with fullwords.
+
+Unless the machine has bit-field instructions or you define
+@code{STRUCTURE_SIZE_BOUNDARY} that way, you must define
+@code{PCC_BITFIELD_TYPE_MATTERS} to have a nonzero value.
+
+If your aim is to make GCC use the same conventions for laying out
+bit-fields as are used by another compiler, here is how to investigate
+what the other compiler does.  Compile and run this program:
+
+@smallexample
+struct foo1
+@{
+  char x;
+  char :0;
+  char y;
+@};
+
+struct foo2
+@{
+  char x;
+  int :0;
+  char y;
+@};
+
+main ()
+@{
+  printf ("Size of foo1 is %d\n",
+          sizeof (struct foo1));
+  printf ("Size of foo2 is %d\n",
+          sizeof (struct foo2));
+  exit (0);
+@}
+@end smallexample
+
+If this prints 2 and 5, then the compiler's behavior is what you would
+get from @code{PCC_BITFIELD_TYPE_MATTERS}.
+@end defmac
+
+@defmac BITFIELD_NBYTES_LIMITED
+Like @code{PCC_BITFIELD_TYPE_MATTERS} except that its effect is limited
+to aligning a bit-field within the structure.
+@end defmac
+
+@deftypefn {Target Hook} bool TARGET_ALIGN_ANON_BITFIELD (void)
+When @code{PCC_BITFIELD_TYPE_MATTERS} is true this hook will determine
+whether unnamed bitfields affect the alignment of the containing
+structure.  The hook should return true if the structure should inherit
+the alignment requirements of an unnamed bitfield's type.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_NARROW_VOLATILE_BITFIELD (void)
+This target hook should return @code{true} if accesses to volatile bitfields
+should use the narrowest mode possible.  It should return @code{false} if
+these accesses should use the bitfield container type.
+
+The default is @code{!TARGET_STRICT_ALIGN}.
+@end deftypefn
+
+@defmac MEMBER_TYPE_FORCES_BLK (@var{field}, @var{mode})
+Return 1 if a structure or array containing @var{field} should be accessed using
+@code{BLKMODE}.
+
+If @var{field} is the only field in the structure, @var{mode} is its
+mode, otherwise @var{mode} is VOIDmode.  @var{mode} is provided in the
+case where structures of one field would require the structure's mode to
+retain the field's mode.
+
+Normally, this is not needed.
+@end defmac
+
+@defmac ROUND_TYPE_ALIGN (@var{type}, @var{computed}, @var{specified})
+Define this macro as an expression for the alignment of a type (given
+by @var{type} as a tree node) if the alignment computed in the usual
+way is @var{computed} and the alignment explicitly specified was
+@var{specified}.
+
+The default is to use @var{specified} if it is larger; otherwise, use
+the smaller of @var{computed} and @code{BIGGEST_ALIGNMENT}
+@end defmac
+
+@defmac MAX_FIXED_MODE_SIZE
+An integer expression for the size in bits of the largest integer
+machine mode that should actually be used.  All integer machine modes of
+this size or smaller can be used for structures and unions with the
+appropriate sizes.  If this macro is undefined, @code{GET_MODE_BITSIZE
+(DImode)} is assumed.
+@end defmac
+
+@defmac STACK_SAVEAREA_MODE (@var{save_level})
+If defined, an expression of type @code{enum machine_mode} that
+specifies the mode of the save area operand of a
+@code{save_stack_@var{level}} named pattern (@pxref{Standard Names}).
+@var{save_level} is one of @code{SAVE_BLOCK}, @code{SAVE_FUNCTION}, or
+@code{SAVE_NONLOCAL} and selects which of the three named patterns is
+having its mode specified.
+
+You need not define this macro if it always returns @code{Pmode}.  You
+would most commonly define this macro if the
+@code{save_stack_@var{level}} patterns need to support both a 32- and a
+64-bit mode.
+@end defmac
+
+@defmac STACK_SIZE_MODE
+If defined, an expression of type @code{enum machine_mode} that
+specifies the mode of the size increment operand of an
+@code{allocate_stack} named pattern (@pxref{Standard Names}).
+
+You need not define this macro if it always returns @code{word_mode}.
+You would most commonly define this macro if the @code{allocate_stack}
+pattern needs to support both a 32- and a 64-bit mode.
+@end defmac
+
+@deftypefn {Target Hook} {enum machine_mode} TARGET_LIBGCC_CMP_RETURN_MODE (void)
+This target hook should return the mode to be used for the return value
+of compare instructions expanded to libgcc calls.  If not defined
+@code{word_mode} is returned which is the right choice for a majority of
+targets.
+@end deftypefn
+
+@deftypefn {Target Hook} {enum machine_mode} TARGET_LIBGCC_SHIFT_COUNT_MODE (void)
+This target hook should return the mode to be used for the shift count operand
+of shift instructions expanded to libgcc calls.  If not defined
+@code{word_mode} is returned which is the right choice for a majority of
+targets.
+@end deftypefn
+
+@deftypefn {Target Hook} {enum machine_mode} TARGET_UNWIND_WORD_MODE (void)
+Return machine mode to be used for @code{_Unwind_Word} type.
+The default is to use @code{word_mode}.
+@end deftypefn
+
+@defmac ROUND_TOWARDS_ZERO
+If defined, this macro should be true if the prevailing rounding
+mode is towards zero.
+
+Defining this macro only affects the way @file{libgcc.a} emulates
+floating-point arithmetic.
+
+Not defining this macro is equivalent to returning zero.
+@end defmac
+
+@defmac LARGEST_EXPONENT_IS_NORMAL (@var{size})
+This macro should return true if floats with @var{size}
+bits do not have a NaN or infinity representation, but use the largest
+exponent for normal numbers instead.
+
+Defining this macro only affects the way @file{libgcc.a} emulates
+floating-point arithmetic.
+
+The default definition of this macro returns false for all sizes.
+@end defmac
+
+@deftypefn {Target Hook} bool TARGET_MS_BITFIELD_LAYOUT_P (const_tree @var{record_type})
+This target hook returns @code{true} if bit-fields in the given
+@var{record_type} are to be laid out following the rules of Microsoft
+Visual C/C++, namely: (i) a bit-field won't share the same storage
+unit with the previous bit-field if their underlying types have
+different sizes, and the bit-field will be aligned to the highest
+alignment of the underlying types of itself and of the previous
+bit-field; (ii) a zero-sized bit-field will affect the alignment of
+the whole enclosing structure, even if it is unnamed; except that
+(iii) a zero-sized bit-field will be disregarded unless it follows
+another bit-field of nonzero size.  If this hook returns @code{true},
+other macros that control bit-field layout are ignored.
+
+When a bit-field is inserted into a packed record, the whole size
+of the underlying type is used by one or more same-size adjacent
+bit-fields (that is, if its long:3, 32 bits is used in the record,
+and any additional adjacent long bit-fields are packed into the same
+chunk of 32 bits.  However, if the size changes, a new field of that
+size is allocated).  In an unpacked record, this is the same as using
+alignment, but not equivalent when packing.
+
+If both MS bit-fields and @samp{__attribute__((packed))} are used,
+the latter will take precedence.  If @samp{__attribute__((packed))} is
+used on a single field when MS bit-fields are in use, it will take
+precedence for that field, but the alignment of the rest of the structure
+may affect its placement.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_DECIMAL_FLOAT_SUPPORTED_P (void)
+Returns true if the target supports decimal floating point.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_FIXED_POINT_SUPPORTED_P (void)
+Returns true if the target supports fixed-point arithmetic.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_EXPAND_TO_RTL_HOOK (void)
+This hook is called just before expansion into rtl, allowing the target
+to perform additional initializations or analysis before the expansion.
+For example, the rs6000 port uses it to allocate a scratch stack slot
+for use in copying SDmode values between memory and floating point
+registers whenever the function being expanded has any SDmode
+usage.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_INSTANTIATE_DECLS (void)
+This hook allows the backend to perform additional instantiations on rtl
+that are not actually in any insns yet, but will be later.
+@end deftypefn
+
+@deftypefn {Target Hook} {const char *} TARGET_MANGLE_TYPE (const_tree @var{type})
+If your target defines any fundamental types, or any types your target
+uses should be mangled differently from the default, define this hook
+to return the appropriate encoding for these types as part of a C++
+mangled name.  The @var{type} argument is the tree structure representing
+the type to be mangled.  The hook may be applied to trees which are
+not target-specific fundamental types; it should return @code{NULL}
+for all such types, as well as arguments it does not recognize.  If the
+return value is not @code{NULL}, it must point to a statically-allocated
+string constant.
+
+Target-specific fundamental types might be new fundamental types or
+qualified versions of ordinary fundamental types.  Encode new
+fundamental types as @samp{@w{u @var{n} @var{name}}}, where @var{name}
+is the name used for the type in source code, and @var{n} is the
+length of @var{name} in decimal.  Encode qualified versions of
+ordinary types as @samp{@w{U @var{n} @var{name} @var{code}}}, where
+@var{name} is the name used for the type qualifier in source code,
+@var{n} is the length of @var{name} as above, and @var{code} is the
+code used to represent the unqualified version of this type.  (See
+@code{write_builtin_type} in @file{cp/mangle.c} for the list of
+codes.)  In both cases the spaces are for clarity; do not include any
+spaces in your string.
+
+This hook is applied to types prior to typedef resolution.  If the mangled
+name for a particular type depends only on that type's main variant, you
+can perform typedef resolution yourself using @code{TYPE_MAIN_VARIANT}
+before mangling.
+
+The default version of this hook always returns @code{NULL}, which is
+appropriate for a target that does not define any new fundamental
+types.
+@end deftypefn
+
+@node Type Layout
+@section Layout of Source Language Data Types
+
+These macros define the sizes and other characteristics of the standard
+basic data types used in programs being compiled.  Unlike the macros in
+the previous section, these apply to specific features of C and related
+languages, rather than to fundamental aspects of storage layout.
+
+@defmac INT_TYPE_SIZE
+A C expression for the size in bits of the type @code{int} on the
+target machine.  If you don't define this, the default is one word.
+@end defmac
+
+@defmac SHORT_TYPE_SIZE
+A C expression for the size in bits of the type @code{short} on the
+target machine.  If you don't define this, the default is half a word.
+(If this would be less than one storage unit, it is rounded up to one
+unit.)
+@end defmac
+
+@defmac LONG_TYPE_SIZE
+A C expression for the size in bits of the type @code{long} on the
+target machine.  If you don't define this, the default is one word.
+@end defmac
+
+@defmac ADA_LONG_TYPE_SIZE
+On some machines, the size used for the Ada equivalent of the type
+@code{long} by a native Ada compiler differs from that used by C@.  In
+that situation, define this macro to be a C expression to be used for
+the size of that type.  If you don't define this, the default is the
+value of @code{LONG_TYPE_SIZE}.
+@end defmac
+
+@defmac LONG_LONG_TYPE_SIZE
+A C expression for the size in bits of the type @code{long long} on the
+target machine.  If you don't define this, the default is two
+words.  If you want to support GNU Ada on your machine, the value of this
+macro must be at least 64.
+@end defmac
+
+@defmac CHAR_TYPE_SIZE
+A C expression for the size in bits of the type @code{char} on the
+target machine.  If you don't define this, the default is
+@code{BITS_PER_UNIT}.
+@end defmac
+
+@defmac BOOL_TYPE_SIZE
+A C expression for the size in bits of the C++ type @code{bool} and
+C99 type @code{_Bool} on the target machine.  If you don't define
+this, and you probably shouldn't, the default is @code{CHAR_TYPE_SIZE}.
+@end defmac
+
+@defmac FLOAT_TYPE_SIZE
+A C expression for the size in bits of the type @code{float} on the
+target machine.  If you don't define this, the default is one word.
+@end defmac
+
+@defmac DOUBLE_TYPE_SIZE
+A C expression for the size in bits of the type @code{double} on the
+target machine.  If you don't define this, the default is two
+words.
+@end defmac
+
+@defmac LONG_DOUBLE_TYPE_SIZE
+A C expression for the size in bits of the type @code{long double} on
+the target machine.  If you don't define this, the default is two
+words.
+@end defmac
+
+@defmac SHORT_FRACT_TYPE_SIZE
+A C expression for the size in bits of the type @code{short _Fract} on
+the target machine.  If you don't define this, the default is
+@code{BITS_PER_UNIT}.
+@end defmac
+
+@defmac FRACT_TYPE_SIZE
+A C expression for the size in bits of the type @code{_Fract} on
+the target machine.  If you don't define this, the default is
+@code{BITS_PER_UNIT * 2}.
+@end defmac
+
+@defmac LONG_FRACT_TYPE_SIZE
+A C expression for the size in bits of the type @code{long _Fract} on
+the target machine.  If you don't define this, the default is
+@code{BITS_PER_UNIT * 4}.
+@end defmac
+
+@defmac LONG_LONG_FRACT_TYPE_SIZE
+A C expression for the size in bits of the type @code{long long _Fract} on
+the target machine.  If you don't define this, the default is
+@code{BITS_PER_UNIT * 8}.
+@end defmac
+
+@defmac SHORT_ACCUM_TYPE_SIZE
+A C expression for the size in bits of the type @code{short _Accum} on
+the target machine.  If you don't define this, the default is
+@code{BITS_PER_UNIT * 2}.
+@end defmac
+
+@defmac ACCUM_TYPE_SIZE
+A C expression for the size in bits of the type @code{_Accum} on
+the target machine.  If you don't define this, the default is
+@code{BITS_PER_UNIT * 4}.
+@end defmac
+
+@defmac LONG_ACCUM_TYPE_SIZE
+A C expression for the size in bits of the type @code{long _Accum} on
+the target machine.  If you don't define this, the default is
+@code{BITS_PER_UNIT * 8}.
+@end defmac
+
+@defmac LONG_LONG_ACCUM_TYPE_SIZE
+A C expression for the size in bits of the type @code{long long _Accum} on
+the target machine.  If you don't define this, the default is
+@code{BITS_PER_UNIT * 16}.
+@end defmac
+
+@defmac LIBGCC2_LONG_DOUBLE_TYPE_SIZE
+Define this macro if @code{LONG_DOUBLE_TYPE_SIZE} is not constant or
+if you want routines in @file{libgcc2.a} for a size other than
+@code{LONG_DOUBLE_TYPE_SIZE}.  If you don't define this, the
+default is @code{LONG_DOUBLE_TYPE_SIZE}.
+@end defmac
+
+@defmac LIBGCC2_HAS_DF_MODE
+Define this macro if neither @code{DOUBLE_TYPE_SIZE} nor
+@code{LIBGCC2_LONG_DOUBLE_TYPE_SIZE} is
+@code{DFmode} but you want @code{DFmode} routines in @file{libgcc2.a}
+anyway.  If you don't define this and either @code{DOUBLE_TYPE_SIZE}
+or @code{LIBGCC2_LONG_DOUBLE_TYPE_SIZE} is 64 then the default is 1,
+otherwise it is 0.
+@end defmac
+
+@defmac LIBGCC2_HAS_XF_MODE
+Define this macro if @code{LIBGCC2_LONG_DOUBLE_TYPE_SIZE} is not
+@code{XFmode} but you want @code{XFmode} routines in @file{libgcc2.a}
+anyway.  If you don't define this and @code{LIBGCC2_LONG_DOUBLE_TYPE_SIZE}
+is 80 then the default is 1, otherwise it is 0.
+@end defmac
+
+@defmac LIBGCC2_HAS_TF_MODE
+Define this macro if @code{LIBGCC2_LONG_DOUBLE_TYPE_SIZE} is not
+@code{TFmode} but you want @code{TFmode} routines in @file{libgcc2.a}
+anyway.  If you don't define this and @code{LIBGCC2_LONG_DOUBLE_TYPE_SIZE}
+is 128 then the default is 1, otherwise it is 0.
+@end defmac
+
+@defmac SF_SIZE
+@defmacx DF_SIZE
+@defmacx XF_SIZE
+@defmacx TF_SIZE
+Define these macros to be the size in bits of the mantissa of
+@code{SFmode}, @code{DFmode}, @code{XFmode} and @code{TFmode} values,
+if the defaults in @file{libgcc2.h} are inappropriate.  By default,
+@code{FLT_MANT_DIG} is used for @code{SF_SIZE}, @code{LDBL_MANT_DIG}
+for @code{XF_SIZE} and @code{TF_SIZE}, and @code{DBL_MANT_DIG} or
+@code{LDBL_MANT_DIG} for @code{DF_SIZE} according to whether
+@code{DOUBLE_TYPE_SIZE} or
+@code{LIBGCC2_LONG_DOUBLE_TYPE_SIZE} is 64.
+@end defmac
+
+@defmac TARGET_FLT_EVAL_METHOD
+A C expression for the value for @code{FLT_EVAL_METHOD} in @file{float.h},
+assuming, if applicable, that the floating-point control word is in its
+default state.  If you do not define this macro the value of
+@code{FLT_EVAL_METHOD} will be zero.
+@end defmac
+
+@defmac WIDEST_HARDWARE_FP_SIZE
+A C expression for the size in bits of the widest floating-point format
+supported by the hardware.  If you define this macro, you must specify a
+value less than or equal to the value of @code{LONG_DOUBLE_TYPE_SIZE}.
+If you do not define this macro, the value of @code{LONG_DOUBLE_TYPE_SIZE}
+is the default.
+@end defmac
+
+@defmac DEFAULT_SIGNED_CHAR
+An expression whose value is 1 or 0, according to whether the type
+@code{char} should be signed or unsigned by default.  The user can
+always override this default with the options @option{-fsigned-char}
+and @option{-funsigned-char}.
+@end defmac
+
+@deftypefn {Target Hook} bool TARGET_DEFAULT_SHORT_ENUMS (void)
+This target hook should return true if the compiler should give an
+@code{enum} type only as many bytes as it takes to represent the range
+of possible values of that type.  It should return false if all
+@code{enum} types should be allocated like @code{int}.
+
+The default is to return false.
+@end deftypefn
+
+@defmac SIZE_TYPE
+A C expression for a string describing the name of the data type to use
+for size values.  The typedef name @code{size_t} is defined using the
+contents of the string.
+
+The string can contain more than one keyword.  If so, separate them with
+spaces, and write first any length keyword, then @code{unsigned} if
+appropriate, and finally @code{int}.  The string must exactly match one
+of the data type names defined in the function
+@code{init_decl_processing} in the file @file{c-decl.c}.  You may not
+omit @code{int} or change the order---that would cause the compiler to
+crash on startup.
+
+If you don't define this macro, the default is @code{"long unsigned
+int"}.
+@end defmac
+
+@defmac PTRDIFF_TYPE
+A C expression for a string describing the name of the data type to use
+for the result of subtracting two pointers.  The typedef name
+@code{ptrdiff_t} is defined using the contents of the string.  See
+@code{SIZE_TYPE} above for more information.
+
+If you don't define this macro, the default is @code{"long int"}.
+@end defmac
+
+@defmac WCHAR_TYPE
+A C expression for a string describing the name of the data type to use
+for wide characters.  The typedef name @code{wchar_t} is defined using
+the contents of the string.  See @code{SIZE_TYPE} above for more
+information.
+
+If you don't define this macro, the default is @code{"int"}.
+@end defmac
+
+@defmac WCHAR_TYPE_SIZE
+A C expression for the size in bits of the data type for wide
+characters.  This is used in @code{cpp}, which cannot make use of
+@code{WCHAR_TYPE}.
+@end defmac
+
+@defmac WINT_TYPE
+A C expression for a string describing the name of the data type to
+use for wide characters passed to @code{printf} and returned from
+@code{getwc}.  The typedef name @code{wint_t} is defined using the
+contents of the string.  See @code{SIZE_TYPE} above for more
+information.
+
+If you don't define this macro, the default is @code{"unsigned int"}.
+@end defmac
+
+@defmac INTMAX_TYPE
+A C expression for a string describing the name of the data type that
+can represent any value of any standard or extended signed integer type.
+The typedef name @code{intmax_t} is defined using the contents of the
+string.  See @code{SIZE_TYPE} above for more information.
+
+If you don't define this macro, the default is the first of
+@code{"int"}, @code{"long int"}, or @code{"long long int"} that has as
+much precision as @code{long long int}.
+@end defmac
+
+@defmac UINTMAX_TYPE
+A C expression for a string describing the name of the data type that
+can represent any value of any standard or extended unsigned integer
+type.  The typedef name @code{uintmax_t} is defined using the contents
+of the string.  See @code{SIZE_TYPE} above for more information.
+
+If you don't define this macro, the default is the first of
+@code{"unsigned int"}, @code{"long unsigned int"}, or @code{"long long
+unsigned int"} that has as much precision as @code{long long unsigned
+int}.
+@end defmac
+
+@defmac SIG_ATOMIC_TYPE
+@defmacx INT8_TYPE
+@defmacx INT16_TYPE
+@defmacx INT32_TYPE
+@defmacx INT64_TYPE
+@defmacx UINT8_TYPE
+@defmacx UINT16_TYPE
+@defmacx UINT32_TYPE
+@defmacx UINT64_TYPE
+@defmacx INT_LEAST8_TYPE
+@defmacx INT_LEAST16_TYPE
+@defmacx INT_LEAST32_TYPE
+@defmacx INT_LEAST64_TYPE
+@defmacx UINT_LEAST8_TYPE
+@defmacx UINT_LEAST16_TYPE
+@defmacx UINT_LEAST32_TYPE
+@defmacx UINT_LEAST64_TYPE
+@defmacx INT_FAST8_TYPE
+@defmacx INT_FAST16_TYPE
+@defmacx INT_FAST32_TYPE
+@defmacx INT_FAST64_TYPE
+@defmacx UINT_FAST8_TYPE
+@defmacx UINT_FAST16_TYPE
+@defmacx UINT_FAST32_TYPE
+@defmacx UINT_FAST64_TYPE
+@defmacx INTPTR_TYPE
+@defmacx UINTPTR_TYPE
+C expressions for the standard types @code{sig_atomic_t},
+@code{int8_t}, @code{int16_t}, @code{int32_t}, @code{int64_t},
+@code{uint8_t}, @code{uint16_t}, @code{uint32_t}, @code{uint64_t},
+@code{int_least8_t}, @code{int_least16_t}, @code{int_least32_t},
+@code{int_least64_t}, @code{uint_least8_t}, @code{uint_least16_t},
+@code{uint_least32_t}, @code{uint_least64_t}, @code{int_fast8_t},
+@code{int_fast16_t}, @code{int_fast32_t}, @code{int_fast64_t},
+@code{uint_fast8_t}, @code{uint_fast16_t}, @code{uint_fast32_t},
+@code{uint_fast64_t}, @code{intptr_t}, and @code{uintptr_t}.  See
+@code{SIZE_TYPE} above for more information.
+
+If any of these macros evaluates to a null pointer, the corresponding
+type is not supported; if GCC is configured to provide
+@code{<stdint.h>} in such a case, the header provided may not conform
+to C99, depending on the type in question.  The defaults for all of
+these macros are null pointers.
+@end defmac
+
+@defmac TARGET_PTRMEMFUNC_VBIT_LOCATION
+The C++ compiler represents a pointer-to-member-function with a struct
+that looks like:
+
+@smallexample
+  struct @{
+    union @{
+      void (*fn)();
+      ptrdiff_t vtable_index;
+    @};
+    ptrdiff_t delta;
+  @};
+@end smallexample
+
+@noindent
+The C++ compiler must use one bit to indicate whether the function that
+will be called through a pointer-to-member-function is virtual.
+Normally, we assume that the low-order bit of a function pointer must
+always be zero.  Then, by ensuring that the vtable_index is odd, we can
+distinguish which variant of the union is in use.  But, on some
+platforms function pointers can be odd, and so this doesn't work.  In
+that case, we use the low-order bit of the @code{delta} field, and shift
+the remainder of the @code{delta} field to the left.
+
+GCC will automatically make the right selection about where to store
+this bit using the @code{FUNCTION_BOUNDARY} setting for your platform.
+However, some platforms such as ARM/Thumb have @code{FUNCTION_BOUNDARY}
+set such that functions always start at even addresses, but the lowest
+bit of pointers to functions indicate whether the function at that
+address is in ARM or Thumb mode.  If this is the case of your
+architecture, you should define this macro to
+@code{ptrmemfunc_vbit_in_delta}.
+
+In general, you should not have to define this macro.  On architectures
+in which function addresses are always even, according to
+@code{FUNCTION_BOUNDARY}, GCC will automatically define this macro to
+@code{ptrmemfunc_vbit_in_pfn}.
+@end defmac
+
+@defmac TARGET_VTABLE_USES_DESCRIPTORS
+Normally, the C++ compiler uses function pointers in vtables.  This
+macro allows the target to change to use ``function descriptors''
+instead.  Function descriptors are found on targets for whom a
+function pointer is actually a small data structure.  Normally the
+data structure consists of the actual code address plus a data
+pointer to which the function's data is relative.
+
+If vtables are used, the value of this macro should be the number
+of words that the function descriptor occupies.
+@end defmac
+
+@defmac TARGET_VTABLE_ENTRY_ALIGN
+By default, the vtable entries are void pointers, the so the alignment
+is the same as pointer alignment.  The value of this macro specifies
+the alignment of the vtable entry in bits.  It should be defined only
+when special alignment is necessary. */
+@end defmac
+
+@defmac TARGET_VTABLE_DATA_ENTRY_DISTANCE
+There are a few non-descriptor entries in the vtable at offsets below
+zero.  If these entries must be padded (say, to preserve the alignment
+specified by @code{TARGET_VTABLE_ENTRY_ALIGN}), set this to the number
+of words in each data entry.
+@end defmac
+
+@node Registers
+@section Register Usage
+@cindex register usage
+
+This section explains how to describe what registers the target machine
+has, and how (in general) they can be used.
+
+The description of which registers a specific instruction can use is
+done with register classes; see @ref{Register Classes}.  For information
+on using registers to access a stack frame, see @ref{Frame Registers}.
+For passing values in registers, see @ref{Register Arguments}.
+For returning values in registers, see @ref{Scalar Return}.
+
+@menu
+* Register Basics::             Number and kinds of registers.
+* Allocation Order::            Order in which registers are allocated.
+* Values in Registers::         What kinds of values each reg can hold.
+* Leaf Functions::              Renumbering registers for leaf functions.
+* Stack Registers::             Handling a register stack such as 80387.
+@end menu
+
+@node Register Basics
+@subsection Basic Characteristics of Registers
+
+@c prevent bad page break with this line
+Registers have various characteristics.
+
+@defmac FIRST_PSEUDO_REGISTER
+Number of hardware registers known to the compiler.  They receive
+numbers 0 through @code{FIRST_PSEUDO_REGISTER-1}; thus, the first
+pseudo register's number really is assigned the number
+@code{FIRST_PSEUDO_REGISTER}.
+@end defmac
+
+@defmac FIXED_REGISTERS
+@cindex fixed register
+An initializer that says which registers are used for fixed purposes
+all throughout the compiled code and are therefore not available for
+general allocation.  These would include the stack pointer, the frame
+pointer (except on machines where that can be used as a general
+register when no frame pointer is needed), the program counter on
+machines where that is considered one of the addressable registers,
+and any other numbered register with a standard use.
+
+This information is expressed as a sequence of numbers, separated by
+commas and surrounded by braces.  The @var{n}th number is 1 if
+register @var{n} is fixed, 0 otherwise.
+
+The table initialized from this macro, and the table initialized by
+the following one, may be overridden at run time either automatically,
+by the actions of the macro @code{CONDITIONAL_REGISTER_USAGE}, or by
+the user with the command options @option{-ffixed-@var{reg}},
+@option{-fcall-used-@var{reg}} and @option{-fcall-saved-@var{reg}}.
+@end defmac
+
+@defmac CALL_USED_REGISTERS
+@cindex call-used register
+@cindex call-clobbered register
+@cindex call-saved register
+Like @code{FIXED_REGISTERS} but has 1 for each register that is
+clobbered (in general) by function calls as well as for fixed
+registers.  This macro therefore identifies the registers that are not
+available for general allocation of values that must live across
+function calls.
+
+If a register has 0 in @code{CALL_USED_REGISTERS}, the compiler
+automatically saves it on function entry and restores it on function
+exit, if the register is used within the function.
+@end defmac
+
+@defmac CALL_REALLY_USED_REGISTERS
+@cindex call-used register
+@cindex call-clobbered register
+@cindex call-saved register
+Like @code{CALL_USED_REGISTERS} except this macro doesn't require
+that the entire set of @code{FIXED_REGISTERS} be included.
+(@code{CALL_USED_REGISTERS} must be a superset of @code{FIXED_REGISTERS}).
+This macro is optional.  If not specified, it defaults to the value
+of @code{CALL_USED_REGISTERS}.
+@end defmac
+
+@defmac HARD_REGNO_CALL_PART_CLOBBERED (@var{regno}, @var{mode})
+@cindex call-used register
+@cindex call-clobbered register
+@cindex call-saved register
+A C expression that is nonzero if it is not permissible to store a
+value of mode @var{mode} in hard register number @var{regno} across a
+call without some part of it being clobbered.  For most machines this
+macro need not be defined.  It is only required for machines that do not
+preserve the entire contents of a register across a call.
+@end defmac
+
+@findex fixed_regs
+@findex call_used_regs
+@findex global_regs
+@findex reg_names
+@findex reg_class_contents
+@deftypefn {Target Hook} void TARGET_CONDITIONAL_REGISTER_USAGE (void)
+This hook may conditionally modify five variables
+@code{fixed_regs}, @code{call_used_regs}, @code{global_regs},
+@code{reg_names}, and @code{reg_class_contents}, to take into account
+any dependence of these register sets on target flags.  The first three
+of these are of type @code{char []} (interpreted as Boolean vectors).
+@code{global_regs} is a @code{const char *[]}, and
+@code{reg_class_contents} is a @code{HARD_REG_SET}.  Before the macro is
+called, @code{fixed_regs}, @code{call_used_regs},
+@code{reg_class_contents}, and @code{reg_names} have been initialized
+from @code{FIXED_REGISTERS}, @code{CALL_USED_REGISTERS},
+@code{REG_CLASS_CONTENTS}, and @code{REGISTER_NAMES}, respectively.
+@code{global_regs} has been cleared, and any @option{-ffixed-@var{reg}},
+@option{-fcall-used-@var{reg}} and @option{-fcall-saved-@var{reg}}
+command options have been applied.
+
+@cindex disabling certain registers
+@cindex controlling register usage
+If the usage of an entire class of registers depends on the target
+flags, you may indicate this to GCC by using this macro to modify
+@code{fixed_regs} and @code{call_used_regs} to 1 for each of the
+registers in the classes which should not be used by GCC@.  Also define
+the macro @code{REG_CLASS_FROM_LETTER} / @code{REG_CLASS_FROM_CONSTRAINT}
+to return @code{NO_REGS} if it
+is called with a letter for a class that shouldn't be used.
+
+(However, if this class is not included in @code{GENERAL_REGS} and all
+of the insn patterns whose constraints permit this class are
+controlled by target switches, then GCC will automatically avoid using
+these registers when the target switches are opposed to them.)
+@end deftypefn
+
+@defmac INCOMING_REGNO (@var{out})
+Define this macro if the target machine has register windows.  This C
+expression returns the register number as seen by the called function
+corresponding to the register number @var{out} as seen by the calling
+function.  Return @var{out} if register number @var{out} is not an
+outbound register.
+@end defmac
+
+@defmac OUTGOING_REGNO (@var{in})
+Define this macro if the target machine has register windows.  This C
+expression returns the register number as seen by the calling function
+corresponding to the register number @var{in} as seen by the called
+function.  Return @var{in} if register number @var{in} is not an inbound
+register.
+@end defmac
+
+@defmac LOCAL_REGNO (@var{regno})
+Define this macro if the target machine has register windows.  This C
+expression returns true if the register is call-saved but is in the
+register window.  Unlike most call-saved registers, such registers
+need not be explicitly restored on function exit or during non-local
+gotos.
+@end defmac
+
+@defmac PC_REGNUM
+If the program counter has a register number, define this as that
+register number.  Otherwise, do not define it.
+@end defmac
+
+@node Allocation Order
+@subsection Order of Allocation of Registers
+@cindex order of register allocation
+@cindex register allocation order
+
+@c prevent bad page break with this line
+Registers are allocated in order.
+
+@defmac REG_ALLOC_ORDER
+If defined, an initializer for a vector of integers, containing the
+numbers of hard registers in the order in which GCC should prefer
+to use them (from most preferred to least).
+
+If this macro is not defined, registers are used lowest numbered first
+(all else being equal).
+
+One use of this macro is on machines where the highest numbered
+registers must always be saved and the save-multiple-registers
+instruction supports only sequences of consecutive registers.  On such
+machines, define @code{REG_ALLOC_ORDER} to be an initializer that lists
+the highest numbered allocable register first.
+@end defmac
+
+@defmac ADJUST_REG_ALLOC_ORDER
+A C statement (sans semicolon) to choose the order in which to allocate
+hard registers for pseudo-registers local to a basic block.
+
+Store the desired register order in the array @code{reg_alloc_order}.
+Element 0 should be the register to allocate first; element 1, the next
+register; and so on.
+
+The macro body should not assume anything about the contents of
+@code{reg_alloc_order} before execution of the macro.
+
+On most machines, it is not necessary to define this macro.
+@end defmac
+
+@defmac HONOR_REG_ALLOC_ORDER
+Normally, IRA tries to estimate the costs for saving a register in the
+prologue and restoring it in the epilogue.  This discourages it from
+using call-saved registers.  If a machine wants to ensure that IRA
+allocates registers in the order given by REG_ALLOC_ORDER even if some
+call-saved registers appear earlier than call-used ones, this macro
+should be defined.
+@end defmac
+
+@defmac IRA_HARD_REGNO_ADD_COST_MULTIPLIER (@var{regno})
+In some case register allocation order is not enough for the
+Integrated Register Allocator (@acronym{IRA}) to generate a good code.
+If this macro is defined, it should return a floating point value
+based on @var{regno}.  The cost of using @var{regno} for a pseudo will
+be increased by approximately the pseudo's usage frequency times the
+value returned by this macro.  Not defining this macro is equivalent
+to having it always return @code{0.0}.
+
+On most machines, it is not necessary to define this macro.
+@end defmac
+
+@node Values in Registers
+@subsection How Values Fit in Registers
+
+This section discusses the macros that describe which kinds of values
+(specifically, which machine modes) each register can hold, and how many
+consecutive registers are needed for a given mode.
+
+@defmac HARD_REGNO_NREGS (@var{regno}, @var{mode})
+A C expression for the number of consecutive hard registers, starting
+at register number @var{regno}, required to hold a value of mode
+@var{mode}.  This macro must never return zero, even if a register
+cannot hold the requested mode - indicate that with HARD_REGNO_MODE_OK
+and/or CANNOT_CHANGE_MODE_CLASS instead.
+
+On a machine where all registers are exactly one word, a suitable
+definition of this macro is
+
+@smallexample
+#define HARD_REGNO_NREGS(REGNO, MODE)            \
+   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1)  \
+    / UNITS_PER_WORD)
+@end smallexample
+@end defmac
+
+@defmac HARD_REGNO_NREGS_HAS_PADDING (@var{regno}, @var{mode})
+A C expression that is nonzero if a value of mode @var{mode}, stored
+in memory, ends with padding that causes it to take up more space than
+in registers starting at register number @var{regno} (as determined by
+multiplying GCC's notion of the size of the register when containing
+this mode by the number of registers returned by
+@code{HARD_REGNO_NREGS}).  By default this is zero.
+
+For example, if a floating-point value is stored in three 32-bit
+registers but takes up 128 bits in memory, then this would be
+nonzero.
+
+This macros only needs to be defined if there are cases where
+@code{subreg_get_info}
+would otherwise wrongly determine that a @code{subreg} can be
+represented by an offset to the register number, when in fact such a
+@code{subreg} would contain some of the padding not stored in
+registers and so not be representable.
+@end defmac
+
+@defmac HARD_REGNO_NREGS_WITH_PADDING (@var{regno}, @var{mode})
+For values of @var{regno} and @var{mode} for which
+@code{HARD_REGNO_NREGS_HAS_PADDING} returns nonzero, a C expression
+returning the greater number of registers required to hold the value
+including any padding.  In the example above, the value would be four.
+@end defmac
+
+@defmac REGMODE_NATURAL_SIZE (@var{mode})
+Define this macro if the natural size of registers that hold values
+of mode @var{mode} is not the word size.  It is a C expression that
+should give the natural size in bytes for the specified mode.  It is
+used by the register allocator to try to optimize its results.  This
+happens for example on SPARC 64-bit where the natural size of
+floating-point registers is still 32-bit.
+@end defmac
+
+@defmac HARD_REGNO_MODE_OK (@var{regno}, @var{mode})
+A C expression that is nonzero if it is permissible to store a value
+of mode @var{mode} in hard register number @var{regno} (or in several
+registers starting with that one).  For a machine where all registers
+are equivalent, a suitable definition is
+
+@smallexample
+#define HARD_REGNO_MODE_OK(REGNO, MODE) 1
+@end smallexample
+
+You need not include code to check for the numbers of fixed registers,
+because the allocation mechanism considers them to be always occupied.
+
+@cindex register pairs
+On some machines, double-precision values must be kept in even/odd
+register pairs.  You can implement that by defining this macro to reject
+odd register numbers for such modes.
+
+The minimum requirement for a mode to be OK in a register is that the
+@samp{mov@var{mode}} instruction pattern support moves between the
+register and other hard register in the same class and that moving a
+value into the register and back out not alter it.
+
+Since the same instruction used to move @code{word_mode} will work for
+all narrower integer modes, it is not necessary on any machine for
+@code{HARD_REGNO_MODE_OK} to distinguish between these modes, provided
+you define patterns @samp{movhi}, etc., to take advantage of this.  This
+is useful because of the interaction between @code{HARD_REGNO_MODE_OK}
+and @code{MODES_TIEABLE_P}; it is very desirable for all integer modes
+to be tieable.
+
+Many machines have special registers for floating point arithmetic.
+Often people assume that floating point machine modes are allowed only
+in floating point registers.  This is not true.  Any registers that
+can hold integers can safely @emph{hold} a floating point machine
+mode, whether or not floating arithmetic can be done on it in those
+registers.  Integer move instructions can be used to move the values.
+
+On some machines, though, the converse is true: fixed-point machine
+modes may not go in floating registers.  This is true if the floating
+registers normalize any value stored in them, because storing a
+non-floating value there would garble it.  In this case,
+@code{HARD_REGNO_MODE_OK} should reject fixed-point machine modes in
+floating registers.  But if the floating registers do not automatically
+normalize, if you can store any bit pattern in one and retrieve it
+unchanged without a trap, then any machine mode may go in a floating
+register, so you can define this macro to say so.
+
+The primary significance of special floating registers is rather that
+they are the registers acceptable in floating point arithmetic
+instructions.  However, this is of no concern to
+@code{HARD_REGNO_MODE_OK}.  You handle it by writing the proper
+constraints for those instructions.
+
+On some machines, the floating registers are especially slow to access,
+so that it is better to store a value in a stack frame than in such a
+register if floating point arithmetic is not being done.  As long as the
+floating registers are not in class @code{GENERAL_REGS}, they will not
+be used unless some pattern's constraint asks for one.
+@end defmac
+
+@defmac HARD_REGNO_RENAME_OK (@var{from}, @var{to})
+A C expression that is nonzero if it is OK to rename a hard register
+@var{from} to another hard register @var{to}.
+
+One common use of this macro is to prevent renaming of a register to
+another register that is not saved by a prologue in an interrupt
+handler.
+
+The default is always nonzero.
+@end defmac
+
+@defmac MODES_TIEABLE_P (@var{mode1}, @var{mode2})
+A C expression that is nonzero if a value of mode
+@var{mode1} is accessible in mode @var{mode2} without copying.
+
+If @code{HARD_REGNO_MODE_OK (@var{r}, @var{mode1})} and
+@code{HARD_REGNO_MODE_OK (@var{r}, @var{mode2})} are always the same for
+any @var{r}, then @code{MODES_TIEABLE_P (@var{mode1}, @var{mode2})}
+should be nonzero.  If they differ for any @var{r}, you should define
+this macro to return zero unless some other mechanism ensures the
+accessibility of the value in a narrower mode.
+
+You should define this macro to return nonzero in as many cases as
+possible since doing so will allow GCC to perform better register
+allocation.
+@end defmac
+
+@deftypefn {Target Hook} bool TARGET_HARD_REGNO_SCRATCH_OK (unsigned int @var{regno})
+This target hook should return @code{true} if it is OK to use a hard register
+@var{regno} as scratch reg in peephole2.
+
+One common use of this macro is to prevent using of a register that
+is not saved by a prologue in an interrupt handler.
+
+The default version of this hook always returns @code{true}.
+@end deftypefn
+
+@defmac AVOID_CCMODE_COPIES
+Define this macro if the compiler should avoid copies to/from @code{CCmode}
+registers.  You should only define this macro if support for copying to/from
+@code{CCmode} is incomplete.
+@end defmac
+
+@node Leaf Functions
+@subsection Handling Leaf Functions
+
+@cindex leaf functions
+@cindex functions, leaf
+On some machines, a leaf function (i.e., one which makes no calls) can run
+more efficiently if it does not make its own register window.  Often this
+means it is required to receive its arguments in the registers where they
+are passed by the caller, instead of the registers where they would
+normally arrive.
+
+The special treatment for leaf functions generally applies only when
+other conditions are met; for example, often they may use only those
+registers for its own variables and temporaries.  We use the term ``leaf
+function'' to mean a function that is suitable for this special
+handling, so that functions with no calls are not necessarily ``leaf
+functions''.
+
+GCC assigns register numbers before it knows whether the function is
+suitable for leaf function treatment.  So it needs to renumber the
+registers in order to output a leaf function.  The following macros
+accomplish this.
+
+@defmac LEAF_REGISTERS
+Name of a char vector, indexed by hard register number, which
+contains 1 for a register that is allowable in a candidate for leaf
+function treatment.
+
+If leaf function treatment involves renumbering the registers, then the
+registers marked here should be the ones before renumbering---those that
+GCC would ordinarily allocate.  The registers which will actually be
+used in the assembler code, after renumbering, should not be marked with 1
+in this vector.
+
+Define this macro only if the target machine offers a way to optimize
+the treatment of leaf functions.
+@end defmac
+
+@defmac LEAF_REG_REMAP (@var{regno})
+A C expression whose value is the register number to which @var{regno}
+should be renumbered, when a function is treated as a leaf function.
+
+If @var{regno} is a register number which should not appear in a leaf
+function before renumbering, then the expression should yield @minus{}1, which
+will cause the compiler to abort.
+
+Define this macro only if the target machine offers a way to optimize the
+treatment of leaf functions, and registers need to be renumbered to do
+this.
+@end defmac
+
+@findex current_function_is_leaf
+@findex current_function_uses_only_leaf_regs
+@code{TARGET_ASM_FUNCTION_PROLOGUE} and
+@code{TARGET_ASM_FUNCTION_EPILOGUE} must usually treat leaf functions
+specially.  They can test the C variable @code{current_function_is_leaf}
+which is nonzero for leaf functions.  @code{current_function_is_leaf} is
+set prior to local register allocation and is valid for the remaining
+compiler passes.  They can also test the C variable
+@code{current_function_uses_only_leaf_regs} which is nonzero for leaf
+functions which only use leaf registers.
+@code{current_function_uses_only_leaf_regs} is valid after all passes
+that modify the instructions have been run and is only useful if
+@code{LEAF_REGISTERS} is defined.
+@c changed this to fix overfull.  ALSO:  why the "it" at the beginning
+@c of the next paragraph?!  --mew 2feb93
+
+@node Stack Registers
+@subsection Registers That Form a Stack
+
+There are special features to handle computers where some of the
+``registers'' form a stack.  Stack registers are normally written by
+pushing onto the stack, and are numbered relative to the top of the
+stack.
+
+Currently, GCC can only handle one group of stack-like registers, and
+they must be consecutively numbered.  Furthermore, the existing
+support for stack-like registers is specific to the 80387 floating
+point coprocessor.  If you have a new architecture that uses
+stack-like registers, you will need to do substantial work on
+@file{reg-stack.c} and write your machine description to cooperate
+with it, as well as defining these macros.
+
+@defmac STACK_REGS
+Define this if the machine has any stack-like registers.
+@end defmac
+
+@defmac STACK_REG_COVER_CLASS
+This is a cover class containing the stack registers.  Define this if
+the machine has any stack-like registers.
+@end defmac
+
+@defmac FIRST_STACK_REG
+The number of the first stack-like register.  This one is the top
+of the stack.
+@end defmac
+
+@defmac LAST_STACK_REG
+The number of the last stack-like register.  This one is the bottom of
+the stack.
+@end defmac
+
+@node Register Classes
+@section Register Classes
+@cindex register class definitions
+@cindex class definitions, register
+
+On many machines, the numbered registers are not all equivalent.
+For example, certain registers may not be allowed for indexed addressing;
+certain registers may not be allowed in some instructions.  These machine
+restrictions are described to the compiler using @dfn{register classes}.
+
+You define a number of register classes, giving each one a name and saying
+which of the registers belong to it.  Then you can specify register classes
+that are allowed as operands to particular instruction patterns.
+
+@findex ALL_REGS
+@findex NO_REGS
+In general, each register will belong to several classes.  In fact, one
+class must be named @code{ALL_REGS} and contain all the registers.  Another
+class must be named @code{NO_REGS} and contain no registers.  Often the
+union of two classes will be another class; however, this is not required.
+
+@findex GENERAL_REGS
+One of the classes must be named @code{GENERAL_REGS}.  There is nothing
+terribly special about the name, but the operand constraint letters
+@samp{r} and @samp{g} specify this class.  If @code{GENERAL_REGS} is
+the same as @code{ALL_REGS}, just define it as a macro which expands
+to @code{ALL_REGS}.
+
+Order the classes so that if class @var{x} is contained in class @var{y}
+then @var{x} has a lower class number than @var{y}.
+
+The way classes other than @code{GENERAL_REGS} are specified in operand
+constraints is through machine-dependent operand constraint letters.
+You can define such letters to correspond to various classes, then use
+them in operand constraints.
+
+You should define a class for the union of two classes whenever some
+instruction allows both classes.  For example, if an instruction allows
+either a floating point (coprocessor) register or a general register for a
+certain operand, you should define a class @code{FLOAT_OR_GENERAL_REGS}
+which includes both of them.  Otherwise you will get suboptimal code,
+or even internal compiler errors when reload cannot find a register in the
+the class computed via @code{reg_class_subunion}.
+
+You must also specify certain redundant information about the register
+classes: for each class, which classes contain it and which ones are
+contained in it; for each pair of classes, the largest class contained
+in their union.
+
+When a value occupying several consecutive registers is expected in a
+certain class, all the registers used must belong to that class.
+Therefore, register classes cannot be used to enforce a requirement for
+a register pair to start with an even-numbered register.  The way to
+specify this requirement is with @code{HARD_REGNO_MODE_OK}.
+
+Register classes used for input-operands of bitwise-and or shift
+instructions have a special requirement: each such class must have, for
+each fixed-point machine mode, a subclass whose registers can transfer that
+mode to or from memory.  For example, on some machines, the operations for
+single-byte values (@code{QImode}) are limited to certain registers.  When
+this is so, each register class that is used in a bitwise-and or shift
+instruction must have a subclass consisting of registers from which
+single-byte values can be loaded or stored.  This is so that
+@code{PREFERRED_RELOAD_CLASS} can always have a possible value to return.
+
+@deftp {Data type} {enum reg_class}
+An enumerated type that must be defined with all the register class names
+as enumerated values.  @code{NO_REGS} must be first.  @code{ALL_REGS}
+must be the last register class, followed by one more enumerated value,
+@code{LIM_REG_CLASSES}, which is not a register class but rather
+tells how many classes there are.
+
+Each register class has a number, which is the value of casting
+the class name to type @code{int}.  The number serves as an index
+in many of the tables described below.
+@end deftp
+
+@defmac N_REG_CLASSES
+The number of distinct register classes, defined as follows:
+
+@smallexample
+#define N_REG_CLASSES (int) LIM_REG_CLASSES
+@end smallexample
+@end defmac
+
+@defmac REG_CLASS_NAMES
+An initializer containing the names of the register classes as C string
+constants.  These names are used in writing some of the debugging dumps.
+@end defmac
+
+@defmac REG_CLASS_CONTENTS
+An initializer containing the contents of the register classes, as integers
+which are bit masks.  The @var{n}th integer specifies the contents of class
+@var{n}.  The way the integer @var{mask} is interpreted is that
+register @var{r} is in the class if @code{@var{mask} & (1 << @var{r})} is 1.
+
+When the machine has more than 32 registers, an integer does not suffice.
+Then the integers are replaced by sub-initializers, braced groupings containing
+several integers.  Each sub-initializer must be suitable as an initializer
+for the type @code{HARD_REG_SET} which is defined in @file{hard-reg-set.h}.
+In this situation, the first integer in each sub-initializer corresponds to
+registers 0 through 31, the second integer to registers 32 through 63, and
+so on.
+@end defmac
+
+@defmac REGNO_REG_CLASS (@var{regno})
+A C expression whose value is a register class containing hard register
+@var{regno}.  In general there is more than one such class; choose a class
+which is @dfn{minimal}, meaning that no smaller class also contains the
+register.
+@end defmac
+
+@defmac BASE_REG_CLASS
+A macro whose definition is the name of the class to which a valid
+base register must belong.  A base register is one used in an address
+which is the register value plus a displacement.
+@end defmac
+
+@defmac MODE_BASE_REG_CLASS (@var{mode})
+This is a variation of the @code{BASE_REG_CLASS} macro which allows
+the selection of a base register in a mode dependent manner.  If
+@var{mode} is VOIDmode then it should return the same value as
+@code{BASE_REG_CLASS}.
+@end defmac
+
+@defmac MODE_BASE_REG_REG_CLASS (@var{mode})
+A C expression whose value is the register class to which a valid
+base register must belong in order to be used in a base plus index
+register address.  You should define this macro if base plus index
+addresses have different requirements than other base register uses.
+@end defmac
+
+@defmac MODE_CODE_BASE_REG_CLASS (@var{mode}, @var{outer_code}, @var{index_code})
+A C expression whose value is the register class to which a valid
+base register must belong.  @var{outer_code} and @var{index_code} define the
+context in which the base register occurs.  @var{outer_code} is the code of
+the immediately enclosing expression (@code{MEM} for the top level of an
+address, @code{ADDRESS} for something that occurs in an
+@code{address_operand}).  @var{index_code} is the code of the corresponding
+index expression if @var{outer_code} is @code{PLUS}; @code{SCRATCH} otherwise.
+@end defmac
+
+@defmac INDEX_REG_CLASS
+A macro whose definition is the name of the class to which a valid
+index register must belong.  An index register is one used in an
+address where its value is either multiplied by a scale factor or
+added to another register (as well as added to a displacement).
+@end defmac
+
+@defmac REGNO_OK_FOR_BASE_P (@var{num})
+A C expression which is nonzero if register number @var{num} is
+suitable for use as a base register in operand addresses.
+@end defmac
+
+@defmac REGNO_MODE_OK_FOR_BASE_P (@var{num}, @var{mode})
+A C expression that is just like @code{REGNO_OK_FOR_BASE_P}, except that
+that expression may examine the mode of the memory reference in
+@var{mode}.  You should define this macro if the mode of the memory
+reference affects whether a register may be used as a base register.  If
+you define this macro, the compiler will use it instead of
+@code{REGNO_OK_FOR_BASE_P}.  The mode may be @code{VOIDmode} for
+addresses that appear outside a @code{MEM}, i.e., as an
+@code{address_operand}.
+@end defmac
+
+@defmac REGNO_MODE_OK_FOR_REG_BASE_P (@var{num}, @var{mode})
+A C expression which is nonzero if register number @var{num} is suitable for
+use as a base register in base plus index operand addresses, accessing
+memory in mode @var{mode}.  It may be either a suitable hard register or a
+pseudo register that has been allocated such a hard register.  You should
+define this macro if base plus index addresses have different requirements
+than other base register uses.
+
+Use of this macro is deprecated; please use the more general
+@code{REGNO_MODE_CODE_OK_FOR_BASE_P}.
+@end defmac
+
+@defmac REGNO_MODE_CODE_OK_FOR_BASE_P (@var{num}, @var{mode}, @var{outer_code}, @var{index_code})
+A C expression that is just like @code{REGNO_MODE_OK_FOR_BASE_P}, except
+that that expression may examine the context in which the register
+appears in the memory reference.  @var{outer_code} is the code of the
+immediately enclosing expression (@code{MEM} if at the top level of the
+address, @code{ADDRESS} for something that occurs in an
+@code{address_operand}).  @var{index_code} is the code of the
+corresponding index expression if @var{outer_code} is @code{PLUS};
+@code{SCRATCH} otherwise.  The mode may be @code{VOIDmode} for addresses
+that appear outside a @code{MEM}, i.e., as an @code{address_operand}.
+@end defmac
+
+@defmac REGNO_OK_FOR_INDEX_P (@var{num})
+A C expression which is nonzero if register number @var{num} is
+suitable for use as an index register in operand addresses.  It may be
+either a suitable hard register or a pseudo register that has been
+allocated such a hard register.
+
+The difference between an index register and a base register is that
+the index register may be scaled.  If an address involves the sum of
+two registers, neither one of them scaled, then either one may be
+labeled the ``base'' and the other the ``index''; but whichever
+labeling is used must fit the machine's constraints of which registers
+may serve in each capacity.  The compiler will try both labelings,
+looking for one that is valid, and will reload one or both registers
+only if neither labeling works.
+@end defmac
+
+@deftypefn {Target Hook} reg_class_t TARGET_PREFERRED_RENAME_CLASS (reg_class_t @var{rclass})
+A target hook that places additional preference on the register class to use when it is necessary to rename a register in class @var{rclass} to another class, or perhaps @var{NO_REGS}, if no preferred register class is found or hook @code{preferred_rename_class} is not implemented. Sometimes returning a more restrictive class makes better code.  For example, on ARM, thumb-2 instructions using @code{LO_REGS} may be smaller than instructions using @code{GENERIC_REGS}.  By returning @code{LO_REGS} from @code{preferred_rename_class}, code size can be reduced.
+@end deftypefn
+
+@deftypefn {Target Hook} reg_class_t TARGET_PREFERRED_RELOAD_CLASS (rtx @var{x}, reg_class_t @var{rclass})
+A target hook that places additional restrictions on the register class
+to use when it is necessary to copy value @var{x} into a register in class
+@var{rclass}.  The value is a register class; perhaps @var{rclass}, or perhaps
+another, smaller class.
+
+The default version of this hook always returns value of @code{rclass} argument.
+
+Sometimes returning a more restrictive class makes better code.  For
+example, on the 68000, when @var{x} is an integer constant that is in range
+for a @samp{moveq} instruction, the value of this macro is always
+@code{DATA_REGS} as long as @var{rclass} includes the data registers.
+Requiring a data register guarantees that a @samp{moveq} will be used.
+
+One case where @code{TARGET_PREFERRED_RELOAD_CLASS} must not return
+@var{rclass} is if @var{x} is a legitimate constant which cannot be
+loaded into some register class.  By returning @code{NO_REGS} you can
+force @var{x} into a memory location.  For example, rs6000 can load
+immediate values into general-purpose registers, but does not have an
+instruction for loading an immediate value into a floating-point
+register, so @code{TARGET_PREFERRED_RELOAD_CLASS} returns @code{NO_REGS} when
+@var{x} is a floating-point constant.  If the constant can't be loaded
+into any kind of register, code generation will be better if
+@code{LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead
+of using @code{TARGET_PREFERRED_RELOAD_CLASS}.
+
+If an insn has pseudos in it after register allocation, reload will go
+through the alternatives and call repeatedly @code{TARGET_PREFERRED_RELOAD_CLASS}
+to find the best one.  Returning @code{NO_REGS}, in this case, makes
+reload add a @code{!} in front of the constraint: the x86 back-end uses
+this feature to discourage usage of 387 registers when math is done in
+the SSE registers (and vice versa).
+@end deftypefn
+
+@defmac PREFERRED_RELOAD_CLASS (@var{x}, @var{class})
+A C expression that places additional restrictions on the register class
+to use when it is necessary to copy value @var{x} into a register in class
+@var{class}.  The value is a register class; perhaps @var{class}, or perhaps
+another, smaller class.  On many machines, the following definition is
+safe:
+
+@smallexample
+#define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
+@end smallexample
+
+Sometimes returning a more restrictive class makes better code.  For
+example, on the 68000, when @var{x} is an integer constant that is in range
+for a @samp{moveq} instruction, the value of this macro is always
+@code{DATA_REGS} as long as @var{class} includes the data registers.
+Requiring a data register guarantees that a @samp{moveq} will be used.
+
+One case where @code{PREFERRED_RELOAD_CLASS} must not return
+@var{class} is if @var{x} is a legitimate constant which cannot be
+loaded into some register class.  By returning @code{NO_REGS} you can
+force @var{x} into a memory location.  For example, rs6000 can load
+immediate values into general-purpose registers, but does not have an
+instruction for loading an immediate value into a floating-point
+register, so @code{PREFERRED_RELOAD_CLASS} returns @code{NO_REGS} when
+@var{x} is a floating-point constant.  If the constant can't be loaded
+into any kind of register, code generation will be better if
+@code{LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead
+of using @code{PREFERRED_RELOAD_CLASS}.
+
+If an insn has pseudos in it after register allocation, reload will go
+through the alternatives and call repeatedly @code{PREFERRED_RELOAD_CLASS}
+to find the best one.  Returning @code{NO_REGS}, in this case, makes
+reload add a @code{!} in front of the constraint: the x86 back-end uses
+this feature to discourage usage of 387 registers when math is done in
+the SSE registers (and vice versa).
+@end defmac
+
+@defmac PREFERRED_OUTPUT_RELOAD_CLASS (@var{x}, @var{class})
+Like @code{PREFERRED_RELOAD_CLASS}, but for output reloads instead of
+input reloads.  If you don't define this macro, the default is to use
+@var{class}, unchanged.
+
+You can also use @code{PREFERRED_OUTPUT_RELOAD_CLASS} to discourage
+reload from using some alternatives, like @code{PREFERRED_RELOAD_CLASS}.
+@end defmac
+
+@deftypefn {Target Hook} reg_class_t TARGET_PREFERRED_OUTPUT_RELOAD_CLASS (rtx @var{x}, reg_class_t @var{rclass})
+Like @code{TARGET_PREFERRED_RELOAD_CLASS}, but for output reloads instead of
+input reloads.
+
+The default version of this hook always returns value of @code{rclass}
+argument.
+
+You can also use @code{TARGET_PREFERRED_OUTPUT_RELOAD_CLASS} to discourage
+reload from using some alternatives, like @code{TARGET_PREFERRED_RELOAD_CLASS}.
+@end deftypefn
+
+@defmac LIMIT_RELOAD_CLASS (@var{mode}, @var{class})
+A C expression that places additional restrictions on the register class
+to use when it is necessary to be able to hold a value of mode
+@var{mode} in a reload register for which class @var{class} would
+ordinarily be used.
+
+Unlike @code{PREFERRED_RELOAD_CLASS}, this macro should be used when
+there are certain modes that simply can't go in certain reload classes.
+
+The value is a register class; perhaps @var{class}, or perhaps another,
+smaller class.
+
+Don't define this macro unless the target machine has limitations which
+require the macro to do something nontrivial.
+@end defmac
+
+@deftypefn {Target Hook} reg_class_t TARGET_SECONDARY_RELOAD (bool @var{in_p}, rtx @var{x}, reg_class_t @var{reload_class}, enum machine_mode @var{reload_mode}, secondary_reload_info *@var{sri})
+Many machines have some registers that cannot be copied directly to or
+from memory or even from other types of registers.  An example is the
+@samp{MQ} register, which on most machines, can only be copied to or
+from general registers, but not memory.  Below, we shall be using the
+term 'intermediate register' when a move operation cannot be performed
+directly, but has to be done by copying the source into the intermediate
+register first, and then copying the intermediate register to the
+destination.  An intermediate register always has the same mode as
+source and destination.  Since it holds the actual value being copied,
+reload might apply optimizations to re-use an intermediate register
+and eliding the copy from the source when it can determine that the
+intermediate register still holds the required value.
+
+Another kind of secondary reload is required on some machines which
+allow copying all registers to and from memory, but require a scratch
+register for stores to some memory locations (e.g., those with symbolic
+address on the RT, and those with certain symbolic address on the SPARC
+when compiling PIC)@.  Scratch registers need not have the same mode
+as the value being copied, and usually hold a different value than
+that being copied.  Special patterns in the md file are needed to
+describe how the copy is performed with the help of the scratch register;
+these patterns also describe the number, register class(es) and mode(s)
+of the scratch register(s).
+
+In some cases, both an intermediate and a scratch register are required.
+
+For input reloads, this target hook is called with nonzero @var{in_p},
+and @var{x} is an rtx that needs to be copied to a register of class
+@var{reload_class} in @var{reload_mode}.  For output reloads, this target
+hook is called with zero @var{in_p}, and a register of class @var{reload_class}
+needs to be copied to rtx @var{x} in @var{reload_mode}.
+
+If copying a register of @var{reload_class} from/to @var{x} requires
+an intermediate register, the hook @code{secondary_reload} should
+return the register class required for this intermediate register.
+If no intermediate register is required, it should return NO_REGS.
+If more than one intermediate register is required, describe the one
+that is closest in the copy chain to the reload register.
+
+If scratch registers are needed, you also have to describe how to
+perform the copy from/to the reload register to/from this
+closest intermediate register.  Or if no intermediate register is
+required, but still a scratch register is needed, describe the
+copy  from/to the reload register to/from the reload operand @var{x}.
+
+You do this by setting @code{sri->icode} to the instruction code of a pattern
+in the md file which performs the move.  Operands 0 and 1 are the output
+and input of this copy, respectively.  Operands from operand 2 onward are
+for scratch operands.  These scratch operands must have a mode, and a
+single-register-class
+@c [later: or memory]
+output constraint.
+
+When an intermediate register is used, the @code{secondary_reload}
+hook will be called again to determine how to copy the intermediate
+register to/from the reload operand @var{x}, so your hook must also
+have code to handle the register class of the intermediate operand.
+
+@c [For later: maybe we'll allow multi-alternative reload patterns -
+@c   the port maintainer could name a mov<mode> pattern that has clobbers -
+@c   and match the constraints of input and output to determine the required
+@c   alternative.  A restriction would be that constraints used to match
+@c   against reloads registers would have to be written as register class
+@c   constraints, or we need a new target macro / hook that tells us if an
+@c   arbitrary constraint can match an unknown register of a given class.
+@c   Such a macro / hook would also be useful in other places.]
+
+
+@var{x} might be a pseudo-register or a @code{subreg} of a
+pseudo-register, which could either be in a hard register or in memory.
+Use @code{true_regnum} to find out; it will return @minus{}1 if the pseudo is
+in memory and the hard register number if it is in a register.
+
+Scratch operands in memory (constraint @code{"=m"} / @code{"=&m"}) are
+currently not supported.  For the time being, you will have to continue
+to use @code{SECONDARY_MEMORY_NEEDED} for that purpose.
+
+@code{copy_cost} also uses this target hook to find out how values are
+copied.  If you want it to include some extra cost for the need to allocate
+(a) scratch register(s), set @code{sri->extra_cost} to the additional cost.
+Or if two dependent moves are supposed to have a lower cost than the sum
+of the individual moves due to expected fortuitous scheduling and/or special
+forwarding logic, you can set @code{sri->extra_cost} to a negative amount.
+@end deftypefn
+
+@defmac SECONDARY_RELOAD_CLASS (@var{class}, @var{mode}, @var{x})
+@defmacx SECONDARY_INPUT_RELOAD_CLASS (@var{class}, @var{mode}, @var{x})
+@defmacx SECONDARY_OUTPUT_RELOAD_CLASS (@var{class}, @var{mode}, @var{x})
+These macros are obsolete, new ports should use the target hook
+@code{TARGET_SECONDARY_RELOAD} instead.
+
+These are obsolete macros, replaced by the @code{TARGET_SECONDARY_RELOAD}
+target hook.  Older ports still define these macros to indicate to the
+reload phase that it may
+need to allocate at least one register for a reload in addition to the
+register to contain the data.  Specifically, if copying @var{x} to a
+register @var{class} in @var{mode} requires an intermediate register,
+you were supposed to define @code{SECONDARY_INPUT_RELOAD_CLASS} to return the
+largest register class all of whose registers can be used as
+intermediate registers or scratch registers.
+
+If copying a register @var{class} in @var{mode} to @var{x} requires an
+intermediate or scratch register, @code{SECONDARY_OUTPUT_RELOAD_CLASS}
+was supposed to be defined be defined to return the largest register
+class required.  If the
+requirements for input and output reloads were the same, the macro
+@code{SECONDARY_RELOAD_CLASS} should have been used instead of defining both
+macros identically.
+
+The values returned by these macros are often @code{GENERAL_REGS}.
+Return @code{NO_REGS} if no spare register is needed; i.e., if @var{x}
+can be directly copied to or from a register of @var{class} in
+@var{mode} without requiring a scratch register.  Do not define this
+macro if it would always return @code{NO_REGS}.
+
+If a scratch register is required (either with or without an
+intermediate register), you were supposed to define patterns for
+@samp{reload_in@var{m}} or @samp{reload_out@var{m}}, as required
+(@pxref{Standard Names}.  These patterns, which were normally
+implemented with a @code{define_expand}, should be similar to the
+@samp{mov@var{m}} patterns, except that operand 2 is the scratch
+register.
+
+These patterns need constraints for the reload register and scratch
+register that
+contain a single register class.  If the original reload register (whose
+class is @var{class}) can meet the constraint given in the pattern, the
+value returned by these macros is used for the class of the scratch
+register.  Otherwise, two additional reload registers are required.
+Their classes are obtained from the constraints in the insn pattern.
+
+@var{x} might be a pseudo-register or a @code{subreg} of a
+pseudo-register, which could either be in a hard register or in memory.
+Use @code{true_regnum} to find out; it will return @minus{}1 if the pseudo is
+in memory and the hard register number if it is in a register.
+
+These macros should not be used in the case where a particular class of
+registers can only be copied to memory and not to another class of
+registers.  In that case, secondary reload registers are not needed and
+would not be helpful.  Instead, a stack location must be used to perform
+the copy and the @code{mov@var{m}} pattern should use memory as an
+intermediate storage.  This case often occurs between floating-point and
+general registers.
+@end defmac
+
+@defmac SECONDARY_MEMORY_NEEDED (@var{class1}, @var{class2}, @var{m})
+Certain machines have the property that some registers cannot be copied
+to some other registers without using memory.  Define this macro on
+those machines to be a C expression that is nonzero if objects of mode
+@var{m} in registers of @var{class1} can only be copied to registers of
+class @var{class2} by storing a register of @var{class1} into memory
+and loading that memory location into a register of @var{class2}.
+
+Do not define this macro if its value would always be zero.
+@end defmac
+
+@defmac SECONDARY_MEMORY_NEEDED_RTX (@var{mode})
+Normally when @code{SECONDARY_MEMORY_NEEDED} is defined, the compiler
+allocates a stack slot for a memory location needed for register copies.
+If this macro is defined, the compiler instead uses the memory location
+defined by this macro.
+
+Do not define this macro if you do not define
+@code{SECONDARY_MEMORY_NEEDED}.
+@end defmac
+
+@defmac SECONDARY_MEMORY_NEEDED_MODE (@var{mode})
+When the compiler needs a secondary memory location to copy between two
+registers of mode @var{mode}, it normally allocates sufficient memory to
+hold a quantity of @code{BITS_PER_WORD} bits and performs the store and
+load operations in a mode that many bits wide and whose class is the
+same as that of @var{mode}.
+
+This is right thing to do on most machines because it ensures that all
+bits of the register are copied and prevents accesses to the registers
+in a narrower mode, which some machines prohibit for floating-point
+registers.
+
+However, this default behavior is not correct on some machines, such as
+the DEC Alpha, that store short integers in floating-point registers
+differently than in integer registers.  On those machines, the default
+widening will not work correctly and you must define this macro to
+suppress that widening in some cases.  See the file @file{alpha.h} for
+details.
+
+Do not define this macro if you do not define
+@code{SECONDARY_MEMORY_NEEDED} or if widening @var{mode} to a mode that
+is @code{BITS_PER_WORD} bits wide is correct for your machine.
+@end defmac
+
+@deftypefn {Target Hook} bool TARGET_CLASS_LIKELY_SPILLED_P (reg_class_t @var{rclass})
+A target hook which returns @code{true} if pseudos that have been assigned
+to registers of class @var{rclass} would likely be spilled because
+registers of @var{rclass} are needed for spill registers.
+
+The default version of this target hook returns @code{true} if @var{rclass}
+has exactly one register and @code{false} otherwise.  On most machines, this
+default should be used.  Only use this target hook to some other expression
+if pseudos allocated by @file{local-alloc.c} end up in memory because their
+hard registers were needed for spill registers.  If this target hook returns
+@code{false} for those classes, those pseudos will only be allocated by
+@file{global.c}, which knows how to reallocate the pseudo to another
+register.  If there would not be another register available for reallocation,
+you should not change the implementation of this target hook since
+the only effect of such implementation would be to slow down register
+allocation.
+@end deftypefn
+
+@defmac CLASS_MAX_NREGS (@var{class}, @var{mode})
+A C expression for the maximum number of consecutive registers
+of class @var{class} needed to hold a value of mode @var{mode}.
+
+This is closely related to the macro @code{HARD_REGNO_NREGS}.  In fact,
+the value of the macro @code{CLASS_MAX_NREGS (@var{class}, @var{mode})}
+should be the maximum value of @code{HARD_REGNO_NREGS (@var{regno},
+@var{mode})} for all @var{regno} values in the class @var{class}.
+
+This macro helps control the handling of multiple-word values
+in the reload pass.
+@end defmac
+
+@defmac CANNOT_CHANGE_MODE_CLASS (@var{from}, @var{to}, @var{class})
+If defined, a C expression that returns nonzero for a @var{class} for which
+a change from mode @var{from} to mode @var{to} is invalid.
+
+For the example, loading 32-bit integer or floating-point objects into
+floating-point registers on the Alpha extends them to 64 bits.
+Therefore loading a 64-bit object and then storing it as a 32-bit object
+does not store the low-order 32 bits, as would be the case for a normal
+register.  Therefore, @file{alpha.h} defines @code{CANNOT_CHANGE_MODE_CLASS}
+as below:
+
+@smallexample
+#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
+  (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
+   ? reg_classes_intersect_p (FLOAT_REGS, (CLASS)) : 0)
+@end smallexample
+@end defmac
+
+@deftypefn {Target Hook} {const reg_class_t *} TARGET_IRA_COVER_CLASSES (void)
+Return an array of cover classes for the Integrated Register Allocator
+(@acronym{IRA}).  Cover classes are a set of non-intersecting register
+classes covering all hard registers used for register allocation
+purposes.  If a move between two registers in the same cover class is
+possible, it should be cheaper than a load or store of the registers.
+The array is terminated by a @code{LIM_REG_CLASSES} element.
+
+The order of cover classes in the array is important.  If two classes
+have the same cost of usage for a pseudo, the class occurred first in
+the array is chosen for the pseudo.
+
+This hook is called once at compiler startup, after the command-line
+options have been processed. It is then re-examined by every call to
+@code{target_reinit}.
+
+The default implementation returns @code{IRA_COVER_CLASSES}, if defined,
+otherwise there is no default implementation.  You must define either this
+macro or @code{IRA_COVER_CLASSES} in order to use the integrated register
+allocator with Chaitin-Briggs coloring. If the macro is not defined,
+the only available coloring algorithm is Chow's priority coloring.
+
+This hook must not be modified from @code{NULL} to non-@code{NULL} or
+vice versa by command-line option processing.
+@end deftypefn
+
+@defmac IRA_COVER_CLASSES
+See the documentation for @code{TARGET_IRA_COVER_CLASSES}.
+@end defmac
+
+@node Old Constraints
+@section Obsolete Macros for Defining Constraints
+@cindex defining constraints, obsolete method
+@cindex constraints, defining, obsolete method
+
+Machine-specific constraints can be defined with these macros instead
+of the machine description constructs described in @ref{Define
+Constraints}.  This mechanism is obsolete.  New ports should not use
+it; old ports should convert to the new mechanism.
+
+@defmac CONSTRAINT_LEN (@var{char}, @var{str})
+For the constraint at the start of @var{str}, which starts with the letter
+@var{c}, return the length.  This allows you to have register class /
+constant / extra constraints that are longer than a single letter;
+you don't need to define this macro if you can do with single-letter
+constraints only.  The definition of this macro should use
+DEFAULT_CONSTRAINT_LEN for all the characters that you don't want
+to handle specially.
+There are some sanity checks in genoutput.c that check the constraint lengths
+for the md file, so you can also use this macro to help you while you are
+transitioning from a byzantine single-letter-constraint scheme: when you
+return a negative length for a constraint you want to re-use, genoutput
+will complain about every instance where it is used in the md file.
+@end defmac
+
+@defmac REG_CLASS_FROM_LETTER (@var{char})
+A C expression which defines the machine-dependent operand constraint
+letters for register classes.  If @var{char} is such a letter, the
+value should be the register class corresponding to it.  Otherwise,
+the value should be @code{NO_REGS}.  The register letter @samp{r},
+corresponding to class @code{GENERAL_REGS}, will not be passed
+to this macro; you do not need to handle it.
+@end defmac
+
+@defmac REG_CLASS_FROM_CONSTRAINT (@var{char}, @var{str})
+Like @code{REG_CLASS_FROM_LETTER}, but you also get the constraint string
+passed in @var{str}, so that you can use suffixes to distinguish between
+different variants.
+@end defmac
+
+@defmac CONST_OK_FOR_LETTER_P (@var{value}, @var{c})
+A C expression that defines the machine-dependent operand constraint
+letters (@samp{I}, @samp{J}, @samp{K}, @dots{} @samp{P}) that specify
+particular ranges of integer values.  If @var{c} is one of those
+letters, the expression should check that @var{value}, an integer, is in
+the appropriate range and return 1 if so, 0 otherwise.  If @var{c} is
+not one of those letters, the value should be 0 regardless of
+@var{value}.
+@end defmac
+
+@defmac CONST_OK_FOR_CONSTRAINT_P (@var{value}, @var{c}, @var{str})
+Like @code{CONST_OK_FOR_LETTER_P}, but you also get the constraint
+string passed in @var{str}, so that you can use suffixes to distinguish
+between different variants.
+@end defmac
+
+@defmac CONST_DOUBLE_OK_FOR_LETTER_P (@var{value}, @var{c})
+A C expression that defines the machine-dependent operand constraint
+letters that specify particular ranges of @code{const_double} values
+(@samp{G} or @samp{H}).
+
+If @var{c} is one of those letters, the expression should check that
+@var{value}, an RTX of code @code{const_double}, is in the appropriate
+range and return 1 if so, 0 otherwise.  If @var{c} is not one of those
+letters, the value should be 0 regardless of @var{value}.
+
+@code{const_double} is used for all floating-point constants and for
+@code{DImode} fixed-point constants.  A given letter can accept either
+or both kinds of values.  It can use @code{GET_MODE} to distinguish
+between these kinds.
+@end defmac
+
+@defmac CONST_DOUBLE_OK_FOR_CONSTRAINT_P (@var{value}, @var{c}, @var{str})
+Like @code{CONST_DOUBLE_OK_FOR_LETTER_P}, but you also get the constraint
+string passed in @var{str}, so that you can use suffixes to distinguish
+between different variants.
+@end defmac
+
+@defmac EXTRA_CONSTRAINT (@var{value}, @var{c})
+A C expression that defines the optional machine-dependent constraint
+letters that can be used to segregate specific types of operands, usually
+memory references, for the target machine.  Any letter that is not
+elsewhere defined and not matched by @code{REG_CLASS_FROM_LETTER} /
+@code{REG_CLASS_FROM_CONSTRAINT}
+may be used.  Normally this macro will not be defined.
+
+If it is required for a particular target machine, it should return 1
+if @var{value} corresponds to the operand type represented by the
+constraint letter @var{c}.  If @var{c} is not defined as an extra
+constraint, the value returned should be 0 regardless of @var{value}.
+
+For example, on the ROMP, load instructions cannot have their output
+in r0 if the memory reference contains a symbolic address.  Constraint
+letter @samp{Q} is defined as representing a memory address that does
+@emph{not} contain a symbolic address.  An alternative is specified with
+a @samp{Q} constraint on the input and @samp{r} on the output.  The next
+alternative specifies @samp{m} on the input and a register class that
+does not include r0 on the output.
+@end defmac
+
+@defmac EXTRA_CONSTRAINT_STR (@var{value}, @var{c}, @var{str})
+Like @code{EXTRA_CONSTRAINT}, but you also get the constraint string passed
+in @var{str}, so that you can use suffixes to distinguish between different
+variants.
+@end defmac
+
+@defmac EXTRA_MEMORY_CONSTRAINT (@var{c}, @var{str})
+A C expression that defines the optional machine-dependent constraint
+letters, amongst those accepted by @code{EXTRA_CONSTRAINT}, that should
+be treated like memory constraints by the reload pass.
+
+It should return 1 if the operand type represented by the constraint
+at the start of @var{str}, the first letter of which is the letter @var{c},
+comprises a subset of all memory references including
+all those whose address is simply a base register.  This allows the reload
+pass to reload an operand, if it does not directly correspond to the operand
+type of @var{c}, by copying its address into a base register.
+
+For example, on the S/390, some instructions do not accept arbitrary
+memory references, but only those that do not make use of an index
+register.  The constraint letter @samp{Q} is defined via
+@code{EXTRA_CONSTRAINT} as representing a memory address of this type.
+If the letter @samp{Q} is marked as @code{EXTRA_MEMORY_CONSTRAINT},
+a @samp{Q} constraint can handle any memory operand, because the
+reload pass knows it can be reloaded by copying the memory address
+into a base register if required.  This is analogous to the way
+an @samp{o} constraint can handle any memory operand.
+@end defmac
+
+@defmac EXTRA_ADDRESS_CONSTRAINT (@var{c}, @var{str})
+A C expression that defines the optional machine-dependent constraint
+letters, amongst those accepted by @code{EXTRA_CONSTRAINT} /
+@code{EXTRA_CONSTRAINT_STR}, that should
+be treated like address constraints by the reload pass.
+
+It should return 1 if the operand type represented by the constraint
+at the start of @var{str}, which starts with the letter @var{c}, comprises
+a subset of all memory addresses including
+all those that consist of just a base register.  This allows the reload
+pass to reload an operand, if it does not directly correspond to the operand
+type of @var{str}, by copying it into a base register.
+
+Any constraint marked as @code{EXTRA_ADDRESS_CONSTRAINT} can only
+be used with the @code{address_operand} predicate.  It is treated
+analogously to the @samp{p} constraint.
+@end defmac
+
+@node Stack and Calling
+@section Stack Layout and Calling Conventions
+@cindex calling conventions
+
+@c prevent bad page break with this line
+This describes the stack layout and calling conventions.
+
+@menu
+* Frame Layout::
+* Exception Handling::
+* Stack Checking::
+* Frame Registers::
+* Elimination::
+* Stack Arguments::
+* Register Arguments::
+* Scalar Return::
+* Aggregate Return::
+* Caller Saves::
+* Function Entry::
+* Profiling::
+* Tail Calls::
+* Stack Smashing Protection::
+@end menu
+
+@node Frame Layout
+@subsection Basic Stack Layout
+@cindex stack frame layout
+@cindex frame layout
+
+@c prevent bad page break with this line
+Here is the basic stack layout.
+
+@defmac STACK_GROWS_DOWNWARD
+Define this macro if pushing a word onto the stack moves the stack
+pointer to a smaller address.
+
+When we say, ``define this macro if @dots{}'', it means that the
+compiler checks this macro only with @code{#ifdef} so the precise
+definition used does not matter.
+@end defmac
+
+@defmac STACK_PUSH_CODE
+This macro defines the operation used when something is pushed
+on the stack.  In RTL, a push operation will be
+@code{(set (mem (STACK_PUSH_CODE (reg sp))) @dots{})}
+
+The choices are @code{PRE_DEC}, @code{POST_DEC}, @code{PRE_INC},
+and @code{POST_INC}.  Which of these is correct depends on
+the stack direction and on whether the stack pointer points
+to the last item on the stack or whether it points to the
+space for the next item on the stack.
+
+The default is @code{PRE_DEC} when @code{STACK_GROWS_DOWNWARD} is
+defined, which is almost always right, and @code{PRE_INC} otherwise,
+which is often wrong.
+@end defmac
+
+@defmac FRAME_GROWS_DOWNWARD
+Define this macro to nonzero value if the addresses of local variable slots
+are at negative offsets from the frame pointer.
+@end defmac
+
+@defmac ARGS_GROW_DOWNWARD
+Define this macro if successive arguments to a function occupy decreasing
+addresses on the stack.
+@end defmac
+
+@defmac STARTING_FRAME_OFFSET
+Offset from the frame pointer to the first local variable slot to be allocated.
+
+If @code{FRAME_GROWS_DOWNWARD}, find the next slot's offset by
+subtracting the first slot's length from @code{STARTING_FRAME_OFFSET}.
+Otherwise, it is found by adding the length of the first slot to the
+value @code{STARTING_FRAME_OFFSET}.
+@c i'm not sure if the above is still correct.. had to change it to get
+@c rid of an overfull.  --mew 2feb93
+@end defmac
+
+@defmac STACK_ALIGNMENT_NEEDED
+Define to zero to disable final alignment of the stack during reload.
+The nonzero default for this macro is suitable for most ports.
+
+On ports where @code{STARTING_FRAME_OFFSET} is nonzero or where there
+is a register save block following the local block that doesn't require
+alignment to @code{STACK_BOUNDARY}, it may be beneficial to disable
+stack alignment and do it in the backend.
+@end defmac
+
+@defmac STACK_POINTER_OFFSET
+Offset from the stack pointer register to the first location at which
+outgoing arguments are placed.  If not specified, the default value of
+zero is used.  This is the proper value for most machines.
+
+If @code{ARGS_GROW_DOWNWARD}, this is the offset to the location above
+the first location at which outgoing arguments are placed.
+@end defmac
+
+@defmac FIRST_PARM_OFFSET (@var{fundecl})
+Offset from the argument pointer register to the first argument's
+address.  On some machines it may depend on the data type of the
+function.
+
+If @code{ARGS_GROW_DOWNWARD}, this is the offset to the location above
+the first argument's address.
+@end defmac
+
+@defmac STACK_DYNAMIC_OFFSET (@var{fundecl})
+Offset from the stack pointer register to an item dynamically allocated
+on the stack, e.g., by @code{alloca}.
+
+The default value for this macro is @code{STACK_POINTER_OFFSET} plus the
+length of the outgoing arguments.  The default is correct for most
+machines.  See @file{function.c} for details.
+@end defmac
+
+@defmac INITIAL_FRAME_ADDRESS_RTX
+A C expression whose value is RTL representing the address of the initial
+stack frame. This address is passed to @code{RETURN_ADDR_RTX} and
+@code{DYNAMIC_CHAIN_ADDRESS}.  If you don't define this macro, a reasonable
+default value will be used.  Define this macro in order to make frame pointer
+elimination work in the presence of @code{__builtin_frame_address (count)} and
+@code{__builtin_return_address (count)} for @code{count} not equal to zero.
+@end defmac
+
+@defmac DYNAMIC_CHAIN_ADDRESS (@var{frameaddr})
+A C expression whose value is RTL representing the address in a stack
+frame where the pointer to the caller's frame is stored.  Assume that
+@var{frameaddr} is an RTL expression for the address of the stack frame
+itself.
+
+If you don't define this macro, the default is to return the value
+of @var{frameaddr}---that is, the stack frame address is also the
+address of the stack word that points to the previous frame.
+@end defmac
+
+@defmac SETUP_FRAME_ADDRESSES
+If defined, a C expression that produces the machine-specific code to
+setup the stack so that arbitrary frames can be accessed.  For example,
+on the SPARC, we must flush all of the register windows to the stack
+before we can access arbitrary stack frames.  You will seldom need to
+define this macro.
+@end defmac
+
+@deftypefn {Target Hook} rtx TARGET_BUILTIN_SETJMP_FRAME_VALUE (void)
+This target hook should return an rtx that is used to store
+the address of the current frame into the built in @code{setjmp} buffer.
+The default value, @code{virtual_stack_vars_rtx}, is correct for most
+machines.  One reason you may need to define this target hook is if
+@code{hard_frame_pointer_rtx} is the appropriate value on your machine.
+@end deftypefn
+
+@defmac FRAME_ADDR_RTX (@var{frameaddr})
+A C expression whose value is RTL representing the value of the frame
+address for the current frame.  @var{frameaddr} is the frame pointer
+of the current frame.  This is used for __builtin_frame_address.
+You need only define this macro if the frame address is not the same
+as the frame pointer.  Most machines do not need to define it.
+@end defmac
+
+@defmac RETURN_ADDR_RTX (@var{count}, @var{frameaddr})
+A C expression whose value is RTL representing the value of the return
+address for the frame @var{count} steps up from the current frame, after
+the prologue.  @var{frameaddr} is the frame pointer of the @var{count}
+frame, or the frame pointer of the @var{count} @minus{} 1 frame if
+@code{RETURN_ADDR_IN_PREVIOUS_FRAME} is defined.
+
+The value of the expression must always be the correct address when
+@var{count} is zero, but may be @code{NULL_RTX} if there is no way to
+determine the return address of other frames.
+@end defmac
+
+@defmac RETURN_ADDR_IN_PREVIOUS_FRAME
+Define this if the return address of a particular stack frame is accessed
+from the frame pointer of the previous stack frame.
+@end defmac
+
+@defmac INCOMING_RETURN_ADDR_RTX
+A C expression whose value is RTL representing the location of the
+incoming return address at the beginning of any function, before the
+prologue.  This RTL is either a @code{REG}, indicating that the return
+value is saved in @samp{REG}, or a @code{MEM} representing a location in
+the stack.
+
+You only need to define this macro if you want to support call frame
+debugging information like that provided by DWARF 2.
+
+If this RTL is a @code{REG}, you should also define
+@code{DWARF_FRAME_RETURN_COLUMN} to @code{DWARF_FRAME_REGNUM (REGNO)}.
+@end defmac
+
+@defmac DWARF_ALT_FRAME_RETURN_COLUMN
+A C expression whose value is an integer giving a DWARF 2 column
+number that may be used as an alternative return column.  The column
+must not correspond to any gcc hard register (that is, it must not
+be in the range of @code{DWARF_FRAME_REGNUM}).
+
+This macro can be useful if @code{DWARF_FRAME_RETURN_COLUMN} is set to a
+general register, but an alternative column needs to be used for signal
+frames.  Some targets have also used different frame return columns
+over time.
+@end defmac
+
+@defmac DWARF_ZERO_REG
+A C expression whose value is an integer giving a DWARF 2 register
+number that is considered to always have the value zero.  This should
+only be defined if the target has an architected zero register, and
+someone decided it was a good idea to use that register number to
+terminate the stack backtrace.  New ports should avoid this.
+@end defmac
+
+@deftypefn {Target Hook} void TARGET_DWARF_HANDLE_FRAME_UNSPEC (const char *@var{label}, rtx @var{pattern}, int @var{index})
+This target hook allows the backend to emit frame-related insns that
+contain UNSPECs or UNSPEC_VOLATILEs.  The DWARF 2 call frame debugging
+info engine will invoke it on insns of the form
+@smallexample
+(set (reg) (unspec [@dots{}] UNSPEC_INDEX))
+@end smallexample
+and
+@smallexample
+(set (reg) (unspec_volatile [@dots{}] UNSPECV_INDEX)).
+@end smallexample
+to let the backend emit the call frame instructions.  @var{label} is
+the CFI label attached to the insn, @var{pattern} is the pattern of
+the insn and @var{index} is @code{UNSPEC_INDEX} or @code{UNSPECV_INDEX}.
+@end deftypefn
+
+@defmac INCOMING_FRAME_SP_OFFSET
+A C expression whose value is an integer giving the offset, in bytes,
+from the value of the stack pointer register to the top of the stack
+frame at the beginning of any function, before the prologue.  The top of
+the frame is defined to be the value of the stack pointer in the
+previous frame, just before the call instruction.
+
+You only need to define this macro if you want to support call frame
+debugging information like that provided by DWARF 2.
+@end defmac
+
+@defmac ARG_POINTER_CFA_OFFSET (@var{fundecl})
+A C expression whose value is an integer giving the offset, in bytes,
+from the argument pointer to the canonical frame address (cfa).  The
+final value should coincide with that calculated by
+@code{INCOMING_FRAME_SP_OFFSET}.  Which is unfortunately not usable
+during virtual register instantiation.
+
+The default value for this macro is
+@code{FIRST_PARM_OFFSET (fundecl) + crtl->args.pretend_args_size},
+which is correct for most machines; in general, the arguments are found
+immediately before the stack frame.  Note that this is not the case on
+some targets that save registers into the caller's frame, such as SPARC
+and rs6000, and so such targets need to define this macro.
+
+You only need to define this macro if the default is incorrect, and you
+want to support call frame debugging information like that provided by
+DWARF 2.
+@end defmac
+
+@defmac FRAME_POINTER_CFA_OFFSET (@var{fundecl})
+If defined, a C expression whose value is an integer giving the offset
+in bytes from the frame pointer to the canonical frame address (cfa).
+The final value should coincide with that calculated by
+@code{INCOMING_FRAME_SP_OFFSET}.
+
+Normally the CFA is calculated as an offset from the argument pointer,
+via @code{ARG_POINTER_CFA_OFFSET}, but if the argument pointer is
+variable due to the ABI, this may not be possible.  If this macro is
+defined, it implies that the virtual register instantiation should be
+based on the frame pointer instead of the argument pointer.  Only one
+of @code{FRAME_POINTER_CFA_OFFSET} and @code{ARG_POINTER_CFA_OFFSET}
+should be defined.
+@end defmac
+
+@defmac CFA_FRAME_BASE_OFFSET (@var{fundecl})
+If defined, a C expression whose value is an integer giving the offset
+in bytes from the canonical frame address (cfa) to the frame base used
+in DWARF 2 debug information.  The default is zero.  A different value
+may reduce the size of debug information on some ports.
+@end defmac
+
+@node Exception Handling
+@subsection Exception Handling Support
+@cindex exception handling
+
+@defmac EH_RETURN_DATA_REGNO (@var{N})
+A C expression whose value is the @var{N}th register number used for
+data by exception handlers, or @code{INVALID_REGNUM} if fewer than
+@var{N} registers are usable.
+
+The exception handling library routines communicate with the exception
+handlers via a set of agreed upon registers.  Ideally these registers
+should be call-clobbered; it is possible to use call-saved registers,
+but may negatively impact code size.  The target must support at least
+2 data registers, but should define 4 if there are enough free registers.
+
+You must define this macro if you want to support call frame exception
+handling like that provided by DWARF 2.
+@end defmac
+
+@defmac EH_RETURN_STACKADJ_RTX
+A C expression whose value is RTL representing a location in which
+to store a stack adjustment to be applied before function return.
+This is used to unwind the stack to an exception handler's call frame.
+It will be assigned zero on code paths that return normally.
+
+Typically this is a call-clobbered hard register that is otherwise
+untouched by the epilogue, but could also be a stack slot.
+
+Do not define this macro if the stack pointer is saved and restored
+by the regular prolog and epilog code in the call frame itself; in
+this case, the exception handling library routines will update the
+stack location to be restored in place.  Otherwise, you must define
+this macro if you want to support call frame exception handling like
+that provided by DWARF 2.
+@end defmac
+
+@defmac EH_RETURN_HANDLER_RTX
+A C expression whose value is RTL representing a location in which
+to store the address of an exception handler to which we should
+return.  It will not be assigned on code paths that return normally.
+
+Typically this is the location in the call frame at which the normal
+return address is stored.  For targets that return by popping an
+address off the stack, this might be a memory address just below
+the @emph{target} call frame rather than inside the current call
+frame.  If defined, @code{EH_RETURN_STACKADJ_RTX} will have already
+been assigned, so it may be used to calculate the location of the
+target call frame.
+
+Some targets have more complex requirements than storing to an
+address calculable during initial code generation.  In that case
+the @code{eh_return} instruction pattern should be used instead.
+
+If you want to support call frame exception handling, you must
+define either this macro or the @code{eh_return} instruction pattern.
+@end defmac
+
+@defmac RETURN_ADDR_OFFSET
+If defined, an integer-valued C expression for which rtl will be generated
+to add it to the exception handler address before it is searched in the
+exception handling tables, and to subtract it again from the address before
+using it to return to the exception handler.
+@end defmac
+
+@defmac ASM_PREFERRED_EH_DATA_FORMAT (@var{code}, @var{global})
+This macro chooses the encoding of pointers embedded in the exception
+handling sections.  If at all possible, this should be defined such
+that the exception handling section will not require dynamic relocations,
+and so may be read-only.
+
+@var{code} is 0 for data, 1 for code labels, 2 for function pointers.
+@var{global} is true if the symbol may be affected by dynamic relocations.
+The macro should return a combination of the @code{DW_EH_PE_*} defines
+as found in @file{dwarf2.h}.
+
+If this macro is not defined, pointers will not be encoded but
+represented directly.
+@end defmac
+
+@defmac ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX (@var{file}, @var{encoding}, @var{size}, @var{addr}, @var{done})
+This macro allows the target to emit whatever special magic is required
+to represent the encoding chosen by @code{ASM_PREFERRED_EH_DATA_FORMAT}.
+Generic code takes care of pc-relative and indirect encodings; this must
+be defined if the target uses text-relative or data-relative encodings.
+
+This is a C statement that branches to @var{done} if the format was
+handled.  @var{encoding} is the format chosen, @var{size} is the number
+of bytes that the format occupies, @var{addr} is the @code{SYMBOL_REF}
+to be emitted.
+@end defmac
+
+@defmac MD_UNWIND_SUPPORT
+A string specifying a file to be #include'd in unwind-dw2.c.  The file
+so included typically defines @code{MD_FALLBACK_FRAME_STATE_FOR}.
+@end defmac
+
+@defmac MD_FALLBACK_FRAME_STATE_FOR (@var{context}, @var{fs})
+This macro allows the target to add CPU and operating system specific
+code to the call-frame unwinder for use when there is no unwind data
+available.  The most common reason to implement this macro is to unwind
+through signal frames.
+
+This macro is called from @code{uw_frame_state_for} in
+@file{unwind-dw2.c}, @file{unwind-dw2-xtensa.c} and
+@file{unwind-ia64.c}.  @var{context} is an @code{_Unwind_Context};
+@var{fs} is an @code{_Unwind_FrameState}.  Examine @code{context->ra}
+for the address of the code being executed and @code{context->cfa} for
+the stack pointer value.  If the frame can be decoded, the register
+save addresses should be updated in @var{fs} and the macro should
+evaluate to @code{_URC_NO_REASON}.  If the frame cannot be decoded,
+the macro should evaluate to @code{_URC_END_OF_STACK}.
+
+For proper signal handling in Java this macro is accompanied by
+@code{MAKE_THROW_FRAME}, defined in @file{libjava/include/*-signal.h} headers.
+@end defmac
+
+@defmac MD_HANDLE_UNWABI (@var{context}, @var{fs})
+This macro allows the target to add operating system specific code to the
+call-frame unwinder to handle the IA-64 @code{.unwabi} unwinding directive,
+usually used for signal or interrupt frames.
+
+This macro is called from @code{uw_update_context} in @file{unwind-ia64.c}.
+@var{context} is an @code{_Unwind_Context};
+@var{fs} is an @code{_Unwind_FrameState}.  Examine @code{fs->unwabi}
+for the abi and context in the @code{.unwabi} directive.  If the
+@code{.unwabi} directive can be handled, the register save addresses should
+be updated in @var{fs}.
+@end defmac
+
+@defmac TARGET_USES_WEAK_UNWIND_INFO
+A C expression that evaluates to true if the target requires unwind
+info to be given comdat linkage.  Define it to be @code{1} if comdat
+linkage is necessary.  The default is @code{0}.
+@end defmac
+
+@node Stack Checking
+@subsection Specifying How Stack Checking is Done
+
+GCC will check that stack references are within the boundaries of the
+stack, if the option @option{-fstack-check} is specified, in one of
+three ways:
+
+@enumerate
+@item
+If the value of the @code{STACK_CHECK_BUILTIN} macro is nonzero, GCC
+will assume that you have arranged for full stack checking to be done
+at appropriate places in the configuration files.  GCC will not do
+other special processing.
+
+@item
+If @code{STACK_CHECK_BUILTIN} is zero and the value of the
+@code{STACK_CHECK_STATIC_BUILTIN} macro is nonzero, GCC will assume
+that you have arranged for static stack checking (checking of the
+static stack frame of functions) to be done at appropriate places
+in the configuration files.  GCC will only emit code to do dynamic
+stack checking (checking on dynamic stack allocations) using the third
+approach below.
+
+@item
+If neither of the above are true, GCC will generate code to periodically
+``probe'' the stack pointer using the values of the macros defined below.
+@end enumerate
+
+If neither STACK_CHECK_BUILTIN nor STACK_CHECK_STATIC_BUILTIN is defined,
+GCC will change its allocation strategy for large objects if the option
+@option{-fstack-check} is specified: they will always be allocated
+dynamically if their size exceeds @code{STACK_CHECK_MAX_VAR_SIZE} bytes.
+
+@defmac STACK_CHECK_BUILTIN
+A nonzero value if stack checking is done by the configuration files in a
+machine-dependent manner.  You should define this macro if stack checking
+is required by the ABI of your machine or if you would like to do stack
+checking in some more efficient way than the generic approach.  The default
+value of this macro is zero.
+@end defmac
+
+@defmac STACK_CHECK_STATIC_BUILTIN
+A nonzero value if static stack checking is done by the configuration files
+in a machine-dependent manner.  You should define this macro if you would
+like to do static stack checking in some more efficient way than the generic
+approach.  The default value of this macro is zero.
+@end defmac
+
+@defmac STACK_CHECK_PROBE_INTERVAL_EXP
+An integer specifying the interval at which GCC must generate stack probe
+instructions, defined as 2 raised to this integer.  You will normally
+define this macro so that the interval be no larger than the size of
+the ``guard pages'' at the end of a stack area.  The default value
+of 12 (4096-byte interval) is suitable for most systems.
+@end defmac
+
+@defmac STACK_CHECK_MOVING_SP
+An integer which is nonzero if GCC should move the stack pointer page by page
+when doing probes.  This can be necessary on systems where the stack pointer
+contains the bottom address of the memory area accessible to the executing
+thread at any point in time.  In this situation an alternate signal stack
+is required in order to be able to recover from a stack overflow.  The
+default value of this macro is zero.
+@end defmac
+
+@defmac STACK_CHECK_PROTECT
+The number of bytes of stack needed to recover from a stack overflow, for
+languages where such a recovery is supported.  The default value of 75 words
+with the @code{setjmp}/@code{longjmp}-based exception handling mechanism and
+8192 bytes with other exception handling mechanisms should be adequate for
+most machines.
+@end defmac
+
+The following macros are relevant only if neither STACK_CHECK_BUILTIN
+nor STACK_CHECK_STATIC_BUILTIN is defined; you can omit them altogether
+in the opposite case.
+
+@defmac STACK_CHECK_MAX_FRAME_SIZE
+The maximum size of a stack frame, in bytes.  GCC will generate probe
+instructions in non-leaf functions to ensure at least this many bytes of
+stack are available.  If a stack frame is larger than this size, stack
+checking will not be reliable and GCC will issue a warning.  The
+default is chosen so that GCC only generates one instruction on most
+systems.  You should normally not change the default value of this macro.
+@end defmac
+
+@defmac STACK_CHECK_FIXED_FRAME_SIZE
+GCC uses this value to generate the above warning message.  It
+represents the amount of fixed frame used by a function, not including
+space for any callee-saved registers, temporaries and user variables.
+You need only specify an upper bound for this amount and will normally
+use the default of four words.
+@end defmac
+
+@defmac STACK_CHECK_MAX_VAR_SIZE
+The maximum size, in bytes, of an object that GCC will place in the
+fixed area of the stack frame when the user specifies
+@option{-fstack-check}.
+GCC computed the default from the values of the above macros and you will
+normally not need to override that default.
+@end defmac
+
+@need 2000
+@node Frame Registers
+@subsection Registers That Address the Stack Frame
+
+@c prevent bad page break with this line
+This discusses registers that address the stack frame.
+
+@defmac STACK_POINTER_REGNUM
+The register number of the stack pointer register, which must also be a
+fixed register according to @code{FIXED_REGISTERS}.  On most machines,
+the hardware determines which register this is.
+@end defmac
+
+@defmac FRAME_POINTER_REGNUM
+The register number of the frame pointer register, which is used to
+access automatic variables in the stack frame.  On some machines, the
+hardware determines which register this is.  On other machines, you can
+choose any register you wish for this purpose.
+@end defmac
+
+@defmac HARD_FRAME_POINTER_REGNUM
+On some machines the offset between the frame pointer and starting
+offset of the automatic variables is not known until after register
+allocation has been done (for example, because the saved registers are
+between these two locations).  On those machines, define
+@code{FRAME_POINTER_REGNUM} the number of a special, fixed register to
+be used internally until the offset is known, and define
+@code{HARD_FRAME_POINTER_REGNUM} to be the actual hard register number
+used for the frame pointer.
+
+You should define this macro only in the very rare circumstances when it
+is not possible to calculate the offset between the frame pointer and
+the automatic variables until after register allocation has been
+completed.  When this macro is defined, you must also indicate in your
+definition of @code{ELIMINABLE_REGS} how to eliminate
+@code{FRAME_POINTER_REGNUM} into either @code{HARD_FRAME_POINTER_REGNUM}
+or @code{STACK_POINTER_REGNUM}.
+
+Do not define this macro if it would be the same as
+@code{FRAME_POINTER_REGNUM}.
+@end defmac
+
+@defmac ARG_POINTER_REGNUM
+The register number of the arg pointer register, which is used to access
+the function's argument list.  On some machines, this is the same as the
+frame pointer register.  On some machines, the hardware determines which
+register this is.  On other machines, you can choose any register you
+wish for this purpose.  If this is not the same register as the frame
+pointer register, then you must mark it as a fixed register according to
+@code{FIXED_REGISTERS}, or arrange to be able to eliminate it
+(@pxref{Elimination}).
+@end defmac
+
+@defmac HARD_FRAME_POINTER_IS_FRAME_POINTER
+Define this to a preprocessor constant that is nonzero if
+@code{hard_frame_pointer_rtx} and @code{frame_pointer_rtx} should be
+the same.  The default definition is @samp{(HARD_FRAME_POINTER_REGNUM
+== FRAME_POINTER_REGNUM)}; you only need to define this macro if that
+definition is not suitable for use in preprocessor conditionals.
+@end defmac
+
+@defmac HARD_FRAME_POINTER_IS_ARG_POINTER
+Define this to a preprocessor constant that is nonzero if
+@code{hard_frame_pointer_rtx} and @code{arg_pointer_rtx} should be the
+same.  The default definition is @samp{(HARD_FRAME_POINTER_REGNUM ==
+ARG_POINTER_REGNUM)}; you only need to define this macro if that
+definition is not suitable for use in preprocessor conditionals.
+@end defmac
+
+@defmac RETURN_ADDRESS_POINTER_REGNUM
+The register number of the return address pointer register, which is used to
+access the current function's return address from the stack.  On some
+machines, the return address is not at a fixed offset from the frame
+pointer or stack pointer or argument pointer.  This register can be defined
+to point to the return address on the stack, and then be converted by
+@code{ELIMINABLE_REGS} into either the frame pointer or stack pointer.
+
+Do not define this macro unless there is no other way to get the return
+address from the stack.
+@end defmac
+
+@defmac STATIC_CHAIN_REGNUM
+@defmacx STATIC_CHAIN_INCOMING_REGNUM
+Register numbers used for passing a function's static chain pointer.  If
+register windows are used, the register number as seen by the called
+function is @code{STATIC_CHAIN_INCOMING_REGNUM}, while the register
+number as seen by the calling function is @code{STATIC_CHAIN_REGNUM}.  If
+these registers are the same, @code{STATIC_CHAIN_INCOMING_REGNUM} need
+not be defined.
+
+The static chain register need not be a fixed register.
+
+If the static chain is passed in memory, these macros should not be
+defined; instead, the @code{TARGET_STATIC_CHAIN} hook should be used.
+@end defmac
+
+@deftypefn {Target Hook} rtx TARGET_STATIC_CHAIN (const_tree @var{fndecl}, bool @var{incoming_p})
+This hook replaces the use of @code{STATIC_CHAIN_REGNUM} et al for
+targets that may use different static chain locations for different
+nested functions.  This may be required if the target has function
+attributes that affect the calling conventions of the function and
+those calling conventions use different static chain locations.
+
+The default version of this hook uses @code{STATIC_CHAIN_REGNUM} et al.
+
+If the static chain is passed in memory, this hook should be used to
+provide rtx giving @code{mem} expressions that denote where they are stored.
+Often the @code{mem} expression as seen by the caller will be at an offset
+from the stack pointer and the @code{mem} expression as seen by the callee
+will be at an offset from the frame pointer.
+@findex stack_pointer_rtx
+@findex frame_pointer_rtx
+@findex arg_pointer_rtx
+The variables @code{stack_pointer_rtx}, @code{frame_pointer_rtx}, and
+@code{arg_pointer_rtx} will have been initialized and should be used
+to refer to those items.
+@end deftypefn
+
+@defmac DWARF_FRAME_REGISTERS
+This macro specifies the maximum number of hard registers that can be
+saved in a call frame.  This is used to size data structures used in
+DWARF2 exception handling.
+
+Prior to GCC 3.0, this macro was needed in order to establish a stable
+exception handling ABI in the face of adding new hard registers for ISA
+extensions.  In GCC 3.0 and later, the EH ABI is insulated from changes
+in the number of hard registers.  Nevertheless, this macro can still be
+used to reduce the runtime memory requirements of the exception handling
+routines, which can be substantial if the ISA contains a lot of
+registers that are not call-saved.
+
+If this macro is not defined, it defaults to
+@code{FIRST_PSEUDO_REGISTER}.
+@end defmac
+
+@defmac PRE_GCC3_DWARF_FRAME_REGISTERS
+
+This macro is similar to @code{DWARF_FRAME_REGISTERS}, but is provided
+for backward compatibility in pre GCC 3.0 compiled code.
+
+If this macro is not defined, it defaults to
+@code{DWARF_FRAME_REGISTERS}.
+@end defmac
+
+@defmac DWARF_REG_TO_UNWIND_COLUMN (@var{regno})
+
+Define this macro if the target's representation for dwarf registers
+is different than the internal representation for unwind column.
+Given a dwarf register, this macro should return the internal unwind
+column number to use instead.
+
+See the PowerPC's SPE target for an example.
+@end defmac
+
+@defmac DWARF_FRAME_REGNUM (@var{regno})
+
+Define this macro if the target's representation for dwarf registers
+used in .eh_frame or .debug_frame is different from that used in other
+debug info sections.  Given a GCC hard register number, this macro
+should return the .eh_frame register number.  The default is
+@code{DBX_REGISTER_NUMBER (@var{regno})}.
+
+@end defmac
+
+@defmac DWARF2_FRAME_REG_OUT (@var{regno}, @var{for_eh})
+
+Define this macro to map register numbers held in the call frame info
+that GCC has collected using @code{DWARF_FRAME_REGNUM} to those that
+should be output in .debug_frame (@code{@var{for_eh}} is zero) and
+.eh_frame (@code{@var{for_eh}} is nonzero).  The default is to
+return @code{@var{regno}}.
+
+@end defmac
+
+@node Elimination
+@subsection Eliminating Frame Pointer and Arg Pointer
+
+@c prevent bad page break with this line
+This is about eliminating the frame pointer and arg pointer.
+
+@deftypefn {Target Hook} bool TARGET_FRAME_POINTER_REQUIRED (void)
+This target hook should return @code{true} if a function must have and use
+a frame pointer.  This target hook is called in the reload pass.  If its return
+value is @code{true} the function will have a frame pointer.
+
+This target hook can in principle examine the current function and decide
+according to the facts, but on most machines the constant @code{false} or the
+constant @code{true} suffices.  Use @code{false} when the machine allows code
+to be generated with no frame pointer, and doing so saves some time or space.
+Use @code{true} when there is no possible advantage to avoiding a frame
+pointer.
+
+In certain cases, the compiler does not know how to produce valid code
+without a frame pointer.  The compiler recognizes those cases and
+automatically gives the function a frame pointer regardless of what
+@code{TARGET_FRAME_POINTER_REQUIRED} returns.  You don't need to worry about
+them.
+
+In a function that does not require a frame pointer, the frame pointer
+register can be allocated for ordinary usage, unless you mark it as a
+fixed register.  See @code{FIXED_REGISTERS} for more information.
+
+Default return value is @code{false}.
+@end deftypefn
+
+@findex get_frame_size
+@defmac INITIAL_FRAME_POINTER_OFFSET (@var{depth-var})
+A C statement to store in the variable @var{depth-var} the difference
+between the frame pointer and the stack pointer values immediately after
+the function prologue.  The value would be computed from information
+such as the result of @code{get_frame_size ()} and the tables of
+registers @code{regs_ever_live} and @code{call_used_regs}.
+
+If @code{ELIMINABLE_REGS} is defined, this macro will be not be used and
+need not be defined.  Otherwise, it must be defined even if
+@code{TARGET_FRAME_POINTER_REQUIRED} always returns true; in that
+case, you may set @var{depth-var} to anything.
+@end defmac
+
+@defmac ELIMINABLE_REGS
+If defined, this macro specifies a table of register pairs used to
+eliminate unneeded registers that point into the stack frame.  If it is not
+defined, the only elimination attempted by the compiler is to replace
+references to the frame pointer with references to the stack pointer.
+
+The definition of this macro is a list of structure initializations, each
+of which specifies an original and replacement register.
+
+On some machines, the position of the argument pointer is not known until
+the compilation is completed.  In such a case, a separate hard register
+must be used for the argument pointer.  This register can be eliminated by
+replacing it with either the frame pointer or the argument pointer,
+depending on whether or not the frame pointer has been eliminated.
+
+In this case, you might specify:
+@smallexample
+#define ELIMINABLE_REGS  \
+@{@{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM@}, \
+ @{ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM@}, \
+ @{FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM@}@}
+@end smallexample
+
+Note that the elimination of the argument pointer with the stack pointer is
+specified first since that is the preferred elimination.
+@end defmac
+
+@deftypefn {Target Hook} bool TARGET_CAN_ELIMINATE (const int @var{from_reg}, const int @var{to_reg})
+This target hook should returns @code{true} if the compiler is allowed to
+try to replace register number @var{from_reg} with register number
+@var{to_reg}.  This target hook need only be defined if @code{ELIMINABLE_REGS}
+is defined, and will usually be @code{true}, since most of the cases
+preventing register elimination are things that the compiler already
+knows about.
+
+Default return value is @code{true}.
+@end deftypefn
+
+@defmac INITIAL_ELIMINATION_OFFSET (@var{from-reg}, @var{to-reg}, @var{offset-var})
+This macro is similar to @code{INITIAL_FRAME_POINTER_OFFSET}.  It
+specifies the initial difference between the specified pair of
+registers.  This macro must be defined if @code{ELIMINABLE_REGS} is
+defined.
+@end defmac
+
+@node Stack Arguments
+@subsection Passing Function Arguments on the Stack
+@cindex arguments on stack
+@cindex stack arguments
+
+The macros in this section control how arguments are passed
+on the stack.  See the following section for other macros that
+control passing certain arguments in registers.
+
+@deftypefn {Target Hook} bool TARGET_PROMOTE_PROTOTYPES (const_tree @var{fntype})
+This target hook returns @code{true} if an argument declared in a
+prototype as an integral type smaller than @code{int} should actually be
+passed as an @code{int}.  In addition to avoiding errors in certain
+cases of mismatch, it also makes for better code on certain machines.
+The default is to not promote prototypes.
+@end deftypefn
+
+@defmac PUSH_ARGS
+A C expression.  If nonzero, push insns will be used to pass
+outgoing arguments.
+If the target machine does not have a push instruction, set it to zero.
+That directs GCC to use an alternate strategy: to
+allocate the entire argument block and then store the arguments into
+it.  When @code{PUSH_ARGS} is nonzero, @code{PUSH_ROUNDING} must be defined too.
+@end defmac
+
+@defmac PUSH_ARGS_REVERSED
+A C expression.  If nonzero, function arguments will be evaluated from
+last to first, rather than from first to last.  If this macro is not
+defined, it defaults to @code{PUSH_ARGS} on targets where the stack
+and args grow in opposite directions, and 0 otherwise.
+@end defmac
+
+@defmac PUSH_ROUNDING (@var{npushed})
+A C expression that is the number of bytes actually pushed onto the
+stack when an instruction attempts to push @var{npushed} bytes.
+
+On some machines, the definition
+
+@smallexample
+#define PUSH_ROUNDING(BYTES) (BYTES)
+@end smallexample
+
+@noindent
+will suffice.  But on other machines, instructions that appear
+to push one byte actually push two bytes in an attempt to maintain
+alignment.  Then the definition should be
+
+@smallexample
+#define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & ~1)
+@end smallexample
+
+If the value of this macro has a type, it should be an unsigned type.
+@end defmac
+
+@findex current_function_outgoing_args_size
+@defmac ACCUMULATE_OUTGOING_ARGS
+A C expression.  If nonzero, the maximum amount of space required for outgoing arguments
+will be computed and placed into the variable
+@code{current_function_outgoing_args_size}.  No space will be pushed
+onto the stack for each call; instead, the function prologue should
+increase the stack frame size by this amount.
+
+Setting both @code{PUSH_ARGS} and @code{ACCUMULATE_OUTGOING_ARGS}
+is not proper.
+@end defmac
+
+@defmac REG_PARM_STACK_SPACE (@var{fndecl})
+Define this macro if functions should assume that stack space has been
+allocated for arguments even when their values are passed in
+registers.
+
+The value of this macro is the size, in bytes, of the area reserved for
+arguments passed in registers for the function represented by @var{fndecl},
+which can be zero if GCC is calling a library function.
+The argument @var{fndecl} can be the FUNCTION_DECL, or the type itself
+of the function.
+
+This space can be allocated by the caller, or be a part of the
+machine-dependent stack frame: @code{OUTGOING_REG_PARM_STACK_SPACE} says
+which.
+@end defmac
+@c above is overfull.  not sure what to do.  --mew 5feb93  did
+@c something, not sure if it looks good.  --mew 10feb93
+
+@defmac OUTGOING_REG_PARM_STACK_SPACE (@var{fntype})
+Define this to a nonzero value if it is the responsibility of the
+caller to allocate the area reserved for arguments passed in registers
+when calling a function of @var{fntype}.  @var{fntype} may be NULL
+if the function called is a library function.
+
+If @code{ACCUMULATE_OUTGOING_ARGS} is defined, this macro controls
+whether the space for these arguments counts in the value of
+@code{current_function_outgoing_args_size}.
+@end defmac
+
+@defmac STACK_PARMS_IN_REG_PARM_AREA
+Define this macro if @code{REG_PARM_STACK_SPACE} is defined, but the
+stack parameters don't skip the area specified by it.
+@c i changed this, makes more sens and it should have taken care of the
+@c overfull.. not as specific, tho.  --mew 5feb93
+
+Normally, when a parameter is not passed in registers, it is placed on the
+stack beyond the @code{REG_PARM_STACK_SPACE} area.  Defining this macro
+suppresses this behavior and causes the parameter to be passed on the
+stack in its natural location.
+@end defmac
+
+@deftypefn {Target Hook} int TARGET_RETURN_POPS_ARGS (tree @var{fundecl}, tree @var{funtype}, int @var{size})
+This target hook returns the number of bytes of its own arguments that
+a function pops on returning, or 0 if the function pops no arguments
+and the caller must therefore pop them all after the function returns.
+
+@var{fundecl} is a C variable whose value is a tree node that describes
+the function in question.  Normally it is a node of type
+@code{FUNCTION_DECL} that describes the declaration of the function.
+From this you can obtain the @code{DECL_ATTRIBUTES} of the function.
+
+@var{funtype} is a C variable whose value is a tree node that
+describes the function in question.  Normally it is a node of type
+@code{FUNCTION_TYPE} that describes the data type of the function.
+From this it is possible to obtain the data types of the value and
+arguments (if known).
+
+When a call to a library function is being considered, @var{fundecl}
+will contain an identifier node for the library function.  Thus, if
+you need to distinguish among various library functions, you can do so
+by their names.  Note that ``library function'' in this context means
+a function used to perform arithmetic, whose name is known specially
+in the compiler and was not mentioned in the C code being compiled.
+
+@var{size} is the number of bytes of arguments passed on the
+stack.  If a variable number of bytes is passed, it is zero, and
+argument popping will always be the responsibility of the calling function.
+
+On the VAX, all functions always pop their arguments, so the definition
+of this macro is @var{size}.  On the 68000, using the standard
+calling convention, no functions pop their arguments, so the value of
+the macro is always 0 in this case.  But an alternative calling
+convention is available in which functions that take a fixed number of
+arguments pop them but other functions (such as @code{printf}) pop
+nothing (the caller pops all).  When this convention is in use,
+@var{funtype} is examined to determine whether a function takes a fixed
+number of arguments.
+@end deftypefn
+
+@defmac CALL_POPS_ARGS (@var{cum})
+A C expression that should indicate the number of bytes a call sequence
+pops off the stack.  It is added to the value of @code{RETURN_POPS_ARGS}
+when compiling a function call.
+
+@var{cum} is the variable in which all arguments to the called function
+have been accumulated.
+
+On certain architectures, such as the SH5, a call trampoline is used
+that pops certain registers off the stack, depending on the arguments
+that have been passed to the function.  Since this is a property of the
+call site, not of the called function, @code{RETURN_POPS_ARGS} is not
+appropriate.
+@end defmac
+
+@node Register Arguments
+@subsection Passing Arguments in Registers
+@cindex arguments in registers
+@cindex registers arguments
+
+This section describes the macros which let you control how various
+types of arguments are passed in registers or how they are arranged in
+the stack.
+
+@defmac FUNCTION_ARG (@var{cum}, @var{mode}, @var{type}, @var{named})
+A C expression that controls whether a function argument is passed
+in a register, and which register.
+
+The arguments are @var{cum}, which summarizes all the previous
+arguments; @var{mode}, the machine mode of the argument; @var{type},
+the data type of the argument as a tree node or 0 if that is not known
+(which happens for C support library functions); and @var{named},
+which is 1 for an ordinary argument and 0 for nameless arguments that
+correspond to @samp{@dots{}} in the called function's prototype.
+@var{type} can be an incomplete type if a syntax error has previously
+occurred.
+
+The value of the expression is usually either a @code{reg} RTX for the
+hard register in which to pass the argument, or zero to pass the
+argument on the stack.
+
+For machines like the VAX and 68000, where normally all arguments are
+pushed, zero suffices as a definition.
+
+The value of the expression can also be a @code{parallel} RTX@.  This is
+used when an argument is passed in multiple locations.  The mode of the
+@code{parallel} should be the mode of the entire argument.  The
+@code{parallel} holds any number of @code{expr_list} pairs; each one
+describes where part of the argument is passed.  In each
+@code{expr_list} the first operand must be a @code{reg} RTX for the hard
+register in which to pass this part of the argument, and the mode of the
+register RTX indicates how large this part of the argument is.  The
+second operand of the @code{expr_list} is a @code{const_int} which gives
+the offset in bytes into the entire argument of where this part starts.
+As a special exception the first @code{expr_list} in the @code{parallel}
+RTX may have a first operand of zero.  This indicates that the entire
+argument is also stored on the stack.
+
+The last time this macro is called, it is called with @code{MODE ==
+VOIDmode}, and its result is passed to the @code{call} or @code{call_value}
+pattern as operands 2 and 3 respectively.
+
+@cindex @file{stdarg.h} and register arguments
+The usual way to make the ISO library @file{stdarg.h} work on a machine
+where some arguments are usually passed in registers, is to cause
+nameless arguments to be passed on the stack instead.  This is done
+by making @code{FUNCTION_ARG} return 0 whenever @var{named} is 0.
+
+@cindex @code{TARGET_MUST_PASS_IN_STACK}, and @code{FUNCTION_ARG}
+@cindex @code{REG_PARM_STACK_SPACE}, and @code{FUNCTION_ARG}
+You may use the hook @code{targetm.calls.must_pass_in_stack}
+in the definition of this macro to determine if this argument is of a
+type that must be passed in the stack.  If @code{REG_PARM_STACK_SPACE}
+is not defined and @code{FUNCTION_ARG} returns nonzero for such an
+argument, the compiler will abort.  If @code{REG_PARM_STACK_SPACE} is
+defined, the argument will be computed in the stack and then loaded into
+a register.
+@end defmac
+
+@deftypefn {Target Hook} bool TARGET_MUST_PASS_IN_STACK (enum machine_mode @var{mode}, const_tree @var{type})
+This target hook should return @code{true} if we should not pass @var{type}
+solely in registers.  The file @file{expr.h} defines a
+definition that is usually appropriate, refer to @file{expr.h} for additional
+documentation.
+@end deftypefn
+
+@defmac FUNCTION_INCOMING_ARG (@var{cum}, @var{mode}, @var{type}, @var{named})
+Define this macro if the target machine has ``register windows'', so
+that the register in which a function sees an arguments is not
+necessarily the same as the one in which the caller passed the
+argument.
+
+For such machines, @code{FUNCTION_ARG} computes the register in which
+the caller passes the value, and @code{FUNCTION_INCOMING_ARG} should
+be defined in a similar fashion to tell the function being called
+where the arguments will arrive.
+
+If @code{FUNCTION_INCOMING_ARG} is not defined, @code{FUNCTION_ARG}
+serves both purposes.
+@end defmac
+
+@deftypefn {Target Hook} int TARGET_ARG_PARTIAL_BYTES (CUMULATIVE_ARGS *@var{cum}, enum machine_mode @var{mode}, tree @var{type}, bool @var{named})
+This target hook returns the number of bytes at the beginning of an
+argument that must be put in registers.  The value must be zero for
+arguments that are passed entirely in registers or that are entirely
+pushed on the stack.
+
+On some machines, certain arguments must be passed partially in
+registers and partially in memory.  On these machines, typically the
+first few words of arguments are passed in registers, and the rest
+on the stack.  If a multi-word argument (a @code{double} or a
+structure) crosses that boundary, its first few words must be passed
+in registers and the rest must be pushed.  This macro tells the
+compiler when this occurs, and how many bytes should go in registers.
+
+@code{FUNCTION_ARG} for these arguments should return the first
+register to be used by the caller for this argument; likewise
+@code{FUNCTION_INCOMING_ARG}, for the called function.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_PASS_BY_REFERENCE (CUMULATIVE_ARGS *@var{cum}, enum machine_mode @var{mode}, const_tree @var{type}, bool @var{named})
+This target hook should return @code{true} if an argument at the
+position indicated by @var{cum} should be passed by reference.  This
+predicate is queried after target independent reasons for being
+passed by reference, such as @code{TREE_ADDRESSABLE (type)}.
+
+If the hook returns true, a copy of that argument is made in memory and a
+pointer to the argument is passed instead of the argument itself.
+The pointer is passed in whatever way is appropriate for passing a pointer
+to that type.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_CALLEE_COPIES (CUMULATIVE_ARGS *@var{cum}, enum machine_mode @var{mode}, const_tree @var{type}, bool @var{named})
+The function argument described by the parameters to this hook is
+known to be passed by reference.  The hook should return true if the
+function argument should be copied by the callee instead of copied
+by the caller.
+
+For any argument for which the hook returns true, if it can be
+determined that the argument is not modified, then a copy need
+not be generated.
+
+The default version of this hook always returns false.
+@end deftypefn
+
+@defmac CUMULATIVE_ARGS
+A C type for declaring a variable that is used as the first argument of
+@code{FUNCTION_ARG} and other related values.  For some target machines,
+the type @code{int} suffices and can hold the number of bytes of
+argument so far.
+
+There is no need to record in @code{CUMULATIVE_ARGS} anything about the
+arguments that have been passed on the stack.  The compiler has other
+variables to keep track of that.  For target machines on which all
+arguments are passed on the stack, there is no need to store anything in
+@code{CUMULATIVE_ARGS}; however, the data structure must exist and
+should not be empty, so use @code{int}.
+@end defmac
+
+@defmac OVERRIDE_ABI_FORMAT (@var{fndecl})
+If defined, this macro is called before generating any code for a
+function, but after the @var{cfun} descriptor for the function has been
+created.  The back end may use this macro to update @var{cfun} to
+reflect an ABI other than that which would normally be used by default.
+If the compiler is generating code for a compiler-generated function,
+@var{fndecl} may be @code{NULL}.
+@end defmac
+
+@defmac INIT_CUMULATIVE_ARGS (@var{cum}, @var{fntype}, @var{libname}, @var{fndecl}, @var{n_named_args})
+A C statement (sans semicolon) for initializing the variable
+@var{cum} for the state at the beginning of the argument list.  The
+variable has type @code{CUMULATIVE_ARGS}.  The value of @var{fntype}
+is the tree node for the data type of the function which will receive
+the args, or 0 if the args are to a compiler support library function.
+For direct calls that are not libcalls, @var{fndecl} contain the
+declaration node of the function.  @var{fndecl} is also set when
+@code{INIT_CUMULATIVE_ARGS} is used to find arguments for the function
+being compiled.  @var{n_named_args} is set to the number of named
+arguments, including a structure return address if it is passed as a
+parameter, when making a call.  When processing incoming arguments,
+@var{n_named_args} is set to @minus{}1.
+
+When processing a call to a compiler support library function,
+@var{libname} identifies which one.  It is a @code{symbol_ref} rtx which
+contains the name of the function, as a string.  @var{libname} is 0 when
+an ordinary C function call is being processed.  Thus, each time this
+macro is called, either @var{libname} or @var{fntype} is nonzero, but
+never both of them at once.
+@end defmac
+
+@defmac INIT_CUMULATIVE_LIBCALL_ARGS (@var{cum}, @var{mode}, @var{libname})
+Like @code{INIT_CUMULATIVE_ARGS} but only used for outgoing libcalls,
+it gets a @code{MODE} argument instead of @var{fntype}, that would be
+@code{NULL}.  @var{indirect} would always be zero, too.  If this macro
+is not defined, @code{INIT_CUMULATIVE_ARGS (cum, NULL_RTX, libname,
+0)} is used instead.
+@end defmac
+
+@defmac INIT_CUMULATIVE_INCOMING_ARGS (@var{cum}, @var{fntype}, @var{libname})
+Like @code{INIT_CUMULATIVE_ARGS} but overrides it for the purposes of
+finding the arguments for the function being compiled.  If this macro is
+undefined, @code{INIT_CUMULATIVE_ARGS} is used instead.
+
+The value passed for @var{libname} is always 0, since library routines
+with special calling conventions are never compiled with GCC@.  The
+argument @var{libname} exists for symmetry with
+@code{INIT_CUMULATIVE_ARGS}.
+@c could use "this macro" in place of @code{INIT_CUMULATIVE_ARGS}, maybe.
+@c --mew 5feb93   i switched the order of the sentences.  --mew 10feb93
+@end defmac
+
+@defmac FUNCTION_ARG_ADVANCE (@var{cum}, @var{mode}, @var{type}, @var{named})
+A C statement (sans semicolon) to update the summarizer variable
+@var{cum} to advance past an argument in the argument list.  The
+values @var{mode}, @var{type} and @var{named} describe that argument.
+Once this is done, the variable @var{cum} is suitable for analyzing
+the @emph{following} argument with @code{FUNCTION_ARG}, etc.
+
+This macro need not do anything if the argument in question was passed
+on the stack.  The compiler knows how to track the amount of stack space
+used for arguments without any special help.
+@end defmac
+
+@defmac FUNCTION_ARG_OFFSET (@var{mode}, @var{type})
+If defined, a C expression that is the number of bytes to add to the
+offset of the argument passed in memory.  This is needed for the SPU,
+which passes @code{char} and @code{short} arguments in the preferred
+slot that is in the middle of the quad word instead of starting at the
+top.
+@end defmac
+
+@defmac FUNCTION_ARG_PADDING (@var{mode}, @var{type})
+If defined, a C expression which determines whether, and in which direction,
+to pad out an argument with extra space.  The value should be of type
+@code{enum direction}: either @code{upward} to pad above the argument,
+@code{downward} to pad below, or @code{none} to inhibit padding.
+
+The @emph{amount} of padding is always just enough to reach the next
+multiple of @code{TARGET_FUNCTION_ARG_BOUNDARY}; this macro does not
+control it.
+
+This macro has a default definition which is right for most systems.
+For little-endian machines, the default is to pad upward.  For
+big-endian machines, the default is to pad downward for an argument of
+constant size shorter than an @code{int}, and upward otherwise.
+@end defmac
+
+@defmac PAD_VARARGS_DOWN
+If defined, a C expression which determines whether the default
+implementation of va_arg will attempt to pad down before reading the
+next argument, if that argument is smaller than its aligned space as
+controlled by @code{PARM_BOUNDARY}.  If this macro is not defined, all such
+arguments are padded down if @code{BYTES_BIG_ENDIAN} is true.
+@end defmac
+
+@defmac BLOCK_REG_PADDING (@var{mode}, @var{type}, @var{first})
+Specify padding for the last element of a block move between registers and
+memory.  @var{first} is nonzero if this is the only element.  Defining this
+macro allows better control of register function parameters on big-endian
+machines, without using @code{PARALLEL} rtl.  In particular,
+@code{MUST_PASS_IN_STACK} need not test padding and mode of types in
+registers, as there is no longer a "wrong" part of a register;  For example,
+a three byte aggregate may be passed in the high part of a register if so
+required.
+@end defmac
+
+@deftypefn {Target Hook} {unsigned int} TARGET_FUNCTION_ARG_BOUNDARY (enum machine_mode @var{mode}, const_tree @var{type})
+This hook returns the alignment boundary, in bits, of an argument
+with the specified mode and type.  The default hook returns
+@code{PARM_BOUNDARY} for all arguments.
+@end deftypefn
+
+@defmac FUNCTION_ARG_REGNO_P (@var{regno})
+A C expression that is nonzero if @var{regno} is the number of a hard
+register in which function arguments are sometimes passed.  This does
+@emph{not} include implicit arguments such as the static chain and
+the structure-value address.  On many machines, no registers can be
+used for this purpose since all function arguments are pushed on the
+stack.
+@end defmac
+
+@deftypefn {Target Hook} bool TARGET_SPLIT_COMPLEX_ARG (const_tree @var{type})
+This hook should return true if parameter of type @var{type} are passed
+as two scalar parameters.  By default, GCC will attempt to pack complex
+arguments into the target's word size.  Some ABIs require complex arguments
+to be split and treated as their individual components.  For example, on
+AIX64, complex floats should be passed in a pair of floating point
+registers, even though a complex float would fit in one 64-bit floating
+point register.
+
+The default value of this hook is @code{NULL}, which is treated as always
+false.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_BUILD_BUILTIN_VA_LIST (void)
+This hook returns a type node for @code{va_list} for the target.
+The default version of the hook returns @code{void*}.
+@end deftypefn
+
+@deftypefn {Target Hook} int TARGET_ENUM_VA_LIST_P (int @var{idx}, const char **@var{pname}, tree *@var{ptree})
+This target hook is used in function @code{c_common_nodes_and_builtins}
+to iterate through the target specific builtin types for va_list. The
+variable @var{idx} is used as iterator. @var{pname} has to be a pointer
+to a @code{const char *} and @var{ptree} a pointer to a @code{tree} typed
+variable.
+The arguments @var{pname} and @var{ptree} are used to store the result of
+this macro and are set to the name of the va_list builtin type and its
+internal type.
+If the return value of this macro is zero, then there is no more element.
+Otherwise the @var{IDX} should be increased for the next call of this
+macro to iterate through all types.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_FN_ABI_VA_LIST (tree @var{fndecl})
+This hook returns the va_list type of the calling convention specified by
+@var{fndecl}.
+The default version of this hook returns @code{va_list_type_node}.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_CANONICAL_VA_LIST_TYPE (tree @var{type})
+This hook returns the va_list type of the calling convention specified by the
+type of @var{type}. If @var{type} is not a valid va_list type, it returns
+@code{NULL_TREE}.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_GIMPLIFY_VA_ARG_EXPR (tree @var{valist}, tree @var{type}, gimple_seq *@var{pre_p}, gimple_seq *@var{post_p})
+This hook performs target-specific gimplification of
+@code{VA_ARG_EXPR}.  The first two parameters correspond to the
+arguments to @code{va_arg}; the latter two are as in
+@code{gimplify.c:gimplify_expr}.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_VALID_POINTER_MODE (enum machine_mode @var{mode})
+Define this to return nonzero if the port can handle pointers
+with machine mode @var{mode}.  The default version of this
+hook returns true for both @code{ptr_mode} and @code{Pmode}.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_REF_MAY_ALIAS_ERRNO (struct ao_ref_s *@var{ref})
+Define this to return nonzero if the memory reference @var{ref}  may alias with the system C library errno location.  The default  version of this hook assumes the system C library errno location  is either a declaration of type int or accessed by dereferencing  a pointer to int.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_SCALAR_MODE_SUPPORTED_P (enum machine_mode @var{mode})
+Define this to return nonzero if the port is prepared to handle
+insns involving scalar mode @var{mode}.  For a scalar mode to be
+considered supported, all the basic arithmetic and comparisons
+must work.
+
+The default version of this hook returns true for any mode
+required to handle the basic C types (as defined by the port).
+Included here are the double-word arithmetic supported by the
+code in @file{optabs.c}.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_VECTOR_MODE_SUPPORTED_P (enum machine_mode @var{mode})
+Define this to return nonzero if the port is prepared to handle
+insns involving vector mode @var{mode}.  At the very least, it
+must have move patterns for this mode.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P (enum machine_mode @var{mode})
+Define this to return nonzero for machine modes for which the port has
+small register classes.  If this target hook returns nonzero for a given
+@var{mode}, the compiler will try to minimize the lifetime of registers
+in @var{mode}.  The hook may be called with @code{VOIDmode} as argument.
+In this case, the hook is expected to return nonzero if it returns nonzero
+for any mode.
+
+On some machines, it is risky to let hard registers live across arbitrary
+insns.  Typically, these machines have instructions that require values
+to be in specific registers (like an accumulator), and reload will fail
+if the required hard register is used for another purpose across such an
+insn.
+
+Passes before reload do not know which hard registers will be used
+in an instruction, but the machine modes of the registers set or used in
+the instruction are already known.  And for some machines, register
+classes are small for, say, integer registers but not for floating point
+registers.  For example, the AMD x86-64 architecture requires specific
+registers for the legacy x86 integer instructions, but there are many
+SSE registers for floating point operations.  On such targets, a good
+strategy may be to return nonzero from this hook for @code{INTEGRAL_MODE_P}
+machine modes but zero for the SSE register classes.
+
+The default version of this hook returns false for any mode.  It is always
+safe to redefine this hook to return with a nonzero value.  But if you
+unnecessarily define it, you will reduce the amount of optimizations
+that can be performed in some cases.  If you do not define this hook
+to return a nonzero value when it is required, the compiler will run out
+of spill registers and print a fatal error message.
+@end deftypefn
+
+@deftypevr {Target Hook} {unsigned int} TARGET_FLAGS_REGNUM
+If the target has a dedicated flags register, and it needs to use the post-reload comparison elimination pass, then this value should be set appropriately.
+@end deftypevr
+
+@node Scalar Return
+@subsection How Scalar Function Values Are Returned
+@cindex return values in registers
+@cindex values, returned by functions
+@cindex scalars, returned as values
+
+This section discusses the macros that control returning scalars as
+values---values that can fit in registers.
+
+@deftypefn {Target Hook} rtx TARGET_FUNCTION_VALUE (const_tree @var{ret_type}, const_tree @var{fn_decl_or_type}, bool @var{outgoing})
+
+Define this to return an RTX representing the place where a function
+returns or receives a value of data type @var{ret_type}, a tree node
+representing a data type.  @var{fn_decl_or_type} is a tree node
+representing @code{FUNCTION_DECL} or @code{FUNCTION_TYPE} of a
+function being called.  If @var{outgoing} is false, the hook should
+compute the register in which the caller will see the return value.
+Otherwise, the hook should return an RTX representing the place where
+a function returns a value.
+
+On many machines, only @code{TYPE_MODE (@var{ret_type})} is relevant.
+(Actually, on most machines, scalar values are returned in the same
+place regardless of mode.)  The value of the expression is usually a
+@code{reg} RTX for the hard register where the return value is stored.
+The value can also be a @code{parallel} RTX, if the return value is in
+multiple places.  See @code{FUNCTION_ARG} for an explanation of the
+@code{parallel} form.   Note that the callee will populate every
+location specified in the @code{parallel}, but if the first element of
+the @code{parallel} contains the whole return value, callers will use
+that element as the canonical location and ignore the others.  The m68k
+port uses this type of @code{parallel} to return pointers in both
+@samp{%a0} (the canonical location) and @samp{%d0}.
+
+If @code{TARGET_PROMOTE_FUNCTION_RETURN} returns true, you must apply
+the same promotion rules specified in @code{PROMOTE_MODE} if
+@var{valtype} is a scalar type.
+
+If the precise function being called is known, @var{func} is a tree
+node (@code{FUNCTION_DECL}) for it; otherwise, @var{func} is a null
+pointer.  This makes it possible to use a different value-returning
+convention for specific functions when all their calls are
+known.
+
+Some target machines have ``register windows'' so that the register in
+which a function returns its value is not the same as the one in which
+the caller sees the value.  For such machines, you should return
+different RTX depending on @var{outgoing}.
+
+@code{TARGET_FUNCTION_VALUE} is not used for return values with
+aggregate data types, because these are returned in another way.  See
+@code{TARGET_STRUCT_VALUE_RTX} and related macros, below.
+@end deftypefn
+
+@defmac FUNCTION_VALUE (@var{valtype}, @var{func})
+This macro has been deprecated.  Use @code{TARGET_FUNCTION_VALUE} for
+a new target instead.
+@end defmac
+
+@defmac LIBCALL_VALUE (@var{mode})
+A C expression to create an RTX representing the place where a library
+function returns a value of mode @var{mode}.
+
+Note that ``library function'' in this context means a compiler
+support routine, used to perform arithmetic, whose name is known
+specially by the compiler and was not mentioned in the C code being
+compiled.
+@end defmac
+
+@deftypefn {Target Hook} rtx TARGET_LIBCALL_VALUE (enum machine_mode @var{mode}, const_rtx @var{fun})
+Define this hook if the back-end needs to know the name of the libcall
+function in order to determine where the result should be returned.  
+
+The mode of the result is given by @var{mode} and the name of the called
+library function is given by @var{fun}.  The hook should return an RTX 
+representing the place where the library function result will be returned.
+
+If this hook is not defined, then LIBCALL_VALUE will be used.
+@end deftypefn
+
+@defmac FUNCTION_VALUE_REGNO_P (@var{regno})
+A C expression that is nonzero if @var{regno} is the number of a hard
+register in which the values of called function may come back.
+
+A register whose use for returning values is limited to serving as the
+second of a pair (for a value of type @code{double}, say) need not be
+recognized by this macro.  So for most machines, this definition
+suffices:
+
+@smallexample
+#define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
+@end smallexample
+
+If the machine has register windows, so that the caller and the called
+function use different registers for the return value, this macro
+should recognize only the caller's register numbers.
+
+This macro has been deprecated.  Use @code{TARGET_FUNCTION_VALUE_REGNO_P}
+for a new target instead.
+@end defmac
+
+@deftypefn {Target Hook} bool TARGET_FUNCTION_VALUE_REGNO_P (const unsigned int @var{regno})
+A target hook that return @code{true} if @var{regno} is the number of a hard
+register in which the values of called function may come back.
+
+A register whose use for returning values is limited to serving as the
+second of a pair (for a value of type @code{double}, say) need not be
+recognized by this target hook.
+
+If the machine has register windows, so that the caller and the called
+function use different registers for the return value, this target hook
+should recognize only the caller's register numbers.
+
+If this hook is not defined, then FUNCTION_VALUE_REGNO_P will be used.
+@end deftypefn
+
+@defmac APPLY_RESULT_SIZE
+Define this macro if @samp{untyped_call} and @samp{untyped_return}
+need more space than is implied by @code{FUNCTION_VALUE_REGNO_P} for
+saving and restoring an arbitrary return value.
+@end defmac
+
+@deftypefn {Target Hook} bool TARGET_RETURN_IN_MSB (const_tree @var{type})
+This hook should return true if values of type @var{type} are returned
+at the most significant end of a register (in other words, if they are
+padded at the least significant end).  You can assume that @var{type}
+is returned in a register; the caller is required to check this.
+
+Note that the register provided by @code{TARGET_FUNCTION_VALUE} must
+be able to hold the complete return value.  For example, if a 1-, 2-
+or 3-byte structure is returned at the most significant end of a
+4-byte register, @code{TARGET_FUNCTION_VALUE} should provide an
+@code{SImode} rtx.
+@end deftypefn
+
+@node Aggregate Return
+@subsection How Large Values Are Returned
+@cindex aggregates as return values
+@cindex large return values
+@cindex returning aggregate values
+@cindex structure value address
+
+When a function value's mode is @code{BLKmode} (and in some other
+cases), the value is not returned according to
+@code{TARGET_FUNCTION_VALUE} (@pxref{Scalar Return}).  Instead, the
+caller passes the address of a block of memory in which the value
+should be stored.  This address is called the @dfn{structure value
+address}.
+
+This section describes how to control returning structure values in
+memory.
+
+@deftypefn {Target Hook} bool TARGET_RETURN_IN_MEMORY (const_tree @var{type}, const_tree @var{fntype})
+This target hook should return a nonzero value to say to return the
+function value in memory, just as large structures are always returned.
+Here @var{type} will be the data type of the value, and @var{fntype}
+will be the type of the function doing the returning, or @code{NULL} for
+libcalls.
+
+Note that values of mode @code{BLKmode} must be explicitly handled
+by this function.  Also, the option @option{-fpcc-struct-return}
+takes effect regardless of this macro.  On most systems, it is
+possible to leave the hook undefined; this causes a default
+definition to be used, whose value is the constant 1 for @code{BLKmode}
+values, and 0 otherwise.
+
+Do not use this hook to indicate that structures and unions should always
+be returned in memory.  You should instead use @code{DEFAULT_PCC_STRUCT_RETURN}
+to indicate this.
+@end deftypefn
+
+@defmac DEFAULT_PCC_STRUCT_RETURN
+Define this macro to be 1 if all structure and union return values must be
+in memory.  Since this results in slower code, this should be defined
+only if needed for compatibility with other compilers or with an ABI@.
+If you define this macro to be 0, then the conventions used for structure
+and union return values are decided by the @code{TARGET_RETURN_IN_MEMORY}
+target hook.
+
+If not defined, this defaults to the value 1.
+@end defmac
+
+@deftypefn {Target Hook} rtx TARGET_STRUCT_VALUE_RTX (tree @var{fndecl}, int @var{incoming})
+This target hook should return the location of the structure value
+address (normally a @code{mem} or @code{reg}), or 0 if the address is
+passed as an ``invisible'' first argument.  Note that @var{fndecl} may
+be @code{NULL}, for libcalls.  You do not need to define this target
+hook if the address is always passed as an ``invisible'' first
+argument.
+
+On some architectures the place where the structure value address
+is found by the called function is not the same place that the
+caller put it.  This can be due to register windows, or it could
+be because the function prologue moves it to a different place.
+@var{incoming} is @code{1} or @code{2} when the location is needed in
+the context of the called function, and @code{0} in the context of
+the caller.
+
+If @var{incoming} is nonzero and the address is to be found on the
+stack, return a @code{mem} which refers to the frame pointer. If
+@var{incoming} is @code{2}, the result is being used to fetch the
+structure value address at the beginning of a function.  If you need
+to emit adjusting code, you should do it at this point.
+@end deftypefn
+
+@defmac PCC_STATIC_STRUCT_RETURN
+Define this macro if the usual system convention on the target machine
+for returning structures and unions is for the called function to return
+the address of a static variable containing the value.
+
+Do not define this if the usual system convention is for the caller to
+pass an address to the subroutine.
+
+This macro has effect in @option{-fpcc-struct-return} mode, but it does
+nothing when you use @option{-freg-struct-return} mode.
+@end defmac
+
+@deftypefn {Target Hook} {enum machine_mode} TARGET_GET_RAW_RESULT_MODE (int @var{regno})
+This target hook returns the mode to be used when accessing raw return registers in @code{__builtin_return}.  Define this macro if the value in @var{reg_raw_mode} is not correct.
+@end deftypefn
+
+@deftypefn {Target Hook} {enum machine_mode} TARGET_GET_RAW_ARG_MODE (int @var{regno})
+This target hook returns the mode to be used when accessing raw argument registers in @code{__builtin_apply_args}.  Define this macro if the value in @var{reg_raw_mode} is not correct.
+@end deftypefn
+
+@node Caller Saves
+@subsection Caller-Saves Register Allocation
+
+If you enable it, GCC can save registers around function calls.  This
+makes it possible to use call-clobbered registers to hold variables that
+must live across calls.
+
+@defmac CALLER_SAVE_PROFITABLE (@var{refs}, @var{calls})
+A C expression to determine whether it is worthwhile to consider placing
+a pseudo-register in a call-clobbered hard register and saving and
+restoring it around each function call.  The expression should be 1 when
+this is worth doing, and 0 otherwise.
+
+If you don't define this macro, a default is used which is good on most
+machines: @code{4 * @var{calls} < @var{refs}}.
+@end defmac
+
+@defmac HARD_REGNO_CALLER_SAVE_MODE (@var{regno}, @var{nregs})
+A C expression specifying which mode is required for saving @var{nregs}
+of a pseudo-register in call-clobbered hard register @var{regno}.  If
+@var{regno} is unsuitable for caller save, @code{VOIDmode} should be
+returned.  For most machines this macro need not be defined since GCC
+will select the smallest suitable mode.
+@end defmac
+
+@node Function Entry
+@subsection Function Entry and Exit
+@cindex function entry and exit
+@cindex prologue
+@cindex epilogue
+
+This section describes the macros that output function entry
+(@dfn{prologue}) and exit (@dfn{epilogue}) code.
+
+@deftypefn {Target Hook} void TARGET_ASM_FUNCTION_PROLOGUE (FILE *@var{file}, HOST_WIDE_INT @var{size})
+If defined, a function that outputs the assembler code for entry to a
+function.  The prologue is responsible for setting up the stack frame,
+initializing the frame pointer register, saving registers that must be
+saved, and allocating @var{size} additional bytes of storage for the
+local variables.  @var{size} is an integer.  @var{file} is a stdio
+stream to which the assembler code should be output.
+
+The label for the beginning of the function need not be output by this
+macro.  That has already been done when the macro is run.
+
+@findex regs_ever_live
+To determine which registers to save, the macro can refer to the array
+@code{regs_ever_live}: element @var{r} is nonzero if hard register
+@var{r} is used anywhere within the function.  This implies the function
+prologue should save register @var{r}, provided it is not one of the
+call-used registers.  (@code{TARGET_ASM_FUNCTION_EPILOGUE} must likewise use
+@code{regs_ever_live}.)
+
+On machines that have ``register windows'', the function entry code does
+not save on the stack the registers that are in the windows, even if
+they are supposed to be preserved by function calls; instead it takes
+appropriate steps to ``push'' the register stack, if any non-call-used
+registers are used in the function.
+
+@findex frame_pointer_needed
+On machines where functions may or may not have frame-pointers, the
+function entry code must vary accordingly; it must set up the frame
+pointer if one is wanted, and not otherwise.  To determine whether a
+frame pointer is in wanted, the macro can refer to the variable
+@code{frame_pointer_needed}.  The variable's value will be 1 at run
+time in a function that needs a frame pointer.  @xref{Elimination}.
+
+The function entry code is responsible for allocating any stack space
+required for the function.  This stack space consists of the regions
+listed below.  In most cases, these regions are allocated in the
+order listed, with the last listed region closest to the top of the
+stack (the lowest address if @code{STACK_GROWS_DOWNWARD} is defined, and
+the highest address if it is not defined).  You can use a different order
+for a machine if doing so is more convenient or required for
+compatibility reasons.  Except in cases where required by standard
+or by a debugger, there is no reason why the stack layout used by GCC
+need agree with that used by other compilers for a machine.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_ASM_FUNCTION_END_PROLOGUE (FILE *@var{file})
+If defined, a function that outputs assembler code at the end of a
+prologue.  This should be used when the function prologue is being
+emitted as RTL, and you have some extra assembler that needs to be
+emitted.  @xref{prologue instruction pattern}.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_ASM_FUNCTION_BEGIN_EPILOGUE (FILE *@var{file})
+If defined, a function that outputs assembler code at the start of an
+epilogue.  This should be used when the function epilogue is being
+emitted as RTL, and you have some extra assembler that needs to be
+emitted.  @xref{epilogue instruction pattern}.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_ASM_FUNCTION_EPILOGUE (FILE *@var{file}, HOST_WIDE_INT @var{size})
+If defined, a function that outputs the assembler code for exit from a
+function.  The epilogue is responsible for restoring the saved
+registers and stack pointer to their values when the function was
+called, and returning control to the caller.  This macro takes the
+same arguments as the macro @code{TARGET_ASM_FUNCTION_PROLOGUE}, and the
+registers to restore are determined from @code{regs_ever_live} and
+@code{CALL_USED_REGISTERS} in the same way.
+
+On some machines, there is a single instruction that does all the work
+of returning from the function.  On these machines, give that
+instruction the name @samp{return} and do not define the macro
+@code{TARGET_ASM_FUNCTION_EPILOGUE} at all.
+
+Do not define a pattern named @samp{return} if you want the
+@code{TARGET_ASM_FUNCTION_EPILOGUE} to be used.  If you want the target
+switches to control whether return instructions or epilogues are used,
+define a @samp{return} pattern with a validity condition that tests the
+target switches appropriately.  If the @samp{return} pattern's validity
+condition is false, epilogues will be used.
+
+On machines where functions may or may not have frame-pointers, the
+function exit code must vary accordingly.  Sometimes the code for these
+two cases is completely different.  To determine whether a frame pointer
+is wanted, the macro can refer to the variable
+@code{frame_pointer_needed}.  The variable's value will be 1 when compiling
+a function that needs a frame pointer.
+
+Normally, @code{TARGET_ASM_FUNCTION_PROLOGUE} and
+@code{TARGET_ASM_FUNCTION_EPILOGUE} must treat leaf functions specially.
+The C variable @code{current_function_is_leaf} is nonzero for such a
+function.  @xref{Leaf Functions}.
+
+On some machines, some functions pop their arguments on exit while
+others leave that for the caller to do.  For example, the 68020 when
+given @option{-mrtd} pops arguments in functions that take a fixed
+number of arguments.
+
+@findex current_function_pops_args
+Your definition of the macro @code{RETURN_POPS_ARGS} decides which
+functions pop their own arguments.  @code{TARGET_ASM_FUNCTION_EPILOGUE}
+needs to know what was decided.  The number of bytes of the current
+function's arguments that this function should pop is available in
+@code{crtl->args.pops_args}.  @xref{Scalar Return}.
+@end deftypefn
+
+@itemize @bullet
+@item
+@findex current_function_pretend_args_size
+A region of @code{current_function_pretend_args_size} bytes of
+uninitialized space just underneath the first argument arriving on the
+stack.  (This may not be at the very start of the allocated stack region
+if the calling sequence has pushed anything else since pushing the stack
+arguments.  But usually, on such machines, nothing else has been pushed
+yet, because the function prologue itself does all the pushing.)  This
+region is used on machines where an argument may be passed partly in
+registers and partly in memory, and, in some cases to support the
+features in @code{<stdarg.h>}.
+
+@item
+An area of memory used to save certain registers used by the function.
+The size of this area, which may also include space for such things as
+the return address and pointers to previous stack frames, is
+machine-specific and usually depends on which registers have been used
+in the function.  Machines with register windows often do not require
+a save area.
+
+@item
+A region of at least @var{size} bytes, possibly rounded up to an allocation
+boundary, to contain the local variables of the function.  On some machines,
+this region and the save area may occur in the opposite order, with the
+save area closer to the top of the stack.
+
+@item
+@cindex @code{ACCUMULATE_OUTGOING_ARGS} and stack frames
+Optionally, when @code{ACCUMULATE_OUTGOING_ARGS} is defined, a region of
+@code{current_function_outgoing_args_size} bytes to be used for outgoing
+argument lists of the function.  @xref{Stack Arguments}.
+@end itemize
+
+@defmac EXIT_IGNORE_STACK
+Define this macro as a C expression that is nonzero if the return
+instruction or the function epilogue ignores the value of the stack
+pointer; in other words, if it is safe to delete an instruction to
+adjust the stack pointer before a return from the function.  The
+default is 0.
+
+Note that this macro's value is relevant only for functions for which
+frame pointers are maintained.  It is never safe to delete a final
+stack adjustment in a function that has no frame pointer, and the
+compiler knows this regardless of @code{EXIT_IGNORE_STACK}.
+@end defmac
+
+@defmac EPILOGUE_USES (@var{regno})
+Define this macro as a C expression that is nonzero for registers that are
+used by the epilogue or the @samp{return} pattern.  The stack and frame
+pointer registers are already assumed to be used as needed.
+@end defmac
+
+@defmac EH_USES (@var{regno})
+Define this macro as a C expression that is nonzero for registers that are
+used by the exception handling mechanism, and so should be considered live
+on entry to an exception edge.
+@end defmac
+
+@defmac DELAY_SLOTS_FOR_EPILOGUE
+Define this macro if the function epilogue contains delay slots to which
+instructions from the rest of the function can be ``moved''.  The
+definition should be a C expression whose value is an integer
+representing the number of delay slots there.
+@end defmac
+
+@defmac ELIGIBLE_FOR_EPILOGUE_DELAY (@var{insn}, @var{n})
+A C expression that returns 1 if @var{insn} can be placed in delay
+slot number @var{n} of the epilogue.
+
+The argument @var{n} is an integer which identifies the delay slot now
+being considered (since different slots may have different rules of
+eligibility).  It is never negative and is always less than the number
+of epilogue delay slots (what @code{DELAY_SLOTS_FOR_EPILOGUE} returns).
+If you reject a particular insn for a given delay slot, in principle, it
+may be reconsidered for a subsequent delay slot.  Also, other insns may
+(at least in principle) be considered for the so far unfilled delay
+slot.
+
+@findex current_function_epilogue_delay_list
+@findex final_scan_insn
+The insns accepted to fill the epilogue delay slots are put in an RTL
+list made with @code{insn_list} objects, stored in the variable
+@code{current_function_epilogue_delay_list}.  The insn for the first
+delay slot comes first in the list.  Your definition of the macro
+@code{TARGET_ASM_FUNCTION_EPILOGUE} should fill the delay slots by
+outputting the insns in this list, usually by calling
+@code{final_scan_insn}.
+
+You need not define this macro if you did not define
+@code{DELAY_SLOTS_FOR_EPILOGUE}.
+@end defmac
+
+@deftypefn {Target Hook} void TARGET_ASM_OUTPUT_MI_THUNK (FILE *@var{file}, tree @var{thunk_fndecl}, HOST_WIDE_INT @var{delta}, HOST_WIDE_INT @var{vcall_offset}, tree @var{function})
+A function that outputs the assembler code for a thunk
+function, used to implement C++ virtual function calls with multiple
+inheritance.  The thunk acts as a wrapper around a virtual function,
+adjusting the implicit object parameter before handing control off to
+the real function.
+
+First, emit code to add the integer @var{delta} to the location that
+contains the incoming first argument.  Assume that this argument
+contains a pointer, and is the one used to pass the @code{this} pointer
+in C++.  This is the incoming argument @emph{before} the function prologue,
+e.g.@: @samp{%o0} on a sparc.  The addition must preserve the values of
+all other incoming arguments.
+
+Then, if @var{vcall_offset} is nonzero, an additional adjustment should be
+made after adding @code{delta}.  In particular, if @var{p} is the
+adjusted pointer, the following adjustment should be made:
+
+@smallexample
+p += (*((ptrdiff_t **)p))[vcall_offset/sizeof(ptrdiff_t)]
+@end smallexample
+
+After the additions, emit code to jump to @var{function}, which is a
+@code{FUNCTION_DECL}.  This is a direct pure jump, not a call, and does
+not touch the return address.  Hence returning from @var{FUNCTION} will
+return to whoever called the current @samp{thunk}.
+
+The effect must be as if @var{function} had been called directly with
+the adjusted first argument.  This macro is responsible for emitting all
+of the code for a thunk function; @code{TARGET_ASM_FUNCTION_PROLOGUE}
+and @code{TARGET_ASM_FUNCTION_EPILOGUE} are not invoked.
+
+The @var{thunk_fndecl} is redundant.  (@var{delta} and @var{function}
+have already been extracted from it.)  It might possibly be useful on
+some targets, but probably not.
+
+If you do not define this macro, the target-independent code in the C++
+front end will generate a less efficient heavyweight thunk that calls
+@var{function} instead of jumping to it.  The generic approach does
+not support varargs.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_ASM_CAN_OUTPUT_MI_THUNK (const_tree @var{thunk_fndecl}, HOST_WIDE_INT @var{delta}, HOST_WIDE_INT @var{vcall_offset}, const_tree @var{function})
+A function that returns true if TARGET_ASM_OUTPUT_MI_THUNK would be able
+to output the assembler code for the thunk function specified by the
+arguments it is passed, and false otherwise.  In the latter case, the
+generic approach will be used by the C++ front end, with the limitations
+previously exposed.
+@end deftypefn
+
+@node Profiling
+@subsection Generating Code for Profiling
+@cindex profiling, code generation
+
+These macros will help you generate code for profiling.
+
+@defmac FUNCTION_PROFILER (@var{file}, @var{labelno})
+A C statement or compound statement to output to @var{file} some
+assembler code to call the profiling subroutine @code{mcount}.
+
+@findex mcount
+The details of how @code{mcount} expects to be called are determined by
+your operating system environment, not by GCC@.  To figure them out,
+compile a small program for profiling using the system's installed C
+compiler and look at the assembler code that results.
+
+Older implementations of @code{mcount} expect the address of a counter
+variable to be loaded into some register.  The name of this variable is
+@samp{LP} followed by the number @var{labelno}, so you would generate
+the name using @samp{LP%d} in a @code{fprintf}.
+@end defmac
+
+@defmac PROFILE_HOOK
+A C statement or compound statement to output to @var{file} some assembly
+code to call the profiling subroutine @code{mcount} even the target does
+not support profiling.
+@end defmac
+
+@defmac NO_PROFILE_COUNTERS
+Define this macro to be an expression with a nonzero value if the
+@code{mcount} subroutine on your system does not need a counter variable
+allocated for each function.  This is true for almost all modern
+implementations.  If you define this macro, you must not use the
+@var{labelno} argument to @code{FUNCTION_PROFILER}.
+@end defmac
+
+@defmac PROFILE_BEFORE_PROLOGUE
+Define this macro if the code for function profiling should come before
+the function prologue.  Normally, the profiling code comes after.
+@end defmac
+
+@node Tail Calls
+@subsection Permitting tail calls
+@cindex tail calls
+
+@deftypefn {Target Hook} bool TARGET_FUNCTION_OK_FOR_SIBCALL (tree @var{decl}, tree @var{exp})
+True if it is ok to do sibling call optimization for the specified
+call expression @var{exp}.  @var{decl} will be the called function,
+or @code{NULL} if this is an indirect call.
+
+It is not uncommon for limitations of calling conventions to prevent
+tail calls to functions outside the current unit of translation, or
+during PIC compilation.  The hook is used to enforce these restrictions,
+as the @code{sibcall} md pattern can not fail, or fall over to a
+``normal'' call.  The criteria for successful sibling call optimization
+may vary greatly between different architectures.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_EXTRA_LIVE_ON_ENTRY (bitmap @var{regs})
+Add any hard registers to @var{regs} that are live on entry to the
+function.  This hook only needs to be defined to provide registers that
+cannot be found by examination of FUNCTION_ARG_REGNO_P, the callee saved
+registers, STATIC_CHAIN_INCOMING_REGNUM, STATIC_CHAIN_REGNUM,
+TARGET_STRUCT_VALUE_RTX, FRAME_POINTER_REGNUM, EH_USES,
+FRAME_POINTER_REGNUM, ARG_POINTER_REGNUM, and the PIC_OFFSET_TABLE_REGNUM.
+@end deftypefn
+
+@node Stack Smashing Protection
+@subsection Stack smashing protection
+@cindex stack smashing protection
+
+@deftypefn {Target Hook} tree TARGET_STACK_PROTECT_GUARD (void)
+This hook returns a @code{DECL} node for the external variable to use
+for the stack protection guard.  This variable is initialized by the
+runtime to some random value and is used to initialize the guard value
+that is placed at the top of the local stack frame.  The type of this
+variable must be @code{ptr_type_node}.
+
+The default version of this hook creates a variable called
+@samp{__stack_chk_guard}, which is normally defined in @file{libgcc2.c}.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_STACK_PROTECT_FAIL (void)
+This hook returns a tree expression that alerts the runtime that the
+stack protect guard variable has been modified.  This expression should
+involve a call to a @code{noreturn} function.
+
+The default version of this hook invokes a function called
+@samp{__stack_chk_fail}, taking no arguments.  This function is
+normally defined in @file{libgcc2.c}.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_SUPPORTS_SPLIT_STACK (bool @var{report}, struct gcc_options *@var{opts})
+Whether this target supports splitting the stack when the options described in @var{opts} have been passed.  This is called after options have been parsed, so the target may reject splitting the stack in some configurations.  The default version of this hook returns false.  If @var{report} is true, this function may issue a warning or error; if @var{report} is false, it must simply return a value
+@end deftypefn
+
+@node Varargs
+@section Implementing the Varargs Macros
+@cindex varargs implementation
+
+GCC comes with an implementation of @code{<varargs.h>} and
+@code{<stdarg.h>} that work without change on machines that pass arguments
+on the stack.  Other machines require their own implementations of
+varargs, and the two machine independent header files must have
+conditionals to include it.
+
+ISO @code{<stdarg.h>} differs from traditional @code{<varargs.h>} mainly in
+the calling convention for @code{va_start}.  The traditional
+implementation takes just one argument, which is the variable in which
+to store the argument pointer.  The ISO implementation of
+@code{va_start} takes an additional second argument.  The user is
+supposed to write the last named argument of the function here.
+
+However, @code{va_start} should not use this argument.  The way to find
+the end of the named arguments is with the built-in functions described
+below.
+
+@defmac __builtin_saveregs ()
+Use this built-in function to save the argument registers in memory so
+that the varargs mechanism can access them.  Both ISO and traditional
+versions of @code{va_start} must use @code{__builtin_saveregs}, unless
+you use @code{TARGET_SETUP_INCOMING_VARARGS} (see below) instead.
+
+On some machines, @code{__builtin_saveregs} is open-coded under the
+control of the target hook @code{TARGET_EXPAND_BUILTIN_SAVEREGS}.  On
+other machines, it calls a routine written in assembler language,
+found in @file{libgcc2.c}.
+
+Code generated for the call to @code{__builtin_saveregs} appears at the
+beginning of the function, as opposed to where the call to
+@code{__builtin_saveregs} is written, regardless of what the code is.
+This is because the registers must be saved before the function starts
+to use them for its own purposes.
+@c i rewrote the first sentence above to fix an overfull hbox. --mew
+@c 10feb93
+@end defmac
+
+@defmac __builtin_next_arg (@var{lastarg})
+This builtin returns the address of the first anonymous stack
+argument, as type @code{void *}.  If @code{ARGS_GROW_DOWNWARD}, it
+returns the address of the location above the first anonymous stack
+argument.  Use it in @code{va_start} to initialize the pointer for
+fetching arguments from the stack.  Also use it in @code{va_start} to
+verify that the second parameter @var{lastarg} is the last named argument
+of the current function.
+@end defmac
+
+@defmac __builtin_classify_type (@var{object})
+Since each machine has its own conventions for which data types are
+passed in which kind of register, your implementation of @code{va_arg}
+has to embody these conventions.  The easiest way to categorize the
+specified data type is to use @code{__builtin_classify_type} together
+with @code{sizeof} and @code{__alignof__}.
+
+@code{__builtin_classify_type} ignores the value of @var{object},
+considering only its data type.  It returns an integer describing what
+kind of type that is---integer, floating, pointer, structure, and so on.
+
+The file @file{typeclass.h} defines an enumeration that you can use to
+interpret the values of @code{__builtin_classify_type}.
+@end defmac
+
+These machine description macros help implement varargs:
+
+@deftypefn {Target Hook} rtx TARGET_EXPAND_BUILTIN_SAVEREGS (void)
+If defined, this hook produces the machine-specific code for a call to
+@code{__builtin_saveregs}.  This code will be moved to the very
+beginning of the function, before any parameter access are made.  The
+return value of this function should be an RTX that contains the value
+to use as the return of @code{__builtin_saveregs}.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SETUP_INCOMING_VARARGS (CUMULATIVE_ARGS *@var{args_so_far}, enum machine_mode @var{mode}, tree @var{type}, int *@var{pretend_args_size}, int @var{second_time})
+This target hook offers an alternative to using
+@code{__builtin_saveregs} and defining the hook
+@code{TARGET_EXPAND_BUILTIN_SAVEREGS}.  Use it to store the anonymous
+register arguments into the stack so that all the arguments appear to
+have been passed consecutively on the stack.  Once this is done, you can
+use the standard implementation of varargs that works for machines that
+pass all their arguments on the stack.
+
+The argument @var{args_so_far} points to the @code{CUMULATIVE_ARGS} data
+structure, containing the values that are obtained after processing the
+named arguments.  The arguments @var{mode} and @var{type} describe the
+last named argument---its machine mode and its data type as a tree node.
+
+The target hook should do two things: first, push onto the stack all the
+argument registers @emph{not} used for the named arguments, and second,
+store the size of the data thus pushed into the @code{int}-valued
+variable pointed to by @var{pretend_args_size}.  The value that you
+store here will serve as additional offset for setting up the stack
+frame.
+
+Because you must generate code to push the anonymous arguments at
+compile time without knowing their data types,
+@code{TARGET_SETUP_INCOMING_VARARGS} is only useful on machines that
+have just a single category of argument register and use it uniformly
+for all data types.
+
+If the argument @var{second_time} is nonzero, it means that the
+arguments of the function are being analyzed for the second time.  This
+happens for an inline function, which is not actually compiled until the
+end of the source file.  The hook @code{TARGET_SETUP_INCOMING_VARARGS} should
+not generate any instructions in this case.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_STRICT_ARGUMENT_NAMING (CUMULATIVE_ARGS *@var{ca})
+Define this hook to return @code{true} if the location where a function
+argument is passed depends on whether or not it is a named argument.
+
+This hook controls how the @var{named} argument to @code{FUNCTION_ARG}
+is set for varargs and stdarg functions.  If this hook returns
+@code{true}, the @var{named} argument is always true for named
+arguments, and false for unnamed arguments.  If it returns @code{false},
+but @code{TARGET_PRETEND_OUTGOING_VARARGS_NAMED} returns @code{true},
+then all arguments are treated as named.  Otherwise, all named arguments
+except the last are treated as named.
+
+You need not define this hook if it always returns @code{false}.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_PRETEND_OUTGOING_VARARGS_NAMED (CUMULATIVE_ARGS *@var{ca})
+If you need to conditionally change ABIs so that one works with
+@code{TARGET_SETUP_INCOMING_VARARGS}, but the other works like neither
+@code{TARGET_SETUP_INCOMING_VARARGS} nor @code{TARGET_STRICT_ARGUMENT_NAMING} was
+defined, then define this hook to return @code{true} if
+@code{TARGET_SETUP_INCOMING_VARARGS} is used, @code{false} otherwise.
+Otherwise, you should not define this hook.
+@end deftypefn
+
+@node Trampolines
+@section Trampolines for Nested Functions
+@cindex trampolines for nested functions
+@cindex nested functions, trampolines for
+
+A @dfn{trampoline} is a small piece of code that is created at run time
+when the address of a nested function is taken.  It normally resides on
+the stack, in the stack frame of the containing function.  These macros
+tell GCC how to generate code to allocate and initialize a
+trampoline.
+
+The instructions in the trampoline must do two things: load a constant
+address into the static chain register, and jump to the real address of
+the nested function.  On CISC machines such as the m68k, this requires
+two instructions, a move immediate and a jump.  Then the two addresses
+exist in the trampoline as word-long immediate operands.  On RISC
+machines, it is often necessary to load each address into a register in
+two parts.  Then pieces of each address form separate immediate
+operands.
+
+The code generated to initialize the trampoline must store the variable
+parts---the static chain value and the function address---into the
+immediate operands of the instructions.  On a CISC machine, this is
+simply a matter of copying each address to a memory reference at the
+proper offset from the start of the trampoline.  On a RISC machine, it
+may be necessary to take out pieces of the address and store them
+separately.
+
+@deftypefn {Target Hook} void TARGET_ASM_TRAMPOLINE_TEMPLATE (FILE *@var{f})
+This hook is called by @code{assemble_trampoline_template} to output,
+on the stream @var{f}, assembler code for a block of data that contains
+the constant parts of a trampoline.  This code should not include a
+label---the label is taken care of automatically.
+
+If you do not define this hook, it means no template is needed
+for the target.  Do not define this hook on systems where the block move
+code to copy the trampoline into place would be larger than the code
+to generate it on the spot.
+@end deftypefn
+
+@defmac TRAMPOLINE_SECTION
+Return the section into which the trampoline template is to be placed
+(@pxref{Sections}).  The default value is @code{readonly_data_section}.
+@end defmac
+
+@defmac TRAMPOLINE_SIZE
+A C expression for the size in bytes of the trampoline, as an integer.
+@end defmac
+
+@defmac TRAMPOLINE_ALIGNMENT
+Alignment required for trampolines, in bits.
+
+If you don't define this macro, the value of @code{FUNCTION_ALIGNMENT}
+is used for aligning trampolines.
+@end defmac
+
+@deftypefn {Target Hook} void TARGET_TRAMPOLINE_INIT (rtx @var{m_tramp}, tree @var{fndecl}, rtx @var{static_chain})
+This hook is called to initialize a trampoline.
+@var{m_tramp} is an RTX for the memory block for the trampoline; @var{fndecl}
+is the @code{FUNCTION_DECL} for the nested function; @var{static_chain} is an
+RTX for the static chain value that should be passed to the function
+when it is called.
+
+If the target defines @code{TARGET_ASM_TRAMPOLINE_TEMPLATE}, then the
+first thing this hook should do is emit a block move into @var{m_tramp}
+from the memory block returned by @code{assemble_trampoline_template}.
+Note that the block move need only cover the constant parts of the 
+trampoline.  If the target isolates the variable parts of the trampoline
+to the end, not all @code{TRAMPOLINE_SIZE} bytes need be copied.
+
+If the target requires any other actions, such as flushing caches or
+enabling stack execution, these actions should be performed after 
+initializing the trampoline proper.
+@end deftypefn
+
+@deftypefn {Target Hook} rtx TARGET_TRAMPOLINE_ADJUST_ADDRESS (rtx @var{addr})
+This hook should perform any machine-specific adjustment in
+the address of the trampoline.  Its argument contains the address of the
+memory block that was passed to @code{TARGET_TRAMPOLINE_INIT}.  In case
+the address to be used for a function call should be different from the
+address at which the template was stored, the different address should
+be returned; otherwise @var{addr} should be returned unchanged.
+If this hook is not defined, @var{addr} will be used for function calls.
+@end deftypefn
+
+Implementing trampolines is difficult on many machines because they have
+separate instruction and data caches.  Writing into a stack location
+fails to clear the memory in the instruction cache, so when the program
+jumps to that location, it executes the old contents.
+
+Here are two possible solutions.  One is to clear the relevant parts of
+the instruction cache whenever a trampoline is set up.  The other is to
+make all trampolines identical, by having them jump to a standard
+subroutine.  The former technique makes trampoline execution faster; the
+latter makes initialization faster.
+
+To clear the instruction cache when a trampoline is initialized, define
+the following macro.
+
+@defmac CLEAR_INSN_CACHE (@var{beg}, @var{end})
+If defined, expands to a C expression clearing the @emph{instruction
+cache} in the specified interval.  The definition of this macro would
+typically be a series of @code{asm} statements.  Both @var{beg} and
+@var{end} are both pointer expressions.
+@end defmac
+
+The operating system may also require the stack to be made executable
+before calling the trampoline.  To implement this requirement, define
+the following macro.
+
+@defmac ENABLE_EXECUTE_STACK
+Define this macro if certain operations must be performed before executing
+code located on the stack.  The macro should expand to a series of C
+file-scope constructs (e.g.@: functions) and provide a unique entry point
+named @code{__enable_execute_stack}.  The target is responsible for
+emitting calls to the entry point in the code, for example from the
+@code{TARGET_TRAMPOLINE_INIT} hook.
+@end defmac
+
+To use a standard subroutine, define the following macro.  In addition,
+you must make sure that the instructions in a trampoline fill an entire
+cache line with identical instructions, or else ensure that the
+beginning of the trampoline code is always aligned at the same point in
+its cache line.  Look in @file{m68k.h} as a guide.
+
+@defmac TRANSFER_FROM_TRAMPOLINE
+Define this macro if trampolines need a special subroutine to do their
+work.  The macro should expand to a series of @code{asm} statements
+which will be compiled with GCC@.  They go in a library function named
+@code{__transfer_from_trampoline}.
+
+If you need to avoid executing the ordinary prologue code of a compiled
+C function when you jump to the subroutine, you can do so by placing a
+special label of your own in the assembler code.  Use one @code{asm}
+statement to generate an assembler label, and another to make the label
+global.  Then trampolines can use that label to jump directly to your
+special assembler code.
+@end defmac
+
+@node Library Calls
+@section Implicit Calls to Library Routines
+@cindex library subroutine names
+@cindex @file{libgcc.a}
+
+@c prevent bad page break with this line
+Here is an explanation of implicit calls to library routines.
+
+@defmac DECLARE_LIBRARY_RENAMES
+This macro, if defined, should expand to a piece of C code that will get
+expanded when compiling functions for libgcc.a.  It can be used to
+provide alternate names for GCC's internal library functions if there
+are ABI-mandated names that the compiler should provide.
+@end defmac
+
+@findex set_optab_libfunc
+@findex init_one_libfunc
+@deftypefn {Target Hook} void TARGET_INIT_LIBFUNCS (void)
+This hook should declare additional library routines or rename
+existing ones, using the functions @code{set_optab_libfunc} and
+@code{init_one_libfunc} defined in @file{optabs.c}.
+@code{init_optabs} calls this macro after initializing all the normal
+library routines.
+
+The default is to do nothing.  Most ports don't need to define this hook.
+@end deftypefn
+
+@defmac FLOAT_LIB_COMPARE_RETURNS_BOOL (@var{mode}, @var{comparison})
+This macro should return @code{true} if the library routine that
+implements the floating point comparison operator @var{comparison} in
+mode @var{mode} will return a boolean, and @var{false} if it will
+return a tristate.
+
+GCC's own floating point libraries return tristates from the
+comparison operators, so the default returns false always.  Most ports
+don't need to define this macro.
+@end defmac
+
+@defmac TARGET_LIB_INT_CMP_BIASED
+This macro should evaluate to @code{true} if the integer comparison
+functions (like @code{__cmpdi2}) return 0 to indicate that the first
+operand is smaller than the second, 1 to indicate that they are equal,
+and 2 to indicate that the first operand is greater than the second.
+If this macro evaluates to @code{false} the comparison functions return
+@minus{}1, 0, and 1 instead of 0, 1, and 2.  If the target uses the routines
+in @file{libgcc.a}, you do not need to define this macro.
+@end defmac
+
+@cindex @code{EDOM}, implicit usage
+@findex matherr
+@defmac TARGET_EDOM
+The value of @code{EDOM} on the target machine, as a C integer constant
+expression.  If you don't define this macro, GCC does not attempt to
+deposit the value of @code{EDOM} into @code{errno} directly.  Look in
+@file{/usr/include/errno.h} to find the value of @code{EDOM} on your
+system.
+
+If you do not define @code{TARGET_EDOM}, then compiled code reports
+domain errors by calling the library function and letting it report the
+error.  If mathematical functions on your system use @code{matherr} when
+there is an error, then you should leave @code{TARGET_EDOM} undefined so
+that @code{matherr} is used normally.
+@end defmac
+
+@cindex @code{errno}, implicit usage
+@defmac GEN_ERRNO_RTX
+Define this macro as a C expression to create an rtl expression that
+refers to the global ``variable'' @code{errno}.  (On certain systems,
+@code{errno} may not actually be a variable.)  If you don't define this
+macro, a reasonable default is used.
+@end defmac
+
+@cindex C99 math functions, implicit usage
+@defmac TARGET_C99_FUNCTIONS
+When this macro is nonzero, GCC will implicitly optimize @code{sin} calls into
+@code{sinf} and similarly for other functions defined by C99 standard.  The
+default is zero because a number of existing systems lack support for these
+functions in their runtime so this macro needs to be redefined to one on
+systems that do support the C99 runtime.
+@end defmac
+
+@cindex sincos math function, implicit usage
+@defmac TARGET_HAS_SINCOS
+When this macro is nonzero, GCC will implicitly optimize calls to @code{sin}
+and @code{cos} with the same argument to a call to @code{sincos}.  The
+default is zero.  The target has to provide the following functions:
+@smallexample
+void sincos(double x, double *sin, double *cos);
+void sincosf(float x, float *sin, float *cos);
+void sincosl(long double x, long double *sin, long double *cos);
+@end smallexample
+@end defmac
+
+@defmac NEXT_OBJC_RUNTIME
+Define this macro to generate code for Objective-C message sending using
+the calling convention of the NeXT system.  This calling convention
+involves passing the object, the selector and the method arguments all
+at once to the method-lookup library function.
+
+The default calling convention passes just the object and the selector
+to the lookup function, which returns a pointer to the method.
+@end defmac
+
+@node Addressing Modes
+@section Addressing Modes
+@cindex addressing modes
+
+@c prevent bad page break with this line
+This is about addressing modes.
+
+@defmac HAVE_PRE_INCREMENT
+@defmacx HAVE_PRE_DECREMENT
+@defmacx HAVE_POST_INCREMENT
+@defmacx HAVE_POST_DECREMENT
+A C expression that is nonzero if the machine supports pre-increment,
+pre-decrement, post-increment, or post-decrement addressing respectively.
+@end defmac
+
+@defmac HAVE_PRE_MODIFY_DISP
+@defmacx HAVE_POST_MODIFY_DISP
+A C expression that is nonzero if the machine supports pre- or
+post-address side-effect generation involving constants other than
+the size of the memory operand.
+@end defmac
+
+@defmac HAVE_PRE_MODIFY_REG
+@defmacx HAVE_POST_MODIFY_REG
+A C expression that is nonzero if the machine supports pre- or
+post-address side-effect generation involving a register displacement.
+@end defmac
+
+@defmac CONSTANT_ADDRESS_P (@var{x})
+A C expression that is 1 if the RTX @var{x} is a constant which
+is a valid address.  On most machines the default definition of
+@code{(CONSTANT_P (@var{x}) && GET_CODE (@var{x}) != CONST_DOUBLE)}
+is acceptable, but a few machines are more restrictive as to which
+constant addresses are supported. 
+@end defmac
+
+@defmac CONSTANT_P (@var{x})
+@code{CONSTANT_P}, which is defined by target-independent code,
+accepts integer-values expressions whose values are not explicitly
+known, such as @code{symbol_ref}, @code{label_ref}, and @code{high}
+expressions and @code{const} arithmetic expressions, in addition to
+@code{const_int} and @code{const_double} expressions.
+@end defmac
+
+@defmac MAX_REGS_PER_ADDRESS
+A number, the maximum number of registers that can appear in a valid
+memory address.  Note that it is up to you to specify a value equal to
+the maximum number that @code{TARGET_LEGITIMATE_ADDRESS_P} would ever
+accept.
+@end defmac
+
+@deftypefn {Target Hook} bool TARGET_LEGITIMATE_ADDRESS_P (enum machine_mode @var{mode}, rtx @var{x}, bool @var{strict})
+A function that returns whether @var{x} (an RTX) is a legitimate memory
+address on the target machine for a memory operand of mode @var{mode}.
+
+Legitimate addresses are defined in two variants: a strict variant and a
+non-strict one.  The @var{strict} parameter chooses which variant is
+desired by the caller.
+
+The strict variant is used in the reload pass.  It must be defined so
+that any pseudo-register that has not been allocated a hard register is
+considered a memory reference.  This is because in contexts where some
+kind of register is required, a pseudo-register with no hard register
+must be rejected.  For non-hard registers, the strict variant should look
+up the @code{reg_renumber} array; it should then proceed using the hard
+register number in the array, or treat the pseudo as a memory reference
+if the array holds @code{-1}.
+
+The non-strict variant is used in other passes.  It must be defined to
+accept all pseudo-registers in every context where some kind of
+register is required.
+
+Normally, constant addresses which are the sum of a @code{symbol_ref}
+and an integer are stored inside a @code{const} RTX to mark them as
+constant.  Therefore, there is no need to recognize such sums
+specifically as legitimate addresses.  Normally you would simply
+recognize any @code{const} as legitimate.
+
+Usually @code{PRINT_OPERAND_ADDRESS} is not prepared to handle constant
+sums that are not marked with  @code{const}.  It assumes that a naked
+@code{plus} indicates indexing.  If so, then you @emph{must} reject such
+naked constant sums as illegitimate addresses, so that none of them will
+be given to @code{PRINT_OPERAND_ADDRESS}.
+
+@cindex @code{TARGET_ENCODE_SECTION_INFO} and address validation
+On some machines, whether a symbolic address is legitimate depends on
+the section that the address refers to.  On these machines, define the
+target hook @code{TARGET_ENCODE_SECTION_INFO} to store the information
+into the @code{symbol_ref}, and then check for it here.  When you see a
+@code{const}, you will have to look inside it to find the
+@code{symbol_ref} in order to determine the section.  @xref{Assembler
+Format}.
+
+@cindex @code{GO_IF_LEGITIMATE_ADDRESS}
+Some ports are still using a deprecated legacy substitute for
+this hook, the @code{GO_IF_LEGITIMATE_ADDRESS} macro.  This macro
+has this syntax:
+
+@example
+#define GO_IF_LEGITIMATE_ADDRESS (@var{mode}, @var{x}, @var{label})
+@end example
+
+@noindent
+and should @code{goto @var{label}} if the address @var{x} is a valid
+address on the target machine for a memory operand of mode @var{mode}.
+
+@findex REG_OK_STRICT
+Compiler source files that want to use the strict variant of this
+macro define the macro @code{REG_OK_STRICT}.  You should use an
+@code{#ifdef REG_OK_STRICT} conditional to define the strict variant in
+that case and the non-strict variant otherwise.
+
+Using the hook is usually simpler because it limits the number of
+files that are recompiled when changes are made.
+@end deftypefn
+
+@defmac TARGET_MEM_CONSTRAINT
+A single character to be used instead of the default @code{'m'}
+character for general memory addresses.  This defines the constraint
+letter which matches the memory addresses accepted by
+@code{TARGET_LEGITIMATE_ADDRESS_P}.  Define this macro if you want to
+support new address formats in your back end without changing the
+semantics of the @code{'m'} constraint.  This is necessary in order to
+preserve functionality of inline assembly constructs using the
+@code{'m'} constraint.
+@end defmac
+
+@defmac FIND_BASE_TERM (@var{x})
+A C expression to determine the base term of address @var{x},
+or to provide a simplified version of @var{x} from which @file{alias.c}
+can easily find the base term.  This macro is used in only two places:
+@code{find_base_value} and @code{find_base_term} in @file{alias.c}.
+
+It is always safe for this macro to not be defined.  It exists so
+that alias analysis can understand machine-dependent addresses.
+
+The typical use of this macro is to handle addresses containing
+a label_ref or symbol_ref within an UNSPEC@.
+@end defmac
+
+@deftypefn {Target Hook} rtx TARGET_LEGITIMIZE_ADDRESS (rtx @var{x}, rtx @var{oldx}, enum machine_mode @var{mode})
+This hook is given an invalid memory address @var{x} for an
+operand of mode @var{mode} and should try to return a valid memory
+address.
+
+@findex break_out_memory_refs
+@var{x} will always be the result of a call to @code{break_out_memory_refs},
+and @var{oldx} will be the operand that was given to that function to produce
+@var{x}.
+
+The code of the hook should not alter the substructure of
+@var{x}.  If it transforms @var{x} into a more legitimate form, it
+should return the new @var{x}.
+
+It is not necessary for this hook to come up with a legitimate address.
+The compiler has standard ways of doing so in all cases.  In fact, it
+is safe to omit this hook or make it return @var{x} if it cannot find
+a valid way to legitimize the address.  But often a machine-dependent
+strategy can generate better code.
+@end deftypefn
+
+@defmac LEGITIMIZE_RELOAD_ADDRESS (@var{x}, @var{mode}, @var{opnum}, @var{type}, @var{ind_levels}, @var{win})
+A C compound statement that attempts to replace @var{x}, which is an address
+that needs reloading, with a valid memory address for an operand of mode
+@var{mode}.  @var{win} will be a C statement label elsewhere in the code.
+It is not necessary to define this macro, but it might be useful for
+performance reasons.
+
+For example, on the i386, it is sometimes possible to use a single
+reload register instead of two by reloading a sum of two pseudo
+registers into a register.  On the other hand, for number of RISC
+processors offsets are limited so that often an intermediate address
+needs to be generated in order to address a stack slot.  By defining
+@code{LEGITIMIZE_RELOAD_ADDRESS} appropriately, the intermediate addresses
+generated for adjacent some stack slots can be made identical, and thus
+be shared.
+
+@emph{Note}: This macro should be used with caution.  It is necessary
+to know something of how reload works in order to effectively use this,
+and it is quite easy to produce macros that build in too much knowledge
+of reload internals.
+
+@emph{Note}: This macro must be able to reload an address created by a
+previous invocation of this macro.  If it fails to handle such addresses
+then the compiler may generate incorrect code or abort.
+
+@findex push_reload
+The macro definition should use @code{push_reload} to indicate parts that
+need reloading; @var{opnum}, @var{type} and @var{ind_levels} are usually
+suitable to be passed unaltered to @code{push_reload}.
+
+The code generated by this macro must not alter the substructure of
+@var{x}.  If it transforms @var{x} into a more legitimate form, it
+should assign @var{x} (which will always be a C variable) a new value.
+This also applies to parts that you change indirectly by calling
+@code{push_reload}.
+
+@findex strict_memory_address_p
+The macro definition may use @code{strict_memory_address_p} to test if
+the address has become legitimate.
+
+@findex copy_rtx
+If you want to change only a part of @var{x}, one standard way of doing
+this is to use @code{copy_rtx}.  Note, however, that it unshares only a
+single level of rtl.  Thus, if the part to be changed is not at the
+top level, you'll need to replace first the top level.
+It is not necessary for this macro to come up with a legitimate
+address;  but often a machine-dependent strategy can generate better code.
+@end defmac
+
+@deftypefn {Target Hook} bool TARGET_MODE_DEPENDENT_ADDRESS_P (const_rtx @var{addr})
+This hook returns @code{true} if memory address @var{addr} can have
+different meanings depending on the machine mode of the memory
+reference it is used for or if the address is valid for some modes
+but not others.
+
+Autoincrement and autodecrement addresses typically have mode-dependent
+effects because the amount of the increment or decrement is the size
+of the operand being addressed.  Some machines have other mode-dependent
+addresses.  Many RISC machines have no mode-dependent addresses.
+
+You may assume that @var{addr} is a valid address for the machine.
+
+The default version of this hook returns @code{false}.
+@end deftypefn
+
+@defmac GO_IF_MODE_DEPENDENT_ADDRESS (@var{addr}, @var{label})
+A C statement or compound statement with a conditional @code{goto
+@var{label};} executed if memory address @var{x} (an RTX) can have
+different meanings depending on the machine mode of the memory
+reference it is used for or if the address is valid for some modes
+but not others.
+
+Autoincrement and autodecrement addresses typically have mode-dependent
+effects because the amount of the increment or decrement is the size
+of the operand being addressed.  Some machines have other mode-dependent
+addresses.  Many RISC machines have no mode-dependent addresses.
+
+You may assume that @var{addr} is a valid address for the machine.
+
+These are obsolete macros, replaced by the
+@code{TARGET_MODE_DEPENDENT_ADDRESS_P} target hook.
+@end defmac
+
+@defmac LEGITIMATE_CONSTANT_P (@var{x})
+A C expression that is nonzero if @var{x} is a legitimate constant for
+an immediate operand on the target machine.  You can assume that
+@var{x} satisfies @code{CONSTANT_P}, so you need not check this.  In fact,
+@samp{1} is a suitable definition for this macro on machines where
+anything @code{CONSTANT_P} is valid.
+@end defmac
+
+@deftypefn {Target Hook} rtx TARGET_DELEGITIMIZE_ADDRESS (rtx @var{x})
+This hook is used to undo the possibly obfuscating effects of the
+@code{LEGITIMIZE_ADDRESS} and @code{LEGITIMIZE_RELOAD_ADDRESS} target
+macros.  Some backend implementations of these macros wrap symbol
+references inside an @code{UNSPEC} rtx to represent PIC or similar
+addressing modes.  This target hook allows GCC's optimizers to understand
+the semantics of these opaque @code{UNSPEC}s by converting them back
+into their original form.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_CANNOT_FORCE_CONST_MEM (rtx @var{x})
+This hook should return true if @var{x} is of a form that cannot (or
+should not) be spilled to the constant pool.  The default version of
+this hook returns false.
+
+The primary reason to define this hook is to prevent reload from
+deciding that a non-legitimate constant would be better reloaded
+from the constant pool instead of spilling and reloading a register
+holding the constant.  This restriction is often true of addresses
+of TLS symbols for various targets.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_USE_BLOCKS_FOR_CONSTANT_P (enum machine_mode @var{mode}, const_rtx @var{x})
+This hook should return true if pool entries for constant @var{x} can
+be placed in an @code{object_block} structure.  @var{mode} is the mode
+of @var{x}.
+
+The default version returns false for all constants.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_BUILTIN_RECIPROCAL (unsigned @var{fn}, bool @var{md_fn}, bool @var{sqrt})
+This hook should return the DECL of a function that implements reciprocal of
+the builtin function with builtin function code @var{fn}, or
+@code{NULL_TREE} if such a function is not available.  @var{md_fn} is true
+when @var{fn} is a code of a machine-dependent builtin function.  When
+@var{sqrt} is true, additional optimizations that apply only to the reciprocal
+of a square root function are performed, and only reciprocals of @code{sqrt}
+function are valid.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD (void)
+This hook should return the DECL of a function @var{f} that given an
+address @var{addr} as an argument returns a mask @var{m} that can be
+used to extract from two vectors the relevant data that resides in
+@var{addr} in case @var{addr} is not properly aligned.
+
+The autovectorizer, when vectorizing a load operation from an address
+@var{addr} that may be unaligned, will generate two vector loads from
+the two aligned addresses around @var{addr}. It then generates a
+@code{REALIGN_LOAD} operation to extract the relevant data from the
+two loaded vectors. The first two arguments to @code{REALIGN_LOAD},
+@var{v1} and @var{v2}, are the two vectors, each of size @var{VS}, and
+the third argument, @var{OFF}, defines how the data will be extracted
+from these two vectors: if @var{OFF} is 0, then the returned vector is
+@var{v2}; otherwise, the returned vector is composed from the last
+@var{VS}-@var{OFF} elements of @var{v1} concatenated to the first
+@var{OFF} elements of @var{v2}.
+
+If this hook is defined, the autovectorizer will generate a call
+to @var{f} (using the DECL tree that this hook returns) and will
+use the return value of @var{f} as the argument @var{OFF} to
+@code{REALIGN_LOAD}. Therefore, the mask @var{m} returned by @var{f}
+should comply with the semantics expected by @code{REALIGN_LOAD}
+described above.
+If this hook is not defined, then @var{addr} will be used as
+the argument @var{OFF} to @code{REALIGN_LOAD}, in which case the low
+log2(@var{VS}) @minus{} 1 bits of @var{addr} will be considered.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_EVEN (tree @var{x})
+This hook should return the DECL of a function @var{f} that implements
+widening multiplication of the even elements of two input vectors of type @var{x}.
+
+If this hook is defined, the autovectorizer will use it along with the
+@code{TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_ODD} target hook when vectorizing
+widening multiplication in cases that the order of the results does not have to be
+preserved (e.g.@: used only by a reduction computation). Otherwise, the
+@code{widen_mult_hi/lo} idioms will be used.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_ODD (tree @var{x})
+This hook should return the DECL of a function @var{f} that implements
+widening multiplication of the odd elements of two input vectors of type @var{x}.
+
+If this hook is defined, the autovectorizer will use it along with the
+@code{TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_EVEN} target hook when vectorizing
+widening multiplication in cases that the order of the results does not have to be
+preserved (e.g.@: used only by a reduction computation). Otherwise, the
+@code{widen_mult_hi/lo} idioms will be used.
+@end deftypefn
+
+@deftypefn {Target Hook} int TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST (enum vect_cost_for_stmt @var{type_of_cost}, tree @var{vectype}, int @var{misalign})
+Returns cost of different scalar or vector statements for vectorization cost model.
+For vector memory operations the cost may depend on type (@var{vectype}) and 
+misalignment value (@var{misalign}).
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE (const_tree @var{type}, bool @var{is_packed})
+Return true if vector alignment is reachable (by peeling N iterations) for the given type.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_VECTORIZE_BUILTIN_VEC_PERM (tree @var{type}, tree *@var{mask_element_type})
+Target builtin that implements vector permute.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_VECTORIZE_BUILTIN_VEC_PERM_OK (tree @var{vec_type}, tree @var{mask})
+Return true if a vector created for @code{builtin_vec_perm} is valid.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_VECTORIZE_BUILTIN_CONVERSION (unsigned @var{code}, tree @var{dest_type}, tree @var{src_type})
+This hook should return the DECL of a function that implements conversion of the
+input vector of type @var{src_type} to type @var{dest_type}.
+The value of @var{code} is one of the enumerators in @code{enum tree_code} and
+specifies how the conversion is to be applied
+(truncation, rounding, etc.).
+
+If this hook is defined, the autovectorizer will use the
+@code{TARGET_VECTORIZE_BUILTIN_CONVERSION} target hook when vectorizing
+conversion. Otherwise, it will return @code{NULL_TREE}.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION (tree @var{fndecl}, tree @var{vec_type_out}, tree @var{vec_type_in})
+This hook should return the decl of a function that implements the
+vectorized variant of the builtin function with builtin function code
+@var{code} or @code{NULL_TREE} if such a function is not available.
+The value of @var{fndecl} is the builtin function declaration.  The
+return type of the vectorized function shall be of vector type
+@var{vec_type_out} and the argument types should be @var{vec_type_in}.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT (enum machine_mode @var{mode}, const_tree @var{type}, int @var{misalignment}, bool @var{is_packed})
+This hook should return true if the target supports misaligned vector
+store/load of a specific factor denoted in the @var{misalignment}
+parameter.  The vector store/load should be of machine mode @var{mode} and
+the elements in the vectors should be of type @var{type}.  @var{is_packed}
+parameter is true if the memory access is defined in a packed struct.
+@end deftypefn
+
+@deftypefn {Target Hook} {enum machine_mode} TARGET_VECTORIZE_PREFERRED_SIMD_MODE (enum machine_mode @var{mode})
+This hook should return the preferred mode for vectorizing scalar
+mode @var{mode}.  The default is
+equal to @code{word_mode}, because the vectorizer can do some
+transformations even in absence of specialized @acronym{SIMD} hardware.
+@end deftypefn
+
+@deftypefn {Target Hook} {unsigned int} TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES (void)
+This hook should return a mask of sizes that should be iterated over
+after trying to autovectorize using the vector size derived from the
+mode returned by @code{TARGET_VECTORIZE_PREFERRED_SIMD_MODE}.
+The default is zero which means to not iterate over other vector sizes.
+@end deftypefn
+
+@node Anchored Addresses
+@section Anchored Addresses
+@cindex anchored addresses
+@cindex @option{-fsection-anchors}
+
+GCC usually addresses every static object as a separate entity.
+For example, if we have:
+
+@smallexample
+static int a, b, c;
+int foo (void) @{ return a + b + c; @}
+@end smallexample
+
+the code for @code{foo} will usually calculate three separate symbolic
+addresses: those of @code{a}, @code{b} and @code{c}.  On some targets,
+it would be better to calculate just one symbolic address and access
+the three variables relative to it.  The equivalent pseudocode would
+be something like:
+
+@smallexample
+int foo (void)
+@{
+  register int *xr = &x;
+  return xr[&a - &x] + xr[&b - &x] + xr[&c - &x];
+@}
+@end smallexample
+
+(which isn't valid C).  We refer to shared addresses like @code{x} as
+``section anchors''.  Their use is controlled by @option{-fsection-anchors}.
+
+The hooks below describe the target properties that GCC needs to know
+in order to make effective use of section anchors.  It won't use
+section anchors at all unless either @code{TARGET_MIN_ANCHOR_OFFSET}
+or @code{TARGET_MAX_ANCHOR_OFFSET} is set to a nonzero value.
+
+@deftypevr {Target Hook} HOST_WIDE_INT TARGET_MIN_ANCHOR_OFFSET
+The minimum offset that should be applied to a section anchor.
+On most targets, it should be the smallest offset that can be
+applied to a base register while still giving a legitimate address
+for every mode.  The default value is 0.
+@end deftypevr
+
+@deftypevr {Target Hook} HOST_WIDE_INT TARGET_MAX_ANCHOR_OFFSET
+Like @code{TARGET_MIN_ANCHOR_OFFSET}, but the maximum (inclusive)
+offset that should be applied to section anchors.  The default
+value is 0.
+@end deftypevr
+
+@deftypefn {Target Hook} void TARGET_ASM_OUTPUT_ANCHOR (rtx @var{x})
+Write the assembly code to define section anchor @var{x}, which is a
+@code{SYMBOL_REF} for which @samp{SYMBOL_REF_ANCHOR_P (@var{x})} is true.
+The hook is called with the assembly output position set to the beginning
+of @code{SYMBOL_REF_BLOCK (@var{x})}.
+
+If @code{ASM_OUTPUT_DEF} is available, the hook's default definition uses
+it to define the symbol as @samp{. + SYMBOL_REF_BLOCK_OFFSET (@var{x})}.
+If @code{ASM_OUTPUT_DEF} is not available, the hook's default definition
+is @code{NULL}, which disables the use of section anchors altogether.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_USE_ANCHORS_FOR_SYMBOL_P (const_rtx @var{x})
+Return true if GCC should attempt to use anchors to access @code{SYMBOL_REF}
+@var{x}.  You can assume @samp{SYMBOL_REF_HAS_BLOCK_INFO_P (@var{x})} and
+@samp{!SYMBOL_REF_ANCHOR_P (@var{x})}.
+
+The default version is correct for most targets, but you might need to
+intercept this hook to handle things like target-specific attributes
+or target-specific sections.
+@end deftypefn
+
+@node Condition Code
+@section Condition Code Status
+@cindex condition code status
+
+The macros in this section can be split in two families, according to the
+two ways of representing condition codes in GCC.
+
+The first representation is the so called @code{(cc0)} representation
+(@pxref{Jump Patterns}), where all instructions can have an implicit
+clobber of the condition codes.  The second is the condition code
+register representation, which provides better schedulability for
+architectures that do have a condition code register, but on which
+most instructions do not affect it.  The latter category includes
+most RISC machines.
+
+The implicit clobbering poses a strong restriction on the placement of
+the definition and use of the condition code, which need to be in adjacent
+insns for machines using @code{(cc0)}.  This can prevent important
+optimizations on some machines.  For example, on the IBM RS/6000, there
+is a delay for taken branches unless the condition code register is set
+three instructions earlier than the conditional branch.  The instruction
+scheduler cannot perform this optimization if it is not permitted to
+separate the definition and use of the condition code register.
+
+For this reason, it is possible and suggested to use a register to
+represent the condition code for new ports.  If there is a specific
+condition code register in the machine, use a hard register.  If the
+condition code or comparison result can be placed in any general register,
+or if there are multiple condition registers, use a pseudo register.
+Registers used to store the condition code value will usually have a mode
+that is in class @code{MODE_CC}.
+
+Alternatively, you can use @code{BImode} if the comparison operator is
+specified already in the compare instruction.  In this case, you are not
+interested in most macros in this section.
+
+@menu
+* CC0 Condition Codes::      Old style representation of condition codes.
+* MODE_CC Condition Codes::  Modern representation of condition codes.
+* Cond Exec Macros::         Macros to control conditional execution.
+@end menu
+
+@node CC0 Condition Codes
+@subsection Representation of condition codes using @code{(cc0)}
+@findex cc0
+
+@findex cc_status
+The file @file{conditions.h} defines a variable @code{cc_status} to
+describe how the condition code was computed (in case the interpretation of
+the condition code depends on the instruction that it was set by).  This
+variable contains the RTL expressions on which the condition code is
+currently based, and several standard flags.
+
+Sometimes additional machine-specific flags must be defined in the machine
+description header file.  It can also add additional machine-specific
+information by defining @code{CC_STATUS_MDEP}.
+
+@defmac CC_STATUS_MDEP
+C code for a data type which is used for declaring the @code{mdep}
+component of @code{cc_status}.  It defaults to @code{int}.
+
+This macro is not used on machines that do not use @code{cc0}.
+@end defmac
+
+@defmac CC_STATUS_MDEP_INIT
+A C expression to initialize the @code{mdep} field to ``empty''.
+The default definition does nothing, since most machines don't use
+the field anyway.  If you want to use the field, you should probably
+define this macro to initialize it.
+
+This macro is not used on machines that do not use @code{cc0}.
+@end defmac
+
+@defmac NOTICE_UPDATE_CC (@var{exp}, @var{insn})
+A C compound statement to set the components of @code{cc_status}
+appropriately for an insn @var{insn} whose body is @var{exp}.  It is
+this macro's responsibility to recognize insns that set the condition
+code as a byproduct of other activity as well as those that explicitly
+set @code{(cc0)}.
+
+This macro is not used on machines that do not use @code{cc0}.
+
+If there are insns that do not set the condition code but do alter
+other machine registers, this macro must check to see whether they
+invalidate the expressions that the condition code is recorded as
+reflecting.  For example, on the 68000, insns that store in address
+registers do not set the condition code, which means that usually
+@code{NOTICE_UPDATE_CC} can leave @code{cc_status} unaltered for such
+insns.  But suppose that the previous insn set the condition code
+based on location @samp{a4@@(102)} and the current insn stores a new
+value in @samp{a4}.  Although the condition code is not changed by
+this, it will no longer be true that it reflects the contents of
+@samp{a4@@(102)}.  Therefore, @code{NOTICE_UPDATE_CC} must alter
+@code{cc_status} in this case to say that nothing is known about the
+condition code value.
+
+The definition of @code{NOTICE_UPDATE_CC} must be prepared to deal
+with the results of peephole optimization: insns whose patterns are
+@code{parallel} RTXs containing various @code{reg}, @code{mem} or
+constants which are just the operands.  The RTL structure of these
+insns is not sufficient to indicate what the insns actually do.  What
+@code{NOTICE_UPDATE_CC} should do when it sees one is just to run
+@code{CC_STATUS_INIT}.
+
+A possible definition of @code{NOTICE_UPDATE_CC} is to call a function
+that looks at an attribute (@pxref{Insn Attributes}) named, for example,
+@samp{cc}.  This avoids having detailed information about patterns in
+two places, the @file{md} file and in @code{NOTICE_UPDATE_CC}.
+@end defmac
+
+@node MODE_CC Condition Codes
+@subsection Representation of condition codes using registers
+@findex CCmode
+@findex MODE_CC
+
+@defmac SELECT_CC_MODE (@var{op}, @var{x}, @var{y})
+On many machines, the condition code may be produced by other instructions
+than compares, for example the branch can use directly the condition
+code set by a subtract instruction.  However, on some machines
+when the condition code is set this way some bits (such as the overflow
+bit) are not set in the same way as a test instruction, so that a different
+branch instruction must be used for some conditional branches.  When
+this happens, use the machine mode of the condition code register to
+record different formats of the condition code register.  Modes can
+also be used to record which compare instruction (e.g. a signed or an
+unsigned comparison) produced the condition codes.
+
+If other modes than @code{CCmode} are required, add them to
+@file{@var{machine}-modes.def} and define @code{SELECT_CC_MODE} to choose
+a mode given an operand of a compare.  This is needed because the modes
+have to be chosen not only during RTL generation but also, for example,
+by instruction combination.  The result of @code{SELECT_CC_MODE} should
+be consistent with the mode used in the patterns; for example to support
+the case of the add on the SPARC discussed above, we have the pattern
+
+@smallexample
+(define_insn ""
+  [(set (reg:CC_NOOV 0)
+        (compare:CC_NOOV
+          (plus:SI (match_operand:SI 0 "register_operand" "%r")
+                   (match_operand:SI 1 "arith_operand" "rI"))
+          (const_int 0)))]
+  ""
+  "@dots{}")
+@end smallexample
+
+@noindent
+together with a @code{SELECT_CC_MODE} that returns @code{CC_NOOVmode}
+for comparisons whose argument is a @code{plus}:
+
+@smallexample
+#define SELECT_CC_MODE(OP,X,Y) \
+  (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT          \
+   ? ((OP == EQ || OP == NE) ? CCFPmode : CCFPEmode)    \
+   : ((GET_CODE (X) == PLUS || GET_CODE (X) == MINUS    \
+       || GET_CODE (X) == NEG) \
+      ? CC_NOOVmode : CCmode))
+@end smallexample
+
+Another reason to use modes is to retain information on which operands
+were used by the comparison; see @code{REVERSIBLE_CC_MODE} later in
+this section.
+
+You should define this macro if and only if you define extra CC modes
+in @file{@var{machine}-modes.def}.
+@end defmac
+
+@defmac CANONICALIZE_COMPARISON (@var{code}, @var{op0}, @var{op1})
+On some machines not all possible comparisons are defined, but you can
+convert an invalid comparison into a valid one.  For example, the Alpha
+does not have a @code{GT} comparison, but you can use an @code{LT}
+comparison instead and swap the order of the operands.
+
+On such machines, define this macro to be a C statement to do any
+required conversions.  @var{code} is the initial comparison code
+and @var{op0} and @var{op1} are the left and right operands of the
+comparison, respectively.  You should modify @var{code}, @var{op0}, and
+@var{op1} as required.
+
+GCC will not assume that the comparison resulting from this macro is
+valid but will see if the resulting insn matches a pattern in the
+@file{md} file.
+
+You need not define this macro if it would never change the comparison
+code or operands.
+@end defmac
+
+@defmac REVERSIBLE_CC_MODE (@var{mode})
+A C expression whose value is one if it is always safe to reverse a
+comparison whose mode is @var{mode}.  If @code{SELECT_CC_MODE}
+can ever return @var{mode} for a floating-point inequality comparison,
+then @code{REVERSIBLE_CC_MODE (@var{mode})} must be zero.
+
+You need not define this macro if it would always returns zero or if the
+floating-point format is anything other than @code{IEEE_FLOAT_FORMAT}.
+For example, here is the definition used on the SPARC, where floating-point
+inequality comparisons are always given @code{CCFPEmode}:
+
+@smallexample
+#define REVERSIBLE_CC_MODE(MODE)  ((MODE) != CCFPEmode)
+@end smallexample
+@end defmac
+
+@defmac REVERSE_CONDITION (@var{code}, @var{mode})
+A C expression whose value is reversed condition code of the @var{code} for
+comparison done in CC_MODE @var{mode}.  The macro is used only in case
+@code{REVERSIBLE_CC_MODE (@var{mode})} is nonzero.  Define this macro in case
+machine has some non-standard way how to reverse certain conditionals.  For
+instance in case all floating point conditions are non-trapping, compiler may
+freely convert unordered compares to ordered one.  Then definition may look
+like:
+
+@smallexample
+#define REVERSE_CONDITION(CODE, MODE) \
+   ((MODE) != CCFPmode ? reverse_condition (CODE) \
+    : reverse_condition_maybe_unordered (CODE))
+@end smallexample
+@end defmac
+
+@deftypefn {Target Hook} bool TARGET_FIXED_CONDITION_CODE_REGS (unsigned int *@var{p1}, unsigned int *@var{p2})
+On targets which do not use @code{(cc0)}, and which use a hard
+register rather than a pseudo-register to hold condition codes, the
+regular CSE passes are often not able to identify cases in which the
+hard register is set to a common value.  Use this hook to enable a
+small pass which optimizes such cases.  This hook should return true
+to enable this pass, and it should set the integers to which its
+arguments point to the hard register numbers used for condition codes.
+When there is only one such register, as is true on most systems, the
+integer pointed to by @var{p2} should be set to
+@code{INVALID_REGNUM}.
+
+The default version of this hook returns false.
+@end deftypefn
+
+@deftypefn {Target Hook} {enum machine_mode} TARGET_CC_MODES_COMPATIBLE (enum machine_mode @var{m1}, enum machine_mode @var{m2})
+On targets which use multiple condition code modes in class
+@code{MODE_CC}, it is sometimes the case that a comparison can be
+validly done in more than one mode.  On such a system, define this
+target hook to take two mode arguments and to return a mode in which
+both comparisons may be validly done.  If there is no such mode,
+return @code{VOIDmode}.
+
+The default version of this hook checks whether the modes are the
+same.  If they are, it returns that mode.  If they are different, it
+returns @code{VOIDmode}.
+@end deftypefn
+
+@node Cond Exec Macros
+@subsection Macros to control conditional execution
+@findex conditional execution
+@findex predication
+
+There is one macro that may need to be defined for targets
+supporting conditional execution, independent of how they
+represent conditional branches.
+
+@defmac REVERSE_CONDEXEC_PREDICATES_P (@var{op1}, @var{op2})
+A C expression that returns true if the conditional execution predicate
+@var{op1}, a comparison operation, is the inverse of @var{op2} and vice
+versa.  Define this to return 0 if the target has conditional execution
+predicates that cannot be reversed safely.  There is no need to validate
+that the arguments of op1 and op2 are the same, this is done separately.
+If no expansion is specified, this macro is defined as follows:
+
+@smallexample
+#define REVERSE_CONDEXEC_PREDICATES_P (x, y) \
+   (GET_CODE ((x)) == reversed_comparison_code ((y), NULL))
+@end smallexample
+@end defmac
+
+@node Costs
+@section Describing Relative Costs of Operations
+@cindex costs of instructions
+@cindex relative costs
+@cindex speed of instructions
+
+These macros let you describe the relative speed of various operations
+on the target machine.
+
+@defmac REGISTER_MOVE_COST (@var{mode}, @var{from}, @var{to})
+A C expression for the cost of moving data of mode @var{mode} from a
+register in class @var{from} to one in class @var{to}.  The classes are
+expressed using the enumeration values such as @code{GENERAL_REGS}.  A
+value of 2 is the default; other values are interpreted relative to
+that.
+
+It is not required that the cost always equal 2 when @var{from} is the
+same as @var{to}; on some machines it is expensive to move between
+registers if they are not general registers.
+
+If reload sees an insn consisting of a single @code{set} between two
+hard registers, and if @code{REGISTER_MOVE_COST} applied to their
+classes returns a value of 2, reload does not check to ensure that the
+constraints of the insn are met.  Setting a cost of other than 2 will
+allow reload to verify that the constraints are met.  You should do this
+if the @samp{mov@var{m}} pattern's constraints do not allow such copying.
+
+These macros are obsolete, new ports should use the target hook
+@code{TARGET_REGISTER_MOVE_COST} instead.
+@end defmac
+
+@deftypefn {Target Hook} int TARGET_REGISTER_MOVE_COST (enum machine_mode @var{mode}, reg_class_t @var{from}, reg_class_t @var{to})
+This target hook should return the cost of moving data of mode @var{mode}
+from a register in class @var{from} to one in class @var{to}.  The classes
+are expressed using the enumeration values such as @code{GENERAL_REGS}.
+A value of 2 is the default; other values are interpreted relative to
+that.
+
+It is not required that the cost always equal 2 when @var{from} is the
+same as @var{to}; on some machines it is expensive to move between
+registers if they are not general registers.
+
+If reload sees an insn consisting of a single @code{set} between two
+hard registers, and if @code{TARGET_REGISTER_MOVE_COST} applied to their
+classes returns a value of 2, reload does not check to ensure that the
+constraints of the insn are met.  Setting a cost of other than 2 will
+allow reload to verify that the constraints are met.  You should do this
+if the @samp{mov@var{m}} pattern's constraints do not allow such copying.
+
+The default version of this function returns 2.
+@end deftypefn
+
+@defmac MEMORY_MOVE_COST (@var{mode}, @var{class}, @var{in})
+A C expression for the cost of moving data of mode @var{mode} between a
+register of class @var{class} and memory; @var{in} is zero if the value
+is to be written to memory, nonzero if it is to be read in.  This cost
+is relative to those in @code{REGISTER_MOVE_COST}.  If moving between
+registers and memory is more expensive than between two registers, you
+should define this macro to express the relative cost.
+
+If you do not define this macro, GCC uses a default cost of 4 plus
+the cost of copying via a secondary reload register, if one is
+needed.  If your machine requires a secondary reload register to copy
+between memory and a register of @var{class} but the reload mechanism is
+more complex than copying via an intermediate, define this macro to
+reflect the actual cost of the move.
+
+GCC defines the function @code{memory_move_secondary_cost} if
+secondary reloads are needed.  It computes the costs due to copying via
+a secondary register.  If your machine copies from memory using a
+secondary register in the conventional way but the default base value of
+4 is not correct for your machine, define this macro to add some other
+value to the result of that function.  The arguments to that function
+are the same as to this macro.
+
+These macros are obsolete, new ports should use the target hook
+@code{TARGET_MEMORY_MOVE_COST} instead.
+@end defmac
+
+@deftypefn {Target Hook} int TARGET_MEMORY_MOVE_COST (enum machine_mode @var{mode}, reg_class_t @var{rclass}, bool @var{in})
+This target hook should return the cost of moving data of mode @var{mode}
+between a register of class @var{rclass} and memory; @var{in} is @code{false}
+if the value is to be written to memory, @code{true} if it is to be read in.
+This cost is relative to those in @code{TARGET_REGISTER_MOVE_COST}.
+If moving between registers and memory is more expensive than between two
+registers, you should add this target hook to express the relative cost.
+
+If you do not add this target hook, GCC uses a default cost of 4 plus
+the cost of copying via a secondary reload register, if one is
+needed.  If your machine requires a secondary reload register to copy
+between memory and a register of @var{rclass} but the reload mechanism is
+more complex than copying via an intermediate, use this target hook to
+reflect the actual cost of the move.
+
+GCC defines the function @code{memory_move_secondary_cost} if
+secondary reloads are needed.  It computes the costs due to copying via
+a secondary register.  If your machine copies from memory using a
+secondary register in the conventional way but the default base value of
+4 is not correct for your machine, use this target hook to add some other
+value to the result of that function.  The arguments to that function
+are the same as to this target hook.
+@end deftypefn
+
+@defmac BRANCH_COST (@var{speed_p}, @var{predictable_p})
+A C expression for the cost of a branch instruction.  A value of 1 is
+the default; other values are interpreted relative to that. Parameter
+@var{speed_p} is true when the branch in question should be optimized
+for speed.  When it is false, @code{BRANCH_COST} should return a value
+optimal for code size rather than performance.  @var{predictable_p} is
+true for well-predicted branches. On many architectures the
+@code{BRANCH_COST} can be reduced then.
+@end defmac
+
+Here are additional macros which do not specify precise relative costs,
+but only that certain actions are more expensive than GCC would
+ordinarily expect.
+
+@defmac SLOW_BYTE_ACCESS
+Define this macro as a C expression which is nonzero if accessing less
+than a word of memory (i.e.@: a @code{char} or a @code{short}) is no
+faster than accessing a word of memory, i.e., if such access
+require more than one instruction or if there is no difference in cost
+between byte and (aligned) word loads.
+
+When this macro is not defined, the compiler will access a field by
+finding the smallest containing object; when it is defined, a fullword
+load will be used if alignment permits.  Unless bytes accesses are
+faster than word accesses, using word accesses is preferable since it
+may eliminate subsequent memory access if subsequent accesses occur to
+other fields in the same word of the structure, but to different bytes.
+@end defmac
+
+@defmac SLOW_UNALIGNED_ACCESS (@var{mode}, @var{alignment})
+Define this macro to be the value 1 if memory accesses described by the
+@var{mode} and @var{alignment} parameters have a cost many times greater
+than aligned accesses, for example if they are emulated in a trap
+handler.
+
+When this macro is nonzero, the compiler will act as if
+@code{STRICT_ALIGNMENT} were nonzero when generating code for block
+moves.  This can cause significantly more instructions to be produced.
+Therefore, do not set this macro nonzero if unaligned accesses only add a
+cycle or two to the time for a memory access.
+
+If the value of this macro is always zero, it need not be defined.  If
+this macro is defined, it should produce a nonzero value when
+@code{STRICT_ALIGNMENT} is nonzero.
+@end defmac
+
+@defmac MOVE_RATIO (@var{speed})
+The threshold of number of scalar memory-to-memory move insns, @emph{below}
+which a sequence of insns should be generated instead of a
+string move insn or a library call.  Increasing the value will always
+make code faster, but eventually incurs high cost in increased code size.
+
+Note that on machines where the corresponding move insn is a
+@code{define_expand} that emits a sequence of insns, this macro counts
+the number of such sequences.
+
+The parameter @var{speed} is true if the code is currently being
+optimized for speed rather than size.
+
+If you don't define this, a reasonable default is used.
+@end defmac
+
+@defmac MOVE_BY_PIECES_P (@var{size}, @var{alignment})
+A C expression used to determine whether @code{move_by_pieces} will be used to
+copy a chunk of memory, or whether some other block move mechanism
+will be used.  Defaults to 1 if @code{move_by_pieces_ninsns} returns less
+than @code{MOVE_RATIO}.
+@end defmac
+
+@defmac MOVE_MAX_PIECES
+A C expression used by @code{move_by_pieces} to determine the largest unit
+a load or store used to copy memory is.  Defaults to @code{MOVE_MAX}.
+@end defmac
+
+@defmac CLEAR_RATIO (@var{speed})
+The threshold of number of scalar move insns, @emph{below} which a sequence
+of insns should be generated to clear memory instead of a string clear insn
+or a library call.  Increasing the value will always make code faster, but
+eventually incurs high cost in increased code size.
+
+The parameter @var{speed} is true if the code is currently being
+optimized for speed rather than size.
+
+If you don't define this, a reasonable default is used.
+@end defmac
+
+@defmac CLEAR_BY_PIECES_P (@var{size}, @var{alignment})
+A C expression used to determine whether @code{clear_by_pieces} will be used
+to clear a chunk of memory, or whether some other block clear mechanism
+will be used.  Defaults to 1 if @code{move_by_pieces_ninsns} returns less
+than @code{CLEAR_RATIO}.
+@end defmac
+
+@defmac SET_RATIO (@var{speed})
+The threshold of number of scalar move insns, @emph{below} which a sequence
+of insns should be generated to set memory to a constant value, instead of
+a block set insn or a library call.  
+Increasing the value will always make code faster, but
+eventually incurs high cost in increased code size.
+
+The parameter @var{speed} is true if the code is currently being
+optimized for speed rather than size.
+
+If you don't define this, it defaults to the value of @code{MOVE_RATIO}.
+@end defmac
+
+@defmac SET_BY_PIECES_P (@var{size}, @var{alignment})
+A C expression used to determine whether @code{store_by_pieces} will be
+used to set a chunk of memory to a constant value, or whether some 
+other mechanism will be used.  Used by @code{__builtin_memset} when 
+storing values other than constant zero.
+Defaults to 1 if @code{move_by_pieces_ninsns} returns less
+than @code{SET_RATIO}.
+@end defmac
+
+@defmac STORE_BY_PIECES_P (@var{size}, @var{alignment})
+A C expression used to determine whether @code{store_by_pieces} will be
+used to set a chunk of memory to a constant string value, or whether some
+other mechanism will be used.  Used by @code{__builtin_strcpy} when
+called with a constant source string.
+Defaults to 1 if @code{move_by_pieces_ninsns} returns less
+than @code{MOVE_RATIO}.
+@end defmac
+
+@defmac USE_LOAD_POST_INCREMENT (@var{mode})
+A C expression used to determine whether a load postincrement is a good
+thing to use for a given mode.  Defaults to the value of
+@code{HAVE_POST_INCREMENT}.
+@end defmac
+
+@defmac USE_LOAD_POST_DECREMENT (@var{mode})
+A C expression used to determine whether a load postdecrement is a good
+thing to use for a given mode.  Defaults to the value of
+@code{HAVE_POST_DECREMENT}.
+@end defmac
+
+@defmac USE_LOAD_PRE_INCREMENT (@var{mode})
+A C expression used to determine whether a load preincrement is a good
+thing to use for a given mode.  Defaults to the value of
+@code{HAVE_PRE_INCREMENT}.
+@end defmac
+
+@defmac USE_LOAD_PRE_DECREMENT (@var{mode})
+A C expression used to determine whether a load predecrement is a good
+thing to use for a given mode.  Defaults to the value of
+@code{HAVE_PRE_DECREMENT}.
+@end defmac
+
+@defmac USE_STORE_POST_INCREMENT (@var{mode})
+A C expression used to determine whether a store postincrement is a good
+thing to use for a given mode.  Defaults to the value of
+@code{HAVE_POST_INCREMENT}.
+@end defmac
+
+@defmac USE_STORE_POST_DECREMENT (@var{mode})
+A C expression used to determine whether a store postdecrement is a good
+thing to use for a given mode.  Defaults to the value of
+@code{HAVE_POST_DECREMENT}.
+@end defmac
+
+@defmac USE_STORE_PRE_INCREMENT (@var{mode})
+This macro is used to determine whether a store preincrement is a good
+thing to use for a given mode.  Defaults to the value of
+@code{HAVE_PRE_INCREMENT}.
+@end defmac
+
+@defmac USE_STORE_PRE_DECREMENT (@var{mode})
+This macro is used to determine whether a store predecrement is a good
+thing to use for a given mode.  Defaults to the value of
+@code{HAVE_PRE_DECREMENT}.
+@end defmac
+
+@defmac NO_FUNCTION_CSE
+Define this macro if it is as good or better to call a constant
+function address than to call an address kept in a register.
+@end defmac
+
+@defmac RANGE_TEST_NON_SHORT_CIRCUIT
+Define this macro if a non-short-circuit operation produced by
+@samp{fold_range_test ()} is optimal.  This macro defaults to true if
+@code{BRANCH_COST} is greater than or equal to the value 2.
+@end defmac
+
+@deftypefn {Target Hook} bool TARGET_RTX_COSTS (rtx @var{x}, int @var{code}, int @var{outer_code}, int *@var{total}, bool @var{speed})
+This target hook describes the relative costs of RTL expressions.
+
+The cost may depend on the precise form of the expression, which is
+available for examination in @var{x}, and the rtx code of the expression
+in which it is contained, found in @var{outer_code}.  @var{code} is the
+expression code---redundant, since it can be obtained with
+@code{GET_CODE (@var{x})}.
+
+In implementing this hook, you can use the construct
+@code{COSTS_N_INSNS (@var{n})} to specify a cost equal to @var{n} fast
+instructions.
+
+On entry to the hook, @code{*@var{total}} contains a default estimate
+for the cost of the expression.  The hook should modify this value as
+necessary.  Traditionally, the default costs are @code{COSTS_N_INSNS (5)}
+for multiplications, @code{COSTS_N_INSNS (7)} for division and modulus
+operations, and @code{COSTS_N_INSNS (1)} for all other operations.
+
+When optimizing for code size, i.e.@: when @code{speed} is
+false, this target hook should be used to estimate the relative
+size cost of an expression, again relative to @code{COSTS_N_INSNS}.
+
+The hook returns true when all subexpressions of @var{x} have been
+processed, and false when @code{rtx_cost} should recurse.
+@end deftypefn
+
+@deftypefn {Target Hook} int TARGET_ADDRESS_COST (rtx @var{address}, bool @var{speed})
+This hook computes the cost of an addressing mode that contains
+@var{address}.  If not defined, the cost is computed from
+the @var{address} expression and the @code{TARGET_RTX_COST} hook.
+
+For most CISC machines, the default cost is a good approximation of the
+true cost of the addressing mode.  However, on RISC machines, all
+instructions normally have the same length and execution time.  Hence
+all addresses will have equal costs.
+
+In cases where more than one form of an address is known, the form with
+the lowest cost will be used.  If multiple forms have the same, lowest,
+cost, the one that is the most complex will be used.
+
+For example, suppose an address that is equal to the sum of a register
+and a constant is used twice in the same basic block.  When this macro
+is not defined, the address will be computed in a register and memory
+references will be indirect through that register.  On machines where
+the cost of the addressing mode containing the sum is no higher than
+that of a simple indirect reference, this will produce an additional
+instruction and possibly require an additional register.  Proper
+specification of this macro eliminates this overhead for such machines.
+
+This hook is never called with an invalid address.
+
+On machines where an address involving more than one register is as
+cheap as an address computation involving only one register, defining
+@code{TARGET_ADDRESS_COST} to reflect this can cause two registers to
+be live over a region of code where only one would have been if
+@code{TARGET_ADDRESS_COST} were not defined in that manner.  This effect
+should be considered in the definition of this macro.  Equivalent costs
+should probably only be given to addresses with different numbers of
+registers on machines with lots of registers.
+@end deftypefn
+
+@node Scheduling
+@section Adjusting the Instruction Scheduler
+
+The instruction scheduler may need a fair amount of machine-specific
+adjustment in order to produce good code.  GCC provides several target
+hooks for this purpose.  It is usually enough to define just a few of
+them: try the first ones in this list first.
+
+@deftypefn {Target Hook} int TARGET_SCHED_ISSUE_RATE (void)
+This hook returns the maximum number of instructions that can ever
+issue at the same time on the target machine.  The default is one.
+Although the insn scheduler can define itself the possibility of issue
+an insn on the same cycle, the value can serve as an additional
+constraint to issue insns on the same simulated processor cycle (see
+hooks @samp{TARGET_SCHED_REORDER} and @samp{TARGET_SCHED_REORDER2}).
+This value must be constant over the entire compilation.  If you need
+it to vary depending on what the instructions are, you must use
+@samp{TARGET_SCHED_VARIABLE_ISSUE}.
+@end deftypefn
+
+@deftypefn {Target Hook} int TARGET_SCHED_VARIABLE_ISSUE (FILE *@var{file}, int @var{verbose}, rtx @var{insn}, int @var{more})
+This hook is executed by the scheduler after it has scheduled an insn
+from the ready list.  It should return the number of insns which can
+still be issued in the current cycle.  The default is
+@samp{@w{@var{more} - 1}} for insns other than @code{CLOBBER} and
+@code{USE}, which normally are not counted against the issue rate.
+You should define this hook if some insns take more machine resources
+than others, so that fewer insns can follow them in the same cycle.
+@var{file} is either a null pointer, or a stdio stream to write any
+debug output to.  @var{verbose} is the verbose level provided by
+@option{-fsched-verbose-@var{n}}.  @var{insn} is the instruction that
+was scheduled.
+@end deftypefn
+
+@deftypefn {Target Hook} int TARGET_SCHED_ADJUST_COST (rtx @var{insn}, rtx @var{link}, rtx @var{dep_insn}, int @var{cost})
+This function corrects the value of @var{cost} based on the
+relationship between @var{insn} and @var{dep_insn} through the
+dependence @var{link}.  It should return the new value.  The default
+is to make no adjustment to @var{cost}.  This can be used for example
+to specify to the scheduler using the traditional pipeline description
+that an output- or anti-dependence does not incur the same cost as a
+data-dependence.  If the scheduler using the automaton based pipeline
+description, the cost of anti-dependence is zero and the cost of
+output-dependence is maximum of one and the difference of latency
+times of the first and the second insns.  If these values are not
+acceptable, you could use the hook to modify them too.  See also
+@pxref{Processor pipeline description}.
+@end deftypefn
+
+@deftypefn {Target Hook} int TARGET_SCHED_ADJUST_PRIORITY (rtx @var{insn}, int @var{priority})
+This hook adjusts the integer scheduling priority @var{priority} of
+@var{insn}.  It should return the new priority.  Increase the priority to
+execute @var{insn} earlier, reduce the priority to execute @var{insn}
+later.  Do not define this hook if you do not need to adjust the
+scheduling priorities of insns.
+@end deftypefn
+
+@deftypefn {Target Hook} int TARGET_SCHED_REORDER (FILE *@var{file}, int @var{verbose}, rtx *@var{ready}, int *@var{n_readyp}, int @var{clock})
+This hook is executed by the scheduler after it has scheduled the ready
+list, to allow the machine description to reorder it (for example to
+combine two small instructions together on @samp{VLIW} machines).
+@var{file} is either a null pointer, or a stdio stream to write any
+debug output to.  @var{verbose} is the verbose level provided by
+@option{-fsched-verbose-@var{n}}.  @var{ready} is a pointer to the ready
+list of instructions that are ready to be scheduled.  @var{n_readyp} is
+a pointer to the number of elements in the ready list.  The scheduler
+reads the ready list in reverse order, starting with
+@var{ready}[@var{*n_readyp} @minus{} 1] and going to @var{ready}[0].  @var{clock}
+is the timer tick of the scheduler.  You may modify the ready list and
+the number of ready insns.  The return value is the number of insns that
+can issue this cycle; normally this is just @code{issue_rate}.  See also
+@samp{TARGET_SCHED_REORDER2}.
+@end deftypefn
+
+@deftypefn {Target Hook} int TARGET_SCHED_REORDER2 (FILE *@var{file}, int @var{verbose}, rtx *@var{ready}, int *@var{n_readyp}, int @var{clock})
+Like @samp{TARGET_SCHED_REORDER}, but called at a different time.  That
+function is called whenever the scheduler starts a new cycle.  This one
+is called once per iteration over a cycle, immediately after
+@samp{TARGET_SCHED_VARIABLE_ISSUE}; it can reorder the ready list and
+return the number of insns to be scheduled in the same cycle.  Defining
+this hook can be useful if there are frequent situations where
+scheduling one insn causes other insns to become ready in the same
+cycle.  These other insns can then be taken into account properly.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SCHED_DEPENDENCIES_EVALUATION_HOOK (rtx @var{head}, rtx @var{tail})
+This hook is called after evaluation forward dependencies of insns in
+chain given by two parameter values (@var{head} and @var{tail}
+correspondingly) but before insns scheduling of the insn chain.  For
+example, it can be used for better insn classification if it requires
+analysis of dependencies.  This hook can use backward and forward
+dependencies of the insn scheduler because they are already
+calculated.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SCHED_INIT (FILE *@var{file}, int @var{verbose}, int @var{max_ready})
+This hook is executed by the scheduler at the beginning of each block of
+instructions that are to be scheduled.  @var{file} is either a null
+pointer, or a stdio stream to write any debug output to.  @var{verbose}
+is the verbose level provided by @option{-fsched-verbose-@var{n}}.
+@var{max_ready} is the maximum number of insns in the current scheduling
+region that can be live at the same time.  This can be used to allocate
+scratch space if it is needed, e.g.@: by @samp{TARGET_SCHED_REORDER}.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SCHED_FINISH (FILE *@var{file}, int @var{verbose})
+This hook is executed by the scheduler at the end of each block of
+instructions that are to be scheduled.  It can be used to perform
+cleanup of any actions done by the other scheduling hooks.  @var{file}
+is either a null pointer, or a stdio stream to write any debug output
+to.  @var{verbose} is the verbose level provided by
+@option{-fsched-verbose-@var{n}}.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SCHED_INIT_GLOBAL (FILE *@var{file}, int @var{verbose}, int @var{old_max_uid})
+This hook is executed by the scheduler after function level initializations.
+@var{file} is either a null pointer, or a stdio stream to write any debug output to.
+@var{verbose} is the verbose level provided by @option{-fsched-verbose-@var{n}}.
+@var{old_max_uid} is the maximum insn uid when scheduling begins.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SCHED_FINISH_GLOBAL (FILE *@var{file}, int @var{verbose})
+This is the cleanup hook corresponding to @code{TARGET_SCHED_INIT_GLOBAL}.
+@var{file} is either a null pointer, or a stdio stream to write any debug output to.
+@var{verbose} is the verbose level provided by @option{-fsched-verbose-@var{n}}.
+@end deftypefn
+
+@deftypefn {Target Hook} rtx TARGET_SCHED_DFA_PRE_CYCLE_INSN (void)
+The hook returns an RTL insn.  The automaton state used in the
+pipeline hazard recognizer is changed as if the insn were scheduled
+when the new simulated processor cycle starts.  Usage of the hook may
+simplify the automaton pipeline description for some @acronym{VLIW}
+processors.  If the hook is defined, it is used only for the automaton
+based pipeline description.  The default is not to change the state
+when the new simulated processor cycle starts.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SCHED_INIT_DFA_PRE_CYCLE_INSN (void)
+The hook can be used to initialize data used by the previous hook.
+@end deftypefn
+
+@deftypefn {Target Hook} rtx TARGET_SCHED_DFA_POST_CYCLE_INSN (void)
+The hook is analogous to @samp{TARGET_SCHED_DFA_PRE_CYCLE_INSN} but used
+to changed the state as if the insn were scheduled when the new
+simulated processor cycle finishes.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SCHED_INIT_DFA_POST_CYCLE_INSN (void)
+The hook is analogous to @samp{TARGET_SCHED_INIT_DFA_PRE_CYCLE_INSN} but
+used to initialize data used by the previous hook.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SCHED_DFA_PRE_ADVANCE_CYCLE (void)
+The hook to notify target that the current simulated cycle is about to finish.
+The hook is analogous to @samp{TARGET_SCHED_DFA_PRE_CYCLE_INSN} but used
+to change the state in more complicated situations - e.g., when advancing
+state on a single insn is not enough.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SCHED_DFA_POST_ADVANCE_CYCLE (void)
+The hook to notify target that new simulated cycle has just started.
+The hook is analogous to @samp{TARGET_SCHED_DFA_POST_CYCLE_INSN} but used
+to change the state in more complicated situations - e.g., when advancing
+state on a single insn is not enough.
+@end deftypefn
+
+@deftypefn {Target Hook} int TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD (void)
+This hook controls better choosing an insn from the ready insn queue
+for the @acronym{DFA}-based insn scheduler.  Usually the scheduler
+chooses the first insn from the queue.  If the hook returns a positive
+value, an additional scheduler code tries all permutations of
+@samp{TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD ()}
+subsequent ready insns to choose an insn whose issue will result in
+maximal number of issued insns on the same cycle.  For the
+@acronym{VLIW} processor, the code could actually solve the problem of
+packing simple insns into the @acronym{VLIW} insn.  Of course, if the
+rules of @acronym{VLIW} packing are described in the automaton.
+
+This code also could be used for superscalar @acronym{RISC}
+processors.  Let us consider a superscalar @acronym{RISC} processor
+with 3 pipelines.  Some insns can be executed in pipelines @var{A} or
+@var{B}, some insns can be executed only in pipelines @var{B} or
+@var{C}, and one insn can be executed in pipeline @var{B}.  The
+processor may issue the 1st insn into @var{A} and the 2nd one into
+@var{B}.  In this case, the 3rd insn will wait for freeing @var{B}
+until the next cycle.  If the scheduler issues the 3rd insn the first,
+the processor could issue all 3 insns per cycle.
+
+Actually this code demonstrates advantages of the automaton based
+pipeline hazard recognizer.  We try quickly and easy many insn
+schedules to choose the best one.
+
+The default is no multipass scheduling.
+@end deftypefn
+
+@deftypefn {Target Hook} int TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD (rtx @var{insn})
+
+This hook controls what insns from the ready insn queue will be
+considered for the multipass insn scheduling.  If the hook returns
+zero for @var{insn}, the insn will be not chosen to
+be issued.
+
+The default is that any ready insns can be chosen to be issued.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SCHED_FIRST_CYCLE_MULTIPASS_BEGIN (void *@var{data}, char *@var{ready_try}, int @var{n_ready}, bool @var{first_cycle_insn_p})
+This hook prepares the target backend for a new round of multipass
+scheduling.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SCHED_FIRST_CYCLE_MULTIPASS_ISSUE (void *@var{data}, char *@var{ready_try}, int @var{n_ready}, rtx @var{insn}, const void *@var{prev_data})
+This hook is called when multipass scheduling evaluates instruction INSN.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SCHED_FIRST_CYCLE_MULTIPASS_BACKTRACK (const void *@var{data}, char *@var{ready_try}, int @var{n_ready})
+This is called when multipass scheduling backtracks from evaluation of
+an instruction.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SCHED_FIRST_CYCLE_MULTIPASS_END (const void *@var{data})
+This hook notifies the target about the result of the concluded current
+round of multipass scheduling.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SCHED_FIRST_CYCLE_MULTIPASS_INIT (void *@var{data})
+This hook initializes target-specific data used in multipass scheduling.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SCHED_FIRST_CYCLE_MULTIPASS_FINI (void *@var{data})
+This hook finalizes target-specific data used in multipass scheduling.
+@end deftypefn
+
+@deftypefn {Target Hook} int TARGET_SCHED_DFA_NEW_CYCLE (FILE *@var{dump}, int @var{verbose}, rtx @var{insn}, int @var{last_clock}, int @var{clock}, int *@var{sort_p})
+This hook is called by the insn scheduler before issuing @var{insn}
+on cycle @var{clock}.  If the hook returns nonzero,
+@var{insn} is not issued on this processor cycle.  Instead,
+the processor cycle is advanced.  If *@var{sort_p}
+is zero, the insn ready queue is not sorted on the new cycle
+start as usually.  @var{dump} and @var{verbose} specify the file and
+verbosity level to use for debugging output.
+@var{last_clock} and @var{clock} are, respectively, the
+processor cycle on which the previous insn has been issued,
+and the current processor cycle.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_SCHED_IS_COSTLY_DEPENDENCE (struct _dep *@var{_dep}, int @var{cost}, int @var{distance})
+This hook is used to define which dependences are considered costly by
+the target, so costly that it is not advisable to schedule the insns that
+are involved in the dependence too close to one another.  The parameters
+to this hook are as follows:  The first parameter @var{_dep} is the dependence
+being evaluated.  The second parameter @var{cost} is the cost of the
+dependence as estimated by the scheduler, and the third
+parameter @var{distance} is the distance in cycles between the two insns.
+The hook returns @code{true} if considering the distance between the two
+insns the dependence between them is considered costly by the target,
+and @code{false} otherwise.
+
+Defining this hook can be useful in multiple-issue out-of-order machines,
+where (a) it's practically hopeless to predict the actual data/resource
+delays, however: (b) there's a better chance to predict the actual grouping
+that will be formed, and (c) correctly emulating the grouping can be very
+important.  In such targets one may want to allow issuing dependent insns
+closer to one another---i.e., closer than the dependence distance;  however,
+not in cases of ``costly dependences'', which this hooks allows to define.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SCHED_H_I_D_EXTENDED (void)
+This hook is called by the insn scheduler after emitting a new instruction to
+the instruction stream.  The hook notifies a target backend to extend its
+per instruction data structures.
+@end deftypefn
+
+@deftypefn {Target Hook} {void *} TARGET_SCHED_ALLOC_SCHED_CONTEXT (void)
+Return a pointer to a store large enough to hold target scheduling context.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SCHED_INIT_SCHED_CONTEXT (void *@var{tc}, bool @var{clean_p})
+Initialize store pointed to by @var{tc} to hold target scheduling context.
+It @var{clean_p} is true then initialize @var{tc} as if scheduler is at the
+beginning of the block.  Otherwise, copy the current context into @var{tc}.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SCHED_SET_SCHED_CONTEXT (void *@var{tc})
+Copy target scheduling context pointed to by @var{tc} to the current context.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SCHED_CLEAR_SCHED_CONTEXT (void *@var{tc})
+Deallocate internal data in target scheduling context pointed to by @var{tc}.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SCHED_FREE_SCHED_CONTEXT (void *@var{tc})
+Deallocate a store for target scheduling context pointed to by @var{tc}.
+@end deftypefn
+
+@deftypefn {Target Hook} int TARGET_SCHED_SPECULATE_INSN (rtx @var{insn}, int @var{request}, rtx *@var{new_pat})
+This hook is called by the insn scheduler when @var{insn} has only
+speculative dependencies and therefore can be scheduled speculatively.
+The hook is used to check if the pattern of @var{insn} has a speculative
+version and, in case of successful check, to generate that speculative
+pattern.  The hook should return 1, if the instruction has a speculative form,
+or @minus{}1, if it doesn't.  @var{request} describes the type of requested
+speculation.  If the return value equals 1 then @var{new_pat} is assigned
+the generated speculative pattern.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_SCHED_NEEDS_BLOCK_P (int @var{dep_status})
+This hook is called by the insn scheduler during generation of recovery code
+for @var{insn}.  It should return @code{true}, if the corresponding check
+instruction should branch to recovery code, or @code{false} otherwise.
+@end deftypefn
+
+@deftypefn {Target Hook} rtx TARGET_SCHED_GEN_SPEC_CHECK (rtx @var{insn}, rtx @var{label}, int @var{mutate_p})
+This hook is called by the insn scheduler to generate a pattern for recovery
+check instruction.  If @var{mutate_p} is zero, then @var{insn} is a
+speculative instruction for which the check should be generated.
+@var{label} is either a label of a basic block, where recovery code should
+be emitted, or a null pointer, when requested check doesn't branch to
+recovery code (a simple check).  If @var{mutate_p} is nonzero, then
+a pattern for a branchy check corresponding to a simple check denoted by
+@var{insn} should be generated.  In this case @var{label} can't be null.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD_SPEC (const_rtx @var{insn})
+This hook is used as a workaround for
+@samp{TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD} not being
+called on the first instruction of the ready list.  The hook is used to
+discard speculative instructions that stand first in the ready list from
+being scheduled on the current cycle.  If the hook returns @code{false},
+@var{insn} will not be chosen to be issued.
+For non-speculative instructions,
+the hook should always return @code{true}.  For example, in the ia64 backend
+the hook is used to cancel data speculative insns when the ALAT table
+is nearly full.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SCHED_SET_SCHED_FLAGS (struct spec_info_def *@var{spec_info})
+This hook is used by the insn scheduler to find out what features should be
+enabled/used.
+The structure *@var{spec_info} should be filled in by the target.
+The structure describes speculation types that can be used in the scheduler.
+@end deftypefn
+
+@deftypefn {Target Hook} int TARGET_SCHED_SMS_RES_MII (struct ddg *@var{g})
+This hook is called by the swing modulo scheduler to calculate a
+resource-based lower bound which is based on the resources available in
+the machine and the resources required by each instruction.  The target
+backend can use @var{g} to calculate such bound.  A very simple lower
+bound will be used in case this hook is not implemented: the total number
+of instructions divided by the issue rate.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_SCHED_DISPATCH (rtx @var{insn}, int @var{x})
+This hook is called by Haifa Scheduler.  It returns true if dispatch scheduling
+is supported in hardware and the condition specified in the parameter is true.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SCHED_DISPATCH_DO (rtx @var{insn}, int @var{x})
+This hook is called by Haifa Scheduler.  It performs the operation specified
+in its second parameter.
+@end deftypefn
+
+@node Sections
+@section Dividing the Output into Sections (Texts, Data, @dots{})
+@c the above section title is WAY too long.  maybe cut the part between
+@c the (...)?  --mew 10feb93
+
+An object file is divided into sections containing different types of
+data.  In the most common case, there are three sections: the @dfn{text
+section}, which holds instructions and read-only data; the @dfn{data
+section}, which holds initialized writable data; and the @dfn{bss
+section}, which holds uninitialized data.  Some systems have other kinds
+of sections.
+
+@file{varasm.c} provides several well-known sections, such as
+@code{text_section}, @code{data_section} and @code{bss_section}.
+The normal way of controlling a @code{@var{foo}_section} variable
+is to define the associated @code{@var{FOO}_SECTION_ASM_OP} macro,
+as described below.  The macros are only read once, when @file{varasm.c}
+initializes itself, so their values must be run-time constants.
+They may however depend on command-line flags.
+
+@emph{Note:} Some run-time files, such @file{crtstuff.c}, also make
+use of the @code{@var{FOO}_SECTION_ASM_OP} macros, and expect them
+to be string literals.
+
+Some assemblers require a different string to be written every time a
+section is selected.  If your assembler falls into this category, you
+should define the @code{TARGET_ASM_INIT_SECTIONS} hook and use
+@code{get_unnamed_section} to set up the sections.
+
+You must always create a @code{text_section}, either by defining
+@code{TEXT_SECTION_ASM_OP} or by initializing @code{text_section}
+in @code{TARGET_ASM_INIT_SECTIONS}.  The same is true of
+@code{data_section} and @code{DATA_SECTION_ASM_OP}.  If you do not
+create a distinct @code{readonly_data_section}, the default is to
+reuse @code{text_section}.
+
+All the other @file{varasm.c} sections are optional, and are null
+if the target does not provide them.
+
+@defmac TEXT_SECTION_ASM_OP
+A C expression whose value is a string, including spacing, containing the
+assembler operation that should precede instructions and read-only data.
+Normally @code{"\t.text"} is right.
+@end defmac
+
+@defmac HOT_TEXT_SECTION_NAME
+If defined, a C string constant for the name of the section containing most
+frequently executed functions of the program.  If not defined, GCC will provide
+a default definition if the target supports named sections.
+@end defmac
+
+@defmac UNLIKELY_EXECUTED_TEXT_SECTION_NAME
+If defined, a C string constant for the name of the section containing unlikely
+executed functions in the program.
+@end defmac
+
+@defmac DATA_SECTION_ASM_OP
+A C expression whose value is a string, including spacing, containing the
+assembler operation to identify the following data as writable initialized
+data.  Normally @code{"\t.data"} is right.
+@end defmac
+
+@defmac SDATA_SECTION_ASM_OP
+If defined, a C expression whose value is a string, including spacing,
+containing the assembler operation to identify the following data as
+initialized, writable small data.
+@end defmac
+
+@defmac READONLY_DATA_SECTION_ASM_OP
+A C expression whose value is a string, including spacing, containing the
+assembler operation to identify the following data as read-only initialized
+data.
+@end defmac
+
+@defmac BSS_SECTION_ASM_OP
+If defined, a C expression whose value is a string, including spacing,
+containing the assembler operation to identify the following data as
+uninitialized global data.  If not defined, and neither
+@code{ASM_OUTPUT_BSS} nor @code{ASM_OUTPUT_ALIGNED_BSS} are defined,
+uninitialized global data will be output in the data section if
+@option{-fno-common} is passed, otherwise @code{ASM_OUTPUT_COMMON} will be
+used.
+@end defmac
+
+@defmac SBSS_SECTION_ASM_OP
+If defined, a C expression whose value is a string, including spacing,
+containing the assembler operation to identify the following data as
+uninitialized, writable small data.
+@end defmac
+
+@defmac TLS_COMMON_ASM_OP
+If defined, a C expression whose value is a string containing the
+assembler operation to identify the following data as thread-local
+common data.  The default is @code{".tls_common"}.
+@end defmac
+
+@defmac TLS_SECTION_ASM_FLAG
+If defined, a C expression whose value is a character constant
+containing the flag used to mark a section as a TLS section.  The
+default is @code{'T'}.
+@end defmac
+
+@defmac INIT_SECTION_ASM_OP
+If defined, a C expression whose value is a string, including spacing,
+containing the assembler operation to identify the following data as
+initialization code.  If not defined, GCC will assume such a section does
+not exist.  This section has no corresponding @code{init_section}
+variable; it is used entirely in runtime code.
+@end defmac
+
+@defmac FINI_SECTION_ASM_OP
+If defined, a C expression whose value is a string, including spacing,
+containing the assembler operation to identify the following data as
+finalization code.  If not defined, GCC will assume such a section does
+not exist.  This section has no corresponding @code{fini_section}
+variable; it is used entirely in runtime code.
+@end defmac
+
+@defmac INIT_ARRAY_SECTION_ASM_OP
+If defined, a C expression whose value is a string, including spacing,
+containing the assembler operation to identify the following data as
+part of the @code{.init_array} (or equivalent) section.  If not
+defined, GCC will assume such a section does not exist.  Do not define
+both this macro and @code{INIT_SECTION_ASM_OP}.
+@end defmac
+
+@defmac FINI_ARRAY_SECTION_ASM_OP
+If defined, a C expression whose value is a string, including spacing,
+containing the assembler operation to identify the following data as
+part of the @code{.fini_array} (or equivalent) section.  If not
+defined, GCC will assume such a section does not exist.  Do not define
+both this macro and @code{FINI_SECTION_ASM_OP}.
+@end defmac
+
+@defmac CRT_CALL_STATIC_FUNCTION (@var{section_op}, @var{function})
+If defined, an ASM statement that switches to a different section
+via @var{section_op}, calls @var{function}, and switches back to
+the text section.  This is used in @file{crtstuff.c} if
+@code{INIT_SECTION_ASM_OP} or @code{FINI_SECTION_ASM_OP} to calls
+to initialization and finalization functions from the init and fini
+sections.  By default, this macro uses a simple function call.  Some
+ports need hand-crafted assembly code to avoid dependencies on
+registers initialized in the function prologue or to ensure that
+constant pools don't end up too far way in the text section.
+@end defmac
+
+@defmac TARGET_LIBGCC_SDATA_SECTION
+If defined, a string which names the section into which small
+variables defined in crtstuff and libgcc should go.  This is useful
+when the target has options for optimizing access to small data, and
+you want the crtstuff and libgcc routines to be conservative in what
+they expect of your application yet liberal in what your application
+expects.  For example, for targets with a @code{.sdata} section (like
+MIPS), you could compile crtstuff with @code{-G 0} so that it doesn't
+require small data support from your application, but use this macro
+to put small data into @code{.sdata} so that your application can
+access these variables whether it uses small data or not.
+@end defmac
+
+@defmac FORCE_CODE_SECTION_ALIGN
+If defined, an ASM statement that aligns a code section to some
+arbitrary boundary.  This is used to force all fragments of the
+@code{.init} and @code{.fini} sections to have to same alignment
+and thus prevent the linker from having to add any padding.
+@end defmac
+
+@defmac JUMP_TABLES_IN_TEXT_SECTION
+Define this macro to be an expression with a nonzero value if jump
+tables (for @code{tablejump} insns) should be output in the text
+section, along with the assembler instructions.  Otherwise, the
+readonly data section is used.
+
+This macro is irrelevant if there is no separate readonly data section.
+@end defmac
+
+@deftypefn {Target Hook} void TARGET_ASM_INIT_SECTIONS (void)
+Define this hook if you need to do something special to set up the
+@file{varasm.c} sections, or if your target has some special sections
+of its own that you need to create.
+
+GCC calls this hook after processing the command line, but before writing
+any assembly code, and before calling any of the section-returning hooks
+described below.
+@end deftypefn
+
+@deftypefn {Target Hook} int TARGET_ASM_RELOC_RW_MASK (void)
+Return a mask describing how relocations should be treated when
+selecting sections.  Bit 1 should be set if global relocations
+should be placed in a read-write section; bit 0 should be set if
+local relocations should be placed in a read-write section.
+
+The default version of this function returns 3 when @option{-fpic}
+is in effect, and 0 otherwise.  The hook is typically redefined
+when the target cannot support (some kinds of) dynamic relocations
+in read-only sections even in executables.
+@end deftypefn
+
+@deftypefn {Target Hook} {section *} TARGET_ASM_SELECT_SECTION (tree @var{exp}, int @var{reloc}, unsigned HOST_WIDE_INT @var{align})
+Return the section into which @var{exp} should be placed.  You can
+assume that @var{exp} is either a @code{VAR_DECL} node or a constant of
+some sort.  @var{reloc} indicates whether the initial value of @var{exp}
+requires link-time relocations.  Bit 0 is set when variable contains
+local relocations only, while bit 1 is set for global relocations.
+@var{align} is the constant alignment in bits.
+
+The default version of this function takes care of putting read-only
+variables in @code{readonly_data_section}.
+
+See also @var{USE_SELECT_SECTION_FOR_FUNCTIONS}.
+@end deftypefn
+
+@defmac USE_SELECT_SECTION_FOR_FUNCTIONS
+Define this macro if you wish TARGET_ASM_SELECT_SECTION to be called
+for @code{FUNCTION_DECL}s as well as for variables and constants.
+
+In the case of a @code{FUNCTION_DECL}, @var{reloc} will be zero if the
+function has been determined to be likely to be called, and nonzero if
+it is unlikely to be called.
+@end defmac
+
+@deftypefn {Target Hook} void TARGET_ASM_UNIQUE_SECTION (tree @var{decl}, int @var{reloc})
+Build up a unique section name, expressed as a @code{STRING_CST} node,
+and assign it to @samp{DECL_SECTION_NAME (@var{decl})}.
+As with @code{TARGET_ASM_SELECT_SECTION}, @var{reloc} indicates whether
+the initial value of @var{exp} requires link-time relocations.
+
+The default version of this function appends the symbol name to the
+ELF section name that would normally be used for the symbol.  For
+example, the function @code{foo} would be placed in @code{.text.foo}.
+Whatever the actual target object format, this is often good enough.
+@end deftypefn
+
+@deftypefn {Target Hook} {section *} TARGET_ASM_FUNCTION_RODATA_SECTION (tree @var{decl})
+Return the readonly data section associated with
+@samp{DECL_SECTION_NAME (@var{decl})}.
+The default version of this function selects @code{.gnu.linkonce.r.name} if
+the function's section is @code{.gnu.linkonce.t.name}, @code{.rodata.name}
+if function is in @code{.text.name}, and the normal readonly-data section
+otherwise.
+@end deftypefn
+
+@deftypefn {Target Hook} {section *} TARGET_ASM_SELECT_RTX_SECTION (enum machine_mode @var{mode}, rtx @var{x}, unsigned HOST_WIDE_INT @var{align})
+Return the section into which a constant @var{x}, of mode @var{mode},
+should be placed.  You can assume that @var{x} is some kind of
+constant in RTL@.  The argument @var{mode} is redundant except in the
+case of a @code{const_int} rtx.  @var{align} is the constant alignment
+in bits.
+
+The default version of this function takes care of putting symbolic
+constants in @code{flag_pic} mode in @code{data_section} and everything
+else in @code{readonly_data_section}.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_MANGLE_DECL_ASSEMBLER_NAME (tree @var{decl}, tree @var{id})
+Define this hook if you need to postprocess the assembler name generated
+by target-independent code.  The @var{id} provided to this hook will be
+the computed name (e.g., the macro @code{DECL_NAME} of the @var{decl} in C,
+or the mangled name of the @var{decl} in C++).  The return value of the
+hook is an @code{IDENTIFIER_NODE} for the appropriate mangled name on
+your target system.  The default implementation of this hook just
+returns the @var{id} provided.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_ENCODE_SECTION_INFO (tree @var{decl}, rtx @var{rtl}, int @var{new_decl_p})
+Define this hook if references to a symbol or a constant must be
+treated differently depending on something about the variable or
+function named by the symbol (such as what section it is in).
+
+The hook is executed immediately after rtl has been created for
+@var{decl}, which may be a variable or function declaration or
+an entry in the constant pool.  In either case, @var{rtl} is the
+rtl in question.  Do @emph{not} use @code{DECL_RTL (@var{decl})}
+in this hook; that field may not have been initialized yet.
+
+In the case of a constant, it is safe to assume that the rtl is
+a @code{mem} whose address is a @code{symbol_ref}.  Most decls
+will also have this form, but that is not guaranteed.  Global
+register variables, for instance, will have a @code{reg} for their
+rtl.  (Normally the right thing to do with such unusual rtl is
+leave it alone.)
+
+The @var{new_decl_p} argument will be true if this is the first time
+that @code{TARGET_ENCODE_SECTION_INFO} has been invoked on this decl.  It will
+be false for subsequent invocations, which will happen for duplicate
+declarations.  Whether or not anything must be done for the duplicate
+declaration depends on whether the hook examines @code{DECL_ATTRIBUTES}.
+@var{new_decl_p} is always true when the hook is called for a constant.
+
+@cindex @code{SYMBOL_REF_FLAG}, in @code{TARGET_ENCODE_SECTION_INFO}
+The usual thing for this hook to do is to record flags in the
+@code{symbol_ref}, using @code{SYMBOL_REF_FLAG} or @code{SYMBOL_REF_FLAGS}.
+Historically, the name string was modified if it was necessary to
+encode more than one bit of information, but this practice is now
+discouraged; use @code{SYMBOL_REF_FLAGS}.
+
+The default definition of this hook, @code{default_encode_section_info}
+in @file{varasm.c}, sets a number of commonly-useful bits in
+@code{SYMBOL_REF_FLAGS}.  Check whether the default does what you need
+before overriding it.
+@end deftypefn
+
+@deftypefn {Target Hook} {const char *} TARGET_STRIP_NAME_ENCODING (const char *@var{name})
+Decode @var{name} and return the real name part, sans
+the characters that @code{TARGET_ENCODE_SECTION_INFO}
+may have added.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_IN_SMALL_DATA_P (const_tree @var{exp})
+Returns true if @var{exp} should be placed into a ``small data'' section.
+The default version of this hook always returns false.
+@end deftypefn
+
+@deftypevr {Target Hook} bool TARGET_HAVE_SRODATA_SECTION
+Contains the value true if the target places read-only
+``small data'' into a separate section.  The default value is false.
+@end deftypevr
+
+@deftypefn {Target Hook} bool TARGET_PROFILE_BEFORE_PROLOGUE (void)
+It returns true if target wants profile code emitted before prologue.
+
+The default version of this hook use the target macro
+@code{PROFILE_BEFORE_PROLOGUE}.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_BINDS_LOCAL_P (const_tree @var{exp})
+Returns true if @var{exp} names an object for which name resolution
+rules must resolve to the current ``module'' (dynamic shared library
+or executable image).
+
+The default version of this hook implements the name resolution rules
+for ELF, which has a looser model of global name binding than other
+currently supported object file formats.
+@end deftypefn
+
+@deftypevr {Target Hook} bool TARGET_HAVE_TLS
+Contains the value true if the target supports thread-local storage.
+The default value is false.
+@end deftypevr
+
+
+@node PIC
+@section Position Independent Code
+@cindex position independent code
+@cindex PIC
+
+This section describes macros that help implement generation of position
+independent code.  Simply defining these macros is not enough to
+generate valid PIC; you must also add support to the hook
+@code{TARGET_LEGITIMATE_ADDRESS_P} and to the macro
+@code{PRINT_OPERAND_ADDRESS}, as well as @code{LEGITIMIZE_ADDRESS}.  You
+must modify the definition of @samp{movsi} to do something appropriate
+when the source operand contains a symbolic address.  You may also
+need to alter the handling of switch statements so that they use
+relative addresses.
+@c i rearranged the order of the macros above to try to force one of 
+@c them to the next line, to eliminate an overfull hbox. --mew 10feb93
+
+@defmac PIC_OFFSET_TABLE_REGNUM
+The register number of the register used to address a table of static
+data addresses in memory.  In some cases this register is defined by a
+processor's ``application binary interface'' (ABI)@.  When this macro
+is defined, RTL is generated for this register once, as with the stack
+pointer and frame pointer registers.  If this macro is not defined, it
+is up to the machine-dependent files to allocate such a register (if
+necessary).  Note that this register must be fixed when in use (e.g.@:
+when @code{flag_pic} is true).
+@end defmac
+
+@defmac PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
+A C expression that is nonzero if the register defined by
+@code{PIC_OFFSET_TABLE_REGNUM} is clobbered by calls.  If not defined,
+the default is zero.  Do not define
+this macro if @code{PIC_OFFSET_TABLE_REGNUM} is not defined.
+@end defmac
+
+@defmac LEGITIMATE_PIC_OPERAND_P (@var{x})
+A C expression that is nonzero if @var{x} is a legitimate immediate
+operand on the target machine when generating position independent code.
+You can assume that @var{x} satisfies @code{CONSTANT_P}, so you need not
+check this.  You can also assume @var{flag_pic} is true, so you need not
+check it either.  You need not define this macro if all constants
+(including @code{SYMBOL_REF}) can be immediate operands when generating
+position independent code.
+@end defmac
+
+@node Assembler Format
+@section Defining the Output Assembler Language
+
+This section describes macros whose principal purpose is to describe how
+to write instructions in assembler language---rather than what the
+instructions do.
+
+@menu
+* File Framework::       Structural information for the assembler file.
+* Data Output::          Output of constants (numbers, strings, addresses).
+* Uninitialized Data::   Output of uninitialized variables.
+* Label Output::         Output and generation of labels.
+* Initialization::       General principles of initialization
+                         and termination routines.
+* Macros for Initialization::
+                         Specific macros that control the handling of
+                         initialization and termination routines.
+* Instruction Output::   Output of actual instructions.
+* Dispatch Tables::      Output of jump tables.
+* Exception Region Output:: Output of exception region code.
+* Alignment Output::     Pseudo ops for alignment and skipping data.
+@end menu
+
+@node File Framework
+@subsection The Overall Framework of an Assembler File
+@cindex assembler format
+@cindex output of assembler code
+
+@c prevent bad page break with this line
+This describes the overall framework of an assembly file.
+
+@findex default_file_start
+@deftypefn {Target Hook} void TARGET_ASM_FILE_START (void)
+Output to @code{asm_out_file} any text which the assembler expects to
+find at the beginning of a file.  The default behavior is controlled
+by two flags, documented below.  Unless your target's assembler is
+quite unusual, if you override the default, you should call
+@code{default_file_start} at some point in your target hook.  This
+lets other target files rely on these variables.
+@end deftypefn
+
+@deftypevr {Target Hook} bool TARGET_ASM_FILE_START_APP_OFF
+If this flag is true, the text of the macro @code{ASM_APP_OFF} will be
+printed as the very first line in the assembly file, unless
+@option{-fverbose-asm} is in effect.  (If that macro has been defined
+to the empty string, this variable has no effect.)  With the normal
+definition of @code{ASM_APP_OFF}, the effect is to notify the GNU
+assembler that it need not bother stripping comments or extra
+whitespace from its input.  This allows it to work a bit faster.
+
+The default is false.  You should not set it to true unless you have
+verified that your port does not generate any extra whitespace or
+comments that will cause GAS to issue errors in NO_APP mode.
+@end deftypevr
+
+@deftypevr {Target Hook} bool TARGET_ASM_FILE_START_FILE_DIRECTIVE
+If this flag is true, @code{output_file_directive} will be called
+for the primary source file, immediately after printing
+@code{ASM_APP_OFF} (if that is enabled).  Most ELF assemblers expect
+this to be done.  The default is false.
+@end deftypevr
+
+@deftypefn {Target Hook} void TARGET_ASM_FILE_END (void)
+Output to @code{asm_out_file} any text which the assembler expects
+to find at the end of a file.  The default is to output nothing.
+@end deftypefn
+
+@deftypefun void file_end_indicate_exec_stack ()
+Some systems use a common convention, the @samp{.note.GNU-stack}
+special section, to indicate whether or not an object file relies on
+the stack being executable.  If your system uses this convention, you
+should define @code{TARGET_ASM_FILE_END} to this function.  If you
+need to do other things in that hook, have your hook function call
+this function.
+@end deftypefun
+
+@deftypefn {Target Hook} void TARGET_ASM_LTO_START (void)
+Output to @code{asm_out_file} any text which the assembler expects
+to find at the start of an LTO section.  The default is to output
+nothing.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_ASM_LTO_END (void)
+Output to @code{asm_out_file} any text which the assembler expects
+to find at the end of an LTO section.  The default is to output
+nothing.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_ASM_CODE_END (void)
+Output to @code{asm_out_file} any text which is needed before emitting
+unwind info and debug info at the end of a file.  Some targets emit
+here PIC setup thunks that cannot be emitted at the end of file,
+because they couldn't have unwind info then.  The default is to output
+nothing.
+@end deftypefn
+
+@defmac ASM_COMMENT_START
+A C string constant describing how to begin a comment in the target
+assembler language.  The compiler assumes that the comment will end at
+the end of the line.
+@end defmac
+
+@defmac ASM_APP_ON
+A C string constant for text to be output before each @code{asm}
+statement or group of consecutive ones.  Normally this is
+@code{"#APP"}, which is a comment that has no effect on most
+assemblers but tells the GNU assembler that it must check the lines
+that follow for all valid assembler constructs.
+@end defmac
+
+@defmac ASM_APP_OFF
+A C string constant for text to be output after each @code{asm}
+statement or group of consecutive ones.  Normally this is
+@code{"#NO_APP"}, which tells the GNU assembler to resume making the
+time-saving assumptions that are valid for ordinary compiler output.
+@end defmac
+
+@defmac ASM_OUTPUT_SOURCE_FILENAME (@var{stream}, @var{name})
+A C statement to output COFF information or DWARF debugging information
+which indicates that filename @var{name} is the current source file to
+the stdio stream @var{stream}.
+
+This macro need not be defined if the standard form of output
+for the file format in use is appropriate.
+@end defmac
+
+@deftypefn {Target Hook} void TARGET_ASM_OUTPUT_SOURCE_FILENAME (FILE *@var{file}, const char *@var{name})
+Output COFF information or DWARF debugging information which indicates that filename @var{name} is the current source file to the stdio stream @var{file}.
+ 
+ This target hook need not be defined if the standard form of output for the file format in use is appropriate.
+@end deftypefn
+
+@defmac OUTPUT_QUOTED_STRING (@var{stream}, @var{string})
+A C statement to output the string @var{string} to the stdio stream
+@var{stream}.  If you do not call the function @code{output_quoted_string}
+in your config files, GCC will only call it to output filenames to
+the assembler source.  So you can use it to canonicalize the format
+of the filename using this macro.
+@end defmac
+
+@defmac ASM_OUTPUT_IDENT (@var{stream}, @var{string})
+A C statement to output something to the assembler file to handle a
+@samp{#ident} directive containing the text @var{string}.  If this
+macro is not defined, nothing is output for a @samp{#ident} directive.
+@end defmac
+
+@deftypefn {Target Hook} void TARGET_ASM_NAMED_SECTION (const char *@var{name}, unsigned int @var{flags}, tree @var{decl})
+Output assembly directives to switch to section @var{name}.  The section
+should have attributes as specified by @var{flags}, which is a bit mask
+of the @code{SECTION_*} flags defined in @file{output.h}.  If @var{decl}
+is non-NULL, it is the @code{VAR_DECL} or @code{FUNCTION_DECL} with which
+this section is associated.
+@end deftypefn
+
+@deftypefn {Target Hook} {section *} TARGET_ASM_FUNCTION_SECTION (tree @var{decl}, enum node_frequency @var{freq}, bool @var{startup}, bool @var{exit})
+Return preferred text (sub)section for function @var{decl}.
+Main purpose of this function is to separate cold, normal and hot
+functions. @var{startup} is true when function is known to be used only 
+at startup (from static constructors or it is @code{main()}).
+@var{exit} is true when function is known to be used only at exit
+(from static destructors).
+Return NULL if function should go to default text section.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_ASM_FUNCTION_SWITCHED_TEXT_SECTIONS (FILE *@var{file}, tree @var{decl}, bool @var{new_is_cold})
+Used by the target to emit any assembler directives or additional  labels needed when a function is partitioned between different  sections.  Output should be written to @var{file}.  The function  decl is available as @var{decl} and the new section is `cold' if  @var{new_is_cold} is @code{true}.
+@end deftypefn
+
+@deftypevr {Target Hook} bool TARGET_HAVE_NAMED_SECTIONS
+This flag is true if the target supports @code{TARGET_ASM_NAMED_SECTION}.
+It must not be modified by command-line option processing.
+@end deftypevr
+
+@anchor{TARGET_HAVE_SWITCHABLE_BSS_SECTIONS}
+@deftypevr {Target Hook} bool TARGET_HAVE_SWITCHABLE_BSS_SECTIONS
+This flag is true if we can create zeroed data by switching to a BSS
+section and then using @code{ASM_OUTPUT_SKIP} to allocate the space.
+This is true on most ELF targets.
+@end deftypevr
+
+@deftypefn {Target Hook} {unsigned int} TARGET_SECTION_TYPE_FLAGS (tree @var{decl}, const char *@var{name}, int @var{reloc})
+Choose a set of section attributes for use by @code{TARGET_ASM_NAMED_SECTION}
+based on a variable or function decl, a section name, and whether or not the
+declaration's initializer may contain runtime relocations.  @var{decl} may be
+null, in which case read-write data should be assumed.
+
+The default version of this function handles choosing code vs data,
+read-only vs read-write data, and @code{flag_pic}.  You should only
+need to override this if your target has special flags that might be
+set via @code{__attribute__}.
+@end deftypefn
+
+@deftypefn {Target Hook} int TARGET_ASM_RECORD_GCC_SWITCHES (print_switch_type @var{type}, const char *@var{text})
+Provides the target with the ability to record the gcc command line
+switches that have been passed to the compiler, and options that are
+enabled.  The @var{type} argument specifies what is being recorded.
+It can take the following values:
+
+@table @gcctabopt
+@item SWITCH_TYPE_PASSED
+@var{text} is a command line switch that has been set by the user.
+
+@item SWITCH_TYPE_ENABLED
+@var{text} is an option which has been enabled.  This might be as a
+direct result of a command line switch, or because it is enabled by
+default or because it has been enabled as a side effect of a different
+command line switch.  For example, the @option{-O2} switch enables
+various different individual optimization passes.
+
+@item SWITCH_TYPE_DESCRIPTIVE
+@var{text} is either NULL or some descriptive text which should be
+ignored.  If @var{text} is NULL then it is being used to warn the
+target hook that either recording is starting or ending.  The first
+time @var{type} is SWITCH_TYPE_DESCRIPTIVE and @var{text} is NULL, the
+warning is for start up and the second time the warning is for
+wind down.  This feature is to allow the target hook to make any
+necessary preparations before it starts to record switches and to
+perform any necessary tidying up after it has finished recording
+switches.
+
+@item SWITCH_TYPE_LINE_START
+This option can be ignored by this target hook.
+
+@item  SWITCH_TYPE_LINE_END
+This option can be ignored by this target hook.
+@end table
+
+The hook's return value must be zero.  Other return values may be
+supported in the future.
+
+By default this hook is set to NULL, but an example implementation is
+provided for ELF based targets.  Called @var{elf_record_gcc_switches},
+it records the switches as ASCII text inside a new, string mergeable
+section in the assembler output file.  The name of the new section is
+provided by the @code{TARGET_ASM_RECORD_GCC_SWITCHES_SECTION} target
+hook.
+@end deftypefn
+
+@deftypevr {Target Hook} {const char *} TARGET_ASM_RECORD_GCC_SWITCHES_SECTION
+This is the name of the section that will be created by the example
+ELF implementation of the @code{TARGET_ASM_RECORD_GCC_SWITCHES} target
+hook.
+@end deftypevr
+
+@need 2000
+@node Data Output
+@subsection Output of Data
+
+
+@deftypevr {Target Hook} {const char *} TARGET_ASM_BYTE_OP
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_HI_OP
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_SI_OP
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_DI_OP
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_TI_OP
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_HI_OP
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_SI_OP
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_DI_OP
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_TI_OP
+These hooks specify assembly directives for creating certain kinds
+of integer object.  The @code{TARGET_ASM_BYTE_OP} directive creates a
+byte-sized object, the @code{TARGET_ASM_ALIGNED_HI_OP} one creates an
+aligned two-byte object, and so on.  Any of the hooks may be
+@code{NULL}, indicating that no suitable directive is available.
+
+The compiler will print these strings at the start of a new line,
+followed immediately by the object's initial value.  In most cases,
+the string should contain a tab, a pseudo-op, and then another tab.
+@end deftypevr
+
+@deftypefn {Target Hook} bool TARGET_ASM_INTEGER (rtx @var{x}, unsigned int @var{size}, int @var{aligned_p})
+The @code{assemble_integer} function uses this hook to output an
+integer object.  @var{x} is the object's value, @var{size} is its size
+in bytes and @var{aligned_p} indicates whether it is aligned.  The
+function should return @code{true} if it was able to output the
+object.  If it returns false, @code{assemble_integer} will try to
+split the object into smaller parts.
+
+The default implementation of this hook will use the
+@code{TARGET_ASM_BYTE_OP} family of strings, returning @code{false}
+when the relevant string is @code{NULL}.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA (FILE *@var{file}, rtx @var{x})
+A target hook to recognize @var{rtx} patterns that @code{output_addr_const}
+can't deal with, and output assembly code to @var{file} corresponding to
+the pattern @var{x}.  This may be used to allow machine-dependent
+@code{UNSPEC}s to appear within constants.
+
+If target hook fails to recognize a pattern, it must return @code{false},
+so that a standard error message is printed.  If it prints an error message
+itself, by calling, for example, @code{output_operand_lossage}, it may just
+return @code{true}.
+@end deftypefn
+
+@defmac OUTPUT_ADDR_CONST_EXTRA (@var{stream}, @var{x}, @var{fail})
+A C statement to recognize @var{rtx} patterns that
+@code{output_addr_const} can't deal with, and output assembly code to
+@var{stream} corresponding to the pattern @var{x}.  This may be used to
+allow machine-dependent @code{UNSPEC}s to appear within constants.
+
+If @code{OUTPUT_ADDR_CONST_EXTRA} fails to recognize a pattern, it must
+@code{goto fail}, so that a standard error message is printed.  If it
+prints an error message itself, by calling, for example,
+@code{output_operand_lossage}, it may just complete normally.
+@end defmac
+
+@defmac ASM_OUTPUT_ASCII (@var{stream}, @var{ptr}, @var{len})
+A C statement to output to the stdio stream @var{stream} an assembler
+instruction to assemble a string constant containing the @var{len}
+bytes at @var{ptr}.  @var{ptr} will be a C expression of type
+@code{char *} and @var{len} a C expression of type @code{int}.
+
+If the assembler has a @code{.ascii} pseudo-op as found in the
+Berkeley Unix assembler, do not define the macro
+@code{ASM_OUTPUT_ASCII}.
+@end defmac
+
+@defmac ASM_OUTPUT_FDESC (@var{stream}, @var{decl}, @var{n})
+A C statement to output word @var{n} of a function descriptor for
+@var{decl}.  This must be defined if @code{TARGET_VTABLE_USES_DESCRIPTORS}
+is defined, and is otherwise unused.
+@end defmac
+
+@defmac CONSTANT_POOL_BEFORE_FUNCTION
+You may define this macro as a C expression.  You should define the
+expression to have a nonzero value if GCC should output the constant
+pool for a function before the code for the function, or a zero value if
+GCC should output the constant pool after the function.  If you do
+not define this macro, the usual case, GCC will output the constant
+pool before the function.
+@end defmac
+
+@defmac ASM_OUTPUT_POOL_PROLOGUE (@var{file}, @var{funname}, @var{fundecl}, @var{size})
+A C statement to output assembler commands to define the start of the
+constant pool for a function.  @var{funname} is a string giving
+the name of the function.  Should the return type of the function
+be required, it can be obtained via @var{fundecl}.  @var{size}
+is the size, in bytes, of the constant pool that will be written
+immediately after this call.
+
+If no constant-pool prefix is required, the usual case, this macro need
+not be defined.
+@end defmac
+
+@defmac ASM_OUTPUT_SPECIAL_POOL_ENTRY (@var{file}, @var{x}, @var{mode}, @var{align}, @var{labelno}, @var{jumpto})
+A C statement (with or without semicolon) to output a constant in the
+constant pool, if it needs special treatment.  (This macro need not do
+anything for RTL expressions that can be output normally.)
+
+The argument @var{file} is the standard I/O stream to output the
+assembler code on.  @var{x} is the RTL expression for the constant to
+output, and @var{mode} is the machine mode (in case @var{x} is a
+@samp{const_int}).  @var{align} is the required alignment for the value
+@var{x}; you should output an assembler directive to force this much
+alignment.
+
+The argument @var{labelno} is a number to use in an internal label for
+the address of this pool entry.  The definition of this macro is
+responsible for outputting the label definition at the proper place.
+Here is how to do this:
+
+@smallexample
+@code{(*targetm.asm_out.internal_label)} (@var{file}, "LC", @var{labelno});
+@end smallexample
+
+When you output a pool entry specially, you should end with a
+@code{goto} to the label @var{jumpto}.  This will prevent the same pool
+entry from being output a second time in the usual manner.
+
+You need not define this macro if it would do nothing.
+@end defmac
+
+@defmac ASM_OUTPUT_POOL_EPILOGUE (@var{file} @var{funname} @var{fundecl} @var{size})
+A C statement to output assembler commands to at the end of the constant
+pool for a function.  @var{funname} is a string giving the name of the
+function.  Should the return type of the function be required, you can
+obtain it via @var{fundecl}.  @var{size} is the size, in bytes, of the
+constant pool that GCC wrote immediately before this call.
+
+If no constant-pool epilogue is required, the usual case, you need not
+define this macro.
+@end defmac
+
+@defmac IS_ASM_LOGICAL_LINE_SEPARATOR (@var{C}, @var{STR})
+Define this macro as a C expression which is nonzero if @var{C} is
+used as a logical line separator by the assembler.  @var{STR} points
+to the position in the string where @var{C} was found; this can be used if
+a line separator uses multiple characters.
+
+If you do not define this macro, the default is that only
+the character @samp{;} is treated as a logical line separator.
+@end defmac
+
+@deftypevr {Target Hook} {const char *} TARGET_ASM_OPEN_PAREN
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_CLOSE_PAREN
+These target hooks are C string constants, describing the syntax in the
+assembler for grouping arithmetic expressions.  If not overridden, they
+default to normal parentheses, which is correct for most assemblers.
+@end deftypevr
+
+These macros are provided by @file{real.h} for writing the definitions
+of @code{ASM_OUTPUT_DOUBLE} and the like:
+
+@defmac REAL_VALUE_TO_TARGET_SINGLE (@var{x}, @var{l})
+@defmacx REAL_VALUE_TO_TARGET_DOUBLE (@var{x}, @var{l})
+@defmacx REAL_VALUE_TO_TARGET_LONG_DOUBLE (@var{x}, @var{l})
+@defmacx REAL_VALUE_TO_TARGET_DECIMAL32 (@var{x}, @var{l})
+@defmacx REAL_VALUE_TO_TARGET_DECIMAL64 (@var{x}, @var{l})
+@defmacx REAL_VALUE_TO_TARGET_DECIMAL128 (@var{x}, @var{l})
+These translate @var{x}, of type @code{REAL_VALUE_TYPE}, to the
+target's floating point representation, and store its bit pattern in
+the variable @var{l}.  For @code{REAL_VALUE_TO_TARGET_SINGLE} and
+@code{REAL_VALUE_TO_TARGET_DECIMAL32}, this variable should be a
+simple @code{long int}.  For the others, it should be an array of
+@code{long int}.  The number of elements in this array is determined
+by the size of the desired target floating point data type: 32 bits of
+it go in each @code{long int} array element.  Each array element holds
+32 bits of the result, even if @code{long int} is wider than 32 bits
+on the host machine.
+
+The array element values are designed so that you can print them out
+using @code{fprintf} in the order they should appear in the target
+machine's memory.
+@end defmac
+
+@node Uninitialized Data
+@subsection Output of Uninitialized Variables
+
+Each of the macros in this section is used to do the whole job of
+outputting a single uninitialized variable.
+
+@defmac ASM_OUTPUT_COMMON (@var{stream}, @var{name}, @var{size}, @var{rounded})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} the assembler definition of a common-label named
+@var{name} whose size is @var{size} bytes.  The variable @var{rounded}
+is the size rounded up to whatever alignment the caller wants.  It is
+possible that @var{size} may be zero, for instance if a struct with no
+other member than a zero-length array is defined.  In this case, the
+backend must output a symbol definition that allocates at least one
+byte, both so that the address of the resulting object does not compare
+equal to any other, and because some object formats cannot even express
+the concept of a zero-sized common symbol, as that is how they represent
+an ordinary undefined external.
+
+Use the expression @code{assemble_name (@var{stream}, @var{name})} to
+output the name itself; before and after that, output the additional
+assembler syntax for defining the name, and a newline.
+
+This macro controls how the assembler definitions of uninitialized
+common global variables are output.
+@end defmac
+
+@defmac ASM_OUTPUT_ALIGNED_COMMON (@var{stream}, @var{name}, @var{size}, @var{alignment})
+Like @code{ASM_OUTPUT_COMMON} except takes the required alignment as a
+separate, explicit argument.  If you define this macro, it is used in
+place of @code{ASM_OUTPUT_COMMON}, and gives you more flexibility in
+handling the required alignment of the variable.  The alignment is specified
+as the number of bits.
+@end defmac
+
+@defmac ASM_OUTPUT_ALIGNED_DECL_COMMON (@var{stream}, @var{decl}, @var{name}, @var{size}, @var{alignment})
+Like @code{ASM_OUTPUT_ALIGNED_COMMON} except that @var{decl} of the
+variable to be output, if there is one, or @code{NULL_TREE} if there
+is no corresponding variable.  If you define this macro, GCC will use it
+in place of both @code{ASM_OUTPUT_COMMON} and
+@code{ASM_OUTPUT_ALIGNED_COMMON}.  Define this macro when you need to see
+the variable's decl in order to chose what to output.
+@end defmac
+
+@defmac ASM_OUTPUT_BSS (@var{stream}, @var{decl}, @var{name}, @var{size}, @var{rounded})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} the assembler definition of uninitialized global @var{decl} named
+@var{name} whose size is @var{size} bytes.  The variable @var{rounded}
+is the size rounded up to whatever alignment the caller wants.
+
+Try to use function @code{asm_output_bss} defined in @file{varasm.c} when
+defining this macro.  If unable, use the expression
+@code{assemble_name (@var{stream}, @var{name})} to output the name itself;
+before and after that, output the additional assembler syntax for defining
+the name, and a newline.
+
+There are two ways of handling global BSS@.  One is to define either
+this macro or its aligned counterpart, @code{ASM_OUTPUT_ALIGNED_BSS}.
+The other is to have @code{TARGET_ASM_SELECT_SECTION} return a
+switchable BSS section (@pxref{TARGET_HAVE_SWITCHABLE_BSS_SECTIONS}).
+You do not need to do both.
+
+Some languages do not have @code{common} data, and require a
+non-common form of global BSS in order to handle uninitialized globals
+efficiently.  C++ is one example of this.  However, if the target does
+not support global BSS, the front end may choose to make globals
+common in order to save space in the object file.
+@end defmac
+
+@defmac ASM_OUTPUT_ALIGNED_BSS (@var{stream}, @var{decl}, @var{name}, @var{size}, @var{alignment})
+Like @code{ASM_OUTPUT_BSS} except takes the required alignment as a
+separate, explicit argument.  If you define this macro, it is used in
+place of @code{ASM_OUTPUT_BSS}, and gives you more flexibility in
+handling the required alignment of the variable.  The alignment is specified
+as the number of bits.
+
+Try to use function @code{asm_output_aligned_bss} defined in file
+@file{varasm.c} when defining this macro.
+@end defmac
+
+@defmac ASM_OUTPUT_LOCAL (@var{stream}, @var{name}, @var{size}, @var{rounded})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} the assembler definition of a local-common-label named
+@var{name} whose size is @var{size} bytes.  The variable @var{rounded}
+is the size rounded up to whatever alignment the caller wants.
+
+Use the expression @code{assemble_name (@var{stream}, @var{name})} to
+output the name itself; before and after that, output the additional
+assembler syntax for defining the name, and a newline.
+
+This macro controls how the assembler definitions of uninitialized
+static variables are output.
+@end defmac
+
+@defmac ASM_OUTPUT_ALIGNED_LOCAL (@var{stream}, @var{name}, @var{size}, @var{alignment})
+Like @code{ASM_OUTPUT_LOCAL} except takes the required alignment as a
+separate, explicit argument.  If you define this macro, it is used in
+place of @code{ASM_OUTPUT_LOCAL}, and gives you more flexibility in
+handling the required alignment of the variable.  The alignment is specified
+as the number of bits.
+@end defmac
+
+@defmac ASM_OUTPUT_ALIGNED_DECL_LOCAL (@var{stream}, @var{decl}, @var{name}, @var{size}, @var{alignment})
+Like @code{ASM_OUTPUT_ALIGNED_DECL} except that @var{decl} of the
+variable to be output, if there is one, or @code{NULL_TREE} if there
+is no corresponding variable.  If you define this macro, GCC will use it
+in place of both @code{ASM_OUTPUT_DECL} and
+@code{ASM_OUTPUT_ALIGNED_DECL}.  Define this macro when you need to see
+the variable's decl in order to chose what to output.
+@end defmac
+
+@node Label Output
+@subsection Output and Generation of Labels
+
+@c prevent bad page break with this line
+This is about outputting labels.
+
+@findex assemble_name
+@defmac ASM_OUTPUT_LABEL (@var{stream}, @var{name})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} the assembler definition of a label named @var{name}.
+Use the expression @code{assemble_name (@var{stream}, @var{name})} to
+output the name itself; before and after that, output the additional
+assembler syntax for defining the name, and a newline.  A default
+definition of this macro is provided which is correct for most systems.
+@end defmac
+
+@defmac ASM_OUTPUT_FUNCTION_LABEL (@var{stream}, @var{name}, @var{decl})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} the assembler definition of a label named @var{name} of
+a function.
+Use the expression @code{assemble_name (@var{stream}, @var{name})} to
+output the name itself; before and after that, output the additional
+assembler syntax for defining the name, and a newline.  A default
+definition of this macro is provided which is correct for most systems.
+
+If this macro is not defined, then the function name is defined in the
+usual manner as a label (by means of @code{ASM_OUTPUT_LABEL}).
+@end defmac
+
+@findex assemble_name_raw
+@defmac ASM_OUTPUT_INTERNAL_LABEL (@var{stream}, @var{name})
+Identical to @code{ASM_OUTPUT_LABEL}, except that @var{name} is known
+to refer to a compiler-generated label.  The default definition uses
+@code{assemble_name_raw}, which is like @code{assemble_name} except
+that it is more efficient.
+@end defmac
+
+@defmac SIZE_ASM_OP
+A C string containing the appropriate assembler directive to specify the
+size of a symbol, without any arguments.  On systems that use ELF, the
+default (in @file{config/elfos.h}) is @samp{"\t.size\t"}; on other
+systems, the default is not to define this macro.
+
+Define this macro only if it is correct to use the default definitions
+of @code{ASM_OUTPUT_SIZE_DIRECTIVE} and @code{ASM_OUTPUT_MEASURED_SIZE}
+for your system.  If you need your own custom definitions of those
+macros, or if you do not need explicit symbol sizes at all, do not
+define this macro.
+@end defmac
+
+@defmac ASM_OUTPUT_SIZE_DIRECTIVE (@var{stream}, @var{name}, @var{size})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} a directive telling the assembler that the size of the
+symbol @var{name} is @var{size}.  @var{size} is a @code{HOST_WIDE_INT}.
+If you define @code{SIZE_ASM_OP}, a default definition of this macro is
+provided.
+@end defmac
+
+@defmac ASM_OUTPUT_MEASURED_SIZE (@var{stream}, @var{name})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} a directive telling the assembler to calculate the size of
+the symbol @var{name} by subtracting its address from the current
+address.
+
+If you define @code{SIZE_ASM_OP}, a default definition of this macro is
+provided.  The default assumes that the assembler recognizes a special
+@samp{.} symbol as referring to the current address, and can calculate
+the difference between this and another symbol.  If your assembler does
+not recognize @samp{.} or cannot do calculations with it, you will need
+to redefine @code{ASM_OUTPUT_MEASURED_SIZE} to use some other technique.
+@end defmac
+
+@defmac TYPE_ASM_OP
+A C string containing the appropriate assembler directive to specify the
+type of a symbol, without any arguments.  On systems that use ELF, the
+default (in @file{config/elfos.h}) is @samp{"\t.type\t"}; on other
+systems, the default is not to define this macro.
+
+Define this macro only if it is correct to use the default definition of
+@code{ASM_OUTPUT_TYPE_DIRECTIVE} for your system.  If you need your own
+custom definition of this macro, or if you do not need explicit symbol
+types at all, do not define this macro.
+@end defmac
+
+@defmac TYPE_OPERAND_FMT
+A C string which specifies (using @code{printf} syntax) the format of
+the second operand to @code{TYPE_ASM_OP}.  On systems that use ELF, the
+default (in @file{config/elfos.h}) is @samp{"@@%s"}; on other systems,
+the default is not to define this macro.
+
+Define this macro only if it is correct to use the default definition of
+@code{ASM_OUTPUT_TYPE_DIRECTIVE} for your system.  If you need your own
+custom definition of this macro, or if you do not need explicit symbol
+types at all, do not define this macro.
+@end defmac
+
+@defmac ASM_OUTPUT_TYPE_DIRECTIVE (@var{stream}, @var{type})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} a directive telling the assembler that the type of the
+symbol @var{name} is @var{type}.  @var{type} is a C string; currently,
+that string is always either @samp{"function"} or @samp{"object"}, but
+you should not count on this.
+
+If you define @code{TYPE_ASM_OP} and @code{TYPE_OPERAND_FMT}, a default
+definition of this macro is provided.
+@end defmac
+
+@defmac ASM_DECLARE_FUNCTION_NAME (@var{stream}, @var{name}, @var{decl})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} any text necessary for declaring the name @var{name} of a
+function which is being defined.  This macro is responsible for
+outputting the label definition (perhaps using
+@code{ASM_OUTPUT_FUNCTION_LABEL}).  The argument @var{decl} is the
+@code{FUNCTION_DECL} tree node representing the function.
+
+If this macro is not defined, then the function name is defined in the
+usual manner as a label (by means of @code{ASM_OUTPUT_FUNCTION_LABEL}).
+
+You may wish to use @code{ASM_OUTPUT_TYPE_DIRECTIVE} in the definition
+of this macro.
+@end defmac
+
+@defmac ASM_DECLARE_FUNCTION_SIZE (@var{stream}, @var{name}, @var{decl})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} any text necessary for declaring the size of a function
+which is being defined.  The argument @var{name} is the name of the
+function.  The argument @var{decl} is the @code{FUNCTION_DECL} tree node
+representing the function.
+
+If this macro is not defined, then the function size is not defined.
+
+You may wish to use @code{ASM_OUTPUT_MEASURED_SIZE} in the definition
+of this macro.
+@end defmac
+
+@defmac ASM_DECLARE_OBJECT_NAME (@var{stream}, @var{name}, @var{decl})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} any text necessary for declaring the name @var{name} of an
+initialized variable which is being defined.  This macro must output the
+label definition (perhaps using @code{ASM_OUTPUT_LABEL}).  The argument
+@var{decl} is the @code{VAR_DECL} tree node representing the variable.
+
+If this macro is not defined, then the variable name is defined in the
+usual manner as a label (by means of @code{ASM_OUTPUT_LABEL}).
+
+You may wish to use @code{ASM_OUTPUT_TYPE_DIRECTIVE} and/or
+@code{ASM_OUTPUT_SIZE_DIRECTIVE} in the definition of this macro.
+@end defmac
+
+@deftypefn {Target Hook} void TARGET_ASM_DECLARE_CONSTANT_NAME (FILE *@var{file}, const char *@var{name}, const_tree @var{expr}, HOST_WIDE_INT @var{size})
+A target hook to output to the stdio stream @var{file} any text necessary
+for declaring the name @var{name} of a constant which is being defined.  This
+target hook is responsible for outputting the label definition (perhaps using
+@code{assemble_label}).  The argument @var{exp} is the value of the constant,
+and @var{size} is the size of the constant in bytes.  The @var{name}
+will be an internal label.
+
+The default version of this target hook, define the @var{name} in the
+usual manner as a label (by means of @code{assemble_label}).
+
+You may wish to use @code{ASM_OUTPUT_TYPE_DIRECTIVE} in this target hook.
+@end deftypefn
+
+@defmac ASM_DECLARE_REGISTER_GLOBAL (@var{stream}, @var{decl}, @var{regno}, @var{name})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} any text necessary for claiming a register @var{regno}
+for a global variable @var{decl} with name @var{name}.
+
+If you don't define this macro, that is equivalent to defining it to do
+nothing.
+@end defmac
+
+@defmac ASM_FINISH_DECLARE_OBJECT (@var{stream}, @var{decl}, @var{toplevel}, @var{atend})
+A C statement (sans semicolon) to finish up declaring a variable name
+once the compiler has processed its initializer fully and thus has had a
+chance to determine the size of an array when controlled by an
+initializer.  This is used on systems where it's necessary to declare
+something about the size of the object.
+
+If you don't define this macro, that is equivalent to defining it to do
+nothing.
+
+You may wish to use @code{ASM_OUTPUT_SIZE_DIRECTIVE} and/or
+@code{ASM_OUTPUT_MEASURED_SIZE} in the definition of this macro.
+@end defmac
+
+@deftypefn {Target Hook} void TARGET_ASM_GLOBALIZE_LABEL (FILE *@var{stream}, const char *@var{name})
+This target hook is a function to output to the stdio stream
+@var{stream} some commands that will make the label @var{name} global;
+that is, available for reference from other files.
+
+The default implementation relies on a proper definition of
+@code{GLOBAL_ASM_OP}.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_ASM_GLOBALIZE_DECL_NAME (FILE *@var{stream}, tree @var{decl})
+This target hook is a function to output to the stdio stream
+@var{stream} some commands that will make the name associated with @var{decl}
+global; that is, available for reference from other files.
+
+The default implementation uses the TARGET_ASM_GLOBALIZE_LABEL target hook.
+@end deftypefn
+
+@defmac ASM_WEAKEN_LABEL (@var{stream}, @var{name})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} some commands that will make the label @var{name} weak;
+that is, available for reference from other files but only used if
+no other definition is available.  Use the expression
+@code{assemble_name (@var{stream}, @var{name})} to output the name
+itself; before and after that, output the additional assembler syntax
+for making that name weak, and a newline.
+
+If you don't define this macro or @code{ASM_WEAKEN_DECL}, GCC will not
+support weak symbols and you should not define the @code{SUPPORTS_WEAK}
+macro.
+@end defmac
+
+@defmac ASM_WEAKEN_DECL (@var{stream}, @var{decl}, @var{name}, @var{value})
+Combines (and replaces) the function of @code{ASM_WEAKEN_LABEL} and
+@code{ASM_OUTPUT_WEAK_ALIAS}, allowing access to the associated function
+or variable decl.  If @var{value} is not @code{NULL}, this C statement
+should output to the stdio stream @var{stream} assembler code which
+defines (equates) the weak symbol @var{name} to have the value
+@var{value}.  If @var{value} is @code{NULL}, it should output commands
+to make @var{name} weak.
+@end defmac
+
+@defmac ASM_OUTPUT_WEAKREF (@var{stream}, @var{decl}, @var{name}, @var{value})
+Outputs a directive that enables @var{name} to be used to refer to
+symbol @var{value} with weak-symbol semantics.  @code{decl} is the
+declaration of @code{name}.
+@end defmac
+
+@defmac SUPPORTS_WEAK
+A preprocessor constant expression which evaluates to true if the target
+supports weak symbols.
+
+If you don't define this macro, @file{defaults.h} provides a default
+definition.  If either @code{ASM_WEAKEN_LABEL} or @code{ASM_WEAKEN_DECL}
+is defined, the default definition is @samp{1}; otherwise, it is @samp{0}.
+@end defmac
+
+@defmac TARGET_SUPPORTS_WEAK
+A C expression which evaluates to true if the target supports weak symbols.
+
+If you don't define this macro, @file{defaults.h} provides a default
+definition.  The default definition is @samp{(SUPPORTS_WEAK)}.  Define
+this macro if you want to control weak symbol support with a compiler
+flag such as @option{-melf}.
+@end defmac
+
+@defmac MAKE_DECL_ONE_ONLY (@var{decl})
+A C statement (sans semicolon) to mark @var{decl} to be emitted as a
+public symbol such that extra copies in multiple translation units will
+be discarded by the linker.  Define this macro if your object file
+format provides support for this concept, such as the @samp{COMDAT}
+section flags in the Microsoft Windows PE/COFF format, and this support
+requires changes to @var{decl}, such as putting it in a separate section.
+@end defmac
+
+@defmac SUPPORTS_ONE_ONLY
+A C expression which evaluates to true if the target supports one-only
+semantics.
+
+If you don't define this macro, @file{varasm.c} provides a default
+definition.  If @code{MAKE_DECL_ONE_ONLY} is defined, the default
+definition is @samp{1}; otherwise, it is @samp{0}.  Define this macro if
+you want to control one-only symbol support with a compiler flag, or if
+setting the @code{DECL_ONE_ONLY} flag is enough to mark a declaration to
+be emitted as one-only.
+@end defmac
+
+@deftypefn {Target Hook} void TARGET_ASM_ASSEMBLE_VISIBILITY (tree @var{decl}, int @var{visibility})
+This target hook is a function to output to @var{asm_out_file} some
+commands that will make the symbol(s) associated with @var{decl} have
+hidden, protected or internal visibility as specified by @var{visibility}.
+@end deftypefn
+
+@defmac TARGET_WEAK_NOT_IN_ARCHIVE_TOC
+A C expression that evaluates to true if the target's linker expects
+that weak symbols do not appear in a static archive's table of contents.
+The default is @code{0}.
+
+Leaving weak symbols out of an archive's table of contents means that,
+if a symbol will only have a definition in one translation unit and
+will have undefined references from other translation units, that
+symbol should not be weak.  Defining this macro to be nonzero will
+thus have the effect that certain symbols that would normally be weak
+(explicit template instantiations, and vtables for polymorphic classes
+with noninline key methods) will instead be nonweak.
+
+The C++ ABI requires this macro to be zero.  Define this macro for
+targets where full C++ ABI compliance is impossible and where linker
+restrictions require weak symbols to be left out of a static archive's
+table of contents.
+@end defmac
+
+@defmac ASM_OUTPUT_EXTERNAL (@var{stream}, @var{decl}, @var{name})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} any text necessary for declaring the name of an external
+symbol named @var{name} which is referenced in this compilation but
+not defined.  The value of @var{decl} is the tree node for the
+declaration.
+
+This macro need not be defined if it does not need to output anything.
+The GNU assembler and most Unix assemblers don't require anything.
+@end defmac
+
+@deftypefn {Target Hook} void TARGET_ASM_EXTERNAL_LIBCALL (rtx @var{symref})
+This target hook is a function to output to @var{asm_out_file} an assembler
+pseudo-op to declare a library function name external.  The name of the
+library function is given by @var{symref}, which is a @code{symbol_ref}.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_ASM_MARK_DECL_PRESERVED (const char *@var{symbol})
+This target hook is a function to output to @var{asm_out_file} an assembler
+directive to annotate @var{symbol} as used.  The Darwin target uses the
+.no_dead_code_strip directive.
+@end deftypefn
+
+@defmac ASM_OUTPUT_LABELREF (@var{stream}, @var{name})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} a reference in assembler syntax to a label named
+@var{name}.  This should add @samp{_} to the front of the name, if that
+is customary on your operating system, as it is in most Berkeley Unix
+systems.  This macro is used in @code{assemble_name}.
+@end defmac
+
+@deftypefn {Target Hook} tree TARGET_MANGLE_ASSEMBLER_NAME (const char *@var{name})
+Given a symbol @var{name}, perform same mangling as @code{varasm.c}'s @code{assemble_name}, but in memory rather than to a file stream, returning result as an @code{IDENTIFIER_NODE}.  Required for correct LTO symtabs.  The default implementation calls the @code{TARGET_STRIP_NAME_ENCODING} hook and then prepends the @code{USER_LABEL_PREFIX}, if any.
+@end deftypefn
+
+@defmac ASM_OUTPUT_SYMBOL_REF (@var{stream}, @var{sym})
+A C statement (sans semicolon) to output a reference to
+@code{SYMBOL_REF} @var{sym}.  If not defined, @code{assemble_name}
+will be used to output the name of the symbol.  This macro may be used
+to modify the way a symbol is referenced depending on information
+encoded by @code{TARGET_ENCODE_SECTION_INFO}.
+@end defmac
+
+@defmac ASM_OUTPUT_LABEL_REF (@var{stream}, @var{buf})
+A C statement (sans semicolon) to output a reference to @var{buf}, the
+result of @code{ASM_GENERATE_INTERNAL_LABEL}.  If not defined,
+@code{assemble_name} will be used to output the name of the symbol.
+This macro is not used by @code{output_asm_label}, or the @code{%l}
+specifier that calls it; the intention is that this macro should be set
+when it is necessary to output a label differently when its address is
+being taken.
+@end defmac
+
+@deftypefn {Target Hook} void TARGET_ASM_INTERNAL_LABEL (FILE *@var{stream}, const char *@var{prefix}, unsigned long @var{labelno})
+A function to output to the stdio stream @var{stream} a label whose
+name is made from the string @var{prefix} and the number @var{labelno}.
+
+It is absolutely essential that these labels be distinct from the labels
+used for user-level functions and variables.  Otherwise, certain programs
+will have name conflicts with internal labels.
+
+It is desirable to exclude internal labels from the symbol table of the
+object file.  Most assemblers have a naming convention for labels that
+should be excluded; on many systems, the letter @samp{L} at the
+beginning of a label has this effect.  You should find out what
+convention your system uses, and follow it.
+
+The default version of this function utilizes @code{ASM_GENERATE_INTERNAL_LABEL}.
+@end deftypefn
+
+@defmac ASM_OUTPUT_DEBUG_LABEL (@var{stream}, @var{prefix}, @var{num})
+A C statement to output to the stdio stream @var{stream} a debug info
+label whose name is made from the string @var{prefix} and the number
+@var{num}.  This is useful for VLIW targets, where debug info labels
+may need to be treated differently than branch target labels.  On some
+systems, branch target labels must be at the beginning of instruction
+bundles, but debug info labels can occur in the middle of instruction
+bundles.
+
+If this macro is not defined, then @code{(*targetm.asm_out.internal_label)} will be
+used.
+@end defmac
+
+@defmac ASM_GENERATE_INTERNAL_LABEL (@var{string}, @var{prefix}, @var{num})
+A C statement to store into the string @var{string} a label whose name
+is made from the string @var{prefix} and the number @var{num}.
+
+This string, when output subsequently by @code{assemble_name}, should
+produce the output that @code{(*targetm.asm_out.internal_label)} would produce
+with the same @var{prefix} and @var{num}.
+
+If the string begins with @samp{*}, then @code{assemble_name} will
+output the rest of the string unchanged.  It is often convenient for
+@code{ASM_GENERATE_INTERNAL_LABEL} to use @samp{*} in this way.  If the
+string doesn't start with @samp{*}, then @code{ASM_OUTPUT_LABELREF} gets
+to output the string, and may change it.  (Of course,
+@code{ASM_OUTPUT_LABELREF} is also part of your machine description, so
+you should know what it does on your machine.)
+@end defmac
+
+@defmac ASM_FORMAT_PRIVATE_NAME (@var{outvar}, @var{name}, @var{number})
+A C expression to assign to @var{outvar} (which is a variable of type
+@code{char *}) a newly allocated string made from the string
+@var{name} and the number @var{number}, with some suitable punctuation
+added.  Use @code{alloca} to get space for the string.
+
+The string will be used as an argument to @code{ASM_OUTPUT_LABELREF} to
+produce an assembler label for an internal static variable whose name is
+@var{name}.  Therefore, the string must be such as to result in valid
+assembler code.  The argument @var{number} is different each time this
+macro is executed; it prevents conflicts between similarly-named
+internal static variables in different scopes.
+
+Ideally this string should not be a valid C identifier, to prevent any
+conflict with the user's own symbols.  Most assemblers allow periods
+or percent signs in assembler symbols; putting at least one of these
+between the name and the number will suffice.
+
+If this macro is not defined, a default definition will be provided
+which is correct for most systems.
+@end defmac
+
+@defmac ASM_OUTPUT_DEF (@var{stream}, @var{name}, @var{value})
+A C statement to output to the stdio stream @var{stream} assembler code
+which defines (equates) the symbol @var{name} to have the value @var{value}.
+
+@findex SET_ASM_OP
+If @code{SET_ASM_OP} is defined, a default definition is provided which is
+correct for most systems.
+@end defmac
+
+@defmac ASM_OUTPUT_DEF_FROM_DECLS (@var{stream}, @var{decl_of_name}, @var{decl_of_value})
+A C statement to output to the stdio stream @var{stream} assembler code
+which defines (equates) the symbol whose tree node is @var{decl_of_name}
+to have the value of the tree node @var{decl_of_value}.  This macro will
+be used in preference to @samp{ASM_OUTPUT_DEF} if it is defined and if
+the tree nodes are available.
+
+@findex SET_ASM_OP
+If @code{SET_ASM_OP} is defined, a default definition is provided which is
+correct for most systems.
+@end defmac
+
+@defmac TARGET_DEFERRED_OUTPUT_DEFS (@var{decl_of_name}, @var{decl_of_value})
+A C statement that evaluates to true if the assembler code which defines
+(equates) the symbol whose tree node is @var{decl_of_name} to have the value
+of the tree node @var{decl_of_value} should be emitted near the end of the
+current compilation unit.  The default is to not defer output of defines.
+This macro affects defines output by @samp{ASM_OUTPUT_DEF} and
+@samp{ASM_OUTPUT_DEF_FROM_DECLS}.
+@end defmac
+
+@defmac ASM_OUTPUT_WEAK_ALIAS (@var{stream}, @var{name}, @var{value})
+A C statement to output to the stdio stream @var{stream} assembler code
+which defines (equates) the weak symbol @var{name} to have the value
+@var{value}.  If @var{value} is @code{NULL}, it defines @var{name} as
+an undefined weak symbol.
+
+Define this macro if the target only supports weak aliases; define
+@code{ASM_OUTPUT_DEF} instead if possible.
+@end defmac
+
+@defmac OBJC_GEN_METHOD_LABEL (@var{buf}, @var{is_inst}, @var{class_name}, @var{cat_name}, @var{sel_name})
+Define this macro to override the default assembler names used for
+Objective-C methods.
+
+The default name is a unique method number followed by the name of the
+class (e.g.@: @samp{_1_Foo}).  For methods in categories, the name of
+the category is also included in the assembler name (e.g.@:
+@samp{_1_Foo_Bar}).
+
+These names are safe on most systems, but make debugging difficult since
+the method's selector is not present in the name.  Therefore, particular
+systems define other ways of computing names.
+
+@var{buf} is an expression of type @code{char *} which gives you a
+buffer in which to store the name; its length is as long as
+@var{class_name}, @var{cat_name} and @var{sel_name} put together, plus
+50 characters extra.
+
+The argument @var{is_inst} specifies whether the method is an instance
+method or a class method; @var{class_name} is the name of the class;
+@var{cat_name} is the name of the category (or @code{NULL} if the method is not
+in a category); and @var{sel_name} is the name of the selector.
+
+On systems where the assembler can handle quoted names, you can use this
+macro to provide more human-readable names.
+@end defmac
+
+@defmac ASM_DECLARE_CLASS_REFERENCE (@var{stream}, @var{name})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} commands to declare that the label @var{name} is an
+Objective-C class reference.  This is only needed for targets whose
+linkers have special support for NeXT-style runtimes.
+@end defmac
+
+@defmac ASM_DECLARE_UNRESOLVED_REFERENCE (@var{stream}, @var{name})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} commands to declare that the label @var{name} is an
+unresolved Objective-C class reference.  This is only needed for targets
+whose linkers have special support for NeXT-style runtimes.
+@end defmac
+
+@node Initialization
+@subsection How Initialization Functions Are Handled
+@cindex initialization routines
+@cindex termination routines
+@cindex constructors, output of
+@cindex destructors, output of
+
+The compiled code for certain languages includes @dfn{constructors}
+(also called @dfn{initialization routines})---functions to initialize
+data in the program when the program is started.  These functions need
+to be called before the program is ``started''---that is to say, before
+@code{main} is called.
+
+Compiling some languages generates @dfn{destructors} (also called
+@dfn{termination routines}) that should be called when the program
+terminates.
+
+To make the initialization and termination functions work, the compiler
+must output something in the assembler code to cause those functions to
+be called at the appropriate time.  When you port the compiler to a new
+system, you need to specify how to do this.
+
+There are two major ways that GCC currently supports the execution of
+initialization and termination functions.  Each way has two variants.
+Much of the structure is common to all four variations.
+
+@findex __CTOR_LIST__
+@findex __DTOR_LIST__
+The linker must build two lists of these functions---a list of
+initialization functions, called @code{__CTOR_LIST__}, and a list of
+termination functions, called @code{__DTOR_LIST__}.
+
+Each list always begins with an ignored function pointer (which may hold
+0, @minus{}1, or a count of the function pointers after it, depending on
+the environment).  This is followed by a series of zero or more function
+pointers to constructors (or destructors), followed by a function
+pointer containing zero.
+
+Depending on the operating system and its executable file format, either
+@file{crtstuff.c} or @file{libgcc2.c} traverses these lists at startup
+time and exit time.  Constructors are called in reverse order of the
+list; destructors in forward order.
+
+The best way to handle static constructors works only for object file
+formats which provide arbitrarily-named sections.  A section is set
+aside for a list of constructors, and another for a list of destructors.
+Traditionally these are called @samp{.ctors} and @samp{.dtors}.  Each
+object file that defines an initialization function also puts a word in
+the constructor section to point to that function.  The linker
+accumulates all these words into one contiguous @samp{.ctors} section.
+Termination functions are handled similarly.
+
+This method will be chosen as the default by @file{target-def.h} if
+@code{TARGET_ASM_NAMED_SECTION} is defined.  A target that does not
+support arbitrary sections, but does support special designated
+constructor and destructor sections may define @code{CTORS_SECTION_ASM_OP}
+and @code{DTORS_SECTION_ASM_OP} to achieve the same effect.
+
+When arbitrary sections are available, there are two variants, depending
+upon how the code in @file{crtstuff.c} is called.  On systems that
+support a @dfn{.init} section which is executed at program startup,
+parts of @file{crtstuff.c} are compiled into that section.  The
+program is linked by the @command{gcc} driver like this:
+
+@smallexample
+ld -o @var{output_file} crti.o crtbegin.o @dots{} -lgcc crtend.o crtn.o
+@end smallexample
+
+The prologue of a function (@code{__init}) appears in the @code{.init}
+section of @file{crti.o}; the epilogue appears in @file{crtn.o}.  Likewise
+for the function @code{__fini} in the @dfn{.fini} section.  Normally these
+files are provided by the operating system or by the GNU C library, but
+are provided by GCC for a few targets.
+
+The objects @file{crtbegin.o} and @file{crtend.o} are (for most targets)
+compiled from @file{crtstuff.c}.  They contain, among other things, code
+fragments within the @code{.init} and @code{.fini} sections that branch
+to routines in the @code{.text} section.  The linker will pull all parts
+of a section together, which results in a complete @code{__init} function
+that invokes the routines we need at startup.
+
+To use this variant, you must define the @code{INIT_SECTION_ASM_OP}
+macro properly.
+
+If no init section is available, when GCC compiles any function called
+@code{main} (or more accurately, any function designated as a program
+entry point by the language front end calling @code{expand_main_function}),
+it inserts a procedure call to @code{__main} as the first executable code
+after the function prologue.  The @code{__main} function is defined
+in @file{libgcc2.c} and runs the global constructors.
+
+In file formats that don't support arbitrary sections, there are again
+two variants.  In the simplest variant, the GNU linker (GNU @code{ld})
+and an `a.out' format must be used.  In this case,
+@code{TARGET_ASM_CONSTRUCTOR} is defined to produce a @code{.stabs}
+entry of type @samp{N_SETT}, referencing the name @code{__CTOR_LIST__},
+and with the address of the void function containing the initialization
+code as its value.  The GNU linker recognizes this as a request to add
+the value to a @dfn{set}; the values are accumulated, and are eventually
+placed in the executable as a vector in the format described above, with
+a leading (ignored) count and a trailing zero element.
+@code{TARGET_ASM_DESTRUCTOR} is handled similarly.  Since no init
+section is available, the absence of @code{INIT_SECTION_ASM_OP} causes
+the compilation of @code{main} to call @code{__main} as above, starting
+the initialization process.
+
+The last variant uses neither arbitrary sections nor the GNU linker.
+This is preferable when you want to do dynamic linking and when using
+file formats which the GNU linker does not support, such as `ECOFF'@.  In
+this case, @code{TARGET_HAVE_CTORS_DTORS} is false, initialization and
+termination functions are recognized simply by their names.  This requires
+an extra program in the linkage step, called @command{collect2}.  This program
+pretends to be the linker, for use with GCC; it does its job by running
+the ordinary linker, but also arranges to include the vectors of
+initialization and termination functions.  These functions are called
+via @code{__main} as described above.  In order to use this method,
+@code{use_collect2} must be defined in the target in @file{config.gcc}.
+
+@ifinfo
+The following section describes the specific macros that control and
+customize the handling of initialization and termination functions.
+@end ifinfo
+
+@node Macros for Initialization
+@subsection Macros Controlling Initialization Routines
+
+Here are the macros that control how the compiler handles initialization
+and termination functions:
+
+@defmac INIT_SECTION_ASM_OP
+If defined, a C string constant, including spacing, for the assembler
+operation to identify the following data as initialization code.  If not
+defined, GCC will assume such a section does not exist.  When you are
+using special sections for initialization and termination functions, this
+macro also controls how @file{crtstuff.c} and @file{libgcc2.c} arrange to
+run the initialization functions.
+@end defmac
+
+@defmac HAS_INIT_SECTION
+If defined, @code{main} will not call @code{__main} as described above.
+This macro should be defined for systems that control start-up code
+on a symbol-by-symbol basis, such as OSF/1, and should not
+be defined explicitly for systems that support @code{INIT_SECTION_ASM_OP}.
+@end defmac
+
+@defmac LD_INIT_SWITCH
+If defined, a C string constant for a switch that tells the linker that
+the following symbol is an initialization routine.
+@end defmac
+
+@defmac LD_FINI_SWITCH
+If defined, a C string constant for a switch that tells the linker that
+the following symbol is a finalization routine.
+@end defmac
+
+@defmac COLLECT_SHARED_INIT_FUNC (@var{stream}, @var{func})
+If defined, a C statement that will write a function that can be
+automatically called when a shared library is loaded.  The function
+should call @var{func}, which takes no arguments.  If not defined, and
+the object format requires an explicit initialization function, then a
+function called @code{_GLOBAL__DI} will be generated.
+
+This function and the following one are used by collect2 when linking a
+shared library that needs constructors or destructors, or has DWARF2
+exception tables embedded in the code.
+@end defmac
+
+@defmac COLLECT_SHARED_FINI_FUNC (@var{stream}, @var{func})
+If defined, a C statement that will write a function that can be
+automatically called when a shared library is unloaded.  The function
+should call @var{func}, which takes no arguments.  If not defined, and
+the object format requires an explicit finalization function, then a
+function called @code{_GLOBAL__DD} will be generated.
+@end defmac
+
+@defmac INVOKE__main
+If defined, @code{main} will call @code{__main} despite the presence of
+@code{INIT_SECTION_ASM_OP}.  This macro should be defined for systems
+where the init section is not actually run automatically, but is still
+useful for collecting the lists of constructors and destructors.
+@end defmac
+
+@defmac SUPPORTS_INIT_PRIORITY
+If nonzero, the C++ @code{init_priority} attribute is supported and the
+compiler should emit instructions to control the order of initialization
+of objects.  If zero, the compiler will issue an error message upon
+encountering an @code{init_priority} attribute.
+@end defmac
+
+@deftypevr {Target Hook} bool TARGET_HAVE_CTORS_DTORS
+This value is true if the target supports some ``native'' method of
+collecting constructors and destructors to be run at startup and exit.
+It is false if we must use @command{collect2}.
+@end deftypevr
+
+@deftypefn {Target Hook} void TARGET_ASM_CONSTRUCTOR (rtx @var{symbol}, int @var{priority})
+If defined, a function that outputs assembler code to arrange to call
+the function referenced by @var{symbol} at initialization time.
+
+Assume that @var{symbol} is a @code{SYMBOL_REF} for a function taking
+no arguments and with no return value.  If the target supports initialization
+priorities, @var{priority} is a value between 0 and @code{MAX_INIT_PRIORITY};
+otherwise it must be @code{DEFAULT_INIT_PRIORITY}.
+
+If this macro is not defined by the target, a suitable default will
+be chosen if (1) the target supports arbitrary section names, (2) the
+target defines @code{CTORS_SECTION_ASM_OP}, or (3) @code{USE_COLLECT2}
+is not defined.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_ASM_DESTRUCTOR (rtx @var{symbol}, int @var{priority})
+This is like @code{TARGET_ASM_CONSTRUCTOR} but used for termination
+functions rather than initialization functions.
+@end deftypefn
+
+If @code{TARGET_HAVE_CTORS_DTORS} is true, the initialization routine
+generated for the generated object file will have static linkage.
+
+If your system uses @command{collect2} as the means of processing
+constructors, then that program normally uses @command{nm} to scan
+an object file for constructor functions to be called.
+
+On certain kinds of systems, you can define this macro to make
+@command{collect2} work faster (and, in some cases, make it work at all):
+
+@defmac OBJECT_FORMAT_COFF
+Define this macro if the system uses COFF (Common Object File Format)
+object files, so that @command{collect2} can assume this format and scan
+object files directly for dynamic constructor/destructor functions.
+
+This macro is effective only in a native compiler; @command{collect2} as
+part of a cross compiler always uses @command{nm} for the target machine.
+@end defmac
+
+@defmac REAL_NM_FILE_NAME
+Define this macro as a C string constant containing the file name to use
+to execute @command{nm}.  The default is to search the path normally for
+@command{nm}.
+@end defmac
+
+@defmac NM_FLAGS
+@command{collect2} calls @command{nm} to scan object files for static
+constructors and destructors and LTO info.  By default, @option{-n} is
+passed.  Define @code{NM_FLAGS} to a C string constant if other options
+are needed to get the same output format as GNU @command{nm -n}
+produces.
+@end defmac
+
+If your system supports shared libraries and has a program to list the
+dynamic dependencies of a given library or executable, you can define
+these macros to enable support for running initialization and
+termination functions in shared libraries:
+
+@defmac LDD_SUFFIX
+Define this macro to a C string constant containing the name of the program
+which lists dynamic dependencies, like @command{ldd} under SunOS 4.
+@end defmac
+
+@defmac PARSE_LDD_OUTPUT (@var{ptr})
+Define this macro to be C code that extracts filenames from the output
+of the program denoted by @code{LDD_SUFFIX}.  @var{ptr} is a variable
+of type @code{char *} that points to the beginning of a line of output
+from @code{LDD_SUFFIX}.  If the line lists a dynamic dependency, the
+code must advance @var{ptr} to the beginning of the filename on that
+line.  Otherwise, it must set @var{ptr} to @code{NULL}.
+@end defmac
+
+@defmac SHLIB_SUFFIX
+Define this macro to a C string constant containing the default shared
+library extension of the target (e.g., @samp{".so"}).  @command{collect2}
+strips version information after this suffix when generating global
+constructor and destructor names.  This define is only needed on targets
+that use @command{collect2} to process constructors and destructors.
+@end defmac
+
+@node Instruction Output
+@subsection Output of Assembler Instructions
+
+@c prevent bad page break with this line
+This describes assembler instruction output.
+
+@defmac REGISTER_NAMES
+A C initializer containing the assembler's names for the machine
+registers, each one as a C string constant.  This is what translates
+register numbers in the compiler into assembler language.
+@end defmac
+
+@defmac ADDITIONAL_REGISTER_NAMES
+If defined, a C initializer for an array of structures containing a name
+and a register number.  This macro defines additional names for hard
+registers, thus allowing the @code{asm} option in declarations to refer
+to registers using alternate names.
+@end defmac
+
+@defmac OVERLAPPING_REGISTER_NAMES
+If defined, a C initializer for an array of structures containing a
+name, a register number and a count of the number of consecutive
+machine registers the name overlaps.  This macro defines additional
+names for hard registers, thus allowing the @code{asm} option in
+declarations to refer to registers using alternate names.  Unlike
+@code{ADDITIONAL_REGISTER_NAMES}, this macro should be used when the
+register name implies multiple underlying registers.
+
+This macro should be used when it is important that a clobber in an
+@code{asm} statement clobbers all the underlying values implied by the
+register name.  For example, on ARM, clobbering the double-precision
+VFP register ``d0'' implies clobbering both single-precision registers
+``s0'' and ``s1''.
+@end defmac
+
+@defmac ASM_OUTPUT_OPCODE (@var{stream}, @var{ptr})
+Define this macro if you are using an unusual assembler that
+requires different names for the machine instructions.
+
+The definition is a C statement or statements which output an
+assembler instruction opcode to the stdio stream @var{stream}.  The
+macro-operand @var{ptr} is a variable of type @code{char *} which
+points to the opcode name in its ``internal'' form---the form that is
+written in the machine description.  The definition should output the
+opcode name to @var{stream}, performing any translation you desire, and
+increment the variable @var{ptr} to point at the end of the opcode
+so that it will not be output twice.
+
+In fact, your macro definition may process less than the entire opcode
+name, or more than the opcode name; but if you want to process text
+that includes @samp{%}-sequences to substitute operands, you must take
+care of the substitution yourself.  Just be sure to increment
+@var{ptr} over whatever text should not be output normally.
+
+@findex recog_data.operand
+If you need to look at the operand values, they can be found as the
+elements of @code{recog_data.operand}.
+
+If the macro definition does nothing, the instruction is output
+in the usual way.
+@end defmac
+
+@defmac FINAL_PRESCAN_INSN (@var{insn}, @var{opvec}, @var{noperands})
+If defined, a C statement to be executed just prior to the output of
+assembler code for @var{insn}, to modify the extracted operands so
+they will be output differently.
+
+Here the argument @var{opvec} is the vector containing the operands
+extracted from @var{insn}, and @var{noperands} is the number of
+elements of the vector which contain meaningful data for this insn.
+The contents of this vector are what will be used to convert the insn
+template into assembler code, so you can change the assembler output
+by changing the contents of the vector.
+
+This macro is useful when various assembler syntaxes share a single
+file of instruction patterns; by defining this macro differently, you
+can cause a large class of instructions to be output differently (such
+as with rearranged operands).  Naturally, variations in assembler
+syntax affecting individual insn patterns ought to be handled by
+writing conditional output routines in those patterns.
+
+If this macro is not defined, it is equivalent to a null statement.
+@end defmac
+
+@deftypefn {Target Hook} void TARGET_ASM_FINAL_POSTSCAN_INSN (FILE *@var{file}, rtx @var{insn}, rtx *@var{opvec}, int @var{noperands})
+If defined, this target hook is a function which is executed just after the
+output of assembler code for @var{insn}, to change the mode of the assembler
+if necessary.
+
+Here the argument @var{opvec} is the vector containing the operands
+extracted from @var{insn}, and @var{noperands} is the number of
+elements of the vector which contain meaningful data for this insn.
+The contents of this vector are what was used to convert the insn
+template into assembler code, so you can change the assembler mode
+by checking the contents of the vector.
+@end deftypefn
+
+@defmac PRINT_OPERAND (@var{stream}, @var{x}, @var{code})
+A C compound statement to output to stdio stream @var{stream} the
+assembler syntax for an instruction operand @var{x}.  @var{x} is an
+RTL expression.
+
+@var{code} is a value that can be used to specify one of several ways
+of printing the operand.  It is used when identical operands must be
+printed differently depending on the context.  @var{code} comes from
+the @samp{%} specification that was used to request printing of the
+operand.  If the specification was just @samp{%@var{digit}} then
+@var{code} is 0; if the specification was @samp{%@var{ltr}
+@var{digit}} then @var{code} is the ASCII code for @var{ltr}.
+
+@findex reg_names
+If @var{x} is a register, this macro should print the register's name.
+The names can be found in an array @code{reg_names} whose type is
+@code{char *[]}.  @code{reg_names} is initialized from
+@code{REGISTER_NAMES}.
+
+When the machine description has a specification @samp{%@var{punct}}
+(a @samp{%} followed by a punctuation character), this macro is called
+with a null pointer for @var{x} and the punctuation character for
+@var{code}.
+@end defmac
+
+@defmac PRINT_OPERAND_PUNCT_VALID_P (@var{code})
+A C expression which evaluates to true if @var{code} is a valid
+punctuation character for use in the @code{PRINT_OPERAND} macro.  If
+@code{PRINT_OPERAND_PUNCT_VALID_P} is not defined, it means that no
+punctuation characters (except for the standard one, @samp{%}) are used
+in this way.
+@end defmac
+
+@defmac PRINT_OPERAND_ADDRESS (@var{stream}, @var{x})
+A C compound statement to output to stdio stream @var{stream} the
+assembler syntax for an instruction operand that is a memory reference
+whose address is @var{x}.  @var{x} is an RTL expression.
+
+@cindex @code{TARGET_ENCODE_SECTION_INFO} usage
+On some machines, the syntax for a symbolic address depends on the
+section that the address refers to.  On these machines, define the hook
+@code{TARGET_ENCODE_SECTION_INFO} to store the information into the
+@code{symbol_ref}, and then check for it here.  @xref{Assembler
+Format}.
+@end defmac
+
+@findex dbr_sequence_length
+@defmac DBR_OUTPUT_SEQEND (@var{file})
+A C statement, to be executed after all slot-filler instructions have
+been output.  If necessary, call @code{dbr_sequence_length} to
+determine the number of slots filled in a sequence (zero if not
+currently outputting a sequence), to decide how many no-ops to output,
+or whatever.
+
+Don't define this macro if it has nothing to do, but it is helpful in
+reading assembly output if the extent of the delay sequence is made
+explicit (e.g.@: with white space).
+@end defmac
+
+@findex final_sequence
+Note that output routines for instructions with delay slots must be
+prepared to deal with not being output as part of a sequence
+(i.e.@: when the scheduling pass is not run, or when no slot fillers could be
+found.)  The variable @code{final_sequence} is null when not
+processing a sequence, otherwise it contains the @code{sequence} rtx
+being output.
+
+@findex asm_fprintf
+@defmac REGISTER_PREFIX
+@defmacx LOCAL_LABEL_PREFIX
+@defmacx USER_LABEL_PREFIX
+@defmacx IMMEDIATE_PREFIX
+If defined, C string expressions to be used for the @samp{%R}, @samp{%L},
+@samp{%U}, and @samp{%I} options of @code{asm_fprintf} (see
+@file{final.c}).  These are useful when a single @file{md} file must
+support multiple assembler formats.  In that case, the various @file{tm.h}
+files can define these macros differently.
+@end defmac
+
+@defmac ASM_FPRINTF_EXTENSIONS (@var{file}, @var{argptr}, @var{format})
+If defined this macro should expand to a series of @code{case}
+statements which will be parsed inside the @code{switch} statement of
+the @code{asm_fprintf} function.  This allows targets to define extra
+printf formats which may useful when generating their assembler
+statements.  Note that uppercase letters are reserved for future
+generic extensions to asm_fprintf, and so are not available to target
+specific code.  The output file is given by the parameter @var{file}.
+The varargs input pointer is @var{argptr} and the rest of the format
+string, starting the character after the one that is being switched
+upon, is pointed to by @var{format}.
+@end defmac
+
+@defmac ASSEMBLER_DIALECT
+If your target supports multiple dialects of assembler language (such as
+different opcodes), define this macro as a C expression that gives the
+numeric index of the assembler language dialect to use, with zero as the
+first variant.
+
+If this macro is defined, you may use constructs of the form
+@smallexample
+@samp{@{option0|option1|option2@dots{}@}}
+@end smallexample
+@noindent
+in the output templates of patterns (@pxref{Output Template}) or in the
+first argument of @code{asm_fprintf}.  This construct outputs
+@samp{option0}, @samp{option1}, @samp{option2}, etc., if the value of
+@code{ASSEMBLER_DIALECT} is zero, one, two, etc.  Any special characters
+within these strings retain their usual meaning.  If there are fewer
+alternatives within the braces than the value of
+@code{ASSEMBLER_DIALECT}, the construct outputs nothing.
+
+If you do not define this macro, the characters @samp{@{}, @samp{|} and
+@samp{@}} do not have any special meaning when used in templates or
+operands to @code{asm_fprintf}.
+
+Define the macros @code{REGISTER_PREFIX}, @code{LOCAL_LABEL_PREFIX},
+@code{USER_LABEL_PREFIX} and @code{IMMEDIATE_PREFIX} if you can express
+the variations in assembler language syntax with that mechanism.  Define
+@code{ASSEMBLER_DIALECT} and use the @samp{@{option0|option1@}} syntax
+if the syntax variant are larger and involve such things as different
+opcodes or operand order.
+@end defmac
+
+@defmac ASM_OUTPUT_REG_PUSH (@var{stream}, @var{regno})
+A C expression to output to @var{stream} some assembler code
+which will push hard register number @var{regno} onto the stack.
+The code need not be optimal, since this macro is used only when
+profiling.
+@end defmac
+
+@defmac ASM_OUTPUT_REG_POP (@var{stream}, @var{regno})
+A C expression to output to @var{stream} some assembler code
+which will pop hard register number @var{regno} off of the stack.
+The code need not be optimal, since this macro is used only when
+profiling.
+@end defmac
+
+@node Dispatch Tables
+@subsection Output of Dispatch Tables
+
+@c prevent bad page break with this line
+This concerns dispatch tables.
+
+@cindex dispatch table
+@defmac ASM_OUTPUT_ADDR_DIFF_ELT (@var{stream}, @var{body}, @var{value}, @var{rel})
+A C statement to output to the stdio stream @var{stream} an assembler
+pseudo-instruction to generate a difference between two labels.
+@var{value} and @var{rel} are the numbers of two internal labels.  The
+definitions of these labels are output using
+@code{(*targetm.asm_out.internal_label)}, and they must be printed in the same
+way here.  For example,
+
+@smallexample
+fprintf (@var{stream}, "\t.word L%d-L%d\n",
+         @var{value}, @var{rel})
+@end smallexample
+
+You must provide this macro on machines where the addresses in a
+dispatch table are relative to the table's own address.  If defined, GCC
+will also use this macro on all machines when producing PIC@.
+@var{body} is the body of the @code{ADDR_DIFF_VEC}; it is provided so that the
+mode and flags can be read.
+@end defmac
+
+@defmac ASM_OUTPUT_ADDR_VEC_ELT (@var{stream}, @var{value})
+This macro should be provided on machines where the addresses
+in a dispatch table are absolute.
+
+The definition should be a C statement to output to the stdio stream
+@var{stream} an assembler pseudo-instruction to generate a reference to
+a label.  @var{value} is the number of an internal label whose
+definition is output using @code{(*targetm.asm_out.internal_label)}.
+For example,
+
+@smallexample
+fprintf (@var{stream}, "\t.word L%d\n", @var{value})
+@end smallexample
+@end defmac
+
+@defmac ASM_OUTPUT_CASE_LABEL (@var{stream}, @var{prefix}, @var{num}, @var{table})
+Define this if the label before a jump-table needs to be output
+specially.  The first three arguments are the same as for
+@code{(*targetm.asm_out.internal_label)}; the fourth argument is the
+jump-table which follows (a @code{jump_insn} containing an
+@code{addr_vec} or @code{addr_diff_vec}).
+
+This feature is used on system V to output a @code{swbeg} statement
+for the table.
+
+If this macro is not defined, these labels are output with
+@code{(*targetm.asm_out.internal_label)}.
+@end defmac
+
+@defmac ASM_OUTPUT_CASE_END (@var{stream}, @var{num}, @var{table})
+Define this if something special must be output at the end of a
+jump-table.  The definition should be a C statement to be executed
+after the assembler code for the table is written.  It should write
+the appropriate code to stdio stream @var{stream}.  The argument
+@var{table} is the jump-table insn, and @var{num} is the label-number
+of the preceding label.
+
+If this macro is not defined, nothing special is output at the end of
+the jump-table.
+@end defmac
+
+@deftypefn {Target Hook} void TARGET_ASM_EMIT_UNWIND_LABEL (FILE *@var{stream}, tree @var{decl}, int @var{for_eh}, int @var{empty})
+This target hook emits a label at the beginning of each FDE@.  It
+should be defined on targets where FDEs need special labels, and it
+should write the appropriate label, for the FDE associated with the
+function declaration @var{decl}, to the stdio stream @var{stream}.
+The third argument, @var{for_eh}, is a boolean: true if this is for an
+exception table.  The fourth argument, @var{empty}, is a boolean:
+true if this is a placeholder label for an omitted FDE@.
+
+The default is that FDEs are not given nonlocal labels.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_ASM_EMIT_EXCEPT_TABLE_LABEL (FILE *@var{stream})
+This target hook emits a label at the beginning of the exception table.
+It should be defined on targets where it is desirable for the table
+to be broken up according to function.
+
+The default is that no label is emitted.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_ASM_EMIT_EXCEPT_PERSONALITY (rtx @var{personality})
+If the target implements @code{TARGET_ASM_UNWIND_EMIT}, this hook may be used to emit a directive to install a personality hook into the unwind info.  This hook should not be used if dwarf2 unwind info is used.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_ASM_UNWIND_EMIT (FILE *@var{stream}, rtx @var{insn})
+This target hook emits assembly directives required to unwind the
+given instruction.  This is only used when @code{TARGET_EXCEPT_UNWIND_INFO}
+returns @code{UI_TARGET}.
+@end deftypefn
+
+@deftypevr {Target Hook} bool TARGET_ASM_UNWIND_EMIT_BEFORE_INSN
+True if the @code{TARGET_ASM_UNWIND_EMIT} hook should be called before the assembly for @var{insn} has been emitted, false if the hook should be called afterward.
+@end deftypevr
+
+@node Exception Region Output
+@subsection Assembler Commands for Exception Regions
+
+@c prevent bad page break with this line
+
+This describes commands marking the start and the end of an exception
+region.
+
+@defmac EH_FRAME_SECTION_NAME
+If defined, a C string constant for the name of the section containing
+exception handling frame unwind information.  If not defined, GCC will
+provide a default definition if the target supports named sections.
+@file{crtstuff.c} uses this macro to switch to the appropriate section.
+
+You should define this symbol if your target supports DWARF 2 frame
+unwind information and the default definition does not work.
+@end defmac
+
+@defmac EH_FRAME_IN_DATA_SECTION
+If defined, DWARF 2 frame unwind information will be placed in the
+data section even though the target supports named sections.  This
+might be necessary, for instance, if the system linker does garbage
+collection and sections cannot be marked as not to be collected.
+
+Do not define this macro unless @code{TARGET_ASM_NAMED_SECTION} is
+also defined.
+@end defmac
+
+@defmac EH_TABLES_CAN_BE_READ_ONLY
+Define this macro to 1 if your target is such that no frame unwind
+information encoding used with non-PIC code will ever require a
+runtime relocation, but the linker may not support merging read-only
+and read-write sections into a single read-write section.
+@end defmac
+
+@defmac MASK_RETURN_ADDR
+An rtx used to mask the return address found via @code{RETURN_ADDR_RTX}, so
+that it does not contain any extraneous set bits in it.
+@end defmac
+
+@defmac DWARF2_UNWIND_INFO
+Define this macro to 0 if your target supports DWARF 2 frame unwind
+information, but it does not yet work with exception handling.
+Otherwise, if your target supports this information (if it defines
+@code{INCOMING_RETURN_ADDR_RTX} and either @code{UNALIGNED_INT_ASM_OP}
+or @code{OBJECT_FORMAT_ELF}), GCC will provide a default definition of 1.
+@end defmac
+
+@deftypefn {Target Hook} {enum unwind_info_type} TARGET_EXCEPT_UNWIND_INFO (struct gcc_options *@var{opts})
+This hook defines the mechanism that will be used for exception handling
+by the target.  If the target has ABI specified unwind tables, the hook
+should return @code{UI_TARGET}.  If the target is to use the
+@code{setjmp}/@code{longjmp}-based exception handling scheme, the hook
+should return @code{UI_SJLJ}.  If the target supports DWARF 2 frame unwind
+information, the hook should return @code{UI_DWARF2}.
+
+A target may, if exceptions are disabled, choose to return @code{UI_NONE}.
+This may end up simplifying other parts of target-specific code.  The
+default implementation of this hook never returns @code{UI_NONE}.
+
+Note that the value returned by this hook should be constant.  It should
+not depend on anything except the command-line switches described by
+@var{opts}.  In particular, the
+setting @code{UI_SJLJ} must be fixed at compiler start-up as C pre-processor
+macros and builtin functions related to exception handling are set up
+depending on this setting.
+
+The default implementation of the hook first honors the
+@option{--enable-sjlj-exceptions} configure option, then
+@code{DWARF2_UNWIND_INFO}, and finally defaults to @code{UI_SJLJ}.  If
+@code{DWARF2_UNWIND_INFO} depends on command-line options, the target
+must define this hook so that @var{opts} is used correctly.
+@end deftypefn
+
+@deftypevr {Target Hook} bool TARGET_UNWIND_TABLES_DEFAULT
+This variable should be set to @code{true} if the target ABI requires unwinding
+tables even when exceptions are not used.  It must not be modified by
+command-line option processing.
+@end deftypevr
+
+@defmac DONT_USE_BUILTIN_SETJMP
+Define this macro to 1 if the @code{setjmp}/@code{longjmp}-based scheme
+should use the @code{setjmp}/@code{longjmp} functions from the C library
+instead of the @code{__builtin_setjmp}/@code{__builtin_longjmp} machinery.
+@end defmac
+
+@defmac DWARF_CIE_DATA_ALIGNMENT
+This macro need only be defined if the target might save registers in the
+function prologue at an offset to the stack pointer that is not aligned to
+@code{UNITS_PER_WORD}.  The definition should be the negative minimum
+alignment if @code{STACK_GROWS_DOWNWARD} is defined, and the positive
+minimum alignment otherwise.  @xref{SDB and DWARF}.  Only applicable if
+the target supports DWARF 2 frame unwind information.
+@end defmac
+
+@deftypevr {Target Hook} bool TARGET_TERMINATE_DW2_EH_FRAME_INFO
+Contains the value true if the target should add a zero word onto the
+end of a Dwarf-2 frame info section when used for exception handling.
+Default value is false if @code{EH_FRAME_SECTION_NAME} is defined, and
+true otherwise.
+@end deftypevr
+
+@deftypefn {Target Hook} rtx TARGET_DWARF_REGISTER_SPAN (rtx @var{reg})
+Given a register, this hook should return a parallel of registers to
+represent where to find the register pieces.  Define this hook if the
+register and its mode are represented in Dwarf in non-contiguous
+locations, or if the register should be represented in more than one
+register in Dwarf.  Otherwise, this hook should return @code{NULL_RTX}.
+If not defined, the default is to return @code{NULL_RTX}.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_INIT_DWARF_REG_SIZES_EXTRA (tree @var{address})
+If some registers are represented in Dwarf-2 unwind information in
+multiple pieces, define this hook to fill in information about the
+sizes of those pieces in the table used by the unwinder at runtime.
+It will be called by @code{expand_builtin_init_dwarf_reg_sizes} after
+filling in a single size corresponding to each hard register;
+@var{address} is the address of the table.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_ASM_TTYPE (rtx @var{sym})
+This hook is used to output a reference from a frame unwinding table to
+the type_info object identified by @var{sym}.  It should return @code{true}
+if the reference was output.  Returning @code{false} will cause the
+reference to be output using the normal Dwarf2 routines.
+@end deftypefn
+
+@deftypevr {Target Hook} bool TARGET_ARM_EABI_UNWINDER
+This flag should be set to @code{true} on targets that use an ARM EABI
+based unwinding library, and @code{false} on other targets.  This effects
+the format of unwinding tables, and how the unwinder in entered after
+running a cleanup.  The default is @code{false}.
+@end deftypevr
+
+@node Alignment Output
+@subsection Assembler Commands for Alignment
+
+@c prevent bad page break with this line
+This describes commands for alignment.
+
+@defmac JUMP_ALIGN (@var{label})
+The alignment (log base 2) to put in front of @var{label}, which is
+a common destination of jumps and has no fallthru incoming edge.
+
+This macro need not be defined if you don't want any special alignment
+to be done at such a time.  Most machine descriptions do not currently
+define the macro.
+
+Unless it's necessary to inspect the @var{label} parameter, it is better
+to set the variable @var{align_jumps} in the target's
+@code{TARGET_OPTION_OVERRIDE}.  Otherwise, you should try to honor the user's
+selection in @var{align_jumps} in a @code{JUMP_ALIGN} implementation.
+@end defmac
+
+@deftypefn {Target Hook} int TARGET_ASM_JUMP_ALIGN_MAX_SKIP (rtx @var{label})
+The maximum number of bytes to skip before @var{label} when applying
+@code{JUMP_ALIGN}.  This works only if
+@code{ASM_OUTPUT_MAX_SKIP_ALIGN} is defined.
+@end deftypefn
+
+@defmac LABEL_ALIGN_AFTER_BARRIER (@var{label})
+The alignment (log base 2) to put in front of @var{label}, which follows
+a @code{BARRIER}.
+
+This macro need not be defined if you don't want any special alignment
+to be done at such a time.  Most machine descriptions do not currently
+define the macro.
+@end defmac
+
+@deftypefn {Target Hook} int TARGET_ASM_LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP (rtx @var{label})
+The maximum number of bytes to skip before @var{label} when applying
+@code{LABEL_ALIGN_AFTER_BARRIER}.  This works only if
+@code{ASM_OUTPUT_MAX_SKIP_ALIGN} is defined.
+@end deftypefn
+
+@defmac LOOP_ALIGN (@var{label})
+The alignment (log base 2) to put in front of @var{label}, which follows
+a @code{NOTE_INSN_LOOP_BEG} note.
+
+This macro need not be defined if you don't want any special alignment
+to be done at such a time.  Most machine descriptions do not currently
+define the macro.
+
+Unless it's necessary to inspect the @var{label} parameter, it is better
+to set the variable @code{align_loops} in the target's
+@code{TARGET_OPTION_OVERRIDE}.  Otherwise, you should try to honor the user's
+selection in @code{align_loops} in a @code{LOOP_ALIGN} implementation.
+@end defmac
+
+@deftypefn {Target Hook} int TARGET_ASM_LOOP_ALIGN_MAX_SKIP (rtx @var{label})
+The maximum number of bytes to skip when applying @code{LOOP_ALIGN} to
+@var{label}.  This works only if @code{ASM_OUTPUT_MAX_SKIP_ALIGN} is
+defined.
+@end deftypefn
+
+@defmac LABEL_ALIGN (@var{label})
+The alignment (log base 2) to put in front of @var{label}.
+If @code{LABEL_ALIGN_AFTER_BARRIER} / @code{LOOP_ALIGN} specify a different alignment,
+the maximum of the specified values is used.
+
+Unless it's necessary to inspect the @var{label} parameter, it is better
+to set the variable @code{align_labels} in the target's
+@code{TARGET_OPTION_OVERRIDE}.  Otherwise, you should try to honor the user's
+selection in @code{align_labels} in a @code{LABEL_ALIGN} implementation.
+@end defmac
+
+@deftypefn {Target Hook} int TARGET_ASM_LABEL_ALIGN_MAX_SKIP (rtx @var{label})
+The maximum number of bytes to skip when applying @code{LABEL_ALIGN}
+to @var{label}.  This works only if @code{ASM_OUTPUT_MAX_SKIP_ALIGN}
+is defined.
+@end deftypefn
+
+@defmac ASM_OUTPUT_SKIP (@var{stream}, @var{nbytes})
+A C statement to output to the stdio stream @var{stream} an assembler
+instruction to advance the location counter by @var{nbytes} bytes.
+Those bytes should be zero when loaded.  @var{nbytes} will be a C
+expression of type @code{unsigned HOST_WIDE_INT}.
+@end defmac
+
+@defmac ASM_NO_SKIP_IN_TEXT
+Define this macro if @code{ASM_OUTPUT_SKIP} should not be used in the
+text section because it fails to put zeros in the bytes that are skipped.
+This is true on many Unix systems, where the pseudo--op to skip bytes
+produces no-op instructions rather than zeros when used in the text
+section.
+@end defmac
+
+@defmac ASM_OUTPUT_ALIGN (@var{stream}, @var{power})
+A C statement to output to the stdio stream @var{stream} an assembler
+command to advance the location counter to a multiple of 2 to the
+@var{power} bytes.  @var{power} will be a C expression of type @code{int}.
+@end defmac
+
+@defmac ASM_OUTPUT_ALIGN_WITH_NOP (@var{stream}, @var{power})
+Like @code{ASM_OUTPUT_ALIGN}, except that the ``nop'' instruction is used
+for padding, if necessary.
+@end defmac
+
+@defmac ASM_OUTPUT_MAX_SKIP_ALIGN (@var{stream}, @var{power}, @var{max_skip})
+A C statement to output to the stdio stream @var{stream} an assembler
+command to advance the location counter to a multiple of 2 to the
+@var{power} bytes, but only if @var{max_skip} or fewer bytes are needed to
+satisfy the alignment request.  @var{power} and @var{max_skip} will be
+a C expression of type @code{int}.
+@end defmac
+
+@need 3000
+@node Debugging Info
+@section Controlling Debugging Information Format
+
+@c prevent bad page break with this line
+This describes how to specify debugging information.
+
+@menu
+* All Debuggers::      Macros that affect all debugging formats uniformly.
+* DBX Options::        Macros enabling specific options in DBX format.
+* DBX Hooks::          Hook macros for varying DBX format.
+* File Names and DBX:: Macros controlling output of file names in DBX format.
+* SDB and DWARF::      Macros for SDB (COFF) and DWARF formats.
+* VMS Debug::          Macros for VMS debug format.
+@end menu
+
+@node All Debuggers
+@subsection Macros Affecting All Debugging Formats
+
+@c prevent bad page break with this line
+These macros affect all debugging formats.
+
+@defmac DBX_REGISTER_NUMBER (@var{regno})
+A C expression that returns the DBX register number for the compiler
+register number @var{regno}.  In the default macro provided, the value
+of this expression will be @var{regno} itself.  But sometimes there are
+some registers that the compiler knows about and DBX does not, or vice
+versa.  In such cases, some register may need to have one number in the
+compiler and another for DBX@.
+
+If two registers have consecutive numbers inside GCC, and they can be
+used as a pair to hold a multiword value, then they @emph{must} have
+consecutive numbers after renumbering with @code{DBX_REGISTER_NUMBER}.
+Otherwise, debuggers will be unable to access such a pair, because they
+expect register pairs to be consecutive in their own numbering scheme.
+
+If you find yourself defining @code{DBX_REGISTER_NUMBER} in way that
+does not preserve register pairs, then what you must do instead is
+redefine the actual register numbering scheme.
+@end defmac
+
+@defmac DEBUGGER_AUTO_OFFSET (@var{x})
+A C expression that returns the integer offset value for an automatic
+variable having address @var{x} (an RTL expression).  The default
+computation assumes that @var{x} is based on the frame-pointer and
+gives the offset from the frame-pointer.  This is required for targets
+that produce debugging output for DBX or COFF-style debugging output
+for SDB and allow the frame-pointer to be eliminated when the
+@option{-g} options is used.
+@end defmac
+
+@defmac DEBUGGER_ARG_OFFSET (@var{offset}, @var{x})
+A C expression that returns the integer offset value for an argument
+having address @var{x} (an RTL expression).  The nominal offset is
+@var{offset}.
+@end defmac
+
+@defmac PREFERRED_DEBUGGING_TYPE
+A C expression that returns the type of debugging output GCC should
+produce when the user specifies just @option{-g}.  Define
+this if you have arranged for GCC to support more than one format of
+debugging output.  Currently, the allowable values are @code{DBX_DEBUG},
+@code{SDB_DEBUG}, @code{DWARF_DEBUG}, @code{DWARF2_DEBUG},
+@code{XCOFF_DEBUG}, @code{VMS_DEBUG}, and @code{VMS_AND_DWARF2_DEBUG}.
+
+When the user specifies @option{-ggdb}, GCC normally also uses the
+value of this macro to select the debugging output format, but with two
+exceptions.  If @code{DWARF2_DEBUGGING_INFO} is defined, GCC uses the
+value @code{DWARF2_DEBUG}.  Otherwise, if @code{DBX_DEBUGGING_INFO} is
+defined, GCC uses @code{DBX_DEBUG}.
+
+The value of this macro only affects the default debugging output; the
+user can always get a specific type of output by using @option{-gstabs},
+@option{-gcoff}, @option{-gdwarf-2}, @option{-gxcoff}, or @option{-gvms}.
+@end defmac
+
+@node DBX Options
+@subsection Specific Options for DBX Output
+
+@c prevent bad page break with this line
+These are specific options for DBX output.
+
+@defmac DBX_DEBUGGING_INFO
+Define this macro if GCC should produce debugging output for DBX
+in response to the @option{-g} option.
+@end defmac
+
+@defmac XCOFF_DEBUGGING_INFO
+Define this macro if GCC should produce XCOFF format debugging output
+in response to the @option{-g} option.  This is a variant of DBX format.
+@end defmac
+
+@defmac DEFAULT_GDB_EXTENSIONS
+Define this macro to control whether GCC should by default generate
+GDB's extended version of DBX debugging information (assuming DBX-format
+debugging information is enabled at all).  If you don't define the
+macro, the default is 1: always generate the extended information
+if there is any occasion to.
+@end defmac
+
+@defmac DEBUG_SYMS_TEXT
+Define this macro if all @code{.stabs} commands should be output while
+in the text section.
+@end defmac
+
+@defmac ASM_STABS_OP
+A C string constant, including spacing, naming the assembler pseudo op to
+use instead of @code{"\t.stabs\t"} to define an ordinary debugging symbol.
+If you don't define this macro, @code{"\t.stabs\t"} is used.  This macro
+applies only to DBX debugging information format.
+@end defmac
+
+@defmac ASM_STABD_OP
+A C string constant, including spacing, naming the assembler pseudo op to
+use instead of @code{"\t.stabd\t"} to define a debugging symbol whose
+value is the current location.  If you don't define this macro,
+@code{"\t.stabd\t"} is used.  This macro applies only to DBX debugging
+information format.
+@end defmac
+
+@defmac ASM_STABN_OP
+A C string constant, including spacing, naming the assembler pseudo op to
+use instead of @code{"\t.stabn\t"} to define a debugging symbol with no
+name.  If you don't define this macro, @code{"\t.stabn\t"} is used.  This
+macro applies only to DBX debugging information format.
+@end defmac
+
+@defmac DBX_NO_XREFS
+Define this macro if DBX on your system does not support the construct
+@samp{xs@var{tagname}}.  On some systems, this construct is used to
+describe a forward reference to a structure named @var{tagname}.
+On other systems, this construct is not supported at all.
+@end defmac
+
+@defmac DBX_CONTIN_LENGTH
+A symbol name in DBX-format debugging information is normally
+continued (split into two separate @code{.stabs} directives) when it
+exceeds a certain length (by default, 80 characters).  On some
+operating systems, DBX requires this splitting; on others, splitting
+must not be done.  You can inhibit splitting by defining this macro
+with the value zero.  You can override the default splitting-length by
+defining this macro as an expression for the length you desire.
+@end defmac
+
+@defmac DBX_CONTIN_CHAR
+Normally continuation is indicated by adding a @samp{\} character to
+the end of a @code{.stabs} string when a continuation follows.  To use
+a different character instead, define this macro as a character
+constant for the character you want to use.  Do not define this macro
+if backslash is correct for your system.
+@end defmac
+
+@defmac DBX_STATIC_STAB_DATA_SECTION
+Define this macro if it is necessary to go to the data section before
+outputting the @samp{.stabs} pseudo-op for a non-global static
+variable.
+@end defmac
+
+@defmac DBX_TYPE_DECL_STABS_CODE
+The value to use in the ``code'' field of the @code{.stabs} directive
+for a typedef.  The default is @code{N_LSYM}.
+@end defmac
+
+@defmac DBX_STATIC_CONST_VAR_CODE
+The value to use in the ``code'' field of the @code{.stabs} directive
+for a static variable located in the text section.  DBX format does not
+provide any ``right'' way to do this.  The default is @code{N_FUN}.
+@end defmac
+
+@defmac DBX_REGPARM_STABS_CODE
+The value to use in the ``code'' field of the @code{.stabs} directive
+for a parameter passed in registers.  DBX format does not provide any
+``right'' way to do this.  The default is @code{N_RSYM}.
+@end defmac
+
+@defmac DBX_REGPARM_STABS_LETTER
+The letter to use in DBX symbol data to identify a symbol as a parameter
+passed in registers.  DBX format does not customarily provide any way to
+do this.  The default is @code{'P'}.
+@end defmac
+
+@defmac DBX_FUNCTION_FIRST
+Define this macro if the DBX information for a function and its
+arguments should precede the assembler code for the function.  Normally,
+in DBX format, the debugging information entirely follows the assembler
+code.
+@end defmac
+
+@defmac DBX_BLOCKS_FUNCTION_RELATIVE
+Define this macro, with value 1, if the value of a symbol describing
+the scope of a block (@code{N_LBRAC} or @code{N_RBRAC}) should be
+relative to the start of the enclosing function.  Normally, GCC uses
+an absolute address.
+@end defmac
+
+@defmac DBX_LINES_FUNCTION_RELATIVE
+Define this macro, with value 1, if the value of a symbol indicating
+the current line number (@code{N_SLINE}) should be relative to the
+start of the enclosing function.  Normally, GCC uses an absolute address.
+@end defmac
+
+@defmac DBX_USE_BINCL
+Define this macro if GCC should generate @code{N_BINCL} and
+@code{N_EINCL} stabs for included header files, as on Sun systems.  This
+macro also directs GCC to output a type number as a pair of a file
+number and a type number within the file.  Normally, GCC does not
+generate @code{N_BINCL} or @code{N_EINCL} stabs, and it outputs a single
+number for a type number.
+@end defmac
+
+@node DBX Hooks
+@subsection Open-Ended Hooks for DBX Format
+
+@c prevent bad page break with this line
+These are hooks for DBX format.
+
+@defmac DBX_OUTPUT_LBRAC (@var{stream}, @var{name})
+Define this macro to say how to output to @var{stream} the debugging
+information for the start of a scope level for variable names.  The
+argument @var{name} is the name of an assembler symbol (for use with
+@code{assemble_name}) whose value is the address where the scope begins.
+@end defmac
+
+@defmac DBX_OUTPUT_RBRAC (@var{stream}, @var{name})
+Like @code{DBX_OUTPUT_LBRAC}, but for the end of a scope level.
+@end defmac
+
+@defmac DBX_OUTPUT_NFUN (@var{stream}, @var{lscope_label}, @var{decl})
+Define this macro if the target machine requires special handling to
+output an @code{N_FUN} entry for the function @var{decl}.
+@end defmac
+
+@defmac DBX_OUTPUT_SOURCE_LINE (@var{stream}, @var{line}, @var{counter})
+A C statement to output DBX debugging information before code for line
+number @var{line} of the current source file to the stdio stream
+@var{stream}.  @var{counter} is the number of time the macro was
+invoked, including the current invocation; it is intended to generate
+unique labels in the assembly output.
+
+This macro should not be defined if the default output is correct, or
+if it can be made correct by defining @code{DBX_LINES_FUNCTION_RELATIVE}.
+@end defmac
+
+@defmac NO_DBX_FUNCTION_END
+Some stabs encapsulation formats (in particular ECOFF), cannot handle the
+@code{.stabs "",N_FUN,,0,0,Lscope-function-1} gdb dbx extension construct.
+On those machines, define this macro to turn this feature off without
+disturbing the rest of the gdb extensions.
+@end defmac
+
+@defmac NO_DBX_BNSYM_ENSYM
+Some assemblers cannot handle the @code{.stabd BNSYM/ENSYM,0,0} gdb dbx
+extension construct.  On those machines, define this macro to turn this
+feature off without disturbing the rest of the gdb extensions.
+@end defmac
+
+@node File Names and DBX
+@subsection File Names in DBX Format
+
+@c prevent bad page break with this line
+This describes file names in DBX format.
+
+@defmac DBX_OUTPUT_MAIN_SOURCE_FILENAME (@var{stream}, @var{name})
+A C statement to output DBX debugging information to the stdio stream
+@var{stream}, which indicates that file @var{name} is the main source
+file---the file specified as the input file for compilation.
+This macro is called only once, at the beginning of compilation.
+
+This macro need not be defined if the standard form of output
+for DBX debugging information is appropriate.
+
+It may be necessary to refer to a label equal to the beginning of the
+text section.  You can use @samp{assemble_name (stream, ltext_label_name)}
+to do so.  If you do this, you must also set the variable
+@var{used_ltext_label_name} to @code{true}.
+@end defmac
+
+@defmac NO_DBX_MAIN_SOURCE_DIRECTORY
+Define this macro, with value 1, if GCC should not emit an indication
+of the current directory for compilation and current source language at
+the beginning of the file.
+@end defmac
+
+@defmac NO_DBX_GCC_MARKER
+Define this macro, with value 1, if GCC should not emit an indication
+that this object file was compiled by GCC@.  The default is to emit
+an @code{N_OPT} stab at the beginning of every source file, with
+@samp{gcc2_compiled.} for the string and value 0.
+@end defmac
+
+@defmac DBX_OUTPUT_MAIN_SOURCE_FILE_END (@var{stream}, @var{name})
+A C statement to output DBX debugging information at the end of
+compilation of the main source file @var{name}.  Output should be
+written to the stdio stream @var{stream}.
+
+If you don't define this macro, nothing special is output at the end
+of compilation, which is correct for most machines.
+@end defmac
+
+@defmac DBX_OUTPUT_NULL_N_SO_AT_MAIN_SOURCE_FILE_END
+Define this macro @emph{instead of} defining
+@code{DBX_OUTPUT_MAIN_SOURCE_FILE_END}, if what needs to be output at
+the end of compilation is an @code{N_SO} stab with an empty string,
+whose value is the highest absolute text address in the file.
+@end defmac
+
+@need 2000
+@node SDB and DWARF
+@subsection Macros for SDB and DWARF Output
+
+@c prevent bad page break with this line
+Here are macros for SDB and DWARF output.
+
+@defmac SDB_DEBUGGING_INFO
+Define this macro if GCC should produce COFF-style debugging output
+for SDB in response to the @option{-g} option.
+@end defmac
+
+@defmac DWARF2_DEBUGGING_INFO
+Define this macro if GCC should produce dwarf version 2 format
+debugging output in response to the @option{-g} option.
+
+@deftypefn {Target Hook} int TARGET_DWARF_CALLING_CONVENTION (const_tree @var{function})
+Define this to enable the dwarf attribute @code{DW_AT_calling_convention} to
+be emitted for each function.  Instead of an integer return the enum
+value for the @code{DW_CC_} tag.
+@end deftypefn
+
+To support optional call frame debugging information, you must also
+define @code{INCOMING_RETURN_ADDR_RTX} and either set
+@code{RTX_FRAME_RELATED_P} on the prologue insns if you use RTL for the
+prologue, or call @code{dwarf2out_def_cfa} and @code{dwarf2out_reg_save}
+as appropriate from @code{TARGET_ASM_FUNCTION_PROLOGUE} if you don't.
+@end defmac
+
+@defmac DWARF2_FRAME_INFO
+Define this macro to a nonzero value if GCC should always output
+Dwarf 2 frame information.  If @code{TARGET_EXCEPT_UNWIND_INFO}
+(@pxref{Exception Region Output}) returns @code{UI_DWARF2}, and
+exceptions are enabled, GCC will output this information not matter
+how you define @code{DWARF2_FRAME_INFO}.
+@end defmac
+
+@deftypefn {Target Hook} {enum unwind_info_type} TARGET_DEBUG_UNWIND_INFO (void)
+This hook defines the mechanism that will be used for describing frame
+unwind information to the debugger.  Normally the hook will return
+@code{UI_DWARF2} if DWARF 2 debug information is enabled, and
+return @code{UI_NONE} otherwise.
+
+A target may return @code{UI_DWARF2} even when DWARF 2 debug information
+is disabled in order to always output DWARF 2 frame information.
+
+A target may return @code{UI_TARGET} if it has ABI specified unwind tables.
+This will suppress generation of the normal debug frame unwind information.
+@end deftypefn
+
+@defmac DWARF2_ASM_LINE_DEBUG_INFO
+Define this macro to be a nonzero value if the assembler can generate Dwarf 2
+line debug info sections.  This will result in much more compact line number
+tables, and hence is desirable if it works.
+@end defmac
+
+@deftypevr {Target Hook} bool TARGET_WANT_DEBUG_PUB_SECTIONS
+True if the @code{.debug_pubtypes} and @code{.debug_pubnames} sections should be emitted.  These sections are not used on most platforms, and in particular GDB does not use them.
+@end deftypevr
+
+@deftypevr {Target Hook} bool TARGET_DELAY_SCHED2
+True if sched2 is not to be run at its normal place.  This usually means it will be run as part of machine-specific reorg.
+@end deftypevr
+
+@deftypevr {Target Hook} bool TARGET_DELAY_VARTRACK
+True if vartrack is not to be run at its normal place.  This usually means it will be run as part of machine-specific reorg.
+@end deftypevr
+
+@defmac ASM_OUTPUT_DWARF_DELTA (@var{stream}, @var{size}, @var{label1}, @var{label2})
+A C statement to issue assembly directives that create a difference
+@var{lab1} minus @var{lab2}, using an integer of the given @var{size}.
+@end defmac
+
+@defmac ASM_OUTPUT_DWARF_VMS_DELTA (@var{stream}, @var{size}, @var{label1}, @var{label2})
+A C statement to issue assembly directives that create a difference
+between the two given labels in system defined units, e.g. instruction
+slots on IA64 VMS, using an integer of the given size.
+@end defmac
+
+@defmac ASM_OUTPUT_DWARF_OFFSET (@var{stream}, @var{size}, @var{label}, @var{section})
+A C statement to issue assembly directives that create a
+section-relative reference to the given @var{label}, using an integer of the
+given @var{size}.  The label is known to be defined in the given @var{section}.
+@end defmac
+
+@defmac ASM_OUTPUT_DWARF_PCREL (@var{stream}, @var{size}, @var{label})
+A C statement to issue assembly directives that create a self-relative
+reference to the given @var{label}, using an integer of the given @var{size}.
+@end defmac
+
+@defmac ASM_OUTPUT_DWARF_TABLE_REF (@var{label})
+A C statement to issue assembly directives that create a reference to
+the DWARF table identifier @var{label} from the current section.  This
+is used on some systems to avoid garbage collecting a DWARF table which
+is referenced by a function.
+@end defmac
+
+@deftypefn {Target Hook} void TARGET_ASM_OUTPUT_DWARF_DTPREL (FILE *@var{file}, int @var{size}, rtx @var{x})
+If defined, this target hook is a function which outputs a DTP-relative
+reference to the given TLS symbol of the specified size.
+@end deftypefn
+
+@defmac PUT_SDB_@dots{}
+Define these macros to override the assembler syntax for the special
+SDB assembler directives.  See @file{sdbout.c} for a list of these
+macros and their arguments.  If the standard syntax is used, you need
+not define them yourself.
+@end defmac
+
+@defmac SDB_DELIM
+Some assemblers do not support a semicolon as a delimiter, even between
+SDB assembler directives.  In that case, define this macro to be the
+delimiter to use (usually @samp{\n}).  It is not necessary to define
+a new set of @code{PUT_SDB_@var{op}} macros if this is the only change
+required.
+@end defmac
+
+@defmac SDB_ALLOW_UNKNOWN_REFERENCES
+Define this macro to allow references to unknown structure,
+union, or enumeration tags to be emitted.  Standard COFF does not
+allow handling of unknown references, MIPS ECOFF has support for
+it.
+@end defmac
+
+@defmac SDB_ALLOW_FORWARD_REFERENCES
+Define this macro to allow references to structure, union, or
+enumeration tags that have not yet been seen to be handled.  Some
+assemblers choke if forward tags are used, while some require it.
+@end defmac
+
+@defmac SDB_OUTPUT_SOURCE_LINE (@var{stream}, @var{line})
+A C statement to output SDB debugging information before code for line
+number @var{line} of the current source file to the stdio stream
+@var{stream}.  The default is to emit an @code{.ln} directive.
+@end defmac
+
+@need 2000
+@node VMS Debug
+@subsection Macros for VMS Debug Format
+
+@c prevent bad page break with this line
+Here are macros for VMS debug format.
+
+@defmac VMS_DEBUGGING_INFO
+Define this macro if GCC should produce debugging output for VMS
+in response to the @option{-g} option.  The default behavior for VMS
+is to generate minimal debug info for a traceback in the absence of
+@option{-g} unless explicitly overridden with @option{-g0}.  This
+behavior is controlled by @code{TARGET_OPTION_OPTIMIZATION} and
+@code{TARGET_OPTION_OVERRIDE}.
+@end defmac
+
+@node Floating Point
+@section Cross Compilation and Floating Point
+@cindex cross compilation and floating point
+@cindex floating point and cross compilation
+
+While all modern machines use twos-complement representation for integers,
+there are a variety of representations for floating point numbers.  This
+means that in a cross-compiler the representation of floating point numbers
+in the compiled program may be different from that used in the machine
+doing the compilation.
+
+Because different representation systems may offer different amounts of
+range and precision, all floating point constants must be represented in
+the target machine's format.  Therefore, the cross compiler cannot
+safely use the host machine's floating point arithmetic; it must emulate
+the target's arithmetic.  To ensure consistency, GCC always uses
+emulation to work with floating point values, even when the host and
+target floating point formats are identical.
+
+The following macros are provided by @file{real.h} for the compiler to
+use.  All parts of the compiler which generate or optimize
+floating-point calculations must use these macros.  They may evaluate
+their operands more than once, so operands must not have side effects.
+
+@defmac REAL_VALUE_TYPE
+The C data type to be used to hold a floating point value in the target
+machine's format.  Typically this is a @code{struct} containing an
+array of @code{HOST_WIDE_INT}, but all code should treat it as an opaque
+quantity.
+@end defmac
+
+@deftypefn Macro int REAL_VALUES_EQUAL (REAL_VALUE_TYPE @var{x}, REAL_VALUE_TYPE @var{y})
+Compares for equality the two values, @var{x} and @var{y}.  If the target
+floating point format supports negative zeroes and/or NaNs,
+@samp{REAL_VALUES_EQUAL (-0.0, 0.0)} is true, and
+@samp{REAL_VALUES_EQUAL (NaN, NaN)} is false.
+@end deftypefn
+
+@deftypefn Macro int REAL_VALUES_LESS (REAL_VALUE_TYPE @var{x}, REAL_VALUE_TYPE @var{y})
+Tests whether @var{x} is less than @var{y}.
+@end deftypefn
+
+@deftypefn Macro HOST_WIDE_INT REAL_VALUE_FIX (REAL_VALUE_TYPE @var{x})
+Truncates @var{x} to a signed integer, rounding toward zero.
+@end deftypefn
+
+@deftypefn Macro {unsigned HOST_WIDE_INT} REAL_VALUE_UNSIGNED_FIX (REAL_VALUE_TYPE @var{x})
+Truncates @var{x} to an unsigned integer, rounding toward zero.  If
+@var{x} is negative, returns zero.
+@end deftypefn
+
+@deftypefn Macro REAL_VALUE_TYPE REAL_VALUE_ATOF (const char *@var{string}, enum machine_mode @var{mode})
+Converts @var{string} into a floating point number in the target machine's
+representation for mode @var{mode}.  This routine can handle both
+decimal and hexadecimal floating point constants, using the syntax
+defined by the C language for both.
+@end deftypefn
+
+@deftypefn Macro int REAL_VALUE_NEGATIVE (REAL_VALUE_TYPE @var{x})
+Returns 1 if @var{x} is negative (including negative zero), 0 otherwise.
+@end deftypefn
+
+@deftypefn Macro int REAL_VALUE_ISINF (REAL_VALUE_TYPE @var{x})
+Determines whether @var{x} represents infinity (positive or negative).
+@end deftypefn
+
+@deftypefn Macro int REAL_VALUE_ISNAN (REAL_VALUE_TYPE @var{x})
+Determines whether @var{x} represents a ``NaN'' (not-a-number).
+@end deftypefn
+
+@deftypefn Macro void REAL_ARITHMETIC (REAL_VALUE_TYPE @var{output}, enum tree_code @var{code}, REAL_VALUE_TYPE @var{x}, REAL_VALUE_TYPE @var{y})
+Calculates an arithmetic operation on the two floating point values
+@var{x} and @var{y}, storing the result in @var{output} (which must be a
+variable).
+
+The operation to be performed is specified by @var{code}.  Only the
+following codes are supported: @code{PLUS_EXPR}, @code{MINUS_EXPR},
+@code{MULT_EXPR}, @code{RDIV_EXPR}, @code{MAX_EXPR}, @code{MIN_EXPR}.
+
+If @code{REAL_ARITHMETIC} is asked to evaluate division by zero and the
+target's floating point format cannot represent infinity, it will call
+@code{abort}.  Callers should check for this situation first, using
+@code{MODE_HAS_INFINITIES}.  @xref{Storage Layout}.
+@end deftypefn
+
+@deftypefn Macro REAL_VALUE_TYPE REAL_VALUE_NEGATE (REAL_VALUE_TYPE @var{x})
+Returns the negative of the floating point value @var{x}.
+@end deftypefn
+
+@deftypefn Macro REAL_VALUE_TYPE REAL_VALUE_ABS (REAL_VALUE_TYPE @var{x})
+Returns the absolute value of @var{x}.
+@end deftypefn
+
+@deftypefn Macro REAL_VALUE_TYPE REAL_VALUE_TRUNCATE (REAL_VALUE_TYPE @var{mode}, enum machine_mode @var{x})
+Truncates the floating point value @var{x} to fit in @var{mode}.  The
+return value is still a full-size @code{REAL_VALUE_TYPE}, but it has an
+appropriate bit pattern to be output as a floating constant whose
+precision accords with mode @var{mode}.
+@end deftypefn
+
+@deftypefn Macro void REAL_VALUE_TO_INT (HOST_WIDE_INT @var{low}, HOST_WIDE_INT @var{high}, REAL_VALUE_TYPE @var{x})
+Converts a floating point value @var{x} into a double-precision integer
+which is then stored into @var{low} and @var{high}.  If the value is not
+integral, it is truncated.
+@end deftypefn
+
+@deftypefn Macro void REAL_VALUE_FROM_INT (REAL_VALUE_TYPE @var{x}, HOST_WIDE_INT @var{low}, HOST_WIDE_INT @var{high}, enum machine_mode @var{mode})
+Converts a double-precision integer found in @var{low} and @var{high},
+into a floating point value which is then stored into @var{x}.  The
+value is truncated to fit in mode @var{mode}.
+@end deftypefn
+
+@node Mode Switching
+@section Mode Switching Instructions
+@cindex mode switching
+The following macros control mode switching optimizations:
+
+@defmac OPTIMIZE_MODE_SWITCHING (@var{entity})
+Define this macro if the port needs extra instructions inserted for mode
+switching in an optimizing compilation.
+
+For an example, the SH4 can perform both single and double precision
+floating point operations, but to perform a single precision operation,
+the FPSCR PR bit has to be cleared, while for a double precision
+operation, this bit has to be set.  Changing the PR bit requires a general
+purpose register as a scratch register, hence these FPSCR sets have to
+be inserted before reload, i.e.@: you can't put this into instruction emitting
+or @code{TARGET_MACHINE_DEPENDENT_REORG}.
+
+You can have multiple entities that are mode-switched, and select at run time
+which entities actually need it.  @code{OPTIMIZE_MODE_SWITCHING} should
+return nonzero for any @var{entity} that needs mode-switching.
+If you define this macro, you also have to define
+@code{NUM_MODES_FOR_MODE_SWITCHING}, @code{MODE_NEEDED},
+@code{MODE_PRIORITY_TO_MODE} and @code{EMIT_MODE_SET}.
+@code{MODE_AFTER}, @code{MODE_ENTRY}, and @code{MODE_EXIT}
+are optional.
+@end defmac
+
+@defmac NUM_MODES_FOR_MODE_SWITCHING
+If you define @code{OPTIMIZE_MODE_SWITCHING}, you have to define this as
+initializer for an array of integers.  Each initializer element
+N refers to an entity that needs mode switching, and specifies the number
+of different modes that might need to be set for this entity.
+The position of the initializer in the initializer---starting counting at
+zero---determines the integer that is used to refer to the mode-switched
+entity in question.
+In macros that take mode arguments / yield a mode result, modes are
+represented as numbers 0 @dots{} N @minus{} 1.  N is used to specify that no mode
+switch is needed / supplied.
+@end defmac
+
+@defmac MODE_NEEDED (@var{entity}, @var{insn})
+@var{entity} is an integer specifying a mode-switched entity.  If
+@code{OPTIMIZE_MODE_SWITCHING} is defined, you must define this macro to
+return an integer value not larger than the corresponding element in
+@code{NUM_MODES_FOR_MODE_SWITCHING}, to denote the mode that @var{entity} must
+be switched into prior to the execution of @var{insn}.
+@end defmac
+
+@defmac MODE_AFTER (@var{mode}, @var{insn})
+If this macro is defined, it is evaluated for every @var{insn} during
+mode switching.  It determines the mode that an insn results in (if
+different from the incoming mode).
+@end defmac
+
+@defmac MODE_ENTRY (@var{entity})
+If this macro is defined, it is evaluated for every @var{entity} that needs
+mode switching.  It should evaluate to an integer, which is a mode that
+@var{entity} is assumed to be switched to at function entry.  If @code{MODE_ENTRY}
+is defined then @code{MODE_EXIT} must be defined.
+@end defmac
+
+@defmac MODE_EXIT (@var{entity})
+If this macro is defined, it is evaluated for every @var{entity} that needs
+mode switching.  It should evaluate to an integer, which is a mode that
+@var{entity} is assumed to be switched to at function exit.  If @code{MODE_EXIT}
+is defined then @code{MODE_ENTRY} must be defined.
+@end defmac
+
+@defmac MODE_PRIORITY_TO_MODE (@var{entity}, @var{n})
+This macro specifies the order in which modes for @var{entity} are processed.
+0 is the highest priority, @code{NUM_MODES_FOR_MODE_SWITCHING[@var{entity}] - 1} the
+lowest.  The value of the macro should be an integer designating a mode
+for @var{entity}.  For any fixed @var{entity}, @code{mode_priority_to_mode}
+(@var{entity}, @var{n}) shall be a bijection in 0 @dots{}
+@code{num_modes_for_mode_switching[@var{entity}] - 1}.
+@end defmac
+
+@defmac EMIT_MODE_SET (@var{entity}, @var{mode}, @var{hard_regs_live})
+Generate one or more insns to set @var{entity} to @var{mode}.
+@var{hard_reg_live} is the set of hard registers live at the point where
+the insn(s) are to be inserted.
+@end defmac
+
+@node Target Attributes
+@section Defining target-specific uses of @code{__attribute__}
+@cindex target attributes
+@cindex machine attributes
+@cindex attributes, target-specific
+
+Target-specific attributes may be defined for functions, data and types.
+These are described using the following target hooks; they also need to
+be documented in @file{extend.texi}.
+
+@deftypevr {Target Hook} {const struct attribute_spec *} TARGET_ATTRIBUTE_TABLE
+If defined, this target hook points to an array of @samp{struct
+attribute_spec} (defined in @file{tree.h}) specifying the machine
+specific attributes for this target and some of the restrictions on the
+entities to which these attributes are applied and the arguments they
+take.
+@end deftypevr
+
+@deftypefn {Target Hook} bool TARGET_ATTRIBUTE_TAKES_IDENTIFIER_P (const_tree @var{name})
+If defined, this target hook is a function which returns true if the
+machine-specific attribute named @var{name} expects an identifier
+given as its first argument to be passed on as a plain identifier, not
+subjected to name lookup.  If this is not defined, the default is
+false for all machine-specific attributes.
+@end deftypefn
+
+@deftypefn {Target Hook} int TARGET_COMP_TYPE_ATTRIBUTES (const_tree @var{type1}, const_tree @var{type2})
+If defined, this target hook is a function which returns zero if the attributes on
+@var{type1} and @var{type2} are incompatible, one if they are compatible,
+and two if they are nearly compatible (which causes a warning to be
+generated).  If this is not defined, machine-specific attributes are
+supposed always to be compatible.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SET_DEFAULT_TYPE_ATTRIBUTES (tree @var{type})
+If defined, this target hook is a function which assigns default attributes to
+the newly defined @var{type}.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_MERGE_TYPE_ATTRIBUTES (tree @var{type1}, tree @var{type2})
+Define this target hook if the merging of type attributes needs special
+handling.  If defined, the result is a list of the combined
+@code{TYPE_ATTRIBUTES} of @var{type1} and @var{type2}.  It is assumed
+that @code{comptypes} has already been called and returned 1.  This
+function may call @code{merge_attributes} to handle machine-independent
+merging.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_MERGE_DECL_ATTRIBUTES (tree @var{olddecl}, tree @var{newdecl})
+Define this target hook if the merging of decl attributes needs special
+handling.  If defined, the result is a list of the combined
+@code{DECL_ATTRIBUTES} of @var{olddecl} and @var{newdecl}.
+@var{newdecl} is a duplicate declaration of @var{olddecl}.  Examples of
+when this is needed are when one attribute overrides another, or when an
+attribute is nullified by a subsequent definition.  This function may
+call @code{merge_attributes} to handle machine-independent merging.
+
+@findex TARGET_DLLIMPORT_DECL_ATTRIBUTES
+If the only target-specific handling you require is @samp{dllimport}
+for Microsoft Windows targets, you should define the macro
+@code{TARGET_DLLIMPORT_DECL_ATTRIBUTES} to @code{1}.  The compiler
+will then define a function called
+@code{merge_dllimport_decl_attributes} which can then be defined as
+the expansion of @code{TARGET_MERGE_DECL_ATTRIBUTES}.  You can also
+add @code{handle_dll_attribute} in the attribute table for your port
+to perform initial processing of the @samp{dllimport} and
+@samp{dllexport} attributes.  This is done in @file{i386/cygwin.h} and
+@file{i386/i386.c}, for example.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_VALID_DLLIMPORT_ATTRIBUTE_P (const_tree @var{decl})
+@var{decl} is a variable or function with @code{__attribute__((dllimport))} specified.  Use this hook if the target needs to add extra validation checks to @code{handle_dll_attribute}.
+@end deftypefn
+
+@defmac TARGET_DECLSPEC
+Define this macro to a nonzero value if you want to treat
+@code{__declspec(X)} as equivalent to @code{__attribute((X))}.  By
+default, this behavior is enabled only for targets that define
+@code{TARGET_DLLIMPORT_DECL_ATTRIBUTES}.  The current implementation
+of @code{__declspec} is via a built-in macro, but you should not rely
+on this implementation detail.
+@end defmac
+
+@deftypefn {Target Hook} void TARGET_INSERT_ATTRIBUTES (tree @var{node}, tree *@var{attr_ptr})
+Define this target hook if you want to be able to add attributes to a decl
+when it is being created.  This is normally useful for back ends which
+wish to implement a pragma by using the attributes which correspond to
+the pragma's effect.  The @var{node} argument is the decl which is being
+created.  The @var{attr_ptr} argument is a pointer to the attribute list
+for this decl.  The list itself should not be modified, since it may be
+shared with other decls, but attributes may be chained on the head of
+the list and @code{*@var{attr_ptr}} modified to point to the new
+attributes, or a copy of the list may be made if further changes are
+needed.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P (const_tree @var{fndecl})
+@cindex inlining
+This target hook returns @code{true} if it is ok to inline @var{fndecl}
+into the current function, despite its having target-specific
+attributes, @code{false} otherwise.  By default, if a function has a
+target specific attribute attached to it, it will not be inlined.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_OPTION_VALID_ATTRIBUTE_P (tree @var{fndecl}, tree @var{name}, tree @var{args}, int @var{flags})
+This hook is called to parse the @code{attribute(option("..."))}, and
+it allows the function to set different target machine compile time
+options for the current function that might be different than the
+options specified on the command line.  The hook should return
+@code{true} if the options are valid.
+
+The hook should set the @var{DECL_FUNCTION_SPECIFIC_TARGET} field in
+the function declaration to hold a pointer to a target specific
+@var{struct cl_target_option} structure.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_OPTION_SAVE (struct cl_target_option *@var{ptr})
+This hook is called to save any additional target specific information
+in the @var{struct cl_target_option} structure for function specific
+options.
+@xref{Option file format}.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_OPTION_RESTORE (struct cl_target_option *@var{ptr})
+This hook is called to restore any additional target specific
+information in the @var{struct cl_target_option} structure for
+function specific options.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_OPTION_PRINT (FILE *@var{file}, int @var{indent}, struct cl_target_option *@var{ptr})
+This hook is called to print any additional target specific
+information in the @var{struct cl_target_option} structure for
+function specific options.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_OPTION_PRAGMA_PARSE (tree @var{args}, tree @var{pop_target})
+This target hook parses the options for @code{#pragma GCC option} to
+set the machine specific options for functions that occur later in the
+input stream.  The options should be the same as handled by the
+@code{TARGET_OPTION_VALID_ATTRIBUTE_P} hook.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_OPTION_OVERRIDE (void)
+Sometimes certain combinations of command options do not make sense on
+a particular target machine.  You can override the hook
+@code{TARGET_OPTION_OVERRIDE} to take account of this.  This hooks is called
+once just after all the command options have been parsed.
+
+Don't use this hook to turn on various extra optimizations for
+@option{-O}.  That is what @code{TARGET_OPTION_OPTIMIZATION} is for.
+
+If you need to do something whenever the optimization level is
+changed via the optimize attribute or pragma, see
+@code{TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE}
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_CAN_INLINE_P (tree @var{caller}, tree @var{callee})
+This target hook returns @code{false} if the @var{caller} function
+cannot inline @var{callee}, based on target specific information.  By
+default, inlining is not allowed if the callee function has function
+specific target options and the caller does not use the same options.
+@end deftypefn
+
+@node Emulated TLS
+@section Emulating TLS
+@cindex Emulated TLS
+
+For targets whose psABI does not provide Thread Local Storage via
+specific relocations and instruction sequences, an emulation layer is
+used.  A set of target hooks allows this emulation layer to be
+configured for the requirements of a particular target.  For instance
+the psABI may in fact specify TLS support in terms of an emulation
+layer.
+
+The emulation layer works by creating a control object for every TLS
+object.  To access the TLS object, a lookup function is provided
+which, when given the address of the control object, will return the
+address of the current thread's instance of the TLS object.
+
+@deftypevr {Target Hook} {const char *} TARGET_EMUTLS_GET_ADDRESS
+Contains the name of the helper function that uses a TLS control
+object to locate a TLS instance.  The default causes libgcc's
+emulated TLS helper function to be used.
+@end deftypevr
+
+@deftypevr {Target Hook} {const char *} TARGET_EMUTLS_REGISTER_COMMON
+Contains the name of the helper function that should be used at
+program startup to register TLS objects that are implicitly
+initialized to zero.  If this is @code{NULL}, all TLS objects will
+have explicit initializers.  The default causes libgcc's emulated TLS
+registration function to be used.
+@end deftypevr
+
+@deftypevr {Target Hook} {const char *} TARGET_EMUTLS_VAR_SECTION
+Contains the name of the section in which TLS control variables should
+be placed.  The default of @code{NULL} allows these to be placed in
+any section.
+@end deftypevr
+
+@deftypevr {Target Hook} {const char *} TARGET_EMUTLS_TMPL_SECTION
+Contains the name of the section in which TLS initializers should be
+placed.  The default of @code{NULL} allows these to be placed in any
+section.
+@end deftypevr
+
+@deftypevr {Target Hook} {const char *} TARGET_EMUTLS_VAR_PREFIX
+Contains the prefix to be prepended to TLS control variable names.
+The default of @code{NULL} uses a target-specific prefix.
+@end deftypevr
+
+@deftypevr {Target Hook} {const char *} TARGET_EMUTLS_TMPL_PREFIX
+Contains the prefix to be prepended to TLS initializer objects.  The
+default of @code{NULL} uses a target-specific prefix.
+@end deftypevr
+
+@deftypefn {Target Hook} tree TARGET_EMUTLS_VAR_FIELDS (tree @var{type}, tree *@var{name})
+Specifies a function that generates the FIELD_DECLs for a TLS control
+object type.  @var{type} is the RECORD_TYPE the fields are for and
+@var{name} should be filled with the structure tag, if the default of
+@code{__emutls_object} is unsuitable.  The default creates a type suitable
+for libgcc's emulated TLS function.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_EMUTLS_VAR_INIT (tree @var{var}, tree @var{decl}, tree @var{tmpl_addr})
+Specifies a function that generates the CONSTRUCTOR to initialize a
+TLS control object.  @var{var} is the TLS control object, @var{decl}
+is the TLS object and @var{tmpl_addr} is the address of the
+initializer.  The default initializes libgcc's emulated TLS control object.
+@end deftypefn
+
+@deftypevr {Target Hook} bool TARGET_EMUTLS_VAR_ALIGN_FIXED
+Specifies whether the alignment of TLS control variable objects is
+fixed and should not be increased as some backends may do to optimize
+single objects.  The default is false.
+@end deftypevr
+
+@deftypevr {Target Hook} bool TARGET_EMUTLS_DEBUG_FORM_TLS_ADDRESS
+Specifies whether a DWARF @code{DW_OP_form_tls_address} location descriptor
+may be used to describe emulated TLS control objects.
+@end deftypevr
+
+@node MIPS Coprocessors
+@section Defining coprocessor specifics for MIPS targets.
+@cindex MIPS coprocessor-definition macros
+
+The MIPS specification allows MIPS implementations to have as many as 4
+coprocessors, each with as many as 32 private registers.  GCC supports
+accessing these registers and transferring values between the registers
+and memory using asm-ized variables.  For example:
+
+@smallexample
+  register unsigned int cp0count asm ("c0r1");
+  unsigned int d;
+
+  d = cp0count + 3;
+@end smallexample
+
+(``c0r1'' is the default name of register 1 in coprocessor 0; alternate
+names may be added as described below, or the default names may be
+overridden entirely in @code{SUBTARGET_CONDITIONAL_REGISTER_USAGE}.)
+
+Coprocessor registers are assumed to be epilogue-used; sets to them will
+be preserved even if it does not appear that the register is used again
+later in the function.
+
+Another note: according to the MIPS spec, coprocessor 1 (if present) is
+the FPU@.  One accesses COP1 registers through standard mips
+floating-point support; they are not included in this mechanism.
+
+There is one macro used in defining the MIPS coprocessor interface which
+you may want to override in subtargets; it is described below.
+
+@defmac ALL_COP_ADDITIONAL_REGISTER_NAMES
+A comma-separated list (with leading comma) of pairs describing the
+alternate names of coprocessor registers.  The format of each entry should be
+@smallexample
+@{ @var{alternatename}, @var{register_number}@}
+@end smallexample
+Default: empty.
+@end defmac
+
+@node PCH Target
+@section Parameters for Precompiled Header Validity Checking
+@cindex parameters, precompiled headers
+
+@deftypefn {Target Hook} {void *} TARGET_GET_PCH_VALIDITY (size_t *@var{sz})
+This hook returns a pointer to the data needed by
+@code{TARGET_PCH_VALID_P} and sets
+@samp{*@var{sz}} to the size of the data in bytes.
+@end deftypefn
+
+@deftypefn {Target Hook} {const char *} TARGET_PCH_VALID_P (const void *@var{data}, size_t @var{sz})
+This hook checks whether the options used to create a PCH file are
+compatible with the current settings.  It returns @code{NULL}
+if so and a suitable error message if not.  Error messages will
+be presented to the user and must be localized using @samp{_(@var{msg})}.
+
+@var{data} is the data that was returned by @code{TARGET_GET_PCH_VALIDITY}
+when the PCH file was created and @var{sz} is the size of that data in bytes.
+It's safe to assume that the data was created by the same version of the
+compiler, so no format checking is needed.
+
+The default definition of @code{default_pch_valid_p} should be
+suitable for most targets.
+@end deftypefn
+
+@deftypefn {Target Hook} {const char *} TARGET_CHECK_PCH_TARGET_FLAGS (int @var{pch_flags})
+If this hook is nonnull, the default implementation of
+@code{TARGET_PCH_VALID_P} will use it to check for compatible values
+of @code{target_flags}.  @var{pch_flags} specifies the value that
+@code{target_flags} had when the PCH file was created.  The return
+value is the same as for @code{TARGET_PCH_VALID_P}.
+@end deftypefn
+
+@node C++ ABI
+@section C++ ABI parameters
+@cindex parameters, c++ abi
+
+@deftypefn {Target Hook} tree TARGET_CXX_GUARD_TYPE (void)
+Define this hook to override the integer type used for guard variables.
+These are used to implement one-time construction of static objects.  The
+default is long_long_integer_type_node.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_CXX_GUARD_MASK_BIT (void)
+This hook determines how guard variables are used.  It should return
+@code{false} (the default) if the first byte should be used.  A return value of
+@code{true} indicates that only the least significant bit should be used.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_CXX_GET_COOKIE_SIZE (tree @var{type})
+This hook returns the size of the cookie to use when allocating an array
+whose elements have the indicated @var{type}.  Assumes that it is already
+known that a cookie is needed.  The default is
+@code{max(sizeof (size_t), alignof(type))}, as defined in section 2.7 of the
+IA64/Generic C++ ABI@.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_CXX_COOKIE_HAS_SIZE (void)
+This hook should return @code{true} if the element size should be stored in
+array cookies.  The default is to return @code{false}.
+@end deftypefn
+
+@deftypefn {Target Hook} int TARGET_CXX_IMPORT_EXPORT_CLASS (tree @var{type}, int @var{import_export})
+If defined by a backend this hook allows the decision made to export
+class @var{type} to be overruled.  Upon entry @var{import_export}
+will contain 1 if the class is going to be exported, @minus{}1 if it is going
+to be imported and 0 otherwise.  This function should return the
+modified value and perform any other actions necessary to support the
+backend's targeted operating system.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_CXX_CDTOR_RETURNS_THIS (void)
+This hook should return @code{true} if constructors and destructors return
+the address of the object created/destroyed.  The default is to return
+@code{false}.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_CXX_KEY_METHOD_MAY_BE_INLINE (void)
+This hook returns true if the key method for a class (i.e., the method
+which, if defined in the current translation unit, causes the virtual
+table to be emitted) may be an inline function.  Under the standard
+Itanium C++ ABI the key method may be an inline function so long as
+the function is not declared inline in the class definition.  Under
+some variants of the ABI, an inline function can never be the key
+method.  The default is to return @code{true}.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_CXX_DETERMINE_CLASS_DATA_VISIBILITY (tree @var{decl})
+@var{decl} is a virtual table, virtual table table, typeinfo object, or other similar implicit class data object that will be emitted with external linkage in this translation unit.  No ELF visibility has been explicitly specified.  If the target needs to specify a visibility other than that of the containing class, use this hook to set @code{DECL_VISIBILITY} and @code{DECL_VISIBILITY_SPECIFIED}.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_CXX_CLASS_DATA_ALWAYS_COMDAT (void)
+This hook returns true (the default) if virtual tables and other
+similar implicit class data objects are always COMDAT if they have
+external linkage.  If this hook returns false, then class data for
+classes whose virtual table will be emitted in only one translation
+unit will not be COMDAT.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_CXX_LIBRARY_RTTI_COMDAT (void)
+This hook returns true (the default) if the RTTI information for
+the basic types which is defined in the C++ runtime should always
+be COMDAT, false if it should not be COMDAT.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_CXX_USE_AEABI_ATEXIT (void)
+This hook returns true if @code{__aeabi_atexit} (as defined by the ARM EABI)
+should be used to register static destructors when @option{-fuse-cxa-atexit}
+is in effect.  The default is to return false to use @code{__cxa_atexit}.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_CXX_USE_ATEXIT_FOR_CXA_ATEXIT (void)
+This hook returns true if the target @code{atexit} function can be used
+in the same manner as @code{__cxa_atexit} to register C++ static
+destructors. This requires that @code{atexit}-registered functions in
+shared libraries are run in the correct order when the libraries are
+unloaded. The default is to return false.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_CXX_ADJUST_CLASS_AT_DEFINITION (tree @var{type})
+@var{type} is a C++ class (i.e., RECORD_TYPE or UNION_TYPE) that has just been defined.  Use this hook to make adjustments to the class (eg, tweak visibility or perform any other required target modifications).
+@end deftypefn
+
+@node Named Address Spaces
+@section Adding support for named address spaces
+@cindex named address spaces
+
+The draft technical report of the ISO/IEC JTC1 S22 WG14 N1275
+standards committee, @cite{Programming Languages - C - Extensions to
+support embedded processors}, specifies a syntax for embedded
+processors to specify alternate address spaces.  You can configure a
+GCC port to support section 5.1 of the draft report to add support for
+address spaces other than the default address space.  These address
+spaces are new keywords that are similar to the @code{volatile} and
+@code{const} type attributes.
+
+Pointers to named address spaces can have a different size than
+pointers to the generic address space.
+
+For example, the SPU port uses the @code{__ea} address space to refer
+to memory in the host processor, rather than memory local to the SPU
+processor.  Access to memory in the @code{__ea} address space involves
+issuing DMA operations to move data between the host processor and the
+local processor memory address space.  Pointers in the @code{__ea}
+address space are either 32 bits or 64 bits based on the
+@option{-mea32} or @option{-mea64} switches (native SPU pointers are
+always 32 bits).
+
+Internally, address spaces are represented as a small integer in the
+range 0 to 15 with address space 0 being reserved for the generic
+address space.
+
+To register a named address space qualifier keyword with the C front end,
+the target may call the @code{c_register_addr_space} routine.  For example,
+the SPU port uses the following to declare @code{__ea} as the keyword for
+named address space #1:
+@smallexample
+#define ADDR_SPACE_EA 1
+c_register_addr_space ("__ea", ADDR_SPACE_EA);
+@end smallexample
+
+@deftypefn {Target Hook} {enum machine_mode} TARGET_ADDR_SPACE_POINTER_MODE (addr_space_t @var{address_space})
+Define this to return the machine mode to use for pointers to
+@var{address_space} if the target supports named address spaces.
+The default version of this hook returns @code{ptr_mode} for the
+generic address space only.
+@end deftypefn
+
+@deftypefn {Target Hook} {enum machine_mode} TARGET_ADDR_SPACE_ADDRESS_MODE (addr_space_t @var{address_space})
+Define this to return the machine mode to use for addresses in
+@var{address_space} if the target supports named address spaces.
+The default version of this hook returns @code{Pmode} for the
+generic address space only.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_ADDR_SPACE_VALID_POINTER_MODE (enum machine_mode @var{mode}, addr_space_t @var{as})
+Define this to return nonzero if the port can handle pointers
+with machine mode @var{mode} to address space @var{as}.  This target
+hook is the same as the @code{TARGET_VALID_POINTER_MODE} target hook,
+except that it includes explicit named address space support.  The default
+version of this hook returns true for the modes returned by either the
+@code{TARGET_ADDR_SPACE_POINTER_MODE} or @code{TARGET_ADDR_SPACE_ADDRESS_MODE}
+target hooks for the given address space.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P (enum machine_mode @var{mode}, rtx @var{exp}, bool @var{strict}, addr_space_t @var{as})
+Define this to return true if @var{exp} is a valid address for mode
+@var{mode} in the named address space @var{as}.  The @var{strict}
+parameter says whether strict addressing is in effect after reload has
+finished.  This target hook is the same as the
+@code{TARGET_LEGITIMATE_ADDRESS_P} target hook, except that it includes
+explicit named address space support.
+@end deftypefn
+
+@deftypefn {Target Hook} rtx TARGET_ADDR_SPACE_LEGITIMIZE_ADDRESS (rtx @var{x}, rtx @var{oldx}, enum machine_mode @var{mode}, addr_space_t @var{as})
+Define this to modify an invalid address @var{x} to be a valid address
+with mode @var{mode} in the named address space @var{as}.  This target
+hook is the same as the @code{TARGET_LEGITIMIZE_ADDRESS} target hook,
+except that it includes explicit named address space support.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_ADDR_SPACE_SUBSET_P (addr_space_t @var{superset}, addr_space_t @var{subset})
+Define this to return whether the @var{subset} named address space is
+contained within the @var{superset} named address space.  Pointers to
+a named address space that is a subset of another named address space
+will be converted automatically without a cast if used together in
+arithmetic operations.  Pointers to a superset address space can be
+converted to pointers to a subset address space via explicit casts.
+@end deftypefn
+
+@deftypefn {Target Hook} rtx TARGET_ADDR_SPACE_CONVERT (rtx @var{op}, tree @var{from_type}, tree @var{to_type})
+Define this to convert the pointer expression represented by the RTL
+@var{op} with type @var{from_type} that points to a named address
+space to a new pointer expression with type @var{to_type} that points
+to a different named address space.  When this hook it called, it is
+guaranteed that one of the two address spaces is a subset of the other,
+as determined by the @code{TARGET_ADDR_SPACE_SUBSET_P} target hook.
+@end deftypefn
+
+@node Misc
+@section Miscellaneous Parameters
+@cindex parameters, miscellaneous
+
+@c prevent bad page break with this line
+Here are several miscellaneous parameters.
+
+@defmac HAS_LONG_COND_BRANCH
+Define this boolean macro to indicate whether or not your architecture
+has conditional branches that can span all of memory.  It is used in
+conjunction with an optimization that partitions hot and cold basic
+blocks into separate sections of the executable.  If this macro is
+set to false, gcc will convert any conditional branches that attempt
+to cross between sections into unconditional branches or indirect jumps.
+@end defmac
+
+@defmac HAS_LONG_UNCOND_BRANCH
+Define this boolean macro to indicate whether or not your architecture
+has unconditional branches that can span all of memory.  It is used in
+conjunction with an optimization that partitions hot and cold basic
+blocks into separate sections of the executable.  If this macro is
+set to false, gcc will convert any unconditional branches that attempt
+to cross between sections into indirect jumps.
+@end defmac
+
+@defmac CASE_VECTOR_MODE
+An alias for a machine mode name.  This is the machine mode that
+elements of a jump-table should have.
+@end defmac
+
+@defmac CASE_VECTOR_SHORTEN_MODE (@var{min_offset}, @var{max_offset}, @var{body})
+Optional: return the preferred mode for an @code{addr_diff_vec}
+when the minimum and maximum offset are known.  If you define this,
+it enables extra code in branch shortening to deal with @code{addr_diff_vec}.
+To make this work, you also have to define @code{INSN_ALIGN} and
+make the alignment for @code{addr_diff_vec} explicit.
+The @var{body} argument is provided so that the offset_unsigned and scale
+flags can be updated.
+@end defmac
+
+@defmac CASE_VECTOR_PC_RELATIVE
+Define this macro to be a C expression to indicate when jump-tables
+should contain relative addresses.  You need not define this macro if
+jump-tables never contain relative addresses, or jump-tables should
+contain relative addresses only when @option{-fPIC} or @option{-fPIC}
+is in effect.
+@end defmac
+
+@deftypefn {Target Hook} {unsigned int} TARGET_CASE_VALUES_THRESHOLD (void)
+This function return the smallest number of different values for which it
+is best to use a jump-table instead of a tree of conditional branches.
+The default is four for machines with a @code{casesi} instruction and
+five otherwise.  This is best for most machines.
+@end deftypefn
+
+@defmac CASE_USE_BIT_TESTS
+Define this macro to be a C expression to indicate whether C switch
+statements may be implemented by a sequence of bit tests.  This is
+advantageous on processors that can efficiently implement left shift
+of 1 by the number of bits held in a register, but inappropriate on
+targets that would require a loop.  By default, this macro returns
+@code{true} if the target defines an @code{ashlsi3} pattern, and
+@code{false} otherwise.
+@end defmac
+
+@defmac WORD_REGISTER_OPERATIONS
+Define this macro if operations between registers with integral mode
+smaller than a word are always performed on the entire register.
+Most RISC machines have this property and most CISC machines do not.
+@end defmac
+
+@defmac LOAD_EXTEND_OP (@var{mem_mode})
+Define this macro to be a C expression indicating when insns that read
+memory in @var{mem_mode}, an integral mode narrower than a word, set the
+bits outside of @var{mem_mode} to be either the sign-extension or the
+zero-extension of the data read.  Return @code{SIGN_EXTEND} for values
+of @var{mem_mode} for which the
+insn sign-extends, @code{ZERO_EXTEND} for which it zero-extends, and
+@code{UNKNOWN} for other modes.
+
+This macro is not called with @var{mem_mode} non-integral or with a width
+greater than or equal to @code{BITS_PER_WORD}, so you may return any
+value in this case.  Do not define this macro if it would always return
+@code{UNKNOWN}.  On machines where this macro is defined, you will normally
+define it as the constant @code{SIGN_EXTEND} or @code{ZERO_EXTEND}.
+
+You may return a non-@code{UNKNOWN} value even if for some hard registers
+the sign extension is not performed, if for the @code{REGNO_REG_CLASS}
+of these hard registers @code{CANNOT_CHANGE_MODE_CLASS} returns nonzero
+when the @var{from} mode is @var{mem_mode} and the @var{to} mode is any
+integral mode larger than this but not larger than @code{word_mode}.
+
+You must return @code{UNKNOWN} if for some hard registers that allow this
+mode, @code{CANNOT_CHANGE_MODE_CLASS} says that they cannot change to
+@code{word_mode}, but that they can change to another integral mode that
+is larger then @var{mem_mode} but still smaller than @code{word_mode}.
+@end defmac
+
+@defmac SHORT_IMMEDIATES_SIGN_EXTEND
+Define this macro if loading short immediate values into registers sign
+extends.
+@end defmac
+
+@defmac FIXUNS_TRUNC_LIKE_FIX_TRUNC
+Define this macro if the same instructions that convert a floating
+point number to a signed fixed point number also convert validly to an
+unsigned one.
+@end defmac
+
+@deftypefn {Target Hook} {unsigned int} TARGET_MIN_DIVISIONS_FOR_RECIP_MUL (enum machine_mode @var{mode})
+When @option{-ffast-math} is in effect, GCC tries to optimize
+divisions by the same divisor, by turning them into multiplications by
+the reciprocal.  This target hook specifies the minimum number of divisions
+that should be there for GCC to perform the optimization for a variable
+of mode @var{mode}.  The default implementation returns 3 if the machine
+has an instruction for the division, and 2 if it does not.
+@end deftypefn
+
+@defmac MOVE_MAX
+The maximum number of bytes that a single instruction can move quickly
+between memory and registers or between two memory locations.
+@end defmac
+
+@defmac MAX_MOVE_MAX
+The maximum number of bytes that a single instruction can move quickly
+between memory and registers or between two memory locations.  If this
+is undefined, the default is @code{MOVE_MAX}.  Otherwise, it is the
+constant value that is the largest value that @code{MOVE_MAX} can have
+at run-time.
+@end defmac
+
+@defmac SHIFT_COUNT_TRUNCATED
+A C expression that is nonzero if on this machine the number of bits
+actually used for the count of a shift operation is equal to the number
+of bits needed to represent the size of the object being shifted.  When
+this macro is nonzero, the compiler will assume that it is safe to omit
+a sign-extend, zero-extend, and certain bitwise `and' instructions that
+truncates the count of a shift operation.  On machines that have
+instructions that act on bit-fields at variable positions, which may
+include `bit test' instructions, a nonzero @code{SHIFT_COUNT_TRUNCATED}
+also enables deletion of truncations of the values that serve as
+arguments to bit-field instructions.
+
+If both types of instructions truncate the count (for shifts) and
+position (for bit-field operations), or if no variable-position bit-field
+instructions exist, you should define this macro.
+
+However, on some machines, such as the 80386 and the 680x0, truncation
+only applies to shift operations and not the (real or pretended)
+bit-field operations.  Define @code{SHIFT_COUNT_TRUNCATED} to be zero on
+such machines.  Instead, add patterns to the @file{md} file that include
+the implied truncation of the shift instructions.
+
+You need not define this macro if it would always have the value of zero.
+@end defmac
+
+@anchor{TARGET_SHIFT_TRUNCATION_MASK}
+@deftypefn {Target Hook} {unsigned HOST_WIDE_INT} TARGET_SHIFT_TRUNCATION_MASK (enum machine_mode @var{mode})
+This function describes how the standard shift patterns for @var{mode}
+deal with shifts by negative amounts or by more than the width of the mode.
+@xref{shift patterns}.
+
+On many machines, the shift patterns will apply a mask @var{m} to the
+shift count, meaning that a fixed-width shift of @var{x} by @var{y} is
+equivalent to an arbitrary-width shift of @var{x} by @var{y & m}.  If
+this is true for mode @var{mode}, the function should return @var{m},
+otherwise it should return 0.  A return value of 0 indicates that no
+particular behavior is guaranteed.
+
+Note that, unlike @code{SHIFT_COUNT_TRUNCATED}, this function does
+@emph{not} apply to general shift rtxes; it applies only to instructions
+that are generated by the named shift patterns.
+
+The default implementation of this function returns
+@code{GET_MODE_BITSIZE (@var{mode}) - 1} if @code{SHIFT_COUNT_TRUNCATED}
+and 0 otherwise.  This definition is always safe, but if
+@code{SHIFT_COUNT_TRUNCATED} is false, and some shift patterns
+nevertheless truncate the shift count, you may get better code
+by overriding it.
+@end deftypefn
+
+@defmac TRULY_NOOP_TRUNCATION (@var{outprec}, @var{inprec})
+A C expression which is nonzero if on this machine it is safe to
+``convert'' an integer of @var{inprec} bits to one of @var{outprec}
+bits (where @var{outprec} is smaller than @var{inprec}) by merely
+operating on it as if it had only @var{outprec} bits.
+
+On many machines, this expression can be 1.
+
+@c rearranged this, removed the phrase "it is reported that".  this was
+@c to fix an overfull hbox.  --mew 10feb93
+When @code{TRULY_NOOP_TRUNCATION} returns 1 for a pair of sizes for
+modes for which @code{MODES_TIEABLE_P} is 0, suboptimal code can result.
+If this is the case, making @code{TRULY_NOOP_TRUNCATION} return 0 in
+such cases may improve things.
+@end defmac
+
+@deftypefn {Target Hook} int TARGET_MODE_REP_EXTENDED (enum machine_mode @var{mode}, enum machine_mode @var{rep_mode})
+The representation of an integral mode can be such that the values
+are always extended to a wider integral mode.  Return
+@code{SIGN_EXTEND} if values of @var{mode} are represented in
+sign-extended form to @var{rep_mode}.  Return @code{UNKNOWN}
+otherwise.  (Currently, none of the targets use zero-extended
+representation this way so unlike @code{LOAD_EXTEND_OP},
+@code{TARGET_MODE_REP_EXTENDED} is expected to return either
+@code{SIGN_EXTEND} or @code{UNKNOWN}.  Also no target extends
+@var{mode} to @var{rep_mode} so that @var{rep_mode} is not the next
+widest integral mode and currently we take advantage of this fact.)
+
+Similarly to @code{LOAD_EXTEND_OP} you may return a non-@code{UNKNOWN}
+value even if the extension is not performed on certain hard registers
+as long as for the @code{REGNO_REG_CLASS} of these hard registers
+@code{CANNOT_CHANGE_MODE_CLASS} returns nonzero.
+
+Note that @code{TARGET_MODE_REP_EXTENDED} and @code{LOAD_EXTEND_OP}
+describe two related properties.  If you define
+@code{TARGET_MODE_REP_EXTENDED (mode, word_mode)} you probably also want
+to define @code{LOAD_EXTEND_OP (mode)} to return the same type of
+extension.
+
+In order to enforce the representation of @code{mode},
+@code{TRULY_NOOP_TRUNCATION} should return false when truncating to
+@code{mode}.
+@end deftypefn
+
+@defmac STORE_FLAG_VALUE
+A C expression describing the value returned by a comparison operator
+with an integral mode and stored by a store-flag instruction
+(@samp{cstore@var{mode}4}) when the condition is true.  This description must
+apply to @emph{all} the @samp{cstore@var{mode}4} patterns and all the
+comparison operators whose results have a @code{MODE_INT} mode.
+
+A value of 1 or @minus{}1 means that the instruction implementing the
+comparison operator returns exactly 1 or @minus{}1 when the comparison is true
+and 0 when the comparison is false.  Otherwise, the value indicates
+which bits of the result are guaranteed to be 1 when the comparison is
+true.  This value is interpreted in the mode of the comparison
+operation, which is given by the mode of the first operand in the
+@samp{cstore@var{mode}4} pattern.  Either the low bit or the sign bit of
+@code{STORE_FLAG_VALUE} be on.  Presently, only those bits are used by
+the compiler.
+
+If @code{STORE_FLAG_VALUE} is neither 1 or @minus{}1, the compiler will
+generate code that depends only on the specified bits.  It can also
+replace comparison operators with equivalent operations if they cause
+the required bits to be set, even if the remaining bits are undefined.
+For example, on a machine whose comparison operators return an
+@code{SImode} value and where @code{STORE_FLAG_VALUE} is defined as
+@samp{0x80000000}, saying that just the sign bit is relevant, the
+expression
+
+@smallexample
+(ne:SI (and:SI @var{x} (const_int @var{power-of-2})) (const_int 0))
+@end smallexample
+
+@noindent
+can be converted to
+
+@smallexample
+(ashift:SI @var{x} (const_int @var{n}))
+@end smallexample
+
+@noindent
+where @var{n} is the appropriate shift count to move the bit being
+tested into the sign bit.
+
+There is no way to describe a machine that always sets the low-order bit
+for a true value, but does not guarantee the value of any other bits,
+but we do not know of any machine that has such an instruction.  If you
+are trying to port GCC to such a machine, include an instruction to
+perform a logical-and of the result with 1 in the pattern for the
+comparison operators and let us know at @email{gcc@@gcc.gnu.org}.
+
+Often, a machine will have multiple instructions that obtain a value
+from a comparison (or the condition codes).  Here are rules to guide the
+choice of value for @code{STORE_FLAG_VALUE}, and hence the instructions
+to be used:
+
+@itemize @bullet
+@item
+Use the shortest sequence that yields a valid definition for
+@code{STORE_FLAG_VALUE}.  It is more efficient for the compiler to
+``normalize'' the value (convert it to, e.g., 1 or 0) than for the
+comparison operators to do so because there may be opportunities to
+combine the normalization with other operations.
+
+@item
+For equal-length sequences, use a value of 1 or @minus{}1, with @minus{}1 being
+slightly preferred on machines with expensive jumps and 1 preferred on
+other machines.
+
+@item
+As a second choice, choose a value of @samp{0x80000001} if instructions
+exist that set both the sign and low-order bits but do not define the
+others.
+
+@item
+Otherwise, use a value of @samp{0x80000000}.
+@end itemize
+
+Many machines can produce both the value chosen for
+@code{STORE_FLAG_VALUE} and its negation in the same number of
+instructions.  On those machines, you should also define a pattern for
+those cases, e.g., one matching
+
+@smallexample
+(set @var{A} (neg:@var{m} (ne:@var{m} @var{B} @var{C})))
+@end smallexample
+
+Some machines can also perform @code{and} or @code{plus} operations on
+condition code values with less instructions than the corresponding
+@samp{cstore@var{mode}4} insn followed by @code{and} or @code{plus}.  On those
+machines, define the appropriate patterns.  Use the names @code{incscc}
+and @code{decscc}, respectively, for the patterns which perform
+@code{plus} or @code{minus} operations on condition code values.  See
+@file{rs6000.md} for some examples.  The GNU Superoptimizer can be used to
+find such instruction sequences on other machines.
+
+If this macro is not defined, the default value, 1, is used.  You need
+not define @code{STORE_FLAG_VALUE} if the machine has no store-flag
+instructions, or if the value generated by these instructions is 1.
+@end defmac
+
+@defmac FLOAT_STORE_FLAG_VALUE (@var{mode})
+A C expression that gives a nonzero @code{REAL_VALUE_TYPE} value that is
+returned when comparison operators with floating-point results are true.
+Define this macro on machines that have comparison operations that return
+floating-point values.  If there are no such operations, do not define
+this macro.
+@end defmac
+
+@defmac VECTOR_STORE_FLAG_VALUE (@var{mode})
+A C expression that gives a rtx representing the nonzero true element
+for vector comparisons.  The returned rtx should be valid for the inner
+mode of @var{mode} which is guaranteed to be a vector mode.  Define
+this macro on machines that have vector comparison operations that
+return a vector result.  If there are no such operations, do not define
+this macro.  Typically, this macro is defined as @code{const1_rtx} or
+@code{constm1_rtx}.  This macro may return @code{NULL_RTX} to prevent
+the compiler optimizing such vector comparison operations for the
+given mode.
+@end defmac
+
+@defmac CLZ_DEFINED_VALUE_AT_ZERO (@var{mode}, @var{value})
+@defmacx CTZ_DEFINED_VALUE_AT_ZERO (@var{mode}, @var{value})
+A C expression that indicates whether the architecture defines a value
+for @code{clz} or @code{ctz} with a zero operand.  
+A result of @code{0} indicates the value is undefined.
+If the value is defined for only the RTL expression, the macro should
+evaluate to @code{1}; if the value applies also to the corresponding optab
+entry (which is normally the case if it expands directly into
+the corresponding RTL), then the macro should evaluate to @code{2}.  
+In the cases where the value is defined, @var{value} should be set to
+this value.  
+
+If this macro is not defined, the value of @code{clz} or
+@code{ctz} at zero is assumed to be undefined.
+
+This macro must be defined if the target's expansion for @code{ffs}
+relies on a particular value to get correct results.  Otherwise it
+is not necessary, though it may be used to optimize some corner cases, and
+to provide a default expansion for the @code{ffs} optab.
+
+Note that regardless of this macro the ``definedness'' of @code{clz}
+and @code{ctz} at zero do @emph{not} extend to the builtin functions
+visible to the user.  Thus one may be free to adjust the value at will
+to match the target expansion of these operations without fear of
+breaking the API@.
+@end defmac
+
+@defmac Pmode
+An alias for the machine mode for pointers.  On most machines, define
+this to be the integer mode corresponding to the width of a hardware
+pointer; @code{SImode} on 32-bit machine or @code{DImode} on 64-bit machines.
+On some machines you must define this to be one of the partial integer
+modes, such as @code{PSImode}.
+
+The width of @code{Pmode} must be at least as large as the value of
+@code{POINTER_SIZE}.  If it is not equal, you must define the macro
+@code{POINTERS_EXTEND_UNSIGNED} to specify how pointers are extended
+to @code{Pmode}.
+@end defmac
+
+@defmac FUNCTION_MODE
+An alias for the machine mode used for memory references to functions
+being called, in @code{call} RTL expressions.  On most CISC machines,
+where an instruction can begin at any byte address, this should be 
+@code{QImode}.  On most RISC machines, where all instructions have fixed
+size and alignment, this should be a mode with the same size and alignment
+as the machine instruction words - typically @code{SImode} or @code{HImode}.
+@end defmac
+
+@defmac STDC_0_IN_SYSTEM_HEADERS
+In normal operation, the preprocessor expands @code{__STDC__} to the
+constant 1, to signify that GCC conforms to ISO Standard C@.  On some
+hosts, like Solaris, the system compiler uses a different convention,
+where @code{__STDC__} is normally 0, but is 1 if the user specifies
+strict conformance to the C Standard.
+
+Defining @code{STDC_0_IN_SYSTEM_HEADERS} makes GNU CPP follows the host
+convention when processing system header files, but when processing user
+files @code{__STDC__} will always expand to 1.
+@end defmac
+
+@defmac NO_IMPLICIT_EXTERN_C
+Define this macro if the system header files support C++ as well as C@.
+This macro inhibits the usual method of using system header files in
+C++, which is to pretend that the file's contents are enclosed in
+@samp{extern "C" @{@dots{}@}}.
+@end defmac
+
+@findex #pragma
+@findex pragma
+@defmac REGISTER_TARGET_PRAGMAS ()
+Define this macro if you want to implement any target-specific pragmas.
+If defined, it is a C expression which makes a series of calls to
+@code{c_register_pragma} or @code{c_register_pragma_with_expansion}
+for each pragma.  The macro may also do any
+setup required for the pragmas.
+
+The primary reason to define this macro is to provide compatibility with
+other compilers for the same target.  In general, we discourage
+definition of target-specific pragmas for GCC@.
+
+If the pragma can be implemented by attributes then you should consider
+defining the target hook @samp{TARGET_INSERT_ATTRIBUTES} as well.
+
+Preprocessor macros that appear on pragma lines are not expanded.  All
+@samp{#pragma} directives that do not match any registered pragma are
+silently ignored, unless the user specifies @option{-Wunknown-pragmas}.
+@end defmac
+
+@deftypefun void c_register_pragma (const char *@var{space}, const char *@var{name}, void (*@var{callback}) (struct cpp_reader *))
+@deftypefunx void c_register_pragma_with_expansion (const char *@var{space}, const char *@var{name}, void (*@var{callback}) (struct cpp_reader *))
+
+Each call to @code{c_register_pragma} or
+@code{c_register_pragma_with_expansion} establishes one pragma.  The
+@var{callback} routine will be called when the preprocessor encounters a
+pragma of the form
+
+@smallexample
+#pragma [@var{space}] @var{name} @dots{}
+@end smallexample
+
+@var{space} is the case-sensitive namespace of the pragma, or
+@code{NULL} to put the pragma in the global namespace.  The callback
+routine receives @var{pfile} as its first argument, which can be passed
+on to cpplib's functions if necessary.  You can lex tokens after the
+@var{name} by calling @code{pragma_lex}.  Tokens that are not read by the
+callback will be silently ignored.  The end of the line is indicated by
+a token of type @code{CPP_EOF}.  Macro expansion occurs on the
+arguments of pragmas registered with
+@code{c_register_pragma_with_expansion} but not on the arguments of
+pragmas registered with @code{c_register_pragma}.
+
+Note that the use of @code{pragma_lex} is specific to the C and C++
+compilers.  It will not work in the Java or Fortran compilers, or any
+other language compilers for that matter.  Thus if @code{pragma_lex} is going
+to be called from target-specific code, it must only be done so when
+building the C and C++ compilers.  This can be done by defining the
+variables @code{c_target_objs} and @code{cxx_target_objs} in the
+target entry in the @file{config.gcc} file.  These variables should name
+the target-specific, language-specific object file which contains the
+code that uses @code{pragma_lex}.  Note it will also be necessary to add a
+rule to the makefile fragment pointed to by @code{tmake_file} that shows
+how to build this object file.
+@end deftypefun
+
+@defmac HANDLE_PRAGMA_PACK_WITH_EXPANSION
+Define this macro if macros should be expanded in the
+arguments of @samp{#pragma pack}.
+@end defmac
+
+@deftypevr {Target Hook} bool TARGET_HANDLE_PRAGMA_EXTERN_PREFIX
+True if @code{#pragma extern_prefix} is to be supported.
+@end deftypevr
+
+@defmac TARGET_DEFAULT_PACK_STRUCT
+If your target requires a structure packing default other than 0 (meaning
+the machine default), define this macro to the necessary value (in bytes).
+This must be a value that would also be valid to use with
+@samp{#pragma pack()} (that is, a small power of two).
+@end defmac
+
+@defmac DOLLARS_IN_IDENTIFIERS
+Define this macro to control use of the character @samp{$} in
+identifier names for the C family of languages.  0 means @samp{$} is
+not allowed by default; 1 means it is allowed.  1 is the default;
+there is no need to define this macro in that case.
+@end defmac
+
+@defmac NO_DOLLAR_IN_LABEL
+Define this macro if the assembler does not accept the character
+@samp{$} in label names.  By default constructors and destructors in
+G++ have @samp{$} in the identifiers.  If this macro is defined,
+@samp{.} is used instead.
+@end defmac
+
+@defmac NO_DOT_IN_LABEL
+Define this macro if the assembler does not accept the character
+@samp{.} in label names.  By default constructors and destructors in G++
+have names that use @samp{.}.  If this macro is defined, these names
+are rewritten to avoid @samp{.}.
+@end defmac
+
+@defmac INSN_SETS_ARE_DELAYED (@var{insn})
+Define this macro as a C expression that is nonzero if it is safe for the
+delay slot scheduler to place instructions in the delay slot of @var{insn},
+even if they appear to use a resource set or clobbered in @var{insn}.
+@var{insn} is always a @code{jump_insn} or an @code{insn}; GCC knows that
+every @code{call_insn} has this behavior.  On machines where some @code{insn}
+or @code{jump_insn} is really a function call and hence has this behavior,
+you should define this macro.
+
+You need not define this macro if it would always return zero.
+@end defmac
+
+@defmac INSN_REFERENCES_ARE_DELAYED (@var{insn})
+Define this macro as a C expression that is nonzero if it is safe for the
+delay slot scheduler to place instructions in the delay slot of @var{insn},
+even if they appear to set or clobber a resource referenced in @var{insn}.
+@var{insn} is always a @code{jump_insn} or an @code{insn}.  On machines where
+some @code{insn} or @code{jump_insn} is really a function call and its operands
+are registers whose use is actually in the subroutine it calls, you should
+define this macro.  Doing so allows the delay slot scheduler to move
+instructions which copy arguments into the argument registers into the delay
+slot of @var{insn}.
+
+You need not define this macro if it would always return zero.
+@end defmac
+
+@defmac MULTIPLE_SYMBOL_SPACES
+Define this macro as a C expression that is nonzero if, in some cases,
+global symbols from one translation unit may not be bound to undefined
+symbols in another translation unit without user intervention.  For
+instance, under Microsoft Windows symbols must be explicitly imported
+from shared libraries (DLLs).
+
+You need not define this macro if it would always evaluate to zero.
+@end defmac
+
+@deftypefn {Target Hook} tree TARGET_MD_ASM_CLOBBERS (tree @var{outputs}, tree @var{inputs}, tree @var{clobbers})
+This target hook should add to @var{clobbers} @code{STRING_CST} trees for
+any hard regs the port wishes to automatically clobber for an asm.
+It should return the result of the last @code{tree_cons} used to add a
+clobber.  The @var{outputs}, @var{inputs} and @var{clobber} lists are the
+corresponding parameters to the asm and may be inspected to avoid
+clobbering a register that is an input or output of the asm.  You can use
+@code{tree_overlaps_hard_reg_set}, declared in @file{tree.h}, to test
+for overlap with regards to asm-declared registers.
+@end deftypefn
+
+@defmac MATH_LIBRARY
+Define this macro as a C string constant for the linker argument to link
+in the system math library, minus the initial @samp{"-l"}, or
+@samp{""} if the target does not have a
+separate math library.
+
+You need only define this macro if the default of @samp{"m"} is wrong.
+@end defmac
+
+@defmac LIBRARY_PATH_ENV
+Define this macro as a C string constant for the environment variable that
+specifies where the linker should look for libraries.
+
+You need only define this macro if the default of @samp{"LIBRARY_PATH"}
+is wrong.
+@end defmac
+
+@defmac TARGET_POSIX_IO
+Define this macro if the target supports the following POSIX@ file
+functions, access, mkdir and  file locking with fcntl / F_SETLKW@.
+Defining @code{TARGET_POSIX_IO} will enable the test coverage code
+to use file locking when exiting a program, which avoids race conditions
+if the program has forked. It will also create directories at run-time
+for cross-profiling.
+@end defmac
+
+@defmac MAX_CONDITIONAL_EXECUTE
+
+A C expression for the maximum number of instructions to execute via
+conditional execution instructions instead of a branch.  A value of
+@code{BRANCH_COST}+1 is the default if the machine does not use cc0, and
+1 if it does use cc0.
+@end defmac
+
+@defmac IFCVT_MODIFY_TESTS (@var{ce_info}, @var{true_expr}, @var{false_expr})
+Used if the target needs to perform machine-dependent modifications on the
+conditionals used for turning basic blocks into conditionally executed code.
+@var{ce_info} points to a data structure, @code{struct ce_if_block}, which
+contains information about the currently processed blocks.  @var{true_expr}
+and @var{false_expr} are the tests that are used for converting the
+then-block and the else-block, respectively.  Set either @var{true_expr} or
+@var{false_expr} to a null pointer if the tests cannot be converted.
+@end defmac
+
+@defmac IFCVT_MODIFY_MULTIPLE_TESTS (@var{ce_info}, @var{bb}, @var{true_expr}, @var{false_expr})
+Like @code{IFCVT_MODIFY_TESTS}, but used when converting more complicated
+if-statements into conditions combined by @code{and} and @code{or} operations.
+@var{bb} contains the basic block that contains the test that is currently
+being processed and about to be turned into a condition.
+@end defmac
+
+@defmac IFCVT_MODIFY_INSN (@var{ce_info}, @var{pattern}, @var{insn})
+A C expression to modify the @var{PATTERN} of an @var{INSN} that is to
+be converted to conditional execution format.  @var{ce_info} points to
+a data structure, @code{struct ce_if_block}, which contains information
+about the currently processed blocks.
+@end defmac
+
+@defmac IFCVT_MODIFY_FINAL (@var{ce_info})
+A C expression to perform any final machine dependent modifications in
+converting code to conditional execution.  The involved basic blocks
+can be found in the @code{struct ce_if_block} structure that is pointed
+to by @var{ce_info}.
+@end defmac
+
+@defmac IFCVT_MODIFY_CANCEL (@var{ce_info})
+A C expression to cancel any machine dependent modifications in
+converting code to conditional execution.  The involved basic blocks
+can be found in the @code{struct ce_if_block} structure that is pointed
+to by @var{ce_info}.
+@end defmac
+
+@defmac IFCVT_INIT_EXTRA_FIELDS (@var{ce_info})
+A C expression to initialize any extra fields in a @code{struct ce_if_block}
+structure, which are defined by the @code{IFCVT_EXTRA_FIELDS} macro.
+@end defmac
+
+@defmac IFCVT_EXTRA_FIELDS
+If defined, it should expand to a set of field declarations that will be
+added to the @code{struct ce_if_block} structure.  These should be initialized
+by the @code{IFCVT_INIT_EXTRA_FIELDS} macro.
+@end defmac
+
+@deftypefn {Target Hook} void TARGET_MACHINE_DEPENDENT_REORG (void)
+If non-null, this hook performs a target-specific pass over the
+instruction stream.  The compiler will run it at all optimization levels,
+just before the point at which it normally does delayed-branch scheduling.
+
+The exact purpose of the hook varies from target to target.  Some use
+it to do transformations that are necessary for correctness, such as
+laying out in-function constant pools or avoiding hardware hazards.
+Others use it as an opportunity to do some machine-dependent optimizations.
+
+You need not implement the hook if it has nothing to do.  The default
+definition is null.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_INIT_BUILTINS (void)
+Define this hook if you have any machine-specific built-in functions
+that need to be defined.  It should be a function that performs the
+necessary setup.
+
+Machine specific built-in functions can be useful to expand special machine
+instructions that would otherwise not normally be generated because
+they have no equivalent in the source language (for example, SIMD vector
+instructions or prefetch instructions).
+
+To create a built-in function, call the function
+@code{lang_hooks.builtin_function}
+which is defined by the language front end.  You can use any type nodes set
+up by @code{build_common_tree_nodes} and @code{build_common_tree_nodes_2};
+only language front ends that use those two functions will call
+@samp{TARGET_INIT_BUILTINS}.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_BUILTIN_DECL (unsigned @var{code}, bool @var{initialize_p})
+Define this hook if you have any machine-specific built-in functions
+that need to be defined.  It should be a function that returns the
+builtin function declaration for the builtin function code @var{code}.
+If there is no such builtin and it cannot be initialized at this time
+if @var{initialize_p} is true the function should return @code{NULL_TREE}.
+If @var{code} is out of range the function should return
+@code{error_mark_node}.
+@end deftypefn
+
+@deftypefn {Target Hook} rtx TARGET_EXPAND_BUILTIN (tree @var{exp}, rtx @var{target}, rtx @var{subtarget}, enum machine_mode @var{mode}, int @var{ignore})
+
+Expand a call to a machine specific built-in function that was set up by
+@samp{TARGET_INIT_BUILTINS}.  @var{exp} is the expression for the
+function call; the result should go to @var{target} if that is
+convenient, and have mode @var{mode} if that is convenient.
+@var{subtarget} may be used as the target for computing one of
+@var{exp}'s operands.  @var{ignore} is nonzero if the value is to be
+ignored.  This function should return the result of the call to the
+built-in function.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_RESOLVE_OVERLOADED_BUILTIN (unsigned int @var{loc}, tree @var{fndecl}, void *@var{arglist})
+Select a replacement for a machine specific built-in function that
+was set up by @samp{TARGET_INIT_BUILTINS}.  This is done
+@emph{before} regular type checking, and so allows the target to
+implement a crude form of function overloading.  @var{fndecl} is the
+declaration of the built-in function.  @var{arglist} is the list of
+arguments passed to the built-in function.  The result is a
+complete expression that implements the operation, usually
+another @code{CALL_EXPR}.
+@var{arglist} really has type @samp{VEC(tree,gc)*}
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_FOLD_BUILTIN (tree @var{fndecl}, int @var{n_args}, tree *@var{argp}, bool @var{ignore})
+Fold a call to a machine specific built-in function that was set up by
+@samp{TARGET_INIT_BUILTINS}.  @var{fndecl} is the declaration of the
+built-in function.  @var{n_args} is the number of arguments passed to
+the function; the arguments themselves are pointed to by @var{argp}.
+The result is another tree containing a simplified expression for the
+call's result.  If @var{ignore} is true the value will be ignored.
+@end deftypefn
+
+@deftypefn {Target Hook} {const char *} TARGET_INVALID_WITHIN_DOLOOP (const_rtx @var{insn})
+
+Take an instruction in @var{insn} and return NULL if it is valid within a
+low-overhead loop, otherwise return a string explaining why doloop
+could not be applied.
+
+Many targets use special registers for low-overhead looping. For any
+instruction that clobbers these this function should return a string indicating
+the reason why the doloop could not be applied.
+By default, the RTL loop optimizer does not use a present doloop pattern for
+loops containing function calls or branch on table instructions.
+@end deftypefn
+
+@defmac MD_CAN_REDIRECT_BRANCH (@var{branch1}, @var{branch2})
+
+Take a branch insn in @var{branch1} and another in @var{branch2}.
+Return true if redirecting @var{branch1} to the destination of
+@var{branch2} is possible.
+
+On some targets, branches may have a limited range.  Optimizing the
+filling of delay slots can result in branches being redirected, and this
+may in turn cause a branch offset to overflow.
+@end defmac
+
+@deftypefn {Target Hook} bool TARGET_COMMUTATIVE_P (const_rtx @var{x}, int @var{outer_code})
+This target hook returns @code{true} if @var{x} is considered to be commutative.
+Usually, this is just COMMUTATIVE_P (@var{x}), but the HP PA doesn't consider
+PLUS to be commutative inside a MEM@.  @var{outer_code} is the rtx code
+of the enclosing rtl, if known, otherwise it is UNKNOWN.
+@end deftypefn
+
+@deftypefn {Target Hook} rtx TARGET_ALLOCATE_INITIAL_VALUE (rtx @var{hard_reg})
+
+When the initial value of a hard register has been copied in a pseudo
+register, it is often not necessary to actually allocate another register
+to this pseudo register, because the original hard register or a stack slot
+it has been saved into can be used.  @code{TARGET_ALLOCATE_INITIAL_VALUE}
+is called at the start of register allocation once for each hard register
+that had its initial value copied by using
+@code{get_func_hard_reg_initial_val} or @code{get_hard_reg_initial_val}.
+Possible values are @code{NULL_RTX}, if you don't want
+to do any special allocation, a @code{REG} rtx---that would typically be
+the hard register itself, if it is known not to be clobbered---or a
+@code{MEM}.
+If you are returning a @code{MEM}, this is only a hint for the allocator;
+it might decide to use another register anyways.
+You may use @code{current_function_leaf_function} in the hook, functions
+that use @code{REG_N_SETS}, to determine if the hard
+register in question will not be clobbered.
+The default value of this hook is @code{NULL}, which disables any special
+allocation.
+@end deftypefn
+
+@deftypefn {Target Hook} int TARGET_UNSPEC_MAY_TRAP_P (const_rtx @var{x}, unsigned @var{flags})
+This target hook returns nonzero if @var{x}, an @code{unspec} or
+@code{unspec_volatile} operation, might cause a trap.  Targets can use
+this hook to enhance precision of analysis for @code{unspec} and
+@code{unspec_volatile} operations.  You may call @code{may_trap_p_1}
+to analyze inner elements of @var{x} in which case @var{flags} should be
+passed along.
+@end deftypefn
+
+@deftypefn {Target Hook} void TARGET_SET_CURRENT_FUNCTION (tree @var{decl})
+The compiler invokes this hook whenever it changes its current function 
+context (@code{cfun}).  You can define this function if
+the back end needs to perform any initialization or reset actions on a
+per-function basis.  For example, it may be used to implement function
+attributes that affect register usage or code generation patterns.
+The argument @var{decl} is the declaration for the new function context,
+and may be null to indicate that the compiler has left a function context
+and is returning to processing at the top level.
+The default hook function does nothing.
+
+GCC sets @code{cfun} to a dummy function context during initialization of
+some parts of the back end.  The hook function is not invoked in this
+situation; you need not worry about the hook being invoked recursively,
+or when the back end is in a partially-initialized state.
+@code{cfun} might be @code{NULL} to indicate processing at top level,
+outside of any function scope.
+@end deftypefn
+
+@defmac TARGET_OBJECT_SUFFIX
+Define this macro to be a C string representing the suffix for object
+files on your target machine.  If you do not define this macro, GCC will
+use @samp{.o} as the suffix for object files.
+@end defmac
+
+@defmac TARGET_EXECUTABLE_SUFFIX
+Define this macro to be a C string representing the suffix to be
+automatically added to executable files on your target machine.  If you
+do not define this macro, GCC will use the null string as the suffix for
+executable files.
+@end defmac
+
+@defmac COLLECT_EXPORT_LIST
+If defined, @code{collect2} will scan the individual object files
+specified on its command line and create an export list for the linker.
+Define this macro for systems like AIX, where the linker discards
+object files that are not referenced from @code{main} and uses export
+lists.
+@end defmac
+
+@defmac MODIFY_JNI_METHOD_CALL (@var{mdecl})
+Define this macro to a C expression representing a variant of the
+method call @var{mdecl}, if Java Native Interface (JNI) methods
+must be invoked differently from other methods on your target.
+For example, on 32-bit Microsoft Windows, JNI methods must be invoked using
+the @code{stdcall} calling convention and this macro is then
+defined as this expression:
+
+@smallexample
+build_type_attribute_variant (@var{mdecl},
+                              build_tree_list
+                              (get_identifier ("stdcall"),
+                               NULL))
+@end smallexample
+@end defmac
+
+@deftypefn {Target Hook} bool TARGET_CANNOT_MODIFY_JUMPS_P (void)
+This target hook returns @code{true} past the point in which new jump
+instructions could be created.  On machines that require a register for
+every jump such as the SHmedia ISA of SH5, this point would typically be
+reload, so this target hook should be defined to a function such as:
+
+@smallexample
+static bool
+cannot_modify_jumps_past_reload_p ()
+@{
+  return (reload_completed || reload_in_progress);
+@}
+@end smallexample
+@end deftypefn
+
+@deftypefn {Target Hook} reg_class_t TARGET_BRANCH_TARGET_REGISTER_CLASS (void)
+This target hook returns a register class for which branch target register
+optimizations should be applied.  All registers in this class should be
+usable interchangeably.  After reload, registers in this class will be
+re-allocated and loads will be hoisted out of loops and be subjected
+to inter-block scheduling.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_BRANCH_TARGET_REGISTER_CALLEE_SAVED (bool @var{after_prologue_epilogue_gen})
+Branch target register optimization will by default exclude callee-saved
+registers
+that are not already live during the current function; if this target hook
+returns true, they will be included.  The target code must than make sure
+that all target registers in the class returned by
+@samp{TARGET_BRANCH_TARGET_REGISTER_CLASS} that might need saving are
+saved.  @var{after_prologue_epilogue_gen} indicates if prologues and
+epilogues have already been generated.  Note, even if you only return
+true when @var{after_prologue_epilogue_gen} is false, you still are likely
+to have to make special provisions in @code{INITIAL_ELIMINATION_OFFSET}
+to reserve space for caller-saved target registers.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_HAVE_CONDITIONAL_EXECUTION (void)
+This target hook returns true if the target supports conditional execution.
+This target hook is required only when the target has several different
+modes and they have different conditional execution capability, such as ARM.
+@end deftypefn
+
+@deftypefn {Target Hook} unsigned TARGET_LOOP_UNROLL_ADJUST (unsigned @var{nunroll}, struct loop *@var{loop})
+This target hook returns a new value for the number of times @var{loop}
+should be unrolled. The parameter @var{nunroll} is the number of times
+the loop is to be unrolled. The parameter @var{loop} is a pointer to
+the loop, which is going to be checked for unrolling. This target hook
+is required only when the target has special constraints like maximum
+number of memory accesses.
+@end deftypefn
+
+@defmac POWI_MAX_MULTS
+If defined, this macro is interpreted as a signed integer C expression
+that specifies the maximum number of floating point multiplications
+that should be emitted when expanding exponentiation by an integer
+constant inline.  When this value is defined, exponentiation requiring
+more than this number of multiplications is implemented by calling the
+system library's @code{pow}, @code{powf} or @code{powl} routines.
+The default value places no upper bound on the multiplication count.
+@end defmac
+
+@deftypefn Macro void TARGET_EXTRA_INCLUDES (const char *@var{sysroot}, const char *@var{iprefix}, int @var{stdinc})
+This target hook should register any extra include files for the
+target.  The parameter @var{stdinc} indicates if normal include files
+are present.  The parameter @var{sysroot} is the system root directory.
+The parameter @var{iprefix} is the prefix for the gcc directory.
+@end deftypefn
+
+@deftypefn Macro void TARGET_EXTRA_PRE_INCLUDES (const char *@var{sysroot}, const char *@var{iprefix}, int @var{stdinc})
+This target hook should register any extra include files for the
+target before any standard headers.  The parameter @var{stdinc}
+indicates if normal include files are present.  The parameter
+@var{sysroot} is the system root directory.  The parameter
+@var{iprefix} is the prefix for the gcc directory.
+@end deftypefn
+
+@deftypefn Macro void TARGET_OPTF (char *@var{path})
+This target hook should register special include paths for the target.
+The parameter @var{path} is the include to register.  On Darwin
+systems, this is used for Framework includes, which have semantics
+that are different from @option{-I}.
+@end deftypefn
+
+@defmac bool TARGET_USE_LOCAL_THUNK_ALIAS_P (tree @var{fndecl})
+This target macro returns @code{true} if it is safe to use a local alias
+for a virtual function @var{fndecl} when constructing thunks,
+@code{false} otherwise.  By default, the macro returns @code{true} for all
+functions, if a target supports aliases (i.e.@: defines
+@code{ASM_OUTPUT_DEF}), @code{false} otherwise,
+@end defmac
+
+@defmac TARGET_FORMAT_TYPES
+If defined, this macro is the name of a global variable containing
+target-specific format checking information for the @option{-Wformat}
+option.  The default is to have no target-specific format checks.
+@end defmac
+
+@defmac TARGET_N_FORMAT_TYPES
+If defined, this macro is the number of entries in
+@code{TARGET_FORMAT_TYPES}.
+@end defmac
+
+@defmac TARGET_OVERRIDES_FORMAT_ATTRIBUTES
+If defined, this macro is the name of a global variable containing
+target-specific format overrides for the @option{-Wformat} option. The
+default is to have no target-specific format overrides. If defined,
+@code{TARGET_FORMAT_TYPES} must be defined, too.
+@end defmac
+
+@defmac TARGET_OVERRIDES_FORMAT_ATTRIBUTES_COUNT
+If defined, this macro specifies the number of entries in
+@code{TARGET_OVERRIDES_FORMAT_ATTRIBUTES}.
+@end defmac
+
+@defmac TARGET_OVERRIDES_FORMAT_INIT
+If defined, this macro specifies the optional initialization
+routine for target specific customizations of the system printf
+and scanf formatter settings.
+@end defmac
+
+@deftypevr {Target Hook} bool TARGET_RELAXED_ORDERING
+If set to @code{true}, means that the target's memory model does not
+guarantee that loads which do not depend on one another will access
+main memory in the order of the instruction stream; if ordering is
+important, an explicit memory barrier must be used.  This is true of
+many recent processors which implement a policy of ``relaxed,''
+``weak,'' or ``release'' memory consistency, such as Alpha, PowerPC,
+and ia64.  The default is @code{false}.
+@end deftypevr
+
+@deftypefn {Target Hook} {const char *} TARGET_INVALID_ARG_FOR_UNPROTOTYPED_FN (const_tree @var{typelist}, const_tree @var{funcdecl}, const_tree @var{val})
+If defined, this macro returns the diagnostic message when it is
+illegal to pass argument @var{val} to function @var{funcdecl}
+with prototype @var{typelist}.
+@end deftypefn
+
+@deftypefn {Target Hook} {const char *} TARGET_INVALID_CONVERSION (const_tree @var{fromtype}, const_tree @var{totype})
+If defined, this macro returns the diagnostic message when it is
+invalid to convert from @var{fromtype} to @var{totype}, or @code{NULL}
+if validity should be determined by the front end.
+@end deftypefn
+
+@deftypefn {Target Hook} {const char *} TARGET_INVALID_UNARY_OP (int @var{op}, const_tree @var{type})
+If defined, this macro returns the diagnostic message when it is
+invalid to apply operation @var{op} (where unary plus is denoted by
+@code{CONVERT_EXPR}) to an operand of type @var{type}, or @code{NULL}
+if validity should be determined by the front end.
+@end deftypefn
+
+@deftypefn {Target Hook} {const char *} TARGET_INVALID_BINARY_OP (int @var{op}, const_tree @var{type1}, const_tree @var{type2})
+If defined, this macro returns the diagnostic message when it is
+invalid to apply operation @var{op} to operands of types @var{type1}
+and @var{type2}, or @code{NULL} if validity should be determined by
+the front end.
+@end deftypefn
+
+@deftypefn {Target Hook} {const char *} TARGET_INVALID_PARAMETER_TYPE (const_tree @var{type})
+If defined, this macro returns the diagnostic message when it is
+invalid for functions to include parameters of type @var{type}, 
+or @code{NULL} if validity should be determined by
+the front end.  This is currently used only by the C and C++ front ends.
+@end deftypefn
+
+@deftypefn {Target Hook} {const char *} TARGET_INVALID_RETURN_TYPE (const_tree @var{type})
+If defined, this macro returns the diagnostic message when it is
+invalid for functions to have return type @var{type}, 
+or @code{NULL} if validity should be determined by
+the front end.  This is currently used only by the C and C++ front ends.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_PROMOTED_TYPE (const_tree @var{type})
+If defined, this target hook returns the type to which values of 
+@var{type} should be promoted when they appear in expressions, 
+analogous to the integer promotions, or @code{NULL_TREE} to use the
+front end's normal promotion rules.  This hook is useful when there are
+target-specific types with special promotion rules.
+This is currently used only by the C and C++ front ends.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_CONVERT_TO_TYPE (tree @var{type}, tree @var{expr})
+If defined, this hook returns the result of converting @var{expr} to 
+@var{type}.  It should return the converted expression, 
+or @code{NULL_TREE} to apply the front end's normal conversion rules.
+This hook is useful when there are target-specific types with special 
+conversion rules.
+This is currently used only by the C and C++ front ends.
+@end deftypefn
+
+@defmac TARGET_USE_JCR_SECTION
+This macro determines whether to use the JCR section to register Java
+classes. By default, TARGET_USE_JCR_SECTION is defined to 1 if both
+SUPPORTS_WEAK and TARGET_HAVE_NAMED_SECTIONS are true, else 0.
+@end defmac
+
+@defmac OBJC_JBLEN
+This macro determines the size of the objective C jump buffer for the
+NeXT runtime. By default, OBJC_JBLEN is defined to an innocuous value.
+@end defmac
+
+@defmac LIBGCC2_UNWIND_ATTRIBUTE
+Define this macro if any target-specific attributes need to be attached
+to the functions in @file{libgcc} that provide low-level support for 
+call stack unwinding.  It is used in declarations in @file{unwind-generic.h}
+and the associated definitions of those functions.
+@end defmac
+
+@deftypefn {Target Hook} void TARGET_UPDATE_STACK_BOUNDARY (void)
+Define this macro to update the current function stack boundary if
+necessary.
+@end deftypefn
+
+@deftypefn {Target Hook} rtx TARGET_GET_DRAP_RTX (void)
+This hook should return an rtx for Dynamic Realign Argument Pointer (DRAP) if a
+different argument pointer register is needed to access the function's
+argument list due to stack realignment.  Return @code{NULL} if no DRAP
+is needed.
+@end deftypefn
+
+@deftypefn {Target Hook} bool TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS (void)
+When optimization is disabled, this hook indicates whether or not
+arguments should be allocated to stack slots.  Normally, GCC allocates
+stacks slots for arguments when not optimizing in order to make
+debugging easier.  However, when a function is declared with
+@code{__attribute__((naked))}, there is no stack frame, and the compiler
+cannot safely move arguments from the registers in which they are passed
+to the stack.  Therefore, this hook should return true in general, but
+false for naked functions.  The default implementation always returns true.
+@end deftypefn
+
+@deftypevr {Target Hook} {unsigned HOST_WIDE_INT} TARGET_CONST_ANCHOR
+On some architectures it can take multiple instructions to synthesize
+a constant.  If there is another constant already in a register that
+is close enough in value then it is preferable that the new constant
+is computed from this register using immediate addition or
+subtraction.  We accomplish this through CSE.  Besides the value of
+the constant we also add a lower and an upper constant anchor to the
+available expressions.  These are then queried when encountering new
+constants.  The anchors are computed by rounding the constant up and
+down to a multiple of the value of @code{TARGET_CONST_ANCHOR}.
+@code{TARGET_CONST_ANCHOR} should be the maximum positive value
+accepted by immediate-add plus one.  We currently assume that the
+value of @code{TARGET_CONST_ANCHOR} is a power of 2.  For example, on
+MIPS, where add-immediate takes a 16-bit signed value,
+@code{TARGET_CONST_ANCHOR} is set to @samp{0x8000}.  The default value
+is zero, which disables this optimization.  @end deftypevr
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
new file mode 100644
index 000000000..919e7673b
--- /dev/null
+++ b/gcc/doc/tm.texi.in
@@ -0,0 +1,11241 @@
+@c Copyright (C) 1988,1989,1992,1993,1994,1995,1996,1997,1998,1999,2000,2001,
+@c 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Target Macros
+@chapter Target Description Macros and Functions
+@cindex machine description macros
+@cindex target description macros
+@cindex macros, target description
+@cindex @file{tm.h} macros
+
+In addition to the file @file{@var{machine}.md}, a machine description
+includes a C header file conventionally given the name
+@file{@var{machine}.h} and a C source file named @file{@var{machine}.c}.
+The header file defines numerous macros that convey the information
+about the target machine that does not fit into the scheme of the
+@file{.md} file.  The file @file{tm.h} should be a link to
+@file{@var{machine}.h}.  The header file @file{config.h} includes
+@file{tm.h} and most compiler source files include @file{config.h}.  The
+source file defines a variable @code{targetm}, which is a structure
+containing pointers to functions and data relating to the target
+machine.  @file{@var{machine}.c} should also contain their definitions,
+if they are not defined elsewhere in GCC, and other functions called
+through the macros defined in the @file{.h} file.
+
+@menu
+* Target Structure::    The @code{targetm} variable.
+* Driver::              Controlling how the driver runs the compilation passes.
+* Run-time Target::     Defining @samp{-m} options like @option{-m68000} and @option{-m68020}.
+* Per-Function Data::   Defining data structures for per-function information.
+* Storage Layout::      Defining sizes and alignments of data.
+* Type Layout::         Defining sizes and properties of basic user data types.
+* Registers::           Naming and describing the hardware registers.
+* Register Classes::    Defining the classes of hardware registers.
+* Old Constraints::     The old way to define machine-specific constraints.
+* Stack and Calling::   Defining which way the stack grows and by how much.
+* Varargs::             Defining the varargs macros.
+* Trampolines::         Code set up at run time to enter a nested function.
+* Library Calls::       Controlling how library routines are implicitly called.
+* Addressing Modes::    Defining addressing modes valid for memory operands.
+* Anchored Addresses::  Defining how @option{-fsection-anchors} should work.
+* Condition Code::      Defining how insns update the condition code.
+* Costs::               Defining relative costs of different operations.
+* Scheduling::          Adjusting the behavior of the instruction scheduler.
+* Sections::            Dividing storage into text, data, and other sections.
+* PIC::                 Macros for position independent code.
+* Assembler Format::    Defining how to write insns and pseudo-ops to output.
+* Debugging Info::      Defining the format of debugging output.
+* Floating Point::      Handling floating point for cross-compilers.
+* Mode Switching::      Insertion of mode-switching instructions.
+* Target Attributes::   Defining target-specific uses of @code{__attribute__}.
+* Emulated TLS::        Emulated TLS support.
+* MIPS Coprocessors::   MIPS coprocessor support and how to customize it.
+* PCH Target::          Validity checking for precompiled headers.
+* C++ ABI::             Controlling C++ ABI changes.
+* Named Address Spaces:: Adding support for named address spaces
+* Misc::                Everything else.
+@end menu
+
+@node Target Structure
+@section The Global @code{targetm} Variable
+@cindex target hooks
+@cindex target functions
+
+@deftypevar {struct gcc_target} targetm
+The target @file{.c} file must define the global @code{targetm} variable
+which contains pointers to functions and data relating to the target
+machine.  The variable is declared in @file{target.h};
+@file{target-def.h} defines the macro @code{TARGET_INITIALIZER} which is
+used to initialize the variable, and macros for the default initializers
+for elements of the structure.  The @file{.c} file should override those
+macros for which the default definition is inappropriate.  For example:
+@smallexample
+#include "target.h"
+#include "target-def.h"
+
+/* @r{Initialize the GCC target structure.}  */
+
+#undef TARGET_COMP_TYPE_ATTRIBUTES
+#define TARGET_COMP_TYPE_ATTRIBUTES @var{machine}_comp_type_attributes
+
+struct gcc_target targetm = TARGET_INITIALIZER;
+@end smallexample
+@end deftypevar
+
+Where a macro should be defined in the @file{.c} file in this manner to
+form part of the @code{targetm} structure, it is documented below as a
+``Target Hook'' with a prototype.  Many macros will change in future
+from being defined in the @file{.h} file to being part of the
+@code{targetm} structure.
+
+@node Driver
+@section Controlling the Compilation Driver, @file{gcc}
+@cindex driver
+@cindex controlling the compilation driver
+
+@c prevent bad page break with this line
+You can control the compilation driver.
+
+@defmac DRIVER_SELF_SPECS
+A list of specs for the driver itself.  It should be a suitable
+initializer for an array of strings, with no surrounding braces.
+
+The driver applies these specs to its own command line between loading
+default @file{specs} files (but not command-line specified ones) and
+choosing the multilib directory or running any subcommands.  It
+applies them in the order given, so each spec can depend on the
+options added by earlier ones.  It is also possible to remove options
+using @samp{%<@var{option}} in the usual way.
+
+This macro can be useful when a port has several interdependent target
+options.  It provides a way of standardizing the command line so
+that the other specs are easier to write.
+
+Do not define this macro if it does not need to do anything.
+@end defmac
+
+@defmac OPTION_DEFAULT_SPECS
+A list of specs used to support configure-time default options (i.e.@:
+@option{--with} options) in the driver.  It should be a suitable initializer
+for an array of structures, each containing two strings, without the
+outermost pair of surrounding braces.
+
+The first item in the pair is the name of the default.  This must match
+the code in @file{config.gcc} for the target.  The second item is a spec
+to apply if a default with this name was specified.  The string
+@samp{%(VALUE)} in the spec will be replaced by the value of the default
+everywhere it occurs.
+
+The driver will apply these specs to its own command line between loading
+default @file{specs} files and processing @code{DRIVER_SELF_SPECS}, using
+the same mechanism as @code{DRIVER_SELF_SPECS}.
+
+Do not define this macro if it does not need to do anything.
+@end defmac
+
+@defmac CPP_SPEC
+A C string constant that tells the GCC driver program options to
+pass to CPP@.  It can also specify how to translate options you
+give to GCC into options for GCC to pass to the CPP@.
+
+Do not define this macro if it does not need to do anything.
+@end defmac
+
+@defmac CPLUSPLUS_CPP_SPEC
+This macro is just like @code{CPP_SPEC}, but is used for C++, rather
+than C@.  If you do not define this macro, then the value of
+@code{CPP_SPEC} (if any) will be used instead.
+@end defmac
+
+@defmac CC1_SPEC
+A C string constant that tells the GCC driver program options to
+pass to @code{cc1}, @code{cc1plus}, @code{f771}, and the other language
+front ends.
+It can also specify how to translate options you give to GCC into options
+for GCC to pass to front ends.
+
+Do not define this macro if it does not need to do anything.
+@end defmac
+
+@defmac CC1PLUS_SPEC
+A C string constant that tells the GCC driver program options to
+pass to @code{cc1plus}.  It can also specify how to translate options you
+give to GCC into options for GCC to pass to the @code{cc1plus}.
+
+Do not define this macro if it does not need to do anything.
+Note that everything defined in CC1_SPEC is already passed to
+@code{cc1plus} so there is no need to duplicate the contents of
+CC1_SPEC in CC1PLUS_SPEC@.
+@end defmac
+
+@defmac ASM_SPEC
+A C string constant that tells the GCC driver program options to
+pass to the assembler.  It can also specify how to translate options
+you give to GCC into options for GCC to pass to the assembler.
+See the file @file{sun3.h} for an example of this.
+
+Do not define this macro if it does not need to do anything.
+@end defmac
+
+@defmac ASM_FINAL_SPEC
+A C string constant that tells the GCC driver program how to
+run any programs which cleanup after the normal assembler.
+Normally, this is not needed.  See the file @file{mips.h} for
+an example of this.
+
+Do not define this macro if it does not need to do anything.
+@end defmac
+
+@defmac AS_NEEDS_DASH_FOR_PIPED_INPUT
+Define this macro, with no value, if the driver should give the assembler
+an argument consisting of a single dash, @option{-}, to instruct it to
+read from its standard input (which will be a pipe connected to the
+output of the compiler proper).  This argument is given after any
+@option{-o} option specifying the name of the output file.
+
+If you do not define this macro, the assembler is assumed to read its
+standard input if given no non-option arguments.  If your assembler
+cannot read standard input at all, use a @samp{%@{pipe:%e@}} construct;
+see @file{mips.h} for instance.
+@end defmac
+
+@defmac LINK_SPEC
+A C string constant that tells the GCC driver program options to
+pass to the linker.  It can also specify how to translate options you
+give to GCC into options for GCC to pass to the linker.
+
+Do not define this macro if it does not need to do anything.
+@end defmac
+
+@defmac LIB_SPEC
+Another C string constant used much like @code{LINK_SPEC}.  The difference
+between the two is that @code{LIB_SPEC} is used at the end of the
+command given to the linker.
+
+If this macro is not defined, a default is provided that
+loads the standard C library from the usual place.  See @file{gcc.c}.
+@end defmac
+
+@defmac LIBGCC_SPEC
+Another C string constant that tells the GCC driver program
+how and when to place a reference to @file{libgcc.a} into the
+linker command line.  This constant is placed both before and after
+the value of @code{LIB_SPEC}.
+
+If this macro is not defined, the GCC driver provides a default that
+passes the string @option{-lgcc} to the linker.
+@end defmac
+
+@defmac REAL_LIBGCC_SPEC
+By default, if @code{ENABLE_SHARED_LIBGCC} is defined, the
+@code{LIBGCC_SPEC} is not directly used by the driver program but is
+instead modified to refer to different versions of @file{libgcc.a}
+depending on the values of the command line flags @option{-static},
+@option{-shared}, @option{-static-libgcc}, and @option{-shared-libgcc}.  On
+targets where these modifications are inappropriate, define
+@code{REAL_LIBGCC_SPEC} instead.  @code{REAL_LIBGCC_SPEC} tells the
+driver how to place a reference to @file{libgcc} on the link command
+line, but, unlike @code{LIBGCC_SPEC}, it is used unmodified.
+@end defmac
+
+@defmac USE_LD_AS_NEEDED
+A macro that controls the modifications to @code{LIBGCC_SPEC}
+mentioned in @code{REAL_LIBGCC_SPEC}.  If nonzero, a spec will be
+generated that uses --as-needed and the shared libgcc in place of the
+static exception handler library, when linking without any of
+@code{-static}, @code{-static-libgcc}, or @code{-shared-libgcc}.
+@end defmac
+
+@defmac LINK_EH_SPEC
+If defined, this C string constant is added to @code{LINK_SPEC}.
+When @code{USE_LD_AS_NEEDED} is zero or undefined, it also affects
+the modifications to @code{LIBGCC_SPEC} mentioned in
+@code{REAL_LIBGCC_SPEC}.
+@end defmac
+
+@defmac STARTFILE_SPEC
+Another C string constant used much like @code{LINK_SPEC}.  The
+difference between the two is that @code{STARTFILE_SPEC} is used at
+the very beginning of the command given to the linker.
+
+If this macro is not defined, a default is provided that loads the
+standard C startup file from the usual place.  See @file{gcc.c}.
+@end defmac
+
+@defmac ENDFILE_SPEC
+Another C string constant used much like @code{LINK_SPEC}.  The
+difference between the two is that @code{ENDFILE_SPEC} is used at
+the very end of the command given to the linker.
+
+Do not define this macro if it does not need to do anything.
+@end defmac
+
+@defmac THREAD_MODEL_SPEC
+GCC @code{-v} will print the thread model GCC was configured to use.
+However, this doesn't work on platforms that are multilibbed on thread
+models, such as AIX 4.3.  On such platforms, define
+@code{THREAD_MODEL_SPEC} such that it evaluates to a string without
+blanks that names one of the recognized thread models.  @code{%*}, the
+default value of this macro, will expand to the value of
+@code{thread_file} set in @file{config.gcc}.
+@end defmac
+
+@defmac SYSROOT_SUFFIX_SPEC
+Define this macro to add a suffix to the target sysroot when GCC is
+configured with a sysroot.  This will cause GCC to search for usr/lib,
+et al, within sysroot+suffix.
+@end defmac
+
+@defmac SYSROOT_HEADERS_SUFFIX_SPEC
+Define this macro to add a headers_suffix to the target sysroot when
+GCC is configured with a sysroot.  This will cause GCC to pass the
+updated sysroot+headers_suffix to CPP, causing it to search for
+usr/include, et al, within sysroot+headers_suffix.
+@end defmac
+
+@defmac EXTRA_SPECS
+Define this macro to provide additional specifications to put in the
+@file{specs} file that can be used in various specifications like
+@code{CC1_SPEC}.
+
+The definition should be an initializer for an array of structures,
+containing a string constant, that defines the specification name, and a
+string constant that provides the specification.
+
+Do not define this macro if it does not need to do anything.
+
+@code{EXTRA_SPECS} is useful when an architecture contains several
+related targets, which have various @code{@dots{}_SPECS} which are similar
+to each other, and the maintainer would like one central place to keep
+these definitions.
+
+For example, the PowerPC System V.4 targets use @code{EXTRA_SPECS} to
+define either @code{_CALL_SYSV} when the System V calling sequence is
+used or @code{_CALL_AIX} when the older AIX-based calling sequence is
+used.
+
+The @file{config/rs6000/rs6000.h} target file defines:
+
+@smallexample
+#define EXTRA_SPECS \
+  @{ "cpp_sysv_default", CPP_SYSV_DEFAULT @},
+
+#define CPP_SYS_DEFAULT ""
+@end smallexample
+
+The @file{config/rs6000/sysv.h} target file defines:
+@smallexample
+#undef CPP_SPEC
+#define CPP_SPEC \
+"%@{posix: -D_POSIX_SOURCE @} \
+%@{mcall-sysv: -D_CALL_SYSV @} \
+%@{!mcall-sysv: %(cpp_sysv_default) @} \
+%@{msoft-float: -D_SOFT_FLOAT@} %@{mcpu=403: -D_SOFT_FLOAT@}"
+
+#undef CPP_SYSV_DEFAULT
+#define CPP_SYSV_DEFAULT "-D_CALL_SYSV"
+@end smallexample
+
+while the @file{config/rs6000/eabiaix.h} target file defines
+@code{CPP_SYSV_DEFAULT} as:
+
+@smallexample
+#undef CPP_SYSV_DEFAULT
+#define CPP_SYSV_DEFAULT "-D_CALL_AIX"
+@end smallexample
+@end defmac
+
+@defmac LINK_LIBGCC_SPECIAL_1
+Define this macro if the driver program should find the library
+@file{libgcc.a}.  If you do not define this macro, the driver program will pass
+the argument @option{-lgcc} to tell the linker to do the search.
+@end defmac
+
+@defmac LINK_GCC_C_SEQUENCE_SPEC
+The sequence in which libgcc and libc are specified to the linker.
+By default this is @code{%G %L %G}.
+@end defmac
+
+@defmac LINK_COMMAND_SPEC
+A C string constant giving the complete command line need to execute the
+linker.  When you do this, you will need to update your port each time a
+change is made to the link command line within @file{gcc.c}.  Therefore,
+define this macro only if you need to completely redefine the command
+line for invoking the linker and there is no other way to accomplish
+the effect you need.  Overriding this macro may be avoidable by overriding
+@code{LINK_GCC_C_SEQUENCE_SPEC} instead.
+@end defmac
+
+@defmac LINK_ELIMINATE_DUPLICATE_LDIRECTORIES
+A nonzero value causes @command{collect2} to remove duplicate @option{-L@var{directory}} search
+directories from linking commands.  Do not give it a nonzero value if
+removing duplicate search directories changes the linker's semantics.
+@end defmac
+
+@defmac MULTILIB_DEFAULTS
+Define this macro as a C expression for the initializer of an array of
+string to tell the driver program which options are defaults for this
+target and thus do not need to be handled specially when using
+@code{MULTILIB_OPTIONS}.
+
+Do not define this macro if @code{MULTILIB_OPTIONS} is not defined in
+the target makefile fragment or if none of the options listed in
+@code{MULTILIB_OPTIONS} are set by default.
+@xref{Target Fragment}.
+@end defmac
+
+@defmac RELATIVE_PREFIX_NOT_LINKDIR
+Define this macro to tell @command{gcc} that it should only translate
+a @option{-B} prefix into a @option{-L} linker option if the prefix
+indicates an absolute file name.
+@end defmac
+
+@defmac MD_EXEC_PREFIX
+If defined, this macro is an additional prefix to try after
+@code{STANDARD_EXEC_PREFIX}.  @code{MD_EXEC_PREFIX} is not searched
+when the compiler is built as a cross
+compiler.  If you define @code{MD_EXEC_PREFIX}, then be sure to add it
+to the list of directories used to find the assembler in @file{configure.in}.
+@end defmac
+
+@defmac STANDARD_STARTFILE_PREFIX
+Define this macro as a C string constant if you wish to override the
+standard choice of @code{libdir} as the default prefix to
+try when searching for startup files such as @file{crt0.o}.
+@code{STANDARD_STARTFILE_PREFIX} is not searched when the compiler
+is built as a cross compiler.
+@end defmac
+
+@defmac STANDARD_STARTFILE_PREFIX_1
+Define this macro as a C string constant if you wish to override the
+standard choice of @code{/lib} as a prefix to try after the default prefix
+when searching for startup files such as @file{crt0.o}.
+@code{STANDARD_STARTFILE_PREFIX_1} is not searched when the compiler
+is built as a cross compiler.
+@end defmac
+
+@defmac STANDARD_STARTFILE_PREFIX_2
+Define this macro as a C string constant if you wish to override the
+standard choice of @code{/lib} as yet another prefix to try after the
+default prefix when searching for startup files such as @file{crt0.o}.
+@code{STANDARD_STARTFILE_PREFIX_2} is not searched when the compiler
+is built as a cross compiler.
+@end defmac
+
+@defmac MD_STARTFILE_PREFIX
+If defined, this macro supplies an additional prefix to try after the
+standard prefixes.  @code{MD_EXEC_PREFIX} is not searched when the
+compiler is built as a cross compiler.
+@end defmac
+
+@defmac MD_STARTFILE_PREFIX_1
+If defined, this macro supplies yet another prefix to try after the
+standard prefixes.  It is not searched when the compiler is built as a
+cross compiler.
+@end defmac
+
+@defmac INIT_ENVIRONMENT
+Define this macro as a C string constant if you wish to set environment
+variables for programs called by the driver, such as the assembler and
+loader.  The driver passes the value of this macro to @code{putenv} to
+initialize the necessary environment variables.
+@end defmac
+
+@defmac LOCAL_INCLUDE_DIR
+Define this macro as a C string constant if you wish to override the
+standard choice of @file{/usr/local/include} as the default prefix to
+try when searching for local header files.  @code{LOCAL_INCLUDE_DIR}
+comes before @code{SYSTEM_INCLUDE_DIR} in the search order.
+
+Cross compilers do not search either @file{/usr/local/include} or its
+replacement.
+@end defmac
+
+@defmac SYSTEM_INCLUDE_DIR
+Define this macro as a C string constant if you wish to specify a
+system-specific directory to search for header files before the standard
+directory.  @code{SYSTEM_INCLUDE_DIR} comes before
+@code{STANDARD_INCLUDE_DIR} in the search order.
+
+Cross compilers do not use this macro and do not search the directory
+specified.
+@end defmac
+
+@defmac STANDARD_INCLUDE_DIR
+Define this macro as a C string constant if you wish to override the
+standard choice of @file{/usr/include} as the default prefix to
+try when searching for header files.
+
+Cross compilers ignore this macro and do not search either
+@file{/usr/include} or its replacement.
+@end defmac
+
+@defmac STANDARD_INCLUDE_COMPONENT
+The ``component'' corresponding to @code{STANDARD_INCLUDE_DIR}.
+See @code{INCLUDE_DEFAULTS}, below, for the description of components.
+If you do not define this macro, no component is used.
+@end defmac
+
+@defmac INCLUDE_DEFAULTS
+Define this macro if you wish to override the entire default search path
+for include files.  For a native compiler, the default search path
+usually consists of @code{GCC_INCLUDE_DIR}, @code{LOCAL_INCLUDE_DIR},
+@code{SYSTEM_INCLUDE_DIR}, @code{GPLUSPLUS_INCLUDE_DIR}, and
+@code{STANDARD_INCLUDE_DIR}.  In addition, @code{GPLUSPLUS_INCLUDE_DIR}
+and @code{GCC_INCLUDE_DIR} are defined automatically by @file{Makefile},
+and specify private search areas for GCC@.  The directory
+@code{GPLUSPLUS_INCLUDE_DIR} is used only for C++ programs.
+
+The definition should be an initializer for an array of structures.
+Each array element should have four elements: the directory name (a
+string constant), the component name (also a string constant), a flag
+for C++-only directories,
+and a flag showing that the includes in the directory don't need to be
+wrapped in @code{extern @samp{C}} when compiling C++.  Mark the end of
+the array with a null element.
+
+The component name denotes what GNU package the include file is part of,
+if any, in all uppercase letters.  For example, it might be @samp{GCC}
+or @samp{BINUTILS}.  If the package is part of a vendor-supplied
+operating system, code the component name as @samp{0}.
+
+For example, here is the definition used for VAX/VMS:
+
+@smallexample
+#define INCLUDE_DEFAULTS \
+@{                                       \
+  @{ "GNU_GXX_INCLUDE:", "G++", 1, 1@},   \
+  @{ "GNU_CC_INCLUDE:", "GCC", 0, 0@},    \
+  @{ "SYS$SYSROOT:[SYSLIB.]", 0, 0, 0@},  \
+  @{ ".", 0, 0, 0@},                      \
+  @{ 0, 0, 0, 0@}                         \
+@}
+@end smallexample
+@end defmac
+
+Here is the order of prefixes tried for exec files:
+
+@enumerate
+@item
+Any prefixes specified by the user with @option{-B}.
+
+@item
+The environment variable @code{GCC_EXEC_PREFIX} or, if @code{GCC_EXEC_PREFIX}
+is not set and the compiler has not been installed in the configure-time 
+@var{prefix}, the location in which the compiler has actually been installed.
+
+@item
+The directories specified by the environment variable @code{COMPILER_PATH}.
+
+@item
+The macro @code{STANDARD_EXEC_PREFIX}, if the compiler has been installed
+in the configured-time @var{prefix}. 
+
+@item
+The location @file{/usr/libexec/gcc/}, but only if this is a native compiler. 
+
+@item
+The location @file{/usr/lib/gcc/}, but only if this is a native compiler. 
+
+@item
+The macro @code{MD_EXEC_PREFIX}, if defined, but only if this is a native 
+compiler.
+@end enumerate
+
+Here is the order of prefixes tried for startfiles:
+
+@enumerate
+@item
+Any prefixes specified by the user with @option{-B}.
+
+@item
+The environment variable @code{GCC_EXEC_PREFIX} or its automatically determined
+value based on the installed toolchain location.
+
+@item
+The directories specified by the environment variable @code{LIBRARY_PATH}
+(or port-specific name; native only, cross compilers do not use this).
+
+@item
+The macro @code{STANDARD_EXEC_PREFIX}, but only if the toolchain is installed
+in the configured @var{prefix} or this is a native compiler. 
+
+@item
+The location @file{/usr/lib/gcc/}, but only if this is a native compiler.
+
+@item
+The macro @code{MD_EXEC_PREFIX}, if defined, but only if this is a native 
+compiler.
+
+@item
+The macro @code{MD_STARTFILE_PREFIX}, if defined, but only if this is a 
+native compiler, or we have a target system root.
+
+@item
+The macro @code{MD_STARTFILE_PREFIX_1}, if defined, but only if this is a 
+native compiler, or we have a target system root.
+
+@item
+The macro @code{STANDARD_STARTFILE_PREFIX}, with any sysroot modifications.
+If this path is relative it will be prefixed by @code{GCC_EXEC_PREFIX} and
+the machine suffix or @code{STANDARD_EXEC_PREFIX} and the machine suffix.
+
+@item
+The macro @code{STANDARD_STARTFILE_PREFIX_1}, but only if this is a native
+compiler, or we have a target system root. The default for this macro is
+@file{/lib/}.
+
+@item
+The macro @code{STANDARD_STARTFILE_PREFIX_2}, but only if this is a native
+compiler, or we have a target system root. The default for this macro is
+@file{/usr/lib/}.
+@end enumerate
+
+@node Run-time Target
+@section Run-time Target Specification
+@cindex run-time target specification
+@cindex predefined macros
+@cindex target specifications
+
+@c prevent bad page break with this line
+Here are run-time target specifications.
+
+@defmac TARGET_CPU_CPP_BUILTINS ()
+This function-like macro expands to a block of code that defines
+built-in preprocessor macros and assertions for the target CPU, using
+the functions @code{builtin_define}, @code{builtin_define_std} and
+@code{builtin_assert}.  When the front end
+calls this macro it provides a trailing semicolon, and since it has
+finished command line option processing your code can use those
+results freely.
+
+@code{builtin_assert} takes a string in the form you pass to the
+command-line option @option{-A}, such as @code{cpu=mips}, and creates
+the assertion.  @code{builtin_define} takes a string in the form
+accepted by option @option{-D} and unconditionally defines the macro.
+
+@code{builtin_define_std} takes a string representing the name of an
+object-like macro.  If it doesn't lie in the user's namespace,
+@code{builtin_define_std} defines it unconditionally.  Otherwise, it
+defines a version with two leading underscores, and another version
+with two leading and trailing underscores, and defines the original
+only if an ISO standard was not requested on the command line.  For
+example, passing @code{unix} defines @code{__unix}, @code{__unix__}
+and possibly @code{unix}; passing @code{_mips} defines @code{__mips},
+@code{__mips__} and possibly @code{_mips}, and passing @code{_ABI64}
+defines only @code{_ABI64}.
+
+You can also test for the C dialect being compiled.  The variable
+@code{c_language} is set to one of @code{clk_c}, @code{clk_cplusplus}
+or @code{clk_objective_c}.  Note that if we are preprocessing
+assembler, this variable will be @code{clk_c} but the function-like
+macro @code{preprocessing_asm_p()} will return true, so you might want
+to check for that first.  If you need to check for strict ANSI, the
+variable @code{flag_iso} can be used.  The function-like macro
+@code{preprocessing_trad_p()} can be used to check for traditional
+preprocessing.
+@end defmac
+
+@defmac TARGET_OS_CPP_BUILTINS ()
+Similarly to @code{TARGET_CPU_CPP_BUILTINS} but this macro is optional
+and is used for the target operating system instead.
+@end defmac
+
+@defmac TARGET_OBJFMT_CPP_BUILTINS ()
+Similarly to @code{TARGET_CPU_CPP_BUILTINS} but this macro is optional
+and is used for the target object format.  @file{elfos.h} uses this
+macro to define @code{__ELF__}, so you probably do not need to define
+it yourself.
+@end defmac
+
+@deftypevar {extern int} target_flags
+This variable is declared in @file{options.h}, which is included before
+any target-specific headers.
+@end deftypevar
+
+@hook TARGET_DEFAULT_TARGET_FLAGS
+This variable specifies the initial value of @code{target_flags}.
+Its default setting is 0.
+@end deftypevr
+
+@cindex optional hardware or system features
+@cindex features, optional, in system conventions
+
+@hook TARGET_HANDLE_OPTION
+This hook is called whenever the user specifies one of the
+target-specific options described by the @file{.opt} definition files
+(@pxref{Options}).  It has the opportunity to do some option-specific
+processing and should return true if the option is valid.  The default
+definition does nothing but return true.
+
+@var{code} specifies the @code{OPT_@var{name}} enumeration value
+associated with the selected option; @var{name} is just a rendering of
+the option name in which non-alphanumeric characters are replaced by
+underscores.  @var{arg} specifies the string argument and is null if
+no argument was given.  If the option is flagged as a @code{UInteger}
+(@pxref{Option properties}), @var{value} is the numeric value of the
+argument.  Otherwise @var{value} is 1 if the positive form of the
+option was used and 0 if the ``no-'' form was.
+@end deftypefn
+
+@hook TARGET_HANDLE_C_OPTION
+This target hook is called whenever the user specifies one of the
+target-specific C language family options described by the @file{.opt}
+definition files(@pxref{Options}).  It has the opportunity to do some
+option-specific processing and should return true if the option is
+valid.  The arguments are like for @code{TARGET_HANDLE_OPTION}.  The
+default definition does nothing but return false.
+
+In general, you should use @code{TARGET_HANDLE_OPTION} to handle
+options.  However, if processing an option requires routines that are
+only available in the C (and related language) front ends, then you
+should use @code{TARGET_HANDLE_C_OPTION} instead.
+@end deftypefn
+
+@hook TARGET_OBJC_CONSTRUCT_STRING_OBJECT
+
+@hook TARGET_STRING_OBJECT_REF_TYPE_P
+
+@hook TARGET_CHECK_STRING_OBJECT_FORMAT_ARG
+
+@defmac TARGET_VERSION
+This macro is a C statement to print on @code{stderr} a string
+describing the particular machine description choice.  Every machine
+description should define @code{TARGET_VERSION}.  For example:
+
+@smallexample
+#ifdef MOTOROLA
+#define TARGET_VERSION \
+  fprintf (stderr, " (68k, Motorola syntax)");
+#else
+#define TARGET_VERSION \
+  fprintf (stderr, " (68k, MIT syntax)");
+#endif
+@end smallexample
+@end defmac
+
+@hook TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE
+This target function is similar to the hook @code{TARGET_OPTION_OVERRIDE}
+but is called when the optimize level is changed via an attribute or
+pragma or when it is reset at the end of the code affected by the
+attribute or pragma.  It is not called at the beginning of compilation
+when @code{TARGET_OPTION_OVERRIDE} is called so if you want to perform these
+actions then, you should have @code{TARGET_OPTION_OVERRIDE} call
+@code{TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE}.
+@end deftypefn
+
+@defmac C_COMMON_OVERRIDE_OPTIONS
+This is similar to the @code{TARGET_OPTION_OVERRIDE} hook
+but is only used in the C
+language frontends (C, Objective-C, C++, Objective-C++) and so can be
+used to alter option flag variables which only exist in those
+frontends.
+@end defmac
+
+@hook TARGET_OPTION_OPTIMIZATION_TABLE
+Some machines may desire to change what optimizations are performed for
+various optimization levels.   This variable, if defined, describes
+options to enable at particular sets of optimization levels.  These
+options are processed once
+just after the optimization level is determined and before the remainder
+of the command options have been parsed, so may be overridden by other
+options passed explicitly.
+
+This processing is run once at program startup and when the optimization
+options are changed via @code{#pragma GCC optimize} or by using the
+@code{optimize} attribute.
+@end deftypevr
+
+@hook TARGET_OPTION_INIT_STRUCT
+
+@hook TARGET_OPTION_DEFAULT_PARAMS
+
+@hook TARGET_HELP
+This hook is called in response to the user invoking
+@option{--target-help} on the command line.  It gives the target a
+chance to display extra information on the target specific command
+line options found in its @file{.opt} file.
+@end deftypefn
+
+@defmac SWITCHABLE_TARGET
+Some targets need to switch between substantially different subtargets
+during compilation.  For example, the MIPS target has one subtarget for
+the traditional MIPS architecture and another for MIPS16.  Source code
+can switch between these two subarchitectures using the @code{mips16}
+and @code{nomips16} attributes.
+
+Such subtargets can differ in things like the set of available
+registers, the set of available instructions, the costs of various
+operations, and so on.  GCC caches a lot of this type of information
+in global variables, and recomputing them for each subtarget takes a
+significant amount of time.  The compiler therefore provides a facility
+for maintaining several versions of the global variables and quickly
+switching between them; see @file{target-globals.h} for details.
+
+Define this macro to 1 if your target needs this facility.  The default
+is 0.
+@end defmac
+
+@node Per-Function Data
+@section Defining data structures for per-function information.
+@cindex per-function data
+@cindex data structures
+
+If the target needs to store information on a per-function basis, GCC
+provides a macro and a couple of variables to allow this.  Note, just
+using statics to store the information is a bad idea, since GCC supports
+nested functions, so you can be halfway through encoding one function
+when another one comes along.
+
+GCC defines a data structure called @code{struct function} which
+contains all of the data specific to an individual function.  This
+structure contains a field called @code{machine} whose type is
+@code{struct machine_function *}, which can be used by targets to point
+to their own specific data.
+
+If a target needs per-function specific data it should define the type
+@code{struct machine_function} and also the macro @code{INIT_EXPANDERS}.
+This macro should be used to initialize the function pointer
+@code{init_machine_status}.  This pointer is explained below.
+
+One typical use of per-function, target specific data is to create an
+RTX to hold the register containing the function's return address.  This
+RTX can then be used to implement the @code{__builtin_return_address}
+function, for level 0.
+
+Note---earlier implementations of GCC used a single data area to hold
+all of the per-function information.  Thus when processing of a nested
+function began the old per-function data had to be pushed onto a
+stack, and when the processing was finished, it had to be popped off the
+stack.  GCC used to provide function pointers called
+@code{save_machine_status} and @code{restore_machine_status} to handle
+the saving and restoring of the target specific information.  Since the
+single data area approach is no longer used, these pointers are no
+longer supported.
+
+@defmac INIT_EXPANDERS
+Macro called to initialize any target specific information.  This macro
+is called once per function, before generation of any RTL has begun.
+The intention of this macro is to allow the initialization of the
+function pointer @code{init_machine_status}.
+@end defmac
+
+@deftypevar {void (*)(struct function *)} init_machine_status
+If this function pointer is non-@code{NULL} it will be called once per
+function, before function compilation starts, in order to allow the
+target to perform any target specific initialization of the
+@code{struct function} structure.  It is intended that this would be
+used to initialize the @code{machine} of that structure.
+
+@code{struct machine_function} structures are expected to be freed by GC@.
+Generally, any memory that they reference must be allocated by using
+GC allocation, including the structure itself.
+@end deftypevar
+
+@node Storage Layout
+@section Storage Layout
+@cindex storage layout
+
+Note that the definitions of the macros in this table which are sizes or
+alignments measured in bits do not need to be constant.  They can be C
+expressions that refer to static variables, such as the @code{target_flags}.
+@xref{Run-time Target}.
+
+@defmac BITS_BIG_ENDIAN
+Define this macro to have the value 1 if the most significant bit in a
+byte has the lowest number; otherwise define it to have the value zero.
+This means that bit-field instructions count from the most significant
+bit.  If the machine has no bit-field instructions, then this must still
+be defined, but it doesn't matter which value it is defined to.  This
+macro need not be a constant.
+
+This macro does not affect the way structure fields are packed into
+bytes or words; that is controlled by @code{BYTES_BIG_ENDIAN}.
+@end defmac
+
+@defmac BYTES_BIG_ENDIAN
+Define this macro to have the value 1 if the most significant byte in a
+word has the lowest number.  This macro need not be a constant.
+@end defmac
+
+@defmac WORDS_BIG_ENDIAN
+Define this macro to have the value 1 if, in a multiword object, the
+most significant word has the lowest number.  This applies to both
+memory locations and registers; GCC fundamentally assumes that the
+order of words in memory is the same as the order in registers.  This
+macro need not be a constant.
+@end defmac
+
+@defmac FLOAT_WORDS_BIG_ENDIAN
+Define this macro to have the value 1 if @code{DFmode}, @code{XFmode} or
+@code{TFmode} floating point numbers are stored in memory with the word
+containing the sign bit at the lowest address; otherwise define it to
+have the value 0.  This macro need not be a constant.
+
+You need not define this macro if the ordering is the same as for
+multi-word integers.
+@end defmac
+
+@defmac BITS_PER_UNIT
+Define this macro to be the number of bits in an addressable storage
+unit (byte).  If you do not define this macro the default is 8.
+@end defmac
+
+@defmac BITS_PER_WORD
+Number of bits in a word.  If you do not define this macro, the default
+is @code{BITS_PER_UNIT * UNITS_PER_WORD}.
+@end defmac
+
+@defmac MAX_BITS_PER_WORD
+Maximum number of bits in a word.  If this is undefined, the default is
+@code{BITS_PER_WORD}.  Otherwise, it is the constant value that is the
+largest value that @code{BITS_PER_WORD} can have at run-time.
+@end defmac
+
+@defmac UNITS_PER_WORD
+Number of storage units in a word; normally the size of a general-purpose
+register, a power of two from 1 or 8.
+@end defmac
+
+@defmac MIN_UNITS_PER_WORD
+Minimum number of units in a word.  If this is undefined, the default is
+@code{UNITS_PER_WORD}.  Otherwise, it is the constant value that is the
+smallest value that @code{UNITS_PER_WORD} can have at run-time.
+@end defmac
+
+@defmac POINTER_SIZE
+Width of a pointer, in bits.  You must specify a value no wider than the
+width of @code{Pmode}.  If it is not equal to the width of @code{Pmode},
+you must define @code{POINTERS_EXTEND_UNSIGNED}.  If you do not specify
+a value the default is @code{BITS_PER_WORD}.
+@end defmac
+
+@defmac POINTERS_EXTEND_UNSIGNED
+A C expression that determines how pointers should be extended from
+@code{ptr_mode} to either @code{Pmode} or @code{word_mode}.  It is
+greater than zero if pointers should be zero-extended, zero if they
+should be sign-extended, and negative if some other sort of conversion
+is needed.  In the last case, the extension is done by the target's
+@code{ptr_extend} instruction.
+
+You need not define this macro if the @code{ptr_mode}, @code{Pmode}
+and @code{word_mode} are all the same width.
+@end defmac
+
+@defmac PROMOTE_MODE (@var{m}, @var{unsignedp}, @var{type})
+A macro to update @var{m} and @var{unsignedp} when an object whose type
+is @var{type} and which has the specified mode and signedness is to be
+stored in a register.  This macro is only called when @var{type} is a
+scalar type.
+
+On most RISC machines, which only have operations that operate on a full
+register, define this macro to set @var{m} to @code{word_mode} if
+@var{m} is an integer mode narrower than @code{BITS_PER_WORD}.  In most
+cases, only integer modes should be widened because wider-precision
+floating-point operations are usually more expensive than their narrower
+counterparts.
+
+For most machines, the macro definition does not change @var{unsignedp}.
+However, some machines, have instructions that preferentially handle
+either signed or unsigned quantities of certain modes.  For example, on
+the DEC Alpha, 32-bit loads from memory and 32-bit add instructions
+sign-extend the result to 64 bits.  On such machines, set
+@var{unsignedp} according to which kind of extension is more efficient.
+
+Do not define this macro if it would never modify @var{m}.
+@end defmac
+
+@hook TARGET_PROMOTE_FUNCTION_MODE
+Like @code{PROMOTE_MODE}, but it is applied to outgoing function arguments or
+function return values.  The target hook should return the new mode
+and possibly change @code{*@var{punsignedp}} if the promotion should
+change signedness.  This function is called only for scalar @emph{or
+pointer} types.
+
+@var{for_return} allows to distinguish the promotion of arguments and
+return values.  If it is @code{1}, a return value is being promoted and
+@code{TARGET_FUNCTION_VALUE} must perform the same promotions done here.
+If it is @code{2}, the returned mode should be that of the register in
+which an incoming parameter is copied, or the outgoing result is computed;
+then the hook should return the same mode as @code{promote_mode}, though
+the signedness may be different.
+
+The default is to not promote arguments and return values.  You can
+also define the hook to @code{default_promote_function_mode_always_promote}
+if you would like to apply the same rules given by @code{PROMOTE_MODE}.
+@end deftypefn
+
+@defmac PARM_BOUNDARY
+Normal alignment required for function parameters on the stack, in
+bits.  All stack parameters receive at least this much alignment
+regardless of data type.  On most machines, this is the same as the
+size of an integer.
+@end defmac
+
+@defmac STACK_BOUNDARY
+Define this macro to the minimum alignment enforced by hardware for the
+stack pointer on this machine.  The definition is a C expression for the
+desired alignment (measured in bits).  This value is used as a default
+if @code{PREFERRED_STACK_BOUNDARY} is not defined.  On most machines,
+this should be the same as @code{PARM_BOUNDARY}.
+@end defmac
+
+@defmac PREFERRED_STACK_BOUNDARY
+Define this macro if you wish to preserve a certain alignment for the
+stack pointer, greater than what the hardware enforces.  The definition
+is a C expression for the desired alignment (measured in bits).  This
+macro must evaluate to a value equal to or larger than
+@code{STACK_BOUNDARY}.
+@end defmac
+
+@defmac INCOMING_STACK_BOUNDARY
+Define this macro if the incoming stack boundary may be different
+from @code{PREFERRED_STACK_BOUNDARY}.  This macro must evaluate
+to a value equal to or larger than @code{STACK_BOUNDARY}.
+@end defmac
+
+@defmac FUNCTION_BOUNDARY
+Alignment required for a function entry point, in bits.
+@end defmac
+
+@defmac BIGGEST_ALIGNMENT
+Biggest alignment that any data type can require on this machine, in
+bits.  Note that this is not the biggest alignment that is supported,
+just the biggest alignment that, when violated, may cause a fault.
+@end defmac
+
+@defmac MALLOC_ABI_ALIGNMENT
+Alignment, in bits, a C conformant malloc implementation has to
+provide.  If not defined, the default value is @code{BITS_PER_WORD}.
+@end defmac
+
+@defmac ATTRIBUTE_ALIGNED_VALUE
+Alignment used by the @code{__attribute__ ((aligned))} construct.  If
+not defined, the default value is @code{BIGGEST_ALIGNMENT}.
+@end defmac
+
+@defmac MINIMUM_ATOMIC_ALIGNMENT
+If defined, the smallest alignment, in bits, that can be given to an
+object that can be referenced in one operation, without disturbing any
+nearby object.  Normally, this is @code{BITS_PER_UNIT}, but may be larger
+on machines that don't have byte or half-word store operations.
+@end defmac
+
+@defmac BIGGEST_FIELD_ALIGNMENT
+Biggest alignment that any structure or union field can require on this
+machine, in bits.  If defined, this overrides @code{BIGGEST_ALIGNMENT} for
+structure and union fields only, unless the field alignment has been set
+by the @code{__attribute__ ((aligned (@var{n})))} construct.
+@end defmac
+
+@defmac ADJUST_FIELD_ALIGN (@var{field}, @var{computed})
+An expression for the alignment of a structure field @var{field} if the
+alignment computed in the usual way (including applying of
+@code{BIGGEST_ALIGNMENT} and @code{BIGGEST_FIELD_ALIGNMENT} to the
+alignment) is @var{computed}.  It overrides alignment only if the
+field alignment has not been set by the
+@code{__attribute__ ((aligned (@var{n})))} construct.
+@end defmac
+
+@defmac MAX_STACK_ALIGNMENT
+Biggest stack alignment guaranteed by the backend.  Use this macro
+to specify the maximum alignment of a variable on stack.
+
+If not defined, the default value is @code{STACK_BOUNDARY}.
+
+@c FIXME: The default should be @code{PREFERRED_STACK_BOUNDARY}.
+@c But the fix for PR 32893 indicates that we can only guarantee
+@c maximum stack alignment on stack up to @code{STACK_BOUNDARY}, not
+@c @code{PREFERRED_STACK_BOUNDARY}, if stack alignment isn't supported.
+@end defmac
+
+@defmac MAX_OFILE_ALIGNMENT
+Biggest alignment supported by the object file format of this machine.
+Use this macro to limit the alignment which can be specified using the
+@code{__attribute__ ((aligned (@var{n})))} construct.  If not defined,
+the default value is @code{BIGGEST_ALIGNMENT}.
+
+On systems that use ELF, the default (in @file{config/elfos.h}) is
+the largest supported 32-bit ELF section alignment representable on
+a 32-bit host e.g. @samp{(((unsigned HOST_WIDEST_INT) 1 << 28) * 8)}.
+On 32-bit ELF the largest supported section alignment in bits is
+@samp{(0x80000000 * 8)}, but this is not representable on 32-bit hosts.
+@end defmac
+
+@defmac DATA_ALIGNMENT (@var{type}, @var{basic-align})
+If defined, a C expression to compute the alignment for a variable in
+the static store.  @var{type} is the data type, and @var{basic-align} is
+the alignment that the object would ordinarily have.  The value of this
+macro is used instead of that alignment to align the object.
+
+If this macro is not defined, then @var{basic-align} is used.
+
+@findex strcpy
+One use of this macro is to increase alignment of medium-size data to
+make it all fit in fewer cache lines.  Another is to cause character
+arrays to be word-aligned so that @code{strcpy} calls that copy
+constants to character arrays can be done inline.
+@end defmac
+
+@defmac CONSTANT_ALIGNMENT (@var{constant}, @var{basic-align})
+If defined, a C expression to compute the alignment given to a constant
+that is being placed in memory.  @var{constant} is the constant and
+@var{basic-align} is the alignment that the object would ordinarily
+have.  The value of this macro is used instead of that alignment to
+align the object.
+
+If this macro is not defined, then @var{basic-align} is used.
+
+The typical use of this macro is to increase alignment for string
+constants to be word aligned so that @code{strcpy} calls that copy
+constants can be done inline.
+@end defmac
+
+@defmac LOCAL_ALIGNMENT (@var{type}, @var{basic-align})
+If defined, a C expression to compute the alignment for a variable in
+the local store.  @var{type} is the data type, and @var{basic-align} is
+the alignment that the object would ordinarily have.  The value of this
+macro is used instead of that alignment to align the object.
+
+If this macro is not defined, then @var{basic-align} is used.
+
+One use of this macro is to increase alignment of medium-size data to
+make it all fit in fewer cache lines.
+
+If the value of this macro has a type, it should be an unsigned type.
+@end defmac
+
+@hook TARGET_VECTOR_ALIGNMENT
+
+@defmac STACK_SLOT_ALIGNMENT (@var{type}, @var{mode}, @var{basic-align})
+If defined, a C expression to compute the alignment for stack slot.
+@var{type} is the data type, @var{mode} is the widest mode available,
+and @var{basic-align} is the alignment that the slot would ordinarily
+have.  The value of this macro is used instead of that alignment to
+align the slot.
+
+If this macro is not defined, then @var{basic-align} is used when
+@var{type} is @code{NULL}.  Otherwise, @code{LOCAL_ALIGNMENT} will
+be used.
+
+This macro is to set alignment of stack slot to the maximum alignment
+of all possible modes which the slot may have.
+
+If the value of this macro has a type, it should be an unsigned type.
+@end defmac
+
+@defmac LOCAL_DECL_ALIGNMENT (@var{decl})
+If defined, a C expression to compute the alignment for a local
+variable @var{decl}.
+
+If this macro is not defined, then
+@code{LOCAL_ALIGNMENT (TREE_TYPE (@var{decl}), DECL_ALIGN (@var{decl}))}
+is used.
+
+One use of this macro is to increase alignment of medium-size data to
+make it all fit in fewer cache lines.
+
+If the value of this macro has a type, it should be an unsigned type.
+@end defmac
+
+@defmac MINIMUM_ALIGNMENT (@var{exp}, @var{mode}, @var{align})
+If defined, a C expression to compute the minimum required alignment
+for dynamic stack realignment purposes for @var{exp} (a type or decl),
+@var{mode}, assuming normal alignment @var{align}.
+
+If this macro is not defined, then @var{align} will be used.
+@end defmac
+
+@defmac EMPTY_FIELD_BOUNDARY
+Alignment in bits to be given to a structure bit-field that follows an
+empty field such as @code{int : 0;}.
+
+If @code{PCC_BITFIELD_TYPE_MATTERS} is true, it overrides this macro.
+@end defmac
+
+@defmac STRUCTURE_SIZE_BOUNDARY
+Number of bits which any structure or union's size must be a multiple of.
+Each structure or union's size is rounded up to a multiple of this.
+
+If you do not define this macro, the default is the same as
+@code{BITS_PER_UNIT}.
+@end defmac
+
+@defmac STRICT_ALIGNMENT
+Define this macro to be the value 1 if instructions will fail to work
+if given data not on the nominal alignment.  If instructions will merely
+go slower in that case, define this macro as 0.
+@end defmac
+
+@defmac PCC_BITFIELD_TYPE_MATTERS
+Define this if you wish to imitate the way many other C compilers handle
+alignment of bit-fields and the structures that contain them.
+
+The behavior is that the type written for a named bit-field (@code{int},
+@code{short}, or other integer type) imposes an alignment for the entire
+structure, as if the structure really did contain an ordinary field of
+that type.  In addition, the bit-field is placed within the structure so
+that it would fit within such a field, not crossing a boundary for it.
+
+Thus, on most machines, a named bit-field whose type is written as
+@code{int} would not cross a four-byte boundary, and would force
+four-byte alignment for the whole structure.  (The alignment used may
+not be four bytes; it is controlled by the other alignment parameters.)
+
+An unnamed bit-field will not affect the alignment of the containing
+structure.
+
+If the macro is defined, its definition should be a C expression;
+a nonzero value for the expression enables this behavior.
+
+Note that if this macro is not defined, or its value is zero, some
+bit-fields may cross more than one alignment boundary.  The compiler can
+support such references if there are @samp{insv}, @samp{extv}, and
+@samp{extzv} insns that can directly reference memory.
+
+The other known way of making bit-fields work is to define
+@code{STRUCTURE_SIZE_BOUNDARY} as large as @code{BIGGEST_ALIGNMENT}.
+Then every structure can be accessed with fullwords.
+
+Unless the machine has bit-field instructions or you define
+@code{STRUCTURE_SIZE_BOUNDARY} that way, you must define
+@code{PCC_BITFIELD_TYPE_MATTERS} to have a nonzero value.
+
+If your aim is to make GCC use the same conventions for laying out
+bit-fields as are used by another compiler, here is how to investigate
+what the other compiler does.  Compile and run this program:
+
+@smallexample
+struct foo1
+@{
+  char x;
+  char :0;
+  char y;
+@};
+
+struct foo2
+@{
+  char x;
+  int :0;
+  char y;
+@};
+
+main ()
+@{
+  printf ("Size of foo1 is %d\n",
+          sizeof (struct foo1));
+  printf ("Size of foo2 is %d\n",
+          sizeof (struct foo2));
+  exit (0);
+@}
+@end smallexample
+
+If this prints 2 and 5, then the compiler's behavior is what you would
+get from @code{PCC_BITFIELD_TYPE_MATTERS}.
+@end defmac
+
+@defmac BITFIELD_NBYTES_LIMITED
+Like @code{PCC_BITFIELD_TYPE_MATTERS} except that its effect is limited
+to aligning a bit-field within the structure.
+@end defmac
+
+@hook TARGET_ALIGN_ANON_BITFIELD
+When @code{PCC_BITFIELD_TYPE_MATTERS} is true this hook will determine
+whether unnamed bitfields affect the alignment of the containing
+structure.  The hook should return true if the structure should inherit
+the alignment requirements of an unnamed bitfield's type.
+@end deftypefn
+
+@hook TARGET_NARROW_VOLATILE_BITFIELD
+This target hook should return @code{true} if accesses to volatile bitfields
+should use the narrowest mode possible.  It should return @code{false} if
+these accesses should use the bitfield container type.
+
+The default is @code{!TARGET_STRICT_ALIGN}.
+@end deftypefn
+
+@defmac MEMBER_TYPE_FORCES_BLK (@var{field}, @var{mode})
+Return 1 if a structure or array containing @var{field} should be accessed using
+@code{BLKMODE}.
+
+If @var{field} is the only field in the structure, @var{mode} is its
+mode, otherwise @var{mode} is VOIDmode.  @var{mode} is provided in the
+case where structures of one field would require the structure's mode to
+retain the field's mode.
+
+Normally, this is not needed.
+@end defmac
+
+@defmac ROUND_TYPE_ALIGN (@var{type}, @var{computed}, @var{specified})
+Define this macro as an expression for the alignment of a type (given
+by @var{type} as a tree node) if the alignment computed in the usual
+way is @var{computed} and the alignment explicitly specified was
+@var{specified}.
+
+The default is to use @var{specified} if it is larger; otherwise, use
+the smaller of @var{computed} and @code{BIGGEST_ALIGNMENT}
+@end defmac
+
+@defmac MAX_FIXED_MODE_SIZE
+An integer expression for the size in bits of the largest integer
+machine mode that should actually be used.  All integer machine modes of
+this size or smaller can be used for structures and unions with the
+appropriate sizes.  If this macro is undefined, @code{GET_MODE_BITSIZE
+(DImode)} is assumed.
+@end defmac
+
+@defmac STACK_SAVEAREA_MODE (@var{save_level})
+If defined, an expression of type @code{enum machine_mode} that
+specifies the mode of the save area operand of a
+@code{save_stack_@var{level}} named pattern (@pxref{Standard Names}).
+@var{save_level} is one of @code{SAVE_BLOCK}, @code{SAVE_FUNCTION}, or
+@code{SAVE_NONLOCAL} and selects which of the three named patterns is
+having its mode specified.
+
+You need not define this macro if it always returns @code{Pmode}.  You
+would most commonly define this macro if the
+@code{save_stack_@var{level}} patterns need to support both a 32- and a
+64-bit mode.
+@end defmac
+
+@defmac STACK_SIZE_MODE
+If defined, an expression of type @code{enum machine_mode} that
+specifies the mode of the size increment operand of an
+@code{allocate_stack} named pattern (@pxref{Standard Names}).
+
+You need not define this macro if it always returns @code{word_mode}.
+You would most commonly define this macro if the @code{allocate_stack}
+pattern needs to support both a 32- and a 64-bit mode.
+@end defmac
+
+@hook TARGET_LIBGCC_CMP_RETURN_MODE
+This target hook should return the mode to be used for the return value
+of compare instructions expanded to libgcc calls.  If not defined
+@code{word_mode} is returned which is the right choice for a majority of
+targets.
+@end deftypefn
+
+@hook TARGET_LIBGCC_SHIFT_COUNT_MODE
+This target hook should return the mode to be used for the shift count operand
+of shift instructions expanded to libgcc calls.  If not defined
+@code{word_mode} is returned which is the right choice for a majority of
+targets.
+@end deftypefn
+
+@hook TARGET_UNWIND_WORD_MODE
+Return machine mode to be used for @code{_Unwind_Word} type.
+The default is to use @code{word_mode}.
+@end deftypefn
+
+@defmac ROUND_TOWARDS_ZERO
+If defined, this macro should be true if the prevailing rounding
+mode is towards zero.
+
+Defining this macro only affects the way @file{libgcc.a} emulates
+floating-point arithmetic.
+
+Not defining this macro is equivalent to returning zero.
+@end defmac
+
+@defmac LARGEST_EXPONENT_IS_NORMAL (@var{size})
+This macro should return true if floats with @var{size}
+bits do not have a NaN or infinity representation, but use the largest
+exponent for normal numbers instead.
+
+Defining this macro only affects the way @file{libgcc.a} emulates
+floating-point arithmetic.
+
+The default definition of this macro returns false for all sizes.
+@end defmac
+
+@hook TARGET_MS_BITFIELD_LAYOUT_P
+This target hook returns @code{true} if bit-fields in the given
+@var{record_type} are to be laid out following the rules of Microsoft
+Visual C/C++, namely: (i) a bit-field won't share the same storage
+unit with the previous bit-field if their underlying types have
+different sizes, and the bit-field will be aligned to the highest
+alignment of the underlying types of itself and of the previous
+bit-field; (ii) a zero-sized bit-field will affect the alignment of
+the whole enclosing structure, even if it is unnamed; except that
+(iii) a zero-sized bit-field will be disregarded unless it follows
+another bit-field of nonzero size.  If this hook returns @code{true},
+other macros that control bit-field layout are ignored.
+
+When a bit-field is inserted into a packed record, the whole size
+of the underlying type is used by one or more same-size adjacent
+bit-fields (that is, if its long:3, 32 bits is used in the record,
+and any additional adjacent long bit-fields are packed into the same
+chunk of 32 bits.  However, if the size changes, a new field of that
+size is allocated).  In an unpacked record, this is the same as using
+alignment, but not equivalent when packing.
+
+If both MS bit-fields and @samp{__attribute__((packed))} are used,
+the latter will take precedence.  If @samp{__attribute__((packed))} is
+used on a single field when MS bit-fields are in use, it will take
+precedence for that field, but the alignment of the rest of the structure
+may affect its placement.
+@end deftypefn
+
+@hook TARGET_DECIMAL_FLOAT_SUPPORTED_P
+Returns true if the target supports decimal floating point.
+@end deftypefn
+
+@hook TARGET_FIXED_POINT_SUPPORTED_P
+Returns true if the target supports fixed-point arithmetic.
+@end deftypefn
+
+@hook TARGET_EXPAND_TO_RTL_HOOK
+This hook is called just before expansion into rtl, allowing the target
+to perform additional initializations or analysis before the expansion.
+For example, the rs6000 port uses it to allocate a scratch stack slot
+for use in copying SDmode values between memory and floating point
+registers whenever the function being expanded has any SDmode
+usage.
+@end deftypefn
+
+@hook TARGET_INSTANTIATE_DECLS
+This hook allows the backend to perform additional instantiations on rtl
+that are not actually in any insns yet, but will be later.
+@end deftypefn
+
+@hook TARGET_MANGLE_TYPE
+If your target defines any fundamental types, or any types your target
+uses should be mangled differently from the default, define this hook
+to return the appropriate encoding for these types as part of a C++
+mangled name.  The @var{type} argument is the tree structure representing
+the type to be mangled.  The hook may be applied to trees which are
+not target-specific fundamental types; it should return @code{NULL}
+for all such types, as well as arguments it does not recognize.  If the
+return value is not @code{NULL}, it must point to a statically-allocated
+string constant.
+
+Target-specific fundamental types might be new fundamental types or
+qualified versions of ordinary fundamental types.  Encode new
+fundamental types as @samp{@w{u @var{n} @var{name}}}, where @var{name}
+is the name used for the type in source code, and @var{n} is the
+length of @var{name} in decimal.  Encode qualified versions of
+ordinary types as @samp{@w{U @var{n} @var{name} @var{code}}}, where
+@var{name} is the name used for the type qualifier in source code,
+@var{n} is the length of @var{name} as above, and @var{code} is the
+code used to represent the unqualified version of this type.  (See
+@code{write_builtin_type} in @file{cp/mangle.c} for the list of
+codes.)  In both cases the spaces are for clarity; do not include any
+spaces in your string.
+
+This hook is applied to types prior to typedef resolution.  If the mangled
+name for a particular type depends only on that type's main variant, you
+can perform typedef resolution yourself using @code{TYPE_MAIN_VARIANT}
+before mangling.
+
+The default version of this hook always returns @code{NULL}, which is
+appropriate for a target that does not define any new fundamental
+types.
+@end deftypefn
+
+@node Type Layout
+@section Layout of Source Language Data Types
+
+These macros define the sizes and other characteristics of the standard
+basic data types used in programs being compiled.  Unlike the macros in
+the previous section, these apply to specific features of C and related
+languages, rather than to fundamental aspects of storage layout.
+
+@defmac INT_TYPE_SIZE
+A C expression for the size in bits of the type @code{int} on the
+target machine.  If you don't define this, the default is one word.
+@end defmac
+
+@defmac SHORT_TYPE_SIZE
+A C expression for the size in bits of the type @code{short} on the
+target machine.  If you don't define this, the default is half a word.
+(If this would be less than one storage unit, it is rounded up to one
+unit.)
+@end defmac
+
+@defmac LONG_TYPE_SIZE
+A C expression for the size in bits of the type @code{long} on the
+target machine.  If you don't define this, the default is one word.
+@end defmac
+
+@defmac ADA_LONG_TYPE_SIZE
+On some machines, the size used for the Ada equivalent of the type
+@code{long} by a native Ada compiler differs from that used by C@.  In
+that situation, define this macro to be a C expression to be used for
+the size of that type.  If you don't define this, the default is the
+value of @code{LONG_TYPE_SIZE}.
+@end defmac
+
+@defmac LONG_LONG_TYPE_SIZE
+A C expression for the size in bits of the type @code{long long} on the
+target machine.  If you don't define this, the default is two
+words.  If you want to support GNU Ada on your machine, the value of this
+macro must be at least 64.
+@end defmac
+
+@defmac CHAR_TYPE_SIZE
+A C expression for the size in bits of the type @code{char} on the
+target machine.  If you don't define this, the default is
+@code{BITS_PER_UNIT}.
+@end defmac
+
+@defmac BOOL_TYPE_SIZE
+A C expression for the size in bits of the C++ type @code{bool} and
+C99 type @code{_Bool} on the target machine.  If you don't define
+this, and you probably shouldn't, the default is @code{CHAR_TYPE_SIZE}.
+@end defmac
+
+@defmac FLOAT_TYPE_SIZE
+A C expression for the size in bits of the type @code{float} on the
+target machine.  If you don't define this, the default is one word.
+@end defmac
+
+@defmac DOUBLE_TYPE_SIZE
+A C expression for the size in bits of the type @code{double} on the
+target machine.  If you don't define this, the default is two
+words.
+@end defmac
+
+@defmac LONG_DOUBLE_TYPE_SIZE
+A C expression for the size in bits of the type @code{long double} on
+the target machine.  If you don't define this, the default is two
+words.
+@end defmac
+
+@defmac SHORT_FRACT_TYPE_SIZE
+A C expression for the size in bits of the type @code{short _Fract} on
+the target machine.  If you don't define this, the default is
+@code{BITS_PER_UNIT}.
+@end defmac
+
+@defmac FRACT_TYPE_SIZE
+A C expression for the size in bits of the type @code{_Fract} on
+the target machine.  If you don't define this, the default is
+@code{BITS_PER_UNIT * 2}.
+@end defmac
+
+@defmac LONG_FRACT_TYPE_SIZE
+A C expression for the size in bits of the type @code{long _Fract} on
+the target machine.  If you don't define this, the default is
+@code{BITS_PER_UNIT * 4}.
+@end defmac
+
+@defmac LONG_LONG_FRACT_TYPE_SIZE
+A C expression for the size in bits of the type @code{long long _Fract} on
+the target machine.  If you don't define this, the default is
+@code{BITS_PER_UNIT * 8}.
+@end defmac
+
+@defmac SHORT_ACCUM_TYPE_SIZE
+A C expression for the size in bits of the type @code{short _Accum} on
+the target machine.  If you don't define this, the default is
+@code{BITS_PER_UNIT * 2}.
+@end defmac
+
+@defmac ACCUM_TYPE_SIZE
+A C expression for the size in bits of the type @code{_Accum} on
+the target machine.  If you don't define this, the default is
+@code{BITS_PER_UNIT * 4}.
+@end defmac
+
+@defmac LONG_ACCUM_TYPE_SIZE
+A C expression for the size in bits of the type @code{long _Accum} on
+the target machine.  If you don't define this, the default is
+@code{BITS_PER_UNIT * 8}.
+@end defmac
+
+@defmac LONG_LONG_ACCUM_TYPE_SIZE
+A C expression for the size in bits of the type @code{long long _Accum} on
+the target machine.  If you don't define this, the default is
+@code{BITS_PER_UNIT * 16}.
+@end defmac
+
+@defmac LIBGCC2_LONG_DOUBLE_TYPE_SIZE
+Define this macro if @code{LONG_DOUBLE_TYPE_SIZE} is not constant or
+if you want routines in @file{libgcc2.a} for a size other than
+@code{LONG_DOUBLE_TYPE_SIZE}.  If you don't define this, the
+default is @code{LONG_DOUBLE_TYPE_SIZE}.
+@end defmac
+
+@defmac LIBGCC2_HAS_DF_MODE
+Define this macro if neither @code{DOUBLE_TYPE_SIZE} nor
+@code{LIBGCC2_LONG_DOUBLE_TYPE_SIZE} is
+@code{DFmode} but you want @code{DFmode} routines in @file{libgcc2.a}
+anyway.  If you don't define this and either @code{DOUBLE_TYPE_SIZE}
+or @code{LIBGCC2_LONG_DOUBLE_TYPE_SIZE} is 64 then the default is 1,
+otherwise it is 0.
+@end defmac
+
+@defmac LIBGCC2_HAS_XF_MODE
+Define this macro if @code{LIBGCC2_LONG_DOUBLE_TYPE_SIZE} is not
+@code{XFmode} but you want @code{XFmode} routines in @file{libgcc2.a}
+anyway.  If you don't define this and @code{LIBGCC2_LONG_DOUBLE_TYPE_SIZE}
+is 80 then the default is 1, otherwise it is 0.
+@end defmac
+
+@defmac LIBGCC2_HAS_TF_MODE
+Define this macro if @code{LIBGCC2_LONG_DOUBLE_TYPE_SIZE} is not
+@code{TFmode} but you want @code{TFmode} routines in @file{libgcc2.a}
+anyway.  If you don't define this and @code{LIBGCC2_LONG_DOUBLE_TYPE_SIZE}
+is 128 then the default is 1, otherwise it is 0.
+@end defmac
+
+@defmac SF_SIZE
+@defmacx DF_SIZE
+@defmacx XF_SIZE
+@defmacx TF_SIZE
+Define these macros to be the size in bits of the mantissa of
+@code{SFmode}, @code{DFmode}, @code{XFmode} and @code{TFmode} values,
+if the defaults in @file{libgcc2.h} are inappropriate.  By default,
+@code{FLT_MANT_DIG} is used for @code{SF_SIZE}, @code{LDBL_MANT_DIG}
+for @code{XF_SIZE} and @code{TF_SIZE}, and @code{DBL_MANT_DIG} or
+@code{LDBL_MANT_DIG} for @code{DF_SIZE} according to whether
+@code{DOUBLE_TYPE_SIZE} or
+@code{LIBGCC2_LONG_DOUBLE_TYPE_SIZE} is 64.
+@end defmac
+
+@defmac TARGET_FLT_EVAL_METHOD
+A C expression for the value for @code{FLT_EVAL_METHOD} in @file{float.h},
+assuming, if applicable, that the floating-point control word is in its
+default state.  If you do not define this macro the value of
+@code{FLT_EVAL_METHOD} will be zero.
+@end defmac
+
+@defmac WIDEST_HARDWARE_FP_SIZE
+A C expression for the size in bits of the widest floating-point format
+supported by the hardware.  If you define this macro, you must specify a
+value less than or equal to the value of @code{LONG_DOUBLE_TYPE_SIZE}.
+If you do not define this macro, the value of @code{LONG_DOUBLE_TYPE_SIZE}
+is the default.
+@end defmac
+
+@defmac DEFAULT_SIGNED_CHAR
+An expression whose value is 1 or 0, according to whether the type
+@code{char} should be signed or unsigned by default.  The user can
+always override this default with the options @option{-fsigned-char}
+and @option{-funsigned-char}.
+@end defmac
+
+@hook TARGET_DEFAULT_SHORT_ENUMS
+This target hook should return true if the compiler should give an
+@code{enum} type only as many bytes as it takes to represent the range
+of possible values of that type.  It should return false if all
+@code{enum} types should be allocated like @code{int}.
+
+The default is to return false.
+@end deftypefn
+
+@defmac SIZE_TYPE
+A C expression for a string describing the name of the data type to use
+for size values.  The typedef name @code{size_t} is defined using the
+contents of the string.
+
+The string can contain more than one keyword.  If so, separate them with
+spaces, and write first any length keyword, then @code{unsigned} if
+appropriate, and finally @code{int}.  The string must exactly match one
+of the data type names defined in the function
+@code{init_decl_processing} in the file @file{c-decl.c}.  You may not
+omit @code{int} or change the order---that would cause the compiler to
+crash on startup.
+
+If you don't define this macro, the default is @code{"long unsigned
+int"}.
+@end defmac
+
+@defmac PTRDIFF_TYPE
+A C expression for a string describing the name of the data type to use
+for the result of subtracting two pointers.  The typedef name
+@code{ptrdiff_t} is defined using the contents of the string.  See
+@code{SIZE_TYPE} above for more information.
+
+If you don't define this macro, the default is @code{"long int"}.
+@end defmac
+
+@defmac WCHAR_TYPE
+A C expression for a string describing the name of the data type to use
+for wide characters.  The typedef name @code{wchar_t} is defined using
+the contents of the string.  See @code{SIZE_TYPE} above for more
+information.
+
+If you don't define this macro, the default is @code{"int"}.
+@end defmac
+
+@defmac WCHAR_TYPE_SIZE
+A C expression for the size in bits of the data type for wide
+characters.  This is used in @code{cpp}, which cannot make use of
+@code{WCHAR_TYPE}.
+@end defmac
+
+@defmac WINT_TYPE
+A C expression for a string describing the name of the data type to
+use for wide characters passed to @code{printf} and returned from
+@code{getwc}.  The typedef name @code{wint_t} is defined using the
+contents of the string.  See @code{SIZE_TYPE} above for more
+information.
+
+If you don't define this macro, the default is @code{"unsigned int"}.
+@end defmac
+
+@defmac INTMAX_TYPE
+A C expression for a string describing the name of the data type that
+can represent any value of any standard or extended signed integer type.
+The typedef name @code{intmax_t} is defined using the contents of the
+string.  See @code{SIZE_TYPE} above for more information.
+
+If you don't define this macro, the default is the first of
+@code{"int"}, @code{"long int"}, or @code{"long long int"} that has as
+much precision as @code{long long int}.
+@end defmac
+
+@defmac UINTMAX_TYPE
+A C expression for a string describing the name of the data type that
+can represent any value of any standard or extended unsigned integer
+type.  The typedef name @code{uintmax_t} is defined using the contents
+of the string.  See @code{SIZE_TYPE} above for more information.
+
+If you don't define this macro, the default is the first of
+@code{"unsigned int"}, @code{"long unsigned int"}, or @code{"long long
+unsigned int"} that has as much precision as @code{long long unsigned
+int}.
+@end defmac
+
+@defmac SIG_ATOMIC_TYPE
+@defmacx INT8_TYPE
+@defmacx INT16_TYPE
+@defmacx INT32_TYPE
+@defmacx INT64_TYPE
+@defmacx UINT8_TYPE
+@defmacx UINT16_TYPE
+@defmacx UINT32_TYPE
+@defmacx UINT64_TYPE
+@defmacx INT_LEAST8_TYPE
+@defmacx INT_LEAST16_TYPE
+@defmacx INT_LEAST32_TYPE
+@defmacx INT_LEAST64_TYPE
+@defmacx UINT_LEAST8_TYPE
+@defmacx UINT_LEAST16_TYPE
+@defmacx UINT_LEAST32_TYPE
+@defmacx UINT_LEAST64_TYPE
+@defmacx INT_FAST8_TYPE
+@defmacx INT_FAST16_TYPE
+@defmacx INT_FAST32_TYPE
+@defmacx INT_FAST64_TYPE
+@defmacx UINT_FAST8_TYPE
+@defmacx UINT_FAST16_TYPE
+@defmacx UINT_FAST32_TYPE
+@defmacx UINT_FAST64_TYPE
+@defmacx INTPTR_TYPE
+@defmacx UINTPTR_TYPE
+C expressions for the standard types @code{sig_atomic_t},
+@code{int8_t}, @code{int16_t}, @code{int32_t}, @code{int64_t},
+@code{uint8_t}, @code{uint16_t}, @code{uint32_t}, @code{uint64_t},
+@code{int_least8_t}, @code{int_least16_t}, @code{int_least32_t},
+@code{int_least64_t}, @code{uint_least8_t}, @code{uint_least16_t},
+@code{uint_least32_t}, @code{uint_least64_t}, @code{int_fast8_t},
+@code{int_fast16_t}, @code{int_fast32_t}, @code{int_fast64_t},
+@code{uint_fast8_t}, @code{uint_fast16_t}, @code{uint_fast32_t},
+@code{uint_fast64_t}, @code{intptr_t}, and @code{uintptr_t}.  See
+@code{SIZE_TYPE} above for more information.
+
+If any of these macros evaluates to a null pointer, the corresponding
+type is not supported; if GCC is configured to provide
+@code{<stdint.h>} in such a case, the header provided may not conform
+to C99, depending on the type in question.  The defaults for all of
+these macros are null pointers.
+@end defmac
+
+@defmac TARGET_PTRMEMFUNC_VBIT_LOCATION
+The C++ compiler represents a pointer-to-member-function with a struct
+that looks like:
+
+@smallexample
+  struct @{
+    union @{
+      void (*fn)();
+      ptrdiff_t vtable_index;
+    @};
+    ptrdiff_t delta;
+  @};
+@end smallexample
+
+@noindent
+The C++ compiler must use one bit to indicate whether the function that
+will be called through a pointer-to-member-function is virtual.
+Normally, we assume that the low-order bit of a function pointer must
+always be zero.  Then, by ensuring that the vtable_index is odd, we can
+distinguish which variant of the union is in use.  But, on some
+platforms function pointers can be odd, and so this doesn't work.  In
+that case, we use the low-order bit of the @code{delta} field, and shift
+the remainder of the @code{delta} field to the left.
+
+GCC will automatically make the right selection about where to store
+this bit using the @code{FUNCTION_BOUNDARY} setting for your platform.
+However, some platforms such as ARM/Thumb have @code{FUNCTION_BOUNDARY}
+set such that functions always start at even addresses, but the lowest
+bit of pointers to functions indicate whether the function at that
+address is in ARM or Thumb mode.  If this is the case of your
+architecture, you should define this macro to
+@code{ptrmemfunc_vbit_in_delta}.
+
+In general, you should not have to define this macro.  On architectures
+in which function addresses are always even, according to
+@code{FUNCTION_BOUNDARY}, GCC will automatically define this macro to
+@code{ptrmemfunc_vbit_in_pfn}.
+@end defmac
+
+@defmac TARGET_VTABLE_USES_DESCRIPTORS
+Normally, the C++ compiler uses function pointers in vtables.  This
+macro allows the target to change to use ``function descriptors''
+instead.  Function descriptors are found on targets for whom a
+function pointer is actually a small data structure.  Normally the
+data structure consists of the actual code address plus a data
+pointer to which the function's data is relative.
+
+If vtables are used, the value of this macro should be the number
+of words that the function descriptor occupies.
+@end defmac
+
+@defmac TARGET_VTABLE_ENTRY_ALIGN
+By default, the vtable entries are void pointers, the so the alignment
+is the same as pointer alignment.  The value of this macro specifies
+the alignment of the vtable entry in bits.  It should be defined only
+when special alignment is necessary. */
+@end defmac
+
+@defmac TARGET_VTABLE_DATA_ENTRY_DISTANCE
+There are a few non-descriptor entries in the vtable at offsets below
+zero.  If these entries must be padded (say, to preserve the alignment
+specified by @code{TARGET_VTABLE_ENTRY_ALIGN}), set this to the number
+of words in each data entry.
+@end defmac
+
+@node Registers
+@section Register Usage
+@cindex register usage
+
+This section explains how to describe what registers the target machine
+has, and how (in general) they can be used.
+
+The description of which registers a specific instruction can use is
+done with register classes; see @ref{Register Classes}.  For information
+on using registers to access a stack frame, see @ref{Frame Registers}.
+For passing values in registers, see @ref{Register Arguments}.
+For returning values in registers, see @ref{Scalar Return}.
+
+@menu
+* Register Basics::             Number and kinds of registers.
+* Allocation Order::            Order in which registers are allocated.
+* Values in Registers::         What kinds of values each reg can hold.
+* Leaf Functions::              Renumbering registers for leaf functions.
+* Stack Registers::             Handling a register stack such as 80387.
+@end menu
+
+@node Register Basics
+@subsection Basic Characteristics of Registers
+
+@c prevent bad page break with this line
+Registers have various characteristics.
+
+@defmac FIRST_PSEUDO_REGISTER
+Number of hardware registers known to the compiler.  They receive
+numbers 0 through @code{FIRST_PSEUDO_REGISTER-1}; thus, the first
+pseudo register's number really is assigned the number
+@code{FIRST_PSEUDO_REGISTER}.
+@end defmac
+
+@defmac FIXED_REGISTERS
+@cindex fixed register
+An initializer that says which registers are used for fixed purposes
+all throughout the compiled code and are therefore not available for
+general allocation.  These would include the stack pointer, the frame
+pointer (except on machines where that can be used as a general
+register when no frame pointer is needed), the program counter on
+machines where that is considered one of the addressable registers,
+and any other numbered register with a standard use.
+
+This information is expressed as a sequence of numbers, separated by
+commas and surrounded by braces.  The @var{n}th number is 1 if
+register @var{n} is fixed, 0 otherwise.
+
+The table initialized from this macro, and the table initialized by
+the following one, may be overridden at run time either automatically,
+by the actions of the macro @code{CONDITIONAL_REGISTER_USAGE}, or by
+the user with the command options @option{-ffixed-@var{reg}},
+@option{-fcall-used-@var{reg}} and @option{-fcall-saved-@var{reg}}.
+@end defmac
+
+@defmac CALL_USED_REGISTERS
+@cindex call-used register
+@cindex call-clobbered register
+@cindex call-saved register
+Like @code{FIXED_REGISTERS} but has 1 for each register that is
+clobbered (in general) by function calls as well as for fixed
+registers.  This macro therefore identifies the registers that are not
+available for general allocation of values that must live across
+function calls.
+
+If a register has 0 in @code{CALL_USED_REGISTERS}, the compiler
+automatically saves it on function entry and restores it on function
+exit, if the register is used within the function.
+@end defmac
+
+@defmac CALL_REALLY_USED_REGISTERS
+@cindex call-used register
+@cindex call-clobbered register
+@cindex call-saved register
+Like @code{CALL_USED_REGISTERS} except this macro doesn't require
+that the entire set of @code{FIXED_REGISTERS} be included.
+(@code{CALL_USED_REGISTERS} must be a superset of @code{FIXED_REGISTERS}).
+This macro is optional.  If not specified, it defaults to the value
+of @code{CALL_USED_REGISTERS}.
+@end defmac
+
+@defmac HARD_REGNO_CALL_PART_CLOBBERED (@var{regno}, @var{mode})
+@cindex call-used register
+@cindex call-clobbered register
+@cindex call-saved register
+A C expression that is nonzero if it is not permissible to store a
+value of mode @var{mode} in hard register number @var{regno} across a
+call without some part of it being clobbered.  For most machines this
+macro need not be defined.  It is only required for machines that do not
+preserve the entire contents of a register across a call.
+@end defmac
+
+@findex fixed_regs
+@findex call_used_regs
+@findex global_regs
+@findex reg_names
+@findex reg_class_contents
+@hook TARGET_CONDITIONAL_REGISTER_USAGE
+This hook may conditionally modify five variables
+@code{fixed_regs}, @code{call_used_regs}, @code{global_regs},
+@code{reg_names}, and @code{reg_class_contents}, to take into account
+any dependence of these register sets on target flags.  The first three
+of these are of type @code{char []} (interpreted as Boolean vectors).
+@code{global_regs} is a @code{const char *[]}, and
+@code{reg_class_contents} is a @code{HARD_REG_SET}.  Before the macro is
+called, @code{fixed_regs}, @code{call_used_regs},
+@code{reg_class_contents}, and @code{reg_names} have been initialized
+from @code{FIXED_REGISTERS}, @code{CALL_USED_REGISTERS},
+@code{REG_CLASS_CONTENTS}, and @code{REGISTER_NAMES}, respectively.
+@code{global_regs} has been cleared, and any @option{-ffixed-@var{reg}},
+@option{-fcall-used-@var{reg}} and @option{-fcall-saved-@var{reg}}
+command options have been applied.
+
+@cindex disabling certain registers
+@cindex controlling register usage
+If the usage of an entire class of registers depends on the target
+flags, you may indicate this to GCC by using this macro to modify
+@code{fixed_regs} and @code{call_used_regs} to 1 for each of the
+registers in the classes which should not be used by GCC@.  Also define
+the macro @code{REG_CLASS_FROM_LETTER} / @code{REG_CLASS_FROM_CONSTRAINT}
+to return @code{NO_REGS} if it
+is called with a letter for a class that shouldn't be used.
+
+(However, if this class is not included in @code{GENERAL_REGS} and all
+of the insn patterns whose constraints permit this class are
+controlled by target switches, then GCC will automatically avoid using
+these registers when the target switches are opposed to them.)
+@end deftypefn
+
+@defmac INCOMING_REGNO (@var{out})
+Define this macro if the target machine has register windows.  This C
+expression returns the register number as seen by the called function
+corresponding to the register number @var{out} as seen by the calling
+function.  Return @var{out} if register number @var{out} is not an
+outbound register.
+@end defmac
+
+@defmac OUTGOING_REGNO (@var{in})
+Define this macro if the target machine has register windows.  This C
+expression returns the register number as seen by the calling function
+corresponding to the register number @var{in} as seen by the called
+function.  Return @var{in} if register number @var{in} is not an inbound
+register.
+@end defmac
+
+@defmac LOCAL_REGNO (@var{regno})
+Define this macro if the target machine has register windows.  This C
+expression returns true if the register is call-saved but is in the
+register window.  Unlike most call-saved registers, such registers
+need not be explicitly restored on function exit or during non-local
+gotos.
+@end defmac
+
+@defmac PC_REGNUM
+If the program counter has a register number, define this as that
+register number.  Otherwise, do not define it.
+@end defmac
+
+@node Allocation Order
+@subsection Order of Allocation of Registers
+@cindex order of register allocation
+@cindex register allocation order
+
+@c prevent bad page break with this line
+Registers are allocated in order.
+
+@defmac REG_ALLOC_ORDER
+If defined, an initializer for a vector of integers, containing the
+numbers of hard registers in the order in which GCC should prefer
+to use them (from most preferred to least).
+
+If this macro is not defined, registers are used lowest numbered first
+(all else being equal).
+
+One use of this macro is on machines where the highest numbered
+registers must always be saved and the save-multiple-registers
+instruction supports only sequences of consecutive registers.  On such
+machines, define @code{REG_ALLOC_ORDER} to be an initializer that lists
+the highest numbered allocable register first.
+@end defmac
+
+@defmac ADJUST_REG_ALLOC_ORDER
+A C statement (sans semicolon) to choose the order in which to allocate
+hard registers for pseudo-registers local to a basic block.
+
+Store the desired register order in the array @code{reg_alloc_order}.
+Element 0 should be the register to allocate first; element 1, the next
+register; and so on.
+
+The macro body should not assume anything about the contents of
+@code{reg_alloc_order} before execution of the macro.
+
+On most machines, it is not necessary to define this macro.
+@end defmac
+
+@defmac HONOR_REG_ALLOC_ORDER
+Normally, IRA tries to estimate the costs for saving a register in the
+prologue and restoring it in the epilogue.  This discourages it from
+using call-saved registers.  If a machine wants to ensure that IRA
+allocates registers in the order given by REG_ALLOC_ORDER even if some
+call-saved registers appear earlier than call-used ones, this macro
+should be defined.
+@end defmac
+
+@defmac IRA_HARD_REGNO_ADD_COST_MULTIPLIER (@var{regno})
+In some case register allocation order is not enough for the
+Integrated Register Allocator (@acronym{IRA}) to generate a good code.
+If this macro is defined, it should return a floating point value
+based on @var{regno}.  The cost of using @var{regno} for a pseudo will
+be increased by approximately the pseudo's usage frequency times the
+value returned by this macro.  Not defining this macro is equivalent
+to having it always return @code{0.0}.
+
+On most machines, it is not necessary to define this macro.
+@end defmac
+
+@node Values in Registers
+@subsection How Values Fit in Registers
+
+This section discusses the macros that describe which kinds of values
+(specifically, which machine modes) each register can hold, and how many
+consecutive registers are needed for a given mode.
+
+@defmac HARD_REGNO_NREGS (@var{regno}, @var{mode})
+A C expression for the number of consecutive hard registers, starting
+at register number @var{regno}, required to hold a value of mode
+@var{mode}.  This macro must never return zero, even if a register
+cannot hold the requested mode - indicate that with HARD_REGNO_MODE_OK
+and/or CANNOT_CHANGE_MODE_CLASS instead.
+
+On a machine where all registers are exactly one word, a suitable
+definition of this macro is
+
+@smallexample
+#define HARD_REGNO_NREGS(REGNO, MODE)            \
+   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1)  \
+    / UNITS_PER_WORD)
+@end smallexample
+@end defmac
+
+@defmac HARD_REGNO_NREGS_HAS_PADDING (@var{regno}, @var{mode})
+A C expression that is nonzero if a value of mode @var{mode}, stored
+in memory, ends with padding that causes it to take up more space than
+in registers starting at register number @var{regno} (as determined by
+multiplying GCC's notion of the size of the register when containing
+this mode by the number of registers returned by
+@code{HARD_REGNO_NREGS}).  By default this is zero.
+
+For example, if a floating-point value is stored in three 32-bit
+registers but takes up 128 bits in memory, then this would be
+nonzero.
+
+This macros only needs to be defined if there are cases where
+@code{subreg_get_info}
+would otherwise wrongly determine that a @code{subreg} can be
+represented by an offset to the register number, when in fact such a
+@code{subreg} would contain some of the padding not stored in
+registers and so not be representable.
+@end defmac
+
+@defmac HARD_REGNO_NREGS_WITH_PADDING (@var{regno}, @var{mode})
+For values of @var{regno} and @var{mode} for which
+@code{HARD_REGNO_NREGS_HAS_PADDING} returns nonzero, a C expression
+returning the greater number of registers required to hold the value
+including any padding.  In the example above, the value would be four.
+@end defmac
+
+@defmac REGMODE_NATURAL_SIZE (@var{mode})
+Define this macro if the natural size of registers that hold values
+of mode @var{mode} is not the word size.  It is a C expression that
+should give the natural size in bytes for the specified mode.  It is
+used by the register allocator to try to optimize its results.  This
+happens for example on SPARC 64-bit where the natural size of
+floating-point registers is still 32-bit.
+@end defmac
+
+@defmac HARD_REGNO_MODE_OK (@var{regno}, @var{mode})
+A C expression that is nonzero if it is permissible to store a value
+of mode @var{mode} in hard register number @var{regno} (or in several
+registers starting with that one).  For a machine where all registers
+are equivalent, a suitable definition is
+
+@smallexample
+#define HARD_REGNO_MODE_OK(REGNO, MODE) 1
+@end smallexample
+
+You need not include code to check for the numbers of fixed registers,
+because the allocation mechanism considers them to be always occupied.
+
+@cindex register pairs
+On some machines, double-precision values must be kept in even/odd
+register pairs.  You can implement that by defining this macro to reject
+odd register numbers for such modes.
+
+The minimum requirement for a mode to be OK in a register is that the
+@samp{mov@var{mode}} instruction pattern support moves between the
+register and other hard register in the same class and that moving a
+value into the register and back out not alter it.
+
+Since the same instruction used to move @code{word_mode} will work for
+all narrower integer modes, it is not necessary on any machine for
+@code{HARD_REGNO_MODE_OK} to distinguish between these modes, provided
+you define patterns @samp{movhi}, etc., to take advantage of this.  This
+is useful because of the interaction between @code{HARD_REGNO_MODE_OK}
+and @code{MODES_TIEABLE_P}; it is very desirable for all integer modes
+to be tieable.
+
+Many machines have special registers for floating point arithmetic.
+Often people assume that floating point machine modes are allowed only
+in floating point registers.  This is not true.  Any registers that
+can hold integers can safely @emph{hold} a floating point machine
+mode, whether or not floating arithmetic can be done on it in those
+registers.  Integer move instructions can be used to move the values.
+
+On some machines, though, the converse is true: fixed-point machine
+modes may not go in floating registers.  This is true if the floating
+registers normalize any value stored in them, because storing a
+non-floating value there would garble it.  In this case,
+@code{HARD_REGNO_MODE_OK} should reject fixed-point machine modes in
+floating registers.  But if the floating registers do not automatically
+normalize, if you can store any bit pattern in one and retrieve it
+unchanged without a trap, then any machine mode may go in a floating
+register, so you can define this macro to say so.
+
+The primary significance of special floating registers is rather that
+they are the registers acceptable in floating point arithmetic
+instructions.  However, this is of no concern to
+@code{HARD_REGNO_MODE_OK}.  You handle it by writing the proper
+constraints for those instructions.
+
+On some machines, the floating registers are especially slow to access,
+so that it is better to store a value in a stack frame than in such a
+register if floating point arithmetic is not being done.  As long as the
+floating registers are not in class @code{GENERAL_REGS}, they will not
+be used unless some pattern's constraint asks for one.
+@end defmac
+
+@defmac HARD_REGNO_RENAME_OK (@var{from}, @var{to})
+A C expression that is nonzero if it is OK to rename a hard register
+@var{from} to another hard register @var{to}.
+
+One common use of this macro is to prevent renaming of a register to
+another register that is not saved by a prologue in an interrupt
+handler.
+
+The default is always nonzero.
+@end defmac
+
+@defmac MODES_TIEABLE_P (@var{mode1}, @var{mode2})
+A C expression that is nonzero if a value of mode
+@var{mode1} is accessible in mode @var{mode2} without copying.
+
+If @code{HARD_REGNO_MODE_OK (@var{r}, @var{mode1})} and
+@code{HARD_REGNO_MODE_OK (@var{r}, @var{mode2})} are always the same for
+any @var{r}, then @code{MODES_TIEABLE_P (@var{mode1}, @var{mode2})}
+should be nonzero.  If they differ for any @var{r}, you should define
+this macro to return zero unless some other mechanism ensures the
+accessibility of the value in a narrower mode.
+
+You should define this macro to return nonzero in as many cases as
+possible since doing so will allow GCC to perform better register
+allocation.
+@end defmac
+
+@hook TARGET_HARD_REGNO_SCRATCH_OK
+This target hook should return @code{true} if it is OK to use a hard register
+@var{regno} as scratch reg in peephole2.
+
+One common use of this macro is to prevent using of a register that
+is not saved by a prologue in an interrupt handler.
+
+The default version of this hook always returns @code{true}.
+@end deftypefn
+
+@defmac AVOID_CCMODE_COPIES
+Define this macro if the compiler should avoid copies to/from @code{CCmode}
+registers.  You should only define this macro if support for copying to/from
+@code{CCmode} is incomplete.
+@end defmac
+
+@node Leaf Functions
+@subsection Handling Leaf Functions
+
+@cindex leaf functions
+@cindex functions, leaf
+On some machines, a leaf function (i.e., one which makes no calls) can run
+more efficiently if it does not make its own register window.  Often this
+means it is required to receive its arguments in the registers where they
+are passed by the caller, instead of the registers where they would
+normally arrive.
+
+The special treatment for leaf functions generally applies only when
+other conditions are met; for example, often they may use only those
+registers for its own variables and temporaries.  We use the term ``leaf
+function'' to mean a function that is suitable for this special
+handling, so that functions with no calls are not necessarily ``leaf
+functions''.
+
+GCC assigns register numbers before it knows whether the function is
+suitable for leaf function treatment.  So it needs to renumber the
+registers in order to output a leaf function.  The following macros
+accomplish this.
+
+@defmac LEAF_REGISTERS
+Name of a char vector, indexed by hard register number, which
+contains 1 for a register that is allowable in a candidate for leaf
+function treatment.
+
+If leaf function treatment involves renumbering the registers, then the
+registers marked here should be the ones before renumbering---those that
+GCC would ordinarily allocate.  The registers which will actually be
+used in the assembler code, after renumbering, should not be marked with 1
+in this vector.
+
+Define this macro only if the target machine offers a way to optimize
+the treatment of leaf functions.
+@end defmac
+
+@defmac LEAF_REG_REMAP (@var{regno})
+A C expression whose value is the register number to which @var{regno}
+should be renumbered, when a function is treated as a leaf function.
+
+If @var{regno} is a register number which should not appear in a leaf
+function before renumbering, then the expression should yield @minus{}1, which
+will cause the compiler to abort.
+
+Define this macro only if the target machine offers a way to optimize the
+treatment of leaf functions, and registers need to be renumbered to do
+this.
+@end defmac
+
+@findex current_function_is_leaf
+@findex current_function_uses_only_leaf_regs
+@code{TARGET_ASM_FUNCTION_PROLOGUE} and
+@code{TARGET_ASM_FUNCTION_EPILOGUE} must usually treat leaf functions
+specially.  They can test the C variable @code{current_function_is_leaf}
+which is nonzero for leaf functions.  @code{current_function_is_leaf} is
+set prior to local register allocation and is valid for the remaining
+compiler passes.  They can also test the C variable
+@code{current_function_uses_only_leaf_regs} which is nonzero for leaf
+functions which only use leaf registers.
+@code{current_function_uses_only_leaf_regs} is valid after all passes
+that modify the instructions have been run and is only useful if
+@code{LEAF_REGISTERS} is defined.
+@c changed this to fix overfull.  ALSO:  why the "it" at the beginning
+@c of the next paragraph?!  --mew 2feb93
+
+@node Stack Registers
+@subsection Registers That Form a Stack
+
+There are special features to handle computers where some of the
+``registers'' form a stack.  Stack registers are normally written by
+pushing onto the stack, and are numbered relative to the top of the
+stack.
+
+Currently, GCC can only handle one group of stack-like registers, and
+they must be consecutively numbered.  Furthermore, the existing
+support for stack-like registers is specific to the 80387 floating
+point coprocessor.  If you have a new architecture that uses
+stack-like registers, you will need to do substantial work on
+@file{reg-stack.c} and write your machine description to cooperate
+with it, as well as defining these macros.
+
+@defmac STACK_REGS
+Define this if the machine has any stack-like registers.
+@end defmac
+
+@defmac STACK_REG_COVER_CLASS
+This is a cover class containing the stack registers.  Define this if
+the machine has any stack-like registers.
+@end defmac
+
+@defmac FIRST_STACK_REG
+The number of the first stack-like register.  This one is the top
+of the stack.
+@end defmac
+
+@defmac LAST_STACK_REG
+The number of the last stack-like register.  This one is the bottom of
+the stack.
+@end defmac
+
+@node Register Classes
+@section Register Classes
+@cindex register class definitions
+@cindex class definitions, register
+
+On many machines, the numbered registers are not all equivalent.
+For example, certain registers may not be allowed for indexed addressing;
+certain registers may not be allowed in some instructions.  These machine
+restrictions are described to the compiler using @dfn{register classes}.
+
+You define a number of register classes, giving each one a name and saying
+which of the registers belong to it.  Then you can specify register classes
+that are allowed as operands to particular instruction patterns.
+
+@findex ALL_REGS
+@findex NO_REGS
+In general, each register will belong to several classes.  In fact, one
+class must be named @code{ALL_REGS} and contain all the registers.  Another
+class must be named @code{NO_REGS} and contain no registers.  Often the
+union of two classes will be another class; however, this is not required.
+
+@findex GENERAL_REGS
+One of the classes must be named @code{GENERAL_REGS}.  There is nothing
+terribly special about the name, but the operand constraint letters
+@samp{r} and @samp{g} specify this class.  If @code{GENERAL_REGS} is
+the same as @code{ALL_REGS}, just define it as a macro which expands
+to @code{ALL_REGS}.
+
+Order the classes so that if class @var{x} is contained in class @var{y}
+then @var{x} has a lower class number than @var{y}.
+
+The way classes other than @code{GENERAL_REGS} are specified in operand
+constraints is through machine-dependent operand constraint letters.
+You can define such letters to correspond to various classes, then use
+them in operand constraints.
+
+You should define a class for the union of two classes whenever some
+instruction allows both classes.  For example, if an instruction allows
+either a floating point (coprocessor) register or a general register for a
+certain operand, you should define a class @code{FLOAT_OR_GENERAL_REGS}
+which includes both of them.  Otherwise you will get suboptimal code,
+or even internal compiler errors when reload cannot find a register in the
+the class computed via @code{reg_class_subunion}.
+
+You must also specify certain redundant information about the register
+classes: for each class, which classes contain it and which ones are
+contained in it; for each pair of classes, the largest class contained
+in their union.
+
+When a value occupying several consecutive registers is expected in a
+certain class, all the registers used must belong to that class.
+Therefore, register classes cannot be used to enforce a requirement for
+a register pair to start with an even-numbered register.  The way to
+specify this requirement is with @code{HARD_REGNO_MODE_OK}.
+
+Register classes used for input-operands of bitwise-and or shift
+instructions have a special requirement: each such class must have, for
+each fixed-point machine mode, a subclass whose registers can transfer that
+mode to or from memory.  For example, on some machines, the operations for
+single-byte values (@code{QImode}) are limited to certain registers.  When
+this is so, each register class that is used in a bitwise-and or shift
+instruction must have a subclass consisting of registers from which
+single-byte values can be loaded or stored.  This is so that
+@code{PREFERRED_RELOAD_CLASS} can always have a possible value to return.
+
+@deftp {Data type} {enum reg_class}
+An enumerated type that must be defined with all the register class names
+as enumerated values.  @code{NO_REGS} must be first.  @code{ALL_REGS}
+must be the last register class, followed by one more enumerated value,
+@code{LIM_REG_CLASSES}, which is not a register class but rather
+tells how many classes there are.
+
+Each register class has a number, which is the value of casting
+the class name to type @code{int}.  The number serves as an index
+in many of the tables described below.
+@end deftp
+
+@defmac N_REG_CLASSES
+The number of distinct register classes, defined as follows:
+
+@smallexample
+#define N_REG_CLASSES (int) LIM_REG_CLASSES
+@end smallexample
+@end defmac
+
+@defmac REG_CLASS_NAMES
+An initializer containing the names of the register classes as C string
+constants.  These names are used in writing some of the debugging dumps.
+@end defmac
+
+@defmac REG_CLASS_CONTENTS
+An initializer containing the contents of the register classes, as integers
+which are bit masks.  The @var{n}th integer specifies the contents of class
+@var{n}.  The way the integer @var{mask} is interpreted is that
+register @var{r} is in the class if @code{@var{mask} & (1 << @var{r})} is 1.
+
+When the machine has more than 32 registers, an integer does not suffice.
+Then the integers are replaced by sub-initializers, braced groupings containing
+several integers.  Each sub-initializer must be suitable as an initializer
+for the type @code{HARD_REG_SET} which is defined in @file{hard-reg-set.h}.
+In this situation, the first integer in each sub-initializer corresponds to
+registers 0 through 31, the second integer to registers 32 through 63, and
+so on.
+@end defmac
+
+@defmac REGNO_REG_CLASS (@var{regno})
+A C expression whose value is a register class containing hard register
+@var{regno}.  In general there is more than one such class; choose a class
+which is @dfn{minimal}, meaning that no smaller class also contains the
+register.
+@end defmac
+
+@defmac BASE_REG_CLASS
+A macro whose definition is the name of the class to which a valid
+base register must belong.  A base register is one used in an address
+which is the register value plus a displacement.
+@end defmac
+
+@defmac MODE_BASE_REG_CLASS (@var{mode})
+This is a variation of the @code{BASE_REG_CLASS} macro which allows
+the selection of a base register in a mode dependent manner.  If
+@var{mode} is VOIDmode then it should return the same value as
+@code{BASE_REG_CLASS}.
+@end defmac
+
+@defmac MODE_BASE_REG_REG_CLASS (@var{mode})
+A C expression whose value is the register class to which a valid
+base register must belong in order to be used in a base plus index
+register address.  You should define this macro if base plus index
+addresses have different requirements than other base register uses.
+@end defmac
+
+@defmac MODE_CODE_BASE_REG_CLASS (@var{mode}, @var{outer_code}, @var{index_code})
+A C expression whose value is the register class to which a valid
+base register must belong.  @var{outer_code} and @var{index_code} define the
+context in which the base register occurs.  @var{outer_code} is the code of
+the immediately enclosing expression (@code{MEM} for the top level of an
+address, @code{ADDRESS} for something that occurs in an
+@code{address_operand}).  @var{index_code} is the code of the corresponding
+index expression if @var{outer_code} is @code{PLUS}; @code{SCRATCH} otherwise.
+@end defmac
+
+@defmac INDEX_REG_CLASS
+A macro whose definition is the name of the class to which a valid
+index register must belong.  An index register is one used in an
+address where its value is either multiplied by a scale factor or
+added to another register (as well as added to a displacement).
+@end defmac
+
+@defmac REGNO_OK_FOR_BASE_P (@var{num})
+A C expression which is nonzero if register number @var{num} is
+suitable for use as a base register in operand addresses.
+@end defmac
+
+@defmac REGNO_MODE_OK_FOR_BASE_P (@var{num}, @var{mode})
+A C expression that is just like @code{REGNO_OK_FOR_BASE_P}, except that
+that expression may examine the mode of the memory reference in
+@var{mode}.  You should define this macro if the mode of the memory
+reference affects whether a register may be used as a base register.  If
+you define this macro, the compiler will use it instead of
+@code{REGNO_OK_FOR_BASE_P}.  The mode may be @code{VOIDmode} for
+addresses that appear outside a @code{MEM}, i.e., as an
+@code{address_operand}.
+@end defmac
+
+@defmac REGNO_MODE_OK_FOR_REG_BASE_P (@var{num}, @var{mode})
+A C expression which is nonzero if register number @var{num} is suitable for
+use as a base register in base plus index operand addresses, accessing
+memory in mode @var{mode}.  It may be either a suitable hard register or a
+pseudo register that has been allocated such a hard register.  You should
+define this macro if base plus index addresses have different requirements
+than other base register uses.
+
+Use of this macro is deprecated; please use the more general
+@code{REGNO_MODE_CODE_OK_FOR_BASE_P}.
+@end defmac
+
+@defmac REGNO_MODE_CODE_OK_FOR_BASE_P (@var{num}, @var{mode}, @var{outer_code}, @var{index_code})
+A C expression that is just like @code{REGNO_MODE_OK_FOR_BASE_P}, except
+that that expression may examine the context in which the register
+appears in the memory reference.  @var{outer_code} is the code of the
+immediately enclosing expression (@code{MEM} if at the top level of the
+address, @code{ADDRESS} for something that occurs in an
+@code{address_operand}).  @var{index_code} is the code of the
+corresponding index expression if @var{outer_code} is @code{PLUS};
+@code{SCRATCH} otherwise.  The mode may be @code{VOIDmode} for addresses
+that appear outside a @code{MEM}, i.e., as an @code{address_operand}.
+@end defmac
+
+@defmac REGNO_OK_FOR_INDEX_P (@var{num})
+A C expression which is nonzero if register number @var{num} is
+suitable for use as an index register in operand addresses.  It may be
+either a suitable hard register or a pseudo register that has been
+allocated such a hard register.
+
+The difference between an index register and a base register is that
+the index register may be scaled.  If an address involves the sum of
+two registers, neither one of them scaled, then either one may be
+labeled the ``base'' and the other the ``index''; but whichever
+labeling is used must fit the machine's constraints of which registers
+may serve in each capacity.  The compiler will try both labelings,
+looking for one that is valid, and will reload one or both registers
+only if neither labeling works.
+@end defmac
+
+@hook TARGET_PREFERRED_RENAME_CLASS
+
+@hook TARGET_PREFERRED_RELOAD_CLASS
+A target hook that places additional restrictions on the register class
+to use when it is necessary to copy value @var{x} into a register in class
+@var{rclass}.  The value is a register class; perhaps @var{rclass}, or perhaps
+another, smaller class.
+
+The default version of this hook always returns value of @code{rclass} argument.
+
+Sometimes returning a more restrictive class makes better code.  For
+example, on the 68000, when @var{x} is an integer constant that is in range
+for a @samp{moveq} instruction, the value of this macro is always
+@code{DATA_REGS} as long as @var{rclass} includes the data registers.
+Requiring a data register guarantees that a @samp{moveq} will be used.
+
+One case where @code{TARGET_PREFERRED_RELOAD_CLASS} must not return
+@var{rclass} is if @var{x} is a legitimate constant which cannot be
+loaded into some register class.  By returning @code{NO_REGS} you can
+force @var{x} into a memory location.  For example, rs6000 can load
+immediate values into general-purpose registers, but does not have an
+instruction for loading an immediate value into a floating-point
+register, so @code{TARGET_PREFERRED_RELOAD_CLASS} returns @code{NO_REGS} when
+@var{x} is a floating-point constant.  If the constant can't be loaded
+into any kind of register, code generation will be better if
+@code{LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead
+of using @code{TARGET_PREFERRED_RELOAD_CLASS}.
+
+If an insn has pseudos in it after register allocation, reload will go
+through the alternatives and call repeatedly @code{TARGET_PREFERRED_RELOAD_CLASS}
+to find the best one.  Returning @code{NO_REGS}, in this case, makes
+reload add a @code{!} in front of the constraint: the x86 back-end uses
+this feature to discourage usage of 387 registers when math is done in
+the SSE registers (and vice versa).
+@end deftypefn
+
+@defmac PREFERRED_RELOAD_CLASS (@var{x}, @var{class})
+A C expression that places additional restrictions on the register class
+to use when it is necessary to copy value @var{x} into a register in class
+@var{class}.  The value is a register class; perhaps @var{class}, or perhaps
+another, smaller class.  On many machines, the following definition is
+safe:
+
+@smallexample
+#define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
+@end smallexample
+
+Sometimes returning a more restrictive class makes better code.  For
+example, on the 68000, when @var{x} is an integer constant that is in range
+for a @samp{moveq} instruction, the value of this macro is always
+@code{DATA_REGS} as long as @var{class} includes the data registers.
+Requiring a data register guarantees that a @samp{moveq} will be used.
+
+One case where @code{PREFERRED_RELOAD_CLASS} must not return
+@var{class} is if @var{x} is a legitimate constant which cannot be
+loaded into some register class.  By returning @code{NO_REGS} you can
+force @var{x} into a memory location.  For example, rs6000 can load
+immediate values into general-purpose registers, but does not have an
+instruction for loading an immediate value into a floating-point
+register, so @code{PREFERRED_RELOAD_CLASS} returns @code{NO_REGS} when
+@var{x} is a floating-point constant.  If the constant can't be loaded
+into any kind of register, code generation will be better if
+@code{LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead
+of using @code{PREFERRED_RELOAD_CLASS}.
+
+If an insn has pseudos in it after register allocation, reload will go
+through the alternatives and call repeatedly @code{PREFERRED_RELOAD_CLASS}
+to find the best one.  Returning @code{NO_REGS}, in this case, makes
+reload add a @code{!} in front of the constraint: the x86 back-end uses
+this feature to discourage usage of 387 registers when math is done in
+the SSE registers (and vice versa).
+@end defmac
+
+@defmac PREFERRED_OUTPUT_RELOAD_CLASS (@var{x}, @var{class})
+Like @code{PREFERRED_RELOAD_CLASS}, but for output reloads instead of
+input reloads.  If you don't define this macro, the default is to use
+@var{class}, unchanged.
+
+You can also use @code{PREFERRED_OUTPUT_RELOAD_CLASS} to discourage
+reload from using some alternatives, like @code{PREFERRED_RELOAD_CLASS}.
+@end defmac
+
+@hook TARGET_PREFERRED_OUTPUT_RELOAD_CLASS
+Like @code{TARGET_PREFERRED_RELOAD_CLASS}, but for output reloads instead of
+input reloads.
+
+The default version of this hook always returns value of @code{rclass}
+argument.
+
+You can also use @code{TARGET_PREFERRED_OUTPUT_RELOAD_CLASS} to discourage
+reload from using some alternatives, like @code{TARGET_PREFERRED_RELOAD_CLASS}.
+@end deftypefn
+
+@defmac LIMIT_RELOAD_CLASS (@var{mode}, @var{class})
+A C expression that places additional restrictions on the register class
+to use when it is necessary to be able to hold a value of mode
+@var{mode} in a reload register for which class @var{class} would
+ordinarily be used.
+
+Unlike @code{PREFERRED_RELOAD_CLASS}, this macro should be used when
+there are certain modes that simply can't go in certain reload classes.
+
+The value is a register class; perhaps @var{class}, or perhaps another,
+smaller class.
+
+Don't define this macro unless the target machine has limitations which
+require the macro to do something nontrivial.
+@end defmac
+
+@hook TARGET_SECONDARY_RELOAD
+Many machines have some registers that cannot be copied directly to or
+from memory or even from other types of registers.  An example is the
+@samp{MQ} register, which on most machines, can only be copied to or
+from general registers, but not memory.  Below, we shall be using the
+term 'intermediate register' when a move operation cannot be performed
+directly, but has to be done by copying the source into the intermediate
+register first, and then copying the intermediate register to the
+destination.  An intermediate register always has the same mode as
+source and destination.  Since it holds the actual value being copied,
+reload might apply optimizations to re-use an intermediate register
+and eliding the copy from the source when it can determine that the
+intermediate register still holds the required value.
+
+Another kind of secondary reload is required on some machines which
+allow copying all registers to and from memory, but require a scratch
+register for stores to some memory locations (e.g., those with symbolic
+address on the RT, and those with certain symbolic address on the SPARC
+when compiling PIC)@.  Scratch registers need not have the same mode
+as the value being copied, and usually hold a different value than
+that being copied.  Special patterns in the md file are needed to
+describe how the copy is performed with the help of the scratch register;
+these patterns also describe the number, register class(es) and mode(s)
+of the scratch register(s).
+
+In some cases, both an intermediate and a scratch register are required.
+
+For input reloads, this target hook is called with nonzero @var{in_p},
+and @var{x} is an rtx that needs to be copied to a register of class
+@var{reload_class} in @var{reload_mode}.  For output reloads, this target
+hook is called with zero @var{in_p}, and a register of class @var{reload_class}
+needs to be copied to rtx @var{x} in @var{reload_mode}.
+
+If copying a register of @var{reload_class} from/to @var{x} requires
+an intermediate register, the hook @code{secondary_reload} should
+return the register class required for this intermediate register.
+If no intermediate register is required, it should return NO_REGS.
+If more than one intermediate register is required, describe the one
+that is closest in the copy chain to the reload register.
+
+If scratch registers are needed, you also have to describe how to
+perform the copy from/to the reload register to/from this
+closest intermediate register.  Or if no intermediate register is
+required, but still a scratch register is needed, describe the
+copy  from/to the reload register to/from the reload operand @var{x}.
+
+You do this by setting @code{sri->icode} to the instruction code of a pattern
+in the md file which performs the move.  Operands 0 and 1 are the output
+and input of this copy, respectively.  Operands from operand 2 onward are
+for scratch operands.  These scratch operands must have a mode, and a
+single-register-class
+@c [later: or memory]
+output constraint.
+
+When an intermediate register is used, the @code{secondary_reload}
+hook will be called again to determine how to copy the intermediate
+register to/from the reload operand @var{x}, so your hook must also
+have code to handle the register class of the intermediate operand.
+
+@c [For later: maybe we'll allow multi-alternative reload patterns -
+@c   the port maintainer could name a mov<mode> pattern that has clobbers -
+@c   and match the constraints of input and output to determine the required
+@c   alternative.  A restriction would be that constraints used to match
+@c   against reloads registers would have to be written as register class
+@c   constraints, or we need a new target macro / hook that tells us if an
+@c   arbitrary constraint can match an unknown register of a given class.
+@c   Such a macro / hook would also be useful in other places.]
+
+
+@var{x} might be a pseudo-register or a @code{subreg} of a
+pseudo-register, which could either be in a hard register or in memory.
+Use @code{true_regnum} to find out; it will return @minus{}1 if the pseudo is
+in memory and the hard register number if it is in a register.
+
+Scratch operands in memory (constraint @code{"=m"} / @code{"=&m"}) are
+currently not supported.  For the time being, you will have to continue
+to use @code{SECONDARY_MEMORY_NEEDED} for that purpose.
+
+@code{copy_cost} also uses this target hook to find out how values are
+copied.  If you want it to include some extra cost for the need to allocate
+(a) scratch register(s), set @code{sri->extra_cost} to the additional cost.
+Or if two dependent moves are supposed to have a lower cost than the sum
+of the individual moves due to expected fortuitous scheduling and/or special
+forwarding logic, you can set @code{sri->extra_cost} to a negative amount.
+@end deftypefn
+
+@defmac SECONDARY_RELOAD_CLASS (@var{class}, @var{mode}, @var{x})
+@defmacx SECONDARY_INPUT_RELOAD_CLASS (@var{class}, @var{mode}, @var{x})
+@defmacx SECONDARY_OUTPUT_RELOAD_CLASS (@var{class}, @var{mode}, @var{x})
+These macros are obsolete, new ports should use the target hook
+@code{TARGET_SECONDARY_RELOAD} instead.
+
+These are obsolete macros, replaced by the @code{TARGET_SECONDARY_RELOAD}
+target hook.  Older ports still define these macros to indicate to the
+reload phase that it may
+need to allocate at least one register for a reload in addition to the
+register to contain the data.  Specifically, if copying @var{x} to a
+register @var{class} in @var{mode} requires an intermediate register,
+you were supposed to define @code{SECONDARY_INPUT_RELOAD_CLASS} to return the
+largest register class all of whose registers can be used as
+intermediate registers or scratch registers.
+
+If copying a register @var{class} in @var{mode} to @var{x} requires an
+intermediate or scratch register, @code{SECONDARY_OUTPUT_RELOAD_CLASS}
+was supposed to be defined be defined to return the largest register
+class required.  If the
+requirements for input and output reloads were the same, the macro
+@code{SECONDARY_RELOAD_CLASS} should have been used instead of defining both
+macros identically.
+
+The values returned by these macros are often @code{GENERAL_REGS}.
+Return @code{NO_REGS} if no spare register is needed; i.e., if @var{x}
+can be directly copied to or from a register of @var{class} in
+@var{mode} without requiring a scratch register.  Do not define this
+macro if it would always return @code{NO_REGS}.
+
+If a scratch register is required (either with or without an
+intermediate register), you were supposed to define patterns for
+@samp{reload_in@var{m}} or @samp{reload_out@var{m}}, as required
+(@pxref{Standard Names}.  These patterns, which were normally
+implemented with a @code{define_expand}, should be similar to the
+@samp{mov@var{m}} patterns, except that operand 2 is the scratch
+register.
+
+These patterns need constraints for the reload register and scratch
+register that
+contain a single register class.  If the original reload register (whose
+class is @var{class}) can meet the constraint given in the pattern, the
+value returned by these macros is used for the class of the scratch
+register.  Otherwise, two additional reload registers are required.
+Their classes are obtained from the constraints in the insn pattern.
+
+@var{x} might be a pseudo-register or a @code{subreg} of a
+pseudo-register, which could either be in a hard register or in memory.
+Use @code{true_regnum} to find out; it will return @minus{}1 if the pseudo is
+in memory and the hard register number if it is in a register.
+
+These macros should not be used in the case where a particular class of
+registers can only be copied to memory and not to another class of
+registers.  In that case, secondary reload registers are not needed and
+would not be helpful.  Instead, a stack location must be used to perform
+the copy and the @code{mov@var{m}} pattern should use memory as an
+intermediate storage.  This case often occurs between floating-point and
+general registers.
+@end defmac
+
+@defmac SECONDARY_MEMORY_NEEDED (@var{class1}, @var{class2}, @var{m})
+Certain machines have the property that some registers cannot be copied
+to some other registers without using memory.  Define this macro on
+those machines to be a C expression that is nonzero if objects of mode
+@var{m} in registers of @var{class1} can only be copied to registers of
+class @var{class2} by storing a register of @var{class1} into memory
+and loading that memory location into a register of @var{class2}.
+
+Do not define this macro if its value would always be zero.
+@end defmac
+
+@defmac SECONDARY_MEMORY_NEEDED_RTX (@var{mode})
+Normally when @code{SECONDARY_MEMORY_NEEDED} is defined, the compiler
+allocates a stack slot for a memory location needed for register copies.
+If this macro is defined, the compiler instead uses the memory location
+defined by this macro.
+
+Do not define this macro if you do not define
+@code{SECONDARY_MEMORY_NEEDED}.
+@end defmac
+
+@defmac SECONDARY_MEMORY_NEEDED_MODE (@var{mode})
+When the compiler needs a secondary memory location to copy between two
+registers of mode @var{mode}, it normally allocates sufficient memory to
+hold a quantity of @code{BITS_PER_WORD} bits and performs the store and
+load operations in a mode that many bits wide and whose class is the
+same as that of @var{mode}.
+
+This is right thing to do on most machines because it ensures that all
+bits of the register are copied and prevents accesses to the registers
+in a narrower mode, which some machines prohibit for floating-point
+registers.
+
+However, this default behavior is not correct on some machines, such as
+the DEC Alpha, that store short integers in floating-point registers
+differently than in integer registers.  On those machines, the default
+widening will not work correctly and you must define this macro to
+suppress that widening in some cases.  See the file @file{alpha.h} for
+details.
+
+Do not define this macro if you do not define
+@code{SECONDARY_MEMORY_NEEDED} or if widening @var{mode} to a mode that
+is @code{BITS_PER_WORD} bits wide is correct for your machine.
+@end defmac
+
+@hook TARGET_CLASS_LIKELY_SPILLED_P
+A target hook which returns @code{true} if pseudos that have been assigned
+to registers of class @var{rclass} would likely be spilled because
+registers of @var{rclass} are needed for spill registers.
+
+The default version of this target hook returns @code{true} if @var{rclass}
+has exactly one register and @code{false} otherwise.  On most machines, this
+default should be used.  Only use this target hook to some other expression
+if pseudos allocated by @file{local-alloc.c} end up in memory because their
+hard registers were needed for spill registers.  If this target hook returns
+@code{false} for those classes, those pseudos will only be allocated by
+@file{global.c}, which knows how to reallocate the pseudo to another
+register.  If there would not be another register available for reallocation,
+you should not change the implementation of this target hook since
+the only effect of such implementation would be to slow down register
+allocation.
+@end deftypefn
+
+@defmac CLASS_MAX_NREGS (@var{class}, @var{mode})
+A C expression for the maximum number of consecutive registers
+of class @var{class} needed to hold a value of mode @var{mode}.
+
+This is closely related to the macro @code{HARD_REGNO_NREGS}.  In fact,
+the value of the macro @code{CLASS_MAX_NREGS (@var{class}, @var{mode})}
+should be the maximum value of @code{HARD_REGNO_NREGS (@var{regno},
+@var{mode})} for all @var{regno} values in the class @var{class}.
+
+This macro helps control the handling of multiple-word values
+in the reload pass.
+@end defmac
+
+@defmac CANNOT_CHANGE_MODE_CLASS (@var{from}, @var{to}, @var{class})
+If defined, a C expression that returns nonzero for a @var{class} for which
+a change from mode @var{from} to mode @var{to} is invalid.
+
+For the example, loading 32-bit integer or floating-point objects into
+floating-point registers on the Alpha extends them to 64 bits.
+Therefore loading a 64-bit object and then storing it as a 32-bit object
+does not store the low-order 32 bits, as would be the case for a normal
+register.  Therefore, @file{alpha.h} defines @code{CANNOT_CHANGE_MODE_CLASS}
+as below:
+
+@smallexample
+#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
+  (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
+   ? reg_classes_intersect_p (FLOAT_REGS, (CLASS)) : 0)
+@end smallexample
+@end defmac
+
+@hook TARGET_IRA_COVER_CLASSES
+Return an array of cover classes for the Integrated Register Allocator
+(@acronym{IRA}).  Cover classes are a set of non-intersecting register
+classes covering all hard registers used for register allocation
+purposes.  If a move between two registers in the same cover class is
+possible, it should be cheaper than a load or store of the registers.
+The array is terminated by a @code{LIM_REG_CLASSES} element.
+
+The order of cover classes in the array is important.  If two classes
+have the same cost of usage for a pseudo, the class occurred first in
+the array is chosen for the pseudo.
+
+This hook is called once at compiler startup, after the command-line
+options have been processed. It is then re-examined by every call to
+@code{target_reinit}.
+
+The default implementation returns @code{IRA_COVER_CLASSES}, if defined,
+otherwise there is no default implementation.  You must define either this
+macro or @code{IRA_COVER_CLASSES} in order to use the integrated register
+allocator with Chaitin-Briggs coloring. If the macro is not defined,
+the only available coloring algorithm is Chow's priority coloring.
+
+This hook must not be modified from @code{NULL} to non-@code{NULL} or
+vice versa by command-line option processing.
+@end deftypefn
+
+@defmac IRA_COVER_CLASSES
+See the documentation for @code{TARGET_IRA_COVER_CLASSES}.
+@end defmac
+
+@node Old Constraints
+@section Obsolete Macros for Defining Constraints
+@cindex defining constraints, obsolete method
+@cindex constraints, defining, obsolete method
+
+Machine-specific constraints can be defined with these macros instead
+of the machine description constructs described in @ref{Define
+Constraints}.  This mechanism is obsolete.  New ports should not use
+it; old ports should convert to the new mechanism.
+
+@defmac CONSTRAINT_LEN (@var{char}, @var{str})
+For the constraint at the start of @var{str}, which starts with the letter
+@var{c}, return the length.  This allows you to have register class /
+constant / extra constraints that are longer than a single letter;
+you don't need to define this macro if you can do with single-letter
+constraints only.  The definition of this macro should use
+DEFAULT_CONSTRAINT_LEN for all the characters that you don't want
+to handle specially.
+There are some sanity checks in genoutput.c that check the constraint lengths
+for the md file, so you can also use this macro to help you while you are
+transitioning from a byzantine single-letter-constraint scheme: when you
+return a negative length for a constraint you want to re-use, genoutput
+will complain about every instance where it is used in the md file.
+@end defmac
+
+@defmac REG_CLASS_FROM_LETTER (@var{char})
+A C expression which defines the machine-dependent operand constraint
+letters for register classes.  If @var{char} is such a letter, the
+value should be the register class corresponding to it.  Otherwise,
+the value should be @code{NO_REGS}.  The register letter @samp{r},
+corresponding to class @code{GENERAL_REGS}, will not be passed
+to this macro; you do not need to handle it.
+@end defmac
+
+@defmac REG_CLASS_FROM_CONSTRAINT (@var{char}, @var{str})
+Like @code{REG_CLASS_FROM_LETTER}, but you also get the constraint string
+passed in @var{str}, so that you can use suffixes to distinguish between
+different variants.
+@end defmac
+
+@defmac CONST_OK_FOR_LETTER_P (@var{value}, @var{c})
+A C expression that defines the machine-dependent operand constraint
+letters (@samp{I}, @samp{J}, @samp{K}, @dots{} @samp{P}) that specify
+particular ranges of integer values.  If @var{c} is one of those
+letters, the expression should check that @var{value}, an integer, is in
+the appropriate range and return 1 if so, 0 otherwise.  If @var{c} is
+not one of those letters, the value should be 0 regardless of
+@var{value}.
+@end defmac
+
+@defmac CONST_OK_FOR_CONSTRAINT_P (@var{value}, @var{c}, @var{str})
+Like @code{CONST_OK_FOR_LETTER_P}, but you also get the constraint
+string passed in @var{str}, so that you can use suffixes to distinguish
+between different variants.
+@end defmac
+
+@defmac CONST_DOUBLE_OK_FOR_LETTER_P (@var{value}, @var{c})
+A C expression that defines the machine-dependent operand constraint
+letters that specify particular ranges of @code{const_double} values
+(@samp{G} or @samp{H}).
+
+If @var{c} is one of those letters, the expression should check that
+@var{value}, an RTX of code @code{const_double}, is in the appropriate
+range and return 1 if so, 0 otherwise.  If @var{c} is not one of those
+letters, the value should be 0 regardless of @var{value}.
+
+@code{const_double} is used for all floating-point constants and for
+@code{DImode} fixed-point constants.  A given letter can accept either
+or both kinds of values.  It can use @code{GET_MODE} to distinguish
+between these kinds.
+@end defmac
+
+@defmac CONST_DOUBLE_OK_FOR_CONSTRAINT_P (@var{value}, @var{c}, @var{str})
+Like @code{CONST_DOUBLE_OK_FOR_LETTER_P}, but you also get the constraint
+string passed in @var{str}, so that you can use suffixes to distinguish
+between different variants.
+@end defmac
+
+@defmac EXTRA_CONSTRAINT (@var{value}, @var{c})
+A C expression that defines the optional machine-dependent constraint
+letters that can be used to segregate specific types of operands, usually
+memory references, for the target machine.  Any letter that is not
+elsewhere defined and not matched by @code{REG_CLASS_FROM_LETTER} /
+@code{REG_CLASS_FROM_CONSTRAINT}
+may be used.  Normally this macro will not be defined.
+
+If it is required for a particular target machine, it should return 1
+if @var{value} corresponds to the operand type represented by the
+constraint letter @var{c}.  If @var{c} is not defined as an extra
+constraint, the value returned should be 0 regardless of @var{value}.
+
+For example, on the ROMP, load instructions cannot have their output
+in r0 if the memory reference contains a symbolic address.  Constraint
+letter @samp{Q} is defined as representing a memory address that does
+@emph{not} contain a symbolic address.  An alternative is specified with
+a @samp{Q} constraint on the input and @samp{r} on the output.  The next
+alternative specifies @samp{m} on the input and a register class that
+does not include r0 on the output.
+@end defmac
+
+@defmac EXTRA_CONSTRAINT_STR (@var{value}, @var{c}, @var{str})
+Like @code{EXTRA_CONSTRAINT}, but you also get the constraint string passed
+in @var{str}, so that you can use suffixes to distinguish between different
+variants.
+@end defmac
+
+@defmac EXTRA_MEMORY_CONSTRAINT (@var{c}, @var{str})
+A C expression that defines the optional machine-dependent constraint
+letters, amongst those accepted by @code{EXTRA_CONSTRAINT}, that should
+be treated like memory constraints by the reload pass.
+
+It should return 1 if the operand type represented by the constraint
+at the start of @var{str}, the first letter of which is the letter @var{c},
+comprises a subset of all memory references including
+all those whose address is simply a base register.  This allows the reload
+pass to reload an operand, if it does not directly correspond to the operand
+type of @var{c}, by copying its address into a base register.
+
+For example, on the S/390, some instructions do not accept arbitrary
+memory references, but only those that do not make use of an index
+register.  The constraint letter @samp{Q} is defined via
+@code{EXTRA_CONSTRAINT} as representing a memory address of this type.
+If the letter @samp{Q} is marked as @code{EXTRA_MEMORY_CONSTRAINT},
+a @samp{Q} constraint can handle any memory operand, because the
+reload pass knows it can be reloaded by copying the memory address
+into a base register if required.  This is analogous to the way
+an @samp{o} constraint can handle any memory operand.
+@end defmac
+
+@defmac EXTRA_ADDRESS_CONSTRAINT (@var{c}, @var{str})
+A C expression that defines the optional machine-dependent constraint
+letters, amongst those accepted by @code{EXTRA_CONSTRAINT} /
+@code{EXTRA_CONSTRAINT_STR}, that should
+be treated like address constraints by the reload pass.
+
+It should return 1 if the operand type represented by the constraint
+at the start of @var{str}, which starts with the letter @var{c}, comprises
+a subset of all memory addresses including
+all those that consist of just a base register.  This allows the reload
+pass to reload an operand, if it does not directly correspond to the operand
+type of @var{str}, by copying it into a base register.
+
+Any constraint marked as @code{EXTRA_ADDRESS_CONSTRAINT} can only
+be used with the @code{address_operand} predicate.  It is treated
+analogously to the @samp{p} constraint.
+@end defmac
+
+@node Stack and Calling
+@section Stack Layout and Calling Conventions
+@cindex calling conventions
+
+@c prevent bad page break with this line
+This describes the stack layout and calling conventions.
+
+@menu
+* Frame Layout::
+* Exception Handling::
+* Stack Checking::
+* Frame Registers::
+* Elimination::
+* Stack Arguments::
+* Register Arguments::
+* Scalar Return::
+* Aggregate Return::
+* Caller Saves::
+* Function Entry::
+* Profiling::
+* Tail Calls::
+* Stack Smashing Protection::
+@end menu
+
+@node Frame Layout
+@subsection Basic Stack Layout
+@cindex stack frame layout
+@cindex frame layout
+
+@c prevent bad page break with this line
+Here is the basic stack layout.
+
+@defmac STACK_GROWS_DOWNWARD
+Define this macro if pushing a word onto the stack moves the stack
+pointer to a smaller address.
+
+When we say, ``define this macro if @dots{}'', it means that the
+compiler checks this macro only with @code{#ifdef} so the precise
+definition used does not matter.
+@end defmac
+
+@defmac STACK_PUSH_CODE
+This macro defines the operation used when something is pushed
+on the stack.  In RTL, a push operation will be
+@code{(set (mem (STACK_PUSH_CODE (reg sp))) @dots{})}
+
+The choices are @code{PRE_DEC}, @code{POST_DEC}, @code{PRE_INC},
+and @code{POST_INC}.  Which of these is correct depends on
+the stack direction and on whether the stack pointer points
+to the last item on the stack or whether it points to the
+space for the next item on the stack.
+
+The default is @code{PRE_DEC} when @code{STACK_GROWS_DOWNWARD} is
+defined, which is almost always right, and @code{PRE_INC} otherwise,
+which is often wrong.
+@end defmac
+
+@defmac FRAME_GROWS_DOWNWARD
+Define this macro to nonzero value if the addresses of local variable slots
+are at negative offsets from the frame pointer.
+@end defmac
+
+@defmac ARGS_GROW_DOWNWARD
+Define this macro if successive arguments to a function occupy decreasing
+addresses on the stack.
+@end defmac
+
+@defmac STARTING_FRAME_OFFSET
+Offset from the frame pointer to the first local variable slot to be allocated.
+
+If @code{FRAME_GROWS_DOWNWARD}, find the next slot's offset by
+subtracting the first slot's length from @code{STARTING_FRAME_OFFSET}.
+Otherwise, it is found by adding the length of the first slot to the
+value @code{STARTING_FRAME_OFFSET}.
+@c i'm not sure if the above is still correct.. had to change it to get
+@c rid of an overfull.  --mew 2feb93
+@end defmac
+
+@defmac STACK_ALIGNMENT_NEEDED
+Define to zero to disable final alignment of the stack during reload.
+The nonzero default for this macro is suitable for most ports.
+
+On ports where @code{STARTING_FRAME_OFFSET} is nonzero or where there
+is a register save block following the local block that doesn't require
+alignment to @code{STACK_BOUNDARY}, it may be beneficial to disable
+stack alignment and do it in the backend.
+@end defmac
+
+@defmac STACK_POINTER_OFFSET
+Offset from the stack pointer register to the first location at which
+outgoing arguments are placed.  If not specified, the default value of
+zero is used.  This is the proper value for most machines.
+
+If @code{ARGS_GROW_DOWNWARD}, this is the offset to the location above
+the first location at which outgoing arguments are placed.
+@end defmac
+
+@defmac FIRST_PARM_OFFSET (@var{fundecl})
+Offset from the argument pointer register to the first argument's
+address.  On some machines it may depend on the data type of the
+function.
+
+If @code{ARGS_GROW_DOWNWARD}, this is the offset to the location above
+the first argument's address.
+@end defmac
+
+@defmac STACK_DYNAMIC_OFFSET (@var{fundecl})
+Offset from the stack pointer register to an item dynamically allocated
+on the stack, e.g., by @code{alloca}.
+
+The default value for this macro is @code{STACK_POINTER_OFFSET} plus the
+length of the outgoing arguments.  The default is correct for most
+machines.  See @file{function.c} for details.
+@end defmac
+
+@defmac INITIAL_FRAME_ADDRESS_RTX
+A C expression whose value is RTL representing the address of the initial
+stack frame. This address is passed to @code{RETURN_ADDR_RTX} and
+@code{DYNAMIC_CHAIN_ADDRESS}.  If you don't define this macro, a reasonable
+default value will be used.  Define this macro in order to make frame pointer
+elimination work in the presence of @code{__builtin_frame_address (count)} and
+@code{__builtin_return_address (count)} for @code{count} not equal to zero.
+@end defmac
+
+@defmac DYNAMIC_CHAIN_ADDRESS (@var{frameaddr})
+A C expression whose value is RTL representing the address in a stack
+frame where the pointer to the caller's frame is stored.  Assume that
+@var{frameaddr} is an RTL expression for the address of the stack frame
+itself.
+
+If you don't define this macro, the default is to return the value
+of @var{frameaddr}---that is, the stack frame address is also the
+address of the stack word that points to the previous frame.
+@end defmac
+
+@defmac SETUP_FRAME_ADDRESSES
+If defined, a C expression that produces the machine-specific code to
+setup the stack so that arbitrary frames can be accessed.  For example,
+on the SPARC, we must flush all of the register windows to the stack
+before we can access arbitrary stack frames.  You will seldom need to
+define this macro.
+@end defmac
+
+@hook TARGET_BUILTIN_SETJMP_FRAME_VALUE
+This target hook should return an rtx that is used to store
+the address of the current frame into the built in @code{setjmp} buffer.
+The default value, @code{virtual_stack_vars_rtx}, is correct for most
+machines.  One reason you may need to define this target hook is if
+@code{hard_frame_pointer_rtx} is the appropriate value on your machine.
+@end deftypefn
+
+@defmac FRAME_ADDR_RTX (@var{frameaddr})
+A C expression whose value is RTL representing the value of the frame
+address for the current frame.  @var{frameaddr} is the frame pointer
+of the current frame.  This is used for __builtin_frame_address.
+You need only define this macro if the frame address is not the same
+as the frame pointer.  Most machines do not need to define it.
+@end defmac
+
+@defmac RETURN_ADDR_RTX (@var{count}, @var{frameaddr})
+A C expression whose value is RTL representing the value of the return
+address for the frame @var{count} steps up from the current frame, after
+the prologue.  @var{frameaddr} is the frame pointer of the @var{count}
+frame, or the frame pointer of the @var{count} @minus{} 1 frame if
+@code{RETURN_ADDR_IN_PREVIOUS_FRAME} is defined.
+
+The value of the expression must always be the correct address when
+@var{count} is zero, but may be @code{NULL_RTX} if there is no way to
+determine the return address of other frames.
+@end defmac
+
+@defmac RETURN_ADDR_IN_PREVIOUS_FRAME
+Define this if the return address of a particular stack frame is accessed
+from the frame pointer of the previous stack frame.
+@end defmac
+
+@defmac INCOMING_RETURN_ADDR_RTX
+A C expression whose value is RTL representing the location of the
+incoming return address at the beginning of any function, before the
+prologue.  This RTL is either a @code{REG}, indicating that the return
+value is saved in @samp{REG}, or a @code{MEM} representing a location in
+the stack.
+
+You only need to define this macro if you want to support call frame
+debugging information like that provided by DWARF 2.
+
+If this RTL is a @code{REG}, you should also define
+@code{DWARF_FRAME_RETURN_COLUMN} to @code{DWARF_FRAME_REGNUM (REGNO)}.
+@end defmac
+
+@defmac DWARF_ALT_FRAME_RETURN_COLUMN
+A C expression whose value is an integer giving a DWARF 2 column
+number that may be used as an alternative return column.  The column
+must not correspond to any gcc hard register (that is, it must not
+be in the range of @code{DWARF_FRAME_REGNUM}).
+
+This macro can be useful if @code{DWARF_FRAME_RETURN_COLUMN} is set to a
+general register, but an alternative column needs to be used for signal
+frames.  Some targets have also used different frame return columns
+over time.
+@end defmac
+
+@defmac DWARF_ZERO_REG
+A C expression whose value is an integer giving a DWARF 2 register
+number that is considered to always have the value zero.  This should
+only be defined if the target has an architected zero register, and
+someone decided it was a good idea to use that register number to
+terminate the stack backtrace.  New ports should avoid this.
+@end defmac
+
+@hook TARGET_DWARF_HANDLE_FRAME_UNSPEC
+This target hook allows the backend to emit frame-related insns that
+contain UNSPECs or UNSPEC_VOLATILEs.  The DWARF 2 call frame debugging
+info engine will invoke it on insns of the form
+@smallexample
+(set (reg) (unspec [@dots{}] UNSPEC_INDEX))
+@end smallexample
+and
+@smallexample
+(set (reg) (unspec_volatile [@dots{}] UNSPECV_INDEX)).
+@end smallexample
+to let the backend emit the call frame instructions.  @var{label} is
+the CFI label attached to the insn, @var{pattern} is the pattern of
+the insn and @var{index} is @code{UNSPEC_INDEX} or @code{UNSPECV_INDEX}.
+@end deftypefn
+
+@defmac INCOMING_FRAME_SP_OFFSET
+A C expression whose value is an integer giving the offset, in bytes,
+from the value of the stack pointer register to the top of the stack
+frame at the beginning of any function, before the prologue.  The top of
+the frame is defined to be the value of the stack pointer in the
+previous frame, just before the call instruction.
+
+You only need to define this macro if you want to support call frame
+debugging information like that provided by DWARF 2.
+@end defmac
+
+@defmac ARG_POINTER_CFA_OFFSET (@var{fundecl})
+A C expression whose value is an integer giving the offset, in bytes,
+from the argument pointer to the canonical frame address (cfa).  The
+final value should coincide with that calculated by
+@code{INCOMING_FRAME_SP_OFFSET}.  Which is unfortunately not usable
+during virtual register instantiation.
+
+The default value for this macro is
+@code{FIRST_PARM_OFFSET (fundecl) + crtl->args.pretend_args_size},
+which is correct for most machines; in general, the arguments are found
+immediately before the stack frame.  Note that this is not the case on
+some targets that save registers into the caller's frame, such as SPARC
+and rs6000, and so such targets need to define this macro.
+
+You only need to define this macro if the default is incorrect, and you
+want to support call frame debugging information like that provided by
+DWARF 2.
+@end defmac
+
+@defmac FRAME_POINTER_CFA_OFFSET (@var{fundecl})
+If defined, a C expression whose value is an integer giving the offset
+in bytes from the frame pointer to the canonical frame address (cfa).
+The final value should coincide with that calculated by
+@code{INCOMING_FRAME_SP_OFFSET}.
+
+Normally the CFA is calculated as an offset from the argument pointer,
+via @code{ARG_POINTER_CFA_OFFSET}, but if the argument pointer is
+variable due to the ABI, this may not be possible.  If this macro is
+defined, it implies that the virtual register instantiation should be
+based on the frame pointer instead of the argument pointer.  Only one
+of @code{FRAME_POINTER_CFA_OFFSET} and @code{ARG_POINTER_CFA_OFFSET}
+should be defined.
+@end defmac
+
+@defmac CFA_FRAME_BASE_OFFSET (@var{fundecl})
+If defined, a C expression whose value is an integer giving the offset
+in bytes from the canonical frame address (cfa) to the frame base used
+in DWARF 2 debug information.  The default is zero.  A different value
+may reduce the size of debug information on some ports.
+@end defmac
+
+@node Exception Handling
+@subsection Exception Handling Support
+@cindex exception handling
+
+@defmac EH_RETURN_DATA_REGNO (@var{N})
+A C expression whose value is the @var{N}th register number used for
+data by exception handlers, or @code{INVALID_REGNUM} if fewer than
+@var{N} registers are usable.
+
+The exception handling library routines communicate with the exception
+handlers via a set of agreed upon registers.  Ideally these registers
+should be call-clobbered; it is possible to use call-saved registers,
+but may negatively impact code size.  The target must support at least
+2 data registers, but should define 4 if there are enough free registers.
+
+You must define this macro if you want to support call frame exception
+handling like that provided by DWARF 2.
+@end defmac
+
+@defmac EH_RETURN_STACKADJ_RTX
+A C expression whose value is RTL representing a location in which
+to store a stack adjustment to be applied before function return.
+This is used to unwind the stack to an exception handler's call frame.
+It will be assigned zero on code paths that return normally.
+
+Typically this is a call-clobbered hard register that is otherwise
+untouched by the epilogue, but could also be a stack slot.
+
+Do not define this macro if the stack pointer is saved and restored
+by the regular prolog and epilog code in the call frame itself; in
+this case, the exception handling library routines will update the
+stack location to be restored in place.  Otherwise, you must define
+this macro if you want to support call frame exception handling like
+that provided by DWARF 2.
+@end defmac
+
+@defmac EH_RETURN_HANDLER_RTX
+A C expression whose value is RTL representing a location in which
+to store the address of an exception handler to which we should
+return.  It will not be assigned on code paths that return normally.
+
+Typically this is the location in the call frame at which the normal
+return address is stored.  For targets that return by popping an
+address off the stack, this might be a memory address just below
+the @emph{target} call frame rather than inside the current call
+frame.  If defined, @code{EH_RETURN_STACKADJ_RTX} will have already
+been assigned, so it may be used to calculate the location of the
+target call frame.
+
+Some targets have more complex requirements than storing to an
+address calculable during initial code generation.  In that case
+the @code{eh_return} instruction pattern should be used instead.
+
+If you want to support call frame exception handling, you must
+define either this macro or the @code{eh_return} instruction pattern.
+@end defmac
+
+@defmac RETURN_ADDR_OFFSET
+If defined, an integer-valued C expression for which rtl will be generated
+to add it to the exception handler address before it is searched in the
+exception handling tables, and to subtract it again from the address before
+using it to return to the exception handler.
+@end defmac
+
+@defmac ASM_PREFERRED_EH_DATA_FORMAT (@var{code}, @var{global})
+This macro chooses the encoding of pointers embedded in the exception
+handling sections.  If at all possible, this should be defined such
+that the exception handling section will not require dynamic relocations,
+and so may be read-only.
+
+@var{code} is 0 for data, 1 for code labels, 2 for function pointers.
+@var{global} is true if the symbol may be affected by dynamic relocations.
+The macro should return a combination of the @code{DW_EH_PE_*} defines
+as found in @file{dwarf2.h}.
+
+If this macro is not defined, pointers will not be encoded but
+represented directly.
+@end defmac
+
+@defmac ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX (@var{file}, @var{encoding}, @var{size}, @var{addr}, @var{done})
+This macro allows the target to emit whatever special magic is required
+to represent the encoding chosen by @code{ASM_PREFERRED_EH_DATA_FORMAT}.
+Generic code takes care of pc-relative and indirect encodings; this must
+be defined if the target uses text-relative or data-relative encodings.
+
+This is a C statement that branches to @var{done} if the format was
+handled.  @var{encoding} is the format chosen, @var{size} is the number
+of bytes that the format occupies, @var{addr} is the @code{SYMBOL_REF}
+to be emitted.
+@end defmac
+
+@defmac MD_UNWIND_SUPPORT
+A string specifying a file to be #include'd in unwind-dw2.c.  The file
+so included typically defines @code{MD_FALLBACK_FRAME_STATE_FOR}.
+@end defmac
+
+@defmac MD_FALLBACK_FRAME_STATE_FOR (@var{context}, @var{fs})
+This macro allows the target to add CPU and operating system specific
+code to the call-frame unwinder for use when there is no unwind data
+available.  The most common reason to implement this macro is to unwind
+through signal frames.
+
+This macro is called from @code{uw_frame_state_for} in
+@file{unwind-dw2.c}, @file{unwind-dw2-xtensa.c} and
+@file{unwind-ia64.c}.  @var{context} is an @code{_Unwind_Context};
+@var{fs} is an @code{_Unwind_FrameState}.  Examine @code{context->ra}
+for the address of the code being executed and @code{context->cfa} for
+the stack pointer value.  If the frame can be decoded, the register
+save addresses should be updated in @var{fs} and the macro should
+evaluate to @code{_URC_NO_REASON}.  If the frame cannot be decoded,
+the macro should evaluate to @code{_URC_END_OF_STACK}.
+
+For proper signal handling in Java this macro is accompanied by
+@code{MAKE_THROW_FRAME}, defined in @file{libjava/include/*-signal.h} headers.
+@end defmac
+
+@defmac MD_HANDLE_UNWABI (@var{context}, @var{fs})
+This macro allows the target to add operating system specific code to the
+call-frame unwinder to handle the IA-64 @code{.unwabi} unwinding directive,
+usually used for signal or interrupt frames.
+
+This macro is called from @code{uw_update_context} in @file{unwind-ia64.c}.
+@var{context} is an @code{_Unwind_Context};
+@var{fs} is an @code{_Unwind_FrameState}.  Examine @code{fs->unwabi}
+for the abi and context in the @code{.unwabi} directive.  If the
+@code{.unwabi} directive can be handled, the register save addresses should
+be updated in @var{fs}.
+@end defmac
+
+@defmac TARGET_USES_WEAK_UNWIND_INFO
+A C expression that evaluates to true if the target requires unwind
+info to be given comdat linkage.  Define it to be @code{1} if comdat
+linkage is necessary.  The default is @code{0}.
+@end defmac
+
+@node Stack Checking
+@subsection Specifying How Stack Checking is Done
+
+GCC will check that stack references are within the boundaries of the
+stack, if the option @option{-fstack-check} is specified, in one of
+three ways:
+
+@enumerate
+@item
+If the value of the @code{STACK_CHECK_BUILTIN} macro is nonzero, GCC
+will assume that you have arranged for full stack checking to be done
+at appropriate places in the configuration files.  GCC will not do
+other special processing.
+
+@item
+If @code{STACK_CHECK_BUILTIN} is zero and the value of the
+@code{STACK_CHECK_STATIC_BUILTIN} macro is nonzero, GCC will assume
+that you have arranged for static stack checking (checking of the
+static stack frame of functions) to be done at appropriate places
+in the configuration files.  GCC will only emit code to do dynamic
+stack checking (checking on dynamic stack allocations) using the third
+approach below.
+
+@item
+If neither of the above are true, GCC will generate code to periodically
+``probe'' the stack pointer using the values of the macros defined below.
+@end enumerate
+
+If neither STACK_CHECK_BUILTIN nor STACK_CHECK_STATIC_BUILTIN is defined,
+GCC will change its allocation strategy for large objects if the option
+@option{-fstack-check} is specified: they will always be allocated
+dynamically if their size exceeds @code{STACK_CHECK_MAX_VAR_SIZE} bytes.
+
+@defmac STACK_CHECK_BUILTIN
+A nonzero value if stack checking is done by the configuration files in a
+machine-dependent manner.  You should define this macro if stack checking
+is required by the ABI of your machine or if you would like to do stack
+checking in some more efficient way than the generic approach.  The default
+value of this macro is zero.
+@end defmac
+
+@defmac STACK_CHECK_STATIC_BUILTIN
+A nonzero value if static stack checking is done by the configuration files
+in a machine-dependent manner.  You should define this macro if you would
+like to do static stack checking in some more efficient way than the generic
+approach.  The default value of this macro is zero.
+@end defmac
+
+@defmac STACK_CHECK_PROBE_INTERVAL_EXP
+An integer specifying the interval at which GCC must generate stack probe
+instructions, defined as 2 raised to this integer.  You will normally
+define this macro so that the interval be no larger than the size of
+the ``guard pages'' at the end of a stack area.  The default value
+of 12 (4096-byte interval) is suitable for most systems.
+@end defmac
+
+@defmac STACK_CHECK_MOVING_SP
+An integer which is nonzero if GCC should move the stack pointer page by page
+when doing probes.  This can be necessary on systems where the stack pointer
+contains the bottom address of the memory area accessible to the executing
+thread at any point in time.  In this situation an alternate signal stack
+is required in order to be able to recover from a stack overflow.  The
+default value of this macro is zero.
+@end defmac
+
+@defmac STACK_CHECK_PROTECT
+The number of bytes of stack needed to recover from a stack overflow, for
+languages where such a recovery is supported.  The default value of 75 words
+with the @code{setjmp}/@code{longjmp}-based exception handling mechanism and
+8192 bytes with other exception handling mechanisms should be adequate for
+most machines.
+@end defmac
+
+The following macros are relevant only if neither STACK_CHECK_BUILTIN
+nor STACK_CHECK_STATIC_BUILTIN is defined; you can omit them altogether
+in the opposite case.
+
+@defmac STACK_CHECK_MAX_FRAME_SIZE
+The maximum size of a stack frame, in bytes.  GCC will generate probe
+instructions in non-leaf functions to ensure at least this many bytes of
+stack are available.  If a stack frame is larger than this size, stack
+checking will not be reliable and GCC will issue a warning.  The
+default is chosen so that GCC only generates one instruction on most
+systems.  You should normally not change the default value of this macro.
+@end defmac
+
+@defmac STACK_CHECK_FIXED_FRAME_SIZE
+GCC uses this value to generate the above warning message.  It
+represents the amount of fixed frame used by a function, not including
+space for any callee-saved registers, temporaries and user variables.
+You need only specify an upper bound for this amount and will normally
+use the default of four words.
+@end defmac
+
+@defmac STACK_CHECK_MAX_VAR_SIZE
+The maximum size, in bytes, of an object that GCC will place in the
+fixed area of the stack frame when the user specifies
+@option{-fstack-check}.
+GCC computed the default from the values of the above macros and you will
+normally not need to override that default.
+@end defmac
+
+@need 2000
+@node Frame Registers
+@subsection Registers That Address the Stack Frame
+
+@c prevent bad page break with this line
+This discusses registers that address the stack frame.
+
+@defmac STACK_POINTER_REGNUM
+The register number of the stack pointer register, which must also be a
+fixed register according to @code{FIXED_REGISTERS}.  On most machines,
+the hardware determines which register this is.
+@end defmac
+
+@defmac FRAME_POINTER_REGNUM
+The register number of the frame pointer register, which is used to
+access automatic variables in the stack frame.  On some machines, the
+hardware determines which register this is.  On other machines, you can
+choose any register you wish for this purpose.
+@end defmac
+
+@defmac HARD_FRAME_POINTER_REGNUM
+On some machines the offset between the frame pointer and starting
+offset of the automatic variables is not known until after register
+allocation has been done (for example, because the saved registers are
+between these two locations).  On those machines, define
+@code{FRAME_POINTER_REGNUM} the number of a special, fixed register to
+be used internally until the offset is known, and define
+@code{HARD_FRAME_POINTER_REGNUM} to be the actual hard register number
+used for the frame pointer.
+
+You should define this macro only in the very rare circumstances when it
+is not possible to calculate the offset between the frame pointer and
+the automatic variables until after register allocation has been
+completed.  When this macro is defined, you must also indicate in your
+definition of @code{ELIMINABLE_REGS} how to eliminate
+@code{FRAME_POINTER_REGNUM} into either @code{HARD_FRAME_POINTER_REGNUM}
+or @code{STACK_POINTER_REGNUM}.
+
+Do not define this macro if it would be the same as
+@code{FRAME_POINTER_REGNUM}.
+@end defmac
+
+@defmac ARG_POINTER_REGNUM
+The register number of the arg pointer register, which is used to access
+the function's argument list.  On some machines, this is the same as the
+frame pointer register.  On some machines, the hardware determines which
+register this is.  On other machines, you can choose any register you
+wish for this purpose.  If this is not the same register as the frame
+pointer register, then you must mark it as a fixed register according to
+@code{FIXED_REGISTERS}, or arrange to be able to eliminate it
+(@pxref{Elimination}).
+@end defmac
+
+@defmac HARD_FRAME_POINTER_IS_FRAME_POINTER
+Define this to a preprocessor constant that is nonzero if
+@code{hard_frame_pointer_rtx} and @code{frame_pointer_rtx} should be
+the same.  The default definition is @samp{(HARD_FRAME_POINTER_REGNUM
+== FRAME_POINTER_REGNUM)}; you only need to define this macro if that
+definition is not suitable for use in preprocessor conditionals.
+@end defmac
+
+@defmac HARD_FRAME_POINTER_IS_ARG_POINTER
+Define this to a preprocessor constant that is nonzero if
+@code{hard_frame_pointer_rtx} and @code{arg_pointer_rtx} should be the
+same.  The default definition is @samp{(HARD_FRAME_POINTER_REGNUM ==
+ARG_POINTER_REGNUM)}; you only need to define this macro if that
+definition is not suitable for use in preprocessor conditionals.
+@end defmac
+
+@defmac RETURN_ADDRESS_POINTER_REGNUM
+The register number of the return address pointer register, which is used to
+access the current function's return address from the stack.  On some
+machines, the return address is not at a fixed offset from the frame
+pointer or stack pointer or argument pointer.  This register can be defined
+to point to the return address on the stack, and then be converted by
+@code{ELIMINABLE_REGS} into either the frame pointer or stack pointer.
+
+Do not define this macro unless there is no other way to get the return
+address from the stack.
+@end defmac
+
+@defmac STATIC_CHAIN_REGNUM
+@defmacx STATIC_CHAIN_INCOMING_REGNUM
+Register numbers used for passing a function's static chain pointer.  If
+register windows are used, the register number as seen by the called
+function is @code{STATIC_CHAIN_INCOMING_REGNUM}, while the register
+number as seen by the calling function is @code{STATIC_CHAIN_REGNUM}.  If
+these registers are the same, @code{STATIC_CHAIN_INCOMING_REGNUM} need
+not be defined.
+
+The static chain register need not be a fixed register.
+
+If the static chain is passed in memory, these macros should not be
+defined; instead, the @code{TARGET_STATIC_CHAIN} hook should be used.
+@end defmac
+
+@hook TARGET_STATIC_CHAIN
+This hook replaces the use of @code{STATIC_CHAIN_REGNUM} et al for
+targets that may use different static chain locations for different
+nested functions.  This may be required if the target has function
+attributes that affect the calling conventions of the function and
+those calling conventions use different static chain locations.
+
+The default version of this hook uses @code{STATIC_CHAIN_REGNUM} et al.
+
+If the static chain is passed in memory, this hook should be used to
+provide rtx giving @code{mem} expressions that denote where they are stored.
+Often the @code{mem} expression as seen by the caller will be at an offset
+from the stack pointer and the @code{mem} expression as seen by the callee
+will be at an offset from the frame pointer.
+@findex stack_pointer_rtx
+@findex frame_pointer_rtx
+@findex arg_pointer_rtx
+The variables @code{stack_pointer_rtx}, @code{frame_pointer_rtx}, and
+@code{arg_pointer_rtx} will have been initialized and should be used
+to refer to those items.
+@end deftypefn
+
+@defmac DWARF_FRAME_REGISTERS
+This macro specifies the maximum number of hard registers that can be
+saved in a call frame.  This is used to size data structures used in
+DWARF2 exception handling.
+
+Prior to GCC 3.0, this macro was needed in order to establish a stable
+exception handling ABI in the face of adding new hard registers for ISA
+extensions.  In GCC 3.0 and later, the EH ABI is insulated from changes
+in the number of hard registers.  Nevertheless, this macro can still be
+used to reduce the runtime memory requirements of the exception handling
+routines, which can be substantial if the ISA contains a lot of
+registers that are not call-saved.
+
+If this macro is not defined, it defaults to
+@code{FIRST_PSEUDO_REGISTER}.
+@end defmac
+
+@defmac PRE_GCC3_DWARF_FRAME_REGISTERS
+
+This macro is similar to @code{DWARF_FRAME_REGISTERS}, but is provided
+for backward compatibility in pre GCC 3.0 compiled code.
+
+If this macro is not defined, it defaults to
+@code{DWARF_FRAME_REGISTERS}.
+@end defmac
+
+@defmac DWARF_REG_TO_UNWIND_COLUMN (@var{regno})
+
+Define this macro if the target's representation for dwarf registers
+is different than the internal representation for unwind column.
+Given a dwarf register, this macro should return the internal unwind
+column number to use instead.
+
+See the PowerPC's SPE target for an example.
+@end defmac
+
+@defmac DWARF_FRAME_REGNUM (@var{regno})
+
+Define this macro if the target's representation for dwarf registers
+used in .eh_frame or .debug_frame is different from that used in other
+debug info sections.  Given a GCC hard register number, this macro
+should return the .eh_frame register number.  The default is
+@code{DBX_REGISTER_NUMBER (@var{regno})}.
+
+@end defmac
+
+@defmac DWARF2_FRAME_REG_OUT (@var{regno}, @var{for_eh})
+
+Define this macro to map register numbers held in the call frame info
+that GCC has collected using @code{DWARF_FRAME_REGNUM} to those that
+should be output in .debug_frame (@code{@var{for_eh}} is zero) and
+.eh_frame (@code{@var{for_eh}} is nonzero).  The default is to
+return @code{@var{regno}}.
+
+@end defmac
+
+@node Elimination
+@subsection Eliminating Frame Pointer and Arg Pointer
+
+@c prevent bad page break with this line
+This is about eliminating the frame pointer and arg pointer.
+
+@hook TARGET_FRAME_POINTER_REQUIRED
+This target hook should return @code{true} if a function must have and use
+a frame pointer.  This target hook is called in the reload pass.  If its return
+value is @code{true} the function will have a frame pointer.
+
+This target hook can in principle examine the current function and decide
+according to the facts, but on most machines the constant @code{false} or the
+constant @code{true} suffices.  Use @code{false} when the machine allows code
+to be generated with no frame pointer, and doing so saves some time or space.
+Use @code{true} when there is no possible advantage to avoiding a frame
+pointer.
+
+In certain cases, the compiler does not know how to produce valid code
+without a frame pointer.  The compiler recognizes those cases and
+automatically gives the function a frame pointer regardless of what
+@code{TARGET_FRAME_POINTER_REQUIRED} returns.  You don't need to worry about
+them.
+
+In a function that does not require a frame pointer, the frame pointer
+register can be allocated for ordinary usage, unless you mark it as a
+fixed register.  See @code{FIXED_REGISTERS} for more information.
+
+Default return value is @code{false}.
+@end deftypefn
+
+@findex get_frame_size
+@defmac INITIAL_FRAME_POINTER_OFFSET (@var{depth-var})
+A C statement to store in the variable @var{depth-var} the difference
+between the frame pointer and the stack pointer values immediately after
+the function prologue.  The value would be computed from information
+such as the result of @code{get_frame_size ()} and the tables of
+registers @code{regs_ever_live} and @code{call_used_regs}.
+
+If @code{ELIMINABLE_REGS} is defined, this macro will be not be used and
+need not be defined.  Otherwise, it must be defined even if
+@code{TARGET_FRAME_POINTER_REQUIRED} always returns true; in that
+case, you may set @var{depth-var} to anything.
+@end defmac
+
+@defmac ELIMINABLE_REGS
+If defined, this macro specifies a table of register pairs used to
+eliminate unneeded registers that point into the stack frame.  If it is not
+defined, the only elimination attempted by the compiler is to replace
+references to the frame pointer with references to the stack pointer.
+
+The definition of this macro is a list of structure initializations, each
+of which specifies an original and replacement register.
+
+On some machines, the position of the argument pointer is not known until
+the compilation is completed.  In such a case, a separate hard register
+must be used for the argument pointer.  This register can be eliminated by
+replacing it with either the frame pointer or the argument pointer,
+depending on whether or not the frame pointer has been eliminated.
+
+In this case, you might specify:
+@smallexample
+#define ELIMINABLE_REGS  \
+@{@{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM@}, \
+ @{ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM@}, \
+ @{FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM@}@}
+@end smallexample
+
+Note that the elimination of the argument pointer with the stack pointer is
+specified first since that is the preferred elimination.
+@end defmac
+
+@hook TARGET_CAN_ELIMINATE
+This target hook should returns @code{true} if the compiler is allowed to
+try to replace register number @var{from_reg} with register number
+@var{to_reg}.  This target hook need only be defined if @code{ELIMINABLE_REGS}
+is defined, and will usually be @code{true}, since most of the cases
+preventing register elimination are things that the compiler already
+knows about.
+
+Default return value is @code{true}.
+@end deftypefn
+
+@defmac INITIAL_ELIMINATION_OFFSET (@var{from-reg}, @var{to-reg}, @var{offset-var})
+This macro is similar to @code{INITIAL_FRAME_POINTER_OFFSET}.  It
+specifies the initial difference between the specified pair of
+registers.  This macro must be defined if @code{ELIMINABLE_REGS} is
+defined.
+@end defmac
+
+@node Stack Arguments
+@subsection Passing Function Arguments on the Stack
+@cindex arguments on stack
+@cindex stack arguments
+
+The macros in this section control how arguments are passed
+on the stack.  See the following section for other macros that
+control passing certain arguments in registers.
+
+@hook TARGET_PROMOTE_PROTOTYPES
+This target hook returns @code{true} if an argument declared in a
+prototype as an integral type smaller than @code{int} should actually be
+passed as an @code{int}.  In addition to avoiding errors in certain
+cases of mismatch, it also makes for better code on certain machines.
+The default is to not promote prototypes.
+@end deftypefn
+
+@defmac PUSH_ARGS
+A C expression.  If nonzero, push insns will be used to pass
+outgoing arguments.
+If the target machine does not have a push instruction, set it to zero.
+That directs GCC to use an alternate strategy: to
+allocate the entire argument block and then store the arguments into
+it.  When @code{PUSH_ARGS} is nonzero, @code{PUSH_ROUNDING} must be defined too.
+@end defmac
+
+@defmac PUSH_ARGS_REVERSED
+A C expression.  If nonzero, function arguments will be evaluated from
+last to first, rather than from first to last.  If this macro is not
+defined, it defaults to @code{PUSH_ARGS} on targets where the stack
+and args grow in opposite directions, and 0 otherwise.
+@end defmac
+
+@defmac PUSH_ROUNDING (@var{npushed})
+A C expression that is the number of bytes actually pushed onto the
+stack when an instruction attempts to push @var{npushed} bytes.
+
+On some machines, the definition
+
+@smallexample
+#define PUSH_ROUNDING(BYTES) (BYTES)
+@end smallexample
+
+@noindent
+will suffice.  But on other machines, instructions that appear
+to push one byte actually push two bytes in an attempt to maintain
+alignment.  Then the definition should be
+
+@smallexample
+#define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & ~1)
+@end smallexample
+
+If the value of this macro has a type, it should be an unsigned type.
+@end defmac
+
+@findex current_function_outgoing_args_size
+@defmac ACCUMULATE_OUTGOING_ARGS
+A C expression.  If nonzero, the maximum amount of space required for outgoing arguments
+will be computed and placed into the variable
+@code{current_function_outgoing_args_size}.  No space will be pushed
+onto the stack for each call; instead, the function prologue should
+increase the stack frame size by this amount.
+
+Setting both @code{PUSH_ARGS} and @code{ACCUMULATE_OUTGOING_ARGS}
+is not proper.
+@end defmac
+
+@defmac REG_PARM_STACK_SPACE (@var{fndecl})
+Define this macro if functions should assume that stack space has been
+allocated for arguments even when their values are passed in
+registers.
+
+The value of this macro is the size, in bytes, of the area reserved for
+arguments passed in registers for the function represented by @var{fndecl},
+which can be zero if GCC is calling a library function.
+The argument @var{fndecl} can be the FUNCTION_DECL, or the type itself
+of the function.
+
+This space can be allocated by the caller, or be a part of the
+machine-dependent stack frame: @code{OUTGOING_REG_PARM_STACK_SPACE} says
+which.
+@end defmac
+@c above is overfull.  not sure what to do.  --mew 5feb93  did
+@c something, not sure if it looks good.  --mew 10feb93
+
+@defmac OUTGOING_REG_PARM_STACK_SPACE (@var{fntype})
+Define this to a nonzero value if it is the responsibility of the
+caller to allocate the area reserved for arguments passed in registers
+when calling a function of @var{fntype}.  @var{fntype} may be NULL
+if the function called is a library function.
+
+If @code{ACCUMULATE_OUTGOING_ARGS} is defined, this macro controls
+whether the space for these arguments counts in the value of
+@code{current_function_outgoing_args_size}.
+@end defmac
+
+@defmac STACK_PARMS_IN_REG_PARM_AREA
+Define this macro if @code{REG_PARM_STACK_SPACE} is defined, but the
+stack parameters don't skip the area specified by it.
+@c i changed this, makes more sens and it should have taken care of the
+@c overfull.. not as specific, tho.  --mew 5feb93
+
+Normally, when a parameter is not passed in registers, it is placed on the
+stack beyond the @code{REG_PARM_STACK_SPACE} area.  Defining this macro
+suppresses this behavior and causes the parameter to be passed on the
+stack in its natural location.
+@end defmac
+
+@hook TARGET_RETURN_POPS_ARGS
+This target hook returns the number of bytes of its own arguments that
+a function pops on returning, or 0 if the function pops no arguments
+and the caller must therefore pop them all after the function returns.
+
+@var{fundecl} is a C variable whose value is a tree node that describes
+the function in question.  Normally it is a node of type
+@code{FUNCTION_DECL} that describes the declaration of the function.
+From this you can obtain the @code{DECL_ATTRIBUTES} of the function.
+
+@var{funtype} is a C variable whose value is a tree node that
+describes the function in question.  Normally it is a node of type
+@code{FUNCTION_TYPE} that describes the data type of the function.
+From this it is possible to obtain the data types of the value and
+arguments (if known).
+
+When a call to a library function is being considered, @var{fundecl}
+will contain an identifier node for the library function.  Thus, if
+you need to distinguish among various library functions, you can do so
+by their names.  Note that ``library function'' in this context means
+a function used to perform arithmetic, whose name is known specially
+in the compiler and was not mentioned in the C code being compiled.
+
+@var{size} is the number of bytes of arguments passed on the
+stack.  If a variable number of bytes is passed, it is zero, and
+argument popping will always be the responsibility of the calling function.
+
+On the VAX, all functions always pop their arguments, so the definition
+of this macro is @var{size}.  On the 68000, using the standard
+calling convention, no functions pop their arguments, so the value of
+the macro is always 0 in this case.  But an alternative calling
+convention is available in which functions that take a fixed number of
+arguments pop them but other functions (such as @code{printf}) pop
+nothing (the caller pops all).  When this convention is in use,
+@var{funtype} is examined to determine whether a function takes a fixed
+number of arguments.
+@end deftypefn
+
+@defmac CALL_POPS_ARGS (@var{cum})
+A C expression that should indicate the number of bytes a call sequence
+pops off the stack.  It is added to the value of @code{RETURN_POPS_ARGS}
+when compiling a function call.
+
+@var{cum} is the variable in which all arguments to the called function
+have been accumulated.
+
+On certain architectures, such as the SH5, a call trampoline is used
+that pops certain registers off the stack, depending on the arguments
+that have been passed to the function.  Since this is a property of the
+call site, not of the called function, @code{RETURN_POPS_ARGS} is not
+appropriate.
+@end defmac
+
+@node Register Arguments
+@subsection Passing Arguments in Registers
+@cindex arguments in registers
+@cindex registers arguments
+
+This section describes the macros which let you control how various
+types of arguments are passed in registers or how they are arranged in
+the stack.
+
+@defmac FUNCTION_ARG (@var{cum}, @var{mode}, @var{type}, @var{named})
+A C expression that controls whether a function argument is passed
+in a register, and which register.
+
+The arguments are @var{cum}, which summarizes all the previous
+arguments; @var{mode}, the machine mode of the argument; @var{type},
+the data type of the argument as a tree node or 0 if that is not known
+(which happens for C support library functions); and @var{named},
+which is 1 for an ordinary argument and 0 for nameless arguments that
+correspond to @samp{@dots{}} in the called function's prototype.
+@var{type} can be an incomplete type if a syntax error has previously
+occurred.
+
+The value of the expression is usually either a @code{reg} RTX for the
+hard register in which to pass the argument, or zero to pass the
+argument on the stack.
+
+For machines like the VAX and 68000, where normally all arguments are
+pushed, zero suffices as a definition.
+
+The value of the expression can also be a @code{parallel} RTX@.  This is
+used when an argument is passed in multiple locations.  The mode of the
+@code{parallel} should be the mode of the entire argument.  The
+@code{parallel} holds any number of @code{expr_list} pairs; each one
+describes where part of the argument is passed.  In each
+@code{expr_list} the first operand must be a @code{reg} RTX for the hard
+register in which to pass this part of the argument, and the mode of the
+register RTX indicates how large this part of the argument is.  The
+second operand of the @code{expr_list} is a @code{const_int} which gives
+the offset in bytes into the entire argument of where this part starts.
+As a special exception the first @code{expr_list} in the @code{parallel}
+RTX may have a first operand of zero.  This indicates that the entire
+argument is also stored on the stack.
+
+The last time this macro is called, it is called with @code{MODE ==
+VOIDmode}, and its result is passed to the @code{call} or @code{call_value}
+pattern as operands 2 and 3 respectively.
+
+@cindex @file{stdarg.h} and register arguments
+The usual way to make the ISO library @file{stdarg.h} work on a machine
+where some arguments are usually passed in registers, is to cause
+nameless arguments to be passed on the stack instead.  This is done
+by making @code{FUNCTION_ARG} return 0 whenever @var{named} is 0.
+
+@cindex @code{TARGET_MUST_PASS_IN_STACK}, and @code{FUNCTION_ARG}
+@cindex @code{REG_PARM_STACK_SPACE}, and @code{FUNCTION_ARG}
+You may use the hook @code{targetm.calls.must_pass_in_stack}
+in the definition of this macro to determine if this argument is of a
+type that must be passed in the stack.  If @code{REG_PARM_STACK_SPACE}
+is not defined and @code{FUNCTION_ARG} returns nonzero for such an
+argument, the compiler will abort.  If @code{REG_PARM_STACK_SPACE} is
+defined, the argument will be computed in the stack and then loaded into
+a register.
+@end defmac
+
+@hook TARGET_MUST_PASS_IN_STACK
+This target hook should return @code{true} if we should not pass @var{type}
+solely in registers.  The file @file{expr.h} defines a
+definition that is usually appropriate, refer to @file{expr.h} for additional
+documentation.
+@end deftypefn
+
+@defmac FUNCTION_INCOMING_ARG (@var{cum}, @var{mode}, @var{type}, @var{named})
+Define this macro if the target machine has ``register windows'', so
+that the register in which a function sees an arguments is not
+necessarily the same as the one in which the caller passed the
+argument.
+
+For such machines, @code{FUNCTION_ARG} computes the register in which
+the caller passes the value, and @code{FUNCTION_INCOMING_ARG} should
+be defined in a similar fashion to tell the function being called
+where the arguments will arrive.
+
+If @code{FUNCTION_INCOMING_ARG} is not defined, @code{FUNCTION_ARG}
+serves both purposes.
+@end defmac
+
+@hook TARGET_ARG_PARTIAL_BYTES
+This target hook returns the number of bytes at the beginning of an
+argument that must be put in registers.  The value must be zero for
+arguments that are passed entirely in registers or that are entirely
+pushed on the stack.
+
+On some machines, certain arguments must be passed partially in
+registers and partially in memory.  On these machines, typically the
+first few words of arguments are passed in registers, and the rest
+on the stack.  If a multi-word argument (a @code{double} or a
+structure) crosses that boundary, its first few words must be passed
+in registers and the rest must be pushed.  This macro tells the
+compiler when this occurs, and how many bytes should go in registers.
+
+@code{FUNCTION_ARG} for these arguments should return the first
+register to be used by the caller for this argument; likewise
+@code{FUNCTION_INCOMING_ARG}, for the called function.
+@end deftypefn
+
+@hook TARGET_PASS_BY_REFERENCE
+This target hook should return @code{true} if an argument at the
+position indicated by @var{cum} should be passed by reference.  This
+predicate is queried after target independent reasons for being
+passed by reference, such as @code{TREE_ADDRESSABLE (type)}.
+
+If the hook returns true, a copy of that argument is made in memory and a
+pointer to the argument is passed instead of the argument itself.
+The pointer is passed in whatever way is appropriate for passing a pointer
+to that type.
+@end deftypefn
+
+@hook TARGET_CALLEE_COPIES
+The function argument described by the parameters to this hook is
+known to be passed by reference.  The hook should return true if the
+function argument should be copied by the callee instead of copied
+by the caller.
+
+For any argument for which the hook returns true, if it can be
+determined that the argument is not modified, then a copy need
+not be generated.
+
+The default version of this hook always returns false.
+@end deftypefn
+
+@defmac CUMULATIVE_ARGS
+A C type for declaring a variable that is used as the first argument of
+@code{FUNCTION_ARG} and other related values.  For some target machines,
+the type @code{int} suffices and can hold the number of bytes of
+argument so far.
+
+There is no need to record in @code{CUMULATIVE_ARGS} anything about the
+arguments that have been passed on the stack.  The compiler has other
+variables to keep track of that.  For target machines on which all
+arguments are passed on the stack, there is no need to store anything in
+@code{CUMULATIVE_ARGS}; however, the data structure must exist and
+should not be empty, so use @code{int}.
+@end defmac
+
+@defmac OVERRIDE_ABI_FORMAT (@var{fndecl})
+If defined, this macro is called before generating any code for a
+function, but after the @var{cfun} descriptor for the function has been
+created.  The back end may use this macro to update @var{cfun} to
+reflect an ABI other than that which would normally be used by default.
+If the compiler is generating code for a compiler-generated function,
+@var{fndecl} may be @code{NULL}.
+@end defmac
+
+@defmac INIT_CUMULATIVE_ARGS (@var{cum}, @var{fntype}, @var{libname}, @var{fndecl}, @var{n_named_args})
+A C statement (sans semicolon) for initializing the variable
+@var{cum} for the state at the beginning of the argument list.  The
+variable has type @code{CUMULATIVE_ARGS}.  The value of @var{fntype}
+is the tree node for the data type of the function which will receive
+the args, or 0 if the args are to a compiler support library function.
+For direct calls that are not libcalls, @var{fndecl} contain the
+declaration node of the function.  @var{fndecl} is also set when
+@code{INIT_CUMULATIVE_ARGS} is used to find arguments for the function
+being compiled.  @var{n_named_args} is set to the number of named
+arguments, including a structure return address if it is passed as a
+parameter, when making a call.  When processing incoming arguments,
+@var{n_named_args} is set to @minus{}1.
+
+When processing a call to a compiler support library function,
+@var{libname} identifies which one.  It is a @code{symbol_ref} rtx which
+contains the name of the function, as a string.  @var{libname} is 0 when
+an ordinary C function call is being processed.  Thus, each time this
+macro is called, either @var{libname} or @var{fntype} is nonzero, but
+never both of them at once.
+@end defmac
+
+@defmac INIT_CUMULATIVE_LIBCALL_ARGS (@var{cum}, @var{mode}, @var{libname})
+Like @code{INIT_CUMULATIVE_ARGS} but only used for outgoing libcalls,
+it gets a @code{MODE} argument instead of @var{fntype}, that would be
+@code{NULL}.  @var{indirect} would always be zero, too.  If this macro
+is not defined, @code{INIT_CUMULATIVE_ARGS (cum, NULL_RTX, libname,
+0)} is used instead.
+@end defmac
+
+@defmac INIT_CUMULATIVE_INCOMING_ARGS (@var{cum}, @var{fntype}, @var{libname})
+Like @code{INIT_CUMULATIVE_ARGS} but overrides it for the purposes of
+finding the arguments for the function being compiled.  If this macro is
+undefined, @code{INIT_CUMULATIVE_ARGS} is used instead.
+
+The value passed for @var{libname} is always 0, since library routines
+with special calling conventions are never compiled with GCC@.  The
+argument @var{libname} exists for symmetry with
+@code{INIT_CUMULATIVE_ARGS}.
+@c could use "this macro" in place of @code{INIT_CUMULATIVE_ARGS}, maybe.
+@c --mew 5feb93   i switched the order of the sentences.  --mew 10feb93
+@end defmac
+
+@defmac FUNCTION_ARG_ADVANCE (@var{cum}, @var{mode}, @var{type}, @var{named})
+A C statement (sans semicolon) to update the summarizer variable
+@var{cum} to advance past an argument in the argument list.  The
+values @var{mode}, @var{type} and @var{named} describe that argument.
+Once this is done, the variable @var{cum} is suitable for analyzing
+the @emph{following} argument with @code{FUNCTION_ARG}, etc.
+
+This macro need not do anything if the argument in question was passed
+on the stack.  The compiler knows how to track the amount of stack space
+used for arguments without any special help.
+@end defmac
+
+@defmac FUNCTION_ARG_OFFSET (@var{mode}, @var{type})
+If defined, a C expression that is the number of bytes to add to the
+offset of the argument passed in memory.  This is needed for the SPU,
+which passes @code{char} and @code{short} arguments in the preferred
+slot that is in the middle of the quad word instead of starting at the
+top.
+@end defmac
+
+@defmac FUNCTION_ARG_PADDING (@var{mode}, @var{type})
+If defined, a C expression which determines whether, and in which direction,
+to pad out an argument with extra space.  The value should be of type
+@code{enum direction}: either @code{upward} to pad above the argument,
+@code{downward} to pad below, or @code{none} to inhibit padding.
+
+The @emph{amount} of padding is always just enough to reach the next
+multiple of @code{TARGET_FUNCTION_ARG_BOUNDARY}; this macro does not
+control it.
+
+This macro has a default definition which is right for most systems.
+For little-endian machines, the default is to pad upward.  For
+big-endian machines, the default is to pad downward for an argument of
+constant size shorter than an @code{int}, and upward otherwise.
+@end defmac
+
+@defmac PAD_VARARGS_DOWN
+If defined, a C expression which determines whether the default
+implementation of va_arg will attempt to pad down before reading the
+next argument, if that argument is smaller than its aligned space as
+controlled by @code{PARM_BOUNDARY}.  If this macro is not defined, all such
+arguments are padded down if @code{BYTES_BIG_ENDIAN} is true.
+@end defmac
+
+@defmac BLOCK_REG_PADDING (@var{mode}, @var{type}, @var{first})
+Specify padding for the last element of a block move between registers and
+memory.  @var{first} is nonzero if this is the only element.  Defining this
+macro allows better control of register function parameters on big-endian
+machines, without using @code{PARALLEL} rtl.  In particular,
+@code{MUST_PASS_IN_STACK} need not test padding and mode of types in
+registers, as there is no longer a "wrong" part of a register;  For example,
+a three byte aggregate may be passed in the high part of a register if so
+required.
+@end defmac
+
+@hook TARGET_FUNCTION_ARG_BOUNDARY
+This hook returns the alignment boundary, in bits, of an argument
+with the specified mode and type.  The default hook returns
+@code{PARM_BOUNDARY} for all arguments.
+@end deftypefn
+
+@defmac FUNCTION_ARG_REGNO_P (@var{regno})
+A C expression that is nonzero if @var{regno} is the number of a hard
+register in which function arguments are sometimes passed.  This does
+@emph{not} include implicit arguments such as the static chain and
+the structure-value address.  On many machines, no registers can be
+used for this purpose since all function arguments are pushed on the
+stack.
+@end defmac
+
+@hook TARGET_SPLIT_COMPLEX_ARG
+This hook should return true if parameter of type @var{type} are passed
+as two scalar parameters.  By default, GCC will attempt to pack complex
+arguments into the target's word size.  Some ABIs require complex arguments
+to be split and treated as their individual components.  For example, on
+AIX64, complex floats should be passed in a pair of floating point
+registers, even though a complex float would fit in one 64-bit floating
+point register.
+
+The default value of this hook is @code{NULL}, which is treated as always
+false.
+@end deftypefn
+
+@hook TARGET_BUILD_BUILTIN_VA_LIST
+This hook returns a type node for @code{va_list} for the target.
+The default version of the hook returns @code{void*}.
+@end deftypefn
+
+@hook TARGET_ENUM_VA_LIST_P
+This target hook is used in function @code{c_common_nodes_and_builtins}
+to iterate through the target specific builtin types for va_list. The
+variable @var{idx} is used as iterator. @var{pname} has to be a pointer
+to a @code{const char *} and @var{ptree} a pointer to a @code{tree} typed
+variable.
+The arguments @var{pname} and @var{ptree} are used to store the result of
+this macro and are set to the name of the va_list builtin type and its
+internal type.
+If the return value of this macro is zero, then there is no more element.
+Otherwise the @var{IDX} should be increased for the next call of this
+macro to iterate through all types.
+@end deftypefn
+
+@hook TARGET_FN_ABI_VA_LIST
+This hook returns the va_list type of the calling convention specified by
+@var{fndecl}.
+The default version of this hook returns @code{va_list_type_node}.
+@end deftypefn
+
+@hook TARGET_CANONICAL_VA_LIST_TYPE
+This hook returns the va_list type of the calling convention specified by the
+type of @var{type}. If @var{type} is not a valid va_list type, it returns
+@code{NULL_TREE}.
+@end deftypefn
+
+@hook TARGET_GIMPLIFY_VA_ARG_EXPR
+This hook performs target-specific gimplification of
+@code{VA_ARG_EXPR}.  The first two parameters correspond to the
+arguments to @code{va_arg}; the latter two are as in
+@code{gimplify.c:gimplify_expr}.
+@end deftypefn
+
+@hook TARGET_VALID_POINTER_MODE
+Define this to return nonzero if the port can handle pointers
+with machine mode @var{mode}.  The default version of this
+hook returns true for both @code{ptr_mode} and @code{Pmode}.
+@end deftypefn
+
+@hook TARGET_REF_MAY_ALIAS_ERRNO
+
+@hook TARGET_SCALAR_MODE_SUPPORTED_P
+Define this to return nonzero if the port is prepared to handle
+insns involving scalar mode @var{mode}.  For a scalar mode to be
+considered supported, all the basic arithmetic and comparisons
+must work.
+
+The default version of this hook returns true for any mode
+required to handle the basic C types (as defined by the port).
+Included here are the double-word arithmetic supported by the
+code in @file{optabs.c}.
+@end deftypefn
+
+@hook TARGET_VECTOR_MODE_SUPPORTED_P
+Define this to return nonzero if the port is prepared to handle
+insns involving vector mode @var{mode}.  At the very least, it
+must have move patterns for this mode.
+@end deftypefn
+
+@hook TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P
+Define this to return nonzero for machine modes for which the port has
+small register classes.  If this target hook returns nonzero for a given
+@var{mode}, the compiler will try to minimize the lifetime of registers
+in @var{mode}.  The hook may be called with @code{VOIDmode} as argument.
+In this case, the hook is expected to return nonzero if it returns nonzero
+for any mode.
+
+On some machines, it is risky to let hard registers live across arbitrary
+insns.  Typically, these machines have instructions that require values
+to be in specific registers (like an accumulator), and reload will fail
+if the required hard register is used for another purpose across such an
+insn.
+
+Passes before reload do not know which hard registers will be used
+in an instruction, but the machine modes of the registers set or used in
+the instruction are already known.  And for some machines, register
+classes are small for, say, integer registers but not for floating point
+registers.  For example, the AMD x86-64 architecture requires specific
+registers for the legacy x86 integer instructions, but there are many
+SSE registers for floating point operations.  On such targets, a good
+strategy may be to return nonzero from this hook for @code{INTEGRAL_MODE_P}
+machine modes but zero for the SSE register classes.
+
+The default version of this hook returns false for any mode.  It is always
+safe to redefine this hook to return with a nonzero value.  But if you
+unnecessarily define it, you will reduce the amount of optimizations
+that can be performed in some cases.  If you do not define this hook
+to return a nonzero value when it is required, the compiler will run out
+of spill registers and print a fatal error message.
+@end deftypefn
+
+@hook TARGET_FLAGS_REGNUM
+
+@node Scalar Return
+@subsection How Scalar Function Values Are Returned
+@cindex return values in registers
+@cindex values, returned by functions
+@cindex scalars, returned as values
+
+This section discusses the macros that control returning scalars as
+values---values that can fit in registers.
+
+@hook TARGET_FUNCTION_VALUE
+
+Define this to return an RTX representing the place where a function
+returns or receives a value of data type @var{ret_type}, a tree node
+representing a data type.  @var{fn_decl_or_type} is a tree node
+representing @code{FUNCTION_DECL} or @code{FUNCTION_TYPE} of a
+function being called.  If @var{outgoing} is false, the hook should
+compute the register in which the caller will see the return value.
+Otherwise, the hook should return an RTX representing the place where
+a function returns a value.
+
+On many machines, only @code{TYPE_MODE (@var{ret_type})} is relevant.
+(Actually, on most machines, scalar values are returned in the same
+place regardless of mode.)  The value of the expression is usually a
+@code{reg} RTX for the hard register where the return value is stored.
+The value can also be a @code{parallel} RTX, if the return value is in
+multiple places.  See @code{FUNCTION_ARG} for an explanation of the
+@code{parallel} form.   Note that the callee will populate every
+location specified in the @code{parallel}, but if the first element of
+the @code{parallel} contains the whole return value, callers will use
+that element as the canonical location and ignore the others.  The m68k
+port uses this type of @code{parallel} to return pointers in both
+@samp{%a0} (the canonical location) and @samp{%d0}.
+
+If @code{TARGET_PROMOTE_FUNCTION_RETURN} returns true, you must apply
+the same promotion rules specified in @code{PROMOTE_MODE} if
+@var{valtype} is a scalar type.
+
+If the precise function being called is known, @var{func} is a tree
+node (@code{FUNCTION_DECL}) for it; otherwise, @var{func} is a null
+pointer.  This makes it possible to use a different value-returning
+convention for specific functions when all their calls are
+known.
+
+Some target machines have ``register windows'' so that the register in
+which a function returns its value is not the same as the one in which
+the caller sees the value.  For such machines, you should return
+different RTX depending on @var{outgoing}.
+
+@code{TARGET_FUNCTION_VALUE} is not used for return values with
+aggregate data types, because these are returned in another way.  See
+@code{TARGET_STRUCT_VALUE_RTX} and related macros, below.
+@end deftypefn
+
+@defmac FUNCTION_VALUE (@var{valtype}, @var{func})
+This macro has been deprecated.  Use @code{TARGET_FUNCTION_VALUE} for
+a new target instead.
+@end defmac
+
+@defmac LIBCALL_VALUE (@var{mode})
+A C expression to create an RTX representing the place where a library
+function returns a value of mode @var{mode}.
+
+Note that ``library function'' in this context means a compiler
+support routine, used to perform arithmetic, whose name is known
+specially by the compiler and was not mentioned in the C code being
+compiled.
+@end defmac
+
+@hook TARGET_LIBCALL_VALUE
+Define this hook if the back-end needs to know the name of the libcall
+function in order to determine where the result should be returned.  
+
+The mode of the result is given by @var{mode} and the name of the called
+library function is given by @var{fun}.  The hook should return an RTX 
+representing the place where the library function result will be returned.
+
+If this hook is not defined, then LIBCALL_VALUE will be used.
+@end deftypefn
+
+@defmac FUNCTION_VALUE_REGNO_P (@var{regno})
+A C expression that is nonzero if @var{regno} is the number of a hard
+register in which the values of called function may come back.
+
+A register whose use for returning values is limited to serving as the
+second of a pair (for a value of type @code{double}, say) need not be
+recognized by this macro.  So for most machines, this definition
+suffices:
+
+@smallexample
+#define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
+@end smallexample
+
+If the machine has register windows, so that the caller and the called
+function use different registers for the return value, this macro
+should recognize only the caller's register numbers.
+
+This macro has been deprecated.  Use @code{TARGET_FUNCTION_VALUE_REGNO_P}
+for a new target instead.
+@end defmac
+
+@hook TARGET_FUNCTION_VALUE_REGNO_P
+A target hook that return @code{true} if @var{regno} is the number of a hard
+register in which the values of called function may come back.
+
+A register whose use for returning values is limited to serving as the
+second of a pair (for a value of type @code{double}, say) need not be
+recognized by this target hook.
+
+If the machine has register windows, so that the caller and the called
+function use different registers for the return value, this target hook
+should recognize only the caller's register numbers.
+
+If this hook is not defined, then FUNCTION_VALUE_REGNO_P will be used.
+@end deftypefn
+
+@defmac APPLY_RESULT_SIZE
+Define this macro if @samp{untyped_call} and @samp{untyped_return}
+need more space than is implied by @code{FUNCTION_VALUE_REGNO_P} for
+saving and restoring an arbitrary return value.
+@end defmac
+
+@hook TARGET_RETURN_IN_MSB
+This hook should return true if values of type @var{type} are returned
+at the most significant end of a register (in other words, if they are
+padded at the least significant end).  You can assume that @var{type}
+is returned in a register; the caller is required to check this.
+
+Note that the register provided by @code{TARGET_FUNCTION_VALUE} must
+be able to hold the complete return value.  For example, if a 1-, 2-
+or 3-byte structure is returned at the most significant end of a
+4-byte register, @code{TARGET_FUNCTION_VALUE} should provide an
+@code{SImode} rtx.
+@end deftypefn
+
+@node Aggregate Return
+@subsection How Large Values Are Returned
+@cindex aggregates as return values
+@cindex large return values
+@cindex returning aggregate values
+@cindex structure value address
+
+When a function value's mode is @code{BLKmode} (and in some other
+cases), the value is not returned according to
+@code{TARGET_FUNCTION_VALUE} (@pxref{Scalar Return}).  Instead, the
+caller passes the address of a block of memory in which the value
+should be stored.  This address is called the @dfn{structure value
+address}.
+
+This section describes how to control returning structure values in
+memory.
+
+@hook TARGET_RETURN_IN_MEMORY
+This target hook should return a nonzero value to say to return the
+function value in memory, just as large structures are always returned.
+Here @var{type} will be the data type of the value, and @var{fntype}
+will be the type of the function doing the returning, or @code{NULL} for
+libcalls.
+
+Note that values of mode @code{BLKmode} must be explicitly handled
+by this function.  Also, the option @option{-fpcc-struct-return}
+takes effect regardless of this macro.  On most systems, it is
+possible to leave the hook undefined; this causes a default
+definition to be used, whose value is the constant 1 for @code{BLKmode}
+values, and 0 otherwise.
+
+Do not use this hook to indicate that structures and unions should always
+be returned in memory.  You should instead use @code{DEFAULT_PCC_STRUCT_RETURN}
+to indicate this.
+@end deftypefn
+
+@defmac DEFAULT_PCC_STRUCT_RETURN
+Define this macro to be 1 if all structure and union return values must be
+in memory.  Since this results in slower code, this should be defined
+only if needed for compatibility with other compilers or with an ABI@.
+If you define this macro to be 0, then the conventions used for structure
+and union return values are decided by the @code{TARGET_RETURN_IN_MEMORY}
+target hook.
+
+If not defined, this defaults to the value 1.
+@end defmac
+
+@hook TARGET_STRUCT_VALUE_RTX
+This target hook should return the location of the structure value
+address (normally a @code{mem} or @code{reg}), or 0 if the address is
+passed as an ``invisible'' first argument.  Note that @var{fndecl} may
+be @code{NULL}, for libcalls.  You do not need to define this target
+hook if the address is always passed as an ``invisible'' first
+argument.
+
+On some architectures the place where the structure value address
+is found by the called function is not the same place that the
+caller put it.  This can be due to register windows, or it could
+be because the function prologue moves it to a different place.
+@var{incoming} is @code{1} or @code{2} when the location is needed in
+the context of the called function, and @code{0} in the context of
+the caller.
+
+If @var{incoming} is nonzero and the address is to be found on the
+stack, return a @code{mem} which refers to the frame pointer. If
+@var{incoming} is @code{2}, the result is being used to fetch the
+structure value address at the beginning of a function.  If you need
+to emit adjusting code, you should do it at this point.
+@end deftypefn
+
+@defmac PCC_STATIC_STRUCT_RETURN
+Define this macro if the usual system convention on the target machine
+for returning structures and unions is for the called function to return
+the address of a static variable containing the value.
+
+Do not define this if the usual system convention is for the caller to
+pass an address to the subroutine.
+
+This macro has effect in @option{-fpcc-struct-return} mode, but it does
+nothing when you use @option{-freg-struct-return} mode.
+@end defmac
+
+@hook TARGET_GET_RAW_RESULT_MODE
+
+@hook TARGET_GET_RAW_ARG_MODE
+
+@node Caller Saves
+@subsection Caller-Saves Register Allocation
+
+If you enable it, GCC can save registers around function calls.  This
+makes it possible to use call-clobbered registers to hold variables that
+must live across calls.
+
+@defmac CALLER_SAVE_PROFITABLE (@var{refs}, @var{calls})
+A C expression to determine whether it is worthwhile to consider placing
+a pseudo-register in a call-clobbered hard register and saving and
+restoring it around each function call.  The expression should be 1 when
+this is worth doing, and 0 otherwise.
+
+If you don't define this macro, a default is used which is good on most
+machines: @code{4 * @var{calls} < @var{refs}}.
+@end defmac
+
+@defmac HARD_REGNO_CALLER_SAVE_MODE (@var{regno}, @var{nregs})
+A C expression specifying which mode is required for saving @var{nregs}
+of a pseudo-register in call-clobbered hard register @var{regno}.  If
+@var{regno} is unsuitable for caller save, @code{VOIDmode} should be
+returned.  For most machines this macro need not be defined since GCC
+will select the smallest suitable mode.
+@end defmac
+
+@node Function Entry
+@subsection Function Entry and Exit
+@cindex function entry and exit
+@cindex prologue
+@cindex epilogue
+
+This section describes the macros that output function entry
+(@dfn{prologue}) and exit (@dfn{epilogue}) code.
+
+@hook TARGET_ASM_FUNCTION_PROLOGUE
+If defined, a function that outputs the assembler code for entry to a
+function.  The prologue is responsible for setting up the stack frame,
+initializing the frame pointer register, saving registers that must be
+saved, and allocating @var{size} additional bytes of storage for the
+local variables.  @var{size} is an integer.  @var{file} is a stdio
+stream to which the assembler code should be output.
+
+The label for the beginning of the function need not be output by this
+macro.  That has already been done when the macro is run.
+
+@findex regs_ever_live
+To determine which registers to save, the macro can refer to the array
+@code{regs_ever_live}: element @var{r} is nonzero if hard register
+@var{r} is used anywhere within the function.  This implies the function
+prologue should save register @var{r}, provided it is not one of the
+call-used registers.  (@code{TARGET_ASM_FUNCTION_EPILOGUE} must likewise use
+@code{regs_ever_live}.)
+
+On machines that have ``register windows'', the function entry code does
+not save on the stack the registers that are in the windows, even if
+they are supposed to be preserved by function calls; instead it takes
+appropriate steps to ``push'' the register stack, if any non-call-used
+registers are used in the function.
+
+@findex frame_pointer_needed
+On machines where functions may or may not have frame-pointers, the
+function entry code must vary accordingly; it must set up the frame
+pointer if one is wanted, and not otherwise.  To determine whether a
+frame pointer is in wanted, the macro can refer to the variable
+@code{frame_pointer_needed}.  The variable's value will be 1 at run
+time in a function that needs a frame pointer.  @xref{Elimination}.
+
+The function entry code is responsible for allocating any stack space
+required for the function.  This stack space consists of the regions
+listed below.  In most cases, these regions are allocated in the
+order listed, with the last listed region closest to the top of the
+stack (the lowest address if @code{STACK_GROWS_DOWNWARD} is defined, and
+the highest address if it is not defined).  You can use a different order
+for a machine if doing so is more convenient or required for
+compatibility reasons.  Except in cases where required by standard
+or by a debugger, there is no reason why the stack layout used by GCC
+need agree with that used by other compilers for a machine.
+@end deftypefn
+
+@hook TARGET_ASM_FUNCTION_END_PROLOGUE
+If defined, a function that outputs assembler code at the end of a
+prologue.  This should be used when the function prologue is being
+emitted as RTL, and you have some extra assembler that needs to be
+emitted.  @xref{prologue instruction pattern}.
+@end deftypefn
+
+@hook TARGET_ASM_FUNCTION_BEGIN_EPILOGUE
+If defined, a function that outputs assembler code at the start of an
+epilogue.  This should be used when the function epilogue is being
+emitted as RTL, and you have some extra assembler that needs to be
+emitted.  @xref{epilogue instruction pattern}.
+@end deftypefn
+
+@hook TARGET_ASM_FUNCTION_EPILOGUE
+If defined, a function that outputs the assembler code for exit from a
+function.  The epilogue is responsible for restoring the saved
+registers and stack pointer to their values when the function was
+called, and returning control to the caller.  This macro takes the
+same arguments as the macro @code{TARGET_ASM_FUNCTION_PROLOGUE}, and the
+registers to restore are determined from @code{regs_ever_live} and
+@code{CALL_USED_REGISTERS} in the same way.
+
+On some machines, there is a single instruction that does all the work
+of returning from the function.  On these machines, give that
+instruction the name @samp{return} and do not define the macro
+@code{TARGET_ASM_FUNCTION_EPILOGUE} at all.
+
+Do not define a pattern named @samp{return} if you want the
+@code{TARGET_ASM_FUNCTION_EPILOGUE} to be used.  If you want the target
+switches to control whether return instructions or epilogues are used,
+define a @samp{return} pattern with a validity condition that tests the
+target switches appropriately.  If the @samp{return} pattern's validity
+condition is false, epilogues will be used.
+
+On machines where functions may or may not have frame-pointers, the
+function exit code must vary accordingly.  Sometimes the code for these
+two cases is completely different.  To determine whether a frame pointer
+is wanted, the macro can refer to the variable
+@code{frame_pointer_needed}.  The variable's value will be 1 when compiling
+a function that needs a frame pointer.
+
+Normally, @code{TARGET_ASM_FUNCTION_PROLOGUE} and
+@code{TARGET_ASM_FUNCTION_EPILOGUE} must treat leaf functions specially.
+The C variable @code{current_function_is_leaf} is nonzero for such a
+function.  @xref{Leaf Functions}.
+
+On some machines, some functions pop their arguments on exit while
+others leave that for the caller to do.  For example, the 68020 when
+given @option{-mrtd} pops arguments in functions that take a fixed
+number of arguments.
+
+@findex current_function_pops_args
+Your definition of the macro @code{RETURN_POPS_ARGS} decides which
+functions pop their own arguments.  @code{TARGET_ASM_FUNCTION_EPILOGUE}
+needs to know what was decided.  The number of bytes of the current
+function's arguments that this function should pop is available in
+@code{crtl->args.pops_args}.  @xref{Scalar Return}.
+@end deftypefn
+
+@itemize @bullet
+@item
+@findex current_function_pretend_args_size
+A region of @code{current_function_pretend_args_size} bytes of
+uninitialized space just underneath the first argument arriving on the
+stack.  (This may not be at the very start of the allocated stack region
+if the calling sequence has pushed anything else since pushing the stack
+arguments.  But usually, on such machines, nothing else has been pushed
+yet, because the function prologue itself does all the pushing.)  This
+region is used on machines where an argument may be passed partly in
+registers and partly in memory, and, in some cases to support the
+features in @code{<stdarg.h>}.
+
+@item
+An area of memory used to save certain registers used by the function.
+The size of this area, which may also include space for such things as
+the return address and pointers to previous stack frames, is
+machine-specific and usually depends on which registers have been used
+in the function.  Machines with register windows often do not require
+a save area.
+
+@item
+A region of at least @var{size} bytes, possibly rounded up to an allocation
+boundary, to contain the local variables of the function.  On some machines,
+this region and the save area may occur in the opposite order, with the
+save area closer to the top of the stack.
+
+@item
+@cindex @code{ACCUMULATE_OUTGOING_ARGS} and stack frames
+Optionally, when @code{ACCUMULATE_OUTGOING_ARGS} is defined, a region of
+@code{current_function_outgoing_args_size} bytes to be used for outgoing
+argument lists of the function.  @xref{Stack Arguments}.
+@end itemize
+
+@defmac EXIT_IGNORE_STACK
+Define this macro as a C expression that is nonzero if the return
+instruction or the function epilogue ignores the value of the stack
+pointer; in other words, if it is safe to delete an instruction to
+adjust the stack pointer before a return from the function.  The
+default is 0.
+
+Note that this macro's value is relevant only for functions for which
+frame pointers are maintained.  It is never safe to delete a final
+stack adjustment in a function that has no frame pointer, and the
+compiler knows this regardless of @code{EXIT_IGNORE_STACK}.
+@end defmac
+
+@defmac EPILOGUE_USES (@var{regno})
+Define this macro as a C expression that is nonzero for registers that are
+used by the epilogue or the @samp{return} pattern.  The stack and frame
+pointer registers are already assumed to be used as needed.
+@end defmac
+
+@defmac EH_USES (@var{regno})
+Define this macro as a C expression that is nonzero for registers that are
+used by the exception handling mechanism, and so should be considered live
+on entry to an exception edge.
+@end defmac
+
+@defmac DELAY_SLOTS_FOR_EPILOGUE
+Define this macro if the function epilogue contains delay slots to which
+instructions from the rest of the function can be ``moved''.  The
+definition should be a C expression whose value is an integer
+representing the number of delay slots there.
+@end defmac
+
+@defmac ELIGIBLE_FOR_EPILOGUE_DELAY (@var{insn}, @var{n})
+A C expression that returns 1 if @var{insn} can be placed in delay
+slot number @var{n} of the epilogue.
+
+The argument @var{n} is an integer which identifies the delay slot now
+being considered (since different slots may have different rules of
+eligibility).  It is never negative and is always less than the number
+of epilogue delay slots (what @code{DELAY_SLOTS_FOR_EPILOGUE} returns).
+If you reject a particular insn for a given delay slot, in principle, it
+may be reconsidered for a subsequent delay slot.  Also, other insns may
+(at least in principle) be considered for the so far unfilled delay
+slot.
+
+@findex current_function_epilogue_delay_list
+@findex final_scan_insn
+The insns accepted to fill the epilogue delay slots are put in an RTL
+list made with @code{insn_list} objects, stored in the variable
+@code{current_function_epilogue_delay_list}.  The insn for the first
+delay slot comes first in the list.  Your definition of the macro
+@code{TARGET_ASM_FUNCTION_EPILOGUE} should fill the delay slots by
+outputting the insns in this list, usually by calling
+@code{final_scan_insn}.
+
+You need not define this macro if you did not define
+@code{DELAY_SLOTS_FOR_EPILOGUE}.
+@end defmac
+
+@hook TARGET_ASM_OUTPUT_MI_THUNK
+A function that outputs the assembler code for a thunk
+function, used to implement C++ virtual function calls with multiple
+inheritance.  The thunk acts as a wrapper around a virtual function,
+adjusting the implicit object parameter before handing control off to
+the real function.
+
+First, emit code to add the integer @var{delta} to the location that
+contains the incoming first argument.  Assume that this argument
+contains a pointer, and is the one used to pass the @code{this} pointer
+in C++.  This is the incoming argument @emph{before} the function prologue,
+e.g.@: @samp{%o0} on a sparc.  The addition must preserve the values of
+all other incoming arguments.
+
+Then, if @var{vcall_offset} is nonzero, an additional adjustment should be
+made after adding @code{delta}.  In particular, if @var{p} is the
+adjusted pointer, the following adjustment should be made:
+
+@smallexample
+p += (*((ptrdiff_t **)p))[vcall_offset/sizeof(ptrdiff_t)]
+@end smallexample
+
+After the additions, emit code to jump to @var{function}, which is a
+@code{FUNCTION_DECL}.  This is a direct pure jump, not a call, and does
+not touch the return address.  Hence returning from @var{FUNCTION} will
+return to whoever called the current @samp{thunk}.
+
+The effect must be as if @var{function} had been called directly with
+the adjusted first argument.  This macro is responsible for emitting all
+of the code for a thunk function; @code{TARGET_ASM_FUNCTION_PROLOGUE}
+and @code{TARGET_ASM_FUNCTION_EPILOGUE} are not invoked.
+
+The @var{thunk_fndecl} is redundant.  (@var{delta} and @var{function}
+have already been extracted from it.)  It might possibly be useful on
+some targets, but probably not.
+
+If you do not define this macro, the target-independent code in the C++
+front end will generate a less efficient heavyweight thunk that calls
+@var{function} instead of jumping to it.  The generic approach does
+not support varargs.
+@end deftypefn
+
+@hook TARGET_ASM_CAN_OUTPUT_MI_THUNK
+A function that returns true if TARGET_ASM_OUTPUT_MI_THUNK would be able
+to output the assembler code for the thunk function specified by the
+arguments it is passed, and false otherwise.  In the latter case, the
+generic approach will be used by the C++ front end, with the limitations
+previously exposed.
+@end deftypefn
+
+@node Profiling
+@subsection Generating Code for Profiling
+@cindex profiling, code generation
+
+These macros will help you generate code for profiling.
+
+@defmac FUNCTION_PROFILER (@var{file}, @var{labelno})
+A C statement or compound statement to output to @var{file} some
+assembler code to call the profiling subroutine @code{mcount}.
+
+@findex mcount
+The details of how @code{mcount} expects to be called are determined by
+your operating system environment, not by GCC@.  To figure them out,
+compile a small program for profiling using the system's installed C
+compiler and look at the assembler code that results.
+
+Older implementations of @code{mcount} expect the address of a counter
+variable to be loaded into some register.  The name of this variable is
+@samp{LP} followed by the number @var{labelno}, so you would generate
+the name using @samp{LP%d} in a @code{fprintf}.
+@end defmac
+
+@defmac PROFILE_HOOK
+A C statement or compound statement to output to @var{file} some assembly
+code to call the profiling subroutine @code{mcount} even the target does
+not support profiling.
+@end defmac
+
+@defmac NO_PROFILE_COUNTERS
+Define this macro to be an expression with a nonzero value if the
+@code{mcount} subroutine on your system does not need a counter variable
+allocated for each function.  This is true for almost all modern
+implementations.  If you define this macro, you must not use the
+@var{labelno} argument to @code{FUNCTION_PROFILER}.
+@end defmac
+
+@defmac PROFILE_BEFORE_PROLOGUE
+Define this macro if the code for function profiling should come before
+the function prologue.  Normally, the profiling code comes after.
+@end defmac
+
+@node Tail Calls
+@subsection Permitting tail calls
+@cindex tail calls
+
+@hook TARGET_FUNCTION_OK_FOR_SIBCALL
+True if it is ok to do sibling call optimization for the specified
+call expression @var{exp}.  @var{decl} will be the called function,
+or @code{NULL} if this is an indirect call.
+
+It is not uncommon for limitations of calling conventions to prevent
+tail calls to functions outside the current unit of translation, or
+during PIC compilation.  The hook is used to enforce these restrictions,
+as the @code{sibcall} md pattern can not fail, or fall over to a
+``normal'' call.  The criteria for successful sibling call optimization
+may vary greatly between different architectures.
+@end deftypefn
+
+@hook TARGET_EXTRA_LIVE_ON_ENTRY
+Add any hard registers to @var{regs} that are live on entry to the
+function.  This hook only needs to be defined to provide registers that
+cannot be found by examination of FUNCTION_ARG_REGNO_P, the callee saved
+registers, STATIC_CHAIN_INCOMING_REGNUM, STATIC_CHAIN_REGNUM,
+TARGET_STRUCT_VALUE_RTX, FRAME_POINTER_REGNUM, EH_USES,
+FRAME_POINTER_REGNUM, ARG_POINTER_REGNUM, and the PIC_OFFSET_TABLE_REGNUM.
+@end deftypefn
+
+@node Stack Smashing Protection
+@subsection Stack smashing protection
+@cindex stack smashing protection
+
+@hook TARGET_STACK_PROTECT_GUARD
+This hook returns a @code{DECL} node for the external variable to use
+for the stack protection guard.  This variable is initialized by the
+runtime to some random value and is used to initialize the guard value
+that is placed at the top of the local stack frame.  The type of this
+variable must be @code{ptr_type_node}.
+
+The default version of this hook creates a variable called
+@samp{__stack_chk_guard}, which is normally defined in @file{libgcc2.c}.
+@end deftypefn
+
+@hook TARGET_STACK_PROTECT_FAIL
+This hook returns a tree expression that alerts the runtime that the
+stack protect guard variable has been modified.  This expression should
+involve a call to a @code{noreturn} function.
+
+The default version of this hook invokes a function called
+@samp{__stack_chk_fail}, taking no arguments.  This function is
+normally defined in @file{libgcc2.c}.
+@end deftypefn
+
+@hook TARGET_SUPPORTS_SPLIT_STACK
+
+@node Varargs
+@section Implementing the Varargs Macros
+@cindex varargs implementation
+
+GCC comes with an implementation of @code{<varargs.h>} and
+@code{<stdarg.h>} that work without change on machines that pass arguments
+on the stack.  Other machines require their own implementations of
+varargs, and the two machine independent header files must have
+conditionals to include it.
+
+ISO @code{<stdarg.h>} differs from traditional @code{<varargs.h>} mainly in
+the calling convention for @code{va_start}.  The traditional
+implementation takes just one argument, which is the variable in which
+to store the argument pointer.  The ISO implementation of
+@code{va_start} takes an additional second argument.  The user is
+supposed to write the last named argument of the function here.
+
+However, @code{va_start} should not use this argument.  The way to find
+the end of the named arguments is with the built-in functions described
+below.
+
+@defmac __builtin_saveregs ()
+Use this built-in function to save the argument registers in memory so
+that the varargs mechanism can access them.  Both ISO and traditional
+versions of @code{va_start} must use @code{__builtin_saveregs}, unless
+you use @code{TARGET_SETUP_INCOMING_VARARGS} (see below) instead.
+
+On some machines, @code{__builtin_saveregs} is open-coded under the
+control of the target hook @code{TARGET_EXPAND_BUILTIN_SAVEREGS}.  On
+other machines, it calls a routine written in assembler language,
+found in @file{libgcc2.c}.
+
+Code generated for the call to @code{__builtin_saveregs} appears at the
+beginning of the function, as opposed to where the call to
+@code{__builtin_saveregs} is written, regardless of what the code is.
+This is because the registers must be saved before the function starts
+to use them for its own purposes.
+@c i rewrote the first sentence above to fix an overfull hbox. --mew
+@c 10feb93
+@end defmac
+
+@defmac __builtin_next_arg (@var{lastarg})
+This builtin returns the address of the first anonymous stack
+argument, as type @code{void *}.  If @code{ARGS_GROW_DOWNWARD}, it
+returns the address of the location above the first anonymous stack
+argument.  Use it in @code{va_start} to initialize the pointer for
+fetching arguments from the stack.  Also use it in @code{va_start} to
+verify that the second parameter @var{lastarg} is the last named argument
+of the current function.
+@end defmac
+
+@defmac __builtin_classify_type (@var{object})
+Since each machine has its own conventions for which data types are
+passed in which kind of register, your implementation of @code{va_arg}
+has to embody these conventions.  The easiest way to categorize the
+specified data type is to use @code{__builtin_classify_type} together
+with @code{sizeof} and @code{__alignof__}.
+
+@code{__builtin_classify_type} ignores the value of @var{object},
+considering only its data type.  It returns an integer describing what
+kind of type that is---integer, floating, pointer, structure, and so on.
+
+The file @file{typeclass.h} defines an enumeration that you can use to
+interpret the values of @code{__builtin_classify_type}.
+@end defmac
+
+These machine description macros help implement varargs:
+
+@hook TARGET_EXPAND_BUILTIN_SAVEREGS
+If defined, this hook produces the machine-specific code for a call to
+@code{__builtin_saveregs}.  This code will be moved to the very
+beginning of the function, before any parameter access are made.  The
+return value of this function should be an RTX that contains the value
+to use as the return of @code{__builtin_saveregs}.
+@end deftypefn
+
+@hook TARGET_SETUP_INCOMING_VARARGS
+This target hook offers an alternative to using
+@code{__builtin_saveregs} and defining the hook
+@code{TARGET_EXPAND_BUILTIN_SAVEREGS}.  Use it to store the anonymous
+register arguments into the stack so that all the arguments appear to
+have been passed consecutively on the stack.  Once this is done, you can
+use the standard implementation of varargs that works for machines that
+pass all their arguments on the stack.
+
+The argument @var{args_so_far} points to the @code{CUMULATIVE_ARGS} data
+structure, containing the values that are obtained after processing the
+named arguments.  The arguments @var{mode} and @var{type} describe the
+last named argument---its machine mode and its data type as a tree node.
+
+The target hook should do two things: first, push onto the stack all the
+argument registers @emph{not} used for the named arguments, and second,
+store the size of the data thus pushed into the @code{int}-valued
+variable pointed to by @var{pretend_args_size}.  The value that you
+store here will serve as additional offset for setting up the stack
+frame.
+
+Because you must generate code to push the anonymous arguments at
+compile time without knowing their data types,
+@code{TARGET_SETUP_INCOMING_VARARGS} is only useful on machines that
+have just a single category of argument register and use it uniformly
+for all data types.
+
+If the argument @var{second_time} is nonzero, it means that the
+arguments of the function are being analyzed for the second time.  This
+happens for an inline function, which is not actually compiled until the
+end of the source file.  The hook @code{TARGET_SETUP_INCOMING_VARARGS} should
+not generate any instructions in this case.
+@end deftypefn
+
+@hook TARGET_STRICT_ARGUMENT_NAMING
+Define this hook to return @code{true} if the location where a function
+argument is passed depends on whether or not it is a named argument.
+
+This hook controls how the @var{named} argument to @code{FUNCTION_ARG}
+is set for varargs and stdarg functions.  If this hook returns
+@code{true}, the @var{named} argument is always true for named
+arguments, and false for unnamed arguments.  If it returns @code{false},
+but @code{TARGET_PRETEND_OUTGOING_VARARGS_NAMED} returns @code{true},
+then all arguments are treated as named.  Otherwise, all named arguments
+except the last are treated as named.
+
+You need not define this hook if it always returns @code{false}.
+@end deftypefn
+
+@hook TARGET_PRETEND_OUTGOING_VARARGS_NAMED
+If you need to conditionally change ABIs so that one works with
+@code{TARGET_SETUP_INCOMING_VARARGS}, but the other works like neither
+@code{TARGET_SETUP_INCOMING_VARARGS} nor @code{TARGET_STRICT_ARGUMENT_NAMING} was
+defined, then define this hook to return @code{true} if
+@code{TARGET_SETUP_INCOMING_VARARGS} is used, @code{false} otherwise.
+Otherwise, you should not define this hook.
+@end deftypefn
+
+@node Trampolines
+@section Trampolines for Nested Functions
+@cindex trampolines for nested functions
+@cindex nested functions, trampolines for
+
+A @dfn{trampoline} is a small piece of code that is created at run time
+when the address of a nested function is taken.  It normally resides on
+the stack, in the stack frame of the containing function.  These macros
+tell GCC how to generate code to allocate and initialize a
+trampoline.
+
+The instructions in the trampoline must do two things: load a constant
+address into the static chain register, and jump to the real address of
+the nested function.  On CISC machines such as the m68k, this requires
+two instructions, a move immediate and a jump.  Then the two addresses
+exist in the trampoline as word-long immediate operands.  On RISC
+machines, it is often necessary to load each address into a register in
+two parts.  Then pieces of each address form separate immediate
+operands.
+
+The code generated to initialize the trampoline must store the variable
+parts---the static chain value and the function address---into the
+immediate operands of the instructions.  On a CISC machine, this is
+simply a matter of copying each address to a memory reference at the
+proper offset from the start of the trampoline.  On a RISC machine, it
+may be necessary to take out pieces of the address and store them
+separately.
+
+@hook TARGET_ASM_TRAMPOLINE_TEMPLATE
+This hook is called by @code{assemble_trampoline_template} to output,
+on the stream @var{f}, assembler code for a block of data that contains
+the constant parts of a trampoline.  This code should not include a
+label---the label is taken care of automatically.
+
+If you do not define this hook, it means no template is needed
+for the target.  Do not define this hook on systems where the block move
+code to copy the trampoline into place would be larger than the code
+to generate it on the spot.
+@end deftypefn
+
+@defmac TRAMPOLINE_SECTION
+Return the section into which the trampoline template is to be placed
+(@pxref{Sections}).  The default value is @code{readonly_data_section}.
+@end defmac
+
+@defmac TRAMPOLINE_SIZE
+A C expression for the size in bytes of the trampoline, as an integer.
+@end defmac
+
+@defmac TRAMPOLINE_ALIGNMENT
+Alignment required for trampolines, in bits.
+
+If you don't define this macro, the value of @code{FUNCTION_ALIGNMENT}
+is used for aligning trampolines.
+@end defmac
+
+@hook TARGET_TRAMPOLINE_INIT
+This hook is called to initialize a trampoline.
+@var{m_tramp} is an RTX for the memory block for the trampoline; @var{fndecl}
+is the @code{FUNCTION_DECL} for the nested function; @var{static_chain} is an
+RTX for the static chain value that should be passed to the function
+when it is called.
+
+If the target defines @code{TARGET_ASM_TRAMPOLINE_TEMPLATE}, then the
+first thing this hook should do is emit a block move into @var{m_tramp}
+from the memory block returned by @code{assemble_trampoline_template}.
+Note that the block move need only cover the constant parts of the 
+trampoline.  If the target isolates the variable parts of the trampoline
+to the end, not all @code{TRAMPOLINE_SIZE} bytes need be copied.
+
+If the target requires any other actions, such as flushing caches or
+enabling stack execution, these actions should be performed after 
+initializing the trampoline proper.
+@end deftypefn
+
+@hook TARGET_TRAMPOLINE_ADJUST_ADDRESS
+This hook should perform any machine-specific adjustment in
+the address of the trampoline.  Its argument contains the address of the
+memory block that was passed to @code{TARGET_TRAMPOLINE_INIT}.  In case
+the address to be used for a function call should be different from the
+address at which the template was stored, the different address should
+be returned; otherwise @var{addr} should be returned unchanged.
+If this hook is not defined, @var{addr} will be used for function calls.
+@end deftypefn
+
+Implementing trampolines is difficult on many machines because they have
+separate instruction and data caches.  Writing into a stack location
+fails to clear the memory in the instruction cache, so when the program
+jumps to that location, it executes the old contents.
+
+Here are two possible solutions.  One is to clear the relevant parts of
+the instruction cache whenever a trampoline is set up.  The other is to
+make all trampolines identical, by having them jump to a standard
+subroutine.  The former technique makes trampoline execution faster; the
+latter makes initialization faster.
+
+To clear the instruction cache when a trampoline is initialized, define
+the following macro.
+
+@defmac CLEAR_INSN_CACHE (@var{beg}, @var{end})
+If defined, expands to a C expression clearing the @emph{instruction
+cache} in the specified interval.  The definition of this macro would
+typically be a series of @code{asm} statements.  Both @var{beg} and
+@var{end} are both pointer expressions.
+@end defmac
+
+The operating system may also require the stack to be made executable
+before calling the trampoline.  To implement this requirement, define
+the following macro.
+
+@defmac ENABLE_EXECUTE_STACK
+Define this macro if certain operations must be performed before executing
+code located on the stack.  The macro should expand to a series of C
+file-scope constructs (e.g.@: functions) and provide a unique entry point
+named @code{__enable_execute_stack}.  The target is responsible for
+emitting calls to the entry point in the code, for example from the
+@code{TARGET_TRAMPOLINE_INIT} hook.
+@end defmac
+
+To use a standard subroutine, define the following macro.  In addition,
+you must make sure that the instructions in a trampoline fill an entire
+cache line with identical instructions, or else ensure that the
+beginning of the trampoline code is always aligned at the same point in
+its cache line.  Look in @file{m68k.h} as a guide.
+
+@defmac TRANSFER_FROM_TRAMPOLINE
+Define this macro if trampolines need a special subroutine to do their
+work.  The macro should expand to a series of @code{asm} statements
+which will be compiled with GCC@.  They go in a library function named
+@code{__transfer_from_trampoline}.
+
+If you need to avoid executing the ordinary prologue code of a compiled
+C function when you jump to the subroutine, you can do so by placing a
+special label of your own in the assembler code.  Use one @code{asm}
+statement to generate an assembler label, and another to make the label
+global.  Then trampolines can use that label to jump directly to your
+special assembler code.
+@end defmac
+
+@node Library Calls
+@section Implicit Calls to Library Routines
+@cindex library subroutine names
+@cindex @file{libgcc.a}
+
+@c prevent bad page break with this line
+Here is an explanation of implicit calls to library routines.
+
+@defmac DECLARE_LIBRARY_RENAMES
+This macro, if defined, should expand to a piece of C code that will get
+expanded when compiling functions for libgcc.a.  It can be used to
+provide alternate names for GCC's internal library functions if there
+are ABI-mandated names that the compiler should provide.
+@end defmac
+
+@findex set_optab_libfunc
+@findex init_one_libfunc
+@hook TARGET_INIT_LIBFUNCS
+This hook should declare additional library routines or rename
+existing ones, using the functions @code{set_optab_libfunc} and
+@code{init_one_libfunc} defined in @file{optabs.c}.
+@code{init_optabs} calls this macro after initializing all the normal
+library routines.
+
+The default is to do nothing.  Most ports don't need to define this hook.
+@end deftypefn
+
+@defmac FLOAT_LIB_COMPARE_RETURNS_BOOL (@var{mode}, @var{comparison})
+This macro should return @code{true} if the library routine that
+implements the floating point comparison operator @var{comparison} in
+mode @var{mode} will return a boolean, and @var{false} if it will
+return a tristate.
+
+GCC's own floating point libraries return tristates from the
+comparison operators, so the default returns false always.  Most ports
+don't need to define this macro.
+@end defmac
+
+@defmac TARGET_LIB_INT_CMP_BIASED
+This macro should evaluate to @code{true} if the integer comparison
+functions (like @code{__cmpdi2}) return 0 to indicate that the first
+operand is smaller than the second, 1 to indicate that they are equal,
+and 2 to indicate that the first operand is greater than the second.
+If this macro evaluates to @code{false} the comparison functions return
+@minus{}1, 0, and 1 instead of 0, 1, and 2.  If the target uses the routines
+in @file{libgcc.a}, you do not need to define this macro.
+@end defmac
+
+@cindex @code{EDOM}, implicit usage
+@findex matherr
+@defmac TARGET_EDOM
+The value of @code{EDOM} on the target machine, as a C integer constant
+expression.  If you don't define this macro, GCC does not attempt to
+deposit the value of @code{EDOM} into @code{errno} directly.  Look in
+@file{/usr/include/errno.h} to find the value of @code{EDOM} on your
+system.
+
+If you do not define @code{TARGET_EDOM}, then compiled code reports
+domain errors by calling the library function and letting it report the
+error.  If mathematical functions on your system use @code{matherr} when
+there is an error, then you should leave @code{TARGET_EDOM} undefined so
+that @code{matherr} is used normally.
+@end defmac
+
+@cindex @code{errno}, implicit usage
+@defmac GEN_ERRNO_RTX
+Define this macro as a C expression to create an rtl expression that
+refers to the global ``variable'' @code{errno}.  (On certain systems,
+@code{errno} may not actually be a variable.)  If you don't define this
+macro, a reasonable default is used.
+@end defmac
+
+@cindex C99 math functions, implicit usage
+@defmac TARGET_C99_FUNCTIONS
+When this macro is nonzero, GCC will implicitly optimize @code{sin} calls into
+@code{sinf} and similarly for other functions defined by C99 standard.  The
+default is zero because a number of existing systems lack support for these
+functions in their runtime so this macro needs to be redefined to one on
+systems that do support the C99 runtime.
+@end defmac
+
+@cindex sincos math function, implicit usage
+@defmac TARGET_HAS_SINCOS
+When this macro is nonzero, GCC will implicitly optimize calls to @code{sin}
+and @code{cos} with the same argument to a call to @code{sincos}.  The
+default is zero.  The target has to provide the following functions:
+@smallexample
+void sincos(double x, double *sin, double *cos);
+void sincosf(float x, float *sin, float *cos);
+void sincosl(long double x, long double *sin, long double *cos);
+@end smallexample
+@end defmac
+
+@defmac NEXT_OBJC_RUNTIME
+Define this macro to generate code for Objective-C message sending using
+the calling convention of the NeXT system.  This calling convention
+involves passing the object, the selector and the method arguments all
+at once to the method-lookup library function.
+
+The default calling convention passes just the object and the selector
+to the lookup function, which returns a pointer to the method.
+@end defmac
+
+@node Addressing Modes
+@section Addressing Modes
+@cindex addressing modes
+
+@c prevent bad page break with this line
+This is about addressing modes.
+
+@defmac HAVE_PRE_INCREMENT
+@defmacx HAVE_PRE_DECREMENT
+@defmacx HAVE_POST_INCREMENT
+@defmacx HAVE_POST_DECREMENT
+A C expression that is nonzero if the machine supports pre-increment,
+pre-decrement, post-increment, or post-decrement addressing respectively.
+@end defmac
+
+@defmac HAVE_PRE_MODIFY_DISP
+@defmacx HAVE_POST_MODIFY_DISP
+A C expression that is nonzero if the machine supports pre- or
+post-address side-effect generation involving constants other than
+the size of the memory operand.
+@end defmac
+
+@defmac HAVE_PRE_MODIFY_REG
+@defmacx HAVE_POST_MODIFY_REG
+A C expression that is nonzero if the machine supports pre- or
+post-address side-effect generation involving a register displacement.
+@end defmac
+
+@defmac CONSTANT_ADDRESS_P (@var{x})
+A C expression that is 1 if the RTX @var{x} is a constant which
+is a valid address.  On most machines the default definition of
+@code{(CONSTANT_P (@var{x}) && GET_CODE (@var{x}) != CONST_DOUBLE)}
+is acceptable, but a few machines are more restrictive as to which
+constant addresses are supported. 
+@end defmac
+
+@defmac CONSTANT_P (@var{x})
+@code{CONSTANT_P}, which is defined by target-independent code,
+accepts integer-values expressions whose values are not explicitly
+known, such as @code{symbol_ref}, @code{label_ref}, and @code{high}
+expressions and @code{const} arithmetic expressions, in addition to
+@code{const_int} and @code{const_double} expressions.
+@end defmac
+
+@defmac MAX_REGS_PER_ADDRESS
+A number, the maximum number of registers that can appear in a valid
+memory address.  Note that it is up to you to specify a value equal to
+the maximum number that @code{TARGET_LEGITIMATE_ADDRESS_P} would ever
+accept.
+@end defmac
+
+@hook TARGET_LEGITIMATE_ADDRESS_P
+A function that returns whether @var{x} (an RTX) is a legitimate memory
+address on the target machine for a memory operand of mode @var{mode}.
+
+Legitimate addresses are defined in two variants: a strict variant and a
+non-strict one.  The @var{strict} parameter chooses which variant is
+desired by the caller.
+
+The strict variant is used in the reload pass.  It must be defined so
+that any pseudo-register that has not been allocated a hard register is
+considered a memory reference.  This is because in contexts where some
+kind of register is required, a pseudo-register with no hard register
+must be rejected.  For non-hard registers, the strict variant should look
+up the @code{reg_renumber} array; it should then proceed using the hard
+register number in the array, or treat the pseudo as a memory reference
+if the array holds @code{-1}.
+
+The non-strict variant is used in other passes.  It must be defined to
+accept all pseudo-registers in every context where some kind of
+register is required.
+
+Normally, constant addresses which are the sum of a @code{symbol_ref}
+and an integer are stored inside a @code{const} RTX to mark them as
+constant.  Therefore, there is no need to recognize such sums
+specifically as legitimate addresses.  Normally you would simply
+recognize any @code{const} as legitimate.
+
+Usually @code{PRINT_OPERAND_ADDRESS} is not prepared to handle constant
+sums that are not marked with  @code{const}.  It assumes that a naked
+@code{plus} indicates indexing.  If so, then you @emph{must} reject such
+naked constant sums as illegitimate addresses, so that none of them will
+be given to @code{PRINT_OPERAND_ADDRESS}.
+
+@cindex @code{TARGET_ENCODE_SECTION_INFO} and address validation
+On some machines, whether a symbolic address is legitimate depends on
+the section that the address refers to.  On these machines, define the
+target hook @code{TARGET_ENCODE_SECTION_INFO} to store the information
+into the @code{symbol_ref}, and then check for it here.  When you see a
+@code{const}, you will have to look inside it to find the
+@code{symbol_ref} in order to determine the section.  @xref{Assembler
+Format}.
+
+@cindex @code{GO_IF_LEGITIMATE_ADDRESS}
+Some ports are still using a deprecated legacy substitute for
+this hook, the @code{GO_IF_LEGITIMATE_ADDRESS} macro.  This macro
+has this syntax:
+
+@example
+#define GO_IF_LEGITIMATE_ADDRESS (@var{mode}, @var{x}, @var{label})
+@end example
+
+@noindent
+and should @code{goto @var{label}} if the address @var{x} is a valid
+address on the target machine for a memory operand of mode @var{mode}.
+
+@findex REG_OK_STRICT
+Compiler source files that want to use the strict variant of this
+macro define the macro @code{REG_OK_STRICT}.  You should use an
+@code{#ifdef REG_OK_STRICT} conditional to define the strict variant in
+that case and the non-strict variant otherwise.
+
+Using the hook is usually simpler because it limits the number of
+files that are recompiled when changes are made.
+@end deftypefn
+
+@defmac TARGET_MEM_CONSTRAINT
+A single character to be used instead of the default @code{'m'}
+character for general memory addresses.  This defines the constraint
+letter which matches the memory addresses accepted by
+@code{TARGET_LEGITIMATE_ADDRESS_P}.  Define this macro if you want to
+support new address formats in your back end without changing the
+semantics of the @code{'m'} constraint.  This is necessary in order to
+preserve functionality of inline assembly constructs using the
+@code{'m'} constraint.
+@end defmac
+
+@defmac FIND_BASE_TERM (@var{x})
+A C expression to determine the base term of address @var{x},
+or to provide a simplified version of @var{x} from which @file{alias.c}
+can easily find the base term.  This macro is used in only two places:
+@code{find_base_value} and @code{find_base_term} in @file{alias.c}.
+
+It is always safe for this macro to not be defined.  It exists so
+that alias analysis can understand machine-dependent addresses.
+
+The typical use of this macro is to handle addresses containing
+a label_ref or symbol_ref within an UNSPEC@.
+@end defmac
+
+@hook TARGET_LEGITIMIZE_ADDRESS
+This hook is given an invalid memory address @var{x} for an
+operand of mode @var{mode} and should try to return a valid memory
+address.
+
+@findex break_out_memory_refs
+@var{x} will always be the result of a call to @code{break_out_memory_refs},
+and @var{oldx} will be the operand that was given to that function to produce
+@var{x}.
+
+The code of the hook should not alter the substructure of
+@var{x}.  If it transforms @var{x} into a more legitimate form, it
+should return the new @var{x}.
+
+It is not necessary for this hook to come up with a legitimate address.
+The compiler has standard ways of doing so in all cases.  In fact, it
+is safe to omit this hook or make it return @var{x} if it cannot find
+a valid way to legitimize the address.  But often a machine-dependent
+strategy can generate better code.
+@end deftypefn
+
+@defmac LEGITIMIZE_RELOAD_ADDRESS (@var{x}, @var{mode}, @var{opnum}, @var{type}, @var{ind_levels}, @var{win})
+A C compound statement that attempts to replace @var{x}, which is an address
+that needs reloading, with a valid memory address for an operand of mode
+@var{mode}.  @var{win} will be a C statement label elsewhere in the code.
+It is not necessary to define this macro, but it might be useful for
+performance reasons.
+
+For example, on the i386, it is sometimes possible to use a single
+reload register instead of two by reloading a sum of two pseudo
+registers into a register.  On the other hand, for number of RISC
+processors offsets are limited so that often an intermediate address
+needs to be generated in order to address a stack slot.  By defining
+@code{LEGITIMIZE_RELOAD_ADDRESS} appropriately, the intermediate addresses
+generated for adjacent some stack slots can be made identical, and thus
+be shared.
+
+@emph{Note}: This macro should be used with caution.  It is necessary
+to know something of how reload works in order to effectively use this,
+and it is quite easy to produce macros that build in too much knowledge
+of reload internals.
+
+@emph{Note}: This macro must be able to reload an address created by a
+previous invocation of this macro.  If it fails to handle such addresses
+then the compiler may generate incorrect code or abort.
+
+@findex push_reload
+The macro definition should use @code{push_reload} to indicate parts that
+need reloading; @var{opnum}, @var{type} and @var{ind_levels} are usually
+suitable to be passed unaltered to @code{push_reload}.
+
+The code generated by this macro must not alter the substructure of
+@var{x}.  If it transforms @var{x} into a more legitimate form, it
+should assign @var{x} (which will always be a C variable) a new value.
+This also applies to parts that you change indirectly by calling
+@code{push_reload}.
+
+@findex strict_memory_address_p
+The macro definition may use @code{strict_memory_address_p} to test if
+the address has become legitimate.
+
+@findex copy_rtx
+If you want to change only a part of @var{x}, one standard way of doing
+this is to use @code{copy_rtx}.  Note, however, that it unshares only a
+single level of rtl.  Thus, if the part to be changed is not at the
+top level, you'll need to replace first the top level.
+It is not necessary for this macro to come up with a legitimate
+address;  but often a machine-dependent strategy can generate better code.
+@end defmac
+
+@hook TARGET_MODE_DEPENDENT_ADDRESS_P
+This hook returns @code{true} if memory address @var{addr} can have
+different meanings depending on the machine mode of the memory
+reference it is used for or if the address is valid for some modes
+but not others.
+
+Autoincrement and autodecrement addresses typically have mode-dependent
+effects because the amount of the increment or decrement is the size
+of the operand being addressed.  Some machines have other mode-dependent
+addresses.  Many RISC machines have no mode-dependent addresses.
+
+You may assume that @var{addr} is a valid address for the machine.
+
+The default version of this hook returns @code{false}.
+@end deftypefn
+
+@defmac GO_IF_MODE_DEPENDENT_ADDRESS (@var{addr}, @var{label})
+A C statement or compound statement with a conditional @code{goto
+@var{label};} executed if memory address @var{x} (an RTX) can have
+different meanings depending on the machine mode of the memory
+reference it is used for or if the address is valid for some modes
+but not others.
+
+Autoincrement and autodecrement addresses typically have mode-dependent
+effects because the amount of the increment or decrement is the size
+of the operand being addressed.  Some machines have other mode-dependent
+addresses.  Many RISC machines have no mode-dependent addresses.
+
+You may assume that @var{addr} is a valid address for the machine.
+
+These are obsolete macros, replaced by the
+@code{TARGET_MODE_DEPENDENT_ADDRESS_P} target hook.
+@end defmac
+
+@defmac LEGITIMATE_CONSTANT_P (@var{x})
+A C expression that is nonzero if @var{x} is a legitimate constant for
+an immediate operand on the target machine.  You can assume that
+@var{x} satisfies @code{CONSTANT_P}, so you need not check this.  In fact,
+@samp{1} is a suitable definition for this macro on machines where
+anything @code{CONSTANT_P} is valid.
+@end defmac
+
+@hook TARGET_DELEGITIMIZE_ADDRESS
+This hook is used to undo the possibly obfuscating effects of the
+@code{LEGITIMIZE_ADDRESS} and @code{LEGITIMIZE_RELOAD_ADDRESS} target
+macros.  Some backend implementations of these macros wrap symbol
+references inside an @code{UNSPEC} rtx to represent PIC or similar
+addressing modes.  This target hook allows GCC's optimizers to understand
+the semantics of these opaque @code{UNSPEC}s by converting them back
+into their original form.
+@end deftypefn
+
+@hook TARGET_CANNOT_FORCE_CONST_MEM
+This hook should return true if @var{x} is of a form that cannot (or
+should not) be spilled to the constant pool.  The default version of
+this hook returns false.
+
+The primary reason to define this hook is to prevent reload from
+deciding that a non-legitimate constant would be better reloaded
+from the constant pool instead of spilling and reloading a register
+holding the constant.  This restriction is often true of addresses
+of TLS symbols for various targets.
+@end deftypefn
+
+@hook TARGET_USE_BLOCKS_FOR_CONSTANT_P
+This hook should return true if pool entries for constant @var{x} can
+be placed in an @code{object_block} structure.  @var{mode} is the mode
+of @var{x}.
+
+The default version returns false for all constants.
+@end deftypefn
+
+@hook TARGET_BUILTIN_RECIPROCAL
+This hook should return the DECL of a function that implements reciprocal of
+the builtin function with builtin function code @var{fn}, or
+@code{NULL_TREE} if such a function is not available.  @var{md_fn} is true
+when @var{fn} is a code of a machine-dependent builtin function.  When
+@var{sqrt} is true, additional optimizations that apply only to the reciprocal
+of a square root function are performed, and only reciprocals of @code{sqrt}
+function are valid.
+@end deftypefn
+
+@hook TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD
+This hook should return the DECL of a function @var{f} that given an
+address @var{addr} as an argument returns a mask @var{m} that can be
+used to extract from two vectors the relevant data that resides in
+@var{addr} in case @var{addr} is not properly aligned.
+
+The autovectorizer, when vectorizing a load operation from an address
+@var{addr} that may be unaligned, will generate two vector loads from
+the two aligned addresses around @var{addr}. It then generates a
+@code{REALIGN_LOAD} operation to extract the relevant data from the
+two loaded vectors. The first two arguments to @code{REALIGN_LOAD},
+@var{v1} and @var{v2}, are the two vectors, each of size @var{VS}, and
+the third argument, @var{OFF}, defines how the data will be extracted
+from these two vectors: if @var{OFF} is 0, then the returned vector is
+@var{v2}; otherwise, the returned vector is composed from the last
+@var{VS}-@var{OFF} elements of @var{v1} concatenated to the first
+@var{OFF} elements of @var{v2}.
+
+If this hook is defined, the autovectorizer will generate a call
+to @var{f} (using the DECL tree that this hook returns) and will
+use the return value of @var{f} as the argument @var{OFF} to
+@code{REALIGN_LOAD}. Therefore, the mask @var{m} returned by @var{f}
+should comply with the semantics expected by @code{REALIGN_LOAD}
+described above.
+If this hook is not defined, then @var{addr} will be used as
+the argument @var{OFF} to @code{REALIGN_LOAD}, in which case the low
+log2(@var{VS}) @minus{} 1 bits of @var{addr} will be considered.
+@end deftypefn
+
+@hook TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_EVEN
+This hook should return the DECL of a function @var{f} that implements
+widening multiplication of the even elements of two input vectors of type @var{x}.
+
+If this hook is defined, the autovectorizer will use it along with the
+@code{TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_ODD} target hook when vectorizing
+widening multiplication in cases that the order of the results does not have to be
+preserved (e.g.@: used only by a reduction computation). Otherwise, the
+@code{widen_mult_hi/lo} idioms will be used.
+@end deftypefn
+
+@hook TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_ODD
+This hook should return the DECL of a function @var{f} that implements
+widening multiplication of the odd elements of two input vectors of type @var{x}.
+
+If this hook is defined, the autovectorizer will use it along with the
+@code{TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_EVEN} target hook when vectorizing
+widening multiplication in cases that the order of the results does not have to be
+preserved (e.g.@: used only by a reduction computation). Otherwise, the
+@code{widen_mult_hi/lo} idioms will be used.
+@end deftypefn
+
+@hook TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST
+Returns cost of different scalar or vector statements for vectorization cost model.
+For vector memory operations the cost may depend on type (@var{vectype}) and 
+misalignment value (@var{misalign}).
+@end deftypefn
+
+@hook TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE
+Return true if vector alignment is reachable (by peeling N iterations) for the given type.
+@end deftypefn
+
+@hook TARGET_VECTORIZE_BUILTIN_VEC_PERM
+Target builtin that implements vector permute.
+@end deftypefn
+
+@hook TARGET_VECTORIZE_BUILTIN_VEC_PERM_OK
+Return true if a vector created for @code{builtin_vec_perm} is valid.
+@end deftypefn
+
+@hook TARGET_VECTORIZE_BUILTIN_CONVERSION
+This hook should return the DECL of a function that implements conversion of the
+input vector of type @var{src_type} to type @var{dest_type}.
+The value of @var{code} is one of the enumerators in @code{enum tree_code} and
+specifies how the conversion is to be applied
+(truncation, rounding, etc.).
+
+If this hook is defined, the autovectorizer will use the
+@code{TARGET_VECTORIZE_BUILTIN_CONVERSION} target hook when vectorizing
+conversion. Otherwise, it will return @code{NULL_TREE}.
+@end deftypefn
+
+@hook TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION
+This hook should return the decl of a function that implements the
+vectorized variant of the builtin function with builtin function code
+@var{code} or @code{NULL_TREE} if such a function is not available.
+The value of @var{fndecl} is the builtin function declaration.  The
+return type of the vectorized function shall be of vector type
+@var{vec_type_out} and the argument types should be @var{vec_type_in}.
+@end deftypefn
+
+@hook TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT
+This hook should return true if the target supports misaligned vector
+store/load of a specific factor denoted in the @var{misalignment}
+parameter.  The vector store/load should be of machine mode @var{mode} and
+the elements in the vectors should be of type @var{type}.  @var{is_packed}
+parameter is true if the memory access is defined in a packed struct.
+@end deftypefn
+
+@hook TARGET_VECTORIZE_PREFERRED_SIMD_MODE
+This hook should return the preferred mode for vectorizing scalar
+mode @var{mode}.  The default is
+equal to @code{word_mode}, because the vectorizer can do some
+transformations even in absence of specialized @acronym{SIMD} hardware.
+@end deftypefn
+
+@hook TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES
+This hook should return a mask of sizes that should be iterated over
+after trying to autovectorize using the vector size derived from the
+mode returned by @code{TARGET_VECTORIZE_PREFERRED_SIMD_MODE}.
+The default is zero which means to not iterate over other vector sizes.
+@end deftypefn
+
+@node Anchored Addresses
+@section Anchored Addresses
+@cindex anchored addresses
+@cindex @option{-fsection-anchors}
+
+GCC usually addresses every static object as a separate entity.
+For example, if we have:
+
+@smallexample
+static int a, b, c;
+int foo (void) @{ return a + b + c; @}
+@end smallexample
+
+the code for @code{foo} will usually calculate three separate symbolic
+addresses: those of @code{a}, @code{b} and @code{c}.  On some targets,
+it would be better to calculate just one symbolic address and access
+the three variables relative to it.  The equivalent pseudocode would
+be something like:
+
+@smallexample
+int foo (void)
+@{
+  register int *xr = &x;
+  return xr[&a - &x] + xr[&b - &x] + xr[&c - &x];
+@}
+@end smallexample
+
+(which isn't valid C).  We refer to shared addresses like @code{x} as
+``section anchors''.  Their use is controlled by @option{-fsection-anchors}.
+
+The hooks below describe the target properties that GCC needs to know
+in order to make effective use of section anchors.  It won't use
+section anchors at all unless either @code{TARGET_MIN_ANCHOR_OFFSET}
+or @code{TARGET_MAX_ANCHOR_OFFSET} is set to a nonzero value.
+
+@hook TARGET_MIN_ANCHOR_OFFSET
+The minimum offset that should be applied to a section anchor.
+On most targets, it should be the smallest offset that can be
+applied to a base register while still giving a legitimate address
+for every mode.  The default value is 0.
+@end deftypevr
+
+@hook TARGET_MAX_ANCHOR_OFFSET
+Like @code{TARGET_MIN_ANCHOR_OFFSET}, but the maximum (inclusive)
+offset that should be applied to section anchors.  The default
+value is 0.
+@end deftypevr
+
+@hook TARGET_ASM_OUTPUT_ANCHOR
+Write the assembly code to define section anchor @var{x}, which is a
+@code{SYMBOL_REF} for which @samp{SYMBOL_REF_ANCHOR_P (@var{x})} is true.
+The hook is called with the assembly output position set to the beginning
+of @code{SYMBOL_REF_BLOCK (@var{x})}.
+
+If @code{ASM_OUTPUT_DEF} is available, the hook's default definition uses
+it to define the symbol as @samp{. + SYMBOL_REF_BLOCK_OFFSET (@var{x})}.
+If @code{ASM_OUTPUT_DEF} is not available, the hook's default definition
+is @code{NULL}, which disables the use of section anchors altogether.
+@end deftypefn
+
+@hook TARGET_USE_ANCHORS_FOR_SYMBOL_P
+Return true if GCC should attempt to use anchors to access @code{SYMBOL_REF}
+@var{x}.  You can assume @samp{SYMBOL_REF_HAS_BLOCK_INFO_P (@var{x})} and
+@samp{!SYMBOL_REF_ANCHOR_P (@var{x})}.
+
+The default version is correct for most targets, but you might need to
+intercept this hook to handle things like target-specific attributes
+or target-specific sections.
+@end deftypefn
+
+@node Condition Code
+@section Condition Code Status
+@cindex condition code status
+
+The macros in this section can be split in two families, according to the
+two ways of representing condition codes in GCC.
+
+The first representation is the so called @code{(cc0)} representation
+(@pxref{Jump Patterns}), where all instructions can have an implicit
+clobber of the condition codes.  The second is the condition code
+register representation, which provides better schedulability for
+architectures that do have a condition code register, but on which
+most instructions do not affect it.  The latter category includes
+most RISC machines.
+
+The implicit clobbering poses a strong restriction on the placement of
+the definition and use of the condition code, which need to be in adjacent
+insns for machines using @code{(cc0)}.  This can prevent important
+optimizations on some machines.  For example, on the IBM RS/6000, there
+is a delay for taken branches unless the condition code register is set
+three instructions earlier than the conditional branch.  The instruction
+scheduler cannot perform this optimization if it is not permitted to
+separate the definition and use of the condition code register.
+
+For this reason, it is possible and suggested to use a register to
+represent the condition code for new ports.  If there is a specific
+condition code register in the machine, use a hard register.  If the
+condition code or comparison result can be placed in any general register,
+or if there are multiple condition registers, use a pseudo register.
+Registers used to store the condition code value will usually have a mode
+that is in class @code{MODE_CC}.
+
+Alternatively, you can use @code{BImode} if the comparison operator is
+specified already in the compare instruction.  In this case, you are not
+interested in most macros in this section.
+
+@menu
+* CC0 Condition Codes::      Old style representation of condition codes.
+* MODE_CC Condition Codes::  Modern representation of condition codes.
+* Cond Exec Macros::         Macros to control conditional execution.
+@end menu
+
+@node CC0 Condition Codes
+@subsection Representation of condition codes using @code{(cc0)}
+@findex cc0
+
+@findex cc_status
+The file @file{conditions.h} defines a variable @code{cc_status} to
+describe how the condition code was computed (in case the interpretation of
+the condition code depends on the instruction that it was set by).  This
+variable contains the RTL expressions on which the condition code is
+currently based, and several standard flags.
+
+Sometimes additional machine-specific flags must be defined in the machine
+description header file.  It can also add additional machine-specific
+information by defining @code{CC_STATUS_MDEP}.
+
+@defmac CC_STATUS_MDEP
+C code for a data type which is used for declaring the @code{mdep}
+component of @code{cc_status}.  It defaults to @code{int}.
+
+This macro is not used on machines that do not use @code{cc0}.
+@end defmac
+
+@defmac CC_STATUS_MDEP_INIT
+A C expression to initialize the @code{mdep} field to ``empty''.
+The default definition does nothing, since most machines don't use
+the field anyway.  If you want to use the field, you should probably
+define this macro to initialize it.
+
+This macro is not used on machines that do not use @code{cc0}.
+@end defmac
+
+@defmac NOTICE_UPDATE_CC (@var{exp}, @var{insn})
+A C compound statement to set the components of @code{cc_status}
+appropriately for an insn @var{insn} whose body is @var{exp}.  It is
+this macro's responsibility to recognize insns that set the condition
+code as a byproduct of other activity as well as those that explicitly
+set @code{(cc0)}.
+
+This macro is not used on machines that do not use @code{cc0}.
+
+If there are insns that do not set the condition code but do alter
+other machine registers, this macro must check to see whether they
+invalidate the expressions that the condition code is recorded as
+reflecting.  For example, on the 68000, insns that store in address
+registers do not set the condition code, which means that usually
+@code{NOTICE_UPDATE_CC} can leave @code{cc_status} unaltered for such
+insns.  But suppose that the previous insn set the condition code
+based on location @samp{a4@@(102)} and the current insn stores a new
+value in @samp{a4}.  Although the condition code is not changed by
+this, it will no longer be true that it reflects the contents of
+@samp{a4@@(102)}.  Therefore, @code{NOTICE_UPDATE_CC} must alter
+@code{cc_status} in this case to say that nothing is known about the
+condition code value.
+
+The definition of @code{NOTICE_UPDATE_CC} must be prepared to deal
+with the results of peephole optimization: insns whose patterns are
+@code{parallel} RTXs containing various @code{reg}, @code{mem} or
+constants which are just the operands.  The RTL structure of these
+insns is not sufficient to indicate what the insns actually do.  What
+@code{NOTICE_UPDATE_CC} should do when it sees one is just to run
+@code{CC_STATUS_INIT}.
+
+A possible definition of @code{NOTICE_UPDATE_CC} is to call a function
+that looks at an attribute (@pxref{Insn Attributes}) named, for example,
+@samp{cc}.  This avoids having detailed information about patterns in
+two places, the @file{md} file and in @code{NOTICE_UPDATE_CC}.
+@end defmac
+
+@node MODE_CC Condition Codes
+@subsection Representation of condition codes using registers
+@findex CCmode
+@findex MODE_CC
+
+@defmac SELECT_CC_MODE (@var{op}, @var{x}, @var{y})
+On many machines, the condition code may be produced by other instructions
+than compares, for example the branch can use directly the condition
+code set by a subtract instruction.  However, on some machines
+when the condition code is set this way some bits (such as the overflow
+bit) are not set in the same way as a test instruction, so that a different
+branch instruction must be used for some conditional branches.  When
+this happens, use the machine mode of the condition code register to
+record different formats of the condition code register.  Modes can
+also be used to record which compare instruction (e.g. a signed or an
+unsigned comparison) produced the condition codes.
+
+If other modes than @code{CCmode} are required, add them to
+@file{@var{machine}-modes.def} and define @code{SELECT_CC_MODE} to choose
+a mode given an operand of a compare.  This is needed because the modes
+have to be chosen not only during RTL generation but also, for example,
+by instruction combination.  The result of @code{SELECT_CC_MODE} should
+be consistent with the mode used in the patterns; for example to support
+the case of the add on the SPARC discussed above, we have the pattern
+
+@smallexample
+(define_insn ""
+  [(set (reg:CC_NOOV 0)
+        (compare:CC_NOOV
+          (plus:SI (match_operand:SI 0 "register_operand" "%r")
+                   (match_operand:SI 1 "arith_operand" "rI"))
+          (const_int 0)))]
+  ""
+  "@dots{}")
+@end smallexample
+
+@noindent
+together with a @code{SELECT_CC_MODE} that returns @code{CC_NOOVmode}
+for comparisons whose argument is a @code{plus}:
+
+@smallexample
+#define SELECT_CC_MODE(OP,X,Y) \
+  (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT          \
+   ? ((OP == EQ || OP == NE) ? CCFPmode : CCFPEmode)    \
+   : ((GET_CODE (X) == PLUS || GET_CODE (X) == MINUS    \
+       || GET_CODE (X) == NEG) \
+      ? CC_NOOVmode : CCmode))
+@end smallexample
+
+Another reason to use modes is to retain information on which operands
+were used by the comparison; see @code{REVERSIBLE_CC_MODE} later in
+this section.
+
+You should define this macro if and only if you define extra CC modes
+in @file{@var{machine}-modes.def}.
+@end defmac
+
+@defmac CANONICALIZE_COMPARISON (@var{code}, @var{op0}, @var{op1})
+On some machines not all possible comparisons are defined, but you can
+convert an invalid comparison into a valid one.  For example, the Alpha
+does not have a @code{GT} comparison, but you can use an @code{LT}
+comparison instead and swap the order of the operands.
+
+On such machines, define this macro to be a C statement to do any
+required conversions.  @var{code} is the initial comparison code
+and @var{op0} and @var{op1} are the left and right operands of the
+comparison, respectively.  You should modify @var{code}, @var{op0}, and
+@var{op1} as required.
+
+GCC will not assume that the comparison resulting from this macro is
+valid but will see if the resulting insn matches a pattern in the
+@file{md} file.
+
+You need not define this macro if it would never change the comparison
+code or operands.
+@end defmac
+
+@defmac REVERSIBLE_CC_MODE (@var{mode})
+A C expression whose value is one if it is always safe to reverse a
+comparison whose mode is @var{mode}.  If @code{SELECT_CC_MODE}
+can ever return @var{mode} for a floating-point inequality comparison,
+then @code{REVERSIBLE_CC_MODE (@var{mode})} must be zero.
+
+You need not define this macro if it would always returns zero or if the
+floating-point format is anything other than @code{IEEE_FLOAT_FORMAT}.
+For example, here is the definition used on the SPARC, where floating-point
+inequality comparisons are always given @code{CCFPEmode}:
+
+@smallexample
+#define REVERSIBLE_CC_MODE(MODE)  ((MODE) != CCFPEmode)
+@end smallexample
+@end defmac
+
+@defmac REVERSE_CONDITION (@var{code}, @var{mode})
+A C expression whose value is reversed condition code of the @var{code} for
+comparison done in CC_MODE @var{mode}.  The macro is used only in case
+@code{REVERSIBLE_CC_MODE (@var{mode})} is nonzero.  Define this macro in case
+machine has some non-standard way how to reverse certain conditionals.  For
+instance in case all floating point conditions are non-trapping, compiler may
+freely convert unordered compares to ordered one.  Then definition may look
+like:
+
+@smallexample
+#define REVERSE_CONDITION(CODE, MODE) \
+   ((MODE) != CCFPmode ? reverse_condition (CODE) \
+    : reverse_condition_maybe_unordered (CODE))
+@end smallexample
+@end defmac
+
+@hook TARGET_FIXED_CONDITION_CODE_REGS
+On targets which do not use @code{(cc0)}, and which use a hard
+register rather than a pseudo-register to hold condition codes, the
+regular CSE passes are often not able to identify cases in which the
+hard register is set to a common value.  Use this hook to enable a
+small pass which optimizes such cases.  This hook should return true
+to enable this pass, and it should set the integers to which its
+arguments point to the hard register numbers used for condition codes.
+When there is only one such register, as is true on most systems, the
+integer pointed to by @var{p2} should be set to
+@code{INVALID_REGNUM}.
+
+The default version of this hook returns false.
+@end deftypefn
+
+@hook TARGET_CC_MODES_COMPATIBLE
+On targets which use multiple condition code modes in class
+@code{MODE_CC}, it is sometimes the case that a comparison can be
+validly done in more than one mode.  On such a system, define this
+target hook to take two mode arguments and to return a mode in which
+both comparisons may be validly done.  If there is no such mode,
+return @code{VOIDmode}.
+
+The default version of this hook checks whether the modes are the
+same.  If they are, it returns that mode.  If they are different, it
+returns @code{VOIDmode}.
+@end deftypefn
+
+@node Cond Exec Macros
+@subsection Macros to control conditional execution
+@findex conditional execution
+@findex predication
+
+There is one macro that may need to be defined for targets
+supporting conditional execution, independent of how they
+represent conditional branches.
+
+@defmac REVERSE_CONDEXEC_PREDICATES_P (@var{op1}, @var{op2})
+A C expression that returns true if the conditional execution predicate
+@var{op1}, a comparison operation, is the inverse of @var{op2} and vice
+versa.  Define this to return 0 if the target has conditional execution
+predicates that cannot be reversed safely.  There is no need to validate
+that the arguments of op1 and op2 are the same, this is done separately.
+If no expansion is specified, this macro is defined as follows:
+
+@smallexample
+#define REVERSE_CONDEXEC_PREDICATES_P (x, y) \
+   (GET_CODE ((x)) == reversed_comparison_code ((y), NULL))
+@end smallexample
+@end defmac
+
+@node Costs
+@section Describing Relative Costs of Operations
+@cindex costs of instructions
+@cindex relative costs
+@cindex speed of instructions
+
+These macros let you describe the relative speed of various operations
+on the target machine.
+
+@defmac REGISTER_MOVE_COST (@var{mode}, @var{from}, @var{to})
+A C expression for the cost of moving data of mode @var{mode} from a
+register in class @var{from} to one in class @var{to}.  The classes are
+expressed using the enumeration values such as @code{GENERAL_REGS}.  A
+value of 2 is the default; other values are interpreted relative to
+that.
+
+It is not required that the cost always equal 2 when @var{from} is the
+same as @var{to}; on some machines it is expensive to move between
+registers if they are not general registers.
+
+If reload sees an insn consisting of a single @code{set} between two
+hard registers, and if @code{REGISTER_MOVE_COST} applied to their
+classes returns a value of 2, reload does not check to ensure that the
+constraints of the insn are met.  Setting a cost of other than 2 will
+allow reload to verify that the constraints are met.  You should do this
+if the @samp{mov@var{m}} pattern's constraints do not allow such copying.
+
+These macros are obsolete, new ports should use the target hook
+@code{TARGET_REGISTER_MOVE_COST} instead.
+@end defmac
+
+@hook TARGET_REGISTER_MOVE_COST
+This target hook should return the cost of moving data of mode @var{mode}
+from a register in class @var{from} to one in class @var{to}.  The classes
+are expressed using the enumeration values such as @code{GENERAL_REGS}.
+A value of 2 is the default; other values are interpreted relative to
+that.
+
+It is not required that the cost always equal 2 when @var{from} is the
+same as @var{to}; on some machines it is expensive to move between
+registers if they are not general registers.
+
+If reload sees an insn consisting of a single @code{set} between two
+hard registers, and if @code{TARGET_REGISTER_MOVE_COST} applied to their
+classes returns a value of 2, reload does not check to ensure that the
+constraints of the insn are met.  Setting a cost of other than 2 will
+allow reload to verify that the constraints are met.  You should do this
+if the @samp{mov@var{m}} pattern's constraints do not allow such copying.
+
+The default version of this function returns 2.
+@end deftypefn
+
+@defmac MEMORY_MOVE_COST (@var{mode}, @var{class}, @var{in})
+A C expression for the cost of moving data of mode @var{mode} between a
+register of class @var{class} and memory; @var{in} is zero if the value
+is to be written to memory, nonzero if it is to be read in.  This cost
+is relative to those in @code{REGISTER_MOVE_COST}.  If moving between
+registers and memory is more expensive than between two registers, you
+should define this macro to express the relative cost.
+
+If you do not define this macro, GCC uses a default cost of 4 plus
+the cost of copying via a secondary reload register, if one is
+needed.  If your machine requires a secondary reload register to copy
+between memory and a register of @var{class} but the reload mechanism is
+more complex than copying via an intermediate, define this macro to
+reflect the actual cost of the move.
+
+GCC defines the function @code{memory_move_secondary_cost} if
+secondary reloads are needed.  It computes the costs due to copying via
+a secondary register.  If your machine copies from memory using a
+secondary register in the conventional way but the default base value of
+4 is not correct for your machine, define this macro to add some other
+value to the result of that function.  The arguments to that function
+are the same as to this macro.
+
+These macros are obsolete, new ports should use the target hook
+@code{TARGET_MEMORY_MOVE_COST} instead.
+@end defmac
+
+@hook TARGET_MEMORY_MOVE_COST
+This target hook should return the cost of moving data of mode @var{mode}
+between a register of class @var{rclass} and memory; @var{in} is @code{false}
+if the value is to be written to memory, @code{true} if it is to be read in.
+This cost is relative to those in @code{TARGET_REGISTER_MOVE_COST}.
+If moving between registers and memory is more expensive than between two
+registers, you should add this target hook to express the relative cost.
+
+If you do not add this target hook, GCC uses a default cost of 4 plus
+the cost of copying via a secondary reload register, if one is
+needed.  If your machine requires a secondary reload register to copy
+between memory and a register of @var{rclass} but the reload mechanism is
+more complex than copying via an intermediate, use this target hook to
+reflect the actual cost of the move.
+
+GCC defines the function @code{memory_move_secondary_cost} if
+secondary reloads are needed.  It computes the costs due to copying via
+a secondary register.  If your machine copies from memory using a
+secondary register in the conventional way but the default base value of
+4 is not correct for your machine, use this target hook to add some other
+value to the result of that function.  The arguments to that function
+are the same as to this target hook.
+@end deftypefn
+
+@defmac BRANCH_COST (@var{speed_p}, @var{predictable_p})
+A C expression for the cost of a branch instruction.  A value of 1 is
+the default; other values are interpreted relative to that. Parameter
+@var{speed_p} is true when the branch in question should be optimized
+for speed.  When it is false, @code{BRANCH_COST} should return a value
+optimal for code size rather than performance.  @var{predictable_p} is
+true for well-predicted branches. On many architectures the
+@code{BRANCH_COST} can be reduced then.
+@end defmac
+
+Here are additional macros which do not specify precise relative costs,
+but only that certain actions are more expensive than GCC would
+ordinarily expect.
+
+@defmac SLOW_BYTE_ACCESS
+Define this macro as a C expression which is nonzero if accessing less
+than a word of memory (i.e.@: a @code{char} or a @code{short}) is no
+faster than accessing a word of memory, i.e., if such access
+require more than one instruction or if there is no difference in cost
+between byte and (aligned) word loads.
+
+When this macro is not defined, the compiler will access a field by
+finding the smallest containing object; when it is defined, a fullword
+load will be used if alignment permits.  Unless bytes accesses are
+faster than word accesses, using word accesses is preferable since it
+may eliminate subsequent memory access if subsequent accesses occur to
+other fields in the same word of the structure, but to different bytes.
+@end defmac
+
+@defmac SLOW_UNALIGNED_ACCESS (@var{mode}, @var{alignment})
+Define this macro to be the value 1 if memory accesses described by the
+@var{mode} and @var{alignment} parameters have a cost many times greater
+than aligned accesses, for example if they are emulated in a trap
+handler.
+
+When this macro is nonzero, the compiler will act as if
+@code{STRICT_ALIGNMENT} were nonzero when generating code for block
+moves.  This can cause significantly more instructions to be produced.
+Therefore, do not set this macro nonzero if unaligned accesses only add a
+cycle or two to the time for a memory access.
+
+If the value of this macro is always zero, it need not be defined.  If
+this macro is defined, it should produce a nonzero value when
+@code{STRICT_ALIGNMENT} is nonzero.
+@end defmac
+
+@defmac MOVE_RATIO (@var{speed})
+The threshold of number of scalar memory-to-memory move insns, @emph{below}
+which a sequence of insns should be generated instead of a
+string move insn or a library call.  Increasing the value will always
+make code faster, but eventually incurs high cost in increased code size.
+
+Note that on machines where the corresponding move insn is a
+@code{define_expand} that emits a sequence of insns, this macro counts
+the number of such sequences.
+
+The parameter @var{speed} is true if the code is currently being
+optimized for speed rather than size.
+
+If you don't define this, a reasonable default is used.
+@end defmac
+
+@defmac MOVE_BY_PIECES_P (@var{size}, @var{alignment})
+A C expression used to determine whether @code{move_by_pieces} will be used to
+copy a chunk of memory, or whether some other block move mechanism
+will be used.  Defaults to 1 if @code{move_by_pieces_ninsns} returns less
+than @code{MOVE_RATIO}.
+@end defmac
+
+@defmac MOVE_MAX_PIECES
+A C expression used by @code{move_by_pieces} to determine the largest unit
+a load or store used to copy memory is.  Defaults to @code{MOVE_MAX}.
+@end defmac
+
+@defmac CLEAR_RATIO (@var{speed})
+The threshold of number of scalar move insns, @emph{below} which a sequence
+of insns should be generated to clear memory instead of a string clear insn
+or a library call.  Increasing the value will always make code faster, but
+eventually incurs high cost in increased code size.
+
+The parameter @var{speed} is true if the code is currently being
+optimized for speed rather than size.
+
+If you don't define this, a reasonable default is used.
+@end defmac
+
+@defmac CLEAR_BY_PIECES_P (@var{size}, @var{alignment})
+A C expression used to determine whether @code{clear_by_pieces} will be used
+to clear a chunk of memory, or whether some other block clear mechanism
+will be used.  Defaults to 1 if @code{move_by_pieces_ninsns} returns less
+than @code{CLEAR_RATIO}.
+@end defmac
+
+@defmac SET_RATIO (@var{speed})
+The threshold of number of scalar move insns, @emph{below} which a sequence
+of insns should be generated to set memory to a constant value, instead of
+a block set insn or a library call.  
+Increasing the value will always make code faster, but
+eventually incurs high cost in increased code size.
+
+The parameter @var{speed} is true if the code is currently being
+optimized for speed rather than size.
+
+If you don't define this, it defaults to the value of @code{MOVE_RATIO}.
+@end defmac
+
+@defmac SET_BY_PIECES_P (@var{size}, @var{alignment})
+A C expression used to determine whether @code{store_by_pieces} will be
+used to set a chunk of memory to a constant value, or whether some 
+other mechanism will be used.  Used by @code{__builtin_memset} when 
+storing values other than constant zero.
+Defaults to 1 if @code{move_by_pieces_ninsns} returns less
+than @code{SET_RATIO}.
+@end defmac
+
+@defmac STORE_BY_PIECES_P (@var{size}, @var{alignment})
+A C expression used to determine whether @code{store_by_pieces} will be
+used to set a chunk of memory to a constant string value, or whether some
+other mechanism will be used.  Used by @code{__builtin_strcpy} when
+called with a constant source string.
+Defaults to 1 if @code{move_by_pieces_ninsns} returns less
+than @code{MOVE_RATIO}.
+@end defmac
+
+@defmac USE_LOAD_POST_INCREMENT (@var{mode})
+A C expression used to determine whether a load postincrement is a good
+thing to use for a given mode.  Defaults to the value of
+@code{HAVE_POST_INCREMENT}.
+@end defmac
+
+@defmac USE_LOAD_POST_DECREMENT (@var{mode})
+A C expression used to determine whether a load postdecrement is a good
+thing to use for a given mode.  Defaults to the value of
+@code{HAVE_POST_DECREMENT}.
+@end defmac
+
+@defmac USE_LOAD_PRE_INCREMENT (@var{mode})
+A C expression used to determine whether a load preincrement is a good
+thing to use for a given mode.  Defaults to the value of
+@code{HAVE_PRE_INCREMENT}.
+@end defmac
+
+@defmac USE_LOAD_PRE_DECREMENT (@var{mode})
+A C expression used to determine whether a load predecrement is a good
+thing to use for a given mode.  Defaults to the value of
+@code{HAVE_PRE_DECREMENT}.
+@end defmac
+
+@defmac USE_STORE_POST_INCREMENT (@var{mode})
+A C expression used to determine whether a store postincrement is a good
+thing to use for a given mode.  Defaults to the value of
+@code{HAVE_POST_INCREMENT}.
+@end defmac
+
+@defmac USE_STORE_POST_DECREMENT (@var{mode})
+A C expression used to determine whether a store postdecrement is a good
+thing to use for a given mode.  Defaults to the value of
+@code{HAVE_POST_DECREMENT}.
+@end defmac
+
+@defmac USE_STORE_PRE_INCREMENT (@var{mode})
+This macro is used to determine whether a store preincrement is a good
+thing to use for a given mode.  Defaults to the value of
+@code{HAVE_PRE_INCREMENT}.
+@end defmac
+
+@defmac USE_STORE_PRE_DECREMENT (@var{mode})
+This macro is used to determine whether a store predecrement is a good
+thing to use for a given mode.  Defaults to the value of
+@code{HAVE_PRE_DECREMENT}.
+@end defmac
+
+@defmac NO_FUNCTION_CSE
+Define this macro if it is as good or better to call a constant
+function address than to call an address kept in a register.
+@end defmac
+
+@defmac RANGE_TEST_NON_SHORT_CIRCUIT
+Define this macro if a non-short-circuit operation produced by
+@samp{fold_range_test ()} is optimal.  This macro defaults to true if
+@code{BRANCH_COST} is greater than or equal to the value 2.
+@end defmac
+
+@hook TARGET_RTX_COSTS
+This target hook describes the relative costs of RTL expressions.
+
+The cost may depend on the precise form of the expression, which is
+available for examination in @var{x}, and the rtx code of the expression
+in which it is contained, found in @var{outer_code}.  @var{code} is the
+expression code---redundant, since it can be obtained with
+@code{GET_CODE (@var{x})}.
+
+In implementing this hook, you can use the construct
+@code{COSTS_N_INSNS (@var{n})} to specify a cost equal to @var{n} fast
+instructions.
+
+On entry to the hook, @code{*@var{total}} contains a default estimate
+for the cost of the expression.  The hook should modify this value as
+necessary.  Traditionally, the default costs are @code{COSTS_N_INSNS (5)}
+for multiplications, @code{COSTS_N_INSNS (7)} for division and modulus
+operations, and @code{COSTS_N_INSNS (1)} for all other operations.
+
+When optimizing for code size, i.e.@: when @code{speed} is
+false, this target hook should be used to estimate the relative
+size cost of an expression, again relative to @code{COSTS_N_INSNS}.
+
+The hook returns true when all subexpressions of @var{x} have been
+processed, and false when @code{rtx_cost} should recurse.
+@end deftypefn
+
+@hook TARGET_ADDRESS_COST
+This hook computes the cost of an addressing mode that contains
+@var{address}.  If not defined, the cost is computed from
+the @var{address} expression and the @code{TARGET_RTX_COST} hook.
+
+For most CISC machines, the default cost is a good approximation of the
+true cost of the addressing mode.  However, on RISC machines, all
+instructions normally have the same length and execution time.  Hence
+all addresses will have equal costs.
+
+In cases where more than one form of an address is known, the form with
+the lowest cost will be used.  If multiple forms have the same, lowest,
+cost, the one that is the most complex will be used.
+
+For example, suppose an address that is equal to the sum of a register
+and a constant is used twice in the same basic block.  When this macro
+is not defined, the address will be computed in a register and memory
+references will be indirect through that register.  On machines where
+the cost of the addressing mode containing the sum is no higher than
+that of a simple indirect reference, this will produce an additional
+instruction and possibly require an additional register.  Proper
+specification of this macro eliminates this overhead for such machines.
+
+This hook is never called with an invalid address.
+
+On machines where an address involving more than one register is as
+cheap as an address computation involving only one register, defining
+@code{TARGET_ADDRESS_COST} to reflect this can cause two registers to
+be live over a region of code where only one would have been if
+@code{TARGET_ADDRESS_COST} were not defined in that manner.  This effect
+should be considered in the definition of this macro.  Equivalent costs
+should probably only be given to addresses with different numbers of
+registers on machines with lots of registers.
+@end deftypefn
+
+@node Scheduling
+@section Adjusting the Instruction Scheduler
+
+The instruction scheduler may need a fair amount of machine-specific
+adjustment in order to produce good code.  GCC provides several target
+hooks for this purpose.  It is usually enough to define just a few of
+them: try the first ones in this list first.
+
+@hook TARGET_SCHED_ISSUE_RATE
+This hook returns the maximum number of instructions that can ever
+issue at the same time on the target machine.  The default is one.
+Although the insn scheduler can define itself the possibility of issue
+an insn on the same cycle, the value can serve as an additional
+constraint to issue insns on the same simulated processor cycle (see
+hooks @samp{TARGET_SCHED_REORDER} and @samp{TARGET_SCHED_REORDER2}).
+This value must be constant over the entire compilation.  If you need
+it to vary depending on what the instructions are, you must use
+@samp{TARGET_SCHED_VARIABLE_ISSUE}.
+@end deftypefn
+
+@hook TARGET_SCHED_VARIABLE_ISSUE
+This hook is executed by the scheduler after it has scheduled an insn
+from the ready list.  It should return the number of insns which can
+still be issued in the current cycle.  The default is
+@samp{@w{@var{more} - 1}} for insns other than @code{CLOBBER} and
+@code{USE}, which normally are not counted against the issue rate.
+You should define this hook if some insns take more machine resources
+than others, so that fewer insns can follow them in the same cycle.
+@var{file} is either a null pointer, or a stdio stream to write any
+debug output to.  @var{verbose} is the verbose level provided by
+@option{-fsched-verbose-@var{n}}.  @var{insn} is the instruction that
+was scheduled.
+@end deftypefn
+
+@hook TARGET_SCHED_ADJUST_COST
+This function corrects the value of @var{cost} based on the
+relationship between @var{insn} and @var{dep_insn} through the
+dependence @var{link}.  It should return the new value.  The default
+is to make no adjustment to @var{cost}.  This can be used for example
+to specify to the scheduler using the traditional pipeline description
+that an output- or anti-dependence does not incur the same cost as a
+data-dependence.  If the scheduler using the automaton based pipeline
+description, the cost of anti-dependence is zero and the cost of
+output-dependence is maximum of one and the difference of latency
+times of the first and the second insns.  If these values are not
+acceptable, you could use the hook to modify them too.  See also
+@pxref{Processor pipeline description}.
+@end deftypefn
+
+@hook TARGET_SCHED_ADJUST_PRIORITY
+This hook adjusts the integer scheduling priority @var{priority} of
+@var{insn}.  It should return the new priority.  Increase the priority to
+execute @var{insn} earlier, reduce the priority to execute @var{insn}
+later.  Do not define this hook if you do not need to adjust the
+scheduling priorities of insns.
+@end deftypefn
+
+@hook TARGET_SCHED_REORDER
+This hook is executed by the scheduler after it has scheduled the ready
+list, to allow the machine description to reorder it (for example to
+combine two small instructions together on @samp{VLIW} machines).
+@var{file} is either a null pointer, or a stdio stream to write any
+debug output to.  @var{verbose} is the verbose level provided by
+@option{-fsched-verbose-@var{n}}.  @var{ready} is a pointer to the ready
+list of instructions that are ready to be scheduled.  @var{n_readyp} is
+a pointer to the number of elements in the ready list.  The scheduler
+reads the ready list in reverse order, starting with
+@var{ready}[@var{*n_readyp} @minus{} 1] and going to @var{ready}[0].  @var{clock}
+is the timer tick of the scheduler.  You may modify the ready list and
+the number of ready insns.  The return value is the number of insns that
+can issue this cycle; normally this is just @code{issue_rate}.  See also
+@samp{TARGET_SCHED_REORDER2}.
+@end deftypefn
+
+@hook TARGET_SCHED_REORDER2
+Like @samp{TARGET_SCHED_REORDER}, but called at a different time.  That
+function is called whenever the scheduler starts a new cycle.  This one
+is called once per iteration over a cycle, immediately after
+@samp{TARGET_SCHED_VARIABLE_ISSUE}; it can reorder the ready list and
+return the number of insns to be scheduled in the same cycle.  Defining
+this hook can be useful if there are frequent situations where
+scheduling one insn causes other insns to become ready in the same
+cycle.  These other insns can then be taken into account properly.
+@end deftypefn
+
+@hook TARGET_SCHED_DEPENDENCIES_EVALUATION_HOOK
+This hook is called after evaluation forward dependencies of insns in
+chain given by two parameter values (@var{head} and @var{tail}
+correspondingly) but before insns scheduling of the insn chain.  For
+example, it can be used for better insn classification if it requires
+analysis of dependencies.  This hook can use backward and forward
+dependencies of the insn scheduler because they are already
+calculated.
+@end deftypefn
+
+@hook TARGET_SCHED_INIT
+This hook is executed by the scheduler at the beginning of each block of
+instructions that are to be scheduled.  @var{file} is either a null
+pointer, or a stdio stream to write any debug output to.  @var{verbose}
+is the verbose level provided by @option{-fsched-verbose-@var{n}}.
+@var{max_ready} is the maximum number of insns in the current scheduling
+region that can be live at the same time.  This can be used to allocate
+scratch space if it is needed, e.g.@: by @samp{TARGET_SCHED_REORDER}.
+@end deftypefn
+
+@hook TARGET_SCHED_FINISH
+This hook is executed by the scheduler at the end of each block of
+instructions that are to be scheduled.  It can be used to perform
+cleanup of any actions done by the other scheduling hooks.  @var{file}
+is either a null pointer, or a stdio stream to write any debug output
+to.  @var{verbose} is the verbose level provided by
+@option{-fsched-verbose-@var{n}}.
+@end deftypefn
+
+@hook TARGET_SCHED_INIT_GLOBAL
+This hook is executed by the scheduler after function level initializations.
+@var{file} is either a null pointer, or a stdio stream to write any debug output to.
+@var{verbose} is the verbose level provided by @option{-fsched-verbose-@var{n}}.
+@var{old_max_uid} is the maximum insn uid when scheduling begins.
+@end deftypefn
+
+@hook TARGET_SCHED_FINISH_GLOBAL
+This is the cleanup hook corresponding to @code{TARGET_SCHED_INIT_GLOBAL}.
+@var{file} is either a null pointer, or a stdio stream to write any debug output to.
+@var{verbose} is the verbose level provided by @option{-fsched-verbose-@var{n}}.
+@end deftypefn
+
+@hook TARGET_SCHED_DFA_PRE_CYCLE_INSN
+The hook returns an RTL insn.  The automaton state used in the
+pipeline hazard recognizer is changed as if the insn were scheduled
+when the new simulated processor cycle starts.  Usage of the hook may
+simplify the automaton pipeline description for some @acronym{VLIW}
+processors.  If the hook is defined, it is used only for the automaton
+based pipeline description.  The default is not to change the state
+when the new simulated processor cycle starts.
+@end deftypefn
+
+@hook TARGET_SCHED_INIT_DFA_PRE_CYCLE_INSN
+The hook can be used to initialize data used by the previous hook.
+@end deftypefn
+
+@hook TARGET_SCHED_DFA_POST_CYCLE_INSN
+The hook is analogous to @samp{TARGET_SCHED_DFA_PRE_CYCLE_INSN} but used
+to changed the state as if the insn were scheduled when the new
+simulated processor cycle finishes.
+@end deftypefn
+
+@hook TARGET_SCHED_INIT_DFA_POST_CYCLE_INSN
+The hook is analogous to @samp{TARGET_SCHED_INIT_DFA_PRE_CYCLE_INSN} but
+used to initialize data used by the previous hook.
+@end deftypefn
+
+@hook TARGET_SCHED_DFA_PRE_ADVANCE_CYCLE
+The hook to notify target that the current simulated cycle is about to finish.
+The hook is analogous to @samp{TARGET_SCHED_DFA_PRE_CYCLE_INSN} but used
+to change the state in more complicated situations - e.g., when advancing
+state on a single insn is not enough.
+@end deftypefn
+
+@hook TARGET_SCHED_DFA_POST_ADVANCE_CYCLE
+The hook to notify target that new simulated cycle has just started.
+The hook is analogous to @samp{TARGET_SCHED_DFA_POST_CYCLE_INSN} but used
+to change the state in more complicated situations - e.g., when advancing
+state on a single insn is not enough.
+@end deftypefn
+
+@hook TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
+This hook controls better choosing an insn from the ready insn queue
+for the @acronym{DFA}-based insn scheduler.  Usually the scheduler
+chooses the first insn from the queue.  If the hook returns a positive
+value, an additional scheduler code tries all permutations of
+@samp{TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD ()}
+subsequent ready insns to choose an insn whose issue will result in
+maximal number of issued insns on the same cycle.  For the
+@acronym{VLIW} processor, the code could actually solve the problem of
+packing simple insns into the @acronym{VLIW} insn.  Of course, if the
+rules of @acronym{VLIW} packing are described in the automaton.
+
+This code also could be used for superscalar @acronym{RISC}
+processors.  Let us consider a superscalar @acronym{RISC} processor
+with 3 pipelines.  Some insns can be executed in pipelines @var{A} or
+@var{B}, some insns can be executed only in pipelines @var{B} or
+@var{C}, and one insn can be executed in pipeline @var{B}.  The
+processor may issue the 1st insn into @var{A} and the 2nd one into
+@var{B}.  In this case, the 3rd insn will wait for freeing @var{B}
+until the next cycle.  If the scheduler issues the 3rd insn the first,
+the processor could issue all 3 insns per cycle.
+
+Actually this code demonstrates advantages of the automaton based
+pipeline hazard recognizer.  We try quickly and easy many insn
+schedules to choose the best one.
+
+The default is no multipass scheduling.
+@end deftypefn
+
+@hook TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD
+
+This hook controls what insns from the ready insn queue will be
+considered for the multipass insn scheduling.  If the hook returns
+zero for @var{insn}, the insn will be not chosen to
+be issued.
+
+The default is that any ready insns can be chosen to be issued.
+@end deftypefn
+
+@hook TARGET_SCHED_FIRST_CYCLE_MULTIPASS_BEGIN
+This hook prepares the target backend for a new round of multipass
+scheduling.
+@end deftypefn
+
+@hook TARGET_SCHED_FIRST_CYCLE_MULTIPASS_ISSUE
+This hook is called when multipass scheduling evaluates instruction INSN.
+@end deftypefn
+
+@hook TARGET_SCHED_FIRST_CYCLE_MULTIPASS_BACKTRACK
+This is called when multipass scheduling backtracks from evaluation of
+an instruction.
+@end deftypefn
+
+@hook TARGET_SCHED_FIRST_CYCLE_MULTIPASS_END
+This hook notifies the target about the result of the concluded current
+round of multipass scheduling.
+@end deftypefn
+
+@hook TARGET_SCHED_FIRST_CYCLE_MULTIPASS_INIT
+This hook initializes target-specific data used in multipass scheduling.
+@end deftypefn
+
+@hook TARGET_SCHED_FIRST_CYCLE_MULTIPASS_FINI
+This hook finalizes target-specific data used in multipass scheduling.
+@end deftypefn
+
+@hook TARGET_SCHED_DFA_NEW_CYCLE
+This hook is called by the insn scheduler before issuing @var{insn}
+on cycle @var{clock}.  If the hook returns nonzero,
+@var{insn} is not issued on this processor cycle.  Instead,
+the processor cycle is advanced.  If *@var{sort_p}
+is zero, the insn ready queue is not sorted on the new cycle
+start as usually.  @var{dump} and @var{verbose} specify the file and
+verbosity level to use for debugging output.
+@var{last_clock} and @var{clock} are, respectively, the
+processor cycle on which the previous insn has been issued,
+and the current processor cycle.
+@end deftypefn
+
+@hook TARGET_SCHED_IS_COSTLY_DEPENDENCE
+This hook is used to define which dependences are considered costly by
+the target, so costly that it is not advisable to schedule the insns that
+are involved in the dependence too close to one another.  The parameters
+to this hook are as follows:  The first parameter @var{_dep} is the dependence
+being evaluated.  The second parameter @var{cost} is the cost of the
+dependence as estimated by the scheduler, and the third
+parameter @var{distance} is the distance in cycles between the two insns.
+The hook returns @code{true} if considering the distance between the two
+insns the dependence between them is considered costly by the target,
+and @code{false} otherwise.
+
+Defining this hook can be useful in multiple-issue out-of-order machines,
+where (a) it's practically hopeless to predict the actual data/resource
+delays, however: (b) there's a better chance to predict the actual grouping
+that will be formed, and (c) correctly emulating the grouping can be very
+important.  In such targets one may want to allow issuing dependent insns
+closer to one another---i.e., closer than the dependence distance;  however,
+not in cases of ``costly dependences'', which this hooks allows to define.
+@end deftypefn
+
+@hook TARGET_SCHED_H_I_D_EXTENDED
+This hook is called by the insn scheduler after emitting a new instruction to
+the instruction stream.  The hook notifies a target backend to extend its
+per instruction data structures.
+@end deftypefn
+
+@hook TARGET_SCHED_ALLOC_SCHED_CONTEXT
+Return a pointer to a store large enough to hold target scheduling context.
+@end deftypefn
+
+@hook TARGET_SCHED_INIT_SCHED_CONTEXT
+Initialize store pointed to by @var{tc} to hold target scheduling context.
+It @var{clean_p} is true then initialize @var{tc} as if scheduler is at the
+beginning of the block.  Otherwise, copy the current context into @var{tc}.
+@end deftypefn
+
+@hook TARGET_SCHED_SET_SCHED_CONTEXT
+Copy target scheduling context pointed to by @var{tc} to the current context.
+@end deftypefn
+
+@hook TARGET_SCHED_CLEAR_SCHED_CONTEXT
+Deallocate internal data in target scheduling context pointed to by @var{tc}.
+@end deftypefn
+
+@hook TARGET_SCHED_FREE_SCHED_CONTEXT
+Deallocate a store for target scheduling context pointed to by @var{tc}.
+@end deftypefn
+
+@hook TARGET_SCHED_SPECULATE_INSN
+This hook is called by the insn scheduler when @var{insn} has only
+speculative dependencies and therefore can be scheduled speculatively.
+The hook is used to check if the pattern of @var{insn} has a speculative
+version and, in case of successful check, to generate that speculative
+pattern.  The hook should return 1, if the instruction has a speculative form,
+or @minus{}1, if it doesn't.  @var{request} describes the type of requested
+speculation.  If the return value equals 1 then @var{new_pat} is assigned
+the generated speculative pattern.
+@end deftypefn
+
+@hook TARGET_SCHED_NEEDS_BLOCK_P
+This hook is called by the insn scheduler during generation of recovery code
+for @var{insn}.  It should return @code{true}, if the corresponding check
+instruction should branch to recovery code, or @code{false} otherwise.
+@end deftypefn
+
+@hook TARGET_SCHED_GEN_SPEC_CHECK
+This hook is called by the insn scheduler to generate a pattern for recovery
+check instruction.  If @var{mutate_p} is zero, then @var{insn} is a
+speculative instruction for which the check should be generated.
+@var{label} is either a label of a basic block, where recovery code should
+be emitted, or a null pointer, when requested check doesn't branch to
+recovery code (a simple check).  If @var{mutate_p} is nonzero, then
+a pattern for a branchy check corresponding to a simple check denoted by
+@var{insn} should be generated.  In this case @var{label} can't be null.
+@end deftypefn
+
+@hook TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD_SPEC
+This hook is used as a workaround for
+@samp{TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD} not being
+called on the first instruction of the ready list.  The hook is used to
+discard speculative instructions that stand first in the ready list from
+being scheduled on the current cycle.  If the hook returns @code{false},
+@var{insn} will not be chosen to be issued.
+For non-speculative instructions,
+the hook should always return @code{true}.  For example, in the ia64 backend
+the hook is used to cancel data speculative insns when the ALAT table
+is nearly full.
+@end deftypefn
+
+@hook TARGET_SCHED_SET_SCHED_FLAGS
+This hook is used by the insn scheduler to find out what features should be
+enabled/used.
+The structure *@var{spec_info} should be filled in by the target.
+The structure describes speculation types that can be used in the scheduler.
+@end deftypefn
+
+@hook TARGET_SCHED_SMS_RES_MII
+This hook is called by the swing modulo scheduler to calculate a
+resource-based lower bound which is based on the resources available in
+the machine and the resources required by each instruction.  The target
+backend can use @var{g} to calculate such bound.  A very simple lower
+bound will be used in case this hook is not implemented: the total number
+of instructions divided by the issue rate.
+@end deftypefn
+
+@hook TARGET_SCHED_DISPATCH
+This hook is called by Haifa Scheduler.  It returns true if dispatch scheduling
+is supported in hardware and the condition specified in the parameter is true.
+@end deftypefn
+
+@hook TARGET_SCHED_DISPATCH_DO
+This hook is called by Haifa Scheduler.  It performs the operation specified
+in its second parameter.
+@end deftypefn
+
+@node Sections
+@section Dividing the Output into Sections (Texts, Data, @dots{})
+@c the above section title is WAY too long.  maybe cut the part between
+@c the (...)?  --mew 10feb93
+
+An object file is divided into sections containing different types of
+data.  In the most common case, there are three sections: the @dfn{text
+section}, which holds instructions and read-only data; the @dfn{data
+section}, which holds initialized writable data; and the @dfn{bss
+section}, which holds uninitialized data.  Some systems have other kinds
+of sections.
+
+@file{varasm.c} provides several well-known sections, such as
+@code{text_section}, @code{data_section} and @code{bss_section}.
+The normal way of controlling a @code{@var{foo}_section} variable
+is to define the associated @code{@var{FOO}_SECTION_ASM_OP} macro,
+as described below.  The macros are only read once, when @file{varasm.c}
+initializes itself, so their values must be run-time constants.
+They may however depend on command-line flags.
+
+@emph{Note:} Some run-time files, such @file{crtstuff.c}, also make
+use of the @code{@var{FOO}_SECTION_ASM_OP} macros, and expect them
+to be string literals.
+
+Some assemblers require a different string to be written every time a
+section is selected.  If your assembler falls into this category, you
+should define the @code{TARGET_ASM_INIT_SECTIONS} hook and use
+@code{get_unnamed_section} to set up the sections.
+
+You must always create a @code{text_section}, either by defining
+@code{TEXT_SECTION_ASM_OP} or by initializing @code{text_section}
+in @code{TARGET_ASM_INIT_SECTIONS}.  The same is true of
+@code{data_section} and @code{DATA_SECTION_ASM_OP}.  If you do not
+create a distinct @code{readonly_data_section}, the default is to
+reuse @code{text_section}.
+
+All the other @file{varasm.c} sections are optional, and are null
+if the target does not provide them.
+
+@defmac TEXT_SECTION_ASM_OP
+A C expression whose value is a string, including spacing, containing the
+assembler operation that should precede instructions and read-only data.
+Normally @code{"\t.text"} is right.
+@end defmac
+
+@defmac HOT_TEXT_SECTION_NAME
+If defined, a C string constant for the name of the section containing most
+frequently executed functions of the program.  If not defined, GCC will provide
+a default definition if the target supports named sections.
+@end defmac
+
+@defmac UNLIKELY_EXECUTED_TEXT_SECTION_NAME
+If defined, a C string constant for the name of the section containing unlikely
+executed functions in the program.
+@end defmac
+
+@defmac DATA_SECTION_ASM_OP
+A C expression whose value is a string, including spacing, containing the
+assembler operation to identify the following data as writable initialized
+data.  Normally @code{"\t.data"} is right.
+@end defmac
+
+@defmac SDATA_SECTION_ASM_OP
+If defined, a C expression whose value is a string, including spacing,
+containing the assembler operation to identify the following data as
+initialized, writable small data.
+@end defmac
+
+@defmac READONLY_DATA_SECTION_ASM_OP
+A C expression whose value is a string, including spacing, containing the
+assembler operation to identify the following data as read-only initialized
+data.
+@end defmac
+
+@defmac BSS_SECTION_ASM_OP
+If defined, a C expression whose value is a string, including spacing,
+containing the assembler operation to identify the following data as
+uninitialized global data.  If not defined, and neither
+@code{ASM_OUTPUT_BSS} nor @code{ASM_OUTPUT_ALIGNED_BSS} are defined,
+uninitialized global data will be output in the data section if
+@option{-fno-common} is passed, otherwise @code{ASM_OUTPUT_COMMON} will be
+used.
+@end defmac
+
+@defmac SBSS_SECTION_ASM_OP
+If defined, a C expression whose value is a string, including spacing,
+containing the assembler operation to identify the following data as
+uninitialized, writable small data.
+@end defmac
+
+@defmac TLS_COMMON_ASM_OP
+If defined, a C expression whose value is a string containing the
+assembler operation to identify the following data as thread-local
+common data.  The default is @code{".tls_common"}.
+@end defmac
+
+@defmac TLS_SECTION_ASM_FLAG
+If defined, a C expression whose value is a character constant
+containing the flag used to mark a section as a TLS section.  The
+default is @code{'T'}.
+@end defmac
+
+@defmac INIT_SECTION_ASM_OP
+If defined, a C expression whose value is a string, including spacing,
+containing the assembler operation to identify the following data as
+initialization code.  If not defined, GCC will assume such a section does
+not exist.  This section has no corresponding @code{init_section}
+variable; it is used entirely in runtime code.
+@end defmac
+
+@defmac FINI_SECTION_ASM_OP
+If defined, a C expression whose value is a string, including spacing,
+containing the assembler operation to identify the following data as
+finalization code.  If not defined, GCC will assume such a section does
+not exist.  This section has no corresponding @code{fini_section}
+variable; it is used entirely in runtime code.
+@end defmac
+
+@defmac INIT_ARRAY_SECTION_ASM_OP
+If defined, a C expression whose value is a string, including spacing,
+containing the assembler operation to identify the following data as
+part of the @code{.init_array} (or equivalent) section.  If not
+defined, GCC will assume such a section does not exist.  Do not define
+both this macro and @code{INIT_SECTION_ASM_OP}.
+@end defmac
+
+@defmac FINI_ARRAY_SECTION_ASM_OP
+If defined, a C expression whose value is a string, including spacing,
+containing the assembler operation to identify the following data as
+part of the @code{.fini_array} (or equivalent) section.  If not
+defined, GCC will assume such a section does not exist.  Do not define
+both this macro and @code{FINI_SECTION_ASM_OP}.
+@end defmac
+
+@defmac CRT_CALL_STATIC_FUNCTION (@var{section_op}, @var{function})
+If defined, an ASM statement that switches to a different section
+via @var{section_op}, calls @var{function}, and switches back to
+the text section.  This is used in @file{crtstuff.c} if
+@code{INIT_SECTION_ASM_OP} or @code{FINI_SECTION_ASM_OP} to calls
+to initialization and finalization functions from the init and fini
+sections.  By default, this macro uses a simple function call.  Some
+ports need hand-crafted assembly code to avoid dependencies on
+registers initialized in the function prologue or to ensure that
+constant pools don't end up too far way in the text section.
+@end defmac
+
+@defmac TARGET_LIBGCC_SDATA_SECTION
+If defined, a string which names the section into which small
+variables defined in crtstuff and libgcc should go.  This is useful
+when the target has options for optimizing access to small data, and
+you want the crtstuff and libgcc routines to be conservative in what
+they expect of your application yet liberal in what your application
+expects.  For example, for targets with a @code{.sdata} section (like
+MIPS), you could compile crtstuff with @code{-G 0} so that it doesn't
+require small data support from your application, but use this macro
+to put small data into @code{.sdata} so that your application can
+access these variables whether it uses small data or not.
+@end defmac
+
+@defmac FORCE_CODE_SECTION_ALIGN
+If defined, an ASM statement that aligns a code section to some
+arbitrary boundary.  This is used to force all fragments of the
+@code{.init} and @code{.fini} sections to have to same alignment
+and thus prevent the linker from having to add any padding.
+@end defmac
+
+@defmac JUMP_TABLES_IN_TEXT_SECTION
+Define this macro to be an expression with a nonzero value if jump
+tables (for @code{tablejump} insns) should be output in the text
+section, along with the assembler instructions.  Otherwise, the
+readonly data section is used.
+
+This macro is irrelevant if there is no separate readonly data section.
+@end defmac
+
+@hook TARGET_ASM_INIT_SECTIONS
+Define this hook if you need to do something special to set up the
+@file{varasm.c} sections, or if your target has some special sections
+of its own that you need to create.
+
+GCC calls this hook after processing the command line, but before writing
+any assembly code, and before calling any of the section-returning hooks
+described below.
+@end deftypefn
+
+@hook TARGET_ASM_RELOC_RW_MASK
+Return a mask describing how relocations should be treated when
+selecting sections.  Bit 1 should be set if global relocations
+should be placed in a read-write section; bit 0 should be set if
+local relocations should be placed in a read-write section.
+
+The default version of this function returns 3 when @option{-fpic}
+is in effect, and 0 otherwise.  The hook is typically redefined
+when the target cannot support (some kinds of) dynamic relocations
+in read-only sections even in executables.
+@end deftypefn
+
+@hook TARGET_ASM_SELECT_SECTION
+Return the section into which @var{exp} should be placed.  You can
+assume that @var{exp} is either a @code{VAR_DECL} node or a constant of
+some sort.  @var{reloc} indicates whether the initial value of @var{exp}
+requires link-time relocations.  Bit 0 is set when variable contains
+local relocations only, while bit 1 is set for global relocations.
+@var{align} is the constant alignment in bits.
+
+The default version of this function takes care of putting read-only
+variables in @code{readonly_data_section}.
+
+See also @var{USE_SELECT_SECTION_FOR_FUNCTIONS}.
+@end deftypefn
+
+@defmac USE_SELECT_SECTION_FOR_FUNCTIONS
+Define this macro if you wish TARGET_ASM_SELECT_SECTION to be called
+for @code{FUNCTION_DECL}s as well as for variables and constants.
+
+In the case of a @code{FUNCTION_DECL}, @var{reloc} will be zero if the
+function has been determined to be likely to be called, and nonzero if
+it is unlikely to be called.
+@end defmac
+
+@hook TARGET_ASM_UNIQUE_SECTION
+Build up a unique section name, expressed as a @code{STRING_CST} node,
+and assign it to @samp{DECL_SECTION_NAME (@var{decl})}.
+As with @code{TARGET_ASM_SELECT_SECTION}, @var{reloc} indicates whether
+the initial value of @var{exp} requires link-time relocations.
+
+The default version of this function appends the symbol name to the
+ELF section name that would normally be used for the symbol.  For
+example, the function @code{foo} would be placed in @code{.text.foo}.
+Whatever the actual target object format, this is often good enough.
+@end deftypefn
+
+@hook TARGET_ASM_FUNCTION_RODATA_SECTION
+Return the readonly data section associated with
+@samp{DECL_SECTION_NAME (@var{decl})}.
+The default version of this function selects @code{.gnu.linkonce.r.name} if
+the function's section is @code{.gnu.linkonce.t.name}, @code{.rodata.name}
+if function is in @code{.text.name}, and the normal readonly-data section
+otherwise.
+@end deftypefn
+
+@hook TARGET_ASM_SELECT_RTX_SECTION
+Return the section into which a constant @var{x}, of mode @var{mode},
+should be placed.  You can assume that @var{x} is some kind of
+constant in RTL@.  The argument @var{mode} is redundant except in the
+case of a @code{const_int} rtx.  @var{align} is the constant alignment
+in bits.
+
+The default version of this function takes care of putting symbolic
+constants in @code{flag_pic} mode in @code{data_section} and everything
+else in @code{readonly_data_section}.
+@end deftypefn
+
+@hook TARGET_MANGLE_DECL_ASSEMBLER_NAME
+Define this hook if you need to postprocess the assembler name generated
+by target-independent code.  The @var{id} provided to this hook will be
+the computed name (e.g., the macro @code{DECL_NAME} of the @var{decl} in C,
+or the mangled name of the @var{decl} in C++).  The return value of the
+hook is an @code{IDENTIFIER_NODE} for the appropriate mangled name on
+your target system.  The default implementation of this hook just
+returns the @var{id} provided.
+@end deftypefn
+
+@hook TARGET_ENCODE_SECTION_INFO
+Define this hook if references to a symbol or a constant must be
+treated differently depending on something about the variable or
+function named by the symbol (such as what section it is in).
+
+The hook is executed immediately after rtl has been created for
+@var{decl}, which may be a variable or function declaration or
+an entry in the constant pool.  In either case, @var{rtl} is the
+rtl in question.  Do @emph{not} use @code{DECL_RTL (@var{decl})}
+in this hook; that field may not have been initialized yet.
+
+In the case of a constant, it is safe to assume that the rtl is
+a @code{mem} whose address is a @code{symbol_ref}.  Most decls
+will also have this form, but that is not guaranteed.  Global
+register variables, for instance, will have a @code{reg} for their
+rtl.  (Normally the right thing to do with such unusual rtl is
+leave it alone.)
+
+The @var{new_decl_p} argument will be true if this is the first time
+that @code{TARGET_ENCODE_SECTION_INFO} has been invoked on this decl.  It will
+be false for subsequent invocations, which will happen for duplicate
+declarations.  Whether or not anything must be done for the duplicate
+declaration depends on whether the hook examines @code{DECL_ATTRIBUTES}.
+@var{new_decl_p} is always true when the hook is called for a constant.
+
+@cindex @code{SYMBOL_REF_FLAG}, in @code{TARGET_ENCODE_SECTION_INFO}
+The usual thing for this hook to do is to record flags in the
+@code{symbol_ref}, using @code{SYMBOL_REF_FLAG} or @code{SYMBOL_REF_FLAGS}.
+Historically, the name string was modified if it was necessary to
+encode more than one bit of information, but this practice is now
+discouraged; use @code{SYMBOL_REF_FLAGS}.
+
+The default definition of this hook, @code{default_encode_section_info}
+in @file{varasm.c}, sets a number of commonly-useful bits in
+@code{SYMBOL_REF_FLAGS}.  Check whether the default does what you need
+before overriding it.
+@end deftypefn
+
+@hook TARGET_STRIP_NAME_ENCODING
+Decode @var{name} and return the real name part, sans
+the characters that @code{TARGET_ENCODE_SECTION_INFO}
+may have added.
+@end deftypefn
+
+@hook TARGET_IN_SMALL_DATA_P
+Returns true if @var{exp} should be placed into a ``small data'' section.
+The default version of this hook always returns false.
+@end deftypefn
+
+@hook TARGET_HAVE_SRODATA_SECTION
+Contains the value true if the target places read-only
+``small data'' into a separate section.  The default value is false.
+@end deftypevr
+
+@hook TARGET_PROFILE_BEFORE_PROLOGUE
+
+@hook TARGET_BINDS_LOCAL_P
+Returns true if @var{exp} names an object for which name resolution
+rules must resolve to the current ``module'' (dynamic shared library
+or executable image).
+
+The default version of this hook implements the name resolution rules
+for ELF, which has a looser model of global name binding than other
+currently supported object file formats.
+@end deftypefn
+
+@hook TARGET_HAVE_TLS
+Contains the value true if the target supports thread-local storage.
+The default value is false.
+@end deftypevr
+
+
+@node PIC
+@section Position Independent Code
+@cindex position independent code
+@cindex PIC
+
+This section describes macros that help implement generation of position
+independent code.  Simply defining these macros is not enough to
+generate valid PIC; you must also add support to the hook
+@code{TARGET_LEGITIMATE_ADDRESS_P} and to the macro
+@code{PRINT_OPERAND_ADDRESS}, as well as @code{LEGITIMIZE_ADDRESS}.  You
+must modify the definition of @samp{movsi} to do something appropriate
+when the source operand contains a symbolic address.  You may also
+need to alter the handling of switch statements so that they use
+relative addresses.
+@c i rearranged the order of the macros above to try to force one of 
+@c them to the next line, to eliminate an overfull hbox. --mew 10feb93
+
+@defmac PIC_OFFSET_TABLE_REGNUM
+The register number of the register used to address a table of static
+data addresses in memory.  In some cases this register is defined by a
+processor's ``application binary interface'' (ABI)@.  When this macro
+is defined, RTL is generated for this register once, as with the stack
+pointer and frame pointer registers.  If this macro is not defined, it
+is up to the machine-dependent files to allocate such a register (if
+necessary).  Note that this register must be fixed when in use (e.g.@:
+when @code{flag_pic} is true).
+@end defmac
+
+@defmac PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
+A C expression that is nonzero if the register defined by
+@code{PIC_OFFSET_TABLE_REGNUM} is clobbered by calls.  If not defined,
+the default is zero.  Do not define
+this macro if @code{PIC_OFFSET_TABLE_REGNUM} is not defined.
+@end defmac
+
+@defmac LEGITIMATE_PIC_OPERAND_P (@var{x})
+A C expression that is nonzero if @var{x} is a legitimate immediate
+operand on the target machine when generating position independent code.
+You can assume that @var{x} satisfies @code{CONSTANT_P}, so you need not
+check this.  You can also assume @var{flag_pic} is true, so you need not
+check it either.  You need not define this macro if all constants
+(including @code{SYMBOL_REF}) can be immediate operands when generating
+position independent code.
+@end defmac
+
+@node Assembler Format
+@section Defining the Output Assembler Language
+
+This section describes macros whose principal purpose is to describe how
+to write instructions in assembler language---rather than what the
+instructions do.
+
+@menu
+* File Framework::       Structural information for the assembler file.
+* Data Output::          Output of constants (numbers, strings, addresses).
+* Uninitialized Data::   Output of uninitialized variables.
+* Label Output::         Output and generation of labels.
+* Initialization::       General principles of initialization
+                         and termination routines.
+* Macros for Initialization::
+                         Specific macros that control the handling of
+                         initialization and termination routines.
+* Instruction Output::   Output of actual instructions.
+* Dispatch Tables::      Output of jump tables.
+* Exception Region Output:: Output of exception region code.
+* Alignment Output::     Pseudo ops for alignment and skipping data.
+@end menu
+
+@node File Framework
+@subsection The Overall Framework of an Assembler File
+@cindex assembler format
+@cindex output of assembler code
+
+@c prevent bad page break with this line
+This describes the overall framework of an assembly file.
+
+@findex default_file_start
+@hook TARGET_ASM_FILE_START
+Output to @code{asm_out_file} any text which the assembler expects to
+find at the beginning of a file.  The default behavior is controlled
+by two flags, documented below.  Unless your target's assembler is
+quite unusual, if you override the default, you should call
+@code{default_file_start} at some point in your target hook.  This
+lets other target files rely on these variables.
+@end deftypefn
+
+@hook TARGET_ASM_FILE_START_APP_OFF
+If this flag is true, the text of the macro @code{ASM_APP_OFF} will be
+printed as the very first line in the assembly file, unless
+@option{-fverbose-asm} is in effect.  (If that macro has been defined
+to the empty string, this variable has no effect.)  With the normal
+definition of @code{ASM_APP_OFF}, the effect is to notify the GNU
+assembler that it need not bother stripping comments or extra
+whitespace from its input.  This allows it to work a bit faster.
+
+The default is false.  You should not set it to true unless you have
+verified that your port does not generate any extra whitespace or
+comments that will cause GAS to issue errors in NO_APP mode.
+@end deftypevr
+
+@hook TARGET_ASM_FILE_START_FILE_DIRECTIVE
+If this flag is true, @code{output_file_directive} will be called
+for the primary source file, immediately after printing
+@code{ASM_APP_OFF} (if that is enabled).  Most ELF assemblers expect
+this to be done.  The default is false.
+@end deftypevr
+
+@hook TARGET_ASM_FILE_END
+Output to @code{asm_out_file} any text which the assembler expects
+to find at the end of a file.  The default is to output nothing.
+@end deftypefn
+
+@deftypefun void file_end_indicate_exec_stack ()
+Some systems use a common convention, the @samp{.note.GNU-stack}
+special section, to indicate whether or not an object file relies on
+the stack being executable.  If your system uses this convention, you
+should define @code{TARGET_ASM_FILE_END} to this function.  If you
+need to do other things in that hook, have your hook function call
+this function.
+@end deftypefun
+
+@hook TARGET_ASM_LTO_START
+Output to @code{asm_out_file} any text which the assembler expects
+to find at the start of an LTO section.  The default is to output
+nothing.
+@end deftypefn
+
+@hook TARGET_ASM_LTO_END
+Output to @code{asm_out_file} any text which the assembler expects
+to find at the end of an LTO section.  The default is to output
+nothing.
+@end deftypefn
+
+@hook TARGET_ASM_CODE_END
+Output to @code{asm_out_file} any text which is needed before emitting
+unwind info and debug info at the end of a file.  Some targets emit
+here PIC setup thunks that cannot be emitted at the end of file,
+because they couldn't have unwind info then.  The default is to output
+nothing.
+@end deftypefn
+
+@defmac ASM_COMMENT_START
+A C string constant describing how to begin a comment in the target
+assembler language.  The compiler assumes that the comment will end at
+the end of the line.
+@end defmac
+
+@defmac ASM_APP_ON
+A C string constant for text to be output before each @code{asm}
+statement or group of consecutive ones.  Normally this is
+@code{"#APP"}, which is a comment that has no effect on most
+assemblers but tells the GNU assembler that it must check the lines
+that follow for all valid assembler constructs.
+@end defmac
+
+@defmac ASM_APP_OFF
+A C string constant for text to be output after each @code{asm}
+statement or group of consecutive ones.  Normally this is
+@code{"#NO_APP"}, which tells the GNU assembler to resume making the
+time-saving assumptions that are valid for ordinary compiler output.
+@end defmac
+
+@defmac ASM_OUTPUT_SOURCE_FILENAME (@var{stream}, @var{name})
+A C statement to output COFF information or DWARF debugging information
+which indicates that filename @var{name} is the current source file to
+the stdio stream @var{stream}.
+
+This macro need not be defined if the standard form of output
+for the file format in use is appropriate.
+@end defmac
+
+@hook TARGET_ASM_OUTPUT_SOURCE_FILENAME
+
+@defmac OUTPUT_QUOTED_STRING (@var{stream}, @var{string})
+A C statement to output the string @var{string} to the stdio stream
+@var{stream}.  If you do not call the function @code{output_quoted_string}
+in your config files, GCC will only call it to output filenames to
+the assembler source.  So you can use it to canonicalize the format
+of the filename using this macro.
+@end defmac
+
+@defmac ASM_OUTPUT_IDENT (@var{stream}, @var{string})
+A C statement to output something to the assembler file to handle a
+@samp{#ident} directive containing the text @var{string}.  If this
+macro is not defined, nothing is output for a @samp{#ident} directive.
+@end defmac
+
+@hook TARGET_ASM_NAMED_SECTION
+Output assembly directives to switch to section @var{name}.  The section
+should have attributes as specified by @var{flags}, which is a bit mask
+of the @code{SECTION_*} flags defined in @file{output.h}.  If @var{decl}
+is non-NULL, it is the @code{VAR_DECL} or @code{FUNCTION_DECL} with which
+this section is associated.
+@end deftypefn
+
+@hook TARGET_ASM_FUNCTION_SECTION
+Return preferred text (sub)section for function @var{decl}.
+Main purpose of this function is to separate cold, normal and hot
+functions. @var{startup} is true when function is known to be used only 
+at startup (from static constructors or it is @code{main()}).
+@var{exit} is true when function is known to be used only at exit
+(from static destructors).
+Return NULL if function should go to default text section.
+@end deftypefn
+
+@hook TARGET_ASM_FUNCTION_SWITCHED_TEXT_SECTIONS
+
+@hook TARGET_HAVE_NAMED_SECTIONS
+This flag is true if the target supports @code{TARGET_ASM_NAMED_SECTION}.
+It must not be modified by command-line option processing.
+@end deftypevr
+
+@anchor{TARGET_HAVE_SWITCHABLE_BSS_SECTIONS}
+@hook TARGET_HAVE_SWITCHABLE_BSS_SECTIONS
+This flag is true if we can create zeroed data by switching to a BSS
+section and then using @code{ASM_OUTPUT_SKIP} to allocate the space.
+This is true on most ELF targets.
+@end deftypevr
+
+@hook TARGET_SECTION_TYPE_FLAGS
+Choose a set of section attributes for use by @code{TARGET_ASM_NAMED_SECTION}
+based on a variable or function decl, a section name, and whether or not the
+declaration's initializer may contain runtime relocations.  @var{decl} may be
+null, in which case read-write data should be assumed.
+
+The default version of this function handles choosing code vs data,
+read-only vs read-write data, and @code{flag_pic}.  You should only
+need to override this if your target has special flags that might be
+set via @code{__attribute__}.
+@end deftypefn
+
+@hook TARGET_ASM_RECORD_GCC_SWITCHES
+Provides the target with the ability to record the gcc command line
+switches that have been passed to the compiler, and options that are
+enabled.  The @var{type} argument specifies what is being recorded.
+It can take the following values:
+
+@table @gcctabopt
+@item SWITCH_TYPE_PASSED
+@var{text} is a command line switch that has been set by the user.
+
+@item SWITCH_TYPE_ENABLED
+@var{text} is an option which has been enabled.  This might be as a
+direct result of a command line switch, or because it is enabled by
+default or because it has been enabled as a side effect of a different
+command line switch.  For example, the @option{-O2} switch enables
+various different individual optimization passes.
+
+@item SWITCH_TYPE_DESCRIPTIVE
+@var{text} is either NULL or some descriptive text which should be
+ignored.  If @var{text} is NULL then it is being used to warn the
+target hook that either recording is starting or ending.  The first
+time @var{type} is SWITCH_TYPE_DESCRIPTIVE and @var{text} is NULL, the
+warning is for start up and the second time the warning is for
+wind down.  This feature is to allow the target hook to make any
+necessary preparations before it starts to record switches and to
+perform any necessary tidying up after it has finished recording
+switches.
+
+@item SWITCH_TYPE_LINE_START
+This option can be ignored by this target hook.
+
+@item  SWITCH_TYPE_LINE_END
+This option can be ignored by this target hook.
+@end table
+
+The hook's return value must be zero.  Other return values may be
+supported in the future.
+
+By default this hook is set to NULL, but an example implementation is
+provided for ELF based targets.  Called @var{elf_record_gcc_switches},
+it records the switches as ASCII text inside a new, string mergeable
+section in the assembler output file.  The name of the new section is
+provided by the @code{TARGET_ASM_RECORD_GCC_SWITCHES_SECTION} target
+hook.
+@end deftypefn
+
+@hook TARGET_ASM_RECORD_GCC_SWITCHES_SECTION
+This is the name of the section that will be created by the example
+ELF implementation of the @code{TARGET_ASM_RECORD_GCC_SWITCHES} target
+hook.
+@end deftypevr
+
+@need 2000
+@node Data Output
+@subsection Output of Data
+
+
+@hook TARGET_ASM_BYTE_OP
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_HI_OP
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_SI_OP
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_DI_OP
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_TI_OP
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_HI_OP
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_SI_OP
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_DI_OP
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_TI_OP
+These hooks specify assembly directives for creating certain kinds
+of integer object.  The @code{TARGET_ASM_BYTE_OP} directive creates a
+byte-sized object, the @code{TARGET_ASM_ALIGNED_HI_OP} one creates an
+aligned two-byte object, and so on.  Any of the hooks may be
+@code{NULL}, indicating that no suitable directive is available.
+
+The compiler will print these strings at the start of a new line,
+followed immediately by the object's initial value.  In most cases,
+the string should contain a tab, a pseudo-op, and then another tab.
+@end deftypevr
+
+@hook TARGET_ASM_INTEGER
+The @code{assemble_integer} function uses this hook to output an
+integer object.  @var{x} is the object's value, @var{size} is its size
+in bytes and @var{aligned_p} indicates whether it is aligned.  The
+function should return @code{true} if it was able to output the
+object.  If it returns false, @code{assemble_integer} will try to
+split the object into smaller parts.
+
+The default implementation of this hook will use the
+@code{TARGET_ASM_BYTE_OP} family of strings, returning @code{false}
+when the relevant string is @code{NULL}.
+@end deftypefn
+
+@hook TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA
+A target hook to recognize @var{rtx} patterns that @code{output_addr_const}
+can't deal with, and output assembly code to @var{file} corresponding to
+the pattern @var{x}.  This may be used to allow machine-dependent
+@code{UNSPEC}s to appear within constants.
+
+If target hook fails to recognize a pattern, it must return @code{false},
+so that a standard error message is printed.  If it prints an error message
+itself, by calling, for example, @code{output_operand_lossage}, it may just
+return @code{true}.
+@end deftypefn
+
+@defmac OUTPUT_ADDR_CONST_EXTRA (@var{stream}, @var{x}, @var{fail})
+A C statement to recognize @var{rtx} patterns that
+@code{output_addr_const} can't deal with, and output assembly code to
+@var{stream} corresponding to the pattern @var{x}.  This may be used to
+allow machine-dependent @code{UNSPEC}s to appear within constants.
+
+If @code{OUTPUT_ADDR_CONST_EXTRA} fails to recognize a pattern, it must
+@code{goto fail}, so that a standard error message is printed.  If it
+prints an error message itself, by calling, for example,
+@code{output_operand_lossage}, it may just complete normally.
+@end defmac
+
+@defmac ASM_OUTPUT_ASCII (@var{stream}, @var{ptr}, @var{len})
+A C statement to output to the stdio stream @var{stream} an assembler
+instruction to assemble a string constant containing the @var{len}
+bytes at @var{ptr}.  @var{ptr} will be a C expression of type
+@code{char *} and @var{len} a C expression of type @code{int}.
+
+If the assembler has a @code{.ascii} pseudo-op as found in the
+Berkeley Unix assembler, do not define the macro
+@code{ASM_OUTPUT_ASCII}.
+@end defmac
+
+@defmac ASM_OUTPUT_FDESC (@var{stream}, @var{decl}, @var{n})
+A C statement to output word @var{n} of a function descriptor for
+@var{decl}.  This must be defined if @code{TARGET_VTABLE_USES_DESCRIPTORS}
+is defined, and is otherwise unused.
+@end defmac
+
+@defmac CONSTANT_POOL_BEFORE_FUNCTION
+You may define this macro as a C expression.  You should define the
+expression to have a nonzero value if GCC should output the constant
+pool for a function before the code for the function, or a zero value if
+GCC should output the constant pool after the function.  If you do
+not define this macro, the usual case, GCC will output the constant
+pool before the function.
+@end defmac
+
+@defmac ASM_OUTPUT_POOL_PROLOGUE (@var{file}, @var{funname}, @var{fundecl}, @var{size})
+A C statement to output assembler commands to define the start of the
+constant pool for a function.  @var{funname} is a string giving
+the name of the function.  Should the return type of the function
+be required, it can be obtained via @var{fundecl}.  @var{size}
+is the size, in bytes, of the constant pool that will be written
+immediately after this call.
+
+If no constant-pool prefix is required, the usual case, this macro need
+not be defined.
+@end defmac
+
+@defmac ASM_OUTPUT_SPECIAL_POOL_ENTRY (@var{file}, @var{x}, @var{mode}, @var{align}, @var{labelno}, @var{jumpto})
+A C statement (with or without semicolon) to output a constant in the
+constant pool, if it needs special treatment.  (This macro need not do
+anything for RTL expressions that can be output normally.)
+
+The argument @var{file} is the standard I/O stream to output the
+assembler code on.  @var{x} is the RTL expression for the constant to
+output, and @var{mode} is the machine mode (in case @var{x} is a
+@samp{const_int}).  @var{align} is the required alignment for the value
+@var{x}; you should output an assembler directive to force this much
+alignment.
+
+The argument @var{labelno} is a number to use in an internal label for
+the address of this pool entry.  The definition of this macro is
+responsible for outputting the label definition at the proper place.
+Here is how to do this:
+
+@smallexample
+@code{(*targetm.asm_out.internal_label)} (@var{file}, "LC", @var{labelno});
+@end smallexample
+
+When you output a pool entry specially, you should end with a
+@code{goto} to the label @var{jumpto}.  This will prevent the same pool
+entry from being output a second time in the usual manner.
+
+You need not define this macro if it would do nothing.
+@end defmac
+
+@defmac ASM_OUTPUT_POOL_EPILOGUE (@var{file} @var{funname} @var{fundecl} @var{size})
+A C statement to output assembler commands to at the end of the constant
+pool for a function.  @var{funname} is a string giving the name of the
+function.  Should the return type of the function be required, you can
+obtain it via @var{fundecl}.  @var{size} is the size, in bytes, of the
+constant pool that GCC wrote immediately before this call.
+
+If no constant-pool epilogue is required, the usual case, you need not
+define this macro.
+@end defmac
+
+@defmac IS_ASM_LOGICAL_LINE_SEPARATOR (@var{C}, @var{STR})
+Define this macro as a C expression which is nonzero if @var{C} is
+used as a logical line separator by the assembler.  @var{STR} points
+to the position in the string where @var{C} was found; this can be used if
+a line separator uses multiple characters.
+
+If you do not define this macro, the default is that only
+the character @samp{;} is treated as a logical line separator.
+@end defmac
+
+@hook TARGET_ASM_OPEN_PAREN
+These target hooks are C string constants, describing the syntax in the
+assembler for grouping arithmetic expressions.  If not overridden, they
+default to normal parentheses, which is correct for most assemblers.
+@end deftypevr
+
+These macros are provided by @file{real.h} for writing the definitions
+of @code{ASM_OUTPUT_DOUBLE} and the like:
+
+@defmac REAL_VALUE_TO_TARGET_SINGLE (@var{x}, @var{l})
+@defmacx REAL_VALUE_TO_TARGET_DOUBLE (@var{x}, @var{l})
+@defmacx REAL_VALUE_TO_TARGET_LONG_DOUBLE (@var{x}, @var{l})
+@defmacx REAL_VALUE_TO_TARGET_DECIMAL32 (@var{x}, @var{l})
+@defmacx REAL_VALUE_TO_TARGET_DECIMAL64 (@var{x}, @var{l})
+@defmacx REAL_VALUE_TO_TARGET_DECIMAL128 (@var{x}, @var{l})
+These translate @var{x}, of type @code{REAL_VALUE_TYPE}, to the
+target's floating point representation, and store its bit pattern in
+the variable @var{l}.  For @code{REAL_VALUE_TO_TARGET_SINGLE} and
+@code{REAL_VALUE_TO_TARGET_DECIMAL32}, this variable should be a
+simple @code{long int}.  For the others, it should be an array of
+@code{long int}.  The number of elements in this array is determined
+by the size of the desired target floating point data type: 32 bits of
+it go in each @code{long int} array element.  Each array element holds
+32 bits of the result, even if @code{long int} is wider than 32 bits
+on the host machine.
+
+The array element values are designed so that you can print them out
+using @code{fprintf} in the order they should appear in the target
+machine's memory.
+@end defmac
+
+@node Uninitialized Data
+@subsection Output of Uninitialized Variables
+
+Each of the macros in this section is used to do the whole job of
+outputting a single uninitialized variable.
+
+@defmac ASM_OUTPUT_COMMON (@var{stream}, @var{name}, @var{size}, @var{rounded})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} the assembler definition of a common-label named
+@var{name} whose size is @var{size} bytes.  The variable @var{rounded}
+is the size rounded up to whatever alignment the caller wants.  It is
+possible that @var{size} may be zero, for instance if a struct with no
+other member than a zero-length array is defined.  In this case, the
+backend must output a symbol definition that allocates at least one
+byte, both so that the address of the resulting object does not compare
+equal to any other, and because some object formats cannot even express
+the concept of a zero-sized common symbol, as that is how they represent
+an ordinary undefined external.
+
+Use the expression @code{assemble_name (@var{stream}, @var{name})} to
+output the name itself; before and after that, output the additional
+assembler syntax for defining the name, and a newline.
+
+This macro controls how the assembler definitions of uninitialized
+common global variables are output.
+@end defmac
+
+@defmac ASM_OUTPUT_ALIGNED_COMMON (@var{stream}, @var{name}, @var{size}, @var{alignment})
+Like @code{ASM_OUTPUT_COMMON} except takes the required alignment as a
+separate, explicit argument.  If you define this macro, it is used in
+place of @code{ASM_OUTPUT_COMMON}, and gives you more flexibility in
+handling the required alignment of the variable.  The alignment is specified
+as the number of bits.
+@end defmac
+
+@defmac ASM_OUTPUT_ALIGNED_DECL_COMMON (@var{stream}, @var{decl}, @var{name}, @var{size}, @var{alignment})
+Like @code{ASM_OUTPUT_ALIGNED_COMMON} except that @var{decl} of the
+variable to be output, if there is one, or @code{NULL_TREE} if there
+is no corresponding variable.  If you define this macro, GCC will use it
+in place of both @code{ASM_OUTPUT_COMMON} and
+@code{ASM_OUTPUT_ALIGNED_COMMON}.  Define this macro when you need to see
+the variable's decl in order to chose what to output.
+@end defmac
+
+@defmac ASM_OUTPUT_BSS (@var{stream}, @var{decl}, @var{name}, @var{size}, @var{rounded})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} the assembler definition of uninitialized global @var{decl} named
+@var{name} whose size is @var{size} bytes.  The variable @var{rounded}
+is the size rounded up to whatever alignment the caller wants.
+
+Try to use function @code{asm_output_bss} defined in @file{varasm.c} when
+defining this macro.  If unable, use the expression
+@code{assemble_name (@var{stream}, @var{name})} to output the name itself;
+before and after that, output the additional assembler syntax for defining
+the name, and a newline.
+
+There are two ways of handling global BSS@.  One is to define either
+this macro or its aligned counterpart, @code{ASM_OUTPUT_ALIGNED_BSS}.
+The other is to have @code{TARGET_ASM_SELECT_SECTION} return a
+switchable BSS section (@pxref{TARGET_HAVE_SWITCHABLE_BSS_SECTIONS}).
+You do not need to do both.
+
+Some languages do not have @code{common} data, and require a
+non-common form of global BSS in order to handle uninitialized globals
+efficiently.  C++ is one example of this.  However, if the target does
+not support global BSS, the front end may choose to make globals
+common in order to save space in the object file.
+@end defmac
+
+@defmac ASM_OUTPUT_ALIGNED_BSS (@var{stream}, @var{decl}, @var{name}, @var{size}, @var{alignment})
+Like @code{ASM_OUTPUT_BSS} except takes the required alignment as a
+separate, explicit argument.  If you define this macro, it is used in
+place of @code{ASM_OUTPUT_BSS}, and gives you more flexibility in
+handling the required alignment of the variable.  The alignment is specified
+as the number of bits.
+
+Try to use function @code{asm_output_aligned_bss} defined in file
+@file{varasm.c} when defining this macro.
+@end defmac
+
+@defmac ASM_OUTPUT_LOCAL (@var{stream}, @var{name}, @var{size}, @var{rounded})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} the assembler definition of a local-common-label named
+@var{name} whose size is @var{size} bytes.  The variable @var{rounded}
+is the size rounded up to whatever alignment the caller wants.
+
+Use the expression @code{assemble_name (@var{stream}, @var{name})} to
+output the name itself; before and after that, output the additional
+assembler syntax for defining the name, and a newline.
+
+This macro controls how the assembler definitions of uninitialized
+static variables are output.
+@end defmac
+
+@defmac ASM_OUTPUT_ALIGNED_LOCAL (@var{stream}, @var{name}, @var{size}, @var{alignment})
+Like @code{ASM_OUTPUT_LOCAL} except takes the required alignment as a
+separate, explicit argument.  If you define this macro, it is used in
+place of @code{ASM_OUTPUT_LOCAL}, and gives you more flexibility in
+handling the required alignment of the variable.  The alignment is specified
+as the number of bits.
+@end defmac
+
+@defmac ASM_OUTPUT_ALIGNED_DECL_LOCAL (@var{stream}, @var{decl}, @var{name}, @var{size}, @var{alignment})
+Like @code{ASM_OUTPUT_ALIGNED_DECL} except that @var{decl} of the
+variable to be output, if there is one, or @code{NULL_TREE} if there
+is no corresponding variable.  If you define this macro, GCC will use it
+in place of both @code{ASM_OUTPUT_DECL} and
+@code{ASM_OUTPUT_ALIGNED_DECL}.  Define this macro when you need to see
+the variable's decl in order to chose what to output.
+@end defmac
+
+@node Label Output
+@subsection Output and Generation of Labels
+
+@c prevent bad page break with this line
+This is about outputting labels.
+
+@findex assemble_name
+@defmac ASM_OUTPUT_LABEL (@var{stream}, @var{name})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} the assembler definition of a label named @var{name}.
+Use the expression @code{assemble_name (@var{stream}, @var{name})} to
+output the name itself; before and after that, output the additional
+assembler syntax for defining the name, and a newline.  A default
+definition of this macro is provided which is correct for most systems.
+@end defmac
+
+@defmac ASM_OUTPUT_FUNCTION_LABEL (@var{stream}, @var{name}, @var{decl})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} the assembler definition of a label named @var{name} of
+a function.
+Use the expression @code{assemble_name (@var{stream}, @var{name})} to
+output the name itself; before and after that, output the additional
+assembler syntax for defining the name, and a newline.  A default
+definition of this macro is provided which is correct for most systems.
+
+If this macro is not defined, then the function name is defined in the
+usual manner as a label (by means of @code{ASM_OUTPUT_LABEL}).
+@end defmac
+
+@findex assemble_name_raw
+@defmac ASM_OUTPUT_INTERNAL_LABEL (@var{stream}, @var{name})
+Identical to @code{ASM_OUTPUT_LABEL}, except that @var{name} is known
+to refer to a compiler-generated label.  The default definition uses
+@code{assemble_name_raw}, which is like @code{assemble_name} except
+that it is more efficient.
+@end defmac
+
+@defmac SIZE_ASM_OP
+A C string containing the appropriate assembler directive to specify the
+size of a symbol, without any arguments.  On systems that use ELF, the
+default (in @file{config/elfos.h}) is @samp{"\t.size\t"}; on other
+systems, the default is not to define this macro.
+
+Define this macro only if it is correct to use the default definitions
+of @code{ASM_OUTPUT_SIZE_DIRECTIVE} and @code{ASM_OUTPUT_MEASURED_SIZE}
+for your system.  If you need your own custom definitions of those
+macros, or if you do not need explicit symbol sizes at all, do not
+define this macro.
+@end defmac
+
+@defmac ASM_OUTPUT_SIZE_DIRECTIVE (@var{stream}, @var{name}, @var{size})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} a directive telling the assembler that the size of the
+symbol @var{name} is @var{size}.  @var{size} is a @code{HOST_WIDE_INT}.
+If you define @code{SIZE_ASM_OP}, a default definition of this macro is
+provided.
+@end defmac
+
+@defmac ASM_OUTPUT_MEASURED_SIZE (@var{stream}, @var{name})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} a directive telling the assembler to calculate the size of
+the symbol @var{name} by subtracting its address from the current
+address.
+
+If you define @code{SIZE_ASM_OP}, a default definition of this macro is
+provided.  The default assumes that the assembler recognizes a special
+@samp{.} symbol as referring to the current address, and can calculate
+the difference between this and another symbol.  If your assembler does
+not recognize @samp{.} or cannot do calculations with it, you will need
+to redefine @code{ASM_OUTPUT_MEASURED_SIZE} to use some other technique.
+@end defmac
+
+@defmac TYPE_ASM_OP
+A C string containing the appropriate assembler directive to specify the
+type of a symbol, without any arguments.  On systems that use ELF, the
+default (in @file{config/elfos.h}) is @samp{"\t.type\t"}; on other
+systems, the default is not to define this macro.
+
+Define this macro only if it is correct to use the default definition of
+@code{ASM_OUTPUT_TYPE_DIRECTIVE} for your system.  If you need your own
+custom definition of this macro, or if you do not need explicit symbol
+types at all, do not define this macro.
+@end defmac
+
+@defmac TYPE_OPERAND_FMT
+A C string which specifies (using @code{printf} syntax) the format of
+the second operand to @code{TYPE_ASM_OP}.  On systems that use ELF, the
+default (in @file{config/elfos.h}) is @samp{"@@%s"}; on other systems,
+the default is not to define this macro.
+
+Define this macro only if it is correct to use the default definition of
+@code{ASM_OUTPUT_TYPE_DIRECTIVE} for your system.  If you need your own
+custom definition of this macro, or if you do not need explicit symbol
+types at all, do not define this macro.
+@end defmac
+
+@defmac ASM_OUTPUT_TYPE_DIRECTIVE (@var{stream}, @var{type})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} a directive telling the assembler that the type of the
+symbol @var{name} is @var{type}.  @var{type} is a C string; currently,
+that string is always either @samp{"function"} or @samp{"object"}, but
+you should not count on this.
+
+If you define @code{TYPE_ASM_OP} and @code{TYPE_OPERAND_FMT}, a default
+definition of this macro is provided.
+@end defmac
+
+@defmac ASM_DECLARE_FUNCTION_NAME (@var{stream}, @var{name}, @var{decl})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} any text necessary for declaring the name @var{name} of a
+function which is being defined.  This macro is responsible for
+outputting the label definition (perhaps using
+@code{ASM_OUTPUT_FUNCTION_LABEL}).  The argument @var{decl} is the
+@code{FUNCTION_DECL} tree node representing the function.
+
+If this macro is not defined, then the function name is defined in the
+usual manner as a label (by means of @code{ASM_OUTPUT_FUNCTION_LABEL}).
+
+You may wish to use @code{ASM_OUTPUT_TYPE_DIRECTIVE} in the definition
+of this macro.
+@end defmac
+
+@defmac ASM_DECLARE_FUNCTION_SIZE (@var{stream}, @var{name}, @var{decl})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} any text necessary for declaring the size of a function
+which is being defined.  The argument @var{name} is the name of the
+function.  The argument @var{decl} is the @code{FUNCTION_DECL} tree node
+representing the function.
+
+If this macro is not defined, then the function size is not defined.
+
+You may wish to use @code{ASM_OUTPUT_MEASURED_SIZE} in the definition
+of this macro.
+@end defmac
+
+@defmac ASM_DECLARE_OBJECT_NAME (@var{stream}, @var{name}, @var{decl})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} any text necessary for declaring the name @var{name} of an
+initialized variable which is being defined.  This macro must output the
+label definition (perhaps using @code{ASM_OUTPUT_LABEL}).  The argument
+@var{decl} is the @code{VAR_DECL} tree node representing the variable.
+
+If this macro is not defined, then the variable name is defined in the
+usual manner as a label (by means of @code{ASM_OUTPUT_LABEL}).
+
+You may wish to use @code{ASM_OUTPUT_TYPE_DIRECTIVE} and/or
+@code{ASM_OUTPUT_SIZE_DIRECTIVE} in the definition of this macro.
+@end defmac
+
+@hook TARGET_ASM_DECLARE_CONSTANT_NAME
+A target hook to output to the stdio stream @var{file} any text necessary
+for declaring the name @var{name} of a constant which is being defined.  This
+target hook is responsible for outputting the label definition (perhaps using
+@code{assemble_label}).  The argument @var{exp} is the value of the constant,
+and @var{size} is the size of the constant in bytes.  The @var{name}
+will be an internal label.
+
+The default version of this target hook, define the @var{name} in the
+usual manner as a label (by means of @code{assemble_label}).
+
+You may wish to use @code{ASM_OUTPUT_TYPE_DIRECTIVE} in this target hook.
+@end deftypefn
+
+@defmac ASM_DECLARE_REGISTER_GLOBAL (@var{stream}, @var{decl}, @var{regno}, @var{name})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} any text necessary for claiming a register @var{regno}
+for a global variable @var{decl} with name @var{name}.
+
+If you don't define this macro, that is equivalent to defining it to do
+nothing.
+@end defmac
+
+@defmac ASM_FINISH_DECLARE_OBJECT (@var{stream}, @var{decl}, @var{toplevel}, @var{atend})
+A C statement (sans semicolon) to finish up declaring a variable name
+once the compiler has processed its initializer fully and thus has had a
+chance to determine the size of an array when controlled by an
+initializer.  This is used on systems where it's necessary to declare
+something about the size of the object.
+
+If you don't define this macro, that is equivalent to defining it to do
+nothing.
+
+You may wish to use @code{ASM_OUTPUT_SIZE_DIRECTIVE} and/or
+@code{ASM_OUTPUT_MEASURED_SIZE} in the definition of this macro.
+@end defmac
+
+@hook TARGET_ASM_GLOBALIZE_LABEL
+This target hook is a function to output to the stdio stream
+@var{stream} some commands that will make the label @var{name} global;
+that is, available for reference from other files.
+
+The default implementation relies on a proper definition of
+@code{GLOBAL_ASM_OP}.
+@end deftypefn
+
+@hook TARGET_ASM_GLOBALIZE_DECL_NAME
+This target hook is a function to output to the stdio stream
+@var{stream} some commands that will make the name associated with @var{decl}
+global; that is, available for reference from other files.
+
+The default implementation uses the TARGET_ASM_GLOBALIZE_LABEL target hook.
+@end deftypefn
+
+@defmac ASM_WEAKEN_LABEL (@var{stream}, @var{name})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} some commands that will make the label @var{name} weak;
+that is, available for reference from other files but only used if
+no other definition is available.  Use the expression
+@code{assemble_name (@var{stream}, @var{name})} to output the name
+itself; before and after that, output the additional assembler syntax
+for making that name weak, and a newline.
+
+If you don't define this macro or @code{ASM_WEAKEN_DECL}, GCC will not
+support weak symbols and you should not define the @code{SUPPORTS_WEAK}
+macro.
+@end defmac
+
+@defmac ASM_WEAKEN_DECL (@var{stream}, @var{decl}, @var{name}, @var{value})
+Combines (and replaces) the function of @code{ASM_WEAKEN_LABEL} and
+@code{ASM_OUTPUT_WEAK_ALIAS}, allowing access to the associated function
+or variable decl.  If @var{value} is not @code{NULL}, this C statement
+should output to the stdio stream @var{stream} assembler code which
+defines (equates) the weak symbol @var{name} to have the value
+@var{value}.  If @var{value} is @code{NULL}, it should output commands
+to make @var{name} weak.
+@end defmac
+
+@defmac ASM_OUTPUT_WEAKREF (@var{stream}, @var{decl}, @var{name}, @var{value})
+Outputs a directive that enables @var{name} to be used to refer to
+symbol @var{value} with weak-symbol semantics.  @code{decl} is the
+declaration of @code{name}.
+@end defmac
+
+@defmac SUPPORTS_WEAK
+A preprocessor constant expression which evaluates to true if the target
+supports weak symbols.
+
+If you don't define this macro, @file{defaults.h} provides a default
+definition.  If either @code{ASM_WEAKEN_LABEL} or @code{ASM_WEAKEN_DECL}
+is defined, the default definition is @samp{1}; otherwise, it is @samp{0}.
+@end defmac
+
+@defmac TARGET_SUPPORTS_WEAK
+A C expression which evaluates to true if the target supports weak symbols.
+
+If you don't define this macro, @file{defaults.h} provides a default
+definition.  The default definition is @samp{(SUPPORTS_WEAK)}.  Define
+this macro if you want to control weak symbol support with a compiler
+flag such as @option{-melf}.
+@end defmac
+
+@defmac MAKE_DECL_ONE_ONLY (@var{decl})
+A C statement (sans semicolon) to mark @var{decl} to be emitted as a
+public symbol such that extra copies in multiple translation units will
+be discarded by the linker.  Define this macro if your object file
+format provides support for this concept, such as the @samp{COMDAT}
+section flags in the Microsoft Windows PE/COFF format, and this support
+requires changes to @var{decl}, such as putting it in a separate section.
+@end defmac
+
+@defmac SUPPORTS_ONE_ONLY
+A C expression which evaluates to true if the target supports one-only
+semantics.
+
+If you don't define this macro, @file{varasm.c} provides a default
+definition.  If @code{MAKE_DECL_ONE_ONLY} is defined, the default
+definition is @samp{1}; otherwise, it is @samp{0}.  Define this macro if
+you want to control one-only symbol support with a compiler flag, or if
+setting the @code{DECL_ONE_ONLY} flag is enough to mark a declaration to
+be emitted as one-only.
+@end defmac
+
+@hook TARGET_ASM_ASSEMBLE_VISIBILITY
+This target hook is a function to output to @var{asm_out_file} some
+commands that will make the symbol(s) associated with @var{decl} have
+hidden, protected or internal visibility as specified by @var{visibility}.
+@end deftypefn
+
+@defmac TARGET_WEAK_NOT_IN_ARCHIVE_TOC
+A C expression that evaluates to true if the target's linker expects
+that weak symbols do not appear in a static archive's table of contents.
+The default is @code{0}.
+
+Leaving weak symbols out of an archive's table of contents means that,
+if a symbol will only have a definition in one translation unit and
+will have undefined references from other translation units, that
+symbol should not be weak.  Defining this macro to be nonzero will
+thus have the effect that certain symbols that would normally be weak
+(explicit template instantiations, and vtables for polymorphic classes
+with noninline key methods) will instead be nonweak.
+
+The C++ ABI requires this macro to be zero.  Define this macro for
+targets where full C++ ABI compliance is impossible and where linker
+restrictions require weak symbols to be left out of a static archive's
+table of contents.
+@end defmac
+
+@defmac ASM_OUTPUT_EXTERNAL (@var{stream}, @var{decl}, @var{name})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} any text necessary for declaring the name of an external
+symbol named @var{name} which is referenced in this compilation but
+not defined.  The value of @var{decl} is the tree node for the
+declaration.
+
+This macro need not be defined if it does not need to output anything.
+The GNU assembler and most Unix assemblers don't require anything.
+@end defmac
+
+@hook TARGET_ASM_EXTERNAL_LIBCALL
+This target hook is a function to output to @var{asm_out_file} an assembler
+pseudo-op to declare a library function name external.  The name of the
+library function is given by @var{symref}, which is a @code{symbol_ref}.
+@end deftypefn
+
+@hook TARGET_ASM_MARK_DECL_PRESERVED
+This target hook is a function to output to @var{asm_out_file} an assembler
+directive to annotate @var{symbol} as used.  The Darwin target uses the
+.no_dead_code_strip directive.
+@end deftypefn
+
+@defmac ASM_OUTPUT_LABELREF (@var{stream}, @var{name})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} a reference in assembler syntax to a label named
+@var{name}.  This should add @samp{_} to the front of the name, if that
+is customary on your operating system, as it is in most Berkeley Unix
+systems.  This macro is used in @code{assemble_name}.
+@end defmac
+
+@hook TARGET_MANGLE_ASSEMBLER_NAME
+
+@defmac ASM_OUTPUT_SYMBOL_REF (@var{stream}, @var{sym})
+A C statement (sans semicolon) to output a reference to
+@code{SYMBOL_REF} @var{sym}.  If not defined, @code{assemble_name}
+will be used to output the name of the symbol.  This macro may be used
+to modify the way a symbol is referenced depending on information
+encoded by @code{TARGET_ENCODE_SECTION_INFO}.
+@end defmac
+
+@defmac ASM_OUTPUT_LABEL_REF (@var{stream}, @var{buf})
+A C statement (sans semicolon) to output a reference to @var{buf}, the
+result of @code{ASM_GENERATE_INTERNAL_LABEL}.  If not defined,
+@code{assemble_name} will be used to output the name of the symbol.
+This macro is not used by @code{output_asm_label}, or the @code{%l}
+specifier that calls it; the intention is that this macro should be set
+when it is necessary to output a label differently when its address is
+being taken.
+@end defmac
+
+@hook TARGET_ASM_INTERNAL_LABEL
+A function to output to the stdio stream @var{stream} a label whose
+name is made from the string @var{prefix} and the number @var{labelno}.
+
+It is absolutely essential that these labels be distinct from the labels
+used for user-level functions and variables.  Otherwise, certain programs
+will have name conflicts with internal labels.
+
+It is desirable to exclude internal labels from the symbol table of the
+object file.  Most assemblers have a naming convention for labels that
+should be excluded; on many systems, the letter @samp{L} at the
+beginning of a label has this effect.  You should find out what
+convention your system uses, and follow it.
+
+The default version of this function utilizes @code{ASM_GENERATE_INTERNAL_LABEL}.
+@end deftypefn
+
+@defmac ASM_OUTPUT_DEBUG_LABEL (@var{stream}, @var{prefix}, @var{num})
+A C statement to output to the stdio stream @var{stream} a debug info
+label whose name is made from the string @var{prefix} and the number
+@var{num}.  This is useful for VLIW targets, where debug info labels
+may need to be treated differently than branch target labels.  On some
+systems, branch target labels must be at the beginning of instruction
+bundles, but debug info labels can occur in the middle of instruction
+bundles.
+
+If this macro is not defined, then @code{(*targetm.asm_out.internal_label)} will be
+used.
+@end defmac
+
+@defmac ASM_GENERATE_INTERNAL_LABEL (@var{string}, @var{prefix}, @var{num})
+A C statement to store into the string @var{string} a label whose name
+is made from the string @var{prefix} and the number @var{num}.
+
+This string, when output subsequently by @code{assemble_name}, should
+produce the output that @code{(*targetm.asm_out.internal_label)} would produce
+with the same @var{prefix} and @var{num}.
+
+If the string begins with @samp{*}, then @code{assemble_name} will
+output the rest of the string unchanged.  It is often convenient for
+@code{ASM_GENERATE_INTERNAL_LABEL} to use @samp{*} in this way.  If the
+string doesn't start with @samp{*}, then @code{ASM_OUTPUT_LABELREF} gets
+to output the string, and may change it.  (Of course,
+@code{ASM_OUTPUT_LABELREF} is also part of your machine description, so
+you should know what it does on your machine.)
+@end defmac
+
+@defmac ASM_FORMAT_PRIVATE_NAME (@var{outvar}, @var{name}, @var{number})
+A C expression to assign to @var{outvar} (which is a variable of type
+@code{char *}) a newly allocated string made from the string
+@var{name} and the number @var{number}, with some suitable punctuation
+added.  Use @code{alloca} to get space for the string.
+
+The string will be used as an argument to @code{ASM_OUTPUT_LABELREF} to
+produce an assembler label for an internal static variable whose name is
+@var{name}.  Therefore, the string must be such as to result in valid
+assembler code.  The argument @var{number} is different each time this
+macro is executed; it prevents conflicts between similarly-named
+internal static variables in different scopes.
+
+Ideally this string should not be a valid C identifier, to prevent any
+conflict with the user's own symbols.  Most assemblers allow periods
+or percent signs in assembler symbols; putting at least one of these
+between the name and the number will suffice.
+
+If this macro is not defined, a default definition will be provided
+which is correct for most systems.
+@end defmac
+
+@defmac ASM_OUTPUT_DEF (@var{stream}, @var{name}, @var{value})
+A C statement to output to the stdio stream @var{stream} assembler code
+which defines (equates) the symbol @var{name} to have the value @var{value}.
+
+@findex SET_ASM_OP
+If @code{SET_ASM_OP} is defined, a default definition is provided which is
+correct for most systems.
+@end defmac
+
+@defmac ASM_OUTPUT_DEF_FROM_DECLS (@var{stream}, @var{decl_of_name}, @var{decl_of_value})
+A C statement to output to the stdio stream @var{stream} assembler code
+which defines (equates) the symbol whose tree node is @var{decl_of_name}
+to have the value of the tree node @var{decl_of_value}.  This macro will
+be used in preference to @samp{ASM_OUTPUT_DEF} if it is defined and if
+the tree nodes are available.
+
+@findex SET_ASM_OP
+If @code{SET_ASM_OP} is defined, a default definition is provided which is
+correct for most systems.
+@end defmac
+
+@defmac TARGET_DEFERRED_OUTPUT_DEFS (@var{decl_of_name}, @var{decl_of_value})
+A C statement that evaluates to true if the assembler code which defines
+(equates) the symbol whose tree node is @var{decl_of_name} to have the value
+of the tree node @var{decl_of_value} should be emitted near the end of the
+current compilation unit.  The default is to not defer output of defines.
+This macro affects defines output by @samp{ASM_OUTPUT_DEF} and
+@samp{ASM_OUTPUT_DEF_FROM_DECLS}.
+@end defmac
+
+@defmac ASM_OUTPUT_WEAK_ALIAS (@var{stream}, @var{name}, @var{value})
+A C statement to output to the stdio stream @var{stream} assembler code
+which defines (equates) the weak symbol @var{name} to have the value
+@var{value}.  If @var{value} is @code{NULL}, it defines @var{name} as
+an undefined weak symbol.
+
+Define this macro if the target only supports weak aliases; define
+@code{ASM_OUTPUT_DEF} instead if possible.
+@end defmac
+
+@defmac OBJC_GEN_METHOD_LABEL (@var{buf}, @var{is_inst}, @var{class_name}, @var{cat_name}, @var{sel_name})
+Define this macro to override the default assembler names used for
+Objective-C methods.
+
+The default name is a unique method number followed by the name of the
+class (e.g.@: @samp{_1_Foo}).  For methods in categories, the name of
+the category is also included in the assembler name (e.g.@:
+@samp{_1_Foo_Bar}).
+
+These names are safe on most systems, but make debugging difficult since
+the method's selector is not present in the name.  Therefore, particular
+systems define other ways of computing names.
+
+@var{buf} is an expression of type @code{char *} which gives you a
+buffer in which to store the name; its length is as long as
+@var{class_name}, @var{cat_name} and @var{sel_name} put together, plus
+50 characters extra.
+
+The argument @var{is_inst} specifies whether the method is an instance
+method or a class method; @var{class_name} is the name of the class;
+@var{cat_name} is the name of the category (or @code{NULL} if the method is not
+in a category); and @var{sel_name} is the name of the selector.
+
+On systems where the assembler can handle quoted names, you can use this
+macro to provide more human-readable names.
+@end defmac
+
+@defmac ASM_DECLARE_CLASS_REFERENCE (@var{stream}, @var{name})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} commands to declare that the label @var{name} is an
+Objective-C class reference.  This is only needed for targets whose
+linkers have special support for NeXT-style runtimes.
+@end defmac
+
+@defmac ASM_DECLARE_UNRESOLVED_REFERENCE (@var{stream}, @var{name})
+A C statement (sans semicolon) to output to the stdio stream
+@var{stream} commands to declare that the label @var{name} is an
+unresolved Objective-C class reference.  This is only needed for targets
+whose linkers have special support for NeXT-style runtimes.
+@end defmac
+
+@node Initialization
+@subsection How Initialization Functions Are Handled
+@cindex initialization routines
+@cindex termination routines
+@cindex constructors, output of
+@cindex destructors, output of
+
+The compiled code for certain languages includes @dfn{constructors}
+(also called @dfn{initialization routines})---functions to initialize
+data in the program when the program is started.  These functions need
+to be called before the program is ``started''---that is to say, before
+@code{main} is called.
+
+Compiling some languages generates @dfn{destructors} (also called
+@dfn{termination routines}) that should be called when the program
+terminates.
+
+To make the initialization and termination functions work, the compiler
+must output something in the assembler code to cause those functions to
+be called at the appropriate time.  When you port the compiler to a new
+system, you need to specify how to do this.
+
+There are two major ways that GCC currently supports the execution of
+initialization and termination functions.  Each way has two variants.
+Much of the structure is common to all four variations.
+
+@findex __CTOR_LIST__
+@findex __DTOR_LIST__
+The linker must build two lists of these functions---a list of
+initialization functions, called @code{__CTOR_LIST__}, and a list of
+termination functions, called @code{__DTOR_LIST__}.
+
+Each list always begins with an ignored function pointer (which may hold
+0, @minus{}1, or a count of the function pointers after it, depending on
+the environment).  This is followed by a series of zero or more function
+pointers to constructors (or destructors), followed by a function
+pointer containing zero.
+
+Depending on the operating system and its executable file format, either
+@file{crtstuff.c} or @file{libgcc2.c} traverses these lists at startup
+time and exit time.  Constructors are called in reverse order of the
+list; destructors in forward order.
+
+The best way to handle static constructors works only for object file
+formats which provide arbitrarily-named sections.  A section is set
+aside for a list of constructors, and another for a list of destructors.
+Traditionally these are called @samp{.ctors} and @samp{.dtors}.  Each
+object file that defines an initialization function also puts a word in
+the constructor section to point to that function.  The linker
+accumulates all these words into one contiguous @samp{.ctors} section.
+Termination functions are handled similarly.
+
+This method will be chosen as the default by @file{target-def.h} if
+@code{TARGET_ASM_NAMED_SECTION} is defined.  A target that does not
+support arbitrary sections, but does support special designated
+constructor and destructor sections may define @code{CTORS_SECTION_ASM_OP}
+and @code{DTORS_SECTION_ASM_OP} to achieve the same effect.
+
+When arbitrary sections are available, there are two variants, depending
+upon how the code in @file{crtstuff.c} is called.  On systems that
+support a @dfn{.init} section which is executed at program startup,
+parts of @file{crtstuff.c} are compiled into that section.  The
+program is linked by the @command{gcc} driver like this:
+
+@smallexample
+ld -o @var{output_file} crti.o crtbegin.o @dots{} -lgcc crtend.o crtn.o
+@end smallexample
+
+The prologue of a function (@code{__init}) appears in the @code{.init}
+section of @file{crti.o}; the epilogue appears in @file{crtn.o}.  Likewise
+for the function @code{__fini} in the @dfn{.fini} section.  Normally these
+files are provided by the operating system or by the GNU C library, but
+are provided by GCC for a few targets.
+
+The objects @file{crtbegin.o} and @file{crtend.o} are (for most targets)
+compiled from @file{crtstuff.c}.  They contain, among other things, code
+fragments within the @code{.init} and @code{.fini} sections that branch
+to routines in the @code{.text} section.  The linker will pull all parts
+of a section together, which results in a complete @code{__init} function
+that invokes the routines we need at startup.
+
+To use this variant, you must define the @code{INIT_SECTION_ASM_OP}
+macro properly.
+
+If no init section is available, when GCC compiles any function called
+@code{main} (or more accurately, any function designated as a program
+entry point by the language front end calling @code{expand_main_function}),
+it inserts a procedure call to @code{__main} as the first executable code
+after the function prologue.  The @code{__main} function is defined
+in @file{libgcc2.c} and runs the global constructors.
+
+In file formats that don't support arbitrary sections, there are again
+two variants.  In the simplest variant, the GNU linker (GNU @code{ld})
+and an `a.out' format must be used.  In this case,
+@code{TARGET_ASM_CONSTRUCTOR} is defined to produce a @code{.stabs}
+entry of type @samp{N_SETT}, referencing the name @code{__CTOR_LIST__},
+and with the address of the void function containing the initialization
+code as its value.  The GNU linker recognizes this as a request to add
+the value to a @dfn{set}; the values are accumulated, and are eventually
+placed in the executable as a vector in the format described above, with
+a leading (ignored) count and a trailing zero element.
+@code{TARGET_ASM_DESTRUCTOR} is handled similarly.  Since no init
+section is available, the absence of @code{INIT_SECTION_ASM_OP} causes
+the compilation of @code{main} to call @code{__main} as above, starting
+the initialization process.
+
+The last variant uses neither arbitrary sections nor the GNU linker.
+This is preferable when you want to do dynamic linking and when using
+file formats which the GNU linker does not support, such as `ECOFF'@.  In
+this case, @code{TARGET_HAVE_CTORS_DTORS} is false, initialization and
+termination functions are recognized simply by their names.  This requires
+an extra program in the linkage step, called @command{collect2}.  This program
+pretends to be the linker, for use with GCC; it does its job by running
+the ordinary linker, but also arranges to include the vectors of
+initialization and termination functions.  These functions are called
+via @code{__main} as described above.  In order to use this method,
+@code{use_collect2} must be defined in the target in @file{config.gcc}.
+
+@ifinfo
+The following section describes the specific macros that control and
+customize the handling of initialization and termination functions.
+@end ifinfo
+
+@node Macros for Initialization
+@subsection Macros Controlling Initialization Routines
+
+Here are the macros that control how the compiler handles initialization
+and termination functions:
+
+@defmac INIT_SECTION_ASM_OP
+If defined, a C string constant, including spacing, for the assembler
+operation to identify the following data as initialization code.  If not
+defined, GCC will assume such a section does not exist.  When you are
+using special sections for initialization and termination functions, this
+macro also controls how @file{crtstuff.c} and @file{libgcc2.c} arrange to
+run the initialization functions.
+@end defmac
+
+@defmac HAS_INIT_SECTION
+If defined, @code{main} will not call @code{__main} as described above.
+This macro should be defined for systems that control start-up code
+on a symbol-by-symbol basis, such as OSF/1, and should not
+be defined explicitly for systems that support @code{INIT_SECTION_ASM_OP}.
+@end defmac
+
+@defmac LD_INIT_SWITCH
+If defined, a C string constant for a switch that tells the linker that
+the following symbol is an initialization routine.
+@end defmac
+
+@defmac LD_FINI_SWITCH
+If defined, a C string constant for a switch that tells the linker that
+the following symbol is a finalization routine.
+@end defmac
+
+@defmac COLLECT_SHARED_INIT_FUNC (@var{stream}, @var{func})
+If defined, a C statement that will write a function that can be
+automatically called when a shared library is loaded.  The function
+should call @var{func}, which takes no arguments.  If not defined, and
+the object format requires an explicit initialization function, then a
+function called @code{_GLOBAL__DI} will be generated.
+
+This function and the following one are used by collect2 when linking a
+shared library that needs constructors or destructors, or has DWARF2
+exception tables embedded in the code.
+@end defmac
+
+@defmac COLLECT_SHARED_FINI_FUNC (@var{stream}, @var{func})
+If defined, a C statement that will write a function that can be
+automatically called when a shared library is unloaded.  The function
+should call @var{func}, which takes no arguments.  If not defined, and
+the object format requires an explicit finalization function, then a
+function called @code{_GLOBAL__DD} will be generated.
+@end defmac
+
+@defmac INVOKE__main
+If defined, @code{main} will call @code{__main} despite the presence of
+@code{INIT_SECTION_ASM_OP}.  This macro should be defined for systems
+where the init section is not actually run automatically, but is still
+useful for collecting the lists of constructors and destructors.
+@end defmac
+
+@defmac SUPPORTS_INIT_PRIORITY
+If nonzero, the C++ @code{init_priority} attribute is supported and the
+compiler should emit instructions to control the order of initialization
+of objects.  If zero, the compiler will issue an error message upon
+encountering an @code{init_priority} attribute.
+@end defmac
+
+@hook TARGET_HAVE_CTORS_DTORS
+This value is true if the target supports some ``native'' method of
+collecting constructors and destructors to be run at startup and exit.
+It is false if we must use @command{collect2}.
+@end deftypevr
+
+@hook TARGET_ASM_CONSTRUCTOR
+If defined, a function that outputs assembler code to arrange to call
+the function referenced by @var{symbol} at initialization time.
+
+Assume that @var{symbol} is a @code{SYMBOL_REF} for a function taking
+no arguments and with no return value.  If the target supports initialization
+priorities, @var{priority} is a value between 0 and @code{MAX_INIT_PRIORITY};
+otherwise it must be @code{DEFAULT_INIT_PRIORITY}.
+
+If this macro is not defined by the target, a suitable default will
+be chosen if (1) the target supports arbitrary section names, (2) the
+target defines @code{CTORS_SECTION_ASM_OP}, or (3) @code{USE_COLLECT2}
+is not defined.
+@end deftypefn
+
+@hook TARGET_ASM_DESTRUCTOR
+This is like @code{TARGET_ASM_CONSTRUCTOR} but used for termination
+functions rather than initialization functions.
+@end deftypefn
+
+If @code{TARGET_HAVE_CTORS_DTORS} is true, the initialization routine
+generated for the generated object file will have static linkage.
+
+If your system uses @command{collect2} as the means of processing
+constructors, then that program normally uses @command{nm} to scan
+an object file for constructor functions to be called.
+
+On certain kinds of systems, you can define this macro to make
+@command{collect2} work faster (and, in some cases, make it work at all):
+
+@defmac OBJECT_FORMAT_COFF
+Define this macro if the system uses COFF (Common Object File Format)
+object files, so that @command{collect2} can assume this format and scan
+object files directly for dynamic constructor/destructor functions.
+
+This macro is effective only in a native compiler; @command{collect2} as
+part of a cross compiler always uses @command{nm} for the target machine.
+@end defmac
+
+@defmac REAL_NM_FILE_NAME
+Define this macro as a C string constant containing the file name to use
+to execute @command{nm}.  The default is to search the path normally for
+@command{nm}.
+@end defmac
+
+@defmac NM_FLAGS
+@command{collect2} calls @command{nm} to scan object files for static
+constructors and destructors and LTO info.  By default, @option{-n} is
+passed.  Define @code{NM_FLAGS} to a C string constant if other options
+are needed to get the same output format as GNU @command{nm -n}
+produces.
+@end defmac
+
+If your system supports shared libraries and has a program to list the
+dynamic dependencies of a given library or executable, you can define
+these macros to enable support for running initialization and
+termination functions in shared libraries:
+
+@defmac LDD_SUFFIX
+Define this macro to a C string constant containing the name of the program
+which lists dynamic dependencies, like @command{ldd} under SunOS 4.
+@end defmac
+
+@defmac PARSE_LDD_OUTPUT (@var{ptr})
+Define this macro to be C code that extracts filenames from the output
+of the program denoted by @code{LDD_SUFFIX}.  @var{ptr} is a variable
+of type @code{char *} that points to the beginning of a line of output
+from @code{LDD_SUFFIX}.  If the line lists a dynamic dependency, the
+code must advance @var{ptr} to the beginning of the filename on that
+line.  Otherwise, it must set @var{ptr} to @code{NULL}.
+@end defmac
+
+@defmac SHLIB_SUFFIX
+Define this macro to a C string constant containing the default shared
+library extension of the target (e.g., @samp{".so"}).  @command{collect2}
+strips version information after this suffix when generating global
+constructor and destructor names.  This define is only needed on targets
+that use @command{collect2} to process constructors and destructors.
+@end defmac
+
+@node Instruction Output
+@subsection Output of Assembler Instructions
+
+@c prevent bad page break with this line
+This describes assembler instruction output.
+
+@defmac REGISTER_NAMES
+A C initializer containing the assembler's names for the machine
+registers, each one as a C string constant.  This is what translates
+register numbers in the compiler into assembler language.
+@end defmac
+
+@defmac ADDITIONAL_REGISTER_NAMES
+If defined, a C initializer for an array of structures containing a name
+and a register number.  This macro defines additional names for hard
+registers, thus allowing the @code{asm} option in declarations to refer
+to registers using alternate names.
+@end defmac
+
+@defmac OVERLAPPING_REGISTER_NAMES
+If defined, a C initializer for an array of structures containing a
+name, a register number and a count of the number of consecutive
+machine registers the name overlaps.  This macro defines additional
+names for hard registers, thus allowing the @code{asm} option in
+declarations to refer to registers using alternate names.  Unlike
+@code{ADDITIONAL_REGISTER_NAMES}, this macro should be used when the
+register name implies multiple underlying registers.
+
+This macro should be used when it is important that a clobber in an
+@code{asm} statement clobbers all the underlying values implied by the
+register name.  For example, on ARM, clobbering the double-precision
+VFP register ``d0'' implies clobbering both single-precision registers
+``s0'' and ``s1''.
+@end defmac
+
+@defmac ASM_OUTPUT_OPCODE (@var{stream}, @var{ptr})
+Define this macro if you are using an unusual assembler that
+requires different names for the machine instructions.
+
+The definition is a C statement or statements which output an
+assembler instruction opcode to the stdio stream @var{stream}.  The
+macro-operand @var{ptr} is a variable of type @code{char *} which
+points to the opcode name in its ``internal'' form---the form that is
+written in the machine description.  The definition should output the
+opcode name to @var{stream}, performing any translation you desire, and
+increment the variable @var{ptr} to point at the end of the opcode
+so that it will not be output twice.
+
+In fact, your macro definition may process less than the entire opcode
+name, or more than the opcode name; but if you want to process text
+that includes @samp{%}-sequences to substitute operands, you must take
+care of the substitution yourself.  Just be sure to increment
+@var{ptr} over whatever text should not be output normally.
+
+@findex recog_data.operand
+If you need to look at the operand values, they can be found as the
+elements of @code{recog_data.operand}.
+
+If the macro definition does nothing, the instruction is output
+in the usual way.
+@end defmac
+
+@defmac FINAL_PRESCAN_INSN (@var{insn}, @var{opvec}, @var{noperands})
+If defined, a C statement to be executed just prior to the output of
+assembler code for @var{insn}, to modify the extracted operands so
+they will be output differently.
+
+Here the argument @var{opvec} is the vector containing the operands
+extracted from @var{insn}, and @var{noperands} is the number of
+elements of the vector which contain meaningful data for this insn.
+The contents of this vector are what will be used to convert the insn
+template into assembler code, so you can change the assembler output
+by changing the contents of the vector.
+
+This macro is useful when various assembler syntaxes share a single
+file of instruction patterns; by defining this macro differently, you
+can cause a large class of instructions to be output differently (such
+as with rearranged operands).  Naturally, variations in assembler
+syntax affecting individual insn patterns ought to be handled by
+writing conditional output routines in those patterns.
+
+If this macro is not defined, it is equivalent to a null statement.
+@end defmac
+
+@hook TARGET_ASM_FINAL_POSTSCAN_INSN
+If defined, this target hook is a function which is executed just after the
+output of assembler code for @var{insn}, to change the mode of the assembler
+if necessary.
+
+Here the argument @var{opvec} is the vector containing the operands
+extracted from @var{insn}, and @var{noperands} is the number of
+elements of the vector which contain meaningful data for this insn.
+The contents of this vector are what was used to convert the insn
+template into assembler code, so you can change the assembler mode
+by checking the contents of the vector.
+@end deftypefn
+
+@defmac PRINT_OPERAND (@var{stream}, @var{x}, @var{code})
+A C compound statement to output to stdio stream @var{stream} the
+assembler syntax for an instruction operand @var{x}.  @var{x} is an
+RTL expression.
+
+@var{code} is a value that can be used to specify one of several ways
+of printing the operand.  It is used when identical operands must be
+printed differently depending on the context.  @var{code} comes from
+the @samp{%} specification that was used to request printing of the
+operand.  If the specification was just @samp{%@var{digit}} then
+@var{code} is 0; if the specification was @samp{%@var{ltr}
+@var{digit}} then @var{code} is the ASCII code for @var{ltr}.
+
+@findex reg_names
+If @var{x} is a register, this macro should print the register's name.
+The names can be found in an array @code{reg_names} whose type is
+@code{char *[]}.  @code{reg_names} is initialized from
+@code{REGISTER_NAMES}.
+
+When the machine description has a specification @samp{%@var{punct}}
+(a @samp{%} followed by a punctuation character), this macro is called
+with a null pointer for @var{x} and the punctuation character for
+@var{code}.
+@end defmac
+
+@defmac PRINT_OPERAND_PUNCT_VALID_P (@var{code})
+A C expression which evaluates to true if @var{code} is a valid
+punctuation character for use in the @code{PRINT_OPERAND} macro.  If
+@code{PRINT_OPERAND_PUNCT_VALID_P} is not defined, it means that no
+punctuation characters (except for the standard one, @samp{%}) are used
+in this way.
+@end defmac
+
+@defmac PRINT_OPERAND_ADDRESS (@var{stream}, @var{x})
+A C compound statement to output to stdio stream @var{stream} the
+assembler syntax for an instruction operand that is a memory reference
+whose address is @var{x}.  @var{x} is an RTL expression.
+
+@cindex @code{TARGET_ENCODE_SECTION_INFO} usage
+On some machines, the syntax for a symbolic address depends on the
+section that the address refers to.  On these machines, define the hook
+@code{TARGET_ENCODE_SECTION_INFO} to store the information into the
+@code{symbol_ref}, and then check for it here.  @xref{Assembler
+Format}.
+@end defmac
+
+@findex dbr_sequence_length
+@defmac DBR_OUTPUT_SEQEND (@var{file})
+A C statement, to be executed after all slot-filler instructions have
+been output.  If necessary, call @code{dbr_sequence_length} to
+determine the number of slots filled in a sequence (zero if not
+currently outputting a sequence), to decide how many no-ops to output,
+or whatever.
+
+Don't define this macro if it has nothing to do, but it is helpful in
+reading assembly output if the extent of the delay sequence is made
+explicit (e.g.@: with white space).
+@end defmac
+
+@findex final_sequence
+Note that output routines for instructions with delay slots must be
+prepared to deal with not being output as part of a sequence
+(i.e.@: when the scheduling pass is not run, or when no slot fillers could be
+found.)  The variable @code{final_sequence} is null when not
+processing a sequence, otherwise it contains the @code{sequence} rtx
+being output.
+
+@findex asm_fprintf
+@defmac REGISTER_PREFIX
+@defmacx LOCAL_LABEL_PREFIX
+@defmacx USER_LABEL_PREFIX
+@defmacx IMMEDIATE_PREFIX
+If defined, C string expressions to be used for the @samp{%R}, @samp{%L},
+@samp{%U}, and @samp{%I} options of @code{asm_fprintf} (see
+@file{final.c}).  These are useful when a single @file{md} file must
+support multiple assembler formats.  In that case, the various @file{tm.h}
+files can define these macros differently.
+@end defmac
+
+@defmac ASM_FPRINTF_EXTENSIONS (@var{file}, @var{argptr}, @var{format})
+If defined this macro should expand to a series of @code{case}
+statements which will be parsed inside the @code{switch} statement of
+the @code{asm_fprintf} function.  This allows targets to define extra
+printf formats which may useful when generating their assembler
+statements.  Note that uppercase letters are reserved for future
+generic extensions to asm_fprintf, and so are not available to target
+specific code.  The output file is given by the parameter @var{file}.
+The varargs input pointer is @var{argptr} and the rest of the format
+string, starting the character after the one that is being switched
+upon, is pointed to by @var{format}.
+@end defmac
+
+@defmac ASSEMBLER_DIALECT
+If your target supports multiple dialects of assembler language (such as
+different opcodes), define this macro as a C expression that gives the
+numeric index of the assembler language dialect to use, with zero as the
+first variant.
+
+If this macro is defined, you may use constructs of the form
+@smallexample
+@samp{@{option0|option1|option2@dots{}@}}
+@end smallexample
+@noindent
+in the output templates of patterns (@pxref{Output Template}) or in the
+first argument of @code{asm_fprintf}.  This construct outputs
+@samp{option0}, @samp{option1}, @samp{option2}, etc., if the value of
+@code{ASSEMBLER_DIALECT} is zero, one, two, etc.  Any special characters
+within these strings retain their usual meaning.  If there are fewer
+alternatives within the braces than the value of
+@code{ASSEMBLER_DIALECT}, the construct outputs nothing.
+
+If you do not define this macro, the characters @samp{@{}, @samp{|} and
+@samp{@}} do not have any special meaning when used in templates or
+operands to @code{asm_fprintf}.
+
+Define the macros @code{REGISTER_PREFIX}, @code{LOCAL_LABEL_PREFIX},
+@code{USER_LABEL_PREFIX} and @code{IMMEDIATE_PREFIX} if you can express
+the variations in assembler language syntax with that mechanism.  Define
+@code{ASSEMBLER_DIALECT} and use the @samp{@{option0|option1@}} syntax
+if the syntax variant are larger and involve such things as different
+opcodes or operand order.
+@end defmac
+
+@defmac ASM_OUTPUT_REG_PUSH (@var{stream}, @var{regno})
+A C expression to output to @var{stream} some assembler code
+which will push hard register number @var{regno} onto the stack.
+The code need not be optimal, since this macro is used only when
+profiling.
+@end defmac
+
+@defmac ASM_OUTPUT_REG_POP (@var{stream}, @var{regno})
+A C expression to output to @var{stream} some assembler code
+which will pop hard register number @var{regno} off of the stack.
+The code need not be optimal, since this macro is used only when
+profiling.
+@end defmac
+
+@node Dispatch Tables
+@subsection Output of Dispatch Tables
+
+@c prevent bad page break with this line
+This concerns dispatch tables.
+
+@cindex dispatch table
+@defmac ASM_OUTPUT_ADDR_DIFF_ELT (@var{stream}, @var{body}, @var{value}, @var{rel})
+A C statement to output to the stdio stream @var{stream} an assembler
+pseudo-instruction to generate a difference between two labels.
+@var{value} and @var{rel} are the numbers of two internal labels.  The
+definitions of these labels are output using
+@code{(*targetm.asm_out.internal_label)}, and they must be printed in the same
+way here.  For example,
+
+@smallexample
+fprintf (@var{stream}, "\t.word L%d-L%d\n",
+         @var{value}, @var{rel})
+@end smallexample
+
+You must provide this macro on machines where the addresses in a
+dispatch table are relative to the table's own address.  If defined, GCC
+will also use this macro on all machines when producing PIC@.
+@var{body} is the body of the @code{ADDR_DIFF_VEC}; it is provided so that the
+mode and flags can be read.
+@end defmac
+
+@defmac ASM_OUTPUT_ADDR_VEC_ELT (@var{stream}, @var{value})
+This macro should be provided on machines where the addresses
+in a dispatch table are absolute.
+
+The definition should be a C statement to output to the stdio stream
+@var{stream} an assembler pseudo-instruction to generate a reference to
+a label.  @var{value} is the number of an internal label whose
+definition is output using @code{(*targetm.asm_out.internal_label)}.
+For example,
+
+@smallexample
+fprintf (@var{stream}, "\t.word L%d\n", @var{value})
+@end smallexample
+@end defmac
+
+@defmac ASM_OUTPUT_CASE_LABEL (@var{stream}, @var{prefix}, @var{num}, @var{table})
+Define this if the label before a jump-table needs to be output
+specially.  The first three arguments are the same as for
+@code{(*targetm.asm_out.internal_label)}; the fourth argument is the
+jump-table which follows (a @code{jump_insn} containing an
+@code{addr_vec} or @code{addr_diff_vec}).
+
+This feature is used on system V to output a @code{swbeg} statement
+for the table.
+
+If this macro is not defined, these labels are output with
+@code{(*targetm.asm_out.internal_label)}.
+@end defmac
+
+@defmac ASM_OUTPUT_CASE_END (@var{stream}, @var{num}, @var{table})
+Define this if something special must be output at the end of a
+jump-table.  The definition should be a C statement to be executed
+after the assembler code for the table is written.  It should write
+the appropriate code to stdio stream @var{stream}.  The argument
+@var{table} is the jump-table insn, and @var{num} is the label-number
+of the preceding label.
+
+If this macro is not defined, nothing special is output at the end of
+the jump-table.
+@end defmac
+
+@hook TARGET_ASM_EMIT_UNWIND_LABEL
+This target hook emits a label at the beginning of each FDE@.  It
+should be defined on targets where FDEs need special labels, and it
+should write the appropriate label, for the FDE associated with the
+function declaration @var{decl}, to the stdio stream @var{stream}.
+The third argument, @var{for_eh}, is a boolean: true if this is for an
+exception table.  The fourth argument, @var{empty}, is a boolean:
+true if this is a placeholder label for an omitted FDE@.
+
+The default is that FDEs are not given nonlocal labels.
+@end deftypefn
+
+@hook TARGET_ASM_EMIT_EXCEPT_TABLE_LABEL
+This target hook emits a label at the beginning of the exception table.
+It should be defined on targets where it is desirable for the table
+to be broken up according to function.
+
+The default is that no label is emitted.
+@end deftypefn
+
+@hook TARGET_ASM_EMIT_EXCEPT_PERSONALITY
+
+@hook TARGET_ASM_UNWIND_EMIT
+This target hook emits assembly directives required to unwind the
+given instruction.  This is only used when @code{TARGET_EXCEPT_UNWIND_INFO}
+returns @code{UI_TARGET}.
+@end deftypefn
+
+@hook TARGET_ASM_UNWIND_EMIT_BEFORE_INSN
+
+@node Exception Region Output
+@subsection Assembler Commands for Exception Regions
+
+@c prevent bad page break with this line
+
+This describes commands marking the start and the end of an exception
+region.
+
+@defmac EH_FRAME_SECTION_NAME
+If defined, a C string constant for the name of the section containing
+exception handling frame unwind information.  If not defined, GCC will
+provide a default definition if the target supports named sections.
+@file{crtstuff.c} uses this macro to switch to the appropriate section.
+
+You should define this symbol if your target supports DWARF 2 frame
+unwind information and the default definition does not work.
+@end defmac
+
+@defmac EH_FRAME_IN_DATA_SECTION
+If defined, DWARF 2 frame unwind information will be placed in the
+data section even though the target supports named sections.  This
+might be necessary, for instance, if the system linker does garbage
+collection and sections cannot be marked as not to be collected.
+
+Do not define this macro unless @code{TARGET_ASM_NAMED_SECTION} is
+also defined.
+@end defmac
+
+@defmac EH_TABLES_CAN_BE_READ_ONLY
+Define this macro to 1 if your target is such that no frame unwind
+information encoding used with non-PIC code will ever require a
+runtime relocation, but the linker may not support merging read-only
+and read-write sections into a single read-write section.
+@end defmac
+
+@defmac MASK_RETURN_ADDR
+An rtx used to mask the return address found via @code{RETURN_ADDR_RTX}, so
+that it does not contain any extraneous set bits in it.
+@end defmac
+
+@defmac DWARF2_UNWIND_INFO
+Define this macro to 0 if your target supports DWARF 2 frame unwind
+information, but it does not yet work with exception handling.
+Otherwise, if your target supports this information (if it defines
+@code{INCOMING_RETURN_ADDR_RTX} and either @code{UNALIGNED_INT_ASM_OP}
+or @code{OBJECT_FORMAT_ELF}), GCC will provide a default definition of 1.
+@end defmac
+
+@hook TARGET_EXCEPT_UNWIND_INFO
+This hook defines the mechanism that will be used for exception handling
+by the target.  If the target has ABI specified unwind tables, the hook
+should return @code{UI_TARGET}.  If the target is to use the
+@code{setjmp}/@code{longjmp}-based exception handling scheme, the hook
+should return @code{UI_SJLJ}.  If the target supports DWARF 2 frame unwind
+information, the hook should return @code{UI_DWARF2}.
+
+A target may, if exceptions are disabled, choose to return @code{UI_NONE}.
+This may end up simplifying other parts of target-specific code.  The
+default implementation of this hook never returns @code{UI_NONE}.
+
+Note that the value returned by this hook should be constant.  It should
+not depend on anything except the command-line switches described by
+@var{opts}.  In particular, the
+setting @code{UI_SJLJ} must be fixed at compiler start-up as C pre-processor
+macros and builtin functions related to exception handling are set up
+depending on this setting.
+
+The default implementation of the hook first honors the
+@option{--enable-sjlj-exceptions} configure option, then
+@code{DWARF2_UNWIND_INFO}, and finally defaults to @code{UI_SJLJ}.  If
+@code{DWARF2_UNWIND_INFO} depends on command-line options, the target
+must define this hook so that @var{opts} is used correctly.
+@end deftypefn
+
+@hook TARGET_UNWIND_TABLES_DEFAULT
+This variable should be set to @code{true} if the target ABI requires unwinding
+tables even when exceptions are not used.  It must not be modified by
+command-line option processing.
+@end deftypevr
+
+@defmac DONT_USE_BUILTIN_SETJMP
+Define this macro to 1 if the @code{setjmp}/@code{longjmp}-based scheme
+should use the @code{setjmp}/@code{longjmp} functions from the C library
+instead of the @code{__builtin_setjmp}/@code{__builtin_longjmp} machinery.
+@end defmac
+
+@defmac DWARF_CIE_DATA_ALIGNMENT
+This macro need only be defined if the target might save registers in the
+function prologue at an offset to the stack pointer that is not aligned to
+@code{UNITS_PER_WORD}.  The definition should be the negative minimum
+alignment if @code{STACK_GROWS_DOWNWARD} is defined, and the positive
+minimum alignment otherwise.  @xref{SDB and DWARF}.  Only applicable if
+the target supports DWARF 2 frame unwind information.
+@end defmac
+
+@hook TARGET_TERMINATE_DW2_EH_FRAME_INFO
+Contains the value true if the target should add a zero word onto the
+end of a Dwarf-2 frame info section when used for exception handling.
+Default value is false if @code{EH_FRAME_SECTION_NAME} is defined, and
+true otherwise.
+@end deftypevr
+
+@hook TARGET_DWARF_REGISTER_SPAN
+Given a register, this hook should return a parallel of registers to
+represent where to find the register pieces.  Define this hook if the
+register and its mode are represented in Dwarf in non-contiguous
+locations, or if the register should be represented in more than one
+register in Dwarf.  Otherwise, this hook should return @code{NULL_RTX}.
+If not defined, the default is to return @code{NULL_RTX}.
+@end deftypefn
+
+@hook TARGET_INIT_DWARF_REG_SIZES_EXTRA
+If some registers are represented in Dwarf-2 unwind information in
+multiple pieces, define this hook to fill in information about the
+sizes of those pieces in the table used by the unwinder at runtime.
+It will be called by @code{expand_builtin_init_dwarf_reg_sizes} after
+filling in a single size corresponding to each hard register;
+@var{address} is the address of the table.
+@end deftypefn
+
+@hook TARGET_ASM_TTYPE
+This hook is used to output a reference from a frame unwinding table to
+the type_info object identified by @var{sym}.  It should return @code{true}
+if the reference was output.  Returning @code{false} will cause the
+reference to be output using the normal Dwarf2 routines.
+@end deftypefn
+
+@hook TARGET_ARM_EABI_UNWINDER
+This flag should be set to @code{true} on targets that use an ARM EABI
+based unwinding library, and @code{false} on other targets.  This effects
+the format of unwinding tables, and how the unwinder in entered after
+running a cleanup.  The default is @code{false}.
+@end deftypevr
+
+@node Alignment Output
+@subsection Assembler Commands for Alignment
+
+@c prevent bad page break with this line
+This describes commands for alignment.
+
+@defmac JUMP_ALIGN (@var{label})
+The alignment (log base 2) to put in front of @var{label}, which is
+a common destination of jumps and has no fallthru incoming edge.
+
+This macro need not be defined if you don't want any special alignment
+to be done at such a time.  Most machine descriptions do not currently
+define the macro.
+
+Unless it's necessary to inspect the @var{label} parameter, it is better
+to set the variable @var{align_jumps} in the target's
+@code{TARGET_OPTION_OVERRIDE}.  Otherwise, you should try to honor the user's
+selection in @var{align_jumps} in a @code{JUMP_ALIGN} implementation.
+@end defmac
+
+@hook TARGET_ASM_JUMP_ALIGN_MAX_SKIP
+The maximum number of bytes to skip before @var{label} when applying
+@code{JUMP_ALIGN}.  This works only if
+@code{ASM_OUTPUT_MAX_SKIP_ALIGN} is defined.
+@end deftypefn
+
+@defmac LABEL_ALIGN_AFTER_BARRIER (@var{label})
+The alignment (log base 2) to put in front of @var{label}, which follows
+a @code{BARRIER}.
+
+This macro need not be defined if you don't want any special alignment
+to be done at such a time.  Most machine descriptions do not currently
+define the macro.
+@end defmac
+
+@hook TARGET_ASM_LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
+The maximum number of bytes to skip before @var{label} when applying
+@code{LABEL_ALIGN_AFTER_BARRIER}.  This works only if
+@code{ASM_OUTPUT_MAX_SKIP_ALIGN} is defined.
+@end deftypefn
+
+@defmac LOOP_ALIGN (@var{label})
+The alignment (log base 2) to put in front of @var{label}, which follows
+a @code{NOTE_INSN_LOOP_BEG} note.
+
+This macro need not be defined if you don't want any special alignment
+to be done at such a time.  Most machine descriptions do not currently
+define the macro.
+
+Unless it's necessary to inspect the @var{label} parameter, it is better
+to set the variable @code{align_loops} in the target's
+@code{TARGET_OPTION_OVERRIDE}.  Otherwise, you should try to honor the user's
+selection in @code{align_loops} in a @code{LOOP_ALIGN} implementation.
+@end defmac
+
+@hook TARGET_ASM_LOOP_ALIGN_MAX_SKIP
+The maximum number of bytes to skip when applying @code{LOOP_ALIGN} to
+@var{label}.  This works only if @code{ASM_OUTPUT_MAX_SKIP_ALIGN} is
+defined.
+@end deftypefn
+
+@defmac LABEL_ALIGN (@var{label})
+The alignment (log base 2) to put in front of @var{label}.
+If @code{LABEL_ALIGN_AFTER_BARRIER} / @code{LOOP_ALIGN} specify a different alignment,
+the maximum of the specified values is used.
+
+Unless it's necessary to inspect the @var{label} parameter, it is better
+to set the variable @code{align_labels} in the target's
+@code{TARGET_OPTION_OVERRIDE}.  Otherwise, you should try to honor the user's
+selection in @code{align_labels} in a @code{LABEL_ALIGN} implementation.
+@end defmac
+
+@hook TARGET_ASM_LABEL_ALIGN_MAX_SKIP
+The maximum number of bytes to skip when applying @code{LABEL_ALIGN}
+to @var{label}.  This works only if @code{ASM_OUTPUT_MAX_SKIP_ALIGN}
+is defined.
+@end deftypefn
+
+@defmac ASM_OUTPUT_SKIP (@var{stream}, @var{nbytes})
+A C statement to output to the stdio stream @var{stream} an assembler
+instruction to advance the location counter by @var{nbytes} bytes.
+Those bytes should be zero when loaded.  @var{nbytes} will be a C
+expression of type @code{unsigned HOST_WIDE_INT}.
+@end defmac
+
+@defmac ASM_NO_SKIP_IN_TEXT
+Define this macro if @code{ASM_OUTPUT_SKIP} should not be used in the
+text section because it fails to put zeros in the bytes that are skipped.
+This is true on many Unix systems, where the pseudo--op to skip bytes
+produces no-op instructions rather than zeros when used in the text
+section.
+@end defmac
+
+@defmac ASM_OUTPUT_ALIGN (@var{stream}, @var{power})
+A C statement to output to the stdio stream @var{stream} an assembler
+command to advance the location counter to a multiple of 2 to the
+@var{power} bytes.  @var{power} will be a C expression of type @code{int}.
+@end defmac
+
+@defmac ASM_OUTPUT_ALIGN_WITH_NOP (@var{stream}, @var{power})
+Like @code{ASM_OUTPUT_ALIGN}, except that the ``nop'' instruction is used
+for padding, if necessary.
+@end defmac
+
+@defmac ASM_OUTPUT_MAX_SKIP_ALIGN (@var{stream}, @var{power}, @var{max_skip})
+A C statement to output to the stdio stream @var{stream} an assembler
+command to advance the location counter to a multiple of 2 to the
+@var{power} bytes, but only if @var{max_skip} or fewer bytes are needed to
+satisfy the alignment request.  @var{power} and @var{max_skip} will be
+a C expression of type @code{int}.
+@end defmac
+
+@need 3000
+@node Debugging Info
+@section Controlling Debugging Information Format
+
+@c prevent bad page break with this line
+This describes how to specify debugging information.
+
+@menu
+* All Debuggers::      Macros that affect all debugging formats uniformly.
+* DBX Options::        Macros enabling specific options in DBX format.
+* DBX Hooks::          Hook macros for varying DBX format.
+* File Names and DBX:: Macros controlling output of file names in DBX format.
+* SDB and DWARF::      Macros for SDB (COFF) and DWARF formats.
+* VMS Debug::          Macros for VMS debug format.
+@end menu
+
+@node All Debuggers
+@subsection Macros Affecting All Debugging Formats
+
+@c prevent bad page break with this line
+These macros affect all debugging formats.
+
+@defmac DBX_REGISTER_NUMBER (@var{regno})
+A C expression that returns the DBX register number for the compiler
+register number @var{regno}.  In the default macro provided, the value
+of this expression will be @var{regno} itself.  But sometimes there are
+some registers that the compiler knows about and DBX does not, or vice
+versa.  In such cases, some register may need to have one number in the
+compiler and another for DBX@.
+
+If two registers have consecutive numbers inside GCC, and they can be
+used as a pair to hold a multiword value, then they @emph{must} have
+consecutive numbers after renumbering with @code{DBX_REGISTER_NUMBER}.
+Otherwise, debuggers will be unable to access such a pair, because they
+expect register pairs to be consecutive in their own numbering scheme.
+
+If you find yourself defining @code{DBX_REGISTER_NUMBER} in way that
+does not preserve register pairs, then what you must do instead is
+redefine the actual register numbering scheme.
+@end defmac
+
+@defmac DEBUGGER_AUTO_OFFSET (@var{x})
+A C expression that returns the integer offset value for an automatic
+variable having address @var{x} (an RTL expression).  The default
+computation assumes that @var{x} is based on the frame-pointer and
+gives the offset from the frame-pointer.  This is required for targets
+that produce debugging output for DBX or COFF-style debugging output
+for SDB and allow the frame-pointer to be eliminated when the
+@option{-g} options is used.
+@end defmac
+
+@defmac DEBUGGER_ARG_OFFSET (@var{offset}, @var{x})
+A C expression that returns the integer offset value for an argument
+having address @var{x} (an RTL expression).  The nominal offset is
+@var{offset}.
+@end defmac
+
+@defmac PREFERRED_DEBUGGING_TYPE
+A C expression that returns the type of debugging output GCC should
+produce when the user specifies just @option{-g}.  Define
+this if you have arranged for GCC to support more than one format of
+debugging output.  Currently, the allowable values are @code{DBX_DEBUG},
+@code{SDB_DEBUG}, @code{DWARF_DEBUG}, @code{DWARF2_DEBUG},
+@code{XCOFF_DEBUG}, @code{VMS_DEBUG}, and @code{VMS_AND_DWARF2_DEBUG}.
+
+When the user specifies @option{-ggdb}, GCC normally also uses the
+value of this macro to select the debugging output format, but with two
+exceptions.  If @code{DWARF2_DEBUGGING_INFO} is defined, GCC uses the
+value @code{DWARF2_DEBUG}.  Otherwise, if @code{DBX_DEBUGGING_INFO} is
+defined, GCC uses @code{DBX_DEBUG}.
+
+The value of this macro only affects the default debugging output; the
+user can always get a specific type of output by using @option{-gstabs},
+@option{-gcoff}, @option{-gdwarf-2}, @option{-gxcoff}, or @option{-gvms}.
+@end defmac
+
+@node DBX Options
+@subsection Specific Options for DBX Output
+
+@c prevent bad page break with this line
+These are specific options for DBX output.
+
+@defmac DBX_DEBUGGING_INFO
+Define this macro if GCC should produce debugging output for DBX
+in response to the @option{-g} option.
+@end defmac
+
+@defmac XCOFF_DEBUGGING_INFO
+Define this macro if GCC should produce XCOFF format debugging output
+in response to the @option{-g} option.  This is a variant of DBX format.
+@end defmac
+
+@defmac DEFAULT_GDB_EXTENSIONS
+Define this macro to control whether GCC should by default generate
+GDB's extended version of DBX debugging information (assuming DBX-format
+debugging information is enabled at all).  If you don't define the
+macro, the default is 1: always generate the extended information
+if there is any occasion to.
+@end defmac
+
+@defmac DEBUG_SYMS_TEXT
+Define this macro if all @code{.stabs} commands should be output while
+in the text section.
+@end defmac
+
+@defmac ASM_STABS_OP
+A C string constant, including spacing, naming the assembler pseudo op to
+use instead of @code{"\t.stabs\t"} to define an ordinary debugging symbol.
+If you don't define this macro, @code{"\t.stabs\t"} is used.  This macro
+applies only to DBX debugging information format.
+@end defmac
+
+@defmac ASM_STABD_OP
+A C string constant, including spacing, naming the assembler pseudo op to
+use instead of @code{"\t.stabd\t"} to define a debugging symbol whose
+value is the current location.  If you don't define this macro,
+@code{"\t.stabd\t"} is used.  This macro applies only to DBX debugging
+information format.
+@end defmac
+
+@defmac ASM_STABN_OP
+A C string constant, including spacing, naming the assembler pseudo op to
+use instead of @code{"\t.stabn\t"} to define a debugging symbol with no
+name.  If you don't define this macro, @code{"\t.stabn\t"} is used.  This
+macro applies only to DBX debugging information format.
+@end defmac
+
+@defmac DBX_NO_XREFS
+Define this macro if DBX on your system does not support the construct
+@samp{xs@var{tagname}}.  On some systems, this construct is used to
+describe a forward reference to a structure named @var{tagname}.
+On other systems, this construct is not supported at all.
+@end defmac
+
+@defmac DBX_CONTIN_LENGTH
+A symbol name in DBX-format debugging information is normally
+continued (split into two separate @code{.stabs} directives) when it
+exceeds a certain length (by default, 80 characters).  On some
+operating systems, DBX requires this splitting; on others, splitting
+must not be done.  You can inhibit splitting by defining this macro
+with the value zero.  You can override the default splitting-length by
+defining this macro as an expression for the length you desire.
+@end defmac
+
+@defmac DBX_CONTIN_CHAR
+Normally continuation is indicated by adding a @samp{\} character to
+the end of a @code{.stabs} string when a continuation follows.  To use
+a different character instead, define this macro as a character
+constant for the character you want to use.  Do not define this macro
+if backslash is correct for your system.
+@end defmac
+
+@defmac DBX_STATIC_STAB_DATA_SECTION
+Define this macro if it is necessary to go to the data section before
+outputting the @samp{.stabs} pseudo-op for a non-global static
+variable.
+@end defmac
+
+@defmac DBX_TYPE_DECL_STABS_CODE
+The value to use in the ``code'' field of the @code{.stabs} directive
+for a typedef.  The default is @code{N_LSYM}.
+@end defmac
+
+@defmac DBX_STATIC_CONST_VAR_CODE
+The value to use in the ``code'' field of the @code{.stabs} directive
+for a static variable located in the text section.  DBX format does not
+provide any ``right'' way to do this.  The default is @code{N_FUN}.
+@end defmac
+
+@defmac DBX_REGPARM_STABS_CODE
+The value to use in the ``code'' field of the @code{.stabs} directive
+for a parameter passed in registers.  DBX format does not provide any
+``right'' way to do this.  The default is @code{N_RSYM}.
+@end defmac
+
+@defmac DBX_REGPARM_STABS_LETTER
+The letter to use in DBX symbol data to identify a symbol as a parameter
+passed in registers.  DBX format does not customarily provide any way to
+do this.  The default is @code{'P'}.
+@end defmac
+
+@defmac DBX_FUNCTION_FIRST
+Define this macro if the DBX information for a function and its
+arguments should precede the assembler code for the function.  Normally,
+in DBX format, the debugging information entirely follows the assembler
+code.
+@end defmac
+
+@defmac DBX_BLOCKS_FUNCTION_RELATIVE
+Define this macro, with value 1, if the value of a symbol describing
+the scope of a block (@code{N_LBRAC} or @code{N_RBRAC}) should be
+relative to the start of the enclosing function.  Normally, GCC uses
+an absolute address.
+@end defmac
+
+@defmac DBX_LINES_FUNCTION_RELATIVE
+Define this macro, with value 1, if the value of a symbol indicating
+the current line number (@code{N_SLINE}) should be relative to the
+start of the enclosing function.  Normally, GCC uses an absolute address.
+@end defmac
+
+@defmac DBX_USE_BINCL
+Define this macro if GCC should generate @code{N_BINCL} and
+@code{N_EINCL} stabs for included header files, as on Sun systems.  This
+macro also directs GCC to output a type number as a pair of a file
+number and a type number within the file.  Normally, GCC does not
+generate @code{N_BINCL} or @code{N_EINCL} stabs, and it outputs a single
+number for a type number.
+@end defmac
+
+@node DBX Hooks
+@subsection Open-Ended Hooks for DBX Format
+
+@c prevent bad page break with this line
+These are hooks for DBX format.
+
+@defmac DBX_OUTPUT_LBRAC (@var{stream}, @var{name})
+Define this macro to say how to output to @var{stream} the debugging
+information for the start of a scope level for variable names.  The
+argument @var{name} is the name of an assembler symbol (for use with
+@code{assemble_name}) whose value is the address where the scope begins.
+@end defmac
+
+@defmac DBX_OUTPUT_RBRAC (@var{stream}, @var{name})
+Like @code{DBX_OUTPUT_LBRAC}, but for the end of a scope level.
+@end defmac
+
+@defmac DBX_OUTPUT_NFUN (@var{stream}, @var{lscope_label}, @var{decl})
+Define this macro if the target machine requires special handling to
+output an @code{N_FUN} entry for the function @var{decl}.
+@end defmac
+
+@defmac DBX_OUTPUT_SOURCE_LINE (@var{stream}, @var{line}, @var{counter})
+A C statement to output DBX debugging information before code for line
+number @var{line} of the current source file to the stdio stream
+@var{stream}.  @var{counter} is the number of time the macro was
+invoked, including the current invocation; it is intended to generate
+unique labels in the assembly output.
+
+This macro should not be defined if the default output is correct, or
+if it can be made correct by defining @code{DBX_LINES_FUNCTION_RELATIVE}.
+@end defmac
+
+@defmac NO_DBX_FUNCTION_END
+Some stabs encapsulation formats (in particular ECOFF), cannot handle the
+@code{.stabs "",N_FUN,,0,0,Lscope-function-1} gdb dbx extension construct.
+On those machines, define this macro to turn this feature off without
+disturbing the rest of the gdb extensions.
+@end defmac
+
+@defmac NO_DBX_BNSYM_ENSYM
+Some assemblers cannot handle the @code{.stabd BNSYM/ENSYM,0,0} gdb dbx
+extension construct.  On those machines, define this macro to turn this
+feature off without disturbing the rest of the gdb extensions.
+@end defmac
+
+@node File Names and DBX
+@subsection File Names in DBX Format
+
+@c prevent bad page break with this line
+This describes file names in DBX format.
+
+@defmac DBX_OUTPUT_MAIN_SOURCE_FILENAME (@var{stream}, @var{name})
+A C statement to output DBX debugging information to the stdio stream
+@var{stream}, which indicates that file @var{name} is the main source
+file---the file specified as the input file for compilation.
+This macro is called only once, at the beginning of compilation.
+
+This macro need not be defined if the standard form of output
+for DBX debugging information is appropriate.
+
+It may be necessary to refer to a label equal to the beginning of the
+text section.  You can use @samp{assemble_name (stream, ltext_label_name)}
+to do so.  If you do this, you must also set the variable
+@var{used_ltext_label_name} to @code{true}.
+@end defmac
+
+@defmac NO_DBX_MAIN_SOURCE_DIRECTORY
+Define this macro, with value 1, if GCC should not emit an indication
+of the current directory for compilation and current source language at
+the beginning of the file.
+@end defmac
+
+@defmac NO_DBX_GCC_MARKER
+Define this macro, with value 1, if GCC should not emit an indication
+that this object file was compiled by GCC@.  The default is to emit
+an @code{N_OPT} stab at the beginning of every source file, with
+@samp{gcc2_compiled.} for the string and value 0.
+@end defmac
+
+@defmac DBX_OUTPUT_MAIN_SOURCE_FILE_END (@var{stream}, @var{name})
+A C statement to output DBX debugging information at the end of
+compilation of the main source file @var{name}.  Output should be
+written to the stdio stream @var{stream}.
+
+If you don't define this macro, nothing special is output at the end
+of compilation, which is correct for most machines.
+@end defmac
+
+@defmac DBX_OUTPUT_NULL_N_SO_AT_MAIN_SOURCE_FILE_END
+Define this macro @emph{instead of} defining
+@code{DBX_OUTPUT_MAIN_SOURCE_FILE_END}, if what needs to be output at
+the end of compilation is an @code{N_SO} stab with an empty string,
+whose value is the highest absolute text address in the file.
+@end defmac
+
+@need 2000
+@node SDB and DWARF
+@subsection Macros for SDB and DWARF Output
+
+@c prevent bad page break with this line
+Here are macros for SDB and DWARF output.
+
+@defmac SDB_DEBUGGING_INFO
+Define this macro if GCC should produce COFF-style debugging output
+for SDB in response to the @option{-g} option.
+@end defmac
+
+@defmac DWARF2_DEBUGGING_INFO
+Define this macro if GCC should produce dwarf version 2 format
+debugging output in response to the @option{-g} option.
+
+@hook TARGET_DWARF_CALLING_CONVENTION
+Define this to enable the dwarf attribute @code{DW_AT_calling_convention} to
+be emitted for each function.  Instead of an integer return the enum
+value for the @code{DW_CC_} tag.
+@end deftypefn
+
+To support optional call frame debugging information, you must also
+define @code{INCOMING_RETURN_ADDR_RTX} and either set
+@code{RTX_FRAME_RELATED_P} on the prologue insns if you use RTL for the
+prologue, or call @code{dwarf2out_def_cfa} and @code{dwarf2out_reg_save}
+as appropriate from @code{TARGET_ASM_FUNCTION_PROLOGUE} if you don't.
+@end defmac
+
+@defmac DWARF2_FRAME_INFO
+Define this macro to a nonzero value if GCC should always output
+Dwarf 2 frame information.  If @code{TARGET_EXCEPT_UNWIND_INFO}
+(@pxref{Exception Region Output}) returns @code{UI_DWARF2}, and
+exceptions are enabled, GCC will output this information not matter
+how you define @code{DWARF2_FRAME_INFO}.
+@end defmac
+
+@hook TARGET_DEBUG_UNWIND_INFO
+This hook defines the mechanism that will be used for describing frame
+unwind information to the debugger.  Normally the hook will return
+@code{UI_DWARF2} if DWARF 2 debug information is enabled, and
+return @code{UI_NONE} otherwise.
+
+A target may return @code{UI_DWARF2} even when DWARF 2 debug information
+is disabled in order to always output DWARF 2 frame information.
+
+A target may return @code{UI_TARGET} if it has ABI specified unwind tables.
+This will suppress generation of the normal debug frame unwind information.
+@end deftypefn
+
+@defmac DWARF2_ASM_LINE_DEBUG_INFO
+Define this macro to be a nonzero value if the assembler can generate Dwarf 2
+line debug info sections.  This will result in much more compact line number
+tables, and hence is desirable if it works.
+@end defmac
+
+@hook TARGET_WANT_DEBUG_PUB_SECTIONS
+
+@hook TARGET_DELAY_SCHED2
+
+@hook TARGET_DELAY_VARTRACK
+
+@defmac ASM_OUTPUT_DWARF_DELTA (@var{stream}, @var{size}, @var{label1}, @var{label2})
+A C statement to issue assembly directives that create a difference
+@var{lab1} minus @var{lab2}, using an integer of the given @var{size}.
+@end defmac
+
+@defmac ASM_OUTPUT_DWARF_VMS_DELTA (@var{stream}, @var{size}, @var{label1}, @var{label2})
+A C statement to issue assembly directives that create a difference
+between the two given labels in system defined units, e.g. instruction
+slots on IA64 VMS, using an integer of the given size.
+@end defmac
+
+@defmac ASM_OUTPUT_DWARF_OFFSET (@var{stream}, @var{size}, @var{label}, @var{section})
+A C statement to issue assembly directives that create a
+section-relative reference to the given @var{label}, using an integer of the
+given @var{size}.  The label is known to be defined in the given @var{section}.
+@end defmac
+
+@defmac ASM_OUTPUT_DWARF_PCREL (@var{stream}, @var{size}, @var{label})
+A C statement to issue assembly directives that create a self-relative
+reference to the given @var{label}, using an integer of the given @var{size}.
+@end defmac
+
+@defmac ASM_OUTPUT_DWARF_TABLE_REF (@var{label})
+A C statement to issue assembly directives that create a reference to
+the DWARF table identifier @var{label} from the current section.  This
+is used on some systems to avoid garbage collecting a DWARF table which
+is referenced by a function.
+@end defmac
+
+@hook TARGET_ASM_OUTPUT_DWARF_DTPREL
+If defined, this target hook is a function which outputs a DTP-relative
+reference to the given TLS symbol of the specified size.
+@end deftypefn
+
+@defmac PUT_SDB_@dots{}
+Define these macros to override the assembler syntax for the special
+SDB assembler directives.  See @file{sdbout.c} for a list of these
+macros and their arguments.  If the standard syntax is used, you need
+not define them yourself.
+@end defmac
+
+@defmac SDB_DELIM
+Some assemblers do not support a semicolon as a delimiter, even between
+SDB assembler directives.  In that case, define this macro to be the
+delimiter to use (usually @samp{\n}).  It is not necessary to define
+a new set of @code{PUT_SDB_@var{op}} macros if this is the only change
+required.
+@end defmac
+
+@defmac SDB_ALLOW_UNKNOWN_REFERENCES
+Define this macro to allow references to unknown structure,
+union, or enumeration tags to be emitted.  Standard COFF does not
+allow handling of unknown references, MIPS ECOFF has support for
+it.
+@end defmac
+
+@defmac SDB_ALLOW_FORWARD_REFERENCES
+Define this macro to allow references to structure, union, or
+enumeration tags that have not yet been seen to be handled.  Some
+assemblers choke if forward tags are used, while some require it.
+@end defmac
+
+@defmac SDB_OUTPUT_SOURCE_LINE (@var{stream}, @var{line})
+A C statement to output SDB debugging information before code for line
+number @var{line} of the current source file to the stdio stream
+@var{stream}.  The default is to emit an @code{.ln} directive.
+@end defmac
+
+@need 2000
+@node VMS Debug
+@subsection Macros for VMS Debug Format
+
+@c prevent bad page break with this line
+Here are macros for VMS debug format.
+
+@defmac VMS_DEBUGGING_INFO
+Define this macro if GCC should produce debugging output for VMS
+in response to the @option{-g} option.  The default behavior for VMS
+is to generate minimal debug info for a traceback in the absence of
+@option{-g} unless explicitly overridden with @option{-g0}.  This
+behavior is controlled by @code{TARGET_OPTION_OPTIMIZATION} and
+@code{TARGET_OPTION_OVERRIDE}.
+@end defmac
+
+@node Floating Point
+@section Cross Compilation and Floating Point
+@cindex cross compilation and floating point
+@cindex floating point and cross compilation
+
+While all modern machines use twos-complement representation for integers,
+there are a variety of representations for floating point numbers.  This
+means that in a cross-compiler the representation of floating point numbers
+in the compiled program may be different from that used in the machine
+doing the compilation.
+
+Because different representation systems may offer different amounts of
+range and precision, all floating point constants must be represented in
+the target machine's format.  Therefore, the cross compiler cannot
+safely use the host machine's floating point arithmetic; it must emulate
+the target's arithmetic.  To ensure consistency, GCC always uses
+emulation to work with floating point values, even when the host and
+target floating point formats are identical.
+
+The following macros are provided by @file{real.h} for the compiler to
+use.  All parts of the compiler which generate or optimize
+floating-point calculations must use these macros.  They may evaluate
+their operands more than once, so operands must not have side effects.
+
+@defmac REAL_VALUE_TYPE
+The C data type to be used to hold a floating point value in the target
+machine's format.  Typically this is a @code{struct} containing an
+array of @code{HOST_WIDE_INT}, but all code should treat it as an opaque
+quantity.
+@end defmac
+
+@deftypefn Macro int REAL_VALUES_EQUAL (REAL_VALUE_TYPE @var{x}, REAL_VALUE_TYPE @var{y})
+Compares for equality the two values, @var{x} and @var{y}.  If the target
+floating point format supports negative zeroes and/or NaNs,
+@samp{REAL_VALUES_EQUAL (-0.0, 0.0)} is true, and
+@samp{REAL_VALUES_EQUAL (NaN, NaN)} is false.
+@end deftypefn
+
+@deftypefn Macro int REAL_VALUES_LESS (REAL_VALUE_TYPE @var{x}, REAL_VALUE_TYPE @var{y})
+Tests whether @var{x} is less than @var{y}.
+@end deftypefn
+
+@deftypefn Macro HOST_WIDE_INT REAL_VALUE_FIX (REAL_VALUE_TYPE @var{x})
+Truncates @var{x} to a signed integer, rounding toward zero.
+@end deftypefn
+
+@deftypefn Macro {unsigned HOST_WIDE_INT} REAL_VALUE_UNSIGNED_FIX (REAL_VALUE_TYPE @var{x})
+Truncates @var{x} to an unsigned integer, rounding toward zero.  If
+@var{x} is negative, returns zero.
+@end deftypefn
+
+@deftypefn Macro REAL_VALUE_TYPE REAL_VALUE_ATOF (const char *@var{string}, enum machine_mode @var{mode})
+Converts @var{string} into a floating point number in the target machine's
+representation for mode @var{mode}.  This routine can handle both
+decimal and hexadecimal floating point constants, using the syntax
+defined by the C language for both.
+@end deftypefn
+
+@deftypefn Macro int REAL_VALUE_NEGATIVE (REAL_VALUE_TYPE @var{x})
+Returns 1 if @var{x} is negative (including negative zero), 0 otherwise.
+@end deftypefn
+
+@deftypefn Macro int REAL_VALUE_ISINF (REAL_VALUE_TYPE @var{x})
+Determines whether @var{x} represents infinity (positive or negative).
+@end deftypefn
+
+@deftypefn Macro int REAL_VALUE_ISNAN (REAL_VALUE_TYPE @var{x})
+Determines whether @var{x} represents a ``NaN'' (not-a-number).
+@end deftypefn
+
+@deftypefn Macro void REAL_ARITHMETIC (REAL_VALUE_TYPE @var{output}, enum tree_code @var{code}, REAL_VALUE_TYPE @var{x}, REAL_VALUE_TYPE @var{y})
+Calculates an arithmetic operation on the two floating point values
+@var{x} and @var{y}, storing the result in @var{output} (which must be a
+variable).
+
+The operation to be performed is specified by @var{code}.  Only the
+following codes are supported: @code{PLUS_EXPR}, @code{MINUS_EXPR},
+@code{MULT_EXPR}, @code{RDIV_EXPR}, @code{MAX_EXPR}, @code{MIN_EXPR}.
+
+If @code{REAL_ARITHMETIC} is asked to evaluate division by zero and the
+target's floating point format cannot represent infinity, it will call
+@code{abort}.  Callers should check for this situation first, using
+@code{MODE_HAS_INFINITIES}.  @xref{Storage Layout}.
+@end deftypefn
+
+@deftypefn Macro REAL_VALUE_TYPE REAL_VALUE_NEGATE (REAL_VALUE_TYPE @var{x})
+Returns the negative of the floating point value @var{x}.
+@end deftypefn
+
+@deftypefn Macro REAL_VALUE_TYPE REAL_VALUE_ABS (REAL_VALUE_TYPE @var{x})
+Returns the absolute value of @var{x}.
+@end deftypefn
+
+@deftypefn Macro REAL_VALUE_TYPE REAL_VALUE_TRUNCATE (REAL_VALUE_TYPE @var{mode}, enum machine_mode @var{x})
+Truncates the floating point value @var{x} to fit in @var{mode}.  The
+return value is still a full-size @code{REAL_VALUE_TYPE}, but it has an
+appropriate bit pattern to be output as a floating constant whose
+precision accords with mode @var{mode}.
+@end deftypefn
+
+@deftypefn Macro void REAL_VALUE_TO_INT (HOST_WIDE_INT @var{low}, HOST_WIDE_INT @var{high}, REAL_VALUE_TYPE @var{x})
+Converts a floating point value @var{x} into a double-precision integer
+which is then stored into @var{low} and @var{high}.  If the value is not
+integral, it is truncated.
+@end deftypefn
+
+@deftypefn Macro void REAL_VALUE_FROM_INT (REAL_VALUE_TYPE @var{x}, HOST_WIDE_INT @var{low}, HOST_WIDE_INT @var{high}, enum machine_mode @var{mode})
+Converts a double-precision integer found in @var{low} and @var{high},
+into a floating point value which is then stored into @var{x}.  The
+value is truncated to fit in mode @var{mode}.
+@end deftypefn
+
+@node Mode Switching
+@section Mode Switching Instructions
+@cindex mode switching
+The following macros control mode switching optimizations:
+
+@defmac OPTIMIZE_MODE_SWITCHING (@var{entity})
+Define this macro if the port needs extra instructions inserted for mode
+switching in an optimizing compilation.
+
+For an example, the SH4 can perform both single and double precision
+floating point operations, but to perform a single precision operation,
+the FPSCR PR bit has to be cleared, while for a double precision
+operation, this bit has to be set.  Changing the PR bit requires a general
+purpose register as a scratch register, hence these FPSCR sets have to
+be inserted before reload, i.e.@: you can't put this into instruction emitting
+or @code{TARGET_MACHINE_DEPENDENT_REORG}.
+
+You can have multiple entities that are mode-switched, and select at run time
+which entities actually need it.  @code{OPTIMIZE_MODE_SWITCHING} should
+return nonzero for any @var{entity} that needs mode-switching.
+If you define this macro, you also have to define
+@code{NUM_MODES_FOR_MODE_SWITCHING}, @code{MODE_NEEDED},
+@code{MODE_PRIORITY_TO_MODE} and @code{EMIT_MODE_SET}.
+@code{MODE_AFTER}, @code{MODE_ENTRY}, and @code{MODE_EXIT}
+are optional.
+@end defmac
+
+@defmac NUM_MODES_FOR_MODE_SWITCHING
+If you define @code{OPTIMIZE_MODE_SWITCHING}, you have to define this as
+initializer for an array of integers.  Each initializer element
+N refers to an entity that needs mode switching, and specifies the number
+of different modes that might need to be set for this entity.
+The position of the initializer in the initializer---starting counting at
+zero---determines the integer that is used to refer to the mode-switched
+entity in question.
+In macros that take mode arguments / yield a mode result, modes are
+represented as numbers 0 @dots{} N @minus{} 1.  N is used to specify that no mode
+switch is needed / supplied.
+@end defmac
+
+@defmac MODE_NEEDED (@var{entity}, @var{insn})
+@var{entity} is an integer specifying a mode-switched entity.  If
+@code{OPTIMIZE_MODE_SWITCHING} is defined, you must define this macro to
+return an integer value not larger than the corresponding element in
+@code{NUM_MODES_FOR_MODE_SWITCHING}, to denote the mode that @var{entity} must
+be switched into prior to the execution of @var{insn}.
+@end defmac
+
+@defmac MODE_AFTER (@var{mode}, @var{insn})
+If this macro is defined, it is evaluated for every @var{insn} during
+mode switching.  It determines the mode that an insn results in (if
+different from the incoming mode).
+@end defmac
+
+@defmac MODE_ENTRY (@var{entity})
+If this macro is defined, it is evaluated for every @var{entity} that needs
+mode switching.  It should evaluate to an integer, which is a mode that
+@var{entity} is assumed to be switched to at function entry.  If @code{MODE_ENTRY}
+is defined then @code{MODE_EXIT} must be defined.
+@end defmac
+
+@defmac MODE_EXIT (@var{entity})
+If this macro is defined, it is evaluated for every @var{entity} that needs
+mode switching.  It should evaluate to an integer, which is a mode that
+@var{entity} is assumed to be switched to at function exit.  If @code{MODE_EXIT}
+is defined then @code{MODE_ENTRY} must be defined.
+@end defmac
+
+@defmac MODE_PRIORITY_TO_MODE (@var{entity}, @var{n})
+This macro specifies the order in which modes for @var{entity} are processed.
+0 is the highest priority, @code{NUM_MODES_FOR_MODE_SWITCHING[@var{entity}] - 1} the
+lowest.  The value of the macro should be an integer designating a mode
+for @var{entity}.  For any fixed @var{entity}, @code{mode_priority_to_mode}
+(@var{entity}, @var{n}) shall be a bijection in 0 @dots{}
+@code{num_modes_for_mode_switching[@var{entity}] - 1}.
+@end defmac
+
+@defmac EMIT_MODE_SET (@var{entity}, @var{mode}, @var{hard_regs_live})
+Generate one or more insns to set @var{entity} to @var{mode}.
+@var{hard_reg_live} is the set of hard registers live at the point where
+the insn(s) are to be inserted.
+@end defmac
+
+@node Target Attributes
+@section Defining target-specific uses of @code{__attribute__}
+@cindex target attributes
+@cindex machine attributes
+@cindex attributes, target-specific
+
+Target-specific attributes may be defined for functions, data and types.
+These are described using the following target hooks; they also need to
+be documented in @file{extend.texi}.
+
+@hook TARGET_ATTRIBUTE_TABLE
+If defined, this target hook points to an array of @samp{struct
+attribute_spec} (defined in @file{tree.h}) specifying the machine
+specific attributes for this target and some of the restrictions on the
+entities to which these attributes are applied and the arguments they
+take.
+@end deftypevr
+
+@hook TARGET_ATTRIBUTE_TAKES_IDENTIFIER_P
+If defined, this target hook is a function which returns true if the
+machine-specific attribute named @var{name} expects an identifier
+given as its first argument to be passed on as a plain identifier, not
+subjected to name lookup.  If this is not defined, the default is
+false for all machine-specific attributes.
+@end deftypefn
+
+@hook TARGET_COMP_TYPE_ATTRIBUTES
+If defined, this target hook is a function which returns zero if the attributes on
+@var{type1} and @var{type2} are incompatible, one if they are compatible,
+and two if they are nearly compatible (which causes a warning to be
+generated).  If this is not defined, machine-specific attributes are
+supposed always to be compatible.
+@end deftypefn
+
+@hook TARGET_SET_DEFAULT_TYPE_ATTRIBUTES
+If defined, this target hook is a function which assigns default attributes to
+the newly defined @var{type}.
+@end deftypefn
+
+@hook TARGET_MERGE_TYPE_ATTRIBUTES
+Define this target hook if the merging of type attributes needs special
+handling.  If defined, the result is a list of the combined
+@code{TYPE_ATTRIBUTES} of @var{type1} and @var{type2}.  It is assumed
+that @code{comptypes} has already been called and returned 1.  This
+function may call @code{merge_attributes} to handle machine-independent
+merging.
+@end deftypefn
+
+@hook TARGET_MERGE_DECL_ATTRIBUTES
+Define this target hook if the merging of decl attributes needs special
+handling.  If defined, the result is a list of the combined
+@code{DECL_ATTRIBUTES} of @var{olddecl} and @var{newdecl}.
+@var{newdecl} is a duplicate declaration of @var{olddecl}.  Examples of
+when this is needed are when one attribute overrides another, or when an
+attribute is nullified by a subsequent definition.  This function may
+call @code{merge_attributes} to handle machine-independent merging.
+
+@findex TARGET_DLLIMPORT_DECL_ATTRIBUTES
+If the only target-specific handling you require is @samp{dllimport}
+for Microsoft Windows targets, you should define the macro
+@code{TARGET_DLLIMPORT_DECL_ATTRIBUTES} to @code{1}.  The compiler
+will then define a function called
+@code{merge_dllimport_decl_attributes} which can then be defined as
+the expansion of @code{TARGET_MERGE_DECL_ATTRIBUTES}.  You can also
+add @code{handle_dll_attribute} in the attribute table for your port
+to perform initial processing of the @samp{dllimport} and
+@samp{dllexport} attributes.  This is done in @file{i386/cygwin.h} and
+@file{i386/i386.c}, for example.
+@end deftypefn
+
+@hook TARGET_VALID_DLLIMPORT_ATTRIBUTE_P
+
+@defmac TARGET_DECLSPEC
+Define this macro to a nonzero value if you want to treat
+@code{__declspec(X)} as equivalent to @code{__attribute((X))}.  By
+default, this behavior is enabled only for targets that define
+@code{TARGET_DLLIMPORT_DECL_ATTRIBUTES}.  The current implementation
+of @code{__declspec} is via a built-in macro, but you should not rely
+on this implementation detail.
+@end defmac
+
+@hook TARGET_INSERT_ATTRIBUTES
+Define this target hook if you want to be able to add attributes to a decl
+when it is being created.  This is normally useful for back ends which
+wish to implement a pragma by using the attributes which correspond to
+the pragma's effect.  The @var{node} argument is the decl which is being
+created.  The @var{attr_ptr} argument is a pointer to the attribute list
+for this decl.  The list itself should not be modified, since it may be
+shared with other decls, but attributes may be chained on the head of
+the list and @code{*@var{attr_ptr}} modified to point to the new
+attributes, or a copy of the list may be made if further changes are
+needed.
+@end deftypefn
+
+@hook TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P
+@cindex inlining
+This target hook returns @code{true} if it is ok to inline @var{fndecl}
+into the current function, despite its having target-specific
+attributes, @code{false} otherwise.  By default, if a function has a
+target specific attribute attached to it, it will not be inlined.
+@end deftypefn
+
+@hook TARGET_OPTION_VALID_ATTRIBUTE_P
+This hook is called to parse the @code{attribute(option("..."))}, and
+it allows the function to set different target machine compile time
+options for the current function that might be different than the
+options specified on the command line.  The hook should return
+@code{true} if the options are valid.
+
+The hook should set the @var{DECL_FUNCTION_SPECIFIC_TARGET} field in
+the function declaration to hold a pointer to a target specific
+@var{struct cl_target_option} structure.
+@end deftypefn
+
+@hook TARGET_OPTION_SAVE
+This hook is called to save any additional target specific information
+in the @var{struct cl_target_option} structure for function specific
+options.
+@xref{Option file format}.
+@end deftypefn
+
+@hook TARGET_OPTION_RESTORE
+This hook is called to restore any additional target specific
+information in the @var{struct cl_target_option} structure for
+function specific options.
+@end deftypefn
+
+@hook TARGET_OPTION_PRINT
+This hook is called to print any additional target specific
+information in the @var{struct cl_target_option} structure for
+function specific options.
+@end deftypefn
+
+@hook TARGET_OPTION_PRAGMA_PARSE
+This target hook parses the options for @code{#pragma GCC option} to
+set the machine specific options for functions that occur later in the
+input stream.  The options should be the same as handled by the
+@code{TARGET_OPTION_VALID_ATTRIBUTE_P} hook.
+@end deftypefn
+
+@hook TARGET_OPTION_OVERRIDE
+Sometimes certain combinations of command options do not make sense on
+a particular target machine.  You can override the hook
+@code{TARGET_OPTION_OVERRIDE} to take account of this.  This hooks is called
+once just after all the command options have been parsed.
+
+Don't use this hook to turn on various extra optimizations for
+@option{-O}.  That is what @code{TARGET_OPTION_OPTIMIZATION} is for.
+
+If you need to do something whenever the optimization level is
+changed via the optimize attribute or pragma, see
+@code{TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE}
+@end deftypefn
+
+@hook TARGET_CAN_INLINE_P
+This target hook returns @code{false} if the @var{caller} function
+cannot inline @var{callee}, based on target specific information.  By
+default, inlining is not allowed if the callee function has function
+specific target options and the caller does not use the same options.
+@end deftypefn
+
+@node Emulated TLS
+@section Emulating TLS
+@cindex Emulated TLS
+
+For targets whose psABI does not provide Thread Local Storage via
+specific relocations and instruction sequences, an emulation layer is
+used.  A set of target hooks allows this emulation layer to be
+configured for the requirements of a particular target.  For instance
+the psABI may in fact specify TLS support in terms of an emulation
+layer.
+
+The emulation layer works by creating a control object for every TLS
+object.  To access the TLS object, a lookup function is provided
+which, when given the address of the control object, will return the
+address of the current thread's instance of the TLS object.
+
+@hook TARGET_EMUTLS_GET_ADDRESS
+Contains the name of the helper function that uses a TLS control
+object to locate a TLS instance.  The default causes libgcc's
+emulated TLS helper function to be used.
+@end deftypevr
+
+@hook TARGET_EMUTLS_REGISTER_COMMON
+Contains the name of the helper function that should be used at
+program startup to register TLS objects that are implicitly
+initialized to zero.  If this is @code{NULL}, all TLS objects will
+have explicit initializers.  The default causes libgcc's emulated TLS
+registration function to be used.
+@end deftypevr
+
+@hook TARGET_EMUTLS_VAR_SECTION
+Contains the name of the section in which TLS control variables should
+be placed.  The default of @code{NULL} allows these to be placed in
+any section.
+@end deftypevr
+
+@hook TARGET_EMUTLS_TMPL_SECTION
+Contains the name of the section in which TLS initializers should be
+placed.  The default of @code{NULL} allows these to be placed in any
+section.
+@end deftypevr
+
+@hook TARGET_EMUTLS_VAR_PREFIX
+Contains the prefix to be prepended to TLS control variable names.
+The default of @code{NULL} uses a target-specific prefix.
+@end deftypevr
+
+@hook TARGET_EMUTLS_TMPL_PREFIX
+Contains the prefix to be prepended to TLS initializer objects.  The
+default of @code{NULL} uses a target-specific prefix.
+@end deftypevr
+
+@hook TARGET_EMUTLS_VAR_FIELDS
+Specifies a function that generates the FIELD_DECLs for a TLS control
+object type.  @var{type} is the RECORD_TYPE the fields are for and
+@var{name} should be filled with the structure tag, if the default of
+@code{__emutls_object} is unsuitable.  The default creates a type suitable
+for libgcc's emulated TLS function.
+@end deftypefn
+
+@hook TARGET_EMUTLS_VAR_INIT
+Specifies a function that generates the CONSTRUCTOR to initialize a
+TLS control object.  @var{var} is the TLS control object, @var{decl}
+is the TLS object and @var{tmpl_addr} is the address of the
+initializer.  The default initializes libgcc's emulated TLS control object.
+@end deftypefn
+
+@hook TARGET_EMUTLS_VAR_ALIGN_FIXED
+Specifies whether the alignment of TLS control variable objects is
+fixed and should not be increased as some backends may do to optimize
+single objects.  The default is false.
+@end deftypevr
+
+@hook TARGET_EMUTLS_DEBUG_FORM_TLS_ADDRESS
+Specifies whether a DWARF @code{DW_OP_form_tls_address} location descriptor
+may be used to describe emulated TLS control objects.
+@end deftypevr
+
+@node MIPS Coprocessors
+@section Defining coprocessor specifics for MIPS targets.
+@cindex MIPS coprocessor-definition macros
+
+The MIPS specification allows MIPS implementations to have as many as 4
+coprocessors, each with as many as 32 private registers.  GCC supports
+accessing these registers and transferring values between the registers
+and memory using asm-ized variables.  For example:
+
+@smallexample
+  register unsigned int cp0count asm ("c0r1");
+  unsigned int d;
+
+  d = cp0count + 3;
+@end smallexample
+
+(``c0r1'' is the default name of register 1 in coprocessor 0; alternate
+names may be added as described below, or the default names may be
+overridden entirely in @code{SUBTARGET_CONDITIONAL_REGISTER_USAGE}.)
+
+Coprocessor registers are assumed to be epilogue-used; sets to them will
+be preserved even if it does not appear that the register is used again
+later in the function.
+
+Another note: according to the MIPS spec, coprocessor 1 (if present) is
+the FPU@.  One accesses COP1 registers through standard mips
+floating-point support; they are not included in this mechanism.
+
+There is one macro used in defining the MIPS coprocessor interface which
+you may want to override in subtargets; it is described below.
+
+@defmac ALL_COP_ADDITIONAL_REGISTER_NAMES
+A comma-separated list (with leading comma) of pairs describing the
+alternate names of coprocessor registers.  The format of each entry should be
+@smallexample
+@{ @var{alternatename}, @var{register_number}@}
+@end smallexample
+Default: empty.
+@end defmac
+
+@node PCH Target
+@section Parameters for Precompiled Header Validity Checking
+@cindex parameters, precompiled headers
+
+@hook TARGET_GET_PCH_VALIDITY
+This hook returns a pointer to the data needed by
+@code{TARGET_PCH_VALID_P} and sets
+@samp{*@var{sz}} to the size of the data in bytes.
+@end deftypefn
+
+@hook TARGET_PCH_VALID_P
+This hook checks whether the options used to create a PCH file are
+compatible with the current settings.  It returns @code{NULL}
+if so and a suitable error message if not.  Error messages will
+be presented to the user and must be localized using @samp{_(@var{msg})}.
+
+@var{data} is the data that was returned by @code{TARGET_GET_PCH_VALIDITY}
+when the PCH file was created and @var{sz} is the size of that data in bytes.
+It's safe to assume that the data was created by the same version of the
+compiler, so no format checking is needed.
+
+The default definition of @code{default_pch_valid_p} should be
+suitable for most targets.
+@end deftypefn
+
+@hook TARGET_CHECK_PCH_TARGET_FLAGS
+If this hook is nonnull, the default implementation of
+@code{TARGET_PCH_VALID_P} will use it to check for compatible values
+of @code{target_flags}.  @var{pch_flags} specifies the value that
+@code{target_flags} had when the PCH file was created.  The return
+value is the same as for @code{TARGET_PCH_VALID_P}.
+@end deftypefn
+
+@node C++ ABI
+@section C++ ABI parameters
+@cindex parameters, c++ abi
+
+@hook TARGET_CXX_GUARD_TYPE
+Define this hook to override the integer type used for guard variables.
+These are used to implement one-time construction of static objects.  The
+default is long_long_integer_type_node.
+@end deftypefn
+
+@hook TARGET_CXX_GUARD_MASK_BIT
+This hook determines how guard variables are used.  It should return
+@code{false} (the default) if the first byte should be used.  A return value of
+@code{true} indicates that only the least significant bit should be used.
+@end deftypefn
+
+@hook TARGET_CXX_GET_COOKIE_SIZE
+This hook returns the size of the cookie to use when allocating an array
+whose elements have the indicated @var{type}.  Assumes that it is already
+known that a cookie is needed.  The default is
+@code{max(sizeof (size_t), alignof(type))}, as defined in section 2.7 of the
+IA64/Generic C++ ABI@.
+@end deftypefn
+
+@hook TARGET_CXX_COOKIE_HAS_SIZE
+This hook should return @code{true} if the element size should be stored in
+array cookies.  The default is to return @code{false}.
+@end deftypefn
+
+@hook TARGET_CXX_IMPORT_EXPORT_CLASS
+If defined by a backend this hook allows the decision made to export
+class @var{type} to be overruled.  Upon entry @var{import_export}
+will contain 1 if the class is going to be exported, @minus{}1 if it is going
+to be imported and 0 otherwise.  This function should return the
+modified value and perform any other actions necessary to support the
+backend's targeted operating system.
+@end deftypefn
+
+@hook TARGET_CXX_CDTOR_RETURNS_THIS
+This hook should return @code{true} if constructors and destructors return
+the address of the object created/destroyed.  The default is to return
+@code{false}.
+@end deftypefn
+
+@hook TARGET_CXX_KEY_METHOD_MAY_BE_INLINE
+This hook returns true if the key method for a class (i.e., the method
+which, if defined in the current translation unit, causes the virtual
+table to be emitted) may be an inline function.  Under the standard
+Itanium C++ ABI the key method may be an inline function so long as
+the function is not declared inline in the class definition.  Under
+some variants of the ABI, an inline function can never be the key
+method.  The default is to return @code{true}.
+@end deftypefn
+
+@hook TARGET_CXX_DETERMINE_CLASS_DATA_VISIBILITY
+
+@hook TARGET_CXX_CLASS_DATA_ALWAYS_COMDAT
+This hook returns true (the default) if virtual tables and other
+similar implicit class data objects are always COMDAT if they have
+external linkage.  If this hook returns false, then class data for
+classes whose virtual table will be emitted in only one translation
+unit will not be COMDAT.
+@end deftypefn
+
+@hook TARGET_CXX_LIBRARY_RTTI_COMDAT
+This hook returns true (the default) if the RTTI information for
+the basic types which is defined in the C++ runtime should always
+be COMDAT, false if it should not be COMDAT.
+@end deftypefn
+
+@hook TARGET_CXX_USE_AEABI_ATEXIT
+This hook returns true if @code{__aeabi_atexit} (as defined by the ARM EABI)
+should be used to register static destructors when @option{-fuse-cxa-atexit}
+is in effect.  The default is to return false to use @code{__cxa_atexit}.
+@end deftypefn
+
+@hook TARGET_CXX_USE_ATEXIT_FOR_CXA_ATEXIT
+This hook returns true if the target @code{atexit} function can be used
+in the same manner as @code{__cxa_atexit} to register C++ static
+destructors. This requires that @code{atexit}-registered functions in
+shared libraries are run in the correct order when the libraries are
+unloaded. The default is to return false.
+@end deftypefn
+
+@hook TARGET_CXX_ADJUST_CLASS_AT_DEFINITION
+
+@node Named Address Spaces
+@section Adding support for named address spaces
+@cindex named address spaces
+
+The draft technical report of the ISO/IEC JTC1 S22 WG14 N1275
+standards committee, @cite{Programming Languages - C - Extensions to
+support embedded processors}, specifies a syntax for embedded
+processors to specify alternate address spaces.  You can configure a
+GCC port to support section 5.1 of the draft report to add support for
+address spaces other than the default address space.  These address
+spaces are new keywords that are similar to the @code{volatile} and
+@code{const} type attributes.
+
+Pointers to named address spaces can have a different size than
+pointers to the generic address space.
+
+For example, the SPU port uses the @code{__ea} address space to refer
+to memory in the host processor, rather than memory local to the SPU
+processor.  Access to memory in the @code{__ea} address space involves
+issuing DMA operations to move data between the host processor and the
+local processor memory address space.  Pointers in the @code{__ea}
+address space are either 32 bits or 64 bits based on the
+@option{-mea32} or @option{-mea64} switches (native SPU pointers are
+always 32 bits).
+
+Internally, address spaces are represented as a small integer in the
+range 0 to 15 with address space 0 being reserved for the generic
+address space.
+
+To register a named address space qualifier keyword with the C front end,
+the target may call the @code{c_register_addr_space} routine.  For example,
+the SPU port uses the following to declare @code{__ea} as the keyword for
+named address space #1:
+@smallexample
+#define ADDR_SPACE_EA 1
+c_register_addr_space ("__ea", ADDR_SPACE_EA);
+@end smallexample
+
+@hook TARGET_ADDR_SPACE_POINTER_MODE
+Define this to return the machine mode to use for pointers to
+@var{address_space} if the target supports named address spaces.
+The default version of this hook returns @code{ptr_mode} for the
+generic address space only.
+@end deftypefn
+
+@hook TARGET_ADDR_SPACE_ADDRESS_MODE
+Define this to return the machine mode to use for addresses in
+@var{address_space} if the target supports named address spaces.
+The default version of this hook returns @code{Pmode} for the
+generic address space only.
+@end deftypefn
+
+@hook TARGET_ADDR_SPACE_VALID_POINTER_MODE
+Define this to return nonzero if the port can handle pointers
+with machine mode @var{mode} to address space @var{as}.  This target
+hook is the same as the @code{TARGET_VALID_POINTER_MODE} target hook,
+except that it includes explicit named address space support.  The default
+version of this hook returns true for the modes returned by either the
+@code{TARGET_ADDR_SPACE_POINTER_MODE} or @code{TARGET_ADDR_SPACE_ADDRESS_MODE}
+target hooks for the given address space.
+@end deftypefn
+
+@hook TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P
+Define this to return true if @var{exp} is a valid address for mode
+@var{mode} in the named address space @var{as}.  The @var{strict}
+parameter says whether strict addressing is in effect after reload has
+finished.  This target hook is the same as the
+@code{TARGET_LEGITIMATE_ADDRESS_P} target hook, except that it includes
+explicit named address space support.
+@end deftypefn
+
+@hook TARGET_ADDR_SPACE_LEGITIMIZE_ADDRESS
+Define this to modify an invalid address @var{x} to be a valid address
+with mode @var{mode} in the named address space @var{as}.  This target
+hook is the same as the @code{TARGET_LEGITIMIZE_ADDRESS} target hook,
+except that it includes explicit named address space support.
+@end deftypefn
+
+@hook TARGET_ADDR_SPACE_SUBSET_P
+Define this to return whether the @var{subset} named address space is
+contained within the @var{superset} named address space.  Pointers to
+a named address space that is a subset of another named address space
+will be converted automatically without a cast if used together in
+arithmetic operations.  Pointers to a superset address space can be
+converted to pointers to a subset address space via explicit casts.
+@end deftypefn
+
+@hook TARGET_ADDR_SPACE_CONVERT
+Define this to convert the pointer expression represented by the RTL
+@var{op} with type @var{from_type} that points to a named address
+space to a new pointer expression with type @var{to_type} that points
+to a different named address space.  When this hook it called, it is
+guaranteed that one of the two address spaces is a subset of the other,
+as determined by the @code{TARGET_ADDR_SPACE_SUBSET_P} target hook.
+@end deftypefn
+
+@node Misc
+@section Miscellaneous Parameters
+@cindex parameters, miscellaneous
+
+@c prevent bad page break with this line
+Here are several miscellaneous parameters.
+
+@defmac HAS_LONG_COND_BRANCH
+Define this boolean macro to indicate whether or not your architecture
+has conditional branches that can span all of memory.  It is used in
+conjunction with an optimization that partitions hot and cold basic
+blocks into separate sections of the executable.  If this macro is
+set to false, gcc will convert any conditional branches that attempt
+to cross between sections into unconditional branches or indirect jumps.
+@end defmac
+
+@defmac HAS_LONG_UNCOND_BRANCH
+Define this boolean macro to indicate whether or not your architecture
+has unconditional branches that can span all of memory.  It is used in
+conjunction with an optimization that partitions hot and cold basic
+blocks into separate sections of the executable.  If this macro is
+set to false, gcc will convert any unconditional branches that attempt
+to cross between sections into indirect jumps.
+@end defmac
+
+@defmac CASE_VECTOR_MODE
+An alias for a machine mode name.  This is the machine mode that
+elements of a jump-table should have.
+@end defmac
+
+@defmac CASE_VECTOR_SHORTEN_MODE (@var{min_offset}, @var{max_offset}, @var{body})
+Optional: return the preferred mode for an @code{addr_diff_vec}
+when the minimum and maximum offset are known.  If you define this,
+it enables extra code in branch shortening to deal with @code{addr_diff_vec}.
+To make this work, you also have to define @code{INSN_ALIGN} and
+make the alignment for @code{addr_diff_vec} explicit.
+The @var{body} argument is provided so that the offset_unsigned and scale
+flags can be updated.
+@end defmac
+
+@defmac CASE_VECTOR_PC_RELATIVE
+Define this macro to be a C expression to indicate when jump-tables
+should contain relative addresses.  You need not define this macro if
+jump-tables never contain relative addresses, or jump-tables should
+contain relative addresses only when @option{-fPIC} or @option{-fPIC}
+is in effect.
+@end defmac
+
+@hook TARGET_CASE_VALUES_THRESHOLD
+This function return the smallest number of different values for which it
+is best to use a jump-table instead of a tree of conditional branches.
+The default is four for machines with a @code{casesi} instruction and
+five otherwise.  This is best for most machines.
+@end deftypefn
+
+@defmac CASE_USE_BIT_TESTS
+Define this macro to be a C expression to indicate whether C switch
+statements may be implemented by a sequence of bit tests.  This is
+advantageous on processors that can efficiently implement left shift
+of 1 by the number of bits held in a register, but inappropriate on
+targets that would require a loop.  By default, this macro returns
+@code{true} if the target defines an @code{ashlsi3} pattern, and
+@code{false} otherwise.
+@end defmac
+
+@defmac WORD_REGISTER_OPERATIONS
+Define this macro if operations between registers with integral mode
+smaller than a word are always performed on the entire register.
+Most RISC machines have this property and most CISC machines do not.
+@end defmac
+
+@defmac LOAD_EXTEND_OP (@var{mem_mode})
+Define this macro to be a C expression indicating when insns that read
+memory in @var{mem_mode}, an integral mode narrower than a word, set the
+bits outside of @var{mem_mode} to be either the sign-extension or the
+zero-extension of the data read.  Return @code{SIGN_EXTEND} for values
+of @var{mem_mode} for which the
+insn sign-extends, @code{ZERO_EXTEND} for which it zero-extends, and
+@code{UNKNOWN} for other modes.
+
+This macro is not called with @var{mem_mode} non-integral or with a width
+greater than or equal to @code{BITS_PER_WORD}, so you may return any
+value in this case.  Do not define this macro if it would always return
+@code{UNKNOWN}.  On machines where this macro is defined, you will normally
+define it as the constant @code{SIGN_EXTEND} or @code{ZERO_EXTEND}.
+
+You may return a non-@code{UNKNOWN} value even if for some hard registers
+the sign extension is not performed, if for the @code{REGNO_REG_CLASS}
+of these hard registers @code{CANNOT_CHANGE_MODE_CLASS} returns nonzero
+when the @var{from} mode is @var{mem_mode} and the @var{to} mode is any
+integral mode larger than this but not larger than @code{word_mode}.
+
+You must return @code{UNKNOWN} if for some hard registers that allow this
+mode, @code{CANNOT_CHANGE_MODE_CLASS} says that they cannot change to
+@code{word_mode}, but that they can change to another integral mode that
+is larger then @var{mem_mode} but still smaller than @code{word_mode}.
+@end defmac
+
+@defmac SHORT_IMMEDIATES_SIGN_EXTEND
+Define this macro if loading short immediate values into registers sign
+extends.
+@end defmac
+
+@defmac FIXUNS_TRUNC_LIKE_FIX_TRUNC
+Define this macro if the same instructions that convert a floating
+point number to a signed fixed point number also convert validly to an
+unsigned one.
+@end defmac
+
+@hook TARGET_MIN_DIVISIONS_FOR_RECIP_MUL
+When @option{-ffast-math} is in effect, GCC tries to optimize
+divisions by the same divisor, by turning them into multiplications by
+the reciprocal.  This target hook specifies the minimum number of divisions
+that should be there for GCC to perform the optimization for a variable
+of mode @var{mode}.  The default implementation returns 3 if the machine
+has an instruction for the division, and 2 if it does not.
+@end deftypefn
+
+@defmac MOVE_MAX
+The maximum number of bytes that a single instruction can move quickly
+between memory and registers or between two memory locations.
+@end defmac
+
+@defmac MAX_MOVE_MAX
+The maximum number of bytes that a single instruction can move quickly
+between memory and registers or between two memory locations.  If this
+is undefined, the default is @code{MOVE_MAX}.  Otherwise, it is the
+constant value that is the largest value that @code{MOVE_MAX} can have
+at run-time.
+@end defmac
+
+@defmac SHIFT_COUNT_TRUNCATED
+A C expression that is nonzero if on this machine the number of bits
+actually used for the count of a shift operation is equal to the number
+of bits needed to represent the size of the object being shifted.  When
+this macro is nonzero, the compiler will assume that it is safe to omit
+a sign-extend, zero-extend, and certain bitwise `and' instructions that
+truncates the count of a shift operation.  On machines that have
+instructions that act on bit-fields at variable positions, which may
+include `bit test' instructions, a nonzero @code{SHIFT_COUNT_TRUNCATED}
+also enables deletion of truncations of the values that serve as
+arguments to bit-field instructions.
+
+If both types of instructions truncate the count (for shifts) and
+position (for bit-field operations), or if no variable-position bit-field
+instructions exist, you should define this macro.
+
+However, on some machines, such as the 80386 and the 680x0, truncation
+only applies to shift operations and not the (real or pretended)
+bit-field operations.  Define @code{SHIFT_COUNT_TRUNCATED} to be zero on
+such machines.  Instead, add patterns to the @file{md} file that include
+the implied truncation of the shift instructions.
+
+You need not define this macro if it would always have the value of zero.
+@end defmac
+
+@anchor{TARGET_SHIFT_TRUNCATION_MASK}
+@hook TARGET_SHIFT_TRUNCATION_MASK
+This function describes how the standard shift patterns for @var{mode}
+deal with shifts by negative amounts or by more than the width of the mode.
+@xref{shift patterns}.
+
+On many machines, the shift patterns will apply a mask @var{m} to the
+shift count, meaning that a fixed-width shift of @var{x} by @var{y} is
+equivalent to an arbitrary-width shift of @var{x} by @var{y & m}.  If
+this is true for mode @var{mode}, the function should return @var{m},
+otherwise it should return 0.  A return value of 0 indicates that no
+particular behavior is guaranteed.
+
+Note that, unlike @code{SHIFT_COUNT_TRUNCATED}, this function does
+@emph{not} apply to general shift rtxes; it applies only to instructions
+that are generated by the named shift patterns.
+
+The default implementation of this function returns
+@code{GET_MODE_BITSIZE (@var{mode}) - 1} if @code{SHIFT_COUNT_TRUNCATED}
+and 0 otherwise.  This definition is always safe, but if
+@code{SHIFT_COUNT_TRUNCATED} is false, and some shift patterns
+nevertheless truncate the shift count, you may get better code
+by overriding it.
+@end deftypefn
+
+@defmac TRULY_NOOP_TRUNCATION (@var{outprec}, @var{inprec})
+A C expression which is nonzero if on this machine it is safe to
+``convert'' an integer of @var{inprec} bits to one of @var{outprec}
+bits (where @var{outprec} is smaller than @var{inprec}) by merely
+operating on it as if it had only @var{outprec} bits.
+
+On many machines, this expression can be 1.
+
+@c rearranged this, removed the phrase "it is reported that".  this was
+@c to fix an overfull hbox.  --mew 10feb93
+When @code{TRULY_NOOP_TRUNCATION} returns 1 for a pair of sizes for
+modes for which @code{MODES_TIEABLE_P} is 0, suboptimal code can result.
+If this is the case, making @code{TRULY_NOOP_TRUNCATION} return 0 in
+such cases may improve things.
+@end defmac
+
+@hook TARGET_MODE_REP_EXTENDED
+The representation of an integral mode can be such that the values
+are always extended to a wider integral mode.  Return
+@code{SIGN_EXTEND} if values of @var{mode} are represented in
+sign-extended form to @var{rep_mode}.  Return @code{UNKNOWN}
+otherwise.  (Currently, none of the targets use zero-extended
+representation this way so unlike @code{LOAD_EXTEND_OP},
+@code{TARGET_MODE_REP_EXTENDED} is expected to return either
+@code{SIGN_EXTEND} or @code{UNKNOWN}.  Also no target extends
+@var{mode} to @var{rep_mode} so that @var{rep_mode} is not the next
+widest integral mode and currently we take advantage of this fact.)
+
+Similarly to @code{LOAD_EXTEND_OP} you may return a non-@code{UNKNOWN}
+value even if the extension is not performed on certain hard registers
+as long as for the @code{REGNO_REG_CLASS} of these hard registers
+@code{CANNOT_CHANGE_MODE_CLASS} returns nonzero.
+
+Note that @code{TARGET_MODE_REP_EXTENDED} and @code{LOAD_EXTEND_OP}
+describe two related properties.  If you define
+@code{TARGET_MODE_REP_EXTENDED (mode, word_mode)} you probably also want
+to define @code{LOAD_EXTEND_OP (mode)} to return the same type of
+extension.
+
+In order to enforce the representation of @code{mode},
+@code{TRULY_NOOP_TRUNCATION} should return false when truncating to
+@code{mode}.
+@end deftypefn
+
+@defmac STORE_FLAG_VALUE
+A C expression describing the value returned by a comparison operator
+with an integral mode and stored by a store-flag instruction
+(@samp{cstore@var{mode}4}) when the condition is true.  This description must
+apply to @emph{all} the @samp{cstore@var{mode}4} patterns and all the
+comparison operators whose results have a @code{MODE_INT} mode.
+
+A value of 1 or @minus{}1 means that the instruction implementing the
+comparison operator returns exactly 1 or @minus{}1 when the comparison is true
+and 0 when the comparison is false.  Otherwise, the value indicates
+which bits of the result are guaranteed to be 1 when the comparison is
+true.  This value is interpreted in the mode of the comparison
+operation, which is given by the mode of the first operand in the
+@samp{cstore@var{mode}4} pattern.  Either the low bit or the sign bit of
+@code{STORE_FLAG_VALUE} be on.  Presently, only those bits are used by
+the compiler.
+
+If @code{STORE_FLAG_VALUE} is neither 1 or @minus{}1, the compiler will
+generate code that depends only on the specified bits.  It can also
+replace comparison operators with equivalent operations if they cause
+the required bits to be set, even if the remaining bits are undefined.
+For example, on a machine whose comparison operators return an
+@code{SImode} value and where @code{STORE_FLAG_VALUE} is defined as
+@samp{0x80000000}, saying that just the sign bit is relevant, the
+expression
+
+@smallexample
+(ne:SI (and:SI @var{x} (const_int @var{power-of-2})) (const_int 0))
+@end smallexample
+
+@noindent
+can be converted to
+
+@smallexample
+(ashift:SI @var{x} (const_int @var{n}))
+@end smallexample
+
+@noindent
+where @var{n} is the appropriate shift count to move the bit being
+tested into the sign bit.
+
+There is no way to describe a machine that always sets the low-order bit
+for a true value, but does not guarantee the value of any other bits,
+but we do not know of any machine that has such an instruction.  If you
+are trying to port GCC to such a machine, include an instruction to
+perform a logical-and of the result with 1 in the pattern for the
+comparison operators and let us know at @email{gcc@@gcc.gnu.org}.
+
+Often, a machine will have multiple instructions that obtain a value
+from a comparison (or the condition codes).  Here are rules to guide the
+choice of value for @code{STORE_FLAG_VALUE}, and hence the instructions
+to be used:
+
+@itemize @bullet
+@item
+Use the shortest sequence that yields a valid definition for
+@code{STORE_FLAG_VALUE}.  It is more efficient for the compiler to
+``normalize'' the value (convert it to, e.g., 1 or 0) than for the
+comparison operators to do so because there may be opportunities to
+combine the normalization with other operations.
+
+@item
+For equal-length sequences, use a value of 1 or @minus{}1, with @minus{}1 being
+slightly preferred on machines with expensive jumps and 1 preferred on
+other machines.
+
+@item
+As a second choice, choose a value of @samp{0x80000001} if instructions
+exist that set both the sign and low-order bits but do not define the
+others.
+
+@item
+Otherwise, use a value of @samp{0x80000000}.
+@end itemize
+
+Many machines can produce both the value chosen for
+@code{STORE_FLAG_VALUE} and its negation in the same number of
+instructions.  On those machines, you should also define a pattern for
+those cases, e.g., one matching
+
+@smallexample
+(set @var{A} (neg:@var{m} (ne:@var{m} @var{B} @var{C})))
+@end smallexample
+
+Some machines can also perform @code{and} or @code{plus} operations on
+condition code values with less instructions than the corresponding
+@samp{cstore@var{mode}4} insn followed by @code{and} or @code{plus}.  On those
+machines, define the appropriate patterns.  Use the names @code{incscc}
+and @code{decscc}, respectively, for the patterns which perform
+@code{plus} or @code{minus} operations on condition code values.  See
+@file{rs6000.md} for some examples.  The GNU Superoptimizer can be used to
+find such instruction sequences on other machines.
+
+If this macro is not defined, the default value, 1, is used.  You need
+not define @code{STORE_FLAG_VALUE} if the machine has no store-flag
+instructions, or if the value generated by these instructions is 1.
+@end defmac
+
+@defmac FLOAT_STORE_FLAG_VALUE (@var{mode})
+A C expression that gives a nonzero @code{REAL_VALUE_TYPE} value that is
+returned when comparison operators with floating-point results are true.
+Define this macro on machines that have comparison operations that return
+floating-point values.  If there are no such operations, do not define
+this macro.
+@end defmac
+
+@defmac VECTOR_STORE_FLAG_VALUE (@var{mode})
+A C expression that gives a rtx representing the nonzero true element
+for vector comparisons.  The returned rtx should be valid for the inner
+mode of @var{mode} which is guaranteed to be a vector mode.  Define
+this macro on machines that have vector comparison operations that
+return a vector result.  If there are no such operations, do not define
+this macro.  Typically, this macro is defined as @code{const1_rtx} or
+@code{constm1_rtx}.  This macro may return @code{NULL_RTX} to prevent
+the compiler optimizing such vector comparison operations for the
+given mode.
+@end defmac
+
+@defmac CLZ_DEFINED_VALUE_AT_ZERO (@var{mode}, @var{value})
+@defmacx CTZ_DEFINED_VALUE_AT_ZERO (@var{mode}, @var{value})
+A C expression that indicates whether the architecture defines a value
+for @code{clz} or @code{ctz} with a zero operand.  
+A result of @code{0} indicates the value is undefined.
+If the value is defined for only the RTL expression, the macro should
+evaluate to @code{1}; if the value applies also to the corresponding optab
+entry (which is normally the case if it expands directly into
+the corresponding RTL), then the macro should evaluate to @code{2}.  
+In the cases where the value is defined, @var{value} should be set to
+this value.  
+
+If this macro is not defined, the value of @code{clz} or
+@code{ctz} at zero is assumed to be undefined.
+
+This macro must be defined if the target's expansion for @code{ffs}
+relies on a particular value to get correct results.  Otherwise it
+is not necessary, though it may be used to optimize some corner cases, and
+to provide a default expansion for the @code{ffs} optab.
+
+Note that regardless of this macro the ``definedness'' of @code{clz}
+and @code{ctz} at zero do @emph{not} extend to the builtin functions
+visible to the user.  Thus one may be free to adjust the value at will
+to match the target expansion of these operations without fear of
+breaking the API@.
+@end defmac
+
+@defmac Pmode
+An alias for the machine mode for pointers.  On most machines, define
+this to be the integer mode corresponding to the width of a hardware
+pointer; @code{SImode} on 32-bit machine or @code{DImode} on 64-bit machines.
+On some machines you must define this to be one of the partial integer
+modes, such as @code{PSImode}.
+
+The width of @code{Pmode} must be at least as large as the value of
+@code{POINTER_SIZE}.  If it is not equal, you must define the macro
+@code{POINTERS_EXTEND_UNSIGNED} to specify how pointers are extended
+to @code{Pmode}.
+@end defmac
+
+@defmac FUNCTION_MODE
+An alias for the machine mode used for memory references to functions
+being called, in @code{call} RTL expressions.  On most CISC machines,
+where an instruction can begin at any byte address, this should be 
+@code{QImode}.  On most RISC machines, where all instructions have fixed
+size and alignment, this should be a mode with the same size and alignment
+as the machine instruction words - typically @code{SImode} or @code{HImode}.
+@end defmac
+
+@defmac STDC_0_IN_SYSTEM_HEADERS
+In normal operation, the preprocessor expands @code{__STDC__} to the
+constant 1, to signify that GCC conforms to ISO Standard C@.  On some
+hosts, like Solaris, the system compiler uses a different convention,
+where @code{__STDC__} is normally 0, but is 1 if the user specifies
+strict conformance to the C Standard.
+
+Defining @code{STDC_0_IN_SYSTEM_HEADERS} makes GNU CPP follows the host
+convention when processing system header files, but when processing user
+files @code{__STDC__} will always expand to 1.
+@end defmac
+
+@defmac NO_IMPLICIT_EXTERN_C
+Define this macro if the system header files support C++ as well as C@.
+This macro inhibits the usual method of using system header files in
+C++, which is to pretend that the file's contents are enclosed in
+@samp{extern "C" @{@dots{}@}}.
+@end defmac
+
+@findex #pragma
+@findex pragma
+@defmac REGISTER_TARGET_PRAGMAS ()
+Define this macro if you want to implement any target-specific pragmas.
+If defined, it is a C expression which makes a series of calls to
+@code{c_register_pragma} or @code{c_register_pragma_with_expansion}
+for each pragma.  The macro may also do any
+setup required for the pragmas.
+
+The primary reason to define this macro is to provide compatibility with
+other compilers for the same target.  In general, we discourage
+definition of target-specific pragmas for GCC@.
+
+If the pragma can be implemented by attributes then you should consider
+defining the target hook @samp{TARGET_INSERT_ATTRIBUTES} as well.
+
+Preprocessor macros that appear on pragma lines are not expanded.  All
+@samp{#pragma} directives that do not match any registered pragma are
+silently ignored, unless the user specifies @option{-Wunknown-pragmas}.
+@end defmac
+
+@deftypefun void c_register_pragma (const char *@var{space}, const char *@var{name}, void (*@var{callback}) (struct cpp_reader *))
+@deftypefunx void c_register_pragma_with_expansion (const char *@var{space}, const char *@var{name}, void (*@var{callback}) (struct cpp_reader *))
+
+Each call to @code{c_register_pragma} or
+@code{c_register_pragma_with_expansion} establishes one pragma.  The
+@var{callback} routine will be called when the preprocessor encounters a
+pragma of the form
+
+@smallexample
+#pragma [@var{space}] @var{name} @dots{}
+@end smallexample
+
+@var{space} is the case-sensitive namespace of the pragma, or
+@code{NULL} to put the pragma in the global namespace.  The callback
+routine receives @var{pfile} as its first argument, which can be passed
+on to cpplib's functions if necessary.  You can lex tokens after the
+@var{name} by calling @code{pragma_lex}.  Tokens that are not read by the
+callback will be silently ignored.  The end of the line is indicated by
+a token of type @code{CPP_EOF}.  Macro expansion occurs on the
+arguments of pragmas registered with
+@code{c_register_pragma_with_expansion} but not on the arguments of
+pragmas registered with @code{c_register_pragma}.
+
+Note that the use of @code{pragma_lex} is specific to the C and C++
+compilers.  It will not work in the Java or Fortran compilers, or any
+other language compilers for that matter.  Thus if @code{pragma_lex} is going
+to be called from target-specific code, it must only be done so when
+building the C and C++ compilers.  This can be done by defining the
+variables @code{c_target_objs} and @code{cxx_target_objs} in the
+target entry in the @file{config.gcc} file.  These variables should name
+the target-specific, language-specific object file which contains the
+code that uses @code{pragma_lex}.  Note it will also be necessary to add a
+rule to the makefile fragment pointed to by @code{tmake_file} that shows
+how to build this object file.
+@end deftypefun
+
+@defmac HANDLE_PRAGMA_PACK_WITH_EXPANSION
+Define this macro if macros should be expanded in the
+arguments of @samp{#pragma pack}.
+@end defmac
+
+@hook TARGET_HANDLE_PRAGMA_EXTERN_PREFIX
+
+@defmac TARGET_DEFAULT_PACK_STRUCT
+If your target requires a structure packing default other than 0 (meaning
+the machine default), define this macro to the necessary value (in bytes).
+This must be a value that would also be valid to use with
+@samp{#pragma pack()} (that is, a small power of two).
+@end defmac
+
+@defmac DOLLARS_IN_IDENTIFIERS
+Define this macro to control use of the character @samp{$} in
+identifier names for the C family of languages.  0 means @samp{$} is
+not allowed by default; 1 means it is allowed.  1 is the default;
+there is no need to define this macro in that case.
+@end defmac
+
+@defmac NO_DOLLAR_IN_LABEL
+Define this macro if the assembler does not accept the character
+@samp{$} in label names.  By default constructors and destructors in
+G++ have @samp{$} in the identifiers.  If this macro is defined,
+@samp{.} is used instead.
+@end defmac
+
+@defmac NO_DOT_IN_LABEL
+Define this macro if the assembler does not accept the character
+@samp{.} in label names.  By default constructors and destructors in G++
+have names that use @samp{.}.  If this macro is defined, these names
+are rewritten to avoid @samp{.}.
+@end defmac
+
+@defmac INSN_SETS_ARE_DELAYED (@var{insn})
+Define this macro as a C expression that is nonzero if it is safe for the
+delay slot scheduler to place instructions in the delay slot of @var{insn},
+even if they appear to use a resource set or clobbered in @var{insn}.
+@var{insn} is always a @code{jump_insn} or an @code{insn}; GCC knows that
+every @code{call_insn} has this behavior.  On machines where some @code{insn}
+or @code{jump_insn} is really a function call and hence has this behavior,
+you should define this macro.
+
+You need not define this macro if it would always return zero.
+@end defmac
+
+@defmac INSN_REFERENCES_ARE_DELAYED (@var{insn})
+Define this macro as a C expression that is nonzero if it is safe for the
+delay slot scheduler to place instructions in the delay slot of @var{insn},
+even if they appear to set or clobber a resource referenced in @var{insn}.
+@var{insn} is always a @code{jump_insn} or an @code{insn}.  On machines where
+some @code{insn} or @code{jump_insn} is really a function call and its operands
+are registers whose use is actually in the subroutine it calls, you should
+define this macro.  Doing so allows the delay slot scheduler to move
+instructions which copy arguments into the argument registers into the delay
+slot of @var{insn}.
+
+You need not define this macro if it would always return zero.
+@end defmac
+
+@defmac MULTIPLE_SYMBOL_SPACES
+Define this macro as a C expression that is nonzero if, in some cases,
+global symbols from one translation unit may not be bound to undefined
+symbols in another translation unit without user intervention.  For
+instance, under Microsoft Windows symbols must be explicitly imported
+from shared libraries (DLLs).
+
+You need not define this macro if it would always evaluate to zero.
+@end defmac
+
+@hook TARGET_MD_ASM_CLOBBERS
+This target hook should add to @var{clobbers} @code{STRING_CST} trees for
+any hard regs the port wishes to automatically clobber for an asm.
+It should return the result of the last @code{tree_cons} used to add a
+clobber.  The @var{outputs}, @var{inputs} and @var{clobber} lists are the
+corresponding parameters to the asm and may be inspected to avoid
+clobbering a register that is an input or output of the asm.  You can use
+@code{tree_overlaps_hard_reg_set}, declared in @file{tree.h}, to test
+for overlap with regards to asm-declared registers.
+@end deftypefn
+
+@defmac MATH_LIBRARY
+Define this macro as a C string constant for the linker argument to link
+in the system math library, minus the initial @samp{"-l"}, or
+@samp{""} if the target does not have a
+separate math library.
+
+You need only define this macro if the default of @samp{"m"} is wrong.
+@end defmac
+
+@defmac LIBRARY_PATH_ENV
+Define this macro as a C string constant for the environment variable that
+specifies where the linker should look for libraries.
+
+You need only define this macro if the default of @samp{"LIBRARY_PATH"}
+is wrong.
+@end defmac
+
+@defmac TARGET_POSIX_IO
+Define this macro if the target supports the following POSIX@ file
+functions, access, mkdir and  file locking with fcntl / F_SETLKW@.
+Defining @code{TARGET_POSIX_IO} will enable the test coverage code
+to use file locking when exiting a program, which avoids race conditions
+if the program has forked. It will also create directories at run-time
+for cross-profiling.
+@end defmac
+
+@defmac MAX_CONDITIONAL_EXECUTE
+
+A C expression for the maximum number of instructions to execute via
+conditional execution instructions instead of a branch.  A value of
+@code{BRANCH_COST}+1 is the default if the machine does not use cc0, and
+1 if it does use cc0.
+@end defmac
+
+@defmac IFCVT_MODIFY_TESTS (@var{ce_info}, @var{true_expr}, @var{false_expr})
+Used if the target needs to perform machine-dependent modifications on the
+conditionals used for turning basic blocks into conditionally executed code.
+@var{ce_info} points to a data structure, @code{struct ce_if_block}, which
+contains information about the currently processed blocks.  @var{true_expr}
+and @var{false_expr} are the tests that are used for converting the
+then-block and the else-block, respectively.  Set either @var{true_expr} or
+@var{false_expr} to a null pointer if the tests cannot be converted.
+@end defmac
+
+@defmac IFCVT_MODIFY_MULTIPLE_TESTS (@var{ce_info}, @var{bb}, @var{true_expr}, @var{false_expr})
+Like @code{IFCVT_MODIFY_TESTS}, but used when converting more complicated
+if-statements into conditions combined by @code{and} and @code{or} operations.
+@var{bb} contains the basic block that contains the test that is currently
+being processed and about to be turned into a condition.
+@end defmac
+
+@defmac IFCVT_MODIFY_INSN (@var{ce_info}, @var{pattern}, @var{insn})
+A C expression to modify the @var{PATTERN} of an @var{INSN} that is to
+be converted to conditional execution format.  @var{ce_info} points to
+a data structure, @code{struct ce_if_block}, which contains information
+about the currently processed blocks.
+@end defmac
+
+@defmac IFCVT_MODIFY_FINAL (@var{ce_info})
+A C expression to perform any final machine dependent modifications in
+converting code to conditional execution.  The involved basic blocks
+can be found in the @code{struct ce_if_block} structure that is pointed
+to by @var{ce_info}.
+@end defmac
+
+@defmac IFCVT_MODIFY_CANCEL (@var{ce_info})
+A C expression to cancel any machine dependent modifications in
+converting code to conditional execution.  The involved basic blocks
+can be found in the @code{struct ce_if_block} structure that is pointed
+to by @var{ce_info}.
+@end defmac
+
+@defmac IFCVT_INIT_EXTRA_FIELDS (@var{ce_info})
+A C expression to initialize any extra fields in a @code{struct ce_if_block}
+structure, which are defined by the @code{IFCVT_EXTRA_FIELDS} macro.
+@end defmac
+
+@defmac IFCVT_EXTRA_FIELDS
+If defined, it should expand to a set of field declarations that will be
+added to the @code{struct ce_if_block} structure.  These should be initialized
+by the @code{IFCVT_INIT_EXTRA_FIELDS} macro.
+@end defmac
+
+@hook TARGET_MACHINE_DEPENDENT_REORG
+If non-null, this hook performs a target-specific pass over the
+instruction stream.  The compiler will run it at all optimization levels,
+just before the point at which it normally does delayed-branch scheduling.
+
+The exact purpose of the hook varies from target to target.  Some use
+it to do transformations that are necessary for correctness, such as
+laying out in-function constant pools or avoiding hardware hazards.
+Others use it as an opportunity to do some machine-dependent optimizations.
+
+You need not implement the hook if it has nothing to do.  The default
+definition is null.
+@end deftypefn
+
+@hook TARGET_INIT_BUILTINS
+Define this hook if you have any machine-specific built-in functions
+that need to be defined.  It should be a function that performs the
+necessary setup.
+
+Machine specific built-in functions can be useful to expand special machine
+instructions that would otherwise not normally be generated because
+they have no equivalent in the source language (for example, SIMD vector
+instructions or prefetch instructions).
+
+To create a built-in function, call the function
+@code{lang_hooks.builtin_function}
+which is defined by the language front end.  You can use any type nodes set
+up by @code{build_common_tree_nodes} and @code{build_common_tree_nodes_2};
+only language front ends that use those two functions will call
+@samp{TARGET_INIT_BUILTINS}.
+@end deftypefn
+
+@hook TARGET_BUILTIN_DECL
+Define this hook if you have any machine-specific built-in functions
+that need to be defined.  It should be a function that returns the
+builtin function declaration for the builtin function code @var{code}.
+If there is no such builtin and it cannot be initialized at this time
+if @var{initialize_p} is true the function should return @code{NULL_TREE}.
+If @var{code} is out of range the function should return
+@code{error_mark_node}.
+@end deftypefn
+
+@hook TARGET_EXPAND_BUILTIN
+
+Expand a call to a machine specific built-in function that was set up by
+@samp{TARGET_INIT_BUILTINS}.  @var{exp} is the expression for the
+function call; the result should go to @var{target} if that is
+convenient, and have mode @var{mode} if that is convenient.
+@var{subtarget} may be used as the target for computing one of
+@var{exp}'s operands.  @var{ignore} is nonzero if the value is to be
+ignored.  This function should return the result of the call to the
+built-in function.
+@end deftypefn
+
+@hook TARGET_RESOLVE_OVERLOADED_BUILTIN
+Select a replacement for a machine specific built-in function that
+was set up by @samp{TARGET_INIT_BUILTINS}.  This is done
+@emph{before} regular type checking, and so allows the target to
+implement a crude form of function overloading.  @var{fndecl} is the
+declaration of the built-in function.  @var{arglist} is the list of
+arguments passed to the built-in function.  The result is a
+complete expression that implements the operation, usually
+another @code{CALL_EXPR}.
+@var{arglist} really has type @samp{VEC(tree,gc)*}
+@end deftypefn
+
+@hook TARGET_FOLD_BUILTIN
+Fold a call to a machine specific built-in function that was set up by
+@samp{TARGET_INIT_BUILTINS}.  @var{fndecl} is the declaration of the
+built-in function.  @var{n_args} is the number of arguments passed to
+the function; the arguments themselves are pointed to by @var{argp}.
+The result is another tree containing a simplified expression for the
+call's result.  If @var{ignore} is true the value will be ignored.
+@end deftypefn
+
+@hook TARGET_INVALID_WITHIN_DOLOOP
+
+Take an instruction in @var{insn} and return NULL if it is valid within a
+low-overhead loop, otherwise return a string explaining why doloop
+could not be applied.
+
+Many targets use special registers for low-overhead looping. For any
+instruction that clobbers these this function should return a string indicating
+the reason why the doloop could not be applied.
+By default, the RTL loop optimizer does not use a present doloop pattern for
+loops containing function calls or branch on table instructions.
+@end deftypefn
+
+@defmac MD_CAN_REDIRECT_BRANCH (@var{branch1}, @var{branch2})
+
+Take a branch insn in @var{branch1} and another in @var{branch2}.
+Return true if redirecting @var{branch1} to the destination of
+@var{branch2} is possible.
+
+On some targets, branches may have a limited range.  Optimizing the
+filling of delay slots can result in branches being redirected, and this
+may in turn cause a branch offset to overflow.
+@end defmac
+
+@hook TARGET_COMMUTATIVE_P
+This target hook returns @code{true} if @var{x} is considered to be commutative.
+Usually, this is just COMMUTATIVE_P (@var{x}), but the HP PA doesn't consider
+PLUS to be commutative inside a MEM@.  @var{outer_code} is the rtx code
+of the enclosing rtl, if known, otherwise it is UNKNOWN.
+@end deftypefn
+
+@hook TARGET_ALLOCATE_INITIAL_VALUE
+
+When the initial value of a hard register has been copied in a pseudo
+register, it is often not necessary to actually allocate another register
+to this pseudo register, because the original hard register or a stack slot
+it has been saved into can be used.  @code{TARGET_ALLOCATE_INITIAL_VALUE}
+is called at the start of register allocation once for each hard register
+that had its initial value copied by using
+@code{get_func_hard_reg_initial_val} or @code{get_hard_reg_initial_val}.
+Possible values are @code{NULL_RTX}, if you don't want
+to do any special allocation, a @code{REG} rtx---that would typically be
+the hard register itself, if it is known not to be clobbered---or a
+@code{MEM}.
+If you are returning a @code{MEM}, this is only a hint for the allocator;
+it might decide to use another register anyways.
+You may use @code{current_function_leaf_function} in the hook, functions
+that use @code{REG_N_SETS}, to determine if the hard
+register in question will not be clobbered.
+The default value of this hook is @code{NULL}, which disables any special
+allocation.
+@end deftypefn
+
+@hook TARGET_UNSPEC_MAY_TRAP_P
+This target hook returns nonzero if @var{x}, an @code{unspec} or
+@code{unspec_volatile} operation, might cause a trap.  Targets can use
+this hook to enhance precision of analysis for @code{unspec} and
+@code{unspec_volatile} operations.  You may call @code{may_trap_p_1}
+to analyze inner elements of @var{x} in which case @var{flags} should be
+passed along.
+@end deftypefn
+
+@hook TARGET_SET_CURRENT_FUNCTION
+The compiler invokes this hook whenever it changes its current function 
+context (@code{cfun}).  You can define this function if
+the back end needs to perform any initialization or reset actions on a
+per-function basis.  For example, it may be used to implement function
+attributes that affect register usage or code generation patterns.
+The argument @var{decl} is the declaration for the new function context,
+and may be null to indicate that the compiler has left a function context
+and is returning to processing at the top level.
+The default hook function does nothing.
+
+GCC sets @code{cfun} to a dummy function context during initialization of
+some parts of the back end.  The hook function is not invoked in this
+situation; you need not worry about the hook being invoked recursively,
+or when the back end is in a partially-initialized state.
+@code{cfun} might be @code{NULL} to indicate processing at top level,
+outside of any function scope.
+@end deftypefn
+
+@defmac TARGET_OBJECT_SUFFIX
+Define this macro to be a C string representing the suffix for object
+files on your target machine.  If you do not define this macro, GCC will
+use @samp{.o} as the suffix for object files.
+@end defmac
+
+@defmac TARGET_EXECUTABLE_SUFFIX
+Define this macro to be a C string representing the suffix to be
+automatically added to executable files on your target machine.  If you
+do not define this macro, GCC will use the null string as the suffix for
+executable files.
+@end defmac
+
+@defmac COLLECT_EXPORT_LIST
+If defined, @code{collect2} will scan the individual object files
+specified on its command line and create an export list for the linker.
+Define this macro for systems like AIX, where the linker discards
+object files that are not referenced from @code{main} and uses export
+lists.
+@end defmac
+
+@defmac MODIFY_JNI_METHOD_CALL (@var{mdecl})
+Define this macro to a C expression representing a variant of the
+method call @var{mdecl}, if Java Native Interface (JNI) methods
+must be invoked differently from other methods on your target.
+For example, on 32-bit Microsoft Windows, JNI methods must be invoked using
+the @code{stdcall} calling convention and this macro is then
+defined as this expression:
+
+@smallexample
+build_type_attribute_variant (@var{mdecl},
+                              build_tree_list
+                              (get_identifier ("stdcall"),
+                               NULL))
+@end smallexample
+@end defmac
+
+@hook TARGET_CANNOT_MODIFY_JUMPS_P
+This target hook returns @code{true} past the point in which new jump
+instructions could be created.  On machines that require a register for
+every jump such as the SHmedia ISA of SH5, this point would typically be
+reload, so this target hook should be defined to a function such as:
+
+@smallexample
+static bool
+cannot_modify_jumps_past_reload_p ()
+@{
+  return (reload_completed || reload_in_progress);
+@}
+@end smallexample
+@end deftypefn
+
+@hook TARGET_BRANCH_TARGET_REGISTER_CLASS
+This target hook returns a register class for which branch target register
+optimizations should be applied.  All registers in this class should be
+usable interchangeably.  After reload, registers in this class will be
+re-allocated and loads will be hoisted out of loops and be subjected
+to inter-block scheduling.
+@end deftypefn
+
+@hook TARGET_BRANCH_TARGET_REGISTER_CALLEE_SAVED
+Branch target register optimization will by default exclude callee-saved
+registers
+that are not already live during the current function; if this target hook
+returns true, they will be included.  The target code must than make sure
+that all target registers in the class returned by
+@samp{TARGET_BRANCH_TARGET_REGISTER_CLASS} that might need saving are
+saved.  @var{after_prologue_epilogue_gen} indicates if prologues and
+epilogues have already been generated.  Note, even if you only return
+true when @var{after_prologue_epilogue_gen} is false, you still are likely
+to have to make special provisions in @code{INITIAL_ELIMINATION_OFFSET}
+to reserve space for caller-saved target registers.
+@end deftypefn
+
+@hook TARGET_HAVE_CONDITIONAL_EXECUTION
+This target hook returns true if the target supports conditional execution.
+This target hook is required only when the target has several different
+modes and they have different conditional execution capability, such as ARM.
+@end deftypefn
+
+@hook TARGET_LOOP_UNROLL_ADJUST
+This target hook returns a new value for the number of times @var{loop}
+should be unrolled. The parameter @var{nunroll} is the number of times
+the loop is to be unrolled. The parameter @var{loop} is a pointer to
+the loop, which is going to be checked for unrolling. This target hook
+is required only when the target has special constraints like maximum
+number of memory accesses.
+@end deftypefn
+
+@defmac POWI_MAX_MULTS
+If defined, this macro is interpreted as a signed integer C expression
+that specifies the maximum number of floating point multiplications
+that should be emitted when expanding exponentiation by an integer
+constant inline.  When this value is defined, exponentiation requiring
+more than this number of multiplications is implemented by calling the
+system library's @code{pow}, @code{powf} or @code{powl} routines.
+The default value places no upper bound on the multiplication count.
+@end defmac
+
+@deftypefn Macro void TARGET_EXTRA_INCLUDES (const char *@var{sysroot}, const char *@var{iprefix}, int @var{stdinc})
+This target hook should register any extra include files for the
+target.  The parameter @var{stdinc} indicates if normal include files
+are present.  The parameter @var{sysroot} is the system root directory.
+The parameter @var{iprefix} is the prefix for the gcc directory.
+@end deftypefn
+
+@deftypefn Macro void TARGET_EXTRA_PRE_INCLUDES (const char *@var{sysroot}, const char *@var{iprefix}, int @var{stdinc})
+This target hook should register any extra include files for the
+target before any standard headers.  The parameter @var{stdinc}
+indicates if normal include files are present.  The parameter
+@var{sysroot} is the system root directory.  The parameter
+@var{iprefix} is the prefix for the gcc directory.
+@end deftypefn
+
+@deftypefn Macro void TARGET_OPTF (char *@var{path})
+This target hook should register special include paths for the target.
+The parameter @var{path} is the include to register.  On Darwin
+systems, this is used for Framework includes, which have semantics
+that are different from @option{-I}.
+@end deftypefn
+
+@defmac bool TARGET_USE_LOCAL_THUNK_ALIAS_P (tree @var{fndecl})
+This target macro returns @code{true} if it is safe to use a local alias
+for a virtual function @var{fndecl} when constructing thunks,
+@code{false} otherwise.  By default, the macro returns @code{true} for all
+functions, if a target supports aliases (i.e.@: defines
+@code{ASM_OUTPUT_DEF}), @code{false} otherwise,
+@end defmac
+
+@defmac TARGET_FORMAT_TYPES
+If defined, this macro is the name of a global variable containing
+target-specific format checking information for the @option{-Wformat}
+option.  The default is to have no target-specific format checks.
+@end defmac
+
+@defmac TARGET_N_FORMAT_TYPES
+If defined, this macro is the number of entries in
+@code{TARGET_FORMAT_TYPES}.
+@end defmac
+
+@defmac TARGET_OVERRIDES_FORMAT_ATTRIBUTES
+If defined, this macro is the name of a global variable containing
+target-specific format overrides for the @option{-Wformat} option. The
+default is to have no target-specific format overrides. If defined,
+@code{TARGET_FORMAT_TYPES} must be defined, too.
+@end defmac
+
+@defmac TARGET_OVERRIDES_FORMAT_ATTRIBUTES_COUNT
+If defined, this macro specifies the number of entries in
+@code{TARGET_OVERRIDES_FORMAT_ATTRIBUTES}.
+@end defmac
+
+@defmac TARGET_OVERRIDES_FORMAT_INIT
+If defined, this macro specifies the optional initialization
+routine for target specific customizations of the system printf
+and scanf formatter settings.
+@end defmac
+
+@hook TARGET_RELAXED_ORDERING
+If set to @code{true}, means that the target's memory model does not
+guarantee that loads which do not depend on one another will access
+main memory in the order of the instruction stream; if ordering is
+important, an explicit memory barrier must be used.  This is true of
+many recent processors which implement a policy of ``relaxed,''
+``weak,'' or ``release'' memory consistency, such as Alpha, PowerPC,
+and ia64.  The default is @code{false}.
+@end deftypevr
+
+@hook TARGET_INVALID_ARG_FOR_UNPROTOTYPED_FN
+If defined, this macro returns the diagnostic message when it is
+illegal to pass argument @var{val} to function @var{funcdecl}
+with prototype @var{typelist}.
+@end deftypefn
+
+@hook TARGET_INVALID_CONVERSION
+If defined, this macro returns the diagnostic message when it is
+invalid to convert from @var{fromtype} to @var{totype}, or @code{NULL}
+if validity should be determined by the front end.
+@end deftypefn
+
+@hook TARGET_INVALID_UNARY_OP
+If defined, this macro returns the diagnostic message when it is
+invalid to apply operation @var{op} (where unary plus is denoted by
+@code{CONVERT_EXPR}) to an operand of type @var{type}, or @code{NULL}
+if validity should be determined by the front end.
+@end deftypefn
+
+@hook TARGET_INVALID_BINARY_OP
+If defined, this macro returns the diagnostic message when it is
+invalid to apply operation @var{op} to operands of types @var{type1}
+and @var{type2}, or @code{NULL} if validity should be determined by
+the front end.
+@end deftypefn
+
+@hook TARGET_INVALID_PARAMETER_TYPE
+If defined, this macro returns the diagnostic message when it is
+invalid for functions to include parameters of type @var{type}, 
+or @code{NULL} if validity should be determined by
+the front end.  This is currently used only by the C and C++ front ends.
+@end deftypefn
+
+@hook TARGET_INVALID_RETURN_TYPE
+If defined, this macro returns the diagnostic message when it is
+invalid for functions to have return type @var{type}, 
+or @code{NULL} if validity should be determined by
+the front end.  This is currently used only by the C and C++ front ends.
+@end deftypefn
+
+@hook TARGET_PROMOTED_TYPE
+If defined, this target hook returns the type to which values of 
+@var{type} should be promoted when they appear in expressions, 
+analogous to the integer promotions, or @code{NULL_TREE} to use the
+front end's normal promotion rules.  This hook is useful when there are
+target-specific types with special promotion rules.
+This is currently used only by the C and C++ front ends.
+@end deftypefn
+
+@hook TARGET_CONVERT_TO_TYPE
+If defined, this hook returns the result of converting @var{expr} to 
+@var{type}.  It should return the converted expression, 
+or @code{NULL_TREE} to apply the front end's normal conversion rules.
+This hook is useful when there are target-specific types with special 
+conversion rules.
+This is currently used only by the C and C++ front ends.
+@end deftypefn
+
+@defmac TARGET_USE_JCR_SECTION
+This macro determines whether to use the JCR section to register Java
+classes. By default, TARGET_USE_JCR_SECTION is defined to 1 if both
+SUPPORTS_WEAK and TARGET_HAVE_NAMED_SECTIONS are true, else 0.
+@end defmac
+
+@defmac OBJC_JBLEN
+This macro determines the size of the objective C jump buffer for the
+NeXT runtime. By default, OBJC_JBLEN is defined to an innocuous value.
+@end defmac
+
+@defmac LIBGCC2_UNWIND_ATTRIBUTE
+Define this macro if any target-specific attributes need to be attached
+to the functions in @file{libgcc} that provide low-level support for 
+call stack unwinding.  It is used in declarations in @file{unwind-generic.h}
+and the associated definitions of those functions.
+@end defmac
+
+@hook TARGET_UPDATE_STACK_BOUNDARY
+Define this macro to update the current function stack boundary if
+necessary.
+@end deftypefn
+
+@hook TARGET_GET_DRAP_RTX
+This hook should return an rtx for Dynamic Realign Argument Pointer (DRAP) if a
+different argument pointer register is needed to access the function's
+argument list due to stack realignment.  Return @code{NULL} if no DRAP
+is needed.
+@end deftypefn
+
+@hook TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS
+When optimization is disabled, this hook indicates whether or not
+arguments should be allocated to stack slots.  Normally, GCC allocates
+stacks slots for arguments when not optimizing in order to make
+debugging easier.  However, when a function is declared with
+@code{__attribute__((naked))}, there is no stack frame, and the compiler
+cannot safely move arguments from the registers in which they are passed
+to the stack.  Therefore, this hook should return true in general, but
+false for naked functions.  The default implementation always returns true.
+@end deftypefn
+
+@hook TARGET_CONST_ANCHOR
+On some architectures it can take multiple instructions to synthesize
+a constant.  If there is another constant already in a register that
+is close enough in value then it is preferable that the new constant
+is computed from this register using immediate addition or
+subtraction.  We accomplish this through CSE.  Besides the value of
+the constant we also add a lower and an upper constant anchor to the
+available expressions.  These are then queried when encountering new
+constants.  The anchors are computed by rounding the constant up and
+down to a multiple of the value of @code{TARGET_CONST_ANCHOR}.
+@code{TARGET_CONST_ANCHOR} should be the maximum positive value
+accepted by immediate-add plus one.  We currently assume that the
+value of @code{TARGET_CONST_ANCHOR} is a power of 2.  For example, on
+MIPS, where add-immediate takes a 16-bit signed value,
+@code{TARGET_CONST_ANCHOR} is set to @samp{0x8000}.  The default value
+is zero, which disables this optimization.  @end deftypevr
diff --git a/gcc/doc/tree-ssa.texi b/gcc/doc/tree-ssa.texi
new file mode 100644
index 000000000..02b748d49
--- /dev/null
+++ b/gcc/doc/tree-ssa.texi
@@ -0,0 +1,923 @@
+@c Copyright (c) 2004, 2005, 2007, 2008, 2010
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@c ---------------------------------------------------------------------
+@c Tree SSA
+@c ---------------------------------------------------------------------
+
+@node Tree SSA
+@chapter Analysis and Optimization of GIMPLE tuples
+@cindex Tree SSA
+@cindex Optimization infrastructure for GIMPLE
+
+GCC uses three main intermediate languages to represent the program
+during compilation: GENERIC, GIMPLE and RTL@.  GENERIC is a
+language-independent representation generated by each front end.  It
+is used to serve as an interface between the parser and optimizer.
+GENERIC is a common representation that is able to represent programs
+written in all the languages supported by GCC@.
+
+GIMPLE and RTL are used to optimize the program.  GIMPLE is used for
+target and language independent optimizations (e.g., inlining,
+constant propagation, tail call elimination, redundancy elimination,
+etc).  Much like GENERIC, GIMPLE is a language independent, tree based
+representation.  However, it differs from GENERIC in that the GIMPLE
+grammar is more restrictive: expressions contain no more than 3
+operands (except function calls), it has no control flow structures
+and expressions with side-effects are only allowed on the right hand
+side of assignments.  See the chapter describing GENERIC and GIMPLE
+for more details.
+
+This chapter describes the data structures and functions used in the
+GIMPLE optimizers (also known as ``tree optimizers'' or ``middle
+end'').  In particular, it focuses on all the macros, data structures,
+functions and programming constructs needed to implement optimization
+passes for GIMPLE@.
+
+@menu
+* Annotations::         Attributes for variables.
+* SSA Operands::        SSA names referenced by GIMPLE statements.
+* SSA::                 Static Single Assignment representation.
+* Alias analysis::      Representing aliased loads and stores.
+* Memory model::        Memory model used by the middle-end.
+@end menu
+
+@node Annotations
+@section Annotations
+@cindex annotations
+
+The optimizers need to associate attributes with variables during the
+optimization process.  For instance, we need to know whether a
+variable has aliases.  All these attributes are stored in data
+structures called annotations which are then linked to the field
+@code{ann} in @code{struct tree_common}.
+
+Presently, we define annotations for variables (@code{var_ann_t}).
+Annotations are defined and documented in @file{tree-flow.h}.
+
+
+@node SSA Operands
+@section SSA Operands
+@cindex operands
+@cindex virtual operands
+@cindex real operands
+@findex update_stmt
+
+Almost every GIMPLE statement will contain a reference to a variable
+or memory location.  Since statements come in different shapes and
+sizes, their operands are going to be located at various spots inside
+the statement's tree.  To facilitate access to the statement's
+operands, they are organized into lists associated inside each
+statement's annotation.  Each element in an operand list is a pointer
+to a @code{VAR_DECL}, @code{PARM_DECL} or @code{SSA_NAME} tree node.
+This provides a very convenient way of examining and replacing
+operands.
+
+Data flow analysis and optimization is done on all tree nodes
+representing variables.  Any node for which @code{SSA_VAR_P} returns
+nonzero is considered when scanning statement operands.  However, not
+all @code{SSA_VAR_P} variables are processed in the same way.  For the
+purposes of optimization, we need to distinguish between references to
+local scalar variables and references to globals, statics, structures,
+arrays, aliased variables, etc.  The reason is simple, the compiler
+can gather complete data flow information for a local scalar.  On the
+other hand, a global variable may be modified by a function call, it
+may not be possible to keep track of all the elements of an array or
+the fields of a structure, etc.
+
+The operand scanner gathers two kinds of operands: @dfn{real} and
+@dfn{virtual}.  An operand for which @code{is_gimple_reg} returns true
+is considered real, otherwise it is a virtual operand.  We also
+distinguish between uses and definitions.  An operand is used if its
+value is loaded by the statement (e.g., the operand at the RHS of an
+assignment).  If the statement assigns a new value to the operand, the
+operand is considered a definition (e.g., the operand at the LHS of
+an assignment).
+
+Virtual and real operands also have very different data flow
+properties.  Real operands are unambiguous references to the
+full object that they represent.  For instance, given
+
+@smallexample
+@{
+  int a, b;
+  a = b
+@}
+@end smallexample
+
+Since @code{a} and @code{b} are non-aliased locals, the statement
+@code{a = b} will have one real definition and one real use because
+variable @code{a} is completely modified with the contents of
+variable @code{b}.  Real definition are also known as @dfn{killing
+definitions}.  Similarly, the use of @code{b} reads all its bits.
+
+In contrast, virtual operands are used with variables that can have
+a partial or ambiguous reference.  This includes structures, arrays,
+globals, and aliased variables.  In these cases, we have two types of
+definitions.  For globals, structures, and arrays, we can determine from
+a statement whether a variable of these types has a killing definition.
+If the variable does, then the statement is marked as having a
+@dfn{must definition} of that variable.  However, if a statement is only
+defining a part of the variable (i.e.@: a field in a structure), or if we
+know that a statement might define the variable but we cannot say for sure,
+then we mark that statement as having a @dfn{may definition}.  For
+instance, given
+
+@smallexample
+@{
+  int a, b, *p;
+
+  if (@dots{})
+    p = &a;
+  else
+    p = &b;
+  *p = 5;
+  return *p;
+@}
+@end smallexample
+
+The assignment @code{*p = 5} may be a definition of @code{a} or
+@code{b}.  If we cannot determine statically where @code{p} is
+pointing to at the time of the store operation, we create virtual
+definitions to mark that statement as a potential definition site for
+@code{a} and @code{b}.  Memory loads are similarly marked with virtual
+use operands.  Virtual operands are shown in tree dumps right before
+the statement that contains them.  To request a tree dump with virtual
+operands, use the @option{-vops} option to @option{-fdump-tree}:
+
+@smallexample
+@{
+  int a, b, *p;
+
+  if (@dots{})
+    p = &a;
+  else
+    p = &b;
+  # a = VDEF <a>
+  # b = VDEF <b>
+  *p = 5;
+
+  # VUSE <a>
+  # VUSE <b>
+  return *p;
+@}
+@end smallexample
+
+Notice that @code{VDEF} operands have two copies of the referenced
+variable.  This indicates that this is not a killing definition of
+that variable.  In this case we refer to it as a @dfn{may definition}
+or @dfn{aliased store}.  The presence of the second copy of the
+variable in the @code{VDEF} operand will become important when the
+function is converted into SSA form.  This will be used to link all
+the non-killing definitions to prevent optimizations from making
+incorrect assumptions about them.
+
+Operands are updated as soon as the statement is finished via a call
+to @code{update_stmt}.  If statement elements are changed via
+@code{SET_USE} or @code{SET_DEF}, then no further action is required
+(i.e., those macros take care of updating the statement).  If changes
+are made by manipulating the statement's tree directly, then a call
+must be made to @code{update_stmt} when complete.  Calling one of the
+@code{bsi_insert} routines or @code{bsi_replace} performs an implicit
+call to @code{update_stmt}.
+
+@subsection Operand Iterators And Access Routines
+@cindex Operand Iterators 
+@cindex Operand Access Routines
+
+Operands are collected by @file{tree-ssa-operands.c}.  They are stored
+inside each statement's annotation and can be accessed through either the
+operand iterators or an access routine.
+
+The following access routines are available for examining operands:
+
+@enumerate
+@item @code{SINGLE_SSA_@{USE,DEF,TREE@}_OPERAND}: These accessors will return 
+NULL unless there is exactly one operand matching the specified flags.  If 
+there is exactly one operand, the operand is returned as either a @code{tree}, 
+@code{def_operand_p}, or @code{use_operand_p}.
+
+@smallexample
+tree t = SINGLE_SSA_TREE_OPERAND (stmt, flags);
+use_operand_p u = SINGLE_SSA_USE_OPERAND (stmt, SSA_ALL_VIRTUAL_USES);
+def_operand_p d = SINGLE_SSA_DEF_OPERAND (stmt, SSA_OP_ALL_DEFS);
+@end smallexample
+
+@item @code{ZERO_SSA_OPERANDS}: This macro returns true if there are no 
+operands matching the specified flags.
+
+@smallexample
+if (ZERO_SSA_OPERANDS (stmt, SSA_OP_ALL_VIRTUALS))
+  return;
+@end smallexample
+
+@item @code{NUM_SSA_OPERANDS}: This macro Returns the number of operands 
+matching 'flags'.  This actually executes a loop to perform the count, so 
+only use this if it is really needed.
+
+@smallexample
+int count = NUM_SSA_OPERANDS (stmt, flags)
+@end smallexample
+@end enumerate
+
+
+If you wish to iterate over some or all operands, use the
+@code{FOR_EACH_SSA_@{USE,DEF,TREE@}_OPERAND} iterator.  For example, to print
+all the operands for a statement:
+
+@smallexample
+void
+print_ops (tree stmt)
+@{
+  ssa_op_iter;
+  tree var;
+
+  FOR_EACH_SSA_TREE_OPERAND (var, stmt, iter, SSA_OP_ALL_OPERANDS)
+    print_generic_expr (stderr, var, TDF_SLIM);
+@}
+@end smallexample
+
+
+How to choose the appropriate iterator:
+
+@enumerate
+@item Determine whether you are need to see the operand pointers, or just the
+trees, and choose the appropriate macro:
+
+@smallexample
+Need            Macro:
+----            -------
+use_operand_p   FOR_EACH_SSA_USE_OPERAND
+def_operand_p   FOR_EACH_SSA_DEF_OPERAND
+tree            FOR_EACH_SSA_TREE_OPERAND
+@end smallexample
+
+@item You need to declare a variable of the type you are interested
+in, and an ssa_op_iter structure which serves as the loop controlling
+variable.
+
+@item Determine which operands you wish to use, and specify the flags of
+those you are interested in.  They are documented in
+@file{tree-ssa-operands.h}:
+
+@smallexample
+#define SSA_OP_USE              0x01    /* @r{Real USE operands.}  */
+#define SSA_OP_DEF              0x02    /* @r{Real DEF operands.}  */
+#define SSA_OP_VUSE             0x04    /* @r{VUSE operands.}  */
+#define SSA_OP_VMAYUSE          0x08    /* @r{USE portion of VDEFS.}  */
+#define SSA_OP_VDEF             0x10    /* @r{DEF portion of VDEFS.}  */
+
+/* @r{These are commonly grouped operand flags.}  */
+#define SSA_OP_VIRTUAL_USES     (SSA_OP_VUSE | SSA_OP_VMAYUSE)
+#define SSA_OP_VIRTUAL_DEFS     (SSA_OP_VDEF)
+#define SSA_OP_ALL_USES         (SSA_OP_VIRTUAL_USES | SSA_OP_USE)
+#define SSA_OP_ALL_DEFS         (SSA_OP_VIRTUAL_DEFS | SSA_OP_DEF)
+#define SSA_OP_ALL_OPERANDS     (SSA_OP_ALL_USES | SSA_OP_ALL_DEFS)
+@end smallexample
+@end enumerate
+
+So if you want to look at the use pointers for all the @code{USE} and
+@code{VUSE} operands, you would do something like:
+
+@smallexample
+  use_operand_p use_p;
+  ssa_op_iter iter;
+
+  FOR_EACH_SSA_USE_OPERAND (use_p, stmt, iter, (SSA_OP_USE | SSA_OP_VUSE))
+    @{
+      process_use_ptr (use_p);
+    @}
+@end smallexample
+
+The @code{TREE} macro is basically the same as the @code{USE} and
+@code{DEF} macros, only with the use or def dereferenced via
+@code{USE_FROM_PTR (use_p)} and @code{DEF_FROM_PTR (def_p)}.  Since we
+aren't using operand pointers, use and defs flags can be mixed.
+
+@smallexample
+  tree var;
+  ssa_op_iter iter;
+
+  FOR_EACH_SSA_TREE_OPERAND (var, stmt, iter, SSA_OP_VUSE)
+    @{
+       print_generic_expr (stderr, var, TDF_SLIM);
+    @}
+@end smallexample
+
+@code{VDEF}s are broken into two flags, one for the
+@code{DEF} portion (@code{SSA_OP_VDEF}) and one for the USE portion
+(@code{SSA_OP_VMAYUSE}).  If all you want to look at are the
+@code{VDEF}s together, there is a fourth iterator macro for this,
+which returns both a def_operand_p and a use_operand_p for each
+@code{VDEF} in the statement.  Note that you don't need any flags for
+this one.
+
+@smallexample
+  use_operand_p use_p;
+  def_operand_p def_p;
+  ssa_op_iter iter;
+
+  FOR_EACH_SSA_MAYDEF_OPERAND (def_p, use_p, stmt, iter)
+    @{
+      my_code;
+    @}
+@end smallexample
+
+There are many examples in the code as well, as well as the
+documentation in @file{tree-ssa-operands.h}.
+
+There are also a couple of variants on the stmt iterators regarding PHI
+nodes.
+
+@code{FOR_EACH_PHI_ARG} Works exactly like 
+@code{FOR_EACH_SSA_USE_OPERAND}, except it works over @code{PHI} arguments 
+instead of statement operands.
+
+@smallexample
+/* Look at every virtual PHI use.  */
+FOR_EACH_PHI_ARG (use_p, phi_stmt, iter, SSA_OP_VIRTUAL_USES)
+@{
+   my_code;
+@}
+
+/* Look at every real PHI use.  */
+FOR_EACH_PHI_ARG (use_p, phi_stmt, iter, SSA_OP_USES)
+  my_code;
+
+/* Look at every PHI use.  */
+FOR_EACH_PHI_ARG (use_p, phi_stmt, iter, SSA_OP_ALL_USES)
+  my_code;
+@end smallexample
+
+@code{FOR_EACH_PHI_OR_STMT_@{USE,DEF@}} works exactly like 
+@code{FOR_EACH_SSA_@{USE,DEF@}_OPERAND}, except it will function on
+either a statement or a @code{PHI} node.  These should be used when it is
+appropriate but they are not quite as efficient as the individual 
+@code{FOR_EACH_PHI} and @code{FOR_EACH_SSA} routines.
+
+@smallexample
+FOR_EACH_PHI_OR_STMT_USE (use_operand_p, stmt, iter, flags)
+  @{
+     my_code;
+  @}
+
+FOR_EACH_PHI_OR_STMT_DEF (def_operand_p, phi, iter, flags)
+  @{
+     my_code;
+  @}
+@end smallexample
+
+@subsection Immediate Uses
+@cindex Immediate Uses
+
+Immediate use information is now always available.  Using the immediate use 
+iterators, you may examine every use of any @code{SSA_NAME}. For instance,
+to change each use of @code{ssa_var} to @code{ssa_var2} and call fold_stmt on
+each stmt after that is done:
+
+@smallexample
+  use_operand_p imm_use_p;
+  imm_use_iterator iterator;
+  tree ssa_var, stmt;
+
+
+  FOR_EACH_IMM_USE_STMT (stmt, iterator, ssa_var)
+    @{
+      FOR_EACH_IMM_USE_ON_STMT (imm_use_p, iterator)
+        SET_USE (imm_use_p, ssa_var_2);
+      fold_stmt (stmt);
+    @}
+@end smallexample
+
+There are 2 iterators which can be used. @code{FOR_EACH_IMM_USE_FAST} is
+used when the immediate uses are not changed, i.e., you are looking at the
+uses, but not setting them.  
+
+If they do get changed, then care must be taken that things are not changed 
+under the iterators, so use the @code{FOR_EACH_IMM_USE_STMT} and 
+@code{FOR_EACH_IMM_USE_ON_STMT} iterators.  They attempt to preserve the 
+sanity of the use list by moving all the uses for a statement into 
+a controlled position, and then iterating over those uses.  Then the 
+optimization can manipulate the stmt when all the uses have been
+processed.  This is a little slower than the FAST version since it adds a 
+placeholder element and must sort through the list a bit for each statement.  
+This placeholder element must be also be removed if the loop is 
+terminated early.  The macro @code{BREAK_FROM_IMM_USE_SAFE} is provided 
+to do this :
+
+@smallexample
+  FOR_EACH_IMM_USE_STMT (stmt, iterator, ssa_var)
+    @{
+      if (stmt == last_stmt)
+        BREAK_FROM_SAFE_IMM_USE (iter);
+
+      FOR_EACH_IMM_USE_ON_STMT (imm_use_p, iterator)
+        SET_USE (imm_use_p, ssa_var_2);
+      fold_stmt (stmt);
+    @}
+@end smallexample
+
+There are checks in @code{verify_ssa} which verify that the immediate use list
+is up to date, as well as checking that an optimization didn't break from the 
+loop without using this macro.  It is safe to simply 'break'; from a 
+@code{FOR_EACH_IMM_USE_FAST} traverse.
+
+Some useful functions and macros:
+@enumerate
+@item  @code{has_zero_uses (ssa_var)} : Returns true if there are no uses of
+@code{ssa_var}.
+@item   @code{has_single_use (ssa_var)} : Returns true if there is only a 
+single use of @code{ssa_var}.
+@item   @code{single_imm_use (ssa_var, use_operand_p *ptr, tree *stmt)} :
+Returns true if there is only a single use of @code{ssa_var}, and also returns
+the use pointer and statement it occurs in, in the second and third parameters.
+@item   @code{num_imm_uses (ssa_var)} : Returns the number of immediate uses of
+@code{ssa_var}. It is better not to use this if possible since it simply
+utilizes a loop to count the uses.
+@item  @code{PHI_ARG_INDEX_FROM_USE (use_p)} : Given a use within a @code{PHI}
+node, return the index number for the use.  An assert is triggered if the use
+isn't located in a @code{PHI} node.
+@item  @code{USE_STMT (use_p)} : Return the statement a use occurs in.
+@end enumerate
+
+Note that uses are not put into an immediate use list until their statement is
+actually inserted into the instruction stream via a @code{bsi_*} routine.  
+
+It is also still possible to utilize lazy updating of statements, but this 
+should be used only when absolutely required.  Both alias analysis and the 
+dominator optimizations currently do this.  
+
+When lazy updating is being used, the immediate use information is out of date 
+and cannot be used reliably.  Lazy updating is achieved by simply marking
+statements modified via calls to @code{mark_stmt_modified} instead of 
+@code{update_stmt}.  When lazy updating is no longer required, all the 
+modified statements must have @code{update_stmt} called in order to bring them 
+up to date.  This must be done before the optimization is finished, or 
+@code{verify_ssa} will trigger an abort.
+
+This is done with a simple loop over the instruction stream:
+@smallexample
+  block_stmt_iterator bsi;
+  basic_block bb;
+  FOR_EACH_BB (bb)
+    @{
+      for (bsi = bsi_start (bb); !bsi_end_p (bsi); bsi_next (&bsi))
+        update_stmt_if_modified (bsi_stmt (bsi));
+    @}
+@end smallexample
+
+@node SSA
+@section Static Single Assignment
+@cindex SSA
+@cindex static single assignment
+
+Most of the tree optimizers rely on the data flow information provided
+by the Static Single Assignment (SSA) form.  We implement the SSA form
+as described in @cite{R. Cytron, J. Ferrante, B. Rosen, M. Wegman, and
+K. Zadeck.  Efficiently Computing Static Single Assignment Form and the
+Control Dependence Graph.  ACM Transactions on Programming Languages
+and Systems, 13(4):451-490, October 1991}.
+
+The SSA form is based on the premise that program variables are
+assigned in exactly one location in the program.  Multiple assignments
+to the same variable create new versions of that variable.  Naturally,
+actual programs are seldom in SSA form initially because variables
+tend to be assigned multiple times.  The compiler modifies the program
+representation so that every time a variable is assigned in the code,
+a new version of the variable is created.  Different versions of the
+same variable are distinguished by subscripting the variable name with
+its version number.  Variables used in the right-hand side of
+expressions are renamed so that their version number matches that of
+the most recent assignment.
+
+We represent variable versions using @code{SSA_NAME} nodes.  The
+renaming process in @file{tree-ssa.c} wraps every real and
+virtual operand with an @code{SSA_NAME} node which contains
+the version number and the statement that created the
+@code{SSA_NAME}.  Only definitions and virtual definitions may
+create new @code{SSA_NAME} nodes.
+
+@cindex PHI nodes
+Sometimes, flow of control makes it impossible to determine the
+most recent version of a variable.  In these cases, the compiler
+inserts an artificial definition for that variable called
+@dfn{PHI function} or @dfn{PHI node}.  This new definition merges
+all the incoming versions of the variable to create a new name
+for it.  For instance,
+
+@smallexample
+if (@dots{})
+  a_1 = 5;
+else if (@dots{})
+  a_2 = 2;
+else
+  a_3 = 13;
+
+# a_4 = PHI <a_1, a_2, a_3>
+return a_4;
+@end smallexample
+
+Since it is not possible to determine which of the three branches
+will be taken at runtime, we don't know which of @code{a_1},
+@code{a_2} or @code{a_3} to use at the return statement.  So, the
+SSA renamer creates a new version @code{a_4} which is assigned
+the result of ``merging'' @code{a_1}, @code{a_2} and @code{a_3}.
+Hence, PHI nodes mean ``one of these operands.  I don't know
+which''.
+
+The following macros can be used to examine PHI nodes
+
+@defmac PHI_RESULT (@var{phi})
+Returns the @code{SSA_NAME} created by PHI node @var{phi} (i.e.,
+@var{phi}'s LHS)@.
+@end defmac
+
+@defmac PHI_NUM_ARGS (@var{phi})
+Returns the number of arguments in @var{phi}.  This number is exactly
+the number of incoming edges to the basic block holding @var{phi}@.
+@end defmac
+
+@defmac PHI_ARG_ELT (@var{phi}, @var{i})
+Returns a tuple representing the @var{i}th argument of @var{phi}@.
+Each element of this tuple contains an @code{SSA_NAME} @var{var} and
+the incoming edge through which @var{var} flows.
+@end defmac
+
+@defmac PHI_ARG_EDGE (@var{phi}, @var{i})
+Returns the incoming edge for the @var{i}th argument of @var{phi}.
+@end defmac
+
+@defmac PHI_ARG_DEF (@var{phi}, @var{i})
+Returns the @code{SSA_NAME} for the @var{i}th argument of @var{phi}.
+@end defmac
+
+
+@subsection Preserving the SSA form
+@findex update_ssa
+@cindex preserving SSA form
+Some optimization passes make changes to the function that
+invalidate the SSA property.  This can happen when a pass has
+added new symbols or changed the program so that variables that
+were previously aliased aren't anymore.  Whenever something like this
+happens, the affected symbols must be renamed into SSA form again.  
+Transformations that emit new code or replicate existing statements
+will also need to update the SSA form@.
+
+Since GCC implements two different SSA forms for register and virtual
+variables, keeping the SSA form up to date depends on whether you are
+updating register or virtual names.  In both cases, the general idea
+behind incremental SSA updates is similar: when new SSA names are
+created, they typically are meant to replace other existing names in
+the program@.
+
+For instance, given the following code:
+
+@smallexample
+     1  L0:
+     2  x_1 = PHI (0, x_5)
+     3  if (x_1 < 10)
+     4    if (x_1 > 7)
+     5      y_2 = 0
+     6    else
+     7      y_3 = x_1 + x_7
+     8    endif
+     9    x_5 = x_1 + 1
+     10   goto L0;
+     11 endif
+@end smallexample
+
+Suppose that we insert new names @code{x_10} and @code{x_11} (lines
+@code{4} and @code{8})@.
+
+@smallexample
+     1  L0:
+     2  x_1 = PHI (0, x_5)
+     3  if (x_1 < 10)
+     4    x_10 = @dots{}
+     5    if (x_1 > 7)
+     6      y_2 = 0
+     7    else
+     8      x_11 = @dots{}
+     9      y_3 = x_1 + x_7
+     10   endif
+     11   x_5 = x_1 + 1
+     12   goto L0;
+     13 endif
+@end smallexample
+
+We want to replace all the uses of @code{x_1} with the new definitions
+of @code{x_10} and @code{x_11}.  Note that the only uses that should
+be replaced are those at lines @code{5}, @code{9} and @code{11}.
+Also, the use of @code{x_7} at line @code{9} should @emph{not} be
+replaced (this is why we cannot just mark symbol @code{x} for
+renaming)@.
+
+Additionally, we may need to insert a PHI node at line @code{11}
+because that is a merge point for @code{x_10} and @code{x_11}.  So the
+use of @code{x_1} at line @code{11} will be replaced with the new PHI
+node.  The insertion of PHI nodes is optional.  They are not strictly
+necessary to preserve the SSA form, and depending on what the caller
+inserted, they may not even be useful for the optimizers@.
+
+Updating the SSA form is a two step process.  First, the pass has to
+identify which names need to be updated and/or which symbols need to
+be renamed into SSA form for the first time.  When new names are
+introduced to replace existing names in the program, the mapping
+between the old and the new names are registered by calling
+@code{register_new_name_mapping} (note that if your pass creates new
+code by duplicating basic blocks, the call to @code{tree_duplicate_bb}
+will set up the necessary mappings automatically).  On the other hand,
+if your pass exposes a new symbol that should be put in SSA form for
+the first time, the new symbol should be registered with
+@code{mark_sym_for_renaming}.
+
+After the replacement mappings have been registered and new symbols
+marked for renaming, a call to @code{update_ssa} makes the registered
+changes.  This can be done with an explicit call or by creating
+@code{TODO} flags in the @code{tree_opt_pass} structure for your pass.
+There are several @code{TODO} flags that control the behavior of
+@code{update_ssa}:
+
+@itemize @bullet
+@item @code{TODO_update_ssa}.  Update the SSA form inserting PHI nodes
+for newly exposed symbols and virtual names marked for updating.
+When updating real names, only insert PHI nodes for a real name
+@code{O_j} in blocks reached by all the new and old definitions for
+@code{O_j}.  If the iterated dominance frontier for @code{O_j}
+is not pruned, we may end up inserting PHI nodes in blocks that
+have one or more edges with no incoming definition for
+@code{O_j}.  This would lead to uninitialized warnings for
+@code{O_j}'s symbol@.
+
+@item @code{TODO_update_ssa_no_phi}.  Update the SSA form without
+inserting any new PHI nodes at all.  This is used by passes that
+have either inserted all the PHI nodes themselves or passes that
+need only to patch use-def and def-def chains for virtuals
+(e.g., DCE)@.
+
+
+@item @code{TODO_update_ssa_full_phi}.  Insert PHI nodes everywhere
+they are needed.  No pruning of the IDF is done.  This is used
+by passes that need the PHI nodes for @code{O_j} even if it
+means that some arguments will come from the default definition
+of @code{O_j}'s symbol (e.g., @code{pass_linear_transform})@.
+
+WARNING: If you need to use this flag, chances are that your
+pass may be doing something wrong.  Inserting PHI nodes for an
+old name where not all edges carry a new replacement may lead to
+silent codegen errors or spurious uninitialized warnings@.
+
+@item @code{TODO_update_ssa_only_virtuals}.  Passes that update the
+SSA form on their own may want to delegate the updating of
+virtual names to the generic updater.  Since FUD chains are
+easier to maintain, this simplifies the work they need to do.
+NOTE: If this flag is used, any OLD->NEW mappings for real names
+are explicitly destroyed and only the symbols marked for
+renaming are processed@.
+@end itemize
+
+@subsection Preserving the virtual SSA form
+@cindex preserving virtual SSA form
+
+The virtual SSA form is harder to preserve than the non-virtual SSA form
+mainly because the set of virtual operands for a statement may change at
+what some would consider unexpected times.  In general, statement
+modifications should be bracketed between calls to
+@code{push_stmt_changes} and @code{pop_stmt_changes}.  For example,
+
+@smallexample
+    munge_stmt (tree stmt)
+    @{
+       push_stmt_changes (&stmt);
+       @dots{} rewrite STMT @dots{}
+       pop_stmt_changes (&stmt);
+    @}
+@end smallexample
+
+The call to @code{push_stmt_changes} saves the current state of the
+statement operands and the call to @code{pop_stmt_changes} compares
+the saved state with the current one and does the appropriate symbol
+marking for the SSA renamer.
+
+It is possible to modify several statements at a time, provided that
+@code{push_stmt_changes} and @code{pop_stmt_changes} are called in
+LIFO order, as when processing a stack of statements.
+
+Additionally, if the pass discovers that it did not need to make
+changes to the statement after calling @code{push_stmt_changes}, it
+can simply discard the topmost change buffer by calling
+@code{discard_stmt_changes}.  This will avoid the expensive operand
+re-scan operation and the buffer comparison that determines if symbols
+need to be marked for renaming.
+
+@subsection Examining @code{SSA_NAME} nodes
+@cindex examining SSA_NAMEs
+
+The following macros can be used to examine @code{SSA_NAME} nodes
+
+@defmac SSA_NAME_DEF_STMT (@var{var})
+Returns the statement @var{s} that creates the @code{SSA_NAME}
+@var{var}.  If @var{s} is an empty statement (i.e., @code{IS_EMPTY_STMT
+(@var{s})} returns @code{true}), it means that the first reference to
+this variable is a USE or a VUSE@.
+@end defmac
+
+@defmac SSA_NAME_VERSION (@var{var})
+Returns the version number of the @code{SSA_NAME} object @var{var}.
+@end defmac
+
+
+@subsection Walking use-def chains
+
+@deftypefn {Tree SSA function} void walk_use_def_chains (@var{var}, @var{fn}, @var{data})
+
+Walks use-def chains starting at the @code{SSA_NAME} node @var{var}.
+Calls function @var{fn} at each reaching definition found.  Function
+@var{FN} takes three arguments: @var{var}, its defining statement
+(@var{def_stmt}) and a generic pointer to whatever state information
+that @var{fn} may want to maintain (@var{data}).  Function @var{fn} is
+able to stop the walk by returning @code{true}, otherwise in order to
+continue the walk, @var{fn} should return @code{false}.
+
+Note, that if @var{def_stmt} is a @code{PHI} node, the semantics are
+slightly different.  For each argument @var{arg} of the PHI node, this
+function will:
+
+@enumerate
+@item Walk the use-def chains for @var{arg}.
+@item Call @code{FN (@var{arg}, @var{phi}, @var{data})}.
+@end enumerate
+
+Note how the first argument to @var{fn} is no longer the original
+variable @var{var}, but the PHI argument currently being examined.
+If @var{fn} wants to get at @var{var}, it should call
+@code{PHI_RESULT} (@var{phi}).
+@end deftypefn
+
+@subsection Walking the dominator tree
+
+@deftypefn {Tree SSA function} void walk_dominator_tree (@var{walk_data}, @var{bb})
+
+This function walks the dominator tree for the current CFG calling a
+set of callback functions defined in @var{struct dom_walk_data} in
+@file{domwalk.h}.  The call back functions you need to define give you
+hooks to execute custom code at various points during traversal:
+
+@enumerate
+@item Once to initialize any local data needed while processing
+@var{bb} and its children.  This local data is pushed into an
+internal stack which is automatically pushed and popped as the
+walker traverses the dominator tree.
+
+@item Once before traversing all the statements in the @var{bb}.
+
+@item Once for every statement inside @var{bb}.
+
+@item Once after traversing all the statements and before recursing
+into @var{bb}'s dominator children.
+
+@item It then recurses into all the dominator children of @var{bb}.
+
+@item After recursing into all the dominator children of @var{bb} it
+can, optionally, traverse every statement in @var{bb} again
+(i.e., repeating steps 2 and 3).
+
+@item Once after walking the statements in @var{bb} and @var{bb}'s
+dominator children.  At this stage, the block local data stack
+is popped.
+@end enumerate
+@end deftypefn
+
+@node Alias analysis
+@section Alias analysis
+@cindex alias
+@cindex flow-sensitive alias analysis
+@cindex flow-insensitive alias analysis
+
+Alias analysis in GIMPLE SSA form consists of two pieces.  First
+the virtual SSA web ties conflicting memory accesses and provides
+a SSA use-def chain and SSA immediate-use chains for walking
+possibly dependent memory accesses.  Second an alias-oracle can
+be queried to disambiguate explicit and implicit memory references.
+
+@enumerate
+@item Memory SSA form.
+
+All statements that may use memory have exactly one accompanied use of
+a virtual SSA name that represents the state of memory at the
+given point in the IL.
+
+All statements that may define memory have exactly one accompanied
+definition of a virtual SSA name using the previous state of memory
+and defining the new state of memory after the given point in the IL.
+
+@smallexample
+int i;
+int foo (void)
+@{
+  # .MEM_3 = VDEF <.MEM_2(D)>
+  i = 1;
+  # VUSE <.MEM_3>
+  return i;
+@}
+@end smallexample
+
+The virtual SSA names in this case are @code{.MEM_2(D)} and
+@code{.MEM_3}.  The store to the global variable @code{i}
+defines @code{.MEM_3} invalidating @code{.MEM_2(D)}.  The
+load from @code{i} uses that new state @code{.MEM_3}.
+
+The virtual SSA web serves as constraints to SSA optimizers
+preventing illegitimate code-motion and optimization.  It
+also provides a way to walk related memory statements.
+
+@item Points-to and escape analysis.
+
+Points-to analysis builds a set of constraints from the GIMPLE
+SSA IL representing all pointer operations and facts we do
+or do not know about pointers.  Solving this set of constraints
+yields a conservatively correct solution for each pointer
+variable in the program (though we are only interested in
+SSA name pointers) as to what it may possibly point to.
+
+This points-to solution for a given SSA name pointer is stored
+in the @code{pt_solution} sub-structure of the
+@code{SSA_NAME_PTR_INFO} record.  The following accessor
+functions are available:
+
+@itemize @bullet
+@item @code{pt_solution_includes}
+@item @code{pt_solutions_intersect}
+@end itemize
+
+Points-to analysis also computes the solution for two special
+set of pointers, @code{ESCAPED} and @code{CALLUSED}.  Those
+represent all memory that has escaped the scope of analysis
+or that is used by pure or nested const calls.
+
+@item Type-based alias analysis
+
+Type-based alias analysis is frontend dependent though generic
+support is provided by the middle-end in @code{alias.c}.  TBAA
+code is used by both tree optimizers and RTL optimizers.
+
+Every language that wishes to perform language-specific alias analysis
+should define a function that computes, given a @code{tree}
+node, an alias set for the node.  Nodes in different alias sets are not
+allowed to alias.  For an example, see the C front-end function
+@code{c_get_alias_set}.
+
+@item Tree alias-oracle
+
+The tree alias-oracle provides means to disambiguate two memory
+references and memory references against statements.  The following
+queries are available:
+
+@itemize @bullet
+@item @code{refs_may_alias_p}
+@item @code{ref_maybe_used_by_stmt_p}
+@item @code{stmt_may_clobber_ref_p}
+@end itemize
+
+In addition to those two kind of statement walkers are available
+walking statements related to a reference ref.
+@code{walk_non_aliased_vuses} walks over dominating memory defining
+statements and calls back if the statement does not clobber ref
+providing the non-aliased VUSE.  The walk stops at
+the first clobbering statement or if asked to.
+@code{walk_aliased_vdefs} walks over dominating memory defining
+statements and calls back on each statement clobbering ref
+providing its aliasing VDEF.  The walk stops if asked to.
+
+@end enumerate
+
+
+@node Memory model
+@section Memory model
+@cindex memory model
+
+The memory model used by the middle-end models that of the C/C++
+languages.  The middle-end has the notion of an effective type
+of a memory region which is used for type-based alias analysis.
+
+The following is a refinement of ISO C99 6.5/6, clarifying the block copy case
+to follow common sense and extending the concept of a dynamic effective
+type to objects with a declared type as required for C++.
+
+@smallexample
+The effective type of an object for an access to its stored value is
+the declared type of the object or the effective type determined by
+a previous store to it.  If a value is stored into an object through
+an lvalue having a type that is not a character type, then the
+type of the lvalue becomes the effective type of the object for that
+access and for subsequent accesses that do not modify the stored value.
+If a value is copied into an object using @code{memcpy} or @code{memmove},
+or is copied as an array of character type, then the effective type
+of the modified object for that access and for subsequent accesses that
+do not modify the value is undetermined.  For all other accesses to an
+object, the effective type of the object is simply the type of the
+lvalue used for the access.
+@end smallexample
+
diff --git a/gcc/doc/trouble.texi b/gcc/doc/trouble.texi
new file mode 100644
index 000000000..03e399373
--- /dev/null
+++ b/gcc/doc/trouble.texi
@@ -0,0 +1,1218 @@
+@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+@c 1999, 2000, 2001, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+@c Free Software Foundation, Inc.
+@c This is part of the GCC manual.
+@c For copying conditions, see the file gcc.texi.
+
+@node Trouble
+@chapter Known Causes of Trouble with GCC
+@cindex bugs, known
+@cindex installation trouble
+@cindex known causes of trouble
+
+This section describes known problems that affect users of GCC@.  Most
+of these are not GCC bugs per se---if they were, we would fix them.
+But the result for a user may be like the result of a bug.
+
+Some of these problems are due to bugs in other software, some are
+missing features that are too much work to add, and some are places
+where people's opinions differ as to what is best.
+
+@menu
+* Actual Bugs::         Bugs we will fix later.
+* Cross-Compiler Problems:: Common problems of cross compiling with GCC.
+* Interoperation::      Problems using GCC with other compilers,
+                        and with certain linkers, assemblers and debuggers.
+* Incompatibilities::   GCC is incompatible with traditional C.
+* Fixed Headers::       GCC uses corrected versions of system header files.
+                        This is necessary, but doesn't always work smoothly.
+* Standard Libraries::  GCC uses the system C library, which might not be
+                        compliant with the ISO C standard.
+* Disappointments::     Regrettable things we can't change, but not quite bugs.
+* C++ Misunderstandings:: Common misunderstandings with GNU C++.
+* Non-bugs::            Things we think are right, but some others disagree.
+* Warnings and Errors:: Which problems in your code get warnings,
+                        and which get errors.
+@end menu
+
+@node Actual Bugs
+@section Actual Bugs We Haven't Fixed Yet
+
+@itemize @bullet
+@item
+The @code{fixincludes} script interacts badly with automounters; if the
+directory of system header files is automounted, it tends to be
+unmounted while @code{fixincludes} is running.  This would seem to be a
+bug in the automounter.  We don't know any good way to work around it.
+@end itemize
+
+@node Cross-Compiler Problems
+@section Cross-Compiler Problems
+
+You may run into problems with cross compilation on certain machines,
+for several reasons.
+
+@itemize @bullet
+@item
+At present, the program @file{mips-tfile} which adds debug
+support to object files on MIPS systems does not work in a cross
+compile environment.
+@end itemize
+
+@node Interoperation
+@section Interoperation
+
+This section lists various difficulties encountered in using GCC
+together with other compilers or with the assemblers, linkers,
+libraries and debuggers on certain systems.
+
+@itemize @bullet
+@item
+On many platforms, GCC supports a different ABI for C++ than do other
+compilers, so the object files compiled by GCC cannot be used with object
+files generated by another C++ compiler.
+
+An area where the difference is most apparent is name mangling.  The use
+of different name mangling is intentional, to protect you from more subtle
+problems.
+Compilers differ as to many internal details of C++ implementation,
+including: how class instances are laid out, how multiple inheritance is
+implemented, and how virtual function calls are handled.  If the name
+encoding were made the same, your programs would link against libraries
+provided from other compilers---but the programs would then crash when
+run.  Incompatible libraries are then detected at link time, rather than
+at run time.
+
+@item
+On some BSD systems, including some versions of Ultrix, use of profiling
+causes static variable destructors (currently used only in C++) not to
+be run.
+
+@item
+On some SGI systems, when you use @option{-lgl_s} as an option,
+it gets translated magically to @samp{-lgl_s -lX11_s -lc_s}.
+Naturally, this does not happen when you use GCC@.
+You must specify all three options explicitly.
+
+@item
+On a SPARC, GCC aligns all values of type @code{double} on an 8-byte
+boundary, and it expects every @code{double} to be so aligned.  The Sun
+compiler usually gives @code{double} values 8-byte alignment, with one
+exception: function arguments of type @code{double} may not be aligned.
+
+As a result, if a function compiled with Sun CC takes the address of an
+argument of type @code{double} and passes this pointer of type
+@code{double *} to a function compiled with GCC, dereferencing the
+pointer may cause a fatal signal.
+
+One way to solve this problem is to compile your entire program with GCC@.
+Another solution is to modify the function that is compiled with
+Sun CC to copy the argument into a local variable; local variables
+are always properly aligned.  A third solution is to modify the function
+that uses the pointer to dereference it via the following function
+@code{access_double} instead of directly with @samp{*}:
+
+@smallexample
+inline double
+access_double (double *unaligned_ptr)
+@{
+  union d2i @{ double d; int i[2]; @};
+
+  union d2i *p = (union d2i *) unaligned_ptr;
+  union d2i u;
+
+  u.i[0] = p->i[0];
+  u.i[1] = p->i[1];
+
+  return u.d;
+@}
+@end smallexample
+
+@noindent
+Storing into the pointer can be done likewise with the same union.
+
+@item
+On Solaris, the @code{malloc} function in the @file{libmalloc.a} library
+may allocate memory that is only 4 byte aligned.  Since GCC on the
+SPARC assumes that doubles are 8 byte aligned, this may result in a
+fatal signal if doubles are stored in memory allocated by the
+@file{libmalloc.a} library.
+
+The solution is to not use the @file{libmalloc.a} library.  Use instead
+@code{malloc} and related functions from @file{libc.a}; they do not have
+this problem.
+
+@item
+On the HP PA machine, ADB sometimes fails to work on functions compiled
+with GCC@.  Specifically, it fails to work on functions that use
+@code{alloca} or variable-size arrays.  This is because GCC doesn't
+generate HP-UX unwind descriptors for such functions.  It may even be
+impossible to generate them.
+
+@item
+Debugging (@option{-g}) is not supported on the HP PA machine, unless you use
+the preliminary GNU tools.
+
+@item
+Taking the address of a label may generate errors from the HP-UX
+PA assembler.  GAS for the PA does not have this problem.
+
+@item
+Using floating point parameters for indirect calls to static functions
+will not work when using the HP assembler.  There simply is no way for GCC
+to specify what registers hold arguments for static functions when using
+the HP assembler.  GAS for the PA does not have this problem.
+
+@item
+In extremely rare cases involving some very large functions you may
+receive errors from the HP linker complaining about an out of bounds
+unconditional branch offset.  This used to occur more often in previous
+versions of GCC, but is now exceptionally rare.  If you should run
+into it, you can work around by making your function smaller.
+
+@item
+GCC compiled code sometimes emits warnings from the HP-UX assembler of
+the form:
+
+@smallexample
+(warning) Use of GR3 when
+  frame >= 8192 may cause conflict.
+@end smallexample
+
+These warnings are harmless and can be safely ignored.
+
+@item
+In extremely rare cases involving some very large functions you may
+receive errors from the AIX Assembler complaining about a displacement
+that is too large.  If you should run into it, you can work around by
+making your function smaller.
+
+@item
+The @file{libstdc++.a} library in GCC relies on the SVR4 dynamic
+linker semantics which merges global symbols between libraries and
+applications, especially necessary for C++ streams functionality.
+This is not the default behavior of AIX shared libraries and dynamic
+linking.  @file{libstdc++.a} is built on AIX with ``runtime-linking''
+enabled so that symbol merging can occur.  To utilize this feature,
+the application linked with @file{libstdc++.a} must include the
+@option{-Wl,-brtl} flag on the link line.  G++ cannot impose this
+because this option may interfere with the semantics of the user
+program and users may not always use @samp{g++} to link his or her
+application.  Applications are not required to use the
+@option{-Wl,-brtl} flag on the link line---the rest of the
+@file{libstdc++.a} library which is not dependent on the symbol
+merging semantics will continue to function correctly.
+
+@item
+An application can interpose its own definition of functions for
+functions invoked by @file{libstdc++.a} with ``runtime-linking''
+enabled on AIX@.  To accomplish this the application must be linked
+with ``runtime-linking'' option and the functions explicitly must be
+exported by the application (@option{-Wl,-brtl,-bE:exportfile}).
+
+@item
+AIX on the RS/6000 provides support (NLS) for environments outside of
+the United States.  Compilers and assemblers use NLS to support
+locale-specific representations of various objects including
+floating-point numbers (@samp{.} vs @samp{,} for separating decimal
+fractions).  There have been problems reported where the library linked
+with GCC does not produce the same floating-point formats that the
+assembler accepts.  If you have this problem, set the @env{LANG}
+environment variable to @samp{C} or @samp{En_US}.
+
+@item
+@opindex fdollars-in-identifiers
+Even if you specify @option{-fdollars-in-identifiers},
+you cannot successfully use @samp{$} in identifiers on the RS/6000 due
+to a restriction in the IBM assembler.  GAS supports these
+identifiers.
+
+@end itemize
+
+@node Incompatibilities
+@section Incompatibilities of GCC
+@cindex incompatibilities of GCC
+@opindex traditional
+
+There are several noteworthy incompatibilities between GNU C and K&R
+(non-ISO) versions of C@.
+
+@itemize @bullet
+@cindex string constants
+@cindex read-only strings
+@cindex shared strings
+@item
+GCC normally makes string constants read-only.  If several
+identical-looking string constants are used, GCC stores only one
+copy of the string.
+
+@cindex @code{mktemp}, and constant strings
+One consequence is that you cannot call @code{mktemp} with a string
+constant argument.  The function @code{mktemp} always alters the
+string its argument points to.
+
+@cindex @code{sscanf}, and constant strings
+@cindex @code{fscanf}, and constant strings
+@cindex @code{scanf}, and constant strings
+Another consequence is that @code{sscanf} does not work on some very
+old systems when passed a string constant as its format control string
+or input.  This is because @code{sscanf} incorrectly tries to write
+into the string constant.  Likewise @code{fscanf} and @code{scanf}.
+
+The solution to these problems is to change the program to use
+@code{char}-array variables with initialization strings for these
+purposes instead of string constants.
+
+@item
+@code{-2147483648} is positive.
+
+This is because 2147483648 cannot fit in the type @code{int}, so
+(following the ISO C rules) its data type is @code{unsigned long int}.
+Negating this value yields 2147483648 again.
+
+@item
+GCC does not substitute macro arguments when they appear inside of
+string constants.  For example, the following macro in GCC
+
+@smallexample
+#define foo(a) "a"
+@end smallexample
+
+@noindent
+will produce output @code{"a"} regardless of what the argument @var{a} is.
+
+@cindex @code{setjmp} incompatibilities
+@cindex @code{longjmp} incompatibilities
+@item
+When you use @code{setjmp} and @code{longjmp}, the only automatic
+variables guaranteed to remain valid are those declared
+@code{volatile}.  This is a consequence of automatic register
+allocation.  Consider this function:
+
+@smallexample
+jmp_buf j;
+
+foo ()
+@{
+  int a, b;
+
+  a = fun1 ();
+  if (setjmp (j))
+    return a;
+
+  a = fun2 ();
+  /* @r{@code{longjmp (j)} may occur in @code{fun3}.} */
+  return a + fun3 ();
+@}
+@end smallexample
+
+Here @code{a} may or may not be restored to its first value when the
+@code{longjmp} occurs.  If @code{a} is allocated in a register, then
+its first value is restored; otherwise, it keeps the last value stored
+in it.
+
+@opindex W
+If you use the @option{-W} option with the @option{-O} option, you will
+get a warning when GCC thinks such a problem might be possible.
+
+@item
+Programs that use preprocessing directives in the middle of macro
+arguments do not work with GCC@.  For example, a program like this
+will not work:
+
+@smallexample
+@group
+foobar (
+#define luser
+        hack)
+@end group
+@end smallexample
+
+ISO C does not permit such a construct.
+
+@item
+K&R compilers allow comments to cross over an inclusion boundary
+(i.e.@: started in an include file and ended in the including file).
+
+@cindex external declaration scope
+@cindex scope of external declarations
+@cindex declaration scope
+@item
+Declarations of external variables and functions within a block apply
+only to the block containing the declaration.  In other words, they
+have the same scope as any other declaration in the same place.
+
+In some other C compilers, an @code{extern} declaration affects all the
+rest of the file even if it happens within a block.
+
+@item
+In traditional C, you can combine @code{long}, etc., with a typedef name,
+as shown here:
+
+@smallexample
+typedef int foo;
+typedef long foo bar;
+@end smallexample
+
+In ISO C, this is not allowed: @code{long} and other type modifiers
+require an explicit @code{int}.
+
+@cindex typedef names as function parameters
+@item
+PCC allows typedef names to be used as function parameters.
+
+@item
+Traditional C allows the following erroneous pair of declarations to
+appear together in a given scope:
+
+@smallexample
+typedef int foo;
+typedef foo foo;
+@end smallexample
+
+@item
+GCC treats all characters of identifiers as significant.  According to
+K&R-1 (2.2), ``No more than the first eight characters are significant,
+although more may be used.''.  Also according to K&R-1 (2.2), ``An
+identifier is a sequence of letters and digits; the first character must
+be a letter.  The underscore _ counts as a letter.'', but GCC also
+allows dollar signs in identifiers.
+
+@cindex whitespace
+@item
+PCC allows whitespace in the middle of compound assignment operators
+such as @samp{+=}.  GCC, following the ISO standard, does not
+allow this.
+
+@cindex apostrophes
+@cindex @code{'}
+@item
+GCC complains about unterminated character constants inside of
+preprocessing conditionals that fail.  Some programs have English
+comments enclosed in conditionals that are guaranteed to fail; if these
+comments contain apostrophes, GCC will probably report an error.  For
+example, this code would produce an error:
+
+@smallexample
+#if 0
+You can't expect this to work.
+#endif
+@end smallexample
+
+The best solution to such a problem is to put the text into an actual
+C comment delimited by @samp{/*@dots{}*/}.
+
+@item
+Many user programs contain the declaration @samp{long time ();}.  In the
+past, the system header files on many systems did not actually declare
+@code{time}, so it did not matter what type your program declared it to
+return.  But in systems with ISO C headers, @code{time} is declared to
+return @code{time_t}, and if that is not the same as @code{long}, then
+@samp{long time ();} is erroneous.
+
+The solution is to change your program to use appropriate system headers
+(@code{<time.h>} on systems with ISO C headers) and not to declare
+@code{time} if the system header files declare it, or failing that to
+use @code{time_t} as the return type of @code{time}.
+
+@cindex @code{float} as function value type
+@item
+When compiling functions that return @code{float}, PCC converts it to
+a double.  GCC actually returns a @code{float}.  If you are concerned
+with PCC compatibility, you should declare your functions to return
+@code{double}; you might as well say what you mean.
+
+@cindex structures
+@cindex unions
+@item
+When compiling functions that return structures or unions, GCC
+output code normally uses a method different from that used on most
+versions of Unix.  As a result, code compiled with GCC cannot call
+a structure-returning function compiled with PCC, and vice versa.
+
+The method used by GCC is as follows: a structure or union which is
+1, 2, 4 or 8 bytes long is returned like a scalar.  A structure or union
+with any other size is stored into an address supplied by the caller
+(usually in a special, fixed register, but on some machines it is passed
+on the stack).  The target hook @code{TARGET_STRUCT_VALUE_RTX}
+tells GCC where to pass this address.
+
+By contrast, PCC on most target machines returns structures and unions
+of any size by copying the data into an area of static storage, and then
+returning the address of that storage as if it were a pointer value.
+The caller must copy the data from that memory area to the place where
+the value is wanted.  GCC does not use this method because it is
+slower and nonreentrant.
+
+On some newer machines, PCC uses a reentrant convention for all
+structure and union returning.  GCC on most of these machines uses a
+compatible convention when returning structures and unions in memory,
+but still returns small structures and unions in registers.
+
+@opindex fpcc-struct-return
+You can tell GCC to use a compatible convention for all structure and
+union returning with the option @option{-fpcc-struct-return}.
+
+@cindex preprocessing tokens
+@cindex preprocessing numbers
+@item
+GCC complains about program fragments such as @samp{0x74ae-0x4000}
+which appear to be two hexadecimal constants separated by the minus
+operator.  Actually, this string is a single @dfn{preprocessing token}.
+Each such token must correspond to one token in C@.  Since this does not,
+GCC prints an error message.  Although it may appear obvious that what
+is meant is an operator and two values, the ISO C standard specifically
+requires that this be treated as erroneous.
+
+A @dfn{preprocessing token} is a @dfn{preprocessing number} if it
+begins with a digit and is followed by letters, underscores, digits,
+periods and @samp{e+}, @samp{e-}, @samp{E+}, @samp{E-}, @samp{p+},
+@samp{p-}, @samp{P+}, or @samp{P-} character sequences.  (In strict C90
+mode, the sequences @samp{p+}, @samp{p-}, @samp{P+} and @samp{P-} cannot
+appear in preprocessing numbers.)
+
+To make the above program fragment valid, place whitespace in front of
+the minus sign.  This whitespace will end the preprocessing number.
+@end itemize
+
+@node Fixed Headers
+@section Fixed Header Files
+
+GCC needs to install corrected versions of some system header files.
+This is because most target systems have some header files that won't
+work with GCC unless they are changed.  Some have bugs, some are
+incompatible with ISO C, and some depend on special features of other
+compilers.
+
+Installing GCC automatically creates and installs the fixed header
+files, by running a program called @code{fixincludes}.  Normally, you
+don't need to pay attention to this.  But there are cases where it
+doesn't do the right thing automatically.
+
+@itemize @bullet
+@item
+If you update the system's header files, such as by installing a new
+system version, the fixed header files of GCC are not automatically
+updated.  They can be updated using the @command{mkheaders} script
+installed in
+@file{@var{libexecdir}/gcc/@var{target}/@var{version}/install-tools/}.
+
+@item
+On some systems, header file directories contain
+machine-specific symbolic links in certain places.  This makes it
+possible to share most of the header files among hosts running the
+same version of the system on different machine models.
+
+The programs that fix the header files do not understand this special
+way of using symbolic links; therefore, the directory of fixed header
+files is good only for the machine model used to build it.
+
+It is possible to make separate sets of fixed header files for the
+different machine models, and arrange a structure of symbolic links so
+as to use the proper set, but you'll have to do this by hand.
+@end itemize
+
+@node Standard Libraries
+@section Standard Libraries
+
+@opindex Wall
+GCC by itself attempts to be a conforming freestanding implementation.
+@xref{Standards,,Language Standards Supported by GCC}, for details of
+what this means.  Beyond the library facilities required of such an
+implementation, the rest of the C library is supplied by the vendor of
+the operating system.  If that C library doesn't conform to the C
+standards, then your programs might get warnings (especially when using
+@option{-Wall}) that you don't expect.
+
+For example, the @code{sprintf} function on SunOS 4.1.3 returns
+@code{char *} while the C standard says that @code{sprintf} returns an
+@code{int}.  The @code{fixincludes} program could make the prototype for
+this function match the Standard, but that would be wrong, since the
+function will still return @code{char *}.
+
+If you need a Standard compliant library, then you need to find one, as
+GCC does not provide one.  The GNU C library (called @code{glibc})
+provides ISO C, POSIX, BSD, SystemV and X/Open compatibility for
+GNU/Linux and HURD-based GNU systems; no recent version of it supports
+other systems, though some very old versions did.  Version 2.2 of the
+GNU C library includes nearly complete C99 support.  You could also ask
+your operating system vendor if newer libraries are available.
+
+@node Disappointments
+@section Disappointments and Misunderstandings
+
+These problems are perhaps regrettable, but we don't know any practical
+way around them.
+
+@itemize @bullet
+@item
+Certain local variables aren't recognized by debuggers when you compile
+with optimization.
+
+This occurs because sometimes GCC optimizes the variable out of
+existence.  There is no way to tell the debugger how to compute the
+value such a variable ``would have had'', and it is not clear that would
+be desirable anyway.  So GCC simply does not mention the eliminated
+variable when it writes debugging information.
+
+You have to expect a certain amount of disagreement between the
+executable and your source code, when you use optimization.
+
+@cindex conflicting types
+@cindex scope of declaration
+@item
+Users often think it is a bug when GCC reports an error for code
+like this:
+
+@smallexample
+int foo (struct mumble *);
+
+struct mumble @{ @dots{} @};
+
+int foo (struct mumble *x)
+@{ @dots{} @}
+@end smallexample
+
+This code really is erroneous, because the scope of @code{struct
+mumble} in the prototype is limited to the argument list containing it.
+It does not refer to the @code{struct mumble} defined with file scope
+immediately below---they are two unrelated types with similar names in
+different scopes.
+
+But in the definition of @code{foo}, the file-scope type is used
+because that is available to be inherited.  Thus, the definition and
+the prototype do not match, and you get an error.
+
+This behavior may seem silly, but it's what the ISO standard specifies.
+It is easy enough for you to make your code work by moving the
+definition of @code{struct mumble} above the prototype.  It's not worth
+being incompatible with ISO C just to avoid an error for the example
+shown above.
+
+@item
+Accesses to bit-fields even in volatile objects works by accessing larger
+objects, such as a byte or a word.  You cannot rely on what size of
+object is accessed in order to read or write the bit-field; it may even
+vary for a given bit-field according to the precise usage.
+
+If you care about controlling the amount of memory that is accessed, use
+volatile but do not use bit-fields.
+
+@item
+GCC comes with shell scripts to fix certain known problems in system
+header files.  They install corrected copies of various header files in
+a special directory where only GCC will normally look for them.  The
+scripts adapt to various systems by searching all the system header
+files for the problem cases that we know about.
+
+If new system header files are installed, nothing automatically arranges
+to update the corrected header files.  They can be updated using the
+@command{mkheaders} script installed in
+@file{@var{libexecdir}/gcc/@var{target}/@var{version}/install-tools/}.
+
+@item
+@cindex floating point precision
+On 68000 and x86 systems, for instance, you can get paradoxical results
+if you test the precise values of floating point numbers.  For example,
+you can find that a floating point value which is not a NaN is not equal
+to itself.  This results from the fact that the floating point registers
+hold a few more bits of precision than fit in a @code{double} in memory.
+Compiled code moves values between memory and floating point registers
+at its convenience, and moving them into memory truncates them.
+
+@opindex ffloat-store
+You can partially avoid this problem by using the @option{-ffloat-store}
+option (@pxref{Optimize Options}).
+
+@item
+On AIX and other platforms without weak symbol support, templates
+need to be instantiated explicitly and symbols for static members
+of templates will not be generated.
+
+@item
+On AIX, GCC scans object files and library archives for static
+constructors and destructors when linking an application before the
+linker prunes unreferenced symbols.  This is necessary to prevent the
+AIX linker from mistakenly assuming that static constructor or
+destructor are unused and removing them before the scanning can occur.
+All static constructors and destructors found will be referenced even
+though the modules in which they occur may not be used by the program.
+This may lead to both increased executable size and unexpected symbol
+references.
+@end itemize
+
+@node C++ Misunderstandings
+@section Common Misunderstandings with GNU C++
+
+@cindex misunderstandings in C++
+@cindex surprises in C++
+@cindex C++ misunderstandings
+C++ is a complex language and an evolving one, and its standard
+definition (the ISO C++ standard) was only recently completed.  As a
+result, your C++ compiler may occasionally surprise you, even when its
+behavior is correct.  This section discusses some areas that frequently
+give rise to questions of this sort.
+
+@menu
+* Static Definitions::  Static member declarations are not definitions
+* Name lookup::         Name lookup, templates, and accessing members of base classes
+* Temporaries::         Temporaries may vanish before you expect
+* Copy Assignment::     Copy Assignment operators copy virtual bases twice
+@end menu
+
+@node Static Definitions
+@subsection Declare @emph{and} Define Static Members
+
+@cindex C++ static data, declaring and defining
+@cindex static data in C++, declaring and defining
+@cindex declaring static data in C++
+@cindex defining static data in C++
+When a class has static data members, it is not enough to @emph{declare}
+the static member; you must also @emph{define} it.  For example:
+
+@smallexample
+class Foo
+@{
+  @dots{}
+  void method();
+  static int bar;
+@};
+@end smallexample
+
+This declaration only establishes that the class @code{Foo} has an
+@code{int} named @code{Foo::bar}, and a member function named
+@code{Foo::method}.  But you still need to define @emph{both}
+@code{method} and @code{bar} elsewhere.  According to the ISO
+standard, you must supply an initializer in one (and only one) source
+file, such as:
+
+@smallexample
+int Foo::bar = 0;
+@end smallexample
+
+Other C++ compilers may not correctly implement the standard behavior.
+As a result, when you switch to @command{g++} from one of these compilers,
+you may discover that a program that appeared to work correctly in fact
+does not conform to the standard: @command{g++} reports as undefined
+symbols any static data members that lack definitions.
+
+
+@node Name lookup
+@subsection Name lookup, templates, and accessing members of base classes
+
+@cindex base class members
+@cindex two-stage name lookup
+@cindex dependent name lookup
+
+The C++ standard prescribes that all names that are not dependent on
+template parameters are bound to their present definitions when parsing
+a template function or class.@footnote{The C++ standard just uses the
+term ``dependent'' for names that depend on the type or value of
+template parameters.  This shorter term will also be used in the rest of
+this section.}  Only names that are dependent are looked up at the point
+of instantiation.  For example, consider
+
+@smallexample
+  void foo(double);
+
+  struct A @{
+    template <typename T>
+    void f () @{
+      foo (1);        // @r{1}
+      int i = N;      // @r{2}
+      T t;
+      t.bar();        // @r{3}
+      foo (t);        // @r{4}
+    @}
+
+    static const int N;
+  @};
+@end smallexample
+
+Here, the names @code{foo} and @code{N} appear in a context that does
+not depend on the type of @code{T}.  The compiler will thus require that
+they are defined in the context of use in the template, not only before
+the point of instantiation, and will here use @code{::foo(double)} and
+@code{A::N}, respectively.  In particular, it will convert the integer
+value to a @code{double} when passing it to @code{::foo(double)}.
+
+Conversely, @code{bar} and the call to @code{foo} in the fourth marked
+line are used in contexts that do depend on the type of @code{T}, so
+they are only looked up at the point of instantiation, and you can
+provide declarations for them after declaring the template, but before
+instantiating it.  In particular, if you instantiate @code{A::f<int>},
+the last line will call an overloaded @code{::foo(int)} if one was
+provided, even if after the declaration of @code{struct A}.
+
+This distinction between lookup of dependent and non-dependent names is
+called two-stage (or dependent) name lookup.  G++ implements it
+since version 3.4.
+
+Two-stage name lookup sometimes leads to situations with behavior
+different from non-template codes.  The most common is probably this:
+
+@smallexample
+  template <typename T> struct Base @{
+    int i;
+  @};
+
+  template <typename T> struct Derived : public Base<T> @{
+    int get_i() @{ return i; @}
+  @};
+@end smallexample
+
+In @code{get_i()}, @code{i} is not used in a dependent context, so the
+compiler will look for a name declared at the enclosing namespace scope
+(which is the global scope here).  It will not look into the base class,
+since that is dependent and you may declare specializations of
+@code{Base} even after declaring @code{Derived}, so the compiler can't
+really know what @code{i} would refer to.  If there is no global
+variable @code{i}, then you will get an error message.
+
+In order to make it clear that you want the member of the base class,
+you need to defer lookup until instantiation time, at which the base
+class is known.  For this, you need to access @code{i} in a dependent
+context, by either using @code{this->i} (remember that @code{this} is of
+type @code{Derived<T>*}, so is obviously dependent), or using
+@code{Base<T>::i}.  Alternatively, @code{Base<T>::i} might be brought
+into scope by a @code{using}-declaration.
+
+Another, similar example involves calling member functions of a base
+class:
+
+@smallexample
+  template <typename T> struct Base @{
+      int f();
+  @};
+
+  template <typename T> struct Derived : Base<T> @{
+      int g() @{ return f(); @};
+  @};
+@end smallexample
+
+Again, the call to @code{f()} is not dependent on template arguments
+(there are no arguments that depend on the type @code{T}, and it is also
+not otherwise specified that the call should be in a dependent context).
+Thus a global declaration of such a function must be available, since
+the one in the base class is not visible until instantiation time.  The
+compiler will consequently produce the following error message:
+
+@smallexample
+  x.cc: In member function `int Derived<T>::g()':
+  x.cc:6: error: there are no arguments to `f' that depend on a template
+     parameter, so a declaration of `f' must be available
+  x.cc:6: error: (if you use `-fpermissive', G++ will accept your code, but
+     allowing the use of an undeclared name is deprecated)
+@end smallexample
+
+To make the code valid either use @code{this->f()}, or
+@code{Base<T>::f()}.  Using the @option{-fpermissive} flag will also let
+the compiler accept the code, by marking all function calls for which no
+declaration is visible at the time of definition of the template for
+later lookup at instantiation time, as if it were a dependent call.
+We do not recommend using @option{-fpermissive} to work around invalid
+code, and it will also only catch cases where functions in base classes
+are called, not where variables in base classes are used (as in the
+example above).
+
+Note that some compilers (including G++ versions prior to 3.4) get these
+examples wrong and accept above code without an error.  Those compilers
+do not implement two-stage name lookup correctly.
+
+
+@node Temporaries
+@subsection Temporaries May Vanish Before You Expect
+
+@cindex temporaries, lifetime of
+@cindex portions of temporary objects, pointers to
+It is dangerous to use pointers or references to @emph{portions} of a
+temporary object.  The compiler may very well delete the object before
+you expect it to, leaving a pointer to garbage.  The most common place
+where this problem crops up is in classes like string classes,
+especially ones that define a conversion function to type @code{char *}
+or @code{const char *}---which is one reason why the standard
+@code{string} class requires you to call the @code{c_str} member
+function.  However, any class that returns a pointer to some internal
+structure is potentially subject to this problem.
+
+For example, a program may use a function @code{strfunc} that returns
+@code{string} objects, and another function @code{charfunc} that
+operates on pointers to @code{char}:
+
+@smallexample
+string strfunc ();
+void charfunc (const char *);
+
+void
+f ()
+@{
+  const char *p = strfunc().c_str();
+  @dots{}
+  charfunc (p);
+  @dots{}
+  charfunc (p);
+@}
+@end smallexample
+
+@noindent
+In this situation, it may seem reasonable to save a pointer to the C
+string returned by the @code{c_str} member function and use that rather
+than call @code{c_str} repeatedly.  However, the temporary string
+created by the call to @code{strfunc} is destroyed after @code{p} is
+initialized, at which point @code{p} is left pointing to freed memory.
+
+Code like this may run successfully under some other compilers,
+particularly obsolete cfront-based compilers that delete temporaries
+along with normal local variables.  However, the GNU C++ behavior is
+standard-conforming, so if your program depends on late destruction of
+temporaries it is not portable.
+
+The safe way to write such code is to give the temporary a name, which
+forces it to remain until the end of the scope of the name.  For
+example:
+
+@smallexample
+const string& tmp = strfunc ();
+charfunc (tmp.c_str ());
+@end smallexample
+
+@node Copy Assignment
+@subsection Implicit Copy-Assignment for Virtual Bases
+
+When a base class is virtual, only one subobject of the base class
+belongs to each full object.  Also, the constructors and destructors are
+invoked only once, and called from the most-derived class.  However, such
+objects behave unspecified when being assigned.  For example:
+
+@smallexample
+struct Base@{
+  char *name;
+  Base(char *n) : name(strdup(n))@{@}
+  Base& operator= (const Base& other)@{
+   free (name);
+   name = strdup (other.name);
+  @}
+@};
+
+struct A:virtual Base@{
+  int val;
+  A():Base("A")@{@}
+@};
+
+struct B:virtual Base@{
+  int bval;
+  B():Base("B")@{@}
+@};
+
+struct Derived:public A, public B@{
+  Derived():Base("Derived")@{@}
+@};
+
+void func(Derived &d1, Derived &d2)
+@{
+  d1 = d2;
+@}
+@end smallexample
+
+The C++ standard specifies that @samp{Base::Base} is only called once
+when constructing or copy-constructing a Derived object.  It is
+unspecified whether @samp{Base::operator=} is called more than once when
+the implicit copy-assignment for Derived objects is invoked (as it is
+inside @samp{func} in the example).
+
+G++ implements the ``intuitive'' algorithm for copy-assignment: assign all
+direct bases, then assign all members.  In that algorithm, the virtual
+base subobject can be encountered more than once.  In the example, copying
+proceeds in the following order: @samp{val}, @samp{name} (via
+@code{strdup}), @samp{bval}, and @samp{name} again.
+
+If application code relies on copy-assignment, a user-defined
+copy-assignment operator removes any uncertainties.  With such an
+operator, the application can define whether and how the virtual base
+subobject is assigned.
+
+@node Non-bugs
+@section Certain Changes We Don't Want to Make
+
+This section lists changes that people frequently request, but which
+we do not make because we think GCC is better without them.
+
+@itemize @bullet
+@item
+Checking the number and type of arguments to a function which has an
+old-fashioned definition and no prototype.
+
+Such a feature would work only occasionally---only for calls that appear
+in the same file as the called function, following the definition.  The
+only way to check all calls reliably is to add a prototype for the
+function.  But adding a prototype eliminates the motivation for this
+feature.  So the feature is not worthwhile.
+
+@item
+Warning about using an expression whose type is signed as a shift count.
+
+Shift count operands are probably signed more often than unsigned.
+Warning about this would cause far more annoyance than good.
+
+@item
+Warning about assigning a signed value to an unsigned variable.
+
+Such assignments must be very common; warning about them would cause
+more annoyance than good.
+
+@item
+Warning when a non-void function value is ignored.
+
+C contains many standard functions that return a value that most
+programs choose to ignore.  One obvious example is @code{printf}.
+Warning about this practice only leads the defensive programmer to
+clutter programs with dozens of casts to @code{void}.  Such casts are
+required so frequently that they become visual noise.  Writing those
+casts becomes so automatic that they no longer convey useful
+information about the intentions of the programmer.  For functions
+where the return value should never be ignored, use the
+@code{warn_unused_result} function attribute (@pxref{Function
+Attributes}).
+
+@item
+@opindex fshort-enums
+Making @option{-fshort-enums} the default.
+
+This would cause storage layout to be incompatible with most other C
+compilers.  And it doesn't seem very important, given that you can get
+the same result in other ways.  The case where it matters most is when
+the enumeration-valued object is inside a structure, and in that case
+you can specify a field width explicitly.
+
+@item
+Making bit-fields unsigned by default on particular machines where ``the
+ABI standard'' says to do so.
+
+The ISO C standard leaves it up to the implementation whether a bit-field
+declared plain @code{int} is signed or not.  This in effect creates two
+alternative dialects of C@.
+
+@opindex fsigned-bitfields
+@opindex funsigned-bitfields
+The GNU C compiler supports both dialects; you can specify the signed
+dialect with @option{-fsigned-bitfields} and the unsigned dialect with
+@option{-funsigned-bitfields}.  However, this leaves open the question of
+which dialect to use by default.
+
+Currently, the preferred dialect makes plain bit-fields signed, because
+this is simplest.  Since @code{int} is the same as @code{signed int} in
+every other context, it is cleanest for them to be the same in bit-fields
+as well.
+
+Some computer manufacturers have published Application Binary Interface
+standards which specify that plain bit-fields should be unsigned.  It is
+a mistake, however, to say anything about this issue in an ABI@.  This is
+because the handling of plain bit-fields distinguishes two dialects of C@.
+Both dialects are meaningful on every type of machine.  Whether a
+particular object file was compiled using signed bit-fields or unsigned
+is of no concern to other object files, even if they access the same
+bit-fields in the same data structures.
+
+A given program is written in one or the other of these two dialects.
+The program stands a chance to work on most any machine if it is
+compiled with the proper dialect.  It is unlikely to work at all if
+compiled with the wrong dialect.
+
+Many users appreciate the GNU C compiler because it provides an
+environment that is uniform across machines.  These users would be
+inconvenienced if the compiler treated plain bit-fields differently on
+certain machines.
+
+Occasionally users write programs intended only for a particular machine
+type.  On these occasions, the users would benefit if the GNU C compiler
+were to support by default the same dialect as the other compilers on
+that machine.  But such applications are rare.  And users writing a
+program to run on more than one type of machine cannot possibly benefit
+from this kind of compatibility.
+
+This is why GCC does and will treat plain bit-fields in the same
+fashion on all types of machines (by default).
+
+There are some arguments for making bit-fields unsigned by default on all
+machines.  If, for example, this becomes a universal de facto standard,
+it would make sense for GCC to go along with it.  This is something
+to be considered in the future.
+
+(Of course, users strongly concerned about portability should indicate
+explicitly in each bit-field whether it is signed or not.  In this way,
+they write programs which have the same meaning in both C dialects.)
+
+@item
+@opindex ansi
+@opindex std
+Undefining @code{__STDC__} when @option{-ansi} is not used.
+
+Currently, GCC defines @code{__STDC__} unconditionally.  This provides
+good results in practice.
+
+Programmers normally use conditionals on @code{__STDC__} to ask whether
+it is safe to use certain features of ISO C, such as function
+prototypes or ISO token concatenation.  Since plain @command{gcc} supports
+all the features of ISO C, the correct answer to these questions is
+``yes''.
+
+Some users try to use @code{__STDC__} to check for the availability of
+certain library facilities.  This is actually incorrect usage in an ISO
+C program, because the ISO C standard says that a conforming
+freestanding implementation should define @code{__STDC__} even though it
+does not have the library facilities.  @samp{gcc -ansi -pedantic} is a
+conforming freestanding implementation, and it is therefore required to
+define @code{__STDC__}, even though it does not come with an ISO C
+library.
+
+Sometimes people say that defining @code{__STDC__} in a compiler that
+does not completely conform to the ISO C standard somehow violates the
+standard.  This is illogical.  The standard is a standard for compilers
+that claim to support ISO C, such as @samp{gcc -ansi}---not for other
+compilers such as plain @command{gcc}.  Whatever the ISO C standard says
+is relevant to the design of plain @command{gcc} without @option{-ansi} only
+for pragmatic reasons, not as a requirement.
+
+GCC normally defines @code{__STDC__} to be 1, and in addition
+defines @code{__STRICT_ANSI__} if you specify the @option{-ansi} option,
+or a @option{-std} option for strict conformance to some version of ISO C@.
+On some hosts, system include files use a different convention, where
+@code{__STDC__} is normally 0, but is 1 if the user specifies strict
+conformance to the C Standard.  GCC follows the host convention when
+processing system include files, but when processing user files it follows
+the usual GNU C convention.
+
+@item
+Undefining @code{__STDC__} in C++.
+
+Programs written to compile with C++-to-C translators get the
+value of @code{__STDC__} that goes with the C compiler that is
+subsequently used.  These programs must test @code{__STDC__}
+to determine what kind of C preprocessor that compiler uses:
+whether they should concatenate tokens in the ISO C fashion
+or in the traditional fashion.
+
+These programs work properly with GNU C++ if @code{__STDC__} is defined.
+They would not work otherwise.
+
+In addition, many header files are written to provide prototypes in ISO
+C but not in traditional C@.  Many of these header files can work without
+change in C++ provided @code{__STDC__} is defined.  If @code{__STDC__}
+is not defined, they will all fail, and will all need to be changed to
+test explicitly for C++ as well.
+
+@item
+Deleting ``empty'' loops.
+
+Historically, GCC has not deleted ``empty'' loops under the
+assumption that the most likely reason you would put one in a program is
+to have a delay, so deleting them will not make real programs run any
+faster.
+
+However, the rationale here is that optimization of a nonempty loop
+cannot produce an empty one. This held for carefully written C compiled
+with less powerful optimizers but is not always the case for carefully
+written C++ or with more powerful optimizers.
+Thus GCC will remove operations from loops whenever it can determine
+those operations are not externally visible (apart from the time taken
+to execute them, of course).  In case the loop can be proved to be finite,
+GCC will also remove the loop itself.
+
+Be aware of this when performing timing tests, for instance the
+following loop can be completely removed, provided
+@code{some_expression} can provably not change any global state.
+
+@smallexample
+@{
+   int sum = 0;
+   int ix;
+
+   for (ix = 0; ix != 10000; ix++)
+      sum += some_expression;
+@}
+@end smallexample
+
+Even though @code{sum} is accumulated in the loop, no use is made of
+that summation, so the accumulation can be removed.
+
+@item
+Making side effects happen in the same order as in some other compiler.
+
+@cindex side effects, order of evaluation
+@cindex order of evaluation, side effects
+It is never safe to depend on the order of evaluation of side effects.
+For example, a function call like this may very well behave differently
+from one compiler to another:
+
+@smallexample
+void func (int, int);
+
+int i = 2;
+func (i++, i++);
+@end smallexample
+
+There is no guarantee (in either the C or the C++ standard language
+definitions) that the increments will be evaluated in any particular
+order.  Either increment might happen first.  @code{func} might get the
+arguments @samp{2, 3}, or it might get @samp{3, 2}, or even @samp{2, 2}.
+
+@item
+Making certain warnings into errors by default.
+
+Some ISO C testsuites report failure when the compiler does not produce
+an error message for a certain program.
+
+@opindex pedantic-errors
+ISO C requires a ``diagnostic'' message for certain kinds of invalid
+programs, but a warning is defined by GCC to count as a diagnostic.  If
+GCC produces a warning but not an error, that is correct ISO C support.
+If testsuites call this ``failure'', they should be run with the GCC
+option @option{-pedantic-errors}, which will turn these warnings into
+errors.
+
+@end itemize
+
+@node Warnings and Errors
+@section Warning Messages and Error Messages
+
+@cindex error messages
+@cindex warnings vs errors
+@cindex messages, warning and error
+The GNU compiler can produce two kinds of diagnostics: errors and
+warnings.  Each kind has a different purpose:
+
+@itemize @w{}
+@item
+@dfn{Errors} report problems that make it impossible to compile your
+program.  GCC reports errors with the source file name and line
+number where the problem is apparent.
+
+@item
+@dfn{Warnings} report other unusual conditions in your code that
+@emph{may} indicate a problem, although compilation can (and does)
+proceed.  Warning messages also report the source file name and line
+number, but include the text @samp{warning:} to distinguish them
+from error messages.
+@end itemize
+
+Warnings may indicate danger points where you should check to make sure
+that your program really does what you intend; or the use of obsolete
+features; or the use of nonstandard features of GNU C or C++.  Many
+warnings are issued only if you ask for them, with one of the @option{-W}
+options (for instance, @option{-Wall} requests a variety of useful
+warnings).
+
+@opindex pedantic
+@opindex pedantic-errors
+GCC always tries to compile your program if possible; it never
+gratuitously rejects a program whose meaning is clear merely because
+(for instance) it fails to conform to a standard.  In some cases,
+however, the C and C++ standards specify that certain extensions are
+forbidden, and a diagnostic @emph{must} be issued by a conforming
+compiler.  The @option{-pedantic} option tells GCC to issue warnings in
+such cases; @option{-pedantic-errors} says to make them errors instead.
+This does not mean that @emph{all} non-ISO constructs get warnings
+or errors.
+
+@xref{Warning Options,,Options to Request or Suppress Warnings}, for
+more detail on these and related command-line options.